diff --git a/configs/.gitignore b/configs/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..3d589e9dce09bbc7838986d0341953c167d0f56e --- /dev/null +++ b/configs/.gitignore @@ -0,0 +1,22 @@ +.depend +Make.dep +*.o +*.a +*.d +*.i +*~ +.swp +.*.swp +core +.gdbinit +cscope.out +/Make.dep +/.depend +/*.asm +/*.obj +/*.rel +/*.lst +/*.sym +/*.adb +/*.lib +/*.src diff --git a/configs/Board.mk b/configs/Board.mk new file mode 100644 index 0000000000000000000000000000000000000000..a04da6642708c4e123855979d9705c83d1b0549c --- /dev/null +++ b/configs/Board.mk @@ -0,0 +1,135 @@ +############################################################################ +# configs/Board.mk +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. +# Author: Gregory Nutt +# Paul Alexander Patience +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ifneq ($(ZDSVERSION),) +AOBJS = $(ASRCS:.S=$(OBJEXT)) +else +AOBJS = $(ASRCS:$(ASMEXT)=$(OBJEXT)) +endif +COBJS = $(CSRCS:.c=$(OBJEXT)) + +SRCS = $(ASRCS) $(CSRCS) +OBJS = $(AOBJS) $(COBJS) + +SCHEDSRCDIR = $(TOPDIR)$(DELIM)sched +ARCHSRCDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src + +ifneq ($(ZDSVERSION),) +ifeq ($(WINTOOL),y) + WSCHEDSRCDIR = ${shell cygpath -w $(SCHEDSRCDIR)} + WARCHSRCDIR = ${shell cygpath -w $(ARCHSRCDIR)} + USRINCLUDES = -usrinc:'.;$(WSCHEDSRCDIR);$(WARCHSRCDIR);$(WARCHSRCDIR)\common' +else + USRINCLUDES = -usrinc:".;$(SCHEDSRCDIR);$(ARCHSRCDIR);$(ARCHSRCDIR)\common" +endif +else +ifeq ($(WINTOOL),y) + CFLAGS += -I "${shell cygpath -w $(SCHEDSRCDIR)}" +ifeq ($(CONFIG_ARCH_SIM),y) + CFLAGS += -I "${shell cygpath -w $(ARCHSRCDIR)}" +else + CFLAGS += -I "${shell cygpath -w $(ARCHSRCDIR)$(DELIM)chip}" + CFLAGS += -I "${shell cygpath -w $(ARCHSRCDIR)$(DELIM)common}" +ifneq ($(CONFIG_ARCH_FAMILY),) + CFLAGS += -I "${shell cygpath -w $(ARCHSRCDIR)$(DELIM)$(CONFIG_ARCH_FAMILY)}" +endif +endif +else + CFLAGS += -I$(SCHEDSRCDIR) +ifeq ($(CONFIG_ARCH_SIM),y) + CFLAGS += -I$(ARCHSRCDIR) +else + CFLAGS += -I$(ARCHSRCDIR)$(DELIM)chip + CFLAGS += -I$(ARCHSRCDIR)$(DELIM)common +ifneq ($(CONFIG_ARCH_FAMILY),) + CFLAGS += -I$(ARCHSRCDIR)$(DELIM)$(CONFIG_ARCH_FAMILY) +endif +endif +endif +endif + +ifneq ($(ZDSVERSION),) +INCLUDES = $(ARCHSTDINCLUDES) $(USRINCLUDES) +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(INCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +endif + +all: libboard$(LIBEXT) + +ifneq ($(ZDSVERSION),) +$(ASRCS) $(HEAD_ASRC): %$(ASMEXT): %.S +ifeq ($(WINTOOL),y) + $(Q) $(CPP) $(CPPFLAGS) `cygpath -w $<` -o $@.tmp +else + $(Q) $(CPP) $(CPPFLAGS) $< -o $@.tmp +endif + $(Q) cat $@.tmp | sed -e "s/^#/;/g" > $@ + $(Q) rm $@.tmp +endif + +$(AOBJS): %$(OBJEXT): %$(ASMEXT) + $(call ASSEMBLE, $<, $@) + +$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +libboard$(LIBEXT): $(OBJS) + $(Q) $(AR) $@ # Create an empty archive +ifneq ($(OBJS),) + $(call ARCHIVE, $@, $(OBJS)) +endif + +.depend: Makefile $(SRCS) +ifneq ($(ZDSVERSION),) + $(Q) $(MKDEP) "$(CC)" -- $(CFLAGS) -- $(SRCS) >Make.dep +else + $(Q) $(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep +endif + $(Q) touch $@ + +depend: .depend + +clean: + $(call DELFILE, libboard$(LIBEXT)) + $(call CLEAN) + +distclean: clean + $(call DELFILE, Make.dep) + $(call DELFILE, .depend) + +-include Make.dep diff --git a/configs/Kconfig b/configs/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f69f0055ea91329d0e4ad2ccfe7414cbf2da0167 --- /dev/null +++ b/configs/Kconfig @@ -0,0 +1,1962 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +choice + prompt "Select target board" + default ARCH_BOARD_CUSTOM + ---help--- + Select the board hosting the architecture. You must first select the + exact MCU part number, then the boards supporting that part will + be available for selection. Use ARCH_BOARD_CUSTOM to create a new + board configuration. + +config ARCH_BOARD_AMBER + bool "Amber Web Server" + depends on ARCH_CHIP_ATMEGA128 + ---help--- + This is placeholder for the SoC Robotics Amber Web Server that is based + on the Atmel AVR ATMega128 MCU. There is not much there yet and what is + there is untested due to tool-related issues. + +config ARCH_BOARD_ARDUINO_MEGA2560 + bool "Arduino Mega 2560" + depends on ARCH_CHIP_ATMEGA2560 + ---help--- + This option selects the Arduino Mega 2560 board featuring the Atmel + Atmega2560 MCU running at 16 MHz. + +config ARCH_BOARD_ARDUINO_DUE + bool "Arduino Due" + depends on ARCH_CHIP_ATSAM3X8E + select ARCH_HAVE_LEDS + ---help--- + This options selects the Arduino DUE board featuring the Atmel + ATSAM3X8E MCU running at 84 MHz. + +config ARCH_BOARD_AVR32DEV1 + bool "Atmel AVR32DEV1 board" + depends on ARCH_CHIP_AT32UC3B0256 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This is a port of NuttX to the Atmel AVR32DEV1 board. That board is + based on the Atmel AT32UC3B0256 MCU and uses a specially patched + version of the GNU toolchain: The patches provide support for the + AVR32 family. That patched GNU toolchain is available only from the + Atmel website. STATUS: This port is functional but very basic. There + are configurations for NSH and the OS test. + +config ARCH_BOARD_C5471EVM + bool "Spectrum Digital C5471 evaluation board" + depends on ARCH_CHIP_C5471 + select ARCH_HAVE_LEDS + ---help--- + This is a port to the Spectrum Digital C5471 evaluation board. The + TMS320C5471 is a dual core processor from TI with an ARM7TDMI general + purpose processor and a c54 DSP. It is also known as TMS320DA180 or just DA180. + NuttX runs on the ARM core and is built with a GNU arm-nuttx-elf toolchain*. + This port is complete and verified. + +config ARCH_BOARD_CLOUDCTRL + bool "Darcy's CloudController stm32f10x board" + depends on ARCH_CHIP_STM32F107VC + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + Small network relay development board. Based on the Shenzhou IV development + board design. + +config ARCH_BOARD_COMPALE86 + bool "Compal e86 phone" + depends on ARCH_CHIP_CALYPSO + ---help--- + This configuration enables board support for Compal e86 phone. + This port derives from the Compal E88 port and was provided by Craig + Comstock. + +config ARCH_BOARD_COMPALE88 + bool "Compal e88 phone" + depends on ARCH_CHIP_CALYPSO + ---help--- + This configuration enables board support for compal e88 phone. + This ports is based on patches contributed by Denis Carikli for both the + compal e99 and e88. The patches were made by Alan Carvalho de Assis and + Denis Carikli using the Stefan Richter's Osmocom-bb patches. + +config ARCH_BOARD_COMPALE99 + bool "Compal e99 phone" + depends on ARCH_CHIP_CALYPSO + ---help--- + This configuration enables board support for compal e88 and e99 phones. + This port is based on patches contributed by Denis Carikli for both the + compal e99 and e88. The patches were made by Alan Carvalho de Assis and + Denis Carikli using the Stefan Richter's Osmocom-bb patches. + +config ARCH_BOARD_DEMOS92S12NEC64 + bool "Freescale DMO9S12NE64 board" + depends on ARCH_CHIP_MCS92S12NEC64 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + ---help--- + Freescale DMO9S12NE64 board based on the MC9S12NE64 hcs12 cpu. This + port uses the m9s12x GCC toolchain. STATUS: (Still) under development; it + is code complete but has not yet been verified. + +config ARCH_BOARD_DK_TM4C129X + bool "Tiva DK-TM4C129x Connected Development Kit" + depends on ARCH_CHIP_TM4C129XNC + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + Tiva DK-TM4C129x Connected Development Kit featuring the + TM4C129XNCZAD MCU. + +config ARCH_BOARD_EA3131 + bool "Embedded Artists EA3131 Development board" + depends on ARCH_CHIP_LPC3131 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + ---help--- + Embedded Artists EA3131 Development board. This board is based on the + an NXP LPC3131 MCU. This OS is built with the arm-nuttx-elf toolchain*. + STATUS: This port is complete and mature. + +config ARCH_BOARD_EA3152 + bool "Embedded Artists EA3152 Development board" + depends on ARCH_CHIP_LPC3152 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + ---help--- + Embedded Artists EA3152 Development board. This board is based on the + an NXP LPC3152 MCU. This OS is built with the arm-nuttx-elf toolchain*. + STATUS: This port is has not be exercised well, but since it is + a simple derivative of the ea3131, it should be fully functional. + +config ARCH_BOARD_EAGLE100 + bool "Micromint Eagle-100 Development board" + depends on ARCH_CHIP_LM3S6918 + select ARCH_HAVE_LEDS + ---help--- + Micromint Eagle-100 Development board. This board is based on the + an ARM Cortex-M3 MCU, the Luminary LM3S6918. This OS is built with the + arm-nuttx-elf toolchain*. STATUS: This port is complete and mature. + +config ARCH_BOARD_EFM32G8XXSTK + bool "EFM32 Gecko Starter Kit" + depends on ARCH_CHIP_EFM32G890F128 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + ---help--- + This option selects the EFM32 Gecko Starter Kit (EFM32-G8XX-STK). + +config ARCH_BOARD_EFM32GG_STK3700 + bool "EFM32 Giant Gecko Starter Kit" + depends on ARCH_CHIP_EFM32GG990F1024 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + ---help--- + This option selects the EFM32 Giant Gecko Starter Kit (EFM32GG-STK3700). + +config ARCH_BOARD_EKKLM3S9B96 + bool "TI/Stellaris EKK-LM3S9B96" + depends on ARCH_CHIP_LM3S9B96 + select ARCH_HAVE_LEDS + ---help--- + TI/Stellaris EKK-LM3S9B96 board. This board is based on the + an EKK-LM3S9B96 which is a Cortex-M3. + +config ARCH_BOARD_EZ80F910200KITG + bool "ZiLOG ez80f910200kitg development kit" + depends on ARCH_CHIP_EZ80F91 + select ARCH_HAVE_LEDS + ---help--- + ez80Acclaim! Microcontroller. This port use the ZiLOG ez80f910200kitg + development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line + tools. The development environment is Cygwin under WinXP. + +config ARCH_BOARD_EZ80F910200ZCO + bool "ZiLOG ez80f910200zco development kit" + depends on ARCH_CHIP_EZ80F91 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + ---help--- + ez80Acclaim! Microcontroller. This port use the Zilog ez80f910200zco + development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line + tools. The development environment is Cygwin under WinXP. + +config ARCH_BOARD_FIRE_STM32 + bool "M3 Wildfire STM32 board" + depends on ARCH_CHIP_STM32F103VE + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + Support for the M3 Wildfire STM32 board. This board is based on the + STM32F103VET6 chip. See http://firestm32.taobao.com . Version 2 + and 3 of the boards are supported but only version 2 has been + tested. + +config ARCH_BOARD_FREEDOM_KL25Z + bool "Freescale Freedom KL25Z" + depends on ARCH_CHIP_MKL25Z128 + select ARCH_HAVE_LEDS + ---help--- + This is the configuration for the Freescale Freedom KL25Z board. This + board has the K25Z120LE3AN chip with a built-in SDA debugger. + +config ARCH_BOARD_FREEDOM_KL26Z + bool "Freescale Freedom KL26Z" + depends on ARCH_CHIP_MKL26Z128 + select ARCH_HAVE_LEDS + ---help--- + This is the configuration for the Freescale Freedom KL26Z board. This + board has the K26Z128VLH4 chip with a built-in SDA debugger. + +config ARCH_BOARD_HYMINI_STM32V + bool "HY-Mini STM32v board" + depends on ARCH_CHIP_STM32F103VC + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + A configuration for the HY-Mini STM32v board. This board is based on the + STM32F103VCT6 chip. + +config ARCH_BOARD_LINCOLN60 + bool "Micromint Lincoln 60 board" + depends on ARCH_CHIP_LPC1769 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + Micromint Lincoln 60 board using the NXP LPC1769 MCU. + +config ARCH_BOARD_KWIKSTIK_K40 + bool "FreeScale KwikStik-K40 development board" + depends on ARCH_CHIP_MK40X256VLQ100 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + Kinetis K40 Cortex-M4 MCU. This port uses the FreeScale KwikStik-K40 + development board. + +config ARCH_BOARD_LAUNCHXL_TMS57004 + bool "TI LaunchXL-TMS57004" + depends on ARCH_CHIP_TMS570LS0432PZ + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + TI Hercules TMS570LS04x/03x LaunchPad Evaluation Kit (LAUNCHXL- + TMS57004) featuring the Hercules TMS570LS0432PZ chip. + +config ARCH_BOARD_LM3S6432S2E + bool "Stellaris RDK-S2E Reference Design Kit" + depends on ARCH_CHIP_LM3S6432 + select ARCH_HAVE_LEDS + ---help--- + Stellaris RDK-S2E Reference Design Kit and the MDL-S2E Ethernet to + Serial module. + +config ARCH_BOARD_LM3S6965EK + bool "Stellaris LM3S6965 Evaluation Kit" + depends on ARCH_CHIP_LM3S6965 + select ARCH_HAVE_LEDS + ---help--- + Stellaris LM3S6965 Evaluation Kit. This board is based on the + an ARM Cortex-M3 MCU, the Luminary/TI LM3S6965. This OS is built with the + arm-nuttx-elf toolchain*. STATUS: This port is complete and mature. + +config ARCH_BOARD_LM3S8962EK + bool "Stellaris LMS38962 Evaluation Kit" + depends on ARCH_CHIP_LM3S8962 + select ARCH_HAVE_LEDS + ---help--- + Stellaris LMS38962 Evaluation Kit. + +config ARCH_BOARD_LM4F120_LAUNCHPAD + bool "Stellaris LM4F120 LaunchPad" + depends on ARCH_CHIP_LM4F120 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + Stellaris LM4F120 LaunchPad. + +config ARCH_BOARD_LPCXPRESSO_LPC1115 + bool "NXP LPCXpresso LPC1115" + depends on ARCH_CHIP_LPC1115 + select ARCH_HAVE_LEDS + ---help--- + The Embedded Artists LPCXpresso LPC1115 board featuring the NXP + LPC1115 MCU. + +config ARCH_BOARD_LPCXPRESSO + bool "NXP LPCExpresso LPC1768" + depends on ARCH_CHIP_LPC1768 + select ARCH_HAVE_LEDS + ---help--- + Embedded Artists base board with NXP LPCExpresso LPC1768. This board + is based on the NXP LPC1768. The Code Red toolchain is used by default. + +config ARCH_BOARD_LPC4330_XPLORER + bool "NXG LPC4330-Xplorer" + depends on ARCH_CHIP_LPC4330FET100 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + NXG Technologies LPC4330 Xplorer board. This board is based on the + LPC4330FET100. The Code Red toolchain is used by default. + +config ARCH_BOARD_LPC4337_WS + bool "WaveShare LPC4337-WS" + depends on ARCH_CHIP_LPC4337JBD144 + ---help--- + The WaveShare LPC4337-ws board featuring the NXP LPC4337JBD144 MCU. + +config ARCH_BOARD_LPC4357_EVB + bool "NXP LPC4357-EVB" + depends on ARCH_CHIP_LPC4357FET256 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + NXP Technologies LPC4357 EVB board. This board is based on the + LPC4357FET256. + +config ARCH_BOARD_LPC4370_LINK2 + bool "NXP LPC4370-Link2" + depends on ARCH_CHIP_LPC4370FET100 + select ARCH_HAVE_LEDS + ---help--- + NXP LPC4370 Link2 board. This board is based on the + LPC4370FET100. The Code Red toolchain is used by default. + +config ARCH_BOARD_MBED + bool "mbed LCP1768" + depends on ARCH_CHIP_LPC1768 + select ARCH_HAVE_LEDS + ---help--- + The configurations in this directory support the mbed board (http://mbed.org) + that features the NXP LPC1768 microcontroller. This OS is also built + with the arm-nuttx-elf toolchain*. STATUS: Contributed. + +config ARCH_BOARD_MCU123_LPC214X + bool "mcu123.com LPC2148 Development Board" + depends on ARCH_CHIP_LPC214X + select ARCH_HAVE_LEDS + ---help--- + This port is for the NXP LPC2148 as provided on the mcu123.com + lpc214x development board. This OS is also built with the arm-nuttx-elf + toolchain*. The port supports serial, timer0, spi, and usb. + +config ARCH_BOARD_MICROPENDOUS3 + bool "Opendous Micropendous 3 board" + depends on ARCH_CHIP_AT90USB646 || ARCH_CHIP_AT90USB647 || ARCH_CHIP_AT90USB1286 || ARCH_CHIP_AT90USB1287 + ---help--- + This is a port to the Opendous Micropendous 3 board. This board may + be populated with either an AVR AT90USB646, 647, 1286, or 1287 MCU. + Support is configured for the AT90USB647. + +config ARCH_BOARD_MOTEINO_MEGA + bool "LowPowerLab MoteinoMEGA" + depends on ARCH_CHIP_ATMEGA1284P + select ARCH_HAVE_LEDS + ---help--- + This is placeholder for the LowPowerLab MoteinoMEGA that is based + on the Atmel AVR ATMega1284P MCU. There is not much there yet and what is + there is untested due to tool-related issues. + +config ARCH_BOARD_MX1ADS + bool "Motorola MX1ADS development board" + depends on ARCH_CHIP_IMX1 + select ARCH_HAVE_LEDS + ---help--- + This is a port to the Motorola MX1ADS development board. That board + is based on the Freescale i.MX1 processor. The i.MX1 is an ARM920T. + STATUS: This port is nearly code complete but was never fully + integrated due to tool-related issues. + +config ARCH_BOARD_NE64BADGE + bool "FEG NE64 /PoE Badge board" + depends on ARCH_CHIP_MCS92S12NEC64 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + ---help--- + Future Electronics Group NE64 /PoE Badge board based on the + MC9S12NE64 hcs12 cpu. This port uses the m9s12x GCC toolchain. + STATUS: Under development. The port is code-complete but has + not yet been fully tested. + +config ARCH_BOARD_NTOSD_DM320 + bool "Neuros OSD v1.0 Dev Board" + depends on ARCH_CHIP_DM320 + select ARCH_HAVE_LEDS + ---help--- + This port uses the Neuros OSD v1.0 Dev Board with a GNU arm-nuttx-elf + toolchain*: see + + http://wiki.neurostechnology.com/index.php/OSD_1.0_Developer_Home + + There are some differences between the Dev Board and the currently + available commercial v1.0 Boards. See + + http://wiki.neurostechnology.com/index.php/OSD_Developer_Board_v1 + + NuttX operates on the ARM9EJS of this dual core processor. + STATUS: This port is code complete, verified, and included in the + NuttX 0.2.1 release. + +config ARCH_BOARD_NUCLEUS2G + bool "Nucleus 2G board" + depends on ARCH_CHIP_LPC1768 + select ARCH_HAVE_LEDS + ---help--- + This port uses the Nucleus 2G board (with Babel CAN board). This board + features an NXP LPC1768 processor. See the 2G website (http://www.2g-eng.com/) + for more information about the Nucleus 2G. + +config ARCH_BOARD_LPC1766STK + bool "Olimex LPC1766-STK board" + depends on ARCH_CHIP_LPC1766 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This port uses the Olimex LPC1766-STK board and a GNU GCC toolchain* under + Linux or Cygwin. STATUS: Complete and mature. + +config ARCH_BOARD_MAPLE + bool "maple board" + depends on ARCH_CHIP_STM32F103RB || ARCH_CHIP_STM32F103CB + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + A configuration for the LeafLab's Maple and Maple Mini boards. + These boards are based on the STM32F103RBT6 chip for the standard + version and on the STM32F103CBT6 for the mini version + (See http://leaflabs.com/docs/hardware/maple.html) + +config ARCH_BOARD_MIRTOO + bool "Mirtoo PIC32 Module from Dimitech" + depends on ARCH_CHIP_PIC32MX250F128D + select ARCH_HAVE_LEDS + ---help--- + This is the port to the DTX1-4000L "Mirtoo" module. This module uses MicroChip + PIC32MX250F128D. See http://www.dimitech.com/ for further information. + +config ARCH_BOARD_NUTINY_NUC120 + bool "Nuvoton NuTiny NUC120" + depends on ARCH_CHIP_NUC120LE3AN + select ARCH_HAVE_LEDS + ---help--- + This is the port to the Nuvoton NuTiny EVB 120 board. This board uses a + Nuvoton NUC120 chip, specifically the NUC120LE3AN. See http://www.nuvoton.com/ + for further information. + +config ARCH_BOARD_OLIMEX_EFM32G880F128_STK + bool "Olimex EFM32G880F128 STK" + depends on ARCH_CHIP_EFM32G880F128 + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This options selects the Olimex EFM32G880F128 STK + +config ARCH_BOARD_OLIMEXLPC2378 + bool "Olimex-lpc2378 board" + depends on ARCH_CHIP_LPC2378 + select ARCH_HAVE_LEDS + ---help--- + This port uses the Olimex-lpc2378 board and a GNU arm-nuttx-elf toolchain* under + Linux or Cygwin. STATUS: ostest and NSH configurations available. + This port for the NXP LPC2378 was contributed by Rommel Marcelo. + +config ARCH_BOARD_OLIMEX_LPC_H3131 + bool "Olimex LPC-H3131 Development board" + depends on ARCH_CHIP_LPC3131 + select ARCH_HAVE_LEDS + ---help--- + Olimex LPC-H3131 development board. This board is based on the the + NXP LPC3131 MCU. + +config ARCH_BOARD_OLIMEX_STRP711 + bool "Olimex STR-P711 board" + depends on ARCH_CHIP_STR71X + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + ---help--- + This port uses the Olimex STR-P711 board and a GNU arm-nuttx-elf toolchain* under + Linux or Cygwin. See the http://www.olimex.com/dev/str-p711.html" for + further information. STATUS: Configurations for the basic OS test and NSH + are complete and verified. + +config ARCH_BOARD_OLIMEX_STM32H405 + bool "Olimex STM32 H405 board" + depends on ARCH_CHIP_STM32F405RG + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This port uses the Olimex STM32 H405 board and a GNU arm-nuttx-elf + toolchain* under Linux or Cygwin. See the http://www.olimex.com for + further information. This board features the STMicro STM32F405RGT6 + MCU. + +config ARCH_BOARD_OLIMEX_STM32H407 + bool "Olimex STM32 H407 board" + depends on ARCH_CHIP_STM32F407ZG + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This port uses the Olimex STM32 H407 board and a GNU arm-nuttx-elf + toolchain* under Linux or Cygwin. See the http://www.olimex.com for + further information. This board features the STMicro STM32F407ZGT6 (144pins). + +config ARCH_BOARD_OLIMEX_STM32P107 + bool "Olimex STM32 P107 board" + depends on ARCH_CHIP_STM32F107VC + ---help--- + This port uses the Olimex STM32 P107 board and a GNU arm-nuttx-elf toolchain* under + Linux or Cygwin. See the http://www.olimex.com for further information. This + board features the STMicro STM32F107VC MCU + +config ARCH_BOARD_OLIMEX_STM32P207 + bool "Olimex STM32 P207 board" + depends on ARCH_CHIP_STM32F207ZE + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This port uses the Olimex STM32 P207 board and a GNU arm-nuttx-elf + toolchain under Linux or Cygwin. See the http://www.olimex.com for + further information. This board features the STMicro STM32F207ZE MCU + +config ARCH_BOARD_OLIMEXINO_STM32 + bool "Olimexino STM32 board" + depends on ARCH_CHIP_STM32F103RB + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This port uses the Olimexino STM32 board and a GNU arm-nuttx-elf + toolchain under Linux or Cygwin. See the http://www.olimex.com for + further information. This board features the STMicro STM32F103RBT6 MCU. + Contribued by David Sidrane. + +config ARCH_BOARD_OPEN1788 + bool "Wave Share Open1788" + depends on ARCH_CHIP_LPC1788 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This port uses the Wave Share Open1788 board. See the + http://wvshare.com/product/Open1788-Standard.htm for further + information. This board features the NXP LPC1788 MCU + +config ARCH_BOARD_P112 + bool "P112 Z180-based platform" + depends on ARCH_CHIP_Z8018216FSG + ---help--- + The P112 is notable because it was the first of the hobbyist single board + computers to reach the production stage. The P112 hobbyist computers + were relatively widespread and inspired other hobbyist centered home brew + computing projects such as N8VEM home brew computing project. The P112 + project still maintains many devoted enthusiasts and has an online + repository of software and other information. + + The P112 computer originated as a commercial product of "D-X Designs Pty + Ltd" of Australia. They describe the computer as "The P112 is a stand-alone + 8-bit CPU board. Typically running CP/M (tm) or a similar operating system, + it provides a Z80182 (Z-80 upgrade) CPU with up to 1MB of memory, serial, + parallel and diskette IO, and realtime clock, in a 3.5-inch drive form factor. + Powered solely from 5V, it draws 150mA (nominal: not including disk drives) + with a 16MHz CPU clock. Clock speeds up to 24.576MHz are possible." + + The P112 board was last available new in 1996 by Dave Brooks. In late 2004 + on the Usenet Newsgroup comp.os.cpm, talk about making another run of P112 + boards was discussed. David Griffith decided to produce additional P112 kits + with Dave Brooks blessing and the assistance of others. In addition Terry + Gulczynski makes additional P112 derivative hobbyist home brew computers. + Hal Bower was very active in the mid 1990's on the P112 project and ported + the "Banked/Portable BIOS". + +config ARCH_BOARD_PCBLOGICPIC32MX + bool "PIC32MX board from PCB Logic Design Co" + depends on ARCH_CHIP_PIC32MX460F512L + ---help--- + This is the port of NuttX to the PIC32MX board from PCB Logic Design Co. + This board features the MicroChip PIC32MX460F512L. + The board is a very simple -- little more than a carrier for the PIC32 + MCU plus voltage regulation, debug interface, and an OTG connector. + STATUS: Code complete but testing has been stalled due to tool related problems + (PICkit 2 does not work with the PIC32). + +config ARCH_BOARD_PCDUINO_A10 + bool "pcDuino A10" + depends on ARCH_CHIP_A10 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This is the port of NuttX to the Allwinner A10-based pcDuino v1 + board. See http://www.pcduino.com/ for information about pcDuino Lite, v1, + and v2. I have not compared these boards in detail, but I believe that + the differences are cosmetic. This port was developed on the v1 board, + but the others may be compatible. + +config ARCH_BOARD_PIC32MX_STARTERKIT + bool "Microchip PIC32MX Ethernet Starter Kit (DM320004)" + depends on ARCH_CHIP_PIC32MX795F512L + select ARCH_HAVE_LEDS + ---help--- + This is the port of NuttX to the Microchip PIC32 Ethernet Starter Kit + (DM320004) with the Multimedia Expansion Board (MEB, DM320005). + See www.microchip.com for further information. + +config ARCH_BOARD_PIC32MX7MMB + bool "Mikroelektronika PIC32MX7 MMB" + depends on ARCH_CHIP_PIC32MX795F512L + select ARCH_HAVE_LEDS + ---help--- + This is the port NuttX to the Mikroelektronika PIC32MX7 Multimedia Board + (MMB). See http://www.mikroe.com/ for further information. + +config ARCH_BOARD_PIC32MZ_STARTERKIT + bool "Microchip PIC32MZ Ethernet Starter Kit ((DM320006)" + depends on ARCH_CHIP_PIC32MZ2048ECH || ARCH_CHIP_PIC32MZ2048ECM + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS if PIC32MZ_GPIOIRQ_PORTB + ---help--- + This is the port of NuttX to the Microchip PIC32MZ Embedded + Connectivity (EC) Starter Kit. There are two configurations of the + starter kit: + + 1) The PIC32MZ Embedded Connectivity Starter Kit based on the + PIC32MZ2048ECH144-I/PH chip (DM320006), and + 2) The PIC32MZ Embedded Connectivity Starter Kit based on the + PIC32MZ2048ECM144-I/PH w/Crypto Engine (DM320006-C) + + See www.microchip.com for further information. + +config ARCH_BOARD_PIRELLI_DPL10 + bool "Pirelli DPL10 phone" + depends on ARCH_CHIP_CALYPSO + ---help--- + This directory contains the board support for Pirelli dpl10 phones. The + additions were made by Craig Comstock (with help form Alan Carvalho de Assis). + +config ARCH_BOARD_NUCLEO_F303RE + bool "STM32F303 Nucleo F303RE" + depends on ARCH_CHIP_STM32F303RE + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro Nucleo F303RE board based on the STMicro STM32F303RET6 MCU. + +config ARCH_BOARD_NUCLEO_F401RE + bool "STM32F401 Nucleo F401RE" + depends on ARCH_CHIP_STM32F401RE + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This is a minimal configuration that supports low-level test of the + Nucleo F401RE in the NuttX source tree. + +config ARCH_BOARD_NUCLEO_F411RE + bool "STM32F411 Nucleo F411RE" + depends on ARCH_CHIP_STM32F411RE + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This is a minimal configuration that supports low-level test of the + Nucleo F411RE in the NuttX source tree. + +config ARCH_BOARD_NUCLEO_L476RG + bool "STM32L476 Nucleo L476RG" + depends on ARCH_CHIP_STM32L476RG + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro Nucleo L476RG board based on the STMicro STM32L476RGT6 MCU. + +config ARCH_BOARD_QEMU_I486 + bool "Qemu i486 Mode" + depends on ARCH_X86 || ARCH_I486 + ---help--- + Port of NuttX to QEMU in i486 mode. This port will also run on real i486 + hardwared (Google the Bifferboard). + +config ARCH_BOARD_RGMP + bool "RGMP" + depends on ARCH_RGMP + ---help--- + RGMP stands for RTOS and GPOS on Multi-Processor. RGMP is a project for + running GPOS and RTOS simultaneously on multi-processor platforms. You can + port your favorite RTOS to RGMP together with an unmodified Linux to form a + hybrid operating system. This makes your application able to use both RTOS + and GPOS features. + + See http://rgmp.sourceforge.net/wiki/index.php/Main_Page for further information + about RGMP. + +config ARCH_BOARD_SABRE_6QUAD + bool "NXP/Freescale i.MX6 Sabre-6Quad board" + depends on ARCH_CHIP_IMX6_6QUAD + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This options selects support for NuttX on the NXP/Freescale Sabre + board featuring the iMX 6Quad CPU. + +config ARCH_BOARD_SAMA5D2_XULT + bool "Atmel SAMA5D2 Xplained Ultra development board" + depends on ARCH_CHIP_ATSAMA5D27 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + The port of NuttX to the Atmel SAMA5D2-XULT development board + +config ARCH_BOARD_SAMA5D3X_EK + bool "Atmel SAMA5D3x-EK development board" + depends on ARCH_CHIP_ATSAMA5D31 || ARCH_CHIP_ATSAMA5D33 || ARCH_CHIP_ATSAMA5D34 || ARCH_CHIP_ATSAMA5D35 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + select ARCH_PHY_INTERRUPT if NETDEVICES + ---help--- + The port of NuttX to the Atmel SAMA5D3x-EK development board (where x=1,3,4, or 5). + +config ARCH_BOARD_SAMA5D3_XPLAINED + bool "Atmel SAMA5D3 Xplained development board" + depends on ARCH_CHIP_ATSAMA5D36 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + select ARCH_PHY_INTERRUPT if NETDEVICES + ---help--- + The port of NuttX to the Atmel SAMA5D3 Xplained development board. + +config ARCH_BOARD_SAMA5D4_EK + bool "Atmel SAMA5D4-EK development board" + depends on ARCH_CHIP_ATSAMA5D44 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + select ARCH_PHY_INTERRUPT if NETDEVICES + ---help--- + The port of NuttX to the Atmel SAMA5D4-EK development board + +config ARCH_BOARD_SAMD20_XPLAINED + bool "Atmel SAMD20-Xplained Pro development board" + depends on ARCH_CHIP_SAMD20J18 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + The port of NuttX to the Atmel SAMD20-Xplained Pro development board. + This board features the ATSAMD20J18A MCU (Cortex-M0+ with 256KB of FLASH + and 32KB of SRAM). + +config ARCH_BOARD_SAMD21_XPLAINED + bool "Atmel SAMD21-Xplained Pro development board" + depends on ARCH_CHIP_SAMD21J18A + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + The port of NuttX to the Atmel SAMD21-Xplained Pro development board. + This board features the ATSAMD21J18A MCU (Cortex-M0+ with 256KB of FLASH + and 32KB of SRAM). + +config ARCH_BOARD_SAML21_XPLAINED + bool "Atmel SAML21-Xplained Pro development board" + depends on ARCH_CHIP_SAML21J18 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + The port of NuttX to the Atmel SAML21-Xplained Pro development board. + This board features the ATSAML21J18A MCU (Cortex-M0+ with 256KB of FLASH + and 32KB of SRAM). + +config ARCH_BOARD_SAM3UEK + bool "Atmel SAM3U-EK development board" + depends on ARCH_CHIP_ATSAM3U4E + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + The port of NuttX to the Atmel SAM3U-EK development board. + +config ARCH_BOARD_SAM4EEK + bool "Atmel SAM4E-EK development board" + depends on ARCH_CHIP_ATSAM4E16E + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + select ARCH_PHY_INTERRUPT if NETDEVICES + ---help--- + The port of NuttX to the Atmel SAM4E-EK development board. This + board features the SAM4E16 MCU running at up to 120MHz. + +config ARCH_BOARD_SAM4L_XPLAINED + bool "Atmel SAM4L-Xplained Pro development board" + depends on ARCH_CHIP_ATSAM4LC4C + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + The port of NuttX to the Atmel SAM4L-Xplained Pro development board. + +config ARCH_BOARD_SAM4S_XPLAINED + bool "Atmel SAM4S-Xplained development board" + depends on ARCH_CHIP_ATSAM4S16C + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + The port of NuttX to the Atmel SAM4S-Xplained development board. + +config ARCH_BOARD_SAM4S_XPLAINED_PRO + bool "Atmel SAM4S-Xplained Pro development board" + depends on ARCH_CHIP_ATSAM4SD32C + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + The port of NuttX to the Atmel SAM4S-Xplained Pro development board. + +config ARCH_BOARD_SAME70_XPLAINED + bool "Atmel SAME70 Xplained evaluation board" + depends on ARCH_CHIP_SAME70Q21 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + select ARCH_PHY_INTERRUPT if NETDEVICES + ---help--- + The port of NuttX to the Atmel SAME70 Xplained evaluation board. + +config ARCH_BOARD_SAMV71_XULT + bool "Atmel SAMV71 Xplained Ultra evaluation board" + depends on ARCH_CHIP_SAMV71Q21 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + select ARCH_PHY_INTERRUPT if NETDEVICES + ---help--- + The port of NuttX to the Atmel SAMV71 Xplained Ultra evaluation board. + +config ARCH_BOARD_SHENZHOU + bool "Shenzhou STM32F107 board" + depends on ARCH_CHIP_STM32F107VC + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This port uses the Shenzhou STM32 F107 board and a GNU arm-nuttx-elf toolchain* under + Linux or Cygwin. See the http://www.armjishu.com for further information. This + board features the STMicro STM32F107VC MCU + +config ARCH_BOARD_SKP16C26 + bool "Renesas SKP16C26 StarterKit" + depends on ARCH_CHIP_M30262F8 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + ---help--- + Renesas M16C processor on the Renesas SKP16C26 StarterKit. This port + uses the GNU m32c toolchain. STATUS: The port is complete but untested + due to issues with compiler internal errors. + +config ARCH_BOARD_SPARK + bool "Spark Core" + depends on ARCH_CHIP_STM32F103CB + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + A configuration for the Spark Core from Spark Devices + (http://www.spark.io). This board features the STM32103CBT6 + MCU from STMicro. + +config ARCH_BOARD_STM32_TINY + bool "STM32-Tiny board" + depends on ARCH_CHIP_STM32F103C8 + select ARCH_HAVE_LEDS + ---help--- + A configuration for the STM32 Tiny board. This board is based on a + STM32F103C8T6 micro-controller chip, and is (always ?) bundled with + an nRF24L01+ wireless module. + +config ARCH_BOARD_STM3210E_EVAL + bool "STMicro STM3210E-EVAL development board" + depends on ARCH_CHIP_STM32F103ZE + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro STM3210E-EVAL development board based on the STMicro STM32F103ZET6 + microcontroller (ARM Cortex-M3). This port uses the GNU Cortex-M3 + toolchain. + +config ARCH_BOARD_STM3220G_EVAL + bool "STMicro STM3220G-EVAL development board" + depends on ARCH_CHIP_STM32F207IG + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro STM3220G-EVAL development board based on the STMicro STM32F407IG + microcontroller (ARM Cortex-M3). + +config ARCH_BOARD_STM3240G_EVAL + bool "STMicro STM3240G-EVAL development board" + depends on ARCH_CHIP_STM32F407IG + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro STM3240G-EVAL development board based on the STMicro STM32F103ZET6 + microcontroller (ARM Cortex-M4 with FPU). This port uses a GNU Cortex-M4 + toolchain (such as CodeSourcery). + +config ARCH_BOARD_STM32F3_DISCOVERY + bool "STMicro STM32F3-Discovery board" + depends on ARCH_CHIP_STM32F303VC + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro STM32F3-Discovery board based on the STMicro STM32F303VCT6 MCU. + +config ARCH_BOARD_STM32F4_DISCOVERY + bool "STMicro STM32F4-Discovery board" + depends on ARCH_CHIP_STM32F407VG + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro STM32F4-Discovery board based on the STMicro STM32F407VGT6 MCU. + +config ARCH_BOARD_STM32F429I_DISCO + bool "STMicro STM32F429I-Discovery board" + depends on ARCH_CHIP_STM32F429Z + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro STM32F429I-Discovery board based on the STMicro STM32F429ZIT6 MCU. + +config ARCH_BOARD_STM32F746G_DISCO + bool "STMicro STM32F746G-Discovery board" + depends on ARCH_CHIP_STM32F746 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6 + MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash + memory and 300Kb SRAM. + +config ARCH_BOARD_STM32L476VG_DISCO + bool "STMicro STM32F746VG-Discovery board" + depends on ARCH_CHIP_STM32L476RG + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro STM32L476VG_DISCO development board featuring the STM32L476VG + MCU. The STM32L476VG is a Cortex-M4 optimised for low-power operation + at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM. + +config ARCH_BOARD_STM32L_DISCOVERY + bool "STMicro STM32L-Discovery board" + depends on ARCH_CHIP_STM32L152RB + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro STM32L-Discovery board based on the STMicro STM32L152RB MCU. + +config ARCH_BOARD_STM32VL_DISCOVERY + bool "STMicro STM32VL-Discovery board" + depends on ARCH_CHIP_STM32F100RB + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro STM32VL-Discovery board based on the STMicro STM32F100RB MCU. + +config ARCH_BOARD_MIKROE_STM32F4 + bool "MikroElektronika Mikromedia for STM32F4 board" + depends on ARCH_CHIP_STM32F407VG + ---help--- + This is the port NuttX to the Mikroelektronika Mikromedia for STM32F4 Multimedia Board + (MMB). See http://www.mikroe.com/ for further information. + +config ARCH_BOARD_SUREPIC32MX + bool "Sure PIC32MX boards" + depends on ARCH_CHIP_PIC32MX440F512H + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + The "Advanced USB Storage Demo Board," Model DB-DP11215, from Sure + Electronics (http://www.sureelectronics.net/). This board features + the MicroChip PIC32MX440F512H. See also + http://www.sureelectronics.net/goods.php?id=1168 for further + information about the Sure DB-DP11215 board. + +config ARCH_BOARD_TEENSY_20 + bool "PJRC Teensy++ 2.0 board" + depends on ARCH_CHIP_AT90USB1286 + select ARCH_HAVE_LEDS + ---help--- + This is the port of NuttX to the PJRC Teensy++ 2.0 board. This board is + developed by http://pjrc.com/teensy/. The Teensy++ 2.0 is based + on an Atmel AT90USB1286 MCU. + +config ARCH_BOARD_TEENSY_3X + bool "PJRC Teensy++ 3.1 board" + depends on ARCH_CHIP_MK20DX256VLH7 || ARCH_CHIP_MK20DX128VLH5 + select ARCH_HAVE_LEDS + ---help--- + This is the port of NuttX to the PJRC Teensy++ 2.0 board. This board is + developed by http://pjrc.com/teensy/. The Teensy++ 2.0 is based + on an Atmel AT90USB1286 MCU. + + This is the port of NuttX to the Teensy-3.1 from PJRC + (https://www.pjrc.com/). The Teensy-3.1 features the Freescale + MK30DX256VLH7 chip (now NXP). The MK30DX256VLH7 is a 64-pin Cortex-M4 + running at 72MHz. It has 256KiB of program FLASH memory and 64KiB of + SRAM. For more information about the Teensy 3.1, see + + https://www.pjrc.com/teensy/teensy31.html + https://www.pjrc.com/store/teensy31.html + + This board configuration can also be used with the older Teensy-3.0. The + Teensy-3.0 has the same schematic (although some pins are not used on the + Teensy-3.0). the primary difference is that the Teensy 3.0 has a + MK20DX128VLH5 with slightly less capability. + +config ARCH_BOARD_TEENSY_LC + bool "Teensy LC" + depends on ARCH_CHIP_MKL25Z64 + select ARCH_HAVE_LEDS + ---help--- + This is the configuration for the Teensy LC board. + See https://www.pjrc.com/teensy/teensyLC.html. The + Teensy LC is based on the Freescale KL25Z. + +config ARCH_BOARD_TM4C123G_LAUNCHPAD + bool "Tiva TM4C123G LaunchPad" + depends on ARCH_CHIP_TM4C123GH6PMI + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + Tiva TM4C123G LaunchPad. + +config ARCH_BOARD_TM4C1294_LAUNCHPAD + bool "Tiva EK-TM4C1294XL LaunchPad" + depends on ARCH_CHIP_TM4C1294NC + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + ---help--- + Tiva EK-TM4C1294XL LaunchPad. + +config ARCH_BOARD_CC3200_LAUNCHPAD + bool "Tiva CC3200 Launchpad" + depends on ARCH_CHIP_CC3200 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + select TIVA_BOARD_EARLYINIT + ---help--- + Tiva CC3200 Launchpad. + +config ARCH_BOARD_TWR_K60N512 + bool "FreeScale TWR-K60N512d evelopment board" + depends on ARCH_CHIP_MK60N512VMD100 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + Kinetis K60 Cortex-M4 MCU. This port uses the FreeScale TWR-K60N512 + development board. + +config ARCH_BOARD_U_BLOX_C027 + bool "u-blox C027" + depends on ARCH_CHIP_LPC1768 + select ARCH_HAVE_LEDS + ---help--- + u-blox GSM and GPS module evaluation board with NXP LPCExpresso + LPC1768. The GSM module is one of LISA-C200, LISA-U200 or SARA-G350. + The GPS module is one of MAX-M7 or MAX-M8. + +config ARCH_BOARD_UBW32 + bool "UBW32 v2.4 board from Sparkfun" + depends on ARCH_CHIP_PIC32MX460F512L + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This is the port to the Sparkfun UBW32 board. This port uses the original v2.4 + board which is based on the MicroChip PIC32MX460F512L. See + http://www.sparkfun.com/products/8971. This older version has been replaced + with this board http://www.sparkfun.com/products/9713. See also + http://www.schmalzhaus.com/UBW32/. + +config ARCH_BOARD_US7032EVB1 + bool "Hitachi SH-1/US7032EVB1 board" + depends on ARCH_CHIP_SH7032 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + ---help--- + This is a port of the Hitachi SH-1 on the Hitachi SH-1/US7032EVB1 board. + STATUS: Work has just began on this port. + +config ARCH_BOARD_VIEWTOOL_STM32F107 + bool "ViewTool STM32F103/F107" + depends on ARCH_CHIP_STM32F107VC || ARCH_CHIP_STM32F103VC + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + ---help--- + This port uses the ViewTool STM32F103/F107 V1.2 board. This + board may be fitted with either: (1) STM32F107VCT6 or (2) STM32F103VCT6. + See http://www.viewtool.com/ for further information. + +config ARCH_BOARD_XTRS + bool "XTRS TRS80 Model 3 emulation" + depends on ARCH_CHIP_Z80 + select ARCH_HAVE_UART + ---help--- + TRS80 Model 3. This port uses a vintage computer based on the Z80. + An emulator for this computer is available to run TRS80 programs on a + linux platform (http://www.tim-mann.org/xtrs.html). + +config ARCH_BOARD_Z16F2800100ZCOG + bool "Zilog Z16F2800100ZCOG Development Kit" + depends on ARCH_CHIP_Z16F2811 + select ARCH_HAVE_LEDS + ---help--- + z16f Microcontroller. This port use the ZiLIG z16f2800100zcog + development kit and the Zilog ZDS-II Windows command line tools. The + development environment is Cygwin under WinXP. + +config ARCH_BOARD_Z80SIM + bool "Z80 Instruction Set Simulator" + depends on ARCH_CHIP_Z80 + select ARCH_HAVE_UART + ---help--- + z80 Microcontroller. This port uses a Z80 instruction set simulator + called z80sim. This port also uses the SDCC toolchain + (http://sdcc.sourceforge.net/") (verified with version 2.6.0). + +config ARCH_BOARD_Z8ENCORE000ZCO + bool "ZiLOG Z8ENCORE000ZCO Development Kit" + depends on ARCH_CHIP_Z8F6403 + select ARCH_HAVE_LEDS + ---help--- + z8Encore! Microcontroller. This port use the ZiLOG Z8ENCORE000ZCO + development kit, Z8F6403 part, and the Zilog ZDS-II Windows command line + tools. The development environment is Cygwin under WinXP. + +config ARCH_BOARD_Z8F64200100KIT + bool "ZiLOG Z8F64200100KIT Development Kit" + depends on ARCH_CHIP_Z8F6423 + select ARCH_HAVE_LEDS + ---help--- + z8Encore! Microcontroller. This port use the Zilog Z8F64200100KIT + development kit, Z8F6423 part, and the Zilog ZDS-II Windows command line + tools. The development environment is Cygwin under WinXP. + +config ARCH_BOARD_ZP214XPA + bool "The0.net LPC2148 Development Board" + depends on ARCH_CHIP_LPC214X + ---help--- + This port is for the NXP LPC2148 as provided on the The0.net + ZPA213X/4XPA development board. Includes support for the + UG-2864AMBAG01 OLED also from The0.net + +config ARCH_BOARD_ZKITARM + bool "Zilogic ZKit-ARM-1769 Development Kit" + depends on ARCH_CHIP_LPC1768 + select ARCH_HAVE_LEDS + ---help--- + Zilogic System's ARM development Kit, ZKIT-ARM-1769. This board is based + on the NXP LPC1769. The Nuttx Buildroot toolchain is used by default. + +config ARCH_BOARD_SIM + bool "User mode simulation" + depends on ARCH_SIM + ---help--- + A user-mode port of NuttX to the x86 Linux/Cygwin platform is available. + The purpose of this port is primarily to support OS feature development. + This port does not support interrupts or a real timer (and hence no + round robin scheduler) Otherwise, it is complete. + +config ARCH_BOARD_CUSTOM + bool "Custom development board" + ---help--- + Select this option if there is no directory for the board under configs/. + + Don't see the board you want? You must first select the exact MCU part + number, then the boards supporting that part will be available for selection. + +config ARCH_BOARD_MOXA + bool "Moxa board" + depends on ARCH_CHIP_MOXART + ---help--- + Moxa + +endchoice + +if ARCH_BOARD_CUSTOM +menu "Custom Board Configuration" + +config ARCH_BOARD_CUSTOM_NAME + string "Custom board name" + default "" + ---help--- + This is a name for the board. It is not used except to return the + information via the NSH uname command. + +config ARCH_BOARD_CUSTOM_DIR + string "Custom board directory" + ---help--- + If the custom board configuration is selected, then it is necessary + to also tell the build system where it can find the board directory + for the custom board. + + In this case, the board directory is assume to lie outside the the + NuttX directory. The provided path must then be a full, absolute + path to some location outside of the NuttX source tree (like + "~/projects/myboard"). + +config ARCH_BOARD_CUSTOM_DIR_RELPATH + bool "Relative custom board directory" + ---help--- + Specifies that the board directory is relative to the NuttX directory. + +config BOARD_CRASHDUMP + bool "Enable Board level logging of crash dumps" + default n + ---help--- + If selected up_asseert will call out to board_crashdump, in the case + of an assertion failure, prior to calling exit. Or in the + case of a hardfault prior to looping indefinitely. board_crashdump + then has a chance to save the state of the machine. + + The purpose of board_crashdump is to save as much information as it can + about the cause of the fault and then most likely reset the system. + + N.B. There is limited system resources that can be used, who knows + what memory is trashed? So all we can expect to do is save the + "machine state" in a place where on the next reset can write it + to more sophisticated storage in a sane operating environment. + +config BOARD_RESET_ON_CRASH + bool "Eanble Board Reset after the crashdump is saved" + default n + depends on BOARD_CRASHDUMP + ---help--- + If selected the board_crashdump should reset the machine after + saveing the state of the machine + +config BOARD_CUSTOM_LEDS + bool "Custom board LEDs" + default n + select ARCH_HAVE_LEDS + select ARCH_LEDS + +config BOARD_CUSTOM_BUTTONS + bool "Custom board buttons" + default n + select ARCH_HAVE_BUTTONS + select ARCH_BUTTONS + +config BOARD_CUSTOM_IRQBUTTONS + bool "Custom Board IRQ buttons" + default n + depends on BOARD_CUSTOM_BUTTONS + select ARCH_HAVE_IRQBUTTONS + select ARCH_IRQBUTTONS + +config BOARD_CUSTOM_INTERRUPT + bool "Custom board PHY interrupts" + default n + depends on NETDEVICES + select ARCH_PHY_INTERRUPT if NETDEVICES + +endmenu # Custom Board Configuration +endif #ARCH_BOARD_CUSTOM + +config ARCH_BOARD + string + default "amber" if ARCH_BOARD_AMBER + default "arduino-mega2560" if ARCH_BOARD_ARDUINO_MEGA2560 + default "arduino-due" if ARCH_BOARD_ARDUINO_DUE + default "avr32dev1" if ARCH_BOARD_AVR32DEV1 + default "c5471evm" if ARCH_BOARD_C5471EVM + default "cloudctrl" if ARCH_BOARD_CLOUDCTRL + default "compal_e86" if ARCH_BOARD_COMPALE86 + default "compal_e88" if ARCH_BOARD_COMPALE88 + default "compal_e99" if ARCH_BOARD_COMPALE99 + default "demo9s12ne64" if ARCH_BOARD_DEMOS92S12NEC64 + default "dk-tm4c129x" if ARCH_BOARD_DK_TM4C129X + default "ea3131" if ARCH_BOARD_EA3131 + default "ea3152" if ARCH_BOARD_EA3152 + default "eagle100" if ARCH_BOARD_EAGLE100 + default "efm32-g8xx-stk" if ARCH_BOARD_EFM32G8XXSTK + default "efm32gg-stk3700" if ARCH_BOARD_EFM32GG_STK3700 + default "ekk-lm3s9b96" if ARCH_BOARD_EKKLM3S9B96 + default "ez80f910200kitg" if ARCH_BOARD_EZ80F910200KITG + default "ez80f910200zco" if ARCH_BOARD_EZ80F910200ZCO + default "fire-stm32v2" if ARCH_BOARD_FIRE_STM32 + default "freedom-kl25z" if ARCH_BOARD_FREEDOM_KL25Z + default "freedom-kl26z" if ARCH_BOARD_FREEDOM_KL26Z + default "hymini-stm32v" if ARCH_BOARD_HYMINI_STM32V + default "kwikstik-k40" if ARCH_BOARD_KWIKSTIK_K40 + default "launchxl-tms57004" if ARCH_BOARD_LAUNCHXL_TMS57004 + default "lincoln60" if ARCH_BOARD_LINCOLN60 + default "lm3s6432-s2e" if ARCH_BOARD_LM3S6432S2E + default "lm3s6965-ek" if ARCH_BOARD_LM3S6965EK + default "lm3s8962-ek" if ARCH_BOARD_LM3S8962EK + default "lm4f120-launchpad" if ARCH_BOARD_LM4F120_LAUNCHPAD + default "lpc4330-xplorer" if ARCH_BOARD_LPC4330_XPLORER + default "lpc4337-ws" if ARCH_BOARD_LPC4337_WS + default "lpc4357-evb" if ARCH_BOARD_LPC4357_EVB + default "lpc4370-link2" if ARCH_BOARD_LPC4370_LINK2 + default "lpcxpresso-lpc1115" if ARCH_BOARD_LPCXPRESSO_LPC1115 + default "lpcxpresso-lpc1768" if ARCH_BOARD_LPCXPRESSO + default "maple" if ARCH_BOARD_MAPLE + default "mbed" if ARCH_BOARD_MBED + default "mcu123-lpc214x" if ARCH_BOARD_MCU123_LPC214X + default "micropendous3" if ARCH_BOARD_MICROPENDOUS3 + default "mirtoo" if ARCH_BOARD_MIRTOO + default "moteino-mega" if ARCH_BOARD_MOTEINO_MEGA + default "mx1ads" if ARCH_BOARD_MX1ADS + default "ne64badge" if ARCH_BOARD_NE64BADGE + default "ntosd-dm320" if ARCH_BOARD_NTOSD_DM320 + default "nucleus2g" if ARCH_BOARD_NUCLEUS2G + default "nutiny-nuc120" if ARCH_BOARD_NUTINY_NUC120 + default "olimex-efm32g880f128-stk" if ARCH_BOARD_OLIMEX_EFM32G880F128_STK + default "olimex-lpc1766stk" if ARCH_BOARD_LPC1766STK + default "olimex-lpc2378" if ARCH_BOARD_OLIMEXLPC2378 + default "olimex-lpc-h3131" if ARCH_BOARD_OLIMEX_LPC_H3131 + default "olimex-stm32-h405" if ARCH_BOARD_OLIMEX_STM32H405 + default "olimex-stm32-h407" if ARCH_BOARD_OLIMEX_STM32H407 + default "olimex-stm32-p107" if ARCH_BOARD_OLIMEX_STM32P107 + default "olimex-stm32-p207" if ARCH_BOARD_OLIMEX_STM32P207 + default "olimex-strp711" if ARCH_BOARD_OLIMEX_STRP711 + default "olimexino-stm32" if ARCH_BOARD_OLIMEXINO_STM32 + default "open1788" if ARCH_BOARD_OPEN1788 + default "p112" if ARCH_BOARD_P112 + default "pcblogic-pic32mx" if ARCH_BOARD_PCBLOGICPIC32MX + default "pcduino-a10" if ARCH_BOARD_PCDUINO_A10 + default "pic32mx-starterkit" if ARCH_BOARD_PIC32MX_STARTERKIT + default "pic32mx7mmb" if ARCH_BOARD_PIC32MX7MMB + default "pic32mz-starterkit" if ARCH_BOARD_PIC32MZ_STARTERKIT + default "pirelli_dpl10" if ARCH_BOARD_PIRELLI_DPL10 + default "nucleo-f303re" if ARCH_BOARD_NUCLEO_F303RE + default "nucleo-f4x1re" if ARCH_BOARD_NUCLEO_F401RE || ARCH_BOARD_NUCLEO_F411RE + default "nucleo-l476rg" if ARCH_BOARD_NUCLEO_L476RG + default "qemu-i486" if ARCH_BOARD_QEMU_I486 + default "rgmp" if ARCH_BOARD_RGMP + default "sabre-6quad" if ARCH_BOARD_SABRE_6QUAD + default "sama5d2-xult" if ARCH_BOARD_SAMA5D2_XULT + default "sama5d3x-ek" if ARCH_BOARD_SAMA5D3X_EK + default "sama5d3-xplained" if ARCH_BOARD_SAMA5D3_XPLAINED + default "sama5d4-ek" if ARCH_BOARD_SAMA5D4_EK + default "samd20-xplained" if ARCH_BOARD_SAMD20_XPLAINED + default "samd21-xplained" if ARCH_BOARD_SAMD21_XPLAINED + default "saml21-xplained" if ARCH_BOARD_SAML21_XPLAINED + default "sam3u-ek" if ARCH_BOARD_SAM3UEK + default "sam4e-ek" if ARCH_BOARD_SAM4EEK + default "sam4l-xplained" if ARCH_BOARD_SAM4L_XPLAINED + default "sam4s-xplained" if ARCH_BOARD_SAM4S_XPLAINED + default "sam4s-xplained-pro" if ARCH_BOARD_SAM4S_XPLAINED_PRO + default "same70-xplained" if ARCH_BOARD_SAME70_XPLAINED + default "samv71-xult" if ARCH_BOARD_SAMV71_XULT + default "shenzhou" if ARCH_BOARD_SHENZHOU + default "skp16c26" if ARCH_BOARD_SKP16C26 + default "spark" if ARCH_BOARD_SPARK + default "stm32_tiny" if ARCH_BOARD_STM32_TINY + default "stm3210e-eval" if ARCH_BOARD_STM3210E_EVAL + default "stm3220g-eval" if ARCH_BOARD_STM3220G_EVAL + default "stm3240g-eval" if ARCH_BOARD_STM3240G_EVAL + default "stm32f3discovery" if ARCH_BOARD_STM32F3_DISCOVERY + default "stm32f4discovery" if ARCH_BOARD_STM32F4_DISCOVERY + default "stm32f429i-disco" if ARCH_BOARD_STM32F429I_DISCO + default "stm32f746g-disco" if ARCH_BOARD_STM32F746G_DISCO + default "stm32l476vg-disco" if ARCH_BOARD_STM32L476VG_DISCO + default "stm32ldiscovery" if ARCH_BOARD_STM32L_DISCOVERY + default "stm32vldiscovery" if ARCH_BOARD_STM32VL_DISCOVERY + default "mikroe-stm32f4" if ARCH_BOARD_MIKROE_STM32F4 + default "sure-pic32mx" if ARCH_BOARD_SUREPIC32MX + default "teensy-2.0" if ARCH_BOARD_TEENSY_20 + default "teensy-3.x" if ARCH_BOARD_TEENSY_3X + default "teensy-lc" if ARCH_BOARD_TEENSY_LC + default "tm4c123g-launchpad" if ARCH_BOARD_TM4C123G_LAUNCHPAD + default "tm4c1294-launchpad" if ARCH_BOARD_TM4C1294_LAUNCHPAD + default "cc3200-launchpad" if ARCH_BOARD_CC3200_LAUNCHPAD + default "twr-k60n512" if ARCH_BOARD_TWR_K60N512 + default "u-blox-c027" if ARCH_BOARD_U_BLOX_C027 + default "ubw32" if ARCH_BOARD_UBW32 + default "us7032evb1" if ARCH_BOARD_US7032EVB1 + default "viewtool-stm32f107" if ARCH_BOARD_VIEWTOOL_STM32F107 + default "xtrs" if ARCH_BOARD_XTRS + default "z16f2800100zcog" if ARCH_BOARD_Z16F2800100ZCOG + default "z80sim" if ARCH_BOARD_Z80SIM + default "z8encore000zco" if ARCH_BOARD_Z8ENCORE000ZCO + default "z8f64200100kit" if ARCH_BOARD_Z8F64200100KIT + default "zp214xpa" if ARCH_BOARD_ZP214XPA + default "zkit-arm-1769" if ARCH_BOARD_ZKITARM + default "sim" if ARCH_BOARD_SIM + default "moxa" if ARCH_BOARD_MOXA + +comment "Common Board Options" + +config ARCH_HAVE_LEDS + bool + +config ARCH_LEDS + bool "Board LED support" + default y + depends on ARCH_HAVE_LEDS + ---help--- + Use board LEDs to show NuttX execution status state. Unique to boards that have LEDs + +config ARCH_HAVE_BUTTONS + bool + +config ARCH_BUTTONS + bool "Board button support" + default n + depends on ARCH_HAVE_BUTTONS + ---help--- + "Support interfaces to use buttons provided by the board." + +config ARCH_HAVE_IRQBUTTONS + bool + +config ARCH_IRQBUTTONS + bool "Button interrupt support" + default n + depends on ARCH_BUTTONS && ARCH_HAVE_IRQBUTTONS + ---help--- + "Support interrupts on button presses and releases." + +config NSH_MMCSDMINOR + int "MMC/SD minor number" + default 0 + depends on NSH_LIBRARY && MMCSD + ---help--- + If board-specific NSH start-up logic needs to mount an MMC/SD device, then the + setting should be provided to identify the MMC/SD minor device number (i.e., the N ini + /dev/mmcsdN). Default 0 + +config NSH_MMCSDSLOTNO + int "MMC/SD slot number" + default 0 + depends on NSH_LIBRARY && MMCSD + ---help--- + If board-specific NSH start-up supports more than one MMC/SD slot, then this setting + should be provided to indicate which slot should be used. Default: 0. + +config NSH_MMCSDSPIPORTNO + int "MMC/SD SPI device number" + default 0 + depends on NSH_LIBRARY && MMCSD && MMCSD_SPI + ---help--- + If board-specif NSH start-up logic will mount an SPI-based MMC/SD volume, then this + setting may be needed to tell the board logic which SPI bus to use. Default: 0 + (meaning is board-specific). + +comment "Board-Specific Options" + +if ARCH_BOARD_AMBER +source "configs/amber/Kconfig" +endif +if ARCH_BOARD_ARDUINO_MEGA2560 +source "configs/arduino-mega2560/Kconfig" +endif +if ARCH_BOARD_ARDUINO_DUE +source "configs/arduino-due/Kconfig" +endif +if ARCH_BOARD_AVR32DEV1 +source "configs/avr32dev1/Kconfig" +endif +if ARCH_BOARD_C5471EVM +source "configs/c5471evm/Kconfig" +endif +if ARCH_BOARD_CLOUDCTRL +source "configs/cloudctrl/Kconfig" +endif +if ARCH_BOARD_COMPALE86 +source "configs/compal_e86/Kconfig" +endif +if ARCH_BOARD_COMPALE88 +source "configs/compal_e88/Kconfig" +endif +if ARCH_BOARD_COMPALE99 +source "configs/compal_e99/Kconfig" +endif +if ARCH_BOARD_DEMOS92S12NEC64 +source "configs/demo9s12ne64/Kconfig" +endif +if ARCH_BOARD_DK_TM4C129X +source "configs/dk-tm4c129x/Kconfig" +endif +if ARCH_BOARD_EA3131 +source "configs/ea3131/Kconfig" +endif +if ARCH_BOARD_EA3152 +source "configs/ea3152/Kconfig" +endif +if ARCH_BOARD_EAGLE100 +source "configs/eagle100/Kconfig" +endif +if ARCH_BOARD_EFM32G8XXSTK +source "configs/efm32-g8xx-stk/Kconfig" +endif +if ARCH_BOARD_EFM32GG_STK3700 +source "configs/efm32gg-stk3700/Kconfig" +endif +if ARCH_BOARD_EKKLM3S9B96 +source "configs/ekk-lm3s9b96/Kconfig" +endif +if ARCH_BOARD_EZ80F910200KITG +source "configs/ez80f910200kitg/Kconfig" +endif +if ARCH_BOARD_EZ80F910200ZCO +source "configs/ez80f910200zco/Kconfig" +endif +if ARCH_BOARD_FIRE_STM32 +source "configs/fire-stm32v2/Kconfig" +endif +if ARCH_BOARD_FREEDOM_KL25Z +source "configs/freedom-kl25z/Kconfig" +endif +if ARCH_BOARD_FREEDOM_KL26Z +source "configs/freedom-kl26z/Kconfig" +endif +if ARCH_BOARD_HYMINI_STM32V +source "configs/hymini-stm32v/Kconfig" +endif +if ARCH_BOARD_KWIKSTIK_K40 +source "configs/kwikstik-k40/Kconfig" +endif +if ARCH_BOARD_LAUNCHXL_TMS57004 +source "configs/launchxl-tms57004/Kconfig" +endif +if ARCH_BOARD_LINCOLN60 +source "configs/lincoln60/Kconfig" +endif +if ARCH_BOARD_LM3S6432S2E +source "configs/lm3s6432-s2e/Kconfig" +endif +if ARCH_BOARD_LM3S6965EK +source "configs/lm3s6965-ek/Kconfig" +endif +if ARCH_BOARD_LM3S8962EK +source "configs/lm3s8962-ek/Kconfig" +endif +if ARCH_BOARD_LM3S8962EK +source "configs/lm4f120-launchpad/Kconfig" +endif +if ARCH_BOARD_LPC4330_XPLORER +source "configs/lpc4330-xplorer/Kconfig" +endif +if ARCH_BOARD_LPC4337_WS +source "configs/lpc4337-ws/Kconfig" +endif +if ARCH_BOARD_LPC4357_EVB +source "configs/lpc4357-evb/Kconfig" +endif +if ARCH_BOARD_LPC4370_LINK2 +source "configs/lpc4370-link2/Kconfig" +endif +if ARCH_BOARD_LPCXPRESSO +source "configs/lpcxpresso-lpc1768/Kconfig" +endif +if ARCH_BOARD_MAPLE +source "configs/maple/Kconfig" +endif +if ARCH_BOARD_MBED +source "configs/mbed/Kconfig" +endif +if ARCH_BOARD_MCU123_LPC214X +source "configs/mcu123-lpc214x/Kconfig" +endif +if ARCH_BOARD_MICROPENDOUS3 +source "configs/micropendous3/Kconfig" +endif +if ARCH_BOARD_MIKROE_STM32F4 +source "configs/mikroe-stm32f4/Kconfig" +endif +if ARCH_BOARD_MIRTOO +source "configs/mirtoo/Kconfig" +endif +if ARCH_BOARD_MOTEINO_MEGA +source "configs/moteino-mega/Kconfig" +endif +if ARCH_BOARD_MX1ADS +source "configs/mx1ads/Kconfig" +endif +if ARCH_BOARD_NE64BADGE +source "configs/ne64badge/Kconfig" +endif +if ARCH_BOARD_NTOSD_DM320 +source "configs/ntosd-dm320/Kconfig" +endif +if ARCH_BOARD_NUCLEUS2G +source "configs/nucleus2g/Kconfig" +endif +if ARCH_BOARD_NUTINY_NUC120 +source "configs/nutiny-nuc120/Kconfig" +endif +if ARCH_BOARD_OLIMEX_EFM32G880F128_STK +source "configs/olimex-efm32g880f128-stk/Kconfig" +endif +if ARCH_BOARD_LPC1766STK +source "configs/olimex-lpc1766stk/Kconfig" +endif +if ARCH_BOARD_OLIMEXLPC2378 +source "configs/olimex-lpc2378/Kconfig" +endif +if ARCH_BOARD_OLIMEX_LPC_H3131 +source "configs/olimex-lpc-h3131/Kconfig" +endif +if ARCH_BOARD_OLIMEX_STM32H405 +source "configs/olimex-stm32-h405/Kconfig" +endif +if ARCH_BOARD_OLIMEX_STM32H407 +source "configs/olimex-stm32-h407/Kconfig" +endif +if ARCH_BOARD_OLIMEX_STM32P107 +source "configs/olimex-stm32-p107/Kconfig" +endif +if ARCH_BOARD_OLIMEX_STM32P207 +source "configs/olimex-stm32-p207/Kconfig" +endif +if ARCH_BOARD_OLIMEX_STRP711 +source "configs/olimex-strp711/Kconfig" +endif +if ARCH_BOARD_OLIMEXINO_STM32 +source "configs/olimexino-stm32/Kconfig" +endif +if ARCH_BOARD_OPEN1788 +source "configs/open1788/Kconfig" +endif +if ARCH_BOARD_PCBLOGICPIC32MX +source "configs/pcblogic-pic32mx/Kconfig" +endif +if ARCH_BOARD_PCDUINO_A10 +source "configs/pcduino-a10/Kconfig" +endif +if ARCH_BOARD_PIC32MX_STARTERKIT +source "configs/pic32mx-starterkit/Kconfig" +endif +if ARCH_BOARD_PIC32MX7MMB +source "configs/pic32mx7mmb/Kconfig" +endif +if ARCH_BOARD_PIC32MZ_STARTERKIT +source "configs/pic32mz-starterkit/Kconfig" +endif +if ARCH_BOARD_PIRELLI_DPL10 +source "configs/pirelli_dpl10/Kconfig" +endif +if ARCH_BOARD_NUCLEO_F303RE +source "configs/nucleo-f303re/Kconfig" +endif +if ARCH_BOARD_NUCLEO_F401RE || ARCH_BOARD_NUCLEO_F411RE +source "configs/nucleo-f4x1re/Kconfig" +endif +if ARCH_BOARD_NUCLEO_L476RG +source "configs/nucleo-l476rg/Kconfig" +endif +if ARCH_BOARD_QEMU_I486 +source "configs/qemu-i486/Kconfig" +endif +if ARCH_BOARD_RGMP +source "configs/rgmp/Kconfig" +endif +if ARCH_BOARD_SABRE_6QUAD +source "configs/sabre-6quad/Kconfig" +endif +if ARCH_BOARD_SAMA5D2_XULT +source "configs/sama5d2-xult/Kconfig" +endif +if ARCH_BOARD_SAMA5D3X_EK +source "configs/sama5d3x-ek/Kconfig" +endif +if ARCH_BOARD_SAMA5D3_XPLAINED +source "configs/sama5d3-xplained/Kconfig" +endif +if ARCH_BOARD_SAMA5D4_EK +source "configs/sama5d4-ek/Kconfig" +endif +if ARCH_BOARD_SAMD20_XPLAINED +source "configs/samd20-xplained/Kconfig" +endif +if ARCH_BOARD_SAMD21_XPLAINED +source "configs/samd21-xplained/Kconfig" +endif +if ARCH_BOARD_SAML21_XPLAINED +source "configs/saml21-xplained/Kconfig" +endif +if ARCH_BOARD_SAM3UEK +source "configs/sam3u-ek/Kconfig" +endif +if ARCH_BOARD_SAM4EEK +source "configs/sam4e-ek/Kconfig" +endif +if ARCH_BOARD_SAM4L_XPLAINED +source "configs/sam4l-xplained/Kconfig" +endif +if ARCH_BOARD_SAM4S_XPLAINED +source "configs/sam4s-xplained/Kconfig" +endif +if ARCH_BOARD_SAM4S_XPLAINED_PRO +source "configs/sam4s-xplained-pro/Kconfig" +endif +if ARCH_BOARD_SAME70_XPLAINED +source "configs/same70-xplained/Kconfig" +endif +if ARCH_BOARD_SAMV71_XULT +source "configs/samv71-xult/Kconfig" +endif +if ARCH_BOARD_SHENZHOU +source "configs/shenzhou/Kconfig" +endif +if ARCH_BOARD_SKP16C26 +source "configs/skp16c26/Kconfig" +endif +if ARCH_BOARD_SPARK +source "configs/spark/Kconfig" +endif +if ARCH_BOARD_STM32_TINY +source "configs/stm32_tiny/Kconfig" +endif +if ARCH_BOARD_STM3210E_EVAL +source "configs/stm3210e-eval/Kconfig" +endif +if ARCH_BOARD_STM3220G_EVAL +source "configs/stm3220g-eval/Kconfig" +endif +if ARCH_BOARD_STM3240G_EVAL +source "configs/stm3240g-eval/Kconfig" +endif +if ARCH_BOARD_STM32F4_DISCOVERY +source "configs/stm32f4discovery/Kconfig" +endif +if ARCH_BOARD_STM32F429I_DISCO +source "configs/stm32f429i-disco/Kconfig" +endif +if ARCH_BOARD_STM32F746G_DISCO +source "configs/stm32f746g-disco/Kconfig" +endif +if ARCH_BOARD_STM32L476VG_DISCO +source "configs/stm32l476vg-disco/Kconfig" +endif +if ARCH_BOARD_STM32L_DISCOVERY +source "configs/stm32ldiscovery/Kconfig" +endif +if ARCH_BOARD_STM32VL_DISCOVERY +source "configs/stm32vldiscovery/Kconfig" +endif +if ARCH_BOARD_SUREPIC32MX +source "configs/sure-pic32mx/Kconfig" +endif +if ARCH_BOARD_TEENSY_20 +source "configs/teensy-2.0/Kconfig" +endif +if ARCH_BOARD_TEENSY_3X +source "configs/teensy-3.x/Kconfig" +endif +if ARCH_BOARD_TEENSY_LC +source "configs/teensy-lc/Kconfig" +endif +if ARCH_BOARD_TM4C123G_LAUNCHPAD +source "configs/tm4c123g-launchpad/Kconfig" +endif +if ARCH_BOARD_TM4C1294_LAUNCHPAD +source "configs/tm4c1294-launchpad/Kconfig" +endif +if ARCH_BOARD_CC3200_LAUNCHPAD +source "configs/cc3200-launchpad/Kconfig" +endif +if ARCH_BOARD_TWR_K60N512 +source "configs/twr-k60n512/Kconfig" +endif +if ARCH_BOARD_U_BLOX_C027 +source "configs/u-blox-c027/Kconfig" +endif +if ARCH_BOARD_UBW32 +source "configs/ubw32/Kconfig" +endif +if ARCH_BOARD_US7032EVB1 +source "configs/us7032evb1/Kconfig" +endif +if ARCH_BOARD_VIEWTOOL_STM32F107 +source "configs/viewtool-stm32f107/Kconfig" +endif +if ARCH_BOARD_XTRS +source "configs/xtrs/Kconfig" +endif +if ARCH_BOARD_Z16F2800100ZCOG +source "configs/z16f2800100zcog/Kconfig" +endif +if ARCH_BOARD_Z80SIM +source "configs/z80sim/Kconfig" +endif +if ARCH_BOARD_Z8ENCORE000ZCO +source "configs/z8encore000zco/Kconfig" +endif +if ARCH_BOARD_Z8F64200100KIT +source "configs/z8f64200100kit/Kconfig" +endif +if ARCH_BOARD_ZP214XPA +source "configs/zp214xpa/Kconfig" +endif +if ARCH_BOARD_ZKITARM +source "configs/zkit-arm-1769/Kconfig" +endif +if ARCH_BOARD_SIM +source "configs/sim/Kconfig" +endif +if ARCH_BOARD_MOXA +source "configs/moxa/Kconfig" +endif + +config LIB_BOARDCTL + bool "Enable boardctl() interface" + default n + ---help--- + Enables support for the boardctl() interface. Architecture + specific logic must provide board_app_initialize() interface. + +if LIB_BOARDCTL + +config BOARDCTL_POWEROFF + bool "Enable power off interfaces" + default n + depends on ARCH_HAVE_POWEROFF + ---help--- + Enables support for the BOARDIOC_POWEROFF boardctl() command. + Architecture specific logic must provide the board_power_off() + interface. + +config BOARDCTL_RESET + bool "Enable reset interfaces" + default n + depends on ARCH_HAVE_RESET + ---help--- + Enables support for the BOARDIOC_RESET boardctl() command. + Architecture specific logic must provide the board_reset() + interface. + +config BOARDCTL_UNIQUEID + bool "Return board unique ID" + default n + ---help--- + Enables support for the BOARDIOC_UNIQUEID boardctl() command. + Architecture specific logic must provide the board_uniqueid() + interface. + +config BOARDCTL_UNIQUEID_SIZE + int "Size of the board unique ID (bytes)" + default 16 + depends on BOARDCTL_UNIQUEID + ---help--- + Provides the size of the memory buffer that must be provided by the + caller of board_uniqueid() in which to receive the board unique ID. + +config BOARDCTL_APP_SYMTAB + bool "Enable application symbol table interfaces" + default n + depends on EXECFUNCS_HAVE_SYMTAB + ---help--- + Enables support for the BOARDIOC_APP_SYMTAB boardctl() command. + +config BOARDCTL_OS_SYMTAB + bool "Enable kernel module symbol table interfaces" + default n + depends on MODULE + ---help--- + Enables support for the BOARDIOC_OS_SYMTAB boardctl() command. + +config BOARDCTL_USBDEVCTRL + bool "Enable USB device controls" + default n + depends on USBDEV + ---help--- + Enables support for the BOARDIOC_USBDEV_CONTROL boardctl() command. + +config BOARDCTL_TSCTEST + bool "Enable touchscreen test interfaces" + default n + ---help--- + Enables support for the BOARDIOC_TSCTEST_SETUP and + BOARDIOC_TSCTEST_TEARDOWN boardctl() commands. Architecture + specific logic must provide board_tsc_setup() and + board_tsc_teardown() interfaces. + +config BOARDCTL_ADCTEST + bool "Enable ADC test interfaces" + default n + ---help--- + Enables support for the BOARDIOC_ADCTEST_SETUP boardctl() command. + Architecture specific logic must provide board_adc_setup() + interface. + +config BOARDCTL_PWMTEST + bool "Enable PWM test interfaces" + default n + ---help--- + Enables support for the BOARDIOC_PWMTEST_SETUP boardctl() command. + Architecture specific logic must provide board_pwm_setup() + interface. + +config BOARDCTL_CANINIT + bool "Enable CAN initialize interface" + default n + depends on CAN + ---help--- + Enables support for the BOARDIOC_CAN_INITIALIZE boardctl() command. + Architecture specific logic must provide board_can_initialize() + interface. + +config BOARDCTL_GRAPHICS + bool "Enable custom graphics initialization interfaces" + default n + ---help--- + Enables support for the BOARDIOC_GRAPHICS_SETUP boardctl() command. + Architecture specific logic must provide board_graphics_setup() + interface. + +config BOARDCTL_IOCTL + bool "Board-specific boardctl() commands" + default n + ---help--- + Enables support for the BOARDIOC_POWEROFF boardctl() command. + Architecture specific logic must provide board_ioctl() interface. + +endif # LIB_BOARDCTL diff --git a/configs/Makefile b/configs/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..4e96cc8dfdb7294401b6cd6e15c9563a306e9801 --- /dev/null +++ b/configs/Makefile @@ -0,0 +1,87 @@ +############################################################################ +# configs/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +# Basic + +CONFIG_ASRCS = +CONFIG_CSRCS = + +# boardctl support + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CONFIG_CSRCS += boardctl.c +endif + +ASRCS = $(CONFIG_ASRCS) +AOBJS = $(ASRCS:.S=$(OBJEXT)) + +CSRCS = $(CONFIG_CSRCS) +COBJS = $(CSRCS:.c=$(OBJEXT)) + +SRCS = $(ASRCS) $(CSRCS) +OBJS = $(AOBJS) $(COBJS) + +BIN = libconfigs$(LIBEXT) + +all: $(BIN) + +$(AOBJS): %$(OBJEXT): %.S + $(call ASSEMBLE, $<, $@) + +$(COBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +$(BIN): $(OBJS) + $(call ARCHIVE, $@, $(OBJS)) + +.depend: Makefile $(SRCS) +ifneq ($(SRCS),) + $(Q) $(MKDEP) --dep-path . "$(CC)" -- $(CFLAGS) -- $(SRCS) >Make.dep +endif + $(Q) touch $@ + +depend: .depend + +clean: + $(call DELFILE, $(BIN)) + $(call CLEAN) + +distclean: clean + $(call DELFILE, Make.dep) + $(call DELFILE, .depend) + +-include Make.dep \ No newline at end of file diff --git a/configs/README.txt b/configs/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..ebd2a78bb5e5317adee695b60fa842be79faeb04 --- /dev/null +++ b/configs/README.txt @@ -0,0 +1,813 @@ +Board-Specific Configurations +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +This directory contains the board support for logic for all boards supported +by NuttX. This directory is retained in a separate repository and is a Sub- +Module of NuttX and will appear as nuttx/configs when the NuttX repository +is cloned. + +The nuttx/configs directory is a part of the internal OS. It there should +contain only OS bring-up logic and driver initialization logic. THERE SHOULD +BE NO APPLICATION CALLABLE LOGIC IN THIS DIRECTORY. + +If you have board-specific, application callable logic, that logic should not +go here. Please consider using a sub-directory under apps/platform instead. + +Table of Contents +^^^^^^^^^^^^^^^^^ + + o Board-Specific Configurations + o Summary of Files + o Configuration Variables + o Supported Boards + o Configuring NuttX + o Building Symbol Tables + +Board-Specific Configurations +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +The NuttX configuration consists of: + +o Processor architecture specific files. These are the files contained + in the arch// directory. + +o Chip/SoC specific files. Each processor processor architecture + is embedded in chip or System-on-a-Chip (SoC) architecture. The + full chip architecture includes the processor architecture plus + chip-specific interrupt logic, general purpose I/O (GIO) logic, and + specialized, internal peripherals (such as UARTs, USB, etc.). + + These chip-specific files are contained within chip-specific + sub-directories in the arch// directory and are selected + via the CONFIG_ARCH_name selection + +o Board specific files. In order to be usable, the chip must be + contained in a board environment. The board configuration defines + additional properties of the board including such things as + peripheral LEDs, external peripherals (such as network, USB, etc.). + + These board-specific configuration files can be found in the + configs// sub-directories and are discussed in this + README. Additional configuration information maybe available in + board-specific configs//README.txt files. + +The configs/ subdirectory contains configuration data for each board. These +board-specific configurations plus the architecture-specific configurations in +the arch/ subdirectory completely define a customized port of NuttX. + +Directory Structure +^^^^^^^^^^^^^^^^^^^ + +The configs directory contains board specific configurationlogic. Each +board must provide a subdirectory under configs/ with the +following characteristics: + + + + |-- README.txt + |-- include/ + | `-- (board-specific header files) + |-- src/ + | |-- Makefile + | `-- (board-specific source files) + |-- + | |-- Make.defs + | |-- defconfig + | `-- setenv.sh + |-- + | |-- Make.defs + | |-- defconfig + | `-- setenv.sh + ... + +Summary of Files +^^^^^^^^^^^^^^^^ + +README.txt -- This text file provides additional information unique to + each board configuration sub-directory. + +include/ -- This directory contains board specific header files. This + directory will be linked as include/arch/board at configuration time and + can be included via '#include '. These header file + can only be included by files in arch/include/ and + arch//src + +src/ -- This directory contains board specific drivers. This + directory will be linked as arch//src/board at configuration + time and will be integrated into the build system. + +src/Makefile -- This makefile will be invoked to build the board specific + drivers. It must support the following targets: libext$(LIBEXT), clean, + and distclean. + +A board may have various different configurations using these common source +files. Each board configuration is described by three files: Make.defs, +defconfig, and setenv.sh. Typically, each set of configuration files is +retained in a separate configuration sub-directory (, +, .. in the above diagram). + +Make.defs -- This makefile fragment provides architecture and + tool-specific build options. It will be included by all other + makefiles in the build (once it is installed). This make fragment + should define: + + Tools: CC, LD, AR, NM, OBJCOPY, OBJDUMP + Tool options: CFLAGS, LDFLAGS + + When this makefile fragment runs, it will be passed TOPDIR which + is the path to the root directory of the build. This makefile + fragment should include: + + $(TOPDIR)/.config : Nuttx configuration + $(TOPDIR)/tools/Config.mk : Common definitions + + Definitions in the Make.defs file probably depend on some of the + settings in the .config file. For example, the CFLAGS will most likely be + different if CONFIG_DEBUG=y. + + The included tools/Config.mk file contains additional definitions that may + be overriden in the architecture-specific Make.defs file as necessary: + + COMPILE, ASSEMBLE, ARCHIVE, CLEAN, and MKDEP macros + +defconfig -- This is a configuration file similar to the Linux + configuration file. In contains variable/value pairs like: + + CONFIG_VARIABLE=value + + This configuration file will be used at build time: + + (1) as a makefile fragment included in other makefiles, and + (2) to generate include/nuttx/config.h which is included by + most C files in the system. + +setenv.sh -- This is a script that you can include that will be installed at + the toplevel of the directory structure and can be sourced to set any + necessary environment variables. You will most likely have to customize the + default setenv.sh script in order for it to work correctly in your + environment. + +Configuration Variables +^^^^^^^^^^^^^^^^^^^^^^^ + +At one time, this section provided a list of all NuttX configuration +variables. However, NuttX has since converted to use the kconfig-frontends +tools (See http://ymorin.is-a-geek.org/projects/kconfig-frontends). Now, +the NuttX configuration is determined by a self-documenting set of Kconfig +files. + +The current NuttX configuration variables are also documented in separate, +auto-generated configuration variable document. That configuration variable +document is generated using the kconfig2html tool that can be found in the +nuttx/tools directory. That tool analyzes the NuttX Kconfig files and +generates an excruciatingly boring HTML document. + +The latest boring configuration variable documentation can be regenerated at +any time using that tool or, more appropriately, the wrapper script at +nuttx/tools/mkconfigvars.sh. That script will generate the file +nuttx/Documentation/NuttXConfigVariables.html. + +The version of NuttXConfigVariables.html for the last released version of +NuttX can also be found online at: +http://nuttx.org/Documentation/NuttXConfigVariables.html. + +Supported Boards +^^^^^^^^^^^^^^^^ + +configs/amber + This is placeholder for the SoC Robotics Amber Web Server that is based + on the Atmel AVR ATMega128 MCU. There is not much there yet and what is + there is untested due to tool-related issues. + +configs/arduino-due + This sub-directory holds board support for the Arduino DUE board featuring + the Atmel ATSAM3X8E MCU running at 84 MHz. + +configs/avr32dev1 + This is a port of NuttX to the Atmel AVR32DEV1 board. That board is + based on the Atmel AT32UC3B0256 MCU and uses a specially patched + version of the GNU toolchain: The patches provide support for the + AVR32 family. That patched GNU toolchain is available only from the + Atmel website. STATUS: This port is functional but very basic. There + are configurations for NSH and the OS test. + +configs/c5471evm + This is a port to the Spectrum Digital C5471 evaluation board. The + TMS320C5471 is a dual core processor from TI with an ARM7TDMI general + purpose processor and a c54 DSP. It is also known as TMS320DA180 or just DA180. + NuttX runs on the ARM core and is built with a GNU arm-nuttx-elf toolchain*. + This port is complete and verified. + +configs/cloudctrl + Darcy's CloudController board. This is a small network relay development + board. Based on the Shenzhou IV development board design. It is based on + the STM32F107VC MCU. + +configs/compal_e86, compal_e88 and compal_e99 + These directories contain the board support for compal e86, e88 and e99 phones. + These ports are based on patches contributed by Denis Carikli for both the + compal e99 and e88. The patches were made by Alan Carvalho de Assis and + Denis Carikli using the Stefan Richter's Osmocom-bb patches. The variant + for the e86 was submitted by Craig Comstock. + +configs/demo9s12ne64 + Freescale DMO9S12NE64 board based on the MC9S12NE64 hcs12 cpu. This + port uses the m9s12x GCC toolchain. STATUS: (Still) under development; it + is code complete but has not yet been verified. + +configs/dk-tm4c129x + This is the port of NuttX to the Tiva® DK-TM4C129x Connected Development Kit. The + Tiva® DK-TM4C129x features the TM4C129XNCZAD MCU. + +configs/ea3131 + Embedded Artists EA3131 Development board. This board is based on the + an NXP LPC3131 MCU. This OS is built with the arm-nuttx-elf toolchain*. + STATUS: This port is complete and mature. + +configs/ea3152 + Embedded Artists EA3152 Development board. This board is based on the + an NXP LPC3152 MCU. This OS is built with the arm-nuttx-elf toolchain*. + STATUS: This port is has not be exercised well, but since it is + a simple derivative of the ea3131, it should be fully functional. + +configs/eagle100 + Micromint Eagle-100 Development board. This board is based on the + an ARM Cortex-M3 MCU, the Luminary LM3S6918. This OS is built with the + arm-nuttx-elf toolchain*. STATUS: This port is complete and mature. + +configs/efm32-g8xx-stk + The port of NuttX to the the EFM32 Gecko Starter Kit (EFM32-G8XX-STK). + +configs/efm32gg-stk3700 + The port of NuttX to the the EFM32 Giant Gecko Starter Kit + (EFM32GG-STK3700). + +configs/ekk-lm3s9b96 + TI/Stellaris EKK-LM3S9B96 board. This board is based on the + an EKK-LM3S9B96 which is a Cortex-M3. + +configs/ez80f0910200kitg + ez80Acclaim! Microcontroller. This port use the Zilog ez80f0910200kitg + development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line + tools. The development environment is Cygwin under WinXP. + +configs/ez80f0910200zco + ez80Acclaim! Microcontroller. This port use the Zilog ez80f0910200zco + development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line + tools. The development environment is Cygwin under WinXP. + +configs/fire-stm32v2 + A configuration for the M3 Wildfire STM32 board. This board is based on the + STM32F103VET6 chip. See http://firestm32.taobao.com . Version 2 and 3 of + the boards are supported but only version 2 has been tested. + +configs/freedom-kl25z +configs/freedom-kl26z + These configurations are for the Freescale Freedom KL25Z and very similar + KL26Z board. The Freedom-KL25Z features the K25Z120LE3AN chip; the + Freedom-KL26Z has the K26Z128VLH4 chip. These are separate configurations + because of minor differences in the on-board logic. Both include a + built-in SDA debugger. + +configs/hymini-stm32v + A configuration for the HY-Mini STM32v board. This board is based on the + STM32F103VCT chip. + +configs/kwikstik-k40. + Kinetis K40 Cortex-M4 MCU. This port uses the FreeScale KwikStik-K40 + development board. + +configs/launchxl-tms57004 + TI Hercules TMS570LS04x/03x LaunchPad Evaluation Kit (LAUNCHXL-TMS57004) + featuring the Hercules TMS570LS0432PZ chip. + +configs/lincoln60 + NuttX port to the Micromint Lincoln 60 board. + +configs/lm3s6432-s2e + Stellaris RDK-S2E Reference Design Kit and the MDL-S2E Ethernet to + Serial module. + +configs/lm3s6965-ek + Stellaris LM3S6965 Evaluation Kit. This board is based on the + an ARM Cortex-M3 MCU, the Luminary/TI LM3S6965. This OS is built with the + arm-nuttx-elf toolchain*. STATUS: This port is complete and mature. + +configs/lm3s8962-ek + Stellaris LMS38962 Evaluation Kit. + +configs/lm4f120-launchpad + This is the port of NuttX to the Stellaris LM4F120 LaunchPad. The + Stellaris® LM4F120 LaunchPad Evaluation Board is a low-cost evaluation + platform for ARM® Cortex™-M4F-based microcontrollers from Texas + Instruments. + +configs/lpcxpresso-lpc1115 + NuttX board support for the Embedded Artists LPCXpresso LPC1115 board + featuring the NXP LPC1115 MCU. + +configs/lpcxpresso-lpc1768 + Embedded Artists base board with NXP LPCExpresso LPC1768. This board + is based on the NXP LPC1768. The Code Red toolchain is used by default. + STATUS: Under development. + +configs/lpc4330-xplorer + NuttX port to the LPC4330-Xplorer board from NGX Technologies featuring + the NXP LPC4330FET100 MCU + +configs/lpc4337-ws + NuttX port to the WaveShare LPC4337-ws board featuring the NXP LPC4337JBD144 + MCU. + +configs/lpc4357-evb + NuttX port to the LPC4357-EVB board from Embest featuring the NXP + LPC4357FET256 MCU. Based on the LPC4300 Xplorer port and provided by + Toby Duckworth. + +configs/lpc4370-link2 + NuttX port to the NXP LPC4370-Link2 development board featuring the NXP + LPC4370FET100 MCU. Based on the LPC4300 Xplorer port and provided by + Lok Tep. + +configs/maple + NuttX support for the LeafLab's Maple and Maple Mini boards. These boards + are based on the STM32F103RBT6 chip for the standard version and on the + STM32F103CBT6 for the mini version (See http://leaflabs.com/docs/hardware/maple.html) + +configs/mbed + The configurations in this directory support the mbed board (http://mbed.org) + that features the NXP LPC1768 microcontroller. This OS is also built + with the arm-nuttx-elf toolchain*. STATUS: Contributed. + +configs/mikroe-stm32f4 + This is the port of NuttX to the MikroElektronika Mikromedia for STM32F4 + development board. Contributed by Ken Petit. + +configs/mcu123-lpc214x + This port is for the NXP LPC2148 as provided on the mcu123.com + lpc214x development board. This OS is also built with the arm-nuttx-elf + toolchain*. The port supports serial, timer0, spi, and usb. + +configs/micropendous3 + This is a port to the Opendous Micropendous 3 board. This board may + be populated with either an AVR AT90USB646, 647, 1286, or 1287 MCU. + Support is configured for the AT90USB647. + +configs/mirtoo + This is the port to the DTX1-4000L "Mirtoo" module. This module uses MicroChip + PIC32MX250F128D. See http://www.dimitech.com/ for further information. + +configs/moteino-mega + This is placeholder for the LowPowerLab MoteinoMEGA that is based + on the Atmel AVR ATMega1284P MCU. There is not much there yet and what is + there is untested due to tool-related issues. + +configs/moxa + Moxa NP51x0 series of 2-port advanced RS-232/422/485 serial device servers. + +configs/mx1ads + This is a port to the Motorola MX1ADS development board. That board + is based on the Freescale i.MX1 processor. The i.MX1 is an ARM920T. + STATUS: This port is nearly code complete but was never fully + integrated due to tool-related issues. + +configs/ne64badge + Future Electronics Group NE64 /PoE Badge board based on the + MC9S12NE64 hcs12 cpu. This port uses the m9s12x GCC toolchain. + STATUS: Under development. The port is code-complete but has + not yet been fully tested. + +configs/ntosd-dm320 + This port uses the Neuros OSD v1.0 Dev Board with a GNU arm-nuttx-elf + toolchain*: see + + http://wiki.neurostechnology.com/index.php/OSD_1.0_Developer_Home + + There are some differences between the Dev Board and the currently + available commercial v1.0 Boards. See + + http://wiki.neurostechnology.com/index.php/OSD_Developer_Board_v1 + + NuttX operates on the ARM9EJS of this dual core processor. + STATUS: This port is code complete, verified, and included in the + NuttX 0.2.1 release. + +configs/nucleo-f4x1re + STMicro ST Nucleo F401RE and F411RE boards. See + http://mbed.org/platforms/ST-Nucleo-F401RE and + http://developer.mbed.org/platforms/ST-Nucleo-F411RE for more + information about these boards. + +configs/nucleo-f303re + STMicro ST Nucleo F303RE board. Contributed by Paul Alexander Patience. + +configs/nucleus2g + This port uses the Nucleus 2G board (with Babel CAN board). This board + features an NXP LPC1768 processor. See the 2G website (http://www.2g-eng.com/) + for more information about the Nucleus 2G. + +configs/nutiny-nuc120 + This is the port of NuttX to the NuvoTon NuTiny-SDK-NUC120 board. This + board has the NUC120LE3AN chip with a built-in NuLink debugger. + +configs/olimex-efm32g880f128-stk + This is the port of NuttX to the Olimex EFM32G880F128-STK development + board. + +configs/olimex-lpc1766stk + This port uses the Olimex LPC1766-STK board and a GNU GCC toolchain* under + Linux or Cygwin. STATUS: Complete and mature. + +configs/olimex-lpc2378 + This port uses the Olimex-lpc2378 board and a GNU arm-nuttx-elf toolchain* under + Linux or Cygwin. STATUS: ostest and NSH configurations available. + This port for the NXP LPC2378 was contributed by Rommel Marcelo. + +configs/olimex-stm32-h405 + This port uses the Olimex STM32 H405 board and a GNU arm-nuttx-elf + toolchain* under Linux or Cygwin. See the http://www.olimex.com for + further information. This board features the STMicro STM32F405RGT6 MCU. + Contributed by Martin Lederhilger. + +configs/olimex-stm32-h407 + This port uses the Olimex STM32 H407 board and a GNU arm-nuttx-elf + toolchain* under Linux or Cygwin. See the http://www.olimex.com for + further information. This board features the STMicro STM32F407ZGT6 (144 + pins). Contributed by Neil Hancock. + +configs/olimex-stm32-p107 + This port uses the Olimex STM32-P107 board (STM32F107VC) and a GNU arm-nuttx-elf + toolchain* under Linux or Cygwin. See the https://www.olimex.com/dev/stm32-p107.html + for further information. Contributed by Max Holtzberg. + +configs/olimex-stm32-p207 + This port uses the Olimex STM32-P207 board (STM32F207ZE) and a GNU arm-nuttx-elf + toolchain under Linux or Cygwin. See the https://www.olimex.com/dev/stm32-p207.html + for further information. Contributed by Martin Lederhilger. + +configs/olimexino-stm32 + This port uses the Olimexino STM32 board (STM32F103RBT6) and a GNU arm-nuttx-elf + toolchain* under Linux or Cygwin. See the http://www.olimex.com for further\ + information. Contribued by David Sidrane. + +configs/olimex-strp711 + This port uses the Olimex STR-P711 board and a GNU arm-nuttx-elf toolchain* under + Linux or Cygwin. See the http://www.olimex.com/dev/str-p711.html" for + further information. STATUS: Configurations for the basic OS test and NSH + are complete and verified. + +configs/pcblogic-pic32mx + This is the port of NuttX to the PIC32MX board from PCB Logic Design Co. + This board features the MicroChip PIC32MX460F512L. + The board is a very simple -- little more than a carrier for the PIC32 + MCU plus voltage regulation, debug interface, and an OTG connector. + STATUS: Code complete but testing has been stalled due to tool related problems + (PICkit 2 does not work with the PIC32). + +configs/pcduino-a10 + This directory contains the port of NuttX to the pcDuino v1 board + See http://www.pcduino.com/ for information about pcDuino Lite, v1, + and v2. These boards are based around the Allwinner A10 Cortex-A8 CPU. + I have not compared these boards in detail, but I believe that the + differences are cosmetic. This port was developed on the v1 board, but + the others may be compatible. + +configs/p112 + The P112 is notable because it was the first of the hobbyist single board + computers to reach the production stage. The P112 hobbyist computers + were relatively widespread and inspired other hobbyist centered home brew + computing projects such as N8VEM home brew computing project. The P112 + project still maintains many devoted enthusiasts and has an online + repository of software and other information. + + The P112 computer originated as a commercial product of "D-X Designs Pty + Ltd" of Australia. They describe the computer as "The P112 is a stand-alone + 8-bit CPU board. Typically running CP/M (tm) or a similar operating system, + it provides a Z80182 (Z-80 upgrade) CPU with up to 1MB of memory, serial, + parallel and diskette IO, and realtime clock, in a 3.5-inch drive form factor. + Powered solely from 5V, it draws 150mA (nominal: not including disk drives) + with a 16MHz CPU clock. Clock speeds up to 24.576MHz are possible." + + The P112 board was last available new in 1996 by Dave Brooks. In late 2004 + on the Usenet Newsgroup comp.os.cpm, talk about making another run of P112 + boards was discussed. David Griffith decided to produce additional P112 kits + with Dave Brooks blessing and the assistance of others. In addition Terry + Gulczynski makes additional P112 derivative hobbyist home brew computers. + Hal Bower was very active in the mid 1990's on the P112 project and ported + the "Banked/Portable BIOS". + + Dave Brooks was successfully funded through Kickstarter for and another + run of P112 boards in November of 2012. + +configs/pic32mx-starterkit + This directory contains the port of NuttX to the Microchip PIC32 Ethernet + Starter Kit (DM320004) with the Multimedia Expansion Board (MEB, DM320005). + See www.microchip.com for further information. + +configs/pic32mx7mmb + This directory will (eventually) contain the port of NuttX to the + Mikroelektronika PIC32MX7 Multimedia Board (MMB). See + http://www.mikroe.com/ for further information. + +configs/pirelli_dpl10 +configs/pic32mz-starterkit + This directory contains the port of NuttX to the Microchip PIC32MZ + Embedded Connectivity (EC) Starter Kit. There are two configurations of + the starter kit: + + 1) The PIC32MZ Embedded Connectivity Starter Kit based on the + PIC32MZ2048ECH144-I/PH chip (DM320006), and + 2) The PIC32MZ Embedded Connectivity Starter Kit based on the + PIC32MZ2048ECM144-I/PH w/Crypto Engine (DM320006-C) + + See www.microchip.com for further information. + + This directory contains the board support for Pirelli "Discus" DP-L10 phones. + It is a variant of the compal_e88 config with the small changes for the + differences in the board. + +configs/qemu-i486 + Port of NuttX to QEMU in i486 mode. This port will also run on real i486 + hardwared (Google the Bifferboard). + +configs/rgmp + RGMP stands for RTOS and GPOS on Multi-Processor. RGMP is a project for + running GPOS and RTOS simultaneously on multi-processor platforms. You can + port your favorite RTOS to RGMP together with an unmodified Linux to form a + hybrid operating system. This makes your application able to use both RTOS + and GPOS features. + + See http://rgmp.sourceforge.net/wiki/index.php/Main_Page for further + information about RGMP. + +configs/sabre-6quad + This directory holds a port of NuttX to the NXP/Freescale Sabre board + featuring the iMX 6Quad CPU. + +configs/sama5d2-xult + This is the port of NuttX to the Atmel SAMA5D2-Xplained Ultra development + board. This board features the Atmel SAMA5D27. See http://www.atmel.com. + +configs/sama5d3x-ek + This is the port of NuttX to the Atmel SAMA5D3x-EK development boards + (where x=1,3,4, or 5). These boards feature the Atmel SAMA5D3 + microprocessors. Four different SAMA5D3x-EK kits are available + + - SAMA5D31-EK with the ATSAMA5D1 (http://www.atmel.com/devices/sama5d31.aspx) + - SAMA5D33-EK with the ATSAMA5D3 (http://www.atmel.com/devices/sama5d33.aspx) + - SAMA5D34-EK with the ATSAMA5D4 (http://www.atmel.com/devices/sama5d34.aspx) + - SAMA5D35-EK with the ATSAMA5D5 (http://www.atmel.com/devices/sama5d35.aspx) + + The each consist of an identical base board with different plug-in modules + for each CPU. An option 7 inch LCD is also available. All four boards + are supported by NuttX with a simple reconfiguration of the processor + type. + +configs/sama5d3-xplained + This is the port of NuttX to the Atmel SAMA5D3x-Xplained development board. + This board features the Atmel SAMA5D36. See + http://www.atmel.com/devices/sama5d36.aspx. + +configs/sama5d4-ek + This is the port of NuttX to the Atmel SAMA5D4-EK development board. + This board features the Atmel SAMA5D44. See http://www.atmel.com. + +configs/samd20-xplained + The port of NuttX to the Atmel SAMD20-Xplained Pro development board. This + board features the ATSAMD20J18A MCU (Cortex-M0+ with 256KB of FLASH and + 32KB of SRAM). + +configs/samd21-xplained + The port of NuttX to the Atmel SAMD21-Xplained Pro development board. This + board features the ATSAMD21J18A MCU (Cortex-M0+ with 256KB of FLASH and + 32KB of SRAM). + +configs/sam3u-ek + The port of NuttX to the Atmel SAM3U-EK development board. + +configs/sam4e-ek + The port of NuttX to the Atmel SAM4E-EK development board. This board + features the SAM4E16 MCU running at up to 120MHz. + +configs/sam4l-xplained + The port of NuttX to the Atmel SAM4L-Xplained development board. + +configs/sam4s-xplained + The port of NuttX to the Atmel SAM4S-Xplained development board. + +configs/sam4s-xplained-pro + The port of NuttX to the Atmel SAM4S-Xplained Pro development board. + +configs/same70-xplained + The port of NuttX to the Atmel SAME70 Xplained evaluation board. + +configs/samv71-xult + The port of NuttX to the Atmel SAMV71 Xplained Ultra evaluation board. + +configs/sim + A user-mode port of NuttX to the x86 Linux platform is available. + The purpose of this port is primarily to support OS feature development. + This port does not support interrupts or a real timer (and hence no + round robin scheduler) Otherwise, it is complete. + +configs/shenzhou + This is the port of NuttX to the Shenzhou development board from + www.armjishu.com. This board features the STMicro STM32F107VCT MCU. + +configs/spark + Board support for the Spark Core from Spark Devices http://www.sparkdevices.com). + This board features the STM32103CBT6 MCU from STMicro. + +configs/skp16c26 + Renesas M16C processor on the Renesas SKP16C26 StarterKit. This port + uses the GNU m32c toolchain. STATUS: The port is complete but untested + due to issues with compiler internal errors. + +configs/stm3210e-eval + STMicro STM3210E-EVAL development board based on the STMicro STM32F103ZET6 + microcontroller (ARM Cortex-M3). This port uses the GNU Cortex-M3 + toolchain. + +configs/stm3220g-eval + STMicro STM3220G-EVAL development board based on the STMicro STM32F407IG + microcontroller (ARM Cortex-M3). + +configs/stm3240g-eval + STMicro STM3240G-EVAL development board based on the STMicro STM32F103ZET6 + microcontroller (ARM Cortex-M4 with FPU). This port uses a GNU Cortex-M4 + toolchain (such as CodeSourcery). + +configs/stm32f4discovery + STMicro STM32F4-Discovery board based on the STMIcro STM32F407VGT6 MCU. + +configs/stm32f429i-disco + STMicro STM32F429I-Discovery board based on the STMicro STM32F429ZIT6 MCU. + +configs/stm32f746g-disco + STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6 + MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash + memory and 300Kb SRAM. + +configs/stm32l476vg-disco + STMicro STM32L476VG_DISCO development board featuring the STM32L476VG + MCU. The STM32L476VG is a Cortex-M4 optimised for low-power operation + at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM. + +configs/stm32ldiscovery + STMicro STM32L-Discovery board based on the STMicro STM32L152RB MCU. + +configs/stm32vldiscovery + STMicro STM32VL-Discovery board based on the STMicro STM32F100RB MCU. + +configs/sure-pic32mx + The "Advanced USB Storage Demo Board," Model DB-DP11215, from Sure + Electronics (http://www.sureelectronics.net/). This board features + the MicroChip PIC32MX440F512H. See also + http://www.sureelectronics.net/goods.php?id=1168 for further + information about the Sure DB-DP11215 board. + +configs/teensy-2.0 + This is the port of NuttX to the PJRC Teensy++ 2.0 board. This board is + developed by http://pjrc.com/teensy/. The Teensy++ 2.0 is based + on an Atmel AT90USB1286 MCU. + +configs/teensy-3.x + This is the port of NuttX to the Teensy-3.1 from PJRC + (https://www.pjrc.com/). The Teensy-3.1 features the Freescale + MK30DX256VLH7 chip (now NXP). The MK30DX256VLH7 is a 64-pin Cortex-M4 + running at 72MHz. It has 256KiB of program FLASH memory and 64KiB of + SRAM. For more information about the Teensy 3.1, see + + https://www.pjrc.com/teensy/teensy31.html + https://www.pjrc.com/store/teensy31.html + + This board configuration can also be used with the older Teensy-3.0. The + Teensy-3.0 has the same schematic (although some pins are not used on the + Teensy-3.0). the primary difference is that the Teensy 3.0 has a + MK30DX128VLH5 with slightly less capability. + +configs/teensy-lc + This is the port of nuttx for the Teensy LC board. The Teensy LC + is a DIP style breakout board for the MKL25Z64 and comes with a USB + based bootloader. + +configs/tm4c123g-launchpad + This is the port of NuttX to the Tiva® TM4C123G LaunchPad. The + Tiva® TM4C123G LaunchPad Evaluation Board is a low-cost evaluation + platform for ARM® Cortex™-M4F-based microcontrollers from Texas + Instruments. + +configs/tm4c1294-launchpad + This is the port of NuttX to the Tiva® TM4C1294 LaunchPad. The + Tiva® TM4C123G LaunchPad Evaluation Board is a low-cost evaluation + platform for ARM® Cortex™-M4F-based microcontrollers from Texas + Instruments. + +configs/twr-k60n512 + Kinetis K60 Cortex-M4 MCU. This port uses the FreeScale TWR-K60N512 + development board. + +configs/ubw32 + + This is the port to the Sparkfun UBW32 board. This port uses the original v2.4 + board which is based on the MicroChip PIC32MX460F512L. See + http://www.sparkfun.com/products/8971. This older version has been replaced + with this board http://www.sparkfun.com/products/9713. See also + http://www.schmalzhaus.com/UBW32/. + +configs/us7032evb1 + This is a port of the Hitachi SH-1 on the Hitachi SH-1/US7032EVB1 board. + STATUS: Work has just began on this port. + +configs/viewtool-stm32f107 + NuttX configurations for the ViewTool STM32F103/F107 V1.2 board. This + board may be fitted with either: (1) STM32F107VCT6 or (2) STM32F103VCT6. + See http://www.viewtool.com/ for further information. + +configs/xtrs + TRS80 Model 3. This port uses a vintage computer based on the Z80. + An emulator for this computer is available to run TRS80 programs on a + linux platform (http://www.tim-mann.org/xtrs.html). + +configs/z16f2800100zcog + z16f Microcontroller. This port use the Zilog z16f2800100zcog + development kit and the Zilog ZDS-II Windows command line tools. The + development environment is Cygwin under WinXP. + +configs/z80sim + z80 Microcontroller. This port uses a Z80 instruction set simulator + called z80sim. This port also uses the SDCC toolchain + (http://sdcc.sourceforge.net/") (verified with version 2.6.0). + +configs/z8encore000zco + z8Encore! Microcontroller. This port use the Zilog z8encore000zco + development kit, Z8F6403 part, and the Zilog ZDS-II Windows command line + tools. The development environment is Cygwin under WinXP. + +configs/z8f64200100kit + z8Encore! Microcontroller. This port use the Zilog z8f64200100kit + development kit, Z8F6423 part, and the Zilog ZDS-II Windows command line + tools. The development environment is Cygwin under WinXP. + +configs/zp214xpa + This port is for the NXP LPC2148 as provided on the The0.net + ZPA213X/4XPA development board. Includes support for the + UG-2864AMBAG01 OLED also from The0.net + +configs/zkit-arm-1769 + Zilogic System's ARM development Kit, ZKIT-ARM-1769. This board is based + on the NXP LPC1769. The Nuttx Buildroot toolchain is used by default. + +Configuring NuttX +^^^^^^^^^^^^^^^^^ + +Configuring NuttX requires only copying + + configs///Make.def to ${TOPDIR}/Make.defs + configs///setenv.sh to ${TOPDIR}/setenv.sh + configs///defconfig to ${TOPDIR}/.config + +tools/configure.sh + There is a script that automates these steps. The following steps will + accomplish the same configuration: + + cd tools + ./configure.sh / + + There is an alternative Windows batch file that can be used in the + windows native enironment like: + + cd ${TOPDIR}\tools + configure.bat \ + + See tools/README.txt for more information about these scripts. + + And if your application directory is not in the standard loction (../apps + or ../apps-), then you should also specify the location of the + application directory on the command line like: + + cd tools + ./configure.sh -a / + +Building Symbol Tables +^^^^^^^^^^^^^^^^^^^^^^ + +Symbol tables are needed at several of the binfmt interfaces in order to bind +a module to the base code. These symbol tables can be tricky to create and +will probably have to be tailored for any specific application, balancing +the number of symbols and the size of the symbol table against the symbols +required by the applications. + +The top-level System.map file is one good source of symbol information +(which, or course, was just generated from the top-level nuttx file +using the GNU 'nm' tool). + +There are also common-separated value (CSV) values in the source try that +provide information about symbols. In particular: + + nuttx/syscall/syscall.csv - Describes the NuttX RTOS interface, and + nuttx/lib/libc.csv - Describes the NuttX C library interface. + +There is a tool at nuttx/tools/mksymtab that will use these CSV files as +input to generate a generic symbol table. See nuttx/tools/README.txt for +more information about using the mksymtab tool. diff --git a/configs/amber/Kconfig b/configs/amber/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/amber/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/amber/README.txt b/configs/amber/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..752d4a840acc415abc17baf89c731c6af4ab8b32 --- /dev/null +++ b/configs/amber/README.txt @@ -0,0 +1,525 @@ +README +^^^^^ + +This is the README file for the port of NuttX to the Amber Web Server from +SoC Robotics (http://www.soc-robotics.com/index.htm). The +Amber Web Server is based on an Atmel ATMega128. As of this writing, +documentation for the Amber Web Server board is available here: + +http://www.soc-robotics.com/product/Amber_Specs/Amber_Processor.html + +and + +http://www.soc-robotics.com/pdfs/Amber%201-5a%20Hardware%20Reference%20Guide.pdf + +Contents +^^^^^^^^ + + o Amber Web Server Features + o Pin Connections + o Atmel AVRISP mkII Connection + o Toolchains + o Windows Native Toolchains + o NuttX buildroot Toolchain + o avr-libc + o Amber Web Server Configuration Options + o Configurations + +Amber Web Server Features +^^^^^^^^^^^^^^^^^^^^^^^^^ + + o 17.56MHz ATmega128 Atmel 8bit AVR RISC Processor + o 128Kbyte Flash + o 64Kbyte RAM + o 10BaseT Ethernet Port + o High Speed Serial Port + o 8Ch 10bit Analog Input port + o 16 Digital IO ports + o Expansion bus for daughter cards + o LED status indicators + o ISP Programming port + o 7-14VDC input + o Power via Ethernet port + +Pin Connections (PCB Rev 1.5a) +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + -------------------- ----------------------------- + ATMega128 Pinout Amber board connection + -------------------- ----------------------------- + (left) + 1 PEN Pulled-up + 2 PE0 (RXD0/PDI) MAX202ECWED T1IN or J7-1, ISP-PDI (via 74HC5053), J5-26 + 3 PE1 (TXD0/PDO) MAX202ECWED A1OUT or J7-9, ISP-PDO (via 74HC5053), J5-25 + 4 PE2 (XCK0/AIN0) MAX202ECWED T2IN, J5-24 + 5 PE3 (OC3A/AIN1) MAX202ECWED A2OUT, J5-23 + 6 PE4 (OC3B/INT4) J5-22 + 7 PE5 (OC3C/INT5) J5-21, RTL8019AS INT 0, TP5 PE5 + 8 PE6 (T3/INT6) J5-20 + 9 PE7 (ICP3/INT7) J5-19 + 10 PB0 (SS) Pull up of SS SPI master + 11 PB1 (SCK) J7-7, ISP_SCK (via 74HC4053) and AT45D011 SCK, J5-17 + 12 PB2 (MOSI) AT45D011 SI. J5-16 + 13 PB3 (MISO) AT45D011 SO, J5-15 + 14 PB4 (OC0) AT45D011 CS\, J5-14 + 15 PB5 (OC1A) J5-13 + 16 PB6 (OC1B) J5-12 + (bottom) + 17 PB7 (OC2/OC1C) J5-11 + 18 PG3/TOSC2 32.768KHz XTAL + 19 PG4/TOSC1 32.768KHz XTAL + 20 RESET RESET + 21 VCC + 22 GND GND + 23 XTAL2 14.7456MHz XTAL + 24 XTAL1 14.7456MHz XTAL + 25 PD0 (SCL/INT0) J5-10 + 26 PD1 (SDA/INT1) J5-9 + 27 PD2 (RXD1/INT2) J5-8, MAX488CSA RO (RS-485) + 28 PD3 (TXD1/INT3) J5-7, MAX488CSA DI (RS-485) + 29 PD4 (ICP1) J5-6 + 30 PD5 (XCK1) J5-5 + 31 PD6 (T1) J5-4 + 32 PD7 (T2) J5-3 + (left) + 48 PA3 (AD3) J5-?, 74HC5730, 62246DLP-7, RTL8019AS + 47 PA4 (AD4) J5-?, 74HC5730, 62246DLP-7, RTL8019AS + 46 PA5 (AD5) J5-?, 74HC5730, 62246DLP-7, RTL8019AS + 45 PA6 (AD6) J5-?, 74HC5730, 62246DLP-7, RTL8019AS + 44 PA7 (AD7) J5-?, 74HC5730, 62246DLP-7, RTL8019AS + 43 PG2 (ALE) J5-1, 74HC5730, 62246DLP-7, RTL8019AS + 42 PC7 (A15) TP4 A15, J5-27, 74HC5730 + 41 PC6 (A14) J5-28, 74HC5730, 62246DLP-7, RTL8019AS + 40 PC5 (A13) J5-29, 74HC5730, 62246DLP-7, RTL8019AS + 39 PC4 (A12) J5-30, 74HC5730, 62246DLP-7, RTL8019AS + 38 PC3 (A11) J5-31, 74HC5730, 62246DLP-7, RTL8019AS + 37 PC2 (A10) J5-32, 74HC5730, 62246DLP-7, RTL8019AS + 36 PC1 (A9) J5-33, 74HC5730, 62246DLP-7, RTL8019AS + 35 PC0 (A8) J5-34, 74HC5730, 62246DLP-7, RTL8019AS + 34 PG1 (RD) TP2 RD\, J5-52, 62246DLP-7, RTL8019AS + 33 PG0 (WR) TP3 WR\, J5-51, 62246DLP-7, RTL8019AS + (top) + 64 AVCC + 63 GND GND + 62 AREF (analog supply) + 61 PF0 (ADC0) J6-5, PDV-P9 Light Sensor + 60 PF1 (ADC1) J6-7, Thermister + 59 PF2 (ADC2) J6-9, MXA2500GL Dual Axis Accesserometer, AOUTX + 58 PF3 (ADC3) J6-11, MXA2500GL Dual Axis Accesserometer, AOUTY + 57 PF4 (ADC4/TCK) J6-13, MXA2500GL Dual Axis Accesserometer, TOUT + 56 PF5 (ADC5/TMS) J6-15 + 55 PF6 (ADC6/TDO) J6-17 + 54 PF7 (ADC7/TDI) J6-19 + 53 GND GND + 52 VCC + 51 PA0 (AD0) J5-?, 74HC5730, 62246DLP-7, RTL8019AS + 50 PA1 (AD1) J5-?, 74HC5730, 62246DLP-7, RTL8019AS + 49 PA2 (AD2) J5-?, 74HC5730, 62246DLP-7, RTL8019AS + +Switches and Jumpers +^^^^^^^^^^^^^^^^^^^^ +ISP/UART0 + JP1 - DTE/DCE selection + JP2 - + JP5 - + J11 - STK500 Enable + +ADC + JP8 - + JP9 - + +Networking + JP10 - + +RS-485 + J8 - + J9 - + J10 - + +Atmel AVRISP mkII Connection +^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + ISP6PIN Header + -------------- + + 1 2 + MISO o o VCC + SCK o o MOSI + RESET\ o o GND + + (ISP10PIN Connector) + ------------------- ------------------------- + + 1 2 + MOSI o o Vcc - ISP-PDI: PE0/PDI/RX0 via 74HC5053 + LED o o GND - ISP-PROG: J11/GND, to 74HC5053 and LED + RESET\ o o GND - to 74HC505 + SCK o o GND - ISP_SCK: SCK, PB0/SS\ + MISO o o GND - ISP-PDO: PE1/PD0/TX0 via 74HC5053 + + Board Orientation + + | + | +-----+ + | + O O | + | + O O | + | + O O + | + O O | + | + O x | PIN 1 + | +-----+ + | + + AVRISP mkII Connection to 10-pin Header + ------------------------------------------- + 10PIN Header 6PIN Header + --------------------- --------------------- + Pin 1 MOSI Pin 4 MOSI + Pin 2 Vcc Pin 2 Vcc + Pin 3 LED Controlled via J11 + Pin 4 GND Pin 6 GND + Pin 5 RESET\ Pin 5 RESET\ + Pin 6 GND N/C + Pin 7 SCK Pin 3 SCK + Pin 8 GND N/C + Pin 9 MISO Pin 1 MISO + Pin 10 GND N/C + +Toolchains +^^^^^^^^^^ + +The toolchain may be selected using the kconfig-mconf tool (via 'make menuconfig'), +by editing the existing configuration file (defconfig), or by overriding +the toolchain on the make commandline with CONFIG_AVR_TOOLCHAIN=. + +The valid values for are BUILDROOT, CROSSPACK, LINUXGCC and WINAVR. + +Buildroot: + + There is a DIY buildroot version for the AVR boards here: + http://bitbucket.org/nuttx/buildroot/downloads/. See the + following section for details on building this toolchain. + + It is assumed in some places that buildroot toolchain is available + at ../buildroot/build_avr. Edit the setenv.sh file if + this is not the case. + + After configuring NuttX, make sure that CONFIG_AVR_BUILDROOT_TOOLCHAIN=y is set in your + .config file. + +WinAVR: + + For Cygwin development environment on Windows machines, you can use + WinAVR: http://sourceforge.net/projects/winavr/files/ + + It is assumed in some places that WinAVR is installed at C:/WinAVR. Edit the + setenv.sh file if this is not the case. + + After configuring NuttX, make sure that CONFIG_AVR_WINAVR_TOOLCHAIN=y is set in your + .config file. + + WARNING: There is an incompatible version of cygwin.dll in the WinAVR/bin + directory! Make sure that the path to the correct cygwin.dll file precedes + the path to the WinAVR binaries! + +Linux: + + For Linux, there are widely available avr-gcc packages. On Ubuntu, use: + sudo apt-get install gcc-avr gdb-avr avr-libc + + After configuring NuttX, make sure that CONFIG_AVR_LINUXGCC_TOOLCHAIN=y is set in your + .config file. + +Mac OS X: + + For Mac OS X, the CrossPack for AVR toolchain is available from: + + http://www.obdev.at/products/crosspack/index.html + + This toolchain is functionally equivalent to the Linux GCC toolchain. + +Windows Native Toolchains +^^^^^^^^^^^^^^^^^^^^^^^^^ + + The WinAVR toolchain is a Windows native toolchain. There are several + limitations to using a Windows native toolchain in a Cygwin environment. + The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' + utility but you might easily find some new path problems. If so, check + out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic + links are used in Nuttx (e.g., include/arch). The make system works + around these problems for the Windows tools by copying directories + instead of linking them. But this can also cause some confusion for + you: For example, you may edit a file in a "linked" directory and find + that your changes had no effect. That is because you are building the + copy of the file in the "fake" symbolic directory. If you use a + Windows toolchain, you should get in the habit of making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + An additional issue with the WinAVR toolchain, in particular, is that it + contains an incompatible version of the Cygwin DLL in its bin/ directory. + You must take care that the correct Cygwin DLL is used. + +NuttX buildroot Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^ + + If NuttX buildroot toolchain source tarball cne can be downloaded from the + NuttX Bitbucket download site (https://bitbucket.org/nuttx/nuttx/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh amber/ + + NOTE: you also must copy avr-libc header files into the NuttX include + directory with command perhaps like: + + cp -a /cygdrive/c/WinAVR/include/avr include/. + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/avr-defconfig-4.5.2 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you + are building a toolchain for Cygwin under Windows. + +avr-libc +^^^^^^^^ + +Header Files + + In any case, header files from avr-libc are required: http://www.nongnu.org/avr-libc/. + A snapshot of avr-lib is included in the WinAVR installation. For Linux + development platforms, avr-libc package is readily available (and would + be installed in the apt-get command shown above). But if you are using + the NuttX buildroot configuration on Cygwin, then you will have to build + get avr-libc from binaries. + +Header File Installation + + The NuttX build will required that the AVR header files be available via + the NuttX include directory. This can be accomplished by either copying + the avr-libc header files into the NuttX include directory: + + cp -a /include/avr /include/. + + Or simply using a symbolic link: + + ln -s /include/avr /include/. + +Build Notes: + + It may not necessary to have a built version of avr-lib; only header files + are required. Bu if you choose to use the optimized libraru functions of + the flowing point library, then you may have to build avr-lib from sources. + Below are instructions for building avr-lib from fresh sources: + + 1. Download the avr-libc package from: + + http://savannah.nongnu.org/projects/avr-libc/ + + I am using avr-lib-1.7.1.tar.bz2 + + 2. Upack the tarball and cd into the + + tar jxf avr-lib-1.7.1.tar.bz2 + cd avr-lib-1.7.1 + + 3. Configure avr-lib. Assuming that WinAVR is installed at the following + loction: + + export PATH=/cygdrive/c/WinAVR/bin:$PATH + ./configure --build=`./config.guess` --host=avr + + This takes a *long* time. + + 4. Make avr-lib. + + make + + This also takes a long time because it generates variants for nearly + all AVR chips. + + 5. Install avr-lib. + + make install + +Amber Web Server Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=avr + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_AVR=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CHIP_ATMEGA=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=atmega + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_ATMEGA128=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=amber + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_AMBER=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM. One of: + + CONFIG_RAM_SIZE=(8*1024) - (8Kb) + + CONFIG_RAM_START - The start address of installed SRAM + + CONFIG_RAM_START=0x800100 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_AVR_INT0=n + CONFIG_AVR_INT1=n + CONFIG_AVR_INT2=n + CONFIG_AVR_INT3=n + CONFIG_AVR_INT4=n + CONFIG_AVR_INT5=n + CONFIG_AVR_INT6=n + CONFIG_AVR_INT7=n + CONFIG_AVR_WDT=n + CONFIG_AVR_TIMER0=n + CONFIG_AVR_TIMER1=n + CONFIG_AVR_TIMER2=n + CONFIG_AVR_TIMER3=n + CONFIG_AVR_SPI=n + CONFIG_AVR_USART0=y + CONFIG_AVR_USART1=n + CONFIG_AVR_ADC=n + CONFIG_AVR_ANACOMP=n + CONFIG_AVR_TWI=n + + If the watchdog is enabled, this specifies the initial timeout. Default + is maximum supported value. + + CONFIG_WDTO_15MS + CONFIG_WDTO_30MS + CONFIG_WDTO_60MS + CONFIG_WDTO_120MS + CONFIG_WDTO_1250MS + CONFIG_WDTO_500MS + CONFIG_WDTO_1S + CONFIG_WDTO_2S + CONFIG_WDTO_4S + CONFIG_WDTO_8S + + ATMEGA specific device driver settings + + CONFIG_USARTn_SERIAL_CONSOLE - selects the USARTn for the + console and ttys0 (default is the USART0). + CONFIG_USARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_USARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_USARTn_BAUD - The configure BAUD of the USART. Must be + CONFIG_USARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_USARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_USARTn_2STOP - Two stop bits + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. Each Amber Web Server configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh amber/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + NOTE: You must also copy avr-libc header files, perhaps like: + + cp -a /cygdrive/c/WinAVR/include/avr include/. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume the NuttX Buildroot toolchain + under Cygwin with Windows. This is easily reconfigured: + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_AVR_BUILDROOT_TOOLCHAIN=y + +Configuration Sub-Directories +----------------------------- + + hello: + The simple apps/examples/hello "Hello, World!" example. diff --git a/configs/amber/hello/Make.defs b/configs/amber/hello/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..d618c22cd3bd15e615667f56e0ff1acd326fa0d1 --- /dev/null +++ b/configs/amber/hello/Make.defs @@ -0,0 +1,99 @@ +############################################################################ +# configs/amber/hello/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/avr/src/avr/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = $(ARCHINCLUDES) "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/hello/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem "$(TOPDIR)/include" + ARCHXXINCLUDES = $(ARCHINCLUDES) -isystem "$(TOPDIR)/include/cxx" + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/hello/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/amber/hello/defconfig b/configs/amber/hello/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..57a095a0e10794db94baca284a3d5050d141720e --- /dev/null +++ b/configs/amber/hello/defconfig @@ -0,0 +1,575 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +CONFIG_ARCH_AVR=y +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="avr" +CONFIG_ARCH_FAMILY="avr" +CONFIG_ARCH_CHIP="atmega" +CONFIG_ARCH_CHIP_ATMEGA128=y +# CONFIG_ARCH_CHIP_AT90USB646 is not set +# CONFIG_ARCH_CHIP_AT90USB647 is not set +# CONFIG_ARCH_CHIP_AT90USB1286 is not set +# CONFIG_ARCH_CHIP_AT90USB1287 is not set +# CONFIG_ARCH_CHIP_AT32UC3B0256 is not set +CONFIG_ARCH_FAMILY_AVR=y +CONFIG_ARCH_CHIP_ATMEGA=y + +# +# AVR Configuration Options +# +# CONFIG_AVR_WINAVR_TOOLCHAIN is not set +CONFIG_AVR_BUILDROOT_TOOLCHAIN=y +# CONFIG_AVR_USART1 is not set + +# +# ATMega Configuration Options +# +CONFIG_AVR_USART0=y + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=800 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x800100 +CONFIG_RAM_SIZE=4096 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_AMBER=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="amber" + +# +# Common Board Options +# + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=16 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="hello_main" +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=4 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=4 +CONFIG_NFILE_STREAMS=4 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=512 +CONFIG_USERMAIN_STACKSIZE=512 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_USART0=y + +# +# USART Configuration +# +CONFIG_USART0_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_USART0_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART0 Configuration +# +CONFIG_USART0_RXBUFSIZE=256 +CONFIG_USART0_TXBUFSIZE=256 +CONFIG_USART0_BAUD=38400 +CONFIG_USART0_BITS=8 +CONFIG_USART0_PARITY=0 +CONFIG_USART0_2STOP=0 +# CONFIG_USART0_IFLOWCONTROL is not set +# CONFIG_USART0_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/amber/hello/ld.script b/configs/amber/hello/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..af7eed6f3036f361c73497dfd471e564376cff96 --- /dev/null +++ b/configs/amber/hello/ld.script @@ -0,0 +1,211 @@ +/************************************************************************************** + * configs/amber/hello/ld.script + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************/ + +/* Memory Regions *********************************************************************/ +/* -------------- ------ ------+------- -- ------ -- ------ --- ------ ----+------- --- + * FLASH | REGISTERS I/O EXT I/O ISRAM | EEPROM + * | REGISTERS REGISTERS | + * -------------- ------ ------+------- -- ------ -- ------ --- ------ ----+------- --- + * ATMEGA128* 0x0000 128Kb | 0x0000 32 0x0020 64 0x0060 160 0x0100 4Kb | 0x0000 4Kb + * -------------- ------ ------+------- -- ------ -- ------ --- ------ ----+------- --- + * *Memory configuration A + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0, LENGTH = 128K + sram (rw!x) : ORIGIN = 0x800100, LENGTH = 4K + eeprom (rw!x) : ORIGIN = 0x810000, LENGTH = 4K +} + +OUTPUT_FORMAT("elf32-avr","elf32-avr","elf32-avr") +OUTPUT_ARCH(avr:5) +ENTRY(__start) + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + + .rel.text : + { + *(.rel.text) + *(.rel.text.*) + *(.rel.gnu.linkonce.t*) + } + + .rela.text : + { + *(.rela.text) + *(.rela.text.*) + *(.rela.gnu.linkonce.t*) + } + + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + + .rel.rodata : + { + *(.rel.rodata) + *(.rel.rodata.*) + *(.rel.gnu.linkonce.r*) + } + + .rela.rodata : + { + *(.rela.rodata) + *(.rela.rodata.*) + *(.rela.gnu.linkonce.r*) + } + + .rel.data : + { + *(.rel.data) + *(.rel.data.*) + *(.rel.gnu.linkonce.d*) + } + + .rela.data : + { + *(.rela.data) + *(.rela.data.*) + *(.rela.gnu.linkonce.d*) + } + + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + + .text : + { + _stext = . ; + *(.vectors) + *(.init) + *(.handlers) + *(.text) + *(.text.*) + _etext = . ; + } > flash + + _eronly = ABSOLUTE(.); + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : + { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Global data not cleared after reset. */ + + .noinit : + { + _snoinit = ABSOLUTE(.); + *(.noinit*) + _enoinit = ABSOLUTE(.); + } > sram + + .eeprom : + { + _seeprom = ABSOLUTE(.); + *(.eeprom*) + _eeeprom = ABSOLUTE(.); + } > eeprom + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } +} diff --git a/configs/amber/hello/setenv.sh b/configs/amber/hello/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..dc97e70b62a30129f274b79e440f6c213f8191b4 --- /dev/null +++ b/configs/amber/hello/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/amber/hello/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the WinAVR +# toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install the Linux AVR toolchain as well +#export TOOLCHAIN_BIN="/cygdrive/c/WinAVR/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_avr/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/amber/include/board.h b/configs/amber/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..fc0ef7469cba66e7e34692d1d604633d297500f5 --- /dev/null +++ b/configs/amber/include/board.h @@ -0,0 +1,100 @@ +/**************************************************************************** + * configs/amber/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_AMBER_INCLUDE_BOARD_H +#define __CONFIGS_AMBER_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Clocking *****************************************************************/ +/* Assume default CLKDIV8 fuse setting is overridden to CLKDIV1 */ + +#define BOARD_XTAL_FREQ 14745600 /* 14.7456MHz crystal */ +#define BOARD_CPU_CLOCK BOARD_XTAL_FREQ /* F_CPU = 14.7456MHz */ +#define BOARD_TOSCK_CLOCK 32768 /* TOSC = 32.768KHz */ + +/* LED definitions **********************************************************/ +/* The Amber Web Server has a reset switch and four LEDs. The LEDs indicate + * the status of power, programming state, Ethernet link status and reset + * status (Active). None are available for software use. + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_AMBER_INCLUDE_BOARD_H */ diff --git a/configs/amber/src/.gitignore b/configs/amber/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/amber/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/amber/src/Makefile b/configs/amber/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..21025055dac08a67c4743b03fbeaeb2cad1ef1b4 --- /dev/null +++ b/configs/amber/src/Makefile @@ -0,0 +1,45 @@ +############################################################################ +# configs/amber/src/Makefile +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = atmega_boot.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += atmega_leds.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/amber/src/amber.h b/configs/amber/src/amber.h new file mode 100644 index 0000000000000000000000000000000000000000..770b08ba4acabbe8c9c26fba8b399caaf71703a8 --- /dev/null +++ b/configs/amber/src/amber.h @@ -0,0 +1,102 @@ +/**************************************************************************** + * configs/amber/src/amber.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_AMBER_SRC_AMBER_H +#define __CONFIGS_AMBER_SRC_AMBER_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Name: atmega_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Amber Web Server. + * + ************************************************************************************/ + +#if defined(CONFIG_AVR_SPI1) || defined(CONFIG_AVR_SPI2) +void weak_function atmega_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: atmega_led_initialize + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void atmega_led_initialize(void); +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_AMBER_SRC_AMBER_H */ diff --git a/configs/amber/src/atmega_boot.c b/configs/amber/src/atmega_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..3f6c28db6050f25a21a35d1ec9feb83672979c40 --- /dev/null +++ b/configs/amber/src/atmega_boot.c @@ -0,0 +1,92 @@ +/************************************************************************************ + * configs/amber/src/atmega_boot.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "atmega.h" +#include "amber.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: atmega_boardinitialize + * + * Description: + * All ATMega architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void atmega_boardinitialize(void) +{ + /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak + * function atmega_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_AVR_SPI1) || defined(CONFIG_AVR_SPI2) + if (atmega_spidev_initialize) + { + atmega_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + atmega_led_initialize(); +#endif +} diff --git a/configs/arduino-due/Kconfig b/configs/arduino-due/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..00c4c1bbce93f93af32963a2bbacee306f53f0c5 --- /dev/null +++ b/configs/arduino-due/Kconfig @@ -0,0 +1,24 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_ARDUINO_DUE + +config ADRUINO_DUE_REV3 + bool "Rev 3" + default n + ---help--- + This port was performed on the Aduino Due Rev 2 board. Differences + with the Arduino Due Rev 3 board have been reported. This selection + will enable work arounds specifically for the Rev 3 board. + +config ARDUINO_ITHEAD_TFT + bool "ITEAD 2.4 inch TFT w/Touch" + default n + ---help--- + Select this option if you have the ITEAD 2.4" TFT module installed. + This will enable support for the peripherals on that module + including the SD card, TFT LCD, and touchscreen controller. + +endif diff --git a/configs/arduino-due/README.txt b/configs/arduino-due/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..290c095ef3a67d2a60fcf94bde921d22c5e40f45 --- /dev/null +++ b/configs/arduino-due/README.txt @@ -0,0 +1,1080 @@ +README +^^^^^^ + + This README discusses issues unique to NuttX configurations for the + Arduino DUE board featuring the Atmel ATSAM3X8E MCU running at 84 + MHz. + + Supported Shields + ----------------- + - ITEAD 2.4" TFT with Touch, Arduino Shield 1.0 + +Contents +^^^^^^^^ + + - PIO Pin Usage + - Rev 2 vs. Rev 3 + - ITEAD 2.4" TFT with Touch + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - Buttons and LEDs + - Serial Consoles + - Loading Code + - SAM4S Xplained-specific Configuration Options + - Configurations + +PIO Pin Usage +^^^^^^^^^^^^^ + + PORTA PORTB PORTC + ------------------------------ ------------------------------ -------------------------------- + PIO SIGNAL CONN PIN PIO SIGNAL CONN PIN PIO SIGNAL CONN PIN + ----- ---------- ---- -------- ----- ------------ ---- ------ ----- ----------- ---- --------- + PA0 CANTX0 ADCH 8 PB0 ETX_CLK ETH 1 PC0 ERASE N/A + PA1 CANRX0 ACDH 7 PB1 ETX_EN ETH 3 PC1 PIN33 XIO 14 + PA2 AD7 ADCL 8 PB2 ETXD0 ETH 5 PC2 PIN34 XIO 15 + PA3 AD6 ADCL 7 PB3 ETXD1 ETH 7 PC3 PIN35 XIO 16 + PA4 AD5 ADCL 6 PB4 ERX_DV ETH 10 PC4 PIN36 XIO 17 + PA5 EEXTINT ETH 8 PB5 ERXD0 ETH 9 PC5 PIN37 XIO 18 + PA6 AD4 ADCL 5 PB6 ERXD1 ETH 11 PC6 PIN38 XIO 19 + PA7 PIN31 XIO 12 PB7 ERX_ER ETH 13 PC7 PIN39 XIO 20 + PA8 [U]RX PWML 1 PB8 EMDC ETH 14 PC8 PIN40 XIO 21 + PA9 [U]TX PWML 2 PB9 EMDIO ETH 12 PC9 PIN41 XIO 22 + PA10 RXD2 COMM 6 PB10 UOTGVBOF Vbus power PC10 N/C N/A + PA11 TXD2 COMM 5 PB11 UOTGID USB1 4 PC11 N/C N/A + PA12 RXD1 COMM 4 PB12 SDA0-3 COMM 7 PC12 PIN51 XIO 32 + PA13 TXD1 COMM 3 PB13 SCL0-3 COMM 8 PC13 PIN50 XIO 31 + PA14 PIN23 XIO 4 PB14 CANTX1/IO XIO 34 PC14 PIN49 XIO 30 + PA15 PIN24 XIO 5 PB15 DAC0(CANRX1) ADCH 5 PC15 PIN48 XIO 29 + PA16 AD0 ADCL 1 PB16 DAC1 ADCH 6 PC16 PIN47 XIO 28 + PA17 SDA1 PWMH 9 PB17 AD8 ADCH 1 PC17 PIN46 XIO 27 + PA18 SCL1 PWMH 10 PB18 AD9 ADCH 2 PC18 PIN45 XIO 26 + PA19 PIN42 XIO 23 PB19 AD10 ADCH 3 PC19 PIN44 XIO 25 + PA20 PIN43 XIO 24 PB20 AD11(TXD3) ADCH 4 PC20 N/C N/A + PA21 TXL TX YELLOW LED PB21 AD14(RXD3) XIO 33 PC21 PWM9 PWMH 2 + PA22 AD3 ADCL 4 PB22 N/C N/A PC22 PWM8 PWMH 1 + PA23 AD2 ADCL 3 PB23 SS3 ??? PC23 PWM7 PWML 8 + PA24 AD1 ADCL 2 PB24 N/C N/A PC24 PWM6 PWML 7 + PA25 MISO SPI 1 PB25 PWM2 PWML 3 PC25 PWM5 PWML 6 + PA26 MOSI SPI 4 PB26 PIN22 ??? PC26 SS1/PWM4 PWML 10 (there are two) + PA27 SPCK SPI 3 PB27 PWM13 PWMH 6 PC27 N/C N/A + PA28 SS0/PWM10 (ETH) PWML 10 PB28 JTAG_TCK JTAG 4 PC28 PWM3 PWML 4 + PA29 SS1/PWM4 (SD) PB29 JTAG_TDI JTAG 8 PC29 SS0/PWM10 ??? (there are two) + PA30 N/A N/A PB30 JTAG_TDO JTAG 6 PC30 RXL RX YELLOW LED + PA31 N/A N/A PB31 JTAG_TMS JTAG 2 PC31 N/A N/A + ----- ---------- ---- -------- ----- ------------ ---- ------ ----- ----------- ---- --------- + + PORTA PORTB PORTC + ------------------------------ ------------------------------ -------------------------------- + PIO SIGNAL CONN PIN PIO SIGNAL CONN PIN PIO SIGNAL CONN PIN + ----- ---------- ---- -------- ----- ------------ ---- ------ ----- ----------- ---- --------- + PA0 PIN25 XIO 6 PE0 N/A N/A PF0 N/A N/A + PD1 PIN26 XIO 7 PE1 N/A N/A PF1 N/A N/A + PD2 PIN27 XIO 8 PE2 N/A N/A PF2 N/A N/A + PD3 PIN28 XIO 9 PE3 N/A N/A PF3 N/A N/A + PD4 TXD0 COMM 1 PE4 N/A N/A PF4 N/A N/A + PD5 RXD0 COMM 2 PE5 N/A N/A PF5 N/A N/A + PD6 PIN29 XIO 10 PE6 N/A N/A PF6 N/A N/A + PD7 PWM11 PWMH 4 PE7 N/A N/A PF7 N/A N/A + PD8 PWM12 PWMH 5 PE8 N/A N/A PF8 N/A N/A + PD9 PIN30 XIO 11 PE9 N/A N/A PF9 N/A N/A + PD10 PIN32 XIO 13 PE10 N/A N/A PF10 N/A N/A + PD11 N/A N/A PE11 N/A N/A PF11 N/A N/A + PD12 N/A N/A PE12 N/A N/A PF12 N/A N/A + PD13 N/A N/A PE13 N/A N/A PF13 N/A N/A + PD14 N/A N/A PE14 N/A N/A PF14 N/A N/A + PD15 N/A N/A PE15 N/A N/A PF15 N/A N/A + PD16 N/A N/A PE16 N/A N/A PF16 N/A N/A + PD17 N/A N/A PE17 N/A N/A PF17 N/A N/A + PD18 N/A N/A PE18 N/A N/A PF18 N/A N/A + PD19 N/A N/A PE19 N/A N/A PF19 N/A N/A + PD20 N/A N/A PE20 N/A N/A PF20 N/A N/A + PD21 N/A N/A PE21 N/A N/A PF21 N/A N/A + PD22 N/A N/A PE22 N/A N/A PF22 N/A N/A + PD23 N/A N/A PE23 N/A N/A PF23 N/A N/A + PD24 N/A N/A PE24 N/A N/A PF24 N/A N/A + PD25 N/A N/A PE25 N/A N/A PF25 N/A N/A + PD26 N/A N/A PE26 N/A N/A PF26 N/A N/A + PD27 N/A N/A PE27 N/A N/A PF27 N/A N/A + PD28 N/A N/A PE28 N/A N/A PF28 N/A N/A + PD29 N/A N/A PE29 N/A N/A PF29 N/A N/A + PD30 N/A N/A PE30 N/A N/A PF30 N/A N/A + PD31 N/A5 N/A PE31 N/A N/A PF31 N/A N/A + ----- ---------- ---- -------- ----- ------------ ---- ------ ----- ----------- ---- --------- + +Rev 2 vs. Rev 3 +^^^^^^^^^^^^^^^ + + This port was performed on the Arduino Due Rev 2 board. NuttX users + have reported issues with the serial port on his Arduino Due Rev 3 board. + That problem was resolved as by configuring the UART0 RXD with a pull-up + (see include/board.h). That fix as well as any others that we may find + will be enabled by selecting + + CONFIG_ARDUINO_DUE_REV3=y + +ITEAD 2.4" TFT with Touch +^^^^^^^^^^^^^^^^^^^^^^^^^ + + The Arduino 2.4" TFT Touch Shield is designed for all the Arduino + compatible boards. It works in 3.3V voltage level. It can be directly + plugged on the Arduino and other compatible boards. It will offer + display, touch and storage functions for the Arduino board + + Features: + + 1. Compatible with 3.3/5V operation voltage level + 2. Compatible with UTFT library + 3. With SD Card Socket + + The Arduino 2.4" TFT Touch shield uses the S6D1121 controller , it + supports 8-bit data interface. The touch IC is XPT2046. + + NOTE: When used with the ITEAD shield, the power from the USB connector + seems to be inefficient (for example, I lose the USB connection when I + insert an SD card). I recommend using a 7-12V power supply with the + Arduino in this case. + + Connector: + + ---------- --------------------------- ----------- --------------------------- ------------------ + Arduino ATSAM3X Due ITHEAD + Due PIN GPIO FUNCTION SIGNAL PIN SIGNAL NOTES + ---------- ---- ---------------------- ----------- ---------------- ---------- ------------------ + PWMH + 10 SCL1 PA18 TWCK0/A20/WKUP9 SCL1 --- --- --- SCL not available + 9 SDA1 PA17 TWD0SPCK0 SDA1 --- --- --- SDA not available + 8 Aref --- --- AREF J2 pin 8 Vref N/C --- + 7 GND --- --- GND J2 pin 7 GND --- --- + 6 PWM13 PB27 SPI0_SPCK/A20/WKUP10 PWM13 J2 pin 6 D13 SD_SCK SCK, also LED "L", Pulled low + 5 PWM12 PD8 A21/NANDALE/TIOB8 PWM12 J2 pin 5 D12 SD_MISO MISO not available + 4 PWM11 PD7 A17/BA1/TIOA8 PWM11 J2 pin 4 D11 SD_MOSI MOSI not available, Pulled low + 3 PWM10 PA28 SPI0_NPCS0/PCK2/WKUP11 SS0/PWM10 J2 pin 3 D10 SD_CS Pulled low on-board + 2 PWM9 PC21 A0/NBS0/PWML4 PWM9 J2 pin 2 D9 Touch_Dout --- + 1 PWM8 PC22 A1/PWML5 PWM8 J2 pin 1 D8 Touch_IRQ --- + + PWML + 8 PWM7 PC23 A2/PWML6 PWM7 J3 pin 8 D7 DB15 --- + 7 PWM6 PC24 A3/PWML7 PWM6 J3 pin 7 D6 DB14 --- + 6 PWM5 PC25 A4/TIOA6 PWM5 J3 pin 6 D5 DB13 --- + 5 PWM4 PC26 A5/TIOB6 SS1/PWM4 J3 pin 5 D4 DB12 --- + 4 PWM3 PC28 A7/TIOA7 PWM3 J3 pin 4 D3 DB11 --- + 3 PWM2 PB25 RTS0/TIOA0 PWM2 J3 pin 3 D2 DB10 --- + 2 PWM1 PA9 UTXD/PWMH3 TX J3 pin 2 D1 DB9 UART0 TX + 1 PWM0 PA8 URXD/PWMH0/WKUP4 RX J3 pin 1 D0 DB8 UART0 RX + ---------- ---- ---------------------- ----------- ---------------- ---------- ------------------ + POWER + 1 --- --- --- --- --- --- --- --- + 2 IOref --- --- IOREF +3V3 --- --- --- --- + 3 RESET --- --- MASTER_RESET J4 pin 1 RST --- --- + 5 5V --- --- +5V J4 pin 2 3.3V --- --- + 4 3.3V --- --- +3V3 J4 pin 3 5V --- --- + 6 GND --- --- GND J4 pin 4 GND --- --- + 7 GND --- --- GND J4 pin 5 GND --- --- + 8 Vin --- --- VIN J4 pin 6 Vin --- --- + ADCL + 1 A0 PA16 SPCK1/TD/AD7 AD0 J1 pin 1 A0/D14 Touch_Din --- + 2 A1 PA24 MCDA3/PCK1/AD6 AD1 J1 pin 2 A1/D15 Touch_CLK --- + 3 A2 PA23 MCDA2/TCLK4/AD5 AD2 J1 pin 3 A2/D16 --- --- + 4 A3 PA22 MCDA1/TCLK3/AD4 AD3 J1 pin 4 A3/D17 TFT_CS --- + 5 A4 PA6 TIOB2/NCS0/AD3 AD4 J1 pin 5 A4/D18 TFT_WR --- + 6 A5 PA4 TCLK1/NWAIT/AD2 AD5 J1 pin 6 A5/D19 TFT_RS --- + 7 A6 PA3 TIOB1/PWMFI1/AD1/WKUP1 AD6 --- --- --- --- + 8 A7 PA2 TIOA1/NANDRDY/AD0 AD7 --- --- --- --- + ---------- ---- ---------------------- ----------- ---------------- ---------- ------------------ + + NOTES: + + 1. It is not possible to use any of the SPI devices on the Shield unless + a bit-bang SPI interface is used. This includes the touch controller + a bit-bang SPI interface is used. This includes the touch controller + and the SD card. + 2. UART0 cannot be used. USARTs on the COMM connector should be available. + 3. Parallel data is not contiguous in the PIO register + 4. Touchcontroller /CS pin is connected to ground (always selected). + 5. Either PA28 or PC29 may drive PWM10 + 6. The schematics I have do not agree with the documentation. The Touch IRQ + and Dout pins are reversed in the Documentation (D9 an D8, respectively). + I am assuming that the schematic is correct (and the schematic does seem + to match up with what little I can see on the single visible side of the + board). + + SD Interface: + + ------------ ------------------ ------- ------------- ------------------ ------- + SD CONNECTOR ARDUINO CONNECTORS AT91SAM SD CONNECTOR ARDUINO CONNECTORS AT91SAM + PIN SIGNAL PIN SIGNAL GPIO PIN SIGNAL PIN SIGNAL GPIO + --- -------- -------- --------- -------- ---- -------- -------- --------- ------- + 1 /CS J2 pin 3 D10 PA28 2 DI J2 pin 4 D11 PD7 + 3 GND --- --- --- 4 VCC --- --- --- + 5 CLK J2 pin 6 D13 PB27 6 GND --- --- --- + 7 DO J2 pin 5 D12 PD8 8 IRQ N/C --- --- + 9 N/C --- --- --- 10 SW N/C --- --- + 11 WP N/C --- --- 12 CD N/C --- --- + 13 CD N/C --- --- 14 GND --- --- --- + 15 GND --- --- --- 16 GND --- --- --- + --- -------- -------- --------- -------- ---- -------- -------- --------- ------- + + NOTES: + - The SD slot shares the pin with LED "L" so LED support must be disabled to + use the MMC/SD card on the ITEAD shield. + - Either PA28 or PC29 may drive D10 + + Touch Controller Interface: + + ----------- ------------------ -------- ------------- ------------------ ------- + XPT2046 ARDUINO CONNECTORS AT91SAM XPT2046 ARDUINO CONNECTORS AT91SAM + PIN SIGNAL PIN SIGNAL GPIO PIN SIGNAL PIN SIGNAL GPIO + --- ------- -------- --------- -------- ---- -------- -------- --------- ------- + 1 VCC --- --- --- 2 X+ --- --- --- + 3 Y+ --- --- --- 4 X- --- --- --- + 5 Y- --- --- --- 6 GND --- --- --- + 7 IN3 N/C --- --- 8 IN4 N/C --- --- + 9 VREF --- --- --- 10 VCC --- --- --- + 11 IRQ J2 pin 2 D9 PC21 12 DOUT J2 pin 1 D8 PC22 + 13 BUSY N/C --- --- 14 DIN J1 pin 1 A0/D15 PA16 + 15 /CS --- --- --- 16 DCLK J1 pin 2 A1/D15 PA24 + --- ------- -------- --------- -------- ---- -------- -------- --------- ------- + + NOTES: + - /CS is connected to ground (XPT2046 is always selected) + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, ok + 4. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery, devkitARM or Raisonance GNU toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : Generic GCC ARM EABI toolchain for Windows + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also + have to modify the PATH in the setenv.h file if your make cannot find the + tools. + + NOTE about Windows native toolchains + ------------------------------------ + + The CodeSourcery (for Windows), Atollic, and devkitARM toolchains are + Windows native toolchains. The CodeSourcery (for Linux), NuttX buildroot, + and, perhaps, the generic GCC toolchains are Cygwin and/or Linux native + toolchains. There are several limitations to using a Windows based + toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/sam34, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/sam34/sam_vectors.S. You may need to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.shsam4s-xplained/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toolchain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +Buttons and LEDs +^^^^^^^^^^^^^^^^ + + Buttons + ------- + There are no buttons on the Arduino Due board. + + LEDs + ---- + There are three user-controllable LEDs on board the Arduino Due board: + + LED GPIO + ---------------- ----- + L Amber LED PB27 + TX Yellow LED PA21 + RX Yellow LED PC30 + + LED L is connected to ground and can be illuminated by driving the PB27 + output high. The TX and RX LEDs are pulled high and can be illuminated by + driving the corresponding + GPIO output to low. + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + events as follows: + + SYMBOL MEANING LED STATE + L TX RX + ------------------- ----------------------- -------- -------- -------- + LED_STARTED NuttX has been started OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF OFF + LED_IRQSENABLED Interrupts enabled OFF OFF OFF + LED_STACKCREATED Idle stack created ON OFF OFF + LED_INIRQ In an interrupt N/C GLOW OFF + LED_SIGNAL In a signal handler N/C GLOW OFF + LED_ASSERTION An assertion failed N/C GLOW OFF + LED_PANIC The system has crashed N/C N/C Blinking + LED_IDLE MCU is is sleep mode ------ Not used -------- + + Thus if LED L is statically on, NuttX has successfully booted and is, + apparently, running normally. If LED RX is glowing, then NuttX is + handling interrupts (and also signals and assertions). If TX is flashing + at approximately 2Hz, then a fatal error has been detected and the system + has halted. + +Serial Consoles +^^^^^^^^^^^^^^^ + + The SAM3X has a UART and 4 USARTS. The Programming port uses a USB-to- + serial chip connected to the first UART0 of the MCU (RX0 and TX0). The + output from that port is visible using the Arduino tool. + + Any of UART and USART0-3 may be used as a serial console. By default, + the UART is used as the serial console in all configurations. But that is + easily changed by modifying the configuration as described under + "Configurations" below. + + Here are the UART signals available on pins. Under signal name, the first + column is the name on the schematic associated with the GPIO, the second + comes from: http://arduino.cc/en/Hacking/PinMappingSAM3X, and the third + is the name of the multiplexed SAM3X UART function from the data sheet. + This is more than a little confusing. + + ------------------------------------------------------------------ + PIO SIGNAL NAME CONNECTOR PIN + DUE SCHEM. PIN MAPPING SAM3X DUE SCHEM. BOARD LABEL + ----- ---------- -------------- ----------- ---------- ----------- + PA8 [U]RX RX0 UART0 URXD PWML 1 RX0<-0 + PA9 [U]TX TX0 UART0 UTXD PWML 2 TX0->1 + PD5 RXD0 RX3 USART3 RXD3 COMM 2 RX3 + PD4 TXD0 TX3 USART3 TXD3 COMM 1 TX3 + PA12 RXD1 RX2 USART1 RXD1 COMM 4 TX2 + PA13 TXD1 TX2 USART1 TXD1 COMM 3 RX2 + PA10 RXD2 RX1 USART0 RXD0 COMM 6 RX1 + PA11 TXD2 TX1 USART0 TXD0 COMM 5 TX1 + PB21 AD14(RXD3) Digital Pin 52 USART2 RXD2 XIO 33 33 + PB20 AD11(TXD3) Analog In 11 USART2 TXD2 ADCH 4 A11 + + The outputs from these pins is 3.3V. You will need to connect RS232 + transceiver to get the signals to RS232 levels (or connect to the + USB virual COM port in the case of UART0). + +Loading Code +^^^^^^^^^^^^ + + Installing the Arduino USB Driver under Windows: + ------------------------------------------------ + 1. Download the Windows version of the Arduino software, not the 1.0.x + release but the latest 1.5.x that supports the Due. When the download + finishes, unzip the downloaded file. + 2. Connect the Due to your computer with a USB cable via the Programming port. + 3. The Windows driver installation should fail. + 4. Open the Device Manger + 5. Look for the listing named "Ports (COM & LPT)". You should see an open + port named "Arduino Due Prog. Port". + 6 Select the "Browse my computer for Driver software" option. + 7. Right click on the "Arduino Due Prog. Port" and choose "Update Driver + Software". + 8. Navigate to the folder with the Arduino IDE you downloaded and unzipped + earlier. Locate and select the "Drivers" folder in the main Arduino folder + (not the "FTDI USB Drivers" sub-directory). + + Uploading NuttX to the Due Using Bossa: + --------------------------------------- + I don't think this can be done because the Arduino software is so dedicated + to "sketches". However, Arduino uses BOSSA under the hood to load code and + you can use BOSSA outside of Arduino. + + Uploading NuttX to the Due Using Bossa: + --------------------------------------- + Where do you get it? + Generic BOSSA installation files are available here: + http://sourceforge.net/projects/b-o-s-s-a/?source=dlp + + However, DUE uses a patched version of BOSSA available as source code here: + https://github.com/shumatech/BOSSA/tree/arduino + + But, fortunately, since you already installed Arduino, you already have + BOSSA installed. In my installation, it is here: + + C:\Program Files (x86)\Arduino\arduino-1.5.2\hardware\tools\bossac.exe + + General Procedure + ----------------- + + 1) Erase the FLASH and put the Due in bootloader mode + 2) Write the file to FLASH + 3) Configure to boot from FLASH + 4) Reset the DUE + + Erase FLASH and Put the Due in Bootloader Mode + ---------------------------------------------- + This is accomplished by simply configuring the programming port in 1200 + baud and sending something on the programming port. Here is some sample + output from a Windows CMD.exe shell. NOTE that my Arduino programming + port shows up as COM26. It may be different on your system. + + To enter boot mode, set the baud to 1200 and send anything to the + programming port: + + C:\Program Files (x86)\Arduino\arduino-1.5.2\hardware\tools>mode com26:1200,n,8,1 + + Status for device COM26: + ------------------------ + Baud: 1200 + Parity: None + Data Bits: 8 + Stop Bits: 1 + Timeout: ON + XON/XOFF: OFF + CTS handshaking: OFF + DSR handshaking: OFF + DSR sensitivity: OFF + DTR circuit: ON + RTS circuit: ON + + C:\Program Files (x86)\Arduino\arduino-1.5.2\hardware\tools>bossac.exe --port=COM26 -U false -i + Device : ATSAM3X8 + Chip ID : 285e0a60 + Version : v1.1 Dec 15 2010 19:25:04 + Address : 524288 + Pages : 2048 + Page Size : 256 bytes + Total Size : 512KB + Planes : 2 + Lock Regions : 32 + Locked : none + Security : false + Boot Flash : false + + Writing FLASH and Setting FLASH Boot Mode + ----------------------------------------- + In a Cygwin BaSH shell: + + export PATH="/cygdrive/c/Program Files (x86)/Arduino/arduino-1.5.2/hardware/tools":$PATH + + Erasing, writing, and verifying FLASH with bossac: + + $ bossac.exe --port=COM26 -U false -e -w -v -b nuttx.bin -R + Erase flash + Write 86588 bytes to flash + [==============================] 100% (339/339 pages) + Verify 86588 bytes of flash + [==============================] 100% (339/339 pages) + Verify successful + Set boot flash true + CPU reset. + + Some things that can go wrong: + + $ bossac.exe --port=COM26 -U false -e -w -v -b nuttx.bin -R + No device found on COM26 + + This error means that there is code running on the Due already so the + bootloader cannot connect. Pressing reset and trying again + + $ bossac.exe --port=COM26 -U false -e -w -v -b nuttx.bin -R + No device found on COM26 + + Sill No connection because Duo does not jump to bootloader after reset. + Press ERASE button and try again + + $ bossac.exe --port=COM26 -U false -e -w -v -b nuttx.bin -R + Erase flash + Write 86588 bytes to flash + [==============================] 100% (339/339 pages) + Verify 86588 bytes of flash + [==============================] 100% (339/339 pages) + Verify successful + Set boot flash true + CPU reset. + + Other useful bossac things operations. + ------------------------------------- + a) Write code to FLASH don't change boot mode and don't reset. This lets + you examine the FLASH contents that you just loaded while the bootloader + is still active. + + $ bossac.exe --port=COM26 -U false -e -w -v --boot=0 nuttx.bin + Write 64628 bytes to flash + [==============================] 100% (253/253 pages) + Verify 64628 bytes of flash + [==============================] 100% (253/253 pages) + Verify successful + + b) Verify the FLASH contents (the bootloader must be running) + + $ bossac.exe --port=COM26 -U false -v nuttx.bin + Verify 64628 bytes of flash + [==============================] 100% (253/253 pages) + Verify successful + + c) Read from FLASH to a file (the bootloader must be running): + + $ bossac.exe --port=COM26 -U false --read=4096 nuttx.dump + Read 4096 bytes from flash + [==============================] 100% (16/16 pages) + + d) Change to boot from FLASH + + $ bossac.exe --port=COM26 -U false --boot=1 + Set boot flash true + + Uploading NuttX to the Due Using JTAG: + ------------------------------------- + + The JTAG/SWD signals are brought out to a 10-pin header JTAG connector: + + PIN SIGNAL JTAG STANDARD NOTES + --- -------------- ----------------- -------------------------------- + 1 3.3V VTref + 2 JTAG_TMS SWDIO/TMS SAM3X pin 31, Pulled up on board + 3 GND GND + 4 JTAG_TCK SWDCLK/TCK SAM3X pin 28, Pulled up on board + 5 GND GND + 6 JTAG_TDO SWO/EXta/TRACECTL SAM3X pin 30, ulled up on board + 7 N/C Key + 8 JTAG_TDI NC/EXTb/TDI SAM3X pin 29, Pulled up on board + 9 GND GNDDetect + 10 MASTER-RESET nReset + + You should be able to use a 10- to 20-pin adapter to connect a SAM-ICE + debugger to the Arduino Due. I have this Olimex adapter: + https://www.olimex.com/Products/ARM/JTAG/ARM-JTAG-20-10/ . But so far I + have been unable to get the get the SAM-ICE to communicate with the Due. + +Arduino DUE-specific Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="sam34" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_SAM34 + CONFIG_ARCH_CHIP_SAM3X + CONFIG_ARCH_CHIP_ATSAM3X8E + + CONFIG_ARCH_BOARD - Identifies the configs/ subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=arduino-due (for the Arduino Due development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_ARDUINO_DUE=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00008000 (32Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibrate + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_SAM34_RTC - Real Time Clock + CONFIG_SAM34_RTT - Real Time Timer + CONFIG_SAM34_WDT - Watchdog Timer + CONFIG_SAM34_UART0 - UART 0 + CONFIG_SAM34_SMC - Static Memory Controller + CONFIG_SAM34_SDRAMC - SDRAM Controller + CONFIG_SAM34_USART0 - USART 0 + CONFIG_SAM34_USART1 - USART 1 + CONFIG_SAM34_USART2 - USART 2 + CONFIG_SAM34_USART3 - USART 3 + CONFIG_SAM34_HSMCI - High Speed Multimedia Card Interface + CONFIG_SAM34_TWI0 - Two-Wire Interface 0 (master/slave) + CONFIG_SAM34_TWI1 - Two-Wire Interface 1 (master/slave) + CONFIG_SAM34_SPI0 - Serial Peripheral Interface 0 + CONFIG_SAM34_SPI1 - Serial Peripheral Interface 1 + CONFIG_SAM34_SSC - Synchronous Serial Controller + CONFIG_SAM34_TC0 - Timer Counter 0 + CONFIG_SAM34_TC1 - Timer Counter 1 + CONFIG_SAM34_TC2 - Timer Counter 2 + CONFIG_SAM34_TC3 - Timer Counter 3 + CONFIG_SAM34_TC4 - Timer Counter 4 + CONFIG_SAM34_TC5 - Timer Counter 5 + CONFIG_SAM34_TC6 - Timer Counter 6 + CONFIG_SAM34_TC7 - Timer Counter 7 + CONFIG_SAM34_TC8 - Timer Counter 8 + CONFIG_SAM34_PWM - Pulse Width Modulation + CONFIG_SAM34_ADC12B - 12-bit Analog To Digital Converter + CONFIG_SAM34_DACC - Digital To Analog Converter + CONFIG_SAM34_DMAC0 - DMA Controller + CONFIG_SAM34_UOTGHS - USB OTG High Speed + CONFIG_SAM34_TRNG - True Random Number Generator + CONFIG_SAM34_EMAC - Ethernet MAC + CONFIG_SAM34_CAN0 - CAN Controller 0 + CONFIG_SAM34_CAN1 - CAN Controller 1 + + Some subsystems can be configured to operate in different ways. The drivers + need to know how to configure the subsystem. + + CONFIG_SAM34_GPIOA_IRQ + CONFIG_SAM34_GPIOB_IRQ + CONFIG_SAM34_GPIOC_IRQ + CONFIG_SAM34_GPIOD_IRQ + CONFIG_SAM34_GPIOE_IRQ + CONFIG_SAM34_GPIOF_IRQ + CONFIG_USART0_ISUART + CONFIG_USART1_ISUART + CONFIG_USART2_ISUART + CONFIG_USART3_ISUART + + ST91SAM4S specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + +Configurations +^^^^^^^^^^^^^^ + + Each SAM4S Xplained configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh arduino-due/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that BUILDROOT_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on UART0 which is available both on the USB virtual COM port + and on the PWML connector (see the section "Serial Consoles" above). + + However, the pin usage by the ITEAD TFT shield conflict with the pin + usage for UART0. In this case you need to switch to USART0 by + modifying the configuration as follows: + + Board Selection -> Peripheral + CONFIG_SAM34_UART0=n : Disable UART0. Can't use with this shield + CONFIG_SAM34_USART0=y : Enable USART0 + CONFIG_USART0_ISUART=y + + Device Drivers -> Serial + CONFIG_USART0_SERIAL_CONSOLE=y : Configure the console on USART0 + CONFIG_USART0_RXBUFSIZE=256 + CONFIG_USART0_TXBUFSIZE=256 + CONFIG_USART0_BAUD=115200 + CONFIG_USART0_BITS=8 + CONFIG_USART0_PARITY=0 + CONFIG_USART0_2STOP=0 + + NOTE: USART0 TTL levels are available on COMM 5 (TXD0) and COMM 6 (RXD0). + + 3. Unless otherwise stated, the configurations are setup for + Linux (or any other POSIX environment like Cygwin under Windows): + + Build Setup: + CONFIG_HOST_LINUX=y : Linux or other POSIX environment + + 4. These configurations use the older, OABI, buildroot toolchain. But + that is easily reconfigured: + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot toolchain + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : Older, OABI toolchain + + If you want to use the Atmel GCC toolchain, here are the steps to + do so: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_HOST_CYGWIN=y : Using Cygwin or other POSIX environment + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : General GCC EABI toolchain under windows + + This re-configuration should be done before making NuttX or else the + subsequent 'make' will fail. If you have already attempted building + NuttX then you will have to 1) 'make distclean' to remove the old + configuration, 2) 'cd tools; ./configure.sh sam3u-ek/ksnh' to start + with a fresh configuration, and 3) perform the configuration changes + above. + + Also, make sure that your PATH variable has the new path to your + Atmel tools. Try 'which arm-none-eabi-gcc' to make sure that you + are selecting the right tool. setenv.sh is available for you to + use to set or PATH variable. The path in the that file may not, + however, be correct for your installation. + + See also the "NOTE about Windows native toolchains" in the section call + "GNU Toolchain Options" above. + +Configuration sub-directories +----------------------------- + + nsh: + This configuration directory will built the NuttShell. See NOTES above. + + NOTES: + 1. NSH built-in applications are supported. However, there are + no built-in applications built with the default configuration. + + Binary Formats: + CONFIG_BUILTIN=y : Enable support for built-in programs + + Applicaton Configuration: + CONFIG_NSH_BUILTIN_APPS=y : Enable starting apps from NSH command line + + 2. By default, this configuration uses UART0 and has support LEDs + enabled. UART0 output is available on the USB debugging port or + on pins 0-1 of the PWML connector. + + This configuration can be modified to use peripherals on the ITEAD + TFT shield as described below. However, in that case the UART0 and + LED "L" GPIO pins conflict with the pin usage by the ITEAD TFT + Shield. In this case you need to switch to USART0 and disable LEDs + by modifying the configuration as follows: + + Board Selection -> Peripheral + CONFIG_SAM34_UART0=n : Disable UART0. Can't use with this shield + CONFIG_SAM34_USART0=y : Enable USART0 + CONFIG_USART0_ISUART=y + + Device Drivers -> Serial + CONFIG_USART0_SERIAL_CONSOLE=y : Configure the console on USART0 + CONFIG_USART0_RXBUFSIZE=256 + CONFIG_USART0_TXBUFSIZE=256 + CONFIG_USART0_BAUD=115200 + CONFIG_USART0_BITS=8 + CONFIG_USART0_PARITY=0 + CONFIG_USART0_2STOP=0 + + NOTE: USART0 TTL levels are available on COMM 5 (TXD0) and + COMM 6 (RXD0) + + Board Selection -> Board-Specific Options: + CONFIG_ARCH_LEDS=n : Can't support LEDs with this shield installed + CONFIG_ARDUINO_ITHEAD_TFT=y : Enable support for the Shield + + 3. If the ITEAD TFT shield is connected to the Arduino Due, then + support for the SD card slot can be enabled by making the following + changes to the configuration: + + NOTE: You cannot use UART0 or LEDs with this ITEAD module. You must + switch to USART0 and disable LED support as described above. + + Board Selection -> Board-Specific Options: + CONFIG_ARDUINO_ITHEAD_TFT=y : Enable support for the Shield + + File Systems: + CONFIG_DISABLE_MOUNTPOINT=n : Mountpoint support is needed + CONFIG_FS_FAT=y : Enable the FAT file system + CONFIG_FAT_LCNAMES=y : Enable upper/lower case 8.3 file names (Optional, see below) + CONFIG_FAT_LFN=y : Enable long file named (Optional, see below) + CONFIG_FAT_MAXFNAME=32 : Maximum supported file name length + + There are issues related to patents that Microsoft holds on FAT long + file name technologies. See the top level COPYING file for further + details. + + Device Drivers + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + CONFIG_SPI_BITBANG=y : Enable SPI bit-bang support + + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMCSD_NSLOTS=1 : Only one MMC/SD card slot + CONFIG_MMCSD_MULTIBLOCK_DISABLE=n : Should not need to disable multi-block transfers + CONFIG_MMCSD_HAVECARDDETECT=y : I/O1 module as a card detect GPIO + CONFIG_MMCSD_SPI=y : Use the SPI interface to the MMC/SD card + CONFIG_MMCSD_SPICLOCK=20000000 : This is a guess for the optimal MMC/SD frequency + CONFIG_MMCSD_SPIMODE=0 : Mode 0 is required + + Board Selection -> Common Board Options + CONFIG_NSH_ARCHINIT=y : Initialize the MMC/SD slot when NSH starts + CONFIG_NSH_MMCSDSLOTNO=0 : Only one MMC/SD slot, slot 0 + CONFIG_NSH_MMCSDSPIPORTNO=0 : (does not really matter in this case) + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : Board has architecture-specific initialization + + STATUS: + 2013-7-2: SD card is not responding. All 0's received on SPI. + + 3. This configuration has been used for verifying the touchscreen on + on the ITEAD TFT Shield. With the modifications below, you can + include the touchscreen test program at apps/examples/touchscreen as + an NSH built-in application. You can enable the touchscreen and test + by modifying the default configuration in the following ways: + + NOTE: You cannot use UART0 or LEDs with this ITEAD module. You must + switch to USART0 and disable LED support as described above. + + Board Selection -> Board-Specific Options: + CONFIG_ARDUINO_ITHEAD_TFT=y : Enable support for the Shield + + Device Drivers + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + CONFIG_SPI_BITBANG=y : Enable SPI bit-bang support + + CONFIG_INPUT=y : Enable support for input devices + CONFIG_INPUT_ADS7843E=y : Enable support for the XPT2046 + CONFIG_ADS7843E_SPIDEV=0 : (Doesn't matter) + CONFIG_ADS7843E_SPIMODE=0 : Use SPI mode 0 + CONFIG_ADS7843E_FREQUENCY=1000000 : SPI BAUD 1MHz + CONFIG_ADS7843E_SWAPXY=y : If landscape orientation + CONFIG_ADS7843E_THRESHX=51 : These will probably need to be tuned + CONFIG_ADS7843E_THRESHY=39 + + System Type: + CONFIG_SAM34_GPIO_IRQ=y : GPIO interrupt support + CONFIG_SAM34_GPIOC_IRQ=y : Enable GPIO interrupts from port C + + RTOS Features: + CONFIG_DISABLE_SIGNALS=n : Signals are required + + Library Support: + CONFIG_SCHED_WORKQUEUE=y : Work queue support required + + Applicaton Configuration: + CONFIG_EXAMPLES_TOUCHSCREEN=y : Enable the touchscreen built-int test + + Defaults should be okay for related touchscreen settings. Touchscreen + debug output on USART0 can be enabled with: + + Build Setup: + CONFIG_DEBUG=y : Enable debug features + CONFIG_DEBUG_VERBOSE=y : Enable verbose debug output + CONFIG_DEBUG_INPUT=y : Enable debug output from input devices + + STATUS: + 2013-7-2: TSC is not responding. All 0's received on SPI. diff --git a/configs/arduino-due/include/board.h b/configs/arduino-due/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..8f3bd90e9ce4c75ce0193f67b554a6cb2485956c --- /dev/null +++ b/configs/arduino-due/include/board.h @@ -0,0 +1,262 @@ +/************************************************************************************ + * configs/arduino-due/include/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_ARDUINO_DUE_INCLUDE_BOARD_H +#define __CONFIGS_ARDUINO_DUE_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# include +# ifdef CONFIG_SAM34_GPIO_IRQ +# include +# endif +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAM3X device is running on a 4MHz internal RC. These + * definitions will configure clocking + * + * MAINOSC: Frequency = 12MHz (crysta) + * PLLA: PLL Divider = 1, Multiplier = 14 to generate PLLACK = 168MHz + * Master Clock (MCK): Source = PLLACK, Prescalar = 1 to generate MCK = 84MHz + * CPU clock: 84MHz + */ + +#define BOARD_32KOSC_FREQUENCY (32768) +#define BOARD_SCLK_FREQUENCY (BOARD_32KOSC_FREQUENCY) +#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Divider = 1 + * Multipler = 14 + */ + +#define BOARD_CKGR_PLLAR_MUL (13 << PMC_CKGR_PLLAR_MUL_SHIFT) +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS + +/* PMC master clock register settings. + * + * Source = PLLA + * Divider = 2 + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV2 + +/* USB UTMI PLL start-up time */ + +#define BOARD_CKGR_UCKR_UPLLCOUNT (3 << PMC_CKGR_UCKR_UPLLCOUNT_SHIFT) + +/* Resulting frequencies */ + +#define BOARD_PLLA_FREQUENCY (168000000) /* PLLACK: 14 * 12Mhz / 1 */ +#define BOARD_MCK_FREQUENCY (84000000) /* MCK: PLLACK / 2 */ +#define BOARD_CPU_FREQUENCY (84000000) /* CPU: MCK */ + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV+1)). + * + * MCI_SPEED = MCCK / (2*(CLKDIV+1)) + * CLKDIV = MCCK / MCI_SPEED / 2 - 1 + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 84MHz, CLKDIV = 104, MCI_SPEED = 84MHz / 2 * (104+1) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (104 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 84MHz, CLKDIV = 2, MCI_SPEED = 84MHz / 2 * (2+1) = 14 MHz */ + +#define HSMCI_MMCXFR_CLKDIV (1 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 84MHz, CLKDIV = 1, MCI_SPEED = 84MHz / 2 * (1+1) = 21 MHz */ + +#define HSMCI_SDXFR_CLKDIV (1 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/* FLASH wait states + * + * FWS MAX FREQUENCY + * 1.62V 1.8V + * --- ----- ------ + * 0 17MHz 19MHz + * 1 45MHz 50MHz + * 2 58MHz 64MHz + * 3 70MHz 80MHz + * 4 78MHz 90MHz + */ + +#define BOARD_FWS 4 + +/* LED definitions ******************************************************************/ +/* There are three user-controllable LEDs on board the Arduino Due board: + * + * LED GPIO + * ---------------- ----- + * L Amber LED PB27 + * TX Yellow LED PA21 + * RX Yellow LED PC30 + * + * LED L is connected to ground and can be illuminated by driving the PB27 + * output high. The TX and RX LEDs are pulled high and can be illuminated by + * driving the corresponding + * GPIO output to low. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED_L 0 +#define BOARD_LED_RX 1 +#define BOARD_LED_TX 2 +#define BOARD_NLEDS 3 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_L_BIT (1 << BOARD_LED_L) +#define BOARD_LED_RX_BIT (1 << BOARD_LED_RX) +#define BOARD_LED_TX_BIT (1 << BOARD_LED_TX) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL MEANING LED STATE + * L TX RX + * ----------------------- -------------------------- -------- -------- -------- */ +#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF OFF OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON OFF OFF */ +#define LED_INIRQ 2 /* In an interrupt N/C GLOW OFF */ +#define LED_SIGNAL 2 /* In a signal handler N/C GLOW OFF */ +#define LED_ASSERTION 2 /* An assertion failed N/C GLOW OFF */ +#define LED_PANIC 3 /* The system has crashed N/C N/C Blinking */ +#define LED_PANIC 3 /* MCU is is sleep mode ------ Not used -------- */ + +/* Thus if LED L is statically on, NuttX has successfully booted and is, + * apparently, running normmally. If LED RX is glowing, then NuttX is + * handling interrupts (and also signals and assertions). If TX is flashing + * at approximately 2Hz, then a fatal error has been detected and the system + */ + +/* Button definitions ***************************************************************/ +/* There are no buttons on the Arduino Due board. */ + +/* GPIO pin configurations **********************************************************/ + +#if 1 /* #ifdef CONFIG_ARDUINO_DUE_REV3 works with REV2 as well */ +/* This port was performed on the Arduino Due Rev 2 board. A NuttX user reported + * issues with the serial port on his Aduino Due Rev 3 board. That problem was + * resolved as follows: + * + * "... The issue was in my hardware. I found the difference between Arduino + * Due shematics (revision R2) and actual PCB layout of my Arduino (revision + * R3). On a schematics which I download from arduino.cc was shown that 2nd + * pin of IC10 is connected to the ground, but on my Arduino the 2nd pin + * of IC10 was connected to its 1st pin instead of ground and in my case + * IC10 works in open-drain mode, but RX0 pin on SAM3x doesn't have pull-up + * and thus TX signal from AtMega16U2 can't reach the SAM3x input pin, on + * this pin always '0'. + * + * "My solution is to enable internal pull-up in SAM3x. ... + * Now shell console on UART0 (via USB programming connector) of Arduino Due + * Due works as expected." + */ + +# undef GPIO_UART0_RXD +# define GPIO_UART0_RXD (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOA | \ + GPIO_PIN8 | GPIO_CFG_PULLUP) +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3X architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_ARDUINO_DUE_INCLUDE_BOARD_H */ diff --git a/configs/arduino-due/nsh/Make.defs b/configs/arduino-due/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..d31a08dd18a8e3f9a28cc637c4c0ba55b5e36f2a --- /dev/null +++ b/configs/arduino-due/nsh/Make.defs @@ -0,0 +1,109 @@ +############################################################################ +# configs/arduino-due/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/arduino-due/nsh/defconfig b/configs/arduino-due/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..7fdcc2c51cccd60bd847f7fd40532522972d0236 --- /dev/null +++ b/configs/arduino-due/nsh/defconfig @@ -0,0 +1,904 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +CONFIG_ARCH_CHIP_SAM34=y +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="sam34" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTNOR=y +CONFIG_ARCH_HAVE_EXTSRAM0=y +CONFIG_ARCH_HAVE_EXTSRAM1=y + +# +# AT91SAM3/4 Configuration Options +# +# CONFIG_ARCH_CHIP_ATSAM3U4E is not set +# CONFIG_ARCH_CHIP_ATSAM3U4C is not set +# CONFIG_ARCH_CHIP_ATSAM3U2E is not set +# CONFIG_ARCH_CHIP_ATSAM3U2C is not set +# CONFIG_ARCH_CHIP_ATSAM3U1E is not set +# CONFIG_ARCH_CHIP_ATSAM3U1C is not set +CONFIG_ARCH_CHIP_ATSAM3X8E=y +# CONFIG_ARCH_CHIP_ATSAM3X8C is not set +# CONFIG_ARCH_CHIP_ATSAM3X4E is not set +# CONFIG_ARCH_CHIP_ATSAM3X4C is not set +# CONFIG_ARCH_CHIP_ATSAM3A8C is not set +# CONFIG_ARCH_CHIP_ATSAM3A4C is not set +# CONFIG_ARCH_CHIP_ATSAM4CMP16B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4A is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32B is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16B is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S16C is not set +# CONFIG_ARCH_CHIP_ATSAM4S16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S8C is not set +# CONFIG_ARCH_CHIP_ATSAM4S8B is not set +# CONFIG_ARCH_CHIP_ATSAM4E16E is not set +# CONFIG_ARCH_CHIP_ATSAM4E16C is not set +# CONFIG_ARCH_CHIP_ATSAM4E8E is not set +# CONFIG_ARCH_CHIP_ATSAM4E8C is not set +# CONFIG_ARCH_CHIP_SAM3U is not set +CONFIG_ARCH_CHIP_SAM3X=y +# CONFIG_ARCH_CHIP_SAM3A is not set +# CONFIG_ARCH_CHIP_SAM4CM is not set +# CONFIG_ARCH_CHIP_SAM4L is not set +# CONFIG_ARCH_CHIP_SAM4E is not set +# CONFIG_ARCH_CHIP_SAM4S is not set + +# +# AT91SAM3/4 Peripheral Support +# +# CONFIG_SAM34_ADC12B is not set +# CONFIG_SAM34_CAN0 is not set +# CONFIG_SAM34_CAN1 is not set +# CONFIG_SAM34_DACC is not set +# CONFIG_SAM34_DMAC0 is not set +# CONFIG_SAM34_DMAC1 is not set +# CONFIG_SAM34_EMAC is not set +# CONFIG_SAM34_HSMCI is not set +# CONFIG_SAM34_PWM is not set +# CONFIG_SAM34_RTC is not set +# CONFIG_SAM34_RTT is not set +# CONFIG_SAM34_SDRAMC is not set +# CONFIG_SAM34_SMC is not set +# CONFIG_SAM34_SPI0 is not set +# CONFIG_SAM34_SPI1 is not set +# CONFIG_SAM34_SSC is not set +# CONFIG_SAM34_TC0 is not set +# CONFIG_SAM34_TC1 is not set +# CONFIG_SAM34_TC2 is not set +# CONFIG_SAM34_TC3 is not set +# CONFIG_SAM34_TC4 is not set +# CONFIG_SAM34_TC5 is not set +# CONFIG_SAM34_TC6 is not set +# CONFIG_SAM34_TC7 is not set +# CONFIG_SAM34_TC8 is not set +# CONFIG_SAM34_TRNG is not set +# CONFIG_SAM34_TWI is not set +# CONFIG_SAM34_TWIM is not set +# CONFIG_SAM34_TWIS is not set +# CONFIG_SAM34_TWIM0 is not set +# CONFIG_SAM34_TWIS0 is not set +# CONFIG_SAM34_TWIM1 is not set +# CONFIG_SAM34_TWIS1 is not set +CONFIG_SAM34_UART0=y +# CONFIG_SAM34_UOTGHS is not set +# CONFIG_SAM34_USART0 is not set +# CONFIG_SAM34_USART1 is not set +# CONFIG_SAM34_USART2 is not set +# CONFIG_SAM34_USART3 is not set +# CONFIG_SAM34_WDT is not set + +# +# AT91SAM3/4 External Memory Configuration +# +# CONFIG_SAM34_EXTNAND is not set +# CONFIG_SAM34_EXTNOR is not set +# CONFIG_SAM34_EXTSRAM0 is not set +# CONFIG_SAM34_EXTSRAM1 is not set + +# +# AT91SAM3/4 GPIO Interrupt Configuration +# +CONFIG_SAM34_HAVE_GPIOD_IRQ=y +CONFIG_SAM34_HAVE_GPIOE_IRQ=y +CONFIG_SAM34_HAVE_GPIOF_IRQ=y +# CONFIG_SAM34_GPIO_IRQ is not set +# CONFIG_SAM34_TC is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=6965 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_ARDUINO_DUE=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="arduino-due" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_ADRUINO_DUE_REV3 is not set +# CONFIG_ARDUINO_ITHEAD_TFT is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=28 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=3 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_CXX_NEWLONG=y + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/arduino-due/nsh/setenv.sh b/configs/arduino-due/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..d35b22620e1489244eae3da2a124b9cb33b7f8ac --- /dev/null +++ b/configs/arduino-due/nsh/setenv.sh @@ -0,0 +1,78 @@ +#!/bin/bash +# configs/arduino-due/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the Cygwin path to the location where I have the Arduino BOSSA program +export BOSSA_BIN="/cygdrive/c/Program Files (x86)/Arduino/arduino-1.5.2/hardware/tools" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${BOSSA_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/arduino-due/scripts/ld.script b/configs/arduino-due/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..66ba17e8d97df9c6ad4d691047ced2e8772096d5 --- /dev/null +++ b/configs/arduino-due/scripts/ld.script @@ -0,0 +1,123 @@ +/**************************************************************************** + * configs/arduino-due/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The ATSAM3X8E has 512KB of FLASH beginning at address 0x0008:0000 and + * up to 100KB SRAM in three memory regions. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00080000, LENGTH = 1024K + sram0 (rwx) : ORIGIN = 0x20000000, LENGTH = 64K + sram1 (rwx) : ORIGIN = 0x20080000, LENGTH = 32K + nfcram (rwx) : ORIGIN = 0x20100000, LENGTH = 4K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } >flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } >flash + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram0 AT > flash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > sram0 AT > flash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram0 + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/arduino-due/src/Makefile b/configs/arduino-due/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..e26901a09a1a3124f20bb5a43d575c0e3a05b6f0 --- /dev/null +++ b/configs/arduino-due/src/Makefile @@ -0,0 +1,68 @@ +############################################################################ +# configs/arduino-due/src/Makefile +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += sam_autoleds.c +else +CSRCS += sam_userleds.c +endif + +ifeq ($(CONFIG_ARDUINO_ITHEAD_TFT),y) + +ifeq ($(CONFIG_SPI_BITBANG),y) +ifeq ($(CONFIG_MMCSD_SPI),y) +CSRCS += sam_mmcsd.c +endif + +ifeq ($(CONFIG_INPUT_ADS7843E),y) +CSRCS += sam_touchscreen.c +endif +endif + +ifeq ($(CONFIG_LCD),y) +CSRCS += sam_lcd.c +endif +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += sam_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/arduino-due/src/arduino-due.h b/configs/arduino-due/src/arduino-due.h new file mode 100644 index 0000000000000000000000000000000000000000..68be762271e916f08020638a61f86693dffe17aa --- /dev/null +++ b/configs/arduino-due/src/arduino-due.h @@ -0,0 +1,339 @@ +/************************************************************************************ + * configs/arduino-due/src/arduino-due.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_ARDUINO_DUE_SRC_ARDUNO_DUE_H +#define __CONFIGS_ARDUINO_DUE_SRC_ARDUNO_DUE_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +#include +#include + +#include "chip/sam_pinmap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* There are three user-controllable LEDs on board the Arduino Due board: + * + * LED GPIO + * ---------------- ----- + * L Amber LED PB27 + * TX Yellow LED PA21 + * RX Yellow LED PC30 + * + * LED L is connected to ground and can be illuminated by driving the PB27 + * output high. The TX and RX LEDs are pulled high and can be illuminated by + * driving the corresponding + * GPIO output to low. + * + * These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL MEANING LED STATE + * L TX RX + * ------------------- ----------------------- -------- -------- -------- + * LED_STARTED NuttX has been started OFF OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF OFF + * LED_IRQSENABLED Interrupts enabled OFF OFF OFF + * LED_STACKCREATED Idle stack created ON OFF OFF + * LED_INIRQ In an interrupt N/C GLOW OFF + * LED_SIGNAL In a signal handler N/C GLOW OFF + * LED_ASSERTION An assertion failed N/C GLOW OFF + * LED_PANIC The system has crashed N/C N/C Blinking + * LED_IDLE MCU is is sleep mode ------ Not used -------- + * + * Thus if LED L is statically on, NuttX has successfully booted and is, + * apparently, running normmally. If LED RX is glowing, then NuttX is + * handling interrupts (and also signals and assertions). If TX is flashing + * at approximately 2Hz, then a fatal error has been detected and the system + */ + +#define GPIO_LED_L (GPIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOB | GPIO_PIN27) +#define GPIO_LED_RX (GPIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN30) +#define GPIO_LED_TX (GPIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOA | GPIO_PIN21) + +/* ITEAD 2.4" TFT with Touch + * + * The Arduino 2.4" TFT Touch Shield is designed for all the Arduino + * compatible boards. It works in 3.3V voltage level. It can be directly + * plugged on the Arduino and other compatible boards. It will offer + * display, touch and storage functions for the Arduino board + * + * Features: + * + * 1. Compatible with 3.3/5V operation voltage level + * 2. Compatible with UTFT library + * 3. With SD Card Socket + * + * The Arduino 2.4" TFT Touch shield uses the S6D1121 controller , it + * supports 8-bit data interface. The touch IC is TSC2046. + * + * ---------- --------------------------- ----------- --------------------------- ------------------ + * Arduino ATSAM3X Due ITHEAD + * Due PIN GPIO FUNCTION SIGNAL PIN SIGNAL NOTES + * ---------- ---- ---------------------- ----------- ---------------- ---------- ------------------ + * PWMH + * 10 SCL1 PA18 TWCK0/A20/WKUP9 SCL1 --- --- --- SCL not available + * 9 SDA1 PA17 TWD0SPCK0 SDA1 --- --- --- SDA not available + * 8 Aref --- --- AREF J2 pin 8 Vref N/C --- + * 7 GND --- --- GND J2 pin 7 GND --- --- + * 6 PWM13 PB27 SPI0_SPCK/A20/WKUP10 PWM13 J2 pin 6 D13 SD_SCK SCK, also LED "L", Pulled low + * 5 PWM12 PD8 A21/NANDALE/TIOB8 PWM12 J2 pin 5 D12 SD_MISO MISO not available + * 4 PWM11 PD7 A17/BA1/TIOA8 PWM11 J2 pin 4 D11 SD_MOSI MOSI not available, Pulled low + * 3 PWM10 PA28 SPI0_NPCS0/PCK2/WKUP11 SS0/PWM10 J2 pin 3 D10 SD_CS Pulled low on-board + * 2 PWM9 PC21 A0/NBS0/PWML4 PWM9 J2 pin 2 D9 Touch_Dout --- + * 1 PWM8 PC22 A1/PWML5 PWM8 J2 pin 1 D8 Touch_IRQ --- + * + * PWML + * 8 PWM7 PC23 A2/PWML6 PWM7 J3 pin 8 D7 DB15 --- + * 7 PWM6 PC24 A3/PWML7 PWM6 J3 pin 7 D6 DB14 --- + * 6 PWM5 PC25 A4/TIOA6 PWM5 J3 pin 6 D5 DB13 --- + * 5 PWM4 PC26 A5/TIOB6 SS1/PWM4 J3 pin 5 D4 DB12 --- + * 4 PWM3 PC28 A7/TIOA7 PWM3 J3 pin 4 D3 DB11 --- + * 3 PWM2 PB25 RTS0/TIOA0 PWM2 J3 pin 3 D2 DB10 --- + * 2 PWM1 PA9 UTXD/PWMH3 TX J3 pin 2 D1 DB9 UART0 TX + * 1 PWM0 PA8 URXD/PWMH0/WKUP4 RX J3 pin 1 D0 DB8 UART0 RX + * ---------- ---- ---------------------- ----------- ---------------- ---------- ------------------ + * POWER + * 1 --- --- --- --- --- --- --- --- + * 2 IOref --- --- IOREF +3V3 --- --- --- --- + * 3 RESET --- --- MASTER_RESET J4 pin 1 RST --- --- + * 5 5V --- --- +5V J4 pin 2 3.3V --- --- + * 4 3.3V --- --- +3V3 J4 pin 3 5V --- --- + * 6 GND --- --- GND J4 pin 4 GND --- --- + * 7 GND --- --- GND J4 pin 5 GND --- --- + * 8 Vin --- --- VIN J4 pin 6 Vin --- --- + * ADCL + * 1 A0 PA16 SPCK1/TD/AD7 AD0 J1 pin 1 A0/D14 Touch_Din --- + * 2 A1 PA24 MCDA3/PCK1/AD6 AD1 J1 pin 1 A1/D15 Touch_CLK --- + * 3 A2 PA23 MCDA2/TCLK4/AD5 AD2 J1 pin 1 A2/D16 --- --- + * 4 A3 PA22 MCDA1/TCLK3/AD4 AD3 J1 pin 1 A3/D17 TFT_CS --- + * 5 A4 PA6 TIOB2/NCS0/AD3 AD4 J1 pin 1 A4/D18 TFT_WR --- + * 6 A5 PA4 TCLK1/NWAIT/AD2 AD5 J1 pin 1 A5/D19 TFT_RS --- + * 7 A6 PA3 TIOB1/PWMFI1/AD1/WKUP1 AD6 --- --- --- --- + * 8 A7 PA2 TIOA1/NANDRDY/AD0 AD7 --- --- --- --- + * ---------- ---- ---------------------- ----------- ---------------- ---------- ------------------ + * + * NOTES: + * + * 1. It is not possible to use any of the SPI devices on the Shield unless + * a bit-bang SPI interface is used. This includes the touch controller + * and the SD card. + * 2. UART0 cannot be used. USARTs on the COMM connector should be available. + * 3. Parallel data is not contiguous in the PIO register + * 4. Touchcontroller /CS pin is connected to ground (always selected). + * 5. Either PA28 or PC29 may drive PWM10 + */ + +#ifdef CONFIG_ARDUINO_ITHEAD_TFT + /* In order to use the SD card on the ITEAD shield, you must enable the + * SPI bit-bang driver as well as support for SPI-based MMC/SD cards. + */ + +# if defined(CONFIG_SPI_BITBANG) && defined(CONFIG_MMCSD_SPI) + + /* SD Interface: + * + * ------------ ------------------ ------- ------------- ------------------ ------- + * SD CONNECTOR ARDUINO CONNECTORS AT91SAM SD CONNECTOR ARDUINO CONNECTORS AT91SAM + * PIN SIGNAL PIN SIGNAL GPIO PIN SIGNAL PIN SIGNAL GPIO + * --- -------- -------- --------- -------- ---- -------- -------- --------- ------- + * 1 /CS J2 pin 3 D10 PA28 2 DI J2 pin 4 D11 PD7 + * 3 GND --- --- --- 4 VCC --- --- --- + * 5 CLK J2 pin 6 D13 PB27 6 GND --- --- --- + * 7 DO J2 pin 5 D12 PD8 8 IRQ N/C --- --- + * 9 N/C --- --- --- 10 SW N/C --- --- + * 11 WP N/C --- --- 12 CD N/C --- --- + * 13 CD N/C --- --- 14 GND --- --- --- + * 15 GND --- --- --- 16 GND --- --- --- + * --- -------- -------- --------- -------- ---- -------- -------- --------- ------- + * + * NOTES: + * - The SD slot shares the pin with LED "L" so LED support must be disabled + * to use the MMC/SD card on the ITEAD shield. + * - Either PA28 or PC29 may drive D10 + */ + +# ifdef CONFIG_ARCH_LEDs +# error LEDs may not be used with the ITEAD SD card +# endif + +# define GPIO_SD_SCK (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOB | GPIO_PIN27) +# define GPIO_SD_MISO (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_PORT_PIOD | \ + GPIO_PIN8) +# define GPIO_SD_MOSI (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOD | GPIO_PIN7) + +# define GPIO_SD_CS (GPIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOA | GPIO_PIN28) +# endif + + /* In order to use the touchscreen on the ITEAD shield, you must enable the + * SPI bit-bang driver and ADS7843E/XPT2046 device support. + */ + +# if defined(CONFIG_SPI_BITBANG) && defined(CONFIG_INPUT_ADS7843E) + + /* Touch Controller Interface: + * + * ----------- ------------------ -------- ------------- ------------------ ------- + * XPT2046 ARDUINO CONNECTORS AT91SAM XPT2046 ARDUINO CONNECTORS AT91SAM + * PIN SIGNAL PIN SIGNAL GPIO PIN SIGNAL PIN SIGNAL GPIO + * --- ------- -------- --------- -------- ---- -------- -------- --------- ------- + * 1 VCC --- --- --- 2 X+ --- --- --- + * 3 Y+ --- --- --- 4 X- --- --- --- + * 5 Y- --- --- --- 6 GND --- --- --- + * 7 IN3 N/C --- --- 8 IN4 N/C --- --- + * 9 VREF --- --- --- 10 VCC --- --- --- + * 11 IRQ J2 pin 2 D9 PC21 12 DOUT J2 pin 1 D8 PC22 + * 13 BUSY N/C --- --- 14 DIN J1 pin 1 A0/D14 PA16 + * 15 /CS --- --- --- 16 DCLK J1 pin 2 A1/D15 PA24 + * --- ------- -------- --------- -------- ---- -------- -------- --------- ------- + * + * NOTE: /CS is connected to ground (XPT2046 is always selected) + */ + +# define GPIO_TSC_SCK (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOA | GPIO_PIN24) +# define GPIO_TSC_MISO (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_PORT_PIOC | \ + GPIO_PIN22) +# define GPIO_TSC_MOSI (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOA | GPIO_PIN16) + +# define GPIO_TSC_IRQ (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_INT_BOTHEDGES | \ + GPIO_PORT_PIOC | GPIO_PIN21) +# define SAM_TSC_IRQ SAM_IRQ_PC21 +# endif + + /* Only CONFIG_LCD is expected to enable the TFT LCD */ + +# ifdef CONFIG_LCD + + /* UART0 cannot be used with the LCD because the UART0 pins are used + * by the LCD. + */ + +# ifdef CONFIG_SAM34_UART0 +# error "UART0 cannot be used with the ITEAD LCD" +# endif + + /* Data pins are initially configured but may be switched dynamically to + * either inputs or outputs as needed. + */ + +# define GPIO_LCD_D0IN (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOA | GPIO_PIN8) +# define GPIO_LCD_D1IN (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOA | GPIO_PIN9) +# define GPIO_LCD_D2IN (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOB | GPIO_PIN25) +# define GPIO_LCD_D3IN (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOC | GPIO_PIN28) +# define GPIO_LCD_D4IN (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOC | GPIO_PIN26) +# define GPIO_LCD_D5IN (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOC | GPIO_PIN25) +# define GPIO_LCD_D6IN (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOC | GPIO_PIN24) +# define GPIO_LCD_D7IN (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOC | GPIO_PIN23) +# define GPIO_LCD_D7IN (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOC | GPIO_PIN23) +# define GPIO_LCD_CS (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOA | GPIO_PIN22) +# define GPIO_LCD_WR (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOA | GPIO_PIN6) +# define GPIO_LCD_RS (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOA | GPIO_PIN4) +# endif +#endif + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_sram_initialize + * + * Description: + * Configure and enable SRAM on board the SAM4S Xplained + * + ************************************************************************************/ + +#ifdef CONFIG_SAM34_EXTSRAM0 +void sam_sram_initialize(void); +#endif + +/**************************************************************************** + * Name: sam_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. + * + ****************************************************************************/ + +#if defined(CONFIG_ARDUINO_ITHEAD_TFT) && defined(CONFIG_SPI_BITBANG) && \ + defined(CONFIG_MMCSD_SPI) +int sam_sdinitialize(int minor); +#endif + + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_ARDUINO_DUE_SRC_ARDUNO_DUE_H */ + diff --git a/configs/arduino-due/src/sam_appinit.c b/configs/arduino-due/src/sam_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..ef52d100ccf1a6f578245ae6f79f5cb9066bfb0e --- /dev/null +++ b/configs/arduino-due/src/sam_appinit.c @@ -0,0 +1,102 @@ +/**************************************************************************** + * config/arduino-due/src/sam_appinit.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "arduino-due.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#if defined(CONFIG_ARDUINO_ITHEAD_TFT) && defined(CONFIG_SPI_BITBANG) && \ + defined(CONFIG_MMCSD_SPI) +/* Support for the SD card slot on the ITEAD TFT shield */ +/* Verify NSH PORT and SLOT settings */ + +# define SAM34_MMCSDSLOTNO 0 /* There is only one slot */ + +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != SAM34_MMCSDSLOTNO +# error Only one MMC/SD slot: Slot 0 (CONFIG_NSH_MMCSDSLOTNO) +# endif + +/* Default MMC/SD minor number */ + +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(CONFIG_ARDUINO_ITHEAD_TFT) && defined(CONFIG_SPI_BITBANG) && \ + defined(CONFIG_MMCSD_SPI) + /* Initialize the SPI-based MMC/SD slot */ + + { + int ret = sam_sdinitialize(CONFIG_NSH_MMCSDMINOR); + if (ret < 0) + { + syslog(LOG_ERR, + "board_app_initialize: Failed to initialize MMC/SD slot: %d\n", + ret); + return ret; + } + } +#endif + + return OK; +} diff --git a/configs/arduino-due/src/sam_autoleds.c b/configs/arduino-due/src/sam_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..8921c2d04c5034f3354340e40f3d028ac88ce400 --- /dev/null +++ b/configs/arduino-due/src/sam_autoleds.c @@ -0,0 +1,224 @@ +/**************************************************************************** + * configs/arduino-due/src/sam_autoleds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "sam_gpio.h" +#include "arduino-due.h" + +/* The board.h file may override pin configurations defined in sam_pinmap.h */ + +#include + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* There are three user-controllable LEDs on board the Arduino Due board: + * + * LED GPIO + * ---------------- ----- + * L Amber LED PB27 + * TX Yellow LED PA21 + * RX Yellow LED PC30 + * + * LED L is connected to ground and can be illuminated by driving the PB27 + * output high. The TX and RX LEDs are pulled high and can be illuminated by + * driving the corresponding + * GPIO output to low. + * + * These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL MEANING LED STATE + * L TX RX + * ------------------- ----------------------- -------- -------- -------- + * LED_STARTED NuttX has been started OFF OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF OFF + * LED_IRQSENABLED Interrupts enabled OFF OFF OFF + * LED_STACKCREATED Idle stack created ON OFF OFF + * LED_INIRQ In an interrupt N/C GLOW OFF + * LED_SIGNAL In a signal handler N/C GLOW OFF + * LED_ASSERTION An assertion failed N/C GLOW OFF + * LED_PANIC The system has crashed N/C N/C Blinking + * LED_IDLE MCU is is sleep mode ------ Not used -------- + * + * Thus if LED L is statically on, NuttX has successfully booted and is, + * apparently, running normmally. If LED RX is glowing, then NuttX is + * handling interrupts (and also signals and assertions). If TX is flashing + * at approximately 2Hz, then a fatal error has been detected and the system + */ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure RX and TX LED GPIOs for output */ + + sam_configgpio(GPIO_LED_L); + sam_configgpio(GPIO_LED_RX); + sam_configgpio(GPIO_LED_TX); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + /* 0: LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED: L=OFF TX=OFF + * RX=OFF + * + * Since the LEDs were initially all OFF and since this state only + * occurs one time, nothing need be done. + */ + + default: + case 0: + break; + + /* 1: LED_STACKCREATED: L=ON TX=OFF RX=OFF + * + * This case will also occur only once. Note that unlike the other + * LEDs, LED L is active high. + */ + + case 1: + sam_gpiowrite(GPIO_LED_L, true); + break; + + /* 2: LED_INIRQ, LED_SIGNAL, LED_ASSERTION: L=N/C TX=ON RX=N/C + * + * This case will occur many times. LED TX is active low. + */ + + case 2: + sam_gpiowrite(GPIO_LED_TX, false); + break; + + /* 3: LED_PANIC: L=N/X TX=N/C RX=ON + * + * This case will also occur many times. LED RX is active low. + */ + + case 3: + sam_gpiowrite(GPIO_LED_RX, false); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + /* 0: LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED: L=OFF TX=OFF + * RX=OFF + * 1: LED_STACKCREATED: L=ON TX=OFF RX=OFF + * + * These cases should never happen. + */ + + default: + case 1: + case 0: + break; + + /* 2: LED_INIRQ, LED_SIGNAL, LED_ASSERTION: L=N/C TX=OFF RX=N/C + * + * This case will occur many times. LED TX is active low. + */ + + case 2: + sam_gpiowrite(GPIO_LED_TX, true); + break; + + /* 3: LED_PANIC: L=N/X TX=N/C RX=OFF + * + * This case will also occur many times. LED RX is active low. + */ + + case 3: + sam_gpiowrite(GPIO_LED_RX, true); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/arduino-due/src/sam_boot.c b/configs/arduino-due/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..f720fcddb1ef07b5bd448c467566ca83ef11095e --- /dev/null +++ b/configs/arduino-due/src/sam_boot.c @@ -0,0 +1,77 @@ +/************************************************************************************ + * configs/arduino-due/src/sam_boot.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "arduino-due.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3X architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void) +{ +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} diff --git a/configs/arduino-due/src/sam_mmcsd.c b/configs/arduino-due/src/sam_mmcsd.c new file mode 100644 index 0000000000000000000000000000000000000000..23787dd7dd146bc2942264a4eb81d6175167480c --- /dev/null +++ b/configs/arduino-due/src/sam_mmcsd.c @@ -0,0 +1,287 @@ +/**************************************************************************** + * configs/sam3u-ek/src/up_mmcsd.c + * + * Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "sam_gpio.h" +#include "chip/sam3u_pio.h" + +#include "arduino-due.h" + +/* In order to use the SD card on the ITEAD shield, you must enable the SPI bit-bang + * driver as well as support for SPI-based MMC/SD cards. + */ + +#if defined(CONFIG_ARDUINO_ITHEAD_TFT) && defined(CONFIG_SPI_BITBANG) && \ + defined(CONFIG_MMCSD_SPI) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# error Mountpoints are disabled (CONFIG_DISABLE_MOUNTPOINT=y) +#endif + +/* Definitions for include/nuttx/spi/spi_bitbang.c. */ + +#define SPI_SETSCK putreg32(1 << 27, SAM_PIOB_SODR) +#define SPI_CLRSCK putreg32(1 << 27, SAM_PIOB_CODR) +#define SPI_SETMOSI putreg32(1 << 7, SAM_PIOD_SODR) +#define SPI_CLRMOSI putreg32(1 << 7, SAM_PIOD_CODR) +#define SPI_GETMISO ((getreg32(SAM_PIOD_PDSR) >> 8) & 1) +#define SPI_SETCS putreg32(1 << 28, SAM_PIOA_SODR) +#define SPI_CLRCS putreg32(1 << 28, SAM_PIOA_CODR) + +/* Only mode 0 */ + +#undef SPI_BITBANG_DISABLEMODE0 +#define SPI_BITBANG_DISABLEMODE1 1 +#define SPI_BITBANG_DISABLEMODE2 1 +#define SPI_BITBANG_DISABLEMODE3 1 + +/* Only 8-bit data width */ + +#undef SPI_BITBANG_VARWIDTH + +/* Calibration value for timing loop */ + +#define SPI_BITBAND_LOOPSPERMSEC CONFIG_BOARD_LOOPSPERMSEC + +/* SPI_PERBIT_NSEC is the minimum time to transfer one bit. This determines + * the maximum frequency and is also used to calculate delays to achieve + * other SPI frequencies. + */ + +#define SPI_PERBIT_NSEC 100 + +/* Misc definitions */ + +#define SAM34_MMCSDSLOTNO 0 /* There is only one slot */ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void spi_select(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid, + bool selected); +static uint8_t spi_status(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid); +#ifdef CONFIG_SPI_CMDDATA +static int spi_cmddata(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid, + bool cmd); +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ +/**************************************************************************** + * Include the bit-band skeleton logic + ****************************************************************************/ + +#include + +/**************************************************************************** + * Name: spi_select + * + * Description: + * Select or de-selected the SPI device specified by 'devid' + * + * Input Parameters: + * priv - An instance of the bit-bang driver structure + * devid - The device to select or de-select + * selected - True:select false:de-select + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void spi_select(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid, + bool selected) +{ + if (devid == SPIDEV_MMCSD) + { + if (selected) + { + SPI_CLRCS; + } + else + { + SPI_SETCS; + } + } +} + +/**************************************************************************** + * Name: spi_status + * + * Description: + * Return status of the SPI device specified by 'devid' + * + * Input Parameters: + * priv - An instance of the bit-bang driver structure + * devid - The device to select or de-select + * + * Returned Value: + * An 8-bit, bit-encoded status byte + * + ****************************************************************************/ + +static uint8_t spi_status(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid) +{ + if (devid == SPIDEV_MMCSD) + { + return SPI_STATUS_PRESENT; + } + + return 0; +} + +/**************************************************************************** + * Name: spi_cmddata + * + * Description: + * If there were was a CMD/DATA line, this function would manage it + * + * Input Parameters: + * priv - An instance of the bit-bang driver structure + * devid - The device to use + * cmd - True=MCD false=DATA + * + * Returned Value: + * OK + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +static int spi_cmddata(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid, + bool cmd) +{ + return OK; +} +#endif + +/**************************************************************************** + * Name: sam_mmcsd_spiinitialize + * + * Description: + * Initialize the SPI bit-bang driver + * + * Input Parameters: + * None + * + * Returned Value: + * A non-NULL reference to the SPI driver on success + * + ****************************************************************************/ + +static FAR struct spi_dev_s *sam_mmcsd_spiinitialize(void) +{ + /* Initialize GPIOs */ + + sam_configgpio(GPIO_SD_SCK); + sam_configgpio(GPIO_SD_MISO); + sam_configgpio(GPIO_SD_MOSI); + sam_configgpio(GPIO_SD_CS); + + /* Create the SPI driver instance */ + + return spi_create_bitbang(&g_spiops); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. + * + ****************************************************************************/ + +int sam_sdinitialize(int minor) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI driver instance for the SD chip select */ + + fvdbg("Initializing bit bang SPI for the MMC/SD slot\n"); + + spi = sam_mmcsd_spiinitialize(); + if (!spi) + { + fdbg("Failed to bit bang SPI for the MMC/SD slot\n"); + return -ENODEV; + } + + fvdbg("Successfully initialized bit bang SPI for the MMC/SD slot\n"); + + /* Bind the SPI device for the chip select to the slot */ + + fvdbg("Binding bit bang SPI device to MMC/SD slot %d\n", + SAM34_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(minor, SAM34_MMCSDSLOTNO, spi); + if (ret < 0) + { + fdbg("Failed to bind bit bang SPI device to MMC/SD slot %d: %d\n", + SAM34_MMCSDSLOTNO, ret); + return ret; + } + + fvdbg("Successfuly bound bit bang SPI device to MMC/SD slot %d\n", + SAM34_MMCSDSLOTNO); + + return OK; +} + +#endif /* CONFIG_ARDUINO_ITHEAD_TFT && CONFIG_SPI_BITBANG && CONFIG_MMC_SPI */ diff --git a/configs/arduino-due/src/sam_touchscreen.c b/configs/arduino-due/src/sam_touchscreen.c new file mode 100644 index 0000000000000000000000000000000000000000..d2a2c408ff0bccf9ae1af08f9351826f03a2b25f --- /dev/null +++ b/configs/arduino-due/src/sam_touchscreen.c @@ -0,0 +1,431 @@ +/************************************************************************************ + * configs/sam3u-ek/src/up_touchscreen.c + * + * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include "sam_gpio.h" +#include "chip/sam3u_pio.h" + +#include "arduino-due.h" + +/* In order to use the SD card on the ITEAD shield, you must enable the SPI + * bit-bang driver as well as support for SPI-based ADS7843E/XPT2046 + * touchscreen controller. + */ + +#if defined(CONFIG_ARDUINO_ITHEAD_TFT) && defined(CONFIG_SPI_BITBANG) && \ + defined(CONFIG_INPUT_ADS7843E) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_SAM34_GPIOC_IRQ +# error "Touchscreen support requires CONFIG_SAM34_GPIOC_IRQ" +#endif + +#ifndef CONFIG_ADS7843E_FREQUENCY +# define CONFIG_ADS7843E_FREQUENCY 500000 +#endif + +#ifndef CONFIG_ADS7843E_SPIDEV +# define CONFIG_ADS7843E_SPIDEV 0 +#endif + +#ifndef CONFIG_ADS7843E_DEVMINOR +# define CONFIG_ADS7843E_DEVMINOR 0 +#endif + +/* Definitions for include/nuttx/spi/spi_bitbang.c. */ + +#define SPI_SETSCK putreg32(1 << 24, SAM_PIOA_SODR) +#define SPI_CLRSCK putreg32(1 << 24, SAM_PIOA_CODR) +#define SPI_SETMOSI putreg32(1 << 16, SAM_PIOA_SODR) +#define SPI_CLRMOSI putreg32(1 << 16, SAM_PIOA_CODR) +#define SPI_GETMISO ((getreg32(SAM_PIOC_PDSR) >> 22) & 1) + +/* Only mode 0 */ + +#undef SPI_BITBANG_DISABLEMODE0 +#define SPI_BITBANG_DISABLEMODE1 1 +#define SPI_BITBANG_DISABLEMODE2 1 +#define SPI_BITBANG_DISABLEMODE3 1 + +/* Only 8-bit data width */ + +#undef SPI_BITBANG_VARWIDTH + +/* Calibration value for timing loop */ + +#define SPI_BITBAND_LOOPSPERMSEC CONFIG_BOARD_LOOPSPERMSEC + +/* SPI_PERBIT_NSEC is the minimum time to transfer one bit. This determines + * the maximum frequency and is also used to calculate delays to achieve + * other SPI frequencies. + */ + +#define SPI_PERBIT_NSEC 100 + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ +/* Lower-half SPI */ + +static void spi_select(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid, + bool selected); +static uint8_t spi_status(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid); +#ifdef CONFIG_SPI_CMDDATA +static int spi_cmddata(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid, + bool cmd); +#endif + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the XPT2046 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the XPT2046 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + */ + +static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr); +static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable); +static void tsc_clear(FAR struct ads7843e_config_s *state); +static bool tsc_busy(FAR struct ads7843e_config_s *state); +static bool tsc_pendown(FAR struct ads7843e_config_s *state); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the XPT2046 + * driver. This structure provides information about the configuration + * of the XPT2046 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writable because, under certain circumstances, the driver + * may modify frequency or X plate resistance values. + */ + +static struct ads7843e_config_s g_tscinfo = +{ + .frequency = CONFIG_ADS7843E_FREQUENCY, + + .attach = tsc_attach, + .enable = tsc_enable, + .clear = tsc_clear, + .busy = tsc_busy, + .pendown = tsc_pendown, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Include the bit-band skeleton logic + ****************************************************************************/ + +#include + +/**************************************************************************** + * Name: spi_select + * + * Description: + * Select or de-selected the SPI device specified by 'devid' + * + * Input Parameters: + * priv - An instance of the bit-bang driver structure + * devid - The device to select or de-select + * selected - True:select false:de-select + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void spi_select(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid, + bool selected) +{ + /* The touchscreen controller is always selected */ +} + +/**************************************************************************** + * Name: spi_status + * + * Description: + * Return status of the SPI device specified by 'devid' + * + * Input Parameters: + * priv - An instance of the bit-bang driver structure + * devid - The device to select or de-select + * + * Returned Value: + * An 8-bit, bit-encoded status byte + * + ****************************************************************************/ + +static uint8_t spi_status(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid) +{ + return 0; +} + +/**************************************************************************** + * Name: spi_cmddata + * + * Description: + * If there were was a CMD/DATA line, this function would manage it + * + * Input Parameters: + * priv - An instance of the bit-bang driver structure + * devid - The device to use + * cmd - True=MCD false=DATA + * + * Returned Value: + * OK + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +static int spi_cmddata(FAR struct spi_bitbang_s *priv, enum spi_dev_e devid, + bool cmd) +{ + return OK; +} +#endif + +/**************************************************************************** + * IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the XPT2046 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the XPT2046 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + * + ****************************************************************************/ + +static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr) +{ + /* Attach the XPT2046 interrupt */ + + ivdbg("Attaching %p to IRQ %d\n", isr, SAM_TSC_IRQ); + return irq_attach(SAM_TSC_IRQ, isr); +} + +static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable) +{ + /* Attach and enable, or detach and disable */ + + ivdbg("IRQ:%d enable:%d\n", SAM_TSC_IRQ, enable); + if (enable) + { + sam_gpioirqenable(SAM_TSC_IRQ); + } + else + { + sam_gpioirqdisable(SAM_TSC_IRQ); + } +} + +static void tsc_clear(FAR struct ads7843e_config_s *state) +{ + /* Does nothing */ +} + +static bool tsc_busy(FAR struct ads7843e_config_s *state) +{ + return false; /* The BUSY signal is not connected */ +} + +static bool tsc_pendown(FAR struct ads7843e_config_s *state) +{ + /* The /PENIRQ value is active low */ + + bool pendown = !sam_gpioread(GPIO_TSC_IRQ); + ivdbg("pendown:%d\n", pendown); + return pendown; +} + +/**************************************************************************** + * Name: sam_tsc_spiinitialize + * + * Description: + * Initialize the SPI bit-bang driver + * + * Input Parameters: + * None + * + * Returned Value: + * A non-NULL reference to the SPI driver on success + * + ****************************************************************************/ + +static FAR struct spi_dev_s *sam_tsc_spiinitialize(void) +{ + /* Configure the SPI bit-bang pins */ + + sam_configgpio(GPIO_TSC_SCK); + sam_configgpio(GPIO_TSC_MISO); + sam_configgpio(GPIO_TSC_MOSI); + + /* Create the SPI driver instance */ + + return spi_create_bitbang(&g_spiops); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * configure the touchscreen device. This function will register the driver + * as /dev/inputN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ + FAR struct spi_dev_s *dev; + static bool initialized = false; + int ret; + + idbg("minor %d\n", minor); + DEBUGASSERT(minor == 0); + + /* Have we already initialized? Since we never uninitialize we must prevent + * multiple initializations. This is necessary, for example, when the + * touchscreen example is used as a built-in application in NSH and can be + * called numerous time. It will attempt to initialize each time. + */ + + if (!initialized) + { + /* Configure and enable the XPT2046 interrupt pin as an input */ + + (void)sam_configgpio(GPIO_TSC_IRQ); + + /* Configure the PIO interrupt */ + + sam_gpioirq(SAM_TSC_IRQ); + + /* Get an instance of the SPI interface for the touchscreen chip select */ + + dev = sam_tsc_spiinitialize(); + if (!dev) + { + idbg("Failed to initialize bit bang SPI\n"); + return -ENODEV; + } + + /* Initialize and register the SPI touschscreen device */ + + ret = ads7843e_register(dev, &g_tscinfo, CONFIG_ADS7843E_DEVMINOR); + if (ret < 0) + { + idbg("Failed to register touchscreen device\n"); + /* up_spiuninitialize(dev); */ + return -ENODEV; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* No support for un-initializing the touchscreen XPT2046 device. It will + * continue to run and process touch interrupts in the background. + */ +} + +#endif /* CONFIG_ARDUINO_ITHEAD_TFT && CONFIG_SPI_BITBANG && CONFIG_INPUT_ADS7843E */ diff --git a/configs/arduino-due/src/sam_userleds.c b/configs/arduino-due/src/sam_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..b461812e50e698c5ca672a2f46cf5d5c41e1f7e7 --- /dev/null +++ b/configs/arduino-due/src/sam_userleds.c @@ -0,0 +1,151 @@ +/**************************************************************************** + * configs/arduino-due/src/sam_userleds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "sam_gpio.h" +#include "arduino-due.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Function Protototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1-2 GPIOs for output */ + + sam_configgpio(GPIO_LED_L); + sam_configgpio(GPIO_LED_RX); + sam_configgpio(GPIO_LED_TX); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint32_t ledcfg; + + if (led == BOARD_LED_L) + { + ledcfg = GPIO_LED_RX; + } + else if (led == BOARD_LED_RX) + { + ledcfg = GPIO_LED_RX; + ledon = !ledon; + } + else if (led == BOARD_LED_TX) + { + ledcfg = GPIO_LED_TX; + ledon = !ledon; + } + else + { + return; + } + + sam_gpiowrite(ledcfg, ledon); +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + bool ledon; + + ledon = ((ledset & BOARD_LED_L_BIT) != 0); + sam_gpiowrite(GPIO_LED_L, ledon); + + ledon = ((ledset & BOARD_LED_RX_BIT) != 0); + sam_gpiowrite(GPIO_LED_RX, ledon); + + ledon = ((ledset & BOARD_LED_TX_BIT) != 0); + sam_gpiowrite(GPIO_LED_TX, ledon); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/arduino-mega2560/Kconfig b/configs/arduino-mega2560/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..ae2bf31307d0a24cc38511a615acab88a56c1c74 --- /dev/null +++ b/configs/arduino-mega2560/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see misc/tools/kconfig-language.txt. +# diff --git a/configs/arduino-mega2560/README.txt b/configs/arduino-mega2560/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..7194f4e5a1373ff841367ffe78692bcf6f24f49f --- /dev/null +++ b/configs/arduino-mega2560/README.txt @@ -0,0 +1,105 @@ +README +====== + + This is the README file for the port of NuttX to the Arduino Mega 2560 Rev3. + + https://www.arduino.cc/en/Main/ArduinoBoardMega2560 + + The board is based on ATMega2560 chip from Atmel + + http://www.atmel.com/devices/atmega2560.aspx + +Contents +======== + + o Toolchain + o Serial Console + o Configurations + +Toolchain +========= + + Right now only Atmel's AVR8 Toolchain is supported. You can get it from + + http://www.atmel.com/tools/atmelavrtoolchainforwindows.aspx + + It is basically WinAVR compatible so sub-projects may define WinAVR as a + tool-chain but specify path to the Atmel AVR8 in path. See + arduino-mega2560/hello for example. + +Serial Console +============== + + The serial console is available on USART0. You will need to connect an + RS-232 shield or an external RS-232 driver as follows: + + TXD: TX0->1 + RXD: RX0->0 + GND: Power GND + +5V: Power +5V + + You will then need to use a terminal program configured at 38400 8N1. + +Configurations +============== + + Common Configuration Notes + -------------------------- + 1. Each Arduino MEGA2560 configuration is maintained in a sub-directory + and can be selected as follow: + + cd tools + ./configure.sh arduino-mega2560/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume the Atmel Studio AVR8 toolchain + under Cygwin with Windows. This is easily reconfigured: + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_AVR_BUILDROOT_TOOLCHAIN=y + + Configuration Sub-Directories + ----------------------------- + hello: + The simple apps/examples/hello "Hello, World!" example. + + nsh: + This is a reduce NuttShell (NSH) configuration using apps/example/nsh. + The serial console is provided on USART0 and can be accessed via + an external RS-232 driver as described above under "Serial Console". + + NOTES: + + 1. As of 2015-01-16, the default static memory usage is: + + $ size nuttx.elf + text data bss dec hex filename + 34348 2117 944 37409 9221 nuttx.elf + + And dynamic, heap usage: + + nsh> free + total used free largest + Mem: 4736 1768 2968 2968 + + There is plenty of FLASH space but not a lot of free SRAM. This + SRAM usage is due primarily to constant strings defined by NSH. + + NOTE: I investigated the possibility of adding IPTR/IOBJ + qualifiers in the NSH library and moving the strings to FLASH. + This is still a possibility but would requires some extensive + changes to NSH. diff --git a/configs/arduino-mega2560/hello/Make.defs b/configs/arduino-mega2560/hello/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..9eb35f515d0ab8492afaa4b96d96177709bc56a0 --- /dev/null +++ b/configs/arduino-mega2560/hello/Make.defs @@ -0,0 +1,101 @@ +############################################################################ +# configs/arduino-mega2560/hello/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/avr/src/avr/Toolchain.defs + +LDSCRIPT = flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = $(ARCHINCLUDES) "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem "$(TOPDIR)/include" + ARCHXXINCLUDES = $(ARCHINCLUDES) -isystem "$(TOPDIR)/include/cxx" + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g3 +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = .elf + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/arduino-mega2560/hello/defconfig b/configs/arduino-mega2560/hello/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ffa94ad0e93621b5ddb5d65a5c7c868912c4ac20 --- /dev/null +++ b/configs/arduino-mega2560/hello/defconfig @@ -0,0 +1,590 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +CONFIG_ARCH_AVR=y +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="avr" +CONFIG_ARCH_FAMILY="avr" +CONFIG_ARCH_CHIP="atmega" +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_CHIP_ATMEGA=y +# CONFIG_ARCH_CHIP_AT90USB is not set +# CONFIG_ARCH_CHIP_AT32UC3 is not set +CONFIG_ARCH_FAMILY_AVR=y +# CONFIG_ARCH_FAMILY_AVR32 is not set + +# +# AVR Configuration Options +# +CONFIG_AVR_WINAVR_TOOLCHAIN=y +# CONFIG_AVR_BUILDROOT_TOOLCHAIN is not set +# CONFIG_AVR_USART1 is not set + +# +# ATMega Configuration Options +# +# CONFIG_ARCH_CHIP_ATMEGA128 is not set +# CONFIG_ARCH_CHIP_ATMEGA1284P is not set +CONFIG_ARCH_CHIP_ATMEGA2560=y + +# +# ATMega Peripheral Selections +# +CONFIG_AVR_USART0=y + +# +# Low level UART driver options +# + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=800 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x800100 +CONFIG_RAM_SIZE=8192 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_ARDUINO_MEGA2560=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="arduino-mega2560" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=16 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="hello_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=4 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=4 +CONFIG_NFILE_STREAMS=4 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_MODULE is not set + +# +# Work queue support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=128 +CONFIG_USERMAIN_STACKSIZE=128 +CONFIG_PTHREAD_STACK_MIN=128 +CONFIG_PTHREAD_STACK_DEFAULT=128 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +CONFIG_ARCH_HAVE_USART0=y +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART0_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_USART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART0 Configuration +# +CONFIG_USART0_RXBUFSIZE=256 +CONFIG_USART0_TXBUFSIZE=256 +CONFIG_USART0_BAUD=38400 +CONFIG_USART0_BITS=8 +CONFIG_USART0_PARITY=0 +CONFIG_USART0_2STOP=0 +# CONFIG_USART0_IFLOWCONTROL is not set +# CONFIG_USART0_OFLOWCONTROL is not set +# CONFIG_USART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/arduino-mega2560/hello/setenv.sh b/configs/arduino-mega2560/hello/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3f4dd93a5a617ce74fdae89f93ed8dd728d03076 --- /dev/null +++ b/configs/arduino-mega2560/hello/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/arduino-mega2560/hello/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the WinAVR +# toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install the Linux AVR toolchain as well +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin" +export TOOLCHAIN_BIN="/cygdrive/c/as-7/7.0/toolchain/avr8/avr8-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_avr/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="/sbin:/usr/sbin:${PATH_ORIG}:${TOOLCHAIN_BIN}" + +echo "PATH : ${PATH}" diff --git a/configs/arduino-mega2560/include/board.h b/configs/arduino-mega2560/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..6d6f122c9fd73cd4bca10045161e05f49b58060d --- /dev/null +++ b/configs/arduino-mega2560/include/board.h @@ -0,0 +1,85 @@ +/**************************************************************************** + * configs/arduino-mega2560/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_ARDUINO_MEGA2560_INCLUDE_BOARD_H +#define __CONFIGS_ARDUINO_MEGA2560_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Clocking *****************************************************************/ +/* Assume default CLKDIV8 fuse setting is overridden to CLKDIV1 */ + +//#define BOARD_XTAL_FREQ 20000000 /* 20MHz crystal */ +//#define BOARD_XTAL_FREQ 16700000 /* 16.7MHz crystal */ +#define BOARD_XTAL_FREQ 16000000 /* 16MHz crystal */ +#define BOARD_CPU_CLOCK BOARD_XTAL_FREQ /* F_CPU = 16MHz */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_ARDUINO_MEGA2560_INCLUDE_BOARD_H */ diff --git a/configs/arduino-mega2560/nsh/Make.defs b/configs/arduino-mega2560/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..b007c01f8abc44bf36419806425c3bff0e7260f1 --- /dev/null +++ b/configs/arduino-mega2560/nsh/Make.defs @@ -0,0 +1,101 @@ +############################################################################ +# configs/arduino-mega2560/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/avr/src/avr/Toolchain.defs + +LDSCRIPT = flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = $(ARCHINCLUDES) "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem "$(TOPDIR)/include" + ARCHXXINCLUDES = $(ARCHINCLUDES) -isystem "$(TOPDIR)/include/cxx" + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g3 +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = .elf + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/arduino-mega2560/nsh/defconfig b/configs/arduino-mega2560/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d22cb731617c85ea8a16daeb99d603ddd4c806b6 --- /dev/null +++ b/configs/arduino-mega2560/nsh/defconfig @@ -0,0 +1,684 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +CONFIG_ARCH_AVR=y +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="avr" +CONFIG_ARCH_FAMILY="avr" +CONFIG_ARCH_CHIP="atmega" +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_CHIP_ATMEGA=y +# CONFIG_ARCH_CHIP_AT90USB is not set +# CONFIG_ARCH_CHIP_AT32UC3 is not set +CONFIG_ARCH_FAMILY_AVR=y +# CONFIG_ARCH_FAMILY_AVR32 is not set + +# +# AVR Configuration Options +# +# CONFIG_AVR_WINAVR_TOOLCHAIN is not set +CONFIG_AVR_ATMEL_AVR_TOOLCHAIN=y +# CONFIG_AVR_BUILDROOT_TOOLCHAIN is not set + +# +# Atmel AVR Toolchain options +# +# CONFIG_AVR_HAS_MEMX_PTR is not set +# CONFIG_AVR_USART1 is not set + +# +# ATMega Configuration Options +# +# CONFIG_ARCH_CHIP_ATMEGA128 is not set +# CONFIG_ARCH_CHIP_ATMEGA1284P is not set +CONFIG_ARCH_CHIP_ATMEGA2560=y + +# +# ATMega Peripheral Selections +# +CONFIG_AVR_USART0=y + +# +# Low level USART driver options +# + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=800 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x800100 +CONFIG_RAM_SIZE=8192 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_ARDUINO_MEGA2560=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="arduino-mega2560" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=16 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=4 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=4 +CONFIG_NFILE_STREAMS=4 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_MODULE is not set + +# +# Work queue support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=128 +CONFIG_USERMAIN_STACKSIZE=768 +CONFIG_PTHREAD_STACK_MIN=128 +CONFIG_PTHREAD_STACK_DEFAULT=128 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +CONFIG_ARCH_HAVE_USART0=y +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART0_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_USART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART0 Configuration +# +CONFIG_USART0_RXBUFSIZE=256 +CONFIG_USART0_TXBUFSIZE=256 +CONFIG_USART0_BAUD=38400 +CONFIG_USART0_BITS=8 +CONFIG_USART0_PARITY=0 +CONFIG_USART0_2STOP=0 +# CONFIG_USART0_IFLOWCONTROL is not set +# CONFIG_USART0_OFLOWCONTROL is not set +# CONFIG_USART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=512 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=768 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_DISABLE_SEMICOLON=y +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +CONFIG_NSH_DISABLEBG=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +CONFIG_NSH_DISABLE_EXEC=y +CONFIG_NSH_DISABLE_EXIT=y +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +CONFIG_NSH_DISABLE_HEXDUMP=y +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKFIFO=y +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +CONFIG_NSH_DISABLE_PS=y +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +CONFIG_NSH_DISABLE_XD=y + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/arduino-mega2560/nsh/setenv.sh b/configs/arduino-mega2560/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3bab94237fb69ce3386835fd22375126ffeb0001 --- /dev/null +++ b/configs/arduino-mega2560/nsh/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/arduino-mega2560/nsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the WinAVR +# toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install the Linux AVR toolchain as well +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin" +export TOOLCHAIN_BIN="/cygdrive/c/as-7/7.0/toolchain/avr8/avr8-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_avr/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="/sbin:/usr/sbin:${PATH_ORIG}:${TOOLCHAIN_BIN}" + +echo "PATH : ${PATH}" diff --git a/configs/arduino-mega2560/scripts/flash.ld b/configs/arduino-mega2560/scripts/flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..811a771dd95a915d906e9ba04216b7b505e867ba --- /dev/null +++ b/configs/arduino-mega2560/scripts/flash.ld @@ -0,0 +1,213 @@ +/******************************************************************************* + * configs/arduino-mega2560/scripts/flash.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ******************************************************************************/ + +/* Memory Regions *************************************************************/ +/* ------ ------ ------+------- -- ------ -- ------ --- ------ ----+------- --- + * FLASH | REGISTERS I/O EXT I/O ISRAM | EEPROM + * | REGISTERS REGISTERS | + * ------- ------ -----+------- -- ------ -- ------ --- ------ ----+------- --- + * 0x0000 256Kb| 0x0000 32 0x0020 64 0x0060 416 0x0200 8Kb | 0x0000 4Kb + * ------- ------ -----+------- -- ------ -- ------ --- ------ ----+------- --- + * *Memory configuration A + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0, LENGTH = 256K + sram (rw!x) : ORIGIN = 0x800200, LENGTH = 8K + eeprom (rw!x) : ORIGIN = 0x810000, LENGTH = 4K +} + +OUTPUT_FORMAT("elf32-avr","elf32-avr","elf32-avr") +OUTPUT_ARCH(avr:6) +ENTRY(__start) + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + + .rel.text : + { + *(.rel.text) + *(.rel.text.*) + *(.rel.gnu.linkonce.t*) + } + + .rela.text : + { + *(.rela.text) + *(.rela.text.*) + *(.rela.gnu.linkonce.t*) + } + + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + + .rel.rodata : + { + *(.rel.rodata) + *(.rel.rodata.*) + *(.rel.gnu.linkonce.r*) + } + + .rela.rodata : + { + *(.rela.rodata) + *(.rela.rodata.*) + *(.rela.gnu.linkonce.r*) + } + + .rel.data : + { + *(.rel.data) + *(.rel.data.*) + *(.rel.gnu.linkonce.d*) + } + + .rela.data : + { + *(.rela.data) + *(.rela.data.*) + *(.rela.gnu.linkonce.d*) + } + + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + + .text : + { + _stext = . ; + *(.vectors) + *(.init) + *(.handlers) + *(.progmem .progmem.*) + *(.text) + *(.text.*) + _etext = . ; + } > flash + + _eronly = ABSOLUTE(.); + + .data : + { + _sdata = ABSOLUTE(.); + *(.rodata .rodata.*) + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : + { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Global data not cleared after reset. */ + + .noinit : + { + _snoinit = ABSOLUTE(.); + *(.noinit*) + _enoinit = ABSOLUTE(.); + } > sram + + .eeprom : + { + _seeprom = ABSOLUTE(.); + *(.eeprom*) + _eeeprom = ABSOLUTE(.); + } > eeprom + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } +} diff --git a/configs/arduino-mega2560/src/Makefile b/configs/arduino-mega2560/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..1f7743da6f5113677cd6620c06fd71fed5648b3d --- /dev/null +++ b/configs/arduino-mega2560/src/Makefile @@ -0,0 +1,98 @@ +############################################################################ +# configs/arduino-mega2560/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = avr_boot.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += avr_leds.c +endif + +AOBJS = $(ASRCS:.S=$(OBJEXT)) +COBJS = $(CSRCS:.c=$(OBJEXT)) + +SRCS = $(ASRCS) $(CSRCS) +OBJS = $(AOBJS) $(COBJS) + +ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src +ifeq ($(CONFIG_ARCH_AVR32),y) +ARCH_SUBDIR = avr32 +endif +ifeq ($(CONFIG_ARCH_AVR),y) +ARCH_SUBDIR = avr +endif + +ifeq ($(WINTOOL),y) + CFLAGS += -I "${shell cygpath -w $(TOPDIR)/sched}" + CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" + CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/common}" + CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/$(ARCH_SUBDIR)}" + CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/$(ARCH_SUBDIR)/atmega2560}" +else + CFLAGS += -I "$(TOPDIR)/sched" + CFLAGS += -I "$(ARCH_SRCDIR)/chip" + CFLAGS += -I "$(ARCH_SRCDIR)/common" + CFLAGS += -I "$(ARCH_SRCDIR)/$(ARCH_SUBDIR)" + CFLAGS += -I "$(ARCH_SRCDIR)/$(ARCH_SUBDIR)/atmega2560" +endif + +all: libboard$(LIBEXT) + +$(AOBJS): %$(OBJEXT): %.S + $(call ASSEMBLE, $<, $@) + +$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +libboard$(LIBEXT): $(OBJS) + $(call ARCHIVE, $@, $(OBJS)) + +.depend: Makefile $(SRCS) + $(Q) $(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep + $(Q) touch $@ + +depend: .depend + +clean: + $(call DELFILE, libboard$(LIBEXT)) + $(call CLEAN) + +distclean: clean + $(call DELFILE, Make.dep) + $(call DELFILE, .depend) + +-include Make.dep diff --git a/configs/arduino-mega2560/src/arduino_mega2560.h b/configs/arduino-mega2560/src/arduino_mega2560.h new file mode 100644 index 0000000000000000000000000000000000000000..6027d8acf138e112256530e1f788cfd22331dc9a --- /dev/null +++ b/configs/arduino-mega2560/src/arduino_mega2560.h @@ -0,0 +1,77 @@ +/**************************************************************************** + * configs/arduino-mega2560/src/arduino-mega2560.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_ARDUINO_MEGA2560_SRC_ARDUINO_MEGA2560_H +#define __CONFIGS_ARDUINO_MEGA2560_SRC_ARDUINO_MEGA2560_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/******************************************************************************* + * Name: atmega_ledinit + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ******************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void atmega_led_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_ARDUINO_MEGA2560_SRC_ARDUINO_MEGA2560_H */ diff --git a/configs/arduino-mega2560/src/avr_boot.c b/configs/arduino-mega2560/src/avr_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..f399c4b2a630838bd00af47a041389f757f2ca2a --- /dev/null +++ b/configs/arduino-mega2560/src/avr_boot.c @@ -0,0 +1,82 @@ +/****************************************************************************** + * configs/arduino-mega2560/src/avr_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ******************************************************************************/ + +/****************************************************************************** + * Included Files + ******************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "atmega.h" +#include "arduino_mega2560.h" + +/****************************************************************************** + * Definitions + ******************************************************************************/ + +/****************************************************************************** + * Private Functions + ******************************************************************************/ + +/****************************************************************************** + * Public Functions + ******************************************************************************/ + +/****************************************************************************** + * Name: up_boardinitialize + * + * Description: + * All ATMega architectures must provide the following entry point. + * This entry point is called early in the intitialization -- after all + * memory has been configured and mapped but before any devices have been + * initialized. + * + ******************************************************************************/ + +void atmega_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + atmega_led_initialize(); +#endif +} diff --git a/configs/arduino-mega2560/src/avr_leds.c b/configs/arduino-mega2560/src/avr_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..821a48182fdc15e8b10bdb0968e3d46aaeffeb16 --- /dev/null +++ b/configs/arduino-mega2560/src/avr_leds.c @@ -0,0 +1,77 @@ +/****************************************************************************** + * configs/arduino-mega2560/src/avr_leds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ******************************************************************************/ + +/****************************************************************************** + * Included Files + ******************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "atmega2560.h" +#include "arduino_mega2560.h" + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/avr32dev1/Kconfig b/configs/avr32dev1/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..1337201975ac0a0bdb89a441c86faa8efff19bf3 --- /dev/null +++ b/configs/avr32dev1/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_AVR32DEV1 +endif + diff --git a/configs/avr32dev1/README.txt b/configs/avr32dev1/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..54ac9002708700cbde2066e8f96cbb464f5cc8ed --- /dev/null +++ b/configs/avr32dev1/README.txt @@ -0,0 +1,477 @@ +README +^^^^^^ + +This is the README file for the NuttX port to the Atmel AVR32DEV1 board. + +Contents +^^^^^^^^ + + * GPIO Pin Configuration + * Serial Connection + * Toolchains + * Development Environment + * GNU Toolchains + * IDEs + - Makefile Build + - Native Build + * AVR32 Bootloader + - Boot Sequence + - Link Address + - Entering the ISP + - BatchISP + * Reset + * Make Tip + * AVR32DEV1 Configuration Options + * Configurations + +GPIO Pin Configuration +^^^^^^^^^^^^^^^^^^^^^^ + +The only GPIO pin usage is for LEDs (2) and Buttons (2): + + PIN 13 PA7 LED1 + PIN 14 PA8 LED2 + PIN 24 PB2 KEY1 + PIN 25 PB3 KEY2 + +(See configs/avr32dev1/src/avr32dev1.h). And also for +crystals (4), JTAG (1), and USB (1): + + PIN 30 PA11 XIN32 + PIN 31 PA12 XOUT32 + PIN 35 PA15 EVTO (JTAG) + PIN 39 PA18 X1IN + PIN 40 PA19 X1OUT + PIN 61 PA26 ID (USB) + +All GPIO pins are brought out through connectors J1 (PINS 33-64) +and J2 (PINS 1-32). + +NOTE: There seems to be some difference in labeling for OSC0 and +OSC1 between MCUZone.com and Atmel: + + Oscillator pinout + -------------------------- -------------------- + QFP48 QFP64 Pad Oscillator AVR32DEV1 + PIN PIN PIN LABEL + ----- ----- ---- --------- -------------------- + 30 39 PA18 XIN0 X1IN (12MHz) + 41 PA28 XIN1 PA28 (no crystal) + 22 30 PA11 XIN32 XIN32 (32KHz) + 31 40 PA19 XOUT0 X1OUT (12Mhz) + 42 PA29 XOUT1 PA29 (no crystal) + 23 31 PA12 XOUT32 XOUT32 (32 Khz) + ----- ----- ---- --------- -------------------- + +NOTE 1: These crystal inputs/outputs are analog signals and my +assumption is that they need no pin multiplexing setting to +enable them for the external crystal function. + +NOTE 2: There is no support for OSC1. + +NOTE 3: There are solder pads for the 32KHz OSC32, but the +crystal is not populated on my board. Therefore, the RTC will +have to run from the (uncalibrated) RCOSC. + +Serial Connection +^^^^^^^^^^^^^^^^^ + +USART1 is the default USART1 used in the configuration files to +provide a serial console (of course, that can be easily changed +by editting the configuration file). The AVR32DEV1 board has no +RS-232 drivers or connectors on board. I use an off-board MAX232 +module that I got on eBay (search for MAX232 if you want to find +one). I connect the MAX232 board as follows: + +In configs/avr32dev/include/board.h: + + #define PINMUX_USART1_RXD PINMUX_USART1_RXD_1 + #define PINMUX_USART1_TXD PINMUX_USART1_TXD_1 + +In arch/avr/src/at32uc3/at32uc3b_pinmux.h: + + #define PINMUX_USART1_RXD_1 (GPIO_PERIPH | GPIO_FUNCD | GPIO_PORTA | 17) + #define PINMUX_USART1_TXD_1 (GPIO_PERIPH | GPIO_FUNCA | GPIO_PORTA | 23) + +PA17 and PA23 are avaiable from the AVR32DEV1: + + FUNC GPIO PIN Header 16X2 (J1) MX232 Board + ---- ----- ----- ---------------- ------------ + RXD PA17 PIN37 Pin 5 PIN4 RXD (5V TTL/CMOS) + TXD PA23 PIN47 Pin 15 PIN3 TXD (5V TTL/CMOS) + PIN2 GND + PIN1 VCC (5V) + + Voltage on GPIO Pins with respect to Ground for TCK, RESET_N, PA03-PA08, + PA11-PA12, PA18-PA19, PA28-PA31............................-0.3 to 3.6V + Other Pins ............................................... -0.3 to 5.5V + + I get the 5V from another USB port (using the 5V power cable that normally + provides the extra current needed by my USB IDE drive). + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Linux, Mac OS X or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchains +^^^^^^^^^^^^^^ + +Atmel Toolchain: + + The build logic in these directories assume that you are using the GNU + toolchain with the Atmel patches. The patch file, pre-patched tool + sources,and pre-built binaries are available from the Atmel website. + + CONFIG_AVR32_AVRTOOLSW=y # Use the windows version + CONFIG_AVR32_AVRTOOLSL=y # Ue the Linux version + + NOTE: The NuttX builtroot cannot be used to build the AVR32 toolchain. + This is because the Atmel patches that add support for the AVR32 are not + included in the NuttX buildroot. + +WinAVR: + + Another option for use under Windows is WinAVR: + http://sourceforge.net/projects/winavr/files/. WinAVR includes the + AVR32 toolchain as well as the AVR toolchain and various support + libraries and header files. + +AVR32 Toolchain Builder: + + A third option is to build the toolchain yourself. For OS X and Linux systems, + this Makefile will build a complete gcc-4.4.3 toolchain: + + https://github.com/jsnyder/avr32-toolchain + + By default the toolchain installs into ${HOME}/avr-32-tools- and + the bin subdirectory must be added to your path before compiling. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/avr/src/at32uc3, + arch/avr/src/common, arch/arm/src/avr, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/avr/src/avr3/up_nommuhead.S. + +AVR32 Bootloader +^^^^^^^^^^^^^^^^ + + Boot Sequence + ------------- + + "An AVR UC3 part having the bootloader programmed resets as any other + part at 80000000h. Bootloader execution begins here. The bootloader + first performs the boot process to know whether it should start the + USB DFU ISP or the application. If the tested conditions indicate + that the USB DFU ISP should be started, then execution continues in + the bootloader area, i.e. between 80000000h and 80002000h, else + the bootloader launches the application at 80002000h." + + Link Address + ------------ + + The linker scripts (ld.script) assume that you are using the DFU + bootloader. The bootloader resides at 0x8000:0000 and so the ld.script + files link the application to execute after the bootloader at + 0x8000:2000. To link so that NuttX boots directly without using the + bootloader, change the flash definition from: + + flash (rxai!w) : ORIGIN = 0x80002000, LENGTH = 256K - 8K + + to: + flash (rxai!w) : ORIGIN = 0x80000000, LENGTH = 256K + + Or to use the MSC bootloader: + + flash (rxai!w) : ORIGIN = 0x80008000, LENGTH = 256K - 32K + + Entering the ISP + ---------------- + + In order to use the USB port to download the FLASH(ISP), you need to + use the S3(PA13) to make CPU return to boot status. In this mode, the + on chip bootloader will run, making the ISP possible. + + BatchISP + -------- + + Unlike other Atmel parts, the AVR32 will not work with the FLIP GUI + program. Instead, you must use the command-line loader call BatchISP. + If need to download FLIP from the atmel.com website, install the USB + driver in the FLIP usb directory. Then in the bin directory where + you installed FLIP, you will also find batchisp.exe. + + NOTE: The AVR32DEV1 setenv.sh files will add the path to the BatchISP + bin directory to the Cygwin PATH variable. If you use a different + version of FLIP or if you install FLIP in a different location, you + will need to modify the setenv.sh files. + + Notes from "AVR32 UC3 USB DFU Bootloader" (doc7745.pdf) + + "To launch BatchISP, open a command prompt. Windows or Cygwin command + prompt can be used provided that the bin folder of the FLIP installation + directory is in the PATH (Windows’ or Cygwin’s) environment variable. + When running BatchISP on AT32UC3xxxxx, the target part has to be specified + with -device at32uc3xxxxx and the communication port with -hardware usb. + Commands can then be placed after -operation. These commands are executed + in order. BatchISP options can be placed in a text file invoked using + -cmdfile rather than on the command line. + + "BatchISP works with an internal ISP buffer per target memory. These ISP + buffers can be filled from several sources. All target operations (program, + verify, read) are performed using these buffers." + + The following BatchISP command line will erase FLASH, write the nuttx binary + into FLASH, and reset the AVR32. This command line is available in the + script config/avr32dev1/tools/doisp.sh: + + batchisp -device at32uc3b0256 -hardware usb -operation erase f memory flash \ + blankcheck loadbuffer nuttx.elf program verify start reset 0 + + "BatchISP main commands available on AT32UC3xxxxx are: + + - ASSERT { PASS | FAIL } changes the displayed results of the following + operations according to the expected behavior. + - ONFAIL { ASK | ABORT | RETRY | IGNORE } changes the interactive behavior + of BatchISP in case of failure. + - WAIT inserts a pause between two ISP operations. + - ECHO displays a message. + - ERASE F erases internal flash contents, except the bootloader. + - MEMORY { FLASH | SECURITY | CONFIGURATION | BOOTLOADER | SIGNATURE | USER } + selects a target memory on which to apply the following operations. + - ADDRANGE selects in the current target memory an + address range on which to apply the following operations. + - BLANKCHECK checks that the selected address range is erased. + - FILLBUFFER fills the ISP buffer with a byte value. + - LOADBUFFER { | } loads the ISP buffer from an + input file. + - PROGRAM programs the selected address range with the ISP buffer. + - VERIFY verifies that the selected address range has the same contents + as the ISP buffer. + - READ reads the selected address range to the ISP buffer. + - SAVEBUFFER { HEX386 | HEX86 } saves the ISP buffer to an + output file. + - START { RESET | NORESET } 0 starts the execution of the programmed + application with an optional hardware reset of the target. + + "The AT32UC3xxxxx memories made available by BatchISP are: + + - FLASH: This memory is the internal flash array of the target, including the + bootloader protected area. E.g. on AT32UC3A0512 (512-kB internal flash), + addresses from 0 to 0x7FFFF can be accessed in this memory. + - SECURITY: This memory contains only one byte. The least significant bit + of this byte reflects the value of the target Security bit which can only + be set to 1. Once set, the only accepted commands will be ERASE and START. + After an ERASE command, all commands are accepted until the end of the + non-volatile ISP session, even if the Security bit is set. + - CONFIGURATION: This memory contains one byte per target general-purpose + fuse bit. The least significant bit of each byte reflects the value of + the corresponding GP fuse bit. + - BOOTLOADER: This memory contains three bytes concerning the ISP: the ISP + version in BCD format without the major version number (always 1), the + ISP ID0 and the ISP ID1. + - SIGNATURE: This memory contains four bytes concerning the part: the product + manufacturer ID, the product family ID, the product ID and the product + revision. + - USER: This memory is the internal flash User page of the target, with + addresses from 0 to 0x1FF. + + "For further details about BatchISP commands, launch batchisp -h or see the + help files installed with FLIP ..." + +Reset +^^^^^ + + I don't trust the reset button -- if you reset and something weird happens, + try a full power cycle. + +Make Tip +^^^^^^^^ + + Because this build uses a native Windows toolchain and the native Windows + tools do not understand Cygwin's symbolic links, the NuttX make system does + something weird: It copies the configuration directories instead of linking + to them (it could, perhaps, use the NTFS 'mklink' command, but it doesn't). + + A consequence of this is that you can easily get confused when you edit + a file in one of the "linked" directories, re-build NuttX, and then not see your + changes when you run the program. That is because build is still using the + version of the file in the copied directory, not your modified file! To work + around this annoying behavior, do the following when you re-build: + + make clean_context all <-- Remove and re-copy all of the directories, then make all + doisp.sh <-- Load the code onto the board. + +AVR32DEV1 Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=avr + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_AVR=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_FAMILY_AVR32=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=at32uc3 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_AT32UC3B0256 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=avr32dev1 (for the AV32DEV1 board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_AVR32DEV1 + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_AVR32_GPIOIRQ - GPIO interrupt support + CONFIG_AVR32_GPIOIRQSETA - Set of GPIOs on PORTA that support interrupts + CONFIG_AVR32_GPIOIRQSETB - Set of GPIOs on PORTB that support interrupts + + CONFIG_AVR32_USARTn - Enable support for USARTn + CONFIG_AVR32_USARTn_RS232 - Configure USARTn as an RS232 interface. + CONFIG_AVR32_USARTn_SPI - Configure USARTn as an SPI interface. + CONFIG_AVR32_USARTn_RS485 - Configure USARTn as an RS485 interface. + CONFIG_AVR32_USARTn_MAN - Configure USARTn as an Manchester interface. + CONFIG_AVR32_USARTn_MODEM - Configure USARTn as an Modem interface. + CONFIG_AVR32_USARTn_IRDA - Configure USARTn as an IRDA interface. + CONFIG_AVR32_USARTn_ISO786 - Configure USARTn as an ISO786 interface. + + AT32UC3B0256 specific device driver settings + + CONFIG_USARTn_SERIAL_CONSOLE - selects the USARTn for the + console and ttys0 (default is the USART0). + CONFIG_USARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_USARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_USARTn_BAUD - The configure BAUD of the USART. Must be + CONFIG_USARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_USARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_USARTn_2STOP - Two stop bits + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. Each Atmel AVR32DEV configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh avr32dev1/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + (Use configure.bat instead of configure.sh in a native Windows environment). + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume the AVR toolchain under Cygwin + with Windows. This is easily reconfigured: + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_AVR32_AVRTOOLSW=y + +Configuration Sub-Directories +----------------------------- + + nsh: + + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables only the serial NSH interface. + + ostest: + + This configuration directory, performs a simple OS test using + examples/ostest. + + NOTE: Round-robin scheduling is disabled in this test because + the RR test in examples/ostest declares data structures that + are too large for the poor little uc3 SRAM. diff --git a/configs/avr32dev1/include/board.h b/configs/avr32dev1/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..75ab88a9972bb8b64758971973a0b54d94f8f782 --- /dev/null +++ b/configs/avr32dev1/include/board.h @@ -0,0 +1,204 @@ +/************************************************************************************ + * configs/avr32dev1/include/board.h + * + * Copyright (C) 2010-2011, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_AVR32DEV1_INCLUDE_BOARD_H +#define __CONFIGS_AVR32DEV1_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* Oscillator setup: RCOSC, OSC32, OSC0, OSC1. Only RCOSC, OSC0, or PLL0 can drive + * the main clock. + */ + +/* The RCOSC frequency needs to be calibrated! */ + +#define AVR32_FRCOSC 115000 /* RCOSC frequency in Hz. 115KHz nominal */ + +#define AVR32_FOSC32 32768 /* OSC32 frequency in Hz */ +#define AVR32_OSC32STARTUP 3 /* OSC32 startup time in RCOSC periods */ + +#define AVR32_FOSC0 12000000 /* OSC0 frequency in Hz */ +#define AVR32_OSC0STARTUP 3 /* OSC0 startup time in RCOSC periods. + +/* #define AVR32_FOSC1 12000000 OSC1 frequency: Hz. + * #define AVR32_OSC1STARTUP 3 OSC1 startup time in RCOSC periods. + */ + +/* PLL setup + * + * FOSC0 MUL DIV PLL DIV2_EN CPU_CLOCK PBA_CLOCK COMMENT + * (MHz) (MHz) (MHz) (MHz) + * 12 15 1 192 1 12 12 + * 12 9 3 40 1 20 20 PLL out of spec + * 12 15 1 192 1 24 12 + * 12 9 1 120 1 30 15 + * 12 9 3 40 0 40 20 PLL out of spec + * 12 15 1 192 1 48 12 + * 12 15 1 192 1 48 24 + * 12 8 1 108 1 54 27 + * 12 9 1 120 1 60 15 + * 12 9 1 120 1 60 30 + * 12 10 1 132 1 66 16.5 + */ + +#define AVR32_CLOCK_PLL0_OSC0 1 +#undef AVR32_CLOCK_PLL0_OSC1 +#define AVR32_PLL0_MUL 15 +#define AVR32_PLL0_DIV 1 +#define AVR32_PLL0_DIV2 1 +#define AVR32_PLL0_WBWM 0 +#define AVR32_PLL0_FREQ 192000000 + +/* Set PLL1 @ 96 MHz from OSC0: 12MHz*(7+1)/1 = 96MHz */ + +#define AVR32_CLOCK_PLL1_OSC0 1 +#undef AVR32_CLOCK_PLL1_OSC1 +#define AVR32_PLL1_MUL 7 +#define AVR32_PLL1_DIV 1 +#define AVR32_PLL1_DIV2 1 +#define AVR32_PLL1_WBWM 0 +#define AVR32_PLL1_FREQ 96000000 + +/* Clock divider setup */ + +#define AVR32_CKSEL_CPUDIV 0 +#define AVR32_CKSEL_HSBDIV 0 +#define AVR32_CKSEL_PBADIV 0 +#define AVR32_CKSEL_PBBDIV 0 + +/* GCLK_USBB */ + +#undef AVR32_CLOCK_USB_PLL0 +#define AVR32_CLOCK_USB_PLL1 1 +#undef AVR32_CLOCK_USB_OSC0 +#undef AVR32_CLOCK_USB_OSC1 +#define AVR32_CLOCK_USB_DIV 0 + +/* Main Clock settup: Select OSC0 as the main clock. + * + * - A 12Mhz crystal is provided on he board for OSC0. + * - The AVR32DEV1 board has no support for OSC1. + * - There are pads for he 32Khz OSC32, but it is not populated on the + * board. + */ + +#define AVR32_CLOCK_OSC0 1 +#undef AVR32_CLOCK_OSC1 /* Not supported */ +#undef AVR32_CLOCK_OSC32 /* Not populated */ +#undef AVR32_CLOCK_PLL0 +#undef AVR32_CLOCK_PLL1 + +#define AVR32_CPU_CLOCK AVR32_FOSC0 +#define AVR32_PBA_CLOCK AVR32_FOSC0 + +/* Pin muliplexing selecion *********************************************************/ + +#define PINMUX_USART1_RXD PINMUX_USART1_RXD_1 +#define PINMUX_USART1_TXD PINMUX_USART1_TXD_1 + +/* LED definitions ******************************************************************/ +/* The AVR32DEV1 board has 3 LEDs, two of which can be controlled through GPIO pins */ + + /* ON OFF */ + /* LED1 LED2 LED1 LED2 */ +#define LED_STARTED 0 /* OFF OFF OFF OFF */ +#define LED_HEAPALLOCATE 0 /* OFF OFF OFF OFF */ +#define LED_IRQSENABLED 0 /* OFF OFF OFF OFF */ +#define LED_STACKCREATED 1 /* ON OFF OFF OFF */ +#define LED_INIRQ 2 /* ON ON ON OFF */ +#define LED_SIGNAL 2 /* ON ON ON OFF */ +#define LED_ASSERTION 2 /* ON ON ON OFF */ +#define LED_PANIC 2 /* ON ON ON OFF */ + +/* Button definitions ***************************************************************/ +/* The AVR32DEV1 board has 3 BUTTONs, two of which can be sensed through GPIO pins. */ + +#define BUTTON1 1 /* Bit 0: Button 1 */ +#define BUTTON2 2 /* Bit 1: Button 2 */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: avr32_boardinitialize + * + * Description: + * All AVR32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void avr32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_AVR32DEV1_INCLUDE_BOARD_H */ + diff --git a/configs/avr32dev1/nsh/Make.defs b/configs/avr32dev1/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6b1f20c0a3c556505946ac248653e4e3adc199ed --- /dev/null +++ b/configs/avr32dev1/nsh/Make.defs @@ -0,0 +1,107 @@ +############################################################################ +# configs/avr32dev1/nsh/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/avr/src/avr32/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -Os -ffunction-sections -fdata-sections -fno-strict-aliasing +endif + +ARCHCFLAGS = -fno-builtin -muse-rodata-section +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHNOPICFLAGS = -fno-pic +ARCHPICFLAGS = -fpic +ARCHALLCFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +ARCHALLCXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe + +CFLAGS = $(ARCHNOPICFLAGS) $(ARCHALLCFLAGS) +CPICFLAGS = $(ARCHPICFLAGS) $(ARCHALLCFLAGS) +CXXFLAGS = $(ARCHNOPICFLAGS) $(ARCHALLCXXFLAGS) +CXXPICFLAGS = $(ARCHPICFLAGS) $(ARCHALLCXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(ARCHALLCFLAGS) -D__ASSEMBLY__ + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +LDFLAGS += -nostartfiles -nodefaultlibs +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/avr32dev1/nsh/defconfig b/configs/avr32dev1/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..dadecbc7139b40b8c766c74043b3cadcdef877cf --- /dev/null +++ b/configs/avr32dev1/nsh/defconfig @@ -0,0 +1,699 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +CONFIG_ARCH_AVR=y +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="avr" +CONFIG_ARCH_FAMILY="avr32" +CONFIG_ARCH_CHIP="at32uc3" +# CONFIG_ARCH_CHIP_ATMEGA is not set +# CONFIG_ARCH_CHIP_AT90USB is not set +CONFIG_ARCH_CHIP_AT32UC3=y +# CONFIG_ARCH_FAMILY_AVR is not set +CONFIG_ARCH_FAMILY_AVR32=y + +# +# AVR32 Configuration Options +# +CONFIG_AVR32_AVRTOOLSW=y + +# +# AT32U3 Configuration Options +# +# CONFIG_ARCH_CHIP_AT32UC3B064 is not set +# CONFIG_ARCH_CHIP_AT32UC3B0128 is not set +CONFIG_ARCH_CHIP_AT32UC3B0256=y +# CONFIG_ARCH_CHIP_AT32UC3B0512 is not set +# CONFIG_ARCH_CHIP_AT32UC3B164 is not set +# CONFIG_ARCH_CHIP_AT32UC3B1128 is not set +# CONFIG_ARCH_CHIP_AT32UC3B1256 is not set +# CONFIG_ARCH_CHIP_AT32UC3B1512 is not set +# CONFIG_ARCH_CHIP_AT32UC3A is not set +CONFIG_ARCH_CHIP_AT32UC3B=y +CONFIG_ARCH_CHIP_AT32UC3B0=y +# CONFIG_ARCH_CHIP_AT32UC3B1 is not set + +# +# AT32U3 Peripheral Selections +# +# CONFIG_AVR32_USART0 is not set +CONFIG_AVR32_USART1=y +# CONFIG_AVR32_USART2 is not set +# CONFIG_AVR32_USART1_IRDA is not set +# CONFIG_AVR32_USART1_ISO786 is not set +# CONFIG_AVR32_USART1_MAN is not set +# CONFIG_AVR32_USART1_MODEM is not set +CONFIG_AVR32_USART1_RS232=y +# CONFIG_AVR32_USART1_RS485 is not set +# CONFIG_AVR32_USART1_SPI is not set +CONFIG_AVR32_GPIOIRQ=y +CONFIG_AVR32_GPIOIRQSETA=0 +CONFIG_AVR32_GPIOIRQSETB=0x0000000c + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +CONFIG_ARCH_STACKDUMP=y +CONFIG_ENDIAN_BIG=y +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1140 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_AVR32DEV1=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="avr32dev1" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=2 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=16 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_USART1=y + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=57600 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_TMPDIR="/tmp" +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_CONSOLE=y + +# +# USB Trace Support +# +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/avr32dev1/nsh/ld.script b/configs/avr32dev1/nsh/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..5f661ca446afe9e5b4c417e19e0a8dfef90915fc --- /dev/null +++ b/configs/avr32dev1/nsh/ld.script @@ -0,0 +1,105 @@ +/**************************************************************************** + * configs/avr32dev1/nsh/ld.script + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") +OUTPUT_ARCH(avr32:uc) +ENTRY(_stext) + +/* The following assumes that the bootloader resides at 0x8000:0000 and so + * links the application to execute after the bootloader at 0x8000:2000. + * To link so that NuttX boots directly without using the bootloader, + * change the flash definition to: + * + * flash (rxai!w) : ORIGIN = 0x80000000, LENGTH = 256K + */ + +MEMORY +{ + flash (rxai!w) : ORIGIN = 0x80002000, LENGTH = 256K - 8K + intram (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 32K + userpage : ORIGIN = 0x80800000, LENGTH = 512 + factorypage : ORIGIN = 0x80800200, LENGTH = 512 +} + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + _eronly = ABSOLUTE(.); /* See below */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > intram AT > flash + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > intram + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} + diff --git a/configs/avr32dev1/nsh/setenv.sh b/configs/avr32dev1/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..b3ab164ad4d67d1de24c419cab19c0cb40423c7d --- /dev/null +++ b/configs/avr32dev1/nsh/setenv.sh @@ -0,0 +1,57 @@ +#!/bin/bash +# configs/avr32dev1/nsh/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +# +# This PATH setup assumes that you are using versin 2.1.4 of the Atmel +# AVR GNU tools installed at the default location on Windows. NOTE +# that the path is in appended to the end of the PATH variable; this is +# because there are also many GNUWin32 binaries there that conflict with +# Cygwin versions. +# + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` + +export AVR32_BIN="/cygdrive/c/Program Files/Atmel/AVR Tools/AVR32 Toolchain/bin/" +export FLIP_BIN="/cygdrive/c/Program Files/Atmel/Flip 3.4.2/bin" +export AVR32DEV1_BIN="${WD}/configs/avr32dev1/tools" +export PATH="${FLIP_BIN}:${AVR32DEV1_BIN}:/sbin:/usr/sbin:${PATH_ORIG}:${AVR32_BIN}" + +echo "PATH : ${PATH}" diff --git a/configs/avr32dev1/ostest/Make.defs b/configs/avr32dev1/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..d3265550b1e107999d4930633c9a5f40789310bc --- /dev/null +++ b/configs/avr32dev1/ostest/Make.defs @@ -0,0 +1,121 @@ +############################################################################ +# configs/avr32dev1/ostest/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/avr/src/avr32/Toolchain.defs + +# Setup for the selected toolchain + +ifeq ($(CONFIG_AVR32_AVRTOOLSW),y) + # AVR Tools under Windows + CROSSDEV = avr32- + WINTOOL = y + ARCHCPUFLAGS = -mpart=uc3b0256 +endif +ifeq ($(CONFIG_AVR32_AVRTOOLSL),y) + # AVR Tools under Linux + CROSSDEV = avr32- + ARCHCPUFLAGS = -mpart=uc3b0256 +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -Os -ffunction-sections -fdata-sections -fno-strict-aliasing +endif + +ARCHCFLAGS = -fno-builtin -muse-rodata-section +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHNOPICFLAGS = -fno-pic +ARCHPICFLAGS = -fpic +ARCHALLCFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +ARCHALLCXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe + +CFLAGS = $(ARCHNOPICFLAGS) $(ARCHALLCFLAGS) +CPICFLAGS = $(ARCHPICFLAGS) $(ARCHALLCFLAGS) +CXXFLAGS = $(ARCHNOPICFLAGS) $(ARCHALLCXXFLAGS) +CXXPICFLAGS = $(ARCHPICFLAGS) $(ARCHALLCXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(ARCHALLCFLAGS) -D__ASSEMBLY__ + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +LDFLAGS += -nostartfiles -nodefaultlibs +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/avr32dev1/ostest/defconfig b/configs/avr32dev1/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..83d72fda29da78bb4274793436047bb07bc04e2c --- /dev/null +++ b/configs/avr32dev1/ostest/defconfig @@ -0,0 +1,618 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +CONFIG_ARCH_AVR=y +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="avr" +CONFIG_ARCH_FAMILY="avr32" +CONFIG_ARCH_CHIP="at32uc3" +# CONFIG_ARCH_CHIP_ATMEGA is not set +# CONFIG_ARCH_CHIP_AT90USB is not set +CONFIG_ARCH_CHIP_AT32UC3=y +# CONFIG_ARCH_FAMILY_AVR is not set +CONFIG_ARCH_FAMILY_AVR32=y + +# +# AVR32 Configuration Options +# +CONFIG_AVR32_AVRTOOLSW=y + +# +# AT32U3 Configuration Options +# +# CONFIG_ARCH_CHIP_AT32UC3B064 is not set +# CONFIG_ARCH_CHIP_AT32UC3B0128 is not set +CONFIG_ARCH_CHIP_AT32UC3B0256=y +# CONFIG_ARCH_CHIP_AT32UC3B0512 is not set +# CONFIG_ARCH_CHIP_AT32UC3B164 is not set +# CONFIG_ARCH_CHIP_AT32UC3B1128 is not set +# CONFIG_ARCH_CHIP_AT32UC3B1256 is not set +# CONFIG_ARCH_CHIP_AT32UC3B1512 is not set +# CONFIG_ARCH_CHIP_AT32UC3A is not set +CONFIG_ARCH_CHIP_AT32UC3B=y +CONFIG_ARCH_CHIP_AT32UC3B0=y +# CONFIG_ARCH_CHIP_AT32UC3B1 is not set + +# +# AT32U3 Peripheral Selections +# +# CONFIG_AVR32_USART0 is not set +CONFIG_AVR32_USART1=y +# CONFIG_AVR32_USART2 is not set +# CONFIG_AVR32_USART1_IRDA is not set +# CONFIG_AVR32_USART1_ISO786 is not set +# CONFIG_AVR32_USART1_MAN is not set +# CONFIG_AVR32_USART1_MODEM is not set +CONFIG_AVR32_USART1_RS232=y +# CONFIG_AVR32_USART1_RS485 is not set +# CONFIG_AVR32_USART1_SPI is not set +CONFIG_AVR32_GPIOIRQ=y +CONFIG_AVR32_GPIOIRQSETA=0 +CONFIG_AVR32_GPIOIRQSETB=0x0000000c + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +CONFIG_ARCH_STACKDUMP=y +CONFIG_ENDIAN_BIG=y +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1140 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_AVR32DEV1=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="avr32dev1" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=2 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=16 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_USART1=y + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=57600 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=1024 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/avr32dev1/ostest/ld.script b/configs/avr32dev1/ostest/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..f878abef8c67831c5f336376aeab2fa6372ac8ee --- /dev/null +++ b/configs/avr32dev1/ostest/ld.script @@ -0,0 +1,105 @@ +/**************************************************************************** + * configs/avr32dev1/ostest/ld.script + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") +OUTPUT_ARCH(avr32:uc) +ENTRY(_stext) + +/* The following assumes that the bootloader resides at 0x8000:0000 and so + * links the application to execute after the bootloader at 0x8000:2000. + * To link so that NuttX boots directly without using the bootloader, + * change the flash definition to: + * + * flash (rxai!w) : ORIGIN = 0x80000000, LENGTH = 256K + */ + +MEMORY +{ + flash (rxai!w) : ORIGIN = 0x80002000, LENGTH = 256K - 8K + intram (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 32K + userpage : ORIGIN = 0x80800000, LENGTH = 512 + factorypage : ORIGIN = 0x80800200, LENGTH = 512 +} + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + _eronly = ABSOLUTE(.); /* See below */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > intram AT > flash + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > intram + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} + diff --git a/configs/avr32dev1/ostest/setenv.sh b/configs/avr32dev1/ostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3c3bfcc4087e62964007c6b5a5eea578491a9197 --- /dev/null +++ b/configs/avr32dev1/ostest/setenv.sh @@ -0,0 +1,57 @@ +#!/bin/bash +# configs/avr32dev1/ostest/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +# +# This PATH setup assumes that you are using versin 2.1.4 of the Atmel +# AVR GNU tools installed at the default location on Windows. NOTE +# that the path is in appended to the end of the PATH variable; this is +# because there are also many GNUWin32 binaries there that conflict with +# Cygwin versions. +# + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` + +export AVR32_BIN="/cygdrive/c/Program Files/Atmel/AVR Tools/AVR32 Toolchain/bin/" +export FLIP_BIN="/cygdrive/c/Program Files/Atmel/Flip 3.4.2/bin" +export AVR32DEV1_BIN="${WD}/configs/avr32dev1/tools" +export PATH="${FLIP_BIN}:${AVR32DEV1_BIN}:/sbin:/usr/sbin:${PATH_ORIG}:${AVR32_BIN}" + +echo "PATH : ${PATH}" diff --git a/configs/avr32dev1/ostest/test-result.txt b/configs/avr32dev1/ostest/test-result.txt new file mode 100644 index 0000000000000000000000000000000000000000..154a474826ebfa7241f1018de38cb90c18826bf6 --- /dev/null +++ b/configs/avr32dev1/ostest/test-result.txt @@ -0,0 +1,404 @@ +examples/ostest output as of November 4, 2010 +============================================= + +stdio_test: write fd=1 +stdio_test: write fd=2 +stdio_test: Standard I/O Check: printf +user_start: Started user_main at PID=2 +user_start: Exitting +stdio_test: Standard I/O Check: fprintf to stderr + +user_main: Begin argument test +user_main: Started with argc=5 +user_main: argv[0]="" +user_main: argv[1]="Arg1" +user_main: argv[2]="Arg2" +user_main: argv[3]="Arg3" +user_main: argv[4]="Arg4" + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 71a0 71a0 +ordblks 2 2 +mxordblk 4a80 4a80 +uordblks 1900 1900 +fordblks 58a0 58a0 + +user_main: /dev/null test +dev_null: Read 0 bytes from /dev/null +dev_null: Wrote 1024 bytes to /dev/null + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 71a0 71a0 +ordblks 2 2 +mxordblk 4a80 4a80 +uordblks 1900 1900 +fordblks 58a0 58a0 + +user_main: mutex test +Initializing mutex +Starting thread 1 +Starting thread 2 + Thread1 Thread2 + Loops 32 32 + Errors 0 0 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 71a0 71a0 +ordblks 2 2 +mxordblk 4a80 4a80 +uordblks 1900 1900 +fordblks 58a0 58a0 + +user_main: cancel test +cancel_test: Test 1: Normal Cancelation +cancel_test: Starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +cancel_test: waiter exited with result=ffffffff +cancel_test: PASS thread terminated with PTHREAD_CANCELED +cancel_test: Test 2: Cancelation of detached thread +cancel_test: Re-starting thread +restart_thread: Destroying cond +restart_thread: Destroying mutex +restart_thread: Re-starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +cancel_test: PASS pthread_join failed with status=ESRCH +cancel_test: Test 3: Non-cancelable threads +cancel_test: Re-starting thread (non-cancelable) +restart_thread: Destroying cond +restart_thread: Destroying mutex +restart_thread: Re-starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +thread_waiter: Setting non-cancelable +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +thread_waiter: Releasing mutex +thread_waiter: Setting cancelable +cancel_test: waiter exited with result=ffffffff +cancel_test: PASS thread terminated with PTHREAD_CANCELED + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 71a0 71a0 +ordblks 2 2 +mxordblk 4a80 4a80 +uordblks 1900 1900 +fordblks 58a0 58a0 + +user_main: semaphore test +sem_test: Initializing semaphore to 0 +sem_test: Starting waiter thread 1 +sem_test: Set thread 1 priority to 191 +waiter_func: Thread 1 Started +waiter_func: Thread 1 initial semaphore value = 0 +waiter_func: Thread 1 waiting on semaphore +sem_test: Starting waiter thread 2 +sem_test: Set thread 2 priority to 128 +waiter_func: Thread 2 Started +waiter_func: Thread 2 initial semaphore value = -1 +waiter_func: Thread 2 waiting on semaphore +sem_test: Starting poster thread 3 +sem_test: Set thread 3 priority to 64 +poster_func: Thread 3 started +poster_func: Thread 3 semaphore value = -2 +poster_func: Thread 3 posting semaphore +waiter_func: Thread 1 awakened +waiter_func: Thread 1 new semaphore value = -1 +waiter_func: Thread 1 done +poster_func: Thread 3 new semaphore value = -1 +poster_func: Thread 3 semaphore value = -1 +poster_func: Thread 3 posting semaphore +waiter_func: Thread 2 awakened +waiter_func: Thread 2 new semaphore value = 0 +waiter_func: Thread 2 done +poster_func: Thread 3 new semaphore value = 0 +poster_func: Thread 3 done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 71a0 71a0 +ordblks 2 2 +mxordblk 4a80 4a80 +uordblks 1900 1900 +fordblks 58a0 58a0 + +user_main: condition variable test +cond_test: Initializing mutex +cond_test: Initializing cond +cond_test: Starting waiter +cond_test: Set thread 1 priority to 128 +waiter_thread: Started +cond_test: Starting signaler +cond_test: Set thread 2 priority to 64 +thread_signaler: Started +thread_signaler: Terminating +cond_test: signaler terminated, now cancel the waiter +cond_test: Waiter Signaler +cond_test: Loops 32 32 +cond_test: Errors 0 0 +cond_test: +cond_test: 0 times, waiter did not have to wait for data +cond_test: 0 times, data was already available when the signaler run +cond_test: 0 times, the waiter was in an unexpected state when the signaler ran + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 71a0 71a0 +ordblks 2 2 +mxordblk 4a80 4a80 +uordblks 1900 1900 +fordblks 58a0 58a0 + +user_main: timed wait test +thread_waiter: Initializing mutex +timedwait_test: Initializing cond +timedwait_test: Starting waiter +timedwait_test: Set thread 2 priority to 177 +thread_waiter: Taking mutex +thread_waiter: Starting 5 second wait for condition +timedwait_test: Joining +thread_waiter: pthread_cond_timedwait timed out +thread_waiter: Releasing mutex +thread_waiter: Exit with status 0x12345678 +timedwait_test: waiter exited with result=12345678 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 71a0 71a0 +ordblks 2 2 +mxordblk 4a80 4a80 +uordblks 1900 1900 +fordblks 58a0 58a0 + +user_main: message queue test +mqueue_test: Starting receiver +mqueue_test: Set receiver priority to 128 +receiver_thread: Starting +mqueue_test: Starting sender +mqueue_test: Set sender thread priority to 64 +mqueue_test: Waiting for sender to complete +sender_thread: Starting +receiver_thread: mq_receive succeeded on msg 0 +sender_thread: mq_send succeeded on msg 0 +receiver_thread: mq_receive succeeded on msg 1 +sender_thread: mq_send succeeded on msg 1 +receiver_thread: mq_receive succeeded on msg 2 +sender_thread: mq_send succeeded on msg 2 +receiver_thread: mq_receive succeeded on msg 3 +sender_thread: mq_send succeeded on msg 3 +receiver_thread: mq_receive succeeded on msg 4 +sender_thread: mq_send succeeded on msg 4 +receiver_thread: mq_receive succeeded on msg 5 +sender_thread: mq_send succeeded on msg 5 +receiver_thread: mq_receive succeeded on msg 6 +sender_thread: mq_send succeeded on msg 6 +receiver_thread: mq_receive succeeded on msg 7 +sender_thread: mq_send succeeded on msg 7 +receiver_thread: mq_receive succeeded on msg 8 +sender_thread: mq_send succeeded on msg 8 +receiver_thread: mq_receive succeeded on msg 9 +sender_thread: mq_send succeeded on msg 9 +sender_thread: returning nerrors=0 +mqueue_test: Killing receiver +receiver_thread: mq_receive interrupted! +receiver_thread: returning nerrors=0 +mqueue_test: Canceling receiver +mqueue_test: receiver has already terminated + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 71a0 71a0 +ordblks 2 2 +mxordblk 4a80 4a80 +uordblks 1900 1900 +fordblks 58a0 58a0 + +user_main: timed message queue test +timedmqueue_test: Starting sender +sender_thread: Starting +sender_thread: mq_timedsend succeeded on msg 0 +sender_thread: mq_timedsend succeeded on msg 1 +sender_thread: mq_timedsend succeeded on msg 2 +sender_thread: mq_timedsend succeeded on msg 3 +sender_thread: mq_timedsend succeeded on msg 4 +sender_thread: mq_timedsend succeeded on msg 5 +sender_thread: mq_timedsend succeeded on msg 6 +sender_thread: mq_timedsend succeeded on msg 7 +sender_thread: mq_timedsend succeeded on msg 8 +timedmqueue_test: Waiting for sender to complete +sender_thread: mq_timedsend 9 timed out as expected +sender_thread: returning nerrors=0 +timedmqueue_test: Starting receiver +receiver_thread: Starting +receiver_thread: mq_timedreceive succeeded on msg 0 +receiver_thread: mq_timedreceive succeeded on msg 1 +receiver_thread: mq_timedreceive succeeded on msg 2 +receiver_thread: mq_timedreceive succeeded on msg 3 +receiver_thread: mq_timedreceive succeeded on msg 4 +receiver_thread: mq_timedreceive succeeded on msg 5 +receiver_thread: mq_timedreceive succeeded on msg 6 +receiver_thread: mq_timedreceive succeeded on msg 7 +receiver_thread: mq_timedreceive succeeded on msg 8 +timedmqueue_test: Waiting for receiver to complete +receiver_thread: Receive 9 timed out as expected +receiver_thread: returning nerrors=0 +timedmqueue_test: Test complete + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 71a0 71a0 +ordblks 2 2 +mxordblk 4a80 4a80 +uordblks 1900 1900 +fordblks 58a0 58a0 + +user_main: signal handler test +sighand_test: Initializing semaphore to 0 +sighand_test: Starting waiter task +sighand_test: Started waiter_main pid=20 +waiter_main: Waiter started +waiter_main: Unmasking signal 17 +waiter_main: Registering signal handler +waiter_main: oact.sigaction=0 oact.sa_flags=0 oact.sa_mask=0 +waiter_main: Waiting on semaphore +sighand_test: Signaling pid=20 with signo=17 sigvalue=42 +wakeup_action: Received signal 17 +wakeup_action: sival_int=42 +wakeup_action: si_code=1 +wakeup_action: ucontext=0 +waiter_main: sem_wait() successfully interrupted by signal +waiter_main: done +sighand_test: done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 71a0 71a0 +ordblks 2 2 +mxordblk 4a80 4a80 +uordblks 1900 1900 +fordblks 58a0 58a0 + +user_main: POSIX timer test +timer_test: Initializing semaphore to 0 +timer_test: Unmasking signal 17 +timer_test: Registering signal handler +timer_test: oact.sigaction=0 oact.sa_flags=0 oact.sa_mask=0 +timer_test: Creating timer +timer_test: Starting timer +timer_test: Waiting on semaphore +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=1 +timer_test: Waiting on semaphore +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=2 +timer_test: Waiting on semaphore +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=3 +timer_test: Waiting on semaphore +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=4 +timer_test: Waiting on semaphore +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=5 +timer_test: Deleting timer +timer_test: done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 71a0 71a0 +ordblks 2 2 +mxordblk 4a80 4a80 +uordblks 1900 1900 +fordblks 58a0 58a0 + +user_main: barrier test +barrier_test: Initializing barrier +barrier_func: Thread 0 started +barrier_test: Thread 0 created +barrier_func: Thread 1 started +barrier_test: Thread 1 created +barrier_func: Thread 2 started +barrier_test: Thread 2 created +barrier_func: Thread 0 calling pthread_barrier_wait() +barrier_func: Thread 1 calling pthread_barrier_wait() +barrier_func: Thread 2 calling pthread_barrier_wait() +barrier_func: Thread 2, back with status=PTHREAD_BARRIER_SERIAL_THREAD (I AM SPECIAL) +barrier_func: Thread 0, back with status=0 (I am not special) +barrier_func: Thread 1, back with status=0 (I am not special) +barrier_func: Thread 2 done +barrier_func: Thread 0 done +barrier_func: Thread 1 done +barrier_test: Thread 0 completed with result=0 +barrier_test: Thread 1 completed with result=0 +barrier_test: Thread 2 completed with result=0 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 71a0 71a0 +ordblks 2 2 +mxordblk 4a80 4a80 +uordblks 1900 1900 +fordblks 58a0 58a0 + +Final memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 71a0 71a0 +ordblks 2 2 +mxordblk 4a80 4a80 +uordblks 1900 1900 +fordblks 58a0 58a0 +user_main: Exitting diff --git a/configs/avr32dev1/src/.gitignore b/configs/avr32dev1/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/avr32dev1/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/avr32dev1/src/Makefile b/configs/avr32dev1/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..df8d3890e9e9bc23ba26c20d6a258833d9a5697e --- /dev/null +++ b/configs/avr32dev1/src/Makefile @@ -0,0 +1,47 @@ +############################################################################ +# configs/avr32dev1/src/Makefile +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = avr32_boot.c +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += avr32_leds.c +endif +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += avr32_buttons.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/avr32dev1/src/avr32_boot.c b/configs/avr32dev1/src/avr32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..6c98e6203a9a15e89f29607f19360fb288f8d4de --- /dev/null +++ b/configs/avr32dev1/src/avr32_boot.c @@ -0,0 +1,84 @@ +/************************************************************************************ + * configs/avr32dev1/src/avr32_boot.c + * + * Copyright (C) 2010, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "at32uc3.h" +#include "avr32dev1.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: at32uc3_boardinitialize + * + * Description: + * All AVR32 AT32UC3 architectures must provide the following entry point. This + * entry point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void at32uc3_boardinitialize(void) +{ + /* Configure SPI chip selects */ + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initializeialize(); +#endif +} diff --git a/configs/avr32dev1/src/avr32_buttons.c b/configs/avr32dev1/src/avr32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..49a227d8a10d685fc6ac62dcd577ae6dacb4b132 --- /dev/null +++ b/configs/avr32dev1/src/avr32_buttons.c @@ -0,0 +1,188 @@ +/**************************************************************************** + * configs/avr32dev1/src/avr32_buttons.c + * + * Copyright (C) 2010-2011, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include "at32uc3_config.h" + +#include +#include + +#include +#include +#include + +#include +#include + +#include "at32uc3.h" +#include "avr32dev1.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_irqx + * + * Description: + * This function implements the core of the board_button_irq() logic. + * + ****************************************************************************/ + +#if defined(CONFIG_AVR32_GPIOIRQ) && defined(CONFIG_ARCH_IRQBUTTONS) && \ + (defined(CONFIG_AVR32DEV_BUTTON1_IRQ) || defined(CONFIG_AVR32DEV_BUTTON2_IRQ)) +static xcpt_t board_button_irqx(int irq, xcpt_t irqhandler) +{ + xcpt_t oldhandler; + + /* Attach the handler */ + + gpio_irqattach(irq, irqhandler, &oldhandler); + + /* Enable/disable the interrupt */ + + if (irqhandler) + { + gpio_irqenable(irq); + } + else + { + gpio_irqdisable(irq); + } + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state of + * all buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + (void)at32uc3_configgpio(PINMUX_GPIO_BUTTON1); + (void)at32uc3_configgpio(PINMUX_GPIO_BUTTON2); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions in the board.h header file for the meaning of each bit in + * the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t retval; + + retval = at32uc3_gpioread(PINMUX_GPIO_BUTTON1) ? 0 : BUTTON1; + retval |= at32uc3_gpioread(PINMUX_GPIO_BUTTON2) ? 0 : BUTTON2; + + return retval; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address isreturned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the + * overall GPIO IRQ feature and CONFIG_AVR32_GPIOIRQSETA and/or + * CONFIG_AVR32_GPIOIRQSETB must be enabled to select GPIOs to support + * interrupts on. For button support, bits 2 and 3 must be set in + * CONFIG_AVR32_GPIOIRQSETB (PB2 and PB3). + * + ****************************************************************************/ + +#if defined(CONFIG_AVR32_GPIOIRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ +#ifdef CONFIG_AVR32DEV_BUTTON1_IRQ + if (id == BUTTON1) + { + return board_button_irqx(GPIO_BUTTON1_IRQ, irqhandler); + } + else +#endif +#ifdef CONFIG_AVR32DEV_BUTTON2_IRQ + if (id == BUTTON2) + { + return board_button_irqx(GPIO_BUTTON2_IRQ, irqhandler); + } + else +#endif + { + return NULL; + } +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/avr32dev1/src/avr32_leds.c b/configs/avr32dev1/src/avr32_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..0ce248fdec032ebe4a61c63d29a4f07d9ec4f0d0 --- /dev/null +++ b/configs/avr32dev1/src/avr32_leds.c @@ -0,0 +1,94 @@ +/**************************************************************************** + * configs/avr32dev1/src/avr32_leds.c + * + * Copyright (C) 2010, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "at32uc3.h" +#include "avr32dev1.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initializeialize + ****************************************************************************/ + +void board_autoled_initializeialize(void) +{ + at32uc3_configgpio(PINMUX_GPIO_LED1); + at32uc3_configgpio(PINMUX_GPIO_LED2); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + at32uc3_gpiowrite(PINMUX_GPIO_LED1, (led != 0)); + at32uc3_gpiowrite(PINMUX_GPIO_LED2, (led == 2)); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + at32uc3_gpiowrite(PINMUX_GPIO_LED1, (led == 2)); + at32uc3_gpiowrite(PINMUX_GPIO_LED2, false); +} +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/avr32dev1/src/avr32dev1.h b/configs/avr32dev1/src/avr32dev1.h new file mode 100644 index 0000000000000000000000000000000000000000..c831936f363519537dcf95d3b0b5c7dd277e95a8 --- /dev/null +++ b/configs/avr32dev1/src/avr32dev1.h @@ -0,0 +1,114 @@ +/************************************************************************************ + * configs/avr32dev1/src/avr32dev1.h + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef _CONFIGS_AVR32DEV1_SRC_AVR32DEV1_H +#define _CONFIGS_AVR32DEV1_SRC_AVR32DEV1_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include "at32uc3_config.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Configuration ********************************************************************/ + +#if (CONFIG_AVR32_GPIOIRQSETB & 4) == 1 +# define CONFIG_AVR32DEV_BUTTON1_IRQ 1 +#endif + +#if (CONFIG_AVR32_GPIOIRQSETB & 8) == 1 +# define CONFIG_AVR32DEV_BUTTON2_IRQ 1 +#endif + +/* AVRDEV1 GPIO Pin Definitions *****************************************************/ +/* LEDs + * + * The AVR32DEV1 board has 3 LEDs, two of which can be controlled through GPIO pins. + * + * PIN 13 PA7 LED1 + * PIN 14 PA8 LED2 + */ + +#define PINMUX_GPIO_LED1 (GPIO_ENABLE | GPIO_OUTPUT | GPIO_LOW | GPIO_PORTA | 7) +#define PINMUX_GPIO_LED2 (GPIO_ENABLE | GPIO_OUTPUT | GPIO_LOW | GPIO_PORTA | 8) + +/* BUTTONs + * + * The AVR32DEV1 board has 3 BUTTONs, two of which can be sensed through GPIO pins. + * + * PIN 24 PB2 KEY1 + * PIN 25 PB3 KEY2 + */ + +#if CONFIG_AVR32DEV_BUTTON1_IRQ +# define PINMUX_GPIO_BUTTON1 (GPIO_ENABLE | GPIO_INPUT | GPIO_INTR | \ + GPIO_INTMODE_BOTH | GPIO_GLITCH | GPIO_PORTB | 2) +# define GPIO_BUTTON1_IRQ AVR32_IRQ_GPIO_PB2 +#else +# define PINMUX_GPIO_BUTTON1 (GPIO_ENABLE | GPIO_INPUT | GPIO_GLITCH | \ + GPIO_PORTB | 2) +#endif + +#if CONFIG_AVR32DEV_BUTTON2_IRQ +# define PINMUX_GPIO_BUTTON2 (GPIO_ENABLE | GPIO_INPUT | GPIO_INTR | \ + GPIO_INTMODE_BOTH | GPIO_GLITCH | GPIO_PORTB | 3) +# define GPIO_BUTTON2_IRQ AVR32_IRQ_GPIO_PB3 +#else +# define PINMUX_GPIO_BUTTON2 (GPIO_ENABLE | GPIO_INPUT | GPIO_GLITCH | \ + GPIO_PORTB | 3) +#endif + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_AVR32DEV1_SRC_AVR32DEV1_H */ diff --git a/configs/avr32dev1/tools/doisp.sh b/configs/avr32dev1/tools/doisp.sh new file mode 100644 index 0000000000000000000000000000000000000000..cb1b5ee4af32bcbb4e0325c866f4b4a9c7374882 --- /dev/null +++ b/configs/avr32dev1/tools/doisp.sh @@ -0,0 +1,37 @@ +#!/bin/bash +#set -x + +# This script must be executed in the NuttX top-level directory. We'll check.. +# the .config file should be located there. + +TOPDIR=`pwd` +if [ ! -f .config ]; then + echo "There is no configured version of NuttX in this directory." + echo " Is '$TOPDIR' the NuttX top level directory?" + echo " Has NuttX been configured?" + exit 1 +fi + +# The NuttX build system creates a nuttx ELF file, but the batchisp tools +# expects the file to have a .elf extension + +if [ ! -f nuttx.elf ]; then + if [ ! -f nuttx ]; then + echo "The NuttX ELF file (nuttx or nuttx.elf) does not exist in this directory." + echo " Has the NuttX binary been built?" + exit 1 + fi + echo "Re-naming nuttx to nuttx.elf" + mv nuttx nuttx.elf || { echo "mv failed"; exit 1; } +else + if [ -f nuttx ]; then + echo "Replacing the old nuttx.elf with the new nuttx file." + mv nuttx nuttx.elf || { echo "mv failed"; exit 1; } + fi +fi + +DEVICE=at32uc3b0256 +HARDWARE=usb +OPERATION="erase f memory flash blankcheck loadbuffer nuttx.elf program verify start reset 0" + +batchisp -device $DEVICE -hardware $HARDWARE -operation $OPERATION diff --git a/configs/boardctl.c b/configs/boardctl.c new file mode 100644 index 0000000000000000000000000000000000000000..82c5289065610c101ed57e75d595953d89d4c94a --- /dev/null +++ b/configs/boardctl.c @@ -0,0 +1,496 @@ +/**************************************************************************** + * configs/boardctl.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include + +#ifdef CONFIG_BOARDCTL_USBDEVCTRL +# include +# include +# include +# include +#endif + +#ifdef CONFIG_LIB_BOARDCTL + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: boardctl_usbdevctrl + * + * Description: + * Handler the USB device control command. + * + * Input Parameters: + * ctrl - Described the USB device control command. + * + * Returned Value: + * On success zero (OK) is returned; -1 (ERROR) is returned on failure + * with the errno variable to to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARDCTL_USBDEVCTRL +static inline int boardctl_usbdevctrl(FAR struct boardioc_usbdev_ctrl_s *ctrl) +{ + int ret = OK; + + switch (ctrl->usbdev) + { +#ifdef CONFIG_CDCACM + case BOARDIOC_USBDEV_CDCACM: /* CDC/ACM, not in a composite */ + switch (ctrl->action) + { + case BOARDIOC_USBDEV_INITIALIZE: /* Initialize CDC/ACM device */ + break; /* There is no CDC/ACM initialization */ + + case BOARDIOC_USBDEV_CONNECT: /* Connect the CDC/ACM device */ +#ifndef CONFIG_CDCACM_COMPOSITE + { + DEBUGASSERT(ctrl->handle != NULL); + ret = cdcacm_initialize(ctrl->instance, ctrl->handle); + } +#endif + break; + + case BOARDIOC_USBDEV_DISCONNECT: /* Disconnect the CDC/ACM device */ + { + DEBUGASSERT(ctrl->handle != NULL && *ctrl->handle != NULL); + cdcacm_uninitialize(*ctrl->handle); + } + break; + + default: + ret = -EINVAL; + break; + } + break; +#endif + +#ifdef CONFIG_PL2303 + case BOARDIOC_USBDEV_PL2303: /* PL2303 serial, not in a composite */ + switch (ctrl->action) + { + case BOARDIOC_USBDEV_INITIALIZE: /* Initialize PL2303 serial device */ + break; /* There is no PL2303 serial initialization */ + + case BOARDIOC_USBDEV_CONNECT: /* Connect the CDC/ACM device */ + ret = usbdev_serialinitialize(ctrl->instance); + break; + + case BOARDIOC_USBDEV_DISCONNECT: /* There is no PL2303 serial disconnect */ + ret = -ENOSYS; + break; + + default: + ret = -EINVAL; + break; + } + break; +#endif + +#ifdef CONFIG_USBMSC + case BOARDIOC_USBDEV_MSC: /* Mass storage class */ + switch (ctrl->action) + { + case BOARDIOC_USBDEV_INITIALIZE: /* Initialize USB MSC device */ + { + ret = board_usbmsc_initialize(ctrl->instance); + } + break; + + case BOARDIOC_USBDEV_CONNECT: /* Connect the USB MSC device */ + { + DEBUGASSERT(ctrl->handle != NULL); +#warning Missing logic + ret = -ENOSYS; + } + break; + + case BOARDIOC_USBDEV_DISCONNECT: /* Disconnect the USB MSC device */ + { + DEBUGASSERT(ctrl->handle != NULL && *ctrl->handle != NULL); + usbmsc_uninitialize(*ctrl->handle); + } + break; + + default: + ret = -EINVAL; + break; + } + break; +#endif + +#ifdef CONFIG_USBDEV_COMPOSITE + case BOARDIOC_USBDEV_COMPOSITE: /* Composite device */ + switch (ctrl->action) + { + case BOARDIOC_USBDEV_INITIALIZE: /* Initialize Composite device */ + { + ret = board_composite_initialize(ctrl->instance); + } + break; + + case BOARDIOC_USBDEV_CONNECT: /* Connect the Composite device */ + { + DEBUGASSERT(ctrl->handle != NULL); + *ctrl->handle = composite_initialize(); + if (*ctrl->handle == NULL) + { + ret = -EIO; + } + } + break; + + case BOARDIOC_USBDEV_DISCONNECT: /* Disconnect the Composite device */ + { + DEBUGASSERT(ctrl->handle != NULL && *ctrl->handle != NULL); + composite_uninitialize(*ctrl->handle); + } + break; + + default: + ret = -EINVAL; + break; + } + break; +#endif + default: + ret = -EINVAL; + } + + return ret; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: boardctl + * + * Description: + * In a small embedded system, there will typically be a much greater + * interaction between application and low-level board features. The + * canonically correct to implement such interactions is by implementing a + * character driver and performing the interactions via low level ioctl + * calls. This, however, may not be practical in many cases and will lead + * to "correct" but awkward implementations. + * + * boardctl() is non-standard OS interface to alleviate the problem. It + * basically circumvents the normal device driver ioctl interlace and allows + * the application to perform direction IOCTL-like calls to the board-specific + * logic. In it is especially useful for setting up board operational and + * test configurations. + * + * Input Parameters: + * cmd - Identifies the board command to be executed + * arg - The argument that accompanies the command. The nature of the + * argument is determined by the specific command. + * + * Returned Value: + * On success zero (OK) is returned; -1 (ERROR) is returned on failure + * with the errno variable to to indicate the nature of the failure. + * + ****************************************************************************/ + +int boardctl(unsigned int cmd, uintptr_t arg) +{ + int ret; + + switch (cmd) + { + /* CMD: BOARDIOC_INIT + * DESCRIPTION: Perform one-time application initialization. + * ARG: None + * CONFIGURATION: CONFIG_LIB_BOARDCTL + * DEPENDENCIES: Board logic must provide board_app_initialization + */ + + case BOARDIOC_INIT: + { + ret = board_app_initialize(); + } + break; + +#ifdef CONFIG_BOARDCTL_POWEROFF + /* CMD: BOARDIOC_POWEROFF + * DESCRIPTION: Power off the board + * ARG: Integer value providing power off status information + * CONFIGURATION: CONFIG_BOARDCTL_POWEROFF + * DEPENDENCIES: Board logic must provide board_power_off + */ + + case BOARDIOC_POWEROFF: + { + ret = board_power_off((int)arg); + } + break; +#endif + +#ifdef CONFIG_BOARDCTL_RESET + /* CMD: BOARDIOC_RESET + * DESCRIPTION: Reset the board + * ARG: Integer value providing power off status information + * CONFIGURATION: CONFIG_BOARDCTL_RESET + * DEPENDENCIES: Board logic must provide board_reset + */ + + case BOARDIOC_RESET: + { + ret = board_reset((int)arg); + } + break; +#endif + +#ifdef CONFIG_BOARDCTL_UNIQUEID + /* CMD: BOARDIOC_UNIQUEID + * DESCRIPTION: Return a unique ID associated with the board (such + * as a serial number or a MAC address). + * ARG: A writable array of size CONFIG_BOARDCTL_UNIQUEID_SIZE + * in which to receive the board unique ID. + * DEPENDENCIES: Board logic must provide the board_uniqueid() + * interface. + */ + + case BOARDIOC_UNIQUEID: + { + ret = board_uniqueid((FAR uint8_t *)arg); + } + break; +#endif + +#ifdef CONFIG_BOARDCTL_APP_SYMTAB + /* CMD: BOARDIOC_APP_SYMTAB + * DESCRIPTION: Select the application symbol table. This symbol table + * provides the symbol definitions exported to application + * code from application space. + * ARG: A pointer to an instance of struct boardioc_symtab_s + * CONFIGURATION: CONFIG_BOARDCTL_APP_SYMTAB + * DEPENDENCIES: None + */ + + case BOARDIOC_APP_SYMTAB: + { + FAR const struct boardioc_symtab_s *symdesc = + (FAR const struct boardioc_symtab_s *)arg; + + DEBUGASSERT(symdesc != NULL); + exec_setsymtab(symdesc->symtab, symdesc->nsymbols); + ret = OK; + } + break; +#endif + +#ifdef CONFIG_BOARDCTL_OS_SYMTAB + /* CMD: BOARDIOC_OS_SYMTAB + * DESCRIPTION: Select the OS symbol table. This symbol table provides + * the symbol definitions exported by the OS to kernel + * modules. + * ARG: A pointer to an instance of struct boardioc_symtab_s + * CONFIGURATION: CONFIG_BOARDCTL_OS_SYMTAB + * DEPENDENCIES: None + */ + + case BOARDIOC_OS_SYMTAB: + { + FAR const struct boardioc_symtab_s *symdesc = + (FAR const struct boardioc_symtab_s *)arg; + + DEBUGASSERT(symdesc != NULL); + mod_setsymtab(symdesc->symtab, symdesc->nsymbols); + ret = OK; + } + break; +#endif + +#ifdef CONFIG_BOARDCTL_USBDEVCTRL + /* CMD: BOARDIOC_USBDEV_CONTROL + * DESCRIPTION: Manage USB device classes + * ARG: A pointer to an instance of struct boardioc_usbdev_ctrl_s + * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_USBDEVCTRL + * DEPENDENCIES: Board logic must provide board__initialize() + */ + + case BOARDIOC_USBDEV_CONTROL: + { + FAR struct boardioc_usbdev_ctrl_s *ctrl = + (FAR struct boardioc_usbdev_ctrl_s *)arg; + + DEBUGASSERT(ctrl != NULL); + ret = boardctl_usbdevctrl(ctrl); + } + break; +#endif + +#ifdef CONFIG_BOARDCTL_TSCTEST + /* CMD: BOARDIOC_TSCTEST_SETUP + * DESCRIPTION: Touchscreen controller test configuration + * ARG: Touch controller device minor number + * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_TSCTEST + * DEPENDENCIES: Board logic must provide board_tsc_setup() + */ + + case BOARDIOC_TSCTEST_SETUP: + { + ret = board_tsc_setup((int)arg); + } + break; + + /* CMD: BOARDIOC_TSCTEST_TEARDOWN + * DESCRIPTION: Touchscreen controller test configuration + * ARG: None + * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_TSCTEST + * DEPENDENCIES: Board logic must provide board_tsc_teardown() + */ + + case BOARDIOC_TSCTEST_TEARDOWN: + { + board_tsc_teardown(); + ret = OK; + } + break; +#endif + +#ifdef CONFIG_BOARDCTL_ADCTEST + /* CMD: BOARDIOC_ADCTEST_SETUP + * DESCRIPTION: ADC controller test configuration + * ARG: None + * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_ADCTEST + * DEPENDENCIES: Board logic must provide board_adc_setup() + */ + + case BOARDIOC_ADCTEST_SETUP: + { + ret = board_adc_setup(); + } + break; +#endif + +#ifdef CONFIG_BOARDCTL_PWMTEST + /* CMD: BOARDIOC_PWMTEST_SETUP + * DESCRIPTION: PWM controller test configuration + * ARG: None + * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_PWMTEST + * DEPENDENCIES: Board logic must provide board_pwm_setup() + */ + + case BOARDIOC_PWMTEST_SETUP: + { + ret = board_pwm_setup(); + } + break; +#endif + +#ifdef CONFIG_BOARDCTL_CANINIT + /* CMD: BOARDIOC_CAN_INITIALIZE + * DESCRIPTION: CAN device initialization + * ARG: None + * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_CANINIT + * DEPENDENCIES: Board logic must provide board_can_initialize() + */ + + case BOARDIOC_CAN_INITIALIZE: + { + ret = board_can_initialize(); + } + break; +#endif + +#ifdef CONFIG_BOARDCTL_GRAPHICS + /* CMD: BOARDIOC_GRAPHICS_SETUP + * DESCRIPTION: Configure graphics that require special initialization + * procedures + * ARG: A pointer to an instance of struct boardioc_graphics_s + * CONFIGURATION: CONFIG_LIB_BOARDCTL && CONFIG_BOARDCTL_GRAPHICS + * DEPENDENCIES: Board logic must provide board_adc_setup() + */ + + case BOARDIOC_GRAPHICS_SETUP: + { + FAR struct boardioc_graphics_s *setup = + ( FAR struct boardioc_graphics_s *)arg; + + setup->dev = board_graphics_setup(setup->devno); + ret = setup->dev ? OK : -ENODEV; + } + break; +#endif + + default: + { +#ifdef CONFIG_BOARDCTL_IOCTL + /* Boards may also select CONFIG_BOARDCTL_IOCTL=y to enable board- + * specific commands. In this case, all commands not recognized + * by boardctl() will be forwarded to the board-provided board_ioctl() + * function. + */ + + ret = board_ioctl(cmd, arg); +#else + ret = -ENOTTY; +#endif + } + break; + } + + /* Set the errno value on any errors */ + + if (ret < 0) + { + set_errno(-ret); + return ERROR; + } + + return OK; +} + +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/configs/c5471evm/Kconfig b/configs/c5471evm/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..c9532532f1ba6edec9a0e47ff27c1ce71b918b0e --- /dev/null +++ b/configs/c5471evm/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_C5471EVM +endif diff --git a/configs/c5471evm/README.txt b/configs/c5471evm/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..618b2ae1cec43e3e9e19d10f7c69d76c65d27e1e --- /dev/null +++ b/configs/c5471evm/README.txt @@ -0,0 +1,172 @@ +README +^^^^^^ + +Toolchain +^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the SH toolchain (if + different from the default). + + If you have no ARM toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + + 1. You must have already configured Nuttx in nuttx. + + cd tools + ./configure.sh c5471evm/ + + 2. Download the latest buildroot package into + + 3. unpack + + 4. cd /buildroot + + 5. cp configs/arm-defconfig .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h so that the PATH variable includes the path to the + newly built binaries. + +Issues +^^^^^^ + + Title: UART RECONFIGURATION + Description: UART re-configuration is untested and conditionally compiled out. + Status: Open + Priority: Medium. ttyS1 is not configured, but not used; ttyS0 is configured + by the bootloader + +ARM/C5471-specific Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_ARM7TDMI=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=c5471 + + CONFIG_ARCH_CHIP_name - For use in C code + + CONFIG_ARCH_CHIP_C5471 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=c5471evm (for the Spectrum Digital C5471 EVM) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_C5471EVM (for the Spectrum Digital C5471 EVM) + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_ROM_VECTORS - should be defined for the C5471 because the + interrupt vectors are in ROM + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + C5471 specific device driver settings + + CONFIG_SERIAL_IRDA_CONSOLE - selects the IRDA UART for the + console ant ttys0 (default is the modem UART). + CONFIG_UART_*_HWFLOWCONTROL - enables hardware flow control + CONFIG_UART_*_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UART_*_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UART_*_BAUD - The configure BAUD of the UART. Must be + CONFIG_UART_*_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UART_*_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UART_*_2STOP - Two stop bits + + C5471 Ethernet Driver settings + + CONFIG_C5471_NET_STATS + CONFIG_C5471_PHY_AC101L or C5471_PHY_LU3X31T_T64 + CONFIG_C5471_AUTONEGOTIATION + CONFIG_C5471_BASET100 + CONFIG_C5471_BASET10 + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. Each C5471 configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh c5471evm/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume the NuttX Buildroot toolchain + under Linux (should work under Windows with Cygwin as well). This + is easily reconfigured: + + CONFIG_HOST_LINUX=y + CONFIG_ARM_TOOLCHAIN_BUILDROOT=y + +Configuration Sub-Directories +----------------------------- + + nettest + + This configuration enables networking using the c5471's built-in Ethernet + interface. It uses examples/nettest to exercise the TCP/IP network. + + nsh + + This configuration file builds NSH (examples/nsh) using the TELNET server + front end + + httpd + + This configuration uses the tiny webserver for uIP. diff --git a/configs/c5471evm/doc/test-result.txt b/configs/c5471evm/doc/test-result.txt new file mode 100644 index 0000000000000000000000000000000000000000..a05a92e305c6f1e2ed5af0a689d35a0fd50f5e99 --- /dev/null +++ b/configs/c5471evm/doc/test-result.txt @@ -0,0 +1,164 @@ +This is the output from examples/ostest executed on this +platform on March 9, 2007 + +======================================================== + +Standard I/O Check: write fd=1 +Standard I/O Check: write fd=2 +user_start: Standard I/O Check: printf +user_start: Started user_main at PID=2 +user_start: Standard I/O Check: fprintf to stderr +user_main: Started with argc=5 +user_main: argv[0]="no name" +user_main: argv[1]="Arg1" +user_main: argv[2]="Arg2" +user_main: argv[3]="Arg3" +user_main: argv[4]="Arg4" +dev_null: Read 0 bytes from /dev/null +dev_null: Wrote 1024 bytes to /dev/null +Initializing mutex +Starting thread 1 +Starting thread 2 + Thread1 Thread2 + Loops 32 32 + Errors 0 0 +cancel_test: Test 1: Normal Cancelation +cancel_test: Starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +cancel_test: waiter exited with result=ffffffff +cancel_test: PASS thread terminated with PTHREAD_CANCELED +cancel_test: Test 2: Cancelation of detached thread +cancel_test: Re-starting thread +restart_thread: Destroying cond +restart_thread: Destroying mutex +restart_thread: Re-starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +cancel_test: PASS pthread_join failed with status=ESRCH +cancel_test: Test 3: Non-cancelable threads +cancel_test: Re-starting thread (non-cancelable) +restart_thread: Destroying cond +restart_thread: Destroying mutex +restart_thread: Re-starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +thread_waiter: Setting non-cancelable +start_thread: Yielding +cancel_test: Canceling thread +sem_test: Initializing semaphore to 0 +sem_test: Starting waiter thread 1 +sem_test: Set thread 1 priority to 191 +waiter_func: Thread 1 Started +waiter_func: Thread 1 initial semaphore value = 0 +waiter_func: Thread 1 aiting on semaphore +thread_waiter: Releasing mutex +thread_waiter: Setting cancelable +sem_test: Starting waiter thread 2 +sem_test: Set thread 2 priority to 128 +waiter_func: Thread 2 Started +waiter_func: Thread 2 initial semaphore value = 4294967295 +waiter_func: Thread 2 aiting on semaphore +sem_test: Starting poster thread 3 +sem_test: Set thread 3 priority to 64 +poster_func: Thread 3 started +poster_func: Thread 3 semaphore value = 4294967294 +poster_func: Thread 3 posting semaphore +waiter_func: Thread 1 awakened +waiter_func: Thread 1 new semaphore value = 4294967295 +waiter_func: Thread 1 done +poster_func: Thread 3 new semaphore value = 4294967295 +poster_func: Thread 3 semaphore value = 4294967295 +poster_func: Thread 3 posting semaphore +waiter_func: Thread 2 awakened +waiter_func: Thread 2 new semaphore value = 0 +waiter_func: Thread 2 done +poster_func: Thread 3 new semaphore value = 0 +poster_func: Thread 3 done +cond_test: Initializing mutex +cond_test: Initializing cond +cond_test: Starting waiter +cond_test: Set thread 1 priority to 128 +waiter_thread: Started +cond_test: Starting signaler +cond_test: Set thread 2 priority to 64 +thread_signaler: Started +thread_signaler: Terminating +cond_test: signaler terminated, now cancel the waiter +cond_test: Waiter Signaler +cond_test: Loops 32 32 +cond_test: Errors 0 0 +cond_test: +0 times, waiter did not have to wait for data +cond_test: 0 times, data was already available when the signaler run +cond_test: 0 times, the waiter was in an unexpected state when the signaler ran +thread_waiter: Initializing mutex +timedwait_test: Initializing cond +timedwait_test: Starting waiter +timedwait_test: Set thread 2 priority to 177 +thread_waiter: Taking mutex +thread_waiter: Starting 5 second wait for condition +timedwait_test: Joining +thread_waiter: pthread_cond_timedwait timed out +thread_waiter: Releasing mutex +thread_waiter: Exit with status 0x12345678 +timedwait_test: waiter exited with result=12345678 +mqueue_test: Starting receiver +mqueue_test: Set receiver priority to 128 +receiver_thread: Starting +mqueue_test: Starting sender +mqueue_test: Set sender thread priority to 64 +sender_thread: Starting +receiver_thread: mq_receive succeeded on msg 0 +sender_thread: mq_send succeeded on msg 0 +receiver_thread: mq_receive succeeded on msg 1 +sender_thread: mq_send succeeded on msg 1 +receiver_thread: mq_receive succeeded on msg 2 +sender_thread: mq_send succeeded on msg 2 +receiver_thread: mq_receive succeeded on msg 3 +sender_thread: mq_send succeeded on msg 3 +receiver_thread: mq_receive succeeded on msg 4 +sender_thread: mq_send succeeded on msg 4 +receiver_thread: mq_receive succeeded on msg 5 +sender_thread: mq_send succeeded on msg 5 +receiver_thread: mq_receive succeeded on msg 6 +sender_thread: mq_send succeeded on msg 6 +receiver_thread: mq_receive suscceeded on msg 7 +ender_thread: mq_send succeeded on msg 7 +receiver_thread: mq_receive succeeded on msg 8 +sender_thread: mq_send succeeded on msg 8 +receiver_thread: mq_receive succeeded on msg 9 +sender_thread: mq_send succeeded on msg 9 +sender_thread: returning nerrors=0 +waiter_main: Initializing semaphore to 0 +sighand_test: Starting waiter task +sighand_test: Started waiter_main pid=16 +wakeup_action: Waiter started +waiter_main: Unmasking signal 17 +waiter_main: Registering signal handler +waiter_main: oact.sigaction=0 oact.sa_flags=0 oact.sa_mask=0 +waiter_main: Waiting on semaphore +sighand_test: Signaling pid=16 with signo=17 sigvalue=42 +wakeup_action: Received signal 17 +wakeup_action: sival_int=42 +wakeup_action: si_code=0 +wakeup_action: ucontext=0 +waiter_main: sem_wait() successfully interrupted by signal +waiter_main: done +sighand_test: done +user_main: Exitting diff --git a/configs/c5471evm/httpd/Make.defs b/configs/c5471evm/httpd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..9f465df52ca0c4fd8fb0bde972a07fb91639b7cd --- /dev/null +++ b/configs/c5471evm/httpd/Make.defs @@ -0,0 +1,125 @@ +############################################################################ +# configs/c5471evm/httpd/Make.defs +# +# Copyright (C) 2007, 2008, 2011, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(ARCHCCMAJOR),4) +ifneq ($(HOSTOS),Cygwin) + OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment +endif +endif + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/c5471evm/httpd/defconfig b/configs/c5471evm/httpd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c3635191e01068e401b6c1bc9c1734f8ba2d10db --- /dev/null +++ b/configs/c5471evm/httpd/defconfig @@ -0,0 +1,836 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +CONFIG_RRLOAD_BINARY=y +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +CONFIG_ARCH_CHIP_C5471=y +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="c5471" +# CONFIG_ARCH_HAVE_FPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +CONFIG_ARM_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARM_OABI_TOOLCHAIN is not set + +# +# C5471 Configuration Options +# + +# +# IrDA UART Configuration +# +CONFIG_UART_IRDA_BAUD=115200 +CONFIG_UART_IRDA_PARITY=0 +CONFIG_UART_IRDA_BITS=8 +CONFIG_UART_IRDA_2STOP=0 +CONFIG_UART_IRDA_RXBUFSIZE=256 +CONFIG_UART_IRDA_TXBUFSIZE=256 + +# +# Modem UART Configuration +# +CONFIG_UART_MODEM_BAUD=115200 +CONFIG_UART_MODEM_PARITY=0 +CONFIG_UART_MODEM_BITS=8 +CONFIG_UART_MODEM_2STOP=0 +CONFIG_UART_MODEM_RXBUFSIZE=256 +CONFIG_UART_MODEM_TXBUFSIZE=256 +# CONFIG_C5471_PHY_NONE is not set +# CONFIG_C5471_PHY_AC101L is not set +CONFIG_C5471_PHY_LU3X31T_T64=y +CONFIG_C5471_AUTONEGOTIATION=y +# CONFIG_C5471_BASET100 is not set +# CONFIG_C5471_BASET10 is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0 +CONFIG_RAM_SIZE=285212672 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_C5471EVM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="c5471evm" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=13 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="webserver_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_NETDEVICES is not set +# CONFIG_NET_SLIP is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_ARCH_HAVE_OTHER_UART=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_OTHER_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_IPv4=y +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +CONFIG_EXAMPLES_WEBSERVER=y +CONFIG_EXAMPLES_WEBSERVER_IPADDR=0x0a000002 +CONFIG_EXAMPLES_WEBSERVER_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_WEBSERVER_NETMASK=0xffffff00 +CONFIG_EXAMPLES_WEBSERVER_NOMAC=y +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +CONFIG_NETUTILS_WEBSERVER=y +# CONFIG_NETUTILS_HTTPD_SINGLECONNECT is not set +# CONFIG_NETUTILS_HTTPD_SCRIPT_DISABLE is not set +CONFIG_NETUTILS_HTTPD_MAXPATH=64 +# CONFIG_NETUTILS_HTTPD_CGIPATH is not set +CONFIG_NETUTILS_HTTPD_ERRPATH="" +# CONFIG_NETUTILS_HTTPD_SERVERHEADER_DISABLE is not set +CONFIG_NETUTILS_HTTPD_TIMEOUT=0 +CONFIG_NETUTILS_HTTPD_CLASSIC=y +# CONFIG_NETUTILS_HTTPD_MMAP is not set +# CONFIG_NETUTILS_HTTPD_SENDFILE is not set +CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# CU Minimal Terminal +# +# CONFIG_SYSTEM_CUTERM is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/c5471evm/httpd/setenv.sh b/configs/c5471evm/httpd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..aef64269b770cee87f403d34f69a580c26c3e846 --- /dev/null +++ b/configs/c5471evm/httpd/setenv.sh @@ -0,0 +1,73 @@ +#!/bin/bash +############################################################################## +# c5471evm/httpd/setenv.sh +# +# Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/c5471evm/include/board.h b/configs/c5471evm/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..98eacabb1599ad961468519409af81218018c8c1 --- /dev/null +++ b/configs/c5471evm/include/board.h @@ -0,0 +1,66 @@ +/**************************************************************************** + * arch/board.h + * + * Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_BOARD_H +#define __ARCH_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *************************************************************/ + +#define C5471_CLOCK 47500000 /* 47.5 MHz */ + +/* LED definitions ******************************************************/ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +#endif /* __ARCH_BOARD_H */ diff --git a/configs/c5471evm/nettest/Make.defs b/configs/c5471evm/nettest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..909f21b08309edf54cb33c3c53e43bcf602f2731 --- /dev/null +++ b/configs/c5471evm/nettest/Make.defs @@ -0,0 +1,125 @@ +############################################################################ +# configs/c5471evm/nettest/Make.defs +# +# Copyright (C) 2007, 2008, 2011, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(ARCHCCMAJOR),4) +ifneq ($(HOSTOS),Cygwin) + OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment +endif +endif + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/c5471evm/nettest/defconfig b/configs/c5471evm/nettest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..995175141551a029c4f51420d842a9262edfa67e --- /dev/null +++ b/configs/c5471evm/nettest/defconfig @@ -0,0 +1,746 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +CONFIG_RRLOAD_BINARY=y +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +CONFIG_ARCH_CHIP_C5471=y +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="c5471" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +CONFIG_ARM_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARM_OABI_TOOLCHAIN is not set + +# +# C5471 Configuration Options +# + +# +# IrDA UART Configuration +# +CONFIG_UART_IRDA_BAUD=115200 +CONFIG_UART_IRDA_PARITY=0 +CONFIG_UART_IRDA_BITS=8 +CONFIG_UART_IRDA_2STOP=0 +CONFIG_UART_IRDA_RXBUFSIZE=256 +CONFIG_UART_IRDA_TXBUFSIZE=256 + +# +# Modem UART Configuration +# +CONFIG_UART_MODEM_BAUD=115200 +CONFIG_UART_MODEM_PARITY=0 +CONFIG_UART_MODEM_BITS=8 +CONFIG_UART_MODEM_2STOP=0 +CONFIG_UART_MODEM_RXBUFSIZE=256 +CONFIG_UART_MODEM_TXBUFSIZE=256 +# CONFIG_C5471_PHY_NONE is not set +# CONFIG_C5471_PHY_AC101L is not set +CONFIG_C5471_PHY_LU3X31T_T64=y +CONFIG_C5471_AUTONEGOTIATION=y +# CONFIG_C5471_BASET100 is not set +# CONFIG_C5471_BASET10 is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0 +CONFIG_RAM_SIZE=285212672 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_C5471EVM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="c5471evm" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=13 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nettest_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_NETDEVICES is not set +# CONFIG_NET_SLIP is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_ARCH_HAVE_OTHER_UART=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_OTHER_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_NETTEST=y +# CONFIG_EXAMPLES_NETTEST_SERVER is not set +# CONFIG_EXAMPLES_NETTEST_PERFORMANCE is not set +CONFIG_EXAMPLES_NETTEST_IPv4=y +CONFIG_EXAMPLES_NETTEST_INIT=y +CONFIG_EXAMPLES_NETTEST_NOMAC=y + +# +# IPv4 addresses +# +CONFIG_EXAMPLES_NETTEST_IPADDR=0x0a000002 +CONFIG_EXAMPLES_NETTEST_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_NETTEST_NETMASK=0xffffff00 +CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/c5471evm/nettest/setenv.sh b/configs/c5471evm/nettest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ed696a72e8a4bcfa09f01a2657fc38032f56d66a --- /dev/null +++ b/configs/c5471evm/nettest/setenv.sh @@ -0,0 +1,73 @@ +#!/bin/bash +############################################################################## +# c5471evm/nettest/setenv.sh +# +# Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/c5471evm/nsh/Make.defs b/configs/c5471evm/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..41fa4b2f25a6652100cdea4b890bdbc4b11720ed --- /dev/null +++ b/configs/c5471evm/nsh/Make.defs @@ -0,0 +1,125 @@ +############################################################################ +# configs/c5471evm/nsh/Make.defs +# +# Copyright (C) 2007, 2008, 2011, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(ARCHCCMAJOR),4) +ifneq ($(HOSTOS),Cygwin) + OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment +endif +endif + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/c5471evm/nsh/defconfig b/configs/c5471evm/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..e36be6f8ff7449c6f525b75d8969d463b9371444 --- /dev/null +++ b/configs/c5471evm/nsh/defconfig @@ -0,0 +1,897 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +CONFIG_RRLOAD_BINARY=y +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +CONFIG_ARCH_CHIP_C5471=y +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="c5471" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +CONFIG_ARM_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARM_OABI_TOOLCHAIN is not set + +# +# C5471 Configuration Options +# + +# +# IrDA UART Configuration +# +CONFIG_UART_IRDA_BAUD=115200 +CONFIG_UART_IRDA_PARITY=0 +CONFIG_UART_IRDA_BITS=8 +CONFIG_UART_IRDA_2STOP=0 +CONFIG_UART_IRDA_RXBUFSIZE=256 +CONFIG_UART_IRDA_TXBUFSIZE=256 + +# +# Modem UART Configuration +# +CONFIG_UART_MODEM_BAUD=115200 +CONFIG_UART_MODEM_PARITY=0 +CONFIG_UART_MODEM_BITS=8 +CONFIG_UART_MODEM_2STOP=0 +CONFIG_UART_MODEM_RXBUFSIZE=256 +CONFIG_UART_MODEM_TXBUFSIZE=256 +# CONFIG_C5471_PHY_NONE is not set +# CONFIG_C5471_PHY_AC101L is not set +CONFIG_C5471_PHY_LU3X31T_T64=y +CONFIG_C5471_AUTONEGOTIATION=y +# CONFIG_C5471_BASET100 is not set +# CONFIG_C5471_BASET10 is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0 +CONFIG_RAM_SIZE=285212672 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_C5471EVM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="c5471evm" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=13 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_NETDEVICES is not set +CONFIG_NETDEV_TELNET=y +# CONFIG_NET_SLIP is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_ARCH_HAVE_OTHER_UART=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_OTHER_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +# CONFIG_NSH_CONSOLE is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/c5471evm/nsh/setenv.sh b/configs/c5471evm/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ccf5d8fa3364a468d83800b9f68f7a3c34327005 --- /dev/null +++ b/configs/c5471evm/nsh/setenv.sh @@ -0,0 +1,73 @@ +#!/bin/bash +############################################################################## +# c5471evm/nsh/setenv.sh +# +# Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/c5471evm/scripts/ld.script b/configs/c5471evm/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..b2beda678c29d5ed070ccfde0e6fade796219111 --- /dev/null +++ b/configs/c5471evm/scripts/ld.script @@ -0,0 +1,107 @@ +/************************************************************ + * configs/c5471evm/scripts/ld.script + * + * Copyright (C) 2007, 2011-2012, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************/ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + /* Interrupt vector trampoline and command line parameters + * are provided in IRAM by the rrload bootloader. Vectors will be + * copied into _svectors. + */ + + . = 0xffc00000; + _svectors = ABSOLUTE(.); + + /* These are locations in IRAM where the rrload bootloader passes + * information to the running program + */ + + . = 0xffc00020; + __KernCommandLineMagicStr = .; /* magic pattern string == "kcmdline-->" */ + . = 0xffc0002C; /* advance to .+strlen("kcmdline-->")+1 */ + __KernCommandLineOverride = .; /* location of kernel command line string */ + + . = 0xffc00100; + __EtherMACMagicStr = .; /* magic pattern string == "etherMAC-->" */ + . = 0xffc0010C; /* advance to .+strlen("etherMAC-->")+1 */ + __EtherMAC = .; + + + /* The OS entry point is here */ + + . = 0x10300000; + .text : { + _stext = ABSOLUTE(.); + *(.text) + *(.fixup) + *(.gnu.warning) + *(.rodata) + *(.glue_7) + *(.glue_7t) + *(.got) /* Global offset table */ + _etext = ABSOLUTE(.); + } + + _eronly = ABSOLUTE(.); /* See below */ + . = ALIGN(4096); + + .data : { + _sdata = ABSOLUTE(.); + *(.data) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss) + *(COMMON) + _ebss = ABSOLUTE(.); + } + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/c5471evm/src/.gitignore b/configs/c5471evm/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/c5471evm/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/c5471evm/src/Makefile b/configs/c5471evm/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..e43f8cf04e30aa84a254612e9d3d26400b362bfc --- /dev/null +++ b/configs/c5471evm/src/Makefile @@ -0,0 +1,41 @@ +############################################################################ +# configs/c5471evm/src/Makefile +# +# Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = c5471_leds.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/c5471evm/src/c5471_leds.c b/configs/c5471evm/src/c5471_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..78e62446b17983e2ef913e52f90e4f42c187978a --- /dev/null +++ b/configs/c5471evm/src/c5471_leds.c @@ -0,0 +1,111 @@ +/**************************************************************************** + * configs/c5471evm/src/c5471_leds.c + * + * Copyright (C) 2007-2009, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define CS2 *(volatile uint32_t*)0xffff2e08 +#define LEDS *(volatile uint32_t*)0x01000000 + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static uint32_t g_ledstate; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Funtions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + /* Enable access to LEDs */ + + CS2 = 0x000013db; + + /* Turn LED 1-7 off; turn LED 0 on */ + + g_ledstate = 0x000000fe; + LEDS = g_ledstate; +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led < 8) + { + g_ledstate &= ~(1 << led); + LEDS = g_ledstate; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led < 8) + { + g_ledstate |= (1 << led); + LEDS = g_ledstate; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/cc3200-launchpad/Kconfig b/configs/cc3200-launchpad/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..dd58cd411788388b44042ca11ed1c3418901be5b --- /dev/null +++ b/configs/cc3200-launchpad/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_CC3200_LAUNCHPAD +endif diff --git a/configs/cc3200-launchpad/README.txt b/configs/cc3200-launchpad/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..02d928f9da8fe8bca407ff2c543755e648ac2cbc --- /dev/null +++ b/configs/cc3200-launchpad/README.txt @@ -0,0 +1,123 @@ +README +====== + + This is the README file for the port of NuttX to the TI CC3200 Launchpad. + +OpenOCD for Windows +=================== + + Get the CC3200 SDK + ------------------ + Get this from the TI web site. Also get "CC3200 SimpleLinkâ„¢ Wi-Fi® and + IoT Solution With MCU LaunchPadâ„¢ Getting Started Guide" (SWRU376A) + + Get OpenOCD + ------------ + The OpenOCD project is here: http://openocd.sourceforge.net/ + + I use the pre-built binaries provided by Freddie Chopin that can b + downloaded here: http://www.freddiechopin.info/ + + I used version 0.8.0 which available here: + http://www.freddiechopin.info/en/articles/34-news/92-openocd-w-wersji-080 + + Other versions are available here: + http://www.freddiechopin.info/en/download/category/4-openocd + + Get Zadig + --------- + Unless you are very clever with Windows drivers, then I also recommend + that you download and install Zadig: http://zadig.akeo.ie/ + + Other Stuff + ----------- + USB Cable, your favorite serial terminal program, NuttX build with + one of the CC3200 configurations in this diretory. + + Installing + ---------- + Install the TI CC3200 SDK and OpenOCD. Zadig is just an binary so there + is no installation. Plug in the CC3200 via the USB cable. You should see + two new devices in the Windows Device Manager, both called: + + USB <-> JTAG/SWD + + There will be indications on the driver icon that no driver is installed. + + Follow the instructions in the paragraph "Install USB Driver" to install + the TI USB drivers. You need to do this twice, once for each device. Now + you will have two devices with different names: + + CC3200CP JTAG Port A, and + CC3200CP UART Port B + + OpenOCD cannot use the TI JTAG drivers. So we need to replace that port + (ONLY) with the libusb driver. Use Zadig to install the libusb driver + replacing the TI driver for "CC3200CP JTAG Port A". Now you should have + the following under "Ports (COM & LPT)": + + CC3200 UART Port B + + And under "Universal Serial Bus Devices", again: + + USB <-> JTAG/SWD + + But this time without the indication that a driver is needed. + + Starting OpenOCD + ---------------- + These instructions assume that (1) you are using a terminal with a Bash + shell under Cygwin, (2) that you installed OpenOCD at C:\openocd-0.8.0, + and (3) you are using a 64-bit windows version. You will need to make + minor changes if any of these are not true. + + The script to use with OpenOCD 0.8.0 is provided in + nuttx/configs/cc3200-launchpad/tools. Go there and start OpenOCd as + follow: + + $ cd configs/cc3200-launchpad/tools + $ /cygdrive/c/openocd-0.8.0/bin-x64/openocd-x64-0.8.0.exe --file cc3200.cfg + + And you should see something like: + + Open On-Chip Debugger 0.8.0 (2014-04-28-08:42) + Licensed under GNU GPL v2 + For bug reports, read + http://openocd.sourceforge.net/doc/doxygen/bugs.html + Info : only one transport option; autoselect 'jtag' + adapter speed: 1000 kHz + Info : clock speed 1000 kHz + Info : JTAG tap: cc3200.jrc tap/device found: 0x0b97c02f (mfg: 0x017, part: 0xb97c, ver: 0x0) + Info : JTAG tap: cc3200.dap enabled + Info : cc3200.cpu: hardware has 6 breakpoints, 4 watchpoints + + Open the Serial Terminal + ------------------------ + Connect the CC3200 board via the USB cabale. Open the serial terminal + program using the libusb COM device. For me this is usually COM6 but + could be anything. If you are unsure, remove the CC3200 and see which + one goes away. + + The serial interface should be configured 115200 8N1. + + Using GDB + --------- + Start GDB and connect to OpenOCD: + + $ arm-none-eabi-gdb + (gdb) target remote localhost:3333 + + Load and start the NuttX ELF file (nuttx): + + (gdb) mon reset halt + (gdb) load nuttx + (gdb) cont + (gdb) + + After entering cont(inue), you should see the NSH prompt in the serial + terminal window: + + C3200 init + + NuttShell (NSH) + nsh> diff --git a/configs/cc3200-launchpad/include/board.h b/configs/cc3200-launchpad/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..b55819d0b28fbdad221fbf60e595f1914c1d0ffb --- /dev/null +++ b/configs/cc3200-launchpad/include/board.h @@ -0,0 +1,251 @@ +/************************************************************************************ + * configs/cc3200/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Jim Ewing + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_CC3200_LAUNCHPAD_INCLUDE_BOARD_H +#define __CONFIGS_CC3200_LAUNCHPAD_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* RCC settings. Crystal on-board the CC3200 LaunchPad include: + * + * 40MHz internal clock + * 32.768kHz RTC clock + */ + +#define SYSCON_RCC_XTAL SYSCON_RCC_XTAL40000KHZ /* On-board crystal is 40 MHz */ +#define XTAL_FREQUENCY 40000000 + +/* Oscillator source is the main oscillator */ + +#define SYSCON_RCC_OSCSRC SYSCON_RCC_OSCSRC_MOSC +#define SYSCON_RCC2_OSCSRC SYSCON_RCC2_OSCSRC2_MOSC +#define OSCSRC_FREQUENCY XTAL_FREQUENCY + +#define TIVA_SYSDIV 5 +#define SYSCLK_FREQUENCY 80000000 /* 80MHz */ + +/* Other RCC settings: + * + * - Main and internal oscillators enabled. + * - PLL and sys dividers not bypassed + * - PLL not powered down + * - No auto-clock gating reset + */ + +#define TIVA_RCC_VALUE (SYSCON_RCC_OSCSRC | SYSCON_RCC_XTAL | \ + SYSCON_RCC_USESYSDIV | SYSCON_RCC_SYSDIV(TIVA_SYSDIV)) + +/* RCC2 settings + * + * - PLL and sys dividers not bypassed. + * - PLL not powered down + * - Not using RCC2 + * + * When SYSCON_RCC2_DIV400 is not selected, SYSDIV2 is the divisor-1. + * When SYSCON_RCC2_DIV400 is selected, SYSDIV2 is the divisor-1)/2, plus + * the LSB: + * + * SYSDIV2 SYSDIV2LSB DIVISOR + * 0 N/A 2 + * 1 0 3 + * " 1 4 + * 2 0 5 + * " 1 6 + * etc. + */ + +#if (TIVA_SYSDIV & 1) == 0 +# define TIVA_RCC2_VALUE (SYSCON_RCC2_OSCSRC | SYSCON_RCC2_SYSDIV2LSB | \ + SYSCON_RCC2_SYSDIV_DIV400(TIVA_SYSDIV) | \ + SYSCON_RCC2_DIV400 | SYSCON_RCC2_USERCC2) +#else +# define TIVA_RCC2_VALUE (SYSCON_RCC2_OSCSRC | SYSCON_RCC2_SYSDIV_DIV400(TIVA_SYSDIV) | \ + SYSCON_RCC2_DIV400 | SYSCON_RCC2_USERCC2) +#endif + +/* LED definitions ******************************************************************/ +/* The CC3200 LaunchPad has three RGB LEDs. + * + * BOARD_LED_R -- Connected to PF1 + * BOARD_LED_G -- Connected to PF3 + * BOARD_LED_Y -- Connected to PF2 + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED_R 1 +#define BOARD_LED_G 2 +#define BOARD_LED_Y 3 +#define BOARD_NLEDS 3 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) + +/* If CONFIG_ARCH_LEDS is defined, then automated support for the LaunchPad LEDs + * will be included in the build: + * + * OFF: + * - OFF means that the OS is still initializing. Initialization is very fast so + * if you see this at all, it probably means that the system is hanging up + * somewhere in the initialization phases. + * + * GREEN + * - This means that the OS completed initialization. + * + * BLUE: + * - Whenever and interrupt or signal handler is entered, the BLUE LED is + * illuminated and extinguished when the interrupt or signal handler exits. + * + * RED: + * - If a recovered assertion occurs, the RED LED will be illuminated + * briefly while the assertion is handled. You will probably never see this. + * + * Flashing RED: + * - In the event of a fatal crash, + * extinguished and the RED component will FLASH at a 2Hz rate. + */ + /* RED GREEN BLUE */ +#define LED_STARTED 0 /* OFF OFF OFF */ +#define LED_HEAPALLOCATE 0 /* OFF OFF OFF */ +#define LED_IRQSENABLED 0 /* OFF OFF OFF */ +#define LED_STACKCREATED 1 /* OFF ON OFF */ +#define LED_INIRQ 2 /* NC NC ON (momentary) */ +#define LED_SIGNAL 2 /* NC NC ON (momentary) */ +#define LED_ASSERTION 3 /* ON NC NC (momentary) */ +#define LED_PANIC 4 /* ON OFF OFF (flashing 2Hz) */ + +/* LED definitions ******************************************************************/ +/* The CC3200 LaunchPad has two buttons: + * + * BOARD_SW1 -- Connected to PF4 + * BOARD_SW2 -- Connected to PF0 + */ + +#define BUTTON_SW1 0 +#define BUTTON_SW2 1 +#define BUTTON_SW3 2 +#define NUM_BUTTONS 3 + +#define BUTTON_SW1_BIT (1 << BUTTON_SW1) +#define BUTTON_SW2_BIT (1 << BUTTON_SW2) +#define BUTTON_SW3_BIT (1 << BUTTON_SW3) + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Tiva architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void); + +/************************************************************************************ + * Name: up_buttoninit + * + * Description: + * up_buttoninit() must be called to initialize button resources. After that, + * up_buttons() may be called to collect the current state of all buttons or + * up_irqbutton() may be called to register button interrupt handlers. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_BUTTONS +void up_buttoninit(void); + +/************************************************************************************ + * Name: up_buttons + * + * Description: + * up_buttoninit() must be called to initialize button resources. After that, + * up_buttons() may be called to collect the current state of all buttons. + * + * After up_buttoninit() has been called, up_buttons() may be called to collect + * the state of all buttons. up_buttons() returns an 8-bit bit set with each bit + * associated with a button. See the BOARD_BUTTON_*_BIT and BOARD_JOYSTICK_*_BIT + * definitions above for the meaning of each bit. + * + ************************************************************************************/ + +uint8_t up_buttons(void); + +/************************************************************************************ + * Button support. + * + * Description: + * up_buttoninit() must be called to initialize button resources. After that, + * up_irqbutton() may be called to register button interrupt handlers. + * + * up_irqbutton() may be called to register an interrupt handler that will be called + * when a button is depressed or released. The ID value is a button enumeration + * value that uniquely identifies a button resource. See the BOARD_BUTTON_* and + * BOARD_JOYSTICK_* definitions in above for the meaning of enumeration values + * The previous interrupt handler address is returned (so that it may restored, if + * so desired). + * + * Note that up_irqbutton() also enables button interrupts. Button interrupts + * will remain enabled after the interrupt handler is attached. Interrupts may + * be disabled (and detached) by calling up_irqbutton with irqhandler equal to + * NULL. + * + ************************************************************************************/ + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +xcpt_t up_irqbutton(int id, xcpt_t irqhandler); +#endif +#endif /* CONFIG_ARCH_BUTTONS */ + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_CC3200_LAUNCHPAD_INCLUDE_BOARD_H */ diff --git a/configs/cc3200-launchpad/include/cc3200_utils.h b/configs/cc3200-launchpad/include/cc3200_utils.h new file mode 100644 index 0000000000000000000000000000000000000000..746f806fac57ceaa96dac52bc12b300d47033a03 --- /dev/null +++ b/configs/cc3200-launchpad/include/cc3200_utils.h @@ -0,0 +1,139 @@ +/************************************************************************************ + * configs/cc3200/include/cc3200_util.h + * + * Copyright (C) 2014 Droidifi LLC. All rights reserved. + * Author: Jim Ewing + * + * Adapted from code Copyright (C) 2014 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_CC3200_INCLUDE_UTILS_H +#define __CONFIGS_CC3200_INCLUDE_UTILS_H 1 + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define CONSOLE_BAUD_RATE 115200 + +#define PAD_CONFIG_BASE 0x4402E0A0 + +#define PIN_TYPE_STD 0x00000000 +#define PIN_STRENGTH_2MA 0x00000020 +#define PAD_MODE_MASK 0x0000000F +#define PAD_STRENGTH_MASK 0x000000E0 +#define PAD_TYPE_MASK 0x00000310 + +#define PIN_MODE_0 0x00000000 +#define PIN_MODE_1 0x00000001 +#define PIN_MODE_2 0x00000002 +#define PIN_MODE_3 0x00000003 +#define PIN_MODE_4 0x00000004 +#define PIN_MODE_5 0x00000005 +#define PIN_MODE_6 0x00000006 +#define PIN_MODE_7 0x00000007 +#define PIN_MODE_8 0x00000008 +#define PIN_MODE_9 0x00000009 +#define PIN_MODE_10 0x0000000A +#define PIN_MODE_11 0x0000000B +#define PIN_MODE_12 0x0000000C +#define PIN_MODE_13 0x0000000D +#define PIN_MODE_14 0x0000000E +#define PIN_MODE_15 0x0000000F + +#define PIN_STRENGTH_2MA 0x00000020 +#define PIN_STRENGTH_4MA 0x00000040 +#define PIN_STRENGTH_6MA 0x00000060 + +#define PIN_TYPE_STD 0x00000000 +#define PIN_TYPE_STD_PU 0x00000100 +#define PIN_TYPE_STD_PD 0x00000200 + +#define PIN_TYPE_OD 0x00000010 +#define PIN_TYPE_OD_PU 0x00000110 +#define PIN_TYPE_OD_PD 0x00000210 +#define PIN_TYPE_ANALOG 0x10000000 + +#define PIN_01 0x00000000 +#define PIN_02 0x00000001 +#define PIN_03 0x00000002 +#define PIN_04 0x00000003 +#define PIN_05 0x00000004 +#define PIN_06 0x00000005 +#define PIN_07 0x00000006 +#define PIN_08 0x00000007 +#define PIN_11 0x0000000A +#define PIN_12 0x0000000B +#define PIN_13 0x0000000C +#define PIN_14 0x0000000D +#define PIN_15 0x0000000E +#define PIN_16 0x0000000F +#define PIN_17 0x00000010 +#define PIN_18 0x00000011 +#define PIN_19 0x00000012 +#define PIN_20 0x00000013 +#define PIN_21 0x00000014 +#define PIN_45 0x0000002C +#define PIN_46 0x0000002D +#define PIN_47 0x0000002E +#define PIN_48 0x0000002F +#define PIN_49 0x00000030 +#define PIN_50 0x00000031 +#define PIN_52 0x00000033 +#define PIN_53 0x00000034 +#define PIN_55 0x00000036 +#define PIN_56 0x00000037 +#define PIN_57 0x00000038 +#define PIN_58 0x00000039 +#define PIN_59 0x0000003A +#define PIN_60 0x0000003B +#define PIN_61 0x0000003C +#define PIN_62 0x0000003D +#define PIN_63 0x0000003E +#define PIN_64 0x0000003F + +#define GPIO_O_GPIO_DATA 0x00000000 +#define GPIO_O_GPIO_DIR 0x00000400 + +#define GPIO_DIR_MODE_OUT 0x00000001 +#define GPIO_DIR_MODE_IN 0x00000000 + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +void cc3200_print(char* str); +void cc3200_pin_config_set(uint32_t pin, uint32_t pin_strength, uint32_t pin_type); +void cc3200_pin_mode_set(uint32_t pin, uint32_t pin_mode); +void cc3200_pin_type_uart(uint32_t pin, uint32_t pin_mode); +void cc3200_get_gpio_port_pin(uint8_t pin, uint32_t *gpio_port, uint8_t *gpio_pin); +void cc3200_set_gpio(uint8_t pin, uint32_t gpio_port, uint8_t gpio_pin, uint8_t gpio_val); +void cc3200_set_gpio_dir(uint32_t port, uint8_t pins, uint32_t pin_io); +void cc3200_pin_type_gpio(uint32_t pin, uint32_t pin_mode, uint32_t open_drain); + +#endif /* __CONFIGS_CC3200_INCLUDE_UTILS_H */ diff --git a/configs/cc3200-launchpad/nsh/Make.defs b/configs/cc3200-launchpad/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..cfd7bd2380187b6b79fc7613d814ef24478a1957 --- /dev/null +++ b/configs/cc3200-launchpad/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/cc3200-launchpad/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/cc3200-launchpad/nsh/defconfig b/configs/cc3200-launchpad/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..0ab668e23dc073dd9dc797a987acdbd0f7dcf79a --- /dev/null +++ b/configs/cc3200-launchpad/nsh/defconfig @@ -0,0 +1,836 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +CONFIG_EXPERIMENTAL=y +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +CONFIG_ARCH_CHIP_TIVA=y +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_FPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_TM4C123GH6ZRB is not set +# CONFIG_ARCH_CHIP_TM4C123GH6PMI is not set +CONFIG_ARCH_CHIP_CC3200=y +CONFIG_TIVA_BOARD_EARLYINIT=y + +# +# Tiva/Stellaris Peripheral Support +# +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_SSI0 is not set +# CONFIG_TIVA_SSI1 is not set +# CONFIG_TIVA_ETHERNET is not set +# CONFIG_TIVA_FLASH is not set + +# +# Disable GPIO Interrupts +# +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +# CONFIG_TIVA_GPIOF_IRQS is not set +# CONFIG_TIVA_GPIOG_IRQS is not set +# CONFIG_TIVA_GPIOH_IRQS is not set +# CONFIG_TIVA_GPIOJ_IRQS is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +CONFIG_ARCH_IRQPRIO=y +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20004000 +CONFIG_RAM_SIZE=192000 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_CC3200_LAUNCHPAD=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="cc3200-launchpad" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=8 +CONFIG_START_DAY=24 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=2 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=100 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=128 +CONFIG_UART0_TXBUFSIZE=128 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_BINFS=y +CONFIG_FS_PROCFS=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +CONFIG_NXFLAT=y +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +CONFIG_PIC=y +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=128 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=512 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_TMPDIR="/tmp" +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/cc3200-launchpad/nsh/setenv.sh b/configs/cc3200-launchpad/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3a1e376dccfc7d4e5b12b8685c5ad64553aef506 --- /dev/null +++ b/configs/cc3200-launchpad/nsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/cc3200-launchpad/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The cc3200-launchpad/tools directory +export TOOL_DIR="${WD}/configs/cc3200-launchpad/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/cc3200-launchpad/scripts/ld.script b/configs/cc3200-launchpad/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..292597615ccd758cf302fc9859fcab126ffbdbe1 --- /dev/null +++ b/configs/cc3200-launchpad/scripts/ld.script @@ -0,0 +1,112 @@ +/**************************************************************************** + * configs/cc3200-launchpad/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Jim Ewing + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +MEMORY +{ + flash (rx) : ORIGIN = 0x01000000, LENGTH = 0x00020000 + sram (rwx) : ORIGIN = 0x20004000, LENGTH = 0x0002C000 +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > sram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > sram + + .ARM.extab : { + *(.ARM.extab*) + } > sram + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > sram + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/cc3200-launchpad/src/Makefile b/configs/cc3200-launchpad/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..6e07a432b92a8c7e3186c95be60033e41cab3046 --- /dev/null +++ b/configs/cc3200-launchpad/src/Makefile @@ -0,0 +1,46 @@ +############################################################################ +# configs/cc3200-launchpad/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Authors: Gregory Nutt +# Jim Ewing +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = cc3200_boot.c cc3200_serial.c cc3200_utils.c cc3200_leds.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += cc3200_autoleds.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/cc3200-launchpad/src/cc3200_autoleds.c b/configs/cc3200-launchpad/src/cc3200_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..01c944eb522e174e1648e14fcc72033141e7396e --- /dev/null +++ b/configs/cc3200-launchpad/src/cc3200_autoleds.c @@ -0,0 +1,203 @@ +/**************************************************************************** + * configs/cc3200/src/cc3200_autoleds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Jim Ewing + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "cc3200_launchpad.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* The CC3200 LaunchPad has three RGB LEDs. + * + * BOARD_LED_R -- Connected to PF1 + * BOARD_LED_G -- Connected to PF3 + * BOARD_LED_Y -- Connected to PF2 + * + * If CONFIG_ARCH_LEDS is defined, then automated support for the LaunchPad LEDs + * will be included in the build: + * + * OFF: + * - OFF means that the OS is still initializing. Initialization is very fast so + * if you see this at all, it probably means that the system is hanging up + * somewhere in the initialization phases. + * + * GREEN + * - This means that the OS completed initialization. + * + * YELLOW: + * - Whenever and interrupt or signal handler is entered, the YELLOW LED is + * illuminated and extinguished when the interrupt or signal handler exits. + * + * RED: + * - If a recovered assertion occurs, the RED component will be illuminated + * briefly while the assertion is handled. You will probably never see this. + * + * Flashing RED: + * - In the event of a fatal crash, the YELLOW and GREEN components will be + * extinguished and the RED component will FLASH at a 2Hz rate. + * + * RED YELLOW BLUE + * LED_STARTED 0 OFF OFF OFF + * LED_HEAPALLOCATE 0 OFF OFF OFF + * LED_IRQSENABLED 0 OFF OFF OFF + * LED_STACKCREATED 1 OFF ON OFF + * LED_INIRQ 2 NC NC ON (momentary) + * LED_SIGNAL 2 NC NC ON (momentary) + * LED_ASSERTION 3 ON NC NC (momentary) + * LED_PANIC 4 ON OFF OFF (flashing 2Hz) + */ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef CONFIG_DEBUG_LEDS +# define led_dumpgpio(m) lm_dumpgpio(LED_GPIO, m) +#else +# define led_dumpgpio(m) +#endif + + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: cc3200_led_initialize + * + * Description: + * Called to initialize the on-board LEDs. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Name: up_ledon + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + /* All components stay off until the file initialization step */ + + default: + case 0: + break; + + /* The GREEN component is illuminated at the final initialization step */ + + case 1: + cc3200_ledon(1); + break; + + /* These will illuminate the YELLOW component with on effect no RED and GREEN */ + + case 2: + cc3200_ledon(2); + break; + + /* This will turn off YELLOW and GREEN and turn RED on */ + + case 4: + cc3200_ledoff(1); + cc3200_ledoff(2); + + /* This will illuminate the RED component with no effect on YELLOW and GREEN */ + + case 3: + cc3200_ledon(3); + break; + } +} + +/**************************************************************************** + * Name: up_ledoff + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + /* These should not happen and are ignored */ + + default: + case 0: + case 1: + break; + + /* These will extinguish the YELLOW component with no effect on RED and GREEN */ + + case 2: + cc3200_ledoff(2); + break; + + /* These will extinguish the RED component with on effect on RED and GREEN */ + + case 3: + case 4: + cc3200_ledoff(3); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/cc3200-launchpad/src/cc3200_boot.c b/configs/cc3200-launchpad/src/cc3200_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..9d466b2d75c3a3fe23ebb63ef1414addcebed6b1 --- /dev/null +++ b/configs/cc3200-launchpad/src/cc3200_boot.c @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/cc3200-launchpad/src/cc3200_boot.c + * + * Copyright (C) 2014 Droidifi LLC. All rights reserved. + * Author: Jim Ewing + * + * Adapted for the cc3200 from code: + * + * Copyright (C) Gregory Nutt. + * Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include "cc3200_launchpad.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + * CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + * CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, && + * CONFIG_LIB_BOARDCTL=n : + * Called from board_initialize(). + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + return OK; +} + +/**************************************************************************** + * Name: tiva_boardinitialize + * + * Description: + * All Tiva architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ****************************************************************************/ + +void tiva_boardinitialize(void) +{ + cc3200_init(); + cc3200_uart_init(); + + cc3200_print("\r\nCC3200 init\r\n"); + + cc3200_led_initialize(); +} + +/**************************************************************************** + * Name: up_addregion + * + * Description: + * Memory may be added in non-contiguous chunks. Additional chunks are + * added by calling this function. + * + ****************************************************************************/ + +#if CONFIG_MM_REGIONS > 1 + +#define CC3200_SRAM1_BASE 0x20000000 +#define CC3200_SRAM1_SIZE 0x4000 + +void up_addregion(void) +{ + kumm_addregion((FAR void*)CC3200_SRAM1_BASE, CC3200_SRAM1_SIZE); +} + +#endif diff --git a/configs/cc3200-launchpad/src/cc3200_launchpad.h b/configs/cc3200-launchpad/src/cc3200_launchpad.h new file mode 100644 index 0000000000000000000000000000000000000000..9f9c77dc68c3d566777826e6fb158bdebb6a0270 --- /dev/null +++ b/configs/cc3200-launchpad/src/cc3200_launchpad.h @@ -0,0 +1,86 @@ +/**************************************************************************** + * configs/cc3200-launchpad/src/cc3200_launchpad.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_CC3200_LAUNCHPAD_SRC_CC3200_LAUNCHPAD_H +#define __CONFIGS_CC3200_LAUNCHPAD_SRC_CC3200_LAUNCHPAD_H 1 + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: cc3200_init + ****************************************************************************/ + +void cc3200_init(void); + +/************************************************************************************ + * Name: cc3200_uart_init + ************************************************************************************/ + +void cc3200_uart_init(void); + +/************************************************************************************ + * Name: cc3200_led_init + ************************************************************************************/ + +void cc3200_led_init(void); + +/**************************************************************************** + * Name: cc3200_ledon + ****************************************************************************/ + +void cc3200_ledon(int led); + +/**************************************************************************** + * Name: cc3200_ledoff + ****************************************************************************/ + +void cc3200_ledoff(int led); + +#endif /* __CONFIGS_CC3200_LAUNCHPAD_SRC_CC3200_LAUNCHPAD_H */ diff --git a/configs/cc3200-launchpad/src/cc3200_leds.c b/configs/cc3200-launchpad/src/cc3200_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..e8e231113fb988d007689ce277df339884c66273 --- /dev/null +++ b/configs/cc3200-launchpad/src/cc3200_leds.c @@ -0,0 +1,151 @@ +#include + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" + +#include "cc3200_launchpad.h" + +#define LED1_GPIO 9 +#define LED2_GPIO 10 +#define LED3_GPIO 11 + +/**************************************************************************** + * Name: cc3200_led_initialize + ****************************************************************************/ + +void cc3200_led_initialize(void) +{ + uint32_t led1_port; + uint8_t led1_pin; + uint32_t led2_port; + uint8_t led2_pin; + uint32_t led3_port; + uint8_t led3_pin; + uint8_t x=16; + + putreg32(getreg32(0x44025000 + 0x00000058) | 0x00000001, 0x44025000 + 0x00000058); + while(--x) + ; + + cc3200_pin_type_gpio(PIN_01, PIN_MODE_0, false); + cc3200_set_gpio_dir(TIVA_GPIOB_BASE, 0x4, GPIO_DIR_MODE_OUT); + + cc3200_pin_type_gpio(PIN_02, PIN_MODE_0, false); + cc3200_set_gpio_dir(TIVA_GPIOB_BASE, 0x8, GPIO_DIR_MODE_OUT); + + cc3200_pin_type_gpio(PIN_64, PIN_MODE_0, false); + cc3200_set_gpio_dir(TIVA_GPIOB_BASE, 0x2, GPIO_DIR_MODE_OUT); + + cc3200_get_gpio_port_pin(LED1_GPIO, &led1_port, &led1_pin); + cc3200_get_gpio_port_pin(LED2_GPIO, &led2_port, &led2_pin); + cc3200_get_gpio_port_pin(LED3_GPIO, &led3_port, &led3_pin); + + cc3200_set_gpio(LED1_GPIO, led1_port, led1_pin, 0); + cc3200_set_gpio(LED2_GPIO, led2_port, led2_pin, 0); + cc3200_set_gpio(LED3_GPIO, led3_port, led3_pin, 0); +} + +/**************************************************************************** + * Name: cc3200_ledon + ****************************************************************************/ + +void cc3200_ledon(int led) +{ + unsigned int led1_port; + unsigned char led1_pin; + unsigned int led2_port; + unsigned char led2_pin; + unsigned int led3_port; + unsigned char led3_pin; + + cc3200_get_gpio_port_pin(LED1_GPIO, &led1_port, &led1_pin); + cc3200_get_gpio_port_pin(LED2_GPIO, &led2_port, &led2_pin); + cc3200_get_gpio_port_pin(LED3_GPIO, &led3_port, &led3_pin); + + switch (led) + { + /* All */ + + default: + case 0: + cc3200_set_gpio(LED1_GPIO, led1_port, led1_pin, 1); + cc3200_set_gpio(LED2_GPIO, led2_port, led2_pin, 1); + cc3200_set_gpio(LED3_GPIO, led3_port, led3_pin, 1); + break; + + /* GREEN */ + + case 1: + cc3200_set_gpio(LED3_GPIO, led3_port, led3_pin, 1); + break; + + /* YELLOW */ + + case 2: + cc3200_set_gpio(LED2_GPIO, led2_port, led2_pin, 1); + break; + + /* RED */ + + case 3: + cc3200_set_gpio(LED1_GPIO, led1_port, led1_pin, 1); + break; + } +} + +/**************************************************************************** + * Name: cc3200_ledoff + ****************************************************************************/ + +void cc3200_ledoff(int led) +{ + unsigned int led1_port; + unsigned char led1_pin; + unsigned int led2_port; + unsigned char led2_pin; + unsigned int led3_port; + unsigned char led3_pin; + + cc3200_get_gpio_port_pin(LED1_GPIO, &led1_port, &led1_pin); + cc3200_get_gpio_port_pin(LED2_GPIO, &led2_port, &led2_pin); + cc3200_get_gpio_port_pin(LED3_GPIO, &led3_port, &led3_pin); + + switch (led) + { + /* All */ + + default: + case 0: + cc3200_set_gpio(LED1_GPIO, led1_port, led1_pin, 0); + cc3200_set_gpio(LED2_GPIO, led2_port, led2_pin, 0); + cc3200_set_gpio(LED3_GPIO, led3_port, led3_pin, 0); + break; + + /* GREEN */ + + case 1: + cc3200_set_gpio(LED3_GPIO, led3_port, led3_pin, 0); + break; + + /* YELLOW */ + + case 2: + cc3200_set_gpio(LED2_GPIO, led2_port, led2_pin, 0); + break; + + /* RED */ + + case 3: + cc3200_set_gpio(LED1_GPIO, led1_port, led1_pin, 0); + break; + } +} diff --git a/configs/cc3200-launchpad/src/cc3200_serial.c b/configs/cc3200-launchpad/src/cc3200_serial.c new file mode 100644 index 0000000000000000000000000000000000000000..34e4eaef3f56a92f1b4fff81c4b78af9f0f21078 --- /dev/null +++ b/configs/cc3200-launchpad/src/cc3200_serial.c @@ -0,0 +1,142 @@ +/************************************************************************************ + * configs/cc3200/src/cc3200_serial.c + * + * Copyright (C) 2013 Droidifi LLC. All rights reserved. + * Author: Jim Ewing + * + * Adapted for the cc3200 from code: + * + * Copyright (C) Gregory Nutt. + * Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "chip/cc3200_memorymap.h" +#include "tiva_start.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "cc3200_launchpad.h" + +#if !defined(HAVE_SERIALCONSOLE) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_TIVA_BOARD_EARLYINIT +# error CONFIG_TIVA_BOARD_EARLYINIT is required +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +static void cc3200_uart0_init(void) +{ + putreg32(getreg32(0x44025080) | 0x01, 0x44025080); + + cc3200_pin_type_uart(PIN_55, PIN_MODE_3); + cc3200_pin_type_uart(PIN_57, PIN_MODE_3); + + while(getreg32(0x4000C018) & 0x08) + { + } + + putreg32(getreg32(0x4000C02C) & ~(0x00000010), 0x4000C02C); + putreg32(getreg32(0x4000C030) & ~(0x01 | 0x100 | 0x200), 0x4000C030); + putreg32(getreg32(0x4000C030) & ~(0x20), 0x4000C030); + + putreg32(((((80000000 * 8) / 115200) + 1) / 2) / 64, 0x4000C024); + putreg32(((((80000000 * 8) / 115200) + 1) / 2) % 64, 0x4000C028); + + putreg32((0x60 | 0x82 | 0x10), 0x4000C02C); + putreg32(getreg32(0x4000C030) | (0x01 | 0x100 | 0x200), 0x4000C030); +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_earlyinit + * + * Description: + * Performs the low level UART initialization early in debug so that the serial + * console will be available during bootup. This must be called before + * up_consoleinit. + * + ************************************************************************************/ + +void board_earlyinit(void) +{ + cc3200_init(); + cc3200_uart0_init(); +} + +/************************************************************************************ + * Name: up_consoleinit + * + * Description: + * Register serial console and serial ports. This assumes that + * board_earlyinit was called previously. + * + ************************************************************************************/ + +#if USE_SERIALDRIVER +void up_consoleinit(void) +{ + /* There is probably a problem if we are here */ + + lowconsole_init(); +} +#endif + +/************************************************************************************ + * Name: cc3200_uart_init + ************************************************************************************/ + +void cc3200_uart_init(void) +{ + cc3200_uart0_init(); +} + +#endif /* !HAVE_SERIALCONSOLE && CONFIG_ARCH_LCD */ diff --git a/configs/cc3200-launchpad/src/cc3200_utils.c b/configs/cc3200-launchpad/src/cc3200_utils.c new file mode 100644 index 0000000000000000000000000000000000000000..8e6d57c0c1c94f38b28f0f4598e5f3ebea6be478 --- /dev/null +++ b/configs/cc3200-launchpad/src/cc3200_utils.c @@ -0,0 +1,227 @@ +/************************************************************************************ + * configs/cc3200/src/cc3200_util.c + * + * Copyright (C) 2014 Droidifi LLC. All rights reserved. + * Author: Jim Ewing + * + * Adapted from code Copyright (C) 2014 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include "nuttx/arch.h" +#include "up_arch.h" + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static const unsigned long g_cc3200_pinmap[64] = +{ + 10, 11, 12, 13, 14, 15, 16, 17, 255, 255, 18, + 19, 20, 21, 22, 23, 24, 40, 28, 29, 25, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, + 31, 255, 255, 255, 255, 0, 255, 32, 30, 255, 1, + 255, 2, 3, 4, 5, 6, 7, 8, 9 +}; + +static const unsigned long gpio_reg[]= +{ + TIVA_GPIOA_BASE, + TIVA_GPIOB_BASE, + TIVA_GPIOC_BASE, + TIVA_GPIOD_BASE +}; + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: cc3200_get_gpio_port_pin + ************************************************************************************/ + +void cc3200_get_gpio_port_pin(uint8_t pin, uint32_t *gpio_port, uint8_t *gpio_pin) +{ + *gpio_pin = 1 << (pin % 8); + *gpio_port = (pin / 8); + *gpio_port = gpio_reg[*gpio_port]; +} + +/************************************************************************************ + * Name: cc3200_set_gpio + ************************************************************************************/ + +void cc3200_set_gpio(uint8_t pin, uint32_t gpio_port, uint8_t gpio_pin, + uint8_t gpio_val) +{ + gpio_val = gpio_val << (pin % 8); + putreg32(gpio_val, gpio_port + (gpio_pin << 2)); +} + +/************************************************************************************ + * Name: cc3200_set_gpio_dir + ************************************************************************************/ + +void cc3200_set_gpio_dir(uint32_t port, uint8_t pins, uint32_t pin_io) +{ + putreg32(((pin_io & 1) ? (getreg32(port + GPIO_O_GPIO_DIR) | pins) : + (getreg32(port + GPIO_O_GPIO_DIR) & ~(pins))), port + GPIO_O_GPIO_DIR); +} + +/************************************************************************************ + * Name: cc3200_print + ************************************************************************************/ + +void cc3200_print(char* str) +{ + while (str && *str != '\0') + { + up_putc(*str++); + } +} + +/************************************************************************************ + * Name: cc3200_pin_config_set + ************************************************************************************/ + +void cc3200_pin_config_set(uint32_t pin, uint32_t pin_strength, uint32_t pin_type) +{ + uint32_t pad; + + pad = g_cc3200_pinmap[pin & 0x3F]; + + switch (pin_type) + { + case PIN_TYPE_ANALOG: + putreg32(getreg32(0x4402E144) | ((0x80 << pad) & (0x1E << 8)), 0x4402E144); + pad = ((pad << 2) + PAD_CONFIG_BASE); + putreg32(getreg32(pad) | 0xC00, pad); + break; + + default: + putreg32(getreg32(0x4402E144) & ~((0x80 << pad) & (0x1E << 8)), 0x4402E144); + pad = ((pad << 2) + PAD_CONFIG_BASE); + putreg32(((getreg32(pad) & ~(PAD_STRENGTH_MASK | PAD_TYPE_MASK)) | (pin_strength | pin_type )), pad); + break; + } +} + +/************************************************************************************ + * Name: cc3200_pin_mode_set + ************************************************************************************/ + +void cc3200_pin_mode_set(uint32_t pin, uint32_t pin_mode) +{ + uint32_t pad; + + pad = g_cc3200_pinmap[pin & 0x3F]; + pad = ((pad << 2) + PAD_CONFIG_BASE); + putreg32( (((getreg32(pad) & ~PAD_MODE_MASK) | pin_mode) & ~(3<<10)), pad); +} + +/************************************************************************************ + * Name: cc3200_pin_type_uart + ************************************************************************************/ + +void cc3200_pin_type_uart(uint32_t pin, uint32_t pin_mode) +{ + cc3200_pin_mode_set(pin, pin_mode); + cc3200_pin_config_set(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD); +} + +/************************************************************************************ + * Name: cc3200_pin_type_gpio + ************************************************************************************/ + +void cc3200_pin_type_gpio(uint32_t pin, uint32_t pin_mode, uint32_t open_drain) +{ + if(open_drain) + { + cc3200_pin_config_set(pin, PIN_STRENGTH_2MA, PIN_TYPE_OD); + } + else + { + cc3200_pin_config_set(pin, PIN_STRENGTH_2MA, PIN_TYPE_STD); + } + + cc3200_pin_mode_set(pin, pin_mode); +} + +/************************************************************************************ + * Name: cc3200_init + ************************************************************************************/ + +void cc3200_init(void) +{ + uint8_t x=16; + + putreg32(getreg32(0x4402F064) | 0x800000, 0x4402F064); + putreg32(getreg32(0x4402F800 + 0x00000418) | (1<<4), 0x4402F800 + 0x00000418); + putreg32(getreg32(0x4402E16C) | 0x3C, 0x4402E16C); + putreg32(getreg32(0x44025000 + 0x00000048) | 0x00000001, 0x44025000 + 0x00000048); + while(--x) + ; + putreg32(getreg32(0x44025000 + 0x00000048) & ~0x00000001, 0x44025000 + 0x00000048); + putreg32(0x0, 0x4402F804); + putreg32(0x1, 0x4402F804); + + if (((getreg32(0x4402F0C8) & 0xFF) == 0x2)) + { + putreg32((getreg32(0x4402E110) & ~0xC0F) | 0x2, 0x4402E110); + putreg32((getreg32(0x4402E114) & ~0xC0F) | 0x2, 0x4402E114); + } + + putreg32(getreg32(0x4402E184) | 0x2, 0x4402E184); + + if ((getreg32(0x4402E0A4) & 0xF) == 0x1) + { + putreg32(getreg32(0x4402E0A4) & ~0xF, 0x4402E0A4); + } + + if ((getreg32(0x4402E0A8) & 0xF) == 0x1) + { + putreg32(getreg32(0x4402E0A8) & ~0xF, 0x4402E0A8); + } + + if (((getreg32(0x4402DC78) >> 22) & 0xF) == 0xE) + { + putreg32((getreg32(0x4402F0B0) & ~(0x00FC0000)) | (0x32 << 18), 0x4402F0B0); + } + else + { + putreg32((getreg32(0x4402F0B0) & ~(0x00FC0000)) | (0x29 << 18), 0x4402F0B0); + } +} diff --git a/configs/cc3200-launchpad/tools/cc3200.cfg b/configs/cc3200-launchpad/tools/cc3200.cfg new file mode 100644 index 0000000000000000000000000000000000000000..7657935a7f48215941a1635d95860e6947ebf7e4 --- /dev/null +++ b/configs/cc3200-launchpad/tools/cc3200.cfg @@ -0,0 +1,85 @@ +#****************************************************************************************** +# +# CC3200 OpenOCD configuration file +# +# Copyright (C) 2014 Droidifi LLC. All rights reserved. +# Author: Jim Ewing +# +# Redistributions must retain the above copyright notice and the +# following disclaimer. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +interface ftdi +ftdi_device_desc "USB <-> JTAG/SWD" +ftdi_vid_pid 0x0451 0xc32a +ftdi_layout_init 0x00a8 0x00eb +ftdi_layout_signal nSRST -noe 0x0020 + +adapter_khz 1000 +set _ENDIAN little + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME cc3200 +} + +source [find target/icepick.cfg] + +if { [info exists DAP_TAPID] } { + set _DAP_TAPID $DAP_TAPID +} else { + set _DAP_TAPID 0x0b97c02f +} + +jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable + +# APP m4 +jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0" + +# ICEpick-C (JTAG route controller) +if { [info exists JRC_TAPID] } { + set _JRC_TAPID $JRC_TAPID +} else { + set _JRC_TAPID $_DAP_TAPID +} + +jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version +jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap" +jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100" + +set _TARGETNAME $_CHIPNAME.cpu + +target create $_CHIPNAME.cpu cortex_m -endian little -chain-position $_CHIPNAME.dap +$_CHIPNAME.cpu configure -work-area-phys 0x20000000 -work-area-size 0x30000 -work-area-backup 0 -coreid 0 + +source [find mem_helper.tcl] + +$_TARGETNAME configure -event gdb-attach { +# cortex_m dbginit + halt +} + +$_TARGETNAME configure -event "reset-start" { adapter_khz 1000 } +$_TARGETNAME configure -event "reset-assert" { + + global _CHIPNAME + + # assert warm system reset through ICEPick + icepick_c_wreset $_CHIPNAME.jrc +} + + diff --git a/configs/cloudctrl/Kconfig b/configs/cloudctrl/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..7008de2c6dec8223cd598383862c55f9b9f61241 --- /dev/null +++ b/configs/cloudctrl/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_CLOUDCTRL + +endif diff --git a/configs/cloudctrl/README.txt b/configs/cloudctrl/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..f98996d214abd6018c3ecd4445c7c7e5977a997e --- /dev/null +++ b/configs/cloudctrl/README.txt @@ -0,0 +1,858 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the CloudController +development board featuring the STMicro STM32F107VCT MCU. + +Features of the CloudController board include: + + - STM32F107VCT + - 10/100M PHY (DM9161AEP) + - USB OTG + - USART connectos (USART1-2) + - SPI Flash (W25X16) + - (3) LEDs (LED1-3) + - (3) Buttons (KEY1-3, USERKEY2, USERKEY, TEMPER, WAKEUP) + - 5V/3.3V power conversion + - SWD + +Contents +======== + + - STM32F107VCT Pin Usage + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI buildroot Toolchain + - NuttX OABI buildroot Toolchain + - NXFLAT Toolchain + - Cloudctrl-specific Configuration Options + - LEDs + - Cloudctrl-specific Configuration Options + - Configurations + +STM32F107VCT Pin Usage +====================== + +-- ---- -------------- ------------------------------------------------------------------- +PN NAME SIGNAL NOTES +-- ---- -------------- ------------------------------------------------------------------- +**23 PA0 WAKEUP Connected to KEY4. Active low: Closing KEY4 pulls WAKEUP to ground. +24 PA1 MII_RX_CLK + RMII_REF_CLK +25 PA2 MII_MDIO +26 PA3 315M_VT +29 PA4 DAC_OUT1 To CON5(CN14) +30 PA5 DAC_OUT2 To CON5(CN14). JP10 + SPI1_SCK To the SD card, SPI FLASH +31 PA6 SPI1_MISO To the SD card, SPI FLASH +32 PA7 SPI1_MOSI To the SD card, SPI FLASH +67 PA8 MCO To DM9161AEP PHY +68 PA9 USB_VBUS MINI-USB-AB. JP3 + USART1_TX MAX3232 to CN5 +69 PA10 USB_ID MINI-USB-AB. JP5 + USART1_RX MAX3232 to CN5 +70 PA11 USB_DM MINI-USB-AB +71 PA12 USB_DP MINI-USB-AB +72 PA13 TMS/SWDIO +76 PA14 TCK/SWCLK +77 PA15 TDI + +-- ---- -------------- ------------------------------------------------------------------- +PN NAME SIGNAL NOTES +-- ---- -------------- ------------------------------------------------------------------- +35 PB0 ADC_IN1 To CON5(CN14) +36 PB1 ADC_IN2 To CON5(CN14) +37 PB2 DATA_LE To TFT LCD (CN13) + BOOT1 JP13 +89 PB3 TDO/SWO +90 PB4 TRST +91 PB5 CAN2_RX +92 PB6 CAN2_TX JP11 + I2C1_SCL +93 PB7 I2C1_SDA +95 PB8 USB_PWR Drives USB VBUS +96 PB9 F_CS To both the TFT LCD (CN13) and to the W25X16 SPI FLASH +47 PB10 USERKEY Connected to KEY2 +48 PB11 MII_TX_EN Ethernet PHY +51 PB12 I2S_WS Audio DAC + MII_TXD0 Ethernet PHY +52 PB13 I2S_CK Audio DAC + MII_TXD1 Ethernet PHY +53 PB14 SD_CD There is confusion here. Schematic is wrong LCD_WR is PB14. +54 PB15 I2S_DIN Audio DAC + +-- ---- -------------- ------------------------------------------------------------------- +PN NAME SIGNAL NOTES +-- ---- -------------- ------------------------------------------------------------------- +15 PC0 POTENTIO_METER +16 PC1 MII_MDC Ethernet PHY +17 PC2 WIRELESS_INT +18 PC3 WIRELESS_CE To the NRF24L01 2.4G wireless module +33 PC4 USERKEY2 Connected to KEY1 +34 PC5 TP_INT JP6. To TFT LCD (CN13) module + MII_INT Ethernet PHY +63 PC6 I2S_MCK Audio DAC. Active low: Pulled high +64 PC7 PCM1770_CS Audio DAC. Active low: Pulled high +65 PC8 LCD_CS TFT LCD (CN13). Active low: Pulled high +66 PC9 TP_CS TFT LCD (CN13). Active low: Pulled high +78 PC10 SPI3_SCK To TFT LCD (CN13), the NRF24L01 2.4G wireless module +79 PC11 SPI3_MISO To TFT LCD (CN13), the NRF24L01 2.4G wireless module +80 PC12 SPI3_MOSI To TFT LCD (CN13), the NRF24L01 2.4G wireless module +7 PC13 TAMPER Connected to KEY3 +8 PC14 OSC32_IN Y1 32.768Khz XTAL +9 PC15 OSC32_OUT Y1 32.768Khz XTAL + +-- ---- -------------- ------------------------------------------------------------------- +PN NAME SIGNAL NOTES +-- ---- -------------- ------------------------------------------------------------------- +81 PD0 CAN1_RX +82 PD1 CAN1_TX +83 PD2 LED1 Active low: Pulled high +84 PD3 LED2 Active low: Pulled high +85 PD4 LED3 Active low: Pulled high +86 PD5 485_TX Same as USART2_TX but goes to SP3485 + USART2_TX MAX3232 to CN6 +87 PD6 485_RX Save as USART2_RX but goes to SP3485 (see JP4) + USART2_RX MAX3232 to CN6 +88 PD7 LED4 Active low: Pulled high + 485_DIR SP3485 read enable (not) +55 PD8 MII_RX_DV Ethernet PHY + RMII_CRSDV Ethernet PHY +56 PD9 MII_RXD0 Ethernet PHY +57 PD10 MII_RXD1 Ethernet PHY +58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32) +59 PD12 WIRELESS_CS To the NRF24L01 2.4G wireless module +60 PD13 LCD_RS To TFT LCD (CN13) +61 PD14 LCD_WR To TFT LCD (CN13). Schematic is wrong LCD_WR is PB14. +62 PD15 LCD_RD To TFT LCD (CN13) + +-- ---- -------------- ------------------------------------------------------------------- +PN NAME SIGNAL NOTES +-- ---- -------------- ------------------------------------------------------------------- +97 PE0 DB00 To TFT LCD (CN13) +98 PE1 DB01 To TFT LCD (CN13) +1 PE2 DB02 To TFT LCD (CN13) +2 PE3 DB03 To TFT LCD (CN13) +3 PE4 DB04 To TFT LCD (CN13) +4 PE5 DB05 To TFT LCD (CN13) +5 PE6 DB06 To TFT LCD (CN13) +38 PE7 DB07 To TFT LCD (CN13) +39 PE8 DB08 To TFT LCD (CN13) +40 PE9 DB09 To TFT LCD (CN13) +41 PE10 DB10 To TFT LCD (CN13) +42 PE11 DB11 To TFT LCD (CN13) +43 PE12 DB12 To TFT LCD (CN13) +44 PE13 DB13 To TFT LCD (CN13) +45 PE14 DB14 To TFT LCD (CN13) +46 PE15 DB15 To TFT LCD (CN13) + +-- ---- -------------- ------------------------------------------------------------------- +PN NAME SIGNAL NOTES +-- ---- -------------- ------------------------------------------------------------------- +73 N/C + +12 OSC_IN Y2 25Mhz XTAL +13 OSC_OUT Y2 25Mhz XTAL + +94 BOOT0 JP15 (3.3V or GND) +14 RESET S5 +6 VBAT JP14 (3.3V or battery) + +49 VSS_1 GND +74 VSS_2 GND +99 VSS_3 GND +27 VSS_4 GND +10 VSS_5 GND +19 VSSA VSSA +20 VREF- VREF- + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment because the development tools that I used only work under Windows. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, or + 5. The NuttX buildroot Toolchain (see below). + + Most testing has been conducted using the CodeSourcery toolchain for Windows and + that is the default toolchain in most configurations. To use the Atollic, + devkitARM, Raisonance GNU, or NuttX buildroot toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcery (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI buildroot Toolchain +============================== + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh shenzhou/ + + cd .. + make context + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit nuttx/.config to select the buildroot toolchain as described above + and below: + + -CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y + +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y + + 9. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + -export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + + -#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +==== + +The Cloudctrl board has four LEDs labeled LED1, LED2, LED3 and LED4 on the +board. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/up_leds.c. The LEDs are used to encode OS-related +events as follows: + + SYMBOL Meaning LED1* LED2 LED3 LED4**** + ------------------- ----------------------- ------- ------- ------- ------ + LED_STARTED NuttX has been started ON OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF + LED_IRQSENABLED Interrupts enabled ON ON OFF OFF + LED_STACKCREATED Idle stack created OFF OFF ON OFF + LED_INIRQ In an interrupt** ON N/C N/C OFF + LED_SIGNAL In a signal handler*** N/C ON N/C OFF + LED_ASSERTION An assertion failed ON ON N/C OFF + LED_PANIC The system has crashed N/C N/C N/C ON + LED_IDLE STM32 is is sleep mode (Optional, not used) + + * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot + and these LEDs will give you some indication of where the failure was + ** The normal state is LED1 ON and LED1 faintly glowing. This faint glow + is because of timer interrupts that result in the LED being illuminated + on a small proportion of the time. + *** LED2 may also flicker normally if signals are processed. +**** LED4 may not be available if RS-485 is also used. For RS-485, it will + then indicate the RS-485 direction. + +Cloudctrl-specific Configuration Options +============================================ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32F107VC=y + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=shenzhou (for the Cloudctrl development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SHENZHOU=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + AHB + --- + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + CONFIG_STM32_CRC + CONFIG_STM32_ETHMAC + CONFIG_STM32_OTGFS + CONFIG_STM32_IWDG + CONFIG_STM32_PWR -- Required for RTC + + APB1 (low speed) + ---------------- + CONFIG_STM32_BKP + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI3 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_CAN1 + CONFIG_STM32_CAN2 + CONFIG_STM32_DAC1 + CONFIG_STM32_DAC2 + CONFIG_STM32_WWDG + + APB2 (high speed) + ----------------- + CONFIG_STM32_TIM1 + CONFIG_STM32_SPI1 + CONFIG_STM32_USART1 + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + + Timer and I2C devices may need to the following to force power to be applied + unconditionally at power up. (Otherwise, the device is powered when it is + initialized). + + CONFIG_STM32_FORCEPOWER + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + JTAG Enable settings (by default JTAG-DP and SW-DP are disabled): + + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + + STM32107xxx specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + + CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board + CONFIG_STM32_MII - Support Ethernet MII interface + CONFIG_STM32_MII_MCO - Use MCO to clock the MII interface + CONFIG_STM32_RMII - Support Ethernet RMII interface + CONFIG_STM32_RMII_MCO - Use MCO to clock the RMII interface + CONFIG_STM32_AUTONEG - Use PHY autonegotion to determine speed and mode + CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this + may be defined to select full duplex mode. Default: half-duplex + CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this + may be defined to select 100 MBps speed. Default: 10 Mbps + CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is + defined. The PHY status register address may diff from PHY to PHY. This + configuration sets the address of the PHY status register. + CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides bit mask indicating 10 or 100MBps speed. + CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides the value of the speed bit(s) indicating 100MBps speed. + CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provide bit mask indicating full or half duplex modes. + CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides the value of the mode bits indicating full duplex mode. + CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported + but some hooks are indicated with this condition. + + Cloudctrl CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + + Cloudctrl LCD Hardware Configuration + + The LCD driver supports the following LCDs on the STM324xG_EVAL board: + + AM-240320L8TNQW00H (LCD_ILI9320 or LCD_ILI9321) OR + AM-240320D5TOQW01H (LCD_ILI9325) + + Configuration options. + + CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape" + support. Default is this 320x240 "landscape" orientation + For the Cloudctrl board, the edge opposite from the row of buttons + is used as the top of the display in this orientation. + CONFIG_LCD_RLANDSCAPE - Define for 320x240 display "reverse + landscape" support. Default is this 320x240 "landscape" + orientation + For the Cloudctrl board, the edge next to the row of buttons + is used as the top of the display in this orientation. + CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait" + orientation support. + CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse + portrait" orientation support. + CONFIG_LCD_RDSHIFT - When reading 16-bit gram data, there appears + to be a shift in the returned data. This value fixes the offset. + Default 5. + + The LCD driver dynamically selects the LCD based on the reported LCD + ID value. However, code size can be reduced by suppressing support for + individual LCDs using: + + CONFIG_STM32_ILI9320_DISABLE (includes ILI9321) + CONFIG_STM32_ILI9325_DISABLE + + STM32 USB OTG FS Host Driver Support + + Pre-requisites + + CONFIG_USBHOST - Enable USB host support + CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block + CONFIG_STM32_SYSCFG - Needed + CONFIG_SCHED_WORKQUEUE - Worker thread support is required + + Options: + + CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. + Default 128 (512 bytes) + CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO + in 32-bit words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit + words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128 + CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever + want to do that? + CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access + debug. Depends on CONFIG_DEBUG. + CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB + packets. Depends on CONFIG_DEBUG. + +Configurations +============== + +Each Cloudctrl configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh shenzhou/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables both the serial and telnet NSH interfaces. + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_NSH_DHCPC=n : DHCP is disabled + CONFIG_NSH_IPADDR=0x0a000002 : Target IP address 10.0.0.2 + CONFIG_NSH_DRIPADDR=0x0a000001 : Host IP address 10.0.0.1 + + NOTES: + 1. This example assumes that a network is connected. During its + initialization, it will try to negotiate the link speed. If you have + no network connected when you reset the board, there will be a long + delay (maybe 30 seconds?) before anything happens. That is the timeout + before the networking finally gives up and decides that no network is + available. + + 2. Enabling the ADC example: + + The only internal signal for ADC testing is the potentiometer input: + + ADC1_IN10(PC0) Potentiometer + + External signals are also available on CON5 CN14: + + ADC_IN8 (PB0) CON5 CN14 Pin2 + ADC_IN9 (PB1) CON5 CN14 Pin1 + + The signal selection is hard-coded in configs/shenzhou/src/up_adc.c: The + potentiometer input (only) is selected. + + These selections will enable sampling the potentiometer input at 100Hz using + Timer 1: + + CONFIG_ANALOG=y : Enable analog device support + CONFIG_ADC=y : Enable generic ADC driver support + CONFIG_ADC_DMA=n : ADC DMA is not supported + CONFIG_STM32_ADC1=y : Enable ADC 1 + CONFIG_STM32_TIM1=y : Enable Timer 1 + CONFIG_STM32_TIM1_ADC=y : Use Timer 1 for ADC + CONFIG_STM32_TIM1_ADC1=y : Allocate Timer 1 to ADC 1 + CONFIG_STM32_ADC1_SAMPLE_FREQUENCY=100 : Set sampling frequency to 100Hz + CONFIG_STM32_ADC1_TIMTRIG=0 : Trigger on timer output 0 + CONFIG_STM32_FORCEPOWER=y : Apply power to TIM1 a boot up time + CONFIG_EXAMPLES_ADC=y : Enable the apps/examples/adc built-in + + nxwm + ---- + This is a special configuration setup for the NxWM window manager + UnitTest. The NxWM window manager can be found here: + + nuttx-code/NxWidgets/nxwm + + The NxWM unit test can be found at: + + nuttx-code/NxWidgets/UnitTests/nxwm + + NOTE: JP6 selects between the touchscreen interrupt and the MII + interrupt. It should be positioned 1-2 to enable the touchscreen + interrupt. + + Documentation for installing the NxWM unit test can be found here: + + nuttx-code/NxWidgets/UnitTests/README.txt + + Here is the quick summary of the build steps (Assuming that all of + the required packages are available in a directory ~/nuttx-code): + + 1. Intall the nxwm configuration + + $ cd ~/nuttx-code/tools + $ ./configure.sh shenzhou/nxwm + + 2. Make the build context (only) + + $ cd .. + $ . ./setenv.sh + $ make context + ... + + 3. Install the nxwm unit test + + $ cd ~/nuttx-code/NxWidgets + $ tools/install.sh ~/nuttx-code/apps nxwm + Creating symbolic link + - To ~/nuttx-code/NxWidgets/UnitTests/nxwm + - At ~/nuttx-code/apps/external + + 4. Build the NxWidgets library + + $ cd ~/nuttx-code/NxWidgets/libnxwidgets + $ make TOPDIR=~/nuttx-code + ... + + 5. Build the NxWM library + + $ cd ~/nuttx-code/NxWidgets/nxwm + $ make TOPDIR=~/nuttx-code + ... + + 6. Built NuttX with the installed unit test as the application + + $ cd ~/nuttx-code + $ make + + NOTE: Reading from the LCD is not currently supported by this + configuration. The hardware will support reading from the LCD + and drivers/lcd/ssd1289.c also supports reading from the LCD. + This limits some graphics capabilities. + + Reading from the LCD is not supported only because it has not + been test. If you get inspired to test this feature, you can + turn the LCD read functionality on by setting: + + -CONFIG_LCD_NOGETRUN=y + +# CONFIG_LCD_NOGETRUN is not set + + -CONFIG_NX_WRITEONLY=y + +# CONFIG_NX_WRITEONLY is not set + + thttpd + ------ + + This builds the THTTPD web server example using the THTTPD and + the apps/examples/thttpd application. + + NOTE: See note above with regard to the EABI/OABI buildroot + toolchains. This example can only be built using the older + OABI toolchain due to incompatibilities introduced in later + GCC releases. diff --git a/configs/cloudctrl/include/board.h b/configs/cloudctrl/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..474caee909f1fdb23a131c10fd841af848d51ddb --- /dev/null +++ b/configs/cloudctrl/include/board.h @@ -0,0 +1,379 @@ +/************************************************************************************ + * configs/cloudctrl/include/board.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_CLOUDCTRL_INCLUDE_BOARD_H +#define __CONFIGS_CLOUDCTRL_INCLUDE_BOARD_H 1 + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* HSI - 8 MHz RC factory-trimmed + * LSI - 40 KHz RC (30-60KHz, uncalibrated) + * HSE - On-board crystal frequency is 25MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 25000000ul + +#define STM32_HSI_FREQUENCY 8000000ul +#define STM32_LSI_FREQUENCY 40000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* PLL ouput is 72MHz */ + +#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */ +#define STM32_PLL_PLL2MUL RCC_CFGR2_PLL2MULx8 /* 5MHz * 8 => 40MHz */ +#define STM32_PLL_PREDIV1 RCC_CFGR2_PREDIV1d5 /* 40MHz / 5 => 8MHz */ +#define STM32_PLL_PLLMUL RCC_CFGR_PLLMUL_CLKx9 /* 8MHz * 9 => 72Mhz */ +#define STM32_PLL_FREQUENCY (72000000) + +/* SYCLLK and HCLK are the PLL frequency */ + +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (72MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */ + +/* APB2 timers 1 and 8 will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* MCO output driven by PLL3. From above, we already have PLL3 input frequency as: + * + * STM32_PLL_PREDIV2 = 5, 25MHz / 5 => 5MHz + */ + +#if defined(CONFIG_STM32_MII_MCO) || defined(CONFIG_STM32_RMII_MCO) +# define BOARD_CFGR_MCO_SOURCE RCC_CFGR_PLL3CLK /* Source: PLL3 */ +# define STM32_PLL_PLL3MUL RCC_CFGR2_PLL3MULx10 /* MCO 5MHz * 10 = 50MHz */ +#endif + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_LED3 2 +#define BOARD_LED4 3 +#define BOARD_NLEDS 4 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) +#define BOARD_LED4_BIT (1 << BOARD_LED4) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the + * STM3240G-EVAL. The following definitions describe how NuttX controls the LEDs: + */ + +#define LED_STARTED 0 /* LED1 */ +#define LED_HEAPALLOCATE 1 /* LED2 */ +#define LED_IRQSENABLED 2 /* LED1 + LED2 */ +#define LED_STACKCREATED 3 /* LED3 */ +#define LED_INIRQ 4 /* LED1 + LED3 */ +#define LED_SIGNAL 5 /* LED2 + LED3 */ +#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */ +#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */ + +/* Button definitions ***************************************************************/ +/* The STM3240G-EVAL supports three buttons: */ + +#define BUTTON_KEY1 0 /* Name printed on board */ +#define BUTTON_KEY2 1 +#define BUTTON_KEY3 2 +#define NUM_BUTTONS 3 + +#define BUTTON_USERKEY BUTTON_KEY1 /* Names in schematic */ +#define BUTTON_TAMPER BUTTON_KEY2 +#define BUTTON_WAKEUP BUTTON_KEY3 + +#define BUTTON_KEY1_BIT (1 << BUTTON_KEY1) +#define BUTTON_KEY2_BIT (1 << BUTTON_KEY2) +#define BUTTON_KEY3_BIT (1 << BUTTON_KEY3) + +#define BUTTON_USERKEY_BIT BUTTON_KEY1_BIT +#define BUTTON_TAMPER_BIT BUTTON_KEY2_BIT +#define BUTTON_WAKEUP_BIT BUTTON_KEY3_BIT + +/* Relays */ + +#define NUM_RELAYS 2 + +/* Pin selections ******************************************************************/ +/* Ethernet + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 24 PA1 MII_RX_CLK Ethernet PHY NOTE: Despite the MII labeling of these + * RMII_REF_CLK Ethernet PHY signals, the DM916AEP is actually configured + * 25 PA2 MII_MDIO Ethernet PHY to work in RMII mode. + * 48 PB11 MII_TX_EN Ethernet PHY + * 51 PB12 MII_TXD0 Ethernet PHY + * 52 PB13 MII_TXD1 Ethernet PHY + * 16 PC1 MII_MDC Ethernet PHY + * 34 PC5 MII_INT Ethernet PHY + * 55 PD8 MII_RX_DV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * 55 PD8 RMII_CRSDV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * 56 PD9 MII_RXD0 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * 57 PD10 MII_RXD1 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * + * The board desdign can support a 50MHz external clock to drive the PHY + * (U9). However, on my board, U9 is not present. + * + * 67 PA8 MCO DM9161AEP + */ + +#ifdef CONFIG_STM32_ETHMAC +# ifndef CONFIG_STM32_ETH_REMAP +# error "STM32 Ethernet requires CONFIG_STM32_ETH_REMAP" +# endif +# ifndef CONFIG_STM32_RMII +# error "STM32 Ethernet requires CONFIG_STM32_RMII" +# endif +# ifndef CONFIG_STM32_RMII_MCO +# error "STM32 Ethernet requires CONFIG_STM32_RMII_MCO" +# endif +#endif + +/* USB + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 68 PA9 USB_VBUS MINI-USB-AB. JP3 + * 69 PA10 USB_ID MINI-USB-AB. JP5 + * 70 PA11 USB_DM MINI-USB-AB + * 71 PA12 USB_DP MINI-USB-AB + * 95 PB8 USB_PWR Drives USB VBUS + */ + +/* UARTS/USARTS + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 68 PA9 USART1_TX MAX3232 to CN5. Requires CONFIG_STM32_USART1_REMAP + * 69 PA10 USART1_RX MAX3232 to CN5. Requires CONFIG_STM32_USART1_REMAP + * 86 PD5 USART2_TX MAX3232 to CN6. Requires CONFIG_STM32_USART2_REMAP + * 87 PD6 USART2_RX MAX3232 to CN6. Requires CONFIG_STM32_USART2_REMAP + * 86 PD5 485_TX Same as USART2_TX but goes to SP3485 + * 87 PD6 485_RX Save as USART2_RX but goes to SP3485 (see JP4) + */ + +#if defined(CONFIG_STM32_USART1) && !defined(CONFIG_STM32_USART1_REMAP) +# error "CONFIG_STM32_USART1 requires CONFIG_STM32_USART1_REMAP" +#endif + +#if defined(CONFIG_STM32_USART2) && !defined(CONFIG_STM32_USART2_REMAP) +# error "CONFIG_STM32_USART2 requires CONFIG_STM32_USART2_REMAP" +#endif + +/* SPI + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 30 PA5 SPI1_SCK To the SD card, SPI FLASH. + * Requires !CONFIG_STM32_SPI1_REMAP + * 31 PA6 SPI1_MISO To the SD card, SPI FLASH. + * Requires !CONFIG_STM32_SPI1_REMAP + * 32 PA7 SPI1_MOSI To the SD card, SPI FLASH. + * Requires !CONFIG_STM32_SPI1_REMAP + * 78 PC10 SPI3_SCK To TFT LCD (CN13), the NRF24L01 2.4G wireless module. + * Requires CONFIG_STM32_SPI3_REMAP. + * 79 PC11 SPI3_MISO To TFT LCD (CN13), the NRF24L01 2.4G wireless module. + * Requires CONFIG_STM32_SPI3_REMAP. + * 80 PC12 SPI3_MOSI To TFT LCD (CN13), the NRF24L01 2.4G wireless module. + * Requires CONFIG_STM32_SPI3_REMAP. + */ + +#if defined(CONFIG_STM32_SPI1) && defined(CONFIG_STM32_SPI1_REMAP) +# error "CONFIG_STM32_SPI1 must not have CONFIG_STM32_SPI1_REMAP" +#endif + +#if defined(CONFIG_STM32_SPI3) && !defined(CONFIG_STM32_SPI3_REMAP) +# error "CONFIG_STM32_SPI3 requires CONFIG_STM32_SPI3_REMAP" +#endif + +/* DAC + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 29 PA4 DAC_OUT1 To CON5(CN14) + * 30 PA5 DAC_OUT2 To CON5(CN14). JP10 + */ + +/* ADC + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 35 PB0 ADC_IN1 GPIO_ADC12_IN8. To CON5(CN14) + * 36 PB1 ADC_IN2 GPIO_ADC12_IN9. To CON5(CN14) + * 15 PC0 POTENTIO_METER GPIO_ADC12_IN10 + */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +/************************************************************************************ + * Name: stm32_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the Shenzhou board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * display is cleared by simply setting all GRAM memory to the specified color. + * + ************************************************************************************/ + +void stm32_lcdclear(uint16_t color); + +/************************************************************************************ + * Relay control functions + * + * Description: + * Non-standard functions for relay control from the Shenzhou board. + * + * NOTE: These must match the prototypes in include/nuttx/arch.h + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_RELAYS +void up_relaysinit(void); +void relays_setstat(int relays, bool stat); +bool relays_getstat(int relays); +void relays_setstats(uint32_t relays_stat); +uint32_t relays_getstats(void); +void relays_onoff(int relays, uint32_t mdelay); +void relays_onoffs(uint32_t relays_stat, uint32_t mdelay); +void relays_resetmode(int relays); +void relays_powermode(int relays); +void relays_resetmodes(uint32_t relays_stat); +void relays_powermodes(uint32_t relays_stat); +#endif + +/************************************************************************************ + * Chip ID functions + * + * Description: + * Non-standard functions to obtain chip ID information. + * + ************************************************************************************/ + +const char *stm32_getchipid(void); +const char *stm32_getchipid_string(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_CLOUDCTRL_INCLUDE_BOARD_H */ diff --git a/configs/cloudctrl/nsh/Make.defs b/configs/cloudctrl/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c4fddea57633f5e8f8000db4a52ef5c7eb6be2b4 --- /dev/null +++ b/configs/cloudctrl/nsh/Make.defs @@ -0,0 +1,119 @@ +############################################################################ +# configs/cloudctrl/nsh/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +# Pick the linker script + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-eabi-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/cloudctrl/nsh/defconfig b/configs/cloudctrl/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ed97bcc4b9dd5d77e0d127e0315385e47cf28ef8 --- /dev/null +++ b/configs/cloudctrl/nsh/defconfig @@ -0,0 +1,1395 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +CONFIG_ARCH_CHIP_STM32F107VC=y +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +CONFIG_STM32_CONNECTIVITYLINE=y +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +CONFIG_STM32_HAVE_ETHMAC=y +# CONFIG_STM32_HAVE_I2C2 is not set +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +CONFIG_STM32_BKP=y +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_OTGFS is not set +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +CONFIG_STM32_ETH_REMAP=y +# CONFIG_STM32_SPI1_REMAP is not set +CONFIG_STM32_USART2_REMAP=y +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=0 +CONFIG_STM32_PHYINIT=y +# CONFIG_STM32_MII is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=17 +CONFIG_STM32_PHYSR_ALTCONFIG=y +CONFIG_STM32_PHYSR_ALTMODE=0xf000 +CONFIG_STM32_PHYSR_10HD=0x1000 +CONFIG_STM32_PHYSR_100HD=0x4000 +CONFIG_STM32_PHYSR_10FD=0x2000 +CONFIG_STM32_PHYSR_100FD=0x8000 +# CONFIG_STM32_ETH_PTP is not set +CONFIG_STM32_RMII=y +CONFIG_STM32_RMII_MCO=y +# CONFIG_STM32_RMII_EXTCLK is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_CLOUDCTRL=y +# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set +# CONFIG_ARCH_BOARD_SHENZHOU is not set +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="cloudctrl" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=1 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +# CONFIG_RTC_DATETIME is not set +# CONFIG_RTC_HIRES is not set +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +CONFIG_ETH0_PHY_DM9161=y +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +# CONFIG_NET_UDP_READAHEAD is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +# CONFIG_HAVE_CXXINITIALIZE is not set +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/cloudctrl/nsh/setenv.sh b/configs/cloudctrl/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..143201e3bd9efc405895ca10a199afa34578764e --- /dev/null +++ b/configs/cloudctrl/nsh/setenv.sh @@ -0,0 +1,78 @@ +#!/bin/bash +# configs/cloudctrl/nsh/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the tools/ subdirectory +export TOOLS_DIR="${WD}/configs/shenzhou/tools" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:${TOOLS_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/cloudctrl/scripts/ld.script b/configs/cloudctrl/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..139b964684b9cda71ab1b1ecafebe1e94412d199 --- /dev/null +++ b/configs/cloudctrl/scripts/ld.script @@ -0,0 +1,115 @@ +/**************************************************************************** + * configs/cloudctrl/scripts/ld.script + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F107VC has 256K of FLASH beginning at address 0x0800:0000 and + * 64K of SRAM beginning at address 0x2000:0000. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F107VC has 64Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/cloudctrl/scripts/ld.script.dfu b/configs/cloudctrl/scripts/ld.script.dfu new file mode 100644 index 0000000000000000000000000000000000000000..9cab21406dbed6c9ab7ff54be83225749949b26f --- /dev/null +++ b/configs/cloudctrl/scripts/ld.script.dfu @@ -0,0 +1,117 @@ +/**************************************************************************** + * configs/cloudctrl/scripts/ld.script.dfu + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F107VC has 256K of FLASH beginning at address 0x0800:0000 and + * 64K of SRAM beginning at address 0x2000:0000. Here we assume that the + * STMicro DFU bootloader is being used. In that case, the corrct load .text + * load address is 0x08003000 (leaving 208K). + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08003000, LENGTH = 208K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F107VC has 64Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/cloudctrl/src/.gitignore b/configs/cloudctrl/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/cloudctrl/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/cloudctrl/src/Makefile b/configs/cloudctrl/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..f18f63eba3fc2cf9b02fcf23d8ad41982a2c7d68 --- /dev/null +++ b/configs/cloudctrl/src/Makefile @@ -0,0 +1,84 @@ +############################################################################ +# configs/cloudctrl/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Darcy Gong +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c stm32_chipid.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_ARCH_RELAYS),y) +CSRCS += stm32_relays.c +endif + +ifeq ($(CONFIG_STM32_OTGFS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_MTD_W25),y) +CSRCS += stm32_w25.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += stm32_usbmsc.c +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += stm32_adc.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += stm32_watchdog.c +endif + +ifeq ($(CONFIG_STM32_PHYINIT),y) +CSRCS += stm32_phyinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/cloudctrl/src/cloudctrl.h b/configs/cloudctrl/src/cloudctrl.h new file mode 100644 index 0000000000000000000000000000000000000000..44042435af10cda898c53e0ad50c074677d2d2c1 --- /dev/null +++ b/configs/cloudctrl/src/cloudctrl.h @@ -0,0 +1,282 @@ +/**************************************************************************************************** + * configs/cloudctrl/src/cloudctrl.h + * arch/arm/src/board/cloudctrl.n + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __CONFIGS_CLOUDCTRLL_SRC_CLOUDCTRL_H +#define __CONFIGS_CLOUDCTRLL_SRC_CLOUDCTRL_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include +#include + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ +/* Configuration ************************************************************************************/ +/* How many SPI modules does this chip support? */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 3 +# undef CONFIG_STM32_SPI3 +#endif + +/* cloudctrl GPIO Configuration **********************************************************************/ + +/* STM3240G-EVAL GPIOs ******************************************************************************/ +/* Ethernet + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 24 PA1 MII_RX_CLK Ethernet PHY NOTE: Despite the MII labeling of these + * RMII_REF_CLK Ethernet PHY signals, the DM916AEP is actually configured + * 25 PA2 MII_MDIO Ethernet PHY to work in RMII mode. + * 48 PB11 MII_TX_EN Ethernet PHY + * 51 PB12 MII_TXD0 Ethernet PHY + * 52 PB13 MII_TXD1 Ethernet PHY + * 16 PC1 MII_MDC Ethernet PHY + * 34 PC5 MII_INT Ethernet PHY + * 55 PD8 MII_RX_DV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * 55 PD8 RMII_CRSDV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * 56 PD9 MII_RXD0 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * 57 PD10 MII_RXD1 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * + * The board desdign can support a 50MHz external clock to drive the PHY + * (U9). However, on my board, U9 is not present. + * + * 67 PA8 MCO DM9161AEP + */ + +#ifdef CONFIG_STM32_ETHMAC +# define GPIO_MII_INT (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN5) +#endif + +/* Use MCU Pin Reset DM9161 PHY Chip */ + +#ifdef CONFIG_ETH0_PHY_DM9161 +# define GPIO_DM9161_RET (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|\ + GPIO_PORTB|GPIO_PIN15) +#endif + +/* Wireless + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + * 26 PA3 315M_VT + * 17 PC2 WIRELESS_INT + * 18 PC3 WIRELESS_CE To the NRF24L01 2.4G wireless module + * 59 PD12 WIRELESS_CS To the NRF24L01 2.4G wireless module + */ + +#define GPIO_WIRELESS_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN12) + +/* Buttons + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + * 23 PA0 WAKEUP Connected to KEY3. Active low: Closing KEY4 pulls WAKEUP to ground. + * 47 PB10 USERKEY Connected to KEY1 + * 33 PC4 TAMPER Connected to KEY2 + */ + +/* BUTTONS -- NOTE that all have EXTI interrupts configured */ + +#define MIN_IRQBUTTON BUTTON_KEY1 +#define MAX_IRQBUTTON BUTTON_KEY3 +#define NUM_IRQBUTTONS (BUTTON_KEY3 - BUTTON_KEY1 + 1) + +#define GPIO_BTN_WAKEUP (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN4) +#define GPIO_BTN_USERKEY (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTB|GPIO_PIN10) +#define GPIO_BTN_TAMPER (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0) + +/* LEDs + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + * 1 PE2 LED1 Active low: Pulled high + * 2 PE3 LED2 Active low: Pulled high + * 3 PE4 LED3 Active low: Pulled high + * 4 PE5 LED4 Active low: Pulled high + */ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN2) +#define GPIO_LED2 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3) +#define GPIO_LED3 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN4) +#define GPIO_LED4 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN5) + +/* RS-485 + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + * 88 PD7 485_DIR SP3485 read enable (not) + */ + +/* To be provided */ + +/* USB + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + * 95 PB8 USB_PWR Drives USB VBUS + */ + +#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_SPEED_100MHz|\ + GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) + +/* Audio DAC + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + */ + +/* To be provided */ + +/* SPI FLASH + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + * 96 PB9 F_CS To both the TFT LCD (CN13) and to the W25X16 SPI FLASH + */ + +#define GPIO_FLASH_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9) + + +/* Relays */ + +#define NUM_RELAYS 2 +#define GPIO_RELAYS_R00 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN0) +#define GPIO_RELAYS_R01 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN1) + +/**************************************************************************************************** + * Public Types + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +/**************************************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the STM3240G-EVAL board. + * + ****************************************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +/**************************************************************************************************** + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related GPIO pins for + * the STM3240G-EVAL board. + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_OTGFS +void weak_function stm32_usbinitialize(void); +#endif + +/**************************************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. This function will + * start a thread that will monitor for device connection/disconnection events. + * + ****************************************************************************************************/ + +#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST) +int stm32_usbhost_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires CONFIG_DISABLE_MOUNTPOINT=n + * and CONFIG_STM32_SPI1=y + * + ****************************************************************************/ + +int stm32_sdinitialize(int minor); + +/**************************************************************************** + * Name: stm32_w25initialize + * + * Description: + * Initialize and register the W25 FLASH file system. + * + ****************************************************************************/ + +#ifdef CONFIG_MTD_W25 +int stm32_w25initialize(int minor); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_CLOUDCTRLL_SRC_CLOUDCTRL_H */ diff --git a/configs/cloudctrl/src/stm32_adc.c b/configs/cloudctrl/src/stm32_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..9774efba202f08c118e65f85550303a7cfee4003 --- /dev/null +++ b/configs/cloudctrl/src/stm32_adc.c @@ -0,0 +1,174 @@ +/************************************************************************************ + * configs/cloudctrl/src/stm32_adc.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32_pwm.h" +#include "cloudctrl.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* Up to 3 ADC interfaces are supported */ + +#if STM32_NADC < 3 +# undef CONFIG_STM32_ADC3 +#endif + +#if STM32_NADC < 2 +# undef CONFIG_STM32_ADC2 +#endif + +#if STM32_NADC < 1 +# undef CONFIG_STM32_ADC1 +#endif + +#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3) +#ifndef CONFIG_STM32_ADC1 +# warning "Channel information only available for ADC1" +#endif + +/* The number of ADC channels in the conversion list */ + +#define ADC1_NCHANNELS 1 + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/* Identifying number of each ADC channel. The only internal signal for ADC testing + * is the potentiometer input: + * + * ADC1_IN10(PC0) Potentiometer + * + * External signals are also available on CON5 CN14: + * + * ADC_IN8 (PB0) CON5 CN14 Pin2 + * ADC_IN9 (PB1) CON5 CN14 Pin1 + */ + +#ifdef CONFIG_STM32_ADC1 +static const uint8_t g_chanlist[ADC1_NCHANNELS] = {10}; //{10, 8, 9}; + +/* Configurations of pins used by each ADC channel */ + +static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC12_IN10}; //{GPIO_ADC12_IN10, GPIO_ADC12_IN8, GPIO_ADC12_IN9}; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ +#ifdef CONFIG_STM32_ADC1 + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + int i; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Configure the pins as analog inputs for the selected channels */ + + for (i = 0; i < ADC1_NCHANNELS; i++) + { + stm32_configgpio(g_pinlist[i]); + } + + /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + + adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +#else + return -ENOSYS; +#endif +} + +#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */ +#endif /* CONFIG_ADC */ diff --git a/configs/cloudctrl/src/stm32_appinit.c b/configs/cloudctrl/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..6bd5e5a203bf41cc2887de07c32dfc35cc52eca9 --- /dev/null +++ b/configs/cloudctrl/src/stm32_appinit.c @@ -0,0 +1,145 @@ +/**************************************************************************** + * config/cloudctrl/src/stm32_appinit.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#include "stm32.h" +#include "cloudctrl.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Assume that we support everything until convinced otherwise */ + +#define HAVE_USBDEV 1 +#define HAVE_USBHOST 1 +#define HAVE_W25 1 + +/* Can't support the W25 device if it SPI1 or W25 support is not enabled */ + +#if !defined(CONFIG_STM32_SPI1) || !defined(CONFIG_MTD_W25) +# undef HAVE_W25 +#endif + +/* Can't support W25 features if mountpoints are disabled */ + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# undef HAVE_W25 +#endif + +/* Default W25 minor number */ + +#if defined(HAVE_W25) && !defined(CONFIG_NSH_W25MINOR) +# define CONFIG_NSH_W25MINOR 0 +#endif + +/* Can't support USB host or device features if USB OTG FS is not enabled */ + +#ifndef CONFIG_STM32_OTGFS +# undef HAVE_USBDEV +# undef HAVE_USBHOST +#endif + +/* Can't support USB device is USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +#endif + +/* Can't support USB host is USB host is not enabled */ + +#ifndef CONFIG_USBHOST +# undef HAVE_USBHOST +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(HAVE_USBHOST) || defined(HAVE_W25) + int ret; +#endif + + /* Initialize and register the W25 FLASH file system. */ + +#ifdef HAVE_W25 + ret = stm32_w25initialize(CONFIG_NSH_W25MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize W25 minor %d: %d\n", + CONFIG_NSH_W25MINOR, ret); + return ret; + } +#endif + + /* Initialize USB host operation. stm32_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + +#ifdef HAVE_USBHOST + ret = stm32_usbhost_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret); + return ret; + } +#endif + + return OK; +} diff --git a/configs/cloudctrl/src/stm32_autoleds.c b/configs/cloudctrl/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..752b00cccf24a289841a950a6a86a8723e21390e --- /dev/null +++ b/configs/cloudctrl/src/stm32_autoleds.c @@ -0,0 +1,410 @@ +/**************************************************************************** + * configs/cloudctrl/src/stm32_autoleds.c + * + * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "cloudctrl.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* The following definitions map the encoded LED setting to GPIO settings */ + +#define CLOUDCTRL_LED1 (1 << 0) +#define CLOUDCTRL_LED2 (1 << 1) +#define CLOUDCTRL_LED3 (1 << 2) +#define CLOUDCTRL_LED4 (1 << 3) + +#define ON_SETBITS_SHIFT (0) +#define ON_CLRBITS_SHIFT (4) +#define OFF_SETBITS_SHIFT (8) +#define OFF_CLRBITS_SHIFT (12) + +#define ON_BITS(v) ((v) & 0xff) +#define OFF_BITS(v) (((v) >> 8) & 0x0ff) +#define SETBITS(b) ((b) & 0x0f) +#define CLRBITS(b) (((b) >> 4) & 0x0f) + +#define ON_SETBITS(v) (SETBITS(ON_BITS(v)) +#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v)) +#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v)) +#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v)) + +#define LED_STARTED_ON_SETBITS ((CLOUDCTRL_LED1) << ON_SETBITS_SHIFT) +#define LED_STARTED_ON_CLRBITS ((CLOUDCTRL_LED2|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << ON_CLRBITS_SHIFT) +#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT) +#define LED_STARTED_OFF_CLRBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED2|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_HEAPALLOCATE_ON_SETBITS ((CLOUDCTRL_LED2) << ON_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_ON_CLRBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << ON_CLRBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_SETBITS ((CLOUDCTRL_LED1) << OFF_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_CLRBITS ((CLOUDCTRL_LED2|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_IRQSENABLED_ON_SETBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED2) << ON_SETBITS_SHIFT) +#define LED_IRQSENABLED_ON_CLRBITS ((CLOUDCTRL_LED3|CLOUDCTRL_LED4) << ON_CLRBITS_SHIFT) +#define LED_IRQSENABLED_OFF_SETBITS ((CLOUDCTRL_LED2) << OFF_SETBITS_SHIFT) +#define LED_IRQSENABLED_OFF_CLRBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_STACKCREATED_ON_SETBITS ((CLOUDCTRL_LED3) << ON_SETBITS_SHIFT) +#define LED_STACKCREATED_ON_CLRBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED2|CLOUDCTRL_LED4) << ON_CLRBITS_SHIFT) +#define LED_STACKCREATED_OFF_SETBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED2) << OFF_SETBITS_SHIFT) +#define LED_STACKCREATED_OFF_CLRBITS ((CLOUDCTRL_LED3|CLOUDCTRL_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_INIRQ_ON_SETBITS ((CLOUDCTRL_LED1) << ON_SETBITS_SHIFT) +#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_INIRQ_OFF_CLRBITS ((CLOUDCTRL_LED1) << OFF_CLRBITS_SHIFT) + +#define LED_SIGNAL_ON_SETBITS ((CLOUDCTRL_LED2) << ON_SETBITS_SHIFT) +#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_SIGNAL_OFF_CLRBITS ((CLOUDCTRL_LED2) << OFF_CLRBITS_SHIFT) + +#define LED_ASSERTION_ON_SETBITS ((CLOUDCTRL_LED3) << ON_SETBITS_SHIFT) +#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_ASSERTION_OFF_CLRBITS ((CLOUDCTRL_LED3) << OFF_CLRBITS_SHIFT) + +#define LED_PANIC_ON_SETBITS ((CLOUDCTRL_LED3) << ON_SETBITS_SHIFT) +#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_PANIC_OFF_CLRBITS ((CLOUDCTRL_LED3) << OFF_CLRBITS_SHIFT) + +/************************************************************************************** + * Private Function Protototypes + **************************************************************************************/ + +/* LED State Controls */ + +static inline void led_clrbits(unsigned int clrbits); +static inline void led_setbits(unsigned int setbits); +static void led_setonoff(unsigned int bits); + +/* LED Power Management */ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint16_t g_ledbits[8] = +{ + (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | + LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS), + + (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS | + LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS), + + (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS | + LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS), + + (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS | + LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS), + + (LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS | + LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS), + + (LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS | + LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS), + + (LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS | + LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS), + + (LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS | + LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS) +}; + +#ifdef CONFIG_PM +static struct pm_callback_s g_ledscb = +{ + .notify = led_pm_notify, + .prepare = led_pm_prepare, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_clrbits + * + * Description: + * Clear all LEDs to the bit encoded state + * + ****************************************************************************/ + +static inline void led_clrbits(unsigned int clrbits) +{ + /* All LEDs are pulled up and, hence, active low */ + + if ((clrbits & CLOUDCTRL_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, true); + } + + if ((clrbits & CLOUDCTRL_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, true); + } + + if ((clrbits & CLOUDCTRL_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, true); + } + + if ((clrbits & CLOUDCTRL_LED4) != 0) + { + stm32_gpiowrite(GPIO_LED4, true); + } + +} + +/**************************************************************************** + * Name: led_setbits + * + * Description: + * Set all LEDs to the bit encoded state + * + ****************************************************************************/ + +static inline void led_setbits(unsigned int setbits) +{ + /* All LEDs are pulled up and, hence, active low */ + + if ((setbits & CLOUDCTRL_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, false); + } + + if ((setbits & CLOUDCTRL_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, false); + } + + if ((setbits & CLOUDCTRL_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, false); + } + + if ((setbits & CLOUDCTRL_LED4) != 0) + { + stm32_gpiowrite(GPIO_LED4, false); + } + +} + +/**************************************************************************** + * Name: led_setonoff + * + * Description: + * Set/clear all LEDs to the bit encoded state + * + ****************************************************************************/ + +static void led_setonoff(unsigned int bits) +{ + led_clrbits(CLRBITS(bits)); + led_setbits(SETBITS(bits)); +} + +/**************************************************************************** + * Name: led_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + switch (pmstate) + { + case(PM_NORMAL): + { + /* Restore normal LEDs operation */ + + } + break; + + case(PM_IDLE): + { + /* Entering IDLE mode - Turn leds off */ + + } + break; + + case(PM_STANDBY): + { + /* Entering STANDBY mode - Logic for PM_STANDBY goes here */ + + } + break; + + case(PM_SLEEP): + { + /* Entering SLEEP mode - Logic for PM_SLEEP goes here */ + + } + break; + + default: + { + /* Should not get here */ + + } + break; + } +} +#endif + +/**************************************************************************** + * Name: led_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* No preparation to change power modes is required by the LEDs driver. + * We always accept the state change by returning OK. + */ + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_setonoff(ON_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_setonoff(OFF_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: up_ledpminitialize + ****************************************************************************/ + +#ifdef CONFIG_PM +void up_ledpminitialize(void) +{ + /* Register to receive power management callbacks */ + + int ret = pm_register(&g_ledscb); + if (ret != OK) + { + board_autoled_on(LED_ASSERTION); + } +} +#endif /* CONFIG_PM */ + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/cloudctrl/src/stm32_boot.c b/configs/cloudctrl/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..63d250c4cc976c7d72ded97b8a0d1e463ad062a9 --- /dev/null +++ b/configs/cloudctrl/src/stm32_boot.c @@ -0,0 +1,103 @@ +/************************************************************************************ + * configs/cloudctrl/src/stm32_boot.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "cloudctrl.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI3) + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB) + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/cloudctrl/src/stm32_buttons.c b/configs/cloudctrl/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..43a090b05b22ef16c15e0c0a6b8d866a9be36dbe --- /dev/null +++ b/configs/cloudctrl/src/stm32_buttons.c @@ -0,0 +1,175 @@ +/**************************************************************************** + * configs/cloudctrl/src/stm32_buttons.c + * + * Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "cloudctrl.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each cloudctrl button. This array is indexed by + * the BUTTON_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_USERKEY, GPIO_BTN_TAMPER, GPIO_BTN_WAKEUP +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state of + * all buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for some pins but NOT used in this file + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed for most keys. The exception + * is the WAKEUP button. + */ + + bool released = stm32_gpioread(g_buttons[i]); + if (i == BUTTON_WAKEUP) + { + released = !released; + } + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/**************************************************************************** + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state of + * all buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the + * BUTTON_*_BIT and JOYSTICK_*_BIT definitions in board.h for the meaning + * of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See + * the + * BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of + * enumeration value. The previous interrupt handler address is returned + * (so that it may restored, if so desired). + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/cloudctrl/src/stm32_chipid.c b/configs/cloudctrl/src/stm32_chipid.c new file mode 100644 index 0000000000000000000000000000000000000000..957804c8d77cca16765cc79a1bdfb42f164fe93d --- /dev/null +++ b/configs/cloudctrl/src/stm32_chipid.c @@ -0,0 +1,92 @@ +/************************************************************************************ + * configs/cloudctrl/src/stm32_chipid.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +const char *stm32_getchipid(void) +{ + static char cpuid[12]; + int i; + + for (i = 0; i < 12; i++) + { + cpuid[i] = getreg8(0x1ffff7e8+i); + } + + return cpuid; +} + +const char *stm32_getchipid_string(void) +{ + static char cpuid[27]; + int c; + int i; + + for (i = 0, c = 0; i < 12; i++) + { + sprintf(&cpuid[c], "%02X", getreg8(0x1ffff7e8+11-i)); + c += 2; + if (i % 4 == 3) + { + cpuid[c++] = '-'; + } + } + + cpuid[26] = '\0'; + return cpuid; +} diff --git a/configs/cloudctrl/src/stm32_phyinit.c b/configs/cloudctrl/src/stm32_phyinit.c new file mode 100644 index 0000000000000000000000000000000000000000..67ae65652d56cae3c655be9b4571cce13e739040 --- /dev/null +++ b/configs/cloudctrl/src/stm32_phyinit.c @@ -0,0 +1,70 @@ +/************************************************************************************ + * configs/cloudctrl/src/stm32_phyinit.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include "stm32_gpio.h" +#include "stm32_eth.h" + +#include "cloudctrl.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#if defined(CONFIG_ETH0_PHY_DM9161) && defined(CONFIG_STM32_PHYINIT) +int stm32_phy_boardinitialize(int intf) +{ + /* Configure the DM9161 PHY reset pin and take it out of reset */ + + stm32_configgpio(GPIO_DM9161_RET); + stm32_gpiowrite(GPIO_DM9161_RET, true); + return 0; +} +#endif + diff --git a/configs/cloudctrl/src/stm32_relays.c b/configs/cloudctrl/src/stm32_relays.c new file mode 100644 index 0000000000000000000000000000000000000000..b0da0f8976ab71c90d844fcb16bf3e7e8f386b2e --- /dev/null +++ b/configs/cloudctrl/src/stm32_relays.c @@ -0,0 +1,287 @@ +/**************************************************************************** + * configs/cloudctrl/src/stm32_relays.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "cloudctrl.h" + +#ifdef CONFIG_ARCH_RELAYS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define RELAYS_MIN_RESET_TIME 5 +#define RELAYS_RESET_MTIME 5 +#define RELAYS_POWER_MTIME 50 + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static uint32_t g_relays_stat = 0; +static bool g_relays_init = false; + +static const uint16_t g_relays[NUM_RELAYS] = +{ + GPIO_RELAYS_R00 +#ifdef GPIO_RELAYS_R01 + , GPIO_RELAYS_R01 +#endif +#ifdef GPIO_RELAYS_R02 + , GPIO_RELAYS_R02 +#endif +#ifdef GPIO_RELAYS_R03 + , GPIO_RELAYS_R03 +#endif +#ifdef GPIO_RELAYS_R04 + , GPIO_RELAYS_R04 +#endif +#ifdef GPIO_RELAYS_R05 + , GPIO_RELAYS_R05 +#endif +#ifdef GPIO_RELAYS_R06 + , GPIO_RELAYS_R06 +#endif +#ifdef GPIO_RELAYS_R07 + , GPIO_RELAYS_R07 +#endif +#ifdef GPIO_RELAYS_R08 + , GPIO_RELAYS_R08 +#endif +#ifdef GPIO_RELAYS_R09 + , GPIO_RELAYS_R09 +#endif +#ifdef GPIO_RELAYS_R10 + , GPIO_RELAYS_R10 +#endif +#ifdef GPIO_RELAYS_R11 + , GPIO_RELAYS_R11 +#endif +#ifdef GPIO_RELAYS_R12 + , GPIO_RELAYS_R12 +#endif +#ifdef GPIO_RELAYS_R13 + , GPIO_RELAYS_R13 +#endif +#ifdef GPIO_RELAYS_R14 + , GPIO_RELAYS_R14 +#endif +#ifdef GPIO_RELAYS_R15 + , GPIO_RELAYS_R15 +#endif +#ifdef GPIO_RELAYS_R16 + , GPIO_RELAYS_R16 +#endif +#ifdef GPIO_RELAYS_R17 + , GPIO_RELAYS_R17 +#endif +#ifdef GPIO_RELAYS_R18 + , GPIO_RELAYS_R18 +#endif +#ifdef GPIO_RELAYS_R19 + , GPIO_RELAYS_R19 +#endif +#ifdef GPIO_RELAYS_R20 + , GPIO_RELAYS_R20 +#endif +#ifdef GPIO_RELAYS_R21 + , GPIO_RELAYS_R21 +#endif +#ifdef GPIO_RELAYS_R22 + , GPIO_RELAYS_R22 +#endif +#ifdef GPIO_RELAYS_R23 + , GPIO_RELAYS_R23 +#endif +#ifdef GPIO_RELAYS_R24 + , GPIO_RELAYS_R24 +#endif +#ifdef GPIO_RELAYS_R25 + , GPIO_RELAYS_R25 +#endif +#ifdef GPIO_RELAYS_R26 + , GPIO_RELAYS_R26 +#endif +#ifdef GPIO_RELAYS_R27 + , GPIO_RELAYS_R27 +#endif +#ifdef GPIO_RELAYS_R28 + , GPIO_RELAYS_R28 +#endif +#ifdef GPIO_RELAYS_R29 + , GPIO_RELAYS_R29 +#endif +#ifdef GPIO_RELAYS_R30 + , GPIO_RELAYS_R30 +#endif +#ifdef GPIO_RELAYS_R31 + , GPIO_RELAYS_R31 +#endif +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void up_relaysinit(void) +{ + int i; + + if (g_relays_init) + { + return; + } + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for some pins but NOT used in this file + */ + + for (i = 0; i < NUM_RELAYS; i++) + { + stm32_configgpio(g_relays[i]); + stm32_gpiowrite(g_relays[i], false); + } + + g_relays_init = true; +} + +void relays_setstat(int relays,bool stat) +{ + if ((unsigned)relays < NUM_RELAYS) + { + stm32_gpiowrite(g_relays[relays], stat); + if (!stat) + { + g_relays_stat &= ~(1 << relays); + } + else + { + g_relays_stat |= (1 << relays); + } + } +} + +bool relays_getstat(int relays) +{ + if ((unsigned)relays < NUM_RELAYS) + { + return (g_relays_stat & (1 << relays)) != 0; + } + + return false; +} + +void relays_setstats(uint32_t relays_stat) +{ + int i; + + for (i = 0; i < NUM_RELAYS; i++) + { + relays_setstat(i, (relays_stat & (1<0) + { + if (relays_getstat(relays)) + { + relays_setstat(relays, false); + usleep(RELAYS_MIN_RESET_TIME*1000*1000); + } + + relays_setstat(relays,true); + usleep(mdelay*100*1000); + relays_setstat(relays, false); + } + } +} + +void relays_onoffs(uint32_t relays_stat, uint32_t mdelay) +{ + int i; + + for (i = 0; i < NUM_RELAYS; i++) + { + relays_onoff(i, mdelay); + } +} + +void relays_resetmode(int relays) +{ + relays_onoff(relays, RELAYS_RESET_MTIME); +} + +void relays_powermode(int relays) +{ + relays_onoff(relays, RELAYS_POWER_MTIME); +} + +void relays_resetmodes(uint32_t relays_stat) +{ + relays_onoffs(relays_stat, RELAYS_RESET_MTIME); +} + +void relays_powermodes(uint32_t relays_stat) +{ + relays_onoffs(relays_stat, RELAYS_POWER_MTIME); +} + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/cloudctrl/src/stm32_spi.c b/configs/cloudctrl/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..6cabaff272713a069db480c621ae1823f298218b --- /dev/null +++ b/configs/cloudctrl/src/stm32_spi.c @@ -0,0 +1,176 @@ +/************************************************************************************ + * configs/cloudctrl/src/stm32_spi.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "cloudctrl.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_SPI +#endif + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the cloudctrl board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ + /* NOTE: Clocking for SPI1 and/or SPI3 was already provided in stm32_rcc.c. + * Configurations of SPI pins is performed in stm32_spi.c. + * Here, we only initialize chip select pins unique to the board + * architecture. + */ + + /* SPI1 connects to the SD CARD and to the SPI FLASH */ + +#ifdef CONFIG_STM32_SPI1 + stm32_configgpio(GPIO_FLASH_CS); /* FLASH chip select */ +#endif + + /* SPI3 connects to TFT LCD module and the RF24L01 2.4G wireless module */ + +#ifdef CONFIG_STM32_SPI3 + +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + /* SPI1 connects to the SD CARD and to the SPI FLASH */ + + if (devid == SPIDEV_FLASH) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_FLASH_CS, !selected); + } +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI3 */ diff --git a/configs/cloudctrl/src/stm32_usb.c b/configs/cloudctrl/src/stm32_usb.c new file mode 100644 index 0000000000000000000000000000000000000000..10ecdec7ca1fa0664976e95a72902a1da132fbdc --- /dev/null +++ b/configs/cloudctrl/src/stm32_usb.c @@ -0,0 +1,311 @@ +/************************************************************************************ + * configs/cloudctrl/src/stm32_usb.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm32_otgfs.h" +#include "cloudctrl.h" + +#ifdef CONFIG_STM32_OTGFS + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST) +# define HAVE_USB 1 +#else +# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST" +# undef HAVE_USB +#endif + +#ifndef CONFIG_USBHOST_DEFPRIO +# define CONFIG_USBHOST_DEFPRIO 50 +#endif + +#ifndef CONFIG_USBHOST_STACKSIZE +# ifdef CONFIG_USBHOST_HUB +# define CONFIG_USBHOST_STACKSIZE 1536 +# else +# define CONFIG_USBHOST_STACKSIZE 1024 +# endif +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static struct usbhost_connection_s *g_usbconn; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: usbhost_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static int usbhost_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + uvdbg("Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + uvdbg("%s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the STM3240G-EVAL board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + /* The OTG FS has an internal soft pull-up. No GPIO configuration is required */ + + /* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */ + +#ifdef CONFIG_STM32_OTGFS + stm32_configgpio(GPIO_OTGFS_VBUS); + stm32_configgpio(GPIO_OTGFS_PWRON); + stm32_configgpio(GPIO_OTGFS_OVER); +#endif +} + +/*********************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +int stm32_usbhost_initialize(void) +{ + int pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + uvdbg("Register class drivers\n"); + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB mass storage class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the mass storage class\n"); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the CDC/ACM serial class\n"); + } +#endif + + /* Then get an instance of the USB host interface */ + + uvdbg("Initialize USB host\n"); + g_usbconn = stm32_otgfshost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + uvdbg("Start usbhost_waiter\n"); + + pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO, + CONFIG_USBHOST_STACKSIZE, + (main_t)usbhost_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + + return -ENODEV; +} +#endif + +/*********************************************************************************** + * Name: stm32_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be provided be + * each platform that implements the STM32 OTG FS host interface + * + * "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump + * or, if 5 V are available on the application board, a basic power switch, must + * be added externally to drive the 5 V VBUS line. The external charge pump can + * be driven by any GPIO output. When the application decides to power on VBUS + * using the chosen GPIO, it must also set the port power bit in the host port + * control and status register (PPWR bit in OTG_FS_HPRT). + * + * "The application uses this field to control power to this port, and the core + * clears this bit on an overcurrent condition." + * + * Input Parameters: + * iface - For future growth to handle multiple USB host interface. Should be zero. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +void stm32_usbhost_vbusdrive(int iface, bool enable) +{ + DEBUGASSERT(iface == 0); + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, false); + } + else + { + /* Disable the Power Switch by driving the enable pin high */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, true); + } +} +#endif + +/************************************************************************************ + * Name: stm32_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent condition is + * detected. + * + * Input Parameter: + * handler - New overcurrent interrupt handler + * + * Returned value: + * Old overcurrent interrupt handler + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +xcpt_t stm32_setup_overcurrent(xcpt_t handler) +{ + return NULL; +} +#endif + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} +#endif + +#endif /* CONFIG_STM32_OTGFS */ + + + diff --git a/configs/cloudctrl/src/stm32_usbmsc.c b/configs/cloudctrl/src/stm32_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..086432c233bf7c43b47b3ff8183fefed616612dd --- /dev/null +++ b/configs/cloudctrl/src/stm32_usbmsc.c @@ -0,0 +1,86 @@ +/**************************************************************************** + * configs/cloudctrl/src/stm32_usbmsc.c + * + * Copyright (C) 2012, 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Configure and register the STM32 SPI-based MMC/SD block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "stm32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization of the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* If system/usbmsc is built as an NSH command, then SD slot should + * already have been initized in board_app_initialize() (see stm32_appinit.c). + * In this case, there is nothing further to be done here. + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS + return stm32_sdinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1); +#else + return OK; +#endif +} diff --git a/configs/cloudctrl/src/stm32_userleds.c b/configs/cloudctrl/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..aadc2ac6db4d9c259ca4b8cc6bbfcf288614d1c6 --- /dev/null +++ b/configs/cloudctrl/src/stm32_userleds.c @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/cloudctrl/src/stm32_userleds.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "cloudctrl.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* This array maps an LED number to GPIO pin configuration */ + +static uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4 +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1-3 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + stm32_gpiowrite(g_ledcfg[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0); + stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0); + stm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) == 0); + stm32_gpiowrite(GPIO_LED4, (ledset & BOARD_LED4_BIT) == 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/cloudctrl/src/stm32_w25.c b/configs/cloudctrl/src/stm32_w25.c new file mode 100644 index 0000000000000000000000000000000000000000..da059d35b967e51a550cba94924910f7817aee0b --- /dev/null +++ b/configs/cloudctrl/src/stm32_w25.c @@ -0,0 +1,154 @@ +/**************************************************************************** + * config/cloudctrl/src/stm32_w25.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#ifdef CONFIG_STM32_SPI1 +# include +# include +# include +#endif + +#include "stm32_spi.h" +#include "cloudctrl.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ +/* Can't support the W25 device if it SPI1 or W25 support is not enabled */ + +#define HAVE_W25 1 +#if !defined(CONFIG_STM32_SPI1) || !defined(CONFIG_MTD_W25) +# undef HAVE_W25 +#endif + +/* Can't support W25 features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef HAVE_W25 +#endif + +/* Can't support both FAT and NXFFS */ + +#if defined(CONFIG_FS_FAT) && defined(CONFIG_FS_NXFFS) +# warning "Can't support both FAT and NXFFS -- using FAT" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_w25initialize + * + * Description: + * Initialize and register the W25 FLASH file system. + * + ****************************************************************************/ + +int stm32_w25initialize(int minor) +{ +#ifdef HAVE_W25 + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; +#ifdef CONFIG_FS_NXFFS + char devname[12]; +#endif + int ret; + + /* Get the SPI port */ + + spi = stm32_spibus_initialize(1); + if (!spi) + { + fdbg("ERROR: Failed to initialize SPI port 2\n"); + return -ENODEV; + } + + /* Now bind the SPI interface to the W25 SPI FLASH driver */ + + mtd = w25_initialize(spi); + if (!mtd) + { + fdbg("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n"); + return -ENODEV; + } + +#ifndef CONFIG_FS_NXFFS + /* And finally, use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(minor, mtd); + if (ret < 0) + { + fdbg("ERROR: Initialize the FTL layer\n"); + return ret; + } +#else + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", -ret); + return ret; + } + + /* Mount the file system at /mnt/w25 */ + + snprintf(devname, 12, "/mnt/w25%c", 'a' + minor); + ret = mount(NULL, devname, "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif +#endif + return OK; +} diff --git a/configs/cloudctrl/src/stm32_watchdog.c b/configs/cloudctrl/src/stm32_watchdog.c new file mode 100644 index 0000000000000000000000000000000000000000..0497c9aa026363ca6a0eb154013f1dfea6c2bb88 --- /dev/null +++ b/configs/cloudctrl/src/stm32_watchdog.c @@ -0,0 +1,136 @@ +/************************************************************************************ + * configs/cloudctrl/src/stm32_watchdog.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Wathdog hardware should be enabled */ + +#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG) +# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_STM32_WDG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0" +# endif +#endif + +/* Use the un-calibrated LSI frequency if we have nothing better */ + +#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ) +# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecuture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ + /* Initialize tha register the watchdog timer device */ + +#if defined(CONFIG_STM32_WWDG) + stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH); + return OK; +#elif defined(CONFIG_STM32_IWDG) + stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ); + return OK; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/cloudctrl/tools/olimex-arm-usb-ocd.cfg b/configs/cloudctrl/tools/olimex-arm-usb-ocd.cfg new file mode 100644 index 0000000000000000000000000000000000000000..d9ff2e51540cccc9d18e881f07bc2f0cce30375e --- /dev/null +++ b/configs/cloudctrl/tools/olimex-arm-usb-ocd.cfg @@ -0,0 +1,11 @@ +# +# Olimex ARM-USB-OCD +# +# http://www.olimex.com/dev/arm-usb-ocd.html +# + +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG" +ft2232_layout "olimex-jtag" +ft2232_vid_pid 0x15BA 0x0003 + diff --git a/configs/cloudctrl/tools/oocd.sh b/configs/cloudctrl/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..259156e319d484e8e5fe2984dff527ae529a84b9 --- /dev/null +++ b/configs/cloudctrl/tools/oocd.sh @@ -0,0 +1,92 @@ +#!/bin/sh + +# Get command line parameters + +USAGE="USAGE: $0 [-dh] " +ADVICE="Try '$0 -h' for more information" + +unset DEBUG + +while [ ! -z "$1" ]; do + case $1 in + -d ) + set -x + DEBUG=-d3 + ;; + -h ) + echo "$0 is a tool for generation of proper version files for the NuttX build" + echo "" + echo $USAGE + echo "" + echo "Where:" + echo " -d" + echo " Enable script debug" + echo " -h" + echo " show this help message and exit" + echo " Use the OpenOCD 0.4.0" + echo " " + echo " The full path to the top-level NuttX directory" + exit 0 + ;; + * ) + break; + ;; + esac + shift +done + +TOPDIR=$1 +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + echo $ADVICE + exit 1 +fi + +# This script *probably* only works with the following versions of OpenOCD: + +# Local search directory and configurations + +OPENOCD_SEARCHDIR="${TOPDIR}/configs/shenzhou/tools" +OPENOCD_WSEARCHDIR="`cygpath -w ${OPENOCD_SEARCHDIR}`" + +OPENOCD_PATH="/cygdrive/c/Program Files (x86)/OpenOCD/0.4.0/bin" +OPENOCD_EXE=openocd.exe +OPENOCD_INTERFACE="olimex-arm-usb-ocd.cfg" + + +OPENOCD_TARGET="stm32.cfg" +OPENOCD_ARGS="${DEBUG} -s ${OPENOCD_WSEARCHDIR} -f ${OPENOCD_INTERFACE} -f ${OPENOCD_TARGET}" + +echo "Trying OpenOCD 0.4.0 path: ${OPENOCD_PATH}/${OPENOCD_EXE}" + +# Verify that everything is what it claims it is and is located where it claims it is. + +if [ ! -x "${OPENOCD_PATH}/${OPENOCD_EXE}" ]; then + echo "OpenOCD executable does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f "${OPENOCD_SEARCHDIR}/${OPENOCD_TARGET}" ]; then + echo "OpenOCD target config file does not exist: ${OPENOCD_SEARCHDIR}/${OPENOCD_TARGET}" + exit 1 +fi +if [ ! -f "${OPENOCD_SEARCHDIR}/${OPENOCD_INTERFACE}" ]; then + echo "OpenOCD interface config file does not exist: ${OPENOCD_SEARCHDIR}/${OPENOCD_INTERFACE}" + exit 1 +fi + +# Enable debug if so requested + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +# Okay... do it! + +echo "Starting OpenOCD" +"${OPENOCD_PATH}/${OPENOCD_EXE}" ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" + diff --git a/configs/cloudctrl/tools/stm32.cfg b/configs/cloudctrl/tools/stm32.cfg new file mode 100644 index 0000000000000000000000000000000000000000..463a85cfd2ba9f8503007f96fbdd5248f957752a --- /dev/null +++ b/configs/cloudctrl/tools/stm32.cfg @@ -0,0 +1,69 @@ +# script for stm32 + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME stm32 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +# Work-area is a space in RAM used for flash programming +# By default use 16kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x4000 +} + +# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz +jtag_khz 1000 + +jtag_nsrst_delay 100 +jtag_ntrst_delay 100 + +#jtag scan chain +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + # See STM Document RM0008 + # Section 26.6.3 + set _CPUTAPID 0x3ba00477 +} +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +if { [info exists BSTAPID ] } { + # FIXME this never gets used to override defaults... + set _BSTAPID $BSTAPID +} else { + # See STM Document RM0008 + # Section 29.6.2 + # Low density devices, Rev A + set _BSTAPID1 0x06412041 + # Medium density devices, Rev A + set _BSTAPID2 0x06410041 + # Medium density devices, Rev B and Rev Z + set _BSTAPID3 0x16410041 + # High density devices, Rev A + set _BSTAPID4 0x06414041 + # Connectivity line devices, Rev A and Rev Z + set _BSTAPID5 0x06418041 +} +jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \ + -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \ + -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME + +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME + +# For more information about the configuration files, take a look at: +# openocd.texi diff --git a/configs/cloudctrl/tools/usb-driver.txt b/configs/cloudctrl/tools/usb-driver.txt new file mode 100644 index 0000000000000000000000000000000000000000..83d7598a5569e5b386da7281f201cfa2f6441ed7 --- /dev/null +++ b/configs/cloudctrl/tools/usb-driver.txt @@ -0,0 +1,25 @@ +https://www.olimex.com/dev/pdf/ARM/JTAG/Repair%20Procedure%20for%20OpenOcd-Rev.%20G%20drivers.pdf + +Repair procedure for ARM-USB-OCD drivers + +1. Uninstalling ARM-USB-OCD drivers +------------------------------------- +1.1. Connect your programmer/debugger to your computer, open Device Manager + and uninstall the drivers for ARM-USB-OCD. +1.2. After you have uninstalled ARM-USB-TINY driver from Device Manager, + disconnect the programmer from your computer. +1.3. Now you should download FTClean.exe from here: + http://www.ftdichip.com/Support/Utilities/FTClean.zip. +1.4. After download is complete extract the "*.zip" file, open folder FTClean, + and run FTClean.exe +1.5. Ror VID (Hex) select "Other". And after that fill the first box with 15ba + and "PID (Hex)" with 0004. +1.6. Press "Clean System" button. Make sure that all FTDI devices are + disconnected. (My require administrator privileges). + +2. Re-installing the ARM-USB-OCD driver +--------------------------------------- +2.1 Connect the programmer/debugger to the computer. +2.2 When prompted, browse to the C:\gccfd\DRIVERS\ARM-USB-OCD-DRIVER + directory and install. (A different driver is required for OpenOCD + 0.4.0. That driver is available from the olimex.com web site). diff --git a/configs/compal_e86/Kconfig b/configs/compal_e86/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/compal_e86/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/compal_e86/README.txt b/configs/compal_e86/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..704f2b6b70ef163f238b2b7cd0dee80274fc642c --- /dev/null +++ b/configs/compal_e86/README.txt @@ -0,0 +1,70 @@ +compal_e86 +========== + +This directory contains the board support for compal e86 phones. This port +is tested on the following phone: + +* motorola c139 (compal e86) with flash configuration + +This port is based on patches contributed by Denis Carikli for both the +compal e99 and e88. At the time of initial check-in, the following phones +were tested: + +* motorolla c155 (compal e99) with the compalram and highram configuration +* motorolla W220 (compal e88) +* The openmoko freerunner baseband(compal e88) + +The patches were made by Alan Carvalho de Assis and Denis Carikli using +the Stefan Richter's patches that can be found here: + +http://cgit.osmocom.org/cgit/nuttx-bb/log/?h=lputt%2Ftesting + +Osmocom-BB Dependencies and Sercomm +=================================== + +The build environment assumes that you have the osmocom-bb project +directory at same level as the nuttx project: + + |- nuttx + |- apps + `- osmocom-bb + +If you attempt to build this configuration without osmocom-bb, and that +you added support for sercomm in your configuration(CONFIG_SERCOMM_CONSOLE=y) +you will get compilation errors in drivers/sercomm due to header files that +are needed from the osmocom-bb directory. + +By default, NuttX will not use sercomm (HDLC protocol) to communicate with +the host system. Sercomm is the transport used by osmocom-bb that runs on top +of serial. See http://bb.osmocom.org/trac/wiki/nuttx-bb/run for detailed +the usage of nuttx with sercomm. + +Running NuttX From Flash +======================== + +Flash layout: + +0x00000 - 0x02000 - original compal loader +0x02000 - 0x10000 - simple binary to jump to 0x10000 (jumper.e86loader.bin) +0x10000 - ??? - NuttX binary (nuttx.bin) + +Using osmocon/osmoload, retrieve the compal loader, flash it and the +jumper.e86loader.bin as well as nuttx.bin. + +The jumper app is a modified version of the menu app in osmocom-bb, branch +jolly/menu. The app disabled irqs (setup by compal loader?) and jumps to +0x10000. This app is submitted as a patch to osmocom-bb mailing list. + +Loading NuttX (highram) +======================= + +The osmocom-bb wiki describes how to load NuttX. See +http://bb.osmocom.org/trac/wiki/nuttx-bb for detailed information. +The way that nuttx is loaded depends on the configuration (highram/compalram) +and phone: + +o compalram is for the ramloader(for phone having a bootloader on flash) +o highram is for phones having the romloader(if the phone has a bootrom) + or for loading in the ram trough a special loader(loaded first on ram + by talking to the ramloader) when having a ramloader(which can only + load 64k). diff --git a/configs/compal_e86/include/board.h b/configs/compal_e86/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..00c96bf6f5698510de7a7281df49324ad2acc928 --- /dev/null +++ b/configs/compal_e86/include/board.h @@ -0,0 +1,6 @@ +/**************************************************************************** + * configs/nsh_highram/include/board.h + * + * Supposed to be empty + * + ****************************************************************************/ diff --git a/configs/compal_e86/nsh_highram/Make.defs b/configs/compal_e86/nsh_highram/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..2ecbdabf7f2ec1280c8ae46a97926138d0ce9f72 --- /dev/null +++ b/configs/compal_e86/nsh_highram/Make.defs @@ -0,0 +1,140 @@ +############################################################################ +# configs/compal_e86/nsh_highram/Make.defs +# +# Copyright (C) 2007, 2008, 2011, 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(CONFIG_BOOT_RUNFROMFLASH),y) + LDSCRIPT = flash.ld +else + LDSCRIPT = highram.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -I "${shell cygpath -w $(OSMODIR)/src/shared/libosmocore/include}" -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -I "${shell cygpath -w $(OSMODIR)/src/shared/libosmocore/include}" -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" + +ifeq ("${CONFIG_SERCOMM_CONSOLE}","y") + OSMODIR = "${shell cygpath -w $(TOPDIR)/../../osmocom-bb}" + EXTRA_LIBS = "${shell cygpath -w $(OSMODIR)/src/target/firmware/comm/libcomm.a}" \ + "${shell cygpath -w $(OSMODIR)/src/shared/libosmocore/build-target/src/.libs/libosmocore.a}" \ + "${shell cygpath -w $(OSMODIR)/src/target/firmware/calypso/libcalypso.a}" \ + "${shell cygpath -w $(OSMODIR)/src/target/firmware/comm/libcomm.a}" +endif +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHINCLUDES = -I. -I$(OSMODIR)/src/shared/libosmocore/include -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -I$(OSMODIR)/src/shared/libosmocore/include -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) + +ifeq ("${CONFIG_SERCOMM_CONSOLE}","y") + OSMODIR = $(TOPDIR)/../../osmocom-bb + EXTRA_LIBS = $(OSMODIR)/src/target/firmware/comm/libcomm.a \ + $(OSMODIR)/src/shared/libosmocore/build-target/src/.libs/libosmocore.a \ + $(OSMODIR)/src/target/firmware/calypso/libcalypso.a \ + $(OSMODIR)/src/target/firmware/comm/libcomm.a + # ^^^ Stupid hack! Why do I have to put it twice??? +endif +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft -fno-builtin +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float -fno-builtin +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/compal_e86/nsh_highram/defconfig b/configs/compal_e86/nsh_highram/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c5dcaa04d3f13e20fb97cec163d717827659b186 --- /dev/null +++ b/configs/compal_e86/nsh_highram/defconfig @@ -0,0 +1,735 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +CONFIG_ARCH_CHIP_CALYPSO=y +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="calypso" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARM_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +CONFIG_UART_IRDA_BAUD=115200 +CONFIG_UART_IRDA_PARITY=0 +CONFIG_UART_IRDA_BITS=8 +CONFIG_UART_IRDA_2STOP=0 +CONFIG_UART_IRDA_RXBUFSIZE=256 +CONFIG_UART_IRDA_TXBUFSIZE=256 +CONFIG_UART_MODEM_BAUD=115200 +CONFIG_UART_MODEM_PARITY=0 +CONFIG_UART_MODEM_BITS=8 +CONFIG_UART_MODEM_2STOP=0 +CONFIG_UART_MODEM_RXBUFSIZE=256 +CONFIG_UART_MODEM_TXBUFSIZE=256 + +# +# Calypso Configuration Options +# + +# +# Modem UART Configuration +# +# CONFIG_UART_MODEM_HWFLOWCONTROL is not set + +# +# IrDA UART Configuration +# +# CONFIG_UART_IRDA_HWFLOWCONTROL is not set +# CONFIG_USE_SERCOMM_CONSOLE is not set +# CONFIG_SERIAL_MODEM_CONSOLE is not set +# CONFIG_SERIAL_IRDA_CONSOLE is not set +CONFIG_SERIAL_CONSOLE_NONE=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0 +CONFIG_RAM_SIZE=8650752 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_COMPALE86=y +# CONFIG_ARCH_BOARD_COMPALE88 is not set +# CONFIG_ARCH_BOARD_COMPALE99 is not set +# CONFIG_ARCH_BOARD_PIRELLI_DPL10 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="compal_e86" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_POWEROFF=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=13 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_ARCH_HAVE_OTHER_UART=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_OTHER_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=1024 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/compal_e86/nsh_highram/setenv.sh b/configs/compal_e86/nsh_highram/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3828a56504e381563a1178342b2bba3ec9b43494 --- /dev/null +++ b/configs/compal_e86/nsh_highram/setenv.sh @@ -0,0 +1,74 @@ +#!/bin/bash +# compal_e86/nsh_highram/setenv.sh +# +# Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/compal_e86/scripts/flash.ld b/configs/compal_e86/scripts/flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..73c72f00cee957189b68d35e81f732caefdaa2b0 --- /dev/null +++ b/configs/compal_e86/scripts/flash.ld @@ -0,0 +1,142 @@ +/* + * Linker script for flashed applications on the Compal E86 + * + * This script creates a binary that can be linked at 0xFFFF, starting + * with the second flash page. This is what a phone application or + * pure layer1 device uses. + * + * XXX: interrupts? + * + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +MEMORY +{ + LOADR (rx) : ORIGIN = 0x00000000, LENGTH = 0x10000 + /* 4 MBytes of external flash memory (minus loader) */ + FLASH (rx) : ORIGIN = 0x00010000, LENGTH = 0x3F0000 + /* 256 kBytes of internal zero-waitstate sram */ + IRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x040000 + /* 256 kBytes of external slow sram */ + ERAM (rw) : ORIGIN = 0x01000000, LENGTH = 0x040000 +} +SECTIONS +{ + /* entrypoint */ + .text.start : { + PROVIDE(_start = .); + KEEP(*(.text.start)) + *(.text.start) + } > FLASH + + /* exception vectors from 0x80001c to 0x800034 */ + .text.exceptions 0x80001c : { + KEEP(*(.text.exceptions)) + * (.text.exceptions) + . = ALIGN(4); + } > IRAM AT> FLASH + PROVIDE(_exceptions = LOADADDR(.text.exceptions)); + + /* code */ + .text : { + _stext = ABSOLUTE(.) ; + /* regular code */ + *(.text*) + /* gcc voodoo */ + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) + _etext = ABSOLUTE(.) ; + } > FLASH + PROVIDE(_text_start = ADDR(.text)); + PROVIDE(_text_end = ADDR(.text) + SIZEOF(.text)); + + /* constructor pointers */ + .ctors : { + /* ctor count */ + LONG(SIZEOF(.ctors) / 4 - 2) + /* ctor pointers */ + KEEP(*(SORT(.ctors))) + /* end of list */ + LONG(0) + } > FLASH + PROVIDE(_ctor_start = LOADADDR(.ctors)); + PROVIDE(_ctor_end = LOADADDR(.ctors) + SIZEOF(.ctors)); + + /* destructor pointers */ + .dtors : { + /* dtor count */ + LONG(SIZEOF(.dtors) / 4 - 2) + /* dtor pointers */ + KEEP(*(SORT(.dtors))) + /* end of list */ + LONG(0) + } > FLASH + PROVIDE(_dtor_start = LOADADDR(.dtors)); + PROVIDE(_dtor_end = LOADADDR(.dtors) + SIZEOF(.dtors)); + + /* read-only data */ + .rodata : { + *(.rodata*) + _eronly = ABSOLUTE(.) ; + } > FLASH + PROVIDE(_rodata_start = ADDR(.rodata)); + PROVIDE(_rodata_end = ADDR(.rodata) + SIZEOF(.rodata)); + + /* pic offset tables */ + .got : { + . = ALIGN(4); + *(.got) + *(.got.plt) *(.igot.plt) *(.got) *(.igot) + . = ALIGN(4); + } > FLASH + PROVIDE(_got_start = ADDR(.got)); + PROVIDE(_got_end = ADDR(.got) + SIZEOF(.got)); + + /* reserved ram */ + .compal.reservedram 0x800000 (NOLOAD) : { + . = 0xff; + } > IRAM + + /* initialized data */ + .data : AT (LOADADDR(.got) + SIZEOF(.got)) { + . = ALIGN(4); + _sdata = ABSOLUTE(.); + *(.data) + _edata = ABSOLUTE(.); + . = ALIGN(4); + } > IRAM + PROVIDE(__data_start = LOADADDR(.data)); + PROVIDE(__data_end = LOADADDR(.data) + SIZEOF(.data)); + PROVIDE(_data_start = ADDR(.data)); + PROVIDE(_data_end = ADDR(.data) + SIZEOF(.data)); + + /* ram code */ + .ramtext : AT (LOADADDR(.data) + SIZEOF(.data)) { + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + } > IRAM + PROVIDE(__ramtext_start = LOADADDR(.ramtext)); + PROVIDE(__ramtext_end = LOADADDR(.ramtext) + SIZEOF(.ramtext)); + PROVIDE(_ramtext_start = ADDR(.ramtext)); + PROVIDE(_ramtext_end = ADDR(.ramtext) + SIZEOF(.ramtext)); + + /* uninitialized data */ + .bss (NOLOAD) : { + . = ALIGN(4); + _sbss = ABSOLUTE(.); + *(.bss) + _ebss = ABSOLUTE(.); + . = ALIGN(4); + } > IRAM + PROVIDE(__bss_start = ADDR(.bss)); + PROVIDE(__bss_end = ADDR(.bss) + SIZEOF(.bss)); + PROVIDE(_bss_start = __bss_start); + PROVIDE(_bss_end = __bss_end); + + /* end of image */ + . = ALIGN(4); + _end = .; + PROVIDE(end = .); +} diff --git a/configs/compal_e86/scripts/highram.ld b/configs/compal_e86/scripts/highram.ld new file mode 100644 index 0000000000000000000000000000000000000000..429ef2b502580493dd255fd7f7b155007a4291ba --- /dev/null +++ b/configs/compal_e86/scripts/highram.ld @@ -0,0 +1,142 @@ +/* + * Linker script for running from internal SRAM on Compal phones + * + * This script is tailored specifically to the requirements imposed + * on us by the Compal bootloader. + * + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(__start) +MEMORY +{ + +/* E86 stacked flash 32mbit flash, 4mbit sram, DBB internal 256kb SRAM */ + /* 0x800000-0x87ffff */ /* bump up because we have 32mbit instead of 16mbit */ + /* compal-loaded binary: our text, initialized data */ + LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000 + TRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00040000 + /* compal-loaded binary: our unitialized data, stacks, heap */ + IRAM (rw) : ORIGIN = 0x00860000, LENGTH = 0x00020000 + +/* E88 NOR flash 16mbits, SRAM 256 kb, DBB has 256kb internal SRAM */ + /* 0x800000-0x83ffff */ + /* compal-loaded binary: our text, initialized data */ +/* + LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000 + TRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00010000 +*/ + /* compal-loaded binary: our unitialized data, stacks, heap */ +/* + IRAM (rw) : ORIGIN = 0x00830000, LENGTH = 0x00010000 +*/ +} +SECTIONS +{ + . = 0x800000; + + /* romloader data section, contains passthru interrupt vectors */ + .compal.loader (NOLOAD) : { . = 0x100; } > LRAM + + /* image signature (prepended by osmocon according to phone type) */ + .compal.header (NOLOAD) : { . = 4; } > LRAM + + /* initialization code */ + . = ALIGN(4); + .text.start : { + PROVIDE(__start = .); + KEEP(*(.text.start)) + *(.text.start) + } > TRAM + + /* exception vectors from 0x80001c to 0x800034 */ + .text.exceptions 0x80001c : AT (LOADADDR(.text.start) + SIZEOF(.text.start)) { + KEEP(*(.text.exceptions)) + * (.text.exceptions) + . = ALIGN(4); + } > LRAM + PROVIDE(_exceptions = LOADADDR(.text.exceptions)); + + /* code */ + . = ALIGN(4); + .text (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) : + AT (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) { + /* regular code */ + *(.text*) + /* always-in-ram code */ + *(.ramtext*) + /* gcc voodoo */ + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) + . = ALIGN(4); + } > TRAM + PROVIDE(_text_start = LOADADDR(.text)); + PROVIDE(_text_end = LOADADDR(.text) + SIZEOF(.text)); + + /* constructor pointers */ + .ctors : { + /* ctor count */ + LONG(SIZEOF(.ctors) / 4 - 2) + /* ctor pointers */ + KEEP(*(SORT(.ctors))) + /* end of list */ + LONG(0) + } > TRAM + PROVIDE(_ctor_start = LOADADDR(.ctors)); + PROVIDE(_ctor_end = LOADADDR(.ctors) + SIZEOF(.ctors)); + + /* destructor pointers */ + .dtors : { + /* dtor count */ + LONG(SIZEOF(.dtors) / 4 - 2) + /* dtor pointers */ + KEEP(*(SORT(.dtors))) + /* end of list */ + LONG(0) + } > TRAM + PROVIDE(_dtor_start = LOADADDR(.dtors)); + PROVIDE(_dtor_end = LOADADDR(.dtors) + SIZEOF(.dtors)); + + /* read-only data */ + . = ALIGN(4); + .rodata : { + *(.rodata*) + } > TRAM + PROVIDE(_rodata_start = LOADADDR(.rodata)); + PROVIDE(_rodata_end = LOADADDR(.rodata) + SIZEOF(.rodata)); + + /* initialized data */ + . = ALIGN(4); + .data : { + *(.data) + } > TRAM + PROVIDE(_data_start = LOADADDR(.data)); + PROVIDE(_data_end = LOADADDR(.data) + SIZEOF(.data)); + + /* pic offset tables */ + . = ALIGN(4); + .got : { + *(.got) + *(.got.plt) *(.igot.plt) *(.got) *(.igot) + } > TRAM + PROVIDE(_got_start = LOADADDR(.got)); + PROVIDE(_got_end = LOADADDR(.got) + SIZEOF(.got)); + + /* uninitialized data */ + .bss (NOLOAD) : { + . = ALIGN(4); + __bss_start = .; + _sbss = ABSOLUTE(.); + *(.bss) + _ebss = ABSOLUTE(.); + } > IRAM + . = ALIGN(4); + __bss_end = .; + PROVIDE(_bss_start = __bss_start); + PROVIDE(_bss_end = __bss_end); + + /* end of image */ + . = ALIGN(4); + _end = .; + PROVIDE(end = .); +} diff --git a/configs/compal_e86/src/Makefile b/configs/compal_e86/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..b8f7e5dc8a3dac898e5f93e241abb36c6d60bf76 --- /dev/null +++ b/configs/compal_e86/src/Makefile @@ -0,0 +1,44 @@ +############################################################################ +# configs/compal_e86/src/Makefile +# +# Copyright (C) 2007, 2008, 2013, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Copyright (C) 2011 Stefan Richter. All rights reserved. +# Author: Stefan Richter +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = boot.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/compal_e86/src/boot.c b/configs/compal_e86/src/boot.c new file mode 100644 index 0000000000000000000000000000000000000000..32364c631e4f1c55f69d150a039fa8f391669c9f --- /dev/null +++ b/configs/compal_e86/src/boot.c @@ -0,0 +1,54 @@ +/**************************************************************************** + * configs/compal_e86/boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/* Application initialization stub for boardctl() */ + +#ifdef CONFIG_LIB_BOARDCTL +int board_app_initialize(void) +{ + return 0; +} +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/configs/compal_e88/Kconfig b/configs/compal_e88/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/compal_e88/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/compal_e88/README.txt b/configs/compal_e88/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..1dfefc74669d6f331a03652c1a6504ccbb11bafb --- /dev/null +++ b/configs/compal_e88/README.txt @@ -0,0 +1,52 @@ +compal_e88 +========== + +This directory contains the board support for compal e88 phones. + +This port is based on patches contributed by Denis Carikli for both the +compal e99 and e88. At the time of initial check-in, the following phones +were tested: + +* Motorola c155 (compal e99) with the compalram and highram configuration +* Motorola W220 (compal e88) +* The openmoko freerunner baseband(compal e88) + +The patches were made by Alan Carvalho de Assis and Denis Carikli using +the Stefan Richter's patches that can be found here: + +http://cgit.osmocom.org/cgit/nuttx-bb/log/?h=lputt%2Ftesting + +Osmocom-BB Dependencies and Sercomm +=================================== + +The build environment assumes that you have the osmocom-bb project +directory at same level as the nuttx project: + + |- nuttx + |- apps + `- osmocom-bb + +If you attempt to build this configuration without osmocom-bb, and that +you added support for sercomm in your configuration(CONFIG_SERCOMM_CONSOLE=y) +you will get compilation errors in drivers/sercomm due to header files that +are needed from the osmocom-bb directory. + +By default, NuttX will not use sercomm (HDLC protocol) to communicate with +the host system. Sercomm is the transport used by osmocom-bb that runs on top +of serial. See http://bb.osmocom.org/trac/wiki/nuttx-bb/run for detailed +the usage of nuttx with sercomm. + +Loading NuttX +============= + +The osmocom-bb wiki describes how to load NuttX. See +http://bb.osmocom.org/trac/wiki/nuttx-bb for detailed information. +The way that nuttx is loaded depends on the configuration (highram/compalram) +and phone: + +o compalram is for the ramloader(for phone having a bootloader on flash) +o highram is for phones having the romloader(if the phone has a bootrom) + or for loading in the ram trough a special loader(loaded first on ram + by talking to the ramloader) when having a ramloader(which can only + load 64k). + diff --git a/configs/compal_e88/include/board.h b/configs/compal_e88/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..5855614184f903ced3811fc4d695d505df80d09c --- /dev/null +++ b/configs/compal_e88/include/board.h @@ -0,0 +1,6 @@ +/**************************************************************************** + * arch/board.h + * + * Supposed to be empty + * + ****************************************************************************/ diff --git a/configs/compal_e88/nsh_highram/Make.defs b/configs/compal_e88/nsh_highram/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..707d08fb0c31deccbd113649bdeb6ae4c350b7c3 --- /dev/null +++ b/configs/compal_e88/nsh_highram/Make.defs @@ -0,0 +1,124 @@ +############################################################################ +# configs/compal_e88/nsh_highram/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/compal_e88/nsh_highram/defconfig b/configs/compal_e88/nsh_highram/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..8db78614871bf65c2a5f3a18f811c771e2705351 --- /dev/null +++ b/configs/compal_e88/nsh_highram/defconfig @@ -0,0 +1,735 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +CONFIG_ARCH_CHIP_CALYPSO=y +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="calypso" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARM_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +CONFIG_UART_IRDA_BAUD=115200 +CONFIG_UART_IRDA_PARITY=0 +CONFIG_UART_IRDA_BITS=8 +CONFIG_UART_IRDA_2STOP=0 +CONFIG_UART_IRDA_RXBUFSIZE=256 +CONFIG_UART_IRDA_TXBUFSIZE=256 +CONFIG_UART_MODEM_BAUD=115200 +CONFIG_UART_MODEM_PARITY=0 +CONFIG_UART_MODEM_BITS=8 +CONFIG_UART_MODEM_2STOP=0 +CONFIG_UART_MODEM_RXBUFSIZE=256 +CONFIG_UART_MODEM_TXBUFSIZE=256 + +# +# Calypso Configuration Options +# + +# +# Modem UART Configuration +# +# CONFIG_UART_MODEM_HWFLOWCONTROL is not set + +# +# IrDA UART Configuration +# +# CONFIG_UART_IRDA_HWFLOWCONTROL is not set +# CONFIG_USE_SERCOMM_CONSOLE is not set +# CONFIG_SERIAL_MODEM_CONSOLE is not set +# CONFIG_SERIAL_IRDA_CONSOLE is not set +CONFIG_SERIAL_CONSOLE_NONE=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0 +CONFIG_RAM_SIZE=8650752 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_COMPALE86 is not set +CONFIG_ARCH_BOARD_COMPALE88=y +# CONFIG_ARCH_BOARD_COMPALE99 is not set +# CONFIG_ARCH_BOARD_PIRELLI_DPL10 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="compal_e88" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_POWEROFF=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=13 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_ARCH_HAVE_OTHER_UART=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_OTHER_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/compal_e88/nsh_highram/setenv.sh b/configs/compal_e88/nsh_highram/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..0693ede0ac2b7bec0b349fdaf26d6d84bb48388c --- /dev/null +++ b/configs/compal_e88/nsh_highram/setenv.sh @@ -0,0 +1,46 @@ +#!/bin/bash +# c5471evm/nsh/setenv.sh +# +# Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +WD=`pwd` +export BUILDROOT_BIN=${WD}/../buildroot/build_arm_nofpu/staging_dir/bin +export PATH=${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/compal_e88/scripts/ld.script b/configs/compal_e88/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..35fa847284ed8c02d05d01a5f97086e817f08f69 --- /dev/null +++ b/configs/compal_e88/scripts/ld.script @@ -0,0 +1,128 @@ +/* + * Linker script for running from internal SRAM on Compal phones + * + * This script is tailored specifically to the requirements imposed + * on us by the Compal bootloader. + * + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(__start) +MEMORY +{ + /* 0x800000-0x83ffff */ + /* compal-loaded binary: our text, initialized data */ + LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000 + TRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00010000 + /* compal-loaded binary: our unitialized data, stacks, heap */ + IRAM (rw) : ORIGIN = 0x00830000, LENGTH = 0x00010000 +} +SECTIONS +{ + . = 0x800000; + + /* romloader data section, contains passthru interrupt vectors */ + .compal.loader (NOLOAD) : { . = 0x100; } > LRAM + + /* image signature (prepended by osmocon according to phone type) */ + .compal.header (NOLOAD) : { . = 4; } > LRAM + + /* initialization code */ + . = ALIGN(4); + .text.start : { + PROVIDE(__start = .); + KEEP(*(.text.start)) + *(.text.start) + } > TRAM + + /* exception vectors from 0x80001c to 0x800034 */ + .text.exceptions 0x80001c : AT (LOADADDR(.text.start) + SIZEOF(.text.start)) { + KEEP(*(.text.exceptions)) + * (.text.exceptions) + . = ALIGN(4); + } > LRAM + PROVIDE(_exceptions = LOADADDR(.text.exceptions)); + + /* code */ + . = ALIGN(4); + .text (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) : + AT (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) { + /* regular code */ + *(.text*) + /* always-in-ram code */ + *(.ramtext*) + /* gcc voodoo */ + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) + . = ALIGN(4); + } > TRAM + PROVIDE(_text_start = LOADADDR(.text)); + PROVIDE(_text_end = LOADADDR(.text) + SIZEOF(.text)); + + /* constructor pointers */ + .ctors : { + /* ctor count */ + LONG(SIZEOF(.ctors) / 4 - 2) + /* ctor pointers */ + KEEP(*(SORT(.ctors))) + /* end of list */ + LONG(0) + } > TRAM + PROVIDE(_ctor_start = LOADADDR(.ctors)); + PROVIDE(_ctor_end = LOADADDR(.ctors) + SIZEOF(.ctors)); + + /* destructor pointers */ + .dtors : { + /* dtor count */ + LONG(SIZEOF(.dtors) / 4 - 2) + /* dtor pointers */ + KEEP(*(SORT(.dtors))) + /* end of list */ + LONG(0) + } > TRAM + PROVIDE(_dtor_start = LOADADDR(.dtors)); + PROVIDE(_dtor_end = LOADADDR(.dtors) + SIZEOF(.dtors)); + + /* read-only data */ + . = ALIGN(4); + .rodata : { + *(.rodata*) + } > TRAM + PROVIDE(_rodata_start = LOADADDR(.rodata)); + PROVIDE(_rodata_end = LOADADDR(.rodata) + SIZEOF(.rodata)); + + /* initialized data */ + . = ALIGN(4); + .data : { + *(.data) + } > TRAM + PROVIDE(_data_start = LOADADDR(.data)); + PROVIDE(_data_end = LOADADDR(.data) + SIZEOF(.data)); + + /* pic offset tables */ + . = ALIGN(4); + .got : { + *(.got) + *(.got.plt) *(.igot.plt) *(.got) *(.igot) + } > TRAM + PROVIDE(_got_start = LOADADDR(.got)); + PROVIDE(_got_end = LOADADDR(.got) + SIZEOF(.got)); + + /* uninitialized data */ + .bss (NOLOAD) : { + . = ALIGN(4); + __bss_start = .; + _sbss = ABSOLUTE(.); + *(.bss) + _ebss = ABSOLUTE(.); + } > IRAM + . = ALIGN(4); + __bss_end = .; + PROVIDE(_bss_start = __bss_start); + PROVIDE(_bss_end = __bss_end); + + /* end of image */ + . = ALIGN(4); + _end = .; + PROVIDE(end = .); +} diff --git a/configs/compal_e88/src/.gitignore b/configs/compal_e88/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/compal_e88/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/compal_e88/src/Makefile b/configs/compal_e88/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..e4703f9a0a835bd1f45ef308f5627b619820033d --- /dev/null +++ b/configs/compal_e88/src/Makefile @@ -0,0 +1,44 @@ +############################################################################ +# configs/compal_e88/src/Makefile +# +# Copyright (C) 2007, 2008, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Copyright (C) 2011 Stefan Richter. All rights reserved. +# Author: Stefan Richter +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = boot.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/compal_e88/src/boot.c b/configs/compal_e88/src/boot.c new file mode 100644 index 0000000000000000000000000000000000000000..540bc39ca16b9eb7e2ab7f45e86a0574a06bf5b6 --- /dev/null +++ b/configs/compal_e88/src/boot.c @@ -0,0 +1,54 @@ +/**************************************************************************** + * configs/compal_e88/boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/* Application initialization stub for boardctl() */ + +#ifdef CONFIG_LIB_BOARDCTL +int board_app_initialize(void) +{ + return 0; +} +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/configs/compal_e99/Kconfig b/configs/compal_e99/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..e7d03fb148dff931b8a693a6a780192a594f8195 --- /dev/null +++ b/configs/compal_e99/Kconfig @@ -0,0 +1,13 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_COMPALE99 + +config COMPALE99_LCD_SSD1783 + bool "SSD1783 LCD support" + default y + select LCD + +endif diff --git a/configs/compal_e99/README.txt b/configs/compal_e99/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..646cdcf59cbcce2447ce30baa09ae035cd2f127e --- /dev/null +++ b/configs/compal_e99/README.txt @@ -0,0 +1,81 @@ +compal_e99 +========== + +This directory contains the board support for compal e99 phones. + +This port is based on patches contributed by Denis Carikli for both the +compal e99 and e88. At the time of initial check-in, the following phones +were tested: + +* Motorola c155 (compal e99) with the compalram and highram configuration +* Motorola W220 (compal e88) +* The openmoko freerunner baseband(compal e88) + +The patches were made by Alan Carvalho de Assis and Denis Carikli using +the Stefan Richter's patches that can be found here: + +http://cgit.osmocom.org/cgit/nuttx-bb/log/?h=lputt%2Ftesting + +Osmocom-BB Dependencies and Sercomm +=================================== + +The build environment assumes that you have the osmocom-bb project +directory at same level as the nuttx project: + + |- nuttx + |- apps + `- osmocom-bb + +If you attempt to build this configuration without osmocom-bb, and that +you added support for sercomm in your configuration(CONFIG_SERCOMM_CONSOLE=y) +you will get compilation errors in drivers/sercomm due to header files that +are needed from the osmocom-bb directory. + +By default, NuttX will not use sercomm (HDLC protocol) to communicate with +the host system. Sercomm is the transport used by osmocom-bb that runs on top +of serial. See http://bb.osmocom.org/trac/wiki/nuttx-bb/run for detailed +the usage of nuttx with sercomm. + +Loading NuttX +============= + +The osmocom-bb wiki describes how to load NuttX. See +http://bb.osmocom.org/trac/wiki/nuttx-bb for detailed information. +The way that nuttx is loaded depends on the configuration (highram/compalram) +and phone: + +o compalram is for the ramloader(for phone having a bootloader on flash) +o highram is for phones having the romloader(if the phone has a bootrom) + or for loading in the ram trough a special loader(loaded first on ram + by talking to the ramloader) when having a ramloader(which can only + load 64k). + +Configurations +============== + + 1. Each Compal E99 configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh compal_e99/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories under + nuttx/configs/compal_e99. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume the NuttX Buildroot toolchain + under Linux (should work under Windows with Cygwin as well). This + is easily reconfigured: + + CONFIG_HOST_LINUX=y + CONFIG_ARM_TOOLCHAIN_BUILDROOT=y diff --git a/configs/compal_e99/include/board.h b/configs/compal_e99/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..5855614184f903ced3811fc4d695d505df80d09c --- /dev/null +++ b/configs/compal_e99/include/board.h @@ -0,0 +1,6 @@ +/**************************************************************************** + * arch/board.h + * + * Supposed to be empty + * + ****************************************************************************/ diff --git a/configs/compal_e99/nsh_compalram/Make.defs b/configs/compal_e99/nsh_compalram/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..9fe718fb8934776f8e472db62def7bfea629034c --- /dev/null +++ b/configs/compal_e99/nsh_compalram/Make.defs @@ -0,0 +1,125 @@ +############################################################################ +# configs/c5471evm/nsh/Make.defs +# +# Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/compalram.ld}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/compalram.ld +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(ARCHCCMAJOR),4) +ifneq ($(HOSTOS),Cygwin) + OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment +endif +endif + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/compal_e99/nsh_compalram/defconfig b/configs/compal_e99/nsh_compalram/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..3ad08465712e2686e53e412358cb403009c75086 --- /dev/null +++ b/configs/compal_e99/nsh_compalram/defconfig @@ -0,0 +1,773 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +CONFIG_ARCH_CHIP_CALYPSO=y +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="calypso" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +CONFIG_ARM_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARM_OABI_TOOLCHAIN is not set +CONFIG_UART_IRDA_BAUD=115200 +CONFIG_UART_IRDA_PARITY=0 +CONFIG_UART_IRDA_BITS=8 +CONFIG_UART_IRDA_2STOP=0 +CONFIG_UART_IRDA_RXBUFSIZE=256 +CONFIG_UART_IRDA_TXBUFSIZE=256 +CONFIG_UART_MODEM_BAUD=115200 +CONFIG_UART_MODEM_PARITY=0 +CONFIG_UART_MODEM_BITS=8 +CONFIG_UART_MODEM_2STOP=0 +CONFIG_UART_MODEM_RXBUFSIZE=256 +CONFIG_UART_MODEM_TXBUFSIZE=256 + +# +# Calypso Configuration Options +# + +# +# Modem UART Configuration +# +# CONFIG_UART_MODEM_HWFLOWCONTROL is not set + +# +# IrDA UART Configuration +# +# CONFIG_UART_IRDA_HWFLOWCONTROL is not set +# CONFIG_USE_SERCOMM_CONSOLE is not set +# CONFIG_SERIAL_MODEM_CONSOLE is not set +# CONFIG_SERIAL_IRDA_CONSOLE is not set +CONFIG_SERIAL_CONSOLE_NONE=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0 +CONFIG_RAM_SIZE=8650752 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_COMPALE86 is not set +# CONFIG_ARCH_BOARD_COMPALE88 is not set +CONFIG_ARCH_BOARD_COMPALE99=y +# CONFIG_ARCH_BOARD_PIRELLI_DPL10 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="compal_e99" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_COMPALE99_LCD_SSD1783=y +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_POWEROFF=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=13 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_ARCH_HAVE_OTHER_UART=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_OTHER_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set +CONFIG_NX_LCDDRIVER=y + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x01000000 +CONFIG_HEAP2_SIZE=2097152 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/compal_e99/nsh_compalram/setenv.sh b/configs/compal_e99/nsh_compalram/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..16a2fe30fa842bb35b3a985e57bb4947ca1ec31f --- /dev/null +++ b/configs/compal_e99/nsh_compalram/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# c5471evm/nsh/setenv.sh +# +# Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/compal_e99/nsh_highram/Make.defs b/configs/compal_e99/nsh_highram/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..a7164120e0caa69c94c6a7cdf1cedbb992c39a86 --- /dev/null +++ b/configs/compal_e99/nsh_highram/Make.defs @@ -0,0 +1,125 @@ +############################################################################ +# configs/c5471evm/nsh/Make.defs +# +# Copyright (C) 2007, 2008, 2011, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/highram.ld}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/highram.ld +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(ARCHCCMAJOR),4) +ifneq ($(HOSTOS),Cygwin) + OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment +endif +endif + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/compal_e99/nsh_highram/defconfig b/configs/compal_e99/nsh_highram/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..cb3fa5526b7e52369f939a24bb9bc3bb7419245c --- /dev/null +++ b/configs/compal_e99/nsh_highram/defconfig @@ -0,0 +1,913 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +CONFIG_ARCH_CHIP_CALYPSO=y +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="calypso" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARM_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +CONFIG_UART_IRDA_BAUD=115200 +CONFIG_UART_IRDA_PARITY=0 +CONFIG_UART_IRDA_BITS=8 +CONFIG_UART_IRDA_2STOP=0 +CONFIG_UART_IRDA_RXBUFSIZE=256 +CONFIG_UART_IRDA_TXBUFSIZE=256 +CONFIG_UART_MODEM_BAUD=115200 +CONFIG_UART_MODEM_PARITY=0 +CONFIG_UART_MODEM_BITS=8 +CONFIG_UART_MODEM_2STOP=0 +CONFIG_UART_MODEM_RXBUFSIZE=256 +CONFIG_UART_MODEM_TXBUFSIZE=256 + +# +# Calypso Configuration Options +# + +# +# Modem UART Configuration +# +# CONFIG_UART_MODEM_HWFLOWCONTROL is not set + +# +# IrDA UART Configuration +# +# CONFIG_UART_IRDA_HWFLOWCONTROL is not set +# CONFIG_USE_SERCOMM_CONSOLE is not set +# CONFIG_SERIAL_MODEM_CONSOLE is not set +# CONFIG_SERIAL_IRDA_CONSOLE is not set +CONFIG_SERIAL_CONSOLE_NONE=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0 +CONFIG_RAM_SIZE=8650752 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_COMPALE86 is not set +# CONFIG_ARCH_BOARD_COMPALE88 is not set +CONFIG_ARCH_BOARD_COMPALE99=y +# CONFIG_ARCH_BOARD_PIRELLI_DPL10 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="compal_e99" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_COMPALE99_LCD_SSD1783=y +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_POWEROFF=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=13 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +CONFIG_LCD_NOGETRUN=y +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_ARCH_HAVE_OTHER_UART=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_OTHER_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +CONFIG_NX_WRITEONLY=y + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +CONFIG_NX_XYINPUT_NONE=y +# CONFIG_NX_XYINPUT_MOUSE is not set +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +CONFIG_NXFONT_SANS17X22=y +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x01000000 +CONFIG_HEAP2_SIZE=2097152 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +CONFIG_EXAMPLES_KEYPADTEST=y +CONFIG_EXAMPLES_KEYPAD_DEVNAME="/dev/keypad" +# CONFIG_EXAMPLES_KEYPADTEST_ENCODED is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +CONFIG_EXAMPLES_NXHELLO=y +CONFIG_EXAMPLES_NXHELLO_VPLANE=0 +CONFIG_EXAMPLES_NXHELLO_DEVNO=0 +CONFIG_EXAMPLES_NXHELLO_BPP=16 + +# +# Example Color Configuration +# +CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y + +# +# Example Font Configuration +# +CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y +# CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set +CONFIG_EXAMPLES_NXIMAGE=y +CONFIG_EXAMPLES_NXIMAGE_VPLANE=0 +CONFIG_EXAMPLES_NXIMAGE_DEVNO=0 +CONFIG_EXAMPLES_NXIMAGE_BPP=16 +CONFIG_EXAMPLES_NXIMAGE_XSCALEp5=y +CONFIG_EXAMPLES_NXIMAGE_XSCALE1p0=y +# CONFIG_EXAMPLES_NXIMAGE_XSCALE1p5 is not set +# CONFIG_EXAMPLES_NXIMAGE_XSCALE2p0 is not set +CONFIG_EXAMPLES_NXIMAGE_YSCALEp5=y +CONFIG_EXAMPLES_NXIMAGE_YSCALE1p0=y +# CONFIG_EXAMPLES_NXIMAGE_YSCALE1p5 is not set +# CONFIG_EXAMPLES_NXIMAGE_YSCALE2p0 is not set +CONFIG_EXAMPLES_NXLINES=y +CONFIG_EXAMPLES_NXLINES_VPLANE=0 +CONFIG_EXAMPLES_NXLINES_DEVNO=0 +CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NXLINES_LINEWIDTH=4 +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=2 +CONFIG_EXAMPLES_NXLINES_BPP=16 +# CONFIG_EXAMPLES_NXLINES_EXTERNINIT is not set +CONFIG_EXAMPLES_NXTEXT=y + +# +# Basic Configuration of the example +# +CONFIG_EXAMPLES_NXTEXT_VPLANE=0 +CONFIG_EXAMPLES_NXTEXT_DEVNO=0 +CONFIG_EXAMPLES_NXTEXT_BPP=16 +CONFIG_EXAMPLES_NXTEXT_BMCACHE=128 +CONFIG_EXAMPLES_NXTEXT_GLCACHE=16 + +# +# Example Color Configuration +# +CONFIG_EXAMPLES_NXTEXT_DEFAULT_COLORS=y + +# +# Example Font Configuration +# +# CONFIG_EXAMPLES_NXTEXT_DEFAULT_FONT is not set +CONFIG_EXAMPLES_NXTEXT_BGFONTID=14 +CONFIG_EXAMPLES_NXTEXT_PUFONTID=0 +# CONFIG_EXAMPLES_NXTEXT_EXTERNINIT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/compal_e99/nsh_highram/setenv.sh b/configs/compal_e99/nsh_highram/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..16a2fe30fa842bb35b3a985e57bb4947ca1ec31f --- /dev/null +++ b/configs/compal_e99/nsh_highram/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# c5471evm/nsh/setenv.sh +# +# Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/compal_e99/scripts/compalram.ld b/configs/compal_e99/scripts/compalram.ld new file mode 100644 index 0000000000000000000000000000000000000000..52554ddacbd796006bd074458c1cd7debec1e1f6 --- /dev/null +++ b/configs/compal_e99/scripts/compalram.ld @@ -0,0 +1,126 @@ +/* + * Linker script for running from internal SRAM on Compal phones + * + * This script is tailored specifically to the requirements imposed + * on us by the Compal bootloader. + * + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(__start) +MEMORY +{ + /* compal-loaded binary: our text, initialized data */ + LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000 + /* compal-loaded binary: our unitialized data, stacks, heap */ + IRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00020000 +} +SECTIONS +{ + . = 0x800000; + + /* romloader data section, contains passthru interrupt vectors */ + .compal.loader (NOLOAD) : { . = 0x100; } > LRAM + + /* image signature (prepended by osmocon according to phone type) */ + .compal.header (NOLOAD) : { . = 4; } > LRAM + + /* initialization code */ + . = ALIGN(4); + .text.start : { + PROVIDE(__start = .); + KEEP(*(.text.start)) + *(.text.start) + } > LRAM + + /* exception vectors from 0x80001c to 0x800034 */ + .text.exceptions 0x80001c : AT (LOADADDR(.text.start) + SIZEOF(.text.start)) { + KEEP(*(.text.exceptions)) + * (.text.exceptions) + . = ALIGN(4); + } > LRAM + PROVIDE(_exceptions = LOADADDR(.text.exceptions)); + + /* code */ + . = ALIGN(4); + .text (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) : + AT (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) { + /* regular code */ + *(.text*) + /* always-in-ram code */ + *(.ramtext*) + /* gcc voodoo */ + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) + . = ALIGN(4); + } > LRAM + PROVIDE(_text_start = LOADADDR(.text)); + PROVIDE(_text_end = LOADADDR(.text) + SIZEOF(.text)); + + /* constructor pointers */ + .ctors : { + /* ctor count */ + LONG(SIZEOF(.ctors) / 4 - 2) + /* ctor pointers */ + KEEP(*(SORT(.ctors))) + /* end of list */ + LONG(0) + } > LRAM + PROVIDE(_ctor_start = LOADADDR(.ctors)); + PROVIDE(_ctor_end = LOADADDR(.ctors) + SIZEOF(.ctors)); + + /* destructor pointers */ + .dtors : { + /* dtor count */ + LONG(SIZEOF(.dtors) / 4 - 2) + /* dtor pointers */ + KEEP(*(SORT(.dtors))) + /* end of list */ + LONG(0) + } > LRAM + PROVIDE(_dtor_start = LOADADDR(.dtors)); + PROVIDE(_dtor_end = LOADADDR(.dtors) + SIZEOF(.dtors)); + + /* read-only data */ + . = ALIGN(4); + .rodata : { + *(.rodata*) + } > LRAM + PROVIDE(_rodata_start = LOADADDR(.rodata)); + PROVIDE(_rodata_end = LOADADDR(.rodata) + SIZEOF(.rodata)); + + /* initialized data */ + . = ALIGN(4); + .data : { + *(.data) + } > LRAM + PROVIDE(_data_start = LOADADDR(.data)); + PROVIDE(_data_end = LOADADDR(.data) + SIZEOF(.data)); + + /* pic offset tables */ + . = ALIGN(4); + .got : { + *(.got) + *(.got.plt) *(.igot.plt) *(.got) *(.igot) + } > LRAM + PROVIDE(_got_start = LOADADDR(.got)); + PROVIDE(_got_end = LOADADDR(.got) + SIZEOF(.got)); + + /* uninitialized data */ + .bss (NOLOAD) : { + . = ALIGN(4); + __bss_start = .; + _sbss = ABSOLUTE(.); + *(.bss) + _ebss = ABSOLUTE(.); + } > IRAM + . = ALIGN(4); + __bss_end = .; + PROVIDE(_bss_start = __bss_start); + PROVIDE(_bss_end = __bss_end); + + /* end of image */ + . = ALIGN(4); + _end = .; + PROVIDE(end = .); +} diff --git a/configs/compal_e99/scripts/highram.ld b/configs/compal_e99/scripts/highram.ld new file mode 100644 index 0000000000000000000000000000000000000000..db72f251aa26cca2f27c9257ee797195715016b2 --- /dev/null +++ b/configs/compal_e99/scripts/highram.ld @@ -0,0 +1,128 @@ +/* + * Linker script for running from internal SRAM on Compal phones + * + * This script is tailored specifically to the requirements imposed + * on us by the Compal bootloader. + * + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(__start) +MEMORY +{ + /* 0x800000-0xa00000 */ + /* compal-loaded binary: our text, initialized data */ + LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000 + TRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x0001d000 + /* compal-loaded binary: our unitialized data, stacks, heap */ + IRAM (rw) : ORIGIN = 0x0083d000, LENGTH = 0x00002000 +} +SECTIONS +{ + . = 0x800000; + + /* romloader data section, contains passthru interrupt vectors */ + .compal.loader (NOLOAD) : { . = 0x100; } > LRAM + + /* image signature (prepended by osmocon according to phone type) */ + .compal.header (NOLOAD) : { . = 4; } > LRAM + + /* initialization code */ + . = ALIGN(4); + .text.start : { + PROVIDE(__start = .); + KEEP(*(.text.start)) + *(.text.start) + } > TRAM + + /* exception vectors from 0x80001c to 0x800034 */ + .text.exceptions 0x80001c : AT (LOADADDR(.text.start) + SIZEOF(.text.start)) { + KEEP(*(.text.exceptions)) + * (.text.exceptions) + . = ALIGN(4); + } > LRAM + PROVIDE(_exceptions = LOADADDR(.text.exceptions)); + + /* code */ + . = ALIGN(4); + .text (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) : + AT (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) { + /* regular code */ + *(.text*) + /* always-in-ram code */ + *(.ramtext*) + /* gcc voodoo */ + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) + . = ALIGN(4); + } > TRAM + PROVIDE(_text_start = LOADADDR(.text)); + PROVIDE(_text_end = LOADADDR(.text) + SIZEOF(.text)); + + /* constructor pointers */ + .ctors : { + /* ctor count */ + LONG(SIZEOF(.ctors) / 4 - 2) + /* ctor pointers */ + KEEP(*(SORT(.ctors))) + /* end of list */ + LONG(0) + } > TRAM + PROVIDE(_ctor_start = LOADADDR(.ctors)); + PROVIDE(_ctor_end = LOADADDR(.ctors) + SIZEOF(.ctors)); + + /* destructor pointers */ + .dtors : { + /* dtor count */ + LONG(SIZEOF(.dtors) / 4 - 2) + /* dtor pointers */ + KEEP(*(SORT(.dtors))) + /* end of list */ + LONG(0) + } > TRAM + PROVIDE(_dtor_start = LOADADDR(.dtors)); + PROVIDE(_dtor_end = LOADADDR(.dtors) + SIZEOF(.dtors)); + + /* read-only data */ + . = ALIGN(4); + .rodata : { + *(.rodata*) + } > TRAM + PROVIDE(_rodata_start = LOADADDR(.rodata)); + PROVIDE(_rodata_end = LOADADDR(.rodata) + SIZEOF(.rodata)); + + /* initialized data */ + . = ALIGN(4); + .data : { + *(.data) + } > TRAM + PROVIDE(_data_start = LOADADDR(.data)); + PROVIDE(_data_end = LOADADDR(.data) + SIZEOF(.data)); + + /* pic offset tables */ + . = ALIGN(4); + .got : { + *(.got) + *(.got.plt) *(.igot.plt) *(.got) *(.igot) + } > TRAM + PROVIDE(_got_start = LOADADDR(.got)); + PROVIDE(_got_end = LOADADDR(.got) + SIZEOF(.got)); + + /* uninitialized data */ + .bss (NOLOAD) : { + . = ALIGN(4); + __bss_start = .; + _sbss = ABSOLUTE(.); + *(.bss) + _ebss = ABSOLUTE(.); + } > IRAM + . = ALIGN(4); + __bss_end = .; + PROVIDE(_bss_start = __bss_start); + PROVIDE(_bss_end = __bss_end); + + /* end of image */ + . = ALIGN(4); + _end = .; + PROVIDE(end = .); +} diff --git a/configs/compal_e99/src/.gitignore b/configs/compal_e99/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/compal_e99/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/compal_e99/src/Makefile b/configs/compal_e99/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..c2ad1cc7769a060f256f740dc2f64982393d96b9 --- /dev/null +++ b/configs/compal_e99/src/Makefile @@ -0,0 +1,44 @@ +############################################################################ +# configs/compal_e99/src/Makefile +# +# Copyright (C) 2007, 2008, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Copyright (C) 2011 Stefan Richter. All rights reserved. +# Author: Stefan Richter +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = boot.c ssd1783.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/compal_e99/src/boot.c b/configs/compal_e99/src/boot.c new file mode 100644 index 0000000000000000000000000000000000000000..74f17a2ebdb7b1c814ec3fb1021c922858092af1 --- /dev/null +++ b/configs/compal_e99/src/boot.c @@ -0,0 +1,54 @@ +/**************************************************************************** + * configs/compal_e99/boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/* Application initialization stub for boardctl() */ + +#ifdef CONFIG_LIB_BOARDCTL +int board_app_initialize(void) +{ + return 0; +} +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/configs/compal_e99/src/ssd1783.c b/configs/compal_e99/src/ssd1783.c new file mode 100644 index 0000000000000000000000000000000000000000..c2e203d0d0784a59c4f3ccce8af0439ddc9d28d9 --- /dev/null +++ b/configs/compal_e99/src/ssd1783.c @@ -0,0 +1,545 @@ +/************************************************************************************ + * nuttx/configs/compal_e99/src/ssd1783.c + * + * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Laurent Latil + * Denis 'GNUtoo' Carikli + * Alan Carvalho de Assis + * + * This driver for SSD1783 used part of SSD1783 driver developed by + * Christian Vogel for Osmocom-BB and relicensed + * to BSD with permission from author. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "ssd1783.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Color depth and format */ + +#define LCD_BPP 16 +#define LCD_COLORFMT FB_FMT_RGB16_555 + +/* Display Resolution */ + +#define LCD_XRES 98 +#define LCD_YRES 67 + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +#endif + +/** This should be put elsewhere */ +#ifdef __CC_ARM /* ARM Compiler */ +#define lcd_inline static __inline +#elif defined (__ICCARM__) /* for IAR Compiler */ +#define lcd_inline inline +#elif defined (__GNUC__) /* GNU GCC Compiler */ +#define lcd_inline static __inline +#else +#define lcd_inline static +#endif + +static void lcd_clear(void); +static void fb_ssd1783_send_cmdlist(const struct ssd1783_cmdlist *p); + +/* LCD Data Transfer Methods */ +int lcd_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels); +int lcd_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels); + +/* LCD Configuration */ +static int lcd_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo); +static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo); + +/* LCD RGB Mapping */ +#ifdef CONFIG_FB_CMAP +# error "RGB color mapping not supported by this driver" +#endif + +/* Cursor Controls */ +#ifdef CONFIG_FB_HWCURSOR +# error "Cursor control not supported by this driver" +#endif + +/* LCD Specific Controls */ +static int lcd_getpower(struct lcd_dev_s *dev); +static int lcd_setpower(struct lcd_dev_s *dev, int power); +static int lcd_getcontrast(struct lcd_dev_s *dev); +static int lcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast); + +/* Initialization (LCD ctrl / backlight) */ +static inline void lcd_initialize(void); + +/************************************************************************************** + * Private Data + **************************************************************************************/ + +/* This is working memory allocated by the LCD driver for each LCD device + * and for each color plane. This memory will hold one raster line of data. + * The size of the allocated run buffer must therefore be at least + * (bpp * xres / 8). Actual alignment of the buffer must conform to the + * bitwidth of the underlying pixel type. + * + * If there are multiple planes, they may share the same working buffer + * because different planes will not be operate on concurrently. However, + * if there are multiple LCD devices, they must each have unique run buffers. + */ + +static uint16_t g_runbuffer[LCD_XRES]; + +/* This structure describes the overall LCD video controller */ + +static const struct fb_videoinfo_s g_videoinfo = +{ .fmt = LCD_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */ + .xres = LCD_XRES, /* Horizontal resolution in pixel columns */ + .yres = LCD_YRES, /* Vertical resolutiSend a command list to the LCD panelon in pixel rows */ + .nplanes = 1, /* Number of color planes supported */ +}; + +/* This is the standard, NuttX Plane information object */ + +static const struct lcd_planeinfo_s g_planeinfo = +{ .putrun = lcd_putrun, /* Put a run into LCD memory */ +// .getrun = lcd_getrun, /* Get a run from LCD memory */ + .buffer = (uint8_t*) g_runbuffer, /* Run scratch buffer */ + .bpp = LCD_BPP, /* Bits-per-pixel */ +}; + +/* This is the standard, NuttX LCD driver object */ + +static struct ssd1783_dev_s g_lcddev = +{ .dev = + { + /* LCD Configuration */ + + .getvideoinfo = lcd_getvideoinfo, + .getplaneinfo = lcd_getplaneinfo, + +/* LCD RGB Mapping -- Not supported */ +/* Cursor Controls -- Not supported */ + +/* LCD Specific Controls */ + .getpower = lcd_getpower, + .setpower = lcd_setpower, +// .getcontrast = lcd_getcontrast, +// .setcontrast = lcd_setcontrast, + }, + .power=0 +}; + +/* we trust gcc to move this expensive bitshifting out of + * the loops in the drawing funtcions + */ + +static uint8_t rgb_to_pixel(uint16_t color) +{ + uint8_t ret; + + ret = (FB_COLOR_TO_R(color) & 0xe0); /* 765 = RRR */ + ret |= (FB_COLOR_TO_G(color) & 0xe0) >> 3; /* 432 = GGG */ + ret |= (FB_COLOR_TO_B(color) & 0xc0) >> 6; /* 10 = BB */ + + return ret; +} + +/* somehow the palette is messed up, RRR seems to have the + * bits reversed! R0 R1 R2 G G G B B ---> R2 R1 R0 G G G B B + */ + +uint8_t fix_rrr(uint8_t v) +{ + return (v & 0x5f) | (v & 0x80) >> 2 | (v & 0x20) << 2; +} + + +lcd_inline void write_data(uint16_t datain) +{ + uint16_t dataout = 0x0100 | fix_rrr(rgb_to_pixel(datain)); + uwire_xfer(SSD1783_DEV_ID,SSD1783_UWIRE_BITLEN,&dataout, NULL); +} + +static void fb_ssd1783_send_cmdlist(const struct ssd1783_cmdlist *p) +{ + int i=0; + + while (p->is_cmd != END) + { + uint16_t sendcmd = p->data; + if (p->is_cmd == DATA) + { + sendcmd |= 0x0100; /* 9th bit is cmd/data flag */ + } + + uwire_xfer(SSD1783_DEV_ID, SSD1783_UWIRE_BITLEN, &sendcmd, NULL); + p++; + i++; + } +} + +static void lcd_write_prepare(unsigned int x1, unsigned int x2, unsigned int y1, unsigned int y2) +{; + DEBUGASSERT( (x1 < x2 )&& (y1 < y2)); + struct ssd1783_cmdlist prepare_disp_write_cmds[] = { + { CMD, 0x15 }, /* set column address */ + { DATA, x1 }, + { DATA, x2 }, + { CMD, 0x75 }, /* set page address (Y) */ + { DATA, y1 }, + { DATA, y2 }, + { CMD, 0x5c }, /* enter write display ram mode */ + { END, 0x00 } + }; + dbg("x1:%d, x2:%d, y1:%d, y2:%d\n",x1, x2,y1, y2); + fb_ssd1783_send_cmdlist(prepare_disp_write_cmds); +} + +/************************************************************************************** + * Name: lcd_putrun + * + * Description: + * This method can be used to write a partial raster line to the LCD: + * + * row - Starting row to write to (range: 0 <= row < yres) + * col - Starting column to write to (range: 0 <= col <= xres-npixels) + * buffer - The buffer containing the run to be written to the LCD + * npixels - The number of pixels to write to the LCD + * (range: 0 < npixels <= xres-col) + * + **************************************************************************************/ + +int lcd_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels) +{ + int i; + FAR const uint16_t *src = (FAR const uint16_t*) buffer; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + + /* Write the run to GRAM. */ + lcd_write_prepare(col,col+npixels, row,row+1); + + for (i = 0; i < npixels; i++) + { + write_data(*src++); + } + fb_ssd1783_send_cmdlist(nop); + + return OK; +} + +/************************************************************************************** + * Name: lcd_getrun + * + * Description: + * This method can be used to read a partial raster line from the LCD: + * + * row - Starting row to read from (range: 0 <= row < yres) + * col - Starting column to read read (range: 0 <= col <= xres-npixels) + * buffer - The buffer in which to return the run read from the LCD + * npixels - The number of pixels to read from the LCD + * (range: 0 < npixels <= xres-col) + * + **************************************************************************************/ + +int lcd_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels) +{ + gvdbg("Not implemented\n"); + return -ENOSYS; +} + +/************************************************************************************** + * Name: lcd_getvideoinfo + * + * Description: + * Get information about the LCD video controller configuration. + * + **************************************************************************************/ + +static int lcd_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo) +{ + DEBUGASSERT(dev && vinfo);gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n", + g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes); + memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s)); + return OK; +} + +/************************************************************************************** + * Name: lcd_getplaneinfo + * + * Description: + * Get information about the configuration of each LCD color plane. + * + **************************************************************************************/ + +static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo) +{ + DEBUGASSERT(dev && pinfo && planeno == 0);gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp); + memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s)); + return OK; +} + +/************************************************************************************** + * Name: lcd_getpower + * + * Description: + * Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + **************************************************************************************/ + +static int lcd_getpower(struct lcd_dev_s *dev) +{ + gvdbg("power: %d\n", 0); + return g_lcddev.power; +} + +/************************************************************************************** + * Name: lcd_setpower + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). + * Used here to set pwm duty on timer used for backlight. + * + **************************************************************************************/ + +static int lcd_setpower(struct lcd_dev_s *dev, int power) +{ + uint16_t reg; + + if (g_lcddev.power == power) { + return OK; + } + + gvdbg("power: %d\n", power); + DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER); + + /* Set new power level */ + reg = getreg16(ASIC_CONF_REG); + if (power) + { + reg = getreg16(ASIC_CONF_REG); + /* LCD Set I/O(3) / SA0 to I/O(3) mode */ + reg &= ~( (1 << 12) | (1 << 10) | (1 << 7) | (1 << 1)) ; + /* don't set function pins to I2C Mode, C155 uses UWire */ + /* TWL3025: Set SPI+RIF RX clock to rising edge */ + reg |= (1 << 13) | (1 << 14); + putreg16(reg, ASIC_CONF_REG); + + /* LCD Set I/O(3) to output mode and enable C155 backlight (IO1) */ + /* FIXME: Put the display backlight control to backlight.c */ + reg = getreg16(IO_CNTL_REG); + reg &= ~( (1 << 3) | (1 << 1)); + putreg16(reg, IO_CNTL_REG); + + /* LCD Set I/O(3) output low */ + reg = getreg16(ARMIO_LATCH_OUT); + reg &= ~(1 << 3); + reg |= (1 << 1); + putreg16(reg, ARMIO_LATCH_OUT); + } + else + { + gvdbg("powering LCD off...\n"); + /* Switch pin from PWL to LT */ + reg &= ~ASCONF_PWL_ENA; + putreg8(reg, ASIC_CONF_REG); + /* Disable pwl */ + putreg8(0x00, PWL_REG(PWL_CTRL)); + } + return OK; +} + + +/************************************************************************************** + * Name: lcd_getcontrast + * + * Description: + * Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static int lcd_getcontrast(struct lcd_dev_s *dev) +{ + gvdbg("Not implemented\n"); + return -ENOSYS; +} + +/************************************************************************************** + * Name: lcd_setcontrast + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static int lcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) +{ + gvdbg("Not implemented\n"); + return -ENOSYS; +} + +/************************************************************************************** + * Name: lcd_lcdinitialize + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ +static inline void lcd_initialize(void) +{ + gvdbg("%s: initializing LCD.\n",__FUNCTION__); + calypso_reset_set(RESET_EXT, 0); + usleep(5000); + uwire_init(); + usleep(5000); + fb_ssd1783_send_cmdlist(ssd1783_initdata); +} + +/************************************************************************************** + * Public Functions + **************************************************************************************/ + + +/************************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + **************************************************************************************/ + +int board_lcd_initialize(void) +{ + gvdbg("Initializing\n"); + + lcd_initialize(); + + /* Clear the display */ + lcd_clear(); + + return OK; +} + +/************************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows support + * for multiple LCD devices. + * + **************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return &g_lcddev.dev; +} + + +/************************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Un-initialize the LCD support + * + **************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + lcd_setpower(&g_lcddev.dev, 0); +} + +/************************************************************************************** + * Name: lcd_clear + * + * Description: + * Fill the LCD ctrl memory with given color + * + **************************************************************************************/ + +void lcd_clear() +{ + struct ssd1783_cmdlist prepare_disp_write_cmds[] = + { + { CMD, 0x8E }, + { DATA, 0x00 }, + { DATA, 0x00 }, + { DATA, LCD_XRES }, + { DATA, LCD_YRES }, + { END, 0x00 } + }; + + struct ssd1783_cmdlist nop_command[] = + { + { CMD, 0x25 }, // NOP command + { END, 0x00 } + }; + + fb_ssd1783_send_cmdlist(prepare_disp_write_cmds); + fb_ssd1783_send_cmdlist(nop_command); +} diff --git a/configs/compal_e99/src/ssd1783.h b/configs/compal_e99/src/ssd1783.h new file mode 100644 index 0000000000000000000000000000000000000000..50ec44925909b81b61924e45f279bffaa0608dfa --- /dev/null +++ b/configs/compal_e99/src/ssd1783.h @@ -0,0 +1,110 @@ +#ifndef SSD1783_H_ +#define SSD1783_H_ + +#include + +#define FB_COLOR_TO_R(v) (((v)>>16) & 0xff) +#define FB_COLOR_TO_G(v) (((v)>> 8) & 0xff) +#define FB_COLOR_TO_B(v) ( (v) & 0xff) + +#define SSD1783_UWIRE_BITLEN 9 +#define SSD1783_DEV_ID 0 + +#define ARMIO_LATCH_OUT 0xfffe4802 +#define IO_CNTL_REG 0xfffe4804 +#define ASIC_CONF_REG 0xfffef008 + +#define ASCONF_PWL_ENA (1 << 4) + +/* begin backlight.c */ +#define BASE_ADDR_PWL 0xfffe8000 +#define PWL_REG(m) (BASE_ADDR_PWL + (m)) + +enum pwl_reg { + PWL_LEVEL = 0, + PWL_CTRL = 1, +}; + +enum ssd1783_cmdflag { CMD, DATA, END }; + +struct ssd1783_cmdlist { + enum ssd1783_cmdflag is_cmd:8; /* 1: is a command, 0: is data, 2: end marker! */ + uint8_t data; /* 8 bit to send to LC display */ +} __attribute__((packed)); + +static const struct ssd1783_cmdlist nop[] = { + { CMD, 0x25 }, // NOP command + { END, 0x00 } +}; + +static const struct ssd1783_cmdlist +ssd1783_initdata[] = { + { CMD, 0xD1 }, /* CMD set internal oscillator on */ + { CMD, 0x94 }, /* CMD leave sleep mode */ + { CMD, 0xbb }, /* CMD Set COM Output Scan Direction: */ + { DATA, 0x01 }, /* DATA: 01: COM0-79, then COM159-80 */ +/* -------- DIFFERENT FROM ORIGINAL CODE: -------------- */ +/* we use 8bit per pixel packed RGB 332 */ + { CMD, 0xbc }, /* CMD Set Data Output Scan Direction */ + { DATA, 0x00 }, /* DATA: column scan, normal rotation, normal display */ + { DATA, 0x00 }, /* DATA: RGB color arrangement R G B R G B ... */ +/*-->*/ { DATA, 0x01 }, /* DATA: 8 bit per pixel mode MSB LSB */ +/* --------- /DIFFERENT ---------- */ + { CMD, 0xce }, /* CMD Set 256 Color Look Up Table LUT */ + { DATA, 0x00 }, /* DATA red 000 */ + { DATA, 0x03 }, /* DATA red 001 */ + { DATA, 0x05 }, /* DATA red 010 */ + { DATA, 0x07 }, /* DATA red 011 */ + { DATA, 0x09 }, /* DATA red 100 */ + { DATA, 0x0b }, /* DATA red 101 */ + { DATA, 0x0d }, /* DATA red 110 */ + { DATA, 0x0f }, /* DATA red 111 */ + { DATA, 0x00 }, /* DATA green 000 */ + { DATA, 0x03 }, /* DATA green 001 */ + { DATA, 0x05 }, /* DATA green 010 */ + { DATA, 0x07 }, /* DATA green 011 */ + { DATA, 0x09 }, /* DATA green 100 */ + { DATA, 0x0b }, /* DATA green 101 */ + { DATA, 0x0d }, /* DATA green 110 */ + { DATA, 0x0f }, /* DATA green 111 */ + { DATA, 0x00 }, /* DATA blue 00 */ + { DATA, 0x05 }, /* DATA blue 01 */ + { DATA, 0x0a }, /* DATA blue 10 */ + { DATA, 0x0f }, /* DATA blue 11 */ + { CMD, 0xca }, /* CMD Set Display Control - Driver Duty Selection */ + { DATA, 0xff }, // can't find description of the values in the original + { DATA, 0x10 }, // display/ssd1783.c in my datasheet :-( + { DATA, 0x01 }, // + { CMD, 0xab }, /* CMD Set Scroll Start */ + { DATA, 0x00 }, /* DATA: Starting address at block 0 */ + { CMD, 0x20 }, /* CMD Set power control register */ + { DATA, 0x0b }, /* DATA: booster 6x, reference gen. & int regulator */ + { CMD, 0x81 }, /* CMD Contrast Lvl & Int. Regul. Resistor Ratio */ + { DATA, 0x29 }, /* DATA: contrast = 0x29 */ + { DATA, 0x05 }, /* DATA: 0x05 = 0b101 -> 1+R2/R1 = 11.37 */ + { CMD, 0xa7 }, /* CMD Invert Display */ + { CMD, 0x82 }, /* CMD Set Temperature Compensation Coefficient */ + { DATA, 0x00 }, /* DATA: Gradient is -0.10 % / degC */ + { CMD, 0xfb }, /* CMD Set Biasing Ratio */ + { DATA, 0x03 }, /* DATA: 1/10 bias */ + { CMD, 0xf2 }, /* CMD Set Frame Frequency and N-line inversion */ + { DATA, 0x08 }, /* DATA: 75 Hz (POR) */ + { DATA, 0x06 }, /* DATA: n-line inversion: 6 lines */ + { CMD, 0xf7 }, /* CMD Select PWM/FRC Select Full Col./8col mode */ + { DATA, 0x28 }, /* DATA: always 0x28 */ + { DATA, 0x8c }, /* DATA: 4bit PWM + 2 bit FRC */ + { DATA, 0x05 }, /* DATA: full color mode */ + { CMD, 0xaf }, /* CMD Display On */ + { END, 0x00 }, /* MARKER: end of list */ +}; + +struct ssd1783_dev_s +{ + /* Publicly visible device structure */ + struct lcd_dev_s dev; + + /* Private LCD-specific information follows */ + uint8_t power; /* Current power setting */ +}; + +#endif /* SSD1783_H_ */ diff --git a/configs/demo9s12ne64/Kconfig b/configs/demo9s12ne64/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..b18dd3620437de04020ea11180d7ca378fddd6d1 --- /dev/null +++ b/configs/demo9s12ne64/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_DEMOS92S12NEC64 +endif + diff --git a/configs/demo9s12ne64/README.txt b/configs/demo9s12ne64/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..7ec1b55471e1e042f0363fecd2e8a74a1aff06f1 --- /dev/null +++ b/configs/demo9s12ne64/README.txt @@ -0,0 +1,397 @@ +README +^^^^^^ + + This README discusses issues unique to NuttX configurations for the + Freescale DEMO9S12NE64 development board. + +CONTENTS +^^^^^^^^ + • MC9S12NE64 Features + • Development Environment + • NuttX Buildroot Toolchain + • FreeScale HCS12 Serial Monitor + • Soft Registers + • HCS12/DEMO9S12NEC64-specific Configuration Options + • Configurations + +MC9S12NE64 Features +^^^^^^^^^^^^^^^^^^^ + + • 16-bit HCS12 core + - HCS12 CPU + - Upward compatible with M68HC11 instruction set + - Interrupt stacking and programmer’s model identical to M68HC11 + - Instruction queue + - Enhanced indexed addressing + - Memory map and interface (MMC) + - Interrupt control (INT) + - Background debug mode (BDM) + - Enhanced debug12 module, including breakpoints and change-of-flow + trace buffer (DBG) + - Multiplexed expansion bus interface (MEBI) - available only in + 112-pin package version + • Wakeup interrupt inputs + - Up to 21 port bits available for wakeup interrupt function with + digital filtering + • Memory + - 64K bytes of FLASH EEPROM + - 8K bytes of RAM + • Analog-to-digital converter (ATD) + - One 8-channel module with 10-bit resolution + - External conversion trigger capability + • Timer module (TIM) + - 4-channel timer + - Each channel configurable as either input capture or output + compare + - Simple PWM mode + - Modulo reset of timer counter + - 16-bit pulse accumulator + - External event counting + - Gated time accumulation + • Serial interfaces + - Two asynchronous serial communications interface (SCI) + - One synchronous serial peripheral interface (SPI) + - One inter-IC bus (IIC) + • Ethernet Media access controller (EMAC) + - IEEE 802.3 compliant + - Medium-independent interface (MII) + - Full-duplex and half-duplex modes + - Flow control using pause frames + - MII management function + - Address recognition + - Frames with broadcast address are always accepted or always + rejected + - Exact match for single 48-bit individual (unicast) address + - Hash (64-bit hash) check of group (multicast) addresses + - Promiscuous mode + • Ethertype filter + • Loopback mode + • Two receive and one transmit Ethernet buffer interfaces + • Ethernet 10/100 Mbps transceiver (EPHY) + - IEEE 802.3 compliant + - Digital adaptive equalization + - Half-duplex and full-duplex + - Auto-negotiation next page ability + - Baseline wander (BLW) correction + - 125-MHz clock generator and timing recovery + - Integrated wave-shaping circuitry + - Loopback modes + • CRG (clock and reset generator module) + - Windowed COP watchdog + - Real-time interrupt + - Clock monitor + - Pierce oscillator + - Phase-locked loop clock frequency multiplier + - Limp home mode in absence of external clock + - 25-MHz crystal oscillator reference clock + • Operating frequency + - 50 MHz equivalent to 25 MHz bus speed for single chip + - 32 MHz equivalent to 16 MHz bus speed in expanded bus modes + • Internal 2.5-V regulator + - Supports an input voltage range from 3.3 V ± 5% + - Low-power mode capability + - Includes low-voltage reset (LVR) circuitry + • 80-pin TQFP-EP or 112-pin LQFP package + - Up to 70 I/O pins with 3.3 V input and drive capability (112-pin + package) + - Up to two dedicated 3.3 V input only lines (IRQ, XIRQ) + • Development support + - Single-wire background debug™ mode (BDM) + - On-chip hardware breakpoints + - Enhanced DBG debug features + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development + environment. The source has been built only using the GNU toolchain + (see below). Other toolchains will likely cause problems. + +NuttX Buildroot Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the HC12 GCC toolchain (if + different from the default in your PATH variable). + + If you have no HC12 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin + environments. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh demo9s12nec64/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/m9s12x-defconfig-3.3.6 .config + + 6. make oldconfig + + 7. make + + If the make fails because it can't find the file to download, you may + have to locate the file on the internet and download it into the archives/ + directory manually. For example, binutils-2.18 can be found here: + http://ftp.gnu.org/gnu/binutils/ + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + +FreeScale HCS12 Serial Monitor +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + General: + The NuttX HCS12 port is configured to use the Freescale HCS serial + monitor. This monitor supports primitive debug commands that allow + FLASH/EEPROM programming and debugging through an RS-232 serial + interface. The serial monior is 2Kb in size and resides in FLASH at + addresses 0xf800-0xffff. The monitor does not use any RAM other than + the stack itself. + + AN2458 + The serial monitor is described in detail in Freescale Application + Note AN2458.pdf. + + COP: + The serial monitor uses the COP for the cold reset function and should + not be used by the application without some precautions (see AN2458). + + Clocking: + The serial monitor sets the operating frequency to 24 MHz. This is + not altered by the NuttX start-up; doing so would interfere with the + operation of the serial monitor. + + Memory Configuration: + Registers: + • Register space is located at 0x0000–0x03ff. + FLASH: + • FLASH memory is any address greater than 0x4000. All paged + addresses are assumed to be FLASH memory. + • Application code should exclude the 0xf780–0xff7f memory. + SRAM: + • RAM ends at 0x3FFF and builds down to the limit of the device’s + available RAM. + • The serial monitor's stack pointer is set to the end of RAM+1 + (0x4000). + EEPROM: + • EEPROM (if the target device has any) is limited to the available + space between the registers and the RAM (0x0400–to start of RAM). + External Devices: + • External devices attached to the multiplexed external bus + interface are not supported + + Serial Communications: + The serial monitor uses RS-232 serial communications through SCI0 at + 115,200 baud. The monitor must have exclusive use of this interface. + Access to the serial port is available through a monitor jump table. + + Interrrupts: + The serial monitor redirects interrupt vectors to an unprotected + portion of FLASH just before the protected monitor program + (0xf780–0xf7fe). The monitor will automatically redirect vector + programming operations to these user vectors. The user code should + therefore keep the normal (non-monitor) vector locations + (0xff80–0xfffe). + +Soft Registers +^^^^^^^^^^^^^^ + + The mc68hcs12 compilation is prone to errors like the following: + + CC: lib_b16sin.c + lib_b16sin.c: In function `b16sin': + lib_b16sin.c:110: error: unable to find a register to spill in class `S_REGS' + lib_b16sin.c:110: error: this is the insn: + (insn:HI 41 46 44 8 (parallel [ + (set (subreg:SI (reg:DI 58 [ rad ]) 4) + (reg/v:SI 54 [ rad ])) + (clobber (scratch:HI)) + ]) 20 {movsi_internal} (insn_list 46 (nil)) + (expr_list:REG_UNUSED (scratch:HI) + (expr_list:REG_NO_CONFLICT (reg/v:SI 54 [ rad ]) + (nil)))) + lib_b16sin.c:110: confused by earlier errors, bailing out + + There are several ways that this error could be fixed: + + 1. Increase the number of soft registers (i.e., "fake" registers defined + at fixed memory locations). This can be done by adding something like + -msoft-reg-count=4 to the CFLAGS. This approach was not taken + because: + + - This slows hcs12 performance + - All of these soft registers wouil have to be saved and restored + on every interrupt and context switch. + + 2. Lowering the optimization level by dropping -Os to -O2 or, more likely, + by removing -fomit-frame-pointer. Also not desireable becauase 99% of the + files that do not have this problem also increase in size. Special case + compilation with reduced optimization levels just for the files that need + it could be done, but this would complicate the make system. + + 3. Restructuring files to reduce the complexity. If you add local variables + to hold intermediate computational results, this error can be eliminated. + This is the approach taken in NuttX. It has disadvantages only in that + (1) it takes some effort and good guessing to eliminate the problem, and (2) + the problem is not really eliminated -- it can and will re-occur when files + are changed or new files are added. + + 4. Many files are built that are needed by DEM09S12NE64. Another very simple + option if those problem files are needed is to just remove the offending + files from the Make.defs file so that they no longer cause a problem. + +HCS12/DEMO9S12NEC64-specific Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=hc + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_HC=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_HCS12=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=mc92s12nec64 + + CONFIG_ARCH_CHIP_name - For use in C code + + CONFIG_ARCH_CHIP_MCS92S12NEC64 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=demo9s12nec64 + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_DEMOS92S12NEC64 (for the Freescale DEMO9S12NE64 development board) + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed RAM. + + CONFIG_RAM_START - The start address of installed RAM + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + GPIO Interrupts + + CONFIG_GPIO_IRQ - Enable general support for GPIO IRQs + CONFIG_HCS12_PORTG_INTS - Enable PortG IRQs + CONFIG_HCS12_PORTH_INTS - Enable PortH IRQs + CONFIG_HCS12_PORTJ_INTS - Enable PortJ IRQs + + HCS12 build options: + + CONFIG_HCS12_SERIALMON - Indicates that the target systems uses + the Freescale serial bootloader. + + CONFIG_HCS12_NONBANKED - Indicates that the target systems does not + support banking. Only short calls are made; one fixed page is + presented in the paging window. Only 48Kb of FLASH is usable + in this configuration: pages 3e, 3d, then 3f will appear as a + contiguous address space in memory. + + HCS12 Sub-system support + + CONFIG_HCS12_SCI0 + CONFIG_HCS12_SCI1 + + HCS12 specific device driver settings: + + CONFIG_SCIn_SERIAL_CONSOLE - selects SCIn for the console and ttys0 + (default is the SCI0). + + CONFIG_SCIn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + + CONFIG_SCIn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + + CONFIG_SCIn_BAUD - The configure BAUD of the UART. + + CONFIG_SCIn_BITS - The number of bits. Must be either 7 or 8. + + CONFIG_SCIn_PARTIY - 0=no parity, 1=odd parity, 2=even parity, 3=mark 1, 4=space 0 + + CONFIG_SCIn_2STOP - Two stop bits + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. Each Freescale HCS12 configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh demo9s12nec64/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume the that you are building under + under Linux (should work under Windows with Cygwin as well). This + is easily reconfigured: + + CONFIG_HOST_LINUX=y + +Configuration Sub-Directories +----------------------------- + + ostest + + This configuration directory, performs a simple OS test using + examples/ostest. + diff --git a/configs/demo9s12ne64/include/board.h b/configs/demo9s12ne64/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..0fc3ed6dec5f21afe42de0e0f52ba44ab8a3b42b --- /dev/null +++ b/configs/demo9s12ne64/include/board.h @@ -0,0 +1,128 @@ +/************************************************************************************ + * configs/demo9s12ne64/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* Frequency of the crystal oscillator */ + +#define HCS12_OSCCLK 16000000 /* 16MHz */ + +/* PLL Settings + * + * SYNR register controls the multiplication factor of the PLL. If the PLL is on, the + * count in the loop divider (SYNR) register effectively multiplies up the PLL clock + * (PLLCLK) from the reference frequency by 2 x (SYNR+1). PLLCLK will not be below + * the minimum VCO frequency (fSCM). + * + * The REFDV register provides a finer granularity for the PLL multiplier steps. The + * count in the reference divider divides OSCCLK frequency by REFDV + 1. + * + * PLLCLK = 2 * OSCCLK * (SYNR + 1) / (REFDV + 1) + * + * If (PLLSEL = 1), Bus Clock = PLLCLK / 2 + */ + +#define HCS12_SYNR_VALUE 0x15 +#define HCS12_REFDV_VALUE 0x15 +#define HCS12_PLLCLK (2*HCS12_OSCCLK*(HCS12_SYNR+1)/(HCS12_REFDV+1)) +#define HCS12_BUSCLK (HSC12_PLLCLK/2) + +/* LED definitions ******************************************************************/ + +/* The DEMO9S12NE64 board has 2 LEDs that we will encode as: */ + +#define LED_STARTED 1 /* LED1 */ +#define LED_HEAPALLOCATE 1 /* LED1 */ +#define LED_IRQSENABLED 1 /* LED1 */ +#define LED_STACKCREATED 1 /* LED1 */ +#define LED_INIRQ 2 /* LED1 + LED2 */ +#define LED_SIGNAL 2 /* LED1 + LED2 */ +#define LED_ASSERTION 2 /* LED1 + LED2 */ +#define LED_PANIC 7 /* LED2 + N/C */ + +/* Button definitions ***************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: hcs12_boardinitialize + * + * Description: + * All HCS12 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void hcs12_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/demo9s12ne64/ostest/Make.defs b/configs/demo9s12ne64/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..10da8b273bcdba9e2affcdae8013cc9922a77554 --- /dev/null +++ b/configs/demo9s12ne64/ostest/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/demo9s12ne64/ostest/Make.defs +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +# Setup for the selected toolchain +# NuttX buildroot under Linux or Cygwin + +CROSSDEV = m9s12x-nuttx-elf- +MAXOPTIMIZATION = -Os +WINTOOL = n + +ifeq ($(CONFIG_HCS12_NONBANKED),y) + ARCHCPUFLAGS = -m9s12x -mshort -mnolong-calls + LDSCRIPT = ld.script.nonbanked +else + ARCHCPUFLAGS = -m9s12x -mshort -mlong-calls + LDSCRIPT = ld.script.banked +endif + +ifneq ($(CONFIG_HCS12_MSOFTREGS),0) + ARCHCPUFLAGS += -msoft-reg-count=$(CONFIG_HCS12_MSOFTREGS) +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/$(LDSCRIPT)}" + MAXOPTIMIZATION = -O2 +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + LDFLAGS += -nostartfiles -nodefaultlibs +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/demo9s12ne64/ostest/defconfig b/configs/demo9s12ne64/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b5f8ba3a5d6162332eb7956c445ef1c9feef561d --- /dev/null +++ b/configs/demo9s12ne64/ostest/defconfig @@ -0,0 +1,573 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +CONFIG_MOTOROLA_SREC=y +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +CONFIG_ARCH_HC=y +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="hc" +CONFIG_ARCH_CHIP="m9s12" +CONFIG_ARCH_CHIP_MCS92S12NEC64=y +CONFIG_ARCH_HSC12=y + +# +# M9S12 Configuration Options +# + +# +# M9S12 Peripheral Selection +# +CONFIG_HCS12_SCI0=y +# CONFIG_HCS12_SCI1 is not set + +# +# SCI Configuration +# +CONFIG_SCI0_RXBUFSIZE=32 +CONFIG_SCI0_TXBUFSIZE=32 +CONFIG_SCI0_BAUD=115200 +CONFIG_SCI0_BITS=8 +CONFIG_SCI0_PARITY=0 +CONFIG_SCI0_2STOP=0 +# CONFIG_NOSCI_SERIAL_CONSOLE is not set +CONFIG_SCI0_SERIAL_CONSOLE=y + +# +# HSC12 Build Options +# +CONFIG_HCS12_SERIALMON=y +CONFIG_HCS12_NONBANKED=y + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_DEMOS92S12NEC64=y +# CONFIG_ARCH_BOARD_NE64BADGE is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="demo9s12ne64" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=11 +# CONFIG_DEV_CONSOLE is not set +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=8 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=0 +CONFIG_NFILE_STREAMS=0 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=256 +CONFIG_USERMAIN_STACKSIZE=512 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=256 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set + +# +# USART Configuration +# +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=512 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/demo9s12ne64/ostest/ld.script.banked b/configs/demo9s12ne64/ostest/ld.script.banked new file mode 100644 index 0000000000000000000000000000000000000000..812f5f19cab7b4ae915afd51fe785149e7414967 --- /dev/null +++ b/configs/demo9s12ne64/ostest/ld.script.banked @@ -0,0 +1,143 @@ +/**************************************************************************** + * configs/demo9s12ne64/ostest/ld.script + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The DEMO9S12NE64 has 64Kb of FLASH and 8Kb of SRAM that are assumed to be + * paged and positioned as below: + */ + +MEMORY +{ + /* The 8Kb SRAM is mapped to 0x2000-0x2fff. The top 256 bytes are reserved + * for the serial monitor stack space. + */ + + sram (rwx) : ORIGIN = 0x2000, LENGTH = 8K-256 + + /* Two fixed text flash pages (corresponding to page 3e and 3f) */ + + lowtext(rx) : ORIGIN = 0x4000, LENGTH = 16K /* Page 3e */ + hitext (rx) : ORIGIN = 0xc000, LENGTH = 16K-2k /* Page 3f */ + + /* Flash memory pages: + * + * The MC9S12NE64 implements 6 bits of the PPAGE register which gives it a + * 1 Mbyte program memory address space that is accessed through the PPAGE + * window. The lower 768K portion (0x000000-0x0bffff) of the address space + * is accessed with PPAGE values 0x00 through 0x2f. This address range + * is reserved for external memory when the part is operated in expanded + * mode. The upper 256K of the address space (0x0c0000-0x100000), accessed + * with PPAGE values 0x30 through 0x3f, is occupied by on chip flash. + */ + + page30 (rx) : ORIGIN = 0x0c0000, LENGTH = 16K /* Page 30 */ + page31 (rx) : ORIGIN = 0x0c4000, LENGTH = 16K /* Page 31 */ + page32 (rx) : ORIGIN = 0x0c8000, LENGTH = 16K /* Page 32 */ + page33 (rx) : ORIGIN = 0x0cc000, LENGTH = 16K /* Page 33 */ + page34 (rx) : ORIGIN = 0x0d0000, LENGTH = 16K /* Page 34 */ + page35 (rx) : ORIGIN = 0x0d4000, LENGTH = 16K /* Page 35 */ + page36 (rx) : ORIGIN = 0x0d8000, LENGTH = 16K /* Page 36 */ + page37 (rx) : ORIGIN = 0x0dc000, LENGTH = 16K /* Page 37 */ + page38 (rx) : ORIGIN = 0x0e0000, LENGTH = 16K /* Page 38 */ + page39 (rx) : ORIGIN = 0x0e4000, LENGTH = 16K /* Page 39 */ + page3a (rx) : ORIGIN = 0x0e8000, LENGTH = 16K /* Page 3a */ + page3b (rx) : ORIGIN = 0x0ec000, LENGTH = 16K /* Page 3b */ + page3c (rx) : ORIGIN = 0x0f0000, LENGTH = 16K /* Page 3c */ + page3d (rx) : ORIGIN = 0x0f4000, LENGTH = 16K /* Page 3d */ + + page3e (rx) : ORIGIN = 0x0f8000, LENGTH = 16K /* Page 3e */ + page3f (rx) : ORIGIN = 0x0fc000, LENGTH = 16K-2K /* Page 3f */ + + /* Vectors. These get relocated to 0xf780-f7ff by the serial loader */ + + vectors (rx) : ORIGIN = 0xff80, LENGTH = 256 +} + +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > hitext + + _eronly = ABSOLUTE(.); /* See below */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > lowtext + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + .vectors : { + _svectors = ABSOLUTE(.); + *(.vectors) + _evectors = ABSOLUTE(.); + } > vectors + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/demo9s12ne64/ostest/ld.script.nonbanked b/configs/demo9s12ne64/ostest/ld.script.nonbanked new file mode 100644 index 0000000000000000000000000000000000000000..fae728f6298556e9417720941bc14564b5f0e202 --- /dev/null +++ b/configs/demo9s12ne64/ostest/ld.script.nonbanked @@ -0,0 +1,116 @@ +/**************************************************************************** + * configs/demo9s12ne64/ostest/ld.script + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The DEMO9S12NE64 has 64Kb of FLASH and 8Kb of SRAM that are assumed to be + * paged and positioned as below: + */ + +MEMORY +{ + /* The 8Kb SRAM is mapped to 0x2000-0x2fff. The top 256 bytes are reserved + * for the serial monitor stack space. + */ + + sram (rwx) : ORIGIN = 0x2000, LENGTH = 8K-256 + + /* Three fixed text flash pages (corresponding to page 3e, 3d, and 3f) at + * 16Kb each (minus 2Kb at the end of page 3f that is reserved at the top for + * the serial boot loader + */ + + text (rx) : ORIGIN = 0x4000, LENGTH = 48K-2k /* Page 3e, 3d, and 3f */ + + /* Vectors. These get relocated to 0xf780-f7ff by the serial loader */ + + vectors (rx) : ORIGIN = 0xff80, LENGTH = 256 +} + +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > text + + _eronly = ABSOLUTE(.); /* See below */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > text + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + .vectors : { + _svectors = ABSOLUTE(.); + *(.vectors) + _evectors = ABSOLUTE(.); + } > vectors + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/demo9s12ne64/ostest/setenv.sh b/configs/demo9s12ne64/ostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..8f47650ca5e5edeb10a44cd2ebba128cb4106028 --- /dev/null +++ b/configs/demo9s12ne64/ostest/setenv.sh @@ -0,0 +1,46 @@ +#!/bin/bash +# configs/demo9s12ne64/ostest/setenv.sh +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export BUILDROOT_BIN="${WD}/../buildroot/build_m9s12x/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/demo9s12ne64/src/.gitignore b/configs/demo9s12ne64/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/demo9s12ne64/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/demo9s12ne64/src/Makefile b/configs/demo9s12ne64/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..78da4f1204388c5d0ce568cf15416b3a8b08063f --- /dev/null +++ b/configs/demo9s12ne64/src/Makefile @@ -0,0 +1,44 @@ +############################################################################ +# configs/demo9s12ne64/src/Makefile +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = m9s12_boot.c m9s12_leds.c m9s12_buttons.c m9s12_spi.c +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += m9s12_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/demo9s12ne64/src/demo9s12ne64.h b/configs/demo9s12ne64/src/demo9s12ne64.h new file mode 100644 index 0000000000000000000000000000000000000000..1602af3194cf897ebf68017c7707221aeed9fb1e --- /dev/null +++ b/configs/demo9s12ne64/src/demo9s12ne64.h @@ -0,0 +1,77 @@ +/************************************************************************************ + * configs/demo9s12ne64/src/demo9s12ne64.h + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_DEMO9S12NE64_SRC_DEMO9S12NE64_H +#define __CONFIGS_DEMO9S12NE64_SRC_DEMO9S12NE64_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* DEMO9S12NE64 GPIOs ***************************************************************/ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: hcs12_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the STM3210E-EVAL board. + * + ************************************************************************************/ + +void weak_function hcs12_spidev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_DEMO9S12NE64_SRC_DEMO9S12NE64_H */ diff --git a/configs/demo9s12ne64/src/m9s12_appinit.c b/configs/demo9s12ne64/src/m9s12_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..ec3d9ba21cf2f9ac303237feac945daad3e71eba --- /dev/null +++ b/configs/demo9s12ne64/src/m9s12_appinit.c @@ -0,0 +1,71 @@ +/**************************************************************************** + * config/demo9s12ne64/src/m9s12_appinit.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "demo9s12ne64.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + /* Configure SPI-based devices */ + + return OK; +} diff --git a/configs/demo9s12ne64/src/m9s12_boot.c b/configs/demo9s12ne64/src/m9s12_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..ab6c3b6467c1c958aee4575ce5fc6fafc234105b --- /dev/null +++ b/configs/demo9s12ne64/src/m9s12_boot.c @@ -0,0 +1,89 @@ +/************************************************************************************ + * configs/demo9s12ne64/src/m9s12_boot.c + * + * Copyright (C) 2009, 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "demo9s12ne64.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: hcs12_boardinitialize + * + * Description: + * All HCS12 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void hcs12_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * hcs12_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_INCLUDE_HCS12_ARCH_SPI) + if (hcs12_spidev_initialize) + { + hcs12_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/demo9s12ne64/src/m9s12_buttons.c b/configs/demo9s12ne64/src/m9s12_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..2452139174f96e2d9876986b8a4706e12b41c970 --- /dev/null +++ b/configs/demo9s12ne64/src/m9s12_buttons.c @@ -0,0 +1,85 @@ +/**************************************************************************** + * configs/demo9s12ne64/src/m9s12_buttons.c + * + * Copyright (C) 2009, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "demo9s12ne64.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + ****************************************************************************/ + +void board_button_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return 0; +} + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/demo9s12ne64/src/m9s12_leds.c b/configs/demo9s12ne64/src/m9s12_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..11fc1c6915093cea90a6281f05710fcd6d262863 --- /dev/null +++ b/configs/demo9s12ne64/src/m9s12_leds.c @@ -0,0 +1,106 @@ +/**************************************************************************** + * configs/demo9s12ne64/src/m9s12_leds.c + * + * Copyright (C) 2009, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "demo9s12ne64.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + * + * Description: + * Configure and initialize on-board LEDs + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/demo9s12ne64/src/m9s12_spi.c b/configs/demo9s12ne64/src/m9s12_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..b418635021f66b6c64b909ccd026f42ab303482f --- /dev/null +++ b/configs/demo9s12ne64/src/m9s12_spi.c @@ -0,0 +1,129 @@ +/************************************************************************************ + * configs/demo9s12ne64/src/m9s12_spi.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "demo9s12ne64.h" + +#if defined(CONFIG_HCS12_SPI) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: hcs12_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the DEMO9S12NE64 board. + * + ************************************************************************************/ + +void weak_function hcs12_spidev_initialize(void) +{ +} + +/**************************************************************************** + * Name: hcs12_spiselect and hcs12_spistatus + * + * Description: + * The external functions, hcs12_spiselect and hcs12_spistatus must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including hcs12_spibus_initialize()) + * are provided by common HCS12 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in hcs12_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide hcs12_spiselect() and hcs12_spistatus() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to hcs12_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by hcs12_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +void hcs12_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ +} + +uint8_t hcs12_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} + +#endif /* CONFIG_HCS12_SPI */ diff --git a/configs/dk-tm4c129x/Kconfig b/configs/dk-tm4c129x/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..82dfdc0d6647a454715d2e2280483a0d05df6c87 --- /dev/null +++ b/configs/dk-tm4c129x/Kconfig @@ -0,0 +1,75 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_DK_TM4C129X +if TIMER && TIVA_TIMER32_PERIODIC + +config DK_TM4C129X_TIMER + bool + default n + +choice + prompt "Timer driver selection" + default DK_TM4C129X_TIMER_NONE + +config DK_TM4C129X_TIMER_NONE + bool "None" + +config DK_TM4C129X_TIMER0 + bool "Timer 0" + depends on TIVA_TIMER0 + select DK_TM4C129X_TIMER + +config DK_TM4C129X_TIMER1 + bool "Timer 1" + depends on TIVA_TIMER1 + select DK_TM4C129X_TIMER + +config DK_TM4C129X_TIMER2 + bool "Timer 2" + depends on TIVA_TIMER2 + select DK_TM4C129X_TIMER + +config DK_TM4C129X_TIMER3 + bool "Timer 3" + depends on TIVA_TIMER3 + select DK_TM4C129X_TIMER + +config DK_TM4C129X_TIMER4 + bool "Timer 4" + depends on TIVA_TIMER4 + select DK_TM4C129X_TIMER + +config DK_TM4C129X_TIMER5 + bool "Timer 5" + depends on TIVA_TIMER5 + select DK_TM4C129X_TIMER + +config DK_TM4C129X_TIMER6 + bool "Timer 6" + depends on TIVA_TIMER6 + select DK_TM4C129X_TIMER + +config DK_TM4C129X_TIMER7 + bool "Timer 7" + depends on TIVA_TIMER7 + select DK_TM4C129X_TIMER + +endchoice # Timer driver selection + +if DK_TM4C129X_TIMER + +config DK_TM4C129X_TIMER_DEVNAME + string "Timer device name" + default "/dev/timer0" + +config DK_TM4C129X_TIMER_ALTCLK + bool "Use alternate clock source" + default n + depends on EXPERIMENTAL + +endif # DK_TM4C129X_TIMER +endif # TIVA_TIMER32_PERIODIC +endif # ARCH_BOARD_DK_TM4C129X diff --git a/configs/dk-tm4c129x/README.txt b/configs/dk-tm4c129x/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..32e48d6e7ea769d73f2ef674fb3b29cde335cc2c --- /dev/null +++ b/configs/dk-tm4c129x/README.txt @@ -0,0 +1,830 @@ +README.txt +========== + + This README file discuss discusses the port of NuttX to the Texas + Instruments DK-TM4C129X Connected Development Kit. + + Description + ----------- + The Tivaâ„¢ C Series TM4C129X Connected Development Kit highlights + the 120-MHz Tiva C Series TM4C129XNCZAD ARM® Cortexâ„¢-M4 based + microcontroller, including an integrated 10/100 Ethernet MAC + + PHY as well as many other key features. + + Features + -------- + + - Color LCD interface + - USB 2.0 OTG | Host | Device port + - TI wireless EM connection + - BoosterPack and BoosterPack XL interfaces + - Quad SSI-supported 512-Mbit Flash memory + - MicroSD slot + - Expansion interface headers: MCU high-speed USB ULPI port, + Ethernet RMII and MII ports External peripheral interface for + memories, parallel peripherals, and other system functions. + - In-Circuit Debug Interface (ICDI) + +Contents + - Using OpenOCD and GDB with ICDI + - Buttons and LEDs + - Serial Console + - Networking Support + - Timers + - Temperature Sensor + - DK-TM4129X Configuration Options + - Configurations + +Using OpenOCD and GDB with ICDI +=============================== + + Building OpenOCD under Cygwin: + + Refer to configs/olimex-lpc1766stk/README.txt + + Installing OpenOCD in Linux: + + sudo apt-get install openocd + + You can also build openocd from its source: + + git clone http://git.code.sf.net/p/openocd/code openocd + cd openocd + + Helper Scripts: + + I have been using the on-board In-Circuit Debug Interface (ICDI) interface. + OpenOCD requires a configuration file. I keep the one I used last here: + + configs/dk-tm4c129x/tools/dk-tm4c129x.cfg + + However, the "correct" configuration script to use with OpenOCD may + change as the features of OpenOCD evolve. So you should at least + compare that dk-tm4c129x.cfg file with configuration files in + /usr/share/openocd/scripts. As of this writing, the configuration + files of interest were: + + /usr/local/share/openocd/scripts/board/dk-tm4c129x.cfg + /usr/local/share/openocd/scripts/interface/ti-icdi.cfg + /usr/local/share/openocd/scripts/target/stellaris_icdi.cfg + + There is also a script on the tools/ directory that I use to start + the OpenOCD daemon on my system called oocd.sh. That script will + probably require some modifications to work in another environment: + + - Possibly the value of OPENOCD_PATH and TARGET_PATH + - It assumes that the correct script to use is the one at + configs/dk-tm4c129x/tools/dk-tm4c129x.cfg + + Starting OpenOCD + + If you are in the top-level NuttX build directlory then you should + be able to start the OpenOCD daemon like: + + oocd.sh $PWD + + The relative path to the oocd.sh script is configs/dk-tm4c129x/tools, + but that should have been added to your PATH variable when you sourced + the setenv.sh script. + + Note that OpenOCD needs to be run with administrator privileges in + some environments (sudo). + + Connecting GDB + + Once the OpenOCD daemon has been started, you can connect to it via + GDB using the following GDB command: + + arm-nuttx-elf-gdb + (gdb) target remote localhost:3333 + + NOTE: The name of your GDB program may differ. For example, with the + CodeSourcery toolchain, the ARM GDB would be called arm-none-eabi-gdb. + + After starting GDB, you can load the NuttX ELF file: + + (gdb) symbol-file nuttx + (gdb) monitor reset + (gdb) monitor halt + (gdb) load nuttx + + NOTES: + + 1. Loading the symbol-file is only useful if you have built NuttX to + include debug symbols (by setting CONFIG_DEBUG_SYMBOLS=y in the + .config file). + 2. The MCU must be halted prior to loading code using 'mon reset' + as described below. + + OpenOCD will support several special 'monitor' commands. These + GDB commands will send comments to the OpenOCD monitor. Here + are a couple that you will need to use: + + (gdb) monitor reset + (gdb) monitor halt + + NOTES: + + 1. The MCU must be halted using 'mon halt' prior to loading code. + 2. Reset will restart the processor after loading code. + 3. The 'monitor' command can be abbreviated as just 'mon'. + +Buttons and LEDs +================ + + Buttons + ------- + There are three push buttons on the board. + + --- ------------ ----------------- + Pin Pin Function Jumper + --- ------------ ----------------- + PP1 Select SW4 J37 pins 1 and 2 + PN3 Up SW2 J37 pins 3 and 4 + PE5 Down SW3 J37 pins 5 and 6 + --- ------------ ----------------- + + LEDs + ---- + The development board has one tri-color user LED. + + --- ------------ ----------------- + Pin Pin Function Jumper + --- ------------ ----------------- + PN5 Red LED J36 pins 1 and 2 + PQ4 Blue LED J36 pins 3 and 4 + PQ7 Green LED J36 pins 5 and 6 + --- ------------ ----------------- + + If CONFIG_ARCH_LEDS is not defined, this LED is not used by the NuttX + logic. APIs are provided to support application control of the LED in + that case (in include/board.h and src/tm4c_userleds.c). + + If CONFIG_ARCH_LEDS is defined then the usage of the LEDs by Nuttx is + defined in include/board.h and src/tm4c_autoleds.c. The LEDs are used to + encode OS-related events as follows: + + SYMBOL Meaning LED state + ------------------- ----------------------- -------- -------- + LED_STARTED NuttX has been started Blue + LED_HEAPALLOCATE Heap has been allocated (No change) + LED_IRQSENABLED Interrupts enabled (No change) + LED_STACKCREATED Idle stack created Green + LED_INIRQ In an interrupt (No change) + LED_SIGNAL In a signal handler (No change) + LED_ASSERTION An assertion failed (No change) + LED_PANIC The system has crashed Blinking OFF/RED + LED_IDLE MCU is is sleep mode (Not used) + + Thus if the LED is GREEN then NuttX has successfully booted and is, + apparently, running normally. If the LED is flashing OFF/RED at + approximately 2Hz, then a fatal error has been detected and the + system has halted. + +Serial Console +============== + + By default, all configurations use UART0 which connects to the USB VCOM + on the DEBUG port on the TM4C123 ICDI interface: + + UART0 RX - PA.0 + UART0 TX - PA.1 + + However, if you use an external RS232 driver, then other options are + available. If your serial terminal loses connection with the USB serial + port each time you power cycle the board, the VCOM option can be very + painful. + + UART0 TTL level signals are also available at J3 (also at J1): + + DEBUG_TX - J3, pin 13. Labelled PA1 + DEBUG_RX - J3, pin 15. Labelled PA0 + + Remove the jumper between pins 13-14 and 15-16 to disconnect UART0 from + the TM4C123 ICDI chip; Connect your external RS-232 driver at pins 13 + and 16. 5v, 3.3v, AND GND are arvailable nearby at J10. + +Networking Support +================== + + Networking support via the can be added to NSH by selecting the following + configuration options. + + Selecting the EMAC peripheral + ----------------------------- + + System Type -> SAM34 Peripheral Support + CONFIG_TIVA_ETHERNET=y : Enable the EMAC peripheral + + System Type -> EMAC device driver options + CONFIG_TIVA_EMAC_NRXDESC=8 : Set aside some RX and TX descriptors/buffers + CONFIG_TIVA_EMAC_NTXDESC=4 + CONFIG_TIVA_AUTONEG=y : Use autonegotiation + CONFIG_TIVA_PHY_INTERNAL=y : Use the internal PHY + CONFIG_TIVA_BOARDMAC=y : Use the MAC address in the FLASH USER0/1 registers + + Networking Support + CONFIG_NET=y : Enable Neworking + CONFIG_NET_ETHERNET=y : Support Ethernet data link + CONFIG_NET_NOINTS=y : Should operative at non-interrupt level + CONFIG_NET_SOCKOPTS=y : Enable socket operations + CONFIG_NET_MULTIBUFFER=y : Multi-packet buffer option required + CONFIG_NET_ETH_MTU=590 : Maximum packet size (MTU) 1518 is more standard + CONFIG_NET_ETH_TCP_RECVWNDO=536 : Should be the same as CONFIG_NET_ETH_MTU + CONFIG_NET_ARP=y : Enable ARP + CONFIG_NET_ARPTAB_SIZE=16 : ARP table size + CONFIG_NET_ARP_IPIN=y : Enable ARP address harvesting + CONFIG_NET_ARP_SEND=y : Send ARP request before sending data + CONFIG_NET_TCP=y : Enable TCP/IP networking + CONFIG_NET_TCP_READAHEAD=y : Support TCP read-ahead + CONFIG_NET_TCP_WRITE_BUFFERS=y : Support TCP write-buffering + CONFIG_NET_TCPBACKLOG=y : Support TCP/IP backlog + CONFIG_NET_MAX_LISTENPORTS=20 : + CONFIG_NET_TCP_READAHEAD_BUFSIZE=536 Read-ahead buffer size + CONFIG_NET_UDP=y : Enable UDP networking + CONFIG_NET_BROADCAST=y : Needed for DNS name resolution + CONFIG_NET_ICMP=y : Enable ICMP networking + CONFIG_NET_ICMP_PING=y : Needed for NSH ping command + : Defaults should be okay for other options +f Application Configuration -> Network Utilities + CONFIG_NETDB_DNSCLIENT=y : Enable host address resolution + CONFIG_NETUTILS_TELNETD=y : Enable the Telnet daemon + CONFIG_NETUTILS_TFTPC=y : Enable TFTP data file transfers for get and put commands + CONFIG_NETUTILS_NETLIB=y : Network library support is needed + CONFIG_NETUTILS_WEBCLIENT=y : Needed for wget support + : Defaults should be okay for other options + Application Configuration -> NSH Library + CONFIG_NSH_TELNET=y : Enable NSH session via Telnet + CONFIG_NSH_IPADDR=0x0a000002 : Select a fixed IP address + CONFIG_NSH_DRIPADDR=0x0a000001 : IP address of gateway/host PC + CONFIG_NSH_NETMASK=0xffffff00 : Netmask + CONFIG_NSH_NOMAC=y : Need to make up a bogus MAC address + : Defaults should be okay for other options + + You can also enable enable the DHCPC client for networks that use + dynamically assigned address: + + Application Configuration -> Network Utilities + CONFIG_NETUTILS_DHCPC=y : Enables the DHCP client + + Networking Support + CONFIG_NET_UDP=y : Depends on broadcast UDP + + Application Configuration -> NSH Library + CONFIG_NET_BROADCAST=y + CONFIG_NSH_DHCPC=y : Tells NSH to use DHCPC, not + : the fixed addresses + + Using the network with NSH + -------------------------- + + So what can you do with this networking support? First you see that + NSH has several new network related commands: + + ifconfig, ifdown, ifup: Commands to help manage your network + get and put: TFTP file transfers + wget: HTML file transfers + ping: Check for access to peers on the network + Telnet console: You can access the NSH remotely via telnet. + + You can also enable other add on features like full FTP or a Web + Server or XML RPC and others. There are also other features that + you can enable like DHCP client (or server) or network name + resolution. + + By default, the IP address of the DK-TM4C129X will be 10.0.0.2 and + it will assume that your host is the gateway and has the IP address + 10.0.0.1. + + nsh> ifconfig + eth0 HWaddr 00:e0:de:ad:be:ef at UP + IPaddr:10.0.0.2 DRaddr:10.0.0.1 Mask:255.255.255.0 + + You can use ping to test for connectivity to the host (Careful, + Window firewalls usually block ping-related ICMP traffic). On the + target side, you can: + + nsh> ping 10.0.0.1 + PING 10.0.0.1 56 bytes of data + 56 bytes from 10.0.0.1: icmp_seq=1 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=2 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=3 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=4 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=5 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=6 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=7 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=8 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=9 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=10 time=0 ms + 10 packets transmitted, 10 received, 0% packet loss, time 10100 ms + + NOTE: In this configuration is is normal to have packet loss > 0% + the first time you ping due to the default handling of the ARP + table. + + On the host side, you should also be able to ping the DK-TM4C129X: + + $ ping 10.0.0.2 + + You can also log into the NSH from the host PC like this: + + $ telnet 10.0.0.2 + Trying 10.0.0.2... + Connected to 10.0.0.2. + Escape character is '^]'. + sh_telnetmain: Session [3] Started + + NuttShell (NSH) NuttX-6.31 + nsh> help + help usage: help [-v] [] + + [ echo ifconfig mkdir mw sleep + ? exec ifdown mkfatfs ping test + cat exit ifup mkfifo ps umount + cp free kill mkrd put usleep + cmp get losetup mh rm wget + dd help ls mount rmdir xd + df hexdump mb mv sh + + Builtin Apps: + nsh> + + NOTE: If you enable this networking as described above, you will + experience a delay on booting NSH. That is because the start-up logic + waits for the network connection to be established before starting + NuttX. In a real application, you would probably want to do the + network bringup on a separate thread so that access to the NSH prompt + is not delayed. + + This delay will be especially long if the board is not connected to + a network. On the order of minutes! You will probably think that + NuttX has crashed! And then, when it finally does come up after + numerous timeouts and retries, the network will not be available -- + even if the network cable is plugged in later. + + The long delays can be eliminated by using a separate the network + initialization thread discussed below. Recovering after the network + becomes available requires the network monitor feature, also discussed + below. + + Network Initialization Thread + ----------------------------- + There is a configuration option enabled by CONFIG_NSH_NETINIT_THREAD + that will do the NSH network bring-up asynchronously in parallel on + a separate thread. This eliminates the (visible) networking delay + altogether. This current implementation, however, has some limitations: + + - If no network is connected, the network bring-up will fail and + the network initialization thread will simply exit. There are no + retries and no mechanism to know if the network initialization was + successful (it could perform a network Ioctl to see if the link is + up and it now, keep trying, but it does not do that now). + + - Furthermore, there is currently no support for detecting loss of + network connection and recovery of the connection (similarly, this + thread could poll periodically for network status, but does not). + + Both of these shortcomings could be eliminated by enabling the network + monitor: + + Network Monitor + --------------- + By default the network initialization thread will bring-up the network + then exit, freeing all of the resources that it required. This is a + good behavior for systems with limited memory. + + If the CONFIG_NSH_NETINIT_MONITOR option is selected, however, then the + network initialization thread will persist forever; it will monitor the + network status. In the event that the network goes down (for example, if + a cable is removed), then the thread will monitor the link status and + attempt to bring the network back up. In this case the resources + required for network initialization are never released. + + Pre-requisites: + + - CONFIG_NSH_NETINIT_THREAD as described above. + + - CONFIG_TIVA_PHY_INTERRUPTS=y. The TM4C129X EMAC block supports PHY + interrupts. This is true whether the TM4C internal PHY is used or + if an external PHY is used. If this option is selected, then support + for the PHY interrupt will be built in and the following additional + settings will be automatically selected: + + CONFIG_NETDEV_PHY_IOCTL. Enable PHY IOCTL commands in the Ethernet + device driver. Special IOCTL commands must be provided by the Ethernet + driver to support certain PHY operations that will be needed for link + management. There operations are not complex and are implemented for + the Atmel SAMA5 family. + + CONFIG_ARCH_PHY_INTERRUPT. This is not a user selectable option. + Rather, it is set when you select a board that supports PHY + interrupts. In most architectures, the PHY interrupt is not + associated with the Ethernet driver at all; the Tiva architecture is + an exception. For most other architectures, the PHY interrupt is + provided via some board-specific GPIO. In any event, the board- + specific logic must provide support for the PHY interrupt. To do + this, the board logic must do two things: (1) It must provide the + function arch_phy_irq() as described and prototyped in the + nuttx/include/nuttx/arch.h, and (2) it must select + CONFIG_ARCH_PHY_INTERRUPT in the board configuration file to + advertise that it supports arch_phy_irq(). + + And a few other things: UDP support is required (CONFIG_NET_UDP) and + signals must not be disabled (CONFIG_DISABLE_SIGNALS). + + Given those prerequisites, the network monitor can be selected with these + additional settings. + + System Type -> Tiva Ethernet Configuration + CONFIG_TIVA_PHY_INTERRUPTS=y : Enable PHY interrupt support + CONFIG_ARCH_PHY_INTERRUPT=y : (auto-selected) + CONFIG_NETDEV_PHY_IOCTL=y : (auto-selected) + + Application Configuration -> NSH Library -> Networking Configuration + CONFIG_NSH_NETINIT_THREAD : Enable the network initialization thread + CONFIG_NSH_NETINIT_MONITOR=y : Enable the network monitor + CONFIG_NSH_NETINIT_RETRYMSEC=2000 : Configure the network monitor as you like + CONFIG_NSH_NETINIT_SIGNO=18 + +Timers +====== + + Tiva timers may be enbled in 32-bit periodic mode using these settings. + + This settings enables the "upper half" timer driver: + + Devices Drivers -> Timer Support + CONFIG_TIMER=y + + These settings enable Tiva timer driver support + + System Type -> Tiva/Stellaris Peripheral Support + CONFIG_TIVA_TIMER1=y : For timer 1 + + System Type -> Tiva Timer Configuration (using Timer 1) + CONFIG_TIVA_TIMER_32BIT=y + CONFIG_TIVA_TIMER32_PERIODIC=y + + These setting enable board-specific logic to initialize the timer logic + (using Timer 1): + + Board Selection -> Timer driver selection + CONFIG_DK_TM4C129X_TIMER1=y + CONFIG_DK_TM4C129X_TIMER_DEVNAME="/dev/timer0" + CONFIG_DK_TM4C129X_TIMER_TIMEOUT=10000 + + There is a simple example at apps/examples/timer that can be used to + exercise the timers. The following configuration options can be + selected to enable that example: + + Application Configure -> Examples -> Timer Example + CONFIG_EXAMPLES_TIMER=y + CONFIG_EXAMPLE_TIMER_DEVNAME="/dev/timer0" + CONFIG_EXAMPLE_TIMER_DELAY=100000 + CONFIG_EXAMPLE_TIMER_NSAMPLES=20 + +Temperature Sensor +================== + + TMP-1000 Temperature Sensor Driver + ---------------------------------- + Support for the on-board TMP-100 temperature sensor is available. This + uses the driver for the compatible LM-75 part. To set up the temperature + sensor, add the following to the NuttX configuration file: + + System Type -> Tiva/Stellaris Peripheral Selection + CONFIG_TIVA_I2C6=y + + Drivers -> I2C Support + CONFIG_I2C=y + + Drivers -> Sensors + CONFIG_LM75=y + CONFIG_I2C_LM75=y + + Applications -> NSH Library + CONFIG_NSH_ARCHINIT=y + + Then you can implement logic like the following to use the temperature sensor: + + #include + #include + + ret = tiva_tmp100_initialize("/dev/temp"); /* Register the temperature sensor */ + fd = open("/dev/temp", O_RDONLY); /* Open the temperature sensor device */ + ret = ioctl(fd, SNIOC_FAHRENHEIT, 0); /* Select Fahrenheit */ + bytesread = read(fd, buffer, 8*sizeof(b16_t)); /* Read (8) temperature samples */ + + More complex temperature sensor operations are also available. See the IOCTL + commands enumerated in include/nuttx/sensors/lm75.h. Also read the descriptions + of the tiva_tmp100_initialize() and tiva_tmp100_attach() interfaces in the + arch/board/board.h file (sames as configs/dk-tm4c129x/include/board.h). + + NSH Command Line Application + ---------------------------- + There is a tiny NSH command line application at examples/system/lm75 that + will read the current temperature from an LM75 compatible temperature sensor + and print the temperature on stdout in either units of degrees Fahrenheit or + Centigrade. This tiny command line application is enabled with the following + configuration options: + + Library + CONFIG_LIBM=y + CONFIG_LIBC_FLOATINGPOINT=y + + Applications -> NSH Library + CONFIG_NSH_ARCHINIT=y + + Applications -> System Add-Ons + CONFIG_SYSTEM_LM75=y + CONFIG_SYSTEM_LM75_DEVNAME="/dev/temp" + CONFIG_SYSTEM_LM75_FAHRENHEIT=y (or CENTIGRADE) + CONFIG_SYSTEM_LM75_STACKSIZE=1024 + CONFIG_SYSTEM_LM75_PRIORITY=100 + +DK-TM4129X Configuration Options +================================ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="tiva" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_TM4C129XNC + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=dk-tm4c129x (for the DK-TM4129X) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_DK_TM4C129X + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00008000 (32Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + There are configurations for disabling support for interrupts GPIO ports. + Only GPIOP and GPIOQ pins can be used as interrupting sources on the + TM4C129X. Additional interrupt support can be disabled if desired to + reduce memory footprint. + + CONFIG_TIVA_GPIOP_IRQS=y + CONFIG_TIVA_GPIOQ_IRQS=y + + TM4C129X specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + CONFIG_TIVA_SSI0 - Select to enable support for SSI0 + CONFIG_TIVA_SSI1 - Select to enable support for SSI1 + CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support. + Poll-waiting is recommended if the interrupt rate would be to + high in the interrupt driven case. + CONFIG_SSI_TXLIMIT - Write this many words to the Tx FIFO before + emptying the Rx FIFO. If the SPI frequency is high and this + value is large, then larger values of this setting may cause + Rx FIFO overrun errors. Default: half of the Tx FIFO size (4). + + CONFIG_TIVA_ETHERNET - This must be set (along with CONFIG_NET) + to build the Tiva Ethernet driver + CONFIG_TIVA_ETHLEDS - Enable to use Ethernet LEDs on the board. + CONFIG_TIVA_BOARDMAC - If the board-specific logic can provide + a MAC address (via tiva_ethernetmac()), then this should be selected. + CONFIG_TIVA_ETHHDUPLEX - Set to force half duplex operation + CONFIG_TIVA_ETHNOAUTOCRC - Set to suppress auto-CRC generation + CONFIG_TIVA_ETHNOPAD - Set to suppress Tx padding + CONFIG_TIVA_MULTICAST - Set to enable multicast frames + CONFIG_TIVA_PROMISCUOUS - Set to enable promiscuous mode + CONFIG_TIVA_BADCRC - Set to enable bad CRC rejection. + CONFIG_TIVA_DUMPPACKET - Dump each packet received/sent to the console. + +Configurations +============== + +Each DK-TM4C129X configuration is maintained in a +sub-directory and can be selected as follow: + + cd tools + ./configure.sh dk-tm4c129x/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + configuration enables the serial VCOM interfaces on UART0. Support for + builtin applications is enabled, but in the base configuration no + builtin applications are selected. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Windows + :CONFIG_WINDOWS_CYGWIN=y : Cygwin under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcry fro Windows (arm-none-eabi-gcc) + CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary + + 3. Default stack sizes are large and should really be tuned to reduce + the RAM footprint: + + CONFIG_SCHED_HPWORKSTACKSIZE=2048 + CONFIG_IDLETHREAD_STACKSIZE=1024 + CONFIG_USERMAIN_STACKSIZE=2048 + CONFIG_PTHREAD_STACK_DEFAULT=2048 + CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 + CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 + CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 + CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 + + 4. This configuration has the network enabled by default. See the + paragraph "Using the network with NSH" above). + + Networking can be easily be disabled or reconfigured (See see the + network related configuration settings above in the section entitled + "Networking"). + + By default, this configuration assumes a 10.0.0.xx network. It + uses a fixed IP address of 10.0.0.2 and assumes that the host is + at 10.0.0.1 and that the host provides the default router. The + network mask is 255.255.255.0. These address can be changed by + modifying the settings in the configuration. DHCPC can be enabled + be modifying this default configuration (See the "Networking" + section above). + + The network initialization thread is enabled in this example. NSH + will create a separate thread when it starts to initialize the + network. This eliminates start-up delays to bring the network. This + feature may be disabled by reverting the configuration described above + under "Network Initialization Thread" + + The persistent network monitor thread is also available in this + configuration. The network monitor will monitor changes in the + link status and gracefully take the network down when the link is + lost (for example, if the cable is disconnected) and bring the + network back up when the link becomes available again (for example, + if the cable is reconnected). The paragraph "Network Monitor" above + for additional information. + + 5. I2C6 and support for the on-board TMP-100 temperature sensor are + enabled. Also enabled is the NSH 'temp' command that will show the + current temperature on the command line like: + + nsh> temp + 80.60 degrees Fahrenheit + + [80.6 F in January. I love living in Costa Rica1] + + The default units is degrees Fahrenheit, but that is easily + reconfigured. See the discussin above in the paragraph entitled + "Temperature Sensor". + + ipv6: + ---- + This is another version of the NuttShell configuration. It is very + similar to the nsh configuration except that it has IPv6 enabled and + IPv4 disabled. Several network utilities that are not yet available + under IPv6 are disabled. + + NOTES: + + 1. As of 2015-01-23, this configuration was identical to the nsh + configuration other than using IPv6. So all of the notes above + regarding the nsh configuration apply. + + Telnet does not work with IPv6. + + 2. This configuration can be modified to that both IPv4 and IPv6 + are support. Here is a summary of the additional configuration + settings requird to support both IPv4 and IPv6: + + CONFIG_NET_IPv4=y + CONFIG_NET_ARP=y + CONFIG_NET_ARP_SEND=y (optional) + CONFIG_NET_ICMP=y + CONFIG_NET_ICMP_PING=y + + CONFIG_NETDB_DNSCLIENT=y + CONFIG_NETUTILS_TELNETD=y + + CONFIG_NSH_IPADDR=0x0a000002 + CONFIG_NSH_DRIPADDR=0x0a000001 + CONFIG_NSH_NETMASK=0xffffff00 + CONFIG_NSH_TELNET=y + + Then from NSH, you have both ping and ping6 commands: + + nsh> ping 10.0.0.1 + nsh> ping6 fc00::1 + + And from the host you can do similar: + + ping 10.0.0.2 + ping6 fc00::2 (Linux) + ping -6 fc00::2 (Windows cmd) + + and Telnet again works from the host: + + telnet 10.0.0.2 + + 3. You can enable IPv6 autonomous address configuration with the + following changes to the configuration: + + + CONFIG_NET_ICMPv6_AUTOCONF=y + + CONFIG_ICMPv6_AUTOCONF_DELAYMSEC=100 + + CONFIG_ICMPv6_AUTOCONF_MAXTRIES=5 + + - CONFIG_NSH_DRIPv6ADDR_1=0xfc00 + - CONFIG_NSH_DRIPv6ADDR_2=0x0000 + - CONFIG_NSH_DRIPv6ADDR_3=0x0000 + - CONFIG_NSH_DRIPv6ADDR_4=0x0000 + - CONFIG_NSH_DRIPv6ADDR_5=0x0000 + - CONFIG_NSH_DRIPv6ADDR_6=0x0000 + - CONFIG_NSH_DRIPv6ADDR_7=0x0000 + - CONFIG_NSH_DRIPv6ADDR_8=0x0001 + + - CONFIG_NSH_IPv6ADDR_1=0xfc00 + - CONFIG_NSH_IPv6ADDR_2=0x0000 + - CONFIG_NSH_IPv6ADDR_3=0x0000 + - CONFIG_NSH_IPv6ADDR_4=0x0000 + - CONFIG_NSH_IPv6ADDR_5=0x0000 + - CONFIG_NSH_IPv6ADDR_6=0x0000 + - CONFIG_NSH_IPv6ADDR_7=0x0000 + - CONFIG_NSH_IPv6ADDR_8=0x0002 + - CONFIG_NSH_IPv6NETMASK_1=0xffff + - CONFIG_NSH_IPv6NETMASK_2=0xffff + - CONFIG_NSH_IPv6NETMASK_3=0xffff + - CONFIG_NSH_IPv6NETMASK_4=0xffff + - CONFIG_NSH_IPv6NETMASK_5=0xffff + - CONFIG_NSH_IPv6NETMASK_6=0xffff + - CONFIG_NSH_IPv6NETMASK_7=0xffff + - CONFIG_NSH_IPv6NETMASK_8=0xff80 diff --git a/configs/dk-tm4c129x/include/board.h b/configs/dk-tm4c129x/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..75a0f7a4cfaefe6811296a735f499e1ce2cb4386 --- /dev/null +++ b/configs/dk-tm4c129x/include/board.h @@ -0,0 +1,283 @@ +/************************************************************************************ + * configs/dk-tm4c129x/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_DK_TM4C129X_INCLUDE_BOARD_H +#define __CONFIGS_DK_TM4C129X_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* Crystals on-board the DK-TM4C129X include: + * + * 1. 25.0MHz (Y2) is connected to OSC0/1 pins and is used as the run mode input to + * the PLL. + * 2. 32.768kHz (Y3) connected to XOSC0/1 and clocks the hibernation module. + */ + +#define SYSCON_RCC_XTAL SYSCON_RCC_XTAL16000KHZ /* On-board crystal is 25 MHz */ +#define XTAL_FREQUENCY 25000000 + +/* Frequencies of other clock sources */ + +#define PIOSC_FREQUENCY 16000000 /* Precision internal oscillator */ +#define RTCOSC_FREQUENCY 32768 /* Hibernation Module RTC Oscillator */ +#define LFIOSC_FREQUENCY 33000 /* Low frequency internal oscillator */ + +/* The PLL generates Fvco according to the following formulae. The input clock to + * the PLL may be either the external crystal (Fxtal) or PIOSC (Fpiosc). This + * logic supports only the external crystal as the PLL source clock. + * + * Fin = Fxtal / (Q + 1 )(N + 1) -OR- Fpiosc / (Q + 1)(N + 1) + * Mdiv = Mint + (MFrac / 1024) + * Fvco = Fin * Mdiv + * + * Where the register fields Q and N actually hold (Q-1) and (N-1). The following + * setup then generates Fvco = 480MHz: + * + * Fin = 25 MHz / 1 / 5 = 5 MHz + * Mdiv = 96 + * Fvco = 480 + */ + +#define BOARD_PLL_MINT 96 /* Integer part of PLL M value */ +#define BOARD_PLL_MFRAC 0 /* Fractional part of PLL M value */ +#define BOARD_PLL_N 5 /* PLL N value */ +#define BOARD_PLL_Q 1 /* PLL Q value */ + +#define BOARD_FVCO_FREQUENCY 480000000 /* Resulting Fvco */ + +/* When the PLL is active, the system clock frequency (SysClk) is calculated using + * the following equation: + * + * SysClk = Fvco/ (sysdiv + 1) + * + * The following setup generates Sysclk = 120MHz: + */ + +#define BOARD_PLL_SYSDIV 4 /* Sysclk = Fvco / 4 = 120MHz */ +#define SYSCLK_FREQUENCY 120000000 /* Resulting SysClk frequency */ + +/* Alternate Clock (ALTCLK) + * + * The ALTCLK provides a clock source of numerous frequencies to the general-purpose + * timer, SSI, and UART modules. The default source for the ALTCLK is the Precision + * Internal Oscillator (PIOSC). The Hibernation Real-time Clock (RTCOSC) and Low + * Frequency Internal Oscillator (LFIOSC) are alternatives. If the RTCOSC Output is + * selected, the clock source must also be enabled in the Hibernation module. + */ + +#define BOARD_ALTCLKCFG SYSCON_ALTCLKCFG_ALTCLK_PIOSC +#define ALTCLK_FREQUENCY PIOSC_FREQUENCY + +/* LED definitions ******************************************************************/ +/* The DK-TM4C129X has a single RGB LED. There is only one visible LED which + * will vary in color. But, from the standpoint of the firmware, this appears as + * three LEDs: + * + * --- ------------ ----------------- + * Pin Pin Function Jumper + * --- ------------ ----------------- + * PN5 Red LED J36 pins 1 and 2 + * PQ4 Blue LED J36 pins 3 and 4 + * PQ7 Green LED J36 pins 5 and 6 + * --- ------------ ----------------- + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED_R 0 +#define BOARD_LED_G 1 +#define BOARD_LED_B 2 +#define BOARD_NLEDS 3 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_R_BIT (1 << BOARD_LED_R) +#define BOARD_LED_G_BIT (1 << BOARD_LED_G) +#define BOARD_LED_B_BIT (1 << BOARD_LED_B) + +/* If CONFIG_ARCH_LEDS is defined, then automated support for the DK-TM4C129X LED + * will be included in the build: + */ + /* RED GREEN BLUE */ +#define LED_STARTED 0 /* OFF OFF ON */ +#define LED_HEAPALLOCATE 1 /* NC NC NC */ +#define LED_IRQSENABLED 1 /* NC NC NC */ +#define LED_STACKCREATED 2 /* OFF ON OFF */ +#define LED_INIRQ 1 /* NC NC NC */ +#define LED_SIGNAL 1 /* NC NC NC */ +#define LED_ASSERTION 1 /* NC NC NC */ +#define LED_PANIC 3 /* ON OFF OFF (flashing 2Hz) */ + +/* Button definitions ***************************************************************/ +/* There are three push buttons on the board. + * + * --- ------------ ----------------- + * Pin Pin Function Jumper + * --- ------------ ----------------- + * PP1 Select SW4 J37 pins 1 and 2 + * PN3 Up SW2 J37 pins 3 and 4 + * PE5 Down SW3 J37 pins 5 and 6 + * --- ------------ ----------------- + */ + +#define BUTTON_SW2 0 +#define BUTTON_SW3 1 +#define BUTTON_SW4 2 +#define NUM_BUTTONS 3 + +#define BUTTON_SW2_BIT (1 << BUTTON_SW2) +#define BUTTON_SW3_BIT (1 << BUTTON_SW3) +#define BUTTON_SW4_BIT (1 << BUTTON_SW4) + +/* Pin Multiplexing Disambiguation **************************************************/ +/* UARTs + * + * UART0: PA0-1 (fixed configuration) + * UART3: PJ0-1 to EM_TX/EM_RX or BOOSTER_PACK2_RX/BOOSTER_PACK2_TX(Depending + * on J12/J13) + * UART5: PH6-7 to BOOSTER_PACK1_RX/BOOSTER_PACK1_TX + */ + +#define GPIO_UART3_RX GPIO_UART3_RX_2 +#define GPIO_UART3_TX GPIO_UART3_TX_2 + +#define GPIO_UART5_RX GPIO_UART5_RX_2 +#define GPIO_UART5_TX GPIO_UART5_TX_2 + +/* SSI: + * + * SSI0: PA2-5 are used for SSI0 to the second booster pack (fixed configuration) + * SSI3: PF0/PF4-5/PH4/PQ0-2 are used for the SPI flash (on-board and SD card). + * PH4 selects the SD card and PQ1 selects the on-board SPI flash. + */ + +#define GPIO_SSI3_CLK GPIO_SSI3_CLK_2 +#define GPIO_SSI3_FSS GPIO_SSI3_FSS_2 +#define GPIO_SSI3_XDAT0 GPIO_SSI3_XDAT0_2 +#define GPIO_SSI3_XDAT1 GPIO_SSI3_XDAT1_1 +#define GPIO_SSI3_XDAT2 GPIO_SSI3_XDAT2_1 +#define GPIO_SSI3_XDAT3 GPIO_SSI3_XDAT3_1 + +/* I2C: + * + * I2C3: PG4-5 are provide to the BoostPack 1 interface + * I2C7: PA4-5 are provide to the BoostPack 2 interface + * I2C6: PB6-7 are used for I2C to the TMP100 and the EM connector. + * J18 and J20 must be closed to connect the TMP100. + * I2C address is 0x4A + */ + +#define GPIO_I2C3_SCL GPIO_I2C3_SCL_1 +#define GPIO_I2C3_SDA GPIO_I2C3_SDA_1 +#define GPIO_I2C7_SCL GPIO_I2C7_SCL_1 +#define GPIO_I2C7_SDA GPIO_I2C7_SDA_1 +#define GPIO_I2C6_SCL GPIO_I2C6_SCL_2 +#define GPIO_I2C6_SDA GPIO_I2C6_SDA_2 + +/* USB: + * + * PB0-1/PD6-7/PL6-7 are used for USB (Only PD6-7 are not fixed configuration) + */ + +#define GPIO_USB0_EPEN GPIO_USB0_EPEN_3 +#define GPIO_USB0_PFLT GPIO_USB0_PFLT_2 + +/* Ethernet LEDs + * + * PF1/PK4/PK6 are used for Ethernet LEDs. + * PK4/EN0RXD3/LED0 + * PK6/EN0TXD2/LED1 + * PF1/LED2 + */ + +# define GPIO_EN0_LED0 GPIO_EN0_LED0_2 +# define GPIO_EN0_LED1 GPIO_EN0_LED1_2 +# define GPIO_EN0_LED2 GPIO_EN0_LED2_1 + +/* LCD + * + * PF6-7/PJ6/PS4-5/PR0-7 are used for the LCD (fixed configuration). + */ + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Tiva architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void); + +/************************************************************************************ + * Name: tiva_tmp100_initialize + * + * Description: + * Initialize and register the TMP-100 Temperature Sensor driver. + * + * Input parameters: + * devpath - The full path to the driver to register. E.g., "/dev/temp0" + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ************************************************************************************/ + +#if defined(CONFIG_I2C) && defined(CONFIG_I2C_LM75) && defined(CONFIG_TIVA_I2C6) +int tiva_tmp100_initialize(FAR const char *devpath); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_DK_TM4C129X_INCLUDE_BOARD_H */ diff --git a/configs/dk-tm4c129x/ipv6/Make.defs b/configs/dk-tm4c129x/ipv6/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..4bfa5b11400afe41de3f33584ed83ca99b0e9592 --- /dev/null +++ b/configs/dk-tm4c129x/ipv6/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/dk-tm4c129x/ipv6/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/dk-tm4c129x/ipv6/defconfig b/configs/dk-tm4c129x/ipv6/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..fdd2e40140a2130dc433034c21f0f7387c93b559 --- /dev/null +++ b/configs/dk-tm4c129x/ipv6/defconfig @@ -0,0 +1,1159 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +CONFIG_ARCH_CHIP_TIVA=y +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_FPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_TM4C123GH6ZRB is not set +# CONFIG_ARCH_CHIP_TM4C123GH6PMI is not set +# CONFIG_ARCH_CHIP_TM4C1294NC is not set +CONFIG_ARCH_CHIP_TM4C129XNC=y +# CONFIG_ARCH_CHIP_CC3200 is not set +CONFIG_ARCH_CHIP_TM4C129=y +CONFIG_ARCH_CHIP_TM4C=y +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +CONFIG_TIVA_I2C=y +CONFIG_TIVA_HAVE_I2C1=y +CONFIG_TIVA_HAVE_I2C2=y +CONFIG_TIVA_HAVE_I2C3=y +CONFIG_TIVA_HAVE_I2C4=y +CONFIG_TIVA_HAVE_I2C5=y +CONFIG_TIVA_HAVE_I2C6=y +CONFIG_TIVA_HAVE_I2C7=y +CONFIG_TIVA_HAVE_I2C8=y +CONFIG_TIVA_HAVE_I2C9=y +CONFIG_TIVA_HAVE_UART3=y +CONFIG_TIVA_HAVE_UART4=y +CONFIG_TIVA_HAVE_UART5=y +CONFIG_TIVA_HAVE_UART6=y +CONFIG_TIVA_HAVE_UART7=y +CONFIG_TIVA_HAVE_SSI0=y +CONFIG_TIVA_HAVE_SSI1=y +CONFIG_TIVA_HAVE_SSI2=y +CONFIG_TIVA_HAVE_SSI3=y +CONFIG_TIVA_HAVE_ETHERNET=y +# CONFIG_TIVA_SSI is not set +# CONFIG_TIVA_TIMER is not set +CONFIG_TIVA_HAVE_TIMER3=y +CONFIG_TIVA_HAVE_TIMER4=y +CONFIG_TIVA_HAVE_TIMER5=y +CONFIG_TIVA_HAVE_TIMER6=y +CONFIG_TIVA_HAVE_TIMER7=y +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +# CONFIG_TIVA_I2C2 is not set +# CONFIG_TIVA_I2C3 is not set +# CONFIG_TIVA_I2C4 is not set +# CONFIG_TIVA_I2C5 is not set +CONFIG_TIVA_I2C6=y +# CONFIG_TIVA_I2C7 is not set +# CONFIG_TIVA_I2C8 is not set +# CONFIG_TIVA_I2C9 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_UART3 is not set +# CONFIG_TIVA_UART4 is not set +# CONFIG_TIVA_UART5 is not set +# CONFIG_TIVA_UART6 is not set +# CONFIG_TIVA_UART7 is not set +# CONFIG_TIVA_SSI0 is not set +# CONFIG_TIVA_SSI1 is not set +# CONFIG_TIVA_SSI2 is not set +# CONFIG_TIVA_SSI3 is not set +# CONFIG_TIVA_TIMER0 is not set +# CONFIG_TIVA_TIMER1 is not set +# CONFIG_TIVA_TIMER2 is not set +# CONFIG_TIVA_TIMER3 is not set +# CONFIG_TIVA_TIMER4 is not set +# CONFIG_TIVA_TIMER5 is not set +# CONFIG_TIVA_TIMER6 is not set +# CONFIG_TIVA_TIMER7 is not set +CONFIG_TIVA_ETHERNET=y +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +CONFIG_TIVA_GPIO_IRQS=y +# CONFIG_TIVA_HAVE_GPIOA_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOB_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOC_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOD_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOE_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOF_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOG_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOH_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +CONFIG_TIVA_HAVE_GPIOP_IRQS=y +CONFIG_TIVA_HAVE_GPIOQ_IRQS=y +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +CONFIG_TIVA_GPIOP_IRQS=y +# CONFIG_TIVA_GPIOQ_IRQS is not set + +# +# I2C Configuration +# +# CONFIG_TIVA_I2C_DYNTIMEO is not set +CONFIG_TIVA_I2C_TIMEOSEC=0 +CONFIG_TIVA_I2C_TIMEOMS=500 +CONFIG_TIVA_I2C_TIMEOTICKS=500 + +# +# Tiva Ethernet Configuration +# +CONFIG_TIVA_PHY_INTERNAL=y +CONFIG_TIVA_AUTONEG=y +CONFIG_TIVA_PHY_INTERRUPTS=y +CONFIG_TIVA_EMAC_NRXDESC=8 +CONFIG_TIVA_EMAC_NTXDESC=4 +# CONFIG_TIVA_EMAC_ENHANCEDDESC is not set +CONFIG_TIVA_BOARDMAC=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=11401 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=262144 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_DK_TM4C129X=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="dk-tm4c129x" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=24 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set +CONFIG_ARCH_PHY_INTERRUPT=y +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +CONFIG_SENSORS=y +# CONFIG_LIS331DL is not set +# CONFIG_SENSORS_ADXL345 is not set +CONFIG_I2C_LM75=y +CONFIG_LM75=y +# CONFIG_QENCODER is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y + +# +# Network Device Operations +# +CONFIG_NETDEV_PHY_IOCTL=y + +# +# Internet Protocol Selection +# +# CONFIG_NET_IPv4 is not set +CONFIG_NET_IPv6=y +CONFIG_NET_IPv6_NCONF_ENTRIES=8 + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_SOLINGER=y + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +# CONFIG_NET_UDP_READAHEAD is not set + +# +# ICMPv6 Networking Support +# +CONFIG_NET_ICMPv6=y +CONFIG_NET_ICMPv6_PING=y +CONFIG_NET_ICMPv6_NEIGHBOR=y +CONFIG_ICMPv6_NEIGHBOR_MAXTRIES=5 +CONFIG_ICMPv6_NEIGHBOR_DELAYMSEC=20 +# CONFIG_NET_ICMPv6_AUTOCONF is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=36 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +CONFIG_LIB_BOARDCTL=y + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT_THREAD=y +CONFIG_NSH_NETINIT_MONITOR=y +CONFIG_NSH_NETINIT_SIGNO=18 +CONFIG_NSH_NETINIT_RETRYMSEC=2000 +CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 +CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 + +# +# IP Address Configuration +# + +# +# Target IPv6 address +# +CONFIG_NSH_IPv6ADDR_1=0xfc00 +CONFIG_NSH_IPv6ADDR_2=0x0000 +CONFIG_NSH_IPv6ADDR_3=0x0000 +CONFIG_NSH_IPv6ADDR_4=0x0000 +CONFIG_NSH_IPv6ADDR_5=0x0000 +CONFIG_NSH_IPv6ADDR_6=0x0000 +CONFIG_NSH_IPv6ADDR_7=0x0000 +CONFIG_NSH_IPv6ADDR_8=0x0002 + +# +# Router IPv6 address +# +CONFIG_NSH_DRIPv6ADDR_1=0xfc00 +CONFIG_NSH_DRIPv6ADDR_2=0x0000 +CONFIG_NSH_DRIPv6ADDR_3=0x0000 +CONFIG_NSH_DRIPv6ADDR_4=0x0000 +CONFIG_NSH_DRIPv6ADDR_5=0x0000 +CONFIG_NSH_DRIPv6ADDR_6=0x0000 +CONFIG_NSH_DRIPv6ADDR_7=0x0000 +CONFIG_NSH_DRIPv6ADDR_8=0x0001 + +# +# IPv6 Network mask +# +CONFIG_NSH_IPv6NETMASK_1=0xffff +CONFIG_NSH_IPv6NETMASK_2=0xffff +CONFIG_NSH_IPv6NETMASK_3=0xffff +CONFIG_NSH_IPv6NETMASK_4=0xffff +CONFIG_NSH_IPv6NETMASK_5=0xffff +CONFIG_NSH_IPv6NETMASK_6=0xffff +CONFIG_NSH_IPv6NETMASK_7=0xffff +CONFIG_NSH_IPv6NETMASK_8=0xff80 +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# CU Minimal Terminal +# +# CONFIG_SYSTEM_CUTERM is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=6 +CONFIG_I2CTOOL_MAXBUS=6 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=400000 + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# +# CONFIG_SYSTEM_MDIO is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# Temperature +# +CONFIG_SYSTEM_LM75=y +CONFIG_SYSTEM_LM75_DEVNAME="/dev/temp" +CONFIG_SYSTEM_LM75_FAHRENHEIT=y +# CONFIG_SYSTEM_LM75_CENTIGRADE is not set +CONFIG_SYSTEM_LM75_STACKSIZE=1024 +CONFIG_SYSTEM_LM75_PRIORITY=100 + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/dk-tm4c129x/ipv6/setenv.sh b/configs/dk-tm4c129x/ipv6/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..602357a5ad4b364a32d871953f42767c95203026 --- /dev/null +++ b/configs/dk-tm4c129x/ipv6/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/dk-tm4c129x/ipv6/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The dk-tm4c129x/tools directory +export TOOL_DIR="${WD}/configs/dk-tm4c129x/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/dk-tm4c129x/nsh/Make.defs b/configs/dk-tm4c129x/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f4cb4a1c4253b9a2449b4eff0b375036d49595d5 --- /dev/null +++ b/configs/dk-tm4c129x/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/dk-tm4c129x/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/dk-tm4c129x/nsh/defconfig b/configs/dk-tm4c129x/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..158188fc44b4a18132eea87b3a1d9b79d53b9847 --- /dev/null +++ b/configs/dk-tm4c129x/nsh/defconfig @@ -0,0 +1,1128 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +CONFIG_ARCH_CHIP_TIVA=y +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_TM4C123GH6ZRB is not set +# CONFIG_ARCH_CHIP_TM4C123GH6PMI is not set +# CONFIG_ARCH_CHIP_TM4C1294NC is not set +CONFIG_ARCH_CHIP_TM4C129XNC=y +# CONFIG_ARCH_CHIP_CC3200 is not set +CONFIG_ARCH_CHIP_TM4C129=y +CONFIG_ARCH_CHIP_TM4C=y +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +CONFIG_TIVA_HAVE_ADC0=y +CONFIG_TIVA_HAVE_ADC1=y +CONFIG_TIVA_I2C=y +CONFIG_TIVA_HAVE_I2C1=y +CONFIG_TIVA_HAVE_I2C2=y +CONFIG_TIVA_HAVE_I2C3=y +CONFIG_TIVA_HAVE_I2C4=y +CONFIG_TIVA_HAVE_I2C5=y +CONFIG_TIVA_HAVE_I2C6=y +CONFIG_TIVA_HAVE_I2C7=y +CONFIG_TIVA_HAVE_I2C8=y +CONFIG_TIVA_HAVE_I2C9=y +CONFIG_TIVA_HAVE_UART3=y +CONFIG_TIVA_HAVE_UART4=y +CONFIG_TIVA_HAVE_UART5=y +CONFIG_TIVA_HAVE_UART6=y +CONFIG_TIVA_HAVE_UART7=y +CONFIG_TIVA_HAVE_SSI0=y +CONFIG_TIVA_HAVE_SSI1=y +CONFIG_TIVA_HAVE_SSI2=y +CONFIG_TIVA_HAVE_SSI3=y +CONFIG_TIVA_HAVE_ETHERNET=y +# CONFIG_TIVA_SSI is not set +# CONFIG_TIVA_TIMER is not set +CONFIG_TIVA_HAVE_TIMER0=y +CONFIG_TIVA_HAVE_TIMER1=y +CONFIG_TIVA_HAVE_TIMER2=y +CONFIG_TIVA_HAVE_TIMER3=y +CONFIG_TIVA_HAVE_TIMER4=y +CONFIG_TIVA_HAVE_TIMER5=y +CONFIG_TIVA_HAVE_TIMER6=y +CONFIG_TIVA_HAVE_TIMER7=y +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_ADC1 is not set +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +# CONFIG_TIVA_I2C2 is not set +# CONFIG_TIVA_I2C3 is not set +# CONFIG_TIVA_I2C4 is not set +# CONFIG_TIVA_I2C5 is not set +CONFIG_TIVA_I2C6=y +# CONFIG_TIVA_I2C7 is not set +# CONFIG_TIVA_I2C8 is not set +# CONFIG_TIVA_I2C9 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_UART3 is not set +# CONFIG_TIVA_UART4 is not set +# CONFIG_TIVA_UART5 is not set +# CONFIG_TIVA_UART6 is not set +# CONFIG_TIVA_UART7 is not set +# CONFIG_TIVA_SSI0 is not set +# CONFIG_TIVA_SSI1 is not set +# CONFIG_TIVA_SSI2 is not set +# CONFIG_TIVA_SSI3 is not set +# CONFIG_TIVA_TIMER0 is not set +# CONFIG_TIVA_TIMER1 is not set +# CONFIG_TIVA_TIMER2 is not set +# CONFIG_TIVA_TIMER3 is not set +# CONFIG_TIVA_TIMER4 is not set +# CONFIG_TIVA_TIMER5 is not set +# CONFIG_TIVA_TIMER6 is not set +# CONFIG_TIVA_TIMER7 is not set +CONFIG_TIVA_ETHERNET=y +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +CONFIG_TIVA_GPIO_IRQS=y +# CONFIG_TIVA_HAVE_GPIOA_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOB_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOC_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOD_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOE_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOF_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOG_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOH_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +CONFIG_TIVA_HAVE_GPIOP_IRQS=y +CONFIG_TIVA_HAVE_GPIOQ_IRQS=y +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +CONFIG_TIVA_GPIOP_IRQS=y +# CONFIG_TIVA_GPIOQ_IRQS is not set + +# +# I2C Configuration +# +# CONFIG_TIVA_I2C_DYNTIMEO is not set +CONFIG_TIVA_I2C_TIMEOSEC=0 +CONFIG_TIVA_I2C_TIMEOMS=500 +CONFIG_TIVA_I2C_TIMEOTICKS=500 + +# +# Ethernet Configuration +# +CONFIG_TIVA_PHY_INTERNAL=y +CONFIG_TIVA_AUTONEG=y +CONFIG_TIVA_PHY_INTERRUPTS=y +CONFIG_TIVA_EMAC_NRXDESC=8 +CONFIG_TIVA_EMAC_NTXDESC=4 +# CONFIG_TIVA_EMAC_ENHANCEDDESC is not set +CONFIG_TIVA_BOARDMAC=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=11401 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=262144 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_DK_TM4C129X=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="dk-tm4c129x" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=24 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set +CONFIG_ARCH_PHY_INTERRUPT=y +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +CONFIG_SENSORS=y +# CONFIG_AS5048B is not set +# CONFIG_BMP180 is not set +# CONFIG_LIS331DL is not set +# CONFIG_MB7040 is not set +# CONFIG_MS58XX is not set +CONFIG_MS58XX_VDD=30 +# CONFIG_MPL115A is not set +# CONFIG_SENSORS_ADXL345 is not set +# CONFIG_MAX31855 is not set +# CONFIG_MAX6675 is not set +CONFIG_I2C_LM75=y +CONFIG_LM75=y +# CONFIG_LM92 is not set +# CONFIG_QENCODER is not set +# CONFIG_ZEROCROSS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +CONFIG_NETDEV_PHY_IOCTL=y + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_SOLINGER=y + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +# CONFIG_NET_UDP_CHECKSUMS is not set +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +CONFIG_NET_ARP_IPIN=y +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=36 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT_THREAD=y +CONFIG_NSH_NETINIT_MONITOR=y +CONFIG_NSH_NETINIT_SIGNO=18 +CONFIG_NSH_NETINIT_RETRYMSEC=2000 +CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 +CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=6 +CONFIG_I2CTOOL_MAXBUS=6 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=400000 +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_MDIO is not set +# CONFIG_SYSTEM_SUDOKU is not set +CONFIG_SYSTEM_LM75=y +CONFIG_SYSTEM_LM75_DEVNAME="/dev/temp" +CONFIG_SYSTEM_LM75_FAHRENHEIT=y +# CONFIG_SYSTEM_LM75_CENTIGRADE is not set +CONFIG_SYSTEM_LM75_STACKSIZE=1024 +CONFIG_SYSTEM_LM75_PRIORITY=100 +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/dk-tm4c129x/nsh/setenv.sh b/configs/dk-tm4c129x/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..0d2841b39cf909532028ef051a6a0d669af89609 --- /dev/null +++ b/configs/dk-tm4c129x/nsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/dk-tm4c129x/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The dk-tm4c129x/tools directory +export TOOL_DIR="${WD}/configs/dk-tm4c129x/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/dk-tm4c129x/scripts/ld.script b/configs/dk-tm4c129x/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..bfb0996f32d71788ffc2892888b92d550dc05336 --- /dev/null +++ b/configs/dk-tm4c129x/scripts/ld.script @@ -0,0 +1,115 @@ +/**************************************************************************** + * configs/dk-tm4c129x/scripts/ld.script + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The TM4C129XNCZAD has 1024Kib of FLASH beginning at address 0x0000:0000 and + * 256Kib of SRAM beginning at 0x2000:0000. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 1M + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 256K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/dk-tm4c129x/src/.gitignore b/configs/dk-tm4c129x/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/dk-tm4c129x/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/dk-tm4c129x/src/Makefile b/configs/dk-tm4c129x/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..28541cb38cc56826782089b801af2e02511d3f3d --- /dev/null +++ b/configs/dk-tm4c129x/src/Makefile @@ -0,0 +1,69 @@ +############################################################################ +# configs/dk-tm4c129x/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = tm4c_boot.c tm4c_bringup.c tm4c_ssi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += tm4c_autoleds.c +else +CSRCS += tm4c_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += tm4c_buttons.c +endif + +ifeq ($(CONFIG_TIVA_ETHERNET),y) +CSRCS += tm4c_ethernet.c +endif + +ifeq ($(CONFIG_DK_TM4C129X_TIMER),y) +CSRCS += tm4c_timer.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += tm4c_appinit.c +endif + +ifeq ($(CONFIG_I2C_LM75),y) +ifeq ($(CONFIG_TIVA_I2C6),y) +CSRCS += tm4c_tmp100.c +endif +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/dk-tm4c129x/src/dk-tm4c129x.h b/configs/dk-tm4c129x/src/dk-tm4c129x.h new file mode 100644 index 0000000000000000000000000000000000000000..5f0b89a707941fbf0976e1d8b25d79819fd4905c --- /dev/null +++ b/configs/dk-tm4c129x/src/dk-tm4c129x.h @@ -0,0 +1,193 @@ +/************************************************************************************ + * configs/dk-tm4c129x/src/dk-tm4c129x.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_DK_TM4C129X_DK_TM4C129X_H +#define __CONFIGS_DK_TM4C129X_DK_TM4C129X_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include "chip.h" +#include "tiva_gpio.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +/* How many SSI modules does this chip support? */ + +#if TIVA_NSSI < 1 +# undef CONFIG_TIVA_SSI0 +# undef CONFIG_TIVA_SSI0 +#elif TIVA_NSSI < 2 +# undef CONFIG_TIVA_SSI0 +#endif + +/* Do we need to register I2C drivers on behalf of the I2C tool? */ + +#define HAVE_I2CTOOL 1 +#if !defined(CONFIG_SYSTEM_I2CTOOL) || !defined(CONFIG_I2C_DRIVER) +# undef HAVE_I2CTOOL +#endif + +/* LED definitions ******************************************************************/ +/* The TMC4C123G LaunchPad has a single RGB LED. There is only one visible LED which + * will vary in color. But, from the standpoint of the firmware, this appears as + * three LEDs: + * + * --- ------------ ----------------- + * Pin Pin Function Jumper + * --- ------------ ----------------- + * PN5 Red LED J36 pins 1 and 2 + * PQ4 Blue LED J36 pins 3 and 4 + * PQ7 Green LED J36 pins 5 and 6 + * --- ------------ ----------------- + * + * A high output illuminates the LED. + */ + +#define GPIO_LED_R (GPIO_FUNC_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTN | GPIO_PIN_5) +#define GPIO_LED_G (GPIO_FUNC_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTQ | GPIO_PIN_7) +#define GPIO_LED_B (GPIO_FUNC_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTQ | GPIO_PIN_4) + +/* Button definitions ***************************************************************/ +/* There are three push buttons on the board. + * + * --- ------------ ----------------- + * Pin Pin Function Jumper + * --- ------------ ----------------- + * PP1 Select SW4 J37 pins 1 and 2 + * PN3 Up SW2 J37 pins 3 and 4 + * PE5 Down SW3 J37 pins 5 and 6 + * --- ------------ ----------------- + * + * Interrupts are supported only on port P and Q so only SW4 interrupts are supported. + */ + +#define GPIO_SW2 (GPIO_FUNC_INPUT | GPIO_PORTE | GPIO_PIN_5) +#define GPIO_SW3 (GPIO_FUNC_INPUT | GPIO_PORTN | GPIO_PIN_3) +#define GPIO_SW4 (GPIO_FUNC_INPUT | GPIO_INT_BOTHEDGES | GPIO_PORTP | GPIO_PIN_1) + +#define IRQ_SW4 TIVA_IRQ_GPIOP_1 + +/* SPI Chip selects ****************************************************************/ +/* SSI0: PA3 is used for SSI0 chip select to the second booster pack (No pull- +* ups) + * SSI3: PH4 selects the SD card and PQ1 selects the on-board SPI flash. Both + * pulled up on board. + */ + +#define GPIO_BSTR2_CS (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STDWPU | GPIO_STRENGTH_4MA | \ + GPIO_VALUE_ONE | GPIO_PORTA | GPIO_PIN_3) +#define GPIO_FLASH_CS (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STD | GPIO_STRENGTH_4MA | \ + GPIO_VALUE_ONE | GPIO_PORTH | GPIO_PIN_4) +#define GPIO_SD_CS (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STD | GPIO_STRENGTH_4MA | \ + GPIO_VALUE_ONE | GPIO_PORTH | GPIO_PIN_4) + +/* I2C *****************************************************************************/ +/* I2C3: PG4-5 are provide to the BoostPack 1 interface + * I2C7: PA4-5 are provide to the BoostPack 2 interface + * I2C6: PB6-7 are used for I2C to the TMP100 and the EM connector. + * J18 and J20 must be closed to connect the TMP100. + * I2C address is 0x4A + */ + +#define TMP100_I2CBUS 6 +#define TMP100_I2CADDR 0x4a + +/* Speaker outputs *****************************************************************/ +/* PB2/PD4 are used for the speaker output */ + +/* Touchscreen *********************************************************************/ +/* PE7/PP7/PT2-3 are used for the touch screen */ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: tm4c_ssidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the DK-TM4C129X. + * + ************************************************************************************/ + +void weak_function tm4c_ssidev_initialize(void); + +/**************************************************************************** + * Name: tm4c_led_initialize + * + * Description: + * Called to initialize the on-board LEDs. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void tm4c_led_initialize(void); +#endif + +/**************************************************************************** + * Name: tm4c_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int tm4c_bringup(void); + +/**************************************************************************** + * Name: tiva_timer_initialize + * + * Description: + * Configure the timer driver + * + ****************************************************************************/ + +#ifdef CONFIG_DK_TM4C129X_TIMER +int tiva_timer_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_DK_TM4C129X_DK_TM4C129X_H */ + diff --git a/configs/dk-tm4c129x/src/tm4c_appinit.c b/configs/dk-tm4c129x/src/tm4c_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..bd6c1b4b6b9fc6ea61843b34afd96791c8104ca0 --- /dev/null +++ b/configs/dk-tm4c129x/src/tm4c_appinit.c @@ -0,0 +1,69 @@ +/**************************************************************************** + * config/dk-tm4c129x/src/tm4c_appinit.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "dk-tm4c129x.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + /* If CONFIG_BOARD_INITIALIZE is selected then board initialization was + * already performed in board_initialize. + */ + +#ifndef CONFIG_BOARD_INITIALIZE + return tm4c_bringup(); +#else + return OK; +#endif +} diff --git a/configs/dk-tm4c129x/src/tm4c_autoleds.c b/configs/dk-tm4c129x/src/tm4c_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..782e9d42c4b2c7ddbdad5978338675d2eb5bd315 --- /dev/null +++ b/configs/dk-tm4c129x/src/tm4c_autoleds.c @@ -0,0 +1,160 @@ +/**************************************************************************** + * configs/dk-tm4c129x/src/tm4c_autoleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "tiva_gpio.h" +#include "dk-tm4c129x.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tm4c_led_initialize + * + * Description: + * Called to initialize the on-board LEDs. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void tm4c_led_initialize(void) +{ + /* Configure LED PIOs for output */ + + tiva_configgpio(GPIO_LED_R); + tiva_configgpio(GPIO_LED_G); + tiva_configgpio(GPIO_LED_B); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + /* --------------- ------- ---- ----- -------------------- + * STATE VALUE RED GREEN BLUE + * --------------- ------- ---- ----- -------------------- + * LED_STARTED 0 OFF OFF ON + * LED_HEAPALLOCATE 1 NC NC NC + * LED_IRQSENABLED 1 NC NC NC + * LED_STACKCREATED 2 OFF ON OFF + * LED_INIRQ 1 NC NC NC + * LED_SIGNAL 1 NC NC NC + * LED_ASSERTION 1 NC NC NC + * LED_PANIC 3 ON OFF OFF (flashing 2Hz) + * --------------- ------- ---- ----- -------------------- + * + * A high output illuminates the LED. + */ + + switch (led) + { + case 0: /* R=OFF, G=OFF, B=ON */ + /* Previous state was all OFF */ + + tiva_gpiowrite(GPIO_LED_B, true); + break; + + default: + case 1: /* No change */ + break; + + case 2: /* R=OFF, G=ON, B=OFF */ + /* Previous state was all: R=OFF, G=OFF, B=ON */ + + tiva_gpiowrite(GPIO_LED_G, true); + tiva_gpiowrite(GPIO_LED_B, false); + break; + + case 3: /* R=ON, G=OFF, B=OFF */ + /* Previous state was all: R=OFF, G=Unknown, B=Unknown */ + + tiva_gpiowrite(GPIO_LED_R, true); + tiva_gpiowrite(GPIO_LED_G, false); + tiva_gpiowrite(GPIO_LED_B, false); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + /* --------------- ------- ---- ----- -------------------- + * STATE VALUE RED GREEN BLUE + * --------------- ------- ---- ----- -------------------- + * LED_STARTED 0 OFF OFF ON + * LED_HEAPALLOCATE 1 NC NC NC + * LED_IRQSENABLED 1 NC NC NC + * LED_STACKCREATED 2 OFF ON OFF + * LED_INIRQ 1 NC NC NC + * LED_SIGNAL 1 NC NC NC + * LED_ASSERTION 1 NC NC NC + * LED_PANIC 3 ON OFF OFF (flashing 2Hz) + * --------------- ------- ---- ----- -------------------- + * + * A high output illuminates the LED. + */ + + switch (led) + { + case 0: /* Will not happen */ + case 1: /* No change */ + case 2: /* Will not happen */ + default: + break; + + case 3: /* R=OFF, G=OFF, B=OFF */ + /* Previous state was all: R=ON, G=OFF, B=OFF */ + + tiva_gpiowrite(GPIO_LED_R, false); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/dk-tm4c129x/src/tm4c_boot.c b/configs/dk-tm4c129x/src/tm4c_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..96d42b8f0e0b7c82c23509d2a36a2d956ff86d66 --- /dev/null +++ b/configs/dk-tm4c129x/src/tm4c_boot.c @@ -0,0 +1,115 @@ +/************************************************************************************ + * configs/dk-tm4c129x/src/tm4c_boot.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "dk-tm4c129x.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Tiva architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SSI is not disabled, and 2) the weak function + * tm4c_ssidev_initialize() has been brought into the link. + */ + + /* The DK-TM4C129X microSD CS and OLED are on SSI0 */ + +#if defined(CONFIG_TIVA_SSI0) || defined(CONFIG_TIVA_SSI1) + if (tm4c_ssidev_initialize) + { + tm4c_ssidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + tm4c_led_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform board initialization */ + + (void)tm4c_bringup(); +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/dk-tm4c129x/src/tm4c_bringup.c b/configs/dk-tm4c129x/src/tm4c_bringup.c new file mode 100644 index 0000000000000000000000000000000000000000..16ebb76ed9eee6ba78efd2944cbab7a72e6f1239 --- /dev/null +++ b/configs/dk-tm4c129x/src/tm4c_bringup.c @@ -0,0 +1,192 @@ +/**************************************************************************** + * config/dk-tm4c129x/src/tm4c_bringup.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "tiva_i2c.h" +#include "dk-tm4c129x.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#if defined(CONFIG_I2C) && defined(CONFIG_I2C_LM75) && defined(CONFIG_TIVA_I2C6) +# define HAVE_TMP100 +#endif + +#ifdef CONFIG_DK_TM4C129X_TIMER +# define HAVE_TIMER +#endif + +#ifdef CONFIG_SYSTEM_LM75_DEVNAME +# define TMP100_DEVNAME CONFIG_SYSTEM_LM75_DEVNAME +#else +# define TMP100_DEVNAME "/dev/temp" +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tm4c_i2c_register + * + * Description: + * Register one I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void tm4c_i2c_register(int bus) +{ + FAR struct i2c_master_s *i2c; + int ret; + + i2c = tiva_i2cbus_initialize(bus); + if (i2c == NULL) + { + dbg("ERROR: Failed to get I2C%d interface\n", bus); + } + else + { + ret = i2c_register(i2c, bus); + if (ret < 0) + { + dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); + tiva_i2cbus_uninitialize(i2c); + } + } +} +#endif + +/**************************************************************************** + * Name: tm4c_i2ctool + * + * Description: + * Register I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void tm4c_i2ctool(void) +{ +#ifdef CONFIG_TIVA_I2C0 + tm4c_i2c_register(0); +#endif +#ifdef CONFIG_TIVA_I2C1 + tm4c_i2c_register(1); +#endif +#ifdef CONFIG_TIVA_I2C2 + tm4c_i2c_register(2); +#endif +#ifdef CONFIG_TIVA_I2C3 + tm4c_i2c_register(3); +#endif +#ifdef CONFIG_TIVA_I2C4 + tm4c_i2c_register(4); +#endif +#ifdef CONFIG_TIVA_I2C5 + tm4c_i2c_register(5); +#endif +#ifdef CONFIG_TIVA_I2C6 + tm4c_i2c_register(6); +#endif +#ifdef CONFIG_TIVA_I2C7 + tm4c_i2c_register(7); +#endif +#ifdef CONFIG_TIVA_I2C8 + tm4c_i2c_register(8); +#endif +#ifdef CONFIG_TIVA_I2C9 + tm4c_i2c_register(9); +#endif +} +#else +# define tm4c_i2ctool() +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tm4c_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int tm4c_bringup(void) +{ +#if defined(HAVE_TMP100) || defined(HAVE_TIMER) + int ret; +#endif + + /* Register I2C drivers on behalf of the I2C tool */ + + tm4c_i2ctool(); + +#ifdef HAVE_TMP100 + /* Initialize and register the TMP-100 Temperature Sensor driver. */ + + ret = tiva_tmp100_initialize(TMP100_DEVNAME); + if (ret < 0) + { + dbg("ERROR: Failed to initialize TMP100 driver: %d\n", ret); + } +#endif + +#ifdef HAVE_TIMER + /* Initialize the timer driver */ + + ret = tiva_timer_initialize(); + if (ret < 0) + { + dbg("ERROR: Failed to initialize timer driver: %d\n", ret); + } +#endif + + return OK; +} diff --git a/configs/dk-tm4c129x/src/tm4c_buttons.c b/configs/dk-tm4c129x/src/tm4c_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..829891e7d5ece194f5c801f484fde9eafee00ff8 --- /dev/null +++ b/configs/dk-tm4c129x/src/tm4c_buttons.c @@ -0,0 +1,192 @@ +/**************************************************************************** + * configs/dk-tm4c/src/tm4c_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include +#include + +#include "dk-tm4c129x.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each STM3210E-EVAL button. This array is indexed by + * the BUTTON_* and JOYSTICK_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_SW2, GPIO_SW3, GPIO_SW4 +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + tiva_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed. */ + + bool released = tiva_gpioread(g_buttons[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT and JOYSTICK_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_TIVA_GPIOP_IRQS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + static xcpt_t handler = NULL; + xcpt_t oldhandler = handler; + irqstate_t flags; + int ret; + + /* Interrupts are supported only on ports P and Q and, hence, only on button SW4 */ + + if (id >= BUTTON_SW4) + { + /* The following should be atomic */ + + flags = enter_critical_section(); + + /* Detach and disable the button interrupt */ + + up_disable_irq(IRQ_SW4); + irq_detach(IRQ_SW4); + handler = NULL; + + /* Attach the new handler if so requested */ + + if (irqhandler) + { + ret = irq_attach(IRQ_SW4, irqhandler); + if (ret == OK) + { + handler = irqhandler; + up_enable_irq(IRQ_SW4); + } + } + + leave_critical_section(flags); + } + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/dk-tm4c129x/src/tm4c_ethernet.c b/configs/dk-tm4c129x/src/tm4c_ethernet.c new file mode 100644 index 0000000000000000000000000000000000000000..9394a4522b000c711653bf2da6910b3379270f63 --- /dev/null +++ b/configs/dk-tm4c129x/src/tm4c_ethernet.c @@ -0,0 +1,99 @@ +/************************************************************************************ + * configs/dk-tm4c129x/src/tm4c_ethernet.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "chip/tiva_flash.h" +#include "tiva_ethernet.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_ethernetmac + * + * Description: + * For the Ethernet Eval Kits, the MAC address will be stored in the non-volatile + * USER0 and USER1 registers. If CONFIG_TIVA_BOARDMAC is defined, this function + * will obtain the MAC address from these registers. + * + ************************************************************************************/ + +#ifdef CONFIG_TIVA_BOARDMAC +void tiva_ethernetmac(struct ether_addr *ethaddr) +{ + uint32_t user0; + uint32_t user1; + + /* Get the current value of the user registers */ + + user0 = getreg32(TIVA_FLASH_USERREG0); + user1 = getreg32(TIVA_FLASH_USERREG1); + + nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff); + DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff); + + /* Re-format that MAC address the way that uIP expects to see it */ + + ethaddr->ether_addr_octet[0] = ((user0 >> 0) & 0xff); + ethaddr->ether_addr_octet[1] = ((user0 >> 8) & 0xff); + ethaddr->ether_addr_octet[2] = ((user0 >> 16) & 0xff); + ethaddr->ether_addr_octet[3] = ((user1 >> 0) & 0xff); + ethaddr->ether_addr_octet[4] = ((user1 >> 8) & 0xff); + ethaddr->ether_addr_octet[5] = ((user1 >> 16) & 0xff); +} +#endif diff --git a/configs/dk-tm4c129x/src/tm4c_ssi.c b/configs/dk-tm4c129x/src/tm4c_ssi.c new file mode 100644 index 0000000000000000000000000000000000000000..6c2b0f86ae5cf2805fdf59131593e424cd7ce041 --- /dev/null +++ b/configs/dk-tm4c129x/src/tm4c_ssi.c @@ -0,0 +1,132 @@ +/************************************************************************************ + * configs/dk-tm4c129x/src/tm4c_ssi.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "tiva_gpio.h" +#include "dk-tm4c129x.h" + +/* The DK-TM4C129X microSD CS is on SSI0 */ + +#if defined(CONFIG_TIVA_SSI0) || defined(CONFIG_TIVA_SSI1) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* CONFIG_DEBUG_SPI enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifdef CONFIG_DEBUG_SPI +# define ssidbg lldbg +#else +# define ssidbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE) +# define ssivdbg lldbg +# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m) +#else +# define ssivdbg(x...) +# define ssi_dumpgpio(m) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tm4c_ssidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the DK-TM4C129X. + * + ************************************************************************************/ + +void weak_function tm4c_ssidev_initialize(void) +{ +} + +/**************************************************************************** + * The external functions, tiva_ssiselect and tiva_ssistatus must be provided + * by board-specific logic. The are implementations of the select and status + * methods SPI interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * All othermethods (including tiva_ssibus_initialize()) are provided by common + * logic. To use this common SPI logic on your board: + * + * 1. Provide tiva_ssiselect() and tiva_ssistatus() functions in your + * board-specific logic. This function will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 2. Add a call to tiva_ssibus_initialize() in your low level initialization + * logic + * 3. The handle returned by tiva_ssibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssi_dumpgpio("tiva_ssiselect() Entry"); + ssi_dumpgpio("tiva_ssiselect() Exit"); +} + +uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + ssidbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} + +#endif /* CONFIG_TIVA_SSI0 || CONFIG_TIVA_SSI1 */ diff --git a/configs/dk-tm4c129x/src/tm4c_timer.c b/configs/dk-tm4c129x/src/tm4c_timer.c new file mode 100644 index 0000000000000000000000000000000000000000..e5b82d714178b93bb0a25fb3a27d515b012cebd8 --- /dev/null +++ b/configs/dk-tm4c129x/src/tm4c_timer.c @@ -0,0 +1,116 @@ +/**************************************************************************** + * config/dk-tm4c129x/src/tm4c_timer.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "tiva_timer.h" +#include "dk-tm4c129x.h" + +#ifdef CONFIG_DK_TM4C129X_TIMER + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_TIMER +# error CONFIG_TIMER is not defined +#endif + +#ifndef CONFIG_TIVA_TIMER32_PERIODIC +# error CONFIG_TIVA_TIMER32_PERIODIC is not defined +#endif + +#if defined(CONFIG_DK_TM4C129X_TIMER0) +# define GPTM 0 +#elif defined(CONFIG_DK_TM4C129X_TIMER1) +# define GPTM 1 +#elif defined(CONFIG_DK_TM4C129X_TIMER2) +# define GPTM 2 +#elif defined(CONFIG_DK_TM4C129X_TIMER3) +# define GPTM 3 +#elif defined(CONFIG_DK_TM4C129X_TIMER4) +# define GPTM 4 +#elif defined(CONFIG_DK_TM4C129X_TIMER5) +# define GPTM 5 +#elif defined(CONFIG_DK_TM4C129X_TIMER6) +# define GPTM 6 +#elif defined(CONFIG_DK_TM4C129X_TIMER7) +# define GPTM 7 +#else +# error No CONFIG_DK_TM4C129X_TIMERn definition +#endif + +#ifndef CONFIG_DK_TM4C129X_TIMER_DEVNAME +# define CONFIG_DK_TM4C129X_TIMER_DEVNAME "/dev/timer0" +#endif + +#undef CONFIG_DK_TM4C129X_TIMER_ALTCLK +#define ALTCLK false + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tiva_timer_initialize + * + * Description: + * Configure the timer driver + * + ****************************************************************************/ + +int tiva_timer_initialize(void) +{ + int ret; + + timvdbg("Registering TIMER%d at %s\n", GPTM, CONFIG_DK_TM4C129X_TIMER_DEVNAME); + + ret = tiva_timer_register(CONFIG_DK_TM4C129X_TIMER_DEVNAME, GPTM, ALTCLK); + if (ret < 0) + { + timdbg("ERROR: Failed to register timer driver: %d\n", ret); + } + + return ret; +} + +#endif /* CONFIG_DK_TM4C129X_TIMER */ \ No newline at end of file diff --git a/configs/dk-tm4c129x/src/tm4c_tmp100.c b/configs/dk-tm4c129x/src/tm4c_tmp100.c new file mode 100644 index 0000000000000000000000000000000000000000..88bca5de7d25341bea30fe60e6dede2b831c0ce7 --- /dev/null +++ b/configs/dk-tm4c129x/src/tm4c_tmp100.c @@ -0,0 +1,103 @@ +/**************************************************************************** + * configs/dk-tm4c129x/src/tiva_tmp100.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "tiva_i2c.h" +#include "dk-tm4c129x.h" + +#if defined(CONFIG_I2C) && defined(CONFIG_I2C_LM75) && \ + defined(CONFIG_TIVA_I2C6) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tiva_tmp100_initialize + * + * Description: + * Initialize and register the LM-75 Temperature Sensor driver. + * + * Input parameters: + * devpath - The full path to the driver to register. E.g., "/dev/temp0" + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int tiva_tmp100_initialize(FAR const char *devpath) +{ + FAR struct i2c_master_s *i2c; + int ret; + + /* Get an instance of the I2C6 interface */ + + i2c = tiva_i2cbus_initialize(TMP100_I2CBUS); + if (!i2c) + { + return -ENODEV; + } + + /* Then register the temperature sensor */ + + ret = lm75_register(devpath, i2c, TMP100_I2CADDR); + if (ret < 0) + { + (void)tiva_i2cbus_uninitialize(i2c); + } + + return ret; +} + +#endif /* CONFIG_I2C && CONFIG_I2C_LM75 && CONFIG_TIVA_I2C6 */ diff --git a/configs/dk-tm4c129x/src/tm4c_userleds.c b/configs/dk-tm4c129x/src/tm4c_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..623091f8aff41f0477dded9892fa6f3566c4f078 --- /dev/null +++ b/configs/dk-tm4c129x/src/tm4c_userleds.c @@ -0,0 +1,144 @@ +/**************************************************************************** + * configs/dk-tm4c129x/src/tm4c_userleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* The development board has one tri-color user LED. + * + * --- ------------ ----------------- + * Pin Pin Function Jumper + * --- ------------ ----------------- + * PN5 Red LED J36 pins 1 and 2 + * PQ4 Blue LED J36 pins 3 and 4 + * PQ7 Green LED J36 pins 5 and 6 + * --- ------------ ----------------- + * + * A high output illuminates the LED. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "tiva_gpio.h" +#include "dk-tm4c129x.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED PIOs for output */ + + tiva_configgpio(GPIO_LED_R); + tiva_configgpio(GPIO_LED_G); + tiva_configgpio(GPIO_LED_B); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint32_t ledcfg; + + if (led == BOARD_LED_R) + { + ledcfg = GPIO_LED_R; + } + else if (led == BOARD_LED_B) + { + ledcfg = GPIO_LED_B; + } + else if (led == BOARD_LED_G) + { + ledcfg = GPIO_LED_G; + } + else + { + return; + } + + tiva_gpiowrite(ledcfg, ledon); +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + bool ledon; + + ledon = ((ledset & BOARD_LED_R_BIT) != 0); + tiva_gpiowrite(GPIO_LED_R, ledon); + + ledon = ((ledset & BOARD_LED_G_BIT) != 0); + tiva_gpiowrite(GPIO_LED_G, ledon); + + ledon = ((ledset & BOARD_LED_B_BIT) != 0); + tiva_gpiowrite(GPIO_LED_B, ledon); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/dk-tm4c129x/tools/dk-tm4c129x.cfg b/configs/dk-tm4c129x/tools/dk-tm4c129x.cfg new file mode 100644 index 0000000000000000000000000000000000000000..98d7dcc35cce360bf517f1cf8d47659840e3502c --- /dev/null +++ b/configs/dk-tm4c129x/tools/dk-tm4c129x.cfg @@ -0,0 +1,12 @@ +# +# TI Tiva C Series dk-tm4c129x Connected Development Kit +# +# http://www.ti.com/tool/dk-tm4c129x +# + +source [find interface/ti-icdi.cfg] + +set WORKAREASIZE 0x40000 +set CHIPNAME tm4c129xnczad + +source [find target/stellaris_icdi.cfg] diff --git a/configs/dk-tm4c129x/tools/oocd.sh b/configs/dk-tm4c129x/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..35e3b905d61eef29c27010ac8b58827a3e8a955e --- /dev/null +++ b/configs/dk-tm4c129x/tools/oocd.sh @@ -0,0 +1,58 @@ +#!/bin/sh +# +# See configs/dk-tm4c129x/README.txt for information about +# this file. + +TOPDIR=$1 +USAGE="$0 [-d]" +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +# Assume that OpenOCD was installed and at /usr/local/bin. Uncomment +# the following to run directly from the build directory + +# OPENOCD_PATH="/home/OpenOCD/openocd/src" +OPENOCD_PATH="/usr/bin" +# OPENOCD_PATH="/usr/local/bin" + +# TARGET_PATH="/home/OpenOCD/openocd/tcl" +TARGET_PATH="/usr/share/openocd/scripts" +# TARGET_PATH="/usr/local/share/openocd/scripts" + +# Assume a Unix development environment. Uncomment to use a Windows +# like environment + +# OPENOCD_EXE=openocd.exe +OPENOCD_EXE=openocd + +OPENOCD_CFG="${TOPDIR}/configs/dk-tm4c129x/tools/dk-tm4c129x.cfg" +OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}" + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +if [ ! -d ${OPENOCD_PATH} ]; then + echo "OpenOCD path does not exist: ${OPENOCD_PATH}" + exit 1 +fi +if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then + echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f ${OPENOCD_CFG} ]; then + echo "OpenOCD config file does not exist: ${OPENOCD_CFG}" + exit 1 +fi + +echo "Starting OpenOCD" +cd ${OPENOCD_PATH} || { echo "Failed to CD to ${OPENOCD_PATH}"; exit 1; } +${OPENOCD_EXE} ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" + diff --git a/configs/ea3131/Kconfig b/configs/ea3131/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..d46e750fc1b73bc9ecb3165a9065c73437516cb6 --- /dev/null +++ b/configs/ea3131/Kconfig @@ -0,0 +1,33 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_EA3131 + +if PAGING + +config EA3131_PAGING_MINOR + int "Page device minor number" + default 0 + +config EA3131_PAGING_MOUNTPT + string "Page device mount point" + default "/mnt/pgsrc" + +config EA3131_PAGING_BINOFFSET + int "Volume offset" + default 0 + +config EA3131_PAGING_SDSLOT + int "SD page device slot number" + default 0 + depends on MMCSD + +config EA3131_PAGING_SPIPORT + int "SD SPI port number" + default 0 + depends on SPI + +endif # PAGING +endif # ARCH_BOARD_EA3131 diff --git a/configs/ea3131/README.txt b/configs/ea3131/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..f69cb1fc51944665f4515550e96cfc5e21361dff --- /dev/null +++ b/configs/ea3131/README.txt @@ -0,0 +1,658 @@ +README +^^^^^^ + + This README file discusses the port of NuttX to the Embedded Artists + EA3131 board. + +Contents +^^^^^^^^ + + o Development Environment + o GNU Toolchain Options + o IDEs + o NuttX buildroot Toolchain + o Boot Sequence + o Image Format + o Image Download to ISRAM + o Using OpenOCD and GDB + o On-Demand Paging + o ARM/EA3131-specific Configuration Options + o Configurations + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. Raisonance GNU toolchain, + 4. The NuttX buildroot Toolchain (see below), or + 5. Any generic arm-none-eabi GNU toolchain. + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery, devkitARM or Raisonance GNU toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARM_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARM_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARM_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARM_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARM_TOOLCHAIN_GNU_EABIL : Generic arm-none-eabi toolchain + + If you are not using CONFIG_ARM_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + The toolchain may also be set using the kconfig-mconf utility (make menuconfig) or by + passing CONFIG_ARM_TOOLCHAIN= to make, where is one + of CODESOURCERYW, CODESOURCERYL, DEVKITARM, BUILDROOT or GNU_EABI as described + above. + + NOTE: the CodeSourcery (for Windows), devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + + Generic arm-none-eabi GNU Toolchain + ----------------------------------- + There are a number of toolchain projects providing support for ARMv4/v5 + class processors, including: + + GCC ARM Embedded + https://launchpad.net/gcc-arm-embedded + + Summon ARM Toolchain + https://github.com/esden/summon-arm-toolchain + + Yagarto + http://www.yagarto.de + + Others exist for various Linux distributions, MacPorts, etc. Any version + based on GCC 4.6.3 or later should work. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lpc31xx, + arch/arm/src/common, arch/arm/src/arm, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/lpc31xx/lpc31_vectors.S. You may have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX buildroot Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh ea3131/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/arm926t-defconfig-4.2.4 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + +Boot Sequence +^^^^^^^^^^^^^ + LPC313x has on chip bootrom which loads properly formatted images from multiple + sources into SRAM. These sources include including SPI Flash, NOR Flash, UART, + USB, SD Card, and NAND Flash. + + In all configurations, NuttX is loaded directly into ISRAM. NuttX is linked + to execute from ISRAM, regardless of the boot source. + +Image Format +^^^^^^^^^^^^ + + In order to use the bootrom bootloader, a special header must be added to the + beginning of the binary image that includes information about the binary (things + like the entry point, the size, and CRC's to verify the image. + + NXP provides a Windows program to append such a header to the binary image. + However, (1) that program won't run under Linux, and (2) when I try it under + WinXP, Symantec immediately claims that the program is misbehaving and deletes + it! + + To work around both of these issues, I have created a small program under + configs/ea3131/tools to add the header. This program can be built under + either Linux or Cygwin (and probably other tool environments as well). That + tool can be built as follows: + + - cd configs/ea3131/tools + - make + + Then, to build the NuttX binary ready to load with the bootloader, just + following these steps: + + - cd tools/ # Configure Nuttx + - ./configure.sh ea3131/nsh # (using the nsh configuration for this example) + - cd .. # Set up environment + - . ./setenv.sh # (see notes below) + - make # Make NuttX. This will produce nuttx.bin + - mklpc.sh # Make the bootloader binary (nuttx.lpc) + + NOTES: + + 1. setenv.sh just sets up pathes to the toolchain and also to + configs/ea3131/tools where mklpc.sh resides. Use of setenv.sh is optional. + If you don't use setenv.sh, then just set your PATH variable appropriately or + use the full path to mklpc.sh in the final step. + 2. You can instruct Symantec to ignore the errors and it will stop quarantining + the NXP program. + 3. The CRC32 logic in configs/ea3131/tools doesn't seem to work. As a result, + the CRC is currently disabled in the header: + + RCS file: /cvsroot/nuttx/nuttx/configs/ea3131/tools/lpchdr.c,v + retrieving revision 1.2 + diff -r1.2 lpchdr.c + 264c264 + < g_hdr.imageType = 0x0000000b; + --- + > g_hdr.imageType = 0x0000000a; + +Image Download to ISRAM +^^^^^^^^^^^^^^^^^^^^^^^ + +Assuming that you already have the FTDI driver installed*, then here is the +are the steps that I use for loading new code into the EA3131: + +- Create the bootloader binary, nuttx.lpc, as described above. +- Connected the EA3131 using the FTDI USB port (not the lpc3131 USB port) + This will power up the EA3131 and start the bootloader. +- Start a terminal emulator (such as TeraTerm) at 115200 8NI. +- Reset the EA3131 and you should see: + LPC31xx READY FOR PLAIN IMAGE> +- Send the nuttx.lpc file and you should see: + Download finished + +That will load the NuttX binary into ISRAM and attempt to execute it. + +*See the LPC313x documentation if you do not have the FTDI driver installed. + +Using OpenOCD and GDB +^^^^^^^^^^^^^^^^^^^^^ + + I have been using the Olimex ARM-USB-OCD JTAG debugger with the EA3131 + (http://www.olimex.com). The OpenOCD configuration file is here: + tools/armusbocb.cfg. There is also a script on the tools directory that + I used to start the OpenOCD daemon on my system called oocd.sh. That + script would probably require some modifications to work in another + environment: + + - possibly the value of OPENOCD_PATH + - If you are working under Linux you will need to change any + occurances of `cygpath -w blablabla` to just blablabla + + Then you should be able to start the OpenOCD daemon like: + + configs/ea3131/tools/oocd.sh $PWD + + Where it is assumed that you are executing oocd.sh from the top level + directory where NuttX is installed. + + Once the OpenOCD daemon has been started, you can connect to it via + GDB using the following GDB command: + + arm-nuttx-elf-gdb + (gdb) target remote localhost:3333 + + And you can load the NuttX ELF file: + + (gdb) symbol-file nuttx + (gdb) load nuttx + +On-Demand Paging +^^^^^^^^^^^^^^^^ + + There is a configuration that was used to verify the On-Demand Paging + feature for the ARM926 (see https://bitbucket.org/nuttx/documentation/src/master/NuttXDemandPaging.html). + That configuration is contained in the pgnsh sub-directory. The pgnsh configuration + is only a test configuration, and lacks some logic to provide the full On-Demand + Paging solution (see below). + + Page Table Layout: + ------------------ + + The ARM926 MMU uses a page table in memory. The page table is divided + into (1) a level 1 (L1) page table that maps 1Mb memory regions to level 2 + page tables (except in the case of 1Mb sections, of course), and (2) a level + 2 (L2) page table that maps the 1Mb memory regions into individual 64Kb, 4kb, + or 1kb pages. The pgnsh configuration uses 1Kb pages: it positions 48x1Kb + pages at beginning of SRAM (the "locked" memory region), 16x1Kb pages at + the end of SRAM for the L1 page table, and 44x1Kb pages just before the + L1 page table. That leaves 96x1Kb virtual pages in the middle of SRAM for + the paged memory region; up to 384x1kb of physical pages may be paged into + this region. Physical memory map: + + 11028000 "locked" text region 48x1Kb + 11034000 "paged" text region 96x1Kb + 1104c000 "data" region 32x1Kb + 11054000 L1 page table 16x1Kb + -------- --------------------- ------ + 11058000 192x1Kb + + The virtual memory map allows more space for the paged region: + + 11028000 "locked" text region 48x1Kb + 11034000 "paged" text region 384x1Kb + 11094000 "data" region 32x1Kb + 1109c000 L1 page table 16x1Kb + -------- --------------------- ------ + 110a0000 480x1Kb + + The L1 contains a single 1Mb entry to span the entire LPC3131 SRAM memory + region. The virtual address for this region is 0x11028000. The offset into + the L1 page table is given by: + + offset = ((0x11028000 >> 20) << 2) = 0x00000440 + + The value at that offset into the L1 page table contains the address of the + L2 page table (0x11056000) plus some extra bits to specify that that entry + is valid and and points to a 1Kb L1 page table: + + 11054440 11056013 + + Why is the address 11056000 used for the address of the L2 page table? Isn't + that inside of the L1 page table? Yes, this was done to use the preceious + SRAM memory more conservatively. If you look at the LPC313x virtual memory + map, you can see that no virtual addresses above 0x60100000 are used. That + corresponds to L1 page table offset 0x0001800 (physical address 0x11055800). + The rest of the L1 page table is unused and so we reuse it to hold the L2 page + table (or course, this could cause some really weird addressing L1 mapping + issues if bad virtual addresses were used in that region -- oh well). The + address 0x11056000 is then the first properly aligned memory that can be used + in that L2 page table area. + + Only only L2 page table will be used to span the LPC3131 SRAM virtual text + address region (480x1Kb). That one entry maps the virtual address range of + 0x11000000 through 0x110ffc00. Each entry maps a 1Kb page of physical memory: + + PAGE VIRTUAL ADDR L2 OFFSET + --------- ------------ --------- + Page 0 0x11000000 0x00000000 + Page 1 0x11000400 0x00000004 + Page 2 0x11000800 0x00000008 + ... + Page 1023 0x110ffc00 0x00000ffc + + The "locked" text region begins at an offset of 0x00028000 into that region. + The 48 page table entries needed to make this region begin at: + + offset = ((0x00028000 >> 10) << 2) = 0x00000280 + + Each entry contains the address of a physical page in the "locked" text region + (plus some extra bits to identify domains, page sizes, access privileges, etc.): + + 0x11000280 0x1102800b + 0x11000284 0x1102840b + 0x11000288 0x1102880b + ... + + The locked region is initially unmapped. But the data region and page table + regions must be mapped in a similar manner. Those + + Data: + Virtual address = 0x11094000 Offset = 0x00064000 + Physical address = 0x1104c000 + L2 offset = ((0x00094000 >> 10) << 2) = 0x00000940 + + Page table: + Virtual address = 0x1109c000 Offset = 0x0009c000 + Physical address = 0x11054000 + L2 offset = ((0x0009c000 >> 10) << 2) = 0x000009c0 + + Build Sequence: + --------------- + + This example uses a two-pass build. The top-level Makefile recognizes the + configuration option CONFIG_BUILD_2PASS and will execute the Makefile in + configs/ea3131/locked/Makefile to build the first pass object, locked.r. + This first pass object contains all of the code that must be in the locked + text region. The Makefile in arch/arm/src/Makefile then includes this 1st + pass in build, positioning it as controlled by configs/ea3131/scripts/pg-ld.script. + + Finishing the Example: + ---------------------- + + This example is incomplete in that it does not have any media to reload the + page text region from: The file configs/ea3131/src/up_fillpage.c is only + a stub. That logic to actually reload the page from some storage medium + (among other things) would have to be implemented in order to complete this + example. At present, the example works correctly up to the point where + up_fillpage() is first called and then fails in the expected way. + + Here are the detailed list of things that would need to be done in addition + to finishing th up_fillpage() logic (this assumes that SPI NOR FLASH is the + media on which the NuttX image is stored): + + 1. Develop a NOR FLASH layout can can be used to (1) boot the locked text + section into memory on a reset, and (2) map a virtual fault address + to an offset into paged text section in NOR FLASH. + 2. Develop/modify the build logic to build the binaries for this NOR + flash layout: Can the NuttX image be formed as a single image that + is larger than the IRAM? Can we boot from such a large image? If + so, then no special build modifications are required. Or, does the + locked section have to be smaller with a separate paged text section + image in FLASH? In this case, some tool will be needed to break + the nuttx.bin file into the two pieces. + 3. Develop a mechanism to load the NuttX image into SPI NOR FLASH. A + basic procedure is already documented in NXP publications: "LPC313x + Linux Quick Start Guide, Version 2.0" and "AN10811 Programming SPI + flash on EA3131 boards, V1 (May 1, 2009)." That procedure may be + sufficient, depending on the decisions made in (1) and (2): + 4. Develop a procedure to boot the locked text image from SPI NOR. + The references and issues related to this are discussed in (2) + and (3) above. + + Basic support for paging from SPI NOR FLASH can be enabled by adding: + + CONFIG_PAGING_AT45DB=y + + Or: + + CONFIG_PAGING_M25PX=y + + NOTE: See the TODO list in the top-level directory: + + "arch/arm/src/lpc31xx/lpc31_spi.c may or may not be functional. It was + reported to be working, but I was unable to get it working with the + Atmel at45dbxx serial FLASH driver." + + Alternative: + ------------ + + I have implemented an alternative within configs/ea3131/src/up_fillpage.c + which is probably only useful for testing. Here is the usage module + for this alternative + + 1. Place the nuttx.bin file on an SD card. + 2. Insert the SD card prior to booting + 3. In up_fillpage(), use the virtual miss address (minus the virtual + base address) as an offset into the nuttx.bin file, and read the + required page from that offset in the nuttx.bin file: + + off_t offset = (off_t)vpage - PG_LOCKED_VBASE; + off_t pos = lseek(fd, offset, SEEK_SET); + if (pos != (off_t)-1) + { + int ret = read(fd, vpage, PAGESIZE); + } + + In this way, the paging implementation can do on-demand paging + from an image file on the SD card. Problems/issues with this + approach probably make it only useful for testing: + + 1. You would still have to boot the locked section over serial or + using a bootloader -- it is not clear how the power up boot + would occur. For testing, the nuttx.bin file could be both + provided on the SD card and loaded over serial. + 2. If the SD card is not in place, the system will crash. + 3. This means that all of the file system logic and FAT file + system would have to reside in the locked text region. + + And the show-stopper: + + 4. There is no MCI driver for the ea3131, yet! + +ARM/EA3131-specific Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_ARM926EJS=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc313x + + CONFIG_ARCH_CHIP_name - For use in C code + + CONFIG_ARCH_CHIP_LPC3131 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=ea3131 + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_EA3131 + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - For most ARM9 architectures, this describes the + size of installed DRAM. For the LPC313X, it is used only to + deterimine how to map the executable regions. It is SDRAM size + only if you are executing out of the external SDRAM; or it could + be NOR FLASH size, external SRAM size, or internal SRAM size. + + CONFIG_RAM_START - The start address of installed DRAM (physical) + + CONFIG_RAM_VSTART - The startaddress of DRAM (virtual) + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_BUTTONS - Enable support for buttons. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + CONFIG_ARCH_DMA - Support DMA initialization + CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000 + Undefine if vectors reside at address 0xffff:0000 + CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available. + If defined, then board-specific logic must also define PGTABLE_BASE_PADDR, + PGTABLE_BASE_VADDR, and all memory section mapping in a file named + board_memorymap.h. + + Individual subsystems can be enabled: + + CONFIG_LPC31_MCI, CONFIG_LPC31_SPI, CONFIG_LPC31_UART + + External memory available on the board (see also CONFIG_MM_REGIONS) + + CONFIG_LPC31_EXTSRAM0 - Select if external SRAM0 is present + CONFIG_LPC31_EXTSRAM0HEAP - Select if external SRAM0 should be + configured as part of the NuttX heap. + CONFIG_LPC31_EXTSRAM0SIZE - Size (in bytes) of the installed + external SRAM0 memory + CONFIG_LPC31_EXTSRAM1 - Select if external SRAM1 is present + CONFIG_LPC31_EXTSRAM1HEAP - Select if external SRAM1 should be + configured as part of the NuttX heap. + CONFIG_LPC31_EXTSRAM1SIZE - Size (in bytes) of the installed + external SRAM1 memory + CONFIG_LPC31_EXTDRAM - Select if external SDRAM is present + CONFIG_LPC31_EXTDRAMHEAP - Select if external SDRAM should be + configured as part of the NuttX heap. + CONFIG_LPC31_EXTDRAMSIZE - Size (in bytes) of the installed + external SDRAM memory + CONFIG_LPC31_EXTNAND - Select if external NAND is present + CONFIG_LPC31_EXTNANDSIZE - Size (in bytes) of the installed + external NAND memory + + LPC313X specific device driver settings + + CONFIG_UART_SERIAL_CONSOLE - selects the UART for the + console and ttys0 + CONFIG_UART_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UART_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UART_BAUD - The configure BAUD of the UART. Must be + CONFIG_UART_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UART_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UART_2STOP - Two stop bits + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. Each EA3131 configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh ea3131/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume the CodeSourcery toolchain + under Cygwin with Windows. This is easily reconfigured, however: + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_ARM_TOOLCHAIN_CODESOURCERYW=y + +Configuration Sub-Directories +----------------------------- + + locked: + + This is not a configuration. When on-demand page is enabled + then we must do a two pass link: The first pass creates an + intermediate object that has all of the code that must be + placed in the locked memory partition. This is logic that + must be locked in memory at all times. + + The directory contains the logic necessary to do the platform + specific first pass link for the EA313x. + + nsh + + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables only the serial NSH interface. + + pgnsh + + This is the same configuration as nsh, but with On-Demand + paging enabled. See http://www.nuttx.org/Documentation/NuttXDemandPaging.html. + This configuration is an experiment for the purposes of test + and debug. At present, this does not produce functioning, + usable system + + usbserial + + This configuration directory exercises the USB serial class + driver at examples/usbserial. See examples/README.txt for + more information. diff --git a/configs/ea3131/include/board.h b/configs/ea3131/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..f41a26d2ac394a021605a37745da417fe1a8acb7 --- /dev/null +++ b/configs/ea3131/include/board.h @@ -0,0 +1,152 @@ +/************************************************************************************ + * configs/ea3131/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2009-2010, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +# include "lpc31_cgudrvr.h" +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* Frequency of the FFAST input */ + +#define BOARD_FREQIN_FFAST (12000000) /* ffast (12 MHz crystal) */ + +/* HPLL0 configuration */ + +#define BOARD_HPLL0_FINSEL CGU_HPFINSEL_FFAST /* Frequency input selection */ +#define BOARD_HPLL0_NDEC 131 /* PLL N-divider value */ +#define BOARD_HPLL0_MDEC 29784 /* PLL M-divider value */ +#define BOARD_HPLL0_PDEC 7 /* PLL P-divider value */ +#define BOARD_HPLL0_SELR 0 /* SELR bandwidth selection */ +#define BOARD_HPLL0_SELI 8 /* SELI bandwidth selection */ +#define BOARD_HPLL0_SELP 31 /* SELP bandwidth selection */ +#define BOARD_HPLL0_MODE 0 /* PLL mode */ +#define BOARD_HPLL0_FREQ 406425600 /* Frequency of the PLL in MHz */ + +/* HPLL1 configuration */ + +#define BOARD_HPLL1_FINSEL CGU_HPFINSEL_FFAST /* Frequency input selection */ +#define BOARD_HPLL1_NDEC 770 /* PLL N-divider value */ +#define BOARD_HPLL1_MDEC 8191 /* PLL M-divider value */ +#define BOARD_HPLL1_PDEC 98 /* PLL P-divider value */ +#define BOARD_HPLL1_SELR 0 /* SELR bandwidth selection */ +#define BOARD_HPLL1_SELI 16 /* SELI bandwidth selection */ +#define BOARD_HPLL1_SELP 8 /* SELP bandwidth selection */ +#define BOARD_HPLL1_MODE 0 /* PLL mode */ +#define BOARD_HPLL1_FREQ 180000000 /* Frequency of the PLL in MHz */ + +/* The following 3 bitsets determine which clocks will be enabled at initialization + * time. + */ + +#define BOARD_CLKS_0_31 \ + (_RBIT(CLKID_APB0CLK,0)|_RBIT(CLKID_APB1CLK,0)|_RBIT(CLKID_APB2CLK,0)|\ + _RBIT(CLKID_APB3CLK,0)|_RBIT(CLKID_APB4CLK,0)|_RBIT(CLKID_AHB2INTCCLK,0)|\ + _RBIT(CLKID_AHB0CLK,0)|_RBIT(CLKID_ARM926CORECLK,0)|_RBIT(CLKID_ARM926BUSIFCLK,0)|\ + _RBIT(CLKID_ARM926RETIMECLK,0)|_RBIT(CLKID_ISRAM0CLK,0)|_RBIT(CLKID_ISRAM1CLK,0)|\ + _RBIT(CLKID_ISROMCLK,0)|_RBIT(CLKID_INTCCLK,0)|_RBIT(CLKID_AHB2APB0PCLK,0)|\ + _RBIT(CLKID_EVENTROUTERPCLK,0)|_RBIT(CLKID_CLOCKOUT,0)) + +#define BOARD_CLKS_32_63 \ + (_RBIT(CLKID_IOCONFPCLK,32)|_RBIT(CLKID_CGUPCLK,32)|_RBIT(CLKID_SYSCREGPCLK,32)|\ + _RBIT(CLKID_OTPPCLK,32)|_RBIT(CLKID_AHB2APB1PCLK,32)|_RBIT(CLKID_AHB2APB2PCLK,32)|\ + _RBIT(CLKID_AHB2APB3PCLK,32)|_RBIT(CLKID_EDGEDETPCLK,32)) + +#define BOARD_CLKS_64_92 \ + (0) + +/* LED definitions ******************************************************************/ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/* Button definitions ***************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: lpc31_boardinitialize + * + * Description: + * All LPC31XX architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc31_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/ea3131/include/board_memorymap.h b/configs/ea3131/include/board_memorymap.h new file mode 100644 index 0000000000000000000000000000000000000000..f6fddc28e509b5c3c8525ce6e8ea44b5022de289 --- /dev/null +++ b/configs/ea3131/include/board_memorymap.h @@ -0,0 +1,117 @@ +/************************************************************************************ + * configs/ea3131/include/board_memorymap.h + * include/arch/board/board_memorymap.h + * + * Copyright (C) 2009-2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_MEMORYMAP_H +#define __ARCH_BOARD_BOARD_MEMORYMAP_H + +/* This file should never be included directly, but only indirectly via + * lpc31_memorymap.h. + */ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* If the LPC31xx ROM page table is selected, then the board-logic is required + * to provide: + * + * PGTABLE_BASE_PADDR - The physical address of the page table in ROM, + * PGTABLE_BASE_VADDR - The mapped address of the page table in ROM, and + * Mappings for each of the PSECTIONS in lpc31_memorymap.h + */ + +#ifdef CONFIG_ARCH_ROMPGTABLE + /* The LPC31xx ROM page table uses a 1-1 physical to virtual memory mapping */ + +# define LPC31_SHADOWSPACE_VSECTION 0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */ +# define LPC31_INTSRAM_VSECTION 0x11028000 /* Internal SRAM 96Kb-192Kb */ +# define LPC31_INTSRAM0_VADDR 0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */ +# define LPC31_INTSRAM1_VADDR 0x11040000 /* 0x11040000-0x11057fff: Internal SRAM 1 96Kb */ +# define LPC31_INTSROM0_VSECTION 0x12000000 /* 0x12000000-0x1201ffff: Internal SROM 0 128Kb */ +# define LPC31_APB01_VSECTION 0x13000000 /* 0x13000000-0x1300bfff: APB0 32Kb APB1 16Kb*/ +# define LPC31_APB0_VADDR 0x13000000 /* 0x13000000-0x13007fff: APB0 32Kb */ +# define LPC31_APB1_VADDR 0x13008000 /* 0x13008000-0x1300bfff: APB1 16Kb */ +# define LPC31_APB2_VSECTION 0x15000000 /* 0x15000000-0x15003fff: APB2 16Kb */ +# define LPC31_APB3_VSECTION 0x16000000 /* 0x16000000-0x160003ff: APB3 1Kb */ +# define LPC31_APB4MPMC_VSECTION 0x17000000 /* 8Kb */ +# define LPC31_APB4_VADDR 0x17000000 /* 0x17000000-0x17000fff: APB4 4Kb */ +# define LPC31_MPMC_VADDR 0x17008000 /* 0x17008000-0x17008fff: MPMC cfg 4Kb */ +# define LPC31_MCI_VSECTION 0x18000000 /* 0x18000000 0x180003ff: MCI/SD/SDIO 1Kb */ +# define LPC31_USBOTG_VSECTION 0x19000000 /* 0x19000000-0x19000fff: USB OTG 4Kb */ +# define LPC31_EXTSRAM_VSECTION 0x20020000 /* 64-128Kb */ +# define LPC31_EXTSRAM0_VADDR 0x20000000 /* 0x20000000-0x2001ffff: External SRAM 0 64-128Kb */ +# define LPC31_EXTSRAM1_VADDR 0x20020000 /* 0x20020000-0x2003ffff: External SRAM 1 64-128Kb */ +# define LPC31_EXTSDRAM0_VSECTION 0x30000000 /* 0x30000000-0x37ffffff: External SDRAM 0 128Mb */ +# define LPC31_INTC_VSECTION 0x60000000 /* 0x60000000-0x60000fff: Interrupt controller 4Kb */ +# define LPC31_NAND_VSECTION 0x70000000 /* 0x70000000-0x700007ff: NANDFLASH Ctrl 2Kb */ + + /* Define the address of the page table within the ROM */ + +# define ROMPGTABLE_OFFSET 0x0001c000 /* Offset of the ROM page table in ROM */ +# define PGTABLE_BASE_PADDR (LPC31_INTSROM0_PSECTION+ROMPGTABLE_OFFSET) +# define PGTABLE_BASE_VADDR (LPC31_INTSROM0_VSECTION+ROMPGTABLE_OFFSET) +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_MEMORYMAP_H */ diff --git a/configs/ea3131/locked/.gitignore b/configs/ea3131/locked/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..a42b273d1f286c1e84883171aebd3c94d7480327 --- /dev/null +++ b/configs/ea3131/locked/.gitignore @@ -0,0 +1,4 @@ +ld-locked.inc +locked.r +locked.map + diff --git a/configs/ea3131/locked/Makefile b/configs/ea3131/locked/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..e8d1f17934008a997a416aade37275ce0808a3f4 --- /dev/null +++ b/configs/ea3131/locked/Makefile @@ -0,0 +1,110 @@ +############################################################################ +# configs/ea3131/locked/Makefile +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +# Board-specific directory, board library, and application library + +PASS1_SRCDIR = arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src +PASS1_LIBBOARD = libboard$(LIBEXT) +PASS1_LIBAPPS = libapps$(LIBEXT) + +# Remove the application library (libapps) from the list of libraries. Add +# the boad library (liboard) + +PASS1_LINKLIBS = $(filter-out $(PASS1_LIBAPPS),$(LINKLIBS)) +PASS1_LINKLIBS += $(PASS1_LIBBOARD) + +# Get the paths to the libraries and the links script path in format that +# is appropriate for the host OS + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + PASS1_LIBPATHS += -L"${shell cygpath -w "$(TOPDIR)$(DELIM)lib"}" + PASS1_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)locked$(DELIM)ld-locked.inc}" +else + # Linux/Cygwin-native toolchain + PASS1_LIBPATHS += -L"(TOPDIR)$(DELIM)lib" + PASS1_LDSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)locked$(DELIM)ld-locked.inc +endif + +PASS1_LDFLAGS = -r $(PASS1_LDSCRIPT) +PASS1_LDLIBS = $(patsubst %.a,%,$(patsubst lib%,-l%,$(PASS1_LINKLIBS))) +PASS1_LIBGCC = "${shell $(CC) -print-libgcc-file-name}" + +# Targets: + +all: $(PASS1_SRCDIR)$(DELIM)locked.r + +.PHONY: depend clean distclean + +# Create include-able linker script that specifies all of the symbols to be +# resolved in the locked.r file. + +ld-locked.inc: mklocked.sh $(TOPDIR)$(DELIM).config + @echo "MK: ld-locked.inc" + $(Q) .$(DELIM)mklocked.sh "$(TOPDIR)" + +# Make the board library. This is normally done in arch/arm/src/Makefile. +# However, we need it earlier here when doing a two-pass build so that libboard.a +# is available to link against. + +$(PASS1_LIBBOARD): + $(Q) $(MAKE) -C $(TOPDIR)$(DELIM)configs$(DELIM)ea3131$(DELIM)src TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES) + +# Create the locked.r file containing all of the code (except the start-up code) +# that needs to lie in the locked text region. + +locked.r: ld-locked.inc $(PASS1_LIBBOARD) + @echo "LD: locked.r" + $(Q) $(LD) -o $@ $(PASS1_LDFLAGS) $(PASS1_LIBPATHS) --start-group $(PASS1_LDLIBS) --end-group $(PASS1_LIBGCC) + $(Q) $(NM) $@ > locked.map + $(Q) fgrep " U " locked.map | grep -v os_start + $(Q) $(CROSSDEV)size $@ + +$(PASS1_SRCDIR)$(DELIM)locked.r: locked.r + $(Q) cp -a locked.r $(TOPDIR)$(DELIM)$(PASS1_SRCDIR)$(DELIM)locked.r + +.depend: + +depend: .depend + +clean: + $(call DELFILE, locked.r) + $(call DELFILE, locked.map) + $(call CLEAN) + +distclean: clean + $(call DELFILE, ld-locked.inc) diff --git a/configs/ea3131/locked/ld-locked.script b/configs/ea3131/locked/ld-locked.script new file mode 100644 index 0000000000000000000000000000000000000000..334c328c07f22ed8a557f3ea4ea2947a831ca753 --- /dev/null +++ b/configs/ea3131/locked/ld-locked.script @@ -0,0 +1,43 @@ +/**************************************************************************** + * configs/ea3131/locked/ld-locked.script + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +INCLUDE ld-locked.inc +OUTPUT_ARCH(arm) +SECTIONS +{ + .text.locked : { *(.text .text.*) } + .data : { *(.data) } + .bss : { *(.bss) *(COMMON) } +} diff --git a/configs/ea3131/locked/mklocked.sh b/configs/ea3131/locked/mklocked.sh new file mode 100644 index 0000000000000000000000000000000000000000..29b357ae39949b7c0e02dc55c31358ef0f571509 --- /dev/null +++ b/configs/ea3131/locked/mklocked.sh @@ -0,0 +1,215 @@ +#!/bin/bash +########################################################################### +# configs/ea3131/locked/mklocked.sh +# +# Copyright (C) 2010-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +#set -x + +############################################################################ +# Arguments +############################################################################ + +USAGE="$0 " + +TOPDIR="$1" +CONFIG="$TOPDIR/.config" +if [ -z "$TOPDIR" ]; then + echo "Missing Argument" + echo $USAGE + exit 1 +fi +if [ ! -d "$TOPDIR" ]; then + echo "NuttX directory does not exist: $TOPDIR" + echo $USAGE + exit 1 +fi +if [ ! -f "$CONFIG" ]; then + echo "Configuration file not found: $CONFIG" + exit 1 +fi + +############################################################################ +# Functions +############################################################################ + +function checkconfig () { + CONFIGLINE=`cat "$CONFIG" | grep "$1="` + if [ -z "$CONFIGLINE" ]; then + echo "n" + fi + if [ "X${CONFIGLINE}" = "X${1}=y" ]; then + echo "y" + else + echo "n" + fi +} + +function checkzero () { + CONFIGLINE=`cat "$CONFIG" | grep "$1="` + if [ -z "$CONFIGLINE" ]; then + echo "y" + fi + if [ "X${CONFIGLINE}" = "X${1}=0" ]; then + echo "y" + else + echo "n" + fi +} + +############################################################################ +# Interrupt Handlers +############################################################################ +# +# All interrupt handlers must be forced to lie in the locked .text region +# +# These are the vector entry points (only one is really needed since they +# are all in the same file). These should drag in all of the vector +# dispatching logic. +# + +rm -f ld-locked.inc +echo "EXTERN(up_vectorswi)" >>ld-locked.inc +echo "EXTERN(up_vectordata)" >>ld-locked.inc +echo "EXTERN(up_vectorprefetch)" >>ld-locked.inc +echo "EXTERN(up_vectorundefinsn)" >>ld-locked.inc +echo "EXTERN(up_vectorfiq)" >>ld-locked.inc +echo "EXTERN(up_vectorirq)" >>ld-locked.inc +echo "EXTERN(up_vectoraddrexcptn)" >>ld-locked.inc + +# +# These are the initialization entry points of all device drivers that +# handle interrupts. We really want to include as little as possible -- +# ideally just the interrupt handler itself, but that is not usually +# possible. +# +# Of course, this list must be extended as interrupt handlers are added. + +echo "EXTERN(up_timer_initialize)" >>ld-locked.inc + +answer=$(checkconfig CONFIG_LPC31_UART) +if [ "$answer" = y ]; then + echo "EXTERN(up_earlyserialinit)" >>ld-locked.inc +fi + +# xyz_i2cbus_initialize -- Not conditioned on anything + +answer=$(checkconfig CONFIG_USBDEV) +if [ "$answer" = y ]; then + echo "EXTERN(up_usbinitialize)" >>ld-locked.inc +fi + +############################################################################ +# Initialization logic +############################################################################ +# All initialization logic must be in memory because it must execute before +# the page fill worker thread is started. Ideally this would be in some +# region that is mapped initially, but then unmapped after initialization +# is complete -- effectively freeing the memory used for the 1-time +# initialization code. That optimization has not yet been made and, as +# consequence, the 1-time initialization code takes up precious memory +# in the locked memory region. +# +# up_boot is a low-level initialization function called by __start: + +echo "EXTERN(up_boot)" >>ld-locked.inc + +# All of the initialization functions that are called by os_start up to +# the point where the page fill worker thread is started must also be +# included in the locked text section (at least for now) + +answer=$(checkzero CONFIG_TASK_NAME_SIZE) +if [ "$answer" = n ]; then + echo "EXTERN(up_boot)" >>ld-locked.inc +fi + +echo "EXTERN(dq_addfirst)" >>ld-locked.inc +echo "EXTERN(up_initial_state)" >>ld-locked.inc +echo "EXTERN(up_allocate_heap)" >>ld-locked.inc +echo "EXTERN(mm_initialize)" >>ld-locked.inc +echo "EXTERN(irq_initialize)" >>ld-locked.inc +echo "EXTERN(wd_initialize)" >>ld-locked.inc +echo "EXTERN(clock_initialize)" >>ld-locked.inc + +answer=$(checkconfig CONFIG_DISABLE_POSIX_TIMERS) +if [ "$answer" = n ]; then + echo "EXTERN(timer_initialize)" >>ld-locked.inc +fi + +answer=$(checkconfig CONFIG_DISABLE_SIGNALS) +if [ "$answer" = n ]; then + echo "EXTERN(sig_initialize)" >>ld-locked.inc +fi + +echo "EXTERN(sem_initialize)" >>ld-locked.inc + +answer=$(checkconfig CONFIG_DISABLE_MQUEUE) +if [ "$answer" = n ]; then + echo "EXTERN(mq_initialize)" >>ld-locked.inc +fi + +answer=$(checkconfig CONFIG_DISABLE_PTHREAD) +if [ "$answer" = n ]; then + echo "EXTERN(pthread_initialize)" >>ld-locked.inc +fi + +answer=$(checkzero CONFIG_NFILE_DESCRIPTORS) +if [ "$answer" = n ]; then + echo "EXTERN(fs_initialize)" >>ld-locked.inc +fi + +answer=$(checkconfig CONFIG_NET) +if [ "$answer" = y ]; then + echo "EXTERN(net_initialize)" >>ld-locked.inc +fi + +echo "EXTERN(up_initialize)" >>ld-locked.inc +echo "EXTERN(sched_setupidlefiles)" >>ld-locked.inc +echo "EXTERN(task_create)" >>ld-locked.inc + +############################################################################ +# Idle Loop +############################################################################ +# +# The IDLE loop must be forced to lie in the locked .text region. + +echo "EXTERN(os_start)" >>ld-locked.inc +echo "EXTERN(up_idle)" >>ld-locked.inc + +############################################################################ +# PG Fill Worker Thread +############################################################################ +# +# All of the page fill worker thread must be in the locked .text region. + +echo "EXTERN(pg_worker)" >>ld-locked.inc diff --git a/configs/ea3131/nsh/Make.defs b/configs/ea3131/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..34d4de104c9f1c0e1cfdabc40999b3dcda5976d2 --- /dev/null +++ b/configs/ea3131/nsh/Make.defs @@ -0,0 +1,115 @@ +############################################################################ +# configs/ea3131/nsh/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mtune=arm9tdmi -march=armv5te -mfloat-abi=soft -fno-builtin +else + ARCHCPUFLAGS = -mapcs-32 -mtune=arm9tdmi -march=armv5te -msoft-float -fno-builtin +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARM_TOOLCHAIN),BUILDROOT) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/ea3131/nsh/defconfig b/configs/ea3131/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..1edd39ab7e221858388d2b824c39e9ed597625b8 --- /dev/null +++ b/configs/ea3131/nsh/defconfig @@ -0,0 +1,835 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +CONFIG_ARCH_CHIP_LPC31XX=y +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +CONFIG_ARCH_ARM926EJS=y +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="lpc31xx" +# CONFIG_ARCH_HAVE_FPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +CONFIG_ARCH_ROMPGTABLE=y + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARM_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARM_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTDRAM=y +CONFIG_ARCH_HAVE_EXTSRAM0=y + +# +# LPC31xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC3130 is not set +CONFIG_ARCH_CHIP_LPC3131=y +# CONFIG_ARCH_CHIP_LPC3152 is not set +# CONFIG_ARCH_CHIP_LPC3154 is not set + +# +# LPC31xx Peripheral Support +# +CONFIG_LPC31_UART=y +# CONFIG_LPC31_SPI is not set +# CONFIG_LPC31_USBOTG is not set +# CONFIG_LPC31_MCI is not set + +# +# External Memory Configuration +# +CONFIG_ARCH_HAVE_EXTSRAM1=y +# CONFIG_LPC31_EXTNAND is not set +# CONFIG_LPC31_EXTDRAM is not set +# CONFIG_LPC31_EXTSRAM0 is not set +# CONFIG_LPC31_EXTSRAM1 is not set + +# +# LPC31xx UART Configuration +# +# CONFIG_LPC31_UART_PRECALCULATED is not set + +# +# SPI device driver options +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_USE_MMU=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16945 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x11028000 +CONFIG_RAM_VSTART=0x11028000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_EA3131=y +# CONFIG_ARCH_BOARD_OLIMEX_LPC_H3131 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ea3131" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=15 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART=y +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_UART_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART Configuration +# +CONFIG_UART_RXBUFSIZE=256 +CONFIG_UART_TXBUFSIZE=256 +CONFIG_UART_BAUD=115200 +CONFIG_UART_BITS=8 +CONFIG_UART_PARITY=0 +CONFIG_UART_2STOP=0 +# CONFIG_UART_IFLOWCONTROL is not set +# CONFIG_UART_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +CONFIG_LIB_BOARDCTL=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ea3131/nsh/setenv.sh b/configs/ea3131/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..d40da9a3c913537ee6f9628afbcd6b743c302e42 --- /dev/null +++ b/configs/ea3131/nsh/setenv.sh @@ -0,0 +1,66 @@ +#!/bin/bash +# configs/ea3131/nsh/setenv.sh +# +# Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the tools subdirectory + +export LPCTOOL_DIR="${WD}/configs/ea3131/tools" + +# Add the path to the toolchain to the PATH varialble + +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/ea3131/pgnsh/Make.defs b/configs/ea3131/pgnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6fc835901273c87d8d3a0e3255b42a976af7ef44 --- /dev/null +++ b/configs/ea3131/pgnsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/ea3131/pgnsh/Make.defs +# +# Copyright (C) 2010,2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/pg-ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/pg-ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mtune=arm9tdmi -march=armv5te -mfloat-abi=soft -fno-builtin +else + ARCHCPUFLAGS = -mapcs-32 -mtune=arm9tdmi -march=armv5te -msoft-float -fno-builtin +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARM_TOOLCHAIN_BUILDROOT),y) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/ea3131/pgnsh/defconfig b/configs/ea3131/pgnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..e245da9a3c62ef3e1921bd5b2e852e22d13e744a --- /dev/null +++ b/configs/ea3131/pgnsh/defconfig @@ -0,0 +1,836 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +CONFIG_BUILD_2PASS=y +CONFIG_PASS1_TARGET="all" +CONFIG_PASS1_BUILDIR="configs/ea3131/locked" +CONFIG_PASS1_OBJECT="locked.r" + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +CONFIG_ARCH_CHIP_LPC31XX=y +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +CONFIG_ARCH_ARM926EJS=y +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="lpc31xx" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARM_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARM_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTDRAM=y +CONFIG_ARCH_HAVE_EXTSRAM0=y + +# +# LPC31xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC3130 is not set +CONFIG_ARCH_CHIP_LPC3131=y +# CONFIG_ARCH_CHIP_LPC3152 is not set +# CONFIG_ARCH_CHIP_LPC3154 is not set + +# +# LPC31xx Peripheral Support +# +CONFIG_LPC31_UART=y +CONFIG_LPC31_SPI=y +# CONFIG_LPC31_USBOTG is not set +# CONFIG_LPC31_MCI is not set + +# +# External Memory Configuration +# +CONFIG_ARCH_HAVE_EXTSRAM1=y +# CONFIG_LPC31_EXTNAND is not set +# CONFIG_LPC31_EXTDRAM is not set +# CONFIG_LPC31_EXTSRAM0 is not set +# CONFIG_LPC31_EXTSRAM1 is not set + +# +# LPC31xx UART Configuration +# +# CONFIG_LPC31_UART_PRECALCULATED is not set + +# +# SPI device driver options +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_USE_MMU=y +CONFIG_PAGING=y +CONFIG_PAGING_PAGESIZE=1024 +CONFIG_PAGING_NLOCKED=48 +# CONFIG_PAGING_CUSTOM_BASE is not set +CONFIG_PAGING_NPPAGED=96 +CONFIG_PAGING_NVPAGED=384 +CONFIG_PAGING_NDATA=32 +CONFIG_PAGING_DEFPRIO=100 +CONFIG_PAGING_STACKSIZE=2048 +CONFIG_PAGING_BLOCKINGFILL=y +CONFIG_PAGING_WORKPERIOD=500000 +# CONFIG_PAGING_TIMEOUT is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16945 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x11028000 +CONFIG_RAM_VSTART=0x11028000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_EA3131=y +# CONFIG_ARCH_BOARD_OLIMEX_LPC_H3131 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ea3131" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_EA3131_PAGING_MINOR=0 +CONFIG_EA3131_PAGING_MOUNTPT="/mnt/pgsrc" +CONFIG_EA3131_PAGING_BINOFFSET=0 +CONFIG_EA3131_PAGING_SDSLOT=0 +CONFIG_EA3131_PAGING_SPIPORT=0 +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=15 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +CONFIG_MTD_M25P=y +CONFIG_M25P_SPIMODE=3 +CONFIG_M25P_MANUFACTURER=0x20 +CONFIG_M25P_MEMORY_TYPE=0x20 +# CONFIG_M25P_SUBSECTOR_ERASE is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART=y +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART Configuration +# +CONFIG_UART_RXBUFSIZE=256 +CONFIG_UART_TXBUFSIZE=256 +CONFIG_UART_BAUD=115200 +CONFIG_UART_BITS=8 +CONFIG_UART_PARITY=0 +CONFIG_UART_2STOP=0 +# CONFIG_UART_IFLOWCONTROL is not set +# CONFIG_UART_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ea3131/pgnsh/setenv.sh b/configs/ea3131/pgnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..5d23d671899b64016d29ad0b221e70bf4344d6b5 --- /dev/null +++ b/configs/ea3131/pgnsh/setenv.sh @@ -0,0 +1,66 @@ +#!/bin/bash +# configs/ea3131/pgnsh/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the tools subdirectory + +export LPCTOOL_DIR="${WD}/configs/ea3131/tools" + +# Add the path to the toolchain to the PATH varialble + +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/ea3131/scripts/ld.script b/configs/ea3131/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..72a3d9f97dc8bfcce4fe84a5bf1269892383eb9f --- /dev/null +++ b/configs/ea3131/scripts/ld.script @@ -0,0 +1,114 @@ +/**************************************************************************** + * configs/ea3131/scripts/ld.script + * + * Copyright (C) 2010-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LPC3131 has 192Kb of ISRAM beginning at virtual address 0x1102:8000. + * LPC31xx boot ROM expects the boot image be compiled with entry point at + * 0x1102:9000. A 128b header will appear at this address (applied by + * lpc313xImgCreator) and the executable code must begin at 0x1102:9080. + */ + +MEMORY +{ + isram (rwx) : ORIGIN = 0x11029080, LENGTH = 192K - 4224 +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > isram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > isram + + .ARM.extab : { + *(.ARM.extab*) + } > isram + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > isram + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > isram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > isram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/ea3131/scripts/pg-ld.script b/configs/ea3131/scripts/pg-ld.script new file mode 100644 index 0000000000000000000000000000000000000000..d7c1f1d4d17e74d195030d4a84307b8cc1270f1f --- /dev/null +++ b/configs/ea3131/scripts/pg-ld.script @@ -0,0 +1,157 @@ +/**************************************************************************** + * configs/ea3131/scripts/pg-ld.script + * + * Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LPC3131 has 192Kb of ISRAM beginning at virtual address 0x1102:8000. + * LPC31xx boot ROM expects the boot image be compiled with entry point at + * 0x1102:9000. A 128b header will appear at this address (applied by + * lpc313xImgCreator) and the executable code must begin at 0x1102:9080. + * + * The .text vitual address space begins at the same location as the physical + * address space: 0x1102 8000. The virtual space is broken up into three + * regions: + * + * PHYSICAL VIRTUAL + * NAME DESCRIPTION SIZE START SIZE START + * -------- -------------------------- ----- ----------- ------- ----------- + * locked Pages locked in memory. 48Kb 0x1102 8000 48Kb 0x1102 8000 + * paged Pages in nonvolatile store. 96Kb 0x1103 4000 384Kb 0x1103 4000 + * data .data/.bss/heap. 32Kb 0x1104 c000 32Kb 0x1109 4000 + * Reserved for page table 16Kb 0x1105 4000 16Kb 0x1109 c000 + * -------- -------------------------- ----- ----------- ------- ----------- + * 192Kb 0x1105 8000 480Kb 0x110a 0000 + * + * These region sizes must match the size in pages specified for each region + * in the NuttX configuration file: CONFIG_PAGING_NLOCKED, CONFIG_PAGING_NVPAGED, + * and CONFIG_PAGING_NDATA. + * + * NOTE 1: The locked region is really big here so that you can enable lots of + * debug output without overflowing the locked region. 32Kb would probably be + * plenty if this were a real, optimized application. + * + * NOTE 2: Different compilers will compile the code to different sizes. If you + * get a link time error saying that the locked region is full, you may have to + * re-organize this memory layout (here and in defconfig) to make the locked + * region even bigger. + */ + +MEMORY +{ + locked (rx) : ORIGIN = 0x11029080, LENGTH = 48K - 4224 + paged (rx) : ORIGIN = 0x11034000, LENGTH = 384K + data (rw) : ORIGIN = 0x11094000, LENGTH = 44K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .locked : { + _slocked = ABSOLUTE(.); + *(.vectors) + up_head.o locked.r (.text .text.*) + up_head.o locked.r (.fixup) + up_head.o locked.r (.gnu.warning) + up_head.o locked.r (.rodata .rodata.*) + up_head.o locked.r (.gnu.linkonce.t.*) + up_head.o locked.r (.glue_7) + up_head.o locked.r (.glue_7t) + up_head.o locked.r (.got) + up_head.o locked.r (.gcc_except_table) + up_head.o locked.r (.gnu.linkonce.r.*) + _elocked = ABSOLUTE(.); + } >locked + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > locked + + .ARM.extab : { + *(.ARM.extab*) + } > locked + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > locked + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .paged : { + _spaged = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _epaged = ABSOLUTE(.); + } > paged + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > data AT > locked + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > data + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/ea3131/src/.gitignore b/configs/ea3131/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/ea3131/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/ea3131/src/Makefile b/configs/ea3131/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..3685f09453e3c46f1be9ac1fa24d0e3ca87b99d5 --- /dev/null +++ b/configs/ea3131/src/Makefile @@ -0,0 +1,74 @@ +############################################################################ +# configs/ea3131/src/Makefile +# +# Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc31_boot.c lpc31_clkinit.c + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += lpc31_buttons.c +endif + +ifeq ($(CONFIG_LPC31_EXTDRAM),y) +CSRCS += lpc31_mem.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += lpc31_leds.c +endif + +ifeq ($(CONFIG_LPC31_SPI),y) +CSRCS += lpc31_spi.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc31_appinit.c +endif + +ifeq ($(CONFIG_PAGING),y) +CSRCS += lpc31_fillpage.c +endif + +ifeq ($(CONFIG_LPC31_USBOTG),y) +ifeq ($(CONFIG_USBHOST),y) +CSRCS += lpc31_usbhost.c +endif +ifeq ($(CONFIG_USBMSC),y) +CSRCS += lpc31_usbmsc.c +endif +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/ea3131/src/ea3131.h b/configs/ea3131/src/ea3131.h new file mode 100644 index 0000000000000000000000000000000000000000..3a0698ef8a9a6114dc62fefc3771d156feefc024 --- /dev/null +++ b/configs/ea3131/src/ea3131.h @@ -0,0 +1,154 @@ +/************************************************************************************ + * configs/ea3131/src/ea3131.h + * + * Copyright (C) 2009-2010,2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_EA3131_SRC_EA3131_H +#define __CONFIGS_EA3131_SRC_EA3131_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include "lpc31_ioconfig.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* EA3131L GPIOs ********************************************************************/ + +/* LEDs -- interface through an I2C GPIO expander */ + +/* BUTTONS -- NOTE that some have EXTI interrupts configured */ + +/* SPI Chip Selects */ +/* SPI NOR flash is the only device on SPI. SPI_CS_OUT0 is its chip select */ + +#define SPINOR_CS IOCONFIG_SPI_CSOUT0 + +/* USB Soft Connect Pullup -- NONE */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc31_meminitialize + * + * Description: + * Initialize external memory resources (sram, sdram, nand, nor, etc.) + * + ************************************************************************************/ + +#ifdef CONFIG_LPC31_EXTDRAM +void lpc31_meminitialize(void); +#endif + +/************************************************************************************ + * Name: lpc31_spidev_intialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the EA3131 board. + * + ************************************************************************************/ + +void weak_function lpc31_spidev_intialize(void); + +/************************************************************************************ + * Name: lpc31_usbdev_initialize + * + * Description: + * Called to setup USB-related GPIO pins for the EA3131 board. + * + ************************************************************************************/ + +#if defined(CONFIG_LPC31_USBOTG) && defined(CONFIG_USBDEV) +void weak_function lpc31_usbdev_initialize(void); +#endif + +/************************************************************************************ + * Name: lpc31_usbhost_bootinitialize + * + * Description: + * Called from lpc31_boardinitialize very early in inialization to setup USB + * host-related GPIO pins for the EA3131 board. + * + ************************************************************************************/ + +#if defined(CONFIG_LPC31_USBOTG) && defined(CONFIG_USBHOST) +void weak_function lpc31_usbhost_bootinitialize(void); +#endif + +/*********************************************************************************** + * Name: lpc31_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +#if defined(CONFIG_LPC31_USBOTG) && defined(CONFIG_USBHOST) +int lpc31_usbhost_initialize(void); +#endif + +/************************************************************************************ + * Name: lpc31_pginitialize + * + * Description: + * Set up mass storage device to support on demand paging. + * + ************************************************************************************/ + +#ifdef CONFIG_PAGING +void weak_function lpc31_pginitialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_EA3131_SRC_EA3131_H */ diff --git a/configs/ea3131/src/lpc31_appinit.c b/configs/ea3131/src/lpc31_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..58e58709ca85f23aec89868e11579c14e092184c --- /dev/null +++ b/configs/ea3131/src/lpc31_appinit.c @@ -0,0 +1,153 @@ +/**************************************************************************** + * config/ea3131/src/lpc31_appinit.c + * + * Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_LPC31_MCI +# include +# include +#endif + +#include "lpc31.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_EA3131 +# define NSH_HAVEUSBDEV 1 +# define NSH_HAVEMMCSD 1 +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0 +# error "Only one MMC/SD slot" +# undef CONFIG_NSH_MMCSDSLOTNO +# endif +# ifndef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#else + /* Add configuration for new LPC31XX boards here */ + +# error "Unrecognized LPC31XX board" +# undef NSH_HAVEUSBDEV +# undef NSH_HAVEMMCSD +#endif + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support + * is not enabled. + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC31_MCI) +# undef NSH_HAVEMMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef NSH_HAVEMMCSD + FAR struct sdio_dev_s *sdio; + int ret; + + /* First, get an instance of the SDIO interface */ + + syslog(LOG_INFO, "Initializing SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + + sdio = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!sdio) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SPI interface to the MMC/SD driver */ + + syslog(LOG_INFO, "Bind SDIO to the MMC/SD driver, minor=%d\n", + CONFIG_NSH_MMCSDMINOR); + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdio); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SDIO to the MMC/SD driver\n"); + + /* Then let's guess and say that there is a card in the slot. I need to check to + * see if the LPC313X10E-EVAL board supports a GPIO to detect if there is a card in + * the slot. + */ + + sdio_mediachange(sdio, true); +#endif + return OK; +} diff --git a/configs/ea3131/src/lpc31_boot.c b/configs/ea3131/src/lpc31_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..1b48f1909054a9f3db944977d09446b84b5b39a9 --- /dev/null +++ b/configs/ea3131/src/lpc31_boot.c @@ -0,0 +1,132 @@ +/************************************************************************************ + * configs/ea3131/src/lpc31_boot.c + * + * Copyright (C) 2009, 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "lpc31.h" +#include "ea3131.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc31_boardinitialize + * + * Description: + * All LPC31XX architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc31_boardinitialize(void) +{ + /* Initialize configured, external memory resources */ + +#ifdef CONFIG_LPC31_EXTDRAM + lpc31_meminitialize(); +#endif + + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * lpc31_spidev_intialize() has been brought into the link. + */ + +#if defined(CONFIG_LPC31_SPI) + if (lpc31_spidev_intialize) + { + lpc31_spidev_intialize(); + } +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function lpc31_usbdev_initialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_LPC31_USBOTG) + if (lpc31_usbdev_initialize) + { + lpc31_usbdev_initialize(); + } +#endif + + /* Initialize USB if the 1) the HS host or device controller is in the + * configuration and 2) the weak function lpc31_usbhost_bootinitialize() has + * been brought into the build. Presumably either CONFIG_USBDEV or CONFIG_USBHOST + * is also selected. + */ + +#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS) + if (lpc31_usbhost_bootinitialize) + { + lpc31_usbhost_bootinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + + /* Set up mass storage device to support on demand paging */ + +#if defined(CONFIG_PAGING) + if (lpc31_pginitialize) + { + lpc31_pginitialize(); + } +#endif +} diff --git a/configs/ea3131/src/lpc31_buttons.c b/configs/ea3131/src/lpc31_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..de80fdf1bc5da078d0b4728b9c3dc7ab0abb6403 --- /dev/null +++ b/configs/ea3131/src/lpc31_buttons.c @@ -0,0 +1,85 @@ +/**************************************************************************** + * configs/ea3131/src/lpc31_buttons.c + * + * Copyright (C) 2009-2010, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "ea3131.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + ****************************************************************************/ + +void board_button_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return 0; +} + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/ea3131/src/lpc31_clkinit.c b/configs/ea3131/src/lpc31_clkinit.c new file mode 100644 index 0000000000000000000000000000000000000000..601cb72ab6f597555ba785a5d7f5e5370e791f59 --- /dev/null +++ b/configs/ea3131/src/lpc31_clkinit.c @@ -0,0 +1,438 @@ +/**************************************************************************** + * configs/ea3131/src/lpc31_clkinit.c + * + * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * References: + * - NXP UM10314 LPC3130/31 User manual Rev. 1.01 — 9 September 2009 + * - NXP lpc313x.cdl.drivers.zip example driver code + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "lpc31_cgu.h" +#include "lpc31_cgudrvr.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Sub-domain Clock Bitsets *************************************************/ +/* The following bitsets group clocks into bitsets associated with each + * domain and fractional divider subdomain. + * + * Domain 0 (DOMAINID_SYS), Clocks 0 - 29, Fraction dividers 0-6. Clocks not + * defined in the clock sets will be sourced with SYS_BASE_CLK. + */ + +/* Domain 0, Fractional divider 0: */ + +#define CGU_CLKSET_DOMAIN0_DIV0 \ + (_D0B(CLKID_APB0CLK)|_D0B(CLKID_APB1CLK)|_D0B(CLKID_APB2CLK)|\ + _D0B(CLKID_APB3CLK)|_D0B(CLKID_APB4CLK)|_D0B(CLKID_AHB2INTCCLK)|\ + _D0B(CLKID_AHB0CLK)|_D0B(CLKID_DMAPCLK)|_D0B(CLKID_DMACLKGATED)|\ + _D0B(CLKID_NANDFLASHS0CLK)|_D0B(CLKID_NANDFLASHPCLK)|\ + _D0B(CLKID_ARM926BUSIFCLK)|_D0B(CLKID_SDMMCHCLK)|_D0B(CLKID_USBOTGAHBCLK)|\ + _D0B(CLKID_ISRAM0CLK)|_D0B(CLKID_ISRAM1CLK)|_D0B(CLKID_ISROMCLK)|\ + _D0B(CLKID_MPMCCFGCLK)|_D0B(CLKID_MPMCCFGCLK2)|_D0B(CLKID_INTCCLK)) + +/* Domain 0, Fractional divider 1: */ + +#define CGU_CLKSET_DOMAIN0_DIV1 \ + (_D0B(CLKID_ARM926CORECLK)) + +/* Domain 0, Fractional divider 2: */ + +#define CGU_CLKSET_DOMAIN0_DIV2 \ + (_D0B(CLKID_NANDFLASHAESCLK)|_D0B(CLKID_NANDFLASHNANDCLK)) + +/* Domain 0, Fractional divider 3: */ + +#define CGU_CLKSET_DOMAIN0_DIV3 \ + (_D0B(CLKID_NANDFLASHECCCLK)) + +/* Domain 0, Fractional divider 4: */ + +#define CGU_CLKSET_DOMAIN0_DIV4 \ + (_D0B(CLKID_SDMMCCCLKIN)) + +/* Domain 0, Fractional divider 5: */ + +#define CGU_CLKSET_DOMAIN0_DIV5 \ + (_D0B(CLKID_CLOCKOUT)) + +/* Domain 0, Fractional divider 6: */ + +#define CGU_CLKSET_DOMAIN0_DIV6 \ + (_D0B(CLKID_EBICLK)) + +/* Domain 1 (DOMAINID_AHB0APB0), Clocks 30-39, Fraction dividers 7-8. Clocks + * not defined in the clock sets will be sourced with AHB_APB0_BASE_CLK. + */ + +/* Domain 1, Fractional divider 7: */ + +#define CGU_CLKSET_DOMAIN1_DIV7 \ + (_D1B(CLKID_ADCCLK)) + +/* Domain 1, Fractional divider 8: */ + +#define CGU_CLKSET_DOMAIN1_DIV8 \ + (_D1B(CLKID_AHB2APB0PCLK)|_D1B(CLKID_EVENTROUTERPCLK)|\ + _D1B(CLKID_ADCPCLK)|_D1B(CLKID_WDOGPCLK)|_D1B(CLKID_IOCONFPCLK)|\ + _D1B(CLKID_CGUPCLK)|_D1B(CLKID_SYSCREGPCLK)|_D1B(CLKID_OTPPCLK)|\ + _D1B(CLKID_RNGPCLK)) + +/* Domain 2 (DOMAINID_AHB0APB1), Clocks 40-49, Fraction dividers 9-10. Clocks + * not defined in the clock sets will be sourced with AHB_APB1_BASE_CLK. + */ + +/* Domain 2, Fractional divider 9: */ + +#define CGU_CLKSET_DOMAIN2_DIV9 \ + (_D2B(CLKID_AHB2APB1PCLK)|_D2B(CLKID_TIMER0PCLK)|_D2B(CLKID_TIMER1PCLK)|\ + _D2B(CLKID_TIMER2PCLK)|_D2B(CLKID_TIMER3PCLK)|_D2B(CLKID_PWMPCLK)|\ + _D2B(CLKID_PWMPCLKREGS)|_D2B(CLKID_I2C0PCLK)|_D2B(CLKID_I2C1PCLK)) + +/* Domain 2, Fractional divider 10: */ + +#define CGU_CLKSET_DOMAIN2_DIV10 \ + (_D2B(CLKID_PWMCLK)) + +/* Domain 3 (DOMAINID_AHB0APB2), Clocks 50-57, Fraction dividers 11-13. Clocks + * not defined in the clock sets will be sourced with AHB_APB2_BASE_CLK. + */ + +/* Domain 3, Fractional divider 11: */ + +#define CGU_CLKSET_DOMAIN3_DIV11 \ + ( _D3B(CLKID_AHB2APB2PCLK)|_D3B(CLKID_PCMPCLK)|_D3B(CLKID_PCMAPBPCLK)|\ + _D3B(CLKID_UARTAPBCLK)|_D3B(CLKID_LCDPCLK)|_D3B(CLKID_SPIPCLK)|\ + _D3B(CLKID_SPIPCLKGATED)) + +/* Domain 3, Fractional divider 12: */ + +#define CGU_CLKSET_DOMAIN3_DIV12 \ + (_D3B(CLKID_LCDCLK)) + +/* Domain 3, Fractional divider 13: */ + +#define CGU_CLKSET_DOMAIN3_DIV13 \ + (0) + +/* Domain 4 (DOMAINID_AHB0APB3), Clocks 58-70, Fraction divider 14. Clocks + * not defined in the clock sets will be sourced with AHB_APB3_BASE_CLK. + */ + +#define CGU_CLKSET_DOMAIN4_DIV14 \ + (_D4B(CLKID_AHB2APB3PCLK)|_D4B(CLKID_I2SCFGPCLK)|_D4B(CLKID_EDGEDETPCLK)|\ + _D4B(CLKID_I2STXFIFO0PCLK)|_D4B(CLKID_I2STXIF0PCLK)|_D4B(CLKID_I2STXFIFO1PCLK)|\ + _D4B(CLKID_I2STXIF1PCLK)|_D4B(CLKID_I2SRXFIFO0PCLK)|_D4B(CLKID_I2SRXIF0PCLK)|\ + _D4B(CLKID_I2SRXFIFO1PCLK)|_D4B(CLKID_I2SRXIF1PCLK)) + +/* Domain 5 (DOMAINID_PCM), Clock 71, Fraction divider 15. Clocks not + * defined in the clock sets will be sourced with AHB_APB3_BASE_CLK. + */ + +#define CGU_CLKSET_DOMAIN5_DIV15 \ + (_D5B(CLKID_PCMCLKIP)) + +/* Domain 6 (DOMAINID_UART), Clock 72, Fraction divider 16. Clocks mpt + * defined in the clock sets will be sourced with UART_BASE_CLK. + */ + +#define CGU_CLKSET_DOMAIN6_DIV16 \ + (0) + +/* Domain 7 (DOMAINID_CLK1024FS), Clocks 73-86, Fraction dividers 17-22. Clocks + * not defined in the clock sets will be sourced with CLK1024FS_BASE_CLK. + */ + +/* Domain 7, Fractional divider 17: */ + +#define CGU_CLKSET_DOMAIN7_DIV17 \ + ( _D7B(CLKID_I2SEDGEDETECTCLK)|_D7B(CLKID_I2STXWS0)|_D7B(CLKID_I2STXWS1)|\ + _D7B(CLKID_I2SRXWS0)|_D7B(CLKID_I2SRXWS1)) + +/* Domain 7, Fractional divider 18: */ + +#define CGU_CLKSET_DOMAIN7_DIV18 \ + ( _D7B(CLKID_I2STXBCK0N)|_D7B(CLKID_I2STXBCK1N)) + +/* Domain 7, Fractional divider 19: */ + +#define CGU_CLKSET_DOMAIN7_DIV19 \ + ( _D7B(CLKID_I2STXCLK0)|_D7B(CLKID_CLK256FS)) + +/* Domain 7, Fractional divider 20: */ + +#define CGU_CLKSET_DOMAIN7_DIV20 \ + ( _D7B(CLKID_I2SRXBCK0N)|_D7B(CLKID_I2SRXBCK1N)) + +/* Domain 7, Fractional divider 21: */ + +#define CGU_CLKSET_DOMAIN7_DIV21 \ + (0) + +/* Domain 7, Fractional divider 22: */ + +#define CGU_CLKSET_DOMAIN7_DIV22 \ + (0) + +/* Domain 8 (DOMAINID_BCK0, clock 87, and domain 9 (DOMAINID_BCK1), clock 88, + * are directly connected + */ + +/* Domain 10 (DOMAINID_SPI), Clocks 89-90, Fraction divider 23. Clocks + * not defined in the clock sets will be sourced with SPI_CLK_BASE_CLK. + */ + +#define CGU_CLKSET_DOMAIN10_DIV23 \ + ( _D10B(CLKID_SPICLK)|_D10B(CLKID_SPICLKGATED)) + +/* Domain 11 (DOMAINID_SYSCLKO, clock 91, is directly connected */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* Default clock configuration for the EA3131 board. Every board must + * provide an implementation of g_boardclks. This rather complex structure + * is used by the boot-up logic to configure initial lpc313x clocking. + * + * FFAST: 12MHz + * MASTER PLL Freq: 180MHz; + * AUDIOPLL Freq: 1024Fs, Fs = 44.1kHz + * + * Domain Input Subdomain Divider Ratio + * ------------------------ ----------------- ----------------- ------------- + * 0 - DOMAIN_SYS MASTER PLL(HPLL1) DOMAIN0_DIV0 1/2 + * DOMAIN0_DIV1 1 + * DOMAIN0_DIV2 1/2 + * DOMAIN0_DIV3 1/4 + * DOMAIN0_DIV4 1/4 + * DOMAIN0_DIV5 1/2 + * DOMAIN0_DIV6 1/2 + * + * 1 - DOMAIN_AHB0APB0 FFAST DOMAIN1_DIV7 1/38 + * DOMAIN1_DIV8 1/2 + * + * 2 - DOMAIN_AHB0APB1 FFAST DOMAIN2_DIV9 1/2 + * DOMAIN2_DIV10 1/2 + * + * 3 - DOMAIN_AHB0APB2 MASTER PLL(HPLL1) DOMAIN3_DIV11 1/2 + * DOMAIN3_DIV12 1/40 + * DOMAIN3_DIV13 1 (not used) + * + * 4 - DOMAIN_AHB0APB3 FFAST DOMAIN4_DIV14 1/2 + * + * 5 - DOMAIN_PCM MASTER PLL(HPLL1) DOMAIN5_DIV15 1/2 + * + * 6 - DOMAIN_UART FFAST DOMAIN6_DIV16 1 + * + * 7 - DOMAIN_CLCK1024FS AUDIO PLL(HPLL0) DOMAIN7_DIV17 1/256 + * DOMAIN7_DIV18 1/4 + * DOMAIN7_DIV19 1 + * DOMAIN7_DIV20 1/4 + * DOMAIN7_DIV21 1/32 + * DOMAIN7_DIV22 1/2 + * + * 8 - DOMAIN_I2SRXBCK0 I2SRX_BCK0 - - + * + * 9 - DOMAIN_I2SRXBCK1 I2SRX_BCK1 - - + * + * 10 - DOMAIN_SPI MASTER PLL(HPLL1) DOMAIN10_DIV23 1/2 + * + * 11 - DOMAIN_SYSCLKO FFAST - - + */ + +const struct lpc31_clkinit_s g_boardclks = +{ + /* Domain 0 (DOMAINID_SYS), Clocks 0 - 29, Fraction dividers 0-6 */ + + { + CGU_FREQIN_HPPLL1, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV0}, + {{0, 0, 0}, CGU_CLKSET_DOMAIN0_DIV1}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV2}, + {{1, 1, 4}, CGU_CLKSET_DOMAIN0_DIV3}, + {{1, 1, 4}, CGU_CLKSET_DOMAIN0_DIV4}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV5}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV6} + } + }, + + /* Domain 1 (DOMAINID_AHB0APB0), Clocks 30-39, Fraction dividers 7-8 */ + + { + CGU_FREQIN_FFAST, + { + {{1, 1, 38}, CGU_CLKSET_DOMAIN1_DIV7}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN1_DIV8} + } + }, + + /* Domain 2 (DOMAINID_AHB0APB1), Clocks 40-49, Fraction dividers 9-10 */ + + { + CGU_FREQIN_FFAST, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN2_DIV9}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN2_DIV10} + } + }, + + /* Domain 3 (DOMAINID_AHB0APB2), Clocks 50-57, Fraction dividers 11-13 */ + + { + CGU_FREQIN_HPPLL1, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN3_DIV11}, + {{1, 1, 40}, CGU_CLKSET_DOMAIN3_DIV12}, + {{0, 0, 0}, CGU_CLKSET_DOMAIN3_DIV13} + } + }, + + /* Domain 4 (DOMAINID_AHB0APB3), Clocks 58-70, Fraction divider 14 */ + + { + CGU_FREQIN_FFAST, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN4_DIV14} + } + }, + + /* Domain 5 (DOMAINID_PCM), Clock 71, Fraction divider 15 */ + + { + CGU_FREQIN_HPPLL1, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN5_DIV15} + } + }, + + /* Domain 6 (DOMAINID_UART), Clock 72, Fraction divider 16 */ + + { + CGU_FREQIN_FFAST, + { + {{0, 0, 0}, CGU_CLKSET_DOMAIN6_DIV16} + } + }, + + /* Domain 7 (DOMAINID_CLK1024FS), Clocks 73-86, Fraction dividers 17-22 */ + + { + CGU_FREQIN_HPPLL0, + { + {{1, 1, 256}, CGU_CLKSET_DOMAIN7_DIV17}, + {{1, 1, 4}, CGU_CLKSET_DOMAIN7_DIV18}, + {{0, 0, 0}, CGU_CLKSET_DOMAIN7_DIV19}, + {{1, 1, 4}, CGU_CLKSET_DOMAIN7_DIV20}, + {{1, 1, 32}, CGU_CLKSET_DOMAIN7_DIV21}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN7_DIV22} + } + }, + + /* Domain 8 (DOMAINID_BCK0, clock 87 */ + + { + CGU_FREQIN_I2SRXBCK0 + }, + + /* Domain 9 (DOMAINID_BCK1, clock 88 */ + + { + CGU_FREQIN_I2SRXBCK1 + }, + + /* Domain 10 (DOMAINID_SPI), Clocks 89-90, Fraction divider 23 */ + + { + CGU_FREQIN_HPPLL1, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN10_DIV23} + } + }, + + /* Domain 11 (DOMAINID_SYSCLKO, clock 91 */ + + { + CGU_FREQIN_FFAST + }, + + /* Dynamic fractional divider configuration (7) */ + +#if 0 /* Dynamic fractional divider initialization not implemented */ + { + { + CGU_DYNSEL_ALLBITS, {1, 1, 64} + }, + { + CGU_DYNSEL_ALLBITS, {0, 0, 0} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 3} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 6} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 6} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 6} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 3} + } + } +#endif +}; + + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ diff --git a/configs/ea3131/src/lpc31_fillpage.c b/configs/ea3131/src/lpc31_fillpage.c new file mode 100644 index 0000000000000000000000000000000000000000..3ca97433cf0fc23c373095851fd596b0aff20699 --- /dev/null +++ b/configs/ea3131/src/lpc31_fillpage.c @@ -0,0 +1,524 @@ +/**************************************************************************** + * configs/ea3131/src/lpc31_fillpage.c + * + * Copyright (C) 2010, 2012-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#ifdef CONFIG_PAGING +#ifdef CONFIG_PAGING_BINPATH +# include +# include +# include +# include +# include +# ifdef CONFIG_EA3131_PAGING_SDSLOT +# include +# include +# include +# include +# include "lpc31.h" +# endif +#endif + +#if defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) +# include +# include +# include +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* SD SLOT number might depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_EA3131 +# define HAVE_SD 1 +# define HAVE_SPINOR 1 +# if defined(CONFIG_EA3131_PAGING_SDSLOT) && CONFIG_EA3131_PAGING_SDSLOT != 0 +# error "Only one SD slot" +# undef CONFIG_EA3131_PAGING_SDSLOT +# endif +#else + /* Add configuration for new LPC31XX boards here */ +# error "Unrecognized LPC31XX board" +# undef CONFIG_EA3131_PAGING_SDSLOT +# undef HAVE_SD +# undef HAVE_SPINOR +#endif + +/* Sanity check: We can only perform paging using a single source device */ + +#if defined(CONFIG_PAGING_M25PX) && defined(CONFIG_PAGING_AT45DB) +# error "Both CONFIG_PAGING_M25PX and CONFIG_PAGING_AT45DB are defined" +# undef CONFIG_PAGING_M25PX +#endif +#if defined(CONFIG_PAGING_BINPATH) && defined(CONFIG_PAGING_M25PX) +# error "Both CONFIG_PAGING_BINPATH and CONFIG_PAGING_M25PX are defined" +# undef CONFIG_PAGING_BINPATH +#endif +#if defined(CONFIG_PAGING_BINPATH) && defined(CONFIG_PAGING_AT45DB) +# error "Both CONFIG_PAGING_BINPATH and CONFIG_PAGING_AT45DB are defined" +# undef CONFIG_PAGING_BINPATH +#endif + +/* Are we accessing the page source data through a file path? */ + +#ifdef CONFIG_PAGING_BINPATH + + /* Can't support SD if the board does not support SD (duh) */ + +# if defined(CONFIG_EA3131_PAGING_SDSLOT) && !defined(HAVE_SD) +# error "This board does not support SD" +# undef CONFIG_EA3131_PAGING_SDSLOT +# endif + + /* Can't support SD if mountpoints are disabled or if SDIO support + * is not enabled. + */ + +# if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC31_MCI) +# ifdef CONFIG_EA3131_PAGING_SDSLOT +# error "Mountpoints and/or MCI disabled" +# endif +# undef CONFIG_EA3131_PAGING_SDSLOT +# undef HAVE_SD +# endif + + /* A mountpoint for the FAT file system must be provided */ + +# if !defined(CONFIG_EA3131_PAGING_MOUNTPT) && defined(CONFIG_EA3131_PAGING_SDSLOT) +# error "No CONFIG_EA3131_PAGING_MOUNTPT provided" +# undef CONFIG_EA3131_PAGING_SDSLOT +# undef HAVE_SD +# endif + + /* If no minor number is provided, default to zero */ + +# ifndef CONFIG_EA3131_PAGING_MINOR +# define CONFIG_EA3131_PAGING_MINOR 0 +# endif + +#endif /* CONFIG_PAGING_BINPATH */ + +/* Are we accessing the page source data through the M25P* MTD device? */ + +#if defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) + + /* Verify that SPI support is enabld */ + +#ifndef CONFIG_LPC31_SPI +# error "SPI support is not enabled" +#endif + + /* Make sure that some value is defined for the offset into the FLASH + * of the NuttX binary image. + */ + +# ifndef CONFIG_EA3131_PAGING_BINOFFSET +# define CONFIG_EA3131_PAGING_BINOFFSET 0 +# endif + + /* Make sure that some value is defined for the SPI port number */ + +# ifndef CONFIG_EA3131_PAGING_SPIPORT +# define CONFIG_EA3131_PAGING_SPIPORT 0 +# endif +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* State structure needed to support paging from a file */ + +#ifdef CONFIG_PAGING_BINPATH +struct pg_source_s +{ + bool initialized; /* TRUE: we are initialized */ + int fd; /* File descriptor of the nuttx.bin file */ +}; +#endif + +/* State structured needd to support paging through the M25P* MTD interface. */ + +#if defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) +struct pg_source_s +{ + /* If interrupts or DMA are used, then we will have to defer initialization */ + + bool initialized; /* TRUE: we are initialized */ + + /* This is the M25P* device state structure */ + + FAR struct mtd_dev_s *mtd; + + /* This the device geometry */ + +#ifdef CONFIG_DEBUG + FAR struct mtd_geometry_s geo; +#endif +}; +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_PAGING_BINPATH) || defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) +static struct pg_source_s g_pgsrc; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc31_initsrc() + * + * Description: + * Initialize the source device that will support paging. + * If BINPATH is defined, then it is the full path to a file on a mounted file + * system. In this case initialization will be deferred until the first + * time that up_fillpage() is called. + * + ****************************************************************************/ + +#if defined(CONFIG_PAGING_BINPATH) +static inline void lpc31_initsrc(void) +{ +#ifdef CONFIG_EA3131_PAGING_SDSLOT + FAR struct sdio_dev_s *sdio; + int ret; +#endif + + /* Are we already initialized? */ + + if (!g_pgsrc.initialized) + { +#ifdef CONFIG_EA3131_PAGING_SDSLOT + char devname[16]; +#endif + + pgllvdbg("Initializing %s\n", CONFIG_PAGING_BINPATH); + + /* No, do we need to mount an SD device? */ + +#ifdef CONFIG_EA3131_PAGING_SDSLOT + + /* Yes.. First, get an instance of the SDIO interface */ + + sdio = sdio_initialize(CONFIG_EA3131_PAGING_SDSLOT); + DEBUGASSERT(sdio != NULL); + + /* Then bind the SDIO interface to the SD driver */ + + ret = mmcsd_slotinitialize(CONFIG_EA3131_PAGING_MINOR, sdio); + DEBUGASSERT(ret == OK); + + /* Then let's guess and say that there is a card in the slot. + * (We are basically jodido anyway if there is no card in the slot). + */ + + sdio_mediachange(sdio, true); + + /* Now mount the file system */ + + snprintf(devname, 16, "/dev/mmcsd%d", CONFIG_EA3131_PAGING_MINOR); + ret = mount(devname, CONFIG_EA3131_PAGING_MOUNTPT, "vfat", MS_RDONLY, NULL); + DEBUGASSERT(ret == OK); + +#endif /* CONFIG_EA3131_PAGING_SDSLOT */ + + /* Open the selected path for read-only access */ + + g_pgsrc.fd = open(CONFIG_PAGING_BINPATH, O_RDONLY); + DEBUGASSERT(g_pgsrc.fd >= 0); + + /* Then we are initialized */ + + g_pgsrc.initialized = true; + } +} + +#elif defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) +static inline void lpc31_initsrc(void) +{ + FAR struct spi_dev_s *spi; +#ifdef CONFIG_DEBUG + uint32_t capacity; + int ret; +#endif + + /* Are we already initialized? */ + + if (!g_pgsrc.initialized) + { + /* No... the initialize now */ + + pgllvdbg("Initializing\n"); + + /* First get an instance of the SPI device interface */ + + spi = lpc31_spibus_initialize(CONFIG_EA3131_PAGING_SPIPORT); + DEBUGASSERT(spi != NULL); + + /* Then bind the SPI interface to the MTD driver */ + +#ifdef CONFIG_PAGING_M25PX + g_pgsrc.mtd = m25p_initialize(spi); +#else + g_pgsrc.mtd = at45db_initialize(spi); +#endif + DEBUGASSERT(g_pgsrc.mtd != NULL); + + /* Verify that we can use the device */ + +#ifdef CONFIG_DEBUG + /* Get the device geometry. (casting to uintptr_t first eliminates + * complaints on some architectures where the sizeof long is different + * from the size of a pointer). + */ + + ret = MTD_IOCTL(g_pgsrc.mtd, MTDIOC_GEOMETRY, (unsigned long)&g_pgsrc.geo); + DEBUGASSERT(ret >= 0); + capacity = g_pgsrc.geo.erasesize*g_pgsrc.geo.neraseblocks; + pgllvdbg("capacity: %d\n", capacity); + DEBUGASSERT(capacity >= (CONFIG_EA3131_PAGING_BINOFFSET + PG_TEXT_VSIZE)); +#endif + + /* We are now initialized */ + + g_pgsrc.initialized = true; + } +} + +#else +# define lpc31_initsrc() +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_fillpage() + * + * Description: + * After a page is allocated and mapped by up_allocpage(), the actual + * filling of the page with data from the non-volatile, must be performed + * by a separate call to the architecture-specific function, up_fillpage(). + * This function is non-blocking, it will start an asynchronous page fill. + * The common paging logic will provide a callback function, pg_callback, + * that will be called when the page fill is finished (or an error occurs). + * This callback is assumed to occur from an interrupt level when the + * device driver completes the fill operation. + * + * NOTE 1: Allocating and filling a page is a two step process. up_allocpage() + * allocates the page, and up_fillpage() fills it with data from some non- + * volatile storage device. This distinction is made because up_allocpage() + * can probably be implemented in board-independent logic whereas up_fillpage() + * probably must be implemented as board-specific logic. + * + * NOTE 2: The initial mapping of vpage will be read-able, write-able, + * but non-cacheable. No special actions will be required of + * up_fillpage() in order to write into this allocated page. If the + * virtual address maps to a text region, however, this function should + * remap the region so that is is read/execute only. It should be made + * cache-able in any case. + + * Input Parameters: + * tcb - A reference to the task control block of the task that needs to + * have a page fill. Architecture-specific logic can retrieve page + * fault information from the architecture-specific context + * information in this TCB to perform the fill. + * pg_callbck - The function to be called when the page fill is complete. + * + * Returned Value: + * This function will return zero (OK) if the page fill was successfully + * started (the result of the page fill is passed to the callback function + * as the result argument). A negated errno value may be returned if an + * error occurs. All errors, however, are fatal. + * + * NOTE: -EBUSY has a special meaning. It is used internally to mean that + * the callback function has not executed. Therefore, -EBUSY should + * never be provided in the result argument of pg_callback. + * + * Assumptions: + * - This function is called from the normal tasking context (but + * interrupts siabled). The implementation must take whatever actions + * are necessary to assure that the operation is safe within this context. + * - Upon return, the caller will sleep waiting for the page fill callback + * to occur. The callback function will perform the wakeup. + * + ****************************************************************************/ + +#ifdef CONFIG_PAGING_BLOCKINGFILL + +/* Version 1: Supports blocking fill operations */ + +int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage) +{ +#if defined(CONFIG_PAGING_BINPATH) + ssize_t nbytes; + off_t offset; + off_t pos; +#elif defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) + ssize_t nbytes; + off_t offset; +#endif + + pglldbg("TCB: %p vpage: %p far: %08x\n", tcb, vpage, tcb->xcp.far); + DEBUGASSERT(tcb->xcp.far >= PG_PAGED_VBASE && tcb->xcp.far < PG_PAGED_VEND); + + /* If BINPATH is defined, then it is the full path to a file on a mounted file + * system. In this case initialization will be deferred until the first + * time that up_fillpage() is called. Are we initialized? + */ + +#if defined(CONFIG_PAGING_BINPATH) + + /* Perform initialization of the paging source device (if necessary) */ + + lpc31_initsrc(); + + /* Create an offset into the binary image that corresponds to the + * virtual address. File offset 0 corresponds to PG_LOCKED_VBASE. + */ + + offset = (off_t)tcb->xcp.far - PG_LOCKED_VBASE; + + /* Seek to that position */ + + pos = lseek(g_pgsrc.fd, offset, SEEK_SET); + DEBUGASSERT(pos != (off_t)-1); + + /* And read the page data from that offset */ + + nbytes = read(g_pgsrc.fd, vpage, PAGESIZE); + DEBUGASSERT(nbytes == PAGESIZE); + return OK; + +#elif defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) /* !CONFIG_PAGING_BINPATH */ + + /* Perform initialization of the paging source device (if necessary) */ + + lpc31_initsrc(); + + /* Create an offset into the binary image that corresponds to the + * virtual address. File offset 0 corresponds to PG_LOCKED_VBASE. + */ + + offset = (off_t)tcb->xcp.far - PG_LOCKED_VBASE + CONFIG_EA3131_PAGING_BINOFFSET; + + /* Read the page at the correct offset into the SPI FLASH device */ + + nbytes = MTD_READ(g_pgsrc.mtd, offset, PAGESIZE, (FAR uint8_t *)vpage); + DEBUGASSERT(nbytes == PAGESIZE); + return OK; + +#else /* !CONFIG_PAGING_BINPATH && !CONFIG_PAGING_M25PX && !CONFIG_PAGING_AT45DB */ + +# warning "Not implemented" + return -ENOSYS; + +#endif /* !CONFIG_PAGING_BINPATH && !CONFIG_PAGING_M25PX && !CONFIG_PAGING_AT45DB */ +} + +#else /* CONFIG_PAGING_BLOCKINGFILL */ + +/* Version 2: Supports non-blocking, asynchronous fill operations */ + +int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage, up_pgcallback_t pg_callback) +{ + pglldbg("TCB: %p vpage: %d far: %08x\n", tcb, vpage, tcb->xcp.far); + DEBUGASSERT(tcb->xcp.far >= PG_PAGED_VBASE && tcb->xcp.far < PG_PAGED_VEND); + +#if defined(CONFIG_PAGING_BINPATH) +# error "File system-based paging must always be implemented with blocking calls" +#elif defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) +# error "SPI FLASH paging must always be implemented with blocking calls" +#else +# warning "Not implemented" +#endif + + return -ENOSYS; +} + +#endif /* CONFIG_PAGING_BLOCKINGFILL */ + +/************************************************************************************ + * Name: lpc31_pginitialize + * + * Description: + * Set up mass storage device to support on demand paging. + * + ************************************************************************************/ + +void weak_function lpc31_pginitialize(void) +{ + /* This initialization does nothing in this example setup. But this function is + * where you might, for example: + * + * - Initialize and configure a mass storage device to support on-demand paging. + * This might be, perhaps an SD card or NAND memory. An SPI FLASH would probably + * already have been configured by lpc31_spidev_intialize(void); + * - Set up resources to support up_fillpage() operation. For example, perhaps the + * the text image is stored in a named binary file. In this case, the virtual + * text addresses might map to offsets into that file. + * - Do whatever else is necessary to make up_fillpage() ready for the first time + * that it is called. + * + * In reality, however, this function is not very useful: This function is called + * from a low level (before os_start() is even called), it may not be possible to + * perform file system operations or even to get debug output yet. Therefore, + * to keep life simple, initialization will be deferred in all cases until the first + * time that up_fillpage() is called. + */ +} + +#endif /* CONFIG_PAGING */ diff --git a/configs/ea3131/src/lpc31_leds.c b/configs/ea3131/src/lpc31_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..367c3031c461f91c7ac2e52a5ba746d9ffd1c1d5 --- /dev/null +++ b/configs/ea3131/src/lpc31_leds.c @@ -0,0 +1,107 @@ +/**************************************************************************** + * configs/ea3131/src/lpc31_leds.c + * + * Copyright (C) 2009-2010, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "lpc31.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/ea3131/src/lpc31_mem.c b/configs/ea3131/src/lpc31_mem.c new file mode 100644 index 0000000000000000000000000000000000000000..d9dbafb049aea104fabec17ee8d1d993beef9b9a --- /dev/null +++ b/configs/ea3131/src/lpc31_mem.c @@ -0,0 +1,357 @@ +/**************************************************************************** + * configs/ea3131/src/lpc31_mem.c + * + * Copyright (C) 2009-2010,2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * References: + * - NXP UM10314 LPC3130/31 User manual Rev. 1.01 — 9 September 2009 + * - NXP lpc313x.cdl.drivers.zip example driver code + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "lpc31_syscreg.h" +#include "lpc31_cgudrvr.h" +#include "lpc31_mpmc.h" +#include "ea3131.h" + +#ifdef CONFIG_LPC31_EXTDRAM + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* The MPMC delay based on trace lengths between SDRAM and the chip and on + * the delay strategy used for SDRAM. + */ + +#define EA3131_MPMC_DELAY 0x824 + +/*Delay constants in nanosecondss for MT48LC32M16LF SDRAM on board */ + +#define EA3131_SDRAM_TRP (20) +#define EA3131_SDRAM_TRFC (66) +#define EA3131_SDRAM_TRAS (44) +#define EA3131_SDRAM_TREX (75) +#define EA3131_SDRAM_TARP 4 +#define EA3131_SDRAM_TWR (75) +#define EA3131_SDRAM_TRC (66) +#define EA3131_SDRAM_TRRD (15) +#define EA3131_SDRAM_TMRD (20) +#define EA3131_SDRAM_TXSR (75) +#define EA3131_SDRAM_TDAL (50) +#define EA3131_SDRAM_REFRESH (100) +#define EA3131_SDRAM_OPERREFRESH (7812) + +/* Macro used to convert the above values (in nanoseconds) into units of + * the HCLK. + */ + +#define NS2HCLKS(ns,hclk2,mask) \ + ((uint32_t)(((uint64_t)ns *(uint64_t)hclk2) / 1000000000ull) & mask) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc31_sdraminitialize + * + * Description: + * Configure SDRAM on the EA3131 board + * + * Micron Initialization Sequence from their data sheet for the Micron + * MT48LC32M16A2 32M x 16 SDRAM chip: + * + * "SDRAMs must be powered up and initialized in a predefined manner. + * Operational procedures other than those specified may result in + * undefined operation. Once power is applied to VDD and VDDQ + * (simultaneously) and the clock is stable (stable clock is defined as + * a signal cycling within timing constraints specified for the clock + * pin), the SDRAM requires a 100µs delay prior to issuing any command + * other than a COMMAND INHIBIT or NOP. + * + * "Starting at some point during this 100µs period and continuing at least + * through the end of this period, COMMAND INHIBIT or NOP commands should + * be applied. Once the 100µs delay has been satisfied with at least one + * COMMAND INHIBIT or NOP command having been applied, a PRECHARGE command + * should be applied. All banks must then be precharged, thereby placing + * the device in the all banks idle state. + * + * "Once in the idle state, two AUTO REFRESH cycles must be performed. After + * the AUTO REFRESH cycles are complete, the SDRAM is ready for mode + * register programming. + * + * "Because the mode register will power up in an unknown state, it should + * be loaded prior to applying any operational command." + * + * The JEDEC recommendation for initializing SDRAM is: + * + * APPLY POWER (Vdd/Vddq equally, and CLK is stable) + * Wait 200uS + * PRECHARGE all + * 8 AUTO REFRESH COMMANDS + * LOAD MODE REGISTER + * SDRAM is ready for operation + * + * The Micron SDRAM parts will work fine with the JEDEC sequence, but also + * allow for a quicker init sequence of: + * + * APPLY POWER (Vdd/Vddq equally, and CLK is stable) + * Wait at least 100uS (during which time start applying and + * continue applying NOP or COMMAND INHIBIT) + * PRECHARGE all + * 2 AUTO REFRESH COMMANDS (min requirement, more than 2 is also ok) + * LOAD MODE REGISTER + * SDRAM is ready for operation + * + ****************************************************************************/ + +static void lpc31_sdraminitialize(void) +{ + uint32_t regval; + + /* These run-time calculations can be reduced dramatically if hclk is + * replaced with an apriori value. + */ + +#ifdef CONFIG_LPC31_SDRAMHCLK +# define HCLK CONFIG_LPC31_SDRAMHCLK +#else + uint32_t hclk = lpc31_clkfreq(CLKID_MPMCCFGCLK2, DOMAINID_SYS); +# define HCLK hclk +#endif + + /* Check RTL for divide by 2 possible. If so change then enable the followng logic */ +#if 0 + uint32_t hclk2 = hclk; + + if (((getreg32(LPC31_MPMC_CONFIG) & MPMC_CONFIG_CLK)) != 0) + { + hclk2 >>= 1; + } +# define HCLK2 hclk2 +#else +# define HCLK2 hclk +#endif + up_udelay(100); + + /* Set command delay startergy */ + + putreg32(MPMC_DYNREADCONFIG_CMDDEL, LPC31_MPMC_DYNREADCONFIG); + + /* Configure device config register nSDCE0 for proper width SDRAM */ + + putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16), + LPC31_MPMC_DYNCONFIG0); + putreg32((MPMC_DYNRASCAS0_RAS2CLK|MPMC_DYNRASCAS0_CAS2CLK), + LPC31_MPMC_DYNRASCAS0); + + /* Min 20ns program 1 so that at least 2 HCLKs are used */ + + putreg32(NS2HCLKS(EA3131_SDRAM_TRP, HCLK2, MPMC_DYNTRP_MASK), + LPC31_MPMC_DYNTRP); + putreg32(NS2HCLKS(EA3131_SDRAM_TRAS, HCLK2, MPMC_DYNTRAS_MASK), + LPC31_MPMC_DYNTRAS); + putreg32(NS2HCLKS(EA3131_SDRAM_TREX, HCLK2, MPMC_DYNTSREX_MASK), + LPC31_MPMC_DYNTSREX); + putreg32(EA3131_SDRAM_TARP, + LPC31_MPMC_DYNTAPR); + putreg32(NS2HCLKS(EA3131_SDRAM_TDAL, HCLK2, MPMC_DYNTDAL_MASK), + LPC31_MPMC_DYNTDAL); + putreg32(NS2HCLKS(EA3131_SDRAM_TWR, HCLK2, MPMC_DYNTWR_MASK), + LPC31_MPMC_DYNTWR); + putreg32(NS2HCLKS(EA3131_SDRAM_TRC, HCLK2, MPMC_DYNTRC_MASK), + LPC31_MPMC_DYNTRC); + putreg32(NS2HCLKS(EA3131_SDRAM_TRFC, HCLK2, MPMC_DYNTRFC_MASK), + LPC31_MPMC_DYNTRFC); + putreg32(NS2HCLKS(EA3131_SDRAM_TXSR, HCLK2, MPMC_DYNTXSR_MASK), + LPC31_MPMC_DYNTXSR); + putreg32(NS2HCLKS(EA3131_SDRAM_TRRD, HCLK2, MPMC_DYNTRRD_MASK), + LPC31_MPMC_DYNTRRD); + putreg32(NS2HCLKS(EA3131_SDRAM_TMRD, HCLK2, MPMC_DYNTMRD_MASK), + LPC31_MPMC_DYNTMRD); + up_udelay(100); + + /* Issue continuous NOP commands */ + + putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_INOP), + LPC31_MPMC_DYNCONTROL); + + /* Wait ~200us */ + + up_udelay(200); + + /* Issue a "pre-charge all" command */ + + putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_IPALL), + LPC31_MPMC_DYNCONTROL); + + /* Minimum refresh pulse interval (tRFC) for MT48LC32M16A2=80nsec, + * 100nsec provides more than adequate interval. + */ + + putreg32(NS2HCLKS(EA3131_SDRAM_REFRESH, HCLK, MPMC_DYNREFRESH_TIMER_MASK), + LPC31_MPMC_DYNREFRESH); + + /* Wait ~250us */ + + up_udelay(250); + + /* Recommended refresh interval for normal operation of the Micron + * MT48LC16LFFG = 7.8125usec (128KHz rate). ((HCLK / 128000) - 1) = + * refresh counter interval rate, (subtract one for safety margin). + */ + + putreg32(NS2HCLKS(EA3131_SDRAM_OPERREFRESH, HCLK, MPMC_DYNREFRESH_TIMER_MASK), + LPC31_MPMC_DYNREFRESH); + + /* Select mode register update mode */ + + putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_IMODE), + LPC31_MPMC_DYNCONTROL); + + /* Program the SDRAM internal mode registers on bank nSDCE0 and reconfigure + * the SDRAM chips. Bus speeds up to 90MHz requires use of a CAS latency = 2. + * To get correct value on address bus CAS cycle, requires a shift by 13 for + * 16bit mode + */ + + (void)getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 13)); + + putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16), + LPC31_MPMC_DYNCONFIG0); + putreg32((MPMC_DYNRASCAS0_RAS2CLK|MPMC_DYNRASCAS0_CAS2CLK), + LPC31_MPMC_DYNRASCAS0); + + /* Select normal operating mode */ + + putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_INORMAL), + LPC31_MPMC_DYNCONTROL); + + /* Enable buffers */ + + regval = getreg32(LPC31_MPMC_DYNCONFIG0); + regval |= MPMC_DYNCONFIG0_B; + putreg32(regval, LPC31_MPMC_DYNCONFIG0); + + putreg32((MPMC_DYNCONTROL_INORMAL|MPMC_DYNCONTROL_CS), + LPC31_MPMC_DYNCONTROL); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc31_meminitialize + * + * Description: + * Initialize external memory resources (sram, sdram, nand, nor, etc.) + * + ****************************************************************************/ + +void lpc31_meminitialize(void) +{ + /* Configure the LCD pins in external bus interface (EBI/MPMC) memory mode. + * + * LCD_CSB -> MPMC_NSTCS_0 + * LCD_DB_1 -> MPMC_NSTCS_1 + * LCD_DB_0 -> MPMC_CLKOUT + * LCD_E_RD -> MPMC_CKE + * LCD_RS -> MPMC_NDYCS + * LCD_RW_WR -> MPMC_DQM_1 + * LCD_DB_2 -> EBI_A_2 + * LCD_DB_3 -> EBI_A_3 l + * LCD_DB_4 -> EBI_A_4 l + * LCD_DB_5 -> EBI_A_5 l + * LCD_DB_6 -> EBI_A_6 + * LCD_DB_7 -> EBI_A_7 + * LCD_DB_8 -> EBI_A_8 + * LCD_DB_9 -> EBI_A_9 + * LCD_DB_10 -> EBI_A_10 + * LCD_DB_11 -> EBI_A_11 + * LCD_DB_12 -> EBI_A_12 + * LCD_DB_13 -> EBI_A_13 + * LCD_DB_14 -> EBI_A_14 + * LCD_DB_15 -> EBI_A_15 + */ + + putreg32(SYSCREG_MUX_LCDEBISEL_EBIMPMC, LPC31_SYSCREG_MUX_LCDEBISEL); + + /* Enable EBI clock */ + + lpc31_enableclock(CLKID_EBICLK); + + /* Enable MPMC controller clocks */ + + lpc31_enableclock(CLKID_MPMCCFGCLK); + lpc31_enableclock(CLKID_MPMCCFGCLK2); + lpc31_enableclock(CLKID_MPMCCFGCLK3); + + /* Enable the external memory controller */ + + putreg32(MPMC_CONTROL_E, LPC31_MPMC_CONTROL); + + /* Force HCLK to MPMC_CLK to 1:1 ratio, little-endian mode */ + + putreg32(0, LPC31_MPMC_CONFIG); + + /* Set MPMC delay based on trace lengths between SDRAM and the chip + * and on the delay strategy used for SDRAM. + */ + + putreg32(EA3131_MPMC_DELAY, LPC31_SYSCREG_MPMC_DELAYMODES); + + /* Configure Micron MT48LC32M16A2 SDRAM on the EA3131 board */ + + lpc31_sdraminitialize(); +} +#endif /* CONFIG_LPC31_EXTDRAM */ diff --git a/configs/ea3131/src/lpc31_spi.c b/configs/ea3131/src/lpc31_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..cda79ac9e63998245c3fbbeb21397343bc8cc7d4 --- /dev/null +++ b/configs/ea3131/src/lpc31_spi.c @@ -0,0 +1,140 @@ +/************************************************************************************ + * configs/ea3131/src/lpc31_spi.c + * + * Copyright (C) 2009-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "lpc31.h" +#include "ea3131.h" + +#ifdef CONFIG_LPC31_SPI +#if 0 /* At present, EA3131 specific logic is hard-coded in the file lpc31_spi.c + * in arch/arm/src/lpc31xx */ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc31_spidev_intialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the EA3131 board. + * + ************************************************************************************/ + +void weak_function lpc31_spidev_intialize(void) +{ + /* NOTE: Clocking for SPI has already been provided. Pin configuration is performed + * on-the-fly, so no additional setup is required. + */ +} + +/************************************************************************************ + * Name: lpc31_spiselect and lpc31_spistatus + * + * Description: + * The external functions, lpc31_spiselect and lpc31_spistatus must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including lpc31_spibus_initialize()) + * are provided by common LPC31XX logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in lpc31_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide lpc31_spiselect() and lpc31_spistatus() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to lpc31_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by lpc31_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t lpc31_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} + +#endif /* 0 */ +#endif /* CONFIG_LPC31_SPI */ diff --git a/configs/ea3131/src/lpc31_usbhost.c b/configs/ea3131/src/lpc31_usbhost.c new file mode 100644 index 0000000000000000000000000000000000000000..4c7b500233f4cb48ddb305a74dc921cd3b00571c --- /dev/null +++ b/configs/ea3131/src/lpc31_usbhost.c @@ -0,0 +1,328 @@ +/************************************************************************************ + * configs/ea3131/src/lpc31_usbhost.c + * + * Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "up_arch.h" + +#include "lpc31.h" +#include "ea3131.h" + +#if defined(CONFIG_LPC31_USBOTG) || defined(CONFIG_USBHOST) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_USBHOST_DEFPRIO +# define CONFIG_USBHOST_DEFPRIO 50 +#endif + +#ifndef CONFIG_USBHOST_STACKSIZE +# ifdef CONFIG_USBHOST_HUB +# define CONFIG_USBHOST_STACKSIZE 1536 +# else +# define CONFIG_USBHOST_STACKSIZE 1024 +# endif +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* Retained device driver handle */ + +static struct usbhost_connection_s *g_ehciconn; + +/* Overcurrent interrupt handler */ + +#if 0 /* Not yet implemented */ +static xcpt_t g_ochandler; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: ehci_waiter + * + * Description: + * Wait for USB devices to be connected to the EHCI root hub. + * + ************************************************************************************/ + +static int ehci_waiter(int argc, char *argv[]) +{ + FAR struct usbhost_hubport_s *hport; + + uvdbg("ehci_waiter: Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_ehciconn, &hport)); + syslog(LOG_INFO, "ehci_waiter: %s\n", + hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_ehciconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc31_usbhost_bootinitialize + * + * Description: + * Called from lpc31_boardinitialize very early in inialization to setup USB + * host-related GPIO pins for the EA3131 board. + * + * USB host VBUS power is controlled by a Micrel USB power switch. That switch is + * driver by a discrete that comes from the I2C-contrrol PCA9532 GPIO expander. + * + ************************************************************************************/ + +void weak_function lpc31_usbhost_bootinitialize(void) +{ + /* Get an instance of the I2C interface. This will be needed to control the + * PCA9532 GPIO expander. + */ +#warning Missing logic + + /* Use the I2C interface to initialize the PCA9532 GPIO expander driver */ +#warning Missing logic + + /* Configure pin to drive VBUS power using the PCA8532 GPIO expander */ +#warning Missing logic + + /* Configure pin to detect overrcurrent errors */ +#warning Missing logic +} + +/*********************************************************************************** + * Name: lpc31_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +int lpc31_usbhost_initialize(void) +{ + pid_t pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about + */ + +#ifdef CONFIG_USBHOST_HUB + /* Initialize USB hub support */ + + ret = usbhost_hub_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: usbhost_hub_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB host Mass Storage Class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + usyslog(LOG_ERR, "ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the CDC/ACM serial class\n"); + } +#endif + +#ifdef CONFIG_USBHOST_HIDKBD + /* Register the USB host HID keyboard class driver */ + + ret = usbhost_kbdinit(); + if (ret != OK) + { + udbg("ERROR: Failed to register the KBD class\n"); + } +#endif + + /* Then get an instance of the USB EHCI interface. */ + + g_ehciconn = lpc31_ehci_initialize(0); + if (!g_ehciconn) + { + udbg("ERROR: lpc31_ehci_initialize failed\n"); + return -ENODEV; + } + + /* Start a thread to handle device connection. */ + + pid = task_create("EHCI Monitor", CONFIG_USBHOST_DEFPRIO, CONFIG_USBHOST_STACKSIZE, + (main_t)ehci_waiter, (FAR char * const *)NULL); + if (pid < 0) + { + udbg("ERROR: Failed to create ehci_waiter task: %d\n", ret); + return -ENODEV; + } + + return OK; +} + +/*********************************************************************************** + * Name: lpc31_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be provided by + * each platform that implements the OHCI or EHCI host interface + * + * Input Parameters: + * rhport - Selects root hub port to be powered host interface. Since the LPC31 + * has only a downstream port, zero is the only possible value for this + * parameter. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ***********************************************************************************/ + +void lpc31_usbhost_vbusdrive(int rhport, bool enable) +{ + uvdbg("RHPort%d: enable=%d\n", rhport+1, enable); + + /* The LPC3131 has only a single root hub port */ + + if (rhport == 0) + { + /* Then enable or disable VBUS power */ + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ +#warning Missing logic + } + else + { + /* Disable the Power Switch by driving the enable pin high */ +#warning Missing logic + } + } +} + +/************************************************************************************ + * Name: lpc31_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent condition is + * detected. + * + * Input parameter: + * handler - New overcurrent interrupt handler + * + * Returned value: + * Old overcurrent interrupt handler + * + ************************************************************************************/ + +#if 0 /* Not ready yet */ +xcpt_t lpc31_setup_overcurrent(xcpt_t handler) +{ + xcpt_t oldhandler; + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = g_ochandler; + g_ochandler = handler; + + /* Configure the interrupt */ +#warning Missing logic + + /* Return the old button handler (so that it can be restored) */ + + leave_critical_section(flags); + return oldhandler; +} +#endif /* 0 */ + +#endif /* CONFIG_LPC31_USBOTG || CONFIG_USBHOST */ diff --git a/configs/ea3131/src/lpc31_usbmsc.c b/configs/ea3131/src/lpc31_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..f55bdc8e10f58594b18216a79349fde2cbea6481 --- /dev/null +++ b/configs/ea3131/src/lpc31_usbmsc.c @@ -0,0 +1,130 @@ +/**************************************************************************** + * configs/ea3131/src/lpc31_usbmsc.c + * + * Copyright (C) 2010, 2013, 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the SAM3U MMC/SD SDIO block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +#ifndef CONFIG_SYSTEM_USBMSC_DEVPATH1 +# define CONFIG_SYSTEM_USBMSC_DEVPATH1 "/dev/ram" +#endif + +static const char g_source[] = CONFIG_SYSTEM_USBMSC_DEVPATH1; +static struct fat_format_s g_fmt = FAT_FORMAT_INITIALIZER; + +#define USBMSC_NSECTORS 64 +#define USBMSC_SECTORSIZE 512 +#define BUFFER_SIZE (USBMSC_NSECTORS*USBMSC_SECTORSIZE) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization of the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + uint8_t *pbuffer; + int ret; + + pbuffer = (uint8_t *)kmm_malloc(BUFFER_SIZE); + if (!pbuffer) + { + lowsyslog(LOG_ERR, "ERROR: Failed to allocate ramdisk of size %d\n", + BUFFER_SIZE); + return -ENOMEM; + } + + /* Register a RAMDISK device to manage this RAM image */ + + ret = ramdisk_register(CONFIG_SYSTEM_USBMSC_DEVMINOR1, + pbuffer, + USBMSC_NSECTORS, + USBMSC_SECTORSIZE, + RDFLAG_WRENABLED | RDFLAG_FUNLINK); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: create_ramdisk: Failed to register ramdisk at %s: %d\n", + g_source, -ret); + kmm_free(pbuffer); + return ret; + } + + /* Create a FAT filesystem on the ramdisk */ + + ret = mkfatfs(g_source, &g_fmt); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: create_ramdisk: Failed to create FAT filesystem on ramdisk at %s\n", + g_source); + /* kmm_free(pbuffer); -- RAM disk is registered */ + return ret; + } + + return 0; +} diff --git a/configs/ea3131/tools/.gitignore b/configs/ea3131/tools/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..76268bd4382fe0dbdcd737420f61777124a2c185 --- /dev/null +++ b/configs/ea3131/tools/.gitignore @@ -0,0 +1,2 @@ +/lpchdr +/*.exe diff --git a/configs/ea3131/tools/Makefile b/configs/ea3131/tools/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..0d6f43d09e847b5c48248cfc3441a0b6e3fabbc3 --- /dev/null +++ b/configs/ea3131/tools/Makefile @@ -0,0 +1,53 @@ +############################################################################ +# configs/ea3131/tools/Makefile +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +OBJS = lpchdr.o crc32.o +BIN = lpchdr + +CFLAGS += -Wall -g + +all: $(BIN) +.PHONY: clean + +$(OBJS): %.o: %.c + $(CC) -c $(CFLAGS) $< -o $@ + +lpchdr: $(OBJS) + $(CC) -o $@ $^ + +clean: + @rm -f $(BIN) *.o *~ + + diff --git a/configs/ea3131/tools/armusbocd.cfg b/configs/ea3131/tools/armusbocd.cfg new file mode 100644 index 0000000000000000000000000000000000000000..733e3768cbd57e2ae541ea277f90dd68b73f39a8 --- /dev/null +++ b/configs/ea3131/tools/armusbocd.cfg @@ -0,0 +1,34 @@ +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +#interface +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG A" +ft2232_layout "olimex-jtag" +ft2232_vid_pid 0x15BA 0x0003 +jtag_speed 2 + +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config trst_and_srst separate + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +#target configuration +daemon_startup reset + +#target +#target arm9ejs +target arm926ejs little run_and_halt 0 arm926ejs +run_and_halt_time 0 30 + +#target_script 0 reset oocd_flash2138.script +working_area 0 0x1102800 0x60000 nobackup + +#flash configuration +#flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v2 12000 calc_checksum + +# For more information about the configuration files, take a look at: +# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger diff --git a/configs/ea3131/tools/crc32.c b/configs/ea3131/tools/crc32.c new file mode 100644 index 0000000000000000000000000000000000000000..11c8f5de41ea1458f29a6a482fe98dcb97a141b3 --- /dev/null +++ b/configs/ea3131/tools/crc32.c @@ -0,0 +1,123 @@ +/************************************************************************************************ + * configs/ea3131/tools/crc32.c + * + * This file is a part of NuttX: + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * + * The logic in this file was developed by Gary S. Brown: + * + * COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or code or tables + * extracted from it, as desired without restriction. + * + * First, the polynomial itself and its table of feedback terms. The polynomial is: + * + * X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0 + * + * Note that we take it "backwards" and put the highest-order term in the lowest-order bit. + * The X^32 term is "implied"; the LSB is the X^31 term, etc. The X^0 term (usually shown + * as "+1") results in the MSB being 1 + * + * Note that the usual hardware shift register implementation, which is what we're using + * (we're merely optimizing it by doing eight-bit chunks at a time) shifts bits into the + * lowest-order term. In our implementation, that means shifting towards the right. Why + * do we do it this way? Because the calculated CRC must be transmitted in order from + * highest-order term to lowest-order term. UARTs transmit characters in order from LSB + * to MSB. By storing the CRC this way we hand it to the UART in the order low-byte to + * high-byte; the UART sends each low-bit to hight-bit; and the result is transmission bit + * by bit from highest- to lowest-order term without requiring any bit shuffling on our + * part. Reception works similarly + * + * The feedback terms table consists of 256, 32-bit entries. Notes + * + * - The table can be generated at runtime if desired; code to do so is shown later. It + * might not be obvious, but the feedback terms simply represent the results of eight + * shift/xor operations for all combinations of data and CRC register values + * + * - The values must be right-shifted by eight bits by the updcrc logic; the shift must + * be u_(bring in zeroes). On some hardware you could probably optimize the shift in + * assembler by using byte-swap instructions polynomial $edb88320 + ************************************************************************************************/ + +/************************************************************************************************ + * Included Files + ************************************************************************************************/ + +#include +#include +#include "lpchdr.h" + +/************************************************************************************************ + * Private Data + ************************************************************************************************/ + +static const uint32_t crc32_tab[] = +{ + 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, + 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, + 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, + 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5, + 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, + 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, + 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f, + 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, + 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, + 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, + 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, + 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, + 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, + 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, + 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, + 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, + 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, + 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, + 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, + 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, + 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, + 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79, + 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, + 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, + 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, + 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, + 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, + 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, + 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, + 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, + 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, + 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d +}; + +/************************************************************************************************ + * Public Functions + ************************************************************************************************/ +/************************************************************************************************ + * Name: crc32part + * + * Description: + * Continue CRC calculation on a part of the buffer. + * + ************************************************************************************************/ + +uint32_t crc32part(const uint8_t *src, size_t len, uint32_t crc32val) +{ + size_t i; + + for (i = 0; i < len; i++) + { + crc32val = crc32_tab[(crc32val ^ src[i]) & 0xff] ^ (crc32val >> 8); + } + return crc32val; +} + +/************************************************************************************************ + * Name: crc32 + * + * Description: + * Return a 32-bit CRC of the contents of the 'src' buffer, length 'len' + * + ************************************************************************************************/ + +uint32_t crc32(const uint8_t *src, size_t len) +{ + return crc32part(src, len, 0); +} diff --git a/configs/ea3131/tools/lpchdr.c b/configs/ea3131/tools/lpchdr.c new file mode 100644 index 0000000000000000000000000000000000000000..18f19e1647470fcea4fc229f72eefe80f0327969 --- /dev/null +++ b/configs/ea3131/tools/lpchdr.c @@ -0,0 +1,297 @@ +/************************************************************************************ + * configs/ea3131/tools/lpchdr.c + * + * Copyright (C) 2010-2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "lpchdr.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define IO_BUF_SIZE 1024 +#define HDR_SIZE 0x80 +#define HDR_CRC_SIZE 0x6c + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static const char *g_infile; +static const char *g_outfile; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +static void show_usage(const char *progname, int exitcode) +{ + fprintf(stderr, "%s -o \n", progname); + exit(exitcode); +} + +static void parse_args(int argc, char **argv) +{ + int ch; + + while ((ch = getopt(argc, argv, ":o:")) >= 0) + { + switch (ch) + { + case 'o': + g_outfile = optarg; + break; + + case ':': + fprintf(stderr, "Missing option argumen\n"); + show_usage(argv[0], 1); + + case '?': + default: + fprintf(stderr, "Unrecognized option\n"); + show_usage(argv[0], 1); + } + } + + if (optind >= argc) + { + fprintf(stderr, "Missing binary input file name\n"); + show_usage(argv[0], 1); + } + + g_infile = argv[optind]; + optind++; + + if (optind < argc) + { + fprintf(stderr, "Garbage at the end of the command line\n"); + show_usage(argv[0], 1); + } +} + +static inline uint32_t infilecrc32(int infd, size_t len, size_t padlen) +{ + off_t offset; + uint8_t buffer[IO_BUF_SIZE]; + ssize_t nbytes; + size_t bytesread; + uint32_t crc; + + offset = lseek(infd, 0, SEEK_SET); + if (offset == (off_t)-1) + { + fprintf(stderr, "lseek failed: %s\n", strerror(errno)); + exit(4); + } + + crc = 0; + for (bytesread = 0; bytesread < len; bytesread += nbytes) + { + nbytes = read(infd, buffer, IO_BUF_SIZE); + if (nbytes < 0) + { + fprintf(stderr, "read failed: %s\n", strerror(errno)); + exit(4); + } + else if (nbytes == 0) + { + fprintf(stderr, "Unexpected end-of-file: %s\n", strerror(errno)); + exit(4); + } + else + { + crc = crc32part(buffer, nbytes, crc); + } + } + + /* Add the zero-padding at the end of the binary in the CRC */ + + memset(buffer, 0, IO_BUF_SIZE); + return crc32part(buffer, padlen, crc); +} + +static inline void writefile(int infd, int outfd, size_t len, size_t padlen) +{ + off_t offset; + uint8_t buffer[IO_BUF_SIZE]; + ssize_t nbytesread; + ssize_t nbyteswritten; + size_t totalread; + + offset = lseek(infd, 0, SEEK_SET); + if (offset == (off_t)-1) + { + fprintf(stderr, "lseek failed: %s\n", strerror(errno)); + exit(4); + } + + for (totalread = 0; totalread < len; totalread += nbytesread) + { + nbytesread = read(infd, buffer, IO_BUF_SIZE); + if (nbytesread < 0) + { + fprintf(stderr, "read failed: %s\n", strerror(errno)); + exit(4); + } + else if (nbytesread == 0) + { + fprintf(stderr, "Unexpected end-of-file: %s\n", strerror(errno)); + exit(4); + } + else + { + nbyteswritten = write(outfd, buffer, nbytesread); + if (nbyteswritten < 0) + { + fprintf(stderr, "write failed: %s\n", strerror(errno)); + exit(4); + } + else if (nbyteswritten != nbytesread) + { + fprintf(stderr, "Short writes not handled\n"); + exit(4); + } + } + } + + /* Write the zero-padding at the end of the binary */ + + memset(buffer, 0, IO_BUF_SIZE); + nbyteswritten = write(outfd, buffer, padlen); + if (nbyteswritten < 0) + { + fprintf(stderr, "write failed: %s\n", strerror(errno)); + exit(4); + } + else if (nbyteswritten != padlen) + { + fprintf(stderr, "Short writes not handled\n"); + exit(4); + } +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +int main(int argc, char **argv, char **envp) +{ + struct lpc31_header_s g_hdr; + struct stat buf; + ssize_t nbytes; + size_t padlen; + int infd; + int outfd; + int ret; + + /* Parse arguments */ + + parse_args(argc, argv); + + /* Open files */ + + infd = open(g_infile, O_RDONLY); + if (infd < 0) + { + fprintf(stderr, "Failed to open %s for reading: %s\n", g_infile, strerror(errno)); + exit(2); + } + + outfd = open(g_outfile, O_WRONLY|O_CREAT|O_TRUNC, 0644); + if (outfd < 0) + { + fprintf(stderr, "Failed to open %s for writing: %s\n", g_outfile, strerror(errno)); + exit(2); + } + + /* Get the size of the binary file */ + + ret = fstat(infd, &buf); + if (ret < 0) + { + fprintf(stderr, "stat of %s failed: %s\n", g_infile, strerror(errno)); + exit(3); + } + + /* Initialize the header */ + + memset(&g_hdr, 0, sizeof(struct lpc31_header_s)); + g_hdr.vector = 0xea00001e; /* b 0x11029080 */ + g_hdr.magic = 0x41676d69; +#if 1 /* CRC doesn't seem to be functional */ + g_hdr.imageType = 0x0000000a; +#else + g_hdr.imageType = 0x0000000b; +#endif + g_hdr.imageLength = (buf.st_size + sizeof(struct lpc31_header_s) + 511) & ~0x1ff; + + /* This is how much we must pad at the end of the binary image. */ + + padlen = g_hdr.imageLength - buf.st_size; + + /* Calculate CRCs */ + + g_hdr.execution_crc32 = infilecrc32(infd, buf.st_size, padlen); + g_hdr.header_crc32 = crc32((const uint8_t*)&g_hdr, HDR_CRC_SIZE); + + /* Write the header */ + + nbytes = write(outfd, &g_hdr, HDR_SIZE); + if (nbytes != 0x80) + { + fprintf(stderr, "write of header to of %s failed: %s\n", g_outfile, strerror(errno)); + exit(4); + } + + /* Copy the input file to the output */ + + writefile(infd, outfd, buf.st_size, padlen); + close(infd); + close(outfd); + return 0; +} + + diff --git a/configs/ea3131/tools/lpchdr.h b/configs/ea3131/tools/lpchdr.h new file mode 100644 index 0000000000000000000000000000000000000000..067f3eea88730117439a56de669e17ab5cf63a13 --- /dev/null +++ b/configs/ea3131/tools/lpchdr.h @@ -0,0 +1,105 @@ +/************************************************************************************ + * configs/ea3131/tools/lpchdr.h + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_EA3131_TOOLS_LPCHDR_H +#define __CONFIGS_EA3131_TOOLS_LPCHDR_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +struct lpc31_header_s +{ + /* OFFS DESCRIPTION */ + uint32_t vector; /* 0x00 Valid ARM instruction. Usually this will be + * a branch instruction to entry point of the + * image. */ + uint32_t magic; /* 0x04 This field is used by boot ROM to detect a + * valid image header. This field should always + * be set to 0x41676d69. */ + uint32_t execution_crc32; /* 0x08 CRC32 value of execution part of the image. If + * the ‘image_type’ is set to ‘0xA’, this field + * is ignored by boot ROM. */ + uint32_t Reserved0[4]; /* 0x0c-0x18: Should be zero. */ + uint32_t imageType; /* 0x1c Specifies whether CRC check should be done + * on the image or not: + * 0xA – No CRC check required. + * 0xB – Do CRC32 check on both header and + * execution part of the image. */ + uint32_t imageLength; /* 0x20 Total image length including header rounded + * up to the nearest 512 byte boundary. In C + * language the field can be computed as: + * imageLength = (Actual length + 511) & ~0x1FF; */ + uint32_t releaseID; /* 0x24 Release or version number of the image. Note, + * this field is not used by boot ROM but is + * provided to track the image versions. */ + uint32_t buildTime; /* 0x28 Time (expressed in EPOC time format) at which + * image is built. Note, this field is not used + * by boot ROM but is provided to track the image + * versions. */ + uint32_t sbzBootParameter; /* 0x2c hould be zero. */ + uint32_t cust_reserved[15]; /* 0x30-0x68: Reserved for customer use (60 bytes) */ + uint32_t header_crc32; /* 0x6c CRC32 value of the header (bytes 0x00 to 0x6C + * of the image). If the ‘image_type’ is set + * to ‘0xA’, this field is ignored by boot ROM. */ + uint32_t Reserved1[4]; /* 0x70-0x7c: Should be zero. */ + /* 0x80 Start of program code (128Kb max). The final + * image has to be padded to the nearest 512 + * byte boundary */ +}; + +/************************************************************************************ + * Public data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +extern uint32_t crc32part(const uint8_t *src, size_t len, uint32_t crc32val); +extern uint32_t crc32(const uint8_t *src, size_t len); + +#endif /* __CONFIGS_EA3131_TOOLS_LPCHDR_H */ + diff --git a/configs/ea3131/tools/mklpc.sh b/configs/ea3131/tools/mklpc.sh new file mode 100644 index 0000000000000000000000000000000000000000..0198a29fc96a4884cec834151947c6badb3b522a --- /dev/null +++ b/configs/ea3131/tools/mklpc.sh @@ -0,0 +1,60 @@ +#!/bin/sh + +# This script lies in sub-directory configs/ea3131/tools but make be executed +# from either that directory or TOPDIR + +MYNAME=`basename $0` +if [ -x "$PWD/$MYNAME" ]; then + TOPDIR="$PWD/../../.." +else + if [ -x "$PWD/configs/ea3131/tools/$MYNAME" ]; then + TOPDIR="$PWD" + else + echo "This script must be executed from a known director" + exit 1 + fi +fi +echo "TOOLDIR: $TOOLDIR" + +# The lpchdr could be named lpchdr.exe if we are running under Cygwin or +# just lpchdr under Linux + +TOOLDIR=$TOPDIR/configs/ea3131/tools + +if [ ! -d "$TOOLDIR" ]; then + echo "Tool directory $TOOLDIR does not exist" + exit 1 +fi + +if [ -x "$TOOLDIR/lpchdr.exe" ]; then + LPCHDR="$TOOLDIR/lpchdr.exe" +else + if [ -x "$TOOLDIR/lpchdr" ]; then + LPCHDR="$TOOLDIR/lpchdr" + else + echo "lpchdr executable does not exist in $TOODIR" + echo " - cd $TOOLDIR" + echo " - make" + fi +fi +echo "LPCHDR: $LPCHDR" + +# Now get the path to the NuttX executable + +NUTTXPATH="$TOPDIR/nuttx.bin" + +if [ ! -f "$NUTTXPATH" ]; then + echo "NuttX binary does not exist at $NUTTXPATH" + echo " - cd $TOPDIR" + echo " - make" + exit 1 +fi +echo "NUTTXPATH: $NUTTXPATH" + +# Create the binary + +echo "COMMAND: $LPCHDR -o $TOPDIR/nuttx.lpc $NUTTXPATH" +"$LPCHDR" -o "$TOPDIR/nuttx.lpc" "$NUTTXPATH" || \ + { echo "$LPCHDR failed" ; exit 1 ; } +echo "Successfully created binary" + diff --git a/configs/ea3131/tools/oocd.sh b/configs/ea3131/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..7948c1e03e6054430fd31bfeb97e2e25d2f355a9 --- /dev/null +++ b/configs/ea3131/tools/oocd.sh @@ -0,0 +1,43 @@ +#!/bin/sh + +TOPDIR=$1 +USAGE="$0 [-d]" +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +OPENOCD_PATH="/cygdrive/c/gccfd/openocd/bin" +OPENOCD_EXE=openocd-ftd2xx.exe +OPENOCD_CFG="${TOPDIR}/configs/ea3131/tools/armusbocd.cfg" +OPENOCD_ARGS="-f `cygpath -w ${OPENOCD_CFG}`" +~/projects/nuttx/nuttx/configs/ea3131/tool + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +if [ ! -d ${OPENOCD_PATH} ]; then + echo "OpenOCD path does not exist: ${OPENOCD_PATH}" + exit 1 +fi +if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then + echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f ${OPENOCD_CFG} ]; then + echo "OpenOCD config file does not exist: ${OPENOCD_CFG}" + exit 1 +fi + +echo "Starting OpenOCD" +${OPENOCD_PATH}/${OPENOCD_EXE} ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" + + + + diff --git a/configs/ea3131/tools/usb-driver.txt b/configs/ea3131/tools/usb-driver.txt new file mode 100644 index 0000000000000000000000000000000000000000..83d7598a5569e5b386da7281f201cfa2f6441ed7 --- /dev/null +++ b/configs/ea3131/tools/usb-driver.txt @@ -0,0 +1,25 @@ +https://www.olimex.com/dev/pdf/ARM/JTAG/Repair%20Procedure%20for%20OpenOcd-Rev.%20G%20drivers.pdf + +Repair procedure for ARM-USB-OCD drivers + +1. Uninstalling ARM-USB-OCD drivers +------------------------------------- +1.1. Connect your programmer/debugger to your computer, open Device Manager + and uninstall the drivers for ARM-USB-OCD. +1.2. After you have uninstalled ARM-USB-TINY driver from Device Manager, + disconnect the programmer from your computer. +1.3. Now you should download FTClean.exe from here: + http://www.ftdichip.com/Support/Utilities/FTClean.zip. +1.4. After download is complete extract the "*.zip" file, open folder FTClean, + and run FTClean.exe +1.5. Ror VID (Hex) select "Other". And after that fill the first box with 15ba + and "PID (Hex)" with 0004. +1.6. Press "Clean System" button. Make sure that all FTDI devices are + disconnected. (My require administrator privileges). + +2. Re-installing the ARM-USB-OCD driver +--------------------------------------- +2.1 Connect the programmer/debugger to the computer. +2.2 When prompted, browse to the C:\gccfd\DRIVERS\ARM-USB-OCD-DRIVER + directory and install. (A different driver is required for OpenOCD + 0.4.0. That driver is available from the olimex.com web site). diff --git a/configs/ea3131/usbserial/Make.defs b/configs/ea3131/usbserial/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..197b58b394b84818e9631265d8d09c60a2858844 --- /dev/null +++ b/configs/ea3131/usbserial/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/ea3131/usbserial/Make.defs +# +# Copyright (C) 2010,2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mtune=arm9tdmi -march=armv5te -mfloat-abi=soft -fno-builtin +else + ARCHCPUFLAGS = -mapcs-32 -mtune=arm9tdmi -march=armv5te -msoft-float -fno-builtin +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARM_TOOLCHAIN_BUILDROOT),y) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/ea3131/usbserial/defconfig b/configs/ea3131/usbserial/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c7e919046a3f4f65c6cd5bc12935dbdd2ea25dda --- /dev/null +++ b/configs/ea3131/usbserial/defconfig @@ -0,0 +1,785 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +CONFIG_ARCH_CHIP_LPC31XX=y +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +CONFIG_ARCH_ARM926EJS=y +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="lpc31xx" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +CONFIG_ARCH_ROMPGTABLE=y + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARM_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARM_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTDRAM=y +CONFIG_ARCH_HAVE_EXTSRAM0=y + +# +# LPC31xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC3130 is not set +CONFIG_ARCH_CHIP_LPC3131=y +# CONFIG_ARCH_CHIP_LPC3152 is not set +# CONFIG_ARCH_CHIP_LPC3154 is not set + +# +# LPC31xx Peripheral Support +# +CONFIG_LPC31_UART=y +# CONFIG_LPC31_SPI is not set +CONFIG_LPC31_USBOTG=y +# CONFIG_LPC31_MCI is not set + +# +# External Memory Configuration +# +CONFIG_ARCH_HAVE_EXTSRAM1=y +# CONFIG_LPC31_EXTNAND is not set +# CONFIG_LPC31_EXTDRAM is not set +# CONFIG_LPC31_EXTSRAM0 is not set +# CONFIG_LPC31_EXTSRAM1 is not set + +# +# LPC31xx UART Configuration +# +# CONFIG_LPC31_UART_PRECALCULATED is not set + +# +# USB device controller driver (DCD) options +# +CONFIG_LPC31_USBDEV_EP0_MAXSIZE=64 +# CONFIG_LPC31_USBDEV_FRAME_INTERRUPT is not set +# CONFIG_LPC31_USBDEV_DMA is not set + +# +# SPI device driver options +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ARCH_USBDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16945 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x11028000 +CONFIG_RAM_VSTART=0x11028000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_EA3131=y +# CONFIG_ARCH_BOARD_OLIMEX_LPC_H3131 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ea3131" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=28 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="usbserial_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART=y +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART Configuration +# +CONFIG_UART_RXBUFSIZE=256 +CONFIG_UART_TXBUFSIZE=256 +CONFIG_UART_BAUD=115200 +CONFIG_UART_BITS=8 +CONFIG_UART_PARITY=0 +CONFIG_UART_2STOP=0 +# CONFIG_UART_IFLOWCONTROL is not set +# CONFIG_UART_OFLOWCONTROL is not set +# CONFIG_UART_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +CONFIG_USBDEV_DUALSPEED=y +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +CONFIG_USBDEV_TRACE=y +CONFIG_USBDEV_TRACE_NRECORDS=128 +# CONFIG_USBDEV_TRACE_INITIALIDSET is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +CONFIG_PL2303=y +# CONFIG_PL2303_CONSOLE is not set +CONFIG_PL2303_EPINTIN=3 +CONFIG_PL2303_EPBULKOUT=2 +CONFIG_PL2303_EPBULKIN=1 +CONFIG_PL2303_EP0MAXPACKET=64 +CONFIG_PL2303_NWRREQS=4 +CONFIG_PL2303_NRDREQS=4 +CONFIG_PL2303_BULKIN_REQLEN=768 +CONFIG_PL2303_RXBUFSIZE=512 +CONFIG_PL2303_TXBUFSIZE=512 +CONFIG_PL2303_VENDORID=0x067b +CONFIG_PL2303_PRODUCTID=0x2303 +CONFIG_PL2303_VENDORSTR="Nuttx" +CONFIG_PL2303_PRODUCTSTR="USBdev Serial" +# CONFIG_CDCACM is not set +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +CONFIG_USBHOST_HAVE_ASYNCH=y +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +CONFIG_EXAMPLES_USBSERIAL=y +CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512 +# CONFIG_EXAMPLES_USBSERIAL_TRACEINIT is not set +# CONFIG_EXAMPLES_USBSERIAL_TRACECLASS is not set +# CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS is not set +# CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER is not set +# CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_USBMONITOR is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ea3131/usbserial/setenv.sh b/configs/ea3131/usbserial/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..23d9bb74ade99285d315bcfe86698038d6d1c910 --- /dev/null +++ b/configs/ea3131/usbserial/setenv.sh @@ -0,0 +1,66 @@ +#!/bin/bash +# configs/ea3131/usbserial/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the tools subdirectory + +export LPCTOOL_DIR="${WD}/configs/ea3131/tools" + +# Add the path to the toolchain to the PATH varialble + +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/ea3152/Kconfig b/configs/ea3152/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..62ca586247b66fe2de65e8c6dd92d2f07d86286c --- /dev/null +++ b/configs/ea3152/Kconfig @@ -0,0 +1,33 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_EA3152 + +if PAGING + +config EA3152_PAGING_MINOR + int "Page device minor number" + default 0 + +config EA3152_PAGING_MOUNTPT + string "Page device mount point" + default "/mnt/pgsrc" + +config EA3152_PAGING_BINOFFSET + int "Volume offset" + default 0 + +config EA3152_PAGING_SDSLOT + int "SD page device slot number" + default 0 + depends on MMCSD + +config EA3152_PAGING_SPIPORT + int "SD SPI port number" + default 0 + depends on SPI + +endif # PAGING +endif # ARCH_BOARD_EA3152 diff --git a/configs/ea3152/README.txt b/configs/ea3152/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..b9ada143ad37f980692ea050200bf574bea1597c --- /dev/null +++ b/configs/ea3152/README.txt @@ -0,0 +1,417 @@ +README +^^^^^^ + + This README file discusses the port of NuttX to the Embedded Artists + EA3152 board. + +Contents +^^^^^^^^ + + o Development Environment + o GNU Toolchain Options + o IDEs + o NuttX buildroot Toolchain + o Boot Sequence + o Image Format + o Image Download to ISRAM + o Using OpenOCD and GDB + o ARM/EA3152-specific Configuration Options + o Configurations + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. Raisonance GNU toolchain, + 4. The NuttX buildroot Toolchain (see below), or + 5. Any generic arm-none-eabi GNU toolchain. + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery, devkitARM or Raisonance GNU toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARM_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARM_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARM_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARM_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARM_TOOLCHAIN_GNU_EABIL : Generic arm-none-eabi toolchain + + If you are not using CONFIG_ARM_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + The toolchain may also be set using the kconfig-mconf utility (make menuconfig) + or by passing CONFIG_ARM_TOOLCHAIN= to make, where is one + of CODESOURCERYW, CODESOURCERYL, DEVKITARM, BUILDROOT or GNU_EABI as described + above. + + NOTE: the CodeSourcery (for Windows), devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + + Generic arm-none-eabi GNU Toolchain + ----------------------------------- + There are a number of toolchain projects providing support for ARMv4/v5 + class processors, including: + + GCC ARM Embedded + https://launchpad.net/gcc-arm-embedded + + Summon ARM Toolchain + https://github.com/esden/summon-arm-toolchain + + Yagarto + http://www.yagarto.de + + Others exist for various Linux distributions, MacPorts, etc. Any version + based on GCC 4.6.3 or later should work. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lpc31xx, + arch/arm/src/common, arch/arm/src/arm, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/lpc31xx/lpc31_vectors.S. You may have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX buildroot Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh ea3152/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/arm926t-defconfig-4.2.4 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + +Boot Sequence +^^^^^^^^^^^^^ + LPC315x has on chip bootrom which loads properly formatted images from multiple + sources into SRAM. These sources include including SPI Flash, NOR Flash, UART, + USB, SD Card, and NAND Flash. + + In all configurations, NuttX is loaded directly into ISRAM. NuttX is linked + to execute from ISRAM, regardless of the boot source. + +Image Format +^^^^^^^^^^^^ + + In order to use the bootrom bootloader, a special header must be added to the + beginning of the binary image that includes information about the binary (things + like the entry point, the size, and CRC's to verify the image. + + NXP provides a Windows program to append such a header to the binary image. + However, (1) that program won't run under Linux, and (2) when I try it under + WinXP, Symantec immediately claims that the program is misbehaving and deletes + it! + + To work around both of these issues, I have created a small program under + configs/ea3152/tools to add the header. This program can be built under + either Linux or Cygwin (and probably other tool environments as well). That + tool can be built as follows: + + - cd configs/ea3152/tools + - make + + Then, to build the NuttX binary ready to load with the bootloader, just + following these steps: + + - cd tools/ # Configure Nuttx + - ./configure.sh ea3152/ostest # (using the ostest configuration for this example) + - cd .. # Set up environment + - . ./setenv.sh # (see notes below) + - make # Make NuttX. This will produce nuttx.bin + - mklpc.sh # Make the bootloader binary (nuttx.lpc) + + NOTES: + + 1. setenv.sh just sets up pathes to the toolchain and also to + configs/ea3152/tools where mklpc.sh resides. Use of setenv.sh is optional. + If you don't use setenv.sh, then just set your PATH variable appropriately or + use the full path to mklpc.sh in the final step. + 2. You can instruct Symantec to ignore the errors and it will stop quarantining + the NXP program. + 3. The CRC32 logic in configs/ea3152/tools doesn't seem to work. As a result, + the CRC is currently disabled in the header: + + RCS file: /cvsroot/nuttx/nuttx/configs/ea3152/tools/lpchdr.c,v + retrieving revision 1.2 + diff -r1.2 lpchdr.c + 264c264 + < g_hdr.imageType = 0x0000000b; + --- + > g_hdr.imageType = 0x0000000a; + +Image Download to ISRAM +^^^^^^^^^^^^^^^^^^^^^^^ + +Assuming that you already have the FTDI driver installed*, then here is the +are the steps that I use for loading new code into the EA3152: + +- Create the bootloader binary, nuttx.lpc, as described above. +- Connected the EA3152 using the FTDI USB port (not the lpc3152 USB port) + This will power up the EA3152 and start the bootloader. +- Start a terminal emulator (such as TeraTerm) at 115200 8NI. +- Reset the EA3152 and you should see: + LPC31xx READY FOR PLAIN IMAGE> +- Send the nuttx.lpc file and you should see: + Download finished + +That will load the NuttX binary into ISRAM and attempt to execute it. + +*See the LPC315x documentation if you do not have the FTDI driver installed. + +Using OpenOCD and GDB +^^^^^^^^^^^^^^^^^^^^^ + + I have been using the Olimex ARM-USB-OCD JTAG debugger with the EA3152 + (http://www.olimex.com). The OpenOCD configuration file is here: + tools/armusbocb.cfg. There is also a script on the tools directory that + I used to start the OpenOCD daemon on my system called oocd.sh. That + script would probably require some modifications to work in another + environment: + + - possibly the value of OPENOCD_PATH + - If you are working under Linux you will need to change any + occurances of `cygpath -w blablabla` to just blablabla + + Then you should be able to start the OpenOCD daemon like: + + configs/ea3152/tools/oocd.sh $PWD + + Where it is assumed that you are executing oocd.sh from the top level + directory where NuttX is installed. + + Once the OpenOCD daemon has been started, you can connect to it via + GDB using the following GDB command: + + arm-nuttx-elf-gdb + (gdb) target remote localhost:3333 + + And you can load the NuttX ELF file: + + (gdb) symbol-file nuttx + (gdb) load nuttx + +ARM/EA3152-specific Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_ARM926EJS=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc31xx + + CONFIG_ARCH_CHIP_name - For use in C code + + CONFIG_ARCH_CHIP_LPC3152 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=ea3152 + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_EA3152 + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - For most ARM9 architectures, this describes the + size of installed DRAM. For the LPC315X, it is used only to + deterimine how to map the executable regions. It is SDRAM size + only if you are executing out of the external SDRAM; or it could + be NOR FLASH size, external SRAM size, or internal SRAM size. + + CONFIG_RAM_START - The start address of installed DRAM (physical) + + CONFIG_RAM_VSTART - The startaddress of DRAM (virtual) + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_BUTTONS - Enable support for buttons. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + CONFIG_ARCH_DMA - Support DMA initialization + CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000 + Undefine if vectors reside at address 0xffff:0000 + CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available. + If defined, then board-specific logic must also define PGTABLE_BASE_PADDR, + PGTABLE_BASE_VADDR, and all memory section mapping in a file named + board_memorymap.h. + + Individual subsystems can be enabled: + + CONFIG_LPC31_MCI, CONFIG_LPC31_SPI, CONFIG_LPC31_UART + + External memory available on the board (see also CONFIG_MM_REGIONS) + + CONFIG_LPC31_EXTSRAM0 - Select if external SRAM0 is present + CONFIG_LPC31_EXTSRAM0HEAP - Select if external SRAM0 should be + configured as part of the NuttX heap. + CONFIG_LPC31_EXTSRAM0SIZE - Size (in bytes) of the installed + external SRAM0 memory + CONFIG_LPC31_EXTSRAM1 - Select if external SRAM1 is present + CONFIG_LPC31_EXTSRAM1HEAP - Select if external SRAM1 should be + configured as part of the NuttX heap. + CONFIG_LPC31_EXTSRAM1SIZE - Size (in bytes) of the installed + external SRAM1 memory + CONFIG_LPC31_EXTDRAM - Select if external SDRAM is present + CONFIG_LPC31_EXTDRAMHEAP - Select if external SDRAM should be + configured as part of the NuttX heap. + CONFIG_LPC31_EXTDRAMSIZE - Size (in bytes) of the installed + external SDRAM memory + CONFIG_LPC31_EXTNAND - Select if external NAND is present + CONFIG_LPC31_EXTNANDSIZE - Size (in bytes) of the installed + external NAND memory + + LPC315X specific device driver settings + + CONFIG_UART_SERIAL_CONSOLE - selects the UART for the + console and ttys0 + CONFIG_UART_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UART_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UART_BAUD - The configure BAUD of the UART. Must be + CONFIG_UART_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UART_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UART_2STOP - Two stop bits + +Configurations +^^^^^^^^^^^^^^ + +Each EA3152 configuration is maintained in a sub-directory and can be +selected as follow: + + cd tools + ./configure.sh ea3152/ + cd - + . ./setenv.sh + +Where is one of the following: + + ostest: + This configuration directory, performs a simple OS test using + examples/ostest. By default, this project assumes that you are + using the DFU bootloader. + diff --git a/configs/ea3152/include/board.h b/configs/ea3152/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..b641383325fee38ca6cf44030e364018baf9b51a --- /dev/null +++ b/configs/ea3152/include/board.h @@ -0,0 +1,151 @@ +/************************************************************************************ + * configs/ea3152/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +# include "lpc31_cgudrvr.h" +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* Frequency of the FFAST input */ + +#define BOARD_FREQIN_FFAST (12000000) /* ffast (12 MHz crystal) */ + +/* HPLL0 configuration */ + +#define BOARD_HPLL0_FINSEL CGU_HPFINSEL_FFAST /* Frequency input selection */ +#define BOARD_HPLL0_NDEC 131 /* PLL N-divider value */ +#define BOARD_HPLL0_MDEC 29784 /* PLL M-divider value */ +#define BOARD_HPLL0_PDEC 7 /* PLL P-divider value */ +#define BOARD_HPLL0_SELR 0 /* SELR bandwidth selection */ +#define BOARD_HPLL0_SELI 8 /* SELI bandwidth selection */ +#define BOARD_HPLL0_SELP 31 /* SELP bandwidth selection */ +#define BOARD_HPLL0_MODE 0 /* PLL mode */ +#define BOARD_HPLL0_FREQ 406425600 /* Frequency of the PLL in MHz */ + +/* HPLL1 configuration */ + +#define BOARD_HPLL1_FINSEL CGU_HPFINSEL_FFAST /* Frequency input selection */ +#define BOARD_HPLL1_NDEC 770 /* PLL N-divider value */ +#define BOARD_HPLL1_MDEC 8191 /* PLL M-divider value */ +#define BOARD_HPLL1_PDEC 98 /* PLL P-divider value */ +#define BOARD_HPLL1_SELR 0 /* SELR bandwidth selection */ +#define BOARD_HPLL1_SELI 16 /* SELI bandwidth selection */ +#define BOARD_HPLL1_SELP 8 /* SELP bandwidth selection */ +#define BOARD_HPLL1_MODE 0 /* PLL mode */ +#define BOARD_HPLL1_FREQ 180000000 /* Frequency of the PLL in MHz */ + +/* The following 3 bitsets determine which clocks will be enabled at initialization + * time. + */ + +#define BOARD_CLKS_0_31 \ + (_RBIT(CLKID_APB0CLK,0)|_RBIT(CLKID_APB1CLK,0)|_RBIT(CLKID_APB2CLK,0)|\ + _RBIT(CLKID_APB3CLK,0)|_RBIT(CLKID_APB4CLK,0)|_RBIT(CLKID_AHB2INTCCLK,0)|\ + _RBIT(CLKID_AHB0CLK,0)|_RBIT(CLKID_ARM926CORECLK,0)|_RBIT(CLKID_ARM926BUSIFCLK,0)|\ + _RBIT(CLKID_ARM926RETIMECLK,0)|_RBIT(CLKID_ISRAM0CLK,0)|_RBIT(CLKID_ISRAM1CLK,0)|\ + _RBIT(CLKID_ISROMCLK,0)|_RBIT(CLKID_INTCCLK,0)|_RBIT(CLKID_AHB2APB0PCLK,0)|\ + _RBIT(CLKID_EVENTROUTERPCLK,0)|_RBIT(CLKID_CLOCKOUT,0)) + +#define BOARD_CLKS_32_63 \ + (_RBIT(CLKID_IOCONFPCLK,32)|_RBIT(CLKID_CGUPCLK,32)|_RBIT(CLKID_SYSCREGPCLK,32)|\ + _RBIT(CLKID_OTPPCLK,32)|_RBIT(CLKID_AHB2APB1PCLK,32)|_RBIT(CLKID_AHB2APB2PCLK,32)|\ + _RBIT(CLKID_AHB2APB3PCLK,32)|_RBIT(CLKID_EDGEDETPCLK,32)) + +#define BOARD_CLKS_64_92 \ + (0) + +/* LED definitions ******************************************************************/ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/* Button definitions ***************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: lpc31_boardinitialize + * + * Description: + * All LPC31XX architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc31_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/ea3152/include/board_memorymap.h b/configs/ea3152/include/board_memorymap.h new file mode 100644 index 0000000000000000000000000000000000000000..0462e7827e7477b5e89efe7a3479683d83da670c --- /dev/null +++ b/configs/ea3152/include/board_memorymap.h @@ -0,0 +1,117 @@ +/************************************************************************************ + * configs/ea3152/include/board_memorymap.h + * include/arch/board/board_memorymap.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_MEMORYMAP_H +#define __ARCH_BOARD_BOARD_MEMORYMAP_H + +/* This file should never be included directly, but only indirectly via + * lpc31_memorymap.h. + */ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* If the LPC31xx ROM page table is selected, then the board-logic is required + * to provide: + * + * PGTABLE_BASE_PADDR - The physical address of the page table in ROM, + * PGTABLE_BASE_VADDR - The mapped address of the page table in ROM, and + * Mappings for each of the PSECTIONS in lpc31_memorymap.h + */ + +#ifdef CONFIG_ARCH_ROMPGTABLE + /* The LPC31xx ROM page table uses a 1-1 physical to virtual memory mapping */ + +# define LPC31_SHADOWSPACE_VSECTION 0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */ +# define LPC31_INTSRAM_VSECTION 0x11028000 /* Internal SRAM 96Kb-192Kb */ +# define LPC31_INTSRAM0_VADDR 0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */ +# define LPC31_INTSRAM1_VADDR 0x11040000 /* 0x11040000-0x11057fff: Internal SRAM 1 96Kb */ +# define LPC31_INTSROM0_VSECTION 0x12000000 /* 0x12000000-0x1201ffff: Internal SROM 0 128Kb */ +# define LPC31_APB01_VSECTION 0x13000000 /* 0x13000000-0x1300bfff: APB0 32Kb APB1 16Kb*/ +# define LPC31_APB0_VADDR 0x13000000 /* 0x13000000-0x13007fff: APB0 32Kb */ +# define LPC31_APB1_VADDR 0x13008000 /* 0x13008000-0x1300bfff: APB1 16Kb */ +# define LPC31_APB2_VSECTION 0x15000000 /* 0x15000000-0x15003fff: APB2 16Kb */ +# define LPC31_APB3_VSECTION 0x16000000 /* 0x16000000-0x160003ff: APB3 1Kb */ +# define LPC31_APB4MPMC_VSECTION 0x17000000 /* 8Kb */ +# define LPC31_APB4_VADDR 0x17000000 /* 0x17000000-0x17000fff: APB4 4Kb */ +# define LPC31_MPMC_VADDR 0x17008000 /* 0x17008000-0x17008fff: MPMC cfg 4Kb */ +# define LPC31_MCI_VSECTION 0x18000000 /* 0x18000000 0x180003ff: MCI/SD/SDIO 1Kb */ +# define LPC31_USBOTG_VSECTION 0x19000000 /* 0x19000000-0x19000fff: USB OTG 4Kb */ +# define LPC31_EXTSRAM_VSECTION 0x20020000 /* 64-128Kb */ +# define LPC31_EXTSRAM0_VADDR 0x20000000 /* 0x20000000-0x2001ffff: External SRAM 0 64-128Kb */ +# define LPC31_EXTSRAM1_VADDR 0x20020000 /* 0x20020000-0x2003ffff: External SRAM 1 64-128Kb */ +# define LPC31_EXTSDRAM0_VSECTION 0x30000000 /* 0x30000000-0x37ffffff: External SDRAM 0 128Mb */ +# define LPC31_INTC_VSECTION 0x60000000 /* 0x60000000-0x60000fff: Interrupt controller 4Kb */ +# define LPC31_NAND_VSECTION 0x70000000 /* 0x70000000-0x700007ff: NANDFLASH Ctrl 2Kb */ + + /* Define the address of the page table within the ROM */ + +# define ROMPGTABLE_OFFSET 0x0001c000 /* Offset of the ROM page table in ROM */ +# define PGTABLE_BASE_PADDR (LPC31_INTSROM0_PSECTION+ROMPGTABLE_OFFSET) +# define PGTABLE_BASE_VADDR (LPC31_INTSROM0_VSECTION+ROMPGTABLE_OFFSET) +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_MEMORYMAP_H */ diff --git a/configs/ea3152/ostest/Make.defs b/configs/ea3152/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..633fbdaedf9766ddeff0a6293b3601998f903db4 --- /dev/null +++ b/configs/ea3152/ostest/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/ea3152/ostest/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mtune=arm9tdmi -march=armv5te -mfloat-abi=soft -fno-builtin +else + ARCHCPUFLAGS = -mapcs-32 -mtune=arm9tdmi -march=armv5te -msoft-float -fno-builtin +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARM_TOOLCHAIN_BUILDROOT),y) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/ea3152/ostest/defconfig b/configs/ea3152/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..bf1647db111b62a0aaff21cc1c9533be46be31b9 --- /dev/null +++ b/configs/ea3152/ostest/defconfig @@ -0,0 +1,744 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +CONFIG_ARCH_CHIP_LPC31XX=y +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +CONFIG_ARCH_ARM926EJS=y +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="lpc31xx" +# CONFIG_ARCH_HAVE_FPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +CONFIG_ARCH_ROMPGTABLE=y + +# +# ARM Configuration Options +# +CONFIG_ARM_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARM_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARM_OABI_TOOLCHAIN is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTDRAM=y +CONFIG_ARCH_HAVE_EXTSRAM0=y + +# +# LPC31xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC3130 is not set +# CONFIG_ARCH_CHIP_LPC3131 is not set +CONFIG_ARCH_CHIP_LPC3152=y +# CONFIG_ARCH_CHIP_LPC3154 is not set + +# +# LPC31xx Peripheral Support +# +CONFIG_LPC31_UART=y +# CONFIG_LPC31_SPI is not set +# CONFIG_LPC31_USBOTG is not set +# CONFIG_LPC31_MCI is not set + +# +# External Memory Configuration +# +CONFIG_ARCH_HAVE_EXTSRAM1=y +# CONFIG_LPC31_EXTNAND is not set +# CONFIG_LPC31_EXTDRAM is not set +# CONFIG_LPC31_EXTSRAM0 is not set +# CONFIG_LPC31_EXTSRAM1 is not set + +# +# LPC31xx UART Configuration +# +# CONFIG_LPC31_UART_PRECALCULATED is not set + +# +# SPI device driver options +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_USE_MMU=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16945 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x11028000 +CONFIG_RAM_VSTART=0x11028000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_EA3152=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ea3152" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART=y +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_UART_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART Configuration +# +CONFIG_UART_RXBUFSIZE=256 +CONFIG_UART_TXBUFSIZE=256 +CONFIG_UART_BAUD=115200 +CONFIG_UART_BITS=8 +CONFIG_UART_PARITY=0 +CONFIG_UART_2STOP=0 +# CONFIG_UART_IFLOWCONTROL is not set +# CONFIG_UART_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=2048 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ea3152/ostest/setenv.sh b/configs/ea3152/ostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..1e4c5b3abf76ec653702479ad249837a9847b3e3 --- /dev/null +++ b/configs/ea3152/ostest/setenv.sh @@ -0,0 +1,66 @@ +#!/bin/bash +# configs/ea3152/ostest/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the tools subdirectory + +export LPCTOOL_DIR="${WD}/configs/ea3152/tools" + +# Add the path to the toolchain to the PATH varialble + +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/ea3152/scripts/ld.script b/configs/ea3152/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..ff1578df2a733a1402db0a596f8168c306fd7bd9 --- /dev/null +++ b/configs/ea3152/scripts/ld.script @@ -0,0 +1,113 @@ +/**************************************************************************** + * configs/ea3152/scripts/ld.script + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LPC3152 has 192Kb of ISRAM beginning at virtual address 0x1102:8000. + * LPC31xx boot ROM expects the boot image be compiled with entry point at + * 0x1102:9000. A 128b header will appear at this address (applied by + * lpc313xImgCreator) and the executable code must begin at 0x1102:9080. + */ + +MEMORY +{ + isram (rwx) : ORIGIN = 0x11029080, LENGTH = 192K - 4224 +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > isram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > isram + + .ARM.extab : { + *(.ARM.extab*) + } > isram + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > isram + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > isram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > isram + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/ea3152/src/.gitignore b/configs/ea3152/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/ea3152/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/ea3152/src/Makefile b/configs/ea3152/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..2b5a68725a17ff5c621399f32eba8ca34a41dfab --- /dev/null +++ b/configs/ea3152/src/Makefile @@ -0,0 +1,62 @@ +############################################################################ +# configs/ea3152/src/Makefile +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc31_boot.c lpc31_clkinit.c +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += lpc31_buttons.c +endif +ifeq ($(CONFIG_LPC31_EXTDRAM),y) +CSRCS += lpc31_mem.c +endif +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += lpc31_leds.c +endif +ifeq ($(CONFIG_LPC31_SPI),y) +CSRCS += lpc31_spi.c +endif +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc31_appinit.c +endif +ifeq ($(CONFIG_PAGING),y) +CSRCS += lpc31_fillpage.c +endif +ifeq ($(CONFIG_USBMSC),y) +CSRCS += lpc31_usbmsc.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/ea3152/src/ea3152.h b/configs/ea3152/src/ea3152.h new file mode 100644 index 0000000000000000000000000000000000000000..dc668830023d0477a6e9ab0f7fa08a7fae737785 --- /dev/null +++ b/configs/ea3152/src/ea3152.h @@ -0,0 +1,125 @@ +/************************************************************************************ + * configs/ea3152/src/ea3152.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_EA3152_SRC_EA3152_H +#define __CONFIGS_EA3152_SRC_EA3152_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include "lpc31_ioconfig.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* EA3152L GPIOs ********************************************************************/ + +/* LEDs -- interface through an I2C GPIO expander */ + +/* BUTTONS -- NOTE that some have EXTI interrupts configured */ + +/* SPI Chip Selects */ +/* SPI NOR flash is the only device on SPI. SPI_CS_OUT0 is its chip select */ + +#define SPINOR_CS IOCONFIG_SPI_CSOUT0 + +/* USB Soft Connect Pullup -- NONE */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc31_meminitialize + * + * Description: + * Initialize external memory resources (sram, sdram, nand, nor, etc.) + * + ************************************************************************************/ + +#ifdef CONFIG_LPC31_EXTDRAM +void lpc31_meminitialize(void); +#endif + +/************************************************************************************ + * Name: lpc31_spidev_intialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the EA3152 board. + * + ************************************************************************************/ + +void weak_function lpc31_spidev_intialize(void); + +/************************************************************************************ + * Name: lpc31_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the EA3152 board. + * + ************************************************************************************/ + +void weak_function lpc31_usbinitialize(void); + +/************************************************************************************ + * Name: lpc31_pginitialize + * + * Description: + * Set up mass storage device to support on demand paging. + * + ************************************************************************************/ + +#ifdef CONFIG_PAGING +void weak_function lpc31_pginitialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_EA3152_SRC_EA3152_H */ diff --git a/configs/ea3152/src/lpc31_appinit.c b/configs/ea3152/src/lpc31_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..e77cdb63ef3f4d38c99e27ee192e520bf2c7fd31 --- /dev/null +++ b/configs/ea3152/src/lpc31_appinit.c @@ -0,0 +1,153 @@ +/**************************************************************************** + * config/ea3152/src/lpc31_appinit.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_LPC31_MCI +# include +# include +#endif + +#include "lpc31.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_EA3152 +# define NSH_HAVEUSBDEV 1 +# define NSH_HAVEMMCSD 1 +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0 +# error "Only one MMC/SD slot" +# undef CONFIG_NSH_MMCSDSLOTNO +# endif +# ifndef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#else + /* Add configuration for new LPC31XX boards here */ + +# error "Unrecognized LPC31XX board" +# undef NSH_HAVEUSBDEV +# undef NSH_HAVEMMCSD +#endif + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support + * is not enabled. + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC31_MCI) +# undef NSH_HAVEMMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef NSH_HAVEMMCSD + FAR struct sdio_dev_s *sdio; + int ret; + + /* First, get an instance of the SDIO interface */ + + syslog(LOG_INFO, "Initializing SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + + sdio = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!sdio) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SPI interface to the MMC/SD driver */ + + syslog(LOG_INFO, "Bind SDIO to the MMC/SD driver, minor=%d\n", + CONFIG_NSH_MMCSDMINOR); + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdio); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SDIO to the MMC/SD driver\n"); + + /* Then let's guess and say that there is a card in the slot. I need to check to + * see if the LPC313X10E-EVAL board supports a GPIO to detect if there is a card in + * the slot. + */ + + sdio_mediachange(sdio, true); +#endif + return OK; +} diff --git a/configs/ea3152/src/lpc31_boot.c b/configs/ea3152/src/lpc31_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..4d972e9ad33a75694bc4ad4642b106a377a84e1c --- /dev/null +++ b/configs/ea3152/src/lpc31_boot.c @@ -0,0 +1,119 @@ +/************************************************************************************ + * configs/ea3152/src/lpc31_boot.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "lpc31.h" +#include "ea3152.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc31_boardinitialize + * + * Description: + * All LPC31XX architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc31_boardinitialize(void) +{ + /* Initialize configured, external memory resources */ + +#ifdef CONFIG_LPC31_EXTDRAM + lpc31_meminitialize(); +#endif + + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * lpc31_spidev_intialize() has been brought into the link. + */ + +#if defined(CONFIG_LPC31_SPI) + if (lpc31_spidev_intialize) + { + lpc31_spidev_intialize(); + } +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function lpc31_usbinitialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_LPC31_USBOTG) + if (lpc31_usbinitialize) + { + lpc31_usbinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + + /* Set up mass storage device to support on demand paging */ + +#if defined(CONFIG_PAGING) + if (lpc31_pginitialize) + { + lpc31_pginitialize(); + } +#endif +} diff --git a/configs/ea3152/src/lpc31_buttons.c b/configs/ea3152/src/lpc31_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..28b349abb0b966a76b40c49b77545cc65f35a806 --- /dev/null +++ b/configs/ea3152/src/lpc31_buttons.c @@ -0,0 +1,85 @@ +/**************************************************************************** + * configs/ea3152/src/lpc31_buttons.c + * + * Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "ea3152.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + ****************************************************************************/ + +void board_button_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return 0; +} + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/ea3152/src/lpc31_clkinit.c b/configs/ea3152/src/lpc31_clkinit.c new file mode 100644 index 0000000000000000000000000000000000000000..200ddf3b1b98778cdc6127b461852d3a08d4f661 --- /dev/null +++ b/configs/ea3152/src/lpc31_clkinit.c @@ -0,0 +1,437 @@ +/**************************************************************************** + * configs/ea3152/src/lpc31_clkinit.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * References: + * - NXP UM10314 LPC3130/31 User manual Rev. 1.01 — 9 September 2009 + * - NXP lpc313x.cdl.drivers.zip example driver code + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "lpc31_cgu.h" +#include "lpc31_cgudrvr.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Sub-domain Clock Bitsets *************************************************/ +/* The following bitsets group clocks into bitsets associated with each + * domain and fractional divider subdomain. + * + * Domain 0 (DOMAINID_SYS), Clocks 0 - 29, Fraction dividers 0-6. Clocks not + * defined in the clock sets will be sourced with SYS_BASE_CLK. + */ + +/* Domain 0, Fractional divider 0: */ + +#define CGU_CLKSET_DOMAIN0_DIV0 \ + (_D0B(CLKID_APB0CLK)|_D0B(CLKID_APB1CLK)|_D0B(CLKID_APB2CLK)|\ + _D0B(CLKID_APB3CLK)|_D0B(CLKID_APB4CLK)|_D0B(CLKID_AHB2INTCCLK)|\ + _D0B(CLKID_AHB0CLK)|_D0B(CLKID_DMAPCLK)|_D0B(CLKID_DMACLKGATED)|\ + _D0B(CLKID_NANDFLASHS0CLK)|_D0B(CLKID_NANDFLASHPCLK)|\ + _D0B(CLKID_ARM926BUSIFCLK)|_D0B(CLKID_SDMMCHCLK)|_D0B(CLKID_USBOTGAHBCLK)|\ + _D0B(CLKID_ISRAM0CLK)|_D0B(CLKID_ISRAM1CLK)|_D0B(CLKID_ISROMCLK)|\ + _D0B(CLKID_MPMCCFGCLK)|_D0B(CLKID_MPMCCFGCLK2)|_D0B(CLKID_INTCCLK)) + +/* Domain 0, Fractional divider 1: */ + +#define CGU_CLKSET_DOMAIN0_DIV1 \ + (_D0B(CLKID_ARM926CORECLK)) + +/* Domain 0, Fractional divider 2: */ + +#define CGU_CLKSET_DOMAIN0_DIV2 \ + (_D0B(CLKID_NANDFLASHAESCLK)|_D0B(CLKID_NANDFLASHNANDCLK)) + +/* Domain 0, Fractional divider 3: */ + +#define CGU_CLKSET_DOMAIN0_DIV3 \ + (_D0B(CLKID_NANDFLASHECCCLK)) + +/* Domain 0, Fractional divider 4: */ + +#define CGU_CLKSET_DOMAIN0_DIV4 \ + (_D0B(CLKID_SDMMCCCLKIN)) + +/* Domain 0, Fractional divider 5: */ + +#define CGU_CLKSET_DOMAIN0_DIV5 \ + (_D0B(CLKID_CLOCKOUT)) + +/* Domain 0, Fractional divider 6: */ + +#define CGU_CLKSET_DOMAIN0_DIV6 \ + (_D0B(CLKID_EBICLK)) + +/* Domain 1 (DOMAINID_AHB0APB0), Clocks 30-39, Fraction dividers 7-8. Clocks + * not defined in the clock sets will be sourced with AHB_APB0_BASE_CLK. + */ + +/* Domain 1, Fractional divider 7: */ + +#define CGU_CLKSET_DOMAIN1_DIV7 \ + (_D1B(CLKID_ADCCLK)) + +/* Domain 1, Fractional divider 8: */ + +#define CGU_CLKSET_DOMAIN1_DIV8 \ + (_D1B(CLKID_AHB2APB0PCLK)|_D1B(CLKID_EVENTROUTERPCLK)|\ + _D1B(CLKID_ADCPCLK)|_D1B(CLKID_WDOGPCLK)|_D1B(CLKID_IOCONFPCLK)|\ + _D1B(CLKID_CGUPCLK)|_D1B(CLKID_SYSCREGPCLK)|_D1B(CLKID_OTPPCLK)|\ + _D1B(CLKID_RNGPCLK)) + +/* Domain 2 (DOMAINID_AHB0APB1), Clocks 40-49, Fraction dividers 9-10. Clocks + * not defined in the clock sets will be sourced with AHB_APB1_BASE_CLK. + */ + +/* Domain 2, Fractional divider 9: */ + +#define CGU_CLKSET_DOMAIN2_DIV9 \ + (_D2B(CLKID_AHB2APB1PCLK)|_D2B(CLKID_TIMER0PCLK)|_D2B(CLKID_TIMER1PCLK)|\ + _D2B(CLKID_TIMER2PCLK)|_D2B(CLKID_TIMER3PCLK)|_D2B(CLKID_PWMPCLK)|\ + _D2B(CLKID_PWMPCLKREGS)|_D2B(CLKID_I2C0PCLK)|_D2B(CLKID_I2C1PCLK)) + +/* Domain 2, Fractional divider 10: */ + +#define CGU_CLKSET_DOMAIN2_DIV10 \ + (_D2B(CLKID_PWMCLK)) + +/* Domain 3 (DOMAINID_AHB0APB2), Clocks 50-57, Fraction dividers 11-13. Clocks + * not defined in the clock sets will be sourced with AHB_APB2_BASE_CLK. + */ + +/* Domain 3, Fractional divider 11: */ + +#define CGU_CLKSET_DOMAIN3_DIV11 \ + ( _D3B(CLKID_AHB2APB2PCLK)|_D3B(CLKID_PCMPCLK)|_D3B(CLKID_PCMAPBPCLK)|\ + _D3B(CLKID_UARTAPBCLK)|_D3B(CLKID_LCDPCLK)|_D3B(CLKID_SPIPCLK)|\ + _D3B(CLKID_SPIPCLKGATED)) + +/* Domain 3, Fractional divider 12: */ + +#define CGU_CLKSET_DOMAIN3_DIV12 \ + (_D3B(CLKID_LCDCLK)) + +/* Domain 3, Fractional divider 13: */ + +#define CGU_CLKSET_DOMAIN3_DIV13 \ + (0) + +/* Domain 4 (DOMAINID_AHB0APB3), Clocks 58-70, Fraction divider 14. Clocks + * not defined in the clock sets will be sourced with AHB_APB3_BASE_CLK. + */ + +#define CGU_CLKSET_DOMAIN4_DIV14 \ + (_D4B(CLKID_AHB2APB3PCLK)|_D4B(CLKID_I2SCFGPCLK)|_D4B(CLKID_EDGEDETPCLK)|\ + _D4B(CLKID_I2STXFIFO0PCLK)|_D4B(CLKID_I2STXIF0PCLK)|_D4B(CLKID_I2STXFIFO1PCLK)|\ + _D4B(CLKID_I2STXIF1PCLK)|_D4B(CLKID_I2SRXFIFO0PCLK)|_D4B(CLKID_I2SRXIF0PCLK)|\ + _D4B(CLKID_I2SRXFIFO1PCLK)|_D4B(CLKID_I2SRXIF1PCLK)) + +/* Domain 5 (DOMAINID_PCM), Clock 71, Fraction divider 15. Clocks not + * defined in the clock sets will be sourced with AHB_APB3_BASE_CLK. + */ + +#define CGU_CLKSET_DOMAIN5_DIV15 \ + (_D5B(CLKID_PCMCLKIP)) + +/* Domain 6 (DOMAINID_UART), Clock 72, Fraction divider 16. Clocks mpt + * defined in the clock sets will be sourced with UART_BASE_CLK. + */ + +#define CGU_CLKSET_DOMAIN6_DIV16 \ + (0) + +/* Domain 7 (DOMAINID_CLK1024FS), Clocks 73-86, Fraction dividers 17-22. Clocks + * not defined in the clock sets will be sourced with CLK1024FS_BASE_CLK. + */ + +/* Domain 7, Fractional divider 17: */ + +#define CGU_CLKSET_DOMAIN7_DIV17 \ + ( _D7B(CLKID_I2SEDGEDETECTCLK)|_D7B(CLKID_I2STXWS0)|_D7B(CLKID_I2STXWS1)|\ + _D7B(CLKID_I2SRXWS0)|_D7B(CLKID_I2SRXWS1)) + +/* Domain 7, Fractional divider 18: */ + +#define CGU_CLKSET_DOMAIN7_DIV18 \ + ( _D7B(CLKID_I2STXBCK0N)|_D7B(CLKID_I2STXBCK1N)) + +/* Domain 7, Fractional divider 19: */ + +#define CGU_CLKSET_DOMAIN7_DIV19 \ + ( _D7B(CLKID_I2STXCLK0)|_D7B(CLKID_CLK256FS)) + +/* Domain 7, Fractional divider 20: */ + +#define CGU_CLKSET_DOMAIN7_DIV20 \ + ( _D7B(CLKID_I2SRXBCK0N)|_D7B(CLKID_I2SRXBCK1N)) + +/* Domain 7, Fractional divider 21: */ + +#define CGU_CLKSET_DOMAIN7_DIV21 \ + (0) + +/* Domain 7, Fractional divider 22: */ + +#define CGU_CLKSET_DOMAIN7_DIV22 \ + (0) + +/* Domain 8 (DOMAINID_BCK0, clock 87, and domain 9 (DOMAINID_BCK1), clock 88, + * are directly connected + */ + +/* Domain 10 (DOMAINID_SPI), Clocks 89-90, Fraction divider 23. Clocks + * not defined in the clock sets will be sourced with SPI_CLK_BASE_CLK. + */ + +#define CGU_CLKSET_DOMAIN10_DIV23 \ + ( _D10B(CLKID_SPICLK)|_D10B(CLKID_SPICLKGATED)) + +/* Domain 11 (DOMAINID_SYSCLKO, clock 91, is directly connected */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* Default clock configuration for the EA3152 board. Every board must + * provide an implementation of g_boardclks. This rather complex structure + * is used by the boot-up logic to configure initial lpc313x clocking. + * + * FFAST: 12MHz + * MASTER PLL Freq: 180MHz; + * AUDIOPLL Freq: 1024Fs, Fs = 44.1kHz + * + * Domain Input Subdomain Divider Ratio + * ------------------------ ----------------- ----------------- ------------- + * 0 - DOMAIN_SYS MASTER PLL(HPLL1) DOMAIN0_DIV0 1/2 + * DOMAIN0_DIV1 1 + * DOMAIN0_DIV2 1/2 + * DOMAIN0_DIV3 1/4 + * DOMAIN0_DIV4 1/4 + * DOMAIN0_DIV5 1/2 + * DOMAIN0_DIV6 1/2 + * + * 1 - DOMAIN_AHB0APB0 FFAST DOMAIN1_DIV7 1/38 + * DOMAIN1_DIV8 1/2 + * + * 2 - DOMAIN_AHB0APB1 FFAST DOMAIN2_DIV9 1/2 + * DOMAIN2_DIV10 1/2 + * + * 3 - DOMAIN_AHB0APB2 MASTER PLL(HPLL1) DOMAIN3_DIV11 1/2 + * DOMAIN3_DIV12 1/40 + * DOMAIN3_DIV13 1 (not used) + * + * 4 - DOMAIN_AHB0APB3 FFAST DOMAIN4_DIV14 1/2 + * + * 5 - DOMAIN_PCM MASTER PLL(HPLL1) DOMAIN5_DIV15 1/2 + * + * 6 - DOMAIN_UART FFAST DOMAIN6_DIV16 1 + * + * 7 - DOMAIN_CLCK1024FS AUDIO PLL(HPLL0) DOMAIN7_DIV17 1/256 + * DOMAIN7_DIV18 1/4 + * DOMAIN7_DIV19 1 + * DOMAIN7_DIV20 1/4 + * DOMAIN7_DIV21 1/32 + * DOMAIN7_DIV22 1/2 + * + * 8 - DOMAIN_I2SRXBCK0 I2SRX_BCK0 - - + * + * 9 - DOMAIN_I2SRXBCK1 I2SRX_BCK1 - - + * + * 10 - DOMAIN_SPI MASTER PLL(HPLL1) DOMAIN10_DIV23 1/2 + * + * 11 - DOMAIN_SYSCLKO FFAST - - + */ + +const struct lpc31_clkinit_s g_boardclks = +{ + /* Domain 0 (DOMAINID_SYS), Clocks 0 - 29, Fraction dividers 0-6 */ + + { + CGU_FREQIN_HPPLL1, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV0}, + {{0, 0, 0}, CGU_CLKSET_DOMAIN0_DIV1}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV2}, + {{1, 1, 4}, CGU_CLKSET_DOMAIN0_DIV3}, + {{1, 1, 4}, CGU_CLKSET_DOMAIN0_DIV4}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV5}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV6} + } + }, + + /* Domain 1 (DOMAINID_AHB0APB0), Clocks 30-39, Fraction dividers 7-8 */ + + { + CGU_FREQIN_FFAST, + { + {{1, 1, 38}, CGU_CLKSET_DOMAIN1_DIV7}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN1_DIV8} + } + }, + + /* Domain 2 (DOMAINID_AHB0APB1), Clocks 40-49, Fraction dividers 9-10 */ + + { + CGU_FREQIN_FFAST, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN2_DIV9}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN2_DIV10} + } + }, + + /* Domain 3 (DOMAINID_AHB0APB2), Clocks 50-57, Fraction dividers 11-13 */ + + { + CGU_FREQIN_HPPLL1, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN3_DIV11}, + {{1, 1, 40}, CGU_CLKSET_DOMAIN3_DIV12}, + {{0, 0, 0}, CGU_CLKSET_DOMAIN3_DIV13} + } + }, + + /* Domain 4 (DOMAINID_AHB0APB3), Clocks 58-70, Fraction divider 14 */ + + { + CGU_FREQIN_FFAST, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN4_DIV14} + } + }, + + /* Domain 5 (DOMAINID_PCM), Clock 71, Fraction divider 15 */ + + { + CGU_FREQIN_HPPLL1, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN5_DIV15} + } + }, + + /* Domain 6 (DOMAINID_UART), Clock 72, Fraction divider 16 */ + + { + CGU_FREQIN_FFAST, + { + {{0, 0, 0}, CGU_CLKSET_DOMAIN6_DIV16} + } + }, + + /* Domain 7 (DOMAINID_CLK1024FS), Clocks 73-86, Fraction dividers 17-22 */ + + { + CGU_FREQIN_HPPLL0, + { + {{1, 1, 256}, CGU_CLKSET_DOMAIN7_DIV17}, + {{1, 1, 4}, CGU_CLKSET_DOMAIN7_DIV18}, + {{0, 0, 0}, CGU_CLKSET_DOMAIN7_DIV19}, + {{1, 1, 4}, CGU_CLKSET_DOMAIN7_DIV20}, + {{1, 1, 32}, CGU_CLKSET_DOMAIN7_DIV21}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN7_DIV22} + } + }, + + /* Domain 8 (DOMAINID_BCK0, clock 87 */ + + { + CGU_FREQIN_I2SRXBCK0 + }, + + /* Domain 9 (DOMAINID_BCK1, clock 88 */ + + { + CGU_FREQIN_I2SRXBCK1 + }, + + /* Domain 10 (DOMAINID_SPI), Clocks 89-90, Fraction divider 23 */ + + { + CGU_FREQIN_HPPLL1, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN10_DIV23} + } + }, + + /* Domain 11 (DOMAINID_SYSCLKO, clock 91 */ + + { + CGU_FREQIN_FFAST + }, + + /* Dynamic fractional divider configuration (7) */ + +#if 0 /* Dynamic fractional divider initialization not implemented */ + { + { + CGU_DYNSEL_ALLBITS, {1, 1, 64} + }, + { + CGU_DYNSEL_ALLBITS, {0, 0, 0} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 3} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 6} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 6} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 6} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 3} + } + } +#endif +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ diff --git a/configs/ea3152/src/lpc31_fillpage.c b/configs/ea3152/src/lpc31_fillpage.c new file mode 100644 index 0000000000000000000000000000000000000000..647960cfa35bb9d9845df23285279bb8c53a9ae3 --- /dev/null +++ b/configs/ea3152/src/lpc31_fillpage.c @@ -0,0 +1,524 @@ +/**************************************************************************** + * configs/ea3152/src/lpc31_fillpage.c + * + * Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#ifdef CONFIG_PAGING +#ifdef CONFIG_PAGING_BINPATH +# include +# include +# include +# include +# include +# ifdef CONFIG_EA3152_PAGING_SDSLOT +# include +# include +# include +# include +# include "lpc31.h" +# endif +#endif + +#if defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) +# include +# include +# include +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* SD SLOT number might depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_EA3152 +# define HAVE_SD 1 +# define HAVE_SPINOR 1 +# if defined(CONFIG_EA3152_PAGING_SDSLOT) && CONFIG_EA3152_PAGING_SDSLOT != 0 +# error "Only one SD slot" +# undef CONFIG_EA3152_PAGING_SDSLOT +# endif +#else + /* Add configuration for new LPC31XX boards here */ +# error "Unrecognized LPC31XX board" +# undef CONFIG_EA3152_PAGING_SDSLOT +# undef HAVE_SD +# undef HAVE_SPINOR +#endif + +/* Sanity check: We can only perform paging using a single source device */ + +#if defined(CONFIG_PAGING_M25PX) && defined(CONFIG_PAGING_AT45DB) +# error "Both CONFIG_PAGING_M25PX and CONFIG_PAGING_AT45DB are defined" +# undef CONFIG_PAGING_M25PX +#endif +#if defined(CONFIG_PAGING_BINPATH) && defined(CONFIG_PAGING_M25PX) +# error "Both CONFIG_PAGING_BINPATH and CONFIG_PAGING_M25PX are defined" +# undef CONFIG_PAGING_BINPATH +#endif +#if defined(CONFIG_PAGING_BINPATH) && defined(CONFIG_PAGING_AT45DB) +# error "Both CONFIG_PAGING_BINPATH and CONFIG_PAGING_AT45DB are defined" +# undef CONFIG_PAGING_BINPATH +#endif + +/* Are we accessing the page source data through a file path? */ + +#ifdef CONFIG_PAGING_BINPATH + + /* Can't support SD if the board does not support SD (duh) */ + +# if defined(CONFIG_EA3152_PAGING_SDSLOT) && !defined(HAVE_SD) +# error "This board does not support SD" +# undef CONFIG_EA3152_PAGING_SDSLOT +# endif + + /* Can't support SD if mountpoints are disabled or if SDIO support + * is not enabled. + */ + +# if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC31_MCI) +# ifdef CONFIG_EA3152_PAGING_SDSLOT +# error "Mountpoints and/or MCI disabled" +# endif +# undef CONFIG_EA3152_PAGING_SDSLOT +# undef HAVE_SD +# endif + + /* A mountpoint for the FAT file system must be provided */ + +# if !defined(CONFIG_EA3152_PAGING_MOUNTPT) && defined(CONFIG_EA3152_PAGING_SDSLOT) +# error "No CONFIG_EA3152_PAGING_MOUNTPT provided" +# undef CONFIG_EA3152_PAGING_SDSLOT +# undef HAVE_SD +# endif + + /* If no minor number is provided, default to zero */ + +# ifndef CONFIG_EA3152_PAGING_MINOR +# define CONFIG_EA3152_PAGING_MINOR 0 +# endif + +#endif /* CONFIG_PAGING_BINPATH */ + +/* Are we accessing the page source data through the M25P* MTD device? */ + +#if defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) + + /* Verify that SPI support is enabld */ + +#ifndef CONFIG_LPC31_SPI +# error "SPI support is not enabled" +#endif + + /* Make sure that some value is defined for the offset into the FLASH + * of the NuttX binary image. + */ + +# ifndef CONFIG_EA3152_PAGING_BINOFFSET +# define CONFIG_EA3152_PAGING_BINOFFSET 0 +# endif + + /* Make sure that some value is defined for the SPI port number */ + +# ifndef CONFIG_EA3152_PAGING_SPIPORT +# define CONFIG_EA3152_PAGING_SPIPORT 0 +# endif +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* State structure needed to support paging from a file */ + +#ifdef CONFIG_PAGING_BINPATH +struct pg_source_s +{ + bool initialized; /* TRUE: we are initialized */ + int fd; /* File descriptor of the nuttx.bin file */ +}; +#endif + +/* State structured needd to support paging through the M25P* MTD interface. */ + +#if defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) +struct pg_source_s +{ + /* If interrupts or DMA are used, then we will have to defer initialization */ + + bool initialized; /* TRUE: we are initialized */ + + /* This is the M25P* device state structure */ + + FAR struct mtd_dev_s *mtd; + + /* This the device geometry */ + +#ifdef CONFIG_DEBUG + FAR struct mtd_geometry_s geo; +#endif +}; +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_PAGING_BINPATH) || defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) +static struct pg_source_s g_pgsrc; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc31_initsrc() + * + * Description: + * Initialize the source device that will support paging. + * If BINPATH is defined, then it is the full path to a file on a mounted file + * system. In this case initialization will be deferred until the first + * time that up_fillpage() is called. + * + ****************************************************************************/ + +#if defined(CONFIG_PAGING_BINPATH) +static inline void lpc31_initsrc(void) +{ +#ifdef CONFIG_EA3152_PAGING_SDSLOT + FAR struct sdio_dev_s *sdio; + int ret; +#endif + + /* Are we already initialized? */ + + if (!g_pgsrc.initialized) + { +#ifdef CONFIG_EA3152_PAGING_SDSLOT + char devname[16]; +#endif + + pgllvdbg("Initializing %s\n", CONFIG_PAGING_BINPATH); + + /* No, do we need to mount an SD device? */ + +#ifdef CONFIG_EA3152_PAGING_SDSLOT + + /* Yes.. First, get an instance of the SDIO interface */ + + sdio = sdio_initialize(CONFIG_EA3152_PAGING_SDSLOT); + DEBUGASSERT(sdio != NULL); + + /* Then bind the SDIO interface to the SD driver */ + + ret = mmcsd_slotinitialize(CONFIG_EA3152_PAGING_MINOR, sdio); + DEBUGASSERT(ret == OK); + + /* Then let's guess and say that there is a card in the slot. + * (We are basically jodido anyway if there is no card in the slot). + */ + + sdio_mediachange(sdio, true); + + /* Now mount the file system */ + + snprintf(devname, 16, "/dev/mmcsd%d", CONFIG_EA3152_PAGING_MINOR); + ret = mount(devname, CONFIG_EA3152_PAGING_MOUNTPT, "vfat", MS_RDONLY, NULL); + DEBUGASSERT(ret == OK); + +#endif /* CONFIG_EA3152_PAGING_SDSLOT */ + + /* Open the selected path for read-only access */ + + g_pgsrc.fd = open(CONFIG_PAGING_BINPATH, O_RDONLY); + DEBUGASSERT(g_pgsrc.fd >= 0); + + /* Then we are initialized */ + + g_pgsrc.initialized = true; + } +} + +#elif defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) +static inline void lpc31_initsrc(void) +{ + FAR struct spi_dev_s *spi; +#ifdef CONFIG_DEBUG + uint32_t capacity; + int ret; +#endif + + /* Are we already initialized? */ + + if (!g_pgsrc.initialized) + { + /* No... the initialize now */ + + pgllvdbg("Initializing\n"); + + /* First get an instance of the SPI device interface */ + + spi = lpc31_spibus_initialize(CONFIG_EA3152_PAGING_SPIPORT); + DEBUGASSERT(spi != NULL); + + /* Then bind the SPI interface to the MTD driver */ + +#ifdef CONFIG_PAGING_M25PX + g_pgsrc.mtd = m25p_initialize(spi); +#else + g_pgsrc.mtd = at45db_initialize(spi); +#endif + DEBUGASSERT(g_pgsrc.mtd != NULL); + + /* Verify that we can use the device */ + +#ifdef CONFIG_DEBUG + /* Get the device geometry. (casting to uintptr_t first eliminates + * complaints on some architectures where the sizeof long is different + * from the size of a pointer). + */ + + ret = MTD_IOCTL(g_pgsrc.mtd, MTDIOC_GEOMETRY, (unsigned long)&g_pgsrc.geo); + DEBUGASSERT(ret >= 0); + capacity = g_pgsrc.geo.erasesize*g_pgsrc.geo.neraseblocks; + pgllvdbg("capacity: %d\n", capacity); + DEBUGASSERT(capacity >= (CONFIG_EA3152_PAGING_BINOFFSET + PG_TEXT_VSIZE)); +#endif + + /* We are now initialized */ + + g_pgsrc.initialized = true; + } +} + +#else +# define lpc31_initsrc() +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_fillpage() + * + * Description: + * After a page is allocated and mapped by up_allocpage(), the actual + * filling of the page with data from the non-volatile, must be performed + * by a separate call to the architecture-specific function, up_fillpage(). + * This function is non-blocking, it will start an asynchronous page fill. + * The common paging logic will provide a callback function, pg_callback, + * that will be called when the page fill is finished (or an error occurs). + * This callback is assumed to occur from an interrupt level when the + * device driver completes the fill operation. + * + * NOTE 1: Allocating and filling a page is a two step process. up_allocpage() + * allocates the page, and up_fillpage() fills it with data from some non- + * volatile storage device. This distinction is made because up_allocpage() + * can probably be implemented in board-independent logic whereas up_fillpage() + * probably must be implemented as board-specific logic. + * + * NOTE 2: The initial mapping of vpage will be read-able, write-able, + * but non-cacheable. No special actions will be required of + * up_fillpage() in order to write into this allocated page. If the + * virtual address maps to a text region, however, this function should + * remap the region so that is is read/execute only. It should be made + * cache-able in any case. + + * Input Parameters: + * tcb - A reference to the task control block of the task that needs to + * have a page fill. Architecture-specific logic can retrieve page + * fault information from the architecture-specific context + * information in this TCB to perform the fill. + * pg_callbck - The function to be called when the page fill is complete. + * + * Returned Value: + * This function will return zero (OK) if the page fill was successfully + * started (the result of the page fill is passed to the callback function + * as the result argument). A negated errno value may be returned if an + * error occurs. All errors, however, are fatal. + * + * NOTE: -EBUSY has a special meaning. It is used internally to mean that + * the callback function has not executed. Therefore, -EBUSY should + * never be provided in the result argument of pg_callback. + * + * Assumptions: + * - This function is called from the normal tasking context (but + * interrupts disabled). The implementation must take whatever actions + * are necessary to assure that the operation is safe within this context. + * - Upon return, the caller will sleep waiting for the page fill callback + * to occur. The callback function will perform the wakeup. + * + ****************************************************************************/ + +#ifdef CONFIG_PAGING_BLOCKINGFILL + +/* Version 1: Supports blocking fill operations */ + +int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage) +{ +#if defined(CONFIG_PAGING_BINPATH) + ssize_t nbytes; + off_t offset; + off_t pos; +#elif defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) + ssize_t nbytes; + off_t offset; +#endif + + pglldbg("TCB: %p vpage: %p far: %08x\n", tcb, vpage, tcb->xcp.far); + DEBUGASSERT(tcb->xcp.far >= PG_PAGED_VBASE && tcb->xcp.far < PG_PAGED_VEND); + + /* If BINPATH is defined, then it is the full path to a file on a mounted file + * system. In this case initialization will be deferred until the first + * time that up_fillpage() is called. Are we initialized? + */ + +#if defined(CONFIG_PAGING_BINPATH) + + /* Perform initialization of the paging source device (if necessary) */ + + lpc31_initsrc(); + + /* Create an offset into the binary image that corresponds to the + * virtual address. File offset 0 corresponds to PG_LOCKED_VBASE. + */ + + offset = (off_t)tcb->xcp.far - PG_LOCKED_VBASE; + + /* Seek to that position */ + + pos = lseek(g_pgsrc.fd, offset, SEEK_SET); + DEBUGASSERT(pos != (off_t)-1); + + /* And read the page data from that offset */ + + nbytes = read(g_pgsrc.fd, vpage, PAGESIZE); + DEBUGASSERT(nbytes == PAGESIZE); + return OK; + +#elif defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) /* !CONFIG_PAGING_BINPATH */ + + /* Perform initialization of the paging source device (if necessary) */ + + lpc31_initsrc(); + + /* Create an offset into the binary image that corresponds to the + * virtual address. File offset 0 corresponds to PG_LOCKED_VBASE. + */ + + offset = (off_t)tcb->xcp.far - PG_LOCKED_VBASE + CONFIG_EA3152_PAGING_BINOFFSET; + + /* Read the page at the correct offset into the SPI FLASH device */ + + nbytes = MTD_READ(g_pgsrc.mtd, offset, PAGESIZE, (FAR uint8_t *)vpage); + DEBUGASSERT(nbytes == PAGESIZE); + return OK; + +#else /* !CONFIG_PAGING_BINPATH && !CONFIG_PAGING_M25PX && !CONFIG_PAGING_AT45DB */ + +# warning "Not implemented" + return -ENOSYS; + +#endif /* !CONFIG_PAGING_BINPATH && !CONFIG_PAGING_M25PX && !CONFIG_PAGING_AT45DB */ +} + +#else /* CONFIG_PAGING_BLOCKINGFILL */ + +/* Version 2: Supports non-blocking, asynchronous fill operations */ + +int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage, up_pgcallback_t pg_callback) +{ + pglldbg("TCB: %p vpage: %d far: %08x\n", tcb, vpage, tcb->xcp.far); + DEBUGASSERT(tcb->xcp.far >= PG_PAGED_VBASE && tcb->xcp.far < PG_PAGED_VEND); + +#if defined(CONFIG_PAGING_BINPATH) +# error "File system-based paging must always be implemented with blocking calls" +#elif defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) +# error "SPI FLASH paging must always be implemented with blocking calls" +#else +# warning "Not implemented" +#endif + + return -ENOSYS; +} + +#endif /* CONFIG_PAGING_BLOCKINGFILL */ + +/************************************************************************************ + * Name: lpc31_pginitialize + * + * Description: + * Set up mass storage device to support on demand paging. + * + ************************************************************************************/ + +void weak_function lpc31_pginitialize(void) +{ + /* This initialization does nothing in this example setup. But this function is + * where you might, for example: + * + * - Initialize and configure a mass storage device to support on-demand paging. + * This might be, perhaps an SD card or NAND memory. An SPI FLASH would probably + * already have been configured by lpc31_spidev_intialize(void); + * - Set up resources to support up_fillpage() operation. For example, perhaps the + * the text image is stored in a named binary file. In this case, the virtual + * text addresses might map to offsets into that file. + * - Do whatever else is necessary to make up_fillpage() ready for the first time + * that it is called. + * + * In reality, however, this function is not very useful: This function is called + * from a low level (before os_start() is even called), it may not be possible to + * perform file system operations or even to get debug output yet. Therefore, + * to keep life simple, initialization will be deferred in all cases until the first + * time that up_fillpage() is called. + */ +} + +#endif /* CONFIG_PAGING */ diff --git a/configs/ea3152/src/lpc31_leds.c b/configs/ea3152/src/lpc31_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..ab0ea797492d0866faa7a9e54b0071916718ed4b --- /dev/null +++ b/configs/ea3152/src/lpc31_leds.c @@ -0,0 +1,107 @@ +/**************************************************************************** + * configs/ea3152/src/lpc31_leds.c + * + * Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "lpc31.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/ea3152/src/lpc31_mem.c b/configs/ea3152/src/lpc31_mem.c new file mode 100644 index 0000000000000000000000000000000000000000..b84b5515f0f375aa0c09847b95aac426efd03688 --- /dev/null +++ b/configs/ea3152/src/lpc31_mem.c @@ -0,0 +1,357 @@ +/**************************************************************************** + * configs/ea3152/src/lpc31_mem.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * References: + * - NXP UM10314 LPC3130/31 User manual Rev. 1.01 — 9 September 2009 + * - NXP lpc313x.cdl.drivers.zip example driver code + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "lpc31_syscreg.h" +#include "lpc31_cgudrvr.h" +#include "lpc31_mpmc.h" +#include "ea3152.h" + +#ifdef CONFIG_LPC31_EXTDRAM + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* The MPMC delay based on trace lengths between SDRAM and the chip and on + * the delay strategy used for SDRAM. + */ + +#define EA3152_MPMC_DELAY 0x824 + +/* Delay constants in nanosecondss for MT48LC32M16LF SDRAM on board */ + +#define EA3152_SDRAM_TRP (20) +#define EA3152_SDRAM_TRFC (66) +#define EA3152_SDRAM_TRAS (44) +#define EA3152_SDRAM_TREX (75) +#define EA3152_SDRAM_TARP 4 +#define EA3152_SDRAM_TWR (75) +#define EA3152_SDRAM_TRC (66) +#define EA3152_SDRAM_TRRD (15) +#define EA3152_SDRAM_TMRD (20) +#define EA3152_SDRAM_TXSR (75) +#define EA3152_SDRAM_TDAL (50) +#define EA3152_SDRAM_REFRESH (100) +#define EA3152_SDRAM_OPERREFRESH (7812) + +/* Macro used to convert the above values (in nanoseconds) into units of + * the HCLK. + */ + +#define NS2HCLKS(ns,hclk2,mask) \ + ((uint32_t)(((uint64_t)ns *(uint64_t)hclk2) / 1000000000ull) & mask) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc31_sdraminitialize + * + * Description: + * Configure SDRAM on the EA3152 board + * + * Micron Initialization Sequence from their data sheet for the Micron + * MT48LC32M16A2 32M x 16 SDRAM chip: + * + * "SDRAMs must be powered up and initialized in a predefined manner. + * Operational procedures other than those specified may result in + * undefined operation. Once power is applied to VDD and VDDQ + * (simultaneously) and the clock is stable (stable clock is defined as + * a signal cycling within timing constraints specified for the clock + * pin), the SDRAM requires a 100µs delay prior to issuing any command + * other than a COMMAND INHIBIT or NOP. + * + * "Starting at some point during this 100µs period and continuing at least + * through the end of this period, COMMAND INHIBIT or NOP commands should + * be applied. Once the 100µs delay has been satisfied with at least one + * COMMAND INHIBIT or NOP command having been applied, a PRECHARGE command + * should be applied. All banks must then be precharged, thereby placing + * the device in the all banks idle state. + * + * "Once in the idle state, two AUTO REFRESH cycles must be performed. After + * the AUTO REFRESH cycles are complete, the SDRAM is ready for mode + * register programming. + * + * "Because the mode register will power up in an unknown state, it should + * be loaded prior to applying any operational command." + * + * The JEDEC recommendation for initializing SDRAM is: + * + * APPLY POWER (Vdd/Vddq equally, and CLK is stable) + * Wait 200uS + * PRECHARGE all + * 8 AUTO REFRESH COMMANDS + * LOAD MODE REGISTER + * SDRAM is ready for operation + * + * The Micron SDRAM parts will work fine with the JEDEC sequence, but also + * allow for a quicker init sequence of: + * + * APPLY POWER (Vdd/Vddq equally, and CLK is stable) + * Wait at least 100uS (during which time start applying and + * continue applying NOP or COMMAND INHIBIT) + * PRECHARGE all + * 2 AUTO REFRESH COMMANDS (min requirement, more than 2 is also ok) + * LOAD MODE REGISTER + * SDRAM is ready for operation + * + ****************************************************************************/ + +static void lpc31_sdraminitialize(void) +{ + uint32_t regval; + + /* These run-time calculations can be reduced dramatically if hclk is + * replaced with an apriori value. + */ + +#ifdef CONFIG_LPC31_SDRAMHCLK +# define HCLK CONFIG_LPC31_SDRAMHCLK +#else + uint32_t hclk = lpc31_clkfreq(CLKID_MPMCCFGCLK2, DOMAINID_SYS); +# define HCLK hclk +#endif + + /* Check RTL for divide by 2 possible. If so change then enable the followng logic */ +#if 0 + uint32_t hclk2 = hclk; + + if (((getreg32(LPC31_MPMC_CONFIG) & MPMC_CONFIG_CLK)) != 0) + { + hclk2 >>= 1; + } +# define HCLK2 hclk2 +#else +# define HCLK2 hclk +#endif + up_udelay(100); + + /* Set command delay startergy */ + + putreg32(MPMC_DYNREADCONFIG_CMDDEL, LPC31_MPMC_DYNREADCONFIG); + + /* Configure device config register nSDCE0 for proper width SDRAM */ + + putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16), + LPC31_MPMC_DYNCONFIG0); + putreg32((MPMC_DYNRASCAS0_RAS2CLK|MPMC_DYNRASCAS0_CAS2CLK), + LPC31_MPMC_DYNRASCAS0); + + /* Min 20ns program 1 so that at least 2 HCLKs are used */ + + putreg32(NS2HCLKS(EA3152_SDRAM_TRP, HCLK2, MPMC_DYNTRP_MASK), + LPC31_MPMC_DYNTRP); + putreg32(NS2HCLKS(EA3152_SDRAM_TRAS, HCLK2, MPMC_DYNTRAS_MASK), + LPC31_MPMC_DYNTRAS); + putreg32(NS2HCLKS(EA3152_SDRAM_TREX, HCLK2, MPMC_DYNTSREX_MASK), + LPC31_MPMC_DYNTSREX); + putreg32(EA3152_SDRAM_TARP, + LPC31_MPMC_DYNTAPR); + putreg32(NS2HCLKS(EA3152_SDRAM_TDAL, HCLK2, MPMC_DYNTDAL_MASK), + LPC31_MPMC_DYNTDAL); + putreg32(NS2HCLKS(EA3152_SDRAM_TWR, HCLK2, MPMC_DYNTWR_MASK), + LPC31_MPMC_DYNTWR); + putreg32(NS2HCLKS(EA3152_SDRAM_TRC, HCLK2, MPMC_DYNTRC_MASK), + LPC31_MPMC_DYNTRC); + putreg32(NS2HCLKS(EA3152_SDRAM_TRFC, HCLK2, MPMC_DYNTRFC_MASK), + LPC31_MPMC_DYNTRFC); + putreg32(NS2HCLKS(EA3152_SDRAM_TXSR, HCLK2, MPMC_DYNTXSR_MASK), + LPC31_MPMC_DYNTXSR); + putreg32(NS2HCLKS(EA3152_SDRAM_TRRD, HCLK2, MPMC_DYNTRRD_MASK), + LPC31_MPMC_DYNTRRD); + putreg32(NS2HCLKS(EA3152_SDRAM_TMRD, HCLK2, MPMC_DYNTMRD_MASK), + LPC31_MPMC_DYNTMRD); + up_udelay(100); + + /* Issue continuous NOP commands */ + + putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_INOP), + LPC31_MPMC_DYNCONTROL); + + /* Load ~200us delay value to timer1 */ + + up_udelay(200); + + /* Issue a "pre-charge all" command */ + + putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_IPALL), + LPC31_MPMC_DYNCONTROL); + + /* Minimum refresh pulse interval (tRFC) for MT48LC32M16A2=80nsec, + * 100nsec provides more than adequate interval. + */ + + putreg32(NS2HCLKS(EA3152_SDRAM_REFRESH, HCLK, MPMC_DYNREFRESH_TIMER_MASK), + LPC31_MPMC_DYNREFRESH); + + /* Load ~250us delay value to timer1 */ + + up_udelay(250); + + /* Recommended refresh interval for normal operation of the Micron + * MT48LC16LFFG = 7.8125usec (128KHz rate). ((HCLK / 128000) - 1) = + * refresh counter interval rate, (subtract one for safety margin). + */ + + putreg32(NS2HCLKS(EA3152_SDRAM_OPERREFRESH, HCLK, MPMC_DYNREFRESH_TIMER_MASK), + LPC31_MPMC_DYNREFRESH); + + /* Select mode register update mode */ + + putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_IMODE), + LPC31_MPMC_DYNCONTROL); + + /* Program the SDRAM internal mode registers on bank nSDCE0 and reconfigure + * the SDRAM chips. Bus speeds up to 90MHz requires use of a CAS latency = 2. + * To get correct value on address bus CAS cycle, requires a shift by 13 for + * 16bit mode + */ + + (void)getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 13)); + + putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16), + LPC31_MPMC_DYNCONFIG0); + putreg32((MPMC_DYNRASCAS0_RAS2CLK|MPMC_DYNRASCAS0_CAS2CLK), + LPC31_MPMC_DYNRASCAS0); + + /* Select normal operating mode */ + + putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_INORMAL), + LPC31_MPMC_DYNCONTROL); + + /* Enable buffers */ + + regval = getreg32(LPC31_MPMC_DYNCONFIG0); + regval |= MPMC_DYNCONFIG0_B; + putreg32(regval, LPC31_MPMC_DYNCONFIG0); + + putreg32((MPMC_DYNCONTROL_INORMAL|MPMC_DYNCONTROL_CS), + LPC31_MPMC_DYNCONTROL); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc31_meminitialize + * + * Description: + * Initialize external memory resources (sram, sdram, nand, nor, etc.) + * + ****************************************************************************/ + +void lpc31_meminitialize(void) +{ + /* Configure the LCD pins in external bus interface (EBI/MPMC) memory mode. + * + * LCD_CSB -> MPMC_NSTCS_0 + * LCD_DB_1 -> MPMC_NSTCS_1 + * LCD_DB_0 -> MPMC_CLKOUT + * LCD_E_RD -> MPMC_CKE + * LCD_RS -> MPMC_NDYCS + * LCD_RW_WR -> MPMC_DQM_1 + * LCD_DB_2 -> EBI_A_2 + * LCD_DB_3 -> EBI_A_3 l + * LCD_DB_4 -> EBI_A_4 l + * LCD_DB_5 -> EBI_A_5 l + * LCD_DB_6 -> EBI_A_6 + * LCD_DB_7 -> EBI_A_7 + * LCD_DB_8 -> EBI_A_8 + * LCD_DB_9 -> EBI_A_9 + * LCD_DB_10 -> EBI_A_10 + * LCD_DB_11 -> EBI_A_11 + * LCD_DB_12 -> EBI_A_12 + * LCD_DB_13 -> EBI_A_13 + * LCD_DB_14 -> EBI_A_14 + * LCD_DB_15 -> EBI_A_15 + */ + + putreg32(SYSCREG_MUX_LCDEBISEL_EBIMPMC, LPC31_SYSCREG_MUX_LCDEBISEL); + + /* Enable EBI clock */ + + lpc31_enableclock(CLKID_EBICLK); + + /* Enable MPMC controller clocks */ + + lpc31_enableclock(CLKID_MPMCCFGCLK); + lpc31_enableclock(CLKID_MPMCCFGCLK2); + lpc31_enableclock(CLKID_MPMCCFGCLK3); + + /* Enable the external memory controller */ + + putreg32(MPMC_CONTROL_E, LPC31_MPMC_CONTROL); + + /* Force HCLK to MPMC_CLK to 1:1 ratio, little-endian mode */ + + putreg32(0, LPC31_MPMC_CONFIG); + + /* Set MPMC delay based on trace lengths between SDRAM and the chip + * and on the delay strategy used for SDRAM. + */ + + putreg32(EA3152_MPMC_DELAY, LPC31_SYSCREG_MPMC_DELAYMODES); + + /* Configure Micron MT48LC32M16A2 SDRAM on the EA3152 board */ + + lpc31_sdraminitialize(); +} +#endif /* CONFIG_LPC31_EXTDRAM */ diff --git a/configs/ea3152/src/lpc31_spi.c b/configs/ea3152/src/lpc31_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..5e81cc398dab2bba89771443783f817282342fac --- /dev/null +++ b/configs/ea3152/src/lpc31_spi.c @@ -0,0 +1,140 @@ +/************************************************************************************ + * configs/ea3152/src/lpc31_spi.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "lpc31.h" +#include "ea3152.h" + +#ifdef CONFIG_LPC31_SPI +#if 0 /* At present, EA3152 specific logic is hard-coded in the file lpc31_spi.c + * in arch/arm/src/lpc31xx */ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc31_spidev_intialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the EA3152 board. + * + ************************************************************************************/ + +void weak_function lpc31_spidev_intialize(void) +{ + /* NOTE: Clocking for SPI has already been provided. Pin configuration is performed + * on-the-fly, so no additional setup is required. + */ +} + +/************************************************************************************ + * Name: lpc31_spiselect and lpc31_spistatus + * + * Description: + * The external functions, lpc31_spiselect and lpc31_spistatus must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including lpc31_spibus_initialize()) + * are provided by common LPC31XX logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in lpc31_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide lpc31_spiselect() and lpc31_spistatus() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to lpc31_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by lpc31_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t lpc31_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} + +#endif /* 0 */ +#endif /* CONFIG_LPC31_SPI */ diff --git a/configs/ea3152/src/lpc31_usbmsc.c b/configs/ea3152/src/lpc31_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..e251d5cbc02316722f8b695d8d7b58606d1cd266 --- /dev/null +++ b/configs/ea3152/src/lpc31_usbmsc.c @@ -0,0 +1,128 @@ +/**************************************************************************** + * configs/ea3152/src/lpc31_usbmsc.c + * + * Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the SAM3U MMC/SD SDIO block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +#ifndef CONFIG_SYSTEM_USBMSC_DEVPATH1 +# define CONFIG_SYSTEM_USBMSC_DEVPATH1 "/dev/ram" +#endif + +static const char g_source[] = CONFIG_SYSTEM_USBMSC_DEVPATH1; +static struct fat_format_s g_fmt = FAT_FORMAT_INITIALIZER; + +#define USBMSC_NSECTORS 64 +#define USBMSC_SECTORSIZE 512 +#define BUFFER_SIZE (USBMSC_NSECTORS*USBMSC_SECTORSIZE) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization of the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + uint8_t *pbuffer; + int ret; + + pbuffer = (uint8_t *)kmm_malloc(BUFFER_SIZE); + if (!pbuffer) + { + lowsyslog("board_usbmsc_initialize: Failed to allocate ramdisk of size %d\n", + BUFFER_SIZE); + return -ENOMEM; + } + + /* Register a RAMDISK device to manage this RAM image */ + + ret = ramdisk_register(CONFIG_SYSTEM_USBMSC_DEVMINOR1, + pbuffer, + USBMSC_NSECTORS, + USBMSC_SECTORSIZE, + RDFLAG_WRENABLED | RDFLAG_FUNLINK); + if (ret < 0) + { + printf("create_ramdisk: Failed to register ramdisk at %s: %d\n", + g_source, -ret); + kmm_free(pbuffer); + return ret; + } + + /* Create a FAT filesystem on the ramdisk */ + + ret = mkfatfs(g_source, &g_fmt); + if (ret < 0) + { + printf("create_ramdisk: Failed to create FAT filesystem on ramdisk at %s\n", + g_source); + /* kmm_free(pbuffer); -- RAM disk is registered */ + return ret; + } + + return 0; +} diff --git a/configs/ea3152/tools/.gitignore b/configs/ea3152/tools/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..76268bd4382fe0dbdcd737420f61777124a2c185 --- /dev/null +++ b/configs/ea3152/tools/.gitignore @@ -0,0 +1,2 @@ +/lpchdr +/*.exe diff --git a/configs/ea3152/tools/Makefile b/configs/ea3152/tools/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..3da818658a18e58ccddf1b39ebf8af5584c1b7c7 --- /dev/null +++ b/configs/ea3152/tools/Makefile @@ -0,0 +1,53 @@ +############################################################################ +# configs/ea3152/tools/Makefile +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +OBJS = lpchdr.o crc32.o +BIN = lpchdr + +CFLAGS += -Wall -g + +all: $(BIN) +.PHONY: clean + +$(OBJS): %.o: %.c + $(CC) -c $(CFLAGS) $< -o $@ + +lpchdr: $(OBJS) + $(CC) -o $@ $^ + +clean: + @rm -f $(BIN) *.o *~ + + diff --git a/configs/ea3152/tools/armusbocd.cfg b/configs/ea3152/tools/armusbocd.cfg new file mode 100644 index 0000000000000000000000000000000000000000..5765dda79cf75c09ef671c8b94c7c00ccc3c475d --- /dev/null +++ b/configs/ea3152/tools/armusbocd.cfg @@ -0,0 +1,34 @@ +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +#interface +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG A" +ft2232_layout "olimex-jtag" +ft2232_vid_pid 0x15BA 0x0003 +jtag_speed 2 + +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config trst_and_srst separate + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +#target configuration +daemon_startup reset + +#target +#target arm9ejs +target arm926ejs little run_and_halt 1 arm926ejs +run_and_halt_time 0 30 + +#target_script 0 reset oocd_flash2138.script +working_area 0 0x1102800 0x60000 nobackup + +#flash configuration +#flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v2 12000 calc_checksum + +# For more information about the configuration files, take a look at: +# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger diff --git a/configs/ea3152/tools/crc32.c b/configs/ea3152/tools/crc32.c new file mode 100644 index 0000000000000000000000000000000000000000..d1ff72beaaf1a261ccc4380926551ba9c0c53ace --- /dev/null +++ b/configs/ea3152/tools/crc32.c @@ -0,0 +1,123 @@ +/************************************************************************************************ + * configs/ea3152/tools/crc32.c + * + * This file is a part of NuttX: + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * + * The logic in this file was developed by Gary S. Brown: + * + * COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or code or tables + * extracted from it, as desired without restriction. + * + * First, the polynomial itself and its table of feedback terms. The polynomial is: + * + * X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0 + * + * Note that we take it "backwards" and put the highest-order term in the lowest-order bit. + * The X^32 term is "implied"; the LSB is the X^31 term, etc. The X^0 term (usually shown + * as "+1") results in the MSB being 1 + * + * Note that the usual hardware shift register implementation, which is what we're using + * (we're merely optimizing it by doing eight-bit chunks at a time) shifts bits into the + * lowest-order term. In our implementation, that means shifting towards the right. Why + * do we do it this way? Because the calculated CRC must be transmitted in order from + * highest-order term to lowest-order term. UARTs transmit characters in order from LSB + * to MSB. By storing the CRC this way we hand it to the UART in the order low-byte to + * high-byte; the UART sends each low-bit to hight-bit; and the result is transmission bit + * by bit from highest- to lowest-order term without requiring any bit shuffling on our + * part. Reception works similarly + * + * The feedback terms table consists of 256, 32-bit entries. Notes + * + * - The table can be generated at runtime if desired; code to do so is shown later. It + * might not be obvious, but the feedback terms simply represent the results of eight + * shift/xor operations for all combinations of data and CRC register values + * + * - The values must be right-shifted by eight bits by the updcrc logic; the shift must + * be u_(bring in zeroes). On some hardware you could probably optimize the shift in + * assembler by using byte-swap instructions polynomial $edb88320 + ************************************************************************************************/ + +/************************************************************************************************ + * Included Files + ************************************************************************************************/ + +#include +#include +#include "lpchdr.h" + +/************************************************************************************************ + * Private Data + ************************************************************************************************/ + +static const uint32_t crc32_tab[] = +{ + 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, + 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, + 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, + 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5, + 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, + 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, + 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f, + 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, + 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, + 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, + 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, + 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, + 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, + 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, + 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, + 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, + 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, + 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, + 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, + 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, + 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, + 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79, + 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, + 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, + 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, + 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, + 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, + 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, + 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, + 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, + 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, + 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d +}; + +/************************************************************************************************ + * Public Functions + ************************************************************************************************/ +/************************************************************************************************ + * Name: crc32part + * + * Description: + * Continue CRC calculation on a part of the buffer. + * + ************************************************************************************************/ + +uint32_t crc32part(const uint8_t *src, size_t len, uint32_t crc32val) +{ + size_t i; + + for (i = 0; i < len; i++) + { + crc32val = crc32_tab[(crc32val ^ src[i]) & 0xff] ^ (crc32val >> 8); + } + return crc32val; +} + +/************************************************************************************************ + * Name: crc32 + * + * Description: + * Return a 32-bit CRC of the contents of the 'src' buffer, length 'len' + * + ************************************************************************************************/ + +uint32_t crc32(const uint8_t *src, size_t len) +{ + return crc32part(src, len, 0); +} diff --git a/configs/ea3152/tools/jlink.cfg b/configs/ea3152/tools/jlink.cfg new file mode 100644 index 0000000000000000000000000000000000000000..f5ff7c7be3c0f41e2690cc7b56982b43b8180bbd --- /dev/null +++ b/configs/ea3152/tools/jlink.cfg @@ -0,0 +1,8 @@ +# +# Segger J-Link +# +# http://www.segger.com/jlink.html +# + +interface jlink + diff --git a/configs/ea3152/tools/lpc3152.cfg b/configs/ea3152/tools/lpc3152.cfg new file mode 100644 index 0000000000000000000000000000000000000000..8b63ce61de62cb4368c817bdecaa61989ac9e996 --- /dev/null +++ b/configs/ea3152/tools/lpc3152.cfg @@ -0,0 +1,78 @@ +###################################### +# Target: NXP lpc3152 +###################################### + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lpc3152 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +# ARM926EJS core +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x07926f0f +} + +# Scan Tap +# Wired to seperate STDO pin on the lpc3152, externally muxed to TDO on ea3152 module +# JTAGSEL pin must be 0 to activate, which reassigns arm tdo to a pass through. +if { [info exists SJCTAPID ] } { + set _SJCTAPID $SJCTAPID +} else { + set _SJCTAPID 0x1392e02b +} + +#jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID +jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_SJCTAPID +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +################################################################## +# various symbol definitions, to avoid hard-wiring addresses +################################################################## + +global lpc315x +set lpc315x [ dict create ] + +# Physical addresses for controllers and memory +dict set lpc315x sram0 0x11028000 +dict set lpc315x sram1 0x11040000 +dict set lpc315x uart 0x15001000 +dict set lpc315x cgu 0x13004000 +dict set lpc315x ioconfig 0x13003000 +dict set lpc315x sysconfig 0x13002800 +dict set lpc315x wdt 0x13002400 + +################################################################## +# Target configuration +################################################################## + +jtag_nsrst_delay 1000 +jtag_ntrst_delay 0 + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME + +$_TARGETNAME invoke-event halted + +$_TARGETNAME configure -work-area-phys [dict get $lpc315x sram0] -work-area-size 0x30000 -work-area-backup 0 + +$_TARGETNAME configure -event reset-init { + echo "\nRunning reset init script for LPC3152\n" + halt + wait_halt + reg cpsr 0xa00000d3 ;#Supervisor mode + reg pc 0x11029000 + poll + sleep 500 +} + +arm7_9 fast_memory_access enable +arm7_9 dcc_downloads enable diff --git a/configs/ea3152/tools/lpchdr.c b/configs/ea3152/tools/lpchdr.c new file mode 100644 index 0000000000000000000000000000000000000000..a77be90016d2d327644637fe0323b5b8a73a2434 --- /dev/null +++ b/configs/ea3152/tools/lpchdr.c @@ -0,0 +1,297 @@ +/************************************************************************************ + * configs/ea3152/tools/lpchdr.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "lpchdr.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define IO_BUF_SIZE 1024 +#define HDR_SIZE 0x80 +#define HDR_CRC_SIZE 0x6c + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static const char *g_infile; +static const char *g_outfile; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +static void show_usage(const char *progname, int exitcode) +{ + fprintf(stderr, "%s -o \n", progname); + exit(exitcode); +} + +static void parse_args(int argc, char **argv) +{ + int ch; + + while ((ch = getopt(argc, argv, ":o:")) >= 0) + { + switch (ch) + { + case 'o': + g_outfile = optarg; + break; + + case ':': + fprintf(stderr, "Missing option argumen\n"); + show_usage(argv[0], 1); + + case '?': + default: + fprintf(stderr, "Unrecognized option\n"); + show_usage(argv[0], 1); + } + } + + if (optind >= argc) + { + fprintf(stderr, "Missing binary input file name\n"); + show_usage(argv[0], 1); + } + + g_infile = argv[optind]; + optind++; + + if (optind < argc) + { + fprintf(stderr, "Garbage at the end of the command line\n"); + show_usage(argv[0], 1); + } +} + +static inline uint32_t infilecrc32(int infd, size_t len, size_t padlen) +{ + off_t offset; + uint8_t buffer[IO_BUF_SIZE]; + ssize_t nbytes; + size_t bytesread; + uint32_t crc; + + offset = lseek(infd, 0, SEEK_SET); + if (offset == (off_t)-1) + { + fprintf(stderr, "lseek failed: %s\n", strerror(errno)); + exit(4); + } + + crc = 0; + for (bytesread = 0; bytesread < len; bytesread += nbytes) + { + nbytes = read(infd, buffer, IO_BUF_SIZE); + if (nbytes < 0) + { + fprintf(stderr, "read failed: %s\n", strerror(errno)); + exit(4); + } + else if (nbytes == 0) + { + fprintf(stderr, "Unexpected end-of-file: %s\n", strerror(errno)); + exit(4); + } + else + { + crc = crc32part(buffer, nbytes, crc); + } + } + + /* Add the zero-padding at the end of the binary in the CRC */ + + memset(buffer, 0, IO_BUF_SIZE); + return crc32part(buffer, padlen, crc); +} + +static inline void writefile(int infd, int outfd, size_t len, size_t padlen) +{ + off_t offset; + uint8_t buffer[IO_BUF_SIZE]; + ssize_t nbytesread; + ssize_t nbyteswritten; + size_t totalread; + + offset = lseek(infd, 0, SEEK_SET); + if (offset == (off_t)-1) + { + fprintf(stderr, "lseek failed: %s\n", strerror(errno)); + exit(4); + } + + for (totalread = 0; totalread < len; totalread += nbytesread) + { + nbytesread = read(infd, buffer, IO_BUF_SIZE); + if (nbytesread < 0) + { + fprintf(stderr, "read failed: %s\n", strerror(errno)); + exit(4); + } + else if (nbytesread == 0) + { + fprintf(stderr, "Unexpected end-of-file: %s\n", strerror(errno)); + exit(4); + } + else + { + nbyteswritten = write(outfd, buffer, nbytesread); + if (nbyteswritten < 0) + { + fprintf(stderr, "write failed: %s\n", strerror(errno)); + exit(4); + } + else if (nbyteswritten != nbytesread) + { + fprintf(stderr, "Short writes not handled\n"); + exit(4); + } + } + } + + /* Write the zero-padding at the end of the binary */ + + memset(buffer, 0, IO_BUF_SIZE); + nbyteswritten = write(outfd, buffer, padlen); + if (nbyteswritten < 0) + { + fprintf(stderr, "write failed: %s\n", strerror(errno)); + exit(4); + } + else if (nbyteswritten != padlen) + { + fprintf(stderr, "Short writes not handled\n"); + exit(4); + } +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +int main(int argc, char **argv, char **envp) +{ + struct lpc31_header_s g_hdr; + struct stat buf; + ssize_t nbytes; + size_t padlen; + int infd; + int outfd; + int ret; + + /* Parse arguments */ + + parse_args(argc, argv); + + /* Open files */ + + infd = open(g_infile, O_RDONLY); + if (infd < 0) + { + fprintf(stderr, "Failed to open %s for reading: %s\n", g_infile, strerror(errno)); + exit(2); + } + + outfd = open(g_outfile, O_WRONLY|O_CREAT|O_TRUNC, 0644); + if (outfd < 0) + { + fprintf(stderr, "Failed to open %s for writing: %s\n", g_outfile, strerror(errno)); + exit(2); + } + + /* Get the size of the binary file */ + + ret = fstat(infd, &buf); + if (ret < 0) + { + fprintf(stderr, "stat of %s failed: %s\n", g_infile, strerror(errno)); + exit(3); + } + + /* Initialize the header */ + + memset(&g_hdr, 0, sizeof(struct lpc31_header_s)); + g_hdr.vector = 0xea00001e; /* b 0x11029080 */ + g_hdr.magic = 0x41676d69; +#if 1 /* CRC doesn't seem to be functional */ + g_hdr.imageType = 0x0000000a; +#else + g_hdr.imageType = 0x0000000b; +#endif + g_hdr.imageLength = (buf.st_size + sizeof(struct lpc31_header_s) + 511) & ~0x1ff; + + /* This is how much we must pad at the end of the binary image. */ + + padlen = g_hdr.imageLength - buf.st_size; + + /* Calculate CRCs */ + + g_hdr.execution_crc32 = infilecrc32(infd, buf.st_size, padlen); + g_hdr.header_crc32 = crc32((const uint8_t*)&g_hdr, HDR_CRC_SIZE); + + /* Write the header */ + + nbytes = write(outfd, &g_hdr, HDR_SIZE); + if (nbytes != 0x80) + { + fprintf(stderr, "write of header to of %s failed: %s\n", g_outfile, strerror(errno)); + exit(4); + } + + /* Copy the input file to the output */ + + writefile(infd, outfd, buf.st_size, padlen); + close(infd); + close(outfd); + return 0; +} + + diff --git a/configs/ea3152/tools/lpchdr.h b/configs/ea3152/tools/lpchdr.h new file mode 100644 index 0000000000000000000000000000000000000000..f204df977d205eca727cbb55f4e47aa35fdfd7d7 --- /dev/null +++ b/configs/ea3152/tools/lpchdr.h @@ -0,0 +1,105 @@ +/************************************************************************************ + * configs/ea3152/tools/lpchdr.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_EA3152_TOOLS_LPCHDR_H +#define __CONFIGS_EA3152_TOOLS_LPCHDR_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +struct lpc31_header_s +{ + /* OFFS DESCRIPTION */ + uint32_t vector; /* 0x00 Valid ARM instruction. Usually this will be + * a branch instruction to entry point of the + * image. */ + uint32_t magic; /* 0x04 This field is used by boot ROM to detect a + * valid image header. This field should always + * be set to 0x41676d69. */ + uint32_t execution_crc32; /* 0x08 CRC32 value of execution part of the image. If + * the ‘image_type’ is set to ‘0xA’, this field + * is ignored by boot ROM. */ + uint32_t Reserved0[4]; /* 0x0c-0x18: Should be zero. */ + uint32_t imageType; /* 0x1c Specifies whether CRC check should be done + * on the image or not: + * 0xA – No CRC check required. + * 0xB – Do CRC32 check on both header and + * execution part of the image. */ + uint32_t imageLength; /* 0x20 Total image length including header rounded + * up to the nearest 512 byte boundary. In C + * language the field can be computed as: + * imageLength = (Actual length + 511) & ~0x1FF; */ + uint32_t releaseID; /* 0x24 Release or version number of the image. Note, + * this field is not used by boot ROM but is + * provided to track the image versions. */ + uint32_t buildTime; /* 0x28 Time (expressed in EPOC time format) at which + * image is built. Note, this field is not used + * by boot ROM but is provided to track the image + * versions. */ + uint32_t sbzBootParameter; /* 0x2c hould be zero. */ + uint32_t cust_reserved[15]; /* 0x30-0x68: Reserved for customer use (60 bytes) */ + uint32_t header_crc32; /* 0x6c CRC32 value of the header (bytes 0x00 to 0x6C + * of the image). If the ‘image_type’ is set + * to ‘0xA’, this field is ignored by boot ROM. */ + uint32_t Reserved1[4]; /* 0x70-0x7c: Should be zero. */ + /* 0x80 Start of program code (128Kb max). The final + * image has to be padded to the nearest 512 + * byte boundary */ +}; + +/************************************************************************************ + * Public data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +extern uint32_t crc32part(const uint8_t *src, size_t len, uint32_t crc32val); +extern uint32_t crc32(const uint8_t *src, size_t len); + +#endif /* __CONFIGS_EA3152_TOOLS_LPCHDR_H */ + diff --git a/configs/ea3152/tools/mklpc.sh b/configs/ea3152/tools/mklpc.sh new file mode 100644 index 0000000000000000000000000000000000000000..282c56f64954088aef30902261617f855ebe1def --- /dev/null +++ b/configs/ea3152/tools/mklpc.sh @@ -0,0 +1,60 @@ +#!/bin/sh + +# This script lies in sub-directory configs/ea3152/tools but make be executed +# from either that directory or TOPDIR + +MYNAME=`basename $0` +if [ -x "$PWD/$MYNAME" ]; then + TOPDIR="$PWD/../../.." +else + if [ -x "$PWD/configs/ea3152/tools/$MYNAME" ]; then + TOPDIR="$PWD" + else + echo "This script must be executed from a known director" + exit 1 + fi +fi +echo "TOOLDIR: $TOOLDIR" + +# The lpchdr could be named lpchdr.exe if we are running under Cygwin or +# just lpchdr under Linux + +TOOLDIR=$TOPDIR/configs/ea3152/tools + +if [ ! -d "$TOOLDIR" ]; then + echo "Tool directory $TOOLDIR does not exist" + exit 1 +fi + +if [ -x "$TOOLDIR/lpchdr.exe" ]; then + LPCHDR="$TOOLDIR/lpchdr.exe" +else + if [ -x "$TOOLDIR/lpchdr" ]; then + LPCHDR="$TOOLDIR/lpchdr" + else + echo "lpchdr executable does not exist in $TOODIR" + echo " - cd $TOOLDIR" + echo " - make" + fi +fi +echo "LPCHDR: $LPCHDR" + +# Now get the path to the NuttX executable + +NUTTXPATH="$TOPDIR/nuttx.bin" + +if [ ! -f "$NUTTXPATH" ]; then + echo "NuttX binary does not exist at $NUTTXPATH" + echo " - cd $TOPDIR" + echo " - make" + exit 1 +fi +echo "NUTTXPATH: $NUTTXPATH" + +# Create the binary + +echo "COMMAND: $LPCHDR -o $TOPDIR/nuttx.lpc $NUTTXPATH" +"$LPCHDR" -o "$TOPDIR/nuttx.lpc" "$NUTTXPATH" || \ + { echo "$LPCHDR failed" ; exit 1 ; } +echo "Successfully created binary" + diff --git a/configs/ea3152/tools/olimex-arm-usb-ocd.cfg b/configs/ea3152/tools/olimex-arm-usb-ocd.cfg new file mode 100644 index 0000000000000000000000000000000000000000..ef29647080cd516c376f69cefc52963d938efab1 --- /dev/null +++ b/configs/ea3152/tools/olimex-arm-usb-ocd.cfg @@ -0,0 +1,12 @@ +# +# Olimex ARM-USB-OCD +# +# http://www.olimex.com/dev/arm-usb-ocd.html +# + +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG B" +ft2232_layout olimex-jtag +ft2232_vid_pid 0x15ba 0x0003 + +#jtag_khz 600 diff --git a/configs/ea3152/tools/oocd.sh b/configs/ea3152/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..1a137b0fdf40d7909e2df199d480aa3beaaf6bc4 --- /dev/null +++ b/configs/ea3152/tools/oocd.sh @@ -0,0 +1,169 @@ +#!/bin/sh + +# Get command line parameters + +USAGE="USAGE: $0 [-dhjo14] " +ADVICE="Try '$0 -h' for more information" + +INTERFACE=Olimex +OPENOCD=0.1.0 + +while [ ! -z "$1" ]; do + case $1 in + -d ) + set -x + ;; + -j ) + INTERFACE=Jlink + ;; + -o ) + INTERFACE=Olimex + ;; + -1 ) + OPENOCD=0.1.0 + ;; + -4 ) + OPENOCD=0.4.0 + ;; + -h ) + echo "$0 is a tool for generation of proper version files for the NuttX build" + echo "" + echo $USAGE + echo "" + echo "Where:" + echo " -d" + echo " Enable script debug" + echo " -h" + echo " show this help message and exit" + echo " -j" + echo " Use the Segger J-link interface" + echo " -o" + echo " Use the Olimex ARM USB OCD interface (Default)" + echo " -1" + echo " Use the Olimex GCCFD OpenOCD 0.1.0 (Default)" + echo " -4" + echo " Use the OpenOCD 0.4.0" + echo " " + echo " The full path to the top-level NuttX directory" + exit 0 + ;; + * ) + break; + ;; + esac + shift +done + +TOPDIR=$1 +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + echo $ADVICE + exit 1 +fi + +############################################################################### +# OpenOCD 0.4.0 ############################################################### +############################################################################### +# This script *probably* only works with the following versions of OpenOCD: + +if [ "X${OPENOCD}" = "X0.4.0" ]; then + + # Local search directory and configurations + + OPENOCD_SEARCHDIR="${TOPDIR}/configs/ea3152/tools" + OPENOCD_WSEARCHDIR="`cygpath -w ${OPENOCD_SEARCHDIR}`" + + if [ "X${INTERFACE}" = "XJlink" ]; then + OPENOCD_PATH="/cygdrive/c/Program Files (x86)/OpenOCD/0.4.0/bin" + OPENOCD_EXE=openocd.exe + OPENOCD_INTERFACE="jlink.cfg" + else + OPENOCD_PATH="/cygdrive/c/OpenOCD/openocd-0.4.0/src" + OPENOCD_EXE=openocd.exe + OPENOCD_INTERFACE="olimex-arm-usb-ocd.cfg" + fi + + OPENOCD_TARGET="lpc3152.cfg" + OPENOCD_ARGS="-s ${OPENOCD_WSEARCHDIR} -f ${OPENOCD_INTERFACE} -f ${OPENOCD_TARGET}" + + echo "Trying OpenOCD 0.4.0 path: ${OPENOCD_PATH}/${OPENOCD_EXE}" + + # Verify that everything is what it claims it is and is located where it claims it is. + + if [ ! -x "${OPENOCD_PATH}/${OPENOCD_EXE}" ]; then + echo "OpenOCD executable does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 + fi + if [ ! -f "${OPENOCD_SEARCHDIR}/${OPENOCD_TARGET}" ]; then + echo "OpenOCD target config file does not exist: ${OPENOCD_SEARCHDIR}/${OPENOCD_TARGET}" + exit 1 + fi + if [ ! -f "${OPENOCD_SEARCHDIR}/${OPENOCD_INTERFACE}" ]; then + echo "OpenOCD interface config file does not exist: ${OPENOCD_SEARCHDIR}/${OPENOCD_INTERFACE}" + exit 1 + fi + +############################################################################### + +############################################################################### +# Older OpenOCD that Shipped with the ARM-OCD JTAG ############################ +############################################################################### + +else + if [ "X${OPENOCD}" = "X0.1.0" ]; then + + OPENOCD_PATH="/cygdrive/c/gccfd/openocd/bin" + OPENOCD_EXE=openocd-ftd2xx.exe + + echo "Trying GCCFD OpenOCD 0.1.0 path: ${OPENOCD_PATH}/${OPENOCD_EXE}" + + # Local search directory and configurations + + if [ "X${INTERFACE}" = "XJlink" ]; then + echo "The Olimex OpenOCD doesn't support J-Link" + exit 1 + fi + + OPENOCD_CFG="${TOPDIR}/configs/ea3152/tools/armusbocd.cfg" + OPENOCD_ARGS="-f `cygpath -w ${OPENOCD_CFG}`" + + # Verify that everything is what it claims it is and is located where it claims it is. + + if [ ! -f ${OPENOCD_CFG} ]; then + echo "OpenOCD config file does not exist: ${OPENOCD_CFG}" + exit 1 + fi + if [ ! -x "${OPENOCD_PATH}/${OPENOCD_EXE}" ]; then + echo "OpenOCD executable does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 + fi + if [ ! -d "${OPENOCD_PATH}" ]; then + echo "OpenOCD path does not exist: ${OPENOCD_PATH}" + exit 1 + fi + if [ ! -f ${OPENOCD_CFG} ]; then + echo "OpenOCD config file does not exist: ${OPENOCD_CFG}" + exit 1 + fi + else + echo "Unsupported OpenOCD version" + echo $ADVICE + exit 1 + fi +fi + +# Enable debug if so requested + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +# Okay... do it! + +echo "Starting OpenOCD" +"${OPENOCD_PATH}/${OPENOCD_EXE}" ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" diff --git a/configs/ea3152/tools/usb-driver.txt b/configs/ea3152/tools/usb-driver.txt new file mode 100644 index 0000000000000000000000000000000000000000..83d7598a5569e5b386da7281f201cfa2f6441ed7 --- /dev/null +++ b/configs/ea3152/tools/usb-driver.txt @@ -0,0 +1,25 @@ +https://www.olimex.com/dev/pdf/ARM/JTAG/Repair%20Procedure%20for%20OpenOcd-Rev.%20G%20drivers.pdf + +Repair procedure for ARM-USB-OCD drivers + +1. Uninstalling ARM-USB-OCD drivers +------------------------------------- +1.1. Connect your programmer/debugger to your computer, open Device Manager + and uninstall the drivers for ARM-USB-OCD. +1.2. After you have uninstalled ARM-USB-TINY driver from Device Manager, + disconnect the programmer from your computer. +1.3. Now you should download FTClean.exe from here: + http://www.ftdichip.com/Support/Utilities/FTClean.zip. +1.4. After download is complete extract the "*.zip" file, open folder FTClean, + and run FTClean.exe +1.5. Ror VID (Hex) select "Other". And after that fill the first box with 15ba + and "PID (Hex)" with 0004. +1.6. Press "Clean System" button. Make sure that all FTDI devices are + disconnected. (My require administrator privileges). + +2. Re-installing the ARM-USB-OCD driver +--------------------------------------- +2.1 Connect the programmer/debugger to the computer. +2.2 When prompted, browse to the C:\gccfd\DRIVERS\ARM-USB-OCD-DRIVER + directory and install. (A different driver is required for OpenOCD + 0.4.0. That driver is available from the olimex.com web site). diff --git a/configs/eagle100/Kconfig b/configs/eagle100/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..171058d4b460de7a074456a84e62840213531db8 --- /dev/null +++ b/configs/eagle100/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_EAGLE100 +endif diff --git a/configs/eagle100/README.txt b/configs/eagle100/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..0b970355d75cdce23658bc851054f08ab9725d03 --- /dev/null +++ b/configs/eagle100/README.txt @@ -0,0 +1,444 @@ +README +^^^^^^ + +README file for the Microment Eagle100 NuttX port. + +References: +^^^^^^^^^^ + + Micromint: http://www.micromint.com/ + Luminary: http://www.luminarymicro.com/ + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment because the Luminary FLASH programming application was used for + writing to FLASH and this application works only under Windows. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the multiple toolchain + options including: + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery or devkitARM, you simply need to add one of the following + configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows) and devkitARM are Windows native toolchains. + The CodeSourcey (for Linux) and NuttX buildroot toolchains are Cygwin and/or Linux + native toolchains. There are several limitations to using a Windows based + toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh eagle100/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + When building the buildroot toolchain, either (1) modify the + cortexm3-eabi-defconfig-4.6.3 configuration to use EABI (using + 'make menuconfig'), or (2) use an exising OABI configuration such + as cortexm3-defconfig-4.3.3 + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +Ethernet-Bootloader +^^^^^^^^^^^^^^^^^^^ + + Here are some notes about using the Luminary Ethernet boot-loader built + into the Eagle-100 board. + + Built-In Application: + + - The board has no fixed IP address but uses DHCP to get an address. + I used a D-link router; I can use a web browser to surf to the D-link + web page to get the address assigned by + + - Then you can use this IP address in your browser to surf to the Eagle-100 + board. It presents several interesting pages -- the most important is + the page called "Firmware Update". That page includes instructions on + how to download code to the Eagle-100. + + - After you burn the first program, you lose this application. Then you + will probably be better off connected directly to the Eagle-100 board + or through a switch (The router caused problems for me during downloads). + + Using the Ethernet Bootloader: + + - You will need the "LM Flash Programmer application". You can get that + program from the Luminary web site. There is a link on the LM3S6918 page. + + - Is there any documentation for using the bootloader? Yes and No: There + is an application note covering the bootloader on the Luminary site, but + it is not very informative. The Eagle100 User's Manual has the best + information. + + - Are there any special things I have to do in my code, other than setting + the origin to 0x0000:2000 (APP_START_ADDRESS)? No. The bootloader assumes + that you have a vector table at that address . The bootloader does the + following each time it boots (after you have downloaded the first valid + application): + + o The bootloader sets the vector table register to the APP_START_ADDRESS, + o It sets the stack pointer to the address at APP_START_ADDRESS, and then + o Jumps to the address at APP_START_ADDRESS+4. + + - You can force the bootloader to skip starting the application and stay + in the update mode. You will need to do this in order to download a new + application. You force the update mode by holding the user button on the + Eagle-100 board while resetting the board. The user button is GPIOA, pin 6 + (call FORCED_UPDATE_PIN in the bootloader code). + + - Note 1: I had to remove my D-Link router from the configuration in order + to use the LM Flash Programmer (the Bootloader issues BOOTP requests to + communicate with the LM Flash Programmer, my router was responding to + these BOOTP requests and hosing the download). It is safer to connect + via a switch or via an Ethernet switch. + + - Note 2: You don't need the router's DHCPD server in the download + configuration; the Luminary Flash Programmer has the capability of + temporarily assigning the IP address to the Eagle-100 via BOOTP. + +Eagle100-specific Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lm + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LM3S6918 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=eagle100 (for the MicroMint Eagle-100 development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_EAGLE100 + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + There are configurations for disabling support for interrupts GPIO ports. + GPIOH and GPIOJ must be disabled because they do not exist on the LM3S6918. + Additional interrupt support can be disabled if desired to reduce memory + footprint. + + CONFIG_TIVA_GPIOA_IRQS=y + CONFIG_TIVA_GPIOB_IRQS=y + CONFIG_TIVA_GPIOC_IRQS=y + CONFIG_TIVA_GPIOD_IRQS=y + CONFIG_TIVA_GPIOE_IRQS=y + CONFIG_TIVA_GPIOF_IRQS=y + CONFIG_TIVA_GPIOG_IRQS=y + CONFIG_TIVA_GPIOH_IRQS=n << Always + CONFIG_TIVA_GPIOJ_IRQS=n << Always + + LM3S6918 specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + CONFIG_TIVA_SSI0 - Select to ensable support for SSI0 + CONFIG_TIVA_SSI1 - Select to ensable support for SSI1 + CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support. + Poll-waiting is recommended if the interrupt rate would be to + high in the interrupt driven case. + CONFIG_SSI_TXLIMIT - Write this many words to the Tx FIFO before + emptying the Rx FIFO. If the SPI frequency is high and this + value is large, then larger values of this setting may cause + Rx FIFO overrun errors. Default: half of the Tx FIFO size (4). + + CONFIG_TIVA_ETHERNET - This must be set (along with CONFIG_NET) + to build the Stellaris Ethernet driver + CONFIG_TIVA_ETHLEDS - Enable to use Ethernet LEDs on the board. + CONFIG_TIVA_BOARDMAC - If the board-specific logic can provide + a MAC address (via tiva_ethernetmac()), then this should be selected. + CONFIG_TIVA_ETHHDUPLEX - Set to force half duplex operation + CONFIG_TIVA_ETHNOAUTOCRC - Set to suppress auto-CRC generation + CONFIG_TIVA_ETHNOPAD - Set to suppress Tx padding + CONFIG_TIVA_MULTICAST - Set to enable multicast frames + CONFIG_TIVA_PROMISCUOUS - Set to enable promiscuous mode + CONFIG_TIVA_BADCRC - Set to enable bad CRC rejection. + CONFIG_TIVA_DUMPPACKET - Dump each packet received/sent to the console. + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. Each Eagle-100 configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh eagle100/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + +Configuration Sub-Directories +----------------------------- + + nettest: + This configuration directory may be used to enable networking using the + LM3S6918's Ethernet controller. It uses examples/nettest to exercise the + TCP/IP network. + + NOTES: + + 1. This configuration is set to use Cygwin under Windows and the + CodeSourcery toolchain. That, however, is easily reconfigurable: + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_ARM7M_TOOLCHAIN_CODESOURCERYW=y + + httpd: + This builds the uIP web server example using the examples/webserver application + (for execution from FLASH). + + NOTES: + + 1. This configuration is set to use Cygwin under Windows and the + CodeSourcery toolchain. That, however, is easily reconfigurable: + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_ARM7M_TOOLCHAIN_CODESOURCERYW=y + + This example can only be built using the buildroot toolchain + with NXFLAT support + + nsh: + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables only the serial NSH interfaces (the telnet + interface should also be functional, but is not enabled in this + configuration). + + NOTES: + + 1. This configuration is set to use Cygwin under Windows and the + devkitARM toolchain. That, however, is easily reconfigurable: + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_ARM7M_TOOLCHAIN_DEVKITARM=y + + nxflat: + This builds the NXFLAT example at apps/examples/nxfalt. + + NOTES: + + 1. This example can only be built using the NuttX buildroot + toolchain with the NXFLAT tools. + + 2. This configuration is set to use Cygwin under Windows and the + devkitARM toolchain. That, however, is easily reconfigurable: + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_ARM7M_TOOLCHAIN_DEVKITARM=y + + thttpd: + This builds the THTTPD web server example using the THTTPD and + the apps/examples/thttpd application. + + NOTES: + + 1. This configuration is set to use Linux and the buildroot toolchain. + That, however, is easily reconfigurable: + + CONFIG_HOST_LINUX=y + CONFIG_ARM7M_TOOLCHAIN_BUILDROOT=y + + This example can only be built using the buildroot toolchain + with NXFLAT support + + By default, all of these examples are built to be used with the Luminary + Ethernet Bootloader (you can change the ld.script file in any of these + sub-directories to change that configuration). + + diff --git a/configs/eagle100/httpd/Make.defs b/configs/eagle100/httpd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..285185d1e59506943bc82520891cc907f9ebf700 --- /dev/null +++ b/configs/eagle100/httpd/Make.defs @@ -0,0 +1,109 @@ +############################################################################ +# configs/eagle100/httpd/Make.defs +# +# Copyright (C) 2009, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT),y) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/eagle100/httpd/defconfig b/configs/eagle100/httpd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..f894505a3a7d9bca8181e52b26eeee2bd0a20802 --- /dev/null +++ b/configs/eagle100/httpd/defconfig @@ -0,0 +1,753 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +CONFIG_ARCH_CHIP_LM=y +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set + +# +# Stellaris Configuration Options +# +CONFIG_ARCH_CHIP_LM3S6918=y +# CONFIG_ARCH_CHIP_LM3S9B96 is not set +# CONFIG_ARCH_CHIP_LM3S6432 is not set +# CONFIG_ARCH_CHIP_LM3S6965 is not set +# CONFIG_ARCH_CHIP_LM3S8962 is not set +# CONFIG_ARCH_CHIP_LM4F120 is not set +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_TIVA_HAVE_SSI1=y +# CONFIG_LM_REVA2 is not set + +# +# Stellaris Peripheral Support +# +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +CONFIG_TIVA_SSI0=y +# CONFIG_TIVA_SSI1 is not set +CONFIG_TIVA_ETHERNET=y +# CONFIG_TIVA_FLASH is not set + +# +# Disable GPIO Interrupts +# +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +CONFIG_TIVA_GPIOF_IRQS=y +CONFIG_TIVA_GPIOG_IRQS=y +CONFIG_TIVA_GPIOH_IRQS=y +# CONFIG_TIVA_GPIOJ_IRQS is not set + +# +# Stellaris Ethernet Configuration +# +# CONFIG_TIVA_ETHLEDS is not set +CONFIG_TIVA_BOARDMAC=y +# CONFIG_TIVA_ETHHDUPLEX is not set +# CONFIG_TIVA_ETHNOAUTOCRC is not set +# CONFIG_TIVA_ETHNOPAD is not set +# CONFIG_TIVA_MULTICAST is not set +# CONFIG_TIVA_PROMISCUOUS is not set +# CONFIG_TIVA_TIMESTAMP is not set +# CONFIG_TIVA_BADCRC is not set +# CONFIG_M3S_DUMPPACKET is not set + +# +# Stellaris SSI Configuration +# +CONFIG_SSI_POLLWAIT=y +CONFIG_SSI_TXLIMIT=4 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_ADDRENV is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_EAGLE100=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="eagle100" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=20 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="webserver_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=8 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART0=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +CONFIG_NET_IPv4=y +# CONFIG_NET_MULTIBUFFER is not set +# CONFIG_NET_PROMISCUOUS is not set +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set +CONFIG_NET_ETH_MTU=562 +# CONFIG_NET_TCPURGDATA is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set +# CONFIG_NET_IGMP is not set +CONFIG_NET_STATISTICS=y +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_ARPTAB_SIZE=16 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=0 + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_ETHERNET=y + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +CONFIG_EXAMPLES_WEBSERVER=y +CONFIG_EXAMPLES_WEBSERVER_IPADDR=0x0a000002 +CONFIG_EXAMPLES_WEBSERVER_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_WEBSERVER_NETMASK=0xffffff00 +CONFIG_EXAMPLES_WEBSERVER_NOMAC=y +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +CONFIG_NETUTILS_WEBSERVER=y +# CONFIG_NETUTILS_HTTPD_SINGLECONNECT is not set +# CONFIG_NETUTILS_HTTPD_SCRIPT_DISABLE is not set +# CONFIG_NETUTILS_HTTPD_CGIPATH is not set +CONFIG_NETUTILS_HTTPD_ERRPATH="" +# CONFIG_NETUTILS_HTTPD_SERVERHEADER_DISABLE is not set +CONFIG_NETUTILS_HTTPD_TIMEOUT=0 +CONFIG_NETUTILS_HTTPD_CLASSIC=y +# CONFIG_NETUTILS_HTTPD_MMAP is not set +CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/eagle100/httpd/setenv.sh b/configs/eagle100/httpd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..a22e3372ecd7bc0e8839c6303531a5d629f7bad3 --- /dev/null +++ b/configs/eagle100/httpd/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/eagle100/httpd/setenv.sh +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/eagle100/include/board.h b/configs/eagle100/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..b2a652db8f4b47fbdfd1a3c3a6f2a313f976770f --- /dev/null +++ b/configs/eagle100/include/board.h @@ -0,0 +1,127 @@ +/************************************************************************************ + * configs/eagle100/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* RCC settings */ + +#define SYSCON_RCC_XTAL SYSCON_RCC_XTAL8000KHZ /* Eagle100 on-board crystall is 8.00 MHz */ +#define XTAL_FREQUENCY 8000000 + +/* Oscillator source is the main oscillator (not internal, internal/4, 30KHz or + * 30KHz from hibernate module) */ + +#define SYSCON_RCC_OSCSRC SYSCON_RCC_OSCSRC_MOSC +#define SYSCON_RCC2_OSCSRC SYSCON_RCC2_OSCSRC2_MOSC +#define OSCSRC_FREQUENCY XTAL_FREQUENCY + +/* Use system divider = 4; this corresponds to a system clock frequency + * of (400 / 2) / 4 = 50MHz + */ + +#define TIVA_SYSDIV 4 +#define SYSCLK_FREQUENCY 50000000 /* 50MHz */ + +/* Other RCC settings: + * + * - Main and internal oscillators enabled. + * - PLL and sys dividers not bypassed + * - PLL not powered down + * - No auto-clock gating reset + */ + +#define TIVA_RCC_VALUE (SYSCON_RCC_OSCSRC | SYSCON_RCC_XTAL | SYSCON_RCC_USESYSDIV | SYSCON_RCC_SYSDIV(TIVA_SYSDIV)) + +/* RCC2 settings -- RCC2 not used. Other RCC2 settings + * + * - PLL and sys dividers not bypassed. + * - PLL not powered down + * - Not using RCC2 + */ + +#define TIVA_RCC2_VALUE (SYSCON_RCC2_OSCSRC | SYSCON_RCC2_SYSDIV(TIVA_SYSDIV)) + +/* LED definitions ******************************************************************/ + +/* The Eagle-100 has only one user LED: Port E, Bit 1. Below is the mapping of this + * single LED. From this single LED, we can get the following information: + * + * OFF Steady: The system has failed to boot to the point of enabling interrupts + * ON Steady: The systems has enabled interrupts, but none have been received + * Dull glow: The system is taking interrupts + * Slow blinking: The system has panicked + */ + /* ON OFF */ +#define LED_STARTED 0 /* OFF OFF */ +#define LED_HEAPALLOCATE 1 /* OFF OFF */ +#define LED_IRQSENABLED 2 /* ON ON */ +#define LED_STACKCREATED 3 /* ON ON */ +#define LED_INIRQ 4 /* ON OFF */ +#define LED_SIGNAL 5 /* ON OFF */ +#define LED_ASSERTION 6 /* ON OFF */ +#define LED_PANIC 7 /* ON OFF */ + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Stellaris architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/eagle100/nettest/Make.defs b/configs/eagle100/nettest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..93d96b81d5d8fa556ae77ae4dccaaa8f3de432fa --- /dev/null +++ b/configs/eagle100/nettest/Make.defs @@ -0,0 +1,110 @@ +############################################################################ +# configs/eagle100/nettest/Make.defs +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT),y) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/eagle100/nettest/defconfig b/configs/eagle100/nettest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..aaf5566121d9375d92dc188c1c6f307685bf455f --- /dev/null +++ b/configs/eagle100/nettest/defconfig @@ -0,0 +1,875 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +CONFIG_ARCH_CHIP_LM=y +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +CONFIG_ARCH_CHIP_LM3S6918=y +# CONFIG_ARCH_CHIP_LM3S9B96 is not set +# CONFIG_ARCH_CHIP_LM3S6432 is not set +# CONFIG_ARCH_CHIP_LM3S6965 is not set +# CONFIG_ARCH_CHIP_LM3S8962 is not set +# CONFIG_ARCH_CHIP_LM4F120 is not set +CONFIG_ARCH_CHIP_LM3S=y +# CONFIG_LM_REVA2 is not set +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +# CONFIG_TIVA_HAVE_ADC0 is not set +# CONFIG_TIVA_HAVE_ADC1 is not set +# CONFIG_TIVA_I2C is not set +CONFIG_TIVA_HAVE_I2C1=y +# CONFIG_TIVA_HAVE_I2C2 is not set +# CONFIG_TIVA_HAVE_I2C3 is not set +# CONFIG_TIVA_HAVE_I2C4 is not set +# CONFIG_TIVA_HAVE_I2C5 is not set +# CONFIG_TIVA_HAVE_I2C6 is not set +# CONFIG_TIVA_HAVE_I2C7 is not set +# CONFIG_TIVA_HAVE_I2C8 is not set +# CONFIG_TIVA_HAVE_I2C9 is not set +# CONFIG_TIVA_HAVE_UART3 is not set +# CONFIG_TIVA_HAVE_UART4 is not set +# CONFIG_TIVA_HAVE_UART5 is not set +# CONFIG_TIVA_HAVE_UART6 is not set +# CONFIG_TIVA_HAVE_UART7 is not set +CONFIG_TIVA_HAVE_SSI0=y +CONFIG_TIVA_HAVE_SSI1=y +# CONFIG_TIVA_HAVE_SSI2 is not set +# CONFIG_TIVA_HAVE_SSI3 is not set +CONFIG_TIVA_HAVE_ETHERNET=y +CONFIG_TIVA_SSI=y +# CONFIG_TIVA_TIMER is not set +# CONFIG_TIVA_HAVE_TIMER0 is not set +# CONFIG_TIVA_HAVE_TIMER1 is not set +# CONFIG_TIVA_HAVE_TIMER2 is not set +CONFIG_TIVA_HAVE_TIMER3=y +# CONFIG_TIVA_HAVE_TIMER4 is not set +# CONFIG_TIVA_HAVE_TIMER5 is not set +# CONFIG_TIVA_HAVE_TIMER6 is not set +# CONFIG_TIVA_HAVE_TIMER7 is not set +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +CONFIG_TIVA_SSI0=y +# CONFIG_TIVA_SSI1 is not set +# CONFIG_TIVA_TIMER3 is not set +CONFIG_TIVA_ETHERNET=y +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +CONFIG_TIVA_GPIO_IRQS=y +CONFIG_TIVA_HAVE_GPIOA_IRQS=y +CONFIG_TIVA_HAVE_GPIOB_IRQS=y +CONFIG_TIVA_HAVE_GPIOC_IRQS=y +CONFIG_TIVA_HAVE_GPIOD_IRQS=y +CONFIG_TIVA_HAVE_GPIOE_IRQS=y +CONFIG_TIVA_HAVE_GPIOF_IRQS=y +CONFIG_TIVA_HAVE_GPIOG_IRQS=y +# CONFIG_TIVA_HAVE_GPIOH_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +CONFIG_TIVA_GPIOF_IRQS=y +CONFIG_TIVA_GPIOG_IRQS=y + +# +# Stellaris Ethernet Configuration +# +# CONFIG_TIVA_ETHLEDS is not set +# CONFIG_TIVA_ETHHDUPLEX is not set +# CONFIG_TIVA_ETHNOAUTOCRC is not set +# CONFIG_TIVA_ETHNOPAD is not set +# CONFIG_TIVA_MULTICAST is not set +# CONFIG_TIVA_PROMISCUOUS is not set +# CONFIG_TIVA_TIMESTAMP is not set +# CONFIG_TIVA_BADCRC is not set +# CONFIG_TIVA_DUMPPACKET is not set +CONFIG_TIVA_BOARDMAC=y + +# +# Tiva/Stellaris SSI Configuration +# +CONFIG_SSI_POLLWAIT=y +CONFIG_SSI_TXLIMIT=4 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_EAGLE100=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="eagle100" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=20 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nettest_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_NETTEST=y +# CONFIG_EXAMPLES_NETTEST_SERVER is not set +# CONFIG_EXAMPLES_NETTEST_PERFORMANCE is not set +CONFIG_EXAMPLES_NETTEST_IPv4=y +CONFIG_EXAMPLES_NETTEST_INIT=y +# CONFIG_EXAMPLES_NETTEST_NOMAC is not set + +# +# IPv4 addresses +# +CONFIG_EXAMPLES_NETTEST_IPADDR=0x0a000002 +CONFIG_EXAMPLES_NETTEST_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_NETTEST_NETMASK=0xffffff00 +CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/eagle100/nettest/setenv.sh b/configs/eagle100/nettest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..71c2c259adc6b16b7152e91b058e1062deadac8c --- /dev/null +++ b/configs/eagle100/nettest/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/eagle100/nettest/setenv.sh +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/eagle100/nsh/Make.defs b/configs/eagle100/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..58144909900e16f2c4184a36eed44139959eb1f5 --- /dev/null +++ b/configs/eagle100/nsh/Make.defs @@ -0,0 +1,110 @@ +############################################################################ +# configs/eagle100/nsh/Make.defs +# +# Copyright (C) 2009, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT),y) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/eagle100/nsh/defconfig b/configs/eagle100/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..03426ceba0669a0153906c8d115ca33317add582 --- /dev/null +++ b/configs/eagle100/nsh/defconfig @@ -0,0 +1,1082 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +CONFIG_ARCH_CHIP_LM=y +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +CONFIG_ARCH_CHIP_LM3S6918=y +# CONFIG_ARCH_CHIP_LM3S9B96 is not set +# CONFIG_ARCH_CHIP_LM3S6432 is not set +# CONFIG_ARCH_CHIP_LM3S6965 is not set +# CONFIG_ARCH_CHIP_LM3S8962 is not set +# CONFIG_ARCH_CHIP_LM4F120 is not set +CONFIG_ARCH_CHIP_LM3S=y +# CONFIG_LM_REVA2 is not set +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +# CONFIG_TIVA_HAVE_ADC0 is not set +# CONFIG_TIVA_HAVE_ADC1 is not set +# CONFIG_TIVA_I2C is not set +CONFIG_TIVA_HAVE_I2C1=y +# CONFIG_TIVA_HAVE_I2C2 is not set +# CONFIG_TIVA_HAVE_I2C3 is not set +# CONFIG_TIVA_HAVE_I2C4 is not set +# CONFIG_TIVA_HAVE_I2C5 is not set +# CONFIG_TIVA_HAVE_I2C6 is not set +# CONFIG_TIVA_HAVE_I2C7 is not set +# CONFIG_TIVA_HAVE_I2C8 is not set +# CONFIG_TIVA_HAVE_I2C9 is not set +# CONFIG_TIVA_HAVE_UART3 is not set +# CONFIG_TIVA_HAVE_UART4 is not set +# CONFIG_TIVA_HAVE_UART5 is not set +# CONFIG_TIVA_HAVE_UART6 is not set +# CONFIG_TIVA_HAVE_UART7 is not set +CONFIG_TIVA_HAVE_SSI0=y +CONFIG_TIVA_HAVE_SSI1=y +# CONFIG_TIVA_HAVE_SSI2 is not set +# CONFIG_TIVA_HAVE_SSI3 is not set +CONFIG_TIVA_HAVE_ETHERNET=y +CONFIG_TIVA_SSI=y +# CONFIG_TIVA_TIMER is not set +# CONFIG_TIVA_HAVE_TIMER0 is not set +# CONFIG_TIVA_HAVE_TIMER1 is not set +# CONFIG_TIVA_HAVE_TIMER2 is not set +CONFIG_TIVA_HAVE_TIMER3=y +# CONFIG_TIVA_HAVE_TIMER4 is not set +# CONFIG_TIVA_HAVE_TIMER5 is not set +# CONFIG_TIVA_HAVE_TIMER6 is not set +# CONFIG_TIVA_HAVE_TIMER7 is not set +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +CONFIG_TIVA_SSI0=y +# CONFIG_TIVA_SSI1 is not set +# CONFIG_TIVA_TIMER3 is not set +CONFIG_TIVA_ETHERNET=y +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +CONFIG_TIVA_GPIO_IRQS=y +CONFIG_TIVA_HAVE_GPIOA_IRQS=y +CONFIG_TIVA_HAVE_GPIOB_IRQS=y +CONFIG_TIVA_HAVE_GPIOC_IRQS=y +CONFIG_TIVA_HAVE_GPIOD_IRQS=y +CONFIG_TIVA_HAVE_GPIOE_IRQS=y +CONFIG_TIVA_HAVE_GPIOF_IRQS=y +CONFIG_TIVA_HAVE_GPIOG_IRQS=y +# CONFIG_TIVA_HAVE_GPIOH_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +CONFIG_TIVA_GPIOF_IRQS=y +CONFIG_TIVA_GPIOG_IRQS=y + +# +# Stellaris Ethernet Configuration +# +# CONFIG_TIVA_ETHLEDS is not set +# CONFIG_TIVA_ETHHDUPLEX is not set +# CONFIG_TIVA_ETHNOAUTOCRC is not set +# CONFIG_TIVA_ETHNOPAD is not set +# CONFIG_TIVA_MULTICAST is not set +# CONFIG_TIVA_PROMISCUOUS is not set +# CONFIG_TIVA_TIMESTAMP is not set +# CONFIG_TIVA_BADCRC is not set +# CONFIG_TIVA_DUMPPACKET is not set +CONFIG_TIVA_BOARDMAC=y + +# +# Tiva/Stellaris SSI Configuration +# +CONFIG_SSI_POLLWAIT=y +CONFIG_SSI_TXLIMIT=4 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_EAGLE100=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="eagle100" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=13 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/eagle100/nsh/setenv.sh b/configs/eagle100/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..decabe3812ca090f514414fc018a0411d1006fa8 --- /dev/null +++ b/configs/eagle100/nsh/setenv.sh @@ -0,0 +1,62 @@ +#!/bin/bash +# configs/eagle100/nsh/setenv.sh +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/eagle100/nxflat/Make.defs b/configs/eagle100/nxflat/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..a3ded7f0c44dae87e158bf6ceb2beaaa21a73254 --- /dev/null +++ b/configs/eagle100/nxflat/Make.defs @@ -0,0 +1,109 @@ +############################################################################ +# configs/eagle100/nxflat/Make.defs +# +# Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT),y) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/eagle100/nxflat/defconfig b/configs/eagle100/nxflat/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ee72ff1b14d72651b167106188be44c282368d8a --- /dev/null +++ b/configs/eagle100/nxflat/defconfig @@ -0,0 +1,686 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +CONFIG_ARCH_CHIP_LM=y +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARCH_HAVE_FPU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set + +# +# Tiva/Stellaris Configuration Options +# +CONFIG_ARCH_CHIP_LM3S6918=y +# CONFIG_ARCH_CHIP_LM3S9B96 is not set +# CONFIG_ARCH_CHIP_LM3S6432 is not set +# CONFIG_ARCH_CHIP_LM3S6965 is not set +# CONFIG_ARCH_CHIP_LM3S8962 is not set +# CONFIG_ARCH_CHIP_LM4F120 is not set +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_TIVA_HAVE_SSI1=y +# CONFIG_LM_REVA2 is not set + +# +# Tiva/Stellaris Peripheral Support +# +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +CONFIG_TIVA_SSI0=y +# CONFIG_TIVA_SSI1 is not set +# CONFIG_TIVA_ETHERNET is not set +# CONFIG_TIVA_FLASH is not set + +# +# Disable GPIO Interrupts +# +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +CONFIG_TIVA_GPIOF_IRQS=y +CONFIG_TIVA_GPIOG_IRQS=y +CONFIG_TIVA_GPIOH_IRQS=y +# CONFIG_TIVA_GPIOJ_IRQS is not set + +# +# Tiva/Stellaris SSI Configuration +# +CONFIG_SSI_POLLWAIT=y +CONFIG_SSI_TXLIMIT=4 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_ADDRENV is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_EAGLE100=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="eagle100" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=6 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="nxflat_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=16 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +CONFIG_NXFLAT=y +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +CONFIG_PIC=y +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +CONFIG_EXAMPLES_NXFLAT=y +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/eagle100/nxflat/setenv.sh b/configs/eagle100/nxflat/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..5ccd8420935e0255afed42b32114d674f41bd0f8 --- /dev/null +++ b/configs/eagle100/nxflat/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/eagle100/nxflat/setenv.sh +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/eagle100/scripts/ld.script b/configs/eagle100/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..0382307696fe3ad51942789fdfc22d4159ccf4f0 --- /dev/null +++ b/configs/eagle100/scripts/ld.script @@ -0,0 +1,118 @@ +/**************************************************************************** + * configs/eagle100/scripts/ld.script + * + * Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LM3S6918 has 256Kb of FLASH beginning at address 0x0000:0000. However, + * if the Eagle100 Ethernet bootloader is used, then the entry point must + * be at the following offset in FLASH (and the size of the FLASH must be + * reduced to 248Kb): + */ + +MEMORY +{ +/* flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K */ + flash (rx) : ORIGIN = 0x00002000, LENGTH = 248K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The LM3S6918 has 64Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/eagle100/src/.gitignore b/configs/eagle100/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/eagle100/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/eagle100/src/Makefile b/configs/eagle100/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..a62eba67b54ad8e7be345545225f381825c30e54 --- /dev/null +++ b/configs/eagle100/src/Makefile @@ -0,0 +1,44 @@ +############################################################################ +# configs/eagle100/src/Makefile +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lm_boot.c lm_leds.c lm_ethernet.c lm_ssi.c +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lm_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/eagle100/src/eagle100.h b/configs/eagle100/src/eagle100.h new file mode 100644 index 0000000000000000000000000000000000000000..70e8771dfe85ac60cd8e305e2f29b5ef4b60d29f --- /dev/null +++ b/configs/eagle100/src/eagle100.h @@ -0,0 +1,91 @@ +/************************************************************************************ + * configs/eagle100/src/eagle100.h + * + * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_EAGLE100_SRC_EAGLE100_H +#define __CONFIGS_EAGLE100_SRC_EAGLE100_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include "chip.h" +#include "tiva_gpio.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* How many SSI modules does this chip support? The LM3S6918 supports 2 SSI + * modules (others may support more -- in such case, the following must be + * expanded). + */ + +#if TIVA_NSSI == 0 +# undef CONFIG_TIVA_SSI0 +# undef CONFIG_TIVA_SSI1 +#elif TIVA_NSSI == 1 +# undef CONFIG_TIVA_SSI1 +#endif + +/* Eagle-100 GPIOs ******************************************************************/ + +/* GPIO for microSD card chip select */ + +#define SDCCS_GPIO (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STDWPU | GPIO_STRENGTH_4MA | \ + GPIO_VALUE_ONE | GPIO_PORTG | 1) +#define LED_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTE | 1) + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: lm_ssidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Eagle100 board. + * + ************************************************************************************/ + +void weak_function lm_ssidev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_EAGLE100_SRC_EAGLE100_H */ + diff --git a/configs/eagle100/src/lm_appinit.c b/configs/eagle100/src/lm_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..6594f5abb1a79d9e825790c5ecd55cf5990494f9 --- /dev/null +++ b/configs/eagle100/src/lm_appinit.c @@ -0,0 +1,145 @@ +/**************************************************************************** + * config/eagle100/src/lm_appinit.c + * + * Copyright (C) 2009, 2012, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "tiva_ssi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_NSH_ARCHINIT +# undef NSH_HAVEUSBDEV +# define NSH_HAVEMMCSD 1 +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 0 +# error "The Eagle100 MMC/SD is on SSI0" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 0 +# endif +# if !defined(CONFIG_NSH_MMCSDSLOTNO) || CONFIG_NSH_MMCSDSLOTNO != 0 +# error "The Eagle100 MMC/SD is on SSI0 slot 0" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#else +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 0 +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +#endif + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef NSH_HAVEMMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + spi = tiva_ssibus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + syslog(LOG_INFO, "Binding SPI port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, CONFIG_NSH_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfuly bound SPI port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); + return OK; +} diff --git a/configs/eagle100/src/lm_boot.c b/configs/eagle100/src/lm_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..f17ab649d366271512227f84b4925956bb1c16ce --- /dev/null +++ b/configs/eagle100/src/lm_boot.c @@ -0,0 +1,92 @@ +/************************************************************************************ + * configs/eagle100/src/lm_boot.c + * + * Copyright (C) 2009-2010, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "eagle100.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Stellaris architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SSI is not disabled, and 2) the weak function + * lm_ssidev_initialize() has been brought into the link. + */ + +/* The Eagle100 microSD CS is on SSI0 */ + +#if defined(CONFIG_TIVA_SSI0) /* || defined(CONFIG_TIVA_SSI1) */ + if (lm_ssidev_initialize) + { + lm_ssidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/eagle100/src/lm_ethernet.c b/configs/eagle100/src/lm_ethernet.c new file mode 100644 index 0000000000000000000000000000000000000000..62f073697c57efecaf0529ff926106ae484dd906 --- /dev/null +++ b/configs/eagle100/src/lm_ethernet.c @@ -0,0 +1,98 @@ +/************************************************************************************ + * configs/eagle100/src/lm_ethernet.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "tiva_ethernet.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_ethernetmac + * + * Description: + * For the Ethernet Eval Kits, the MAC address will be stored in the non-volatile + * USER0 and USER1 registers. If CONFIG_TIVA_BOARDMAC is defined, this function + * will obtain the MAC address from these registers. + * + ************************************************************************************/ + +#ifdef CONFIG_TIVA_BOARDMAC +void tiva_ethernetmac(struct ether_addr *ethaddr) +{ + uint32_t user0; + uint32_t user1; + + /* Get the current value of the user registers */ + + user0 = getreg32(TIVA_FLASH_USERREG0); + user1 = getreg32(TIVA_FLASH_USERREG1); + + nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff); + DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff); + + /* Re-format that MAC address the way that uIP expects to see it */ + + ethaddr->ether_addr_octet[0] = ((user0 >> 0) & 0xff); + ethaddr->ether_addr_octet[1] = ((user0 >> 8) & 0xff); + ethaddr->ether_addr_octet[2] = ((user0 >> 16) & 0xff); + ethaddr->ether_addr_octet[3] = ((user1 >> 0) & 0xff); + ethaddr->ether_addr_octet[4] = ((user1 >> 8) & 0xff); + ethaddr->ether_addr_octet[5] = ((user1 >> 16) & 0xff); +} +#endif diff --git a/configs/eagle100/src/lm_leds.c b/configs/eagle100/src/lm_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..feea1dacf404cf94ebd24872634bf247d8e15ab7 --- /dev/null +++ b/configs/eagle100/src/lm_leds.c @@ -0,0 +1,169 @@ +/**************************************************************************** + * configs/eagle100/src/lm_leds.c + * + * Copyright (C) 2009-2010, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "tiva_gpio.h" +#include "eagle100.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef CONFIG_DEBUG_LEDS +# define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +static uint8_t g_nest; + +/**************************************************************************** + * Name: board_autoled_initialize + * + * Description: + * Initialize on-board LEDs. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + leddbg("Initializing\n"); + + /* Configure Port E, Bit 1 as an output, initial value=OFF */ + + led_dumpgpio("board_autoled_initialize before tiva_configgpio()"); + tiva_configgpio(LED_GPIO); + led_dumpgpio("board_autoled_initialize after tiva_configgpio()"); + g_nest = 0; +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + case LED_STARTED: + case LED_HEAPALLOCATE: + default: + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + g_nest++; + case LED_IRQSENABLED: + case LED_STACKCREATED: + led_dumpgpio("board_autoled_on: before tiva_gpiowrite()"); + tiva_gpiowrite(LED_GPIO, false); + led_dumpgpio("board_autoled_on: after tiva_gpiowrite()"); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + case LED_IRQSENABLED: + case LED_STACKCREATED: + case LED_STARTED: + case LED_HEAPALLOCATE: + default: + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + if (--g_nest <= 0) + { + led_dumpgpio("board_autoled_off: before tiva_gpiowrite()"); + tiva_gpiowrite(LED_GPIO, true); + led_dumpgpio("board_autoled_off: after tiva_gpiowrite()"); + } + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/eagle100/src/lm_ssi.c b/configs/eagle100/src/lm_ssi.c new file mode 100644 index 0000000000000000000000000000000000000000..adc5ad59edec70a4b4becedeeff31a474dc837dc --- /dev/null +++ b/configs/eagle100/src/lm_ssi.c @@ -0,0 +1,147 @@ +/************************************************************************************ + * configs/eagle100/src/lm_ssi.c + * + * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "tiva_gpio.h" +#include "eagle100.h" + +/* The Eagle100 microSD CS is on SSI0 */ + +#if defined(CONFIG_TIVA_SSI0) /* || defined(CONFIG_TIVA_SSI1) */ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SSI_DEBUG /* Define to enable debug */ +#undef SSI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SSI_DEBUG +# define ssidbg lldbg +# ifdef SSI_VERBOSE +# define ssivdbg lldbg +# else +# define ssivdbg(x...) +# endif +#else +# undef SSI_VERBOSE +# define ssidbg(x...) +# define ssivdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef SSI_VERBOSE +# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m) +#else +# define ssi_dumpgpio(m) +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lm_ssidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Eagle100 board. + * + ************************************************************************************/ + +void weak_function lm_ssidev_initialize(void) +{ + /* Configure the SPI-based microSD CS GPIO */ + + ssi_dumpgpio("lm_ssidev_initialize() before tiva_configgpio()"); + tiva_configgpio(SDCCS_GPIO); + ssi_dumpgpio("lm_ssidev_initialize() after tiva_configgpio()"); +} + +/**************************************************************************** + * The external functions, tiva_ssiselect and tiva_ssistatus must be provided + * by board-specific logic. The are implementations of the select and status + * methods SPI interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * All othermethods (including tiva_ssibus_initialize()) are provided by common + * logic. To use this common SPI logic on your board: + * + * 1. Provide tiva_ssiselect() and tiva_ssistatus() functions in your + * board-specific logic. This function will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 2. Add a call to tiva_ssibus_initialize() in your low level initialization + * logic + * 3. The handle returned by tiva_ssibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + if (devid == SPIDEV_MMCSD) + { + /* Assert the CS pin to the card */ + + ssi_dumpgpio("tiva_ssiselect() before tiva_gpiowrite()"); + tiva_gpiowrite(SDCCS_GPIO, !selected); + ssi_dumpgpio("tiva_ssiselect() after tiva_gpiowrite()"); + } +} + +uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + ssidbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} + +#endif /* CONFIG_TIVA_SSI0 || CONFIG_TIVA_SSI1 */ diff --git a/configs/eagle100/thttpd/Make.defs b/configs/eagle100/thttpd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e5405e96bc7598955fa8395769646a959eb4a044 --- /dev/null +++ b/configs/eagle100/thttpd/Make.defs @@ -0,0 +1,109 @@ +############################################################################ +# configs/eagle100/thttpd/Make.defs +# +# Copyright (C) 2009, 2012, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT),y) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/eagle100/thttpd/defconfig b/configs/eagle100/thttpd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..081cb7a9830e7ef8206d2057b45e958cac4d2f44 --- /dev/null +++ b/configs/eagle100/thttpd/defconfig @@ -0,0 +1,900 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +CONFIG_ARCH_CHIP_LM=y +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +CONFIG_ARCH_CHIP_LM3S6918=y +# CONFIG_ARCH_CHIP_LM3S9B96 is not set +# CONFIG_ARCH_CHIP_LM3S6432 is not set +# CONFIG_ARCH_CHIP_LM3S6965 is not set +# CONFIG_ARCH_CHIP_LM3S8962 is not set +# CONFIG_ARCH_CHIP_LM4F120 is not set +CONFIG_ARCH_CHIP_LM3S=y +# CONFIG_LM_REVA2 is not set +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +# CONFIG_TIVA_HAVE_ADC0 is not set +# CONFIG_TIVA_HAVE_ADC1 is not set +# CONFIG_TIVA_I2C is not set +CONFIG_TIVA_HAVE_I2C1=y +# CONFIG_TIVA_HAVE_I2C2 is not set +# CONFIG_TIVA_HAVE_I2C3 is not set +# CONFIG_TIVA_HAVE_I2C4 is not set +# CONFIG_TIVA_HAVE_I2C5 is not set +# CONFIG_TIVA_HAVE_I2C6 is not set +# CONFIG_TIVA_HAVE_I2C7 is not set +# CONFIG_TIVA_HAVE_I2C8 is not set +# CONFIG_TIVA_HAVE_I2C9 is not set +# CONFIG_TIVA_HAVE_UART3 is not set +# CONFIG_TIVA_HAVE_UART4 is not set +# CONFIG_TIVA_HAVE_UART5 is not set +# CONFIG_TIVA_HAVE_UART6 is not set +# CONFIG_TIVA_HAVE_UART7 is not set +CONFIG_TIVA_HAVE_SSI0=y +CONFIG_TIVA_HAVE_SSI1=y +# CONFIG_TIVA_HAVE_SSI2 is not set +# CONFIG_TIVA_HAVE_SSI3 is not set +CONFIG_TIVA_HAVE_ETHERNET=y +CONFIG_TIVA_SSI=y +# CONFIG_TIVA_TIMER is not set +# CONFIG_TIVA_HAVE_TIMER0 is not set +# CONFIG_TIVA_HAVE_TIMER1 is not set +# CONFIG_TIVA_HAVE_TIMER2 is not set +CONFIG_TIVA_HAVE_TIMER3=y +# CONFIG_TIVA_HAVE_TIMER4 is not set +# CONFIG_TIVA_HAVE_TIMER5 is not set +# CONFIG_TIVA_HAVE_TIMER6 is not set +# CONFIG_TIVA_HAVE_TIMER7 is not set +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +CONFIG_TIVA_SSI0=y +# CONFIG_TIVA_SSI1 is not set +# CONFIG_TIVA_TIMER3 is not set +CONFIG_TIVA_ETHERNET=y +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +CONFIG_TIVA_GPIO_IRQS=y +CONFIG_TIVA_HAVE_GPIOA_IRQS=y +CONFIG_TIVA_HAVE_GPIOB_IRQS=y +CONFIG_TIVA_HAVE_GPIOC_IRQS=y +CONFIG_TIVA_HAVE_GPIOD_IRQS=y +CONFIG_TIVA_HAVE_GPIOE_IRQS=y +CONFIG_TIVA_HAVE_GPIOF_IRQS=y +CONFIG_TIVA_HAVE_GPIOG_IRQS=y +# CONFIG_TIVA_HAVE_GPIOH_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +CONFIG_TIVA_GPIOF_IRQS=y +CONFIG_TIVA_GPIOG_IRQS=y + +# +# Stellaris Ethernet Configuration +# +# CONFIG_TIVA_ETHLEDS is not set +# CONFIG_TIVA_ETHHDUPLEX is not set +# CONFIG_TIVA_ETHNOAUTOCRC is not set +# CONFIG_TIVA_ETHNOPAD is not set +# CONFIG_TIVA_MULTICAST is not set +# CONFIG_TIVA_PROMISCUOUS is not set +# CONFIG_TIVA_TIMESTAMP is not set +# CONFIG_TIVA_BADCRC is not set +# CONFIG_TIVA_DUMPPACKET is not set +CONFIG_TIVA_BOARDMAC=y + +# +# Tiva/Stellaris SSI Configuration +# +CONFIG_SSI_POLLWAIT=y +CONFIG_SSI_TXLIMIT=4 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_EAGLE100=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="eagle100" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=12 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="thttp_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=8192 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +CONFIG_NXFLAT=y +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +CONFIG_PIC=y +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +CONFIG_EXAMPLES_THTTPD=y +# CONFIG_EXAMPLES_THTTPD_NOMAC is not set +CONFIG_EXAMPLES_THTTPD_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_THTTPD=y +CONFIG_THTTPD_PORT=80 +CONFIG_THTTPD_IPADDR=0x0a000002 +CONFIG_THTTPD_SERVER_ADDRESS="http://www.nuttx.org" +CONFIG_THTTPD_SERVER_SOFTWARE="thttpd/2.25b 29dec2003-NuttX" +CONFIG_THTTPD_NXFLAT=y +CONFIG_THTTPD_PATH="/mnt/www" +CONFIG_THTTPD_CGI_PATH="/mnt/www/cgi-bin" +CONFIG_THTTPD_CGI_PATTERN="/mnt/www/cgi-bin/*" +CONFIG_THTTPD_CGI_PRIORITY=50 +CONFIG_THTTPD_CGI_STACKSIZE=1024 +CONFIG_THTTPD_CGI_BYTECOUNT=20000 +CONFIG_THTTPD_CGI_TIMELIMIT=0 +CONFIG_THTTPD_CHARSET="iso-8859-1" +CONFIG_THTTPD_IOBUFFERSIZE=1024 +CONFIG_THTTPD_MINSTRSIZE=64 +CONFIG_THTTPD_REALLOCINCR=64 +CONFIG_THTTPD_MAXREALLOC=4096 +CONFIG_THTTPD_CGIINBUFFERSIZ=512 +CONFIG_THTTPD_CGIOUTBUFFERSIZE=512 +CONFIG_THTTPD_INDEX_NAMES="\"index.html\", \"index.htm\", \"index.cgi\"" +# CONFIG_THTTPD_USE_AUTH_FILE is not set +CONFIG_THTTPD_LISTEN_BACKLOG=8 +CONFIG_THTTPD_LINGER_MSEC=500 +CONFIG_THTTPD_OCCASIONAL_MSEC=120 +CONFIG_THTTPD_IDLE_READ_LIMIT_SEC=300 +CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300 +# CONFIG_THTTPD_USE_TILDE_MAP1 is not set +# CONFIG_THTTPD_USE_TILDE_MAP2 is not set +CONFIG_THTTPD_TILDE_MAP_NONE=y +# CONFIG_THTTPD_GENERATE_INDICES is not set +# CONFIG_THTTPD_USE_URLPATTERN is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/eagle100/thttpd/setenv.sh b/configs/eagle100/thttpd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..cd258206581a3cba91182b5b0e6f7bcbb6c5db6c --- /dev/null +++ b/configs/eagle100/thttpd/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/eagle100/thttpd/setenv.sh +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/efm32-g8xx-stk/Kconfig b/configs/efm32-g8xx-stk/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..610f66f55d563e29c4577f9330e81589968d0a93 --- /dev/null +++ b/configs/efm32-g8xx-stk/Kconfig @@ -0,0 +1,20 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_EFM32G8XXSTK + +comment "EFM32 G8XX STK Hardware Configuration" + +config EFM32G8STK_BCEN + bool "Enable BC_EN" + default n + ---help--- + The control MCU acts as a board controller (BC). There is a UART + connection between the EFM and the BC. The connection is made by + setting the EFM_BC_EN (PD13) line high. The EFM can then use the + BSP to send commands to the BC. When EFM_BC_EN is low, EFM_BC_TX + and EFM_BC_RX can be used by other applications. + +endif # ARCH_BOARD_EFM32G8XXSTK diff --git a/configs/efm32-g8xx-stk/README.txt b/configs/efm32-g8xx-stk/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..3f569bcd81e36257396a0b37f15b60518b4cffba --- /dev/null +++ b/configs/efm32-g8xx-stk/README.txt @@ -0,0 +1,268 @@ +README +====== + + This README file discusses the port of NuttX to the Silicon Labs EFM32â„¢ + Gecko Starter Kit (EFM32-G8XX-STK). The Gecko Starter Kit features: + + • EFM32G890F128 MCU with 128 kB flash and 16 kB RAM + • 32.768 kHz crystal (LXFO) + • 32 MHz crystal (HXFO) + • Advanced Energy Monitoring + • Touch slider + • 4x40 LCD + • 4 User LEDs + • 2 pushbutton switches + • Reset button and a switch to disconnect the battery. + • On-board SEGGER J-Link USB emulator + • ARM 20 pin JTAG/SWD standard Debug in/out connector + +CONTENTS +======= + + • Status + • LEDs + • Serial Console + • Using the J-Link GDB Server + • Configurations + +STATUS +====== + + 2014-10-28. At this point all basic boot operations are successful: The + LEDs work and the application tasks appear to be successfully started. + LED2 is on and LED0 is glowing (meaning that interrupts are being + processed). However, I get no output on PE0. Data appears to be sent + (at least by efm32_lowputc()). However, no signal activity is present + on PE0. + + 2014-10-29: The NuttX is running on the EFM32 Gecko Starter Kit. There + are not many peripherals to test in that configuration, but the NuttShell + (NSH) is working over LEUART0 at 2400 baud (certainly that could go up + to 4800. The documentation says that 9600 is also possible on the + LEUART, but I am not sure how). + + I originally planned to use UART0 at 115200 baud, but I never could get + any output from the board. I reviewd my pin configuration and clocking + carefully and the USART seems to think it is working correctly. So I + am thinking that there is some board issue that prohibits that option + (probably because UART0 is used with the board controller???). Pins + are not available for other U[S]ARTs on the board. + + DMA and USART-based SPI supported are included, but not yet tested. + + 2014-10-29: Calibrated the delays loops. + + 2014-10-29: The start-up time is long -- about a second. I have traced + this to the default delay in bringing up the LFCLK in efm32_clockconfig. + The default, reset setting of the LFXOTIMEOUT field of the CMU_CTRL + register is 3 which corresponds to a delay of 32768 cycles, or a full + second. I have not experimented to see if this delay can be reduced. + +LEDs +==== + + The EFM32 Gecko Start Kit has four yellow LEDs. These LEDs are connected + as follows: + + ------------------------------------- -------------------- + EFM32 PIN BOARD SIGNALS + ------------------------------------- -------------------- + C0/USART1_TX#0/PCNT0_S0IN#2/ACMP0_CH0 MCU_PC0 UIF_LED0 + C1/USART1_RX#0/PCNT0_S1IN#2/ACMP0_CH1 MCU_PC1 UIF_LED1 + C2/USART2_TX#0/ACMP0_CH2 MCU_PC2 UIF_LED2 + C3/USART2_RX#0/ACMP0_CH3 MCU_PC3 UIF_LED3 + ------------------------------------- -------------------- + + All LEDs are grounded and so are illuminated by outputting a high + value to the LED. + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/efm32_autoleds.c. The LEDs are used to + encode OS-related events as follows: + + SYMBOL Meaning LED0* LED1 LED2 LED3 + ----------------- ----------------------- ------ ----- ----- ------ + LED_STARTED NuttX has been started ON OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF + LED_IRQSENABLED Interrupts enabled ON ON OFF OFF + LED_STACKCREATED Idle stack created OFF OFF ON OFF + LED_INIRQ In an interrupt** ON N/C N/C OFF + LED_SIGNAL In a signal handler*** N/C ON N/C OFF + LED_ASSERTION An assertion failed ON ON N/C OFF + LED_PANIC The system has crashed N/C N/C N/C ON + LED_IDLE STM32 is is sleep mode (Optional, not used) + + * If LED0, LED1, LED2 are statically on, then NuttX probably failed to boot + and these LEDs will give you some indication of where the failure was + ** The normal state is LED2 ON and LED3 faintly glowing. This faint glow + is because of timer interrupt that result in the LED being illuminated + on a small proportion of the time. +*** LED1 may also flicker normally if signals are processed. + +SERIAL CONSOLE +============== + + Pin Availability + ---------------- + The EFM32G890F128 support the following options for serial output. NOTE + (1) that not all of these pins are available for use as a serial console, + however. And (2) not all pins made available by the board. + + EFM32 PIN GPIO NOTES/CONFLICTS/AVAILABILITY + ------- -- ---- ---------------------------------------------- + US0_RX #0 PE11 LCD_PE11, LCD_SEG7 + US0_RX #1 PE6 LCD_PE6, LCD_COM2 + US0_RX #2 PC10 UIF_SLIDER2 + + US0_TX #0 PE10 LCD_PE10, LCD_SEGG + US0_TX #1 PE7 LCD_PE7, LCD_COM3 + US0_TX #2 PC11 UIF_SLIDER3 + ------- -- ---- + US1_RX #0 PC1 UIF_LED1 + US1_RX #1 PD1 Not connected on this board + + US1_TX #0 PC0 UIF_LED0 + US1_TX #1 PD0 Not connected on this board + ------- -- ---- + US2_RX #0 PC3 UIF_LED3 + US2_RX #1 PB4 LCD_PB4, LCD_SEG21 + + US2_TX #0 PC2 UIF_LED2 + US2_TX #1 PB3 LCD_PB3, LCD_SEG20 + ------- -- ---- + U0_RX #0 PF7 LCD_PF7, LCD_SEG25 + U0_RX #1 PE1 **AVAILABLE at TP130** (if BC_EN is low, see below) + U0_RX #2 PA4 LCD_PA4, LCD_SEG17 + U0_RX #3 PC15 MCUDBG_TDO_SWO + + U0_TX #0 PF6 LCD_PF6, LCD_SEG24 + U0_TX #1 PE0 **AVAILABLE at TP129** (if BC_EN is low, see below) + U0_TX #2 PA3 LCD_PA3, LCD_SEG16 + U0_TX #3 PC14 **AVAILABLE at TP117** + ------- -- ---- + LEU0_RX #0 PD5 **AVAILABLE at TP123 and EXP port pin 14** + LEU0_RX #1 PB14 CTRLMCU_SPI_MISO + LEU0_RX #2 PE15 LCD_PE15, LCD_SEG11 + + LEU0_TX #0 PD4 **AVAILABLE at TP122 and EXP port pin 12** + LEU0_TX #1 PB13 CTRLMCU_SPI_SCK + LEU0_TX #2 PE14 LCD_PE14, LCD_SEG10 + ------- -- ---- + LEU1_RX #0 PC7 DEBUG_MCU_SW_ENABLE + LEU1_RX #1 PA6 DEBUG_TDI_IN + + LEU1_TX #0 PC6 DEBUG_DH_SW_ENABLE + LEU1_TX #1 PA5 DEBUG_TMS_SWDIO_IN + ------- -- ---- + + Default Serial Console + ---------------------- + LEUART0 is configured as the default serial console at 2400 8N1 + on pins PD5 and PD4. It certainly be possible to go to 4800 baud + and the documentation claims that 9600 baud is possible (although + I am not sure how). + + It should also be possible to use UART0 is configured at 115200 8N1 + on pins PE0 and PE1. However, my attempts to use USART0 were + unsuccessful -- I see no activity on PE0 and PE1 and have not yet + figured out why that is. + + Communication through the Board Controller + ------------------------------------------ + The control MCU acts as a board controller (BC). There is a UART + connection between the EFM and the BC. The connection is made by + setting the EFM_BC_EN (PD13) line high. The EFM can then use the BSP to + send commands to the BC. When EFM_BC_EN is low, EFM_BC_TX and EFM_BC_RX + can be used by other applications. + +USING THE J-LINK GDB SERVER +=========================== + + 1. Star the J-Link GDB server. You should see the start-up configuration + window. SelectL + + a. Target device = EFM32G880F128 + b. Select Target interface = SWD + + 2. Press OK. The GDB server should start and the last message in the Log + output should be "Waiting for GDB connection". + + 3. In a terminal window, start GDB: + + arm-none-eabi-gdb + + 4. Connect to the J-Link GDB server: + + (gdb) target remote localhost:2331 + + 5. Load and run nuttx + + (gdb) mon halt + (gdb) load nuttx + (gdb) mon reset go + + I had to tinker with the setup a few times repeating the same steps above + before things finally began to work. Don't know why. + + To debug code already burned into FLASH: + + 1. Start the GDB server as above. + + 2. In a terminal window, start GDB: + + arm-none-eabi-gdb + + 3. Connect to the J-Link GDB serer: + + (gdb) target remote local host + + 3. Load the nuttx symbol file, reset, and debug + + (gdb) mon halt + (gdb) file nuttx + (gdb) mon reset + (gdb) s + ... + +CONFIGURATIONS +============== + + Each EFM32 Gecko Starter Kit configuration is maintained in a sub-directory + and can be selected as follow: + + cd tools + ./configure.sh efm32-g8xx-stk/ + cd - + . ./setenv.sh + + If this is a Windows native build, then configure.bat should be used + instead of configure.sh: + + configure.bat efm32-g8xx-stk\ + + Where is one of the following: + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables the serial interfaces on LEUART0 at 2400 8N1. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows diff --git a/configs/efm32-g8xx-stk/include/board.h b/configs/efm32-g8xx-stk/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..55b007202428748343140060076c94faab9ebc10 --- /dev/null +++ b/configs/efm32-g8xx-stk/include/board.h @@ -0,0 +1,227 @@ +/**************************************************************************** + * configs/efm32-g8xx-stk/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_EFM32_G8XX_STK_INCLUDE_BOARD_H +#define __CONFIGS_EFM32_G8XX_STK_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "chip/efm32_cmu.h" +#include "chip/efm32_usart.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Clocking *****************************************************************/ +/* Clock Sources + * - 1-28 MHz High Frequency RC Oscillator (HFRCO) + * - 4-32 MHz High Frequency Crystal Oscillator (HFXO) + * - 32.768 kHz Low Frequency RC Oscillator (LFRCO) + * - 32.768 kHz Low Frequency Crystal Oscillator (LFXO) + * - 1KHz Ultra Low Frequency RC Oscillator (ULFRCO) + * + * The device boots with 14 MHz HFRCO as the HFCLK source. + */ + +#define BOARD_HAVE_HFXO 1 /* Have High frequency crystal oscillator */ +#define BOARD_HAVE_LFXO 1 /* Have Loq frequency crystal oscillator */ + +#define BOARD_HFRCO_FREQUENCY 14000000 /* 14MHz on reset */ +#define BOARD_HFXO_FREQUENCY 32000000 /* 32MHz crystal on board */ +#define BOARD_LFRCO_FREQUENCY 32768 /* Low frequency oscillator */ +#define BOARD_LFXO_FREQUENCY 32768 /* 32MHz crystal on board */ +#define BOARD_ULFRCO_FREQUNCY 1000 /* Ultra low frequency oscillator */ + +/* HFCLK - High Frequency Clock + * + * HFCLK is the selected High Frequency Clock. This clock is used by the CMU + * and drives the two prescalers that generate HFCORECLK and HFPERCLK. The + * HFCLK can be driven by a high-frequency oscillator (HFRCO or HFXO) or one + * of the low-frequency oscillators (LFRCO or LFXO). By default the HFRCO is + * selected. + */ + +#define BOARD_HFCLKSEL _CMU_CMD_HFCLKSEL_HFXO +#define BOARD_HFCLKDIV 0 /* Does not apply to EFM32G */ +#define BOARD_HFCLK_FREQUENCY BOARD_HFXO_FREQUENCY + +/* HFCORECLK - High Frequency Core Clock + * + * HFCORECLK is a prescaled version of HFCLK. This clock drives the Core + * Modules, which consists of the CPU and modules that are tightly coupled + * to the CPU, e.g. MSC, DMA etc. The frequency of HFCORECLK is set using + * the CMU_HFCORECLKDIV register. + */ + +#define BOARD_HFCORECLKDIV _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT +#define BOARD_HFCORECLK_FREQUENCY BOARD_HFXO_FREQUENCY + +/* HFPERCLK - High Frequency Peripheral Clock + * + * Like HFCORECLK, HFPERCLK can also be a prescaled version of HFCLK. This + * clock drives the High-Frequency Peripherals. The frequency of HFPERCLK is + * set using the CMU_HFPERCLKDIV register. + */ + +#define BOARD_HFPERCLKDIV _CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT +#define BOARD_HFPERCLK_FREQUENCY BOARD_HFXO_FREQUENCY + +/* LFACLK - Low Frequency A Clock + * + * LFACLK is the selected clock for the Low Energy A Peripherals. There are + * four selectable sources for LFACLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO. + * From reset, the LFACLK source is set to LFRCO. However, note that the + * LFRCO is disabled from reset. The selection is configured using the LFA + * field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the Low Energy A + * Peripherals to be used as high-frequency peripherals. + * + * Use _CMU_LFCLKSEL_LFA_DISABLED to disable. + * ULFRCO is a special case. + */ + +#define BOARD_LFACLKSEL _CMU_LFCLKSEL_LFA_LFXO +#undef BOARD_LFACLK_ULFRCO +#define BOARD_LFACLK_FREQUENCY BOARD_LFXO_FREQUENCY + +/* LFBCLK - Low Frequency B Clock + * + * LFBCLK is the selected clock for the Low Energy B Peripherals. There are + * four selectable sources for LFBCLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO. + * From reset, the LFBCLK source is set to LFRCO. However, note that the + * LFRCO is disabled from reset. The selection is configured using the LFB + * field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the Low Energy B + * Peripherals to be used as high-frequency peripherals. + * + * Use _CMU_LFCLKSEL_LFA_DISABLED to disable + * ULFRCO is a special case. + */ + +#define BOARD_LFBCLKSEL _CMU_LFCLKSEL_LFB_LFXO +#undef BOARD_LFBCLK_ULFRCO +#define BOARD_LFBCLK_FREQUENCY BOARD_LFXO_FREQUENCY + +/* PCNTnCLK - Pulse Counter n Clock + * + * Each available pulse counter is driven by its own clock, PCNTnCLK where + * n is the pulse counter instance number. Each pulse counter can be + * configured to use an external pin (PCNTn_S0) or LFACLK as PCNTnCLK. + */ + +/* WDOGCLK - Watchdog Timer Clock + * + * The Watchdog Timer (WDOG) can be configured to use one of three different + * clock sources: LFRCO, LFXO or ULFRCO. ULFRCO (Ultra Low Frequency RC + * Oscillator) is a separate 1 kHz RC oscillator that also runs in EM3. + */ + +/* AUXCLK - Auxiliary Clock + * + * AUXCLK is a 1-28 MHz clock driven by a separate RC oscillator, AUXHFRCO. + * This clock is used for flash programming and Serial Wire Output (SWO). + * During flash programming this clock will be active. If the AUXHFRCO has + * not been enabled explicitly by software, the MSC will automatically + * start and stop it. The AUXHFRCO is enabled by writing a 1 to AUXHFRCOEN + * in CMU_OSCENCMD. This explicit enabling is required when SWO is used. + */ + +/* LEDs *********************************************************************/ +/* The EFM32 Gecko Starter Kit supports 4 yellow LEDs. One side is grounded + * so these LEDs are illuminated by outputting a high value. + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + * any way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED0 0 +#define BOARD_LED1 1 +#define BOARD_LED2 2 +#define BOARD_LED3 3 +#define BOARD_NLEDS 4 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED0_BIT (1 << BOARD_LED0) +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on + * board the EFM32 Gecko Starter Kit. The following definitions describe + * how NuttX controls the LEDs in this configuration: + */ + +#define LED_STARTED 0 /* LED0 */ +#define LED_HEAPALLOCATE 1 /* LED1 */ +#define LED_IRQSENABLED 2 /* LED0 + LED1 */ +#define LED_STACKCREATED 3 /* LED2 */ +#define LED_INIRQ 4 /* LED0 + LED2 */ +#define LED_SIGNAL 5 /* LED1 + LED3 */ +#define LED_ASSERTION 6 /* LED0 + LED2 + LED2 */ +#define LED_PANIC 7 /* N/C + N/C + N/C + LED3 */ + +/* Pin routing **************************************************************/ +/* UART0: + * + * U0_RX #1 PE1 **AVAILABLE at TP130** + * U0_TX #1 PE0 **AVAILABLE at TP129** + */ + +#define BOARD_UART0_RX_GPIO (GPIO_PORTE|GPIO_PIN1) +#define BOARD_UART0_TX_GPIO (GPIO_PORTE|GPIO_PIN0) +#define BOARD_UART0_ROUTE_LOCATION _USART_ROUTE_LOCATION_LOC1 + +/* LEUART0: + * + * LEU0_RX #0 PD5 **AVAILABLE at TP123 and EXP port pin 14** + * LEU0_TX #0 PD4 **AVAILABLE at TP122 and EXP port pin 12** + */ + +#define BOARD_LEUART0_RX_GPIO (GPIO_PORTD|GPIO_PIN5) +#define BOARD_LEUART0_TX_GPIO (GPIO_PORTD|GPIO_PIN4) +#define BOARD_LEUART0_ROUTE_LOCATION _LEUART_ROUTE_LOCATION_LOC0 + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#endif /* __CONFIGS_EFM32_G8XX_STK_INCLUDE_BOARD_H */ diff --git a/configs/efm32-g8xx-stk/nsh/Make.defs b/configs/efm32-g8xx-stk/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..d1fd99eca4c428b0b6c82fb4894a83ff54ac116f --- /dev/null +++ b/configs/efm32-g8xx-stk/nsh/Make.defs @@ -0,0 +1,112 @@ +############################################################################ +# configs/efm32-g8xx-stk/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs +include ${TOPDIR}/tools/Config.mk + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/efm32-g8xx-stk/nsh/defconfig b/configs/efm32-g8xx-stk/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..899fdd919c7e4312e3c48887937d979d099d25c1 --- /dev/null +++ b/configs/efm32-g8xx-stk/nsh/defconfig @@ -0,0 +1,837 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +CONFIG_ARCH_CHIP_EFM32=y +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="efm32" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARCH_HAVE_FPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# EFM32 Configuration Options +# +# CONFIG_ARCH_CHIP_EFM32TG840F32 is not set +# CONFIG_ARCH_CHIP_EFM32G880F128 is not set +CONFIG_ARCH_CHIP_EFM32G890F128=y +# CONFIG_ARCH_CHIP_EFM32GG332F1024 is not set +# CONFIG_EFM32_EFM32TG is not set +CONFIG_EFM32_EFM32G=y +# CONFIG_EFM32_EFM32GG is not set + +# +# EFM32 Peripheral Support +# +CONFIG_EFM32_HAVE_USART2=y +CONFIG_EFM32_HAVE_UART0=y +# CONFIG_EFM32_HAVE_UART1 is not set +CONFIG_EFM32_HAVE_LEUART1=y +# CONFIG_EFM32_USART_ISUART is not set +# CONFIG_EFM32_USART_ISSPI is not set +# CONFIG_EFM32_UART is not set +CONFIG_EFM32_LEUART=y +# CONFIG_EFM32_DMA is not set +# CONFIG_EFM32_USART0 is not set +# CONFIG_EFM32_USART1 is not set +# CONFIG_EFM32_USART2 is not set +# CONFIG_EFM32_UART0 is not set +# CONFIG_EFM32_UART1 is not set +CONFIG_EFM32_LEUART0=y +# CONFIG_EFM32_LEUART1 is not set +CONFIG_EFM32_GPIO_IRQ=y +CONFIG_LEUART0_SERIAL_CONSOLE=y +# CONFIG_NO_LEUART_SERIAL_CONSOLE is not set + +# +# LEUART0 Configuration +# +CONFIG_LEUART0_RXBUFSIZE=64 +CONFIG_LEUART0_TXBUFSIZE=64 +CONFIG_LEUART0_BAUD=2400 +CONFIG_LEUART0_BITS=8 +CONFIG_LEUART0_PARITY=0 +CONFIG_LEUART0_2STOP=0 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=2662 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_EFM32G8XXSTK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="efm32-g8xx-stk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# EFM32 G8XX STK Hardware Configuration +# +# CONFIG_EFM32G8STK_BCEN is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_ARCH_HAVE_OTHER_UART=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_UART0_SERIAL_CONSOLE is not set +CONFIG_OTHER_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +# CONFIG_NSH_READLINE is not set +CONFIG_NSH_CLE=y +CONFIG_NSH_LINELEN=78 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=256 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +CONFIG_SYSTEM_CLE=y +CONFIG_SYSTEM_CLE_DEBUGLEVEL=0 + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/efm32-g8xx-stk/nsh/setenv.sh b/configs/efm32-g8xx-stk/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..22032bba658f8ca5dbb06013f16d60283e731e3f --- /dev/null +++ b/configs/efm32-g8xx-stk/nsh/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/efm32-g8xx-stk/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/efm32-g8xx-stk/scripts/ld.script b/configs/efm32-g8xx-stk/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..a9e6c2202f26bdefbefad664bb8c2ae5ec5c1cfe --- /dev/null +++ b/configs/efm32-g8xx-stk/scripts/ld.script @@ -0,0 +1,110 @@ +/**************************************************************************** + * configs/efm32-g8xx-stk/scripts/ld.script + * + * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 131072 + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 16384 +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/efm32-g8xx-stk/src/.gitignore b/configs/efm32-g8xx-stk/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/efm32-g8xx-stk/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/efm32-g8xx-stk/src/Makefile b/configs/efm32-g8xx-stk/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..f0314ad3358aecda3fc01a486156e1d132938e7f --- /dev/null +++ b/configs/efm32-g8xx-stk/src/Makefile @@ -0,0 +1,47 @@ +############################################################################ +# configs/efm32-g8xx-stk/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = efm32_boot.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += efm32_autoleds.c +else +CSRCS += efm32_userleds.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/efm32-g8xx-stk/src/efm32-g8xx-stk.h b/configs/efm32-g8xx-stk/src/efm32-g8xx-stk.h new file mode 100644 index 0000000000000000000000000000000000000000..8ef8a53b6bd0ce9e3d469b938561d24f66cb60da --- /dev/null +++ b/configs/efm32-g8xx-stk/src/efm32-g8xx-stk.h @@ -0,0 +1,94 @@ +/**************************************************************************** + * configs/efm32-g8xx-stk/src/efm32-g8xx-stk.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_EFM32_G8XX_STK_SRC_EFM32_G8XX_STK_H +#define __CONFIGS_EFM32_G8XX_STK_SRC_EFM32_G8XX_STK_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* UART0 + * + * The control MCU acts as a board controller (BC). There is a UART + * connection between the EFM and the BC. The connection is made by + * setting the EFM_BC_EN (PD13) line high. The EFM can then use the BSP to + * send commands to the BC. When EFM_BC_EN is low, EFM_BC_TX and EFM_BC_RX + * can be used by other applications. + */ + +#ifdef CONFIG_EFM32G8STK_BCEN +# define GPIO_BC_EN (GPIO_OUTPUT_PUSHPULL|GPIO_OUTPUT_SET|\ + GPIO_PORTD|GPIO_PIN13) +#else +# define GPIO_BC_EN (GPIO_OUTPUT_PUSHPULL|GPIO_OUTPUT_CLEAR|\ + GPIO_PORTD|GPIO_PIN13) +#endif + + /* LEDs + * + * The EFM32 Gecko Start Kit has four yellow LEDs. These LEDs are connected + * as follows: + * + * ------------------------------------- -------------------- + * EFM32 PIN BOARD SIGNALS + * ------------------------------------- -------------------- + * C0/USART1_TX#0/PCNT0_S0IN#2/ACMP0_CH0 MCU_PC0 UIF_LED0 + * C1/USART1_RX#0/PCNT0_S1IN#2/ACMP0_CH1 MCU_PC1 UIF_LED1 + * C2/USART2_TX#0/ACMP0_CH2 MCU_PC2 UIF_LED2 + * C3/USART2_RX#0/ACMP0_CH3 MCU_PC3 UIF_LED3 + * ------------------------------------- -------------------- + * + * All LEDs are grounded and so are illuminated by outputting a high + * value to the LED. + */ + +#define GPIO_LED0 (GPIO_OUTPUT_WIREDOR_PULLDOWN|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN0) +#define GPIO_LED1 (GPIO_OUTPUT_WIREDOR_PULLDOWN|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN1) +#define GPIO_LED2 (GPIO_OUTPUT_WIREDOR_PULLDOWN|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN2) +#define GPIO_LED3 (GPIO_OUTPUT_WIREDOR_PULLDOWN|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN3) + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#endif /* __CONFIGS_EFM32_G8XX_STK_SRC_EFM32_G8XX_STK_H */ diff --git a/configs/efm32-g8xx-stk/src/efm32_autoleds.c b/configs/efm32-g8xx-stk/src/efm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..5c3164671215108fddfd9b6cc290128c3536fa49 --- /dev/null +++ b/configs/efm32-g8xx-stk/src/efm32_autoleds.c @@ -0,0 +1,259 @@ +/**************************************************************************** + * configs/efm32-g8xx-stk/src/efm32_autoleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "efm32_gpio.h" +#include "efm32-g8xx-stk.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* The following definitions map the encoded LED setting to GPIO settings */ + +#define EFM32_LED0 (1 << 0) +#define EFM32_LED1 (1 << 1) +#define EFM32_LED2 (1 << 2) +#define EFM32_LED3 (1 << 3) + +#define ON_SETBITS_SHIFT (0) +#define ON_CLRBITS_SHIFT (4) +#define OFF_SETBITS_SHIFT (8) +#define OFF_CLRBITS_SHIFT (12) + +#define ON_BITS(v) ((v) & 0xff) +#define OFF_BITS(v) (((v) >> 8) & 0x0ff) +#define SETBITS(b) ((b) & 0x0f) +#define CLRBITS(b) (((b) >> 4) & 0x0f) + +#define ON_SETBITS(v) (SETBITS(ON_BITS(v)) +#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v)) +#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v)) +#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v)) + +#define LED_STARTED_ON_SETBITS ((EFM32_LED0) << ON_SETBITS_SHIFT) +#define LED_STARTED_ON_CLRBITS ((EFM32_LED1|EFM32_LED2|EFM32_LED3) << ON_CLRBITS_SHIFT) +#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT) +#define LED_STARTED_OFF_CLRBITS ((EFM32_LED0|EFM32_LED1|EFM32_LED2|EFM32_LED3) << OFF_CLRBITS_SHIFT) + +#define LED_HEAPALLOCATE_ON_SETBITS ((EFM32_LED1) << ON_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_ON_CLRBITS ((EFM32_LED0|EFM32_LED2|EFM32_LED3) << ON_CLRBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_SETBITS ((EFM32_LED0) << OFF_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_CLRBITS ((EFM32_LED1|EFM32_LED2|EFM32_LED3) << OFF_CLRBITS_SHIFT) + +#define LED_IRQSENABLED_ON_SETBITS ((EFM32_LED0|EFM32_LED1) << ON_SETBITS_SHIFT) +#define LED_IRQSENABLED_ON_CLRBITS ((EFM32_LED2|EFM32_LED3) << ON_CLRBITS_SHIFT) +#define LED_IRQSENABLED_OFF_SETBITS ((EFM32_LED1) << OFF_SETBITS_SHIFT) +#define LED_IRQSENABLED_OFF_CLRBITS ((EFM32_LED0|EFM32_LED2|EFM32_LED3) << OFF_CLRBITS_SHIFT) + +#define LED_STACKCREATED_ON_SETBITS ((EFM32_LED2) << ON_SETBITS_SHIFT) +#define LED_STACKCREATED_ON_CLRBITS ((EFM32_LED0|EFM32_LED1|EFM32_LED3) << ON_CLRBITS_SHIFT) +#define LED_STACKCREATED_OFF_SETBITS ((EFM32_LED0|EFM32_LED1) << OFF_SETBITS_SHIFT) +#define LED_STACKCREATED_OFF_CLRBITS ((EFM32_LED2|EFM32_LED3) << OFF_CLRBITS_SHIFT) + +#define LED_INIRQ_ON_SETBITS ((EFM32_LED0) << ON_SETBITS_SHIFT) +#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_INIRQ_OFF_CLRBITS ((EFM32_LED0) << OFF_CLRBITS_SHIFT) + +#define LED_SIGNAL_ON_SETBITS ((EFM32_LED1) << ON_SETBITS_SHIFT) +#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_SIGNAL_OFF_CLRBITS ((EFM32_LED1) << OFF_CLRBITS_SHIFT) + +#define LED_ASSERTION_ON_SETBITS ((EFM32_LED3) << ON_SETBITS_SHIFT) +#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_ASSERTION_OFF_CLRBITS ((EFM32_LED3) << OFF_CLRBITS_SHIFT) + +#define LED_PANIC_ON_SETBITS ((EFM32_LED3) << ON_SETBITS_SHIFT) +#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_PANIC_OFF_CLRBITS ((EFM32_LED3) << OFF_CLRBITS_SHIFT) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint16_t g_ledbits[8] = +{ + (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | + LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS), + + (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS | + LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS), + + (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS | + LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS), + + (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS | + LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS), + + (LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS | + LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS), + + (LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS | + LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS), + + (LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS | + LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS), + + (LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS | + LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS) +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static inline void led_clrbits(unsigned int clrbits) +{ + if ((clrbits & EFM32_LED0) != 0) + { + efm32_gpiowrite(GPIO_LED0, false); + } + + if ((clrbits & EFM32_LED1) != 0) + { + efm32_gpiowrite(GPIO_LED1, false); + } + + if ((clrbits & EFM32_LED2) != 0) + { + efm32_gpiowrite(GPIO_LED2, false); + } + + if ((clrbits & EFM32_LED3) != 0) + { + efm32_gpiowrite(GPIO_LED3, false); + } +} + +static inline void led_setbits(unsigned int setbits) +{ + if ((setbits & EFM32_LED0) != 0) + { + efm32_gpiowrite(GPIO_LED0, true); + } + + if ((setbits & EFM32_LED1) != 0) + { + efm32_gpiowrite(GPIO_LED1, true); + } + + if ((setbits & EFM32_LED2) != 0) + { + efm32_gpiowrite(GPIO_LED2, true); + } + + if ((setbits & EFM32_LED3) != 0) + { + efm32_gpiowrite(GPIO_LED3, true); + } +} + +static void led_setonoff(unsigned int bits) +{ + led_clrbits(CLRBITS(bits)); + led_setbits(SETBITS(bits)); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED0-4 GPIOs for output */ + + efm32_configgpio(GPIO_LED0); + efm32_configgpio(GPIO_LED1); + efm32_configgpio(GPIO_LED2); + efm32_configgpio(GPIO_LED3); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_setonoff(ON_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_setonoff(OFF_BITS(g_ledbits[led])); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/efm32-g8xx-stk/src/efm32_boot.c b/configs/efm32-g8xx-stk/src/efm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..214e2d339d362967b4e463650d381eaa03efb415 --- /dev/null +++ b/configs/efm32-g8xx-stk/src/efm32_boot.c @@ -0,0 +1,99 @@ +/**************************************************************************** + * configs/efm32-g8xx-stk/src/efm32_boot.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "efm32_gpio.h" +#include "efm32_start.h" +#include "efm32-g8xx-stk.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: efm32_boardinitialize + * + * Description: + * All EFM32 architectures must provide the following entry point. This + * entry point is called early in the initialization before any devices + * have been initialized. + * + ****************************************************************************/ + +void efm32_boardinitialize(void) +{ +#ifdef CONFIG_EFM32_UART0 + /* The control MCU acts as a board controller (BC). There is a UART + * connection between the EFM and the BC. The connection is made by + * setting the EFM_BC_EN (PD13) line high. The EFM can then use the BSP to + * send commands to the BC. When EFM_BC_EN is low, EFM_BC_TX and EFM_BC_RX + * can be used by other applications. + */ + + efm32_configgpio(GPIO_BC_EN); +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_initialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ +} +#endif diff --git a/configs/efm32-g8xx-stk/src/efm32_userleds.c b/configs/efm32-g8xx-stk/src/efm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..d21868ea62ef1efb460da039b1ff8ec3433b7ee0 --- /dev/null +++ b/configs/efm32-g8xx-stk/src/efm32_userleds.c @@ -0,0 +1,249 @@ +/**************************************************************************** + * configs/efm32-g8xx-stk/src/efm32_userleds.c + * + * Copyright (C) 2014-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "efm32_gpio.h" +#include "efm32-g8xx-stk.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* This array maps an LED number to GPIO pin configuration */ + +static gpio_pinset_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED0, GPIO_LED1, GPIO_LED2, GPIO_LED3 +}; + +/**************************************************************************** + * Private Function Protototypes + ****************************************************************************/ + +/* LED Power Management */ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_PM +static struct pm_callback_s g_ledscb = +{ + .notify = led_pm_notify, + .prepare = led_pm_prepare, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + switch (pmstate) + { + case(PM_NORMAL): + { + /* Restore normal LEDs operation */ + + } + break; + + case(PM_IDLE): + { + /* Entering IDLE mode - Turn leds off */ + + } + break; + + case(PM_STANDBY): + { + /* Entering STANDBY mode - Logic for PM_STANDBY goes here */ + + } + break; + + case(PM_SLEEP): + { + /* Entering SLEEP mode - Logic for PM_SLEEP goes here */ + + } + break; + + default: + { + /* Should not get here */ + + } + break; + } +} +#endif + +/**************************************************************************** + * Name: led_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* No preparation to change power modes is required by the LEDs driver. + * We always accept the state change by returning OK. + */ + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED0-4 GPIOs for output */ + + efm32_configgpio(GPIO_LED0); + efm32_configgpio(GPIO_LED1); + efm32_configgpio(GPIO_LED2); + efm32_configgpio(GPIO_LED3); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + efm32_gpiowrite(g_ledcfg[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + efm32_gpiowrite(GPIO_LED0, (ledset & BOARD_LED0_BIT) != 0); + efm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) != 0); + efm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) != 0); + efm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) != 0); +} + +/**************************************************************************** + * Name: efm32_led_pminitialize + ****************************************************************************/ + +#ifdef CONFIG_PM +void efm32_led_pminitialize(void) +{ + /* Register to receive power management callbacks */ + + int ret = pm_register(&g_ledscb); + if (ret != OK) + { + board_autoled_on(LED_ASSERTION); + } +} +#endif /* CONFIG_PM */ + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/efm32gg-stk3700/Kconfig b/configs/efm32gg-stk3700/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..8dc5ea132c71360dd811ba597efe7c54a26b8db8 --- /dev/null +++ b/configs/efm32gg-stk3700/Kconfig @@ -0,0 +1,22 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_EFM32GG_STK3700 + +comment "EFM32GG-STK3700 Hardware Configuration" + +config EFM32GG_STK3700_BCEN + bool "Enable BC_EN" + default n + ---help--- + The kit contains a board controller that is responsible for + performing various board level tasks, such as handling the debugger + and the Advanced Energy Monitor. An interface is provided between + the EFM32 and the board controller in the form of a UART connection. + The connection is enabled by setting the EFM_BC_EN (PF7) line high, + and using the lines EFM_BC_TX (PE0) and EFM_BC_RX (PE1) for + communicating. + +endif # ARCH_BOARD_EFM32GG_STK3700 diff --git a/configs/efm32gg-stk3700/README.txt b/configs/efm32gg-stk3700/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..c554259255f90254fd2681d7900f07c8ba8e8b2f --- /dev/null +++ b/configs/efm32gg-stk3700/README.txt @@ -0,0 +1,219 @@ +README +====== + + This README file discusses the port of NuttX to the Silicon Labs EFM32â„¢ + Giant Gecko Starter Kit (EFM32GG-STK3400). The Giant Gecko Starter Kit + features: + + • EFM32GG990F1024 MCU with 1 MB flash and 128 kB RAM + • 32.768 kHz crystal (LXFO) + • 48 MHz crystal (HXFO) + • 32 MB NAND flash + • Advanced Energy Monitoring + • Touch slider + • 8x20 LCD + • 2 user LEDs + • 2 user buttons + • USB interface for Host/Device/OTG + • Ambient light sensor and inductive-capacitive metal sensor + • EFM32 OPAMP footprint + • 20 pin expansion header + • Breakout pads for easy access to I/O pins + • Power sources (USB and CR2032 battery) + • Backup Capacitor for RTC mode + • Integrated Segger J-Link USB debugger/emulator + +STATUS +====== + + 2014-11-02: Completed the basic NSH configuration for the EFM32 Giant Gecko + Starter Kit. + 2014-11-12: The basic NSH configuration is functional with a serial console + on LEUART0. + 2014-11-14: LEUART0 BAUD increased from 2400 to 9600. Calibrated delay + loop. + 2014-11-18: Added basic drivers for USB device and host. The initial port + is a simple leverage from the STM32 which appears to use the same IP. + The current state is just the STM32 USB drivers with the appropriate. + The USB drivers still lack EFM32 initialization logic and are, of course, + completely untested. + +LEDs and Buttons +================ + + LEDs + ---- + The EFM32 Giant Gecko Start Kit has two yellow LEDs marked LED0 and LED1. + These LEDs are controlled by GPIO pins on the EFM32. The LEDs are + connected to pins PE2 and PE3 in an active high configuration: + + ------------------------------------- -------------------- + EFM32 PIN BOARD SIGNALS + ------------------------------------- -------------------- + E2/BCK_VOUT/EBI_A09 #0/ MCU_PE2 UIF_LED0 + TIM3_CC2 #1/U1_TX #3/ACMP0_O #1 + E3/BCK_STAT/EBI_A10 #0/U1_RX #3/ MCU_PE3 UIF_LED1 + ACMP1_O #1 + ------------------------------------- -------------------- + + All LEDs are grounded and so are illuminated by outputting a high + value to the LED. + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/efm32_autoleds.c. The LEDs are used to + encode OS-related events as follows: + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/up_leds.c. The LEDs are used to encode + OS-related events as follows: + + SYMBOL Meaning LED state + LED0 LED1 + ------------------- ----------------------- -------- -------- + LED_STARTED NuttX has been started OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF + LED_IRQSENABLED Interrupts enabled OFF OFF + LED_STACKCREATED Idle stack created ON OFF + LED_INIRQ In an interrupt No change + LED_SIGNAL In a signal handler No change + LED_ASSERTION An assertion failed No change + LED_PANIC The system has crashed OFF Blinking + LED_IDLE STM32 is is sleep mode Not used + + Thus if LED0 statically on, NuttX has successfully booted and is, + apparently, running normally. If LED1 is flashing at approximately + 2Hz, then a fatal error has been detected and the system has halted. + + Buttons + ------- + The EFM32 Giant Gecko Start Kit has two buttons marked PB0 and PB1. They + are connected to the EFM32, and are debounced by RC filters with a time + constant of 1ms. The buttons are connected to pins PB9 and PB10: + + ------------------------------------- -------------------- + EFM32 PIN BOARD SIGNALS + ------------------------------------- -------------------- + B9/EBI_A03/U1_TX #2 MCU_PB9 UIF_PB0 + B10/EBI_A04/U1_RX #2 MCU_PB10 UIF_PB1 + ------------------------------------- -------------------- + + Buttons are connected to ground so they will read low when closed. + +Serial Console +============== + + Default Serial Console + ---------------------- + LEUART0 is configured as the default serial console at 9600 8N1 + on pins PD5 and PD4. + + ---------- ---- ----------- ----------- + SIGNAL PGIO EXP Header Test Point + ---------- ---- ----------- ----------- + LEUART0_TX PD4 Pin 12 TPJ122 + LEUART0_RX PD5 Pin 14 TPJ123 + ---------- ---- ----------- ----------- + + It should also be possible to use UART0 is configured at 115200 8N1 + on pins PE0 and PE1. + + Communication through the Board Controller + ------------------------------------------ + The kit contains a board controller that is responsible for performing + various board level tasks, such as handling the debugger and the Advanced + Energy Monitor. An interface is provided between the EFM32 and the board + controller in the form of a UART connection. The connection is enabled by + setting the EFM_BC_EN (PF7) line high, and using the lines EFM_BC_TX + (PE0) and EFM_BC_RX (PE1) for communicating. + +USING THE J-LINK GDB SERVER +=========================== + + 1. Star the J-Link GDB server. You should see the start-up configuration + window. SelectL + + a. Target device = EFM32GG990F1024 + b. Select Target interface = SWD + + 2. Press OK. The GDB server should start and the last message in the Log + output should be "Waiting for GDB connection". + + 3. In a terminal window, start GDB: + + arm-none-eabi-gdb + + 4. Connect to the J-Link GDB server: + + (gdb) target remote localhost:2331 + + 5. Load and run nuttx + + (gdb) mon halt + (gdb) load nuttx + (gdb) mon reset go + + I had to tinker with the setup a few times repeating the same steps above + before things finally began to work. Don't know why. + + To debug code already burned into FLASH: + + 1. Start the GDB server as above. + + 2. In a terminal window, start GDB: + + arm-none-eabi-gdb + + 3. Connect to the J-Link GDB serer: + + (gdb) target remote local host + + 3. Load the nuttx symbol file, reset, and debug + + (gdb) mon halt + (gdb) file nuttx + (gdb) mon reset + (gdb) s + ... + +Configurations +============== + Each EFM32 Giant Gecko Starter Kit configuration is maintained in a sub- + directory and can be selected as follow: + + cd tools + ./configure.sh efm32gg-stk3700/ + cd - + . ./setenv.sh + + If this is a Windows native build, then configure.bat should be used + instead of configure.sh: + + configure.bat efm32gg-stk3700\ + + Where is one of the following: + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables the serial interfaces on LEUART0 at 9600 8N1. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows diff --git a/configs/efm32gg-stk3700/include/board.h b/configs/efm32gg-stk3700/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..f8816cc9a7a18ff5846222f050baa979cf537572 --- /dev/null +++ b/configs/efm32gg-stk3700/include/board.h @@ -0,0 +1,272 @@ +/**************************************************************************** + * configs/efm32gg-stk3700/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_EFM32GG_STK3700_INCLUDE_BOARD_H +#define __CONFIGS_EFM32GG_STK3700_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "chip/efm32_cmu.h" +#include "chip/efm32_usart.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Clocking *****************************************************************/ +/* Clock Sources + * - 1-28 MHz High Frequency RC Oscillator (HFRCO) + * - 4-32 MHz High Frequency Crystal Oscillator (HFXO) + * - 32.768 kHz Low Frequency RC Oscillator (LFRCO) + * - 32.768 kHz Low Frequency Crystal Oscillator (LFXO) + * - 1KHz Ultra Low Frequency RC Oscillator (ULFRCO) + * + * The device boots with 14 MHz HFRCO as the HFCLK source. + */ + +#define BOARD_HAVE_HFXO 1 /* Have High frequency crystal oscillator */ +#define BOARD_HAVE_LFXO 1 /* Have Loq frequency crystal oscillator */ + +#define BOARD_HFRCO_FREQUENCY 14000000 /* 14MHz on reset */ +#define BOARD_HFXO_FREQUENCY 48000000 /* 48MHz crystal on board */ +#define BOARD_LFRCO_FREQUENCY 32768 /* Low frequency oscillator */ +#define BOARD_LFXO_FREQUENCY 32768 /* 32MHz crystal on board */ +#define BOARD_ULFRCO_FREQUNCY 1000 /* Ultra low frequency oscillator */ + +/* HFCLK - High Frequency Clock + * + * HFCLK is the selected High Frequency Clock. This clock is used by the CMU + * and drives the two prescalers that generate HFCORECLK and HFPERCLK. The + * HFCLK can be driven by a high-frequency oscillator (HFRCO or HFXO) or one + * of the low-frequency oscillators (LFRCO or LFXO). By default the HFRCO is + * selected. + */ + +#define BOARD_HFCLKSEL _CMU_CMD_HFCLKSEL_HFXO +#define BOARD_HFCLKDIV 0 /* Does not apply to EFM32G */ +#define BOARD_HFCLK_FREQUENCY BOARD_HFXO_FREQUENCY + +/* HFCORECLK - High Frequency Core Clock + * + * HFCORECLK is a prescaled version of HFCLK. This clock drives the Core + * Modules, which consists of the CPU and modules that are tightly coupled + * to the CPU, e.g. MSC, DMA etc. The frequency of HFCORECLK is set using + * the CMU_HFCORECLKDIV register. + */ + +#define BOARD_HFCORECLKDIV _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT +#define BOARD_HFCORECLK_FREQUENCY BOARD_HFXO_FREQUENCY + +/* HFPERCLK - High Frequency Peripheral Clock + * + * Like HFCORECLK, HFPERCLK can also be a prescaled version of HFCLK. This + * clock drives the High-Frequency Peripherals. The frequency of HFPERCLK is + * set using the CMU_HFPERCLKDIV register. + */ + +#define BOARD_HFPERCLKDIV _CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT +#define BOARD_HFPERCLK_FREQUENCY BOARD_HFXO_FREQUENCY + +/* LFACLK - Low Frequency A Clock + * + * LFACLK is the selected clock for the Low Energy A Peripherals. There are + * four selectable sources for LFACLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO. + * From reset, the LFACLK source is set to LFRCO. However, note that the + * LFRCO is disabled from reset. The selection is configured using the LFA + * field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the Low Energy A + * Peripherals to be used as high-frequency peripherals. + * + * Use _CMU_LFCLKSEL_LFA_DISABLED to disable. + * ULFRCO is a special case. + */ + +#if BOARD_HAVE_LFXO +# define BOARD_LFACLKSEL _CMU_LFCLKSEL_LFA_LFXO +# undef BOARD_LFACLK_ULFRCO +# define BOARD_LFACLK_FREQUENCY BOARD_LFXO_FREQUENCY +#else +# define BOARD_LFACLKSEL _CMU_LFCLKSEL_LFA_LFRCO +# undef BOARD_LFACLK_ULFRCO +# define BOARD_LFACLK_FREQUENCY BOARD_LFRCO_FREQUENCY +#endif + +/* LFBCLK - Low Frequency B Clock + * + * LFBCLK is the selected clock for the Low Energy B Peripherals. There are + * four selectable sources for LFBCLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO. + * From reset, the LFBCLK source is set to LFRCO. However, note that the + * LFRCO is disabled from reset. The selection is configured using the LFB + * field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the Low Energy B + * Peripherals to be used as high-frequency peripherals. + * + * Use _CMU_LFCLKSEL_LFA_DISABLED to disable. + * ULFRCO is a special case. + */ + +#define BOARD_LFBCLKSEL _CMU_LFCLKSEL_LFB_LFXO +#undef BOARD_LFBCLK_ULFRCO +#define BOARD_LFBCLK_FREQUENCY BOARD_LFXO_FREQUENCY + +/* PCNTnCLK - Pulse Counter n Clock + * + * Each available pulse counter is driven by its own clock, PCNTnCLK where + * n is the pulse counter instance number. Each pulse counter can be + * configured to use an external pin (PCNTn_S0) or LFACLK as PCNTnCLK. + */ + +/* WDOGCLK - Watchdog Timer Clock + * + * The Watchdog Timer (WDOG) can be configured to use one of three different + * clock sources: LFRCO, LFXO or ULFRCO. ULFRCO (Ultra Low Frequency RC + * Oscillator) is a separate 1 kHz RC oscillator that also runs in EM3. + */ + +/* AUXCLK - Auxiliary Clock + * + * AUXCLK is a 1-28 MHz clock driven by a separate RC oscillator, AUXHFRCO. + * This clock is used for flash programming and Serial Wire Output (SWO). + * During flash programming this clock will be active. If the AUXHFRCO has + * not been enabled explicitly by software, the MSC will automatically + * start and stop it. The AUXHFRCO is enabled by writing a 1 to AUXHFRCOEN + * in CMU_OSCENCMD. This explicit enabling is required when SWO is used. + */ + +/* LEDs *********************************************************************/ +/* The EFM32 Giant Gecko Start Kit has two yellow LEDs marked LED0 and LED1. + * These LEDs are controlled by GPIO pins on the EFM32. The LEDs are + * connected to pins PE2 and PE3 in an active high configuration: + * + * ------------------------------------- -------------------- + * EFM32 PIN BOARD SIGNALS + * ------------------------------------- -------------------- + * E2/BCK_VOUT/EBI_A09 #0/ MCU_PE2 UIF_LED0 + * TIM3_CC2 #1/U1_TX #3/ACMP0_O #1 + * E3/BCK_STAT/EBI_A10 #0/U1_RX #3/ MCU_PE3 UIF_LED1 + * ACMP1_O #1 + * ------------------------------------- -------------------- + * + * All LEDs are grounded and so are illuminated by outputting a high + * value to the LED. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED0 0 +#define BOARD_LED1 1 +#define BOARD_NLEDS 2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED0_BIT (1 << BOARD_LED0) +#define BOARD_LED1_BIT (1 << BOARD_LED1) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/efm32_autoleds.c. The LEDs are used to + * encode OS-related events as follows: + * + * SYMBOL Val Meaning LED state + * LED0 LED1 + * ----------------- --- ----------------------- -------- -------- */ +#define LED_STARTED 0 /* NuttX has been started OFF OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON OFF */ +#define LED_INIRQ 2 /* In an interrupt No change */ +#define LED_SIGNAL 2 /* In a signal handler No change */ +#define LED_ASSERTION 2 /* An assertion failed No change */ +#define LED_PANIC 3 /* The system has crashed OFF Blinking */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* Buttons ******************************************************************/ +/* The EFM32 Giant Gecko Start Kit has two buttons marked PB0 and PB1. They + * are connected to the EFM32, and are debounced by RC filters with a time + * constant of 1ms. The buttons are connected to pins PB9 and PB10: + * + * ------------------------------------- -------------------- + * EFM32 PIN BOARD SIGNALS + * ------------------------------------- -------------------- + * B9/EBI_A03/U1_TX #2 MCU_PB9 UIF_PB0 + * B10/EBI_A04/U1_RX #2 MCU_PB10 UIF_PB1 + * ------------------------------------- -------------------- + * + * Buttons are connected to ground so they will read low when closed. + */ + +#define BUTTON_PB0 0 +#define BUTTON_PB1 1 +#define NUM_BUTTONS 2 + +#define BUTTON_PB0_BIT (1 << BUTTON_PB0) +#define BUTTON_PB1_BIT (1 << BUTTON_PB1) + +/* Pin routing **************************************************************/ +/* UART0: + * + * The kit contains a board controller that is responsible for performing + * various board level tasks, such as handling the debugger and the Advanced + * Energy Monitor. An interface is provided between the EFM32 and the board + * controller in the form of a UART connection. The connection is enabled by + * setting the EFM_BC_EN (PF7) line high, and using the lines EFM_BC_TX + * (PE0) and EFM_BC_RX (PE1) for communicating. + * + * U0_TX #1 PE0 MCU_PE0, UART0_TX #0, EFM_BC_RX, BC_UART_RX + * U0_RX #1 PE1 MCU_PE1, UART0_TX #1, EFM_BC_TX, BC_UART_TX + */ + +#define BOARD_UART0_RX_GPIO (GPIO_PORTE|GPIO_PIN1) +#define BOARD_UART0_TX_GPIO (GPIO_PORTE|GPIO_PIN0) +#define BOARD_UART0_ROUTE_LOCATION _USART_ROUTE_LOCATION_LOC1 + +/* LEUART0: + * + * LEU0_TX #0 PD4 Available on TP122 and EXP pin 12 + * LEU0_RX #0 PD5 Available on TP123 and EXP pin 14 + */ + +#define BOARD_LEUART0_RX_GPIO (GPIO_PORTD|GPIO_PIN5) +#define BOARD_LEUART0_TX_GPIO (GPIO_PORTD|GPIO_PIN4) +#define BOARD_LEUART0_ROUTE_LOCATION _LEUART_ROUTE_LOCATION_LOC0 + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#endif /* __CONFIGS_EFM32GG_STK3700_INCLUDE_BOARD_H */ diff --git a/configs/efm32gg-stk3700/nsh/Make.defs b/configs/efm32gg-stk3700/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..d1fd99eca4c428b0b6c82fb4894a83ff54ac116f --- /dev/null +++ b/configs/efm32gg-stk3700/nsh/Make.defs @@ -0,0 +1,112 @@ +############################################################################ +# configs/efm32-g8xx-stk/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs +include ${TOPDIR}/tools/Config.mk + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/efm32gg-stk3700/nsh/defconfig b/configs/efm32gg-stk3700/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..0649d6b5e1a188cd4a66cf7ff594c111657bd657 --- /dev/null +++ b/configs/efm32gg-stk3700/nsh/defconfig @@ -0,0 +1,770 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +CONFIG_ARCH_CHIP_EFM32=y +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="efm32" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# EFM32 Configuration Options +# +# CONFIG_ARCH_CHIP_EFM32TG840F32 is not set +# CONFIG_ARCH_CHIP_EFM32G880F128 is not set +# CONFIG_ARCH_CHIP_EFM32G890F128 is not set +# CONFIG_ARCH_CHIP_EFM32GG332F1024 is not set +CONFIG_ARCH_CHIP_EFM32GG990F1024=y +# CONFIG_EFM32_EFM32TG is not set +# CONFIG_EFM32_EFM32G is not set +CONFIG_EFM32_EFM32GG=y + +# +# EFM32 Peripheral Support +# +CONFIG_EFM32_HAVE_USART2=y +CONFIG_EFM32_HAVE_UART0=y +CONFIG_EFM32_HAVE_UART1=y +CONFIG_EFM32_HAVE_LEUART1=y +CONFIG_EFM32_HAVE_OTGFS=y +# CONFIG_EFM32_USART_ISUART is not set +# CONFIG_EFM32_USART_ISSPI is not set +# CONFIG_EFM32_UART is not set +CONFIG_EFM32_LEUART=y +# CONFIG_EFM32_DMA is not set +# CONFIG_EFM32_RMU is not set +# CONFIG_EFM32_I2C0 is not set +# CONFIG_EFM32_I2C1 is not set +# CONFIG_EFM32_USART0 is not set +# CONFIG_EFM32_USART1 is not set +# CONFIG_EFM32_USART2 is not set +# CONFIG_EFM32_UART0 is not set +# CONFIG_EFM32_UART1 is not set +CONFIG_EFM32_LEUART0=y +# CONFIG_EFM32_LEUART1 is not set +# CONFIG_EFM32_TIMER0 is not set +# CONFIG_EFM32_TIMER1 is not set +# CONFIG_EFM32_TIMER2 is not set +# CONFIG_EFM32_TIMER3 is not set +CONFIG_EFM32_GPIO_IRQ=y +# CONFIG_EFM32_LECLOCK is not set +CONFIG_LEUART0_SERIAL_CONSOLE=y +# CONFIG_NO_LEUART_SERIAL_CONSOLE is not set + +# +# LEUART0 Configuration +# +CONFIG_LEUART0_RXBUFSIZE=64 +CONFIG_LEUART0_TXBUFSIZE=64 +CONFIG_LEUART0_BAUD=9600 +CONFIG_LEUART0_BITS=8 +CONFIG_LEUART0_PARITY=0 +CONFIG_LEUART0_2STOP=0 +# CONFIG_EFM32_RTC_BURTC is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4787 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=131072 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_EFM32GG_STK3700=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="efm32gg-stk3700" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# EFM32GG-STK3700 Hardware Configuration +# +# CONFIG_EFM32GG_STK3700_BCEN is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_ARCH_HAVE_OTHER_UART=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_OTHER_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +# CONFIG_NSH_READLINE is not set +CONFIG_NSH_CLE=y +CONFIG_NSH_LINELEN=78 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=256 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +CONFIG_SYSTEM_CLE=y +CONFIG_SYSTEM_CLE_DEBUGLEVEL=0 +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/efm32gg-stk3700/nsh/setenv.sh b/configs/efm32gg-stk3700/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..22032bba658f8ca5dbb06013f16d60283e731e3f --- /dev/null +++ b/configs/efm32gg-stk3700/nsh/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/efm32-g8xx-stk/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/efm32gg-stk3700/scripts/ld.script b/configs/efm32gg-stk3700/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..a2069de6b51e08b609f22ccbed4b78e80d2a8eb7 --- /dev/null +++ b/configs/efm32gg-stk3700/scripts/ld.script @@ -0,0 +1,110 @@ +/**************************************************************************** + * configs/efm32gg-stk3700/scripts/ld.script + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 1M + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 128M +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/efm32gg-stk3700/src/.gitignore b/configs/efm32gg-stk3700/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/efm32gg-stk3700/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/efm32gg-stk3700/src/Makefile b/configs/efm32gg-stk3700/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..6854755b5458391157aae93f93efb7d41b116ed7 --- /dev/null +++ b/configs/efm32gg-stk3700/src/Makefile @@ -0,0 +1,47 @@ +############################################################################ +# configs/efm32gg-stk3700/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = efm32_boot.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += efm32_autoleds.c +else +CSRCS += efm32_userleds.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/efm32gg-stk3700/src/efm32_autoleds.c b/configs/efm32gg-stk3700/src/efm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..4b1cf4dfdf8367f08a290f2a107cbf43bd4485ed --- /dev/null +++ b/configs/efm32gg-stk3700/src/efm32_autoleds.c @@ -0,0 +1,176 @@ +/**************************************************************************** + * configs/efm32gg-stk3700/include/efm32_autoleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* The EFM32 Giant Gecko Start Kit has two yellow LEDs marked LED0 and LED1. + * These LEDs are controlled by GPIO pins on the EFM32. The LEDs are + * connected to pins PE2 and PE3 in an active high configuration: + * + * ------------------------------------- -------------------- + * EFM32 PIN BOARD SIGNALS + * ------------------------------------- -------------------- + * E2/BCK_VOUT/EBI_A09 #0/ MCU_PE2 UIF_LED0 + * TIM3_CC2 #1/U1_TX #3/ACMP0_O #1 + * E3/BCK_STAT/EBI_A10 #0/U1_RX #3/ MCU_PE3 UIF_LED1 + * ACMP1_O #1 + * ------------------------------------- -------------------- + * + * All LEDs are grounded and so are illuminated by outputting a high + * value to the LED. + * + * These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/efm32_autoleds.c. The LEDs are used to + * encode OS-related events as follows: + * + * SYMBOL Meaning LED state + * LED0 LED1 + * ------------------- ----------------------- -------- -------- + * LED_STARTED NuttX has been started OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF + * LED_IRQSENABLED Interrupts enabled OFF OFF + * LED_STACKCREATED Idle stack created ON OFF + * LED_INIRQ In an interrupt No change + * LED_SIGNAL In a signal handler No change + * LED_ASSERTION An assertion failed No change + * LED_PANIC The system has crashed OFF Blinking + * LED_IDLE STM32 is is sleep mode Not used + * + * Thus if LED0 statically on, NuttX has successfully booted and is, + * apparently, running normally. If LED1 is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "efm32_gpio.h" +#include "efm32gg-stk3700.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED PIOs for output */ + + efm32_configgpio(GPIO_LED0); + efm32_configgpio(GPIO_LED1); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool led0on = false; /* High illuminates */ + bool led1on = false; /* High illuminates */ + + switch (led) + { + case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED */ + break; + + case 1: /* LED_STACKCREATED */ + led0on = true; + break; + + default: + case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ + return; + + case 3: /* LED_PANIC */ + led1on = true; + break; + } + + efm32_gpiowrite(GPIO_LED0, led0on); + efm32_gpiowrite(GPIO_LED1, led1on); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led != 2) + { + efm32_gpiowrite(GPIO_LED0, false); /* High illuminates */ + efm32_gpiowrite(GPIO_LED1, false); /* High illuminates */ + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/efm32gg-stk3700/src/efm32_boot.c b/configs/efm32gg-stk3700/src/efm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..b34d2b7581fd5562b0a4d285781759bf2d984117 --- /dev/null +++ b/configs/efm32gg-stk3700/src/efm32_boot.c @@ -0,0 +1,99 @@ +/**************************************************************************** + * configs/efm32gg-stk3700/src/efm32_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "efm32_gpio.h" +#include "efm32_start.h" +#include "efm32gg-stk3700.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: efm32_boardinitialize + * + * Description: + * All EFM32 architectures must provide the following entry point. This + * entry point is called early in the initialization before any devices + * have been initialized. + * + ****************************************************************************/ + +void efm32_boardinitialize(void) +{ +#ifdef CONFIG_EFM32_UART0 + /* The kit contains a board controller that is responsible for performing + * various board level tasks, such as handling the debugger and the Advanced + * Energy Monitor. An interface is provided between the EFM32 and the board + * controller in the form of a UART connection. The connection is enabled by + * setting the EFM_BC_EN (PF7) line high, and using the lines EFM_BC_TX + * (PE0) and EFM_BC_RX (PE1) for communicating. + */ + + efm32_configgpio(GPIO_BC_EN); +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_initialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ +} +#endif diff --git a/configs/efm32gg-stk3700/src/efm32_userleds.c b/configs/efm32gg-stk3700/src/efm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..10b4f4df9bb98368426f3d4b0dec4cfbc764afaf --- /dev/null +++ b/configs/efm32gg-stk3700/src/efm32_userleds.c @@ -0,0 +1,137 @@ +/**************************************************************************** + * configs/efm32gg-stk3700/include/efm32_userleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* The EFM32 Giant Gecko Start Kit has two yellow LEDs marked LED0 and LED1. + * These LEDs are controlled by GPIO pins on the EFM32. The LEDs are + * connected to pins PE2 and PE3 in an active high configuration: + * + * ------------------------------------- -------------------- + * EFM32 PIN BOARD SIGNALS + * ------------------------------------- -------------------- + * E2/BCK_VOUT/EBI_A09 #0/ MCU_PE2 UIF_LED0 + * TIM3_CC2 #1/U1_TX #3/ACMP0_O #1 + * E3/BCK_STAT/EBI_A10 #0/U1_RX #3/ MCU_PE3 UIF_LED1 + * ACMP1_O #1 + * ------------------------------------- -------------------- + * + * All LEDs are grounded and so are illuminated by outputting a high + * value to the LED. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "efm32_gpio.h" +#include "efm32gg-stk3700.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED PIOs for output */ + + efm32_configgpio(GPIO_LED0); + efm32_configgpio(GPIO_LED1); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint32_t ledcfg; + + if (led == BOARD_LED0) + { + ledcfg = GPIO_LED0; + } + else if (led == BOARD_LED1) + { + ledcfg = GPIO_LED1; + } + else + { + return; + } + + efm32_gpiowrite(ledcfg, ledon); /* High illuminates */ +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + /* High illuminates */ + + efm32_gpiowrite(GPIO_LED0, (ledset & BOARD_LED0_BIT) != 0); + efm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/efm32gg-stk3700/src/efm32gg-stk3700.h b/configs/efm32gg-stk3700/src/efm32gg-stk3700.h new file mode 100644 index 0000000000000000000000000000000000000000..ffe20358a1b4dad1d625b1cba594ec17edef0d2f --- /dev/null +++ b/configs/efm32gg-stk3700/src/efm32gg-stk3700.h @@ -0,0 +1,92 @@ +/**************************************************************************** + * configs/efm32gg-stk3700/include/efm32gg-stk3700.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_EFM32GG_STK3700_SRC_EFM32GG_STK3700_H +#define __CONFIGS_EFM32GG_STK3700_SRC_EFM32GG_STK3700_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* UART0 + * + * The kit contains a board controller that is responsible for performing + * various board level tasks, such as handling the debugger and the Advanced + * Energy Monitor. An interface is provided between the EFM32 and the board + * controller in the form of a UART connection. The connection is enabled by + * setting the EFM_BC_EN (PF7) line high, and using the lines EFM_BC_TX + * (PE0) and EFM_BC_RX (PE1) for communicating. + */ + +#ifdef CONFIG_EFM32GG_STK3700_BCEN +# define GPIO_BC_EN (GPIO_OUTPUT_PUSHPULL|GPIO_OUTPUT_SET|\ + GPIO_PORTF|GPIO_PIN7) +#else +# define GPIO_BC_EN (GPIO_OUTPUT_PUSHPULL|GPIO_OUTPUT_CLEAR|\ + GPIO_PORTF|GPIO_PIN7) +#endif + +/* LEDs + * + * The EFM32 Giant Gecko Start Kit has two yellow LEDs marked LED0 and LED1. + * These LEDs are controlled by GPIO pins on the EFM32. The LEDs are + * connected to pins PE2 and PE3 in an active high configuration: + * + * ------------------------------------- -------------------- + * EFM32 PIN BOARD SIGNALS + * ------------------------------------- -------------------- + * E2/BCK_VOUT/EBI_A09 #0/ MCU_PE2 UIF_LED0 + * TIM3_CC2 #1/U1_TX #3/ACMP0_O #1 + * E3/BCK_STAT/EBI_A10 #0/U1_RX #3/ MCU_PE3 UIF_LED1 + * ACMP1_O #1 + * ------------------------------------- -------------------- + * + * All LEDs are grounded and so are illuminated by outputting a high + * value to the LED. + */ + +#define GPIO_LED0 (GPIO_OUTPUT_WIREDOR_PULLDOWN|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN2) +#define GPIO_LED1 (GPIO_OUTPUT_WIREDOR_PULLDOWN|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN3) + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#endif /* __CONFIGS_EFM32GG_STK3700_SRC_EFM32GG_STK3700_H */ diff --git a/configs/ekk-lm3s9b96/Kconfig b/configs/ekk-lm3s9b96/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f7c0e1247323d75420d7b51dbed75463af91fc7c --- /dev/null +++ b/configs/ekk-lm3s9b96/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_EKKLM3S9B96 +endif diff --git a/configs/ekk-lm3s9b96/README.txt b/configs/ekk-lm3s9b96/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..977d3df90740896938b15e82aa6c1bc65ecec285 --- /dev/null +++ b/configs/ekk-lm3s9b96/README.txt @@ -0,0 +1,412 @@ +README +^^^^^^ + +README for NuttX port to the Stellaris EKK-LM3S9B96 Evaluation Kit + +Contents +^^^^^^^^ + + Stellaris EKK-LM3S9B96 Evaluation Kit + Development Environment + GNU Toolchain Options + IDEs + NuttX EABI "buildroot" Toolchain + NuttX OABI "buildroot" Toolchain + NXFLAT Toolchain + Stellaris EKK-LM3S9B96 Evaluation Kit Configuration Options + Configurations + +Stellaris EKK-LM3S9B96 Evaluation Kit +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +The EKK-LM3S9B96 evaluation kit provides the following features: + + o LM3S9B96 high-performance Stellaris microcontroller and large memory + – 32-bit ARM® Cortex™-M3 core + – 256 KB single-cycle Flash memory, 96 KB single-cycle SRAM, 23.7 KB single-cycle ROM + o Ethernet 10/100 port with two LED indicators + o USB 2.0 Full-Speed OTG port + o SAFERTOS™ operating system in microcontroller ROM + o Virtual serial communications port capability + o Oversized board pads for GPIO access + o User pushbutton and LED + o Detachable ICDI board can be used for debugging other Luminary Micro boards + o Easy to customize + +Features of the LM3S9B96 Microcontroller + + o ARM® Cortex™-M3 architecture + – 80-MHz operation + – ARM Cortex SysTick Timer + – Integrated Nested Vectored Interrupt Controller (NVIC) + o External Peripheral Interface (EPI) + o 256 KB single-cycle flash + o 96 KB single-cycle SRAM + o Four general-purpose 32-bit timers + o Integrated Ethernet MAC and PHY + o Three fully programmable 16C550-type UARTs + o Two 10-bit channels (inputs) when used as single-ended inputs + o Three independent integrated analog comparators + o Two CAN modules + o Two I2C modules + o Two SSI modules + o Two Watchdog Timers (32-bit) + o Three PWM generator blocks + – One 16-bit counter + – Two comparators + – Produces eight independent PWM signals + – One dead-band generator + o Two QEI modules with position integrator for tracking encoder position + o Up to 65 GPIOs, depending on user configuration + o On-chip low drop-out (LDO) voltage regulator + +GPIO Usage + +PIN SIGNAL EVB Function +--- ----------- --------------------------------------- + 26 PA0/U0RX Virtual COM port receive + 27 PA1/U0TX Virtual COM port transmit + 66 PB0/USB0ID USBID signal from the USB-On-the-Go + 67 PB1/USB0VBUS USB VBUS input signal from USB-OTG + 92 PB4/GPIO User pushbutton SW2. + 80 PC0/TCK/SWCLK JTAG or SWD clock input + 79 PC1/TMS/SWDIO JTAG TMS input or SWD bidirectional signal SWDIO + 78 PC2/TDI JTAG TDI signal input + 77 PC3/TDO/SWO JTAG TDO output or SWD trace signal SWO output. + 10 PD0/GPIO User LED + 60 PF2/LED1 Ethernet LED1 (yellow) + 59 PF3/LED0 Ethernet LED0 (green) + 83 PH3/USB0EPEN USB-OTG power switch + 76 PH4/USB0PFLT Overcurrent input status from USB-OTG power switch + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery or devkitARM, you simply need to add one of the following + configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows) and devkitARM are Windows native toolchains. + The CodeSourcey (for Linux) and NuttX buildroot toolchains are Cygwin and/or Linux + native toolchains. There are several limitations to using a Windows based + toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + + NOTE 3: I recently (i.e., late 2011) tried building with the CodeSourcery Windows + toolchain. The code worked but required 40 seconds to boot (or even until the + status LED illuminates)!! Know idea why. With the buildroot tools, boot time is + a couple of seconds. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lm, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/tiva/tiva_vectors.S. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh ekk-lm3s9b96/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +Stellaris EKK-LM3S9B96 Evaluation Kit Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lm + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LM3S9B96 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=ekk-lm3s9b96 (for the Stellaris EKK-LM3S9b96 Evaluation Kit) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_EKKLM3S9B96 + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00018000 (96Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + There are configurations for disabling support for interrupts GPIO ports. + GPIOJ must be disabled because it does not exist on the LM3S9B96. + Additional interrupt support can be disabled if desired to reduce memory + footprint. + + CONFIG_TIVA_GPIOA_IRQS=y + CONFIG_TIVA_GPIOB_IRQS=y + CONFIG_TIVA_GPIOC_IRQS=y + CONFIG_TIVA_GPIOD_IRQS=y + CONFIG_TIVA_GPIOE_IRQS=y + CONFIG_TIVA_GPIOF_IRQS=y + CONFIG_TIVA_GPIOG_IRQS=y + CONFIG_TIVA_GPIOH_IRQS=y + CONFIG_TIVA_GPIOJ_IRQS=n << Always + + LM3S9B96 specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + CONFIG_TIVA_SSI0 - Select to enable support for SSI0 + CONFIG_TIVA_SSI1 - Select to enable support for SSI1 + CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support. + Poll-waiting is recommended if the interrupt rate would be to + high in the interrupt driven case. + CONFIG_SSI_TXLIMIT - Write this many words to the Tx FIFO before + emptying the Rx FIFO. If the SPI frequency is high and this + value is large, then larger values of this setting may cause + Rx FIFO overrun errors. Default: half of the Tx FIFO size (4). + + CONFIG_TIVA_ETHERNET - This must be set (along with CONFIG_NET) + to build the Stellaris Ethernet driver + CONFIG_TIVA_ETHLEDS - Enable to use Ethernet LEDs on the board. + CONFIG_TIVA_BOARDMAC - If the board-specific logic can provide + a MAC address (via tiva_ethernetmac()), then this should be selected. + CONFIG_TIVA_ETHHDUPLEX - Set to force half duplex operation + CONFIG_TIVA_ETHNOAUTOCRC - Set to suppress auto-CRC generation + CONFIG_TIVA_ETHNOPAD - Set to suppress Tx padding + CONFIG_TIVA_MULTICAST - Set to enable multicast frames + CONFIG_TIVA_PROMISCUOUS - Set to enable promiscuous mode + CONFIG_TIVA_BADCRC - Set to enable bad CRC rejection. + CONFIG_TIVA_DUMPPACKET - Dump each packet received/sent to the console. + +Configurations +^^^^^^^^^^^^^^ + +Each Stellaris EKK-LM3S9b96 Evaluation Kit configuration is maintained in a +sub-directory and can be selected as follow: + + cd tools + ./configure.sh ekk-lm3s9b96/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables both the serial and telnetd NSH interfaces. + + NOTE: As it is configured now, you MUST have a network connected. + Otherwise, the NSH prompt will not come up because the Ethernet + driver is waiting for the network to come up. That is probably + a bug in the Ethernet driver behavior! + diff --git a/configs/ekk-lm3s9b96/include/board.h b/configs/ekk-lm3s9b96/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..1669d330095d22b4a91229466ef0c86e67888bd2 --- /dev/null +++ b/configs/ekk-lm3s9b96/include/board.h @@ -0,0 +1,128 @@ +/************************************************************************************ + * configs/ekk-lm3s9b96/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Jose Pablo Rojas V. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* RCC settings */ + +#define SYSCON_RCC_XTAL SYSCON_RCC_XTAL16000KHZ /* 16.000 MHz crystal */ +#define XTAL_FREQUENCY 16000000 + +/* Oscillator source is the main oscillator (not internal, internal/4, 30KHz or + * 30KHz from hibernate module) */ + +#define SYSCON_RCC_OSCSRC SYSCON_RCC_OSCSRC_MOSC +#define SYSCON_RCC2_OSCSRC SYSCON_RCC2_OSCSRC2_MOSC +#define OSCSRC_FREQUENCY XTAL_FREQUENCY + +/* Use system divider = 4; this corresponds to a system clock frequency + * of (400 / 2) / 4 = 50MHz + */ + +#define TIVA_SYSDIV 4 +#define SYSCLK_FREQUENCY 50000000 /* 50MHz */ + +/* Other RCC settings: + * + * - Main and internal oscillators enabled. + * - PLL and sys dividers not bypassed + * - PLL not powered down + * - No auto-clock gating reset + */ + +#define TIVA_RCC_VALUE (SYSCON_RCC_OSCSRC | SYSCON_RCC_XTAL | SYSCON_RCC_USESYSDIV | SYSCON_RCC_SYSDIV(TIVA_SYSDIV)) + +/* RCC2 settings -- RCC2 not used. Other RCC2 settings + * + * - PLL and sys dividers not bypassed. + * - PLL not powered down + * - Not using RCC2 + */ + +#define TIVA_RCC2_VALUE (SYSCON_RCC2_OSCSRC | SYSCON_RCC2_SYSDIV(TIVA_SYSDIV)) + +/* LED definitions ******************************************************************/ + +/* The EKK-LMS39B96 Eval Kit has only one user LED: Port D, Bit 0. Below is the mapping of this + * single LED. From this single LED, we can get the following information: + * + * OFF Steady: The system has failed to boot to the point of enabling interrupts + * ON Steady: The systems has enabled interrupts, but none have been received + * Dull glow: The system is taking interrupts + * Slow blinking: The system has panicked + */ + /* ON OFF */ +#define LED_STARTED 0 /* OFF OFF */ +#define LED_HEAPALLOCATE 1 /* OFF OFF */ +#define LED_IRQSENABLED 2 /* ON ON */ +#define LED_STACKCREATED 3 /* ON ON */ +#define LED_INIRQ 4 /* ON OFF */ +#define LED_SIGNAL 5 /* ON OFF */ +#define LED_ASSERTION 6 /* ON OFF */ +#define LED_PANIC 7 /* ON OFF */ + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Stellaris architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/ekk-lm3s9b96/nsh/Make.defs b/configs/ekk-lm3s9b96/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..83c70458db4ca67b1c2b6aefec02e02786f53499 --- /dev/null +++ b/configs/ekk-lm3s9b96/nsh/Make.defs @@ -0,0 +1,112 @@ +############################################################################ +# configs/ekk-lm3s9b96/nsh/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Authors: Gregory Nutt +# Jose Pablo Rojas V. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/ekk-lm3s9b96/nsh/defconfig b/configs/ekk-lm3s9b96/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..146fb4c3cce4a3f955eb27bfc06277ec968670ff --- /dev/null +++ b/configs/ekk-lm3s9b96/nsh/defconfig @@ -0,0 +1,1074 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +CONFIG_ARCH_CHIP_LM=y +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_LM3S6918 is not set +CONFIG_ARCH_CHIP_LM3S9B96=y +# CONFIG_ARCH_CHIP_LM3S6432 is not set +# CONFIG_ARCH_CHIP_LM3S6965 is not set +# CONFIG_ARCH_CHIP_LM3S8962 is not set +# CONFIG_ARCH_CHIP_LM4F120 is not set +CONFIG_ARCH_CHIP_LM3S=y +# CONFIG_LM_REVA2 is not set +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +# CONFIG_TIVA_HAVE_ADC0 is not set +# CONFIG_TIVA_HAVE_ADC1 is not set +# CONFIG_TIVA_I2C is not set +CONFIG_TIVA_HAVE_I2C1=y +# CONFIG_TIVA_HAVE_I2C2 is not set +# CONFIG_TIVA_HAVE_I2C3 is not set +# CONFIG_TIVA_HAVE_I2C4 is not set +# CONFIG_TIVA_HAVE_I2C5 is not set +# CONFIG_TIVA_HAVE_I2C6 is not set +# CONFIG_TIVA_HAVE_I2C7 is not set +# CONFIG_TIVA_HAVE_I2C8 is not set +# CONFIG_TIVA_HAVE_I2C9 is not set +CONFIG_TIVA_HAVE_UART3=y +# CONFIG_TIVA_HAVE_UART4 is not set +# CONFIG_TIVA_HAVE_UART5 is not set +# CONFIG_TIVA_HAVE_UART6 is not set +# CONFIG_TIVA_HAVE_UART7 is not set +CONFIG_TIVA_HAVE_SSI0=y +CONFIG_TIVA_HAVE_SSI1=y +# CONFIG_TIVA_HAVE_SSI2 is not set +# CONFIG_TIVA_HAVE_SSI3 is not set +CONFIG_TIVA_HAVE_ETHERNET=y +# CONFIG_TIVA_SSI is not set +# CONFIG_TIVA_TIMER is not set +# CONFIG_TIVA_HAVE_TIMER0 is not set +# CONFIG_TIVA_HAVE_TIMER1 is not set +# CONFIG_TIVA_HAVE_TIMER2 is not set +CONFIG_TIVA_HAVE_TIMER3=y +# CONFIG_TIVA_HAVE_TIMER4 is not set +# CONFIG_TIVA_HAVE_TIMER5 is not set +# CONFIG_TIVA_HAVE_TIMER6 is not set +# CONFIG_TIVA_HAVE_TIMER7 is not set +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_UART3 is not set +# CONFIG_TIVA_SSI0 is not set +# CONFIG_TIVA_SSI1 is not set +# CONFIG_TIVA_TIMER3 is not set +CONFIG_TIVA_ETHERNET=y +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +CONFIG_TIVA_GPIO_IRQS=y +CONFIG_TIVA_HAVE_GPIOA_IRQS=y +CONFIG_TIVA_HAVE_GPIOB_IRQS=y +CONFIG_TIVA_HAVE_GPIOC_IRQS=y +CONFIG_TIVA_HAVE_GPIOD_IRQS=y +CONFIG_TIVA_HAVE_GPIOE_IRQS=y +CONFIG_TIVA_HAVE_GPIOF_IRQS=y +CONFIG_TIVA_HAVE_GPIOG_IRQS=y +CONFIG_TIVA_HAVE_GPIOH_IRQS=y +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +CONFIG_TIVA_GPIOF_IRQS=y +CONFIG_TIVA_GPIOG_IRQS=y +# CONFIG_TIVA_GPIOH_IRQS is not set + +# +# Stellaris Ethernet Configuration +# +# CONFIG_TIVA_ETHLEDS is not set +# CONFIG_TIVA_ETHHDUPLEX is not set +# CONFIG_TIVA_ETHNOAUTOCRC is not set +# CONFIG_TIVA_ETHNOPAD is not set +# CONFIG_TIVA_MULTICAST is not set +# CONFIG_TIVA_PROMISCUOUS is not set +# CONFIG_TIVA_TIMESTAMP is not set +# CONFIG_TIVA_BADCRC is not set +# CONFIG_TIVA_DUMPPACKET is not set +# CONFIG_TIVA_BOARDMAC is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=98304 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_EKKLM3S9B96=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ekk-lm3s9b96" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=8 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=0 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=40 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +CONFIG_NFS=y +# CONFIG_NFS_STATISTICS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSFMOUNT is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ekk-lm3s9b96/nsh/setenv.sh b/configs/ekk-lm3s9b96/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..281a71aa38e890a1a35f8696876104569d0da531 --- /dev/null +++ b/configs/ekk-lm3s9b96/nsh/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/ekk-lm3s9b96/nsh/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Authors: Gregory Nutt +# Jose Pablo Rojas V. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/ekk-lm3s9b96/scripts/ld.script b/configs/ekk-lm3s9b96/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..a85999f6e69b7ff92bbe8576a2872c1f2cbb356b --- /dev/null +++ b/configs/ekk-lm3s9b96/scripts/ld.script @@ -0,0 +1,113 @@ +/**************************************************************************** + * configs/ekk-lm3s9b96/ostest/ld.script + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Jose Pablo Rojas V. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LM3S9B96 has 256Kb of FLASH beginning at address 0x0000:0000 and 96Kb + * of SRAM beginning at 0x2000:0000. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 96K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/ekk-lm3s9b96/src/.gitignore b/configs/ekk-lm3s9b96/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/ekk-lm3s9b96/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/ekk-lm3s9b96/src/Makefile b/configs/ekk-lm3s9b96/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..66505cb2c9b5920fa3f59e7e40e85366eed9125c --- /dev/null +++ b/configs/ekk-lm3s9b96/src/Makefile @@ -0,0 +1,45 @@ +############################################################################ +# configs/ekk-lm3s9b96/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Authors: Gregory Nutt +# Jose Pablo Rojas V. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lm_boot.c lm_leds.c lm_ethernet.c lm_ssi.c +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lm_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/ekk-lm3s9b96/src/ekk-lm3s9b96.h b/configs/ekk-lm3s9b96/src/ekk-lm3s9b96.h new file mode 100644 index 0000000000000000000000000000000000000000..3f2eafc0f99f6e4ef111e680da58e09605b74a2a --- /dev/null +++ b/configs/ekk-lm3s9b96/src/ekk-lm3s9b96.h @@ -0,0 +1,112 @@ +/************************************************************************************ + * configs/ekk-lm3s9b96/src/ekk-lm3s9b96.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Jose Pablo Rojas V. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_EKK_LM3S9B96_SRC_EKKLM3S9B96_H +#define __CONFIGS_EKK_LM3S9B96_SRC_EKKLM3S9B96_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include "chip.h" +#include "tiva_gpio.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* How many SSI modules does this chip support? The LM3S9B96 supports 2 SSI + * modules (others may support more than 2 -- in such case, the following must be + * expanded). + */ + +#if TIVA_NSSI == 0 +# undef CONFIG_TIVA_SSI0 +# undef CONFIG_TIVA_SSI1 +#elif TIVA_NSSI == 1 +# undef CONFIG_TIVA_SSI1 +#endif + +/* EKK-LM3S9B96 Eval Kit ************************************************************/ + +/* GPIO Usage + * + * PIN SIGNAL EVB Function + * --- ----------- --------------------------------------- + * 26 PA0/U0RX Virtual COM port receive + * 27 PA1/U0TX Virtual COM port transmit + * 66 PB0/USB0ID USBID signal from the USB-On-the-Go + * 67 PB1/USB0VBUS USB VBUS input signal from USB-OTG + * 92 PB4/GPIO User pushbutton SW2. + * 80 PC0/TCK/SWCLK JTAG or SWD clock input + * 79 PC1/TMS/SWDIO JTAG TMS input or SWD bidirectional signal SWDIO + * 78 PC2/TDI JTAG TDI signal input + * 77 PC3/TDO/SWO JTAG TDO output or SWD trace signal SWO output. + * 10 PD0/GPIO User LED + * 60 PF2/LED1 Ethernet LED1 (yellow) + * 59 PF3/LED0 Ethernet LED0 (green) + * 83 PH3/USB0EPEN USB-OTG power switch + * 76 PH4/USB0PFLT Overcurrent input status from USB-OTG power switch + */ + +/* GPIO for LED's: + * - PD0: User LED + */ + +#define LED_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTD | 0) + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: lm_ssidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LM3S6965 Eval Kit. + * + ************************************************************************************/ + +extern void weak_function lm_ssidev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_EKK_LM3S9B96_SRC_EKKLM3S9B96_H */ + diff --git a/configs/ekk-lm3s9b96/src/lm_appinit.c b/configs/ekk-lm3s9b96/src/lm_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..313bdc9783fe2889b87378230ed5435aa59f5459 --- /dev/null +++ b/configs/ekk-lm3s9b96/src/lm_appinit.c @@ -0,0 +1,68 @@ +/**************************************************************************** + * config/ekk-lm3s9b96/src/lm_appinit.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Jose Pablo Rojas V. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + return OK; +} diff --git a/configs/ekk-lm3s9b96/src/lm_boot.c b/configs/ekk-lm3s9b96/src/lm_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..fc1289e4672478b548ac69b57c858701fd7f94fc --- /dev/null +++ b/configs/ekk-lm3s9b96/src/lm_boot.c @@ -0,0 +1,92 @@ +/************************************************************************************ + * configs/ekk-lm3s9b96/src/lm_boot.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Jose Pablo Rojas V. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "ekk-lm3s9b96.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Stellaris architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void) +{ + /* Configure chip selects if 1) SSI is not disabled, and 2) the weak function + * lm_ssidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_TIVA_SSI0) || defined(CONFIG_TIVA_SSI1) + if (lm_ssidev_initialize) + { + lm_ssidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/ekk-lm3s9b96/src/lm_ethernet.c b/configs/ekk-lm3s9b96/src/lm_ethernet.c new file mode 100644 index 0000000000000000000000000000000000000000..622a972b3ea9864273ab3d8a596100118719dcf3 --- /dev/null +++ b/configs/ekk-lm3s9b96/src/lm_ethernet.c @@ -0,0 +1,99 @@ +/************************************************************************************ + * configs/lm3s6965-ek/src/lm_ethernet.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Jose Pablo Rojas V. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "tiva_ethernet.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_ethernetmac + * + * Description: + * For the Ethernet Eval Kits, the MAC address will be stored in the non-volatile + * USER0 and USER1 registers. If CONFIG_TIVA_BOARDMAC is defined, this function + * will obtain the MAC address from these registers. + * + ************************************************************************************/ + +#ifdef CONFIG_TIVA_BOARDMAC +void tiva_ethernetmac(struct ether_addr *ethaddr) +{ + uint32_t user0; + uint32_t user1; + + /* Get the current value of the user registers */ + + user0 = getreg32(TIVA_FLASH_USERREG0); + user1 = getreg32(TIVA_FLASH_USERREG1); + + nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff); + DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff); + + /* Re-format that MAC address the way that uIP expects to see it */ + + ethaddr->ether_addr_octet[0] = ((user0 >> 0) & 0xff); + ethaddr->ether_addr_octet[1] = ((user0 >> 8) & 0xff); + ethaddr->ether_addr_octet[2] = ((user0 >> 16) & 0xff); + ethaddr->ether_addr_octet[3] = ((user1 >> 0) & 0xff); + ethaddr->ether_addr_octet[4] = ((user1 >> 8) & 0xff); + ethaddr->ether_addr_octet[5] = ((user1 >> 16) & 0xff); +} +#endif diff --git a/configs/ekk-lm3s9b96/src/lm_leds.c b/configs/ekk-lm3s9b96/src/lm_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..0cee2dc4a83df3798743e89bb88c8b298b790481 --- /dev/null +++ b/configs/ekk-lm3s9b96/src/lm_leds.c @@ -0,0 +1,166 @@ +/**************************************************************************** + * configs/lm3s6965-ek/src/lm_leds.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Jose Pablo Rojas V. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "tiva_gpio.h" +#include "ekk-lm3s9b96.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef CONFIG_DEBUG_LEDS +# define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +static uint8_t g_nest; + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + leddbg("Initializing\n"); + + /* Configure Port D, Bit 0 as an output, initial value=OFF */ + + led_dumpgpio("board_autoled_initialize before tiva_configgpio()"); + tiva_configgpio(LED_GPIO); + led_dumpgpio("board_autoled_initialize after tiva_configgpio()"); + g_nest = 0; +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + case LED_STARTED: + case LED_HEAPALLOCATE: + default: + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + g_nest++; + case LED_IRQSENABLED: + case LED_STACKCREATED: + led_dumpgpio("board_autoled_on: before tiva_gpiowrite()"); + tiva_gpiowrite(LED_GPIO, false); + led_dumpgpio("board_autoled_on: after tiva_gpiowrite()"); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + case LED_IRQSENABLED: + case LED_STACKCREATED: + case LED_STARTED: + case LED_HEAPALLOCATE: + default: + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + if (--g_nest <= 0) + { + led_dumpgpio("board_autoled_off: before tiva_gpiowrite()"); + tiva_gpiowrite(LED_GPIO, true); + led_dumpgpio("board_autoled_off: after tiva_gpiowrite()"); + } + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/ekk-lm3s9b96/src/lm_ssi.c b/configs/ekk-lm3s9b96/src/lm_ssi.c new file mode 100644 index 0000000000000000000000000000000000000000..e2a26bc1b50ca233b97f4cf41b615fbc484b416a --- /dev/null +++ b/configs/ekk-lm3s9b96/src/lm_ssi.c @@ -0,0 +1,161 @@ +/************************************************************************************ + * configs/ekk-lm3s9b96/src/lm_ssi.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Jose Pablo Rojas V. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "tiva_gpio.h" +#include "ekk-lm3s9b96.h" + +#if defined(CONFIG_TIVA_SSI0) || defined(CONFIG_TIVA_SSI1) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SSI_DEBUG /* Define to enable debug */ +#undef SSI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SSI_DEBUG +# define ssidbg lldbg +# ifdef SSI_VERBOSE +# define ssivdbg lldbg +# else +# define ssivdbg(x...) +# endif +#else +# undef SSI_VERBOSE +# define ssidbg(x...) +# define ssivdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef SSI_VERBOSE +#if 0 +# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m) +#endif +#else +# define ssi_dumpgpio(m) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lm_ssidev_initialize + * + * Description: + * Called to configure chip select GPIO pins for the LM3S9B96 Eval board. + * + ************************************************************************************/ + +void weak_function lm_ssidev_initialize(void) +{ + /* Configure the CS GPIO */ +#if 0 + ssi_dumpgpio("lm_ssidev_initialize() Entry"); + ssi_dumpgpio("lm_ssidev_initialize() Exit"); +#endif +} + +#if 0 +/**************************************************************************** + * The external functions, tiva_ssiselect and tiva_ssistatus must be provided + * by board-specific logic. The are implementations of the select and status + * methods SPI interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * All othermethods (including tiva_ssibus_initialize()) are provided by common + * logic. To use this common SPI logic on your board: + * + * 1. Provide tiva_ssiselect() and tiva_ssistatus() functions in your + * board-specific logic. This function will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 2. Add a call to tiva_ssibus_initialize() in your low level initialization + * logic + * 3. The handle returned by tiva_ssibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssi_dumpgpio("tiva_ssiselect() Entry"); + if (devid == SPIDEV_MMCSD) + { + /* Assert the CS pin to the card */ + + tiva_gpiowrite(SDCCS_GPIO, !selected); + } +#ifdef CONFIG_NX_LCDDRIVER + else if (devid == SPIDEV_DISPLAY) + { + /* Assert the CS pin to the display */ + + tiva_gpiowrite(OLEDCS_GPIO, !selected); + } +#endif + ssi_dumpgpio("tiva_ssiselect() Exit"); +} + +uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + ssidbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} +#endif +#endif /* CONFIG_TIVA_SSI0 || CONFIG_TIVA_SSI1 */ diff --git a/configs/ez80f910200kitg/Kconfig b/configs/ez80f910200kitg/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/ez80f910200kitg/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/ez80f910200kitg/README.txt b/configs/ez80f910200kitg/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..f72c8e8fd25000c73bd7c6d5ac1c625bc6b7cdc4 --- /dev/null +++ b/configs/ez80f910200kitg/README.txt @@ -0,0 +1,133 @@ +README.txt +^^^^^^^^^^ + +ZDS-II Compiler Versions +^^^^^^^^^^^^^^^^^^^^^^^^ + +Different configurations have been build for this board using ZDS-11 +Versions 4.11.0, 4.11.1, and 5.1.1 You have to check the files */Make.defs +to see how the build is configured: Check the definitions of +ZDSVERSION (if present) and ZDSINSTALLDIR. + +NOTE: Different versions of the ZDS-II compiler may also require +different versions of .linkcmd and .zdsproj files as well. + +Version 4.11.0 + + The 5.1.1 version of the ZDS-II tools are currently configured for + all ez80 boards. However, it is the older version 4.11.0 that this code + has been verified against. + + Although it compiles without error, the 4.11.0 compiler generates + bad code on one of the files, mm/mm_initialize.c. Below is a simple work- + around. + + --- mm/mm_initialize.c.SAVE 2008-02-13 08:06:46.833857700 -0600 + +++ mm/mm_initialize.c 2008-02-13 08:07:26.367608900 -0600 + @@ -94,8 +94,11 @@ + { + int i; + + +#if 0 /* DO NOT CHECK IN */ + CHECK_ALLOCNODE_SIZE; + CHECK_FREENODE_SIZE; + +#endif + + /* Set up global variables */ + + UPDATE: I don't know if 4.11.1 has this same problem (I bet not since + I submitted the bug to ZiLOG), but I have permanently worked around the + above problem for all ZiLOG compilers. + +Version 5.1.1 + + On June 22, 2011 I verified that these configurations build successfully + with the 5.1.1 ZDS-II version. On November 12, 2012, all of the configurations + were converted to use 5.1.1, but have not been verified on a running target. + + The above kludge for 4.11.0 is not required with 5.1.1. + + Paths were also updated that are specific to a 32-bit toolchain running on + a 64 bit windows platform. Change to a different toolchain, you will need + to modify the versioning in Make.defs and setenv.sh; if you want to build + on a different platform, you will need to change the path in the ZDS binaries + in those same files. + +Version 5.2.1 + + On January 31, 2016, I tried ZDS-II version 5.2.1. I believe that I have + all of the changes in place to support that version. At compile time, + however, I encountered compiler internal errors. I did not pursue that + build any further. + +Other Versions + If you use any version of ZDS-II other than 5.1.1 or 5.2.1 or if you install + ZDS-II at any location other than the default location, you will have to + modify one or more of three files: (1) configs/ez80f910200kitg/*/setenv.sh, + (2) configs/ez80f910200kitg/*/Make.defs, and arch/z80/src/ez80/Toolchain.defs. + +Configuration Subdirectories +^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +- src/ and include/ + These directories contain common logic for all ez80f910200kitg + configurations. + +Variations on the basic ez80f910200kitg configuration are maintained +in subdirectories. To configure any specific configuration, do the +following steps: + + cd /tools + ./configure.sh ez80f910200kitg/ + cd + make + +Where is the specific board configuration that you +wish to build. The following board-specific configurations are +available: + +- ostest + This builds the examples/ostest application for execution from FLASH. + See examples/README.txt for information about ostest. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration assumes that you are using the + Cygwin environment on Windows. An option is to use the native + CMD.exe window build as described in the top-level README.txt + file. To set up that configuration: + + -CONFIG_WINDOWS_CYGWIN=y + +CONFIG_WINDOWS_NATIVE=y + + And after configuring, make sure that CONFIG_APPS_DIR uses + the back slash character. For example: + + CONFIG_APPS_DIR="..\apps" + + NOTES: + + a. If you need to change the toolchain path used in Make.defs, you + will need to use the short 8.3 filenames to avoid spaces. On my + PC, C:\PROGRA~1\ is is C:\Program Files\ and C:\PROGRA~2\ is + C:\Program Files (x86)\ + b. You can't use setenv.sh in the native Windows environment. Try + scripts/setenv.bat instead. + c. At present, the native Windows build fails at the final link stages. + The failure is due to problems in arch/z80/src/nuttx.linkcmd that + is autogenerated by arch/z80/src/Makefile.zdsii. The basic problem + is the spurious spaces and and carrirage returns are generated at + the end of the lines after a line continuation (\ ^M). If these + trailing bad characters are manually eliminated, then the build + will succeed on the next try. + +Check out any README.txt files in these s. diff --git a/configs/ez80f910200kitg/include/board.h b/configs/ez80f910200kitg/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..72ddd59100734ca844aeae3f655f5e195f99d092 --- /dev/null +++ b/configs/ez80f910200kitg/include/board.h @@ -0,0 +1,80 @@ +/**************************************************************************** + * arch/ez80f910200kitg/include/board.h + * + * Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking */ + +#define EZ80_SYS_CLK_FREQ 50000000 + +/* LED pattern definitions */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_IDLE 4 +#define LED_INIRQ 5 +#define LED_ASSERTION 6 +#define LED_SIGNAL 6 +#define LED_PANIC 7 + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/ez80f910200kitg/ostest/.gitignore b/configs/ez80f910200kitg/ostest/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..ad38f4b402e834cbd6573f869792a43028ff7a02 --- /dev/null +++ b/configs/ez80f910200kitg/ostest/.gitignore @@ -0,0 +1,6 @@ +ostest.hex +ostest.map +ostest.lod +ostest.wsp +*.asm + diff --git a/configs/ez80f910200kitg/ostest/Make.defs b/configs/ez80f910200kitg/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..719b4419bd4f282e31c94ca257017d8a6dffd053 --- /dev/null +++ b/configs/ez80f910200kitg/ostest/Make.defs @@ -0,0 +1,276 @@ +############################################################################ +# configs/ez80f910200kitg/ostest/Make.defs +# +# Copyright (C) 2008, 2009, 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk + +# These are the directories where the ZDS-II toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_EZ80_ZDSII_V521),y) +ZDSVERSION := 5.2.1 +else # ifeq ($(CONFIGEZ80_ZDSII_V511),y) +ZDSVERSION := 5.1.1 +endif + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + ZDSINSTALLDIR := C:/PROGRA~2/ZiLOG/ZDSII_eZ80Acclaim!_$(ZDSVERSION) + INSTALLDIR = ${shell echo $(ZDSINSTALLDIR)| sed -e "s/\//\\/g"} + ZDSBINDIR := $(INSTALLDIR)\bin + ZDSSTDINCDIR := $(INSTALLDIR)\include\std + ZDSZILOGINCDIR := $(INSTALLDIR)\include\zilog + ZDSSTDLIBDIR := $(INSTALLDIR)\lib\std + ZDSZILOGLIBDIR := $(INSTALLDIR)\lib\zilog + + # CFLAGs + + ARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + EARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHSTDINCLUDES = -stdinc:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHUSRINCLUDES = -usrinc:. +else + WINTOOL := y + ZDSINSTALLDIR := C:/PROGRA~2/ZiLOG/ZDSII_eZ80Acclaim!_$(ZDSVERSION) + INSTALLDIR = ${shell cygpath -u "$(ZDSINSTALLDIR)"} + ZDSBINDIR := $(INSTALLDIR)/bin + ZDSSTDINCDIR := $(INSTALLDIR)/include/std + ZDSZILOGINCDIR := $(INSTALLDIR)/include/zilog + ZDSSTDLIBDIR := $(INSTALLDIR)/lib/std + ZDSZILOGLIBDIR := $(INSTALLDIR)/lib/zilog + + # These are the same directories but with the directory separator + # character swapped as needed by the ZDS-II compiler + + WTOPDIR := ${shell cygpath -w "$(TOPDIR)"} + WZDSSTDINCDIR := ${shell cygpath -w "$(ZDSSTDINCDIR)"} + WZDSZILOGINCDIR := ${shell cygpath -w "$(ZDSZILOGINCDIR)"} + WZDSSTDLIBDIR := ${shell cygpath -w "$(ZDSSTDLIBDIR)"} + WZDSZILOGLIBDIR := ${shell cygpath -w "$(ZDSZILOGLIBDIR)"} + + # Escaped versions + + ETOPDIR := ${shell echo "$(WTOPDIR)" | sed -e "s/ /%20/g"} + EZDSSTDINCDIR := ${shell echo "$(WZDSSTDINCDIR)" | sed -e "s/ /%20/g"} + EZDSZILOGINCDIR := ${shell echo "$(WZDSZILOGINCDIR)" | sed -e "s/ /%20/g"} + + # CFLAGs + + ARCHASMINCLUDES = -include:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + EARCHASMINCLUDES = -include:'$(ETOPDIR)\include;$(EZDSSTDINCDIR);$(EZDSZILOGINCDIR)' + ARCHSTDINCLUDES = -stdinc:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + ARCHUSRINCLUDES = -usrinc:'.' +endif + +# Assembler definitions + +ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y) + ARCHCPU = eZ80F91 + ARCHCPUDEF = _EZ80F91 + ARCHFAMILY = _EZ80ACCLAIM! +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHASMOPTIMIZATION = -debug -NOsdiopt +else + ARCHASMOPTIMIZATION = -nodebug -NOsdiopt +endif + +ARCHASMCPUFLAGS = -cpu:$(ARCHCPU) -NOigcase +ARCHASMLIST = -list -NOlistmac -name -pagelen:56 -pagewidth:80 -quiet +ARCHASMWARNINGS = -warn +ARCHASMDEFINES = -define:$(ARCHCPUDEF)=1 -define:$(ARCHFAMILYDEF)=1 -define:__ASSEMBLY__ +AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION) + +# Compiler definitions + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -debug +else + ARCHOPTIMIZATION = -nodebug +endif + +ifeq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -reduceopt +else + ARCHOPTIMIZATION += -optsize +endif + +ARCHCPUFLAGS = -chartype:S -promote -cpu:$(ARCHCPU) -NOgenprintf -NOmodsect \ + -asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)" +ARCHLIST = -keeplst -NOlist -NOlistinc -keepasm +ARCHPICFLAGS = +ARCHWARNINGS = -warn +ARCHDEFINES = -define:$(ARCHCPUDEF) -define:$(ARCHFAMILYDEF) +ARCHINCLUDES = $(ARCHSTDINCLUDES) $(ARCHUSRINCLUDES) +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHLIST) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) + +CPPDEFINES = -D$(ARCHFAMILYDEF) -D$(ARCHCPUDEF) -D__ASSEMBLY__ +CPPINCLUDES = -I$(TOPDIR)$(DELIM)include +CPPFLAGS = $(CPPDEFINES) $(CPPINCLUDES) + +# Librarian definitions + +ARFLAGS = -quiet -warn + +# Linker definitions + +LINKCMDTEMPLATE = $(TOPDIR)$(DELIM)configs$(DELIM)ez80f910200kitg$(DELIM)ostest$(DELIM)ostest.linkcmd + +# Tool names/pathes + +CROSSDEV = +CC = ez80cc.exe +CPP = gcc -E +LD = ez80link.exe +AS = ez80asm.exe +AR = ez80lib.exe + +# File extensions + +ASMEXT = .asm +OBJEXT = .obj +LIBEXT = .lib +EXEEXT = .lod +HEXEXT = .hex + +# These are the macros that will be used in the NuttX make system +# to compile and assembly source files and to insert the resulting +# object files into an archive + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + +define PREPROCESS + @echo CPP: $1->$2 + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) "$(CC)" $(CFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define ASSEMBLE + $(Q) "$(AS)" $(AFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + @echo AR: $2 + $(Q) for %%G in ($(2)) do ( "$(AR)" $(ARFLAGS) $1=-+%%G ) +endef + +define CLEAN + $(Q) if exist *.obj (del /f /q *.obj) + $(Q) if exist *.src (del /f /q *.src) + $(Q) if exist *.lib (del /f /q *.lib) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.lod (del /f /q *.lod) + $(Q) if exist *.lst (del /f /q *.lst) +endef + +else + +define PREPROCESS + @echo "CPP: $1->$2" + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) (wfile=`cygpath -w "$1"`; "$(CC)" $(CFLAGS) $$wfile) +endef + +define ASSEMBLE + $(Q) (wfile=`cygpath -w "$1"`; "$(AS)" $(AFLAGS) $$wfile) +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + $(Q) for __obj in $(2) ; do \ + echo "AR: $$__obj"; \ + "$(AR)" $(ARFLAGS) $1=-+$$__obj || { echo "$(AR) $1=-+$$__obj FAILED!" ; exit 1 ; } \ + done +endef + +define CLEAN + $(Q) rm -f *.obj *.src *.lib *.hex *.lod *.lst +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + #MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mknulldeps.sh +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mknulldeps.sh + + # ZDS-II cannot follow Cygwin soft links, so we will have to use directory copies + + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh +endif diff --git a/configs/ez80f910200kitg/ostest/README.txt b/configs/ez80f910200kitg/ostest/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..7bee0bf22a9ba027a5d45829ab4f7affa1d132c2 --- /dev/null +++ b/configs/ez80f910200kitg/ostest/README.txt @@ -0,0 +1,12 @@ +README.txt +^^^^^^^^^^ + +ostest.zdsproj is a simple ZDS-II project that will allow you + to use the ZDS-II debugger. Before using, copy the following + files from the toplevel directory: + + nuttx.hex, nuttx.map, nuttx.lod + + to this directory as: + + ostest.hex, ostest.map, ostest.lod diff --git a/configs/ez80f910200kitg/ostest/defconfig b/configs/ez80f910200kitg/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b85a58b23ceb2a6a106babe66731b259a7ddb046 --- /dev/null +++ b/configs/ez80f910200kitg/ostest/defconfig @@ -0,0 +1,678 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="ez80" +# CONFIG_ARCH_CHIP_Z80 is not set +# CONFIG_ARCH_CHIP_Z8018006VSG is not set +# CONFIG_ARCH_CHIP_Z8018010VSG is not set +# CONFIG_ARCH_CHIP_Z8018008VSG is not set +# CONFIG_ARCH_CHIP_Z8018010FSG is not set +# CONFIG_ARCH_CHIP_Z8018008VEG is not set +# CONFIG_ARCH_CHIP_Z8018006VEG is not set +# CONFIG_ARCH_CHIP_Z8018006PSG is not set +# CONFIG_ARCH_CHIP_Z8018008FSG is not set +# CONFIG_ARCH_CHIP_Z8018010PSG is not set +# CONFIG_ARCH_CHIP_Z8018006PEG is not set +# CONFIG_ARCH_CHIP_Z8018010VEG is not set +# CONFIG_ARCH_CHIP_Z8018010PEG is not set +# CONFIG_ARCH_CHIP_Z8018008PSG is not set +# CONFIG_ARCH_CHIP_Z8018006FSG is not set +# CONFIG_ARCH_CHIP_Z8018000XSO is not set +# CONFIG_ARCH_CHIP_Z8018010FEG is not set +# CONFIG_ARCH_CHIP_Z8018000WSO is not set +# CONFIG_ARCH_CHIP_Z8018008PEG is not set +# CONFIG_ARCH_CHIP_Z8018110FEG is not set +# CONFIG_ARCH_CHIP_Z8018233FSG is not set +# CONFIG_ARCH_CHIP_Z8018220AEG is not set +# CONFIG_ARCH_CHIP_Z8018216FSG is not set +# CONFIG_ARCH_CHIP_Z8018216ASG is not set +# CONFIG_ARCH_CHIP_Z8018233ASG is not set +# CONFIG_ARCH_CHIP_Z8019520FSG is not set +# CONFIG_ARCH_CHIP_Z8019533FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020VSG is not set +# CONFIG_ARCH_CHIP_Z8L18020FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020PSG is not set +# CONFIG_ARCH_CHIP_Z8L18220ASG is not set +# CONFIG_ARCH_CHIP_Z8L18220FSG is not set +# CONFIG_ARCH_CHIP_Z8L18220AEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG1960 is not set +# CONFIG_ARCH_CHIP_Z8S18033VSG is not set +# CONFIG_ARCH_CHIP_Z8S18010FSG is not set +# CONFIG_ARCH_CHIP_Z8S18010VEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020PSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FEG is not set +# CONFIG_ARCH_CHIP_Z8S18020FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PSG is not set +# CONFIG_ARCH_CHIP_Z8S18020FEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PEG is not set +# CONFIG_ARCH_CHIP_Z8S18010FEG is not set +# CONFIG_ARCH_CHIP_Z8F6403 is not set +# CONFIG_ARCH_CHIP_Z8F6423 is not set +CONFIG_ARCH_CHIP_EZ80F91=y +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +CONFIG_ARCH_CHIP_EZ80=y +CONFIG_HAVE_LOWSERIALINIT=y + +# +# ez80 Peripheral Support +# +CONFIG_EZ80_UART0=y +# CONFIG_EZ80_UART1 is not set +# CONFIG_EZ80_UART2 is not set +# CONFIG_EZ80_EMAC is not set +CONFIG_EZ80_TOOLCHAIN_ZDSII=y +# CONFIG_ARCH_TIMERHOOK is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_EZ80F910200KITG=y +# CONFIG_ARCH_BOARD_EZ80F910200ZCO is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ez80f910200kitg" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +# CONFIG_ARCH_LEDS is not set + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=25 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=0 +CONFIG_UART0_TXBUFSIZE=0 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +CONFIG_ARCH_HAVE_PHY=y +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=2048 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ez80f910200kitg/ostest/ostest.linkcmd b/configs/ez80f910200kitg/ostest/ostest.linkcmd new file mode 100644 index 0000000000000000000000000000000000000000..3ddee5f855ac0d944819b08769d9f6e2cce5d101 --- /dev/null +++ b/configs/ez80f910200kitg/ostest/ostest.linkcmd @@ -0,0 +1,94 @@ +/****************************************************************************/ +/* configs/ez80f910200kitg/ostest/ostest.linkcmd */ +/* */ +/* Copyright (C) 2008 Gregory Nutt. All rights reserved. */ +/* Author: Gregory Nutt */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* 1. Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in */ +/* the documentation and/or other materials provided with the */ +/* distribution. */ +/* 3. Neither the name NuttX nor the names of its contributors may be */ +/* used to endorse or promote products derived from this software */ +/* without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ +/* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS */ +/* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE */ +/* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */ +/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, */ +/* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS */ +/* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED */ +/* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT */ +/* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN */ +/* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */ +/* POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/****************************************************************************/ + +-FORMAT=OMF695,INTEL32 +-map -maxhexlen=64 -quiet -NOwarnoverlap -xref -unresolved=fatal +-sort NAME=ascending -warn -NOdebug -NOigcase + +RANGE ROM $000000 : $03FFFF +RANGE RAM $B7E000 : $B7FFFF +RANGE EXTIO $000000 : $00FFFF +RANGE INTIO $000000 : $0000FF + +CHANGE STRSECT = ROM + +ORDER .RESET,.IVECTS,.STARTUP,CODE,DATA +COPY DATA ROM + +DEFINE __low_romdata = copy base of DATA +DEFINE __low_data = base of DATA +DEFINE __len_data = length of DATA +DEFINE __low_bss = base of BSS +DEFINE __len_bss = length of BSS +DEFINE __stack = highaddr of RAM + 1 +DEFINE __heaptop = highaddr of RAM +DEFINE __heapbot = top of RAM + 1 +DEFINE __low_romcode = copy base of CODE +DEFINE __low_code = base of CODE +DEFINE __len_code = length of CODE +DEFINE __copy_code_to_ram = 0 +DEFINE __crtl = 1 +DEFINE __CS0_LBR_INIT_PARAM = $10 +DEFINE __CS0_UBR_INIT_PARAM = $1f +DEFINE __CS0_CTL_INIT_PARAM = $a8 +DEFINE __CS0_BMC_INIT_PARAM = $02 +DEFINE __CS1_LBR_INIT_PARAM = $b8 +DEFINE __CS1_UBR_INIT_PARAM = $b9 +DEFINE __CS1_CTL_INIT_PARAM = $28 +DEFINE __CS1_BMC_INIT_PARAM = $02 +DEFINE __CS2_LBR_INIT_PARAM = $80 +DEFINE __CS2_UBR_INIT_PARAM = $bf +DEFINE __CS2_CTL_INIT_PARAM = $28 +DEFINE __CS2_BMC_INIT_PARAM = $02 +DEFINE __CS3_LBR_INIT_PARAM = $60 +DEFINE __CS3_UBR_INIT_PARAM = $7f +DEFINE __CS3_CTL_INIT_PARAM = $a8 +DEFINE __CS3_BMC_INIT_PARAM = $02 +DEFINE __RAM_CTL_INIT_PARAM = $C0 +DEFINE __RAM_ADDR_U_INIT_PARAM = $B7 +DEFINE __FLASH_CTL_INIT_PARAM = $68 +DEFINE __FLASH_ADDR_U_INIT_PARAM = $00 + +define _SYS_CLK_FREQ = 50000000 + +define _OSC_FREQ = 5000000 +define _SYS_CLK_SRC = 1 +define _OSC_FREQ_MULT = 10 +define __PLL_CTL0_INIT_PARAM = $41 + +define _zsl_g_clock_xdefine = 50000000 + +/* arch/z80/src/Makefile.zdsii will append target, object and library paths below */ + diff --git a/configs/ez80f910200kitg/ostest/ostest.zdsproj b/configs/ez80f910200kitg/ostest/ostest.zdsproj new file mode 100644 index 0000000000000000000000000000000000000000..08247148bd8df5bfd1870446e3416ce4516b7f9b --- /dev/null +++ b/configs/ez80f910200kitg/ostest/ostest.zdsproj @@ -0,0 +1,247 @@ + +eZ80F91 + + + +..\..\..\nuttx.hex + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/configs/ez80f910200kitg/ostest/setenv.sh b/configs/ez80f910200kitg/ostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..dbee7060cf38a558abbc470182171a2ee0e47bc9 --- /dev/null +++ b/configs/ez80f910200kitg/ostest/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/ez80f910200kitg/ostest/setenv.sh +# +# Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# Check how we were executed +# +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# +# This is the Cygwin path to location where the XDS-II tools were installed +# +#TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_eZ80Acclaim!_5.1.1\bin" +TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_eZ80Acclaim!_5.2.1/bin" + +# +# Add the path to the toolchain to the PATH varialble. NOTE that /bin and /usr/bin +# preceded the toolchain bin directory. This is because the ZDSII bin directory +# includes binaries like make.exe that will interfere with the normal build process +# if we do not give priority to the versions at /bin and /usr/bin. +# +export PATH="/bin:/usr/bin:${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/ez80f910200kitg/ostest/test-result.txt b/configs/ez80f910200kitg/ostest/test-result.txt new file mode 100644 index 0000000000000000000000000000000000000000..ebf178439d08532d6246ad537c2c4e3ee54befce --- /dev/null +++ b/configs/ez80f910200kitg/ostest/test-result.txt @@ -0,0 +1,529 @@ +This is the output from the z16f target from January 31, 2008 +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +While all tests pass per this output, my impression is that some +of the timed delays in during execution of the test were not +correct and I suspect some system timing issues. + +stdio_test: write fd=1 +stdio_test: write fd=2 +stdio_test: Standard I/O Check: printf +user_start: putenv(Variable1=BadValue3) +user_start: setenv(Variable1, GoodValue1, TRUE) +user_start: setenv(Variable2, BadValue1, FALSE) +user_start: setenv(Variable2, GoodValue2, TRUE) +user_start: setenv(Variable3, Variable3, FALSE) +user_start: setenv(Variable3, Variable3, FALSE) +show_variable: Variable=Variable1 has value=GoodValue1 +show_variable: Variable=Variable2 has value=GoodValue2 +show_variable: Variable=Variable3 has value=GoodValue3 +user_start: Started user_main at PID=2 +stdio_test: Standard I/O Check: fprintf to stderr + +user_main: Begin argument test +user_main: Started with argc=5 +user_main: argv[0]="" +user_main: argv[1]="Arg1" +user_main: argv[2]="Arg2" +user_main: argv[3]="Arg3" +user_main: argv[4]="Arg4" + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 2 2 +mxordblk 76b20 76b20 +uordblks 33d0 33d0 +fordblks 78180 78180 +show_variable: Variable=Variable1 has value=GoodValue1 +show_variable: Variable=Variable2 has value=GoodValue2 +show_variable: Variable=Variable3 has value=GoodValue3 +show_variable: Variable=Variable1 has no value +show_variable: Variable=Variable2 has value=GoodValue2 +show_variable: Variable=Variable3 has value=GoodValue3 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 2 3 +mxordblk 76b20 76b20 +uordblks 33d0 33c0 +fordblks 78180 78190 +show_variable: Variable=Variable1 has no value +show_variable: Variable=Variable2 has no value +show_variable: Variable=Variable3 has no value + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 33c0 3380 +fordblks 78190 781d0 + +user_main: /dev/null test +dev_null: Read 0 bytes from /dev/null +dev_null: Wrote 1024 bytes to /dev/null + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: mutex test +Initializing mutex +Starting thread 1 +Starting thread 2 + Thread1 Thread2 + Loops 32 32 + Errors 0 0 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: cancel test +cancel_test: Test 1: Normal Cancelation +cancel_test: Starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +cancel_test: waiter exited with result=ffffffff +cancel_test: PASS thread terminated with PTHREAD_CANCELED +cancel_test: Test 2: Cancelation of detached thread +cancel_test: Re-starting thread +restart_thread: Destroying cond +restart_thread: Destroying mutex +restart_thread: Re-starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +cancel_test: PASS pthread_join failed with status=ESRCH +cancel_test: Test 3: Non-cancelable threads +cancel_test: Re-starting thread (non-cancelable) +restart_thread: Destroying cond +restart_thread: Destroying mutex +restart_thread: Re-starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +thread_waiter: Setting non-cancelable +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +thread_waiter: Releasing mutex +thread_waiter: Setting cancelable +cancel_test: waiter exited with result=ffffffff +cancel_test: PASS thread terminated with PTHREAD_CANCELED + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: semaphore test +sem_test: Initializing semaphore to 0 +sem_test: Starting waiter thread 1 +sem_test: Set thread 1 priority to 191 +waiter_func: Thread 1 Started +waiter_func: Thread 1 initial semaphore value = 0 +waiter_func: Thread 1 waiting on semaphore +sem_test: Starting waiter thread 2 +sem_test: Set thread 2 priority to 128 +waiter_func: Thread 2 Started +waiter_func: Thread 2 initial semaphore value = -1 +waiter_func: Thread 2 waiting on semaphore +sem_test: Starting poster thread 3 +sem_test: Set thread 3 priority to 64 +poster_func: Thread 3 started +poster_func: Thread 3 semaphore value = -2 +poster_func: Thread 3 posting semaphore +waiter_func: Thread 1 awakened +waiter_func: Thread 1 new semaphore value = -1 +waiter_func: Thread 1 done +poster_func: Thread 3 new semaphore value = -1 +poster_func: Thread 3 semaphore value = -1 +poster_func: Thread 3 posting semaphore +waiter_func: Thread 2 awakened +waiter_func: Thread 2 new semaphore value = 0 +waiter_func: Thread 2 done +poster_func: Thread 3 new semaphore value = 0 +poster_func: Thread 3 done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: condition variable test +cond_test: Initializing mutex +cond_test: Initializing cond +cond_test: Starting waiter +cond_test: Set thread 1 priority to 128 +waiter_thread: Started +cond_test: Starting signaler +cond_test: Set thread 2 priority to 64 +thread_signaler: Started +thread_signaler: Terminating +cond_test: signaler terminated, now cancel the waiter +cond_test: Waiter Signaler +cond_test: Loops 32 32 +cond_test: Errors 0 0 +cond_test: +cond_test: 0 times, waiter did not have to wait for data +cond_test: 0 times, data was already available when the signaler run +cond_test: 0 times, the waiter was in an unexpected state when the signaler ran + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: timed wait test +thread_waiter: Initializing mutex +timedwait_test: Initializing cond +timedwait_test: Starting waiter +timedwait_test: Set thread 2 priority to 177 +thread_waiter: Taking mutex +thread_waiter: Starting 5 second wait for condition +timedwait_test: Joining +tcb=0x8057d0 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf7a +rtcb=8057d0 sigdeliver=13046 sigpendactionq.head=0 +Resuming +thread_waiter: pthread_cond_timedwait timed out +thread_waiter: Releasing mutex +thread_waiter: Exit with status 0x12345678 +timedwait_test: waiter exited with result=12345678 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: message queue test +mqueue_test: Starting receiver +mqueue_test: Set receiver priority to 128 +receiver_thread: Starting +mqueue_test: Starting sender +mqueue_test: Set sender thread priority to 64 +mqueue_test: Waiting for sender to complete +sender_thread: Starting +receiver_thread: mq_receive succeeded on msg 0 +sender_thread: mq_send succeeded on msg 0 +receiver_thread: mq_receive succeeded on msg 1 +sender_thread: mq_send succeeded on msg 1 +receiver_thread: mq_receive succeeded on msg 2 +sender_thread: mq_send succeeded on msg 2 +receiver_thread: mq_receive succeeded on msg 3 +sender_thread: mq_send succeeded on msg 3 +receiver_thread: mq_receive succeeded on msg 4 +sender_thread: mq_send succeeded on msg 4 +receiver_thread: mq_receive succeeded on msg 5 +sender_thread: mq_send succeeded on msg 5 +receiver_thread: mq_receive succeeded on msg 6 +sender_thread: mq_send succeeded on msg 6 +receiver_thread: mq_receive succeeded on msg 7 +sender_thread: mq_send succeeded on msg 7 +receiver_thread: mq_receive succeeded on msg 8 +sender_thread: mq_send succeeded on msg 8 +receiver_thread: mq_receive succeeded on msg 9 +sender_thread: mq_send succeeded on msg 9 +sender_thread: returning ntcb=0x8057d0 sigdeliver=0x13046 +rtcb=0x806e30 current_regs=0x0 +rtcb=8057d0 sigdeliver=13046 sigpendactionq.head=0 +Resuming +errors=0 +mqueue_test: Killing receiver +receiver_thread: mq_receive interrupted! +receiver_thread: returning nerrors=0 +mqueue_test: Canceling receiver +mqueue_test: receiver has already terminated + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: timed message queue test +timedmqueue_test: Starting sender +sender_thread: Starting +sender_thread: mq_timedsend succeeded on msg 0 +sender_thread: mq_timedsend succeeded on msg 1 +timedmqueue_test: Waiting for sender to complete +sender_thread: mq_timedsend succeeded on msg 2 +sender_thread: mq_timedsend succeeded on msg 3 +sender_thread: mq_timedsend succeeded on msg 4 +sender_thread: mq_timedsend succeeded on msg 5 +sender_thread: mq_timedsend succeeded on msg 6 +sender_thread: mq_timedsend succeeded on msg 7 +sender_thread: mq_timedsend succeeded on msg 8 +sender_thread: mq_timedsend 9 timed out as expected +sender_thread: returning nerrors=0 +timedmqueue_test: Starting receiver +receiver_thread: Starting +receiver_thread: mq_timedreceive succeeded on msg 0 +receiver_thread: mq_timedreceive succeeded on msg 1 +receiver_thread: mq_timedreceive succeeded on msg 2 +receiver_thread: mq_timedreceive succeeded on msg 3 +timedmqueue_test: Waiting for receiver to complete +receiver_thread: mq_timedreceive succeeded on msg 4 +receiver_thread: mq_timedreceive succeeded on msg 5 +receiver_thread: mq_timedreceive succeeded on msg 6 +receiver_thread: mq_timedreceive succeeded on msg 7 +receiver_thread: mq_timedreceive succeeded on msg 8 +receiver_thread: Receive 9 timed out as expected +receiver_thread: returning nerrors=0 +timedmqueue_test: Test complete + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: signal handler test +sighand_test: Initializing semaphore to 0 +sighand_test: Starting waiter task +sighand_test: Started waiter_main pid=20 +waiter_main: Waiter started +waiter_main: Unmasking signal 17 +waiter_main: Registering signal handler +waiter_main: oact.sigaction=0 oact.sa_flags=0 oact.sa_mask=0 +waiter_main: Waiting on semaphore +tcb=0x8057d0 sigdeliver=0x13046 +rtcb=0x806e30 current_regs=0x0 +sighand_test: Signaling pid=20 with signo=17 sigvalue=42 +rtcb=8057d0 sigdeliver=13046 sigpendactionq.head=804b10 +Resuming +wakeup_action: Received signal 17 +wakeup_action: sival_int=42 +wakeup_action: si_code=1 +wakeup_action: ucontext=0 +waiter_main: sem_wait() successfully interrupted by signal +waiter_main: done +sighand_test: done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 4 +mxordblk 76b20 76b20 +uordblks 3380 35c0 +fordblks 781d0 77f90 + +user_main: POSIX timer test +timer_test: Initializing semaphore to 0 +timer_test: Unmasking signal 17 +timer_test: Registering signal handler +timer_test: oact.sigaction=0 oact.sa_flags=0 oact.sa_mask=0 +timer_test: Creating timer +timer_test: Starting timer +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf7a +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b23 +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=1 +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf7a +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b36 +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=2 +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf7a +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b49 +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=3 +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf76 +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b5c +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=4 +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf66 +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b6f +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=5 +timer_test: Deleting timer +timer_test: done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 4 4 +mxordblk 76b20 76b20 +uordblks 35c0 35c0 +fordblks 77f90 77f90 + +user_main: round-robin scheduler test +rr_test: Starting sieve1 thread +rr_test: Set thread priority to 1 +rr_test: Set thread policty to SCHED_RR +rr_test: Starting sieve1 thread +sieve1 started +rr_test: Waiting for sieves to complete -- this should take awhile +rr_test: If RR scheduling is working, they should start and complete at +rr_test: about the same time +sieve2 started +sieve1 finished +sieve2 finished +rr_test: Done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 4 4 +mxordblk 76b20 76b20 +uordblks 35c0 35c0 +fordblks 77f90 77f90 + +user_main: barrier test +barrier_test: Initializing barrier +barrier_func: Thread 0 started +barrier_test: Thread 0 created +barrier_func: Thread 1 started +barrier_test: Thread 1 created +barrier_func: Thread 2 started +barrier_test: Thread 2 created +barrier_func: Thread 3 started +barrier_test: Thread 3 created +barrier_func: Thread 0 calling pthread_barrier_wait() +barrier_func: Thread 1 calling pthread_barrier_wait() +barrier_func: Thread 2 calling pthread_barrier_wait() +barrier_func: Thread 4 started +barrier_test: Thread 4 created +barrier_func: Thread 3 calling pthread_barrier_wait() +barrier_func: Thread 4 calling pthread_barrier_wait() +barrier_func: Thread 5 started +barrier_test: Thread 5 created +barrier_func: Thread 6 started +barrier_test: Thread 6 created +barrier_func: Thread 7 started +barrier_test: Thread 7 created +barrier_func: Thread 5 calling pthread_barrier_wait() +barrier_func: Thread 6 calling pthread_barrier_wait() +barrier_func: Thread 7 calling pthread_barrier_wait() +barrier_func: Thread 7, back with status=PTHREAD_BARRIER_SERIAL_THREAD (I AM SPECIAL) +barrier_func: Thread 0, back with status=0 (I am not special) +barrier_func: Thread 1, back with status=0 (I am not special) +barrier_func: Thread 2, back with status=0 (I am not special) +barrier_func: Thread 3, back with status=0 (I am not special) +barrier_func: Thread 4, back with status=0 (I am not special) +barrier_func: Thread 5, back with status=0 (I am not special) +barrier_func: Thread 6, back with status=0 (I am not special) +barrier_func: Thread 2 done +barrier_func: Thread 7 done +barrier_func: Thread 0 done +barrier_func: Thread 1 done +barrier_func: Thread 6 done +barrier_func: Thread 3 done +barrier_func: Thread 4 done +barrier_func: Thread 5 done +barrier_test: Thread 0 completed with result=0 +barrier_test: Thread 1 completed with result=0 +barrier_test: Thread 2 completed with result=0 +barrier_test: Thread 3 completed with result=0 +barrier_test: Thread 4 completed with result=0 +barrier_test: Thread 5 completed with result=0 +barrier_test: Thread 6 completed with result=0 +barrier_test: Thread 7 completed with result=0 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 4 4 +mxordblk 76b20 76b20 +uordblks 35c0 35c0 +fordblks 77f90 77f90 + +Final memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 2 4 +mxordblk 76b20 76b20 +uordblks 33d0 35c0 +fordblks 78180 77f90 +user_main: Exitting + diff --git a/configs/ez80f910200kitg/scripts/setenv.bat b/configs/ez80f910200kitg/scripts/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..3a1b987b4d010a696fc773a126b69848b4c42fd2 --- /dev/null +++ b/configs/ez80f910200kitg/scripts/setenv.bat @@ -0,0 +1,50 @@ +@echo off + +rem configs/ez80f810200kitg/scripts/setenv.bat +rem +rem Copyright (C) 2012 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the ZDS-II toolchain. + +set PATH=C:\Program Files (x86)\ZiLOG\ZDSII_eZ80Acclaim!_5.1.1\bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% +echo %PATH% diff --git a/configs/ez80f910200kitg/src/.gitignore b/configs/ez80f910200kitg/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..b268f1933d708a67c74e5ee0c84ab7447e0ee575 --- /dev/null +++ b/configs/ez80f910200kitg/src/.gitignore @@ -0,0 +1,4 @@ +/Make.dep +/.depend +/*.obj + diff --git a/configs/ez80f910200kitg/src/Makefile b/configs/ez80f910200kitg/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..33b0864cfc6ee461880fc247ec69ba9aa21e61c7 --- /dev/null +++ b/configs/ez80f910200kitg/src/Makefile @@ -0,0 +1,41 @@ +############################################################################ +# configs/ez80f910200kitg/Makefile +# +# Copyright (C) 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = ez80_lowinit.c ez80_leds.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/ez80f910200kitg/src/ez80_leds.c b/configs/ez80f910200kitg/src/ez80_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..2543c5d5934b67787d6fa18e1b28d041c8833c2f --- /dev/null +++ b/configs/ez80f910200kitg/src/ez80_leds.c @@ -0,0 +1,91 @@ +/**************************************************************************** + * configs/ez80f910200kitg/src/ez80_leds.c + * + * Copyright (C) 2008-2009, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ +} +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/ez80f910200kitg/src/ez80_lowinit.c b/configs/ez80f910200kitg/src/ez80_lowinit.c new file mode 100644 index 0000000000000000000000000000000000000000..bd41a9542bd5f846987bb0b38412e31e336a7849 --- /dev/null +++ b/configs/ez80f910200kitg/src/ez80_lowinit.c @@ -0,0 +1,66 @@ +/**************************************************************************** + * configs/ez80f910200kitg/src/ez80_lowinit.c + * + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Based upon sample code included with the Zilog ZDS-II toolchain. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "chip/chip.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static void ez80_gpioinit(void) +{ +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void ez80_lowinit(void) +{ + ez80_gpioinit(); +} + diff --git a/configs/ez80f910200zco/Kconfig b/configs/ez80f910200zco/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/ez80f910200zco/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/ez80f910200zco/README.txt b/configs/ez80f910200zco/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..cf53682bcfa952682fb98bd446ff82fc1b8f7ff6 --- /dev/null +++ b/configs/ez80f910200zco/README.txt @@ -0,0 +1,133 @@ +README.txt +^^^^^^^^^^ + +ZDS-II Compiler Versions +^^^^^^^^^^^^^^^^^^^^^^^^ + +Different configurations have been build for this board using ZDS-11 +Versions 4.11.0, 4.11.1, and 5.1.1 You have to check the files */Make.defs +to see how the build is configured: Check the definitions of +ZDSVERSION (if present) and ZDSINSTALLDIR. + +NOTE: Different versions of the ZDS-II compiler may also require +different versions of .linkcmd and .zdsproj files as well. + +Version 4.11.0 + + The 5.1.1 version of the ZDS-II tools are currently configured for + all ez80 boards. However, it is the older version 4.11.0 that this code + has been verified against. + + Although it compiles without error, the 4.11.0 compiler generates + bad code on one of the files, mm/mm_initialize.c. Below is a simple work- + around. + + --- mm/mm_initialize.c.SAVE 2008-02-13 08:06:46.833857700 -0600 + +++ mm/mm_initialize.c 2008-02-13 08:07:26.367608900 -0600 + @@ -94,8 +94,11 @@ + { + int i; + + +#if 0 /* DO NOT CHECK IN */ + CHECK_ALLOCNODE_SIZE; + CHECK_FREENODE_SIZE; + +#endif + + /* Set up global variables */ + + UPDATE: I don't know if 4.11.1 has this same problem (I bet not since + I submitted the bug to ZiLOG), but I have permanently worked around the + above problem for all ZiLOG compilers. + +Version 5.1.1 + + On June 22, 2011 I verified that these configurations build successfully + with the 5.1.1 ZDS-II version. On November 12, 2012, all of the configurations + were converted to use 5.1.1, but have not been verified on a running target. + + The above kludge for 4.11.0 is not required with 5.1.1. + + Paths were also updated that are specific to a 32-bit toolchain running on + a 64 bit windows platform. Change to a different toolchain, you will need + to modify the versioning in Make.defs and setenv.sh; if you want to build + on a different platform, you will need to change the path in the ZDS binaries + in those same files. + +Version 5.2.1 + + On January 31, 2016, I tried ZDS-II version 5.2.1. I believe that I have + all of the changes in place to support that version. At compile time, + however, I encountered compiler internal errors. I did not pursue that + build any further. + +Other Versions + If you use any version of ZDS-II other than 5.1.1 or 5.2.1 or if you install + ZDS-II at any location other than the default location, you will have to + modify one or more of three files: (1) configs/ez80f910200zco/*/setenv.sh, + (2) configs/ez80f910200zco/*/Make.defs, and arch/z80/src/ez80/Toolchain.defs. + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. src/ and include/ + + These directories contain common logic for all ez80f910200zco + configurations. + + 2. Variations on the basic ez80f910200zco configuration are maintained + in subdirectories. To configure any specific configuration, do the + following steps: + + cd /tools + ./configure.sh ez80f910200zco/ + cd + make + + Where is the specific board configuration that you + wish to build. The available board-specific configurations are + summarized in the following paragraph. + + Use configure.bat instead of configure.sh if you are building in a + native Windows environment. + + 3. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + +Configuration Subdirectories +---------------------------- + + dhcpd: + This builds the DCHP server using the examples/dhcpd application + (for execution from FLASH.) See apps/examples/README.txt for information + about the dhcpd example. + + httpd: + This builds the uIP web server example using the examples/webserver application + (for execution from FLASH). See apps/examples/README.txt for information + about httpd. + + nsh: + This configuration builds the NuttShell (NSH). That code can be + found in examples/nsh. For more information see: examples/nsh/README.txt + and Documentation/NuttShell.html. + + nettest: + This configuration is used for testing the eZ80F91 EMAC driver. It + builds examples/nettest. See examples/README.txt for more information + about nettest. + + poll: + This configuration is also used for testing the eZ80F91 EMAC driver. It + builds examples/poll. See examples/README.txt for more information + about the poll test. + +Check out any README.txt files in these s. diff --git a/configs/ez80f910200zco/dhcpd/.gitignore b/configs/ez80f910200zco/dhcpd/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..690992cd3c4b0b8f68227dc994dd2164e777d971 --- /dev/null +++ b/configs/ez80f910200zco/dhcpd/.gitignore @@ -0,0 +1,7 @@ +dhcpd.hex +dhcpd.map +dhcpd.lod +dhcpd.wsp +*.asm +Debug + diff --git a/configs/ez80f910200zco/dhcpd/Make.defs b/configs/ez80f910200zco/dhcpd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..9a594e869154635794912d4ec3134601268b7b35 --- /dev/null +++ b/configs/ez80f910200zco/dhcpd/Make.defs @@ -0,0 +1,276 @@ +############################################################################ +# configs/ez80f910200zco/dhcpd/Make.defs +# +# Copyright (C) 2009, 2012-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk + +# These are the directories where the ZDS-II toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_EZ80_ZDSII_V521),y) +ZDSVERSION := 5.2.1 +else # ifeq ($(CONFIGEZ80_ZDSII_V511),y) +ZDSVERSION := 5.1.1 +endif + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + ZDSINSTALLDIR := C:/PROGRA~2/ZiLOG/ZDSII_eZ80Acclaim!_$(ZDSVERSION) + INSTALLDIR = ${shell echo $(ZDSINSTALLDIR)| sed -e "s/\//\\/g"} + ZDSBINDIR := $(INSTALLDIR)\bin + ZDSSTDINCDIR := $(INSTALLDIR)\include\std + ZDSZILOGINCDIR := $(INSTALLDIR)\include\zilog + ZDSSTDLIBDIR := $(INSTALLDIR)\lib\std + ZDSZILOGLIBDIR := $(INSTALLDIR)\lib\zilog + + # CFLAGs + + ARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + EARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHSTDINCLUDES = -stdinc:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHUSRINCLUDES = -usrinc:. +else + WINTOOL := y + ZDSINSTALLDIR := C:/PROGRA~2/ZiLOG/ZDSII_eZ80Acclaim!_$(ZDSVERSION) + INSTALLDIR = ${shell cygpath -u "$(ZDSINSTALLDIR)"} + ZDSBINDIR := $(INSTALLDIR)/bin + ZDSSTDINCDIR := $(INSTALLDIR)/include/std + ZDSZILOGINCDIR := $(INSTALLDIR)/include/zilog + ZDSSTDLIBDIR := $(INSTALLDIR)/lib/std + ZDSZILOGLIBDIR := $(INSTALLDIR)/lib/zilog + + # These are the same directories but with the directory separator + # character swapped as needed by the ZDS-II compiler + + WTOPDIR := ${shell cygpath -w "$(TOPDIR)"} + WZDSSTDINCDIR := ${shell cygpath -w "$(ZDSSTDINCDIR)"} + WZDSZILOGINCDIR := ${shell cygpath -w "$(ZDSZILOGINCDIR)"} + WZDSSTDLIBDIR := ${shell cygpath -w "$(ZDSSTDLIBDIR)"} + WZDSZILOGLIBDIR := ${shell cygpath -w "$(ZDSZILOGLIBDIR)"} + + # Escaped versions + + ETOPDIR := ${shell echo "$(WTOPDIR)" | sed -e "s/ /%20/g"} + EZDSSTDINCDIR := ${shell echo "$(WZDSSTDINCDIR)" | sed -e "s/ /%20/g"} + EZDSZILOGINCDIR := ${shell echo "$(WZDSZILOGINCDIR)" | sed -e "s/ /%20/g"} + + # CFLAGs + + ARCHASMINCLUDES = -include:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + EARCHASMINCLUDES = -include:'$(ETOPDIR)\include;$(EZDSSTDINCDIR);$(EZDSZILOGINCDIR)' + ARCHSTDINCLUDES = -stdinc:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + ARCHUSRINCLUDES = -usrinc:'.' +endif + +# Assembler definitions + +ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y) + ARCHCPU = eZ80F91 + ARCHCPUDEF = _EZ80F91 + ARCHFAMILY = _EZ80ACCLAIM! +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHASMOPTIMIZATION = -debug -NOsdiopt +else + ARCHASMOPTIMIZATION = -nodebug -NOsdiopt +endif + +ARCHASMCPUFLAGS = -cpu:$(ARCHCPU) -NOigcase +ARCHASMLIST = -list -NOlistmac -name -pagelen:56 -pagewidth:80 -quiet +ARCHASMWARNINGS = -warn +ARCHASMDEFINES = -define:$(ARCHCPUDEF)=1 -define:$(ARCHFAMILYDEF)=1 -define:__ASSEMBLY__ +AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION) + +# Compiler definitions + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -debug +else + ARCHOPTIMIZATION = -nodebug +endif + +ifeq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -reduceopt +else + ARCHOPTIMIZATION += -optsize +endif + +ARCHCPUFLAGS = -chartype:S -promote -cpu:$(ARCHCPU) -NOgenprintf -NOmodsect \ + -asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)" +ARCHLIST = -keeplst -NOlist -NOlistinc -keepasm +ARCHPICFLAGS = +ARCHWARNINGS = -warn +ARCHDEFINES = -define:$(ARCHCPUDEF) -define:$(ARCHFAMILYDEF) +ARCHINCLUDES = $(ARCHSTDINCLUDES) $(ARCHUSRINCLUDES) +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHLIST) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) + +CPPDEFINES = -D$(ARCHFAMILYDEF) -D$(ARCHCPUDEF) -D__ASSEMBLY__ +CPPINCLUDES = -I$(TOPDIR)$(DELIM)include +CPPFLAGS = $(CPPDEFINES) $(CPPINCLUDES) + +# Librarian definitions + +ARFLAGS = -quiet -warn + +# Linker definitions + +LINKCMDTEMPLATE = $(TOPDIR)$(DELIM)configs$(DELIM)ez80f910200zco$(DELIM)dhcpd$(DELIM)dhcpd.linkcmd + +# Tool names/pathes + +CROSSDEV = +CC = ez80cc.exe +CPP = gcc -E +LD = ez80link.exe +AS = ez80asm.exe +AR = ez80lib.exe + +# File extensions + +ASMEXT = .asm +OBJEXT = .obj +LIBEXT = .lib +EXEEXT = .lod +HEXEXT = .hex + +# These are the macros that will be used in the NuttX make system +# to compile and assembly source files and to insert the resulting +# object files into an archive + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + +define PREPROCESS + @echo CPP: $1->$2 + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) "$(CC)" $(CFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define ASSEMBLE + $(Q) "$(AS)" $(AFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + @echo AR: $2 + $(Q) for %%G in ($(2)) do ( "$(AR)" $(ARFLAGS) $1=-+%%G ) +endef + +define CLEAN + $(Q) if exist *.obj (del /f /q *.obj) + $(Q) if exist *.src (del /f /q *.src) + $(Q) if exist *.lib (del /f /q *.lib) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.lod (del /f /q *.lod) + $(Q) if exist *.lst (del /f /q *.lst) +endef + +else + +define PREPROCESS + @echo "CPP: $1->$2" + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) (wfile=`cygpath -w "$1"`; "$(CC)" $(CFLAGS) $$wfile) +endef + +define ASSEMBLE + $(Q) (wfile=`cygpath -w "$1"`; "$(AS)" $(AFLAGS) $$wfile) +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + $(Q) for __obj in $(2) ; do \ + echo "AR: $$__obj"; \ + "$(AR)" $(ARFLAGS) $1=-+$$__obj || { echo "$(AR) $1=-+$$__obj FAILED!" ; exit 1 ; } \ + done +endef + +define CLEAN + $(Q) rm -f *.obj *.src *.lib *.hex *.lod *.lst +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + #MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mknulldeps.sh +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mknulldeps.sh + + # ZDS-II cannot follow Cygwin soft links, so we will have to use directory copies + + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh +endif diff --git a/configs/ez80f910200zco/dhcpd/README.txt b/configs/ez80f910200zco/dhcpd/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..36fcb101a835811d383b454147827589b3c85956 --- /dev/null +++ b/configs/ez80f910200zco/dhcpd/README.txt @@ -0,0 +1,5 @@ +README.txt +^^^^^^^^^^ + +dhcpd.zdsproj is a simple ZDS-II project that will allow you + to use the ZDS-II debugger. diff --git a/configs/ez80f910200zco/dhcpd/defconfig b/configs/ez80f910200zco/dhcpd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..7767fcc543a187f052d1c3088cbcf308227fcb1b --- /dev/null +++ b/configs/ez80f910200zco/dhcpd/defconfig @@ -0,0 +1,846 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="ez80" +# CONFIG_ARCH_CHIP_Z80 is not set +# CONFIG_ARCH_CHIP_Z8018006VSG is not set +# CONFIG_ARCH_CHIP_Z8018010VSG is not set +# CONFIG_ARCH_CHIP_Z8018008VSG is not set +# CONFIG_ARCH_CHIP_Z8018010FSG is not set +# CONFIG_ARCH_CHIP_Z8018008VEG is not set +# CONFIG_ARCH_CHIP_Z8018006VEG is not set +# CONFIG_ARCH_CHIP_Z8018006PSG is not set +# CONFIG_ARCH_CHIP_Z8018008FSG is not set +# CONFIG_ARCH_CHIP_Z8018010PSG is not set +# CONFIG_ARCH_CHIP_Z8018006PEG is not set +# CONFIG_ARCH_CHIP_Z8018010VEG is not set +# CONFIG_ARCH_CHIP_Z8018010PEG is not set +# CONFIG_ARCH_CHIP_Z8018008PSG is not set +# CONFIG_ARCH_CHIP_Z8018006FSG is not set +# CONFIG_ARCH_CHIP_Z8018000XSO is not set +# CONFIG_ARCH_CHIP_Z8018010FEG is not set +# CONFIG_ARCH_CHIP_Z8018000WSO is not set +# CONFIG_ARCH_CHIP_Z8018008PEG is not set +# CONFIG_ARCH_CHIP_Z8018110FEG is not set +# CONFIG_ARCH_CHIP_Z8018233FSG is not set +# CONFIG_ARCH_CHIP_Z8018220AEG is not set +# CONFIG_ARCH_CHIP_Z8018216FSG is not set +# CONFIG_ARCH_CHIP_Z8018216ASG is not set +# CONFIG_ARCH_CHIP_Z8018233ASG is not set +# CONFIG_ARCH_CHIP_Z8019520FSG is not set +# CONFIG_ARCH_CHIP_Z8019533FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020VSG is not set +# CONFIG_ARCH_CHIP_Z8L18020FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020PSG is not set +# CONFIG_ARCH_CHIP_Z8L18220ASG is not set +# CONFIG_ARCH_CHIP_Z8L18220FSG is not set +# CONFIG_ARCH_CHIP_Z8L18220AEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG1960 is not set +# CONFIG_ARCH_CHIP_Z8S18033VSG is not set +# CONFIG_ARCH_CHIP_Z8S18010FSG is not set +# CONFIG_ARCH_CHIP_Z8S18010VEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020PSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FEG is not set +# CONFIG_ARCH_CHIP_Z8S18020FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PSG is not set +# CONFIG_ARCH_CHIP_Z8S18020FEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PEG is not set +# CONFIG_ARCH_CHIP_Z8S18010FEG is not set +# CONFIG_ARCH_CHIP_Z8F6403 is not set +# CONFIG_ARCH_CHIP_Z8F6423 is not set +CONFIG_ARCH_CHIP_EZ80F91=y +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +CONFIG_ARCH_CHIP_EZ80=y +CONFIG_HAVE_LOWSERIALINIT=y + +# +# ez80 Peripheral Support +# +CONFIG_EZ80_UART0=y +# CONFIG_EZ80_UART1 is not set +# CONFIG_EZ80_UART2 is not set +CONFIG_EZ80_EMAC=y +CONFIG_EZ80_TOOLCHAIN_ZDSII=y +CONFIG_EZ80_FIAD=0x1f +CONFIG_EZ80_PHYCONFIG=1 +CONFIG_EZ80_RAMADDR=0xf7c000 +CONFIG_EZ80_PKTBUFSIZE=64 +CONFIG_EZ80_NTXPKTBUFS=64 +CONFIG_EZ80_NRXPKTBUFS=64 +CONFIG_EZ80_MDCDIV=0 +CONFIG_EZ80_TXPOLLTIMERMS=10 +# CONFIG_ARCH_MCFILTER is not set +CONFIG_ARCH_TIMERHOOK=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_EZ80F910200KITG is not set +CONFIG_ARCH_BOARD_EZ80F910200ZCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ez80f910200zco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=14 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="dhcpd_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_LATEINIT is not set +# CONFIG_NET_DUMPPACKET is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +CONFIG_ETH0_PHY_AM79C874=y +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_NETDEV_PHY_DEBUG is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=0 +CONFIG_UART0_TXBUFSIZE=0 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=0 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +# CONFIG_NET_TCP is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set +# CONFIG_NET_ARP_DUMP is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=8 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_IOB_DEBUG is not set +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_DNSCLIENT is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +CONFIG_EXAMPLES_DHCPD=y +CONFIG_EXAMPLES_DHCPD_NOMAC=y +CONFIG_EXAMPLES_DHCPD_IPADDR=0x0a000001 +CONFIG_EXAMPLES_DHCPD_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +CONFIG_NETUTILS_DHCPD=y +# CONFIG_NETUTILS_DHCPD_IGNOREBROADCAST is not set +CONFIG_NETUTILS_DHCPD_INTERFACE="eth0" +CONFIG_NETUTILS_DHCPD_LEASETIME=864000 +CONFIG_NETUTILS_DHCPD_MINLEASETIME=86400 +CONFIG_NETUTILS_DHCPD_MAXLEASETIME=2592000 +CONFIG_NETUTILS_DHCPD_MAXLEASES=6 +CONFIG_NETUTILS_DHCPD_STARTIP=0x0a000002 +CONFIG_NETUTILS_DHCPD_ROUTERIP=0x0a000001 +CONFIG_NETUTILS_DHCPD_NETMASK=0xffffff00 +CONFIG_NETUTILS_DHCPD_DNSIP=0x08080808 +CONFIG_NETUTILS_DHCPD_OFFERTIME=3600 +CONFIG_NETUTILS_DHCPD_DECLINETIME=3600 +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ez80f910200zco/dhcpd/dhcpd.linkcmd b/configs/ez80f910200zco/dhcpd/dhcpd.linkcmd new file mode 100644 index 0000000000000000000000000000000000000000..9a4ae3a77d6d89490187ac6e2589ad1c4baea09a --- /dev/null +++ b/configs/ez80f910200zco/dhcpd/dhcpd.linkcmd @@ -0,0 +1,94 @@ +/****************************************************************************/ +/* configs/ez80f910200zco/dhcpd/dhcpd.linkcmd */ +/* */ +/* Copyright (C) 2009 Gregory Nutt. All rights reserved. */ +/* Author: Gregory Nutt */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* 1. Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in */ +/* the documentation and/or other materials provided with the */ +/* distribution. */ +/* 3. Neither the name NuttX nor the names of its contributors may be */ +/* used to endorse or promote products derived from this software */ +/* without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ +/* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS */ +/* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE */ +/* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */ +/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, */ +/* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS */ +/* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED */ +/* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT */ +/* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN */ +/* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */ +/* POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/****************************************************************************/ + +-FORMAT=OMF695,INTEL32 +-map -maxhexlen=64 -quiet -NOwarnoverlap -xref -unresolved=fatal +-sort ADDRESS=ascending -warn -NOdebug -NOigcase + +RANGE ROM $000000 : $03FFFF +RANGE RAM $B80000 : $BFFFFF +RANGE EXTIO $000000 : $00FFFF +RANGE INTIO $000000 : $0000FF + +CHANGE STRSECT is ROM + +ORDER .RESET,.IVECTS,.STARTUP,CODE,DATA +COPY DATA ROM + +DEFINE __low_romdata = copy base of DATA +DEFINE __low_data = base of DATA +DEFINE __len_data = length of DATA +DEFINE __low_bss = base of BSS +DEFINE __len_bss = length of BSS +DEFINE __stack = highaddr of RAM + 1 +DEFINE __heaptop = highaddr of RAM +DEFINE __heapbot = top of RAM + 1 +DEFINE __low_romcode = copy base of CODE +DEFINE __low_code = base of CODE +DEFINE __len_code = length of CODE +DEFINE __copy_code_to_ram = 0 +DEFINE __crtl = 1 +DEFINE __CS0_LBR_INIT_PARAM = $10 +DEFINE __CS0_UBR_INIT_PARAM = $1f +DEFINE __CS0_CTL_INIT_PARAM = $a8 +DEFINE __CS0_BMC_INIT_PARAM = $02 +DEFINE __CS1_LBR_INIT_PARAM = $c0 +DEFINE __CS1_UBR_INIT_PARAM = $c7 +DEFINE __CS1_CTL_INIT_PARAM = $28 +DEFINE __CS1_BMC_INIT_PARAM = $02 +DEFINE __CS2_LBR_INIT_PARAM = $80 +DEFINE __CS2_UBR_INIT_PARAM = $bf +DEFINE __CS2_CTL_INIT_PARAM = $28 +DEFINE __CS2_BMC_INIT_PARAM = $81 +DEFINE __CS3_LBR_INIT_PARAM = $00 +DEFINE __CS3_UBR_INIT_PARAM = $00 +DEFINE __CS3_CTL_INIT_PARAM = $00 +DEFINE __CS3_BMC_INIT_PARAM = $02 +DEFINE __RAM_CTL_INIT_PARAM = $C0 +DEFINE __RAM_ADDR_U_INIT_PARAM = $B7 +DEFINE __FLASH_CTL_INIT_PARAM = $68 +DEFINE __FLASH_ADDR_U_INIT_PARAM = $00 + +define _SYS_CLK_FREQ = 50000000 + +define _OSC_FREQ = 50000000 +define _SYS_CLK_SRC = 0 +define _OSC_FREQ_MULT = 1 +define __PLL_CTL0_INIT_PARAM = $40 + +define _zsl_g_clock_xdefine = 50000000 + +/* arch/z80/src/Makefile.zdsii will append target, object and library paths below */ + diff --git a/configs/ez80f910200zco/dhcpd/dhcpd.zdsproj b/configs/ez80f910200zco/dhcpd/dhcpd.zdsproj new file mode 100644 index 0000000000000000000000000000000000000000..731826088893601b238ba47eb03db4a14c9d7daa --- /dev/null +++ b/configs/ez80f910200zco/dhcpd/dhcpd.zdsproj @@ -0,0 +1,247 @@ + +eZ80F91 + + + +..\..\..\nuttx.hex + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/configs/ez80f910200zco/dhcpd/setenv.sh b/configs/ez80f910200zco/dhcpd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..db5ea60ff84096fa90f8bc00c436ba8b3fafb9fc --- /dev/null +++ b/configs/ez80f910200zco/dhcpd/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/ez80f910200zco/dhcpd/setenv.sh +# +# Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# Check how we were executed +# +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# +# This is the Cygwin path to location where the XDS-II tools were installed +# +#TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_eZ80Acclaim!_5.1.1\bin" +TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_eZ80Acclaim!_5.2.1/bin" + +# +# Add the path to the toolchain to the PATH varialble. NOTE that /bin and /usr/bin +# preceded the toolchain bin directory. This is because the ZDSII bin directory +# includes binaries like make.exe that will interfere with the normal build process +# if we do not give priority to the versions at /bin and /usr/bin. +# +export PATH="/bin:/usr/bin:${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/ez80f910200zco/httpd/.gitignore b/configs/ez80f910200zco/httpd/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..2510450fb096d1368529883051efdb8d8cb27e9a --- /dev/null +++ b/configs/ez80f910200zco/httpd/.gitignore @@ -0,0 +1,7 @@ +httpd.hex +httpd.map +httpd.lod +httpd.wsp +*.asm +Debug + diff --git a/configs/ez80f910200zco/httpd/Make.defs b/configs/ez80f910200zco/httpd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..56df2ec1a6de6c6d4a22c9f707c8d740f78dc0df --- /dev/null +++ b/configs/ez80f910200zco/httpd/Make.defs @@ -0,0 +1,276 @@ +############################################################################ +# configs/ez80f910200zco/httpd/Make.defs +# +# Copyright (C) 2009, 2012-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk + +# These are the directories where the ZDS-II toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_EZ80_ZDSII_V521),y) +ZDSVERSION := 5.2.1 +else # ifeq ($(CONFIGEZ80_ZDSII_V511),y) +ZDSVERSION := 5.1.1 +endif + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + ZDSINSTALLDIR := C:/PROGRA~2/ZiLOG/ZDSII_eZ80Acclaim!_$(ZDSVERSION) + INSTALLDIR = ${shell echo $(ZDSINSTALLDIR)| sed -e "s/\//\\/g"} + ZDSBINDIR := $(INSTALLDIR)\bin + ZDSSTDINCDIR := $(INSTALLDIR)\include\std + ZDSZILOGINCDIR := $(INSTALLDIR)\include\zilog + ZDSSTDLIBDIR := $(INSTALLDIR)\lib\std + ZDSZILOGLIBDIR := $(INSTALLDIR)\lib\zilog + + # CFLAGs + + ARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + EARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHSTDINCLUDES = -stdinc:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHUSRINCLUDES = -usrinc:. +else + WINTOOL := y + ZDSINSTALLDIR := C:/PROGRA~2/ZiLOG/ZDSII_eZ80Acclaim!_$(ZDSVERSION) + INSTALLDIR = ${shell cygpath -u "$(ZDSINSTALLDIR)"} + ZDSBINDIR := $(INSTALLDIR)/bin + ZDSSTDINCDIR := $(INSTALLDIR)/include/std + ZDSZILOGINCDIR := $(INSTALLDIR)/include/zilog + ZDSSTDLIBDIR := $(INSTALLDIR)/lib/std + ZDSZILOGLIBDIR := $(INSTALLDIR)/lib/zilog + + # These are the same directories but with the directory separator + # character swapped as needed by the ZDS-II compiler + + WTOPDIR := ${shell cygpath -w "$(TOPDIR)"} + WZDSSTDINCDIR := ${shell cygpath -w "$(ZDSSTDINCDIR)"} + WZDSZILOGINCDIR := ${shell cygpath -w "$(ZDSZILOGINCDIR)"} + WZDSSTDLIBDIR := ${shell cygpath -w "$(ZDSSTDLIBDIR)"} + WZDSZILOGLIBDIR := ${shell cygpath -w "$(ZDSZILOGLIBDIR)"} + + # Escaped versions + + ETOPDIR := ${shell echo "$(WTOPDIR)" | sed -e "s/ /%20/g"} + EZDSSTDINCDIR := ${shell echo "$(WZDSSTDINCDIR)" | sed -e "s/ /%20/g"} + EZDSZILOGINCDIR := ${shell echo "$(WZDSZILOGINCDIR)" | sed -e "s/ /%20/g"} + + # CFLAGs + + ARCHASMINCLUDES = -include:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + EARCHASMINCLUDES = -include:'$(ETOPDIR)\include;$(EZDSSTDINCDIR);$(EZDSZILOGINCDIR)' + ARCHSTDINCLUDES = -stdinc:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + ARCHUSRINCLUDES = -usrinc:'.' +endif + +# Assembler definitions + +ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y) + ARCHCPU = eZ80F91 + ARCHCPUDEF = _EZ80F91 + ARCHFAMILY = _EZ80ACCLAIM! +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHASMOPTIMIZATION = -debug -NOsdiopt +else + ARCHASMOPTIMIZATION = -nodebug -NOsdiopt +endif + +ARCHASMCPUFLAGS = -cpu:$(ARCHCPU) -NOigcase +ARCHASMLIST = -list -NOlistmac -name -pagelen:56 -pagewidth:80 -quiet +ARCHASMWARNINGS = -warn +ARCHASMDEFINES = -define:$(ARCHCPUDEF)=1 -define:$(ARCHFAMILYDEF)=1 -define:__ASSEMBLY__ +AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION) + +# Compiler definitions + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -debug +else + ARCHOPTIMIZATION = -nodebug +endif + +ifeq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -reduceopt +else + ARCHOPTIMIZATION += -optsize +endif + +ARCHCPUFLAGS = -chartype:S -promote -cpu:$(ARCHCPU) -NOgenprintf -NOmodsect \ + -asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)" +ARCHLIST = -keeplst -NOlist -NOlistinc -keepasm +ARCHPICFLAGS = +ARCHWARNINGS = -warn +ARCHDEFINES = -define:$(ARCHCPUDEF) -define:$(ARCHFAMILYDEF) +ARCHINCLUDES = $(ARCHSTDINCLUDES) $(ARCHUSRINCLUDES) +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHLIST) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) + +CPPDEFINES = -D$(ARCHFAMILYDEF) -D$(ARCHCPUDEF) -D__ASSEMBLY__ +CPPINCLUDES = -I$(TOPDIR)$(DELIM)include +CPPFLAGS = $(CPPDEFINES) $(CPPINCLUDES) + +# Librarian definitions + +ARFLAGS = -quiet -warn + +# Linker definitions + +LINKCMDTEMPLATE = $(TOPDIR)$(DELIM)configs$(DELIM)ez80f910200zco$(DELIM)httpd$(DELIM)httpd.linkcmd + +# Tool names/pathes + +CROSSDEV = +CC = ez80cc.exe +CPP = gcc -E +LD = ez80link.exe +AS = ez80asm.exe +AR = ez80lib.exe + +# File extensions + +ASMEXT = .asm +OBJEXT = .obj +LIBEXT = .lib +EXEEXT = .lod +HEXEXT = .hex + +# These are the macros that will be used in the NuttX make system +# to compile and assembly source files and to insert the resulting +# object files into an archive + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + +define PREPROCESS + @echo CPP: $1->$2 + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) "$(CC)" $(CFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define ASSEMBLE + $(Q) "$(AS)" $(AFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + @echo AR: $2 + $(Q) for %%G in ($(2)) do ( "$(AR)" $(ARFLAGS) $1=-+%%G ) +endef + +define CLEAN + $(Q) if exist *.obj (del /f /q *.obj) + $(Q) if exist *.src (del /f /q *.src) + $(Q) if exist *.lib (del /f /q *.lib) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.lod (del /f /q *.lod) + $(Q) if exist *.lst (del /f /q *.lst) +endef + +else + +define PREPROCESS + @echo "CPP: $1->$2" + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) (wfile=`cygpath -w "$1"`; "$(CC)" $(CFLAGS) $$wfile) +endef + +define ASSEMBLE + $(Q) (wfile=`cygpath -w "$1"`; "$(AS)" $(AFLAGS) $$wfile) +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + $(Q) for __obj in $(2) ; do \ + echo "AR: $$__obj"; \ + "$(AR)" $(ARFLAGS) $1=-+$$__obj || { echo "$(AR) $1=-+$$__obj FAILED!" ; exit 1 ; } \ + done +endef + +define CLEAN + $(Q) rm -f *.obj *.src *.lib *.hex *.lod *.lst +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + #MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mknulldeps.sh +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mknulldeps.sh + + # ZDS-II cannot follow Cygwin soft links, so we will have to use directory copies + + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh +endif diff --git a/configs/ez80f910200zco/httpd/README.txt b/configs/ez80f910200zco/httpd/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..5bcdc70008dcaf5a3dda2b7460cf6d5a63587245 --- /dev/null +++ b/configs/ez80f910200zco/httpd/README.txt @@ -0,0 +1,5 @@ +README.txt +^^^^^^^^^^ + +httpd.zdsproj is a simple ZDS-II project that will allow you + to use the ZDS-II debugger. diff --git a/configs/ez80f910200zco/httpd/defconfig b/configs/ez80f910200zco/httpd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..084ec33edf6dfa4a7a23e421cbdd02cd41e3a8fa --- /dev/null +++ b/configs/ez80f910200zco/httpd/defconfig @@ -0,0 +1,855 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="ez80" +# CONFIG_ARCH_CHIP_Z80 is not set +# CONFIG_ARCH_CHIP_Z8018006VSG is not set +# CONFIG_ARCH_CHIP_Z8018010VSG is not set +# CONFIG_ARCH_CHIP_Z8018008VSG is not set +# CONFIG_ARCH_CHIP_Z8018010FSG is not set +# CONFIG_ARCH_CHIP_Z8018008VEG is not set +# CONFIG_ARCH_CHIP_Z8018006VEG is not set +# CONFIG_ARCH_CHIP_Z8018006PSG is not set +# CONFIG_ARCH_CHIP_Z8018008FSG is not set +# CONFIG_ARCH_CHIP_Z8018010PSG is not set +# CONFIG_ARCH_CHIP_Z8018006PEG is not set +# CONFIG_ARCH_CHIP_Z8018010VEG is not set +# CONFIG_ARCH_CHIP_Z8018010PEG is not set +# CONFIG_ARCH_CHIP_Z8018008PSG is not set +# CONFIG_ARCH_CHIP_Z8018006FSG is not set +# CONFIG_ARCH_CHIP_Z8018000XSO is not set +# CONFIG_ARCH_CHIP_Z8018010FEG is not set +# CONFIG_ARCH_CHIP_Z8018000WSO is not set +# CONFIG_ARCH_CHIP_Z8018008PEG is not set +# CONFIG_ARCH_CHIP_Z8018110FEG is not set +# CONFIG_ARCH_CHIP_Z8018233FSG is not set +# CONFIG_ARCH_CHIP_Z8018220AEG is not set +# CONFIG_ARCH_CHIP_Z8018216FSG is not set +# CONFIG_ARCH_CHIP_Z8018216ASG is not set +# CONFIG_ARCH_CHIP_Z8018233ASG is not set +# CONFIG_ARCH_CHIP_Z8019520FSG is not set +# CONFIG_ARCH_CHIP_Z8019533FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020VSG is not set +# CONFIG_ARCH_CHIP_Z8L18020FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020PSG is not set +# CONFIG_ARCH_CHIP_Z8L18220ASG is not set +# CONFIG_ARCH_CHIP_Z8L18220FSG is not set +# CONFIG_ARCH_CHIP_Z8L18220AEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG1960 is not set +# CONFIG_ARCH_CHIP_Z8S18033VSG is not set +# CONFIG_ARCH_CHIP_Z8S18010FSG is not set +# CONFIG_ARCH_CHIP_Z8S18010VEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020PSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FEG is not set +# CONFIG_ARCH_CHIP_Z8S18020FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PSG is not set +# CONFIG_ARCH_CHIP_Z8S18020FEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PEG is not set +# CONFIG_ARCH_CHIP_Z8S18010FEG is not set +# CONFIG_ARCH_CHIP_Z8F6403 is not set +# CONFIG_ARCH_CHIP_Z8F6423 is not set +CONFIG_ARCH_CHIP_EZ80F91=y +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +CONFIG_ARCH_CHIP_EZ80=y +CONFIG_HAVE_LOWSERIALINIT=y + +# +# ez80 Peripheral Support +# +CONFIG_EZ80_UART0=y +# CONFIG_EZ80_UART1 is not set +# CONFIG_EZ80_UART2 is not set +CONFIG_EZ80_EMAC=y +CONFIG_EZ80_TOOLCHAIN_ZDSII=y +CONFIG_EZ80_FIAD=0x1f +CONFIG_EZ80_PHYCONFIG=1 +CONFIG_EZ80_RAMADDR=0xf7c000 +CONFIG_EZ80_PKTBUFSIZE=64 +CONFIG_EZ80_NTXPKTBUFS=64 +CONFIG_EZ80_NRXPKTBUFS=64 +CONFIG_EZ80_MDCDIV=0 +CONFIG_EZ80_TXPOLLTIMERMS=10 +# CONFIG_ARCH_MCFILTER is not set +CONFIG_ARCH_TIMERHOOK=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_EZ80F910200KITG is not set +CONFIG_ARCH_BOARD_EZ80F910200ZCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ez80f910200zco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=14 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="webserver_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set +# CONFIG_NET_DUMPPACKET is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +CONFIG_ETH0_PHY_AM79C874=y +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_NETDEV_PHY_DEBUG is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=0 +CONFIG_UART0_TXBUFSIZE=0 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=0 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set +# CONFIG_NET_ARP_DUMP is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_IOB_DEBUG is not set +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +CONFIG_EXAMPLES_WEBSERVER=y +CONFIG_EXAMPLES_WEBSERVER_IPADDR=0x0a000002 +CONFIG_EXAMPLES_WEBSERVER_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_WEBSERVER_NETMASK=0xffffff00 +CONFIG_EXAMPLES_WEBSERVER_NOMAC=y +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +CONFIG_NETUTILS_WEBSERVER=y +# CONFIG_NETUTILS_HTTPD_SINGLECONNECT is not set +# CONFIG_NETUTILS_HTTPD_SCRIPT_DISABLE is not set +CONFIG_NETUTILS_HTTPD_MAXPATH=64 +# CONFIG_NETUTILS_HTTPD_CGIPATH is not set +CONFIG_NETUTILS_HTTPD_ERRPATH="" +# CONFIG_NETUTILS_HTTPD_SERVERHEADER_DISABLE is not set +CONFIG_NETUTILS_HTTPD_TIMEOUT=0 +CONFIG_NETUTILS_HTTPD_CLASSIC=y +# CONFIG_NETUTILS_HTTPD_MMAP is not set +# CONFIG_NETUTILS_HTTPD_SENDFILE is not set +CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ez80f910200zco/httpd/httpd.linkcmd b/configs/ez80f910200zco/httpd/httpd.linkcmd new file mode 100644 index 0000000000000000000000000000000000000000..4ecc8f1ca75cd603a8346c266ca13b292675dfd3 --- /dev/null +++ b/configs/ez80f910200zco/httpd/httpd.linkcmd @@ -0,0 +1,94 @@ +/****************************************************************************/ +/* configs/ez80f910200zco/httpd/httpd.linkcmd */ +/* */ +/* Copyright (C) 2009 Gregory Nutt. All rights reserved. */ +/* Author: Gregory Nutt */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* 1. Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in */ +/* the documentation and/or other materials provided with the */ +/* distribution. */ +/* 3. Neither the name NuttX nor the names of its contributors may be */ +/* used to endorse or promote products derived from this software */ +/* without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ +/* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS */ +/* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE */ +/* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */ +/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, */ +/* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS */ +/* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED */ +/* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT */ +/* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN */ +/* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */ +/* POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/****************************************************************************/ + +-FORMAT=OMF695,INTEL32 +-map -maxhexlen=64 -quiet -NOwarnoverlap -xref -unresolved=fatal +-sort ADDRESS=ascending -warn -NOdebug -NOigcase + +RANGE ROM $000000 : $03FFFF +RANGE RAM $B80000 : $BFFFFF +RANGE EXTIO $000000 : $00FFFF +RANGE INTIO $000000 : $0000FF + +CHANGE STRSECT is ROM + +ORDER .RESET,.IVECTS,.STARTUP,CODE,DATA +COPY DATA ROM + +DEFINE __low_romdata = copy base of DATA +DEFINE __low_data = base of DATA +DEFINE __len_data = length of DATA +DEFINE __low_bss = base of BSS +DEFINE __len_bss = length of BSS +DEFINE __stack = highaddr of RAM + 1 +DEFINE __heaptop = highaddr of RAM +DEFINE __heapbot = top of RAM + 1 +DEFINE __low_romcode = copy base of CODE +DEFINE __low_code = base of CODE +DEFINE __len_code = length of CODE +DEFINE __copy_code_to_ram = 0 +DEFINE __crtl = 1 +DEFINE __CS0_LBR_INIT_PARAM = $10 +DEFINE __CS0_UBR_INIT_PARAM = $1f +DEFINE __CS0_CTL_INIT_PARAM = $a8 +DEFINE __CS0_BMC_INIT_PARAM = $02 +DEFINE __CS1_LBR_INIT_PARAM = $c0 +DEFINE __CS1_UBR_INIT_PARAM = $c7 +DEFINE __CS1_CTL_INIT_PARAM = $28 +DEFINE __CS1_BMC_INIT_PARAM = $02 +DEFINE __CS2_LBR_INIT_PARAM = $80 +DEFINE __CS2_UBR_INIT_PARAM = $bf +DEFINE __CS2_CTL_INIT_PARAM = $28 +DEFINE __CS2_BMC_INIT_PARAM = $81 +DEFINE __CS3_LBR_INIT_PARAM = $00 +DEFINE __CS3_UBR_INIT_PARAM = $00 +DEFINE __CS3_CTL_INIT_PARAM = $00 +DEFINE __CS3_BMC_INIT_PARAM = $02 +DEFINE __RAM_CTL_INIT_PARAM = $C0 +DEFINE __RAM_ADDR_U_INIT_PARAM = $B7 +DEFINE __FLASH_CTL_INIT_PARAM = $68 +DEFINE __FLASH_ADDR_U_INIT_PARAM = $00 + +define _SYS_CLK_FREQ = 50000000 + +define _OSC_FREQ = 50000000 +define _SYS_CLK_SRC = 0 +define _OSC_FREQ_MULT = 1 +define __PLL_CTL0_INIT_PARAM = $40 + +define _zsl_g_clock_xdefine = 50000000 + +/* arch/z80/src/Makefile.zdsii will append target, object and library paths below */ + diff --git a/configs/ez80f910200zco/httpd/httpd.zdsproj b/configs/ez80f910200zco/httpd/httpd.zdsproj new file mode 100644 index 0000000000000000000000000000000000000000..8b15962b336e11820ca73596568b522b844bfbe1 --- /dev/null +++ b/configs/ez80f910200zco/httpd/httpd.zdsproj @@ -0,0 +1,247 @@ + +eZ80F91 + + + +..\..\..\nuttx.hex + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/configs/ez80f910200zco/httpd/setenv.sh b/configs/ez80f910200zco/httpd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..2d7aee1ce7bc41c4ca344fb6eb512b6e2880aadf --- /dev/null +++ b/configs/ez80f910200zco/httpd/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/ez80f910200zco/htppd/setenv.sh +# +# Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# Check how we were executed +# +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# +# This is the Cygwin path to location where the XDS-II tools were installed +# +#TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_eZ80Acclaim!_5.1.1\bin" +TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_eZ80Acclaim!_5.2.1/bin" + +# +# Add the path to the toolchain to the PATH varialble. NOTE that /bin and /usr/bin +# preceded the toolchain bin directory. This is because the ZDSII bin directory +# includes binaries like make.exe that will interfere with the normal build process +# if we do not give priority to the versions at /bin and /usr/bin. +# +export PATH="/bin:/usr/bin:${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/ez80f910200zco/include/board.h b/configs/ez80f910200zco/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..2c793be1a0070fafa29d4f98424958008e4afa04 --- /dev/null +++ b/configs/ez80f910200zco/include/board.h @@ -0,0 +1,88 @@ +/**************************************************************************** + * arch/ez80f910200zco/include/board.h + * + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking */ + +#define EZ80_SYS_CLK_FREQ 50000000 + +/* LED pattern definitions ON OFF */ + +#define LED_STARTED 0 /* '0' N/A */ +#define LED_HEAPALLOCATE 1 /* 'H' N/A */ +#define LED_IRQSENABLED 2 /* 'E' N/A */ +#define LED_STACKCREATED 3 /* 'C' N/A */ +#define LED_IDLE 4 /* 'R' N/A */ +#define LED_INIRQ 5 /* (ignored) (ignored) */ +#define LED_ASSERTION 6 /* 'A' (previous) */ +#define LED_SIGNAL 7 /* 'S' (previous) */ +#define LED_PANIC 8 /* '*' (previous) */ + +/* Button definitions */ + +#define BUTTON_PB0 0x01 /* PB0: SW1 Bit 0 of GPIO Port B */ +#define BUTTON_PB1 0x02 /* PB1: SW2 Bit 1 of GPIO Port B */ +#define BUTTON_PB2 0x04 /* PB2: SW3 Bit 2 of GPIO Port B */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/ez80f910200zco/nettest/.gitignore b/configs/ez80f910200zco/nettest/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..7ec38242dd28542faca3cc23f5d8538d71133b83 --- /dev/null +++ b/configs/ez80f910200zco/nettest/.gitignore @@ -0,0 +1,7 @@ +nettest.hex +nettest.map +nettest.lod +nettest.wsp +*.asm +Debug + diff --git a/configs/ez80f910200zco/nettest/Make.defs b/configs/ez80f910200zco/nettest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..7b42fe6edb450b6243c54927adc0913f563efdd4 --- /dev/null +++ b/configs/ez80f910200zco/nettest/Make.defs @@ -0,0 +1,276 @@ +############################################################################ +# configs/ez80f910200zco/nettest/Make.defs +# +# Copyright (C) 2008, 2009, 2012-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk + +# These are the directories where the ZDS-II toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_EZ80_ZDSII_V521),y) +ZDSVERSION := 5.2.1 +else # ifeq ($(CONFIGEZ80_ZDSII_V511),y) +ZDSVERSION := 5.1.1 +endif + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + ZDSINSTALLDIR := C:/PROGRA~2/ZiLOG/ZDSII_eZ80Acclaim!_$(ZDSVERSION) + INSTALLDIR = ${shell echo $(ZDSINSTALLDIR)| sed -e "s/\//\\/g"} + ZDSBINDIR := $(INSTALLDIR)\bin + ZDSSTDINCDIR := $(INSTALLDIR)\include\std + ZDSZILOGINCDIR := $(INSTALLDIR)\include\zilog + ZDSSTDLIBDIR := $(INSTALLDIR)\lib\std + ZDSZILOGLIBDIR := $(INSTALLDIR)\lib\zilog + + # CFLAGs + + ARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + EARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHSTDINCLUDES = -stdinc:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHUSRINCLUDES = -usrinc:. +else + WINTOOL := y + ZDSINSTALLDIR := C:/PROGRA~2/ZiLOG/ZDSII_eZ80Acclaim!_$(ZDSVERSION) + INSTALLDIR = ${shell cygpath -u "$(ZDSINSTALLDIR)"} + ZDSBINDIR := $(INSTALLDIR)/bin + ZDSSTDINCDIR := $(INSTALLDIR)/include/std + ZDSZILOGINCDIR := $(INSTALLDIR)/include/zilog + ZDSSTDLIBDIR := $(INSTALLDIR)/lib/std + ZDSZILOGLIBDIR := $(INSTALLDIR)/lib/zilog + + # These are the same directories but with the directory separator + # character swapped as needed by the ZDS-II compiler + + WTOPDIR := ${shell cygpath -w "$(TOPDIR)"} + WZDSSTDINCDIR := ${shell cygpath -w "$(ZDSSTDINCDIR)"} + WZDSZILOGINCDIR := ${shell cygpath -w "$(ZDSZILOGINCDIR)"} + WZDSSTDLIBDIR := ${shell cygpath -w "$(ZDSSTDLIBDIR)"} + WZDSZILOGLIBDIR := ${shell cygpath -w "$(ZDSZILOGLIBDIR)"} + + # Escaped versions + + ETOPDIR := ${shell echo "$(WTOPDIR)" | sed -e "s/ /%20/g"} + EZDSSTDINCDIR := ${shell echo "$(WZDSSTDINCDIR)" | sed -e "s/ /%20/g"} + EZDSZILOGINCDIR := ${shell echo "$(WZDSZILOGINCDIR)" | sed -e "s/ /%20/g"} + + # CFLAGs + + ARCHASMINCLUDES = -include:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + EARCHASMINCLUDES = -include:'$(ETOPDIR)\include;$(EZDSSTDINCDIR);$(EZDSZILOGINCDIR)' + ARCHSTDINCLUDES = -stdinc:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + ARCHUSRINCLUDES = -usrinc:'.' +endif + +# Assembler definitions + +ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y) + ARCHCPU = eZ80F91 + ARCHCPUDEF = _EZ80F91 + ARCHFAMILY = _EZ80ACCLAIM! +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHASMOPTIMIZATION = -debug -NOsdiopt +else + ARCHASMOPTIMIZATION = -nodebug -NOsdiopt +endif + +ARCHASMCPUFLAGS = -cpu:$(ARCHCPU) -NOigcase +ARCHASMLIST = -list -NOlistmac -name -pagelen:56 -pagewidth:80 -quiet +ARCHASMWARNINGS = -warn +ARCHASMDEFINES = -define:$(ARCHCPUDEF)=1 -define:$(ARCHFAMILYDEF)=1 -define:__ASSEMBLY__ +AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION) + +# Compiler definitions + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -debug +else + ARCHOPTIMIZATION = -nodebug +endif + +ifeq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -reduceopt +else + ARCHOPTIMIZATION += -optsize +endif + +ARCHCPUFLAGS = -chartype:S -promote -cpu:$(ARCHCPU) -NOgenprintf -NOmodsect \ + -asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)" +ARCHLIST = -keeplst -NOlist -NOlistinc -keepasm +ARCHPICFLAGS = +ARCHWARNINGS = -warn +ARCHDEFINES = -define:$(ARCHCPUDEF) -define:$(ARCHFAMILYDEF) +ARCHINCLUDES = $(ARCHSTDINCLUDES) $(ARCHUSRINCLUDES) +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHLIST) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) + +CPPDEFINES = -D$(ARCHFAMILYDEF) -D$(ARCHCPUDEF) -D__ASSEMBLY__ +CPPINCLUDES = -I$(TOPDIR)$(DELIM)include +CPPFLAGS = $(CPPDEFINES) $(CPPINCLUDES) + +# Librarian definitions + +ARFLAGS = -quiet -warn + +# Linker definitions + +LINKCMDTEMPLATE = $(TOPDIR)$(DELIM)configs$(DELIM)ez80f910200zco$(DELIM)nettest$(DELIM)nettest.linkcmd + +# Tool names/pathes + +CROSSDEV = +CC = ez80cc.exe +CPP = gcc -E +LD = ez80link.exe +AS = ez80asm.exe +AR = ez80lib.exe + +# File extensions + +ASMEXT = .asm +OBJEXT = .obj +LIBEXT = .lib +EXEEXT = .lod +HEXEXT = .hex + +# These are the macros that will be used in the NuttX make system +# to compile and assembly source files and to insert the resulting +# object files into an archive + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + +define PREPROCESS + @echo CPP: $1->$2 + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) "$(CC)" $(CFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define ASSEMBLE + $(Q) "$(AS)" $(AFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + @echo AR: $2 + $(Q) for %%G in ($(2)) do ( "$(AR)" $(ARFLAGS) $1=-+%%G ) +endef + +define CLEAN + $(Q) if exist *.obj (del /f /q *.obj) + $(Q) if exist *.src (del /f /q *.src) + $(Q) if exist *.lib (del /f /q *.lib) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.lod (del /f /q *.lod) + $(Q) if exist *.lst (del /f /q *.lst) +endef + +else + +define PREPROCESS + @echo "CPP: $1->$2" + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) (wfile=`cygpath -w "$1"`; "$(CC)" $(CFLAGS) $$wfile) +endef + +define ASSEMBLE + $(Q) (wfile=`cygpath -w "$1"`; "$(AS)" $(AFLAGS) $$wfile) +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + $(Q) for __obj in $(2) ; do \ + echo "AR: $$__obj"; \ + "$(AR)" $(ARFLAGS) $1=-+$$__obj || { echo "$(AR) $1=-+$$__obj FAILED!" ; exit 1 ; } \ + done +endef + +define CLEAN + $(Q) rm -f *.obj *.src *.lib *.hex *.lod *.lst +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + #MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mknulldeps.sh +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mknulldeps.sh + + # ZDS-II cannot follow Cygwin soft links, so we will have to use directory copies + + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh +endif diff --git a/configs/ez80f910200zco/nettest/README.txt b/configs/ez80f910200zco/nettest/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..8ac03bc4a4e7f20b29daa27c4153e3bdf926c9de --- /dev/null +++ b/configs/ez80f910200zco/nettest/README.txt @@ -0,0 +1,5 @@ +README.txt +^^^^^^^^^^ + +nettest.zdsproj is a simple ZDS-II project that will allow you + to use the ZDS-II debugger. diff --git a/configs/ez80f910200zco/nettest/defconfig b/configs/ez80f910200zco/nettest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..8dd72d76fbc2da16bd874acc195a2530b72e7919 --- /dev/null +++ b/configs/ez80f910200zco/nettest/defconfig @@ -0,0 +1,845 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="ez80" +# CONFIG_ARCH_CHIP_Z80 is not set +# CONFIG_ARCH_CHIP_Z8018006VSG is not set +# CONFIG_ARCH_CHIP_Z8018010VSG is not set +# CONFIG_ARCH_CHIP_Z8018008VSG is not set +# CONFIG_ARCH_CHIP_Z8018010FSG is not set +# CONFIG_ARCH_CHIP_Z8018008VEG is not set +# CONFIG_ARCH_CHIP_Z8018006VEG is not set +# CONFIG_ARCH_CHIP_Z8018006PSG is not set +# CONFIG_ARCH_CHIP_Z8018008FSG is not set +# CONFIG_ARCH_CHIP_Z8018010PSG is not set +# CONFIG_ARCH_CHIP_Z8018006PEG is not set +# CONFIG_ARCH_CHIP_Z8018010VEG is not set +# CONFIG_ARCH_CHIP_Z8018010PEG is not set +# CONFIG_ARCH_CHIP_Z8018008PSG is not set +# CONFIG_ARCH_CHIP_Z8018006FSG is not set +# CONFIG_ARCH_CHIP_Z8018000XSO is not set +# CONFIG_ARCH_CHIP_Z8018010FEG is not set +# CONFIG_ARCH_CHIP_Z8018000WSO is not set +# CONFIG_ARCH_CHIP_Z8018008PEG is not set +# CONFIG_ARCH_CHIP_Z8018110FEG is not set +# CONFIG_ARCH_CHIP_Z8018233FSG is not set +# CONFIG_ARCH_CHIP_Z8018220AEG is not set +# CONFIG_ARCH_CHIP_Z8018216FSG is not set +# CONFIG_ARCH_CHIP_Z8018216ASG is not set +# CONFIG_ARCH_CHIP_Z8018233ASG is not set +# CONFIG_ARCH_CHIP_Z8019520FSG is not set +# CONFIG_ARCH_CHIP_Z8019533FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020VSG is not set +# CONFIG_ARCH_CHIP_Z8L18020FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020PSG is not set +# CONFIG_ARCH_CHIP_Z8L18220ASG is not set +# CONFIG_ARCH_CHIP_Z8L18220FSG is not set +# CONFIG_ARCH_CHIP_Z8L18220AEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG1960 is not set +# CONFIG_ARCH_CHIP_Z8S18033VSG is not set +# CONFIG_ARCH_CHIP_Z8S18010FSG is not set +# CONFIG_ARCH_CHIP_Z8S18010VEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020PSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FEG is not set +# CONFIG_ARCH_CHIP_Z8S18020FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PSG is not set +# CONFIG_ARCH_CHIP_Z8S18020FEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PEG is not set +# CONFIG_ARCH_CHIP_Z8S18010FEG is not set +# CONFIG_ARCH_CHIP_Z8F6403 is not set +# CONFIG_ARCH_CHIP_Z8F6423 is not set +CONFIG_ARCH_CHIP_EZ80F91=y +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +CONFIG_ARCH_CHIP_EZ80=y +CONFIG_HAVE_LOWSERIALINIT=y + +# +# ez80 Peripheral Support +# +CONFIG_EZ80_UART0=y +# CONFIG_EZ80_UART1 is not set +# CONFIG_EZ80_UART2 is not set +CONFIG_EZ80_EMAC=y +CONFIG_EZ80_TOOLCHAIN_ZDSII=y +CONFIG_EZ80_FIAD=0x1f +CONFIG_EZ80_PHYCONFIG=1 +CONFIG_EZ80_RAMADDR=0xf7c000 +CONFIG_EZ80_PKTBUFSIZE=64 +CONFIG_EZ80_NTXPKTBUFS=64 +CONFIG_EZ80_NRXPKTBUFS=64 +CONFIG_EZ80_MDCDIV=0 +CONFIG_EZ80_TXPOLLTIMERMS=10 +# CONFIG_ARCH_MCFILTER is not set +CONFIG_ARCH_TIMERHOOK=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_EZ80F910200KITG is not set +CONFIG_ARCH_BOARD_EZ80F910200ZCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ez80f910200zco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=14 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nettest_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_LATEINIT is not set +# CONFIG_NET_DUMPPACKET is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +CONFIG_ETH0_PHY_AM79C874=y +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_NETDEV_PHY_DEBUG is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=0 +CONFIG_UART0_TXBUFSIZE=0 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=0 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set +# CONFIG_NET_ARP_DUMP is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_IOB_DEBUG is not set +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_NETTEST=y +# CONFIG_EXAMPLES_NETTEST_SERVER is not set +# CONFIG_EXAMPLES_NETTEST_PERFORMANCE is not set +CONFIG_EXAMPLES_NETTEST_IPv4=y +CONFIG_EXAMPLES_NETTEST_INIT=y +CONFIG_EXAMPLES_NETTEST_NOMAC=y + +# +# IPv4 addresses +# +CONFIG_EXAMPLES_NETTEST_IPADDR=0x0a000002 +CONFIG_EXAMPLES_NETTEST_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_NETTEST_NETMASK=0xffffff00 +CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ez80f910200zco/nettest/nettest.linkcmd b/configs/ez80f910200zco/nettest/nettest.linkcmd new file mode 100644 index 0000000000000000000000000000000000000000..a2338024acf0735d0655d6086cb8ee0786e8b17c --- /dev/null +++ b/configs/ez80f910200zco/nettest/nettest.linkcmd @@ -0,0 +1,94 @@ +/****************************************************************************/ +/* configs/ez80f910200zco/nettest/nettest.linkcmd */ +/* */ +/* Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved. */ +/* Author: Gregory Nutt */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* 1. Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in */ +/* the documentation and/or other materials provided with the */ +/* distribution. */ +/* 3. Neither the name NuttX nor the names of its contributors may be */ +/* used to endorse or promote products derived from this software */ +/* without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ +/* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS */ +/* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE */ +/* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */ +/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, */ +/* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS */ +/* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED */ +/* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT */ +/* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN */ +/* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */ +/* POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/****************************************************************************/ + +-FORMAT=OMF695,INTEL32 +-map -maxhexlen=64 -quiet -NOwarnoverlap -xref -unresolved=fatal +-sort ADDRESS=ascending -warn -NOdebug -NOigcase + +RANGE ROM $000000 : $03FFFF +RANGE RAM $B80000 : $BFFFFF +RANGE EXTIO $000000 : $00FFFF +RANGE INTIO $000000 : $0000FF + +CHANGE STRSECT is ROM + +ORDER .RESET,.IVECTS,.STARTUP,CODE,DATA +COPY DATA ROM + +DEFINE __low_romdata = copy base of DATA +DEFINE __low_data = base of DATA +DEFINE __len_data = length of DATA +DEFINE __low_bss = base of BSS +DEFINE __len_bss = length of BSS +DEFINE __stack = highaddr of RAM + 1 +DEFINE __heaptop = highaddr of RAM +DEFINE __heapbot = top of RAM + 1 +DEFINE __low_romcode = copy base of CODE +DEFINE __low_code = base of CODE +DEFINE __len_code = length of CODE +DEFINE __copy_code_to_ram = 0 +DEFINE __crtl = 1 +DEFINE __CS0_LBR_INIT_PARAM = $10 +DEFINE __CS0_UBR_INIT_PARAM = $1f +DEFINE __CS0_CTL_INIT_PARAM = $a8 +DEFINE __CS0_BMC_INIT_PARAM = $02 +DEFINE __CS1_LBR_INIT_PARAM = $c0 +DEFINE __CS1_UBR_INIT_PARAM = $c7 +DEFINE __CS1_CTL_INIT_PARAM = $28 +DEFINE __CS1_BMC_INIT_PARAM = $02 +DEFINE __CS2_LBR_INIT_PARAM = $80 +DEFINE __CS2_UBR_INIT_PARAM = $bf +DEFINE __CS2_CTL_INIT_PARAM = $28 +DEFINE __CS2_BMC_INIT_PARAM = $81 +DEFINE __CS3_LBR_INIT_PARAM = $00 +DEFINE __CS3_UBR_INIT_PARAM = $00 +DEFINE __CS3_CTL_INIT_PARAM = $00 +DEFINE __CS3_BMC_INIT_PARAM = $02 +DEFINE __RAM_CTL_INIT_PARAM = $C0 +DEFINE __RAM_ADDR_U_INIT_PARAM = $B7 +DEFINE __FLASH_CTL_INIT_PARAM = $68 +DEFINE __FLASH_ADDR_U_INIT_PARAM = $00 + +define _SYS_CLK_FREQ = 50000000 + +define _OSC_FREQ = 50000000 +define _SYS_CLK_SRC = 0 +define _OSC_FREQ_MULT = 1 +define __PLL_CTL0_INIT_PARAM = $40 + +define _zsl_g_clock_xdefine = 50000000 + +/* arch/z80/src/Makefile.zdsii will append target, object and library paths below */ + diff --git a/configs/ez80f910200zco/nettest/nettest.zdsproj b/configs/ez80f910200zco/nettest/nettest.zdsproj new file mode 100644 index 0000000000000000000000000000000000000000..3758b7aadc505f34eecb11ff82768e3d25373c2f --- /dev/null +++ b/configs/ez80f910200zco/nettest/nettest.zdsproj @@ -0,0 +1,247 @@ + +eZ80F91 + + + +..\..\..\nuttx.hex + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/configs/ez80f910200zco/nettest/setenv.sh b/configs/ez80f910200zco/nettest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..f3c50aa58230ea6bf6ab98fcfa7448bbde42955c --- /dev/null +++ b/configs/ez80f910200zco/nettest/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/ez80f910200zco/nettest/setenv.sh +# +# Copyright (C) 2008, 2009, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# Check how we were executed +# +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# +# This is the Cygwin path to location where the XDS-II tools were installed +# +#TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_eZ80Acclaim!_5.1.1\bin" +TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_eZ80Acclaim!_5.2.1/bin" + +# +# Add the path to the toolchain to the PATH varialble. NOTE that /bin and /usr/bin +# preceded the toolchain bin directory. This is because the ZDSII bin directory +# includes binaries like make.exe that will interfere with the normal build process +# if we do not give priority to the versions at /bin and /usr/bin. +# +export PATH="/bin:/usr/bin:${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/ez80f910200zco/nsh/.gitignore b/configs/ez80f910200zco/nsh/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..739b8373b859ca438337c1408213ad661be9d515 --- /dev/null +++ b/configs/ez80f910200zco/nsh/.gitignore @@ -0,0 +1,7 @@ +nsh.hex +nsh.map +nsh.lod +nsh.wsp +*.asm +Debug + diff --git a/configs/ez80f910200zco/nsh/Make.defs b/configs/ez80f910200zco/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..9660da3c3f25aacc4d84fcf9953c14012b3a896d --- /dev/null +++ b/configs/ez80f910200zco/nsh/Make.defs @@ -0,0 +1,276 @@ +############################################################################ +# configs/ez80f910200zco/nsh/Make.defs +# +# Copyright (C) 2009, 2012-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk + +# These are the directories where the ZDS-II toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_EZ80_ZDSII_V521),y) +ZDSVERSION := 5.2.1 +else # ifeq ($(CONFIGEZ80_ZDSII_V511),y) +ZDSVERSION := 5.1.1 +endif + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + ZDSINSTALLDIR := C:/PROGRA~2/ZiLOG/ZDSII_eZ80Acclaim!_$(ZDSVERSION) + INSTALLDIR = ${shell echo $(ZDSINSTALLDIR)| sed -e "s/\//\\/g"} + ZDSBINDIR := $(INSTALLDIR)\bin + ZDSSTDINCDIR := $(INSTALLDIR)\include\std + ZDSZILOGINCDIR := $(INSTALLDIR)\include\zilog + ZDSSTDLIBDIR := $(INSTALLDIR)\lib\std + ZDSZILOGLIBDIR := $(INSTALLDIR)\lib\zilog + + # CFLAGs + + ARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + EARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHSTDINCLUDES = -stdinc:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHUSRINCLUDES = -usrinc:. +else + WINTOOL := y + ZDSINSTALLDIR := C:/PROGRA~2/ZiLOG/ZDSII_eZ80Acclaim!_$(ZDSVERSION) + INSTALLDIR = ${shell cygpath -u "$(ZDSINSTALLDIR)"} + ZDSBINDIR := $(INSTALLDIR)/bin + ZDSSTDINCDIR := $(INSTALLDIR)/include/std + ZDSZILOGINCDIR := $(INSTALLDIR)/include/zilog + ZDSSTDLIBDIR := $(INSTALLDIR)/lib/std + ZDSZILOGLIBDIR := $(INSTALLDIR)/lib/zilog + + # These are the same directories but with the directory separator + # character swapped as needed by the ZDS-II compiler + + WTOPDIR := ${shell cygpath -w "$(TOPDIR)"} + WZDSSTDINCDIR := ${shell cygpath -w "$(ZDSSTDINCDIR)"} + WZDSZILOGINCDIR := ${shell cygpath -w "$(ZDSZILOGINCDIR)"} + WZDSSTDLIBDIR := ${shell cygpath -w "$(ZDSSTDLIBDIR)"} + WZDSZILOGLIBDIR := ${shell cygpath -w "$(ZDSZILOGLIBDIR)"} + + # Escaped versions + + ETOPDIR := ${shell echo "$(WTOPDIR)" | sed -e "s/ /%20/g"} + EZDSSTDINCDIR := ${shell echo "$(WZDSSTDINCDIR)" | sed -e "s/ /%20/g"} + EZDSZILOGINCDIR := ${shell echo "$(WZDSZILOGINCDIR)" | sed -e "s/ /%20/g"} + + # CFLAGs + + ARCHASMINCLUDES = -include:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + EARCHASMINCLUDES = -include:'$(ETOPDIR)\include;$(EZDSSTDINCDIR);$(EZDSZILOGINCDIR)' + ARCHSTDINCLUDES = -stdinc:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + ARCHUSRINCLUDES = -usrinc:'.' +endif + +# Assembler definitions + +ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y) + ARCHCPU = eZ80F91 + ARCHCPUDEF = _EZ80F91 + ARCHFAMILY = _EZ80ACCLAIM! +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHASMOPTIMIZATION = -debug -NOsdiopt +else + ARCHASMOPTIMIZATION = -nodebug -NOsdiopt +endif + +ARCHASMCPUFLAGS = -cpu:$(ARCHCPU) -NOigcase +ARCHASMLIST = -list -NOlistmac -name -pagelen:56 -pagewidth:80 -quiet +ARCHASMWARNINGS = -warn +ARCHASMDEFINES = -define:$(ARCHCPUDEF)=1 -define:$(ARCHFAMILYDEF)=1 -define:__ASSEMBLY__ +AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION) + +# Compiler definitions + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -debug +else + ARCHOPTIMIZATION = -nodebug +endif + +ifeq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -reduceopt +else + ARCHOPTIMIZATION += -optsize +endif + +ARCHCPUFLAGS = -chartype:S -promote -cpu:$(ARCHCPU) -NOgenprintf -NOmodsect \ + -asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)" +ARCHLIST = -keeplst -NOlist -NOlistinc -keepasm +ARCHPICFLAGS = +ARCHWARNINGS = -warn +ARCHDEFINES = -define:$(ARCHCPUDEF) -define:$(ARCHFAMILYDEF) +ARCHINCLUDES = $(ARCHSTDINCLUDES) $(ARCHUSRINCLUDES) +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHLIST) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) + +CPPDEFINES = -D$(ARCHFAMILYDEF) -D$(ARCHCPUDEF) -D__ASSEMBLY__ +CPPINCLUDES = -I$(TOPDIR)$(DELIM)include +CPPFLAGS = $(CPPDEFINES) $(CPPINCLUDES) + +# Librarian definitions + +ARFLAGS = -quiet -warn + +# Linker definitions + +LINKCMDTEMPLATE = $(TOPDIR)$(DELIM)configs$(DELIM)ez80f910200zco$(DELIM)nsh$(DELIM)nsh.linkcmd + +# Tool names/pathes + +CROSSDEV = +CC = ez80cc.exe +CPP = gcc -E +LD = ez80link.exe +AS = ez80asm.exe +AR = ez80lib.exe + +# File extensions + +ASMEXT = .asm +OBJEXT = .obj +LIBEXT = .lib +EXEEXT = .lod +HEXEXT = .hex + +# These are the macros that will be used in the NuttX make system +# to compile and assembly source files and to insert the resulting +# object files into an archive + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + +define PREPROCESS + @echo CPP: $1->$2 + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) "$(CC)" $(CFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define ASSEMBLE + $(Q) "$(AS)" $(AFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + @echo AR: $2 + $(Q) for %%G in ($(2)) do ( "$(AR)" $(ARFLAGS) $1=-+%%G ) +endef + +define CLEAN + $(Q) if exist *.obj (del /f /q *.obj) + $(Q) if exist *.src (del /f /q *.src) + $(Q) if exist *.lib (del /f /q *.lib) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.lod (del /f /q *.lod) + $(Q) if exist *.lst (del /f /q *.lst) +endef + +else + +define PREPROCESS + @echo "CPP: $1->$2" + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) (wfile=`cygpath -w "$1"`; "$(CC)" $(CFLAGS) $$wfile) +endef + +define ASSEMBLE + $(Q) (wfile=`cygpath -w "$1"`; "$(AS)" $(AFLAGS) $$wfile) +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + $(Q) for __obj in $(2) ; do \ + echo "AR: $$__obj"; \ + "$(AR)" $(ARFLAGS) $1=-+$$__obj || { echo "$(AR) $1=-+$$__obj FAILED!" ; exit 1 ; } \ + done +endef + +define CLEAN + $(Q) rm -f *.obj *.src *.lib *.hex *.lod *.lst +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + #MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mknulldeps.sh +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mknulldeps.sh + + # ZDS-II cannot follow Cygwin soft links, so we will have to use directory copies + + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh +endif diff --git a/configs/ez80f910200zco/nsh/README.txt b/configs/ez80f910200zco/nsh/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..72e48fc2bedf1c9eb9081d244f7b9c6ddb0cd855 --- /dev/null +++ b/configs/ez80f910200zco/nsh/README.txt @@ -0,0 +1,5 @@ +README.txt +^^^^^^^^^^ + +nsh.zdsproj is a simple ZDS-II project that will allow you + to use the ZDS-II debugger. diff --git a/configs/ez80f910200zco/nsh/defconfig b/configs/ez80f910200zco/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..714dccfa3f3d4a9212c45bb041f0cae7ad10c461 --- /dev/null +++ b/configs/ez80f910200zco/nsh/defconfig @@ -0,0 +1,1006 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="ez80" +# CONFIG_ARCH_CHIP_Z80 is not set +# CONFIG_ARCH_CHIP_Z8018006VSG is not set +# CONFIG_ARCH_CHIP_Z8018010VSG is not set +# CONFIG_ARCH_CHIP_Z8018008VSG is not set +# CONFIG_ARCH_CHIP_Z8018010FSG is not set +# CONFIG_ARCH_CHIP_Z8018008VEG is not set +# CONFIG_ARCH_CHIP_Z8018006VEG is not set +# CONFIG_ARCH_CHIP_Z8018006PSG is not set +# CONFIG_ARCH_CHIP_Z8018008FSG is not set +# CONFIG_ARCH_CHIP_Z8018010PSG is not set +# CONFIG_ARCH_CHIP_Z8018006PEG is not set +# CONFIG_ARCH_CHIP_Z8018010VEG is not set +# CONFIG_ARCH_CHIP_Z8018010PEG is not set +# CONFIG_ARCH_CHIP_Z8018008PSG is not set +# CONFIG_ARCH_CHIP_Z8018006FSG is not set +# CONFIG_ARCH_CHIP_Z8018000XSO is not set +# CONFIG_ARCH_CHIP_Z8018010FEG is not set +# CONFIG_ARCH_CHIP_Z8018000WSO is not set +# CONFIG_ARCH_CHIP_Z8018008PEG is not set +# CONFIG_ARCH_CHIP_Z8018110FEG is not set +# CONFIG_ARCH_CHIP_Z8018233FSG is not set +# CONFIG_ARCH_CHIP_Z8018220AEG is not set +# CONFIG_ARCH_CHIP_Z8018216FSG is not set +# CONFIG_ARCH_CHIP_Z8018216ASG is not set +# CONFIG_ARCH_CHIP_Z8018233ASG is not set +# CONFIG_ARCH_CHIP_Z8019520FSG is not set +# CONFIG_ARCH_CHIP_Z8019533FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020VSG is not set +# CONFIG_ARCH_CHIP_Z8L18020FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020PSG is not set +# CONFIG_ARCH_CHIP_Z8L18220ASG is not set +# CONFIG_ARCH_CHIP_Z8L18220FSG is not set +# CONFIG_ARCH_CHIP_Z8L18220AEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG1960 is not set +# CONFIG_ARCH_CHIP_Z8S18033VSG is not set +# CONFIG_ARCH_CHIP_Z8S18010FSG is not set +# CONFIG_ARCH_CHIP_Z8S18010VEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020PSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FEG is not set +# CONFIG_ARCH_CHIP_Z8S18020FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PSG is not set +# CONFIG_ARCH_CHIP_Z8S18020FEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PEG is not set +# CONFIG_ARCH_CHIP_Z8S18010FEG is not set +# CONFIG_ARCH_CHIP_Z8F6403 is not set +# CONFIG_ARCH_CHIP_Z8F6423 is not set +CONFIG_ARCH_CHIP_EZ80F91=y +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +CONFIG_ARCH_CHIP_EZ80=y +CONFIG_HAVE_LOWSERIALINIT=y + +# +# ez80 Peripheral Support +# +CONFIG_EZ80_UART0=y +# CONFIG_EZ80_UART1 is not set +# CONFIG_EZ80_UART2 is not set +CONFIG_EZ80_EMAC=y +CONFIG_EZ80_TOOLCHAIN_ZDSII=y +CONFIG_EZ80_FIAD=0x1f +CONFIG_EZ80_PHYCONFIG=1 +CONFIG_EZ80_RAMADDR=0xf7c000 +CONFIG_EZ80_PKTBUFSIZE=64 +CONFIG_EZ80_NTXPKTBUFS=64 +CONFIG_EZ80_NRXPKTBUFS=64 +CONFIG_EZ80_MDCDIV=0 +CONFIG_EZ80_TXPOLLTIMERMS=10 +# CONFIG_ARCH_MCFILTER is not set +CONFIG_ARCH_TIMERHOOK=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_EZ80F910200KITG is not set +CONFIG_ARCH_BOARD_EZ80F910200ZCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ez80f910200zco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=14 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set +# CONFIG_NET_DUMPPACKET is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +CONFIG_ETH0_PHY_AM79C874=y +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_NETDEV_PHY_DEBUG is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=192 +CONFIG_UART0_TXBUFSIZE=64 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=0 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set +# CONFIG_NET_ARP_DUMP is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_IOB_DEBUG is not set +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set +# CONFIG_NSH_NETINIT_DEBUG is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ez80f910200zco/nsh/nsh.linkcmd b/configs/ez80f910200zco/nsh/nsh.linkcmd new file mode 100644 index 0000000000000000000000000000000000000000..c9e730615badb7f15c28ac42e4879e56d6b6babd --- /dev/null +++ b/configs/ez80f910200zco/nsh/nsh.linkcmd @@ -0,0 +1,94 @@ +/****************************************************************************/ +/* configs/ez80f910200zco/nsh/nsh.linkcmd */ +/* */ +/* Copyright (C) 2009 Gregory Nutt. All rights reserved. */ +/* Author: Gregory Nutt */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* 1. Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in */ +/* the documentation and/or other materials provided with the */ +/* distribution. */ +/* 3. Neither the name NuttX nor the names of its contributors may be */ +/* used to endorse or promote products derived from this software */ +/* without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ +/* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS */ +/* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE */ +/* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */ +/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, */ +/* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS */ +/* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED */ +/* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT */ +/* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN */ +/* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */ +/* POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/****************************************************************************/ + +-FORMAT=OMF695,INTEL32 +-map -maxhexlen=64 -quiet -NOwarnoverlap -xref -unresolved=fatal +-sort ADDRESS=ascending -warn -NOdebug -NOigcase + +RANGE ROM $000000 : $03FFFF +RANGE RAM $B80000 : $BFFFFF +RANGE EXTIO $000000 : $00FFFF +RANGE INTIO $000000 : $0000FF + +CHANGE STRSECT is ROM + +ORDER .RESET,.IVECTS,.STARTUP,CODE,DATA +COPY DATA ROM + +DEFINE __low_romdata = copy base of DATA +DEFINE __low_data = base of DATA +DEFINE __len_data = length of DATA +DEFINE __low_bss = base of BSS +DEFINE __len_bss = length of BSS +DEFINE __stack = highaddr of RAM + 1 +DEFINE __heaptop = highaddr of RAM +DEFINE __heapbot = top of RAM + 1 +DEFINE __low_romcode = copy base of CODE +DEFINE __low_code = base of CODE +DEFINE __len_code = length of CODE +DEFINE __copy_code_to_ram = 0 +DEFINE __crtl = 1 +DEFINE __CS0_LBR_INIT_PARAM = $10 +DEFINE __CS0_UBR_INIT_PARAM = $1f +DEFINE __CS0_CTL_INIT_PARAM = $a8 +DEFINE __CS0_BMC_INIT_PARAM = $02 +DEFINE __CS1_LBR_INIT_PARAM = $c0 +DEFINE __CS1_UBR_INIT_PARAM = $c7 +DEFINE __CS1_CTL_INIT_PARAM = $28 +DEFINE __CS1_BMC_INIT_PARAM = $02 +DEFINE __CS2_LBR_INIT_PARAM = $80 +DEFINE __CS2_UBR_INIT_PARAM = $bf +DEFINE __CS2_CTL_INIT_PARAM = $28 +DEFINE __CS2_BMC_INIT_PARAM = $81 +DEFINE __CS3_LBR_INIT_PARAM = $00 +DEFINE __CS3_UBR_INIT_PARAM = $00 +DEFINE __CS3_CTL_INIT_PARAM = $00 +DEFINE __CS3_BMC_INIT_PARAM = $02 +DEFINE __RAM_CTL_INIT_PARAM = $C0 +DEFINE __RAM_ADDR_U_INIT_PARAM = $B7 +DEFINE __FLASH_CTL_INIT_PARAM = $68 +DEFINE __FLASH_ADDR_U_INIT_PARAM = $00 + +define _SYS_CLK_FREQ = 50000000 + +define _OSC_FREQ = 50000000 +define _SYS_CLK_SRC = 0 +define _OSC_FREQ_MULT = 1 +define __PLL_CTL0_INIT_PARAM = $40 + +define _zsl_g_clock_xdefine = 50000000 + +/* arch/z80/src/Makefile.zdsii will append target, object and library paths below */ + diff --git a/configs/ez80f910200zco/nsh/nsh.zdsproj b/configs/ez80f910200zco/nsh/nsh.zdsproj new file mode 100644 index 0000000000000000000000000000000000000000..605c8a0fce39f42638e8dc037b3a176ffe04f9da --- /dev/null +++ b/configs/ez80f910200zco/nsh/nsh.zdsproj @@ -0,0 +1,247 @@ + +eZ80F91 + + + +..\..\..\nuttx.hex + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/configs/ez80f910200zco/nsh/sample-run.txt b/configs/ez80f910200zco/nsh/sample-run.txt new file mode 100644 index 0000000000000000000000000000000000000000..9e3940432aba4e14bb64fe232db9f4205ca3a6ed --- /dev/null +++ b/configs/ez80f910200zco/nsh/sample-run.txt @@ -0,0 +1,57 @@ + +NuttShell (NSH) +nsh> ls -lR / +/: + d---------0 dev/ +/dev: + crw-rw-rw-0 console + crw-rw-rw-0 null + crw-rw-rw-0 ttyS0 +nsh> help +NSH command forms: + [nice [-d >]] [> |>> ] [&] +OR + if + then + [sequence of ] + else + [sequence of ] + fi +Where is one of: + [ ] + cat [ [ ...]] + cd [|-|~|..] + cp + dd if= of= [bs=] [count=] [skip=] + echo [ [...]] + exec + exit + get [-b|-n] [-f ] -h + help + ifconfig + losetup [-d ] | [[-o ] [-r] ] + ls [-lRs] + mb [=][ ] + mem + mkdir + mkfatfs + mkfifo + mkrd [-m ] [-s ] + mh [=][ ] + mount -t + mw [=][ ] + ping [-c ] [-i ] + ps + put [-b|-n] [-f ] -h + pwd + rm + rmdir + set + sh + sleep + test + umount + unset + usleep + xd +nsh> \ No newline at end of file diff --git a/configs/ez80f910200zco/nsh/setenv.sh b/configs/ez80f910200zco/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..8431e3b36328051c58d4947638337ede5cb51585 --- /dev/null +++ b/configs/ez80f910200zco/nsh/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/ez80f910200zco/nsh/setenv.sh +# +# Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# Check how we were executed +# +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# +# This is the Cygwin path to location where the XDS-II tools were installed +# +#TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_eZ80Acclaim!_5.1.1\bin" +TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_eZ80Acclaim!_5.2.1/bin" + +# +# Add the path to the toolchain to the PATH varialble. NOTE that /bin and /usr/bin +# preceded the toolchain bin directory. This is because the ZDSII bin directory +# includes binaries like make.exe that will interfere with the normal build process +# if we do not give priority to the versions at /bin and /usr/bin. +# +export PATH="/bin:/usr/bin:${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/ez80f910200zco/poll/.gitignore b/configs/ez80f910200zco/poll/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..fbeb6a97188a47ff513545cd7b1fadce07c4a2fb --- /dev/null +++ b/configs/ez80f910200zco/poll/.gitignore @@ -0,0 +1,7 @@ +poll.hex +poll.map +poll.lod +poll.wsp +*.asm +Debug + diff --git a/configs/ez80f910200zco/poll/Make.defs b/configs/ez80f910200zco/poll/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..30cdd313760cd687c988b4a9f1e20f84c5650654 --- /dev/null +++ b/configs/ez80f910200zco/poll/Make.defs @@ -0,0 +1,276 @@ +############################################################################ +# configs/ez80f910200zco/poll/Make.defs +# +# Copyright (C) 2009, 2012-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk + +# These are the directories where the ZDS-II toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_EZ80_ZDSII_V521),y) +ZDSVERSION := 5.2.1 +else # ifeq ($(CONFIGEZ80_ZDSII_V511),y) +ZDSVERSION := 5.1.1 +endif + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + ZDSINSTALLDIR := C:/PROGRA~2/ZiLOG/ZDSII_eZ80Acclaim!_$(ZDSVERSION) + INSTALLDIR = ${shell echo $(ZDSINSTALLDIR)| sed -e "s/\//\\/g"} + ZDSBINDIR := $(INSTALLDIR)\bin + ZDSSTDINCDIR := $(INSTALLDIR)\include\std + ZDSZILOGINCDIR := $(INSTALLDIR)\include\zilog + ZDSSTDLIBDIR := $(INSTALLDIR)\lib\std + ZDSZILOGLIBDIR := $(INSTALLDIR)\lib\zilog + + # CFLAGs + + ARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + EARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHSTDINCLUDES = -stdinc:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHUSRINCLUDES = -usrinc:. +else + WINTOOL := y + ZDSINSTALLDIR := C:/PROGRA~2/ZiLOG/ZDSII_eZ80Acclaim!_$(ZDSVERSION) + INSTALLDIR = ${shell cygpath -u "$(ZDSINSTALLDIR)"} + ZDSBINDIR := $(INSTALLDIR)/bin + ZDSSTDINCDIR := $(INSTALLDIR)/include/std + ZDSZILOGINCDIR := $(INSTALLDIR)/include/zilog + ZDSSTDLIBDIR := $(INSTALLDIR)/lib/std + ZDSZILOGLIBDIR := $(INSTALLDIR)/lib/zilog + + # These are the same directories but with the directory separator + # character swapped as needed by the ZDS-II compiler + + WTOPDIR := ${shell cygpath -w "$(TOPDIR)"} + WZDSSTDINCDIR := ${shell cygpath -w "$(ZDSSTDINCDIR)"} + WZDSZILOGINCDIR := ${shell cygpath -w "$(ZDSZILOGINCDIR)"} + WZDSSTDLIBDIR := ${shell cygpath -w "$(ZDSSTDLIBDIR)"} + WZDSZILOGLIBDIR := ${shell cygpath -w "$(ZDSZILOGLIBDIR)"} + + # Escaped versions + + ETOPDIR := ${shell echo "$(WTOPDIR)" | sed -e "s/ /%20/g"} + EZDSSTDINCDIR := ${shell echo "$(WZDSSTDINCDIR)" | sed -e "s/ /%20/g"} + EZDSZILOGINCDIR := ${shell echo "$(WZDSZILOGINCDIR)" | sed -e "s/ /%20/g"} + + # CFLAGs + + ARCHASMINCLUDES = -include:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + EARCHASMINCLUDES = -include:'$(ETOPDIR)\include;$(EZDSSTDINCDIR);$(EZDSZILOGINCDIR)' + ARCHSTDINCLUDES = -stdinc:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + ARCHUSRINCLUDES = -usrinc:'.' +endif + +# Assembler definitions + +ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y) + ARCHCPU = eZ80F91 + ARCHCPUDEF = _EZ80F91 + ARCHFAMILY = _EZ80ACCLAIM! +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHASMOPTIMIZATION = -debug -NOsdiopt +else + ARCHASMOPTIMIZATION = -nodebug -NOsdiopt +endif + +ARCHASMCPUFLAGS = -cpu:$(ARCHCPU) -NOigcase +ARCHASMLIST = -list -NOlistmac -name -pagelen:56 -pagewidth:80 -quiet +ARCHASMWARNINGS = -warn +ARCHASMDEFINES = -define:$(ARCHCPUDEF)=1 -define:$(ARCHFAMILYDEF)=1 -define:__ASSEMBLY__ +AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION) + +# Compiler definitions + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -debug +else + ARCHOPTIMIZATION = -nodebug +endif + +ifeq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -reduceopt +else + ARCHOPTIMIZATION += -optsize +endif + +ARCHCPUFLAGS = -chartype:S -promote -cpu:$(ARCHCPU) -NOgenprintf -NOmodsect \ + -asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)" +ARCHLIST = -keeplst -NOlist -NOlistinc -keepasm +ARCHPICFLAGS = +ARCHWARNINGS = -warn +ARCHDEFINES = -define:$(ARCHCPUDEF) -define:$(ARCHFAMILYDEF) +ARCHINCLUDES = $(ARCHSTDINCLUDES) $(ARCHUSRINCLUDES) +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHLIST) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) + +CPPDEFINES = -D$(ARCHFAMILYDEF) -D$(ARCHCPUDEF) -D__ASSEMBLY__ +CPPINCLUDES = -I$(TOPDIR)$(DELIM)include +CPPFLAGS = $(CPPDEFINES) $(CPPINCLUDES) + +# Librarian definitions + +ARFLAGS = -quiet -warn + +# Linker definitions + +LINKCMDTEMPLATE = $(TOPDIR)$(DELIM)configs$(DELIM)ez80f910200zco$(DELIM)poll$(DELIM)poll.linkcmd + +# Tool names/pathes + +CROSSDEV = +CC = ez80cc.exe +CPP = gcc -E +LD = ez80link.exe +AS = ez80asm.exe +AR = ez80lib.exe + +# File extensions + +ASMEXT = .asm +OBJEXT = .obj +LIBEXT = .lib +EXEEXT = .lod +HEXEXT = .hex + +# These are the macros that will be used in the NuttX make system +# to compile and assembly source files and to insert the resulting +# object files into an archive + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + +define PREPROCESS + @echo CPP: $1->$2 + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) "$(CC)" $(CFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define ASSEMBLE + $(Q) "$(AS)" $(AFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + @echo AR: $2 + $(Q) for %%G in ($(2)) do ( "$(AR)" $(ARFLAGS) $1=-+%%G ) +endef + +define CLEAN + $(Q) if exist *.obj (del /f /q *.obj) + $(Q) if exist *.src (del /f /q *.src) + $(Q) if exist *.lib (del /f /q *.lib) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.lod (del /f /q *.lod) + $(Q) if exist *.lst (del /f /q *.lst) +endef + +else + +define PREPROCESS + @echo "CPP: $1->$2" + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) (wfile=`cygpath -w "$1"`; "$(CC)" $(CFLAGS) $$wfile) +endef + +define ASSEMBLE + $(Q) (wfile=`cygpath -w "$1"`; "$(AS)" $(AFLAGS) $$wfile) +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + $(Q) for __obj in $(2) ; do \ + echo "AR: $$__obj"; \ + "$(AR)" $(ARFLAGS) $1=-+$$__obj || { echo "$(AR) $1=-+$$__obj FAILED!" ; exit 1 ; } \ + done +endef + +define CLEAN + $(Q) rm -f *.obj *.src *.lib *.hex *.lod *.lst +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + #MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mknulldeps.sh +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mknulldeps.sh + + # ZDS-II cannot follow Cygwin soft links, so we will have to use directory copies + + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh +endif diff --git a/configs/ez80f910200zco/poll/README.txt b/configs/ez80f910200zco/poll/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..00d6550c16e0388b85adffa17d178bd3ed3ecdce --- /dev/null +++ b/configs/ez80f910200zco/poll/README.txt @@ -0,0 +1,5 @@ +README.txt +^^^^^^^^^^ + +poll.zdsproj is a simple ZDS-II project that will allow you + to use the ZDS-II debugger. diff --git a/configs/ez80f910200zco/poll/defconfig b/configs/ez80f910200zco/poll/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..336e8aa08a7bb3d2e2fa81be84a2eabeb5be8d13 --- /dev/null +++ b/configs/ez80f910200zco/poll/defconfig @@ -0,0 +1,846 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="ez80" +# CONFIG_ARCH_CHIP_Z80 is not set +# CONFIG_ARCH_CHIP_Z8018006VSG is not set +# CONFIG_ARCH_CHIP_Z8018010VSG is not set +# CONFIG_ARCH_CHIP_Z8018008VSG is not set +# CONFIG_ARCH_CHIP_Z8018010FSG is not set +# CONFIG_ARCH_CHIP_Z8018008VEG is not set +# CONFIG_ARCH_CHIP_Z8018006VEG is not set +# CONFIG_ARCH_CHIP_Z8018006PSG is not set +# CONFIG_ARCH_CHIP_Z8018008FSG is not set +# CONFIG_ARCH_CHIP_Z8018010PSG is not set +# CONFIG_ARCH_CHIP_Z8018006PEG is not set +# CONFIG_ARCH_CHIP_Z8018010VEG is not set +# CONFIG_ARCH_CHIP_Z8018010PEG is not set +# CONFIG_ARCH_CHIP_Z8018008PSG is not set +# CONFIG_ARCH_CHIP_Z8018006FSG is not set +# CONFIG_ARCH_CHIP_Z8018000XSO is not set +# CONFIG_ARCH_CHIP_Z8018010FEG is not set +# CONFIG_ARCH_CHIP_Z8018000WSO is not set +# CONFIG_ARCH_CHIP_Z8018008PEG is not set +# CONFIG_ARCH_CHIP_Z8018110FEG is not set +# CONFIG_ARCH_CHIP_Z8018233FSG is not set +# CONFIG_ARCH_CHIP_Z8018220AEG is not set +# CONFIG_ARCH_CHIP_Z8018216FSG is not set +# CONFIG_ARCH_CHIP_Z8018216ASG is not set +# CONFIG_ARCH_CHIP_Z8018233ASG is not set +# CONFIG_ARCH_CHIP_Z8019520FSG is not set +# CONFIG_ARCH_CHIP_Z8019533FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020VSG is not set +# CONFIG_ARCH_CHIP_Z8L18020FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020PSG is not set +# CONFIG_ARCH_CHIP_Z8L18220ASG is not set +# CONFIG_ARCH_CHIP_Z8L18220FSG is not set +# CONFIG_ARCH_CHIP_Z8L18220AEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG1960 is not set +# CONFIG_ARCH_CHIP_Z8S18033VSG is not set +# CONFIG_ARCH_CHIP_Z8S18010FSG is not set +# CONFIG_ARCH_CHIP_Z8S18010VEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020PSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FEG is not set +# CONFIG_ARCH_CHIP_Z8S18020FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PSG is not set +# CONFIG_ARCH_CHIP_Z8S18020FEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PEG is not set +# CONFIG_ARCH_CHIP_Z8S18010FEG is not set +# CONFIG_ARCH_CHIP_Z8F6403 is not set +# CONFIG_ARCH_CHIP_Z8F6423 is not set +CONFIG_ARCH_CHIP_EZ80F91=y +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +CONFIG_ARCH_CHIP_EZ80=y +CONFIG_HAVE_LOWSERIALINIT=y + +# +# ez80 Peripheral Support +# +CONFIG_EZ80_UART0=y +# CONFIG_EZ80_UART1 is not set +# CONFIG_EZ80_UART2 is not set +CONFIG_EZ80_EMAC=y +CONFIG_EZ80_TOOLCHAIN_ZDSII=y +CONFIG_EZ80_FIAD=0x1f +CONFIG_EZ80_PHYCONFIG=1 +CONFIG_EZ80_RAMADDR=0xf7c000 +CONFIG_EZ80_PKTBUFSIZE=64 +CONFIG_EZ80_NTXPKTBUFS=64 +CONFIG_EZ80_NRXPKTBUFS=64 +CONFIG_EZ80_MDCDIV=0 +CONFIG_EZ80_TXPOLLTIMERMS=10 +# CONFIG_ARCH_MCFILTER is not set +CONFIG_ARCH_TIMERHOOK=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_EZ80F910200KITG is not set +CONFIG_ARCH_BOARD_EZ80F910200ZCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ez80f910200zco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=14 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="poll_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_LATEINIT is not set +# CONFIG_NET_DUMPPACKET is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +CONFIG_ETH0_PHY_AM79C874=y +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_NETDEV_PHY_DEBUG is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=0 +CONFIG_UART0_TXBUFSIZE=0 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=0 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set +# CONFIG_NET_ARP_DUMP is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_IOB_DEBUG is not set +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +CONFIG_EXAMPLES_POLL=y +CONFIG_EXAMPLES_POLL_NOMAC=y +CONFIG_EXAMPLES_POLL_IPADDR=0x0a000002 +CONFIG_EXAMPLES_POLL_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_POLL_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ez80f910200zco/poll/poll.linkcmd b/configs/ez80f910200zco/poll/poll.linkcmd new file mode 100644 index 0000000000000000000000000000000000000000..ecfa93e6ebadfcbee4a413e3baee19e68053f078 --- /dev/null +++ b/configs/ez80f910200zco/poll/poll.linkcmd @@ -0,0 +1,94 @@ +/****************************************************************************/ +/* configs/ez80f910200zco/poll/poll.linkcmd */ +/* */ +/* Copyright (C) 2009 Gregory Nutt. All rights reserved. */ +/* Author: Gregory Nutt */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* 1. Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in */ +/* the documentation and/or other materials provided with the */ +/* distribution. */ +/* 3. Neither the name NuttX nor the names of its contributors may be */ +/* used to endorse or promote products derived from this software */ +/* without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ +/* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS */ +/* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE */ +/* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */ +/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, */ +/* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS */ +/* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED */ +/* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT */ +/* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN */ +/* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */ +/* POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/****************************************************************************/ + +-FORMAT=OMF695,INTEL32 +-map -maxhexlen=64 -quiet -NOwarnoverlap -xref -unresolved=fatal +-sort ADDRESS=ascending -warn -NOdebug -NOigcase + +RANGE ROM $000000 : $03FFFF +RANGE RAM $B80000 : $BFFFFF +RANGE EXTIO $000000 : $00FFFF +RANGE INTIO $000000 : $0000FF + +CHANGE STRSECT is ROM + +ORDER .RESET,.IVECTS,.STARTUP,CODE,DATA +COPY DATA ROM + +DEFINE __low_romdata = copy base of DATA +DEFINE __low_data = base of DATA +DEFINE __len_data = length of DATA +DEFINE __low_bss = base of BSS +DEFINE __len_bss = length of BSS +DEFINE __stack = highaddr of RAM + 1 +DEFINE __heaptop = highaddr of RAM +DEFINE __heapbot = top of RAM + 1 +DEFINE __low_romcode = copy base of CODE +DEFINE __low_code = base of CODE +DEFINE __len_code = length of CODE +DEFINE __copy_code_to_ram = 0 +DEFINE __crtl = 1 +DEFINE __CS0_LBR_INIT_PARAM = $10 +DEFINE __CS0_UBR_INIT_PARAM = $1f +DEFINE __CS0_CTL_INIT_PARAM = $a8 +DEFINE __CS0_BMC_INIT_PARAM = $02 +DEFINE __CS1_LBR_INIT_PARAM = $c0 +DEFINE __CS1_UBR_INIT_PARAM = $c7 +DEFINE __CS1_CTL_INIT_PARAM = $28 +DEFINE __CS1_BMC_INIT_PARAM = $02 +DEFINE __CS2_LBR_INIT_PARAM = $80 +DEFINE __CS2_UBR_INIT_PARAM = $bf +DEFINE __CS2_CTL_INIT_PARAM = $28 +DEFINE __CS2_BMC_INIT_PARAM = $81 +DEFINE __CS3_LBR_INIT_PARAM = $00 +DEFINE __CS3_UBR_INIT_PARAM = $00 +DEFINE __CS3_CTL_INIT_PARAM = $00 +DEFINE __CS3_BMC_INIT_PARAM = $02 +DEFINE __RAM_CTL_INIT_PARAM = $C0 +DEFINE __RAM_ADDR_U_INIT_PARAM = $B7 +DEFINE __FLASH_CTL_INIT_PARAM = $68 +DEFINE __FLASH_ADDR_U_INIT_PARAM = $00 + +define _SYS_CLK_FREQ = 50000000 + +define _OSC_FREQ = 50000000 +define _SYS_CLK_SRC = 0 +define _OSC_FREQ_MULT = 1 +define __PLL_CTL0_INIT_PARAM = $40 + +define _zsl_g_clock_xdefine = 50000000 + +/* arch/z80/src/Makefile.zdsii will append target, object and library paths below */ + diff --git a/configs/ez80f910200zco/poll/poll.zdsproj b/configs/ez80f910200zco/poll/poll.zdsproj new file mode 100644 index 0000000000000000000000000000000000000000..1e73bb9aa11e1d10c96b1b64f689c13b6de675d0 --- /dev/null +++ b/configs/ez80f910200zco/poll/poll.zdsproj @@ -0,0 +1,247 @@ + +eZ80F91 + + + +..\..\..\nuttx.hex + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/configs/ez80f910200zco/poll/setenv.sh b/configs/ez80f910200zco/poll/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..115fed1f28e9fb5169e20840e12f7c3fed878647 --- /dev/null +++ b/configs/ez80f910200zco/poll/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/ez80f910200zco/poll/setenv.sh +# +# Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# Check how we were executed +# +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# +# This is the Cygwin path to location where the XDS-II tools were installed +# +#TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_eZ80Acclaim!_5.1.1\bin" +TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_eZ80Acclaim!_5.2.1/bin" + +# +# Add the path to the toolchain to the PATH varialble. NOTE that /bin and /usr/bin +# preceded the toolchain bin directory. This is because the ZDSII bin directory +# includes binaries like make.exe that will interfere with the normal build process +# if we do not give priority to the versions at /bin and /usr/bin. +# +export PATH="/bin:/usr/bin:${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/ez80f910200zco/scripts/setenv.bat b/configs/ez80f910200zco/scripts/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..88fc6cbf312f253ffc39725221d821db0f4bf55a --- /dev/null +++ b/configs/ez80f910200zco/scripts/setenv.bat @@ -0,0 +1,50 @@ +@echo off + +rem configs/ez80f910200zco/scripts/setenv.bat +rem +rem Copyright (C) 2012 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the ZDS-II toolchain. + +set PATH=C:\Program Files (x86)\ZiLOG\ZDSII_eZ80Acclaim!_5.1.1\bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% +echo %PATH% diff --git a/configs/ez80f910200zco/src/.gitignore b/configs/ez80f910200zco/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..b268f1933d708a67c74e5ee0c84ab7447e0ee575 --- /dev/null +++ b/configs/ez80f910200zco/src/.gitignore @@ -0,0 +1,4 @@ +/Make.dep +/.depend +/*.obj + diff --git a/configs/ez80f910200zco/src/Makefile b/configs/ez80f910200zco/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..cea55660877e84a58cc2a42f0ba108a5daf4b2fa --- /dev/null +++ b/configs/ez80f910200zco/src/Makefile @@ -0,0 +1,47 @@ +############################################################################ +# configs/ez80f910200zco/Makefile +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = ez80_lowinit.c +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += ez80_leds.c +endif +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += ez80_buttons.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/ez80f910200zco/src/ez80_buttons.c b/configs/ez80f910200zco/src/ez80_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..1fbfdcf2ad886d7eecba367844e4581b0f333fca --- /dev/null +++ b/configs/ez80f910200zco/src/ez80_buttons.c @@ -0,0 +1,175 @@ +/**************************************************************************** + * configs/ez80f910200zco/src/ez80_leds.c + * + * Copyright (C) 2008-2009, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_PB/1/2interrupt + * + * Description: + * These could be exteneded to provide interrupt driven button input + * + ****************************************************************************/ + +#if 0 +void up_PBinterrupt(void) +{ + uint8_t regval; + + regval = inp(EZ80_PB_DR); /* Clear interrupt flag for eZ80F91 date codes before 0611 */ + regval |= 7; + outp(EZ80_PB_DR, regval); + + regval = inp(EZ80_PB_ALT0); /* Clear interrupt flag for eZ80F91 date codes 0611 and after */ + regval |= 1; + outp(EZ80_PB_ALT0, regval); +} + +void up_pb1interrupt(void) +{ + uint8_t regval; + + regval = inp(EZ80_PB_DR); /* Clear interrupt flag for eZ80F91 date codes before 0611 */ + regval |= 7; + outp(EZ80_PB_DR, regval); + + regval = inp(EZ80_PB_ALT0); /* Clear interrupt flag for eZ80F91 date codes 0611 and after */ + regval |= 2; + outp(EZ80_PB_ALT0, regval); +} + +void up_pb2interrupt(void) +{ + uint8_t regval; + + regval = inp(EZ80_PB_DR); /* Clear interrupt flag for eZ80F91 date codes before 0611 */ + regval |= 7; + outp(EZ80_PB_DR, regval); + + regval = inp(EZ80_PB_ALT0); + regval |= 4; + outp(EZ80_PB_ALT0, regval); /* Clear interrupt flag for eZ80F91 date codes 0611 and after */ +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_BUTTONS +void board_button_initialize(void) +{ + uint8_t regval; + +#if 0 /* Interrupts are not used */ + + /* Attach GIO interrupts */ + + irq_attach(EZ80_PB_IRQ, up_PBinterrupt); + irq_attach(EZ80_PB1_IRQ, up_pb1interrupt); + irq_attach(EZ80_PB2_IRQ, up_pb2interrupt); + + /* Configure PB0,1,2 as interrupt, rising edge */ + + regval = inp(EZ80_PB_DR); + regval |= 7; + outp(EZ80_PB_DR, regval); + + regval = inp(EZ80_PB_DDR); + regval |= 7; + outp(EZ80_PB_DDR, regval); + + regval = inp(EZ80_PB_ALT1); + regval |= 7; + outp(EZ80_PB_ALT1, regval); + + regval = inp(EZ80_PB_ALT2); + regval |= 7; + outp(EZ80_PB_ALT2, regval); +#else + /* Configure PB0,1,2 as inputs */ + + regval = inp(EZ80_PB_DDR); + regval |= 7; + outp(EZ80_PB_DDR, regval); + + regval = inp(EZ80_PB_ALT1); + regval &= ~7; + outp(EZ80_PB_ALT1, regval); + + regval = inp(EZ80_PB_ALT2); + regval &= ~7; + outp(EZ80_PB_ALT2, regval); +#endif +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return inp(EZ80_PB_DDR) & 7; +} +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/ez80f910200zco/src/ez80_leds.c b/configs/ez80f910200zco/src/ez80_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..56a41af8a26edf0e83015c4b0bc17f022d42dccd --- /dev/null +++ b/configs/ez80f910200zco/src/ez80_leds.c @@ -0,0 +1,320 @@ +/**************************************************************************** + * configs/ez80f910200zco/src/ez80_leds.c + * + * Copyright (C) 2008-2009, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "ez80f910200zco.h" +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* 5x7 LED matrix character glyphs. Each glyph consists of 7 bytes, one + * each row and each containing 5 bits of data, one for each column + */ + +#if 0 /* Not used */ +static const uint8_t g_chblock[7] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; /* block */ +#endif + +static const uint8_t g_chspace[7] = {0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f}; /* space */ + +#if 0 /* Not used */ +static const uint8_t g_chexclam[7] = {0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1f, 0x1b}; /* ! */ +static const uint8_t g_chquote[7] = {0x15, 0x15, 0x15, 0x1f, 0x1f, 0x1f, 0x1f}; /* " */ +static const uint8_t g_chnum[7] = {0x1f, 0x15, 0x00, 0x15, 0x00, 0x15, 0x1f}; /* # */ +static const uint8_t g_chdollar[7] = {0x1b, 0x11, 0x0a, 0x11, 0x0a, 0x11, 0x1b}; /* $ */ +static const uint8_t g_chpct[7] = {0x1f, 0x1e, 0x15, 0x1b, 0x15, 0x0f, 0x1f}; /* % */ +static const uint8_t g_champ[7] = {0x11, 0x0e, 0x0e, 0x11, 0x15, 0x0e, 0x10}; /* & */ +static const uint8_t g_chsquote[7] = {0x1b, 0x1b, 0x1b, 0x1f, 0x1f, 0x1f, 0x1f}; /* ' */ +static const uint8_t g_chlparen[7] = {0x1d, 0x1b, 0x17, 0x17, 0x17, 0x1b, 0x1d}; /* ( */ +static const uint8_t g_chrparen[7] = {0x17, 0x1b, 0x1d, 0x1d, 0x1d, 0x1b, 0x17}; /* ) */ +#endif + +static const uint8_t g_chast[7] = {0x1f, 0x0a, 0x11, 0x00, 0x11, 0x0a, 0x1f}; /* * */ + +#if 0 /* Not used */ +static const uint8_t g_chplus[7] = {0x1f, 0x1b, 0x1b, 0x00, 0x1b, 0x1b, 0x1f}; /* + */ +static const uint8_t g_chcomma[7] = {0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1b, 0x17}; /* , */ +static const uint8_t g_chhyphen[7] = {0x1f, 0x1f, 0x1f, 0x00, 0x1f, 0x1f, 0x1f}; /* - */ +static const uint8_t g_chperiod[7] = {0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1b}; /* . */ +static const uint8_t g_chslash[7] = {0x1f, 0x1e, 0x1d, 0x1b, 0x17, 0x0f, 0x1f}; /* / */ +#endif + +static const uint8_t g_ch0[7] = {0x11, 0x0e, 0x0c, 0x0a, 0x06, 0x0e, 0x11}; /* 0 */ + +#if 0 /* Not used */ +static const uint8_t g_ch1[7] = {0x1b, 0x13, 0x1b, 0x1b, 0x1b, 0x1b, 0x11}; /* 1 */ +static const uint8_t g_ch2[7] = {0x11, 0x0e, 0x1d, 0x1b, 0x17, 0x0f, 0x00}; /* 2 */ +static const uint8_t g_ch3[7] = {0x11, 0x0e, 0x1e, 0x19, 0x1e, 0x0e, 0x11}; /* 3 */ +static const uint8_t g_ch4[7] = {0x0e, 0x0e, 0x0e, 0x10, 0x1e, 0x1e, 0x1e}; /* 4 */ +static const uint8_t g_ch5[7] = {0x00, 0x0f, 0x0f, 0x01, 0x1e, 0x0e, 0x11}; /* 5 */ +static const uint8_t g_ch6[7] = {0x11, 0x0f, 0x0f, 0x01, 0x0e, 0x0e, 0x11}; /* 6 */ +static const uint8_t g_ch7[7] = {0x00, 0x1e, 0x1e, 0x1d, 0x1b, 0x1b, 0x1b}; /* 7 */ +static const uint8_t g_ch8[7] = {0x11, 0x0e, 0x0e, 0x11, 0x0e, 0x0e, 0x11}; /* 8 */ +static const uint8_t g_ch9[7] = {0x11, 0x0e, 0x0e, 0x10, 0x1e, 0x1d, 0x1b}; /* 9 */ +static const uint8_t g_chcolon[7] = {0x1f, 0x1f, 0x1b, 0x1f, 0x1b, 0x1f, 0x1f}; /* : */ +static const uint8_t g_shsemi[7] = {0x1f, 0x1f, 0x1b, 0x1f, 0x1b, 0x17, 0x1f}; /* ; */ +static const uint8_t g_chlt[7] = {0x1d, 0x1b, 0x17, 0x0f, 0x17, 0x1b, 0x1d}; /* < */ +static const uint8_t g_cheq[7] = {0x1f, 0x1f, 0x00, 0x1f, 0x00, 0x1f, 0x1f}; /* = */ +static const uint8_t g_chgt[7] = {0x17, 0x1b, 0x1d, 0x1e, 0x1d, 0x1b, 0x17}; /* > */ +static const uint8_t g_chquest[7] = {0x11, 0x0e, 0x0d, 0x1b, 0x1b, 0x1f, 0x1b}; /* ? */ +static const uint8_t g_chat[7] = {0x11, 0x0a, 0x04, 0x04, 0x05, 0x0a, 0x11}; /* @ */ +#endif + +static const uint8_t g_chA[7] = {0x11, 0x0e, 0x0e, 0x0e, 0x00, 0x0e, 0x0e}; /* A */ + +#if 0 /* Not used */ +static const uint8_t g_chB[7] = {0x01, 0x0e, 0x0e, 0x01, 0x0e, 0x0e, 0x01}; /* B */ +#endif + +static const uint8_t g_chC[7] = {0x11, 0x0e, 0x0f, 0x0f, 0x0f, 0x0e, 0x11}; /* C */ + +#if 0 /* Not used */ +static const uint8_t g_chD[7] = {0x01, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x01}; /* D */ +#endif + +static const uint8_t g_chE[7] = {0x00, 0x0f, 0x0f, 0x01, 0x0f, 0x0f, 0x00}; /* E */ + +#if 0 /* Not used */ +static const uint8_t g_chF[7] = {0x00, 0x0f, 0x0f, 0x01, 0x0f, 0x0f, 0x0f}; /* F */ +static const uint8_t g_chG[7] = {0x11, 0x0e, 0x0f, 0x08, 0x0e, 0x0e, 0x11}; /* G */ +#endif + +static const uint8_t g_chH[7] = {0x0e, 0x0e, 0x0e, 0x00, 0x0e, 0x0e, 0x0e}; /* H */ +static const uint8_t g_chI[7] = {0x00, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x00}; /* I */ + +#if 0 /* Not used */ +static const uint8_t g_chJ[7] = {0x00, 0x1d, 0x1d, 0x1d, 0x0d, 0x0d, 0x13}; /* J */ +static const uint8_t g_chK[7] = {0x0e, 0x0d, 0x0b, 0x07, 0x0b, 0x0d, 0x0e}; /* K */ +static const uint8_t g_chL[7] = {0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x00}; /* L */ +static const uint8_t g_chM[7] = {0x0e, 0x04, 0x0a, 0x0a, 0x0e, 0x0e, 0x0e}; /* M */ +static const uint8_t g_chN[7] = {0x0e, 0x0e, 0x06, 0x0a, 0x0c, 0x0e, 0x0e}; /* N */ +static const uint8_t g_chO[7] = {0x11, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x11}; /* O */ +static const uint8_t g_chP[7] = {0x01, 0x0e, 0x0e, 0x01, 0x0f, 0x0f, 0x0f}; /* P */ +static const uint8_t g_chQ[7] = {0x11, 0x0e, 0x0e, 0x0e, 0x0a, 0x0c, 0x10}; /* Q */ +#endif + +static const uint8_t g_chR[7] = {0x01, 0x0e, 0x0e, 0x01, 0x0b, 0x0d, 0x0e}; /* R */ +static const uint8_t g_chS[7] = {0x11, 0x0e, 0x0f, 0x11, 0x1e, 0x0e, 0x11}; /* S */ + +#if 0 /* Not used */ +static const uint8_t g_chT[7] = {0x00, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b}; /* T */ +static const uint8_t g_chU[7] = {0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x11}; /* U */ +static const uint8_t g_chV[7] = {0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x15, 0x1b}; /* V */ +static const uint8_t g_chW[7] = {0x0e, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x15}; /* W */ +static const uint8_t g_chX[7] = {0x0e, 0x0e, 0x15, 0x1b, 0x15, 0x0e, 0x0e}; /* X */ +static const uint8_t g_chY[7] = {0x0e, 0x0e, 0x15, 0x1b, 0x1b, 0x1b, 0x1b}; /* Y */ +static const uint8_t g_chZ[7] = {0x00, 0x1e, 0x1d, 0x1b, 0x17, 0x0f, 0x00}; /* Z */ +static const uint8_t g_chlbrack[7] = {0x03, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x03}; /* [ */ +static const uint8_t g_chbslash[7] = {0x1f, 0x0f, 0x17, 0x1b, 0x1d, 0x1e, 0x1f}; /* backslash */ +static const uint8_t g_chrbrack[7] = {0x1c, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1c}; /* ] */ +static const uint8_t g_chcaret[7] = {0x1b, 0x15, 0x0e, 0x1f, 0x1f, 0x1f, 0x1f}; /* ^ */ +static const uint8_t g_chunder[7] = {0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x00}; /* _ */ +static const uint8_t g_chgrave[7] = {0x1b, 0x1b, 0x1b, 0x1f, 0x1f, 0x1f, 0x1f}; /* ' */ +static const uint8_t g_cha[7] = {0x1f, 0x1f, 0x19, 0x16, 0x16, 0x16, 0x18}; /* a */ +static const uint8_t g_chb[7] = {0x17, 0x17, 0x11, 0x16, 0x16, 0x16, 0x11}; /* b */ +static const uint8_t g_chc[7] = {0x1f, 0x1f, 0x19, 0x16, 0x17, 0x16, 0x19}; /* c */ +static const uint8_t g_chd[7] = {0x1e, 0x1e, 0x18, 0x16, 0x16, 0x16, 0x18}; /* d */ +static const uint8_t g_che[7] = {0x1f, 0x1f, 0x19, 0x10, 0x17, 0x16, 0x19}; /* e */ +static const uint8_t g_chf[7] = {0x1d, 0x1a, 0x1b, 0x11, 0x1b, 0x1b, 0x1b}; /* f */ +static const uint8_t g_chg[7] = {0x1f, 0x19, 0x16, 0x16, 0x18, 0x16, 0x19}; /* g */ +static const uint8_t g_chh[7] = {0x17, 0x17, 0x11, 0x16, 0x16, 0x16, 0x16}; /* h */ +static const uint8_t g_chi[7] = {0x1f, 0x1f, 0x1b, 0x1f, 0x1b, 0x1b, 0x1b}; /* i */ +static const uint8_t g_chj[7] = {0x1f, 0x1d, 0x1f, 0x1d, 0x1d, 0x1d, 0x13}; /* j */ +static const uint8_t g_chk[7] = {0x17, 0x17, 0x15, 0x13, 0x13, 0x15, 0x16}; /* k */ +static const uint8_t g_chl[7] = {0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b}; /* l */ +static const uint8_t g_chm[7] = {0x1f, 0x1f, 0x05, 0x0a, 0x0a, 0x0a, 0x0a}; /* m */ +static const uint8_t g_chn[7] = {0x1f, 0x1f, 0x11, 0x16, 0x16, 0x16, 0x16}; /* n */ +static const uint8_t g_cho[7] = {0x1f, 0x1f, 0x19, 0x16, 0x16, 0x16, 0x19}; /* o */ +static const uint8_t g_chp[7] = {0x1f, 0x11, 0x16, 0x16, 0x11, 0x17, 0x17}; /* p */ +static const uint8_t g_chq[7] = {0x1f, 0x18, 0x16, 0x16, 0x18, 0x1e, 0x1e}; /* q */ +static const uint8_t g_chr[7] = {0x1f, 0x1f, 0x11, 0x16, 0x17, 0x17, 0x17}; /* r */ +static const uint8_t g_chs[7] = {0x1f, 0x1f, 0x18, 0x17, 0x19, 0x1e, 0x11}; /* s */ +static const uint8_t g_cht[7] = {0x1f, 0x1f, 0x1b, 0x11, 0x1b, 0x1b, 0x1b}; /* t */ +static const uint8_t g_chu[7] = {0x1f, 0x1f, 0x16, 0x16, 0x16, 0x16, 0x18}; /* u */ +static const uint8_t g_chv[7] = {0x1f, 0x1f, 0x16, 0x16, 0x16, 0x16, 0x19}; /* v */ +static const uint8_t g_chw[7] = {0x1f, 0x1f, 0x0a, 0x0a, 0x0a, 0x0a, 0x15}; /* w */ +static const uint8_t g_chx[7] = {0x1f, 0x1f, 0x0e, 0x15, 0x1b, 0x15, 0x0e}; /* x */ +static const uint8_t g_chy[7] = {0x1f, 0x1a, 0x1a, 0x1a, 0x1d, 0x1b, 0x17}; /* y */ +static const uint8_t g_cha[7] = {0x1f, 0x1f, 0x10, 0x1d, 0x1b, 0x17, 0x10}; /* z */ +static const uint8_t g_chlbrace[7] = {0x1d, 0x1b, 0x1b, 0x17, 0x1b, 0x1b, 0x1d}; /* { */ +static const uint8_t g_chvbar[7] = {0x1b, 0x1b, 0x1b, 0x1f, 0x1b, 0x1b, 0x1b}; /* | */ +static const uint8_t g_chrbrace[7] = {0x17, 0x1b, 0x1b, 0x1d, 0x1b, 0x1b, 0x17}; /* } */ +static const uint8_t g_chtilde[7] = {0x1f, 0x1a, 0x15, 0x1f, 0x1f, 0x1f, 0x1f}; /* ~ */ +#endif + +/* The current and previously selected glyph */ + +static const uint8_t *g_currglyph = g_chspace; +static const uint8_t *g_prevglyph = g_chspace; + +/* Current row and column */ + +static uint8_t g_anodecol = 1; +static uint8_t g_cathoderow = 0; +static int8_t g_intcount = 0; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + g_currglyph = g_chspace; + g_prevglyph = g_chspace; + g_anodecol = 1; + g_cathoderow = 0; +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + FAR const uint8_t *tmp = g_currglyph; + switch (led) + { + case LED_STARTED: + g_currglyph = g_ch0; + break; + + case LED_HEAPALLOCATE: + g_currglyph = g_chH; + break; + + case LED_IRQSENABLED: + g_currglyph = g_chE; + break; + + case LED_STACKCREATED: + g_currglyph = g_chC; + break; + + case LED_IDLE: + g_currglyph = g_chR; + break; + + case LED_INIRQ: + g_intcount++; + return; + + case LED_ASSERTION: + g_currglyph = g_chA; + break; + + case LED_SIGNAL: + g_currglyph = g_chS; + break; + + case LED_PANIC: + g_currglyph = g_chast; + break; + + default: + return; + } + + g_prevglyph = tmp; +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == LED_INIRQ) + { + g_intcount--; + } + else if (led == LED_PANIC && g_intcount > 0) + { + g_currglyph = g_chI; + } + else + { + g_currglyph = g_prevglyph; + } +} + +/**************************************************************************** + * Name: up_timerhook + ****************************************************************************/ + +void up_timerhook(void) +{ + if (g_cathoderow > 6) + { + g_anodecol = 1; + g_cathoderow = 0; + } + + ez80_putmmreg8(g_anodecol, EZ80_LEDANODE); + ez80_putmmreg8(g_currglyph[g_cathoderow], EZ80_LEDCATHODE); + + g_cathoderow++; + g_anodecol = g_anodecol << 1; +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/ez80f910200zco/src/ez80_lowinit.c b/configs/ez80f910200zco/src/ez80_lowinit.c new file mode 100644 index 0000000000000000000000000000000000000000..5983e5509bf84f72ecf74b8474b814a59bb2eb6a --- /dev/null +++ b/configs/ez80f910200zco/src/ez80_lowinit.c @@ -0,0 +1,66 @@ +/**************************************************************************** + * configs/ez80f910200zco/src/ez80_lowinit.c + * + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Based upon sample code included with the Zilog ZDS-II toolchain. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "chip/chip.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static void ez80_gpioinit(void) +{ +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void ez80_lowinit(void) +{ + ez80_gpioinit(); +} + diff --git a/configs/ez80f910200zco/src/ez80f910200zco.h b/configs/ez80f910200zco/src/ez80f910200zco.h new file mode 100644 index 0000000000000000000000000000000000000000..ee8ec3465e580eb0fa0865fc141e994058ad5130 --- /dev/null +++ b/configs/ez80f910200zco/src/ez80f910200zco.h @@ -0,0 +1,151 @@ +/**************************************************************************** + * arch/ez80f910200zco/src/ez80f910200zco.h + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef _CONFIGS_EZ80F910200ZCO_SRC_EZ80F910200ZCO_H +#define _CONFIGS_EZ80F910200ZCO_SRC_EZ80F910200ZCO_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#ifndef __ASSEMBLY__ +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Memory map. Board-specific extensions to the basic ez80f91 memory map + * (see arch/z80/src/ez80/ez80f91.h + */ + /* CS0: 0x000000 256Kb of on-chip flash */ +#define EZ80_OFFCHIPFLASH 0x400000 /* CS0: Off chip flash (Up to 4Mb-256Kb) */ +#define EZ80_LEDGPIOCNTRL 0x800000 /* CS2: (See below) */ +#define EZ80_PLTFMSRAM 0xb80000 /* CS2: Platform SRAM (512Kb) */ +#define EZ80_MODULESRAM 0xc00000 /* CS1: Module SRAM (up to 2Mb) */ + /* 0xffc000 On-chip EMAC SRAM (8Kb) */ + /* 0xffe000 On-chip SRAM (8Kb) */ + +/* LED and port emulation memory register addresses */ + +#define EZ80_LEDANODE 0x800000 /* WR: LED anode/GPIO port output control */ +#define EZ80_GPIOCNTRL EZ80_LEDANODE +#define EZ80_LEDCATHODE 0x800001 /* WR: LED cathode/Modem/Trig */ +#define EZ80_MODEM EZ80_LEDCATHODE +#define EZ80_TRIGGERS EZ80_LEDCATHODE +#define EZ80_GPIODATA 0x800002 /* RD/WR: GPIO data */ + +#define ez80_getmmreg8(a) (*(uint8_t*)(a)) +#define ez80_putmmreg8(v,a) (*(uint8_t*)(a) = (v)) + +/* LED anode/GPIO port output control bit definitions */ + +#define EZ80_ANODECOL1 0x01 +#define EZ80_ANODECOL2 0x02 +#define EZ80_ANODECOL3 0x04 +#define EZ80_ANODECOL4 0x08 +#define EZ80_ANODECOL5 0x10 +#define EZ80_ANODECOL6 0x20 +#define EZ80_ANODECOL7 0x40 +#define EZ80_GPIOOUTPUT 0x80 + +/* LED cathode/Modem/Trig bit definitions */ + +#define EZ80_CATHODEROW5 0x01 +#define EZ80_CATHODEROW4 0x02 +#define EZ80_CATHODEROW3 0x04 +#define EZ80_CATHODEROW2 0x08 +#define EZ80_CATHODEROW1 0x10 +#define EZ80_MODEMRESET 0x20 +#define EZ80_TRIG1 0x40 +#define EZ80_TRIG2 0x80 + +/* GPIO data bit definitions */ + +#define EZ80_GPIOD0 0x01 +#define EZ80_GPIOD1 0x02 +#define EZ80_GPIOD2 0x04 +#define EZ80_GPIOD3 0x08 +#define EZ80_GPIOD4 0x10 +#define EZ80_GPIOD5 0x20 +#define EZ80_GPIOD6 0x40 +#define EZ80_GPIOD7 0x80 + +/* Modem Signals: + * + * DCD: + * The Data Carrier Detect (DCD) signal at D1 indicates that a good carrier + * signal is being received from the remove mode. + * RX: + * The RX signal at D2 indicates that data is received from the modem. + * DTR: + * The Data Terminal Ready (DTR) signal at D3 informs the modem that the PC + * is ready. + * TX: + * The TX signal at D4 indicates that data is tranmitted to the modem. + */ + + /* Push buttons: + * + * PB0 SW1 Bit 0 of GPIO Port B + * PB1 SW2 Bit 1 of GPIO Port B + * PB2 SW3 Bit 2 of GPIO Port B + * RESET SW4 + */ + +#define EZ80_PB0_IRQ EZ80_PORTB0_IRQ /* Vector Oxa0 */ +#define EZ80_PB1_IRQ EZ80_PORTB1_IRQ /* Vector Oxa4 */ +#define EZ80_PB2_IRQ EZ80_PORTB2_IRQ /* Vector Oxa8 */ + + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* _CONFIGS_EZ80F910200ZCO_SRC_EZ80F910200ZCO_H */ diff --git a/configs/fire-stm32v2/Kconfig b/configs/fire-stm32v2/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..e423f8a2c2b519cbffaa8a43e60bc2af304ad088 --- /dev/null +++ b/configs/fire-stm32v2/Kconfig @@ -0,0 +1,28 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +comment "M3 Wildfire Configuration" + +if ARCH_BOARD_FIRE_STM32 + +choice + prompt "Select Wildfire STM32 version" + default ARCH_BOARD_FIRE_STM32V2 + ---help--- + This port has logic differences to support either the Version 2 or + Version 3 of the Wildfire board. + +config ARCH_BOARD_FIRE_STM32V2 + bool "Wildfire STM32v2" + ---help--- + Selects the M3 Wildfire version 2. + +config ARCH_BOARD_FIRE_STM32V3 + bool "Wildfire STM32v3" + ---help--- + Selects the M3 Wildfire version 3. + +endchoice +endif diff --git a/configs/fire-stm32v2/README.txt b/configs/fire-stm32v2/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..3af6249e505509a87651e64b831445f76b48898f --- /dev/null +++ b/configs/fire-stm32v2/README.txt @@ -0,0 +1,840 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the M3 +Wildfire development board (STM32F103VET6). See http://firestm32.taobao.com + +This configuration should support both the version 2 and version 3 of the +Wildfire board (using NuttX configuration options). However, only version 2 +has been verified. + +Contents +======== + + - Pin Configuration + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - DFU and JTAG + - OpenOCD + - LEDs + - RTC + - M3 Wildfire-specific Configuration Options + - Configurations + +Pin Configuration +================= +--- ------ -------------- ------------------------------------------------------------------- +PIN NAME SIGNAL NOTES +--- ------ -------------- ------------------------------------------------------------------- + +1 PE2 PE2-C-RCLK Camera (P9) +2 PE3 PE3-USB-M USB2.0 +3 PE4 PE4-BEEP LS1 Bell (v2) + PE4 10Mbps ENC28J60 Interrupt (v3) +4 PE5 (no name) 10Mbps ENC28J60 Interrupt (v2) + PE5 KEY1, Low when closed (pulled high if open) (v3) +5 PE6 +6 VBAT BT1 Battery (BT1) +7 PC13 Header 7X2 +8 PC14 PC14/OSC32-IN Y2 32.768KHz +9 PC15 PC15/OSC32-OUT Y2 32.768KHz +10 VSS_5 DGND +11 VDD_5 3V3 +12 OSC_IN Y1 8MHz +13 OSC_OUT Y1 8MHz +14 NRST REST1 Reset switch +15 PC0 +16 PC1 PC1/ADC123-IN11 Potentiometer (R16) +17 PC2 +18 PC3 PC3-LED1 LED1, Active low (pulled high) +19 VSSA DGND +20 VREF- DGND +21 VREF+ 3V3 +22 VDDA 3V3 +23 PA0 PA0-C-VSYNC Camera (P9) +24 PA1 PC1/ADC123-IN1 +25 PA2 PA2-US2-TX MAX3232, DB9 D7 + +--- ------ -------------- ------------------------------------------------------------------- +PIN NAME SIGNAL NOTES +--- ------ -------------- ------------------------------------------------------------------- + +26 PA3 PA3-US2-RX MAX3232, DB9 D7 +27 VSS_4 DGND +28 VDD_4 3V3 +29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH +30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH +31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH +32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH +33 PC4 PC4-LED2 LED2, Active low (pulled high) +34 PC5 PC5-LED3 LED3, Active low (pulled high) +35 PB0 PB0-KEY1 KEY1, Low when closed (pulled high if open) (v2) + PB0 Header P5 (v3) +36 PB1 PB1-KEY2 KEY2, Low when closed (pulled high if open) +37 PB2 BOOT1/DGND +38 PE7 PE7-FSMC_D4 2.4" TFT + Touchscreen +39 PE8 PE8-FSMC_D5 2.4" TFT + Touchscreen +40 PE9 PE9-FSMC_D6 2.4" TFT + Touchscreen +41 PE10 PE10-FSMC_D7 2.4" TFT + Touchscreen +42 PE11 PE11-FSMC_D8 2.4" TFT + Touchscreen +43 PE12 PE12-FSMC_D9 2.4" TFT + Touchscreen +44 PE13 PE13-FSMC_D10 2.4" TFT + Touchscreen +45 PE14 PE14-FSMC_D11 2.4" TFT + Touchscreen +46 PE15 PE15-FSMC_D12 2.4" TFT + Touchscreen +47 PB10 PB10-C-DO_2 Camera (P9) +48 PB11 PB11-MP3-RST MP3 + PB11-C-DO_3 Camera (P9) +49 VSS_1 DGND +50 VDD_1 3V3 + +--- ------ -------------- ------------------------------------------------------------------- +PIN NAME SIGNAL NOTES +--- ------ -------------- ------------------------------------------------------------------- + +51 PB12 PB12-SPI2-NSS MP3 + PB12-C-DO_4 Camera (P9) +52 PB13 PB13-SPI2-SCK MP3 + PB13-C-DO_5 Camera (P9) +53 PB14 PB14-SPI2-MISO MP3 + PB14-C-DO_6 Camera (P9) +54 PB15 PB15-SPI2-MOSI MP3 + PB15-C-DO_7 Camera (P9) +55 PD8 PD8-FSMC_D13 2.4" TFT + Touchscreen +56 PD9 PD9-FSMC_D14 2.4" TFT + Touchscreen +57 PD10 PD10-FSMC_D15 2.4" TFT + Touchscreen +58 PD11 PD11-FSMC_A16 2.4" TFT + Touchscreen +59 PD12 C-LED_EN Camera (P9) +60 PD13 PD13-LCD/LIGHT 2.4" TFT + Touchscreen +61 PD14 PD14-FSMC_D0 2.4" TFT + Touchscreen +62 PD15 PD15-FSMC_D1 2.4" TFT + Touchscreen +63 PC6 PC6-MP3-XDCS MP3 + PC6-C-SIO_C Camera (P9) +64 PC7 PC7-MP3-DREQ MP3 + PC7-C-SIO_D Camera (P9) +65 PC8 PC8-SDIO-D0 SD card, pulled high +66 PC9 PC9-SDIO-D1 SD card, pulled high +67 PA8 PA8-C-XCLK Camera (P9) +68 PA9 PA9-US1-TX MAX3232, DB9 D8 +69 PA10 PA10-US1-RX MAX3232, DB9 D8 +70 PA11 PA11-USBDM USB2.0 +71 PA12 PA12-USBDP USB2.0 +72 PA13 PA13-JTMS JTAG +73 N/C +74 VSS_2 DGND +75 VDD_2 3V3 + +--- ------ -------------- ------------------------------------------------------------------- +PIN NAME SIGNAL NOTES +--- ------ -------------- ------------------------------------------------------------------- + +76 PA14 PA14-JTCK JTAG +77 PA15 PA15-JTDI JTAG +78 PC10 PC10-SDIO-D2 SD card, pulled high +79 PC11 PC10-SDIO-D3 SD card, pulled high +80 PC12 PC12-SDIO-CLK SD card +81 PD0 PD0-FSMC_D2 2.4" TFT + Touchscreen +82 PD1 PD1-FSMC_D3 2.4" TFT + Touchscreen +83 PD2 PD2-SDIO-CMD SD card, pulled high +84 PD3 PD3-C-WEN Camera (P9) +85 PD4 PD4-FSMC_NOE 2.4" TFT + Touchscreen +86 PD5 PD5-FSMC_NWE 2.4" TFT + Touchscreen +87 PD6 PD6-C-OE Camera (P9) +88 PD7 PD7-FSMC_NE1 2.4" TFT + Touchscreen +89 PB3 PB3-JTDO JTAG +90 PB4 PB4-NJTRST JTAG +91 PB5 PB5-C-WRST Camera (P9) +92 PB6 PB6-I2C1-SCL 2.4" TFT + Touchscreen, AT24C02 +93 PB7 PB7-I2C1-SDA 2.4" TFT + Touchscreen, AT24C02 +94 BOOT0 SW3 3V3 or DGND +95 PB8 PB8-CAN-RX CAN tranceiver, Header 2H + PB8-C-DO_0 Camera (P9) +96 PB9 PB9-CAN-TX CAN tranceiver, Header 2H + PB9-C-DO_1 Camera (P9) +97 PE0 PE0-C-RRST Camera (P9) +98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen +99 VSS_3 DGND +100 VDD_3 3V3 + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment because the CodeSourcery Toolchain. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, or + 5. The NuttX buildroot Toolchain (see below). + + Most testing has been conducted using the CodeSourcery toolchain for Windows and + that is the default toolchain in most configurations. To use the Atollic, + devkitARM, Raisonance GNU, or NuttX buildroot toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcery (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. You many have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh fire-stm32v2/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +DFU and JTAG +============ + + Enbling Support for the DFU Bootloader + -------------------------------------- + The linker files in these projects can be configured to indicate that you + will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU) + loader or via some JTAG emulator. You can specify the DFU bootloader by + adding the following line: + + CONFIG_STM32_DFU=y + + to your .config file. Most of the configurations in this directory are set + up to use the DFU loader. + + If CONFIG_STM32_DFU is defined, the code will not be positioned at the beginning + of FLASH (0x08000000) but will be offset to 0x08003000. This offset is needed + to make space for the DFU loader and 0x08003000 is where the DFU loader expects + to find new applications at boot time. If you need to change that origin for some + other bootloader, you will need to edit the file(s) ld.script.dfu for the + configuration. + + The DFU SE PC-based software is available from the STMicro website, + http://www.st.com. General usage instructions: + + 1. Convert the NuttX Intel Hex file (nuttx.hex) into a special DFU + file (nuttx.dfu)... see below for details. + 2. Connect the M3 Wildfire board to your computer using a USB + cable. + 3. Start the DFU loader on the M3 Wildfire board. You do this by + resetting the board while holding the "Key" button. Windows should + recognize that the DFU loader has been installed. + 3. Run the DFU SE program to load nuttx.dfu into FLASH. + + What if the DFU loader is not in FLASH? The loader code is available + inside of the Demo dirctory of the USBLib ZIP file that can be downloaded + from the STMicro Website. You can build it using RIDE (or other toolchains); + you will need a JTAG emulator to burn it into FLASH the first time. + + In order to use STMicro's built-in DFU loader, you will have to get + the NuttX binary into a special format with a .dfu extension. The + DFU SE PC_based software installation includes a file "DFU File Manager" + conversion program that a file in Intel Hex format to the special DFU + format. When you successfully build NuttX, you will find a file called + nutt.hex in the top-level directory. That is the file that you should + provide to the DFU File Manager. You will end up with a file called + nuttx.dfu that you can use with the STMicro DFU SE program. + + Enabling JTAG + ------------- + If you are not using the DFU, then you will probably also need to enable + JTAG support. By default, all JTAG support is disabled but there NuttX + configuration options to enable JTAG in various different ways. + + These configurations effect the setting of the SWJ_CFG[2:0] bits in the AFIO + MAPR register. These bits are used to configure the SWJ and trace alternate function I/Os. The SWJ (SerialWire JTAG) supports JTAG or SWD access to the + Cortex debug port. The default state in this port is for all JTAG support + to be disable. + + CONFIG_STM32_JTAG_FULL_ENABLE - sets SWJ_CFG[2:0] to 000 which enables full + SWJ (JTAG-DP + SW-DP) + + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - sets SWJ_CFG[2:0] to 001 which enable + full SWJ (JTAG-DP + SW-DP) but without JNTRST. + + CONFIG_STM32_JTAG_SW_ENABLE - sets SWJ_CFG[2:0] to 010 which would set JTAG-DP + disabled and SW-DP enabled + + The default setting (none of the above defined) is SWJ_CFG[2:0] set to 100 + which disable JTAG-DP and SW-DP. + +OpenOCD +======= + +I have also used OpenOCD with the M3 Wildfire. In this case, I used +the Olimex USB ARM OCD. See the script in configs/fire-stm32v2/tools/oocd.sh +for more information. Using the script: + +1) Start the OpenOCD GDB server + + cd + configs/fire-stm32v2/tools/oocd.sh $PWD + +2) Load Nuttx + + cd + arm-none-eabi-gdb nuttx + gdb> target remote localhost:3333 + gdb> mon reset + gdb> mon halt + gdb> load nuttx + +3) Running NuttX + + gdb> mon reset + gdb> c + +LEDs +==== + +The M3 Wildfire has 3 LEDs labeled LED1, LED2 and LED3. These LEDs are not +used by the NuttX port unless CONFIG_ARCH_LEDS is defined. In that case, the +usage by the board port is defined in include/board.h and src/up_autoleds.c. +The LEDs are used to encode OS-related events as follows: + + /* LED1 LED2 LED3 */ + #define LED_STARTED 0 /* OFF OFF OFF */ + #define LED_HEAPALLOCATE 1 /* ON OFF OFF */ + #define LED_IRQSENABLED 2 /* OFF ON OFF */ + #define LED_STACKCREATED 3 /* OFF OFF OFF */ + + #define LED_INIRQ 4 /* NC NC ON (momentary) */ + #define LED_SIGNAL 5 /* NC NC ON (momentary) */ + #define LED_ASSERTION 6 /* NC NC ON (momentary) */ + #define LED_PANIC 7 /* NC NC ON (2Hz flashing) */ + #undef LED_IDLE /* Sleep mode indication not supported */ + +RTC +=== + + The STM32 RTC may configured using the following settings. + + CONFIG_RTC - Enables general support for a hardware RTC. Specific + architectures may require other specific settings. + CONFIG_RTC_HIRES - The typical RTC keeps time to resolution of 1 + second, usually supporting a 32-bit time_t value. In this case, + the RTC is used to "seed" the normal NuttX timer and the + NuttX timer provides for higher resoution time. If CONFIG_RTC_HIRES + is enabled in the NuttX configuration, then the RTC provides higher + resolution time and completely replaces the system timer for purpose of + date and time. + CONFIG_RTC_FREQUENCY - If CONFIG_RTC_HIRES is defined, then the + frequency of the high resolution RTC must be provided. If CONFIG_RTC_HIRES + is not defined, CONFIG_RTC_FREQUENCY is assumed to be one. + CONFIG_RTC_ALARM - Enable if the RTC hardware supports setting of an alarm. + A callback function will be executed when the alarm goes off + + In hi-res mode, the STM32 RTC operates only at 16384Hz. Overflow interrupts + are handled when the 32-bit RTC counter overflows every 3 days and 43 minutes. + A BKP register is incremented on each overflow interrupt creating, effectively, + a 48-bit RTC counter. + + In the lo-res mode, the RTC operates at 1Hz. Overflow interrupts are not handled + (because the next overflow is not expected until the year 2106. + + WARNING: Overflow interrupts are lost whenever the STM32 is powered down. The + overflow interrupt may be lost even if the STM32 is powered down only momentarily. + Therefore hi-res solution is only useful in systems where the power is always on. + +M3 Wildfire-specific Configuration Options +============================================ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32 + CONFIG_ARCH_CHIP_STM32F103VE + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=fire-stm32v2 (for the M3 Wildfire development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_FIRE_STM32V2=y (Version 2) + CONFIG_ARCH_BOARD_FIRE_STM32V3=y (Version 3) + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + AHB + --- + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + CONFIG_STM32_CRC + CONFIG_STM32_FSMC + CONFIG_STM32_SDIO + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_WWDG + CONFIG_STM32_IWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI4 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_USB + CONFIG_STM32_CAN1 + CONFIG_STM32_BKP + CONFIG_STM32_PWR + CONFIG_STM32_DAC1 + CONFIG_STM32_DAC2 + CONFIG_STM32_USB + + APB2 + ---- + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + CONFIG_STM32_TIM1 + CONFIG_STM32_SPI1 + CONFIG_STM32_TIM8 + CONFIG_STM32_USART1 + CONFIG_STM32_ADC3 + + Timer and I2C devices may need to the following to force power to be applied + unconditionally at power up. (Otherwise, the device is powered when it is + initialized). + + CONFIG_STM32_FORCEPOWER + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,8 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,8 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,8, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,8 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,8, m=1,..,2 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + Alternate pin mappings. The M3 Wildfire board requires only CAN1 remapping + On the M3 Wildfire board pin PB9 is wired as TX and pin PB8 is wired as RX. + Which then makes the proper connection through the CAN transiver SN65HVD230 + out to the CAN D-type 9-pn male connector where pin 2 is CANL and pin 7 is CANH. + + CONFIG_STM32_TIM1_FULL_REMAP + CONFIG_STM32_TIM1_PARTIAL_REMAP + CONFIG_STM32_TIM2_FULL_REMAP + CONFIG_STM32_TIM2_PARTIAL_REMAP_1 + CONFIG_STM32_TIM2_PARTIAL_REMAP_2 + CONFIG_STM32_TIM3_FULL_REMAP + CONFIG_STM32_TIM3_PARTIAL_REMAP + CONFIG_STM32_TIM4_REMAP + CONFIG_STM32_USART1_REMAP + CONFIG_STM32_USART2_REMAP + CONFIG_STM32_USART3_FULL_REMAP + CONFIG_STM32_USART3_PARTIAL_REMAP + CONFIG_STM32_SPI1_REMAP + CONFIG_STM32_SPI3_REMAP + CONFIG_STM32_I2C1_REMAP + CONFIG_STM32_CAN1_REMAP1 + CONFIG_STM32_CAN1_REMAP2 + CONFIG_STM32_CAN2_REMAP + + JTAG Enable settings (by default JTAG-DP and SW-DP are disabled): + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + + STM32F103Z specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + + CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO + and CONFIG_STM32_DMA2. + CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. + Default: Medium + CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: + 4-bit transfer mode. + + M3 Wildfire CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + + M3 Wildfire LCD Hardware Configuration + + CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape" + support. Default is this 320x240 "landscape" orientation + (this setting is informative only... not used). + CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait" + orientation support. In this orientation, the M3 Wildfire's + LCD ribbon cable is at the bottom of the display. Default is + 320x240 "landscape" orientation. + CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse + portrait" orientation support. In this orientation, the + M3 Wildfire's LCD ribbon cable is at the top of the display. + Default is 320x240 "landscape" orientation. + CONFIG_LCD_BACKLIGHT - Define to support a backlight. + CONFIG_LCD_PWM - If CONFIG_STM32_TIM1 is also defined, then an + adjustable backlight will be provided using timer 1 to generate + various pulse widthes. The granularity of the settings is + determined by CONFIG_LCD_MAXPOWER. If CONFIG_LCD_PWM (or + CONFIG_STM32_TIM1) is not defined, then a simple on/off backlight + is provided. + CONFIG_LCD_RDSHIFT - When reading 16-bit gram data, there appears + to be a shift in the returned data. This value fixes the offset. + Default 5. + + The LCD driver dynamically selects the LCD based on the reported LCD + ID value. However, code size can be reduced by suppressing support for + individual LCDs using: + + CONFIG_STM32_AM240320_DISABLE + CONFIG_STM32_SPFD5408B_DISABLE + +Configurations +============== + +Each M3 Wildfire configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh fire-stm32v2/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh + --- + Configure the NuttShell (nsh) located at examples/nsh. The nsh configuration + contains support for some built-in applications that can be enabled by making + some additional minor change to the configuration file. + + Reconfiguring: This configuration uses to the kconfig-mconf configuration tool + to control the configuration. See the section entitled "NuttX Configuration + Tool" in the top-level README.txt file. + + Start Delays: If no SD card is present in the slot, or if the network is not + connected, then there will be long start-up delays before you get the NSH + prompt. If I am focused on ENC28J60 debug, I usually disable MMC/SD so that + I don't have to bother with the SD card: + + CONFIG_STM32_SDIO=n + CONFIG_MMCSD=n + + STATUS: The board port is basically functional. Not all features have been + verified. The ENC28J60 network is not yet functional. Networking is + enabled by default in this configuration for testing purposes. To use this + configuration, the network must currently be disabled. To do this using + the kconfig-mconf configuration tool: + + > make menuconfig + + Then de-select "Networking Support" -> "Networking Support" + + UPDATE: The primary problem with the ENC29J60 is a v2 board issue: The + SPI FLASH and the ENC28J60 shared the same SPI chip select signal (PA4-SPI1-NSS). + In order to finish the debug of the ENC28J60, it may be necessary to lift + the SPI FLASH chip select pin from the board. + diff --git a/configs/fire-stm32v2/include/board.h b/configs/fire-stm32v2/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..880ea6d6c7de7f224cfe1a983790f4cf503ca59d --- /dev/null +++ b/configs/fire-stm32v2/include/board.h @@ -0,0 +1,404 @@ +/************************************************************************************ + * configs/fire-stm32v2/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_FIRE_STM32V2_INCLUDE_BOARD_H +#define __CONFIGS_FIRE_STM32V2_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* HSI - 8 MHz RC factory-trimmed + * LSI - 40 KHz RC (30-60KHz, uncalibrated) + * HSE - On-board crystal frequency is 8MHz + * LSE - 32.768 kHz crytal + */ + +#define STM32_BOARD_XTAL 8000000ul + +#define STM32_HSI_FREQUENCY 8000000ul +#define STM32_LSI_FREQUENCY 40000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */ + +#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC +#define STM32_CFGR_PLLXTPRE 0 +#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx9 +#define STM32_PLL_FREQUENCY (9*STM32_BOARD_XTAL) + +/* Use the PLL and set the SYSCLK source to be the PLL */ + +#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL +#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY + +/* AHB clock (HCLK) is SYSCLK (72MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (72MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */ + +/* APB2 timers 1 and 8 will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* USB divider -- Divide PLL clock by 1.5 */ + +#define STM32_CFGR_USBPRE 0 + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY + +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz + */ + +#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_SDXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* LED definitions ******************************************************************/ +/* The M3 Wildfire has 3 LEDs labeled LED1, LED2 and LED3. These LEDs are not + * used by the NuttX port unless CONFIG_ARCH_LEDS is defined. In that case, the + * usage by the board port is defined in include/board.h and src/up_autoleds.c. + * The LEDs are used to encode OS-related events as follows: + */ + /* LED1 LED2 LED3 */ +#define LED_STARTED 0 /* OFF OFF OFF */ +#define LED_HEAPALLOCATE 1 /* ON OFF OFF */ +#define LED_IRQSENABLED 2 /* OFF ON OFF */ +#define LED_STACKCREATED 3 /* OFF OFF OFF */ + +#define LED_INIRQ 4 /* NC NC ON (momentary) */ +#define LED_SIGNAL 4 /* NC NC ON (momentary) */ +#define LED_ASSERTION 4 /* NC NC ON (momentary) */ +#define LED_PANIC 4 /* NC NC ON (2Hz flashing) */ +#undef LED_IDLE /* Sleep mode indication not supported */ + +/* The M3 Wildfire supports several two user buttons: KEY1 and KEY2 */ + +#define BUTTON_KEY1 0 +#define BUTTON_KEY2 1 +#define NUM_BUTTONS 2 + +#define BUTTON_KEY1_BIT (1 << BUTTON_KEY1) +#define BUTTON_KEY2_BIT (1 << BUTTON_KEY2) + +/* Pin Remapping ********************************************************************/ +/* USB 2.0 + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 70 PA11 PA11-USBDM USB2.0 + * 71 PA12 PA12-USBDP USB2.0 + * 2 PE3 PE3-USB-M USB2.0 + */ + +/* 2.4" TFT + Touchscreen + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 92 PB6 PB6-I2C1-SCL 2.4" TFT + Touchscreen, AT24C02 + * 93 PB7 PB7-I2C1-SDA 2.4" TFT + Touchscreen, AT24C02 + * 81 PD0 PD0-FSMC_D2 2.4" TFT + Touchscreen + * 82 PD1 PD1-FSMC_D3 2.4" TFT + Touchscreen + * 85 PD4 PD4-FSMC_NOE 2.4" TFT + Touchscreen + * 86 PD5 PD5-FSMC_NWE 2.4" TFT + Touchscreen + * 88 PD7 PD7-FSMC_NE1 2.4" TFT + Touchscreen + * 55 PD8 PD8-FSMC_D13 2.4" TFT + Touchscreen + * 56 PD9 PD9-FSMC_D14 2.4" TFT + Touchscreen + * 57 PD10 PD10-FSMC_D15 2.4" TFT + Touchscreen + * 58 PD11 PD11-FSMC_A16 2.4" TFT + Touchscreen + * 60 PD13 PD13-LCD/LIGHT 2.4" TFT + Touchscreen + * 61 PD14 PD14-FSMC_D0 2.4" TFT + Touchscreen + * 62 PD15 PD15-FSMC_D1 2.4" TFT + Touchscreen + * 98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen, 10Mbit EN28J60 Reset + * 38 PE7 PE7-FSMC_D4 2.4" TFT + Touchscreen + * 39 PE8 PE8-FSMC_D5 2.4" TFT + Touchscreen + * 40 PE9 PE9-FSMC_D6 2.4" TFT + Touchscreen + * 41 PE10 PE10-FSMC_D7 2.4" TFT + Touchscreen + * 42 PE11 PE11-FSMC_D8 2.4" TFT + Touchscreen + * 43 PE12 PE12-FSMC_D9 2.4" TFT + Touchscreen + * 44 PE13 PE13-FSMC_D10 2.4" TFT + Touchscreen + * 45 PE14 PE14-FSMC_D11 2.4" TFT + Touchscreen + * 46 PE15 PE15-FSMC_D12 2.4" TFT + Touchscreen + */ + +#if defined(CONFIG_STM32_SPI1) && defined(CONFIG_STM32_SPI1_REMAP) +# error "SPI1 requires CONFIG_STM32_SPI1_REMAP=n" +#endif + +#if defined(CONFIG_STM32_I2C1) && defined(CONFIG_STM32_I2C1_REMAP) +# error "SPI1 requires CONFIG_STM32_I2C1_REMAP=n" +#endif + +/* AT24C02 + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 92 PB6 PB6-I2C1-SCL 2.4" TFT + Touchscreen, AT24C02 + * 93 PB7 PB7-I2C1-SDA 2.4" TFT + Touchscreen, AT24C02 + */ + +#if defined(CONFIG_STM32_I2C1) && defined(CONFIG_STM32_I2C1_REMAP) +# error "SPI1 requires CONFIG_STM32_I2C1_REMAP=n" +#endif + +/* Potentiometer/ADC + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 16 PC1 PC1/ADC123-IN11 Potentiometer (R16) + * 24 PA1 PC1/ADC123-IN1 + */ + +/* USARTs + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 68 PA9 PA9-US1-TX MAX3232, DB9 D8, Requires !CONFIG_STM32_USART1_REMAP + * 69 PA10 PA10-US1-RX MAX3232, DB9 D8, Requires !CONFIG_STM32_USART1_REMAP + * 25 PA2 PA2-US2-TX MAX3232, DB9 D7, Requires !CONFIG_STM32_USART2_REMAP + * 26 PA3 PA3-US2-RX MAX3232, DB9 D7, Requires !CONFIG_STM32_USART2_REMAP + */ + +#if defined(CONFIG_STM32_USART1) && defined(CONFIG_STM32_USART1_REMAP) +# errror "USART1 requires CONFIG_STM32_USART1_REMAP=n" +#endif + +#if defined(CONFIG_STM32_USART2) && defined(CONFIG_STM32_USART2_REMAP) +# errror "USART2 requires CONFIG_STM32_USART2_REMAP=n" +#endif + +/* 2MBit SPI FLASH + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH + * 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + */ + +#if defined(CONFIG_STM32_SPI1) && defined(CONFIG_STM32_SPI1_REMAP) +# error "SPI1 requires CONFIG_STM32_SPI1_REMAP=n" +#endif + +/* ENC28J60 + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH + * 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen, 10Mbit EN28J60 Reset + * 4 PE5 (no name) 10Mbps ENC28J60 Interrupt + */ + +#if defined(CONFIG_STM32_SPI1) && defined(CONFIG_STM32_SPI1_REMAP) +# error "SPI1 requires CONFIG_STM32_SPI1_REMAP=n" +#endif + +/* MP3 + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 48 PB11 PB11-MP3-RST MP3 + * 51 PB12 PB12-SPI2-NSS MP3 + * 52 PB13 PB13-SPI2-SCK MP3 + * 53 PB14 PB14-SPI2-MISO MP3 + * 54 PB15 PB15-SPI2-MOSI MP3 + * 63 PC6 PC6-MP3-XDCS MP3 + * 64 PC7 PC7-MP3-DREQ MP3 + */ + +/* SD Card + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 65 PC8 PC8-SDIO-D0 SD card, pulled high + * 66 PC9 PC9-SDIO-D1 SD card, pulled high + * 78 PC10 PC10-SDIO-D2 SD card, pulled high + * 79 PC11 PC10-SDIO-D3 SD card, pulled high + * 80 PC12 PC12-SDIO-CLK SD card + * 83 PD2 PD2-SDIO-CMD SD card, pulled high + */ + +/* CAN + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 95 PB8 PB8-CAN-RX CAN tranceiver, Header 2H + * 96 PB9 PB9-CAN-TX CAN tranceiver, Header 2H + */ + +#if defined(CONFIG_STM32_CAN1) && !defined(CONFIG_STM32_CAN1_REMAP1) +# error "SPI1 requires CONFIG_STM32_CAN1_REMAP1=y" +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +/************************************************************************************ + * Name: fire_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the M3 Wildfire board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * dispaly is cleared by simply setting all GRAM memory to the specified color. + * + ************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void fire_lcdclear(uint16_t color); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_FIRE_STM32V2_INCLUDE_BOARD_H */ diff --git a/configs/fire-stm32v2/nsh/Make.defs b/configs/fire-stm32v2/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6c57737576b52a6a34854c4c88b2f0f6d4d40ad7 --- /dev/null +++ b/configs/fire-stm32v2/nsh/Make.defs @@ -0,0 +1,119 @@ +############################################################################ +# configs/fire-stm32v2/nsh/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +# Pick the linker script + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/fire-stm32v2/nsh/defconfig b/configs/fire-stm32v2/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..bc729a38586df266700d8eb136386b4c3cd8f17d --- /dev/null +++ b/configs/fire-stm32v2/nsh/defconfig @@ -0,0 +1,1457 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +CONFIG_ARCH_CHIP_STM32F103VE=y +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +CONFIG_STM32_BKP=y +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_FSMC is not set +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +CONFIG_STM32_PWR=y +CONFIG_STM32_SDIO=y +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_I2C1_REMAP is not set +# CONFIG_STM32_SPI1_REMAP is not set +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set + +# +# I2C Configuration +# +CONFIG_STM32_I2C_ALT=y +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set + +# +# SDIO Configuration +# +CONFIG_SDIO_DMAPRIO=0x00001000 +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_FIRE_STM32=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="fire-stm32v2" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# + +# +# M3 Wildfire Configuration +# +CONFIG_ARCH_BOARD_FIRE_STM32V2=y +# CONFIG_ARCH_BOARD_FIRE_STM32V3 is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_POLLED=y +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +# CONFIG_RTC_DATETIME is not set +# CONFIG_RTC_HIRES is not set +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +CONFIG_ARCH_HAVE_SDIO=y +CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y +CONFIG_MMCSD_SDIO=y +CONFIG_SDIO_PREFLIGHT=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_SDIO_BLOCKSETUP is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +CONFIG_ENC28J60=y +CONFIG_ENC28J60_NINTERFACES=1 +CONFIG_ENC28J60_SPIMODE=0 +CONFIG_ENC28J60_FREQUENCY=20000000 +# CONFIG_ENC28J60_HALFDUPPLEX is not set +# CONFIG_ENC28J60_DUMPPACKET is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +CONFIG_USBMSC=y +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=2 +CONFIG_USBMSC_EPBULKIN=5 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=256 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" +CONFIG_USBMSC_VERSIONNO=0x0399 +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=2048 +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=16 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=1 +CONFIG_I2CTOOL_MAXBUS=2 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=100000 +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +CONFIG_SYSTEM_USBMSC=y +CONFIG_SYSTEM_USBMSC_NLUNS=1 +CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mmcsd0" +CONFIG_SYSTEM_USBMSC_DEVMINOR2=1 +CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_USBMSC_DEVMINOR3=2 +CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" +# CONFIG_SYSTEM_USBMSC_DEBUGMM is not set +CONFIG_SYSTEM_USBMSC_CMD_STACKSIZE=768 +CONFIG_SYSTEM_USBMSC_CMD_PRIORITY=100 +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/fire-stm32v2/nsh/setenv.sh b/configs/fire-stm32v2/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..072fae772c923b8c9ee40920519834bd9ffa9c10 --- /dev/null +++ b/configs/fire-stm32v2/nsh/setenv.sh @@ -0,0 +1,78 @@ +#!/bin/bash +# configs/fire-stm32v2/nsh/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the tools/ subdirectory +export TOOLS_DIR="${WD}/configs/fire-stm32v2/tools" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:${TOOLS_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/fire-stm32v2/scripts/ld.script b/configs/fire-stm32v2/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..225af3834bf872d8b62b285160abbfcc496c5435 --- /dev/null +++ b/configs/fire-stm32v2/scripts/ld.script @@ -0,0 +1,118 @@ +/**************************************************************************** + * configs/fire-stm32v2/scripts/ld.script + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F103VET6 has 512Kb of FLASH beginning at address 0x0800:0000 and + * 64Kb of SRAM beginning at address 0x2000:0000. When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F103Z has 64Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/fire-stm32v2/scripts/ld.script.dfu b/configs/fire-stm32v2/scripts/ld.script.dfu new file mode 100644 index 0000000000000000000000000000000000000000..fd6576cc318181be1653fc9b621de450eac68f41 --- /dev/null +++ b/configs/fire-stm32v2/scripts/ld.script.dfu @@ -0,0 +1,117 @@ +/**************************************************************************** + * configs/fire-stm32v2/scripts/ld.script.dfu + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F103VET6 has 512Kb of FLASH beginning at address 0x0800:0000 and + * 64Kb of SRAM beginning at address 0x2000:0000. Here we assume that the + * STM3210E-EVAL's DFU bootloader is being used. In that case, the corrct + * load .text load address is 0x08003000 (leaving 464Kb). + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08003000, LENGTH = 464K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F103Z has 64Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/fire-stm32v2/src/.gitignore b/configs/fire-stm32v2/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/fire-stm32v2/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/fire-stm32v2/src/Makefile b/configs/fire-stm32v2/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..c9c97c43e831d8ddf9dba9ae3ad4c9ce0f218aec --- /dev/null +++ b/configs/fire-stm32v2/src/Makefile @@ -0,0 +1,79 @@ +############################################################################ +# configs/fire-stm32v2/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c stm32_usbdev.c stm32_mmcsd.c + +ifeq ($(CONFIG_STM32_FSMC),y) +CSRCS += stm32_lcd.c stm32_selectlcd.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_ENC28J60),y) +CSRCS += stm32_enc28j60.c +endif + +ifeq ($(CONFIG_MTD_W25),y) +CSRCS += stm32_w25.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += stm32_usbmsc.c +endif + +ifeq ($(CONFIG_USBDEV_COMPOSITE),y) +CSRCS += stm32_composite.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += stm32_watchdog.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/fire-stm32v2/src/fire-stm32v2.h b/configs/fire-stm32v2/src/fire-stm32v2.h new file mode 100644 index 0000000000000000000000000000000000000000..c9868767a9fca6f7e18d183d299c02afefbc5055 --- /dev/null +++ b/configs/fire-stm32v2/src/fire-stm32v2.h @@ -0,0 +1,339 @@ +/************************************************************************************ + * configs/fire-stm32v2/src/fire-stm32v2.h + * arch/arm/src/board/fire-stm32v2.n + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_FIRE_STM32V2_SRC_FIRE_H +#define __CONFIGS_FIRE_STM32V2_SRC_FIRE_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* How many SPI modules does this chip support? Most support 2 SPI modules (others + * may support more -- in such case, the following must be expanded). + */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +#endif + +/* There is only CAN1 on the M3 Wildfire board */ + +#if defined(CONFIG_STM32_CAN2) +# warning "The M3 Wildfire only supports CAN1" +#endif + +/* Do we need to register I2C drivers on behalf of the I2C tool? */ + +#define HAVE_I2CTOOL 1 +#if !defined(CONFIG_SYSTEM_I2CTOOL) || !defined(CONFIG_I2C_DRIVER) +# undef HAVE_I2CTOOL +#endif + +/* M3 Wildfire GPIOs ****************************************************************/ +/* Camera + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 23 PA0 PA0-C-VSYNC Camera (P9) + * 67 PA8 PA8-C-XCLK Camera (P9) + * 91 PB5 PB5-C-WRST Camera (P9) + * 95 PB8 PB8-C-DO_0 Camera (P9) + * 96 PB9 PB9-C-DO_1 Camera (P9) + * 47 PB10 PB10-C-DO_2 Camera (P9) + * 48 PB11 PB11-C-DO_3 Camera (P9) + * 51 PB12 PB12-C-DO_4 Camera (P9) + * 52 PB13 PB13-C-DO_5 Camera (P9) + * 53 PB14 PB14-C-DO_6 Camera (P9) + * 54 PB15 PB15-C-DO_7 Camera (P9) + * 63 PC6 PC6-C-SIO_C Camera (P9) + * 64 PC7 PC7-C-SIO_D Camera (P9) + * 84 PD3 PD3-C-WEN Camera (P9) + * 87 PD6 PD6-C-OE Camera (P9) + * 59 PD12 C-LED_EN Camera (P9) + * 97 PE0 PE0-C-RRST Camera (P9) + * 1 PE2 PE2-C-RCLK Camera (P9) + */ + +/* Bell + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 3 PE4 PE4-BEEP LS1 Bell + */ + +/* 2.4" TFT + Touchscreen + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 92 PB6 PB6-I2C1-SCL 2.4" TFT + Touchscreen, AT24C02 + * 93 PB7 PB7-I2C1-SDA 2.4" TFT + Touchscreen, AT24C02 + * 81 PD0 PD0-FSMC_D2 2.4" TFT + Touchscreen + * 82 PD1 PD1-FSMC_D3 2.4" TFT + Touchscreen + * 85 PD4 PD4-FSMC_NOE 2.4" TFT + Touchscreen + * 86 PD5 PD5-FSMC_NWE 2.4" TFT + Touchscreen + * 88 PD7 PD7-FSMC_NE1 2.4" TFT + Touchscreen + * 55 PD8 PD8-FSMC_D13 2.4" TFT + Touchscreen + * 56 PD9 PD9-FSMC_D14 2.4" TFT + Touchscreen + * 57 PD10 PD10-FSMC_D15 2.4" TFT + Touchscreen + * 58 PD11 PD11-FSMC_A16 2.4" TFT + Touchscreen + * 60 PD13 PD13-LCD/LIGHT 2.4" TFT + Touchscreen + * 61 PD14 PD14-FSMC_D0 2.4" TFT + Touchscreen + * 62 PD15 PD15-FSMC_D1 2.4" TFT + Touchscreen + * 98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen + * 38 PE7 PE7-FSMC_D4 2.4" TFT + Touchscreen + * 39 PE8 PE8-FSMC_D5 2.4" TFT + Touchscreen + * 40 PE9 PE9-FSMC_D6 2.4" TFT + Touchscreen + * 41 PE10 PE10-FSMC_D7 2.4" TFT + Touchscreen + * 42 PE11 PE11-FSMC_D8 2.4" TFT + Touchscreen + * 43 PE12 PE12-FSMC_D9 2.4" TFT + Touchscreen + * 44 PE13 PE13-FSMC_D10 2.4" TFT + Touchscreen + * 45 PE14 PE14-FSMC_D11 2.4" TFT + Touchscreen + * 46 PE15 PE15-FSMC_D12 2.4" TFT + Touchscreen + */ + +#define GPIO_LCD_BACKLIGHT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN13) + +/* GPIO_LCD_CS - Is there some kind of chip select for SPI1? */ + +/* LEDs + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 18 PC3 PC3-LED1 LED1, Active low (pulled high) + * 33 PC4 PC4-LED2 LED2, Active low (pulled high) + * 34 PC5 PC5-LED3 LED3, Active low (pulled high) + */ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN3) +#define GPIO_LED2 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN4) +#define GPIO_LED3 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN5) + +/* Buttons + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 35 PB0 PB0-KEY1 KEY1, Low when closed (pulled high if open) (v2) + * 35 PE5 PB0 KEY1, Low when closed (pulled high if open) (v3) + * 36 PB1 PB1-KEY2 KEY2, Low when closed (pulled high if open) + */ + +#define MIN_IRQBUTTON BUTTON_KEY1 +#define MAX_IRQBUTTON BUTTON_KEY2 +#define NUM_IRQBUTTONS (MAX_IRQBUTTON - MIN_IRQBUTTON + 1) + +#ifdef CONFIG_ARCH_BOARD_FIRE_STM32V3 +# define GPIO_BTN_KEY1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_EXTI|GPIO_PORTE|GPIO_PIN5) +#else +# define GPIO_BTN_KEY1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_EXTI|GPIO_PORTB|GPIO_PIN0) +#endif +#define GPIO_BTN_KEY2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_EXTI|GPIO_PORTB|GPIO_PIN1) + +/* 2MBit SPI FLASH + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH + * 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + */ + +#ifndef CONFIG_ENC28J60 +# define GPIO_FLASH_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) +#endif + +/* ENC28J60 + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH + * 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen, 10Mbit EN28J60 Reset + * 4 PE5 (no name) 10Mbps ENC28J60 Interrupt (v2) + * 4 PE4 PE4 10Mbps ENC28J60 Interrupt (v3) + */ + +#if defined(CONFIG_STM32_FSMC) && defined(CONFIG_ENC28J60) +# warning "TFT LCD and ENCJ2860 shared PE1" +#endif + +/* CS and Reset are active low. Initial states are not selected and in + * reset. The ENC28J60 is taken out of reset when the driver is + * initialized (thedriver does a soft reset too). + */ + +#ifdef CONFIG_ENC28J60 +# define GPIO_ENC28J60_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) +# define GPIO_ENC28J60_RESET (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN1) +#ifdef CONFIG_ARCH_BOARD_FIRE_STM32V3 +# define GPIO_ENC28J60_INTR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_EXTI|GPIO_PORTE|GPIO_PIN4) +#else /* CONFIG_ARCH_BOARD_FIRE_STM32V2 */ +# define GPIO_ENC28J60_INTR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_EXTI|GPIO_PORTE|GPIO_PIN5) +#endif +#endif + +/* MP3 + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 48 PB11 PB11-MP3-RST MP3 + * 51 PB12 PB12-SPI2-NSS MP3 + * 52 PB13 PB13-SPI2-SCK MP3 + * 53 PB14 PB14-SPI2-MISO MP3 + * 54 PB15 PB15-SPI2-MOSI MP3 + * 63 PC6 PC6-MP3-XDCS MP3 + * 64 PC7 PC7-MP3-DREQ MP3 + */ + +#define GPIO_MP3_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN6) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the M3 Wildfire board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the M3 Wildfire board. + * + ************************************************************************************/ + +void weak_function stm32_usbinitialize(void); + +/************************************************************************************ + * Name: stm32_selectlcd + * + * Description: + * Initialize to the LCD + * + ************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_selectlcd(void); +#endif + +/**************************************************************************** + * Name: stm32_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires CONFIG_DISABLE_MOUNTPOINT=n + * and CONFIG_STM32_SDIO=y + * + ****************************************************************************/ + +int stm32_sdinitialize(int minor); + +/**************************************************************************** + * Name: stm32_w25initialize + * + * Description: + * Initialize and register the W25 FLASH file system. + * + ****************************************************************************/ + +#ifdef CONFIG_MTD_W25 +int stm32_w25initialize(int minor); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_FIRE_STM32V2_SRC_FIRE_H */ + diff --git a/configs/fire-stm32v2/src/stm32_appinit.c b/configs/fire-stm32v2/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..8c45062a8f30711b28f574542bb3116765280171 --- /dev/null +++ b/configs/fire-stm32v2/src/stm32_appinit.c @@ -0,0 +1,236 @@ +/**************************************************************************** + * config/fire-stm32v2/src/stm32_appinit.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "stm32.h" +#include "stm32_i2c.h" +#include "fire-stm32v2.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Assume that we support everything until convinced otherwise */ + +#define HAVE_MMCSD 1 +#define HAVE_USBDEV 1 +#define HAVE_W25 1 + +/* Configuration ************************************************************/ +/* SPI1 connects to the SD CARD (and to the SPI FLASH) */ + +#define STM32_MMCSDSPIPORTNO 1 /* SPI1 */ +#define STM32_MMCSDSLOTNO 0 /* Only one slot */ + +/* Can't support MMC/SD features if the SDIO peripheral is disabled */ + +#ifndef CONFIG_STM32_SDIO +# undef HAVE_MMCSD +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# undef HAVE_MMCSD +#endif + +/* Default MMC/SD minor number */ + +#ifdef HAVE_MMCSD +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif + +/* Default MMC/SD SLOT number */ + +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != STM32_MMCSDSLOTNO +# error "Only one MMC/SD slot: Slot 0" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO STM32_MMCSDSLOTNO +# endif + +# ifndef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO STM32_MMCSDSLOTNO +# endif +#endif + +/* Can't support the W25 device if it SPI1 or W25 support is not enabled */ + +#if !defined(CONFIG_STM32_SPI1) || !defined(CONFIG_MTD_W25) +# undef HAVE_W25 +#endif + +/* Can't support W25 features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef HAVE_W25 +#endif + +/* Default W25 minor number */ + +#if defined(HAVE_W25) && !defined(CONFIG_NSH_W25MINOR) +# define CONFIG_NSH_W25MINOR 0 +#endif + +/* Can't support USB host or device features if the USB peripheral or the USB + * device infrastructure is not enabled + */ + +#if !defined(CONFIG_STM32_USB) || !defined(CONFIG_USBDEV) +# undef HAVE_USBDEV +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_i2c_register + * + * Description: + * Register one I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void stm32_i2c_register(int bus) +{ + FAR struct i2c_master_s *i2c; + int ret; + + i2c = stm32_i2cbus_initialize(bus); + if (i2c == NULL) + { + dbg("ERROR: Failed to get I2C%d interface\n", bus); + } + else + { + ret = i2c_register(i2c, bus); + if (ret < 0) + { + dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); + stm32_i2cbus_uninitialize(i2c); + } + } +} +#endif + +/**************************************************************************** + * Name: stm32_i2ctool + * + * Description: + * Register I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void stm32_i2ctool(void) +{ +#ifdef CONFIG_STM32_I2C1 + stm32_i2c_register(1); +#endif +#ifdef CONFIG_STM32_I2C2 + stm32_i2c_register(2); +#endif +#ifdef CONFIG_STM32_I2C3 + stm32_i2c_register(3); +#endif +} +#else +# define stm32_i2ctool() +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(HAVE_MMCSD) || defined(HAVE_W25) + int ret; +#endif + + /* Register I2C drivers on behalf of the I2C tool */ + + stm32_i2ctool(); + +#ifdef HAVE_W25 + /* Initialize and register the W25 FLASH file system. */ + + ret = stm32_w25initialize(CONFIG_NSH_W25MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize W25 minor %d: %d\n", + CONFIG_NSH_W25MINOR, ret); + return ret; + } +#endif + +#ifdef HAVE_MMCSD + /* Initialize the SDIO-based MMC/SD slot */ + + ret = stm32_sdinitialize(CONFIG_NSH_MMCSDMINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSLOTNO, ret); + return ret; + } +#endif + + return OK; +} diff --git a/configs/fire-stm32v2/src/stm32_autoleds.c b/configs/fire-stm32v2/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..82501996013ccb66ca243d5712c8c2ca1fdff1b3 --- /dev/null +++ b/configs/fire-stm32v2/src/stm32_autoleds.c @@ -0,0 +1,390 @@ +/**************************************************************************** + * configs/fire-stm32v2/src/stm32_autoleds.c + * + * Copyright (C) 2012-2013, 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "fire-stm32v2.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* The following definitions map the encoded LED setting to GPIO settings. + * + * OFFBITS ONBITS + * CLR SET CLR SET + * 210 210 210 210 + */ + +#define FIRE_LED1 (1 << 0) +#define FIRE_LED2 (1 << 1) +#define FIRE_LED3 (1 << 2) + +#define ON_SETBITS_SHIFT (0) +#define ON_CLRBITS_SHIFT (3) +#define OFF_SETBITS_SHIFT (6) +#define OFF_CLRBITS_SHIFT (9) + +#define ON_BITS(v) ((v) & 0x3f) +#define OFF_BITS(v) (((v) >> 6) & 0x03f) +#define SETBITS(b) ((b) & 0x07) +#define CLRBITS(b) (((b) >> 3) & 0x07) + +#define ON_SETBITS(v) (SETBITS(ON_BITS(v)) +#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v)) +#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v)) +#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v)) + +/* ON OFF + * -------------------------- -- ------------------ ----------------- + * LED1 LED2 LED3 LED1 LED2 LED3 + * -------------------------- -- ------ ----- ----- ----- ----- ----- + * LED_STARTED 0 OFF OFF OFF OFF OFF OFF + * LED_HEAPALLOCATE 1 ON OFF OFF OFF OFF OFF + * LED_IRQSENABLED 2 OFF ON OFF ON OFF OFF + * LED_STACKCREATED 3 OFF OFF OFF OFF ON OFF + * + * LED_INIRQ 4 NC NC ON NC NC OFF + * LED_SIGNAL 4 NC NC ON NC NC OFF + * LED_ASSERTION 4 NC NC ON NC NC OFF + * LED_PANIC 4 NC NC ON NC NC OFF + * -------------------------- -- ------ ----- ----- ----- ----- ----- + */ + +#define LED_STARTED_ON_SETBITS (0) +#define LED_STARTED_ON_CLRBITS ((FIRE_LED1|FIRE_LED2|FIRE_LED3) << ON_CLRBITS_SHIFT) +#define LED_STARTED_OFF_SETBITS (0) +#define LED_STARTED_OFF_CLRBITS ((FIRE_LED1|FIRE_LED2|FIRE_LED3) << OFF_CLRBITS_SHIFT) + +#define LED_HEAPALLOCATE_ON_SETBITS ((FIRE_LED1) << ON_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_ON_CLRBITS ((FIRE_LED2|FIRE_LED3) << ON_CLRBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_SETBITS (0) +#define LED_HEAPALLOCATE_OFF_CLRBITS ((FIRE_LED1|FIRE_LED2|FIRE_LED3) << OFF_CLRBITS_SHIFT) + +#define LED_IRQSENABLED_ON_SETBITS ((FIRE_LED2) << ON_SETBITS_SHIFT) +#define LED_IRQSENABLED_ON_CLRBITS ((FIRE_LED1|FIRE_LED3) << ON_CLRBITS_SHIFT) +#define LED_IRQSENABLED_OFF_SETBITS ((FIRE_LED1) << OFF_SETBITS_SHIFT) +#define LED_IRQSENABLED_OFF_CLRBITS ((FIRE_LED1|FIRE_LED2|FIRE_LED3) << OFF_CLRBITS_SHIFT) + +#define LED_STACKCREATED_ON_SETBITS (0) +#define LED_STACKCREATED_ON_CLRBITS ((FIRE_LED1|FIRE_LED2|FIRE_LED3) << ON_CLRBITS_SHIFT) +#define LED_STACKCREATED_OFF_SETBITS ((FIRE_LED2) << OFF_SETBITS_SHIFT) +#define LED_STACKCREATED_OFF_CLRBITS ((FIRE_LED1|FIRE_LED3) << OFF_CLRBITS_SHIFT) + +#define LED_FLASH_ON_SETBITS ((FIRE_LED3) << ON_SETBITS_SHIFT) +#define LED_FLASH_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_FLASH_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_FLASH_OFF_CLRBITS ((FIRE_LED3) << OFF_CLRBITS_SHIFT) + +/************************************************************************************** + * Private Function Protototypes + **************************************************************************************/ + +/* LED State Controls */ + +static inline void led_clrbits(unsigned int clrbits); +static inline void led_setbits(unsigned int setbits); +static void led_setonoff(unsigned int bits); + +/* LED Power Management */ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint16_t g_ledbits[8] = +{ + (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | + LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS), + + (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS | + LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS), + + (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS | + LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS), + + (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS | + LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS), + + (LED_FLASH_ON_SETBITS | LED_FLASH_ON_CLRBITS | + LED_FLASH_OFF_SETBITS | LED_FLASH_OFF_CLRBITS) +}; + +#ifdef CONFIG_PM +static struct pm_callback_s g_ledscb = +{ + .notify = led_pm_notify, + .prepare = led_pm_prepare, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_clrbits + * + * Description: + * Clear all LEDs to the bit encoded state. The LEDs are pulled up and, + * hence, active low. + * + ****************************************************************************/ + +static inline void led_clrbits(unsigned int clrbits) +{ + if ((clrbits & FIRE_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, true); + } + + if ((clrbits & FIRE_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, true); + } + + if ((clrbits & FIRE_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, true); + } +} + +/**************************************************************************** + * Name: led_setbits + * + * Description: + * Set all LEDs to the bit encoded state. The LEDs are pulled up and, + * hence, active low. + * + ****************************************************************************/ + +static inline void led_setbits(unsigned int setbits) +{ + if ((setbits & FIRE_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, false); + } + + if ((setbits & FIRE_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, false); + } + + if ((setbits & FIRE_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, false); + } +} + +/**************************************************************************** + * Name: led_setonoff + * + * Description: + * Set/clear all LEDs to the bit encoded state + * + ****************************************************************************/ + +static void led_setonoff(unsigned int bits) +{ + led_clrbits(CLRBITS(bits)); + led_setbits(SETBITS(bits)); +} + +/**************************************************************************** + * Name: led_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + switch (pmstate) + { + case(PM_NORMAL): + { + /* Restore normal LEDs operation */ + + } + break; + + case(PM_IDLE): + { + /* Entering IDLE mode - Turn leds off */ + + } + break; + + case(PM_STANDBY): + { + /* Entering STANDBY mode - Logic for PM_STANDBY goes here */ + + } + break; + + case(PM_SLEEP): + { + /* Entering SLEEP mode - Logic for PM_SLEEP goes here */ + + } + break; + + default: + { + /* Should not get here */ + + } + break; + } +} +#endif + +/**************************************************************************** + * Name: led_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* No preparation to change power modes is required by the LEDs driver. + * We always accept the state change by returning OK. + */ + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_setonoff(ON_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_setonoff(OFF_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: up_ledpminitialize + ****************************************************************************/ + +#ifdef CONFIG_PM +void up_ledpminitialize(void) +{ + /* Register to receive power management callbacks */ + + int ret = pm_register(&g_ledscb); + if (ret != OK) + { + board_autoled_on(LED_ASSERTION); + } +} +#endif /* CONFIG_PM */ + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/fire-stm32v2/src/stm32_boot.c b/configs/fire-stm32v2/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..852fba853048e3fdf0851a2d13a466a2a814d047 --- /dev/null +++ b/configs/fire-stm32v2/src/stm32_boot.c @@ -0,0 +1,102 @@ +/************************************************************************************ + * configs/fire-stm32v2/src/stm32_boot.c + * + * Copyright (C) 2009, 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "fire-stm32v2.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB) + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/fire-stm32v2/src/stm32_buttons.c b/configs/fire-stm32v2/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..fe1d35f5165cd65ec4ed6ec96a43ad5c365fc485 --- /dev/null +++ b/configs/fire-stm32v2/src/stm32_buttons.c @@ -0,0 +1,157 @@ +/**************************************************************************** + * configs/fire-stm32v2/src/stm32_buttons.c + * + * Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "fire-stm32v2.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state of + * all buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for some pins but NOT used in this file + */ + + stm32_configgpio(GPIO_BTN_KEY1); + stm32_configgpio(GPIO_BTN_KEY2); +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + + /* Check that state of each key. A LOW value means that the key is pressed, */ + + if (!stm32_gpioread(GPIO_BTN_KEY1)) + { + ret |= BUTTON_KEY1_BIT; + } + + if (!stm32_gpioread(GPIO_BTN_KEY2)) + { + ret |= BUTTON_KEY2_BIT; + } + + return ret; +} + +/**************************************************************************** + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the + * BUTTON_*_BIT and JOYSTICK_*_BIT definitions in board.h for the meaning + * of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See + * the BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of + * enumeration values. The previous interrupt handler address is returned + * (so that it may restored, if so desired). + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + uint16_t gpio; + + if (id == BUTTON_KEY1) + { + gpio = GPIO_KEY1; + } + else if (id == BUTTON_KEY2) + { + gpio = GPIO_KEY2; + } + else + { + return NULL; + } + + return stm32_gpiosetevent(gpio, true, true, true, irqhandler); +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/fire-stm32v2/src/stm32_composite.c b/configs/fire-stm32v2/src/stm32_composite.c new file mode 100644 index 0000000000000000000000000000000000000000..4a171aebe441e1bd2d2a2ca8f57617a2db09a272 --- /dev/null +++ b/configs/fire-stm32v2/src/stm32_composite.c @@ -0,0 +1,87 @@ +/**************************************************************************** + * configs/fire-stm32v2/src/stm32_composite.c + * + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the STM32 SPI-based MMC/SD block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "fire-stm32v2.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* Device minor number */ + +#ifndef CONFIG_SYSTEM_COMPOSITE_DEVMINOR1 +# define CONFIG_SYSTEM_COMPOSITE_DEVMINOR1 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_composite_initialize + * + * Description: + * Perform architecture specific initialization of a composite USB device. + * + ****************************************************************************/ + +int board_composite_initialize(int port) +{ + /* If system/composite is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see stm32_appinit.c). + * In this case, there is nothing further to be done here. + * + * NOTE: CONFIG_NSH_BUILTIN_APPS is not a fool-proof indication that NSH + * was built. + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS + return sd_mount(CONFIG_SYSTEM_COMPOSITE_DEVMINOR1); +#else + return OK; +#endif /* CONFIG_NSH_BUILTIN_APPS */ +} diff --git a/configs/fire-stm32v2/src/stm32_enc28j60.c b/configs/fire-stm32v2/src/stm32_enc28j60.c new file mode 100644 index 0000000000000000000000000000000000000000..40d7954b69cc818f178918d399dc1df9659a78a4 --- /dev/null +++ b/configs/fire-stm32v2/src/stm32_enc28j60.c @@ -0,0 +1,213 @@ +/**************************************************************************** + * configs/fire-stm32v2/src/stm32_enc28j60.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* 2MBit SPI FLASH OR ENC28J60 + * + * --- ------ -------------- ----------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ----------------------------------------------------- + * + * 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH + * 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32_spi.h" + +#include "fire-stm32v2.h" + +#ifdef CONFIG_ENC28J60 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* ENC28J60 + * + * --- ------ -------------- ----------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ----------------------------------------------------- + * + * 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH + * 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen, 10Mbit EN28J60 Reset + * 4 PE5 (no name) 10Mbps ENC28J60 Interrupt + */ + +/* ENC28J60 is on SPI1 */ + +#ifndef CONFIG_STM32_SPI1 +# error "Need CONFIG_STM32_SPI1 in the configuration" +#endif + +/* SPI Assumptions **********************************************************/ + +#define ENC28J60_SPI_PORTNO 1 /* On SPI1 */ +#define ENC28J60_DEVNO 0 /* Only one ENC28J60 */ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32_lower_s +{ + const struct enc_lower_s lower; /* Low-level MCU interface */ + xcpt_t handler; /* ENC28J60 interrupt handler */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler); +static void up_enable(FAR const struct enc_lower_s *lower); +static void up_disable(FAR const struct enc_lower_s *lower); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* The ENC28J60 normal provides interrupts to the MCU via a GPIO pin. The + * following structure provides an MCU-independent mechanixm for controlling + * the ENC28J60 GPIO interrupt. + */ + +static struct stm32_lower_s g_enclower = +{ + .lower = + { + .attach = up_attach, + .enable = up_enable, + .disable = up_disable + }, + .handler = NULL, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: struct enc_lower_s methods + ****************************************************************************/ + +static int up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler) +{ + FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower; + + /* Just save the handler for use when the interrupt is enabled */ + + priv->handler = handler; + return OK; +} + +static void up_enable(FAR const struct enc_lower_s *lower) +{ + FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower; + + DEBUGASSERT(priv->handler); + (void)stm32_gpiosetevent(GPIO_ENC28J60_INTR, false, true, true, priv->handler); +} + +static void up_disable(FAR const struct enc_lower_s *lower) +{ + (void)stm32_gpiosetevent(GPIO_ENC28J60_INTR, false, true, true, NULL); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_netinitialize + ****************************************************************************/ + +void up_netinitialize(void) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Assumptions: + * 1) ENC28J60 pins were configured in up_spi.c early in the boot-up phase. + * 2) Clocking for the SPI1 peripheral was also provided earlier in boot-up. + */ + + spi = stm32_spibus_initialize(ENC28J60_SPI_PORTNO); + if (!spi) + { + nlldbg("Failed to initialize SPI port %d\n", ENC28J60_SPI_PORTNO); + return; + } + + /* Take ENC28J60 out of reset (active low)*/ + + stm32_gpiowrite(GPIO_ENC28J60_RESET, true); + + /* Bind the SPI port to the ENC28J60 driver */ + + ret = enc_initialize(spi, &g_enclower.lower, ENC28J60_DEVNO); + if (ret < 0) + { + nlldbg("Failed to bind SPI port %d ENC28J60 device %d: %d\n", + ENC28J60_SPI_PORTNO, ENC28J60_DEVNO, ret); + return; + } + + nllvdbg("Bound SPI port %d to ENC28J60 device %d\n", + ENC28J60_SPI_PORTNO, ENC28J60_DEVNO); +} + +#endif /* CONFIG_ENC28J60 */ diff --git a/configs/fire-stm32v2/src/stm32_mmcsd.c b/configs/fire-stm32v2/src/stm32_mmcsd.c new file mode 100644 index 0000000000000000000000000000000000000000..356be40d55a0e64a8db2c80d15eebc13616135ce --- /dev/null +++ b/configs/fire-stm32v2/src/stm32_mmcsd.c @@ -0,0 +1,122 @@ +/**************************************************************************** + * config/fire-stm32v2/src/stm32_mmcsd.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "stm32_sdio.h" +#include "fire-stm32v2.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#define HAVE_MMCSD 1 /* Assume that we have SD support */ +#define STM32_MMCSDSLOTNO 0 /* There is only one slot */ + +/* Can't support MMC/SD features if the SDIO peripheral is disabled */ + +#ifndef CONFIG_STM32_SDIO +# undef HAVE_MMCSD +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# undef HAVE_MMCSD +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires CONFIG_DISABLE_MOUNTPOINT=n + * and CONFIG_STM32_SDIO=y + * + ****************************************************************************/ + +int stm32_sdinitialize(int minor) +{ +#ifdef HAVE_MMCSD + FAR struct sdio_dev_s *sdio; + int ret; + + /* First, get an instance of the SDIO interface */ + + sdio = sdio_initialize(STM32_MMCSDSLOTNO); + if (!sdio) + { + fdbg("Failed to initialize SDIO slot %d\n", STM32_MMCSDSLOTNO); + return -ENODEV; + } + + fvdbg("Initialized SDIO slot %d\n", STM32_MMCSDSLOTNO); + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(minor, sdio); + if (ret != OK) + { + fdbg("Failed to bind SDIO slot %d to the MMC/SD driver, minor=%d\n", + STM32_MMCSDSLOTNO, minor); + } + + fvdbg("Bound SDIO slot %d to the MMC/SD driver, minor=%d\n", + STM32_MMCSDSLOTNO, minor); + + /* Then let's guess and say that there is a card in the slot. I need to check to + * see if the M3 Wildfire board supports a GPIO to detect if there is a card in + * the slot. + */ + + sdio_mediachange(sdio, true); +#endif + return OK; +} diff --git a/configs/fire-stm32v2/src/stm32_selectlcd.c b/configs/fire-stm32v2/src/stm32_selectlcd.c new file mode 100644 index 0000000000000000000000000000000000000000..cf8336101a601cb778d7d14304d91c3dcbf53e95 --- /dev/null +++ b/configs/fire-stm32v2/src/stm32_selectlcd.c @@ -0,0 +1,210 @@ +/************************************************************************************ + * configs/fire-stm32v2/src/stm32_selectlcd.c + * + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32_fsmc.h" +#include "stm32_gpio.h" +#include "stm32.h" +#include "fire-stm32v2.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_STM32_FSMC +# warning "FSMC is not enabled" +#endif + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/* 2.4" TFT + Touchscreen. FSMC Bank1 + * + * --- ------ -------------- ------------------------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------------------------- + * + * 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 92 PB6 PB6-I2C1-SCL 2.4" TFT + Touchscreen, AT24C02 + * 93 PB7 PB7-I2C1-SDA 2.4" TFT + Touchscreen, AT24C02 + * 81 PD0 PD0-FSMC_D2 2.4" TFT + Touchscreen + * 82 PD1 PD1-FSMC_D3 2.4" TFT + Touchscreen + * 85 PD4 PD4-FSMC_NOE 2.4" TFT + Touchscreen + * 86 PD5 PD5-FSMC_NWE 2.4" TFT + Touchscreen + * 88 PD7 PD7-FSMC_NE1 2.4" TFT + Touchscreen + * 55 PD8 PD8-FSMC_D13 2.4" TFT + Touchscreen + * 56 PD9 PD9-FSMC_D14 2.4" TFT + Touchscreen + * 57 PD10 PD10-FSMC_D15 2.4" TFT + Touchscreen + * 58 PD11 PD11-FSMC_A16 2.4" TFT + Touchscreen + * 60 PD13 PD13-LCD/LIGHT 2.4" TFT + Touchscreen + * 61 PD14 PD14-FSMC_D0 2.4" TFT + Touchscreen + * 62 PD15 PD15-FSMC_D1 2.4" TFT + Touchscreen + * 98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen + * 38 PE7 PE7-FSMC_D4 2.4" TFT + Touchscreen + * 39 PE8 PE8-FSMC_D5 2.4" TFT + Touchscreen + * 40 PE9 PE9-FSMC_D6 2.4" TFT + Touchscreen + * 41 PE10 PE10-FSMC_D7 2.4" TFT + Touchscreen + * 42 PE11 PE11-FSMC_D8 2.4" TFT + Touchscreen + * 43 PE12 PE12-FSMC_D9 2.4" TFT + Touchscreen + * 44 PE13 PE13-FSMC_D10 2.4" TFT + Touchscreen + * 45 PE14 PE14-FSMC_D11 2.4" TFT + Touchscreen + * 46 PE15 PE15-FSMC_D12 2.4" TFT + Touchscreen + * + * NOTE: SPI and I2C pin configuration is controlled in the SPI and I2C drivers, respectively. + */ + +static const uint16_t g_lcdconfig[NCOMMON_CONFIG] = +{ + /* Address Lines: A16 only */ + + GPIO_NPS_A16, + + /* Data Lines: D0... D15 */ + + GPIO_NPS_D0, GPIO_NPS_D1, GPIO_NPS_D2, GPIO_NPS_D3, + GPIO_NPS_D4, GPIO_NPS_D5, GPIO_NPS_D6, GPIO_NPS_D7, + GPIO_NPS_D8, GPIO_NPS_D9, GPIO_NPS_D10, GPIO_NPS_D11, + GPIO_NPS_D12, GPIO_NPS_D13, GPIO_NPS_D14, GPIO_NPS_D15, + + /* NOE, NWE, NE1, NBL1 */ + + GPIO_NPS_NOE, GPIO_NPS_NWE, GPIO_NPS_NE1, GPIO_NPS_NBL1, + + /* Backlight GPIO */ + + GPIO_LCD_BACKLIGHT +}; +#define NLCD_CONFIG (sizeof(g_lcdconfig) / sizeof(uint16_t)) + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_enablefsmc + * + * Description: + * Enable clocking to the FSMC module + * + ************************************************************************************/ + +static inline void stm32_enablefsmc(void) +{ + uint32_t regval; + + /* Enable AHB clocking to the FSMC */ + + regval = getreg32( STM32_RCC_AHBENR); + regval |= RCC_AHBENR_FSMCEN; + putreg32(regval, STM32_RCC_AHBENR); +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_selectlcd + * + * Description: + * Initialize to the LCD pin configuration. + * + ************************************************************************************/ + +void stm32_selectlcd(void) +{ + irqstate_t flags; + int i; + + /* Configure LCD GPIO pis */ + + flags = enter_critical_section(); + for (i = 0; i < NLCD_GPIOS; i++) + { + stm32_configgpio(g_lcdconfig[i]); + } + + /* Enable AHB clocking to the FSMC */ + + stm32_enablefsmc(); + + /* Bank1 NOR/SRAM control register configuration */ + + putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32(FSMC_BTR_ADDSET(1)|FSMC_BTR_ADDHLD(0)|FSMC_BTR_DATAST(2)|FSMC_BTR_BUSTURN(0)| + FSMC_BTR_CLKDIV(0)|FSMC_BTR_DATLAT(0)|FSMC_BTR_ACCMODA, STM32_FSMC_BTR1); + + putreg32(0xffffffff, STM32_FSMC_BWTR4); + + /* Enable the bank by setting the MBKEN bit */ + + putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1); + leave_critical_section(flags); +} + +#endif /* CONFIG_STM32_FSMC */ + + diff --git a/configs/fire-stm32v2/src/stm32_spi.c b/configs/fire-stm32v2/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..e5f049795728029ebfeb716bfbd135437f945349 --- /dev/null +++ b/configs/fire-stm32v2/src/stm32_spi.c @@ -0,0 +1,215 @@ +/************************************************************************************ + * configs/fire-stm32v2/src/stm32_spi.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "fire-stm32v2.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the M3 Wildfire board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ + /* NOTE: Clocking for SPI1 and/or SPI2 was already provided in stm32_rcc.c. + * Configurations of SPI pins is performed in stm32_spi.c. + * Here, we only initialize chip select pins unique to the board + * architecture. + */ + +#ifdef CONFIG_STM32_SPI1 + /* Configure the TFT/Touchscreen CS GPIO */ + +#if 0 /* Need to study this */ + stm32_configgpio(GPIO_LCD_CS); +#endif + + /* Configure the TFT/Touchscreen and ENC28J60 or SPI-based FLASH PIOs */ + + /* Configure ENC28J60 SPI1 CS (also RESET and interrupt pins) */ + +#ifdef CONFIG_ENC28J60 + stm32_configgpio(GPIO_ENC28J60_CS); + stm32_configgpio(GPIO_ENC28J60_RESET); + stm32_configgpio(GPIO_ENC28J60_INTR); +#else + + /* Configure FLASH SPI1 CS */ + + stm32_configgpio(GPIO_FLASH_CS); +#endif + +#endif /* CONFIG_STM32_SPI1 */ + +#ifdef CONFIG_STM32_SPI2 + /* Configure the MP3 SPI2 CS GPIO */ + + stm32_configgpio(GPIO_MP3_CS); + +#endif /* CONFIG_STM32_SPI2 */ +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +#if 0 /* Need to study this */ + if (devid == SPIDEV_LCD) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_LCD_CS, !selected); + } + else +#endif +#ifdef CONFIG_ENC28J60 + if (devid == SPIDEV_ETHERNET) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_ENC28J60_CS, !selected); + } +#else + if (devid == SPIDEV_FLASH) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_FLASH_CS, !selected); + } +#endif +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + if (devid == SPIDEV_AUDIO) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_MP3_CS, !selected); + } +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/fire-stm32v2/src/stm32_usbdev.c b/configs/fire-stm32v2/src/stm32_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..5beea44b78ba620f2501536aa7606e2dec1320c0 --- /dev/null +++ b/configs/fire-stm32v2/src/stm32_usbdev.c @@ -0,0 +1,119 @@ +/************************************************************************************ + * configs/fire-stm32v2/src/stm32_usbdev.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "fire-stm32v2.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the M3 Wildfire board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + /* USB Soft Connect Pullup */ + +#if 0 /* REVISIT */ + stm32_configgpio(GPIO_USB_PULLUP); +#endif +} + +/************************************************************************************ + * Name: stm32_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB software + * connect and disconnect), then the board software must provide stm32_pullup. + * See include/nuttx/usb/usbdev.h for additional description of this method. + * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be + * NULL. + * + ************************************************************************************/ + +int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); +#if 0 /* REVISIT */ + stm32_gpiowrite(GPIO_USB_PULLUP, !enable); +#endif + return OK; +} + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} + diff --git a/configs/fire-stm32v2/src/stm32_usbmsc.c b/configs/fire-stm32v2/src/stm32_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..8944de6917b7c5ca067b842487685c949f2b5cba --- /dev/null +++ b/configs/fire-stm32v2/src/stm32_usbmsc.c @@ -0,0 +1,85 @@ +/**************************************************************************** + * configs/fire-stm32v2/src/stm32_usbmsc.c + * + * Copyright (C) 2012, 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the STM32 SPI-based MMC/SD block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "stm32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization of the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* If system/usbmsc is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see stm32_appinit.c). + * In this case, there is nothing further to be done here. + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS + return stm32_sdinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1); +#else + return OK; +#endif +} diff --git a/configs/fire-stm32v2/src/stm32_userleds.c b/configs/fire-stm32v2/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..5d5adeb2ecb4630d7b24c22dc02dd5db015efb5e --- /dev/null +++ b/configs/fire-stm32v2/src/stm32_userleds.c @@ -0,0 +1,136 @@ +/**************************************************************************** + * configs/fire-stm32v2/src/stm32_userleds.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "fire-stm32v2.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* This array maps an LED number to GPIO pin configuration */ + +static uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED1, GPIO_LED2, GPIO_LED3 +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); +} + +/**************************************************************************** + * Name: board_userled + * + * Description: + * Set one LED to the 'ledon' state. The LEDs are pulled up and, hence, + * active low. + * + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + stm32_gpiowrite(g_ledcfg[led], !ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + * + * Description: + * Set each LED to the bit encoded state. The LEDs are pulled up and, + * hence, active low. + * + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0); + stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0); + stm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) == 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/fire-stm32v2/src/stm32_w25.c b/configs/fire-stm32v2/src/stm32_w25.c new file mode 100644 index 0000000000000000000000000000000000000000..3fad2929b24b183ae2448412f97b93a284f2805e --- /dev/null +++ b/configs/fire-stm32v2/src/stm32_w25.c @@ -0,0 +1,153 @@ +/**************************************************************************** + * config/fire-stm32v2/src/stm32_w25.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#ifdef CONFIG_STM32_SPI1 +# include +# include +# include +#endif + +#include "stm32_spi.h" +#include "fire-stm32v2.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ +/* Can't support the W25 device if it SPI1 or W25 support is not enabled */ + +#define HAVE_W25 1 +#if !defined(CONFIG_STM32_SPI1) || !defined(CONFIG_MTD_W25) +# undef HAVE_W25 +#endif + +/* Can't support W25 features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef HAVE_W25 +#endif + +/* Can't support both FAT and NXFFS */ + +#if defined(CONFIG_FS_FAT) && defined(CONFIG_FS_NXFFS) +# warning "Can't support both FAT and NXFFS -- using FAT" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_w25initialize + * + * Description: + * Initialize and register the W25 FLASH file system. + * + ****************************************************************************/ + +int stm32_w25initialize(int minor) +{ +#ifdef HAVE_W25 + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; +#ifdef CONFIG_FS_NXFFS + char devname[12]; +#endif + int ret; + + /* Get the SPI port */ + + spi = stm32_spibus_initialize(1); + if (!spi) + { + fdbg("ERROR: Failed to initialize SPI port 2\n"); + return -ENODEV; + } + + /* Now bind the SPI interface to the W25 SPI FLASH driver */ + + mtd = w25_initialize(spi); + if (!mtd) + { + fdbg("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n"); + return -ENODEV; + } + +#ifndef CONFIG_FS_NXFFS + /* And finally, use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(minor, mtd); + if (ret < 0) + { + fdbg("ERROR: Initialize the FTL layer\n"); + return ret; + } +#else + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", -ret); + return ret; + } + + /* Mount the file system at /mnt/w25 */ + + snprintf(devname, 12, "/mnt/w25%c", 'a' + minor); + ret = mount(NULL, devname, "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif +#endif + return OK; +} diff --git a/configs/fire-stm32v2/src/stm32_watchdog.c b/configs/fire-stm32v2/src/stm32_watchdog.c new file mode 100644 index 0000000000000000000000000000000000000000..dd420c342cdfa6ed0c80bb388c0abe5b61dd892a --- /dev/null +++ b/configs/fire-stm32v2/src/stm32_watchdog.c @@ -0,0 +1,135 @@ +/************************************************************************************ + * configs/fire-stm32v2/src/stm32_watchdog.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Wathdog hardware should be enabled */ + +#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG) +# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_STM32_WDG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0" +# endif +#endif + +/* Use the un-calibrated LSI frequency if we have nothing better */ + +#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ) +# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecuture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ + /* Initialize tha register the watchdog timer device */ + +#if defined(CONFIG_STM32_WWDG) + stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH); + return OK; +#elif defined(CONFIG_STM32_IWDG) + stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ); + return OK; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/freedom-kl25z/Kconfig b/configs/freedom-kl25z/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..915e26edc4543e44a08590d527ba3ed0e56df06a --- /dev/null +++ b/configs/freedom-kl25z/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_FREEDOM_KL25Z +endif diff --git a/configs/freedom-kl25z/README.txt b/configs/freedom-kl25z/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..23390503de5619959df6e77195d80267334cacc2 --- /dev/null +++ b/configs/freedom-kl25z/README.txt @@ -0,0 +1,401 @@ +README.txt +========== + + This is the README file for the port of NuttX to the Freescale Freedom KL25Z + board. This board has the MKL25Z128 chip with a built-in SDA debugger. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - NuttX Buildroot Toolchain + - LEDs + - Serial Console + - mbed + - Freedom KL25Z-specific Configuration Options + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin under Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + As of this writing, all testing has been performed using the NuttX buildroot + toolchain described below. I have also verified the build using the + CodeSourcery GCC toolchain for windows. Most any contemporary EABI GCC + toolchain should work will a little tinkering. + +NuttX Buildroot Toolchain +========================= + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M0 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M0 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh freedom-kl25z/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm0-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M0 toolchain for Cygwin under Windows. + +LEDs +==== + + The Freedom KL25Z has a single RGB LED driven by the KL25Z as follows: + + ------------- -------- + RGB LED KL25Z128 + ------------- -------- + Red Cathode PTB18 + Green Cathode PTB19 + Blue Cathode PTD1 + + NOTE: PTD1 is also connected to the I/O header on J2 pin 10 (also known as D13). + + If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board the + Freedom KL25Z. The following definitions describe how NuttX controls the LEDs: + + SYMBOL Meaning LED state + Initially all LED is OFF + ------------------- ----------------------- -------------------------- + LED_STARTED NuttX has been started R=OFF G=OFF B=OFF + LED_HEAPALLOCATE Heap has been allocated (no change) + LED_IRQSENABLED Interrupts enabled (no change) + LED_STACKCREATED Idle stack created R=OFF G=OFF B=ON + LED_INIRQ In an interrupt (no change) + LED_SIGNAL In a signal handler (no change) + LED_ASSERTION An assertion failed (no change) + LED_PANIC The system has crashed R=FLASHING G=OFF B=OFF + LED_IDLE K25Z1XX is in sleep mode (Optional, not used) + +Serial Console +============== + + As with most NuttX configurations, the Freedom KL25Z configurations + depend on having a serial console to interact with the software. The + Freedom KL25Z, however, has no on-board RS-232 drivers so will be + necessary to connect the Freedom KL25Z UART pins to an external + RS-232 driver board or TTL-to-Serial USB adaptor. + + By default UART0 is used as the serial console on this boards. The UART0 + is configured to work with the OpenSDA USB CDC/ACM port: + + ------ ------------------------------- ----------------------------- + PIN PIN FUNCTIONS BOARD SIGNALS + ------ ------------------------------- ----------------------------- + Pin 27 PTA1/TSI0_CH2/UART0_RX/FTM2_CH0 UART1_RX_TGTMCU and D0 (PTA1) + Pin 28 PTA2/TSI0_CH3/UART0_TX/FTM2_CH1 UART1_TX_TGTMCU and D1 (PTA2) + + But the UART0 Tx/Rx signals are also available on J1: + + ---------------- --------- + UART0 SIGNAL J1 pin + ---------------- --------- + UART0_RX (PTA1) J1, pin 2 + UART0_TX (PTA2) J1, pin 4 + + Ground is available on J2 pin 14. 3.3V is available on J3 and J4. + +mbed +==== + + The Freedom KL25Z includes a built-in SDA debugger. An alternative + to the SDA bootloader is this boot loader from mbed: + + http://mbed.org/handbook/mbed-FRDM-KL25Z-Getting-Started + http://mbed.org/handbook/Firmware-FRDM-KL25Z + + Using the mbed loader: + + 1. Connect the KL25Z to the host PC using the USB connector labeled + SDA. + 2. A new file system will appear called MBED; open it with Windows + Explorer (assuming that you are using Windows). + 3. Drag and drop nuttx.bin into the MBED window. This will load the + nuttx.bin binary into the KL25Z. The MBED window will close + then re-open and the KL25Z will be running the new code. + + Using the Freescale SDA debugger is essentially the same. That + debugger will also accept .hex file. + +Freedom KL25Z-specific Configuration Options +============================================ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM0=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=kl + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_MKL25Z128=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=freedom-kl25z (for the Freescale FRDM-KL25Z development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_FREEDOM_K25Z128=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=16384 (16Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled as follows. These settings are for + all of the K25Z100/120 line and may not be available for the MKL25Z128 + in particular: + + AHB + --- + + CONFIG_KL_PDMA Peripheral DMA + CONFIG_KL_FMC Flash memory + CONFIG_KL_EBI External bus interface + + APB1 + ---- + + CONFIG_KL_WDT Watchdog timer + CONFIG_KL_RTC Real time clock (RTC) + CONFIG_KL_TMR0 Timer0 + CONFIG_KL_TMR1 Timer1 + CONFIG_KL_I2C0 I2C interface + CONFIG_KL_SPI0 SPI0 master/slave + CONFIG_KL_SPI1 SPI1 master/slave + CONFIG_KL_PWM0 PWM0 + CONFIG_KL_PWM1 PWM1 + CONFIG_KL_PWM2 PWM2 + CONFIG_KL_PWM3 PWM3 + CONFIG_KL_UART0 UART0 + CONFIG_KL_USBD USB 2.0 FS device controller + CONFIG_KL_ACMP Analog comparator + CONFIG_KL_ADC Analog-digital-converter (ADC) + + APB2 + --- + + CONFIG_KL_PS2 PS/2 interface + CONFIG_KL_TIMR2 Timer2 + CONFIG_KL_TIMR3 Timer3 + CONFIG_KL_I2C1 I2C1 interface + CONFIG_KL_SPI2 SPI2 master/slave + CONFIG_KL_SPI3 SPI3 master/slave + CONFIG_KL_PWM4 PWM4 + CONFIG_KL_PWM5 PWM5 + CONFIG_KL_PWM6 PWM6 + CONFIG_KL_PWM7 PWM7 + CONFIG_KL_UART1 UART1 + CONFIG_KL_UART2 UART2 + CONFIG_KL_I2S I2S interface + + K25Z1XX specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - Selects the UARTn (n=0,1,2) for the + console and ttys0. + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer for UARTn. + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + for UARTn. + CONFIG_UARTn_BAUD - The configure BAUD of UARTn, + CONFIG_UARTn_BITS - The number of bits. Must be 5, 6, 7, or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + +Configurations +============== + +Each FREEDOM-KL25Z configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh freedom-kl25z/ + cd - + . ./setenv.sh + +If this is a Windows native build, then configure.bat should be used +instead of configure.sh: + + configure.bat freedom-kl25z\ + +Where is one of the following: + + minnsh: + ------ + + This is a experiment to see just how small we can get a usable NSH + configuration. This configuration has far fewer features than the nsh + configuration but is also a fraction of the size. + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables the serial interface on UART0. Support for + builtin applications is disabled. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + 3. Serial Console. A serial console is necessary to interrupt with + NSH. The serial console is configured on UART0 which is available + on J1: + + ---------------- --------- + UART0 SIGNAL J1 pin + ---------------- --------- + UART0_RX (PTA1) J1, pin 2 + UART0_TX (PTA2) J1, pin 4 + + Ground is available on J2 pin 14. 3.3V is available on J3 and J4. + + It is possible to configure NSH to use a USB serial console instead + of an RS-232 serial console. However, that configuration has not + been impelmented as of this writing. + + 4. Memory Usage. The size command gives us the static memory usage. + This is what I get: + + $ size nuttx + text data bss dec hex filename + 35037 106 1092 36235 8d8b nuttx + + And we can get the runtime memory usage from the NSH free command: + + NuttShell (NSH) NuttX-6.25 + nsh> free + total used free largest + Mem: 14160 3944 10216 10216 + nsh> + + Summary: + + - This slightly tuned NSH example uses 34.2KB of FLASH leaving 93.8KB + of FLASH (72%) free from additional application development. + + I did not do all of the arithmetic, but it appears to me that of this + 34+KB of FLASH usage, probably 20-30% of the FLASH is used by libgcc! + libgcc has gotten very fat! + + - Static SRAM usage is about 1.2KB (<4%). + + - At run time, 10.0KB of SRAM (62%) is still available for additional + applications. Most of the memory used at runtime is allocated I/O + buffers and the stack for the NSH main thread (1.5KB). + + There is probably enough free memroy to support 3 or 4 application + threads in addition to NSH. + + 5. This configurations has support for NSH built-in applications. However, + in the default configuration no built-in applications are enabled. + + 6. This configuration has been used to verify the TI CC3000 wireless + networking module. In order to enable this module, you would need to + make the following changes to the default configuration files: + + System Type -> Kinetis peripheral support + CONFIG_KL_SPI0=y : Enable SPI + CONFIG_KL_SPI1=y + + Drivers -> SPI + CONFIG_SPI=y : Enable SPI + CONFIG_SPI_EXCHANGE=y + + Drivers -> Wireless + CONFIG_DRIVERS_WIRELESS=y : Enable wireless support + CONFIG_WL_CC3000=y : Build the CC3000 driver + + Applications -> Examples + CONFIG_EXAMPLES_CC3000BASIC=y : CC3000 test example + + Applications -> NSH Library + CONFIG_NSH_ARCHINIT=y : Build in CC3000 initialization logic diff --git a/configs/freedom-kl25z/include/board.h b/configs/freedom-kl25z/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..129a9b285a768e966048061ee8d88dbc7ffdac3e --- /dev/null +++ b/configs/freedom-kl25z/include/board.h @@ -0,0 +1,285 @@ +/************************************************************************************ + * configs/kwikstik-k40/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The Kwikstik-K40 has a 4MHz crystal on board */ + +#undef BOARD_EXTCLOCK /* Crystal */ +#define BOARD_XTAL_FREQ 8000000 /* 8MHz crystal frequency (REFCLK) */ +#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator */ + +/* PLL Configuration. + * + * PLL Input frequency: PLLIN = REFCLK / PRDIV0 = 8MHz / 2 = 4MHz + * PLL Output frequency: PLLOUT = PLLIN * VDIV0 = 4Mhz * 24 = 96MHz + * MCGPLLCLK Frequency: MCGPLLCLK = 96MHz + */ + +#define BOARD_PRDIV0 2 /* PLL External Reference Divider */ +#define BOARD_VDIV0 24 /* PLL VCO Divider (frequency multiplier) */ + +#define BOARD_PLLIN_FREQ (BOARD_XTAL_FREQ / BOARD_PRDIV0) +#define BOARD_PLLOUT_FREQ (BOARD_PLLIN_FREQ * BOARD_VDIV0) +#define BOARD_MCGPLLCLK_FREQ BOARD_PLLOUT_FREQ + +/* MCGOUTCLK: MCG output of either IRC, MCGFLLCLK, MCGPLLCLK, or MCG's external + * reference clock that sources the core, system, bus, and flash clock. + * + * MCGOUTCLK = MCGPLLCLK = 96MHz + */ + +#define BOARD_MCGOUTCLK_FREQ BOARD_MCGPLLCLK_FREQ + +/* SIM CLKDIV1 dividers. + * + * Core/system clock + * MCGOUTCLK divided by OUTDIV1, clocks the ARM Cortex-M0+ core + * + * Bus clock + * System clock divided by OUTDIV4, clocks the bus slaves and peripherals. + */ + +#define BOARD_OUTDIV1 2 /* Core/system = MCGOUTCLK / 2, 48MHz */ +#define BOARD_OUTDIV4 2 /* Bus clock = System clock / 2, 24MHz */ + +#define BOARD_CORECLK_FREQ (BOARD_MCGOUTCLK_FREQ / BOARD_OUTDIV1) +#define BOARD_BUSCLK_FREQ (BOARD_CORECLK_FREQ / BOARD_OUTDIV4) + +/* SDHC clocking ********************************************************************/ + +/* SDCLK configurations corresponding to various modes of operation. Formula is: + * + * SDCLK frequency = (base clock) / (prescaler * divisor) + * + * The SDHC module is always configure configured so that the core clock is the base + * clock. + */ + +/* Identification mode: 400KHz = 96MHz / ( 16 * 15) */ + +#define BOARD_SDHC_IDMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16 +#define BOARD_SDHC_IDMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15) + +/* MMC normal mode: 16MHz = 96MHz / (2 * 3) */ + +#define BOARD_SDHC_MMCMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +#define BOARD_SDHC_MMCMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) + +/* SD normal mode (1-bit): 16MHz = 96MHz / (2 * 3) */ + +#define BOARD_SDHC_SD1MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +#define BOARD_SDHC_SD1MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) + +/* SD normal mode (4-bit): 24MHz = 96MHz / (2 * 2) (with DMA) + * SD normal mode (4-bit): 16MHz = 96MHz / (2 * 3) (no DMA) + */ + +#ifdef CONFIG_SDIO_DMA +# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(2) +#else +//# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +//# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) +# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16 +# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15) +#endif + +/* PWM Configuration */ +/* TPM0 Channels */ + +#define GPIO_TPM0_CH0OUT PIN_TPM0_CH0_3 //PIN_TPM0_CH0_1 +#define GPIO_TPM0_CH1OUT PIN_TPM0_CH1_1 +#define GPIO_TPM0_CH2OUT PIN_TPM0_CH2_1 +#define GPIO_TPM0_CH3OUT PIN_TPM0_CH3_1 +#define GPIO_TPM0_CH4OUT PIN_TPM0_CH4_1 +#define GPIO_TPM0_CH5OUT PIN_TPM0_CH5_1 + +/* TPM1 Channels */ + +#define GPIO_TPM1_CH0OUT PIN_TPM1_CH0_1 +#define GPIO_TPM1_CH1OUT PIN_TPM1_CH1_1 + +/* TPM2 Channels */ + +#define GPIO_TPM2_CH0OUT PIN_TPM2_CH0_1 +#define GPIO_TPM2_CH1OUT PIN_TPM2_CH1_1 + +/* LED definitions ******************************************************************/ +/* The Freedom KL25Z has a single RGB LED driven by the KL25Z as follows: + * + * ------------- -------- + * RGB LED KL25Z128 + * ------------- -------- + * Red Cathode PTB18 + * Green Cathode PTB19 + * Blue Cathode PTD1 + * + * NOTE: PTD1 is also connected to the I/O header on J2 pin 10 (also known as D13). + * + * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board the + * Freedom KL25Z. The following definitions describe how NuttX controls the LEDs: + * + * SYMBOL Meaning LED state + * Initially all LED is OFF + * ------------------- ----------------------- -------------------------- + * LED_STARTED NuttX has been started R=OFF G=OFF B=OFF + * LED_HEAPALLOCATE Heap has been allocated (no change) + * LED_IRQSENABLED Interrupts enabled (no change) + * LED_STACKCREATED Idle stack created R=OFF G=OFF B=ON + * LED_INIRQ In an interrupt (no change) + * LED_SIGNAL In a signal handler (no change) + * LED_ASSERTION An assertion failed (no change) + * LED_PANIC The system has crashed R=FLASHING G=OFF B=OFF + * LED_IDLE K25Z1XX is in sleep mode (Optional, not used) + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/* Button definitions ***************************************************************/ +/* The Freedom KL25Z board has no standard GPIO contact buttons */ + +/* Alternative pin resolution *******************************************************/ +/* If there are alternative configurations for various pins in the k25z128_pinmux.h + * header file, those alternative pins will be labeled with a suffix like _1, _2, + * etc. The logic in this file must select the correct pin configuration for the + * board by defining a pin configuration (with no suffix) that maps to the correct + * alternative. + */ + +/* SPI0 Pinout + * =========== + * + * SCK = PTD1 (D13 at connector J2 pin 12 of Freedom Board) + * MISO = PTD3 (D12 at connector J2 pin 10 of Freedom Board) + * MOSI = PTD2 (D11 at connector J2 pin 8 of Freedom Board) + */ + +#define PIN_SPI0_SCK (PIN_SPI0_SCK_3 | PIN_ALT2_PULLUP) +#define PIN_SPI0_MISO (PIN_SPI0_MISO_6 | PIN_ALT2_PULLUP) +#define PIN_SPI0_MOSI (PIN_SPI0_MOSI_5 | PIN_ALT2_PULLUP) + +#define PIN_SPI1_SCK (PIN_SPI1_SCK_2 | PIN_ALT2_PULLUP) +#define PIN_SPI1_MISO (PIN_SPI1_MISO_3 | PIN_ALT2_PULLUP) +#define PIN_SPI1_MOSI (PIN_SPI0_MOSI_7 | PIN_ALT2_PULLUP) + +/* These pins are used by CC3000 module */ + +#define GPIO_WIFI_EN (GPIO_OUTPUT | GPIO_OUTPUT_ZER0 | PIN_PORTC | PIN12) +#define GPIO_WIFI_IRQ (GPIO_INPUT | PIN_PORTA | PIN16) +#define GPIO_WIFI_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | PIN_PORTE | PIN1) + +/* Interrupt pin used by ADXL345 + * + * CS = PTD0 (D10 at connector J2 pin 6 of Freedom Board) + * INT1 = PTA16 (at connector J2 pin 9 of Freedom Board) + */ + +#define GPIO_ADXL345_INT1 (GPIO_INPUT | PIN_PORTA | PIN_INT_RISING | PIN16) +#define GPIO_ADXL345_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | PIN_PORTD | PIN0) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: kl_boardinitialize + * + * Description: + * All Kinetis L architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void kl_boardinitialize(void); + +/************************************************************************************ + * Name: kl_tsi_initialize + * + * Description: + * Initialize the TSI hardware and interface for the sliders on board the Freedom + * KL25Z board. Register a character driver at /dev/tsi that may be used to read + * from each sensor. + * + ************************************************************************************/ + +#ifdef CONFIG_KL_TSI +void kl_tsi_initialize(void); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/freedom-kl25z/include/kl_wifi.h b/configs/freedom-kl25z/include/kl_wifi.h new file mode 100644 index 0000000000000000000000000000000000000000..ab9ac43564aac2595c27d5d53e31f5ecb3201e88 --- /dev/null +++ b/configs/freedom-kl25z/include/kl_wifi.h @@ -0,0 +1,80 @@ +/**************************************************************************** + * configs/freedom-kl25z/include/kl_wifi.h + * + * Copyright (C) 2013 Alan Carvalho de Assis + * Author: Alan Carvalho de Assis + * with adaptions from Gregory Nutt + * + * Reference: https://community.freescale.com/community/ + * the-embedded-beat/blog/2012/10/15/ + * using-the-touch-interface-on-the-freescale-freedom-development-platform + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ +#include +#include + + +long ReadWlanInterruptPin(void); + +/* + * Enable WiFi Interrupt + */ + +void WlanInterruptEnable(void); + +/* + * Disable WiFi Interrupt + */ +void WlanInterruptDisable(void); + +/* + * Enable/Disable WiFi + */ +void WriteWlanEnablePin(uint8_t val); + +/* + * Assert CC3000 CS + */ +void AssertWlanCS(void); + +/* + * Deassert CC3000 CS + */ +void DeassertWlanCS(void); + +/* + * Setup needed pins + */ +void Wlan_Setup(void); + diff --git a/configs/freedom-kl25z/minnsh/Make.defs b/configs/freedom-kl25z/minnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c3ff3df814461ca5db24cde5b540a8179b18ab4a --- /dev/null +++ b/configs/freedom-kl25z/minnsh/Make.defs @@ -0,0 +1,124 @@ +############################################################################ +# configs/freedom-kl25z/minnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv6-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/freedom-kl25z/minnsh/defconfig b/configs/freedom-kl25z/minnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..0bcfe2f3407199dda93d069a7e14914ebd5473d2 --- /dev/null +++ b/configs/freedom-kl25z/minnsh/defconfig @@ -0,0 +1,820 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +CONFIG_MOTOROLA_SREC=y +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +CONFIG_ARCH_CHIP_KL=y +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +CONFIG_ARCH_CORTEXM0=y +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv6-m" +CONFIG_ARCH_CHIP="kl" +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARCH_HAVE_FPU is not set + +# +# ARMV6M Configuration Options +# +# CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_GPIO_IRQ is not set + +# +# Kinetis Configuration Options +# +CONFIG_ARCH_CHIP_MKL25Z128=y +CONFIG_ARCH_FAMILY_KL2X=y + +# +# Kinetis Peripheral Support +# +# CONFIG_KL_TRACE is not set +# CONFIG_KL_FLEXBUS is not set +CONFIG_KL_UART0=y +# CONFIG_KL_UART1 is not set +# CONFIG_KL_UART2 is not set +# CONFIG_KL_FLEXCAN0 is not set +# CONFIG_KL_FLEXCAN1 is not set +CONFIG_KL_SPI0=y +CONFIG_KL_SPI1=y +# CONFIG_KL_SPI2 is not set +# CONFIG_KL_I2C0 is not set +# CONFIG_KL_I2C1 is not set +# CONFIG_KL_I2S is not set +# CONFIG_KL_DAC0 is not set +# CONFIG_KL_DAC1 is not set +# CONFIG_KL_ADC0 is not set +# CONFIG_KL_ADC1 is not set +# CONFIG_KL_CMP is not set +# CONFIG_KL_VREF is not set +# CONFIG_KL_TPM0 is not set +# CONFIG_KL_TPM1 is not set +# CONFIG_KL_TPM2 is not set +# CONFIG_KL_LPTIMER is not set +# CONFIG_KL_RTC is not set +# CONFIG_KL_EWM is not set +# CONFIG_KL_CMT is not set +# CONFIG_KL_USBOTG is not set +# CONFIG_KL_USBDCD is not set +# CONFIG_KL_LLWU is not set +# CONFIG_KL_TSI is not set +# CONFIG_KL_FTFL is not set +# CONFIG_KL_DMA is not set +# CONFIG_KL_CRC is not set +# CONFIG_KL_PDB is not set +# CONFIG_KL_PIT is not set +CONFIG_KL_SYSTICK_CORECLK=y +# CONFIG_KL_SYSTICK_CORECLK_DIV16 is not set + +# +# Kinetis GPIO Interrupt Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=2988 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x1FFFF000 +CONFIG_RAM_SIZE=16384 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_FREEDOM_KL25Z=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="freedom-kl25z" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +CONFIG_FDCLONE_DISABLE=y +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=0 +CONFIG_NFILE_STREAMS=0 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Work Queue Support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1536 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +# CONFIG_DEV_NULL is not set +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +# CONFIG_NSH_DISABLE_CAT is not set +CONFIG_NSH_DISABLE_CD=y +CONFIG_NSH_DISABLE_CP=y +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +CONFIG_NSH_DISABLE_MKDIR=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +CONFIG_NSH_DISABLE_MOUNT=y +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +CONFIG_NSH_DISABLE_RM=y +CONFIG_NSH_DISABLE_RMDIR=y +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_UMOUNT=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=64 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# CU Minimal Terminal +# +# CONFIG_SYSTEM_CUTERM is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/freedom-kl25z/minnsh/setenv.sh b/configs/freedom-kl25z/minnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..2541df62fdff3075633bb56a85ca3806e1decc48 --- /dev/null +++ b/configs/freedom-kl25z/minnsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/freedom-kl25z/minnsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/freedom-kl25z/nsh/Make.defs b/configs/freedom-kl25z/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..eac2f1bdbc441d0ba923ce2e904b643a3a93bc1b --- /dev/null +++ b/configs/freedom-kl25z/nsh/Make.defs @@ -0,0 +1,124 @@ +############################################################################ +# configs/freedom-kl25z/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv6-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/freedom-kl25z/nsh/defconfig b/configs/freedom-kl25z/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b95602880d442e8492c5d1f04df5e67f4b148fc8 --- /dev/null +++ b/configs/freedom-kl25z/nsh/defconfig @@ -0,0 +1,759 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +CONFIG_MOTOROLA_SREC=y +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +CONFIG_ARCH_CHIP_KL=y +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +CONFIG_ARCH_CORTEXM0=y +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv6-m" +CONFIG_ARCH_CHIP="kl" +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set + +# +# ARMV6M Configuration Options +# +# CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_GPIO_IRQ is not set + +# +# Kinetis Configuration Options +# +CONFIG_ARCH_CHIP_MKL25Z128=y +# CONFIG_ARCH_CHIP_MKL26Z128 is not set +CONFIG_ARCH_FAMILY_KL2X=y + +# +# Kinetis Peripheral Support +# +# CONFIG_KL_TRACE is not set +# CONFIG_KL_FLEXBUS is not set +CONFIG_KL_UART0=y +# CONFIG_KL_UART1 is not set +# CONFIG_KL_UART2 is not set +# CONFIG_KL_FLEXCAN0 is not set +# CONFIG_KL_FLEXCAN1 is not set +# CONFIG_KL_SPI0 is not set +# CONFIG_KL_SPI1 is not set +# CONFIG_KL_SPI2 is not set +# CONFIG_KL_I2C0 is not set +# CONFIG_KL_I2C1 is not set +# CONFIG_KL_I2S is not set +# CONFIG_KL_DAC0 is not set +# CONFIG_KL_DAC1 is not set +# CONFIG_KL_ADC0 is not set +# CONFIG_KL_ADC1 is not set +# CONFIG_KL_CMP is not set +# CONFIG_KL_VREF is not set +CONFIG_KL_TPM0=y +# CONFIG_KL_TPM1 is not set +# CONFIG_KL_TPM2 is not set +# CONFIG_KL_LPTIMER is not set +# CONFIG_KL_RTC is not set +# CONFIG_KL_EWM is not set +# CONFIG_KL_CMT is not set +# CONFIG_KL_USBOTG is not set +# CONFIG_KL_USBDCD is not set +# CONFIG_KL_LLWU is not set +# CONFIG_KL_TSI is not set +# CONFIG_KL_FTFL is not set +# CONFIG_KL_DMA is not set +# CONFIG_KL_CRC is not set +# CONFIG_KL_PDB is not set +# CONFIG_KL_PIT is not set +CONFIG_KL_SYSTICK_CORECLK=y +# CONFIG_KL_SYSTICK_CORECLK_DIV16 is not set +CONFIG_KL_TPM0_PWM=y +CONFIG_KL_TPM0_CHANNEL=0 + +# +# Kinetis GPIO Interrupt Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=2988 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x1FFFF000 +CONFIG_RAM_SIZE=16384 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_FREEDOM_KL25Z=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="freedom-kl25z" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=6 +CONFIG_NFILE_STREAMS=6 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1536 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +CONFIG_PWM=y +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +CONFIG_EXAMPLES_PWM=y +CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm0" +CONFIG_EXAMPLES_PWM_FREQUENCY=100 +CONFIG_EXAMPLES_PWM_DUTYPCT=50 +CONFIG_EXAMPLES_PWM_DURATION=5 +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +CONFIG_NSH_DISABLE_CD=y +CONFIG_NSH_DISABLE_CP=y +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +CONFIG_NSH_DISABLE_MKDIR=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +CONFIG_NSH_DISABLE_MOUNT=y +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +CONFIG_NSH_DISABLE_RM=y +CONFIG_NSH_DISABLE_RMDIR=y +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_UMOUNT=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=64 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/freedom-kl25z/nsh/setenv.sh b/configs/freedom-kl25z/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..346e6c2a522372ac8a11953f2fcea4c2ab97fe47 --- /dev/null +++ b/configs/freedom-kl25z/nsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/freedom-kl25z/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/freedom-kl25z/scripts/ld.script b/configs/freedom-kl25z/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..3e1b876b5955833813542bb109063ab2b7a4a74e --- /dev/null +++ b/configs/freedom-kl25z/scripts/ld.script @@ -0,0 +1,134 @@ +/**************************************************************************** + * configs/kwikstik-k40/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The MKL25Z128 has 128Kb of FLASH beginning at address 0x00000000 and + * 16Kb of SRAM at address 0x1ffff000. + */ + +MEMORY +{ + vectflash (rx) : ORIGIN = 0x00000000, LENGTH = 0x00c0 + cfmprotect (rx) : ORIGIN = 0x00000400, LENGTH = 0x10 + progflash (rx) : ORIGIN = 0x00000410, LENGTH = 128K - 0x410 + datasram (rwx) : ORIGIN = 0x1ffff000, LENGTH = 16K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +EXTERN(_cfmconfig) +ENTRY(_stext) +SECTIONS +{ + .vectors : { + _svectors = ABSOLUTE(.); + *(.vectors) + _evectors = ABSOLUTE(.); + } > vectflash + + .cfmprotect : { + *(.cfmconfig) + } > cfmprotect + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progflash + + .ARM.extab : { + *(.ARM.extab*) + } > progflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progflash + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datasram AT > progflash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > datasram AT > progflash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datasram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/freedom-kl25z/src/.gitignore b/configs/freedom-kl25z/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/freedom-kl25z/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/freedom-kl25z/src/Makefile b/configs/freedom-kl25z/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..2105da110193f2667005ba86389a812ff3d10759 --- /dev/null +++ b/configs/freedom-kl25z/src/Makefile @@ -0,0 +1,89 @@ +############################################################################ +# configs/freedom-kl25z/src/Makefile +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = kl_boardinitialize.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += kl_appinit.c +endif + +ifeq ($(CONFIG_WL_CC3000),y) +CSRCS += kl_wifi.c +endif + +ifeq ($(CONFIG_KL_TSI),y) +CSRCS += kl_tsi.c +endif + +ifeq ($(CONFIG_KL_SPI0),y) +CSRCS += kl_spi.c +else +ifeq ($(CONFIG_KL_SPI1),y) +CSRCS += kl_spi.c +endif +endif + +ifeq ($(CONFIG_HAVE_CXX),y) +CSRCS += kl_cxxinitialize.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += kl_led.c +endif + +ifeq ($(CONFIG_KL_USBOTG),y) +CSRCS += kl_usb.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += kl_pwm.c +endif + +ifeq ($(CONFIG_QENCODER),y) +CSRCS += kl_qencoder.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += kl_watchdog.c +endif + +ifeq ($(CONFIG_SENSORS_ADXL345),y) +CSRCS += kl_adxl345.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/freedom-kl25z/src/freedom-kl25z.h b/configs/freedom-kl25z/src/freedom-kl25z.h new file mode 100644 index 0000000000000000000000000000000000000000..ca5ce242d818d510d1d50b77fb15741672eb9e6d --- /dev/null +++ b/configs/freedom-kl25z/src/freedom-kl25z.h @@ -0,0 +1,143 @@ +/**************************************************************************************************** + * configs/freedom-kl25z/src/freedom-kl25z.h + * arch/arm/src/board/freedom-kl25z.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __CONFIGS_FREEDOM_KL25Z_SRC_FREEDOM_KL25Z_H +#define __CONFIGS_FREEDOM_KL25Z_SRC_FREEDOM_KL25Z_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include +#include + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ +/* Configuration ************************************************************************************/ + +/* Freedom KL25Z GPIOs ******************************************************************************/ +/* The Freedom KL25Z has a single RGB LED driven by the KL25Z as follows: + * + * ------------- -------- + * RGB LED KL25Z128 + * ------------- -------- + * Red Cathode PTB18 + * Green Cathode PTB19 + * Blue Cathode PTD1 + * + * NOTE: PTD1 is also connected to the I/O header on J2 pin 10 (also known as D13). + * + * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board the + * Freedom KL25Z. The following definitions describe how NuttX controls the LEDs: + * + * SYMBOL Meaning LED state + * Initially all LED is OFF + * ------------------- ----------------------- -------------------------- + * LED_STARTED NuttX has been started + * LED_HEAPALLOCATE Heap has been allocated + * LED_IRQSENABLED Interrupts enabled + * LED_STACKCREATED Idle stack created + * LED_INIRQ In an interrupt + * LED_SIGNAL In a signal handler + * LED_ASSERTION An assertion failed + * LED_PANIC The system has crashed + * LED_IDLE K25Z1XX is in sleep mode (Optional, not used) + */ + +#define GPIO_LED_R (GPIO_OUTPUT | GPIO_OUTPUT_ONE | PIN_PORTB | PIN18) +#define GPIO_LED_G (GPIO_OUTPUT | GPIO_OUTPUT_ONE | PIN_PORTB | PIN19) +#define GPIO_LED_B (GPIO_OUTPUT | GPIO_OUTPUT_ONE | PIN_PORTD | PIN1) + +/* Button definitions *******************************************************************************/ +/* The Freedom KL25Z has no buttons */ + +/* Chip selects ************************************************************************************/ + +/**************************************************************************************************** + * Public Types + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +/**************************************************************************************************** + * Name: kl_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Freedom KL25Z board. + * + ****************************************************************************************************/ + +void weak_function kl_spidev_initialize(void); + +/**************************************************************************************************** + * Name: kl_usbinitialize + * + * Description: + * Called from kl_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the Freedom KL25Z board. + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_USB +void weak_function kl_usbinitialize(void); +#endif + +/**************************************************************************************************** + * Name: kl_led_initialize + * + * Description: + * Initialize the on-board LED + * + ****************************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void kl_led_initialize(void); +#endif + + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_FREEDOM_KL25Z_SRC_FREEDOM_KL25Z_H */ + diff --git a/configs/freedom-kl25z/src/kl_adxl345.c b/configs/freedom-kl25z/src/kl_adxl345.c new file mode 100644 index 0000000000000000000000000000000000000000..0b68d7a8326ca49aa16f8531b23e7df257fd2d55 --- /dev/null +++ b/configs/freedom-kl25z/src/kl_adxl345.c @@ -0,0 +1,305 @@ +/************************************************************************************ + * configs/freedom-kl25z/src/kl_adxl345.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include + +#include "freedom-kl25z.h" +#include "kl_gpio.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifdef CONFIG_SENSORS_ADXL345 +#ifndef CONFIG_KL_SPI0 +# error "ADXL345 support requires CONFIG_KL_SPI0" +#endif + +#ifndef CONFIG_ADXL345_SPI +# error "Only the ADXL345 SPI interface is supported" +#endif + +#ifdef CONFIG_ADXL345_I2C +# error "Only the ADXL345 SPI interface is supported" +#endif + +#ifndef CONFIG_ADXL345_FREQUENCY +# define CONFIG_ADXL345_FREQUENCY 500000 +#endif + +#ifndef CONFIG_ADXL345_SPIDEV +# define CONFIG_ADXL345_SPIDEV 0 +#endif + +#if CONFIG_ADXL345_SPIDEV != 0 +# error "CONFIG_ADXL345_SPIDEV must be zero" +#endif + +#ifndef CONFIG_ADXL345_DEVMINOR +# define CONFIG_ADXL345_DEVMINOR 0 +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct kl_adxl345config_s +{ + /* Configuration structure as seen by the ADXL345 driver */ + + struct adxl345_config_s config; + + /* Additional private definitions only known to this driver */ + + ADXL345_HANDLE handle; /* The ADXL345 driver handle */ + adxl345_handler_t handler; /* The ADXL345 interrupt handler */ + FAR void *arg; /* Argument to pass to the interrupt handler */ +}; + +/**************************************************************************** + * Static Function Prototypes + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind callbacks + * to isolate the ADXL345 driver from differences in GPIO interrupt handling + * by varying boards and MCUs. + * + * attach - Attach the ADXL345 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + */ + +static int adxl345_attach(FAR struct adxl345_config_s *state, + adxl345_handler_t handler, FAR void *arg); +static void adxl345_enable(FAR struct adxl345_config_s *state, bool enable); +static void adxl345_clear(FAR struct adxl345_config_s *state); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the ADXL345 + * driver. This structure provides information about the configuration + * of the ADXL345 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writable because, under certain circumstances, the driver + * may modify frequency or X plate resistance values. + */ + +static struct kl_adxl345config_s g_adxl345config = +{ + .config = + { +#ifdef CONFIG_ADXL345_I2C + .address = ADXL345_ADDR1, +#endif + .frequency = CONFIG_ADXL345_FREQUENCY, + + .attach = adxl345_attach, + .enable = adxl345_enable, + .clear = adxl345_clear, + }, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ +/* This is the ADXL345 Interupt handler */ + +int adxl345_interrupt(int irq, FAR void *context) +{ + /* Verify that we have a handler attached */ + + if (g_adxl345config.handler) + { + /* Yes.. forward with interrupt along with its argument */ + + g_adxl345config.handler(&g_adxl345config.config, g_adxl345config.arg); + } + + return OK; +} + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the ADXL345 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. + * + * attach - Attach the ADXL345 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + */ + +static int adxl345_attach(FAR struct adxl345_config_s *state, + adxl345_handler_t handler, FAR void *arg) +{ + FAR struct kl_adxl345config_s *priv = (FAR struct kl_adxl345config_s *)state; + + snvdbg("Saving handler %p\n", handler); + DEBUGASSERT(priv); + + /* Just save the handler and its argument. We will use it when interrupts + * are enabled + */ + + priv->handler = handler; + priv->arg = arg; + return OK; +} + +static void adxl345_enable(FAR struct adxl345_config_s *state, bool enable) +{ + FAR struct kl_adxl345config_s *priv = (FAR struct kl_adxl345config_s *)state; + irqstate_t flags; + + /* Attach and enable, or detach and disable. Enabling and disabling GPIO + * interrupts is a multi-step process so the safest thing is to keep + * interrupts disabled during the reconfiguration. + */ + + flags = enter_critical_section(); + if (enable) + { + /* Configure the interrupt using the SAVED handler */ + + kl_configgpio(GPIO_ADXL345_INT1); + (void)kl_gpioirqattach(GPIO_ADXL345_INT1, adxl345_interrupt); + kl_gpioirqenable(GPIO_ADXL345_INT1); + } + else + { + /* Configure the interrupt with a NULL handler to disable it */ + + (void)kl_gpioirqattach(GPIO_ADXL345_INT1, NULL); + kl_gpioirqdisable(GPIO_ADXL345_INT1); + } + + leave_critical_section(flags); +} + +static void adxl345_clear(FAR struct adxl345_config_s *state) +{ + /* Does nothing */ +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: adxl345_archinitialize + * + * Description: + * Each board that supports an adxl345 device must provide this function. + * This function is called by application-specific, setup logic to + * configure the accelerometer device. This function will register the + * driver as /dev/accelN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int adxl345_archinitialize(int minor) +{ + FAR struct spi_dev_s *dev; + int ret; + + sndbg("minor %d\n", minor); + DEBUGASSERT(minor == 0); + + /* Check if we are already initialized */ + + if (!g_adxl345config.handle) + { + snvdbg("Initializing\n"); + + /* Configure the ADXL345 interrupt pin as an input */ + + (void)kl_configgpio(GPIO_ADXL345_INT1); + + /* Get an instance of the I2C interface */ + + dev = kl_spibus_initialize(CONFIG_ADXL345_SPIDEV); + if (!dev) + { + sndbg("Failed to initialize SPI bus %d\n", CONFIG_ADXL345_SPIDEV); + return -ENODEV; + } + + /* Instantiate the ADXL345 driver */ + + g_adxl345config.handle = + adxl345_instantiate(dev, (FAR struct adxl345_config_s *)&g_adxl345config); + if (!g_adxl345config.handle) + { + sndbg("Failed to instantiate the ADXL345 driver\n"); + return -ENODEV; + } + + /* Initialize and register the ADXL345 driver */ + + ret = adxl345_register(g_adxl345config.handle, CONFIG_ADXL345_DEVMINOR); + if (ret < 0) + { + sndbg("Failed to register ADXL345 driver: %d\n", ret); + return ret; + } + } + + return OK; +} + +#endif /* CONFIG_SENSORS_ADXL345 */ diff --git a/configs/freedom-kl25z/src/kl_appinit.c b/configs/freedom-kl25z/src/kl_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..a58a43c0bd6d954a0f8b1f943846d65ff8ae2eea --- /dev/null +++ b/configs/freedom-kl25z/src/kl_appinit.c @@ -0,0 +1,82 @@ +/**************************************************************************** + * config/stm32f4discovery/src/kl_appinit.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#ifdef CONFIG_LIB_BOARDCTL + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(CONFIG_SENSORS_ADXL345) + int ret; + + ret = adxl345_archinitialize(0); + if (ret < 0) + { + dbg("ERROR: adxl345_archinitialize failed: %d\n", ret); + } +#endif + return OK; +} + +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/configs/freedom-kl25z/src/kl_boardinitialize.c b/configs/freedom-kl25z/src/kl_boardinitialize.c new file mode 100644 index 0000000000000000000000000000000000000000..a3036bd9075cd2a18d8de0d04776afd9af91b5bc --- /dev/null +++ b/configs/freedom-kl25z/src/kl_boardinitialize.c @@ -0,0 +1,137 @@ +/************************************************************************************ + * configs/freedom-kl25z/src/up_boot.c + * arch/arm/src/board/up_boot.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "freedom-kl25z.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kl_boardinitialize + * + * Description: + * All K25Z architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void kl_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * kl_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1) + if (kl_spidev_initialize) + { + kl_spidev_initialize(); + } +#endif + + /* Initialize USB if the 1) USB device controller is in the configuration + * and 2) disabled, and 3) the weak function kl_usbinitialize() has been + * brought into the build. Presumably either CONFIG_USBHOST or + * CONFIG_USBDEV is also selected. + */ + +#ifdef CONFIG_KL_USBOTG + if (kl_usbinitialize) + { + kl_usbinitialize(); + } +#endif + + /* Configure on-board LED if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + kl_led_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intitialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + (void)board_app_initialize(); +#endif + + /* CC3000 wireless initialization */ + +#ifdef CONFIG_WL_CC3000 + wireless_archinitialize(0); +#endif +} +#endif diff --git a/configs/freedom-kl25z/src/kl_led.c b/configs/freedom-kl25z/src/kl_led.c new file mode 100644 index 0000000000000000000000000000000000000000..6a40bb48b5588c6b7ff0cf650c0f1bacfe0528af --- /dev/null +++ b/configs/freedom-kl25z/src/kl_led.c @@ -0,0 +1,169 @@ +/**************************************************************************** + * configs/freedom-kl25z/src/kl_led.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* The Freedom KL25Z has a single RGB LED driven by the KL25Z as follows: + * + * ------------- -------- + * RGB LED KL25Z128 + * ------------- -------- + * Red Cathode PTB18 + * Green Cathode PTB19 + * Blue Cathode PTD1 + * + * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board the + * Freedom KL25Z. The following definitions describe how NuttX controls the LEDs: + * + * SYMBOL Meaning LED state + * Initially all LED is OFF + * ------------------- ----------------------- -------------------------- + * LED_STARTED NuttX has been started R=OFF G=OFF B=OFF + * LED_HEAPALLOCATE Heap has been allocated (no change) + * LED_IRQSENABLED Interrupts enabled (no change) + * LED_STACKCREATED Idle stack created R=OFF G=OFF B=ON + * LED_INIRQ In an interrupt (no change) + * LED_SIGNAL In a signal handler (no change) + * LED_ASSERTION An assertion failed (no change) + * LED_PANIC The system has crashed R=FLASHING G=OFF B=OFF + * LED_IDLE K25Z1XX is in sleep mode (Optional, not used) + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "kl_gpio.h" +#include "freedom-kl25z.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS) +# define led_dumpgpio(m) kl_dumpgpio(GPIO_LED_B, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: kl_led_initialize + * + * Description: + * Initialize the on-board LED + * + ****************************************************************************/ + +void kl_led_initialize(void) +{ + kl_configgpio(GPIO_LED_R); + kl_configgpio(GPIO_LED_G); + kl_configgpio(GPIO_LED_B); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led == LED_STACKCREATED) + { + kl_gpiowrite(GPIO_LED_R, true); + kl_gpiowrite(GPIO_LED_G, true); + kl_gpiowrite(GPIO_LED_B, false); + } + else if (led == LED_PANIC) + { + kl_gpiowrite(GPIO_LED_R, false); + kl_gpiowrite(GPIO_LED_G, true); + kl_gpiowrite(GPIO_LED_B, true); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == LED_PANIC) + { + kl_gpiowrite(GPIO_LED_R, true); + kl_gpiowrite(GPIO_LED_G, true); + kl_gpiowrite(GPIO_LED_B, true); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/freedom-kl25z/src/kl_pwm.c b/configs/freedom-kl25z/src/kl_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..0d0a73aeb9944de1b08c981de462fa046ff65930 --- /dev/null +++ b/configs/freedom-kl25z/src/kl_pwm.c @@ -0,0 +1,122 @@ +/************************************************************************************ + * configs/freedom-kl25z/src/kl_pwm.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "kl_pwm.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* PWM + * + * The Kinetis Freedom board provides a LED on GPIO. + */ + +#ifdef CONFIG_PWM + +extern struct pwm_lowerhalf_s *kl_pwminitialize(int timer); + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All Kinetis KL architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call kl_pwminitialize() to get an instance of the PWM interface */ + + pwm = kl_pwminitialize(0); + if (!pwm) + { + adbg("Failed to get the KL25 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/freedom-kl25z/src/kl_spi.c b/configs/freedom-kl25z/src/kl_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..c674bd45278d87f51b0000eb533275c8cd57c505 --- /dev/null +++ b/configs/freedom-kl25z/src/kl_spi.c @@ -0,0 +1,259 @@ +/**************************************************************************** + * configs/freedom-kl25z/src/kl_spi.c + * + * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "kl_gpio.h" +#include "kl_spi.h" +#include "freedom-kl25z.h" + +#if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: kl_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the FRDM-KL25Z board. + * + ****************************************************************************/ + +void weak_function kl_spidev_initialize(void) +{ + /* Configure SPI0 chip selects */ + +#ifdef CONFIG_KL_SPI0 +# ifdef CONFIG_ADXL345_SPI + kl_configgpio(GPIO_ADXL345_CS); +#endif + +# ifdef CONFIG_WL_CC3000 + kl_configgpio(GPIO_WIFI_CS); + kl_configgpio(GPIO_WIFI_EN); + kl_configgpio(GPIO_WIFI_INT); +# endif +#endif + + /* Configure SPI1 chip selects */ + +#ifdef CONFIG_KL_SPI1 +#endif +} + +/**************************************************************************** + * Name: kl_spi[n]select, kl_spi[n]status, and kl_spi[n]cmddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * are implementations of the select, status, and cmddata methods of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All + * other methods including kl_spibus_initialize()) are provided by common + * Kinetis logic. To use this common SPI logic on your board: + * + * 1. Provide logic in kl_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide kl_spi[n]select() and kl_spi[n]status() functions + * in your board-specific logic. These functions will perform chip + * selection and status operations using GPIOs in the way your board + * is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * kl_spi[n]cmddata() functions in your board-specific logic. These + * functions will perform cmd/data selection operations using GPIOs in + * the way your board is configured. + * 3. Add a call to kl_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by kl_spibus_initialize() may then be used to bind + * the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ +/**************************************************************************** + * Name: kl_spi[n]select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * GPIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the GPIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_KL_SPI0 +void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ + spivdbg("devid: %d CS: %s\n", + (int)devid, selected ? "assert" : "de-assert"); + +#ifdef CONFIG_ADXL345_SPI + if (devid == SPIDEV_ACCELEROMETER) + { + /* Active low */ + + kl_gpiowrite(GPIO_ADXL345_CS, !selected); + } +#endif + +#if defined(CONFIG_WL_CC3000) + if (devid == SPIDEV_WIRELESS) + { + kl_gpiowrite(GPIO_WIFI_CS, !selected); + } +#endif + +} +#endif + +#ifdef CONFIG_KL_SPI1 +void kl_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ + spivdbg("devid: %d CS: %s\n", + (int)devid, selected ? "assert" : "de-assert"); +} +#endif + +/**************************************************************************** + * Name: kl_spi[n]status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef CONFIG_KL_SPI0 +uint8_t kl_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_KL_SPI1 +uint8_t kl_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: kl_spi[n]cmddata + * + * Description: + * Some SPI interfaces, particularly with LCDs, and an auxiliary 9th data + * input that determines where the other 8 data bits represent command or + * data. These interfaces control that CMD/DATA GPIO output + * + * Input Parameters: + * devid - Identifies the (logical) device + * cmd - Determines where command or data should be selected. + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_KL_SPI0 +int kl_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return 0; +} +#endif + +#ifdef CONFIG_KL_SPI1 +int kl_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return 0; +} +#endif +#endif + +#endif /* CONFIG_KL_SPI */ diff --git a/configs/freedom-kl25z/src/kl_tsi.c b/configs/freedom-kl25z/src/kl_tsi.c new file mode 100644 index 0000000000000000000000000000000000000000..e030caa9e8c737e039901392c5cf86de82fdd895 --- /dev/null +++ b/configs/freedom-kl25z/src/kl_tsi.c @@ -0,0 +1,261 @@ +/**************************************************************************** + * configs/freedom-kl25z/src/kl_tsi.c + * + * Copyright (C) 2013 Alan Carvalho de Assis + * Author: Alan Carvalho de Assis + * with adaptions from Gregory Nutt + * + * Reference: https://community.freescale.com/community/ + * the-embedded-beat/blog/2012/10/15/ + * using-the-touch-interface-on-the-freescale-freedom-development-platform + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "up_arch.h" +#include "kl_gpio.h" +#include "chip/kl_tsi.h" +#include "chip/kl_pinmux.h" +#include "chip/kl_sim.h" + +#ifdef CONFIG_KL_TSI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* The touchpad on the Freedom KL25Z board connects to the MCU via: + * + * PTB16 TWI0_CH9 + * PTB17 TSI0_CH10 + */ + +#define NSENSORS 2 + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void tsi_calibrate(void); +static ssize_t tsi_read(FAR struct file *filep, FAR char *buffer, size_t buflen); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static uint16_t g_defcap[NSENSORS]; /* Default capacitance for each sensor */ +static uint16_t g_currdelta = 0; /* Current delta for the current button */ +static uint8_t g_channel = 0; /* Current g_channel */ + +/* Channel assigned to each sensor */ + +static uint8_t const g_chsensor[NSENSORS] = { 9, 10 }; + +/* Character driver operations */ + +static const struct file_operations tsi_ops = +{ + 0, /* open */ + 0, /* close */ + tsi_read, /* read */ + 0, /* write */ + 0, /* seek */ + 0, /* ioctl */ +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tsi_calibrate + ****************************************************************************/ + +static void tsi_calibrate(void) +{ + uint32_t regval; + int i; + + for (i = 0; i < NSENSORS; i++) + { + /* Clear end of scan flag */ + + regval = getreg32(KL_TSI_GENCS); + regval |= TSI_GENCS_EOSF; + putreg32(regval, KL_TSI_GENCS); + + /* Scan the next electrode */ + + regval = TSI_DATA_TSICH(g_chsensor[i]); + putreg32(regval, KL_TSI_DATA); + + regval |= TSI_DATA_SWTS; + putreg32(regval, KL_TSI_DATA); + + /* Wait until the conversion is done */ + + while (!(getreg32(KL_TSI_GENCS) & TSI_GENCS_EOSF)); + + g_defcap[i] = getreg32(KL_TSI_DATA) & TSI_DATA_TSICNT_MASK; + ivdbg("Sensor %d = %d\n", i+1, g_defcap[i]); + } +} + +/**************************************************************************** + * Name: tsi_read + ****************************************************************************/ + +static ssize_t tsi_read(FAR struct file *filep, FAR char *buf, size_t buflen) +{ + static int deltacap = 0; + uint32_t regval; + + if (buf == NULL || buflen < 1) + { + /* Well... nothing to do */ + + return -EINVAL; + } + + deltacap = 0; + + /* Clear end of scan flag */ + + regval = getreg32(KL_TSI_GENCS); + regval |= TSI_GENCS_EOSF; + putreg32(regval, KL_TSI_GENCS); + + /* Scan the next electrode */ + + regval = TSI_DATA_TSICH(g_chsensor[g_channel]); + putreg32(regval, KL_TSI_DATA); + + regval |= TSI_DATA_SWTS; + putreg32(regval, KL_TSI_DATA); + + /* Wait until the conversion is done*/ + + while (!(getreg32(KL_TSI_GENCS) & TSI_GENCS_EOSF)); + + /* Compute delta using calibration reference counts */ + + deltacap = getreg32(KL_TSI_DATA) & TSI_DATA_TSICNT_MASK; + deltacap -= g_defcap[g_channel]; + + if (deltacap < 0) + { + deltacap = 0; + } + + g_currdelta = (uint16_t)deltacap; + + ivdbg("Delta for g_channel %d = %d\n", g_channel, g_currdelta); + + buf[0] = g_currdelta & 0xff; + buf[1] = (g_currdelta & 0xff00) >> 8; + buf[2] = g_channel; + + /* Increment the channel index to sample the next sensor on the next timer + * that read() is called. + */ + + g_channel++; + if (g_channel >= NSENSORS) + { + g_channel = 0; + } + + return 3; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: kl_tsi_initialize + * + * Description: + * Initialize the TSI hardware and interface for the sliders on board the + * Freedom KL25Z board. Register a character driver at /dev/tsi that may + * be used to read from each sensor. + * + ****************************************************************************/ + +void kl_tsi_initialize(void) +{ + uint32_t regval; + + /* Enable access to the TSI module */ + + regval = getreg32(KL_SIM_SCGC5); + regval |= SIM_SCGC5_TSI; + putreg32(regval, KL_SIM_SCGC5); + + /* Configure PINs used on TSI */ + + kl_configgpio(PIN_TSI0_CH9); + kl_configgpio(PIN_TSI0_CH10); + + /* Configure TSI parameter */ + + regval = getreg32(KL_TSI_GENCS); + regval |= TSI_GENCS_MODE_CAPSENSING | TSI_GENCS_REFCHRG_8UA | + TSI_GENCS_DVOLT_1p03V | TSI_GENCS_EXTCHRG_64A | + TSI_GENCS_PS_DIV16 | TSI_GENCS_NSCN_TIMES(12) | TSI_GENCS_STPE; + putreg32(regval, KL_TSI_GENCS); + + /* Only after setting TSI we should enable it */ + + regval = getreg32(KL_TSI_GENCS); + regval |= TSI_GENCS_TSIEN; + putreg32(regval, KL_TSI_GENCS); + + /* Calibrate it before to use */ + + tsi_calibrate(); + + /* And finally register the TSI character driver */ + + (void)register_driver("/dev/tsi", &tsi_ops, 0444, NULL); +} + +#endif /* CONFIG_KL_TSI */ diff --git a/configs/freedom-kl25z/src/kl_wifi.c b/configs/freedom-kl25z/src/kl_wifi.c new file mode 100644 index 0000000000000000000000000000000000000000..461a681f8850381fa81d38a84ca5efa2101cedf9 --- /dev/null +++ b/configs/freedom-kl25z/src/kl_wifi.c @@ -0,0 +1,371 @@ +/**************************************************************************** + * configs/freedom-kl25z/src/kl_tsi.c + * + * Copyright (C) 2014 Alan Carvalho de Assis + * Author: Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "up_arch.h" +#include "kl_gpio.h" +#include "chip/kl_pinmux.h" +#include "chip/kl_sim.h" +#include "freedom-kl25z.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef CONFIG_WL_CC3000 +#ifndef CONFIG_DRIVERS_WIRELESS +# error "Wireless support requires CONFIG_DRIVERS_WIRELESS" +#endif + +#ifndef CONFIG_KL_SPI0 +# error "CC3000 Wireless support requires CONFIG_KL_SPI0" +#endif + +#ifndef CC3000_SPI_FREQUENCY +# define CC3000_SPI_FREQUENCY 16000000 +#endif + +#ifndef CC3000_SPIDEV +# define CC3000_SPIDEV 0 +#endif + +#if CC3000_SPIDEV != 0 +# error "CC3000_SPIDEV must be 0" +#endif + +#ifndef CC3000_DEVMINOR +# define CC3000_DEVMINOR 0 +#endif + +#ifndef CONFIG_CC3000_RX_BUFFER_SIZE +# define CONFIG_CC3000_RX_BUFFER_SIZE 132 +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct kl_config_s +{ + struct cc3000_config_s dev; + xcpt_t handler; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind callbacks + * to isolate the CC3000 driver from differences in GPIO interrupt handling + * by varying boards and MCUs. If possible, interrupts should be configured + * on falling edges to detect the Ready Condition At T2: The normal master + * SPI write sequence is SPI_CS low, followed by SPI_IRQ low CC3000 to host, + * indicating that the CC3000 core module is ready to accept data. T2 + * duration is approximately 7 ms. + * + * irq_attach - Attach the CC3000 interrupt handler to the GPIO + * interrupt + * irq_enable - Enable or disable the GPIO interrupt + * irq_clear - Acknowledge/clear any pending GPIO interrupt + * power_enable - Enable or disable Module enable. + * chip_chip_select - The Chip Select + * irq_read - Return the state of the interrupt GPIO input + * probe - Debug support + */ + +static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler); +static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable); +static void wl_clear_irq(FAR struct cc3000_config_s *state); +static void wl_select(FAR struct cc3000_config_s *state, bool enable); +static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable); +static bool wl_read_irq(FAR struct cc3000_config_s *state); +#ifdef CONFIG_CC3000_PROBES +static bool probe(FAR struct cc3000_config_s *state,int n, bool s); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the CC3000 + * driver. This structure provides information about the configuration + * of the CC3000 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writable because, under certain circumstances, the driver + * may modify frequency or X plate resistance values. + */ + +static struct kl_config_s g_cc3000_info = +{ + .dev.spi_frequency = CONFIG_CC3000_SPI_FREQUENCY, + .dev.spi_mode = CONFIG_CC3000_SPI_MODE, + .dev.max_rx_size = 0, + .dev.irq_attach = wl_attach_irq, + .dev.irq_enable = wl_enable_irq, + .dev.irq_clear = wl_clear_irq, + .dev.power_enable = wl_enable_power, + .dev.chip_chip_select = wl_select, + .dev.irq_read = wl_read_irq, +#ifdef CONFIG_CC3000_PROBES + .dev.probe = probe, /* This is used for debugging */ +#endif + .handler = NULL, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the CC3000 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * irq_attach - Attach the CC3000 interrupt handler to the GPIO + * interrupt + * irq_enable - Enable or disable the GPIO interrupt + * irq_clear - Acknowledge/clear any pending GPIO interrupt + * power_enable - Enable or disable Module enable. + * chip_chip_select - The Chip Select + * irq_read - Return the state of the interrupt GPIO input + * probe - Debug support + */ + +static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler) +{ + FAR struct kl_config_s *priv = (FAR struct kl_config_s *)state; + + /* Just save the handler for use when the interrupt is enabled */ + + priv->handler = handler; + return OK; +} + +static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable) +{ + FAR struct kl_config_s *priv = (FAR struct kl_config_s *)state; + + /* The caller should not attempt to enable interrupts if the handler + * has not yet been 'attached' + */ + + DEBUGASSERT(priv->handler || !enable); + + /* Attach and enable, or detach and disable */ + + ivdbg("enable:%d\n", enable); + if (enable) + { + (void)kl_gpioirqattach(GPIO_WIFI_INT, priv->handler); + kl_gpioirqenable(GPIO_WIFI_INT); + } + else + { + (void)kl_gpioirqattach(GPIO_WIFI_INT, NULL); + kl_gpioirqdisable(GPIO_WIFI_INT); + } +} + +static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable) +{ + ivdbg("enable:%d\n", enable); + + /* Active high enable */ + + kl_gpiowrite(GPIO_WIFI_EN, enable); +} + +static void wl_select(FAR struct cc3000_config_s *state, bool enable) +{ + ivdbg("enable:%d\n", enable); + + /* Active high enable */ + + kl_gpiowrite(GPIO_WIFI_CS, enable); +} + +static void wl_clear_irq(FAR struct cc3000_config_s *state) +{ + /* Does nothing */ +} + +static bool wl_read_irq(FAR struct cc3000_config_s *state) +{ + /* Active low*/ + + return kl_gpioread(GPIO_WIFI_INT) ? false : true; +} + +#ifdef CONFIG_CC3000_PROBES +static bool probe(FAR struct cc3000_config_s *state,int n, bool s) +{ + if (n == 0) + { + kl_gpiowrite(GPIO_D0, s); + } + + if (n == 1) + { + kl_gpiowrite(GPIO_D1, s); + } + + return true; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arch_wlinitialize + * + * Description: + * Each board that supports a wireless device must provide this function. + * This function is called by application-specific, setup logic to + * configure the wireless device. This function will register the driver + * as /dev/wirelessN where N is the minor device number. + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int wireless_archinitialize(size_t max_rx_size) +{ + FAR struct spi_dev_s *spi; + + /* Init SPI bus */ + + idbg("minor %d\n", minor); + DEBUGASSERT(CONFIG_CC3000_DEVMINOR == 0); + +#ifdef CONFIG_CC3000_PROBES + kl_configgpio(GPIO_D0); + kl_configgpio(GPIO_D1); + kl_gpiowrite(GPIO_D0, 1); + kl_gpiowrite(GPIO_D1, 1); +#endif + + /* Get an instance of the SPI interface */ + + spi = kl_spibus_initialize(CONFIG_CC3000_SPIDEV); + if (!spi) + { + idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV); + return -ENODEV; + } + + /* Initialize and register the SPI CC3000 device */ + + g_cc3000_info.dev.max_rx_size = max_rx_size ? max_rx_size : CONFIG_CC3000_RX_BUFFER_SIZE; + int ret = cc3000_register(spi, &g_cc3000_info.dev, CONFIG_CC3000_DEVMINOR); + if (ret < 0) + { + idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV); + return -ENODEV; + } + + return OK; +} + +/**************************************************************************** + * Name: C3000_wlan_init + * + * Description: + * Initialize wlan driver + * + * Warning: This function must be called before ANY other wlan driver + * function + * + * Input Parmeters: + * sWlanCB Asynchronous events callback. + * 0 no event call back. + * - Call back parameters: + * 1) event_type: HCI_EVNT_WLAN_UNSOL_CONNECT connect event, + * HCI_EVNT_WLAN_UNSOL_DISCONNECT disconnect event, + * HCI_EVNT_WLAN_ASYNC_SIMPLE_CONFIG_DONE config done, + * HCI_EVNT_WLAN_UNSOL_DHCP dhcp report, + * HCI_EVNT_WLAN_ASYNC_PING_REPORT ping report OR + * HCI_EVNT_WLAN_KEEPALIVE keepalive. + * 2) data: pointer to extra data that received by the event + * (NULL no data). + * 3) length: data length. + * - Events with extra data: + * HCI_EVNT_WLAN_UNSOL_DHCP: 4 bytes IP, 4 bytes Mask, + * 4 bytes default gateway, 4 bytes DHCP server and 4 bytes + * for DNS server. + * HCI_EVNT_WLAN_ASYNC_PING_REPORT: 4 bytes Packets sent, + * 4 bytes Packets received, 4 bytes Min round time, + * 4 bytes Max round time and 4 bytes for Avg round time. + * + * sFWPatches 0 no patch or pointer to FW patches + * sDriverPatches 0 no patch or pointer to driver patches + * sBootLoaderPatches 0 no patch or pointer to bootloader patches + * + * Returned Value: + * None + * + ****************************************************************************/ + +void cc3000_wlan_init(size_t max_tx_len, + tWlanCB sWlanCB, + tFWPatches sFWPatches, tDriverPatches + sDriverPatches, tBootLoaderPatches sBootLoaderPatches) +{ + wlan_init(max_tx_len, sWlanCB, sFWPatches, sDriverPatches, sBootLoaderPatches); +} + +#endif /* CONFIG_WL_CC3000 */ diff --git a/configs/freedom-kl26z/Kconfig b/configs/freedom-kl26z/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..a2ec3c6e066cd9229c9598db16e963349324310b --- /dev/null +++ b/configs/freedom-kl26z/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_FREEDOM_KL26Z +endif diff --git a/configs/freedom-kl26z/README.txt b/configs/freedom-kl26z/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..260ee1b6be13b359133463bd83794a5ecc28e93f --- /dev/null +++ b/configs/freedom-kl26z/README.txt @@ -0,0 +1,358 @@ +README.txt +========== + + This is the README file for the port of NuttX to the Freescale Freedom KL26Z + board. This board has the MKL26Z128 chip with a built-in SDA debugger. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - NuttX Buildroot Toolchain + - LEDs + - Serial Console + - mbed + - Freedom KL26Z-specific Configuration Options + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin under Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + As of this writing, all testing has been performed using the NuttX buildroot + toolchain described below. I have also verified the build using the + CodeSourcery GCC toolchain for windows. Most any contemporary EABI GCC + toolchain should work will a little tinkering. + +NuttX Buildroot Toolchain +========================= + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M0 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M0 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh freedom-kl26z/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm0-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M0 toolchain for Cygwin under Windows. + +LEDs +==== + + The Freedom KL26Z has a single RGB LED driven by the KL26Z as follows: + + ------------- -------- + RGB LED KL26Z128 + ------------- -------- + Red Cathode PTE29 + Green Cathode PTE31 + Blue Cathode PTD5 + + NOTE: PTD5 is also connected to the I/O header on J2 pin 12 (also known as D13). + + If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board the + Freedom KL26Z. The following definitions describe how NuttX controls the LEDs: + + SYMBOL Meaning LED state + Initially all LED is OFF + ------------------- ----------------------- -------------------------- + LED_STARTED NuttX has been started R=OFF G=OFF B=OFF + LED_HEAPALLOCATE Heap has been allocated (no change) + LED_IRQSENABLED Interrupts enabled (no change) + LED_STACKCREATED Idle stack created R=OFF G=OFF B=ON + LED_INIRQ In an interrupt (no change) + LED_SIGNAL In a signal handler (no change) + LED_ASSERTION An assertion failed (no change) + LED_PANIC The system has crashed R=FLASHING G=OFF B=OFF + LED_IDLE K26Z1XX is in sleep mode (Optional, not used) + +Serial Console +============== + + As with most NuttX configurations, the Freedom KL26Z configurations + depend on having a serial console to interact with the software. The + Freedom KL26Z, however, has no on-board RS-232 drivers so will be + necessary to connect the Freedom KL26Z UART pins to an external + RS-232 driver board or TTL-to-Serial USB adaptor. + + By default UART0 is used as the serial console on this boards. The UART0 + is configured to work with the OpenSDA USB CDC/ACM port: + + ------ ------------------------------- ----------------------------- + PIN PIN FUNCTIONS BOARD SIGNALS + ------ ------------------------------- ----------------------------- + Pin 27 PTA1/TSI0_CH2/UART0_RX/FTM2_CH0 UART1_RX_TGTMCU and D0 (PTA1) + Pin 28 PTA2/TSI0_CH3/UART0_TX/FTM2_CH1 UART1_TX_TGTMCU and D1 (PTA2) + + But the UART0 Tx/Rx signals are also available on J1: + + ---------------- --------- + UART0 SIGNAL J1 pin + ---------------- --------- + UART0_RX (PTA1) J1, pin 2 + UART0_TX (PTA2) J1, pin 4 + + Ground is available on J2 pin 14. 3.3V is available on J3 and J4. + +Freedom KL26Z-specific Configuration Options +============================================ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM0=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=kl + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_MKL26Z128=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=freedom-kl26z (for the Freescale FRDM-KL26Z development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_FREEDOM_K26Z128=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=16384 (16Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled as follows. These settings are for + all of the K25Z100/120 line and may not be available for the MKL26Z128 + in particular: + + AHB + --- + + CONFIG_KL_PDMA Peripheral DMA + CONFIG_KL_FMC Flash memory + CONFIG_KL_EBI External bus interface + + APB1 + ---- + + CONFIG_KL_WDT Watchdog timer + CONFIG_KL_RTC Real time clock (RTC) + CONFIG_KL_TMR0 Timer0 + CONFIG_KL_TMR1 Timer1 + CONFIG_KL_I2C0 I2C interface + CONFIG_KL_SPI0 SPI0 master/slave + CONFIG_KL_SPI1 SPI1 master/slave + CONFIG_KL_PWM0 PWM0 + CONFIG_KL_PWM1 PWM1 + CONFIG_KL_PWM2 PWM2 + CONFIG_KL_PWM3 PWM3 + CONFIG_KL_UART0 UART0 + CONFIG_KL_USBD USB 2.0 FS device controller + CONFIG_KL_ACMP Analog comparator + CONFIG_KL_ADC Analog-digital-converter (ADC) + + APB2 + --- + + CONFIG_KL_PS2 PS/2 interface + CONFIG_KL_TIMR2 Timer2 + CONFIG_KL_TIMR3 Timer3 + CONFIG_KL_I2C1 I2C1 interface + CONFIG_KL_SPI2 SPI2 master/slave + CONFIG_KL_SPI3 SPI3 master/slave + CONFIG_KL_PWM4 PWM4 + CONFIG_KL_PWM5 PWM5 + CONFIG_KL_PWM6 PWM6 + CONFIG_KL_PWM7 PWM7 + CONFIG_KL_UART1 UART1 + CONFIG_KL_UART2 UART2 + CONFIG_KL_I2S I2S interface + + K26Z1XX specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - Selects the UARTn (n=0,1,2) for the + console and ttys0. + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer for UARTn. + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + for UARTn. + CONFIG_UARTn_BAUD - The configure BAUD of UARTn, + CONFIG_UARTn_BITS - The number of bits. Must be 5, 6, 7, or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + +Configurations +============== + +Each FREEDOM-KL26Z configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh freedom-kl26z/ + cd - + . ./setenv.sh + +If this is a Windows native build, then configure.bat should be used +instead of configure.sh: + + configure.bat freedom-kl26z\ + +Where is one of the following: + + minnsh: + ------ + + This is a experiment to see just how small we can get a usable NSH + configuration. This configuration has far fewer features than the nsh + configuration but is also a fraction of the size. + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables the serial interface on UART0. Support for + builtin applications is disabled. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + 3. Serial Console. A serial console is necessary to interrupt with + NSH. The serial console is configured on UART0 which is available + on J1: + + ---------------- --------- + UART0 SIGNAL J1 pin + ---------------- --------- + UART0_RX (PTA1) J1, pin 2 + UART0_TX (PTA2) J1, pin 4 + + Ground is available on J2 pin 14. 3.3V is available on J3 and J4. + + It is possible to configure NSH to use a USB serial console instead + of an RS-232 serial console. However, that configuration has not + been impelmented as of this writing. + + 4. Memory Usage. The size command gives us the static memory usage. + This is what I get: + + $ size nuttx + text data bss dec hex filename + 35037 106 1092 36235 8d8b nuttx + + And we can get the runtime memory usage from the NSH free command: + + NuttShell (NSH) NuttX-6.25 + nsh> free + total used free largest + Mem: 14160 3944 10216 10216 + nsh> + + Summary: + + - This slightly tuned NSH example uses 34.2KB of FLASH leaving 93.8KB + of FLASH (72%) free from additional application development. + + I did not do all of the arithmetic, but it appears to me that of this + 34+KB of FLASH usage, probably 20-30% of the FLASH is used by libgcc! + libgcc has gotten very fat! + + - Static SRAM usage is about 1.2KB (<4%). + + - At run time, 10.0KB of SRAM (62%) is still available for additional + applications. Most of the memory used at runtime is allocated I/O + buffers and the stack for the NSH main thread (1.5KB). + + There is probably enough free memroy to support 3 or 4 application + threads in addition to NSH. + + 5. This configurations has support for NSH built-in applications. However, + in the default configuration no built-in applications are enabled. + diff --git a/configs/freedom-kl26z/include/board.h b/configs/freedom-kl26z/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..c498cdd893a07a119bf09a1adf5c14060010a8d6 --- /dev/null +++ b/configs/freedom-kl26z/include/board.h @@ -0,0 +1,270 @@ +/************************************************************************************ + * configs/freedom-kl26z/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_FREEDOME_KL26Z_BOARD_H +#define __CONFIGS_FREEDOME_KL26Z_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The KL26Z has an 8MHz crystal on board */ + +#undef BOARD_EXTCLOCK /* Crystal */ +#define BOARD_XTAL_FREQ 8000000 /* 8MHz crystal frequency (REFCLK) */ +#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator */ + +/* PLL Configuration. + * + * PLL Input frequency: PLLIN = REFCLK / PRDIV0 = 8MHz / 2 = 4MHz + * PLL Output frequency: PLLOUT = PLLIN * VDIV0 = 4Mhz * 24 = 96MHz + * MCGPLLCLK Frequency: MCGPLLCLK = 96MHz + */ + +#define BOARD_PRDIV0 2 /* PLL External Reference Divider */ +#define BOARD_VDIV0 24 /* PLL VCO Divider (frequency multiplier) */ + +#define BOARD_PLLIN_FREQ (BOARD_XTAL_FREQ / BOARD_PRDIV0) +#define BOARD_PLLOUT_FREQ (BOARD_PLLIN_FREQ * BOARD_VDIV0) +#define BOARD_MCGPLLCLK_FREQ BOARD_PLLOUT_FREQ + +/* MCGOUTCLK: MCG output of either IRC, MCGFLLCLK, MCGPLLCLK, or MCG's external + * reference clock that sources the core, system, bus, and flash clock. + * + * MCGOUTCLK = MCGPLLCLK = 96MHz + */ + +#define BOARD_MCGOUTCLK_FREQ BOARD_MCGPLLCLK_FREQ + +/* SIM CLKDIV1 dividers. + * + * Core/system clock + * MCGOUTCLK divided by OUTDIV1, clocks the ARM Cortex-M0+ core + * + * Bus clock + * System clock divided by OUTDIV4, clocks the bus slaves and peripherals. + */ + +#define BOARD_OUTDIV1 2 /* Core/system = MCGOUTCLK / 2, 48MHz */ +#define BOARD_OUTDIV4 2 /* Bus clock = System clock / 2, 24MHz */ + +#define BOARD_CORECLK_FREQ (BOARD_MCGOUTCLK_FREQ / BOARD_OUTDIV1) +#define BOARD_BUSCLK_FREQ (BOARD_CORECLK_FREQ / BOARD_OUTDIV4) + +/* SDHC clocking ********************************************************************/ + +/* SDCLK configurations corresponding to various modes of operation. Formula is: + * + * SDCLK frequency = (base clock) / (prescaler * divisor) + * + * The SDHC module is always configure configured so that the core clock is the base + * clock. + */ + +/* Identification mode: 400KHz = 96MHz / ( 16 * 15) */ + +#define BOARD_SDHC_IDMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16 +#define BOARD_SDHC_IDMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15) + +/* MMC normal mode: 16MHz = 96MHz / (2 * 3) */ + +#define BOARD_SDHC_MMCMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +#define BOARD_SDHC_MMCMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) + +/* SD normal mode (1-bit): 16MHz = 96MHz / (2 * 3) */ + +#define BOARD_SDHC_SD1MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +#define BOARD_SDHC_SD1MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) + +/* SD normal mode (4-bit): 24MHz = 96MHz / (2 * 2) (with DMA) + * SD normal mode (4-bit): 16MHz = 96MHz / (2 * 3) (no DMA) + */ + +#ifdef CONFIG_SDIO_DMA +# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(2) +#else +//# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +//# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) +# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16 +# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15) +#endif + +/* PWM Configuration */ +/* TPM0 Channels */ + +#define GPIO_TPM0_CH0OUT PIN_TPM0_CH0_3 //PIN_TPM0_CH0_1 +#define GPIO_TPM0_CH1OUT PIN_TPM0_CH1_1 +#define GPIO_TPM0_CH2OUT PIN_TPM0_CH2_1 +#define GPIO_TPM0_CH3OUT PIN_TPM0_CH3_1 +#define GPIO_TPM0_CH4OUT PIN_TPM0_CH4_1 +#define GPIO_TPM0_CH5OUT PIN_TPM0_CH5_1 + +/* TPM1 Channels */ + +#define GPIO_TPM1_CH0OUT PIN_TPM1_CH0_1 +#define GPIO_TPM1_CH1OUT PIN_TPM1_CH1_1 + +/* TPM2 Channels */ + +#define GPIO_TPM2_CH0OUT PIN_TPM2_CH0_1 +#define GPIO_TPM2_CH1OUT PIN_TPM2_CH1_1 + +/* LED definitions ******************************************************************/ +/* The Freedom KL26Z has a single RGB LED driven by the KL26Z as follows: + * + * ------------- -------- + * RGB LED KL26Z128 + * ------------- -------- + * Red Cathode PTBE29 + * Green Cathode PTE31 + * Blue Cathode PTD5 + * + * NOTE: PTD5 is also connected to the I/O header on J2 pin 12 (also known as D13). + * + * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board the + * Freedom KL26Z. The following definitions describe how NuttX controls the LEDs: + * + * SYMBOL Meaning LED state + * Initially all LED is OFF + * ------------------- ----------------------- -------------------------- + * LED_STARTED NuttX has been started R=OFF G=OFF B=OFF + * LED_HEAPALLOCATE Heap has been allocated (no change) + * LED_IRQSENABLED Interrupts enabled (no change) + * LED_STACKCREATED Idle stack created R=OFF G=OFF B=ON + * LED_INIRQ In an interrupt (no change) + * LED_SIGNAL In a signal handler (no change) + * LED_ASSERTION An assertion failed (no change) + * LED_PANIC The system has crashed R=FLASHING G=OFF B=OFF + * LED_IDLE K26Z1XX is in sleep mode (Optional, not used) + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/* Button definitions ***************************************************************/ +/* The Freedom KL26Z board has no standard GPIO contact buttons */ + +/* Alternative pin resolution *******************************************************/ +/* If there are alternative configurations for various pins in the k26z128_pinmux.h + * header file, those alternative pins will be labeled with a suffix like _1, _2, + * etc. The logic in this file must select the correct pin configuration for the + * board by defining a pin configuration (with no suffix) that maps to the correct + * alternative. + */ + +/* SPI0 Pinout + * =========== + * + * SCK = PTD1 (D13 at connector J2 pin 12 of Freedom Board) + * MISO = PTD3 (D12 at connector J2 pin 10 of Freedom Board) + * MOSI = PTD2 (D11 at connector J2 pin 8 of Freedom Board) + */ + +#define PIN_SPI0_SCK (PIN_SPI0_SCK_3 | PIN_ALT2_PULLUP) +#define PIN_SPI0_MISO (PIN_SPI0_MISO_6 | PIN_ALT2_PULLUP) +#define PIN_SPI0_MOSI (PIN_SPI0_MOSI_5 | PIN_ALT2_PULLUP) + +#define PIN_SPI1_SCK (PIN_SPI1_SCK_2 | PIN_ALT2_PULLUP) +#define PIN_SPI1_MISO (PIN_SPI1_MISO_3 | PIN_ALT2_PULLUP) +#define PIN_SPI1_MOSI (PIN_SPI0_MOSI_7 | PIN_ALT2_PULLUP) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: kl_boardinitialize + * + * Description: + * All Kinetis L architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void kl_boardinitialize(void); + +/************************************************************************************ + * Name: kl_tsi_initialize + * + * Description: + * Initialize the TSI hardware and interface for the sliders on board the Freedom + * KL26Z board. Register a character driver at /dev/tsi that may be used to read + * from each sensor. + * + ************************************************************************************/ + +#ifdef CONFIG_KL_TSI +void kl_tsi_initialize(void); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_FREEDOME_KL26Z_BOARD_H */ diff --git a/configs/freedom-kl26z/minnsh/Make.defs b/configs/freedom-kl26z/minnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..ed7eb039329957e6800e48b16e1d9df363359f28 --- /dev/null +++ b/configs/freedom-kl26z/minnsh/Make.defs @@ -0,0 +1,124 @@ +############################################################################ +# configs/freedom-kl26z/minnsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv6-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/freedom-kl26z/minnsh/defconfig b/configs/freedom-kl26z/minnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..74c11f304a584b870e8ee74ba5812c55c3acbdeb --- /dev/null +++ b/configs/freedom-kl26z/minnsh/defconfig @@ -0,0 +1,826 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +CONFIG_MOTOROLA_SREC=y +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +CONFIG_ARCH_CHIP_KL=y +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +CONFIG_ARCH_CORTEXM0=y +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv6-m" +CONFIG_ARCH_CHIP="kl" +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARCH_HAVE_FPU is not set + +# +# ARMV6M Configuration Options +# +# CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_GPIO_IRQ is not set + +# +# Kinetis Configuration Options +# +# CONFIG_ARCH_CHIP_MKL25Z128 is not set +CONFIG_ARCH_CHIP_MKL26Z128=y +CONFIG_ARCH_FAMILY_KL2X=y + +# +# Kinetis Peripheral Support +# +# CONFIG_KL_TRACE is not set +# CONFIG_KL_FLEXBUS is not set +CONFIG_KL_UART0=y +# CONFIG_KL_UART1 is not set +# CONFIG_KL_UART2 is not set +# CONFIG_KL_FLEXCAN0 is not set +# CONFIG_KL_FLEXCAN1 is not set +CONFIG_KL_SPI0=y +CONFIG_KL_SPI1=y +# CONFIG_KL_SPI2 is not set +# CONFIG_KL_I2C0 is not set +# CONFIG_KL_I2C1 is not set +# CONFIG_KL_I2S is not set +# CONFIG_KL_DAC0 is not set +# CONFIG_KL_DAC1 is not set +# CONFIG_KL_ADC0 is not set +# CONFIG_KL_ADC1 is not set +# CONFIG_KL_CMP is not set +# CONFIG_KL_VREF is not set +# CONFIG_KL_TPM0 is not set +# CONFIG_KL_TPM1 is not set +# CONFIG_KL_TPM2 is not set +# CONFIG_KL_LPTIMER is not set +# CONFIG_KL_RTC is not set +# CONFIG_KL_EWM is not set +# CONFIG_KL_CMT is not set +# CONFIG_KL_USBOTG is not set +# CONFIG_KL_USBDCD is not set +# CONFIG_KL_LLWU is not set +# CONFIG_KL_TSI is not set +# CONFIG_KL_FTFL is not set +# CONFIG_KL_DMA is not set +# CONFIG_KL_CRC is not set +# CONFIG_KL_PDB is not set +# CONFIG_KL_PIT is not set +CONFIG_KL_SYSTICK_CORECLK=y +# CONFIG_KL_SYSTICK_CORECLK_DIV16 is not set + +# +# Kinetis GPIO Interrupt Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=2988 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x1FFFF000 +CONFIG_RAM_SIZE=16384 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_FREEDOM_KL25Z is not set +CONFIG_ARCH_BOARD_FREEDOM_KL26Z=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="freedom-kl26z" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +CONFIG_FDCLONE_DISABLE=y +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=0 +CONFIG_NFILE_STREAMS=0 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Work Queue Support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1536 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +# CONFIG_DEV_NULL is not set +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +# CONFIG_NSH_DISABLE_CAT is not set +CONFIG_NSH_DISABLE_CD=y +CONFIG_NSH_DISABLE_CP=y +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +CONFIG_NSH_DISABLE_MKDIR=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +CONFIG_NSH_DISABLE_MOUNT=y +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +CONFIG_NSH_DISABLE_RM=y +CONFIG_NSH_DISABLE_RMDIR=y +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_UMOUNT=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=64 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# CU Minimal Terminal +# +# CONFIG_SYSTEM_CUTERM is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# Temperature +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/freedom-kl26z/minnsh/setenv.sh b/configs/freedom-kl26z/minnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..755c02b4b6b8c3359c3dc706109574f92a543dcd --- /dev/null +++ b/configs/freedom-kl26z/minnsh/setenv.sh @@ -0,0 +1,71 @@ +#!/bin/bash +# configs/freedom-kl26z/minnsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/freedom-kl26z/nsh/Make.defs b/configs/freedom-kl26z/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..2b9689badcf39be8119c85f0d4317b1a3d2f2f41 --- /dev/null +++ b/configs/freedom-kl26z/nsh/Make.defs @@ -0,0 +1,124 @@ +############################################################################ +# configs/freedom-kl26z/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv6-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/freedom-kl26z/nsh/defconfig b/configs/freedom-kl26z/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ec69cb5241e27e6539af245d95ac5f9eab4bbd9f --- /dev/null +++ b/configs/freedom-kl26z/nsh/defconfig @@ -0,0 +1,759 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +CONFIG_MOTOROLA_SREC=y +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +CONFIG_ARCH_CHIP_KL=y +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +CONFIG_ARCH_CORTEXM0=y +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv6-m" +CONFIG_ARCH_CHIP="kl" +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set + +# +# ARMV6M Configuration Options +# +# CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_GPIO_IRQ is not set + +# +# Kinetis Configuration Options +# +# CONFIG_ARCH_CHIP_MKL25Z128 is not set +CONFIG_ARCH_CHIP_MKL26Z128=y +CONFIG_ARCH_FAMILY_KL2X=y + +# +# Kinetis Peripheral Support +# +# CONFIG_KL_TRACE is not set +# CONFIG_KL_FLEXBUS is not set +CONFIG_KL_UART0=y +# CONFIG_KL_UART1 is not set +# CONFIG_KL_UART2 is not set +# CONFIG_KL_FLEXCAN0 is not set +# CONFIG_KL_FLEXCAN1 is not set +# CONFIG_KL_SPI0 is not set +# CONFIG_KL_SPI1 is not set +# CONFIG_KL_SPI2 is not set +# CONFIG_KL_I2C0 is not set +# CONFIG_KL_I2C1 is not set +# CONFIG_KL_I2S is not set +# CONFIG_KL_DAC0 is not set +# CONFIG_KL_DAC1 is not set +# CONFIG_KL_ADC0 is not set +# CONFIG_KL_ADC1 is not set +# CONFIG_KL_CMP is not set +# CONFIG_KL_VREF is not set +CONFIG_KL_TPM0=y +# CONFIG_KL_TPM1 is not set +# CONFIG_KL_TPM2 is not set +# CONFIG_KL_LPTIMER is not set +# CONFIG_KL_RTC is not set +# CONFIG_KL_EWM is not set +# CONFIG_KL_CMT is not set +# CONFIG_KL_USBOTG is not set +# CONFIG_KL_USBDCD is not set +# CONFIG_KL_LLWU is not set +# CONFIG_KL_TSI is not set +# CONFIG_KL_FTFL is not set +# CONFIG_KL_DMA is not set +# CONFIG_KL_CRC is not set +# CONFIG_KL_PDB is not set +# CONFIG_KL_PIT is not set +CONFIG_KL_SYSTICK_CORECLK=y +# CONFIG_KL_SYSTICK_CORECLK_DIV16 is not set +CONFIG_KL_TPM0_PWM=y +CONFIG_KL_TPM0_CHANNEL=0 + +# +# Kinetis GPIO Interrupt Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=2988 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x1FFFF000 +CONFIG_RAM_SIZE=16384 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_FREEDOM_KL26Z=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="freedom-kl26z" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=6 +CONFIG_NFILE_STREAMS=6 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1536 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +CONFIG_PWM=y +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +CONFIG_EXAMPLES_PWM=y +CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm0" +CONFIG_EXAMPLES_PWM_FREQUENCY=100 +CONFIG_EXAMPLES_PWM_DUTYPCT=50 +CONFIG_EXAMPLES_PWM_DURATION=5 +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +CONFIG_NSH_DISABLE_CD=y +CONFIG_NSH_DISABLE_CP=y +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +CONFIG_NSH_DISABLE_MKDIR=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +CONFIG_NSH_DISABLE_MOUNT=y +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +CONFIG_NSH_DISABLE_RM=y +CONFIG_NSH_DISABLE_RMDIR=y +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_UMOUNT=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=64 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/freedom-kl26z/nsh/setenv.sh b/configs/freedom-kl26z/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..1b867bb765cdd46c6c14f34e9a7061d2098de9a4 --- /dev/null +++ b/configs/freedom-kl26z/nsh/setenv.sh @@ -0,0 +1,71 @@ +#!/bin/bash +# configs/freedom-kl26z/nsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/freedom-kl26z/scripts/ld.script b/configs/freedom-kl26z/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..694bc1e2ba8285b226a2b9861667048749d97d05 --- /dev/null +++ b/configs/freedom-kl26z/scripts/ld.script @@ -0,0 +1,134 @@ +/**************************************************************************** + * configs/freedom-kl26z/scripts/ld.script + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The MKL26Z128 has 128Kb of FLASH beginning at address 0x00000000 and + * 16Kb of SRAM at address 0x1ffff000. + */ + +MEMORY +{ + vectflash (rx) : ORIGIN = 0x00000000, LENGTH = 0x00c0 + cfmprotect (rx) : ORIGIN = 0x00000400, LENGTH = 0x10 + progflash (rx) : ORIGIN = 0x00000410, LENGTH = 128K - 0x410 + datasram (rwx) : ORIGIN = 0x1ffff000, LENGTH = 16K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +EXTERN(_cfmconfig) +ENTRY(_stext) +SECTIONS +{ + .vectors : { + _svectors = ABSOLUTE(.); + *(.vectors) + _evectors = ABSOLUTE(.); + } > vectflash + + .cfmprotect : { + *(.cfmconfig) + } > cfmprotect + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progflash + + .ARM.extab : { + *(.ARM.extab*) + } > progflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progflash + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datasram AT > progflash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > datasram AT > progflash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datasram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/freedom-kl26z/src/.gitignore b/configs/freedom-kl26z/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/freedom-kl26z/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/freedom-kl26z/src/Makefile b/configs/freedom-kl26z/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..863bf745718774edbf91c6cd67750cef6d1beae2 --- /dev/null +++ b/configs/freedom-kl26z/src/Makefile @@ -0,0 +1,65 @@ +############################################################################ +# configs/freedom-kl26z/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = kl_boardinitialize.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += kl_appinit.c +endif + +ifeq ($(CONFIG_KL_TSI),y) +CSRCS += kl_tsi.c +endif + +ifeq ($(CONFIG_KL_SPI0),y) +CSRCS += kl_spi.c +else +ifeq ($(CONFIG_KL_SPI1),y) +CSRCS += kl_spi.c +endif +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += kl_led.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += kl_pwm.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/freedom-kl26z/src/freedom-kl26z.h b/configs/freedom-kl26z/src/freedom-kl26z.h new file mode 100644 index 0000000000000000000000000000000000000000..053101db5b92447d8819687bb23e1b0cf71ac804 --- /dev/null +++ b/configs/freedom-kl26z/src/freedom-kl26z.h @@ -0,0 +1,140 @@ +/**************************************************************************************************** + * configs/freedom-kl26z/src/freedom-kl26z.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __CONFIGS_FREEDOM_KL26Z_SRC_FREEDOM_KL26Z_H +#define __CONFIGS_FREEDOM_KL26Z_SRC_FREEDOM_KL26Z_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include +#include + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ +/* Configuration ************************************************************************************/ + +/* Freedom KL26Z GPIOs ******************************************************************************/ +/* The Freedom KL26Z has a single RGB LED driven by the KL26Z as follows: + * + * ------------- -------- + * RGB LED KL26Z128 + * ------------- -------- + * Red Cathode PTE29 + * Green Cathode PTE31 + * Blue Cathode PTD5 + * + * NOTE: PTD5 is also connected to the I/O header on J2 pin 12 (also known as D13). + * + * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board the + * Freedom KL26Z. The following definitions describe how NuttX controls the LEDs: + * + * SYMBOL Meaning LED state + * Initially all LED is OFF + * ------------------- ----------------------- -------------------------- + * LED_STARTED NuttX has been started + * LED_HEAPALLOCATE Heap has been allocated + * LED_IRQSENABLED Interrupts enabled + * LED_STACKCREATED Idle stack created + * LED_INIRQ In an interrupt + * LED_SIGNAL In a signal handler + * LED_ASSERTION An assertion failed + * LED_PANIC The system has crashed + * LED_IDLE K26Z1XX is in sleep mode (Optional, not used) + */ + +#define GPIO_LED_R (GPIO_OUTPUT | GPIO_OUTPUT_ONE | PIN_PORTE | PIN29) +#define GPIO_LED_G (GPIO_OUTPUT | GPIO_OUTPUT_ONE | PIN_PORTE | PIN31) +#define GPIO_LED_B (GPIO_OUTPUT | GPIO_OUTPUT_ONE | PIN_PORTD | PIN5) + +/* Button definitions *******************************************************************************/ +/* The Freedom KL26Z has no buttons */ + +/* Chip selects ************************************************************************************/ + +/**************************************************************************************************** + * Public Types + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +/**************************************************************************************************** + * Name: kl_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Freedom KL26Z board. + * + ****************************************************************************************************/ + +void weak_function kl_spidev_initialize(void); + +/**************************************************************************************************** + * Name: kl_usbinitialize + * + * Description: + * Called from kl_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the Freedom KL26Z board. + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_USB +void weak_function kl_usbinitialize(void); +#endif + +/**************************************************************************************************** + * Name: kl_led_initialize + * + * Description: + * Initialize the on-board LED + * + ****************************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void kl_led_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_FREEDOM_KL26Z_SRC_FREEDOM_KL26Z_H */ diff --git a/configs/freedom-kl26z/src/kl_appinit.c b/configs/freedom-kl26z/src/kl_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..c4e5ad7d4242beee9f65fa1685a095e6988c9b94 --- /dev/null +++ b/configs/freedom-kl26z/src/kl_appinit.c @@ -0,0 +1,71 @@ +/**************************************************************************** + * config/stm32f4discovery/src/kl_appinit.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#ifdef CONFIG_LIB_BOARDCTL + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + return OK; +} + +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/configs/freedom-kl26z/src/kl_boardinitialize.c b/configs/freedom-kl26z/src/kl_boardinitialize.c new file mode 100644 index 0000000000000000000000000000000000000000..4d80f64591b8812c5a5253fe2e81775cd156d2f3 --- /dev/null +++ b/configs/freedom-kl26z/src/kl_boardinitialize.c @@ -0,0 +1,130 @@ +/************************************************************************************ + * configs/freedom-kl26z/src/up_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "freedom-kl26z.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kl_boardinitialize + * + * Description: + * All K25Z architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void kl_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * kl_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1) + if (kl_spidev_initialize) + { + kl_spidev_initialize(); + } +#endif + + /* Initialize USB if the 1) USB device controller is in the configuration + * and 2) disabled, and 3) the weak function kl_usbinitialize() has been + * brought into the build. Presumably either CONFIG_USBHOST or + * CONFIG_USBDEV is also selected. + */ + +#ifdef CONFIG_KL_USBOTG + if (kl_usbinitialize) + { + kl_usbinitialize(); + } +#endif + + /* Configure on-board LED if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + kl_led_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intitialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + (void)board_app_initialize(); +#endif +} +#endif diff --git a/configs/freedom-kl26z/src/kl_led.c b/configs/freedom-kl26z/src/kl_led.c new file mode 100644 index 0000000000000000000000000000000000000000..a729917dca471b3e302ec79c28fff097256d76ad --- /dev/null +++ b/configs/freedom-kl26z/src/kl_led.c @@ -0,0 +1,169 @@ +/**************************************************************************** + * configs/freedom-kl26z/src/kl_led.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* The Freedom KL26Z has a single RGB LED driven by the KL26Z as follows: + * + * ------------- -------- + * RGB LED KL26Z128 + * ------------- -------- + * Red Cathode PTE29 + * Green Cathode PTE31 + * Blue Cathode PTD5 + * + * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board the + * Freedom KL26Z. The following definitions describe how NuttX controls the LEDs: + * + * SYMBOL Meaning LED state + * Initially all LED is OFF + * ------------------- ----------------------- -------------------------- + * LED_STARTED NuttX has been started R=OFF G=OFF B=OFF + * LED_HEAPALLOCATE Heap has been allocated (no change) + * LED_IRQSENABLED Interrupts enabled (no change) + * LED_STACKCREATED Idle stack created R=OFF G=OFF B=ON + * LED_INIRQ In an interrupt (no change) + * LED_SIGNAL In a signal handler (no change) + * LED_ASSERTION An assertion failed (no change) + * LED_PANIC The system has crashed R=FLASHING G=OFF B=OFF + * LED_IDLE K26Z1XX is in sleep mode (Optional, not used) + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "kl_gpio.h" +#include "freedom-kl26z.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS) +# define led_dumpgpio(m) kl_dumpgpio(GPIO_LED_B, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: kl_led_initialize + * + * Description: + * Initialize the on-board LED + * + ****************************************************************************/ + +void kl_led_initialize(void) +{ + kl_configgpio(GPIO_LED_R); + kl_configgpio(GPIO_LED_G); + kl_configgpio(GPIO_LED_B); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led == LED_STACKCREATED) + { + kl_gpiowrite(GPIO_LED_R, true); + kl_gpiowrite(GPIO_LED_G, true); + kl_gpiowrite(GPIO_LED_B, false); + } + else if (led == LED_PANIC) + { + kl_gpiowrite(GPIO_LED_R, false); + kl_gpiowrite(GPIO_LED_G, true); + kl_gpiowrite(GPIO_LED_B, true); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == LED_PANIC) + { + kl_gpiowrite(GPIO_LED_R, true); + kl_gpiowrite(GPIO_LED_G, true); + kl_gpiowrite(GPIO_LED_B, true); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/freedom-kl26z/src/kl_pwm.c b/configs/freedom-kl26z/src/kl_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..4faf9cabe8d07eb233c51392ce607091be9cb42e --- /dev/null +++ b/configs/freedom-kl26z/src/kl_pwm.c @@ -0,0 +1,122 @@ +/************************************************************************************ + * configs/freedom-kl26z/src/kl_pwm.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "kl_pwm.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* PWM + * + * The Kinetis Freedom board provides a LED on GPIO. + */ + +#ifdef CONFIG_PWM + +extern struct pwm_lowerhalf_s *kl_pwminitialize(int timer); + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All Kinetis KL architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call kl_pwminitialize() to get an instance of the PWM interface */ + + pwm = kl_pwminitialize(0); + if (!pwm) + { + adbg("Failed to get the KL26 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/freedom-kl26z/src/kl_spi.c b/configs/freedom-kl26z/src/kl_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..21d4052e82b616b6bb7259a107b6cc7dd16bfe3d --- /dev/null +++ b/configs/freedom-kl26z/src/kl_spi.c @@ -0,0 +1,233 @@ +/**************************************************************************** + * configs/freedom-kl26z/src/kl_spi.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "kl_gpio.h" +#include "kl_spi.h" +#include "freedom-kl26z.h" + +#if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: kl_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the FRDM-KL26Z board. + * + ****************************************************************************/ + +void weak_function kl_spidev_initialize(void) +{ + /* Configure SPI0 chip selects */ + +#ifdef CONFIG_KL_SPI0 +#endif + + /* Configure SPI1 chip selects */ + +#ifdef CONFIG_KL_SPI1 +#endif +} + +/**************************************************************************** + * Name: kl_spi[n]select, kl_spi[n]status, and kl_spi[n]cmddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * are implementations of the select, status, and cmddata methods of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All + * other methods including kl_spibus_initialize()) are provided by common + * Kinetis logic. To use this common SPI logic on your board: + * + * 1. Provide logic in kl_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide kl_spi[n]select() and kl_spi[n]status() functions + * in your board-specific logic. These functions will perform chip + * selection and status operations using GPIOs in the way your board + * is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * kl_spi[n]cmddata() functions in your board-specific logic. These + * functions will perform cmd/data selection operations using GPIOs in + * the way your board is configured. + * 3. Add a call to kl_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by kl_spibus_initialize() may then be used to bind + * the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ +/**************************************************************************** + * Name: kl_spi[n]select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * GPIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the GPIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_KL_SPI0 +void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ + spivdbg("devid: %d CS: %s\n", + (int)devid, selected ? "assert" : "de-assert"); +} +#endif + +#ifdef CONFIG_KL_SPI1 +void kl_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ + spivdbg("devid: %d CS: %s\n", + (int)devid, selected ? "assert" : "de-assert"); +} +#endif + +/**************************************************************************** + * Name: kl_spi[n]status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef CONFIG_KL_SPI0 +uint8_t kl_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_KL_SPI1 +uint8_t kl_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: kl_spi[n]cmddata + * + * Description: + * Some SPI interfaces, particularly with LCDs, and an auxiliary 9th data + * input that determines where the other 8 data bits represent command or + * data. These interfaces control that CMD/DATA GPIO output + * + * Input Parameters: + * devid - Identifies the (logical) device + * cmd - Determines where command or data should be selected. + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_KL_SPI0 +int kl_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return 0; +} +#endif + +#ifdef CONFIG_KL_SPI1 +int kl_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return 0; +} +#endif +#endif + +#endif /* CONFIG_KL_SPI */ diff --git a/configs/freedom-kl26z/src/kl_tsi.c b/configs/freedom-kl26z/src/kl_tsi.c new file mode 100644 index 0000000000000000000000000000000000000000..95392082e0bb91ed44de9962ade3658e1983c7b8 --- /dev/null +++ b/configs/freedom-kl26z/src/kl_tsi.c @@ -0,0 +1,261 @@ +/**************************************************************************** + * configs/freedom-kl26z/src/kl_tsi.c + * + * Copyright (C) 2013 Alan Carvalho de Assis + * Author: Alan Carvalho de Assis + * with adaptations from Gregory Nutt + * + * Reference: https://community.freescale.com/community/ + * the-embedded-beat/blog/2012/10/15/ + * using-the-touch-interface-on-the-freescale-freedom-development-platform + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "up_arch.h" +#include "kl_gpio.h" +#include "chip/kl_tsi.h" +#include "chip/kl_pinmux.h" +#include "chip/kl_sim.h" + +#ifdef CONFIG_KL_TSI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* The touchpad on the Freedom KL26Z board connects to the MCU via: + * + * PTB16 TWI0_CH9 + * PTB17 TSI0_CH10 + */ + +#define NSENSORS 2 + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void tsi_calibrate(void); +static ssize_t tsi_read(FAR struct file *filep, FAR char *buffer, size_t buflen); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static uint16_t g_defcap[NSENSORS]; /* Default capacitance for each sensor */ +static uint16_t g_currdelta = 0; /* Current delta for the current button */ +static uint8_t g_channel = 0; /* Current g_channel */ + +/* Channel assigned to each sensor */ + +static uint8_t const g_chsensor[NSENSORS] = { 9, 10 }; + +/* Character driver operations */ + +static const struct file_operations tsi_ops = +{ + 0, /* open */ + 0, /* close */ + tsi_read, /* read */ + 0, /* write */ + 0, /* seek */ + 0, /* ioctl */ +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tsi_calibrate + ****************************************************************************/ + +static void tsi_calibrate(void) +{ + uint32_t regval; + int i; + + for (i = 0; i < NSENSORS; i++) + { + /* Clear end of scan flag */ + + regval = getreg32(KL_TSI_GENCS); + regval |= TSI_GENCS_EOSF; + putreg32(regval, KL_TSI_GENCS); + + /* Scan the next electrode */ + + regval = TSI_DATA_TSICH(g_chsensor[i]); + putreg32(regval, KL_TSI_DATA); + + regval |= TSI_DATA_SWTS; + putreg32(regval, KL_TSI_DATA); + + /* Wait until the conversion is done */ + + while (!(getreg32(KL_TSI_GENCS) & TSI_GENCS_EOSF)); + + g_defcap[i] = getreg32(KL_TSI_DATA) & TSI_DATA_TSICNT_MASK; + ivdbg("Sensor %d = %d\n", i+1, g_defcap[i]); + } +} + +/**************************************************************************** + * Name: tsi_read + ****************************************************************************/ + +static ssize_t tsi_read(FAR struct file *filep, FAR char *buf, size_t buflen) +{ + static int deltacap = 0; + uint32_t regval; + + if (buf == NULL || buflen < 1) + { + /* Well... nothing to do */ + + return -EINVAL; + } + + deltacap = 0; + + /* Clear end of scan flag */ + + regval = getreg32(KL_TSI_GENCS); + regval |= TSI_GENCS_EOSF; + putreg32(regval, KL_TSI_GENCS); + + /* Scan the next electrode */ + + regval = TSI_DATA_TSICH(g_chsensor[g_channel]); + putreg32(regval, KL_TSI_DATA); + + regval |= TSI_DATA_SWTS; + putreg32(regval, KL_TSI_DATA); + + /* Wait until the conversion is done*/ + + while (!(getreg32(KL_TSI_GENCS) & TSI_GENCS_EOSF)); + + /* Compute delta using calibration reference counts */ + + deltacap = getreg32(KL_TSI_DATA) & TSI_DATA_TSICNT_MASK; + deltacap -= g_defcap[g_channel]; + + if (deltacap < 0) + { + deltacap = 0; + } + + g_currdelta = (uint16_t)deltacap; + + ivdbg("Delta for g_channel %d = %d\n", g_channel, g_currdelta); + + buf[0] = g_currdelta & 0xff; + buf[1] = (g_currdelta & 0xff00) >> 8; + buf[2] = g_channel; + + /* Increment the channel index to sample the next sensor on the next timer + * that read() is called. + */ + + g_channel++; + if (g_channel >= NSENSORS) + { + g_channel = 0; + } + + return 3; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: kl_tsi_initialize + * + * Description: + * Initialize the TSI hardware and interface for the sliders on board the + * Freedom KL26Z board. Register a character driver at /dev/tsi that may + * be used to read from each sensor. + * + ****************************************************************************/ + +void kl_tsi_initialize(void) +{ + uint32_t regval; + + /* Enable access to the TSI module */ + + regval = getreg32(KL_SIM_SCGC5); + regval |= SIM_SCGC5_TSI; + putreg32(regval, KL_SIM_SCGC5); + + /* Configure PINs used on TSI */ + + kl_configgpio(PIN_TSI0_CH9); + kl_configgpio(PIN_TSI0_CH10); + + /* Configure TSI parameter */ + + regval = getreg32(KL_TSI_GENCS); + regval |= TSI_GENCS_MODE_CAPSENSING | TSI_GENCS_REFCHRG_8UA | + TSI_GENCS_DVOLT_1p03V | TSI_GENCS_EXTCHRG_64A | + TSI_GENCS_PS_DIV16 | TSI_GENCS_NSCN_TIMES(12) | TSI_GENCS_STPE; + putreg32(regval, KL_TSI_GENCS); + + /* Only after setting TSI we should enable it */ + + regval = getreg32(KL_TSI_GENCS); + regval |= TSI_GENCS_TSIEN; + putreg32(regval, KL_TSI_GENCS); + + /* Calibrate it before to use */ + + tsi_calibrate(); + + /* And finally register the TSI character driver */ + + (void)register_driver("/dev/tsi", &tsi_ops, 0444, NULL); +} + +#endif /* CONFIG_KL_TSI */ diff --git a/configs/hymini-stm32v/Kconfig b/configs/hymini-stm32v/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..5debd4e33ad31db9cfa0e61c0d4db5be4601d9cb --- /dev/null +++ b/configs/hymini-stm32v/Kconfig @@ -0,0 +1,16 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_HYMINI_STM32V + +config LCD_R61505U + bool "LCD Based on R61505U LCD Controller" + default n + depends on NX_LCDDRIVER && !LCD_SSD1289 + ---help--- + Enables HY-Mini STM32v support for any LCD based on the R61505U, + LCD Controller. + +endif diff --git a/configs/hymini-stm32v/README.txt b/configs/hymini-stm32v/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..b808bad2c745863cb845b4f47d488b50c9e44b16 --- /dev/null +++ b/configs/hymini-stm32v/README.txt @@ -0,0 +1,743 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +HY-MiniSTM32V development board. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - ST Bootloader + - LEDs + - RTC + - HY-Mini specific Configuration Options + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +===================== + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. Raisonance GNU toolchain, or + 4. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery, devkitARM or Raisonance GNU toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. You many have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh hymini-stm32v/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh hymini-stm32v/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +ST Bootloader +============= + + A bootloader code is available in an internal boot ROM memory (called + 'system memory' in STM documentation) in all STM32 MCUs. For the F103xx + this bootloader can be used to upload & flash a firmware image through + the USART1. + + Notes: + + - The bootloader is activated by the BOOT0 / BOOT1 pins after a MCU reset. + See STM application note 2606 for more details. + - On the hymini-stm32 board the USART1 is connected to a PL2303 + USB<->serial converter. + + To enter bootloader mode in the hymini-stm32 board: + + - Press the 'boot0' button (located next to 'reset' button) + - While boot0 button is pressed, reset the board through the reset button. + - Once you pressed / released the 'reset' button, the MCU has (re)started + in bootloader mode (and you can then release the boot0 button). + + A flash utility must be used on your development workstation to upload / flash + a firmware image. (The 'stm32flash' open source tool, available at + http://stm32flash.googlecode.com/ has been used sucessfully). + +LEDs +==== + +The HY-MiniSTM32 board provides only two controlable LEDs labeled LED1 and LED2. +Usage of these LEDs is defined in include/board.h and src/up_leds.c. +They are encoded as follows: + + SYMBOL Meaning LED1* LED2 + ------------------- ----------------------- ------- ------- + LED_STARTED NuttX has been started OFF OFF + LED_HEAPALLOCATE Heap has been allocated ON OFF + LED_IRQSENABLED Interrupts enabled OFF ON + LED_STACKCREATED Idle stack created ON OFF + LED_INIRQ In an interrupt** OFF N/C + LED_SIGNAL In a signal handler*** N/C ON + LED_ASSERTION An assertion failed ON ON + LED_PANIC The system has crashed BLINK BLINK + LED_IDLE STM32 is is sleep mode (Optional, not used) + + * If Nuttx starts correctly, normal state is to have LED1 on and LED2 off. + ** LED1 is turned off during interrupt. +*** LED2 is turned on during signal handler. + +RTC +=== + + The STM32 RTC may configured using the following settings. + + CONFIG_RTC - Enables general support for a hardware RTC. Specific + architectures may require other specific settings. + CONFIG_RTC_HIRES - The typical RTC keeps time to resolution of 1 + second, usually supporting a 32-bit time_t value. In this case, + the RTC is used to "seed" the normal NuttX timer and the + NuttX timer provides for higher resoution time. If CONFIG_RTC_HIRES + is enabled in the NuttX configuration, then the RTC provides higher + resolution time and completely replaces the system timer for purpose of + date and time. + CONFIG_RTC_FREQUENCY - If CONFIG_RTC_HIRES is defined, then the + frequency of the high resolution RTC must be provided. If CONFIG_RTC_HIRES + is not defined, CONFIG_RTC_FREQUENCY is assumed to be one. + CONFIG_RTC_ALARM - Enable if the RTC hardware supports setting of an alarm. + A callback function will be executed when the alarm goes off + + In hi-res mode, the STM32 RTC operates only at 16384Hz. Overflow interrupts + are handled when the 32-bit RTC counter overflows every 3 days and 43 minutes. + A BKP register is incremented on each overflow interrupt creating, effectively, + a 48-bit RTC counter. + + In the lo-res mode, the RTC operates at 1Hz. Overflow interrupts are not handled + (because the next overflow is not expected until the year 2106. + + WARNING: Overflow interrupts are lost whenever the STM32 is powered down. The + overflow interrupt may be lost even if the STM32 is powered down only momentarily. + Therefore hi-res solution is only useful in systems where the power is always on. + +HY-Mini specific Configuration Options +============================================ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32F103VC + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=hymini-stm32v (for the HY-Mini development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_HYMINI_STM32V=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x0000C000 (48Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + AHB + --- + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + CONFIG_STM32_CRC + CONFIG_STM32_FSMC + CONFIG_STM32_SDIO + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 (required for PWM control of LCD backlight) + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_IWDG + CONFIG_STM32_WWDG + CONFIG_STM32_IWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI4 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_USB + CONFIG_STM32_CAN1 + CONFIG_STM32_BKP + CONFIG_STM32_PWR + CONFIG_STM32_DAC + CONFIG_STM32_USB + + APB2 + ---- + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + CONFIG_STM32_TIM1 + CONFIG_STM32_SPI1 + CONFIG_STM32_TIM8 + CONFIG_STM32_USART1 + CONFIG_STM32_ADC3 + + Timer and I2C devices may need to the following to force power to be applied + unconditionally at power up. (Otherwise, the device is powered when it is + initialized). + + CONFIG_STM32_FORCEPOWER + + The Timer3 alternate mapping is required for PWM control of LCD backlight + + CONFIG_STM32_TIM3_PARTIAL_REMAP=y + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,8 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,8 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,8, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,8 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,8, m=1,..,2 + + Others alternate pin mappings available: + + CONFIG_STM32_TIM1_FULL_REMAP + CONFIG_STM32_TIM1_PARTIAL_REMAP + CONFIG_STM32_TIM2_FULL_REMAP + CONFIG_STM32_TIM2_PARTIAL_REMAP_1 + CONFIG_STM32_TIM2_PARTIAL_REMAP_2 + CONFIG_STM32_TIM3_FULL_REMAP + CONFIG_STM32_TIM3_PARTIAL_REMAP + CONFIG_STM32_TIM4_REMAP + CONFIG_STM32_USART1_REMAP + CONFIG_STM32_USART2_REMAP + CONFIG_STM32_USART3_FULL_REMAP + CONFIG_STM32_USART3_PARTIAL_REMAP + CONFIG_STM32_SPI1_REMAP + CONFIG_STM32_SPI3_REMAP + CONFIG_STM32_I2C1_REMAP + CONFIG_STM32_CAN1_REMAP1 + CONFIG_STM32_CAN1_REMAP2 + CONFIG_STM32_CAN2_REMAP + + STM32F103V specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + + Note: USART1 is connected to a PL2303 serial to USB converter. + So USART1 is available through USB port labeled CN3 on the board. + + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + + CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO + and CONFIG_STM32_DMA2. + CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. + Default: Medium + CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: + 4-bit transfer mode. + CONFIG_MMCSD_HAVECARDDETECT - Select if SDIO driver card detection + is 100% accurate (it is on the HY-MiniSTM32V) + + HY-MiniSTM32V CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + + HY-MiniSTM32V LCD Hardware Configuration. The HY-Mini board may be delivered with + either an SSD1289 or an R61505U LCD controller. + + CONFIG_LCD_R61505U - Selects the R61505U LCD controller. + CONFIG_LCD_SSD1289 - Selects the SSD1289 LCD controller. + + The following options apply for either LCD controller: + + CONFIG_NX_LCDDRIVER - To be defined to include LCD driver + CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape" + support. In this orientation, the HY-MiniSTM32V's + LCD used connector is at the right of the display. + Default is this 320x240 "landscape" orientation + CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait" + orientation support. In this orientation, the HY-MiniSTM32V's + LCD used connector is at the bottom of the display. Default is + 320x240 "landscape" orientation. + CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse + portrait" orientation support. In this orientation, the + HY-MiniSTM32V's LCD used connector is at the top of the display. + Default is 320x240 "landscape" orientation. + CONFIG_LCD_BACKLIGHT - Define to support an adjustable backlight + using timer 3. The granularity of the settings is determined + by CONFIG_LCD_MAXPOWER. Requires CONFIG_STM32_TIM3. + +Configurations +============== + +NOTES: + + - All configurations described below are using the mconf-based + configuration tool. To change their configuration using that tool, you + should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + - All configurations use a generic GNU EABI toolchain for Linux by + default. + + - They are all configured to generate a binary image that can be flashed + through the STM32 internal bootloader. + +Each HY-MiniSTM32V configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh hymini-stm32v/ + cd - + . ./setenv.sh + +Where is one of the following: + + buttons: + -------- + + Uses apps/examples/buttons to exercise HY-MiniSTM32V buttons and + button interrupts. + + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic GNU EABI toolchain + + nsh and nsh2: + ------------ + Configure the NuttShell (nsh) located at examples/nsh. + + Differences between the two NSH configurations: + + =========== ======================= ================================ + nsh nsh2 + =========== ======================= ================================ + Serial Debug output: USART1 Debug output: USART1 + Console: NSH output: USART1 NSH output: USART1 (2) + ----------- ----------------------- -------------------------------- + microSD Yes (5) Yes (5) + Support + ----------- ----------------------- -------------------------------- + FAT FS CONFIG_FAT_LCNAMES=y CONFIG_FAT_LCNAMES=y + Config CONFIG_FAT_LFN=n CONFIG_FAT_LFN=y (3) + ----------- ----------------------- -------------------------------- + LCD Driver No Yes + Support + ----------- ----------------------- -------------------------------- + RTC Support No Yes + ----------- ----------------------- -------------------------------- + Support for No Yes + Built-in + Apps + ----------- ----------------------- -------------------------------- + Built-in None apps/examples/nx + Apps apps/examples/nxhello + apps/system/usbmsc (4) + apps/examples/buttons + apps/examples/nximage + =========== ======================= ================================ + + (1) You will probably need to modify nsh/setenv.sh or nsh2/setenv.sh + to set up the correct PATH variable for whichever toolchain you + may use. + (2) When any other device other than /dev/console is used for a user + interface, (1) linefeeds (\n) will not be expanded to carriage return + / linefeeds \r\n). You will need to configure your terminal program + to account for this. And (2) input is not automatically echoed so + you will have to turn local echo on. + (3) Microsoft holds several patents related to the design of + long file names in the FAT file system. Please refer to the + details in the top-level COPYING file. Please do not use FAT + long file name unless you are familiar with these patent issues. + (4) When built as an NSH add-on command (CONFIG_NSH_BUILTIN_APPS=y), + Caution should be used to assure that the SD drive is not in use when + the USB storage device is configured. Specifically, the SD driver + should be unmounted like: + + nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard # Card is mounted in NSH + ... + nsh> umount /mnd/sdcard # Unmount before connecting USB!!! + nsh> msconn # Connect the USB storage device + ... + nsh> msdis # Disconnect USB storate device + nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard # Restore the mount + + Failure to do this could result in corruption of the SD card format. + (5) Option CONFIG_NSH_ARCHINIT must be enabled in order to call the SDIO slot + initialization code. + + usbmsc: + ------- + + This configuration directory exercises the USB mass storage + class driver at system/usbmsc. See examples/README.txt for + more information. + + usbnsh: + ------- + + This is another NSH example. If differs from other 'nsh' configurations + in that this configurations uses a USB serial device for console I/O. + + NOTES: + + 1. This configuration does have UART2 output enabled and set up as + the system logging device: + + CONFIG_SYSLOG=y : Enable output to syslog, not console + CONFIG_SYSLOG_CHAR=y : Use a character device for system logging + CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0 + + However, there is nothing to generate SYLOG output in the default + configuration so nothing should appear on UART2 unless you enable + some debug output or enable the USB monitor. + + 2. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB + device will save encoded trace output in in-memory buffer; if the + USB monitor is enabled, that trace buffer will be periodically + emptied and dumped to the system loggin device (UART2 in this + configuraion): + + CONFIG_USBDEV_TRACE=y : Enable USB trace feature + CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory + CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH + CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor + CONFIG_SYSTEM_USBMONITOR=y : Enable the USB monitor daemon + CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size + CONFIG_SYSTEM_USBMONITOR_PRIORITY=50 : USB monitor daemon priority + CONFIG_SYSTEM_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds + + CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y : Enable TRACE output + CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y + CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y + CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y + CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y + + + Using the Prolifics PL2303 Emulation + ------------------------------------ + You could also use the non-standard PL2303 serial device instead of + the standard CDC/ACM serial device by changing: + + CONFIG_CDCACM=y : Disable the CDC/ACM serial device class + CONFIG_CDCACM_CONSOLE=y : The CDC/ACM serial device is NOT the console + CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled + CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console + + usbserial: + --------- + This configuration directory exercises the USB serial class + driver at examples/usbserial. See examples/README.txt for + more information. + + CONFIG_HOST_LINUX=y : Linux host + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery toolchain under Linux + + USB debug output can be enabled as by changing the following + settings in the configuration file: + + -CONFIG_DEBUG=n + -CONFIG_DEBUG_VERBOSE=n + -CONFIG_DEBUG_USB=n + +CONFIG_DEBUG=y + +CONFIG_DEBUG_VERBOSE=y + +CONFIG_DEBUG_USB=y + + -CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=n + -CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=n + -CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=n + -CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=n + -CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=n + +CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=y + +CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=y + +CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=y + +CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=y + +CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=y + + By default, the usbserial example uses the Prolific PL2303 + serial/USB converter emulation. The example can be modified + serial/USB converter emulation. The example can be modified + to use the CDC/ACM serial class by making the following changes + to the configuration file: + + -CONFIG_PL2303=y + +CONFIG_PL2303=n + + -CONFIG_CDCACM=n + +CONFIG_CDCACM=y + + The example can also be converted to use the alternative + USB serial example at apps/examples/usbterm by changing the + following: + + -CONFIG_EXAMPLES_USBSERIAL=y + +CONFIG_EXAMPLES_USBSERIAL=n + + -CONFIG_EXAMPLES_USBTERM=n + +CONFIG_EXAMPLES_USBTERM=y diff --git a/configs/hymini-stm32v/buttons/Make.defs b/configs/hymini-stm32v/buttons/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..47431700b7d7e2e6990cb734526368fcaae684bb --- /dev/null +++ b/configs/hymini-stm32v/buttons/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/hymini-stm32v/buttons/Make.defs +# +# Copyright (C) 2011, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/hymini-stm32v/buttons/defconfig b/configs/hymini-stm32v/buttons/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..edda72f4cffb1944dfebc76cbd22f2b2873f5f80 --- /dev/null +++ b/configs/hymini-stm32v/buttons/defconfig @@ -0,0 +1,999 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +CONFIG_ARCH_CHIP_STM32F103VC=y +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +CONFIG_STM32_JTAG_DISABLE=y +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=49152 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_HYMINI_STM32V=y +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="hymini-stm32v" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=5 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +CONFIG_USER_ENTRYPOINT="buttons_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +CONFIG_BINFMT_DISABLE=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=1 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=1 +CONFIG_EXAMPLES_BUTTONS_NAME0="Key A" +CONFIG_EXAMPLES_BUTTONS_NAME1="Key B" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/hymini-stm32v/buttons/setenv.sh b/configs/hymini-stm32v/buttons/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..df0dba3180365deafc6e9f48a4aa6326eb3c9667 --- /dev/null +++ b/configs/hymini-stm32v/buttons/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/hymini-stm32v/buttons/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/hymini-stm32v/include/board.h b/configs/hymini-stm32v/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..ba55bdecdfad2f44ee07e1794dbd1a03acc86d36 --- /dev/null +++ b/configs/hymini-stm32v/include/board.h @@ -0,0 +1,213 @@ +/************************************************************************************ + * configs/hymini-stm32v/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2011 Laurent Latil. All rights reserved. + * Author: Laurent Latil + * + * Derives, in part, from configs/stm3210e-eval/include/board.h + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* On-board crystal frequency is 8MHz (HSE) */ + +#define STM32_BOARD_XTAL 8000000ul + +/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */ + +#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC +#define STM32_CFGR_PLLXTPRE 0 +#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx9 +#define STM32_PLL_FREQUENCY (9*STM32_BOARD_XTAL) + +/* Use the PLL and set the SYSCLK source to be the PLL */ + +#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL +#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY + +/* AHB clock (HCLK) is SYSCLK (72MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (72MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY + +/* APB2 timers 1 and 8 will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* USB divider -- Divide PLL clock by 1.5 */ + +#define STM32_CFGR_USBPRE 0 + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY + +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz + */ + +#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_SDXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* LED definitions ******************************************************************/ + +/* The board has 2 LEDs that we will encode as: */ +#define LED_STARTED 0 /* No LEDs */ +#define LED_HEAPALLOCATE 1 /* LED1 on */ +#define LED_IRQSENABLED 2 /* LED2 on */ +#define LED_STACKCREATED 3 /* LED1 on */ +#define LED_INIRQ 4 /* LED1 off */ +#define LED_SIGNAL 5 /* LED2 on */ +#define LED_ASSERTION 6 /* LED1 + LED2 */ +#define LED_PANIC 7 /* LED1 / LED2 blinking */ + +/* The board supports two user buttons + * + * KeyA -- Connected to PC.13 + * KeyB -- Connected to PB.2 + */ + +#define BUTTON_KEYA 0 +#define BUTTON_KEYB 1 + +#define NUM_BUTTONS 2 + +#define BUTTON_KEYA_BIT (1 << BUTTON_KEYA) +#define BUTTON_KEYB_BIT (1 << BUTTON_KEYB) + + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/hymini-stm32v/nsh/Make.defs b/configs/hymini-stm32v/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..dd649da9384ed623ab1e34cadb1aa5732ae4e38b --- /dev/null +++ b/configs/hymini-stm32v/nsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/hymini-stm32v/nsh/Make.defs +# +# Copyright (C) 2011, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/hymini-stm32v/nsh/defconfig b/configs/hymini-stm32v/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c968013077c8bacf0f904087de8bb62cd866e440 --- /dev/null +++ b/configs/hymini-stm32v/nsh/defconfig @@ -0,0 +1,1120 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +CONFIG_ARCH_CHIP_STM32F103VC=y +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +CONFIG_STM32_BKP=y +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +CONFIG_STM32_PWR=y +CONFIG_STM32_SDIO=y +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +CONFIG_STM32_JTAG_DISABLE=y +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SDIO Configuration +# +CONFIG_SDIO_DMAPRIO=0x00001000 +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=49152 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_HYMINI_STM32V=y +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="hymini-stm32v" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=5 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_ARCH_HAVE_SDIO=y +CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y +CONFIG_MMCSD_SDIO=y +CONFIG_SDIO_PREFLIGHT=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_SDIO_BLOCKSETUP is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +CONFIG_BINFMT_DISABLE=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/hymini-stm32v/nsh/setenv.sh b/configs/hymini-stm32v/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..a0371cdce403f1a26d0e081ddf27891060ee0fd8 --- /dev/null +++ b/configs/hymini-stm32v/nsh/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/hymini-stm32v/dfu/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/hymini-stm32v/nsh2/Make.defs b/configs/hymini-stm32v/nsh2/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..27b64cc342a317acc48ff927a37b8ad6433773bd --- /dev/null +++ b/configs/hymini-stm32v/nsh2/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/hymini-stm32v/nsh2/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/hymini-stm32v/nsh2/defconfig b/configs/hymini-stm32v/nsh2/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..faabb689b9a32ddd2526198fec776e86a7c7ee3e --- /dev/null +++ b/configs/hymini-stm32v/nsh2/defconfig @@ -0,0 +1,1415 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +CONFIG_ARCH_CHIP_STM32F103VC=y +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +CONFIG_STM32_BKP=y +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +CONFIG_STM32_PWR=y +CONFIG_STM32_SDIO=y +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +CONFIG_STM32_TIM3=y +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_SPI1_REMAP is not set +# CONFIG_STM32_TIM3_NO_REMAP is not set +# CONFIG_STM32_TIM3_FULL_REMAP is not set +CONFIG_STM32_TIM3_PARTIAL_REMAP=y +# CONFIG_STM32_USART1_REMAP is not set +CONFIG_STM32_JTAG_DISABLE=y +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM3_PWM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set + +# +# SDIO Configuration +# +CONFIG_SDIO_DMAPRIO=0x00001000 +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ARCH_USBDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=49152 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_HYMINI_STM32V=y +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="hymini-stm32v" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +CONFIG_BOARDCTL_TSCTEST=y +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +# CONFIG_RTC_DATETIME is not set +# CONFIG_RTC_HIRES is not set +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +CONFIG_INPUT_ADS7843E=y +# CONFIG_ADS7843E_MULTIPLE is not set +CONFIG_ADS7843E_SPIDEV=0 +CONFIG_ADS7843E_DEVMINOR=0 +CONFIG_ADS7843E_SPIMODE=0 +CONFIG_ADS7843E_FREQUENCY=100000 +# CONFIG_ADS7843E_SWAPXY is not set +CONFIG_ADS7843E_THRESHX=12 +CONFIG_ADS7843E_THRESHY=12 +# CONFIG_INPUT_MXT is not set +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=1 +CONFIG_LCD_MAXPOWER=100 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +CONFIG_LCD_SSD1289=y +# CONFIG_SSD1289_PROFILE1 is not set +CONFIG_SSD1289_PROFILE2=y +# CONFIG_SSD1289_PROFILE3 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +CONFIG_ARCH_HAVE_SDIO=y +CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y +CONFIG_MMCSD_SDIO=y +CONFIG_SDIO_PREFLIGHT=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_SDIO_BLOCKSETUP is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +CONFIG_USBDEV_TRACE=y +CONFIG_USBDEV_TRACE_NRECORDS=128 +# CONFIG_USBDEV_TRACE_STRINGS is not set +# CONFIG_USBDEV_TRACE_INITIALIDSET is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +CONFIG_USBMSC=y +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=2 +CONFIG_USBMSC_EPBULKIN=5 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=256 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" +CONFIG_USBMSC_VERSIONNO=0x0399 +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=2048 +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +CONFIG_FS_FATTIME=y +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +CONFIG_NX_XYINPUT_NONE=y +# CONFIG_NX_XYINPUT_MOUSE is not set +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +# CONFIG_NX_KBD is not set + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +CONFIG_NXFONT_SANS28X37B=y +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=1 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=1 +CONFIG_EXAMPLES_BUTTONS_NAME0="Key A" +CONFIG_EXAMPLES_BUTTONS_NAME1="Key B" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=16 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NX_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +CONFIG_EXAMPLES_NXHELLO=y +CONFIG_EXAMPLES_NXHELLO_VPLANE=0 +CONFIG_EXAMPLES_NXHELLO_DEVNO=0 +CONFIG_EXAMPLES_NXHELLO_BPP=16 + +# +# Example Color Configuration +# +CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y + +# +# Example Font Configuration +# +CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y +# CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set +CONFIG_EXAMPLES_NXIMAGE=y +CONFIG_EXAMPLES_NXIMAGE_VPLANE=0 +CONFIG_EXAMPLES_NXIMAGE_DEVNO=0 +CONFIG_EXAMPLES_NXIMAGE_BPP=16 +# CONFIG_EXAMPLES_NXIMAGE_XSCALEp5 is not set +CONFIG_EXAMPLES_NXIMAGE_XSCALE1p0=y +# CONFIG_EXAMPLES_NXIMAGE_XSCALE1p5 is not set +# CONFIG_EXAMPLES_NXIMAGE_XSCALE2p0 is not set +# CONFIG_EXAMPLES_NXIMAGE_YSCALEp5 is not set +CONFIG_EXAMPLES_NXIMAGE_YSCALE1p0=y +# CONFIG_EXAMPLES_NXIMAGE_YSCALE1p5 is not set +# CONFIG_EXAMPLES_NXIMAGE_YSCALE2p0 is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +CONFIG_EXAMPLES_TOUCHSCREEN=y +CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0 +CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0" +# CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE is not set +CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_ROMFSETC is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set + +# +# USB Device Trace Support +# +# CONFIG_NSH_USBDEV_TRACE is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +CONFIG_SYSTEM_USBMSC=y +CONFIG_SYSTEM_USBMSC_NLUNS=1 +CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mmcsd0" +CONFIG_SYSTEM_USBMSC_DEVMINOR2=1 +CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_USBMSC_DEVMINOR3=2 +CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" +# CONFIG_SYSTEM_USBMSC_DEBUGMM is not set +CONFIG_SYSTEM_USBMSC_CMD_STACKSIZE=768 +CONFIG_SYSTEM_USBMSC_CMD_PRIORITY=100 +# CONFIG_SYSTEM_USBMONITOR is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/hymini-stm32v/nsh2/setenv.sh b/configs/hymini-stm32v/nsh2/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..0f98a6e5e121f3c2f12b371298a9ccff0a3f0674 --- /dev/null +++ b/configs/hymini-stm32v/nsh2/setenv.sh @@ -0,0 +1,67 @@ +#!/bin/bash +# configs/hymini-stm32v/nsh2/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/hymini-stm32v/scripts/ld.script b/configs/hymini-stm32v/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..15370f39a2308a667f4baedc2438e8d86fe9db69 --- /dev/null +++ b/configs/hymini-stm32v/scripts/ld.script @@ -0,0 +1,119 @@ +/**************************************************************************** + * configs/hymini-stm32v/scripts/ld.script + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F103VCT6 has 256Kb of FLASH beginning at address 0x0800:0000 and + * 48Kb of SRAM beginning at address 0x2000:0000. When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F103VCT6 has 48Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/hymini-stm32v/src/.gitignore b/configs/hymini-stm32v/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/hymini-stm32v/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/hymini-stm32v/src/Makefile b/configs/hymini-stm32v/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..f4a6dc2603345047a7be11e37a19eba00d0b314d --- /dev/null +++ b/configs/hymini-stm32v/src/Makefile @@ -0,0 +1,66 @@ +############################################################################ +# configs/hymini-stm32v/src/Makefile +# +# Copyright (C) 2009-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Laurent Latil +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_leds.c stm32_buttons.c stm32_spi.c stm32_usbdev.c + +ifeq ($(CONFIG_LCD_SSD1289),y) +CSRCS += stm32_ssd1289.c +else +ifeq ($(CONFIG_LCD_R61505U),y) +CSRCS += stm32_r61505u.c +endif +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_INPUT),y) +CSRCS += stm32_ts.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += stm32_usbmsc.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += stm32_watchdog.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/hymini-stm32v/src/hymini-stm32v.h b/configs/hymini-stm32v/src/hymini-stm32v.h new file mode 100644 index 0000000000000000000000000000000000000000..f821d03465d779b6a762098b1893a3abba7b21cc --- /dev/null +++ b/configs/hymini-stm32v/src/hymini-stm32v.h @@ -0,0 +1,139 @@ +/************************************************************************************ + * configs/hymini-stm32v/src/hymini-stm32v.h + * + * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_HYMINI_STM32V_H +#define __CONFIGS_HYMINI_STM32V_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* How many SPI modules does this chip support? The LM3S6918 supports 2 SPI + * modules (others may support more -- in such case, the following must be + * expanded). + */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +#endif + +/* GPIOs **************************************************************/ +/* LEDs */ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN0) +#define GPIO_LED2 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN1) + +/* BUTTONS -- NOTE that some have EXTI interrupts configured */ + +#define MIN_IRQBUTTON BUTTON_KEYA +#define MAX_IRQBUTTON BUTTON_KEYB +#define NUM_IRQBUTTONS NUM_BUTTONS + +/* Button A is externally pulled up */ +#define GPIO_BTN_KEYA (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_PORTC|GPIO_PIN13) + +/* Button B is externally pulled dw */ +#define GPIO_BTN_KEYB (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_PORTB|GPIO_PIN2) + +/* SPI touch screen (ADS7843) chip select: PA.4 */ + +#define GPIO_TS_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) + +/* Touch screen (ADS7843) IRQ pin: PB.6 */ +#define GPIO_TS_IRQ (GPIO_INPUT|GPIO_CNF_INPULLUP|GPIO_MODE_INPUT|\ + GPIO_PORTB|GPIO_PIN6) + +/* USB Soft Connect Pullup: PB.7 */ +#define GPIO_USB_PULLUP (GPIO_OUTPUT|GPIO_CNF_OUTOD|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN7) + +/* SD card detect pin: PD.3 (line is pulled up on board) */ +#define GPIO_SD_CD (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_PORTD|GPIO_PIN3) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Hy-Mini STM32v board. + * + ************************************************************************************/ + +extern void weak_function stm32_spidev_initialize(void); + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the Hy-Mini STM32v board. + * + ************************************************************************************/ + +extern void weak_function stm32_usbinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_HYMINI_STM32V_H */ + diff --git a/configs/hymini-stm32v/src/stm32_appinit.c b/configs/hymini-stm32v/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..df8adca90702b05b5ec6ac4be5a1157d6832e187 --- /dev/null +++ b/configs/hymini-stm32v/src/stm32_appinit.c @@ -0,0 +1,209 @@ +/**************************************************************************** + * config/hymini-stm32v/src/stm32_appinit.c + * + * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_STM32_SPI1 +# include +# include +#endif + +#ifdef CONFIG_STM32_SDIO +# include +# include +#endif + +#include "stm32.h" +#include "hymini-stm32v.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* For now, don't build in any SPI1 support -- NSH is not using it */ + +#undef CONFIG_STM32_SPI1 + +/* Check if we can have USB device in NSH */ + +#define NSH_HAVEUSBDEV 1 + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/* Check if we can have MMC/SD slot support in NSH */ + +#define NSH_HAVEMMCSD 1 + +/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support + * is not enabled. + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SDIO) +# undef NSH_HAVEMMCSD +#endif + +#ifdef NSH_HAVEMMCSD +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0 +# error "Only one MMC/SD slot" +# undef CONFIG_NSH_MMCSDSLOTNO +# endif +# ifndef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_MMCSD +static FAR struct sdio_dev_s *g_sdiodev; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nsh_cdinterrupt + * + * Description: + * Card detect interrupt handler. + * + ****************************************************************************/ + +#ifdef NSH_HAVEMMCSD +static int nsh_cdinterrupt(int irq, FAR void *context) +{ + static bool inserted = 0xff; /* Impossible value */ + bool present; + + present = !stm32_gpioread(GPIO_SD_CD); + if (present != inserted) + { + sdio_mediachange(g_sdiodev, present); + inserted = present; + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef NSH_HAVEMMCSD + int ret; + + /* Card detect */ + bool cd_status; + + /* Configure the card detect GPIO */ + + stm32_configgpio(GPIO_SD_CD); + + /* Register an interrupt handler for the card detect pin */ + + stm32_gpiosetevent(GPIO_SD_CD, true, true, true, nsh_cdinterrupt); + + /* Mount the SDIO-based MMC/SD block driver */ + + /* First, get an instance of the SDIO interface */ + + syslog(LOG_INFO, "Initializing SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + + g_sdiodev = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!g_sdiodev) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + syslog(LOG_INFO, "Bind SDIO to the MMC/SD driver, minor=%d\n", + CONFIG_NSH_MMCSDMINOR); + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, g_sdiodev); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SDIO to the MMC/SD driver\n"); + + /* Use SD card detect pin to check if a card is inserted */ + + cd_status = !stm32_gpioread(GPIO_SD_CD); + vdbg("Card detect : %hhu\n", cd_status); + + sdio_mediachange(g_sdiodev, cd_status); +#endif + return OK; +} diff --git a/configs/hymini-stm32v/src/stm32_boot.c b/configs/hymini-stm32v/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..4692aae53bc264b80e9e3a0b532951c9258dc7d2 --- /dev/null +++ b/configs/hymini-stm32v/src/stm32_boot.c @@ -0,0 +1,103 @@ +/************************************************************************************ + * configs/hymini-stm32v/src/stm32_boot.c + * + * Copyright (C) 2009, 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "hymini-stm32v.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB) + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/hymini-stm32v/src/stm32_buttons.c b/configs/hymini-stm32v/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..a31b38f923a8f7d743e41d25d762802f34bf0dc3 --- /dev/null +++ b/configs/hymini-stm32v/src/stm32_buttons.c @@ -0,0 +1,147 @@ +/**************************************************************************** + * configs/hymini-stm32v/src/stm32_buttons.c + * + * Copyright (C) 2009, 2011, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "hymini-stm32v.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state of + * all buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) + { + stm32_configgpio(GPIO_BTN_KEYA); + stm32_configgpio(GPIO_BTN_KEYB); + } + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) + { + uint8_t ret = 0; + bool pinValue; + + /* Check that state of each key */ + + /* Pin is pulled up */ + pinValue = stm32_gpioread(GPIO_BTN_KEYA); + if (!pinValue) + { + // Button pressed + ret = 1 << BUTTON_KEYA; + } + + /* Pin is pulled down */ + pinValue = stm32_gpioread(GPIO_BTN_KEYB); + if (pinValue) + { + // Button pressed + ret |= 1 << BUTTON_KEYB; + } + return ret; + } + +/**************************************************************************** + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state of + * all buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the + * BUTTON_*_BIT and JOYSTICK_*_BIT definitions in board.h for the meaning + * of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See + * the BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it + * may be restored, if so desired). + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) + { + xcpt_t oldhandler = NULL; + uint32_t pinset = GPIO_BTN_KEYA; + + if (id == 1) + { + pinset = GPIO_BTN_KEYB; + } + if (id < 2) + { + oldhandler = stm32_gpiosetevent(pinset, true, true, true, irqhandler); + } + return oldhandler; + } +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/hymini-stm32v/src/stm32_leds.c b/configs/hymini-stm32v/src/stm32_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..f65b7a21e2ddc6ab80d4f87d1e7fd6c3b51f7798 --- /dev/null +++ b/configs/hymini-stm32v/src/stm32_leds.c @@ -0,0 +1,239 @@ +/**************************************************************************** + * configs/hymini-stm32v/src/stm32_leds.c + * + * Copyright (C) 2009, 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "hymini-stm32v.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* The following definitions map the encoded LED setting to GPIO settings */ + +#define HYMINI_STM32_LED1 (1 << 0) +#define HYMINI_STM32_LED2 (1 << 1) + +#define ON_SETBITS_SHIFT (0) +#define ON_CLRBITS_SHIFT (4) +#define OFF_SETBITS_SHIFT (8) +#define OFF_CLRBITS_SHIFT (12) + +#define ON_BITS(v) ((v) & 0xff) +#define OFF_BITS(v) (((v) >> 8) & 0x0ff) +#define SETBITS(b) ((b) & 0x0f) +#define CLRBITS(b) (((b) >> 4) & 0x0f) + +#define ON_SETBITS(v) (SETBITS(ON_BITS(v)) +#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v)) +#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v)) +#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v)) + +/* On: !LED1 + !LED2 Off: - */ +#define LED_STARTED_ON_SETBITS ((0) << ON_SETBITS_SHIFT) +#define LED_STARTED_ON_CLRBITS ((HYMINI_STM32_LED1|HYMINI_STM32_LED2) << ON_CLRBITS_SHIFT) +#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT) +#define LED_STARTED_OFF_CLRBITS (0 << OFF_CLRBITS_SHIFT) + +/* On: LED1+!LED2 Off: N/A */ +#define LED_HEAPALLOCATE_ON_SETBITS ((HYMINI_STM32_LED1) << ON_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_ON_CLRBITS ((HYMINI_STM32_LED2) << ON_CLRBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_SETBITS (0) +#define LED_HEAPALLOCATE_OFF_CLRBITS (0) + +/* On: LED2+!LED1 Off: N/A */ +#define LED_IRQSENABLED_ON_SETBITS ((HYMINI_STM32_LED2) << ON_SETBITS_SHIFT) +#define LED_IRQSENABLED_ON_CLRBITS ((HYMINI_STM32_LED1) << ON_CLRBITS_SHIFT) +#define LED_IRQSENABLED_OFF_SETBITS (0) +#define LED_IRQSENABLED_OFF_CLRBITS (0) + +/* On: LED1+!LED2 Off: N/A */ +#define LED_STACKCREATED_ON_SETBITS ((HYMINI_STM32_LED1) << ON_SETBITS_SHIFT) +#define LED_STACKCREATED_ON_CLRBITS ((HYMINI_STM32_LED2) << ON_CLRBITS_SHIFT) +#define LED_STACKCREATED_OFF_SETBITS (0) +#define LED_STACKCREATED_OFF_CLRBITS (0) + +/* On: !LED1 Off: LED1 */ +#define LED_INIRQ_ON_SETBITS ((0) << ON_SETBITS_SHIFT) +#define LED_INIRQ_ON_CLRBITS ((HYMINI_STM32_LED1) << ON_CLRBITS_SHIFT) +#define LED_INIRQ_OFF_SETBITS ((HYMINI_STM32_LED1) << OFF_SETBITS_SHIFT) +#define LED_INIRQ_OFF_CLRBITS ((0) << OFF_CLRBITS_SHIFT) + +/* On: LED2 Off: !LED2 */ +#define LED_SIGNAL_ON_SETBITS ((HYMINI_STM32_LED2) << ON_SETBITS_SHIFT) +#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_SIGNAL_OFF_CLRBITS ((HYMINI_STM32_LED2) << OFF_CLRBITS_SHIFT) + +/* On: LED1+LED2 Off: - */ +#define LED_ASSERTION_ON_SETBITS ((HYMINI_STM32_LED2|HYMINI_STM32_LED2) << ON_SETBITS_SHIFT) +#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_ASSERTION_OFF_CLRBITS ((0) << OFF_CLRBITS_SHIFT) + +/* On: LED1 Off: LED2 */ +#define LED_PANIC_ON_SETBITS ((HYMINI_STM32_LED1) << ON_SETBITS_SHIFT) +#define LED_PANIC_ON_CLRBITS ((HYMINI_STM32_LED2) << ON_CLRBITS_SHIFT) +#define LED_PANIC_OFF_SETBITS ((HYMINI_STM32_LED2) << OFF_SETBITS_SHIFT) +#define LED_PANIC_OFF_CLRBITS ((HYMINI_STM32_LED1) << OFF_CLRBITS_SHIFT) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint16_t g_ledbits[8] = +{ (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | LED_STARTED_OFF_SETBITS + | LED_STARTED_OFF_CLRBITS), + +(LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS + | LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS), + +(LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS + | LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS), + +(LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS + | LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS), + +(LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS | LED_INIRQ_OFF_SETBITS + | LED_INIRQ_OFF_CLRBITS), + +(LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS | LED_SIGNAL_OFF_SETBITS + | LED_SIGNAL_OFF_CLRBITS), + +(LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS | LED_ASSERTION_OFF_SETBITS + | LED_ASSERTION_OFF_CLRBITS), + +(LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS | LED_PANIC_OFF_SETBITS + | LED_PANIC_OFF_CLRBITS) }; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static inline void led_clrbits(unsigned int clrbits) +{ + if ((clrbits & HYMINI_STM32_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, false); + } + + if ((clrbits & HYMINI_STM32_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, false); + } +} + +static inline void led_setbits(unsigned int setbits) +{ + if ((setbits & HYMINI_STM32_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, true); + } + + if ((setbits & HYMINI_STM32_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, true); + } +} + +static void led_setonoff(unsigned int bits) +{ + led_clrbits(CLRBITS(bits)); + led_setbits(SETBITS(bits)); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + /* Configure LED1 & LED2 GPIOs for output */ + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_setonoff(ON_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_setonoff(OFF_BITS(g_ledbits[led])); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/hymini-stm32v/src/stm32_r61505u.c b/configs/hymini-stm32v/src/stm32_r61505u.c new file mode 100644 index 0000000000000000000000000000000000000000..be67d14ac93e8f548ddd86256289c0557b064fa7 --- /dev/null +++ b/configs/hymini-stm32v/src/stm32_r61505u.c @@ -0,0 +1,1006 @@ +/************************************************************************************ + * configs/hymini-stm32v/src/stm32_r61505u.c + * + * Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Laurent Latil + * C. Faure 2013-05-15 + * - Adapted initialization from SSD1289 to r61505u + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************** + * Included Files + **************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "stm32.h" +#include "hymini-stm32v.h" + +/************************************************************************************** + * Pre-processor Definitions + **************************************************************************************/ + +/* Color depth and format */ + +#define LCD_BPP 16 +#define LCD_COLORFMT FB_FMT_RGB16_565 + +/* Display Resolution */ + +#if defined(CONFIG_LCD_LANDSCAPE) +# define LCD_XRES 320 +# define LCD_YRES 240 +#else +# define LCD_XRES 240 +# define LCD_YRES 320 +#endif + +#define LCD_BL_TIMER_PERIOD 8999 + +/* LCD is connected to the FSMC_Bank1_NOR/SRAM1 and NE1 is used as ship select signal */ +/* RS <==> A16 */ + +#define LCD_REG (*((volatile unsigned short *) 0x60000000)) /* RS = 0 */ +#define LCD_RAM (*((volatile unsigned short *) 0x60020000)) /* RS = 1 */ + +/* LCD IDs */ + +#define LCD_ID 0x1505 + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +#endif + +/* This should be put elsewhere (possibly include/nuttx/compiler.h) */ + +#ifdef __CC_ARM /* ARM Compiler */ +# define lcd_inline static __inline +#elif defined (__ICCARM__) /* for IAR Compiler */ +# define lcd_inline inline +#elif defined (__GNUC__) /* GNU GCC Compiler */ +# define lcd_inline static __inline +#else +# define lcd_inline static +#endif + +/************************************************************************************** + * Private Types + **************************************************************************************/ + +struct mylcd_dev_s +{ + /* Publicly visible device structure */ + + struct lcd_dev_s dev; + + /* Private LCD-specific information follows */ + + uint8_t power; /* Current power setting */ +}; + +/************************************************************************************** + * Private Function Prototypes + **************************************************************************************/ + +/* Low Level methods */ + +static void lcd_clear(uint16_t color); + +/* LCD Data Transfer Methods */ + +static int lcd_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels); +static int lcd_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels); + +/* LCD Configuration */ + +static int lcd_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo); +static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo); + +/* LCD RGB Mapping */ + +#ifdef CONFIG_FB_CMAP +# error "RGB color mapping not supported by this driver" +#endif + +/* Cursor Controls */ + +#ifdef CONFIG_FB_HWCURSOR +# error "Cursor control not supported by this driver" +#endif + +/* LCD Specific Controls */ + +static int lcd_getpower(struct lcd_dev_s *dev); +static int lcd_setpower(struct lcd_dev_s *dev, int power); +static int lcd_getcontrast(struct lcd_dev_s *dev); +static int lcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast); + +/* Initialization (LCD ctrl / backlight) */ + +static inline void lcd_initialize(void); + +#ifdef CONFIG_LCD_BACKLIGHT +static void lcd_backlight(void); +#else +# define lcd_backlight() +#endif + +/************************************************************************************** + * Private Data + **************************************************************************************/ + +static const uint16_t fsmc_gpios[] = +{ + /* A16... A24 */ + + GPIO_NPS_A16, GPIO_NPS_A17, GPIO_NPS_A18, GPIO_NPS_A19, GPIO_NPS_A20, + GPIO_NPS_A21, GPIO_NPS_A22, GPIO_NPS_A23, + + /* D0... D15 */ + + GPIO_NPS_D0, GPIO_NPS_D1, GPIO_NPS_D2, GPIO_NPS_D3, + GPIO_NPS_D4, GPIO_NPS_D5, GPIO_NPS_D6, GPIO_NPS_D7, GPIO_NPS_D8, GPIO_NPS_D9, + GPIO_NPS_D10, GPIO_NPS_D11, GPIO_NPS_D12, GPIO_NPS_D13, GPIO_NPS_D14, + GPIO_NPS_D15, + + /* NOE, NWE */ + + GPIO_NPS_NOE, GPIO_NPS_NWE, + + /* NE1 */ + + GPIO_NPS_NE1 +}; + +#define NGPIOS (sizeof(fsmc_gpios)/sizeof(uint16_t)) + +/* This is working memory allocated by the LCD driver for each LCD device + * and for each color plane. This memory will hold one raster line of data. + * The size of the allocated run buffer must therefore be at least + * (bpp * xres / 8). Actual alignment of the buffer must conform to the + * bitwidth of the underlying pixel type. + * + * If there are multiple planes, they may share the same working buffer + * because different planes will not be operate on concurrently. However, + * if there are multiple LCD devices, they must each have unique run buffers. + */ + +static uint16_t g_runbuffer[LCD_XRES]; + +/* This structure describes the overall LCD video controller */ + +static const struct fb_videoinfo_s g_videoinfo = +{ + .fmt = LCD_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */ + .xres = LCD_XRES, /* Horizontal resolution in pixel columns */ + .yres = LCD_YRES, /* Vertical resolution in pixel rows */ + .nplanes = 1, /* Number of color planes supported */ +}; + +/* This is the standard, NuttX Plane information object */ + +static const struct lcd_planeinfo_s g_planeinfo = +{ + .putrun = lcd_putrun, /* Put a run into LCD memory */ + .getrun = lcd_getrun, /* Get a run from LCD memory */ + .buffer = (uint8_t*) g_runbuffer, /* Run scratch buffer */ + .bpp = LCD_BPP, /* Bits-per-pixel */ +}; + +/* This is the standard, NuttX LCD driver object */ + +static struct mylcd_dev_s g_lcddev = +{ .dev = + { + /* LCD Configuration */ + + .getvideoinfo = lcd_getvideoinfo, + .getplaneinfo = lcd_getplaneinfo, + + /* LCD RGB Mapping -- Not supported */ + /* Cursor Controls -- Not supported */ + + /* LCD Specific Controls */ + + .getpower = lcd_getpower, + .setpower = lcd_setpower, + .getcontrast = lcd_getcontrast, + .setcontrast = lcd_setcontrast, + }, + .power = 0 +}; + +/************************************************************************************** + * Private Functions + **************************************************************************************/ + +/************************************************************************************ + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for NOR or SRAM + * + ************************************************************************************/ + +static inline void stm32_extmemgpios(const uint16_t *gpios, int ngpios) +{ + int i; + + /* Configure GPIOs */ + + for (i = 0; i < ngpios; i++) + { + stm32_configgpio(gpios[i]); + } +} + +/************************************************************************************ + * Name: stm32_enablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +#ifndef CONFIG_STM32_FSMC +# error CONFIG_STM32_FSMC is required for LCD support +#endif + +static void stm32_enablefsmc(void) +{ + uint32_t regval; + + /* Enable AHB clocking to the FSMC */ + + regval = getreg32( STM32_RCC_AHBENR); + regval |= RCC_AHBENR_FSMCEN; + putreg32(regval, STM32_RCC_AHBENR); +} + +/************************************************************************************ + * Name: stm32_disablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +static void stm32_disablefsmc(void) +{ + uint32_t regval; + + /* Enable AHB clocking to the FSMC */ + + regval = getreg32( STM32_RCC_AHBENR); + regval &= ~RCC_AHBENR_FSMCEN; + putreg32(regval, STM32_RCC_AHBENR); +} + +/************************************************************************************ + * Name: stm32_selectlcd + * + * Description: + * Initialize to the LCD + * + ************************************************************************************/ + +static void stm32_selectlcd(void) +{ + /* Configure new GPIO state */ + + stm32_extmemgpios(fsmc_gpios, NGPIOS); + + /* Enable AHB clocking to the FSMC */ + + stm32_enablefsmc(); + + /* Bank1 NOR/SRAM control register configuration */ + + putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32( + FSMC_BTR_ADDSET(2)|FSMC_BTR_ADDHLD(0)|FSMC_BTR_DATAST(2)|FSMC_BTR_BUSTURN(0)| + FSMC_BTR_CLKDIV(0)|FSMC_BTR_DATLAT(0)|FSMC_BTR_ACCMODA, + STM32_FSMC_BTR1); + + /* As ext mode is not active the write timing is ignored!! */ + + putreg32(0xffffffff, STM32_FSMC_BWTR1); + + /* Enable the bank by setting the MBKEN bit */ + + putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, + STM32_FSMC_BCR1); +} + +/************************************************************************************ + * Name: stm32_deselectlcd + * + * Description: + * Disable the LCD + * + ************************************************************************************/ + +// FIXME: Check this code !! +static void stm32_deselectlcd(void) +{ + /* Restore registers to their power up settings */ + + putreg32(0xffffffff, STM32_FSMC_BCR4); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32(0x0fffffff, STM32_FSMC_BTR4); + + /* Disable AHB clocking to the FSMC */ + + stm32_disablefsmc(); +} + +/************************************************************************************** + * Name: write_cmd + **************************************************************************************/ + +lcd_inline void write_cmd(unsigned short cmd) +{ + LCD_REG = cmd; +} + +/************************************************************************************** + * Name: read_data + **************************************************************************************/ + +lcd_inline unsigned short read_data(void) +{ + return LCD_RAM; +} + +/************************************************************************************** + * Name: write_data + **************************************************************************************/ + +lcd_inline void write_data(unsigned short data_code) +{ + LCD_RAM = data_code; +} + +/************************************************************************************** + * Name: write_reg + **************************************************************************************/ + +static void write_reg(unsigned char reg_addr, unsigned short reg_val) +{ + write_cmd(reg_addr); + write_data(reg_val); +} + +/************************************************************************************** + * Name: read_reg + **************************************************************************************/ + +static unsigned short read_reg(unsigned char reg_addr) +{ + unsigned short val; + write_cmd(reg_addr); + val = read_data(); + return (val); +} + +/************************************************************************************** + * Name: lcd_gramselect + **************************************************************************************/ + +static inline void lcd_gramselect(void) +{ + write_cmd(0x22); +} + +/************************************************************************************** + * Name: lcd_setcursor + **************************************************************************************/ + +static void lcd_setcursor(unsigned int x, unsigned int y) +{ +#if defined(CONFIG_LCD_PORTRAIT) || defined (CONFIG_LCD_RPORTRAIT) +# if defined (CONFIG_LCD_RPORTRAIT) + x = (LCD_XRES - 1) - x; + y = (LCD_YRES - 1) - y; +# endif + write_reg(0x20,x); /* Row */ + write_reg(0x21,y); /* Line */ +#endif + +#if defined(CONFIG_LCD_LANDSCAPE) + y = (LCD_YRES - 1) - y; + + write_reg(0x20,x); /* Row */ + write_reg(0x21,y); /* Line */ +#endif +} + +/************************************************************************************** + * Name: lcd_putrun + * + * Description: + * This method can be used to write a partial raster line to the LCD: + * + * row - Starting row to write to (range: 0 <= row < yres) + * col - Starting column to write to (range: 0 <= col <= xres-npixels) + * buffer - The buffer containing the run to be written to the LCD + * npixels - The number of pixels to write to the LCD + * (range: 0 < npixels <= xres-col) + * + **************************************************************************************/ + +static int lcd_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels) +{ + int i; + FAR const uint16_t *src = (FAR const uint16_t*) buffer; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + /* Write the run to GRAM. */ + + lcd_setcursor(col, row); + lcd_gramselect(); + + for (i = 0; i < npixels; i++) + { + write_data(*src++); + } + + return OK; +} + +/************************************************************************************** + * Name: lcd_getrun + * + * Description: + * This method can be used to read a partial raster line from the LCD: + * + * row - Starting row to read from (range: 0 <= row < yres) + * col - Starting column to read read (range: 0 <= col <= xres-npixels) + * buffer - The buffer in which to return the run read from the LCD + * npixels - The number of pixels to read from the LCD + * (range: 0 < npixels <= xres-col) + * + **************************************************************************************/ + +static int lcd_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels) +{ + FAR uint16_t *dest = (FAR uint16_t*) buffer; + int i; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + /* Read the run from GRAM. */ + + lcd_setcursor(col, row); + lcd_gramselect(); + + /* dummy read */ + + (void)read_data(); + + for (i = 0; i < npixels; i++) + { + *dest++ = read_data(); + } + + return OK; +} + +/************************************************************************************** + * Name: lcd_getvideoinfo + * + * Description: + * Get information about the LCD video controller configuration. + * + **************************************************************************************/ + +static int lcd_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo) +{ + DEBUGASSERT(dev && vinfo); + gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n", + g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes); + + memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s)); + return OK; +} + +/************************************************************************************** + * Name: lcd_getplaneinfo + * + * Description: + * Get information about the configuration of each LCD color plane. + * + **************************************************************************************/ + +static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo) +{ + DEBUGASSERT(dev && pinfo && planeno == 0); + gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp); + + memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s)); + return OK; +} + +/************************************************************************************** + * Name: lcd_getpower + * + * Description: + * Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + **************************************************************************************/ + +static int lcd_getpower(struct lcd_dev_s *dev) +{ + gvdbg("power: %d\n", 0); + return g_lcddev.power; +} + +/************************************************************************************** + * Name: lcd_setpower + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). + * Used here to set pwm duty on timer used for backlight. + * + **************************************************************************************/ + +static int lcd_setpower(struct lcd_dev_s *dev, int power) +{ + if (g_lcddev.power == power) + { + return OK; + } + + gvdbg("power: %d\n", power); + DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER); + + /* Set new power level */ + + if (power > 0) + { +#ifdef CONFIG_LCD_BACKLIGHT + uint32_t duty; + + /* Calculate the new backlight duty. It is a fraction of the timer + * period based on the ration of the current power setting to the + * maximum power setting. + */ + + duty = ((uint32_t)LCD_BL_TIMER_PERIOD * (uint32_t)power) / CONFIG_LCD_MAXPOWER; + if (duty >= LCD_BL_TIMER_PERIOD) + { + duty = LCD_BL_TIMER_PERIOD - 1; + } + + gvdbg("PWM duty: %d\n", duty); + putreg16((uint16_t)duty, STM32_TIM3_CCR2); +#endif + /* TODO turn the display on */ + } + else + { + /* FIXME: Turn display off ? */ + + gvdbg("Force PWM to 0\n"); + putreg16((uint16_t)0, STM32_TIM3_CCR2); + } + + g_lcddev.power = power; + return OK; +} + +/************************************************************************************** + * Name: lcd_getcontrast + * + * Description: + * Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static int lcd_getcontrast(struct lcd_dev_s *dev) +{ + gvdbg("Not implemented\n"); + return -ENOSYS; +} + +/************************************************************************************** + * Name: lcd_setcontrast + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static int lcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) +{ + gvdbg("Not implemented\n"); + return -ENOSYS; +} + +/************************************************************************************** + * Name: lcd_lcdinitialize + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static inline void lcd_initialize(void) +{ + /* Second release on 3/5 ,luminance is acceptable,water wave appear during camera + * preview + */ + + write_reg(0x07,0x0000); + up_mdelay(5); /* Delay 50 ms */ + write_reg(0x12,0x011C); /* Why need to set several times? */ + write_reg(0xA4,0x0001); /* NVM */ + write_reg(0x08,0x000F); + write_reg(0x0A,0x0008); + write_reg(0x0D,0x0008); + + /* GAMMA CONTROL */ + + write_reg(0x30,0x0707); + write_reg(0x31,0x0007); + write_reg(0x32,0x0603); + write_reg(0x33,0x0700); + write_reg(0x34,0x0202); + write_reg(0x35,0x0002); + write_reg(0x36,0x1F0F); + write_reg(0x37,0x0707); + write_reg(0x38,0x0000); + write_reg(0x39,0x0000); + write_reg(0x3A,0x0707); + write_reg(0x3B,0x0000); + write_reg(0x3C,0x0007); + write_reg(0x3D,0x0000); + up_mdelay(5); /* Delay 50 ms */ + write_reg(0x07,0x0001); + write_reg(0x17,0x0001); /* Power supply startup enable */ + up_mdelay(5); /* Delay 50 ms */ + + /* Power control */ + + write_reg(0x10,0x17A0); + write_reg(0x11,0x0217); /* Feference voltage VC[2:0] Vciout = 1.00*Vcivl */ + write_reg(0x12,0x011E); /* Vreg1out = Vcilvl*1.80 is it the same as Vgama1out ? */ + write_reg(0x13,0x0F00); /* VDV[4:0]-->VCOM Amplitude VcomL = VcomH - Vcom Ampl */ + write_reg(0x2A,0x0000); + write_reg(0x29,0x000A); /* Vcomh = VCM1[4:0]*Vreg1out gate source voltage?? */ + write_reg(0x12,0x013E); /* Power supply on */ + + /* Coordinates Control */ + + write_reg(0x50,0x0000); + write_reg(0x51,0x00EF); + write_reg(0x52,0x0000); + write_reg(0x53,0x013F); + + /* Pannel Image Control */ + + write_reg(0x60,0x2700); + write_reg(0x61,0x0001); + write_reg(0x6A,0x0000); + write_reg(0x80,0x0000); + + /* Partial Image Control */ + + write_reg(0x81,0x0000); + write_reg(0x82,0x0000); + write_reg(0x83,0x0000); + write_reg(0x84,0x0000); + write_reg(0x85,0x0000); + + /* Panel Interface Control */ + + write_reg(0x90,0x0013); /* Frequency */ + write_reg(0x92,0x0300); + write_reg(0x93,0x0005); + write_reg(0x95,0x0000); + write_reg(0x97,0x0000); + write_reg(0x98,0x0000); + + write_reg(0x01,0x0100); + write_reg(0x02,0x0700); + write_reg(0x03,0x1030); + write_reg(0x04,0x0000); + write_reg(0x0C,0x0000); + write_reg(0x0F,0x0000); + write_reg(0x20,0x0000); + write_reg(0x21,0x0000); + write_reg(0x07,0x0021); + up_mdelay(20); /* Delay 200 ms */ + write_reg(0x07,0x0061); + up_mdelay(20); /* Delay 200 ms */ + write_reg(0x07,0x0173); + up_mdelay(20); /* Delay 200 ms */ +} + +/************************************************************************************** + * Name: lcd_backlight + * + * Description: + * The LCD backlight is driven from PB.5 which must be configured as TIM3 + * CH2. TIM3 must then be configured to pwm output on PB.5; the duty + * of the clock determines the backlight level. + * + **************************************************************************************/ + +#ifdef CONFIG_LCD_BACKLIGHT + +#ifndef CONFIG_STM32_TIM3_PARTIAL_REMAP +# error CONFIG_STM32_TIM3_PARTIAL_REMAP must be set (to have TIM3 CH2 on pin B.5) +#endif + +static void lcd_backlight(void) +{ + uint16_t ccmr; + uint16_t ccer; + uint16_t cr2; + + /* Configure PB5 as TIM3 CH2 output */ + + stm32_configgpio(GPIO_TIM3_CH2OUT); + + /* Enabled timer 3 clocking */ + + modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM3EN); + + /* Reset timer 3 */ + + modifyreg32(STM32_RCC_APB1RSTR, 0, RCC_APB1RSTR_TIM3RST); + modifyreg32(STM32_RCC_APB1RSTR, RCC_APB1RSTR_TIM3RST, 0); + + /* Reset the Counter Mode and set the clock division */ + + putreg16(0, STM32_TIM3_CR1); + + /* Set the Autoreload value */ + + putreg16(LCD_BL_TIMER_PERIOD, STM32_TIM3_ARR); + + /* Set the Prescaler value */ + + putreg16(0, STM32_TIM3_PSC); + + /* Generate an update event to reload the Prescaler value immediatly */ + + putreg16(ATIM_EGR_UG, STM32_TIM3_EGR); + + /* Disable the Channel 2 */ + + ccer = getreg16(STM32_TIM3_CCER); + ccer &= ~ATIM_CCER_CC2E; + putreg16(ccer, STM32_TIM3_CCER); + + /* Get the TIM3 CR2 register value */ + + cr2 = getreg16(STM32_TIM3_CR2); + + /* Select the Output Compare Mode Bits */ + + ccmr = getreg16(STM32_TIM3_CCMR1); + ccmr &= ATIM_CCMR1_OC2M_MASK; + ccmr |= (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR1_OC2M_SHIFT); + + /* Set the capture compare register value (50% duty) */ + + // FIXME should be set to 0 (appl needs to call setpower to change it) + g_lcddev.power = (CONFIG_LCD_MAXPOWER + 1) / 2; + putreg16((LCD_BL_TIMER_PERIOD + 1) / 2, STM32_TIM3_CCR2); + + /* Select the output polarity level == HIGH */ + + ccer &= !ATIM_CCER_CC2P; + + /* Enable channel 2*/ + + ccer |= ATIM_CCER_CC2E; + + /* Write the timer configuration */ + + putreg16(ccmr, STM32_TIM3_CCMR1); + putreg16(ccer, STM32_TIM3_CCER); + + /* Set the auto preload enable bit */ + + modifyreg16(STM32_TIM3_CR1, 0, ATIM_CR1_ARPE); + + /* Enable Backlight Timer !!!!*/ + + modifyreg16(STM32_TIM3_CR1, 0, ATIM_CR1_CEN); + + /* Dump timer3 registers */ + + lcddbg("APB1ENR: %08x\n", getreg32(STM32_RCC_APB1ENR)); + lcddbg("CR1: %04x\n", getreg32(STM32_TIM3_CR1)); + lcddbg("CR2: %04x\n", getreg32(STM32_TIM3_CR2)); + lcddbg("SMCR: %04x\n", getreg32(STM32_TIM3_SMCR)); + lcddbg("DIER: %04x\n", getreg32(STM32_TIM3_DIER)); + lcddbg("SR: %04x\n", getreg32(STM32_TIM3_SR)); + lcddbg("EGR: %04x\n", getreg32(STM32_TIM3_EGR)); + lcddbg("CCMR1: %04x\n", getreg32(STM32_TIM3_CCMR1)); + lcddbg("CCMR2: %04x\n", getreg32(STM32_TIM3_CCMR2)); + lcddbg("CCER: %04x\n", getreg32(STM32_TIM3_CCER)); + lcddbg("CNT: %04x\n", getreg32(STM32_TIM3_CNT)); + lcddbg("PSC: %04x\n", getreg32(STM32_TIM3_PSC)); + lcddbg("ARR: %04x\n", getreg32(STM32_TIM3_ARR)); + lcddbg("CCR1: %04x\n", getreg32(STM32_TIM3_CCR1)); + lcddbg("CCR2: %04x\n", getreg32(STM32_TIM3_CCR2)); + lcddbg("CCR3: %04x\n", getreg32(STM32_TIM3_CCR3)); + lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4)); + lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4)); + lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4)); + lcddbg("DMAR: %04x\n", getreg32(STM32_TIM3_DMAR)); +} +#endif + +/************************************************************************************** + * Public Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + **************************************************************************************/ + +int board_lcd_initialize(void) +{ + unsigned short id; + + gvdbg("Initializing\n"); + + /* Configure GPIO pins and configure the FSMC to support the LCD */ + + stm32_selectlcd(); + + /* Delay required here */ + + up_mdelay(50); + + /* Check model id */ + + id=read_reg(0x0); + if (id != LCD_ID) + { + /* Not a R61505U ? */ + + gdbg("board_lcd_initialize: LCD ctrl is not a R61505U"); + return ERROR; + } + + /* Configure and enable LCD */ + + lcd_initialize(); + + /* Clear the display (setting it to the color 0=black) */ + + lcd_clear(0); + + /* Configure the backlight */ + + lcd_backlight(); + return OK; +} + +/************************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows support + * for multiple LCD devices. + * + **************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return &g_lcddev.dev; +} + +/************************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Un-initialize the LCD support + * + **************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + lcd_setpower(&g_lcddev.dev, 0); + stm32_deselectlcd(); +} + +/************************************************************************************** + * Name: lcd_clear + * + * Description: + * Fill the LCD ctrl memory with given color + * + **************************************************************************************/ + +void lcd_clear(uint16_t color) +{ + uint32_t index; + + lcd_setcursor(0, 0); + lcd_gramselect(); /* Prepare to write GRAM */ + for (index = 0; index < LCD_XRES * LCD_YRES; index++) + { + write_data(color); + } +} diff --git a/configs/hymini-stm32v/src/stm32_spi.c b/configs/hymini-stm32v/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..0f1852dd061cb032606cce8fa080a7a3d00de91c --- /dev/null +++ b/configs/hymini-stm32v/src/stm32_spi.c @@ -0,0 +1,178 @@ +/************************************************************************************ + * configs/hymini-stm32v/src/stm32_spi.c + * + * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "hymini-stm32v.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#define SPI_DEBUG /* Define to enable debug */ +#define SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the HY-MiniSTM32 board. + * + ************************************************************************************/ + +void stm32_spidev_initialize(void) +{ + /* NOTE: Clocking for SPI1 and/or SPI2 was already provided in stm32_rcc.c. + * Configurations of SPI pins is performed in stm32_spi.c. + * Here, we only initialize chip select pins unique to the board + * architecture. + */ + +#ifdef CONFIG_STM32_SPI1 + /* Configure the SPI-based touch screen CS GPIO */ + spivdbg("Configure GPIO for SPI1/CS\n"); + stm32_configgpio(GPIO_TS_CS); +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + if (devid == SPIDEV_TOUCHSCREEN) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_TS_CS, !selected); + } +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/hymini-stm32v/src/stm32_ssd1289.c b/configs/hymini-stm32v/src/stm32_ssd1289.c new file mode 100644 index 0000000000000000000000000000000000000000..c8889c38a5911cda06b850b16440e3b0c061bae7 --- /dev/null +++ b/configs/hymini-stm32v/src/stm32_ssd1289.c @@ -0,0 +1,540 @@ +/************************************************************************************ + * configs/hymini-stm32v/src/stm32_ssd1289.c + * + * Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "stm32.h" +#include "hymini-stm32v.h" + +#ifdef CONFIG_LCD_SSD1289 + +/************************************************************************************** + * Pre-processor Definitions + **************************************************************************************/ +/* Configuration **********************************************************************/ + +#ifndef CONFIG_STM32_FSMC +# error "CONFIG_STM32_FSMC is required to use the LCD" +#endif + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* Color depth and format */ + +#define LCD_BPP 16 +#define LCD_COLORFMT FB_FMT_RGB16_565 + +/* Display Resolution */ + +#if defined(CONFIG_LCD_LANDSCAPE) +# define LCD_XRES 320 +# define LCD_YRES 240 +#else +# define LCD_XRES 240 +# define LCD_YRES 320 +#endif + +#define LCD_BL_TIMER_PERIOD 8999 + +/* LCD is connected to the FSMC_Bank1_NOR/SRAM1 and NE1 is used as ship select signal */ +/* RS <==> A16 */ + +#define LCD_INDEX 0x60000000 /* RS = 0 */ +#define LCD_DATA 0x60020000 /* RS = 1 */ + +/* Debug ******************************************************************************/ +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/************************************************************************************** + * Private Type Definition + **************************************************************************************/ + +/************************************************************************************** + * Private Function Prototypes + **************************************************************************************/ +/* Low Level LCD access */ + +static void stm32_select(FAR struct ssd1289_lcd_s *dev); +static void stm32_deselect(FAR struct ssd1289_lcd_s *dev); +static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index); +#ifndef CONFIG_SSD1289_WRONLY +static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev); +#endif +static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data); +static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power); + +static void stm32_extmemgpios(const uint16_t *gpios, int ngpios); +static void stm32_enablefsmc(void); + +/************************************************************************************** + * Private Data + **************************************************************************************/ + +const uint16_t fsmc_gpios[] = +{ + /* A16... A24 */ + + GPIO_NPS_A16, GPIO_NPS_A17, GPIO_NPS_A18, GPIO_NPS_A19, GPIO_NPS_A20, + GPIO_NPS_A21, GPIO_NPS_A22, GPIO_NPS_A23, + + /* D0... D15 */ + + GPIO_NPS_D0, GPIO_NPS_D1, GPIO_NPS_D2, GPIO_NPS_D3, GPIO_NPS_D4, + GPIO_NPS_D5, GPIO_NPS_D6, GPIO_NPS_D7, GPIO_NPS_D8, GPIO_NPS_D9, + GPIO_NPS_D10, GPIO_NPS_D11, GPIO_NPS_D12, GPIO_NPS_D13, GPIO_NPS_D14, + GPIO_NPS_D15, + + /* NOE, NWE */ + + GPIO_NPS_NOE, GPIO_NPS_NWE, + + /* NE1 */ + + GPIO_NPS_NE1 +}; + +#define NGPIOS (sizeof(fsmc_gpios)/sizeof(uint16_t)) + +/* This is the driver state structure */ + +static struct ssd1289_lcd_s g_ssd1289 = +{ + .select = stm32_select, + .deselect = stm32_deselect, + .index = stm32_index, +#ifndef CONFIG_SSD1289_WRONLY + .read = stm32_read, +#endif + .write = stm32_write, + .backlight = stm32_backlight +}; + +/* The saved instance of the LCD driver */ + +static FAR struct lcd_dev_s *g_ssd1289drvr; + +/************************************************************************************** + * Private Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: stm32_select + * + * Description: + * Select the LCD device + * + **************************************************************************************/ + +static void stm32_select(FAR struct ssd1289_lcd_s *dev) +{ + /* Does not apply to this hardware */ +} + +/************************************************************************************** + * Name: stm32_deselect + * + * Description: + * De-select the LCD device + * + **************************************************************************************/ + +static void stm32_deselect(FAR struct ssd1289_lcd_s *dev) +{ + /* Does not apply to this hardware */ +} + +/************************************************************************************** + * Name: stm32_index + * + * Description: + * Set the index register + * + **************************************************************************************/ + +static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index) +{ + putreg16((uint16_t)index, LCD_INDEX); +} + +/************************************************************************************** + * Name: stm32_read + * + * Description: + * Read LCD data (GRAM data or register contents) + * + **************************************************************************************/ + +#ifndef CONFIG_SSD1289_WRONLY +static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev) +{ + return getreg16(LCD_DATA); +} +#endif + +/************************************************************************************** + * Name: stm32_write + * + * Description: + * Write LCD data (GRAM data or register contents) + * + **************************************************************************************/ + +static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data) +{ + putreg16((uint16_t)data, LCD_DATA); +} + +/************************************************************************************** + * Name: stm32_backlight + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). + * Used here to set pwm duty on timer used for backlight. + * + **************************************************************************************/ + +static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power) +{ + DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER); + + /* Set new power level */ + + if (power > 0) + { + uint32_t duty; + + /* Calculate the new backlight duty. It is a fraction of the timer + * period based on the ration of the current power setting to the + * maximum power setting. + */ + + duty = ((uint32_t)LCD_BL_TIMER_PERIOD * (uint32_t)power) / CONFIG_LCD_MAXPOWER; + if (duty >= LCD_BL_TIMER_PERIOD) + { + duty = LCD_BL_TIMER_PERIOD - 1; + } + + putreg16((uint16_t)duty, STM32_TIM3_CCR2); + } + else + { + putreg16((uint16_t)0, STM32_TIM3_CCR2); + } +} + +static void init_lcd_backlight(void) +{ + uint16_t ccmr; + uint16_t ccer; + + /* Configure PB5 as TIM3 CH2 output */ + + stm32_configgpio(GPIO_TIM3_CH2OUT); + + /* Enable timer 3 clocking */ + + modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM3EN); + + /* Reset timer 3 */ + + modifyreg32(STM32_RCC_APB1RSTR, 0, RCC_APB1RSTR_TIM3RST); + modifyreg32(STM32_RCC_APB1RSTR, RCC_APB1RSTR_TIM3RST, 0); + + /* Reset the Counter Mode and set the clock division */ + + putreg16(0, STM32_TIM3_CR1); + + /* Set the Autoreload value */ + + putreg16(LCD_BL_TIMER_PERIOD, STM32_TIM3_ARR); + + /* Set the Prescaler value */ + + putreg16(0, STM32_TIM3_PSC); + + /* Generate an update event to reload the Prescaler value immediatly */ + + putreg16(ATIM_EGR_UG, STM32_TIM3_EGR); + + /* Disable the Channel 2 */ + + ccer = getreg16(STM32_TIM3_CCER); + ccer &= ~ATIM_CCER_CC2E; + putreg16(ccer, STM32_TIM3_CCER); + + /* Select the Output Compare Mode Bits */ + + ccmr = getreg16(STM32_TIM3_CCMR1); + ccmr &= ATIM_CCMR1_OC2M_MASK; + ccmr |= (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR1_OC2M_SHIFT); + + putreg16(0, STM32_TIM3_CCR2); + + /* Select the output polarity level == HIGH */ + + ccer &= !ATIM_CCER_CC2P; + + /* Enable channel 2*/ + + ccer |= ATIM_CCER_CC2E; + + /* Write the timer configuration */ + + putreg16(ccmr, STM32_TIM3_CCMR1); + putreg16(ccer, STM32_TIM3_CCER); + + /* Set the auto preload enable bit */ + + modifyreg16(STM32_TIM3_CR1, 0, ATIM_CR1_ARPE); + + /* Enable Backlight Timer !!!!*/ + + modifyreg16(STM32_TIM3_CR1, 0, ATIM_CR1_CEN); + + /* Dump timer3 registers */ + + lcddbg("APB1ENR: %08x\n", getreg32(STM32_RCC_APB1ENR)); + lcddbg("CR1: %04x\n", getreg32(STM32_TIM3_CR1)); + lcddbg("CR2: %04x\n", getreg32(STM32_TIM3_CR2)); + lcddbg("SMCR: %04x\n", getreg32(STM32_TIM3_SMCR)); + lcddbg("DIER: %04x\n", getreg32(STM32_TIM3_DIER)); + lcddbg("SR: %04x\n", getreg32(STM32_TIM3_SR)); + lcddbg("EGR: %04x\n", getreg32(STM32_TIM3_EGR)); + lcddbg("CCMR1: %04x\n", getreg32(STM32_TIM3_CCMR1)); + lcddbg("CCMR2: %04x\n", getreg32(STM32_TIM3_CCMR2)); + lcddbg("CCER: %04x\n", getreg32(STM32_TIM3_CCER)); + lcddbg("CNT: %04x\n", getreg32(STM32_TIM3_CNT)); + lcddbg("PSC: %04x\n", getreg32(STM32_TIM3_PSC)); + lcddbg("ARR: %04x\n", getreg32(STM32_TIM3_ARR)); + lcddbg("CCR1: %04x\n", getreg32(STM32_TIM3_CCR1)); + lcddbg("CCR2: %04x\n", getreg32(STM32_TIM3_CCR2)); + lcddbg("CCR3: %04x\n", getreg32(STM32_TIM3_CCR3)); + lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4)); + lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4)); + lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4)); + lcddbg("DMAR: %04x\n", getreg32(STM32_TIM3_DMAR)); +} + +/************************************************************************************ + * Name: stm32_selectlcd + * + * Description: + * Initialize the memory controller (FSMC) + * + ************************************************************************************/ + +static void stm32_selectlcd(void) +{ + /* Configure new GPIO state */ + + stm32_extmemgpios(fsmc_gpios, NGPIOS); + + /* Enable AHB clocking to the FSMC */ + + stm32_enablefsmc(); + + /* Bank1 NOR/SRAM control register configuration */ + + putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32( + FSMC_BTR_ADDSET(1)|FSMC_BTR_ADDHLD(0)|FSMC_BTR_DATAST(2)|FSMC_BTR_BUSTURN(0)| FSMC_BTR_CLKDIV(0)|FSMC_BTR_DATLAT(0)|FSMC_BTR_ACCMODA, + STM32_FSMC_BTR1); + + /* As ext mode is not active the write timing is ignored!! */ + + putreg32(0xffffffff, STM32_FSMC_BWTR1); + + /* Enable the bank by setting the MBKEN bit */ + + putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, + STM32_FSMC_BCR1); +} + +/************************************************************************************ + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for NOR or SRAM + * + ************************************************************************************/ + +static void stm32_extmemgpios(const uint16_t *gpios, int ngpios) +{ + int i; + + /* Configure GPIOs */ + + for (i = 0; i < ngpios; i++) + { + stm32_configgpio(gpios[i]); + } +} + +/************************************************************************************ + * Name: stm32_enablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +#ifndef CONFIG_STM32_FSMC +# error CONFIG_STM32_FSMC is required for LCD support +#endif + +static void stm32_enablefsmc(void) +{ + uint32_t regval; + + /* Enable AHB clocking to the FSMC */ + + regval = getreg32( STM32_RCC_AHBENR); + regval |= RCC_AHBENR_FSMCEN; + putreg32(regval, STM32_RCC_AHBENR); +} + +/************************************************************************************** + * Public Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + **************************************************************************************/ + +int board_lcd_initialize(void) +{ + /* Only initialize the driver once */ + + if (!g_ssd1289drvr) + { + lcdvdbg("Initializing\n"); + + init_lcd_backlight(); + + /* Configure GPIO pins and configure the FSMC to support the LCD */ + + stm32_selectlcd(); + + /* Configure and enable the LCD */ + + up_mdelay(50); + g_ssd1289drvr = ssd1289_lcdinitialize(&g_ssd1289); + if (!g_ssd1289drvr) + { + lcddbg("ERROR: ssd1289_lcdinitialize failed\n"); + return -ENODEV; + } + } + + /* Turn the display off */ + + g_ssd1289drvr->setpower(g_ssd1289drvr, 0); + return OK; +} + +/************************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows support + * for multiple LCD devices. + * + **************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return g_ssd1289drvr; +} + +/************************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Unitialize the LCD support + * + **************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* Turn the display off */ + + g_ssd1289drvr->setpower(g_ssd1289drvr, 0); +} + +#endif /* CONFIG_LCD_SSD1289 */ diff --git a/configs/hymini-stm32v/src/stm32_ts.c b/configs/hymini-stm32v/src/stm32_ts.c new file mode 100644 index 0000000000000000000000000000000000000000..1344c245cd5c8570d5ca5fefb49ce64483192a8e --- /dev/null +++ b/configs/hymini-stm32v/src/stm32_ts.c @@ -0,0 +1,191 @@ +/************************************************************************************ + * configs/hymini-stm32v/src/stm32_ts.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include "stm32.h" +#include "hymini-stm32v.h" + +/************************************************************************************ + * Pre-processor Defintiions + ************************************************************************************/ + +#if !defined(CONFIG_STM32_SPI1) +# error CONFIG_STM32_SPI1 must be defined to use the ADS7843 on this board +#endif + +/************************************************************************************ + * Private Function Prototypes + ************************************************************************************/ + +static int hymini_ts_irq_attach(FAR struct ads7843e_config_s *state, xcpt_t isr); +static void hymini_ts_irq_enable(FAR struct ads7843e_config_s *state, + bool enable); +static void hymini_ts_irq_clear(FAR struct ads7843e_config_s *state); +static bool hymini_ts_busy(FAR struct ads7843e_config_s *state); +static bool hymini_ts_pendown(FAR struct ads7843e_config_s *state); + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static FAR struct ads7843e_config_s ts_cfg = +{ + .frequency = CONFIG_ADS7843E_FREQUENCY, + + .attach = hymini_ts_irq_attach, + .enable=hymini_ts_irq_enable, + .clear=hymini_ts_irq_clear, + .busy = hymini_ts_busy, + .pendown=hymini_ts_pendown +}; + +static xcpt_t tc_isr; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/* Attach the ADS7843E interrupt handler to the GPIO interrupt */ +static int hymini_ts_irq_attach(FAR struct ads7843e_config_s *state, xcpt_t isr) +{ + ivdbg("hymini_ts_irq_attach\n"); + + tc_isr = isr; + stm32_gpiosetevent(GPIO_TS_IRQ, true, true, true, isr); + return OK; +} + +/* Enable or disable the GPIO interrupt */ +static void hymini_ts_irq_enable(FAR struct ads7843e_config_s *state, + bool enable) +{ + illvdbg("%d\n", enable); + + stm32_gpiosetevent(GPIO_TS_IRQ, true, true, true, enable? tc_isr:NULL); +} + +/* Acknowledge/clear any pending GPIO interrupt */ +static void hymini_ts_irq_clear(FAR struct ads7843e_config_s *state) +{ + // FIXME Nothing to do ? +} + +/* As the busy line is not connected, we just wait a little bit here */ +static bool hymini_ts_busy(FAR struct ads7843e_config_s *state) +{ + up_mdelay(50); + return false; +} + +/* Return the state of the pen down GPIO input */ +static bool hymini_ts_pendown(FAR struct ads7843e_config_s *state) +{ + bool pin_value = stm32_gpioread(GPIO_TS_IRQ); + return !pin_value; +} + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * configure the touchscreen device. This function will register the driver + * as /dev/inputN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ + FAR struct spi_dev_s *dev; + + idbg("minor %d\n", minor); + + dev = stm32_spibus_initialize(1); + if (!dev) + { + idbg("Failed to initialize SPI bus\n"); + return -ENODEV; + } + + /* Configure the PIO interrupt */ + + stm32_configgpio(GPIO_TS_IRQ); + + return ads7843e_register(dev, &ts_cfg, minor); +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* FIXME What can/should we do here ? */ +} diff --git a/configs/hymini-stm32v/src/stm32_usbdev.c b/configs/hymini-stm32v/src/stm32_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..d7e868c9031e0661f442f64f0d75518ce473eb65 --- /dev/null +++ b/configs/hymini-stm32v/src/stm32_usbdev.c @@ -0,0 +1,116 @@ +/************************************************************************************ + * configs/hymini-stm32v/src/stm32_usbdev.c + * + * Copyright (C) 2009-2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "hymini-stm32v.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the Hy-Mini STM32v board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + ulldbg("called\n"); + + /* USB Soft Connect Pullup */ + stm32_configgpio(GPIO_USB_PULLUP); +} + +/************************************************************************************ + * Name: stm32_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB software + * connect and disconnect), then the board software must provide stm32_pullup. + * See include/nuttx/usb/usbdev.h for additional description of this method. + * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be + * NULL. + * + ************************************************************************************/ + +int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); + stm32_gpiowrite(GPIO_USB_PULLUP, !enable); + return OK; +} + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} + diff --git a/configs/hymini-stm32v/src/stm32_usbmsc.c b/configs/hymini-stm32v/src/stm32_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..9fc826b5b35214208dddbbad386289c604b6ae6e --- /dev/null +++ b/configs/hymini-stm32v/src/stm32_usbmsc.c @@ -0,0 +1,141 @@ +/**************************************************************************** + * configs/hymini-stm32v/src/stm32_usbmsc.c + * + * Copyright (C) 2009, 2011, 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the STM32 MMC/SD SDIO block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "stm32.h" + +/* There is nothing to do here if SDIO support is not selected. */ + +#ifdef CONFIG_STM32_SDIO + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/* SLOT number(s) could depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_HYMINI_STM32V +# undef STM32_MMCSDSLOTNO +# define STM32_MMCSDSLOTNO 0 +#else + /* Add configuration for new STM32 boards here */ +# error "Unrecognized STM32 board" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization of the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* If system/usbmsc is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see stm32_appinit.c). + * In this case, there is nothing further to be done here. + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS + FAR struct sdio_dev_s *sdio; + int ret; + + /* First, get an instance of the SDIO interface */ + + syslog(LOG_INFO, "Initializing SDIO slot %d\n", STM32_MMCSDSLOTNO); + + sdio = sdio_initialize(STM32_MMCSDSLOTNO); + if (!sdio) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + STM32_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + syslog(LOG_INFO,"Bind SDIO to the MMC/SD driver, minor=%d\n", + CONFIG_SYSTEM_USBMSC_DEVMINOR1); + + ret = mmcsd_slotinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1, sdio); + if (ret != OK) + { + syslog(LOG_ERR, "" + "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", + ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SDIO to the MMC/SD driver\n"); + + /* Then let's guess and say that there is a card in the slot. I need to check to + * see if the Hy-Mini STM32v board supports a GPIO to detect if there is a card in + * the slot. + */ + + sdio_mediachange(sdio, true); + +#endif /* CONFIG_NSH_BUILTIN_APPS */ + + return OK; +} + +#endif /* CONFIG_STM32_SDIO */ diff --git a/configs/hymini-stm32v/src/stm32_watchdog.c b/configs/hymini-stm32v/src/stm32_watchdog.c new file mode 100644 index 0000000000000000000000000000000000000000..db143f67b1fea73c87683957f339e4f430769da9 --- /dev/null +++ b/configs/hymini-stm32v/src/stm32_watchdog.c @@ -0,0 +1,135 @@ +/************************************************************************************ + * configs/hymini-stm32v/src/stm32_watchdog.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Wathdog hardware should be enabled */ + +#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG) +# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_STM32_WDG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0" +# endif +#endif + +/* Use the un-calibrated LSI frequency if we have nothing better */ + +#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ) +# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecuture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ + /* Initialize tha register the watchdog timer device */ + +#if defined(CONFIG_STM32_WWDG) + stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH); + return OK; +#elif defined(CONFIG_STM32_IWDG) + stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ); + return OK; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/hymini-stm32v/usbmsc/Make.defs b/configs/hymini-stm32v/usbmsc/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f459f47fcb5efbd5f3f5813c23757a33bba8ef14 --- /dev/null +++ b/configs/hymini-stm32v/usbmsc/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/hymini-stm32v/usbmsc/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/hymini-stm32v/usbmsc/defconfig b/configs/hymini-stm32v/usbmsc/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b55140124490a90d9a01b98670a2b2146eb6aaf0 --- /dev/null +++ b/configs/hymini-stm32v/usbmsc/defconfig @@ -0,0 +1,1078 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +CONFIG_ARCH_CHIP_STM32F103VC=y +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +CONFIG_STM32_SDIO=y +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +CONFIG_STM32_JTAG_DISABLE=y +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SDIO Configuration +# +CONFIG_SDIO_DMAPRIO=0x00001000 +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=49152 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_HYMINI_STM32V=y +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="hymini-stm32v" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="msconn_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_ARCH_HAVE_SDIO=y +CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y +CONFIG_MMCSD_SDIO=y +CONFIG_SDIO_PREFLIGHT=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_SDIO_BLOCKSETUP is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +CONFIG_USBMSC=y +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=2 +CONFIG_USBMSC_EPBULKIN=5 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=256 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" +CONFIG_USBMSC_VERSIONNO=0x0399 +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=2048 +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +CONFIG_SYSTEM_USBMSC=y +CONFIG_SYSTEM_USBMSC_NLUNS=1 +CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mmcsd0" +CONFIG_SYSTEM_USBMSC_DEVMINOR2=1 +CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_USBMSC_DEVMINOR3=2 +CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" +# CONFIG_SYSTEM_USBMSC_DEBUGMM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/hymini-stm32v/usbmsc/setenv.sh b/configs/hymini-stm32v/usbmsc/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..a0371cdce403f1a26d0e081ddf27891060ee0fd8 --- /dev/null +++ b/configs/hymini-stm32v/usbmsc/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/hymini-stm32v/dfu/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/hymini-stm32v/usbnsh/Make.defs b/configs/hymini-stm32v/usbnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..5df2960ed6a9aece7288eec320221f4416ef6674 --- /dev/null +++ b/configs/hymini-stm32v/usbnsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/hymini-stm32v/usbnsh/Make.defs +# +# Copyright (C) 2011, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/hymini-stm32v/usbnsh/defconfig b/configs/hymini-stm32v/usbnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..a5bc5c22840e36ece1eaee65213f80acadd578d5 --- /dev/null +++ b/configs/hymini-stm32v/usbnsh/defconfig @@ -0,0 +1,1137 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +CONFIG_ARCH_CHIP_STM32F103VC=y +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +CONFIG_STM32_BKP=y +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +CONFIG_STM32_JTAG_DISABLE=y +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=49152 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_HYMINI_STM32V=y +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="hymini-stm32v" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=5 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_USART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_CHAR=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +CONFIG_BINFMT_DISABLE=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=1 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=1 +CONFIG_EXAMPLES_BUTTONS_NAME0="Key A" +CONFIG_EXAMPLES_BUTTONS_NAME1="Key B" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/hymini-stm32v/usbnsh/setenv.sh b/configs/hymini-stm32v/usbnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..e80939b3cab72956f247c6cf64f0e54add8dce1e --- /dev/null +++ b/configs/hymini-stm32v/usbnsh/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/hymini-stm32v/usbndh/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/hymini-stm32v/usbserial/Make.defs b/configs/hymini-stm32v/usbserial/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..8209827f16e0a61a3674caf102599f36b97329db --- /dev/null +++ b/configs/hymini-stm32v/usbserial/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/hymini-stm32v/usbserial/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/hymini-stm32v/usbserial/defconfig b/configs/hymini-stm32v/usbserial/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..7d41d164709057183b03df52448f7161d35bf756 --- /dev/null +++ b/configs/hymini-stm32v/usbserial/defconfig @@ -0,0 +1,1044 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +CONFIG_ARCH_CHIP_STM32F103VC=y +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +CONFIG_STM32_JTAG_DISABLE=y +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=49152 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_HYMINI_STM32V=y +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="hymini-stm32v" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=23 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="usbserial_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +CONFIG_PL2303=y +# CONFIG_PL2303_CONSOLE is not set +CONFIG_PL2303_EPINTIN=1 +CONFIG_PL2303_EPBULKOUT=2 +CONFIG_PL2303_EPBULKIN=3 +CONFIG_PL2303_EP0MAXPACKET=64 +CONFIG_PL2303_NWRREQS=4 +CONFIG_PL2303_NRDREQS=4 +CONFIG_PL2303_BULKIN_REQLEN=96 +CONFIG_PL2303_RXBUFSIZE=512 +CONFIG_PL2303_TXBUFSIZE=512 +CONFIG_PL2303_VENDORID=0x067b +CONFIG_PL2303_PRODUCTID=0x2303 +CONFIG_PL2303_VENDORSTR="Nuttx" +CONFIG_PL2303_PRODUCTSTR="USBdev Serial" +# CONFIG_CDCACM is not set +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +CONFIG_EXAMPLES_USBSERIAL=y +CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512 +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/hymini-stm32v/usbserial/setenv.sh b/configs/hymini-stm32v/usbserial/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..6b324148d2675a213d3f410de61f13c9e5d3b6e5 --- /dev/null +++ b/configs/hymini-stm32v/usbserial/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/hymini-stm32v/ostest/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/kwikstik-k40/Kconfig b/configs/kwikstik-k40/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f57a1421edcdf4e264d379175b0e6108975e9d3f --- /dev/null +++ b/configs/kwikstik-k40/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_KWIKSTIK_K40 +endif diff --git a/configs/kwikstik-k40/README.txt b/configs/kwikstik-k40/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..5d31bb232f54b0a5c35dfec03876ab192704349f --- /dev/null +++ b/configs/kwikstik-k40/README.txt @@ -0,0 +1,535 @@ +README.txt +========== + +This is the README file for the port of NuttX to the Freescale Kinetis +KwiStick K40. Refer to the Freescale web site for further information +about this part: +http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KWIKSTIK-K40 + +The Kwikstik is used with the FreeScale Tower System (mostly just to +provide a simple UART connection) + +Contents +======== + + o Kinetis KwikStik-K40 Features + o Kinetis KwikStik-K60 Pin Configuration + - On-Board Connections + - Connections via the General Purpose Tower Plug-in (TWRPI) Socket + - Connections via the Tower Primary Connector Side A + - Connections via the Tower Primary Connector Side B + - TWR-SER Serial Board Connection + o Development Environment + o GNU Toolchain Options + o IDEs + o NuttX EABI "buildroot" Toolchain + o NuttX OABI "buildroot" Toolchain + o NXFLAT Toolchain + +Kinetis KwikStik-K40 Features: +============================== + + o Kinetis K40 MCU in 144 LQFP + - 100 MHz ARM Cortex-M4 core + - 256Kb program flash, 256Kb FlexMemory + - Full-speed USB 2.0 device + - Low-pwer segment LCD controller + - SPI, UART, CAN and more + o Large segment LCD display with 306 segments + o 2.3mm audio output and 2 micro USB connectors + o Omnidirectional microphone and a buzzer + o On-board Segger J-Link debugger interface + o Infrared communication port + o microSD card slot + o Capacitive touch sensing interface + o Freescale Tower System connectivity for UART, timers, CAN, SPI, I2C, and DAC + o Freescale Tower plug-in (TWRPI) socket connectivity for ADC, SPI, I2C, and GPIO + +Kinetis KwikStik-K40 Pin Configuration +====================================== + +On-Board Connections +------------------- -------------------------- -------- ------------------- +FEATURE CONNECTION PORT/PIN PIN FUNCTION +------------------- -------------------------- -------- ------------------- +Audio Jack Output Audio Amp On PTE28 PTE28 + Audio Output DAC1_OUT DAC1_OUT + Volume Up PTD10 PTD10 + Volume Down PTD11 PTD11 +Buzzer Audio Out PTA8 FTM1_CH0 +Microphone Microphone input PTA7 ADC0_SE10 +SD Card Slot SD Clock PTE2 SDHC0_DCLK + SD Command PTE3 SDHC0_CMD + SD Data0 PTD12 SDHC0_D4 + SD Data1 PTD13 SDHC0_D5 + SD Data2 PTD14 SDHC0_D6 + SD Data3 PTD15 SDHC0_D7 + SD Card Detect PTE27 PTE27 + SD Card On PTE6 PTE6 +Infrared Port IR Transmit PTE4 IR_TX + IR Receive PTA13 CMP2_IN0 +Touch Pads E1 / Touch PTB0 TSI0_CH0 + E2 / Touch PTA4 TSI0_CH5 + E3 / Touch PTA24 PTA24 + E4 / Touch PTA25 PTA25 + E5 / Touch PTA26 PTA26 + E6 / Touch PTA27 PTA27 + +Connections via the General Purpose Tower Plug-in (TWRPI) Socket +------------------- -------------------------- -------- ------------------- +FEATURE CONNECTION PORT/PIN PIN FUNCTION +------------------- -------------------------- -------- ------------------- +General Purpose TWRPI AN0 (J8 Pin 8) ? ADC0_DP0/ADC1_DP3 +TWRPI Socket TWRPI AN1 (J8 Pin 9) ? ADC0_DM0/ADC1_DM3 + TWRPI AN2 (J8 Pin 12) ? ADC1_DP0/ADC0_DP3 + TWRPI ID0 (J8 Pin 17) ? ADC0_DP1 + TWRPI ID1 (J8 Pin 18) ? ADC0_DM1 + TWRPI I2C SCL (J9 Pin 3) PTC10 I2C1_SCL + TWRPI I2C SDA (J9 Pin 4) PTC11 I2C1_SDA + TWRPI SPI MISO (J9 Pin 9) PTB23 SPI2_SIN + TWRPI SPI MOSI (J9 Pin 10) PTB22 SPI2_SOUT + TWRPI SPI SS (J9 Pin 11) PTB20 SPI2_PCS0 + TWRPI SPI CLK (J9 Pin 12) PTB21 SPI2_SCK + TWRPI GPIO0 (J9 Pin 15) PTC12 PTC12 + TWRPI GPIO1 (J9 Pin 16) PTB9 PTB9 + TWRPI GPIO2 (J9 Pin 17) PTB10 PTB10 + TWRPI GPIO3 (J9 Pin 18) PTC5 PTC5 + TWRPI GPIO4 (J9 Pin 19) PTA5 PTA5 + +The KwikStik features an expansion card-edge connector that interfaces to the Primary Elevator board in a Tower system (Primary side). + +Connections via the Tower Primary Connector Side A +--- -------------------- -------------------------------- +PIN NAME USAGE +--- -------------------- -------------------------------- +A9 GPIO9 / CTS1 PTE10/UART_CTS +A43 RXD1 PTE9/UART_RX +A44 TXD1 PTE8/UART_TX +A63 RSTOUT_b PTA9/FTM1_CH1 + +Connections via the Tower Primary Connector Side B +--- -------------------- -------------------------------- +PIN NAME USAGE +--- -------------------- -------------------------------- +B21 GPIO1 / RTS1 PTE7/UART_RTS +B37 PWM7 PTA8/FTM1_CH0 +B38 PWM6 PTA9/FTM1_CH1 +B41 CANRX0 PTE25/CAN1_RX +B42 CANTX0 PTE24/CAN1_TX +B44 SPI0_MISO PTA17/SPI0_SIN +B45 SPI0_MOSI PTA16/SPI0_SOUT +B46 SPI0_CS0_b PTA14/SPI0_PCS0 +B48 SPI0_CLK PTA15/SPI0_SCK +B50 SCL1 PTE1/I2C1_SCL +B51 SDA1 PTE0/I2C1_SDA +B52 GPIO5 / SD_CARD_DET PTA16 + +TWR-SER Serial Board Connection +=============================== + +The serial board connects into the tower and then maps to the tower pins to +yet other functions (see TWR-SER.pdf). + +For the serial port, the following jumpers are required: + + J15: 1-2 (default) + J17: 1-2 (default) + J18: 1-2 (default) + J19: 1-2 (default) + +The two connections map as follows: + + A41 RXD0 - Not connected + A42 TXD0 - Not connected + A43 RXD1 - ELE_RXD (connects indirectory to DB-9 connector J8) + A44 TXD1 - ELE_TXD (connects indirectory to DB-9 connector J8) + +Finally, we can conclude that + + UART5 (PTE8/9) is associated with the DB9 connector + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +===================== + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the CodeSourcery Windows toolchain. To + use the devkitARM or the NuttX GNU toolchain, you simply need to change the + the following configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows) and devkitARM toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/k40, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/kinetis/k40_vectors.S. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M4 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M4 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + NOTE: The NuttX toolchain may not include optimizations for Cortex-M4 (ARMv7E-M). + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh kwikstik-k40/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M4 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +KwikStik-K40-specific Configuration Options +============================================ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=k40 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_MK40X256VLQ100 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=kwikstik-k40 (for the KwikStik-K40 development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_KWIKSTIK_K40=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibrate + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_KINETIS_TRACE -- Enable trace clocking on power up. + CONFIG_KINETIS_FLEXBUS -- Enable flexbus clocking on power up. + CONFIG_KINETIS_UART0 -- Support UART0 + CONFIG_KINETIS_UART1 -- Support UART1 + CONFIG_KINETIS_UART2 -- Support UART2 + CONFIG_KINETIS_UART3 -- Support UART3 + CONFIG_KINETIS_UART4 -- Support UART4 + CONFIG_KINETIS_UART5 -- Support UART5 + CONFIG_KINETIS_ENET -- Support Ethernet (K60 only) + CONFIG_KINETIS_RNGB -- Support the random number generator(K60 only) + CONFIG_KINETIS_FLEXCAN0 -- Support FlexCAN0 + CONFIG_KINETIS_FLEXCAN1 -- Support FlexCAN1 + CONFIG_KINETIS_SPI0 -- Support SPI0 + CONFIG_KINETIS_SPI1 -- Support SPI1 + CONFIG_KINETIS_SPI2 -- Support SPI2 + CONFIG_KINETIS_I2C0 -- Support I2C0 + CONFIG_KINETIS_I2C1 -- Support I2C1 + CONFIG_KINETIS_I2S -- Support I2S + CONFIG_KINETIS_DAC0 -- Support DAC0 + CONFIG_KINETIS_DAC1 -- Support DAC1 + CONFIG_KINETIS_ADC0 -- Support ADC0 + CONFIG_KINETIS_ADC1 -- Support ADC1 + CONFIG_KINETIS_CMP -- Support CMP + CONFIG_KINETIS_VREF -- Support VREF + CONFIG_KINETIS_SDHC -- Support SD host controller + CONFIG_KINETIS_FTM0 -- Support FlexTimer 0 + CONFIG_KINETIS_FTM1 -- Support FlexTimer 1 + CONFIG_KINETIS_FTM2 -- Support FlexTimer 2 + CONFIG_KINETIS_LPTIMER -- Support the low power timer + CONFIG_KINETIS_RTC -- Support RTC + CONFIG_KINETIS_SLCD -- Support the segment LCD (K40 only) + CONFIG_KINETIS_EWM -- Support the external watchdog + CONFIG_KINETIS_CMT -- Support Carrier Modulator Transmitter + CONFIG_KINETIS_USBOTG -- Support USB OTG (see also CONFIG_USBHOST and CONFIG_USBDEV) + CONFIG_KINETIS_USBDCD -- Support the USB Device Charger Detection module + CONFIG_KINETIS_LLWU -- Support the Low Leakage Wake-Up Unit + CONFIG_KINETIS_TSI -- Support the touch screen interface + CONFIG_KINETIS_FTFL -- Support FLASH + CONFIG_KINETIS_DMA -- Support DMA + CONFIG_KINETIS_CRC -- Support CRC + CONFIG_KINETIS_PDB -- Support the Programmable Delay Block + CONFIG_KINETIS_PIT -- Support Programmable Interval Timers + CONFIG_ARM_MPU -- Support the MPU + + Kinetis interrupt priorities (Default is the mid priority) These should + not be set because they can cause unhandled, nested interrupts. All + interrupts need to be at the default priority in the current design. + + CONFIG_KINETIS_UART0PRIO + CONFIG_KINETIS_UART1PRIO + CONFIG_KINETIS_UART2PRIO + CONFIG_KINETIS_UART3PRIO + CONFIG_KINETIS_UART4PRIO + CONFIG_KINETIS_UART5PRIO + + CONFIG_KINETIS_SDHC_PRIO + + PIN Interrupt Support + + CONFIG_GPIO_IRQ -- Enable pin interrupt support. Also needs + one or more of the following: + CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts + CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts + CONFIG_KINETIS_PORTCINTS -- Support 32 Port C interrupts + CONFIG_KINETIS_PORTDINTS -- Support 32 Port D interrupts + CONFIG_KINETIS_PORTEINTS -- Support 32 Port E interrupts + + Kinetis K40 specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn (n=0..5) for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. + CONFIG_UARTn_BITS - The number of bits. Must be either 8 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + + KwikStik-K40 LCD Hardware Configuration + + CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape" + support. Default is this 320x240 "landscape" orientation + (this setting is informative only... not used). + CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait" + orientation support. In this orientation, the KwikStik-K40's + LCD ribbon cable is at the bottom of the display. Default is + 320x240 "landscape" orientation. + CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse + portrait" orientation support. In this orientation, the + KwikStik-K40's LCD ribbon cable is at the top of the display. + Default is 320x240 "landscape" orientation. + CONFIG_LCD_BACKLIGHT - Define to support an adjustable backlight + using timer 1. The granularity of the settings is determined + by CONFIG_LCD_MAXPOWER. Requires CONFIG_KINETIS_TIM1. + +Configurations +============== + +Each KwikStik-K40 configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh kwikstik-k40/ + cd - + . ./setenv.sh + +Where is one of the following: + + ostest: + ------ + This configuration directory, performs a simple OS test using + examples/ostest. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default platform/toolchain: + + CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too). + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot (arm-nuttx-elf-gcc) + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : The older OABI version + CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary diff --git a/configs/kwikstik-k40/include/board.h b/configs/kwikstik-k40/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..76fc1de4ca774e97c0ede3ef22623a97da386875 --- /dev/null +++ b/configs/kwikstik-k40/include/board.h @@ -0,0 +1,285 @@ +/************************************************************************************ + * configs/kwikstik-k40/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The Kwikstik-K40 has a 4MHz crystal on board */ + +#undef BOARD_EXTCLOCK /* Crystal */ +#define BOARD_EXTAL_FREQ 4000000 /* 4MHz crystal frequency (REFCLK) */ +#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator */ + +/* PLL Configuration. NOTE: Only even frequency crystals are supported that will + * produce a 2MHz reference clock to the PLL. + * + * PLL Input frequency: PLLIN = REFCLK/PRDIV = 4MHz/2 = 2MHz + * PLL Output frequency: PLLOUT = PLLIN*VDIV = 2Mhz*48 = 96MHz + * MCG Frequency: PLLOUT = 96MHz + */ + +#define BOARD_PRDIV 2 /* PLL External Reference Divider */ +#define BOARD_VDIV 48 /* PLL VCO Divider (frequency multiplier) */ + +#define BOARD_PLLIN_FREQ (BOARD_EXTAL_FREQ / BOARD_PRDIV) +#define BOARD_PLLOUT_FREQ (BOARD_PLLIN_FREQ * BOARD_VDIV) +#define BOARD_MCG_FREQ BOARD_PLLOUT_FREQ + +/* SIM CLKDIV1 dividers */ + +#define BOARD_OUTDIV1 1 /* Core = MCG, 96MHz */ +#define BOARD_OUTDIV2 2 /* Bus = MCG/2, 48MHz */ +#define BOARD_OUTDIV3 2 /* FlexBus = MCG/2, 48MHz */ +#define BOARD_OUTDIV4 4 /* Flash clock = MCG/4, 24MHz */ + +#define BOARD_CORECLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV1) +#define BOARD_BUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV2) +#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3) +#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4) + +/* SDHC clocking ********************************************************************/ + +/* SDCLK configurations corresponding to various modes of operation. Formula is: + * + * SDCLK frequency = (base clock) / (prescaler * divisor) + * + * The SDHC module is always configure configured so that the core clock is the base + * clock. + */ + +/* Identification mode: 400KHz = 96MHz / ( 16 * 15) */ + +#define BOARD_SDHC_IDMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16 +#define BOARD_SDHC_IDMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15) + +/* MMC normal mode: 16MHz = 96MHz / (2 * 3) */ + +#define BOARD_SDHC_MMCMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +#define BOARD_SDHC_MMCMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) + +/* SD normal mode (1-bit): 16MHz = 96MHz / (2 * 3) */ + +#define BOARD_SDHC_SD1MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +#define BOARD_SDHC_SD1MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) + +/* SD normal mode (4-bit): 24MHz = 96MHz / (2 * 2) (with DMA) + * SD normal mode (4-bit): 16MHz = 96MHz / (2 * 3) (no DMA) + */ + +#ifdef CONFIG_SDIO_DMA +# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(2) +#else +//# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +//# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) +# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16 +# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15) +#endif + +/* LED definitions ******************************************************************/ +/* The KwikStik-K40 board has no MCU driven, GPIO-based LEDs */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/* Button definitions ***************************************************************/ +/* The KwikStik-K40 board has no standard GPIO contact buttons */ + +/* Alternative pin resolution *******************************************************/ +/* If there are alternative configurations for various pins in the + * kinetis_k40pinmux.h header file, those alternative pins will be labeled with a + * suffix like _1, _2, etc. The logic in this file must select the correct pin + * configuration for the board by defining a pin configuration (with no suffix) that + * maps to the correct alternative. + */ + +/* On-Board Connections + * + * ------------------- -------------------------- -------- ------------------- + * FEATURE CONNECTION PORT/PIN PIN FUNCTION + * ------------------- -------------------------- -------- ------------------- + * Audio Jack Output Audio Amp On PTE28 PTE28 + * Audio Output DAC1_OUT DAC1_OUT + * Volume Up PTD10 PTD10 + * Volume Down PTD11 PTD11 + * Buzzer Audio Out PTA8 FTM1_CH0 + * Microphone Microphone input PTA7 ADC0_SE10 + * SD Card Slot SD Clock PTE2 SDHC0_DCLK + * SD Command PTE3 SDHC0_CMD + * SD Data0 PTD12 SDHC0_D4 + * SD Data1 PTD13 SDHC0_D5 + * SD Data2 PTD14 SDHC0_D6 + * SD Data3 PTD15 SDHC0_D7 + * SD Card Detect PTE27 PTE27 + * SD Card On PTE6 PTE6 + * Infrared Port IR Transmit PTE4 IR_TX + * IR Receive PTA13 CMP2_IN0 + * Touch Pads E1 / Touch PTB0 TSI0_CH0 + * E2 / Touch PTA4 TSI0_CH5 + * E3 / Touch PTA24 PTA24 + * E4 / Touch PTA25 PTA25 + * E5 / Touch PTA26 PTA26 + * E6 / Touch PTA27 PTA27 + */ + +#define PIN_FTM1_CH0 PIN_FTM1_CH0_1 + +/* Connections via the General Purpose Tower Plug-in (TWRPI) Socket + * ------------------- -------------------------- -------- ------------------- + * FEATURE CONNECTION PORT/PIN PIN FUNCTION + * ------------------- -------------------------- -------- ------------------- + * General Purpose TWRPI AN0 (J8 Pin 8) ? ADC0_DP0/ADC1_DP3 + * TWRPI Socket TWRPI AN1 (J8 Pin 9) ? ADC0_DM0/ADC1_DM3 + * TWRPI AN2 (J8 Pin 12) ? ADC1_DP0/ADC0_DP3 + * TWRPI ID0 (J8 Pin 17) ? ADC0_DP1 + * TWRPI ID1 (J8 Pin 18) ? ADC0_DM1 + * TWRPI I2C SCL (J9 Pin 3) PTC10 I2C1_SCL + * TWRPI I2C SDA (J9 Pin 4) PTC11 I2C1_SDA + * TWRPI SPI MISO (J9 Pin 9) PTB23 SPI2_SIN + * TWRPI SPI MOSI (J9 Pin 10) PTB22 SPI2_SOUT + * TWRPI SPI SS (J9 Pin 11) PTB20 SPI2_PCS0 + * TWRPI SPI CLK (J9 Pin 12) PTB21 SPI2_SCK + * TWRPI GPIO0 (J9 Pin 15) PTC12 PTC12 + * TWRPI GPIO1 (J9 Pin 16) PTB9 PTB9 + * TWRPI GPIO2 (J9 Pin 17) PTB10 PTB10 + * TWRPI GPIO3 (J9 Pin 18) PTC5 PTC5 + * TWRPI GPIO4 (J9 Pin 19) PTA5 PTA5 + */ + +#define PIN_I2C1_SCL PIN_I2C1_SCL_1 +#define PIN_I2C1_SDA PIN_I2C1_SDA_1 +#define PIN_SPI2_SIN PIN_SPI2_SIN_1 +#define PIN_SPI2_SOUT PIN_SPI2_SOUT_1 +#define PIN_SPI2_PCS0 PIN_SPI2_PCS0_1 +#define PIN_SPI2_SCK PIN_SPI2_SCK_1 + +/* Connections via the Tower Primary Connector Side A + * --- -------------------- -------------------------------- + * PIN NAME USAGE + * --- -------------------- -------------------------------- + * A9 GPIO9 / CTS1 PTE10/UART_CTS + * A43 RXD1 PTE9/UART_RX + * A44 TXD1 PTE8/UART_TX + * A63 RSTOUT_b PTA9/FTM1_CH1 + */ + +#define PIN_UART5_CTS PIN_UART5_CTS_2 +#define PIN_FTM1_CH1 PIN_FTM1_CH1_1 + +/* Connections via the Tower Primary Connector Side B + * --- -------------------- -------------------------------- + * PIN NAME USAGE + * --- -------------------- -------------------------------- + * B21 GPIO1 / RTS1 PTE7/UART_RTS + * B37 PWM7 PTA8/FTM1_CH0 + * B38 PWM6 PTA9/FTM1_CH1 + * B41 CANRX0 PTE25/CAN1_RX + * B42 CANTX0 PTE24/CAN1_TX + * B44 SPI0_MISO PTA17/SPI0_SIN + * B45 SPI0_MOSI PTA16/SPI0_SOUT + * B46 SPI0_CS0_b PTA14/SPI0_PCS0 + * B48 SPI0_CLK PTA15/SPI0_SCK + * B50 SCL1 PTE1/I2C1_SCL + * B51 SDA1 PTE0/I2C1_SDA + * B52 GPIO5 / SD_CARD_DET PTA16 + */ + +#define PIN_UART3_RTS PIN_UART3_RTS_3 +#define PIN_CAN1_RX PIN_CAN1_RX_2 +#define PIN_CAN1_TX PIN_CAN1_TX_2 +#define PIN_SPI0_SIN PIN_SPI0_SIN_1 +#define PIN_SPI0_SOUT PIN_SPI0_SOUT_1 +#define PIN_SPI0_SCK PIN_SPI0_SCK_1 +#define PIN_SPI0_PCS0 PIN_SPI0_PCS0_1 +#define PIN_I2C1_SCL PIN_I2C1_SCL_2 +#define PIN_I2C1_SDA PIN_I2C1_SDA_2 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: kinetis_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +EXTERN void kinetis_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/kwikstik-k40/ostest/Make.defs b/configs/kwikstik-k40/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..b7632320e7550b1f256bc185407f9206706a62dc --- /dev/null +++ b/configs/kwikstik-k40/ostest/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/kwikstik-k40/ostest/Make.defs +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/kwikstik-k40/ostest/defconfig b/configs/kwikstik-k40/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..1f886be274e2ab42210f176edc95ab719abad7fe --- /dev/null +++ b/configs/kwikstik-k40/ostest/defconfig @@ -0,0 +1,711 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +CONFIG_ARCH_CHIP_KINETIS=y +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="kinetis" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Kinetis Configuration Options +# +# CONFIG_ARCH_CHIP_MK20DX256VLH7 is not set +# CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40N512VMD100 is not set +# CONFIG_ARCH_CHIP_MK40X128VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40X128VMD100 is not set +CONFIG_ARCH_CHIP_MK40X256VLQ100=y +# CONFIG_ARCH_CHIP_MK40X256VMD100 is not set +# CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60N256VMD100 is not set +# CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60N512VMD100 is not set +# CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60X256VMD100 is not set +# CONFIG_ARCH_FAMILY_K20 is not set +CONFIG_ARCH_FAMILY_K40=y +# CONFIG_ARCH_FAMILY_K60 is not set + +# +# Kinetis Peripheral Support +# +# CONFIG_KINETIS_TRACE is not set +# CONFIG_KINETIS_FLEXBUS is not set +# CONFIG_KINETIS_UART0 is not set +# CONFIG_KINETIS_UART1 is not set +# CONFIG_KINETIS_UART2 is not set +# CONFIG_KINETIS_UART3 is not set +# CONFIG_KINETIS_UART4 is not set +CONFIG_KINETIS_UART5=y +# CONFIG_KINETIS_FLEXCAN0 is not set +# CONFIG_KINETIS_FLEXCAN1 is not set +# CONFIG_KINETIS_SPI0 is not set +# CONFIG_KINETIS_SPI1 is not set +# CONFIG_KINETIS_SPI2 is not set +# CONFIG_KINETIS_I2C0 is not set +# CONFIG_KINETIS_I2C1 is not set +# CONFIG_KINETIS_I2S is not set +# CONFIG_KINETIS_DAC0 is not set +# CONFIG_KINETIS_DAC1 is not set +# CONFIG_KINETIS_ADC0 is not set +# CONFIG_KINETIS_ADC1 is not set +# CONFIG_KINETIS_CMP is not set +# CONFIG_KINETIS_VREF is not set +# CONFIG_KINETIS_SDHC is not set +# CONFIG_KINETIS_FTM0 is not set +# CONFIG_KINETIS_FTM1 is not set +# CONFIG_KINETIS_FTM2 is not set +# CONFIG_KINETIS_LPTIMER is not set +# CONFIG_KINETIS_RTC is not set +# CONFIG_KINETIS_SLCD is not set +# CONFIG_KINETIS_EWM is not set +# CONFIG_KINETIS_CMT is not set +# CONFIG_KINETIS_USBOTG is not set +# CONFIG_KINETIS_USBDCD is not set +# CONFIG_KINETIS_LLWU is not set +# CONFIG_KINETIS_TSI is not set +# CONFIG_KINETIS_FTFL is not set +# CONFIG_KINETIS_DMA is not set +# CONFIG_KINETIS_CRC is not set +# CONFIG_KINETIS_PDB is not set +# CONFIG_KINETIS_PIT is not set + +# +# Kinetis GPIO Interrupt Configuration +# +# CONFIG_GPIO_IRQ is not set + +# +# Kinetis UART Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=9535 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x1fff8000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_KWIKSTIK_K40=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="kwikstik-k40" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=25 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +CONFIG_ARCH_HAVE_UART5=y +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART5_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART5 Configuration +# +CONFIG_UART5_RXBUFSIZE=256 +CONFIG_UART5_TXBUFSIZE=256 +CONFIG_UART5_BAUD=115200 +CONFIG_UART5_BITS=8 +CONFIG_UART5_PARITY=0 +CONFIG_UART5_2STOP=0 +# CONFIG_UART5_IFLOWCONTROL is not set +# CONFIG_UART5_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=2048 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/kwikstik-k40/ostest/setenv.sh b/configs/kwikstik-k40/ostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..790030b1fd4bffdcff000f3e9f9c1b07a23e8932 --- /dev/null +++ b/configs/kwikstik-k40/ostest/setenv.sh @@ -0,0 +1,61 @@ +#!/bin/bash +# configs/kwikstik-k40/ostest/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/kwikstik-k40/scripts/ld.script b/configs/kwikstik-k40/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..bcd32829998bb332fd3db9adb7ae0020f43cf95c --- /dev/null +++ b/configs/kwikstik-k40/scripts/ld.script @@ -0,0 +1,142 @@ +/**************************************************************************** + * configs/kwikstik-k40/scripts/ld.script + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The K40X256VLQ100 has 256Kb of FLASH beginning at address 0x0000:0000 and + * 64Kb of SRAM beginning at address 0x1800:0000 (SRAM_L) and 0x2000:000 + * (SRAM_U). + * + * NOTE: that the first part of the K40 FLASH region is reserved for + * interrupt vectflash and, following that, is a region from 0x0000:0400 + * to 0x0000:040f that is reserved for the FLASH control fields (FCF). + * + * NOTE: The on-chip RAM is split evenly among SRAM_L and SRAM_U. The RAM is + * also implemented such that the SRAM_L and SRAM_U ranges form a + * contiguous block in the memory map. + */ + +MEMORY +{ + vectflash (rx) : ORIGIN = 0x00000000, LENGTH = 1K + cfmprotect (rx) : ORIGIN = 0x00000400, LENGTH = 16 + progflash (rx) : ORIGIN = 0x00000800, LENGTH = 256K - 2K + datasram (rwx) : ORIGIN = 0x1fff8000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +EXTERN(__flashconfigbytes) +SECTIONS +{ + .vectors : { + _svectors = ABSOLUTE(.); + *(.vectors) + _evectors = ABSOLUTE(.); + } > vectflash + + .cfmprotect : { + KEEP(*(.cfmconfig)) + } > cfmprotect + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progflash + + .ARM.extab : { + *(.ARM.extab*) + } > progflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progflash + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datasram AT > progflash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > datasram AT > progflash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datasram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/kwikstik-k40/src/.gitignore b/configs/kwikstik-k40/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/kwikstik-k40/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/kwikstik-k40/src/Makefile b/configs/kwikstik-k40/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..04a1da44509748a47638297caf0e2a2a24d18285 --- /dev/null +++ b/configs/kwikstik-k40/src/Makefile @@ -0,0 +1,61 @@ +############################################################################ +# configs/kwikstik-k40/src/Makefile +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = k40_boot.c k40_lcd.c k40_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += k40_leds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += k40_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += k40_appinit.c +endif + +ifeq ($(CONFIG_USBDEV),y) +CSRCS += k40_usbdev.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += k40_usbmsc.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/kwikstik-k40/src/k40_appinit.c b/configs/kwikstik-k40/src/k40_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..1fb77c36346424c3cbd689c7c8c0cacff28cd8bf --- /dev/null +++ b/configs/kwikstik-k40/src/k40_appinit.c @@ -0,0 +1,244 @@ +/**************************************************************************** + * config/kwikstik-k40/src/k40_appinit.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_KINETIS_SDHC +# include +# include +#endif + +#include "kinetis.h" +#include "kwikstik-k40.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_KWIKSTIK_K40 +# define NSH_HAVEUSBDEV 1 +# define NSH_HAVEMMCSD 1 +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0 +# error "Only one MMC/SD slot, slot 0" +# undef CONFIG_NSH_MMCSDSLOTNO +# endif +# ifndef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#else + /* Add configuration for new Kinetis boards here */ +# error "Unrecognized Kinetis board" +# undef NSH_HAVEUSBDEV +# undef NSH_HAVEMMCSD +#endif + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled or if SDHC support + * is not enabled. + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_KINETIS_SDHC) +# undef NSH_HAVEMMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/* We expect to receive GPIO interrupts for card insertion events */ + +#ifndef CONFIG_GPIO_IRQ +# error "CONFIG_GPIO_IRQ required for card detect interrupt" +#endif + +#ifndef CONFIG_KINETIS_PORTEINTS +# error "CONFIG_KINETIS_PORTEINTS required for card detect interrupt" +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure encapsulates the global variable used in this file and + * reduces the probability of name collistions. + */ + +#ifdef NSH_HAVEMMCSD +struct kinetis_nsh_s +{ + FAR struct sdio_dev_s *sdhc; /* SDIO driver handle */ + bool inserted; /* True: card is inserted */ +}; +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef NSH_HAVEMMCSD +static struct kinetis_nsh_s g_nsh; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: kinetis_mediachange + ****************************************************************************/ + +#ifdef NSH_HAVEMMCSD +static void kinetis_mediachange(void) +{ + bool inserted; + + /* Get the current value of the card detect pin. This pin is pulled up on + * board. So low means that a card is present. + */ + + inserted = !kinetis_gpioread(GPIO_SD_CARDDETECT); + + /* Has the pin changed state? */ + + if (inserted != g_nsh.inserted) + { + /* Yes.. perform the appropriate action (this might need some debounce). */ + + g_nsh.inserted = inserted; + sdhc_mediachange(g_nsh.sdhc, inserted); + } +} +#endif + +/**************************************************************************** + * Name: kinetis_cdinterrupt + ****************************************************************************/ + +#ifdef NSH_HAVEMMCSD +static int kinetis_cdinterrupt(int irq, FAR void *context) +{ + /* All of the work is done by kinetis_mediachange() */ + + kinetis_mediachange(); + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef NSH_HAVEMMCSD + int ret; + + /* Configure GPIO pins. + * + * First CD power. The initial state will provide SD power. + */ + + kinetis_pinconfig(GPIO_SD_CARDON); /* Applies power to the card */ + + /* Attached the card detect interrupt (but don't enable it yet) */ + + kinetis_pinconfig(GPIO_SD_CARDDETECT); + kinetis_pinirqattach(GPIO_SD_CARDDETECT, kinetis_cdinterrupt); + + /* Mount the SDHC-based MMC/SD block driver */ + /* First, get an instance of the SDHC interface */ + + syslog(LOG_INFO, "Initializing SDHC slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + + g_nsh.sdhc = sdhc_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!g_nsh.sdhc) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDHC slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDHC interface to the MMC/SD driver */ + + syslog(LOG_INFO, "Bind SDHC to the MMC/SD driver, minor=%d\n", + CONFIG_NSH_MMCSDMINOR); + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, g_nsh.sdhc); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to bind SDHC to the MMC/SD driver: %d\n", ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SDHC to the MMC/SD driver\n"); + + /* Handle the initial card state */ + + kinetis_mediachange(); + + /* Enable CD interrupts to handle subsequent media changes */ + + kinetis_pinirqenable(GPIO_SD_CARDDETECT); +#endif + return OK; +} diff --git a/configs/kwikstik-k40/src/k40_boot.c b/configs/kwikstik-k40/src/k40_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..1de6741cf0c7c623593ef4f7597a502f8ce11eeb --- /dev/null +++ b/configs/kwikstik-k40/src/k40_boot.c @@ -0,0 +1,102 @@ +/************************************************************************************ + * configs/kwikstik-k40/src/k40_boot.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "kwikstik-k40.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_boardinitialize + * + * Description: + * All Kinetis architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void kinetis_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * kinetis_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_KINETIS_SPI1) || defined(CONFIG_KINETIS_SPI2) + if (kinetis_spidev_initialize) + { + kinetis_spidev_initialize(); + } +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function kinetis_usbinitialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_KINETIS_USB) + if (kinetis_usbinitialize) + { + kinetis_usbinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/kwikstik-k40/src/k40_buttons.c b/configs/kwikstik-k40/src/k40_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..f3bf65d3d14084671cf0bbd2f7d41bad26ece1bc --- /dev/null +++ b/configs/kwikstik-k40/src/k40_buttons.c @@ -0,0 +1,127 @@ +/**************************************************************************** + * configs/kwikstik-k40/src/k40_buttons.c + * + * Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "kwikstik-k40.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state of + * all buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + /* The KwikStik-K40 board has no standard GPIO contact buttons */ +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + /* The KwikStik-K40 board has no standard GPIO contact buttons */ + + return 0; +} + +/**************************************************************************** + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state of + * all buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the + * BUTTON_*_BIT and JOYSTICK_*_BIT definitions in board.h for the meaning + * of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. + * See the BUTTON_* and JOYSTICK_* definitions in board.h for the meaning + * of enumeration value. The previous interrupt handler address is + * returned (so that it may be restored, if so desired). + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + /* The KwikStik-K40 board has no standard GPIO contact buttons */ + + return NULL; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/kwikstik-k40/src/k40_lcd.c b/configs/kwikstik-k40/src/k40_lcd.c new file mode 100644 index 0000000000000000000000000000000000000000..bd955fb4fac0afe3312860064319680f1f040ec6 --- /dev/null +++ b/configs/kwikstik-k40/src/k40_lcd.c @@ -0,0 +1,133 @@ +/************************************************************************************** + * configs/kwikstik-k40/src/k40_lcd.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************/ + +/************************************************************************************** + * Included Files + **************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "kwikstik-k40.h" + + +/************************************************************************************** + * Pre-processor Definitions + **************************************************************************************/ + +/* Configuration **********************************************************************/ + +/* Display/Color Properties ***********************************************************/ + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +#endif + +/************************************************************************************** + * Private Type Definition + **************************************************************************************/ + +/************************************************************************************** + * Private Function Prototypes + **************************************************************************************/ + +/************************************************************************************** + * Private Data + **************************************************************************************/ + +/************************************************************************************** + * Private Functions + **************************************************************************************/ + +/************************************************************************************** + * Public Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + **************************************************************************************/ + +int board_lcd_initialize(void) +{ + gvdbg("Initializing\n"); +#warning "Missing logic" + return OK; +} + +/************************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows support + * for multiple LCD devices. + * + **************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); +#warning "Missing logic" + return NULL; +} + +/************************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Unitialize the LCD support + * + **************************************************************************************/ + +void board_lcd_uninitialize(void) +{ +#warning "Missing logic" +} diff --git a/configs/kwikstik-k40/src/k40_leds.c b/configs/kwikstik-k40/src/k40_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..8a5cfe69ab0bbffe3a7643320f985639699c28e1 --- /dev/null +++ b/configs/kwikstik-k40/src/k40_leds.c @@ -0,0 +1,106 @@ +/**************************************************************************** + * configs/kwikstik-k40/src/k40_leds.c + * + * Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + * + * Description: + * Initialize LED GPIOs so that LEDs can be controlled. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + /* The KwikStik-K40 board has no MCU driven, GPIO-based LEDs */ +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + /* The KwikStik-K40 board has no MCU driven, GPIO-based LEDs */ +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + /* The KwikStik-K40 board has no MCU driven, GPIO-based LEDs */ +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/kwikstik-k40/src/k40_spi.c b/configs/kwikstik-k40/src/k40_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..7b14ea57b8b8ee2c78ef39120c20a831903cffd6 --- /dev/null +++ b/configs/kwikstik-k40/src/k40_spi.c @@ -0,0 +1,163 @@ +/************************************************************************************ + * configs/kwikstik-k40/src/k40_spi.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "kinetis.h" +#include "kwikstik-k40.h" + +#if defined(CONFIG_KINETIS_SPI1) || defined(CONFIG_KINETIS_SPI2) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef CONFIG_DEBUG_SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the KwikStik-K40 board. + * + ************************************************************************************/ + +void weak_function kinetis_spidev_initialize(void) +{ +# warning "Missing logic" +} + +/**************************************************************************** + * Name: kinetis_spi1/2/3select and kinetis_spi1/2/3status + * + * Description: + * The external functions, kinetis_spi1/2/3select and kinetis_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including kinetis_spibus_initialize()) + * are provided by common Kinetis logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in kinetis_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide kinetis_spi1/2/3select() and kinetis_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to kinetis_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by kinetis_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_KINETIS_SPI1 +void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +# warning "Missing logic" +} + +uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ +# warning "Missing logic" + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_KINETIS_SPI2 +void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +# warning "Missing logic" +} + +uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ +# warning "Missing logic" + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_KINETIS_SPI3 +void kinetis_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +# warning "Missing logic" +} + +uint8_t kinetis_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ +# warning "Missing logic" + return SPI_STATUS_PRESENT; +} +#endif + +#endif /* CONFIG_KINETIS_SPI1 || CONFIG_KINETIS_SPI2 */ diff --git a/configs/kwikstik-k40/src/k40_usbdev.c b/configs/kwikstik-k40/src/k40_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..cfd9f071e8a91be9aa20a1fa8a76db7a9549895c --- /dev/null +++ b/configs/kwikstik-k40/src/k40_usbdev.c @@ -0,0 +1,113 @@ +/************************************************************************************ + * configs/kwikstik-k40/src/k40_usbdev.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "kinetis.h" +#include "kwikstik-k40.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the KwikStik-K40 board. + * + ************************************************************************************/ + +void kinetis_usbinitialize(void) +{ +# warning "Missing logic" +} + +/************************************************************************************ + * Name: kinetis_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB software + * connect and disconnect), then the board software must provide kinetis_pullup. + * See include/nuttx/usb/usbdev.h for additional description of this method. + * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be + * NULL. + * + ************************************************************************************/ + +int kinetis_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); +# warning "Missing logic" + return OK; +} + +/************************************************************************************ + * Name: kinetis_usbsuspend + * + * Description: + * Board logic must provide the kinetis_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void kinetis_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +#warning "Missing logic" +} diff --git a/configs/kwikstik-k40/src/k40_usbmsc.c b/configs/kwikstik-k40/src/k40_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..1272abedec10ab365d6e3821e6de3a65b12ce3b1 --- /dev/null +++ b/configs/kwikstik-k40/src/k40_usbmsc.c @@ -0,0 +1,98 @@ +/**************************************************************************** + * configs/kwikstik-k40/src/k40_usbmsc.c + * + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the Kinetis MMC/SD block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "kinetis.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/* SLOT number(s) could depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_KWIKSTIK_K40 +# undef KINETIS_MMCSDSLOTNO +# define KINETIS_MMCSDSLOTNO 0 +#else + /* Add configuration for new Kinetis boards here */ +# error "Unrecognized Kinetis board" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization of the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* If system/usbmsc is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see k40_appinit.c). + * In this case, there is nothing further to be done here. + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS +# warning "Missing logic" +#endif /* CONFIG_NSH_BUILTIN_APPS */ + + return OK; +} diff --git a/configs/kwikstik-k40/src/kwikstik-k40.h b/configs/kwikstik-k40/src/kwikstik-k40.h new file mode 100644 index 0000000000000000000000000000000000000000..9460857888cd5bc95b3dcbbb46de665534f159ed --- /dev/null +++ b/configs/kwikstik-k40/src/kwikstik-k40.h @@ -0,0 +1,184 @@ +/************************************************************************************ + * configs/kwikstik-k40/src/kwikstik-k40.h + * arch/arm/src/board/kwikstik-k40.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_KWIKSTK_K40_SRC_KWIKSTIK_H +#define __CONFIGS_KWIKSTK_K40_SRC_KWIKSTIK_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* How many SPI modules does this chip support? The LM3S6918 supports 2 SPI + * modules (others may support more -- in such case, the following must be + * expanded). + */ + +#if KINETIS_NSPI < 1 +# undef CONFIG_KINETIS_SPI1 +# undef CONFIG_KINETIS_SPI2 +#elif KINETIS_NSPI < 2 +# undef CONFIG_KINETIS_SPI2 +#endif + +/* KwikStik-K40 GPIOs ***************************************************************/ +/* On-Board Connections + * + * ------------------- -------------------------- -------- ------------------- + * FEATURE CONNECTION PORT/PIN PIN FUNCTION + * ------------------- -------------------------- -------- ------------------- + * Audio Jack Output Audio Amp On PTE28 PTE28 + * Audio Output DAC1_OUT DAC1_OUT + * Volume Up PTD10 PTD10 + * Volume Down PTD11 PTD11 + * Buzzer Audio Out PTA8 FTM1_CH0 + * Microphone Microphone input PTA7 ADC0_SE10 + * SD Card Slot SD Clock PTE2 SDHC0_DCLK + * SD Command PTE3 SDHC0_CMD + * SD Data0 PTD12 SDHC0_D4 + * SD Data1 PTD13 SDHC0_D5 + * SD Data2 PTD14 SDHC0_D6 + * SD Data3 PTD15 SDHC0_D7 + * SD Card Detect PTE27 PTE27 + * SD Card On PTE6 PTE6 + * Infrared Port IR Transmit PTE4 IR_TX + * IR Receive PTA13 CMP2_IN0 + * Touch Pads E1 / Touch PTB0 TSI0_CH0 + * E2 / Touch PTA4 TSI0_CH5 + * E3 / Touch PTA24 PTA24 + * E4 / Touch PTA25 PTA25 + * E5 / Touch PTA26 PTA26 + * E6 / Touch PTA27 PTA27 + */ + +#define GPIO_SD_CARDDETECT (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTE | PIN27) +#define GPIO_SD_CARDON (GPIO_HIGHDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTE | PIN6) + +/* Connections via the General Purpose Tower Plug-in (TWRPI) Socket + * ------------------- -------------------------- -------- ------------------- + * FEATURE CONNECTION PORT/PIN PIN FUNCTION + * ------------------- -------------------------- -------- ------------------- + * General Purpose TWRPI AN0 (J8 Pin 8) ? ADC0_DP0/ADC1_DP3 + * TWRPI Socket TWRPI AN1 (J8 Pin 9) ? ADC0_DM0/ADC1_DM3 + * TWRPI AN2 (J8 Pin 12) ? ADC1_DP0/ADC0_DP3 + * TWRPI ID0 (J8 Pin 17) ? ADC0_DP1 + * TWRPI ID1 (J8 Pin 18) ? ADC0_DM1 + * TWRPI I2C SCL (J9 Pin 3) PTC10 I2C1_SCL + * TWRPI I2C SDA (J9 Pin 4) PTC11 I2C1_SDA + * TWRPI SPI MISO (J9 Pin 9) PTB23 SPI2_SIN + * TWRPI SPI MOSI (J9 Pin 10) PTB22 SPI2_SOUT + * TWRPI SPI SS (J9 Pin 11) PTB20 SPI2_PCS0 + * TWRPI SPI CLK (J9 Pin 12) PTB21 SPI2_SCK + * TWRPI GPIO0 (J9 Pin 15) PTC12 PTC12 + * TWRPI GPIO1 (J9 Pin 16) PTB9 PTB9 + * TWRPI GPIO2 (J9 Pin 17) PTB10 PTB10 + * TWRPI GPIO3 (J9 Pin 18) PTC5 PTC5 + * TWRPI GPIO4 (J9 Pin 19) PTA5 PTA5 + */ + +/* Connections via the Tower Primary Connector Side A + * --- -------------------- -------------------------------- + * PIN NAME USAGE + * --- -------------------- -------------------------------- + * A9 GPIO9 / CTS1 PTE10/UART_CTS + * A43 RXD1 PTE9/UART_RX + * A44 TXD1 PTE8/UART_TX + * A63 RSTOUT_b PTA9/FTM1_CH1 + */ + +/* Connections via the Tower Primary Connector Side B + * --- -------------------- -------------------------------- + * PIN NAME USAGE + * --- -------------------- -------------------------------- + * B21 GPIO1 / RTS1 PTE7/UART_RTS + * B37 PWM7 PTA8/FTM1_CH0 + * B38 PWM6 PTA9/FTM1_CH1 + * B41 CANRX0 PTE25/CAN1_RX + * B42 CANTX0 PTE24/CAN1_TX + * B44 SPI0_MISO PTA17/SPI0_SIN + * B45 SPI0_MOSI PTA16/SPI0_SOUT + * B46 SPI0_CS0_b PTA14/SPI0_PCS0 + * B48 SPI0_CLK PTA15/SPI0_SCK + * B50 SCL1 PTE1/I2C1_SCL + * B51 SDA1 PTE0/I2C1_SDA + * B52 GPIO5 / SD_CARD_DET PTA16 + */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the KwikStik-K40 board. + * + ************************************************************************************/ + +extern void weak_function kinetis_spidev_initialize(void); + +/************************************************************************************ + * Name: kinetis_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the KwikStik-K40 board. + * + ************************************************************************************/ + +extern void weak_function kinetis_usbinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_KWIKSTK_K40_SRC_KWIKSTIK_H */ + diff --git a/configs/launchxl-tms57004/Kconfig b/configs/launchxl-tms57004/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..8cf5cbfca55849e73574385cc8bad50800624956 --- /dev/null +++ b/configs/launchxl-tms57004/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_LAUNCHXL_TMS57004 + +endif # ARCH_BOARD_LAUNCHXL_TMS57004 diff --git a/configs/launchxl-tms57004/README.txt b/configs/launchxl-tms57004/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..a229479fa8c1ca9152fc2a7d1a8f49ea0326a3a1 --- /dev/null +++ b/configs/launchxl-tms57004/README.txt @@ -0,0 +1,225 @@ +README +====== + + This README provides some information about the port of NuttX to the TI + Hercules TMS570LS04x/03x LaunchPad Evaluation Kit (LAUNCHXL-TMS57004) + featuring the Hercules TMS570LS0432PZ chip. + +Contents +======== + + - Status + - Toolchain + - LEDs and Buttons + - Serial Console + - Debugging + - Configurations + +Status +====== + + 2015-12-29: + The basic port to the TMS570 is complete. After a few debug attempts, + I think I may have damaged my board or at least put it into a state where + I can no longer use it: The CPU NERROR LED illuminates and can't I re- + program the FLASH. + + I was never able to use Code Composer Studio or UniFlash with the board. + But I was initially able to load FLASH and debug using a Segger J-Link + connected to the board as described below. But I think that some of + my initial code loads put the TMS570 in bad state (or worse). Now + the NERROR LED is on. When I attempt to problem the FLASH, the J-Link + software complains that the CPU is running too slowly and then times + out trying to erase the FLASH. + + I have made several important code fixes since them (some of which might + improve this situation). But I have been unable to test them. At this + point I will have to give up on this port OR perhaps order a new card. + +Toolchain +========= + + Build Platform + -------------- + All of these configurations are set up to build with Cygwin under Windows + (unless stated otherwise in the description of the configuration). + + Endian-ness Issues + ------------------ + I started using the the "GNU Tools for ARM Embedded Processors" that is + maintained by ARM. + + https://launchpad.net/gcc-arm-embedded + + However, that tool chain will not support the TMS570 big-endian mode. + Certainly the -mbig-endian options will compiler for big-endian, but the + final link fails because there is no big-endian version lib libgcc. + + There are patches available here if you want to build that toolchain + from scratch: + + https://launchpad.net/gcc-arm-embedded/+question/27995 + + I now use a version of the NuttX buildroot toolchain that can be built like + this: + + cd buildroot/ + cp configs/cortexr4-armeb-eabi-4.8.3-defconfig .config + make oldconfig + make + + You have to have several obscure packages installed on your Linux or Cygwin + system to build the toolchain like this: GMP, MPFR, MPC, and probably + others. See the buildroot/README.txt file for additional important information + about building the toolchain. + + Reconfiguring + ------------- + The build configuration selections can easily be reconfigured using 'make + menuconfig'. Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Window environment + CONFIG_WINDOWS_CYGWIN=y : Cywin under Windows + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU ARM EABI toolchain + +LEDs and Buttons +================ + + LEDs + ---- + The launchpad has several LEDs: + + - LEd D1 (white) that connects to the USB +5V supply, + - LED D10 (red) that connects to the TMS570's NERROR pin, + - D5 (blue), D6 (blue), and D8 (blue) connect to the XDS100 FT2322, + - D7 (blue) connects to the XSD100 CPLD, and + - Two white, user LEDs labeled D12 that connects to the NHET08 + pin and D11 that connects to GIOA2. + + NHET08 is one of 32 N2HET pins than can be available to the user if + not used by N2HET. This implementation, however, uses only the single + LED driven by GIOA2. That LED is tied to ground and illuminated + with a high level output value. + + This LED is not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/tms570_autoleds.c. The LED is used to encode + OS-related events as follows: + + ------------------- ----------------------- ------ + SYMBOL Meaning LED + ------------------- ----------------------- ------ + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt N/C + LED_SIGNAL In a signal handler N/C + LED_ASSERTION An assertion failed N/C + LED_PANIC The system has crashed FLASH + + Thus if the LED is statically on, NuttX has successfully booted and is, + apparently, running normally. If the LED is flashing at approximately + 2Hz, then a fatal error has been detected and the system has halted. + + Buttons + ------- + The launchpad has three mechanical buttons. Two of these are reset buttons: + One button is labeled PORRST performs a power-on reset and one labeled RST + performs an MCU reset. Only one button is available for general software + usage. That button is labeled GIOA7 and is, obviously, sensed on GIOA7. + + GIOA7 is tied to ground, but will be pulled high if the GIOA7 button is + depressed. + +Serial Console +============== + + This TMS570 has a single SCI. The SCI_RX and TX pins are connected to + the FTDI chip which provides a virtual COM port for the launchpad. + +Debugging +========= + + I used a Segger J-Link connected to the Launchpad via the JTAG connector. + The following table shows how I connected the 14-pin JTAG connector on + the Launchpad to the Segger 20-pin JTAG connector: + + --- ----------- ------ ------------- --- ---------- ------ ------- + J12 LAUCHPAD J-LINK J-LINK J12 LAUCHPAD J-LINK J-LINK + PIN SIGNAL PIN SIGNAL PIN SIGNAL PIN SIGNAL + --- ----------- ------ ------------- --- ---------- ------ ------- + 1 TMS 7 TMS 2 TRTSN 3 nTRST + 3 TDI 5 TDI 4 GND 2 GND + 5 PD (+3V3) 1 VTref 6 N/C - N/C + 7 TDO 13 TDO 8 JTAG_SEL** 4 GND + 9 RTCK 11 RTCK 10 GND 6 GND + 11 TCK 9 TCK 12 GND 8 GND + 13 EMU0* - N/C 14 EMU1* - N/C + --- ----------- ------ ------------- --- ---------- ------ ------- + + * Pulled high on board + ** Needs to be grounded to select JTAG + +Configurations +============== + + Information Common to All Configurations + ---------------------------------------- + Each LaunchXL-TMS50704 configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh launchxl-tms57004/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make oldconfig + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. All of these configurations are set up to build under Windows using the + "GNU Tools for ARM Embedded Processors" that is maintained by ARM + (unless stated otherwise in the description of the configuration). + + https://launchpad.net/gcc-arm-embedded + + That toolchain selection can easily be reconfigured using + 'make menuconfig'. Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Window environment + CONFIG_WINDOWS_CYGWIN=y : Cywin under Windows + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU ARM EABI toolchain + +Configuration sub-directories +----------------------------- + + nsh: + + Configures the NuttShell (nsh) located at examples/nsh. diff --git a/configs/launchxl-tms57004/include/board.h b/configs/launchxl-tms57004/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..49d3930939838ee1cadcccd998c5803543ccc118 --- /dev/null +++ b/configs/launchxl-tms57004/include/board.h @@ -0,0 +1,279 @@ +/************************************************************************************ + * configs/launchxl-tms57004/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_LAUNCHXL_TMS57004_INCLUDE_BOARD_H +#define __CONFIGS_LAUNCHXL_TMS57004_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The LaunchXL-TMS57004 has a 16 MHz external crystal. */ + +#define BOARD_FCLKIN_FREQUENCY 16000000 /* 16 MHz crystal frequency */ + +/* The maximum frequency for the TMS570LS0432PZ is 80 MHz. + * + * REFCLKDIV controls input clock divider: + * + * NR = REFCLKDIV+1 + * Fintclk = Fclkin / NR + * + * PLLMUL controls multipler on divided input clock (Fintclk): + * + * Non-modulated: + * NF = (PLLMUL + 256) / 256 + * Modulated: + * NF = (PLLMUL + MULMOD + 256) / 256 + * + * Foutputclk = Fintclk x NF (150MHz - 550MHz) + * + * ODPLL controls internal PLL output divider: + * + * OD = ODPLL+1 + * Fpostodclk = Foutputclock / OD + * + * Final divisor, R, controls PLL output: + * + * R = PLLDIV + 1 + * Fpllclock = Fpostodclk / R + * + * Or: + * + * Fpllclock = = (Fclkin / NR) x NF / OD / R + * + * In this case, we have: + * + * Fclkin = 16,000,000 + * NR = 6 (REFCLKDIV=5) + * NF = 120 (PLLMUL = 119 * 256) + * OD = 1 (ODPLL = 0) + * R = 2 (PLLDIV=1) + * + * Then: + * + * Fintclk = 16 MHz / 6 = 2.667 MHz + * Foutputclock = 2.667 MHz * 120 = 320 MHz + * Fpostodclock = 320 MHz / 2 = 160 MHz + * Fpllclock = 160 MHz / 2 = 80 MHz + */ + +#define BOARD_PLL_NR 6 /* REFCLKDIV = 5 */ +#define BOARD_PLL_NF 120 /* PLLMUL = 119 * 256 */ +#define BOARD_PLL_OD 2 /* ODPLL = 1 */ +#define BOARD_PLL_R 2 /* PLLDIV = 1 */ +#define BOARD_PLL_FREQUENCY 80000000 + +/* Clock Sources / Dividers + * + * GCLK and HCLK are both driven by PLL1. + * VCLK is driven by HCLK (optionally by HCLK/2) + * RTICLK source is VCLK/2 (optionally from VCLK) + */ + +#define BOARD_VCLK_DIVIDER 1 +#define BOARD_VCLK2_DIVIDER 1 +#define BOARD_RTICLK_DIVIDER 2 + +/* Resulting frequencies: + * + * GCLK and HCLK are both driven by PLL1. + * VCLK is driven by HCLK (optionally by HCLK/2) + * RTICLK source is VCLK/2 (optionally from VCLK) + */ + +#define BOARD_GCLK_FREQUENCY BOARD_PLL_FREQUENCY +#define BOARD_HCLK_FREQUENCY BOARD_PLL_FREQUENCY +#define BOARD_VCLK_FREQUENCY (BOARD_HCLK_FREQUENCY / BOARD_VCLK_DIVIDER) +#define BOARD_RTICLK_FREQUENCY (BOARD_VCLK_FREQUENCY / BOARD_RTICLK_DIVIDER) + +/* FLASH wait states */ + +#define BOARD_ASWAIT 0 /* No address setup wait states */ +#define BOARD_RWAIT 1 /* One read access wait state */ +#define BOARD_EWAIT 4 /* Four wait states for EEPROM access */ + +/* PIN Multiplexor Initializer ******************************************************/ + +/* You may specify one alternative from each set (the first is the default and, + * hence, could probably be omitted): + * + * 1. {GIOA0, SPI3nCS3} + * 2. {GIOA1, SPI3nCS2} + * 3. {GIOA2, SPI3nCS1} + * 4. {GIOA3, SPI2nCS3} + * 5. {GIOA4, SPI2nCS2} + * 6. {GIOA5, EXTCLKIN} + * 7. {GIOA6, SPI2nCS1, N2HET31} + * 8. {GIOA7, N2HET29} + * 9. {MIBSPI1nCS2, N2HET20, N2HET19} + * 10. {SPI3CLK, EQEPA} + * 11. {SPI3nENA, EQEPB} + * 12. {SPI3nCS0, EQEPI}} + * 13. {MIBSPI1nCS3, N2HET26} + * 14. {ADEVT, N2HET28} + * 15. {MIBSPI1nENA, N2HET23, NHET30} + * 16. {MIBSPI1nCS1, EQEPS, N2HET17} + */ + +#define BOARD_PINMUX_INITIALIZER \ + PINMUX_GIOA0_PIN, \ + PINMUX_GIOA1_PIN, \ + PINMUX_GIOA2_PIN, \ + PINMUX_GIOA3_PIN, \ + PINMUX_GIOA4_PIN, \ + PINMUX_GIOA5_PIN, \ + PINMUX_GIOA6_PIN, \ + PINMUX_GIOA7_PIN, \ + PINMUX_MIBSPI1NCS2_PIN, \ + PINMUX_SPI3CLK_PIN, \ + PINMUX_SPI3NENA_PIN, \ + PINMUX_SPI3NCS0_PIN, \ + PINMUX_MIBSPI1NCS3_PIN, \ + PINMUX_ADEVT_PIN, \ + PINMUX_MIBSPI1NENA_PIN, \ + PINMUX_MIBSPI1NCS1_PIN + +/* LED definitions ******************************************************************/ +/* LEDs + * + * The launchpad has several LEDs: + * + * - LEd D1 (white) that connects to the USB +5V supply, + * - LED D10 (red) that connects to the TMS570's NERROR pin, + * - D5 (blue), D6 (blue), and D8 (blue) connect to the XDS100 FT2322, + * - D7 (blue) connects to the XSD100 CPLD, and + * - Two white, user LEDs labeled D12 that connects to the NHET08 + * pin and D11 that connects to GIOA2. + * + * NHET08 is one of 32 N2HET pins than can be available to the user if not used by + * N2HET. This implementation, however, uses only the single LED driven by GIOA2. + * That LED is tied to ground and illuminated with a high level output value. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED_D11 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_D11_BIT (1 << BOARD_LED_D11) + +/* This LED is not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/tms570_autoleds.c. The LED is used to encode + * OS-related events as follows: + */ + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_autoleds.c. The LEDs are used to encode + * OS-related events as follows: + * + * ---------------------- ---------------------------- ------ + * SYMBOL Meaning LED + * ---------------------- ---------------------------- ------ */ + +#define LED_STARTED 0 /* NuttX has been started OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON */ +#define LED_INIRQ 2 /* In an interrupt N/C */ +#define LED_SIGNAL 2 /* In a signal handler N/C */ +#define LED_ASSERTION 2 /* An assertion failed N/C */ +#define LED_PANIC 3 /* The system has crashed FLASH */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* Thus if the LED is statically on, NuttX has successfully booted and is, + * apparently, running normally. If the LED is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +/* Button definitions ***************************************************************/ +/* Buttons + * + * The launchpad has three mechanical buttons. Two of these are reset buttons: One + * button is labeled PORRST performs a power-on reset and one labeled RST performs + * an MCU reset. Only one button is available for general software usage. That + * button is labeled GIOA7 and is, obviously, sensed on GIOA7. + * + * GIOA7 is tied to ground, but will be pulled high if the GIOA7 button is + * depressed. + */ + +#define BUTTON_GIOA7 0 +#define NUM_BUTTONS 1 + +#define BUTTON_GIOA7_BIT (1 << BUTTON_GIOA7) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_LAUNCHXL_TMS57004_INCLUDE_BOARD_H */ diff --git a/configs/launchxl-tms57004/nsh/Make.defs b/configs/launchxl-tms57004/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..db2eff3d693960ad7c3bcf60d9d1007a45941149 --- /dev/null +++ b/configs/launchxl-tms57004/nsh/Make.defs @@ -0,0 +1,138 @@ +############################################################################ +# configs/launchxl-tms57004/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-r$(DELIM)Toolchain.defs + +LDSCRIPT = flash-sram.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-r4 -mbig-endian +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) +ifneq ($(CROSSDEV),armeb-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/launchxl-tms57004/nsh/defconfig b/configs/launchxl-tms57004/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c0a16a9c21c6f72cdbdc2e0cc933ce8132536248 --- /dev/null +++ b/configs/launchxl-tms57004/nsh/defconfig @@ -0,0 +1,844 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +CONFIG_ARCH_CHIP_TMS570=y +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_CORTEXR4=y +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-r" +CONFIG_ARCH_CHIP="tms570" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +# CONFIG_ARM_MPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y + +# +# ARMv7-A Configuration Options +# +CONFIG_ARMV7R_MEMINIT=y +# CONFIG_ARMV7R_HAVE_L2CC is not set +# CONFIG_ARMV7R_HAVE_L2CC_PL310 is not set +CONFIG_ARMV7R_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7R_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7R_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7R_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7R_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7R_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7R_OABI_TOOLCHAIN is not set +CONFIG_ARMV7R_HAVE_DECODEFIQ=y +# CONFIG_ARMV7R_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# TMS570 Configuration Options +# +# CONFIG_TMS570_HAVE_SCI2 is not set +# CONFIG_ARCH_CHIP_TMS570LS0232PZ is not set +# CONFIG_ARCH_CHIP_TMS570LS0332PZ is not set +CONFIG_ARCH_CHIP_TMS570LS0432PZ=y +# CONFIG_ARCH_CHIP_TMS570LS0714PZ is not set +# CONFIG_ARCH_CHIP_TMS570LS0714PGE is not set +# CONFIG_ARCH_CHIP_TMS570LS0714ZWT is not set +# CONFIG_ARCH_CHIP_TMS570LS1227ZWT is not set + +# +# TMS570 Peripheral Support +# +# CONFIG_TMS570_MIBADC is not set +# CONFIG_TMS570_DCAN1 is not set +# CONFIG_TMS570_DCAN2 is not set +# CONFIG_TMS570_QEP is not set +# CONFIG_TMS570_N2HET is not set +# CONFIG_TMS570_MIBASPI1 is not set +CONFIG_TMS570_SCI1=y +CONFIG_TMS570_GIO_IRQ=y +# CONFIG_TMS570_SELFTEST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +CONFIG_ARCH_STACKDUMP=y +CONFIG_ENDIAN_BIG=y +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20400000 +CONFIG_RAM_SIZE=393216 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LAUNCHXL_TMS57004=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="launchxl-tms57004" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +CONFIG_ARCH_HAVE_SCI1=y +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_SCI1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# SCI1 Configuration +# +CONFIG_SCI1_RXBUFSIZE=256 +CONFIG_SCI1_TXBUFSIZE=256 +CONFIG_SCI1_BAUD=9600 +CONFIG_SCI1_BITS=8 +CONFIG_SCI1_PARITY=0 +CONFIG_SCI1_2STOP=1 +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_HEXED is not set +CONFIG_SYSTEM_RAMTEST=y +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/launchxl-tms57004/nsh/setenv.sh b/configs/launchxl-tms57004/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..2f7b6d3ed86940a3ee3e7a41a0565da205736314 --- /dev/null +++ b/configs/launchxl-tms57004/nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/launchxl_tms570/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_armeb/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/launchxl-tms57004/scripts/flash-sram.ld b/configs/launchxl-tms57004/scripts/flash-sram.ld new file mode 100644 index 0000000000000000000000000000000000000000..810a2b9b5d8e97ea90e0c0e9a1510a41af56c171 --- /dev/null +++ b/configs/launchxl-tms57004/scripts/flash-sram.ld @@ -0,0 +1,116 @@ +/**************************************************************************** + * configs/launchxl-tms5700/scripts/flash-sram.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The TMS570LS0432PZ has 384KB of FLASH beginning at address 0x0000:0000 and + * 32Kb of SRAM beginining at 0x0800:0000 + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 384K + sram (rwx) : ORIGIN = 0x08000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +OUTPUT_FORMAT(elf32-bigarm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/launchxl-tms57004/src/Makefile b/configs/launchxl-tms57004/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..6b4d9ad28c5cb74d93b3ae8395e4dfa0a8d90608 --- /dev/null +++ b/configs/launchxl-tms57004/src/Makefile @@ -0,0 +1,55 @@ +############################################################################ +# configs/launchxl-tms57004/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = tms570_initialize.c tms570_bringup.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) + CSRCS += tms570_appinit.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) + CSRCS += tms570_autoleds.c +else + CSRCS += tms570_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) + CSRCS += tms570_buttons.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/launchxl-tms57004/src/launchxl-tms57004.h b/configs/launchxl-tms57004/src/launchxl-tms57004.h new file mode 100644 index 0000000000000000000000000000000000000000..2e7e91a64c9f281ce3382734558bda9a776aed6a --- /dev/null +++ b/configs/launchxl-tms57004/src/launchxl-tms57004.h @@ -0,0 +1,99 @@ +/**************************************************************************** + * config/launchxl-tms57004/src/launchxl-tms57004.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_LAUNCHXL_TMS57004_SRC_LAUNCHXL_TMS57004_H +#define __CONFIGS_LAUNCHXL_TMS57004_SRC_LAUNCHXL_TMS57004_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* LEDs + * + * The launchpad has several LEDs: + * + * - LEd D1 (white) that connects to the USB +5V supply, + * - LED D10 (red) that connects to the TMS570's NERROR pin, + * - D5 (blue), D6 (blue), and D8 (blue) connect to the XDS100 FT2322, + * - D7 (blue) connects to the XSD100 CPLD, and + * - Two white, user LEDs labeled D12 that connects to the NHET08 + * pin and D11 that connects to GIOA2. + * + * NHET08 is one of 32 N2HET pins than can be available to the user if not + * used by N2HET. This implementation, however, uses only the single LED + * driven by GIOA2. That LED is tied to ground and illuminated with a high + * level output value. + */ + +#define GIO_LED_D11 (GIO_OUTPUT | GIO_CFG_DEFAULT | GIO_OUTPUT_SET | \ + GIO_PORT_GIOA | GIO_PIN2) + +/* Buttons + * + * The launchpad has three mechanical buttons. Two of these are reset + * buttons: One button is labeled PORRST performs a power-on reset and one + * labeled RST performs an MCU reset. Only one button is available for + * general software usage. That button is labeled GIOA7 and is, obviously, + * sensed on GIOA7. + * + * GIOA7 is tied to ground, but will be pulled high if the GIOA7 button is + * depressed. + */ + +#define GIO_BUTTON (GIO_INPUT | GIO_CFG_PULLUP | GIO_INT_BOTHEDGES | \ + GIO_PORT_GIOA | GIO_PIN7) +#define IRQ_BUTTON TMS570_IRQ_GIOA7 + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: tms570_bringup + * + * Description: + * Bring up simulated board features + * + ****************************************************************************/ + +int tms570_bringup(void); + +#endif /* __CONFIGS_LAUNCHXL_TMS57004_SRC_LAUNCHXL_TMS57004_H */ diff --git a/configs/launchxl-tms57004/src/tms570_appinit.c b/configs/launchxl-tms57004/src/tms570_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..448ea165775c9850a2cbdfab8a02bc30162262bf --- /dev/null +++ b/configs/launchxl-tms57004/src/tms570_appinit.c @@ -0,0 +1,72 @@ +/**************************************************************************** + * configs/launchxl_tms57004/src/sim_appinit.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "launchxl-tms57004.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + ****************************************************************************/ + +#ifdef CONFIG_LIB_BOARDCTL +int board_app_initialize(void) +{ +#ifndef CONFIG_BOARD_INITIALIZE + /* Perform application level board initialization (if that was not already + * done in board_initialize(). + */ + + tms570_bringup(); +#endif + + return 0; +} +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/configs/launchxl-tms57004/src/tms570_autoleds.c b/configs/launchxl-tms57004/src/tms570_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..761986041d703f1804fc42bffe9eb54204f8dc3e --- /dev/null +++ b/configs/launchxl-tms57004/src/tms570_autoleds.c @@ -0,0 +1,143 @@ +/**************************************************************************** + * configs/launchxl-tms57004/include/tms570_autoleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* LEDs + * + * The launchpad has several LEDs: + * + * - LEd D1 (white) that connects to the USB +5V supply, + * - LED D10 (red) that connects to the TMS570's NERROR pin, + * - D5 (blue), D6 (blue), and D8 (blue) connect to the XDS100 FT2322, + * - D7 (blue) connects to the XSD100 CPLD, and + * - Two white, user LEDs labeled D12 that connects to the NHET08 + * pin and D11 that connects to GIOA2. + * + * NHET08 is one of 32 N2HET pins than can be available to the user if + * not used by N2HET. This implementation, however, uses only the single + * LED driven by GIOA2. That LED is tied to ground and illuminated + * with a high level output value. + * + * This LED is not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/tms570_autoleds.c. The LED is used to encode + * OS-related events as follows: + * + * ------------------- ----------------------- ------ + * SYMBOL Meaning LED + * ------------------- ----------------------- ------ + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt N/C + * LED_SIGNAL In a signal handler N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus if the LED is statically on, NuttX has successfully booted and is, + * apparently, running normally. If the LED is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "tms570_gio.h" +#include "launchxl-tms57004.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED GIOs for output */ + + tms570_configgio(GIO_LED_D11); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led == 1 || led == 3) + { + tms570_giowrite(GIO_LED_D11, true); /* High illuminates */ + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == 3) + { + tms570_giowrite(GIO_LED_D11, false); /* Low extinguishes */ + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/launchxl-tms57004/src/tms570_bringup.c b/configs/launchxl-tms57004/src/tms570_bringup.c new file mode 100644 index 0000000000000000000000000000000000000000..58b2773bf9b0b894527799ed00b44fa1f14d7e7f --- /dev/null +++ b/configs/launchxl-tms57004/src/tms570_bringup.c @@ -0,0 +1,65 @@ +/**************************************************************************** + * configs/launchxl-tms57004/src/tms570_bringup.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "launchxl-tms57004.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tms570_bringup + * + * Description: + * Bring up simulated board features + * + ****************************************************************************/ + +int tms570_bringup(void) +{ + return OK; +} diff --git a/configs/launchxl-tms57004/src/tms570_buttons.c b/configs/launchxl-tms57004/src/tms570_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..2d2741280dd1a8fddf761672f10a86f6f2ac7147 --- /dev/null +++ b/configs/launchxl-tms57004/src/tms570_buttons.c @@ -0,0 +1,199 @@ +/**************************************************************************** + * configs/sam4e-ek/src/tms570_buttons.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "tms570_gio.h" +#include "launchxl-tms57004.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#undef HAVE_IRQBUTTONS +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_TMS570_GIO_IRQ) +# define HAVE_IRQBUTTONS 1 +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef HAVE_IRQBUTTONS +static xcpt_t g_irq_button; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_irqx + * + * Description: + * This function implements the core of the board_button_irq() logic. + * + ****************************************************************************/ + +#ifdef HAVE_IRQBUTTONS +static xcpt_t board_button_irqx(gio_pinset_t pinset, int irq, + xcpt_t irqhandler, xcpt_t *store) +{ + xcpt_t oldhandler; + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the following + * operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = *store; + *store = irqhandler; + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + /* Configure the interrupt */ + + tms570_gioirq(pinset); + (void)irq_attach(irq, irqhandler); + tms570_gioirqenable(irq); + } + else + { + /* Detach and disable the interrupt */ + + (void)irq_detach(irq); + tms570_gioirqdisable(irq); + } + + leave_critical_section(flags); + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + /* Configure button GIOs */ + + (void)tms570_configgio(GIO_BUTTON); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return tms570_gioread(GIO_BUTTON) ? BUTTON_GIOA7_BIT : 0; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address is returned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_AVR32_GIOIRQ must be selected to enable the + * overall GIO IRQ feature and CONFIG_AVR32_GIOIRQSETA and/or + * CONFIG_AVR32_GIOIRQSETB must be enabled to select GIOs to support + * interrupts on. For button support, bits 2 and 3 must be set in + * CONFIG_AVR32_GIOIRQSETB (PB2 and PB3). + * + ****************************************************************************/ + +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ +#ifdef HAVE_IRQBUTTONS + if (id == BUTTON_GIOA7) + { + return board_button_irqx(GIO_BUTTON, IRQ_BUTTON, irqhandler, &g_irq_button); + } +#endif + + return NULL; + +} + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/launchxl-tms57004/src/tms570_initialize.c b/configs/launchxl-tms57004/src/tms570_initialize.c new file mode 100644 index 0000000000000000000000000000000000000000..b6b3d5950e2b2c7f3109d22942a63cd9219c3b72 --- /dev/null +++ b/configs/launchxl-tms57004/src/tms570_initialize.c @@ -0,0 +1,105 @@ +/**************************************************************************** + * config/launchxl-tms57004/src/moxart_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "launchxl-tms57004.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tms570_boardinitialize + * + * Description: + * All TMS570 architectures must provide the following entry point. This + * function is called near the beginning of _start. This function is + * called after clocking has been configured but before caches have been + * enabled and before any devices have been initialized. .data/.bss + * memory may or may not have been initialized (see the "special + * precautions" below). + * + * This function must perform low level initialization including + * + * - Initialization of board-specific memory resources (e.g., SDRAM) + * - Configuration of board specific resources (GPIOs, LEDs, etc). + * - Setup of the console UART. This UART done early so that the serial + * console is available for debugging very early in the boot sequence. + * + * Special precautions must be taken if .data/.bss lie in SRAM. in that + * case, the boot logic cannot initialize .data or .bss. The function + * must then: + * + * - Take precautions to assume that logic does not access any global + * data that might lie in SDRAM. + * - Call the function arm_data_initialize() as soon as SDRAM has been + * properly configured for use. + * + ****************************************************************************/ + +void tms570_board_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_initialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform application level board initialization */ + + tms570_bringup(); +} +#endif diff --git a/configs/launchxl-tms57004/src/tms570_userleds.c b/configs/launchxl-tms57004/src/tms570_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..efa63fb97c50306de62a04e1ab53b3c758e029ca --- /dev/null +++ b/configs/launchxl-tms57004/src/tms570_userleds.c @@ -0,0 +1,104 @@ +/**************************************************************************** + * configs/launchxl-tms57004/src/tms570_userleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* LEDs + * + * The launchpad has several LEDs: + * + * - LEd D1 (white) that connects to the USB +5V supply, + * - LED D10 (red) that connects to the TMS570's NERROR pin, + * - D5 (blue), D6 (blue), and D8 (blue) connect to the XDS100 FT2322, + * - D7 (blue) connects to the XSD100 CPLD, and + * - Two white, user LEDs labeled D12 that connects to the NHET08 + * pin and D11 that connects to GIOA2. + * + * NHET08 is one of 32 N2HET pins than can be available to the user if + * not used by N2HET. This implementation, however, uses only the single + * LED driven by GIOA2. That LED is tied to ground and illuminated + * with a high level output value. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "tms570_gio.h" +#include "launchxl-tms57004.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED PIOs for output */ + + tms570_configgio(GIO_LED_D11); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_LED_D11) + { + tms570_giowrite(GIO_LED_D11, !ledon); /* Low illuminates */ + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + /* Low illuminates */ + + tms570_giowrite(GIO_LED_D11, (ledset & BOARD_LED_D11_BIT) == 0)); +} diff --git a/configs/lincoln60/Kconfig b/configs/lincoln60/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..95493a732aedde6f8348a684ae797c4398d751e5 --- /dev/null +++ b/configs/lincoln60/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_LINCOLN60 +endif diff --git a/configs/lincoln60/README.txt b/configs/lincoln60/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..1bea5b5bfb066b128d4e2b9f56b08f67ce349d32 --- /dev/null +++ b/configs/lincoln60/README.txt @@ -0,0 +1,559 @@ +README +^^^^^^ + +README for NuttX port to the Micromint Lincoln 60 board + +Contents +^^^^^^^^ + + Lincoln 60 development board + Development Environment + GNU Toolchain Options + IDEs + NuttX EABI "buildroot" Toolchain + NuttX OABI "buildroot" Toolchain + NXFLAT Toolchain + USB Device Controller Functions + Lincoln 60 Configuration Options + USB Host Configuration + Configurations + +Lincoln 60 board +^^^^^^^^^^^^^^^^ + + Memory Map + ---------- + + Block Start Length + Name Address + --------------------- ---------- ------ + Internal flash 0x00000000 512K + RAM 0x10000000 32K + RAM1 0x2007C000 16K + RAM2 0x20080000 16K + + GPIO Usage: + ----------- + + GPIO PIN SIGNAL NAME + -------------------------------- ---- -------------- + P1[18] 32 LED1 + P3[26] 26 LED2 + P2[10] 53 BTN1 + + microSD PIN SIGNAL NAME + -------------------------------- ----- -------------- + P0[15] J12 3 SPI SCK + P0[17] J12 4 SPI MISO + P0[18] J12 5 SPI MOSI + P0[16] J18 5 SPI slave select + + Console + ------- + + The Lincoln 60 has two serial connectors. The serial console defaults + to COM1 (UART0). + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery or devkitARM toolchain, you simply need add one of the + following configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows)and devkitARM are Windows native toolchains. + The CodeSourcey (for Linux) and NuttX buildroot toolchains are Cygwin and/or + Linux native toolchains. There are several limitations to using a Windows based + toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lpc17xx, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/lpc17x/lpc17_vectors.S. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lincoln60/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conerntions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +Lincoln 60 Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc17xx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LPC1768=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=lincoln60 (for the Lincoln 60 board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_LINCOLN60=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x10000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + CONFIG_LPC17_MAINOSC=y + CONFIG_LPC17_PLL0=y + CONFIG_LPC17_PLL1=n + CONFIG_LPC17_ETHERNET=n + CONFIG_LPC17_USBHOST=n + CONFIG_LPC17_USBOTG=n + CONFIG_LPC17_USBDEV=n + CONFIG_LPC17_UART0=y + CONFIG_LPC17_UART1=n + CONFIG_LPC17_UART2=n + CONFIG_LPC17_UART3=n + CONFIG_LPC17_CAN1=n + CONFIG_LPC17_CAN2=n + CONFIG_LPC17_SPI=n + CONFIG_LPC17_SSP0=n + CONFIG_LPC17_SSP1=n + CONFIG_LPC17_I2C0=n + CONFIG_LPC17_I2C1=n + CONFIG_LPC17_I2S=n + CONFIG_LPC17_TMR0=n + CONFIG_LPC17_TMR1=n + CONFIG_LPC17_TMR2=n + CONFIG_LPC17_TMR3=n + CONFIG_LPC17_RIT=n + CONFIG_LPC17_PWM0=n + CONFIG_LPC17_MCPWM=n + CONFIG_LPC17_QEI=n + CONFIG_LPC17_RTC=n + CONFIG_LPC17_WDT=n + CONFIG_LPC17_ADC=n + CONFIG_LPC17_DAC=n + CONFIG_LPC17_GPDMA=n + CONFIG_LPC17_FLASH=n + + LPC17xx specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + LPC17xx specific CAN device driver settings. These settings all + require CONFIG_CAN: + + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined. + CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7 + + LPC17xx specific PHY/Ethernet device driver settings. These setting + also require CONFIG_NET and CONFIG_LPC17_ETHERNET. + + CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY + CONFIG_PHY_AUTONEG - Enable auto-negotion + CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. + CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex + + CONFIG_NET_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb + CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 18 + CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18 + CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented). + CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs + CONFIG_DEBUG. + CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets. + Also needs CONFIG_DEBUG. + CONFIG_NET_HASH - Enable receipt of near-perfect match frames. + CONFIG_LPC17_MULTICAST - Enable receipt of multicast (and unicast) frames. + Automatically set if CONFIG_NET_IGMP is selected. + + LPC17xx USB Device Configuration + + CONFIG_LPC17_USBDEV_FRAME_INTERRUPT + Handle USB Start-Of-Frame events. + Enable reading SOF from interrupt handler vs. simply reading on demand. + Probably a bad idea... Unless there is some issue with sampling the SOF + from hardware asynchronously. + CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT + Enable high priority interrupts. I have no idea why you might want to + do that + CONFIG_LPC17_USBDEV_NDMADESCRIPTORS + Number of DMA descriptors to allocate in SRAM. + CONFIG_LPC17_USBDEV_DMA + Enable lpc17xx-specific DMA support + CONFIG_LPC17_USBDEV_NOVBUS + Define if the hardware implementation does not support the VBUS signal + CONFIG_LPC17_USBDEV_NOLED + Define if the hardware implementation does not support the LED output + + LPC17xx USB Host Configuration + + CONFIG_USBHOST_OHCIRAM_SIZE + Total size of OHCI RAM (in AHB SRAM Bank 1) + CONFIG_USBHOST_NEDS + Number of endpoint descriptors + CONFIG_USBHOST_NTDS + Number of transfer descriptors + CONFIG_USBHOST_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_USBHOST_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_IOBUFSIZE + Size of one end-user I/O buffer. This can be zero if the + application can guarantee that all end-user I/O buffers + reside in AHB SRAM. + +USB Host Configuration +^^^^^^^^^^^^^^^^^^^^^^ + +The Lincoln 60 board supports a USB host interface. The hidkbd +example can be used to test this interface. + +The NuttShell (NSH) lincoln60 can also be modified in order to support USB +host operations. To make these modifications, do the following: + +1. First configure to build the NSH configuration from the top-level + NuttX directory: + + cd tools + ./configure lincoln60/nsh + cd .. + +2. Then edit the top-level .config file to enable USB host. Make the + following changes: + + CONFIG_LPC17_USBHOST=y + CONFIG_USBHOST=y + CONFIG_SCHED_WORKQUEUE=y + +When this change is made, NSH should be extended to support USB flash +devices. When a FLASH device is inserted, you should see a device +appear in the /dev (pseudo) directory. The device name should be +like /dev/sda, /dev/sdb, etc. The USB mass storage device, is present +it can be mounted from the NSH command line like: + + ls /dev + mount -t vfat /dev/sda /mnt/flash + +Files on the connect USB flash device should then be accessible under +the mountpoint /mnt/flash. + +Configurations +^^^^^^^^^^^^^^ + +Each Lincoln 60 configuration is maintained in a sub-directory and can be selected +as follow: + + cd tools + ./configure.sh lincoln60/ + cd - + . ./setenv.sh + +Where is one of the following: + + netnsh: + Configures the NuttShell (nsh) located at apps/examples/nsh. This + configuration is similar to the nsh configuration except that network + upport is enabled. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. This configuration is setup to build under Windows with Cygwin using + the CodeSourcery toolchain. That is, however, easily reconfigured. + + 3. This configuration uses a serial console on UART0 at 115200 8N1. + This is the serial port at the connector labelled COM1 on the + Lincoln 60. + + 3. This example does initializes the network, then NSH sequentially. It + does not use the NSH network monitor thread. There are two + consequences to this: 1) There will be a delay booting to the NSH + prompt while the network is brought up. This delay will normally be + small but it the network cable is unconnected, it can be very long + (you may thing that the firmware is hung). and 2) if the network is + unplugged, then re-connected. The network will not automatically be + brought back up. But you should be able to do that manually with + the NSH ifup command. + + If you want better, more responsive network management, look into + the NSH network monitor thread. + + nsh: + Configures the NuttShell (nsh) located at apps/examples/nsh. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. This configuration is setup to build under Linux with the Nutt + buildroot toolchain. That is, however, easily reconfigured. + + 3. This configuration uses a serial console on UART0 at 115200 8N1. + This is the serial port at the connector labelled COM1 on the + Lincoln 60. + + 3. This configuration enables only the serial NSH interface. See + notes above for enabling USB host support in this configuration. + + thttpd-binfs: + This builds the THTTPD web server example using the THTTPD and + the apps/examples/thttpd application. This version uses the built-in + binary format with the BINFS file system and the Union File System. + + NOTES: + + 1. Uses the CodeSourcery EABI toolchain under Windows. But that is + easily reconfigured: + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_HOST_WINDOWS_CYGWIN=y : under Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery toolchain + + STATUS: + 2015-06-06: The BINFS CGI files are seems to be running, but the + output that they generate does not appear in the browser window. + I am suspecting that the redirected output is not working correctly + with the BINFS applications. + diff --git a/configs/lincoln60/include/board.h b/configs/lincoln60/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..3ac74c0659a1af4f85cfbf4878bf9948d599ebee --- /dev/null +++ b/configs/lincoln60/include/board.h @@ -0,0 +1,234 @@ +/**************************************************************************** + * configs/lincoln60/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_LINCOLN60_INCLUDE_BOARD_H +#define __CONFIGS_LINCOLN60_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking ****************************************************************/ +/* NOTE: The following definitions require lpc17_syscon.h. It is not included here + * because the including C file may not have that file in its include path. + */ + +#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency */ +#define BOARD_OSCCLK_FREQUENCY BOARD_XTAL_FREQUENCY /* Main oscillator frequency */ +#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency */ +#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */ + +/* This is the clock setup we configure for: + * + * SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1 + * CCLCK = 480MHz / 6 = 80MHz -> CCLK divider = 6 + */ + +#define LPC17_CCLK 80000000 /* 80Mhz*/ + +/* Select the main oscillator as the frequency source. SYSCLK is then the frequency + * of the main oscillator. + */ + +#undef CONFIG_LPC17_MAINOSC +#define CONFIG_LPC17_MAINOSC 1 +#define BOARD_SCS_VALUE SYSCON_SCS_OSCEN + +/* Select the main oscillator and CCLK divider. The output of the divider is CCLK. + * The input to the divider (PLLCLK) will be determined by the PLL output. + */ + +#define BOARD_CCLKCFG_DIVIDER 6 +#define BOARD_CCLKCFG_VALUE ((BOARD_CCLKCFG_DIVIDER-1) << SYSCON_CCLKCFG_SHIFT) + +/* PLL0. PLL0 is used to generate the CPU clock divider input (PLLCLK). + * + * Source clock: Main oscillator + * PLL0 Multiplier value (M): 20 + * PLL0 Pre-divider value (N): 1 + * + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz + */ + +#undef CONFIG_LPC17_PLL0 +#define CONFIG_LPC17_PLL0 1 +#define BOARD_CLKSRCSEL_VALUE SYSCON_CLKSRCSEL_MAIN + +#define BOARD_PLL0CFG_MSEL 20 +#define BOARD_PLL0CFG_NSEL 1 +#define BOARD_PLL0CFG_VALUE \ + (((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLL0CFG_MSEL_SHIFT) | \ + ((BOARD_PLL0CFG_NSEL-1) << SYSCON_PLL0CFG_NSEL_SHIFT)) + +/* PLL1 -- Not used. */ + +#undef CONFIG_LPC17_PLL1 +#define BOARD_PLL1CFG_MSEL 36 +#define BOARD_PLL1CFG_NSEL 1 +#define BOARD_PLL1CFG_VALUE \ + (((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLL1CFG_MSEL_SHIFT) | \ + ((BOARD_PLL1CFG_NSEL-1) << SYSCON_PLL1CFG_NSEL_SHIFT)) + +/* USB divider. This divider is used when PLL1 is not enabled to get the + * USB clock from PLL0: + * + * USBCLK = PLL0CLK / 10 = 48MHz + */ + +#define BOARD_USBCLKCFG_VALUE SYSCON_USBCLKCFG_DIV10 + +/* FLASH Configuration */ + +#undef CONFIG_LPC17_FLASH +#define CONFIG_LPC17_FLASH 1 +#define BOARD_FLASHCFG_VALUE 0x0000303a + +/* Ethernet configuration */ + +#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV20 + +/* LED definitions *********************************************************/ +/* The Lincoln 60 has 2 LEDs along the bottom of the board. Green or off. + * If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows + * for NuttX debug functionality (where NC means "No Change"). + * + * During the boot phases. LED1 and LED2 will show boot status. + */ + /* LED1 LED2 */ +#define LED_STARTED 0 /* OFF OFF */ +#define LED_HEAPALLOCATE 1 /* GREEN OFF */ +#define LED_IRQSENABLED 2 /* OFF GREEN */ +#define LED_STACKCREATED 3 /* OFF OFF */ + +/* After the system is booted, this logic will no longer use LEDs 1 & 2. + * They are available for use the application software using lpc17_led + * (prototyped below) + */ + /* LED1 LED2 LED3 LED4 */ +#define LED_INIRQ 4 /* NC NC NC ON (momentary) */ +#define LED_SIGNAL 5 /* NC NC NC ON (momentary) */ +#define LED_ASSERTION 6 /* NC NC NC ON (momentary) */ +#define LED_PANIC 7 /* NC NC NC ON (1Hz flashing) */ + +#define GPIO_SSP0_SCK GPIO_SSP0_SCK_1 +#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_1 +#define GPIO_SSP0_MISO GPIO_SSP0_MISO_1 +#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_1 + +/* We need to redefine USB_PWRD as GPIO to get USB Host working + * Also remember to add 2 resistors of 15K to D+ and D- pins. + */ + +#ifdef CONFIG_USBHOST +# ifdef GPIO_USB_PWRD +# undef GPIO_USB_PWRD +# define GPIO_USB_PWRD (GPIO_INPUT | GPIO_PORT1 | GPIO_PIN22) +# endif +#endif + +/* Ethernet PHY */ + +#define GPIO_ENET_MDC GPIO_ENET_MDC_1 +#define GPIO_ENET_MDIO GPIO_ENET_MDIO_1 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. + * This entry point is called early in the initialization -- after all + * memory has been configured and mapped but before any devices have been + * initialized. + * + ****************************************************************************/ + +void lpc17_boardinitialize(void); + +/**************************************************************************** + * Name: lpc17_led + * + * Description: + * Once the system has booted, these functions can be used to control + * LEDs 1 & 2 + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void lpc17_led(int lednum, int state); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_LINCOLN60_INCLUDE_BOARD_H */ diff --git a/configs/lincoln60/netnsh/Make.defs b/configs/lincoln60/netnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..991b367b280142eadace682e7b42afd1b0c7b7ed --- /dev/null +++ b/configs/lincoln60/netnsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/lincoln60/netnsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lincoln60/netnsh/defconfig b/configs/lincoln60/netnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d8da29e553dd16aca96ffeb235862be0689b5bdc --- /dev/null +++ b/configs/lincoln60/netnsh/defconfig @@ -0,0 +1,1072 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +CONFIG_ARCH_CHIP_LPC1769=y +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +CONFIG_LPC17_SSP0=y +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=7296 +CONFIG_NET_NTXDESC=6 +CONFIG_NET_NRXDESC=6 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=7982 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=1536 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LINCOLN60=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lincoln60" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=20 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +CONFIG_ETH0_PHY_KSZ8041=y +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=36 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +CONFIG_NETUTILS_DHCPC=y +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# +# CONFIG_NSH_DHCPC is not set + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lincoln60/netnsh/setenv.sh b/configs/lincoln60/netnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3dd5a5b5812a783b7fbcd7fc15e2091c558dd60b --- /dev/null +++ b/configs/lincoln60/netnsh/setenv.sh @@ -0,0 +1,73 @@ +#!/bin/bash +# configs/lincoln60/netnsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lincoln60/nsh/Make.defs b/configs/lincoln60/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..30722c1d3a5be9416f480a5707791db026eb73a4 --- /dev/null +++ b/configs/lincoln60/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/lincoln60/nsh/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lincoln60/nsh/defconfig b/configs/lincoln60/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..71ddd71b8437099402a41ce90218387192b3e19f --- /dev/null +++ b/configs/lincoln60/nsh/defconfig @@ -0,0 +1,814 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +CONFIG_ARCH_CHIP_LPC1769=y +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_ETHERNET is not set +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +CONFIG_LPC17_SSP0=y +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=7982 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LINCOLN60=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lincoln60" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=20 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lincoln60/nsh/setenv.sh b/configs/lincoln60/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..dc3c011dbc522b567e5f6c2d72dd44175c951541 --- /dev/null +++ b/configs/lincoln60/nsh/setenv.sh @@ -0,0 +1,73 @@ +#!/bin/bash +# configs/lincoln60/nsh/setenv.sh +# +# Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lincoln60/scripts/ld.script b/configs/lincoln60/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..ece01a00a154cfddf9fcd0d5f81684601d770712 --- /dev/null +++ b/configs/lincoln60/scripts/ld.script @@ -0,0 +1,115 @@ +/**************************************************************************** + * configs/lincoln60/scripts/ld.script + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LPC1769 has 512Kb of FLASH beginning at address 0x0000:0000 and + * 64Kb of total SRAM: 32Kb of SRAM in the CPU block beginning at address + * 0x10000000 and 32Kb of AHB SRAM in two banks of 16Kb beginning at addresses + * 0x20070000 and 0x20080000. Here we assume that .data and .bss will all fit + * into the 32Kb CPU SRAM address range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K + sram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lincoln60/src/.gitignore b/configs/lincoln60/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/lincoln60/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/lincoln60/src/Makefile b/configs/lincoln60/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..07b3b39fde5127a8b4810bef7da302227035aedc --- /dev/null +++ b/configs/lincoln60/src/Makefile @@ -0,0 +1,53 @@ +############################################################################ +# configs/lincoln60/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc17_boot.c lpc17_leds.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc17_appinit.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += lpc17_usbmsc.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += lpc17_buttons.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/lincoln60/src/lincoln60.h b/configs/lincoln60/src/lincoln60.h new file mode 100644 index 0000000000000000000000000000000000000000..0f1372398014514cadb830f63f2ec908448e8bbd --- /dev/null +++ b/configs/lincoln60/src/lincoln60.h @@ -0,0 +1,116 @@ +/**************************************************************************** + * configs/lincoln60/src/lincoln60.h + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef _CONFIGS_LINCOLN60_SRC_LINCOLN60_H +#define _CONFIGS_LINCOLN60_SRC_LINCOLN60_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * LEDs GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P1[18] 32 LED1 + * P3[26] 26 LED2 + ****************************************************************************/ + +#define LINCOLN60_LED1 (GPIO_OUTPUT | GPIO_PORT1 | GPIO_PIN18) +#define LINCOLN60_LED1_OFF LINCOLN60_LED1 +#define LINCOLN60_LED1_ON (LINCOLN60_LED1 | GPIO_VALUE_ONE) +#define LINCOLN60_LED2 (GPIO_OUTPUT | GPIO_PORT3 | GPIO_PIN26) +#define LINCOLN60_LED2_OFF LINCOLN60_LED2 +#define LINCOLN60_LED2_ON (LINCOLN60_LED2 | GPIO_VALUE_ONE) + +#define LINCOLN60_HEARTBEAT LINCOLN60_LED2 + +/**************************************************************************** + * Buttons GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P2[10] 53 BTN1 + ****************************************************************************/ + +#define LINCOLN60_BUT1 (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT2 | \ + GPIO_PIN10) + +/* Button IRQ numbers */ + +#define LINCOLN60_BUT1_IRQ LPC17_IRQ_P0p23 + +/**************************************************************************** + * microSD PIN SIGNAL NAME + * -------------------------------- ----- -------------- + * P0[15] J12 3 SPI SCK + * P0[17] J12 4 SPI MISO + * P0[18] J12 5 SPI MOSI + * P0[16] J18 5 SPI slave select + ****************************************************************************/ + +#define LINCOLN60_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | \ + GPIO_PORT0 | GPIO_PIN16) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lincoln60_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Lincoln 60 board. + * + ****************************************************************************/ + +void weak_function lincoln60_sspdev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_LINCOLN60_SRC_LINCOLN60_H */ diff --git a/configs/lincoln60/src/lpc17_appinit.c b/configs/lincoln60/src/lpc17_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..a10646e751702e092c04c0474ae2e1117503512c --- /dev/null +++ b/configs/lincoln60/src/lpc17_appinit.c @@ -0,0 +1,69 @@ +/**************************************************************************** + * config/lincoln60/src/lpc17_appinit.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + return OK; +} diff --git a/configs/lincoln60/src/lpc17_boot.c b/configs/lincoln60/src/lpc17_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..36be2b997adce4a88e465ca143d750d5c28e4f35 --- /dev/null +++ b/configs/lincoln60/src/lpc17_boot.c @@ -0,0 +1,81 @@ +/************************************************************************************ + * configs/lincoln60/src/lpc17_boot.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lincoln60.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/lincoln60/src/lpc17_buttons.c b/configs/lincoln60/src/lpc17_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..9018c2ea36cc05983367740b53412d479978dd71 --- /dev/null +++ b/configs/lincoln60/src/lpc17_buttons.c @@ -0,0 +1,226 @@ +/**************************************************************************** + * configs/lincoln60/src/lpc17_buttons.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include + +#include "lpc17_gpio.h" +#include "lincoln60.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each STM3210E-EVAL button. This array is indexed by + * the BUTTON_* and JOYSTICK_* definitions in board.h + */ + +static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] = +{ + LINCOLN60_BUT1 +}; + +/* This array defines all of the interrupt handlers current attached to + * button events. + */ + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS]; + +/* This array provides the mapping from button ID numbers to button IRQ + * numbers. + */ + +static uint8_t g_buttonirq[BOARD_NUM_BUTTONS] = +{ + LINCOLN60_BUT1_IRQ +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as interrupting inputs. */ + + for (i = 0; i < BOARD_NUM_BUTTONS; i++) + { + lpc17_configgpio(g_buttoncfg[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons. + * + * board_buttons() may be called at any time to harvest the state of every + * button. The state of the buttons is returned as a bitset with one + * bit corresponding to each button: If the bit is set, then the button + * is pressed. See the BOARD_BUTTON_*_BIT and BOARD_JOYSTICK_*_BIT + * definitions in board.h for the meaning of each bit. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < BOARD_NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed. */ + + bool released = lpc17_gpioread(g_buttoncfg[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/**************************************************************************** + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_button_irq() may be called to register button interrupt handlers. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BOARD_BUTTON_* and BOARD_JOYSTICK_* definitions in board.h for the meaning + * of enumeration values. The previous interrupt handler address is returned + * (so that it may restored, if so desired). + * + * Note that board_button_irq() also enables button interrupts. Button + * interrupts will remain enabled after the interrupt handler is attached. + * Interrupts may be disabled (and detached) by calling board_button_irq with + * irqhandler equal to NULL. + * + ****************************************************************************/ + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + irqstate_t flags; + int irq; + + /* Verify that the button ID is within range */ + + if ((unsigned)id < BOARD_NUM_BUTTONS) + { + /* Return the current button handler and set the new interrupt handler */ + + oldhandler = g_buttonisr[id]; + g_buttonisr[id] = irqhandler; + + /* Disable interrupts until we are done */ + + flags = enter_critical_section(); + + /* Configure the interrupt. Either attach and enable the new + * interrupt or disable and detach the old interrupt handler. + */ + + irq = g_buttonirq[id]; + if (irqhandler) + { + /* Attach then enable the new interrupt handler */ + + (void)irq_attach(irq, irqhandler); + up_enable_irq(irq); + } + else + { + /* Disable then detach the old interrupt handler */ + + up_disable_irq(irq); + (void)irq_detach(irq); + } + leave_critical_section(flags); + } + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/lincoln60/src/lpc17_leds.c b/configs/lincoln60/src/lpc17_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..c3c4b515a6fd133f2971c8857a335054f4b23382 --- /dev/null +++ b/configs/lincoln60/src/lpc17_leds.c @@ -0,0 +1,215 @@ +/**************************************************************************** + * configs/lincoln60/src/lpc17_leds.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_gpio.h" + +#include "lincoln60.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS) +# define led_dumpgpio(m) lpc17_dumpgpio(LINCOLN60_LED2, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* LED definitions ****************************************************************** + +The Lincoln 60 has 2 LEDs along the bottom of the board. Green or off. +If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows for NuttX +debug functionality (where NC means "No Change"). + +During the boot phases. LED1 and LED2 will show boot status. + + LED1 LED2 +STARTED OFF OFF +HEAPALLOCATE BLUE OFF +IRQSENABLED OFF BLUE +STACKCREATED OFF OFF + +After the system is booted, this logic will no longer use LEDs 1 & 2. They +are available for use by applications using lpc17_led (prototyped below) +*/ + +static bool g_initialized; +static int g_nestcount; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure all LED GPIO lines */ + + led_dumpgpio("board_autoled_initialize() Entry)"); + + lpc17_configgpio(LINCOLN60_LED1); + lpc17_configgpio(LINCOLN60_LED2); + + led_dumpgpio("board_autoled_initialize() Exit"); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + /* We will control LED1 and LED2 not yet completed the boot sequence. */ + + if (!g_initialized) + { + int led1 = 0; + int led2 = 0; + switch (led) + { + case LED_STACKCREATED: + g_initialized = true; + case LED_STARTED: + default: + break; + + case LED_HEAPALLOCATE: + led1 = 1; + break; + + case LED_IRQSENABLED: + led2 = 1; + } + lpc17_led(LINCOLN60_LED1,led1); + lpc17_led(LINCOLN60_LED2,led2); + } + + /* We will always control the HB LED */ + + switch (led) + { + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + lpc17_gpiowrite(LINCOLN60_HEARTBEAT, false); + g_nestcount++; + + default: + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + /* In all states, OFF can only mean turning off the HB LED */ + + if (g_nestcount <= 1) + { + lpc17_led(LINCOLN60_HEARTBEAT, true); + g_nestcount = 0; + } + else + { + g_nestcount--; + } +} + +/************************************************************************************ + * Name: lpc17_led + * + * Description: + * Once the system has booted, these functions can be used to control the LEDs + * + ************************************************************************************/ + +void lpc17_led(int lednum, int state) + +{ + lpc17_gpiowrite(lednum, state); +} +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/lincoln60/thttpd-binfs/Make.defs b/configs/lincoln60/thttpd-binfs/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..a9f026a8ee5c5758f4d784295f2290c965ac328d --- /dev/null +++ b/configs/lincoln60/thttpd-binfs/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/lincoln60/thttpd-binfs/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lincoln60/thttpd-binfs/defconfig b/configs/lincoln60/thttpd-binfs/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..fe49078c526330a6fc20968b767f43b57bd1e9a4 --- /dev/null +++ b/configs/lincoln60/thttpd-binfs/defconfig @@ -0,0 +1,913 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +CONFIG_ARCH_CHIP_LPC1769=y +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=9696 +CONFIG_NET_NTXDESC=8 +CONFIG_NET_NRXDESC=8 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=7982 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LINCOLN60=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lincoln60" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2015 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="thttp_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGWORK=17 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1536 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=6144 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +CONFIG_ETH0_PHY_KSZ8041=y +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=64 +CONFIG_UART0_TXBUFSIZE=64 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=12 +CONFIG_NET_NACTIVESOCKETS=12 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=12 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_BINFS=y +# CONFIG_FS_PROCFS is not set +CONFIG_FS_UNIONFS=y + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +CONFIG_EXAMPLES_THTTPD=y +CONFIG_EXAMPLES_THTTPD_NOMAC=y +CONFIG_EXAMPLES_THTTPD_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_THTTPD=y +CONFIG_THTTPD_PORT=80 +CONFIG_THTTPD_IPADDR=0x0a000002 +CONFIG_THTTPD_SERVER_ADDRESS="http://www.nuttx.org" +CONFIG_THTTPD_SERVER_SOFTWARE="thttpd/2.25b 29dec2003-NuttX" +CONFIG_THTTPD_BINFS=y +CONFIG_THTTPD_PATH="/mnt/www" +CONFIG_THTTPD_CGI_PATH="/mnt/www/cgi-bin" +CONFIG_THTTPD_CGI_PATTERN="/mnt/www/cgi-bin/*" +CONFIG_THTTPD_CGI_PRIORITY=100 +CONFIG_THTTPD_CGI_STACKSIZE=1536 +CONFIG_THTTPD_CGI_BYTECOUNT=20000 +CONFIG_THTTPD_CGI_TIMELIMIT=0 +CONFIG_THTTPD_CHARSET="iso-8859-1" +CONFIG_THTTPD_IOBUFFERSIZE=512 +CONFIG_THTTPD_MINSTRSIZE=64 +CONFIG_THTTPD_REALLOCINCR=64 +CONFIG_THTTPD_MAXREALLOC=4096 +CONFIG_THTTPD_CGIINBUFFERSIZ=256 +CONFIG_THTTPD_CGIOUTBUFFERSIZE=256 +CONFIG_THTTPD_INDEX_NAMES="\"index.html\", \"index.htm\", \"index.cgi\"" +# CONFIG_THTTPD_USE_AUTH_FILE is not set +CONFIG_THTTPD_LISTEN_BACKLOG=8 +CONFIG_THTTPD_LINGER_MSEC=500 +CONFIG_THTTPD_OCCASIONAL_MSEC=120 +CONFIG_THTTPD_IDLE_READ_LIMIT_SEC=300 +CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300 +# CONFIG_THTTPD_USE_TILDE_MAP1 is not set +# CONFIG_THTTPD_USE_TILDE_MAP2 is not set +CONFIG_THTTPD_TILDE_MAP_NONE=y +# CONFIG_THTTPD_GENERATE_INDICES is not set +# CONFIG_THTTPD_USE_URLPATTERN is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lincoln60/thttpd-binfs/setenv.sh b/configs/lincoln60/thttpd-binfs/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..127d7f34029cad49a651fb3ef1e1cf985c80734b --- /dev/null +++ b/configs/lincoln60/thttpd-binfs/setenv.sh @@ -0,0 +1,73 @@ +#!/bin/bash +# configs/lincoln60/thttpd-binfs/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lm3s6432-s2e/Kconfig b/configs/lm3s6432-s2e/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..83ebb96025ecef5179a71ca98e57bc6fc5344fb2 --- /dev/null +++ b/configs/lm3s6432-s2e/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_LM3S6432S2E +endif diff --git a/configs/lm3s6432-s2e/README.txt b/configs/lm3s6432-s2e/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..5981dc790b7b7fd63a506784bd818fc0755e3525 --- /dev/null +++ b/configs/lm3s6432-s2e/README.txt @@ -0,0 +1,414 @@ +README +^^^^^^ + +README for NuttX port to the Stellaris RDK-S2E Reference Design Kit and +the MDL-S2E Ethernet to Serial module. + +Contents +^^^^^^^^ + + Stellaris RDK-S2E Reference Design Kit + Development Environment + GNU Toolchain Options + IDEs + NuttX EABI "buildroot" Toolchain + NuttX OABI "buildroot" Toolchain + NXFLFAT Toolchain + Stellaris MDL-S2E Reference Design Configuration Options + Configurations + +Stellaris RDK-S2E Reference Design Kit +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +The Stellaris RDK-S2E Reference Design Kit includes the following features: + + o MDL-S2E Ethernet to serial module + o LM3S6432 in a 10 x 10 mm BGA package for reduced board size + o 10/100 Mbit Ethernet port + o Auto MDI/MDIX cross-over correction + o Traffic and link indicators Serial ports + o UART ports include RTS/CTS for flow control + o UART0 has RS232 levels, transceiver runs at up to 230.4 Kbaud + o UART1 has CMOS/TTL levels, can run at 1.0 Mbaud + +Features of the LM3S6432 Microcontroller + + o 32-bit RISC performance using ARM® Cortex™-M3 v7M architecture + - 50-MHz operation + - Hardware-division and single-cycle-multiplication + - Integrated Nested Vectored Interrupt Controller (NVIC) + - 42 interrupt channels with eight priority levels + o 96 KB single-cycle flash + o 32 KB single-cycle SRAM + o Three general-purpose 32-bit timers + o Integrated Ethernet MAC and PHY + o Two fully programmable 16C550-type UARTs + o Three 10-bit channels (inputs) when used as single-ended inputs + o Two independent integrated analog comparators + o One I2C module + o One PWM generator block + – One 16-bit counter + – Two comparators + – Produces two independent PWM signals + – One dead-band generator + o 0 to 43 GPIOs, depending on user configuration + o On-chip low drop-out (LDO) voltage regulator + +GPIO Usage + +PIN SIGNAL Function +--- ----------------- --------------------------------------- + L3 PA0/U0RX UART0 receive + M3 PA1/U0TX UART0 transmit +E12 PB0/U0CTS UART0 CTS +D12 PB1/U0RTS UART0 RTS + L5 PA4/SPIRX SPI receive (pin hardwired to U1RX) + M5 PA5/SPITX SPI transmit (pin hardwired to U1TX) + H2 PD2/U1RX UART1 receive + H1 PD3/U1TX UART1 transmit + L4 PA3/U1CTS/SPICLK UART1 CTS or SPI clock + M4 PA2/U1RTS/SPISEL UART1 RTS or SPI slave select +J11 PF0/LED1 Ethernet LED1 (green) +J12 PF1/LED0 Ethernet LED0 (yellow) +C11 PB2 Transciever #INVALID +C12 PB3 Transciever #ENABLE + A6 PB4 Transciever ON + B7 PB5 Transciever #OFF + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux, Mac OS X or Cygwin on Windows can be used for the development + environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using GCC on + Mac OS X. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. The NuttX buildroot Toolchain (see below). + + To use a specific toolchain, you simply need to add one of the following + configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux or on Mac OS X. + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows) and devkitARM are Windows native toolchains. + The CodeSourcey (for Linux) and NuttX buildroot toolchains are Cygwin and/or Linux + native toolchains. There are several limitations to using a Windows based + toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lm, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/tiva/tiva_vectors.S. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + This port was tested with tools built using summon-arm-toolchain; available + from https://github.com/esden/summon-arm-toolchain, however the buildroot + instructions should apply for other platforms. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lm3s6432-s2e/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +Stellaris MDL-S2E Reference Design Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lm + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LM3S6432 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=lm3s6432-s2e (for the Stellaris MDL-S2E Reference Design) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_LM3S6432S2E + + CONFIG_ARCH_LOOPSPERMSEC - As supplied, calibrated for correct operation + of delay loops assuming 50MHz CPU frequency. + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + There are configurations for disabling support for interrupts GPIO ports. + GPIOH and GPIOJ must be disabled because they do not exist on the LM3S6432. + Additional interrupt support can be disabled if desired to reduce memory + footprint - GPIOs C-G are not pinned out on the MDL-S2E board. + + CONFIG_TIVA_GPIOA_IRQS=y + CONFIG_TIVA_GPIOB_IRQS=y + CONFIG_TIVA_GPIOC_IRQS=n << Always + CONFIG_TIVA_GPIOD_IRQS=n << Always + CONFIG_TIVA_GPIOE_IRQS=n << Always + CONFIG_TIVA_GPIOF_IRQS=n << Always + CONFIG_TIVA_GPIOG_IRQS=n << Always + CONFIG_TIVA_GPIOH_IRQS=n << Always + CONFIG_TIVA_GPIOJ_IRQS=n << Always + + LM3S6432 specific device driver settings + + CONFIG_UARTn_DISABLE + The TX and RX pins for UART1 share I/O pins with the TX and RX pins + for SSI0. To avoid conflicts, only one of SSI0 and UART1 should + be enabled in a configuration. + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is UART1). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + CONFIG_TIVA_SSI0 - Select to enable support for SSI0 + The TX and RX pins for SSI0 share I/O pins with the TX and RX pins + for UART1. To avoid conflicts, only one of SSI0 and UART1 should + be enabled in a configuration. + CONFIG_TIVA_SSI1 - Select to enable support for SSI1 + Note that the LM3S6432 only has one SSI, so SSI1 should always be + disabled. + CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support. + Poll-waiting is recommended if the interrupt rate would be to + high in the interrupt driven case. + CONFIG_SSI_TXLIMIT - Write this many words to the Tx FIFO before + emptying the Rx FIFO. If the SPI frequency is high and this + value is large, then larger values of this setting may cause + Rx FIFO overrun errors. Default: half of the Tx FIFO size (4). + + CONFIG_TIVA_ETHERNET - This must be set (along with CONFIG_NET) + to build the Stellaris Ethernet driver + CONFIG_TIVA_ETHLEDS - Enable to use Ethernet LEDs on the board. + CONFIG_TIVA_BOARDMAC - This should be set in order to use the + MAC address configured in the flash USER registers. + CONFIG_TIVA_ETHHDUPLEX - Set to force half duplex operation + CONFIG_TIVA_ETHNOAUTOCRC - Set to suppress auto-CRC generation + CONFIG_TIVA_ETHNOPAD - Set to suppress Tx padding + CONFIG_TIVA_MULTICAST - Set to enable multicast frames + CONFIG_TIVA_PROMISCUOUS - Set to enable promiscuous mode + CONFIG_TIVA_BADCRC - Set to enable bad CRC rejection. + CONFIG_TIVA_DUMPPACKET - Dump each packet received/sent to the console. + +Configurations +^^^^^^^^^^^^^^ + +Each Stellaris MDL-S2E Reference Design configuration is maintained in a +sub-directory and can be selected as follow: + + cd tools + ./configure.sh lm3s6432-s2e/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables both the serial and telnetd NSH interfaces. + + NOTE: As it is configured now, you MUST have a network connected. + Otherwise, the NSH prompt will not come up because the Ethernet + driver is waiting for the network to come up. That is probably + a bug in the Ethernet driver behavior! diff --git a/configs/lm3s6432-s2e/include/board.h b/configs/lm3s6432-s2e/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..33a9b56d88ae4472a3bf3a1c5c7aba3f2ed18eff --- /dev/null +++ b/configs/lm3s6432-s2e/include/board.h @@ -0,0 +1,129 @@ +/************************************************************************************ + * configs/lm3s6432-s2e/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* RCC settings */ + +#define SYSCON_RCC_XTAL SYSCON_RCC_XTAL8000KHZ /* S2E on-board crystal is 8.00 MHz */ +#define XTAL_FREQUENCY 8000000 + +/* Oscillator source is the main oscillator (not internal, internal/4, 30KHz or + * 30KHz from hibernate module) */ + +#define SYSCON_RCC_OSCSRC SYSCON_RCC_OSCSRC_MOSC +#define SYSCON_RCC2_OSCSRC SYSCON_RCC2_OSCSRC2_MOSC +#define OSCSRC_FREQUENCY XTAL_FREQUENCY + +/* Use system divider = 4; this corresponds to a system clock frequency + * of (400 / 2) / 4 = 50MHz + */ + +#define TIVA_SYSDIV 4 +#define SYSCLK_FREQUENCY 50000000 /* 50MHz */ + +/* Other RCC settings: + * + * - Main and internal oscillators enabled. + * - PLL and sys dividers not bypassed + * - PLL not powered down + * - No auto-clock gating reset + */ + +#define TIVA_RCC_VALUE (SYSCON_RCC_OSCSRC | SYSCON_RCC_XTAL | SYSCON_RCC_USESYSDIV | SYSCON_RCC_SYSDIV(TIVA_SYSDIV)) + +/* RCC2 settings -- RCC2 not used. Other RCC2 settings + * + * - PLL and sys dividers not bypassed. + * - PLL not powered down + * - Not using RCC2 + */ + +#define TIVA_RCC2_VALUE (SYSCON_RCC2_OSCSRC | SYSCON_RCC2_SYSDIV(TIVA_SYSDIV)) + +/* LED definitions ******************************************************************/ + +/* The S2E has two LEDs on PF2/PF3, shared with the Ethernet. + * In keeping with the other lm3s6xxx port, we use one of these for debugging. + * Below is the mapping of this + * single LED. From this single LED, we can get the following information: + * + * OFF Steady: The system has failed to boot to the point of enabling interrupts + * ON Steady: The systems has enabled interrupts, but none have been received + * Dull glow: The system is taking interrupts + * Slow blinking: The system has panicked + */ + /* ON OFF */ +#define LED_STARTED 0 /* OFF OFF */ +#define LED_HEAPALLOCATE 1 /* OFF OFF */ +#define LED_IRQSENABLED 2 /* ON ON */ +#define LED_STACKCREATED 3 /* ON ON */ +#define LED_INIRQ 4 /* ON OFF */ +#define LED_SIGNAL 5 /* ON OFF */ +#define LED_ASSERTION 6 /* ON OFF */ +#define LED_PANIC 7 /* ON OFF */ + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Stellaris architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/lm3s6432-s2e/nsh/Make.defs b/configs/lm3s6432-s2e/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..fda1b4dad9170414f9d16f0e25520d75eeb80faa --- /dev/null +++ b/configs/lm3s6432-s2e/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/lm3s6432-s2e/nsh/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lm3s6432-s2e/nsh/defconfig b/configs/lm3s6432-s2e/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..0c8509b814cc5a0c7f81e70ea18aead5c88c25c7 --- /dev/null +++ b/configs/lm3s6432-s2e/nsh/defconfig @@ -0,0 +1,1053 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +CONFIG_ARCH_CHIP_LM=y +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_LM3S6918 is not set +# CONFIG_ARCH_CHIP_LM3S9B96 is not set +CONFIG_ARCH_CHIP_LM3S6432=y +# CONFIG_ARCH_CHIP_LM3S6965 is not set +# CONFIG_ARCH_CHIP_LM3S8962 is not set +# CONFIG_ARCH_CHIP_LM4F120 is not set +CONFIG_ARCH_CHIP_LM3S=y +# CONFIG_LM_REVA2 is not set +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +# CONFIG_TIVA_HAVE_ADC0 is not set +# CONFIG_TIVA_HAVE_ADC1 is not set +# CONFIG_TIVA_I2C is not set +# CONFIG_TIVA_HAVE_I2C1 is not set +# CONFIG_TIVA_HAVE_I2C2 is not set +# CONFIG_TIVA_HAVE_I2C3 is not set +# CONFIG_TIVA_HAVE_I2C4 is not set +# CONFIG_TIVA_HAVE_I2C5 is not set +# CONFIG_TIVA_HAVE_I2C6 is not set +# CONFIG_TIVA_HAVE_I2C7 is not set +# CONFIG_TIVA_HAVE_I2C8 is not set +# CONFIG_TIVA_HAVE_I2C9 is not set +# CONFIG_TIVA_HAVE_UART3 is not set +# CONFIG_TIVA_HAVE_UART4 is not set +# CONFIG_TIVA_HAVE_UART5 is not set +# CONFIG_TIVA_HAVE_UART6 is not set +# CONFIG_TIVA_HAVE_UART7 is not set +CONFIG_TIVA_HAVE_SSI0=y +# CONFIG_TIVA_HAVE_SSI1 is not set +# CONFIG_TIVA_HAVE_SSI2 is not set +# CONFIG_TIVA_HAVE_SSI3 is not set +CONFIG_TIVA_HAVE_ETHERNET=y +# CONFIG_TIVA_SSI is not set +# CONFIG_TIVA_TIMER is not set +# CONFIG_TIVA_HAVE_TIMER0 is not set +# CONFIG_TIVA_HAVE_TIMER1 is not set +# CONFIG_TIVA_HAVE_TIMER2 is not set +# CONFIG_TIVA_HAVE_TIMER3 is not set +# CONFIG_TIVA_HAVE_TIMER4 is not set +# CONFIG_TIVA_HAVE_TIMER5 is not set +# CONFIG_TIVA_HAVE_TIMER6 is not set +# CONFIG_TIVA_HAVE_TIMER7 is not set +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +CONFIG_TIVA_UART0=y +CONFIG_TIVA_UART1=y +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_SSI0 is not set +CONFIG_TIVA_ETHERNET=y +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +CONFIG_TIVA_GPIO_IRQS=y +CONFIG_TIVA_HAVE_GPIOA_IRQS=y +CONFIG_TIVA_HAVE_GPIOB_IRQS=y +CONFIG_TIVA_HAVE_GPIOC_IRQS=y +CONFIG_TIVA_HAVE_GPIOD_IRQS=y +CONFIG_TIVA_HAVE_GPIOE_IRQS=y +CONFIG_TIVA_HAVE_GPIOF_IRQS=y +CONFIG_TIVA_HAVE_GPIOG_IRQS=y +# CONFIG_TIVA_HAVE_GPIOH_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +# CONFIG_TIVA_GPIOC_IRQS is not set +# CONFIG_TIVA_GPIOD_IRQS is not set +# CONFIG_TIVA_GPIOE_IRQS is not set +# CONFIG_TIVA_GPIOF_IRQS is not set +# CONFIG_TIVA_GPIOG_IRQS is not set + +# +# Stellaris Ethernet Configuration +# +# CONFIG_TIVA_ETHLEDS is not set +# CONFIG_TIVA_ETHHDUPLEX is not set +# CONFIG_TIVA_ETHNOAUTOCRC is not set +# CONFIG_TIVA_ETHNOPAD is not set +# CONFIG_TIVA_MULTICAST is not set +# CONFIG_TIVA_PROMISCUOUS is not set +# CONFIG_TIVA_TIMESTAMP is not set +# CONFIG_TIVA_BADCRC is not set +# CONFIG_TIVA_DUMPPACKET is not set +CONFIG_TIVA_BOARDMAC=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LM3S6432S2E=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lm3s6432-s2e" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=8 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=10 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_UART0_SERIAL_CONSOLE is not set +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_UART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +# CONFIG_NET_UDP_READAHEAD is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lm3s6432-s2e/nsh/setenv.sh b/configs/lm3s6432-s2e/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3cd011f121ed6a91465e90f4325711196b4528e6 --- /dev/null +++ b/configs/lm3s6432-s2e/nsh/setenv.sh @@ -0,0 +1,46 @@ +#!/bin/bash +# configs/lm3s6432-s2e/nsh/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lm3s6432-s2e/scripts/ld.script b/configs/lm3s6432-s2e/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..555eb77ba9e855bec6375c4f858e50492c73df25 --- /dev/null +++ b/configs/lm3s6432-s2e/scripts/ld.script @@ -0,0 +1,114 @@ +/**************************************************************************** + * configs/lm3s6432-s2e/scripts/ld.script + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LM3S6432 has 96Kb of FLASH beginning at address 0x0000:0000 and 32Kb + * of SRAM beginning at 0x2000:0000. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 96K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The LM3S6432 has 32Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lm3s6432-s2e/src/.gitignore b/configs/lm3s6432-s2e/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/lm3s6432-s2e/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/lm3s6432-s2e/src/Makefile b/configs/lm3s6432-s2e/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..256778057a1f28d071197c6656398591a1f0a48f --- /dev/null +++ b/configs/lm3s6432-s2e/src/Makefile @@ -0,0 +1,44 @@ +############################################################################ +# configs/lm3s6432-s2e/src/Makefile +# +# Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lm_boot.c lm_leds.c lm_ethernet.c lm_ssi.c +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lm_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/lm3s6432-s2e/src/lm3s6432-s2e.h b/configs/lm3s6432-s2e/src/lm3s6432-s2e.h new file mode 100644 index 0000000000000000000000000000000000000000..606b2f0ca944ab7416441bfd263809244bc73bcb --- /dev/null +++ b/configs/lm3s6432-s2e/src/lm3s6432-s2e.h @@ -0,0 +1,124 @@ +/************************************************************************************ + * configs/lm3s6432-s2e/src/lm3s6432-s2e.h + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_LM3S6432_S2E_SRC_LM3S6432S2E_H +#define __CONFIGS_LM3S6432_S2E_SRC_LM3S6432S2E_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include "chip.h" +#include "tiva_gpio.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* How many SSI modules does this chip support? The LM3S6432 supports 1 SSI + * module (others may support more than 2 -- in such case, the following must be + * expanded). + */ + +#if TIVA_NSSI == 0 +# undef CONFIG_TIVA_SSI0 +#endif +#undef CONFIG_TIVA_SSI1 + +/* LM3S6432 MDL-S2E *****************************************************************/ + +/* GPIO Usage + * + * PIN SIGNAL S2E Function + * --- ----------------- --------------------------------------- + * L3 PA0/U0RX Virtual COM port receive + * M3 PA1/U0TX Virtual COM port transmit + * E12 PB0/U0CTS Virtual COM port CTS + * D12 PB1/U0RTS Virtual COM port RTS + * L5 PA4/SPIRX SPI receive + * M5 PA5/SPITX SPI transmit + * H2 PD2/U1RX Virtual COM port receive + * H1 PD3/U1TX Virtual COM port transmit + * L4 PA3/U1CTS/SPICLK Virtual COM port CTS + * M4 PA2/U1RTS/SPISEL Virtual COM port RTS + * J11 PF0/LED1 Ethernet LED1 (green) + * J12 PF1/LED0 Ethernet LED0 (yellow) + * C11 PB2 Transciever #INVALID + * C12 PB3 Transciever #ENABLE + * A6 PB4 Transciever ON + * B7 PB5 Transciever #OFF + */ + +/* GPIO for LEDs: + * - PF0: User LED + */ + +#define LED1_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTF | 2) +#define LED0_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTF | 3) + +/* GPIO for SSI0 select + */ +#define SSICS_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTA | 3) + +/* GPIOs for the RS-232 transciever enable/disable. + * Default state for these enables the transciever. + */ +#define XCVR_INV_GPIO (GPIO_FUNC_INPUT | GPIO_PORTB | 2) +#define XCVR_ENA_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTB | 3) +#define XCVR_ON_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTB | 4) +#define XCVR_OFF_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTB | 5) + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: lm_ssidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the MDL-S2E. + * + ************************************************************************************/ + +void weak_function lm_ssidev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_LM3S6432_S2E_SRC_LM3S6432S2E_H */ + diff --git a/configs/lm3s6432-s2e/src/lm_appinit.c b/configs/lm3s6432-s2e/src/lm_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..ff7478542599335c6127c19232c39a52db0e1740 --- /dev/null +++ b/configs/lm3s6432-s2e/src/lm_appinit.c @@ -0,0 +1,69 @@ +/**************************************************************************** + * config/lm3s6432-s2e/src/lm_appinit.c + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + return OK; +} diff --git a/configs/lm3s6432-s2e/src/lm_boot.c b/configs/lm3s6432-s2e/src/lm_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..395f759d3dfa9f9bd25ee9fa99f488cc5b3a5e6b --- /dev/null +++ b/configs/lm3s6432-s2e/src/lm_boot.c @@ -0,0 +1,104 @@ +/************************************************************************************ + * configs/lm3s6432-s2e/src/lm_boot.c + * + * Copyright (C) 2010, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "up_internal.h" +#include "tiva_gpio.h" +#include "lm3s6432-s2e.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if defined(CONFIG_TIVA_UART1) && defined(CONFIG_TIVA_SSI0) +# error Only one of UART1 and SSI0 can be enabled on this board. +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Stellaris architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SSI is not disabled, and 2) the weak function + * lm_ssidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_TIVA_SSI0) + if (lm_ssidev_initialize) + { + lm_ssidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + + /* Configure serial transciever */ + + tiva_configgpio(XCVR_INV_GPIO); + tiva_configgpio(XCVR_ENA_GPIO); + tiva_configgpio(XCVR_ON_GPIO); + tiva_configgpio(XCVR_OFF_GPIO); +} diff --git a/configs/lm3s6432-s2e/src/lm_ethernet.c b/configs/lm3s6432-s2e/src/lm_ethernet.c new file mode 100644 index 0000000000000000000000000000000000000000..2d6bb5a08866699085fd87f26569e01514bdff3b --- /dev/null +++ b/configs/lm3s6432-s2e/src/lm_ethernet.c @@ -0,0 +1,98 @@ +/************************************************************************************ + * configs/lm3s6432-s3e/src/lm_ethernet.c + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "tiva_ethernet.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_ethernetmac + * + * Description: + * For the Ethernet Eval Kits, the MAC address will be stored in the non-volatile + * USER0 and USER1 registers. If CONFIG_TIVA_BOARDMAC is defined, this function + * will obtain the MAC address from these registers. + * + ************************************************************************************/ + +#ifdef CONFIG_TIVA_BOARDMAC +void tiva_ethernetmac(struct ether_addr *ethaddr) +{ + uint32_t user0; + uint32_t user1; + + /* Get the current value of the user registers */ + + user0 = getreg32(TIVA_FLASH_USERREG0); + user1 = getreg32(TIVA_FLASH_USERREG1); + + nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff); + DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff); + + /* Re-format that MAC address the way that uIP expects to see it */ + + ethaddr->ether_addr_octet[0] = ((user0 >> 0) & 0xff); + ethaddr->ether_addr_octet[1] = ((user0 >> 8) & 0xff); + ethaddr->ether_addr_octet[2] = ((user0 >> 16) & 0xff); + ethaddr->ether_addr_octet[3] = ((user1 >> 0) & 0xff); + ethaddr->ether_addr_octet[4] = ((user1 >> 8) & 0xff); + ethaddr->ether_addr_octet[5] = ((user1 >> 16) & 0xff); +} +#endif diff --git a/configs/lm3s6432-s2e/src/lm_leds.c b/configs/lm3s6432-s2e/src/lm_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..54bc5c188ff2864f48594d85138068b733374988 --- /dev/null +++ b/configs/lm3s6432-s2e/src/lm_leds.c @@ -0,0 +1,166 @@ +/**************************************************************************** + * configs/lm3s6432-s2e/src/lm_leds.c + * + * Copyright (C) 2010, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "tiva_gpio.h" +#include "lm3s6432-s2e.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef CONFIG_DEBUG_LEDS +# define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +static uint8_t g_nest; + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + leddbg("Initializing\n"); + + /* Configure Port F, Bit 2 as an output, initial value=OFF */ + + led_dumpgpio("board_autoled_initialize before tiva_configgpio()"); + tiva_configgpio(LED0_GPIO); + tiva_configgpio(LED1_GPIO); + led_dumpgpio("board_autoled_initialize after tiva_configgpio()"); + g_nest = 0; +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + case LED_STARTED: + case LED_HEAPALLOCATE: + default: + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + g_nest++; + case LED_IRQSENABLED: + case LED_STACKCREATED: + led_dumpgpio("board_autoled_on: before tiva_gpiowrite()"); + tiva_gpiowrite(LED1_GPIO, false); + led_dumpgpio("board_autoled_on: after tiva_gpiowrite()"); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + case LED_IRQSENABLED: + case LED_STACKCREATED: + case LED_STARTED: + case LED_HEAPALLOCATE: + default: + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + if (--g_nest <= 0) + { + led_dumpgpio("board_autoled_off: before tiva_gpiowrite()"); + tiva_gpiowrite(LED1_GPIO, true); + led_dumpgpio("board_autoled_off: after tiva_gpiowrite()"); + } + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/lm3s6432-s2e/src/lm_ssi.c b/configs/lm3s6432-s2e/src/lm_ssi.c new file mode 100644 index 0000000000000000000000000000000000000000..66882e7f10a4552191b40c68c104d8ae0a3ff9db --- /dev/null +++ b/configs/lm3s6432-s2e/src/lm_ssi.c @@ -0,0 +1,151 @@ +/************************************************************************************ + * configs/lm3s6432-s2e/src/lm_ssi.c + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "tiva_gpio.h" +#include "lm3s6432-s2e.h" + +#if defined(CONFIG_TIVA_SSI0) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SSI_DEBUG /* Define to enable debug */ +#undef SSI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SSI_DEBUG +# define ssidbg lldbg +# ifdef SSI_VERBOSE +# define ssivdbg lldbg +# else +# define ssivdbg(x...) +# endif +#else +# undef SSI_VERBOSE +# define ssidbg(x...) +# define ssivdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef SSI_VERBOSE +# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m) +#else +# define ssi_dumpgpio(m) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lm_ssidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the MDL-S2E. + * + ************************************************************************************/ + +void weak_function lm_ssidev_initialize(void) +{ + /* Configure the SPI CS GPIO */ + + ssi_dumpgpio("lm_ssidev_initialize() Entry)"); + tiva_configgpio(SSICS_GPIO); + ssi_dumpgpio("lm_ssidev_initialize() Exit"); +} + +/**************************************************************************** + * The external functions, tiva_ssiselect and tiva_ssistatus must be provided + * by board-specific logic. The are implementations of the select and status + * methods SPI interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * All othermethods (including tiva_ssibus_initialize()) are provided by common + * logic. To use this common SPI logic on your board: + * + * 1. Provide tiva_ssiselect() and tiva_ssistatus() functions in your + * board-specific logic. This function will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 2. Add a call to tiva_ssibus_initialize() in your low level initialization + * logic + * 3. The handle returned by tiva_ssibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssi_dumpgpio("tiva_ssiselect() Entry"); + + if (devid == SPIDEV_MMCSD) + { + /* Assert the CS pin to the card */ + + tiva_gpiowrite(SDCCS_GPIO, !selected); + } + + ssi_dumpgpio("tiva_ssiselect() Exit"); +} + +uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + ssidbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} + +#endif /* CONFIG_TIVA_SSI0 */ diff --git a/configs/lm3s6965-ek/Kconfig b/configs/lm3s6965-ek/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..d5a229d814c2c1fb1c5fea157bff7b3136877d79 --- /dev/null +++ b/configs/lm3s6965-ek/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_LM3S6965EK +endif diff --git a/configs/lm3s6965-ek/README.txt b/configs/lm3s6965-ek/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..3bec4c60755cd47a4fba60fdc72d004af1ba46b4 --- /dev/null +++ b/configs/lm3s6965-ek/README.txt @@ -0,0 +1,648 @@ +README +^^^^^^ + +README for NuttX port to the Stellaris LMS36965 Evaluation Kit + +Contents +^^^^^^^^ + + Stellaris LMS36965 Evaluation Kit + Development Environment + GNU Toolchain Options + IDEs + NuttX EABI "buildroot" Toolchain + NuttX OABI "buildroot" Toolchain + NXFLAT Toolchain + USB Device Controller Functions + OLED + Using OpenOCD and GDB with an FT2232 JTAG emulator + Stellaris LM3S6965 Evaluation Kit Configuration Options + Configurations + +Stellaris LMS36965 Evaluation Kit +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +The Stellaris LM3S6965 Evaluation Board includes the following features: + + o Stellaris LM3S6965 microcontroller with fully-integrated 10/100 embedded + Ethernet controller + o Simple setup; USB cable provides serial communication, debugging, and + power + o OLED graphics display with 128 x 96 pixel resolution + o User LED, navigation switches, and select pushbuttons + o Magnetic speaker + o LM3S6965 I/O available on labeled break-out pads + o Standard ARM® 20-pin JTAG debug connector with input and output modes + o USB interface for debugging and power supply + o MicroSD card slot + +Features of the LM3S6965 Microcontroller + + o 32-bit RISC performance using ARM® Cortex™-M3 v7M architecture + – 50-MHz operation + – Hardware-division and single-cycle-multiplication + – Integrated Nested Vectored Interrupt Controller (NVIC) + – 42 interrupt channels with eight priority levels + o 256 KB single-cycle flash + o 64 KB single-cycle SRAM + o Four general-purpose 32-bit timers + o Integrated Ethernet MAC and PHY + o Three fully programmable 16C550-type UARTs + o Four 10-bit channels (inputs) when used as single-ended inputs + o Two independent integrated analog comparators + o Two I2C modules + o Three PWM generator blocks + – One 16-bit counter + – Two comparators + – Produces two independent PWM signals + – One dead-band generator + o Two QEI modules with position integrator for tracking encoder position + o 0 to 42 GPIOs, depending on user configuration + o On-chip low drop-out (LDO) voltage regulator + +GPIO Usage + +PIN SIGNAL EVB Function +--- ----------- --------------------------------------- + 26 PA0/U0RX Virtual COM port receive + 27 PA1/U0TX Virtual COM port transmit + 10 PD0/IDX0 SD card chip select + 11 PD1/PWM1 Sound + 30 PA4/SSI0RX SD card data out + 31 PA5/SSI0TX SD card and OLED display data in + 28 PA2/SSI0CLK SD card and OLED display clock + 22 PC7/PHB0 OLED display data/control select + 29 PA3/SSI0FSS OLED display chip select + 73 PE1/PWM5 Down switch + 74 PE2/PHB1 Left switch + 72 PE0/PWM4 Up switch + 75 PE3/PHA1 Right switch + 61 PF1/IDX1 Select switch + 47 PF0/PWM0 User LED + 23 PC6/CCP3 Enable +15 V + +OLED +^^^^ + + The Evaluation Kit includes an OLED graphics display. Features: + + - RiT P14201 series display + - 128 columns by 96 rows + - 4-bit, 16-level gray scale. + - High-contrast (typ. 500:1) + - Excellent brightness (120 cd/m2) + - Fast 10 us response. + + The OLED display has a built-in controller IC with synchronous serial and + parallel interfaces (SSD1329). Synchronous serial (SSI) is used on the EVB. + The SSI port is shared with the microSD card slot. + + - PC7: OLED display data/control select (D/Cn) + - PA3: OLED display chip select (CSn) + + NOTE: Newer versions of the LM3S6965 Evaluation Kit has an OSAM 128x64x4 OLED + display. Some tweaks to drivers/lcd/p14201.c would be required to support that + LCD. + +Using OpenOCD and GDB with an FT2232 JTAG emulator +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + Building OpenOCD under Cygwin: + + Refer to configs/olimex-lpc1766stk/README.txt + + Installing OpenOCD in Linux: + + sudo apt-get install openocd + + Helper Scripts. + + I have been using the on-board FT2232 JTAG/SWD/SWO interface. OpenOCD + requires a configuration file. I keep the one I used last here: + + configs/lm3s6965-ek/tools/lm3s6965-ek.cfg + + However, the "correct" configuration script to use with OpenOCD may + change as the features of OpenOCD evolve. So you should at least + compare that lm3s6965-ek.cfg file with configuration files in + /usr/share/openocd/scripts. As of this writing, the configuration + files of interest were: + + /usr/share/openocd/scripts/interface/luminary.cfg + /usr/share/openocd/scripts/board/ek-lm3s6965.cfg + /usr/share/openocd/scripts/target/stellaris.cfg + + There is also a script on the tools/ directory that I use to start + the OpenOCD daemon on my system called oocd.sh. That script will + probably require some modifications to work in another environment: + + - Possibly the value of OPENOCD_PATH and TARGET_PATH + - It assumes that the correct script to use is the one at + configs/lm3s6965-ek/tools/lm3s6965-ek.cfg + + Starting OpenOCD + + Then you should be able to start the OpenOCD daemon like: + + configs/lm3s6965-ek/tools/oocd.sh $PWD + + Connecting GDB + + Once the OpenOCD daemon has been started, you can connect to it via + GDB using the following GDB command: + + arm-nuttx-elf-gdb + (gdb) target remote localhost:3333 + + NOTE: The name of your GDB program may differ. For example, with the + CodeSourcery toolchain, the ARM GDB would be called arm-none-eabi-gdb. + + After starting GDB, you can load the NuttX ELF file: + + (gdb) symbol-file nuttx + (gdb) monitor reset + (gdb) monitor halt + (gdb) load nuttx + + NOTES: + 1. Loading the symbol-file is only useful if you have built NuttX to + include debug symbols (by setting CONFIG_DEBUG_SYMBOLS=y in the + .config file). + 2. The MCU must be halted prior to loading code using 'mon reset' + as described below. + + OpenOCD will support several special 'monitor' commands. These + GDB commands will send comments to the OpenOCD monitor. Here + are a couple that you will need to use: + + (gdb) monitor reset + (gdb) monitor halt + + NOTES: + 1. The MCU must be halted using 'mon halt' prior to loading code. + 2. Reset will restart the processor after loading code. + 3. The 'monitor' command can be abbreviated as just 'mon'. + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery or devkitARM, you simply need to add one of the following + configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows) and devkitARM are Windows native toolchains. + The CodeSourcey (for Linux) and NuttX buildroot toolchains are Cygwin and/or Linux + native toolchains. There are several limitations to using a Windows based + toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + + NOTE 3: I recently (i.e., late 2011) tried building with the CodeSourcery Windows + toolchain. The code worked but required 40 seconds to boot (or even until the + status LED illuminates)!! Know idea why. With the buildroot tools, boot time is + a couple of seconds. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lm, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/tiva/tiva_vectors.S. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lm3s6965-ek/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +USB Device Controller Functions +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + Device Overview + + An FT2232 device from Future Technology Devices International Ltd manages + USB-to-serial conversion. The FT2232 is factory configured by Luminary + Micro to implement a JTAG/SWD port (synchronous serial) on channel A and + a Virtual COM Port (VCP) on channel B. This feature allows two simultaneous + communications links between the host computer and the target device using + a single USB cable. Separate Windows drivers for each function are provided + on the Documentation and Software CD. + + Debugging with JTAG/SWD + + The FT2232 USB device performs JTAG/SWD serial operations under the control + of the debugger or the Luminary Flash Programmer. It also operate as an + In-Circuit Debugger Interface (ICDI), allowing debugging of any external + target board. Debugging modes: + + MODE DEBUG FUNCTION USE SELECTED BY + 1 Internal ICDI Debug on-board LM3S6965 Default Mode + microcontroller over USB + interface. + 2 ICDI out to JTAG/SWD The EVB is used as a USB Connecting to an external + header to SWD/JTAG interface to target and starting debug + an external target. software. The red Debug Out + LED will be ON. + 3 In from JTAG/SWD For users who prefer an Connecting an external + header external debug interface debugger to the JTAG/SWD + (ULINK, JLINK, etc.) with header. + the EVB. + + Virtual COM Port + + The Virtual COM Port (VCP) allows Windows applications (such as HyperTerminal) + to communicate with UART0 on the LM3S6965 over USB. Once the FT2232 VCP + driver is installed, Windows assigns a COM port number to the VCP channel. + +Stellaris LM3S6965 Evaluation Kit Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lm + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LM3S6965 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=lm3s6965-ek (for the Stellaris LM3S6965 Evaluation Kit) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_LM3S6965EK + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + There are configurations for disabling support for interrupts GPIO ports. + GPIOJ must be disabled because it does not exist on the LM3S6965. + Additional interrupt support can be disabled if desired to reduce memory + footprint. + + CONFIG_TIVA_GPIOA_IRQS=y + CONFIG_TIVA_GPIOB_IRQS=y + CONFIG_TIVA_GPIOC_IRQS=y + CONFIG_TIVA_GPIOD_IRQS=y + CONFIG_TIVA_GPIOE_IRQS=y + CONFIG_TIVA_GPIOF_IRQS=y + CONFIG_TIVA_GPIOG_IRQS=y + CONFIG_TIVA_GPIOH_IRQS=y + CONFIG_TIVA_GPIOJ_IRQS=n << Always + + LM3S6965 specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + CONFIG_TIVA_SSI0 - Select to enable support for SSI0 + CONFIG_TIVA_SSI1 - Select to enable support for SSI1 + CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support. + Poll-waiting is recommended if the interrupt rate would be to + high in the interrupt driven case. + CONFIG_SSI_TXLIMIT - Write this many words to the Tx FIFO before + emptying the Rx FIFO. If the SPI frequency is high and this + value is large, then larger values of this setting may cause + Rx FIFO overrun errors. Default: half of the Tx FIFO size (4). + + CONFIG_TIVA_ETHERNET - This must be set (along with CONFIG_NET) + to build the Stellaris Ethernet driver + CONFIG_TIVA_ETHLEDS - Enable to use Ethernet LEDs on the board. + CONFIG_TIVA_BOARDMAC - If the board-specific logic can provide + a MAC address (via tiva_ethernetmac()), then this should be selected. + CONFIG_TIVA_ETHHDUPLEX - Set to force half duplex operation + CONFIG_TIVA_ETHNOAUTOCRC - Set to suppress auto-CRC generation + CONFIG_TIVA_ETHNOPAD - Set to suppress Tx padding + CONFIG_TIVA_MULTICAST - Set to enable multicast frames + CONFIG_TIVA_PROMISCUOUS - Set to enable promiscuous mode + CONFIG_TIVA_BADCRC - Set to enable bad CRC rejection. + CONFIG_TIVA_DUMPPACKET - Dump each packet received/sent to the console. + +Configurations +^^^^^^^^^^^^^^ + +Each Stellaris LM3S6965 Evaluation Kit configuration is maintained in a +sub-directory and can be selected as follow: + + cd tools + ./configure.sh lm3s6965-ek/ + cd - + . ./setenv.sh + +Where is one of the following: + + discover: + A configuration for the UDP discovery tool at apps/examples/discover. + Contributed by Max Holtzberg. + + NOTES: + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default platform/toolchain: + + CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too). + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot (arm-nuttx-elf-gcc) + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : The older OABI version + CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary + + 3. As it is configured now, you MUST have a network connected. + Otherwise, the NSH prompt will not come up because the Ethernet + driver is waiting for the network to come up. That is probably + a bug in the Ethernet driver behavior! + + nsh: + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables both the serial and telnetd NSH interfaces. + + NOTES: + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default platform/toolchain: + + CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too). + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot (arm-nuttx-elf-gcc) + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : The older OABI version + CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary + + 3. As it is configured now, you MUST have a network connected. + Otherwise, the NSH prompt will not come up because the Ethernet + driver is waiting for the network to come up. That is probably + a bug in the Ethernet driver behavior! + + 4. Network File System (NFS) support can be added by setting the + following in your configuration file: + + CONFIG_NFS=y + + nx: + And example using the NuttX graphics system (NX). This example + uses the P14201 OLED driver. + + NOTES: + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default platform/toolchain: + + CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too). + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot (arm-nuttx-elf-gcc) + CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary + + tcpecho: + This configuration builds the simple TCP echo example based on W.Richard + Steven UNIX Programming book to ensure correct usage of the socket API. + Contributed by Max Holtzberg. + + NOTES: + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default platform/toolchain: + + CONFIG_HOST_LINUX=y : Linux + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : Codesourcery for Linux + CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary + + 3. As it is configured now, you MUST have a network connected. + Otherwise, the NSH prompt will not come up because the Ethernet + driver is waiting for the network to come up. That is probably + a bug in the Ethernet driver behavior! diff --git a/configs/lm3s6965-ek/discover/Make.defs b/configs/lm3s6965-ek/discover/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..b3578aa89b123618b303f2d2a1f1e978f6359c64 --- /dev/null +++ b/configs/lm3s6965-ek/discover/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/lm3s6965-ek/discover/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lm3s6965-ek/discover/defconfig b/configs/lm3s6965-ek/discover/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..3a0a9d97456b813eb1ff61f41a24b023ebc1e2a4 --- /dev/null +++ b/configs/lm3s6965-ek/discover/defconfig @@ -0,0 +1,1079 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +CONFIG_ARCH_CHIP_LM=y +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_LM3S6918 is not set +# CONFIG_ARCH_CHIP_LM3S9B96 is not set +# CONFIG_ARCH_CHIP_LM3S6432 is not set +CONFIG_ARCH_CHIP_LM3S6965=y +# CONFIG_ARCH_CHIP_LM3S8962 is not set +# CONFIG_ARCH_CHIP_LM4F120 is not set +CONFIG_ARCH_CHIP_LM3S=y +# CONFIG_LM_REVA2 is not set +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +# CONFIG_TIVA_HAVE_ADC0 is not set +# CONFIG_TIVA_HAVE_ADC1 is not set +# CONFIG_TIVA_I2C is not set +CONFIG_TIVA_HAVE_I2C1=y +# CONFIG_TIVA_HAVE_I2C2 is not set +# CONFIG_TIVA_HAVE_I2C3 is not set +# CONFIG_TIVA_HAVE_I2C4 is not set +# CONFIG_TIVA_HAVE_I2C5 is not set +# CONFIG_TIVA_HAVE_I2C6 is not set +# CONFIG_TIVA_HAVE_I2C7 is not set +# CONFIG_TIVA_HAVE_I2C8 is not set +# CONFIG_TIVA_HAVE_I2C9 is not set +CONFIG_TIVA_HAVE_UART3=y +# CONFIG_TIVA_HAVE_UART4 is not set +# CONFIG_TIVA_HAVE_UART5 is not set +# CONFIG_TIVA_HAVE_UART6 is not set +# CONFIG_TIVA_HAVE_UART7 is not set +CONFIG_TIVA_HAVE_SSI0=y +# CONFIG_TIVA_HAVE_SSI1 is not set +# CONFIG_TIVA_HAVE_SSI2 is not set +# CONFIG_TIVA_HAVE_SSI3 is not set +CONFIG_TIVA_HAVE_ETHERNET=y +CONFIG_TIVA_SSI=y +# CONFIG_TIVA_TIMER is not set +# CONFIG_TIVA_HAVE_TIMER0 is not set +# CONFIG_TIVA_HAVE_TIMER1 is not set +# CONFIG_TIVA_HAVE_TIMER2 is not set +CONFIG_TIVA_HAVE_TIMER3=y +# CONFIG_TIVA_HAVE_TIMER4 is not set +# CONFIG_TIVA_HAVE_TIMER5 is not set +# CONFIG_TIVA_HAVE_TIMER6 is not set +# CONFIG_TIVA_HAVE_TIMER7 is not set +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_UART3 is not set +CONFIG_TIVA_SSI0=y +# CONFIG_TIVA_TIMER3 is not set +CONFIG_TIVA_ETHERNET=y +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +CONFIG_TIVA_GPIO_IRQS=y +CONFIG_TIVA_HAVE_GPIOA_IRQS=y +CONFIG_TIVA_HAVE_GPIOB_IRQS=y +CONFIG_TIVA_HAVE_GPIOC_IRQS=y +CONFIG_TIVA_HAVE_GPIOD_IRQS=y +CONFIG_TIVA_HAVE_GPIOE_IRQS=y +CONFIG_TIVA_HAVE_GPIOF_IRQS=y +CONFIG_TIVA_HAVE_GPIOG_IRQS=y +CONFIG_TIVA_HAVE_GPIOH_IRQS=y +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +CONFIG_TIVA_GPIOF_IRQS=y +CONFIG_TIVA_GPIOG_IRQS=y +# CONFIG_TIVA_GPIOH_IRQS is not set + +# +# Stellaris Ethernet Configuration +# +# CONFIG_TIVA_ETHLEDS is not set +# CONFIG_TIVA_ETHHDUPLEX is not set +# CONFIG_TIVA_ETHNOAUTOCRC is not set +# CONFIG_TIVA_ETHNOPAD is not set +# CONFIG_TIVA_MULTICAST is not set +# CONFIG_TIVA_PROMISCUOUS is not set +# CONFIG_TIVA_TIMESTAMP is not set +# CONFIG_TIVA_BADCRC is not set +# CONFIG_TIVA_DUMPPACKET is not set +# CONFIG_TIVA_BOARDMAC is not set + +# +# Tiva/Stellaris SSI Configuration +# +CONFIG_SSI_POLLWAIT=y +CONFIG_SSI_TXLIMIT=4 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LM3S6965EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lm3s6965-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=8 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +CONFIG_NETUTILS_DHCPC=y +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# +# CONFIG_NSH_DHCPC is not set + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lm3s6965-ek/discover/setenv.sh b/configs/lm3s6965-ek/discover/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..9153b0edf2ad3cd2d95f234c6dd8858189f21290 --- /dev/null +++ b/configs/lm3s6965-ek/discover/setenv.sh @@ -0,0 +1,71 @@ +#!/bin/bash +# configs/lm3s6965-ek/discover/setenv.sh +# +# Copyright (C) 2013, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location + +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. + +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the LM3S6995-EK tools directory + +export TOOL_BIN="${WD}/configs/lm3s6965-ek/tools" + +# Update the PATH variable + +export PATH="${TOOLCHAIN_BIN}:${TOOL_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" + diff --git a/configs/lm3s6965-ek/include/board.h b/configs/lm3s6965-ek/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..cf67c6b963514a367293c04e920b70b55174ba6a --- /dev/null +++ b/configs/lm3s6965-ek/include/board.h @@ -0,0 +1,127 @@ +/************************************************************************************ + * configs/lm3s6965-ek/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* RCC settings */ + +#define SYSCON_RCC_XTAL SYSCON_RCC_XTAL8000KHZ /* Eagle100 on-board crystall is 8.00 MHz */ +#define XTAL_FREQUENCY 8000000 + +/* Oscillator source is the main oscillator (not internal, internal/4, 30KHz or + * 30KHz from hibernate module) */ + +#define SYSCON_RCC_OSCSRC SYSCON_RCC_OSCSRC_MOSC +#define SYSCON_RCC2_OSCSRC SYSCON_RCC2_OSCSRC2_MOSC +#define OSCSRC_FREQUENCY XTAL_FREQUENCY + +/* Use system divider = 4; this corresponds to a system clock frequency + * of (400 / 2) / 4 = 50MHz + */ + +#define TIVA_SYSDIV 4 +#define SYSCLK_FREQUENCY 50000000 /* 50MHz */ + +/* Other RCC settings: + * + * - Main and internal oscillators enabled. + * - PLL and sys dividers not bypassed + * - PLL not powered down + * - No auto-clock gating reset + */ + +#define TIVA_RCC_VALUE (SYSCON_RCC_OSCSRC | SYSCON_RCC_XTAL | SYSCON_RCC_USESYSDIV | SYSCON_RCC_SYSDIV(TIVA_SYSDIV)) + +/* RCC2 settings -- RCC2 not used. Other RCC2 settings + * + * - PLL and sys dividers not bypassed. + * - PLL not powered down + * - Not using RCC2 + */ + +#define TIVA_RCC2_VALUE (SYSCON_RCC2_OSCSRC | SYSCON_RCC2_SYSDIV(TIVA_SYSDIV)) + +/* LED definitions ******************************************************************/ + +/* The LMS36965 Eval Kit has only one user LED: Port F, Bit 0. Below is the mapping of this + * single LED. From this single LED, we can get the following information: + * + * OFF Steady: The system has failed to boot to the point of enabling interrupts + * ON Steady: The systems has enabled interrupts, but none have been received + * Dull glow: The system is taking interrupts + * Slow blinking: The system has panicked + */ + /* ON OFF */ +#define LED_STARTED 0 /* OFF OFF */ +#define LED_HEAPALLOCATE 1 /* OFF OFF */ +#define LED_IRQSENABLED 2 /* ON ON */ +#define LED_STACKCREATED 3 /* ON ON */ +#define LED_INIRQ 4 /* ON OFF */ +#define LED_SIGNAL 5 /* ON OFF */ +#define LED_ASSERTION 6 /* ON OFF */ +#define LED_PANIC 7 /* ON OFF */ + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Stellaris architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/lm3s6965-ek/nsh/Make.defs b/configs/lm3s6965-ek/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..035e23651bd54920cd65f496b340913d25d2c603 --- /dev/null +++ b/configs/lm3s6965-ek/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/lm3s6965-ek/nsh/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lm3s6965-ek/nsh/defconfig b/configs/lm3s6965-ek/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..3a0a9d97456b813eb1ff61f41a24b023ebc1e2a4 --- /dev/null +++ b/configs/lm3s6965-ek/nsh/defconfig @@ -0,0 +1,1079 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +CONFIG_ARCH_CHIP_LM=y +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_LM3S6918 is not set +# CONFIG_ARCH_CHIP_LM3S9B96 is not set +# CONFIG_ARCH_CHIP_LM3S6432 is not set +CONFIG_ARCH_CHIP_LM3S6965=y +# CONFIG_ARCH_CHIP_LM3S8962 is not set +# CONFIG_ARCH_CHIP_LM4F120 is not set +CONFIG_ARCH_CHIP_LM3S=y +# CONFIG_LM_REVA2 is not set +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +# CONFIG_TIVA_HAVE_ADC0 is not set +# CONFIG_TIVA_HAVE_ADC1 is not set +# CONFIG_TIVA_I2C is not set +CONFIG_TIVA_HAVE_I2C1=y +# CONFIG_TIVA_HAVE_I2C2 is not set +# CONFIG_TIVA_HAVE_I2C3 is not set +# CONFIG_TIVA_HAVE_I2C4 is not set +# CONFIG_TIVA_HAVE_I2C5 is not set +# CONFIG_TIVA_HAVE_I2C6 is not set +# CONFIG_TIVA_HAVE_I2C7 is not set +# CONFIG_TIVA_HAVE_I2C8 is not set +# CONFIG_TIVA_HAVE_I2C9 is not set +CONFIG_TIVA_HAVE_UART3=y +# CONFIG_TIVA_HAVE_UART4 is not set +# CONFIG_TIVA_HAVE_UART5 is not set +# CONFIG_TIVA_HAVE_UART6 is not set +# CONFIG_TIVA_HAVE_UART7 is not set +CONFIG_TIVA_HAVE_SSI0=y +# CONFIG_TIVA_HAVE_SSI1 is not set +# CONFIG_TIVA_HAVE_SSI2 is not set +# CONFIG_TIVA_HAVE_SSI3 is not set +CONFIG_TIVA_HAVE_ETHERNET=y +CONFIG_TIVA_SSI=y +# CONFIG_TIVA_TIMER is not set +# CONFIG_TIVA_HAVE_TIMER0 is not set +# CONFIG_TIVA_HAVE_TIMER1 is not set +# CONFIG_TIVA_HAVE_TIMER2 is not set +CONFIG_TIVA_HAVE_TIMER3=y +# CONFIG_TIVA_HAVE_TIMER4 is not set +# CONFIG_TIVA_HAVE_TIMER5 is not set +# CONFIG_TIVA_HAVE_TIMER6 is not set +# CONFIG_TIVA_HAVE_TIMER7 is not set +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_UART3 is not set +CONFIG_TIVA_SSI0=y +# CONFIG_TIVA_TIMER3 is not set +CONFIG_TIVA_ETHERNET=y +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +CONFIG_TIVA_GPIO_IRQS=y +CONFIG_TIVA_HAVE_GPIOA_IRQS=y +CONFIG_TIVA_HAVE_GPIOB_IRQS=y +CONFIG_TIVA_HAVE_GPIOC_IRQS=y +CONFIG_TIVA_HAVE_GPIOD_IRQS=y +CONFIG_TIVA_HAVE_GPIOE_IRQS=y +CONFIG_TIVA_HAVE_GPIOF_IRQS=y +CONFIG_TIVA_HAVE_GPIOG_IRQS=y +CONFIG_TIVA_HAVE_GPIOH_IRQS=y +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +CONFIG_TIVA_GPIOF_IRQS=y +CONFIG_TIVA_GPIOG_IRQS=y +# CONFIG_TIVA_GPIOH_IRQS is not set + +# +# Stellaris Ethernet Configuration +# +# CONFIG_TIVA_ETHLEDS is not set +# CONFIG_TIVA_ETHHDUPLEX is not set +# CONFIG_TIVA_ETHNOAUTOCRC is not set +# CONFIG_TIVA_ETHNOPAD is not set +# CONFIG_TIVA_MULTICAST is not set +# CONFIG_TIVA_PROMISCUOUS is not set +# CONFIG_TIVA_TIMESTAMP is not set +# CONFIG_TIVA_BADCRC is not set +# CONFIG_TIVA_DUMPPACKET is not set +# CONFIG_TIVA_BOARDMAC is not set + +# +# Tiva/Stellaris SSI Configuration +# +CONFIG_SSI_POLLWAIT=y +CONFIG_SSI_TXLIMIT=4 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LM3S6965EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lm3s6965-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=8 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +CONFIG_NETUTILS_DHCPC=y +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# +# CONFIG_NSH_DHCPC is not set + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lm3s6965-ek/nsh/setenv.sh b/configs/lm3s6965-ek/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..02af3f7685847e24ea9b13813845d8320307b006 --- /dev/null +++ b/configs/lm3s6965-ek/nsh/setenv.sh @@ -0,0 +1,70 @@ +#!/bin/bash +# configs/lm3s6965-ek/nsh/setenv.sh +# +# Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location + +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. + +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the LM3S6995-EK tools directory + +export TOOL_BIN="${WD}/configs/lm3s6965-ek/tools" + +# Update the PATH variable + +export PATH="${TOOLCHAIN_BIN}:${TOOL_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lm3s6965-ek/nx/Make.defs b/configs/lm3s6965-ek/nx/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..bfd85cbf5447f6e75ec228a48780b6c0e95a55cb --- /dev/null +++ b/configs/lm3s6965-ek/nx/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/lm3s6965-ek/nx/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lm3s6965-ek/nx/defconfig b/configs/lm3s6965-ek/nx/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..bdafa45c25686157b6003157a4bad2d9bfb9cd13 --- /dev/null +++ b/configs/lm3s6965-ek/nx/defconfig @@ -0,0 +1,880 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +CONFIG_ARCH_CHIP_LM=y +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_LM3S6918 is not set +# CONFIG_ARCH_CHIP_LM3S9B96 is not set +# CONFIG_ARCH_CHIP_LM3S6432 is not set +CONFIG_ARCH_CHIP_LM3S6965=y +# CONFIG_ARCH_CHIP_LM3S8962 is not set +# CONFIG_ARCH_CHIP_LM4F120 is not set +CONFIG_ARCH_CHIP_LM3S=y +# CONFIG_LM_REVA2 is not set +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +# CONFIG_TIVA_HAVE_ADC0 is not set +# CONFIG_TIVA_HAVE_ADC1 is not set +# CONFIG_TIVA_I2C is not set +CONFIG_TIVA_HAVE_I2C1=y +# CONFIG_TIVA_HAVE_I2C2 is not set +# CONFIG_TIVA_HAVE_I2C3 is not set +# CONFIG_TIVA_HAVE_I2C4 is not set +# CONFIG_TIVA_HAVE_I2C5 is not set +# CONFIG_TIVA_HAVE_I2C6 is not set +# CONFIG_TIVA_HAVE_I2C7 is not set +# CONFIG_TIVA_HAVE_I2C8 is not set +# CONFIG_TIVA_HAVE_I2C9 is not set +CONFIG_TIVA_HAVE_UART3=y +# CONFIG_TIVA_HAVE_UART4 is not set +# CONFIG_TIVA_HAVE_UART5 is not set +# CONFIG_TIVA_HAVE_UART6 is not set +# CONFIG_TIVA_HAVE_UART7 is not set +CONFIG_TIVA_HAVE_SSI0=y +# CONFIG_TIVA_HAVE_SSI1 is not set +# CONFIG_TIVA_HAVE_SSI2 is not set +# CONFIG_TIVA_HAVE_SSI3 is not set +CONFIG_TIVA_HAVE_ETHERNET=y +CONFIG_TIVA_SSI=y +# CONFIG_TIVA_TIMER is not set +# CONFIG_TIVA_HAVE_TIMER0 is not set +# CONFIG_TIVA_HAVE_TIMER1 is not set +# CONFIG_TIVA_HAVE_TIMER2 is not set +CONFIG_TIVA_HAVE_TIMER3=y +# CONFIG_TIVA_HAVE_TIMER4 is not set +# CONFIG_TIVA_HAVE_TIMER5 is not set +# CONFIG_TIVA_HAVE_TIMER6 is not set +# CONFIG_TIVA_HAVE_TIMER7 is not set +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_UART3 is not set +CONFIG_TIVA_SSI0=y +# CONFIG_TIVA_TIMER3 is not set +# CONFIG_TIVA_ETHERNET is not set +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +CONFIG_TIVA_GPIO_IRQS=y +CONFIG_TIVA_HAVE_GPIOA_IRQS=y +CONFIG_TIVA_HAVE_GPIOB_IRQS=y +CONFIG_TIVA_HAVE_GPIOC_IRQS=y +CONFIG_TIVA_HAVE_GPIOD_IRQS=y +CONFIG_TIVA_HAVE_GPIOE_IRQS=y +CONFIG_TIVA_HAVE_GPIOF_IRQS=y +CONFIG_TIVA_HAVE_GPIOG_IRQS=y +CONFIG_TIVA_HAVE_GPIOH_IRQS=y +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +CONFIG_TIVA_GPIOF_IRQS=y +CONFIG_TIVA_GPIOG_IRQS=y +# CONFIG_TIVA_GPIOH_IRQS is not set + +# +# Tiva/Stellaris SSI Configuration +# +CONFIG_SSI_POLLWAIT=y +CONFIG_SSI_TXLIMIT=4 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LM3S6965EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lm3s6965-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +CONFIG_BOARDCTL_GRAPHICS=y +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=12 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nx_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=12 +CONFIG_NFILE_STREAMS=12 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +CONFIG_SPI_EXCHANGE=y +CONFIG_SPI_CMDDATA=y +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=255 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +CONFIG_LCD_P14201=y +CONFIG_P14201_NINTERFACES=1 +CONFIG_P14201_SPIMODE=2 +CONFIG_P14201_FREQUENCY=3500000 +CONFIG_P14201_FRAMEBUFFER=y +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +# CONFIG_NX_DISABLE_4BPP is not set +CONFIG_NX_DISABLE_8BPP=y +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0x08 +CONFIG_NXTK_BORDERCOLOR2=0x04 +CONFIG_NXTK_BORDERCOLOR3=0x0c +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +# CONFIG_EXAMPLES_NX_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NX_BGCOLOR=0x02 +CONFIG_EXAMPLES_NX_COLOR1=0x0a +CONFIG_EXAMPLES_NX_COLOR2=0x0c +CONFIG_EXAMPLES_NX_TBCOLOR=0x08 +CONFIG_EXAMPLES_NX_FONTCOLOR=0x00 +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=4 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +CONFIG_EXAMPLES_NX_EXTERNINIT=y +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lm3s6965-ek/nx/setenv.sh b/configs/lm3s6965-ek/nx/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..07ccdeecd1eee7cd65d2f1eae1ad6ca2ad8ab483 --- /dev/null +++ b/configs/lm3s6965-ek/nx/setenv.sh @@ -0,0 +1,70 @@ +#!/bin/bash +# configs/lm3s6965-ek/nx/setenv.sh +# +# Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location + +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. + +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the LM3S6995-EK tools directory + +export TOOL_BIN="${WD}/configs/lm3s6965-ek/tools" + +# Update the PATH variable + +export PATH="${TOOLCHAIN_BIN}:${TOOL_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lm3s6965-ek/scripts/ld.script b/configs/lm3s6965-ek/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..7350cf5ee52d1766ae8f602c6544a6b674376a8c --- /dev/null +++ b/configs/lm3s6965-ek/scripts/ld.script @@ -0,0 +1,114 @@ +/**************************************************************************** + * configs/lm3s6965-ek/scripts/ld.script + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LM3S6965 has 256Kb of FLASH beginning at address 0x0000:0000 and 64Kb + * of SRAM beginning at 0x2000:0000. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The LM3S6918 has 64Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lm3s6965-ek/src/.gitignore b/configs/lm3s6965-ek/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/lm3s6965-ek/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/lm3s6965-ek/src/Makefile b/configs/lm3s6965-ek/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..5c1ddd2505e6f1be5c7abf5eff0da48378e82f82 --- /dev/null +++ b/configs/lm3s6965-ek/src/Makefile @@ -0,0 +1,49 @@ +############################################################################ +# configs/lm3s6965-ek/src/Makefile +# +# Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lm_boot.c lm_leds.c lm_ethernet.c lm_ssi.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lm_appinit.c +endif + +ifeq ($(CONFIG_NX_LCDDRIVER),y) +CSRCS += lm_oled.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/lm3s6965-ek/src/lm3s6965-ek.h b/configs/lm3s6965-ek/src/lm3s6965-ek.h new file mode 100644 index 0000000000000000000000000000000000000000..fd05fc6638c9cdf4e3c0dde8eafbdc6b64351914 --- /dev/null +++ b/configs/lm3s6965-ek/src/lm3s6965-ek.h @@ -0,0 +1,132 @@ +/************************************************************************************ + * configs/lm3s6965-ek/src/lm3s6965-ek.h + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_LM3S6965_EK_SRC_LM3S6965EK_H +#define __CONFIGS_LM3S6965_EK_SRC_LM3S6965EK_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include "chip.h" +#include "tiva_gpio.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* How many SSI modules does this chip support? The LM3S6965 supports 1 SSI + * module (others may support more than 2 -- in such case, the following must be + * expanded). + */ + +#if TIVA_NSSI == 0 +# undef CONFIG_TIVA_SSI0 +# undef CONFIG_TIVA_SSI1 +#elif TIVA_NSSI == 1 +# undef CONFIG_TIVA_SSI1 +#endif + +/* LM3S6965 Eval Kit ***************************************************************/ + +/* GPIO Usage + * + * PIN SIGNAL EVB Function + * --- ----------- --------------------------------------- + * 26 PA0/U0RX Virtual COM port receive + * 27 PA1/U0TX Virtual COM port transmit + * 10 PD0/IDX0 SD card chip select + * 11 PD1/PWM1 Sound + * 30 PA4/SSI0RX SD card data out + * 31 PA5/SSI0TX SD card and OLED display data in + * 28 PA2/SSI0CLK SD card and OLED display clock + * 22 PC7/PHB0 OLED display data/control select + * 29 PA3/SSI0FSS OLED display chip select + * 73 PE1/PWM5 Down switch + * 74 PE2/PHB1 Left switch + * 72 PE0/PWM4 Up switch + * 75 PE3/PHA1 Right switch + * 61 PF1/IDX1 Select switch + * 47 PF0/PWM0 User LED + * 23 PC6/CCP3 Enable +15 V + */ + +/* GPIO for microSD card chip select: + * - PD0: SD card chip select (CARDCSn) + */ + +#define SDCCS_GPIO (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STDWPU | GPIO_STRENGTH_4MA | \ + GPIO_VALUE_ONE | GPIO_PORTD | 0) + +/* GPIO for single LED: + * - PF0: User LED + */ + +#define LED_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTF | 0) + +/* GPIOs for OLED: + * - PC7: OLED display data/control select (D/Cn) + * - PA3: OLED display chip select (CSn) + * - PC6: Enable +15V needed by OLED (EN+15V) + */ + +#define OLEDDC_GPIO (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STD | GPIO_STRENGTH_8MA | \ + GPIO_VALUE_ONE | GPIO_PORTC | 7) +#define OLEDCS_GPIO (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STDWPU | GPIO_STRENGTH_4MA | \ + GPIO_VALUE_ONE | GPIO_PORTA | 3) +#define OLEDEN_GPIO (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STD | GPIO_STRENGTH_8MA | \ + GPIO_VALUE_ONE | GPIO_PORTC | 6) + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: lm_ssidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LM3S6965 Eval Kit. + * + ************************************************************************************/ + +void weak_function lm_ssidev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_LM3S6965_EK_SRC_LM3S6965EK_H */ diff --git a/configs/lm3s6965-ek/src/lm_appinit.c b/configs/lm3s6965-ek/src/lm_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..6f2480b80d07b96fe5107c31420c02707109e283 --- /dev/null +++ b/configs/lm3s6965-ek/src/lm_appinit.c @@ -0,0 +1,151 @@ +/**************************************************************************** + * config/lm3s6965-ek/src/lm_appinit.c + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#undef NSH_HAVEUSBDEV +#define NSH_HAVEMMCSD 1 + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support MMC/SD features if mountpoints or MMC/SPI are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef NSH_HAVEMMCSD +#endif + +#ifndef CONFIG_CONFIG_MMCSD_SPI +# undef NSH_HAVEMMCSD +#endif + +/* PORT and SLOT number depend on the board configuration */ + +#ifdef CONFIG_NSH_ARCHINIT +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 0 +# error "The LM3S6965 Eval Kit MMC/SD is on SSI0" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 0 +# endif +# if !defined(CONFIG_NSH_MMCSDSLOTNO) || CONFIG_NSH_MMCSDSLOTNO != 0 +# error "The LM3S6965 Eval Kit MMC/SD is on SSI0 slot 0" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif +#else +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 0 +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# undef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef NSH_HAVEMMCSD + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + spi = tiva_ssibus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + syslog(LOG_INFO, "Binding SPI port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, CONFIG_NSH_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SPI port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); +#endif + return OK; +} diff --git a/configs/lm3s6965-ek/src/lm_boot.c b/configs/lm3s6965-ek/src/lm_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..f6c80bd1e3b9689a499aec533c0db9137e698de4 --- /dev/null +++ b/configs/lm3s6965-ek/src/lm_boot.c @@ -0,0 +1,93 @@ +/************************************************************************************ + * configs/lm3s6965-ek/src/lm_boot.c + * + * Copyright (C) 2010, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "lm3s6965-ek.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Stellaris architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SSI is not disabled, and 2) the weak function + * lm_ssidev_initialize() has been brought into the link. + */ + + /* The LM3S6965 Eval Kit microSD CS and OLED are on SSI0 (Duh! There is no SSI1) */ + +#if defined(CONFIG_TIVA_SSI0) /* || defined(CONFIG_TIVA_SSI1) */ + if (lm_ssidev_initialize) + { + lm_ssidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/lm3s6965-ek/src/lm_ethernet.c b/configs/lm3s6965-ek/src/lm_ethernet.c new file mode 100644 index 0000000000000000000000000000000000000000..6d4d62f5fa037569607321c8282a2ef0bda43912 --- /dev/null +++ b/configs/lm3s6965-ek/src/lm_ethernet.c @@ -0,0 +1,98 @@ +/************************************************************************************ + * configs/lm3s6965-ek/src/lm_ethernet.c + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "tiva_ethernet.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_ethernetmac + * + * Description: + * For the Ethernet Eval Kits, the MAC address will be stored in the non-volatile + * USER0 and USER1 registers. If CONFIG_TIVA_BOARDMAC is defined, this function + * will obtain the MAC address from these registers. + * + ************************************************************************************/ + +#ifdef CONFIG_TIVA_BOARDMAC +void tiva_ethernetmac(struct ether_addr *ethaddr) +{ + uint32_t user0; + uint32_t user1; + + /* Get the current value of the user registers */ + + user0 = getreg32(TIVA_FLASH_USERREG0); + user1 = getreg32(TIVA_FLASH_USERREG1); + + nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff); + DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff); + + /* Re-format that MAC address the way that uIP expects to see it */ + + ethaddr->ether_addr_octet[0] = ((user0 >> 0) & 0xff); + ethaddr->ether_addr_octet[1] = ((user0 >> 8) & 0xff); + ethaddr->ether_addr_octet[2] = ((user0 >> 16) & 0xff); + ethaddr->ether_addr_octet[3] = ((user1 >> 0) & 0xff); + ethaddr->ether_addr_octet[4] = ((user1 >> 8) & 0xff); + ethaddr->ether_addr_octet[5] = ((user1 >> 16) & 0xff); +} +#endif diff --git a/configs/lm3s6965-ek/src/lm_leds.c b/configs/lm3s6965-ek/src/lm_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..764304281769307cd98fc5ff0742037d667a0b03 --- /dev/null +++ b/configs/lm3s6965-ek/src/lm_leds.c @@ -0,0 +1,165 @@ +/**************************************************************************** + * configs/lm3s6965-ek/src/lm_leds.c + * + * Copyright (C) 2010, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "tiva_gpio.h" +#include "lm3s6965-ek.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef CONFIG_DEBUG_LEDS +# define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +static uint8_t g_nest; + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + leddbg("Initializing\n"); + + /* Configure Port E, Bit 1 as an output, initial value=OFF */ + + led_dumpgpio("board_autoled_initialize before tiva_configgpio()"); + tiva_configgpio(LED_GPIO); + led_dumpgpio("board_autoled_initialize after tiva_configgpio()"); + g_nest = 0; +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + case LED_STARTED: + case LED_HEAPALLOCATE: + default: + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + g_nest++; + case LED_IRQSENABLED: + case LED_STACKCREATED: + led_dumpgpio("board_autoled_on: before tiva_gpiowrite()"); + tiva_gpiowrite(LED_GPIO, false); + led_dumpgpio("board_autoled_on: after tiva_gpiowrite()"); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + case LED_IRQSENABLED: + case LED_STACKCREATED: + case LED_STARTED: + case LED_HEAPALLOCATE: + default: + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + if (--g_nest <= 0) + { + led_dumpgpio("board_autoled_off: before tiva_gpiowrite()"); + tiva_gpiowrite(LED_GPIO, true); + led_dumpgpio("board_autoled_off: after tiva_gpiowrite()"); + } + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/lm3s6965-ek/src/lm_oled.c b/configs/lm3s6965-ek/src/lm_oled.c new file mode 100644 index 0000000000000000000000000000000000000000..6eee4e35ed4e3fb510a486ec3ed328c2360ccec2 --- /dev/null +++ b/configs/lm3s6965-ek/src/lm_oled.c @@ -0,0 +1,176 @@ +/**************************************************************************** + * config/lm3s6965-ek/src/lm_oled.c + * + * Copyright (C) 2010-2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "tiva_gpio.h" +#include "tiva_ssi.h" + +#include "lm3s6965-ek.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Define the CONFIG_LCD_RITDEBUG to enable detailed debug output (stuff you + * would never want to see unless you are debugging this file). + * + * Verbose debug must also be enabled + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_LCD_RITDEBUG +#endif + +#ifdef CONFIG_LCD_RITDEBUG +# define ritdbg(format, ...) vdbg(format, ##__VA_ARGS__) +# define oleddc_dumpgpio(m) tiva_dumpgpio(OLEDDC_GPIO, m) +# define oledcs_dumpgpio(m) tiva_dumpgpio(OLEDCS_GPIO, m) +#else +# define ritdbg(x...) +# define oleddc_dumpgpio(m) +# define oledcs_dumpgpio(m) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED GPIOs */ + + oledcs_dumpgpio("board_graphics_setup: After OLEDCS setup"); + oleddc_dumpgpio("board_graphics_setup: On entry"); + + tiva_configgpio(OLEDDC_GPIO); /* PC7: OLED display data/control select (D/Cn) */ + tiva_configgpio(OLEDEN_GPIO); /* PC6: Enable +15V needed by OLED (EN+15V) */ + + oleddc_dumpgpio("board_graphics_setup: After OLEDDC/EN setup"); + + /* Get the SSI port (configure as a Freescale SPI port) */ + + spi = tiva_ssibus_initialize(0); + if (!spi) + { + glldbg("Failed to initialize SSI port 0\n"); + } + else + { + /* Bind the SSI port to the OLED */ + + dev = rit_initialize(spi, devno); + if (!dev) + { + glldbg("Failed to bind SSI port 0 to OLED %d: %d\n", devno); + } + else + { + gllvdbg("Bound SSI port 0 to OLED %d\n", devno); + + /* And turn the OLED on (CONFIG_LCD_MAXPOWER should be 1) */ + + (void)dev->setpower(dev, CONFIG_LCD_MAXPOWER); + return dev; + } + } + + return NULL; +} + +/**************************************************************************** + * Name: tiva_ssicmddata + * + * Description: + * Set or clear the SD1329 D/Cn bit to select data (true) or command + * (false). This function must be provided by platform-specific logic. + * This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +int tiva_ssicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + if (devid == SPIDEV_DISPLAY) + { + /* Set GPIO to 1 for data, 0 for command */ + + tiva_gpiowrite(OLEDDC_GPIO, !cmd); + return OK; + } + + return -ENODEV; +} diff --git a/configs/lm3s6965-ek/src/lm_ssi.c b/configs/lm3s6965-ek/src/lm_ssi.c new file mode 100644 index 0000000000000000000000000000000000000000..5b105fed348594d2418e0b34356e83a6d73ab4e5 --- /dev/null +++ b/configs/lm3s6965-ek/src/lm_ssi.c @@ -0,0 +1,163 @@ +/************************************************************************************ + * configs/lm3s6965-ek/src/lm_ssi.c + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "tiva_gpio.h" +#include "lm3s6965-ek.h" + +/* The LM3S6965 Eval Kit microSD CS is on SSI0 */ + +#if defined(CONFIG_TIVA_SSI0) /* || defined(CONFIG_TIVA_SSI1) */ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SSI_DEBUG /* Define to enable debug */ +#undef SSI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SSI_DEBUG +# define ssidbg lldbg +# ifdef SSI_VERBOSE +# define ssivdbg lldbg +# else +# define ssivdbg(x...) +# endif +#else +# undef SSI_VERBOSE +# define ssidbg(x...) +# define ssivdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef SSI_VERBOSE +# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m) +#else +# define ssi_dumpgpio(m) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lm_ssidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LM3S6965 Eval Kit. + * + ************************************************************************************/ + +void weak_function lm_ssidev_initialize(void) +{ + /* Configure the SPI-based microSD CS GPIO */ + + ssi_dumpgpio("lm_ssidev_initialize() Entry)"); + tiva_configgpio(SDCCS_GPIO); +#ifdef CONFIG_NX_LCDDRIVER + tiva_configgpio(OLEDCS_GPIO); +#endif + ssi_dumpgpio("lm_ssidev_initialize() Exit"); +} + +/**************************************************************************** + * The external functions, tiva_ssiselect and tiva_ssistatus must be provided + * by board-specific logic. The are implementations of the select and status + * methods SPI interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * All othermethods (including tiva_ssibus_initialize()) are provided by common + * logic. To use this common SPI logic on your board: + * + * 1. Provide tiva_ssiselect() and tiva_ssistatus() functions in your + * board-specific logic. This function will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 2. Add a call to tiva_ssibus_initialize() in your low level initialization + * logic + * 3. The handle returned by tiva_ssibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssi_dumpgpio("tiva_ssiselect() Entry"); + + if (devid == SPIDEV_MMCSD) + { + /* Assert the CS pin to the card */ + + tiva_gpiowrite(SDCCS_GPIO, !selected); + } +#ifdef CONFIG_NX_LCDDRIVER + else if (devid == SPIDEV_DISPLAY) + { + /* Assert the CS pin to the display */ + + tiva_gpiowrite(OLEDCS_GPIO, !selected); + } +#endif + ssi_dumpgpio("tiva_ssiselect() Exit"); +} + +uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + ssidbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} + +#endif /* CONFIG_TIVA_SSI0 || CONFIG_TIVA_SSI1 */ diff --git a/configs/lm3s6965-ek/tcpecho/Make.defs b/configs/lm3s6965-ek/tcpecho/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..dbe06b64b0d868a33995a59d2b593fada06a55b3 --- /dev/null +++ b/configs/lm3s6965-ek/tcpecho/Make.defs @@ -0,0 +1,109 @@ +############################################################################ +# configs/lm3s6965-ek/tcpecho/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/lm3s6965-ek/tcpecho/defconfig b/configs/lm3s6965-ek/tcpecho/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..a50ae7f2bc96831d921019ec4f78b1e7bc9ff2cf --- /dev/null +++ b/configs/lm3s6965-ek/tcpecho/defconfig @@ -0,0 +1,936 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +CONFIG_ARCH_CHIP_LM=y +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_LM3S6918 is not set +# CONFIG_ARCH_CHIP_LM3S9B96 is not set +# CONFIG_ARCH_CHIP_LM3S6432 is not set +CONFIG_ARCH_CHIP_LM3S6965=y +# CONFIG_ARCH_CHIP_LM3S8962 is not set +# CONFIG_ARCH_CHIP_LM4F120 is not set +CONFIG_ARCH_CHIP_LM3S=y +# CONFIG_LM_REVA2 is not set +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +# CONFIG_TIVA_HAVE_ADC0 is not set +# CONFIG_TIVA_HAVE_ADC1 is not set +# CONFIG_TIVA_I2C is not set +CONFIG_TIVA_HAVE_I2C1=y +# CONFIG_TIVA_HAVE_I2C2 is not set +# CONFIG_TIVA_HAVE_I2C3 is not set +# CONFIG_TIVA_HAVE_I2C4 is not set +# CONFIG_TIVA_HAVE_I2C5 is not set +# CONFIG_TIVA_HAVE_I2C6 is not set +# CONFIG_TIVA_HAVE_I2C7 is not set +# CONFIG_TIVA_HAVE_I2C8 is not set +# CONFIG_TIVA_HAVE_I2C9 is not set +CONFIG_TIVA_HAVE_UART3=y +# CONFIG_TIVA_HAVE_UART4 is not set +# CONFIG_TIVA_HAVE_UART5 is not set +# CONFIG_TIVA_HAVE_UART6 is not set +# CONFIG_TIVA_HAVE_UART7 is not set +CONFIG_TIVA_HAVE_SSI0=y +# CONFIG_TIVA_HAVE_SSI1 is not set +# CONFIG_TIVA_HAVE_SSI2 is not set +# CONFIG_TIVA_HAVE_SSI3 is not set +CONFIG_TIVA_HAVE_ETHERNET=y +CONFIG_TIVA_SSI=y +# CONFIG_TIVA_TIMER is not set +# CONFIG_TIVA_HAVE_TIMER0 is not set +# CONFIG_TIVA_HAVE_TIMER1 is not set +# CONFIG_TIVA_HAVE_TIMER2 is not set +CONFIG_TIVA_HAVE_TIMER3=y +# CONFIG_TIVA_HAVE_TIMER4 is not set +# CONFIG_TIVA_HAVE_TIMER5 is not set +# CONFIG_TIVA_HAVE_TIMER6 is not set +# CONFIG_TIVA_HAVE_TIMER7 is not set +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_UART3 is not set +CONFIG_TIVA_SSI0=y +# CONFIG_TIVA_TIMER3 is not set +CONFIG_TIVA_ETHERNET=y +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +CONFIG_TIVA_GPIO_IRQS=y +CONFIG_TIVA_HAVE_GPIOA_IRQS=y +CONFIG_TIVA_HAVE_GPIOB_IRQS=y +CONFIG_TIVA_HAVE_GPIOC_IRQS=y +CONFIG_TIVA_HAVE_GPIOD_IRQS=y +CONFIG_TIVA_HAVE_GPIOE_IRQS=y +CONFIG_TIVA_HAVE_GPIOF_IRQS=y +CONFIG_TIVA_HAVE_GPIOG_IRQS=y +CONFIG_TIVA_HAVE_GPIOH_IRQS=y +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +CONFIG_TIVA_GPIOF_IRQS=y +CONFIG_TIVA_GPIOG_IRQS=y +# CONFIG_TIVA_GPIOH_IRQS is not set + +# +# Stellaris Ethernet Configuration +# +# CONFIG_TIVA_ETHLEDS is not set +# CONFIG_TIVA_ETHHDUPLEX is not set +# CONFIG_TIVA_ETHNOAUTOCRC is not set +# CONFIG_TIVA_ETHNOPAD is not set +# CONFIG_TIVA_MULTICAST is not set +# CONFIG_TIVA_PROMISCUOUS is not set +# CONFIG_TIVA_TIMESTAMP is not set +# CONFIG_TIVA_BADCRC is not set +# CONFIG_TIVA_DUMPPACKET is not set +# CONFIG_TIVA_BOARDMAC is not set + +# +# Tiva/Stellaris SSI Configuration +# +CONFIG_SSI_POLLWAIT=y +CONFIG_SSI_TXLIMIT=4 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LM3S6965EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lm3s6965-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=8 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="tcpecho_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=650 +CONFIG_NET_ETH_TCP_RECVWNDO=624 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +CONFIG_EXAMPLES_TCPECHO=y +CONFIG_EXAMPLES_TCPECHO_PORT=80 +CONFIG_EXAMPLES_TCPECHO_BACKLOG=8 +CONFIG_EXAMPLES_TCPECHO_NCONN=8 +# CONFIG_EXAMPLES_TCPECHO_DHCPC is not set +CONFIG_EXAMPLES_TCPECHO_NOMAC=y +CONFIG_EXAMPLES_TCPECHO_IPADDR=0xc0a80232 +CONFIG_EXAMPLES_TCPECHO_DRIPADDR=0xc0a80201 +CONFIG_EXAMPLES_TCPECHO_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +CONFIG_NETUTILS_DHCPC=y +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lm3s6965-ek/tcpecho/setenv.sh b/configs/lm3s6965-ek/tcpecho/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..dd1d739b5a15d10de03824c7e2ebfc282f589ce5 --- /dev/null +++ b/configs/lm3s6965-ek/tcpecho/setenv.sh @@ -0,0 +1,70 @@ +#!/bin/bash +# configs/lm3s6965-ek/tcpecho/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location + +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. + +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the LM3S6995-EK tools directory + +export TOOL_BIN="${WD}/configs/lm3s6965-ek/tools" + +# Update the PATH variable + +export PATH="${TOOLCHAIN_BIN}:${TOOL_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lm3s6965-ek/tools/lm3s6965-ek.cfg b/configs/lm3s6965-ek/tools/lm3s6965-ek.cfg new file mode 100644 index 0000000000000000000000000000000000000000..a82aa4cb9ef3c4a19bf528519bd51c6fb1603927 --- /dev/null +++ b/configs/lm3s6965-ek/tools/lm3s6965-ek.cfg @@ -0,0 +1,131 @@ +# +# TI/Luminary Stellaris LM3S6965 Evaluation Kits +# +# http://www.luminarymicro.com/products/lm3s6965_ethernet_evaluation_kit.html + +# NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! +# so is using it in JTAG mode, as done here. + +# Interface configuration + +interface ft2232 +ft2232_device_desc "Stellaris Evaluation Board" +ft2232_layout luminary_icdi +ft2232_vid_pid 0x0403 0xbcd9 + +# Board configuration + +# 20k working area +set WORKAREASIZE 0x5000 +set CHIPNAME lm3s6965 + +# Target configuration + +# Some devices have errata in returning their device class. +# DEVICECLASS is provided as a manual override +# Manual setting of a device class of 0xff is not allowed + +global _DEVICECLASS + +if { [info exists DEVICECLASS ] } { + set _DEVICECLASS $DEVICECLASS +} else { + set _DEVICECLASS 0xff +} + +# Luminary chips support both JTAG and SWD transports. +# Adapt based on what transport is active. +source [find target/swj-dp.tcl] + +# For now we ignore the SPI and UART options, which +# are usable only for ISP style initial flash programming. + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lm3s +} + +# CPU TAP ID 0x1ba00477 for early Sandstorm parts +# CPU TAP ID 0x2ba00477 for later SandStorm parts, e.g. lm3s811 Rev C2 +# CPU TAP ID 0x3ba00477 for Cortex-M3 r1p2 (on Fury, DustDevil) +# CPU TAP ID 0x4ba00477 for Cortex-M3 r2p0 (on Tempest) +# ... we'll ignore the JTAG version field, rather than list every +# chip revision that turns up. +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x3ba00477 +} + +# SWD DAP, and JTAG TAP, take same params for now; +# ... even though SWD ignores all except TAPID, and +# JTAG shouldn't need anything more then irlen. (and TAPID). +swj_newdap $_CHIPNAME cpu -irlen 4 -irmask 0xf \ + -expected-id $_CPUTAPID -ignore-version + +if { [info exists WORKAREASIZE ] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + # default to 8K working area + set _WORKAREASIZE 0x2000 +} + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu + +# 8K working area at base of ram, not backed up +# +# NOTE: you may need or want to reconfigure the work area; +# some parts have just 6K, and you may want to use other +# addresses (at end of mem not beginning) or back it up. +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE + +# JTAG speed ... slow enough to work with a 12 MHz RC oscillator; +# LM3S parts don't support RTCK +# +# NOTE: this may be increased by a reset-init handler, after it +# configures and enables the PLL. Or you might need to decrease +# this, if you're using a slower clock. +adapter_khz 500 + +source [find mem_helper.tcl] + +$_TARGETNAME configure -event reset-start { + adapter_khz 500 + + # + # When nRST is asserted on most Stellaris devices, it clears some of + # the debug state. The ARMv7M and Cortex-M3 TRMs say that's wrong; + # and OpenOCD depends on those TRMs. So we won't use SRST on those + # chips. (Only power-on reset should affect debug state, beyond a + # few specified bits; not the chip's nRST input, wired to SRST.) + # + # REVISIT current errata specs don't seem to cover this issue. + # Do we have more details than this email? + # https://lists.berlios.de/pipermail + # /openocd-development/2008-August/003065.html + # + + global _DEVICECLASS + + if {$_DEVICECLASS != 0xff} { + set device_class $_DEVICECLASS + } else { + set device_class [expr (([mrw 0x400fe000] >> 16) & 0xff)] + } + + if {$device_class == 0 || $device_class == 1 || $device_class == 3} { + # Sandstorm, Fury and DustDevil are able to use NVIC SYSRESETREQ + cortex_m3 reset_config sysresetreq + } else { + # Tempest and newer default to using NVIC VECTRESET + # this does mean a reset-init event handler is required to reset + # any peripherals + cortex_m3 reset_config vectreset + } +} + +# flash configuration ... autodetects sizes, autoprobed +flash bank $_CHIPNAME.flash stellaris 0 0 0 0 $_TARGETNAME + diff --git a/configs/lm3s6965-ek/tools/oocd.sh b/configs/lm3s6965-ek/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..86eab3992b0e2303fd3146dba5a078ee0421cafd --- /dev/null +++ b/configs/lm3s6965-ek/tools/oocd.sh @@ -0,0 +1,58 @@ +#!/bin/sh +# +# See configs/lm3s6965-ek/README.txt for information about +# this file. + +TOPDIR=$1 +USAGE="$0 [-d]" +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +# Assume that OpenOCD was installed and at /usr/local/bin. Uncomment +# the following to run directly from the build directory + +# OPENOCD_PATH="/home/OpenOCD/openocd/src" +# OPENOCD_PATH="/usr/bin" +OPENOCD_PATH="/usr/local/bin" + +# TARGET_PATH="/home/OpenOCD/openocd/tcl" +# TARGET_PATH="/usr/share/openocd/scripts" +TARGET_PATH="/usr/local/share/openocd/scripts" + +# Assume a Unix development environment. Uncomment to use a Windows +# like environment + +OPENOCD_EXE=openocd.exe +# OPENOCD_EXE=openocd + +OPENOCD_CFG="${TOPDIR}/configs/lm3s6965-ek/tools/lm3s6965-ek.cfg" +OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}" + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +if [ ! -d ${OPENOCD_PATH} ]; then + echo "OpenOCD path does not exist: ${OPENOCD_PATH}" + exit 1 +fi +if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then + echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f ${OPENOCD_CFG} ]; then + echo "OpenOCD config file does not exist: ${OPENOCD_CFG}" + exit 1 +fi + +echo "Starting OpenOCD" +cd ${OPENOCD_PATH} || { echo "Failed to CD to ${OPENOCD_PATH}"; exit 1; } +${OPENOCD_EXE} ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" + diff --git a/configs/lm3s8962-ek/Kconfig b/configs/lm3s8962-ek/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..7505fb1ebf557ff56704e47a90fb2f92de15878a --- /dev/null +++ b/configs/lm3s8962-ek/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_LM3S8962EK +endif diff --git a/configs/lm3s8962-ek/README.txt b/configs/lm3s8962-ek/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..8c46c1db4abbc633d956258d60b5d9d760060743 --- /dev/null +++ b/configs/lm3s8962-ek/README.txt @@ -0,0 +1,500 @@ +README +^^^^^^ + +README for NuttX port to the Stellaris LMS38962 Evaluation Kit + +Contents +^^^^^^^^ + + Stellaris LMS38962 Evaluation Kit + Development Environment + GNU Toolchain Options + IDEs + NuttX EABI "buildroot" Toolchain + NuttX OABI "buildroot" Toolchain + NXFLAT Toolchain + USB Device Controller Functions + OLED + Stellaris LM3S8962 Evaluation Kit Configuration Options + Configurations + +Stellaris LMS38962 Evaluation Kit +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +The Stellaris LM3S8962 Evaluation Board includes the following features: + + o Stellaris LM3S8962 microcontroller with fully-integrated 10/100 embedded + Ethernet controller + o Simple setup; USB cable provides serial communication, debugging, and + power + o OLED graphics display with 128 x 96 pixel resolution + o User LED, navigation switches, and select pushbuttons + o Magnetic speaker + o LM3S8962 I/O available on labeled break-out pads + o Standard ARM® 20-pin JTAG debug connector with input and output modes + o USB interface for debugging and power supply + o MicroSD card slot + +Features of the LM3S8962 Microcontroller + + o 32-bit RISC performance using ARM® Cortex™-M3 v7M architecture + – 50-MHz operation + – Hardware-division and single-cycle-multiplication + – Integrated Nested Vectored Interrupt Controller (NVIC) + – 42 interrupt channels with eight priority levels + o 256 KB single-cycle flash + o 64 KB single-cycle SRAM + o Four general-purpose 32-bit timers + o Integrated Ethernet MAC and PHY + o Three fully programmable 16C550-type UARTs + o Four 10-bit channels (inputs) when used as single-ended inputs + o Two independent integrated analog comparators + o Two I2C modules + o Three PWM generator blocks + – One 16-bit counter + – Two comparators + – Produces two independent PWM signals + – One dead-band generator + o Two QEI modules with position integrator for tracking encoder position + o 0 to 42 GPIOs, depending on user configuration + o On-chip low drop-out (LDO) voltage regulator + +GPIO Usage + +PIN SIGNAL EVB Function +--- ----------- --------------------------------------- + 26 PA0/U0RX Virtual COM port receive + 27 PA1/U0TX Virtual COM port transmit + 10 PD0/IDX0 SD card chip select + 11 PD1/PWM1 Sound + 30 PA4/SSI0RX SD card data out + 31 PA5/SSI0TX SD card and OLED display data in + 28 PA2/SSI0CLK SD card and OLED display clock + 22 PC7/PHB0 OLED display data/control select + 29 PA3/SSI0FSS OLED display chip select + 73 PE1/PWM5 Down switch + 74 PE2/PHB1 Left switch + 72 PE0/PWM4 Up switch + 75 PE3/PHA1 Right switch + 61 PF1/IDX1 Select switch + 47 PF0/PWM0 User LED + 23 PC6/CCP3 Enable +15 V + +OLED +^^^^ + + The Evaluation Kit includes an OLED graphics display. Features: + + - RiT P14201 series display + - 128 columns by 96 rows + - 4-bit, 16-level gray scale. + - High-contrast (typ. 500:1) + - Excellent brightness (120 cd/m2) + - Fast 10 us response. + + The OLED display has a built-in controller IC with synchronous serial and + parallel interfaces (SSD1329). Synchronous serial (SSI) is used on the EVB. + The SSI port is shared with the microSD card slot. + + - PC7: OLED display data/control select (D/Cn) + - PA3: OLED display chip select (CSn) + + NOTE: Newer versions of the LM3S8962 Evaluation Kit has an OSAM 128x64x4 OLED + display. Some tweaks to drivers/lcd/p14201.c would be required to support that + LCD. + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the multiple toolchain + options including: + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery or devkitARM, you simply need to add one of the following + configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows) and devkitARM are Windows native toolchains. + The CodeSourcey (for Linux) and NuttX buildroot toolchains are Cygwin and/or Linux + native toolchains. There are several limitations to using a Windows based + toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. Here are a few tip before you + start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lm, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/tiva/tiva_vectors.S. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lm3s8962-ek/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +USB Device Controller Functions +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + Device Overview + + An FT2232 device from Future Technology Devices International Ltd manages + USB-to-serial conversion. The FT2232 is factory configured by Luminary + Micro to implement a JTAG/SWD port (synchronous serial) on channel A and + a Virtual COM Port (VCP) on channel B. This feature allows two simultaneous + communications links between the host computer and the target device using + a single USB cable. Separate Windows drivers for each function are provided + on the Documentation and Software CD. + + Debugging with JTAG/SWD + + The FT2232 USB device performs JTAG/SWD serial operations under the control + of the debugger or the Luminary Flash Programmer. It also operate as an + In-Circuit Debugger Interface (ICDI), allowing debugging of any external + target board. Debugging modes: + + MODE DEBUG FUNCTION USE SELECTED BY + 1 Internal ICDI Debug on-board LM3S8962 Default Mode + microcontroller over USB + interface. + 2 ICDI out to JTAG/SWD The EVB is used as a USB Connecting to an external + header to SWD/JTAG interface to target and starting debug + an external target. software. The red Debug Out + LED will be ON. + 3 In from JTAG/SWD For users who prefer an Connecting an external + header external debug interface debugger to the JTAG/SWD + (ULINK, JLINK, etc.) with header. + the EVB. + + Virtual COM Port + + The Virtual COM Port (VCP) allows Windows applications (such as HyperTerminal) + to communicate with UART0 on the LM3S8962 over USB. Once the FT2232 VCP + driver is installed, Windows assigns a COM port number to the VCP channel. + +Stellaris LM3S8962 Evaluation Kit Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lm + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LM3S8962 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=lm3s8962-ek (for the Stellaris LM3S8962 Evaluation Kit) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_LM3S8962EK + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + There are configurations for disabling support for interrupts GPIO ports. + GPIOJ must be disabled because it does not exist on the LM3S8962. + Additional interrupt support can be disabled if desired to reduce memory + footprint. + + CONFIG_TIVA_GPIOA_IRQS=y + CONFIG_TIVA_GPIOB_IRQS=y + CONFIG_TIVA_GPIOC_IRQS=y + CONFIG_TIVA_GPIOD_IRQS=y + CONFIG_TIVA_GPIOE_IRQS=y + CONFIG_TIVA_GPIOF_IRQS=y + CONFIG_TIVA_GPIOG_IRQS=y + CONFIG_TIVA_GPIOH_IRQS=y + CONFIG_TIVA_GPIOJ_IRQS=n << Always + + LM3S8962 specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + CONFIG_TIVA_SSI0 - Select to enable support for SSI0 + CONFIG_TIVA_SSI1 - Select to enable support for SSI1 + CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support. + Poll-waiting is recommended if the interrupt rate would be to + high in the interrupt driven case. + CONFIG_SSI_TXLIMIT - Write this many words to the Tx FIFO before + emptying the Rx FIFO. If the SPI frequency is high and this + value is large, then larger values of this setting may cause + Rx FIFO overrun errors. Default: half of the Tx FIFO size (4). + + CONFIG_TIVA_ETHERNET - This must be set (along with CONFIG_NET) + to build the Stellaris Ethernet driver + CONFIG_TIVA_ETHLEDS - Enable to use Ethernet LEDs on the board. + CONFIG_TIVA_BOARDMAC - If the board-specific logic can provide + a MAC address (via tiva_ethernetmac()), then this should be selected. + CONFIG_TIVA_ETHHDUPLEX - Set to force half duplex operation + CONFIG_TIVA_ETHNOAUTOCRC - Set to suppress auto-CRC generation + CONFIG_TIVA_ETHNOPAD - Set to suppress Tx padding + CONFIG_TIVA_MULTICAST - Set to enable multicast frames + CONFIG_TIVA_PROMISCUOUS - Set to enable promiscuous mode + CONFIG_TIVA_BADCRC - Set to enable bad CRC rejection. + CONFIG_TIVA_DUMPPACKET - Dump each packet received/sent to the console. + +Configurations +^^^^^^^^^^^^^^ + +Each Stellaris LM3S8962 Evaluation Kit configuration is maintained in a +sub-directory and can be selected as follow: + + cd tools + ./configure.sh lm3s8962-ek/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + Configures the NuttShell (nsh) located at examples/nsh. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. This configuration uses Cygwin under Windows with the NuttX buildroot + tool chain. This is eaily change by modifying the following: + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y + + 3. The configuration enables both the serial and telnetd NSH interfaces. + + 4. As it is configured now, you MUST have a network connected. Otherwise, + the NSH prompt will not come up because the Ethernet driver is waiting + for the network to come up. That is probably a bug in the Ethernet + driver behavior! + + nx + An example using the NuttX graphics system (NX). This example + focuses on general window controls, movement, mouse and keyboard + input. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. This configuration uses Cygwin under Windows with the NuttX buildroot + tool chain. This is eaily change by modifying the following: + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y diff --git a/configs/lm3s8962-ek/include/board.h b/configs/lm3s8962-ek/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..0574814e9f43d6f609b1476ee1041534013b5628 --- /dev/null +++ b/configs/lm3s8962-ek/include/board.h @@ -0,0 +1,127 @@ +/************************************************************************************ + * configs/lm3s8962-ek/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* RCC settings */ + +#define SYSCON_RCC_XTAL SYSCON_RCC_XTAL8000KHZ /* Eagle100 on-board crystall is 8.00 MHz */ +#define XTAL_FREQUENCY 8000000 + +/* Oscillator source is the main oscillator (not internal, internal/4, 30KHz or + * 30KHz from hibernate module) */ + +#define SYSCON_RCC_OSCSRC SYSCON_RCC_OSCSRC_MOSC +#define SYSCON_RCC2_OSCSRC SYSCON_RCC2_OSCSRC2_MOSC +#define OSCSRC_FREQUENCY XTAL_FREQUENCY + +/* Use system divider = 4; this corresponds to a system clock frequency + * of (400 / 2) / 4 = 50MHz + */ + +#define TIVA_SYSDIV 4 +#define SYSCLK_FREQUENCY 50000000 /* 50MHz */ + +/* Other RCC settings: + * + * - Main and internal oscillators enabled. + * - PLL and sys dividers not bypassed + * - PLL not powered down + * - No auto-clock gating reset + */ + +#define TIVA_RCC_VALUE (SYSCON_RCC_OSCSRC | SYSCON_RCC_XTAL | SYSCON_RCC_USESYSDIV | SYSCON_RCC_SYSDIV(TIVA_SYSDIV)) + +/* RCC2 settings -- RCC2 not used. Other RCC2 settings + * + * - PLL and sys dividers not bypassed. + * - PLL not powered down + * - Not using RCC2 + */ + +#define TIVA_RCC2_VALUE (SYSCON_RCC2_OSCSRC | SYSCON_RCC2_SYSDIV(TIVA_SYSDIV)) + +/* LED definitions ******************************************************************/ + +/* The LMS38962 Eval Kit has only one user LED: Port F, Bit 0. Below is the mapping of this + * single LED. From this single LED, we can get the following information: + * + * OFF Steady: The system has failed to boot to the point of enabling interrupts + * ON Steady: The systems has enabled interrupts, but none have been received + * Dull glow: The system is taking interrupts + * Slow blinking: The system has panicked + */ + /* ON OFF */ +#define LED_STARTED 0 /* OFF OFF */ +#define LED_HEAPALLOCATE 1 /* OFF OFF */ +#define LED_IRQSENABLED 2 /* ON ON */ +#define LED_STACKCREATED 3 /* ON ON */ +#define LED_INIRQ 4 /* ON OFF */ +#define LED_SIGNAL 5 /* ON OFF */ +#define LED_ASSERTION 6 /* ON OFF */ +#define LED_PANIC 7 /* ON OFF */ + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Stellaris architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/lm3s8962-ek/nsh/Make.defs b/configs/lm3s8962-ek/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..473080351afe2211adbf6bb56624e26acabacd65 --- /dev/null +++ b/configs/lm3s8962-ek/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/lm3s8962-ek/nsh/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lm3s8962-ek/nsh/defconfig b/configs/lm3s8962-ek/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..0a28a1cea2a3402b4a50f0b6ec0363b51eec63b8 --- /dev/null +++ b/configs/lm3s8962-ek/nsh/defconfig @@ -0,0 +1,1088 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +CONFIG_ARCH_CHIP_LM=y +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_LM3S6918 is not set +# CONFIG_ARCH_CHIP_LM3S9B96 is not set +# CONFIG_ARCH_CHIP_LM3S6432 is not set +# CONFIG_ARCH_CHIP_LM3S6965 is not set +CONFIG_ARCH_CHIP_LM3S8962=y +# CONFIG_ARCH_CHIP_LM4F120 is not set +CONFIG_ARCH_CHIP_LM3S=y +# CONFIG_LM_REVA2 is not set +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +# CONFIG_TIVA_HAVE_ADC0 is not set +# CONFIG_TIVA_HAVE_ADC1 is not set +# CONFIG_TIVA_I2C is not set +CONFIG_TIVA_HAVE_I2C1=y +# CONFIG_TIVA_HAVE_I2C2 is not set +# CONFIG_TIVA_HAVE_I2C3 is not set +# CONFIG_TIVA_HAVE_I2C4 is not set +# CONFIG_TIVA_HAVE_I2C5 is not set +# CONFIG_TIVA_HAVE_I2C6 is not set +# CONFIG_TIVA_HAVE_I2C7 is not set +# CONFIG_TIVA_HAVE_I2C8 is not set +# CONFIG_TIVA_HAVE_I2C9 is not set +CONFIG_TIVA_HAVE_UART3=y +# CONFIG_TIVA_HAVE_UART4 is not set +# CONFIG_TIVA_HAVE_UART5 is not set +# CONFIG_TIVA_HAVE_UART6 is not set +# CONFIG_TIVA_HAVE_UART7 is not set +CONFIG_TIVA_HAVE_SSI0=y +# CONFIG_TIVA_HAVE_SSI1 is not set +# CONFIG_TIVA_HAVE_SSI2 is not set +# CONFIG_TIVA_HAVE_SSI3 is not set +CONFIG_TIVA_HAVE_ETHERNET=y +CONFIG_TIVA_SSI=y +# CONFIG_TIVA_TIMER is not set +# CONFIG_TIVA_HAVE_TIMER0 is not set +# CONFIG_TIVA_HAVE_TIMER1 is not set +# CONFIG_TIVA_HAVE_TIMER2 is not set +CONFIG_TIVA_HAVE_TIMER3=y +CONFIG_TIVA_HAVE_TIMER4=y +CONFIG_TIVA_HAVE_TIMER5=y +# CONFIG_TIVA_HAVE_TIMER6 is not set +# CONFIG_TIVA_HAVE_TIMER7 is not set +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_UART3 is not set +CONFIG_TIVA_SSI0=y +# CONFIG_TIVA_TIMER3 is not set +# CONFIG_TIVA_TIMER4 is not set +# CONFIG_TIVA_TIMER5 is not set +CONFIG_TIVA_ETHERNET=y +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +CONFIG_TIVA_GPIO_IRQS=y +CONFIG_TIVA_HAVE_GPIOA_IRQS=y +CONFIG_TIVA_HAVE_GPIOB_IRQS=y +CONFIG_TIVA_HAVE_GPIOC_IRQS=y +CONFIG_TIVA_HAVE_GPIOD_IRQS=y +CONFIG_TIVA_HAVE_GPIOE_IRQS=y +CONFIG_TIVA_HAVE_GPIOF_IRQS=y +CONFIG_TIVA_HAVE_GPIOG_IRQS=y +CONFIG_TIVA_HAVE_GPIOH_IRQS=y +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +CONFIG_TIVA_GPIOF_IRQS=y +CONFIG_TIVA_GPIOG_IRQS=y +# CONFIG_TIVA_GPIOH_IRQS is not set + +# +# Stellaris Ethernet Configuration +# +# CONFIG_TIVA_ETHLEDS is not set +# CONFIG_TIVA_ETHHDUPLEX is not set +# CONFIG_TIVA_ETHNOAUTOCRC is not set +# CONFIG_TIVA_ETHNOPAD is not set +# CONFIG_TIVA_MULTICAST is not set +# CONFIG_TIVA_PROMISCUOUS is not set +# CONFIG_TIVA_TIMESTAMP is not set +# CONFIG_TIVA_BADCRC is not set +# CONFIG_TIVA_DUMPPACKET is not set +# CONFIG_TIVA_BOARDMAC is not set + +# +# Tiva/Stellaris SSI Configuration +# +CONFIG_SSI_POLLWAIT=y +CONFIG_SSI_TXLIMIT=4 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LM3S8962EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lm3s8962-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=8 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lm3s8962-ek/nsh/setenv.sh b/configs/lm3s8962-ek/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..2452b3302f5274448ad6bb8c46663b8aa2d5e887 --- /dev/null +++ b/configs/lm3s8962-ek/nsh/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/lm3s8962-ek/nsh/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lm3s8962-ek/nx/Make.defs b/configs/lm3s8962-ek/nx/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..aa65554d0c366b582a14f94dbbb3f53e3483d551 --- /dev/null +++ b/configs/lm3s8962-ek/nx/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/lm3s8962-ek/nx/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lm3s8962-ek/nx/defconfig b/configs/lm3s8962-ek/nx/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..db5c996245fb521b3457fb909ece82a6d7178a41 --- /dev/null +++ b/configs/lm3s8962-ek/nx/defconfig @@ -0,0 +1,890 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +CONFIG_ARCH_CHIP_LM=y +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_LM3S6918 is not set +# CONFIG_ARCH_CHIP_LM3S9B96 is not set +# CONFIG_ARCH_CHIP_LM3S6432 is not set +# CONFIG_ARCH_CHIP_LM3S6965 is not set +CONFIG_ARCH_CHIP_LM3S8962=y +# CONFIG_ARCH_CHIP_LM4F120 is not set +CONFIG_ARCH_CHIP_LM3S=y +# CONFIG_LM_REVA2 is not set +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +# CONFIG_TIVA_HAVE_ADC0 is not set +# CONFIG_TIVA_HAVE_ADC1 is not set +# CONFIG_TIVA_I2C is not set +CONFIG_TIVA_HAVE_I2C1=y +# CONFIG_TIVA_HAVE_I2C2 is not set +# CONFIG_TIVA_HAVE_I2C3 is not set +# CONFIG_TIVA_HAVE_I2C4 is not set +# CONFIG_TIVA_HAVE_I2C5 is not set +# CONFIG_TIVA_HAVE_I2C6 is not set +# CONFIG_TIVA_HAVE_I2C7 is not set +# CONFIG_TIVA_HAVE_I2C8 is not set +# CONFIG_TIVA_HAVE_I2C9 is not set +CONFIG_TIVA_HAVE_UART3=y +# CONFIG_TIVA_HAVE_UART4 is not set +# CONFIG_TIVA_HAVE_UART5 is not set +# CONFIG_TIVA_HAVE_UART6 is not set +# CONFIG_TIVA_HAVE_UART7 is not set +CONFIG_TIVA_HAVE_SSI0=y +# CONFIG_TIVA_HAVE_SSI1 is not set +# CONFIG_TIVA_HAVE_SSI2 is not set +# CONFIG_TIVA_HAVE_SSI3 is not set +CONFIG_TIVA_HAVE_ETHERNET=y +CONFIG_TIVA_SSI=y +# CONFIG_TIVA_TIMER is not set +# CONFIG_TIVA_HAVE_TIMER0 is not set +# CONFIG_TIVA_HAVE_TIMER1 is not set +# CONFIG_TIVA_HAVE_TIMER2 is not set +CONFIG_TIVA_HAVE_TIMER3=y +CONFIG_TIVA_HAVE_TIMER4=y +CONFIG_TIVA_HAVE_TIMER5=y +# CONFIG_TIVA_HAVE_TIMER6 is not set +# CONFIG_TIVA_HAVE_TIMER7 is not set +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_UART3 is not set +CONFIG_TIVA_SSI0=y +# CONFIG_TIVA_TIMER3 is not set +# CONFIG_TIVA_TIMER4 is not set +# CONFIG_TIVA_TIMER5 is not set +# CONFIG_TIVA_ETHERNET is not set +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +CONFIG_TIVA_GPIO_IRQS=y +CONFIG_TIVA_HAVE_GPIOA_IRQS=y +CONFIG_TIVA_HAVE_GPIOB_IRQS=y +CONFIG_TIVA_HAVE_GPIOC_IRQS=y +CONFIG_TIVA_HAVE_GPIOD_IRQS=y +CONFIG_TIVA_HAVE_GPIOE_IRQS=y +CONFIG_TIVA_HAVE_GPIOF_IRQS=y +CONFIG_TIVA_HAVE_GPIOG_IRQS=y +CONFIG_TIVA_HAVE_GPIOH_IRQS=y +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOP_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +CONFIG_TIVA_GPIOF_IRQS=y +CONFIG_TIVA_GPIOG_IRQS=y +# CONFIG_TIVA_GPIOH_IRQS is not set + +# +# Tiva/Stellaris SSI Configuration +# +CONFIG_SSI_POLLWAIT=y +CONFIG_SSI_TXLIMIT=4 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LM3S8962EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lm3s8962-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +CONFIG_BOARDCTL_GRAPHICS=y +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=12 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nx_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=12 +CONFIG_NFILE_STREAMS=12 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +CONFIG_SPI_EXCHANGE=y +CONFIG_SPI_CMDDATA=y +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=255 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +CONFIG_LCD_P14201=y +CONFIG_P14201_NINTERFACES=1 +CONFIG_P14201_SPIMODE=2 +CONFIG_P14201_FREQUENCY=3500000 +CONFIG_P14201_FRAMEBUFFER=y +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +# CONFIG_NX_DISABLE_4BPP is not set +CONFIG_NX_DISABLE_8BPP=y +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=6 +CONFIG_NXTK_BORDERCOLOR2=4 +CONFIG_NXTK_BORDERCOLOR3=8 +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +# CONFIG_EXAMPLES_NX_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NX_BGCOLOR=2 +CONFIG_EXAMPLES_NX_COLOR1=10 +CONFIG_EXAMPLES_NX_COLOR2=12 +CONFIG_EXAMPLES_NX_TBCOLOR=8 +CONFIG_EXAMPLES_NX_FONTCOLOR=0 +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=4 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +CONFIG_EXAMPLES_NX_EXTERNINIT=y +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lm3s8962-ek/nx/setenv.sh b/configs/lm3s8962-ek/nx/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..9909d8963a352d0cf8e72685f164346f0df63bae --- /dev/null +++ b/configs/lm3s8962-ek/nx/setenv.sh @@ -0,0 +1,62 @@ +#!/bin/bash +# configs/lm3s8962-ek/nx/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lm3s8962-ek/scripts/ld.script b/configs/lm3s8962-ek/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..ccb22ddfaeb9910af76e4b90dd9c89d6eeb75a76 --- /dev/null +++ b/configs/lm3s8962-ek/scripts/ld.script @@ -0,0 +1,114 @@ +/**************************************************************************** + * configs/lm3s8962-ek/scripts/ld.script + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LM3S8962 has 256Kb of FLASH beginning at address 0x0000:0000 and 64Kb + * of SRAM beginning at 0x2000:0000. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The LM3S6918 has 64Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lm3s8962-ek/src/.gitignore b/configs/lm3s8962-ek/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/lm3s8962-ek/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/lm3s8962-ek/src/Makefile b/configs/lm3s8962-ek/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..8839324ae3e6064c6d36276c825b3faee7bd746a --- /dev/null +++ b/configs/lm3s8962-ek/src/Makefile @@ -0,0 +1,49 @@ +############################################################################ +# configs/lm3s8962-ek/src/Makefile +# +# Copyright (C) 2010, 2012, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lm_boot.c lm_leds.c lm_ethernet.c lm_ssi.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lm_appinit.c +endif + +ifeq ($(CONFIG_NX_LCDDRIVER),y) +CSRCS += lm_oled.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/lm3s8962-ek/src/lm3s8962-ek.h b/configs/lm3s8962-ek/src/lm3s8962-ek.h new file mode 100644 index 0000000000000000000000000000000000000000..4f2acdb5c1603b5e9a68e94782c7982f46d119d7 --- /dev/null +++ b/configs/lm3s8962-ek/src/lm3s8962-ek.h @@ -0,0 +1,133 @@ +/************************************************************************************ + * configs/lm3s8962-ek/src/lm3s8962-ek.h + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_LM3S8962_EK_SRC_LM3S8962EK_H +#define __CONFIGS_LM3S8962_EK_SRC_LM3S8962EK_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include "chip.h" +#include "tiva_gpio.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* How many SSI modules does this chip support? The LM3S8962 supports 1 SSI + * module (others may support more than 2 -- in such case, the following must be + * expanded). + */ + +#if TIVA_NSSI == 0 +# undef CONFIG_TIVA_SSI0 +# undef CONFIG_TIVA_SSI1 +#elif TIVA_NSSI == 1 +# undef CONFIG_TIVA_SSI1 +#endif + +/* LM3S8962 Eval Kit ***************************************************************/ + +/* GPIO Usage + * + * PIN SIGNAL EVB Function + * --- ----------- --------------------------------------- + * 26 PA0/U0RX Virtual COM port receive + * 27 PA1/U0TX Virtual COM port transmit + * 10 PD0/IDX0 SD card chip select + * 11 PD1/PWM1 Sound + * 30 PA4/SSI0RX SD card data out + * 31 PA5/SSI0TX SD card and OLED display data in + * 28 PA2/SSI0CLK SD card and OLED display clock + * 22 PC7/PHB0 OLED display data/control select + * 29 PA3/SSI0FSS OLED display chip select + * 73 PE1/PWM5 Down switch + * 74 PE2/PHB1 Left switch + * 72 PE0/PWM4 Up switch + * 75 PE3/PHA1 Right switch + * 61 PF1/IDX1 Select switch + * 47 PF0/PWM0 User LED + * 23 PC6/CCP3 Enable +15 V + */ + +/* GPIO for microSD card chip select: + * - PD0: SD card chip select (CARDCSn) + */ + +#define SDCCS_GPIO (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STDWPU | GPIO_STRENGTH_4MA | \ + GPIO_VALUE_ONE | GPIO_PORTD | 0) + +/* GPIO for single LED: + * - PF0: User LED + */ + +#define LED_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTF | 0) + +/* GPIOs for OLED: + * - PC7: OLED display data/control select (D/Cn) + * - PA3: OLED display chip select (CSn) + * - PC6: Enable +15V needed by OLED (EN+15V) + */ + +#define OLEDDC_GPIO (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STD | GPIO_STRENGTH_8MA | \ + GPIO_VALUE_ONE | GPIO_PORTC | 7) +#define OLEDCS_GPIO (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STDWPU | GPIO_STRENGTH_4MA | \ + GPIO_VALUE_ONE | GPIO_PORTA | 3) +#define OLEDEN_GPIO (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STD | GPIO_STRENGTH_8MA | \ + GPIO_VALUE_ONE | GPIO_PORTC | 6) + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: lm_ssidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LM3S8962 Eval Kit. + * + ************************************************************************************/ + +void weak_function lm_ssidev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_LM3S8962_EK_SRC_LM3S8962EK_H */ + diff --git a/configs/lm3s8962-ek/src/lm_appinit.c b/configs/lm3s8962-ek/src/lm_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..7a027dda55adf9f01cd90b568e525c85e0e2ad4c --- /dev/null +++ b/configs/lm3s8962-ek/src/lm_appinit.c @@ -0,0 +1,153 @@ +/**************************************************************************** + * config/lm3s8962-ek/src/lm_appinit.c + * + * Copyright (C) 2010, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "tiva_ssi.h" +#include "lm3s8962-ek.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#undef NSH_HAVEUSBDEV +#define NSH_HAVEMMCSD 1 + +/* PORT and SLOT number depend on the board configuration */ + +#ifdef CONFIG_NSH_ARCHINIT +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 0 +# error "The LM3S8962 Eval Kit MMC/SD is on SSI0" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 0 +# endif + +# if !defined(CONFIG_NSH_MMCSDSLOTNO) || CONFIG_NSH_MMCSDSLOTNO != 0 +# error "The LM3S8962 Eval Kit MMC/SD is on SSI0 slot 0" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif + +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif + +#else +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 0 +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# undef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef NSH_HAVEMMCSD +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef NSH_HAVEMMCSD + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + spi = tiva_ssibus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + syslog(LOG_INFO, "Binding SPI port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, CONFIG_NSH_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfuly bound SPI port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); +#endif + return OK; +} diff --git a/configs/lm3s8962-ek/src/lm_boot.c b/configs/lm3s8962-ek/src/lm_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..aeb666f624e54d8c7d3ebafa84c383ec570b30d7 --- /dev/null +++ b/configs/lm3s8962-ek/src/lm_boot.c @@ -0,0 +1,93 @@ +/************************************************************************************ + * configs/lm3s8962-ek/src/lm_boot.c + * + * Copyright (C) 2010, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "lm3s8962-ek.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Stellaris architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SSI is not disabled, and 2) the weak function + * lm_ssidev_initialize() has been brought into the link. + */ + + /* The LM3S8962 Eval Kit microSD CS and OLED are on SSI0 (Duh! There is no SSI1) */ + +#if defined(CONFIG_TIVA_SSI0) /* || defined(CONFIG_TIVA_SSI1) */ + if (lm_ssidev_initialize) + { + lm_ssidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/lm3s8962-ek/src/lm_ethernet.c b/configs/lm3s8962-ek/src/lm_ethernet.c new file mode 100644 index 0000000000000000000000000000000000000000..fb5db9e152504d318a5291e7ff1c7321c3a24aea --- /dev/null +++ b/configs/lm3s8962-ek/src/lm_ethernet.c @@ -0,0 +1,98 @@ +/************************************************************************************ + * configs/lm3s8962-ek/src/lm_ethernet.c + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "tiva_ethernet.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_ethernetmac + * + * Description: + * For the Ethernet Eval Kits, the MAC address will be stored in the non-volatile + * USER0 and USER1 registers. If CONFIG_TIVA_BOARDMAC is defined, this function + * will obtain the MAC address from these registers. + * + ************************************************************************************/ + +#ifdef CONFIG_TIVA_BOARDMAC +void tiva_ethernetmac(struct ether_addr *ethaddr) +{ + uint32_t user0; + uint32_t user1; + + /* Get the current value of the user registers */ + + user0 = getreg32(TIVA_FLASH_USERREG0); + user1 = getreg32(TIVA_FLASH_USERREG1); + + nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff); + DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff); + + /* Re-format that MAC address the way that uIP expects to see it */ + + ethaddr->ether_addr_octet[0] = ((user0 >> 0) & 0xff); + ethaddr->ether_addr_octet[1] = ((user0 >> 8) & 0xff); + ethaddr->ether_addr_octet[2] = ((user0 >> 16) & 0xff); + ethaddr->ether_addr_octet[3] = ((user1 >> 0) & 0xff); + ethaddr->ether_addr_octet[4] = ((user1 >> 8) & 0xff); + ethaddr->ether_addr_octet[5] = ((user1 >> 16) & 0xff); +} +#endif diff --git a/configs/lm3s8962-ek/src/lm_leds.c b/configs/lm3s8962-ek/src/lm_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..28f925d26e021514d2fdbf7bbb0bff5001e6e83a --- /dev/null +++ b/configs/lm3s8962-ek/src/lm_leds.c @@ -0,0 +1,165 @@ +/**************************************************************************** + * configs/lm3s8962-ek/src/lm_leds.c + * + * Copyright (C) 2010, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "tiva_gpio.h" +#include "lm3s8962-ek.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef CONFIG_DEBUG_LEDS +# define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +static uint8_t g_nest; + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + leddbg("Initializing\n"); + + /* Configure Port E, Bit 1 as an output, initial value=OFF */ + + led_dumpgpio("board_autoled_initialize before tiva_configgpio()"); + tiva_configgpio(LED_GPIO); + led_dumpgpio("board_autoled_initialize after tiva_configgpio()"); + g_nest = 0; +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + case LED_STARTED: + case LED_HEAPALLOCATE: + default: + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + g_nest++; + case LED_IRQSENABLED: + case LED_STACKCREATED: + led_dumpgpio("board_autoled_on: before tiva_gpiowrite()"); + tiva_gpiowrite(LED_GPIO, false); + led_dumpgpio("board_autoled_on: after tiva_gpiowrite()"); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + case LED_IRQSENABLED: + case LED_STACKCREATED: + case LED_STARTED: + case LED_HEAPALLOCATE: + default: + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + if (--g_nest <= 0) + { + led_dumpgpio("board_autoled_off: before tiva_gpiowrite()"); + tiva_gpiowrite(LED_GPIO, true); + led_dumpgpio("board_autoled_off: after tiva_gpiowrite()"); + } + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/lm3s8962-ek/src/lm_oled.c b/configs/lm3s8962-ek/src/lm_oled.c new file mode 100644 index 0000000000000000000000000000000000000000..197a614e790a2bc7b3313b0538fb5742818c7be3 --- /dev/null +++ b/configs/lm3s8962-ek/src/lm_oled.c @@ -0,0 +1,174 @@ +/**************************************************************************** + * config/lm3s8962-ek/src/lm_oled.c + * + * Copyright (C) 2010, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "tiva_gpio.h" +#include "tiva_ssi.h" +#include "lm3s8962-ek.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Define the CONFIG_LCD_RITDEBUG to enable detailed debug output (stuff you + * would never want to see unless you are debugging this file). + * + * Verbose debug must also be enabled + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_LCD_RITDEBUG +#endif + +#ifdef CONFIG_LCD_RITDEBUG +# define ritdbg(format, ...) vdbg(format, ##__VA_ARGS__) +# define oleddc_dumpgpio(m) tiva_dumpgpio(OLEDDC_GPIO, m) +# define oledcs_dumpgpio(m) tiva_dumpgpio(OLEDCS_GPIO, m) +#else +# define ritdbg(x...) +# define oleddc_dumpgpio(m) +# define oledcs_dumpgpio(m) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED GPIOs */ + + oledcs_dumpgpio("board_graphics_setup: After OLEDCS setup"); + oleddc_dumpgpio("board_graphics_setup: On entry"); + + tiva_configgpio(OLEDDC_GPIO); /* PC7: OLED display data/control select (D/Cn) */ + tiva_configgpio(OLEDEN_GPIO); /* PC6: Enable +15V needed by OLED (EN+15V) */ + + oleddc_dumpgpio("board_graphics_setup: After OLEDDC/EN setup"); + + /* Get the SSI port (configure as a Freescale SPI port) */ + + spi = tiva_ssibus_initialize(0); + if (!spi) + { + glldbg("Failed to initialize SSI port 0\n"); + } + else + { + /* Bind the SSI port to the OLED */ + + dev = rit_initialize(spi, devno); + if (!dev) + { + glldbg("Failed to bind SSI port 0 to OLED %d: %d\n", devno); + } + else + { + gllvdbg("Bound SSI port 0 to OLED %d\n", devno); + + /* And turn the OLED on (CONFIG_LCD_MAXPOWER should be 1) */ + + (void)dev->setpower(dev, CONFIG_LCD_MAXPOWER); + return dev; + } + } + return NULL; +} + +/**************************************************************************** + * Name: tiva_ssicmddata + * + * Description: + * Set or clear the SD1329 D/Cn bit to select data (true) or command + * (false). This function must be provided by platform-specific logic. + * This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +int tiva_ssicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + if (devid == SPIDEV_DISPLAY) + { + /* Set GPIO to 1 for data, 0 for command */ + + tiva_gpiowrite(OLEDDC_GPIO, !cmd); + return OK; + } + + return -ENODEV; +} diff --git a/configs/lm3s8962-ek/src/lm_ssi.c b/configs/lm3s8962-ek/src/lm_ssi.c new file mode 100644 index 0000000000000000000000000000000000000000..fc9a1efb24e171f4ad17a41105615f43531ab6bb --- /dev/null +++ b/configs/lm3s8962-ek/src/lm_ssi.c @@ -0,0 +1,163 @@ +/************************************************************************************ + * configs/lm3s8962-ek/src/lm_ssi.c + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "tiva_gpio.h" +#include "lm3s8962-ek.h" + +/* The LM3S8962 Eval Kit microSD CS is on SSI0 */ + +#if defined(CONFIG_TIVA_SSI0) /* || defined(CONFIG_TIVA_SSI1) */ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SSI_DEBUG /* Define to enable debug */ +#undef SSI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SSI_DEBUG +# define ssidbg lldbg +# ifdef SSI_VERBOSE +# define ssivdbg lldbg +# else +# define ssivdbg(x...) +# endif +#else +# undef SSI_VERBOSE +# define ssidbg(x...) +# define ssivdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef SSI_VERBOSE +# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m) +#else +# define ssi_dumpgpio(m) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lm_ssidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LM3S8962 Eval Kit. + * + ************************************************************************************/ + +void weak_function lm_ssidev_initialize(void) +{ + /* Configure the SPI-based microSD CS GPIO */ + + ssi_dumpgpio("lm_ssidev_initialize() Entry)"); + tiva_configgpio(SDCCS_GPIO); +#ifdef CONFIG_NX_LCDDRIVER + tiva_configgpio(OLEDCS_GPIO); +#endif + ssi_dumpgpio("lm_ssidev_initialize() Exit"); +} + +/**************************************************************************** + * The external functions, tiva_ssiselect and tiva_ssistatus must be provided + * by board-specific logic. The are implementations of the select and status + * methods SPI interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * All othermethods (including tiva_ssibus_initialize()) are provided by common + * logic. To use this common SPI logic on your board: + * + * 1. Provide tiva_ssiselect() and tiva_ssistatus() functions in your + * board-specific logic. This function will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 2. Add a call to tiva_ssibus_initialize() in your low level initialization + * logic + * 3. The handle returned by tiva_ssibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssi_dumpgpio("tiva_ssiselect() Entry"); + + if (devid == SPIDEV_MMCSD) + { + /* Assert the CS pin to the card */ + + tiva_gpiowrite(SDCCS_GPIO, !selected); + } +#ifdef CONFIG_NX_LCDDRIVER + else if (devid == SPIDEV_DISPLAY) + { + /* Assert the CS pin to the display */ + + tiva_gpiowrite(OLEDCS_GPIO, !selected); + } +#endif + ssi_dumpgpio("tiva_ssiselect() Exit"); +} + +uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + ssidbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} + +#endif /* CONFIG_TIVA_SSI0 || CONFIG_TIVA_SSI1 */ diff --git a/configs/lm4f120-launchpad/Kconfig b/configs/lm4f120-launchpad/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..2586ae63bdb99edcdd128d298d1e855aaf49f318 --- /dev/null +++ b/configs/lm4f120-launchpad/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_LM4F120_LAUNCHPAD +endif diff --git a/configs/lm4f120-launchpad/README.txt b/configs/lm4f120-launchpad/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..e90f68b16d89b6d2fa346b1bb8f5a5398f470c30 --- /dev/null +++ b/configs/lm4f120-launchpad/README.txt @@ -0,0 +1,702 @@ +README +^^^^^^ + +README for NuttX port to the Stellaris LM4F120 LaunchPad. The Stellaris® LM4F120 LaunchPad Evaluation Board is a low-cost evaluation platform for ARM® Cortex™-M4F-based microcontrollers from Texas Instruments. + +Contents +^^^^^^^^ + + Stellaris LM4F120 LaunchPad + On-Board GPIO Usage + Development Environment + GNU Toolchain Options + IDEs + NuttX EABI "buildroot" Toolchain + NuttX OABI "buildroot" Toolchain + NXFLAT Toolchain + LEDs + Serial Console + USB Device Controller Functions + Using OpenOCD and GDB with an FT2232 JTAG emulator + LM4F120 LaunchPad Configuration Options + Configurations + +Stellaris LM4F120 LaunchPad +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +The Stellaris® LM4F120 LaunchPad Evaluation Kit offers these features: + +o A Stellaris® LaunchPad Evaluation board (EK-LM4F120XL) +o On-board Stellaris® In-Circuit Debug Interface (ICDI) +o Programmable user buttons and an RGB LED for custom applications. +o USB Micro-B plug to USB-A plug cable + +Features of the LM4F120H5QR Microcontroller + +o 32-bit ARM® Cortex™-M4F 80-MHz processor core. +o On-chip memory, featuring 256 KB single-cycle Flash up to 40 MHz (a + prefetch buffer improves performance above 40 MHz), 32 KB single-cycle + SRAM; internal ROM loaded with StellarisWare® software; 2KB EEPROM +o Two Controller Area Network (CAN) modules, using CAN protocol version + 2.0 part A/B and with bit rates up to 1 Mbps +o Universal Serial Bus (USB) controller with USB 2.0 full-speed (12 Mbps) + and low-speed (1.5 Mbps) operation, 32 endpoints, and USB OTG/Host/Device + mode +o Advanced serial integration, featuring: eight UARTs with IrDA, 9-bit, and + ISO 7816 support (one UART with modem status and modem flow control); four + Synchronous Serial Interface (SSI) modules, supporting operation for + Freescale SPI, MICROWIRE, or Texas Instruments synchronous serial + interfaces; four Inter-Integrated Circuit (I2C) modules, providing + Standard (100 Kbps) and Fast (400 Kbps) transmission and support for + sending and receiving data as either a master or a slave +o ARM PrimeCell® 32-channel configurable µDMA controller, providing a way to + offload data transfer tasks from the Cortex™-M4F processor, allowing for + more efficient use of the processor and the available bus bandwidth +o Analog support, featuring: two 12-bit Analog-to-Digital Converters (ADC) + with 12 analog input channels and a sample rate of one million + samples/second; two analog comparators; 16 digital comparators; on-chip + voltage regulator +o Advanced motion control, featuring: eight Pulse Width Modulation (PWM) + generator blocks, each with one 16-bit counter, two PWM comparators, a + PWM signal generator, a dead-band generator, and an interrupt/ADC-trigger + selector; two PWM fault inputs to promote low-latency shutdown; two + Quadrature Encoder Interface (QEI) modules, with position integrator to + rack encoder position and velocity capture using built-in timer +o Two ARM FiRM-compliant watchdog timers; six 32-bit general-purpose timers + (up to twelve 16-bit); six wide 64-bit general-purpose timers (up to twelve + 32-bit); 12 16/32-bit and 12 32/64-bit Capture Compare PWM (CCP) pins +o Up to 43 GPIOs (depending on configuration), with programmable control for + GPIO interrupts and pad configuration, and highly flexible pin muxing +o Lower-power battery-backed Hibernation module with Real-Time Clock +o Multiple clock sources for microcontroller system clock: Precision + Oscillator (PIOSC), Main Oscillator (MOSC), 32.768-kHz external oscillator + for the Hibernation Module, and Internal 30-kHz Oscillator +o Full-featured debug solution with debug access via JTAG and Serial Wire + interfaces, and IEEE 1149.1-1990 compliant Test Access Port (TAP) controller +o Industrial-range (-40°C to 85°C) RoHS-compliant 64-pin LQFP + +On-Board GPIO Usage +=================== + +PIN SIGNAL(S) LanchPad Function +--- ---------------------------------------- --------------------------------------- + 17 PA0/U0RX DEBUG/VCOM, Virtual COM port receive + 18 PA1/U0TX DEBUG/VCOM, Virtual COM port transmit + 19 PA2/SSIOCLK GPIO, J2 pin 10 + 20 PA3/SSIOFSS GPIO, J2 pin 9 + 21 PA4/SSIORX GPIO, J2 pin 8 + 22 PA5/SSIOTX GPIO, J1 pin 8 + 23 PA6/I2CLSCL GPIO, J1 pin 9 + 24 PA7/I2CLSDA GPIO, J1 pin 10 + + 45 PB0/T2CCP0/U1Rx GPIO, J1 pin 3 + 46 PB1/T2CCP1/U1Tx GPIO, J1 pin 4 + 47 PB2/I2C0SCL/T3CCP0 GPIO, J2, pin 3 + 48 PB3/I2C0SDA/T3CCP1 GPIO, J4 pin 3 + 58 PB4/AIN10/CAN0Rx/SSI2CLK/T1CCP0 GPIO, J1 pin 7 + 57 PB5/AIN11/CAN0Tx/SSI2FSS/T1CCP1 GPIO, J1 pin 2 + 01 PB6/SSI2RX/T0CCP0 GPIO, J2 pin 7 + 04 PB7/SSI2TX/T0CCP1 GPIO, J2 pin 6 + + 52 PC0/SWCLK/T4CCP0/TCK DEBUG/VCOM + 51 PC1/SWDIO/T4CCP1/TMS DEBUG/VCOM + 50 PC2/T5CCP0/TDI DEBUG/VCOM + 49 PC3/SWO/T5CCP1/TDO DEBUG/VCOM + 16 PC4/C1-/U1RTS/U1RX/U4RX/WT0CCP0 GPIO, J4 pin 4 + 15 PC5/C1+/U1CTS/U1TX/U4TX/WT0CCP1 GPIO, J4 pin 5 + 14 PC6/C0+/U3RX/WT1CCP0 GPIO, J4 pin 6 + 13 PC7/C0-/U3TX/WT1CCP1 GPIO, J4 pin 7 + + 61 PD0/AIN7/I2C3SCL/SSI1CLK/SSI3CLKWT2CCP0 Connects to PB6 via resistor, GPIO, J3 pin 3 + 62 PD1/AIN6/I2C3SDA/SSI1Fss/SSI3Fss/WT2CCP1 Connects to PB7 via resistor, GPIO, J3 Pin 4 + 63 PD2/AIN5/SSI1RX/SSI3RX/WT3CCP0 GPIO, J3 pin 5 + 64 PD3/AIN4/SSI1TX/SSI3TX/WT3CCP1 GPIO, J3 pin 6 + 43 PD4/U6RX/USB0DM/WT4CCP0 USB_DM + 44 PD5/U6TX/USB0DP/WT4CCP1 USB_DP + 53 PD6/U2RX/WT5CCP0 GPIO, J4 pin 8 + 10 PD7/NMI/U2TX/WT5CCP1 +USB_VBUS, GPIO, J4 pin 9 + Used for VBUS detection when + configured as a self-powered USB + Device + + 09 PE0/AIN3/U7RX GPIO, J2 pin 3 + 08 PE1/AIN2/U7TX GPIO, J3 pin 7 + 07 PE2/AIN1 GPIO, J3 pin 8 + 06 PE3/AIN0 GPIO, J3 pin 9 + 59 PE4/AIN9/CAN0RX/I2C2SCL/U5RX GPIO, J1 pin 5 + 60 PE5/AIN8/CAN0TX/I2C2SDA/U5TX GPIO, J1 pin 6 + + 28 PF0/C0O/CAN0RX/NMI/SSI1RX/T0CCP0/U1RTS USR_SW2 (Low when pressed), GPIO, J2 pin 4 + 29 PF1/C1O/SSI1TX/T0CCP1/TRD1/U1CTS LED_R, GPIO, J3 pin 10 + 30 PF2/SSI1CLK/T1CCP0/TRD0 LED_B, GPIO, J4 pin 1 + 31 PF3/CAN0TX/SSI1FSS/T1CCP1/TRCLK LED_G, GPIO, J4 pin 2 + 05 PF4/T2CCP0 USR_SW1 (Low when pressed), GPIO, J4 pin 10 + +Using OpenOCD and GDB with an FT2232 JTAG emulator +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + Building OpenOCD under Cygwin: + + Refer to configs/olimex-lpc1766stk/README.txt + + Installing OpenOCD in Linux: + + sudo apt-get install openocd + + As of this writing, there is no support for the lm4f120 in the package + above. You will have to build openocd from its source (as of this writing + the latest commit was b9b4bd1a6410ff1b2885d9c2abe16a4ae7cb885f): + + git clone http://git.code.sf.net/p/openocd/code openocd + cd openocd + + Then, add the patches provided by http://openocd.zylin.com/922: + + git fetch http://openocd.zylin.com/openocd refs/changes/22/922/14 && git checkout FETCH_HEAD + ./bootstrap + ./configure --enable-maintainer-mode --enable-ti-icdi + make + sudo make install + + For additional help, see http://processors.wiki.ti.com/index.php/Stellaris_Launchpad_with_OpenOCD_and_Linux + + Helper Scripts. + + I have been using the on-board In-Circuit Debug Interface (ICDI) interface. + OpenOCD requires a configuration file. I keep the one I used last here: + + configs/lm4f120-launchpad/tools/lm4f120-launchpad.cfg + + However, the "correct" configuration script to use with OpenOCD may + change as the features of OpenOCD evolve. So you should at least + compare that lm4f120-launchpad.cfg file with configuration files in + /usr/share/openocd/scripts. As of this writing, the configuration + files of interest were: + + /usr/local/share/openocd/scripts/board/ek-lm4f120xl.cfg + /usr/local/share/openocd/scripts/interface/ti-icdi.cfg + /usr/local/share/openocd/scripts/target/stellaris_icdi.cfg + + There is also a script on the tools/ directory that I use to start + the OpenOCD daemon on my system called oocd.sh. That script will + probably require some modifications to work in another environment: + + - Possibly the value of OPENOCD_PATH and TARGET_PATH + - It assumes that the correct script to use is the one at + configs/lm4f120-launchpad/tools/lm4f120-launchpad.cfg + + Starting OpenOCD + + If you are in the top-level NuttX build directlory then you should + be able to start the OpenOCD daemon like: + + oocd.sh $PWD + + The relative path to the oocd.sh script is configs/lm4f120-launchpad/tools, + but that should have been added to your PATH variable when you sourced + the setenv.sh script. + + Note that OpenOCD needs to be run with administrator privileges in + some environments (sudo). + + Connecting GDB + + Once the OpenOCD daemon has been started, you can connect to it via + GDB using the following GDB command: + + arm-nuttx-elf-gdb + (gdb) target remote localhost:3333 + + NOTE: The name of your GDB program may differ. For example, with the + CodeSourcery toolchain, the ARM GDB would be called arm-none-eabi-gdb. + + After starting GDB, you can load the NuttX ELF file: + + (gdb) symbol-file nuttx + (gdb) monitor reset + (gdb) monitor halt + (gdb) load nuttx + + NOTES: + 1. Loading the symbol-file is only useful if you have built NuttX to + include debug symbols (by setting CONFIG_DEBUG_SYMBOLS=y in the + .config file). + 2. The MCU must be halted prior to loading code using 'mon reset' + as described below. + + OpenOCD will support several special 'monitor' commands. These + GDB commands will send comments to the OpenOCD monitor. Here + are a couple that you will need to use: + + (gdb) monitor reset + (gdb) monitor halt + + NOTES: + 1. The MCU must be halted using 'mon halt' prior to loading code. + 2. Reset will restart the processor after loading code. + 3. The 'monitor' command can be abbreviated as just 'mon'. + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The NuttX buildroot Toolchain (default, see below), + 2. The CodeSourcery GNU toolchain, + 3. The devkitARM GNU toolchain, + 4. The Atollic toolchain, or + 5. The Code Red toolchain + + All testing has been conducted using the Buildroot toolchain for Cygwin/Linux. + To use a different toolchain, you simply need to add one of the following + configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows or Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : The Atollic toolchain under Windows or Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : The Code Red toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y : The Code Red toolchain under Linux + + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : If you use an older, OABI buildroot toolchain + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Code Red (for Windows) + toolchains are Windows native toolchains. The CodeSourcey (for Linux) and NuttX + buildroot toolchains are Cygwin and/or Linux native toolchains. There are several + limitations to using a Windows based toolchain in a Cygwin environment. The three + biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lm, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/tiva/tiva_vectors.S. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lm4f120-launchpad/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +^^^^ + The LM4F120 has a single RGB LED. If CONFIG_ARCH_LEDS is defined, then + support for the LaunchPad LEDs will be included in the build. See: + + - configs/lm4f120-launchpad/include/board.h - Defines LED constants, types and + prototypes the LED interface functions. + + - configs/lm4f120-launchpad/src/lm4f120-launchpad.h - GPIO settings for the LEDs. + + - configs/lm4f120-launchpad/src/up_leds.c - LED control logic. + + OFF: + - OFF means that the OS is still initializing. Initialization is very fast so + if you see this at all, it probably means that the system is hanging up + somewhere in the initialization phases. + + GREEN or GREEN-ish + - This means that the OS completed initialization. + + Bluish: + - Whenever and interrupt or signal handler is entered, the BLUE LED is + illuminated and extinguished when the interrupt or signal handler exits. + This will add a BLUE-ish tinge to the LED. + + Redish: + - If a recovered assertion occurs, the RED component will be illuminated + briefly while the assertion is handled. You will probably never see this. + + Flashing RED: + - In the event of a fatal crash, the BLUE and GREEN components will be + extinguished and the RED component will FLASH at a 2Hz rate. + +Serial Console +^^^^^^^^^^^^^^ + + By default, all configurations use UART0 which connects to the USB VCOM + on the DEBUG port on the LM4F120 LaunchPad: + + UART0 RX - PA.0 + UART0 TX - PA.1 + + However, if you use an external RS232 driver, then other options are + available. UART1 has option pin settings and flow control capabilities + that are not available with the other UARTS:: + + UART1 RX - PB.0 or PC.4 (Need disambiguation in board.h) + UART1 TX - PB.1 or PC.5 (" " " " "" " ") + + UART1_RTS - PF.0 or PC.4 + UART1_CTS - PF.1 or PC.5 + + NOTE: board.h currently selects PB.0, PB.1, PF.0 and PF.1 for UART1, but + that can be changed by editing board.h + + UART2-5, 7 are also available, UART2 is not recommended because it shares + some pin usage with USB device mode. UART6 is not available because its + only RX/TX pin options are dedicated to USB support. + + UART2 RX - PD.6 + UART2 TX - PD.7 (Also used for USB VBUS detection) + + UART3 RX - PC.6 + UART3 TX - PC.7 + + UART4 RX - PC.4 + UART4 TX - PC.5 + + UART5 RX - PE.4 + UART5 TX - PE.5 + + UART6 RX - PD.4, Not available. Dedicated for USB_DM + UART6 TX - PD.5, Not available. Dedicated for USB_DP + + UART7 RX - PE.0 + UART7 TX - PE.1 + +USB Device Controller Functions +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + Device Overview + + An FT2232 device from Future Technology Devices International Ltd manages + USB-to-serial conversion. The FT2232 is factory configured by Luminary + Micro to implement a JTAG/SWD port (synchronous serial) on channel A and + a Virtual COM Port (VCP) on channel B. This feature allows two simultaneous + communications links between the host computer and the target device using + a single USB cable. Separate Windows drivers for each function are provided + on the Documentation and Software CD. + + Debugging with JTAG/SWD + + The FT2232 USB device performs JTAG/SWD serial operations under the control + of the debugger or the Luminary Flash Programmer. It also operate as an + In-Circuit Debugger Interface (ICDI), allowing debugging of any external + target board. Debugging modes: + + MODE DEBUG FUNCTION USE SELECTED BY + 1 Internal ICDI Debug on-board LM4F120 Default Mode + microcontroller over USB + interface. + 2 ICDI out to JTAG/SWD The EVB is used as a USB Connecting to an external + header to SWD/JTAG interface to target and starting debug + an external target. software. The red Debug Out + LED will be ON. + 3 In from JTAG/SWD For users who prefer an Connecting an external + header external debug interface debugger to the JTAG/SWD + (ULINK, JLINK, etc.) with header. + the EVB. + + Virtual COM Port + + The Virtual COM Port (VCP) allows Windows applications (such as HyperTerminal) + to communicate with UART0 on the LM4F120 over USB. Once the FT2232 VCP + driver is installed, Windows assigns a COM port number to the VCP channel. + +LM4F120 LaunchPad Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lm + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LM4F120 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=lm4f120-launchpad (for the LM4F120 LaunchPad) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_LM4F120_LAUNCHPAD + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + There are configurations for disabling support for interrupts GPIO ports. + GPIOJ must be disabled because it does not exist on the LM4F120. + Additional interrupt support can be disabled if desired to reduce memory + footprint. + + CONFIG_TIVA_GPIOA_IRQS=y + CONFIG_TIVA_GPIOB_IRQS=y + CONFIG_TIVA_GPIOC_IRQS=y + CONFIG_TIVA_GPIOD_IRQS=y + CONFIG_TIVA_GPIOE_IRQS=y + CONFIG_TIVA_GPIOF_IRQS=y + CONFIG_TIVA_GPIOG_IRQS=y + CONFIG_TIVA_GPIOH_IRQS=y + CONFIG_TIVA_GPIOJ_IRQS=n << Always + + LM4F120 specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + CONFIG_TIVA_SSI0 - Select to enable support for SSI0 + CONFIG_TIVA_SSI1 - Select to enable support for SSI1 + CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support. + Poll-waiting is recommended if the interrupt rate would be to + high in the interrupt driven case. + CONFIG_SSI_TXLIMIT - Write this many words to the Tx FIFO before + emptying the Rx FIFO. If the SPI frequency is high and this + value is large, then larger values of this setting may cause + Rx FIFO overrun errors. Default: half of the Tx FIFO size (4). + + CONFIG_TIVA_ETHERNET - This must be set (along with CONFIG_NET) + to build the Stellaris Ethernet driver + CONFIG_TIVA_ETHLEDS - Enable to use Ethernet LEDs on the board. + CONFIG_TIVA_BOARDMAC - If the board-specific logic can provide + a MAC address (via tiva_ethernetmac()), then this should be selected. + CONFIG_TIVA_ETHHDUPLEX - Set to force half duplex operation + CONFIG_TIVA_ETHNOAUTOCRC - Set to suppress auto-CRC generation + CONFIG_TIVA_ETHNOPAD - Set to suppress Tx padding + CONFIG_TIVA_MULTICAST - Set to enable multicast frames + CONFIG_TIVA_PROMISCUOUS - Set to enable promiscuous mode + CONFIG_TIVA_BADCRC - Set to enable bad CRC rejection. + CONFIG_TIVA_DUMPPACKET - Dump each packet received/sent to the console. + +Configurations +^^^^^^^^^^^^^^ + +Each LM4F120 LaunchPad configuration is maintained in a +sub-directory and can be selected as follow: + + cd tools + ./configure.sh lm4f120-launchpad/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + configuration enables the serial VCOM interfaces on UART0. Support for + builtin applications is enabled, but in the base configuration no + builtin applications are selected. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too). + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot (arm-nuttx-elf-gcc) + CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary diff --git a/configs/lm4f120-launchpad/include/board.h b/configs/lm4f120-launchpad/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..0009ba764ba2b652c167c8130bf04fbd076dd21f --- /dev/null +++ b/configs/lm4f120-launchpad/include/board.h @@ -0,0 +1,206 @@ +/************************************************************************************ + * configs/lm4f120-launchpad/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_LM4F120_LAUNCHPAD_INCLUDE_BOARD_H +#define __CONFIGS_LM4F120_LAUNCHPAD_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* RCC settings. Crytals on-board the LM4F120 LaunchPad include: + * + * 16MHz connected to OSC0/1 (pins 40/41) + * 32.768kHz connected to XOSC0/1 (pins 34/36) + */ + +#define SYSCON_RCC_XTAL SYSCON_RCC_XTAL16000KHZ /* On-board crystal is 16 MHz */ +#define XTAL_FREQUENCY 16000000 + +/* Oscillator source is the main oscillator */ + +#define SYSCON_RCC_OSCSRC SYSCON_RCC_OSCSRC_MOSC +#define SYSCON_RCC2_OSCSRC SYSCON_RCC2_OSCSRC2_MOSC +#define OSCSRC_FREQUENCY XTAL_FREQUENCY + +/* Use system divider = 4; this corresponds to a system clock frequency + * of (400 / 1) / 5 = 80MHz (Using RCC2 and DIV400). + */ + +#define TIVA_SYSDIV 5 +#define SYSCLK_FREQUENCY 80000000 /* 80MHz */ + +/* Other RCC settings: + * + * - Main and internal oscillators enabled. + * - PLL and sys dividers not bypassed + * - PLL not powered down + * - No auto-clock gating reset + */ + +#define TIVA_RCC_VALUE (SYSCON_RCC_OSCSRC | SYSCON_RCC_XTAL | \ + SYSCON_RCC_USESYSDIV | SYSCON_RCC_SYSDIV(TIVA_SYSDIV)) + +/* RCC2 settings + * + * - PLL and sys dividers not bypassed. + * - PLL not powered down + * - Not using RCC2 + * + * When SYSCON_RCC2_DIV400 is not selected, SYSDIV2 is the divisor-1. + * When SYSCON_RCC2_DIV400 is selected, SYSDIV2 is the divisor-1)/2, plus + * the LSB: + * + * SYSDIV2 SYSDIV2LSB DIVISOR + * 0 N/A 2 + * 1 0 3 + * " 1 4 + * 2 0 5 + * " 1 6 + * etc. + */ + +#if (TIVA_SYSDIV & 1) == 0 +# define TIVA_RCC2_VALUE (SYSCON_RCC2_OSCSRC | SYSCON_RCC2_SYSDIV2LSB | \ + SYSCON_RCC2_SYSDIV_DIV400(TIVA_SYSDIV) | \ + SYSCON_RCC2_DIV400 | SYSCON_RCC2_USERCC2) +#else +# define TIVA_RCC2_VALUE (SYSCON_RCC2_OSCSRC | SYSCON_RCC2_SYSDIV_DIV400(TIVA_SYSDIV) | \ + SYSCON_RCC2_DIV400 | SYSCON_RCC2_USERCC2) +#endif + +/* LED definitions ******************************************************************/ +/* The LM4F120 LaunchPad has a single RGB LED. There is only one visible LED which + * will vary in color. But, from the standpoint of the firmware, this appears as + * three LEDs: + * + * BOARD_LED_R -- Connected to PF1 + * BOARD_LED_G -- Connected to PF3 + * BOARD_LED_B -- Connected to PF2 + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED_R 0 +#define BOARD_LED_G 1 +#define BOARD_LED_B 2 +#define BOARD_NLEDS 3 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) + +/* If CONFIG_ARCH_LEDS is defined, then automated support for the LaunchPad LEDs + * will be included in the build: + * + * OFF: + * - OFF means that the OS is still initializing. Initialization is very fast so + * if you see this at all, it probably means that the system is hanging up + * somewhere in the initialization phases. + * + * GREEN or GREEN-ish + * - This means that the OS completed initialization. + * + * Bluish: + * - Whenever and interrupt or signal handler is entered, the BLUE LED is + * illuminated and extinguished when the interrupt or signal handler exits. + * This will add a BLUE-ish tinge to the LED. + * + * Redish: + * - If a recovered assertion occurs, the RED component will be illuminated + * briefly while the assertion is handled. You will probably never see this. + * + * Flashing RED: + * - In the event of a fatal crash, the BLUE and GREEN components will be + * extinguished and the RED component will FLASH at a 2Hz rate. + */ + /* RED GREEN BLUE */ +#define LED_STARTED 0 /* OFF OFF OFF */ +#define LED_HEAPALLOCATE 0 /* OFF OFF OFF */ +#define LED_IRQSENABLED 0 /* OFF OFF OFF */ +#define LED_STACKCREATED 1 /* OFF ON OFF */ +#define LED_INIRQ 2 /* NC NC ON (momentary) */ +#define LED_SIGNAL 2 /* NC NC ON (momentary) */ +#define LED_ASSERTION 3 /* ON NC NC (momentary) */ +#define LED_PANIC 4 /* ON OFF OFF (flashing 2Hz) */ + +/* LED definitions ******************************************************************/ +/* The LM4F120 LaunchPad has a two buttons: + * + * BOARD_SW1 -- Connected to PF4 + * BOARD_SW2 -- Connected to PF0 + */ + +#define BUTTON_SW1 0 +#define BUTTON_SW2 1 +#define NUM_BUTTONS 2 + +#define BUTTON_SW1_BIT (1 << BUTTON_SW1) +#define BUTTON_SW2_BIT (1 << BUTTON_SW2) + +/* Pin Multiplexing Disambiguation **************************************************/ + +#define GPIO_UART1_CTS GPIO_UART1_CTS_1 +#define GPIO_UART1_RTS GPIO_UART1_RTS_1 +#define GPIO_UART1_RX GPIO_UART1_RX_1 +#define GPIO_UART1_TX GPIO_UART1_TX_1 + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Stellaris architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_LM4F120_LAUNCHPAD_INCLUDE_BOARD_H */ diff --git a/configs/lm4f120-launchpad/nsh/Make.defs b/configs/lm4f120-launchpad/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c9ff1c67c4026bcac5951434fe2fa7e278e675f2 --- /dev/null +++ b/configs/lm4f120-launchpad/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/lm4f120-launchpad/nsh/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lm4f120-launchpad/nsh/defconfig b/configs/lm4f120-launchpad/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..8156396e3e6f0c01faab721d14b1f1692b06aa98 --- /dev/null +++ b/configs/lm4f120-launchpad/nsh/defconfig @@ -0,0 +1,767 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +CONFIG_ARCH_CHIP_LM=y +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_FPU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_LM3S6918 is not set +# CONFIG_ARCH_CHIP_LM3S9B96 is not set +# CONFIG_ARCH_CHIP_LM3S6432 is not set +# CONFIG_ARCH_CHIP_LM3S6965 is not set +# CONFIG_ARCH_CHIP_LM3S8962 is not set +CONFIG_ARCH_CHIP_LM4F120=y +CONFIG_ARCH_CHIP_LM4F=y +# CONFIG_LM_REVA2 is not set + +# +# Tiva/Stellaris Peripheral Support +# +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_UART3 is not set +# CONFIG_TIVA_UART4 is not set +# CONFIG_TIVA_UART5 is not set +# CONFIG_TIVA_UART6 is not set +# CONFIG_TIVA_UART7 is not set +CONFIG_TIVA_SSI0=y +# CONFIG_TIVA_SSI1 is not set +# CONFIG_TIVA_ETHERNET is not set +# CONFIG_TIVA_FLASH is not set + +# +# Disable GPIO Interrupts +# +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +CONFIG_TIVA_GPIOF_IRQS=y +CONFIG_TIVA_GPIOG_IRQS=y +# CONFIG_TIVA_GPIOH_IRQS is not set +# CONFIG_TIVA_GPIOJ_IRQS is not set + +# +# Tiva/Stellaris SSI Configuration +# +CONFIG_SSI_POLLWAIT=y +CONFIG_SSI_TXLIMIT=4 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_ADDRENV is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LM4F120_LAUNCHPAD=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lm4f120-launchpad" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=24 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_SCHED_WAITPID=y +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=16 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_TMPDIR="/tmp" +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_CONSOLE=y + +# +# USB Trace Support +# +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lm4f120-launchpad/nsh/setenv.sh b/configs/lm4f120-launchpad/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c66b7edffb25daaf47b942b4dd36f79ebcc0b97b --- /dev/null +++ b/configs/lm4f120-launchpad/nsh/setenv.sh @@ -0,0 +1,74 @@ +#!/bin/bash +# configs/lm4f120-launchpad/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The lm4f120-launchpad/tools directory +export TOOL_DIR="${WD}/configs/lm4f120-launchpad/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lm4f120-launchpad/scripts/ld.script b/configs/lm4f120-launchpad/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..41b880e0a70de9dca1bfe5d4e33d421916375bb1 --- /dev/null +++ b/configs/lm4f120-launchpad/scripts/ld.script @@ -0,0 +1,115 @@ +/**************************************************************************** + * configs/lm4f120-launchpad/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LM4F120H5QR has 256Kb of FLASH beginning at address 0x0000:0000 and + * 32Kb of SRAM beginning at 0x2000:0000. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lm4f120-launchpad/src/.gitignore b/configs/lm4f120-launchpad/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/lm4f120-launchpad/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/lm4f120-launchpad/src/Makefile b/configs/lm4f120-launchpad/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..c9ef636d6d9c11926327ea25a232d4939d8f17dd --- /dev/null +++ b/configs/lm4f120-launchpad/src/Makefile @@ -0,0 +1,49 @@ +############################################################################ +# configs/lm4f120-launchpad/src/Makefile +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lm4f_boot.c lm4f_ssi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += lm4f_autoleds.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lm4f_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/lm4f120-launchpad/src/lm4f_appinit.c b/configs/lm4f120-launchpad/src/lm4f_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..b557f771f57642dce6a51215301ea31d9b644dab --- /dev/null +++ b/configs/lm4f120-launchpad/src/lm4f_appinit.c @@ -0,0 +1,87 @@ +/**************************************************************************** + * config/lm4f120-launchpad/src/lm4f_appinit.c + * arch/arm/src/board/lm4f_appinit.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_LM4F120_LAUNCHPAD +# undef NSH_HAVEUSBDEV +#else +# error "Unrecognized lm3s board" +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + return OK; +} diff --git a/configs/lm4f120-launchpad/src/lm4f_autoleds.c b/configs/lm4f120-launchpad/src/lm4f_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..9ffcd0fa314909137bcf4b096a9d94939c0d03a2 --- /dev/null +++ b/configs/lm4f120-launchpad/src/lm4f_autoleds.c @@ -0,0 +1,224 @@ +/**************************************************************************** + * configs/lm4f120-launchpad/src/lm4f_leds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "tiva_gpio.h" +#include "lmf4120-launchpad.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* The LM4F120 LaunchPad has a single RGB LED. There is only one visible LED + * which will vary in color. But, from the standpoint of the firmware, this + * appears as three LEDs: + * + * BOARD_LED_R -- Connected to PF1 + * BOARD_LED_G -- Connected to PF3 + * BOARD_LED_B -- Connected to PF2 + * + * If CONFIG_ARCH_LEDS is defined, then automated support for the LaunchPad LEDs + * will be included in the build: + * + * OFF: + * - OFF means that the OS is still initializing. Initialization is very fast so + * if you see this at all, it probably means that the system is hanging up + * somewhere in the initialization phases. + * + * GREEN or GREEN-ish + * - This means that the OS completed initialization. + * + * Bluish: + * - Whenever and interrupt or signal handler is entered, the BLUE LED is + * illuminated and extinguished when the interrupt or signal handler exits. + * This will add a BLUE-ish tinge to the LED. + * + * Redish: + * - If a recovered assertion occurs, the RED component will be illuminated + * briefly while the assertion is handled. You will probably never see this. + * + * Flashing RED: + * - In the event of a fatal crash, the BLUE and GREEN components will be + * extinguished and the RED component will FLASH at a 2Hz rate. + * + * RED GREEN BLUE + * LED_STARTED 0 OFF OFF OFF + * LED_HEAPALLOCATE 0 OFF OFF OFF + * LED_IRQSENABLED 0 OFF OFF OFF + * LED_STACKCREATED 1 OFF ON OFF + * LED_INIRQ 2 NC NC ON (momentary) + * LED_SIGNAL 2 NC NC ON (momentary) + * LED_ASSERTION 3 ON NC NC (momentary) + * LED_PANIC 4 ON OFF OFF (flashing 2Hz) + */ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef CONFIG_DEBUG_LEDS +# define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lm4f_led_initialize + * + * Description: + * Called to initialize the on-board LEDs. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void lm4f_led_initialize(void) +{ + leddbg("Initializing\n"); + + /* Configure Port E, Bit 1 as an output, initial value=OFF */ + + led_dumpgpio("lm4f_led_initialize before tiva_configgpio()"); + tiva_configgpio(GPIO_LED_R); + tiva_configgpio(GPIO_LED_G); + tiva_configgpio(GPIO_LED_B); + led_dumpgpio("lm4f_led_initialize after tiva_configgpio()"); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + /* All components stay off until the file initialization step */ + + default: + case 0: + break; + + /* The GREEN component is illuminated at the final initialization step */ + + case 1: + tiva_gpiowrite(GPIO_LED_G, false); + break; + + /* These will illuminate the BLUE component with on effect no RED and GREEN */ + + case 2: + tiva_gpiowrite(GPIO_LED_B, false); + break; + + /* This will turn off RED and GREEN and turn RED on */ + + case 4: + tiva_gpiowrite(GPIO_LED_G, true); + tiva_gpiowrite(GPIO_LED_B, true); + + /* This will illuminate the RED component with no effect on RED and GREEN */ + + case 3: + tiva_gpiowrite(GPIO_LED_R, false); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + /* These should not happen and are ignored */ + + default: + case 0: + case 1: + break; + + /* These will extinguish the BLUE component with no effect on RED and GREEN */ + + case 2: + tiva_gpiowrite(GPIO_LED_B, true); + break; + + /* These will extinguish the RED component with on effect on RED and GREEN */ + + case 3: + case 4: + tiva_gpiowrite(GPIO_LED_R, true); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/lm4f120-launchpad/src/lm4f_boot.c b/configs/lm4f120-launchpad/src/lm4f_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..778ded4c39c0150452c9e869ed8f0a9db199e7c8 --- /dev/null +++ b/configs/lm4f120-launchpad/src/lm4f_boot.c @@ -0,0 +1,93 @@ +/************************************************************************************ + * configs/lm4f120-launchpad/src/lm4f_boot.c + * arch/arm/src/board/lm4f_boot.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "lmf4120-launchpad.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Stellaris architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SSI is not disabled, and 2) the weak function + * lm_ssidev_initialize() has been brought into the link. + */ + + /* The LM4F LaunchPad microSD CS and OLED are on SSI0 (Duh! There is no SSI1) */ + +#if defined(CONFIG_TIVA_SSI0) /* || defined(CONFIG_TIVA_SSI1) */ + if (lm4f_spidev_initialize) + { + lm4f_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + lm4f_led_initialize(); +#endif +} diff --git a/configs/lm4f120-launchpad/src/lm4f_ssi.c b/configs/lm4f120-launchpad/src/lm4f_ssi.c new file mode 100644 index 0000000000000000000000000000000000000000..683b29249ccbd81677072bd0ba776f2834d2633d --- /dev/null +++ b/configs/lm4f120-launchpad/src/lm4f_ssi.c @@ -0,0 +1,133 @@ +/************************************************************************************ + * configs/lm4f120-launchpad/src/lm4f_ssi.c + * arch/arm/src/board/lm4f_ssi.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "tiva_gpio.h" +#include "lmf4120-launchpad.h" + +/* The LM4F LaunchPad microSD CS is on SSI0 */ + +#if defined(CONFIG_TIVA_SSI0) || defined(CONFIG_TIVA_SSI1) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* CONFIG_DEBUG_SPI enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifdef CONFIG_DEBUG_SPI +# define ssidbg lldbg +#else +# define ssidbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE) +# define ssivdbg lldbg +# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m) +#else +# define ssivdbg(x...) +# define ssi_dumpgpio(m) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lm4f_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LM4F LaunchPad. + * + ************************************************************************************/ + +void weak_function lm4f_spidev_initialize(void) +{ +} + +/**************************************************************************** + * The external functions, tiva_ssiselect and tiva_ssistatus must be provided + * by board-specific logic. The are implementations of the select and status + * methods SPI interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * All othermethods (including tiva_ssibus_initialize()) are provided by common + * logic. To use this common SPI logic on your board: + * + * 1. Provide tiva_ssiselect() and tiva_ssistatus() functions in your + * board-specific logic. This function will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 2. Add a call to tiva_ssibus_initialize() in your low level initialization + * logic + * 3. The handle returned by tiva_ssibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssi_dumpgpio("tiva_ssiselect() Entry"); + ssi_dumpgpio("tiva_ssiselect() Exit"); +} + +uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + ssidbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} + +#endif /* CONFIG_TIVA_SSI0 || CONFIG_TIVA_SSI1 */ diff --git a/configs/lm4f120-launchpad/src/lmf4120-launchpad.h b/configs/lm4f120-launchpad/src/lmf4120-launchpad.h new file mode 100644 index 0000000000000000000000000000000000000000..433358b989913722030ae97652ac649b4d76763c --- /dev/null +++ b/configs/lm4f120-launchpad/src/lmf4120-launchpad.h @@ -0,0 +1,153 @@ +/************************************************************************************ + * configs/lm4f120-launchpad/src/lmf4120-launchpad.h + * arch/arm/src/board/lmf4120-launchpad.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_LM4F120_LAUNCHPAD_LM4F120_LAUNCHPAD_H +#define __CONFIGS_LM4F120_LAUNCHPAD_LM4F120_LAUNCHPAD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include "chip.h" +#include "tiva_gpio.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* How many SSI modules does this chip support? The LM3S6965 supports 1 SSI + * module (others may support more than 2 -- in such case, the following must be + * expanded). + */ + +#if TIVA_NSSI < 1 +# undef CONFIG_TIVA_SSI0 +# undef CONFIG_TIVA_SSI1 +#elif TIVA_NSSI < 2 +# undef CONFIG_TIVA_SSI1 +#endif + +/* LM4F LaunchPad *******************************************************************/ +/* The LM4F120 LaunchPad has a single RGB LED. There is only one visible LED which + * will vary in color. But, from the standpoint of the firmware, this appears as + * three LEDs: + * + * BOARD_LED_R -- Connected to PF1 + * BOARD_LED_G -- Connected to PF3 + * BOARD_LED_B -- Connected to PF2 + * + * If CONFIG_ARCH_LEDS is defined, then automated support for the LaunchPad LEDs + * will be included in the build: + * + * OFF: + * - OFF means that the OS is still initializing. Initialization is very fast so + * if you see this at all, it probably means that the system is hanging up + * somewhere in the initialization phases. + * + * GREEN or GREEN-ish + * - This means that the OS completed initialization. + * + * Bluish: + * - Whenever and interrupt or signal handler is entered, the BLUE LED is + * illuminated and extinguished when the interrupt or signal handler exits. + * This will add a BLUE-ish tinge to the LED. + * + * Redish: + * - If a recovered assertion occurs, the RED component will be illuminated + * briefly while the assertion is handled. You will probably never see this. + * + * Flashing RED: + * - In the event of a fatal crash, the BLUE and GREEN components will be + * extinguished and the RED component will FLASH at a 2Hz rate. + * + * RED GREEN BLUE + * LED_STARTED 0 OFF OFF OFF + * LED_HEAPALLOCATE 0 OFF OFF OFF + * LED_IRQSENABLED 0 OFF OFF OFF + * LED_STACKCREATED 1 OFF ON OFF + * LED_INIRQ 2 NC NC ON (momentary) + * LED_SIGNAL 2 NC NC ON (momentary) + * LED_ASSERTION 3 ON NC NC (momentary) + * LED_PANIC 3 ON OFF OFF (flashing 2Hz) + */ + +#define GPIO_LED_R (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTF | GPIO_PIN_1) +#define GPIO_LED_G (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTF | GPIO_PIN_3) +#define GPIO_LED_B (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTF | GPIO_PIN_2) + +/* The LM4F120 LaunchPad has a two buttons: + * + * BOARD_SW1 -- Connected to PF4 + * BOARD_SW2 -- Connected to PF0 + */ + +#define GPIO_SW1 (GPIO_FUNC_INTERRUPT | GPIO_INT_BOTHEDGES | GPIO_PORTF | GPIO_PIN_1) +#define GPIO_SW2 (GPIO_FUNC_INTERRUPT | GPIO_INT_BOTHEDGES | GPIO_PORTF | GPIO_PIN_1) + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: lm4f_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LM4F LaunchPad. + * + ************************************************************************************/ + +void weak_function lm4f_spidev_initialize(void); + +/**************************************************************************** + * Name: lm4f_led_initialize + * + * Description: + * Called to initialize the on-board LEDs. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void lm4f_led_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_LM4F120_LAUNCHPAD_LM4F120_LAUNCHPAD_H */ + diff --git a/configs/lm4f120-launchpad/tools/lm4f120-launchpad.cfg b/configs/lm4f120-launchpad/tools/lm4f120-launchpad.cfg new file mode 100644 index 0000000000000000000000000000000000000000..a4fa62f0aa11dadec70cc527b879caf968e43ea7 --- /dev/null +++ b/configs/lm4f120-launchpad/tools/lm4f120-launchpad.cfg @@ -0,0 +1,71 @@ +# +# TI Stellaris Launchpad ek-lm4f120xl Evaluation Kits +# +# http://www.ti.com/tool/ek-lm4f120xl +# + +# +# NOTE: using the bundled ICDI interface is optional! +# This interface is not ftdi based as previous boards were +# + +# Interface configuration + +# +# TI Stellaris In-Circuit Debug Interface (ICDI) Board +# +# This is the propriety ICDI interface used on newer boards such as +# LM4F232 Evaluation Kit - http://www.ti.com/tool/ek-lm4f232 +# Stellaris Launchpad - http://www.ti.com/stellaris-launchpad +# http://www.ti.com/tool/ek-lm4f232 +# + +interface hla +hla_layout ti-icdi +hla_vid_pid 0x1cbe 0x00fd + +# Board configuration + +# unused but set to disable warnings +adapter_khz 1000 + +set WORKAREASIZE 0x8000 +set CHIPNAME lm4f120h5qr + +# Target configuration + +# +# lm3s icdi pseudo target +# + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lm3s +} + +# Work-area is a space in RAM used for flash programming +# By default use 16kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x4000 +} + +# +# possible value are hla_jtag +# currently swd is not supported +# +transport select hla_jtag + +# do not check id as icdi currently does not support it +hla newtap $_CHIPNAME cpu -expected-id 0 + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME hla_target -chain-position $_TARGETNAME + +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +# flash configuration ... autodetects sizes, autoprobed +flash bank $_CHIPNAME.flash stellaris 0 0 0 0 $_TARGETNAME + diff --git a/configs/lm4f120-launchpad/tools/oocd.sh b/configs/lm4f120-launchpad/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..981845225e91aa6f70787a943d5c6a22044ff2c0 --- /dev/null +++ b/configs/lm4f120-launchpad/tools/oocd.sh @@ -0,0 +1,58 @@ +#!/bin/sh +# +# See configs/lm4f120-launchpad/README.txt for information about +# this file. + +TOPDIR=$1 +USAGE="$0 [-d]" +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +# Assume that OpenOCD was installed and at /usr/local/bin. Uncomment +# the following to run directly from the build directory + +# OPENOCD_PATH="/home/OpenOCD/openocd/src" +# OPENOCD_PATH="/usr/bin" +OPENOCD_PATH="/usr/local/bin" + +# TARGET_PATH="/home/OpenOCD/openocd/tcl" +# TARGET_PATH="/usr/share/openocd/scripts" +TARGET_PATH="/usr/local/share/openocd/scripts" + +# Assume a Unix development environment. Uncomment to use a Windows +# like environment + +# OPENOCD_EXE=openocd.exe +OPENOCD_EXE=openocd + +OPENOCD_CFG="${TOPDIR}/configs/lm4f120-launchpad/tools/lm4f120-launchpad.cfg" +OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}" + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +if [ ! -d ${OPENOCD_PATH} ]; then + echo "OpenOCD path does not exist: ${OPENOCD_PATH}" + exit 1 +fi +if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then + echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f ${OPENOCD_CFG} ]; then + echo "OpenOCD config file does not exist: ${OPENOCD_CFG}" + exit 1 +fi + +echo "Starting OpenOCD" +cd ${OPENOCD_PATH} || { echo "Failed to CD to ${OPENOCD_PATH}"; exit 1; } +${OPENOCD_EXE} ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" + diff --git a/configs/lpc4330-xplorer/Kconfig b/configs/lpc4330-xplorer/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..b382072392a966187ef96b6d422f0395916dfb7c --- /dev/null +++ b/configs/lpc4330-xplorer/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_LPC4330_XPLORER +endif diff --git a/configs/lpc4330-xplorer/README.txt b/configs/lpc4330-xplorer/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..2a95f43456de34ed3c917aea7ebc7ed3e4d82009 --- /dev/null +++ b/configs/lpc4330-xplorer/README.txt @@ -0,0 +1,940 @@ +README +====== + +README for NuttX port to the LPC4330-Xplorer board from NGX Technologies +featuring the NXP LPC4330FET100 MCU + +Contents +======== + + - LPC4330-Xplorer development board + - Status + - Development Environment + - GNU Toolchain Options + - IDEs + - Code Red IDE/Tools + Booting the LPCLink + Using GDB + Troubleshooting + Command Line Flash Programming + Executing from SPIFI + USB DFU Booting + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - Serial Console + - FPU + - LPC4330-Xplorer Configuration Options + - Configurations + +LPC4330-Xplorer board +===================== + + Memory Map + ---------- + + Block Start Length + Name Address + --------------------- ---------- ------ + RAM 0x10000000 128K + RAM2 0x10080000 72K + RAMAHB 0x20000000 32K + RAMAHB2 0x20008000 16K + RAMAHB3 0x2000c000 16K + SPIFI flash 0x1e000000 4096K + + GPIO Usage: + ----------- + + GPIO PIN SIGNAL NAME + -------------------------------- ------- -------------- + gpio1[12] - LED D2 J10-20 LED1 + gpio1[11] - LED D3 J10-17 LED2 + gpio0[7] - User Button SW2 J8-25 BTN1 + + Console + ------- + + The LPC4330-Xplorer default console is the USB1 virtual COM port (VCOM). + +Status +====== + + This is the current status of the LPC43xx port: + + - The basic OS test configuration and the basic NSH configurations + are present and fully verified. This includes: SYSTICK system time, + pin and GPIO configuration, and serial console support. A SPIFI + MTD driver is also in place but requires further verification. + + - The following drivers have been copied from the LPC17xx port, but + require integration into the LPC43xx. This integration should + consist of: + + - Remove LPC17xx power, clocking, and pin configuration logic. + - Adding of clock source and frequency to the board.h file. + - Adding of LPC43 clock connection and pin configuration logic. + + Within any luck, these drivers should come up very quickly: + + - lpc43_adc.c, + - lpc43_dac.c, + - lpc43_gpdma.c, + - lpc43_i2c.c, + - lpc43_spi.c, and + - lpc43_ssp.c + + These LPC17xx drivers were not brought into the LPC43xx port because + it appears the these peripherals have been completely redesigned: + + - CAN, + - Ethernet, + - USB device, and + - USB host. + + The following LPC43xx peripherals are unsupported. Some may be + compatible with the LPC17xx, but there is no LPC17xx driver to be + ported: + + - SD/MMC, + - EMC, + - USB0, + - USB1, + - Ethernet, + - LCD, + - SCT, + - Timers 0-3 + - MCPWM, + - QEI, + - Alarm timer, + - WWDT, + - RTC, + - Event monitor, and + - CAN, + + For the missing drivers some of these can be leveraged from other + MCUs that appear to support the same peripheral IP. + + - USB0 appears to be the same as the USB OTG peripheral for the + LPC31xx. It should be possible to drop in the LPC31xx driver + with a small porting effort. + + - The Ethernet block looks to be based on the same IP as the + STM32 Ethernet and, as a result, it should be possible to leverage + the STM32 Ethernet driver with a little more effort. + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +===================== + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The Code Red GNU toolchain, + 2. The CodeSourcery GNU toolchain, + 3. The Atollic Toolchain, + 4. The devkitARM GNU toolchain, + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery or devkitARM toolchain, you simply need add one of the + following configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red "RedSuite" under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the Code Red, CodeSourcery (for Windows), Atollic and devkitARM toolchains + are Windows native toolchains. The CodeSourcery (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project . + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lpc43xx, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/common/up_vectors.S. + +Code Red IDE/Tools +^^^^^^^^^^^^^^^^^^ + + Booting the LPCLink + ------------------- + + The first step is to activate the LPCLink's boot mode. Some general + instructions to do this are provided here: + + http://support.code-red-tech.com/CodeRedWiki/BootingLPCLink + + For my RedSuite installation path, that can be done using the following + steps in a Cygwin bash shell: + + $ /cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin/Scripts/bootLPCXpresso.cmd winusb + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + The same file logic can be found the less restrictive LPCXpresso package at: + + /cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin + + (The "free" RedSuite version has a download limit of 8K; the "free" LPCXpresso + version has a download limit of 128K). + + NOTE that the following alias is defined in the setenv.sh file and + can be used to enter the boot mode with a simpler command: + + alias lpc43xx='${SCRIPT_BIN}/Scripts/bootLPCXpresso.cmd winusb' + + Be default, the setenv.sh scripts uses the LPCXpresso path shown above. + Once setenv.sh has been sources, then entering boot mode becomes simply: + + $ lpc43xx + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + Using GDB + --------- + + The underlying debugger within Red Suite/LPCXpresso is GDB. That GDB + used from the command line. The GDB configuration details for command + line use are on Code Red Wiki: + + http://support.code-red-tech.com/CodeRedWiki/UsingGDB + + and is also summarized here (see the full Wiki for additional details + and options). + + The Code Red Debug Driver implements the GDB "remote" protocol to allow + connection to debug targets. To start a debug session using GDB, use + following steps: + + arm-none-eabi-gdb executable.axf : Start GDB and name the debug image + target extended-remote | : Start debug driver, connect to target + load : Load image and download to target + + The where is crt_emu_lpc18_43_nxp for LPC18xx and LPC43xx. + Your PATH variable should be set up so that the debug driver executable + can be found. For my installation, the driver for the LPC18xx and LPC43xx + is located at: + + /cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin/crt_emu_lpc18_43_nxp.exe, OR + /cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin/crt_emu_lpc18_43_nxp.exe + + And are: + + -n set information level for the debug driver. n should be 2, 3 or 4. + 2 should be sufficient in most circumstances + + -p is the target device to connect to and you should use + =LPC4330. + + -wire= specifies the debug probe. For LPCLink on Windows 7 use + =winusb. The 128K free version only supports the LPC-Link + and RedProbe debug probes. Other JTAG interfaces are supported in + the full version. + + Thus the correct invocation for the LPC4330 under Windows7 would be: + + target extended-remote | crt_emu_lpc18_43_nxp -2 -pLPC4330 -wire=winusb + + DDD. This command can be used to start GDB under the graphics front-end + DDD: + + $ ddd --debugger arm-none-eabi-gdb nuttx & + + NOTE 1: Don't forget to put the LPCLink in boot mode as described above + before starting GDB. So a typical session might look like this: + + $ lpc43xx + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + $ arm-none-eabi-gdb nuttx + (gdb) target extended-remote | crt_emu_lpc18_43_nxp -2 -pLPC4330 -wire=winusb + (gdb) load + (gdb) r + (gdb) c + + NOTE 2: Don't forget to enable CONFIG_DEBUG_SYMBOLS=y in your NuttX + configuration file when you build NuttX. That option is necessary to build + in debugging symbols. + + NOTE 3: There are few things that NuttX has to do differently if you + are using a debugger. Make sure that you also set CONFIG_DEBUG=y. Nothing + also is needed and no debug output will be generated; but NuttX will + use CONFIG_DEBUG=y to mean that a debugger is attached and will deal + with certain resets and debug controls appropriately. + + So you should have: + + CONFIG_DEBUG=y + CONFIG_DEBUG_SYMBOLS=y + + NOTE 4: Every time that you control-C out of the command line GDB, you + leave a copy of the Code Red debugger (crt_emu_lpc18_43_nxp) running. I + have found that if you have these old copies of the debugger running, + hen strange things can happen when start yet another copy of the + debugger (I suspect that GDB may be talking with the wrong debugger). + + If you exit GDB with quit (not control-C), it seems to clean-up okay. + But I have taken to keeping a Process Explorer window open all of the + time to keep track of how many of these bad processes have been created. + + NOTE 5: There is also a certain function that is causing some problems. + The very first thing that the start-up logic does is call a function + called lpc43_softreset() which resets most of the peripherals. But it + also causes some crashes... I think because the resets are causing some + interrupts. + + I put a big delay in the soft reset logic between resetting and clearing + pending interrupts and that seems to help some but I am not confident + that that is a fix. I think that the real fix might be to just eliminated + this lpc43_softreset() function if we determine that it is not needed. + + If you step over lpc43_softreset() after loading the coding (using the 'n' + command), then everything seems work okay. + + Troubleshooting + --------------- + + This page provides some troubleshooting information that you can use to + verify that the LPCLink is working correctly: + + http://support.code-red-tech.com/CodeRedWiki/LPCLinkDiagnostics + + Command Line Flash Programming + ------------------------------ + + The LPC18xx/LPC43xx debug driver can also be used to program the LPC43xx + flash directly from the command line. The script flash.sh that may be + found in the configs/lpc4330-xplorer/scripts directory can do that with + a single command line command. + + Executing from SPIFI + -------------------- + + By default, the configurations here assume that you are executing directly + from SRAM. + + CONFIG_LPC43_BOOT_SRAM=y : Executing in SRAM + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red under Windows + + To execute from SPIFI, you would need to set: + + CONFIG_LPC43_BOOT_SPIFI=y : Executing from SPIFI + CONFIG_RAM_SIZE=(128*1024) : SRAM Bank0 size + CONFIG_RAM_START=0x10000000 : SRAM Bank0 base address + CONFIG_SPIFI_OFFSET=(512*1024) : SPIFI file system offset + + To boot the LPC4330-Xplorer from SPIFI the DIP switches should be 1-OFF, + 2-ON, 3-ON, 4-ON (LOW LOW LOW HIGH in Table 19, MSB to LSB). + + If the code in flash hard faults after reset and crt_emu_lpc18_43_nxp + can't reset the MCU, an alternative is to temporarily change switch 1 + to ON and press the reset button so it enters UART boot mode. Then + change it back to OFF and reset to boot again from flash. + + # Use -wire to specify the debug probe in use: + # (empty) Red Probe+ + # -wire=winusb LPC-Link on Windows XP + # -wire=hid LPC-Link on Windows Vista/ Windows 7 + # Add -g -4 for verbose output + + crt_emu_lpc18_43_nxp -wire=hid -pLPC4330 -load-base=0x14000000 + -flash-load-exec=nuttx.bin -flash-driver=LPC1850A_4350A_SPIFI.cfx + + USB DFU Booting + --------------- + + To be provided. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpc4330-xplorer/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +Serial Console +============== + +The LPC4330 Xplorer does not have RS-232 drivers or serial connectors on board. +USART0 and UART1 are available on J8 as follows: + + ------ ------ ----------------------- + SIGNAL J8 PIN LPC4330FET100 PIN + (TFBGA100 package) + ------ ------ ----------------------- + U0_TXD pin 9 F6 P6_4 U0_TXD=Alt 2 + U0_RXD pin 10 F9 P6_5 U0_RXD=Alt 2 + U1_TXD pin 13 H8 P1_13 U1_TXD=Alt 1 + U1_RXD pin 14 J8 P1_14 U1_RXD=Alt 1 + ------ ------ ----------------------- + + GND is available on J8 pin 1 + 5V is available on J8 pin 2 + VBAT is available on J8 pin 3 + +FPU +=== + +FPU Configuration Options +------------------------- + +There are two version of the FPU support built into the most NuttX Cortex-M4 +ports. The current LPC43xx port support only one of these options, the "Non- +Lazy Floating Point Register Save". As a consequence, CONFIG_ARMV7M_CMNVECTOR +must be defined in *all* LPC43xx configuration files. + +1. Lazy Floating Point Register Save. + + This is an untested implementation that saves and restores FPU registers + only on context switches. This means: (1) floating point registers are + not stored on each context switch and, hence, possibly better interrupt + performance. But, (2) since floating point registers are not saved, + you cannot use floating point operations within interrupt handlers. + + This logic can be enabled by simply adding the following to your .config + file: + + CONFIG_ARCH_FPU=y + +2. Non-Lazy Floating Point Register Save + + Mike Smith has contributed an extensive re-write of the ARMv7-M exception + handling logic. This includes verified support for the FPU. These changes + have not yet been incorporated into the mainline and are still considered + experimental. These FPU logic can be enabled with: + + CONFIG_ARCH_FPU=y + CONFIG_ARMV7M_CMNVECTOR=y + + You will probably also changes to the ld.script in if this option is selected. + This should work: + + -ENTRY(_stext) + +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ + +EXTERN(_vectors) /* Force the vectors to be included in the output */ + +CFLAGS +------ + +Only the recent toolchains have built-in support for the Cortex-M4 FPU. You will see +the following lines in each Make.defs file: + + ifeq ($(CONFIG_ARCH_FPU),y) + ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard + else + ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + endif + +Configuration Changes +--------------------- + +Below are all of the configuration changes that I had to make to configs/stm3240g-eval/nsh2 +in order to successfully build NuttX using the Atollic toolchain WITH FPU support: + + -CONFIG_ARCH_FPU=n : Enable FPU support + +CONFIG_ARCH_FPU=y + + -CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : Disable the CodeSourcery toolchain + +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n + + -CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=n : Enable the Atollic toolchains + +CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : + + -CONFIG_INTELHEX_BINARY=y : Suppress generation FLASH download formats + +CONFIG_INTELHEX_BINARY=n : (Only necessary with the "Lite" version) + + -CONFIG_HAVE_CXX=y : Suppress generation of C++ code + +CONFIG_HAVE_CXX=n : (Only necessary with the "Lite" version) + +See the section above on Toolchains, NOTE 2, for explanations for some of +the configuration settings. Some of the usual settings are just not supported +by the "Lite" version of the Atollic toolchain. + +LPC4330-Xplorer Configuration Options +===================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc43xx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LPC4330=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=lpc4330-xplorer (for the LPC4330-Xplorer board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_LPC4330_XPLORER=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x10000000 + + CONFIG_ARCH_FPU - The LPC43xxx supports a floating point unit (FPU) + + CONFIG_ARCH_FPU=y + + CONFIG_LPC43_BOOT_xxx - The startup code needs to know if the code is running + from internal FLASH, external FLASH, SPIFI, or SRAM in order to + initialize properly. Note that a boot device is not specified for + cases where the code is copied into SRAM; those cases are all covered + by CONFIG_LPC43_BOOT_SRAM. + + CONFIG_LPC43_BOOT_SRAM=y : Running from SRAM (0x1000:0000) + CONFIG_LPC43_BOOT_SPIFI=y : Running from QuadFLASH (0x1400:0000) + CONFIG_LPC43_BOOT_FLASHA=y : Running in internal FLASHA (0x1a00:0000) + CONFIG_LPC43_BOOT_FLASHB=y : Running in internal FLASHA (0x1b00:0000) + CONFIG_LPC43_BOOT_CS0FLASH=y : Running in external FLASH CS0 (0x1c00:0000) + CONFIG_LPC43_BOOT_CS1FLASH=y : Running in external FLASH CS1 (0x1d00:0000) + CONFIG_LPC43_BOOT_CS2FLASH=y : Running in external FLASH CS2 (0x1e00:0000) + CONFIG_LPC43_BOOT_CS3FLASH=y : Running in external FLASH CS3 (0x1f00:0000) + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_LPC43_ADC0=y + CONFIG_LPC43_ADC1=y + CONFIG_LPC43_ATIMER=y + CONFIG_LPC43_CAN1=y + CONFIG_LPC43_CAN2=y + CONFIG_LPC43_DAC=y + CONFIG_LPC43_EMC=y + CONFIG_LPC43_ETHERNET=y + CONFIG_LPC43_EVNTMNTR=y + CONFIG_LPC43_GPDMA=y + CONFIG_LPC43_I2C0=y + CONFIG_LPC43_I2C1=y + CONFIG_LPC43_I2S0=y + CONFIG_LPC43_I2S1=y + CONFIG_LPC43_LCD=y + CONFIG_LPC43_MCPWM=y + CONFIG_LPC43_QEI=y + CONFIG_LPC43_RIT=y + CONFIG_LPC43_RTC=y + CONFIG_LPC43_SCT=y + CONFIG_LPC43_SDMMC=y + CONFIG_LPC43_SPI=y + CONFIG_LPC43_SPIFI=y + CONFIG_LPC43_SSP0=y + CONFIG_LPC43_SSP1=y + CONFIG_LPC43_TMR0=y + CONFIG_LPC43_TMR1=y + CONFIG_LPC43_TMR2=y + CONFIG_LPC43_TMR3=y + CONFIG_LPC43_USART0=y + CONFIG_LPC43_UART1=y + CONFIG_LPC43_USART2=y + CONFIG_LPC43_USART3=y + CONFIG_LPC43_USB0=y + CONFIG_LPC43_USB1=y + CONFIG_LPC43_USB1_ULPI=y + CONFIG_LPC43_WWDT=y + + LPC43xx specific U[S]ART device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the USART0). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + CONFIG_USARTn_RS485MODE - Support LPC43xx USART0,2,3 RS485 mode + ioctls (TIOCSRS485 and TIOCGRS485) to enable and disable + RS-485 mode. + + LPC43xx specific CAN device driver settings. These settings all + require CONFIG_CAN: + + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN2 is defined. + CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7 + + LPC43xx specific PHY/Ethernet device driver settings. These setting + also require CONFIG_NET and CONFIG_LPC43_ETHERNET. + + CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY + CONFIG_PHY_AUTONEG - Enable auto-negotion + CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. + CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex + + CONFIG_NET_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb + CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 18 + CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18 + CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented). + CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs + CONFIG_DEBUG. + CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets. + Also needs CONFIG_DEBUG. + CONFIG_NET_HASH - Enable receipt of near-perfect match frames. + + LPC43xx USB Device Configuration + + CONFIG_LPC43_USBDEV_FRAME_INTERRUPT + Handle USB Start-Of-Frame events. + Enable reading SOF from interrupt handler vs. simply reading on demand. + Probably a bad idea... Unless there is some issue with sampling the SOF + from hardware asynchronously. + CONFIG_LPC43_USBDEV_EPFAST_INTERRUPT + Enable high priority interrupts. I have no idea why you might want to + do that + CONFIG_LPC43_USBDEV_NDMADESCRIPTORS + Number of DMA descriptors to allocate in SRAM. + CONFIG_LPC43_USBDEV_DMA + Enable lpc17xx-specific DMA support + CONFIG_LPC43_USBDEV_NOVBUS + Define if the hardware implementation does not support the VBUS signal + CONFIG_LPC43_USBDEV_NOLED + Define if the hardware implementation does not support the LED output + + LPC43xx USB Host Configuration + + CONFIG_USBHOST_OHCIRAM_SIZE + Total size of OHCI RAM (in AHB SRAM Bank 1) + CONFIG_USBHOST_NEDS + Number of endpoint descriptors + CONFIG_USBHOST_NTDS + Number of transfer descriptors + CONFIG_USBHOST_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_USBHOST_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_IOBUFSIZE + Size of one end-user I/O buffer. This can be zero if the + application can guarantee that all end-user I/O buffers + reside in AHB SRAM. + +Configurations +============== + +Each LPC4330-Xplorer configuration is maintained in a sub-directory and can be selected +as follow: + + cd tools + ./configure.sh lpc4330-xplorer/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + ---- + This configuration is the NuttShell (NSH) example at examples/nsh/. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this project assumes that you are executing directly from + SRAM. + + CONFIG_LPC43_BOOT_SRAM=y : Executing in SRAM + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red under Windows + + 3. To execute from SPIFI, you would need to set: + + CONFIG_LPC43_BOOT_SPIFI=y : Executing from SPIFI + CONFIG_RAM_SIZE=(128*1024) : SRAM Bank0 size + CONFIG_RAM_START=0x10000000 : SRAM Bank0 base address + CONFIG_SPIFI_OFFSET=(512*1024) : SPIFI file system offset + + CONFIG_MM_REGIONS should also be increased if you want to other SRAM banks + to the memory pool. + + 4. This configuration an also be used create a block device on the SPIFI + FLASH. CONFIG_LPC43_SPIFI=y must also be defined to enable SPIFI setup + support: + + SPIFI device geometry: + + CONFIG_SPIFI_OFFSET - Offset the beginning of the block driver this many + bytes into the device address space. This offset must be an exact + multiple of the erase block size (CONFIG_SPIFI_BLKSIZE). Default 0. + CONFIG_SPIFI_BLKSIZE - The size of one device erase block. If not defined + then the driver will try to determine the correct erase block size by + examining that data returned from spifi_initialize (which sometimes + seems bad). + + Other SPIFI options + + CONFIG_SPIFI_SECTOR512 - If defined, then the driver will report a more + FAT friendly 512 byte sector size and will manage the read-modify-write + operations on the larger erase block. + CONFIG_SPIFI_READONLY - Define to support only read-only operations. + CONFIG_SPIFI_LIBRARY - Don't use the LPC43xx ROM routines but, instead, + use an external library implementation of the SPIFI interface. + CONFIG_SPIFI_VERIFY - Verify all spifi_program() operations by reading + from the SPI address space after each write. + CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers. You + probably do not want to enable this unless you want to dig through a + *lot* of debug output! Also required CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, + and CONFIG_DEBUG_FS, + + 5. In my experience, there were some missing function pointers in the LPC43xx + SPIFI ROM routines and the SPIFI configuration could only be built with + CONFIG_SPIFI_LIBRARY=y. The SPIFI library is proprietary and cannot be + provided within NuttX open source repository; SPIFI library binaries can + be found on the lpcware.com website. In this build sceneario, you must + also provide the patch to the external SPIFI library be defining the make + variable EXTRA_LIBS in the top-level Make.defs file. Good luck! diff --git a/configs/lpc4330-xplorer/include/board.h b/configs/lpc4330-xplorer/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..8e4e531b2561f10413513a9a3e5f8cf8cba11aed --- /dev/null +++ b/configs/lpc4330-xplorer/include/board.h @@ -0,0 +1,360 @@ +/**************************************************************************** + * configs/lpc4330-xplorer/include/board.h + * + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking ****************************************************************/ +/* NOTE: The following definitions require lpc43_cgu.h. It is not included + * here because the including C file may not have that file in its include + * path. + * + * The Xplorer board has four crystals on board: + * + * Y1 - RTC 32.768 MHz oscillator input, + * Y2 - 24.576 MHz input to the UDA 1380 audio codec, + * Y3 - 12.000 MHz LPC43xx crystal oscillator input + * Y4 - 50 MHz input for Ethernet + */ + +#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency (Y3) */ +#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency (Y1) */ +#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */ + +/* Integer and direct modes are supported: + * + * In integer mode (Fclkout < 156000000): + * Fclkin = BOARD_XTAL_FREQUENCY + * Fclkout = Msel * FClkin / Nsel + * Fcco = 2 * Psel * Fclkout + * In direct mode (Fclkout > 156000000): + * Fclkin = BOARD_XTAL_FREQUENCY + * Fclkout = Msel * FClkin / Nsel + * Fcco = Fclkout + */ + +#ifdef CONFIG_LPC43_72MHz + +/* NOTE: At 72MHz, the calibrated value of CONFIG_BOARD_LOOPSPERMSEC was + * determined to be: + * + * CONFIG_BOARD_LOOPSPERMSEC=7191 + * + * executing from SRAM. + */ + +/* Final clocking (Integer mode with no ramp-up) + * + * Fclkout = 6 * 12MHz / 1 = 72MHz + * Fcco = 2 * 2 * 72MHz = 216MHz + */ + +# define BOARD_PLL_MSEL (6) /* Msel = 6 */ +# define BOARD_PLL_NSEL (1) /* Nsel = 1 */ +# define BOARD_PLL_PSEL (2) /* Psel = 2 */ + +# define BOARD_FCLKOUT_FREQUENCY (72000000) /* 6 * 12,000,000 / 1 */ +# define BOARD_FCCO_FREQUENCY (244000000) /* 2 * 2 * Fclkout */ + +#else + +/* NOTE: At 72MHz, the calibrated value of CONFIG_BOARD_LOOPSPERMSEC was + * determined to be: + * + * CONFIG_BOARD_LOOPSPERMSEC=18535 + * + * executing from SRAM. + */ + +/* Intermediate ramp-up clocking (Integer mode). If BOARD_PLL_RAMP_MSEL + * is not defined, there will be no ramp-up. + * + * Fclkout = 9 * 12MHz / 1 = 108MHz + * Fcco = 2 * 1 * 108MHz = 216MHz + */ + +# define BOARD_PLL_RAMP_MSEL (9) /* Msel = 9 */ +# define BOARD_PLL_RAMP_NSEL (1) /* Nsel = 1 */ +# define BOARD_PLL_RAMP_PSEL (1) /* Psel = 1 */ + +# define BOARD_RAMP_FCLKOUT (108000000) /* 9 * 12,000,000 / 1 */ +# define BOARD_RAMP_FCCO (216000000) /* 2 * 1 * Fclkout */ + +/* Final clocking (Direct mode). + * + * Fclkout = 17 * 12MHz / 1 = 204MHz + * Fcco = Fclockout = 204MHz + */ + +# define BOARD_PLL_MSEL (17) /* Msel = 17 */ +# define BOARD_PLL_NSEL (1) /* Nsel = 1 */ + +# define BOARD_FCLKOUT_FREQUENCY (204000000) /* 17 * 12,000,000 / 1 */ +# define BOARD_FCCO_FREQUENCY (204000000) /* Fclockout */ + +#endif + +/* This is the clock setup we configure for: + * + * SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1 + * CCLCK = 480MHz / 6 = 80MHz -> CCLK divider = 6 + */ + +#define LPC43_CCLK BOARD_FCLKOUT_FREQUENCY + +/* APB Clocking */ + +#if defined(CONFIG_LPC43_BUS) || defined(CONFIG_LPC43_MCPWM) || \ + defined(CONFIG_LPC43_I2C0) || defined(CONFIG_LPC43_I2S0) || \ + defined(CONFIG_LPC43_I2S1) || defined(CONFIG_LPC43_CAN1) +# define BOARD_ABP1_CLKSRC BASE_APB_CLKSEL_XTAL +# define BOARD_ABP1_FREQUENCY BOARD_XTAL_FREQUENCY +#endif + + +#if defined(CONFIG_LPC43_BUS) || defined(CONFIG_LPC43_I2C1) || \ + defined(CONFIG_LPC43_DAC) || defined(CONFIG_LPC43_ADC0) || \ + defined(CONFIG_LPC43_ADC1) || defined(CONFIG_LPC43_CAN0) +# define BOARD_ABP3_CLKSRC BASE_APB_CLKSEL_XTAL +# define BOARD_ABP3_FREQUENCY BOARD_XTAL_FREQUENCY +#endif + +/* SSP Clocking */ + +#define BOARD_IDIVA_DIVIDER (2) +#define BOARD_IDIVA_CLKSRC IDIVA_CLKSEL_PLL1 +#define BOARD_IDIVA_FREQUENCY (BOARD_FCLKOUT_FREQUENCY/BOARD_IDIVA_DIVIDER) + +#define BOARD_SSP0_CLKSRC BASE_SSP0_CLKSEL_IDIVA +#define BOARD_SSP0_BASEFREQ BOARD_IDIVA_FREQUENCY + +#define BOARD_SSP1_CLKSRC BASE_SSP1_CLKSEL_IDIVA +#define BOARD_SSP1_BASEFREQ BOARD_IDIVA_FREQUENCY + +/* USB0 ********************************************************************/ +/* Settings needed in lpc43_cpu.c */ + +#define BOARD_USB0_CLKSRC PLL0USB_CLKSEL_XTAL +#define BOARD_USB0_MDIV 0x06167ffa /* Table 149 datsheet, valid for 12Mhz Fclkin */ +#define BOARD_USB0_NP_DIV 0x00302062 /* Table 149 datsheet, valid for 12Mhz Fclkin */ + +/* SPIFI clocking **********************************************************/ +/* The SPIFI will receive clocking from a divider per the settings provided + * in this file. The NuttX code will configure PLL1 as the input clock + * for the selected divider + */ + +#undef BOARD_SPIFI_PLL1 /* No division */ +#undef BOARD_SPIFI_DIVA /* Supports division by 1-4 */ +#undef BOARD_SPIFI_DIVB /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVC /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVD /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVE /* Supports division by 1-256 */ + +#if BOARD_FCLKOUT_FREQUENCY < 20000000 +# define BOARD_SPIFI_PLL1 1 /* Use PLL1 directly */ +#else +# define BOARD_SPIFI_DIVB 1 /* Use IDIVB */ +#endif + + +/* We need to configure the divider so that its output is as close to the + * desired SCLK value. The peak data transfer rate will be about half of + * this frequency in bytes per second. + */ + +#if BOARD_FCLKOUT_FREQUENCY < 20000000 +# define BOARD_SPIFI_FREQUENCY BOARD_FCLKOUT_FREQUENCY /* 72Mhz? */ +#else +# define BOARD_SPIFI_DIVIDER (14) /* 204MHz / 14 = 14.57MHz */ +# define BOARD_SPIFI_FREQUENCY (102000000) /* 204MHz / 14 = 14.57MHz */ +#endif + +/* UART clocking ***********************************************************/ +/* Configure all U[S]ARTs to use the XTAL input frequency */ + +#define BOARD_USART0_CLKSRC BASE_USART0_CLKSEL_XTAL +#define BOARD_USART0_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_UART1_CLKSRC BASE_UART1_CLKSEL_XTAL +#define BOARD_UART1_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_USART2_CLKSRC BASE_USART2_CLKSEL_XTAL +#define BOARD_USART2_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_USART3_CLKSRC BASE_USART3_CLKSEL_XTAL +#define BOARD_USART3_BASEFREQ BOARD_XTAL_FREQUENCY + +/* LED definitions *********************************************************/ +/* The LPC4330-Xplorer has 2 user-controllable LEDs labeled D2 an D3 in the + * schematic and on but referred to has LED1 and LED2 here, respectively. + * + * LED1 D2 GPIO1[12] + * LED2 D3 GPIO1[11] + * + * LEDs are pulled high to a low output illuminates the LED. + * + * LED index values for use with board_userled() + */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_NLEDS 2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) + +/* If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows + * for NuttX debug functionality (where NC means "No Change"). If + * CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under + * control of the application. The following interfaces are then available + * for application control of the LEDs: + * + * void board_userled_initialize(void); + * void board_userled(int led, bool ledon); + * void board_userled_all(uint8_t ledset); + */ + /* ON OFF */ + /* LED1 LED2 LED1 LED2 */ +#define LED_STARTED 0 /* OFF OFF - - */ +#define LED_HEAPALLOCATE 1 /* ON OFF - - */ +#define LED_IRQSENABLED 1 /* ON OFF - - */ +#define LED_STACKCREATED 1 /* ON OFF - - */ +#define LED_INIRQ 2 /* NC ON NC OFF */ +#define LED_SIGNAL 2 /* NC ON NC OFF */ +#define LED_ASSERTION 2 /* NC ON NC OFF */ +#define LED_PANIC 2 /* NC ON NC OFF */ + +/* UART Pins ****************************************************************/ +/* The LPC4330 Xplorer does not have RS-232 drivers or serial connectors on + * board. USART0 and UART1 are available on J8 as follows: + * + * ------ ------ ----------------------- + * SIGNAL J8 PIN LPC4330FET100 PIN + * (TFBGA100 package) + * ------ ------ ----------------------- + * U0_TXD pin 9 F6 P6_4 U0_TXD=Alt 2 + * U0_RXD pin 10 F9 P6_5 U0_RXD=Alt 2 + * U1_TXD pin 13 H8 P1_13 U1_TXD=Alt 1 + * U1_RXD pin 14 J8 P1_14 U1_RXD=Alt 1 + * ------ ------ ----------------------- + * + * The following definitions must be provided so that the LPC43 serial + * driver can set up the U[S]ART for the serial console properly (see the + * file arch/arc/src/lpc43xx/lpc4310203050_pinconf.h for more info). + */ + +#define PINCONF_U0_TXD PINCONF_U0_TXD_3 +#define PINCONF_U0_RXD PINCONF_U0_RXD_3 +#define PINCONF_U0_DIR PINCONF_U0_DIR_3 + +#define PINCONF_U1_TXD PINCONF_U1_TXD_1 +#define PINCONF_U1_RXD PINCONF_U1_RXD_1 + +#define PINCONF_U2_TXD PINCONF_U2_TXD_1 +#define PINCONF_U2_RXD PINCONF_U2_RXD_1 +#define PINCONF_U2_DIR PINCONF_U2_DIR_1 + +#define PINCONF_U3_TXD PINCONF_U3_TXD_2 +#define PINCONF_U3_RXD PINCONF_U3_RXD_2 +#define PINCONF_U3_DIR PINCONF_U3_DIR_2 + +/* Ethernet */ + +#define PINCONF_ENET_RX_DV PINCONF_ENET_RX_DV_2 +#define PINCONF_ENET_RESET PINCONF_GPIO0p4 +#define GPIO_ENET_RESET (GPIO_MODE_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN4) +#define PINCONF_ENET_MDC PINCONF_ENET_MDC_3 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc43_boardinitialize + * + * Description: + * All LPC43xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ****************************************************************************/ + +void lpc43_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/lpc4330-xplorer/nsh/Make.defs b/configs/lpc4330-xplorer/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e5d4fc2f4f80778c73b2069162f135c850280dcc --- /dev/null +++ b/configs/lpc4330-xplorer/nsh/Make.defs @@ -0,0 +1,131 @@ +############################################################################ +# configs/lpc4330-xplorer/nsh/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +# Setup for the kind of memory that we are executing from + +ifeq ($(CONFIG_LPC43_BOOT_SRAM),y) + LDSCRIPT = ramconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_SPIFI),y) + LDSCRIPT = spificonfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_FLASHA),y) + LDSCRIPT = flashaconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_FLASHB),y) + LDSCRIPT = flashaconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_CS0FLASH),y) + LDSCRIPT = cs0flash.ld +endif + +# Setup for Windows vs Linux/Cygwin/OSX environments + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lpc4330-xplorer/nsh/defconfig b/configs/lpc4330-xplorer/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..5250c0f226cf77f5a4eade09e4906b179d9f57cb --- /dev/null +++ b/configs/lpc4330-xplorer/nsh/defconfig @@ -0,0 +1,879 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +CONFIG_ARCH_STDARG_H=y +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +CONFIG_ARCH_CHIP_LPC43XX=y +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc43xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC43xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC4310FBD144 is not set +# CONFIG_ARCH_CHIP_LPC4310FET100 is not set +# CONFIG_ARCH_CHIP_LPC4320FBD144 is not set +# CONFIG_ARCH_CHIP_LPC4320FET100 is not set +# CONFIG_ARCH_CHIP_LPC4330FBD144 is not set +CONFIG_ARCH_CHIP_LPC4330FET100=y +# CONFIG_ARCH_CHIP_LPC4330FET180 is not set +# CONFIG_ARCH_CHIP_LPC4330FET256 is not set +# CONFIG_ARCH_CHIP_LPC4337JBD144 is not set +# CONFIG_ARCH_CHIP_LPC4350FBD208 is not set +# CONFIG_ARCH_CHIP_LPC4350FET180 is not set +# CONFIG_ARCH_CHIP_LPC4350FET256 is not set +# CONFIG_ARCH_CHIP_LPC4353FBD208 is not set +# CONFIG_ARCH_CHIP_LPC4353FET180 is not set +# CONFIG_ARCH_CHIP_LPC4353FET256 is not set +# CONFIG_ARCH_CHIP_LPC4357FET180 is not set +# CONFIG_ARCH_CHIP_LPC4357FBD208 is not set +# CONFIG_ARCH_CHIP_LPC4357FET256 is not set +# CONFIG_ARCH_CHIP_LPC4370FET100 is not set +CONFIG_ARCH_FAMILY_LPC4330=y +CONFIG_LPC43_BOOT_SRAM=y +# CONFIG_LPC43_BOOT_SPIFI is not set +# CONFIG_LPC43_BOOT_FLASHA is not set +# CONFIG_LPC43_BOOT_FLASHB is not set +# CONFIG_LPC43_BOOT_CS0FLASH is not set +# CONFIG_LPC43_BOOT_CS1FLASH is not set +# CONFIG_LPC43_BOOT_CS2FLASH is not set +# CONFIG_LPC43_BOOT_CS3FLASH is not set + +# +# LPC43xx Peripheral Support +# +# CONFIG_LPC43_ADC0 is not set +# CONFIG_LPC43_ADC1 is not set +# CONFIG_LPC43_ATIMER is not set +# CONFIG_LPC43_CAN1 is not set +# CONFIG_LPC43_CAN2 is not set +# CONFIG_LPC43_DAC is not set +# CONFIG_LPC43_EMC is not set +# CONFIG_LPC43_ETHERNET is not set +# CONFIG_LPC43_EVNTMNTR is not set +# CONFIG_LPC43_GPDMA is not set +# CONFIG_LPC43_I2C0 is not set +# CONFIG_LPC43_I2C1 is not set +# CONFIG_LPC43_I2S0 is not set +# CONFIG_LPC43_I2S1 is not set +# CONFIG_LPC43_LCD is not set +# CONFIG_LPC43_MCPWM is not set +# CONFIG_LPC43_QEI is not set +# CONFIG_LPC43_RIT is not set +# CONFIG_LPC43_RTC is not set +# CONFIG_LPC43_SCT is not set +# CONFIG_LPC43_SDMMC is not set +# CONFIG_LPC43_SPI is not set +# CONFIG_LPC43_SPIFI is not set +# CONFIG_LPC43_SSP0 is not set +# CONFIG_LPC43_SSP1 is not set +# CONFIG_LPC43_TMR0 is not set +# CONFIG_LPC43_TMR1 is not set +# CONFIG_LPC43_TMR2 is not set +# CONFIG_LPC43_TMR3 is not set +CONFIG_LPC43_USART0=y +# CONFIG_LPC43_UART1 is not set +# CONFIG_LPC43_USART2 is not set +# CONFIG_LPC43_USART3 is not set +# CONFIG_LPC43_USBOTG is not set +# CONFIG_LPC43_USB0 is not set +# CONFIG_LPC43_USB1 is not set +# CONFIG_LPC43_WWDT is not set + +# +# RS-485 Configuration +# +# CONFIG_USART0_RS485MODE is not set +# CONFIG_USART0_RS485_DTRDIR is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=18535 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10080000 +CONFIG_RAM_SIZE=73728 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC4330_XPLORER=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lpc4330-xplorer" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=11 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +CONFIG_ARCH_HAVE_USART0=y +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART0_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART0 Configuration +# +CONFIG_USART0_RXBUFSIZE=256 +CONFIG_USART0_TXBUFSIZE=256 +CONFIG_USART0_BAUD=115200 +CONFIG_USART0_BITS=8 +CONFIG_USART0_PARITY=0 +CONFIG_USART0_2STOP=0 +# CONFIG_USART0_IFLOWCONTROL is not set +# CONFIG_USART0_OFLOWCONTROL is not set +# CONFIG_USART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lpc4330-xplorer/nsh/setenv.sh b/configs/lpc4330-xplorer/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..fd946191dd42d173dc0ac72e1844651bd113a1d3 --- /dev/null +++ b/configs/lpc4330-xplorer/nsh/setenv.sh @@ -0,0 +1,91 @@ +#!/bin/bash +# configs/lpc4330-xplorer/nsh/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Code Red +# toolchain under windows. You will have to edit this if you install the +# Code Red toolchain in any other location or if you install a different +# version +export TOOLCHAIN_BIN="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/Tools/bin" +#export SCRIPT_BIN="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin" +export SCRIPT_BIN="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export SCRIPT_BIN= + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" +#export SCRIPT_BIN= + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +#export SCRIPT_BIN= + +# And add the selected toolchain path[s] to the PATH variable + +export PATH="/sbin:/usr/sbin:${PATH_ORIG}" + +if [ ! -z ${SCRIPT_BIN} ]; then + export PATH="${SCRIPT_BIN}:${PATH}" +fi + +export PATH="${TOOLCHAIN_BIN}:${PATH}" +echo "PATH : ${PATH}" + +# Set an alias that can be used to put the LPC43xx in boot mode + +alias lpc43xx='${SCRIPT_BIN}/Scripts/bootLPCXpresso.cmd winusb' diff --git a/configs/lpc4330-xplorer/scripts/flash.sh b/configs/lpc4330-xplorer/scripts/flash.sh new file mode 100644 index 0000000000000000000000000000000000000000..a239e9b5dcf92807ed87cdd2b9b213bb520b7b68 --- /dev/null +++ b/configs/lpc4330-xplorer/scripts/flash.sh @@ -0,0 +1,153 @@ +#!/bin/bash +#################################################################################### +# flash.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +#################################################################################### +set -x + +USAGE="$0 " + +# LPCXpresso 3.6 installed at /cygdrive/c/nxp/lpcxpresso_3.6" +BINDIR="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin" + +# RedSuite with LPC4330 support installed at /cygdrive/c/code_red/RedSuite_4.2.3_379 " +#BINDIR="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin" + +TARGET=LPC4330 + +echo "############################################################################" +echo "# Assumptions:" +echo "#" +echo "# - Windows 7" +echo "# - Binaries installed at ${BINDIR}" +echo "# - AXF image built with Code Red" +echo "# - ${TARGET}" +echo "#" +echo "# You will need to edit this is any of the above are false" +echo "#" +echo "############################################################################" +echo "" + +# This is the default install location for binaries on Windows (note that this +# path could change with the Code Red version number) + +if [ ! -d "${BINDIR}" ]; then + echo "Directory ${BINDIR} does not exist" + exit 1 +fi + +# This is the relative path to the booLPCXpresso utility. + +BOOTLPC="Scripts/bootLPCXpresso.cmd" +if [ ! -x "${BINDIR}/${BOOTLPC}" ]; then + echo "No executable at ${BINDIR}/${BOOTLPC}" + exit 1 +fi + +# bootLPCXpresso arguments + +BOOTLPC_ARG=winusb # Win7 + +# Use the LPC18xx/LPC43xx flash utility + +FLASHUTIL="crt_emu_lpc18_43_nxp" # for LPC18xx/LPC43xx parts + +if [ ! -x "${BINDIR}/${FLASHUTIL}" ]; then + echo "No executable file at ${BINDIR}/${FLASHUTIL}" + exit 1 +fi + +# FLUSHUTIL arguements + +WIRE="-wire=winusb" # for LPC-Link on Windows Vista/Windows 7) + +# The nuttx directory must be provided as an argument + +NUTTX=$1 +if [ -z "${NUTTX}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +if [ ! -d "${NUTTX}" ]; then + echo "Directory ${NUTTX} does not exist" + echo $USAGE + exit 1 +fi + +# The binary to download: + +if [ ! -f "${NUTTX}/nuttx.axf" ]; then + if [ -f "${NUTTX}/nuttx" ]; then + echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf" + mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf + fi +else + if [ -f "${NUTTX}/nuttx" ]; then + echo "Both ${NUTTX}/nuttx ${NUTTX}/nuttx.axf exist.." + echo " Deleting ${NUTTX}/nuttx.axf" + rm -f ${NUTTX}/nuttx.axf + echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf" + mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf + fi +fi +NUTTXPATH=`cygpath -w "${NUTTX}/nuttx.axf"` + +# First of all boot the LPC-Link using the script: ${BINDIR}/${BOOTLPC} + +cd ${BINDIR} || \ + { echo "Failed to CD to ${BINDIR}"; exit 1; } +./${BOOTLPC} ${BOOTLPC_ARG} || \ + { echo "'${BOOTLPC} ${BOOTLPC_ARG}' Failed"; } + +echo "" +echo "Wait a bit" +echo "5..." +sleep 1 +echo "4..." +sleep 1 +echo "3..." +sleep 1 +echo "2..." +sleep 1 +echo "1..." +sleep 1 +echo "0..." +echo "" + +# Then program the FLASH + +cd ${BINDIR} || \ + { echo "Failed to CD to ${BINDIR}"; exit 1; } +./${FLASHUTIL} ${WIRE} -p${TARGET} -flash-load-exec="${NUTTXPATH}" diff --git a/configs/lpc4330-xplorer/scripts/ramconfig.ld b/configs/lpc4330-xplorer/scripts/ramconfig.ld new file mode 100644 index 0000000000000000000000000000000000000000..d956120203408632071c1f2582e21bd9aed32183 --- /dev/null +++ b/configs/lpc4330-xplorer/scripts/ramconfig.ld @@ -0,0 +1,150 @@ +/**************************************************************************** + * configs/lpc4330-xplorer/scripts/ramconfig.ld + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* + * Power-Up Reset Overview + * ----------------------- + * + * The ARM core starts executing code on reset with the program counter set + * to 0x0000 0000. The LPC43xx contains a shadow pointer register that + * allows areas of memory to be mapped to address 0x0000 0000. The default, + * reset value of the shadow pointer is 0x1040 0000 so that on reset code in + * the boot ROM is always executed first. + * + * The boot starts after reset is released. The IRC is selected as CPU clock + * and the Cortex-M4 starts the boot loader. By default the JTAG access to the + * chip is disabled at reset. The boot ROM determines the boot mode based on + * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part + * boots from internal flash by default. Otherwse, the boot ROM copies the + * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow + * pointer to 0x1000 0000, and jumps to that location. + * + * However, using JTAG the executable image can be also loaded directly into + * and executed from SRAM. + */ + +/* The LPC4330 on the LPC4330-Xplorer has the following memory resources: + * + * 1. 4096Kb of SPIFI FLASH beginning at address 0x1400:0000 + * 2. 264KB of total SRAM: + * a. 128KB of SRAM in the CPU block beginning at address 0x1000:0000 + * b. 72KB beginning at address 0x1008:0000 and + * c. 64KB of AHB SRAM in three banks beginning at addresses 0x2000:0000, + * 0x2000:8000 and 0x2000:C000. + * 3. No internal FLASH + * + * Here we assume that: + * + * 1. We will be running out of SRAM at 0x1000:0000, and + * 2. All .data and .bss will all fit into the 72KB SRAM block. + * + * NOTE: That initialized data is kept in the program memory SRAM and copied + * to .data SRAM. This is wasteful and unnecessary but provides a good test + * for future, FLASH-resident code. + */ + +MEMORY +{ + progmem (rx) : ORIGIN = 0x10000000, LENGTH = 128K + datamem (rwx) : ORIGIN = 0x10080000, LENGTH = 72K +} + +OUTPUT_ARCH(arm) +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ +EXTERN(_vectors) /* Force the vectors to be included in the output */ +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progmem + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progmem + + .ARM.extab : { + *(.ARM.extab*) + } > progmem + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progmem + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datamem AT > progmem + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datamem + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lpc4330-xplorer/scripts/spificonfig.ld b/configs/lpc4330-xplorer/scripts/spificonfig.ld new file mode 100644 index 0000000000000000000000000000000000000000..8ed668beecc10a8fb542152e3a54ab589d613e9a --- /dev/null +++ b/configs/lpc4330-xplorer/scripts/spificonfig.ld @@ -0,0 +1,146 @@ +/**************************************************************************** + * configs/lpc4330-xplorer/scripts/spificonfig.ld + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* + * Power-Up Reset Overview + * ----------------------- + * + * The ARM core starts executing code on reset with the program counter set + * to 0x0000 0000. The LPC43xx contains a shadow pointer register that + * allows areas of memory to be mapped to address 0x0000 0000. The default, + * reset value of the shadow pointer is 0x1040 0000 so that on reset code in + * the boot ROM is always executed first. + * + * The boot starts after reset is released. The IRC is selected as CPU clock + * and the Cortex-M4 starts the boot loader. By default the JTAG access to the + * chip is disabled at reset. The boot ROM determines the boot mode based on + * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part + * boots from internal flash by default. Otherwse, the boot ROM copies the + * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow + * pointer to 0x1000 0000, and jumps to that location. + * + * Of course, using JTAG the executable image can be also loaded directly + * into and executed from SRAM. + */ + +/* The LPC4330 on the LPC4330-Xplorer has the following memory resources: + * + * 1. 4096Kb of SPIFI FLASH beginning at address 0x1400:0000 + * 2. 264KB of total SRAM: + * a. 128KB of SRAM in the CPU block beginning at address 0x1000:0000 + * b. 72KB beginning at address 0x1008:0000 and + * c. 64KB of AHB SRAM in three banks beginning at addresses 0x2000:0000, + * 0x2000:8000 and 0x2000:C000. + * 3. No internal FLASH + * + * Here we assume that: + * + * 1. We will be running out of SPIFI flash at 0x1400:0000, and + * 2. All .data and .bss will all fit into the 128KB CPU SRAM block. + */ + +MEMORY +{ + progmem (rx) : ORIGIN = 0x14000000, LENGTH = 1024K + datamem (rwx) : ORIGIN = 0x10000000, LENGTH = 128K +} + +OUTPUT_ARCH(arm) +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ +EXTERN(_vectors) /* Force the vectors to be included in the output */ +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progmem + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progmem + + .ARM.extab : { + *(.ARM.extab*) + } > progmem + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progmem + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datamem AT > progmem + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datamem + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lpc4330-xplorer/src/.gitignore b/configs/lpc4330-xplorer/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/lpc4330-xplorer/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/lpc4330-xplorer/src/Makefile b/configs/lpc4330-xplorer/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..71fb893f70af7dd7ad7412227b7d6e87cce08006 --- /dev/null +++ b/configs/lpc4330-xplorer/src/Makefile @@ -0,0 +1,81 @@ +############################################################################ +# configs/lpc4330-xplorer/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc43_boot.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc43_appinit.c +endif + +ifeq ($(CONFIG_ARCH_FPU),y) +CSRCS += lpc43_ostest.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += lpc43_autoleds.c +else +CSRCS += lpc43_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += lpc43_buttons.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += lpc43_usbmsc.c +endif + +ifeq ($(CONFIG_SPIFI_LIBRARY),y) +CFLAGS += -DEUROBIRD +SPIFI_LIB = spifi_lib +CSRCS += $(SPIFI_LIB)/spifi_rom_api.c +#CSRCS += $(SPIFI_LIB)/amic.c +#CSRCS += $(SPIFI_LIB)/atmel.c +#CSRCS += $(SPIFI_LIB)/chi.c +#CSRCS += $(SPIFI_LIB)/eon.c +#CSRCS += $(SPIFI_LIB)/esmt.c +#CSRCS += $(SPIFI_LIB)/esmt.c +#CSRCS += $(SPIFI_LIB)/giga.c +#CSRCS += $(SPIFI_LIB)/macronix.c +#CSRCS += $(SPIFI_LIB)/numonyx.c +CSRCS += $(SPIFI_LIB)/spansion.c +#CSRCS += $(SPIFI_LIB)/sst.c +CSRCS += $(SPIFI_LIB)/winbond.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/lpc4330-xplorer/src/lpc4330-xplorer.h b/configs/lpc4330-xplorer/src/lpc4330-xplorer.h new file mode 100644 index 0000000000000000000000000000000000000000..018616ae38df179bc6a4169346ef6fa11d886d29 --- /dev/null +++ b/configs/lpc4330-xplorer/src/lpc4330-xplorer.h @@ -0,0 +1,126 @@ +/**************************************************************************** + * configs/lpc4330-xplorer/src/lpc4330-xplorer.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef _CONFIGS_LPC4330_XPLORER_SRC_XPLORER_H +#define _CONFIGS_LPC4330_XPLORER_SRC_XPLORER_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "lpc43_pinconfig.h" +#include "lpc43_gpio.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * LEDs GPIO PIN SIGNAL NAME + * -------------------------------- ------- -------------- + * gpio1[12] - LED D2 J10-20 LED1 + * gpio1[11] - LED D3 J10-17 LED2 + * + ****************************************************************************/ + +/* Definitions to configure LED pins as GPIOs: + * + * - Floating + * - Normal drive + * - No buffering, glitch filtering, slew=slow + */ + +#define PINCONFIG_LED1 PINCONF_GPIO4p0 +#define PINCONFIG_LED2 PINCONF_GPIO1p1 +#define GPIO_LED1 (GPIO_MODE_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN0) +#define GPIO_LED2 (GPIO_MODE_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN8) + +/**************************************************************************** + * Buttons GPIO + * ---------------------------- + * gpio2[7] - User Button USR1 + ****************************************************************************/ + +#define LPC4330_XPLORER_BUT1 (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT0 | GPIO_PIN7) + +/* Button IRQ numbers */ + +#define LPC4330_XPLORER_BUT1_IRQ LPC43_IRQ_P0p23 + +#define GPIO_SSP0_SCK GPIO_SSP0_SCK_1 +#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_1 +#define GPIO_SSP0_MISO GPIO_SSP0_MISO_1 +#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_1 + +/* We need to redefine USB_PWRD as GPIO to get USB Host working + * Also remember to add 2 resistors of 15K to D+ and D- pins. + */ + +#ifdef CONFIG_USBHOST +# ifdef GPIO_USB_PWRD +# undef GPIO_USB_PWRD +# define GPIO_USB_PWRD (GPIO_INPUT | GPIO_PORT1 | GPIO_PIN22) +# endif +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc43_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Lincoln 80 board. + * + ****************************************************************************/ + +void weak_function lpc43_sspdev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_LPC4330_XPLORER_SRC_XPLORER_H */ diff --git a/configs/lpc4330-xplorer/src/lpc43_appinit.c b/configs/lpc4330-xplorer/src/lpc43_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..6377c62de57b5cfbc229c9faa010101fd4133190 --- /dev/null +++ b/configs/lpc4330-xplorer/src/lpc43_appinit.c @@ -0,0 +1,149 @@ +/**************************************************************************** + * config/lpc4330-xplorer/src/lpc43_appinit.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" + +#ifdef CONFIG_LPC43_SPIFI +# include +# include "lpc43_spifi.h" + +# ifdef CONFIG_SPFI_NXFFS +# include +# include +# endif +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_SPIFI_DEVNO +# define CONFIG_SPIFI_DEVNO 0 +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nsh_spifi_initialize + * + * Description: + * Make the SPIFI (or part of it) into a block driver that can hold a + * file system. + * + ****************************************************************************/ + +#ifdef CONFIG_LPC43_SPIFI +static int nsh_spifi_initialize(void) +{ + FAR struct mtd_dev_s *mtd; + int ret; + + /* Initialize the SPIFI interface and create the MTD driver instance */ + + mtd = lpc43_spifi_initialize(); + if (!mtd) + { + fdbg("ERROR: lpc43_spifi_initialize failed\n"); + return -ENODEV; + } + +#ifndef CONFIG_SPFI_NXFFS + /* And finally, use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(CONFIG_SPIFI_DEVNO, mtd); + if (ret < 0) + { + fdbg("ERROR: Initializing the FTL layer: %d\n", ret); + return ret; + } +#else + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", ret); + return ret; + } + + /* Mount the file system at /mnt/spifi */ + + ret = mount(NULL, "/mnt/spifi", "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif + + return OK; +} +#else +# define nsh_spifi_initialize() (OK) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + /* Initialize the SPIFI block device */ + + return nsh_spifi_initialize(); +} diff --git a/configs/lpc4330-xplorer/src/lpc43_autoleds.c b/configs/lpc4330-xplorer/src/lpc43_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..afe5ecd23fe20df04de01b55dad5b5efc601077c --- /dev/null +++ b/configs/lpc4330-xplorer/src/lpc43_autoleds.c @@ -0,0 +1,203 @@ +/**************************************************************************** + * configs/lpc4330-xplorer/src/lpc43_autoleds.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc4330-xplorer.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED definitions **********************************************************/ +/* The LPC4330-Xplorer has 2 user-controllable LEDs labeled D2 an D3 in the + * schematic and on but referred to has LED1 and LED2 here, respectively. + * + * LED1 D2 GPIO1[12] + * LED2 D3 GPIO1[11] + * + * LEDs are pulled high to a low output illuminates the LED. + * + * If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows + * for NuttX debug functionality (where NC means "No Change"). + * + * ON OFF + * LED1 LED2 LED1 LED2 + * LED_STARTED 0 OFF OFF - - + * LED_HEAPALLOCATE 1 ON OFF - - + * LED_IRQSENABLED 1 ON OFF - - + * LED_STACKCREATED 1 ON OFF - - + * LED_INIRQ 2 NC ON NC OFF + * LED_SIGNAL 2 NC ON NC OFF + * LED_ASSERTION 2 NC ON NC OFF + * LED_PANIC 2 NC ON NC OFF + * + * If CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under + * control of the application. The following interfaces are then available + * for application control of the LEDs: + * + * void board_userled_initialize(void); + * void board_userled(int led, bool ledon); + * void board_userled_all(uint8_t ledset); + */ + +/* Debug definitions ********************************************************/ +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define LED_VERBOSE 1 +# define ledvdbg lldbg +# else +# undef LED_VERBOSE +# define ledvdbg(x...) +# endif +#else +# undef LED_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_dumppins + ****************************************************************************/ + +#ifdef LED_VERBOSE +static void led_dumppins(FAR const char *msg) +{ + lpc43_pin_dump(PINCONFIG_LED1, msg); + lpc43_gpio_dump(GPIO_LED2, msg); +} +#else +# define led_dumppins(m) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure all LED pins as GPIO outputs */ + + led_dumppins("board_autoled_initialize() Entry)"); + + /* Configure LED pins as GPIOs, then configure GPIOs as outputs */ + + lpc43_pin_config(PINCONFIG_LED1); + lpc43_gpio_config(GPIO_LED1); + + lpc43_pin_config(PINCONFIG_LED2); + lpc43_gpio_config(GPIO_LED2); + + led_dumppins("board_autoled_initialize() Exit"); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + default: + case 0: + lpc43_gpio_write(GPIO_LED1, true); /* LED1 OFF */ + lpc43_gpio_write(GPIO_LED2, true); /* LED2 OFF */ + break; + + case 1: + lpc43_gpio_write(GPIO_LED1, false); /* LED1 ON */ + lpc43_gpio_write(GPIO_LED2, true); /* LED2 OFF */ + break; + + case 2: + lpc43_gpio_write(GPIO_LED2, false); /* LED2 ON */ + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + default: + case 0: + case 1: + break; + + case 2: + lpc43_gpio_write(GPIO_LED2, true); /* LED2 OFF */ + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/lpc4330-xplorer/src/lpc43_boot.c b/configs/lpc4330-xplorer/src/lpc43_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..76c2345774a9defb0a99f009099c61836476f1c2 --- /dev/null +++ b/configs/lpc4330-xplorer/src/lpc43_boot.c @@ -0,0 +1,81 @@ +/************************************************************************************ + * configs/lpc4330-xplorer/src/lpc43_boot.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc4330-xplorer.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc43_boardinitialize + * + * Description: + * All LPC43xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc43_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/lpc4330-xplorer/src/lpc43_buttons.c b/configs/lpc4330-xplorer/src/lpc43_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..03d27d84899aee8830a816b469cee0e43b29511b --- /dev/null +++ b/configs/lpc4330-xplorer/src/lpc43_buttons.c @@ -0,0 +1,225 @@ +/**************************************************************************** + * configs/lpc4330-xplorer/src/lpc43_buttons.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include + +#include "lpc4330-xplorer.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each LPC4330 Xplorer button. This array is indexed + * by the BUTTON_* definitions in board.h + */ + +static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] = +{ + LPC4330_XPLORER_BUT1 +}; + +/* This array defines all of the interrupt handlers current attached to + * button events. + */ + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS]; + +/* This array provides the mapping from button ID numbers to button IRQ + * numbers. + */ + +static uint8_t g_buttonirq[BOARD_NUM_BUTTONS] = +{ + LPC4330_XPLORER_BUT1_IRQ +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as interrupting inputs. */ + + for (i = 0; i < BOARD_NUM_BUTTONS; i++) + { + lpc43_configgpio(g_buttoncfg[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons. + * + * board_buttons() may be called at any time to harvest the state of every + * button. The state of the buttons is returned as a bitset with one + * bit corresponding to each button: If the bit is set, then the button + * is pressed. See the BOARD_BUTTON_*_BIT and BOARD_JOYSTICK_*_BIT + * definitions in board.h for the meaning of each bit. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < BOARD_NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed. */ + + bool released = lpc43_gpio_read(g_buttoncfg[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/**************************************************************************** + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_button_irq() may be called to register button interrupt handlers. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BOARD_BUTTON_* and BOARD_JOYSTICK_* definitions in board.h for the meaning + * of enumeration values. The previous interrupt handler address is returned + * (so that it may restored, if so desired). + * + * Note that board_button_irq() also enables button interrupts. Button + * interrupts will remain enabled after the interrupt handler is attached. + * Interrupts may be disabled (and detached) by calling board_button_irq with + * irqhandler equal to NULL. + * + ****************************************************************************/ + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + irqstate_t flags; + int irq; + + /* Verify that the button ID is within range */ + + if ((unsigned)id < BOARD_NUM_BUTTONS) + { + /* Return the current button handler and set the new interrupt handler */ + + oldhandler = g_buttonisr[id]; + g_buttonisr[id] = irqhandler; + + /* Disable interrupts until we are done */ + + flags = enter_critical_section(); + + /* Configure the interrupt. Either attach and enable the new + * interrupt or disable and detach the old interrupt handler. + */ + + irq = g_buttonirq[id]; + if (irqhandler) + { + /* Attach then enable the new interrupt handler */ + + (void)irq_attach(irq, irqhandler); + up_enable_irq(irq); + } + else + { + /* Disable then detach the old interrupt handler */ + + up_disable_irq(irq); + (void)irq_detach(irq); + } + leave_critical_section(flags); + } + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/lpc4330-xplorer/src/lpc43_ostest.c b/configs/lpc4330-xplorer/src/lpc43_ostest.c new file mode 100644 index 0000000000000000000000000000000000000000..8bfee95428615375c21b64f7ca173b6df80c3832 --- /dev/null +++ b/configs/lpc4330-xplorer/src/lpc43_ostest.c @@ -0,0 +1,113 @@ +/************************************************************************************ + * configs/lpc4330-xplorer/src/lpc43_ostest.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "lpc4330-xplorer.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#undef HAVE_FPU +#if defined(CONFIG_ARCH_FPU) && defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && \ + defined(CONFIG_SCHED_WAITPID) && !defined(CONFIG_DISABLE_SIGNALS) && \ + !defined(CONFIG_ARMV7M_CMNVECTOR) +# define HAVE_FPU 1 +#endif + +#ifdef HAVE_FPU + +#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*SW_FPU_REGS) +# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size" +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static uint32_t g_saveregs[XCPTCONTEXT_REGS]; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ +/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return + * the current FPU registers. + */ + +void arch_getfpu(FAR uint32_t *fpusave) +{ + irqstate_t flags; + + /* Take a snapshot of the thread context right now */ + + flags = enter_critical_section(); + up_saveusercontext(g_saveregs); + + /* Return only the floating register values */ + + memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS)); + leave_critical_section(flags); +} + +/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function + * will compare them and return true if they are identical. + */ + +bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2) +{ + return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0; +} + +#endif /* HAVE_FPU */ diff --git a/configs/lpc4330-xplorer/src/lpc43_userleds.c b/configs/lpc4330-xplorer/src/lpc43_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..8075aae7ed02a5f4a1186fc849a31c16bd156d4b --- /dev/null +++ b/configs/lpc4330-xplorer/src/lpc43_userleds.c @@ -0,0 +1,156 @@ +/**************************************************************************** + * configs/lpc4330-xplorer/src/lpc43_userleds.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc4330-xplorer.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED definitions **********************************************************/ +/* The LPC4330-Xplorer has 2 user-controllable LEDs labeled D2 an D3 in the + * schematic and on but referred to has LED1 and LED2 here, respectively. + * + * LED1 D2 GPIO1[12] + * LED2 D3 GPIO1[11] + * + * LEDs are pulled high to a low output illuminates the LED. + */ + +/* Debug definitions ********************************************************/ +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define LED_VERBOSE 1 +# define ledvdbg lldbg +# else +# undef LED_VERBOSE +# define ledvdbg(x...) +# endif +#else +# undef LED_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_dumppins + ****************************************************************************/ + +#ifdef LED_VERBOSE +static void led_dumppins(FAR const char *msg) +{ + lpc43_pin_dump(PINCONFIG_LED1, msg); + lpc43_gpio_dump(GPIO_LED2, msg); +} +#else +# define led_dumppins(m) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure all LED GPIO lines */ + + led_dumppins("board_userled_initialize() Entry)"); + + /* Configure LED pins as GPIOs, then configure GPIOs as outputs */ + + lpc43_pin_config(PINCONFIG_LED1); + lpc43_gpio_config(GPIO_LED1); + + lpc43_pin_config(PINCONFIG_LED2); + lpc43_gpio_config(GPIO_LED2); + + led_dumppins("board_userled_initialize() Exit"); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint16_t gpiocfg = (led == BOARD_LED1 ? GPIO_LED1 : GPIO_LED2); + lpc43_gpio_write(gpiocfg, !ledon); +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + lpc43_gpio_write(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0); + lpc43_gpio_write(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/lpc4337-ws/Kconfig b/configs/lpc4337-ws/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..a35dac06fff36be2da12cff9d62dc3e8b2d17544 --- /dev/null +++ b/configs/lpc4337-ws/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_LPC4337_WS +endif diff --git a/configs/lpc4337-ws/README.txt b/configs/lpc4337-ws/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..9a0d2cb99b09fa16251bbf13e4d816e51740a21b --- /dev/null +++ b/configs/lpc4337-ws/README.txt @@ -0,0 +1,1004 @@ +README +====== + +README for NuttX port to the LPC4337-ws board featuring the NXP +LPC4337JBD144 MCU - The port was derived from the LPC4337-ws board NuttX +port. + +Contents +======== + + - LPC4337-ws development board + - Status + - Development Environment + - GNU Toolchain Options + - IDEs + - Code Red IDE/Tools + Booting the LPCLink + Using GDB + Troubleshooting + Command Line Flash Programming + Executing from SPIFI + USB DFU Booting + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - LED and Pushbuttons + - Serial Console + - FPU + - LPC4337-ws Configuration Options + - Configurations + - STATUS + +LPC4337-ws board +================= + + Memory Map + ---------- + + Block Start Length + Name Address + --------------------- ---------- ------ + RAM 0x10000000 128K + RAM2 0x10080000 72K + RAMAHB 0x20000000 32K + RAMAHB2 0x20008000 16K + RAMAHB3 0x2000c000 16K + RAMM0 0x18000000 16K + RAMM01 0x18004000 2K + SPIFI flash 0x14000000 1024K + + Console + ------- + + The LPC4337-ws default console is the USART2. + +Status +====== + + This is the current status of the LPC43xx port: + + - The basic OS test configuration and the basic NSH configurations + are present and fully verified. This includes: SYSTICK system time, + pin and GPIO configuration, and serial console support. A SPIFI + MTD driver is also in place but requires further verification. + + - The following drivers have been copied from the LPC17xx port, but + require integration into the LPC43xx. This integration should + consist of: + + - Remove LPC17xx power, clocking, and pin configuration logic. + - Adding of clock source and frequency to the board.h file. + - Adding of LPC43 clock connection and pin configuration logic. + + Within any luck, these drivers should come up very quickly: + + - lpc43_adc.c, + - lpc43_dac.c, + - lpc43_gpdma.c, + - lpc43_i2c.c, + - lpc43_spi.c, and + - lpc43_ssp.c + + These LPC17xx drivers were not brought into the LPC43xx port because + it appears the these peripherals have been completely redesigned: + + - CAN, + - Ethernet, + - USB device, and + - USB host. + + The following LPC43xx peripherals are unsupported. Some may be + compatible with the LPC17xx, but there is no LPC17xx driver to be + ported: + + - SD/MMC, + - EMC, + - USB0, + - USB1, + - Ethernet, + - LCD, + - SCT, + - Timers 0-3 + - MCPWM, + - QEI, + - Alarm timer, + - WWDT, + - RTC, + - Event monitor, and + - CAN, + + For the missing drivers some of these can be leveraged from other + MCUs that appear to support the same peripheral IP. + + - USB0 appears to be the same as the USB OTG peripheral for the + LPC31xx. It should be possible to drop in the LPC31xx driver + with a small porting effort. + + - The Ethernet block looks to be based on the same IP as the + STM32 Ethernet and, as a result, it should be possible to leverage + the STM32 Ethernet driver with a little more effort. + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +===================== + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The Code Red GNU toolchain, + 2. The CodeSourcery GNU toolchain, + 3. The Atollic Toolchain, + 4. The devkitARM GNU toolchain, + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery or devkitARM toolchain, you simply need add one of the + following configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red "RedSuite" under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the Code Red, CodeSourcery (for Windows), Atollic and devkitARM toolchains + are Windows native toolchains. The CodeSourcery (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project . + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lpc43xx, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/common/up_vectors.S. + +Code Red IDE/Tools +^^^^^^^^^^^^^^^^^^ + + Booting the LPCLink + ------------------- + + The first step is to activate the LPCLink's boot mode. Some general + instructions to do this are provided here: + + http://support.code-red-tech.com/CodeRedWiki/BootingLPCLink + + For my RedSuite installation path, that can be done using the following + steps in a Cygwin bash shell: + + $ /cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin/Scripts/bootLPCXpresso.cmd winusb + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + The same file logic can be found the less restrictive LPCXpresso package at: + + /cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin + + (The "free" RedSuite version has a download limit of 8K; the "free" LPCXpresso + version has a download limit of 128K). + + NOTE that the following alias is defined in the setenv.sh file and + can be used to enter the boot mode with a simpler command: + + alias lpc43xx='${SCRIPT_BIN}/Scripts/bootLPCXpresso.cmd winusb' + + Be default, the setenv.sh scripts uses the LPCXpresso path shown above. + Once setenv.sh has been sources, then entering boot mode becomes simply: + + $ lpc43xx + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + Using GDB + --------- + + The underlying debugger within Red Suite/LPCXpresso is GDB. That GDB + used from the command line. The GDB configuration details for command + line use are on Code Red Wiki: + + http://support.code-red-tech.com/CodeRedWiki/UsingGDB + + and is also summarized here (see the full Wiki for additional details + and options). + + The Code Red Debug Driver implements the GDB "remote" protocol to allow + connection to debug targets. To start a debug session using GDB, use + following steps: + + arm-none-eabi-gdb executable.axf : Start GDB and name the debug image + target extended-remote | : Start debug driver, connect to target + load : Load image and download to target + + The where is crt_emu_lpc18_43_nxp for LPC18xx and LPC43xx. + Your PATH variable should be set up so that the debug driver executable + can be found. For my installation, the driver for the LPC18xx and LPC43xx + is located at: + + /cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin/crt_emu_lpc18_43_nxp.exe, OR + /cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin/crt_emu_lpc18_43_nxp.exe + + And are: + + -n set information level for the debug driver. n should be 2, 3 or 4. + 2 should be sufficient in most circumstances + + -p is the target device to connect to and you should use + =LPC4337. + + -wire= specifies the debug probe. For LPCLink on Windows 7 use + =winusb. The 128K free version only supports the LPC-Link + and RedProbe debug probes. Other JTAG interfaces are supported in + the full version. + + Thus the correct invocation for the LPC4337 under Windows7 would be: + + target extended-remote | crt_emu_lpc18_43_nxp -2 -pLPC4337 -wire=winusb + + DDD. This command can be used to start GDB under the graphics front-end + DDD: + + $ ddd --debugger arm-none-eabi-gdb nuttx & + + NOTE 1: Don't forget to put the LPCLink in boot mode as described above + before starting GDB. So a typical session might look like this: + + $ lpc43xx + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + $ arm-none-eabi-gdb nuttx + (gdb) target extended-remote | crt_emu_lpc18_43_nxp -2 -pLPC4337 -wire=winusb + (gdb) load + (gdb) r + (gdb) c + + NOTE 2: Don't forget to enable CONFIG_DEBUG_SYMBOLS=y in your NuttX + configuration file when you build NuttX. That option is necessary to build + in debugging symbols. + + NOTE 3: There are few things that NuttX has to do differently if you + are using a debugger. Make sure that you also set CONFIG_DEBUG=y. Nothing + also is needed and no debug output will be generated; but NuttX will + use CONFIG_DEBUG=y to mean that a debugger is attached and will deal + with certain resets and debug controls appropriately. + + So you should have: + + CONFIG_DEBUG=y + CONFIG_DEBUG_SYMBOLS=y + + NOTE 4: Every time that you control-C out of the command line GDB, you + leave a copy of the Code Red debugger (crt_emu_lpc18_43_nxp) running. I + have found that if you have these old copies of the debugger running, + hen strange things can happen when start yet another copy of the + debugger (I suspect that GDB may be talking with the wrong debugger). + + If you exit GDB with quit (not control-C), it seems to clean-up okay. + But I have taken to keeping a Process Explorer window open all of the + time to keep track of how many of these bad processes have been created. + + NOTE 5: There is also a certain function that is causing some problems. + The very first thing that the start-up logic does is call a function + called lpc43_softreset() which resets most of the peripherals. But it + also causes some crashes... I think because the resets are causing some + interrupts. + + I put a big delay in the soft reset logic between resetting and clearing + pending interrupts and that seems to help some but I am not confident + that that is a fix. I think that the real fix might be to just eliminated + this lpc43_softreset() function if we determine that it is not needed. + + If you step over lpc43_softreset() after loading the coding (using the 'n' + command), then everything seems work okay. + + Troubleshooting + --------------- + + This page provides some troubleshooting information that you can use to + verify that the LPCLink is working correctly: + + http://support.code-red-tech.com/CodeRedWiki/LPCLinkDiagnostics + + Command Line Flash Programming + ------------------------------ + + The LPC18xx/LPC43xx debug driver can also be used to program the LPC43xx + flash directly from the command line. The script flash.sh that may be + found in the configs/LPC4337-ws/scripts directory can do that with + a single command line command. + + Executing from SPIFI + -------------------- + + By default, the configurations here assume that you are executing directly + from SRAM. + + CONFIG_LPC43_BOOT_SRAM=y : Executing in SRAM + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red under Windows + + To execute from SPIFI, you would need to set: + + CONFIG_LPC43_BOOT_SPIFI=y : Executing from SPIFI + CONFIG_RAM_SIZE=(128*1024) : SRAM Bank0 size + CONFIG_RAM_START=0x10000000 : SRAM Bank0 base address + CONFIG_SPIFI_OFFSET=(512*1024) : SPIFI file system offset + + To boot the LPC4337-ws from SPIFI the DIP switches should be 1-OFF, + 2-ON, 3-ON, 4-ON (LOW LOW LOW HIGH in Table 19, MSB to LSB). + + If the code in flash hard faults after reset and crt_emu_lpc18_43_nxp + can't reset the MCU, an alternative is to temporarily change switch 1 + to ON and press the reset button so it enters UART boot mode. Then + change it back to OFF and reset to boot again from flash. + + # Use -wire to specify the debug probe in use: + # (empty) Red Probe+ + # -wire=winusb LPC-Link on Windows XP + # -wire=hid LPC-Link on Windows Vista/ Windows 7 + # Add -g -4 for verbose output + + crt_emu_lpc18_43_nxp -wire=hid -pLPC4337 -load-base=0x14000000 + -flash-load-exec=nuttx.bin -flash-driver=LPC1850A_4350A_SPIFI.cfx + + USB DFU Booting + --------------- + + To be provided. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh LPC4337-ws/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LED and Pushbuttons +=================== + + LED + --- + The LPC4337-ws has one user-controllable LED labelled D6 controlled + by the signal LED_3V3: + + LED SIGNAL MCU + D6 LED_3V3 PE_& GPIO7[7] + + A low output illuminates the LED. + + If CONFIG_ARCH_LEDS is defined, the LED will be controlled as follows + for NuttX debug functionality (where NC means "No Change"). + + -------------------------- --------- + LED + -------------------------- --------- + LED_STARTED OFF + LED_HEAPALLOCATE OFF + LED_IRQSENABLED OFF + LED_STACKCREATED ON + LED_INIRQ NC + LED_SIGNAL NC + LED_ASSERTION NC + LED_PANIC Flashing + -------------------------- --------- + + If CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under + control of the application. The following interfaces are then available + for application control of the LEDs: + + void board_userled_initialize(void); + void board_userled(int led, bool ledon); + void board_userled_all(uint8_t ledset); + + Pushbuttons + ----------- + To be provided + +Serial Console +============== + +The LPC4337-ws does not have RS-232 drivers or serial connectors on board. +USART, USART2 and USART3 are available on J12 as follows: + + ------ ------ ----------------------- + SIGNAL J12 PIN LPC4337FET256 PIN + (TFBGA256 package) + ------ ------ ----------------------- + U0_TXD pin 3 F6 P9_5 U0_TXD=Alt 4 + U0_RXD pin 4 F9 P9_6 U0_RXD=Alt 4 + U2_TXD pin 5 H8 P1_13 U1_TXD=Alt 1 + U2_RXD pin 6 J8 P1_14 U1_RXD=Alt 1 + U3_TXD pin 7 H8 P1_13 U1_TXD=Alt 1 + U3_RXD pin 8 J8 P1_14 U1_RXD=Alt 1 + ------ ------ ----------------------- + + GND is available on J12 pins 29 and 30 + 5V is available on J12 pin 2 + 3.3v id available on J12 pin 1 + +FPU +=== + +FPU Configuration Options +------------------------- + +There are two version of the FPU support built into the most NuttX Cortex-M4 +ports. The current LPC43xx port support only one of these options, the "Non- +Lazy Floating Point Register Save". As a consequence, CONFIG_ARMV7M_CMNVECTOR +must be defined in *all* LPC43xx configuration files. + +1. Lazy Floating Point Register Save. + + This is an untested implementation that saves and restores FPU registers + only on context switches. This means: (1) floating point registers are + not stored on each context switch and, hence, possibly better interrupt + performance. But, (2) since floating point registers are not saved, + you cannot use floating point operations within interrupt handlers. + + This logic can be enabled by simply adding the following to your .config + file: + + CONFIG_ARCH_FPU=y + +2. Non-Lazy Floating Point Register Save + + Mike Smith has contributed an extensive re-write of the ARMv7-M exception + handling logic. This includes verified support for the FPU. These changes + have not yet been incorporated into the mainline and are still considered + experimental. These FPU logic can be enabled with: + + CONFIG_ARCH_FPU=y + CONFIG_ARMV7M_CMNVECTOR=y + + You will probably also changes to the ld.script in if this option is selected. + This should work: + + -ENTRY(_stext) + +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ + +EXTERN(_vectors) /* Force the vectors to be included in the output */ + +CFLAGS +------ + +Only the recent toolchains have built-in support for the Cortex-M4 FPU. You will see +the following lines in each Make.defs file: + + ifeq ($(CONFIG_ARCH_FPU),y) + ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard + else + ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + endif + +Configuration Changes +--------------------- + +Below are all of the configuration changes that I had to make to configs/stm3240g-eval/nsh2 +in order to successfully build NuttX using the Atollic toolchain WITH FPU support: + + -CONFIG_ARCH_FPU=n : Enable FPU support + +CONFIG_ARCH_FPU=y + + -CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : Disable the CodeSourcery toolchain + +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n + + -CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=n : Enable the Atollic toolchains + +CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : + + -CONFIG_INTELHEX_BINARY=y : Suppress generation FLASH download formats + +CONFIG_INTELHEX_BINARY=n : (Only necessary with the "Lite" version) + + -CONFIG_HAVE_CXX=y : Suppress generation of C++ code + +CONFIG_HAVE_CXX=n : (Only necessary with the "Lite" version) + +See the section above on Toolchains, NOTE 2, for explanations for some of +the configuration settings. Some of the usual settings are just not supported +by the "Lite" version of the Atollic toolchain. + +LPC4337-ws Configuration Options +===================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc43xx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LPC4337=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=LPC4337-ws (for the LPC4337-ws board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_LPC4337ws=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x10000000 + + CONFIG_ARCH_FPU - The LPC43xxx supports a floating point unit (FPU) + + CONFIG_ARCH_FPU=y + + CONFIG_LPC43_BOOT_xxx - The startup code needs to know if the code is running + from internal FLASH, external FLASH, SPIFI, or SRAM in order to + initialize properly. Note that a boot device is not specified for + cases where the code is copied into SRAM; those cases are all covered + by CONFIG_LPC43_BOOT_SRAM. + + CONFIG_LPC43_BOOT_SRAM=y : Running from SRAM (0x1000:0000) + CONFIG_LPC43_BOOT_SPIFI=y : Running from QuadFLASH (0x1400:0000) + CONFIG_LPC43_BOOT_FLASHA=y : Running in internal FLASHA (0x1a00:0000) + CONFIG_LPC43_BOOT_FLASHB=y : Running in internal FLASHA (0x1b00:0000) + CONFIG_LPC43_BOOT_CS0FLASH=y : Running in external FLASH CS0 (0x1c00:0000) + CONFIG_LPC43_BOOT_CS1FLASH=y : Running in external FLASH CS1 (0x1d00:0000) + CONFIG_LPC43_BOOT_CS2FLASH=y : Running in external FLASH CS2 (0x1e00:0000) + CONFIG_LPC43_BOOT_CS3FLASH=y : Running in external FLASH CS3 (0x1f00:0000) + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_LPC43_ADC0=y + CONFIG_LPC43_ADC1=y + CONFIG_LPC43_ATIMER=y + CONFIG_LPC43_CAN1=y + CONFIG_LPC43_CAN2=y + CONFIG_LPC43_DAC=y + CONFIG_LPC43_EMC=y + CONFIG_LPC43_ETHERNET=y + CONFIG_LPC43_EVNTMNTR=y + CONFIG_LPC43_GPDMA=y + CONFIG_LPC43_I2C0=y + CONFIG_LPC43_I2C1=y + CONFIG_LPC43_I2S0=y + CONFIG_LPC43_I2S1=y + CONFIG_LPC43_LCD=y + CONFIG_LPC43_MCPWM=y + CONFIG_LPC43_QEI=y + CONFIG_LPC43_RIT=y + CONFIG_LPC43_RTC=y + CONFIG_LPC43_SCT=y + CONFIG_LPC43_SDMMC=y + CONFIG_LPC43_SPI=y + CONFIG_LPC43_SPIFI=y + CONFIG_LPC43_SSP0=y + CONFIG_LPC43_SSP1=y + CONFIG_LPC43_TMR0=y + CONFIG_LPC43_TMR1=y + CONFIG_LPC43_TMR2=y + CONFIG_LPC43_TMR3=y + CONFIG_LPC43_USART0=y + CONFIG_LPC43_UART1=y + CONFIG_LPC43_USART2=y + CONFIG_LPC43_USART3=y + CONFIG_LPC43_USB0=y + CONFIG_LPC43_USB1=y + CONFIG_LPC43_USB1_ULPI=y + CONFIG_LPC43_WWDT=y + + LPC43xx specific U[S]ART device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the USART0). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + CONFIG_USARTn_RS485MODE - Support LPC43xx USART0,2,3 RS485 mode + ioctls (TIOCSRS485 and TIOCGRS485) to enable and disable + RS-485 mode. + + LPC43xx specific CAN device driver settings. These settings all + require CONFIG_CAN: + + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN2 is defined. + CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7 + + LPC43xx specific PHY/Ethernet device driver settings. These setting + also require CONFIG_NET and CONFIG_LPC43_ETHERNET. + + CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY + CONFIG_PHY_AUTONEG - Enable auto-negotion + CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. + CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex + + CONFIG_NET_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb + CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 18 + CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18 + CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented). + CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs + CONFIG_DEBUG. + CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets. + Also needs CONFIG_DEBUG. + CONFIG_NET_HASH - Enable receipt of near-perfect match frames. + + LPC43xx USB Device Configuration + + CONFIG_LPC43_USBDEV_FRAME_INTERRUPT + Handle USB Start-Of-Frame events. + Enable reading SOF from interrupt handler vs. simply reading on demand. + Probably a bad idea... Unless there is some issue with sampling the SOF + from hardware asynchronously. + CONFIG_LPC43_USBDEV_EPFAST_INTERRUPT + Enable high priority interrupts. I have no idea why you might want to + do that + CONFIG_LPC43_USBDEV_NDMADESCRIPTORS + Number of DMA descriptors to allocate in SRAM. + CONFIG_LPC43_USBDEV_DMA + Enable lpc17xx-specific DMA support + CONFIG_LPC43_USBDEV_NOVBUS + Define if the hardware implementation does not support the VBUS signal + CONFIG_LPC43_USBDEV_NOLED + Define if the hardware implementation does not support the LED output + + LPC43xx USB Host Configuration + + CONFIG_USBHOST_OHCIRAM_SIZE + Total size of OHCI RAM (in AHB SRAM Bank 1) + CONFIG_USBHOST_NEDS + Number of endpoint descriptors + CONFIG_USBHOST_NTDS + Number of transfer descriptors + CONFIG_USBHOST_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_USBHOST_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_IOBUFSIZE + Size of one end-user I/O buffer. This can be zero if the + application can guarantee that all end-user I/O buffers + reside in AHB SRAM. + +Configurations +============== + +Each LPC4337-ws configuration is maintained in a sub-directory and can be selected +as follow: + + cd tools + ./configure.sh LPC4337-ws/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + ---- + This configuration is the NuttShell (NSH) example at examples/nsh/. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. The project can exucute directly from SRAM with NuttX loaded by a debugger + by setting the following configuration options. + + CONFIG_LPC43_BOOT_SRAM=y : Executing in SRAM + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red under Windows + + 3. To execute from SPIFI, you would need to set: + + CONFIG_LPC43_BOOT_SPIFI=y : Executing from SPIFI + CONFIG_RAM_SIZE=(128*1024) : SRAM Bank0 size + CONFIG_RAM_START=0x10000000 : SRAM Bank0 base address + CONFIG_SPIFI_OFFSET=(512*1024) : SPIFI file system offset + + CONFIG_MM_REGIONS should also be increased if you want to other SRAM banks + to the memory pool. + + 4. This configuration an also be used create a block device on the SPIFI + FLASH. CONFIG_LPC43_SPIFI=y must also be defined to enable SPIFI setup + support: + + SPIFI device geometry: + + CONFIG_SPIFI_OFFSET - Offset the beginning of the block driver this many + bytes into the device address space. This offset must be an exact + multiple of the erase block size (CONFIG_SPIFI_BLKSIZE). Default 0. + CONFIG_SPIFI_BLKSIZE - The size of one device erase block. If not defined + then the driver will try to determine the correct erase block size by + examining that data returned from spifi_initialize (which sometimes + seems bad). + + Other SPIFI options + + CONFIG_SPIFI_SECTOR512 - If defined, then the driver will report a more + FAT friendly 512 byte sector size and will manage the read-modify-write + operations on the larger erase block. + CONFIG_SPIFI_READONLY - Define to support only read-only operations. + CONFIG_SPIFI_LIBRARY - Don't use the LPC43xx ROM routines but, instead, + use an external library implementation of the SPIFI interface. + CONFIG_SPIFI_VERIFY - Verify all spifi_program() operations by reading + from the SPI address space after each write. + CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers. You + probably do not want to enable this unless you want to dig through a + *lot* of debug output! Also required CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, + and CONFIG_DEBUG_FS, + + 5. In my experience, there were some missing function pointers in the LPC43xx + SPIFI ROM routines and the SPIFI configuration could only be built with + CONFIG_SPIFI_LIBRARY=y. The SPIFI library is proprietary and cannot be + provided within NuttX open source repository; SPIFI library binaries can + be found on the lpcware.com website. In this build sceneario, you must + also provide the patch to the external SPIFI library be defining the make + variable EXTRA_LIBS in the top-level Make.defs file. Good luck! + + 6. By default the LPC4337-ws port is configured to run from the onboard flash + bank A at 0x1a000000. In order to achieve this, the resulting NuttX binary + will need to have a checksum computed over the vector table and then be + converted to a hex file which can then be flashed using a debugger such as + the Uws through Keil. + + The checksum can be computed using the checksum binary provided with the + LPCXpresso IDE software suite as follows: + + ./checksum nuttx.bin -p LPC4337 -v + + This will modify the binary file, appending the checksum to the correct place + at the end of the vector table. + + The binary must now be converted to a hex file, which can be achieved using + the srec_cat utility, which is part of the SRecord package (srecord.sourceforge.net) + as follows: + + srec_cat nuttx.bin -binary -offset 0x1a000000 -o nuttx.hex -intel --line-length=44 + + Now the hex file can be loaded using a debugger, and the code will execute from + flash. + + diff --git a/configs/lpc4337-ws/include/board.h b/configs/lpc4337-ws/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..76da5ef7477ba442098a6fea89a80c77d8a8100a --- /dev/null +++ b/configs/lpc4337-ws/include/board.h @@ -0,0 +1,362 @@ +/**************************************************************************** + * configs/lpc4337-ws/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_LPC4337_WS_INCLUDE_BOARD_H +#define __CONFIGS_LPC4337_WS_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking ****************************************************************/ +/* NOTE: The following definitions require lpc43_cgu.h. It is not included + * here because the including C file may not have that file in its include + * path. + * + * The Xplorer board has four crystals on board: + * + * Y1 - RTC 32.768 MHz oscillator input, + * Y2 - 24.576 MHz input to the UDA 1380 audio codec, + * Y3 - 12.000 MHz LPC43xx crystal oscillator input + * Y4 - 50 MHz input for Ethernet + */ + +#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency (Y3) */ +#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency (Y1) */ +#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */ + +/* Integer and direct modes are supported: + * + * In integer mode (Fclkout < 156000000): + * Fclkin = BOARD_XTAL_FREQUENCY + * Fclkout = Msel * FClkin / Nsel + * Fcco = 2 * Psel * Fclkout + * In direct mode (Fclkout > 156000000): + * Fclkin = BOARD_XTAL_FREQUENCY + * Fclkout = Msel * FClkin / Nsel + * Fcco = Fclkout + */ + +#ifdef CONFIG_LPC43_72MHz + +/* NOTE: At 72MHz, the calibrated value of CONFIG_BOARD_LOOPSPERMSEC was + * determined to be: + * + * CONFIG_BOARD_LOOPSPERMSEC=7191 + * + * executing from SRAM. + */ + +/* Final clocking (Integer mode with no ramp-up) + * + * Fclkout = 6 * 12MHz / 1 = 72MHz + * Fcco = 2 * 2 * 72MHz = 216MHz + */ + +# define BOARD_PLL_MSEL (6) /* Msel = 6 */ +# define BOARD_PLL_NSEL (1) /* Nsel = 1 */ +# define BOARD_PLL_PSEL (2) /* Psel = 2 */ + +# define BOARD_FCLKOUT_FREQUENCY (72000000) /* 6 * 12,000,000 / 1 */ +# define BOARD_FCCO_FREQUENCY (244000000) /* 2 * 2 * Fclkout */ + +#else + +/* NOTE: At 72MHz, the calibrated value of CONFIG_BOARD_LOOPSPERMSEC was + * determined to be: + * + * CONFIG_BOARD_LOOPSPERMSEC=18535 + * + * executing from SRAM. + */ + +/* Intermediate ramp-up clocking (Integer mode). If BOARD_PLL_RAMP_MSEL + * is not defined, there will be no ramp-up. + * + * Fclkout = 9 * 12MHz / 1 = 108MHz + * Fcco = 2 * 1 * 108MHz = 216MHz + */ + +# define BOARD_PLL_RAMP_MSEL (9) /* Msel = 9 */ +# define BOARD_PLL_RAMP_NSEL (1) /* Nsel = 1 */ +# define BOARD_PLL_RAMP_PSEL (1) /* Psel = 1 */ + +# define BOARD_RAMP_FCLKOUT (108000000) /* 9 * 12,000,000 / 1 */ +# define BOARD_RAMP_FCCO (216000000) /* 2 * 1 * Fclkout */ + +/* Final clocking (Direct mode). + * + * Fclkout = 17 * 12MHz / 1 = 204MHz + * Fcco = Fclockout = 204MHz + */ + +# define BOARD_PLL_MSEL (17) /* Msel = 17 */ +# define BOARD_PLL_NSEL (1) /* Nsel = 1 */ + +# define BOARD_FCLKOUT_FREQUENCY (204000000) /* 17 * 12,000,000 / 1 */ +# define BOARD_FCCO_FREQUENCY (204000000) /* Fclockout */ + +#endif + +#define LPC43_CCLK BOARD_FCLKOUT_FREQUENCY + +#if defined(CONFIG_LPC43_BUS) || defined(CONFIG_LPC43_MCPWM) || \ + defined(CONFIG_LPC43_I2C0) || defined(CONFIG_LPC43_I2S0) || \ + defined(CONFIG_LPC43_I2S1) || defined(CONFIG_LPC43_CAN1) +# define BOARD_ABP1_CLKSRC BASE_APB_CLKSEL_XTAL +# define BOARD_ABP1_FREQUENCY BOARD_XTAL_FREQUENCY +#endif + + +#if defined(CONFIG_LPC43_BUS) || defined(CONFIG_LPC43_I2C1) || \ + defined(CONFIG_LPC43_DAC) || defined(CONFIG_LPC43_ADC0) || \ + defined(CONFIG_LPC43_ADC1) || defined(CONFIG_LPC43_CAN0) +# define BOARD_ABP3_CLKSRC BASE_APB_CLKSEL_XTAL +# define BOARD_ABP3_FREQUENCY BOARD_XTAL_FREQUENCY +#endif + +#define BOARD_IDIVA_DIVIDER (2) +#define BOARD_IDIVA_CLKSRC IDIVA_CLKSEL_PLL1 +#define BOARD_IDIVA_FREQUENCY (BOARD_FCLKOUT_FREQUENCY/BOARD_IDIVA_DIVIDER) + +/* USB0 ********************************************************************/ +/* Settings needed in lpc43_cpu.c */ + +#define BOARD_USB0_CLKSRC PLL0USB_CLKSEL_XTAL +#define BOARD_USB0_MDIV 0x06167ffa /* Table 149 datsheet, valid for 12Mhz Fclkin */ +#define BOARD_USB0_NP_DIV 0x00302062 /* Table 149 datsheet, valid for 12Mhz Fclkin */ + +/* SPIFI clocking **********************************************************/ +/* The SPIFI will receive clocking from a divider per the settings provided + * in this file. The NuttX code will configure PLL1 as the input clock + * for the selected divider + */ + +#undef BOARD_SPIFI_PLL1 /* No division */ +#undef BOARD_SPIFI_DIVA /* Supports division by 1-4 */ +#undef BOARD_SPIFI_DIVB /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVC /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVD /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVE /* Supports division by 1-256 */ + +#if BOARD_FCLKOUT_FREQUENCY < 20000000 +# define BOARD_SPIFI_PLL1 1 /* Use PLL1 directly */ +#else +# define BOARD_SPIFI_DIVB 1 /* Use IDIVB */ +#endif + +/* We need to configure the divider so that its output is as close to the + * desired SCLK value. The peak data transfer rate will be about half of + * this frequency in bytes per second. + */ + +#if BOARD_FCLKOUT_FREQUENCY < 20000000 +# define BOARD_SPIFI_FREQUENCY BOARD_FCLKOUT_FREQUENCY /* 72Mhz? */ +#else +# define BOARD_SPIFI_DIVIDER (14) /* 204MHz / 14 = 14.57MHz */ +# define BOARD_SPIFI_FREQUENCY (102000000) /* 204MHz / 14 = 14.57MHz */ +#endif + +#if CONFIG_SPIFI_LIBRARY +# define SPIFI_DEVICE_ALL 0 /**< Enables all devices in family */ +# define SPIFI_DEVICE_S25FL016K 0 /**< Enables Spansion S25FL016K device */ +# define SPIFI_DEVICE_S25FL032P 0 /**< Enables Spansion S25FL032P device */ +# define SPIFI_DEVICE_S25FL064P 0 /**< Enables Spansion S25FL064P device */ +# define SPIFI_DEVICE_S25FL129P_64K 0 /**< Enables Spansion S25FL129P (64K block) device */ +# define SPIFI_DEVICE_S25FL129P_256K 0 /**< Enables Spansion S25FL129P (256K block) device */ +# define SPIFI_DEVICE_S25FL164K 0 /**< Enables Spansion S25FL164K device */ +# define SPIFI_DEVICE_S25FL256S_64K 0 /**< Enables Spansion S25FL256S (64K block) device */ +# define SPIFI_DEVICE_S25FL256S_256K 0 /**< Enables Spansion S25FL256S (256K block) device */ +# define SPIFI_DEVICE_S25FL512S 0 /**< Enables Spansion S25FL512S device */ +# define SPIFI_DEVICE_MX25L1635E 0 /**< Enables Macronix MX25L1635E device */ +# define SPIFI_DEVICE_MX25L3235E 0 /**< Enables Macronix MX25L3235E device */ +# define SPIFI_DEVICE_MX25L8035E 0 /**< Enables Macronix MX25L8035E device */ +# define SPIFI_DEVICE_MX25L6435E 0 /**< Enables Macronix MX25L6435E device */ +# define SPIFI_DEVICE_W25Q32FV 0 /**< Enables Winbond W25Q32FV device */ +# define SPIFI_DEVICE_W25Q64FV 0 /**< Enables Winbond W25Q32V device */ +# define SPIFI_DEVICE_W25Q80BV 1 /**< Enables Winbond W25Q80BV device */ +# define SPIFI_DEVICE_REQUENCY_DIVIDER 2 /* PLL1 clock divider */ +#endif + +/* UART clocking ***********************************************************/ +/* Configure all U[S]ARTs to use the XTAL input frequency */ + +#define BOARD_USART0_CLKSRC BASE_USART0_CLKSEL_XTAL +#define BOARD_USART0_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_UART1_CLKSRC BASE_UART1_CLKSEL_XTAL +#define BOARD_UART1_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_USART2_CLKSRC BASE_USART2_CLKSEL_XTAL +#define BOARD_USART2_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_USART3_CLKSRC BASE_USART3_CLKSEL_XTAL +#define BOARD_USART3_BASEFREQ BOARD_XTAL_FREQUENCY + +/* SSP clocking *********************************************************** + * + * BOARD_SSPX_BASEFREQ may be further divided by 2-254 to get the SSP clock. If we + * want a usable range of 400KHz to 25MHz for the SSP, then: + * + * 1. SSPCLK must be greater than (2*25MHz) = 50MHz, and + * 2. SSPCLK must be less than (254*400Khz) = 101.6MHz. + * + */ + +#define BOARD_SSP0_CLKSRC BASE_SSP0_CLKSEL_IDIVA +#define BOARD_SSP0_BASEFREQ BOARD_IDIVA_FREQUENCY + +#define BOARD_SSP1_CLKSRC BASE_SSP1_CLKSEL_IDIVA +#define BOARD_SSP1_BASEFREQ BOARD_IDIVA_FREQUENCY + +/* LED definitions *********************************************************/ +/* LED1 K2 GPIO0[8] + * + * LED index values for use with board_userled() + */ + +#define BOARD_LED 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_BIT (1 << BOARD_LED) + +/* If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows + * for NuttX debug functionality (where NC means "No Change"). If + * CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under + * control of the application. The following interfaces are then available + * for application control of the LEDs: + * + * void board_userled_initialize(void); + * void board_userled(int led, bool ledon); + * void board_userled_all(uint8_t ledset); + */ + /* LED */ +#define LED_STARTED 0 /* OFF */ +#define LED_HEAPALLOCATE 0 /* OFF */ +#define LED_IRQSENABLED 0 /* OFF */ +#define LED_STACKCREATED 1 /* ON */ +#define LED_INIRQ 2 /* NC */ +#define LED_SIGNAL 2 /* NC */ +#define LED_ASSERTION 2 /* NC */ +#define LED_PANIC 3 /* Flashing */ + +/* UART Pins ****************************************************************/ +/* The following definitions must be provided so that the LPC43 serial + * driver can set up the U[S]ART for the serial console properly (see the + * file arch/arc/src/lpc43xx/lpc43*_pinconf.h for more info). + */ + +#define PINCONF_U0_TXD PINCONF_U0_TXD_3 +#define PINCONF_U0_RXD PINCONF_U0_RXD_3 +#define PINCONF_U0_DIR PINCONF_U0_DIR_3 + +#define PINCONF_U1_TXD PINCONF_U1_TXD_1 +#define PINCONF_U1_RXD PINCONF_U1_RXD_1 + +#define PINCONF_U2_TXD PINCONF_U2_TXD_2 +#define PINCONF_U2_RXD PINCONF_U2_RXD_2 +#define PINCONF_U2_DIR PINCONF_U2_DIR_2 + +#define PINCONF_U3_TXD PINCONF_U3_TXD_2 +#define PINCONF_U3_RXD PINCONF_U3_RXD_2 +#define PINCONF_U3_DIR PINCONF_U3_DIR_2 + +/* I2C1 pins, not really accessible on the board */ + +#define PINCONF_I2C1_SCL PINCONF_I2C1_SCL_1 +#define PINCONF_I2C1_SDA PINCONF_I2C1_SDA_1 + +/* SSP1 pins */ + +#define PINCONF_SSP1_MISO PINCONF_SSP1_MISO_1 +#define PINCONF_SSP1_MOSI PINCONF_SSP1_MOSI_1 +#define PINCONF_SSP1_SCK PINCONF_SSP1_SCK_2 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc43_boardinitialize + * + * Description: + * All LPC43xx architectures must provide the following entry point. This + * entry point is called early in the intitialization -- after all memory + * has been configured and mapped but before any devices have been + * initialized. + * + ****************************************************************************/ + +void lpc43_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_LPC4337_WS_INCLUDE_BOARD_H */ diff --git a/configs/lpc4337-ws/nsh/Make.defs b/configs/lpc4337-ws/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..2192ced6f12767e18392ca885e7218867991e3f6 --- /dev/null +++ b/configs/lpc4337-ws/nsh/Make.defs @@ -0,0 +1,130 @@ +############################################################################ +# configs/lpc4337-ws/nsh/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +# Setup for the kind of memory that we are executing from + +ifeq ($(CONFIG_LPC43_BOOT_SRAM),y) + LDSCRIPT = ramconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_SPIFI),y) + LDSCRIPT = spificonfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_FLASHA),y) + LDSCRIPT = flashaconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_FLASHB),y) + LDSCRIPT = flashaconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_CS0FLASH),y) + LDSCRIPT = cs0flash.ld +endif + +# Setup for Windows vs Linux/Cygwin/OSX environments + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/lpc4337-ws/nsh/defconfig b/configs/lpc4337-ws/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..52536d55b2bdda58e39aabda0d9fd13ff5305854 --- /dev/null +++ b/configs/lpc4337-ws/nsh/defconfig @@ -0,0 +1,928 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +CONFIG_ARCH_STDARG_H=y +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +CONFIG_ARCH_CHIP_LPC43XX=y +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc43xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC43xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC4310FBD144 is not set +# CONFIG_ARCH_CHIP_LPC4310FET100 is not set +# CONFIG_ARCH_CHIP_LPC4320FBD144 is not set +# CONFIG_ARCH_CHIP_LPC4320FET100 is not set +# CONFIG_ARCH_CHIP_LPC4330FBD144 is not set +# CONFIG_ARCH_CHIP_LPC4330FET100 is not set +# CONFIG_ARCH_CHIP_LPC4330FET180 is not set +# CONFIG_ARCH_CHIP_LPC4330FET256 is not set +CONFIG_ARCH_CHIP_LPC4337JBD144=y +# CONFIG_ARCH_CHIP_LPC4350FBD208 is not set +# CONFIG_ARCH_CHIP_LPC4350FET180 is not set +# CONFIG_ARCH_CHIP_LPC4350FET256 is not set +# CONFIG_ARCH_CHIP_LPC4353FBD208 is not set +# CONFIG_ARCH_CHIP_LPC4353FET180 is not set +# CONFIG_ARCH_CHIP_LPC4353FET256 is not set +# CONFIG_ARCH_CHIP_LPC4357FET180 is not set +# CONFIG_ARCH_CHIP_LPC4357FBD208 is not set +# CONFIG_ARCH_CHIP_LPC4357FET256 is not set +# CONFIG_ARCH_CHIP_LPC4370FET100 is not set +CONFIG_ARCH_FAMILY_LPC4337=y +# CONFIG_LPC43_BOOT_SRAM is not set +# CONFIG_LPC43_BOOT_SPIFI is not set +CONFIG_LPC43_BOOT_FLASHA=y +# CONFIG_LPC43_BOOT_FLASHB is not set +# CONFIG_LPC43_BOOT_CS0FLASH is not set +# CONFIG_LPC43_BOOT_CS1FLASH is not set +# CONFIG_LPC43_BOOT_CS2FLASH is not set +# CONFIG_LPC43_BOOT_CS3FLASH is not set + +# +# LPC43xx Peripheral Support +# +CONFIG_LPC43_ADC0=y +# CONFIG_LPC43_ADC1 is not set +# CONFIG_LPC43_ATIMER is not set +# CONFIG_LPC43_CAN1 is not set +# CONFIG_LPC43_CAN2 is not set +# CONFIG_LPC43_DAC is not set +# CONFIG_LPC43_EMC is not set +# CONFIG_LPC43_ETHERNET is not set +# CONFIG_LPC43_EVNTMNTR is not set +# CONFIG_LPC43_GPDMA is not set +CONFIG_LPC43_I2C0=y +# CONFIG_LPC43_I2C0_SUPERFAST is not set +# CONFIG_LPC43_I2C1 is not set +# CONFIG_LPC43_I2S0 is not set +# CONFIG_LPC43_I2S1 is not set +# CONFIG_LPC43_LCD is not set +# CONFIG_LPC43_MCPWM is not set +# CONFIG_LPC43_QEI is not set +# CONFIG_LPC43_RIT is not set +# CONFIG_LPC43_RTC is not set +# CONFIG_LPC43_SCT is not set +# CONFIG_LPC43_SDMMC is not set +# CONFIG_LPC43_SPI is not set +CONFIG_LPC43_SPIFI=y +# CONFIG_LPC43_SSP0 is not set +CONFIG_LPC43_SSP1=y +# CONFIG_LPC43_TMR0 is not set +# CONFIG_LPC43_TMR1 is not set +# CONFIG_LPC43_TMR2 is not set +# CONFIG_LPC43_TMR3 is not set +# CONFIG_LPC43_USART0 is not set +# CONFIG_LPC43_UART1 is not set +CONFIG_LPC43_USART2=y +# CONFIG_LPC43_USART3 is not set +# CONFIG_LPC43_USBOTG is not set +CONFIG_LPC43_USB0=y +# CONFIG_LPC43_USB1 is not set +# CONFIG_LPC43_WWDT is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=18535 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC4337_WS=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lpc4337-ws" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +CONFIG_BOARDCTL_ADCTEST=y +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +CONFIG_SCHED_TICKLESS=y +CONFIG_SCHED_TICKLESS_ALARM=y +# CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP is not set +CONFIG_USEC_PER_TICK=1000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=11 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +CONFIG_ANALOG=y +CONFIG_ADC=y +CONFIG_ADC_FIFOSIZE=8 +# CONFIG_ADC_ADS125X is not set +# CONFIG_ADC_PGA11X is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +CONFIG_USBDEV_DUALSPEED=y +# CONFIG_USBDEV_SELFPOWERED is not set +CONFIG_USBDEV_BUSPOWERED=y +CONFIG_USBDEV_MAXPOWER=500 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=2 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=512 +CONFIG_CDCACM_TXBUFSIZE=2048 +CONFIG_CDCACM_VENDORID=0x03EB +CONFIG_CDCACM_PRODUCTID=0x2044 +CONFIG_CDCACM_VENDORSTR="nuttx" +CONFIG_CDCACM_PRODUCTSTR="lpc4337-ws" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_ADC is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=0 +CONFIG_I2CTOOL_MAXBUS=1 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=100000 +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +CONFIG_SYSTEM_CDCACM=y +CONFIG_SYSTEM_CDCACM_DEVMINOR=0 +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lpc4337-ws/nsh/setenv.sh b/configs/lpc4337-ws/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..60612b8c352effc38ff243cf34701fd0aa76923c --- /dev/null +++ b/configs/lpc4337-ws/nsh/setenv.sh @@ -0,0 +1,92 @@ +#!/bin/bash +# configs/lpc4337-ws/nsh/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Code Red +# toolchain under windows. You will have to edit this if you install the +# Code Red toolchain in any other location or if you install a different +# version +export TOOLCHAIN_BIN="/cygdrive/c/Users/Public/tools/bin" +#export SCRIPT_BIN="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin" +export SCRIPT_BIN="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export SCRIPT_BIN= + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" +#export SCRIPT_BIN= + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +#export SCRIPT_BIN= + +# And add the selected toolchain path[s] to the PATH variable + +export PATH="/sbin:/usr/sbin:${PATH_ORIG}" + +if [ ! -z ${SCRIPT_BIN} ]; then + export PATH="${SCRIPT_BIN}:${PATH}" +fi + +export PATH="${TOOLCHAIN_BIN}:${PATH}" +echo "PATH : ${PATH}" + +# Set an alias that can be used to put the LPC43xx in boot mode + +alias lpc43xx='${SCRIPT_BIN}/Scripts/bootLPCXpresso.cmd winusb' diff --git a/configs/lpc4337-ws/scripts/flash.bat b/configs/lpc4337-ws/scripts/flash.bat new file mode 100644 index 0000000000000000000000000000000000000000..75b4c7466201d4b663009f687467af4020eb2985 --- /dev/null +++ b/configs/lpc4337-ws/scripts/flash.bat @@ -0,0 +1,8 @@ +set LPCScrypt=C:\NXP\LPCScrypt\bin + +call %LPCScrypt%\..\scripts\boot_lpcscrypt.cmd + +TIMEOUT /T 5 + +%LPCScrypt%\lpcscrypt.exe erase SPIFI +%LPCScrypt%\lpcscrypt.exe program ..\..\..\nuttx.bin SPIFI diff --git a/configs/lpc4337-ws/scripts/flash.sh b/configs/lpc4337-ws/scripts/flash.sh new file mode 100644 index 0000000000000000000000000000000000000000..53923100f634fe18ba391954c88175fdcf7ab87b --- /dev/null +++ b/configs/lpc4337-ws/scripts/flash.sh @@ -0,0 +1,153 @@ +#!/bin/bash +#################################################################################### +# flash.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +#################################################################################### +set -x + +USAGE="$0 " + +# LPCXpresso 3.6 installed at /cygdrive/c/nxp/lpcxpresso_3.6" +BINDIR="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin" + +# RedSuite with LPC4330 support installed at /cygdrive/c/code_red/RedSuite_4.2.3_379 " +#BINDIR="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin" + +TARGET=LPC4330 + +echo "############################################################################" +echo "# Assumptions:" +echo "#" +echo "# - Windows 7" +echo "# - Binaries installed at ${BINDIR}" +echo "# - AXF image built with Code Red" +echo "# - ${TARGET}" +echo "#" +echo "# You will need to edit this is any of the above are false" +echo "#" +echo "############################################################################" +echo "" + +# This is the default install location for binaries on Windows (note that this +# path could change with the Code Red version number) + +if [ ! -d "${BINDIR}" ]; then + echo "Directory ${BINDIR} does not exist" + exit 1 +fi + +# This is the relative path to the booLPCXpresso utility. + +BOOTLPC="Scripts/bootLPCXpresso.cmd" +if [ ! -x "${BINDIR}/${BOOTLPC}" ]; then + echo "No executable at ${BINDIR}/${BOOTLPC}" + exit 1 +fi + +# bootLPCXpresso arguments + +BOOTLPC_ARG=winusb # Win7 + +# Use the LPC18xx/LPC43xx flash utility + +FLASHUTIL="crt_emu_lpc18_43_nxp" # for LPC18xx/LPC43xx parts + +if [ ! -x "${BINDIR}/${FLASHUTIL}" ]; then + echo "No executable file at ${BINDIR}/${FLASHUTIL}" + exit 1 +fi + +# FLUSHUTIL arguements + +WIRE="-wire=winusb" # for LPC-Link on Windows Vista/Windows 7) + +# The nuttx directory must be provided as an argument + +NUTTX=$1 +if [ -z "${NUTTX}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +if [ ! -d "${NUTTX}" ]; then + echo "Directory ${NUTTX} does not exist" + echo $USAGE + exit 1 +fi + +# The binary to download: + +if [ ! -f "${NUTTX}/nuttx.axf" ]; then + if [ -f "${NUTTX}/nuttx" ]; then + echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf" + mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf + fi +else + if [ -f "${NUTTX}/nuttx" ]; then + echo "Both ${NUTTX}/nuttx ${NUTTX}/nuttx.axf exist.." + echo " Deleting ${NUTTX}/nuttx.axf" + rm -f ${NUTTX}/nuttx.axf + echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf" + mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf + fi +fi +NUTTXPATH=`cygpath -w "${NUTTX}/nuttx.axf"` + +# First of all boot the LPC-Link using the script: ${BINDIR}/${BOOTLPC} + +cd ${BINDIR} || \ + { echo "Failed to CD to ${BINDIR}"; exit 1; } +./${BOOTLPC} ${BOOTLPC_ARG} || \ + { echo "'${BOOTLPC} ${BOOTLPC_ARG}' Failed"; } + +echo "" +echo "Wait a bit" +echo "5..." +sleep 1 +echo "4..." +sleep 1 +echo "3..." +sleep 1 +echo "2..." +sleep 1 +echo "1..." +sleep 1 +echo "0..." +echo "" + +# Then program the FLASH + +cd ${BINDIR} || \ + { echo "Failed to CD to ${BINDIR}"; exit 1; } +./${FLASHUTIL} ${WIRE} -p${TARGET} -flash-load-exec="${NUTTXPATH}" diff --git a/configs/lpc4337-ws/scripts/flashaconfig.ld b/configs/lpc4337-ws/scripts/flashaconfig.ld new file mode 100644 index 0000000000000000000000000000000000000000..e08c459bb816b1c49640c2c453ab3771dc1967de --- /dev/null +++ b/configs/lpc4337-ws/scripts/flashaconfig.ld @@ -0,0 +1,151 @@ +/**************************************************************************** + * configs/lpc4337-ws/scripts/flashconfig.ld + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* + * Power-Up Reset Overview + * ----------------------- + * + * The ARM core starts executing code on reset with the program counter set + * to 0x0000 0000. The LPC43xx contains a shadow pointer register that + * allows areas of memory to be mapped to address 0x0000 0000. The default, + * reset value of the shadow pointer is 0x1040 0000 so that on reset code in + * the boot ROM is always executed first. + * + * The boot starts after reset is released. The IRC is selected as CPU clock + * and the Cortex-M4 starts the boot loader. By default the JTAG access to the + * chip is disabled at reset. The boot ROM determines the boot mode based on + * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part + * boots from internal flash by default. Otherwse, the boot ROM copies the + * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow + * pointer to 0x1000 0000, and jumps to that location. + * + * However, using JTAG the executable image can be also loaded directly into + * and executed from SRAM. + */ + +/* The LPC4357 on the LPC4357-EVB has the following memory resources: + * + * SRAM: + * a. 32kB of SRAM mapped at 0x10000000 + * b. 40kB of SRAM mapped at 0x10080000 + * Internal flash: + * a. 512kB of flash (bank A) at 0x1a000000 + * b. 512kB of flash (bank B) at 0x1b000000 + * External flash: + * a. 4MB of SPIFl flash at 0x14000000 + * + * Here we assume that: + * + * 1. We will be running out of SRAM at 0x1000:0000, and + * 2. All .data and .bss will all fit into the 72KB SRAM block. + * + * NOTE: That initialized data is kept in the program memory SRAM and copied + * to .data SRAM. This is wasteful and unnecessary but provides a good test + * for future, FLASH-resident code. + */ + +MEMORY +{ + progmem (rx) : ORIGIN = 0x1A000000, LENGTH = 512K + datamem (rwx) : ORIGIN = 0x10000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ +EXTERN(_vectors) /* Force the vectors to be included in the output */ +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progmem + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progmem + + .ARM.extab : { + *(.ARM.extab*) + } > progmem + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progmem + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datamem AT > progmem + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datamem + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lpc4337-ws/scripts/ramconfig.ld b/configs/lpc4337-ws/scripts/ramconfig.ld new file mode 100644 index 0000000000000000000000000000000000000000..95580daa5bab642ae953d84b5c29e57873ffd5fe --- /dev/null +++ b/configs/lpc4337-ws/scripts/ramconfig.ld @@ -0,0 +1,150 @@ +/**************************************************************************** + * configs/lpc4337-ws/scripts/ramconfig.ld + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* + * Power-Up Reset Overview + * ----------------------- + * + * The ARM core starts executing code on reset with the program counter set + * to 0x0000 0000. The LPC43xx contains a shadow pointer register that + * allows areas of memory to be mapped to address 0x0000 0000. The default, + * reset value of the shadow pointer is 0x1040 0000 so that on reset code in + * the boot ROM is always executed first. + * + * The boot starts after reset is released. The IRC is selected as CPU clock + * and the Cortex-M4 starts the boot loader. By default the JTAG access to the + * chip is disabled at reset. The boot ROM determines the boot mode based on + * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part + * boots from internal flash by default. Otherwse, the boot ROM copies the + * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow + * pointer to 0x1000 0000, and jumps to that location. + * + * However, using JTAG the executable image can be also loaded directly into + * and executed from SRAM. + */ + +/* The LPC4330 on the LPC4330-Xplorer has the following memory resources: + * + * 1. 4096Kb of SPIFI FLASH beginning at address 0x1400:0000 + * 2. 264KB of total SRAM: + * a. 128KB of SRAM in the CPU block beginning at address 0x1000:0000 + * b. 72KB beginning at address 0x1008:0000 and + * c. 64KB of AHB SRAM in three banks beginning at addresses 0x2000:0000, + * 0x2000:8000 and 0x2000:C000. + * 3. No internal FLASH + * + * Here we assume that: + * + * 1. We will be running out of SRAM at 0x1000:0000, and + * 2. All .data and .bss will all fit into the 72KB SRAM block. + * + * NOTE: That initialized data is kept in the program memory SRAM and copied + * to .data SRAM. This is wasteful and unnecessary but provides a good test + * for future, FLASH-resident code. + */ + +MEMORY +{ + progmem (rx) : ORIGIN = 0x10000000, LENGTH = 128K + datamem (rwx) : ORIGIN = 0x10080000, LENGTH = 72K +} + +OUTPUT_ARCH(arm) +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ +EXTERN(_vectors) /* Force the vectors to be included in the output */ +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progmem + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progmem + + .ARM.extab : { + *(.ARM.extab*) + } > progmem + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progmem + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datamem AT > progmem + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datamem + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lpc4337-ws/src/.gitignore b/configs/lpc4337-ws/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/lpc4337-ws/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/lpc4337-ws/src/Makefile b/configs/lpc4337-ws/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..d99f9903c628ca31523ad67829fca0530fde739d --- /dev/null +++ b/configs/lpc4337-ws/src/Makefile @@ -0,0 +1,49 @@ +############################################################################ +# configs/lpc4337-ws/src/Makefile +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc43_boot.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc43_appinit.c +endif + +ifeq ($(CONFIG_LPC43_ADC0),y) +CSRCS += lpc43_adc.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/lpc4337-ws/src/lpc4337-ws.h b/configs/lpc4337-ws/src/lpc4337-ws.h new file mode 100644 index 0000000000000000000000000000000000000000..7c31fe745be40ff22e22a2bfe3d902d9ad94b20d --- /dev/null +++ b/configs/lpc4337-ws/src/lpc4337-ws.h @@ -0,0 +1,72 @@ +/**************************************************************************** + * configs/lpc4337-ws/src/lpc4337-ws.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef _CONFIGS_LPC4337_WS_SRC_LPC4337_WS_H +#define _CONFIGS_LPC4337_WS_SRC_LPC4337_WS_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "lpc43_pinconfig.h" +#include "lpc43_gpio.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Do we need to register I2C drivers on behalf of the I2C tool? */ + +#define HAVE_I2CTOOL 1 +#if !defined(CONFIG_SYSTEM_I2CTOOL) || !defined(CONFIG_I2C_DRIVER) +# undef HAVE_I2CTOOL +#endif + +/**************************************************************************** + * Public data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* __ASSEMBLY__ */ +#endif + diff --git a/configs/lpc4337-ws/src/lpc43_adc.c b/configs/lpc4337-ws/src/lpc43_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..0bb398369aa9a8a0dad61218fea182289e9cd456 --- /dev/null +++ b/configs/lpc4337-ws/src/lpc43_adc.c @@ -0,0 +1,110 @@ +/************************************************************************************ + * configs/lpc4337-ws/src/lpc43_adc.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Kannan + * + * Based on configs/stm3220g-eval/src/lpc43_adc.c + * + * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "lpc43_adc.h" + +#if defined(CONFIG_LPC43_ADC0) || defined(CONFIG_LPC43_ADC1) + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All LPC43 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call lpc43_adcinitialize() to get an instance of the ADC interface */ + + adc = lpc43_adcinitialize(); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_ADC */ diff --git a/configs/lpc4337-ws/src/lpc43_appinit.c b/configs/lpc4337-ws/src/lpc43_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..83b8cddc1e98b1aaac50f51b061ef35679a04e07 --- /dev/null +++ b/configs/lpc4337-ws/src/lpc43_appinit.c @@ -0,0 +1,127 @@ +/**************************************************************************** + * configs/lpc4337-ws/src/lpc43_appinit.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "lpc43_i2c.h" +#include "chip.h" + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc43_i2c_register + * + * Description: + * Register one I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void lpc43_i2c_register(int bus) +{ + FAR struct i2c_master_s *i2c; + int ret; + + i2c = lpc43_i2cbus_initialize(bus); + if (i2c == NULL) + { + dbg("ERROR: Failed to get I2C%d interface\n", bus); + } + else + { + ret = i2c_register(i2c, bus); + if (ret < 0) + { + dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); + lpc43_i2cbus_uninitialize(i2c); + } + } +} +#endif + +/**************************************************************************** + * Name: lpc43_i2ctool + * + * Description: + * Register I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void lpc43_i2ctool(void) +{ +#ifdef CONFIG_LPC43_I2C0 + lpc43_i2c_register(0); +#endif +#ifdef CONFIG_STM32_I2C1 + lpc43_i2c_register(1); +#endif +} +#else +# define lpc43_i2ctool() +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + /* Register I2C drivers on behalf of the I2C tool */ + + lpc43_i2ctool(); + return OK; +} diff --git a/configs/lpc4337-ws/src/lpc43_boot.c b/configs/lpc4337-ws/src/lpc43_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..ce43b2eacf664543d51ef214cceade8babaec888 --- /dev/null +++ b/configs/lpc4337-ws/src/lpc43_boot.c @@ -0,0 +1,68 @@ +/************************************************************************************ + * configs/lpc4337-ws/src/lpc43_boot.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc4337-ws.h" + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc43_boardinitialize + * + * Description: + * All LPC43xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc43_boardinitialize(void) +{ +} diff --git a/configs/lpc4357-evb/Kconfig b/configs/lpc4357-evb/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..b4a0c84cd1387ef5066c8e4ed034aff0c2601cc2 --- /dev/null +++ b/configs/lpc4357-evb/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_LPC4357_EVB +endif diff --git a/configs/lpc4357-evb/README.txt b/configs/lpc4357-evb/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..db2c2611d2fca32e099fcdd1d83a48947b2b318a --- /dev/null +++ b/configs/lpc4357-evb/README.txt @@ -0,0 +1,1010 @@ +README +====== + +README for NuttX port to the LPC4357-EVB board from Embest featuring the NXP +LPC4357FET256 MCU - The port was derived from the LPC4357-EVB board NuttX +port. + +Contents +======== + + - LPC4357-EVB development board + - Status + - Development Environment + - GNU Toolchain Options + - IDEs + - Code Red IDE/Tools + Booting the LPCLink + Using GDB + Troubleshooting + Command Line Flash Programming + Executing from SPIFI + USB DFU Booting + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - LED and Pushbuttons + - Serial Console + - FPU + - LPC4357-EVB Configuration Options + - Configurations + - STATUS + +LPC4357-EVB board +================= + + Memory Map + ---------- + + Block Start Length + Name Address + --------------------- ---------- ------ + RAM 0x10000000 32K + RAM2 0x10080000 40K + SPIFI flash 0x14000000 4096K + FlashA 0x1a000000 512k + FlashB 0x1b000000 512k + + Console + ------- + + The LPC4357-EVB default console is the USART0. + +Status +====== + + This is the current status of the LPC43xx port: + + - The basic OS test configuration and the basic NSH configurations + are present and fully verified. This includes: SYSTICK system time, + pin and GPIO configuration, and serial console support. A SPIFI + MTD driver is also in place but requires further verification. + + - The following drivers have been copied from the LPC17xx port, but + require integration into the LPC43xx. This integration should + consist of: + + - Remove LPC17xx power, clocking, and pin configuration logic. + - Adding of clock source and frequency to the board.h file. + - Adding of LPC43 clock connection and pin configuration logic. + + Within any luck, these drivers should come up very quickly: + + - lpc43_adc.c, + - lpc43_dac.c, + - lpc43_gpdma.c, + - lpc43_i2c.c, + - lpc43_spi.c, and + - lpc43_ssp.c + + These LPC17xx drivers were not brought into the LPC43xx port because + it appears the these peripherals have been completely redesigned: + + - CAN, + - Ethernet, + - USB device, and + - USB host. + + The following LPC43xx peripherals are unsupported. Some may be + compatible with the LPC17xx, but there is no LPC17xx driver to be + ported: + + - SD/MMC, + - EMC, + - USB0, + - USB1, + - Ethernet, + - LCD, + - SCT, + - Timers 0-3 + - MCPWM, + - QEI, + - Alarm timer, + - WWDT, + - RTC, + - Event monitor, and + - CAN, + + For the missing drivers some of these can be leveraged from other + MCUs that appear to support the same peripheral IP. + + - USB0 appears to be the same as the USB OTG peripheral for the + LPC31xx. It should be possible to drop in the LPC31xx driver + with a small porting effort. + + - The Ethernet block looks to be based on the same IP as the + STM32 Ethernet and, as a result, it should be possible to leverage + the STM32 Ethernet driver with a little more effort. + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +===================== + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The Code Red GNU toolchain, + 2. The CodeSourcery GNU toolchain, + 3. The Atollic Toolchain, + 4. The devkitARM GNU toolchain, + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery or devkitARM toolchain, you simply need add one of the + following configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red "RedSuite" under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the Code Red, CodeSourcery (for Windows), Atollic and devkitARM toolchains + are Windows native toolchains. The CodeSourcery (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project . + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lpc43xx, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/common/up_vectors.S. + +Code Red IDE/Tools +^^^^^^^^^^^^^^^^^^ + + Booting the LPCLink + ------------------- + + The first step is to activate the LPCLink's boot mode. Some general + instructions to do this are provided here: + + http://support.code-red-tech.com/CodeRedWiki/BootingLPCLink + + For my RedSuite installation path, that can be done using the following + steps in a Cygwin bash shell: + + $ /cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin/Scripts/bootLPCXpresso.cmd winusb + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + The same file logic can be found the less restrictive LPCXpresso package at: + + /cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin + + (The "free" RedSuite version has a download limit of 8K; the "free" LPCXpresso + version has a download limit of 128K). + + NOTE that the following alias is defined in the setenv.sh file and + can be used to enter the boot mode with a simpler command: + + alias lpc43xx='${SCRIPT_BIN}/Scripts/bootLPCXpresso.cmd winusb' + + Be default, the setenv.sh scripts uses the LPCXpresso path shown above. + Once setenv.sh has been sources, then entering boot mode becomes simply: + + $ lpc43xx + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + Using GDB + --------- + + The underlying debugger within Red Suite/LPCXpresso is GDB. That GDB + used from the command line. The GDB configuration details for command + line use are on Code Red Wiki: + + http://support.code-red-tech.com/CodeRedWiki/UsingGDB + + and is also summarized here (see the full Wiki for additional details + and options). + + The Code Red Debug Driver implements the GDB "remote" protocol to allow + connection to debug targets. To start a debug session using GDB, use + following steps: + + arm-none-eabi-gdb executable.axf : Start GDB and name the debug image + target extended-remote | : Start debug driver, connect to target + load : Load image and download to target + + The where is crt_emu_lpc18_43_nxp for LPC18xx and LPC43xx. + Your PATH variable should be set up so that the debug driver executable + can be found. For my installation, the driver for the LPC18xx and LPC43xx + is located at: + + /cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin/crt_emu_lpc18_43_nxp.exe, OR + /cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin/crt_emu_lpc18_43_nxp.exe + + And are: + + -n set information level for the debug driver. n should be 2, 3 or 4. + 2 should be sufficient in most circumstances + + -p is the target device to connect to and you should use + =LPC4357. + + -wire= specifies the debug probe. For LPCLink on Windows 7 use + =winusb. The 128K free version only supports the LPC-Link + and RedProbe debug probes. Other JTAG interfaces are supported in + the full version. + + Thus the correct invocation for the LPC4357 under Windows7 would be: + + target extended-remote | crt_emu_lpc18_43_nxp -2 -pLPC4357 -wire=winusb + + DDD. This command can be used to start GDB under the graphics front-end + DDD: + + $ ddd --debugger arm-none-eabi-gdb nuttx & + + NOTE 1: Don't forget to put the LPCLink in boot mode as described above + before starting GDB. So a typical session might look like this: + + $ lpc43xx + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + $ arm-none-eabi-gdb nuttx + (gdb) target extended-remote | crt_emu_lpc18_43_nxp -2 -pLPC4357 -wire=winusb + (gdb) load + (gdb) r + (gdb) c + + NOTE 2: Don't forget to enable CONFIG_DEBUG_SYMBOLS=y in your NuttX + configuration file when you build NuttX. That option is necessary to build + in debugging symbols. + + NOTE 3: There are few things that NuttX has to do differently if you + are using a debugger. Make sure that you also set CONFIG_DEBUG=y. Nothing + also is needed and no debug output will be generated; but NuttX will + use CONFIG_DEBUG=y to mean that a debugger is attached and will deal + with certain resets and debug controls appropriately. + + So you should have: + + CONFIG_DEBUG=y + CONFIG_DEBUG_SYMBOLS=y + + NOTE 4: Every time that you control-C out of the command line GDB, you + leave a copy of the Code Red debugger (crt_emu_lpc18_43_nxp) running. I + have found that if you have these old copies of the debugger running, + hen strange things can happen when start yet another copy of the + debugger (I suspect that GDB may be talking with the wrong debugger). + + If you exit GDB with quit (not control-C), it seems to clean-up okay. + But I have taken to keeping a Process Explorer window open all of the + time to keep track of how many of these bad processes have been created. + + NOTE 5: There is also a certain function that is causing some problems. + The very first thing that the start-up logic does is call a function + called lpc43_softreset() which resets most of the peripherals. But it + also causes some crashes... I think because the resets are causing some + interrupts. + + I put a big delay in the soft reset logic between resetting and clearing + pending interrupts and that seems to help some but I am not confident + that that is a fix. I think that the real fix might be to just eliminated + this lpc43_softreset() function if we determine that it is not needed. + + If you step over lpc43_softreset() after loading the coding (using the 'n' + command), then everything seems work okay. + + Troubleshooting + --------------- + + This page provides some troubleshooting information that you can use to + verify that the LPCLink is working correctly: + + http://support.code-red-tech.com/CodeRedWiki/LPCLinkDiagnostics + + Command Line Flash Programming + ------------------------------ + + The LPC18xx/LPC43xx debug driver can also be used to program the LPC43xx + flash directly from the command line. The script flash.sh that may be + found in the configs/lpc4357-evb/scripts directory can do that with + a single command line command. + + Executing from SPIFI + -------------------- + + By default, the configurations here assume that you are executing directly + from SRAM. + + CONFIG_LPC43_BOOT_SRAM=y : Executing in SRAM + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red under Windows + + To execute from SPIFI, you would need to set: + + CONFIG_LPC43_BOOT_SPIFI=y : Executing from SPIFI + CONFIG_RAM_SIZE=(128*1024) : SRAM Bank0 size + CONFIG_RAM_START=0x10000000 : SRAM Bank0 base address + CONFIG_SPIFI_OFFSET=(512*1024) : SPIFI file system offset + + To boot the LPC4357-EVB from SPIFI the DIP switches should be 1-OFF, + 2-ON, 3-ON, 4-ON (LOW LOW LOW HIGH in Table 19, MSB to LSB). + + If the code in flash hard faults after reset and crt_emu_lpc18_43_nxp + can't reset the MCU, an alternative is to temporarily change switch 1 + to ON and press the reset button so it enters UART boot mode. Then + change it back to OFF and reset to boot again from flash. + + # Use -wire to specify the debug probe in use: + # (empty) Red Probe+ + # -wire=winusb LPC-Link on Windows XP + # -wire=hid LPC-Link on Windows Vista/ Windows 7 + # Add -g -4 for verbose output + + crt_emu_lpc18_43_nxp -wire=hid -pLPC4357 -load-base=0x14000000 + -flash-load-exec=nuttx.bin -flash-driver=LPC1850A_4350A_SPIFI.cfx + + USB DFU Booting + --------------- + + To be provided. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpc4357-xplorer/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LED and Pushbuttons +=================== + + LED + --- + The LPC4357-EVB has one user-controllable LED labelled D6 controlled + by the signal LED_3V3: + + LED SIGNAL MCU + D6 LED_3V3 PE_& GPIO7[7] + + A low output illuminates the LED. + + If CONFIG_ARCH_LEDS is defined, the LED will be controlled as follows + for NuttX debug functionality (where NC means "No Change"). + + -------------------------- --------- + LED + -------------------------- --------- + LED_STARTED OFF + LED_HEAPALLOCATE OFF + LED_IRQSENABLED OFF + LED_STACKCREATED ON + LED_INIRQ NC + LED_SIGNAL NC + LED_ASSERTION NC + LED_PANIC Flashing + -------------------------- --------- + + If CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under + control of the application. The following interfaces are then available + for application control of the LEDs: + + void board_userled_initialize(void); + void board_userled(int led, bool ledon); + void board_userled_all(uint8_t ledset); + + Pushbuttons + ----------- + To be provided + +Serial Console +============== + +The LPC4357-EVB does not have RS-232 drivers or serial connectors on board. +USART, USART2 and USART3 are available on J12 as follows: + + ------ ------ ----------------------- + SIGNAL J12 PIN LPC4357FET256 PIN + (TFBGA256 package) + ------ ------ ----------------------- + U0_TXD pin 3 F6 P9_5 U0_TXD=Alt 4 + U0_RXD pin 4 F9 P9_6 U0_RXD=Alt 4 + U2_TXD pin 5 H8 P1_13 U1_TXD=Alt 1 + U2_RXD pin 6 J8 P1_14 U1_RXD=Alt 1 + U3_TXD pin 7 H8 P1_13 U1_TXD=Alt 1 + U3_RXD pin 8 J8 P1_14 U1_RXD=Alt 1 + ------ ------ ----------------------- + + GND is available on J12 pins 29 and 30 + 5V is available on J12 pin 2 + 3.3v id available on J12 pin 1 + +FPU +=== + +FPU Configuration Options +------------------------- + +There are two version of the FPU support built into the most NuttX Cortex-M4 +ports. The current LPC43xx port support only one of these options, the "Non- +Lazy Floating Point Register Save". As a consequence, CONFIG_ARMV7M_CMNVECTOR +must be defined in *all* LPC43xx configuration files. + +1. Lazy Floating Point Register Save. + + This is an untested implementation that saves and restores FPU registers + only on context switches. This means: (1) floating point registers are + not stored on each context switch and, hence, possibly better interrupt + performance. But, (2) since floating point registers are not saved, + you cannot use floating point operations within interrupt handlers. + + This logic can be enabled by simply adding the following to your .config + file: + + CONFIG_ARCH_FPU=y + +2. Non-Lazy Floating Point Register Save + + Mike Smith has contributed an extensive re-write of the ARMv7-M exception + handling logic. This includes verified support for the FPU. These changes + have not yet been incorporated into the mainline and are still considered + experimental. These FPU logic can be enabled with: + + CONFIG_ARCH_FPU=y + CONFIG_ARMV7M_CMNVECTOR=y + + You will probably also changes to the ld.script in if this option is selected. + This should work: + + -ENTRY(_stext) + +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ + +EXTERN(_vectors) /* Force the vectors to be included in the output */ + +CFLAGS +------ + +Only the recent toolchains have built-in support for the Cortex-M4 FPU. You will see +the following lines in each Make.defs file: + + ifeq ($(CONFIG_ARCH_FPU),y) + ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard + else + ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + endif + +Configuration Changes +--------------------- + +Below are all of the configuration changes that I had to make to configs/stm3240g-eval/nsh2 +in order to successfully build NuttX using the Atollic toolchain WITH FPU support: + + -CONFIG_ARCH_FPU=n : Enable FPU support + +CONFIG_ARCH_FPU=y + + -CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : Disable the CodeSourcery toolchain + +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n + + -CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=n : Enable the Atollic toolchains + +CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : + + -CONFIG_INTELHEX_BINARY=y : Suppress generation FLASH download formats + +CONFIG_INTELHEX_BINARY=n : (Only necessary with the "Lite" version) + + -CONFIG_HAVE_CXX=y : Suppress generation of C++ code + +CONFIG_HAVE_CXX=n : (Only necessary with the "Lite" version) + +See the section above on Toolchains, NOTE 2, for explanations for some of +the configuration settings. Some of the usual settings are just not supported +by the "Lite" version of the Atollic toolchain. + +LPC4357-EVB Configuration Options +===================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc43xx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LPC4357=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=lpc4357-evb (for the LPC4357-EVB board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_LPC4357EVB=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x10000000 + + CONFIG_ARCH_FPU - The LPC43xxx supports a floating point unit (FPU) + + CONFIG_ARCH_FPU=y + + CONFIG_LPC43_BOOT_xxx - The startup code needs to know if the code is running + from internal FLASH, external FLASH, SPIFI, or SRAM in order to + initialize properly. Note that a boot device is not specified for + cases where the code is copied into SRAM; those cases are all covered + by CONFIG_LPC43_BOOT_SRAM. + + CONFIG_LPC43_BOOT_SRAM=y : Running from SRAM (0x1000:0000) + CONFIG_LPC43_BOOT_SPIFI=y : Running from QuadFLASH (0x1400:0000) + CONFIG_LPC43_BOOT_FLASHA=y : Running in internal FLASHA (0x1a00:0000) + CONFIG_LPC43_BOOT_FLASHB=y : Running in internal FLASHA (0x1b00:0000) + CONFIG_LPC43_BOOT_CS0FLASH=y : Running in external FLASH CS0 (0x1c00:0000) + CONFIG_LPC43_BOOT_CS1FLASH=y : Running in external FLASH CS1 (0x1d00:0000) + CONFIG_LPC43_BOOT_CS2FLASH=y : Running in external FLASH CS2 (0x1e00:0000) + CONFIG_LPC43_BOOT_CS3FLASH=y : Running in external FLASH CS3 (0x1f00:0000) + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_LPC43_ADC0=y + CONFIG_LPC43_ADC1=y + CONFIG_LPC43_ATIMER=y + CONFIG_LPC43_CAN1=y + CONFIG_LPC43_CAN2=y + CONFIG_LPC43_DAC=y + CONFIG_LPC43_EMC=y + CONFIG_LPC43_ETHERNET=y + CONFIG_LPC43_EVNTMNTR=y + CONFIG_LPC43_GPDMA=y + CONFIG_LPC43_I2C0=y + CONFIG_LPC43_I2C1=y + CONFIG_LPC43_I2S0=y + CONFIG_LPC43_I2S1=y + CONFIG_LPC43_LCD=y + CONFIG_LPC43_MCPWM=y + CONFIG_LPC43_QEI=y + CONFIG_LPC43_RIT=y + CONFIG_LPC43_RTC=y + CONFIG_LPC43_SCT=y + CONFIG_LPC43_SDMMC=y + CONFIG_LPC43_SPI=y + CONFIG_LPC43_SPIFI=y + CONFIG_LPC43_SSP0=y + CONFIG_LPC43_SSP1=y + CONFIG_LPC43_TMR0=y + CONFIG_LPC43_TMR1=y + CONFIG_LPC43_TMR2=y + CONFIG_LPC43_TMR3=y + CONFIG_LPC43_USART0=y + CONFIG_LPC43_UART1=y + CONFIG_LPC43_USART2=y + CONFIG_LPC43_USART3=y + CONFIG_LPC43_USB0=y + CONFIG_LPC43_USB1=y + CONFIG_LPC43_USB1_ULPI=y + CONFIG_LPC43_WWDT=y + + LPC43xx specific U[S]ART device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the USART0). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + CONFIG_USARTn_RS485MODE - Support LPC43xx USART0,2,3 RS485 mode + ioctls (TIOCSRS485 and TIOCGRS485) to enable and disable + RS-485 mode. + + LPC43xx specific CAN device driver settings. These settings all + require CONFIG_CAN: + + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN2 is defined. + CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7 + + LPC43xx specific PHY/Ethernet device driver settings. These setting + also require CONFIG_NET and CONFIG_LPC43_ETHERNET. + + CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY + CONFIG_PHY_AUTONEG - Enable auto-negotion + CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. + CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex + + CONFIG_NET_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb + CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 18 + CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18 + CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented). + CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs + CONFIG_DEBUG. + CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets. + Also needs CONFIG_DEBUG. + CONFIG_NET_HASH - Enable receipt of near-perfect match frames. + + LPC43xx USB Device Configuration + + CONFIG_LPC43_USBDEV_FRAME_INTERRUPT + Handle USB Start-Of-Frame events. + Enable reading SOF from interrupt handler vs. simply reading on demand. + Probably a bad idea... Unless there is some issue with sampling the SOF + from hardware asynchronously. + CONFIG_LPC43_USBDEV_EPFAST_INTERRUPT + Enable high priority interrupts. I have no idea why you might want to + do that + CONFIG_LPC43_USBDEV_NDMADESCRIPTORS + Number of DMA descriptors to allocate in SRAM. + CONFIG_LPC43_USBDEV_DMA + Enable lpc17xx-specific DMA support + CONFIG_LPC43_USBDEV_NOVBUS + Define if the hardware implementation does not support the VBUS signal + CONFIG_LPC43_USBDEV_NOLED + Define if the hardware implementation does not support the LED output + + LPC43xx USB Host Configuration + + CONFIG_USBHOST_OHCIRAM_SIZE + Total size of OHCI RAM (in AHB SRAM Bank 1) + CONFIG_USBHOST_NEDS + Number of endpoint descriptors + CONFIG_USBHOST_NTDS + Number of transfer descriptors + CONFIG_USBHOST_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_USBHOST_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_IOBUFSIZE + Size of one end-user I/O buffer. This can be zero if the + application can guarantee that all end-user I/O buffers + reside in AHB SRAM. + +Configurations +============== + +Each LPC4357-EVB configuration is maintained in a sub-directory and can be selected +as follow: + + cd tools + ./configure.sh lpc4357-evb/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + ---- + This configuration is the NuttShell (NSH) example at examples/nsh/. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. The project can exucute directly from SRAM with NuttX loaded by a debugger + by setting the following configuration options. + + CONFIG_LPC43_BOOT_SRAM=y : Executing in SRAM + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red under Windows + + 3. To execute from SPIFI, you would need to set: + + CONFIG_LPC43_BOOT_SPIFI=y : Executing from SPIFI + CONFIG_RAM_SIZE=(128*1024) : SRAM Bank0 size + CONFIG_RAM_START=0x10000000 : SRAM Bank0 base address + CONFIG_SPIFI_OFFSET=(512*1024) : SPIFI file system offset + + CONFIG_MM_REGIONS should also be increased if you want to other SRAM banks + to the memory pool. + + 4. This configuration an also be used create a block device on the SPIFI + FLASH. CONFIG_LPC43_SPIFI=y must also be defined to enable SPIFI setup + support: + + SPIFI device geometry: + + CONFIG_SPIFI_OFFSET - Offset the beginning of the block driver this many + bytes into the device address space. This offset must be an exact + multiple of the erase block size (CONFIG_SPIFI_BLKSIZE). Default 0. + CONFIG_SPIFI_BLKSIZE - The size of one device erase block. If not defined + then the driver will try to determine the correct erase block size by + examining that data returned from spifi_initialize (which sometimes + seems bad). + + Other SPIFI options + + CONFIG_SPIFI_SECTOR512 - If defined, then the driver will report a more + FAT friendly 512 byte sector size and will manage the read-modify-write + operations on the larger erase block. + CONFIG_SPIFI_READONLY - Define to support only read-only operations. + CONFIG_SPIFI_LIBRARY - Don't use the LPC43xx ROM routines but, instead, + use an external library implementation of the SPIFI interface. + CONFIG_SPIFI_VERIFY - Verify all spifi_program() operations by reading + from the SPI address space after each write. + CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers. You + probably do not want to enable this unless you want to dig through a + *lot* of debug output! Also required CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, + and CONFIG_DEBUG_FS, + + 5. In my experience, there were some missing function pointers in the LPC43xx + SPIFI ROM routines and the SPIFI configuration could only be built with + CONFIG_SPIFI_LIBRARY=y. The SPIFI library is proprietary and cannot be + provided within NuttX open source repository; SPIFI library binaries can + be found on the lpcware.com website. In this build sceneario, you must + also provide the patch to the external SPIFI library be defining the make + variable EXTRA_LIBS in the top-level Make.defs file. Good luck! + + 6. By default the LPC4357-EVB port is configured to run from the onboard flash + bank A at 0x1a000000. In order to achieve this, the resulting NuttX binary + will need to have a checksum computed over the vector table and then be + converted to a hex file which can then be flashed using a debugger such as + the ULINK2 through Keil. + + The checksum can be computed using the checksum binary provided with the + LPCXpresso IDE software suite as follows: + + ./checksum nuttx.bin -p LPC4357 -v + + This will modify the binary file, appending the checksum to the correct place + at the end of the vector table. + + The binary must now be converted to a hex file, which can be achieved using + the srec_cat utility, which is part of the SRecord package (srecord.sourceforge.net) + as follows: + + srec_cat nuttx.bin -binary -offset 0x1a000000 -o nuttx.hex -intel --line-length=44 + + Now the hex file can be loaded using a debugger, and the code will execute from + flash. + +STATUS +====== + + 1. This configuration derives from the LPC4330 Xplorer configuration. In + many cases there have been global substitutions for naming to the + LPC4357 EVB without corresponding updates to the technical description. + Thus all technical details should be taken with a grain of salt. GPIO + definitions may actually are remnants of the LPC4330-Xplorer that still + need clean-up. + diff --git a/configs/lpc4357-evb/include/board.h b/configs/lpc4357-evb/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..a1667e66dae90c4e3e8c255f54c4a7d255ad93cd --- /dev/null +++ b/configs/lpc4357-evb/include/board.h @@ -0,0 +1,330 @@ +/**************************************************************************** + * configs/lpc4357-evb/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef _CONFIGS_LPC4357_EVB_INCLUDE_BOARD_H +#define _CONFIGS_LPC4357_EVB_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking ****************************************************************/ +/* NOTE: The following definitions require lpc43_cgu.h. It is not included + * here because the including C file may not have that file in its include + * path. + * + * The Xplorer board has four crystals on board: + * + * Y1 - RTC 32.768 MHz oscillator input, + * Y2 - 24.576 MHz input to the UDA 1380 audio codec, + * Y3 - 12.000 MHz LPC43xx crystal oscillator input + * Y4 - 50 MHz input for Ethernet + */ + +#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency (Y3) */ +#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency (Y1) */ +#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */ + +/* Integer and direct modes are supported: + * + * In integer mode (Fclkout < 156000000): + * Fclkin = BOARD_XTAL_FREQUENCY + * Fclkout = Msel * FClkin / Nsel + * Fcco = 2 * Psel * Fclkout + * In direct mode (Fclkout > 156000000): + * Fclkin = BOARD_XTAL_FREQUENCY + * Fclkout = Msel * FClkin / Nsel + * Fcco = Fclkout + */ + +#ifdef CONFIG_LPC43_72MHz + +/* NOTE: At 72MHz, the calibrated value of CONFIG_BOARD_LOOPSPERMSEC was + * determined to be: + * + * CONFIG_BOARD_LOOPSPERMSEC=7191 + * + * executing from SRAM. + */ + +/* Final clocking (Integer mode with no ramp-up) + * + * Fclkout = 6 * 12MHz / 1 = 72MHz + * Fcco = 2 * 2 * 72MHz = 216MHz + */ + +# define BOARD_PLL_MSEL (6) /* Msel = 6 */ +# define BOARD_PLL_NSEL (1) /* Nsel = 1 */ +# define BOARD_PLL_PSEL (2) /* Psel = 2 */ + +# define BOARD_FCLKOUT_FREQUENCY (72000000) /* 6 * 12,000,000 / 1 */ +# define BOARD_FCCO_FREQUENCY (244000000) /* 2 * 2 * Fclkout */ + +#else + +/* NOTE: At 72MHz, the calibrated value of CONFIG_BOARD_LOOPSPERMSEC was + * determined to be: + * + * CONFIG_BOARD_LOOPSPERMSEC=18535 + * + * executing from SRAM. + */ + +/* Intermediate ramp-up clocking (Integer mode). If BOARD_PLL_RAMP_MSEL + * is not defined, there will be no ramp-up. + * + * Fclkout = 9 * 12MHz / 1 = 108MHz + * Fcco = 2 * 1 * 108MHz = 216MHz + */ + +# define BOARD_PLL_RAMP_MSEL (9) /* Msel = 9 */ +# define BOARD_PLL_RAMP_NSEL (1) /* Nsel = 1 */ +# define BOARD_PLL_RAMP_PSEL (1) /* Psel = 1 */ + +# define BOARD_RAMP_FCLKOUT (108000000) /* 9 * 12,000,000 / 1 */ +# define BOARD_RAMP_FCCO (216000000) /* 2 * 1 * Fclkout */ + +/* Final clocking (Direct mode). + * + * Fclkout = 17 * 12MHz / 1 = 204MHz + * Fcco = Fclockout = 204MHz + */ + +# define BOARD_PLL_MSEL (17) /* Msel = 17 */ +# define BOARD_PLL_NSEL (1) /* Nsel = 1 */ + +# define BOARD_FCLKOUT_FREQUENCY (204000000) /* 17 * 12,000,000 / 1 */ +# define BOARD_FCCO_FREQUENCY (204000000) /* Fclockout */ + +#endif + +/* This is the clock setup we configure for: + * + * SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1 + * CCLCK = 480MHz / 6 = 80MHz -> CCLK divider = 6 + */ + +#define LPC43_CCLK BOARD_FCLKOUT_FREQUENCY + +/* USB0 ********************************************************************/ +/* Settings needed in lpc43_cpu.c */ + +#define BOARD_USB0_CLKSRC PLL0USB_CLKSEL_XTAL +#define BOARD_USB0_MDIV 0x06167ffa /* Table 149 datsheet, valid for 12Mhz Fclkin */ +#define BOARD_USB0_NP_DIV 0x00302062 /* Table 149 datsheet, valid for 12Mhz Fclkin */ + +/* SPIFI clocking **********************************************************/ +/* The SPIFI will receive clocking from a divider per the settings provided + * in this file. The NuttX code will configure PLL1 as the input clock + * for the selected divider + */ + +#undef BOARD_SPIFI_PLL1 /* No division */ +#undef BOARD_SPIFI_DIVA /* Supports division by 1-4 */ +#undef BOARD_SPIFI_DIVB /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVC /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVD /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVE /* Supports division by 1-256 */ + +#if BOARD_FCLKOUT_FREQUENCY < 20000000 +# define BOARD_SPIFI_PLL1 1 /* Use PLL1 directly */ +#else +# define BOARD_SPIFI_DIVB 1 /* Use IDIVB */ +#endif + + +/* We need to configure the divider so that its output is as close to the + * desired SCLK value. The peak data transfer rate will be about half of + * this frequency in bytes per second. + */ + +#if BOARD_FCLKOUT_FREQUENCY < 20000000 +# define BOARD_SPIFI_FREQUENCY BOARD_FCLKOUT_FREQUENCY /* 72Mhz? */ +#else +# define BOARD_SPIFI_DIVIDER (14) /* 204MHz / 14 = 14.57MHz */ +# define BOARD_SPIFI_FREQUENCY (102000000) /* 204MHz / 14 = 14.57MHz */ +#endif + +/* UART clocking ***********************************************************/ +/* Configure all U[S]ARTs to use the XTAL input frequency */ + +#define BOARD_USART0_CLKSRC BASE_USART0_CLKSEL_XTAL +#define BOARD_USART0_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_UART1_CLKSRC BASE_UART1_CLKSEL_XTAL +#define BOARD_UART1_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_USART2_CLKSRC BASE_USART2_CLKSEL_XTAL +#define BOARD_USART2_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_USART3_CLKSRC BASE_USART3_CLKSEL_XTAL +#define BOARD_USART3_BASEFREQ BOARD_XTAL_FREQUENCY + +/* LED definitions *********************************************************/ +/* The LPC4357-EVB has one user-controllable LED labelled D6 controlled + * by the signal LED_3V3: + * + * ---- ------- ------------- + * LED SIGNAL MCU + * ---- ------- ------------- + * D6 LED_3V3 PE_7 GPIO7[7] + * ---- ------- ------------- + * + * A low output illuminates the LED. + * + * LED index values for use with board_userled() + */ + +#define BOARD_LED 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED _BIT (1 << BOARD_LED) + +/* If CONFIG_ARCH_LEDS is defined, the LED will be controlled as follows + * for NuttX debug functionality (where NC means "No Change"). + */ + /* LED */ +#define LED_STARTED 0 /* OFF */ +#define LED_HEAPALLOCATE 0 /* OFF */ +#define LED_IRQSENABLED 0 /* OFF */ +#define LED_STACKCREATED 1 /* ON */ +#define LED_INIRQ 2 /* NC */ +#define LED_SIGNAL 2 /* NC */ +#define LED_ASSERTION 2 /* NC */ +#define LED_PANIC 3 /* Flashing */ + +/* If CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under + * control of the application. The following interfaces are then available + * for application control of the LEDs: + * + * void board_userled_initialize(void); + * void board_userled(int led, bool ledon); + * void board_userled_all(uint8_t ledset); + */ + +/* Button definitions *******************************************************/ +/* To be provided */ + +/* UART Pins ****************************************************************/ +/* REVISIT: Thee are most likely left over from the LPC4330-Xplorer */ +/* The LPC4357-EVB does not have RS-232 drivers or serial connectors on + * board. USART0 and UART1 are available on J8 as follows: + * + * ------ ------ ----------------------- + * SIGNAL J8 PIN LPC4357FET256 PIN + * (TFBGA100 package) + * ------ ------ ----------------------- + * U0_TXD pin 9 F6 P6_4 U0_TXD=Alt 2 + * U0_RXD pin 10 F9 P6_5 U0_RXD=Alt 2 + * U1_TXD pin 13 H8 P1_13 U1_TXD=Alt 1 + * U1_RXD pin 14 J8 P1_14 U1_RXD=Alt 1 + * ------ ------ ----------------------- + * + * The following definitions must be provided so that the LPC43 serial + * driver can set up the U[S]ART for the serial console properly (see the + * file arch/arc/src/lpc43xx/lpc4310203050_pinconf.h for more info). + */ + +#define PINCONF_U0_TXD PINCONF_U0_TXD_4 +#define PINCONF_U0_RXD PINCONF_U0_RXD_4 +#define PINCONF_U0_DIR PINCONF_U0_DIR_3 + +#define PINCONF_U1_TXD PINCONF_U1_TXD_1 +#define PINCONF_U1_RXD PINCONF_U1_RXD_1 + +#define PINCONF_U2_TXD PINCONF_U2_TXD_3 +#define PINCONF_U2_RXD PINCONF_U2_RXD_3 +#define PINCONF_U2_DIR PINCONF_U2_DIR_2 + +#define PINCONF_U3_TXD PINCONF_U3_TXD_4 +#define PINCONF_U3_RXD PINCONF_U3_RXD_4 +#define PINCONF_U3_DIR PINCONF_U3_DIR_3 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc43_boardinitialize + * + * Description: + * All LPC43xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ****************************************************************************/ + +void lpc43_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_LPC4357_EVB_INCLUDE_BOARD_H */ diff --git a/configs/lpc4357-evb/nsh/Make.defs b/configs/lpc4357-evb/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..544476cdd10b6a6904430fc8f08bf1880a0cd021 --- /dev/null +++ b/configs/lpc4357-evb/nsh/Make.defs @@ -0,0 +1,131 @@ +############################################################################ +# configs/lpc4357-evb/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +# Setup for the kind of memory that we are executing from + +ifeq ($(CONFIG_LPC43_BOOT_SRAM),y) + LDSCRIPT = ramconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_SPIFI),y) + LDSCRIPT = spificonfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_FLASHA),y) + LDSCRIPT = flashaconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_FLASHB),y) + LDSCRIPT = flashaconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_CS0FLASH),y) + LDSCRIPT = cs0flash.ld +endif + +# Setup for Windows vs Linux/Cygwin/OSX environments + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lpc4357-evb/nsh/defconfig b/configs/lpc4357-evb/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..68050c94d6d95071a410ff616ff17f0db97067b1 --- /dev/null +++ b/configs/lpc4357-evb/nsh/defconfig @@ -0,0 +1,889 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +CONFIG_ARCH_STDARG_H=y + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +CONFIG_ARCH_CHIP_LPC43XX=y +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc43xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_FPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# LPC43xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC4310FBD144 is not set +# CONFIG_ARCH_CHIP_LPC4310FET100 is not set +# CONFIG_ARCH_CHIP_LPC4320FBD144 is not set +# CONFIG_ARCH_CHIP_LPC4320FET100 is not set +# CONFIG_ARCH_CHIP_LPC4330FBD144 is not set +# CONFIG_ARCH_CHIP_LPC4330FET100 is not set +# CONFIG_ARCH_CHIP_LPC4330FET180 is not set +# CONFIG_ARCH_CHIP_LPC4330FET256 is not set +# CONFIG_ARCH_CHIP_LPC4350FBD208 is not set +# CONFIG_ARCH_CHIP_LPC4350FET180 is not set +# CONFIG_ARCH_CHIP_LPC4350FET256 is not set +# CONFIG_ARCH_CHIP_LPC4353FBD208 is not set +# CONFIG_ARCH_CHIP_LPC4353FET180 is not set +# CONFIG_ARCH_CHIP_LPC4353FET256 is not set +# CONFIG_ARCH_CHIP_LPC4357FET180 is not set +# CONFIG_ARCH_CHIP_LPC4357FBD208 is not set +CONFIG_ARCH_CHIP_LPC4357FET256=y +CONFIG_ARCH_FAMILY_LPC4357=y +# CONFIG_LPC43_BOOT_SRAM is not set +# CONFIG_LPC43_BOOT_SPIFI is not set +CONFIG_LPC43_BOOT_FLASHA=y +# CONFIG_LPC43_BOOT_FLASHB is not set +# CONFIG_LPC43_BOOT_CS0FLASH is not set +# CONFIG_LPC43_BOOT_CS1FLASH is not set +# CONFIG_LPC43_BOOT_CS2FLASH is not set +# CONFIG_LPC43_BOOT_CS3FLASH is not set + +# +# LPC43xx Peripheral Support +# +# CONFIG_LPC43_ADC0 is not set +# CONFIG_LPC43_ADC1 is not set +# CONFIG_LPC43_ATIMER is not set +# CONFIG_LPC43_CAN1 is not set +# CONFIG_LPC43_CAN2 is not set +# CONFIG_LPC43_DAC is not set +# CONFIG_LPC43_EMC is not set +# CONFIG_LPC43_ETHERNET is not set +# CONFIG_LPC43_EVNTMNTR is not set +# CONFIG_LPC43_GPDMA is not set +# CONFIG_LPC43_I2C0 is not set +# CONFIG_LPC43_I2C1 is not set +# CONFIG_LPC43_I2S0 is not set +# CONFIG_LPC43_I2S1 is not set +# CONFIG_LPC43_LCD is not set +# CONFIG_LPC43_MCPWM is not set +# CONFIG_LPC43_QEI is not set +# CONFIG_LPC43_RIT is not set +# CONFIG_LPC43_RTC is not set +# CONFIG_LPC43_SCT is not set +# CONFIG_LPC43_SDMMC is not set +# CONFIG_LPC43_SPI is not set +# CONFIG_LPC43_SPIFI is not set +# CONFIG_LPC43_SSP0 is not set +# CONFIG_LPC43_SSP1 is not set +# CONFIG_LPC43_TMR0 is not set +# CONFIG_LPC43_TMR1 is not set +# CONFIG_LPC43_TMR2 is not set +# CONFIG_LPC43_TMR3 is not set +CONFIG_LPC43_USART0=y +# CONFIG_LPC43_UART1 is not set +# CONFIG_LPC43_USART2 is not set +# CONFIG_LPC43_USART3 is not set +# CONFIG_LPC43_USB0 is not set +# CONFIG_LPC43_USB1 is not set +# CONFIG_LPC43_WWDT is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=18535 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC4357_EVB=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lpc4357-evb" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=11 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +CONFIG_ARCH_HAVE_USART0=y +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART0_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_USART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART0 Configuration +# +CONFIG_USART0_RXBUFSIZE=256 +CONFIG_USART0_TXBUFSIZE=256 +CONFIG_USART0_BAUD=115200 +CONFIG_USART0_BITS=8 +CONFIG_USART0_PARITY=0 +CONFIG_USART0_2STOP=0 +# CONFIG_USART0_IFLOWCONTROL is not set +# CONFIG_USART0_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +CONFIG_LIB_BOARDCTL=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lpc4357-evb/nsh/setenv.sh b/configs/lpc4357-evb/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c40d55a27bbbf6224c31760f1f8013c90baa9083 --- /dev/null +++ b/configs/lpc4357-evb/nsh/setenv.sh @@ -0,0 +1,92 @@ +#!/bin/bash +# configs/lpc4357-evb/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Code Red +# toolchain under windows. You will have to edit this if you install the +# Code Red toolchain in any other location or if you install a different +# version +export TOOLCHAIN_BIN="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/Tools/bin" +#export SCRIPT_BIN="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin" +export SCRIPT_BIN="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export SCRIPT_BIN= + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" +#export SCRIPT_BIN= + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +#export SCRIPT_BIN= + +# And add the selected toolchain path[s] to the PATH variable + +export PATH="/sbin:/usr/sbin:${PATH_ORIG}" + +if [ ! -z ${SCRIPT_BIN} ]; then + export PATH="${SCRIPT_BIN}:${PATH}" +fi + +export PATH="${TOOLCHAIN_BIN}:${PATH}" +echo "PATH : ${PATH}" + +# Set an alias that can be used to put the LPC43xx in boot mode + +alias lpc43xx='${SCRIPT_BIN}/Scripts/bootLPCXpresso.cmd winusb' diff --git a/configs/lpc4357-evb/scripts/bin_checksum_hex.sh b/configs/lpc4357-evb/scripts/bin_checksum_hex.sh new file mode 100644 index 0000000000000000000000000000000000000000..990b07ff3e884dc9cdf111ff939af01875af7133 --- /dev/null +++ b/configs/lpc4357-evb/scripts/bin_checksum_hex.sh @@ -0,0 +1,2 @@ +checksum nuttx.bin -p LPC4357 -v +srec_cat nuttx.bin -binary -offset 0x1a000000 -o nuttx.hex -intel --line-length=44 diff --git a/configs/lpc4357-evb/scripts/flash.sh b/configs/lpc4357-evb/scripts/flash.sh new file mode 100644 index 0000000000000000000000000000000000000000..9c4d762c7c709f45a1fd8e641f9486f51db7a538 --- /dev/null +++ b/configs/lpc4357-evb/scripts/flash.sh @@ -0,0 +1,153 @@ +#!/bin/bash +#################################################################################### +# configs/lpc4357-evb/scripts/flash.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +#################################################################################### +set -x + +USAGE="$0 " + +# LPCXpresso 3.6 installed at /cygdrive/c/nxp/lpcxpresso_3.6" +BINDIR="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin" + +# RedSuite with LPC43xx support installed at /cygdrive/c/code_red/RedSuite_4.2.3_379 " +#BINDIR="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin" + +TARGET=LPC4357 + +echo "############################################################################" +echo "# Assumptions:" +echo "#" +echo "# - Windows 7" +echo "# - Binaries installed at ${BINDIR}" +echo "# - AXF image built with Code Red" +echo "# - ${TARGET}" +echo "#" +echo "# You will need to edit this is any of the above are false" +echo "#" +echo "############################################################################" +echo "" + +# This is the default install location for binaries on Windows (note that this +# path could change with the Code Red version number) + +if [ ! -d "${BINDIR}" ]; then + echo "Directory ${BINDIR} does not exist" + exit 1 +fi + +# This is the relative path to the booLPCXpresso utility. + +BOOTLPC="Scripts/bootLPCXpresso.cmd" +if [ ! -x "${BINDIR}/${BOOTLPC}" ]; then + echo "No executable at ${BINDIR}/${BOOTLPC}" + exit 1 +fi + +# bootLPCXpresso arguments + +BOOTLPC_ARG=winusb # Win7 + +# Use the LPC18xx/LPC43xx flash utility + +FLASHUTIL="crt_emu_lpc18_43_nxp" # for LPC18xx/LPC43xx parts + +if [ ! -x "${BINDIR}/${FLASHUTIL}" ]; then + echo "No executable file at ${BINDIR}/${FLASHUTIL}" + exit 1 +fi + +# FLUSHUTIL arguements + +WIRE="-wire=winusb" # for LPC-Link on Windows Vista/Windows 7) + +# The nuttx directory must be provided as an argument + +NUTTX=$1 +if [ -z "${NUTTX}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +if [ ! -d "${NUTTX}" ]; then + echo "Directory ${NUTTX} does not exist" + echo $USAGE + exit 1 +fi + +# The binary to download: + +if [ ! -f "${NUTTX}/nuttx.axf" ]; then + if [ -f "${NUTTX}/nuttx" ]; then + echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf" + mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf + fi +else + if [ -f "${NUTTX}/nuttx" ]; then + echo "Both ${NUTTX}/nuttx ${NUTTX}/nuttx.axf exist.." + echo " Deleting ${NUTTX}/nuttx.axf" + rm -f ${NUTTX}/nuttx.axf + echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf" + mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf + fi +fi +NUTTXPATH=`cygpath -w "${NUTTX}/nuttx.axf"` + +# First of all boot the LPC-Link using the script: ${BINDIR}/${BOOTLPC} + +cd ${BINDIR} || \ + { echo "Failed to CD to ${BINDIR}"; exit 1; } +./${BOOTLPC} ${BOOTLPC_ARG} || \ + { echo "'${BOOTLPC} ${BOOTLPC_ARG}' Failed"; } + +echo "" +echo "Wait a bit" +echo "5..." +sleep 1 +echo "4..." +sleep 1 +echo "3..." +sleep 1 +echo "2..." +sleep 1 +echo "1..." +sleep 1 +echo "0..." +echo "" + +# Then program the FLASH + +cd ${BINDIR} || \ + { echo "Failed to CD to ${BINDIR}"; exit 1; } +./${FLASHUTIL} ${WIRE} -p${TARGET} -flash-load-exec="${NUTTXPATH}" diff --git a/configs/lpc4357-evb/scripts/flashaconfig.ld b/configs/lpc4357-evb/scripts/flashaconfig.ld new file mode 100644 index 0000000000000000000000000000000000000000..962401af1e33069747fa1164635873988c6cae05 --- /dev/null +++ b/configs/lpc4357-evb/scripts/flashaconfig.ld @@ -0,0 +1,151 @@ +/**************************************************************************** + * configs/lpc4357-evb/scripts/flashconfig.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* + * Power-Up Reset Overview + * ----------------------- + * + * The ARM core starts executing code on reset with the program counter set + * to 0x0000 0000. The LPC43xx contains a shadow pointer register that + * allows areas of memory to be mapped to address 0x0000 0000. The default, + * reset value of the shadow pointer is 0x1040 0000 so that on reset code in + * the boot ROM is always executed first. + * + * The boot starts after reset is released. The IRC is selected as CPU clock + * and the Cortex-M4 starts the boot loader. By default the JTAG access to the + * chip is disabled at reset. The boot ROM determines the boot mode based on + * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part + * boots from internal flash by default. Otherwse, the boot ROM copies the + * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow + * pointer to 0x1000 0000, and jumps to that location. + * + * However, using JTAG the executable image can be also loaded directly into + * and executed from SRAM. + */ + +/* The LPC4357 on the LPC4357-EVB has the following memory resources: + * + * SRAM: + * a. 32kB of SRAM mapped at 0x10000000 + * b. 40kB of SRAM mapped at 0x10080000 + * Internal flash: + * a. 512kB of flash (bank A) at 0x1a000000 + * b. 512kB of flash (bank B) at 0x1b000000 + * External flash: + * a. 4MB of SPIFl flash at 0x14000000 + * + * Here we assume that: + * + * 1. We will be running out of SRAM at 0x1000:0000, and + * 2. All .data and .bss will all fit into the 72KB SRAM block. + * + * NOTE: That initialized data is kept in the program memory SRAM and copied + * to .data SRAM. This is wasteful and unnecessary but provides a good test + * for future, FLASH-resident code. + */ + +MEMORY +{ + progmem (rx) : ORIGIN = 0x1A000000, LENGTH = 256K + datamem (rwx) : ORIGIN = 0x10000000, LENGTH = 72K +} + +OUTPUT_ARCH(arm) +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ +EXTERN(_vectors) /* Force the vectors to be included in the output */ +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progmem + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progmem + + .ARM.extab : { + *(.ARM.extab*) + } > progmem + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progmem + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datamem AT > progmem + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datamem + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lpc4357-evb/scripts/ramconfig.ld b/configs/lpc4357-evb/scripts/ramconfig.ld new file mode 100644 index 0000000000000000000000000000000000000000..90c1a4e24760e221b4f3653096cb6166ff886d4a --- /dev/null +++ b/configs/lpc4357-evb/scripts/ramconfig.ld @@ -0,0 +1,140 @@ +/**************************************************************************** + * configs/lpc4357-evb/scripts/ramconfig.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* + * Power-Up Reset Overview + * ----------------------- + * + * The ARM core starts executing code on reset with the program counter set + * to 0x0000 0000. The LPC43xx contains a shadow pointer register that + * allows areas of memory to be mapped to address 0x0000 0000. The default, + * reset value of the shadow pointer is 0x1040 0000 so that on reset code in + * the boot ROM is always executed first. + * + * The boot starts after reset is released. The IRC is selected as CPU clock + * and the Cortex-M4 starts the boot loader. By default the JTAG access to the + * chip is disabled at reset. The boot ROM determines the boot mode based on + * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part + * boots from internal flash by default. Otherwse, the boot ROM copies the + * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow + * pointer to 0x1000 0000, and jumps to that location. + * + * However, using JTAG the executable image can be also loaded directly into + * and executed from SRAM. + */ + +/* Here we assume that: + * + * 1. We will be running out of SRAM at 0x1000:0000, and + * 2. All .data and .bss will all fit into the 72KB SRAM block. + * + * NOTE: That initialized data is kept in the program memory SRAM and copied + * to .data SRAM. This is wasteful and unnecessary but provides a good test + * for future, FLASH-resident code. + */ + +MEMORY +{ + progmem (rx) : ORIGIN = 0x10000000, LENGTH = 128K + datamem (rwx) : ORIGIN = 0x10080000, LENGTH = 72K +} + +OUTPUT_ARCH(arm) +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ +EXTERN(_vectors) /* Force the vectors to be included in the output */ +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progmem + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progmem + + .ARM.extab : { + *(.ARM.extab*) + } > progmem + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progmem + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datamem AT > progmem + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datamem + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lpc4357-evb/scripts/spificonfig.ld b/configs/lpc4357-evb/scripts/spificonfig.ld new file mode 100644 index 0000000000000000000000000000000000000000..f23adf50972694278d8216843b194835adc0c543 --- /dev/null +++ b/configs/lpc4357-evb/scripts/spificonfig.ld @@ -0,0 +1,130 @@ +/**************************************************************************** + * configs/lpc4357-evb/scripts/spificonfig.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* + * Power-Up Reset Overview + * ----------------------- + * + * The ARM core starts executing code on reset with the program counter set + * to 0x0000 0000. The LPC43xx contains a shadow pointer register that + * allows areas of memory to be mapped to address 0x0000 0000. The default, + * reset value of the shadow pointer is 0x1040 0000 so that on reset code in + * the boot ROM is always executed first. + * + * The boot starts after reset is released. The IRC is selected as CPU clock + * and the Cortex-M4 starts the boot loader. By default the JTAG access to the + * chip is disabled at reset. The boot ROM determines the boot mode based on + * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part + * boots from internal flash by default. Otherwise, the boot ROM copies the + * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow + * pointer to 0x1000 0000, and jumps to that location. + * + * Of course, using JTAG the executable image can be also loaded directly + * into and executed from SRAM. + */ + +MEMORY +{ + progmem (rx) : ORIGIN = 0x14000000, LENGTH = 1024K + datamem (rwx) : ORIGIN = 0x10000000, LENGTH = 128K +} + +OUTPUT_ARCH(arm) +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ +EXTERN(_vectors) /* Force the vectors to be included in the output */ +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progmem + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progmem + + .ARM.extab : { + *(.ARM.extab*) + } > progmem + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progmem + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datamem AT > progmem + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datamem + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lpc4357-evb/src/.gitignore b/configs/lpc4357-evb/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/lpc4357-evb/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/lpc4357-evb/src/Makefile b/configs/lpc4357-evb/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..f9775f617eb3dd7cb8c6fb49ea09bd4ba275b558 --- /dev/null +++ b/configs/lpc4357-evb/src/Makefile @@ -0,0 +1,71 @@ +############################################################################ +# configs/lpc4357-evb/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc43_boot.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc43_appinit.c +endif + +ifeq ($(CONFIG_ARCH_FPU),y) +CSRCS += lpc43_ostest.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += lpc43_autoleds.c +else +CSRCS += lpc43_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += lpc43_buttons.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += lpc43_usbmsc.c +endif + +ifeq ($(CONFIG_SPIFI_LIBRARY),y) +CFLAGS += -DEUROBIRD +SPIFI_LIB = spifi_lib +CSRCS += $(SPIFI_LIB)/spifi_rom_api.c +CSRCS += $(SPIFI_LIB)/spansion.c +CSRCS += $(SPIFI_LIB)/winbond.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/lpc4357-evb/src/lpc4357-evb.h b/configs/lpc4357-evb/src/lpc4357-evb.h new file mode 100644 index 0000000000000000000000000000000000000000..2c3fd8caf484cbc30892cdcffa5c44e897a4ef0c --- /dev/null +++ b/configs/lpc4357-evb/src/lpc4357-evb.h @@ -0,0 +1,95 @@ +/**************************************************************************** + * configs/lpc4357-evb/src/lpc4357-evb.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef _CONFIGS_LPC4357_EVB_SRC_LPC3257_EVB_H +#define _CONFIGS_LPC4357_EVB_SRC_LPC3257_EVB_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "lpc43_pinconfig.h" +#include "lpc43_gpio.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED definitions **********************************************************/ +/* The LPC4357-EVB has one user-controllable LED labelled D6 controlled by + * the signal LED_3V3: + * + * ---- ------- ------------- + * LED SIGNAL MCU + * ---- ------- ------------- + * D6 LED_3V3 PE_7 GPIO7[7] + * ---- ------- ------------- + * + * A low output illuminates the LED. + * + * Definitions to configure LED pins as GPIOs: + * + * - Floating + * - Normal drive + * - No buffering, glitch filtering, slew=slow + */ + +#define PINCONFIG_LED PINCONF_GPIO7p7 + +/* Definitions to configure LED GPIO as outputs */ + +#define GPIO_LED (GPIO_MODE_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT7 | GPIO_PIN7) + +/* Button definitions *******************************************************/ +/* to be provided */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_LPC4357_EVB_SRC_LPC3257_EVB_H */ diff --git a/configs/lpc4357-evb/src/lpc43_appinit.c b/configs/lpc4357-evb/src/lpc43_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..2555797f22cb46ac54e7a677bc4b6957a2caeb7d --- /dev/null +++ b/configs/lpc4357-evb/src/lpc43_appinit.c @@ -0,0 +1,149 @@ +/**************************************************************************** + * config/lpc4357-evb/src/lpc43_appinit.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" + +#ifdef CONFIG_LPC43_SPIFI +# include +# include "lpc43_spifi.h" + +# ifdef CONFIG_SPFI_NXFFS +# include +# include +# endif +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_SPIFI_DEVNO +# define CONFIG_SPIFI_DEVNO 0 +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nsh_spifi_initialize + * + * Description: + * Make the SPIFI (or part of it) into a block driver that can hold a + * file system. + * + ****************************************************************************/ + +#ifdef CONFIG_LPC43_SPIFI +static int nsh_spifi_initialize(void) +{ + FAR struct mtd_dev_s *mtd; + int ret; + + /* Initialize the SPIFI interface and create the MTD driver instance */ + + mtd = lpc43_spifi_initialize(); + if (!mtd) + { + fdbg("ERROR: lpc43_spifi_initialize failed\n"); + return -ENODEV; + } + +#ifndef CONFIG_SPFI_NXFFS + /* And finally, use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(CONFIG_SPIFI_DEVNO, mtd); + if (ret < 0) + { + fdbg("ERROR: Initializing the FTL layer: %d\n", ret); + return ret; + } +#else + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", ret); + return ret; + } + + /* Mount the file system at /mnt/spifi */ + + ret = mount(NULL, "/mnt/spifi", "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif + + return OK; +} +#else +# define nsh_spifi_initialize() (OK) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + /* Initialize the SPIFI block device */ + + return nsh_spifi_initialize(); +} diff --git a/configs/lpc4357-evb/src/lpc43_autoleds.c b/configs/lpc4357-evb/src/lpc43_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..acb63b2554bcc7a02ac492db52221b7a2d7c7696 --- /dev/null +++ b/configs/lpc4357-evb/src/lpc43_autoleds.c @@ -0,0 +1,204 @@ +/**************************************************************************** + * configs/lpc4357-evb/src/lpc43_autoleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc4357-evb.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED definitions **********************************************************/ +/* The LPC4357-EVB has one user-controllable LED labelled D6 controlled by + * the signal LED_3V3: + * + * ---- ------- ------------- + * LED SIGNAL MCU + * ---- ------- ------------- + * D6 LED_3V3 PE_7 GPIO7[7] + * ---- ------- ------------- + * + * LED is grounded and a high output illuminates the LED. + * + * If CONFIG_ARCH_LEDS is defined, the LED will be controlled as follows + * for NuttX debug functionality (where NC means "No Change"). + * + * -------------------------- -------- + * LED + * -------------------------- -------- + * LED_STARTED OFF + * LED_HEAPALLOCATE OFF + * LED_IRQSENABLED OFF + * LED_STACKCREATED ON + * LED_INIRQ NC + * LED_SIGNAL NC + * LED_ASSERTION NC + * LED_PANIC Flashing + * -------------------------- -------- + */ + +/* Debug definitions ********************************************************/ +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define LED_VERBOSE 1 +# define ledvdbg lldbg +# else +# undef LED_VERBOSE +# define ledvdbg(x...) +# endif +#else +# undef LED_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_dumppins + ****************************************************************************/ + +#ifdef LED_VERBOSE +static void led_dumppins(FAR const char *msg) +{ + lpc43_pin_dump(PINCONFIG_LED, msg); + lpc43_gpio_dump(GPIO_LED, msg); +} +#else +# define led_dumppins(m) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED pin as a GPIO outputs */ + + led_dumppins("board_autoled_initialize() Entry)"); + + /* Configure LED pin as a GPIO, then configure GPIO as an outputs */ + + lpc43_pin_config(PINCONFIG_LED); + lpc43_gpio_config(GPIO_LED); + + led_dumppins("board_autoled_initialize() Exit"); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool ledon = true; /* OFF. Low illuminates */ + + switch (led) + { + default: + case 0: + break; /* LED OFF until state 1 */ + + case 2: + return; /* LED no change */ + + case 1: + case 3: + ledon = false; /* LED ON. Low illuminates */ + break; + } + + /* Turn LED on or off, depending on state */ + + lpc43_gpio_write(GPIO_LED, ledon); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + default: + case 0: + case 1: + case 3: + break; /* LED OFF */ + + case 2: + return; /* LED no change */ + } + + /* LED OFF, Low illuminates */ + + lpc43_gpio_write(GPIO_LED, true); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/lpc4357-evb/src/lpc43_boot.c b/configs/lpc4357-evb/src/lpc43_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..c621e8c09e398c1e711654c110b534a7ed42eeee --- /dev/null +++ b/configs/lpc4357-evb/src/lpc43_boot.c @@ -0,0 +1,81 @@ +/************************************************************************************ + * configs/lpc4357-evb/src/lpc43_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc4357-evb.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc43_boardinitialize + * + * Description: + * All LPC43xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc43_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/lpc4357-evb/src/lpc43_buttons.c b/configs/lpc4357-evb/src/lpc43_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..df7f32aef66d65be79752e4bf9c0155cd1fb54f5 --- /dev/null +++ b/configs/lpc4357-evb/src/lpc43_buttons.c @@ -0,0 +1,236 @@ +/**************************************************************************** + * configs/lpc4357-evb/src/board_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include + +#include "lpc4357-evb.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each LPC4357-EVB button. This array is indexed by + * the BUTTON_* definitions in board.h + */ + +#if 0 /* Not yet used */ +static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] = +{ +}; + +/* This array defines all of the interrupt handlers current attached to + * button events. + */ + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS]; + +/* This array provides the mapping from button ID numbers to button IRQ + * numbers. + */ + +static uint8_t g_buttonirq[BOARD_NUM_BUTTONS] = +{ +}; +#endif +#endif /* Not yet used */ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ +#if 0 /* Not yet implemented */ + int i; + + /* Configure the GPIO pins as interrupting inputs. */ + + for (i = 0; i < BOARD_NUM_BUTTONS; i++) + { + lpc43_configgpio(g_buttoncfg[i]); + } +#endif +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons. + * + * board_buttons() may be called at any time to harvest the state of every + * button. The state of the buttons is returned as a bitset with one + * bit corresponding to each button: If the bit is set, then the button + * is pressed. See the BOARD_BUTTON_*_BIT and BOARD_JOYSTICK_*_BIT + * definitions in board.h for the meaning of each bit. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ +#if 0 /* Not yet implemented */ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < BOARD_NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed. */ + + bool released = lpc43_gpio_read(g_buttoncfg[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +#else + return 0; +#endif /* Not yet implemented */ +} + +/**************************************************************************** + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_button_irq() may be called to register button interrupt handlers. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BOARD_BUTTON_* and BOARD_JOYSTICK_* definitions in board.h for the meaning + * of enumeration values. The previous interrupt handler address is returned + * (so that it may restored, if so desired). + * + * Note that board_button_irq() also enables button interrupts. Button + * interrupts will remain enabled after the interrupt handler is attached. + * Interrupts may be disabled (and detached) by calling board_button_irq with + * irqhandler equal to NULL. + * + ****************************************************************************/ + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ +#if 0 /* Not yet implemented */ + xcpt_t oldhandler = NULL; + irqstate_t flags; + int irq; + + /* Verify that the button ID is within range */ + + if ((unsigned)id < BOARD_NUM_BUTTONS) + { + /* Return the current button handler and set the new interrupt handler */ + + oldhandler = g_buttonisr[id]; + g_buttonisr[id] = irqhandler; + + /* Disable interrupts until we are done */ + + flags = enter_critical_section(); + + /* Configure the interrupt. Either attach and enable the new + * interrupt or disable and detach the old interrupt handler. + */ + + irq = g_buttonirq[id]; + if (irqhandler) + { + /* Attach then enable the new interrupt handler */ + + (void)irq_attach(irq, irqhandler); + up_enable_irq(irq); + } + else + { + /* Disable then detach the old interrupt handler */ + + up_disable_irq(irq); + (void)irq_detach(irq); + } + leave_critical_section(flags); + } + + return oldhandler; +#else + return NULL; +#endif /* Not yet implemented */ +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/lpc4357-evb/src/lpc43_ostest.c b/configs/lpc4357-evb/src/lpc43_ostest.c new file mode 100644 index 0000000000000000000000000000000000000000..5ad0d477d8306853e758a2cd36818097ac47ee22 --- /dev/null +++ b/configs/lpc4357-evb/src/lpc43_ostest.c @@ -0,0 +1,113 @@ +/************************************************************************************ + * configs/lpc4357-evb/src/lpc43_ostest.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "lpc4357-evb.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#undef HAVE_FPU +#if defined(CONFIG_ARCH_FPU) && defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && \ + defined(CONFIG_SCHED_WAITPID) && !defined(CONFIG_DISABLE_SIGNALS) && \ + !defined(CONFIG_ARMV7M_CMNVECTOR) +# define HAVE_FPU 1 +#endif + +#ifdef HAVE_FPU + +#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*SW_FPU_REGS) +# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size" +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static uint32_t g_saveregs[XCPTCONTEXT_REGS]; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ +/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return + * the current FPU registers. + */ + +void arch_getfpu(FAR uint32_t *fpusave) +{ + irqstate_t flags; + + /* Take a snapshot of the thread context right now */ + + flags = enter_critical_section(); + up_saveusercontext(g_saveregs); + + /* Return only the floating register values */ + + memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS)); + leave_critical_section(flags); +} + +/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function + * will compare them and return true if they are identical. + */ + +bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2) +{ + return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0; +} + +#endif /* HAVE_FPU */ diff --git a/configs/lpc4357-evb/src/lpc43_userleds.c b/configs/lpc4357-evb/src/lpc43_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..0e8af7c10e6033bcbee72fec5924cc898da98917 --- /dev/null +++ b/configs/lpc4357-evb/src/lpc43_userleds.c @@ -0,0 +1,165 @@ +/**************************************************************************** + * configs/lpc4357-evb/src/lpc43_userleds.c + * + * Copyright (C) 2014, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc4357-evb.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED definitions **********************************************************/ +/* The LPC4357-EVB has one user-controllable LED labelled D6 controlled by + * the signal LED_3V3: + * + * ---- ------- ------------- + * LED SIGNAL MCU + * ---- ------- ------------- + * D6 LED_3V3 PE_7 GPIO7[7] + * ---- ------- ------------- + * + * LED is grounded and a high output illuminates the LED. + * + * If CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under + * control of the application. The following interfaces are then available + * for application control of the LEDs: + * + * void board_userled_initialize(void); + * void board_userled(int led, bool ledon); + * void board_userled_all(uint8_t ledset); + */ + +/* Debug definitions ********************************************************/ +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define LED_VERBOSE 1 +# define ledvdbg lldbg +# else +# undef LED_VERBOSE +# define ledvdbg(x...) +# endif +#else +# undef LED_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_dumppins + ****************************************************************************/ + +#ifdef LED_VERBOSE +static void led_dumppins(FAR const char *msg) +{ + lpc43_pin_dump(PINCONFIG_LED, msg); + lpc43_gpio_dump(GPIO_LED, msg); +} +#else +# define led_dumppins(m) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED pin as a GPIO outputs */ + + led_dumppins("board_userled_initialize() Entry)"); + + /* Configure LED pin as a GPIO, then configure GPIO as an outputs */ + + lpc43_pin_config(PINCONFIG_LED); + lpc43_gpio_config(GPIO_LED); + + led_dumppins("board_userled_initialize() Exit"); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_LED) + { + lpc43_gpio_write(GPIO_LED, !ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + lpc43_gpio_write(GPIO_LED, (ledset & BOARD_LED_BIT) == 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/lpc4370-link2/Kconfig b/configs/lpc4370-link2/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..e9e028dcf66b52e666540208b68ed46fc63b7dcf --- /dev/null +++ b/configs/lpc4370-link2/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_LPC4370_LINK2 +endif diff --git a/configs/lpc4370-link2/README.txt b/configs/lpc4370-link2/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..110b02fd018d3228f3fdcb1549640d1b1bd1ecb1 --- /dev/null +++ b/configs/lpc4370-link2/README.txt @@ -0,0 +1,1013 @@ +README +====== + +README for NuttX port to the LPC4370-Link2 board featuring the NXP +LPC4370FET100 MCU - The port was derived from the LPC4370-Link2 board NuttX +port. + +Contents +======== + + - LPC4370-Link2 development board + - Status + - Development Environment + - GNU Toolchain Options + - IDEs + - Code Red IDE/Tools + Booting the LPCLink + Using GDB + Troubleshooting + Command Line Flash Programming + Executing from SPIFI + USB DFU Booting + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - LED and Pushbuttons + - Serial Console + - FPU + - LPC4370-Link2 Configuration Options + - Configurations + - STATUS + +LPC4370-Link2 board +================= + + Memory Map + ---------- + + Block Start Length + Name Address + --------------------- ---------- ------ + RAM 0x10000000 128K + RAM2 0x10080000 72K + RAMAHB 0x20000000 32K + RAMAHB2 0x20008000 16K + RAMAHB3 0x2000c000 16K + RAMM0 0x18000000 16K + RAMM01 0x18004000 2K + SPIFI flash 0x14000000 1024K + + Console + ------- + + The LPC4370-Link2 default console is the USART2. + +Status +====== + + This is the current status of the LPC43xx port: + + - The basic OS test configuration and the basic NSH configurations + are present and fully verified. This includes: SYSTICK system time, + pin and GPIO configuration, and serial console support. A SPIFI + MTD driver is also in place but requires further verification. + + - The following drivers have been copied from the LPC17xx port, but + require integration into the LPC43xx. This integration should + consist of: + + - Remove LPC17xx power, clocking, and pin configuration logic. + - Adding of clock source and frequency to the board.h file. + - Adding of LPC43 clock connection and pin configuration logic. + + Within any luck, these drivers should come up very quickly: + + - lpc43_adc.c, + - lpc43_dac.c, + - lpc43_gpdma.c, + - lpc43_i2c.c, + - lpc43_spi.c, and + - lpc43_ssp.c + + These LPC17xx drivers were not brought into the LPC43xx port because + it appears the these peripherals have been completely redesigned: + + - CAN, + - Ethernet, + - USB device, and + - USB host. + + The following LPC43xx peripherals are unsupported. Some may be + compatible with the LPC17xx, but there is no LPC17xx driver to be + ported: + + - SD/MMC, + - EMC, + - USB0, + - USB1, + - Ethernet, + - LCD, + - SCT, + - Timers 0-3 + - MCPWM, + - QEI, + - Alarm timer, + - WWDT, + - RTC, + - Event monitor, and + - CAN, + + For the missing drivers some of these can be leveraged from other + MCUs that appear to support the same peripheral IP. + + - USB0 appears to be the same as the USB OTG peripheral for the + LPC31xx. It should be possible to drop in the LPC31xx driver + with a small porting effort. + + - The Ethernet block looks to be based on the same IP as the + STM32 Ethernet and, as a result, it should be possible to leverage + the STM32 Ethernet driver with a little more effort. + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +===================== + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The Code Red GNU toolchain, + 2. The CodeSourcery GNU toolchain, + 3. The Atollic Toolchain, + 4. The devkitARM GNU toolchain, + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery or devkitARM toolchain, you simply need add one of the + following configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red "RedSuite" under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the Code Red, CodeSourcery (for Windows), Atollic and devkitARM toolchains + are Windows native toolchains. The CodeSourcery (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project . + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lpc43xx, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/common/up_vectors.S. + +Code Red IDE/Tools +^^^^^^^^^^^^^^^^^^ + + Booting the LPCLink + ------------------- + + The first step is to activate the LPCLink's boot mode. Some general + instructions to do this are provided here: + + http://support.code-red-tech.com/CodeRedWiki/BootingLPCLink + + For my RedSuite installation path, that can be done using the following + steps in a Cygwin bash shell: + + $ /cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin/Scripts/bootLPCXpresso.cmd winusb + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + The same file logic can be found the less restrictive LPCXpresso package at: + + /cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin + + (The "free" RedSuite version has a download limit of 8K; the "free" LPCXpresso + version has a download limit of 128K). + + NOTE that the following alias is defined in the setenv.sh file and + can be used to enter the boot mode with a simpler command: + + alias lpc43xx='${SCRIPT_BIN}/Scripts/bootLPCXpresso.cmd winusb' + + Be default, the setenv.sh scripts uses the LPCXpresso path shown above. + Once setenv.sh has been sources, then entering boot mode becomes simply: + + $ lpc43xx + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + Using GDB + --------- + + The underlying debugger within Red Suite/LPCXpresso is GDB. That GDB + used from the command line. The GDB configuration details for command + line use are on Code Red Wiki: + + http://support.code-red-tech.com/CodeRedWiki/UsingGDB + + and is also summarized here (see the full Wiki for additional details + and options). + + The Code Red Debug Driver implements the GDB "remote" protocol to allow + connection to debug targets. To start a debug session using GDB, use + following steps: + + arm-none-eabi-gdb executable.axf : Start GDB and name the debug image + target extended-remote | : Start debug driver, connect to target + load : Load image and download to target + + The where is crt_emu_lpc18_43_nxp for LPC18xx and LPC43xx. + Your PATH variable should be set up so that the debug driver executable + can be found. For my installation, the driver for the LPC18xx and LPC43xx + is located at: + + /cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin/crt_emu_lpc18_43_nxp.exe, OR + /cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin/crt_emu_lpc18_43_nxp.exe + + And are: + + -n set information level for the debug driver. n should be 2, 3 or 4. + 2 should be sufficient in most circumstances + + -p is the target device to connect to and you should use + =LPC4370. + + -wire= specifies the debug probe. For LPCLink on Windows 7 use + =winusb. The 128K free version only supports the LPC-Link + and RedProbe debug probes. Other JTAG interfaces are supported in + the full version. + + Thus the correct invocation for the LPC4370 under Windows7 would be: + + target extended-remote | crt_emu_lpc18_43_nxp -2 -pLPC4370 -wire=winusb + + DDD. This command can be used to start GDB under the graphics front-end + DDD: + + $ ddd --debugger arm-none-eabi-gdb nuttx & + + NOTE 1: Don't forget to put the LPCLink in boot mode as described above + before starting GDB. So a typical session might look like this: + + $ lpc43xx + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + $ arm-none-eabi-gdb nuttx + (gdb) target extended-remote | crt_emu_lpc18_43_nxp -2 -pLPC4370 -wire=winusb + (gdb) load + (gdb) r + (gdb) c + + NOTE 2: Don't forget to enable CONFIG_DEBUG_SYMBOLS=y in your NuttX + configuration file when you build NuttX. That option is necessary to build + in debugging symbols. + + NOTE 3: There are few things that NuttX has to do differently if you + are using a debugger. Make sure that you also set CONFIG_DEBUG=y. Nothing + also is needed and no debug output will be generated; but NuttX will + use CONFIG_DEBUG=y to mean that a debugger is attached and will deal + with certain resets and debug controls appropriately. + + So you should have: + + CONFIG_DEBUG=y + CONFIG_DEBUG_SYMBOLS=y + + NOTE 4: Every time that you control-C out of the command line GDB, you + leave a copy of the Code Red debugger (crt_emu_lpc18_43_nxp) running. I + have found that if you have these old copies of the debugger running, + hen strange things can happen when start yet another copy of the + debugger (I suspect that GDB may be talking with the wrong debugger). + + If you exit GDB with quit (not control-C), it seems to clean-up okay. + But I have taken to keeping a Process Explorer window open all of the + time to keep track of how many of these bad processes have been created. + + NOTE 5: There is also a certain function that is causing some problems. + The very first thing that the start-up logic does is call a function + called lpc43_softreset() which resets most of the peripherals. But it + also causes some crashes... I think because the resets are causing some + interrupts. + + I put a big delay in the soft reset logic between resetting and clearing + pending interrupts and that seems to help some but I am not confident + that that is a fix. I think that the real fix might be to just eliminated + this lpc43_softreset() function if we determine that it is not needed. + + If you step over lpc43_softreset() after loading the coding (using the 'n' + command), then everything seems work okay. + + Troubleshooting + --------------- + + This page provides some troubleshooting information that you can use to + verify that the LPCLink is working correctly: + + http://support.code-red-tech.com/CodeRedWiki/LPCLinkDiagnostics + + Command Line Flash Programming + ------------------------------ + + The LPC18xx/LPC43xx debug driver can also be used to program the LPC43xx + flash directly from the command line. The script flash.sh that may be + found in the configs/LPC4370-Link2/scripts directory can do that with + a single command line command. + + Executing from SPIFI + -------------------- + + By default, the configurations here assume that you are executing directly + from SRAM. + + CONFIG_LPC43_BOOT_SRAM=y : Executing in SRAM + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red under Windows + + To execute from SPIFI, you would need to set: + + CONFIG_LPC43_BOOT_SPIFI=y : Executing from SPIFI + CONFIG_RAM_SIZE=(128*1024) : SRAM Bank0 size + CONFIG_RAM_START=0x10000000 : SRAM Bank0 base address + CONFIG_SPIFI_OFFSET=(512*1024) : SPIFI file system offset + + To boot the LPC4370-Link2 from SPIFI the DIP switches should be 1-OFF, + 2-ON, 3-ON, 4-ON (LOW LOW LOW HIGH in Table 19, MSB to LSB). + + If the code in flash hard faults after reset and crt_emu_lpc18_43_nxp + can't reset the MCU, an alternative is to temporarily change switch 1 + to ON and press the reset button so it enters UART boot mode. Then + change it back to OFF and reset to boot again from flash. + + # Use -wire to specify the debug probe in use: + # (empty) Red Probe+ + # -wire=winusb LPC-Link on Windows XP + # -wire=hid LPC-Link on Windows Vista/ Windows 7 + # Add -g -4 for verbose output + + crt_emu_lpc18_43_nxp -wire=hid -pLPC4370 -load-base=0x14000000 + -flash-load-exec=nuttx.bin -flash-driver=LPC1850A_4350A_SPIFI.cfx + + USB DFU Booting + --------------- + + To be provided. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh LPC4370-xplorer/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LED and Pushbuttons +=================== + + LED + --- + The LPC4370-Link2 has one user-controllable LED labelled D6 controlled + by the signal LED_3V3: + + LED SIGNAL MCU + D6 LED_3V3 PE_& GPIO7[7] + + A low output illuminates the LED. + + If CONFIG_ARCH_LEDS is defined, the LED will be controlled as follows + for NuttX debug functionality (where NC means "No Change"). + + -------------------------- --------- + LED + -------------------------- --------- + LED_STARTED OFF + LED_HEAPALLOCATE OFF + LED_IRQSENABLED OFF + LED_STACKCREATED ON + LED_INIRQ NC + LED_SIGNAL NC + LED_ASSERTION NC + LED_PANIC Flashing + -------------------------- --------- + + If CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under + control of the application. The following interfaces are then available + for application control of the LEDs: + + void board_userled_initialize(void); + void board_userled(int led, bool ledon); + void board_userled_all(uint8_t ledset); + + Pushbuttons + ----------- + To be provided + +Serial Console +============== + +The LPC4370-Link2 does not have RS-232 drivers or serial connectors on board. +USART, USART2 and USART3 are available on J12 as follows: + + ------ ------ ----------------------- + SIGNAL J12 PIN LPC4370FET256 PIN + (TFBGA256 package) + ------ ------ ----------------------- + U0_TXD pin 3 F6 P9_5 U0_TXD=Alt 4 + U0_RXD pin 4 F9 P9_6 U0_RXD=Alt 4 + U2_TXD pin 5 H8 P1_13 U1_TXD=Alt 1 + U2_RXD pin 6 J8 P1_14 U1_RXD=Alt 1 + U3_TXD pin 7 H8 P1_13 U1_TXD=Alt 1 + U3_RXD pin 8 J8 P1_14 U1_RXD=Alt 1 + ------ ------ ----------------------- + + GND is available on J12 pins 29 and 30 + 5V is available on J12 pin 2 + 3.3v id available on J12 pin 1 + +FPU +=== + +FPU Configuration Options +------------------------- + +There are two version of the FPU support built into the most NuttX Cortex-M4 +ports. The current LPC43xx port support only one of these options, the "Non- +Lazy Floating Point Register Save". As a consequence, CONFIG_ARMV7M_CMNVECTOR +must be defined in *all* LPC43xx configuration files. + +1. Lazy Floating Point Register Save. + + This is an untested implementation that saves and restores FPU registers + only on context switches. This means: (1) floating point registers are + not stored on each context switch and, hence, possibly better interrupt + performance. But, (2) since floating point registers are not saved, + you cannot use floating point operations within interrupt handlers. + + This logic can be enabled by simply adding the following to your .config + file: + + CONFIG_ARCH_FPU=y + +2. Non-Lazy Floating Point Register Save + + Mike Smith has contributed an extensive re-write of the ARMv7-M exception + handling logic. This includes verified support for the FPU. These changes + have not yet been incorporated into the mainline and are still considered + experimental. These FPU logic can be enabled with: + + CONFIG_ARCH_FPU=y + CONFIG_ARMV7M_CMNVECTOR=y + + You will probably also changes to the ld.script in if this option is selected. + This should work: + + -ENTRY(_stext) + +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ + +EXTERN(_vectors) /* Force the vectors to be included in the output */ + +CFLAGS +------ + +Only the recent toolchains have built-in support for the Cortex-M4 FPU. You will see +the following lines in each Make.defs file: + + ifeq ($(CONFIG_ARCH_FPU),y) + ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard + else + ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + endif + +Configuration Changes +--------------------- + +Below are all of the configuration changes that I had to make to configs/stm3240g-eval/nsh2 +in order to successfully build NuttX using the Atollic toolchain WITH FPU support: + + -CONFIG_ARCH_FPU=n : Enable FPU support + +CONFIG_ARCH_FPU=y + + -CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : Disable the CodeSourcery toolchain + +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n + + -CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=n : Enable the Atollic toolchains + +CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : + + -CONFIG_INTELHEX_BINARY=y : Suppress generation FLASH download formats + +CONFIG_INTELHEX_BINARY=n : (Only necessary with the "Lite" version) + + -CONFIG_HAVE_CXX=y : Suppress generation of C++ code + +CONFIG_HAVE_CXX=n : (Only necessary with the "Lite" version) + +See the section above on Toolchains, NOTE 2, for explanations for some of +the configuration settings. Some of the usual settings are just not supported +by the "Lite" version of the Atollic toolchain. + +LPC4370-Link2 Configuration Options +===================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc43xx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LPC4370=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=LPC4370-Link2 (for the LPC4370-Link2 board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_LPC4370Link2=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x10000000 + + CONFIG_ARCH_FPU - The LPC43xxx supports a floating point unit (FPU) + + CONFIG_ARCH_FPU=y + + CONFIG_LPC43_BOOT_xxx - The startup code needs to know if the code is running + from internal FLASH, external FLASH, SPIFI, or SRAM in order to + initialize properly. Note that a boot device is not specified for + cases where the code is copied into SRAM; those cases are all covered + by CONFIG_LPC43_BOOT_SRAM. + + CONFIG_LPC43_BOOT_SRAM=y : Running from SRAM (0x1000:0000) + CONFIG_LPC43_BOOT_SPIFI=y : Running from QuadFLASH (0x1400:0000) + CONFIG_LPC43_BOOT_FLASHA=y : Running in internal FLASHA (0x1a00:0000) + CONFIG_LPC43_BOOT_FLASHB=y : Running in internal FLASHA (0x1b00:0000) + CONFIG_LPC43_BOOT_CS0FLASH=y : Running in external FLASH CS0 (0x1c00:0000) + CONFIG_LPC43_BOOT_CS1FLASH=y : Running in external FLASH CS1 (0x1d00:0000) + CONFIG_LPC43_BOOT_CS2FLASH=y : Running in external FLASH CS2 (0x1e00:0000) + CONFIG_LPC43_BOOT_CS3FLASH=y : Running in external FLASH CS3 (0x1f00:0000) + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_LPC43_ADC0=y + CONFIG_LPC43_ADC1=y + CONFIG_LPC43_ATIMER=y + CONFIG_LPC43_CAN1=y + CONFIG_LPC43_CAN2=y + CONFIG_LPC43_DAC=y + CONFIG_LPC43_EMC=y + CONFIG_LPC43_ETHERNET=y + CONFIG_LPC43_EVNTMNTR=y + CONFIG_LPC43_GPDMA=y + CONFIG_LPC43_I2C0=y + CONFIG_LPC43_I2C1=y + CONFIG_LPC43_I2S0=y + CONFIG_LPC43_I2S1=y + CONFIG_LPC43_LCD=y + CONFIG_LPC43_MCPWM=y + CONFIG_LPC43_QEI=y + CONFIG_LPC43_RIT=y + CONFIG_LPC43_RTC=y + CONFIG_LPC43_SCT=y + CONFIG_LPC43_SDMMC=y + CONFIG_LPC43_SPI=y + CONFIG_LPC43_SPIFI=y + CONFIG_LPC43_SSP0=y + CONFIG_LPC43_SSP1=y + CONFIG_LPC43_TMR0=y + CONFIG_LPC43_TMR1=y + CONFIG_LPC43_TMR2=y + CONFIG_LPC43_TMR3=y + CONFIG_LPC43_USART0=y + CONFIG_LPC43_UART1=y + CONFIG_LPC43_USART2=y + CONFIG_LPC43_USART3=y + CONFIG_LPC43_USB0=y + CONFIG_LPC43_USB1=y + CONFIG_LPC43_USB1_ULPI=y + CONFIG_LPC43_WWDT=y + + LPC43xx specific U[S]ART device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the USART0). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + CONFIG_USARTn_RS485MODE - Support LPC43xx USART0,2,3 RS485 mode + ioctls (TIOCSRS485 and TIOCGRS485) to enable and disable + RS-485 mode. + + LPC43xx specific CAN device driver settings. These settings all + require CONFIG_CAN: + + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN2 is defined. + CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7 + + LPC43xx specific PHY/Ethernet device driver settings. These setting + also require CONFIG_NET and CONFIG_LPC43_ETHERNET. + + CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY + CONFIG_PHY_AUTONEG - Enable auto-negotion + CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. + CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex + + CONFIG_NET_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb + CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 18 + CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18 + CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented). + CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs + CONFIG_DEBUG. + CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets. + Also needs CONFIG_DEBUG. + CONFIG_NET_HASH - Enable receipt of near-perfect match frames. + + LPC43xx USB Device Configuration + + CONFIG_LPC43_USBDEV_FRAME_INTERRUPT + Handle USB Start-Of-Frame events. + Enable reading SOF from interrupt handler vs. simply reading on demand. + Probably a bad idea... Unless there is some issue with sampling the SOF + from hardware asynchronously. + CONFIG_LPC43_USBDEV_EPFAST_INTERRUPT + Enable high priority interrupts. I have no idea why you might want to + do that + CONFIG_LPC43_USBDEV_NDMADESCRIPTORS + Number of DMA descriptors to allocate in SRAM. + CONFIG_LPC43_USBDEV_DMA + Enable lpc17xx-specific DMA support + CONFIG_LPC43_USBDEV_NOVBUS + Define if the hardware implementation does not support the VBUS signal + CONFIG_LPC43_USBDEV_NOLED + Define if the hardware implementation does not support the LED output + + LPC43xx USB Host Configuration + + CONFIG_USBHOST_OHCIRAM_SIZE + Total size of OHCI RAM (in AHB SRAM Bank 1) + CONFIG_USBHOST_NEDS + Number of endpoint descriptors + CONFIG_USBHOST_NTDS + Number of transfer descriptors + CONFIG_USBHOST_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_USBHOST_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_IOBUFSIZE + Size of one end-user I/O buffer. This can be zero if the + application can guarantee that all end-user I/O buffers + reside in AHB SRAM. + +Configurations +============== + +Each LPC4370-Link2 configuration is maintained in a sub-directory and can be selected +as follow: + + cd tools + ./configure.sh LPC4370-Link2/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + ---- + This configuration is the NuttShell (NSH) example at examples/nsh/. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. The project can exucute directly from SRAM with NuttX loaded by a debugger + by setting the following configuration options. + + CONFIG_LPC43_BOOT_SRAM=y : Executing in SRAM + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red under Windows + + 3. To execute from SPIFI, you would need to set: + + CONFIG_LPC43_BOOT_SPIFI=y : Executing from SPIFI + CONFIG_RAM_SIZE=(128*1024) : SRAM Bank0 size + CONFIG_RAM_START=0x10000000 : SRAM Bank0 base address + CONFIG_SPIFI_OFFSET=(512*1024) : SPIFI file system offset + + CONFIG_MM_REGIONS should also be increased if you want to other SRAM banks + to the memory pool. + + 4. This configuration an also be used create a block device on the SPIFI + FLASH. CONFIG_LPC43_SPIFI=y must also be defined to enable SPIFI setup + support: + + SPIFI device geometry: + + CONFIG_SPIFI_OFFSET - Offset the beginning of the block driver this many + bytes into the device address space. This offset must be an exact + multiple of the erase block size (CONFIG_SPIFI_BLKSIZE). Default 0. + CONFIG_SPIFI_BLKSIZE - The size of one device erase block. If not defined + then the driver will try to determine the correct erase block size by + examining that data returned from spifi_initialize (which sometimes + seems bad). + + Other SPIFI options + + CONFIG_SPIFI_SECTOR512 - If defined, then the driver will report a more + FAT friendly 512 byte sector size and will manage the read-modify-write + operations on the larger erase block. + CONFIG_SPIFI_READONLY - Define to support only read-only operations. + CONFIG_SPIFI_LIBRARY - Don't use the LPC43xx ROM routines but, instead, + use an external library implementation of the SPIFI interface. + CONFIG_SPIFI_VERIFY - Verify all spifi_program() operations by reading + from the SPI address space after each write. + CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers. You + probably do not want to enable this unless you want to dig through a + *lot* of debug output! Also required CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, + and CONFIG_DEBUG_FS, + + 5. In my experience, there were some missing function pointers in the LPC43xx + SPIFI ROM routines and the SPIFI configuration could only be built with + CONFIG_SPIFI_LIBRARY=y. The SPIFI library is proprietary and cannot be + provided within NuttX open source repository; SPIFI library binaries can + be found on the lpcware.com website. In this build sceneario, you must + also provide the patch to the external SPIFI library be defining the make + variable EXTRA_LIBS in the top-level Make.defs file. Good luck! + + 6. By default the LPC4370-Link2 port is configured to run from the onboard flash + bank A at 0x1a000000. In order to achieve this, the resulting NuttX binary + will need to have a checksum computed over the vector table and then be + converted to a hex file which can then be flashed using a debugger such as + the ULINK2 through Keil. + + The checksum can be computed using the checksum binary provided with the + LPCXpresso IDE software suite as follows: + + ./checksum nuttx.bin -p LPC4370 -v + + This will modify the binary file, appending the checksum to the correct place + at the end of the vector table. + + The binary must now be converted to a hex file, which can be achieved using + the srec_cat utility, which is part of the SRecord package (srecord.sourceforge.net) + as follows: + + srec_cat nuttx.bin -binary -offset 0x1a000000 -o nuttx.hex -intel --line-length=44 + + Now the hex file can be loaded using a debugger, and the code will execute from + flash. + +STATUS +====== + + 1. This configuration derives from the LPC4330 Xplorer configuration. In + many cases there have been global substitutions for naming to the + LPC4370 Link2 without corresponding updates to the technical description. + Thus all technical details should be taken with a grain of salt. GPIO + definitions may actually are remnants of the LPC4330-Xplorer that still + need clean-up. + diff --git a/configs/lpc4370-link2/include/board.h b/configs/lpc4370-link2/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..7bbbd861053a6b912fe9739ca6d9c3dc27d900f0 --- /dev/null +++ b/configs/lpc4370-link2/include/board.h @@ -0,0 +1,365 @@ +/**************************************************************************** + * configs/lpc4357-link2/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_LPC4357_LINK2_INCLUDE_BOARD_H +#define __CONFIGS_LPC4357_LINK2_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking ****************************************************************/ +/* NOTE: The following definitions require lpc43_cgu.h. It is not included + * here because the including C file may not have that file in its include + * path. + * + * The Xplorer board has four crystals on board: + * + * Y1 - RTC 32.768 MHz oscillator input, + * Y2 - 24.576 MHz input to the UDA 1380 audio codec, + * Y3 - 12.000 MHz LPC43xx crystal oscillator input + * Y4 - 50 MHz input for Ethernet + */ + +#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency (Y3) */ +#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency (Y1) */ +#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */ + +/* Integer and direct modes are supported: + * + * In integer mode (Fclkout < 156000000): + * Fclkin = BOARD_XTAL_FREQUENCY + * Fclkout = Msel * FClkin / Nsel + * Fcco = 2 * Psel * Fclkout + * In direct mode (Fclkout > 156000000): + * Fclkin = BOARD_XTAL_FREQUENCY + * Fclkout = Msel * FClkin / Nsel + * Fcco = Fclkout + */ + +#ifdef CONFIG_LPC43_72MHz + +/* NOTE: At 72MHz, the calibrated value of CONFIG_BOARD_LOOPSPERMSEC was + * determined to be: + * + * CONFIG_BOARD_LOOPSPERMSEC=7191 + * + * executing from SRAM. + */ + +/* Final clocking (Integer mode with no ramp-up) + * + * Fclkout = 6 * 12MHz / 1 = 72MHz + * Fcco = 2 * 2 * 72MHz = 216MHz + */ + +# define BOARD_PLL_MSEL (6) /* Msel = 6 */ +# define BOARD_PLL_NSEL (1) /* Nsel = 1 */ +# define BOARD_PLL_PSEL (2) /* Psel = 2 */ + +# define BOARD_FCLKOUT_FREQUENCY (72000000) /* 6 * 12,000,000 / 1 */ +# define BOARD_FCCO_FREQUENCY (244000000) /* 2 * 2 * Fclkout */ + +#else + +/* NOTE: At 72MHz, the calibrated value of CONFIG_BOARD_LOOPSPERMSEC was + * determined to be: + * + * CONFIG_BOARD_LOOPSPERMSEC=18535 + * + * executing from SRAM. + */ + +/* Intermediate ramp-up clocking (Integer mode). If BOARD_PLL_RAMP_MSEL + * is not defined, there will be no ramp-up. + * + * Fclkout = 9 * 12MHz / 1 = 108MHz + * Fcco = 2 * 1 * 108MHz = 216MHz + */ + +# define BOARD_PLL_RAMP_MSEL (9) /* Msel = 9 */ +# define BOARD_PLL_RAMP_NSEL (1) /* Nsel = 1 */ +# define BOARD_PLL_RAMP_PSEL (1) /* Psel = 1 */ + +# define BOARD_RAMP_FCLKOUT (108000000) /* 9 * 12,000,000 / 1 */ +# define BOARD_RAMP_FCCO (216000000) /* 2 * 1 * Fclkout */ + +/* Final clocking (Direct mode). + * + * Fclkout = 17 * 12MHz / 1 = 204MHz + * Fcco = Fclockout = 204MHz + */ + +# define BOARD_PLL_MSEL (17) /* Msel = 17 */ +# define BOARD_PLL_NSEL (1) /* Nsel = 1 */ + +# define BOARD_FCLKOUT_FREQUENCY (204000000) /* 17 * 12,000,000 / 1 */ +# define BOARD_FCCO_FREQUENCY (204000000) /* Fclockout */ + +#endif + +#define LPC43_CCLK BOARD_FCLKOUT_FREQUENCY + +#if defined(CONFIG_LPC43_BUS) || defined(CONFIG_LPC43_MCPWM) || defined(CONFIG_LPC43_I2C0) || defined(CONFIG_LPC43_I2S0) || defined(CONFIG_LPC43_I2S1) || defined(CONFIG_LPC43_CAN1) +# define BOARD_ABP1_CLKSRC BASE_APB_CLKSEL_XTAL +# define BOARD_ABP1_FREQUENCY BOARD_XTAL_FREQUENCY +#endif + + +#if defined(CONFIG_LPC43_BUS) || defined(CONFIG_LPC43_I2C1) || defined(CONFIG_LPC43_DAC) || defined(CONFIG_LPC43_ADC0) || defined(CONFIG_LPC43_ADC1) || defined(CONFIG_LPC43_CAN0) +# define BOARD_ABP3_CLKSRC BASE_APB_CLKSEL_XTAL +# define BOARD_ABP3_FREQUENCY BOARD_XTAL_FREQUENCY +#endif + + + +#define BOARD_IDIVA_DIVIDER (2) +#define BOARD_IDIVA_CLKSRC IDIVA_CLKSEL_PLL1 +#define BOARD_IDIVA_FREQUENCY (BOARD_FCLKOUT_FREQUENCY/BOARD_IDIVA_DIVIDER) + + +/* USB0 ********************************************************************/ +/* Settings needed in lpc43_cpu.c */ + +#define BOARD_USB0_CLKSRC PLL0USB_CLKSEL_XTAL +#define BOARD_USB0_MDIV 0x06167ffa /* Table 149 datsheet, valid for 12Mhz Fclkin */ +#define BOARD_USB0_NP_DIV 0x00302062 /* Table 149 datsheet, valid for 12Mhz Fclkin */ + +/* SPIFI clocking **********************************************************/ +/* The SPIFI will receive clocking from a divider per the settings provided + * in this file. The NuttX code will configure PLL1 as the input clock + * for the selected divider + */ + +#undef BOARD_SPIFI_PLL1 /* No division */ +#undef BOARD_SPIFI_DIVA /* Supports division by 1-4 */ +#undef BOARD_SPIFI_DIVB /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVC /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVD /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVE /* Supports division by 1-256 */ + +#if BOARD_FCLKOUT_FREQUENCY < 20000000 +# define BOARD_SPIFI_PLL1 1 /* Use PLL1 directly */ +#else +# define BOARD_SPIFI_DIVB 1 /* Use IDIVB */ +#endif + + +/* We need to configure the divider so that its output is as close to the + * desired SCLK value. The peak data transfer rate will be about half of + * this frequency in bytes per second. + */ + +#if BOARD_FCLKOUT_FREQUENCY < 20000000 +# define BOARD_SPIFI_FREQUENCY BOARD_FCLKOUT_FREQUENCY /* 72Mhz? */ +#else +# define BOARD_SPIFI_DIVIDER (14) /* 204MHz / 14 = 14.57MHz */ +# define BOARD_SPIFI_FREQUENCY (102000000) /* 204MHz / 14 = 14.57MHz */ +#endif + +#if CONFIG_SPIFI_LIBRARY +# define SPIFI_DEVICE_ALL 0 /**< Enables all devices in family */ +# define SPIFI_DEVICE_S25FL016K 0 /**< Enables Spansion S25FL016K device */ +# define SPIFI_DEVICE_S25FL032P 0 /**< Enables Spansion S25FL032P device */ +# define SPIFI_DEVICE_S25FL064P 0 /**< Enables Spansion S25FL064P device */ +# define SPIFI_DEVICE_S25FL129P_64K 0 /**< Enables Spansion S25FL129P (64K block) device */ +# define SPIFI_DEVICE_S25FL129P_256K 0 /**< Enables Spansion S25FL129P (256K block) device */ +# define SPIFI_DEVICE_S25FL164K 0 /**< Enables Spansion S25FL164K device */ +# define SPIFI_DEVICE_S25FL256S_64K 0 /**< Enables Spansion S25FL256S (64K block) device */ +# define SPIFI_DEVICE_S25FL256S_256K 0 /**< Enables Spansion S25FL256S (256K block) device */ +# define SPIFI_DEVICE_S25FL512S 0 /**< Enables Spansion S25FL512S device */ +# define SPIFI_DEVICE_MX25L1635E 0 /**< Enables Macronix MX25L1635E device */ +# define SPIFI_DEVICE_MX25L3235E 0 /**< Enables Macronix MX25L3235E device */ +# define SPIFI_DEVICE_MX25L8035E 0 /**< Enables Macronix MX25L8035E device */ +# define SPIFI_DEVICE_MX25L6435E 0 /**< Enables Macronix MX25L6435E device */ +# define SPIFI_DEVICE_W25Q32FV 0 /**< Enables Winbond W25Q32FV device */ +# define SPIFI_DEVICE_W25Q64FV 0 /**< Enables Winbond W25Q32V device */ +# define SPIFI_DEVICE_W25Q80BV 1 /**< Enables Winbond W25Q80BV device */ +# define SPIFI_DEVICE_REQUENCY_DIVIDER 2 /* PLL1 clock divider */ +#endif + +/* UART clocking ***********************************************************/ +/* Configure all U[S]ARTs to use the XTAL input frequency */ + +#define BOARD_USART0_CLKSRC BASE_USART0_CLKSEL_XTAL +#define BOARD_USART0_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_UART1_CLKSRC BASE_UART1_CLKSEL_XTAL +#define BOARD_UART1_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_USART2_CLKSRC BASE_USART2_CLKSEL_XTAL +#define BOARD_USART2_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_USART3_CLKSRC BASE_USART3_CLKSEL_XTAL +#define BOARD_USART3_BASEFREQ BOARD_XTAL_FREQUENCY + + +/* SSP clocking *********************************************************** + * + * BOARD_SSPX_BASEFREQ may be further divided by 2-254 to get the SSP clock. If we + * want a usable range of 400KHz to 25MHz for the SSP, then: + * + * 1. SSPCLK must be greater than (2*25MHz) = 50MHz, and + * 2. SSPCLK must be less than (254*400Khz) = 101.6MHz. + * + */ + +#define BOARD_SSP0_CLKSRC BASE_SSP0_CLKSEL_IDIVA +#define BOARD_SSP0_BASEFREQ BOARD_IDIVA_FREQUENCY + +#define BOARD_SSP1_CLKSRC BASE_SSP1_CLKSEL_IDIVA +#define BOARD_SSP1_BASEFREQ BOARD_IDIVA_FREQUENCY + +/* LED definitions *********************************************************/ +/* LED1 K2 GPIO0[8] + * + * LED index values for use with board_userled() + */ + +#define BOARD_LED 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_BIT (1 << BOARD_LED) + +/* If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows + * for NuttX debug functionality (where NC means "No Change"). If + * CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under + * control of the application. The following interfaces are then available + * for application control of the LEDs: + * + * void board_userled_initialize(void); + * void board_userled(int led, bool ledon); + * void board_userled_all(uint8_t ledset); + */ + /* LED */ +#define LED_STARTED 0 /* OFF */ +#define LED_HEAPALLOCATE 0 /* OFF */ +#define LED_IRQSENABLED 0 /* OFF */ +#define LED_STACKCREATED 1 /* ON */ +#define LED_INIRQ 2 /* NC */ +#define LED_SIGNAL 2 /* NC */ +#define LED_ASSERTION 2 /* NC */ +#define LED_PANIC 3 /* Flashing */ + +/* UART Pins ****************************************************************/ +/* + * The following definitions must be provided so that the LPC43 serial + * driver can set up the U[S]ART for the serial console properly (see the + * file arch/arc/src/lpc43xx/lpc43*_pinconf.h for more info). + */ + +#define PINCONF_U0_TXD PINCONF_U0_TXD_3 +#define PINCONF_U0_RXD PINCONF_U0_RXD_3 +#define PINCONF_U0_DIR PINCONF_U0_DIR_3 + +#define PINCONF_U1_TXD PINCONF_U1_TXD_1 +#define PINCONF_U1_RXD PINCONF_U1_RXD_1 + +#define PINCONF_U2_TXD PINCONF_U2_TXD_2 +#define PINCONF_U2_RXD PINCONF_U2_RXD_2 +#define PINCONF_U2_DIR PINCONF_U2_DIR_2 + +#define PINCONF_U3_TXD PINCONF_U3_TXD_2 +#define PINCONF_U3_RXD PINCONF_U3_RXD_2 +#define PINCONF_U3_DIR PINCONF_U3_DIR_2 + +/* I2C1 pins, not really accessible on the board */ + +#define PINCONF_I2C1_SCL PINCONF_I2C1_SCL_1 +#define PINCONF_I2C1_SDA PINCONF_I2C1_SDA_1 + +/* SSP1 pins */ + +#define PINCONF_SSP1_MISO PINCONF_SSP1_MISO_3 +#define PINCONF_SSP1_MOSI PINCONF_SSP1_MOSI_3 +#define PINCONF_SSP1_SCK PINCONF_SSP1_SCK_1 +#define PINCONF_SSP1_SSEL PINCONF_SSP1_SSEL_1 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc43_boardinitialize + * + * Description: + * All LPC43xx architectures must provide the following entry point. This + * entry point is called early in the intitialization -- after all memory + * has been configured and mapped but before any devices have been + * initialized. + * + ****************************************************************************/ + +void lpc43_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_LPC4357_LINK2_INCLUDE_BOARD_H */ diff --git a/configs/lpc4370-link2/nsh/Make.defs b/configs/lpc4370-link2/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..d4b811e51f7d682037d38b141f5aae335cfb3264 --- /dev/null +++ b/configs/lpc4370-link2/nsh/Make.defs @@ -0,0 +1,131 @@ +############################################################################ +# configs/lpc4370-link2/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +# Setup for the kind of memory that we are executing from + +ifeq ($(CONFIG_LPC43_BOOT_SRAM),y) + LDSCRIPT = ramconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_SPIFI),y) + LDSCRIPT = spificonfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_FLASHA),y) + LDSCRIPT = flashaconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_FLASHB),y) + LDSCRIPT = flashaconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_CS0FLASH),y) + LDSCRIPT = cs0flash.ld +endif + +# Setup for Windows vs Linux/Cygwin/OSX environments + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lpc4370-link2/nsh/defconfig b/configs/lpc4370-link2/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..949db2b1e7249b0e15f9909072a7b94861a4bdb9 --- /dev/null +++ b/configs/lpc4370-link2/nsh/defconfig @@ -0,0 +1,925 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +CONFIG_ARCH_STDARG_H=y +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +CONFIG_ARCH_CHIP_LPC43XX=y +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc43xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC43xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC4310FBD144 is not set +# CONFIG_ARCH_CHIP_LPC4310FET100 is not set +# CONFIG_ARCH_CHIP_LPC4320FBD144 is not set +# CONFIG_ARCH_CHIP_LPC4320FET100 is not set +# CONFIG_ARCH_CHIP_LPC4330FBD144 is not set +# CONFIG_ARCH_CHIP_LPC4330FET100 is not set +# CONFIG_ARCH_CHIP_LPC4330FET180 is not set +# CONFIG_ARCH_CHIP_LPC4330FET256 is not set +# CONFIG_ARCH_CHIP_LPC4337JBD144 is not set +# CONFIG_ARCH_CHIP_LPC4350FBD208 is not set +# CONFIG_ARCH_CHIP_LPC4350FET180 is not set +# CONFIG_ARCH_CHIP_LPC4350FET256 is not set +# CONFIG_ARCH_CHIP_LPC4353FBD208 is not set +# CONFIG_ARCH_CHIP_LPC4353FET180 is not set +# CONFIG_ARCH_CHIP_LPC4353FET256 is not set +# CONFIG_ARCH_CHIP_LPC4357FET180 is not set +# CONFIG_ARCH_CHIP_LPC4357FBD208 is not set +# CONFIG_ARCH_CHIP_LPC4357FET256 is not set +CONFIG_ARCH_CHIP_LPC4370FET100=y +CONFIG_ARCH_FAMILY_LPC4370=y +# CONFIG_LPC43_BOOT_SRAM is not set +CONFIG_LPC43_BOOT_SPIFI=y +# CONFIG_LPC43_BOOT_FLASHA is not set +# CONFIG_LPC43_BOOT_FLASHB is not set +# CONFIG_LPC43_BOOT_CS0FLASH is not set +# CONFIG_LPC43_BOOT_CS1FLASH is not set +# CONFIG_LPC43_BOOT_CS2FLASH is not set +# CONFIG_LPC43_BOOT_CS3FLASH is not set + +# +# LPC43xx Peripheral Support +# +# CONFIG_LPC43_ADC0 is not set +# CONFIG_LPC43_ADC1 is not set +# CONFIG_LPC43_ATIMER is not set +# CONFIG_LPC43_CAN1 is not set +# CONFIG_LPC43_CAN2 is not set +# CONFIG_LPC43_DAC is not set +# CONFIG_LPC43_EMC is not set +# CONFIG_LPC43_ETHERNET is not set +# CONFIG_LPC43_EVNTMNTR is not set +# CONFIG_LPC43_GPDMA is not set +CONFIG_LPC43_I2C0=y +# CONFIG_LPC43_I2C0_SUPERFAST is not set +# CONFIG_LPC43_I2C1 is not set +# CONFIG_LPC43_I2S0 is not set +# CONFIG_LPC43_I2S1 is not set +# CONFIG_LPC43_LCD is not set +# CONFIG_LPC43_MCPWM is not set +# CONFIG_LPC43_QEI is not set +# CONFIG_LPC43_RIT is not set +# CONFIG_LPC43_RTC is not set +# CONFIG_LPC43_SCT is not set +# CONFIG_LPC43_SDMMC is not set +# CONFIG_LPC43_SPI is not set +CONFIG_LPC43_SPIFI=y +# CONFIG_LPC43_SSP0 is not set +CONFIG_LPC43_SSP1=y +# CONFIG_LPC43_TMR0 is not set +# CONFIG_LPC43_TMR1 is not set +# CONFIG_LPC43_TMR2 is not set +# CONFIG_LPC43_TMR3 is not set +# CONFIG_LPC43_USART0 is not set +# CONFIG_LPC43_UART1 is not set +CONFIG_LPC43_USART2=y +# CONFIG_LPC43_USART3 is not set +# CONFIG_LPC43_USBOTG is not set +CONFIG_LPC43_USB0=y +# CONFIG_LPC43_USB1 is not set +# CONFIG_LPC43_WWDT is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=18535 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=131072 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC4370_LINK2=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lpc4370-link2" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +CONFIG_SCHED_TICKLESS=y +CONFIG_SCHED_TICKLESS_ALARM=y +# CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP is not set +CONFIG_USEC_PER_TICK=1000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=11 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +CONFIG_USBDEV_DUALSPEED=y +# CONFIG_USBDEV_SELFPOWERED is not set +CONFIG_USBDEV_BUSPOWERED=y +CONFIG_USBDEV_MAXPOWER=500 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=512 +CONFIG_CDCACM_TXBUFSIZE=2048 +CONFIG_CDCACM_VENDORID=0x03EB +CONFIG_CDCACM_PRODUCTID=0x2044 +CONFIG_CDCACM_VENDORSTR="nuttx" +CONFIG_CDCACM_PRODUCTSTR="lpc4370-link2" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=0 +CONFIG_I2CTOOL_MAXBUS=1 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=100000 +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +CONFIG_SYSTEM_CDCACM=y +CONFIG_SYSTEM_CDCACM_DEVMINOR=0 +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lpc4370-link2/nsh/setenv.sh b/configs/lpc4370-link2/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..e9d6bc9372f594f1b0e005485833d3130d3100e4 --- /dev/null +++ b/configs/lpc4370-link2/nsh/setenv.sh @@ -0,0 +1,92 @@ +#!/bin/bash +# configs/lpc4370-link2/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Code Red +# toolchain under windows. You will have to edit this if you install the +# Code Red toolchain in any other location or if you install a different +# version +export TOOLCHAIN_BIN="/cygdrive/c/Users/Public/tools/bin" +#export SCRIPT_BIN="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin" +export SCRIPT_BIN="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export SCRIPT_BIN= + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" +#export SCRIPT_BIN= + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +#export SCRIPT_BIN= + +# And add the selected toolchain path[s] to the PATH variable + +export PATH="/sbin:/usr/sbin:${PATH_ORIG}" + +if [ ! -z ${SCRIPT_BIN} ]; then + export PATH="${SCRIPT_BIN}:${PATH}" +fi + +export PATH="${TOOLCHAIN_BIN}:${PATH}" +echo "PATH : ${PATH}" + +# Set an alias that can be used to put the LPC43xx in boot mode + +alias lpc43xx='${SCRIPT_BIN}/Scripts/bootLPCXpresso.cmd winusb' diff --git a/configs/lpc4370-link2/scripts/flash.bat b/configs/lpc4370-link2/scripts/flash.bat new file mode 100644 index 0000000000000000000000000000000000000000..7a269a21753d33e78161d47f0a18699e6a7abe31 --- /dev/null +++ b/configs/lpc4370-link2/scripts/flash.bat @@ -0,0 +1,9 @@ +set LPCScrypt=C:\NXP\LPCScrypt\bin + +call %LPCScrypt%\..\scripts\boot_lpcscrypt.cmd + +TIMEOUT /T 5 + +%LPCScrypt%\lpcscrypt.exe erase SPIFI +%LPCScrypt%\lpcscrypt.exe program ..\..\..\nuttx.bin SPIFI + \ No newline at end of file diff --git a/configs/lpc4370-link2/scripts/flash.sh b/configs/lpc4370-link2/scripts/flash.sh new file mode 100644 index 0000000000000000000000000000000000000000..a239e9b5dcf92807ed87cdd2b9b213bb520b7b68 --- /dev/null +++ b/configs/lpc4370-link2/scripts/flash.sh @@ -0,0 +1,153 @@ +#!/bin/bash +#################################################################################### +# flash.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +#################################################################################### +set -x + +USAGE="$0 " + +# LPCXpresso 3.6 installed at /cygdrive/c/nxp/lpcxpresso_3.6" +BINDIR="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin" + +# RedSuite with LPC4330 support installed at /cygdrive/c/code_red/RedSuite_4.2.3_379 " +#BINDIR="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin" + +TARGET=LPC4330 + +echo "############################################################################" +echo "# Assumptions:" +echo "#" +echo "# - Windows 7" +echo "# - Binaries installed at ${BINDIR}" +echo "# - AXF image built with Code Red" +echo "# - ${TARGET}" +echo "#" +echo "# You will need to edit this is any of the above are false" +echo "#" +echo "############################################################################" +echo "" + +# This is the default install location for binaries on Windows (note that this +# path could change with the Code Red version number) + +if [ ! -d "${BINDIR}" ]; then + echo "Directory ${BINDIR} does not exist" + exit 1 +fi + +# This is the relative path to the booLPCXpresso utility. + +BOOTLPC="Scripts/bootLPCXpresso.cmd" +if [ ! -x "${BINDIR}/${BOOTLPC}" ]; then + echo "No executable at ${BINDIR}/${BOOTLPC}" + exit 1 +fi + +# bootLPCXpresso arguments + +BOOTLPC_ARG=winusb # Win7 + +# Use the LPC18xx/LPC43xx flash utility + +FLASHUTIL="crt_emu_lpc18_43_nxp" # for LPC18xx/LPC43xx parts + +if [ ! -x "${BINDIR}/${FLASHUTIL}" ]; then + echo "No executable file at ${BINDIR}/${FLASHUTIL}" + exit 1 +fi + +# FLUSHUTIL arguements + +WIRE="-wire=winusb" # for LPC-Link on Windows Vista/Windows 7) + +# The nuttx directory must be provided as an argument + +NUTTX=$1 +if [ -z "${NUTTX}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +if [ ! -d "${NUTTX}" ]; then + echo "Directory ${NUTTX} does not exist" + echo $USAGE + exit 1 +fi + +# The binary to download: + +if [ ! -f "${NUTTX}/nuttx.axf" ]; then + if [ -f "${NUTTX}/nuttx" ]; then + echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf" + mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf + fi +else + if [ -f "${NUTTX}/nuttx" ]; then + echo "Both ${NUTTX}/nuttx ${NUTTX}/nuttx.axf exist.." + echo " Deleting ${NUTTX}/nuttx.axf" + rm -f ${NUTTX}/nuttx.axf + echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf" + mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf + fi +fi +NUTTXPATH=`cygpath -w "${NUTTX}/nuttx.axf"` + +# First of all boot the LPC-Link using the script: ${BINDIR}/${BOOTLPC} + +cd ${BINDIR} || \ + { echo "Failed to CD to ${BINDIR}"; exit 1; } +./${BOOTLPC} ${BOOTLPC_ARG} || \ + { echo "'${BOOTLPC} ${BOOTLPC_ARG}' Failed"; } + +echo "" +echo "Wait a bit" +echo "5..." +sleep 1 +echo "4..." +sleep 1 +echo "3..." +sleep 1 +echo "2..." +sleep 1 +echo "1..." +sleep 1 +echo "0..." +echo "" + +# Then program the FLASH + +cd ${BINDIR} || \ + { echo "Failed to CD to ${BINDIR}"; exit 1; } +./${FLASHUTIL} ${WIRE} -p${TARGET} -flash-load-exec="${NUTTXPATH}" diff --git a/configs/lpc4370-link2/scripts/ramconfig.ld b/configs/lpc4370-link2/scripts/ramconfig.ld new file mode 100644 index 0000000000000000000000000000000000000000..4449dc1195991b086d9d03b453e084fde4e57573 --- /dev/null +++ b/configs/lpc4370-link2/scripts/ramconfig.ld @@ -0,0 +1,150 @@ +/**************************************************************************** + * configs/lpc4370-link2/scripts/ramconfig.ld + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* + * Power-Up Reset Overview + * ----------------------- + * + * The ARM core starts executing code on reset with the program counter set + * to 0x0000 0000. The LPC43xx contains a shadow pointer register that + * allows areas of memory to be mapped to address 0x0000 0000. The default, + * reset value of the shadow pointer is 0x1040 0000 so that on reset code in + * the boot ROM is always executed first. + * + * The boot starts after reset is released. The IRC is selected as CPU clock + * and the Cortex-M4 starts the boot loader. By default the JTAG access to the + * chip is disabled at reset. The boot ROM determines the boot mode based on + * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part + * boots from internal flash by default. Otherwse, the boot ROM copies the + * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow + * pointer to 0x1000 0000, and jumps to that location. + * + * However, using JTAG the executable image can be also loaded directly into + * and executed from SRAM. + */ + +/* The LPC4330 on the LPC4330-Xplorer has the following memory resources: + * + * 1. 4096Kb of SPIFI FLASH beginning at address 0x1400:0000 + * 2. 264KB of total SRAM: + * a. 128KB of SRAM in the CPU block beginning at address 0x1000:0000 + * b. 72KB beginning at address 0x1008:0000 and + * c. 64KB of AHB SRAM in three banks beginning at addresses 0x2000:0000, + * 0x2000:8000 and 0x2000:C000. + * 3. No internal FLASH + * + * Here we assume that: + * + * 1. We will be running out of SRAM at 0x1000:0000, and + * 2. All .data and .bss will all fit into the 72KB SRAM block. + * + * NOTE: That initialized data is kept in the program memory SRAM and copied + * to .data SRAM. This is wasteful and unnecessary but provides a good test + * for future, FLASH-resident code. + */ + +MEMORY +{ + progmem (rx) : ORIGIN = 0x10000000, LENGTH = 128K + datamem (rwx) : ORIGIN = 0x10080000, LENGTH = 72K +} + +OUTPUT_ARCH(arm) +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ +EXTERN(_vectors) /* Force the vectors to be included in the output */ +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progmem + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progmem + + .ARM.extab : { + *(.ARM.extab*) + } > progmem + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progmem + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datamem AT > progmem + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datamem + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lpc4370-link2/scripts/spificonfig.ld b/configs/lpc4370-link2/scripts/spificonfig.ld new file mode 100644 index 0000000000000000000000000000000000000000..d0f420c0e8c88b09afd99a1216a8c04778787a83 --- /dev/null +++ b/configs/lpc4370-link2/scripts/spificonfig.ld @@ -0,0 +1,149 @@ +/**************************************************************************** + * configs/lpc4370-link2/scripts/spificonfig.ld + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* + * Power-Up Reset Overview + * ----------------------- + * + * The ARM core starts executing code on reset with the program counter set + * to 0x0000 0000. The LPC43xx contains a shadow pointer register that + * allows areas of memory to be mapped to address 0x0000 0000. The default, + * reset value of the shadow pointer is 0x1040 0000 so that on reset code in + * the boot ROM is always executed first. + * + * The boot starts after reset is released. The IRC is selected as CPU clock + * and the Cortex-M4 starts the boot loader. By default the JTAG access to the + * chip is disabled at reset. The boot ROM determines the boot mode based on + * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part + * boots from internal flash by default. Otherwse, the boot ROM copies the + * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow + * pointer to 0x1000 0000, and jumps to that location. + * + * Of course, using JTAG the executable image can be also loaded directly + * into and executed from SRAM. + */ + +/* The LPC4370 on the LPC4370-Link2 has the following memory resources: + * + * 1. 4096Kb of SPIFI FLASH beginning at address 0x1400:0000 + * 2. 264KB of total SRAM: + * a. 128KB of SRAM in the CPU block beginning at address 0x1000:0000 + * b. 72KB beginning at address 0x1008:0000 and + * c. 64KB of AHB SRAM in three banks beginning at addresses 0x2000:0000, + * 0x2000:8000 and 0x2000:C000. + * 3. No internal FLASH + * + * Here we assume that: + * + * 1. We will be running out of SPIFI flash at 0x1400:0000, and + * 2. All .data and .bss will all fit into the 128KB CPU SRAM block. + */ + +MEMORY +{ + progmem (rx) : ORIGIN = 0x14000000, LENGTH = 1024K + datamem (rwx) : ORIGIN = 0x10000000, LENGTH = 128K +} + +OUTPUT_ARCH(arm) +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ +EXTERN(_vectors) /* Force the vectors to be included in the output */ +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(EXCLUDE_FILE (*spifilib*) .text .text.*) + *(.fixup) + *(.gnu.warning) + *(EXCLUDE_FILE (*spifilib*) .rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progmem + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progmem + + .ARM.extab : { + *(.ARM.extab*) + } > progmem + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progmem + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *spifilib*(.text .text.*) + *spifilib*( .rodata .rodata.*) + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datamem AT > progmem + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datamem + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lpc4370-link2/src/.gitignore b/configs/lpc4370-link2/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/lpc4370-link2/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/lpc4370-link2/src/Makefile b/configs/lpc4370-link2/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..24ef04f17336e5bc3a87e5e65a6505d488e47ae7 --- /dev/null +++ b/configs/lpc4370-link2/src/Makefile @@ -0,0 +1,68 @@ +############################################################################ +# configs/lpc4370-link2/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc43_boot.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc43_appinit.c +endif + +ifeq ($(CONFIG_ARCH_FPU),y) +CSRCS += lpc43_ostest.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += lpc43_autoleds.c +else +CSRCS += lpc43_userleds.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += lpc43_usbmsc.c +endif + +ifeq ($(CONFIG_LPC43_ADC0),y) +CSRCS += lpc43_adc.c +endif + +ifeq ($(CONFIG_SPIFI_LIBRARY),y) +CSRCS += lpc43_spifilib_init.c +endif + +include $(TOPDIR)/configs/Board.mk + diff --git a/configs/lpc4370-link2/src/lpc4370-link2.h b/configs/lpc4370-link2/src/lpc4370-link2.h new file mode 100644 index 0000000000000000000000000000000000000000..887d5b94f4935faf78f704c6ee2f6af4c8846d93 --- /dev/null +++ b/configs/lpc4370-link2/src/lpc4370-link2.h @@ -0,0 +1,106 @@ +/**************************************************************************** + * configs/lpc4370-link2/src/lpc4370-link2.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef _CONFIGS_LPC4370_LINK2_SRC_LPC3257_LINK2_H +#define _CONFIGS_LPC4370_LINK2_SRC_LPC3257_LINK2_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "lpc43_pinconfig.h" +#include "lpc43_gpio.h" +#include "lpc43_spifi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Do we need to register I2C drivers on behalf of the I2C tool? */ + +#define HAVE_I2CTOOL 1 +#if !defined(CONFIG_SYSTEM_I2CTOOL) || !defined(CONFIG_I2C_DRIVER) +# undef HAVE_I2CTOOL +#endif + +/* LED definitions **********************************************************/ +/* The LPC4370-LINK2 has one user-controllable LED labelled D6 controlled by + * the signal LED_3V3: + * + * ---- ------- ------------- + * LED SIGNAL MCU + * ---- ------- ------------- + * D6 LED_3V3 PE_7 GPIO0[8] + * ---- ------- ------------- + * + * A low output illuminates the LED. + * + * Definitions to configure LED pins as GPIOs: + * + * - Floating + * - Normal drive + * - No buffering, glitch filtering, slew=slow + */ + +#define PINCONFIG_LED PINCONF_GPIO0p8 + +/* Definitions to configure LED GPIO as outputs */ + +#define GPIO_LED (GPIO_MODE_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN8) + +/* Button definitions *******************************************************/ +/* to be provided */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void board_spifi_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_LPC4370_LINK2_SRC_LPC3257_LINK2_H */ + diff --git a/configs/lpc4370-link2/src/lpc43_adc.c b/configs/lpc4370-link2/src/lpc43_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..531b25ad7e6ee8d5af6eea8f8ab3a7c44fb17f9e --- /dev/null +++ b/configs/lpc4370-link2/src/lpc43_adc.c @@ -0,0 +1,110 @@ +/************************************************************************************ + * configs/lpc4370-link2/src/lpc43_adc.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Kannan + * + * Based on configs/stm3220g-eval/src/lpc43_adc.c + * + * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "lpc43_adc.h" + +#if defined(CONFIG_LPC43_ADC0) || defined(CONFIG_LPC43_ADC1) + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All LPC43 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call lpc43_adcinitialize() to get an instance of the ADC interface */ + + adc = lpc43_adcinitialize(); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_ADC */ diff --git a/configs/lpc4370-link2/src/lpc43_appinit.c b/configs/lpc4370-link2/src/lpc43_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..74fce0eb1f449f27014811d1b7f96324484c8515 --- /dev/null +++ b/configs/lpc4370-link2/src/lpc43_appinit.c @@ -0,0 +1,127 @@ +/**************************************************************************** + * config/lpc4370-link2/src/lpc43_appinit.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "lpc43_i2c.h" +#include "chip.h" + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc43_i2c_register + * + * Description: + * Register one I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void lpc43_i2c_register(int bus) +{ + FAR struct i2c_master_s *i2c; + int ret; + + i2c = lpc43_i2cbus_initialize(bus); + if (i2c == NULL) + { + dbg("ERROR: Failed to get I2C%d interface\n", bus); + } + else + { + ret = i2c_register(i2c, bus); + if (ret < 0) + { + dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); + lpc43_i2cbus_uninitialize(i2c); + } + } +} +#endif + +/**************************************************************************** + * Name: lpc43_i2ctool + * + * Description: + * Register I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void lpc43_i2ctool(void) +{ +#ifdef CONFIG_LPC43_I2C0 + lpc43_i2c_register(0); +#endif +#ifdef CONFIG_STM32_I2C1 + lpc43_i2c_register(1); +#endif +} +#else +# define lpc43_i2ctool() +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + /* Register I2C drivers on behalf of the I2C tool */ + + lpc43_i2ctool(); + return OK; +} diff --git a/configs/lpc4370-link2/src/lpc43_autoleds.c b/configs/lpc4370-link2/src/lpc43_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..f9458b0e57587786b86bcdd876ccbf403bea110c --- /dev/null +++ b/configs/lpc4370-link2/src/lpc43_autoleds.c @@ -0,0 +1,177 @@ +/**************************************************************************** + * configs/lpc4370-link2/src/lpc43_autoleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc4370-link2.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Debug definitions ********************************************************/ +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define LED_VERBOSE 1 +# define ledvdbg lldbg +# else +# undef LED_VERBOSE +# define ledvdbg(x...) +# endif +#else +# undef LED_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_dumppins + ****************************************************************************/ + +#ifdef LED_VERBOSE +static void led_dumppins(FAR const char *msg) +{ + lpc43_pin_dump(PINCONFIG_LED, msg); + lpc43_gpio_dump(GPIO_LED, msg); +} +#else +# define led_dumppins(m) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED pin as a GPIO outputs */ + + led_dumppins("board_autoled_initialize() Entry)"); + + /* Configure LED pin as a GPIO, then configure GPIO as an outputs */ + + lpc43_pin_config(PINCONFIG_LED); + lpc43_gpio_config(GPIO_LED); + + led_dumppins("board_autoled_initialize() Exit"); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool ledon = true; /* OFF. Low illuminates */ + + switch (led) + { + default: + case 0: + break; /* LED OFF until state 1 */ + + case 2: + return; /* LED no change */ + + case 1: + case 3: + ledon = false; /* LED ON. Low illuminates */ + break; + } + + /* Turn LED on or off, depending on state */ + + lpc43_gpio_write(GPIO_LED, ledon); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + default: + case 0: + case 1: + case 3: + break; /* LED OFF */ + + case 2: + return; /* LED no change */ + } + + /* LED OFF, Low illuminates */ + + lpc43_gpio_write(GPIO_LED, true); +} + +#endif /* CONFIG_ARCH_LEDS */ + diff --git a/configs/lpc4370-link2/src/lpc43_boot.c b/configs/lpc4370-link2/src/lpc43_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..3ea2d10159578b128056ae272aea3877e3f9f188 --- /dev/null +++ b/configs/lpc4370-link2/src/lpc43_boot.c @@ -0,0 +1,85 @@ +/************************************************************************************ + * configs/lpc4370-link2/src/lpc43_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc4370-link2.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc43_boardinitialize + * + * Description: + * All LPC43xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc43_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + +#ifdef CONFIG_SPIFI_LIBRARY + board_spifi_initialize(); +#endif +} diff --git a/configs/lpc4370-link2/src/lpc43_ostest.c b/configs/lpc4370-link2/src/lpc43_ostest.c new file mode 100644 index 0000000000000000000000000000000000000000..c1ae98937af5182a9b3de499cc2f226e50cb11e9 --- /dev/null +++ b/configs/lpc4370-link2/src/lpc43_ostest.c @@ -0,0 +1,114 @@ +/************************************************************************************ + * configs/lpc4370-link2/src/lpc43_ostest.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "lpc4370-link2.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#undef HAVE_FPU +#if defined(CONFIG_ARCH_FPU) && defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && \ + defined(CONFIG_SCHED_WAITPID) && !defined(CONFIG_DISABLE_SIGNALS) && \ + !defined(CONFIG_ARMV7M_CMNVECTOR) +# define HAVE_FPU 1 +#endif + +#ifdef HAVE_FPU + +#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*SW_FPU_REGS) +# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size" +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static uint32_t g_saveregs[XCPTCONTEXT_REGS]; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ +/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return + * the current FPU registers. + */ + +void arch_getfpu(FAR uint32_t *fpusave) +{ + irqstate_t flags; + + /* Take a snapshot of the thread context right now */ + + flags = enter_critical_section(); + up_saveusercontext(g_saveregs); + + /* Return only the floating register values */ + + memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS)); + leave_critical_section(flags); +} + +/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function + * will compare them and return true if they are identical. + */ + +bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2) +{ + return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0; +} + +#endif /* HAVE_FPU */ + diff --git a/configs/lpc4370-link2/src/lpc43_spifilib_init.c b/configs/lpc4370-link2/src/lpc43_spifilib_init.c new file mode 100644 index 0000000000000000000000000000000000000000..bf669f75e869a3f516d4f0dd7189a0bc86eebf97 --- /dev/null +++ b/configs/lpc4370-link2/src/lpc43_spifilib_init.c @@ -0,0 +1,131 @@ +/**************************************************************************** + * configs/lpc4370-link2/src/lpc43_spifilib_init.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "lpc43_spifi.h" +#include "lpc43_cgu.h" + +#include "lpc4370-link2.h" + +#include "spifi/inc/spifilib_api.h" + +#ifdef CONFIG_SPIFI_LIBRARY + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Local memory, 32-bit aligned that will be used for driver context + * (handle). + */ + +static uint32_t lmem[21]; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void board_spifi_initialize(void) +{ + irqstate_t flags = enter_critical_section(); + uint32_t regval; + + flags = enter_critical_section(); + + /* Initial frequency is set by boot ROM in IDIVE */ + + /* Pin configuration */ + + lpc43_pin_config(PINCONF_SPIFI_CS); + lpc43_pin_config(PINCONF_SPIFI_MISO); + lpc43_pin_config(PINCONF_SPIFI_MOSI); + lpc43_pin_config(PINCONF_SPIFI_SCK); + lpc43_pin_config(PINCONF_SPIFI_SIO2); + lpc43_pin_config(PINCONF_SPIFI_SIO3); + + /* Initialize LPCSPIFILIB library, reset the interface */ + + spifiInit(LPC43_SPIFI_CTRL, true); + + /* Register the family for the device */ + + spifiRegisterFamily(spifi_REG_FAMILY_CommonCommandSet); + + /* Initialize and detect a device and get device context */ + + SPIFI_HANDLE_T* pSpifi = spifiInitDevice(&lmem, sizeof(lmem), + LPC43_SPIFI_CTRL, + LPC43_LOCSRAM_SPIFI_BASE); + + /* Enable quad. If not supported it will be ignored */ + + spifiDevSetOpts(pSpifi, SPIFI_OPT_USE_QUAD, true); + + /* Enter memMode */ + + spifiDevSetMemMode(pSpifi, true); + + /* Configure divider as the input to the SPIFI */ + + regval = getreg32(LPC43_BASE_SPIFI_CLK); + regval &= ~BASE_SPIFI_CLK_CLKSEL_MASK; + regval |= BASE_SPIFI_CLKSEL_IDIVE; + putreg32(regval, LPC43_BASE_SPIFI_CLK); + + regval = getreg32(LPC43_IDIVE_CTRL); + regval &= ~(IDIVE_CTRL_CLKSEL_MASK | IDIVE_CTRL_IDIV_MASK); + regval |= BASE_SPIFI_CLKSEL_PLL1 | IDIVE_CTRL_AUTOBLOCK | + IDIVE_CTRL_IDIV(SPIFI_DEVICE_REQUENCY_DIVIDER); + putreg32(regval, LPC43_IDIVE_CTRL); + + leave_critical_section(flags); +} + +#endif /* CONFIG_SPIFI_LIBRARY */ diff --git a/configs/lpc4370-link2/src/lpc43_userleds.c b/configs/lpc4370-link2/src/lpc43_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..c2953a361794522a86c67901d3ca45d11a5af176 --- /dev/null +++ b/configs/lpc4370-link2/src/lpc43_userleds.c @@ -0,0 +1,148 @@ +/**************************************************************************** + * configs/lpc4370-link2/src/lpc43_userleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc4370-link2.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED definitions **********************************************************/ + + +/* Debug definitions ********************************************************/ +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define LED_VERBOSE 1 +# define ledvdbg lldbg +# else +# undef LED_VERBOSE +# define ledvdbg(x...) +# endif +#else +# undef LED_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_dumppins + ****************************************************************************/ + +#ifdef LED_VERBOSE +static void led_dumppins(FAR const char *msg) +{ + lpc43_pin_dump(PINCONFIG_LED, msg); + lpc43_gpio_dump(GPIO_LED, msg); +} +#else +# define led_dumppins(m) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED pin as a GPIO outputs */ + + led_dumppins("board_userled_initialize() Entry)"); + + /* Configure LED pin as a GPIO, then configure GPIO as an outputs */ + + lpc43_pin_config(PINCONFIG_LED); + lpc43_gpio_config(GPIO_LED); + + led_dumppins("board_userled_initialize() Exit"); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_LED) + { + lpc43_gpio_write(GPIO_LED, !ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + lpc43_gpio_write(GPIO_LED, (ledset & BOARD_LED_BIT) == 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ + diff --git a/configs/lpcxpresso-lpc1115/Kconfig b/configs/lpcxpresso-lpc1115/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..dc265e824689e12259d19c8f9acec3c66fcf1696 --- /dev/null +++ b/configs/lpcxpresso-lpc1115/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_LPCXPRESSO_LPC1115 +endif diff --git a/configs/lpcxpresso-lpc1115/README.txt b/configs/lpcxpresso-lpc1115/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..3a0beb1e7fc70b1444918d9def06d8faee772afc --- /dev/null +++ b/configs/lpcxpresso-lpc1115/README.txt @@ -0,0 +1,767 @@ +README +^^^^^^ + +README for NuttX port to the Embedded Artists LPCXpresso LPC1115 board +featuring the NXP LPC1115 MCU. + +Contents +^^^^^^^^ + + LCPXpresso LPC1115 Board + Development Environment + GNU Toolchain Options + NuttX EABI "buildroot" Toolchain + NuttX OABI "buildroot" Toolchain + NXFLAT Toolchain + Code Red IDE + Using OpenOCD + LEDs + LPCXpresso Configuration Options + Configurations + +LCPXpresso LPC1115 Board +^^^^^^^^^^^^^^^^^^^^^^^^ + + Pin Description Connector + -------------------------------- --------- + + P0[0]/RD1/TXD3/SDA1 J6-9 + P0[1]/TD1/RXD3/SCL J6-10 + P0[2]/TXD0/AD0[7] J6-21 + P0[3]/RXD0/AD0[6] J6-22 + P0[4]/I2SRX-CLK/RD2/CAP2.0 J6-38 + P0[5]/I2SRX-WS/TD2/CAP2.1 J6-39 + P0[6]/I2SRX_SDA/SSEL1/MAT2[0] J6-8 + P0[7]/I2STX_CLK/SCK1/MAT2[1] J6-7 + P0[8]/I2STX_WS/MISO1/MAT2[2] J6-6 + P0[9]/I2STX_SDA/MOSI1/MAT2[3] J6-5 + P0[10] J6-40 + P0[11] J6-41 + + P1[0]/ENET-TXD0 J6-34? + P1[1]/ENET_TXD1 J6-35? + P1[4]/ENET_TX_EN + P1[8]/ENET_CRS + P1[9]/ENET_RXD0 + P1[10]/ENET_RXD1 + + P2[0]/PWM1.1/TXD1 + P2[1]/PWM1.2/RXD1 J6-43 + P2[2]/PWM1.3/CTS1/TRACEDATA[3] J6-44 + P2[3]/PWM1.4/DCD1/TRACEDATA[2] J6-45 + P2[4]/PWM1.5/DSR1/TRACEDATA[1] J6-46 + P2[5]/PWM1[6]/DTR1/TRACEDATA[0] J6-47 + P2[6]/PCAP1[0]/RI1/TRACECLK J6-48 + P2[7]/RD2/RTS1 J6-49 + P2[8]/TD2/TXD2 J6-50 + P2[9]/USB_CONNECT/RXD2 PAD19 + P2[10]/EINT0/NMI J6-51 + + P3[25]/MAT0.0/PWM1.2 PAD13 + P3[26]/STCLK/MAT0.1/PWM1.3 PAD14 + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The Code Red GNU toolchain + 2. The CodeSourcery GNU toolchain, + 3. The devkitARM GNU toolchain, + 4. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the Code Red toolchain and the + make system is setup to default to use the Code Red Linux toolchain. To use + the other toolchain, you simply need add one of the following configuration + options to your .config (or defconfig) file: + + CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV6M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV6M_TOOLCHAIN_CODEREDW=n : Code Red toolchain under Windows + CONFIG_ARMV6M_TOOLCHAIN_CODEREDL=y : Code Red toolchain under Linux + + You may also have to modify the PATH in the setenv.h file if your make cannot + find the tools. + + NOTE: the CodeSourcery (for Windows), devkitARM, and Code Red (for Windoes) + are Windows native toolchains. The CodeSourcey (for Linux), Code Red (for Linux) + and NuttX buildroot toolchains are Cygwin and/or Linux native toolchains. There + are several limitations to using a Windows based toolchain in a Cygwin + environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +Code Red IDE +^^^^^^^^^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Linux Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lpc11xx, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/lpc11x/lpc11_vectors.S. + + Using Code Red GNU Tools from Cygwin + ------------------------------------ + + Under Cygwin, the Code Red command line tools (e.g., arm-non-eabi-gcc) cannot + be executed because the they only have execut privileges for Administrators. I + worked around this by: + + Opening a native Cygwin RXVT as Administrator (Right click, "Run as administrator"), + then executing 'chmod 755 *.exe' in the following directories: + + /cygdrive/c/nxp/lpcxpreeso_3.6/bin, and + /cygdrive/c/nxp/lpcxpreeso_3.6/Tools/bin + + Command Line Flash Programming + ------------------------------ + + During the port development was used a STLink-v2 SWD programmer with OpenOCD to + write the firmware in the flash and GDB to debug NuttX initialization. + + If using LPCLink as your debug connection, first of all boot the LPC-Link using + the script: + + bin\Scripts\bootLPCXpresso type + + where type = winusb for Windows XP, or type = hid for Windows Vista / 7. + + Now run the flash programming utility with the following options + + flash_utility wire -ptarget -flash-load[-exec]=filename [-load-base=base_address] + + Where flash_utility is one of: + + crt_emu_lpc11_13 (for LPC11xx or LPC13xx parts) + crt_emu_cm3_nxp (for LPC11xx parts) + crt_emu_a7_nxp (for LPC21/22/23/24 parts) + crt_emu_a9_nxp (for LPC31/32 and LPC29xx parts) + crt_emu_cm3_lmi (for TI Stellaris parts) + + wire is one of: + + (empty) (for Red Probe+, Red Probe, RDB1768v1, or TI Stellaris evaluation boards) + -wire=hid (for RDB1768v2 without upgraded firmware) + -wire=winusb (for RDB1768v2 with upgraded firmware) + -wire=winusb (for LPC-Link on Windows XP) + -wire=hid (for LPC-Link on Windows Vista/ Windows 7) + + target is the target chip name. For example LPC1343, LPC1114/301, LPC1115 etc. + + filename is the file to flash program. It may be an executable (axf) or a binary + (bin) file. If using a binary file, the base_address must be specified. + + base_address is the base load address when flash programming a binary file. It + should be specified as a hex value with a leading 0x. + + Note: + - flash-load will leave the processor in a stopped state + - flash-load-exec will start execution of application as soon as download has + completed. + + Examples + To load the executable file app.axf and start it executing on an LPC1158 + target using Red Probe, use the following command line: + + crt_emu_cm3_nxp -pLPC1158 -flash-load-exec=app.axf + + To load the binary file binary.bin to address 0x1000 to an LPC1343 target + using LPC-Link on Windows XP, use the following command line: + + crt_emu_lpc11_13_nxp -wire=hid -pLPC1343 -flash-load=binary.bin -load-base=0x1000 + + tools/flash.sh + -------------- + + All of the above steps are automated in the bash script flash.sh that can + be found in the configs/lpcxpresso/tools directory. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M0 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/nuttx/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1115/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm0-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv6-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1115/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm0-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +Using OpenOCD +^^^^^^^^^^^^^ + + https://acassis.wordpress.com/2015/03/29/using-openocd-to-program-the-lpc1115-lpcxpresso-board/ + + Using OpenOCD to program the LPC1115 LPCXpresso board + March 29, 2015 by acassis + + Unfortunately NXP uses a built-in programmer in the LPCXpresso board + called LPCLink that is not supported by OpenOCD and there is not (AFAIK) + an option to replace its firmware. + + Then I decided to cut the board to separate the “LPCXpresso LPC1115 REV A†+ from the LPCLink programmer. + + So I used a simple and low cost STLink-v2 programmer board that is + supported by OpenOCD. In order to use OpenOCD to reprogram the LPC1115 + board we need to connect four wires from STLink-v2 to LPC1115 board: + + STLink-v2 | LPC1115 Board + ------------------------------ + GND GND + 3V3 3V3 + IO AD4 + CLK P0.10 + + + Also we need to instruct OpenOCD to use SWD protocol. You can do it + creating the following config openocd.cfg file: + + # LPC1115 LPCXpresso Target + + # Using stlink as SWD programmer + source [find interface/stlink-v2.cfg] + + # SWD as transport + transport select hla_swd + + # Use LPC1115 target + set WORKAREASIZE 0x4000 + source [find target/lpc11xx.cfg] + + Now execute OpenOCD using the created config file: + + $ sudo openocd -f openocd.cfg + Open On-Chip Debugger 0.9.0-dev-00251-g1fa4c72 (2015-01-28-20:08) + Licensed under GNU GPL v2 + For bug reports, read + http://openocd.sourceforge.net/doc/doxygen/bugs.html + Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD + adapter speed: 10 kHz + adapter_nsrst_delay: 200 + Info : Unable to match requested speed 10 kHz, using 5 kHz + Info : Unable to match requested speed 10 kHz, using 5 kHz + Info : clock speed 5 kHz + Info : STLINK v2 JTAG v17 API v2 SWIM v4 VID 0x0483 PID 0x3748 + Info : using stlink api v2 + Info : Target voltage: 3.137636 + Info : lpc11xx.cpu: hardware has 4 breakpoints, 2 watchpoints + + Connect to OpenOCD server: + + $ telnet 127.0.0.1 4444 + + Reset the CPU and flash the lpc1115_blink.bin file: + + > reset halt + target state: halted + target halted due to debug-request, current mode: Thread + xPSR: 0xc1000000 pc: 0x1fff0040 msp: 0x10000ffc + + > flash probe 0 + flash 'lpc2000' found at 0x00000000 + + > flash write_image erase blink_lpc1115.bin 0x00000000 + auto erase enabled + target state: halted + target halted due to breakpoint, current mode: Thread + xPSR: 0x01000000 pc: 0x10000108 msp: 0x100001b8 + Verification will fail since checksum in image (0x00000000) to be written to flash is different from calculated vector checksum (0xefffebe9). + To remove this warning modify build tools on developer PC to inject correct LPC vector checksum. + wrote 4096 bytes from file blink_lpc1115.bin in 0.592621s (6.750 KiB/s) + + > reset run + + The checksum warning message could be removed if you add the checksum to + binary, read this post: + + http://sigalrm.blogspot.com.br/2011/10/cortex-m3-exception-vector-checksum.html. + + The blink LED sample I got from Frank Duignan’s page: + + http://eleceng.dit.ie/frank/arm/BareMetalLPC1114/index.html + + Edit Makefile and configure LIBSPEC to point out to the right path: + + LIBSPEC=-L /usr/lib/gcc/arm-none-eabi/4.8/armv6-m + + $ make + + To generate the final binary I used objcopy: + + $ arm-none-eabi-objcopy -O binary main.elf blink_lpc1115.bin + + https://acassis.wordpress.com/2015/05/22/using-openocd-and-gdb-to-debug-my-nuttx-port-to-lpc11xx/ + + Using OpenOCD and gdb to debug my NuttX port to LPC11xx + May 22, 2015 by acassis + + I’m porting NuttX to LPC11xx (using the LPCXpresso LPC1115 board) and + these are the steps I used to get OpenOCD and GDB working to debug my firmware: + + The openocd.cfg to use with STLink-v2 SWD programmer: + + # LPC1115 LPCXpresso Target + + # Using stlink as SWD programmer + source [find interface/stlink-v2.cfg] + + # SWD as transport + transport select hla_swd + + # Use LPC1115 target + set WORKAREASIZE 0x4000 + source [find target/lpc11xx.cfg] + + You need to execute “reset halt†from OpenOCD telnet server to get + “monitor reset halt†working on gdb: + + $ telnet 127.0.0.1 4444Trying 127.0.0.1... + Connected to 127.0.0.1. + Escape character is '^]'. + Open On-Chip Debugger + + > reset halt + target state: halted + target halted due to debug-request, current mode: Thread + xPSR: 0xc1000000 pc: 0x1fff0040 msp: 0x10000ffc + + > exit + + Now execute the command arm-none-eabi-gdb (from Debian/Ubuntu package + “gdb-arm-none-eabiâ€) passing the nuttx ELF file: + + $ arm-none-eabi-gdb nuttx + GNU gdb (7.7.1+dfsg-1+6) 7.7.1 + Reading symbols from nuttx...done. + + (gdb) target remote localhost:3333 + Remote debugging using localhost:3333 + 0x1fff0040 in ?? () + + (gdb) monitor reset halt + target state: halted + target halted due to debug-request, current mode: Thread + xPSR: 0xc1000000 pc: 0x1fff0040 msp: 0x10000ffc + + (gdb) load + Loading section .vectors, size 0xc0 lma 0x0 + Loading section .text, size 0x9197 lma 0x410 + Loading section .ARM.exidx, size 0x8 lma 0x95a8 + Loading section .data, size 0x48 lma 0x95b0 + Start address 0x410, load size 37543 + Transfer rate: 9 KB/sec, 6257 bytes/write. + + (gdb) b __start + Breakpoint 1 at 0x410: file chip/lpc11_start.c, line 109. + + (gdb) step + + Note: automatically using hardware breakpoints for read-only addresses. + + Breakpoint 1, __start () at chip/lpc11_start.c:109 + 109 { + + (gdb) + 115 lpc11_clockconfig(); + + (gdb) + lpc11_clockconfig () at chip/lpc11_clockconfig.c:93 + 93 putreg32(SYSCON_SYSPLLCLKSEL_IRCOSC, LPC11_SYSCON_SYSPLLCLKSEL); + + (gdb) + 96 putreg32((SYSCON_SYSPLLCTRL_MSEL_DIV(4) | SYSCON_SYSPLLCTRL_PSEL_DIV2), LPC11_SYSCON_SYSPLLCTRL); + + (gdb) p /x *0x40048008 <--- this is the LPC11_SYSCON_SYSPLLCTRL register address + $2 = 0x23 + (gdb) + + You can use breakpoints, steps and many other GDB features. + + That is it! + +LEDs +^^^^ + + If CONFIG_ARCH_LEDS is defined, then support for the LPCXpresso LEDs will be + included in the build. See: + + - configs/lpcxpresso-lpc1115/include/board.h - Defines LED constants, types and + prototypes the LED interface functions. + + - configs/lpcxpresso-lpc1115/src/lpcxpresso-lpc1115.h - GPIO settings for the LEDs. + + - configs/lpcxpresso-lpc1115/src/up_leds.c - LED control logic. + + The LPCXpresso LPC1115 has a single LEDs. Usage this single LED by NuttX + is as follows: + + - The LED is not illuminated until the LPCXpresso completes initialization. + + If the LED is stuck in the OFF state, this means that the LPCXpresso did not + complete initializeation. + + - Each time the OS enters an interrupt (or a signal) it will turn the LED OFF and + restores its previous stated upon return from the interrupt (or signal). + + The normal state, after initialization will be a dull glow. The brightness of + the glow will be inversely related to the proportion of time spent within interrupt + handling logic. The glow may decrease in brightness when the system is very + busy handling device interrupts and increase in brightness as the system becomes + idle. + + Stuck in the OFF state suggests that that the system never completed + initialization; Stuck in the ON state would indicated that the system + intialialized, but is not takint interrupts. + + - If a fatal assertion or a fatal unhandled exception occurs, the LED will flash + strongly as a slow, 2Hz rate. + +LPCXpresso Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + General Architecture Settings: + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM0=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc11xx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LPC1115=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=lpcxpresso-lpc1115 + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_LPCEXPRESSO=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(8*1024) (8Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x10000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + CONFIG_LPC11_MAINOSC=y + CONFIG_LPC11_PLL0=y + CONFIG_LPC11_UART0=y + CONFIG_LPC11_CAN1=n + CONFIG_LPC11_SPI=n + CONFIG_LPC11_SSP0=n + CONFIG_LPC11_SSP1=n + CONFIG_LPC11_I2C0=n + CONFIG_LPC11_I2S=n + CONFIG_LPC11_TMR0=n + CONFIG_LPC11_TMR1=n + CONFIG_LPC11_PWM0=n + CONFIG_LPC11_ADC=n + CONFIG_LPC11_FLASH=n + + LPC11xx specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + LPC11xx specific CAN device driver settings. These settings all + require CONFIG_CAN: + + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC11_CAN1 is defined. + CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + +Configurations +^^^^^^^^^^^^^^ + +Each LPCXpresso configuration is maintained in a sub-directory and can be +selected as follow: + + cd tools + ./configure.sh lpcxpresso-lpc1115/ + cd - + . ./setenv.sh + +Where is one of the following: + + minnsh: + ------ + + This is a experiment to see just how small we can get a usable NSH + configuration. This configuration has far fewer features than the nsh + configuration but is also a fraction of the size. + + STATUS: + 2015-6-10 + The nuttx.bin minnsh firmware file size: + + $ ls -l nuttx.bin + -rwxr-xr-x 1 alan alan 13859 Jun 10 08:54 nuttx.bin + + $ arm-none-eabi-size nuttx + text data bss dec hex filename + 12818 193 704 13715 3593 nuttx + + This is serial console output (and input) : + + NuttShell (NSH) + nsh> ls /dev + nsh: ls: command not found + + No filesystem, no "ls" command :-) + + nsh> ? + help usage: help [-v] [] + + ? exec free mb mw xd + echo exit help mh ps + nsh> free + total used free largest + Mem: 6464 1816 4648 4648 + + nsh> echo "NuttX is magic!" + NuttX is magic! + nsh> + + Replace NSH with apps/examples/hello: + + $ ls -l nuttx.bin + -rwxr-xr-x 1 alan alan 9318 Jun 10 09:02 nuttx.bin + + $ arm-none-eabi-size nuttx + text data bss dec hex filename + 8277 193 704 9174 23d6 nuttx + + Some additional commits from Alan reduce this FLASH size by + about another kilobyte. That changes: (1) disable stack + dumping on assertions,and (2) make some FLASH data structures + smaller. + + Almost 2Kb of the remaining size was due to some arithmetic + "long long" (64 bits) operations drawn from libgcc.a. + Alan changed vsprintf to make "long long" support optional. + This change reduced the NuttX kernel to less than 8KiB! + + nsh: + --- + + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables both the serial and telnet NSH interfaces. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. This configuration has been used for testing the microSD card. + This support is, however, disabled in the base configuration. + + At last attempt, the SPI-based mircroSD does not work at + higher fequencies. Setting the SPI frequency to 400000 + removes the problem. There must be some more optimal + value that could be determined with additional experimetnation. + + Jumpers: J55 must be set to provide chip select PIO1_11 signal as + the SD slot chip select. diff --git a/configs/lpcxpresso-lpc1115/include/board.h b/configs/lpcxpresso-lpc1115/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..f4aae460f29544cb1a3542294b03c78e0fcfc408 --- /dev/null +++ b/configs/lpcxpresso-lpc1115/include/board.h @@ -0,0 +1,246 @@ +/************************************************************************************ + * configs/lpcxpresso-lpc1115/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIG_LPCXPRESSO_LPC1115_INCLUDE_BOARD_H +#define __CONFIG_LPCXPRESSO_LPC1115_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* NOTE: The following definitions require lpc11_syscon.h. It is not included here + * because the including C file may not have that file in its include path. + */ + +#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency */ +#define BOARD_OSCCLK_FREQUENCY BOARD_XTAL_FREQUENCY /* Main oscillator frequency */ +#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency */ +#define BOARD_INTRCOSC_FREQUENCY (1200000) /* Internal RC oscillator frequency */ + +/* This is the clock setup we configure for: + * + * SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1 + * MCLK = 480MHz / 6 = 80MHz -> MCLK divider = 6 + */ + +#define LPC11_MCLK 48000000 /* 48Mhz */ + +/* Select the internal RC oscillator as the frequency source. SYSCLK is then the frequency + * of the main oscillator. + */ + +#undef CONFIG_LPC11_INTRCOSC +#define CONFIG_LPC11_INTRCOSC 1 +#define BOARD_SCS_VALUE SYSCON_SCS_OSCEN + +/* Select the main oscillator and CCLK divider. The output of the divider is CCLK. + * The input to the divider (PLLCLK) will be determined by the PLL output. + */ + +#define BOARD_CCLKCFG_DIVIDER 6 +#define BOARD_CCLKCFG_VALUE ((BOARD_CCLKCFG_DIVIDER-1) << SYSCON_CCLKCFG_SHIFT) + +/* PLL0. PLL0 is used to generate the CPU clock divider input (PLLCLK). + * + * Source clock: Main oscillator + * PLL0 Multiplier value (M): 20 + * PLL0 Pre-divider value (N): 1 + * + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz + */ + +#undef CONFIG_LPC11_PLL0 +#define CONFIG_LPC11_PLL0 1 +#define BOARD_CLKSRCSEL_VALUE SYSCON_CLKSRCSEL_MAIN + +#define BOARD_PLL0CFG_MSEL 20 +#define BOARD_PLL0CFG_NSEL 1 +#define BOARD_PLL0CFG_VALUE \ + (((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLL0CFG_MSEL_SHIFT) | \ + ((BOARD_PLL0CFG_NSEL-1) << SYSCON_PLL0CFG_NSEL_SHIFT)) + +/* PLL1 -- Not used. */ + +#undef CONFIG_LPC11_PLL1 +#define BOARD_PLL1CFG_MSEL 36 +#define BOARD_PLL1CFG_NSEL 1 +#define BOARD_PLL1CFG_VALUE \ + (((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLL1CFG_MSEL_SHIFT) | \ + ((BOARD_PLL1CFG_NSEL-1) << SYSCON_PLL1CFG_NSEL_SHIFT)) + +/* USB divider. This divider is used when PLL1 is not enabled to get the + * USB clock from PLL0: + * + * USBCLK = PLL0CLK / 10 = 48MHz + */ + +#define BOARD_USBCLKCFG_VALUE SYSCON_USBCLKCFG_DIV10 + +/* FLASH Configuration */ + +#undef CONFIG_LPC11_FLASH +#define CONFIG_LPC11_FLASH 1 +#define BOARD_FLASHCFG_VALUE 0x0000303a + +/* LED definitions ******************************************************************/ +/* The LPCXpresso LPC1115 board has a single red LED (there are additional LEDs on + * the base board not considered here). + */ + /* ON OFF */ +#define LED_STARTED 0 /* OFF ON (never happens) */ +#define LED_HEAPALLOCATE 0 /* OFF ON (never happens) */ +#define LED_IRQSENABLED 0 /* OFF ON (never happens) */ +#define LED_STACKCREATED 1 /* ON ON (never happens) */ +#define LED_INIRQ 2 /* OFF NC (momentary) */ +#define LED_SIGNAL 2 /* OFF NC (momentary) */ +#define LED_ASSERTION 2 /* OFF NC (momentary) */ +#define LED_PANIC 0 /* OFF ON (1Hz flashing) */ + +/* Alternate pin selections *********************************************************/ +/* Pin Description Connector On Board Base Board + * -------------------------------- --------- -------------- --------------------- + * P0[0]/RD1/TXD3/SDA1 J6-9 I2C E2PROM SDA TXD3/SDA1 + * P0[1]/TD1/RXD3/SCL J6-10 RXD3/SCL1 + * P0[2]/TXD0/AD0[7] J6-21 + * P0[3]/RXD0/AD0[6] J6-22 + * P0[4]/I2SRX-CLK/RD2/CAP2.0 J6-38 CAN_RX2 + * P0[5]/I2SRX-WS/TD2/CAP2.1 J6-39 CAN_TX2 + * P0[6]/I2SRX_SDA/SSEL1/MAT2[0] J6-8 SSEL1, OLED CS + * P0[7]/I2STX_CLK/SCK1/MAT2[1] J6-7 SCK1, OLED SCK + * P0[8]/I2STX_WS/MISO1/MAT2[2] J6-6 MISO1 + * P0[9]/I2STX_SDA/MOSI1/MAT2[3] J6-5 MOSI1, OLED data in + * P0[10] J6-40 TXD2/SDA2 + * P0[11] J6-41 RXD2/SCL2 + */ + +#define GPIO_UART3_TXD GPIO_UART3_TXD_1 +#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1 +#define GPIO_UART3_RXD GPIO_UART3_RXD_1 +#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 +#define GPIO_SSP1_SCK GPIO_SSP1_SCK_1 +#define GPIO_UART2_TXD GPIO_UART2_TXD_1 +#define GPIO_UART2_RXD GPIO_UART2_RXD_1 +#define GPIO_UART1_TXD GPIO_UART1_TXD_1 +#define GPIO_SSP0_SCK GPIO_SSP0_SCK_1 +#define GPIO_UART1_RXD GPIO_UART1_RXD_1 +#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_1 +#define GPIO_SSP0_MISO GPIO_SSP0_MISO_1 +#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_1 + +/* P1[0]/ENET-TXD0 J6-34? TXD0 TX-(Ethernet PHY) + * P1[1]/ENET_TXD1 J6-35? TXD1 TX+(Ethernet PHY) + * P1[4]/ENET_TX_EN TXEN N/A + * P1[8]/ENET_CRS CRS_DV/MODE2 N/A + * P1[9]/ENET_RXD0 J6-32? RXD0/MODE0 RD-(Ethernet PHY) + * P1[10]/ENET_RXD1 J6-33? RXD1/MODE1 RD+(Ethernet PHY) + */ + +#define GPIO_ENET_MDC GPIO_ENET_MDC_1 +#define GPIO_ENET_MDIO GPIO_ENET_MDIO_1 + +/* P2[0]/PWM1.1/TXD1 J6-42 PWM1.1 / RGB LED / RS422 RX + * P2[1]/PWM1.2/RXD1 J6-43 PWM1.2 / OLED voltage / RGB LED / RS422 RX + * P2[2]/PWM1.3/CTS1/TRACEDATA[3] J6-44 PWM1.3 + * P2[3]/PWM1.4/DCD1/TRACEDATA[2] J6-45 PWM1.4 + * P2[4]/PWM1.5/DSR1/TRACEDATA[1] J6-46 PWM1.5 + * P2[5]/PWM1[6]/DTR1/TRACEDATA[0] J6-47 PWM1.6 + * P2[6]/PCAP1[0]/RI1/TRACECLK J6-48 + * P2[7]/RD2/RTS1 J6-49 OLED command/data + * P2[8]/TD2/TXD2 J6-50 + * P2[9]/USB_CONNECT/RXD2 PAD19 USB Pullup N/A + * P2[10]/EINT0/NMI J6-51 + * P2[11]/EINT1/I2STX_CLK J6-52 + */ + +#define GPIO_PWM1p1 GPIO_PWM1p1_2 +#define GPIO_PWM1p2 GPIO_PWM1p2_2 +#define GPIO_PWM1p3 GPIO_PWM1p3_2 +#define GPIO_PWM1p4 GPIO_PWM1p4_2 +#define GPIO_PWM1p5 GPIO_PWM1p5_2 +#define GPIO_PWM1p6 GPIO_PWM1p6_2 + +/* P3[25]/MAT0.0/PWM1.2 PAD13 N/A + * P3[26]/STCLK/MAT0.1/PWM1.3 PAD14 N/A + */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: lpc11_boardinitialize + * + * Description: + * All LPC11xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc11_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIG_LPCXPRESSO_LPC1115_INCLUDE_BOARD_H */ diff --git a/configs/lpcxpresso-lpc1115/minnsh/Make.defs b/configs/lpcxpresso-lpc1115/minnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..caef0baee284b50b20dd06a5fbfe2925b46fefbb --- /dev/null +++ b/configs/lpcxpresso-lpc1115/minnsh/Make.defs @@ -0,0 +1,123 @@ +############################################################################ +# configs/lpcxpresso-lpc1115/minnsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv6-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) +endif diff --git a/configs/lpcxpresso-lpc1115/minnsh/defconfig b/configs/lpcxpresso-lpc1115/minnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d17358614bc86b1d8ff76a331b0fef950e9310bf --- /dev/null +++ b/configs/lpcxpresso-lpc1115/minnsh/defconfig @@ -0,0 +1,744 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +CONFIG_ARCH_CHIP_LPC11XX=y +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +CONFIG_ARCH_CORTEXM0=y +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv6-m" +CONFIG_ARCH_CHIP="lpc11xx" +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set + +# +# ARMV6M Configuration Options +# +# CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_GPIO_IRQ is not set + +# +# LPC11xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1114 is not set +CONFIG_ARCH_CHIP_LPC1115=y +CONFIG_ARCH_FAMILY_LPC111X=y + +# +# LPC11xx Peripheral Support +# +CONFIG_LPC11_INTRCOSC=y +# CONFIG_LPC11_MAINOSC is not set +CONFIG_LPC11_SYSTICK_CORECLK=y +# CONFIG_LPC11_SYSTICK_CORECLK_DIV16 is not set +CONFIG_LPC11_PLL=y +CONFIG_LPC11_UART0=y +# CONFIG_LPC11_CAN0 is not set +# CONFIG_LPC11_SPI is not set +# CONFIG_LPC11_SSP0 is not set +# CONFIG_LPC11_SSP1 is not set +# CONFIG_LPC11_I2C0 is not set +# CONFIG_LPC11_TMR0 is not set +# CONFIG_LPC11_TMR1 is not set +# CONFIG_LPC11_WDT is not set +# CONFIG_LPC11_ADC is not set +# CONFIG_LPC11_FLASH is not set + +# +# Serial driver options +# +# CONFIG_SERIAL_TERMIOS is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=2988 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=8192 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPCXPRESSO_LPC1115=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lpcxpresso-lpc1115" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=4 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +CONFIG_FDCLONE_DISABLE=y +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=0 +CONFIG_NFILE_STREAMS=0 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_MODULE is not set + +# +# Work queue support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1536 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +# CONFIG_DEV_NULL is not set +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=64 +CONFIG_UART0_TXBUFSIZE=64 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +CONFIG_NSH_DISABLE_CD=y +CONFIG_NSH_DISABLE_CP=y +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +CONFIG_NSH_DISABLE_MKDIR=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +CONFIG_NSH_DISABLE_MOUNT=y +CONFIG_NSH_DISABLE_MV=y +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +CONFIG_NSH_DISABLE_RM=y +CONFIG_NSH_DISABLE_RMDIR=y +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_UMOUNT=y +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=64 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lpcxpresso-lpc1115/minnsh/setenv.sh b/configs/lpcxpresso-lpc1115/minnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..f47c395c1c7af2ca884c6fc1a0c23e3282bb3836 --- /dev/null +++ b/configs/lpcxpresso-lpc1115/minnsh/setenv.sh @@ -0,0 +1,72 @@ +#!/bin/bash +# configs/lpcxpresso-lpc1115/minnsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the default install location for Code Red on Linux +# export TOOLCHAIN_BIN="/usr/local/LPCXpresso/tools/bin" + +# This is the Cygwin path to the LPCXpresso 3.6 install location under Windows +#export TOOLCHAIN_BIN="/cygdrive/c/nxp/lpcxpresso_3.6/Tools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lpcxpresso-lpc1115/nsh/Make.defs b/configs/lpcxpresso-lpc1115/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f04d2f6b4a2cba05bd50efa47d0cba44000ff63b --- /dev/null +++ b/configs/lpcxpresso-lpc1115/nsh/Make.defs @@ -0,0 +1,123 @@ +############################################################################ +# configs/lpcxpresso-lpc1115/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv6-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) +endif diff --git a/configs/lpcxpresso-lpc1115/nsh/defconfig b/configs/lpcxpresso-lpc1115/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..bca4b63188bcac4e9ad101aeef17daad2f52eb57 --- /dev/null +++ b/configs/lpcxpresso-lpc1115/nsh/defconfig @@ -0,0 +1,771 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +CONFIG_ARCH_CHIP_LPC11XX=y +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +CONFIG_ARCH_CORTEXM0=y +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv6-m" +CONFIG_ARCH_CHIP="lpc11xx" +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set + +# +# ARMV6M Configuration Options +# +# CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_GPIO_IRQ is not set + +# +# LPC11xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1114 is not set +CONFIG_ARCH_CHIP_LPC1115=y +CONFIG_ARCH_FAMILY_LPC111X=y + +# +# LPC11xx Peripheral Support +# +CONFIG_LPC11_INTRCOSC=y +# CONFIG_LPC11_MAINOSC is not set +CONFIG_LPC11_SYSTICK_CORECLK=y +# CONFIG_LPC11_SYSTICK_CORECLK_DIV16 is not set +CONFIG_LPC11_PLL=y +CONFIG_LPC11_UART0=y +# CONFIG_LPC11_CAN0 is not set +# CONFIG_LPC11_SPI is not set +# CONFIG_LPC11_SSP0 is not set +# CONFIG_LPC11_SSP1 is not set +# CONFIG_LPC11_I2C0 is not set +# CONFIG_LPC11_TMR0 is not set +# CONFIG_LPC11_TMR1 is not set +# CONFIG_LPC11_WDT is not set +# CONFIG_LPC11_ADC is not set +# CONFIG_LPC11_FLASH is not set + +# +# Serial driver options +# +# CONFIG_SERIAL_TERMIOS is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=2988 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=8192 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPCXPRESSO_LPC1115=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lpcxpresso-lpc1115" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=4 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1536 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=64 +CONFIG_UART0_TXBUFSIZE=64 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +CONFIG_NSH_DISABLE_CP=y +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_DISABLE_DD=y +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +CONFIG_NSH_DISABLE_MKDIR=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +CONFIG_NSH_DISABLE_MOUNT=y +CONFIG_NSH_DISABLE_MV=y +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +CONFIG_NSH_DISABLE_RM=y +CONFIG_NSH_DISABLE_RMDIR=y +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_UMOUNT=y +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=64 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lpcxpresso-lpc1115/nsh/setenv.sh b/configs/lpcxpresso-lpc1115/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ad47eeaaf9b403139a80e04dab753a541b3cf11a --- /dev/null +++ b/configs/lpcxpresso-lpc1115/nsh/setenv.sh @@ -0,0 +1,72 @@ +#!/bin/bash +# configs/lpcxpresso-lpc1115/nsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the default install location for Code Red on Linux +# export TOOLCHAIN_BIN="/usr/local/LPCXpresso/tools/bin" + +# This is the Cygwin path to the LPCXpresso 3.6 install location under Windows +#export TOOLCHAIN_BIN="/cygdrive/c/nxp/lpcxpresso_3.6/Tools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lpcxpresso-lpc1115/scripts/ld.script b/configs/lpcxpresso-lpc1115/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..8e7027868044c4e9d86d78d1a738ccf3b555b214 --- /dev/null +++ b/configs/lpcxpresso-lpc1115/scripts/ld.script @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/lpcxpresso-lpc1115/scripts/ld.script + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LPC1115 has 64Kb of FLASH beginning at address 0x00000000 and + * 8Kb of SRAM at address 0x10000000. + */ + +MEMORY +{ + vectflash (rx) : ORIGIN = 0x00000000, LENGTH = 0x00c0 + progflash (rx) : ORIGIN = 0x00000410, LENGTH = 64k + datasram (rwx) : ORIGIN = 0x10000000, LENGTH = 8K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +EXTERN(_cfmconfig) +ENTRY(_stext) +SECTIONS +{ + .vectors : { + _svectors = ABSOLUTE(.); + *(.vectors) + _evectors = ABSOLUTE(.); + } > vectflash + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progflash + + .ARM.extab : { + *(.ARM.extab*) + } > progflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progflash + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datasram AT > progflash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > datasram AT > progflash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datasram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lpcxpresso-lpc1115/src/.gitignore b/configs/lpcxpresso-lpc1115/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/lpcxpresso-lpc1115/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/lpcxpresso-lpc1115/src/Makefile b/configs/lpcxpresso-lpc1115/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..a55c85892936bd1bb8fa1e4830b9a54e0ef1f20a --- /dev/null +++ b/configs/lpcxpresso-lpc1115/src/Makefile @@ -0,0 +1,61 @@ +############################################################################ +# configs/lpcxpresso-lpc1115/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc11_boot.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc11_appinit.c +endif + +ifeq ($(CONFIG_KL_SPI0),y) +CSRCS += lpc11_spi.c +else +ifeq ($(CONFIG_KL_SPI1),y) +CSRCS += lpc11_spi.c +endif +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += lpc11_leds.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += lpc11_pwm.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_adc.c b/configs/lpcxpresso-lpc1115/src/lpc11_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..0b76f0c41c2ae14505dc977bf381c66ff039ff86 --- /dev/null +++ b/configs/lpcxpresso-lpc1115/src/lpc11_adc.c @@ -0,0 +1,122 @@ +/************************************************************************************ + * configs/lpcexpresso-lpc1115/src/lpc11_adc.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Kannan + * + * Based on configs/stm3220g-eval/src/up_adc.c + * + * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "lpc11_adc.h" +#include "lpcxpresso_lpc1115.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: adc_devinit + * + * Description: + * All LPC17 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int adc_devinit(void) +{ + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call lpc11_adcinitialize() to get an instance of the ADC interface */ + + adc = lpc11_adcinitialize(); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_ADC */ diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_appinit.c b/configs/lpcxpresso-lpc1115/src/lpc11_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..bbe61c493da04f41bccb2dddc6dddeefb8b63502 --- /dev/null +++ b/configs/lpcxpresso-lpc1115/src/lpc11_appinit.c @@ -0,0 +1,155 @@ +/**************************************************************************** + * config/lpcxpresso-lpc1115/src/lpc11_appinit.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#define NSH_HAVEUSBDEV 1 +#ifdef CONFIG_LPC17_SSP1 +# define NSH_HAVEMMCSD 1 +#else +# undef NSH_HAVEMMCSD +#endif + +/* Do we have SPI support for MMC/SD? */ + +#ifdef NSH_HAVEMMCSD +#ifdef CONFIG_NSH_ARCHINIT +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 1 +# error "The LPCXpresso MMC/SD is on SSP1" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 1 +# endif +# if !defined(CONFIG_NSH_MMCSDSLOTNO) || CONFIG_NSH_MMCSDSLOTNO != 0 +# error "The LPCXpresso MMC/SD has only one slot (0)" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#else +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 1 +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +#endif +#endif + +/* Can't support USB device features if USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef NSH_HAVEMMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef NSH_HAVEMMCSD + FAR struct spi_dev_s *ssp; + int ret; + + /* Get the SSP port */ + + ssp = lpc11_sspbus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + if (!ssp) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SSP port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SSP port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + /* Bind the SSP port to the slot */ + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, CONFIG_NSH_MMCSDSLOTNO, ssp); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to bind SSP port %d to MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfuly bound SSP port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); +#endif + return OK; +} diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_boot.c b/configs/lpcxpresso-lpc1115/src/lpc11_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..21bec4c95042a787afde78e066fee830879ceec8 --- /dev/null +++ b/configs/lpcxpresso-lpc1115/src/lpc11_boot.c @@ -0,0 +1,93 @@ +/************************************************************************************ + * configs/lpcxpresso-lpc1115/src/lpc11_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc11_ssp.h" +#include "lpcxpresso_lpc1115.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc11_boardinitialize + * + * Description: + * All LPC11xx architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc11_boardinitialize(void) +{ + /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak + * function lpcxpresso_sspdev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_LPC11_SSP0) || defined(CONFIG_LPC11_SSP1) + if (lpcxpresso_sspdev_initialize) + { + lpcxpresso_sspdev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_dac.c b/configs/lpcxpresso-lpc1115/src/lpc11_dac.c new file mode 100644 index 0000000000000000000000000000000000000000..3447f330362dc7274171612df6cd36343fc8abc7 --- /dev/null +++ b/configs/lpcxpresso-lpc1115/src/lpc11_dac.c @@ -0,0 +1,103 @@ +/************************************************************************************ + * configs/lpcxpresso-lpc1115/src/lpc11_dac.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Kannan + * + * Based on configs/stm3220g-eval/src/up_dac.c + * + * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc11_dac.h" + +#ifdef CONFIG_DAC + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: dac_devinit + * + * Description: + * All LPC17xx architectures must provide the following interface to work with + * examples/diag. + * + ************************************************************************************/ + +int dac_devinit(void) +{ + static bool initialized = false; + struct dac_dev_s *dac; + int ret; + + if (!initialized) + { + /* Call lpc11_dacinitialize() to get an instance of the dac interface */ + + dac = lpc11_dacinitialize(); + if (dac == NULL) + { + adbg("ERROR: Failed to get dac interface\n"); + return -ENODEV; + } + + ret = dac_register("/dev/dac0", dac); + if (ret < 0) + { + adbg("dac_register failed: %d\n", ret); + return ret; + } + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_DAC */ diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_leds.c b/configs/lpcxpresso-lpc1115/src/lpc11_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..a112b4e267ada7224bd4f14215a20611518f343c --- /dev/null +++ b/configs/lpcxpresso-lpc1115/src/lpc11_leds.c @@ -0,0 +1,154 @@ +/**************************************************************************** + * configs/lpcxpresso-lpc1115/src/lpc11_leds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc11_gpio.h" +#include "lpcxpresso_lpc1115.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static bool g_ncstate; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure all LED GPIO lines */ + + lpc11_configgpio(LPCXPRESSO_LED); + g_ncstate = true; +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool off; + + switch (led) + { + case 0: + case 2: + off = true; + break; + + case 1: + off = false; + g_ncstate = false; + break; + + default: + return; + } + + lpc11_gpiowrite(LPCXPRESSO_LED, off); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + bool off; + + switch (led) + { + case 0: + case 1: + off = false; + break; + + case 2: + off = g_ncstate; + break; + + default: + return; + } + + lpc11_gpiowrite(LPCXPRESSO_LED, off); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_pwm.c b/configs/lpcxpresso-lpc1115/src/lpc11_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..d42ff511c0c24cd7388c71fbebc053a2aa9dcddd --- /dev/null +++ b/configs/lpcxpresso-lpc1115/src/lpc11_pwm.c @@ -0,0 +1,152 @@ +/************************************************************************************ + * configs/lpcexpresso-lpc1115/lpc11_pwm.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "lpc11_pwm.h" +#include "lpc11_timer.h" +#include "lpcxpresso_lpc1115.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifdef CONFIG_PWM + +FAR struct pwm_lowerhalf_s *lpc11_pwminitialize(int timer); +FAR struct pwm_lowerhalf_s *lpc11_mcpwminitialize(int timer); +FAR struct pwm_lowerhalf_s *lpc11_timerinitialize(int timer); + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pwm_devinit + * + * Description: + * All LPC17 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int pwm_devinit(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + struct pwm_lowerhalf_s *mcpwm; + struct pwm_lowerhalf_s *timer; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call lpc11_pwminitialize() to get an instance of the PWM interface */ + + pwm = lpc11_pwminitialize(0); + if (!pwm) + { + adbg("Failed to get the LPC17XX PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + mcpwm = lpc11_mcpwminitialize(0); + if (!mcpwm) + { + adbg("Failed to get the LPC17XX MOTOR PWM lower half\n"); + return -ENODEV; + } + + /* Register the MOTOR CONTROL PWM driver at "/dev/mcpwm0" */ + + ret = pwm_register("/dev/mcpwm0", mcpwm); + if (ret < 0) + { + adbg("mcpwm_register failed: %d\n", ret); + return ret; + } + + timer = lpc11_timerinitialize(0); + if (!timer) + { + adbg("Failed to get the LPC17XX TIMER lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/timer0" */ + + ret = pwm_register("/dev/timer0", timer); + if (ret < 0) + { + adbg("timer_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_ssp.c b/configs/lpcxpresso-lpc1115/src/lpc11_ssp.c new file mode 100644 index 0000000000000000000000000000000000000000..b88d9088e74fb83c776cb971fd032aba143fa54e --- /dev/null +++ b/configs/lpcxpresso-lpc1115/src/lpc11_ssp.c @@ -0,0 +1,213 @@ +/************************************************************************************ + * configs/lpcxpresso-lpc1115/src/lpc11_ssp.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "lpc11_gpio.h" +#include "lpc11_ssp.h" +#include "lpcxpresso_lpc1115.h" + +#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SSP_DEBUG /* Define to enable debug */ +#undef SSP_VERBOSE /* Define to enable verbose debug */ + +#ifdef SSP_DEBUG +# define sspdbg lldbg +# ifdef SSP_VERBOSE +# define sspvdbg lldbg +# else +# define sspvdbg(x...) +# endif +#else +# undef SSP_VERBOSE +# define sspdbg(x...) +# define sspvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef SSP_VERBOSE +# define ssp_dumpgpio(m) lpc11_dumpgpio(SDCCS_GPIO, m) +#else +# define ssp_dumpgpio(m) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpcxpresso_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LPCXpresso. + * + ************************************************************************************/ + +void weak_function lpcxpresso_sspdev_initialize(void) +{ + /* Configure the SPI-based microSD CS GPIO */ + + ssp_dumpgpio("lpcxpresso_sspdev_initialize() Entry)"); + + /* Configure card detect and chip select for the SD slot. NOTE: Jumper J55 must + * be set correctly for the SD slot chip select. + */ + +#ifdef CONFIG_LPC17_SSP1 + (void)lpc11_configgpio(LPCXPRESSO_SD_CS); + (void)lpc11_configgpio(LPCXPRESSO_SD_CD); + + /* Configure chip select for the OLED. For the SPI interface, insert jumpers in + * J42, J43, J45 pin1-2 and J46 pin 1-2. + */ + +#ifdef CONFIG_NX_LCDDRIVER + (void)lpc11_configgpio(LPCXPRESSO_OLED_CS); +#endif +#endif + + ssp_dumpgpio("lpcxpresso_sspdev_initialize() Exit"); +} + +/************************************************************************************ + * Name: lpc11_ssp0/ssp1select and lpc11_ssp0/ssp1status + * + * Description: + * The external functions, lpc11_ssp0/ssp1select and lpc11_ssp0/ssp1status + * must be provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including lpc11_sspbus_initialize()) + * are provided by common LPC17xx logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in lpc11_boardinitialize() to configure SPI/SSP chip select + * pins. + * 2. Provide lpc11_ssp0/ssp1select() and lpc11_ssp0/ssp1status() functions + * in your board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 3. Add a calls to lpc11_sspbus_initialize() in your low level application + * initialization logic + * 4. The handle returned by lpc11_sspbus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +#ifdef CONFIG_LPC17_SSP0 +void lpc11_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssp_dumpgpio("lpc11_ssp0select() Entry"); + +#warning "Assert CS here (false)" + + ssp_dumpgpio("lpc11_ssp0select() Exit"); +} + +uint8_t lpc11_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + sspdbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_LPC17_SSP1 +void lpc11_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssp_dumpgpio("lpc11_ssp1select() Entry"); + + if (devid == SPIDEV_MMCSD) + { + /* Assert/de-assert the CS pin to the card */ + + (void)lpc11_gpiowrite(LPCXPRESSO_SD_CS, !selected); + } +#ifdef CONFIG_NX_LCDDRIVER + else if (devid == SPIDEV_DISPLAY) + { + /* Assert the CS pin to the OLED display */ + + (void)lpc11_gpiowrite(LPCXPRESSO_OLED_CS, !selected); + } +#endif + ssp_dumpgpio("lpc11_ssp1select() Exit"); +} + +uint8_t lpc11_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + if (devid == SPIDEV_MMCSD) + { + /* Read the state of the card-detect bit */ + + if (lpc11_gpioread(LPCXPRESSO_SD_CD) == 0) + { + sspdbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; + } + } + + sspdbg("Returning zero\n"); + return 0; +} +#endif + +#endif /* CONFIG_LPC17_SSP0 || CONFIG_LPC17_SSP1 */ diff --git a/configs/lpcxpresso-lpc1115/src/lpcxpresso_lpc1115.h b/configs/lpcxpresso-lpc1115/src/lpcxpresso_lpc1115.h new file mode 100644 index 0000000000000000000000000000000000000000..5f3db65ba637a5390d72f90b1a48b66c9b5b1f89 --- /dev/null +++ b/configs/lpcxpresso-lpc1115/src/lpcxpresso_lpc1115.h @@ -0,0 +1,234 @@ +/************************************************************************************ + * configs/lpcxpresso-lpc1115/src/lpcxpresso_lpc1115.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef _CONFIGS_LPCXPRESSO_LPC1115_SRC_LPCXPRESSO_LPC1115L_H +#define _CONFIGS_LPCXPRESSO_LPC1115_SRC_LPCXPRESSO_LPC1115L_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* LPCXpresso LPC1115 board pin usage ***********************************************/ +/* Pin Description Connector On Board Base Board + * -------------------------------- --------- -------------- --------------------- + * P0[0]/RD1/TXD3/SDA1 J6-9 I2C E2PROM SDA TXD3/SDA1 + * P0[1]/TD1/RXD3/SCL J6-10 RXD2/SCL1 + * P0[2]/TXD0/AD0[7] J6-21 + * P0[3]/RXD0/AD0[6] J6-22 + * P0[4]/I2SRX-CLK/RD2/CAP2.0 J6-38 CAN_RX2 + * P0[5]/I2SRX-WS/TD2/CAP2.1 J6-39 CAN_TX2 + * P0[6]/I2SRX_SDA/SSEL1/MAT2[0] J6-8 SSEL1 + * P0[7]/I2STX_CLK/SCK1/MAT2[1] J6-7 SCK1 + * P0[8]/I2STX_WS/MISO1/MAT2[2] J6-6 MISO1 + * P0[9]/I2STX_SDA/MOSI1/MAT2[3] J6-5 MOSI1 + * P0[10] J6-40 TXD2/SDA2 + * P0[11] J6-41 RXD2/SCL2 + * P0[15]/TXD1/SCK0/SCK J6-13 TXD1/SCK0 + * P0[16]/RXD1/SSEL0/SSEL J6-14 RXD1/SSEL0 + * P0[17]/CTS1/MISO0/MISO J6-12 MISO0 + * P0[18]/DCD1/MOSI0/MOSI J6-11 MOSI0 + * P0[19]/DSR1/SDA1 PAD17 N/A + * P0[20]/DTR1/SCL1 PAD18 I2C E2PROM SCL N/A + * P0[21]/RI1/MCIPWR/RD1 J6-23 + * P0[22]/RTS1/TD1 J6-24 LED + * P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] J6-15 AD0.0 + * P0[24]/AD0[1]/I2SRX_WS/CAP3[1] J6-16 AD0.1 + * P0[25]/AD0[2]/I2SRX_SDA/TXD3 J6-17 AD0.2 + * P0[26]/AD0[3]/AOUT/RXD3 J6-18 AD0.3/AOUT + * P0[27]/SDA0/USB_SDA J6-25 + * P0[28]/SCL0 J6-26 + * P0[29]/USB_D+ J6-37 USB_D+ + * P0[30]/USB_D- J6-36 USB_D- + */ + +#define LPCXPRESSO_I2C1_EPROM_SDA GPIO_I2C1_SDA_1 +#define LPCXPRESSO_I2C1_EPROM_SDL GPIO_I2C1_SCL_2 +#define LPCXPRESSO_LED (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT0 | GPIO_PIN7) + +/* P1[0]/ENET-TXD0 J6-34? TXD0 TX-(Ethernet PHY) + * P1[1]/ENET_TXD1 J6-35? TXD1 TX+(Ethernet PHY) + * P1[4]/ENET_TX_EN TXEN N/A + * P1[8]/ENET_CRS CRS_DV/MODE2 N/A + * P1[9]/ENET_RXD0 J6-32? RXD0/MODE0 RD-(Ethernet PHY) + * P1[10]/ENET_RXD1 J6-33? RXD1/MODE1 RD+(Ethernet PHY) + * P1[14]/ENET_RX_ER RXER/PHYAD0 N/A + * P1[15]/ENET_REF_CLK REFCLK N/A + * P1[16]/ENET_MDC MDC N/A + * P1[17]/ENET_MDIO MDIO N/A + * P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] PAD1 N/A + * P1[19]/MC0A/USB_PPWR/N_CAP1.1 PAD2 N/A + * P1[20]/MCFB0/PWM1.2/SCK0 PAD3 N/A + * P1[21]/MCABORT/PWM1.3/SSEL0 PAD4 N/A + * P1[22]/MC0B/USB-PWRD/MAT1.0 PAD5 N/A + * P1[23]/MCFB1/PWM1.4/MISO0 PAD6 N/A + * P1[24]/MCFB2/PWM1.5/MOSI0 PAD7 N/A + * P1[25]/MC1A/MAT1.1 PAD8 N/A + * P1[26]/MC1B/PWM1.6/CAP0.0 PAD9 N/A + * P1[27]/CLKOUT/USB-OVRCR-N/CAP0.1 PAD10 N/A + * P1[28]/MC2A/PCAP1.0/MAT0.0 PAD11 N/A + * P1[29]/MC2B/PCAP1.1/MAT0.1 PAD12 N/A + * P1[30]/VBUS/AD0[4] J6-19 AD0.4 + * P1[31]/SCK1/AD0[5] J6-20 AD0.5 + * + * P2[0]/PWM1.1/TXD1 J6-42 PWM1.1 + * P2[1]/PWM1.2/RXD1 J6-43 PWM1.2 + * P2[2]/PWM1.3/CTS1/TRACEDATA[3] J6-44 PWM1.3 + * P2[3]/PWM1.4/DCD1/TRACEDATA[2] J6-45 PWM1.4 + * P2[4]/PWM1.5/DSR1/TRACEDATA[1] J6-46 PWM1.5 + * P2[5]/PWM1[6]/DTR1/TRACEDATA[0] J6-47 PWM1.6 + * P2[6]/PCAP1[0]/RI1/TRACECLK J6-48 + * P2[7]/RD2/RTS1 J6-49 + * P2[8]/TD2/TXD2 J6-50 + * P2[9]/USB_CONNECT/RXD2 PAD19 USB Pullup N/A + * P2[10]/EINT0/NMI J6-51 + * P2[11]/EINT1/I2STX_CLK J6-52 + * P2[12]/EINT2/I2STX_WS J6-53 + * P2[13]/EINT3/I2STX_SDA J6-27 + */ + +#define LPCXPRESSO_USB_PULLUP (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN9) + +/* P3[25]/MAT0.0/PWM1.2 PAD13 N/A + * P3[26]/STCLK/MAT0.1/PWM1.3 PAD14 N/A + * + * P4[28]/RX-MCLK/MAT2.0/TXD3 PAD15 N/A + * P4[29]/TX-MCLK/MAT2.1/RXD3 PAD16 N/A + */ + +/* SD Slot + * + * Base-board J4/J6 LPC1115 + * SD Signal Pin Pin + * --- ----------- ----- -------- + * CS PIO1_11* 55 P2.2 (See LPCXPRESSO_SD_CS) + * DIN PIO0_9-MOSI 5 P0.9 MOSI1 (See GPIO_SSP1_MOSI in chip/lpc11_ssp.h) + * DOUT PIO0_8-MISO 6 P0.8 MISO1 (See GPIO_SSP1_MISO in chip/lpc11_ssp.h) + * CLK PIO2_11-SCK 7 P0.9 SCK1 (See GPIO_SSP1_SCK in board.h) + * CD PIO2_10 52 P2.11 (See LPCXPRESSO_SD_CD) + */ + +#define LPCXPRESSO_SD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN2) +#ifdef CONFIG_GPIO_IRQ +# define LPCXPRESSO_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11) +#else +# define LPCXPRESSO_SD_CD (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11) +#endif + +/* USB: + * + * Base-board J4/J6 LPC1115 + * Signal Pin Pin + * ------------------- ----- -------- + * USB_DM 36 P0.30/USB-D- + * USB_DP 37 P0.29/USB-D+ + * N/C N/C P1.18/USB-UP-LED/PWM1.1/CAP1.0 + * PIO1_3 (not used) 19 P1.30/VBUS/AD0.4 + * N/C N/C P2.9/USB-CONNECT/RXD2 (See Notes) + * ------------------- ----- -------- + * PIO0_6-USB_CONNECT* 23 P0.21/RI1/RD1 + * PIO0_3-VBUS_SENSE 39 P0.5/I2SRX-WS/TD2/CAP2.1 + * + * Notes: + * - The standard USB CONNECT (P0.9) provides USB D+ pullup on board the + * LPCXpresso card; it should be un-necessary to use the based board + * version of the pullup. + * - No changes to jumper settings are required. There are few USB- + * related jumpers on the based board, but none are required: + * - J14 must be set to permit GPIO control of the base board USB + * connect pin. NOT USED + * - J12 must be set to permit GPIO control of the USB vbus sense pin + * - The standard VBUS (P1.30) is not connected. As a consequence, the + * USB driver will not correctly respond to USB insertion or removal + * events. + * - The standard USB LED (P1.18) is not connected. + */ + +#define LPCXPRESSO_USB_CONNECT (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN21) +#ifdef CONFIG_GPIO_IRQ +# define LPCXPRESSO_USB_VBUSSENSE (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN5) +#else +# define LPCXPRESSO_USB_VBUSSENSE (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN5) +#endif + +/* 96x64 White OLED with I2C/SPI interface + * + * ----------------------------+-------+-------------- ----------------------------- + * LPC1758 Pin | J4/6 | Base Board Description + * ----------------------------+-------+-------------- ----------------------------- + * P2.1/PWM1.2/RXD1 | 43 | PIO1_10 FAN5331 Power Control (SHDN#) + * P0.6/I2SRX-SDA/SSEL1/MAT2.0 | 8 | PIO0_2 OLED chip select (CS#) + * P2.7/RD2/RTS1 | 49 | PIO2_7 OLED command/data (D/C#) + * P0.7/I2STX-CLK/SCK1/MAT2.1 | 7 | PIO2_11-SCK OLED clock (D0) + * P0.9/I2STX-SDA/MOSI1/MAT2.3 | 5 | PIO0_9-MOSI OLED data in (D1) + * ----------------------------+-------+-------------- ----------------------------- + */ + +#define LPCXPRESSO_OLED_POWER (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN1) +#define LPCXPRESSO_OLED_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN6) +#define LPCXPRESSO_OLED_DC (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN7) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpcxpresso_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LPCXpresso board. + * + ************************************************************************************/ + +void weak_function lpcxpresso_sspdev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_LPCXPRESSO_LPC1115_SRC_LPCXPRESSO_LPC1115L_H */ diff --git a/configs/lpcxpresso-lpc1768/Kconfig b/configs/lpcxpresso-lpc1768/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..fba3ae0dc149e815e2546fdeb85a2dc885729123 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_LPCXPRESSO +endif diff --git a/configs/lpcxpresso-lpc1768/README.txt b/configs/lpcxpresso-lpc1768/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..4d00330a14101e5b099fc0f6d2367fd8bacf3f6f --- /dev/null +++ b/configs/lpcxpresso-lpc1768/README.txt @@ -0,0 +1,852 @@ +README +^^^^^^ + +README for NuttX port to the Embedded Artists' base board with the NXP +the LPCXpresso daughter board. + +Contents +^^^^^^^^ + + LCPXpresso LPC1768 Board + Embedded Artist's Base Board + Development Environment + GNU Toolchain Options + NuttX EABI "buildroot" Toolchain + NuttX OABI "buildroot" Toolchain + NXFLAT Toolchain + Code Red IDE + LEDs + LPCXpresso Configuration Options + Configurations + +LCPXpresso LPC1768 Board +^^^^^^^^^^^^^^^^^^^^^^^^ + + Pin Description Connector On Board Base Board + -------------------------------- --------- -------------- --------------------- + + P0[0]/RD1/TXD3/SDA1 J6-9 I2C E2PROM SDA TXD3/SDA1 + P0[1]/TD1/RXD3/SCL J6-10 RXD3/SCL1 + P0[2]/TXD0/AD0[7] J6-21 + P0[3]/RXD0/AD0[6] J6-22 + P0[4]/I2SRX-CLK/RD2/CAP2.0 J6-38 CAN_RX2 + P0[5]/I2SRX-WS/TD2/CAP2.1 J6-39 CAN_TX2 + P0[6]/I2SRX_SDA/SSEL1/MAT2[0] J6-8 SSEL1, OLED CS + P0[7]/I2STX_CLK/SCK1/MAT2[1] J6-7 SCK1, OLED SCK + P0[8]/I2STX_WS/MISO1/MAT2[2] J6-6 MISO1 + P0[9]/I2STX_SDA/MOSI1/MAT2[3] J6-5 MOSI1, OLED data in + P0[10] J6-40 TXD2/SDA2 + P0[11] J6-41 RXD2/SCL2 + P0[15]/TXD1/SCK0/SCK J6-13 TXD1/SCK0 + P0[16]/RXD1/SSEL0/SSEL J6-14 RXD1/SSEL0 + P0[17]/CTS1/MISO0/MISO J6-12 MISO0 + P0[18]/DCD1/MOSI0/MOSI J6-11 MOSI0 + P0[19]/DSR1/SDA1 PAD17 N/A + P0[20]/DTR1/SCL1 PAD18 I2C E2PROM SCL N/A + P0[21]/RI1/MCIPWR/RD1 J6-23 + P0[22]/RTS1/TD1 J6-24 LED + P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] J6-15 AD0.0 + P0[24]/AD0[1]/I2SRX_WS/CAP3[1] J6-16 AD0.1 + P0[25]/AD0[2]/I2SRX_SDA/TXD3 J6-17 AD0.2 + P0[26]/AD0[3]/AOUT/RXD3 J6-18 AD0.3/AOUT / RGB LED + P0[27]/SDA0/USB_SDA J6-25 + P0[28]/SCL0 J6-26 + P0[29]/USB_D+ J6-37 USB_D+ + P0[30]/USB_D- J6-36 USB_D- + + P1[0]/ENET-TXD0 J6-34? TXD0 TX-(Ethernet PHY) + P1[1]/ENET_TXD1 J6-35? TXD1 TX+(Ethernet PHY) + P1[4]/ENET_TX_EN TXEN N/A + P1[8]/ENET_CRS CRS_DV/MODE2 N/A + P1[9]/ENET_RXD0 J6-32? RXD0/MODE0 RD-(Ethernet PHY) + P1[10]/ENET_RXD1 J6-33? RXD1/MODE1 RD+(Ethernet PHY) + P1[14]/ENET_RX_ER RXER/PHYAD0 N/A + P1[15]/ENET_REF_CLK REFCLK N/A + P1[16]/ENET_MDC MDC N/A + P1[17]/ENET_MDIO MDIO N/A + P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] PAD1 N/A + P1[19]/MC0A/USB_PPWR/N_CAP1.1 PAD2 N/A + P1[20]/MCFB0/PWM1.2/SCK0 PAD3 N/A + P1[21]/MCABORT/PWM1.3/SSEL0 PAD4 N/A + P1[22]/MC0B/USB-PWRD/MAT1.0 PAD5 N/A + P1[23]/MCFB1/PWM1.4/MISO0 PAD6 N/A + P1[24]/MCFB2/PWM1.5/MOSI0 PAD7 N/A + P1[25]/MC1A/MAT1.1 PAD8 N/A + P1[26]/MC1B/PWM1.6/CAP0.0 PAD9 N/A + P1[27]/CLKOUT/USB-OVRCR-N/CAP0.1 PAD10 N/A + P1[28]/MC2A/PCAP1.0/MAT0.0 PAD11 N/A + P1[29]/MC2B/PCAP1.1/MAT0.1 PAD12 N/A + P1[30]/VBUS/AD0[4] J6-19 AD0.4 + P1[31]/SCK1/AD0[5] J6-20 AD0.5 + + P2[0]/PWM1.1/TXD1 J6-42 PWM1.1 / RGB LED / RS422 RX + P2[1]/PWM1.2/RXD1 J6-43 PWM1.2 / OLED voltage / RGB LED + P2[2]/PWM1.3/CTS1/TRACEDATA[3] J6-44 PWM1.3 + P2[3]/PWM1.4/DCD1/TRACEDATA[2] J6-45 PWM1.4 + P2[4]/PWM1.5/DSR1/TRACEDATA[1] J6-46 PWM1.5 + P2[5]/PWM1[6]/DTR1/TRACEDATA[0] J6-47 PWM1.6 + P2[6]/PCAP1[0]/RI1/TRACECLK J6-48 + P2[7]/RD2/RTS1 J6-49 OLED command/data + P2[8]/TD2/TXD2 J6-50 + P2[9]/USB_CONNECT/RXD2 PAD19 USB Pullup N/A + P2[10]/EINT0/NMI J6-51 + P2[11]/EINT1/I2STX_CLK J6-52 + P2[12]/EINT2/I2STX_WS j6-53 + P2[13]/EINT3/I2STX_SDA J6-27 + + P3[25]/MAT0.0/PWM1.2 PAD13 N/A + P3[26]/STCLK/MAT0.1/PWM1.3 PAD14 N/A + + P4[28]/RX-MCLK/MAT2.0/TXD3 PAD15 N/A + P4[29]/TX-MCLK/MAT2.1/RXD3 PAD16 N/A + +Embedded Artist's Base Board +^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Jumpers +------- + + There are many jumpers on the base board. A usable combination is the + default jumper settings WITH the two J54 jumpers both removed. Those + jumpers are for ISP support and will cause the board to reset. + + To use the SD, J55 must be set to provide chip select PIO1_11 signal as + the SD slot chip select. + +SD Slot +------- + + Base-board J4/J6 LPC1768 + SD Signal Pin Pin + --- ----------- ----- -------- + CS PIO1_11* 55 P2.2 + DIN PIO0_9-MOSI 5 P0.9 MOSI1 + DOUT PIO0_8-MISO 6 P0.8 MISO1 + CLK PIO2_11-SCK 7 P0.9 SCK1 + CD PIO2_10 52 P2.11 + + These jumper settings are required: + + *J55 must be set to provide chip select PIO1_11 signal as the SD slot + chip select. + +USB Device +---------- + + Base-board J4/J6 LPC1768 + Signal Pin Pin + ------------------- ----- -------- + PIO0_6-USB_CONNECT* 23 P0.21 + USB_DM 36 USB_D- + USB_DP 37 USB_D+ + PIO0_3-VBUS_SENSE** 39 P0.5 + + These jumper settings are listed for information only. They are *not* + required for use with NuttX and LPCXpresso. The configurable pins + (P0.21 and P0.5) are not used! + + *J14 must be set to permit GPIO control of the USB connect pin + **J12 must be set to permit GPIO control of the USB vbus sense pin + J23 is associated the LEDs used for USB support + + Here is a more detailed pin mapping: + + ---------------------------------------------+------+----------------------------------------------- + LPCXpresso | J4/6 | Base Board + ---------------------------------------------| |----------------------------------------------- + LPC1768 Signal | | Signal Connection + ------------------------------ --------------+------+------------------- --------------------------- + P0.29/USB-D+ P0[29]/USB-D+ | 37 | USB_DP USB D+ + P0.30/USB-D- P0[30]/USB-D- | 36 | USB_DM USB D- + P1.18/USB-UP-LED/PWM1.1/CAP1.0 PAD1 | N/A | N/A N/A + P1.30/VBUS/AD0.4 P1[30] | 19 | PIO1_3 (Not used on board) + P2.9/USB-CONNECT/RXD2* PAD19 | N/A | N/A N/A + ------------------------------ --------------+------+------------------- --------------------------- + P0.21/RI1/RD1 P0[21] | 23 | PIO0_6-USB_CONNECT VBUS via J14 and transistor + P0.5/I2SRX-WS/TD2/CAP2.1 P0[5] | 39 | PIO0_3-VBUS_SENSE VBUS via J12 + ------------------------------ --------------+------+------------------- --------------------------- + + *P2.9 connects to a transistor driven USB-D+ pullup on the LPCXpresso board. + +96x64 White OLED with I2C/SPI interface +--------------------------------------- + The OLED display can be connected either to the SPI-bus or the I2C-bus. + + Jumper Settings: + + - For the SPI interface (default), insert jumpers in J42, J43, J45 pin1-2 + and J46 pin 1-2. + - For I2C interface, insert jumpers in J45 pin 2-3, J46 pin 2-3 and J47. + + In either case insert a jumper in J44 in order to allow PIO1_10 to control + the OLED-voltage. + + Jumper Signal Control: + + J42: Short: SPI Open: I2C (Default: inserted) + + J44: Allow control of OLED voltage (Default: inserted) + + PIO1_10-------->J44 ---------->FAN5331 + + Common Reset: + + PIO0_0-RESET ---------------> RES# + + J43: Select OLED chip select + J58: For embed (Default: not inserted) + + PIO0_2--------------->J43 ---->CS# + PIO2_7--------->J58 ->J43 ---->D/C# + PIO0_8-MISO --------^ + + J45: Select SPI or I2C clock (Default: SPI clock) + + PIO2_11-SCK---->J45 ----------> D0 + PIO0_4-SCL------------^ + + J46: Select serial data input (Default: SPI MOSI) + + PIO0_9-MOSI---->J46 ----------> D1 + I2C_SDA---------------^ + + J47: Allow I2C bi-directional communications (Default: SPI unidirectional) + + PIO0_5-SDA---->J47 ----------> D2 + + LPCXpresso Signals + + ----------------------------+-------+-------------- ---------------------------------------- + LPC1758 Pin | J4/6 | Base Board Description + ----------------------------+-------+-------------- ---------------------------------------- + P2.1/PWM1.2/RXD1 | 43 | PIO1_10 FAN5331 Power Control (SHDN#) + RESET_N | 4 | PIO0_0-RESET OLED reset (RES#) -- Resets EVERYTHING + P0.6/I2SRX-SDA/SSEL1/MAT2.0 | 8 | PIO0_2 OLED chip select (CS#) + P2.7/RD2/RTS1 | 49 | PIO2_7 OLED command/data (D/C#) + P0.7/I2STX-CLK/SCK1/MAT2.1 | 7 | PIO2_11-SCK OLED clock (D0) + P0.9/I2STX-SDA/MOSI1/MAT2.3 | 5 | PIO0_9-MOSI OLED data in (D1) + ----------------------------+-------+-------------- ---------------------------------------- + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The Code Red GNU toolchain + 2. The CodeSourcery GNU toolchain, + 3. The devkitARM GNU toolchain, + 4. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the Code Red toolchain and the + make system is setup to default to use the Code Red Linux toolchain. To use + the other toolchain, you simply need add one of the following configuration + options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=n : Code Red toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y : Code Red toolchain under Linux + + You may also have to modify the PATH in the setenv.h file if your make cannot + find the tools. + + NOTE: the CodeSourcery (for Windows), devkitARM, and Code Red (for Windoes) + are Windows native toolchains. The CodeSourcey (for Linux), Code Red (for Linux) + and NuttX buildroot toolchains are Cygwin and/or Linux native toolchains. There + are several limitations to using a Windows based toolchain in a Cygwin + environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +Code Red IDE +^^^^^^^^^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Linux Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lpc17xx, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/lpc17x/lpc17_vectors.S. + + Using Code Red GNU Tools from Cygwin + ------------------------------------ + + Under Cygwin, the Code Red command line tools (e.g., arm-non-eabi-gcc) cannot + be executed because the they only have execut privileges for Administrators. I + worked around this by: + + Opening a native Cygwin RXVT as Administrator (Right click, "Run as administrator"), + then executing 'chmod 755 *.exe' in the following directories: + + /cygdrive/c/nxp/lpcxpreeso_3.6/bin, and + /cygdrive/c/nxp/lpcxpreeso_3.6/Tools/bin + + Command Line Flash Programming + ------------------------------ + + If using LPCLink as your debug connection, first of all boot the LPC-Link using + the script: + + bin\Scripts\bootLPCXpresso type + + where type = winusb for Windows XP, or type = hid for Windows Vista / 7. + + Now run the flash programming utility with the following options + + flash_utility wire -ptarget -flash-load[-exec]=filename [-load-base=base_address] + + Where flash_utility is one of: + + crt_emu_lpc11_13 (for LPC11xx or LPC13xx parts) + crt_emu_cm3_nxp (for LPC17xx parts) + crt_emu_a7_nxp (for LPC21/22/23/24 parts) + crt_emu_a9_nxp (for LPC31/32 and LPC29xx parts) + crt_emu_cm3_lmi (for TI Stellaris parts) + + wire is one of: + + (empty) (for Red Probe+, Red Probe, RDB1768v1, or TI Stellaris evaluation boards) + -wire=hid (for RDB1768v2 without upgraded firmware) + -wire=winusb (for RDB1768v2 with upgraded firmware) + -wire=winusb (for LPC-Link on Windows XP) + -wire=hid (for LPC-Link on Windows Vista/ Windows 7) + + target is the target chip name. For example LPC1343, LPC1114/301, LPC1768 etc. + + filename is the file to flash program. It may be an executable (axf) or a binary + (bin) file. If using a binary file, the base_address must be specified. + + base_address is the base load address when flash programming a binary file. It + should be specified as a hex value with a leading 0x. + + Note: + - flash-load will leave the processor in a stopped state + - flash-load-exec will start execution of application as soon as download has + completed. + + Examples + To load the executable file app.axf and start it executing on an LPC1758 + target using Red Probe, use the following command line: + + crt_emu_cm3_nxp -pLPC1758 -flash-load-exec=app.axf + + To load the binary file binary.bin to address 0x1000 to an LPC1343 target + using LPC-Link on Windows XP, use the following command line: + + crt_emu_lpc11_13_nxp -wire=hid -pLPC1343 -flash-load=binary.bin -load-base=0x1000 + + tools/flash.sh + -------------- + + All of the above steps are automated in the bash script flash.sh that can + be found in the configs/lpcxpresso/tools directory. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/nuttx/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +^^^^ + + If CONFIG_ARCH_LEDS is defined, then support for the LPCXpresso LEDs will be + included in the build. See: + + - configs/lpcxpresso-lpc1768/include/board.h - Defines LED constants, types and + prototypes the LED interface functions. + + - configs/lpcxpresso-lpc1768/src/lpcxpresso-lpc1768.h - GPIO settings for the LEDs. + + - configs/lpcxpresso-lpc1768/src/up_leds.c - LED control logic. + + The LPCXpresso LPC1768 has a single LEDs (there are more on the Embedded Artists + base board, but those are not controlled by NuttX). Usage this single LED by NuttX + is as follows: + + - The LED is not illuminated until the LPCXpresso completes initialization. + + If the LED is stuck in the OFF state, this means that the LPCXpresso did not + complete initializeation. + + - Each time the OS enters an interrupt (or a signal) it will turn the LED OFF and + restores its previous stated upon return from the interrupt (or signal). + + The normal state, after initialization will be a dull glow. The brightness of + the glow will be inversely related to the proportion of time spent within interrupt + handling logic. The glow may decrease in brightness when the system is very + busy handling device interrupts and increase in brightness as the system becomes + idle. + + Stuck in the OFF state suggests that that the system never completed + initialization; Stuck in the ON state would indicated that the system + intialialized, but is not takint interrupts. + + - If a fatal assertion or a fatal unhandled exception occurs, the LED will flash + strongly as a slow, 2Hz rate. + +LPCXpresso Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + General Architecture Settings: + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc17xx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LPC1768=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=lpcxpresso-lpc1768 + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_LPCEXPRESSO=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x10000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + CONFIG_LPC17_MAINOSC=y + CONFIG_LPC17_PLL0=y + CONFIG_LPC17_PLL1=n + CONFIG_LPC17_ETHERNET=n + CONFIG_LPC17_USBHOST=n + CONFIG_LPC17_USBOTG=n + CONFIG_LPC17_USBDEV=n + CONFIG_LPC17_UART0=y + CONFIG_LPC17_UART1=n + CONFIG_LPC17_UART2=n + CONFIG_LPC17_UART3=n + CONFIG_LPC17_CAN1=n + CONFIG_LPC17_CAN2=n + CONFIG_LPC17_SPI=n + CONFIG_LPC17_SSP0=n + CONFIG_LPC17_SSP1=n + CONFIG_LPC17_I2C0=n + CONFIG_LPC17_I2C1=n + CONFIG_LPC17_I2S=n + CONFIG_LPC17_TMR0=n + CONFIG_LPC17_TMR1=n + CONFIG_LPC17_TMR2=n + CONFIG_LPC17_TMR3=n + CONFIG_LPC17_RIT=n + CONFIG_LPC17_PWM0=n + CONFIG_LPC17_MCPWM=n + CONFIG_LPC17_QEI=n + CONFIG_LPC17_RTC=n + CONFIG_LPC17_WDT=n + CONFIG_LPC17_ADC=n + CONFIG_LPC17_DAC=n + CONFIG_LPC17_GPDMA=n + CONFIG_LPC17_FLASH=n + + LPC17xx specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + LPC17xx specific CAN device driver settings. These settings all + require CONFIG_CAN: + + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined. + CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7 + + LPC17xx specific PHY/Ethernet device driver settings. These setting + also require CONFIG_NET and CONFIG_LPC17_ETHERNET. + + CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY + CONFIG_PHY_AUTONEG - Enable auto-negotion + CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. + CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex + + CONFIG_NET_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb + CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 18 + CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18 + CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented). + CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs + CONFIG_DEBUG. + CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets. + Also needs CONFIG_DEBUG. + CONFIG_NET_HASH - Enable receipt of near-perfect match frames. + CONFIG_LPC17_MULTICAST - Enable receipt of multicast (and unicast) frames. + Automatically set if CONFIG_NET_IGMP is selected. + + LPC17xx USB Device Configuration + + CONFIG_LPC17_USBDEV_FRAME_INTERRUPT + Handle USB Start-Of-Frame events. + Enable reading SOF from interrupt handler vs. simply reading on demand. + Probably a bad idea... Unless there is some issue with sampling the SOF + from hardware asynchronously. + CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT + Enable high priority interrupts. I have no idea why you might want to + do that + CONFIG_LPC17_USBDEV_NDMADESCRIPTORS + Number of DMA descriptors to allocate in SRAM. + CONFIG_LPC17_USBDEV_DMA + Enable lpc17xx-specific DMA support + CONFIG_LPC17_USBDEV_NOVBUS + Define if the hardware implementation does not support the VBUS signal + CONFIG_LPC17_USBDEV_NOLED + Define if the hardware implementation does not support the LED output + + LPC17xx USB Host Configuration (the LPCXpresso does not support USB Host) + + CONFIG_USBHOST_OHCIRAM_SIZE + Total size of OHCI RAM (in AHB SRAM Bank 1) + CONFIG_USBHOST_NEDS + Number of endpoint descriptors + CONFIG_USBHOST_NTDS + Number of transfer descriptors + CONFIG_USBHOST_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_USBHOST_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_IOBUFSIZE + Size of one end-user I/O buffer. This can be zero if the + application can guarantee that all end-user I/O buffers + reside in AHB SRAM. + +Configurations +^^^^^^^^^^^^^^ + +Each LPCXpresso configuration is maintained in a sub-directory and can be +selected as follow: + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + cd - + . ./setenv.sh + +Where is one of the following: + + dhcpd: + This builds the DCHP server using the apps/examples/dhcpd application + (for execution from FLASH.) See apps/examples/README.txt for information + about the dhcpd example. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Jumpers: Nothing special. Use the default base board jumper + settings. + + nsh: + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables both the serial and telnet NSH interfaces. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. This configuration has been used for testing the microSD card. + This support is, however, disabled in the base configuration. + + At last attempt, the SPI-based mircroSD does not work at + higher fequencies. Setting the SPI frequency to 400000 + removes the problem. There must be some more optimal + value that could be determined with additional experimetnation. + + Jumpers: J55 must be set to provide chip select PIO1_11 signal as + the SD slot chip select. + + nx: + And example using the NuttX graphics system (NX). This example + uses the UG-9664HSWAG01 driver. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Jumpers: There are several jumper settings needed by the OLED. + All are the default settings: + + J42: Close to select the SPI interface (Default: closed) + J43: Close to support OLED command/data select (Default: closed) + J44: Close to allow control of OLED voltage (Default: closed) + J45: Close to select SPI clock (Default: closed) + J46: Close SPI data input (MOSI) (Default:closed) + + thttpd: + This builds the THTTPD web server example using the THTTPD and + the apps/examples/thttpd application. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. You will need to build the NXFLAT toolchain as described above in + order to use this example. + + 3. Build setup (easily reconfigured): + + CONFIG_HOST_LINUX=y : Linux + CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y : CodeRed for Linux + + 4. Jumpers: Nothing special. Use the default base board jumper + settings. + + usbmsc: + This configuration directory exercises the USB mass storage + class driver at apps/system/usbmsc. See apps/examples/README.txt + for more information. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. At present, the value for the SD SPI frequency is too high and the + SD will fail. Setting that frequency to 400000 removes the problem. + TODO: Tune this frequency to some optimal value. + + 3. Jumpers: J55 must be set to provide chip select PIO1_11 signal as + the SD slot chip select. + diff --git a/configs/lpcxpresso-lpc1768/dhcpd/Make.defs b/configs/lpcxpresso-lpc1768/dhcpd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..0e863a3a679c0cd316da93d1f136b9fde8ad3dd8 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/dhcpd/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/lpcxpresso-lpc1768/dhcpd/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lpcxpresso-lpc1768/dhcpd/defconfig b/configs/lpcxpresso-lpc1768/dhcpd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..caca3ccbb3bde02e0f64857be3b4afeac231a5bb --- /dev/null +++ b/configs/lpcxpresso-lpc1768/dhcpd/defconfig @@ -0,0 +1,866 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +# CONFIG_LPC17_UART0 is not set +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +CONFIG_LPC17_UART3=y +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=15776 +CONFIG_NET_NTXDESC=13 +CONFIG_NET_NRXDESC=13 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8079 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPCXPRESSO=y +# CONFIG_ARCH_BOARD_MBED is not set +# CONFIG_ARCH_BOARD_NUCLEUS2G is not set +# CONFIG_ARCH_BOARD_ZKITARM is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lpcxpresso-lpc1768" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=4 +CONFIG_START_DAY=17 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="dhcpd_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGWORK=17 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +CONFIG_ETH0_PHY_LAN8720=y +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +CONFIG_ARCH_HAVE_UART3=y +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART3 Configuration +# +CONFIG_UART3_RXBUFSIZE=256 +CONFIG_UART3_TXBUFSIZE=256 +CONFIG_UART3_BAUD=115200 +CONFIG_UART3_BITS=8 +CONFIG_UART3_PARITY=0 +CONFIG_UART3_2STOP=0 +# CONFIG_UART3_IFLOWCONTROL is not set +# CONFIG_UART3_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +# CONFIG_NET_TCP is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=8 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +CONFIG_EXAMPLES_DHCPD=y +CONFIG_EXAMPLES_DHCPD_NOMAC=y +CONFIG_EXAMPLES_DHCPD_IPADDR=0x0a000001 +CONFIG_EXAMPLES_DHCPD_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +CONFIG_NETUTILS_DHCPD=y +# CONFIG_NETUTILS_DHCPD_IGNOREBROADCAST is not set +CONFIG_NETUTILS_DHCPD_INTERFACE="eth0" +CONFIG_NETUTILS_DHCPD_LEASETIME=864000 +CONFIG_NETUTILS_DHCPD_MINLEASETIME=86400 +CONFIG_NETUTILS_DHCPD_MAXLEASETIME=2592000 +CONFIG_NETUTILS_DHCPD_MAXLEASES=6 +CONFIG_NETUTILS_DHCPD_STARTIP=0x0a000002 +CONFIG_NETUTILS_DHCPD_ROUTERIP=0x0a000001 +CONFIG_NETUTILS_DHCPD_NETMASK=0xffffff00 +CONFIG_NETUTILS_DHCPD_DNSIP=0x08080808 +CONFIG_NETUTILS_DHCPD_OFFERTIME=3600 +CONFIG_NETUTILS_DHCPD_DECLINETIME=3600 +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lpcxpresso-lpc1768/dhcpd/setenv.sh b/configs/lpcxpresso-lpc1768/dhcpd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..03641fd61227130023ff5866dccaf2536fb57f97 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/dhcpd/setenv.sh @@ -0,0 +1,59 @@ +#!/bin/bash +# configs/lpcxpresso-lpc1768/dhcpd/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` + +# This is where the buildroot might reside on a Linux or Cygwin system +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the default install location for Code Red on Linux +export TOOLCHAIN_BIN="/usr/local/LPCXpresso/tools/bin" + +# This is the Cygwin path to the LPCXpresso 3.6 install location under Windows +#export TOOLCHAIN_BIN="/cygdrive/c/nxp/lpcxpresso_3.6/Tools/bin" + +# This is the path to the LPCXpression tool subdirectory +export LPCTOOL_DIR="${WD}/configs/lpcxpresso-lpc1768/tools" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lpcxpresso-lpc1768/include/board.h b/configs/lpcxpresso-lpc1768/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..d8f9221d840151c6bf68be6c8fc693b00bff368e --- /dev/null +++ b/configs/lpcxpresso-lpc1768/include/board.h @@ -0,0 +1,290 @@ +/************************************************************************************ + * configs/lpcxpresso-lpc1768/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* NOTE: The following definitions require lpc17_syscon.h. It is not included here + * because the including C file may not have that file in its include path. + */ + +#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency */ +#define BOARD_OSCCLK_FREQUENCY BOARD_XTAL_FREQUENCY /* Main oscillator frequency */ +#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency */ +#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */ + +/* This is the clock setup we configure for: + * + * SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1 + * CCLCK = 480MHz / 6 = 80MHz -> CCLK divider = 6 + */ + +#define LPC17_CCLK 80000000 /* 80Mhz */ + +/* Select the main oscillator as the frequency source. SYSCLK is then the frequency + * of the main oscillator. + */ + +#undef CONFIG_LPC17_MAINOSC +#define CONFIG_LPC17_MAINOSC 1 +#define BOARD_SCS_VALUE SYSCON_SCS_OSCEN + +/* Select the main oscillator and CCLK divider. The output of the divider is CCLK. + * The input to the divider (PLLCLK) will be determined by the PLL output. + */ + +#define BOARD_CCLKCFG_DIVIDER 6 +#define BOARD_CCLKCFG_VALUE ((BOARD_CCLKCFG_DIVIDER-1) << SYSCON_CCLKCFG_SHIFT) + +/* PLL0. PLL0 is used to generate the CPU clock divider input (PLLCLK). + * + * Source clock: Main oscillator + * PLL0 Multiplier value (M): 20 + * PLL0 Pre-divider value (N): 1 + * + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz + */ + +#undef CONFIG_LPC17_PLL0 +#define CONFIG_LPC17_PLL0 1 +#define BOARD_CLKSRCSEL_VALUE SYSCON_CLKSRCSEL_MAIN + +#define BOARD_PLL0CFG_MSEL 20 +#define BOARD_PLL0CFG_NSEL 1 +#define BOARD_PLL0CFG_VALUE \ + (((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLL0CFG_MSEL_SHIFT) | \ + ((BOARD_PLL0CFG_NSEL-1) << SYSCON_PLL0CFG_NSEL_SHIFT)) + +/* PLL1 -- Not used. */ + +#undef CONFIG_LPC17_PLL1 +#define BOARD_PLL1CFG_MSEL 36 +#define BOARD_PLL1CFG_NSEL 1 +#define BOARD_PLL1CFG_VALUE \ + (((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLL1CFG_MSEL_SHIFT) | \ + ((BOARD_PLL1CFG_NSEL-1) << SYSCON_PLL1CFG_NSEL_SHIFT)) + +/* USB divider. This divider is used when PLL1 is not enabled to get the + * USB clock from PLL0: + * + * USBCLK = PLL0CLK / 10 = 48MHz + */ + +#define BOARD_USBCLKCFG_VALUE SYSCON_USBCLKCFG_DIV10 + +/* FLASH Configuration */ + +#undef CONFIG_LPC17_FLASH +#define CONFIG_LPC17_FLASH 1 +#define BOARD_FLASHCFG_VALUE 0x0000303a + +/* Ethernet configuration */ + +//#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV44 +#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV20 + +/* LED definitions ******************************************************************/ +/* The LPCXpresso LPC1768 board has a single red LED (there are additional LEDs on + * the base board not considered here). + */ + /* ON OFF */ +#define LED_STARTED 0 /* OFF ON (never happens) */ +#define LED_HEAPALLOCATE 0 /* OFF ON (never happens) */ +#define LED_IRQSENABLED 0 /* OFF ON (never happens) */ +#define LED_STACKCREATED 1 /* ON ON (never happens) */ +#define LED_INIRQ 2 /* OFF NC (momentary) */ +#define LED_SIGNAL 2 /* OFF NC (momentary) */ +#define LED_ASSERTION 2 /* OFF NC (momentary) */ +#define LED_PANIC 0 /* OFF ON (1Hz flashing) */ + +/* Alternate pin selections *********************************************************/ +/* Pin Description Connector On Board Base Board + * -------------------------------- --------- -------------- --------------------- + * P0[0]/RD1/TXD3/SDA1 J6-9 I2C E2PROM SDA TXD3/SDA1 + * P0[1]/TD1/RXD3/SCL J6-10 RXD3/SCL1 + * P0[2]/TXD0/AD0[7] J6-21 + * P0[3]/RXD0/AD0[6] J6-22 + * P0[4]/I2SRX-CLK/RD2/CAP2.0 J6-38 CAN_RX2 + * P0[5]/I2SRX-WS/TD2/CAP2.1 J6-39 CAN_TX2 + * P0[6]/I2SRX_SDA/SSEL1/MAT2[0] J6-8 SSEL1, OLED CS + * P0[7]/I2STX_CLK/SCK1/MAT2[1] J6-7 SCK1, OLED SCK + * P0[8]/I2STX_WS/MISO1/MAT2[2] J6-6 MISO1 + * P0[9]/I2STX_SDA/MOSI1/MAT2[3] J6-5 MOSI1, OLED data in + * P0[10] J6-40 TXD2/SDA2 + * P0[11] J6-41 RXD2/SCL2 + * P0[15]/TXD1/SCK0/SCK J6-13 TXD1/SCK0 + * P0[16]/RXD1/SSEL0/SSEL J6-14 RXD1/SSEL0 + * P0[17]/CTS1/MISO0/MISO J6-12 MISO0 + * P0[18]/DCD1/MOSI0/MOSI J6-11 MOSI0 + * P0[19]/DSR1/SDA1 PAD17 N/A + * P0[20]/DTR1/SCL1 PAD18 I2C E2PROM SCL N/A + * P0[21]/RI1/MCIPWR/RD1 J6-23 + * P0[22]/RTS1/TD1 J6-24 LED + * P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] J6-15 AD0.0 + * P0[24]/AD0[1]/I2SRX_WS/CAP3[1] J6-16 AD0.1 + * P0[25]/AD0[2]/I2SRX_SDA/TXD3 J6-17 AD0.2 + * P0[26]/AD0[3]/AOUT/RXD3 J6-18 AD0.3/AOUT / RGB LED + * P0[27]/SDA0/USB_SDA J6-25 + * P0[28]/SCL0 J6-26 + * P0[29]/USB_D+ J6-37 USB_D+ + * P0[30]/USB_D- J6-36 USB_D- + */ + +#define GPIO_UART3_TXD GPIO_UART3_TXD_1 +#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1 +#define GPIO_UART3_RXD GPIO_UART3_RXD_1 +#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 +#define GPIO_SSP1_SCK GPIO_SSP1_SCK_1 +#define GPIO_UART2_TXD GPIO_UART2_TXD_1 +#define GPIO_UART2_RXD GPIO_UART2_RXD_1 +#define GPIO_UART1_TXD GPIO_UART1_TXD_1 +#define GPIO_SSP0_SCK GPIO_SSP0_SCK_1 +#define GPIO_UART1_RXD GPIO_UART1_RXD_1 +#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_1 +#define GPIO_SSP0_MISO GPIO_SSP0_MISO_1 +#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_1 + +/* P1[0]/ENET-TXD0 J6-34? TXD0 TX-(Ethernet PHY) + * P1[1]/ENET_TXD1 J6-35? TXD1 TX+(Ethernet PHY) + * P1[4]/ENET_TX_EN TXEN N/A + * P1[8]/ENET_CRS CRS_DV/MODE2 N/A + * P1[9]/ENET_RXD0 J6-32? RXD0/MODE0 RD-(Ethernet PHY) + * P1[10]/ENET_RXD1 J6-33? RXD1/MODE1 RD+(Ethernet PHY) + * P1[14]/ENET_RX_ER RXER/PHYAD0 N/A + * P1[15]/ENET_REF_CLK REFCLK N/A + * P1[16]/ENET_MDC MDC N/A + * P1[17]/ENET_MDIO MDIO N/A + * P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] PAD1 N/A + * P1[19]/MC0A/USB_PPWR/N_CAP1.1 PAD2 N/A + * P1[20]/MCFB0/PWM1.2/SCK0 PAD3 N/A + * P1[21]/MCABORT/PWM1.3/SSEL0 PAD4 N/A + * P1[22]/MC0B/USB-PWRD/MAT1.0 PAD5 N/A + * P1[23]/MCFB1/PWM1.4/MISO0 PAD6 N/A + * P1[24]/MCFB2/PWM1.5/MOSI0 PAD7 N/A + * P1[25]/MC1A/MAT1.1 PAD8 N/A + * P1[26]/MC1B/PWM1.6/CAP0.0 PAD9 N/A + * P1[27]/CLKOUT/USB-OVRCR-N/CAP0.1 PAD10 N/A + * P1[28]/MC2A/PCAP1.0/MAT0.0 PAD11 N/A + * P1[29]/MC2B/PCAP1.1/MAT0.1 PAD12 N/A + * P1[30]/VBUS/AD0[4] J6-19 AD0.4 + * P1[31]/SCK1/AD0[5] J6-20 AD0.5 + */ + +#define GPIO_ENET_MDC GPIO_ENET_MDC_1 +#define GPIO_ENET_MDIO GPIO_ENET_MDIO_1 + +/* P2[0]/PWM1.1/TXD1 J6-42 PWM1.1 / RGB LED / RS422 RX + * P2[1]/PWM1.2/RXD1 J6-43 PWM1.2 / OLED voltage / RGB LED / RS422 RX + * P2[2]/PWM1.3/CTS1/TRACEDATA[3] J6-44 PWM1.3 + * P2[3]/PWM1.4/DCD1/TRACEDATA[2] J6-45 PWM1.4 + * P2[4]/PWM1.5/DSR1/TRACEDATA[1] J6-46 PWM1.5 + * P2[5]/PWM1[6]/DTR1/TRACEDATA[0] J6-47 PWM1.6 + * P2[6]/PCAP1[0]/RI1/TRACECLK J6-48 + * P2[7]/RD2/RTS1 J6-49 OLED command/data + * P2[8]/TD2/TXD2 J6-50 + * P2[9]/USB_CONNECT/RXD2 PAD19 USB Pullup N/A + * P2[10]/EINT0/NMI J6-51 + * P2[11]/EINT1/I2STX_CLK J6-52 + * P2[12]/EINT2/I2STX_WS J6-53 + * P2[13]/EINT3/I2STX_SDA J6-27 + */ + +#define GPIO_PWM1p1 GPIO_PWM1p1_2 +#define GPIO_PWM1p2 GPIO_PWM1p2_2 +#define GPIO_PWM1p3 GPIO_PWM1p3_2 +#define GPIO_PWM1p4 GPIO_PWM1p4_2 +#define GPIO_PWM1p5 GPIO_PWM1p5_2 +#define GPIO_PWM1p6 GPIO_PWM1p6_2 + +/* P3[25]/MAT0.0/PWM1.2 PAD13 N/A + * P3[26]/STCLK/MAT0.1/PWM1.3 PAD14 N/A + * + * P4[28]/RX-MCLK/MAT2.0/TXD3 PAD15 N/A + * P4[29]/TX-MCLK/MAT2.1/RXD3 PAD16 N/A + */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +EXTERN void lpc17_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/lpcxpresso-lpc1768/nsh/Make.defs b/configs/lpcxpresso-lpc1768/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f1d73a762ba3fd16477f6fcc5c41aed01bb07e52 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/lpcxpresso-lpc1768/nsh/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lpcxpresso-lpc1768/nsh/defconfig b/configs/lpcxpresso-lpc1768/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d15a6338cf6cb0ae0e5890417825df024c805b1b --- /dev/null +++ b/configs/lpcxpresso-lpc1768/nsh/defconfig @@ -0,0 +1,1104 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +# CONFIG_LPC17_UART0 is not set +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +CONFIG_LPC17_UART3=y +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +CONFIG_LPC17_SSP1=y +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=7296 +CONFIG_NET_NTXDESC=6 +CONFIG_NET_NRXDESC=6 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8079 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPCXPRESSO=y +# CONFIG_ARCH_BOARD_MBED is not set +# CONFIG_ARCH_BOARD_NUCLEUS2G is not set +# CONFIG_ARCH_BOARD_ZKITARM is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lpcxpresso-lpc1768" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=1 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=4 +CONFIG_START_DAY=12 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +CONFIG_ETH0_PHY_LAN8720=y +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +CONFIG_ARCH_HAVE_UART3=y +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART3 Configuration +# +CONFIG_UART3_RXBUFSIZE=256 +CONFIG_UART3_TXBUFSIZE=256 +CONFIG_UART3_BAUD=115200 +CONFIG_UART3_BITS=8 +CONFIG_UART3_PARITY=0 +CONFIG_UART3_2STOP=0 +# CONFIG_UART3_IFLOWCONTROL is not set +# CONFIG_UART3_OFLOWCONTROL is not set +# CONFIG_UART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lpcxpresso-lpc1768/nsh/setenv.sh b/configs/lpcxpresso-lpc1768/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..46d5b3261fdc805bfef76365e07d8b6062d1c5d2 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/nsh/setenv.sh @@ -0,0 +1,59 @@ +#!/bin/bash +# configs/lpcxpresso-lpc1768/nsh/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` + +# This is where the buildroot might reside on a Linux or Cygwin system +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the default install location for Code Red on Linux +export TOOLCHAIN_BIN="/usr/local/LPCXpresso/tools/bin" + +# This is the Cygwin path to the LPCXpresso 3.6 install location under Windows +#export TOOLCHAIN_BIN="/cygdrive/c/nxp/lpcxpresso_3.6/Tools/bin" + +# This is the path to the LPCXpression tool subdirectory +export LPCTOOL_DIR="${WD}/configs/lpcxpresso-lpc1768/tools" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lpcxpresso-lpc1768/nx/Make.defs b/configs/lpcxpresso-lpc1768/nx/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..859d8b1ced1f918fb0e2be977a2cba3242a5bab3 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/nx/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/lpcxpresso-lpc1768/nx/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lpcxpresso-lpc1768/nx/defconfig b/configs/lpcxpresso-lpc1768/nx/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..874b60fcea32fdf94dd3d579c140f6d1290ee5c3 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/nx/defconfig @@ -0,0 +1,859 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_ETHERNET is not set +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +# CONFIG_LPC17_UART0 is not set +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +CONFIG_LPC17_UART3=y +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +CONFIG_LPC17_SSP1=y +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8079 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPCXPRESSO=y +# CONFIG_ARCH_BOARD_MBED is not set +# CONFIG_ARCH_BOARD_NUCLEUS2G is not set +# CONFIG_ARCH_BOARD_ZKITARM is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lpcxpresso-lpc1768" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +CONFIG_BOARDCTL_GRAPHICS=y +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=4 +CONFIG_START_DAY=18 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nx_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=12 +CONFIG_NFILE_STREAMS=12 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_EXCHANGE is not set +CONFIG_SPI_CMDDATA=y +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=255 +CONFIG_LCD_MAXPOWER=2 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +CONFIG_LCD_UG9664HSWAG01=y +CONFIG_UG9664HSWAG01_SPIMODE=0 +CONFIG_UG9664HSWAG01_FREQUENCY=3500000 +CONFIG_UG9664HSWAG01_NINTERFACES=1 +CONFIG_UG9664HSWAG01_POWER=y +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +CONFIG_ARCH_HAVE_UART3=y +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART3 Configuration +# +CONFIG_UART3_RXBUFSIZE=256 +CONFIG_UART3_TXBUFSIZE=256 +CONFIG_UART3_BAUD=115200 +CONFIG_UART3_BITS=8 +CONFIG_UART3_PARITY=0 +CONFIG_UART3_2STOP=0 +# CONFIG_UART3_IFLOWCONTROL is not set +# CONFIG_UART3_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +# CONFIG_NX_DISABLE_1BPP is not set +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=2 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=1 +CONFIG_NXTK_BORDERCOLOR2=0 +CONFIG_NXTK_BORDERCOLOR3=1 +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +# CONFIG_EXAMPLES_NX_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NX_BGCOLOR=0 +CONFIG_EXAMPLES_NX_COLOR1=1 +CONFIG_EXAMPLES_NX_COLOR2=1 +CONFIG_EXAMPLES_NX_TBCOLOR=1 +CONFIG_EXAMPLES_NX_FONTCOLOR=0 +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=1 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=4 +CONFIG_EXAMPLES_NX_EXTERNINIT=y +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lpcxpresso-lpc1768/nx/setenv.sh b/configs/lpcxpresso-lpc1768/nx/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..2f04a8ac6d14e4e75ff9f0cb51e3f87a760bcd5b --- /dev/null +++ b/configs/lpcxpresso-lpc1768/nx/setenv.sh @@ -0,0 +1,59 @@ +#!/bin/bash +# configs/lpcxpresso-lpc1768/nx/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` + +# This is where the buildroot might reside on a Linux or Cygwin system +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the default install location for Code Red on Linux +export TOOLCHAIN_BIN="/usr/local/LPCXpresso/tools/bin" + +# This is the Cygwin path to the LPCXpresso 3.6 install location under Windows +#export TOOLCHAIN_BIN="/cygdrive/c/nxp/lpcxpresso_3.6/Tools/bin" + +# This is the path to the LPCXpression tool subdirectory +export LPCTOOL_DIR="${WD}/configs/lpcxpresso-lpc1768/tools" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lpcxpresso-lpc1768/scripts/ld.script b/configs/lpcxpresso-lpc1768/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..67e3a4f15ab2b93405efae7dbea7abe223536c6c --- /dev/null +++ b/configs/lpcxpresso-lpc1768/scripts/ld.script @@ -0,0 +1,117 @@ +/**************************************************************************** + * configs/lpcxpresso-lpc1768/scripts/ld.script + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LPC1768 has 512Kb of FLASH beginning at address 0x0000:0000 and + * 64Kb of total SRAM: 32Kb of SRAM in the CPU block beginning at address + * 0x10000000 and 32Kb of AHB SRAM in two banks of 16Kb beginning at addresses + * 0x20070000 and 0x20080000. Here we assume that .data and .bss will all fit + * into the 32Kb CPU SRAM address range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K + sram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lpcxpresso-lpc1768/src/.gitignore b/configs/lpcxpresso-lpc1768/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/lpcxpresso-lpc1768/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/lpcxpresso-lpc1768/src/Makefile b/configs/lpcxpresso-lpc1768/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..c7a44a8284fb3e2e7d4e4927c4629c8bbec35402 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/src/Makefile @@ -0,0 +1,53 @@ +############################################################################ +# configs/lpcxpresso-lpc1768/src/Makefile +# +# Copyright (C) 2011-2012, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc17_boot.c lpc17_leds.c lpc17_ssp.c lpc17_adc.c lpc17_dac.c lpc17_pwm.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc17_appinit.c +endif + +ifeq ($(CONFIG_NX_LCDDRIVER),y) +CSRCS += lpc17_oled.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += lpc17_usbmsc.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_adc.c b/configs/lpcxpresso-lpc1768/src/lpc17_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..dd7fc837ea3ba20e5d3d8791728d69c9fbf1cfa7 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/src/lpc17_adc.c @@ -0,0 +1,123 @@ +/************************************************************************************ + * configs/lpcexpresso-1768/src/lpc17_adc.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Kannan + * + * Based on configs/stm3220g-eval/src/lpc17_adc.c + * + * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "lpc17_adc.h" +#include "lpcxpresso-lpc1768.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All LPC17 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call lpc17_adcinitialize() to get an instance of the ADC interface */ + + adc = lpc17_adcinitialize(); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_ADC */ diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c b/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..a9b760b87c7e852370f26b8958775180a28683e4 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c @@ -0,0 +1,158 @@ +/**************************************************************************** + * config/lpcxpresso-lpc1768/src/lpc17_appinit.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "lpc17_ssp.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifdef CONFIG_LIB_BOARDCTL + +/* PORT and SLOT number probably depend on the board configuration */ + +#define NSH_HAVEUSBDEV 1 +#ifdef CONFIG_LPC17_SSP1 +# define NSH_HAVEMMCSD 1 +#else +# undef NSH_HAVEMMCSD +#endif + +/* Do we have SPI support for MMC/SD? */ + +#ifdef NSH_HAVEMMCSD +#ifdef CONFIG_NSH_ARCHINIT +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 1 +# error "The LPCXpresso MMC/SD is on SSP1" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 1 +# endif +# if !defined(CONFIG_NSH_MMCSDSLOTNO) || CONFIG_NSH_MMCSDSLOTNO != 0 +# error "The LPCXpresso MMC/SD has only one slot (0)" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#else +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 1 +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +#endif +#endif + +/* Can't support USB device features if USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef NSH_HAVEMMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/* Currnently MMC/SD support is available only for NSH configurations */ + +#else +# undef NSH_HAVEMMCSD +#endif /* CONFIG_LIB_BOARDCTL */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef NSH_HAVEMMCSD + FAR struct spi_dev_s *ssp; + int ret; + + /* Get the SSP port */ + + ssp = lpc17_sspbus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + if (!ssp) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SSP port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SSP port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + /* Bind the SSP port to the slot */ + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, CONFIG_NSH_MMCSDSLOTNO, ssp); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to bind SSP port %d to MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfuly bound SSP port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); +#endif + return OK; +} diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_boot.c b/configs/lpcxpresso-lpc1768/src/lpc17_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..24ba6ebe7bd028896689bedf7d44550535e24b48 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/src/lpc17_boot.c @@ -0,0 +1,93 @@ +/************************************************************************************ + * configs/lpcxpresso-lpc1768/src/lpc17_boot.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_ssp.h" +#include "lpcxpresso-lpc1768.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void) +{ + /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak + * function lpcxpresso_sspdev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1) + if (lpcxpresso_sspdev_initialize) + { + lpcxpresso_sspdev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_dac.c b/configs/lpcxpresso-lpc1768/src/lpc17_dac.c new file mode 100644 index 0000000000000000000000000000000000000000..f27c4edf61bf11493fd576cdaf086e5093d036f8 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/src/lpc17_dac.c @@ -0,0 +1,99 @@ +/************************************************************************************ + * configs/zkit-arm-1769/src/lpc17_dac.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Kannan + * + * Based on configs/stm3220g-eval/src/lpc17_dac.c + * + * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_dac.h" + +#ifdef CONFIG_DAC + +/************************************************************************************ + * Name: dac_devinit + * + * Description: + * All LPC17xx architectures must provide the following interface to work with + * examples/diag. + * + ************************************************************************************/ + +int dac_devinit(void) +{ + static bool initialized = false; + struct dac_dev_s *dac; + int ret; + + if (!initialized) + { + /* Call lpc17_dacinitialize() to get an instance of the dac interface */ + + dac = lpc17_dacinitialize(); + if (dac == NULL) + { + adbg("ERROR: Failed to get dac interface\n"); + return -ENODEV; + } + + ret = dac_register("/dev/dac0", dac); + if (ret < 0) + { + adbg("dac_register failed: %d\n", ret); + return ret; + } + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_DAC */ diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_leds.c b/configs/lpcxpresso-lpc1768/src/lpc17_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..0b56fdc148b00e3dc57c27ff1d02d38a209555de --- /dev/null +++ b/configs/lpcxpresso-lpc1768/src/lpc17_leds.c @@ -0,0 +1,154 @@ +/**************************************************************************** + * configs/lpcxpresso-lpc1768/src/lpc17_leds.c + * + * Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_gpio.h" +#include "lpcxpresso-lpc1768.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static bool g_ncstate; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure all LED GPIO lines */ + + lpc17_configgpio(LPCXPRESSO_LED); + g_ncstate = true; +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool off; + + switch (led) + { + case 0: + case 2: + off = true; + break; + + case 1: + off = false; + g_ncstate = false; + break; + + default: + return; + } + + lpc17_gpiowrite(LPCXPRESSO_LED, off); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + bool off; + + switch (led) + { + case 0: + case 1: + off = false; + break; + + case 2: + off = g_ncstate; + break; + + default: + return; + } + + lpc17_gpiowrite(LPCXPRESSO_LED, off); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_oled.c b/configs/lpcxpresso-lpc1768/src/lpc17_oled.c new file mode 100644 index 0000000000000000000000000000000000000000..a6845e1dab114e4c4b1824424b055419c9c594ed --- /dev/null +++ b/configs/lpcxpresso-lpc1768/src/lpc17_oled.c @@ -0,0 +1,215 @@ +/**************************************************************************** + * config/lpcxpresso-lpc1768/src/lpc17_oled.c + * + * Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "lpc17_gpio.h" +#include "lpc17_ssp.h" +#include "lpcxpresso-lpc1768.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* This module is only built if CONFIG_NX_LCDDRIVER is selected. In this + * case, it would be an error if SSP1 is not also enabled. + */ + +#ifndef CONFIG_LPC17_SSP1 +# error "The OLED driver requires CONFIG_LPC17_SSP1 in the configuration" +#endif + +#ifndef CONFIG_UG9664HSWAG01_POWER +# error "This logic requires CONFIG_UG9664HSWAG01_POWER in the configuration" +#endif + +/* Debug ********************************************************************/ +/* Define the CONFIG_DEBUG_LCD to enable detailed debug output (stuff you + * would never want to see unless you are debugging this file). + * + * Verbose debug must also be enabled + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +#ifdef CONFIG_DEBUG_LCD +# define ugdbg(format, ...) vdbg(format, ##__VA_ARGS__) +# define oleddc_dumpgpio(m) lpc17_dumpgpio(LPCXPRESSO_OLED_POWER, m) +# define oledcs_dumpgpio(m) lpc17_dumpgpio(LPCXPRESSO_OLED_CS, m) +#else +# define ugdbg(x...) +# define oleddc_dumpgpio(m) +# define oledcs_dumpgpio(m) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED GPIOs. For the SPI interface, insert jumpers in J42, + * J43, J45 pin1-2 and J46 pin 1-2. + */ + + oledcs_dumpgpio("board_graphics_setup: After OLED CS setup"); + oleddc_dumpgpio("board_graphics_setup: On entry"); + + (void)lpc17_configgpio(LPCXPRESSO_OLED_POWER); /* OLED 11V power */ + (void)lpc17_configgpio(LPCXPRESSO_OLED_DC); /* OLED Command/Data */ + + oleddc_dumpgpio("board_graphics_setup: After OLED Power/DC setup"); + + /* Get the SPI1 port (configure as a Freescale SPI port) */ + + spi = lpc17_sspbus_initialize(1); + if (!spi) + { + glldbg("Failed to initialize SPI port 1\n"); + } + else + { + /* Bind the SPI port to the OLED */ + + dev = ug_initialize(spi, devno); + if (!dev) + { + glldbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno); + } + else + { + gllvdbg("Bound SPI port 1 to OLED %d\n", devno); + + /* And turn the OLED on (dim) */ + + (void)dev->setpower(dev, UG_POWER_DIM); + return dev; + } + } + return NULL; +} + +/**************************************************************************** + * Name: lpc17_ssp1cmddata + * + * Description: + * Set or clear the SD1329 D/Cn bit to select data (true) or command + * (false). This function must be provided by platform-specific logic. + * This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +int lpc17_ssp1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + if (devid == SPIDEV_DISPLAY) + { + /* Set GPIO to 1 for data, 0 for command */ + + (void)lpc17_gpiowrite(LPCXPRESSO_OLED_DC, !cmd); + return OK; + } + return -ENODEV; +} + +/**************************************************************************** + * Name: ug_power + * + * Description: + * If the hardware supports a controllable OLED a power supply, this + * interface should be provided. It may be called by the driver to turn + * the OLED power on and off as needed. + * + * Input Parameters: + * + * devno - A value in the range of 0 throuh CONFIG_UG9664HSWAG01_NINTERFACES-1. + * This allows support for multiple OLED devices. + * on - true:turn power on, false: turn power off. + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_UG9664HSWAG01_POWER +void ug_power(unsigned int devno, bool on) +{ + gllvdbg("power %s\n", on ? "ON" : "OFF"); + (void)lpc17_gpiowrite(LPCXPRESSO_OLED_POWER, on); +} +#endif diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_pwm.c b/configs/lpcxpresso-lpc1768/src/lpc17_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..565c33a1817a04d728cfb2c7b3a396b281a92605 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/src/lpc17_pwm.c @@ -0,0 +1,154 @@ +/************************************************************************************ + * configs/lpcexpresso-lpc1768/lpc17_pwm.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "lpc17_pwm.h" +#include "lpc17_timer.h" +#include "lpcxpresso-lpc1768.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifdef CONFIG_PWM + +FAR struct pwm_lowerhalf_s *lpc17_pwminitialize(int timer); +FAR struct pwm_lowerhalf_s *lpc17_mcpwminitialize(int timer); +FAR struct pwm_lowerhalf_s *lpc17_timerinitialize(int timer); + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All LPC17 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + struct pwm_lowerhalf_s *mcpwm; + struct pwm_lowerhalf_s *timer; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call lpc17_pwminitialize() to get an instance of the PWM interface */ + + pwm = lpc17_pwminitialize(0); + if (!pwm) + { + adbg("Failed to get the LPC17XX PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + mcpwm = lpc17_mcpwminitialize(0); + if (!mcpwm) + { + adbg("Failed to get the LPC17XX MOTOR PWM lower half\n"); + return -ENODEV; + } + + /* Register the MOTOR CONTROL PWM driver at "/dev/mcpwm0" */ + + ret = pwm_register("/dev/mcpwm0", mcpwm); + if (ret < 0) + { + adbg("mcpwm_register failed: %d\n", ret); + return ret; + } + + timer = lpc17_timerinitialize(0); + if (!timer) + { + adbg("Failed to get the LPC17XX TIMER lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/timer0" */ + + ret = pwm_register("/dev/timer0", timer); + if (ret < 0) + { + adbg("timer_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_ssp.c b/configs/lpcxpresso-lpc1768/src/lpc17_ssp.c new file mode 100644 index 0000000000000000000000000000000000000000..9de1a6b86cf722e583375b307efe68a50771fdf5 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/src/lpc17_ssp.c @@ -0,0 +1,213 @@ +/************************************************************************************ + * configs/lpcxpresso-lpc1768/src/lpc17_ssp.c + * + * Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "lpc17_gpio.h" +#include "lpc17_ssp.h" +#include "lpcxpresso-lpc1768.h" + +#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SSP_DEBUG /* Define to enable debug */ +#undef SSP_VERBOSE /* Define to enable verbose debug */ + +#ifdef SSP_DEBUG +# define sspdbg lldbg +# ifdef SSP_VERBOSE +# define sspvdbg lldbg +# else +# define sspvdbg(x...) +# endif +#else +# undef SSP_VERBOSE +# define sspdbg(x...) +# define sspvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef SSP_VERBOSE +# define ssp_dumpgpio(m) lpc17_dumpgpio(SDCCS_GPIO, m) +#else +# define ssp_dumpgpio(m) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpcxpresso_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LPCXpresso. + * + ************************************************************************************/ + +void weak_function lpcxpresso_sspdev_initialize(void) +{ + /* Configure the SPI-based microSD CS GPIO */ + + ssp_dumpgpio("lpcxpresso_sspdev_initialize() Entry)"); + + /* Configure card detect and chip select for the SD slot. NOTE: Jumper J55 must + * be set correctly for the SD slot chip select. + */ + +#ifdef CONFIG_LPC17_SSP1 + (void)lpc17_configgpio(LPCXPRESSO_SD_CS); + (void)lpc17_configgpio(LPCXPRESSO_SD_CD); + + /* Configure chip select for the OLED. For the SPI interface, insert jumpers in + * J42, J43, J45 pin1-2 and J46 pin 1-2. + */ + +#ifdef CONFIG_NX_LCDDRIVER + (void)lpc17_configgpio(LPCXPRESSO_OLED_CS); +#endif +#endif + + ssp_dumpgpio("lpcxpresso_sspdev_initialize() Exit"); +} + +/************************************************************************************ + * Name: lpc17_ssp0/ssp1select and lpc17_ssp0/ssp1status + * + * Description: + * The external functions, lpc17_ssp0/ssp1select and lpc17_ssp0/ssp1status + * must be provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including lpc17_sspbus_initialize()) + * are provided by common LPC17xx logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in lpc17_boardinitialize() to configure SPI/SSP chip select + * pins. + * 2. Provide lpc17_ssp0/ssp1select() and lpc17_ssp0/ssp1status() functions + * in your board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 3. Add a calls to lpc17_sspbus_initialize() in your low level application + * initialization logic + * 4. The handle returned by lpc17_sspbus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +#ifdef CONFIG_LPC17_SSP0 +void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssp_dumpgpio("lpc17_ssp0select() Entry"); + +#warning "Assert CS here (false)" + + ssp_dumpgpio("lpc17_ssp0select() Exit"); +} + +uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + sspdbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_LPC17_SSP1 +void lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssp_dumpgpio("lpc17_ssp1select() Entry"); + + if (devid == SPIDEV_MMCSD) + { + /* Assert/de-assert the CS pin to the card */ + + (void)lpc17_gpiowrite(LPCXPRESSO_SD_CS, !selected); + } +#ifdef CONFIG_NX_LCDDRIVER + else if (devid == SPIDEV_DISPLAY) + { + /* Assert the CS pin to the OLED display */ + + (void)lpc17_gpiowrite(LPCXPRESSO_OLED_CS, !selected); + } +#endif + ssp_dumpgpio("lpc17_ssp1select() Exit"); +} + +uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + if (devid == SPIDEV_MMCSD) + { + /* Read the state of the card-detect bit */ + + if (lpc17_gpioread(LPCXPRESSO_SD_CD) == 0) + { + sspdbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; + } + } + + sspdbg("Returning zero\n"); + return 0; +} +#endif + +#endif /* CONFIG_LPC17_SSP0 || CONFIG_LPC17_SSP1 */ diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_usbmsc.c b/configs/lpcxpresso-lpc1768/src/lpc17_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..84d8b65eb53f3a409d22c40eb49f0b134846e477 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/src/lpc17_usbmsc.c @@ -0,0 +1,125 @@ +/**************************************************************************** + * configs/lpcxpresso-lpc1768/src/lpc17_usbmsc.c + * + * Copyright (C) 2011, 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the LPC17xx MMC/SD SPI block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "lpc17_ssp.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_LPCXPRESSO +# undef LPC17XX_MMCSDSPIPORTNO +# define LPC17XX_MMCSDSPIPORTNO 1 +# undef LPC17XX_MMCSDSLOTNO +# define LPC17XX_MMCSDSLOTNO 0 +#else + /* Add configuration for new LPC17xx boards here */ +# error "Unrecognized LPC17xx board" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization of the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", LPC17XX_MMCSDSPIPORTNO); + + spi = lpc17_sspbus_initialize(LPC17XX_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + LPC17XX_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + LPC17XX_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + syslog(LOG_INFO, "Binding SPI port %d to MMC/SD slot %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1, LPC17XX_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SPI port %d to MMC/SD slot %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO); + return OK; +} diff --git a/configs/lpcxpresso-lpc1768/src/lpcxpresso-lpc1768.h b/configs/lpcxpresso-lpc1768/src/lpcxpresso-lpc1768.h new file mode 100644 index 0000000000000000000000000000000000000000..6f31162233da1a1b0f13da10482fe134582fea12 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/src/lpcxpresso-lpc1768.h @@ -0,0 +1,235 @@ +/************************************************************************************ + * configs/lpcxpresso-lpc1768/src/lpcxpresso-lpc1768.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef _CONFIGS_LPCXPRESSO_LPC1768_SRC_LPCXPRESSO_H +#define _CONFIGS_LPCXPRESSO_LPC1768_SRC_LPCXPRESSO_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* LPCXpresso LPC1768 board pin usage ***********************************************/ +/* Pin Description Connector On Board Base Board + * -------------------------------- --------- -------------- --------------------- + * P0[0]/RD1/TXD3/SDA1 J6-9 I2C E2PROM SDA TXD3/SDA1 + * P0[1]/TD1/RXD3/SCL J6-10 RXD2/SCL1 + * P0[2]/TXD0/AD0[7] J6-21 + * P0[3]/RXD0/AD0[6] J6-22 + * P0[4]/I2SRX-CLK/RD2/CAP2.0 J6-38 CAN_RX2 + * P0[5]/I2SRX-WS/TD2/CAP2.1 J6-39 CAN_TX2 + * P0[6]/I2SRX_SDA/SSEL1/MAT2[0] J6-8 SSEL1 + * P0[7]/I2STX_CLK/SCK1/MAT2[1] J6-7 SCK1 + * P0[8]/I2STX_WS/MISO1/MAT2[2] J6-6 MISO1 + * P0[9]/I2STX_SDA/MOSI1/MAT2[3] J6-5 MOSI1 + * P0[10] J6-40 TXD2/SDA2 + * P0[11] J6-41 RXD2/SCL2 + * P0[15]/TXD1/SCK0/SCK J6-13 TXD1/SCK0 + * P0[16]/RXD1/SSEL0/SSEL J6-14 RXD1/SSEL0 + * P0[17]/CTS1/MISO0/MISO J6-12 MISO0 + * P0[18]/DCD1/MOSI0/MOSI J6-11 MOSI0 + * P0[19]/DSR1/SDA1 PAD17 N/A + * P0[20]/DTR1/SCL1 PAD18 I2C E2PROM SCL N/A + * P0[21]/RI1/MCIPWR/RD1 J6-23 + * P0[22]/RTS1/TD1 J6-24 LED + * P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] J6-15 AD0.0 + * P0[24]/AD0[1]/I2SRX_WS/CAP3[1] J6-16 AD0.1 + * P0[25]/AD0[2]/I2SRX_SDA/TXD3 J6-17 AD0.2 + * P0[26]/AD0[3]/AOUT/RXD3 J6-18 AD0.3/AOUT + * P0[27]/SDA0/USB_SDA J6-25 + * P0[28]/SCL0 J6-26 + * P0[29]/USB_D+ J6-37 USB_D+ + * P0[30]/USB_D- J6-36 USB_D- + */ + +#define LPCXPRESSO_I2C1_EPROM_SDA GPIO_I2C1_SDA_1 +#define LPCXPRESSO_I2C1_EPROM_SDL GPIO_I2C1_SCL_2 +#define LPCXPRESSO_LED (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT0 | GPIO_PIN22) + +/* P1[0]/ENET-TXD0 J6-34? TXD0 TX-(Ethernet PHY) + * P1[1]/ENET_TXD1 J6-35? TXD1 TX+(Ethernet PHY) + * P1[4]/ENET_TX_EN TXEN N/A + * P1[8]/ENET_CRS CRS_DV/MODE2 N/A + * P1[9]/ENET_RXD0 J6-32? RXD0/MODE0 RD-(Ethernet PHY) + * P1[10]/ENET_RXD1 J6-33? RXD1/MODE1 RD+(Ethernet PHY) + * P1[14]/ENET_RX_ER RXER/PHYAD0 N/A + * P1[15]/ENET_REF_CLK REFCLK N/A + * P1[16]/ENET_MDC MDC N/A + * P1[17]/ENET_MDIO MDIO N/A + * P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] PAD1 N/A + * P1[19]/MC0A/USB_PPWR/N_CAP1.1 PAD2 N/A + * P1[20]/MCFB0/PWM1.2/SCK0 PAD3 N/A + * P1[21]/MCABORT/PWM1.3/SSEL0 PAD4 N/A + * P1[22]/MC0B/USB-PWRD/MAT1.0 PAD5 N/A + * P1[23]/MCFB1/PWM1.4/MISO0 PAD6 N/A + * P1[24]/MCFB2/PWM1.5/MOSI0 PAD7 N/A + * P1[25]/MC1A/MAT1.1 PAD8 N/A + * P1[26]/MC1B/PWM1.6/CAP0.0 PAD9 N/A + * P1[27]/CLKOUT/USB-OVRCR-N/CAP0.1 PAD10 N/A + * P1[28]/MC2A/PCAP1.0/MAT0.0 PAD11 N/A + * P1[29]/MC2B/PCAP1.1/MAT0.1 PAD12 N/A + * P1[30]/VBUS/AD0[4] J6-19 AD0.4 + * P1[31]/SCK1/AD0[5] J6-20 AD0.5 + * + * P2[0]/PWM1.1/TXD1 J6-42 PWM1.1 + * P2[1]/PWM1.2/RXD1 J6-43 PWM1.2 + * P2[2]/PWM1.3/CTS1/TRACEDATA[3] J6-44 PWM1.3 + * P2[3]/PWM1.4/DCD1/TRACEDATA[2] J6-45 PWM1.4 + * P2[4]/PWM1.5/DSR1/TRACEDATA[1] J6-46 PWM1.5 + * P2[5]/PWM1[6]/DTR1/TRACEDATA[0] J6-47 PWM1.6 + * P2[6]/PCAP1[0]/RI1/TRACECLK J6-48 + * P2[7]/RD2/RTS1 J6-49 + * P2[8]/TD2/TXD2 J6-50 + * P2[9]/USB_CONNECT/RXD2 PAD19 USB Pullup N/A + * P2[10]/EINT0/NMI J6-51 + * P2[11]/EINT1/I2STX_CLK J6-52 + * P2[12]/EINT2/I2STX_WS J6-53 + * P2[13]/EINT3/I2STX_SDA J6-27 + */ + +#define LPCXPRESSO_USB_PULLUP (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN9) + +/* P3[25]/MAT0.0/PWM1.2 PAD13 N/A + * P3[26]/STCLK/MAT0.1/PWM1.3 PAD14 N/A + * + * P4[28]/RX-MCLK/MAT2.0/TXD3 PAD15 N/A + * P4[29]/TX-MCLK/MAT2.1/RXD3 PAD16 N/A + */ + +/* SD Slot + * + * Base-board J4/J6 LPC1768 + * SD Signal Pin Pin + * --- ----------- ----- -------- + * CS PIO1_11* 55 P2.2 (See LPCXPRESSO_SD_CS) + * DIN PIO0_9-MOSI 5 P0.9 MOSI1 (See GPIO_SSP1_MOSI in chip/lpc17_ssp.h) + * DOUT PIO0_8-MISO 6 P0.8 MISO1 (See GPIO_SSP1_MISO in chip/lpc17_ssp.h) + * CLK PIO2_11-SCK 7 P0.9 SCK1 (See GPIO_SSP1_SCK in board.h) + * CD PIO2_10 52 P2.11 (See LPCXPRESSO_SD_CD) + */ + +#define LPCXPRESSO_SD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN2) +#ifdef CONFIG_GPIO_IRQ +# define LPCXPRESSO_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11) +#else +# define LPCXPRESSO_SD_CD (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11) +#endif + +/* USB: + * + * Base-board J4/J6 LPC1768 + * Signal Pin Pin + * ------------------- ----- -------- + * USB_DM 36 P0.30/USB-D- + * USB_DP 37 P0.29/USB-D+ + * N/C N/C P1.18/USB-UP-LED/PWM1.1/CAP1.0 + * PIO1_3 (not used) 19 P1.30/VBUS/AD0.4 + * N/C N/C P2.9/USB-CONNECT/RXD2 (See Notes) + * ------------------- ----- -------- + * PIO0_6-USB_CONNECT* 23 P0.21/RI1/RD1 + * PIO0_3-VBUS_SENSE 39 P0.5/I2SRX-WS/TD2/CAP2.1 + * + * Notes: + * - The standard USB CONNECT (P0.9) provides USB D+ pullup on board the + * LPCXpresso card; it should be un-necessary to use the based board + * version of the pullup. + * - No changes to jumper settings are required. There are few USB- + * related jumpers on the based board, but none are required: + * - J14 must be set to permit GPIO control of the base board USB + * connect pin. NOT USED + * - J12 must be set to permit GPIO control of the USB vbus sense pin + * - The standard VBUS (P1.30) is not connected. As a consequence, the + * USB driver will not correctly respond to USB insertion or removal + * events. + * - The standard USB LED (P1.18) is not connected. + */ + +#define LPCXPRESSO_USB_CONNECT (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN21) +#ifdef CONFIG_GPIO_IRQ +# define LPCXPRESSO_USB_VBUSSENSE (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN5) +#else +# define LPCXPRESSO_USB_VBUSSENSE (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN5) +#endif + +/* 96x64 White OLED with I2C/SPI interface + * + * ----------------------------+-------+-------------- ----------------------------- + * LPC1758 Pin | J4/6 | Base Board Description + * ----------------------------+-------+-------------- ----------------------------- + * P2.1/PWM1.2/RXD1 | 43 | PIO1_10 FAN5331 Power Control (SHDN#) + * P0.6/I2SRX-SDA/SSEL1/MAT2.0 | 8 | PIO0_2 OLED chip select (CS#) + * P2.7/RD2/RTS1 | 49 | PIO2_7 OLED command/data (D/C#) + * P0.7/I2STX-CLK/SCK1/MAT2.1 | 7 | PIO2_11-SCK OLED clock (D0) + * P0.9/I2STX-SDA/MOSI1/MAT2.3 | 5 | PIO0_9-MOSI OLED data in (D1) + * ----------------------------+-------+-------------- ----------------------------- + */ + +#define LPCXPRESSO_OLED_POWER (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN1) +#define LPCXPRESSO_OLED_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN6) +#define LPCXPRESSO_OLED_DC (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN7) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpcxpresso_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LPCXpresso board. + * + ************************************************************************************/ + +void weak_function lpcxpresso_sspdev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_LPCXPRESSO_LPC1768_SRC_LPCXPRESSO_H */ + diff --git a/configs/lpcxpresso-lpc1768/thttpd/Make.defs b/configs/lpcxpresso-lpc1768/thttpd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..eaf80e626973e9aac6de57f7db948707c76c629e --- /dev/null +++ b/configs/lpcxpresso-lpc1768/thttpd/Make.defs @@ -0,0 +1,116 @@ +############################################################################ +# configs/lpcxpresso-lpc1768/thttpd/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" + NXFLATLDSCRIPT = -T "${shell cygpath -w $(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script + NXFLATLDSCRIPT = -T"$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld" +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) $(NXFLATLDSCRIPT) -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lpcxpresso-lpc1768/thttpd/defconfig b/configs/lpcxpresso-lpc1768/thttpd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d0a079e11e4261288b9c7458f020c09fa8653bd0 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/thttpd/defconfig @@ -0,0 +1,901 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +# CONFIG_LPC17_UART0 is not set +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +CONFIG_LPC17_UART3=y +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=15776 +CONFIG_NET_NTXDESC=13 +CONFIG_NET_NRXDESC=13 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8079 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPCXPRESSO=y +# CONFIG_ARCH_BOARD_MBED is not set +# CONFIG_ARCH_BOARD_NUCLEUS2G is not set +# CONFIG_ARCH_BOARD_ZKITARM is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lpcxpresso-lpc1768" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=4 +CONFIG_START_DAY=15 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="thttp_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGWORK=17 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=8192 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +CONFIG_ETH0_PHY_LAN8720=y +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +CONFIG_ARCH_HAVE_UART3=y +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART3 Configuration +# +CONFIG_UART3_RXBUFSIZE=256 +CONFIG_UART3_TXBUFSIZE=256 +CONFIG_UART3_BAUD=115200 +CONFIG_UART3_BITS=8 +CONFIG_UART3_PARITY=0 +CONFIG_UART3_2STOP=0 +# CONFIG_UART3_IFLOWCONTROL is not set +# CONFIG_UART3_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +CONFIG_NXFLAT=y +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +CONFIG_PIC=y +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +CONFIG_EXAMPLES_THTTPD=y +CONFIG_EXAMPLES_THTTPD_NOMAC=y +CONFIG_EXAMPLES_THTTPD_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_THTTPD=y +CONFIG_THTTPD_PORT=80 +CONFIG_THTTPD_IPADDR=0x0a000002 +CONFIG_THTTPD_SERVER_ADDRESS="http://www.nuttx.org" +CONFIG_THTTPD_SERVER_SOFTWARE="thttpd/2.25b 29dec2003-NuttX" +CONFIG_THTTPD_NXFLAT=y +CONFIG_THTTPD_PATH="/mnt/www" +CONFIG_THTTPD_CGI_PATH="/mnt/www/cgi-bin" +CONFIG_THTTPD_CGI_PATTERN="/mnt/www/cgi-bin/*" +CONFIG_THTTPD_CGI_PRIORITY=50 +CONFIG_THTTPD_CGI_STACKSIZE=1024 +CONFIG_THTTPD_CGI_BYTECOUNT=20000 +CONFIG_THTTPD_CGI_TIMELIMIT=0 +CONFIG_THTTPD_CHARSET="iso-8859-1" +CONFIG_THTTPD_IOBUFFERSIZE=1024 +CONFIG_THTTPD_MINSTRSIZE=64 +CONFIG_THTTPD_REALLOCINCR=64 +CONFIG_THTTPD_MAXREALLOC=4096 +CONFIG_THTTPD_CGIINBUFFERSIZ=512 +CONFIG_THTTPD_CGIOUTBUFFERSIZE=512 +CONFIG_THTTPD_INDEX_NAMES="\"index.html\", \"index.htm\", \"index.cgi\"" +# CONFIG_THTTPD_USE_AUTH_FILE is not set +CONFIG_THTTPD_LISTEN_BACKLOG=8 +CONFIG_THTTPD_LINGER_MSEC=500 +CONFIG_THTTPD_OCCASIONAL_MSEC=120 +CONFIG_THTTPD_IDLE_READ_LIMIT_SEC=300 +CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300 +# CONFIG_THTTPD_USE_TILDE_MAP1 is not set +# CONFIG_THTTPD_USE_TILDE_MAP2 is not set +CONFIG_THTTPD_TILDE_MAP_NONE=y +# CONFIG_THTTPD_GENERATE_INDICES is not set +# CONFIG_THTTPD_USE_URLPATTERN is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lpcxpresso-lpc1768/thttpd/setenv.sh b/configs/lpcxpresso-lpc1768/thttpd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..7156a371dde2d5ab98f9f5f5f559ff11f969b432 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/thttpd/setenv.sh @@ -0,0 +1,61 @@ +#!/bin/bash +# configs/lpcxpresso-lpc1768/thttpd/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` + +# This is where the buildroot might reside on a Linux or Cygwin system +# A minimal buildroot version with the NXFLAT tools is always required +# for this configuration in order to buildthe THTTPD CGI programs +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the default install location for Code Red on Linux +export TOOLCHAIN_BIN="/usr/local/LPCXpresso/tools/bin" + +# This is the Cygwin path to the LPCXpresso 3.6 install location under Windows +#export TOOLCHAIN_BIN="/cygdrive/c/nxp/lpcxpresso_3.6/Tools/bin" + +# This is the path to the LPCXpression tool subdirectory +export LPCTOOL_DIR="${WD}/configs/lpcxpresso-lpc1768/tools" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/lpcxpresso-lpc1768/tools/flash.sh b/configs/lpcxpresso-lpc1768/tools/flash.sh new file mode 100644 index 0000000000000000000000000000000000000000..4faa709ca0eb7e10c5a53e606772cf7a3854808a --- /dev/null +++ b/configs/lpcxpresso-lpc1768/tools/flash.sh @@ -0,0 +1,146 @@ +#!/bin/bash +#################################################################################### +# flash.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +#################################################################################### + +USAGE="$0 " + +echo "############################################################################" +echo "# Assumptions:" +echo "#" +echo "# - Windows 7" +echo "# - LPCXpresso 3.6 installed at /cygdrive/c/nxp/lpcxpresso_3.6" +echo "# - AXF image built with Code Red" +echo "# - LPC1768" +echo "#" +echo "# You will need to edit this is any of the above are false" +echo "#" +echo "############################################################################" +echo "" + +# This is the default install location for binaries on Windows (note that this +# path could change with the Code Red version number) +BINDIR="/cygdrive/c/nxp/lpcxpresso_3.6/bin" +if [ ! -d "${BINDIR}" ]; then + echo "Directory ${BINDIR} does not exist" + exit 1 +fi + +# This is the relative path to the booLPCXpresso utility +BOOTLPC="Scripts/bootLPCXpresso.cmd" +if [ ! -x "${BINDIR}/$BOOTLPC" ]; then + echo "No executable at ${BINDIR}/${BOOTLPC}" + exit 1 +fi + +# BOOTLPC_ARG=winusb # WinXP +BOOTLPC_ARG=hid # Win7 + +# FLASHUTIL="crt_emu_lpc11_13" # for LPC11xx or LPC13xx parts) +FLASHUTIL="crt_emu_cm3_nxp" # for LPC17xx parts +# FLASHUTIL="crt_emu_a7_nxp" # for LPC21/22/23/24 parts) +# FLASHUTIL="crt_emu_a9_nxp" # for LPC31/32 and LPC29xx parts) +# FLASHUTIL="crt_emu_cm3_lmi" # for TI Stellaris LM3S parts + +if [ ! -x "${BINDIR}/${FLASHUTIL}" ]; then + echo "No executable file at ${BINDIR}/${FLASHUTIL}" + exit 1 +fi + +# unset WIRE # for Red Probe+, Red Probe, RDB1768v1, or TI Stellaris evaluation boards +# WIRE="-wire=hi" # for RDB1768v2 without upgraded firmware) +# WIRE="-wire=winusb" # for RDB1768v2 with upgraded firmware) +# WIRE="-wire=winusb" # for LPC-Link on Windows XP) +WIRE="-wire=hid" # for LPC-Link on Windows Vista/Windows 7) + +TARGET=LPC1768 + +# The nuttx directory must be provided as an argument + +NUTTX=$1 +if [ -z "${NUTTX}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +if [ ! -d "${NUTTX}" ]; then + echo "Directory ${NUTTX} does not exist" + echo $USAGE + exit 1 +fi + +# The binary to download: + +if [ ! -f "${NUTTX}/nuttx.axf" ]; then + if [ -f "${NUTTX}/nuttx" ]; then + echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf" + mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf + fi +else + if [ -f "${NUTTX}/nuttx" ]; then + echo "Both ${NUTTX}/nuttx ${NUTTX}/nuttx.axf exist.." + echo " Deleting ${NUTTX}/nuttx.axf" + rm -f ${NUTTX}/nuttx.axf + echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf" + mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf + fi +fi +NUTTXPATH=`cygpath -w "${NUTTX}/nuttx.axf"` + +# First of all boot the LPC-Link using the script: + +cd ${BINDIR} || \ + { echo "Failed to CD to ${BINDIR}"; exit 1; } +./${BOOTLPC} ${BOOTLPC_ARG} || \ + { echo "'${BOOTLPC} ${BOOTLPC_ARG}' Failed"; } + +echo "" +echo "Wait a bit" +echo "5..." +sleep 1 +echo "4..." +sleep 1 +echo "3..." +sleep 1 +echo "2..." +sleep 1 +echo "1..." +sleep 1 +echo "0..." +echo "" + +# Then program the FLASH + +./${FLASHUTIL} ${WIRE} -p${TARGET} -flash-load-exec="${NUTTXPATH}" diff --git a/configs/lpcxpresso-lpc1768/usbmsc/Make.defs b/configs/lpcxpresso-lpc1768/usbmsc/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..540f585a1d3bba9a0f0d07f67ede66ef4e8333f0 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/usbmsc/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/lpcxpresso-lpc1768/usbmsc/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lpcxpresso-lpc1768/usbmsc/defconfig b/configs/lpcxpresso-lpc1768/usbmsc/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..a9d5cae6197b43490713f7aeb23f7cc01c363154 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/usbmsc/defconfig @@ -0,0 +1,790 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_ETHERNET is not set +# CONFIG_LPC17_USBHOST is not set +CONFIG_LPC17_USBDEV=y +# CONFIG_LPC17_UART0 is not set +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +CONFIG_LPC17_UART3=y +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +CONFIG_LPC17_SSP1=y +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# USB device driver options +# +CONFIG_LPC17_USBDEV_EP0_MAXSIZE=64 +# CONFIG_LPC17_USBDEV_FRAME_INTERRUPT is not set +# CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT is not set +CONFIG_LPC17_USBDEV_NDMADESCRIPTORS=0 +# CONFIG_LPC17_USBDEV_DMA is not set +CONFIG_LPC17_USBDEV_NOVBUS=y +CONFIG_LPC17_USBDEV_NOLED=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8079 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPCXPRESSO=y +# CONFIG_ARCH_BOARD_MBED is not set +# CONFIG_ARCH_BOARD_NUCLEUS2G is not set +# CONFIG_ARCH_BOARD_ZKITARM is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lpcxpresso-lpc1768" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=4 +CONFIG_START_DAY=15 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="msconn_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +CONFIG_ARCH_HAVE_UART3=y +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART3 Configuration +# +CONFIG_UART3_RXBUFSIZE=256 +CONFIG_UART3_TXBUFSIZE=256 +CONFIG_UART3_BAUD=115200 +CONFIG_UART3_BITS=8 +CONFIG_UART3_PARITY=0 +CONFIG_UART3_2STOP=0 +# CONFIG_UART3_IFLOWCONTROL is not set +# CONFIG_UART3_OFLOWCONTROL is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +CONFIG_USBMSC=y +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=2 +CONFIG_USBMSC_EPBULKIN=5 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=256 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" +CONFIG_USBMSC_VERSIONNO=0x0399 +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=2048 +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +CONFIG_SYSTEM_USBMSC=y +CONFIG_SYSTEM_USBMSC_NLUNS=1 +CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mmcsd0" +CONFIG_SYSTEM_USBMSC_DEVMINOR2=1 +CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_USBMSC_DEVMINOR3=2 +CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" +# CONFIG_SYSTEM_USBMSC_DEBUGMM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lpcxpresso-lpc1768/usbmsc/setenv.sh b/configs/lpcxpresso-lpc1768/usbmsc/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..15c27bf48f96165eda1f0c1b8b4e637de4157f27 --- /dev/null +++ b/configs/lpcxpresso-lpc1768/usbmsc/setenv.sh @@ -0,0 +1,59 @@ +#!/bin/bash +# configs/lpcxpresso-lpc1768/usbmsc/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` + +# This is where the buildroot might reside on a Linux or Cygwin system +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the default install location for Code Red on Linux +export TOOLCHAIN_BIN="/usr/local/LPCXpresso/tools/bin" + +# This is the Cygwin path to the LPCXpresso 3.6 install location under Windows +#export TOOLCHAIN_BIN="/cygdrive/c/nxp/lpcxpresso_3.6/Tools/bin" + +# This is the path to the LPCXpression tool subdirectory +export LPCTOOL_DIR="${WD}/configs/lpcxpresso-lpc1768/tools" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/maple/Kconfig b/configs/maple/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..ba53be6c88cff63362a941b533f0b27af6407c3c --- /dev/null +++ b/configs/maple/Kconfig @@ -0,0 +1,33 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_MAPLE + +choice + prompt "Select board type" + default MAPLE_STANDARD if ARCH_CHIP_STM32F103RB + default MAPLE_MINI if ARCH_CHIP_STM32F103CB + ---help--- + Select the board hosting the architure. You must first select the + exact MCU part number, then the boards supporting that part will + be available for selection. Use ARCH_BOARD_CUSTOM to create a new + board configuration. + +config MAPLE_STANDARD + bool "Maple" + depends on ARCH_CHIP_STM32F103RB + ---help--- + This version is the standard maple board, with STM32F103RBT6. + +config MAPLE_MINI + bool "Maple Mini" + depends on ARCH_CHIP_STM32F103CB + ---help--- + This version is a mini layout of the normal one, with STM32F103CBT6. + It has different bootloader, memory size, and pin layout. + +endchoice + +endif diff --git a/configs/maple/README.txt b/configs/maple/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..b8d8a1fee936b5444e818ec4317620116bed17dc --- /dev/null +++ b/configs/maple/README.txt @@ -0,0 +1,224 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +maple board from LeafLabs (http://leaflabs.com). + +Microprocessor: 32-bit ARM Cortex M3 at 72MHz STM32F103RBT6 (STM32F103CBT6 for mini version) +Memory: 120 KB Flash and 20 KB SRAM +I/O Pins Out: 43 (34 for mini version) +ADCs: 9 (at 12-bit resolution) +Peripherals: 4 timers, 2 I2Cs, 2 SPI ports, 3 USARTs +Other: Sleep, stop, and standby modes; serial wire debug and JTAG interfaces + +Please see below link for a list of maple devices and documentations. + + http://leaflabs.com/devices + http://leaflabs.com/docs + +This config supports Maple and Maple Mini. + +Contents +======== + + - Development Environment + - DFU + - Configurations + +Development Environment +======================= + + Either Linux (recommended), Mac or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment because the Raisonance R-Link emulatator and some RIDE7 development tools + were used and those tools works only under Windows. + +DFU +=== + + The linker files in these projects can be configured to indicate that you + will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU) + loader or via some JTAG emulator. You can specify the DFU bootloader by + adding the following line: + + CONFIG_STM32_DFU=y + + to your .config file. Most of the configurations in this directory are set + up to use the DFU loader. + + If CONFIG_STM32_DFU is defined, the code will not be positioned at the beginning + of FLASH (0x08000000) but will be offset to 0x08005000. This offset is needed + to make space for the DFU loader and 0x08005000 is where the DFU loader expects + to find new applications at boot time. If you need to change that origin for some + other bootloader, you will need to edit the file(s) ld.script.dfu for each + configuration. In LeafLabs case, we are using maple bootloader: + + http://leaflabs.com/docs/bootloader.html + + For Linux or Mac: + ---------------- + + While on Linux or Mac, we can use dfu-util to upload nuttx binary. + + 1. Make sure we have installed dfu-util. (From yum, apt-get or build from source.) + 2. Start the DFU loader (bootloader) on the maple board. You do this by + resetting the board while holding the "Key" button. Windows should + recognize that the DFU loader has been installed. + 3. Flash the nuttx.bin to the board use dfu-util. Here's an example: + + $ dfu-util -a1 -d 1eaf:0003 -D nuttx.bin -R + + For anything not clear, we can refer to LeafLabs official document: + + http://leaflabs.com/docs/unix-toolchain.html + + For Windows: + ----------- + + The DFU SE PC-based software is available from the STMicro website, + http://www.st.com. General usage instructions: + + 1. Connect the maple board to your computer using a USB + cable. + 2. Start the DFU loader on the maple board. You do this by + resetting the board while holding the "Key" button. Windows should + recognize that the DFU loader has been installed. + 3. Run the DFU SE program to load nuttx.bin into FLASH. + + What if the DFU loader is not in FLASH? The loader code is available + inside of the Demo dirctory of the USBLib ZIP file that can be downloaded + from the STMicro Website. You can build it using RIDE (or other toolchains); + you will need a JTAG emulator to burn it into FLASH the first time. + + In order to use STMicro's built-in DFU loader, you will have to get + the NuttX binary into a special format with a .dfu extension. The + DFU SE PC_based software installation includes a file "DFU File Manager" + conversion program that a file in Intel Hex format to the special DFU + format. When you successfully build NuttX, you will find a file called + nutt.hex in the top-level directory. That is the file that you should + provide to the DFU File Manager. You will end up with a file called + nuttx.dfu that you can use with the STMicro DFU SE program. + +Configurations +============== + + Information Common to All Configurations + ---------------------------------------- + Each Maple configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh maple/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + Configuration Sub-directories + ----------------------------- + + nsh: + + This configuration directory provide the basic NuttShell (NSH). + A serial console is provided on USART1. + + NOTES: + 1. Currently configured for the STM32F103CB. But this is easily + reconfigured: + + CONFIG_ARCH_CHIP_STM32F103RB=n + CONFIG_ARCH_CHIP_STM32F103CB=y + + 2. Support for the I2C tool has been disabled, but can be restored + with following configure options: + + System Type -> Peripherals + CONFIG_STM32_I2C1=y + CONFIG_STM32_I2C2=y + CONFIG_STM32_I2CTIMEOSEC=1 + CONFIG_STM32_I2CTIMEOMS=500 + CONFIG_STM32_I2CTIMEOTICKS=500 + + Drivers + CONFIG_I2C=y + + Applications -> System Add-Ons + CONFIG_SYSTEM_I2CTOOL=y + CONFIG_I2CTOOL_MINBUS=1 + CONFIG_I2CTOOL_MAXBUS=2 + CONFIG_I2CTOOL_MINADDR=0x0 + CONFIG_I2CTOOL_MAXADDR=0xf0 + CONFIG_I2CTOOL_MAXREGADDR=0xff + CONFIG_I2CTOOL_DEFFREQ=100000 + + nx: + + This configuration has been used to bring up the Sharp Memory LCD + on a custom board. This NX configuration was used for testing that + LCD. Debug output will appear on USART1. + + NOTES: + 1. Currently configured for the STM32F103CB. But this is easily + reconfigured: + + CONFIG_ARCH_CHIP_STM32F103RB=n + CONFIG_ARCH_CHIP_STM32F103CB=y + + 2. You won't be able to buy a Sharp Memory LCD to use with your + Maple. If you want one, you will have to make one yourself. + + usbnsh: + + This is an alternative NuttShell (NSH) configuration that uses a USB + serial console for interaction. + + NOTES: + 1. Currently configured for the STM32F103CB. But this is easily + reconfigured: + + CONFIG_ARCH_CHIP_STM32F103RB=n + CONFIG_ARCH_CHIP_STM32F103CB=y + + 2. Support for the I2C tool has been disabled, but can be restored + with following configure options: + + System Type -> Peripherals + CONFIG_STM32_I2C1=y + CONFIG_STM32_I2C2=y + CONFIG_STM32_I2CTIMEOSEC=1 + CONFIG_STM32_I2CTIMEOMS=500 + CONFIG_STM32_I2CTIMEOTICKS=500 + + Drivers + CONFIG_I2C=y + + Applications -> System Add-Ons + CONFIG_SYSTEM_I2CTOOL=y + CONFIG_I2CTOOL_MINBUS=1 + CONFIG_I2CTOOL_MAXBUS=2 + CONFIG_I2CTOOL_MINADDR=0x0 + CONFIG_I2CTOOL_MAXADDR=0xf0 + CONFIG_I2CTOOL_MAXREGADDR=0xff + CONFIG_I2CTOOL_DEFFREQ=100000 diff --git a/configs/maple/include/board.h b/configs/maple/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..8b4da7dd35c6a754ccf124c8a074936592a4bb05 --- /dev/null +++ b/configs/maple/include/board.h @@ -0,0 +1,194 @@ +/************************************************************************************ + * configs/maple/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_MAPLE_INCLUDE_BOARD_H +#define __CONFIGS_MAPLE_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* On-board crystal frequency is 8MHz (HSE) */ + +#define STM32_BOARD_XTAL 8000000ul + +/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */ + +#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC +#define STM32_CFGR_PLLXTPRE 0 +#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx9 +#define STM32_PLL_FREQUENCY (9*STM32_BOARD_XTAL) + +/* Use the PLL and set the SYSCLK source to be the PLL */ + +#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL +#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY + +/* AHB clock (HCLK) is SYSCLK (72MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (72MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY + +/* APB2 timers 1 and 8 will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* USB divider -- Divide PLL clock by 1.5 */ + +#define STM32_CFGR_USBPRE 0 + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY + +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz + */ + +#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_SDXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* LED definitions ******************************************************************/ + +/* The board has only one controllable LED */ +#define LED_STARTED 0 /* No LEDs */ +#define LED_HEAPALLOCATE 1 /* LED1 on */ +#define LED_IRQSENABLED 2 /* LED2 on */ +#define LED_STACKCREATED 3 /* LED1 on */ +#define LED_INIRQ 4 /* LED1 off */ +#define LED_SIGNAL 5 /* LED2 on */ +#define LED_ASSERTION 6 /* LED1 + LED2 */ +#define LED_PANIC 7 /* LED1 / LED2 blinking */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MAPLE_INCLUDE_BOARD_H */ diff --git a/configs/maple/nsh/Make.defs b/configs/maple/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..4516544f1a0dc01af6bf8fcfc9090e1bdc516195 --- /dev/null +++ b/configs/maple/nsh/Make.defs @@ -0,0 +1,116 @@ +############################################################################ +# configs/maple/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/maple/nsh/defconfig b/configs/maple/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b791dbad74a2c464999482f85de12fd6aff0f988 --- /dev/null +++ b/configs/maple/nsh/defconfig @@ -0,0 +1,1107 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +CONFIG_ARCH_CHIP_STM32F103CB=y +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +CONFIG_STM32_JTAG_DISABLE=y +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ARCH_USBDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_MAPLE=y +# CONFIG_ARCH_BOARD_SPARK is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="maple" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_MAPLE_MINI=y +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=23 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=6 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +CONFIG_USBDEV_TRACE=y +CONFIG_USBDEV_TRACE_NRECORDS=32 +# CONFIG_USBDEV_TRACE_STRINGS is not set +# CONFIG_USBDEV_TRACE_INITIALIDSET is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=2 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +# CONFIG_NSH_DISABLE_DELROUTE is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +CONFIG_NSH_DISABLE_ITEF=y +CONFIG_NSH_DISABLE_LOOPS=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set + +# +# USB Device Trace Support +# +# CONFIG_NSH_USBDEV_TRACE is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_USBMONITOR is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/maple/nsh/setenv.sh b/configs/maple/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..6ede0014ee4bf7f4ced427b1b7214b7cc298aee3 --- /dev/null +++ b/configs/maple/nsh/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/maple/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. + +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the Spark tools directory + +export TOOL_BIN="${WD}/configs/maple/tools" + +# Update the PATH variable + +export PATH="${BUILDROOT_BIN}:${TOOL_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/maple/nx/Make.defs b/configs/maple/nx/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..3d223e0c770049a6dab5b9970052cdb034d09d90 --- /dev/null +++ b/configs/maple/nx/Make.defs @@ -0,0 +1,114 @@ +############################################################################ +# configs/maple/nx/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g -Os +else + ARCHOPTIMIZATION = $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/maple/nx/defconfig b/configs/maple/nx/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..3d35cb2cfc03b3d9a4df704c7da8640a7ab35c44 --- /dev/null +++ b/configs/maple/nx/defconfig @@ -0,0 +1,1316 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +CONFIG_ARCH_CHIP_STM32F103CB=y +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +CONFIG_STM32_I2C1=y +CONFIG_STM32_I2C2=y +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +CONFIG_STM32_TIM2=y +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_I2C1_REMAP is not set +# CONFIG_STM32_SPI1_REMAP is not set +CONFIG_STM32_TIM2_NO_REMAP=y +# CONFIG_STM32_TIM2_FULL_REMAP is not set +# CONFIG_STM32_TIM2_PARTIAL_REMAP_1 is not set +# CONFIG_STM32_TIM2_PARTIAL_REMAP_2 is not set +# CONFIG_STM32_USART1_REMAP is not set +CONFIG_STM32_JTAG_DISABLE=y +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM2_PWM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set + +# +# I2C Configuration +# +CONFIG_STM32_I2C_ALT=y +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=1 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ARCH_USBDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_MAPLE=y +# CONFIG_ARCH_BOARD_SPARK is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="maple" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_MAPLE_MINI=y +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=23 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=6 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=15 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +CONFIG_LCD_SHARP_MEMLCD=y +# CONFIG_MEMLCD_LS013B7DH01 is not set +CONFIG_MEMLCD_LS013B7DH03=y +CONFIG_MEMLCD_NINTERFACES=1 +# CONFIG_MEMLCD_EXTCOMIN_MODE_HW is not set +CONFIG_MEMLCD_SPI_FREQUENCY=3500000 +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +CONFIG_USBDEV_TRACE=y +CONFIG_USBDEV_TRACE_NRECORDS=32 +# CONFIG_USBDEV_TRACE_STRINGS is not set +# CONFIG_USBDEV_TRACE_INITIALIDSET is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +# CONFIG_NX_DISABLE_1BPP is not set +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +CONFIG_NX_XYINPUT_NONE=y +# CONFIG_NX_XYINPUT_MOUSE is not set +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +# CONFIG_NX_KBD is not set + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +CONFIG_NXFONT_MONO5X8=y +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=2 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=1 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +CONFIG_EXAMPLES_NXHELLO=y +CONFIG_EXAMPLES_NXHELLO_VPLANE=0 +CONFIG_EXAMPLES_NXHELLO_DEVNO=0 +CONFIG_EXAMPLES_NXHELLO_BPP=1 + +# +# Example Color Configuration +# +CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y + +# +# Example Font Configuration +# +CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +# CONFIG_NSH_DISABLE_DELROUTE is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +CONFIG_NSH_DISABLE_ITEF=y +CONFIG_NSH_DISABLE_LOOPS=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_USBCONSOLE=y +CONFIG_NSH_USBCONDEV="/dev/ttyACM0" +CONFIG_USBDEV_MINOR=0 + +# +# USB Device Trace Support +# +# CONFIG_NSH_USBDEV_TRACE is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_USBMONITOR is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/maple/nx/setenv.sh b/configs/maple/nx/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ca144ce26cedb06a60f4936a4ba3c53b053d6e95 --- /dev/null +++ b/configs/maple/nx/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/maple/nx/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. + +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the Spark tools directory + +export TOOL_BIN="${WD}/configs/maple/tools" + +# Update the PATH variable + +export PATH="${BUILDROOT_BIN}:${TOOL_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/maple/scripts/ld.script b/configs/maple/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..8fe3ae43fbbaf151729dbe40d103e6e5957af966 --- /dev/null +++ b/configs/maple/scripts/ld.script @@ -0,0 +1,119 @@ +/**************************************************************************** + * configs/maple/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F103xB has 128Kb of FLASH beginning at address 0x0800:0000 and + * 20Kb of SRAM beginning at address 0x2000:0000. When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F103VCT6 has 48Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/maple/scripts/ld.script.dfu b/configs/maple/scripts/ld.script.dfu new file mode 100644 index 0000000000000000000000000000000000000000..e69140c886b07dce4b550d0eb568082df2f67b30 --- /dev/null +++ b/configs/maple/scripts/ld.script.dfu @@ -0,0 +1,119 @@ +/**************************************************************************** + * configs/maple/scripts/ld.script.dfu + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F103xB has 128Kb of FLASH beginning at address 0x0800:0000 and + * 20Kb of SRAM beginning at address 0x2000:0000. Here we assume that the + * maple's DFU bootloader is being used. In that case, the correct + * load .text load address is 0x0800:5000 (leaving 108Kb). + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08005000, LENGTH = 108K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F103VCT6 has 48Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/maple/src/Makefile b/configs/maple/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..99f214e5ea03bbe443d24aafc2194ca4fcccbace --- /dev/null +++ b/configs/maple/src/Makefile @@ -0,0 +1,63 @@ +############################################################################ +# configs/maple/src/Makefile +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Librae +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_leds.c stm32_usbdev.c stm32_spi.c + +ifeq ($(CONFIG_NX_LCDDRIVER),y) +CSRCS += stm32_lcd.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +endif + +ifeq ($(CONFIG_INPUT),y) +endif + +ifeq ($(CONFIG_USBMSC),y) +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += stm32_watchdog.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/maple/src/maple.h b/configs/maple/src/maple.h new file mode 100644 index 0000000000000000000000000000000000000000..ca724dfa05fbd74289624ae9f02ddfbb83574d67 --- /dev/null +++ b/configs/maple/src/maple.h @@ -0,0 +1,131 @@ +/************************************************************************************ + * configs/maple/src/maple.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Laurent Latil + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_MAPLE_SRC_MAPLE_H +#define __CONFIGS_MAPLE_SRC_MAPLE_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* How many SPI modules does this chip support? The LM3S6918 supports 2 SPI + * modules (others may support more -- in such case, the following must be + * expanded). + */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +#endif + +/* GPIOs **************************************************************/ +/* GPIO settings for LEDs and USB */ + +#ifdef CONFIG_MAPLE_MINI +# define GPIO_LED (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN1) +# define GPIO_USB_PULLUP (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9) +#else +# define GPIO_LED (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN5) +# define GPIO_USB_PULLUP (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN12) +#endif + +/* The Maple configuration has been used to very the Sharp Memory LCD + * on a custom board. These are pin definitions for that custom + * board interface. If you should decide to integrate the Sharp + * Memory LCD with your Maple board, you may need to changes these + * settings. + */ + +#define GPIO_MEMLCD_EXTCOMIN (GPIO_PORTA | GPIO_PIN13 | GPIO_OUTPUT_CLEAR | \ + GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) +#define GPIO_MEMLCD_DISP (GPIO_PORTA | GPIO_PIN14 | GPIO_OUTPUT_CLEAR | \ + GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) +#define GPIO_MEMLCD_CS (GPIO_PORTA | GPIO_PIN15 | GPIO_OUTPUT_CLEAR | \ + GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins. + * + ************************************************************************************/ + +void stm32_spidev_initialize(void); + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins. + * + ************************************************************************************/ + +void stm32_usbinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MAPLE_SRC_MAPLE_H */ diff --git a/configs/maple/src/stm32_appinit.c b/configs/maple/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..37878339005877dafc73106da6a952fcfaaeafc5 --- /dev/null +++ b/configs/maple/src/stm32_appinit.c @@ -0,0 +1,63 @@ +/**************************************************************************** + * configs/maple/src/stm32_appinit.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "maple.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + return OK; +} diff --git a/configs/maple/src/stm32_boot.c b/configs/maple/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..ab0beb6f97b7379d60b3954321baab7be5cca85e --- /dev/null +++ b/configs/maple/src/stm32_boot.c @@ -0,0 +1,97 @@ +/************************************************************************************ + * configs/maple/src/stm32_boot.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "maple.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) + stm32_spidev_initialize(); +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB) + stm32_usbinitialize(); +#endif +} diff --git a/configs/maple/src/stm32_lcd.c b/configs/maple/src/stm32_lcd.c new file mode 100644 index 0000000000000000000000000000000000000000..71108039f4f3b9785802f0cb04a4a88450cb8953 --- /dev/null +++ b/configs/maple/src/stm32_lcd.c @@ -0,0 +1,233 @@ +/**************************************************************************** + * configs/maple/src/stm32_lcd.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Modified: Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "maple.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#define EXTCOMIN_FREQ 24 +#define TIMER_FREQ 1200 /* 72000000/60000 */ + +/* Debug ********************************************************************/ + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct lcd_dev_s *l_lcddev; +static struct spi_dev_s *spi; +static struct stm32_tim_dev_s *tim; +static xcpt_t g_isr; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static int up_lcdextcominisr(int irq, void *context) +{ + STM32_TIM_ACKINT(tim, 0); + if (g_isr == NULL) + { + lcddbg("error, irq not attached, disabled\n"); + STM32_TIM_DISABLEINT(tim, 0); + return OK; + } + + return g_isr(irq, context); +} + +static int up_lcdirqattach(xcpt_t isr) +{ + lcddbg("%s IRQ\n", isr == NULL ? "Detach" : "Attach"); + + if (isr != NULL) + { + STM32_TIM_SETISR(tim, up_lcdextcominisr, 0); + g_isr = isr; + } + else + { + STM32_TIM_SETISR(tim, NULL, 0); + g_isr = NULL; + } + + return OK; +} + +static void up_lcddispcontrol(bool on) +{ + lcddbg("set: %s\n", on ? "on" : "off"); + + if (on) + { + stm32_gpiowrite(GPIO_MEMLCD_DISP, 1); + STM32_TIM_ENABLEINT(tim, 0); + } + else + { + stm32_gpiowrite(GPIO_MEMLCD_DISP, 0); + STM32_TIM_DISABLEINT(tim, 0); + } +} + +#ifndef CONFIG_MEMLCD_EXTCOMIN_MODE_HW +static void up_lcdsetpolarity(bool pol) +{ + stm32_gpiowrite(GPIO_LED, pol); + stm32_gpiowrite(GPIO_MEMLCD_EXTCOMIN, pol); +} +#endif + +static void up_lcdsetvcomfreq(unsigned int freq) +{ + lcddbg("freq: %d\n", freq); + DEBUGASSERT(freq >= 1 && freq <= 60); + STM32_TIM_SETPERIOD(tim, TIMER_FREQ / freq); +} + +static FAR struct memlcd_priv_s memlcd_priv = +{ + .attachirq = up_lcdirqattach, + .dispcontrol = up_lcddispcontrol, +#ifndef CONFIG_MEMLCD_EXTCOMIN_MODE_HW + .setpolarity = up_lcdsetpolarity, +#endif + .setvcomfreq = up_lcdsetvcomfreq, +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is + * fully initialized, display memory cleared, and the LCD ready to use, + * but with the power setting at 0 (full off). + * + ****************************************************************************/ + +FAR int board_lcd_initialize(void) +{ + lcddbg("Initializing lcd\n"); + + lcddbg("init spi1\n"); + spi = stm32_spibus_initialize(1); + DEBUGASSERT(spi); + + lcddbg("configure related io\n"); + stm32_configgpio(GPIO_MEMLCD_EXTCOMIN); + stm32_configgpio(GPIO_MEMLCD_DISP); + + lcddbg("configure EXTCOMIN timer\n"); + if (tim == NULL) + { + tim = stm32_tim_init(2); + DEBUGASSERT(tim); + STM32_TIM_SETPERIOD(tim, TIMER_FREQ / EXTCOMIN_FREQ); + STM32_TIM_SETCLOCK(tim, TIMER_FREQ); + STM32_TIM_SETMODE(tim, STM32_TIM_MODE_UP); + } + + lcddbg("init lcd\n"); + l_lcddev = memlcd_initialize(spi, &memlcd_priv, 0); + DEBUGASSERT(l_lcddev); + + return OK; +} + +/**************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This + * allows support for multiple LCD devices. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return l_lcddev; +} diff --git a/configs/maple/src/stm32_leds.c b/configs/maple/src/stm32_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..c54d91e642bd0d41b0abd879029f78e332fc19a7 --- /dev/null +++ b/configs/maple/src/stm32_leds.c @@ -0,0 +1,153 @@ +/**************************************************************************** + * configs/maple/src/stm32_leds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "maple.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static inline void set_led(bool v) +{ + ledvdbg("Turn LED %s\n", v? "on":"off"); + stm32_gpiowrite(GPIO_LED, v); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + /* Configure LED GPIO for output */ + + stm32_configgpio(GPIO_LED); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + ledvdbg("board_autoled_on(%d)\n", led); + switch (led) + { + case LED_STARTED: + case LED_HEAPALLOCATE: + /* As the board provides only one soft controllable LED, we simply turn + * it on when the board boots + */ + + set_led(true); + break; + + case LED_PANIC: + /* For panic state, the LED is blinking */ + + set_led(true); + break; + + default: + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + ledvdbg("board_autoled_off(%d)\n", led); + + switch (led) + { + case LED_STARTED: + case LED_PANIC: + /* For panic state, the LED is blinking */ + + set_led(false); + break; + + default: + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/maple/src/stm32_spi.c b/configs/maple/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..22c106a1e4a70f40c2294fd9b3225b491db5177f --- /dev/null +++ b/configs/maple/src/stm32_spi.c @@ -0,0 +1,175 @@ +/**************************************************************************** + * configs/maple/src/stm32_spi.c + * + * Copyright (C) 2009, 2011-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "maple.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_SPI +#endif + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the maple board. + * + ****************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ + /* NOTE: Clocking for SPI1 and/or SPI2 was already provided in stm32_rcc.c. + * Configurations of SPI pins is performed in stm32_spi.c. + * Here, we only initialize chip select pins unique to the board + * architecture. + */ + + stm32_configgpio(GPIO_MEMLCD_CS); +} + +/**************************************************************************** + * Name: stm32_spi1/2select and stm32_spi1/2status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +# if defined(CONFIG_LCD_SHARP_MEMLCD) + if (devid == SPIDEV_DISPLAY) + { + stm32_gpiowrite(GPIO_MEMLCD_CS, selected); + } +# endif +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} + +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} + +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/maple/src/stm32_usbdev.c b/configs/maple/src/stm32_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..5c007477084331e50a2e9130ac3a0283d5208260 --- /dev/null +++ b/configs/maple/src/stm32_usbdev.c @@ -0,0 +1,117 @@ +/************************************************************************************ + * configs/maple/src/stm32_usbdev.c + * + * Copyright (C) 2009-2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "maple.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + ulldbg("called\n"); + + /* USB Soft Connect Pullup */ + + stm32_configgpio(GPIO_USB_PULLUP); +} + +/************************************************************************************ + * Name: stm32_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB software + * connect and disconnect), then the board software must provide stm32_pullup. + * See include/nuttx/usb/usbdev.h for additional description of this method. + * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be + * NULL. + * + ************************************************************************************/ + +int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); + stm32_gpiowrite(GPIO_USB_PULLUP, !enable); + return OK; +} + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} diff --git a/configs/maple/src/stm32_watchdog.c b/configs/maple/src/stm32_watchdog.c new file mode 100644 index 0000000000000000000000000000000000000000..24d5579da4d4f01d91219121ddc28d33f5d651c1 --- /dev/null +++ b/configs/maple/src/stm32_watchdog.c @@ -0,0 +1,137 @@ +/************************************************************************************ + * configs/maple/src/stm32_watchdog.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Wathdog hardware should be enabled */ + +#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG) +# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_STM32_WDG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0" +# endif +#endif + +/* Use the un-calibrated LSI frequency if we have nothing better */ + +#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ) +# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecuture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ + /* Initialize tha register the watchdog timer device */ + +#if defined(CONFIG_STM32_WWDG) + stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH); + return OK; + +#elif defined(CONFIG_STM32_IWDG) + stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ); + return OK; + +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/maple/tools/dfu.sh b/configs/maple/tools/dfu.sh new file mode 100644 index 0000000000000000000000000000000000000000..4ca7e0eb1ea7a5bbaa3f1ec7caade733c65e4fef --- /dev/null +++ b/configs/maple/tools/dfu.sh @@ -0,0 +1,3 @@ +#!/bin/bash + +dfu-util -a1 -d 1eaf:0003 -D nuttx.bin -R diff --git a/configs/maple/tools/env.sh b/configs/maple/tools/env.sh new file mode 100644 index 0000000000000000000000000000000000000000..91a15810aa3419f4fcbe110ed8b741bda3294f93 --- /dev/null +++ b/configs/maple/tools/env.sh @@ -0,0 +1,5 @@ +#!/bin/bash + +cd tools +./configure.sh maple/$1 +cd - > /dev/null diff --git a/configs/maple/usbnsh/Make.defs b/configs/maple/usbnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..8820947ef8f3f037a12cccad2b637aef02e0eb92 --- /dev/null +++ b/configs/maple/usbnsh/Make.defs @@ -0,0 +1,116 @@ +############################################################################ +# configs/maple/usbnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/maple/usbnsh/defconfig b/configs/maple/usbnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..be3bc097cb6010b78fa8db0e05720aa69879f486 --- /dev/null +++ b/configs/maple/usbnsh/defconfig @@ -0,0 +1,1137 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +CONFIG_ARCH_CHIP_STM32F103CB=y +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +CONFIG_STM32_JTAG_DISABLE=y +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ARCH_USBDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_MAPLE=y +# CONFIG_ARCH_BOARD_SPARK is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="maple" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_MAPLE_MINI=y +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=23 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=6 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +CONFIG_USBDEV_TRACE=y +CONFIG_USBDEV_TRACE_NRECORDS=32 +# CONFIG_USBDEV_TRACE_STRINGS is not set +# CONFIG_USBDEV_TRACE_INITIALIDSET is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=2 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +# CONFIG_NSH_DISABLE_DELROUTE is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +CONFIG_NSH_DISABLE_ITEF=y +CONFIG_NSH_DISABLE_LOOPS=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_USBCONSOLE=y +CONFIG_NSH_USBCONDEV="/dev/ttyACM0" +CONFIG_USBDEV_MINOR=0 + +# +# USB Device Trace Support +# +# CONFIG_NSH_USBDEV_TRACE is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_USBMONITOR is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/maple/usbnsh/setenv.sh b/configs/maple/usbnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c24c1b78d593a2b597421ea1d51cf69255a5658b --- /dev/null +++ b/configs/maple/usbnsh/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/maple/usbnsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. + +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the Spark tools directory + +export TOOL_BIN="${WD}/configs/maple/tools" + +# Update the PATH variable + +export PATH="${BUILDROOT_BIN}:${TOOL_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mbed/Kconfig b/configs/mbed/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..7a17db160bbff02aa8276ea2c263b57775b9807f --- /dev/null +++ b/configs/mbed/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_MBED +endif diff --git a/configs/mbed/README.txt b/configs/mbed/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..8385d563f5d21e8a8a044b898e1aaef7eab5444e --- /dev/null +++ b/configs/mbed/README.txt @@ -0,0 +1,478 @@ +README +^^^^^^ + +README for NuttX port to the mbed.org LPC1768 board (http://mbed.org/) + +Contents +^^^^^^^^ + + Development Environment + GNU Toolchain Options + IDEs + NuttX EABI "buildroot" Toolchain + NuttX OABI "buildroot" Toolchain + NXFLAT Toolchain + USB Device Controller Functions + mbed Configuration Options + USB Host Configuration + Configurations + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery or devkitARM toolchain, you simply need add one of the + following configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also + have to modify the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows)and devkitARM are Windows native toolchains. + The CodeSourcey (for Linux) and NuttX buildroot toolchains are Cygwin and/or + Linux native toolchains. There are several limitations to using a Windows based + toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lpc17xx, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/lpc17x/lpc17_vectors.S. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh mbed/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +mbed Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc17xx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LPC1768=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=mbed (for the mbed.org board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_MBED=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x10000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + CONFIG_LPC17_MAINOSC=y + CONFIG_LPC17_PLL0=y + CONFIG_LPC17_PLL1=n + CONFIG_LPC17_ETHERNET=n + CONFIG_LPC17_USBHOST=n + CONFIG_LPC17_USBOTG=n + CONFIG_LPC17_USBDEV=n + CONFIG_LPC17_UART0=y + CONFIG_LPC17_UART1=n + CONFIG_LPC17_UART2=n + CONFIG_LPC17_UART3=n + CONFIG_LPC17_CAN1=n + CONFIG_LPC17_CAN2=n + CONFIG_LPC17_SPI=n + CONFIG_LPC17_SSP0=n + CONFIG_LPC17_SSP1=n + CONFIG_LPC17_I2C0=n + CONFIG_LPC17_I2C1=n + CONFIG_LPC17_I2S=n + CONFIG_LPC17_TMR0=n + CONFIG_LPC17_TMR1=n + CONFIG_LPC17_TMR2=n + CONFIG_LPC17_TMR3=n + CONFIG_LPC17_RIT=n + CONFIG_LPC17_PWM0=n + CONFIG_LPC17_MCPWM=n + CONFIG_LPC17_QEI=n + CONFIG_LPC17_RTC=n + CONFIG_LPC17_WDT=n + CONFIG_LPC17_ADC=n + CONFIG_LPC17_DAC=n + CONFIG_LPC17_GPDMA=n + CONFIG_LPC17_FLASH=n + + LPC17xx specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + LPC17xx specific CAN device driver settings. These settings all + require CONFIG_CAN: + + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined. + CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7 + + LPC17xx specific PHY/Ethernet device driver settings. These setting + also require CONFIG_NET and CONFIG_LPC17_ETHERNET. + + CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY + CONFIG_PHY_AUTONEG - Enable auto-negotion + CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. + CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex + + CONFIG_NET_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb + CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 18 + CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18 + CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented). + CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs + CONFIG_DEBUG. + CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets. + Also needs CONFIG_DEBUG. + CONFIG_NET_HASH - Enable receipt of near-perfect match frames. + CONFIG_LPC17_MULTICAST - Enable receipt of multicast (and unicast) frames. + Automatically set if CONFIG_NET_IGMP is selected. + + LPC17xx USB Device Configuration + + CONFIG_LPC17_USBDEV_FRAME_INTERRUPT + Handle USB Start-Of-Frame events. + Enable reading SOF from interrupt handler vs. simply reading on demand. + Probably a bad idea... Unless there is some issue with sampling the SOF + from hardware asynchronously. + CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT + Enable high priority interrupts. I have no idea why you might want to + do that + CONFIG_LPC17_USBDEV_NDMADESCRIPTORS + Number of DMA descriptors to allocate in SRAM. + CONFIG_LPC17_USBDEV_DMA + Enable lpc17xx-specific DMA support + CONFIG_LPC17_USBDEV_NOVBUS + Define if the hardware implementation does not support the VBUS signal + CONFIG_LPC17_USBDEV_NOLED + Define if the hardware implementation does not support the LED output + + LPC17xx USB Host Configuration + + CONFIG_USBHOST_OHCIRAM_SIZE + Total size of OHCI RAM (in AHB SRAM Bank 1) + CONFIG_USBHOST_NEDS + Number of endpoint descriptors + CONFIG_USBHOST_NTDS + Number of transfer descriptors + CONFIG_USBHOST_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_USBHOST_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_IOBUFSIZE + Size of one end-user I/O buffer. This can be zero if the + application can guarantee that all end-user I/O buffers + reside in AHB SRAM. + +USB Host Configuration +^^^^^^^^^^^^^^^^^^^^^^ + + The mbed board can be easily modified to support a USB host interface + (Remember to add 2 resistors of 15K to D+ and D- pins). The hidkbd + configuration assumes that this change has been made. + + The NuttShell (NSH) mbed can also be modified in order to support USB + host operations. To make these modifications, do the following: + + 1. First configure to build the NSH configuration from the top-level + NuttX directory: + + cd tools + ./configure mbed/nsh + cd .. + + 2. Then edit the top-level .config file to enable USB host. Make the + following changes using 'make menuconfig': + + System Type -> LPC17xx Peripheral Support + CONFIG_LPC17_USBHOST=y : USB host controller driver support + + Device Drivers -> USB Host Driver Support + CONFIG_USBHOST=y : USB host support + CONFIG_USBHOST_ISOC_DISABLE=y : Not needed + CONFIG_USBHOST_MSC=y : Mass storage class support + + Library Routines + CONFIG_SCHED_WORKQUEUE=y : Enable worker thread + + When this change is made, NSH should be extended to support USB flash + devices. When a FLASH device is inserted, you should see a device + appear in the /dev (pseudo) directory. The device name should be + like /dev/sda, /dev/sdb, etc. The USB mass storage device, is present + it can be mounted from the NSH command line like: + + ls /dev + mount -t vfat /dev/sda /mnt/flash + + Files on the connect USB flash device should then be accessible under + the mountpoint /mnt/flash. + +Configurations +^^^^^^^^^^^^^^ + + General + ------- + + Each mbed configuration is maintained in a sub-directory and can be selected + as follow: + + cd tools + ./configure.sh mbed/ + cd - + . ./setenv.sh + + Where is one of the mbed subdirectories described in the + following paragraph. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + Configuration Sub-directories + ----------------------------- + + hidkbd: + This configuration directory, performs a simple test of the USB host + HID keyboard class driver using the test logic in examples/hidkbd. + This configuration assumes that you have modified your mbed for USB + host support. + + nsh: + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables only the serial NSH interfaces. See notes + above for enabling USB host support in this configuration. diff --git a/configs/mbed/hidkbd/Make.defs b/configs/mbed/hidkbd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..fc07f4425f0ca7e4fdc6a80ebee42f3445d55960 --- /dev/null +++ b/configs/mbed/hidkbd/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/mbed/hidkbd/Make.defs +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/mbed/hidkbd/defconfig b/configs/mbed/hidkbd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b90bb8ae9a24123bfdb207a0a12a11c618b9e325 --- /dev/null +++ b/configs/mbed/hidkbd/defconfig @@ -0,0 +1,726 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARCH_HAVE_FPU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +# CONFIG_GPIO_IRQ is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_ETHERNET is not set +CONFIG_LPC17_USBHOST=y +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# +# CONFIG_SERIAL_TERMIOS is not set + +# +# USB host driver options +# +CONFIG_USBHOST_OHCIRAM_SIZE=1536 +CONFIG_USBHOST_NEDS=2 +CONFIG_USBHOST_NTDS=3 +CONFIG_USBHOST_TDBUFFERS=3 +CONFIG_USBHOST_TDBUFSIZE=128 +CONFIG_USBHOST_IOBUFSIZE=512 +CONFIG_USBHOST_BULK_DISABLE=y +# CONFIG_USBHOST_INT_DISABLE is not set +CONFIG_USBHOST_ISOC_DISABLE=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_ADDRENV is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=7982 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_LPCXPRESSO is not set +CONFIG_ARCH_BOARD_MBED=y +# CONFIG_ARCH_BOARD_NUCLEUS2G is not set +# CONFIG_ARCH_BOARD_ZKITARM is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mbed" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=10 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="hidkbd_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=16 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART0=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +CONFIG_USBHOST=y +CONFIG_USBHOST_NPREALLOC=0 +# CONFIG_USBHOST_MSC is not set +CONFIG_USBHOST_HIDKBD=y +CONFIG_HIDKBD_POLLUSEC=100000 +CONFIG_HIDKBD_DEFPRIO=50 +CONFIG_HIDKBD_STACKSIZE=1024 +CONFIG_HIDKBD_BUFSIZE=64 +CONFIG_HIDKBD_NPOLLWAITERS=2 +# CONFIG_HIDKBD_RAWSCANCODES is not set +# CONFIG_HIDKBD_ALLSCANCODES is not set +# CONFIG_HIDKBD_NODEBOUNCE is not set +# CONFIG_USBHOST_HIDMOUSE is not set +# CONFIG_USBHOST_TRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +CONFIG_EXAMPLES_HIDKBD=y +CONFIG_EXAMPLES_HIDKBD_DEFPRIO=50 +CONFIG_EXAMPLES_HIDKBD_STACKSIZE=1024 +CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda" +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mbed/hidkbd/setenv.sh b/configs/mbed/hidkbd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c3ca070e33873590c71c0994c8dcbbb95c0ef89f --- /dev/null +++ b/configs/mbed/hidkbd/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/mbed/hidkbd/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export LPCTOOL_DIR="${WD}/configs/mbed/tools" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mbed/include/board.h b/configs/mbed/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..8367f1d5bc629088dec0ca513b75684c830aa79b --- /dev/null +++ b/configs/mbed/include/board.h @@ -0,0 +1,328 @@ +/************************************************************************************ + * configs/mbed/include/board.h + * + * Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_MBED_INCLUDE_BOARD_H +#define __CONFIGS_MBED_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* NOTE: The following definitions require lpc17_syscon.h. It is not included here + * because the including C file may not have that file in its include path. + */ + +#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency */ +#define BOARD_OSCCLK_FREQUENCY BOARD_XTAL_FREQUENCY /* Main oscillator frequency */ +#define BOARD_RTCCLK_FREQUENCY (32000) /* RTC oscillator frequency */ +#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */ + +/* This is the clock setup we configure for: + * + * SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multiplier=20, pre-divider=1 + * CCLCK = 480MHz / 6 = 80MHz -> CCLK divider = 6 + */ + +#define LPC17_CCLK 80000000 /* 80Mhz*/ + +/* Select the main oscillator as the frequency source. SYSCLK is then the frequency + * of the main oscillator. + */ + +#undef CONFIG_LPC17_MAINOSC +#define CONFIG_LPC17_MAINOSC 1 +#define BOARD_SCS_VALUE SYSCON_SCS_OSCEN + +/* Select the main oscillator and CCLK divider. The output of the divider is CCLK. + * The input to the divider (PLLCLK) will be determined by the PLL output. + */ + +#define BOARD_CCLKCFG_DIVIDER 6 +#define BOARD_CCLKCFG_VALUE ((BOARD_CCLKCFG_DIVIDER-1) << SYSCON_CCLKCFG_SHIFT) + +/* PLL0. PLL0 is used to generate the CPU clock divider input (PLLCLK). + * + * Source clock: Main oscillator + * PLL0 Multiplier value (M): 20 + * PLL0 Pre-divider value (N): 1 + * + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz + */ + +#undef CONFIG_LPC17_PLL0 +#define CONFIG_LPC17_PLL0 1 +#define BOARD_CLKSRCSEL_VALUE SYSCON_CLKSRCSEL_MAIN + +#define BOARD_PLL0CFG_MSEL 20 +#define BOARD_PLL0CFG_NSEL 1 +#define BOARD_PLL0CFG_VALUE \ + (((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLL0CFG_MSEL_SHIFT) | \ + ((BOARD_PLL0CFG_NSEL-1) << SYSCON_PLL0CFG_NSEL_SHIFT)) + +/* PLL1 -- Not used. */ + +#undef CONFIG_LPC17_PLL1 +#define BOARD_PLL1CFG_MSEL 36 +#define BOARD_PLL1CFG_NSEL 1 +#define BOARD_PLL1CFG_VALUE \ + (((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLL1CFG_MSEL_SHIFT) | \ + ((BOARD_PLL1CFG_NSEL-1) << SYSCON_PLL1CFG_NSEL_SHIFT)) + +/* USB divider. This divider is used when PLL1 is not enabled to get the + * USB clock from PLL0: + * + * USBCLK = PLL0CLK / 10 = 48MHz + */ + +#define BOARD_USBCLKCFG_VALUE SYSCON_USBCLKCFG_DIV10 + +/* FLASH Configuration */ + +#undef CONFIG_LPC17_FLASH +#define CONFIG_LPC17_FLASH 1 +#define BOARD_FLASHCFG_VALUE 0x0000303a + +/* Ethernet configuration */ + +//#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV44 +#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV20 + +/* LED definitions ******************************************************************/ +/* The MBED has 4 LEDs along the bottom of the board. Blue or off. + * If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows for NuttX + * debug functionality (where NC means "No Change"). + * + * During the boot phases. LED1 and LED2 will show boot status. LED3/4 Not used. + */ + /* LED1 LED2 */ +#define LED_STARTED 0 /* OFF OFF */ +#define LED_HEAPALLOCATE 1 /* BLUE OFF */ +#define LED_IRQSENABLED 2 /* OFF BLUE */ +#define LED_STACKCREATED 3 /* OFF OFF */ + +/* After the system is booted, this logic will no longer use LEDs 1 & 2. They + * are available together with LED3 for use the application software using + * lpc17_led (prototyped below) + */ + /* LED1 LED2 LED3 LED4 */ +#define LED_INIRQ 4 /* NC NC NC ON (momentary) */ +#define LED_SIGNAL 5 /* NC NC NC ON (momentary) */ +#define LED_ASSERTION 6 /* NC NC NC ON (momentary) */ +#define LED_PANIC 7 /* NC NC NC ON (1Hz flashing) */ + + +#define GPIO_SSP0_SCK GPIO_SSP0_SCK_1 +#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_1 +#define GPIO_SSP0_MISO GPIO_SSP0_MISO_1 +#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_1 + +/* We need to redefine USB_PWRD as GPIO to get USB Host working + * Also remember to add 2 resistors of 15K to D+ and D- pins. + */ + +#ifdef CONFIG_USBHOST +# ifdef GPIO_USB_PWRD +# undef GPIO_USB_PWRD +# define GPIO_USB_PWRD (GPIO_INPUT | GPIO_PORT1 | GPIO_PIN22) +# endif +#endif + +/* Alternate pin selections *********************************************************/ +/* Pin Description Connector On Board Base Board + * -------------------------------- --------- -------------- --------------------- + * P0[0]/RD1/TXD3/SDA1 J6-9 I2C E2PROM SDA TXD3/SDA1 + * P0[1]/TD1/RXD3/SCL J6-10 RXD3/SCL1 + * P0[2]/TXD0/AD0[7] J6-21 + * P0[3]/RXD0/AD0[6] J6-22 + * P0[4]/I2SRX-CLK/RD2/CAP2.0 J6-38 CAN_RX2 + * P0[5]/I2SRX-WS/TD2/CAP2.1 J6-39 CAN_TX2 + * P0[6]/I2SRX_SDA/SSEL1/MAT2[0] J6-8 SSEL1, OLED CS + * P0[7]/I2STX_CLK/SCK1/MAT2[1] J6-7 SCK1, OLED SCK + * P0[8]/I2STX_WS/MISO1/MAT2[2] J6-6 MISO1 + * P0[9]/I2STX_SDA/MOSI1/MAT2[3] J6-5 MOSI1, OLED data in + * P0[10] J6-40 TXD2/SDA2 + * P0[11] J6-41 RXD2/SCL2 + * P0[15]/TXD1/SCK0/SCK J6-13 TXD1/SCK0 + * P0[16]/RXD1/SSEL0/SSEL J6-14 RXD1/SSEL0 + * P0[17]/CTS1/MISO0/MISO J6-12 MISO0 + * P0[18]/DCD1/MOSI0/MOSI J6-11 MOSI0 + * P0[19]/DSR1/SDA1 PAD17 N/A + * P0[20]/DTR1/SCL1 PAD18 I2C E2PROM SCL N/A + * P0[21]/RI1/MCIPWR/RD1 J6-23 + * P0[22]/RTS1/TD1 J6-24 LED + * P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] J6-15 AD0.0 + * P0[24]/AD0[1]/I2SRX_WS/CAP3[1] J6-16 AD0.1 + * P0[25]/AD0[2]/I2SRX_SDA/TXD3 J6-17 AD0.2 + * P0[26]/AD0[3]/AOUT/RXD3 J6-18 AD0.3/AOUT / RGB LED + * P0[27]/SDA0/USB_SDA J6-25 + * P0[28]/SCL0 J6-26 + * P0[29]/USB_D+ J6-37 USB_D+ + * P0[30]/USB_D- J6-36 USB_D- + */ + +#define GPIO_UART3_TXD GPIO_UART3_TXD_1 +#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1 +#define GPIO_UART3_RXD GPIO_UART3_RXD_1 +#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 +#define GPIO_SSP1_SCK GPIO_SSP1_SCK_1 +#define GPIO_UART2_TXD GPIO_UART2_TXD_1 +#define GPIO_UART2_RXD GPIO_UART2_RXD_1 +#define GPIO_UART1_TXD GPIO_UART1_TXD_1 +#define GPIO_SSP0_SCK GPIO_SSP0_SCK_1 +#define GPIO_UART1_RXD GPIO_UART1_RXD_1 +#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_1 +#define GPIO_SSP0_MISO GPIO_SSP0_MISO_1 +#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_1 + +/* P1[0]/ENET-TXD0 J6-34? TXD0 TX-(Ethernet PHY) + * P1[1]/ENET_TXD1 J6-35? TXD1 TX+(Ethernet PHY) + * P1[4]/ENET_TX_EN TXEN N/A + * P1[8]/ENET_CRS CRS_DV/MODE2 N/A + * P1[9]/ENET_RXD0 J6-32? RXD0/MODE0 RD-(Ethernet PHY) + * P1[10]/ENET_RXD1 J6-33? RXD1/MODE1 RD+(Ethernet PHY) + * P1[14]/ENET_RX_ER RXER/PHYAD0 N/A + * P1[15]/ENET_REF_CLK REFCLK N/A + * P1[16]/ENET_MDC MDC N/A + * P1[17]/ENET_MDIO MDIO N/A + * P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] PAD1 N/A + * P1[19]/MC0A/USB_PPWR/N_CAP1.1 PAD2 N/A + * P1[20]/MCFB0/PWM1.2/SCK0 PAD3 N/A + * P1[21]/MCABORT/PWM1.3/SSEL0 PAD4 N/A + * P1[22]/MC0B/USB-PWRD/MAT1.0 PAD5 N/A + * P1[23]/MCFB1/PWM1.4/MISO0 PAD6 N/A + * P1[24]/MCFB2/PWM1.5/MOSI0 PAD7 N/A + * P1[25]/MC1A/MAT1.1 PAD8 N/A + * P1[26]/MC1B/PWM1.6/CAP0.0 PAD9 N/A + * P1[27]/CLKOUT/USB-OVRCR-N/CAP0.1 PAD10 N/A + * P1[28]/MC2A/PCAP1.0/MAT0.0 PAD11 N/A + * P1[29]/MC2B/PCAP1.1/MAT0.1 PAD12 N/A + * P1[30]/VBUS/AD0[4] J6-19 AD0.4 + * P1[31]/SCK1/AD0[5] J6-20 AD0.5 + */ + +#define GPIO_ENET_MDC GPIO_ENET_MDC_1 +#define GPIO_ENET_MDIO GPIO_ENET_MDIO_1 + +/* P2[0]/PWM1.1/TXD1 J6-42 PWM1.1 / RGB LED / RS422 RX + * P2[1]/PWM1.2/RXD1 J6-43 PWM1.2 / OLED voltage / RGB LED / RS422 RX + * P2[2]/PWM1.3/CTS1/TRACEDATA[3] J6-44 PWM1.3 + * P2[3]/PWM1.4/DCD1/TRACEDATA[2] J6-45 PWM1.4 + * P2[4]/PWM1.5/DSR1/TRACEDATA[1] J6-46 PWM1.5 + * P2[5]/PWM1[6]/DTR1/TRACEDATA[0] J6-47 PWM1.6 + * P2[6]/PCAP1[0]/RI1/TRACECLK J6-48 + * P2[7]/RD2/RTS1 J6-49 OLED command/data + * P2[8]/TD2/TXD2 J6-50 + * P2[9]/USB_CONNECT/RXD2 PAD19 USB Pullup N/A + * P2[10]/EINT0/NMI J6-51 + * P2[11]/EINT1/I2STX_CLK J6-52 + * P2[12]/EINT2/I2STX_WS J6-53 + * P2[13]/EINT3/I2STX_SDA J6-27 + */ + +#define GPIO_PWM1p1 GPIO_PWM1p1_2 +#define GPIO_PWM1p2 GPIO_PWM1p2_2 +#define GPIO_PWM1p3 GPIO_PWM1p3_2 +#define GPIO_PWM1p4 GPIO_PWM1p4_2 +#define GPIO_PWM1p5 GPIO_PWM1p5_2 +#define GPIO_PWM1p6 GPIO_PWM1p6_2 + +/* P3[25]/MAT0.0/PWM1.2 PAD13 N/A + * P3[26]/STCLK/MAT0.1/PWM1.3 PAD14 N/A + * + * P4[28]/RX-MCLK/MAT2.0/TXD3 PAD15 N/A + * P4[29]/TX-MCLK/MAT2.1/RXD3 PAD16 N/A + */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void); + +/************************************************************************************ + * Name: lpc17_led + * + * Description: + * Once the system has booted, these functions can be used to control LEDs 1, 2 & 3 + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void lpc17_led(int lednum, int state); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MBED_INCLUDE_BOARD_H */ diff --git a/configs/mbed/nsh/Make.defs b/configs/mbed/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..24a6a0563699701f4634e09624f02bda69cd54d2 --- /dev/null +++ b/configs/mbed/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/mbed/nsh/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/mbed/nsh/defconfig b/configs/mbed/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d9e08cdf19d8ba1d0258f1b5aaf5275df97a57d2 --- /dev/null +++ b/configs/mbed/nsh/defconfig @@ -0,0 +1,944 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +# CONFIG_WINDOWS_CYGWIN is not set +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_ETHERNET is not set +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +CONFIG_LPC17_SSP0=y +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=7982 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_LPCXPRESSO is not set +CONFIG_ARCH_BOARD_MBED=y +# CONFIG_ARCH_BOARD_NUCLEUS2G is not set +# CONFIG_ARCH_BOARD_ZKITARM is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mbed" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=20 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +CONFIG_LIB_BOARDCTL=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# CU Minimal Terminal +# +# CONFIG_SYSTEM_CUTERM is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mbed/nsh/setenv.sh b/configs/mbed/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..f29d97589234a68e178d69ef0c4189599e3db0fc --- /dev/null +++ b/configs/mbed/nsh/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/mbed/nsh/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export LPCTOOL_DIR="${WD}/configs/mbed/tools" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mbed/scripts/ld.script b/configs/mbed/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..2d90a7608fa88261f624aabadce701c38de71f1d --- /dev/null +++ b/configs/mbed/scripts/ld.script @@ -0,0 +1,115 @@ +/**************************************************************************** + * configs/nucleus2g/mbed/ld.script + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LPC1768 has 512Kb of FLASH beginning at address 0x0000:0000 and + * 64Kb of total SRAM: 32Kb of SRAM in the CPU block beginning at address + * 0x10000000 and 32Kb of AHB SRAM in two banks of 16Kb beginning at addresses + * 0x20070000 and 0x20080000. Here we assume that .data and .bss will all fit + * into the 32Kb CPU SRAM address range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K + sram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/mbed/src/.gitignore b/configs/mbed/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/mbed/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/mbed/src/Makefile b/configs/mbed/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..1bd5a3e33cd09ab5692d2b149849a6a053b0f387 --- /dev/null +++ b/configs/mbed/src/Makefile @@ -0,0 +1,52 @@ +############################################################################ +# configs/mbed/src/Makefile +# +# Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc17_boot.c lpc17_leds.c lpc17_adc.c lpc17_dac.c lpc17_pwm.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc17_appinit.c +endif +ifeq ($(CONFIG_USBMSC),y) +CSRCS += lpc17_usbmsc.c +endif + +ifeq ($(CONFIG_EXAMPLES_HIDKBD),y) +CSRCS += lpc17_hidkbd.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/mbed/src/lpc17_adc.c b/configs/mbed/src/lpc17_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..aea44427e07237d60e8cb58200b82efbf4f88a92 --- /dev/null +++ b/configs/mbed/src/lpc17_adc.c @@ -0,0 +1,125 @@ +/************************************************************************************ + * configs/mbed/src/lpc17_adc.c + * + * Based on configs/zkit-arm-176/src/up-adc + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Kannan + * + * Based on configs/lpc1720g-eval/src/lpc17_adc.c + * + * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "lpc17_adc.h" +#include "mbed.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All LPC17 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call lpc17_adcinitialize() to get an instance of the ADC interface */ + + adc = lpc17_adcinitialize(); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_ADC */ diff --git a/configs/mbed/src/lpc17_appinit.c b/configs/mbed/src/lpc17_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..505ae45545f8bed24311642aa2008138b2b4aecf --- /dev/null +++ b/configs/mbed/src/lpc17_appinit.c @@ -0,0 +1,86 @@ +/**************************************************************************** + * config/mbed/src/lpc17_appinit.c + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_MBED +# define NSH_HAVEUSBDEV 1 +#else +# error "Unrecognized board" +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + return OK; +} diff --git a/configs/mbed/src/lpc17_boot.c b/configs/mbed/src/lpc17_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..ee1796628dfdb458c1598b1308b99e67b2f23067 --- /dev/null +++ b/configs/mbed/src/lpc17_boot.c @@ -0,0 +1,82 @@ +/************************************************************************************ + * configs/mbed/src/lpc17_boot.c + * + * Copyright (C) 2010, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "mbed.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} + diff --git a/configs/mbed/src/lpc17_dac.c b/configs/mbed/src/lpc17_dac.c new file mode 100644 index 0000000000000000000000000000000000000000..6f18a1411d8b74e6b4f5f9b395600ca7be693509 --- /dev/null +++ b/configs/mbed/src/lpc17_dac.c @@ -0,0 +1,101 @@ +/************************************************************************************ + * configs/mbed/src/lpc17_dac.c + * + * Based on configs/zkit-arm-1769/src/lpc17_dac.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Kannan + * + * Based on configs/stm3220g-eval/src/stm32_dac.c + * + * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_dac.h" + +#ifdef CONFIG_DAC + +/************************************************************************************ + * Name: dac_devinit + * + * Description: + * All LPC17xx architectures must provide the following interface to work with + * examples/diag. + * + ************************************************************************************/ + +int dac_devinit(void) +{ + static bool initialized = false; + struct dac_dev_s *dac; + int ret; + + if (!initialized) + { + /* Call lpc17_dacinitialize() to get an instance of the dac interface */ + + dac = lpc17_dacinitialize(); + if (dac == NULL) + { + adbg("ERROR: Failed to get dac interface\n"); + return -ENODEV; + } + + ret = dac_register("/dev/dac0", dac); + if (ret < 0) + { + adbg("dac_register failed: %d\n", ret); + return ret; + } + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_DAC */ diff --git a/configs/mbed/src/lpc17_hidkbd.c b/configs/mbed/src/lpc17_hidkbd.c new file mode 100644 index 0000000000000000000000000000000000000000..38fbca903346e4b14dbe2aa9a88e0d24d577bfce --- /dev/null +++ b/configs/mbed/src/lpc17_hidkbd.c @@ -0,0 +1,85 @@ +/**************************************************************************** + * configs/mbed/src/lpc17_hidkbd.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "lpc17_usbhost.h" + +#if defined(CONFIG_LPC17_USBHOST) && defined(CONFIG_USBHOST) && \ + defined(CONFIG_EXAMPLES_HIDKBD) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arch_usbhost_initialize + * + * Description: + * The apps/example/hidkbd test requires that platform-specific code + * provide a wrapper called arch_usbhost_initialize() that will perform + * the actual USB host initialization. + * + ****************************************************************************/ + +struct usbhost_connection_s *arch_usbhost_initialize(void) +{ +#ifdef CONFIG_USBHOST_HUB + int ret; + + /* Initialize USB hub class support */ + + ret = usbhost_hub_initialize(); + if (ret < 0) + { + udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret); + } +#endif + + return lpc17_usbhost_initialize(0); +} +#endif /* CONFIG_LPC17_USBHOST && CONFIG_USBHOST && CONFIG_EXAMPLES_HIDKBD */ diff --git a/configs/mbed/src/lpc17_leds.c b/configs/mbed/src/lpc17_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..4a0c4116c6a54d2895fbc64563caa6a3d85deceb --- /dev/null +++ b/configs/mbed/src/lpc17_leds.c @@ -0,0 +1,218 @@ +/**************************************************************************** + * configs/mbed/src/lpc17_leds.c + * + * Copyright (C) 2010, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_gpio.h" + +#include "mbed.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS) +# define led_dumpgpio(m) lpc17_dumpgpio(MBED_LED3, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* LED definitions ****************************************************************** + +The MBED has 4 LEDs along the bottom of the board. Blue or off. +If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows for NuttX +debug functionality (where NC means "No Change"). + +During the boot phases. LED1 and LED2 will show boot status. LED3/4 Not used. + + LED1 LED2 +STARTED OFF OFF +HEAPALLOCATE BLUE OFF +IRQSENABLED OFF BLUE +STACKCREATED OFF OFF + +After the system is booted, this logic will no longer use LEDs 1 & 2. They +are available together with LED3 for use the application software using +lpc17_led (prototyped below) +*/ + +static bool g_initialized; +static int g_nestcount; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure all LED GPIO lines */ + + led_dumpgpio("board_autoled_initialize() Entry)"); + + lpc17_configgpio(MBED_LED1); + lpc17_configgpio(MBED_LED2); + lpc17_configgpio(MBED_LED3); + lpc17_configgpio(MBED_LED4); + + led_dumpgpio("board_autoled_initialize() Exit"); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + /* We will control LED1 and LED2 not yet completed the boot sequence. */ + + if (!g_initialized) + { + int led1 = 0; + int led2 = 0; + switch (led) + { + case LED_STACKCREATED: + g_initialized = true; + case LED_STARTED: + default: + break; + + case LED_HEAPALLOCATE: + led1 = 1; + break; + + case LED_IRQSENABLED: + led2 = 1; + } + lpc17_led(MBED_LED1,led1); + lpc17_led(MBED_LED2,led2); + } + + /* We will always control the HB LED */ + + switch (led) + { + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + lpc17_gpiowrite(MBED_HEARTBEAT, false); + g_nestcount++; + + default: + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + /* In all states, OFF can only mean turning off the HB LED */ + + if (g_nestcount <= 1) + { + lpc17_led(MBED_HEARTBEAT, true); + g_nestcount = 0; + } + else + { + g_nestcount--; + } +} + +/************************************************************************************ + * Name: lpc17_led + * + * Description: + * Once the system has booted, these functions can be used to control the LEDs + * + ************************************************************************************/ + +void lpc17_led(int lednum, int state) + +{ + lpc17_gpiowrite(lednum, state); +} +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/mbed/src/lpc17_pwm.c b/configs/mbed/src/lpc17_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..d3021d7063f1c8f417c5f7979acd72744934c363 --- /dev/null +++ b/configs/mbed/src/lpc17_pwm.c @@ -0,0 +1,156 @@ +/************************************************************************************ + * configs/mbed/lpc17_pwm.c + * + * Based on onfigs/lpcexpresso-lpc1768/lpc17_pwm.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "lpc17_pwm.h" +#include "lpc17_timer.h" +#include "mbed.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifdef CONFIG_PWM + +FAR struct pwm_lowerhalf_s *lpc17_pwminitialize(int timer); +FAR struct pwm_lowerhalf_s *lpc17_mcpwminitialize(int timer); +FAR struct pwm_lowerhalf_s *lpc17_timerinitialize(int timer); + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All LPC17 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + struct pwm_lowerhalf_s *mcpwm; + struct pwm_lowerhalf_s *timer; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call lpc17_pwminitialize() to get an instance of the PWM interface */ + + pwm = lpc17_pwminitialize(0); + if (!pwm) + { + adbg("Failed to get the LPC17XX PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + mcpwm = lpc17_mcpwminitialize(0); + if (!mcpwm) + { + adbg("Failed to get the LPC17XX MOTOR PWM lower half\n"); + return -ENODEV; + } + + /* Register the MOTOR CONTROL PWM driver at "/dev/mcpwm0" */ + + ret = pwm_register("/dev/mcpwm0", mcpwm); + if (ret < 0) + { + adbg("mcpwm_register failed: %d\n", ret); + return ret; + } + + timer = lpc17_timerinitialize(0); + if (!timer) + { + adbg("Failed to get the LPC17XX TIMER lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/timer0" */ + + ret = pwm_register("/dev/timer0", timer); + if (ret < 0) + { + adbg("timer_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/mbed/src/mbed.h b/configs/mbed/src/mbed.h new file mode 100644 index 0000000000000000000000000000000000000000..938372b7801f31176bff8d99e049043746d8af1b --- /dev/null +++ b/configs/mbed/src/mbed.h @@ -0,0 +1,93 @@ +/************************************************************************************ + * configs/mbed/src/mbed.h + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef _CONFIGS_MBED_SRC_MBED_H +#define _CONFIGS_MBED_SRC_MBED_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* MBED GPIO Pin Definitions ********************************************************/ + +#define MBED_LED1 (GPIO_OUTPUT | GPIO_PORT1 | GPIO_PIN18) +#define MBED_LED1_OFF MBED_LED1 +#define MBED_LED1_ON (MBED_LED1 | GPIO_VALUE_ONE) +#define MBED_LED2 (GPIO_OUTPUT | GPIO_PORT1 | GPIO_PIN20) +#define MBED_LED2_OFF MBED_LED2 +#define MBED_LED2_ON (MBED_LED2 | GPIO_VALUE_ONE) +#define MBED_LED3 (GPIO_OUTPUT | GPIO_PORT1 | GPIO_PIN21) +#define MBED_LED3_OFF MBED_LED3 +#define MBED_LED3_ON (MBED_LED3 | GPIO_VALUE_ONE) +#define MBED_LED4 (GPIO_OUTPUT | GPIO_PORT1 | GPIO_PIN23) +#define MBED_LED4_OFF MBED_LED4 +#define MBED_LED4_ON (MBED_LED 4| GPIO_VALUE_ONE) + +#define MBED_HEARTBEAT MBED_LED4 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: mbed_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the NUCLEUS-2G board. + * + ************************************************************************************/ + +void weak_function mbed_sspdev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_MBED_SRC_MBED_H */ + diff --git a/configs/mcu123-lpc214x/Kconfig b/configs/mcu123-lpc214x/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f8de989edc17b420ea62434e8fe09fafd63c9ce6 --- /dev/null +++ b/configs/mcu123-lpc214x/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_MCU123 +endif diff --git a/configs/mcu123-lpc214x/README.txt b/configs/mcu123-lpc214x/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..cae9bf9957e43ee7c5e476ff1cfe330969fceca7 --- /dev/null +++ b/configs/mcu123-lpc214x/README.txt @@ -0,0 +1,378 @@ +README +^^^^^^ + +This README discusses issues unique to NuttX configurations for the +MCU-123 LPC2148 development board. + +Contents +-------- + + o Development Environment + o GNU Toolchain Options + o NuttX buildroot Toolchain + o Flash Tools + - In System Programming (ISP) Mode + - LPC21ISP (Linux) + - FlashMagic (Windows/MAC) + - OpenOCD + o ARM/LPC214X-specific Configuration Options + o Configurations + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The NuttX buildroot Toolchain (see below). + 2. The CodeSourcery GNU toolchain, + 3. The devkitARM GNU toolchain, or + + All testing has been conducted using the NuttX buildroot toolchain. To use + the CodeSourcery or devkitARM GNU toolchain, you simply need to build the + system as follows: + + make # Will build for the NuttX buildroot toolchain + make CROSSDEV=arm-eabi- # Will build for the devkitARM toolchain + make CROSSDEV=arm-none-eabi- # Will build for the CodeSourcery toolchain + make CROSSDEV=arm-nuttx-elf- # Will build for the NuttX buildroot toolchain + + Of course, hard coding this CROSS_COMPILE value in Make.defs file will save + some repetitive typing. + + NOTE: the CodeSourcery and devkitARM toolchains are Windows native toolchains. + The NuttX buildroot toolchain is a Cygwin toolchain. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context; make CROSSDEV=arm-none-eabi- + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) may not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +NuttX buildroot Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh eagle100/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/arm7tdmi-defconfig-4.3.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + +Flash Tools +^^^^^^^^^^^ + +In System Programming (ISP) Mode +-------------------------------- + +1. Make sure you exit minicom (or whatever terminal emulator you are + using). It will interfere with the download. + +2. On the MCU123 board, I need to put a jumper on JP3-INT. On that board, + JP3-INT is connected to P0.14 of LPC214x. When P0.14 is low and RTS is + changed from high to low, the LPC214x will enter ISP (In System + Programming) state. + + J2-RST: When J2 is shorted, the reset pin of CPU is controlled by + the DTR signal of UART0. Short J2 to enable ISP automatic download. + + Alternatively, you can just press the INT1 button while resetting. + The LEDs will be off if the LPC2148 successfully enters ISP mode. + +Resetting the board will enter ISP mode when the jumper is connected. + +LPC21ISP (Linux) +---------------- + +(ca. 2008) +I use the lpc21isp tool to load NuttX into FLASH. That tool is available +in the files section at https://groups.yahoo.com/neo/groups/lpc21isp/info. In +the older version 1.60 of lpc21isp for Linux, I had to make several changes. +This changes are shown in lpc21ips-1.60.diff. + +I use the script lpc21isp.sh to perform the actual download. You will +probably have to make some changes to this script in order to use it. +For example, the path to the built lpc21isp binary will most likely +have to change. Then move this script to the top level NuttX +directory and simply execute it to load NuttX onto the board (after +entering ISP mode). + +Here are the detailed steps I use: + +1. Setup ISP (In System Programming) mode (see above). + +3. Start lpc21isp.sh + +4. Reset the board to + +FlashMagic (Windows/MAC) +------------------------ + +(ca. 2012) +You download FlashMagic for Windows or MAC here: http://www.flashmagictool.com + +1. Setup ISP (In System Programming) mode (see above). + +2. Start FlashMagic and setup communication parameters. + + Device: LPC2148 + COM Port: (will vary with PC) + Baud: 38400 (I am sure it can go faster). + Interface: None (ISP) + Oscillator (MHz): 12 + + Check "Erase all Flash+Code Rd Prot" + +3. Select the nuttx.hex file + +4. Options: Verify after programming + +5. Start and reset the board to entry ISP mode. Or hold the INT1 + button down after reset after you press start. + +NOTE: FlashMagic will complain if the data section overlaps + 0x4000000-0x400001ff. + +OpenOCD +------- + +I have the (really old) Olimex software installed at C:/gccfd. Under +Cygwin, I can do the following: + +1. Create a .cfg file: + + $ cat /cygdrive/c/gccfd/openocd/lib/openocd/interface/arm-usb-ocd.cfg /cygdrive/c/gccfd/openocd/lib/openocd/target/lpc2148.cfg > lpc2148.cfg + +2. Start OpenOCD: + + /cygdrive/c/gccfd/openocd/bin/openocd-ftd2xx.exe -f lpc2148.cfg -s . & + +3. Start arm-*-gdb (whichever GDB your toolchain uses). + +ARM/LPC214X-specific Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_ARM7TDMI=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc214x + + CONFIG_ARCH_CHIP_name - For use in C code + + CONFIG_ARCH_CHIP_LPC214X + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=mcu123-lpc214x + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_MCU123_LPC214X (for theMCU123 LPC214x board) + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed RAM. + + CONFIG_RAM_START - The start address of installed RAM + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + LPC2148 specific chip initialization + + These provide register setup values: + CONFIG_EXTMEM_MODE, CONFIG_RAM_MODE, CONFIG_CODE_BASE, CONFIG_PLL_SETUP, + CONFIG_MAM_SETUP, CONFIG_APBDIV_SETUP, CONFIG_EMC_SETUP, CONFIG_BCFG0_SETUP, + CONFIG_BCFG1_SETUP, CONFIG_BCFG2_SETUP, CONFIG_BCFG3_SETUP, CONFIG_ADC_SETUP + + CONFIG_LPC214x_FIO - Enable fast GPIO (vs. legacy, "old" GPIO). + + LPC214X specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + + CONFIG_UARTn_BAUD - The configure BAUD of the UART. + + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity, 3=mark 1, 4=space 0 + + CONFIG_UARTn_2STOP - Two stop bits + + LPC214X USB Configuration + + CONFIG_LPC214X_USBDEV_FRAME_INTERRUPT + Handle USB Start-Of-Frame events. + Enable reading SOF from interrupt handler vs. simply reading on demand. + Probably a bad idea... Unless there is some issue with sampling the SOF + from hardware asynchronously. + + CONFIG_LPC214X_USBDEV_EPFAST_INTERRUPT + Enable high priority interrupts. I have no idea why you might want to + do that + + CONFIG_LPC214X_USBDEV_NDMADESCRIPTORS + Number of DMA descriptors to allocate in the 8Kb USB RAM. This is a + tradeoff between the number of DMA channels that can be supported vs + the size of the DMA buffers available. + + CONFIG_LPC214X_USBDEV_DMA + Enable lpc214x-specific DMA support + +Configurations +^^^^^^^^^^^^^^ + + 1. Each NXP LPC214x configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh mcu123-lpc214x/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume the NuttX Buildroot toolchain + under Linux (should work under Windows with Cygwin as well). This + is easily reconfigured: + + CONFIG_HOST_LINUX=y + CONFIG_ARM_TOOLCHAIN_BUILDROOT=y + +composite: +---------- + + A simple test of the USB Composite Device (see + apps/examples/README.txt and apps/system/composite) + + NOTE: I could not get this to work! Perhaps this is a consequence of the + last USB driver checking (r4359). But backing this change out did not fix + the configuration. + +nsh: +---- + + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables only the serial NSH interfaces. + +usbserial: +---------- + + This configuration directory exercises the USB serial class + driver at examples/usbserial. See examples/README.txt for + more information. + + NOTE: If you have problems with this configuration, perhaps it is a + consequence of the last USB driver checking (r4359) + +usbmsc: +------- + + This configuration directory exercises the USB mass storage + class driver at system/usbmsc. See examples/README.txt for + more information. + + NOTE: If you have problems with this configuration, perhaps it is a + consequence of the last USB driver checking (r4359) diff --git a/configs/mcu123-lpc214x/composite/Make.defs b/configs/mcu123-lpc214x/composite/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..a1d22707cc34151a1261a48884d6f2abd132a178 --- /dev/null +++ b/configs/mcu123-lpc214x/composite/Make.defs @@ -0,0 +1,125 @@ +############################################################################## +# configs/mcu123-lpc214x/composite/Make.defs +# +# Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(ARCHCCMAJOR),4) +ifneq ($(HOSTOS),Cygwin) + OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment +endif +endif + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/mcu123-lpc214x/composite/defconfig b/configs/mcu123-lpc214x/composite/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..770a258ebadc8ae6931e36d2ded0d7ae234b694f --- /dev/null +++ b/configs/mcu123-lpc214x/composite/defconfig @@ -0,0 +1,791 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +CONFIG_ARCH_CHIP_LPC214X=y +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="lpc214x" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +CONFIG_ARM_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARM_OABI_TOOLCHAIN is not set + +# +# LPC214x Configuration Options +# +CONFIG_ARCH_CHIP_LPC2148=y + +# +# LPC214x Initialization Options +# +# CONFIG_EXTMEM_MODE is not set +# CONFIG_RAM_MODE is not set +CONFIG_DEFAULT_MODE=y +CONFIG_CODE_BASE=0x00000000 +CONFIG_PLL_SETUP=y +CONFIG_MAM_SETUP=y +CONFIG_APBDIV_SETUP=y +CONFIG_APBDIV_VALUE=1 +# CONFIG_EMC_SETUP is not set +# CONFIG_BCFG0_SETUP is not set +# CONFIG_BCFG1_SETUP is not set +# CONFIG_BCFG2_SETUP is not set +# CONFIG_BCFG3_SETUP is not set +CONFIG_ADC_SETUP=y + +# +# LPC214x Peripheral Support +# +CONFIG_LPC214X_UART0=y +CONFIG_LPC214X_UART1=y +CONFIG_LPC214X_USBDEV=y +# CONFIG_LPC214x_FIO is not set + +# +# LPC214x USB Device Configuration +# +# CONFIG_LPC214X_USBDEV_DMA is not set +# CONFIG_LPC214X_USBDEV_EPFAST_INTERRUPT is not set +# CONFIG_LPC214X_USBDEV_FRAME_INTERRUPT is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ARCH_USBDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=3270 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x40000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_MCU123_LPC214X=y +# CONFIG_ARCH_BOARD_ZP214XPA is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mcu123-lpc214x" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="conn_main" +CONFIG_RR_INTERVAL=0 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=38400 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=38400 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +CONFIG_USBDEV_TRACE=y +CONFIG_USBDEV_TRACE_NRECORDS=128 +# CONFIG_USBDEV_TRACE_STRINGS is not set + +# +# USB Device Class Driver Options +# +CONFIG_USBDEV_COMPOSITE=y +CONFIG_COMPOSITE_IAD=y +CONFIG_COMPOSITE_EP0MAXPACKET=64 +CONFIG_COMPOSITE_VENDORID=0x03eb +CONFIG_COMPOSITE_VENDORSTR="NuttX" +CONFIG_COMPOSITE_PRODUCTID=0x2022 +CONFIG_COMPOSITE_PRODUCTSTR="Composite Device" +CONFIG_COMPOSITE_SERIALSTR="12345" +CONFIG_COMPOSITE_CONFIGSTR="system/composite" +CONFIG_COMPOSITE_VERSIONNO=0x0101 +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +CONFIG_CDCACM_COMPOSITE=y +CONFIG_CDCACM_IFNOBASE=0 +CONFIG_CDCACM_STRBASE=4 +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +CONFIG_USBMSC=y +CONFIG_USBMSC_COMPOSITE=y +CONFIG_USBMSC_IFNOBASE=2 +CONFIG_USBMSC_STRBASE=4 +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=4 +CONFIG_USBMSC_EPBULKIN=5 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=256 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" +CONFIG_USBMSC_VERSIONNO=0x0399 +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=2048 +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +CONFIG_SYSTEM_COMPOSITE=y +CONFIG_SYSTEM_COMPOSITE_NLUNS=1 +CONFIG_SYSTEM_COMPOSITE_DEVMINOR1=0 +CONFIG_SYSTEM_COMPOSITE_DEVPATH1="/dev/mmcsd0" +CONFIG_SYSTEM_COMPOSITE_DEVMINOR2=1 +CONFIG_SYSTEM_COMPOSITE_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_COMPOSITE_DEVMINOR3=2 +CONFIG_SYSTEM_COMPOSITE_DEVPATH3="/dev/mmcsd2" +CONFIG_SYSTEM_COMPOSITE_TTYUSB=0 +CONFIG_SYSTEM_COMPOSITE_SERDEV="/dev/ttyUSB0" +CONFIG_SYSTEM_COMPOSITE_BUFSIZE=256 +# CONFIG_SYSTEM_COMPOSITE_TRACEINIT is not set +# CONFIG_SYSTEM_COMPOSITE_TRACECLASS is not set +# CONFIG_SYSTEM_COMPOSITE_TRACETRANSFERS is not set +# CONFIG_SYSTEM_COMPOSITE_TRACECONTROLLER is not set +# CONFIG_SYSTEM_COMPOSITE_TRACEINTERRUPTS is not set +# CONFIG_SYSTEM_COMPOSITE_DEBUGMM is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_SYSTEM_USBMONITOR is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mcu123-lpc214x/composite/setenv.sh b/configs/mcu123-lpc214x/composite/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..841f9c05a1273cc65c9dc5099d219b2a0e3534d7 --- /dev/null +++ b/configs/mcu123-lpc214x/composite/setenv.sh @@ -0,0 +1,66 @@ +#!/bin/bash +# configs/mcu123-lpc2148/composite/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the Cygwin path to the configuration scripts directory + +export LPC214XSCRIPTS="$WD/configs/mcu123-lpc214x/scripts" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPC214XSCRIPTS}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mcu123-lpc214x/include/board.h b/configs/mcu123-lpc214x/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..d1784401afc5644b3c58a0e0d2a818fcf79df38c --- /dev/null +++ b/configs/mcu123-lpc214x/include/board.h @@ -0,0 +1,79 @@ +/**************************************************************************** + * configs/mcu123-lpc214x/include/board.h + * + * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* Oscillator frequency */ + +#define LPC214X_FOSC 12000000 + +/* PLL0 settings CCLK = PLL_M * FOSC PCLK = CCLK/APBDIV */ + +#define LPC214X_PLL_M 5 +#define LPC214X_PLL_P 2 +#define LPC214X_APB_DIV 1 + +/* USB Pll settings -- 48 MHz needed. FUSB = PLL_M FOSC */ + +#define LPC214X_USBPLL_M 4 +#define LPC214X_USBPLL_P 2 + +/* LED definitions **********************************************************/ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/mcu123-lpc214x/lpc21isp-1.60.diff b/configs/mcu123-lpc214x/lpc21isp-1.60.diff new file mode 100644 index 0000000000000000000000000000000000000000..998ed321db4a7bf9a4f4ca3333349955990ba494 --- /dev/null +++ b/configs/mcu123-lpc214x/lpc21isp-1.60.diff @@ -0,0 +1,102 @@ +diff -rub lpc21isp-1.60/lpc21isp.c lpc21isp-Linux//lpc21isp.c +--- lpc21isp-1.60/lpc21isp.c 2008-07-21 15:17:06.000000000 -0600 ++++ lpc21isp-Linux//lpc21isp.c 2008-09-16 09:21:20.000000000 -0600 +@@ -22,6 +22,7 @@ + #include "adprog.h" + #include "lpcprog.h" + #include "lpcterm.h" ++#include "errno.h" + + /* + Change-History: +@@ -319,10 +320,7 @@ + + if (IspEnvironment->fdCom < 0) + { +- int* p_err = __error(); +- int err; +- if (p_err) { err = *p_err; } +- DebugPrintf(1, "Can't open COM-Port %s ! (Error: %dd (0x%X))\n", IspEnvironment->serial_port, err, err); ++ DebugPrintf(1, "Can't open COM-Port %s ! (Error: %dd (0x%X))\n", IspEnvironment->serial_port, errno, errno); + exit(2); + } + +diff -rub lpc21isp-1.60/lpc21isp.h lpc21isp-Linux//lpc21isp.h +--- lpc21isp-1.60/lpc21isp.h 2008-05-10 17:35:00.000000000 -0600 ++++ lpc21isp-Linux//lpc21isp.h 2008-09-16 09:18:42.000000000 -0600 +@@ -165,6 +165,7 @@ + #endif + + unsigned serial_timeout_count; /**< Local used to track timeouts on serial port read. */ ++ unsigned char DoNotStart; /* Do not start Code if this is set*/ + + } ISP_ENVIRONMENT; + +@@ -173,7 +174,6 @@ + #define DebugPrintf(in, ...) + + #else +-extern int debug_level; + + #if defined INTEGRATED_IN_WIN_APP + +@@ -191,7 +191,6 @@ + + #else + void DebugPrintf(int level, const char *fmt, ...); +-//#define DebugPrintf(level, ...) if (level <= debug_level) { TRACE( __VA_ARGS__ ); } + #endif + + void ClearSerialPortBuffers(ISP_ENVIRONMENT *IspEnvironment); +diff -rub lpc21isp-1.60/lpcprog.c lpc21isp-Linux//lpcprog.c +--- lpc21isp-1.60/lpcprog.c 2008-07-21 14:39:50.000000000 -0600 ++++ lpc21isp-Linux//lpcprog.c 2008-09-16 08:52:46.000000000 -0600 +@@ -1062,15 +1062,16 @@ + } + else + { ++ if (IspEnvironment->DoNotStart == 0) ++ { + DebugPrintf(2, "Now launching the brand new code\n"); + fflush(stdout); +- + if (IspEnvironment->HalfDuplex == 0) + sprintf(tmpString, "G %ld A\r\n", IspEnvironment->StartAddress); + else + sprintf(tmpString, "G %ld A\n", IspEnvironment->StartAddress); +- + SendComPort(IspEnvironment, tmpString); //goto 0 : run this fresh new downloaded code code ++ + if (IspEnvironment->BinaryOffset < LPC_RAMSTART) + { // Skip response on G command - show response on Terminal instead + ReceiveComPort(IspEnvironment, Answer, sizeof(Answer)-1, &realsize, 2, 5000); +@@ -1099,6 +1100,7 @@ + return (FAILED_RUN + GetAndReportErrorNumber(Answer)); + } + } ++ } + + fflush(stdout); + } +Only in lpc21isp-Linux/: lpcprog.c.orig +diff -rub lpc21isp-1.60/Makefile lpc21isp-Linux//Makefile +--- lpc21isp-1.60/Makefile 2008-04-07 00:23:00.000000000 -0600 ++++ lpc21isp-Linux//Makefile 2008-09-16 09:23:02.000000000 -0600 +@@ -3,9 +3,9 @@ + GLOBAL_DEP = adprog.h lpc21isp.h lpcprog.h lpcterm.h + CC = gcc + +-ifneq ($findstring("freebsd", $(OSTYPE)),"") +-CFLAGS+=-D__FREEBSD__ +-endif ++#ifneq ($findstring("freebsd", $(OSTYPE)),"") ++#CFLAGS+=-D__FREEBSD__ ++#endif + + adprog.o: adprog.c $(GLOBAL_DEP) + $(CC) $(CDEBUG) $(CFLAGS) -c -o adprog.o adprog.c +@@ -21,3 +21,4 @@ + + clean: + $(RM) adprog.o lpcprog.o lpcterm.o lpc21isp ++ $(RM) *~ diff --git a/configs/mcu123-lpc214x/nsh/Make.defs b/configs/mcu123-lpc214x/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..35984af465b8035330edbe62b23a3b447d3330c5 --- /dev/null +++ b/configs/mcu123-lpc214x/nsh/Make.defs @@ -0,0 +1,125 @@ +############################################################################## +# configs/mcu123-lpc214x/nsh/Make.defs +# +# Copyright (C) 2008-2009, 2011, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(ARCHCCMAJOR),4) +ifneq ($(HOSTOS),Cygwin) + OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment +endif +endif + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/mcu123-lpc214x/nsh/defconfig b/configs/mcu123-lpc214x/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ba8ec854ec2610e489dfe7e23e6d1b6bb3f8bdda --- /dev/null +++ b/configs/mcu123-lpc214x/nsh/defconfig @@ -0,0 +1,784 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +CONFIG_ARCH_CHIP_LPC214X=y +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="lpc214x" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +CONFIG_ARM_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARM_OABI_TOOLCHAIN is not set + +# +# LPC214x Configuration Options +# +CONFIG_ARCH_CHIP_LPC2148=y + +# +# LPC214x Initialization Options +# +# CONFIG_EXTMEM_MODE is not set +# CONFIG_RAM_MODE is not set +CONFIG_DEFAULT_MODE=y +CONFIG_CODE_BASE=0x00000000 +CONFIG_PLL_SETUP=y +CONFIG_MAM_SETUP=y +CONFIG_APBDIV_SETUP=y +CONFIG_APBDIV_VALUE=1 +# CONFIG_EMC_SETUP is not set +# CONFIG_BCFG0_SETUP is not set +# CONFIG_BCFG1_SETUP is not set +# CONFIG_BCFG2_SETUP is not set +# CONFIG_BCFG3_SETUP is not set +CONFIG_ADC_SETUP=y + +# +# LPC214x Peripheral Support +# +CONFIG_LPC214X_UART0=y +CONFIG_LPC214X_UART1=y +# CONFIG_LPC214x_FIO is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=3270 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x40000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_MCU123_LPC214X=y +# CONFIG_ARCH_BOARD_ZP214XPA is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mcu123-lpc214x" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=1 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=38400 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=38400 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mcu123-lpc214x/nsh/setenv.sh b/configs/mcu123-lpc214x/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..bfd6a39cf26592d39ce7bab802008dcb6057941d --- /dev/null +++ b/configs/mcu123-lpc214x/nsh/setenv.sh @@ -0,0 +1,73 @@ +#!/bin/bash +############################################################################## +# configs/mcu123-lpc2148/nsh/setenv.sh +# +# Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mcu123-lpc214x/scripts/ld.script b/configs/mcu123-lpc214x/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..bc025dfb7f42550545b16935fd195163a025cd42 --- /dev/null +++ b/configs/mcu123-lpc214x/scripts/ld.script @@ -0,0 +1,120 @@ +/**************************************************************************** + * configs/mcu123-lpc214x/scripts/ld.script + * + * Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* FLASH: + * The lpc2148 has 512Kb of non-volatile memory beginning at address + * 0x0000:0000. The OS entry point is via the reset vector at address + * 0x0000:0000 (default MEMMAP mode assumed) + * + * SRAM: + * The lpc2148 has 32Kb of on-chip static RAM beginning at address + * 0x4000:0000. The .data section will be relocated from _eronly + * to _sdata at boot time. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 500K + sram (rw) : ORIGIN = 0x40000000, LENGTH = 32K - 32 +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/mcu123-lpc214x/scripts/lpc21isp.sh b/configs/mcu123-lpc214x/scripts/lpc21isp.sh new file mode 100644 index 0000000000000000000000000000000000000000..6dae9b704e7f013ad02365d6673e6eef595e9f99 --- /dev/null +++ b/configs/mcu123-lpc214x/scripts/lpc21isp.sh @@ -0,0 +1,65 @@ +#!/bin/sh +############################################################################# +# configs/mcu123-lpc214x/lpc21isp.sh +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################# +#set -x + +# The path to the built lpc21isp binary + +lpc21isp=../lpc2148/lpc21isp/lpc21isp + +# lpc21ips options + +options="-bin -control -verify" + +# The path to the NuttX raw binary format binary + +hxfile=nuttx.bin + +# The TTY to use for the download + +tty=/dev/ttyS0 + +# The BAUD rate supported by the lpc214x board + +baud=38400 + +# The LPC214X crystal frequency in KHz + +osckhz=12000 + +# Do it! + +sudo $lpc21isp $options $hxfile $tty $baud $osckhz + diff --git a/configs/mcu123-lpc214x/src/.gitignore b/configs/mcu123-lpc214x/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/mcu123-lpc214x/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/mcu123-lpc214x/src/Makefile b/configs/mcu123-lpc214x/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..1161d5e5bffc1693a1c10eefd1ca2c22d632e608 --- /dev/null +++ b/configs/mcu123-lpc214x/src/Makefile @@ -0,0 +1,53 @@ +############################################################################ +# configs/mcu123-lpc214x/src/Makefile +# +# Copyright (C) 2007-2010, 2012, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc2148_spi1.c lpc2148_leds.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc2148_appinit.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += lpc2148_usbmsc.c +endif + +ifeq ($(CONFIG_USBDEV_COMPOSITE),y) +CSRCS += lpc2148_composite.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/mcu123-lpc214x/src/lpc2148_appinit.c b/configs/mcu123-lpc214x/src/lpc2148_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..6437d12bf57e034bf301a9d97a39ede82cc05d5e --- /dev/null +++ b/configs/mcu123-lpc214x/src/lpc2148_appinit.c @@ -0,0 +1,153 @@ +/**************************************************************************** + * config/mcu123-lpc214x/src/lpc2148_appinit.c + * + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "lpc214x_spi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#define HAVE_USBDEV 1 +#define HAVE_MMCSD 1 + +/* PORT and SLOT number depend on the board configuration */ + +#ifdef CONFIG_NSH_ARCHINIT +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 1 +# error "The LPC214x MMC/SD is on SPI1" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 1 +# endif + +# if !defined(CONFIG_NSH_MMCSDSLOTNO) || CONFIG_NSH_MMCSDSLOTNO != 0 +# error "The LPC214x MMC/SD is on SPI1" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif + +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif + +#else +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 1 +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# undef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef HAVE_MMCSD +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef HAVE_MMCSD + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + spi = lpc214x_spibus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + syslog(LOG_INFO, "Binding SPI port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, CONFIG_NSH_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfuly bound SPI port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); +#endif + + return OK; +} diff --git a/configs/mcu123-lpc214x/src/lpc2148_composite.c b/configs/mcu123-lpc214x/src/lpc2148_composite.c new file mode 100644 index 0000000000000000000000000000000000000000..995fc4234f4f44db82949c3bac75bd14eafdef84 --- /dev/null +++ b/configs/mcu123-lpc214x/src/lpc2148_composite.c @@ -0,0 +1,132 @@ +/**************************************************************************** + * configs/mcu123-lpc214x/src/lpc2148_composite.c + * + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the LPC214x MMC/SD SPI block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "lpc214x_spi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_COMPOSITE_DEVMINOR1 +# define CONFIG_SYSTEM_COMPOSITE_DEVMINOR1 0 +#endif + +/* PORT and SLOT number depend on the board configuration */ + +#define LPC214X_MMCSDSPIPORTNO 1 +#define LPC214X_MMCSDSLOTNO 0 + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_composite_initialize + * + * Description: + * Perform architecture specific initialization of a composite USB device. + * + ****************************************************************************/ + +int board_composite_initialize(int port) +{ + /* If system/composite is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see lpc2148_appinit.c). + * In this case, there is nothing further to be done here. + * + * NOTE: CONFIG_NSH_BUILTIN_APPS is not a fool-proof indication that NSH + * was built. + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", LPC214X_MMCSDSPIPORTNO); + + spi = lpc214x_spibus_initialize(LPC214X_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + LPC214X_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + LPC214X_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + syslog(LOG_INFO, "Binding SPI port %d to MMC/SD slot %d\n", + LPC214X_MMCSDSPIPORTNO, LPC214X_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(CONFIG_SYSTEM_COMPOSITE_DEVMINOR1, + LPC214X_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + LPC214X_MMCSDSPIPORTNO, LPC214X_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SPI port %d to MMC/SD slot %d\n", + LPC214X_MMCSDSPIPORTNO, LPC214X_MMCSDSLOTNO); + +#endif /* CONFIG_NSH_BUILTIN_APPS */ + + return OK; +} diff --git a/configs/mcu123-lpc214x/src/lpc2148_leds.c b/configs/mcu123-lpc214x/src/lpc2148_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..2256506ab9d76095fbe7e84416fd92db0f3c0b59 --- /dev/null +++ b/configs/mcu123-lpc214x/src/lpc2148_leds.c @@ -0,0 +1,116 @@ +/**************************************************************************** + * configs/mcu123-lpc214x/src/lpc2148_leds.c + * + * Copyright (C) 2007-2009, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* P1.16-P1.23 control LEDS 1-8 */ + +#define LEDBIT(led) (0x00010000 << (led)) +#define ALLLEDS (0x00ff0000) + +#ifdef CONFIG_LPC214x_FIO +# define putled(v,r) putreg32((v),(LPC214X_FIO1_BASE+(r))) +# define CLRLEDS putled(ALLLEDS,LPC214X_FIO_SET_OFFSET) + +# define LED_SET_OFFSET LPC214X_FIO_SET_OFFSET +# define LED_CLR_OFFSET LPC214X_FIO_CLR_OFFSET +# define LED_DIR_OFFSET LPC214X_FIO_DIR_OFFSET + +#else +# define putled(v,r) putreg32((v),(LPC214X_GPIO1_BASE+(r))) +# define CLRLEDS putled(ALLLEDS,LPC214X_GPIO_SET_OFFSET) + +# define LED_SET_OFFSET LPC214X_GPIO_SET_OFFSET +# define LED_CLR_OFFSET LPC214X_GPIO_CLR_OFFSET +# define LED_DIR_OFFSET LPC214X_GPIO_DIR_OFFSET +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Funtions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + /* Initilize GIOs P1.16-P1.23 */ + + putled(ALLLEDS,LED_DIR_OFFSET); + putled(ALLLEDS,LED_SET_OFFSET); + putled(LEDBIT(0),LED_CLR_OFFSET); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + putled(LEDBIT(led),LED_CLR_OFFSET); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + putled(LEDBIT(led),LED_SET_OFFSET); +} +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/mcu123-lpc214x/src/lpc2148_spi1.c b/configs/mcu123-lpc214x/src/lpc2148_spi1.c new file mode 100644 index 0000000000000000000000000000000000000000..4990a6418515c1a2a0dcc7576fd21cfc48e14731 --- /dev/null +++ b/configs/mcu123-lpc214x/src/lpc2148_spi1.c @@ -0,0 +1,610 @@ +/**************************************************************************** + * config/mcu123-lpc214x/src/lpc2148_spi1.c + * + * Copyright (C) 2008-2010, 2012, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * One the mcu123.com lpc214x board, the MMC slot is connect via SPI with the + * following SPI mode pinout: + * + * 1 CS: Chip select (low) - SSEL1 5 SCLK: Clock - SCK1 + * 2 DI: Data input - MOSI1 6 Vss2: Supply Voltage- GRND + * 3 Vss: Supply Voltage - GRND 7 DO: Data Output - MISO1 + * 4 Vdd: Power Supply - Vcc 8 - N/C + * + * The LPC214x supports one SPI port (SPI0) and one SSP port (SPI1). SPI1 + * is used to interface with the MMC connect + * + * SCK1 - pin 47, P0.17/CAP1.2/SCK1/MAT1.2 + * MISO1 - pin 53, P0.18/CAP1.3/MISO1/MAT1.3 + * MOSI1 - pin 54, P0.19/MAT1.2/MOSI1/CAP1.2 + * SSEL1 - pin 55, P0.20/MAT1.3/SSEL1/EINT3 + * + * SPI0 is available on the mcu123.com board (pins 27, 29, 30, and 31). + * Pin 27 is dedicated to a chip select, pins 30 and 31 connect to keys, nd + * pin 29 is unconnected. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "up_internal.h" +#include "up_arch.h" + +#include "chip.h" +#include "lpc214x_power.h" +#include "lpc214x_pinsel.h" +#include "lpc214x_spi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Enables debug output from this file */ + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/* Clocking */ + +#define LPC214X_CCLKFREQ (LPC214X_FOSC*LPC214X_PLL_M) +#define LPC214X_PCLKFREQ (LPC214X_CCLKFREQ/LPC214X_APB_DIV) + +/* Use either FIO or legacy GPIO */ + +#ifdef CONFIG_LPC214x_FIO +# define CS_SET_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_SET_OFFSET) +# define CS_CLR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_CLR_OFFSET) +# define CS_DIR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_DIR_OFFSET) +#else +# define CS_SET_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_SET_OFFSET) +# define CS_CLR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_CLR_OFFSET) +# define CS_DIR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_DIR_OFFSET) +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int spi_lock(FAR struct spi_dev_s *dev, bool lock); +static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency); +static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +#ifdef CONFIG_SPI_CMDDATA +static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd); +#endif +static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t ch); +static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords); +static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct spi_ops_s g_spiops = +{ + .lock = spi_lock, + .select = spi_select, + .setfrequency = spi_setfrequency, + .status = spi_status, +#ifdef CONFIG_SPI_CMDDATA + .cmddata = spi_cmddata, +#endif + .send = spi_send, + .sndblock = spi_sndblock, + .recvblock = spi_recvblock, + .registercallback = 0, /* Not implemented */ +}; + +static struct spi_dev_s g_spidev = {&g_spiops}; +static sem_t g_exclsem = SEM_INITIALIZER(1); /* For mutually exclusive access */ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: spi_lock + * + * Description: + * On SPI busses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the busses for a sequence of + * transfers. The bus should be locked before the chip is selected. After + * locking the SPI bus, the caller should then also call the setfrequency, + * setbits, and setmode methods to make sure that the SPI is properly + * configured for the device. If the SPI buss is being shared, then it + * may have been left in an incompatible state. + * + * Input Parameters: + * dev - Device-specific state data + * lock - true: Lock spi bus, false: unlock SPI bus + * + * Returned Value: + * None + * + ****************************************************************************/ + +static int spi_lock(FAR struct spi_dev_s *dev, bool lock) +{ + if (lock) + { + /* Take the semaphore (perhaps waiting) */ + + while (sem_wait(&g_exclsem) != 0) + { + /* The only case that an error should occur here is if the wait + * was awakened by a signal. + */ + + DEBUGASSERT(errno == EINTR); + } + } + else + { + (void)sem_post(&g_exclsem); + } + + return OK; +} + +/**************************************************************************** + * Name: spi_select + * + * Description: + * Enable/disable the SPI slave select. The implementation of this method + * must include handshaking: If a device is selected, it must hold off + * all other attempts to select the device until the device is deselecte. + * + * Input Parameters: + * dev - Device-specific state data + * devid - Identifies the device to select + * selected - true: slave selected, false: slave de-selected + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + uint32_t bit = 1 << 20; + + if (selected) + { + /* Enable slave select (low enables) */ + + spidbg("CS asserted\n"); + putreg32(bit, CS_CLR_REGISTER); + } + else + { + /* Disable slave select (low enables) */ + + spidbg("CS de-asserted\n"); + putreg32(bit, CS_SET_REGISTER); + + /* Wait for the TX FIFO not full indication */ + + while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF)); + putreg16(0xff, LPC214X_SPI1_DR); + + /* Wait until TX FIFO and TX shift buffer are empty */ + + while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_BSY); + + /* Wait until RX FIFO is not empty */ + + while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE)); + + /* Then read and discard bytes until the RX FIFO is empty */ + + do + { + (void)getreg16(LPC214X_SPI1_DR); + } + while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE); + } +} + +/**************************************************************************** + * Name: spi_setfrequency + * + * Description: + * Set the SPI frequency. + * + * Input Parameters: + * dev - Device-specific state data + * frequency - The SPI frequency requested + * + * Returned Value: + * Returns the actual frequency selected + * + ****************************************************************************/ + +static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency) +{ + uint32_t divisor = LPC214X_PCLKFREQ / frequency; + + if (divisor < 2) + { + divisor = 2; + } + else if (divisor > 254) + { + divisor = 254; + } + + divisor = (divisor + 1) & ~1; + putreg8(divisor, LPC214X_SPI1_CPSR); + + spidbg("Frequency %d->%d\n", frequency, LPC214X_PCLKFREQ / divisor); + return LPC214X_PCLKFREQ / divisor; +} + +/**************************************************************************** + * Name: spi_status + * + * Description: + * Get SPI/MMC status + * + * Input Parameters: + * dev - Device-specific state data + * devid - Identifies the device to report status on + * + * Returned Value: + * Returns a bitset of status values (see SPI_STATUS_* defines + * + ****************************************************************************/ + +static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + /* I don't think there is anyway to determine these things on the mcu123.com + * board. + */ + + spidbg("Return SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} + +/**************************************************************************** + * Name: spi_cmddata + * + * Description: + * Some devices require and additional out-of-band bit to specify if the + * next word sent to the device is a command or data. This is typical, for + * example, in "9-bit" displays where the 9th bit is the CMD/DATA bit. + * This function provides selection of command or data. + * + * This "latches" the CMD/DATA state. It does not have to be called before + * every word is transferred; only when the CMD/DATA state changes. This + * method is required if CONFIG_SPI_CMDDATA is selected in the NuttX + * configuration + * + * Input Parameters: + * dev - Device-specific state data + * cmd - TRUE: The following word is a command; FALSE: the following words + * are data. + * + * Returned Value: + * OK unless an error occurs. Then a negated errno value is returned + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +# error "spi_cmddata not implemented" + return -ENOSYS; +} +#endif + +/**************************************************************************** + * Name: spi_send + * + * Description: + * Exchange one word on SPI + * + * Input Parameters: + * dev - Device-specific state data + * wd - The word to send. the size of the data is determined by the + * number of bits selected for the SPI interface. + * + * Returned Value: + * response + * + ****************************************************************************/ + +static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd) +{ + register uint16_t regval; + + /* Wait while the TX FIFO is full */ + + while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF)); + + /* Write the byte to the TX FIFO */ + + putreg16((uint8_t)wd, LPC214X_SPI1_DR); + + /* Wait for the RX FIFO not empty */ + + while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE)); + + /* Get the value from the RX FIFO and return it */ + + regval = getreg16(LPC214X_SPI1_DR); + spidbg("%04x->%04x\n", wd, regval); + return regval; +} + +/**************************************************************************** + * Name: spi_sndblock + * + * Description: + * Send a block of data on SPI + * + * Input Parameters: + * dev - Device-specific state data + * buffer - A pointer to the buffer of data to be sent + * nwords - the length of data to send from the buffer in number of words. + * The wordsize is determined by the number of bits-per-word + * selected for the SPI interface. If nbits <= 8, the data is + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords) +{ + FAR const uint8_t *ptr = (FAR const uint8_t *)buffer; + uint8_t sr; + + /* Loop while thre are bytes remaining to be sent */ + + spidbg("nwords: %d\n", nwords); + while (nwords > 0) + { + /* While the TX FIFO is not full and there are bytes left to send */ + + while ((getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF) && nwords) + { + /* Send the data */ + + putreg16((uint16_t)*ptr, LPC214X_SPI1_DR); + ptr++; + nwords--; + } + } + + /* Then discard all card responses until the RX & TX FIFOs are emptied. */ + + spidbg("discarding\n"); + do + { + /* Is there anything in the RX fifo? */ + + sr = getreg8(LPC214X_SPI1_SR); + if ((sr & LPC214X_SPI1SR_RNE) != 0) + { + /* Yes.. Read and discard */ + + (void)getreg16(LPC214X_SPI1_DR); + } + + /* There is a race condition where TFE may go true just before + * RNE goes true and this loop terminates prematurely. The nasty little + * delay in the following solves that (it could probably be tuned + * to improve performance). + */ + + else if ((sr & LPC214X_SPI1SR_TFE) != 0) + { + up_udelay(100); + sr = getreg8(LPC214X_SPI1_SR); + } + } + while ((sr & LPC214X_SPI1SR_RNE) != 0 || (sr & LPC214X_SPI1SR_TFE) == 0); +} + +/**************************************************************************** + * Name: spi_recvblock + * + * Description: + * Revice a block of data from SPI + * + * Input Parameters: + * dev - Device-specific state data + * buffer - A pointer to the buffer in which to recieve data + * nwords - the length of data that can be received in the buffer in number + * of words. The wordsize is determined by the number of bits-per-word + * selected for the SPI interface. If nbits <= 8, the data is + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords) +{ + FAR uint8_t *ptr = (FAR uint8_t*)buffer; + uint32_t rxpending = 0; + + /* While there is remaining to be sent (and no synchronization error has occurred) */ + + spidbg("nwords: %d\n", nwords); + while (nwords || rxpending) + { + /* Fill the transmit FIFO with 0xff... + * Write 0xff to the data register while (1) the TX FIFO is + * not full, (2) we have not exceeded the depth of the TX FIFO, + * and (3) there are more bytes to be sent. + */ + + spivdbg("TX: rxpending: %d nwords: %d\n", rxpending, nwords); + while ((getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF) && + (rxpending < LPC214X_SPI1_FIFOSZ) && nwords) + { + putreg16(0xff, LPC214X_SPI1_DR); + nwords--; + rxpending++; + } + + /* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */ + + spivdbg("RX: rxpending: %d\n", rxpending); + while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE) + { + *ptr++ = (uint8_t)getreg16(LPC214X_SPI1_DR); + rxpending--; + } + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc214x_spibus_initialize + * + * Description: + * Initialize the selected SPI port + * + * Input Parameter: + * Port number (for hardware that has mutiple SPI interfaces) + * + * Returned Value: + * Valid SPI device structre reference on succcess; a NULL on failure + * + ****************************************************************************/ + +FAR struct spi_dev_s *lpc214x_spibus_initialize(int port) +{ + uint32_t regval32; + uint8_t regval8; + int i; + + /* Only the SPI1 interface is supported */ + +#ifdef CONFIG_DEBUG + if (port != 1) + { + return NULL; + } +#endif + + /* Configure multiplexed pins as connected on the mcu123.com board: + * + * PINSEL1 P0.17/CAP1.2/SCK1/MAT1.2 Bits 2-3=10 for SCK1 + * PINSEL1 P0.18/CAP1.3/MISO1/MAT1.3 Bits 4-5=10 for MISO1 + * PINSEL1 P0.19/MAT1.2/MOSI1/CAP1.2 Bits 6-7=10 for MOSI1 + * PINSEL1 P0.20/MAT1.3/SSEL1/EINT3 Bits 8-9=10 for P0.20 (we'll control it via GPIO or FIO) + */ + + regval32 = getreg32(LPC214X_PINSEL1); + regval32 &= ~(LPC214X_PINSEL1_P017_MASK|LPC214X_PINSEL1_P018_MASK| + LPC214X_PINSEL1_P019_MASK|LPC214X_PINSEL1_P020_MASK); + regval32 |= (LPC214X_PINSEL1_P017_SCK1|LPC214X_PINSEL1_P018_MISO1| + LPC214X_PINSEL1_P019_MOSI1|LPC214X_PINSEL1_P020_GPIO); + putreg32(regval32, LPC214X_PINSEL1); + + /* Disable chip select using P0.20 (SSEL1) (low enables) */ + + regval32 = 1 << 20; + putreg32(regval32, CS_SET_REGISTER); + regval32 |= getreg32(CS_DIR_REGISTER); + putreg32(regval32, CS_DIR_REGISTER); + + /* Enable peripheral clocking to SPI1 */ + + regval32 = getreg32(LPC214X_PCON_PCONP); + regval32 |= LPC214X_PCONP_PCSPI1; + putreg32(regval32, LPC214X_PCON_PCONP); + + /* Configure 8-bit SPI mode */ + + putreg16(LPC214X_SPI1CR0_DSS8BIT|LPC214X_SPI1CR0_FRFSPI, LPC214X_SPI1_CR0); + + /* Disable the SSP and all interrupts (we'll poll for all data) */ + + putreg8(0, LPC214X_SPI1_CR1); + putreg8(0, LPC214X_SPI1_IMSC); + + /* Set the initial clock frequency for indentification mode < 400kHz */ + + spi_setfrequency(NULL, 400000); + + /* Enable the SPI */ + + regval8 = getreg8(LPC214X_SPI1_CR1); + putreg8(regval8 | LPC214X_SPI1CR1_SSE, LPC214X_SPI1_CR1); + + for (i = 0; i < 8; i++) + { + (void)getreg16(LPC214X_SPI1_DR); + } + + return &g_spidev; +} diff --git a/configs/mcu123-lpc214x/src/lpc2148_usbmsc.c b/configs/mcu123-lpc214x/src/lpc2148_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..b8ca9786d490fe49df2c35cb070868f967047b33 --- /dev/null +++ b/configs/mcu123-lpc214x/src/lpc2148_usbmsc.c @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/mcu123-lpc214x/src/lpc2148_usbmsc.c + * + * Copyright (C) 2008-2010, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the LPC214x MMC/SD SPI block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "lpc214x_spi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_MCU123_LPC214X +# undef LPC214X_MMCSDSPIPORTNO +# define LPC214X_MMCSDSPIPORTNO 1 +# undef LPC214X_MMCSDSLOTNO +# define LPC214X_MMCSDSLOTNO 0 + +#else + /* Add configuration for new LPC214x boards here */ + +# error "Unrecognized LPC214x board" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization of the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", + LPC214X_MMCSDSPIPORTNO); + + spi = lpc214x_spibus_initialize(LPC214X_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + LPC214X_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + LPC214X_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + syslog(LOG_INFO, "Binding SPI port %d to MMC/SD slot %d\n", + LPC214X_MMCSDSPIPORTNO, LPC214X_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1, + LPC214X_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + LPC214X_MMCSDSPIPORTNO, LPC214X_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SPI port %d to MMC/SD slot %d\n", + LPC214X_MMCSDSPIPORTNO, LPC214X_MMCSDSLOTNO); + return OK; +} diff --git a/configs/mcu123-lpc214x/usbmsc/Make.defs b/configs/mcu123-lpc214x/usbmsc/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..09495f17e274a3244afdc91e1fc4ce8e7a66ed29 --- /dev/null +++ b/configs/mcu123-lpc214x/usbmsc/Make.defs @@ -0,0 +1,125 @@ +############################################################################## +# configs/mcu123-lpc214x/usbmsc/Make.defs +# +# Copyright (C) 2008-2009, 2011-2012, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(ARCHCCMAJOR),4) +ifneq ($(HOSTOS),Cygwin) + OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment +endif +endif + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/mcu123-lpc214x/usbmsc/defconfig b/configs/mcu123-lpc214x/usbmsc/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..68b89aa148894cc7e8167055af7e4a4cc1490c20 --- /dev/null +++ b/configs/mcu123-lpc214x/usbmsc/defconfig @@ -0,0 +1,746 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +CONFIG_ARCH_CHIP_LPC214X=y +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="lpc214x" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +CONFIG_ARM_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARM_OABI_TOOLCHAIN is not set + +# +# LPC214x Configuration Options +# +CONFIG_ARCH_CHIP_LPC2148=y + +# +# LPC214x Initialization Options +# +# CONFIG_EXTMEM_MODE is not set +# CONFIG_RAM_MODE is not set +CONFIG_DEFAULT_MODE=y +CONFIG_CODE_BASE=0x00000000 +CONFIG_PLL_SETUP=y +CONFIG_MAM_SETUP=y +CONFIG_APBDIV_SETUP=y +CONFIG_APBDIV_VALUE=1 +# CONFIG_EMC_SETUP is not set +# CONFIG_BCFG0_SETUP is not set +# CONFIG_BCFG1_SETUP is not set +# CONFIG_BCFG2_SETUP is not set +# CONFIG_BCFG3_SETUP is not set +CONFIG_ADC_SETUP=y + +# +# LPC214x Peripheral Support +# +CONFIG_LPC214X_UART0=y +CONFIG_LPC214X_UART1=y +CONFIG_LPC214X_USBDEV=y +# CONFIG_LPC214x_FIO is not set + +# +# LPC214x USB Device Configuration +# +# CONFIG_LPC214X_USBDEV_DMA is not set +# CONFIG_LPC214X_USBDEV_EPFAST_INTERRUPT is not set +# CONFIG_LPC214X_USBDEV_FRAME_INTERRUPT is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ARCH_USBDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=3270 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x40000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_MCU123_LPC214X=y +# CONFIG_ARCH_BOARD_ZP214XPA is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mcu123-lpc214x" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="msconn_main" +CONFIG_RR_INTERVAL=0 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=38400 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=38400 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +CONFIG_USBDEV_TRACE=y +CONFIG_USBDEV_TRACE_NRECORDS=128 +# CONFIG_USBDEV_TRACE_STRINGS is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +CONFIG_USBMSC=y +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=2 +CONFIG_USBMSC_EPBULKIN=5 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=256 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" +CONFIG_USBMSC_VERSIONNO=0x0399 +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=2048 +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +CONFIG_SYSTEM_USBMSC=y +CONFIG_SYSTEM_USBMSC_NLUNS=1 +CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mmcsd0" +CONFIG_SYSTEM_USBMSC_DEVMINOR2=1 +CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_USBMSC_DEVMINOR3=2 +CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" +# CONFIG_SYSTEM_USBMSC_DEBUGMM is not set +# CONFIG_SYSTEM_USBMSC_TRACE is not set +# CONFIG_SYSTEM_USBMONITOR is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mcu123-lpc214x/usbmsc/setenv.sh b/configs/mcu123-lpc214x/usbmsc/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..13be2d1feb2bd8db33fe4ae2a4d2ba273ff9f049 --- /dev/null +++ b/configs/mcu123-lpc214x/usbmsc/setenv.sh @@ -0,0 +1,73 @@ +#!/bin/bash +############################################################################## +# configs/mcu123-lpc214x/usbmsc/setenv.sh +# +# Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mcu123-lpc214x/usbserial/Make.defs b/configs/mcu123-lpc214x/usbserial/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..54c6f3ffe48e7dcef539d685c98103a0047a335b --- /dev/null +++ b/configs/mcu123-lpc214x/usbserial/Make.defs @@ -0,0 +1,125 @@ +############################################################################## +# configs/mcu123-lpc214x/usbserial/Make.defs +# +# Copyright (C) 2008-2009, 2011, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(ARCHCCMAJOR),4) +ifneq ($(HOSTOS),Cygwin) + OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment +endif +endif + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/mcu123-lpc214x/usbserial/defconfig b/configs/mcu123-lpc214x/usbserial/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..bd06293269b1fe49dc1104723b9e47197d701cd1 --- /dev/null +++ b/configs/mcu123-lpc214x/usbserial/defconfig @@ -0,0 +1,765 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +CONFIG_ARCH_CHIP_LPC214X=y +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="lpc214x" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +CONFIG_ARM_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARM_OABI_TOOLCHAIN is not set + +# +# LPC214x Configuration Options +# +CONFIG_ARCH_CHIP_LPC2148=y + +# +# LPC214x Initialization Options +# +# CONFIG_EXTMEM_MODE is not set +# CONFIG_RAM_MODE is not set +CONFIG_DEFAULT_MODE=y +CONFIG_CODE_BASE=0x00000000 +CONFIG_PLL_SETUP=y +CONFIG_MAM_SETUP=y +CONFIG_APBDIV_SETUP=y +CONFIG_APBDIV_VALUE=1 +# CONFIG_EMC_SETUP is not set +# CONFIG_BCFG0_SETUP is not set +# CONFIG_BCFG1_SETUP is not set +# CONFIG_BCFG2_SETUP is not set +# CONFIG_BCFG3_SETUP is not set +CONFIG_ADC_SETUP=y + +# +# LPC214x Peripheral Support +# +CONFIG_LPC214X_UART0=y +CONFIG_LPC214X_UART1=y +CONFIG_LPC214X_USBDEV=y +# CONFIG_LPC214x_FIO is not set + +# +# LPC214x USB Device Configuration +# +# CONFIG_LPC214X_USBDEV_DMA is not set +# CONFIG_LPC214X_USBDEV_EPFAST_INTERRUPT is not set +# CONFIG_LPC214X_USBDEV_FRAME_INTERRUPT is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=3270 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x40000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_MCU123_LPC214X=y +# CONFIG_ARCH_BOARD_ZP214XPA is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mcu123-lpc214x" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="usbserial_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=38400 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=38400 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_UART1_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +CONFIG_PL2303=y +# CONFIG_PL2303_CONSOLE is not set +CONFIG_PL2303_EPINTIN=1 +CONFIG_PL2303_EPBULKOUT=2 +CONFIG_PL2303_EPBULKIN=5 +CONFIG_PL2303_EP0MAXPACKET=64 +CONFIG_PL2303_NWRREQS=4 +CONFIG_PL2303_NRDREQS=4 +CONFIG_PL2303_BULKIN_REQLEN=96 +CONFIG_PL2303_RXBUFSIZE=512 +CONFIG_PL2303_TXBUFSIZE=512 +CONFIG_PL2303_VENDORID=0x067b +CONFIG_PL2303_PRODUCTID=0x2303 +CONFIG_PL2303_VENDORSTR="Nuttx" +CONFIG_PL2303_PRODUCTSTR="USBdev Serial" +# CONFIG_CDCACM is not set +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +CONFIG_EXAMPLES_USBSERIAL=y +CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512 +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mcu123-lpc214x/usbserial/setenv.sh b/configs/mcu123-lpc214x/usbserial/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ebcf4db510fae784b1badcff5f9c5bb3a4e53f5d --- /dev/null +++ b/configs/mcu123-lpc214x/usbserial/setenv.sh @@ -0,0 +1,73 @@ +#!/bin/bash +############################################################################## +# configs/mcu123-lpc214x/usbserial/setenv.sh +# +# Copyright (C) 2008-2009, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/micropendous3/Kconfig b/configs/micropendous3/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/micropendous3/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/micropendous3/README.txt b/configs/micropendous3/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..f270116f31b0f9bc561a82a066c57ba604c3ca12 --- /dev/null +++ b/configs/micropendous3/README.txt @@ -0,0 +1,553 @@ +README +^^^^^ + +This is the README file for the port of NuttX to the Micropendous 3 board. +This board is develepmend by http://code.google.com/p/opendous/. The +Micropendous 3 is based on an Atmel AT90USB646, 647, 1286 or 1287 MCU. +NuttX was ported using the AT90USB647 version. As of this writing, +documentation for the Micropendous board is available here: +http://code.google.com/p/micropendous/wiki/Micropendous3 + +Contents +^^^^^^^^ + + o Micropendous3 Features + o Pin Usage + o Atmel AVRISP mkII Connection + o DFU Bootloader + o Serial Console + o Toolchains + o Windows Native Toolchains + o NuttX buildroot Toolchain + o avr-libc + o Micropendous3 Configuration Options + o Configurations + +Micropendous3 Features +^^^^^^^^^^^^^^^^^^^^^^ + + o Based on the 64-pin USB AVR Microcontrollers: AT90USB646, AT90USB647, + AT90USB1286, or AT90USB1287. + o USB Full Speed (12Mbit/s) + o USB Device Mode (Host mode supported with AT90USBxx7 devices) + o 60kb (AT90USB64) or 120kb (AT90USB128) of available FLASH memory for + your programs (4kb(AT90USB64)/8kb(AT90USB128) used by USB bootloader - + stock Atmel or LUFA) + o 4 kbytes SRAM and 2 kbytes of EEPROM (AT90USB64) or 8 kbytes SRAM and 4 + kbytes of EEPROM (AT90USB128) + o External SRAM is possible. Layout for CY7C1019D 1-Mbit SRAM (unpopulated) + o USB powered + o 16MHz crystal + o 48 General Purpose IO Pins (47 with external SRAM) + o Vcc=VBUS jumper selects whether USB VBUS or an external supply is used + to power the board + o RESET and HWB buttons to enable firmware loading over USB (no external + programmer required) + o HWB can be used as a user button + o USB-A Plug + o JTAG header + o Size LxWxH (including headers): 3.15" x 0.8" x 0.6" =~ 8cm x 2cm x 1.5cm + o Completely OpenHardware Design + +Pin Usage +^^^^^^^^^ + + AT90USB90128/64 TQFP64 + -- ------------------------ --------------------------------------------- + PIN SIGNAL BOARD CONNECTION + -- ------------------------ --------------------------------------------- + (left) + 1 (INT.6/AIN.0) PE6 J3-25 E6, CY7C1019D ^CE (Unpopulated) + 2 (INT.7/AIN.1/UVcon) PE7 J3-26 E7, CY7C1019D A16 (Unpopulated) + 3 UVcc + 4 D- USB DP + 5 D+ USB DM + 6 UGnd GND + 7 UCap GND (via cap) + 8 VBus USB VBUS + 9 (IUID) PE3 J3-22 E3 + 10 (SS/PCINT0) PB0 J3-28 B0 + 11 (PCINT1/SCLK) PB1 J3-29 B1 + 12 (PDI/PCINT2/MOSI) PB2 J3-30 B2 + 13 (PDO/PCINT3/MISO) PB3 J3-31 B3 + 14 (PCINT4/OC.2A) PB4 J3-32 B4 + 15 (PCINT5/OC.1A) PB5 J3-33 B5 + 16 (PCINT6/OC.1B) PB6 J3-34 B6 + (bottom) + 17 (PCINT7/OC.0A/OC.1C) PB7 J3-35 B7 + 18 (INT4/TOSC1) PE4 J3-23 E4 + 19 (INT.5/TOSC2) PE5 J3-24 E5 + 20 RESET SW1 + 21 VCC VCC + 22 GND GND + 23 XTAL2 X1 + 24 XTAL1 X1 + 25 (OC0B/SCL/INT0) PD0 J3-36 D0 + 26 (OC2B/SDA/INT1) PD1 J3-37 D1 + 27 (RXD1/INT2) PD2 J3-38 D2 + 28 (TXD1/INT3) PD3 J3-39 D3 + 29 (ICP1) PD4 J3-40 D4 + 30 (XCK1) PD5 J3-41 D5 + 31 (T1) PD6 J3-42 D6 + 32 (T0) PD7 J3-43 D7 + (right) + 48 PA3 (AD3) J3-14 A3, 74AHC573 D3, CY7C1019D |O3 (Unpopulated) + 47 PA4 (AD4) J3-15 A4, 74AHC573 D4, CY7C1019D |O4 (Unpopulated) + 46 PA5 (AD5) J3-16 A5, 74AHC573 D5, CY7C1019D |O5 (Unpopulated) + 45 PA6 (AD6) J3-17 A6, 74AHC573 D6, CY7C1019D |O6 (Unpopulated) + 44 PA7 (AD7) J3-18 A7, 74AHC573 D7, CY7C1019D |O7 (Unpopulated) + 43 PE2 (ALE/HWB) SW-2 (pulled-up), J3-21 E2, 74AHC573 Cp + 42 PC7 (A15/IC.3/CLKO) J3-51 C7, CY7C1019D A15 (Unpopulated) + 41 PC6 (A14/OC.3A) J3-50 C6, CY7C1019D A14 (Unpopulated) + 40 PC5 (A13/OC.3B) J3-49 C5, CY7C1019D A13 (Unpopulated) + 39 PC4 (A12/OC.3C) J3-48 C4, CY7C1019D A12 (Unpopulated) + 38 PC3 (A11/T.3) J3-47 C3, CY7C1019D A11 (Unpopulated) + 37 PC2 (A10) J3-46 C2, CY7C1019D A10 (Unpopulated) + 36 PC1 (A9) J3-45 C1, CY7C1019D A9 (Unpopulated) + 35 PC0 (A8) J3-44 C0, CY7C1019D A8 (Unpopulated) + 34 PE1 (RD) J3-20 E1, CY7C1019D ^OE (Unpopulated) + 33 PE0 (WR) J3-19 E0, CY7C1019D ^WE (Unpopulated) + (top) + 64 AVCC (Power circuitry) + 63 GND GND + 62 AREF J3-2 AREF, (Power circuitry) + 61 PF0 (ADC0) J3-3 F0 + 60 PF1 (ADC1) J3-4 F1 + 59 PF2 (ADC2) J3-5 F2 + 58 PF3 (ADC3) J3-6 F3 + 57 PF4 (ADC4/TCK) J3-7 F4, JTAG TCK + 56 PF5 (ADC5/TMS) J3-8 F5, JTAG TMS + 55 PF6 (ADC6/TDO) J3-9 F6, JTAG TD0 + 54 PF7 (ADC7/TDI) J3-20 F7, JTAG TDI + 53 GND GND + 52 VCC VCC + 51 PA0 (AD0) J3-11 A0, 74AHC573 D0, CY7C1019D |O0 (Unpopulated) + 50 PA1 (AD1) J3-12 A1, 74AHC573 D1, CY7C1019D |O1 (Unpopulated) + 49 PA2 (AD2) J3-13 A2, 74AHC573 D2, CY7C1019D |O2 (Unpopulated) + +Atmel AVRISP mkII Connection +^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + ISP6PIN Header + -------------- + + 1 2 + MISO o o VCC + SCK o o MOSI + RESET o o GND + + Micropendous 3 JTAG (JTAG10PIN Connector) + ------------------- --------------------- + + 1 2 1 2 + TCK o o GND TCK o o GND + TDO o o VCC TDO o o VTref + TMS o o RESET TMS o o nSRST + VCC o o N/C o o (nTRST) + TDI o o GND TDI o o GND + + JTAGICE mkII Connection to 10-pin Header + ------------------------------------------ + 10PIN Header 6PIN Header + -------------------- --------------------- + Pin 1 TCK Pin 3 SCK + Pin 2 GND Pin 6 GND + Pin 3 TDO Pin 1 MISO + Pin 4 VTref Pin 2 Vcc + Pin 6 nSRT Pin 5 Reset + Pin 9 TDI Pin 4 MOSI + +DFU Bootloader +^^^^^^^^^^^^^^ + +There is also an DFU bootloader that resides in the upper 8Kb of FLASH +(unless you ERASE the flash with with ICE). You can enter this bootloader +(if it is in FLASH) by: + +Holding both the SW1 (RESET) and SW2, then releasing SW1 while continuing +to hold SW2. SW2 connects to the PE2/HWB signal and causes a reset into +the bootloader memory region. + +Then you can use FLIP to load code into FLASH (available at the Atmel Web +Site). The DFU USB driver for the DFU bootload is available in the usb +subdirectory in the FLIP installation location. + +Serial Console +^^^^^^^^^^^^^^ + + A serial console is supported on an external MAX232/MAX3232 Connected + on PD2 and PD3: + + Port D, Bit 2: RXD1, Receive Data (Data input pin for the USART1). When + the USART1 receiver is enabled this pin is configured as an input + regardless of the value of DDD2. When the USART forces this pin to + be an input, the pull-up can still be controlled by the PORTD2 bit. + Port D, Bit 3: TXD1, Transmit Data (Data output pin for the USART1). + When the USART1 Transmitter is enabled, this pin is configured as + an output regardless of the value of DDD3. + + AT90USB90128/64 TQFP64 + -- ------------------------ --------------------------------------------- + PIN SIGNAL BOARD CONNECTION + -- ------------------------ --------------------------------------------- + 27 (RXD1/INT2) PD2 J3-38 D2 + 28 (TXD1/INT3) PD3 J3-39 D3 + +Toolchains +^^^^^^^^^^ + +There are several toolchain options. However, testing has been performed +using *only* the NuttX buildroot toolchain described below. Therefore, +the NuttX buildroot toolchain is the recommended choice. + +The toolchain may be selected using the kconfig-mconf tool (via 'make menuconfig'), +by editing the existing configuration file (defconfig), or by overriding +the toolchain on the make commandline with CONFIG_AVR_TOOLCHAIN=. + +The valid values for are BUILDROOT, CROSSPACK, LINUXGCC and WINAVR. + +Buildroot: + + There is a DIY buildroot version for the AVR boards here: + http://bitbucket.org/nuttx/buildroot/downloads/. See the + following section for details on building this toolchain. + + It is assumed in some places that buildroot toolchain is available + at ../buildroot/build_avr. Edit the setenv.sh file if + this is not the case. + + After configuring NuttX, make sure that CONFIG_AVR_BUILDROOT_TOOLCHAIN=y is set in your + .config file. + +WinAVR: + + For Cygwin development environment on Windows machines, you can use + WinAVR: http://sourceforge.net/projects/winavr/files/ + + It is assumed in some places that WinAVR is installed at C:/WinAVR. Edit the + setenv.sh file if this is not the case. + + After configuring NuttX, make sure that CONFIG_AVR_WINAVR_TOOLCHAIN=y is set in your + .config file. + + WARNING: There is an incompatible version of cygwin.dll in the WinAVR/bin + directory! Make sure that the path to the correct cygwin.dll file precedes + the path to the WinAVR binaries! + +Linux: + + For Linux, there are widely available avr-gcc packages. On Ubuntu, use: + sudo apt-get install gcc-avr gdb-avr avr-libc + + After configuring NuttX, make sure that CONFIG_AVR_LINUXGCC_TOOLCHAIN=y is set in your + .config file. + +Mac OS X: + + For Mac OS X, the CrossPack for AVR toolchain is available from: + + http://www.obdev.at/products/crosspack/index.html + + This toolchain is functionally equivalent to the Linux GCC toolchain. + +Windows Native Toolchains +^^^^^^^^^^^^^^^^^^^^^^^^^ + + The WinAVR toolchain is a Windows native toolchain. There are several + limitations to using a Windows native toolchain in a Cygwin environment. + The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' + utility but you might easily find some new path problems. If so, check + out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic + links are used in Nuttx (e.g., include/arch). The make system works + around these problems for the Windows tools by copying directories + instead of linking them. But this can also cause some confusion for + you: For example, you may edit a file in a "linked" directory and find + that your changes had no effect. That is because you are building the + copy of the file in the "fake" symbolic directory. If you use a + Windows toolchain, you should get in the habit of making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + An additional issue with the WinAVR toolchain, in particular, is that it + contains an incompatible version of the Cygwin DLL in its bin/ directory. + You must take care that the correct Cygwin DLL is used. + +NuttX buildroot Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^ + + If NuttX buildroot toolchain source tarball cne can be downloaded from the + NuttX Bitbucket download site (https://bitbucket.org/nuttx/nuttx/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh micropendous3/ + + NOTE: you also must copy avr-libc header files into the NuttX include + directory with command perhaps like: + + cp -a /cygdrive/c/WinAVR/include/avr include/. + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/avr-defconfig-4.5.2 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you + are building a toolchain for Cygwin under Windows. + +avr-libc +^^^^^^^^ + +Header Files + + In any case, header files from avr-libc are required: http://www.nongnu.org/avr-libc/. + A snapshot of avr-lib is included in the WinAVR installation. For Linux + development platforms, avr-libc package is readily available (and would + be installed in the apt-get command shown above). But if you are using + the NuttX buildroot configuration on Cygwin, then you will have to build + get avr-libc from binaries. + +Header File Installation + + The NuttX build will required that the AVR header files be available via + the NuttX include directory. This can be accomplished by either copying + the avr-libc header files into the NuttX include directory: + + cp -a /include/avr /include/. + + Or simply using a symbolic link: + + ln -s /include/avr /include/. + +Build Notes: + + It may not necessary to have a built version of avr-lib; only header files + are required. Bu if you choose to use the optimized libraru functions of + the flowing point library, then you may have to build avr-lib from sources. + Below are instructions for building avr-lib from fresh sources: + + 1. Download the avr-libc package from: + + http://savannah.nongnu.org/projects/avr-libc/ + + I am using avr-lib-1.7.1.tar.bz2 + + 2. Upack the tarball and cd into the + + tar jxf avr-lib-1.7.1.tar.bz2 + cd avr-lib-1.7.1 + + 3. Configure avr-lib. Assuming that WinAVR is installed at the following + location: + + export PATH=/cygdrive/c/WinAVR/bin:$PATH + ./configure --build=`./config.guess` --host=avr + + This takes a *long* time. + + 4. Make avr-lib. + + make + + This also takes a long time because it generates variants for nearly + all AVR chips. + + 5. Install avr-lib. + + make install + +Micropendous3 Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=avr + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_AVR=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CHIP_AT90USB=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=at90usb + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip. This should be exactly one of + + CONFIG_ARCH_CHIP_AT90USB646=y + CONFIG_ARCH_CHIP_AT90USB647=y + CONFIG_ARCH_CHIP_AT90USB1286=y + CONFIG_ARCH_CHIP_AT90USB1287=y + + Depending on which Micropendous3 version you have. + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=micropendous3 + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_MICROPENOUS3=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM. One of: + + CONFIG_RAM_SIZE=(4*1024) - (4Kb) + CONFIG_RAM_SIZE=(8*1024) - (8Kb) + + CONFIG_RAM_START - The start address of installed SRAM + + CONFIG_RAM_START=0x800100 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_AVR_INT0=n + CONFIG_AVR_INT1=n + CONFIG_AVR_INT2=n + CONFIG_AVR_INT3=n + CONFIG_AVR_INT4=n + CONFIG_AVR_INT5=n + CONFIG_AVR_INT6=n + CONFIG_AVR_INT7=n + CONFIG_AVR_USBHOST=n + CONFIG_AVR_USBDEV=n + CONFIG_AVR_WDT=n + CONFIG_AVR_TIMER0=n + CONFIG_AVR_TIMER1=n + CONFIG_AVR_TIMER2=n + CONFIG_AVR_TIMER3=n + CONFIG_AVR_SPI=n + CONFIG_AVR_USART1=y + CONFIG_AVR_ANACOMP=n + CONFIG_AVR_ADC=n + CONFIG_AVR_TWI=n + + If the watchdog is enabled, this specifies the initial timeout. Default + is maximum supported value. + + CONFIG_WDTO_15MS + CONFIG_WDTO_30MS + CONFIG_WDTO_60MS + CONFIG_WDTO_120MS + CONFIG_WDTO_1250MS + CONFIG_WDTO_500MS + CONFIG_WDTO_1S + CONFIG_WDTO_2S + CONFIG_WDTO_4S + CONFIG_WDTO_8S + + AT90USB specific device driver settings + + CONFIG_USARTn_SERIAL_CONSOLE - selects the USARTn for the + console and ttys0 (default is no serial console). + CONFIG_USARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_USARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_USARTn_BAUD - The configure BAUD of the USART. Must be + CONFIG_USARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_USARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_USARTn_2STOP - Two stop bits + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. Each Micropendous3 configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh micropendous3/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + NOTE: You must also copy avr-libc header files, perhaps like: + + cp -a /cygdrive/c/WinAVR/include/avr include/. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume the NuttX Buildroot toolchain + under Cygwin with Windows. This is easily reconfigured: + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_AVR_BUILDROOT_TOOLCHAIN=y + +Configuration Sub-Directories +----------------------------- + + hello: + The simple apps/examples/hello "Hello, World!" example. + + FLASH/SRAM Requirements (as of 6/16/2011): + + $ avr-nuttx-elf-size nuttx + text data bss dec hex filename + 24816 978 308 26102 65f6 nuttx + + Strings are in SRAM. diff --git a/configs/micropendous3/hello/Make.defs b/configs/micropendous3/hello/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..3319e5ddf08ce17db8b08c6ff36bce7a7979a1a7 --- /dev/null +++ b/configs/micropendous3/hello/Make.defs @@ -0,0 +1,99 @@ +############################################################################ +# configs/micropendous3/hello/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/avr/src/avr/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = $(ARCHINCLUDES) "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/hello/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem "$(TOPDIR)/include" + ARCHXXINCLUDES = $(ARCHINCLUDES) -isystem "$(TOPDIR)/include/cxx" + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/hello/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/micropendous3/hello/defconfig b/configs/micropendous3/hello/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..688b012fc2d807e845a027f3fb6637d3b6b14582 --- /dev/null +++ b/configs/micropendous3/hello/defconfig @@ -0,0 +1,583 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +CONFIG_ARCH_AVR=y +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="avr" +CONFIG_ARCH_FAMILY="avr" +CONFIG_ARCH_CHIP="at90usb" +# CONFIG_ARCH_CHIP_ATMEGA128 is not set +# CONFIG_ARCH_CHIP_AT90USB646 is not set +CONFIG_ARCH_CHIP_AT90USB647=y +# CONFIG_ARCH_CHIP_AT90USB1286 is not set +# CONFIG_ARCH_CHIP_AT90USB1287 is not set +# CONFIG_ARCH_CHIP_AT32UC3B0256 is not set +CONFIG_ARCH_FAMILY_AVR=y +CONFIG_ARCH_CHIP_AT90USB=y + +# +# AVR Configuration Options +# +# CONFIG_AVR_WINAVR_TOOLCHAIN is not set +CONFIG_AVR_BUILDROOT_TOOLCHAIN=y + +# +# AT90USB Configuration Options +# + +# +# AT90USB Peripheral Selections +# +# CONFIG_AVR_SPI is not set +CONFIG_AVR_USART1=y +# CONFIG_AVR_USBDEV is not set +# CONFIG_AVR_WDT is not set +# CONFIG_AVR_GPIOIRQ is not set +# CONFIG_AVR_USART0 is not set + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=864 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x800100 +CONFIG_RAM_SIZE=4096 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_MICROPENDOUS3=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="micropendous3" + +# +# Common Board Options +# + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=16 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="hello_main" +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=4 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=4 +CONFIG_NFILE_STREAMS=4 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=512 +CONFIG_USERMAIN_STACKSIZE=512 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_USART1=y + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=38400 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/micropendous3/hello/ld.script b/configs/micropendous3/hello/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..1a0c4b3f467e36ebee36de9c071fe9f1b0669213 --- /dev/null +++ b/configs/micropendous3/hello/ld.script @@ -0,0 +1,211 @@ +/************************************************************************************** + * configs/micropendous3/hello/ld.script + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************/ + +/* Memory Regions *********************************************************************/ +/* -------------- ------ ------+------- -- ------ -- ------ --- ------ ----+------- --- + * FLASH | REGISTERS I/O EXT I/O ISRAM | EEPROM + * | REGISTERS REGISTERS | + * -------------- ------ ------+------- -- ------ -- ------ --- ------ ----+------- --- + * AT90USB646/7 0x0000 64Kb | 0x0000 32 0x0020 64 0x0060 160 0x0100 4Kb | 0x0000 2Kb + * AT90USB1286/7 0x0000 128Kb | 0x0000 32 0x0020 64 0x0060 160 0x0100 8Kb | 0x0000 4Kb + * -------------- ------ ------+------- -- ------ -- ------ --- ------ ----+------- --- + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0, LENGTH = 128K + sram (rw!x) : ORIGIN = 0x800100, LENGTH = 8K + eeprom (rw!x) : ORIGIN = 0x810000, LENGTH = 4K +} + +OUTPUT_FORMAT("elf32-avr","elf32-avr","elf32-avr") +OUTPUT_ARCH(avr:5) +ENTRY(__start) + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + + .rel.text : + { + *(.rel.text) + *(.rel.text.*) + *(.rel.gnu.linkonce.t*) + } + + .rela.text : + { + *(.rela.text) + *(.rela.text.*) + *(.rela.gnu.linkonce.t*) + } + + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + + .rel.rodata : + { + *(.rel.rodata) + *(.rel.rodata.*) + *(.rel.gnu.linkonce.r*) + } + + .rela.rodata : + { + *(.rela.rodata) + *(.rela.rodata.*) + *(.rela.gnu.linkonce.r*) + } + + .rel.data : + { + *(.rel.data) + *(.rel.data.*) + *(.rel.gnu.linkonce.d*) + } + + .rela.data : + { + *(.rela.data) + *(.rela.data.*) + *(.rela.gnu.linkonce.d*) + } + + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + + .text : + { + _stext = . ; + *(.vectors) + *(.init) + *(.handlers) + *(.text) + *(.text.*) + _etext = . ; + } > flash + + _eronly = ABSOLUTE(.); + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : + { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Global data not cleared after reset. */ + + .noinit : + { + _snoinit = ABSOLUTE(.); + *(.noinit*) + _enoinit = ABSOLUTE(.); + } > sram + + .eeprom : + { + _seeprom = ABSOLUTE(.); + *(.eeprom*) + _eeeprom = ABSOLUTE(.); + } > eeprom + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } +} diff --git a/configs/micropendous3/hello/setenv.sh b/configs/micropendous3/hello/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..1a5f762a3e86e6d72291bfcb45ba79cf43ebd7ab --- /dev/null +++ b/configs/micropendous3/hello/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/micropendous3/hello/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the WinAVR +# toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install the Linux AVR toolchain as well +#export TOOLCHAIN_BIN="/cygdrive/c/WinAVR/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_avr/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/micropendous3/include/board.h b/configs/micropendous3/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..caff4527503a781ab6a6d1574c5ceb6d5d26e9f6 --- /dev/null +++ b/configs/micropendous3/include/board.h @@ -0,0 +1,101 @@ +/**************************************************************************** + * configs/micropendous3/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MICROPENDOUS3_INCLUDE_BOARD_H +#define __CONFIGS_MICROPENDOUS3_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Clocking *****************************************************************/ +/* Assume default CLKDIV8 fuse setting is overridden to CLKDIV1 */ + +#define BOARD_XTAL_FREQ 16000000 /* 16MHz crystal */ +#define BOARD_CPU_CLOCK BOARD_XTAL_FREQ /* F_CPU = 16MHz */ + +/* LED definitions **********************************************************/ +/* The Micropendous 3 has no on-board LEDs */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/* Button definitions *******************************************************/ +/* SW1 = Connects to AT90USBxx RESET pin and is not available to software. + * SW2 = Connects (via a pull-up) to PE-2 + */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MICROPENDOUS3_INCLUDE_BOARD_H */ diff --git a/configs/micropendous3/src/.gitignore b/configs/micropendous3/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/micropendous3/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/micropendous3/src/Makefile b/configs/micropendous3/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..e8027c9f1fe96e02c1fe5abeb726d011f4c54821 --- /dev/null +++ b/configs/micropendous3/src/Makefile @@ -0,0 +1,45 @@ +############################################################################ +# configs/micropendous3/src/Makefile +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = at90usb_boot.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += at90usb_leds.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/micropendous3/src/at90usb_boot.c b/configs/micropendous3/src/at90usb_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..e4a0a277c98481e5eb005809cd1a169d34dd99fa --- /dev/null +++ b/configs/micropendous3/src/at90usb_boot.c @@ -0,0 +1,92 @@ +/************************************************************************************ + * configs/micropendous3/src/at90usb_boot.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "at90usb.h" +#include "micropendous3.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: at90usb_boardinitialize + * + * Description: + * All AT90USB architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void at90usb_boardinitialize(void) +{ + /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak + * function at90usb_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_AVR_SPI1) || defined(CONFIG_AVR_SPI2) + if (at90usb_spidev_initialize) + { + at90usb_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + at90usb_led_initialize(); +#endif +} diff --git a/configs/micropendous3/src/micropendous3.h b/configs/micropendous3/src/micropendous3.h new file mode 100644 index 0000000000000000000000000000000000000000..6d8b963103628a0b86d07f93954c2d826500d20d --- /dev/null +++ b/configs/micropendous3/src/micropendous3.h @@ -0,0 +1,101 @@ +/**************************************************************************** + * configs/micropendous3/src/micropendous3.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MICROPENDOUS3_SRC_MICROPENDOUS3_H +#define __CONFIGS_MICROPENDOUS3_SRC_MICROPENDOUS3_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Name: at90usb_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Micropendous3 board. + * + ************************************************************************************/ + +#if defined(CONFIG_AVR_SPI1) || defined(CONFIG_AVR_SPI2) +EXTERN void weak_function at90usb_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: at90usb_led_initialize + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +EXTERN void at90usb_led_initialize(void); +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MICROPENDOUS3_SRC_MICROPENDOUS3_H */ diff --git a/configs/mikroe-stm32f4/Kconfig b/configs/mikroe-stm32f4/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..836f13cf2b11e11f2b13a3647074fed740066013 --- /dev/null +++ b/configs/mikroe-stm32f4/Kconfig @@ -0,0 +1,114 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_MIKROE_STM32F4 + +config MIKROE_FLASH + bool "MTD driver for onboard 1M FLASH" + default n + select MTD + select MTD_M25P + select MTD_SMART + select FS_SMARTFS + select STM32_SPI3 + select MTD_BYTE_WRITE + ---help--- + Configures an MTD device for use with the onboard flash + +config MIKROE_FLASH_MINOR + int "Minor number for the FLASH /dev/smart entry" + default 0 + depends on MIKROE_FLASH + ---help--- + Sets the minor number for the FLASH MTD /dev entry + +config MIKROE_FLASH_PART + bool "Enable partition support on FLASH" + default n + depends on MIKROE_FLASH + ---help--- + Enables creation of partitions on the FLASH + +config MIKROE_FLASH_CONFIG_PART + bool "Create application config data partition on FLASH" + default y + depends on MIKROE_FLASH_PART + depends on PLATFORM_CONFIGDATA + ---help--- + Enables creation of a /dev/config partition on the FLASH + +config MIKROE_FLASH_CONFIG_PART_NUMBER + int "Index number of config partition (in list below)" + default 0 + depends on MIKROE_FLASH_CONFIG_PART + ---help--- + Specifies the index number of the config data partition + from the partition list. + +config MIKROE_FLASH_PART_LIST + string "Flash partition size list" + default "8,248,768" + depends on MIKROE_FLASH_PART + ---help--- + Comma separated list of partition sizes in KB. + +config MIKROE_RAMMTD + bool "MTD driver for SMARTFS RAM disk" + default n + select MTD + select RAMMTD + ---help--- + Configures an MTD based RAM device for use with SMARTFS. + +config MIKROE_RAMMTD_MINOR + int "Minor number for RAM /dev/smart entry" + default 1 + depends on MIKROE_RAMMTD + ---help--- + Sets the minor number for the RAM MTD /dev entry + +config MIKROE_RAMMTD_SIZE + int "Size in KB of the RAM device to create" + default 32 + depends on MIKROE_RAMMTD + ---help--- + Sets the size of static RAM allocation for the SMART RAM device + +config PM_ALARM_SEC + int "PM_STANDBY delay (seconds)" + default 15 + depends on PM && RTC_ALARM + ---help--- + Number of seconds to wait in PM_STANDBY before going to PM_STANDBY mode. + +config PM_ALARM_NSEC + int "PM_STANDBY delay (nanoseconds)" + default 0 + depends on PM && RTC_ALARM + ---help--- + Number of additional nanoseconds to wait in PM_STANDBY before going to PM_STANDBY mode. + +config PM_SLEEP_WAKEUP + bool "PM_SLEEP wake-up alarm" + default n + depends on PM && RTC_ALARM + ---help--- + Wake-up of PM_SLEEP mode after a delay and resume normal operation. + +config PM_SLEEP_WAKEUP_SEC + int "PM_SLEEP delay (seconds)" + default 10 + depends on PM && RTC_ALARM + ---help--- + Number of seconds to wait in PM_SLEEP before going to PM_STANDBY mode. + +config PM_SLEEP_WAKEUP_NSEC + int "PM_SLEEP delay (nanoseconds)" + default 0 + depends on PM && RTC_ALARM + ---help--- + Number of additional nanoseconds to wait in PM_SLEEP before going to PM_STANDBY mode. + +endif diff --git a/configs/mikroe-stm32f4/README.txt b/configs/mikroe-stm32f4/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..e71797ffb128c6b4299d4ab482c196327ea48848 --- /dev/null +++ b/configs/mikroe-stm32f4/README.txt @@ -0,0 +1,952 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +MikroElektronika Mikromedia for STM32F4 development board. This is +another board support by NuttX that uses the same STM32F407VGT6 MCU +as does the STM32F4-Discovery board. This board, however, has very +different on-board peripherals than does the STM32F4-Discovery: + + - TFT display with touch panel, + - VS1053 stereo audio codec with headphone jack, + - SD card slot, + - Serial FLASH memory, + - USB OTG FS with micro-AB connector, and + - Battery connect and batter charger circuit. + +See the http://www.mikroe.com/mikromedia/stm32-m4/ for more information +about this board. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - LEDs + - PWM + - UARTs + - Timer Inputs/Outputs + - FPU + - FSMC SRAM + - SSD1289 + - Mikroe-STM32F4-specific Configuration Options + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, or + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the CodeSourcery toolchain for Linux. To use + the Atollic, devkitARM, Raisonance GNU, or NuttX buildroot toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh mikroe-stm32f4/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh mikroe-stm32f4/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +==== + +The Mikroe-STM32F4 board has no user accessible LEDs onboard, only a power +and "charging" LED. All visual user output must be performed through the TFT +display. + +External LEDs could be added via the expansion headers on the side of the +board, but as this would be a custom configuration, LEDs are not supported +in this port. + +PWM +=== + +The Mikroe-STM32F4 has no real on-board PWM devices, but it does have PWM +pins routed to the expansion I/O headers on the side of the board. + +UARTs +===== + +The Mikroe-STM32F4 board has no onboard RS-232 line driver, however the +expansion I/O header provides access to USART2 on pins PD5/PD6. The port +includes support for USART2 configured as /dev/ttyS0. + +UART/USART PINS +--------------- + +USART2 + RX PD6 + TX PD5 + +Default USART/UART Configuration +-------------------------------- + +USART2 is enabled in all configurations (see */defconfig). RX and TX are +configured on pins PD6 and PD5, respectively (see include/board.h). + + +Timer Inputs/Outputs +==================== + +TIM1 + CH1 PA8, PE9 + CH2 PA9*, PE11 + CH3 PA10*, PE13 + CH4 PA11*, PE14 +TIM2 + CH1 PA0*, PA15, PA5* + CH2 PA1, PB3* + CH3 PA2, PB10* + CH4 PA3, PB11 +TIM3 + CH1 PA6*, PB4, PC6 + CH2 PA7*, PB5, PC7* + CH3 PB0, PC8 + CH4 PB1, PC9 +TIM4 + CH1 PB6*, PD12* + CH2 PB7, PD13* + CH3 PB8, PD14* + CH4 PB9*, PD15* +TIM5 + CH1 PA0*, PH10** + CH2 PA1, PH11** + CH3 PA2, PH12** + CH4 PA3, PI0 +TIM8 + CH1 PC6, PI5 + CH2 PC7*, PI6 + CH3 PC8, PI7 + CH4 PC9, PI2 +TIM9 + CH1 PA2, PE5 + CH2 PA3, PE6 +TIM10 + CH1 PB8, PF6 +TIM11 + CH1 PB9*, PF7 +TIM12 + CH1 PH6**, PB14 + CH2 PC15, PH9** +TIM13 + CH1 PA6*, PF8 +TIM14 + CH1 PA7*, PF9 + + * Indicates pins that have other on-board functions and should be used only + with care (See table 5 in the Mikroe-STM32F4 User Guide). The rest are + free I/O pins. +** Port H pins are not supported by the MCU + +FPU +=== + +FPU Configuration Options +------------------------- + +There are two version of the FPU support built into the STM32 port. + +1. Lazy Floating Point Register Save. + + This is an untested implementation that saves and restores FPU registers + only on context switches. This means: (1) floating point registers are + not stored on each context switch and, hence, possibly better interrupt + performance. But, (2) since floating point registers are not saved, + you cannot use floating point operations within interrupt handlers. + + This logic can be enabled by simply adding the following to your .config + file: + + CONFIG_ARCH_FPU=y + +2. Non-Lazy Floating Point Register Save + + Mike Smith has contributed an extensive re-write of the ARMv7-M exception + handling logic. This includes verified support for the FPU. These changes + have not yet been incorporated into the mainline and are still considered + experimental. These FPU logic can be enabled with: + + CONFIG_ARCH_FPU=y + CONFIG_ARMV7M_CMNVECTOR=y + + You will probably also changes to the ld.script in if this option is selected. + This should work: + + -ENTRY(_stext) + +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ + +EXTERN(_vectors) /* Force the vectors to be included in the output */ + +MIO283QT-2/MIO283QT-9A +====================== + +The original Mikroe-SMT32F4 board as an on-board MIO283QT-2 TFT LCD that can +be configured and used. This is a 320x240 resolution display with color +capability to 262K colors, though the mio283qt-2 driver in NuttX only +supports 16-bit color depth, or 65K colors. Changes to both the +mio283qt-2 driver and the driver interface layer would need to be made +to support 24 BPP mode. + +UPDATE: New boards now support a MIO283QT-9A TFT LCD that is not compatible +with the MIO283QT-2. It uses a different LCD controller. The default in +all of these configurations is the MIO283QT-2. But MIO283QT-9A is also +supported and you can switch from the MIO283QT-2 to the MIO283QT-9A by simply +modifying the NuttX configuration + +CFLAGS +------ + +Only recent GCC toolchains have built-in support for the Cortex-M4 FPU. You will see +the following lines in each Make.defs file: + + ifeq ($(CONFIG_ARCH_FPU),y) + ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard + else + ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + endif + +Configuration Changes +--------------------- + +Below are all of the configuration changes that I had to make to configs/stm3240g-eval/nsh2 +in order to successfully build NuttX using the Atollic toolchain WITH FPU support: + + -CONFIG_ARCH_FPU=n : Enable FPU support + +CONFIG_ARCH_FPU=y + + -CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : Disable the CodeSourcery toolchain + +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n + + -CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=n : Enable the Atollic toolchain + +CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : + + -CONFIG_INTELHEX_BINARY=y : Suppress generation FLASH download formats + +CONFIG_INTELHEX_BINARY=n : (Only necessary with the "Lite" version) + + -CONFIG_HAVE_CXX=y : Suppress generation of C++ code + +CONFIG_HAVE_CXX=n : (Only necessary with the "Lite" version) + +See the section above on Toolchains, NOTE 2, for explanations for some of +the configuration settings. Some of the usual settings are just not supported +by the "Lite" version of the Atollic toolchain. + +Mikroe-STM32F4-specific Configuration Options +=============================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32F407VG=y + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=Mikroe-STM32F4 (for the Mikroe-STM32F4 development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP + + In addition to internal SRAM, SRAM may also be available through the FSMC. + In order to use FSMC SRAM, the following additional things need to be + present in the NuttX configuration file: + + CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space (hex) + + CONFIG_HEAP2_SIZE - The size of the SRAM in the FSMC address space (decimal) + + CONFIG_ARCH_FPU - The Mikroe-STM32F4 supports a floating point unit (FPU) + + CONFIG_ARCH_FPU=y + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + AHB1 + ---- + CONFIG_STM32_CRC + CONFIG_STM32_BKPSRAM + CONFIG_STM32_CCMDATARAM + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + CONFIG_STM32_ETHMAC + CONFIG_STM32_OTGHS + + AHB2 + ---- + CONFIG_STM32_DCMI + CONFIG_STM32_CRYP + CONFIG_STM32_HASH + CONFIG_STM32_RNG + CONFIG_STM32_OTGFS + + AHB3 + ---- + CONFIG_STM32_FSMC + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_TIM12 + CONFIG_STM32_TIM13 + CONFIG_STM32_TIM14 + CONFIG_STM32_WWDG + CONFIG_STM32_IWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI3 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_I2C3 + CONFIG_STM32_CAN1 + CONFIG_STM32_CAN2 + CONFIG_STM32_DAC1 + CONFIG_STM32_DAC2 + CONFIG_STM32_PWR -- Required for RTC + + APB2 + ---- + CONFIG_STM32_TIM1 + CONFIG_STM32_TIM8 + CONFIG_STM32_USART1 + CONFIG_STM32_USART6 + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + CONFIG_STM32_ADC3 + CONFIG_STM32_SDIO + CONFIG_STM32_SPI1 + CONFIG_STM32_SYSCFG + CONFIG_STM32_TIM9 + CONFIG_STM32_TIM10 + CONFIG_STM32_TIM11 + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + JTAG Enable settings (by default only SW-DP is enabled): + + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + + Mikroe-STM32F4 specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + Mikroe-STM32F4 CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + + Mikroe-STM32F4 SPI Configuration + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + + Mikroe-STM32F4 DMA Configuration + + CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO + and CONFIG_STM32_DMA2. + CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. + Default: Medium + CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: + 4-bit transfer mode. + + STM32 USB OTG FS Host Driver Support + + Pre-requisites + + CONFIG_USBDEV - Enable USB device support + CONFIG_USBHOST - Enable USB host support + CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block + CONFIG_STM32_SYSCFG - Needed + CONFIG_SCHED_WORKQUEUE - Worker thread support is required + + Options: + + CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. + Default 128 (512 bytes) + CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO + in 32-bit words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit + words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128 + CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever + want to do that? + CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access + debug. Depends on CONFIG_DEBUG. + CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB + packets. Depends on CONFIG_DEBUG. + +Configurations +============== + +Each Mikroe-STM32F4 configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh mikroe-stm32f4/ + cd - + . ./setenv.sh + +If this is a Windows native build, then configure.bat should be used +instead of configure.sh: + + configure.bat Mikroe-STM32F4\ + +Where is one of the following: + + fulldemo + -------- + This is an example that includes an NSH shell over USB that also + enables all features of the Mikroe-STM32F4 board including the LCD, + on-board 1M Flash with SMART filesystem, Aux RS-232 serial port on the + expansion header, etc. A couple of the NX graphics commands are made + available via the NSH prompt for performing LCD demonstrations, and the + nximage example is used as a splash-screen at startup. + + kostest: + ------- + NOTE: This configuration compiles, but has not been fully tested + on the hardware yet. + + This configuration directory, performs a simple OS test using + apps/examples/ostest with NuttX build as a kernel-mode monolithic + module and the user applications are built separately. Is + is recommened to use a special make command; not just 'make' but + make with the following two arguments: + + make pass1 pass2 + + In the normal case (just 'make'), make will attempt to build both user- + and kernel-mode blobs more or less interleaved. This actual works! + However, for me it is very confusing so I prefer the above make command: + Make the user-space binaries first (pass1), then make the kernel-space + binaries (pass2) + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. This is the default platform/toolchain in the configuration: + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + + This is easily changed by modifying the configuration. + + 3. At the end of the build, there will be several files in the top-level + NuttX build directory: + + PASS1: + nuttx_user.elf - The pass1 user-space ELF file + nuttx_user.hex - The pass1 Intel HEX format file (selected in defconfig) + User.map - Symbols in the user-space ELF file + + PASS2: + nuttx - The pass2 kernel-space ELF file + nuttx.hex - The pass2 Intel HEX file (selected in defconfig) + System.map - Symbols in the kernel-space ELF file + + 4. Combining .hex files. If you plan to use the STM32 ST-Link Utility to + load the .hex files into FLASH, then you need to combine the two hex + files into a single .hex file. Here is how you can do that. + + a. The 'tail' of the nuttx.hex file should look something like this + (with my comments added): + + $ tail nuttx.hex + # 00, data records + ... + :10 9DC0 00 01000000000800006400020100001F0004 + :10 9DD0 00 3B005A0078009700B500D400F300110151 + :08 9DE0 00 30014E016D0100008D + # 05, Start Linear Address Record + :04 0000 05 0800 0419 D2 + # 01, End Of File record + :00 0000 01 FF + + Use an editor such as vi to remove the 05 and 01 records. + + b. The 'head' of the nuttx_user.hex file should look something like + this (again with my comments added): + + $ head nuttx_user.hex + # 04, Extended Linear Address Record + :02 0000 04 0801 F1 + # 00, data records + :10 8000 00 BD89 01084C800108C8110208D01102087E + :10 8010 00 0010 00201C1000201C1000203C16002026 + :10 8020 00 4D80 01085D80010869800108ED83010829 + ... + + Nothing needs to be done here. The nuttx_user.hex file should + be fine. + + c. Combine the edited nuttx.hex and un-edited nuttx_user.hex + file to produce a single combined hex file: + + $ cat nuttx.hex nuttx_user.hex >combined.hex + + Then use the combined.hex file with the STM32 ST-Link tool. If + you do this a lot, you will probably want to invest a little time + to develop a tool to automate these steps. + + + nsh + --- + This is an NSH example that uses USART2 as the console. Note that + the Mikroe-STM32F4 board doesn't actually have onboard line drivers + or a connector for USART2, but it does route the USART2 signals to + the expansion header. To use this demo, you would need to connect + an external 3.3V RS-232 line driver to the USART's I/O lines on the + expansion header. + + NOTE: This demo doesn't quite work yet. I can get output to the + USART, but so far, I have not gotten nsh to actually come up. + + + nx + -- + An example using the NuttX graphics system (NX). This example + focuses on general window controls, movement, mouse and keyboard + input. + + CONFIG_LCD_LANDSCAPE=y : 320x240 landscape orientation + CONFIG_LCD_MIO283QT2=y : MIO283QT-2 is the default + + You can the newer MIO283QT-9A by enabling it in the configuration. + + CONFIG_LCD_MIO283QT2=n : Disable the MIO283QT-2 + CONFIG_LCD_MIO283QT9A=y : Enable the MIO283QT-9A + + nxlines: + ------ + An example using the NuttX graphics system (NX). This example focuses on + placing lines on the background in various orientations using the + on-board TFT LCD. + + CONFIG_LCD_LANDSCAPE=y : 320x240 landscape orientation + CONFIG_LCD_MIO283QT2=y : MIO283QT-2 is the default + + You can the newer MIO283QT-9A by enabling it in the configuration. + + CONFIG_LCD_MIO283QT2=n : Disable the MIO283QT-2 + CONFIG_LCD_MIO283QT9A=y : Enable the MIO283QT-9A + + nxtext: + ------ + Another example using the NuttX graphics system (NX). This + example focuses on placing text on the background while pop-up + windows occur. Text should continue to update normally with + or without the popup windows present. + + usbnsh: + ------- + + This is another NSH example. If differs from other 'nsh' configurations + in that this configurations uses a USB serial device for console I/O. + Such a configuration is useful on the stm32f4discovery which has no + builtin RS-232 drivers. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + 3. This configuration does have UART2 output enabled and set up as + the system logging device: + + CONFIG_SYSLOG=y : Enable output to syslog, not console + CONFIG_SYSLOG_CHAR=y : Use a character device for system logging + CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0 + + However, there is nothing to generate SYLOG output in the default + configuration so nothing should appear on UART2 unless you enable + some debug output or enable the USB monitor. + + 4. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB + device will save encoded trace output in in-memory buffer; if the + USB monitor is enabled, that trace buffer will be periodically + emptied and dumped to the system loggin device (UART2 in this + configuraion): + + CONFIG_USBDEV_TRACE=y : Enable USB trace feature + CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory + CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH + CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor + CONFIG_SYSTEM_USBMONITOR=y : Enable the USB monitor daemon + CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size + CONFIG_SYSTEM_USBMONITOR_PRIORITY=50 : USB monitor daemon priority + CONFIG_SYSTEM_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds + + CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y : Enable TRACE output + CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y + CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y + CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y + CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y + + 5. By default, this project assumes that you are *NOT* using the DFU + bootloader. + + Using the Prolifics PL2303 Emulation + ------------------------------------ + You could also use the non-standard PL2303 serial device instead of + the standard CDC/ACM serial device by changing: + + CONFIG_CDCACM=y : Disable the CDC/ACM serial device class + CONFIG_CDCACM_CONSOLE=y : The CDC/ACM serial device is NOT the console + CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled + CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console + diff --git a/configs/mikroe-stm32f4/fulldemo/Make.defs b/configs/mikroe-stm32f4/fulldemo/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6dbe0a0fa380fedbc0578e836eb2eec31b89cc33 --- /dev/null +++ b/configs/mikroe-stm32f4/fulldemo/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/mikroe-stm32f4/usbnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/mikroe-stm32f4/fulldemo/defconfig b/configs/mikroe-stm32f4/fulldemo/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..0475e67b8fa5b2a19f5691dc970ceef19389c70a --- /dev/null +++ b/configs/mikroe-stm32f4/fulldemo/defconfig @@ -0,0 +1,1736 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +CONFIG_STM32_ADC2=y +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +CONFIG_STM32_DMA1=y +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +CONFIG_STM32_OTGFS=y +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +CONFIG_STM32_RNG=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI2=y +CONFIG_STM32_SPI3=y +CONFIG_STM32_SYSCFG=y +CONFIG_STM32_TIM1=y +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_ADC=y +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +CONFIG_STM32_FLASH_PREFETCH=y +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y +# CONFIG_STM32_CCMEXCLUDE is not set +CONFIG_STM32_DMACAPABLE=y +# CONFIG_STM32_TIM1_PWM is not set +# CONFIG_STM32_TIM1_ADC is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set + +# +# ADC Configuration +# +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_USART2_RXDMA is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +CONFIG_STM32_SPI_DMA=y +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_MAGIC_REG=0 +CONFIG_RTC_MAGIC=0xfacefeee +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_STM32F4_DISCOVERY is not set +CONFIG_ARCH_BOARD_MIKROE_STM32F4=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mikroe-stm32f4" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_MIKROE_FLASH=y +CONFIG_MIKROE_FLASH_MINOR=0 +CONFIG_MIKROE_FLASH_PART=y +CONFIG_MIKROE_FLASH_CONFIG_PART=y +CONFIG_MIKROE_FLASH_CONFIG_PART_NUMBER=0 +CONFIG_MIKROE_FLASH_PART_LIST="8,248,768" +# CONFIG_MIKROE_RAMMTD is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +CONFIG_BOARDCTL_TSCTEST=y +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxwm_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=11 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=4 +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=20000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +CONFIG_DEV_LOOP=y + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +CONFIG_RAMDISK=y +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +CONFIG_RTC_ALARM=y +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +CONFIG_AUDIO_DEVICES=y +CONFIG_VS1053=y +CONFIG_VS1053_DEVICE_COUNT=1 +CONFIG_VS1053_WORKER_STACKSIZE=768 +# CONFIG_AUDIO_WM8904 is not set +# CONFIG_AUDIO_NULL is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +# CONFIG_INPUT_MXT is not set +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +CONFIG_LCD_MIO283QT2=y +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=30000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +CONFIG_MTD_PARTITION=y +# CONFIG_MTD_SECT512 is not set +CONFIG_MTD_BYTE_WRITE=y +# CONFIG_MTD_PROGMEM is not set +CONFIG_MTD_CONFIG=y +# CONFIG_MTD_CONFIG_RAM_CONSOLIDATE is not set +CONFIG_MTD_CONFIG_ERASEDVALUE=0xFF + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +CONFIG_RAMMTD=y +CONFIG_RAMMTD_BLOCKSIZE=512 +CONFIG_RAMMTD_ERASESIZE=4096 +CONFIG_RAMMTD_ERASESTATE=0xff +# CONFIG_RAMMTD_FLASHSIM is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +CONFIG_MTD_M25P=y +CONFIG_M25P_SPIMODE=0 +CONFIG_M25P_MANUFACTURER=0x1C +CONFIG_M25P_MEMORY_TYPE=0x31 +CONFIG_M25P_SUBSECTOR_ERASE=y +# CONFIG_MTD_S25FL1 is not set +CONFIG_MTD_SMART=y +# CONFIG_SMART_DEV_LOOP is not set +CONFIG_MTD_SMART_SECTOR_SIZE=512 +CONFIG_MTD_SMART_WEAR_LEVEL=y +# CONFIG_MTD_SMART_CONVERT_WEAR_FORMAT is not set +# CONFIG_MTD_SMART_ENABLE_CRC is not set +# CONFIG_MTD_SMART_MINIMIZE_RAM is not set +# CONFIG_MTD_SMART_SECTOR_ERASE_DEBUG is not set +# CONFIG_MTD_SMART_ALLOC_DEBUG is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +CONFIG_FS_SMARTFS=y +CONFIG_SMARTFS_ERASEDSTATE=0xff +CONFIG_SMARTFS_MAXNAMLEN=16 +# CONFIG_SMARTFS_MULTI_ROOT_DIRS is not set +# CONFIG_SMARTFS_ALIGNED_ACCESS is not set +CONFIG_FS_BINFS=y +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_CHAR=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +# CONFIG_NX_XYINPUT_MOUSE is not set +CONFIG_NX_XYINPUT_TOUCHSCREEN=y +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=3 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0x8410 +CONFIG_NXTK_BORDERCOLOR2=0x4208 +CONFIG_NXTK_BORDERCOLOR3=0xc618 +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +CONFIG_NXFONT_SANS17X23B=y +CONFIG_NXFONT_SANS20X27B=y +CONFIG_NXFONT_SANS22X29B=y +CONFIG_NXFONT_SANS28X37B=y +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +CONFIG_NXFONT_SERIF22X28B=y +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +CONFIG_NXTERM=y + +# +# NxTerm Output Text/Graphics Options +# +CONFIG_NXTERM_BPP=16 +CONFIG_NXTERM_CURSORCHAR=137 +CONFIG_NXTERM_MXCHARS=128 +CONFIG_NXTERM_CACHESIZE=16 +CONFIG_NXTERM_LINESEPARATION=0 +# CONFIG_NXTERM_NOWRAP is not set + +# +# NxTerm Input options +# +# CONFIG_NXTERM_NXKBDIN is not set +CONFIG_NXTERM_KBDBUFSIZE=16 +CONFIG_NXTERM_NPOLLWAITERS=4 + +# +# NX Multi-user only options +# +CONFIG_NX_MULTIUSER=y +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXSERVERMSGS=32 +CONFIG_NX_MXCLIENTMSGS=16 +# CONFIG_NX_NXSTART is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +CONFIG_AUDIO=y +# CONFIG_AUDIO_MULTI_SESSION is not set + +# +# Audio Buffer Configuration +# +# CONFIG_AUDIO_LARGE_BUFFERS is not set +CONFIG_AUDIO_NUM_BUFFERS=2 +CONFIG_AUDIO_BUFFER_NUMBYTES=8192 +# CONFIG_AUDIO_DRIVER_SPECIFIC_BUFFERS is not set + +# +# Supported Audio Formats +# +# CONFIG_AUDIO_FORMAT_AC3 is not set +# CONFIG_AUDIO_FORMAT_DTS is not set +CONFIG_AUDIO_FORMAT_PCM=y +CONFIG_AUDIO_FORMAT_MP3=y +CONFIG_AUDIO_FORMAT_MIDI=y +# CONFIG_AUDIO_FORMAT_WMA is not set +# CONFIG_AUDIO_FORMAT_OGG_VORBIS is not set + +# +# Exclude Specific Audio Features +# +# CONFIG_AUDIO_EXCLUDE_VOLUME is not set +# CONFIG_AUDIO_EXCLUDE_BALANCE is not set +CONFIG_AUDIO_EXCLUDE_EQUALIZER=y +# CONFIG_AUDIO_EXCLUDE_TONE is not set +# CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME is not set +# CONFIG_AUDIO_EXCLUDE_STOP is not set +# CONFIG_AUDIO_EXCLUDE_FFORWARD is not set +CONFIG_AUDIO_EXCLUDE_REWIND=y +# CONFIG_AUDIO_CUSTOM_DEV_PATH is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIBC_STRERROR=y +# CONFIG_LIBC_STRERROR_SHORT is not set +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MTDPART is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=16 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NX_EXTERNINIT is not set + +# +# Multi-User Configuration Options +# +CONFIG_EXAMPLES_NX_STACKSIZE=2048 +CONFIG_EXAMPLES_NX_CLIENTPRIO=100 +CONFIG_EXAMPLES_NX_SERVERPRIO=120 +CONFIG_EXAMPLES_NX_LISTENERPRIO=80 +CONFIG_EXAMPLES_NX_NOTIFYSIGNO=4 +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_FLASH_TEST is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +CONFIG_EXAMPLES_TOUCHSCREEN=y +CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0 +CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0" +# CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE is not set +CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +CONFIG_FSUTILS_MKSMARTFS=y +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LOSMART is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MKSMARTFS is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=0 +CONFIG_NSH_ROMFSSECTSIZE=64 +# CONFIG_NSH_DEFAULTROMFS is not set +CONFIG_NSH_ARCHROMFS=y +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=0 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# +CONFIG_NXWIDGETS=y + +# +# NX Server/Device Configuration +# +CONFIG_NXWIDGETS_FLICKERFREE=y +# CONFIG_NXWIDGETS_EXTERNINIT is not set +CONFIG_NXWIDGETS_DEVNO=0 +CONFIG_NXWIDGET_SERVERINIT=y +CONFIG_NXWIDGETS_SERVERPRIO=110 +CONFIG_NXWIDGETS_SERVERSTACK=2048 +CONFIG_NXWIDGETS_CLIENTPRIO=100 +CONFIG_NXWIDGETS_LISTENERPRIO=100 +CONFIG_NXWIDGETS_LISTENERSTACK=2048 +# CONFIG_NXWIDGET_EVENTWAIT is not set + +# +# NXWidget Configuration +# +CONFIG_NXWIDGETS_BPP=16 +CONFIG_NXWIDGETS_SIZEOFCHAR=1 + +# +# NXWidget Default Values +# +# CONFIG_NXWIDGETS_SYSTEM_CUSTOM_FONTID is not set +CONFIG_NXWIDGETS_TNXARRAY_INITIALSIZE=16 +CONFIG_NXWIDGETS_TNXARRAY_SIZEINCREMENT=8 +# CONFIG_NXWIDGETS_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_TEXTCOLORS is not set +CONFIG_NXWIDGETS_TRANSPARENT_COLOR=0x0 + +# +# Keypad behavior +# +CONFIG_NXWIDGETS_FIRST_REPEAT_TIME=500 +CONFIG_NXWIDGETS_CONTINUE_REPEAT_TIME=200 +CONFIG_NXWIDGETS_DOUBLECLICK_TIME=350 +CONFIG_NXWIDGETS_KBDBUFFER_SIZE=16 +CONFIG_NXWIDGETS_CURSORCONTROL_SIZE=4 +# CONFIG_NXWIDGET_MEMMONITOR is not set +CONFIG_NXWM=y + +# +# NxWM General Settings +# +# CONFIG_NXWM_LARGE_ICONS is not set +# CONFIG_NXWM_CUSTOM_FONTID is not set +CONFIG_NXWM_UNITTEST=y + +# +# Color configuration +# +# CONFIG_NXWM_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWM_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWM_CUSTOM_TEXTCOLORS is not set + +# +# Background Image +# +# CONFIG_NXWM_DISABLE_BACKGROUND_IMAGE is not set +CONFIG_NXWM_BACKGROUND_IMAGE="" + +# +# NxWM Taskbar Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_TASKBAR_VSPACING=2 +CONFIG_NXWM_TASKBAR_HSPACING=2 +# CONFIG_NXWM_TASKBAR_TOP is not set +# CONFIG_NXWM_TASKBAR_BOTTOM is not set +CONFIG_NXWM_TASKBAR_LEFT=y +# CONFIG_NXWM_TASKBAR_RIGHT is not set +# CONFIG_NXWM_CUSTOM_TASKBAR_WIDTH is not set +# CONFIG_NXWM_TASKBAR_ICONSCALE is not set +# CONFIG_NXWM_DISABLE_MINIMIZE is not set +# CONFIG_NXWM_TASKBAR_NO_BORDER is not set + +# +# NxWM Toolbar Configuration +# +# CONFIG_NXWM_CUSTOM_TOOLBAR_HEIGHT is not set +# CONFIG_NXWM_TOOLBAR_CUSTOM_FONTID is not set + +# +# NxWM Application Window Configuration +# +# CONFIG_NXWM_CUSTOM_APPWINDOW_ICONS is not set + +# +# NxWM Start Window Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_STARTWINDOW_VSPACING=4 +CONFIG_NXWM_STARTWINDOW_HSPACING=4 +# CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set +CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm" +CONFIG_NXWM_STARTWINDOW_MXMSGS=32 +CONFIG_NXWM_STARTWINDOW_MXMPRIO=42 +CONFIG_NXWM_STARTWINDOW_PRIO=100 +CONFIG_NXWM_STARTWINDOW_STACKSIZE=2048 + +# +# NxTerm Window Settings +# +CONFIG_NXWM_NXTERM=y +CONFIG_NXWM_NXTERM_PRIO=100 +CONFIG_NXWM_NXTERM_STACKSIZE=2048 +# CONFIG_NXWM_NXTERM_CUSTOM_COLORS is not set +# CONFIG_NXWM_NXTERM_CUSTOM_FONTID is not set +# CONFIG_NXWM_CUSTOM_NXTERM_ICON is not set + +# +# NxWM Touchscreen Configuration +# +CONFIG_NXWM_TOUCHSCREEN=y + +# +# Touchscreen Device Settings +# +CONFIG_NXWM_TOUCHSCREEN_DEVINIT=y +CONFIG_NXWM_TOUCHSCREEN_DEVNO=0 +CONFIG_NXWM_TOUCHSCREEN_DEVPATH="/dev/input0" +CONFIG_NXWM_TOUCHSCREEN_SIGNO=5 +CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=100 +CONFIG_NXWM_TOUCHSCREEN_LISTENERSTACK=1024 +CONFIG_NXWM_TOUCHSCREEN_CONFIGDATA=y + +# +# NxWM Keyboard Configuration +# +CONFIG_NXWM_KEYBOARD=y + +# +# Keyboard Device Settings +# +CONFIG_NXWM_KEYBOARD_DEVPATH="/dev/ttyS0" +# CONFIG_NXWM_KEYBOARD_USBHOST is not set +CONFIG_NXWM_KEYBOARD_SIGNO=6 +CONFIG_NXWM_KEYBOARD_BUFSIZE=16 +CONFIG_NXWM_KEYBOARD_LISTENERPRIO=100 +CONFIG_NXWM_KEYBOARD_LISTENERSTACK=2048 + +# +# NxWM Calibration Display Settings +# +CONFIG_NXWM_CALIBRATION_MARGIN=40 +# CONFIG_NXWM_CALIBRATION_CUSTOM_COLORS is not set +# CONFIG_NXWM_CALIBRATION_MESSAGES is not set +# CONFIG_NXWM_CALIBRATION_ANISOTROPIC is not set +# CONFIG_NXWM_CUSTOM_CALIBRATION_ICON is not set +CONFIG_NXWM_CALIBRATION_SIGNO=5 +CONFIG_NXWM_CALIBRATION_LISTENERPRIO=100 +CONFIG_NXWM_CALIBRATION_LISTENERSTACK=2048 + +# +# NxWM Hex Calculator Display Settings +# +CONFIG_NXWM_HEXCALCULATOR_CUSTOM_COLORS=y +CONFIG_NXWM_HEXCALCULATOR_BACKGROUNDCOLOR=0x39C7 +# CONFIG_NXWM_CUSTOM_HEXCALCULATOR_ICON is not set +# CONFIG_NXWM_HEXCALCULATOR_CUSTOM_FONTID is not set + +# +# NxWM Media Player Display Settings +# +CONFIG_NXWM_MEDIAPLAYER=y + +# +# NxPlayer Integration +# + +# +# Media File Configuration +# +CONFIG_NXWM_MEDIAPLAYER_MEDIAPATH="/mnt/sdcard" +CONFIG_NXWM_MEDIAPLAYER_NOFILTER=y +# CONFIG_NXWM_MEDIAPLAYER_FILTER is not set + +# +# General Look and Feel +# +CONFIG_NXWM_MEDIAPLAYER_XSPACING=12 +CONFIG_NXWM_MEDIAPLAYER_YSPACING=8 +# CONFIG_NXWM_MEDIAPLAYER_CUSTOM_COLORS is not set +# CONFIG_NXWM_MEDIAPLAYER_BORDERS is not set + +# +# Volume Control Configuration +# +CONFIG_NXWM_MEDIAPLAYER_VOLUMESTEP=5 +CONFIG_NXWM_MEDIAPLAYER_MINVOLUMEHEIGHT=6 + +# +# Platform-specific Support +# +CONFIG_PLATFORM_CONFIGDATA=y +CONFIG_MIKROE_STM32F4_CONFIGDATA_PART=y +# CONFIG_MIKROE_STM32F4_CONFIGDATA_FS is not set +# CONFIG_MIKROE_STM32F4_CONFIGDATA_ROM is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +CONFIG_SYSTEM_FLASH_ERASEALL=y +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +CONFIG_SYSTEM_NXPLAYER=y +CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500 +CONFIG_NXPLAYER_COMMAND_LINE=y +CONFIG_NXPLAYER_INCLUDE_HELP=y +CONFIG_NXPLAYER_INCLUDE_DEVICE_SEARCH=y +# CONFIG_NXPLAYER_INCLUDE_PREFERRED_DEVICE is not set +CONFIG_NXPLAYER_FMT_FROM_EXT=y +# CONFIG_NXPLAYER_FMT_FROM_HEADER is not set +CONFIG_NXPLAYER_INCLUDE_MEDIADIR=y +CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/usr/sounds" +# CONFIG_NXPLAYER_RECURSIVE_MEDIA_SEARCH is not set +CONFIG_NXPLAYER_INCLUDE_SYSTEM_RESET=y +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mikroe-stm32f4/fulldemo/setenv.sh b/configs/mikroe-stm32f4/fulldemo/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..93dbf8d8cd1a2094d8f4738f06e802ff44c01934 --- /dev/null +++ b/configs/mikroe-stm32f4/fulldemo/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm32f4discovery/usbnsh/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mikroe-stm32f4/include/board.h b/configs/mikroe-stm32f4/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..796b6a62b40dd8711b83b62f9b8f0546845fd0a8 --- /dev/null +++ b/configs/mikroe-stm32f4/include/board.h @@ -0,0 +1,289 @@ +/************************************************************************************ + * configs/mikroe-stm32f4/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIG_MIKROE_STM32F4_INCLUDE_BOARD_H +#define __CONFIG_MIKROE_STM32F4_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The Mikroe STM32F4 Mikromedia board features a single 32kHz crystal. The main + * clock uses the internal 16Mhz RC oscillator. + * + * This is the canonical configuration: + * System Clock source : PLL (HSE) + * SYSCLK(Hz) : 168000000 Determined by PLL configuration + * HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE) + * AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE) + * APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1) + * APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2) + * HSI Frequency(Hz) : 16000000 (STM32_HSI_FREQUENCY) + * PLLM : 16 (STM32_PLLCFG_PLLM) + * PLLN : 336 (STM32_PLLCFG_PLLN) + * PLLP : 2 (STM32_PLLCFG_PLLP) + * PLLQ : 7 (STM32_PLLCFG_PLLQ) + * Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK + * Flash Latency(WS) : 5 + * Prefetch Buffer : OFF + * Instruction cache : ON + * Data cache : ON + * Require 48MHz for USB OTG FS, : Enabled + * SDIO and RNG clock + */ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC + * HSE - On-board crystal frequency is 8MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 8000000ul + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* Main PLL Configuration. + * + * PLL source is HSI + * PLL_VCO = (STM32_HSI_FREQUENCY / PLLM) * PLLN + * = (16,000,000 / 16) * 336 + * = 336,000,000 + * SYSCLK = PLL_VCO / PLLP + * = 336,000,000 / 2 = 168,000,000 + * USB OTG FS, SDIO and RNG Clock + * = PLL_VCO / PLLQ + * = 48,000,000 + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(16) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7) + +#define STM32_SYSCLK_FREQUENCY 168000000ul + +/* AHB clock (HCLK) is SYSCLK (168MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) + +/* Timers driven from APB1 will be twice PCLK1 */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 */ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#if 0 +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_LED3 2 +#define BOARD_LED4 3 +#endif +#define BOARD_NLEDS 0 + +#if 0 +#define BOARD_LED_GREEN BOARD_LED1 +#define BOARD_LED_ORANGE BOARD_LED2 +#define BOARD_LED_RED BOARD_LED3 +#define BOARD_LED_BLUE BOARD_LED4 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) +#define BOARD_LED4_BIT (1 << BOARD_LED4) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the + * stm32f4discovery. The following definitions describe how NuttX controls the LEDs: + */ + +#define LED_STARTED 0 /* LED1 */ +#define LED_HEAPALLOCATE 1 /* LED2 */ +#define LED_IRQSENABLED 2 /* LED1 + LED2 */ +#define LED_STACKCREATED 3 /* LED3 */ +#define LED_INIRQ 4 /* LED1 + LED3 */ +#define LED_SIGNAL 5 /* LED2 + LED3 */ +#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */ +#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */ + +/* Button definitions ***************************************************************/ +/* The STM32F4 Discovery supports one button: */ + +#define BUTTON_USER 0 + +#define NUM_BUTTONS 0 + +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +#endif /* 0 */ + +/* Alternate function pin selections ************************************************/ + +/* UART2: + * + * The Mikroe-STM32F4 board has no on-board serial devices, but it brings out UART2 + * to the expansion header. + * (See the README.txt file for other options) + */ + +#define GPIO_USART2_RX GPIO_USART2_RX_2 +#define GPIO_USART2_TX GPIO_USART2_TX_2 + +/* PWM + * + * The STM32F4 Discovery has no real on-board PWM devices, but the board can be + * configured to output a pulse train using TIM4 CH2 on PD13. + */ + +#define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2 + +/* SPI - Onboard devices use SPI3, plus SPI2 routes to the I/O header */ + +#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1 +#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 +#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2 +#define DMACHAN_SPI2_RX DMAMAP_SPI2_RX +#define DMACHAN_SPI2_TX DMAMAP_SPI2_TX + +#define GPIO_SPI3_MISO GPIO_SPI3_MISO_2 +#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2 +#define GPIO_SPI3_SCK GPIO_SPI3_SCK_2 +#define DMACHAN_SPI3_RX DMAMAP_SPI3_RX_2 +#define DMACHAN_SPI3_TX DMAMAP_SPI3_TX_2 + +/* Timer Inputs/Outputs (see the README.txt file for options) */ + +#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_2 +#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1 + +#define GPIO_TIM8_CH1IN GPIO_TIM8_CH1IN_1 +#define GPIO_TIM8_CH2IN GPIO_TIM8_CH2IN_1 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIG_MIKROE_STM32F4_INCLUDE_BOARD_H */ diff --git a/configs/mikroe-stm32f4/kernel/.gitignore b/configs/mikroe-stm32f4/kernel/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..7bacd5aee3e49e11d2753d091bd2c9b31c0b16b0 --- /dev/null +++ b/configs/mikroe-stm32f4/kernel/.gitignore @@ -0,0 +1,2 @@ +/nuttx_user.elf + diff --git a/configs/mikroe-stm32f4/kernel/Makefile b/configs/mikroe-stm32f4/kernel/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..620039f0c1b0debd6dcf6f1d51d1fe77030e6647 --- /dev/null +++ b/configs/mikroe-stm32f4/kernel/Makefile @@ -0,0 +1,122 @@ +############################################################################ +# configs/mikroe-stm32f4/kernel/Makefile +# +# Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +# This is the directory for the board-specific header files + +BOARD_INCLUDE = $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)include + +# The entry point name (if none is provided in the .config file) + +CONFIG_USER_ENTRYPOINT ?= user_start +ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT)) + +# Get the paths to the libraries and the links script path in format that +# is appropriate for the host OS + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done} + USER_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}" + USER_LDSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld}" + USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}" + USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}" + USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}" +else + # Linux/Cygwin-native toolchain + USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS))) + USER_LDSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld + USER_LDSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld + USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex" + USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec" + USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" +endif + +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) +USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) +USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" + +# Source files + +CSRCS = stm32_userspace.c +COBJS = $(CSRCS:.c=$(OBJEXT)) +OBJS = $(COBJS) + +# Targets: + +all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map +.PHONY: nuttx_user.elf depend clean distclean + +$(COBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +# Create the nuttx_user.elf file containing all of the user-mode code + +nuttx_user.elf: $(OBJS) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) + +$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf + @echo "LD: nuttx_user.elf" + $(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf +ifeq ($(CONFIG_INTELHEX_BINARY),y) + @echo "CP: nuttx_user.hex" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE) +endif +ifeq ($(CONFIG_MOTOROLA_SREC),y) + @echo "CP: nuttx_user.srec" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE) +endif +ifeq ($(CONFIG_RAW_BINARY),y) + @echo "CP: nuttx_user.bin" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE) +endif + +$(TOPDIR)$(DELIM)User.map: nuttx_user.elf + @echo "MK: User.map" + $(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map + $(Q) $(CROSSDEV)size nuttx_user.elf + +.depend: + +depend: .depend + +clean: + $(call DELFILE, nuttx_user.elf) + $(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*") + $(call DELFILE, "$(TOPDIR)$(DELIM)User.map") + $(call CLEAN) + +distclean: clean diff --git a/configs/mikroe-stm32f4/kernel/stm32_userspace.c b/configs/mikroe-stm32f4/kernel/stm32_userspace.c new file mode 100644 index 0000000000000000000000000000000000000000..c7c89018ad7798e3b314b367e75ee717485db7d7 --- /dev/null +++ b/configs/mikroe-stm32f4/kernel/stm32_userspace.c @@ -0,0 +1,132 @@ +/**************************************************************************** + * configs/mikroe-stm32f4/kernel/stm32_userspace.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_NUTTX_USERSPACE +# error "CONFIG_NUTTX_USERSPACE not defined" +#endif + +#if CONFIG_NUTTX_USERSPACE != 0x08020000 +# error "CONFIG_NUTTX_USERSPACE must be 0x08020000 to match memory.ld" +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* These 'addresses' of these values are setup by the linker script. They are + * not actual uint32_t storage locations! They are only used meaningfully in the + * following way: + * + * - The linker script defines, for example, the symbol_sdata. + * - The declareion extern uint32_t _sdata; makes C happy. C will believe + * that the value _sdata is the address of a uint32_t variable _data (it is + * not!). + * - We can recoved the linker value then by simply taking the address of + * of _data. like: uint32_t *pdata = &_sdata; + */ + +extern uint32_t _stext; /* Start of .text */ +extern uint32_t _etext; /* End_1 of .text + .rodata */ +extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */ +extern uint32_t _sdata; /* Start of .data */ +extern uint32_t _edata; /* End+1 of .data */ +extern uint32_t _sbss; /* Start of .bss */ +extern uint32_t _ebss; /* End+1 of .bss */ + +/* This is the user space entry point */ + +int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); + +const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +{ + /* General memory map */ + + .us_entrypoint = (main_t)CONFIG_USER_ENTRYPOINT, + .us_textstart = (uintptr_t)&_stext, + .us_textend = (uintptr_t)&_etext, + .us_datasource = (uintptr_t)&_eronly, + .us_datastart = (uintptr_t)&_sdata, + .us_dataend = (uintptr_t)&_edata, + .us_bssstart = (uintptr_t)&_sbss, + .us_bssend = (uintptr_t)&_ebss, + + /* Memory manager heap structure */ + + .us_heap = &g_mmheap, + + /* Task/thread startup routines */ + + .task_startup = task_startup, +#ifndef CONFIG_DISABLE_PTHREAD + .pthread_startup = pthread_startup, +#endif + + /* Signal handler trampoline */ + +#ifndef CONFIG_DISABLE_SIGNALS + .signal_handler = up_signal_handler, +#endif + + /* User-space work queue support (declared in include/nuttx/wqueue.h) */ + +#ifdef CONFIG_LIB_USRWORK + .work_usrstart = work_usrstart, +#endif +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */ diff --git a/configs/mikroe-stm32f4/kostest/Make.defs b/configs/mikroe-stm32f4/kostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..15aaec72bcd17a540f456691161237d8938f05ca --- /dev/null +++ b/configs/mikroe-stm32f4/kostest/Make.defs @@ -0,0 +1,112 @@ +############################################################################ +# configs/mikroe-stm32f4/usbnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/mikroe-stm32f4/kostest/defconfig b/configs/mikroe-stm32f4/kostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ce0b865be0ebc44af929889b8449dad0929e4217 --- /dev/null +++ b/configs/mikroe-stm32f4/kostest/defconfig @@ -0,0 +1,1291 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_FLAT is not set +CONFIG_BUILD_PROTECTED=y +CONFIG_BUILD_2PASS=y +CONFIG_PASS1_TARGET="all" +CONFIG_PASS1_BUILDIR="configs/mikroe-stm32f4/kernel" +CONFIG_PASS1_OBJECT="" +CONFIG_NUTTX_USERSPACE=0x08020000 + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +CONFIG_ARM_MPU=y +CONFIG_ARM_MPU_NREGIONS=8 + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +CONFIG_STM32_ADC2=y +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +CONFIG_STM32_OTGFS=y +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +CONFIG_STM32_RNG=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI2=y +CONFIG_STM32_SPI3=y +CONFIG_STM32_SYSCFG=y +CONFIG_STM32_TIM1=y +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_ADC=y +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +CONFIG_STM32_FLASH_PREFETCH=y +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_PWM is not set +# CONFIG_STM32_TIM1_ADC is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set + +# +# ADC Configuration +# +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_MAGIC_REG=0 +CONFIG_RTC_MAGIC=0xfacefeee +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +CONFIG_ARCH_USE_MPU=y +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_STM32F4_DISCOVERY is not set +CONFIG_ARCH_BOARD_MIKROE_STM32F4=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mikroe-stm32f4" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_MIKROE_FLASH=y +CONFIG_MIKROE_FLASH_MINOR=0 +CONFIG_MIKROE_FLASH_PART=y +CONFIG_MIKROE_FLASH_PART_LIST="256,768" +# CONFIG_MIKROE_RAMMTD is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=11 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=4 + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=20000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +CONFIG_LIB_SYSCALL=y +CONFIG_SYS_RESERVED=8 +CONFIG_SYS_NNEST=2 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +CONFIG_DEV_LOOP=y + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +CONFIG_RAMDISK=y +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +CONFIG_RTC_ALARM=y +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +CONFIG_MTD_PARTITION=y +# CONFIG_MTD_SECT512 is not set +CONFIG_MTD_BYTE_WRITE=y +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +CONFIG_RAMMTD=y +CONFIG_RAMMTD_BLOCKSIZE=512 +CONFIG_RAMMTD_ERASESIZE=4096 +CONFIG_RAMMTD_ERASESTATE=0xff +# CONFIG_RAMMTD_FLASHSIM is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +CONFIG_MTD_M25P=y +CONFIG_M25P_SPIMODE=0 +CONFIG_M25P_MANUFACTURER=0x1C +CONFIG_M25P_MEMORY_TYPE=0x31 +CONFIG_M25P_SUBSECTOR_ERASE=y +# CONFIG_MTD_S25FL1 is not set +CONFIG_MTD_SMART=y +# CONFIG_SMART_DEV_LOOP is not set +CONFIG_MTD_SMART_SECTOR_SIZE=512 +CONFIG_MTD_SMART_WEAR_LEVEL=y +# CONFIG_MTD_SMART_CONVERT_WEAR_FORMAT is not set +# CONFIG_MTD_SMART_ENABLE_CRC is not set +# CONFIG_MTD_SMART_MINIMIZE_RAM is not set +# CONFIG_MTD_SMART_SECTOR_ERASE_DEBUG is not set +# CONFIG_MTD_SMART_ALLOC_DEBUG is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +CONFIG_FS_SMARTFS=y +CONFIG_SMARTFS_ERASEDSTATE=0xff +CONFIG_SMARTFS_MAXNAMLEN=16 +# CONFIG_SMARTFS_MULTI_ROOT_DIRS is not set +# CONFIG_SMARTFS_ALIGNED_ACCESS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_CHAR=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_KERNEL_HEAP=y +CONFIG_MM_KERNEL_HEAPSIZE=8192 +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIBC_STRERROR=y +# CONFIG_LIBC_STRERROR_SHORT is not set +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_USRWORK is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=8192 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +CONFIG_EXAMPLES_OSTEST_WAITRESULT=y +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +CONFIG_FSUTILS_MKSMARTFS=y +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LOSMART is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MKSMARTFS is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +CONFIG_NSH_DISABLE_PS=y +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_ROMFSETC is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mikroe-stm32f4/kostest/setenv.sh b/configs/mikroe-stm32f4/kostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..47142dcd6daad6fffb3036fb5c6d452aebf1bb61 --- /dev/null +++ b/configs/mikroe-stm32f4/kostest/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/mikroe-stm32f4/usbnsh/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mikroe-stm32f4/nsh/Make.defs b/configs/mikroe-stm32f4/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..fbf03ea8531755b7c2d2628ec2f2ba2942c6cdb2 --- /dev/null +++ b/configs/mikroe-stm32f4/nsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f4discovery/nsh/Make.defs +# +# Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/mikroe-stm32f4/nsh/defconfig b/configs/mikroe-stm32f4/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b4116fb37d1e7025d609dd6782ca06029a6879cc --- /dev/null +++ b/configs/mikroe-stm32f4/nsh/defconfig @@ -0,0 +1,1222 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +CONFIG_STM32_RNG=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI2=y +CONFIG_STM32_SPI3=y +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_STM32F4_DISCOVERY is not set +CONFIG_ARCH_BOARD_MIKROE_STM32F4=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mikroe-stm32f4" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_MIKROE_FLASH=y +CONFIG_MIKROE_FLASH_MINOR=0 +CONFIG_MIKROE_FLASH_PART=y +CONFIG_MIKROE_FLASH_PART_LIST="256,768" +# CONFIG_MIKROE_RAMMTD is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +CONFIG_DEV_LOOP=y + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +CONFIG_RAMDISK=y +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +CONFIG_MTD_PARTITION=y +# CONFIG_MTD_SECT512 is not set +CONFIG_MTD_BYTE_WRITE=y +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +CONFIG_RAMMTD=y +CONFIG_RAMMTD_BLOCKSIZE=512 +CONFIG_RAMMTD_ERASESIZE=4096 +CONFIG_RAMMTD_ERASESTATE=0xff +# CONFIG_RAMMTD_FLASHSIM is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +CONFIG_MTD_M25P=y +CONFIG_M25P_SPIMODE=0 +CONFIG_M25P_MANUFACTURER=0x1C +CONFIG_M25P_MEMORY_TYPE=0x31 +CONFIG_M25P_SUBSECTOR_ERASE=y +# CONFIG_MTD_S25FL1 is not set +CONFIG_MTD_SMART=y +# CONFIG_SMART_DEV_LOOP is not set +CONFIG_MTD_SMART_SECTOR_SIZE=512 +CONFIG_MTD_SMART_WEAR_LEVEL=y +# CONFIG_MTD_SMART_CONVERT_WEAR_FORMAT is not set +# CONFIG_MTD_SMART_ENABLE_CRC is not set +# CONFIG_MTD_SMART_MINIMIZE_RAM is not set +# CONFIG_MTD_SMART_SECTOR_ERASE_DEBUG is not set +# CONFIG_MTD_SMART_ALLOC_DEBUG is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +CONFIG_FS_SMARTFS=y +CONFIG_SMARTFS_ERASEDSTATE=0xff +CONFIG_SMARTFS_MAXNAMLEN=16 +# CONFIG_SMARTFS_MULTI_ROOT_DIRS is not set +# CONFIG_SMARTFS_ALIGNED_ACCESS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_CHAR=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIBC_STRERROR=y +# CONFIG_LIBC_STRERROR_SHORT is not set +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MTDPART is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_FLASH_TEST is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +CONFIG_FSUTILS_MKSMARTFS=y +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LOSMART is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MKSMARTFS is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_ROMFSETC is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +CONFIG_SYSTEM_FLASH_ERASEALL=y +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mikroe-stm32f4/nsh/setenv.sh b/configs/mikroe-stm32f4/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..331b1bef38514b3466403979e520bbf5fbb969fb --- /dev/null +++ b/configs/mikroe-stm32f4/nsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/stm32f4discovery/nsh/setenv.sh +# +# Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mikroe-stm32f4/nx/Make.defs b/configs/mikroe-stm32f4/nx/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6dbe0a0fa380fedbc0578e836eb2eec31b89cc33 --- /dev/null +++ b/configs/mikroe-stm32f4/nx/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/mikroe-stm32f4/usbnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/mikroe-stm32f4/nx/defconfig b/configs/mikroe-stm32f4/nx/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..bdb7a11c41a7fcbdec534ec0ac120bcc5713ded0 --- /dev/null +++ b/configs/mikroe-stm32f4/nx/defconfig @@ -0,0 +1,1198 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_STM32F4_DISCOVERY is not set +CONFIG_ARCH_BOARD_MIKROE_STM32F4=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mikroe-stm32f4" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_MIKROE_FLASH is not set +# CONFIG_MIKROE_RAMMTD is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nx_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +# CONFIG_DEV_NULL is not set +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +CONFIG_LCD_MIO283QT2=y +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +# CONFIG_SERIAL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_CHAR=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +CONFIG_NX_XYINPUT_NONE=y +# CONFIG_NX_XYINPUT_MOUSE is not set +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +# CONFIG_NX_KBD is not set + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=3 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0x8410 +CONFIG_NXTK_BORDERCOLOR2=0x4208 +CONFIG_NXTK_BORDERCOLOR3=0xc618 +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +CONFIG_NXFONT_SERIF22X28B=y +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIBC_STRERROR=y +# CONFIG_LIBC_STRERROR_SHORT is not set +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=16 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NX_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# +# CONFIG_NXWIDGETS is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mikroe-stm32f4/nx/setenv.sh b/configs/mikroe-stm32f4/nx/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..93dbf8d8cd1a2094d8f4738f06e802ff44c01934 --- /dev/null +++ b/configs/mikroe-stm32f4/nx/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm32f4discovery/usbnsh/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mikroe-stm32f4/nxlines/Make.defs b/configs/mikroe-stm32f4/nxlines/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6dbe0a0fa380fedbc0578e836eb2eec31b89cc33 --- /dev/null +++ b/configs/mikroe-stm32f4/nxlines/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/mikroe-stm32f4/usbnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/mikroe-stm32f4/nxlines/defconfig b/configs/mikroe-stm32f4/nxlines/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..f1251731bbb813bb0f7d72dca0a24d2c8b516c54 --- /dev/null +++ b/configs/mikroe-stm32f4/nxlines/defconfig @@ -0,0 +1,1199 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_STM32F4_DISCOVERY is not set +CONFIG_ARCH_BOARD_MIKROE_STM32F4=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mikroe-stm32f4" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_MIKROE_FLASH is not set +# CONFIG_MIKROE_RAMMTD is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxlines_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +# CONFIG_DEV_NULL is not set +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +CONFIG_LCD_NOGETRUN=y +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +CONFIG_LCD_MIO283QT2=y +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +# CONFIG_SERIAL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_CHAR=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +CONFIG_NX_XYINPUT_NONE=y +# CONFIG_NX_XYINPUT_MOUSE is not set +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +# CONFIG_NX_KBD is not set + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=3 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0x8410 +CONFIG_NXTK_BORDERCOLOR2=0x4208 +CONFIG_NXTK_BORDERCOLOR3=0xc618 +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +CONFIG_NXFONT_SERIF22X28B=y +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +CONFIG_EXAMPLES_NXLINES=y +CONFIG_EXAMPLES_NXLINES_VPLANE=0 +CONFIG_EXAMPLES_NXLINES_DEVNO=0 +# CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x0 +CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16 +CONFIG_EXAMPLES_NXLINES_LINECOLOR=0x861F +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=16 +CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xFFE0 +CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0x87F0 +CONFIG_EXAMPLES_NXLINES_BPP=16 +# CONFIG_EXAMPLES_NXLINES_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# +# CONFIG_NXWIDGETS is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mikroe-stm32f4/nxlines/setenv.sh b/configs/mikroe-stm32f4/nxlines/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..93dbf8d8cd1a2094d8f4738f06e802ff44c01934 --- /dev/null +++ b/configs/mikroe-stm32f4/nxlines/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm32f4discovery/usbnsh/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mikroe-stm32f4/nxtext/Make.defs b/configs/mikroe-stm32f4/nxtext/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6dbe0a0fa380fedbc0578e836eb2eec31b89cc33 --- /dev/null +++ b/configs/mikroe-stm32f4/nxtext/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/mikroe-stm32f4/usbnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/mikroe-stm32f4/nxtext/defconfig b/configs/mikroe-stm32f4/nxtext/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..7e01d3ae991d160fd57bf40b0a37605be9326535 --- /dev/null +++ b/configs/mikroe-stm32f4/nxtext/defconfig @@ -0,0 +1,1208 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_STM32F4_DISCOVERY is not set +CONFIG_ARCH_BOARD_MIKROE_STM32F4=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mikroe-stm32f4" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_MIKROE_FLASH is not set +# CONFIG_MIKROE_RAMMTD is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxtext_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +# CONFIG_DEV_NULL is not set +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +CONFIG_LCD_MIO283QT2=y +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +# CONFIG_SERIAL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_CHAR=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +CONFIG_NX_XYINPUT_NONE=y +# CONFIG_NX_XYINPUT_MOUSE is not set +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +# CONFIG_NX_KBD is not set + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=3 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0x8410 +CONFIG_NXTK_BORDERCOLOR2=0x4208 +CONFIG_NXTK_BORDERCOLOR3=0xc618 +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +CONFIG_NXFONT_SERIF22X28B=y +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +CONFIG_EXAMPLES_NXTEXT=y + +# +# Basic Configuration of the example +# +CONFIG_EXAMPLES_NXTEXT_VPLANE=0 +CONFIG_EXAMPLES_NXTEXT_DEVNO=0 +CONFIG_EXAMPLES_NXTEXT_BPP=16 +CONFIG_EXAMPLES_NXTEXT_BMCACHE=128 +CONFIG_EXAMPLES_NXTEXT_GLCACHE=16 + +# +# Example Color Configuration +# +CONFIG_EXAMPLES_NXTEXT_DEFAULT_COLORS=y + +# +# Example Font Configuration +# +CONFIG_EXAMPLES_NXTEXT_DEFAULT_FONT=y +# CONFIG_EXAMPLES_NXTEXT_EXTERNINIT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# +# CONFIG_NXWIDGETS is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mikroe-stm32f4/nxtext/setenv.sh b/configs/mikroe-stm32f4/nxtext/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..93dbf8d8cd1a2094d8f4738f06e802ff44c01934 --- /dev/null +++ b/configs/mikroe-stm32f4/nxtext/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm32f4discovery/usbnsh/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mikroe-stm32f4/scripts/gnu-elf.ld b/configs/mikroe-stm32f4/scripts/gnu-elf.ld new file mode 100644 index 0000000000000000000000000000000000000000..52064241f62dad184832956dbd930bf287b155e2 --- /dev/null +++ b/configs/mikroe-stm32f4/scripts/gnu-elf.ld @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/mikroe-stm32f4/scripts/gnu-elf.ld + * + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +SECTIONS +{ + .text 0x00000000 : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + *(.ctors) /* Old ABI: Unallocated */ + *(.init_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .dtors : + { + _sdtors = . ; + *(.dtors) /* Old ABI: Unallocated */ + *(.fini_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = . ; + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/mikroe-stm32f4/scripts/kernel-space.ld b/configs/mikroe-stm32f4/scripts/kernel-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..758a44c7cc6b578ebf8ad7c28e06705bc1bf7a14 --- /dev/null +++ b/configs/mikroe-stm32f4/scripts/kernel-space.ld @@ -0,0 +1,109 @@ +/**************************************************************************** + * configs/mikroe-stm32f4/scripts/kernel-space.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > kflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > kflash + + .ARM.extab : { + *(.ARM.extab*) + } > kflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > kflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > ksram AT > kflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > ksram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/mikroe-stm32f4/scripts/ld.script b/configs/mikroe-stm32f4/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..34dcc1cc2c38b6800ea9683f03a0a9064117952e --- /dev/null +++ b/configs/mikroe-stm32f4/scripts/ld.script @@ -0,0 +1,122 @@ +/**************************************************************************** + * configs/mikroe-stm32f4/scripts/ld.script + * + * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F407VG has 1024Kb of FLASH beginning at address 0x0800:0000 and + * 192Kb of SRAM. SRAM is split up into three blocks: + * + * 1) 112Kb of SRAM beginning at address 0x2000:0000 + * 2) 16Kb of SRAM beginning at address 0x2001:c000 + * 3) 64Kb of CCM SRAM beginning at address 0x1000:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/mikroe-stm32f4/scripts/memory.ld b/configs/mikroe-stm32f4/scripts/memory.ld new file mode 100644 index 0000000000000000000000000000000000000000..3a7480d87148cdc3a38a4ca5faf2e1eb002c278e --- /dev/null +++ b/configs/mikroe-stm32f4/scripts/memory.ld @@ -0,0 +1,100 @@ +/**************************************************************************** + * configs/stm32f4discovery/scripts/memory.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F407VG has 1024Kb of FLASH beginning at address 0x0800:0000 and + * 192Kb of SRAM. SRAM is split up into three blocks: + * + * 1) 112KB of SRAM beginning at address 0x2000:0000 + * 2) 16KB of SRAM beginning at address 0x2001:c000 + * 3) 64KB of CCM SRAM beginning at address 0x1000:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + * + * For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of + * FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which + * should fit into 64KB and, of course, can be optimized as needed (See + * also configs/stm32f4discovery/scripts/kernel-space.ld). Allowing the + * additional does permit addition debug instrumentation to be added to the + * kernel space without overflowing the partition. + * + * Alignment of the user space FLASH partition is also a critical factor: + * The user space FLASH partition will be spanned with a single region of + * size 2**n bytes. The alignment of the user-space region must be the same. + * As a consequence, as the user-space increases in size, the alignmment + * requirement also increases. + * + * This alignment requirement means that the largest user space FLASH region + * you can have will be 512KB at it would have to be positioned at + * 0x08800000. If you change this address, don't forget to change the + * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify + * the check in kernel/userspace.c. + * + * For the same reasons, the maximum size of the SRAM mapping is limited to + * 4KB. Both of these alignment limitations could be reduced by using + * multiple regions to map the FLASH/SDRAM range or perhaps with some + * clever use of subregions. + * + * A detailed memory map for the 112KB SRAM region is as follows: + * + * 0x20000 0000: Kernel .data region. Typical size: 0.1KB + * ------- ---- Kernel .bss region. Typical size: 1.8KB + * 0x20000 0800: Kernel IDLE thread stack (approximate). Size is + * determined by CONFIG_IDLETHREAD_STACKSIZE and + * adjustments for alignment. Typical is 1KB. + * ------- ---- Padded to 4KB + * 0x20000 1000: User .data region. Size is variable. + * ------- ---- User .bss region Size is variable. + * 0x20000 2000: Beginning of kernel heap. Size determined by + * CONFIG_MM_KERNEL_HEAPSIZE. + * ------- ---- Beginning of user heap. Can vary with other settings. + * 0x20001 c000: End+1 of CPU RAM + */ + +MEMORY +{ + /* 1024Kb FLASH */ + + kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K + uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K + xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K + + /* 112Kb of contiguous SRAM */ + + ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 4K + usram (rwx) : ORIGIN = 0x20001000, LENGTH = 4K + xsram (rwx) : ORIGIN = 0x20002000, LENGTH = 104K +} diff --git a/configs/mikroe-stm32f4/scripts/user-space.ld b/configs/mikroe-stm32f4/scripts/user-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..ffb106d8d0e5879bba114fdedfda7611848d1d16 --- /dev/null +++ b/configs/mikroe-stm32f4/scripts/user-space.ld @@ -0,0 +1,111 @@ +/**************************************************************************** + * configs/mikroe-stm32f4/scripts/user-space.ld + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +SECTIONS +{ + .userspace : { + *(.userspace) + } > uflash + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > uflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > uflash + + .ARM.extab : { + *(.ARM.extab*) + } > uflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > uflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > usram AT > uflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > usram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/mikroe-stm32f4/src/.gitignore b/configs/mikroe-stm32f4/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/mikroe-stm32f4/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/mikroe-stm32f4/src/Makefile b/configs/mikroe-stm32f4/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..d19eda17f71bab84681a9ad3fda262576d3dc3f9 --- /dev/null +++ b/configs/mikroe-stm32f4/src/Makefile @@ -0,0 +1,97 @@ +############################################################################ +# configs/mikroe-stm32f4/src/Makefile +# +# Copyright (C) 2011-2013, 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Updates: 04/15/2013 - Ken Pettit +# - Modifications for port to Mikroe for STM32F4 +# - Added support for LCD, Serial Flash, SD Card +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG),y) +CSRCS += stm32_clockconfig.c +endif + +ifeq ($(CONFIG_STM32_OTGFS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += stm32_pwm.c +endif + +ifeq ($(CONFIG_QENCODER),y) +CSRCS += stm32_qencoder.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += stm32_watchdog.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_ARCH_CUSTOM_PMINIT),y) +CSRCS += stm32_pm.c +endif + +ifeq ($(CONFIG_ARCH_IDLE_CUSTOM),y) +CSRCS += stm32_idle.c +endif + +ifeq ($(CONFIG_STM32_FSMC),y) +CSRCS += stm32_extmem.c +endif + +ifeq ($(CONFIG_INPUT),y) +CSRCS += stm32_touchscreen.c +endif + +ifeq ($(CONFIG_LCD_MIO283QT2),y) +CSRCS += stm32_mio283qt2.c +endif + +ifeq ($(CONFIG_LCD_MIO283QT9A),y) +CSRCS += stm32_mio283qt9a.c +endif + +ifeq ($(CONFIG_VS1053),y) +CSRCS += stm32_vs1053.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/mikroe-stm32f4/src/mikroe-stm32f4.h b/configs/mikroe-stm32f4/src/mikroe-stm32f4.h new file mode 100644 index 0000000000000000000000000000000000000000..473d0a61fbcd9ed897522d02a8fdc6887207776c --- /dev/null +++ b/configs/mikroe-stm32f4/src/mikroe-stm32f4.h @@ -0,0 +1,269 @@ +/**************************************************************************************************** + * configs/mikroe-stm32f4/src/mikroe-stm32f4.h + * + * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __CONFIGS_MIKROE_STM32F4_SRC_MIKROE_STM32F4_H +#define __CONFIGS_MIKROE_STM32F4_SRC_MIKROE_STM32F4_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include +#include + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ +/* Configuration ************************************************************************************/ +/* How many SPI modules does this chip support? */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 3 +# undef CONFIG_STM32_SPI3 +#endif + +/* Mikroe STM32F4 GPIOs **************************************************************************/ +/* LEDs - There are no user LEDs on this board unless you add some manually. */ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN12) + +/* BUTTONS -- NOTE that all have EXTI interrupts configured */ +/* There are no user buttons on this board unless you add some externally. */ + +#define MIN_IRQBUTTON BUTTON_USER +#define MAX_IRQBUTTON BUTTON_USER +#define NUM_IRQBUTTONS 1 + +#define GPIO_BTN_USER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0) + +/* PWM + * + * The Mikroe-STM32F4 has no real on-board PWM devices, but the board can be + * configured to output a pulse train using TIM4 CH2 on PD13. + */ + +#define STM32F4DISCOVERY_PWMTIMER 4 +#define STM32F4DISCOVERY_PWMCHANNEL 2 + +/* SPI chip selects */ + +#define GPIO_CS_MMCSD (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN3) +#define GPIO_CS_FLASH (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN7) +#define GPIO_CS_MP3_DATA (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN9) +#define GPIO_CS_MP3_CMD (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN8) +#define GPIO_CS_EXP_SPI3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN0) +#define GPIO_SD_CD (GPIO_INPUT|GPIO_PORTD|GPIO_PIN15) + +/* USB OTG FS + * + * PA9 OTG_FS_VBUS VBUS sensing (also connected to the green LED) + * PC0 OTG_FS_PowerSwitchOn + * PD5 OTG_FS_Overcurrent + */ + +#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9) +#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN0) + +#ifdef CONFIG_USBHOST +# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN5) + +#else +# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN5) +#endif + +/* TFT LCD Controller GPIOs + * + * PE8, LCD_RST -- Low value holds in reset + * PE15, LCD_CS -- Low value selects LCD + * PE9, LCD_BLED -- Backlight -- Low value turns off + * PE12, RS -- High values selects data + * + * PE10, PMPRD -- Low to read from the LCD + * PE11, PMPWR -- Low to write to the LCD + */ + +#define GPIO_LCD_RST (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_PORTE|GPIO_PIN8) + +#define GPIO_LCD_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN15) +#define LCD_CS_PIN GPIO_PIN15 + +#define GPIO_LCD_BLED (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_PORTE|GPIO_PIN9) + +#define GPIO_LCD_RS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_PORTE|GPIO_PIN12) +#define LCD_RS_PIN GPIO_PIN12 + +#define GPIO_LCD_PMPRD (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN10) +#define LCD_PMPRD_PIN GPIO_PIN10 + +#define GPIO_LCD_PMPWR (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN11) +#define LCD_PMPWR_PIN GPIO_PIN11 + +#define GPIO_LCD_T_D0 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_PORTE|GPIO_PIN0) + +#define GPIO_LCD_T_D1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_PORTE|GPIO_PIN1) + +#define GPIO_LCD_T_D2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_PORTE|GPIO_PIN2) + +#define GPIO_LCD_T_D3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_PORTE|GPIO_PIN3) + +#define GPIO_LCD_T_D4 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_PORTE|GPIO_PIN4) + +#define GPIO_LCD_T_D5 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_PORTE|GPIO_PIN5) + +#define GPIO_LCD_T_D6 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_PORTE|GPIO_PIN6) + +#define GPIO_LCD_T_D7 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_PORTE|GPIO_PIN7) + +#define GPIO_TP_DRIVEA (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8) + +#define GPIO_TP_DRIVEB (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_PORTB|GPIO_PIN9) + +#define GPIO_TP_YD (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN0) + +#define GPIO_TP_XL (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN1) + +/* MP3 Codec control pins */ + +#define GPIO_VS1053_RST (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN7) +#define GPIO_VS1053_DREQ (GPIO_INPUT|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN6) +#define GPIO_VS1053_DREQ_IRQ STM32_IRQ_EXTI95 + +/**************************************************************************************************** + * Public Types + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +/**************************************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the mikroe-stm32f4 board. + * + ****************************************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +/**************************************************************************************************** + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the Mikroe-stm32f4 board. + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_OTGFS +void weak_function stm32_usbinitialize(void); +#endif + +/**************************************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. This function will + * start a thread that will monitor for device connection/disconnection events. + * + ****************************************************************************************************/ + +#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST) +# error "The Mikroe-STM32F4 board does not support HOST OTG, only device!" +#endif + +/**************************************************************************************************** + * Name: stm32_lcdinitialize + * + * Description: + * Initialize the LCD. This function should be called early in the boot sequendce -- Even if the + * LCD is not enabled. In that case we should at a minimum at least disable the LCD backlight. + * + ****************************************************************************************************/ + +#if defined(CONFIG_LCD_MIO283QT2) || defined(CONFIG_LCD_MIO283QT9A) +void stm32_lcdinitialize(void); +#endif + +/**************************************************************************************************** + * Name: up_vs1053initialize + * + * Description: + * Initialize the VS1053 Audio CODEC hardware. + * + ****************************************************************************************************/ + +#ifdef CONFIG_VS1053 +void up_vs1053initialize(FAR struct spi_dev_s *spi); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MIKROE_STM32F4_SRC_MIKROE_STM32F4_H */ diff --git a/configs/mikroe-stm32f4/src/stm32_appinit.c b/configs/mikroe-stm32f4/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..4ac23362d30c94ed112642534433f51e3381604b --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_appinit.c @@ -0,0 +1,368 @@ +/**************************************************************************** + * config/mikroe_stm32f4/src/stm32_appinit.c + * + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#ifdef CONFIG_STM32_SPI3 +# include +#endif + +#ifdef CONFIG_MTD_M25P +# include +#endif + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#ifdef CONFIG_MIKROE_FLASH_CONFIG_PART +#ifdef CONFIG_PLATFORM_CONFIGDATA +# include +#endif +#endif + +#ifdef CONFIG_STM32_OTGFS +# include "stm32_usbhost.h" +#endif + +#ifdef CONFIG_AUDIO +# include "nuttx/audio/audio.h" +#endif + +#include "stm32.h" +#include "mikroe-stm32f4.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#define HAVE_USBDEV 1 +#define HAVE_USBHOST 1 +#define HAVE_USBMONITOR 1 +#define NSH_HAVEMMCSD 1 + +/* Can't support USB host or device features if USB OTG FS is not enabled */ + +#ifndef CONFIG_STM32_OTGFS +# undef HAVE_USBDEV +# undef HAVE_USBHOST +# undef HAVE_USBMONITOR +#endif + +/* Can't support USB device is USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +# undef HAVE_USBMONITOR +#endif + +/* Can't support USB host is USB host is not enabled */ + +#ifndef CONFIG_USBHOST +# undef HAVE_USBHOST +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR) +# undef HAVE_USBMONITOR +#endif + +/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support + * is not enabled. + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SPI3) +# undef NSH_HAVEMMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +# ifndef CONFIG_RAMMTD_BLOCKSIZE +# define CONFIG_RAMMTD_BLOCKSIZE 512 +# endif + +# ifndef CONFIG_RAMMTD_ERASESIZE +# define CONFIG_RAMMTD_ERASESIZE 4096 +# endif + +# ifndef CONFIG_EXAMPLES_SMART_NEBLOCKS +# define CONFIG_EXAMPLES_SMART_NEBLOCKS (22) +# endif + +#ifdef CONFIG_MIKROE_RAMMTD +# ifndef CONFIG_MIKROE_RAMMTD_MINOR +# define CONFIG_MIKROE_RAMMTD_MINOR 1 +# endif +# ifndef CONFIG_MIKROE_RAMMTD_SIZE +# define CONFIG_MIKROE_RAMMTD_SIZE 32 +# endif +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef CONFIG_STM32_SPI3 + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; +#endif +#if defined(NSH_HAVEMMCSD) || defined(HAVE_USBHOST) || \ + defined(HAVE_USBMONITOR) || defined(CONFIG_LCD_MIO283QT2) || \ + defined(CONFIG_LCD_MIO283QT9A) + int ret; +#endif + + /* Configure SPI-based devices */ + +#ifdef CONFIG_STM32_SPI3 + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port 3\n"); + spi = stm32_spibus_initialize(3); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port 3\n"); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port 3\n"); + + /* Now bind the SPI interface to the M25P8 SPI FLASH driver */ + +#if defined(CONFIG_MTD) && defined(CONFIG_MIKROE_FLASH) + syslog(LOG_INFO, "Bind SPI to the SPI flash driver\n"); + + mtd = m25p_initialize(spi); + if (!mtd) + { + syslog(LOG_ERR, "ERROR: Failed to bind SPI port 3 to the SPI FLASH driver\n"); + } + else + { + syslog(LOG_INFO, "Successfully bound SPI port 3 to the SPI FLASH driver\n"); + +#ifdef CONFIG_MIKROE_FLASH_PART + { + int partno; + int partsize; + int partoffset; + const char *partstring = CONFIG_MIKROE_FLASH_PART_LIST; + const char *ptr; + FAR struct mtd_dev_s *mtd_part; + char partname[4]; + + /* Now create a partition on the FLASH device */ + + partno = 0; + ptr = partstring; + partoffset = 0; + + while (*ptr != '\0') + { + /* Get the partition size */ + + partsize = atoi(ptr); + mtd_part = mtd_partition(mtd, partoffset, (partsize>>2)*16); + partoffset += (partsize >> 2) * 16; + +#ifdef CONFIG_MIKROE_FLASH_CONFIG_PART + /* Test if this is the config partition */ + + if (CONFIG_MIKROE_FLASH_CONFIG_PART_NUMBER == partno) + { + /* Register the partition as the config device */ + + mtdconfig_register(mtd_part); + } + else +#endif + { + /* Now initialize a SMART Flash block device and bind it + * to the MTD device. + */ + +#if defined(CONFIG_MTD_SMART) && defined(CONFIG_FS_SMARTFS) + sprintf(partname, "p%d", partno); + smart_initialize(CONFIG_MIKROE_FLASH_MINOR, mtd_part, partname); +#endif + } + + /* Update the pointer to point to the next size in the list */ + + while ((*ptr >= '0') && (*ptr <= '9')) + { + ptr++; + } + + if (*ptr == ',') + { + ptr++; + } + + /* Increment the part number */ + + partno++; + } + } +#else /* CONFIG_MIKROE_FLASH_PART */ + + /* Configure the device with no partition support */ + + smart_initialize(CONFIG_MIKROE_FLASH_MINOR, mtd, NULL); + +#endif /* CONFIG_MIKROE_FLASH_PART */ + } + + /* Create a RAM MTD device if configured */ + +#if defined(CONFIG_RAMMTD) && defined(CONFIG_MIKROE_RAMMTD) + { + uint8_t *start = (uint8_t *) kmm_malloc(CONFIG_MIKROE_RAMMTD_SIZE * 1024); + mtd = rammtd_initialize(start, CONFIG_MIKROE_RAMMTD_SIZE * 1024); + mtd->ioctl(mtd, MTDIOC_BULKERASE, 0); + + /* Now initialize a SMART Flash block device and bind it to the MTD device */ + +#if defined(CONFIG_MTD_SMART) && defined(CONFIG_FS_SMARTFS) + smart_initialize(CONFIG_MIKROE_RAMMTD_MINOR, mtd, NULL); +#endif + } + +#endif /* CONFIG_RAMMTD && CONFIG_MIKROE_RAMMTD */ + +#endif /* CONFIG_MTD */ +#endif /* CONFIG_STM32_SPI3 */ + + /* Create the SPI FLASH MTD instance */ + /* The M25Pxx is not a good media to implement a file system.. + * its block sizes are too large + */ + + /* Mount the SDIO-based MMC/SD block driver */ + +#ifdef NSH_HAVEMMCSD + /* Bind the spi interface to the MMC/SD driver */ + + syslog(LOG_INFO, "Bind SDIO to the MMC/SD driver, minor=%d\n", + CONFIG_NSH_MMCSDMINOR); + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, CONFIG_NSH_MMCSDSLOTNO, spi); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to bind SPI to the MMC/SD driver: %d\n", ret); + } + else + { + syslog(LOG_INFO, "Successfully bound SPI to the MMC/SD driver\n"); + } +#endif + +#ifdef HAVE_USBHOST + /* Initialize USB host operation. stm32_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + + ret = stm32_usbhost_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret); + } +#endif + +#if defined(CONFIG_LCD_MIO283QT2) || defined(CONFIG_LCD_MIO283QT9A) + /* Configure the TFT LCD module */ + + syslog(LOG_INFO, "Initializing TFT LCD module\n"); + + ret = board_lcd_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize TFT LCD module\n"); + } + +#endif + + /* Configure the Audio sub-system if enabled and bind it to SPI 3 */ + +#ifdef CONFIG_AUDIO + + up_vs1053initialize(spi); + +#endif + + return OK; +} diff --git a/configs/mikroe-stm32f4/src/stm32_boot.c b/configs/mikroe-stm32f4/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..5bd7b9798e4a05c93ab04efc3904c338c8f6dbdd --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_boot.c @@ -0,0 +1,108 @@ +/************************************************************************************ + * configs/mikroe_stm32f4/src/stm32_boot.c + * + * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "mikroe-stm32f4.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* First reset the VS1053 since it tends to produce noise out of power on reset */ + +#ifdef CONFIG_VS1053 + (void)stm32_configgpio(GPIO_VS1053_RST); +#endif + + /* Configure GPIOs for controlling the LCD */ + +#if defined(CONFIG_LCD_MIO283QT2) || defined(CONFIG_LCD_MIO283QT9A) + stm32_lcdinitialize(); +#endif + + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + + /* Initialize USB if the 1) OTG FS controller is in the configuration and 2) + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. Presumeably either CONFIG_USBDEV or CONFIG_USBHOST is also + * selected. + */ + +#ifdef CONFIG_STM32_OTGFS + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif +} diff --git a/configs/mikroe-stm32f4/src/stm32_clockconfig.c b/configs/mikroe-stm32f4/src/stm32_clockconfig.c new file mode 100644 index 0000000000000000000000000000000000000000..f2c153cf00908840a89be38e43a98d9b590f841c --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_clockconfig.c @@ -0,0 +1,150 @@ +/************************************************************************************ + * configs/mikroe_stm32f4/src/stm32_clockconfig.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Ken Pettit + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "mikroe-stm32f4.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_board_clockconfig + * + * Description: + * The Mikroe-STM32F4 board does not have an external crystal, so it must rely + * on the internal 16Mhz RC oscillator. The default clock configuration in the + * OS for the STM32 architecture assumes an external crystal, so we must provide + * a board specific clock configuration routine. + * + ************************************************************************************/ + +#if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG) +void stm32_board_clockconfig(void) +{ + uint32_t regval; + + /* Configure chip clocking to use the internal 16Mhz RC oscillator. + * + * NOTE: We will assume the HSIRDY (High Speed Internal RC Ready) bit is + * set, otherwise we wouldn't be here executing code. + */ + + regval = getreg32(STM32_RCC_APB1ENR); + regval |= RCC_APB1ENR_PWREN; + putreg32(regval, STM32_RCC_APB1ENR); + + regval = getreg32(STM32_PWR_CR); + regval |= PWR_CR_VOS; + putreg32(regval, STM32_PWR_CR); + + /* Set the HCLK source/divider */ + + regval = getreg32(STM32_RCC_CFGR); + regval &= ~RCC_CFGR_HPRE_MASK; + regval |= STM32_RCC_CFGR_HPRE; + putreg32(regval, STM32_RCC_CFGR); + + /* Set the PCLK2 divider */ + + regval = getreg32(STM32_RCC_CFGR); + regval &= ~RCC_CFGR_PPRE2_MASK; + regval |= STM32_RCC_CFGR_PPRE2; + putreg32(regval, STM32_RCC_CFGR); + + /* Set the PCLK1 divider */ + + regval = getreg32(STM32_RCC_CFGR); + regval &= ~RCC_CFGR_PPRE1_MASK; + regval |= STM32_RCC_CFGR_PPRE1; + putreg32(regval, STM32_RCC_CFGR); + + /* Set the PLL dividers and multipliers to configure the main PLL */ + + regval = (STM32_PLLCFG_PLLM | STM32_PLLCFG_PLLN |STM32_PLLCFG_PLLP | + RCC_PLLCFG_PLLSRC_HSI | STM32_PLLCFG_PLLQ); + putreg32(regval, STM32_RCC_PLLCFG); + + /* Enable the main PLL */ + + regval = getreg32(STM32_RCC_CR); + regval |= RCC_CR_PLLON; + putreg32(regval, STM32_RCC_CR); + + /* Wait until the PLL is ready */ + + while ((getreg32(STM32_RCC_CR) & RCC_CR_PLLRDY) == 0) + ; + + /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ + +#ifdef CONFIG_STM32_FLASH_PREFETCH + regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN); +#else + regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN); +#endif + putreg32(regval, STM32_FLASH_ACR); + + /* Select the main PLL as system clock source */ + + regval = getreg32(STM32_RCC_CFGR); + regval &= ~RCC_CFGR_SW_MASK; + regval |= RCC_CFGR_SW_PLL; + putreg32(regval, STM32_RCC_CFGR); + + /* Wait until the PLL source is used as the system clock source */ + + while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL) + ; +} +#endif diff --git a/configs/mikroe-stm32f4/src/stm32_extmem.c b/configs/mikroe-stm32f4/src/stm32_extmem.c new file mode 100644 index 0000000000000000000000000000000000000000..40996822e94130d6400dccf160d40d7907b3f9d8 --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_extmem.c @@ -0,0 +1,187 @@ +/************************************************************************************ + * configs/mikroe_stm32f4/src/stm32_extmem.c + * + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32_fsmc.h" +#include "stm32_gpio.h" +#include "stm32.h" +#include "mikroe-stm32f4.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_STM32_FSMC +# warning "FSMC is not enabled" +#endif + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +#define STM32_FSMC_NADDRCONFIGS 26 +#define STM32_FSMC_NDATACONFIGS 16 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/* GPIO configurations common to most external memories */ + +static const uint32_t g_addressconfig[STM32_FSMC_NADDRCONFIGS] = +{ + GPIO_FSMC_A0, GPIO_FSMC_A1 , GPIO_FSMC_A2, GPIO_FSMC_A3, GPIO_FSMC_A4 , GPIO_FSMC_A5, + GPIO_FSMC_A6, GPIO_FSMC_A7, GPIO_FSMC_A8, GPIO_FSMC_A9, GPIO_FSMC_A10, GPIO_FSMC_A11, + GPIO_FSMC_A12, GPIO_FSMC_A13, GPIO_FSMC_A14, GPIO_FSMC_A15, GPIO_FSMC_A16, GPIO_FSMC_A17, + GPIO_FSMC_A18, GPIO_FSMC_A19, GPIO_FSMC_A20, GPIO_FSMC_A21, GPIO_FSMC_A22, GPIO_FSMC_A23, + GPIO_FSMC_A24, GPIO_FSMC_A25 +}; + +static const uint32_t g_dataconfig[STM32_FSMC_NDATACONFIGS] = +{ + GPIO_FSMC_D0, GPIO_FSMC_D1 , GPIO_FSMC_D2, GPIO_FSMC_D3, GPIO_FSMC_D4 , GPIO_FSMC_D5, + GPIO_FSMC_D6, GPIO_FSMC_D7, GPIO_FSMC_D8, GPIO_FSMC_D9, GPIO_FSMC_D10, GPIO_FSMC_D11, + GPIO_FSMC_D12, GPIO_FSMC_D13, GPIO_FSMC_D14, GPIO_FSMC_D15 +}; + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for external memory usage + * + ************************************************************************************/ + +void stm32_extmemgpios(const uint32_t *gpios, int ngpios) +{ + int i; + + /* Configure GPIOs */ + + for (i = 0; i < ngpios; i++) + { + stm32_configgpio(gpios[i]); + } +} + +/************************************************************************************ + * Name: stm32_extmemaddr + * + * Description: + * Initialize adress line GPIOs for external memory access + * + ************************************************************************************/ + +void stm32_extmemaddr(int naddrs) +{ + stm32_extmemgpios(g_addressconfig, naddrs); +} + +/************************************************************************************ + * Name: stm32_extmemdata + * + * Description: + * Initialize data line GPIOs for external memory access + * + ************************************************************************************/ + +void stm32_extmemdata(int ndata) +{ + stm32_extmemgpios(g_dataconfig, ndata); +} + +/************************************************************************************ + * Name: stm32_enablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +void stm32_enablefsmc(void) +{ + uint32_t regval; + + /* Enable AHB clocking to the FSMC */ + + regval = getreg32( STM32_RCC_AHB3ENR); + regval |= RCC_AHB3ENR_FSMCEN; + putreg32(regval, STM32_RCC_AHB3ENR); +} + +/************************************************************************************ + * Name: stm32_disablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +void stm32_disablefsmc(void) +{ + uint32_t regval; + + /* Disable AHB clocking to the FSMC */ + + regval = getreg32(STM32_RCC_AHB3ENR); + regval &= ~RCC_AHB3ENR_FSMCEN; + putreg32(regval, STM32_RCC_AHB3ENR); +} diff --git a/configs/mikroe-stm32f4/src/stm32_idle.c b/configs/mikroe-stm32f4/src/stm32_idle.c new file mode 100644 index 0000000000000000000000000000000000000000..12c855b49790630cfe29c824420e28b805dfac22 --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_idle.c @@ -0,0 +1,279 @@ +/**************************************************************************** + * configs/mikroe_stm32f4/src/stm32_idle.c + * + * Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +#include +#include +#include +#include + +#include + +#include "up_internal.h" +#include "stm32_pm.h" +#include "stm32_rcc.h" +#include "stm32_exti.h" + +#include "mikroe-stm32f4.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* Does the board support an IDLE LED to indicate that the board is in the + * IDLE state? + */ + +#if defined(CONFIG_ARCH_LEDS) && defined(LED_IDLE) +# define BEGIN_IDLE() board_autoled_on(LED_IDLE) +# define END_IDLE() board_autoled_off(LED_IDLE) +#else +# define BEGIN_IDLE() +# define END_IDLE() +#endif + +/* Values for the RTC Alarm to wake up from the PM_STANDBY mode */ + +#ifndef CONFIG_PM_ALARM_SEC +# define CONFIG_PM_ALARM_SEC 3 +#endif + +#ifndef CONFIG_PM_ALARM_NSEC +# define CONFIG_PM_ALARM_NSEC 0 +#endif + +#define PM_IDLE_DOMAIN 0 /* Revisit */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_PM) && defined(CONFIG_RTC_ALARM) +static void up_alarmcb(void); +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_idlepm + * + * Description: + * Perform IDLE state power management. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void up_idlepm(void) +{ +#ifdef CONFIG_RTC_ALARM + struct timespec alarmtime; +#endif + static enum pm_state_e oldstate = PM_NORMAL; + enum pm_state_e newstate; + irqstate_t flags; + int ret; + + /* Decide, which power saving level can be obtained */ + + newstate = pm_checkstate(PM_IDLE_DOMAIN); + + /* Check for state changes */ + + if (newstate != oldstate) + { + lldbg("newstate= %d oldstate=%d\n", newstate, oldstate); + + flags = enter_critical_section(); + + /* Force the global state change */ + + ret = pm_changestate(PM_IDLE_DOMAIN, newstate); + if (ret < 0) + { + /* The new state change failed, revert to the preceding state */ + + (void)pm_changestate(PM_IDLE_DOMAIN, oldstate); + + /* No state change... */ + + goto errout; + } + + /* Then perform board-specific, state-dependent logic here */ + + switch (newstate) + { + case PM_NORMAL: + { + } + break; + + case PM_IDLE: + { + } + break; + + case PM_STANDBY: + { +#ifdef CONFIG_RTC_ALARM + /* Disable RTC Alarm interrupt */ + +#warning "missing logic" + + /* Configure the RTC alarm to Auto Wake the system */ + +#warning "missing logic" + + /* The tv_nsec value must not exceed 1,000,000,000. That + * would be an invalid time. + */ + +#warning "missing logic" + + /* Set the alarm */ + +#warning "missing logic" +#endif + /* Call the STM32 stop mode */ + + stm32_pmstop(true); + + /* We have been re-awakened by some even: A button press? + * An alarm? Cancel any pending alarm and resume the normal + * operation. + */ + +#ifdef CONFIG_RTC_ALARM +#warning "missing logic" +#endif + /* Resume normal operation */ + + pm_changestate(PM_IDLE_DOMAIN, PM_NORMAL); + newstate = PM_NORMAL; + } + break; + + case PM_SLEEP: + { + /* We should not return from standby mode. The only way out + * of standby is via the reset path. + */ + + (void)stm32_pmstandby(); + } + break; + + default: + break; + } + + /* Save the new state */ + + oldstate = newstate; + +errout: + leave_critical_section(flags); + } +} +#else +# define up_idlepm() +#endif + +/************************************************************************************ + * Name: up_alarmcb + * + * Description: + * RTC alarm service routine + * + ************************************************************************************/ + +#if defined(CONFIG_PM) && defined(CONFIG_RTC_ALARM) +static void up_alarmcb(void) +{ + /* This alarm occurs because there wasn't any EXTI interrupt during the + * PM_STANDBY period. So just go to sleep. + */ + + pm_changestate(PM_IDLE_DOMAIN, PM_SLEEP); +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_idle + * + * Description: + * up_idle() is the logic that will be executed when their is no other + * ready-to-run task. This is processor idle time and will continue until + * some interrupt occurs to cause a context switch from the idle task. + * + * Processing in this state may be processor-specific. e.g., this is where + * power management operations might be performed. + * + ****************************************************************************/ + +void up_idle(void) +{ +#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS) + /* If the system is idle and there are no timer interrupts, then process + * "fake" timer interrupts. Hopefully, something will wake up. + */ + + sched_process_timer(); +#else + + /* Perform IDLE mode power management */ + + BEGIN_IDLE(); + up_idlepm(); + END_IDLE(); +#endif +} + diff --git a/configs/mikroe-stm32f4/src/stm32_mio283qt2.c b/configs/mikroe-stm32f4/src/stm32_mio283qt2.c new file mode 100644 index 0000000000000000000000000000000000000000..028330762367a59a0990844c01ed6b2313da561b --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_mio283qt2.c @@ -0,0 +1,563 @@ +/************************************************************************************** + * configs/mikroe-stm32f4/src/stm32_mio283qt2.c + * + * Interface definition for the MI0283QT-2 LCD from Multi-Inno Technology Co., Ltd. + * This LCD is based on the Himax HX8347-D LCD controller. + * + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Modified: 2013 by Ken Pettit to support Mikroe-STM32F4 board. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************/ + +/************************************************************************************** + * Included Files + **************************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm32_gpio.h" +#include "mikroe-stm32f4.h" + +#ifdef CONFIG_LCD_MIO283QT2 + +/************************************************************************************** + * Pre-processor Definitions + **************************************************************************************/ +/* Configuration **********************************************************************/ + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* Mikroe-STM32F4 Hardware Definitions ************************************************/ +/* --- ---------------------------------- -------------------- ------------------------ + * PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + * (Family Data Sheet Table 1-1) (PIC32MX7 Schematic) + * --- ---------------------------------- -------------------- ------------------------ + * 39 PE8 LCD_RST TFT display + * 46 PE15 LCD-CS# TFT display + * 40 PE9 LCD_BLED LCD backlight LED + * 43 PE12 LCD-RS TFT display + * + * + * 97 RE0 T_D0 TFT display + * 98 RE1 T_D1 TFT display + * 1 RE2 T_D2 TFT display + * 2 RE3 T_D3 TFT display + * 3 RE4 T_D4 TFT display + * 4 RE5 T_D5 TFT display + * 5 RE6 T_D6 TFT display + * 38 RE7 T_D7 TFT display + * + * 41 PE10 PMPRD + * 42 RE11 PMPWR + * + * TOUCHSCREEN PIN CONFIGURATIONS + * PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + * --- ---------------------------------- -------------------- ------------------------ + * 35 PB0 LCD-YD TFT display + * ? LCD-XR TFT display + * ? LCD-YU TFT display + * 36 PB1 LCD-XL TFT display + * 95 PB8 DRIVEA TFT display + * 96 PB9 DRIVEB TFT display + */ + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/************************************************************************************** + * Private Type Definition + **************************************************************************************/ + +struct stm32f4_dev_s +{ + struct mio283qt2_lcd_s dev; /* The externally visible part of the driver */ + bool grammode; /* true=Writing to GRAM (16-bit write vs 8-bit) */ + bool firstread;/* First GRAM read? */ + FAR struct lcd_dev_s *drvr; /* The saved instance of the LCD driver */ +}; + +/************************************************************************************** + * Private Function Protototypes + **************************************************************************************/ +/* Low Level LCD access */ + +static void stm32_select(FAR struct mio283qt2_lcd_s *dev); +static void stm32_deselect(FAR struct mio283qt2_lcd_s *dev); +static void stm32_index(FAR struct mio283qt2_lcd_s *dev, uint8_t index); +#if !defined(CONFIG_MIO283QT2_WRONLY) && !defined(CONFIG_LCD_NOGETRUN) +static uint16_t stm32_read(FAR struct mio283qt2_lcd_s *dev); +#endif +static void stm32_write(FAR struct mio283qt2_lcd_s *dev, uint16_t data); +static void stm32_backlight(FAR struct mio283qt2_lcd_s *dev, int power); + +/************************************************************************************** + * Private Data + **************************************************************************************/ + +/* This is the driver state structure (there is no retained state information) */ + +static struct stm32f4_dev_s g_stm32f4_lcd = +{ + { + .select = stm32_select, + .deselect = stm32_deselect, + .index = stm32_index, +#if !defined(CONFIG_MIO283QT2_WRONLY) && !defined(CONFIG_LCD_NOGETRUN) + .read = stm32_read, +#endif + .write = stm32_write, + .backlight = stm32_backlight + } +}; + +static uint32_t * volatile g_portsetreset = (uint32_t *) STM32_GPIOE_BSRR; + +/************************************************************************************** + * Private Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: stm32_tinydelay + * + * Description: + * Delay for a few hundered NS. + * + **************************************************************************************/ + +static void stm32_tinydelay(void) +{ + volatile uint8_t x = 0; + + for (x = 1; x > 0; x--) + ; +} + +/************************************************************************************** + * Name: stm32_command + * + * Description: + * Configure to write an LCD command + * + **************************************************************************************/ + +static inline void stm32_command(void) +{ + uint32_t * volatile portsetreset = (uint32_t *) STM32_GPIOE_BSRR; + + /* Low selects command */ + + *portsetreset = (1 << LCD_RS_PIN) << 16; +} + +/************************************************************************************** + * Name: stm32_data + * + * Description: + * Configure to read or write LCD data + * + **************************************************************************************/ + +static inline void stm32_data(void) +{ + /* Hi selects data */ + + *g_portsetreset = 1 << LCD_RS_PIN; +} + +/************************************************************************************** + * Name: stm32_select + * + * Description: + * Select the LCD device + * + **************************************************************************************/ + +static void stm32_select(FAR struct mio283qt2_lcd_s *dev) +{ + /* CS low selects */ + + *g_portsetreset = (1 << LCD_CS_PIN) << 16; +} + +/************************************************************************************** + * Name: stm32_deselect + * + * Description: + * De-select the LCD device + * + **************************************************************************************/ + +static void stm32_deselect(FAR struct mio283qt2_lcd_s *dev) +{ + /* CS high de-selects */ + + *g_portsetreset = 1 << LCD_CS_PIN; +} + +/************************************************************************************** + * Name: stm32_index + * + * Description: + * Set the index register + * + **************************************************************************************/ + +static void stm32_index(FAR struct mio283qt2_lcd_s *dev, uint8_t index) +{ + FAR struct stm32f4_dev_s *priv = (FAR struct stm32f4_dev_s *)dev; + + /* Setup to write in command mode (vs data mode) */ + + stm32_command(); + + /* Write the index register to the 8-bit GPIO pin bus. We are violating the + * datasheet here a little by driving the WR pin low at the same time as + * the data, but the fact is that all ASIC logic will latch on the rising + * edge of WR anyway, not the falling edge. We are just shaving off a few + * cycles every time this routine is called, which will be farirly often. + */ + + *g_portsetreset = index | ((uint8_t) (~index) << 16) | + ((1 << LCD_PMPWR_PIN) << 16); + + /* Record if we are accessing GRAM or not (16 vs 8 bit accesses) + * NOTE. This also serves as a delay between WR low to WR high + * transition. + */ + + priv->grammode = index == 0x22; + priv->firstread = true; + + /* Now raise the WR line */ + + *g_portsetreset = (1 << LCD_PMPWR_PIN); + + /* Back to data mode to read/write the data */ + + stm32_data(); +} + +/************************************************************************************** + * Name: stm32_read + * + * Description: + * Read LCD data (GRAM data or register contents) + * + **************************************************************************************/ + +#if !defined(CONFIG_MIO283QT2_WRONLY) && !defined(CONFIG_LCD_NOGETRUN) +static uint16_t stm32_read(FAR struct mio283qt2_lcd_s *dev) +{ + FAR struct stm32f4_dev_s *priv = (FAR struct stm32f4_dev_s *)dev; + uint32_t * volatile portsetreset = (uint32_t *) STM32_GPIOE_BSRR; + uint32_t * volatile portmode = (uint32_t *) STM32_GPIOE_MODER; + uint32_t * volatile portinput = (uint32_t *) STM32_GPIOE_IDR; + uint16_t data; + + /* Set the I/O Port to input mode. Ugly, but fast. */ + + *portmode &= 0xFFFF0000; + + /* Read the data */ + + *portsetreset = (1 << LCD_PMPRD_PIN) << 16; + stm32_tinydelay(); + data = *portinput & 0x00FF; + *portsetreset = (1 << LCD_PMPRD_PIN); + + /* Test if a 16-bit read is needed (GRAM mode) */ + + if (priv->grammode) + { + /* If this is the 1st GRAM read, then discard the dummy byte */ + + if (priv->firstread) + { + priv->firstread = false; + *portsetreset = (1 << LCD_PMPRD_PIN) << 16; + stm32_tinydelay(); + data = *portinput; + *portsetreset = (1 << LCD_PMPRD_PIN); + } + + /* Okay, a 16-bit read is actually a 24-bit read from the LCD. + * this is because the read color format of the MIO283QT-2 is a bit + * different than the 16-bit write color format. During a read, + * the R,G and B samples are read on subsequent bytes, and the + * data is MSB aligned. We must re-construct the 16-bit 565 data. + */ + + /* Clip RED sample to 5-bits and shit to MSB */ + + data = (data & 0xF8) << 8; + + /* Now read Green sample */ + + *portsetreset = (1 << LCD_PMPRD_PIN) << 16; + stm32_tinydelay(); + data |= (*portinput & 0x00FC) << 3; + *portsetreset = (1 << LCD_PMPRD_PIN); + + /* Now read Blue sample */ + + *portsetreset = (1 << LCD_PMPRD_PIN) << 16; + stm32_tinydelay(); + data |= (*portinput & 0x00F8) >> 3; + *portsetreset = (1 << LCD_PMPRD_PIN); + } + + /* Put the port back in output mode. Ugly, but fast. */ + + *portmode |= 0x00005555; + + return data; +} +#endif + +/************************************************************************************** + * Name: stm32_write + * + * Description: + * Write LCD data (GRAM data or register contents) + * + **************************************************************************************/ + +static void stm32_write(FAR struct mio283qt2_lcd_s *dev, uint16_t data) +{ + FAR struct stm32f4_dev_s *priv = (FAR struct stm32f4_dev_s *)dev; + + /* Write the data register to the 8-bit GPIO pin bus. We are violating the + * datasheet here a little by driving the WR pin low at the same time as + * the data, but the fact is that all ASIC logic will latch on the rising + * edge of WR anyway, not the falling edge. We are just shaving off a few + * cycles every time this routine is called, which will be farirly often. + */ + + if (priv->grammode) + { + /* Need to write 16-bit pixel data (16 BPP). Write the upper pixel data first */ + + *g_portsetreset = ((data>>8) & 0xFF) | (((~data>>8) & 0xFF) << 16) | + ((1 << LCD_PMPWR_PIN) << 16); + stm32_tinydelay(); + *g_portsetreset = (1 << LCD_PMPWR_PIN); + } + + /* Now write the lower 8-bit of data */ + + *g_portsetreset = (data & 0xFF) | ((~data & 0xFF) << 16) | + ((1 << LCD_PMPWR_PIN) << 16); + stm32_tinydelay(); + *g_portsetreset = (1 << LCD_PMPWR_PIN); +} + +/************************************************************************************** + * Name: stm32_backlight + * + * Description: + * Set the backlight power level. + * + **************************************************************************************/ + +static void stm32_backlight(FAR struct mio283qt2_lcd_s *dev, int power) +{ + /* For now, we just control the backlight as a discrete. Pulse width modulation + * would be required to vary the backlight level. A low value turns the backlight + * off. + */ + + stm32_gpiowrite(GPIO_LCD_BLED, power > 0); +} + +/************************************************************************************** + * Public Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: stm32_lcdinitialize + * + * Description: + * Initialize the LCD. This function should be called early in the boot + * sequendce -- Even if the LCD is not enabled. In that case we should + * at a minimum at least disable the LCD backlight. + * + **************************************************************************************/ + +void stm32_lcdinitialize(void) +{ + /* Configure all LCD discrete controls. LCD will be left in this state: + * 1. Held in reset, + * 2. Not selected, + * 3. Backlight off, + * 4. Command selected. + */ + +#ifdef CONFIG_LCD_MIO283QT2 + stm32_configgpio(GPIO_LCD_RST); + stm32_configgpio(GPIO_LCD_CS); + stm32_configgpio(GPIO_LCD_BLED); + stm32_gpiowrite(GPIO_LCD_BLED, false); + stm32_configgpio(GPIO_LCD_RS); + stm32_configgpio(GPIO_LCD_PMPWR); + stm32_configgpio(GPIO_LCD_PMPRD); + + /* Configure PE0-7 for output */ + + stm32_configgpio(GPIO_LCD_T_D0); + stm32_configgpio(GPIO_LCD_T_D1); + stm32_configgpio(GPIO_LCD_T_D2); + stm32_configgpio(GPIO_LCD_T_D3); + stm32_configgpio(GPIO_LCD_T_D4); + stm32_configgpio(GPIO_LCD_T_D5); + stm32_configgpio(GPIO_LCD_T_D6); + stm32_configgpio(GPIO_LCD_T_D7); + +#else + /* Just configure the backlight control as an output and turn off the + * backlight for now. + */ + + stm32_configgpio(GPIO_LCD_BLED); +#endif +} + +/************************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + **************************************************************************************/ + +int board_lcd_initialize(void) +{ + /* Only initialize the driver once. NOTE: The LCD GPIOs were already configured + * by stm32_lcdinitialize. + */ + + if (!g_stm32f4_lcd.drvr) + { + lcdvdbg("Initializing\n"); + + /* Hold the LCD in reset (active low) */ + + stm32_gpiowrite(GPIO_LCD_RST, false); + + /* Bring the LCD out of reset */ + + up_mdelay(5); + stm32_gpiowrite(GPIO_LCD_RST, true); + + /* Configure and enable the LCD */ + + up_mdelay(50); + g_stm32f4_lcd.drvr = mio283qt2_lcdinitialize(&g_stm32f4_lcd.dev); + if (!g_stm32f4_lcd.drvr) + { + lcddbg("ERROR: mio283qt2_lcdinitialize failed\n"); + return -ENODEV; + } + } + + /* Turn the display off */ + + g_stm32f4_lcd.drvr->setpower(g_stm32f4_lcd.drvr, 0); + return OK; +} + +/************************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows support + * for multiple LCD devices. + * + **************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return g_stm32f4_lcd.drvr; +} + +/************************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Unitialize the LCD support + * + **************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* Turn the display off */ + + g_stm32f4_lcd.drvr->setpower(g_stm32f4_lcd.drvr, 0); +} + +#endif /* CONFIG_LCD_MIO283QT2 */ diff --git a/configs/mikroe-stm32f4/src/stm32_mio283qt9a.c b/configs/mikroe-stm32f4/src/stm32_mio283qt9a.c new file mode 100644 index 0000000000000000000000000000000000000000..e474514c3a10ff1b93d5f00c6e3dc7de72a23a63 --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_mio283qt9a.c @@ -0,0 +1,564 @@ +/************************************************************************************** + * configs/mikroe-stm32f4/src/stm32_mio283qt9a.c + * + * Interface definition for the MI0283QT-9A LCD from Multi-Inno Technology Co., Ltd. + * LCD is based on the Ilitek ILI9341 LCD controller. + * + * Copyright (C) 2012-2014 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Modified: 2013-2014 by Ken Pettit to support Mikroe-STM32F4 board. + * Adapted by Tobias Duckworth for the MI0283QT-9A + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************/ + +/************************************************************************************** + * Included Files + **************************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm32_gpio.h" +#include "mikroe-stm32f4.h" + +#ifdef CONFIG_LCD_MIO283QT9A + +/************************************************************************************** + * Pre-processor Definitions + **************************************************************************************/ +/* Configuration **********************************************************************/ + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* Mikroe-STM32F4 Hardware Definitions ************************************************/ +/* --- ---------------------------------- -------------------- ------------------------ + * PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + * (Family Data Sheet Table 1-1) (PIC32MX7 Schematic) + * --- ---------------------------------- -------------------- ------------------------ + * 39 PE8 LCD_RST TFT display + * 46 PE15 LCD-CS# TFT display + * 40 PE9 LCD_BLED LCD backlight LED + * 43 PE12 LCD-RS TFT display + * + * + * 97 RE0 T_D0 TFT display + * 98 RE1 T_D1 TFT display + * 1 RE2 T_D2 TFT display + * 2 RE3 T_D3 TFT display + * 3 RE4 T_D4 TFT display + * 4 RE5 T_D5 TFT display + * 5 RE6 T_D6 TFT display + * 38 RE7 T_D7 TFT display + * + * 41 PE10 PMPRD + * 42 RE11 PMPWR + * + * TOUCHSCREEN PIN CONFIGURATIONS + * PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + * --- ---------------------------------- -------------------- ------------------------ + * 35 PB0 LCD-YD TFT display + * ? LCD-XR TFT display + * ? LCD-YU TFT display + * 36 PB1 LCD-XL TFT display + * 95 PB8 DRIVEA TFT display + * 96 PB9 DRIVEB TFT display + */ + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/************************************************************************************** + * Private Type Definition + **************************************************************************************/ + +struct stm32f4_dev_s +{ + struct mio283qt9a_lcd_s dev; /* The externally visible part of the driver */ + bool grammode; /* true=Writing to GRAM (16-bit write vs 8-bit) */ + bool firstread; /* First GRAM read? */ + FAR struct lcd_dev_s *drvr; /* The saved instance of the LCD driver */ +}; + +/************************************************************************************** + * Private Function Protototypes + **************************************************************************************/ +/* Low Level LCD access */ + +static void stm32_select(FAR struct mio283qt9a_lcd_s *dev); +static void stm32_deselect(FAR struct mio283qt9a_lcd_s *dev); +static void stm32_index(FAR struct mio283qt9a_lcd_s *dev, uint8_t index); +#if !defined(CONFIG_MIO283QT2_WRONLY) && !defined(CONFIG_LCD_NOGETRUN) +static uint16_t stm32_read(FAR struct mio283qt9a_lcd_s *dev); +#endif +static void stm32_write(FAR struct mio283qt9a_lcd_s *dev, uint16_t data); +static void stm32_backlight(FAR struct mio283qt9a_lcd_s *dev, int power); + +/************************************************************************************** + * Private Data + **************************************************************************************/ + +/* This is the driver state structure (there is no retained state information) */ + +static struct stm32f4_dev_s g_stm32f4_lcd = +{ + { + .select = stm32_select, + .deselect = stm32_deselect, + .index = stm32_index, +#if !defined(CONFIG_MIO283QT2_WRONLY) && !defined(CONFIG_LCD_NOGETRUN) + .read = stm32_read, +#endif + .write = stm32_write, + .backlight = stm32_backlight + } +}; + +static uint32_t * volatile g_portsetreset = (uint32_t *) STM32_GPIOE_BSRR; + +/************************************************************************************** + * Private Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: stm32_tinydelay + * + * Description: + * Delay for a few hundred NS. + * + **************************************************************************************/ + +static void stm32_tinydelay(void) +{ + volatile uint8_t x = 0; + + for (x = 1; x > 0; x--) + ; +} + +/************************************************************************************** + * Name: stm32_command + * + * Description: + * Configure to write an LCD command + * + **************************************************************************************/ + +static inline void stm32_command(void) +{ + uint32_t * volatile portsetreset = (uint32_t *) STM32_GPIOE_BSRR; + + /* Low selects command */ + + *portsetreset = (1 << LCD_RS_PIN) << 16; +} + +/************************************************************************************** + * Name: stm32_data + * + * Description: + * Configure to read or write LCD data + * + **************************************************************************************/ + +static inline void stm32_data(void) +{ + /* Hi selects data */ + + *g_portsetreset = 1 << LCD_RS_PIN; +} + +/************************************************************************************** + * Name: stm32_select + * + * Description: + * Select the LCD device + * + **************************************************************************************/ + +static void stm32_select(FAR struct mio283qt9a_lcd_s *dev) +{ + /* CS low selects */ + + *g_portsetreset = (1 << LCD_CS_PIN) << 16; +} + +/************************************************************************************** + * Name: stm32_deselect + * + * Description: + * De-select the LCD device + * + **************************************************************************************/ + +static void stm32_deselect(FAR struct mio283qt9a_lcd_s *dev) +{ + /* CS high de-selects */ + + *g_portsetreset = 1 << LCD_CS_PIN; +} + +/************************************************************************************** + * Name: stm32_index + * + * Description: + * Set the index register + * + **************************************************************************************/ + +static void stm32_index(FAR struct mio283qt9a_lcd_s *dev, uint8_t index) +{ + FAR struct stm32f4_dev_s *priv = (FAR struct stm32f4_dev_s *)dev; + + /* Setup to write in command mode (vs data mode) */ + + stm32_command(); + + /* Write the index register to the 8-bit GPIO pin bus. We are violating the + * datasheet here a little by driving the WR pin low at the same time as + * the data, but the fact is that all ASIC logic will latch on the rising + * edge of WR anyway, not the falling edge. We are just shaving off a few + * cycles every time this routine is called, which will be fairly often. + */ + + *g_portsetreset = index | ((uint8_t) (~index) << 16) | + ((1 << LCD_PMPWR_PIN) << 16); + + /* Record if we are accessing GRAM or not (16 vs 8 bit accesses) + * NOTE. This also serves as a delay between WR low to WR high + * transition. + */ + + priv->grammode = index == 0x2c; + priv->firstread = true; + + /* Now raise the WR line */ + + *g_portsetreset = (1 << LCD_PMPWR_PIN); + + /* Back to data mode to read/write the data */ + + stm32_data(); +} + +/************************************************************************************** + * Name: stm32_read + * + * Description: + * Read LCD data (GRAM data or register contents) + * + **************************************************************************************/ + +#if !defined(CONFIG_MIO283QT2_WRONLY) && !defined(CONFIG_LCD_NOGETRUN) +static uint16_t stm32_read(FAR struct mio283qt9a_lcd_s *dev) +{ + FAR struct stm32f4_dev_s *priv = (FAR struct stm32f4_dev_s *)dev; + uint32_t * volatile portsetreset = (uint32_t *) STM32_GPIOE_BSRR; + uint32_t * volatile portmode = (uint32_t *) STM32_GPIOE_MODER; + uint32_t * volatile portinput = (uint32_t *) STM32_GPIOE_IDR; + uint16_t data; + + /* Set the I/O Port to input mode. Ugly, but fast. */ + + *portmode &= 0xFFFF0000; + + /* Read the data */ + + *portsetreset = (1 << LCD_PMPRD_PIN) << 16; + stm32_tinydelay(); + data = *portinput & 0x00FF; + *portsetreset = (1 << LCD_PMPRD_PIN); + + /* Test if a 16-bit read is needed (GRAM mode) */ + + if (priv->grammode) + { + /* If this is the 1st GRAM read, then discard the dummy byte */ + + if (priv->firstread) + { + priv->firstread = false; + *portsetreset = (1 << LCD_PMPRD_PIN) << 16; + stm32_tinydelay(); + data = *portinput; + *portsetreset = (1 << LCD_PMPRD_PIN); + } + + /* Okay, a 16-bit read is actually a 24-bit read from the LCD. + * this is because the read color format of the MIO283QT-2 is a bit + * different than the 16-bit write color format. During a read, + * the R,G and B samples are read on subsequent bytes, and the + * data is MSB aligned. We must re-construct the 16-bit 565 data. + */ + + /* Clip RED sample to 5-bits and shit to MSB */ + + data = (data & 0xF8) << 8; + + /* Now read Green sample */ + + *portsetreset = (1 << LCD_PMPRD_PIN) << 16; + stm32_tinydelay(); + data |= (*portinput & 0x00FC) << 3; + *portsetreset = (1 << LCD_PMPRD_PIN); + + /* Now read Blue sample */ + + *portsetreset = (1 << LCD_PMPRD_PIN) << 16; + stm32_tinydelay(); + data |= (*portinput & 0x00F8) >> 3; + *portsetreset = (1 << LCD_PMPRD_PIN); + } + + /* Put the port back in output mode. Ugly, but fast. */ + + *portmode |= 0x00005555; + + return data; +} +#endif + +/************************************************************************************** + * Name: stm32_write + * + * Description: + * Write LCD data (GRAM data or register contents) + * + **************************************************************************************/ + +static void stm32_write(FAR struct mio283qt9a_lcd_s *dev, uint16_t data) +{ + FAR struct stm32f4_dev_s *priv = (FAR struct stm32f4_dev_s *)dev; + + /* Write the data register to the 8-bit GPIO pin bus. We are violating the + * datasheet here a little by driving the WR pin low at the same time as + * the data, but the fact is that all ASIC logic will latch on the rising + * edge of WR anyway, not the falling edge. We are just shaving off a few + * cycles every time this routine is called, which will be fairly often. + */ + + if (priv->grammode) + { + /* Need to write 16-bit pixel data (16 BPP). Write the upper pixel data first */ + + *g_portsetreset = ((data>>8) & 0xFF) | (((~data>>8) & 0xFF) << 16) | + ((1 << LCD_PMPWR_PIN) << 16); + stm32_tinydelay(); + *g_portsetreset = (1 << LCD_PMPWR_PIN); + } + + /* Now write the lower 8-bit of data */ + + *g_portsetreset = (data & 0xFF) | ((~data & 0xFF) << 16) | + ((1 << LCD_PMPWR_PIN) << 16); + stm32_tinydelay(); + *g_portsetreset = (1 << LCD_PMPWR_PIN); +} + +/************************************************************************************** + * Name: stm32_backlight + * + * Description: + * Set the backlight power level. + * + **************************************************************************************/ + +static void stm32_backlight(FAR struct mio283qt9a_lcd_s *dev, int power) +{ + /* For now, we just control the backlight as a discrete. Pulse width modulation + * would be required to vary the backlight level. A low value turns the backlight + * off. + */ + + stm32_gpiowrite(GPIO_LCD_BLED, power > 0); +} + +/************************************************************************************** + * Public Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: stm32_lcdinitialize + * + * Description: + * Initialize the LCD. This function should be called early in the boot + * sequendce -- Even if the LCD is not enabled. In that case we should + * at a minimum at least disable the LCD backlight. + * + **************************************************************************************/ + +void stm32_lcdinitialize(void) +{ + /* Configure all LCD discrete controls. LCD will be left in this state: + * 1. Held in reset, + * 2. Not selected, + * 3. Backlight off, + * 4. Command selected. + */ + +#ifdef CONFIG_LCD_MIO283QT9A + stm32_configgpio(GPIO_LCD_RST); + stm32_configgpio(GPIO_LCD_CS); + stm32_configgpio(GPIO_LCD_BLED); + stm32_gpiowrite(GPIO_LCD_BLED, false); + stm32_configgpio(GPIO_LCD_RS); + stm32_configgpio(GPIO_LCD_PMPWR); + stm32_configgpio(GPIO_LCD_PMPRD); + + /* Configure PE0-7 for output */ + + stm32_configgpio(GPIO_LCD_T_D0); + stm32_configgpio(GPIO_LCD_T_D1); + stm32_configgpio(GPIO_LCD_T_D2); + stm32_configgpio(GPIO_LCD_T_D3); + stm32_configgpio(GPIO_LCD_T_D4); + stm32_configgpio(GPIO_LCD_T_D5); + stm32_configgpio(GPIO_LCD_T_D6); + stm32_configgpio(GPIO_LCD_T_D7); + +#else + /* Just configure the backlight control as an output and turn off the + * backlight for now. + */ + + stm32_configgpio(GPIO_LCD_BLED); +#endif +} + +/************************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + **************************************************************************************/ + +int board_lcd_initialize(void) +{ + /* Only initialize the driver once. NOTE: The LCD GPIOs were already configured + * by stm32_lcdinitialize. + */ + + if (!g_stm32f4_lcd.drvr) + { + lcdvdbg("Initializing\n"); + + /* Hold the LCD in reset (active low) */ + + stm32_gpiowrite(GPIO_LCD_RST, false); + + /* Bring the LCD out of reset */ + + up_mdelay(5); + stm32_gpiowrite(GPIO_LCD_RST, true); + + /* Configure and enable the LCD */ + + up_mdelay(50); + g_stm32f4_lcd.drvr = mio283qt9a_lcdinitialize(&g_stm32f4_lcd.dev); + if (!g_stm32f4_lcd.drvr) + { + lcddbg("ERROR: mio283qt9a_lcdinitialize failed\n"); + return -ENODEV; + } + } + + /* Turn the display off */ + + g_stm32f4_lcd.drvr->setpower(g_stm32f4_lcd.drvr, 0); + return OK; +} + +/************************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows support + * for multiple LCD devices. + * + **************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return g_stm32f4_lcd.drvr; +} + +/************************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Uninitialize the LCD support + * + **************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* Turn the display off */ + + g_stm32f4_lcd.drvr->setpower(g_stm32f4_lcd.drvr, 0); +} + +#endif /* CONFIG_LCD_MIO283QT9A */ diff --git a/configs/mikroe-stm32f4/src/stm32_pm.c b/configs/mikroe-stm32f4/src/stm32_pm.c new file mode 100644 index 0000000000000000000000000000000000000000..c5f89f50abbdb9f9655bdd3bb187273fa138925b --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_pm.c @@ -0,0 +1,106 @@ +/**************************************************************************** + * configs/mikroe_stm32f4/src/stm32_pm.c + * + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "up_internal.h" +#include "stm32_pm.h" +#include "mikroe-stm32f4.h" + +#ifdef CONFIG_PM + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_pminitialize + * + * Description: + * This function is called by MCU-specific logic at power-on reset in + * order to provide one-time initialization the power management subystem. + * This function must be called *very* early in the initializeation sequence + * *before* any other device drivers are initialized (since they may + * attempt to register with the power management subsystem). + * + * Input parameters: + * None. + * + * Returned value: + * None. + * + ****************************************************************************/ + +void up_pminitialize(void) +{ + /* Then initialize the NuttX power management subsystem proper */ + + pm_initialize(); + +#if defined(CONFIG_ARCH_IDLE_CUSTOM) && defined(CONFIG_PM_BUTTONS) + /* Initialize the buttons to wake up the system from low power modes */ + + up_pmbuttons(); +#endif + + /* Initialize the LED PM */ + + up_ledpminitialize(); +} + +#endif /* CONFIG_PM */ diff --git a/configs/mikroe-stm32f4/src/stm32_pwm.c b/configs/mikroe-stm32f4/src/stm32_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..11f0ea7c25399a30cf0937764327f39d30187408 --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_pwm.c @@ -0,0 +1,143 @@ +/************************************************************************************ + * configs/mikroe_stm32f4/src/stm32_pwm.c + * + * Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "stm32_pwm.h" +#include "mikroe-stm32f4.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* PWM + * + * The mikroe_stm32f4 has no real on-board PWM devices, but the board can be configured to output + * a pulse train using TIM4 CH2. This pin is used by FSMC is connect to CN5 just for this + * purpose: + * + * PD13 FSMC_A18 / MC_TIM4_CH2OUT pin 33 (EnB) + * + * FSMC must be disabled in this case! + */ + +#define HAVE_PWM 1 + +#ifndef CONFIG_PWM +# undef HAVE_PWM +#endif + +#ifndef CONFIG_STM32_TIM4 +# undef HAVE_PWM +#endif + +#ifndef CONFIG_STM32_TIM4_PWM +# undef HAVE_PWM +#endif + +#if CONFIG_STM32_TIM4_CHANNEL != STM32F4DISCOVERY_PWMCHANNEL +# undef HAVE_PWM +#endif + +#ifdef HAVE_PWM + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + pwm = stm32_pwminitialize(STM32F4DISCOVERY_PWMTIMER); + if (!pwm) + { + dbg("Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* HAVE_PWM */ diff --git a/configs/mikroe-stm32f4/src/stm32_qencoder.c b/configs/mikroe-stm32f4/src/stm32_qencoder.c new file mode 100644 index 0000000000000000000000000000000000000000..bcbb5dc438c9b1d61e85a9c91eef3fe26c4c9114 --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_qencoder.c @@ -0,0 +1,162 @@ +/************************************************************************************ + * configs/mikroe_stm32f4/src/stm32_qencoder.c + * + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "stm32_qencoder.h" +#include "mikroe-stm32f4.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Check if we have a timer configured for quadrature encoder -- assume YES. */ + +#define HAVE_QENCODER 1 + +/* If TIMn is not enabled (via CONFIG_STM32_TIMn), then the configuration cannot + * specify TIMn as a quadrature encoder (via CONFIG_STM32_TIMn_QE). + */ + +#ifndef CONFIG_STM32_TIM1 +# undef CONFIG_STM32_TIM1_QE +#endif +#ifndef CONFIG_STM32_TIM2 +# undef CONFIG_STM32_TIM2_QE +#endif +#ifndef CONFIG_STM32_TIM3 +# undef CONFIG_STM32_TIM3_QE +#endif +#ifndef CONFIG_STM32_TIM4 +# undef CONFIG_STM32_TIM4_QE +#endif +#ifndef CONFIG_STM32_TIM5 +# undef CONFIG_STM32_TIM5_QE +#endif +#ifndef CONFIG_STM32_TIM8 +# undef CONFIG_STM32_TIM8_QE +#endif + +/* If the upper-half quadrature encoder driver is not enabled, then we cannot + * support the quadrature encoder. + */ + +#ifndef CONFIG_QENCODER +# undef HAVE_QENCODER +#endif + +/* Which Timer should we use, TIMID={1,2,3,4,5,8}. If multiple timers are + * configured as quadrature encoders, this logic will arbitrarily select + * the lowest numbered timer. + * + * At least one TIMn, n={1,2,3,4,5,8}, must be both enabled and configured + * as a quadrature encoder in order to support the lower half quadrature + * encoder driver. The above check assures that if CONFIG_STM32_TIMn_QE + * is defined, then the correspdonding TIMn is also enabled. + */ + +#if defined CONFIG_STM32_TIM1_QE +# define TIMID 1 +#elif defined CONFIG_STM32_TIM2_QE +# define TIMID 2 +#elif defined CONFIG_STM32_TIM3_QE +# define TIMID 3 +#elif defined CONFIG_STM32_TIM4_QE +# define TIMID 4 +#elif defined CONFIG_STM32_TIM5_QE +# define TIMID 5 +#elif defined CONFIG_STM32_TIM8_QE +# define TIMID 8 +#else +# undef HAVE_QENCODER +#endif + +#ifdef HAVE_QENCODER + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: qe_devinit + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/qencoder. + * + ************************************************************************************/ + +int qe_devinit(void) +{ + static bool initialized = false; + int ret; + + /* Check if we are already initialized */ + + if (!initialized) + { + /* Initialize a quadrature encoder interface. */ + + snvdbg("Initializing the quadrature encoder using TIM%d\n", TIMID); + ret = stm32_qeinitialize("/dev/qe0", TIMID); + if (ret < 0) + { + sndbg("stm32_qeinitialize failed: %d\n", ret); + return ret; + } + + initialized = true; + } + + return OK; +} + +#endif /* HAVE_QENCODER */ diff --git a/configs/mikroe-stm32f4/src/stm32_spi.c b/configs/mikroe-stm32f4/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..f56a075849164a7653a82eecaf4ce907e42c227b --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_spi.c @@ -0,0 +1,281 @@ +/************************************************************************************ + * configs/mikroe_stm32f4/src/stm32_spi.c + * + * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Modifications: + * + * - 4/16/2013: Ken Pettit + * - Modified to support SPI3 on Mikroe-STM32F4 board. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "mikroe-stm32f4.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the mikroe_stm32f4 board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ +#ifdef CONFIG_STM32_SPI3 + +#ifdef CONFIG_MTD_M25P + (void)stm32_configgpio(GPIO_CS_FLASH); /* FLASH chip select */ +#endif + +#if defined(CONFIG_MMCSD) + (void)stm32_configgpio(GPIO_CS_MMCSD); /* MMC/SD chip select */ + (void)stm32_configgpio(GPIO_SD_CD); /* MMC/SD card detect */ +#endif + +#ifdef CONFIG_VS1053 + (void)stm32_configgpio(GPIO_CS_MP3_DATA); /* MP3 codec chip select for DATA */ + (void)stm32_configgpio(GPIO_CS_MP3_CMD); /* MP3 codec chip select for CMD */ +#endif + + /* Configure the EXP I/O cs for SPI3 */ + (void)stm32_configgpio(GPIO_CS_EXP_SPI3); /* Expander chip select */ + +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + + spivdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +#if defined(CONFIG_VS1053) + if (devid == SPIDEV_AUDIO_DATA) + { + stm32_gpiowrite(GPIO_CS_MP3_DATA, !selected); + } + else if (devid == SPIDEV_AUDIO_CTRL) + { + stm32_gpiowrite(GPIO_CS_MP3_CMD, !selected); + } + else +#endif + +#if defined(CONFIG_MMCSD) + if (devid == SPIDEV_MMCSD) + { + stm32_gpiowrite(GPIO_CS_MMCSD, !selected); + } + else +#endif + +#if defined(CONFIG_MTD_M25P) + if (devid == SPIDEV_FLASH) + { + stm32_gpiowrite(GPIO_CS_FLASH, !selected); + } + else +#endif + + /* Must be the expansion header device */ + + if (devid == SPIDEV_EXPANDER) + { + stm32_gpiowrite(GPIO_CS_EXP_SPI3, !selected); + } +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + +#if defined(CONFIG_MMCSD) + if (devid == SPIDEV_MMCSD) + { + /* A low value indicates the card is present */ + + if (!stm32_gpioread(GPIO_SD_CD)) + { + ret = SPI_STATUS_PRESENT; + } + } +#endif + + return ret; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif +#endif /* CONFIG_SPI_CMDDATA */ + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/mikroe-stm32f4/src/stm32_touchscreen.c b/configs/mikroe-stm32f4/src/stm32_touchscreen.c new file mode 100644 index 0000000000000000000000000000000000000000..b9bba5f57a046770acf2419884c5aa400233d592 --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_touchscreen.c @@ -0,0 +1,1608 @@ +/************************************************************************************ + * configs/mikroe-stm32f4/src/stm32_touchscreen.c + * + * Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Modified: May, 2013 by Ken Pettit to adapt for Mikroe-STM32M4 board + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include "up_arch.h" +#include "up_internal.h" + +#include "stm32_adc.h" +#include "stm32_gpio.h" +#include "mikroe-stm32f4.h" + +#ifdef CONFIG_INPUT + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* Reference counting is partially implemented, but not needed in the current design. + */ + +#define CONFIG_TOUCHSCREEN_REFCNT +/* Should we try again on bad samples? */ + +#undef CONFIG_TOUCHSCREEN_RESAMPLE + +/* TP uses ADC Channel #2 in a dedicated mode. Ensure ADC2 not selected for general + * use via the menuconfig */ + +#ifndef CONFIG_STM32_ADC2 +# error Touchpanel Input (CONFIG_INPUT=y) requires enablinga ADC2 (CONFIG_STM32_ADC2=y) +#endif + +/* Work queue support is required */ + +#ifndef CONFIG_SCHED_WORKQUEUE +# warning Work queue support is required (CONFIG_SCHED_WORKQUEUE=y) +#endif + +/* CONFIG_TOUCHSCREEN_THRESHX and CONFIG_TOUCHSCREEN_THRESHY + * Touchscreen data comes in a a very high rate. New touch positions + * will only be reported when the X or Y data changes by these thresholds. + * This trades reduces data rate for some loss in dragging accuracy. The + * touchscreen is configure for 12-bit values so the raw ranges are 0-4096. So + * for example, if your display is 320x240, then THRESHX=3 and THRESHY=4 + * would correspond to one pixel. Default: 4 + */ + +#ifndef CONFIG_TOUCHSCREEN_THRESHX +# define CONFIG_TOUCHSCREEN_THRESHX 12 +#endif + +#ifndef CONFIG_TOUCHSCREEN_THRESHY +# define CONFIG_TOUCHSCREEN_THRESHY 12 +#endif + +#ifndef CONFIG_TOUCHSCREEN_AVG_SAMPLES +# define CONFIG_TOUCHSCREEN_AVG_SAMPLES 2 +#endif + +/* Driver support *******************************************************************/ +/* This format is used to construct the /dev/input[n] device driver path. It is + * defined here so that it will be used consistently in all places. + */ + +#define DEV_FORMAT "/dev/input%d" +#define DEV_NAMELEN 16 + +/* Mikroe-STM32M4 Touchscreen Hardware Definitions ********************************* + * PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + * --- ---------------------------------- -------------------- ------------------------ + * 35 PB0 LCD-YD YD Analog input + * 36 PB1 LCD-XL XL Analog input + * 95 PB8 DRIVEA Drives XR, XL and YU + * 96 PB9 DRIVEB Drives YD + */ + +#define LCD_YD_PIN (0) +#define LCD_XL_PIN (1) +#define LCD_YD_CHANNEL (8) +#define LCD_XL_CHANNEL (9) +#define LCD_DRIVEA_PIN (8) +#define LCD_DRIVEB_PIN (9) + +#define LCD_DRIVEA_BIT (1 << LCD_DRIVEA_PIN) +#define LCD_DRIVEB_BIT (1 << LCD_DRIVEB_PIN) +#define LCD_SAMPX_BITS (LCD_DRIVEA_BIT | (LCD_DRIVEB_BIT << 16)) +#define LCD_SAMPY_BITS (LCD_DRIVEB_BIT | (LCD_DRIVEA_BIT << 16)) +#define LCD_TP_PORT_SETRESET STM32_GPIOB_BSRR + +#define TC_ADC_BASE STM32_ADC2_BASE /* ADC Channel base for TP */ +#define ADC_CR1_ALLINTS (ADC_CR1_AWDIE | ADC_CR1_EOCIE | ADC_CR1_JEOCIE) + +/* Conversions are performed as 10-bit samples represented as 16-bit unsigned integers: */ + +#define MAX_ADC (4096) + +/* A measured value has to be within this range to be considered */ + +#define UPPER_THRESHOLD (MAX_ADC-1) +#define LOWER_THRESHOLD (362) + +/* Delays ***************************************************************************/ +/* All values will be increased by one system timer tick (probably 10MS). */ + +#define TC_PENUP_POLL_TICKS MSEC2TICK(70) /* IDLE polling rate: 70 MSec */ +#define TC_PENDOWN_POLL_TICKS MSEC2TICK(40) /* Active polling rate: 40 MSec */ +#define TC_DEBOUNCE_TICKS MSEC2TICK(16) /* Delay before re-sampling: 16 MSec */ +#define TC_SAMPLE_TICKS MSEC2TICK(4) /* Delay for A/D sampling: 4 MSec */ +#define TC_SETTLE_TICKS MSEC2TICK(10) /* Delay for A/D settling: 10 MSec */ +#define TC_RESAMPLE_TICKS TC_SAMPLE_TICKS + +/************************************************************************************ + * Private Types + ************************************************************************************/ +/* This enumeration describes the state of touchscreen state machine */ + +enum tc_state_e +{ + TC_READY = 0, /* Ready to begin next sample */ + TC_READY_SETTLE, /* Allowing time for Y DRIVE to settle */ + TC_YPENDOWN, /* Allowing time for the Y pen down sampling */ + TC_DEBOUNCE, /* Allowing a debounce time for the first sample */ + TC_RESAMPLE, /* Restart sampling on a bad measurement */ + TC_YSAMPLE, /* Allowing time for the Y sampling */ + TC_XSETTLE, /* Allowing time for the X to settle after changing DRIVE*/ + TC_XSAMPLE, /* Allowing time for the X sampling */ + TC_XRESAMPLE, /* Allow time to resample X */ + TC_PENDOWN, /* Conversion is complete -- pen down */ + TC_PENUP /* Conversion is complete -- pen up */ +}; + +/* This describes the state of one contact */ + +enum tc_contact_e +{ + CONTACT_NONE = 0, /* No contact */ + CONTACT_DOWN, /* First contact */ + CONTACT_MOVE, /* Same contact, possibly different position */ + CONTACT_UP, /* Contact lost */ +}; + +/* This structure describes the results of one touchscreen sample */ + +struct tc_sample_s +{ + uint8_t id; /* Sampled touch point ID */ + uint8_t contact; /* Contact state (see enum tc_contact_e) */ + bool valid; /* True: x,y contain valid, sampled data */ + uint16_t x; /* Thresholded X position */ + uint16_t y; /* Thresholded Y position */ +}; + +/* This structure describes the state of one touchscreen driver instance */ + +struct tc_dev_s +{ +#ifdef CONFIG_TOUCHSCREEN_REFCNT + uint8_t crefs; /* Number of times the device has been opened */ +#endif + uint8_t state; /* See enum tc_state_e */ + uint8_t nwaiters; /* Number of threads waiting for touchscreen data */ + uint8_t id; /* Current touch point ID */ + volatile bool penchange; /* An unreported event is buffered */ + uint16_t value; /* Partial sample value (Y+ or X-) */ + uint16_t newy; /* New, un-thresholded Y value */ + uint8_t sampcount; /* Count of samples for average so far */ + uint8_t resamplecount; /* Countdown to PENUP */ + sem_t devsem; /* Manages exclusive access to this structure */ + sem_t waitsem; /* Used to wait for the availability of data */ + struct tc_sample_s sample; /* Last sampled touch point data */ + struct work_s work; /* Supports the state machine delayed processing */ + + /* The following is a list if poll structures of threads waiting for + * driver events. The 'struct pollfd' reference for each open is also + * retained in the f_priv field of the 'struct file'. + */ + +#ifndef CONFIG_DISABLE_POLL + struct pollfd *fds[CONFIG_TOUCHSCREEN_NPOLLWAITERS]; +#endif +}; + +/************************************************************************************ + * Private Function Prototypes + ************************************************************************************/ + +static void tc_adc_init(void); +static void tc_adc_start_sample(int pin); +static uint16_t tc_adc_read_sample(void); +static void tc_y_sample(void); +static void tc_x_sample(void); +static inline bool tc_valid_sample(uint16_t sample); + +static void tc_notify(FAR struct tc_dev_s *priv); +static int tc_sample(FAR struct tc_dev_s *priv, + FAR struct tc_sample_s *sample); +static int tc_waitsample(FAR struct tc_dev_s *priv, + FAR struct tc_sample_s *sample); +static void tc_worker(FAR void *arg); + +/* Character driver methods */ + +static int tc_open(FAR struct file *filep); +static int tc_close(FAR struct file *filep); +static ssize_t tc_read(FAR struct file *filep, FAR char *buffer, size_t len); +static int tc_ioctl(FAR struct file *filep, int cmd, unsigned long arg); +#ifndef CONFIG_DISABLE_POLL +static int tc_poll(FAR struct file *filep, struct pollfd *fds, bool setup); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* This the vtable that supports the character driver interface */ + +static const struct file_operations tc_fops = +{ + tc_open, /* open */ + tc_close, /* close */ + tc_read, /* read */ + 0, /* write */ + 0, /* seek */ + tc_ioctl /* ioctl */ +#ifndef CONFIG_DISABLE_POLL + , tc_poll /* poll */ +#endif +}; + +/* If only a single touchscreen device is supported, then the driver state + * structure may as well be pre-allocated. + */ + +#ifndef CONFIG_TOUCHSCREEN_MULTIPLE +static struct tc_dev_s g_touchscreen; +static bool g_touchinitdone = false; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ +/************************************************************************************ + * Name: tc_adc_getreg + * + * Description: + * Read the value of an TC ADC channel (#2) register. + * + * Input Parameters: + * offset - The offset to the register to read + * value + * + * Returned Value: + * + ************************************************************************************/ + +static inline uint32_t tc_adc_getreg(int offset) +{ + return getreg32(TC_ADC_BASE + offset); +} + +/************************************************************************************ + * Name: tc_adc_putreg + * + * Description: + * Set the value of an ADC register. + * + * Input Parameters: + * offset - The offset to the register to read + * + * Returned Value: + * + ************************************************************************************/ + +static inline void tc_adc_putreg(int offset, uint32_t value) +{ + putreg32(value, TC_ADC_BASE + offset); +} + +/************************************************************************************ + * Name: tc_adc_init + * + * Description: + * Initialize ADC Channel #2 for use with the touch panel. The touch panel uses + * Channels 8 and 9 (PB0 and PB1) to read the X and Y axis touch positions. + * + ************************************************************************************/ + +static void tc_adc_init(void) +{ + irqstate_t flags; + uint32_t regval; + + /* Do an rcc reset to reset the ADC peripheral */ + + /* Disable interrupts. This is necessary because the APB2RTSR register + * is used by several different drivers. + */ + + flags = enter_critical_section(); + + /* Enable ADC reset state */ + + regval = getreg32(STM32_RCC_APB2RSTR); + regval |= RCC_APB2RSTR_ADCRST; + putreg32(regval, STM32_RCC_APB2RSTR); + + /* Release ADC from reset state */ + + regval &= ~RCC_APB2RSTR_ADCRST; + putreg32(regval, STM32_RCC_APB2RSTR); + + /* Initialize the watchdog high threshold register */ + + tc_adc_putreg(STM32_ADC_HTR_OFFSET, 0x00000fff); + + /* Initialize the watchdog low threshold register */ + + tc_adc_putreg(STM32_ADC_LTR_OFFSET, 0x00000000); + + /* Initialize the same sample time for each ADC 55.5 cycles + * + * During sample cycles channel selection bits must remain unchanged. + * + * 000: 1.5 cycles + * 001: 7.5 cycles + * 010: 13.5 cycles + * 011: 28.5 cycles + * 100: 41.5 cycles + * 101: 55.5 cycles + * 110: 71.5 cycles + * 111: 239.5 cycles + */ + + tc_adc_putreg(STM32_ADC_SMPR1_OFFSET, 0x00b6db6d); + tc_adc_putreg(STM32_ADC_SMPR2_OFFSET, 0x00b6db6d); + + /* ADC CR1 Configuration */ + + regval = tc_adc_getreg(STM32_ADC_CR1_OFFSET); + + /* Initialize the Analog watchdog enable */ + + regval &= ~ADC_CR1_AWDEN; + regval |= (LCD_YD_CHANNEL << ADC_CR1_AWDCH_SHIFT); + + /* Enable interrupt flags */ + + //regval |= ADC_CR1_ALLINTS; + + /* Disable Overrun interrupt */ + + regval &= ~ADC_CR1_OVRIE; + + /* Set the resolution of the conversion. We only need 10 bits. */ + + regval |= ADC_CR1_RES_12BIT; + + tc_adc_putreg(STM32_ADC_CR1_OFFSET, regval); + + /* ADC CR2 Configuration */ + + regval = tc_adc_getreg(STM32_ADC_CR2_OFFSET); + + /* Clear CONT, continuous mode disable. We will perform single + * sampling on one channel at a time. */ + + regval &= ~ADC_CR2_CONT; + + /* Set ALIGN (Right = 0) */ + + regval &= ~ADC_CR2_ALIGN; + + /* External trigger disable. We will do SW triggering */ + + regval &= ~ADC_CR2_EXTEN_MASK; + + tc_adc_putreg(STM32_ADC_CR2_OFFSET, regval); + + /* Configuration of the channel conversion - start with Y sampling */ + + regval = tc_adc_getreg(STM32_ADC_SQR3_OFFSET) & ADC_SQR3_RESERVED; + regval |= LCD_YD_CHANNEL; + tc_adc_putreg(STM32_ADC_SQR3_OFFSET, regval); + + /* Set the number of conversions = 1 */ + + regval = tc_adc_getreg(STM32_ADC_SQR1_OFFSET) & ADC_SQR1_RESERVED; + regval |= 0 << ADC_SQR1_L_SHIFT; + tc_adc_putreg(STM32_ADC_SQR1_OFFSET, regval); + + /* ADC CCR configuration */ + + regval = getreg32(STM32_ADC_CCR); + regval &= ~(ADC_CCR_MULTI_MASK | ADC_CCR_DELAY_MASK | ADC_CCR_DDS | ADC_CCR_DMA_MASK | + ADC_CCR_ADCPRE_MASK | ADC_CCR_VBATE | ADC_CCR_TSVREFE); + regval |= (ADC_CCR_MULTI_NONE | ADC_CCR_DMA_DISABLED | ADC_CCR_ADCPRE_DIV2); + putreg32(regval, STM32_ADC_CCR); + + /* Set ADON to wake up the ADC from Power Down state. */ + + regval = tc_adc_getreg(STM32_ADC_CR2_OFFSET); + regval |= ADC_CR2_ADON; + tc_adc_putreg(STM32_ADC_CR2_OFFSET, regval); + + /* Restore the IRQ state */ + + leave_critical_section(flags); +} + +/************************************************************************************ + * Name: tc_adc_start_sample + * + * Description: + * Perform A/D sampling. Time must be allowed betwen the start of sampling + * and conversion (approx. 100Ms). + * + ************************************************************************************/ + +static void tc_adc_start_sample(int channel) +{ + uint32_t regval; + + /* Configure the specified channel for ADC conversion. */ + + regval = tc_adc_getreg(STM32_ADC_SQR3_OFFSET) & ADC_SQR3_RESERVED; + regval |= channel; + tc_adc_putreg(STM32_ADC_SQR3_OFFSET, regval); + + /* Configure the Watchdog for this channel */ + + regval = tc_adc_getreg(STM32_ADC_CR1_OFFSET) & ADC_CR1_AWDCH_MASK; + regval |= (channel << ADC_CR1_AWDCH_SHIFT); + tc_adc_putreg(STM32_ADC_CR1_OFFSET, regval); + + /* Start the conversion */ + + regval = tc_adc_getreg(STM32_ADC_CR2_OFFSET); + regval |= ADC_CR2_SWSTART; + tc_adc_putreg(STM32_ADC_CR2_OFFSET, regval); +} + +/************************************************************************************ + * Name: tc_adc_read_sample + * + * Description: + * Begin A/D conversion. Time must be allowed betwen the start of sampling + * and conversion (approx. 100Ms). + * + * Assumptions: + * 1) All output pins configured as outputs: + * 2) Approprite pins are driven high and low + * + ************************************************************************************/ + +static uint16_t tc_adc_read_sample(void) +{ + uint16_t retval; + uint32_t adcsr; + uint16_t count = 0; + + /* Validate the conversion is complete */ + + adcsr = tc_adc_getreg(STM32_ADC_SR_OFFSET); + while ((adcsr & ADC_SR_EOC) == 0) + { + adcsr = tc_adc_getreg(STM32_ADC_SR_OFFSET); + count++; + } + + /* Read the sample */ + + retval = tc_adc_getreg(STM32_ADC_DR_OFFSET); + retval &= ADC_DR_DATA_MASK; + + if (count > 0) + { + idbg("Count = %d\n", count); + } + + return retval; +} + +/************************************************************************************ + * Name: tc_y_sample + * + * Description: + * Initiate sampling on Y + * + ************************************************************************************/ + +static void tc_y_sample(void) +{ + /* Start the Y axis sampling */ + + tc_adc_start_sample(LCD_XL_CHANNEL); +} + +/************************************************************************************ + * Name: tc_x_sample + * + * Description: + * Initiate sampling on X + * + ************************************************************************************/ + +static void tc_x_sample(void) +{ + /* Start the X axis sampling */ + + tc_adc_start_sample(LCD_YD_CHANNEL); +} + +/**************************************************************************** + * Name: tc_valid_sample + ****************************************************************************/ + +static inline bool tc_valid_sample(uint16_t sample) +{ + return (sample > LOWER_THRESHOLD); +} + +/**************************************************************************** + * Name: tc_notify + ****************************************************************************/ + +static void tc_notify(FAR struct tc_dev_s *priv) +{ +#ifndef CONFIG_DISABLE_POLL + int i; +#endif + + /* If no threads have the driver open, then just dump the state */ + +#ifdef CONFIG_TOUCHSCREEN_REFCNT + if ((priv->crefs == 0) && priv->sample.contact == CONTACT_UP) + { + priv->sample.contact = CONTACT_NONE; + priv->sample.valid = false; + priv->id++; + return; + } +#endif + + /* If there are threads waiting for read data, then signal one of them + * that the read data is available. + */ + + if (priv->nwaiters > 0) + { + /* After posting this semaphore, we need to exit because the touchscreen + * is no longer available. + */ + + sem_post(&priv->waitsem); + } + + /* If there are threads waiting on poll() for touchscreen data to become available, + * then wake them up now. NOTE: we wake up all waiting threads because we + * do not know that they are going to do. If they all try to read the data, + * then some make end up blocking after all. + */ + +#ifndef CONFIG_DISABLE_POLL + for (i = 0; i < CONFIG_TOUCHSCREEN_NPOLLWAITERS; i++) + { + struct pollfd *fds = priv->fds[i]; + if (fds) + { + fds->revents |= POLLIN; + ivdbg("Report events: %02x\n", fds->revents); + sem_post(fds->sem); + } + } +#endif +} + +/**************************************************************************** + * Name: tc_sample + * + * Assumptions: pre-emption is disabled + * + ****************************************************************************/ + +static int tc_sample(FAR struct tc_dev_s *priv, + FAR struct tc_sample_s *sample) +{ + int ret = -EAGAIN; + + /* Is there new touchscreen sample data available? */ + + if (priv->penchange) + { + /* Yes.. the state has changed in some way. Return a copy of the + * sampled data. + */ + + memcpy(sample, &priv->sample, sizeof(struct tc_sample_s )); + + /* Now manage state transitions */ + + if (sample->contact == CONTACT_UP) + { + /* Next.. no contact. Increment the ID so that next contact ID + * will be unique. X/Y positions are no longer valid. + */ + + priv->sample.contact = CONTACT_NONE; + priv->sample.valid = false; + priv->id++; + } + else if (sample->contact == CONTACT_DOWN) + { + /* First report -- next report will be a movement */ + + priv->sample.contact = CONTACT_MOVE; + } + + priv->penchange = false; + ret = OK; + } + + return ret; +} + +/**************************************************************************** + * Name: tc_waitsample + ****************************************************************************/ + +static int tc_waitsample(FAR struct tc_dev_s *priv, + FAR struct tc_sample_s *sample) +{ + int ret; + + /* Pre-emption must be disabled when this is called to to prevent sampled + * data from changing until it has been reported. + */ + + sched_lock(); + + /* Now release the semaphore that manages mutually exclusive access to + * the device structure. This may cause other tasks to become ready to + * run, but they cannot run yet because pre-emption is disabled. + */ + + sem_post(&priv->devsem); + + /* Try to get the a sample... if we cannot, then wait on the semaphore + * that is posted when new sample data is availble. + */ + + while (tc_sample(priv, sample) < 0) + { + /* Wait for a change in the touchscreen state */ + + priv->nwaiters++; + ret = sem_wait(&priv->waitsem); + priv->nwaiters--; + + if (ret < 0) + { + /* If we are awakened by a signal, then we need to return + * the failure now. + */ + + DEBUGASSERT(errno == EINTR); + ret = -EINTR; + goto errout; + } + } + + /* Re-acquire the semaphore that manages mutually exclusive access to + * the device structure. We may have to wait here. But we have our sample. + * Interrupts and pre-emption will be re-enabled while we wait. + */ + + ret = sem_wait(&priv->devsem); + +errout: + /* Restore pre-emption. We might get suspended here but that is okay + * because we already have our sample. Note: this means that if there + * were two threads reading from the touchscreen for some reason, the data + * might be read out of order. + */ + + sched_unlock(); + return ret; +} + +/**************************************************************************** + * Name: tc_worker + ****************************************************************************/ + +static void tc_worker(FAR void *arg) +{ + FAR struct tc_dev_s *priv = (FAR struct tc_dev_s *)arg; + uint32_t delay = TC_PENUP_POLL_TICKS; + uint16_t value; + uint16_t newx = 0; + int16_t xdiff; + int16_t ydiff; + int ret; + + ASSERT(priv != NULL); + + /* Perform the next action based on the state of the conversions */ + + switch (priv->state) + { + /* The touchscreen is IDLE and we are ready to begin the next sample */ + + case TC_READY: + { + /* Select DRIVE for Y sampling */ + + /* Configure XL, XR with drive voltages and disable YU drive. Note that + * this is configuring the DRIVEA and DRIVEB outputs to enable the on-board + * transistor drive logic to energize the touch panel. + */ + + *((uint32_t *) LCD_TP_PORT_SETRESET) = LCD_SAMPY_BITS; + + /* Allow time for the Y DRIVE to settle */ + + priv->resamplecount = 0; + priv->sampcount = 0; + priv->value = 0; + priv->state = TC_READY_SETTLE; + delay = TC_SETTLE_TICKS; + } + break; + + case TC_READY_SETTLE: + { + /* Start Y sampling */ + + tc_y_sample(); + + /* Allow time for the Y pend down sampling */ + + priv->state = TC_YPENDOWN; + delay = TC_SAMPLE_TICKS; + } + break; + + /* The Y sampling time has elapsed and the Y value should be ready + * for conversion + */ + + case TC_YPENDOWN: + { + /* Convert the Y sample value */ + + value = tc_adc_read_sample(); + + /* A converted value at the minimum would mean that there is no touch + * and that the sampling period is complete. + */ + + if (!tc_valid_sample(value)) + { + priv->state = TC_PENUP; + } + else + { + /* Allow time for touch inputs to stabilize */ + + priv->state = TC_DEBOUNCE; + delay = TC_DEBOUNCE_TICKS; + } + } + break; + + /* The debounce time period has elapsed and we are ready to re-sample + * the touchscreen. + */ + + case TC_RESAMPLE: + { + /* Select DRIVE for Y sampling */ + + /* Configure XL, XR with drive voltages and disable YU drive. Note that + * this is configuring the DRIVEA and DRIVEB outputs to enable the on-board + * transistor drive logic to energize the touch panel. + */ + + *((uint32_t *) LCD_TP_PORT_SETRESET) = LCD_SAMPY_BITS; + + /* Allow time for the Y DRIVE to settle */ + + priv->state = TC_DEBOUNCE; + delay = TC_SETTLE_TICKS; + } + break; + + case TC_DEBOUNCE: + { + /* (Re-)start Y sampling */ + + tc_y_sample(); + + /* Allow time for the Y sampling */ + + priv->state = TC_YSAMPLE; + delay = TC_SAMPLE_TICKS; + } + break; + + /* The Y sampling period has elapsed and we are ready to perform the + * conversion. + */ + + case TC_YSAMPLE: /* Allowing time for the Y sampling */ + { + /* Read the Y axis position */ + + value = tc_adc_read_sample(); + + /* A converted value at the minimum would mean that we lost the contact + * before all of the conversions were completed. At converted value at + * the maximum value is probably bad too. + */ + + if (!tc_valid_sample(value)) + { +#ifdef CONFIG_TOUCHSCREEN_RESAMPLE + priv->state = TC_RESAMPLE; + delay = TC_RESAMPLE_TICKS; +#else + priv->state = TC_PENUP; +#endif + } + else + { + value = MAX_ADC - value; + priv->value += value; + if (++priv->sampcount < CONFIG_TOUCHSCREEN_AVG_SAMPLES) + { + priv->state = TC_READY_SETTLE; + delay = 1; + break; + } + + priv->newy = value / CONFIG_TOUCHSCREEN_AVG_SAMPLES; + priv->value = 0; + priv->sampcount = 0; + ivdbg("Y=%d\n", priv->newy); + + /* Configure YU and YD with drive voltages and disable XR drive. Note that + * this is configuring the DRIVEA and DRIVEB outputs to enable the on-board + * transistor drive logic to energize the touch panel. + */ + + *((uint32_t *) LCD_TP_PORT_SETRESET) = LCD_SAMPX_BITS; + + /* Allow time for the X sampling */ + + priv->state = TC_XSETTLE; + delay = TC_SETTLE_TICKS; + } + } + break; + + case TC_XRESAMPLE: /* Perform X resampling */ + { + if (priv->resamplecount-- == 0) + { + priv->state = TC_PENUP; + break; + } + } + + case TC_XSETTLE: /* Allowing time X to settle after changing DRIVE */ + { + /* The X Drive settling time has elaspsed and it's time to start + * the conversion + */ + + /* Start X sampling */ + + tc_x_sample(); + + /* Allow time for the X sampling */ + + priv->state = TC_XSAMPLE; + delay = TC_SAMPLE_TICKS; + } + break; + + case TC_XSAMPLE: /* Allowing time for the X sampling */ + { + /* Read the converted X axis position */ + + value = tc_adc_read_sample(); + + /* A converted value at the minimum would mean that we lost the contact + * before all of the conversions were completed. At converted value at + * the maximum value is probably bad too. + */ + + if (!tc_valid_sample(value)) + { +#ifdef CONFIG_TOUCHSCREEN_RESAMPLE + priv->state = TC_XRESAMPLE; + if (priv->resamplecount == 0) + priv->resamplecount = 1; + delay = TC_RESAMPLE_TICKS; +#else + priv->state = TC_PENUP; +#endif + } + else + { + /* Calculate the X axis position */ + + //value = MAX_ADC - value; + priv->value += value; + if (++priv->sampcount < CONFIG_TOUCHSCREEN_AVG_SAMPLES) + { + priv->state = TC_XSETTLE; + delay = 1; + break; + } + + newx = value / CONFIG_TOUCHSCREEN_AVG_SAMPLES; + ivdbg("X=%d\n", newx); + + /* Samples are available */ + + priv->state = TC_PENDOWN; + } + } + break; + } + + /* Check for terminal conditions.. */ + + /* Check if the sampling resulted in a pen up decision. If so, we need to + * handle the change from pen down to pen up. + */ + + if (priv->state == TC_PENUP) + { + /* Ignore if the pen was already down (CONTACT_NONE == pen up and already + * reported. CONTACT_UP == pen up, but not reported) + */ + + if (priv->sample.contact != CONTACT_NONE && + priv->sample.contact != CONTACT_UP) + { + /* The pen is up. We know from the above test, that this is a + * loss of contact condition. This will be changed to CONTACT_NONE + * after the loss of contact is sampled. + */ + + priv->sample.contact = CONTACT_UP; + + /* Indicate the availability of new sample data for this ID */ + + priv->sample.id = priv->id; + priv->penchange = true; + + /* Notify any waiters that new touchscreen data is available */ + + idbg("1:X=%d, Y=%d\n", priv->sample.x, priv->sample.y); + + tc_notify(priv); + } + + /* Set up for the next poll */ + + priv->sample.valid = false; + priv->state = TC_READY; + delay = TC_PENUP_POLL_TICKS; + } + + /* Check if the sampling resulted in a pen down decision. */ + + else if (priv->state == TC_PENDOWN) + { + /* It is a pen down event. If the last loss-of-contact event has not been + * processed yet, then we have to ignore the pen down event (or else it will + * look like a drag event) + */ + + if (priv->sample.contact != CONTACT_UP) + { + /* Perform a thresholding operation so that the results will be more stable. + * If the difference from the last sample is small, then ignore the event. + */ + + xdiff = (int16_t)priv->sample.x - (int16_t)newx; + if (xdiff < 0) + { + xdiff = -xdiff; + } + + ydiff = (int16_t)priv->sample.y - (int16_t)priv->newy; + if (ydiff < 0) + { + ydiff = -ydiff; + } + + if (xdiff >= CONFIG_TOUCHSCREEN_THRESHX || + ydiff >= CONFIG_TOUCHSCREEN_THRESHY) + { + /* There is some change above the threshold... Report the change. */ + +#ifdef CONFIG_LCD_LANDSCAPE + priv->sample.x = MAX_ADC - priv->newy; + priv->sample.y = newx; +#else + priv->sample.x = newx; + priv->sample.y = priv->newy; +#endif + priv->sample.valid = true; + + /* If this is the first (acknowledged) penddown report, then report + * this as the first contact. If contact == CONTACT_DOWN, it will be + * set to set to CONTACT_MOVE after the contact is first sampled. + */ + + if (priv->sample.contact != CONTACT_MOVE) + { + /* First contact */ + + priv->sample.contact = CONTACT_DOWN; + } + + /* Indicate the availability of new sample data for this ID */ + + priv->sample.id = priv->id; + priv->penchange = true; + + /* Notify any waiters that nes touchscreen data is available */ + + idbg("2:X=%d, Y=%d\n", priv->sample.x, priv->sample.y); + + tc_notify(priv); + } + } + + /* Set up for the next poll */ + + priv->state = TC_READY; + delay = TC_PENDOWN_POLL_TICKS; + } + + /* Set up the next sample event */ + + ret = work_queue(HPWORK, &priv->work, tc_worker, priv, delay); + ASSERT(ret == 0); +} + +/**************************************************************************** + * Name: tc_open + ****************************************************************************/ + +static int tc_open(FAR struct file *filep) +{ +#ifdef CONFIG_TOUCHSCREEN_REFCNT + FAR struct inode *inode; + FAR struct tc_dev_s *priv; + uint8_t tmp; + int ret; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct tc_dev_s *)inode->i_private; + + /* Get exclusive access to the driver data structure */ + + ret = sem_wait(&priv->devsem); + if (ret < 0) + { + /* This should only happen if the wait was canceled by an signal */ + + DEBUGASSERT(errno == EINTR); + return -EINTR; + } + + /* Increment the reference count */ + + tmp = priv->crefs + 1; + if (tmp == 0) + { + /* More than 255 opens; uint8_t overflows to zero */ + + ret = -EMFILE; + goto errout_with_sem; + } + + /* When the reference increments to 1, this is the first open event + * on the driver.. and an opportunity to do any one-time initialization. + */ + + /* Save the new open count on success */ + + priv->crefs = tmp; + +errout_with_sem: + sem_post(&priv->devsem); + return ret; +#else + return OK; +#endif +} + +/**************************************************************************** + * Name: tc_close + ****************************************************************************/ + +static int tc_close(FAR struct file *filep) +{ +#ifdef CONFIG_TOUCHSCREEN_REFCNT + FAR struct inode *inode; + FAR struct tc_dev_s *priv; + int ret; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct tc_dev_s *)inode->i_private; + + /* Get exclusive access to the driver data structure */ + + ret = sem_wait(&priv->devsem); + if (ret < 0) + { + /* This should only happen if the wait was canceled by an signal */ + + DEBUGASSERT(errno == EINTR); + return -EINTR; + } + + /* Decrement the reference count unless it would decrement a negative + * value. When the count decrements to zero, there are no further + * open references to the driver. + */ + + if (priv->crefs >= 1) + { + priv->crefs--; + } + + sem_post(&priv->devsem); +#endif + return OK; +} + +/**************************************************************************** + * Name: tc_read + ****************************************************************************/ + +static ssize_t tc_read(FAR struct file *filep, FAR char *buffer, size_t len) +{ + FAR struct inode *inode; + FAR struct tc_dev_s *priv; + FAR struct touch_sample_s *report; + struct tc_sample_s sample; + int ret; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct tc_dev_s *)inode->i_private; + + /* Verify that the caller has provided a buffer large enough to receive + * the touch data. + */ + + if (len < SIZEOF_TOUCH_SAMPLE_S(1)) + { + /* We could provide logic to break up a touch report into segments and + * handle smaller reads... but why? + */ + + return -ENOSYS; + } + + /* Get exclusive access to the driver data structure */ + + ret = sem_wait(&priv->devsem); + if (ret < 0) + { + /* This should only happen if the wait was canceled by an signal */ + + DEBUGASSERT(errno == EINTR); + return -EINTR; + } + + /* Try to read sample data. */ + + ret = tc_sample(priv, &sample); + if (ret < 0) + { + /* Sample data is not available now. We would ave to wait to get + * receive sample data. If the user has specified the O_NONBLOCK + * option, then just return an error. + */ + + if (filep->f_oflags & O_NONBLOCK) + { + ret = -EAGAIN; + goto errout; + } + + /* Wait for sample data */ + + ret = tc_waitsample(priv, &sample); + if (ret < 0) + { + /* We might have been awakened by a signal */ + + goto errout; + } + } + + /* In any event, we now have sampled touchscreen data that we can report + * to the caller. + */ + + report = (FAR struct touch_sample_s *)buffer; + memset(report, 0, SIZEOF_TOUCH_SAMPLE_S(1)); + report->npoints = 1; + report->point[0].id = sample.id; + report->point[0].x = sample.x; + report->point[0].y = sample.y; + + /* Report the appropriate flags */ + + if (sample.contact == CONTACT_UP) + { + /* Pen is now up. Is the positional data valid? This is important to + * know because the release will be sent to the window based on its + * last positional data. + */ + + if (sample.valid) + { + report->point[0].flags = TOUCH_UP | TOUCH_ID_VALID | + TOUCH_POS_VALID | TOUCH_PRESSURE_VALID; + } + else + { + report->point[0].flags = TOUCH_UP | TOUCH_ID_VALID; + } + } + else + { + if (sample.contact == CONTACT_DOWN) + { + /* First contact */ + + report->point[0].flags = TOUCH_DOWN | TOUCH_ID_VALID | TOUCH_POS_VALID; + } + else /* if (sample->contact == CONTACT_MOVE) */ + { + /* Movement of the same contact */ + + report->point[0].flags = TOUCH_MOVE | TOUCH_ID_VALID | TOUCH_POS_VALID; + } + } + + ret = SIZEOF_TOUCH_SAMPLE_S(1); + +errout: + sem_post(&priv->devsem); + return ret; +} + +/**************************************************************************** + * Name:tc_ioctl + ****************************************************************************/ + +static int tc_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ +#if 1 + ivdbg("cmd: %d arg: %ld\n", cmd, arg); + return -ENOTTY; /* None yet supported */ +#else + FAR struct inode *inode; + FAR struct tc_dev_s *priv; + int ret; + + ivdbg("cmd: %d arg: %ld\n", cmd, arg); + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct tc_dev_s *)inode->i_private; + + /* Get exclusive access to the driver data structure */ + + ret = sem_wait(&priv->devsem); + if (ret < 0) + { + /* This should only happen if the wait was canceled by an signal */ + + DEBUGASSERT(errno == EINTR); + return -EINTR; + } + + /* Process the IOCTL by command */ + + switch (cmd) + { + /* ADD IOCTL COMMAND CASES HERE */ + + default: + ret = -ENOTTY; + break; + } + + sem_post(&priv->devsem); + return ret; +#endif +} + +/**************************************************************************** + * Name: tc_poll + ****************************************************************************/ + +#ifndef CONFIG_DISABLE_POLL +static int tc_poll(FAR struct file *filep, FAR struct pollfd *fds, + bool setup) +{ + FAR struct inode *inode; + FAR struct tc_dev_s *priv; + int ret; + int i; + + ivdbg("setup: %d\n", (int)setup); + DEBUGASSERT(filep && fds); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct tc_dev_s *)inode->i_private; + + /* Are we setting up the poll? Or tearing it down? */ + + ret = sem_wait(&priv->devsem); + if (ret < 0) + { + /* This should only happen if the wait was canceled by an signal */ + + DEBUGASSERT(errno == EINTR); + return -EINTR; + } + + if (setup) + { + /* Ignore waits that do not include POLLIN */ + + if ((fds->events & POLLIN) == 0) + { + idbg("Missing POLLIN: revents: %08x\n", fds->revents); + ret = -EDEADLK; + goto errout; + } + + /* This is a request to set up the poll. Find an available + * slot for the poll structure reference + */ + + for (i = 0; i < CONFIG_TOUCHSCREEN_NPOLLWAITERS; i++) + { + /* Find an available slot */ + + if (!priv->fds[i]) + { + /* Bind the poll structure and this slot */ + + priv->fds[i] = fds; + fds->priv = &priv->fds[i]; + break; + } + } + + if (i >= CONFIG_TOUCHSCREEN_NPOLLWAITERS) + { + idbg("No availabled slot found: %d\n", i); + fds->priv = NULL; + ret = -EBUSY; + goto errout; + } + + /* Should we immediately notify on any of the requested events? */ + + if (priv->penchange) + { + tc_notify(priv); + } + } + else if (fds->priv) + { + /* This is a request to tear down the poll. */ + + struct pollfd **slot = (struct pollfd **)fds->priv; + DEBUGASSERT(slot != NULL); + + /* Remove all memory of the poll setup */ + + *slot = NULL; + fds->priv = NULL; + } + +errout: + sem_post(&priv->devsem); + return ret; +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * configure the touchscreen device. This function will register the driver + * as /dev/inputN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ + FAR struct tc_dev_s *priv; + char devname[DEV_NAMELEN]; +#ifdef CONFIG_TOUCHSCREEN_MULTIPLE + irqstate_t flags; +#endif + int ret; + + ivdbg("minor: %d\n", minor); + DEBUGASSERT(minor >= 0 && minor < 100); + + /* If we only have one touchscreen, check if we already did init */ + +#ifndef CONFIG_TOUCHSCREEN_MULTIPLE + if (g_touchinitdone) + { + return OK; + } +#endif + + /* Configure the touchscreen DRIVEA and DRIVEB pins for output */ + + stm32_configgpio(GPIO_TP_DRIVEA); + stm32_configgpio(GPIO_TP_DRIVEB); + + /* Configure Analog inputs for sampling X and Y coordinates */ + + stm32_configgpio(GPIO_TP_XL); + stm32_configgpio(GPIO_TP_YD); + + tc_adc_init(); + + /* Create and initialize a touchscreen device driver instance */ + +#ifndef CONFIG_TOUCHSCREEN_MULTIPLE + priv = &g_touchscreen; +#else + priv = (FAR struct tc_dev_s *)kmm_malloc(sizeof(struct tc_dev_s)); + if (!priv) + { + idbg("kmm_malloc(%d) failed\n", sizeof(struct tc_dev_s)); + return -ENOMEM; + } +#endif + + /* Initialize the touchscreen device driver instance */ + + memset(priv, 0, sizeof(struct tc_dev_s)); + sem_init(&priv->devsem, 0, 1); /* Initialize device structure semaphore */ + sem_init(&priv->waitsem, 0, 0); /* Initialize pen event wait semaphore */ + + /* Register the device as an input device */ + + (void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor); + ivdbg("Registering %s\n", devname); + + ret = register_driver(devname, &tc_fops, 0666, priv); + if (ret < 0) + { + idbg("register_driver() failed: %d\n", ret); + goto errout_with_priv; + } + + /* Schedule work to perform the initial sampling and to set the data + * availability conditions. + */ + + priv->state = TC_READY; + ret = work_queue(HPWORK, &priv->work, tc_worker, priv, 0); + if (ret != 0) + { + idbg("Failed to queue work: %d\n", ret); + goto errout_with_priv; + } + + /* And return success (?) */ + +#ifndef CONFIG_TOUCHSCREEN_MULTIPLE + g_touchinitdone = true; +#endif + + return OK; + +errout_with_priv: + sem_destroy(&priv->devsem); +#ifdef CONFIG_TOUCHSCREEN_MULTIPLE + kmm_free(priv); +#endif + return ret; +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* Need to unregister the /dev/inputN device here. */ +} + +#endif /* CONFIG_INPUT */ diff --git a/configs/mikroe-stm32f4/src/stm32_usb.c b/configs/mikroe-stm32f4/src/stm32_usb.c new file mode 100644 index 0000000000000000000000000000000000000000..876fb19d9bcd1ee6dfed786de45e94a0b72167fd --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_usb.c @@ -0,0 +1,307 @@ +/************************************************************************************ + * configs/mikroe_stm32f4/src/stm32_usb.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm32_otgfs.h" +#include "mikroe-stm32f4.h" + +#ifdef CONFIG_STM32_OTGFS + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST) +# define HAVE_USB 1 +#else +# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST" +# undef HAVE_USB +#endif + +#ifndef CONFIG_USBHOST_DEFPRIO +# define CONFIG_USBHOST_DEFPRIO 50 +#endif + +#ifndef CONFIG_USBHOST_STACKSIZE +# ifdef CONFIG_USBHOST_HUB +# define CONFIG_USBHOST_STACKSIZE 1536 +# else +# define CONFIG_USBHOST_STACKSIZE 1024 +# endif +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static struct usbhost_connection_s *g_usbconn; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: usbhost_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static int usbhost_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + uvdbg("Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + uvdbg("%s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the STM32F4Discovery board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + /* The OTG FS has an internal soft pull-up. No GPIO configuration is required */ + + /* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */ + +#ifdef CONFIG_STM32_OTGFS + stm32_configgpio(GPIO_OTGFS_VBUS); + stm32_configgpio(GPIO_OTGFS_PWRON); + stm32_configgpio(GPIO_OTGFS_OVER); +#endif +} + +/*********************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +int stm32_usbhost_initialize(void) +{ + int pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + uvdbg("Register class drivers\n"); + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB host Mass Storage Class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + + /* Then get an instance of the USB host interface */ + + uvdbg("Initialize USB host\n"); + g_usbconn = stm32_otgfshost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + uvdbg("Start usbhost_waiter\n"); + + pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO, + CONFIG_USBHOST_STACKSIZE, + (main_t)usbhost_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + + return -ENODEV; +} +#endif + +/*********************************************************************************** + * Name: stm32_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be provided be + * each platform that implements the STM32 OTG FS host interface + * + * "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump + * or, if 5 V are available on the application board, a basic power switch, must + * be added externally to drive the 5 V VBUS line. The external charge pump can + * be driven by any GPIO output. When the application decides to power on VBUS + * using the chosen GPIO, it must also set the port power bit in the host port + * control and status register (PPWR bit in OTG_FS_HPRT). + * + * "The application uses this field to control power to this port, and the core + * clears this bit on an overcurrent condition." + * + * Input Parameters: + * iface - For future growth to handle multiple USB host interface. Should be zero. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +void stm32_usbhost_vbusdrive(int iface, bool enable) +{ + DEBUGASSERT(iface == 0); + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, false); + } + else + { + /* Disable the Power Switch by driving the enable pin high */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, true); + } +} +#endif + +/************************************************************************************ + * Name: stm32_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent condition is + * detected. + * + * Input Parameter: + * handler - New overcurrent interrupt handler + * + * Returned value: + * Old overcurrent interrupt handler + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +xcpt_t stm32_setup_overcurrent(xcpt_t handler) +{ + return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler); +} +#endif + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} +#endif + +#endif /* CONFIG_STM32_OTGFS */ diff --git a/configs/mikroe-stm32f4/src/stm32_vs1053.c b/configs/mikroe-stm32f4/src/stm32_vs1053.c new file mode 100644 index 0000000000000000000000000000000000000000..08e92695129416e313456e49f03618c821c99d01 --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_vs1053.c @@ -0,0 +1,206 @@ +/**************************************************************************** + * configs/mikroe-stm32f4/src/stm32_vs1053.c + * + * Copyright (C) 2013 Ken Pettit. All rights reserved. + * Author: Ken Pettit + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "mikroe-stm32f4.h" + +#ifdef CONFIG_VS1053 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* VS1053 is on SPI3 */ + +#ifndef CONFIG_STM32_SPI3 +# error "Need CONFIG_STM32_SPI3 in the configuration" +#endif + +/* SPI Assumptions **********************************************************/ + +#define VS1053_SPI_PORTNO 3 /* On SPI3 */ +#define VS1053_DEVNO 0 /* Only one VS1053 */ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32_lower_s +{ + const struct vs1053_lower_s lower; /* Low-level MCU interface */ + xcpt_t handler; /* VS1053 interrupt handler */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int up_attach(FAR const struct vs1053_lower_s *lower, xcpt_t handler); +static void up_enable(FAR const struct vs1053_lower_s *lower); +static void up_disable(FAR const struct vs1053_lower_s *lower); +static void up_reset(FAR const struct vs1053_lower_s *lower, bool state); +static int up_read_dreq(FAR const struct vs1053_lower_s *lower); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* The VS1053 provides interrupts to the MCU via a GPIO pin. The + * following structure provides an MCU-independent mechanixm for controlling + * the VS1053 GPIO interrupt. + */ +static struct stm32_lower_s g_vs1053lower = +{ + .lower = + { + .attach = up_attach, + .enable = up_enable, + .disable = up_disable, + .reset = up_reset, + .read_dreq = up_read_dreq, + .irq = GPIO_VS1053_DREQ_IRQ + }, + .handler = NULL, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: struct vs1053_lower_s methods + ****************************************************************************/ + +static int up_attach(FAR const struct vs1053_lower_s *lower, xcpt_t handler) +{ + FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower; + + priv->handler = handler; /* Save the handler for later */ + return 0; +} + +static void up_enable(FAR const struct vs1053_lower_s *lower) +{ + FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower; + + DEBUGASSERT(priv->handler); + (void)stm32_gpiosetevent(GPIO_VS1053_DREQ, true, false, false, priv->handler); +} + +static void up_disable(FAR const struct vs1053_lower_s *lower) +{ + (void)stm32_gpiosetevent(GPIO_VS1053_DREQ, false, false, false, NULL); +} + +static void up_reset(FAR const struct vs1053_lower_s *lower, bool state) +{ + stm32_gpiowrite(GPIO_VS1053_RST, state); +} + +static int up_read_dreq(FAR const struct vs1053_lower_s *lower) +{ + return stm32_gpioread(GPIO_VS1053_DREQ); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_netinitialize + ****************************************************************************/ + +void up_vs1053initialize(FAR struct spi_dev_s* spi) +{ + int ret; + char name[8]; + FAR struct audio_lowerhalf_s *pVs1053; + + /* Assumptions: + * 1) SPI pins were configured in up_spi.c early in the boot-up phase. + * 2) Clocking for the SPI3 peripheral was also provided earlier in boot-up. + */ + + /* NOTE: The RST line should be asserted early in the boot process + * during the boardinitialize function because the VS1053 + * generates a low frequency humming noise from power-on reset + * until the RST line is asserted. + */ + + //(void)stm32_configgpio(GPIO_VS1053_RST); + + /* Initialize the VS1053 DREQ GPIO line */ + + (void)stm32_configgpio(GPIO_VS1053_DREQ); + + /* Bind the SPI port to the VS1053 driver */ + + pVs1053 = vs1053_initialize(spi, &g_vs1053lower.lower, VS1053_DEVNO); + if (pVs1053 == NULL) + { + audlldbg("Failed to bind SPI port %d VS1053 device\n", VS1053_DEVNO); + return; + } + + /* Now register the audio device */ + + sprintf(name, "vs1053d%d", VS1053_DEVNO); + ret = audio_register(name, pVs1053); + if (ret < 0) + { + auddbg("up_vs1053initialize: Failed to register VS1053 Audio device\n"); + } + + audllvdbg("Bound SPI port to VS1053 device %s\n", name); +} + +#endif /* CONFIG_VS1053 */ diff --git a/configs/mikroe-stm32f4/src/stm32_watchdog.c b/configs/mikroe-stm32f4/src/stm32_watchdog.c new file mode 100644 index 0000000000000000000000000000000000000000..71cf65061de45809a866afd38402d343e6f73f34 --- /dev/null +++ b/configs/mikroe-stm32f4/src/stm32_watchdog.c @@ -0,0 +1,135 @@ +/************************************************************************************ + * configs/mikroe_stm32f4/src/stm32_watchdog.c + * + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Wathdog hardware should be enabled */ + +#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG) +# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_STM32_WDG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0" +# endif +#endif + +/* Use the un-calibrated LSI frequency if we have nothing better */ + +#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ) +# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecuture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ + /* Initialize tha register the watchdog timer device */ + +#if defined(CONFIG_STM32_WWDG) + stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH); + return OK; +#elif defined(CONFIG_STM32_IWDG) + stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ); + return OK; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/mikroe-stm32f4/usbnsh/Make.defs b/configs/mikroe-stm32f4/usbnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6dbe0a0fa380fedbc0578e836eb2eec31b89cc33 --- /dev/null +++ b/configs/mikroe-stm32f4/usbnsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/mikroe-stm32f4/usbnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/mikroe-stm32f4/usbnsh/defconfig b/configs/mikroe-stm32f4/usbnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..1549f45fa1622634aca6118cd6a9f7b1b190908f --- /dev/null +++ b/configs/mikroe-stm32f4/usbnsh/defconfig @@ -0,0 +1,1273 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +CONFIG_STM32_OTGFS=y +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +CONFIG_STM32_RNG=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI2=y +CONFIG_STM32_SPI3=y +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_STM32F4_DISCOVERY is not set +CONFIG_ARCH_BOARD_MIKROE_STM32F4=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mikroe-stm32f4" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_MIKROE_FLASH=y +CONFIG_MIKROE_FLASH_MINOR=0 +CONFIG_MIKROE_FLASH_PART=y +CONFIG_MIKROE_FLASH_PART_LIST="256,768" +CONFIG_MIKROE_RAMMTD=y +CONFIG_MIKROE_RAMMTD_MINOR=1 +CONFIG_MIKROE_RAMMTD_SIZE=32 +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +CONFIG_DEV_LOOP=y + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +CONFIG_RAMDISK=y +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +CONFIG_MTD_PARTITION=y +# CONFIG_MTD_SECT512 is not set +CONFIG_MTD_BYTE_WRITE=y +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +CONFIG_RAMMTD=y +CONFIG_RAMMTD_BLOCKSIZE=512 +CONFIG_RAMMTD_ERASESIZE=4096 +CONFIG_RAMMTD_ERASESTATE=0xff +# CONFIG_RAMMTD_FLASHSIM is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +CONFIG_MTD_M25P=y +CONFIG_M25P_SPIMODE=0 +CONFIG_M25P_MANUFACTURER=0x1C +CONFIG_M25P_MEMORY_TYPE=0x31 +CONFIG_M25P_SUBSECTOR_ERASE=y +# CONFIG_MTD_S25FL1 is not set +CONFIG_MTD_SMART=y +# CONFIG_SMART_DEV_LOOP is not set +CONFIG_MTD_SMART_SECTOR_SIZE=512 +CONFIG_MTD_SMART_WEAR_LEVEL=y +# CONFIG_MTD_SMART_CONVERT_WEAR_FORMAT is not set +# CONFIG_MTD_SMART_ENABLE_CRC is not set +# CONFIG_MTD_SMART_MINIMIZE_RAM is not set +# CONFIG_MTD_SMART_SECTOR_ERASE_DEBUG is not set +# CONFIG_MTD_SMART_ALLOC_DEBUG is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +CONFIG_FS_SMARTFS=y +CONFIG_SMARTFS_ERASEDSTATE=0xff +CONFIG_SMARTFS_MAXNAMLEN=16 +# CONFIG_SMARTFS_MULTI_ROOT_DIRS is not set +# CONFIG_SMARTFS_ALIGNED_ACCESS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_CHAR=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIBC_STRERROR=y +# CONFIG_LIBC_STRERROR_SHORT is not set +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MTDPART is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_FLASH_TEST is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +CONFIG_FSUTILS_MKSMARTFS=y +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LOSMART is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MKSMARTFS is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_ROMFSETC is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +CONFIG_SYSTEM_FLASH_ERASEALL=y +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mikroe-stm32f4/usbnsh/setenv.sh b/configs/mikroe-stm32f4/usbnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..93dbf8d8cd1a2094d8f4738f06e802ff44c01934 --- /dev/null +++ b/configs/mikroe-stm32f4/usbnsh/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm32f4discovery/usbnsh/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mirtoo/Kconfig b/configs/mirtoo/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..7fdc5a4a789cf5212bdf4e1eee25d2777f974c89 --- /dev/null +++ b/configs/mirtoo/Kconfig @@ -0,0 +1,14 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_MIRTOO + +config MIRTOO_RELEASE + int "Mirtoo release number" + default 2 + ---help--- + Select the Mirtoo release number. For example, 1 for release R1. + +endif diff --git a/configs/mirtoo/README.txt b/configs/mirtoo/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..799d77ccd0d6b3ef70a259a4e1838555f929dcea --- /dev/null +++ b/configs/mirtoo/README.txt @@ -0,0 +1,993 @@ +configs/mirtoo README +===================== + +This README file discusses the port of NuttX to the DTX1-4000L "Mirtoo" module. +This module uses MicroChip PIC32MX250F128D and the Dimitech DTX1-4000L EV-kit1 +V2. See http://www.dimitech.com/ for further information. + +Contents +======== + + PIC32MX250F128D Pin Out + Toolchains + Loading NuttX with ICD3 + LED Usage + UART Usage + Analog Input + PIC32MX Configuration Options + Configurations + +PIC32MX250F128D Pin Out +======================= + +PIC32MX250F128D 44 pin package. + +PIN PIC32 SIGNAL(s) BOARD SIGNAL/USAGE EV-Kit1 CONNECTION +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 1 RPB9/SDA1/CTED4/PMD3/RB9 FUNC3 FUNC3, to X3, pin3 + RPB9 Peripheral pin selection RB9 + SDA1 I2C1 data + CTED4 CTMU External Edge Input 4 + PMD3 Parallel Master Port data bit 3 + RB9 PORTB, Pin 9 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 2 RPC6/PMA1/RC6 FUNC5 FUNC5, to X3, pin5 + RPC6 Peripheral pin selection RC6 + PMA1 Parallel Master Port Address bit 1 + RC6 PORTC, Pin 6 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 3 RPC7/PMA0/RC7 PEN, PGA117 ENA pin Not available off module + RPC7 Peripheral pin selection RC7 Not available + PMA0 Parallel Master Port Address bit 0 Not available + RC7 PORTC, Pin 7 Used for PGA117 ENA output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 4 RPC8/PMA5/RC8 LED0 Not available off module + RPC8 Peripheral Selection, PORTC, Pin 8 Not available + PMA5 Parallel Master Port Address bit 5 Not available + RC8 PORTC, Pin 8 Used to drive LED0 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 5 RPC9/CTED7/PMA6/RC9 LED1 Not available off module + RPC9 Peripheral Selection, PORTC, Pin 9 Not available + CTED7 CTMU External Edge Input 7 Not available + PMA6 Parallel Master Port Address bit 6 Not available + RC9 PORTC, Pin 9 Used to drive LED1 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 6 VSS VSS Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 7 VCAP VCAP Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 8 PGED2/RPB10/D+/CTED11/RB10 FUNC0 FUNC0, to FT230XS RXD and debug port + PGED2 Debug Channel 2 data Used at boot time for ICD3 + RPB10 Peripheral Selection, PORTB, Pin 10 Used for UART RXD + D+ USB D+ Not available + CTED11 CTMU External Edge Input 11 Not available + RB10 PORTB, Pin 10 Not available +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 9 PGEC2/RPB11/D-/RB11 FUNC1 FUNC1, to FT230XS TXD + PGEC2 Debug Channel 2 clock Used at boot time for ICD3 + RPB11 Peripheral Selection, PORTB, Pin 11 Used for UART TXD + D- USB D- Not available + RB11 PORTB, Pin 11 Not available +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +10 VUSB3V3 3.3V (via VBAT, Pin 1) + VUSB3V3 USB internal transceiver supply 3.3V +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +11 AN11/RPB13/CTPLS/PMRD/RB13 ~CSM SST25VF3032B Chip Select Not available off-module + AN11 Analog input channel 11 Not available + RPB13 Peripheral Selection, PORTB, Pin 12 Not available + CTPLS CTMU Pulse Output Not available + PMRD Parallel Master Port read strobe Not available + RB13 PORTB, Pin 12 Used for SST25VF3032B Chip Select +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +12 PGED/TMS/PMA10/RA10 DIN5 PORT5, to X7, pin 2 + PGED4 Debug Channel 4 data (?) (also X13, pin6) + TMS JTAG Test mode select pin (?) + PMA10 Parallel Master Port Address bit 10 Not available + RA10 PORTA, Pin 10 May be used as GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +13 PGEC/TCK/CTED8/PMA7/RA7 DIN2 PORT2, to X4, pin 2 + PGEC4 Debug Channel 4 clock Not available (also X13, pin5) + TCK JTAG test clock input pin May be used as JTAG clock input + CTED8 CTMU External Edge Input 8 May be used as CTMU input + PMA7 Parallel Master Port Address bit 7 Not available + RA7 PORTA, Pin 7 May be used as GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +14 CVREF/AN10/C3INB/RPB14/VBUSON/SCK1/CTED5/RB14 FUNC5 (through resistor) FUNC5, to X3, pin5 + CVREFOUT Comparator Voltage Reference output + AN10 Analog input channel 10 + C3INB Comparator 3 Input B + RPB14 Peripheral Selection, PORTB, Pin 14 + VBUSON USB Host and OTG bus power control + SCK1 SPI1 clock + CTED5 CTMU External Edge Input 5 + RB14 PORTB, Pin 14 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +15 AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15 SCK Not available off module + AN9 Analog input channel 9 Not available + C3INA Comparator 3 Input A Not available + RPB15 Peripheral Selection, PORTB, Pin 15 Not available + SCK2 SPI2 clock Used for SPI2 clock + CTED6 CTMU External Edge Input 6 Not available + PMCS1 Parallel Master Port Chip Select 1 Not available + RB15 PORTB, Pin 15 Not available +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +16 AVSS AVSS Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +17 AVDD AVDD Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +18 ~MCLR ~MCLR, TC2030-NL, pin 1 Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +19 PGED3/VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/PMD7/RA0 AIN PGA117 Vout + AN0 Analog input channel 0 AIN + RA0 PORTA, Pin 0 Not available + CVREF+ Comparator Voltage Reference (high) (?) + C3INC Comparator 3 Input C (?) + PMD7 Parallel Master Port data bit 7 Not available + CTED1 CTMU External Edge Input 1 Not available + PGED3 Debug Channel 3 data Not available + VREF+ Analog voltage reference (high) Not available +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +20 PGEC3/VREF-/CVREF-/AN1/RPA1/CTED2/PMD6/RA1 SI Not available off module + PGEC3 Debug Channel 3 clock Not available + VREF- Analog voltage reference (low) Not available + CVREF- Comparator Voltage Reference (low) Not available + AN1 Analog input channel 1 Not available + RPA1 Peripheral Selection PORTA, Pin 1 Used for SI + CTED2 CTMU External Edge Input 2 Not available + PMD6 Parallel Master Port data bit 6 Not available + RA1 PORTA, Pin 1 Not available +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +21 PGED1/AN2/C1IND/C2INB/C3IND/RPB0/PMD0/RB0 DIN6 PORT6, to X9, pin 2 + PGED1 Debug Channel 1 data Not available (also X13, pin4) + AN2 Analog input channel 2 Not available (digital input only) + C1IND Comparator 1 Input D Not available (digital input only) + C2INB Comparator 2 Input B Not available (digital input only) + C3IND Comparator 3 Input D Not available (digital input only) + RPB0 Peripheral Selection PORTB, Pin 0 May be used for peripheral input + PMD0 Parallel Master Port data bit 0 Not available + RB0 PORTB, Pin 0 May be used for GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +22 PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/PMD1/RB1 DIN7 PORT7, to X10, pin 2 + PGEC1 Debug Channel 1 clock (?) (also X13, pin2) + AN3 Analog input channel 3 Not available (digital input only) + C1INC Comparator 1 Input C Not available (digital input only) + C2INA Comparator 2 Input A Not available (digital input only) + RPB1 Peripheral Selection, PORTB, Pin 1 May be used for peripheral input + PMD1 Parallel Master Port data bit 1 Not available + CTED12 CTMU External Edge Input 12 May be used as CTMU input + RB1 PORTB, Pin 1 May be used as GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +23 AN4/C1INB/C2IND/RPB2/SDA2/CTED13/PMD2/CNB2/RB2 DOUT0 PORT0, to X1, pin 2 + AN4 Analog input channel 4 Not available (digital output only) (also X13, pin1) + C1INB Comparator 1 Input B Not available (digital output only) + C2IND Comparator 2 Input D Not available (digital output only) + RPB2 Peripheral Selection PORTB, Pin 2 May be used for peripheral output + SDA2 I2C2 data Not available(?) + CTED13 CTMU External Edge Input 13 Not available + PMD2 Parallel Master Port data bit 2 Not available + CNB2 PORTB, Pin 2 Change Notification Not available + RB2 PORTB, Pin 2 May be for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +24 AN5/C1INA/C2INC/RTCC/RPB3/SCL2/PMWR/CNB3/RB3 DOUT1 PORT1, to X2, pin 2 + AN5 Analog input channel 5 Not available (digital output only) (also X13, pin3) + C1INA Comparator 1 Input A Not available (digital output only) + C2INC Comparator 2 Input C Not available (digital output only) + RTCC Real-Time Clock alarm output May be used for RTCC output + RPB3 Peripheral Selection, PORTB, Pin 3 May be used for peripheral output + SCL2 I2C2 clock (?) + PMWR Parallel Master Port write strobe Not available + CNB3 PORTB, Pin 3 Change Notification Not available + RB3 PORTB, Pin 3 May be used for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +25 AN6/RPC0/RC0 DOUT3 PORT3, to X5, pin 2 + AN6 Analog input channel 6 Not available (digital output only) (also X13, pin7) + RPC0 Peripheral Selection, PORTC, Pin 0 May be used for peripheral output + RC0 PORTC, Pin 0 May be used for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +26 AN7/RPC1/RC1 DOUT4 PORT4, to X6, pin 2 + AN7 Analog input channel 7 Not available (digital output only) (also X13, pin8) + RPC1 Peripheral Selection, PORTC, Pin 1 May be used for peripheral output + RC1 PORTC, Pin 1 May be used for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +27 AN8/RPC2/PMA2/RC2 DOUT5 PORT5, to X7, pin 2 + AN8 Analog input channel 8 Not available (digital output only) (also X13, pin6) + RPC2 Peripheral Selection, PORTC, Pin 2 May be used for peripheral output + PMA2 Parallel Master Port Address bit 2 Not available + RC2 PORTC, Pin 2 May be used for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +28 VDD VDD Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +29 VSS VSS Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +30 OSC1/CLKI/RPA2/RA2 SO (R1) DIN0 (R2) Not available off module + OSC1 Oscillator crystal input Not available + CLKI External clock source input Not available + RPRA2 Peripheral Selection PORTA, Pin 2 Used for SO + RA2 PORTA, Pin 2 Not available +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +31 OSC2/CLKO/RPA3/RA3 DIN0 (R1) DIN3 (R2) PORT0, to X1, pin 2 + OSC2 Oscillator crystal output Not available (also X13, pin1) + CLKO Oscillator crystal output Not available + RPA3 Peripheral Selection for PORTA, Pin 3 May be used for peripheral input + RA3 PORTA, Pin 3 May be used for GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +32 TDO/RPA8/PMA8/RA8 DIN3 (R1) S0 (R2) PORT3, to X5, pin 2 + TDO JTAG test data output pin Not available (also X13, pin7) + RPA8 PORTA, Pin 8 May be used for peripheral input + PMA8 Parallel Master Port Address bit 8 Not available + RA8 PORTA, Pin 8 May be used for GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +33 SOSCI/RPB4/RB4 DOUT2 PORT2, to X4, pin 2 + SOSCI 32.768 kHz crystal input Not available (also X13, pin5) + RPB4 Peripheral Seclection, PORTB, Pin 4 May be used for peripheral output + RB4 PORTB, Pin 4 May be used for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +34 SOSCO/RPA4/T1CK/CTED9/RA4 DIN1 PORT1, to X2, pin 2 + SOSCO 32.768 kHz crystal output Not available (also X13, pin3) + RPA4 Peripheral Selection PORTA, Pin 4 May be used for peripheral input + T1CK Timer1 external clock input May be used for timer 1 input + CTED9 CTMU External Edge Input 9 May be used for CTMU input + RA4 PORTA, Pin 4 May be used as GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +35 TDI/RPA9/PMA9/RA9 DIN4 PORT4, to X6, pin 2 + TDI JTAG test data input pin May be used for JTAG input (also X13, pin8) + RPA9 Peripheral Selection for PORTA, Pin 9 May be used for peripheral input + PMA9 Parallel Master Port Address bit 9 Not available + RA9 PORTA, Pin 9 May be used for GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +36 AN12/RPC3/RC3 DOUT6 PORT6, to X9, pin 2 + AN12 Analog input channel 12 Not available (digtial output only) (also X13, pin4) + RPC3 Peripheral Selection, PORTC, Pin 3 May be used for peripheral output + RC3 PORTC, Pin 3 May be used for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +37 RPC4/PMA4/RC4 DOUT7 PORT7, to X10, pin 2 + RPC4 Peripheral Selection, PORTC, Pin 4 May be used for peripheral output (also X13, pin2) + PMA4 Parallel Master Port Address bit 4 Not available + RC4 PORTC, Pin 4 May be used for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +38 RPC5/PMA3/RC5 FUNC4 FUNC4, to X3, pin4 + RPC5 Peripheral Selection, PORTC, Pin 5 + PMA3 Parallel Master Port Address bit 3 + RC5 PORTC, Pin 5 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +39 VSS VSS Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +40 VDD VDD Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +41 RPB5/USBID/RB5 FUNC3 FUNC3, to X3, pin3 + RPB5 Peripheral Selection, PORTB, Pin 5 + USBID 41 USB OTG ID detect + RB5 41 PORTB, Pin 5 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +42 VBUS FUNC2 FUNC2, to X3, pin2 + VBUS Analog USB bus power monitor +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +43 RPB7/CTED3/PMD5/INT0/RB7 PGA117 ~CSAI Not available off module + RPB7 Peripheral Selection, PORTB, Pin 7 + CTED3 CTMU External Edge Input 3 + PMD5 Parallel Master Port data bit 5 + INT0 External Interrupt 0 + RB7 PORTB, Pin 7 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +44 RPB8/SCL1/CTED10/PMD4/RB8 FUNC2 FUNC2 + RPB8 PORTB, Pin 8 + SCL1 I2C1 clock + CTED10 CTMU External Edge Input 10 + PMD4 Parallel Master Port data bit 4 + RB8 PORTB, Pin 8 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + +Additional signals available via Peripheral Pin Selections (PPS) +---------------------------------------------------------------- + + REFCLKI Reference Input Clock + REFCLKO Reference Output Clock + IC1 Capture Inputs 1 + IC2 Capture Inputs 2 + IC3 Capture Inputs 3 + IC4 Capture Inputs 4 + IC5 Capture Inputs 5 + OC1 Output Compare Output 1 + OC2 Output Compare Output 2 + OC3 Output Compare Output 3 + OC4 Output Compare Output 4 + OC5 Output Compare Output 5 + OCFA Output Compare Fault A Input + OCFB Output Compare Fault B Input + INT1 External Interrupt 1 + INT2 External Interrupt 2 + INT3 External Interrupt 3 + INT4 External Interrupt 4 + T2CK Timer2 external clock input + T3CK Timer3 external clock input + T4CK Timer4 external clock input + T5CK Timer5 external clock input + U1CTS UART1 clear to send + U1RTS UART1 ready to send + U1RX UART1 receive + U1TX UART1 transmit + U2CTS UART2 clear to send + U2RTS UART2 ready to send + U2RX UART2 receive + U2TX UART2 transmit + SDI1 SPI1 data in + SDO1 SPI1 data out + SS1 SPI1 slave synchronization or frame pulse I/O + SDI2 SPI2 data in + SDO2 SPI2 data out + SS2 SPI2 slave synchronization or frame pulse I/O + C1OUT Comparator 1 Output + C2OUT Comparator 2 Output + C3OUT Comparator 3 Output + +Toolchains +========== + + Note that in addition to the configuration options listed below, the + toolchain can be configured using the kconfig-mconf utility ('make menuconfig') + or by passing CONFIG_MIPS32_TOOLCHAIN= to make, where + is one of GNU_ELF, MICROCHIPL, MICROCHIPW, MICROCHIPL_LITE, + MICROCHIPW_LITE, MICROCHIPOPENL or PINGUINOW as described below. + + MPLAB/C32 + --------- + + I am using the free, "Lite" version of the PIC32MX toolchain available + for download from the microchip.com web site. I am using the Windows + version. The MicroChip toolchain is the only toolchain currently + supported in these configurations, but it should be a simple matter to + adapt to other toolchains by modifying the Make.defs file include in + each configuration. + + Toolchain Options: + + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW - MicroChip full toolchain for Windows (C32) + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL - MicroChip full toolchain for Linux (C32) + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE - MicroChip LITE toolchain for Windows (C32) + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_LITE - MicroChip LITE toolchain for Linux (C32) + + NOTE: The "Lite" versions of the toolchain does not support C++. Also + certain optimization levels are not supported by the Lite toolchain. + + MicrochipOpen + ------------- + + An alternative, build-it-yourself toolchain is available here: + http://sourceforge.net/projects/microchipopen/ . These tools were + last updated circa 2010. NOTE: C++ support still not available + in this toolchain. Use this configuration option to select the microchipopen + toolchain: + + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPOPENL - microchipOpen toolchain for Linux + + And set the path appropriately in the setenv.sh file. + + Building MicrochipOpen (on Linux) + --------------------------------- + + 1) Get the build script from this location: + + http://microchipopen.svn.sourceforge.net/viewvc/microchipopen/ccompiler4pic32/buildscripts/trunk/ + + 2) Build the code using the build script, for example: + + ./build.sh -b v105_freeze + + This will check out the selected branch and build the tools. + + 3) Binaries will then be available in a subdirectory with a name something like + pic32-v105-freeze-20120622/install-image/bin (depending on the current data + and the branch that you selected. + + Note that the tools will have the prefix, mypic32- so, for example, the + compiler will be called mypic32-gcc. + + Pinguino mips-elf / Generic mips-elf Toolchain + --------------------------- + + Another option is the mips-elf toolchain used with the Pinguino project. This + is a relatively current mips-elf GCC and should provide free C++ support as + well. This toolchain can be downloded from the Pinguino website: + http://wiki.pinguino.cc/index.php/Main_Page#Download . There is some general + information about using the Pinguino mips-elf toolchain in this thread: + https://groups.yahoo.com/neo/groups/nuttx/conversations/messages/1821 + + Support for the Pinguino mips-elf toolchain has been included in the Mirtoo + configurations. Use one of these configuration options to select the Pinguino + mips-elf toolchain: + + CONFIG_MIPS32_TOOLCHAIN_PINGUINOW - Pinguino mips-elf toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_GNU_ELF - mips-elf toolchain for Linux or OS X + + And set the path appropriately in the setenv.sh file. These tool configurations + are untested -- expect some additional integration issues. Good luck! + + This configuration will also work with any generic mips-elf GCC past version + 4.6 or so. + + MPLAB/C32 vs MPLABX/X32 + ----------------------- + + It appears that Microchip is phasing out the MPLAB/C32 toolchain and replacing + it with MPLABX and XC32. At present, the XC32 toolchain is *not* compatible + with the NuttX build scripts. Here are some of the issues that I see when trying + to build with XC32: + + 1) Make.def changes: You have to change the tool prefix: + + CROSSDEV=xc32- + + 2) debug.ld/release.ld: The linker expects some things that are not present in + the current linker scripts (or are expected with different names). Here + are some partial fixes: + + Rename: kseg0_progmem to kseg0_program_mem + Rename: kseg1_datamem to kseg1_data_mem + + Even then, there are more warnings from the linker and some undefined symbols + for non-NuttX code that resides in the unused Microchip libraries. See this + email thread at https://groups.yahoo.com/neo/groups/nuttx/conversations/messages/1458 for more + information. You will have to solve at least this undefined symbol problem if + you want to used the XC32 toolchain. + + Windows Native Toolchains + ------------------------- + + NOTE: There are several limitations to using a Windows based toolchain in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + +Loading NuttX with ICD3 +======================== + + Intel Hex Forma Files: + ---------------------- + + When NuttX is built it will produce two files in the top-level NuttX + directory: + + 1) nuttx - This is an ELF file, and + 2) nuttx.hex - This is an Intel Hex format file. This is controlled by + the setting CONFIG_INTELHEX_BINARY in the .config file. + + The PICkit tool wants an Intel Hex format file to burn into FLASH. However, + there is a problem with the generated nutt.hex: The tool expects the nuttx.hex + file to contain physical addresses. But the nuttx.hex file generated from the + top-level make will have address in the KSEG0 and KSEG1 regions. + + tools/pic32mx/mkpichex: + ---------------------- + + There is a simple tool in the NuttX tools/pic32mx directory that can be + used to solve both issues with the nuttx.hex file. But, first, you must + build the tool: + + cd tools/pic32mx + make + + Now you will have an excecutable file call mkpichex (or mkpichex.exe on + Cygwin). This program will take the nutt.hex file as an input, it will + convert all of the KSEG0 and KSEG1 addresses to physical address, and + it will write the modified file, replacing the original nuttx.hex. + + To use this file, you need to do the following things: + + . ./setenv.sh # Source setenv.sh. Among other this, this script + # will add the NuttX tools/pic32mx directory to your + # PATH variable + make # Build nuttx and nuttx.hex + mkpichex $PWD # Convert addresses in nuttx.hex. $PWD is the path + # to the top-level build directory. It is the only + # required input to mkpichex. + +LED Usage +========= + + The Mirtoo module has 2 user LEDs labeled LED0 and LED1 in the schematics: + + --- ----- -------------------------------------------------------------- + PIN Board Notes + --- ----- -------------------------------------------------------------- + RC8 LED0 Grounded, high value illuminates + RC9 LED1 Grounded, high value illuminates + + The Dimitech DTX1-4000L EV-kit1 supports 3 more LEDs, but there are not + controllable from software. + + If CONFIG_ARCH_LEDS is defined, then NuttX will control these LEDs as + follows: + ON OFF + ------------------------- ---- ---- ---- ---- + LED0 LED1 LED0 LED1 + ------------------------- ---- ---- ---- ---- + LED_STARTED 0 OFF OFF --- --- + LED_HEAPALLOCATE 1 ON OFF --- --- + LED_IRQSENABLED 2 OFF ON --- --- + LED_STACKCREATED 3 ON ON --- --- + LED_INIRQ 4 ON N/C OFF N/C + LED_SIGNAL 4 ON N/C OFF N/C + LED_ASSERTION 4 ON N/C OFF N/C + LED_PANIC 4 ON N/C OFF N/C + +UART Usage +========== + + When mounted on the DTX1-4000L EV-kit1 board, serial output is avaiable through + an FT230X device via the FUNC0 and FUNC1 module outputs. If CONFIG_PIC32MX_UART2 + is enabled, the src/up_boot will configure the UART2 pins as follows: + + ---------- ------ ----- ------ ------------------------- + BOARD MODULE PIN SIGNAL NOTES + ---------- ------ ----- ------ ------------------------- + FT230X RXD FUNC0 RPB11 U2RX UART2 RX (Also PGEC2) + FT230X TXD FUNC1 RPB10 U2TX UART2 TX (Also PGED2) + + However, since the FUNC0/1 pins are shared with the PGEC/D2, they cannot be used + for UART2 if you are also debugging with the ICD3. In that case, you may need + to switch to UART1. + + If CONFIG_PIC32MX_UART1 is enabled, the src/up_boot will configure the UART + pins as follows. This will support communictions (via an external RS-232 + driver) through X3 pins 4 and 5: + + ---------- ------ ----- ------ ------------------------- + BOARD MODULE PIN SIGNAL NOTES + ---------- ------ ----- ------ ------------------------- + X3, pin 4 FUNC4 RPBC5 U1TX UART1 TX + X3, pin 5 FUNC5 RPBC6 U1RX UART1 RX + + If you are not using MPLAB to debug, you may also want to change Make.defs + to use the release.ld linker script instead of the debug.ld link script. This + change will give you a little more memory by re-using the boot FLASH and SRAM + that would otherwise be reserved for MPLAB. + +Analog Input +============ + + The Mirtoo features a PGA117 amplifier/multipexer that can be configured to + bring any analog signal from PORT0,.. PORT7 to pin 19 of the PIC32MX: + + --- ------------------------------------------------ ---------------------------- + PIN PIC32 SIGNAL(s) BOARD SIGNAL/USAGE + --- ------------------------------------------------ ---------------------------- + 19 PGED3/VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/PMD7/RA0 AIN PGA117 Vout + --- ------------------------------------------------ ---------------------------- + + The PGA117 driver can be enabled by setting the following the nsh + configuration: + + CONFIG_ADC=y : Enable support for analog input devices + CONFIG_PIC32MX_ADC=y : Enable support the PIC32 ADC driver + CONFIG_ADC_PGA11X=y : Enable support for the PGA117 + + When CONFIG_PIC32MX_ADC=y is defined, the Mirtoo boot up logic will + automatically configure pin 18 (AN0) as an analog input (see configs/mirtoo/src/up_adc.c). + To initializee and use the PGA117, you to add logic something like the + following in your application code: + + #include + #include + + FAR struct spi_dev_s *spi; + PGA11X_HANDLE handle; + + /* Get the SPI port */ + + spi = pic32mx_spibus_initialize(2); + if (!spi) + { + dbg("ERROR: Failed to initialize SPI port 2\n"); + return -ENODEV; + } + + /* Now bind the SPI interface to the PGA117 driver */ + + handle = pga11x_initialize(spi); + if (!handle) + { + dbg("ERROR: Failed to bind SPI port 2 to the PGA117 driver\n"); + return -ENODEV; + } + + After that initialization is set, then one of PORT0-7 can be select as + an analog input to AN0 like: + + struct pga11x_settings_s settings; + int ret; + + settings.channel = PGA11X_CHAN_CH2; + settings.gain = PGA11X_GAIN_2; + + ret = pga11x_select(handle, &settings); + if (ret < 0) + { + dbg("ERROR: Failed to select channel 2, gain 2\n"); + return -EIO; + } + + The above logic may belong in configs/mirtoo/src/up_adc.c? + + There is still one missing piece to complete the analog support on the + Mirtoo. This is the ADC driver that collects analog data and provides + and ADC driver that can be used with standard open, close, read, and write + interfaces. To complete this driver, the following is needed: + + (1) arch/mips/src/pic32mx/pic32mx-adc.c. The ADC driver that implements + the ADC interfaces defined in include/nuttx/analog/adc.h and must + be built when CONFIG_PIC32MX_ADC is defined. + + (2) configs/mirtoo/up_adc.c. Add Mirtoo logic that initializes and + registers the ADC driver. + + A complete ADC driver will be a considerable amount of work to support + all of the ADC features (such as timer driven sampling). If all you want + to do is a simple analog conversion, then in lieu of a real ADC driver, + you can use simple in-line logic such as you can see in the PIC32MX7 MMB + touchscreen driver at configs/pic32mx7mmb/src/up_touchscreen.c + +PIC32MX Configuration Options +============================= + + General Architecture Settings: + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=mips + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_MIPS=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_MIPS32=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=pic32mx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_PIC32MX250F128D=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=mirtoo + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_MIRTOO=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0xa0000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + PIC32MX Configuration + + CONFIG_PIC32MX_MVEC - Select muli- vs. single-vectored interrupts + + Individual subsystems can be enabled: + + CONFIG_PIC32MX_WDT - Watchdog timer + CONFIG_PIC32MX_T2 - Timer 2 (Timer 1 is the system time and always enabled) + CONFIG_PIC32MX_T3 - Timer 3 + CONFIG_PIC32MX_T4 - Timer 4 + CONFIG_PIC32MX_T5 - Timer 5 + CONFIG_PIC32MX_IC1 - Input Capture 1 + CONFIG_PIC32MX_IC2 - Input Capture 2 + CONFIG_PIC32MX_IC3 - Input Capture 3 + CONFIG_PIC32MX_IC4 - Input Capture 4 + CONFIG_PIC32MX_IC5 - Input Capture 5 + CONFIG_PIC32MX_OC1 - Output Compare 1 + CONFIG_PIC32MX_OC2 - Output Compare 2 + CONFIG_PIC32MX_OC3 - Output Compare 3 + CONFIG_PIC32MX_OC4 - Output Compare 4 + CONFIG_PIC32MX_OC5 - Output Compare 5 + CONFIG_PIC32MX_I2C1 - I2C 1 + CONFIG_PIC32MX_I2C2 - I2C 2 + CONFIG_PIC32MX_SPI1 - SPI 1 + CONFIG_PIC32MX_SPI2 - SPI 2 + CONFIG_PIC32MX_UART1 - UART 1 + CONFIG_PIC32MX_UART2 - UART 2 + CONFIG_PIC32MX_ADC - ADC 1 + CONFIG_PIC32MX_PMP - Parallel Master Port + CONFIG_PIC32MX_CM1 - Comparator 1 + CONFIG_PIC32MX_CM2 - Comparator 2 + CONFIG_PIC32MX_CM3 - Comparator 3 + CONFIG_PIC32MX_RTCC - Real-Time Clock and Calendar + CONFIG_PIC32MX_DMA - DMA + CONFIG_PIC32MX_FLASH - FLASH + CONFIG_PIC32MX_USBDEV - USB device + CONFIG_PIC32MX_USBHOST - USB host + CONFIG_PIC32MX_CTMU - CTMU + + PIC32MX Configuration Settings + DEVCFG0: + CONFIG_PIC32MX_DEBUGGER - Background Debugger Enable. Default 3 (disabled). The + value 2 enables. + CONFIG_PIC32MX_ICESEL - In-Circuit Emulator/Debugger Communication Channel Select + Default 1 (PG2) + CONFIG_PIC32MX_PROGFLASHWP - Program FLASH write protect. Default 0xff (disabled) + CONFIG_PIC32MX_BOOTFLASHWP - Default 1 (disabled) + CONFIG_PIC32MX_CODEWP - Default 1 (disabled) + DEVCFG1: (All settings determined by selections in board.h) + DEVCFG2: (All settings determined by selections in board.h) + DEVCFG3: + CONFIG_PIC32MX_USBIDO - USB USBID Selection. Default 1 if USB enabled + (USBID pin is controlled by the USB module), but 0 (GPIO) otherwise. + CONFIG_PIC32MX_VBUSIO - USB VBUSON Selection (Default 1 if USB enabled + (VBUSON pin is controlled by the USB module, but 0 (GPIO) otherwise. + CONFIG_PIC32MX_WDENABLE - Enabled watchdog on power up. Default 0 (watchdog + can be enabled later by software). + + The priority of interrupts may be specified. The value ranage of + priority is 4-31. The default (16) will be used if these any of these + are undefined. + + CONFIG_PIC32MX_CTPRIO - Core Timer Interrupt + CONFIG_PIC32MX_CS0PRIO - Core Software Interrupt 0 + CONFIG_PIC32MX_CS1PRIO - Core Software Interrupt 1 + CONFIG_PIC32MX_INT0PRIO - External Interrupt 0 + CONFIG_PIC32MX_INT1PRIO - External Interrupt 1 + CONFIG_PIC32MX_INT2PRIO - External Interrupt 2 + CONFIG_PIC32MX_INT3PRIO - External Interrupt 3 + CONFIG_PIC32MX_INT4PRIO - External Interrupt 4 + CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor + CONFIG_PIC32MX_T1PRIO - Timer 1 (System timer) priority + CONFIG_PIC32MX_T2PRIO - Timer 2 priority + CONFIG_PIC32MX_T3PRIO - Timer 3 priority + CONFIG_PIC32MX_T4PRIO - Timer 4 priority + CONFIG_PIC32MX_T5PRIO - Timer 5 priority + CONFIG_PIC32MX_IC1PRIO - Input Capture 1 + CONFIG_PIC32MX_IC2PRIO - Input Capture 2 + CONFIG_PIC32MX_IC3PRIO - Input Capture 3 + CONFIG_PIC32MX_IC4PRIO - Input Capture 4 + CONFIG_PIC32MX_IC5PRIO - Input Capture 5 + CONFIG_PIC32MX_OC1PRIO - Output Compare 1 + CONFIG_PIC32MX_OC2PRIO - Output Compare 2 + CONFIG_PIC32MX_OC3PRIO - Output Compare 3 + CONFIG_PIC32MX_OC4PRIO - Output Compare 4 + CONFIG_PIC32MX_OC5PRIO - Output Compare 5 + CONFIG_PIC32MX_I2C1PRIO - I2C 1 + CONFIG_PIC32MX_I2C2PRIO - I2C 2 + CONFIG_PIC32MX_SPI1PRIO - SPI 1 + CONFIG_PIC32MX_SPI2PRIO - SPI 2 + CONFIG_PIC32MX_UART1PRIO - UART 1 + CONFIG_PIC32MX_UART2PRIO - UART 2 + CONFIG_PIC32MX_CN - Input Change Interrupt + CONFIG_PIC32MX_ADCPRIO - ADC1 Convert Done + CONFIG_PIC32MX_PMPPRIO - Parallel Master Port + CONFIG_PIC32MX_CM1PRIO - Comparator 1 + CONFIG_PIC32MX_CM2PRIO - Comparator 2 + CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor + CONFIG_PIC32MX_RTCCPRIO - Real-Time Clock and Calendar + CONFIG_PIC32MX_DMA0PRIO - DMA Channel 0 + CONFIG_PIC32MX_DMA1PRIO - DMA Channel 1 + CONFIG_PIC32MX_DMA2PRIO - DMA Channel 2 + CONFIG_PIC32MX_DMA3PRIO - DMA Channel 3 + CONFIG_PIC32MX_FCEPRIO - Flash Control Event + CONFIG_PIC32MX_USBPRIO - USB + + PIC32MXx specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + PIC32MXx USB Device Configuration + + PIC32MXx USB Host Configuration (the PIC32MX does not support USB Host) + +Configurations +============== + +Each PIC32MX configuration is maintained in a sub-directory and can be +selected as follow: + + cd tools + ./configure.sh mirtoo/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh + + This configuration directory holds configuration files tht can + be used to support the NuttShell (NSH). This configuration use + UART1 which is available on FUNC 4 and 5 on connector X3: + + CONFIG_PIC32MX_UART1=y : UART1 for serial console + CONFIG_UART1_SERIAL_CONSOLE=n + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. UART2 + + If you are not using MPLAB to debug, you may switch to UART2 + by modifying the NuttX configuration to disable UART1 and to + select UART2. You should also change Make.defs to use the + release.ld linker script instead of the debug.ld link script. + + 3. This configuration also uses the Microchip C32 toolchain under + windows by default: + + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE=y : Lite version of windows toolchain + + To switch to the Linux C32 toolchain you will have to change (1) the + toolchain selection in .config (after configuration) and (2) the + path to the toolchain in setenv.sh. See notes above with regard to + the XC32 toolchain. + + 4. PGA117 Support + + The Mirtoo's PGA117 amplifier/multiplexer is not used by this configuration + but can be enabled by setting: + + CONFIG_ADC=y : Enable support for analog input devices + CONFIG_ADC_PGA11X=y : Enable support for the PGA117 + + nxffs + + This is a configuration very similar to the nsh configuration. This + configure also provides the NuttShell (NSH). And this configuration use + UART1 which is available on FUNC 4 and 5 on connector X3 (as described + for the nsh configuration). This configuration differs from the nsh + configuration in the following ways: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. It uses the Pinguino toolchain be default (this is easily changed, + see above). + + CONFIG_MIPS32_TOOLCHAIN_PINGUINOW=y + + 3. SPI2 is enabled and support is included for the NXFFS file system + on the 32Mbit SST25 device on the Mirtoo board. NXFFS is the NuttX + wear-leveling file system. + + CONFIG_PIC32MX_SPI2=y + CONFIG_MTD_SST25=y + CONFIG_SST25_SECTOR512=y + CONFIG_DISABLE_MOUNTPOINT=n + CONFIG_FS_NXFFS=y + CONFIG_NSH_ARCHINIT=y + + 4. Many operating system features are suppressed to produce a smaller + footprint. + + CONFIG_SCHED_WAITPID=n + CONFIG_DISABLE_POSIX_TIMERS=y + CONFIG_DISABLE_PTHREAD=y + CONFIG_DISABLE_MQUEUE=y + CONFIG_DISABLE_MQUEUE=y + + 5. Many NSH commands are suppressed, also for a smaller FLASH footprint + + CONFIG_NSH_DISABLESCRIPT=y + CONFIG_NSH_DISABLEBG=y + + CONFIG_NSH_DISABLE_DD=y + CONFIG_NSH_DISABLE_EXEC=y + CONFIG_NSH_DISABLE_EXIT=y + CONFIG_NSH_DISABLE_GET=y + CONFIG_NSH_DISABLE_IFCONFIG=y + CONFIG_NSH_DISABLE_KILL=y + CONFIG_NSH_DISABLE_MKFIFO=y + CONFIG_NSH_DISABLE_MKRD=y + CONFIG_NSH_DISABLE_PUT=y + CONFIG_NSH_DISABLE_SH=y + CONFIG_NSH_DISABLE_TEST=y + CONFIG_NSH_DISABLE_WGET=y + + When the system boots, you should have the NXFFS file system mounted + at /mnt/sst25. + + NOTES: + + a) It takes many seconds to boot the sytem using the NXFFS + file system because the entire FLASH must be verified on power up + (and longer the first time that NXFFS comes up and has to format the + entire FLASH). + b) FAT does not have these delays and this configuration can be modified + to use the (larger) FAT file system as described below. But you will, + or course, lose the wear-leveling feature if FAT is used. + + 6. FAT + + There is no FAT configuration, but the nxffx configuration can be used + to support the FAT FS if the following changes are made to the NuttX + configuration file: + + CONFIG_FS_NXFFS=n + CONFIG_FS_FAT=y + CONFIG_NSH_DISABLE_MKFATFS=n + + In this configuration, the FAT file system will not be automatically + mounted. When NuttX boots to the NSH prompt, you will find the + SST5 block driver at /dev/mtdblock0. This can be formatted with a + FAT file system and mounted with these commands: + + nsh> mkfatfs /dev/mtdblock0 + nsh> mount -t vfat /dev/mtdblock0 /mnt/sst25 + + 7. PGA117 Support + + The Mirtoo's PGA117 amplifier/multipexer is not used by this + configuration but can be enabled by setting: + + CONFIG_ADC=y : Enable support for anlog input devices + CONFIG_ADC_PGA11X=y : Enable support for the PGA117 diff --git a/configs/mirtoo/include/board.h b/configs/mirtoo/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..077f12f44f4099e47cb6f56181c93d7d40547a56 --- /dev/null +++ b/configs/mirtoo/include/board.h @@ -0,0 +1,175 @@ +/**************************************************************************** + * configs/mirtoo/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MIRTOO_INCLUDE_BOARD_H +#define __CONFIGS_MIRTOO_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Clocking *****************************************************************/ +/* The Mirtoo does not use an external crystal but relies instead on the + * internal +/- 0.9% FRC clock. That clock has a nomninal frequency of 8MHz. + */ + +#define BOARD_FRC_FREQ 8000000 /* FRC nomimal frequency(8MHz) */ + +/* Oscillator modes */ + +#define BOARD_FNOSC_FRCPLL 1 /* Use FRC w/PLL module */ +#define BOARD_POSC_DISABLED 1 /* Disable primary oscillator */ + +/* PLL configuration and resulting CPU clock. + * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV + */ + +#define BOARD_PLL_INPUT BOARD_FRC_FREQ +#define BOARD_PLL_IDIV 2 /* PLL input divider: Input = 4MHz */ +#define BOARD_PLL_MULT 20 /* PLL multiplier: PLL = 80MHz */ +#define BOARD_PLL_ODIV 2 /* PLL output divider: Output = 40MHz */ + +#define BOARD_CPU_CLOCK 40000000 /* CPU clock 40MHz = (((8MHz / 2) * 20) / 2) */ + +/* USB PLL configuration. + * USB_CLOCK = ((POSC_XTAL / IDIV) * 24) / 2 + */ + +#define BOARD_UPLL_IDIV 2 /* USB PLL divider (revisit) */ +#define BOARD_USB_CLOCK 48000000 /* USB clock (8MHz / 2) * 24 / 2) */ + +/* Peripheral clock is divided down from CPU clock. + * PBCLOCK = CPU_CLOCK / PBDIV + */ + +#define BOARD_PBDIV 1 /* Peripheral clock divisor (PBDIV) */ +#define BOARD_PBCLOCK 40000000 /* Peripheral clock (PBCLK = 40MHz/1) */ + +/* Watchdog pre-scaler (re-visit) */ + +#define BOARD_WD_ENABLE 0 /* Watchdog is disabled */ +#define BOARD_WD_PRESCALER 8 /* Watchdog pre-scaler */ + +/* LED definitions **********************************************************/ +/* The Mirtoo module has 2 user LEDs labeled LED0 and LED1 in the schematics: + * + * --- ----- -------------------------------------------------------------- + * PIN Board Notes + * --- ----- -------------------------------------------------------------- + * RC8 LED0 Grounded, high value illuminates + * RC9 LED1 Grounded, high value illuminates + * + * The Dimitech DTX1-4000L EV-kit1 supports 3 more LEDs, but there are not + * controllable from software. + */ + + /* LED index values for use with board_userled() */ + +#define PIC32MX_MIRTOO_LED0 0 +#define PIC32MX_MIRTOO_LED1 1 +#define PIC32MX_MIRTOO_NLEDS 2 + +/* LED bits for use with board_userled_all() */ + +#define PIC32MX_MIRTOO_LED0_BIT (1 << PIC32MX_MIRTOO_LED0) +#define PIC32MX_MIRTOO_LED1_BIT (1 << PIC32MX_MIRTOO_LED1) + +/* If CONFIG_ARCH_LEDS is defined, then NuttX will control these LEDs as + * follows: + * ON OFF + * ------------------------- ---- ---- ---- ---- + * LED0 LED1 LED0 LED1 + * ------------------------- ---- ---- ---- ---- + * LED_STARTED 0 OFF OFF --- --- + * LED_HEAPALLOCATE 1 ON OFF --- --- + * LED_IRQSENABLED 2 OFF ON --- --- + * LED_STACKCREATED 3 ON ON --- --- + * LED_INIRQ 4 ON N/C OFF N/C + * LED_SIGNAL 4 ON N/C OFF N/C + * LED_ASSERTION 4 ON N/C OFF N/C + * LED_PANIC 4 ON N/C OFF N/C + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 4 +#define LED_ASSERTION 4 +#define LED_PANIC 4 + +#define LED_NVALUES 5 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MIRTOO_INCLUDE_BOARD_H */ diff --git a/configs/mirtoo/nsh/Make.defs b/configs/mirtoo/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e7bff768910e11b6bc0bce600ff7fbb3366d2b3a --- /dev/null +++ b/configs/mirtoo/nsh/Make.defs @@ -0,0 +1,100 @@ +############################################################################ +# configs/mirtoo/nsh/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/mips/src/mips32/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/mirtoo/nsh/defconfig b/configs/mirtoo/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..168cfab8dd86a9880757f30bc82e8d7c66d16d5e --- /dev/null +++ b/configs/mirtoo/nsh/defconfig @@ -0,0 +1,840 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +CONFIG_ARCH_MIPS=y +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="mips" +CONFIG_ARCH_FAMILY="mips32" +CONFIG_ARCH_CHIP="pic32mx" +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_CHIP_PIC32MX=y +# CONFIG_ARCH_CHIP_PIC32MZ is not set +CONFIG_ARCH_MIPS32=y +CONFIG_ARCH_MIPS_24KC=y +# CONFIG_ARCH_MIPS_M14K is not set +# CONFIG_ARCH_HAVE_MICROMIPS is not set + +# +# MIPS32 Configuration Options +# +# CONFIG_MIPS32_TOOLCHAIN_GNU_ELF is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_XC32 is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW is not set +CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE=y +# CONFIG_MIPS32_TOOLCHAIN_PINGUINOW is not set +# CONFIG_MIPS32_FRAMEPOINTER is not set + +# +# PIC32MX Configuration Options +# +# CONFIG_ARCH_CHIP_PIC32MX110F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128C is not set +CONFIG_ARCH_CHIP_PIC32MX250F128D=y +# CONFIG_ARCH_CHIP_PIC32MX320F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX420F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX440F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX460F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX460F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX1 is not set +CONFIG_ARCH_CHIP_PIC32MX2=y +# CONFIG_ARCH_CHIP_PIC32MX3 is not set +# CONFIG_ARCH_CHIP_PIC32MX4 is not set +# CONFIG_ARCH_CHIP_PIC32MX5 is not set +# CONFIG_ARCH_CHIP_PIC32MX6 is not set +# CONFIG_ARCH_CHIP_PIC32MX7 is not set +# CONFIG_PIC32MX_MVEC is not set +# CONFIG_PIC32MX_SPI is not set +CONFIG_PIC32MX_T1=y + +# +# PIC32MX Peripheral Support +# +# CONFIG_PIC32MX_WDT is not set +# CONFIG_PIC32MX_T2 is not set +# CONFIG_PIC32MX_T3 is not set +# CONFIG_PIC32MX_T4 is not set +# CONFIG_PIC32MX_T5 is not set +# CONFIG_PIC32MX_IC1 is not set +# CONFIG_PIC32MX_IC2 is not set +# CONFIG_PIC32MX_IC3 is not set +# CONFIG_PIC32MX_IC4 is not set +# CONFIG_PIC32MX_IC5 is not set +# CONFIG_PIC32MX_OC1 is not set +# CONFIG_PIC32MX_OC2 is not set +# CONFIG_PIC32MX_OC3 is not set +# CONFIG_PIC32MX_OC4 is not set +# CONFIG_PIC32MX_OC5 is not set +# CONFIG_PIC32MX_I2C1 is not set +# CONFIG_PIC32MX_I2C2 is not set +# CONFIG_PIC32MX_I2C3 is not set +# CONFIG_PIC32MX_I2C4 is not set +# CONFIG_PIC32MX_I2C5 is not set +# CONFIG_PIC32MX_SPI1 is not set +# CONFIG_PIC32MX_SPI2 is not set +# CONFIG_PIC32MX_SPI3 is not set +# CONFIG_PIC32MX_SPI4 is not set +CONFIG_PIC32MX_UART1=y +# CONFIG_PIC32MX_UART2 is not set +# CONFIG_PIC32MX_UART3 is not set +# CONFIG_PIC32MX_UART4 is not set +# CONFIG_PIC32MX_UART5 is not set +# CONFIG_PIC32MX_UART6 is not set +# CONFIG_PIC32MX_ADC is not set +# CONFIG_PIC32MX_PMP is not set +# CONFIG_PIC32MX_CM1 is not set +# CONFIG_PIC32MX_CM2 is not set +# CONFIG_PIC32MX_CM3 is not set +# CONFIG_PIC32MX_RTCC is not set +# CONFIG_PIC32MX_DMA is not set +# CONFIG_PIC32MX_FLASH is not set +# CONFIG_PIC32MX_USBDEV is not set +# CONFIG_PIC32MX_USBHOST is not set +# CONFIG_PIC32MX_CAN1 is not set +# CONFIG_PIC32MX_CAN2 is not set +# CONFIG_PIC32MX_ETHERNET is not set +# CONFIG_PIC32MX_CTMU is not set + +# +# PIC32MX Peripheral Interrupt Priorities +# +CONFIG_PIC32MX_CTPRIO=16 +CONFIG_PIC32MX_CS0PRIO=16 +CONFIG_PIC32MX_CS1PRIO=16 +CONFIG_PIC32MX_INT0PRIO=16 +CONFIG_PIC32MX_INT1PRIO=16 +CONFIG_PIC32MX_INT2PRIO=16 +CONFIG_PIC32MX_INT3PRIO=16 +CONFIG_PIC32MX_INT4PRIO=16 +CONFIG_PIC32MX_T1PRIO=16 +CONFIG_PIC32MX_UART1PRIO=16 + +# +# Device Configuration 0 (DEVCFG0) +# +CONFIG_PIC32MX_DEBUGGER=1 +CONFIG_PIC32MX_ICESEL=2 +CONFIG_PIC32MX_PROGFLASHWP=0xff +CONFIG_PIC32MX_BOOTFLASHWP=1 +CONFIG_PIC32MX_CODEWP=1 + +# +# Device Configuration 1 (DEVCFG1) +# +CONFIG_PIC32MX_OSCOUT=1 + +# +# Device Configuration 3 (DEVCFG3) +# +CONFIG_PIC32MX_USBIDO=0 +CONFIG_PIC32MX_VBUSIO=0 +# CONFIG_PIC32MX_WDENABLE is not set +CONFIG_PIC32MX_FETHIO=1 +CONFIG_PIC32MX_FMIIEN=1 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +CONFIG_ARCH_VECNOTIRQ=y +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8079 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0xa0000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_MIRTOO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mirtoo" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_MIRTOO_RELEASE=2 +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=22 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_DISABLE_SEMICOLON=y +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +# CONFIG_NSH_DISABLE_ECHO is not set +CONFIG_NSH_DISABLE_EXEC=y +CONFIG_NSH_DISABLE_EXIT=y +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +CONFIG_NSH_DISABLE_HEXDUMP=y +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKFIFO=y +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +CONFIG_NSH_DISABLE_XD=y + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +CONFIG_NSH_DISABLE_ITEF=y +CONFIG_NSH_DISABLE_LOOPS=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mirtoo/nsh/setenv.sh b/configs/mirtoo/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..e19bcb407f2df12eb951884caf31deb146c565ec --- /dev/null +++ b/configs/mirtoo/nsh/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/mirtoo/nsh/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +# This is the Cygwin path to the location where I installed the MicroChip +# PIC32MX C32 toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install a different version of if you install the +# toolchain at a different location +export TOOLCHAIN_BIN="/cygdrive/c/MicroChip/mplabc32/v1.12/bin" + +# This the Linux path to the location where I installed the MicroChip +# PIC32MX XC32 toolchain under Linux. This is the default install +# location. You will also have to edit this if you install a different +# version of if you install the toolchain at a different location +#export TOOLCHAIN_BIN="/opt/microchip/xc32/v1.00/bin" + +# This is the Cygwin path to the location where I installed the Pinguino +# toolchain under Windows. You will have to edit this if you install the +# tool chain in a different location or use a different version. /bin +# needs to precede the tool path or otherwise you will get +# /cygdrive/c/PinguinoX.3/win32/p32/bin/make which does not like POSIX +# style paths. +#export TOOLCHAIN_BIN="/bin:/cygdrive/c/PinguinoX.3/win32/p32/bin" + +# This the Linux path to the location where I installed the microchipOpen +# toolchain under Linux. You will have to edit this if you use the +# microchipOpen toolchain. +#export TOOLCHAIN_BIN="~/projects/microchipopen/v105_freeze/pic32-v105-freeze-20120622/install-image/bin" + +# This is the path to the toosl subdirectory +export PIC32TOOL_DIR="${WD}/tools/pic32mx" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${PIC32TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mirtoo/nxffs/Make.defs b/configs/mirtoo/nxffs/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..8943e8f1b60a9251684ad19dbd4d3b45bc576f8e --- /dev/null +++ b/configs/mirtoo/nxffs/Make.defs @@ -0,0 +1,100 @@ +############################################################################ +# configs/mirtoo/nxffs/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/mips/src/mips32/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/mirtoo/nxffs/defconfig b/configs/mirtoo/nxffs/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ffe67df93d3190e9d66e9d430d91dec8dc75e58e --- /dev/null +++ b/configs/mirtoo/nxffs/defconfig @@ -0,0 +1,886 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +CONFIG_ARCH_MIPS=y +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="mips" +CONFIG_ARCH_FAMILY="mips32" +CONFIG_ARCH_CHIP="pic32mx" +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_CHIP_PIC32MX=y +# CONFIG_ARCH_CHIP_PIC32MZ is not set +CONFIG_ARCH_MIPS32=y +CONFIG_ARCH_MIPS_24KC=y +# CONFIG_ARCH_MIPS_M14K is not set +# CONFIG_ARCH_HAVE_MICROMIPS is not set + +# +# MIPS32 Configuration Options +# +# CONFIG_MIPS32_TOOLCHAIN_GNU_ELF is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_XC32 is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE is not set +CONFIG_MIPS32_TOOLCHAIN_PINGUINOW=y +# CONFIG_MIPS32_FRAMEPOINTER is not set + +# +# PIC32MX Configuration Options +# +# CONFIG_ARCH_CHIP_PIC32MX110F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128C is not set +CONFIG_ARCH_CHIP_PIC32MX250F128D=y +# CONFIG_ARCH_CHIP_PIC32MX320F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX420F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX440F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX460F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX460F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX1 is not set +CONFIG_ARCH_CHIP_PIC32MX2=y +# CONFIG_ARCH_CHIP_PIC32MX3 is not set +# CONFIG_ARCH_CHIP_PIC32MX4 is not set +# CONFIG_ARCH_CHIP_PIC32MX5 is not set +# CONFIG_ARCH_CHIP_PIC32MX6 is not set +# CONFIG_ARCH_CHIP_PIC32MX7 is not set +# CONFIG_PIC32MX_MVEC is not set +CONFIG_PIC32MX_SPI=y +CONFIG_PIC32MX_T1=y + +# +# PIC32MX Peripheral Support +# +# CONFIG_PIC32MX_WDT is not set +# CONFIG_PIC32MX_T2 is not set +# CONFIG_PIC32MX_T3 is not set +# CONFIG_PIC32MX_T4 is not set +# CONFIG_PIC32MX_T5 is not set +# CONFIG_PIC32MX_IC1 is not set +# CONFIG_PIC32MX_IC2 is not set +# CONFIG_PIC32MX_IC3 is not set +# CONFIG_PIC32MX_IC4 is not set +# CONFIG_PIC32MX_IC5 is not set +# CONFIG_PIC32MX_OC1 is not set +# CONFIG_PIC32MX_OC2 is not set +# CONFIG_PIC32MX_OC3 is not set +# CONFIG_PIC32MX_OC4 is not set +# CONFIG_PIC32MX_OC5 is not set +# CONFIG_PIC32MX_I2C1 is not set +# CONFIG_PIC32MX_I2C2 is not set +# CONFIG_PIC32MX_I2C3 is not set +# CONFIG_PIC32MX_I2C4 is not set +# CONFIG_PIC32MX_I2C5 is not set +# CONFIG_PIC32MX_SPI1 is not set +CONFIG_PIC32MX_SPI2=y +# CONFIG_PIC32MX_SPI3 is not set +# CONFIG_PIC32MX_SPI4 is not set +CONFIG_PIC32MX_UART1=y +# CONFIG_PIC32MX_UART2 is not set +# CONFIG_PIC32MX_UART3 is not set +# CONFIG_PIC32MX_UART4 is not set +# CONFIG_PIC32MX_UART5 is not set +# CONFIG_PIC32MX_UART6 is not set +# CONFIG_PIC32MX_ADC is not set +# CONFIG_PIC32MX_PMP is not set +# CONFIG_PIC32MX_CM1 is not set +# CONFIG_PIC32MX_CM2 is not set +# CONFIG_PIC32MX_CM3 is not set +# CONFIG_PIC32MX_RTCC is not set +# CONFIG_PIC32MX_DMA is not set +# CONFIG_PIC32MX_FLASH is not set +# CONFIG_PIC32MX_USBDEV is not set +# CONFIG_PIC32MX_USBHOST is not set +# CONFIG_PIC32MX_CAN1 is not set +# CONFIG_PIC32MX_CAN2 is not set +# CONFIG_PIC32MX_ETHERNET is not set +# CONFIG_PIC32MX_CTMU is not set + +# +# PIC32MX Peripheral Interrupt Priorities +# +CONFIG_PIC32MX_CTPRIO=16 +CONFIG_PIC32MX_CS0PRIO=16 +CONFIG_PIC32MX_CS1PRIO=16 +CONFIG_PIC32MX_INT0PRIO=16 +CONFIG_PIC32MX_INT1PRIO=16 +CONFIG_PIC32MX_INT2PRIO=16 +CONFIG_PIC32MX_INT3PRIO=16 +CONFIG_PIC32MX_INT4PRIO=16 +CONFIG_PIC32MX_T1PRIO=16 +CONFIG_PIC32MX_SPI2PRIO=16 +CONFIG_PIC32MX_UART1PRIO=16 + +# +# SPI Driver Configuration +# + +# +# Device Configuration 0 (DEVCFG0) +# +CONFIG_PIC32MX_DEBUGGER=1 +CONFIG_PIC32MX_ICESEL=2 +CONFIG_PIC32MX_PROGFLASHWP=0x3ff +CONFIG_PIC32MX_BOOTFLASHWP=1 +CONFIG_PIC32MX_CODEWP=1 + +# +# Device Configuration 1 (DEVCFG1) +# +CONFIG_PIC32MX_OSCOUT=1 + +# +# Device Configuration 3 (DEVCFG3) +# +CONFIG_PIC32MX_USBIDO=0 +CONFIG_PIC32MX_VBUSIO=0 +# CONFIG_PIC32MX_WDENABLE is not set +CONFIG_PIC32MX_FETHIO=1 +CONFIG_PIC32MX_FMIIEN=1 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +CONFIG_ARCH_VECNOTIRQ=y +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8079 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0xa0000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_MIRTOO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mirtoo" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_MIRTOO_RELEASE=2 +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=22 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +CONFIG_MTD_SST25=y +CONFIG_SST25_SPIMODE=1 +CONFIG_SST25_SPIFREQUENCY=20000000 +# CONFIG_SST25_READONLY is not set +# CONFIG_SST25_SECTOR512 is not set +# CONFIG_SST25_SLOWWRITE is not set +# CONFIG_SST25_SLOWREAD is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +CONFIG_FS_NXFFS=y +# CONFIG_NXFFS_SCAN_VOLUME is not set +CONFIG_NXFFS_PREALLOCATED=y +CONFIG_NXFFS_ERASEDSTATE=0xff +CONFIG_NXFFS_PACKTHRESHOLD=32 +CONFIG_NXFFS_MAXNAMLEN=255 +CONFIG_NXFFS_TAILTHRESHOLD=8192 +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +CONFIG_NSH_DISABLEBG=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +# CONFIG_NSH_DISABLE_ECHO is not set +CONFIG_NSH_DISABLE_EXEC=y +CONFIG_NSH_DISABLE_EXIT=y +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +CONFIG_NSH_DISABLE_HEXDUMP=y +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_KILL=y +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKFIFO=y +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +CONFIG_NSH_DISABLE_SH=y +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TEST=y +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mirtoo/nxffs/setenv.sh b/configs/mirtoo/nxffs/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..1a6279ef13f2e9e3ce897ea0721a71adc94a33c7 --- /dev/null +++ b/configs/mirtoo/nxffs/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/mirtoo/nxffs/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +# This is the Cygwin path to the location where I installed the MicroChip +# PIC32MX C32 toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install a different version of if you install the +# toolchain at a different location +export TOOLCHAIN_BIN="/cygdrive/c/MicroChip/mplabc32/v1.12/bin" + +# This the Linux path to the location where I installed the MicroChip +# PIC32MX XC32 toolchain under Linux. This is the default install +# location. You will also have to edit this if you install a different +# version of if you install the toolchain at a different location +#export TOOLCHAIN_BIN="/opt/microchip/xc32/v1.00/bin" + +# This is the Cygwin path to the location where I installed the Pinguino +# toolchain under Windows. You will have to edit this if you install the +# tool chain in a different location or use a different version. /bin +# needs to precede the tool path or otherwise you will get +# /cygdrive/c/PinguinoX.3/win32/p32/bin/make which does not like POSIX +# style paths. +#export TOOLCHAIN_BIN="/bin:/cygdrive/c/PinguinoX.3/win32/p32/bin" + +# This the Linux path to the location where I installed the microchipOpen +# toolchain under Linux. You will have to edit this if you use the +# microchipOpen toolchain. +#export TOOLCHAIN_BIN="~/projects/microchipopen/v105_freeze/pic32-v105-freeze-20120622/install-image/bin" + +# This is the path to the toosl subdirectory +export PIC32TOOL_DIR="${WD}/tools/pic32mx" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${PIC32TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/mirtoo/scripts/c32-debug.ld b/configs/mirtoo/scripts/c32-debug.ld new file mode 100644 index 0000000000000000000000000000000000000000..161c5b81ea229d39ffe06d35cb73c641ed46e41c --- /dev/null +++ b/configs/mirtoo/scripts/c32-debug.ld @@ -0,0 +1,313 @@ +/**************************************************************************** + * configs/mirtoo/scripts/c32-debug.ld + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MX250F128D has 128Kb of program FLASH at physical address + * 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K + + /* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses + * 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but + * all other accesses are in KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * --------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 384 384 (0.375Kb) + * Gen exception 0x1fc00000 KSEG1 128 512 (0.500Kb) + * TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb) + * Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb) + * Others 0x1fc00380 KSEG1 128 1024 (1.000Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb) + * Debug code 0x1fc00480 KSEG1 3072-1152-16 3056 (2.984Kb) + * DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 256 + kseg1_cacherr (rx) : ORIGIN = 0xbfc00300, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 3072-1152-16 + kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16 + + /* The PIC32MX250F128D has 32Kb of data memory at physical address + * 0x00000000. Since the PIC32MX has no data cache, this memory is + * always accessed through KSEG1. + * + * NOTE: When used with MPLAB, we need to set aside 512 bytes of memory + * at the beginning of this region for use by MPLAB. + */ + + kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(pic32mx) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_progmem + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/mirtoo/scripts/c32-release.ld b/configs/mirtoo/scripts/c32-release.ld new file mode 100644 index 0000000000000000000000000000000000000000..e34a3b8e120b3130715fe9137ce27f2e718edef0 --- /dev/null +++ b/configs/mirtoo/scripts/c32-release.ld @@ -0,0 +1,315 @@ +/**************************************************************************** + * configs/mirtoo/scripts/c32-release.ld + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MX250F128D has 128Kb of program FLASH at physical address + * 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K + + /* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses + * 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but + * all other accesses are in KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * --------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 384 384 (0.375Kb) + * Gen exception 0x1fc00000 KSEG1 128 512 (0.500Kb) + * TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb) + * Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb) + * Others 0x1fc00380 KSEG1 128 1024 (1.000Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb) + * JTAG 0x1fc00480 KSEG1 16 1168 (1.141Kb) + * Exceptions 0x1fc00490 KSEG0 3072-1168-16 3056 (2.984Kb) + * DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 256 + kseg1_cacherr (rx) : ORIGIN = 0xbfc00300, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 3072-1168-16 + kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16 + + /* The PIC32MX250F128D has 32Kb of data memory at physical address + * 0x00000000. Since the PIC32MX has no data cache, this memory is + * always accessed through KSEG1. + * + * NOTE: When used with MPLAB, we need to set aside 512 bytes of memory + * at the beginning of this region for use by MPLAB. + */ + + kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(pic32mx) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/mirtoo/scripts/mips-elf-debug.ld b/configs/mirtoo/scripts/mips-elf-debug.ld new file mode 100644 index 0000000000000000000000000000000000000000..990bc154b6391feb022cc012ade204431f4d017e --- /dev/null +++ b/configs/mirtoo/scripts/mips-elf-debug.ld @@ -0,0 +1,313 @@ +/**************************************************************************** + * configs/mirtoo/scripts/mips-elf-debug.ld + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MX250F128D has 128Kb of program FLASH at physical address + * 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K + + /* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses + * 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but + * all other accesses are in KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * --------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 384 384 (0.375Kb) + * Gen exception 0x1fc00000 KSEG1 128 512 (0.500Kb) + * TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb) + * Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb) + * Others 0x1fc00380 KSEG1 128 1024 (1.000Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb) + * Debug code 0x1fc00480 KSEG1 3072-1152-16 3056 (2.984Kb) + * DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 256 + kseg1_cacherr (rx) : ORIGIN = 0xbfc00300, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 3072-1152-16 + kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16 + + /* The PIC32MX250F128D has 32Kb of data memory at physical address + * 0x00000000. Since the PIC32MX has no data cache, this memory is + * always accessed through KSEG1. + * + * NOTE: When used with MPLAB, we need to set aside 512 bytes of memory + * at the beginning of this region for use by MPLAB. + */ + + kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512 +} + +OUTPUT_FORMAT("elf32-littlemips") +OUTPUT_ARCH(mips) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_progmem + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/mirtoo/scripts/mips-elf-release.ld b/configs/mirtoo/scripts/mips-elf-release.ld new file mode 100644 index 0000000000000000000000000000000000000000..2c3ee892fc499d07ce228d54a5d89134e1f54b7c --- /dev/null +++ b/configs/mirtoo/scripts/mips-elf-release.ld @@ -0,0 +1,315 @@ +/**************************************************************************** + * configs/mirtoo/scripts/mips-elf-release.ld + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MX250F128D has 128Kb of program FLASH at physical address + * 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K + + /* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses + * 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but + * all other accesses are in KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * --------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 384 384 (0.375Kb) + * Gen exception 0x1fc00000 KSEG1 128 512 (0.500Kb) + * TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb) + * Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb) + * Others 0x1fc00380 KSEG1 128 1024 (1.000Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb) + * JTAG 0x1fc00480 KSEG1 16 1168 (1.141Kb) + * Exceptions 0x1fc00490 KSEG0 3072-1168-16 3056 (2.984Kb) + * DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 256 + kseg1_cacherr (rx) : ORIGIN = 0xbfc00300, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 3072-1168-16 + kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16 + + /* The PIC32MX250F128D has 32Kb of data memory at physical address + * 0x00000000. Since the PIC32MX has no data cache, this memory is + * always accessed through KSEG1. + * + * NOTE: When used with MPLAB, we need to set aside 512 bytes of memory + * at the beginning of this region for use by MPLAB. + */ + + kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K +} + +OUTPUT_FORMAT("elf32-littlemips") +OUTPUT_ARCH(mips) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/mirtoo/scripts/xc32-debug.ld b/configs/mirtoo/scripts/xc32-debug.ld new file mode 100644 index 0000000000000000000000000000000000000000..3c5cc949df76f9f59e1123abb1cb29c55e36c786 --- /dev/null +++ b/configs/mirtoo/scripts/xc32-debug.ld @@ -0,0 +1,313 @@ +/**************************************************************************** + * configs/mirtoo/scripts/xc32-debug.ld + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MX250F128D has 128Kb of program FLASH at physical address + * 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000 + */ + + kseg0_program_mem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K + + /* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses + * 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but + * all other accesses are in KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * --------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 384 384 (0.375Kb) + * Gen exception 0x1fc00000 KSEG1 128 512 (0.500Kb) + * TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb) + * Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb) + * Others 0x1fc00380 KSEG1 128 1024 (1.000Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb) + * Debug code 0x1fc00480 KSEG1 3072-1152-16 3056 (2.984Kb) + * DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 256 + kseg1_cacherr (rx) : ORIGIN = 0xbfc00300, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 3072-1152-16 + kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16 + + /* The PIC32MX250F128D has 32Kb of data memory at physical address + * 0x00000000. Since the PIC32MX has no data cache, this memory is + * always accessed through KSEG1. + * + * NOTE: When used with MPLAB, we need to set aside 512 bytes of memory + * at the beginning of this region for use by MPLAB. + */ + + kseg1_data_mem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(pic32mx) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_program_mem + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_program_mem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_data_mem AT > kseg0_program_mem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_data_mem) ; + _bmxdudba_address = LENGTH(kseg1_data_mem) ; + _bmxdupba_address = LENGTH(kseg1_data_mem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_data_mem AT > kseg0_program_mem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_data_mem AT > kseg0_program_mem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_data_mem AT > kseg0_program_mem + + .lit8 : + { + *(.lit8) + } > kseg1_data_mem AT > kseg0_program_mem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_data_mem AT>kseg0_program_mem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_data_mem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_data_mem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/mirtoo/scripts/xc32-release.ld b/configs/mirtoo/scripts/xc32-release.ld new file mode 100644 index 0000000000000000000000000000000000000000..b6b24cc7187ef01e31e0df592fa7799869e66e62 --- /dev/null +++ b/configs/mirtoo/scripts/xc32-release.ld @@ -0,0 +1,315 @@ +/**************************************************************************** + * configs/mirtoo/scripts/xc32-release.ld + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MX250F128D has 128Kb of program FLASH at physical address + * 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000 + */ + + kseg0_program_mem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K + + /* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses + * 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but + * all other accesses are in KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * --------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 384 384 (0.375Kb) + * Gen exception 0x1fc00000 KSEG1 128 512 (0.500Kb) + * TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb) + * Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb) + * Others 0x1fc00380 KSEG1 128 1024 (1.000Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb) + * JTAG 0x1fc00480 KSEG1 16 1168 (1.141Kb) + * Exceptions 0x1fc00490 KSEG0 3072-1168-16 3056 (2.984Kb) + * DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 256 + kseg1_cacherr (rx) : ORIGIN = 0xbfc00300, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 3072-1168-16 + kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16 + + /* The PIC32MX250F128D has 32Kb of data memory at physical address + * 0x00000000. Since the PIC32MX has no data cache, this memory is + * always accessed through KSEG1. + * + * NOTE: When used with MPLAB, we need to set aside 512 bytes of memory + * at the beginning of this region for use by MPLAB. + */ + + kseg1_data_mem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(pic32mx) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_program_mem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_data_mem AT > kseg0_program_mem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_data_mem) ; + _bmxdudba_address = LENGTH(kseg1_data_mem) ; + _bmxdupba_address = LENGTH(kseg1_data_mem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_data_mem AT > kseg0_program_mem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_data_mem AT > kseg0_program_mem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_data_mem AT > kseg0_program_mem + + .lit8 : + { + *(.lit8) + } > kseg1_data_mem AT > kseg0_program_mem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_data_mem AT>kseg0_program_mem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_data_mem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_data_mem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/mirtoo/src/.gitignore b/configs/mirtoo/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/mirtoo/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/mirtoo/src/Makefile b/configs/mirtoo/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..c49e08ecf0e55f8b4c6c7a02b71ff5980d396b57 --- /dev/null +++ b/configs/mirtoo/src/Makefile @@ -0,0 +1,53 @@ +############################################################################ +# configs/mirtoo/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = pic32_boot.c pic32_leds.c + +ifeq ($(CONFIG_PIC32MX_SPI2),y) +CSRCS += pic32_spi2.c +endif + +ifeq ($(CONFIG_PIC32MX_ADC),y) +CSRCS += pic32_adc.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += pic32_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/mirtoo/src/mirtoo.h b/configs/mirtoo/src/mirtoo.h new file mode 100644 index 0000000000000000000000000000000000000000..81c93fe8996d28793ebc6edbf75374f559d8e5d5 --- /dev/null +++ b/configs/mirtoo/src/mirtoo.h @@ -0,0 +1,114 @@ +/**************************************************************************** + * configs/mirtoo/src/mirtoo.h + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MIRTOO_SRC_MIRTOO_H +#define __CONFIGS_MIRTOO_SRC_MIRTOO_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Name: pic32mx_spi2initialize + * + * Description: + * Called to configure SPI2 chip select GPIO pins for the Mirtoo module. + * + ************************************************************************************/ + +#ifdef CONFIG_PIC32MX_SPI2 +void weak_function pic32mx_spi2initialize(void); +#endif + +/************************************************************************************ + * Name: pic32mx_led_initialize + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void pic32mx_led_initialize(void); +#endif + +/**************************************************************************** + * Name: pic32mx_adcinitialize + * + * Description: + * Perform architecture specific ADC initialization + * + ****************************************************************************/ + +#ifdef CONFIG_PIC32MX_ADC +/* int pic32mx_adcinitialize(void); not used */ +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MIRTOO_SRC_MIRTOO_H */ diff --git a/configs/mirtoo/src/pic32_adc.c b/configs/mirtoo/src/pic32_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..142dc2e0c59236b164bff7c6d117181957631140 --- /dev/null +++ b/configs/mirtoo/src/pic32_adc.c @@ -0,0 +1,103 @@ +/**************************************************************************** + * config/mirtoo/src/pic32_adc.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include "pic32mx.h" +#include "mirtoo.h" + +#ifdef CONFIG_PIC32MX_ADC + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* The Mirtoo features a PGA117 amplifier/multipexer that can be configured to + * bring any analog signal from PORT0,.. PORT7 to pin 19 of the PIC32MX: + * + * --- ------------------------------------------------ ---------------------------- + * PIN PIC32 SIGNAL(s) BOARD SIGNAL/USAGE + * --- ------------------------------------------------ ---------------------------- + * 19 PGED3/VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/PMD7/RA0 AIN PGA117 Vout + --- ------------------------------------------------ ---------------------------- + * + * The PGA117 driver can be enabled by setting the following the nsh + * configuration: + * + * CONFIG_ADC=y : Enable support for analog input devices + * CONFIG_PIC32MX_ADC=y : Enable support the PIC32 ADC driver + * CONFIG_ADC_PGA11X=y : Enable support for the PGA117 + * + * When CONFIG_PIC32MX_ADC=y is defined, the Mirtoo boot up logic will automatically + * configure pin 18 (AN0) as an analog input. + */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pic32mx_adcinitialize + * + * Description: + * Perform architecture specific ADC initialization + * + ****************************************************************************/ + +#if 0 /* Not used */ +int pic32mx_adcinitialize(void) +{ + /* Configure the pin 19 as an analog input */ +#warning "Missing logic" + + /* Initialize the PGA117 amplifier multiplexer */ +#warning "Missing logic" + + /* Register the ADC device driver */ +#warning "Missing logic" + + return OK; +} +#endif + +#endif /* CONFIG_PIC32MX_ADC */ diff --git a/configs/mirtoo/src/pic32_appinit.c b/configs/mirtoo/src/pic32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..459e97b844aa6ef554e4ea24d01d17d859a2568c --- /dev/null +++ b/configs/mirtoo/src/pic32_appinit.c @@ -0,0 +1,156 @@ +/**************************************************************************** + * config/mirtoo/src/pic32_appinit.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_PIC32MX_SPI2 +# include +# include +# include +#endif + +#include "pic32mx.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ +/* Can't support the SST25 device if it SPI2 or SST25 support is not enabled */ + +#define HAVE_SST25 1 +#if !defined(CONFIG_PIC32MX_SPI2) || !defined(CONFIG_MTD_SST25) +# undef HAVE_SST25 +#endif + +/* Can't support SST25 features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef HAVE_SST25 +#endif + +/* Use minor device number 0 is not is provided */ + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/* Can't support both FAT and NXFFS */ + +#if defined(CONFIG_FS_FAT) && defined(CONFIG_FS_NXFFS) +# warning "Can't support both FAT and NXFFS -- using FAT" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef HAVE_SST25 + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; + int ret; + + /* Get the SPI port */ + + spi = pic32mx_spibus_initialize(2); + if (!spi) + { + fdbg("ERROR: Failed to initialize SPI port 2\n"); + return -ENODEV; + } + + /* Now bind the SPI interface to the SST 25 SPI FLASH driver */ + + mtd = sst25_initialize(spi); + if (!mtd) + { + fdbg("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n"); + return -ENODEV; + } + +#ifndef CONFIG_FS_NXFFS + /* And finally, use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(CONFIG_NSH_MMCSDMINOR, mtd); + if (ret < 0) + { + fdbg("ERROR: Initialize the FTL layer\n"); + return ret; + } +#else + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", -ret); + return ret; + } + + /* Mount the file system at /mnt/sst25 */ + + ret = mount(NULL, "/mnt/sst25", "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif +#endif + return OK; +} diff --git a/configs/mirtoo/src/pic32_boot.c b/configs/mirtoo/src/pic32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..221377fd5ac81f353db999b1b936d643016ab190 --- /dev/null +++ b/configs/mirtoo/src/pic32_boot.c @@ -0,0 +1,160 @@ +/************************************************************************************ + * configs/mirtoo/src/pic32_boot.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "pic32mx.h" +#include "pic32mx-pps.h" +#include "mirtoo.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define GPIO_U1TX (GPIO_OUTPUT|GPIO_PORTC|GPIO_PIN5) +#define GPIO_U1RX (GPIO_INPUT|GPIO_PORTC|GPIO_PIN6) + +#define GPIO_U2TX (GPIO_OUTPUT|GPIO_PORTB|GPIO_PIN10) +#define GPIO_U2RX (GPIO_INPUT|GPIO_PORTB|GPIO_PIN11) + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_uartinitialize + * + * Description: + * When mounted on the DTX1-4000L EV-kit1 board, serial output is avaiable through + * an FT230X device via the FUNC0 and FUNC1 module outputs. If CONFIG_PIC32MX_UART2 + * is enabled, the src/up_boot will configure the UART2 pins as follows. + * + * ---------- ------ ----- ------ ------------------------- + * BOARD OUTPUT PIN SIGNAL NOTES + * ---------- ------ ----- ------ ------------------------- + * FT230X RXD FUNC0 RPB11 U2RX UART2 RX (Also PGEC2) + * FT230X TXD FUNC1 RPB10 U2TX UART2 TX (Also PGED2) + * + * If CONFIG_PIC32MX_UART1 is enabled, the src/up_boot will configure the UART + * pins as follows. This will support communictions (via an external RS-232 + * driver) through X3 pins 4 and 5: + * + * ---------- ------ ----- ------ ------------------------- + * BOARD MODULE PIN SIGNAL NOTES + * ---------- ------ ----- ------ ------------------------- + * X3, pin 4 FUNC4 RPBC5 U1TX UART1 TX + * X3, pin 5 FUNC5 RPBC6 U1RX UART1 RX + * + ************************************************************************************/ + +static inline void pic32mx_uartinitialize(void) +{ +#ifdef CONFIG_PIC32MX_UART2 + /* Make sure that TRIS pins are set correctly. Configure the UART pins as digital + * inputs and outputs first. + */ + + pic32mx_configgpio(GPIO_U2TX); + pic32mx_configgpio(GPIO_U2RX); + + /* Configure UART TX and RX pins to RPB10 and 11, respectively */ + + putreg32(PPS_INSEL_RPB11, PIC32MX_PPS_U2RXR); + putreg32(PPS_OUTSEL_U2TX, PIC32MX_PPS_RPB10R); +#endif + +#ifdef CONFIG_PIC32MX_UART1 + /* Make sure that TRIS pins are set correctly. Configure the UART pins as digital + * inputs and outputs first. + */ + + pic32mx_configgpio(GPIO_U1TX); + pic32mx_configgpio(GPIO_U1RX); + + /* Configure UART TX and RX pins to RPB10 and 11, respectively */ + + putreg32(PPS_INSEL_RPC6, PIC32MX_PPS_U1RXR); + putreg32(PPS_OUTSEL_U1TX, PIC32MX_PPS_RPC5R); +#endif +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_boardinitialize + * + * Description: + * All PIC32MX architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void pic32mx_boardinitialize(void) +{ + /* Configure the console UART */ + + pic32mx_uartinitialize(); + + /* Configure SPI chip selects if 1) at least one SPI is enabled, and 2) the weak + * function pic32mx_spi2initialize() has been brought into the link. + */ + +#ifdef CONFIG_PIC32MX_SPI2 + if (pic32mx_spi2initialize) + { + pic32mx_spi2initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + pic32mx_led_initialize(); +#endif +} diff --git a/configs/mirtoo/src/pic32_leds.c b/configs/mirtoo/src/pic32_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..97fe553ab6f13ef75adf1488df17f5a49cb50eac --- /dev/null +++ b/configs/mirtoo/src/pic32_leds.c @@ -0,0 +1,274 @@ +/**************************************************************************** + * configs/mirtoo/src/pic32_leds.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "pic32mx.h" +#include "mirtoo.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED Configuration ********************************************************/ +/* The Mirtoo module has 2 user LEDs labelled LED0 and LED1 in the schematics: + * + * --- ----- -------------------------------------------------------------- + * PIN Board Notes + * --- ----- -------------------------------------------------------------- + * RC8 LED0 Grounded, high value illuminates + * RC9 LED1 Grounded, high value illuminates + * + * The Dimitech DTX1-4000L EV-kit1 supports 3 more LEDs, but there are not + * controllable from software. + * + * If CONFIG_ARCH_LEDS is defined, then NuttX will control these LEDs as + * follows: + * ON OFF + * ------------------------- ---- ---- ---- ---- + * LED0 LED1 LED0 LED1 + * ------------------------- ---- ---- ---- ---- + * LED_STARTED 0 OFF OFF --- --- + * LED_HEAPALLOCATE 1 ON OFF --- --- + * LED_IRQSENABLED 2 OFF ON --- --- + * LED_STACKCREATED 3 ON ON --- --- + * LED_INIRQ 4 ON N/C OFF N/C + * LED_SIGNAL 4 ON N/C OFF N/C + * LED_ASSERTION 4 ON N/C OFF N/C + * LED_PANIC 4 ON N/C OFF N/C + */ + +#define GPIO_LED_0 (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTC|GPIO_PIN8) +#define GPIO_LED_1 (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTC|GPIO_PIN9) + +/* LED Management Definitions ***********************************************/ + +#ifdef CONFIG_ARCH_LEDS +# define LED_OFF 0 +# define LED_ON 1 +# define LED_NC 2 +#endif + +/* Debug ********************************************************************/ + +#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_LEDS) +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# undef CONFIG_DEBUG_LEDS +# undef CONFIG_DEBUG_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private types + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +struct led_setting_s +{ + uint8_t led0 : 2; + uint8_t led1 : 2; + uint8_t unused : 4; +}; +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* If CONFIG_ARCH_LEDS is defined then NuttX will control the LEDs. The + * following structures identified the LED settings for each NuttX LED state. + */ + +#ifdef CONFIG_ARCH_LEDS +static const struct led_setting_s g_ledonvalues[LED_NVALUES] = +{ + {LED_OFF, LED_OFF, 0}, + {LED_ON, LED_OFF, 0}, + {LED_OFF, LED_ON, 0}, + {LED_ON, LED_ON, 0}, + {LED_ON, LED_NC, 0}, +}; + +static const struct led_setting_s g_ledoffvalues[LED_NVALUES] = +{ + {LED_NC, LED_NC, 0}, + {LED_NC, LED_NC, 0}, + {LED_NC, LED_NC, 0}, + {LED_NC, LED_NC, 0}, + {LED_OFF, LED_NC, 0}, +}; + +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + * any way. The following array simply maps the PIC32MX_MIRTOO_LEDn + * index values to the correct LED pin configuration. + */ + +#else +static const uint16_t g_ledpincfg[PIC32MX_MIRTOO_NLEDS] = +{ + GPIO_LED_0, GPIO_LED_1 +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pic32mx_setleds + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +static void pic32mx_setleds(FAR const struct led_setting_s *setting) +{ + /* LEDs are pulled up so writing a low value (false) illuminates them */ + + if (setting->led0 != LED_NC) + { + pic32mx_gpiowrite(GPIO_LED_0, setting->led0 == LED_ON); + } + + if (setting->led1 != LED_NC) + { + pic32mx_gpiowrite(GPIO_LED_1, setting->led1 == LED_ON); + } +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled_initialize(void) +{ + /* Configure output pins */ + + pic32mx_configgpio(GPIO_LED_0); + pic32mx_configgpio(GPIO_LED_1); +} +#endif + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled(int led, bool ledon) +{ + /* LEDs are pulled up so writing a low value (false) illuminates them */ + + if ((unsigned)led < PIC32MX_MIRTOO_NLEDS) + { + pic32mx_gpiowrite(g_ledpincfg[led], ledon); + } +} +#endif + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled_all(uint8_t ledset) +{ + /* Call board_userled() with ledon == true to illuminated the LED */ + + board_userled(PIC32MX_MIRTOO_LED0, (ledset & PIC32MX_MIRTOO_LED0_BIT) != 0); + board_userled(PIC32MX_MIRTOO_LED1, (ledset & PIC32MX_MIRTOO_LED1_BIT) != 0); +} +#endif + +/**************************************************************************** + * Name: pic32mx_led_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void pic32mx_led_initialize(void) +{ + /* Configure output pins */ + + pic32mx_configgpio(GPIO_LED_0); + pic32mx_configgpio(GPIO_LED_1); +} +#endif + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_on(int led) +{ + if ((unsigned)led < LED_NVALUES) + { + pic32mx_setleds(&g_ledonvalues[led]); + } +} +#endif + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_off(int led) +{ + if ((unsigned)led < LED_NVALUES) + { + pic32mx_setleds(&g_ledoffvalues[led]); + } +} +#endif diff --git a/configs/mirtoo/src/pic32_spi2.c b/configs/mirtoo/src/pic32_spi2.c new file mode 100644 index 0000000000000000000000000000000000000000..682ebfc88ef1ba23d104d68e1bf12a6d607b43a3 --- /dev/null +++ b/configs/mirtoo/src/pic32_spi2.c @@ -0,0 +1,202 @@ +/************************************************************************************ + * configs/mirtoo/src/pic32_spi2.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "pic32mx.h" +#include "pic32mx-pps.h" +#include "mirtoo.h" + +#ifdef CONFIG_PIC32MX_SPI2 + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* The Mirtoo module as two on-board SPI devices: + * + * SST25VF032B - 32-Mbit SPI Serial FLASH + * + * PGA117 - Zero drift programmable gain amplifier with MUX. The PGA117 offers 10 + * analog inputs, a four-pin SPI interface with daisy-chain capability, and hardware + * and software shutdown in a TSSOP-20 package. Only 8 of the analog inputs (PORT0-7) + * are used on the Mirtoo module. + * + * Chip selects: + * + * ------ -------- ------------------------- -------------------------------- + * PIN SIGNAL BOARD CONNECTION NOTES + * ------ -------- ------------------------- -------------------------------- + * RPA1 SI PGA117 and SST25VF032B SPI2 data OUT (SDO2) + * RPA2 SO PGA117 and SST25VF032B R1, SPI2 data IN (SDI2) + * RPA3 SO PGA117 and SST25VF032B R0, SPI2 data IN (SDI2) + * SCK2 SCK PGA117 and SST25VF032B SPI2 clock + * + * RB7 ~CSAI PGA117 PGA117 chip select (active low) + * RB13 ~CSM SST25VF032B SST25VF032B chip select (active low) + */ + +#define GPIO_SI (GPIO_OUTPUT|GPIO_PORTA|GPIO_PIN1) +#if CONFIG_MIRTOO_RELEASE == 1 +# define GPIO_SO (GPIO_INPUT|GPIO_PORTA|GPIO_PIN2) +#else +# define GPIO_SO (GPIO_INPUT|GPIO_PORTA|GPIO_PIN3) +#endif +#define GPIO_SCK (GPIO_OUTPUT|GPIO_PORTB|GPIO_PIN15) + +#define GPIO_PGA117_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTB|GPIO_PIN7) +#define GPIO_SST25VF032B_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTB|GPIO_PIN13) + +/* The following enable debug output from this file (needs CONFIG_DEBUG too). + * + * CONFIG_DEBUG_SPI - Define to enable basic SPI debug + */ + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# define spivdbg llvdbg +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_spi2initialize + * + * Description: + * Called to configure SPI2 chip select GPIO pins for the Mirtoo module. + * + ************************************************************************************/ + +void weak_function pic32mx_spi2initialize(void) +{ + /* Make sure that TRIS pins are set correctly. Configure the SPI pins as digital + * inputs and outputs first. + */ + + pic32mx_configgpio(GPIO_SI); + pic32mx_configgpio(GPIO_SO); + pic32mx_configgpio(GPIO_SCK); + + /* Configure SPI2 data in and data out to use RPA2 and 1, respectively */ + + putreg32(PPS_INSEL_RPA2, PIC32MX_PPS_SDI2R); + putreg32(PPS_OUTSEL_SDO2, PIC32MX_PPS_RPA1R); + + /* Configure the SPI chip select GPIOs */ + + pic32mx_configgpio(GPIO_PGA117_CS); + pic32mx_configgpio(GPIO_SST25VF032B_CS); +} + +/************************************************************************************ + * Name: pic32mx_spi2select, pic32mx_spi2status, and pic32mx_spi2cmddata + * + * Description: + * These external functions must be provided by board-specific logic. They are + * implementations of the select, status, and cmddata methods of the SPI interface + * defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All other methods + * including pic32mx_spibus_initialize()) are provided by common PIC32MX logic. To use + * this common SPI logic on your board: + * + * 1. Provide logic in pic32mx_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide pic32mx_spiNselect() and pic32mx_spiNstatus() functions + * in your board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * pic32mx_spiNcmddata() functions in your board-specific logic. These + * functions will perform cmd/data selection operations using GPIOs in the way + * your board is configured. + * 3. Add a call to pic32mx_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by pic32mx_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +struct spi_dev_s; +enum spi_dev_e; + +void pic32mx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + if (devid == SPIDEV_FLASH) + { + pic32mx_gpiowrite(GPIO_SST25VF032B_CS, !selected); + } + else if (devid == SPIDEV_MUX) + { + pic32mx_gpiowrite(GPIO_PGA117_CS, !selected); + } +} + +uint8_t pic32mx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} + +#ifdef CONFIG_SPI_CMDDATA +int pic32mx_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return 0; +} +#endif + +#endif /* CONFIG_PIC32MX_SPI2 */ diff --git a/configs/moteino-mega/Kconfig b/configs/moteino-mega/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/moteino-mega/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/moteino-mega/README.txt b/configs/moteino-mega/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..9c3c03b1de9913791a7a238abe70c50d48d5c4c9 --- /dev/null +++ b/configs/moteino-mega/README.txt @@ -0,0 +1,276 @@ +README +^^^^^^ + +This port conributed by jeditekunum. + +This is the README file for the port of NuttX to the MoteinoMEGA from +LowPowerLab (http://www.lowpowerlab.com). The MoteinoMEGA is based +on an Atmel ATMega1284P. As of this writing, documentation for the +MoteinoMEGA board is available here: + +https://lowpowerlab.com/shop/index.php?_route_=Moteino/moteinomega + +Contents +^^^^^^^^ + + o MoteinoMEGA Features + o Pin Connections + o DualOptiboot Bootloader + o Toolchains + o MoteinoMEGA Configuration Options + o Configurations + +MoteinoMEGA Features +^^^^^^^^^^^^^^^^^^^^ + + o 16MHz ATmega1284P Atmel 8bit AVR RISC Processor + o 128Kbyte Flash + o 16Kbyte RAM + o 4Kbyte EEPROM + o 2 High Speed Serial Ports + o 8Ch 10bit Analog Input port + +Pin Connections +^^^^^^^^^^^^^^^ + + -------------------- ----------------------------- + ATMega1284P Pinout MoteinoMEGA board connection + -------------------- ----------------------------- + (left) + 1 AREF AR + 2 PA7 A7 + 3 PA6 A6 + 4 PA5 A5 + 5 PA4 A4 + 6 PA3 A3 + 7 PA2 A2 + 8 PA1 A1 + 9 PA0 A0 + 10 PB0 0 + 11 PB1 1 + 12 PB2 (INT2) 2/i2 (used by optional radio) + 13 PB3 (PWM0) 3 + 14 PB4 (PWM1/SS) 4/SS (used by optional radio) + 15 PB5 (MOSI) 5/MO (used by optional radio/flash) + 16 PB6 (MISO/PWM2) 6/MI (used by optional radio/flash) + 17 PB7 (SCK/PWM3) 7/SCK (used by optional radio/flash) + 18 VOUT 3v3 + 19 VIN VIN + 20 GND GND + (bottom) + 21 DTR/RTS DTR + 22 TX0 v + 23 RX0 ^ + 24 VIN + 25 + 26 GND GND + (right) + 27 GND GND + 28 VIN VIN + 29 VOUT 3v3 + 30 RESET RST + 31 PD0 (RX0) 8/Serial 0 ^ + 32 PD1 (TX0) 9/Serial 0 v + 33 PD2 (RX1/INT0) 10/Serial 0 ^/i0 + 34 PD3 (TX1/INT1) 11/Serial 1 v/i1 + 35 PD4 (PWM4) 12 + 36 PD5 (PWM5) 13 + 37 PD6 (PWM6) 14 + 38 PD7 (PWM7) 15/LED + 39 PC0 (SCL) 16/SCL + 40 PC1 (SDA) 17/SDA + 41 PC2 (TCK) 18 + 42 PC3 (TMS) 19 + 43 PC4 (TDO) 20 + 44 PC5 (TDI) 21 + 45 PC6 22 + 46 PC7 23 (used by optional flash) + + +DualOptiboot Bootloader +^^^^^^^^^^^^^^^^^^^^^^^ + +o FTDI (or similar) USB-To-Serial converter with compatible connector + configured for DTR (AdaFruit, SparkFun, etc) +o Obtain ard-reset-arduino Python script + (one source: https://github.com/mikaelpatel/Cosa/blob/master/build/Arduino-Makefile/bin/ard-reset-arduino) + This script triggers the DTR pin to enter bootloader mode. +o Obtain avrdude for your platform. + +Bootloader operates at 115200 baud. It would be useful to create a short script +that invokes ard-reset-arduino and then avrdude to load program. This script +could then also, optionally, invoke miniterm.py or some other serial interface +program for console. + +Example: + +APP=nuttx +CPU=atmega1284p +BAUD=115200 +PORT=/dev/tty.usbserial-A703X8PQ +avr-size --mcu=$CPU -C --format=avr $APP +ard-reset-arduino --verbose $PORT +avrdude -q -V -p $CPU -C {location-of-avrdude.conf} -D -c arduino -b $BAUD \ + -P $PORT -U flash:w:${APP}.hex:i +miniterm.py --port=$PORT --baud=$BAUD -q --lf + +Toolchains +^^^^^^^^^^ + +The toolchain may be selected using the kconfig-mconf tool (via 'make menuconfig'), +by editing the existing configuration file (defconfig), or by overriding +the toolchain on the make commandline with CONFIG_AVR_TOOLCHAIN=. + +The valid values for are BUILDROOT, CROSSPACK, LINUXGCC and WINAVR. + +This port was tested using the OS X / CROSSPACK tool chain, GCC version 4.8.1. +Please see other NuttX documentation for toolchain details. + +MoteinoMEGA Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=avr + + CONFIG_ARCH_FAMILY - For use in C code: + + CONFIG_ARCH_FAMILY=avr + + CONFIG_ARCH_FAMILY_family - For use in C code: + + CONFIG_ARCH_FAMILY_AVR=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=atmega + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_ATMEGA1284P=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=moteino-mega + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_MOTEINO_MEGA=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_RAM_SIZE - Describes the installed DRAM. One of: + + CONFIG_RAM_SIZE=(16*1024) - (16Kb) + + CONFIG_RAM_START - The start address of installed SRAM + + CONFIG_RAM_START=0x800100 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_AVR_INT0=n + CONFIG_AVR_INT1=n + CONFIG_AVR_INT2=n + CONFIG_AVR_INT3=n + CONFIG_AVR_INT4=n + CONFIG_AVR_INT5=n + CONFIG_AVR_INT6=n + CONFIG_AVR_INT7=n + CONFIG_AVR_WDT=n + CONFIG_AVR_TIMER0=n + CONFIG_AVR_TIMER1=n + CONFIG_AVR_TIMER2=n + CONFIG_AVR_TIMER3=n + CONFIG_AVR_SPI=n + CONFIG_AVR_USART0=y + CONFIG_AVR_USART1=n + CONFIG_AVR_ADC=n + CONFIG_AVR_ANACOMP=n + CONFIG_AVR_TWI=n + + If the watchdog is enabled, this specifies the initial timeout. Default + is maximum supported value. + + CONFIG_WDTO_15MS + CONFIG_WDTO_30MS + CONFIG_WDTO_60MS + CONFIG_WDTO_120MS + CONFIG_WDTO_1250MS + CONFIG_WDTO_500MS + CONFIG_WDTO_1S + CONFIG_WDTO_2S + CONFIG_WDTO_4S + CONFIG_WDTO_8S + + ATMEGA specific device driver settings + + CONFIG_USARTn_SERIAL_CONSOLE - selects the USARTn for the + console and ttys0 (default is the USART0). + CONFIG_USARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_USARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_USARTn_BAUD - The configure BAUD of the USART. Must be + CONFIG_USARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_USARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_USARTn_2STOP - Two stop bits + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. Each MoteinoMEGA configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh moteino-mega/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + +Configuration Sub-Directories +----------------------------- + + hello: + The simple apps/examples/hello "Hello, World!" example. + + nsh: + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables only the serial NSH interfaces. diff --git a/configs/moteino-mega/hello/Make.defs b/configs/moteino-mega/hello/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..75bb1f6e6b9b947c51ffdceb3c0913c6afaae58a --- /dev/null +++ b/configs/moteino-mega/hello/Make.defs @@ -0,0 +1,99 @@ +############################################################################ +# configs/moteino-mega/hello/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/avr/src/avr/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = $(ARCHINCLUDES) "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem "$(TOPDIR)/include" + ARCHXXINCLUDES = $(ARCHINCLUDES) -isystem "$(TOPDIR)/include/cxx" + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/moteino-mega/hello/defconfig b/configs/moteino-mega/hello/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..66a682dbcc37c910ea1568887873ecac90e8b803 --- /dev/null +++ b/configs/moteino-mega/hello/defconfig @@ -0,0 +1,670 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +CONFIG_HOST_OSX=y +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +CONFIG_ARCH_AVR=y +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="avr" +CONFIG_ARCH_FAMILY="avr" +CONFIG_ARCH_CHIP="atmega" +CONFIG_ARCH_CHIP_ATMEGA=y +# CONFIG_ARCH_CHIP_AT90USB is not set +# CONFIG_ARCH_CHIP_AT32UC3 is not set +CONFIG_ARCH_FAMILY_AVR=y +# CONFIG_ARCH_FAMILY_AVR32 is not set + +# +# AVR Configuration Options +# +CONFIG_AVR_CROSSPACK_TOOLCHAIN=y +# CONFIG_AVR_USART1 is not set + +# +# ATMega Configuration Options +# +# CONFIG_ARCH_CHIP_ATMEGA128 is not set +CONFIG_ARCH_CHIP_ATMEGA1284P=y + +# +# ATMega Peripheral Selections +# +CONFIG_AVR_USART0=y + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=888 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x800100 +CONFIG_RAM_SIZE=16384 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_MOTEINO_MEGA=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="moteino-mega" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2015 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=31 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="hello_main" +CONFIG_RR_INTERVAL=0 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=4 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=4 +CONFIG_NFILE_STREAMS=4 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Work Queue Support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=512 +CONFIG_USERMAIN_STACKSIZE=512 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=512 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +CONFIG_ARCH_HAVE_USART0=y +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART0_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_USART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART0 Configuration +# +CONFIG_USART0_RXBUFSIZE=256 +CONFIG_USART0_TXBUFSIZE=256 +CONFIG_USART0_BAUD=115200 +CONFIG_USART0_BITS=8 +CONFIG_USART0_PARITY=0 +CONFIG_USART0_2STOP=0 +# CONFIG_USART0_IFLOWCONTROL is not set +# CONFIG_USART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# CU Minimal Terminal +# +# CONFIG_SYSTEM_CUTERM is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# Temperature +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/moteino-mega/hello/setenv.sh b/configs/moteino-mega/hello/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c61b40113a4930f66444494e9a67cc6c2884c3b3 --- /dev/null +++ b/configs/moteino-mega/hello/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/moteino-mega/hello/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the WinAVR +# toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install the Linux AVR toolchain as well +#export TOOLCHAIN_BIN="/cygdrive/c/WinAVR/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_avr/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/moteino-mega/include/board.h b/configs/moteino-mega/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..7caa8367ce8bcb38a094c650a60e231ecb04ba3d --- /dev/null +++ b/configs/moteino-mega/include/board.h @@ -0,0 +1,97 @@ +/**************************************************************************** + * configs/moteino-mega/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MOTEINO_MEGA_INCLUDE_BOARD_H +#define __CONFIGS_MOTEINO_MEGA_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Clocking *****************************************************************/ +/* Assume default CLKDIV8 fuse setting is overridden to CLKDIV1 */ + +#define BOARD_XTAL_FREQ 16000000 /* 16MHz crystal */ +#define BOARD_CPU_CLOCK BOARD_XTAL_FREQ /* F_CPU = 16MHz */ + +/* LED definitions **********************************************************/ + +/* The MoteinoMEGA has a single on-board LED connected to PortD, Pin 7 */ + +#define LED_STARTED 0 /* OFF ON (never happens) */ +#define LED_HEAPALLOCATE 0 /* OFF ON (never happens) */ +#define LED_IRQSENABLED 0 /* OFF ON (never happens) */ +#define LED_STACKCREATED 1 /* ON ON (never happens) */ +#define LED_INIRQ 2 /* OFF NC (momentary) */ +#define LED_SIGNAL 2 /* OFF NC (momentary) */ +#define LED_ASSERTION 2 /* OFF NC (momentary) */ +#define LED_PANIC 0 /* OFF ON (1Hz flashing) */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MOTEINO_MEGA_INCLUDE_BOARD_H */ diff --git a/configs/moteino-mega/nsh/Make.defs b/configs/moteino-mega/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..bb1d1deb7be37e785fb4fb27d5ad146c07d27eb4 --- /dev/null +++ b/configs/moteino-mega/nsh/Make.defs @@ -0,0 +1,99 @@ +############################################################################ +# configs/moteino-mega/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/avr/src/avr/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = $(ARCHINCLUDES) "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem "$(TOPDIR)/include" + ARCHXXINCLUDES = $(ARCHINCLUDES) -isystem "$(TOPDIR)/include/cxx" + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/moteino-mega/nsh/defconfig b/configs/moteino-mega/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..852f653da5ef6333a2caf257f06ae0dd0311ac0d --- /dev/null +++ b/configs/moteino-mega/nsh/defconfig @@ -0,0 +1,756 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +CONFIG_HOST_OSX=y +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +CONFIG_ARCH_AVR=y +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="avr" +CONFIG_ARCH_FAMILY="avr" +CONFIG_ARCH_CHIP="atmega" +CONFIG_ARCH_CHIP_ATMEGA=y +# CONFIG_ARCH_CHIP_AT90USB is not set +# CONFIG_ARCH_CHIP_AT32UC3 is not set +CONFIG_ARCH_FAMILY_AVR=y +# CONFIG_ARCH_FAMILY_AVR32 is not set + +# +# AVR Configuration Options +# +CONFIG_AVR_CROSSPACK_TOOLCHAIN=y +# CONFIG_AVR_USART1 is not set + +# +# ATMega Configuration Options +# +# CONFIG_ARCH_CHIP_ATMEGA128 is not set +CONFIG_ARCH_CHIP_ATMEGA1284P=y + +# +# ATMega Peripheral Selections +# +CONFIG_AVR_USART0=y + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=888 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x800100 +CONFIG_RAM_SIZE=16384 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_MOTEINO_MEGA=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="moteino-mega" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2015 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=31 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=6 +CONFIG_NFILE_STREAMS=6 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 + +# +# Work Queue Support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=512 +CONFIG_USERMAIN_STACKSIZE=512 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=512 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +CONFIG_ARCH_HAVE_USART0=y +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART0_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_USART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART0 Configuration +# +CONFIG_USART0_RXBUFSIZE=256 +CONFIG_USART0_TXBUFSIZE=256 +CONFIG_USART0_BAUD=115200 +CONFIG_USART0_BITS=8 +CONFIG_USART0_PARITY=0 +CONFIG_USART0_2STOP=0 +# CONFIG_USART0_IFLOWCONTROL is not set +# CONFIG_USART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_DISABLE_SEMICOLON=y +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +# CONFIG_NSH_DISABLE_ECHO is not set +CONFIG_NSH_DISABLE_EXEC=y +CONFIG_NSH_DISABLE_EXIT=y +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +CONFIG_NSH_DISABLE_HEXDUMP=y +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKFIFO=y +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +CONFIG_NSH_DISABLE_XD=y + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# CU Minimal Terminal +# +# CONFIG_SYSTEM_CUTERM is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# Temperature +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/moteino-mega/nsh/setenv.sh b/configs/moteino-mega/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..b4da5bd2ca6e03112ea9b9d954b9b213e6094cf6 --- /dev/null +++ b/configs/moteino-mega/nsh/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/moteino-mega/nsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the WinAVR +# toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install the Linux AVR toolchain as well +#export TOOLCHAIN_BIN="/cygdrive/c/WinAVR/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_avr/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/moteino-mega/scripts/ld.script b/configs/moteino-mega/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..202da17f240fe1fc074c9314f0a62760e2564c61 --- /dev/null +++ b/configs/moteino-mega/scripts/ld.script @@ -0,0 +1,215 @@ +/************************************************************************************** + * configs/moteino-mega/scripts/ld.script + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************/ + +/* Memory Regions *********************************************************************/ +/* -------------- ------ ------+------- -- ------ -- ------ --- ------ ----+------- --- + * FLASH | REGISTERS I/O EXT I/O ISRAM | EEPROM + * | REGISTERS REGISTERS | + * -------------- ------ ------+------- -- ------ -- ------ --- ------ ----+------- --- + * ATMEGA1284P 0x0000 128Kb | 0x0000 32 0x0020 64 0x0060 160 0x0100 16Kb| 0x0000 4Kb + * -------------- ------ ------+------- -- ------ -- ------ --- ------ ----+------- --- + * *Memory configuration A + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0, LENGTH = 128K + sram (rw!x) : ORIGIN = 0x800100, LENGTH = 16K + eeprom (rw!x) : ORIGIN = 0x810000, LENGTH = 4K +} + +OUTPUT_FORMAT("elf32-avr","elf32-avr","elf32-avr") +OUTPUT_ARCH(avr:5) +ENTRY(__start) + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + + .rel.text : + { + *(.rel.text) + *(.rel.text.*) + *(.rel.gnu.linkonce.t*) + } + + .rela.text : + { + *(.rela.text) + *(.rela.text.*) + *(.rela.gnu.linkonce.t*) + } + + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + + .rel.rodata : + { + *(.rel.rodata) + *(.rel.rodata.*) + *(.rel.gnu.linkonce.r*) + } + + .rela.rodata : + { + *(.rela.rodata) + *(.rela.rodata.*) + *(.rela.gnu.linkonce.r*) + } + + .rel.data : + { + *(.rel.data) + *(.rel.data.*) + *(.rel.gnu.linkonce.d*) + } + + .rela.data : + { + *(.rela.data) + *(.rela.data.*) + *(.rela.gnu.linkonce.d*) + } + + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + + .text : + { + _stext = . ; + *(.vectors) + *(.progmem.gcc*) + *(.progmem*) + *(.init) + *(.handlers) + *(.text) + *(.text.*) + _etext = . ; + } > flash + + _eronly = ABSOLUTE(.); + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.rodata) + *(.rodata*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : + { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Global data not cleared after reset. */ + + .noinit : + { + _snoinit = ABSOLUTE(.); + *(.noinit*) + _enoinit = ABSOLUTE(.); + } > sram + + .eeprom : + { + _seeprom = ABSOLUTE(.); + *(.eeprom*) + _eeeprom = ABSOLUTE(.); + } > eeprom + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } +} diff --git a/configs/moteino-mega/src/.gitignore b/configs/moteino-mega/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/moteino-mega/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/moteino-mega/src/Makefile b/configs/moteino-mega/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..703e8b9c47afc95c5afd5fbed029e02096041f5a --- /dev/null +++ b/configs/moteino-mega/src/Makefile @@ -0,0 +1,45 @@ +############################################################################ +# configs/moteino-mega/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = avr_boot.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += avr_leds.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/moteino-mega/src/avr_boot.c b/configs/moteino-mega/src/avr_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..b9d6e3380d83a772c80dd240ba29a3d4895d1f6e --- /dev/null +++ b/configs/moteino-mega/src/avr_boot.c @@ -0,0 +1,92 @@ +/************************************************************************************ + * configs/moteino-mega/src/avr_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "atmega.h" +#include "moteino_mega.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: atmega_boardinitialize + * + * Description: + * All ATMega architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void atmega_boardinitialize(void) +{ + /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak + * function atmega_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_AVR_SPI1) || defined(CONFIG_AVR_SPI2) + if (atmega_spidev_initialize) + { + atmega_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + atmega_led_initialize(); +#endif +} diff --git a/configs/moteino-mega/src/avr_leds.c b/configs/moteino-mega/src/avr_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..4a41600fbfe183bbe63ef592306abdfe59a10ddb --- /dev/null +++ b/configs/moteino-mega/src/avr_leds.c @@ -0,0 +1,191 @@ +/**************************************************************************** + * configs/moteino-mega/src/avr_leds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "atmega.h" +#include "moteino_mega.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static bool g_ncoff; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: atmega_led_initialize + ****************************************************************************/ + +void atmega_led_initialize(void) +{ + /* The MoteinoMEGA's single LED is on Port D, Pin 7. Configure this pin as an + * output and turn it OFF. The "other" side of the LED is onnected to + * ground through a resistor. Therefore, a logic value of 0 should turn + * the LED off. + */ + + DDRD |= (1 << 7); + PORTD &= ~(1 << 7); + g_ncoff = true; +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + /* ON OFF + * LED_STARTED 0 OFF ON (never happens) + * LED_HEAPALLOCATE 0 OFF ON (never happens) + * LED_IRQSENABLED 0 OFF ON (never happens) + * LED_STACKCREATED 1 ON ON (never happens) + * LED_INIRQ 2 OFF NC (momentary) + * LED_SIGNAL 2 OFF NC (momentary) + * LED_ASSERTION 2 OFF NC (momentary) + * LED_PANIC 0 OFF ON (1Hz flashing) + */ + + switch (led) + { + case 0: + /* The steady state is OFF */ + + g_ncoff = true; + + case 2: + /* Turn the LED off */ + + PORTD &= ~(1 << 7); + break; + + case 1: + /* The steady state is ON */ + + PORTD |= (1 << 7); + g_ncoff = false; + break; + + default: + return; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + /* ON OFF + * LED_STARTED 0 OFF ON (never happens) + * LED_HEAPALLOCATE 0 OFF ON (never happens) + * LED_IRQSENABLED 0 OFF ON (never happens) + * LED_STACKCREATED 1 ON ON (never happens) + * LED_INIRQ 2 OFF NC (momentary) + * LED_SIGNAL 2 OFF NC (momentary) + * LED_ASSERTION 2 OFF NC (momentary) + * LED_PANIC 0 OFF ON (1Hz flashing) + */ + + switch (led) + { + case 2: + /* If the "no-change" state is OFF, then turn the LED off */ + + if (g_ncoff) + { + PORTD &= ~(1 << 7); + break; + } + + /* Otherwise, fall through to turn the LED ON */ + + case 0: + case 1: + /* Turn the LED on */ + + PORTD |= (1 << 7); + break; + + default: + return; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/moteino-mega/src/moteino_mega.h b/configs/moteino-mega/src/moteino_mega.h new file mode 100644 index 0000000000000000000000000000000000000000..cbd5c1596b85237c9e6002b1f3918a1d94110163 --- /dev/null +++ b/configs/moteino-mega/src/moteino_mega.h @@ -0,0 +1,102 @@ +/**************************************************************************** + * configs/moteino-mega/src/moteino-mega.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MOTEINO_MEGA_SRC_MOTEINO_MEGA_H +#define __CONFIGS_MOTEINO_MEGA_SRC_MOTEINO_MEGA_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Name: atmega_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Amber Web Server. + * + ************************************************************************************/ + +#if defined(CONFIG_AVR_SPI1) || defined(CONFIG_AVR_SPI2) +void weak_function atmega_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: atmega_led_initialize + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void atmega_led_initialize(void); +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MOTEINO_MEGA_SRC_MOTEINO_MEGA_H */ diff --git a/configs/moxa/Kconfig b/configs/moxa/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..c3c967904f9d43528a76facfa506e0c1a827f400 --- /dev/null +++ b/configs/moxa/Kconfig @@ -0,0 +1,14 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_MOXA + +config MOXA_NP51X0 + bool "NP51x0" + default y + ---help--- + Moxa NP51x0 series. + +endif diff --git a/configs/moxa/include/board.h b/configs/moxa/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..4e842198cda27a4d7f20ebcb84bb5c495771e75d --- /dev/null +++ b/configs/moxa/include/board.h @@ -0,0 +1,230 @@ +/************************************************************************************ + * configs/arduino-due/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_MOXA_INCLUDE_BOARD_H +#define __CONFIGS_MOXA_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the device is running on a 4MHz internal RC. These + * definitions will configure clocking + * + * MAINOSC: Frequency = 12MHz (crysta) + * PLLA: PLL Divider = 1, Multiplier = 14 to generate PLLACK = 168MHz + * Master Clock (MCK): Source = PLLACK, Prescalar = 1 to generate MCK = 84MHz + * CPU clock: 84MHz + */ + +#define BOARD_32KOSC_FREQUENCY (32768) +#define BOARD_SCLK_FREQUENCY (BOARD_32KOSC_FREQUENCY) +#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Divider = 1 + * Multipler = 14 + */ + +#define BOARD_CKGR_PLLAR_MUL (13 << PMC_CKGR_PLLAR_MUL_SHIFT) +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS + +/* PMC master clock register settings. + * + * Source = PLLA + * Divider = 2 + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV2 + +/* USB UTMI PLL start-up time */ + +#define BOARD_CKGR_UCKR_UPLLCOUNT (3 << PMC_CKGR_UCKR_UPLLCOUNT_SHIFT) + +/* Resulting frequencies */ + +#define BOARD_PLLA_FREQUENCY (168000000) /* PLLACK: 14 * 12Mhz / 1 */ +#define BOARD_MCK_FREQUENCY (84000000) /* MCK: PLLACK / 2 */ +#define BOARD_CPU_FREQUENCY (84000000) /* CPU: MCK */ + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV+1)). + * + * MCI_SPEED = MCCK / (2*(CLKDIV+1)) + * CLKDIV = MCCK / MCI_SPEED / 2 - 1 + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 84MHz, CLKDIV = 104, MCI_SPEED = 84MHz / 2 * (104+1) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (104 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 84MHz, CLKDIV = 2, MCI_SPEED = 84MHz / 2 * (2+1) = 14 MHz */ + +#define HSMCI_MMCXFR_CLKDIV (1 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 84MHz, CLKDIV = 1, MCI_SPEED = 84MHz / 2 * (1+1) = 21 MHz */ + +#define HSMCI_SDXFR_CLKDIV (1 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/* FLASH wait states + * + * FWS MAX FREQUENCY + * 1.62V 1.8V + * --- ----- ------ + * 0 17MHz 19MHz + * 1 45MHz 50MHz + * 2 58MHz 64MHz + * 3 70MHz 80MHz + * 4 78MHz 90MHz + */ + +#define BOARD_FWS 4 + +/* LED definitions ******************************************************************/ +/* There are three user-controllable LEDs on board the Moxa board: + * + * LED GPIO + * ---------------- ----- + * L Amber LED PB27 + * TX Yellow LED PA21 + * RX Yellow LED PC30 + * + * LED L is connected to ground and can be illuminated by driving the PB27 + * output high. The TX and RX LEDs are pulled high and can be illuminated by + * driving the corresponding + * GPIO output to low. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED_L 0 +#define BOARD_LED_RX 1 +#define BOARD_LED_TX 2 +#define BOARD_NLEDS 3 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_L_BIT (1 << BOARD_LED_L) +#define BOARD_LED_RX_BIT (1 << BOARD_LED_RX) +#define BOARD_LED_TX_BIT (1 << BOARD_LED_TX) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL MEANING LED STATE + * L TX RX + * ----------------------- -------------------------- -------- -------- -------- */ +#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF OFF OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON OFF OFF */ +#define LED_INIRQ 2 /* In an interrupt N/C GLOW OFF */ +#define LED_SIGNAL 2 /* In a signal handler N/C GLOW OFF */ +#define LED_ASSERTION 2 /* An assertion failed N/C GLOW OFF */ +#define LED_PANIC 3 /* The system has crashed N/C N/C Blinking */ +#define LED_PANIC 3 /* MCU is is sleep mode ------ Not used -------- */ + +#undef CONFIG_SUPPRESS_SERIAL_INTS + +/* Thus if LED L is statically on, NuttX has successfully booted and is, + * apparently, running normmally. If LED RX is glowing, then NuttX is + * handling interrupts (and also signals and assertions). If TX is flashing + * at approximately 2Hz, then a fatal error has been detected and the system + */ + +/* Button definitions ***************************************************************/ +/* There are no buttons on the Moxa board. */ + +/* GPIO pin configurations **********************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +inline void ftintc010_set_trig_mode(int irq, int mode); +inline void ftintc010_set_trig_level(int irq, int level); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MOXA_INCLUDE_BOARD_H */ diff --git a/configs/moxa/nsh/Make.defs b/configs/moxa/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..99cc86d7d83d2ce0a740e317360f9d6469a2de32 --- /dev/null +++ b/configs/moxa/nsh/Make.defs @@ -0,0 +1,112 @@ +############################################################################ +# configs/moxa/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin -mno-thumb-interwork -march=armv4 -Uarm +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -mno-thumb-interwork -march=armv4 -Uarm +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/moxa/nsh/defconfig b/configs/moxa/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..20cf894fdf5bc0962fa577685a8ceade53025ca2 --- /dev/null +++ b/configs/moxa/nsh/defconfig @@ -0,0 +1,982 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +CONFIG_ARCH_CHIP_MOXART=y +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="moxart" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARM_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# MoxART Configuration Options +# +CONFIG_UART_MOXA_MODE_REG=0x982000E0 +CONFIG_UART_MOXA_IRQ_STATUS_REG=0x982000C0 +CONFIG_UART_MOXA_SHARED_IRQ=31 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=6965 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=2097152 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD_MOXA=y +CONFIG_ARCH_BOARD="moxa" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_MOXA_NP51X0=y +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_RESET=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=28 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +CONFIG_SCHED_HAVE_PARENT=y +CONFIG_SCHED_CHILD_STATUS=y +CONFIG_PREALLOC_CHILDSTATUS=0 +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCHLD=4 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_NET_CS89x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +CONFIG_NET_FTMAC100=y +CONFIG_FTMAC100_BASE=0x90900000 +CONFIG_FTMAC100_IRQ=25 +CONFIG_FTMAC100_RX_DESC=64 +CONFIG_FTMAC100_TX_DESC=32 +CONFIG_FTMAC100_MAC0_ENV_ADDR=0x80000050 +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_16550_UART=y +CONFIG_16550_UART0=y +CONFIG_16550_UART0_BASE=0x98200000 +CONFIG_16550_UART0_CLOCK=14745600 +CONFIG_16550_UART0_IRQ=31 +CONFIG_16550_UART0_BAUD=115200 +CONFIG_16550_UART0_PARITY=0 +CONFIG_16550_UART0_BITS=8 +CONFIG_16550_UART0_2STOP=0 +CONFIG_16550_UART0_RXBUFSIZE=256 +CONFIG_16550_UART0_TXBUFSIZE=256 +# CONFIG_16550_UART0_IFLOWCONTROL is not set +# CONFIG_16550_UART0_OFLOWCONTROL is not set +# CONFIG_16550_UART1 is not set +# CONFIG_16550_UART2 is not set +# CONFIG_16550_UART3 is not set +CONFIG_16550_UART0_SERIAL_CONSOLE=y +# CONFIG_16550_NO_SERIAL_CONSOLE is not set +CONFIG_16550_SUPRESS_CONFIG=y +# CONFIG_SERIAL_UART_ARCH_IOCTL is not set +CONFIG_16550_REGINCR=1 +CONFIG_16550_REGWIDTH=32 +CONFIG_16550_ADDRWIDTH=32 +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=1500 +CONFIG_NET_ETH_TCP_RECVWNDO=1536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +# CONFIG_NET_USER_DEVFMT is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +# CONFIG_NET_TCP_REASSEMBLY is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +CONFIG_NET_ARP_IPIN=y +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +CONFIG_NET_ROUTE=y +CONFIG_NET_MAXROUTES=4 +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_BINFS=y +# CONFIG_FS_PROCFS is not set +CONFIG_FS_UNIONFS=y + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +# CONFIG_HAVE_CXXINITIALIZE is not set +CONFIG_CXX_NEWLONG=y + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +# CONFIG_NETUTILS_THTTPD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_REBOOT is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +CONFIG_NSH_DISABLE_SHUTDOWN=y +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +CONFIG_NSH_DISABLE_ITEF=y +CONFIG_NSH_DISABLE_LOOPS=y +# CONFIG_NSH_ROMFSETC is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +CONFIG_NSH_LOGIN=y +# CONFIG_NSH_CONSOLE_LOGIN is not set +CONFIG_NSH_TELNET_LOGIN=y +CONFIG_NSH_LOGIN_FIXED=y +# CONFIG_NSH_LOGIN_PLATFORM is not set +CONFIG_NSH_LOGIN_USERNAME="admin" +CONFIG_NSH_LOGIN_PASSWORD="nuttx" +CONFIG_NSH_LOGIN_FAILDELAY=0 +CONFIG_NSH_LOGIN_FAILCOUNT=3 + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/moxa/nsh/setenv.sh b/configs/moxa/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..74b89f7f095cf4f119ace0b63619ccdf5e335184 --- /dev/null +++ b/configs/moxa/nsh/setenv.sh @@ -0,0 +1,83 @@ +#!/bin/bash +# configs/moxa/nsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the Cygwin path to the location where I have the Arduino BOSSA program +export BOSSA_BIN="/cygdrive/c/Program Files (x86)/Arduino/arduino-1.5.2/hardware/tools" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${BOSSA_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/moxa/scripts/ld.script b/configs/moxa/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..88ebd82a5bb8ea4474a9670460b3571604d9e203 --- /dev/null +++ b/configs/moxa/scripts/ld.script @@ -0,0 +1,121 @@ +/**************************************************************************** + * configs/moxa/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The Moxa has 2M of FLASH beginning at address 0x8000:0000 and + * up to 64MB SRAM in three memory regions. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x80050020, LENGTH = 1728K + sram0 (rwx) : ORIGIN = 0x00000000, LENGTH = 2M +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > sram0 + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > sram0 + + .ARM.extab : { + *(.ARM.extab*) + } > sram0 + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > sram0 + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram0 + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > sram0 + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram0 + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/moxa/src/Makefile b/configs/moxa/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..077c774d20039dc0c06b8f16446b080288fb355e --- /dev/null +++ b/configs/moxa/src/Makefile @@ -0,0 +1,45 @@ +############################################################################ +# configs/moxa/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = moxart_boot.c + +ifeq ($(CONFIG_NSH_LIBRARY),y) +CSRCS += moxart_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/moxa/src/moxart_appinit.c b/configs/moxa/src/moxart_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..f33045ccf56102eaeacfe383fd9734d2db0b132d --- /dev/null +++ b/configs/moxa/src/moxart_appinit.c @@ -0,0 +1,88 @@ +/**************************************************************************** + * config/moxart/src/moxart_appinit.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Anton D. Kachalov + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + * CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + * CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, && + * CONFIG_LIB_BOARDCTL=n : + * Called from board_initialize(). + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifndef CONFIG_BOARD_INITIALIZE +#ifdef CONFIG_NET_FTMAC100 + /* Perform board-specific initialization */ + + ftintc010_set_trig_mode(CONFIG_FTMAC100_IRQ, 0); + ftintc010_set_trig_level(CONFIG_FTMAC100_IRQ, 0); + + ftmac100_initialize(0); +#endif +#endif + return OK; +} diff --git a/configs/moxa/src/moxart_boot.c b/configs/moxa/src/moxart_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..4520ca883584bc74946fd78ba950e2364838d04f --- /dev/null +++ b/configs/moxa/src/moxart_boot.c @@ -0,0 +1,85 @@ +/**************************************************************************** + * config/moxart/src/moxart_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Anton D. Kachalov + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_initialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ +#ifdef CONFIG_NET_FTMAC100 + /* Perform board-specific initialization */ + + ftintc010_set_trig_mode(CONFIG_FTMAC100_IRQ, 0); + ftintc010_set_trig_level(CONFIG_FTMAC100_IRQ, 0); + + ftmac100_initialize(0); +#endif +} +#endif diff --git a/configs/mt-db-x3/README.txt b/configs/mt-db-x3/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..5ea012e1fff9b19f8d4bc85134563cc3b8c35e91 --- /dev/null +++ b/configs/mt-db-x3/README.txt @@ -0,0 +1,88 @@ +README +====== + + This README file discusses the port of NuttX to the MT-DB-X3 development + board from MattairTech. This board may host a variety of 64-pin AVR XMega + part. This port was specifically performed using the ATXmega384c3. + + See the MattairTech website for further information about the MT-DB-X3: + http://www.mattairtech.com/. + + NOTE: There is no port for the XMEGA in place as of this writing. At this + point in time, this README file is only a repository for pre-porting + information. It is not clear as of this writing whether there ever will + be a port to the MT-DB-X3 development board or not. + +Contents +======== + + - PIO Usage + - LEDs and Buttons + - Serial Console + - Configurations + +PIO Usage +========= + + PA0 CONN_P_10 pin 1, Aref via J34 + PA1 CONN_P_10 pin 2 + PA2 CONN_P_10 pin 3 + PA3 CONN_P_10 pin 4 + PA4 CONN_P_10 pin 5 + PA5 CONN_P_10 pin 6 + PA6 CONN_P_10 pin 7 + PA7 CONN_P_10 pin 8 + + PB0 CONN_P_10 pin 9, Aref via J25 + PB1 CONN_P_10 pin 10 + PB2 C4_LS CONN_P14 pin 5 + PB3 C4_LS CONN_P14 pin 5 + PB4 C4_LS CONN_P14 pin 5, Alt JTAG TMS + PB5 C4_LS CONN_P14 pin 5, Alt JTAG TDI + PB6 C4_LS CONN_P14 pin 5, Alt JTAG TCK + PB7 C4_LS CONN_P14 pin 5, Alt JTAG TDO, Voltage measurement via J15 + + PC0 C0_LS CONN_P14 pin 7 + PC1 C1_LS CONN_P14 pin 8 + PC2 C2_LS CONN_P14 pin 9 + PC3 C3_LS CONN_P14 pin 10 + PC4 C4_LS CONN_P14 pin 5, PDI/SPI Header pin 5 via J8 + PC5 C5_LS CONN_P14 pin 6, PDI/SPI Header pin 4 via J8 + PC6 C6_LS CONN_P14 pin 7, PDI/SPI Header pin 1 via J13 + PC7 C7_LS CONN_P14 pin 8, PDI/SPI Header pin 3 via J12 + + PD0 CONN_P14 pin 9 + PD1 CONN_P14 pin 10 + PD2 CONN_P14 pin 11 + PD3 CONN_P14 pin 12 + PD4 CONN_P14 pin 13 + PD5 CONN_P14 pin 14, TXB0103 Output Enable + PD6 CONN_P14 pin 12, USB D- + PD7 CONN_P14 pin 13, USB D+ + + PE0 CONN_P10 pin 1 + PE1 CONN_P10 pin 2 + PE2 CONN_P10 pin 3 + PE3 CONN_P10 pin 4 + PE4 CONN_P10 pin 5 + PE5 CONN_P10 pin 6 + PE6 CONN_P10 pin 7, TOSC1 via J28 + PE7 CONN_P10 pin 8, TOSC1 via J29 + + PF0 PORT F pin 1 + PF1 PORT F pin 2 + PF2 PORT F pin 3 + PF3 PORT F pin 4 + PF4 PORT F pin 5, Bootloader jumper + PF5 PORT F pin 6 + PF6 PORT F pin 7, Green LED via J31 + PF7 PORT F pin 8, User button via J33 (otherwise reset) + +LEDs and Buttons +================ + +Serial Console +============== + +Configurations +============== diff --git a/configs/mx1ads/Kconfig b/configs/mx1ads/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..df88256d45dd74a2192792986d2a38846fa41730 --- /dev/null +++ b/configs/mx1ads/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_MX1ADS +endif diff --git a/configs/mx1ads/README.txt b/configs/mx1ads/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..f9133a8a6b8340e09c1eb23270eb9543e492d2bc --- /dev/null +++ b/configs/mx1ads/README.txt @@ -0,0 +1,177 @@ +README +^^^^^^ + +Toolchain +^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the ARM920T GCC toolchain (if + different from the default). + + If you have no ARM toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + + 1. You must have already configured Nuttx in nuttx. + + cd tools + ./configure.sh mx1ads/ + + 2. Download the latest buildroot package into + + 3. unpack + + 4. cd /buildroot + + 5. cp configs/arm920t-defconfig-4.2.4 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h so that the PATH variable includes the path to the + newly built binaries. + +Issues +^^^^^^ + + Title: PORT IS INCOMPLETE + Description: The basic port of the i.MX1 architecture was never finished. The port + is incomplete (as of this writing, is still lacks a timer, interrupt + decoding, USB, network) and untested. + Status: Open + Priority: Medium (high if you need i.MX1/L support) + + Title: SPI METHODS ARE NOT THREAD SAFE + Description: SPI methods are not thread safe. Needs a semaphore to protect from re-entrancy. + Status: Open + Priority: Medium -- Will be very high if you do SPI access from multiple threads. + + +ARM/i.MX1-specific Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_ARM920T=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=imx1 + + CONFIG_ARCH_CHIP_name - For use in C code. Could be line _IMX1, + _IMXL, _IMX21, _IMX27, _IMX31, etc. (not all of which are + supported). + + CONFIG_ARCH_CHIP_IMX1 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=mx1ads (for the Freescale MX1ADS evaluation board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_MX1ADS (for the Spectrum Digital C5471 EVM) + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_VSTART - The startaddress of DRAM (virtual) + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + IMX specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + IMX USB Configuration + + CONFIG_IMX1_GIO_USBATTACH + GIO that detects USB attach/detach events + CONFIG_IMX1_GIO_USBDPPULLUP + GIO + CONFIG_DMA320_USBDEV_DMA + Enable IMX-specific DMA support + CONFIG_IMX1_GIO_USBATTACH=6 + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. Each MX1ADS configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh imxads/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume that you are building under + Linux (should work under Windows with Cygwin as well). This is + is easily reconfigured: + + CONFIG_HOST_LINUX=y + +Configuration Sub-Directories +----------------------------- + +Where is one of the following: + + ostest + + This configuration directory, performs a simple OS test using + examples/ostest. diff --git a/configs/mx1ads/include/board.h b/configs/mx1ads/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..80bbc249dddbc0b89c44e8d7c1f752838b24f08f --- /dev/null +++ b/configs/mx1ads/include/board.h @@ -0,0 +1,166 @@ +/************************************************************************************ + * configs/mx1ads/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clock settings -- All clock values are precalculated */ + +#define IMX_SYS_CLK_FREQ 16780000 /* Crystal frequency */ + +/* MPCTL0 -- Controls the MCU clock: + * + * MFI + MFN / (MFD+1) + * IMX_MCUPLL_CLK_FREQ = 2 * IMX_SYS_CLK_FREQ * -------------------- + * PD + 1 + */ + +#if 0 /* 150 MHz */ +# define IMX_MPCTL0_MFN 16 +# define IMX_MPCTL0_MFI 9 +# define IMX_MPCTL0_MFD 99 +# define IMX_MPCTL0_PD 1 +#else /* 180 MHz */ +# define IMX_MPCTL0_MFN 441 +# define IMX_MPCTL0_MFI 4 +# define IMX_MPCTL0_MFD 938 +# define IMX_MPCTL0_PD 0 +#endif + +#define IMX_MPCTL0_VALUE \ + ((IMX_MPCTL0_MFN << PLL_MPCTL0_MFN_SHIFT) |\ + (IMX_MPCTL0_MFI << PLL_MPCTL0_MFI_SHIFT) |\ + (IMX_MPCTL0_MFD << PLL_MPCTL0_MFD_SHIFT) |\ + (IMX_MPCTL0_PD << PLL_MPCTL0_PD_SHIFT)) + +/* This yields: */ + +#if 0 /* 150 MHz */ +# define IMX_MCUPLL_CLK_FREQ 153704800 +#else /* 180 MHz */ +# define IMX_MCUPLL_CLK_FREQ 183561405 +#endif + +/* SPCTL0 -- Controls the system PLL: + * + * MFI + MFN / (MFD+1) + * IMX_SYSPLL_CLK_FREQ = 2 * IMX_SYS_CLK_FREQ * -------------------- + * PD + 1 + */ + +#define IMX_SPCTL0_MFN 678 +#define IMX_SPCTL0_MFI 5 +#define IMX_SPCTL0_MFD 938 +#define IMX_SPCTL0_PD 1 + +#define IMX_SPCTL0_VALUE \ + ((IMX_SPCTL0_MFN << PLL_SPCTL0_MFN_SHIFT) |\ + (IMX_SPCTL0_MFI << PLL_SPCTL0_MFI_SHIFT) |\ + (IMX_SPCTL0_MFD << PLL_SPCTL0_MFD_SHIFT) |\ + (IMX_SPCTL0_PD << PLL_SPCTL0_PD_SHIFT)) + +/* This yields: */ + +#define IMX_SYSPLL_CLK_FREQ 96015910 + +/* PDCR -- Controls peripheral clocks */ + +#define IMX_PCLKDIV1 0 +#define IMX_PCLKDIV2 0 +#define IMX_PCLKDIV3 0 + +#define IMX_PCDR_VALUE \ + ((IMX_PCLKDIV1 << PLL_PCDR_PCLKDIV1_SHIFT) |\ + (IMX_PCLKDIV2 << PLL_PCDR_PCLKDIV2_SHIFT) |\ + (IMX_PCLKDIV3 << PLL_PCDR_PCLKDIV3_SHIFT)) + +/* PERCLK1: UART, Timers, PWM */ + +#define IMX_PERCLK1_FREQ (IMX_SYSPLL_CLK_FREQ/(IMX_PCLKDIV1+1)) + +/* PERCLK2: CSPI, LCD, SD */ + +#define IMX_PERCLK2_FREQ (IMX_SYSPLL_CLK_FREQ/(IMX_PCLKDIV2+1)) + +/* PERCLK3: SSI */ + +#define IMX_PERCLK3_FREQ (IMX_SYSPLL_CLK_FREQ/(IMX_PCLKDIV3+1)) + +/* CSCR settings -- Controls HCLK and BCLK and USB clock. + * HCLK: SDRAM, CSI, Memory Stick, I2C, DMA + */ + +#define IMX_CSCR_BCLKDIV 1 +#define IMX_CSCR_USBDIV 6 + +/* LED definitions ******************************************************************/ + +/* The MX1ADS has only one usable LED: Port A, bit 2 */ + + /* ON OFF */ +#define LED_STARTED 0 /* OFF OFF */ +#define LED_HEAPALLOCATE 1 /* OFF OFF */ +#define LED_IRQSENABLED 2 /* OFF OFF */ +#define LED_STACKCREATED 3 /* OFF OFF */ +#define LED_INIRQ 4 /* ON OFF */ +#define LED_SIGNAL 5 /* ON OFF */ +#define LED_ASSERTION 6 /* ON OFF */ +#define LED_PANIC 7 /* ON OFF */ + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/* All i.MX architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + */ + +void imx_board_initialize(void); + +#endif + +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/mx1ads/ostest/Make.defs b/configs/mx1ads/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..8588969b68f71431ad020ee63fadd7df703d04b3 --- /dev/null +++ b/configs/mx1ads/ostest/Make.defs @@ -0,0 +1,109 @@ +############################################################################ +# configs/mx1ads/ostest/Make.defs +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +CROSSDEV = arm-nuttx-elf- +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mtune=arm920t -march=armv4t -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mtune=arm920t -march=armv4t -msoft-float +endif +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/mx1ads/ostest/defconfig b/configs/mx1ads/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..73b264ce0cf92c34cded7e4c432f0c85ded1ca57 --- /dev/null +++ b/configs/mx1ads/ostest/defconfig @@ -0,0 +1,710 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +CONFIG_ARCH_CHIP_IMX1=y +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +CONFIG_ARCH_ARM920T=y +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="imx1" +# CONFIG_ARCH_HAVE_FPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# iMX.1 Peripheral Selection +# +CONFIG_IMX1_UART1=y +# CONFIG_IMX1_UART2 is not set +# CONFIG_IMX1_UART3 is not set +CONFIG_IMX1_SPI1=y +# CONFIG_IMX1_SPI2 is not set +CONFIG_RAM_NUTTXENTRY=0x01004000 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_PAGING is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16945 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x08000000 +CONFIG_RAM_VSTART=0x00000000 +CONFIG_RAM_SIZE=16777216 +CONFIG_FLASH_START=0x0 +CONFIG_FLASH_VSTART=0x0 +CONFIG_FLASH_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_MX1ADS=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="mx1ads" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=8 +CONFIG_START_DAY=29 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=2048 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/mx1ads/ostest/ld.script b/configs/mx1ads/ostest/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..e16f9de24916d29b5ffd8728cf50813b1e5681d8 --- /dev/null +++ b/configs/mx1ads/ostest/ld.script @@ -0,0 +1,84 @@ +/**************************************************************************** + * configs/mx1ads/ostest/ld.script + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + /* The OS entry point is here */ + + . = 0x09008000; + .text : { + _stext = ABSOLUTE(.); + *(.text) + *(.fixup) + *(.gnu.warning) + *(.rodata) + *(.glue_7) + *(.glue_7t) + *(.got) /* Global offset table */ + _etext = ABSOLUTE(.); + } + + _eronly = ABSOLUTE(.); /* See below */ + . = ALIGN(4096); + + .data : { + _sdata = ABSOLUTE(.); + *(.data) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss) + *(COMMON) + _ebss = ABSOLUTE(.); + } + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/mx1ads/ostest/setenv.sh b/configs/mx1ads/ostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..e73858fc76e686d1683b3a2e8d1c1cb4a5e3b53e --- /dev/null +++ b/configs/mx1ads/ostest/setenv.sh @@ -0,0 +1,46 @@ +#!/bin/bash +# configs/mx1ads/ostest/setenv.sh +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +WD=`pwd` +export BUILDROOT_BIN=${WD}/../buildroot/build_arm_nofpu/staging_dir/bin +export PATH=${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/mx1ads/src/.gitignore b/configs/mx1ads/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/mx1ads/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/mx1ads/src/Makefile b/configs/mx1ads/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..b655069b9e38fdb90bf068e581efcbd4b213d42c --- /dev/null +++ b/configs/mx1ads/src/Makefile @@ -0,0 +1,41 @@ +############################################################################ +# configs/mx1ads/src/Makefile +# +# Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THEO +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = mx1_boardinit.c mx1_leds.c mx1_network.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/mx1ads/src/mx1_boardinit.c b/configs/mx1ads/src/mx1_boardinit.c new file mode 100644 index 0000000000000000000000000000000000000000..33fec23c7783c688664fcf3c0d134138f3f2a4d9 --- /dev/null +++ b/configs/mx1ads/src/mx1_boardinit.c @@ -0,0 +1,106 @@ +/************************************************************************************ + * configs/mx1ads/src/mx1_boardinit`.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "imx_gpio.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: imx_board_initialize + * + * Description: + * All i.MX architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + ************************************************************************************/ + +void imx_board_initialize(void) +{ + uint32_t regval; + + putreg32(0x000003ab, IMX_SC_GPCR); /* I/O pad driving strength */ + putreg32(IMX_MPCTL0_VALUE, IMX_PLL_MPCTL0); + putreg32(IMX_SPCTL0_VALUE, IMX_PLL_SPCTL0); + + regval = (CSCR_CLKOSEL_FCLK | /* Output FCLK on CLK0 */ + (IMX_CSCR_USBDIV << PLL_CSCR_USBDIV_SHIFT) | /* USB divider */ + CSCR_SDCNT_4thEDGE | /* Shutdown on 4th edge */ + (IMX_CSCR_BCLKDIV << PLL_CSCR_BCLKDIV_SHIFT) | /* Bclock divider */ + PLL_CSCR_SPEN | PLL_CSCR_MPEN); /* Enable MUC and System PLL */ + putreg32(regval, IMX_PLL_CSCR); + + /* Use these new frequencies now */ + + putreg32(IMX_PLL_CSCR, regval | (PLL_CSCR_MPLLRESTART|PLL_CSCR_SPLLRESTART)); + + /* Setup peripheral clocking */ + + putreg32(IMX_PCDR_VALUE, IMX_PLL_PCDR); + + /* Configure CS4 for cs8900 Ethernet */ + +#ifdef CONFIG_NET + putreg32(0x00000f00, IMX_EIM_CS4H); + putreg32(0x00001501, IMX_EIM_CS4L); + + imxgpio_configprimary(GPIOA, 21); + imxgpio_configprimary(GPIOA, 22); + + (void)getreg32(IMX_CS4_VSECTION + 0x0c); + (void)getreg32(IMX_CS4_VSECTION + 0x0c); +#endif +} diff --git a/configs/mx1ads/src/mx1_leds.c b/configs/mx1ads/src/mx1_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..a872c49c94ca04dcf3c63f54fa50d22c60ed9b71 --- /dev/null +++ b/configs/mx1ads/src/mx1_leds.c @@ -0,0 +1,107 @@ +/**************************************************************************** + * configs/mx1ads/src/mx1_leds.c + * + * Copyright (C) 2009, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + /* Configure Port A, Bit 2 as an output, initial value=1 */ + + imxgpio_configoutput(GPIOA, 2, 1); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + case LED_STARTED: + case LED_HEAPALLOCATE: + case LED_IRQSENABLED: + case LED_STACKCREATED: + imxgpio_setoutput(GPIOA, 2); /* Port A, Bit 2 = 1 */ + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + default: + imxgpio_clroutput(GPIOA, 2); /* Port A, Bit 2 = 0 */ + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + imxgpio_clroutput(GPIOA, 2); /* Port A, Bit 2 = 0 */ +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/mx1ads/src/mx1_network.c b/configs/mx1ads/src/mx1_network.c new file mode 100644 index 0000000000000000000000000000000000000000..a4c76e9c55e186cd00a0790a1c06d86370caea30 --- /dev/null +++ b/configs/mx1ads/src/mx1_network.c @@ -0,0 +1,76 @@ +/**************************************************************************** + * configs/mx1ads/src/mx1_network.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#if defined(CONFIG_NET) && defined(CONFIG_NET_CS8900) + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +extern void cs8900_initialize(void); + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_netinitialize + ****************************************************************************/ + +void up_netinitialize(void) +{ +# error "Missing implementation" +} + +#endif /* CONFIG_NET && CONFIG_NET_DM90x0 */ diff --git a/configs/ne64badge/Kconfig b/configs/ne64badge/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..0ee9a8ca19ec7e86b932968e74f9bf81a4e6597f --- /dev/null +++ b/configs/ne64badge/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_NE64BADGE +endif diff --git a/configs/ne64badge/README.txt b/configs/ne64badge/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..fd5933f81aa03ee0875e3f2dec4fa85c7ebd5a0d --- /dev/null +++ b/configs/ne64badge/README.txt @@ -0,0 +1,504 @@ +README +^^^^^^ + + This README discusses issues unique to NuttX configurations for the + Future Electronics Group NE64 /PoE Badge board based on the + MC9S12NE64 hcs12 cpu. + +CONTENTS +^^^^^^^^ + • MC9S12NE64 Features + • NE64 Badge Pin Usage + • Development Environment + • NuttX Buildroot Toolchain + • FreeScale HCS12 Serial Monitor + • Soft Registers + • HCS12/NE64BADGE-specific Configuration Options + • Configurations + +MC9S12NE64 Features +^^^^^^^^^^^^^^^^^^^ + + • 16-bit HCS12 core + - HCS12 CPU + - Upward compatible with M68HC11 instruction set + - Interrupt stacking and programmer’s model identical to M68HC11 + - Instruction queue + - Enhanced indexed addressing + - Memory map and interface (MMC) + - Interrupt control (INT) + - Background debug mode (BDM) + - Enhanced debug12 module, including breakpoints and change-of-flow + trace buffer (DBG) + - Multiplexed expansion bus interface (MEBI) - available only in + 112-pin package version + • Wakeup interrupt inputs + - Up to 21 port bits available for wakeup interrupt function with + digital filtering + • Memory + - 64K bytes of FLASH EEPROM + - 8K bytes of RAM + • Analog-to-digital converter (ATD) + - One 8-channel module with 10-bit resolution + - External conversion trigger capability + • Timer module (TIM) + - 4-channel timer + - Each channel configurable as either input capture or output + compare + - Simple PWM mode + - Modulo reset of timer counter + - 16-bit pulse accumulator + - External event counting + - Gated time accumulation + • Serial interfaces + - Two asynchronous serial communications interface (SCI) + - One synchronous serial peripheral interface (SPI) + - One inter-IC bus (IIC) + • Ethernet Media access controller (EMAC) + - IEEE 802.3 compliant + - Medium-independent interface (MII) + - Full-duplex and half-duplex modes + - Flow control using pause frames + - MII management function + - Address recognition + - Frames with broadcast address are always accepted or always + rejected + - Exact match for single 48-bit individual (unicast) address + - Hash (64-bit hash) check of group (multicast) addresses + - Promiscuous mode + • Ethertype filter + • Loopback mode + • Two receive and one transmit Ethernet buffer interfaces + • Ethernet 10/100 Mbps transceiver (EPHY) + - IEEE 802.3 compliant + - Digital adaptive equalization + - Half-duplex and full-duplex + - Auto-negotiation next page ability + - Baseline wander (BLW) correction + - 125-MHz clock generator and timing recovery + - Integrated wave-shaping circuitry + - Loopback modes + • CRG (clock and reset generator module) + - Windowed COP watchdog + - Real-time interrupt + - Clock monitor + - Pierce oscillator + - Phase-locked loop clock frequency multiplier + - Limp home mode in absence of external clock + - 25-MHz crystal oscillator reference clock + • Operating frequency + - 50 MHz equivalent to 25 MHz bus speed for single chip + - 32 MHz equivalent to 16 MHz bus speed in expanded bus modes + • Internal 2.5-V regulator + - Supports an input voltage range from 3.3 V ± 5% + - Low-power mode capability + - Includes low-voltage reset (LVR) circuitry + • 80-pin TQFP-EP or 112-pin LQFP package + - Up to 70 I/O pins with 3.3 V input and drive capability (112-pin + package) + - Up to two dedicated 3.3 V input only lines (IRQ, XIRQ) + • Development support + - Single-wire background debug™ mode (BDM) + - On-chip hardware breakpoints + - Enhanced DBG debug features + +NE64 Badge Pin Usage +^^^^^^^^^^^^^^^^^^^^ + +PIN PIN NAME BOARD SIGNAL NOTES +--- ------------------- -------------- ---------------------- + 44 RESET J3 RESET_L Also to SW3 + 57 BKGD/MODC/TAGHI_B BDM BKGD CON6A + + 85 PAD0 VR1 Potentiometer + 86 PAD1 J3 ANALOG_IN0 Not used on board + 87 PAD2 J3 ANALOG_IN1 " " " " "" " " + 88 PAD3 J3 ANALOG_IN2 " " " " "" " " + 89 PAD4 J3 ANALOG_IN3 " " " " "" " " + + 70 PHY_TXP J7 TD+ RJ45 connector + 71 PHY_TXN J7 TD- RJ45 connector + 73 PHY_RXP J7 RD+ RJ45 connector + 74 PHY_RXN J7 RD- RJ45 connector + + Ports A,B,E,K managed by the MEBI block + --------------------------------------- + 60 PA0/ADDR8/DATA8 J3 ADDR_DATA8 Not used on board + 61 PA1/ADDR9/DATA9 J3 ADDR_DATA9 " " " " "" " " + 62 PA2/ADDR10/DATA10 J3 ADDR_DATA10 " " " " "" " " + 63 PA3/ADDR11/DATA11 J3 ADDR_DATA11 " " " " "" " " + 77 PA4/ADDR12/DATA12 J3 ADDR_DATA12 " " " " "" " " + 78 PA5/ADDR13/DATA13 J3 ADDR_DATA13 " " " " "" " " + 79 PA6/ADDR14/DATA14 J3 ADDR_DATA14 " " " " "" " " + 80 PA7/ADDR15/DATA15 J3 ADDR_DATA15 " " " " "" " " + + 10 PB0/ADDR0/DATA0 J3 ADDR_DATA0 Not used on board + 11 PB1/ADDR1/DATA1 J3 ADDR_DATA1 " " " " "" " " + 12 PB2/ADDR2/DATA2 J3 ADDR_DATA2 " " " " "" " " + 13 PB3/ADDR3/DATA3 J3 ADDR_DATA3 " " " " "" " " + 16 PB4/ADDR4/DATA4 J3 ADDR_DATA4 " " " " "" " " + 17 PB5/ADDR5/DATA5 J3 ADDR_DATA5 " " " " "" " " + 18 PB6/ADDR6/DATA6 J3 ADDR_DATA6 " " " " "" " " + 19 PB7/ADDR7/DATA7 J3 ADDR_DATA7 " " " " "" " " + + 56 PE0/XIRQ_B BUTTON1 SW1 + 55 PE1/IRQ_B J3 IRQ Not used on board + 54 PE2/R_W J3 RW " " " " "" " " + 53 PE3/LSTRB_B/TAGLO_B J3 LSTRB " " " " "" " " + 41 PE4/ECLK J3 ECLK " " " " "" " " + 40 PE5/IPIPE0/MODA J3 MODA " " " " "" " " + 39 PE6/IPIPE1/MODB J3 MODB " " " " "" " " + 38 PE7/NOACC/XCLKS_B pulled low pulled low + + 97 PK0/XADR14 N/C N/C + 98 PK1/XADR15 N/C N/C + 99 PK2/XADR16 N/C N/C +100 PK3/XADR17 N/C N/C +103 PK4/XADR18 N/C N/C +104 PK5/XADR19 N/C N/C +105 PK6/XCS_B J3 XCS Not used on board +106 PK7/ECS_B/ROMCTL J3 ECS " " " " "" " " + + Ports T,S,G,H,J,L managed by the PIM Block + ------------------------------------------ +110 PT4/IOC1_4 J3 GPIO8 Not used on board +109 PT5/IOC1_5 J3 GPIO9 " " " " "" " " +108 PT6/IOC1_6 J3 GPIO10 " " " " "" " " +107 PT7/IOC1_7 N/C N/C + + 30 PS0/RXD0 RS232_RX Eventually maps to J2 RXD + 31 PS1/TXD0 RS232_TX Eventually maps to J2 TXD + 32 PS2/RXD1 J3&J4 UART_RX Not used on board + 33 PS3/TXD1 J3&J4 UART_TX " " " " "" " " + 34 PS4/MISO J3 SPI_MISO " " " " "" " " + 35 PS5/MOSI J3 SPI_MOSI " " " " "" " " + 36 PS6/SCK J3 SPI_CLOCK " " " " "" " " + 37 PS7/SS_B J3 SPI_SS " " " " "" " " + + 22 PG0/RXD0/KWG0 J3 GPIO0 Not used on board + 23 PG1/RXD1/KWG1 J3 GPIO1 " " " " "" " " + 24 PG2/RXD2/KWG2 J3 GPIO2 " " " " "" " " + 25 PG3/RXD3/KWG3 J3 GPIO3 " " " " "" " " + 26 PG4/RXCLK/KWG4 J3 GPIO4 " " " " "" " " + 27 PG5/RXDV/KWG5 J3 GPIO5 " " " " "" " " + 28 PG6/RXER/KWG6 J3 GPIO6 " " " " "" " " + 29 PG7/KWG7 J3 GPIO7 " " " " "" " " + + 7 PH0/TXD0/KWH0 N/C N/C + 6 PH1/TXD1/KWH1 N/C N/C + 5 PH2/TXD2/KWH2 J4 XBEE_RESET Not used on board + 4 PH3/TXD3/KWH3 J4 XBEE_RSSI Not used on board + 3 PH4/TXCLK/KWH4 BUTTON2 SW2 + 2 PH5/TXDV/KWH5 J5 XBEE_LOAD_H Not used on board + 1 PH6/TXER/KWH6 J4 XBEE_LOAD_L Not used on board + + 8 PJ0/MDC/KWJ0 LED1 D21, red + 9 PJ1/MDIO/KWJ1 LED2 D22, red + 20 PJ2/CRS/KWJ2 J3 SPI_CS Not used on board + 21 PJ3/COL/KWJ3 N/C +112 PJ6/SDA/KWJ6 J3 I2C_DATA Not used on board +111 PJ7/SCL/KWJ7 J3 I2C_CLOCK " " " " "" " " + + 51 PL6/TXER/KWL6 N/C N/C + 52 PL5/TXDV/KWL5 N/C N/C + 58 PL4/COLLED Collision LED red + 59 PL3/DUPLED Full Duplex LED yellow + 81 PL2/SPDLED 100Mbps Speed LED yellow + 83 PL1/LNKLED Link Good LED green + 84 PL0/ACTLED Activity LED yellow + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development + environment. The source has been built only using the GNU toolchain + (see below). Other toolchains will likely cause problems. + +NuttX Buildroot Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the HC12 GCC toolchain (if + different from the default in your PATH variable). + + If you have no HC12 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin + environments. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh ne64badge/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/m9s12x-defconfig-3.3.6 .config + + 6. make oldconfig + + 7. make + + If the make fails because it can't find the file to download, you may + have to locate the file on the internet and download it into the archives/ + directory manually. For example, binutils-2.18 can be found here: + http://ftp.gnu.org/gnu/binutils/ + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + +FreeScale HCS12 Serial Monitor +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + General: + The NuttX HCS12 port is configured to use the Freescale HCS serial + monitor. This monitor supports primitive debug commands that allow + FLASH/EEPROM programming and debugging through an RS-232 serial + interface. The serial monior is 2Kb in size and resides in FLASH at + addresses 0xf800-0xffff. The monitor does not use any RAM other than + the stack itself. + + AN2458 + The serial monitor is described in detail in Freescale Application + Note AN2458.pdf. + + COP: + The serial monitor uses the COP for the cold reset function and should + not be used by the application without some precautions (see AN2458). + + Clocking: + The serial monitor sets the operating frequency to 24 MHz. This is + not altered by the NuttX start-up; doing so would interfere with the + operation of the serial monitor. + + Memory Configuration: + Registers: + • Register space is located at 0x0000–0x03ff. + FLASH: + • FLASH memory is any address greater than 0x4000. All paged + addresses are assumed to be FLASH memory. + • Application code should exclude the 0xf780–0xff7f memory. + SRAM: + • RAM ends at 0x3FFF and builds down to the limit of the device’s + available RAM. + • The serial monitor's stack pointer is set to the end of RAM+1 + (0x4000). + EEPROM: + • EEPROM (if the target device has any) is limited to the available + space between the registers and the RAM (0x0400–to start of RAM). + External Devices: + • External devices attached to the multiplexed external bus + interface are not supported + + Serial Communications: + The serial monitor uses RS-232 serial communications through SCI0 at + 115,200 baud. The monitor must have exclusive use of this interface. + Access to the serial port is available through a monitor jump table. + + Interrrupts: + The serial monitor redirects interrupt vectors to an unprotected + portion of FLASH just before the protected monitor program + (0xf780–0xf7fe). The monitor will automatically redirect vector + programming operations to these user vectors. The user code should + therefore keep the normal (non-monitor) vector locations + (0xff80–0xfffe). + +Soft Registers +^^^^^^^^^^^^^^ + + The mc68hcs12 compilation is prone to errors like the following: + + CC: lib_b16sin.c + lib_b16sin.c: In function `b16sin': + lib_b16sin.c:110: error: unable to find a register to spill in class `S_REGS' + lib_b16sin.c:110: error: this is the insn: + (insn:HI 41 46 44 8 (parallel [ + (set (subreg:SI (reg:DI 58 [ rad ]) 4) + (reg/v:SI 54 [ rad ])) + (clobber (scratch:HI)) + ]) 20 {movsi_internal} (insn_list 46 (nil)) + (expr_list:REG_UNUSED (scratch:HI) + (expr_list:REG_NO_CONFLICT (reg/v:SI 54 [ rad ]) + (nil)))) + lib_b16sin.c:110: confused by earlier errors, bailing out + + There are several ways that this error could be fixed: + + 1. Increase the number of soft registers (i.e., "fake" registers defined + at fixed memory locations). This can be done by adding something like + -msoft-reg-count=4 to the CFLAGS. This approach was not taken + because: + + - This slows hcs12 performance + - All of these soft registers wouil have to be saved and restored + on every interrupt and context switch. + + 2. Lowering the optimization level by dropping -Os to -O2 or, more likely, + by removing -fomit-frame-pointer. Also not desireable becauase 99% of the + files that do not have this problem also increase in size. Special case + compilation with reduced optimization levels just for the files that need + it could be done, but this would complicate the make system. + + 3. Restructuring files to reduce the complexity. If you add local variables + to hold intermediate computational results, this error can be eliminated. + This is the approach taken in NuttX. It has disadvantages only in that + (1) it takes some effort and good guessing to eliminate the problem, and (2) + the problem is not really eliminated -- it can and will re-occur when files + are changed or new files are added. + + 4. Many files are built that are needed by DEM09S12NE64. Another very simple + option if those problem files are needed is to just remove the offending + files from the Make.defs file so that they no longer cause a problem. + +HCS12/NE64BADGE-specific Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=hc + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_HC=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_HCS12=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=mc92s12nec64 + + CONFIG_ARCH_CHIP_name - For use in C code + + CONFIG_ARCH_CHIP_MCS92S12NEC64 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=ne64badge + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_NE64BADGE (for the Future Electronics Group NE64 Badge) + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed RAM. + + CONFIG_RAM_START - The start address of installed RAM + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + GPIO Interrupts + + CONFIG_GPIO_IRQ - Enable general support for GPIO IRQs + CONFIG_HCS12_PORTG_INTS - Enable PortG IRQs + CONFIG_HCS12_PORTH_INTS - Enable PortH IRQs + CONFIG_HCS12_PORTJ_INTS - Enable PortJ IRQs + + HCS12 build options: + + CONFIG_HCS12_SERIALMON - Indicates that the target systems uses + the Freescale serial bootloader. + + CONFIG_HCS12_NONBANKED - Indicates that the target systems does not + support banking. Only short calls are made; one fixed page is + presented in the paging window. Only 48Kb of FLASH is usable + in this configuration: pages 3e, 3d, then 3f will appear as a + contiguous address space in memory. + + HCS12 Sub-system support + + CONFIG_HCS12_SCI0 + CONFIG_HCS12_SCI1 + + HCS12 specific device driver settings: + + CONFIG_SCIn_SERIAL_CONSOLE - selects SCIn for the console and ttys0 + (default is the SCI0). + + CONFIG_SCIn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + + CONFIG_SCIn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + + CONFIG_SCIn_BAUD - The configure BAUD of the UART. + + CONFIG_SCIn_BITS - The number of bits. Must be either 7 or 8. + + CONFIG_SCIn_PARTIY - 0=no parity, 1=odd parity, 2=even parity, 3=mark 1, 4=space 0 + + CONFIG_SCIn_2STOP - Two stop bits + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. Each Freescale HCS12 configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh ne64badge/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume the that you are building under + under Linux (should work under Windows with Cygwin as well). This + is easily reconfigured: + + CONFIG_HOST_LINUX=y + +Configuration Sub-Directories +----------------------------- + + ostest + + This configuration directory, performs a simple OS test using + examples/ostest. + diff --git a/configs/ne64badge/include/board.h b/configs/ne64badge/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..ddd8ea47aa30487f1cd859553451b14849f2fe1e --- /dev/null +++ b/configs/ne64badge/include/board.h @@ -0,0 +1,136 @@ +/************************************************************************************ + * configs/ne64badge/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* Frequency of the crystal oscillator */ + +#define HCS12_OSCCLK 16000000 /* 16MHz */ + +/* PLL Settings + * + * SYNR register controls the multiplication factor of the PLL. If the PLL is on, the + * count in the loop divider (SYNR) register effectively multiplies up the PLL clock + * (PLLCLK) from the reference frequency by 2 x (SYNR+1). PLLCLK will not be below + * the minimum VCO frequency (fSCM). + * + * The REFDV register provides a finer granularity for the PLL multiplier steps. The + * count in the reference divider divides OSCCLK frequency by REFDV + 1. + * + * PLLCLK = 2 * OSCCLK * (SYNR + 1) / (REFDV + 1) + * + * If (PLLSEL = 1), Bus Clock = PLLCLK / 2 + */ + +#define HCS12_SYNR_VALUE 0x15 +#define HCS12_REFDV_VALUE 0x15 +#define HCS12_PLLCLK (2*HCS12_OSCCLK*(HCS12_SYNR+1)/(HCS12_REFDV+1)) +#define HCS12_BUSCLK (HSC12_PLLCLK/2) + +/* LED definitions ******************************************************************/ + +/* The NE64 Badge board has 2 red LEDs that we will encode as: */ + + /* LED1 LED2 */ +#define LED_STARTED 0 /* OFF OFF = Still initializing */ +#define LED_HEAPALLOCATE 0 /* OFF OFF = Still initializing */ +#define LED_IRQSENABLED 0 /* OFF OFF = Still initializing */ +#define LED_STACKCREATED 1 /* ON OFF = Initialization complete */ +#define LED_INIRQ 2 /* NC ON = In an interrupt handler */ +#define LED_SIGNAL 2 /* NC ON = In a signal handler */ +#define LED_ASSERTION 2 /* NC ON = In an assertion */ +#define LED_PANIC 2 /* NC ON = Oops! We crashed. (flashing) */ + +/* Button definitions ***************************************************************/ + +/* The NE64 badge has 2 switches, one labed SW1 and the other SW2 on the board (but + * referred to as button1 and button2 in some documentation) + */ + +#define BUTTON1 1 /* Bit 0: SW1 button is depressed */ +#define BUTTON2 2 /* Bit 1: SW2 button is depressed */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: hcs12_boardinitialize + * + * Description: + * All HCS12 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void hcs12_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/ne64badge/ostest/Make.defs b/configs/ne64badge/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..113d980e3062ae43c188d7ed367618e82740c498 --- /dev/null +++ b/configs/ne64badge/ostest/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/ne64badge/ostest/Make.defs +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +# Setup for the selected toolchain +# NuttX buildroot under Linux or Cygwin + +CROSSDEV = m9s12x-nuttx-elf- +MAXOPTIMIZATION = -Os +WINTOOL = n + +ifeq ($(CONFIG_HCS12_NONBANKED),y) + ARCHCPUFLAGS = -m9s12x -mshort -mnolong-calls + LDSCRIPT = ld.script.nonbanked +else + ARCHCPUFLAGS = -m9s12x -mshort -mlong-calls + LDSCRIPT = ld.script.banked +endif + +ifneq ($(CONFIG_HCS12_MSOFTREGS),0) + ARCHCPUFLAGS += -msoft-reg-count=$(CONFIG_HCS12_MSOFTREGS) +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/$(LDSCRIPT)}" + MAXOPTIMIZATION = -O2 +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + LDFLAGS += -nostartfiles -nodefaultlibs +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/ne64badge/ostest/defconfig b/configs/ne64badge/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..f13118e580399c7f501fc373edde47d218f503fe --- /dev/null +++ b/configs/ne64badge/ostest/defconfig @@ -0,0 +1,573 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +CONFIG_MOTOROLA_SREC=y +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +CONFIG_ARCH_HC=y +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="hc" +CONFIG_ARCH_CHIP="m9s12" +CONFIG_ARCH_CHIP_MCS92S12NEC64=y +CONFIG_ARCH_HSC12=y + +# +# M9S12 Configuration Options +# + +# +# M9S12 Peripheral Selection +# +CONFIG_HCS12_SCI0=y +# CONFIG_HCS12_SCI1 is not set + +# +# SCI Configuration +# +CONFIG_SCI0_RXBUFSIZE=32 +CONFIG_SCI0_TXBUFSIZE=32 +CONFIG_SCI0_BAUD=38400 +CONFIG_SCI0_BITS=8 +CONFIG_SCI0_PARITY=0 +CONFIG_SCI0_2STOP=0 +# CONFIG_NOSCI_SERIAL_CONSOLE is not set +CONFIG_SCI0_SERIAL_CONSOLE=y + +# +# HSC12 Build Options +# +# CONFIG_HCS12_SERIALMON is not set +CONFIG_HCS12_NONBANKED=y + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_DEMOS92S12NEC64 is not set +CONFIG_ARCH_BOARD_NE64BADGE=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ne64badge" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=11 +# CONFIG_DEV_CONSOLE is not set +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=8 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=0 +CONFIG_NFILE_STREAMS=0 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=256 +CONFIG_USERMAIN_STACKSIZE=512 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=256 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set + +# +# USART Configuration +# +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=512 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ne64badge/ostest/ld.script.banked b/configs/ne64badge/ostest/ld.script.banked new file mode 100644 index 0000000000000000000000000000000000000000..9ec5f75516ec15ac046b5f22f6a0602a3041d9d2 --- /dev/null +++ b/configs/ne64badge/ostest/ld.script.banked @@ -0,0 +1,151 @@ +/**************************************************************************** + * configs/ne64badge/ostest/ld.script + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The NE64 Badge has 64Kb of FLASH and 8Kb of SRAM that are assumed to be + * paged and positioned as below: + */ + +MEMORY +{ + /* The register space resides at address 0x0000-0x03ff. The following + * address, 0x0400-0x1fff are unused. + * + * The 8Kb SRAM is mapped to 0x2000-0x2fff. + */ + + sram (rwx) : ORIGIN = 0x2000, LENGTH = 8K + + /* Two fixed text flash pages (corresponding to page 3e and 3f). The + * top 256 bytes of page 3f is reserved to hold the interrupt vectors + */ + + lowtext(rx) : ORIGIN = 0x4000, LENGTH = 16K /* Page 3e */ + hitext (rx) : ORIGIN = 0xc000, LENGTH = 16K-256 /* Page 3f */ + + /* Flash memory pages: + * + * The MC9S12NE64 implements 6 bits of the PPAGE register which gives it a + * 1 Mbyte program memory address space that is accessed through the PPAGE + * window. The lower 768K portion (0x000000-0x0bffff) of the address space + * is accessed with PPAGE values 0x00 through 0x2f. This address range + * is reserved for external memory when the part is operated in expanded + * mode. The upper 256K of the address space (0x0c0000-0x100000), accessed + * with PPAGE values 0x30 through 0x3f, is occupied by on chip flash. + */ + + page30 (rx) : ORIGIN = 0x0c0000, LENGTH = 16K /* Page 30 */ + page31 (rx) : ORIGIN = 0x0c4000, LENGTH = 16K /* Page 31 */ + page32 (rx) : ORIGIN = 0x0c8000, LENGTH = 16K /* Page 32 */ + page33 (rx) : ORIGIN = 0x0cc000, LENGTH = 16K /* Page 33 */ + page34 (rx) : ORIGIN = 0x0d0000, LENGTH = 16K /* Page 34 */ + page35 (rx) : ORIGIN = 0x0d4000, LENGTH = 16K /* Page 35 */ + page36 (rx) : ORIGIN = 0x0d8000, LENGTH = 16K /* Page 36 */ + page37 (rx) : ORIGIN = 0x0dc000, LENGTH = 16K /* Page 37 */ + page38 (rx) : ORIGIN = 0x0e0000, LENGTH = 16K /* Page 38 */ + page39 (rx) : ORIGIN = 0x0e4000, LENGTH = 16K /* Page 39 */ + page3a (rx) : ORIGIN = 0x0e8000, LENGTH = 16K /* Page 3a */ + page3b (rx) : ORIGIN = 0x0ec000, LENGTH = 16K /* Page 3b */ + page3c (rx) : ORIGIN = 0x0f0000, LENGTH = 16K /* Page 3c */ + page3d (rx) : ORIGIN = 0x0f4000, LENGTH = 16K /* Page 3d */ + + page3e (rx) : ORIGIN = 0x0f8000, LENGTH = 16K /* Page 3e */ + page3f (rx) : ORIGIN = 0x0fc000, LENGTH = 16K-2K /* Page 3f */ + + /* Vectors */ + + vectors (rx) : ORIGIN = 0xff80, LENGTH = 256 +} + +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(nonbanked) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > hitext + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > lowtext + + .vectors : { + *(vectors) + } > vectors + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + .vectors : { + _svectors = ABSOLUTE(.); + *(.vectors) + _evectors = ABSOLUTE(.); + } > vectors + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/ne64badge/ostest/ld.script.nonbanked b/configs/ne64badge/ostest/ld.script.nonbanked new file mode 100644 index 0000000000000000000000000000000000000000..f0577a06bef9dc495a05712f4e6df14e837b79c4 --- /dev/null +++ b/configs/ne64badge/ostest/ld.script.nonbanked @@ -0,0 +1,124 @@ +/**************************************************************************** + * configs/ne64badge/ostest/ld.script + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The NE64 Badge has 64Kb of FLASH and 8Kb of SRAM that are assumed to be + * paged and positioned as below: + */ + +MEMORY +{ + /* The register space resides at address 0x0000-0x03ff. The following + * address, 0x0400-0x1fff are unused. + * + * The 8Kb SRAM is mapped to 0x2000-0x2fff. + */ + + sram (rwx) : ORIGIN = 0x2000, LENGTH = 8K + + /* Three fixed text flash pages (corresponding to page 3e, 3d, and 3f) at + * 16Kb each (minus 256 bytes at the end of page 3f that is reserved for + * interrupt vectors). Notice that this is linked as a single contiguous; + * Post-processing is planned to make the binary to the appropriate flash + * pages. + */ + + text (rx) : ORIGIN = 0x4000, LENGTH = 48K-256 /* Page 3e, 3d, and 3f */ + + /* Vectors */ + + vectors (rx) : ORIGIN = 0xff80, LENGTH = 256 +} + +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(nonbanked) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > text + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > text + + .vectors : { + *(vectors) + } > vectors + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + .vectors : { + _svectors = ABSOLUTE(.); + *(.vectors) + _evectors = ABSOLUTE(.); + } > vectors + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/ne64badge/ostest/setenv.sh b/configs/ne64badge/ostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c5aa591b494a78ed10b5d0f8581d36189e065a3d --- /dev/null +++ b/configs/ne64badge/ostest/setenv.sh @@ -0,0 +1,46 @@ +#!/bin/bash +# configs/ne64badge/ostest/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export BUILDROOT_BIN="${WD}/../buildroot/build_m9s12x/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/ne64badge/src/.gitignore b/configs/ne64badge/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/ne64badge/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/ne64badge/src/Makefile b/configs/ne64badge/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..2fc6083a9d830902a2166534a4bca744b0d08a56 --- /dev/null +++ b/configs/ne64badge/src/Makefile @@ -0,0 +1,44 @@ +############################################################################ +# configs/ne64badge/src/Makefile +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = m9s12_boot.c m9s12_leds.c m9s12_buttons.c m9s12_spi.c +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += m9s12_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/ne64badge/src/m9s12_appinit.c b/configs/ne64badge/src/m9s12_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..ba61f1eaf3cf2daf10204a91505213dd0957fad7 --- /dev/null +++ b/configs/ne64badge/src/m9s12_appinit.c @@ -0,0 +1,71 @@ +/**************************************************************************** + * config/ne64badge/src/m9s12_appinit.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "ne64badge.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + /* Configure SPI-based devices */ + + return OK; +} diff --git a/configs/ne64badge/src/m9s12_boot.c b/configs/ne64badge/src/m9s12_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..e3783feed4c723453cd56bc1d7ddb456a142c71e --- /dev/null +++ b/configs/ne64badge/src/m9s12_boot.c @@ -0,0 +1,89 @@ +/************************************************************************************ + * configs/ne64badge/src/m9s12_boot.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "ne64badge.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: hcs12_boardinitialize + * + * Description: + * All HCS12 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void hcs12_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * hcs12_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_INCLUDE_HCS12_ARCH_SPI) + if (hcs12_spidev_initialize) + { + hcs12_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/ne64badge/src/m9s12_buttons.c b/configs/ne64badge/src/m9s12_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..587cf884ec29a62bdbe12da0655ee65ebe67f11e --- /dev/null +++ b/configs/ne64badge/src/m9s12_buttons.c @@ -0,0 +1,133 @@ +/**************************************************************************** + * configs/ne64badge/src/m9s12_buttons.c + * + * Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "ne64badge.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG with + * CONFIG_DEBUG_VERBOSE too) + */ + +#undef BUTTON_DEBUG /* Define to enable debug */ +#undef BUTTON_VERBOSE /* Define to enable verbose debug */ + +#ifdef BUTTON_DEBUG +# define btndbg lldbg +# ifdef BUTTON_VERBOSE +# define btnvdbg lldbg +# else +# define btnvdbg(x...) +# endif +#else +# undef BUTTON_VERBOSE +# define btndbg(x...) +# define btnvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef BUTTON_VERBOSE +# define btn_dumpgpio(m) m9s12_dumpgpio(m) +#else +# define btn_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + ****************************************************************************/ + +void board_button_initialize(void) +{ + /* Configure all button GPIO lines */ + + btn_dumpgpio("board_button_initialize() Entry)"); + + hcs12_configgpio(NE64BADGE_BUTTON1); + hcs12_configgpio(NE64BADGE_BUTTON2); + + btn_dumpgpio("board_button_initialize() Exit"); +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + + if (hcs12_gpioread(NE64BADGE_BUTTON1)) + { + ret |= BUTTON1; + } + + if (hcs12_gpioread(NE64BADGE_BUTTON2)) + { + ret |= BUTTON2; + } + + return ret; +} + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/ne64badge/src/m9s12_leds.c b/configs/ne64badge/src/m9s12_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..22fa22272ea65abe99fda2d61d1a9608c9513d41 --- /dev/null +++ b/configs/ne64badge/src/m9s12_leds.c @@ -0,0 +1,154 @@ +/**************************************************************************** + * configs/ne64badge/src/m9s12_leds.c + * + * Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "ne64badge.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS) +# define led_dumpgpio(m) m9s12_dumpgpio(m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + * + * Description: + * Configure and initialize on-board LEDs + * + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure all LED GPIO lines */ + + led_dumpgpio("board_autoled_initialize() Entry)"); + + hcs12_configgpio(NE64BADGE_LED1); + hcs12_configgpio(NE64BADGE_LED2); + + led_dumpgpio("board_autoled_initialize() Exit"); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + default: + case 0 : /* STARTED, HEAPALLOCATE, IRQSENABLED */ + hcs12_gpiowrite(NE64BADGE_LED1, true); + hcs12_gpiowrite(NE64BADGE_LED2, true); + break; + + case 1 : /* STACKCREATED */ + hcs12_gpiowrite(NE64BADGE_LED1, false); + hcs12_gpiowrite(NE64BADGE_LED2, true); + break; + + case 2 : /* INIRQ, SIGNAL, ASSERTION, PANIC */ + hcs12_gpiowrite(NE64BADGE_LED2, false); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + default: + case 0 : /* STARTED, HEAPALLOCATE, IRQSENABLED */ + case 1 : /* STACKCREATED */ + hcs12_gpiowrite(NE64BADGE_LED1, true); + case 2 : /* INIRQ, SIGNAL, ASSERTION, PANIC */ + hcs12_gpiowrite(NE64BADGE_LED2, true); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/ne64badge/src/m9s12_spi.c b/configs/ne64badge/src/m9s12_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..bb4e3bc6967369f2a21c67765de255d6e314127f --- /dev/null +++ b/configs/ne64badge/src/m9s12_spi.c @@ -0,0 +1,129 @@ +/************************************************************************************ + * configs/ne64badge/src/m9s12_spi.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "ne64badge.h" + +#if defined(CONFIG_HCS12_SPI) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: hcs12_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the NE64 Badge board. + * + ************************************************************************************/ + +void weak_function hcs12_spidev_initialize(void) +{ +} + +/**************************************************************************** + * Name: hcs12_spiselect and hcs12_spistatus + * + * Description: + * The external functions, hcs12_spiselect and hcs12_spistatus must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including hcs12_spibus_initialize()) + * are provided by common HCS12 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in hcs12_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide hcs12_spiselect() and hcs12_spistatus() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to hcs12_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by hcs12_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +void hcs12_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ +} + +uint8_t hcs12_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} + +#endif /* CONFIG_HCS12_SPI */ diff --git a/configs/ne64badge/src/ne64badge.h b/configs/ne64badge/src/ne64badge.h new file mode 100644 index 0000000000000000000000000000000000000000..103a7cd46f8cbeb8cdca15bf6d30273ca0a3bd09 --- /dev/null +++ b/configs/ne64badge/src/ne64badge.h @@ -0,0 +1,191 @@ +/************************************************************************************ + * configs/ne64badge/src/ne64badge.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_NE64BADGE_SRC_NE64BADGE_H +#define __CONFIGS_NE64BADGE_SRC_NE64BADGE_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include "m9s12.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* NE64BADGE Pin Usage **************************************************************/ +/* PIN PIN NAME BOARD SIGNAL NOTES + * --- ------------------- -------------- ---------------------- + * 44 RESET J3 RESET_L Also to SW3 + * 57 BKGD/MODC/TAGHI_B BDM BKGD CON6A + * + * 85 PAD0 VR1 Potentiometer + * 86 PAD1 J3 ANALOG_IN0 Not used on board + * 87 PAD2 J3 ANALOG_IN1 " " " " "" " " + * 88 PAD3 J3 ANALOG_IN2 " " " " "" " " + * 89 PAD4 J3 ANALOG_IN3 " " " " "" " " + * + * 70 PHY_TXP J7 TD+ RJ45 connector + * 71 PHY_TXN J7 TD- RJ45 connector + * 73 PHY_RXP J7 RD+ RJ45 connector + * 74 PHY_RXN J7 RD- RJ45 connector + * + * Ports A,B,E,K managed by the MEBI block + * --------------------------------------- + * 60 PA0/ADDR8/DATA8 J3 ADDR_DATA8 Not used on board + * 61 PA1/ADDR9/DATA9 J3 ADDR_DATA9 " " " " "" " " + * 62 PA2/ADDR10/DATA10 J3 ADDR_DATA10 " " " " "" " " + * 63 PA3/ADDR11/DATA11 J3 ADDR_DATA11 " " " " "" " " + * 77 PA4/ADDR12/DATA12 J3 ADDR_DATA12 " " " " "" " " + * 78 PA5/ADDR13/DATA13 J3 ADDR_DATA13 " " " " "" " " + * 79 PA6/ADDR14/DATA14 J3 ADDR_DATA14 " " " " "" " " + * 80 PA7/ADDR15/DATA15 J3 ADDR_DATA15 " " " " "" " " + * + * 10 PB0/ADDR0/DATA0 J3 ADDR_DATA0 Not used on board + * 11 PB1/ADDR1/DATA1 J3 ADDR_DATA1 " " " " "" " " + * 12 PB2/ADDR2/DATA2 J3 ADDR_DATA2 " " " " "" " " + * 13 PB3/ADDR3/DATA3 J3 ADDR_DATA3 " " " " "" " " + * 16 PB4/ADDR4/DATA4 J3 ADDR_DATA4 " " " " "" " " + * 17 PB5/ADDR5/DATA5 J3 ADDR_DATA5 " " " " "" " " + * 18 PB6/ADDR6/DATA6 J3 ADDR_DATA6 " " " " "" " " + * 19 PB7/ADDR7/DATA7 J3 ADDR_DATA7 " " " " "" " " + * + * 56 PE0/XIRQ_B BUTTON1 SW1 + * 55 PE1/IRQ_B J3 IRQ Not used on board + * 54 PE2/R_W J3 RW " " " " "" " " + * 53 PE3/LSTRB_B/TAGLO_B J3 LSTRB " " " " "" " " + * 41 PE4/ECLK J3 ECLK " " " " "" " " + * 40 PE5/IPIPE0/MODA J3 MODA " " " " "" " " + * 39 PE6/IPIPE1/MODB J3 MODB " " " " "" " " + * 38 PE7/NOACC/XCLKS_B pulled low pulled low + */ + +#define NE64BADGE_BUTTON1 (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT_E | GPIO_PIN_0) + +/* 97 PK0/XADR14 N/C N/C + * 98 PK1/XADR15 N/C N/C + * 99 PK2/XADR16 N/C N/C + * 100 PK3/XADR17 N/C N/C + * 103 PK4/XADR18 N/C N/C + * 104 PK5/XADR19 N/C N/C + * 105 PK6/XCS_B J3 XCS Not used on board + * 106 PK7/ECS_B/ROMCTL J3 ECS " " " " "" " " + * + * Ports T,S,G,H,J,L managed by the PIM Block + * ------------------------------------------ + * 110 PT4/IOC1_4 J3 GPIO8 Not used on board + * 109 PT5/IOC1_5 J3 GPIO9 " " " " "" " " + * 108 PT6/IOC1_6 J3 GPIO10 " " " " "" " " + * 107 PT7/IOC1_7 N/C N/C + * + * 30 PS0/RXD0 RS232_RX Eventually maps to J2 RXD + * 31 PS1/TXD0 RS232_TX Eventually maps to J2 TXD + * 32 PS2/RXD1 J3&J4 UART_RX Not used on board + * 33 PS3/TXD1 J3&J4 UART_TX " " " " "" " " + * 34 PS4/MISO J3 SPI_MISO " " " " "" " " + * 35 PS5/MOSI J3 SPI_MOSI " " " " "" " " + * 36 PS6/SCK J3 SPI_CLOCK " " " " "" " " + * 37 PS7/SS_B J3 SPI_SS " " " " "" " " + * + * 22 PG0/RXD0/KWG0 J3 GPIO0 Not used on board + * 23 PG1/RXD1/KWG1 J3 GPIO1 " " " " "" " " + * 24 PG2/RXD2/KWG2 J3 GPIO2 " " " " "" " " + * 25 PG3/RXD3/KWG3 J3 GPIO3 " " " " "" " " + * 26 PG4/RXCLK/KWG4 J3 GPIO4 " " " " "" " " + * 27 PG5/RXDV/KWG5 J3 GPIO5 " " " " "" " " + * 28 PG6/RXER/KWG6 J3 GPIO6 " " " " "" " " + * 29 PG7/KWG7 J3 GPIO7 " " " " "" " " + * + * 7 PH0/TXD0/KWH0 N/C N/C + * 6 PH1/TXD1/KWH1 N/C N/C + * 5 PH2/TXD2/KWH2 J4 XBEE_RESET Not used on board + * 4 PH3/TXD3/KWH3 J4 XBEE_RSSI Not used on board + * 3 PH4/TXCLK/KWH4 BUTTON2 SW2 + * 2 PH5/TXDV/KWH5 J5 XBEE_LOAD_H Not used on board + * 1 PH6/TXER/KWH6 J4 XBEE_LOAD_L Not used on board + */ + +#define NE64BADGE_BUTTON2 (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT_H | GPIO_PIN_4) + +/* 8 PJ0/MDC/KWJ0 LED1 D21, red + * 9 PJ1/MDIO/KWJ1 LED2 D22, red + * 20 PJ2/CRS/KWJ2 J3 SPI_CS Not used on board + * 21 PJ3/COL/KWJ3 N/C + * 112 PJ6/SDA/KWJ6 J3 I2C_DATA Not used on board + * 111 PJ7/SCL/KWJ7 J3 I2C_CLOCK " " " " "" " " + */ + +#define NE64BADGE_LED1 (GPIO_OUTPUT | GPIO_OUTPUT_HIGH | GPIO_PORT_J | GPIO_PIN_0) +#define NE64BADGE_LED2 (GPIO_OUTPUT | GPIO_OUTPUT_HIGH | GPIO_PORT_J | GPIO_PIN_1) + +/* 51 PL6/TXER/KWL6 N/C N/C + * 52 PL5/TXDV/KWL5 N/C N/C + * 58 PL4/COLLED Collision LED red + * 59 PL3/DUPLED Full Duplex LED yellow + * 81 PL2/SPDLED 100Mbps Speed LED yellow + * 83 PL1/LNKLED Link Good LED green + * 84 PL0/ACTLED Activity LED yellow + */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: hcs12_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the STM3210E-EVAL board. + * + ************************************************************************************/ + +void weak_function hcs12_spidev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_NE64BADGE_SRC_NE64BADGE_H */ diff --git a/configs/ntosd-dm320/Kconfig b/configs/ntosd-dm320/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..37166f87e5f6b63ccf23ade1f24b5040eb8b18b9 --- /dev/null +++ b/configs/ntosd-dm320/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_NTOSD_DM320 +endif diff --git a/configs/ntosd-dm320/README.txt b/configs/ntosd-dm320/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..3377ffdb78da0b1a48fc754cb0e3c8d2bd16e6c7 --- /dev/null +++ b/configs/ntosd-dm320/README.txt @@ -0,0 +1,423 @@ +README +^^^^^^ + +This is the README file for the port of NuttX to the Neuros OSD. + +CONTENTS +^^^^^^^^ + - Dev vs. Production Neuros OSD v1.0 boards + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX buildroot Toolchain + - ARM/DM320-specific Configuration Options + - Configurations + - Configuration Options + - Issues + +Dev vs. Production Neuros OSD v1.0 boards +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + This port supports both the original Neuros OSD v1.0 Dev Board. + This port has recently been extended to V1.0 Production board (and + that is now the default configuration). References: + + http://www.neurostechnology.com/neuros-developer-community + http://wiki.neurostechnology.com/index.php/OSD_1.0_Developer_Home + http://wiki.neurostechnology.com/index.php/DM320_Platform_development + + There are some differences between the Dev Board and the currently + available commercial v1.0 Boards, most notably in the amount of memory: + 8Mb FLASH and 32Mb RAM vs. 16Mb and 64Mb as in the production board. + See the following for more information: + + http://wiki.neurostechnology.com/index.php/OSD_Developer_Board_v1 + + NuttX operates on the ARM9EJS of this dual core processor. The DSP + is available and unused. + + STATUS: This port is code complete, verified, and included in the + NuttX 0.2.1 release. + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. Raisonance GNU toolchain, or + 4. The NuttX buildroot Toolchain (see below), or + 5. Any generic arm-none-eabi GNU toolchain. + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery, devkitARM or Raisonance GNU toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARM_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARM_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARM_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARM_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARM_TOOLCHAIN_GNU_EABIL : Generic arm-none-eabi toolchain + + If you are not using CONFIG_ARM_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + The toolchain may also be set using the kconfig-mconf utility (make menuconfig) + or by passing CONFIG_ARM_TOOLCHAIN= to make, where is one + of CODESOURCERYW, CODESOURCERYL, DEVKITARM, BUILDROOT or GNU_EABI as described + above. + + NOTE: the CodeSourcery (for Windows), devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + + Generic arm-none-eabi GNU Toolchain + ----------------------------------- + There are a number of toolchain projects providing support for ARMv4/v5 + class processors, including: + + GCC ARM Embedded + https://launchpad.net/gcc-arm-embedded + + Summon ARM Toolchain + https://github.com/esden/summon-arm-toolchain + + Yagarto + http://www.yagarto.de + + Others exist for various Linux distributions, MacPorts, etc. Any version + based on GCC 4.6.3 or later should work. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/dm320, + arch/arm/src/common, arch/arm/src/arm, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/arm/up_head.S. You may have to build the NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by the IDE. + +NuttX buildroot Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the ARM926 GCC toolchain (if + different from the default). + + If you have no ARM toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + + 1. You must have already configured Nuttx in nuttx. + + cd tools + ./configure.sh ntosd-dm320/ + + 2. Download the latest buildroot package into + + 3. unpack + + 4. cd /buildroot + + 5. cp configs/arm-defconfig .config OR + cp configs/arm926t_defconfig-4.2.4 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h so that the PATH variable includes the path to the + newly built binaries. + +ARM/DM320-specific Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_ARM926EJS=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=dm320 + + CONFIG_ARCH_CHIP_name - For use in C code + + CONFIG_ARCH_CHIP_DM320 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=ntosd-dm320 + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_NTOSD_DM320 (for the Spectrum Digital C5471 EVM) + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_VSTART - The startaddress of DRAM (virtual) + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + DM320 specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + DM320 USB Configuration + + CONFIG_DM320_GIO_USBATTACH + GIO that detects USB attach/detach events + CONFIG_DM320_GIO_USBDPPULLUP + GIO + CONFIG_DMA320_USBDEV_DMA + Enable DM320-specific DMA support + CONFIG_DM320_GIO_USBATTACH=6 + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. Each Neuros OSD configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh ntosd-dm320/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume the CodeSourcery toolchain under + Linux. This is easily reconfigured: + + CONFIG_HOST_LINUX=y + CONFIG_ARM_TOOLCHAIN_CODESOURCERYL=y + +Configuration Sub-Directories +----------------------------- + + nettest + + This alternative configuration directory may be used to + enable networking using the OSDs DM9000A Ethernet interface. + It uses examples/nettest to excercise the TCP/IP network. + + nsh + + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables both the serial and telnetd NSH interfaces. + + poll + + This configuration exercises the poll()/select() text at + examples/poll + + thttpd + + This builds the THTTPD web server example using the THTTPD and + the examples/thttpd application. + + udp + + This alternative configuration directory is similar to nettest + except that is use examples/upd to exercise UDP. + + webserver + + This configuration file demonstrates the tiny webserver + at examples/webserver. + +Configuration Options +^^^^^^^^^^^^^^^^^^^^^ + +In additional to the common configuration options listed in the +file configs/README.txt, there are other configuration options +specific to the DM320: + + CONFIG_ARCH - identifies the arch subdirectory and, hence, the + processor architecture. + CONFIG_ARCH_name - for use in C code. This identifies the + particular chip or SoC that the architecture is implemented + in. + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + CONFIG_ARCH_CHIP_name - For use in C code + CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence, + the board that supports the particular chip or SoC. + CONFIG_ENDIAN_BIG - define if big endian (default is little endian) + CONFIG_ARCH_BOARD_name - for use in C code + CONFIG_BOARD_LOOPSPERMSEC - for delay loops + CONFIG_ARCH_LEDS - Use LEDs to show state. + CONFIG_RAM_SIZE - Describes the internal DRAM. + CONFIG_RAM_START - The start address of internal DRAM + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + +DM320 specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + +DM320 USB Configuration + + CONFIG_DM320_GIO_USBATTACH + GIO that detects USB attach/detach events + CONFIG_DM320_GIO_USBDPPULLUP + GIO connected to D+. Support software connect/disconnect. + CONFIG_DMA320_USBDEV_DMA + Enable DM320-specific DMA support + +Neuros OSD Configuration Options + + CONFIG_ARCH_NTOSD_DEVBOARD - Selects the old NTOSD development board. + The default is the production OSD board which differs in + several ways. + +Issues +^^^^^^ + + Title: DEBUG ISSUES + Description: config/ntos-dm320: It seems that when a lot of debug statements + are added, the system no longer boots. This is suspected to be + a stack problem: Making the stack bigger or removing arrays on + the stack seems to fix the problem (might also be the + bootloader overwriting memory) + Status: Open + Priority: Medium + + Title: USB DEVICE DRIVER UNTESTED + Description: A USB device controller driver was added but has never been tested. + Status: Open + Priority: Medium + + Title: FRAMEBUFFER DRIVER UNTESTED + Description: A framebuffer "driver" was added, however, it remains untested. + Status: Open + Priority: Medium + + Title: VIDEO ENCODER DRIVER + Description: In order to use the framebuffer "driver" additional video encoder + logic is required to setup composite video output or to interface + with an LCD. + Status: Open + Priority: Medium (high if you need to use the framebuffer driver) + + diff --git a/configs/ntosd-dm320/doc/README.txt b/configs/ntosd-dm320/doc/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..758870b9caa86cb1ff7b958e76c7b380577d3ef9 --- /dev/null +++ b/configs/ntosd-dm320/doc/README.txt @@ -0,0 +1,74 @@ +NuttX on the Neuros Technology OSD +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +References: +^^^^^^^^^^^ + +http://wiki.neurostechnology.com/index.php/Main_Page +http://wiki.neurostechnology.com/index.php/OSD_Developer_Home +http://wiki.neurostechnology.com/index.php/DM320_Platform_development +http://wiki.neurostechnology.com/index.php/The_Neuros_and_Open_Source +... + +Status: +^^^^^^^ + +NOTE: These instructions are for the Neuros development board (and a +rather old version of NuttX), +http://wiki.neurostechnology.com/index.php/OSD_Developer_Board_v1 +and have _not_ been updated for the Neuros OSD 1.0 consumer unit +(or for the current version of NuttX), +http://wiki.neurostechnology.com/index.php/Neuros_OSD_1.0 + +At present, the system only supports a serial console and timer +interrupts so there is not to much that you can do with it. But I +would be happy to work with anyone who is interested in using it. + +General instructions. + +1. Download build-0.1.0.tar.gz and nuttx-0.2.3.tar.gz into the same + . These are the current versions as of this writing + (but could very well new older release now). + +2. Unpack, you should now have /buildroot and + /nuttx-0.2.3 + +3. Rename nuttx-0.2.3 to nuttx + +4. Configure NuttX: + + cd /nuttx/tools + ./configure.sh ntosd-dm320 + +5. Build the toolchain: + + cd /buildroot + cp configs/c5471-defconfig .config + make oldconfig + make + +6. Build Nuttx: + + cd nuttx + . ./setenv.sh + make + mv nuttx /tftpboot/nuttx.dm320 + +7. Configure the OSD u-boot: + + Neuros Devboard > set ipaddr yy.yy.yy.yy + Neuros Devboard > set serverip xx.xx.xx.xx + Neuros Devboard > ... + Neuros Devboard > run update-ipstatic + + where yy.yy.yy.yy is the OSD IP address and xx.xx.xx.xx is + the host PC address. + +8. Load and run nuttx from uboot + + tftpboot xx.xx.xx.xx nuttx.dm320 + go 1008000 + +What will run is an a simple OS test that will verify many of the +features of the OS. (this is nutts/examples/ostest). + diff --git a/configs/ntosd-dm320/doc/test-result.txt b/configs/ntosd-dm320/doc/test-result.txt new file mode 100644 index 0000000000000000000000000000000000000000..dfa844691abea736559ca5635c839ffd5b817a03 --- /dev/null +++ b/configs/ntosd-dm320/doc/test-result.txt @@ -0,0 +1,468 @@ +This is the output from running examples/ostest on April 28, 2007 +================================================================= + +Neuros Devboard > tftpboot 192.168.0.100 nuttx.dm320 +Found DM9000 ID:90000a46 at address 60000300 ! +DM9000 work in 16 bus width +[eth_init]MAC:0:18:11:80:10:6: +TFTP from server 192.168.0.100; our IP address is 192.168.0.101 +Filename 'nuttx.dm320'. +Load address: 0x1000000 +Loading: ############################# +done +Bytes transferred = 146617 (23cb9 hex) +Neuros Devboard > go 1008000 +## Starting application at 0x01008000 ... +stdio_test: write fd=1 +stdio_test: write fd=2 +stdio_test: Standard I/O Check: printf +user_start: Started user_main at PID=2 +stdio_test: Standard I/O Check: fprintf to stderr + +user_main: Begin argument test +user_main: Started with argc=5 +user_main: argv[0]="" +user_main: argv[1]="Arg1" +user_main: argv[2]="Arg2" +user_main: argv[3]="Arg3" +user_main: argv[4]="Arg4" + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena fe0f10 fe0f10 +ordblks 2 2 +mxordblk fd99b0 fd99b0 +uordblks 53f0 53f0 +fordblks fdbb20 fdbb20 + +user_main: /dev/null test +dev_null: Read 0 bytes from /dev/null +dev_null: Wrote 1024 bytes to /dev/null + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena fe0f10 fe0f10 +ordblks 2 2 +mxordblk fd99b0 fd99b0 +uordblks 53f0 53f0 +fordblks fdbb20 fdbb20 + +user_main: mutex test +Initializing mutex +Starting thread 1 +Starting thread 2 + Thread1 Thread2 + Loops 32 32 + Errors 0 0 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena fe0f10 fe0f10 +ordblks 2 2 +mxordblk fd99b0 fd99b0 +uordblks 53f0 53f0 +fordblks fdbb20 fdbb20 + +user_main: cancel test +cancel_test: Test 1: Normal Cancelation +cancel_test: Starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +cancel_test: waiter exited with result=ffffffff +cancel_test: PASS thread terminated with PTHREAD_CANCELED +cancel_test: Test 2: Cancelation of detached thread +cancel_test: Re-starting thread +restart_thread: Destroying cond +restart_thread: Destroying mutex +restart_thread: Re-starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +cancel_test: PASS pthread_join failed with status=ESRCH +cancel_test: Test 3: Non-cancelable threads +cancel_test: Re-starting thread (non-cancelable) +restart_thread: Destroying cond +restart_thread: Destroying mutex +restart_thread: Re-starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +thread_waiter: Setting non-cancelable +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +thread_waiter: Releasing mutex +thread_waiter: Setting cancelable +cancel_test: waiter exited with result=ffffffff +cancel_test: PASS thread terminated with PTHREAD_CANCELED + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena fe0f10 fe0f10 +ordblks 2 2 +mxordblk fd99b0 fd99b0 +uordblks 53f0 53f0 +fordblks fdbb20 fdbb20 + +user_main: semaphore test +sem_test: Initializing semaphore to 0 +sem_test: Starting waiter thread 1 +sem_test: Set thread 1 priority to 191 +waiter_func: Thread 1 Started +waiter_func: Thread 1 initial semaphore value = 0 +waiter_func: Thread 1 aiting on semaphore +sem_test: Starting waiter thread 2 +sem_test: Set thread 2 priority to 128 +waiter_func: Thread 2 Started +waiter_func: Thread 2 initial semaphore value = -1 +waiter_func: Thread 2 aiting on semaphore +sem_test: Starting poster thread 3 +sem_test: Set thread 3 priority to 64 +poster_func: Thread 3 started +poster_func: Thread 3 semaphore value = -2 +poster_func: Thread 3 posting semaphore +waiter_func: Thread 1 awakened +waiter_func: Thread 1 new semaphore value = -1 +waiter_func: Thread 1 done +poster_func: Thread 3 new semaphore value = -1 +poster_func: Thread 3 semaphore value = -1 +poster_func: Thread 3 posting semaphore +waiter_func: Thread 2 awakened +waiter_func: Thread 2 new semaphore value = 0 +waiter_func: Thread 2 done +poster_func: Thread 3 new semaphore value = 0 +poster_func: Thread 3 done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena fe0f10 fe0f10 +ordblks 2 2 +mxordblk fd99b0 fd99b0 +uordblks 53f0 53f0 +fordblks fdbb20 fdbb20 + +user_main: condition variable test +cond_test: Initializing mutex +cond_test: Initializing cond +cond_test: Starting waiter +cond_test: Set thread 1 priority to 128 +waiter_thread: Started +cond_test: Starting signaler +cond_test: Set thread 2 priority to 64 +thread_signaler: Started +thread_signaler: Terminating +cond_test: signaler terminated, now cancel the waiter +cond_test: Waiter Signaler +cond_test: Loops 32 32 +cond_test: Errors 0 0 +cond_test: +0 times, waiter did not have to wait for data +cond_test: 0 times, data was already available when the signaler run +cond_test: 0 times, the waiter was in an unexpected state when the signaler ran + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena fe0f10 fe0f10 +ordblks 2 2 +mxordblk fd99b0 fd99b0 +uordblks 53f0 53f0 +fordblks fdbb20 fdbb20 + +user_main: timed wait test +thread_waiter: Initializing mutex +timedwait_test: Initializing cond +timedwait_test: Starting waiter +timedwait_test: Set thread 2 priority to 177 +thread_waiter: Taking mutex +thread_waiter: Starting 5 second wait for condition +timedwait_test: Joining +thread_waiter: pthread_cond_timedwait timed out +thread_waiter: Releasing mutex +thread_waiter: Exit with status 0x12345678 +timedwait_test: waiter exited with result=12345678 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena fe0f10 fe0f10 +ordblks 2 2 +mxordblk fd99b0 fd99b0 +uordblks 53f0 53f0 +fordblks fdbb20 fdbb20 + +user_main: message queue test +mqueue_test: Starting receiver +mqueue_test: Set receiver priority to 128 +receiver_thread: Starting +mqueue_test: Starting sender +mqueue_test: Set sender thread priority to 64 +mqueue_test: Waiting for sender to complete +sender_thread: Starting +receiver_thread: mq_receive succeeded on msg 0 +sender_thread: mq_send succeeded on msg 0 +receiver_thread: mq_receive succeeded on msg 1 +sender_thread: mq_send succeeded on msg 1 +receiver_thread: mq_receive succeeded on msg 2 +sender_thread: mq_send succeeded on msg 2 +receiver_thread: mq_receive succeeded on msg 3 +sender_thread: mq_send succeeded on msg 3 +receiver_thread: mq_receive succeeded on msg 4 +sender_thread: mq_send succeeded on msg 4 +receiver_thread: mq_receive succeeded on msg 5 +sender_thread: mq_send succeeded on msg 5 +receiver_thread: mq_receive succeeded on msg 6 +sender_thread: mq_send succeeded on msg 6 +receiver_thread: mq_receive succeeded on msg 7 +sender_thread: mq_send succeeded on msg 7 +receiver_thread: mq_receive succeeded on msg 8 +sender_thread: mq_send succeeded on msg 8 +receiver_thread: mq_receive succeeded on msg 9 +sender_thread: mq_send succeeded on msg 9 +sender_thread: returning nerrors=0 +mqueue_test: Killing receiver +receiver_thread: mq_receive interrupted! +receiver_thread: returning nerrors=0 +mqueue_test: Canceling receiver +mqueue_test: receiver has already terminated + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena fe0f10 fe0f10 +ordblks 2 2 +mxordblk fd99b0 fd99b0 +uordblks 53f0 53f0 +fordblks fdbb20 fdbb20 + +user_main: timed message queue test +timedmqueue_test: Starting sender +sender_thread: Starting +sender_thread: mq_timedsend succeeded on msg 0 +sender_thread: mq_timedsend succeeded on msg 1 +sender_thread: mq_timedsend succeeded on msg 2 +sender_thread: mq_timedsend succeeded on msg 3 +sender_thread: mq_timedsend succeeded on msg 4 +sender_thread: mq_timedsend succeeded on msg 5 +sender_thread: mq_timedsend succeeded on msg 6 +sender_thread: mq_timedsend succeeded on msg 7 +sender_thread: mq_timedsend succeeded on msg 8 +timedmqueue_test: Waiting for sender to complete +sender_thread: mq_timedsend 9 timed out as expected +sender_thread: returning nerrors=0 +timedmqueue_test: Starting receiver +receiver_thread: Starting +receiver_thread: mq_timedreceive succeeded on msg 0 +receiver_thread: mq_timedreceive succeeded on msg 1 +receiver_thread: mq_timedreceive succeeded on msg 2 +receiver_thread: mq_timedreceive succeeded on msg 3 +receiver_thread: mq_timedreceive succeeded on msg 4 +receiver_thread: mq_timedreceive succeeded on msg 5 +receiver_thread: mq_timedreceive succeeded on msg 6 +receiver_thread: mq_timedreceive succeeded on msg 7 +receiver_thread: mq_timedreceive succeeded on msg 8 +timedmqueue_test: Waiting for sender to complete +receiver_thread: Receive 9 timed out as expected +receiver_thread: returning nerrors=0 +timedmqueue_test: Test complete + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena fe0f10 fe0f10 +ordblks 2 2 +mxordblk fd99b0 fd99b0 +uordblks 53f0 53f0 +fordblks fdbb20 fdbb20 + +user_main: signal handler test +sighand_test: Initializing semaphore to 0 +sighand_test: Starting waiter task +sighand_test: Started waiter_main pid=18 +waiter_main: Waiter started +waiter_main: Unmasking signal 17 +waiter_main: Registering signal handler +waiter_main: oact.sigaction=0 oact.sa_flags=0 oact.sa_mask=0 +waiter_main: Waiting on semaphore +sighand_test: Signaling pid=18 with signo=17 sigvalue=42 +wakeup_action: Received signal 17 +wakeup_action: sival_int=42 +wakeup_action: si_code=1 +wakeup_action: ucontext=0 +waiter_main: sem_wait() successfully interrupted by signal +waiter_main: done +sighand_test: done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena fe0f10 fe0f10 +ordblks 2 2 +mxordblk fd99b0 fd99b0 +uordblks 53f0 53f0 +fordblks fdbb20 fdbb20 + +user_main: POSIX timer test +timer_test: Initializing semaphore to 0 +timer_test: Unmasking signal 17 +timer_test: Registering signal handler +timer_test: oact.sigaction=0 oact.sa_flags=0 oact.sa_mask=0 +timer_test: Creating timer +timer_test: Starting timer +timer_test: Waiting on semaphore +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=1 +timer_test: Waiting on semaphore +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=2 +timer_test: Waiting on semaphore +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=3 +timer_test: Waiting on semaphore +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=4 +timer_test: Waiting on semaphore +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=5 +timer_test: Deleting timer +timer_test: done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena fe0f10 fe0f10 +ordblks 2 2 +mxordblk fd99b0 fd99b0 +uordblks 53f0 53f0 +fordblks fdbb20 fdbb20 + +user_main: round-robin scheduler test +rr_test: Starting sieve1 thread +rr_test: Set thread priority to 1 +rr_test: Set thread policty to SCHED_RR +rr_test: Starting sieve1 thread +sieve1 started +sieve1 finished +rr_test: Waiting for sieves to complete -- this should take awhile +rr_test: If RR scheduling is working, they should start and complete at +rr_test: about the same time +sieve2 started +sieve2 finished +rr_test: Done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena fe0f10 fe0f10 +ordblks 2 2 +mxordblk fd99b0 fd99b0 +uordblks 53f0 53f0 +fordblks fdbb20 fdbb20 + +user_main: barrier test +barrier_test: Initializing barrier +barrier_func: Thread 0 started +barrier_test: Thread 0 created +barrier_func: Thread 1 started +barrier_test: Thread 1 created +barrier_func: Thread 0 calling pthread_barrier_wait() +barrier_func: Thread 1 calling pthread_barrier_wait() +barrier_func: Thread 2 started +barrier_test: Thread 2 created +barrier_func: Thread 3 started +barrier_test: Thread 3 created +barrier_func: Thread 4 started +barrier_test: Thread 4 created +barrier_func: Thread 5 started +barrier_func: Thread 2 calling pthread_barrier_wait() +barrier_func: Thread 3 calling pthread_barrier_wait() +barrier_func: Thread 4 calling pthread_barrier_wait() +barrier_test: Thread 5 created +barrier_func: Thread 6 started +barrier_test: Thread 6 created +barrier_func: Thread 7 started +barrier_test: Thread 7 created +barrier_func: Thread 5 calling pthread_barrier_wait() +barrier_func: Thread 6 calling pthread_barrier_wait() +barrier_func: Thread 7 calling pthread_barrier_wait() +barrier_func: Thread 7, back with status=PTHREAD_BARRIER_SERIAL_THREAD (I AM SPECIAL) +barrier_func: Thread 0, back with status=0 (I am not special) +barrier_func: Thread 1, back with status=0 (I am not special) +barrier_func: Thread 2, back with status=0 (I am not special) +barrier_func: Thread 3, back with status=0 (I am not special) +barrier_func: Thread 4, back with status=0 (I am not special) +barrier_func: Thread 5, back with status=0 (I am not special) +barrier_func: Thread 6, back with status=0 (I am not special) +barrier_func: Thread 7 done +barrier_func: Thread 0 done +barrier_test: Thread 0 completed with result=0 +barrier_func: Thread 1 done +barrier_func: Thread 2 done +barrier_func: Thread 3 done +barrier_func: Thread 4 done +barrier_func: Thread 5 done +barrier_func: Thread 6 done +barrier_test: Thread 1 completed with result=0 +barrier_test: Thread 2 completed with result=0 +barrier_test: Thread 3 completed with result=0 +barrier_test: Thread 4 completed with result=0 +barrier_test: Thread 5 completed with result=0 +barrier_test: Thread 6 completed with result=0 +barrier_test: Thread 7 completed with result=0 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena fe0f10 fe0f10 +ordblks 2 2 +mxordblk fd99b0 fd99b0 +uordblks 53f0 53f0 +fordblks fdbb20 fdbb20 + +Final memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena fe0f10 fe0f10 +ordblks 2 2 +mxordblk fd99b0 fd99b0 +uordblks 53f0 53f0 +fordblks fdbb20 fdbb20 +user_main: Exitting diff --git a/configs/ntosd-dm320/include/board.h b/configs/ntosd-dm320/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..b28e33cc38ddc08c19c3d8ccd264c0301f738d7b --- /dev/null +++ b/configs/ntosd-dm320/include/board.h @@ -0,0 +1,147 @@ +/************************************************************************************ + * configs/ntods-dm320/include/board/board.h + * + * Copyright (C) 2007-201, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_NTOSD_DM320_INCLUDE_BOARD_H +#define __CONFIGS_NTOSD_DM320_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* This platform has the ARM at 175 MHz and the DSP at 101.25 MHz */ + +#define DM320_ARM_CLOCK 175500000 +#define DM320_SDR_CLOCK 101250000 +#define DM320_DSP_CLOCK 101250000 +#define DM320_AXL_CLOCK 175500000 +#define DM320_AHB_CLOCK 87750000 + +/* UART0/1 and TIMER0/1 are clocked by PLLIN=27MHz */ + +#define CONFIG_DM320_UARTPPLIN 1 + +/* Configration for dm9000 network device */ + +#define DM9000_BASE CONFIG_DM9000_BASE + +/* Memory Map ***********************************************************************/ + +/* The Neuros development board has 16MiB RAM starting at 0x01000000 (physical) and + * 8MiB of FLASH. The Neuros OSD 1.0 consumer has 32MiB RAM starting at 0x01100000 + * (physical) and 16MiB of FLASH. + * + * FIXME: Flash location may also differ on OSD 1.0 consumer unit! + */ + +#ifdef CONFIG_ARCH_NTOSD_DEVBOARD +# if CONFIG_RAM_START != 0x01000000 +# error "Invalid setting for CONFIG_RAM_START" +# endif +# if CONFIG_RAM_SIZE != 0x01000000 +# warning "Check CONFIG_RAM_SIZE. This Neuros OSD has 0x01000000 bytes of SDRAM" +# endif +# define DM320_SDRAM_PSECTION 0x01000000 /* 496Mb many section -- */ +# define DM320_SDRAM_PADDR 0x01000000 /* 496Mb many sections CW */ +#else +# if CONFIG_RAM_START != 0x01100000 +# error "Invalid setting for CONFIG_RAM_START" +# endif +# if CONFIG_RAM_SIZE != 0x02000000 +# warning "Check CONFIG_RAM_SIZE. This Neuros OSD has 0x02000000 bytes of SDRAM" +# endif +# define DM320_SDRAM_PSECTION 0x01100000 /* 496Mb many section -- */ +# define DM320_SDRAM_PADDR 0x01100000 /* 496Mb many sections CW */ +#endif + +/* GIO keyboard (GIO 1-5) */ + +#define KEY_MASK 0x003E +#define KEY_SCAN0_BIT 0x0002 +#define KEY_SCAN1_BIT 0x0004 +#define KEY_SCAN2_BIT 0x0008 +#define KEY_SCAN3_BIT 0x0010 +#define KEY_SCAN4_BIT 0x0020 + +#define KEY_GIO_DIR0_VAL KEY_MASK /* Configure as INPUT */ +#define KEY_GIO_INV0_VAL KEY_MASK /* All inverted */ +#define KEY_GIO_SET0_VAL (0) /* Initialized to zero */ +#define KEY_GIO_CLR0_VAL (0) + +#define GIO_KEY_SCAN0 1 +#define GIO_KEY_SCAN1 2 +#define GIO_KEY_SCAN2 3 +#define GIO_KEY_SCAN3 4 +#define GIO_KEY_SCAN4 5 +#define GIO_MS_DETECT 5 +#define GIO_DM9000A_INT 6 +#define GIO_MMC_DETECT 8 +#define GIO_CFC_DETECT 9 +#define GIO_VIDEO_IN 10 +#define GIO_LED_RED 16 +#define GIO_LED_GREEN 17 +#define GIO_CFC_ENABLE 25 +#define GIO_I2C_SCL 30 +#define GIO_I2C_SDA 31 +#define GIO_ENA_VIDEO 32 +#define GIO_CFC_RESET 36 +#define GIO_CFC_STSCHG 37 + +/* LED Usage */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 0 +#define LED_IRQSENABLED 0 +#define LED_STACKCREATED GIO_LED_GREEN +#define LED_INIRQ GIO_LED_RED +#define LED_SIGNAL GIO_LED_RED +#define LED_ASSERTION GIO_LED_RED +#define LED_PANIC GIO_LED_RED +#define LED_IDLE 0 + + +/************************************************************************************ + * Inline Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#endif + +#endif /* __CONFIGS_NTOSD_DM320_INCLUDE_BOARD_H */ diff --git a/configs/ntosd-dm320/nettest/Make.defs b/configs/ntosd-dm320/nettest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..fb41fda097973d40b55c122b18e25845e3c195b8 --- /dev/null +++ b/configs/ntosd-dm320/nettest/Make.defs @@ -0,0 +1,123 @@ +############################################################################ +# configs/ntosd-dm320/nettest/Make.defs +# +# Copyright (C) 2007-2008, 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nettest/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nettest/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mtune=arm9tdmi -march=armv5te -mfloat-abi=soft -fno-builtin +else + ARCHCPUFLAGS = -mapcs-32 -mtune=arm9tdmi -march=armv5te -msoft-float -fno-builtin +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARM_TOOLCHAIN_BUILDROOT),y) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/ntosd-dm320/nettest/defconfig b/configs/ntosd-dm320/nettest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..2cc06a37a6d82b2b42d43cc0a165e648f7a363a0 --- /dev/null +++ b/configs/ntosd-dm320/nettest/defconfig @@ -0,0 +1,785 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +CONFIG_ARCH_CHIP_DM320=y +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +CONFIG_ARCH_ARM926EJS=y +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="dm320" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARM_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set + +# +# DM320 Configuration Options +# + +# +# DM320 Peripheral Selections +# +CONFIG_DM320_UART0=y +CONFIG_DM320_UART1=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_PAGING is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16945 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x01100000 +CONFIG_RAM_VSTART=0x00000000 +CONFIG_RAM_SIZE=33554432 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NTOSD_DM320=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ntosd-dm320" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=8 +CONFIG_START_DAY=29 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nettest_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +CONFIG_NET_DM90x0=y +CONFIG_DM9X_BASE=0xd0000300 +CONFIG_DM9X_IRQ=27 +# CONFIG_DM9X_BUSWIDTH8 is not set +CONFIG_DM9X_BUSWIDTH16=y +# CONFIG_DM9X_BUSWIDTH32 is not set +# CONFIG_DM9X_CHECKSUM is not set +# CONFIG_DM9X_ETRANS is not set +CONFIG_DM9X_MODE_AUTO=y +# CONFIG_DM9X_MODE_10MHD is not set +# CONFIG_DM9X_MODE_10MFD is not set +# CONFIG_DM9X_MODE_100MHD is not set +# CONFIG_DM9X_MODE_100MFD is not set +# CONFIG_DM9X_STATS is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_NETTEST=y +# CONFIG_EXAMPLES_NETTEST_SERVER is not set +# CONFIG_EXAMPLES_NETTEST_PERFORMANCE is not set +CONFIG_EXAMPLES_NETTEST_IPv4=y +CONFIG_EXAMPLES_NETTEST_INIT=y +# CONFIG_EXAMPLES_NETTEST_NOMAC is not set + +# +# IPv4 addresses +# +CONFIG_EXAMPLES_NETTEST_IPADDR=0x0a000002 +CONFIG_EXAMPLES_NETTEST_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_NETTEST_NETMASK=0xffffff00 +CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ntosd-dm320/nettest/ld.script b/configs/ntosd-dm320/nettest/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..1b0b18500963dd39ea57061a94ba4fdb7a55e0e0 --- /dev/null +++ b/configs/ntosd-dm320/nettest/ld.script @@ -0,0 +1,85 @@ +/**************************************************************************** + * configs/ntosd-dm320/nettest/ld.script + * + * Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + /* The OS entry point is here */ + + . = 0x00008000; + .text : { + _stext = ABSOLUTE(.); + *(.text) + *(.fixup) + *(.gnu.warning) + *(.rodata) + *(.glue_7) + *(.glue_7t) + *(.got) /* Global offset table */ + _etext = ABSOLUTE(.); + } + + _eronly = ABSOLUTE(.); + . = ALIGN(4096); + + .data : { + _sdata = ABSOLUTE(.); + *(.data) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss) + *(COMMON) + _ebss = ABSOLUTE(.); + } + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/ntosd-dm320/nettest/setenv.sh b/configs/ntosd-dm320/nettest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..0f5dd758ba862d0a318818d733fe875f92da024a --- /dev/null +++ b/configs/ntosd-dm320/nettest/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/ntosd-dm320/nettest/setenv.sh +# +# Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/ntosd-dm320/nsh/Make.defs b/configs/ntosd-dm320/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..1422acda541a91f79cbad603beda62e6b018a906 --- /dev/null +++ b/configs/ntosd-dm320/nsh/Make.defs @@ -0,0 +1,123 @@ +############################################################################ +# configs/ntosd-dm320/nsh/Make.defs +# +# Copyright (C) 2007-2008, 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mtune=arm9tdmi -march=armv5te -mfloat-abi=soft -fno-builtin +else + ARCHCPUFLAGS = -mapcs-32 -mtune=arm9tdmi -march=armv5te -msoft-float -fno-builtin +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARM_TOOLCHAIN_BUILDROOT),y) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/ntosd-dm320/nsh/defconfig b/configs/ntosd-dm320/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c295c303a2c2e8ccee04f6d7c8d39d1fcdd2923d --- /dev/null +++ b/configs/ntosd-dm320/nsh/defconfig @@ -0,0 +1,983 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +CONFIG_ARCH_CHIP_DM320=y +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +CONFIG_ARCH_ARM926EJS=y +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="dm320" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARM_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set + +# +# DM320 Configuration Options +# + +# +# DM320 Peripheral Selections +# +CONFIG_DM320_UART0=y +CONFIG_DM320_UART1=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_PAGING is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16945 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x01100000 +CONFIG_RAM_VSTART=0x00000000 +CONFIG_RAM_SIZE=33554432 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NTOSD_DM320=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ntosd-dm320" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +# CONFIG_ARCH_LEDS is not set +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=9 +CONFIG_START_DAY=12 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +CONFIG_NET_DM90x0=y +CONFIG_DM9X_BASE=0xd0000300 +CONFIG_DM9X_IRQ=27 +# CONFIG_DM9X_BUSWIDTH8 is not set +CONFIG_DM9X_BUSWIDTH16=y +# CONFIG_DM9X_BUSWIDTH32 is not set +# CONFIG_DM9X_CHECKSUM is not set +# CONFIG_DM9X_ETRANS is not set +CONFIG_DM9X_MODE_AUTO=y +# CONFIG_DM9X_MODE_10MHD is not set +# CONFIG_DM9X_MODE_10MFD is not set +# CONFIG_DM9X_MODE_100MHD is not set +# CONFIG_DM9X_MODE_100MFD is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_UART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=0 +CONFIG_NSH_ROMFSSECTSIZE=64 +CONFIG_NSH_DEFAULTROMFS=y +# CONFIG_NSH_ARCHROMFS is not set +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=1 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ntosd-dm320/nsh/ld.script b/configs/ntosd-dm320/nsh/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..6155a1429548555689a2de618a5e1b3bda501d18 --- /dev/null +++ b/configs/ntosd-dm320/nsh/ld.script @@ -0,0 +1,85 @@ +/**************************************************************************** + * configs/ntosd-dm320/nsh/ld.script + * + * Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + /* The OS entry point is here */ + + . = 0x00008000; + .text : { + _stext = ABSOLUTE(.); + *(.text) + *(.fixup) + *(.gnu.warning) + *(.rodata) + *(.glue_7) + *(.glue_7t) + *(.got) /* Global offset table */ + _etext = ABSOLUTE(.); + } + + _eronly = ABSOLUTE(.); + . = ALIGN(4096); + + .data : { + _sdata = ABSOLUTE(.); + *(.data) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss) + *(COMMON) + _ebss = ABSOLUTE(.); + } + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/ntosd-dm320/nsh/setenv.sh b/configs/ntosd-dm320/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..5bc5f24ff6e01a6314e0d08d53625c28cbb92487 --- /dev/null +++ b/configs/ntosd-dm320/nsh/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/ntosd-dm320/nsh/setenv.sh +# +# Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/ntosd-dm320/poll/Make.defs b/configs/ntosd-dm320/poll/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e5f93d927836b064a72970ae78bdf71b87d2201b --- /dev/null +++ b/configs/ntosd-dm320/poll/Make.defs @@ -0,0 +1,123 @@ +############################################################################ +# configs/ntosd-dm320/poll/Make.defs +# +# Copyright (C) 2007-2008, 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/poll/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/poll/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mtune=arm9tdmi -march=armv5te -mfloat-abi=soft -fno-builtin +else + ARCHCPUFLAGS = -mapcs-32 -mtune=arm9tdmi -march=armv5te -msoft-float -fno-builtin +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARM_TOOLCHAIN_BUILDROOT),y) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/ntosd-dm320/poll/defconfig b/configs/ntosd-dm320/poll/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..cd4a2b6caf489937e6c907c9a8bf1a8bc47fc6a1 --- /dev/null +++ b/configs/ntosd-dm320/poll/defconfig @@ -0,0 +1,783 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +CONFIG_ARCH_CHIP_DM320=y +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +CONFIG_ARCH_ARM926EJS=y +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="dm320" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARM_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set + +# +# DM320 Configuration Options +# + +# +# DM320 Peripheral Selections +# +CONFIG_DM320_UART0=y +CONFIG_DM320_UART1=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_PAGING is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16945 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x01100000 +CONFIG_RAM_VSTART=0x00000000 +CONFIG_RAM_SIZE=33554432 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NTOSD_DM320=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ntosd-dm320" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +# CONFIG_ARCH_LEDS is not set + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=19 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="poll_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +CONFIG_NET_DM90x0=y +CONFIG_DM9X_BASE=0xd0000300 +CONFIG_DM9X_IRQ=27 +# CONFIG_DM9X_BUSWIDTH8 is not set +CONFIG_DM9X_BUSWIDTH16=y +# CONFIG_DM9X_BUSWIDTH32 is not set +# CONFIG_DM9X_CHECKSUM is not set +# CONFIG_DM9X_ETRANS is not set +CONFIG_DM9X_MODE_AUTO=y +# CONFIG_DM9X_MODE_10MHD is not set +# CONFIG_DM9X_MODE_10MFD is not set +# CONFIG_DM9X_MODE_100MHD is not set +# CONFIG_DM9X_MODE_100MFD is not set +# CONFIG_DM9X_STATS is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +CONFIG_EXAMPLES_POLL=y +# CONFIG_EXAMPLES_POLL_NOMAC is not set +CONFIG_EXAMPLES_POLL_IPADDR=0x0a000002 +CONFIG_EXAMPLES_POLL_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_POLL_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ntosd-dm320/poll/ld.script b/configs/ntosd-dm320/poll/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..f8bdf223b05db93362cb1a59c021094ffdbc5092 --- /dev/null +++ b/configs/ntosd-dm320/poll/ld.script @@ -0,0 +1,85 @@ +/**************************************************************************** + * configs/ntosd-dm320/poll/ld.script + * + * Copyright (C) 2008, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + /* The OS entry point is here */ + + . = 0x00008000; + .text : { + _stext = ABSOLUTE(.); + *(.text) + *(.fixup) + *(.gnu.warning) + *(.rodata) + *(.glue_7) + *(.glue_7t) + *(.got) /* Global offset table */ + _etext = ABSOLUTE(.); + } + + _eronly = ABSOLUTE(.); + . = ALIGN(4096); + + .data : { + _sdata = ABSOLUTE(.); + *(.data) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss) + *(COMMON) + _ebss = ABSOLUTE(.); + } + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/ntosd-dm320/poll/setenv.sh b/configs/ntosd-dm320/poll/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..844983c75fe37c581cd4b4aa57225d27340394e5 --- /dev/null +++ b/configs/ntosd-dm320/poll/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/ntosd-dm320/poll/setenv.sh +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/ntosd-dm320/src/.gitignore b/configs/ntosd-dm320/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/ntosd-dm320/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/ntosd-dm320/src/Makefile b/configs/ntosd-dm320/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..9c09281a2c6423353df548fda303264d2e87d790 --- /dev/null +++ b/configs/ntosd-dm320/src/Makefile @@ -0,0 +1,41 @@ +############################################################################ +# configs/ntosd-dm320/src/Makefile +# +# Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = dm320_leds.c dm320_network.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/ntosd-dm320/src/dm320_leds.c b/configs/ntosd-dm320/src/dm320_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..40858e00d10bb97c6d9fc717968e52dcd379debc --- /dev/null +++ b/configs/ntosd-dm320/src/dm320_leds.c @@ -0,0 +1,106 @@ +/**************************************************************************** + * confgs/ntosd-dm320/src/dm320_leds.c + * + * Copyright (C) 2007, 2009, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "up_internal.h" +#include "chip.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Funtions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + GIO_OUTPUT(GIO_LED_GREEN); + GIO_OUTPUT(GIO_LED_RED); + GIO_SET_OUTPUT(GIO_LED_GREEN); + GIO_CLEAR_OUTPUT(GIO_LED_RED); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led == GIO_LED_GREEN) + { + GIO_SET_OUTPUT(GIO_LED_GREEN); + } + else if (led == GIO_LED_RED) + { + GIO_SET_OUTPUT(GIO_LED_RED); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == GIO_LED_GREEN) + { + GIO_CLEAR_OUTPUT(GIO_LED_GREEN); + } + else if (led == GIO_LED_RED) + { + GIO_CLEAR_OUTPUT(GIO_LED_RED); + } +} +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/ntosd-dm320/src/dm320_network.c b/configs/ntosd-dm320/src/dm320_network.c new file mode 100644 index 0000000000000000000000000000000000000000..5edeb32f3907ebe64eec355d738c1b58c10b9334 --- /dev/null +++ b/configs/ntosd-dm320/src/dm320_network.c @@ -0,0 +1,103 @@ +/**************************************************************************** + * configs/ntosd-dm320/src/dm320_network.c + * + * Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#if defined(CONFIG_NET) && defined(CONFIG_NET_DM90x0) + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "dm320_memorymap.h" +#include "dm320_emif.h" +#include "dm320_gio.h" + +extern void dm9x_initialize(void); + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_netinitialize + ****************************************************************************/ + +void up_netinitialize(void) +{ + /* CS4 is used for DM9000A Ethernet. Interrupt is provided via GIO6 + * which must be configured to interrupt on the rising edge. Bus + * width is 16-bits. + */ + + nlldbg("CS4CTRL1=%04x CS4CTRL2=%04x\n", + getreg16(DM320_EMIF_CS4CTRL1), getreg16(DM320_EMIF_CS4CTRL2)); + + /* It is assumed that bootloader has already configured CS4. Here, + * we will only make certain that the GIO is properly configured + */ + + GIO_INPUT(GIO_DM9000A_INT); + GIO_NONINVERTED(GIO_DM9000A_INT); + GIO_INTERRUPT(GIO_DM9000A_INT); + GIO_RISINGEDGE(GIO_DM9000A_INT); + + nlldbg("GIO DIR0=%04x INV0=%04x IRQPORT=%04x IRQEDGE=%04x\n", + getreg16(DM320_GIO_DIR0), getreg16(DM320_GIO_INV0), + getreg16(DM320_GIO_IRQPORT), getreg16(DM320_GIO_IRQEDGE)); + + /* Then initialize the driver */ + + dm9x_initialize(); +} + +#endif /* CONFIG_NET && CONFIG_NET_DM90x0 */ diff --git a/configs/ntosd-dm320/thttpd/Make.defs b/configs/ntosd-dm320/thttpd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..a251e628852573a7a7500a068a6cca22d2581b6b --- /dev/null +++ b/configs/ntosd-dm320/thttpd/Make.defs @@ -0,0 +1,123 @@ +############################################################################ +# configs/ntosd-dm320/thttpd/Make.defs +# +# Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/thttpd/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/thttpd/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mtune=arm9tdmi -march=armv5te -mfloat-abi=soft -fno-builtin +else + ARCHCPUFLAGS = -mapcs-32 -mtune=arm9tdmi -march=armv5te -msoft-float -fno-builtin +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARM_TOOLCHAIN_BUILDROOT),y) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/ntosd-dm320/thttpd/defconfig b/configs/ntosd-dm320/thttpd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..beca63893fd05b801c69f7866be4d0739a9b5705 --- /dev/null +++ b/configs/ntosd-dm320/thttpd/defconfig @@ -0,0 +1,818 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +CONFIG_ARCH_CHIP_DM320=y +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +CONFIG_ARCH_ARM926EJS=y +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="dm320" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARM_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set + +# +# DM320 Configuration Options +# + +# +# DM320 Peripheral Selections +# +CONFIG_DM320_UART0=y +CONFIG_DM320_UART1=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_PAGING is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16945 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x01100000 +CONFIG_RAM_VSTART=0x00000000 +CONFIG_RAM_SIZE=33554432 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NTOSD_DM320=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ntosd-dm320" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +# CONFIG_ARCH_LEDS is not set + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=8 +CONFIG_START_DAY=2 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="thttp_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +CONFIG_NET_DM90x0=y +CONFIG_DM9X_BASE=0xd0000300 +CONFIG_DM9X_IRQ=27 +# CONFIG_DM9X_BUSWIDTH8 is not set +CONFIG_DM9X_BUSWIDTH16=y +# CONFIG_DM9X_BUSWIDTH32 is not set +# CONFIG_DM9X_CHECKSUM is not set +# CONFIG_DM9X_ETRANS is not set +CONFIG_DM9X_MODE_AUTO=y +# CONFIG_DM9X_MODE_10MHD is not set +# CONFIG_DM9X_MODE_10MFD is not set +# CONFIG_DM9X_MODE_100MHD is not set +# CONFIG_DM9X_MODE_100MFD is not set +# CONFIG_DM9X_STATS is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +CONFIG_NXFLAT=y +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +CONFIG_PIC=y +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +CONFIG_EXAMPLES_THTTPD=y +# CONFIG_EXAMPLES_THTTPD_NOMAC is not set +CONFIG_EXAMPLES_THTTPD_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_THTTPD=y +CONFIG_THTTPD_PORT=80 +CONFIG_THTTPD_IPADDR=0x0a000002 +CONFIG_THTTPD_SERVER_ADDRESS="http://www.nuttx.org" +CONFIG_THTTPD_SERVER_SOFTWARE="thttpd/2.25b 29dec2003-NuttX" +CONFIG_THTTPD_NXFLAT=y +CONFIG_THTTPD_PATH="/mnt/www" +CONFIG_THTTPD_CGI_PATH="/mnt/www/cgi-bin" +CONFIG_THTTPD_CGI_PATTERN="/mnt/www/cgi-bin/*" +CONFIG_THTTPD_CGI_PRIORITY=50 +CONFIG_THTTPD_CGI_STACKSIZE=1024 +CONFIG_THTTPD_CGI_BYTECOUNT=20000 +CONFIG_THTTPD_CGI_TIMELIMIT=0 +CONFIG_THTTPD_CHARSET="iso-8859-1" +CONFIG_THTTPD_IOBUFFERSIZE=256 +CONFIG_THTTPD_MINSTRSIZE=64 +CONFIG_THTTPD_REALLOCINCR=64 +CONFIG_THTTPD_MAXREALLOC=4096 +CONFIG_THTTPD_CGIINBUFFERSIZ=512 +CONFIG_THTTPD_CGIOUTBUFFERSIZE=512 +CONFIG_THTTPD_INDEX_NAMES="\"index.html\", \"index.htm\", \"index.cgi\"" +# CONFIG_THTTPD_USE_AUTH_FILE is not set +CONFIG_THTTPD_LISTEN_BACKLOG=8 +CONFIG_THTTPD_LINGER_MSEC=500 +CONFIG_THTTPD_OCCASIONAL_MSEC=120 +CONFIG_THTTPD_IDLE_READ_LIMIT_SEC=300 +CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300 +# CONFIG_THTTPD_USE_TILDE_MAP1 is not set +# CONFIG_THTTPD_USE_TILDE_MAP2 is not set +CONFIG_THTTPD_TILDE_MAP_NONE=y +# CONFIG_THTTPD_GENERATE_INDICES is not set +# CONFIG_THTTPD_USE_URLPATTERN is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ntosd-dm320/thttpd/ld.script b/configs/ntosd-dm320/thttpd/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..63199aa5a25a006bd6472dbac331df1cc2f6f894 --- /dev/null +++ b/configs/ntosd-dm320/thttpd/ld.script @@ -0,0 +1,85 @@ +/**************************************************************************** + * configs/ntosd-dm320/thttpd/ld.script + * + * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + /* The OS entry point is here */ + + . = 0x00008000; + .text : { + _stext = ABSOLUTE(.); + *(.text) + *(.fixup) + *(.gnu.warning) + *(.rodata) + *(.glue_7) + *(.glue_7t) + *(.got) /* Global offset table */ + _etext = ABSOLUTE(.); + } + + _eronly = ABSOLUTE(.); + . = ALIGN(4096); + + .data : { + _sdata = ABSOLUTE(.); + *(.data) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss) + *(COMMON) + _ebss = ABSOLUTE(.); + } + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/ntosd-dm320/thttpd/setenv.sh b/configs/ntosd-dm320/thttpd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..a93654aeab7fcad3b14cf54e763f952ad828ac7a --- /dev/null +++ b/configs/ntosd-dm320/thttpd/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/ntosd-dm320/thttpd/setenv.sh +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/ntosd-dm320/udp/Make.defs b/configs/ntosd-dm320/udp/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..1cac1699e76964ecfe1a6e5e8591dddf006eba8a --- /dev/null +++ b/configs/ntosd-dm320/udp/Make.defs @@ -0,0 +1,123 @@ +############################################################################ +# configs/ntosd-dm320/udp/Make.defs +# +# Copyright (C) 2007-2008, 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/udp/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/udp/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mtune=arm9tdmi -march=armv5te -mfloat-abi=soft -fno-builtin +else + ARCHCPUFLAGS = -mapcs-32 -mtune=arm9tdmi -march=armv5te -msoft-float -fno-builtin +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARM_TOOLCHAIN_BUILDROOT),y) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/ntosd-dm320/udp/defconfig b/configs/ntosd-dm320/udp/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..aaf9d91370c0093ce15c3f2ce0726910b42c2464 --- /dev/null +++ b/configs/ntosd-dm320/udp/defconfig @@ -0,0 +1,820 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +CONFIG_ARCH_CHIP_DM320=y +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +CONFIG_ARCH_ARM926EJS=y +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="dm320" +# CONFIG_ARCH_HAVE_FPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARM_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set + +# +# DM320 Configuration Options +# + +# +# DM320 Peripheral Selections +# +CONFIG_DM320_UART0=y +CONFIG_DM320_UART1=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_PAGING is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16945 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x01100000 +CONFIG_RAM_VSTART=0x00000000 +CONFIG_RAM_SIZE=33554432 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NTOSD_DM320=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ntosd-dm320" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +# CONFIG_ARCH_LEDS is not set + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=8 +CONFIG_START_DAY=29 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="udp_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +CONFIG_NET_DM90x0=y +CONFIG_DM9X_BASE=0xd0000300 +CONFIG_DM9X_IRQ=27 +# CONFIG_DM9X_BUSWIDTH8 is not set +CONFIG_DM9X_BUSWIDTH16=y +# CONFIG_DM9X_BUSWIDTH32 is not set +# CONFIG_DM9X_CHECKSUM is not set +# CONFIG_DM9X_ETRANS is not set +CONFIG_DM9X_MODE_AUTO=y +# CONFIG_DM9X_MODE_10MHD is not set +# CONFIG_DM9X_MODE_10MFD is not set +# CONFIG_DM9X_MODE_100MHD is not set +# CONFIG_DM9X_MODE_100MFD is not set +# CONFIG_DM9X_STATS is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +CONFIG_NET_IPv4=y +# CONFIG_NET_MULTIBUFFER is not set +# CONFIG_NET_PROMISCUOUS is not set +CONFIG_NET_ETH_MTU=562 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# TCP/IP Networking +# +# CONFIG_NET_TCP is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +# CONFIG_NET_IOB is not set +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_ETHERNET=y + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +CONFIG_EXAMPLES_UDP=y +# CONFIG_EXAMPLES_UDP_SERVER is not set +CONFIG_EXAMPLES_UDP_IPADDR=0x0a000002 +CONFIG_EXAMPLES_UDP_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_UDP_NETMASK=0xffffff00 +CONFIG_EXAMPLES_UDP_SERVERIP=0x0a000001 +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ntosd-dm320/udp/ld.script b/configs/ntosd-dm320/udp/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..89dd8f823f7708cc34a0716eb54a209d75f4ec78 --- /dev/null +++ b/configs/ntosd-dm320/udp/ld.script @@ -0,0 +1,85 @@ +/**************************************************************************** + * configs/ntosd-dm320/udp/ld.script + * + * Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + /* The OS entry point is here */ + + . = 0x00008000; + .text : { + _stext = ABSOLUTE(.); + *(.text) + *(.fixup) + *(.gnu.warning) + *(.rodata) + *(.glue_7) + *(.glue_7t) + *(.got) /* Global offset table */ + _etext = ABSOLUTE(.); + } + + _eronly = ABSOLUTE(.); + . = ALIGN(4096); + + .data : { + _sdata = ABSOLUTE(.); + *(.data) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss) + *(COMMON) + _ebss = ABSOLUTE(.); + } + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/ntosd-dm320/udp/setenv.sh b/configs/ntosd-dm320/udp/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..53c94895d1c4c6f2fbd5a331273dffa4a399370e --- /dev/null +++ b/configs/ntosd-dm320/udp/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/ntosd-dm320/udp/setenv.sh +# +# Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/ntosd-dm320/webserver/Make.defs b/configs/ntosd-dm320/webserver/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..21f5c71070c8457f036de9a862466285cde8c472 --- /dev/null +++ b/configs/ntosd-dm320/webserver/Make.defs @@ -0,0 +1,123 @@ +############################################################################ +# configs/ntosd-dm320/webserver/Make.defs +# +# Copyright (C) 2007-2008, 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/webserver/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/webserver/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mtune=arm9tdmi -march=armv5te -mfloat-abi=soft -fno-builtin +else + ARCHCPUFLAGS = -mapcs-32 -mtune=arm9tdmi -march=armv5te -msoft-float -fno-builtin +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARM_TOOLCHAIN_BUILDROOT),y) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/ntosd-dm320/webserver/defconfig b/configs/ntosd-dm320/webserver/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..1ddee5d559920831474744c938ef0a0933193626 --- /dev/null +++ b/configs/ntosd-dm320/webserver/defconfig @@ -0,0 +1,798 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +# CONFIG_WINDOWS_CYGWIN is not set +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +CONFIG_ARCH_CHIP_DM320=y +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +CONFIG_ARCH_ARM926EJS=y +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="dm320" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARM_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARM_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set + +# +# DM320 Configuration Options +# + +# +# DM320 Peripheral Selections +# +CONFIG_DM320_UART0=y +CONFIG_DM320_UART1=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_PAGING is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16945 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x01100000 +CONFIG_RAM_VSTART=0x00000000 +CONFIG_RAM_SIZE=33554432 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NTOSD_DM320=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ntosd-dm320" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +# CONFIG_ARCH_LEDS is not set + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=8 +CONFIG_START_DAY=29 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="webserver_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +CONFIG_NET_DM90x0=y +CONFIG_DM9X_BASE=0xd0000300 +CONFIG_DM9X_IRQ=27 +# CONFIG_DM9X_BUSWIDTH8 is not set +CONFIG_DM9X_BUSWIDTH16=y +# CONFIG_DM9X_BUSWIDTH32 is not set +# CONFIG_DM9X_CHECKSUM is not set +# CONFIG_DM9X_ETRANS is not set +CONFIG_DM9X_MODE_AUTO=y +# CONFIG_DM9X_MODE_10MHD is not set +# CONFIG_DM9X_MODE_10MFD is not set +# CONFIG_DM9X_MODE_100MHD is not set +# CONFIG_DM9X_MODE_100MFD is not set +# CONFIG_DM9X_STATS is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +CONFIG_EXAMPLES_WEBSERVER=y +CONFIG_EXAMPLES_WEBSERVER_IPADDR=0x0a000002 +CONFIG_EXAMPLES_WEBSERVER_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_WEBSERVER_NETMASK=0xffffff00 +CONFIG_EXAMPLES_WEBSERVER_NOMAC=y +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +CONFIG_NETUTILS_WEBSERVER=y +# CONFIG_NETUTILS_HTTPD_SINGLECONNECT is not set +# CONFIG_NETUTILS_HTTPD_SCRIPT_DISABLE is not set +CONFIG_NETUTILS_HTTPD_MAXPATH=64 +# CONFIG_NETUTILS_HTTPD_CGIPATH is not set +CONFIG_NETUTILS_HTTPD_ERRPATH="" +# CONFIG_NETUTILS_HTTPD_SERVERHEADER_DISABLE is not set +CONFIG_NETUTILS_HTTPD_TIMEOUT=0 +CONFIG_NETUTILS_HTTPD_CLASSIC=y +# CONFIG_NETUTILS_HTTPD_MMAP is not set +# CONFIG_NETUTILS_HTTPD_SENDFILE is not set +CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ntosd-dm320/webserver/ld.script b/configs/ntosd-dm320/webserver/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..38ad421744436f65aa2d2c9c497eca7bf4bc2dde --- /dev/null +++ b/configs/ntosd-dm320/webserver/ld.script @@ -0,0 +1,85 @@ +/**************************************************************************** + * configs/ntosd-dm320/webserver/ld.script + * + * Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + /* The OS entry point is here */ + + . = 0x00008000; + .text : { + _stext = ABSOLUTE(.); + *(.text) + *(.fixup) + *(.gnu.warning) + *(.rodata) + *(.glue_7) + *(.glue_7t) + *(.got) /* Global offset table */ + _etext = ABSOLUTE(.); + } + + _eronly = ABSOLUTE(.); + . = ALIGN(4096); + + .data : { + _sdata = ABSOLUTE(.); + *(.data) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss) + *(COMMON) + _ebss = ABSOLUTE(.); + } + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/ntosd-dm320/webserver/setenv.sh b/configs/ntosd-dm320/webserver/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..07374f60b6226d7f918dcc26929a97430b9f1934 --- /dev/null +++ b/configs/ntosd-dm320/webserver/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/ntosd-dm320/webserver/setenv.sh +# +# Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/nucleo-f303re/Kconfig b/configs/nucleo-f303re/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..22555e64efd479f36e0516c1de5d51ecbde09b7b --- /dev/null +++ b/configs/nucleo-f303re/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_NUCLEO_F303RE + +endif diff --git a/configs/nucleo-f303re/adc/Make.defs b/configs/nucleo-f303re/adc/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..2b8c2b19e5e2de45de05a59e13926ce5665a6aa8 --- /dev/null +++ b/configs/nucleo-f303re/adc/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/nucleo-f303re/adc/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/nucleo-f303re/adc/defconfig b/configs/nucleo-f303re/adc/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..5932a9fe6fb6fa7f847b13f0fe3df174041f53ec --- /dev/null +++ b/configs/nucleo-f303re/adc/defconfig @@ -0,0 +1,954 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +CONFIG_ARCH_CHIP_STM32F303RE=y +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +CONFIG_STM32_STM32F30XX=y +# CONFIG_STM32_STM32F302 is not set +CONFIG_STM32_STM32F303=y +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +CONFIG_STM32_HAVE_TIM15=y +CONFIG_STM32_HAVE_TIM16=y +CONFIG_STM32_HAVE_TIM17=y +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +CONFIG_STM32_HAVE_ADC4=y +CONFIG_STM32_HAVE_ADC1_DMA=y +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +CONFIG_STM32_HAVE_SPI4=y +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +CONFIG_STM32_ADC1=y +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_ADC4 is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_SPI4 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM15 is not set +# CONFIG_STM32_TIM16 is not set +# CONFIG_STM32_TIM17 is not set +# CONFIG_STM32_TSC is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_ADC=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +CONFIG_STM32_CCMEXCLUDE=y +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set + +# +# ADC Configuration +# +CONFIG_STM32_ADC1_DMA=y +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=6522 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NUCLEO_F303RE=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleo-f303re" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +CONFIG_BOARDCTL_ADCTEST=y +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="adc_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +CONFIG_ANALOG=y +CONFIG_ADC=y +CONFIG_ADC_FIFOSIZE=8 +# CONFIG_ADC_NO_STARTUP_CONV is not set +# CONFIG_ADC_ADS1242 is not set +# CONFIG_ADC_ADS125X is not set +# CONFIG_ADC_PGA11X is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +# CONFIG_SERIAL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_ADC=y +CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0" +CONFIG_EXAMPLES_ADC_NSAMPLES=0 +CONFIG_EXAMPLES_ADC_GROUPSIZE=4 +CONFIG_EXAMPLES_ADC_SWTRIG=y +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-f303re/can/Make.defs b/configs/nucleo-f303re/can/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..ddfedd784105796f2366c483ab4b4893d9370537 --- /dev/null +++ b/configs/nucleo-f303re/can/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/nucleo-f303re/can/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/nucleo-f303re/can/defconfig b/configs/nucleo-f303re/can/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..df3f7c0a93379b1b47deca5b763cfd4276914226 --- /dev/null +++ b/configs/nucleo-f303re/can/defconfig @@ -0,0 +1,956 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_CAN_EXTID is not set +CONFIG_CAN1_BAUD=250000 +CONFIG_CAN_TSEG1=6 +CONFIG_CAN_TSEG2=7 +# CONFIG_CAN_LOOPBACK is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +CONFIG_ARCH_CHIP_STM32F303RE=y +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +CONFIG_STM32_STM32F30XX=y +# CONFIG_STM32_STM32F302 is not set +CONFIG_STM32_STM32F303=y +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +CONFIG_STM32_HAVE_TIM15=y +CONFIG_STM32_HAVE_TIM16=y +CONFIG_STM32_HAVE_TIM17=y +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +CONFIG_STM32_HAVE_ADC4=y +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +CONFIG_STM32_HAVE_SPI4=y +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_ADC4 is not set +CONFIG_STM32_CAN1=y +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_SPI4 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM15 is not set +# CONFIG_STM32_TIM16 is not set +# CONFIG_STM32_TIM17 is not set +# CONFIG_STM32_TSC is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_CAN=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# CAN driver configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=6522 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NUCLEO_F303RE=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleo-f303re" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +CONFIG_BOARDCTL_CANINIT=y +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="can_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +CONFIG_CAN=y +# CONFIG_ARCH_HAVE_CAN_ERRORS is not set +# CONFIG_CAN_FD is not set +CONFIG_CAN_FIFOSIZE=8 +CONFIG_CAN_NPENDINGRTR=4 +# CONFIG_CAN_TXREADY is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +# CONFIG_SERIAL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +CONFIG_EXAMPLES_CAN=y +CONFIG_EXAMPLES_CAN_DEVPATH="/dev/can0" +# CONFIG_EXAMPLES_CAN_READ is not set +# CONFIG_EXAMPLES_CAN_WRITE is not set +CONFIG_EXAMPLES_CAN_READWRITE=y +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-f303re/include/board.h b/configs/nucleo-f303re/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..c645b46b8082d332416a9eb0d7e000b4d17638aa --- /dev/null +++ b/configs/nucleo-f303re/include/board.h @@ -0,0 +1,300 @@ +/**************************************************************************** + * configs/nucleo-f303re/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIG_STM32F3DISCOVERY_INCLUDE_BOARD_H +#define __CONFIG_STM32F3DISCOVERY_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# include +#endif + +#ifdef __KERNEL__ +# include "stm32.h" +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* HSI - Internal 8 MHz RC Oscillator + * LSI - 32 KHz RC + * HSE - On-board crystal frequency is 8MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 8000000ul /* X1 on board */ + +#define STM32_HSI_FREQUENCY 8000000ul +#define STM32_LSI_FREQUENCY 40000 /* Between 30kHz and 60kHz */ +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 /* X2 on board */ + +/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */ + +#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC +#define STM32_CFGR_PLLXTPRE 0 +#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx9 +#define STM32_PLL_FREQUENCY (9*STM32_BOARD_XTAL) + +/* Use the PLL and set the SYSCLK source to be the PLL */ + +#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL +#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY + +/* AHB clock (HCLK) is SYSCLK (72MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (72MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */ + +/* APB2 timers 1 and 8 will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) + +#define STM32_APB1_TIM15_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB1_TIM16_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB1_TIM17_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* APB1 timers 2-4 will be twice PCLK1 (REVISIT) */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* USB divider -- Divide PLL clock by 1.5 */ + +#define STM32_CFGR_USBPRE 0 + +/* Timers driven from APB1 will be twice PCLK1 */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 */ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* LED definitions **********************************************************/ +/* The Nucleo F303RE board has three LEDs. Two of these are controlled by + * logic on the board and are not available for software control: + * + * LD1 COM: LD1 default status is red. LD1 turns to green to indicate that + * communications are in progress between the PC and the + * ST-LINK/V2-1. + * LD3 PWR: red LED indicates that the board is powered. + * + * And one can be controlled by software: + * + * User LD2: green LED is a user LED connected to the I/O PA5 of the + * STM32F303RET6. + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LED in + * any way. The following definition is used to access the LED. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 /* User LD2 */ +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board + * the Nucleo F303RE. The following definitions describe how NuttX controls + * the LED: + * + * SYMBOL Meaning LED1 state + * ------------------ ----------------------- ---------- + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt No change + * LED_SIGNAL In a signal handler No change + * LED_ASSERTION An assertion failed No change + * LED_PANIC The system has crashed Blinking + * LED_IDLE STM32 is is sleep mode Not used + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 0 +#define LED_IRQSENABLED 0 +#define LED_STACKCREATED 1 +#define LED_INIRQ 2 +#define LED_SIGNAL 2 +#define LED_ASSERTION 2 +#define LED_PANIC 1 + +/* Button definitions *******************************************************/ +/* The Nucleo F303RE supports two buttons; only one button is controllable + * by software: + * + * B1 USER: user button connected to the I/O PC13 of the STM32F303RET6. + * B2 RESET: push button connected to NRST is used to RESET the + * STM32F303RET6. + */ + +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 + +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* Alternate function pin selections ****************************************/ +/* CAN */ + +#define GPIO_CAN1_RX GPIO_CAN_RX_2 +#define GPIO_CAN1_TX GPIO_CAN_TX_2 + +/* I2C */ + +#define GPIO_I2C1_SCL GPIO_I2C1_SCL_3 +#define GPIO_I2C1_SDA GPIO_I2C1_SDA_3 + +/* SPI */ + +#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 +#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 +#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 + +/* TIM */ + +#define GPIO_TIM2_CH2OUT GPIO_TIM2_CH2OUT_2 +#define GPIO_TIM2_CH3OUT GPIO_TIM2_CH3OUT_3 + +#define GPIO_TIM3_CH1OUT GPIO_TIM3_CH1OUT_2 +#define GPIO_TIM3_CH2OUT GPIO_TIM3_CH2OUT_4 + +#define GPIO_TIM4_CH1OUT GPIO_TIM4_CH1OUT_2 + +/* USART */ + +#define GPIO_USART2_RX GPIO_USART2_RX_2 +#define GPIO_USART2_TX GPIO_USART2_TX_2 + +/* DMA channels *************************************************************/ +/* ADC */ + +#define ADC1_DMA_CHAN DMACHAN_ADC1 +#define ADC2_DMA_CHAN DMACHAN_ADC2_1 +#define ADC3_DMA_CHAN DMACHAN_ADC3 +#define ADC4_DMA_CHAN DMACHAN_ADC4_1 + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#ifdef __cplusplus +extern "C" +{ +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This + * entry point is called early in the initialization -- after all memory + * has been configured and mapped but before any devices have been + * initialized. + * + ****************************************************************************/ + +void stm32_boardinitialize(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIG_NUCLEO_F303RE_INCLUDE_BOARD_H */ diff --git a/configs/nucleo-f303re/nxlines/Make.defs b/configs/nucleo-f303re/nxlines/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..5364ea4d45192c2bbed47aa2aa412ee65a16a055 --- /dev/null +++ b/configs/nucleo-f303re/nxlines/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/nucleo-f303re/nxlines/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/nucleo-f303re/nxlines/defconfig b/configs/nucleo-f303re/nxlines/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ddcbc7c5d3c6dccf4978476ef7f3800e70cbd03d --- /dev/null +++ b/configs/nucleo-f303re/nxlines/defconfig @@ -0,0 +1,1115 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_CAN_EXTID is not set +# CONFIG_CAN_LOOPBACK is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +CONFIG_ARCH_CHIP_STM32F303RE=y +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +CONFIG_STM32_STM32F30XX=y +# CONFIG_STM32_STM32F302 is not set +CONFIG_STM32_STM32F303=y +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +CONFIG_STM32_HAVE_TIM15=y +CONFIG_STM32_HAVE_TIM16=y +CONFIG_STM32_HAVE_TIM17=y +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +CONFIG_STM32_HAVE_ADC4=y +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +CONFIG_STM32_HAVE_SPI4=y +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_ADC4 is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_SPI4 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM15 is not set +# CONFIG_STM32_TIM16 is not set +# CONFIG_STM32_TIM17 is not set +# CONFIG_STM32_TSC is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=6522 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NUCLEO_F303RE=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleo-f303re" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_CANINIT is not set +CONFIG_BOARDCTL_GRAPHICS=y +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxlines_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +CONFIG_CAN=y +# CONFIG_ARCH_HAVE_CAN_ERRORS is not set +# CONFIG_CAN_FD is not set +CONFIG_CAN_FIFOSIZE=8 +CONFIG_CAN_NPENDINGRTR=4 +# CONFIG_CAN_TXREADY is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +CONFIG_SPI_CMDDATA=y +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +CONFIG_LCD_SSD1351=y +# CONFIG_SSD1351_PARALLEL8BIT is not set +# CONFIG_SSD1351_SPI3WIRE is not set +CONFIG_SSD1351_SPI4WIRE=y +CONFIG_SSD1351_SPIMODE=0 +CONFIG_SSD1351_SPIFREQ=1000000 +CONFIG_SSD1351_NINTERFACES=1 +CONFIG_SSD1351_XRES=128 +CONFIG_SSD1351_YRES=128 +# CONFIG_SSD1351_MIRRORX is not set +# CONFIG_SSD1351_MIRRORY is not set +# CONFIG_SSD1351_INVERT is not set +# CONFIG_SSD1351_VDDEXT is not set +CONFIG_SSD1351_TRST=5 +CONFIG_SSD1351_TPRECHG1=8 +# CONFIG_SSD1351_PERFENHANCE is not set +CONFIG_SSD1351_CLKDIV=0 +CONFIG_SSD1351_OSCFREQ=15 +CONFIG_SSD1351_TPRECHG2=8 +CONFIG_SSD1351_VPRECHG=50 +CONFIG_SSD1351_VCOMH=82 +CONFIG_SSD1351_CONTRASTA=138 +CONFIG_SSD1351_CONTRASTB=81 +CONFIG_SSD1351_CONTRASTC=138 +CONFIG_SSD1351_MSTRCONTRAST=16 +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +# CONFIG_SERIAL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +CONFIG_RAMLOG=y +CONFIG_RAMLOG_SYSLOG=y +CONFIG_RAMLOG_BUFSIZE=1024 +# CONFIG_RAMLOG_CRLF is not set +CONFIG_RAMLOG_NONBLOCKING=y + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_CHAR is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +CONFIG_NX_XYINPUT_NONE=y +# CONFIG_NX_XYINPUT_MOUSE is not set +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +# CONFIG_NX_KBD is not set + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +CONFIG_NXFONT_MONO5X8=y +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +CONFIG_EXAMPLES_NXLINES=y +CONFIG_EXAMPLES_NXLINES_VPLANE=0 +CONFIG_EXAMPLES_NXLINES_DEVNO=0 +CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16 +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=16 +CONFIG_EXAMPLES_NXLINES_BPP=8 +CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-f303re/pwm/Make.defs b/configs/nucleo-f303re/pwm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..4149c69beac17968a4b0d4ed4dd30f683300ab6d --- /dev/null +++ b/configs/nucleo-f303re/pwm/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/nucleo-f303re/pwm/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/nucleo-f303re/pwm/defconfig b/configs/nucleo-f303re/pwm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..af0ecd9cbc99a8a45914871ad64d6343447c4edc --- /dev/null +++ b/configs/nucleo-f303re/pwm/defconfig @@ -0,0 +1,1061 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +CONFIG_ARCH_CHIP_STM32F303RE=y +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +CONFIG_STM32_STM32F30XX=y +# CONFIG_STM32_STM32F302 is not set +CONFIG_STM32_STM32F303=y +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +CONFIG_STM32_HAVE_TIM15=y +CONFIG_STM32_HAVE_TIM16=y +CONFIG_STM32_HAVE_TIM17=y +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +CONFIG_STM32_HAVE_ADC4=y +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +CONFIG_STM32_HAVE_SPI4=y +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_ADC4 is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_SPI4 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +CONFIG_STM32_TIM3=y +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM15 is not set +# CONFIG_STM32_TIM16 is not set +# CONFIG_STM32_TIM17 is not set +# CONFIG_STM32_TSC is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +CONFIG_STM32_TIM3_PWM=y +CONFIG_STM32_TIM3_MODE=0 +CONFIG_STM32_TIM3_CHANNEL1=y +CONFIG_STM32_TIM3_CH1MODE=0 +CONFIG_STM32_TIM3_CH1OUT=y +CONFIG_STM32_TIM3_CHANNEL2=y +CONFIG_STM32_TIM3_CH2MODE=0 +CONFIG_STM32_TIM3_CH2OUT=y +# CONFIG_STM32_TIM3_CHANNEL3 is not set +# CONFIG_STM32_TIM3_CHANNEL4 is not set +CONFIG_STM32_PWM_MULTICHAN=y +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=6522 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NUCLEO_F303RE=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleo-f303re" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +CONFIG_BOARDCTL_PWMTEST=y +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="pwm_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +CONFIG_ARCH_HAVE_PWM_PULSECOUNT=y +CONFIG_ARCH_HAVE_PWM_MULTICHAN=y +CONFIG_PWM=y +# CONFIG_PWM_PULSECOUNT is not set +CONFIG_PWM_MULTICHAN=y +CONFIG_PWM_NCHANNELS=2 +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +# CONFIG_SERIAL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +CONFIG_RAMLOG=y +CONFIG_RAMLOG_SYSLOG=y +CONFIG_RAMLOG_BUFSIZE=1024 +# CONFIG_RAMLOG_CRLF is not set +CONFIG_RAMLOG_NONBLOCKING=y + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_CHAR is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +CONFIG_EXAMPLES_PWM=y +CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm0" +CONFIG_EXAMPLES_PWM_FREQUENCY=100 +CONFIG_EXAMPLES_PWM_DURATION=5 +CONFIG_EXAMPLES_PWM_DUTYPCT1=50 +CONFIG_EXAMPLES_PWM_CHANNEL1=1 +CONFIG_EXAMPLES_PWM_DUTYPCT2=50 +CONFIG_EXAMPLES_PWM_CHANNEL2=2 +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +# CONFIG_NSH_READLINE is not set +CONFIG_NSH_CLE=y +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +CONFIG_SYSTEM_CLE=y +CONFIG_SYSTEM_CLE_DEBUGLEVEL=0 +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-f303re/scripts/ld.script b/configs/nucleo-f303re/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..ff2087a63189b725fdf0987e23bbf7177b0ea57d --- /dev/null +++ b/configs/nucleo-f303re/scripts/ld.script @@ -0,0 +1,119 @@ +/**************************************************************************** + * configs/nucleo-f303re/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F303RET6 has 512Kb of FLASH beginning at address 0x0800:0000 and + * 64Kb of SRAM. + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/nucleo-f303re/serialrx/Make.defs b/configs/nucleo-f303re/serialrx/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f0190d2363c9ac2a687727e149e2b53a3ee3cf29 --- /dev/null +++ b/configs/nucleo-f303re/serialrx/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/nucleo-f303re/serialrx/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/nucleo-f303re/serialrx/defconfig b/configs/nucleo-f303re/serialrx/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..4748e044c44918019654e3baad12a81c70f7026b --- /dev/null +++ b/configs/nucleo-f303re/serialrx/defconfig @@ -0,0 +1,1010 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +CONFIG_ARCH_CHIP_STM32F303RE=y +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +CONFIG_STM32_STM32F30XX=y +# CONFIG_STM32_STM32F302 is not set +CONFIG_STM32_STM32F303=y +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +CONFIG_STM32_HAVE_TIM15=y +CONFIG_STM32_HAVE_TIM16=y +CONFIG_STM32_HAVE_TIM17=y +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +CONFIG_STM32_HAVE_ADC4=y +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +CONFIG_STM32_HAVE_SPI4=y +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_ADC4 is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_SPI4 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM15 is not set +# CONFIG_STM32_TIM16 is not set +# CONFIG_STM32_TIM17 is not set +# CONFIG_STM32_TSC is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +CONFIG_STM32_UART4=y +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_UART4_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=6522 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NUCLEO_F303RE=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleo-f303re" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +CONFIG_BOARDCTL_ADCTEST=y +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="serialrx_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +CONFIG_ANALOG=y +CONFIG_ADC=y +CONFIG_ADC_FIFOSIZE=8 +# CONFIG_ADC_NO_STARTUP_CONV is not set +# CONFIG_ADC_ADS1242 is not set +# CONFIG_ADC_ADS125X is not set +# CONFIG_ADC_PGA11X is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +CONFIG_ARCH_HAVE_UART4=y +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_UART4_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# UART4 Configuration +# +CONFIG_UART4_RXBUFSIZE=256 +CONFIG_UART4_TXBUFSIZE=256 +CONFIG_UART4_BAUD=9600 +CONFIG_UART4_BITS=8 +CONFIG_UART4_PARITY=0 +CONFIG_UART4_2STOP=0 +# CONFIG_UART4_IFLOWCONTROL is not set +# CONFIG_UART4_OFLOWCONTROL is not set +# CONFIG_UART4_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_ADC is not set +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +CONFIG_EXAMPLES_SERIALRX=y +CONFIG_EXAMPLES_SERIALRX_STACKSIZE=2048 +CONFIG_EXAMPLES_SERIALRX_PRIORITY=50 +CONFIG_EXAMPLES_SERIALRX_BUFFERED=y +CONFIG_EXAMPLES_SERIALRX_BUFSIZE=11520 +CONFIG_EXAMPLES_SERIALRX_DEVPATH="/dev/ttyS0" +# CONFIG_EXAMPLES_SERIALRX_PRINTHYPHEN is not set +# CONFIG_EXAMPLES_SERIALRX_PRINTHEX is not set +CONFIG_EXAMPLES_SERIALRX_PRINTSTR=y +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-f303re/src/Makefile b/configs/nucleo-f303re/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..7d81b2cbe1bf8f7a6bef7f362f39078122b63530 --- /dev/null +++ b/configs/nucleo-f303re/src/Makefile @@ -0,0 +1,85 @@ +############################################################################ +# configs/nucleo-f303re/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. +# Authors: Gregory Nutt +# Paul Alexander Patience +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinitialize.c +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += stm32_adc.c +endif + +ifeq ($(CONFIG_CAN),y) +CSRCS += stm32_can.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += stm32_pwm.c +endif + +ifeq ($(CONFIG_SPI),y) +CSRCS += stm32_spi.c +endif + +ifeq ($(CONFIG_LCD_SSD1351),y) +CSRCS += stm32_ssd1351.c +endif + +ifeq ($(CONFIG_TIMER),y) +CSRCS += stm32_timer.c +endif + +ifeq ($(CONFIG_BOARDCTL_UNIQUEID),y) +CSRCS += stm32_uid.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/nucleo-f303re/src/nucleo-f303re.h b/configs/nucleo-f303re/src/nucleo-f303re.h new file mode 100644 index 0000000000000000000000000000000000000000..526bc7ee9a5af1c8aaf1fbd19e5bcb1e79ca0167 --- /dev/null +++ b/configs/nucleo-f303re/src/nucleo-f303re.h @@ -0,0 +1,156 @@ +/**************************************************************************** + * configs/nucleo-f303re/src/nucleo-f303re.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_NUCLEO_F303RE_SRC_NUCLEO_F303RE_H +#define __CONFIGS_NUCLEO_F303RE_SRC_NUCLEO_F303RE_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* LED definitions **********************************************************/ +/* The Nucleo F303RE board has three LEDs. Two of these are controlled by + * logic on the board and are not available for software control: + * + * LD1 COM: LD1 default status is red. LD1 turns to green to indicate that + * communications are in progress between the PC and the + * ST-LINK/V2-1. + * LD3 PWR: red LED indicates that the board is powered. + * + * And one can be controlled by software: + * + * User LD2: green LED is a user LED connected to the I/O PA5 of the + * STM32F303RET6. + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LED in + * any way. The following definition is used to access the LED. + */ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN5) + +/* Button definitions *******************************************************/ +/* The Nucleo F303RE supports two buttons; only one button is controllable + * by software: + * + * B1 USER: user button connected to the I/O PC13 of the STM32F303RET6. + * B2 RESET: push button connected to NRST is used to RESET the + * STM32F303RET6. + * + * NOTE that EXTI interrupts are configured. + */ + +#define MIN_IRQBUTTON BUTTON_USER +#define MAX_IRQBUTTON BUTTON_USER +#define NUM_IRQBUTTONS 1 + +#define GPIO_BTN_USER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN13) + +/* PWM definitions **********************************************************/ +/* The Nucleo F303RE has no real on-board PWM devices, but the board can be + * configured to output a pulse train using variously unused pins on the + * board for PWM output (see board.h for details of pins). + */ + +#ifdef CONFIG_PWM +# if defined(CONFIG_STM32_TIM2_PWM) +# define NUCLEO_F303RE_PWMTIMER 2 +# elif defined(CONFIG_STM32_TIM3_PWM) +# define NUCLEO_F303RE_PWMTIMER 3 +# elif defined(CONFIG_STM32_TIM4_PWM) +# define NUCLEO_F303RE_PWMTIMER 4 +# endif +#endif + +/* OLED display definitions *************************************************/ + +#ifdef CONFIG_LCD_SSD1351 +# define GPIO_OLED_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN5) +# define GPIO_OLED_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN8) +# define GPIO_OLED_DC (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN9) +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the board. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI +void weak_function stm32_spidev_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_timer_driver_setup + * + * Description: + * Configure the timer driver. + * + * Input Parameters: + * devpath - The full path to the timer device. This should be of the form /dev/timer0 + * timer - The timer's number. + * + * Returned Values: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_TIMER +int stm32_timer_driver_setup(FAR const char *devpath, int timer); +#endif + +#endif /* __CONFIGS_NUCLEO_F303RE_SRC_NUCLEO_F303RE_H */ diff --git a/configs/nucleo-f303re/src/stm32_adc.c b/configs/nucleo-f303re/src/stm32_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..35d8ad5c3f1730ea37bee5defea047ae838bdc12 --- /dev/null +++ b/configs/nucleo-f303re/src/stm32_adc.c @@ -0,0 +1,247 @@ +/**************************************************************************** + * configs/nucleo-f303re/src/stm32_adc.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "stm32.h" + +#if defined(CONFIG_ADC) && \ + (defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || \ + defined(CONFIG_STM32_ADC3) || defined(CONFIG_STM32_ADC4)) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#if defined(CONFIG_STM32_ADC1) && !defined(CONFIG_STM32_ADC2) && \ + !defined(CONFIG_STM32_ADC3) && !defined(CONFIG_STM32_ADC4) +# define ADC_PORT 1 +#elif defined(CONFIG_STM32_ADC2) && !defined(CONFIG_STM32_ADC1) && \ + !defined(CONFIG_STM32_ADC3) && !defined(CONFIG_STM32_ADC4) +# define ADC_PORT 2 +#elif defined(CONFIG_STM32_ADC3) && !defined(CONFIG_STM32_ADC1) && \ + !defined(CONFIG_STM32_ADC2) && !defined(CONFIG_STM32_ADC4) +# define ADC_PORT 3 +#elif defined(CONFIG_STM32_ADC4) && !defined(CONFIG_STM32_ADC1) && \ + !defined(CONFIG_STM32_ADC2) && !defined(CONFIG_STM32_ADC3) +# define ADC_PORT 4 +#else +# error "Choose only one of ADC1, ADC2, ADC3, ADC4" +#endif + +/* The number of ADC channels in the conversion list */ + +#if defined(CONFIG_STM32_ADC1) && defined(ADC1_HAVE_DMA) +# define ADC_NCHANNELS 4 +#elif defined(CONFIG_STM32_ADC2) && defined(ADC2_HAVE_DMA) +# define ADC_NCHANNELS 3 +#elif defined(CONFIG_STM32_ADC3) && defined(ADC3_HAVE_DMA) +# define ADC_NCHANNELS 1 +#elif defined(CONFIG_STM32_ADC4) && defined(ADC4_HAVE_DMA) +# define ADC_NCHANNELS 1 +#else +# define ADC_NCHANNELS 1 +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_STM32_ADC1) + +/* Identifying number of each ADC channel */ + +static const uint8_t g_chanlist[ADC_NCHANNELS] = +{ + 1, +#ifdef ADC1_HAVE_DMA + 2, + 6, + 7, +#endif +}; + +/* Configurations of pins used by each ADC channel */ + +static const uint32_t g_pinlist[ADC_NCHANNELS] = +{ + GPIO_ADC1_IN1, +#ifdef ADC1_HAVE_DMA + GPIO_ADC1_IN2, + GPIO_ADC1_IN6, + GPIO_ADC1_IN7, +#endif +}; + +#elif defined(CONFIG_STM32_ADC2) + +/* Identifying number of each ADC channel */ + +static const uint8_t g_chanlist[ADC_NCHANNELS] = +{ + 1, +#ifdef ADC2_HAVE_DMA + 6, + 7, +#endif +}; + +/* Configurations of pins used by each ADC channel */ + +static const uint32_t g_pinlist[ADC_NCHANNELS] = +{ + GPIO_ADC2_IN1, +#ifdef ADC2_HAVE_DMA + GPIO_ADC2_IN6, + GPIO_ADC2_IN7, +#endif +}; + +#elif defined(CONFIG_STM32_ADC3) + +/* Identifying number of each ADC channel */ + +static const uint8_t g_chanlist[ADC_NCHANNELS] = +{ + 12, +}; + +/* Configurations of pins used by each ADC channel */ + +static const uint32_t g_pinlist[ADC_NCHANNELS] = +{ + GPIO_ADC3_IN12, +}; + +#elif defined(CONFIG_STM32_ADC4) + +/* Identifying number of each ADC channel */ + +static const uint8_t g_chanlist[ADC_NCHANNELS] = +{ + 3, +}; + +/* Configurations of pins used by each ADC channel */ + +static const uint32_t g_pinlist[ADC_NCHANNELS] = +{ + GPIO_ADC4_IN3, +}; + +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_adc_setup + * + * Description: + * All STM32 architectures must provide the following interface to work + * with examples/adc. + * + ****************************************************************************/ + +int board_adc_setup(void) +{ + static bool initialized = false; + FAR struct adc_dev_s *adc; + int ret; + int i; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Configure the pins as analog inputs for the selected channels */ + + for (i = 0; i < ADC_NCHANNELS; i++) + { + stm32_configgpio(g_pinlist[i]); + } + + /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + + adc = stm32_adcinitialize(ADC_PORT, g_chanlist, ADC_NCHANNELS); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_ADC && (CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || + * CONFIG_STM32_ADC3 || CONFIG_STM32_ADC4) */ diff --git a/configs/nucleo-f303re/src/stm32_appinitialize.c b/configs/nucleo-f303re/src/stm32_appinitialize.c new file mode 100644 index 0000000000000000000000000000000000000000..dce4fd50909adeb0908b0cb5867e5656ac5d8924 --- /dev/null +++ b/configs/nucleo-f303re/src/stm32_appinitialize.c @@ -0,0 +1,69 @@ +/**************************************************************************** + * configs/nucleo-f303re/src/stm32_appinitialize.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + return OK; +} diff --git a/configs/nucleo-f303re/src/stm32_autoleds.c b/configs/nucleo-f303re/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..db170d7b2cdf6cf5fdf66f4117c183a2358f40dd --- /dev/null +++ b/configs/nucleo-f303re/src/stm32_autoleds.c @@ -0,0 +1,123 @@ +/**************************************************************************** + * configs/nucleo-f303re/src/stm32_autoleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "stm32.h" +#include "nucleo-f303re.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED1 GPIO for output */ + + stm32_configgpio(GPIO_LED1); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led == BOARD_LED1) + { + stm32_gpiowrite(GPIO_LED1, true); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == BOARD_LED1) + { + stm32_gpiowrite(GPIO_LED1, false); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/nucleo-f303re/src/stm32_boot.c b/configs/nucleo-f303re/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..783a231f7c303c6878f4efe8b94b5c324c8710b9 --- /dev/null +++ b/configs/nucleo-f303re/src/stm32_boot.c @@ -0,0 +1,99 @@ +/**************************************************************************** + * configs/nucleo-f303re/src/stm32_boot.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "nucleo-f303re.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This + * entry point is called early in the intitialization -- after all memory + * has been configured and mapped but before any devices have been + * initialized. + * + ****************************************************************************/ + +void stm32_boardinitialize(void) +{ +#ifdef CONFIG_SPI + if (stm32_spidev_initialize != NULL) + { + stm32_spidev_initialize(); + } +#endif + +#ifdef CONFIG_CANUTILS_UAVCAN + (void)stm32_configgpio(GPIO_CAN1_RX); + (void)stm32_configgpio(GPIO_CAN1_TX); +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/nucleo-f303re/src/stm32_buttons.c b/configs/nucleo-f303re/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..82e9c9eff25ae717509e3c9e2549e287f5261e21 --- /dev/null +++ b/configs/nucleo-f303re/src/stm32_buttons.c @@ -0,0 +1,143 @@ +/**************************************************************************** + * configs/nucleo-f303re/src/stm32_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32.h" +#include "nucleo-f303re.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button + * resources. After that, board_buttons() may be called to collect the + * current state of all buttons or board_button_irq() may be called to + * register button interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + /* Configure the single button as an input. NOTE that EXTI interrupts are + * also configured for the pin. + */ + + stm32_configgpio(GPIO_BTN_USER); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit unsigned integer with each bit associated with a button. See the + * BUTTON_*_BIT definitions in board.h for the meaning of each bit. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + /* Check the state of the USER button. A LOW value means that the key is + * pressed. + */ + + return stm32_gpioread(GPIO_BTN_USER) ? 0 : BUTTON_USER_BIT; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * board_button_irq() may be called to register an interrupt handler that + * will be called when a button is depressed or released. The ID value is + * a button enumeration value that uniquely identifies a button resource. + * See the BUTTON_* definitions in board.h for the meaning of the + * enumeration value. The previous interrupt handler address is returned + * (so that it may be restored, if so desired). + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id == BUTTON_USER) + { + oldhandler = stm32_gpiosetevent(GPIO_BTN_USER, true, true, true, + irqhandler); + } + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/nucleo-f303re/src/stm32_can.c b/configs/nucleo-f303re/src/stm32_can.c new file mode 100644 index 0000000000000000000000000000000000000000..430be9c69d19acca0529d375cd9dbba42140dbb5 --- /dev/null +++ b/configs/nucleo-f303re/src/stm32_can.c @@ -0,0 +1,135 @@ +/**************************************************************************** + * configs/nucleo-f303re/src/stm32_can.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "stm32.h" + +#if defined(CONFIG_CAN) && defined(CONFIG_STM32_CAN1) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Debug ********************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work + * with examples/can. + * + ****************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = stm32_caninitialize(1); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && CONFIG_STM32_CAN1 */ diff --git a/configs/nucleo-f303re/src/stm32_pwm.c b/configs/nucleo-f303re/src/stm32_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..57e734d78b3b2243f81989070366e65879e7a14e --- /dev/null +++ b/configs/nucleo-f303re/src/stm32_pwm.c @@ -0,0 +1,136 @@ +/**************************************************************************** + * configs/nucleo-f303re/src/stm32_pwm.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "stm32_pwm.h" +#include "nucleo-f303re.h" + +#ifdef CONFIG_PWM + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Debug ********************************************************************/ +/* Non-standard debug that may be enabled just for testing PWM */ + +#ifdef CONFIG_DEBUG_PWM +# define pwmdbg dbg +# define pwmvdbg vdbg +# define pwmlldbg lldbg +# define pwmllvdbg llvdbg +#else +# define pwmdbg(x...) +# define pwmvdbg(x...) +# define pwmlldbg(x...) +# define pwmllvdbg(x...) +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_pwm_setup + * + * Description: + * All STM32 architectures must provide the following interface to work + * with examples/pwm. + * + ****************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + pwm = stm32_pwminitialize(NUCLEO_F303RE_PWMTIMER); + if (pwm == NULL) + { + pwmdbg("Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + pwmdbg("pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/nucleo-f303re/src/stm32_spi.c b/configs/nucleo-f303re/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..51297ba4260ad96b3c372ee484b93f17a5877bf2 --- /dev/null +++ b/configs/nucleo-f303re/src/stm32_spi.c @@ -0,0 +1,233 @@ +/**************************************************************************** + * configs/nucleo-f303re/src/stm32_spi.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "nucleo-f303re.h" + +#ifdef CONFIG_SPI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the board. + * + ****************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ +#if defined(CONFIG_LCD_SSD1351) + (void)stm32_configgpio(GPIO_OLED_CS); /* OLED chip select */ + (void)stm32_configgpio(GPIO_OLED_DC); /* OLED Command/Data */ +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status + * must be provided by board-specific logic. They are implementations of + * the select and status methods of the SPI interface defined by struct + * spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including + * stm32_spibus_initialize()) are provided by common STM32 logic. To use this + * common SPI logic on your board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions + * in your board-specific logic. These functions will perform chip + * selection and status operations using GPIOs in the way your board is + * configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind + * the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +#if defined(CONFIG_LCD_SSD1351) + if (devid == SPIDEV_DISPLAY) + { + stm32_gpiowrite(GPIO_OLED_CS, !selected); + } +#endif +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SSD1351 D/C n bit to select data (true) or command + * (false). This function must be provided by platform-specific logic. + * This is an implementation of the cmddata method of the SPI interface + * defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * spi - SPI device that controls the bus the device that requires the + * CMD/DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for + * example, one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool cmd) +{ +#ifdef CONFIG_LCD_SSD1351 + if (devid == SPIDEV_DISPLAY) + { + (void)stm32_gpiowrite(GPIO_OLED_DC, !cmd); + return OK; + } +#endif + + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool cmd) +{ + return -ENODEV; +} +#endif +#endif /* CONFIG_SPI_CMDDATA */ + +#endif /* CONFIG_SPI */ diff --git a/configs/nucleo-f303re/src/stm32_ssd1351.c b/configs/nucleo-f303re/src/stm32_ssd1351.c new file mode 100644 index 0000000000000000000000000000000000000000..417c4f4e8bbe8a7b4c2b53ba9ca8e957aab85056 --- /dev/null +++ b/configs/nucleo-f303re/src/stm32_ssd1351.c @@ -0,0 +1,142 @@ +/**************************************************************************** + * configs/nucleo-f303re/src/stm32_ssd1351.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm32_spi.h" + +#include "nucleo-f303re.h" + +#ifdef CONFIG_LCD_SSD1351 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ +/* The pin configurations here require that SPI1 is selected */ + +#ifndef CONFIG_STM32_SPI1 +# error "The OLED driver requires CONFIG_STM32_SPI1 in the configuration" +#endif + +#ifndef CONFIG_SSD1351_SPI4WIRE +# error "The configuration requires the SPI 4-wire interface" +#endif + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) dbg(format, ##__VA_ARGS__) +# define lcdvdbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED GPIOs. This initial configuration is RESET low, + * putting the OLED into reset state. + */ + + (void)stm32_configgpio(GPIO_OLED_RESET); + + /* Wait a bit then release the OLED from the reset state */ + + up_mdelay(20); + stm32_gpiowrite(GPIO_OLED_RESET, true); + + /* Get the SPI1 port interface */ + + spi = stm32_spibus_initialize(1); + if (spi == NULL) + { + lcddbg("Failed to initialize SPI port 1\n"); + } + else + { + /* Bind the SPI port to the OLED */ + + dev = ssd1351_initialize(spi, devno); + if (dev == NULL) + { + lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno); + } + else + { + lcdvdbg("Bound SPI port 1 to OLED %d\n", devno); + + /* And turn the OLED on */ + + (void)dev->setpower(dev, LCD_FULL_ON); + return dev; + } + } + + return NULL; +} + +#endif /* CONFIG_LCD_SSD1351 */ diff --git a/configs/nucleo-f303re/src/stm32_timer.c b/configs/nucleo-f303re/src/stm32_timer.c new file mode 100644 index 0000000000000000000000000000000000000000..fd82bb6d4f7d64ab5a99ae7a421002846ea858e8 --- /dev/null +++ b/configs/nucleo-f303re/src/stm32_timer.c @@ -0,0 +1,82 @@ +/**************************************************************************** + * config/nucleo-f303re/src/stm32_timer.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * With modifications from Calvin Maguranis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +#include "stm32_tim.h" +#include "nucleo-f303re.h" + +#ifdef CONFIG_TIMER + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_timer_driver_setup + * + * Description: + * Configure the timer driver. + * + * Input Parameters: + * devpath - The full path to the timer device. This should be of the + * form /dev/timer0 + * timer - The timer's number. + * + * Returned Values: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int stm32_timer_driver_setup(FAR const char *devpath, int timer) +{ + return stm32_timer_initialize(devpath, timer); +} + +#endif diff --git a/configs/nucleo-f303re/src/stm32_uid.c b/configs/nucleo-f303re/src/stm32_uid.c new file mode 100644 index 0000000000000000000000000000000000000000..5637650d3364e8c3820fbae0d365902d183513e8 --- /dev/null +++ b/configs/nucleo-f303re/src/stm32_uid.c @@ -0,0 +1,70 @@ +/************************************************************************************ + * configs/nucleo-f303re/src/stm32_uid.c + * + * Copyright (C) 2015 Marawan Ragab. All rights reserved. + * Author: Marawan Ragab + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include "stm32_uid.h" + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef OK +# define OK 0 +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#if defined(CONFIG_BOARDCTL_UNIQUEID) +int board_uniqueid(uint8_t *uniqueid) +{ + if (uniqueid == 0) + { + return -EINVAL; + } + + stm32_get_uniqueid(uniqueid); + return OK; +} +#endif diff --git a/configs/nucleo-f303re/src/stm32_userleds.c b/configs/nucleo-f303re/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..8644973dbc14fcb39b9340511eba123389262511 --- /dev/null +++ b/configs/nucleo-f303re/src/stm32_userleds.c @@ -0,0 +1,107 @@ +/**************************************************************************** + * configs/nucleo-f303re/src/stm32_userleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "stm32.h" +#include "nucleo-f303re.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1 GPIO for output */ + + stm32_configgpio(GPIO_LED1); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_LED1) + { + stm32_gpiowrite(GPIO_LED1, ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/nucleo-f303re/uavcan/Make.defs b/configs/nucleo-f303re/uavcan/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e29de03492b54a6e87a88cc586163d5911ea11dd --- /dev/null +++ b/configs/nucleo-f303re/uavcan/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/nucleo-f303re/uavcan/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/nucleo-f303re/uavcan/defconfig b/configs/nucleo-f303re/uavcan/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..11737a5671c1f8a14f49723045b40ce61dde1ef8 --- /dev/null +++ b/configs/nucleo-f303re/uavcan/defconfig @@ -0,0 +1,972 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +CONFIG_ARCH_CHIP_STM32F303RE=y +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +CONFIG_STM32_STM32F30XX=y +# CONFIG_STM32_STM32F302 is not set +CONFIG_STM32_STM32F303=y +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +CONFIG_STM32_HAVE_TIM15=y +CONFIG_STM32_HAVE_TIM16=y +CONFIG_STM32_HAVE_TIM17=y +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +CONFIG_STM32_HAVE_ADC4=y +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +CONFIG_STM32_HAVE_SPI4=y +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_ADC4 is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_SPI4 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM15 is not set +# CONFIG_STM32_TIM16 is not set +# CONFIG_STM32_TIM17 is not set +# CONFIG_STM32_TSC is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=6522 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NUCLEO_F303RE=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleo-f303re" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="uavcan_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +# CONFIG_SERIAL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +CONFIG_C99_BOOL8=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# +CONFIG_CANUTILS_UAVCAN=y +CONFIG_UAVCAN_LIBUAVCAN_URL="https://github.com/UAVCAN/libuavcan/archive" +CONFIG_UAVCAN_LIBUAVCAN_VERSION="c152f28a620ceec9f63581a7c99fe77c89938048" +CONFIG_UAVCAN_DSDL_URL="https://github.com/UAVCAN/dsdl/archive" +CONFIG_UAVCAN_DSDL_VERSION="9804a3e6972825586be252ce08dd899f44994b14" +CONFIG_UAVCAN_PYUAVCAN_URL="https://github.com/UAVCAN/pyuavcan/archive" +CONFIG_UAVCAN_PYUAVCAN_VERSION="c58477a644d20ccf95a20c151f3a0402f271c3b8" +CONFIG_UAVCAN_STM32_NUM_IFACES=1 +CONFIG_UAVCAN_STM32_TIM2=y +# CONFIG_UAVCAN_STM32_TIM3 is not set +# CONFIG_UAVCAN_STM32_TIM4 is not set +# CONFIG_UAVCAN_STM32_TIM6 is not set +# CONFIG_UAVCAN_STM32_TIM7 is not set +CONFIG_UAVCAN_CPP03=y +# CONFIG_UAVCAN_CPP11 is not set +# CONFIG_UAVCAN_DEBUG is not set +# CONFIG_UAVCAN_EXCEPTIONS is not set +# CONFIG_UAVCAN_TINY is not set +# CONFIG_UAVCAN_NO_GLOBAL_DATA_TYPE_REGISTRY is not set +# CONFIG_UAVCAN_IMPLEMENT_PLACEMENT_NEW is not set +# CONFIG_UAVCAN_USE_EXTERNAL_SNPRINTF is not set +# CONFIG_UAVCAN_USE_EXTERNAL_FLOAT16_CONVERSION is not set +# CONFIG_UAVCAN_NO_ASSERTIONS is not set +CONFIG_UAVCAN_MEM_POOL_BLOCK_SIZE=0 +CONFIG_UAVCAN_FLOAT_COMPARISON_EPSILON_MULT=0 +CONFIG_UAVCAN_MAX_CAN_ACCEPTANCE_FILTERS=0 +CONFIG_UAVCAN_MAX_NETWORK_SIZE_HINT=0 +CONFIG_UAVCAN_RX_QUEUE_CAPACITY=0 +CONFIG_UAVCAN_BIT_RATE=0 +CONFIG_UAVCAN_INIT_RETRIES=0 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +CONFIG_EXAMPLES_UAVCAN=y +CONFIG_EXAMPLES_UAVCAN_NODE_MEM_POOL_SIZE=4096 +CONFIG_EXAMPLES_UAVCAN_NODE_ID=1 +CONFIG_EXAMPLES_UAVCAN_NODE_NAME="org.nuttx.apps.examples.uavcan" +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-f4x1re/Kconfig b/configs/nucleo-f4x1re/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..6449f5b673c0589ba10b7a2f007de4d8d9cbe9f4 --- /dev/null +++ b/configs/nucleo-f4x1re/Kconfig @@ -0,0 +1,21 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_NUCLEO_F401RE + +config NUCLEO_F401RE_AJOY_MINBUTTONS + bool "Minimal Joystick Buttons" + default n if !STM32_USART1 + default y if STM32_USART1 + depends on AJOYSTICK + ---help--- + The Itead Joystick shield supports analog X/Y position and up to 5 + buttons. Some of these buttons may conflict with other resources + (Button F, for example, conflicts with the default USART1 pin usage). + Selecting this option will return the number of buttons to the + minimal set: SELECT (joystick down), FIRE (BUTTON B), and JUMP + (BUTTON A). + +endif # ARCH_BOARD_NUCLEO_F401RE diff --git a/configs/nucleo-f4x1re/README.txt b/configs/nucleo-f4x1re/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..066474d69e1bb0c29a9b66f6a7fd95cf0d61223f --- /dev/null +++ b/configs/nucleo-f4x1re/README.txt @@ -0,0 +1,627 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the ST +NucleoF401RE and NucleoF411RE boards from ST Micro. See + + http://www.st.com/web/catalog/mmc/FM141/SC1169/SS1577/LN1810/PF258797 + http://www.st.com/web/catalog/mmc/FM141/SC1169/SS1577/LN1877/PF260049 + +These two boards are very similar, both supporting STM32 "Dynamic Efficiency +Line" parts but differing in the specific STM32 chip mounted on board. The +chips themselves are also very similar with the STM32F411RE having some +additional capability: + +NucleoF401RE: + + Microprocessor: 32-bit ARM Cortex M4 at 84MHz STM32F104RE + Memory: 512 KB Flash and 96 KB SRAM + ADC: 1×12-bit, 2.4 MSPS A/D converter: up to 10 channels + DMA: 16-stream DMA controllers with FIFOs and burst support + Timers: Up to 11 timers: up to six 16-bit, two 32-bit timers, two + watchdog timers, and a SysTick timer + GPIO: Up to 81 I/O ports with interrupt capability + I2C: Up to 3 × I2C interfaces + USARTs: Up to 3 USARTs + SPIs: Up to 4 SPIs (2 I2S) + SDIO interface + USB: USB 2.0 full-speed device/host/OTG controller with on-chip PHY + CRC calculation unit + RTC + +NucleoF411RE: + + Microprocessor: 32-bit ARM Cortex M4 at 100MHz STM32F411RE + Memory: 512 KB Flash and 128 KB SRAM + ADC: 1×12-bit, 2.4 MSPS A/D converter: up to 10 channels + DMA: 16-stream DMA controllers with FIFOs and burst support + Timers: Up to 11 timers: up to six 16-bit, two 32-bit timers, two + watchdog timers, and a SysTick timer + GPIO: Up to 81 I/O ports with interrupt capability + I2C: Up to 3 × I2C interfaces + USARTs: Up to 3 USARTs + USARTs: Up to 3 USARTs + SPIs: Up to 4 SPIs (2 I2S) + SDIO interface + USB: USB 2.0 full-speed device/host/OTG controller with on-chip PHY + CRC calculation unit + RTC + +The NucleoF411RE also has additional DMA and SPI peripheral capabilities. + +Board features, however, are identical: + + Peripherals: 1 led, 1 push button + Debug: Serial wire debug and JTAG interfaces + Expansion I/F Ardino and Morpho Headers + + Uses a STM32F103 to provide a ST-Link for programming, debug similar to the + OpenOcd FTDI function - USB to JTAG front-end. + + See http://mbed.org/platforms/ST-Nucleo-F401RE and + http://developer.mbed.org/platforms/ST-Nucleo-F411RE for more + information about these boards. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NXFLAT Toolchain + - Hardware + - Button + - LED + - USARTs and Serial Consoles + - LQFP64 + - mbed + - Shields + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, or + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the CodeSourcery toolchain for Linux. + To use the Atollic, devkitARM, Raisonance GNU, or NuttX buildroot toolchain, + you simply need to add one of the following configuration options to your + .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=n : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=n : NuttX buildroot under Linux or Cygwin (default) + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: There are several limitations to using a Windows based toolchain in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + V=1 make clean_context all 2>&1 |tee mout + + An alias in your .bashrc file might make that less painful. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Using Sourcery CodeBench from http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/overview + Download and install the latest version (as of this writting it was + sourceryg++-2013.05-64-arm-none-eabi) + + Import the project from git. + File->import->Git-URI, then import a Exiting code as a Makefile progject + from the working directory the git clone was done to. + + Select the Sourcery CodeBench for ARM EABI. N.B. You must do one command line + build, before the make will work in CodeBench. + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + $ (cd tools; ./configure.sh nucleo-f4x1re/f401-nsh) + $ make qconfig + $ V=1 make context all 2>&1 | tee mout + + Use the f411-nsh configuration if you have the Nucleo-F411RE board. + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toolchain; instead use the GCC 4.3.3 EABI toolchain. + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +mbed +==== + + The Nucleo-F401RE includes boot loader from mbed: + + https://mbed.org/platforms/ST-Nucleo-F401RE/ + https://mbed.org/handbook/Homepage + + Using the mbed loader: + + 1. Connect the Nucleo-F4x1RE to the host PC using the USB connector. + 2. A new file system will appear called NUCLEO; open it with Windows + Explorer (assuming that you are using Windows). + 3. Drag and drop nuttx.bin into the MBED window. This will load the + nuttx.bin binary into the Nucleo-F4x1RE. The NUCLEO window will + close then re-open and the Nucleo-F4x1RE will be running the new code. + +Hardware +======== + + GPIO + ---- + SERIAL_TX=PA_2 USER_BUTTON=PC_13 + SERIAL_RX=PA_3 LED1 =PA_5 + + A0=PA_0 USART2RX D0=PA_3 D8 =PA_9 + A1=PA_1 USART2TX D1=PA_2 D9 =PC_7 + A2=PA_4 D2=PA_10 WIFI_CS=D10=PB_6 SPI_CS + A3=PB_0 WIFI_INT=D3=PB_3 D11=PA_7 SPI_MOSI + A4=PC_1 SDCS=D4=PB_5 D12=PA_6 SPI_MISO + A5=PC_0 WIFI_EN=D5=PB_4 LED1=D13=PA_5 SPI_SCK + LED2=D6=PB_10 I2C1_SDA=D14=PB_9 Probe + D7=PA_8 I2C1_SCL=D15=PB_8 Probe + + From: https://mbed.org/platforms/ST-Nucleo-F401RE/ + + Buttons + ------- + B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32 + microcontroller. + + LEDs + ---- + The Nucleo F401RE and Nucleo F411RE provide a single user LED, LD2. LD2 + is the green LED connected to Arduino signal D13 corresponding to MCU I/O + PA5 (pin 21) or PB13 (pin 34) depending on the STM32target. + + - When the I/O is HIGH value, the LED is on. + - When the I/O is LOW, the LED is off. + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + events as follows when the red LED (PE24) is available: + + SYMBOL Meaning LD2 + ------------------- ----------------------- ----------- + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt No change + LED_SIGNAL In a signal handler No change + LED_ASSERTION An assertion failed No change + LED_PANIC The system has crashed Blinking + LED_IDLE MCU is is sleep mode Not used + + Thus if LD2, NuttX has successfully booted and is, apparently, running + normally. If LD2 is flashing at approximately 2Hz, then a fatal error + has been detected and the system has halted. + +Serial Consoles +=============== + + USART1 + ------ + Pins and Connectors: + + RXD: PA11 CN10 pin 14 + PB7 CN7 pin 21 + TXD: PA10 CN9 pin 3, CN10 pin 33 + PB6 CN5 pin 3, CN10 pin 17 + + NOTE: You may need to edit the include/board.h to select different USART1 + pin selections. + + TTL to RS-232 converter connection: + + Nucleo CN10 STM32F4x1RE + ----------- ------------ + Pin 21 PA9 USART1_RX *Warning you make need to reverse RX/TX on + Pin 33 PA10 USART1_TX some RS-232 converters + Pin 20 GND + Pin 8 U5V + + To configure USART1 as the console: + + CONFIG_STM32_USART1=y + CONFIG_USART1_ISUART=y + CONFIG_USART1_SERIAL_CONSOLE=y + CONFIG_USART1_RXBUFSIZE=256 + CONFIG_USART1_TXBUFSIZE=256 + CONFIG_USART1_BAUD=115200 + CONFIG_USART1_BITS=8 + CONFIG_USART1_PARITY=0 + CONFIG_USART1_2STOP=0 + + USART2 + ----- + Pins and Connectors: + + RXD: PA3 CN9 pin 1 (See SB13, 14, 62, 63). CN10 pin 37 + PD6 + TXD: PA2 CN9 pin 2(See SB13, 14, 62, 63). CN10 pin 35 + PD5 + + UART2 is the default in all of these configurations. + + TTL to RS-232 converter connection: + + Nucleo CN9 STM32F4x1RE + ----------- ------------ + Pin 1 PA3 USART2_RX *Warning you make need to reverse RX/TX on + Pin 2 PA2 USART2_TX some RS-232 converters + + Solder Bridges. This configuration requires: + + - SB62 and SB63 Closed: PA2 and PA3 on STM32 MCU are connected to D1 and D0 + (pin 7 and pin 8) on Arduino connector CN9 and ST Morpho connector CN10 + as USART signals. Thus SB13 and SB14 should be OFF. + + - SB13 and SB14 Open: PA2 and PA3 on STM32F103C8T6 (ST-LINK MCU) are + disconnected to PA3 and PA2 on STM32 MCU. + + To configure USART2 as the console: + + CONFIG_STM32_USART2=y + CONFIG_USART2_ISUART=y + CONFIG_USART2_SERIAL_CONSOLE=y + CONFIG_USART2_RXBUFSIZE=256 + CONFIG_USART2_TXBUFSIZE=256 + CONFIG_USART2_BAUD=115200 + CONFIG_USART2_BITS=8 + CONFIG_USART2_PARITY=0 + CONFIG_USART2_2STOP=0 + + USART6 + ------ + Pins and Connectors: + + RXD: PC7 CN5 pin2, CN10 pin 19 + PA12 CN10, pin 12 + TXD: PC6 CN10, pin 4 + PA11 CN10, pin 14 + + To configure USART6 as the console: + + CONFIG_STM32_USART6=y + CONFIG_USART6_ISUART=y + CONFIG_USART6_SERIAL_CONSOLE=y + CONFIG_USART6_RXBUFSIZE=256 + CONFIG_USART6_TXBUFSIZE=256 + CONFIG_USART6_BAUD=115200 + CONFIG_USART6_BITS=8 + CONFIG_USART6_PARITY=0 + CONFIG_USART6_2STOP=0 + + Virtual COM Port + ---------------- + Yet another option is to use UART2 and the USB virtual COM port. This + option may be more convenient for long term development, but is painful + to use during board bring-up. + + Solder Bridges. This configuration requires: + + - SB62 and SB63 Open: PA2 and PA3 on STM32 MCU are disconnected to D1 + and D0 (pin 7 and pin 8) on Arduino connector CN9 and ST Morpho + connector CN10. + + - SB13 and SB14 Closed: PA2 and PA3 on STM32F103C8T6 (ST-LINK MCU) are + connected to PA3 and PA2 on STM32 MCU to have USART communication + between them. Thus SB61, SB62 and SB63 should be OFF. + + Configuring USART2 is the same as given above. + + Question: What BAUD should be configure to interface with the Virtual + COM port? 115200 8N1? + + Default + ------- + As shipped, SB62 and SB63 are open and SB13 and SB14 closed, so the + virtual COM port is enabled. + +Shields +======= + + RS-232 from Cutedigi.com + ------------------------ + Supports a single RS-232 connected via + + Nucleo CN9 STM32F4x1RE Cutedigi + ----------- ------------ -------- + Pin 1 PA3 USART2_RX RXD + Pin 2 PA2 USART2_TX TXD + + Support for this shield is enabled by selecting USART2 and configuring + SB13, 14, 62, and 63 as described above under "Serial Consoles" + + Itead Joystick Shield + --------------------- + See http://imall.iteadstudio.com/im120417014.html for more information + about this joystick. + + Itead Joystick Connection: + + --------- ----------------- --------------------------------- + ARDUINO ITEAD NUCLEO-F4x1 + PIN NAME SIGNAL SIGNAL + --------- ----------------- --------------------------------- + D3 Button E Output PB3 + D4 Button D Output PB5 + D5 Button C Output PB4 + D6 Button B Output PB10 + D7 Button A Output PA8 + D8 Button F Output PA9 + D9 Button G Output PC7 + A0 Joystick Y Output PA0 ADC1_0 + A1 Joystick X Output PA1 ADC1_1 + --------- ----------------- --------------------------------- + + All buttons are pulled on the shield. A sensed low value indicates + when the button is pressed. + + NOTE: Button F cannot be used with the default USART1 configuration + because PA9 is configured for USART1_RX by default. Use select + different USART1 pins in the board.h file or select a different + USART or select CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS which will + eliminate all but buttons A, B, and C. + + Itead Joystick Signal interpretation: + + --------- ----------------------- --------------------------- + BUTTON TYPE NUTTX ALIAS + --------- ----------------------- --------------------------- + Button A Large button A JUMP/BUTTON 3 + Button B Large button B FIRE/BUTTON 2 + Button C Joystick select button SELECT/BUTTON 1 + Button D Tiny Button D BUTTON 6 + Button E Tiny Button E BUTTON 7 + Button F Large Button F BUTTON 4 + Button G Large Button G BUTTON 5 + --------- ----------------------- --------------------------- + + Itead Joystick configuration settings: + + System Type -> STM32 Peripheral Support + CONFIG_STM32_ADC1=y : Enable ADC1 driver support + + Drivers + CONFIG_ANALOG=y : Should be automatically selected + CONFIG_ADC=y : Should be automatically selected + CONFIG_INPUT=y : Select input device support + CONFIG_AJOYSTICK=y : Select analog joystick support + + There is nothing in the configuration that currently uses the joystick. + For testing, you can add the following configuration options to enable the + analog joystick example at apps/examples/ajoystick: + + CONFIG_NSH_ARCHINIT=y + CONFIG_EXAMPLES_AJOYSTICK=y + CONFIG_EXAMPLES_AJOYSTICK_DEVNAME="/dev/ajoy0" + CONFIG_EXAMPLES_AJOYSTICK_SIGNO=13 + + STATUS: + 2014-12-04: + - Without ADC DMA support, it is not possible to sample both X and Y + with a single ADC. Right now, only one axis is being converted. + - There is conflicts with some of the Arduino data pins and the + default USART1 configuration. I am currently running with USART1 + but with CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS to eliminate the + conflict. + - Current showstopper: I appear to be getting infinite interrupts as + soon as joystick button interrupts are enabled. + +Configurations +============== + + f401-nsh: + --------- + Configures the NuttShell (nsh) located at apps/examples/nsh for the + Nucleo-F401RE board. The Configuration enables the serial interfaces + on UART2. Support for builtin applications is enabled, but in the base + configuration no builtin applications are selected (see NOTES below). + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Linux. That can easily be reconfigured, of course. + + CONFIG_HOST_LINUX=y : Builds under Linux + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery for Linux + + 3. Although the default console is USART2 (which would correspond to + the Virtual COM port) I have done all testing with the console + device configured for USART1 (see instruction above under "Serial + Consoles). I have been using a TTL-to-RS-232 converter connected + as shown below: + + Nucleo CN10 STM32F4x1RE + ----------- ------------ + Pin 21 PA9 USART1_RX *Warning you make need to reverse RX/TX on + Pin 33 PA10 USART1_TX some RS-232 converters + Pin 20 GND + Pin 8 U5V + + f411-nsh + -------- + This configuration is the same as the f401-nsh configuration, except + that it is configured to support the Nucleo-F411RE. diff --git a/configs/nucleo-f4x1re/f401-nsh/Make.defs b/configs/nucleo-f4x1re/f401-nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..097c20b21ed4d3f822e3265545b72fe68f8711c4 --- /dev/null +++ b/configs/nucleo-f4x1re/f401-nsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/nucleo-f4x1re/f401-nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_ARCH_CHIP_STM32F401RE),y) +LDSCRIPT = f401re.ld +else +ifeq ($(CONFIG_ARCH_CHIP_STM32F411RE),y) +LDSCRIPT = f411re.ld +endif +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/nucleo-f4x1re/f401-nsh/defconfig b/configs/nucleo-f4x1re/f401-nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..6ac2b9ea5535b2be3f8e5713617397f1670d8d25 --- /dev/null +++ b/configs/nucleo-f4x1re/f401-nsh/defconfig @@ -0,0 +1,1105 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +CONFIG_ARCH_CHIP_STM32F401RE=y +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +CONFIG_STM32_STM32F401=y +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +# CONFIG_STM32_HAVE_USART3 is not set +# CONFIG_STM32_HAVE_UART4 is not set +# CONFIG_STM32_HAVE_UART5 is not set +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +# CONFIG_STM32_HAVE_TIM6 is not set +# CONFIG_STM32_HAVE_TIM7 is not set +# CONFIG_STM32_HAVE_TIM8 is not set +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +# CONFIG_STM32_HAVE_ADC2 is not set +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +# CONFIG_STM32_HAVE_CAN1 is not set +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +CONFIG_STM32_OTGFS=y +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8499 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=98304 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NUCLEO_F401RE=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleo-f4x1re" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=5 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-f4x1re/f401-nsh/setenv.sh b/configs/nucleo-f4x1re/f401-nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..67f257ad6cceb9a307a40edb7a5bdf474a4dfada --- /dev/null +++ b/configs/nucleo-f4x1re/f401-nsh/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/nucleo-f4x1re/f401nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/nucleo-f4x1re/f411-nsh/Make.defs b/configs/nucleo-f4x1re/f411-nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..1b7212119167c46c7136e491d5652d21390889db --- /dev/null +++ b/configs/nucleo-f4x1re/f411-nsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/nucleo-f4x1re/f411-nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_ARCH_CHIP_STM32F401RE),y) +LDSCRIPT = f401re.ld +else +ifeq ($(CONFIG_ARCH_CHIP_STM32F411RE),y) +LDSCRIPT = f411re.ld +endif +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/nucleo-f4x1re/f411-nsh/defconfig b/configs/nucleo-f4x1re/f411-nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..df0a12a77ee19a60cb419f0ef96c9d3e8a4777c6 --- /dev/null +++ b/configs/nucleo-f4x1re/f411-nsh/defconfig @@ -0,0 +1,1107 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +CONFIG_ARCH_CHIP_STM32F411RE=y +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +CONFIG_STM32_STM32F411=y +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +# CONFIG_STM32_HAVE_USART3 is not set +# CONFIG_STM32_HAVE_UART4 is not set +# CONFIG_STM32_HAVE_UART5 is not set +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +# CONFIG_STM32_HAVE_TIM6 is not set +# CONFIG_STM32_HAVE_TIM7 is not set +# CONFIG_STM32_HAVE_TIM8 is not set +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +# CONFIG_STM32_HAVE_ADC2 is not set +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +# CONFIG_STM32_HAVE_CAN1 is not set +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +CONFIG_STM32_HAVE_SPI4=y +CONFIG_STM32_HAVE_SPI5=y +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CCMDATARAM is not set +CONFIG_STM32_CRC=y +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +CONFIG_STM32_OTGFS=y +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_SPI4 is not set +# CONFIG_STM32_SPI5 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8499 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=131072 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NUCLEO_F411RE=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleo-f4x1re" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=14 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-f4x1re/f411-nsh/setenv.sh b/configs/nucleo-f4x1re/f411-nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..f4ab9bca9bfaadcc8abb07057672dbb5ad468af6 --- /dev/null +++ b/configs/nucleo-f4x1re/f411-nsh/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/nucleo-f4x1re/f411-nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/nucleo-f4x1re/include/board.h b/configs/nucleo-f4x1re/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..cd6db041bd0150df0951a5a3f1c07a833cf2e996 --- /dev/null +++ b/configs/nucleo-f4x1re/include/board.h @@ -0,0 +1,255 @@ +/************************************************************************************ + * configs/nucleo-f4x1re/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_NUCLEO_F401RE_INCLUDE_BOARD_H +#define __CONFIGS_NUCLEO_F401RE_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +#if defined(CONFIG_ARCH_CHIP_STM32F401RE) +# include +#elif defined(CONFIG_ARCH_CHIP_STM32F411RE) +# include +#endif + +/* DMA Channel/Stream Selections ****************************************************/ +/* Stream selections are arbitrary for now but might become important in the future + * is we set aside more DMA channels/streams. + * + * SDIO DMA + *   DMAMAP_SDIO_1 = Channel 4, Stream 3 <- may later be used by SPI DMA + *   DMAMAP_SDIO_2 = Channel 4, Stream 6 + */ + +#define DMAMAP_SDIO DMAMAP_SDIO_1 + +/* Need to VERIFY fwb */ + +#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1 +#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 +#define DMACHAN_SPI2_RX DMAMAP_SPI2_RX +#define DMACHAN_SPI2_TX DMAMAP_SPI2_TX + +/* Alternate function pin selections ************************************************/ + +/* USART1: + * RXD: PA10 CN9 pin 3, CN10 pin 33 + * PB7 CN7 pin 21 + * TXD: PA9 CN5 pin 1, CN10 pin 21 + * PB6 CN5 pin 3, CN10 pin 17 + */ + +#if 1 +# define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */ +# define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */ +#else +# define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */ +# define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */ +#endif + +/* USART2: + * RXD: PA3 CN9 pin 1 (See SB13, 14, 62, 63). CN10 pin 37 + * PD6 + * TXD: PA2 CN9 pin 2(See SB13, 14, 62, 63). CN10 pin 35 + * PD5 + */ + +#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */ +#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */ +#define GPIO_USART2_RTS GPIO_USART2_RTS_2 +#define GPIO_USART2_CTS GPIO_USART2_CTS_2 + +/* USART6: + * RXD: PC7 CN5 pin2, CN10 pin 19 + * PA12 CN10, pin 12 + * TXD: PC6 CN10, pin 4 + * PA11 CN10, pin 14 + */ + +#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */ +#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 */ + +/* UART RX DMA configurations */ + +#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 + +/* I2C + * + * The optional _GPIO configurations allow the I2C driver to manually + * reset the bus to clear stuck slaves. They match the pin configuration, + * but are normally-high GPIOs. + */ + +#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2 +#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2 +#define GPIO_I2C1_SCL_GPIO \ + (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8) +#define GPIO_I2C1_SDA_GPIO \ + (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9) + +#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1 +#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1 +#define GPIO_I2C2_SCL_GPIO \ + (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10) +#define GPIO_I2C2_SDA_GPIO \ + (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11) + +/* SPI + * + * There are sensors on SPI1, and SPI2 is connected to the FRAM. + */ + +#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 +#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 +#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 + +#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1 +#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 +#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2 + +/* LEDs + * + * The Nucleo F401RE and F411RE boards provide a single user LED, LD2. LD2 + * is the green LED connected to Arduino signal D13 corresponding to MCU I/O + * PA5 (pin 21) or PB13 (pin 34) depending on the STM32 target. + * + * - When the I/O is HIGH value, the LED is on. + * - When the I/O is LOW, the LED is off. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LD2 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LD2_BIT (1 << BOARD_LD2) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows when the red LED (PE24) is available: + * + * SYMBOL Meaning LD2 + * ------------------- ----------------------- ----------- + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt No change + * LED_SIGNAL In a signal handler No change + * LED_ASSERTION An assertion failed No change + * LED_PANIC The system has crashed Blinking + * LED_IDLE MCU is is sleep mode Not used + * + * Thus if LD2, NuttX has successfully booted and is, apparently, running + * normally. If LD2 is flashing at approximately 2Hz, then a fatal error + * has been detected and the system has halted. + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 0 +#define LED_IRQSENABLED 0 +#define LED_STACKCREATED 1 +#define LED_INIRQ 2 +#define LED_SIGNAL 2 +#define LED_ASSERTION 2 +#define LED_PANIC 1 + +/* Buttons + * + * B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32 + * microcontroller. + */ + +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 + +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_NUCLEO_F401RE_INCLUDE_BOARD_H */ diff --git a/configs/nucleo-f4x1re/include/nucleo-f401re.h b/configs/nucleo-f4x1re/include/nucleo-f401re.h new file mode 100644 index 0000000000000000000000000000000000000000..581c154e70679a96f2554abdc4b13b9d1c99ed5a --- /dev/null +++ b/configs/nucleo-f4x1re/include/nucleo-f401re.h @@ -0,0 +1,232 @@ +/************************************************************************************ + * configs/nucleo-f4x1re/include/nucleo-f401re.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_NUCLEO_F401RE_INCLUDE_NUCLEO_F401RE_H +#define __CONFIGS_NUCLEO_F401RE_INCLUDE_NUCLEO_F401RE_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The NUCLEO401RE supports both HSE and LSE crystals (X2 and X3). However, as + * shipped, the X2 and X3 crystals are not populated. Therefore the Nucleo-F401RE + * will need to run off the 16MHz HSI clock. + * + * System Clock source : PLL (HSI) + * SYSCLK(Hz) : 84000000 Determined by PLL configuration + * HCLK(Hz) : 84000000 (STM32_RCC_CFGR_HPRE) + * AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE) + * APB1 Prescaler : 2 (STM32_RCC_CFGR_PPRE1) + * APB2 Prescaler : 1 (STM32_RCC_CFGR_PPRE2) + * HSI Frequency(Hz) : 16000000 (nominal) + * PLLM : 16 (STM32_PLLCFG_PLLM) + * PLLN : 336 (STM32_PLLCFG_PLLN) + * PLLP : 4 (STM32_PLLCFG_PLLP) + * PLLQ : 7 (STM32_PLLCFG_PPQ) + * Flash Latency(WS) : 5 + * Prefetch Buffer : OFF + * Instruction cache : ON + * Data cache : ON + * Require 48MHz for USB OTG FS, : Enabled + * SDIO and RNG clock + */ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC + * HSE - not installed + * LSE - not installed + */ + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_BOARD_USEHSI 1 + +/* Main PLL Configuration. + * + * Formulae: + * + * VCO input frequency = PLL input clock frequency / PLLM, 2 <= PLLM <= 63 + * VCO output frequency = VCO input frequency × PLLN, 192 <= PLLN <= 432 + * PLL output clock frequency = VCO frequency / PLLP, PLLP = 2, 4, 6, or 8 + * USB OTG FS clock frequency = VCO frequency / PLLQ, 2 <= PLLQ <= 15 + * + * We would like to have SYSYCLK=84MHz and we must have the USB clock= 48MHz. + * Some possible solutions include: + * + * PLLN=210 PLLM=5 PLLP=8 PLLQ=14 SYSCLK=84000000 OTGFS=48000000 + * PLLN=210 PLLM=10 PLLP=4 PLLQ=7 SYSCLK=84000000 OTGFS=48000000 + * PLLN=336 PLLM=8 PLLP=8 PLLQ=14 SYSCLK=84000000 OTGFS=48000000 + * PLLN=336 PLLM=16 PLLP=4 PLLQ=7 SYSCLK=84000000 OTGFS=48000000 + * PLLN=420 PLLM=10 PLLP=8 PLLQ=14 SYSCLK=84000000 OTGFS=48000000 + * PLLN=420 PLLM=20 PLLP=4 PLLQ=7 SYSCLK=84000000 OTGFS=48000000 + * + * We will configure like this + * + * PLL source is HSI + * PLL_VCO = (STM32_HSI_FREQUENCY / PLLM) * PLLN + * = (16,000,000 / 16) * 336 + * = 336,000,000 + * SYSCLK = PLL_VCO / PLLP + * = 336,000,000 / 4 = 84,000,000 + * USB OTG FS and SDIO Clock + * = PLL_VCO / PLLQ + * = 336,000,000 / 7 = 48,000,000 + * + * REVISIT: Trimming of the HSI is not yet supported. + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(16) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_4 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7) + +#define STM32_SYSCLK_FREQUENCY 84000000ul + +/* AHB clock (HCLK) is SYSCLK (84MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/2 (42MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 /* PCLK1 = HCLK / 2 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB1 will be twice PCLK1 */ +/* REVISIT */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK (84MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK / 1 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/1) + +/* Timers driven from APB2 will be twice PCLK2 */ +/* REVISIT */ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ +/* REVISIT */ + +#define STM32_TIM18_FREQUENCY (2*STM32_PCLK2_FREQUENCY) +#define STM32_TIM27_FREQUENCY (2*STM32_PCLK1_FREQUENCY) + +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz + */ +/* REVISIT */ + +#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ +/* REVISIT */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ +/* REVISIT */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_SDXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_NUCLEO_F401RE_INCLUDE_NUCLEO_F401RE_H */ diff --git a/configs/nucleo-f4x1re/include/nucleo-f411re.h b/configs/nucleo-f4x1re/include/nucleo-f411re.h new file mode 100644 index 0000000000000000000000000000000000000000..84018f7d4be6adb995bb0e17ed2f7d74503ff7cc --- /dev/null +++ b/configs/nucleo-f4x1re/include/nucleo-f411re.h @@ -0,0 +1,228 @@ +/************************************************************************************ + * configs/nucleo-f4x1re/include/nucleo-f411re.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_NUCLEO_F401RE_INCLUDE_NUCLEO_F411RE_H +#define __CONFIGS_NUCLEO_F401RE_INCLUDE_NUCLEO_F411RE_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The NUCLEOF411RE supports both HSE and LSE crystals (X2 and X3). However, as + * shipped, the X2 and X3 crystals are not populated. Therefore the Nucleo-FF411RE + * will need to run off the 16MHz HSI clock. + * + * System Clock source : PLL (HSI) + * SYSCLK(Hz) : 104000000 Determined by PLL configuration + * HCLK(Hz) : 104000000 (STM32_RCC_CFGR_HPRE) + * AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE) + * APB1 Prescaler : 2 (STM32_RCC_CFGR_PPRE1) + * APB2 Prescaler : 1 (STM32_RCC_CFGR_PPRE2) + * HSI Frequency(Hz) : 16000000 (nominal) + * PLLM : 8 (STM32_PLLCFG_PLLM) + * PLLN : 216 (STM32_PLLCFG_PLLN) + * PLLP : 4 (STM32_PLLCFG_PLLP) + * PLLQ : 9 (STM32_PLLCFG_PPQ) + * Flash Latency(WS) : 4 + * Prefetch Buffer : OFF + * Instruction cache : ON + * Data cache : ON + * Require 48MHz for USB OTG FS, : Enabled + * SDIO and RNG clock + */ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC + * HSE - not installed + * LSE - not installed + */ + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_BOARD_USEHSI 1 + +/* Main PLL Configuration. + * + * Formulae: + * + * VCO input frequency = PLL input clock frequency / PLLM, 2 <= PLLM <= 63 + * VCO output frequency = VCO input frequency × PLLN, 192 <= PLLN <= 432 + * PLL output clock frequency = VCO frequency / PLLP, PLLP = 2, 4, 6, or 8 + * USB OTG FS clock frequency = VCO frequency / PLLQ, 2 <= PLLQ <= 15 + * + + * There is no config for 100 MHz and 48 MHz for usb, + * so we would like to have SYSYCLK=104MHz and we must have the USB clock= 48MHz. + * + * PLLQ = 13 PLLP = 6 PLLN=390 PLLM=10 + * + * We will configure like this + * + * PLL source is HSI + * PLL_VCO = (STM32_HSI_FREQUENCY / PLLM) * PLLN + * = (16,000,000 / 10) * 390 + * = 624,000,000 + * SYSCLK = PLL_VCO / PLLP + * = 624,000,000 / 6 = 104,000,000 + * USB OTG FS and SDIO Clock + * = PLL_VCO / PLLQ + * = 624,000,000 / 13 = 48,000,000 + * + * REVISIT: Trimming of the HSI is not yet supported. + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(10) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(390) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_6 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(13) + +#define STM32_SYSCLK_FREQUENCY 104000000ul + +/* AHB clock (HCLK) is SYSCLK (104MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/2 (52MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 /* PCLK1 = HCLK / 2 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB1 will be twice PCLK1 */ +/* REVISIT */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK (104MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK / 1 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/1) + +/* Timers driven from APB2 will be twice PCLK2 */ +/* REVISIT */ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ +/* REVISIT */ + +#define STM32_TIM18_FREQUENCY (2*STM32_PCLK2_FREQUENCY) +#define STM32_TIM27_FREQUENCY (2*STM32_PCLK1_FREQUENCY) + +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz + */ +/* REVISIT */ + +#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ +/* REVISIT */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ +/* REVISIT */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_SDXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_NUCLEO_F401RE_INCLUDE_NUCLEO_F411RE_H */ diff --git a/configs/nucleo-f4x1re/scripts/f401re.ld b/configs/nucleo-f4x1re/scripts/f401re.ld new file mode 100644 index 0000000000000000000000000000000000000000..0fdf32397a698784284f60d41273f151dbff4673 --- /dev/null +++ b/configs/nucleo-f4x1re/scripts/f401re.ld @@ -0,0 +1,119 @@ +/**************************************************************************** + * configs/nucleo-f4x1re/scripts/f401re.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F401RE has 512Kb of FLASH beginning at address 0x0800:0000 and + * 96Kb of SRAM beginning at address 0x2000:0000. When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 96K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F103VCT6 has 48Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/nucleo-f4x1re/scripts/f411re.ld b/configs/nucleo-f4x1re/scripts/f411re.ld new file mode 100644 index 0000000000000000000000000000000000000000..865cae4885de3715a53931aa2c004a0923dd99a6 --- /dev/null +++ b/configs/nucleo-f4x1re/scripts/f411re.ld @@ -0,0 +1,119 @@ +/**************************************************************************** + * configs/nucleo-f4x1re/scripts/f411re.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F411RE has 512Kb of FLASH beginning at address 0x0800:0000 and + * 128Kb of SRAM beginning at address 0x2000:0000. When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F103VCT6 has 48Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/nucleo-f4x1re/src/Makefile b/configs/nucleo-f4x1re/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..c5d250f03dd45f1022095a2431f6fd9ebeba02aa --- /dev/null +++ b/configs/nucleo-f4x1re/src/Makefile @@ -0,0 +1,69 @@ +############################################################################ +# configs/nucleo-f4x1re/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_WL_CC3000),y) +CSRCS += stm32_wireless.c +ifeq ($(CONFIG_CC3000_PROBES),) +CSRCS += stm32_io.c +endif +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += stm32_adc.c +ifeq ($(CONFIG_AJOYSTICK),y) +CSRCS += stm32_ajoystick.c +endif +endif + +ifeq ($(CONFIG_NSH_LIBRARY),y) +CSRCS += stm32_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/nucleo-f4x1re/src/nucleo-f4x1re.h b/configs/nucleo-f4x1re/src/nucleo-f4x1re.h new file mode 100644 index 0000000000000000000000000000000000000000..21e5f7b09d28ba8edc70837a51ee1ce0040b8d3f --- /dev/null +++ b/configs/nucleo-f4x1re/src/nucleo-f4x1re.h @@ -0,0 +1,335 @@ +/************************************************************************************ + * configs/nucleo-f4x1re/src/nucleo-f4x1re.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Authors: Frank Bennett + * Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_NUCLEO_F401RE_SRC_NUCLEO_F401RE_H +#define __CONFIGS_NUCLEO_F401RE_SRC_NUCLEO_F401RE_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#define HAVE_MMCSD 1 +#if !defined(CONFIG_STM32_SDIO) || !defined(CONFIG_MMCSD) || \ + !defined(CONFIG_MMCSD_SDIO) +# undef HAVE_MMCSD +#endif + +/* LED. User LD2: the green LED is a user LED connected to Arduino signal D13 + * corresponding to MCU I/O PA5 (pin 21) or PB13 (pin 34) depending on the STM32 + * target. + * + * - When the I/O is HIGH value, the LED is on. + * - When the I/O is LOW, the LED is off. + */ + +#define GPIO_LD2 \ + (GPIO_PORTA | GPIO_PIN5 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PULLUP | \ + GPIO_SPEED_50MHz) + +/* Buttons + * + * B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32 + * microcontroller. + */ + +#define MIN_IRQBUTTON BUTTON_USER +#define MAX_IRQBUTTON BUTTON_USER +#define NUM_IRQBUTTONS 1 + +#define GPIO_BTN_USER \ + (GPIO_INPUT |GPIO_FLOAT |GPIO_EXTI | GPIO_PORTC | GPIO_PIN13) + +/* The shield uses the following pins: + * + * +5V + * GND + * SERIAL_TX=PA_2 USER_BUTTON=PC_13 + * SERIAL_RX=PA_3 LD2=PA_5 + * + * Analog Digital + * A0=PA_0 USART2RX D0=PA_3 D8 =PA_9 + * A1=PA_1 USART2TX D1=PA_2 D9 =PC_7 + * A2=PA_4 D2=PA_10 WIFI_CS=D10=PB_6 SPI_CS + * A3=PB_0 WIFI_INT=D3=PB_3 D11=PA_7 SPI_MOSI + * A4=PC_1 SD_CS=D4=PB_5 D12=PA_6 SPI_MISO + * A5=PC_0 WIFI_EN=D5=PB_4 LD2=D13=PA_5 SPI_SCK + * LED2=D6=PB_10 I2C1_SDA=D14=PB_9 WIFI Probe + * D7=PA_8 I2C1_SCL=D15=PB_8 WIFI Probe + * + * mostly from: https://mbed.org/platforms/ST-Nucleo-F401RE/ + * + */ + +#ifdef CONFIG_WL_CC3000 +# define GPIO_WIFI_INT (GPIO_PORTB | GPIO_PIN3 | GPIO_INPUT | \ + GPIO_PULLUP | GPIO_EXTI) +# define GPIO_WIFI_EN (GPIO_PORTB | GPIO_PIN4 | GPIO_OUTPUT_CLEAR | \ + GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) +# define GPIO_WIFI_CS (GPIO_PORTB | GPIO_PIN6 | GPIO_OUTPUT_SET | \ + GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) +# define GPIO_D14 (GPIO_PORTB | GPIO_PIN9 | GPIO_OUTPUT_CLEAR | \ + GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) +# define GPIO_D15 (GPIO_PORTB | GPIO_PIN8 | GPIO_OUTPUT_CLEAR | \ + GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) +# define GPIO_D0 (GPIO_PORTA | GPIO_PIN3 | GPIO_INPUT | \ + GPIO_PULLUP) +# define GPIO_D1 (GPIO_PORTA | GPIO_PIN2 | GPIO_OUTPUT_CLEAR | \ + GPIO_PULLUP) +# define GPIO_D2 (GPIO_PORTA | GPIO_PIN10 | GPIO_OUTPUT_CLEAR | \ + GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) +# define GPIO_A0 (GPIO_PORTA | GPIO_PIN0 | GPIO_OUTPUT_SET | \ + GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) +# define GPIO_A1 (GPIO_PORTA | GPIO_PIN1 | GPIO_OUTPUT_SET | \ + GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) +# define GPIO_A2 (GPIO_PORTA | GPIO_PIN4 | GPIO_INPUT | \ + GPIO_PULLUP) +# define GPIO_A3 (GPIO_PORTB | GPIO_PIN0 | GPIO_INPUT | \ + GPIO_PULLUP) +#endif + +/* SPI1 off */ + +#define GPIO_SPI1_MOSI_OFF (GPIO_INPUT | GPIO_PULLDOWN | \ + GPIO_PORTA | GPIO_PIN7) +#define GPIO_SPI1_MISO_OFF (GPIO_INPUT | GPIO_PULLDOWN | \ + GPIO_PORTA | GPIO_PIN6) +#define GPIO_SPI1_SCK_OFF (GPIO_INPUT | GPIO_PULLDOWN | \ + GPIO_PORTA | GPIO_PIN5) + +/* SPI1 chip selects off */ + +#ifdef CONFIG_WL_CC3000 +# define GPIO_SPI_CS_WIFI_OFF \ + (GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \ + GPIO_PORTB | GPIO_PIN6) +#endif + +#ifdef HAVE_MMCSD +# define GPIO_SPI_CS_SD_CARD_OFF \ + (GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \ + GPIO_PORTB | GPIO_PIN5) +#endif + +/* SPI chip selects */ + +#ifdef CONFIG_WL_CC3000 +# define GPIO_SPI_CS_WIFI \ + (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \ + GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN6) +#endif + +#ifdef HAVE_MMCSD +# define GPIO_SPI_CS_SD_CARD \ + (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \ + GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN5) +#endif + +/* Devices on the onboard bus. + * + * Note that these are unshifted addresses. + */ + +#define NUCLEO_I2C_OBDEV_LED 0x55 +#define NUCLEO_I2C_OBDEV_HMC5883 0x1e + +/* User GPIOs + * + * GPIO0-1 are for probing WIFI status + */ + +#ifdef CONFIG_WL_CC3000 +# define GPIO_GPIO0_INPUT \ + (GPIO_INPUT | GPIO_PULLUP | GPIO_PORTB | GPIO_PIN8) +# define GPIO_GPIO1_INPUT \ + (GPIO_INPUT | GPIO_PULLUP | GPIO_PORTB | GPIO_PIN9) +# define GPIO_GPIO0_OUTPUT \ + (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \ + GPIO_OUTPUT_CLEAR | GPIO_PORTB | GPIO_PIN8) +# define GPIO_GPIO1_OUTPUT \ + (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \ + GPIO_OUTPUT_CLEAR | GPIO_PORTB | GPIO_PIN9) +#endif + +/* Itead Joystick Shield + * + * See http://imall.iteadstudio.com/im120417014.html for more information + * about this joystick. + * + * --------- ----------------- --------------------------------- + * ARDUINO ITEAD NUCLEO-F4x1 + * PIN NAME SIGNAL SIGNAL + * --------- ----------------- --------------------------------- + * D3 Button E Output PB3 + * D4 Button D Output PB5 + * D5 Button C Output PB4 + * D6 Button B Output PB10 + * D7 Button A Output PA8 + * D8 Button F Output PA9 + * D9 Button G Output PC7 + * A0 Joystick Y Output PA0 ADC1_0 + * A1 Joystick X Output PA1 ADC1_1 + * --------- ----------------- --------------------------------- + * + * All buttons are pulled on the shield. A sensed low value indicates + * when the button is pressed. + * + * NOTE: Button F cannot be used with the default USART1 configuration + * because PA9 is configured for USART1_RX by default. Use select + * different USART1 pins in the board.h file or select a different + * USART or select CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS which will + * eliminate all but buttons A, B, and C. + */ + +#define ADC_XOUPUT 1 /* X output is on ADC channel 1 */ +#define ADC_YOUPUT 0 /* Y output is on ADC channel 0 */ + +#define GPIO_BUTTON_A \ + (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTA | GPIO_PIN8) +#define GPIO_BUTTON_B \ + (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTB | GPIO_PIN10) +#define GPIO_BUTTON_C \ + (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTB | GPIO_PIN4) +#define GPIO_BUTTON_D \ + (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTB | GPIO_PIN5) +#define GPIO_BUTTON_E \ + (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTB | GPIO_PIN3) +#define GPIO_BUTTON_F \ + (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTA | GPIO_PIN9) +#define GPIO_BUTTON_G \ + (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTC | GPIO_PIN7) + +/* Itead Joystick Signal interpretation: + * + * --------- ----------------------- --------------------------- + * BUTTON TYPE NUTTX ALIAS + * --------- ----------------------- --------------------------- + * Button A Large button A JUMP/BUTTON 3 + * Button B Large button B FIRE/BUTTON 2 + * Button C Joystick select button SELECT/BUTTON 1 + * Button D Tiny Button D BUTTON 6 + * Button E Tiny Button E BUTTON 7 + * Button F Large Button F BUTTON 4 + * Button G Large Button G BUTTON 5 + * --------- ----------------------- --------------------------- + */ + +#define GPIO_BUTTON_1 GPIO_BUTTON_C +#define GPIO_BUTTON_2 GPIO_BUTTON_B +#define GPIO_BUTTON_3 GPIO_BUTTON_A +#define GPIO_BUTTON_4 GPIO_BUTTON_F +#define GPIO_BUTTON_5 GPIO_BUTTON_G +#define GPIO_BUTTON_6 GPIO_BUTTON_D +#define GPIO_BUTTON_7 GPIO_BUTTON_E + +#define GPIO_SELECT GPIO_BUTTON_1 +#define GPIO_FIRE GPIO_BUTTON_2 +#define GPIO_JUMP GPIO_BUTTON_3 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/* Global driver instances */ + +#ifdef CONFIG_STM32_SPI1 +extern struct spi_dev_s *g_spi1; +#endif +#ifdef CONFIG_STM32_SPI2 +extern struct spi_dev_s *g_spi2; +#endif +#ifdef HAVE_MMCSD +extern struct sdio_dev_s *g_sdio; +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins. + * + ************************************************************************************/ + +void stm32_spidev_initialize(void); + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins. + * + ************************************************************************************/ + +void stm32_usbinitialize(void); + +/************************************************************************************ + * Name: board_adc_initialize + * + * Description: + * Initialize and register the ADC driver(s) + * + ************************************************************************************/ + +#ifdef CONFIG_ADC +int board_adc_initialize(void); +#endif + +/**************************************************************************** + * Name: board_ajoy_initialize + * + * Description: + * Initialize and register the button joystick driver + * + ****************************************************************************/ + +#ifdef CONFIG_AJOYSTICK +int board_ajoy_initialize(void); +#endif + +#endif /* __CONFIGS_NUCLEO_F401RE_SRC_NUCLEO_F401RE_H */ diff --git a/configs/nucleo-f4x1re/src/stm32_adc.c b/configs/nucleo-f4x1re/src/stm32_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..e6aaf7cc4ce416910218514956057503a02487f8 --- /dev/null +++ b/configs/nucleo-f4x1re/src/stm32_adc.c @@ -0,0 +1,181 @@ +/************************************************************************************ + * configs/nucleo-f4x1re/src/stm32_adc.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32_pwm.h" +#include "nucleo-f4x1re.h" + +#ifdef CONFIG_STM32_ADC1 + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* The number of ADC channels in the conversion list */ + +#ifdef CONFIG_ADC_DMA +# define ADC1_NCHANNELS 2 +#else +# define ADC1_NCHANNELS 1 +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* Identifying number of each ADC channel. */ + +#ifdef CONFIG_STM32_ADC1 +#ifdef CONFIG_AJOYSTICK +#ifdef CONFIG_ADC_DMA +/* The Itead analog joystick gets inputs on ADC_IN0 and ADC_IN1 */ + +static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {0, 1}; + +/* Configurations of pins used byte each ADC channels */ + +static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN0, GPIO_ADC1_IN0}; + +#else +/* Without DMA, only a single channel can be supported */ + +/* The Itead analog joystick gets input on ADC_IN0 */ + +static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {0}; + +/* Configurations of pins used byte each ADC channels */ + +static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN0}; + +#endif /* CONFIG_ADC_DMA */ +#endif /* CONFIG_AJOYSTICK */ +#endif /* CONFIG_STM32_ADC1*/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_initialize + * + * Description: + * Initialize and register the ADC driver + * + ************************************************************************************/ + +int board_adc_initialize(void) +{ + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + int i; + + /* Check if we have already initialized */ + + if (!initialized) + { +#ifdef CONFIG_STM32_ADC1 + /* Configure the pins as analog inputs for the selected channels */ + + for (i = 0; i < ADC1_NCHANNELS; i++) + { + stm32_configgpio(g_adc1_pinlist[i]); + } + + /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + + adc = stm32_adcinitialize(1, g_adc1_chanlist, ADC1_NCHANNELS); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } +#endif + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +#ifdef CONFIG_EXAMPLES_ADC +int board_adc_setup(void) +{ +#ifdef CONFIG_SAMA5_ADC + return board_adc_initialize(); +#else + return -ENOSYS; +#endif +} +#endif /* CONFIG_EXAMPLES_ADC */ + +#endif /* CONFIG_STM32_ADC1 */ diff --git a/configs/nucleo-f4x1re/src/stm32_ajoystick.c b/configs/nucleo-f4x1re/src/stm32_ajoystick.c new file mode 100644 index 0000000000000000000000000000000000000000..9d79e99cc7fdb89cdd2d3b75289d15fa6e921b2c --- /dev/null +++ b/configs/nucleo-f4x1re/src/stm32_ajoystick.c @@ -0,0 +1,508 @@ +/**************************************************************************** + * configs/nucleo-f3x1re/src/stm32_ajoystick.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm32_adc.h" +#include "chip/stm32_adc.h" +#include "nucleo-f4x1re.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Check for pre-requisites and pin conflicts */ + +#ifdef CONFIG_AJOYSTICK +# if !defined(CONFIG_ADC) +# error CONFIG_ADC is required for the Itead joystick +# undef CONFIG_AJOYSTICK +# elif !defined(CONFIG_STM32_ADC1) +# error CONFIG_STM32_ADC1 is required for Itead joystick +# undef CONFIG_AJOYSTICK +# endif +#endif /* CONFIG_AJOYSTICK */ + +#ifdef CONFIG_AJOYSTICK + +/* A no-ADC, buttons only version can be built for testing */ + +#undef NO_JOYSTICK_ADC + +/* Maximum number of ADC channels */ + +#define MAX_ADC_CHANNELS 8 + +/* Dual channel ADC support requires DMA */ + +#ifdef CONFIG_ADC_DMA +# define NJOYSTICK_CHANNELS 2 +#else +# define NJOYSTICK_CHANNELS 1 +#endif + +#ifdef CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS +/* Number of Joystick buttons */ + +# define AJOY_NGPIOS 3 + +/* Bitset of supported Joystick buttons */ + +# define AJOY_SUPPORTED (AJOY_BUTTON_1_BIT | AJOY_BUTTON_2_BIT | \ + AJOY_BUTTON_3_BIT) +#else +/* Number of Joystick buttons */ + +# define AJOY_NGPIOS 7 + +/* Bitset of supported Joystick buttons */ + +# define AJOY_SUPPORTED (AJOY_BUTTON_1_BIT | AJOY_BUTTON_2_BIT | \ + AJOY_BUTTON_3_BIT | AJOY_BUTTON_4_BIT | \ + AJOY_BUTTON_5_BIT | AJOY_BUTTON_6_BIT | \ + AJOY_BUTTON_7_BIT ) +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower); +static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower, + FAR struct ajoy_sample_s *sample); +static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower); +static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower, + ajoy_buttonset_t press, ajoy_buttonset_t release, + ajoy_handler_t handler, FAR void *arg); + +static void ajoy_disable(void); +static int ajoy_interrupt(int irq, FAR void *context); + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each Itead joystick button. Index using AJOY_* + * button definitions in include/nuttx/input/ajoystick.h. + */ + +#ifdef CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS +static const uint32_t g_joygpio[AJOY_NGPIOS] = +{ + GPIO_BUTTON_1, GPIO_BUTTON_2, GPIO_BUTTON_3 +}; +#else +static const uint32_t g_joygpio[AJOY_NGPIOS] = +{ + GPIO_BUTTON_1, GPIO_BUTTON_2, GPIO_BUTTON_3, GPIO_BUTTON_4, + GPIO_BUTTON_5, GPIO_BUTTON_6, GPIO_BUTTON_7 +}; +#endif + +/* This is the button joystick lower half driver interface */ + +static const struct ajoy_lowerhalf_s g_ajoylower = +{ + .al_supported = ajoy_supported, + .al_sample = ajoy_sample, + .al_buttons = ajoy_buttons, + .al_enable = ajoy_enable, +}; + +#ifndef NO_JOYSTICK_ADC +/* Descriptor for the open ADC driver */ + +static int g_adcfd = -1; +#endif + +/* Current interrupt handler and argument */ + +static ajoy_handler_t g_ajoyhandler; +static FAR void *g_ajoyarg; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: ajoy_supported + * + * Description: + * Return the set of buttons supported on the button joystick device + * + ****************************************************************************/ + +static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower) +{ + ivdbg("Supported: %02x\n", AJOY_SUPPORTED); + return (ajoy_buttonset_t)AJOY_SUPPORTED; +} + +/**************************************************************************** + * Name: ajoy_sample + * + * Description: + * Return the current state of all button joystick buttons + * + ****************************************************************************/ + +static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower, + FAR struct ajoy_sample_s *sample) +{ +#ifndef NO_JOYSTICK_ADC + struct adc_msg_s adcmsg[MAX_ADC_CHANNELS]; + FAR struct adc_msg_s *ptr; + ssize_t nread; + ssize_t offset; + int have; + int i; + + /* Read all of the available samples (handling the case where additional + * channels are enabled). + */ + + nread = read(g_adcfd, adcmsg, MAX_ADC_CHANNELS * sizeof(struct adc_msg_s)); + if (nread < 0) + { + int errcode = get_errno(); + if (errcode != EINTR) + { + idbg("ERROR: read failed: %d\n", errcode); + } + + return -errcode; + } + else if (nread < NJOYSTICK_CHANNELS * sizeof(struct adc_msg_s)) + { + idbg("ERROR: read too small: %ld\n", (long)nread); + return -EIO; + } + + /* Sample and the raw analog inputs */ + +#ifdef CONFIG_ADC_DMA + have = 0; + +#else + /* If DMA is not supported, then we will have only a single ADC channel */ + + have = 2; + sample->as_y = 0; +#endif + + for (i = 0, offset = 0; + i < MAX_ADC_CHANNELS && offset < nread && have != 3; + i++, offset += sizeof(struct adc_msg_s)) + { + ptr = &adcmsg[i]; + + /* Is this one of the channels that we need? */ + + if ((have & 1) == 0 && ptr->am_channel == 0) + { + int32_t tmp = ptr->am_data; + sample->as_x = (int16_t)tmp; + have |= 1; + + ivdbg("X sample: %ld -> %d\n", (long)tmp, (int)sample->as_x); + } + +#ifdef CONFIG_ADC_DMA + if ((have & 2) == 0 && ptr->am_channel == 1) + { + int32_t tmp = ptr->am_data; + sample->as_y = (int16_t)tmp; + have |= 2; + + ivdbg("Y sample: %ld -> %d\n", (long)tmp, (int)sample->as_y); + } +#endif + } + + if (have != 3) + { + idbg("ERROR: Could not find joystick channels\n"); + return -EIO; + } + +#else + /* ADC support is disabled */ + + sample->as_x = 0; + sample->as_y = 0; +#endif + + /* Sample the discrete button inputs */ + + sample->as_buttons = ajoy_buttons(lower); + ivdbg("Returning: %02x\n", sample->as_buttons); + return OK; +} + +/**************************************************************************** + * Name: ajoy_buttons + * + * Description: + * Return the current state of button data (only) + * + ****************************************************************************/ + +static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower) +{ + ajoy_buttonset_t ret = 0; + int i; + + /* Read each joystick GPIO value */ + + for (i = 0; i < AJOY_NGPIOS; i++) + { + /* Button outputs are pulled high. So a sensed low level means that the + * button is pressed. + */ + + if (!stm32_gpioread(g_joygpio[i])) + { + ret |= (1 << i); + } + } + + ivdbg("Returning: %02x\n", ret); + return ret; +} + +/**************************************************************************** + * Name: ajoy_enable + * + * Description: + * Enable interrupts on the selected set of joystick buttons. And empty + * set will disable all interrupts. + * + ****************************************************************************/ + +static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower, + ajoy_buttonset_t press, ajoy_buttonset_t release, + ajoy_handler_t handler, FAR void *arg) +{ + irqstate_t flags; + ajoy_buttonset_t either = press | release; + ajoy_buttonset_t bit; + bool rising; + bool falling; + int i; + + /* Start with all interrupts disabled */ + + flags = enter_critical_section(); + ajoy_disable(); + + illvdbg("press: %02x release: %02x handler: %p arg: %p\n", + press, release, handler, arg); + + /* If no events are indicated or if no handler is provided, then this + * must really be a request to disable interrupts. + */ + + if (either && handler) + { + /* Save the new the handler and argument */ + + g_ajoyhandler = handler; + g_ajoyarg = arg; + + /* Check each GPIO. */ + + for (i = 0; i < AJOY_NGPIOS; i++) + { + /* Enable interrupts on each pin that has either a press or + * release event associated with it. + */ + + bit = (1 << i); + if ((either & bit) != 0) + { + /* Active low so a press corresponds to a falling edge and + * a release corresponds to a rising edge. + */ + + falling = ((press & bit) != 0); + rising = ((release & bit) != 0); + + illvdbg("GPIO %d: rising: %d falling: %d\n", + i, rising, falling); + + (void)stm32_gpiosetevent(g_joygpio[i], rising, falling, + true, ajoy_interrupt); + } + } + } + + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: ajoy_disable + * + * Description: + * Disable all joystick interrupts + * + ****************************************************************************/ + +static void ajoy_disable(void) +{ + irqstate_t flags; + int i; + + /* Disable each joystick interrupt */ + + flags = enter_critical_section(); + for (i = 0; i < AJOY_NGPIOS; i++) + { + (void)stm32_gpiosetevent(g_joygpio[i], false, false, false, NULL); + } + + leave_critical_section(flags); + + /* Nullify the handler and argument */ + + g_ajoyhandler = NULL; + g_ajoyarg = NULL; +} + +/**************************************************************************** + * Name: ajoy_interrupt + * + * Description: + * Discrete joystick interrupt handler + * + ****************************************************************************/ + +static int ajoy_interrupt(int irq, FAR void *context) +{ + DEBUGASSERT(g_ajoyhandler); + + if (g_ajoyhandler) + { + g_ajoyhandler(&g_ajoylower, g_ajoyarg); + } + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_ajoy_initialize + * + * Description: + * Initialize and register the button joystick driver + * + ****************************************************************************/ + +int board_ajoy_initialize(void) +{ + int ret; + int i; + +#ifndef NO_JOYSTICK_ADC + ivdbg("Initialize ADC driver: /dev/adc0\n"); + + /* Initialize ADC. We will need this to read the ADC inputs */ + + ret = board_adc_initialize(); + if (ret < 0) + { + idbg("ERROR: board_adc_initialize() failed: %d\n", ret); + return ret; + } + + /* Open the ADC driver for reading */ + + g_adcfd = open("/dev/adc0", O_RDONLY); + if (g_adcfd < 0) + { + int errcode = get_errno(); + idbg("ERROR: Failed to open /dev/adc0: %d\n", errcode); + return -errcode; + } +#endif + + /* Configure the GPIO pins as interrupting inputs. NOTE: This is + * unnecessary for interrupting pins since it will also be done by + * stm32_gpiosetevent(). + */ + + for (i = 0; i < AJOY_NGPIOS; i++) + { + /* Configure the PIO as an input */ + + stm32_configgpio(g_joygpio[i]); + } + + /* Register the joystick device as /dev/ajoy0 */ + + ivdbg("Initialize joystick driver: /dev/ajoy0\n"); + + ret = ajoy_register("/dev/ajoy0", &g_ajoylower); + if (ret < 0) + { + idbg("ERROR: ajoy_register failed: %d\n", ret); +#ifndef NO_JOYSTICK_ADC + close(g_adcfd); + g_adcfd = -1; +#endif + } + + return ret; +} + +#endif /* CONFIG_AJOYSTICK */ diff --git a/configs/nucleo-f4x1re/src/stm32_appinit.c b/configs/nucleo-f4x1re/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..7f0d889d47557c76744a5505d718d67604c8a100 --- /dev/null +++ b/configs/nucleo-f4x1re/src/stm32_appinit.c @@ -0,0 +1,153 @@ +/**************************************************************************** + * configs/nucleo-f4x1re/src/stm32_appinit.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include + +#include "nucleo-f4x1re.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_netinitialize + * + * Description: + * Dummy function expected to start-up logic. + * + ****************************************************************************/ + +#ifdef CONFIG_WL_CC3000 +void up_netinitialize(void) +{ +} +#endif + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(HAVE_MMCSD) || defined(CONFIG_AJOYSTICK) + int ret; +#endif + + /* Configure CPU load estimation */ + +#ifdef CONFIG_SCHED_INSTRUMENTATION + cpuload_initialize_once(); +#endif + +#ifdef HAVE_MMCSD + /* First, get an instance of the SDIO interface */ + + g_sdio = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!g_sdio) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, g_sdio); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", + ret); + return ret; + } + + /* Then let's guess and say that there is a card in the slot. There is no + * card detect GPIO. + */ + + sdio_mediachange(g_sdio, true); + + syslog(LOG_INFO, "[boot] Initialized SDIO\n"); +#endif + +#ifdef CONFIG_AJOYSTICK + /* Initialize and register the joystick driver */ + + ret = board_ajoy_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to register the joystick driver: %d\n", + ret); + return ret; + } +#endif + + return OK; +} diff --git a/configs/nucleo-f4x1re/src/stm32_autoleds.c b/configs/nucleo-f4x1re/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..90a28ae0f12d1697da892ca64cfb8b7b79de0988 --- /dev/null +++ b/configs/nucleo-f4x1re/src/stm32_autoleds.c @@ -0,0 +1,120 @@ +/**************************************************************************** + * configs/nucleo-f4x1re/src/stm32_autoleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "nucleo-f4x1re.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LD2 GPIO for output */ + + stm32_configgpio(GPIO_LD2); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led == 1) + { + stm32_gpiowrite(GPIO_LD2, true); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == 1) + { + stm32_gpiowrite(GPIO_LD2, false); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/nucleo-f4x1re/src/stm32_boot.c b/configs/nucleo-f4x1re/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..580b2d08c46263731ea9db9fefbe7507ef78245e --- /dev/null +++ b/configs/nucleo-f4x1re/src/stm32_boot.c @@ -0,0 +1,133 @@ +/************************************************************************************ + * configs/nucleo-f4x1re/src/stm32_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include + +#include "up_arch.h" +#include "nucleo-f4x1re.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + + /* Configure SPI chip selects if 1) SP2 is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + stm32_spidev_initialize(); +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB) + stm32_usbinitialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + board_app_initialize(); +#endif + + /* CC3000 wireless initialization */ + +#ifdef CONFIG_WL_CC3000 + wireless_archinitialize(0); +#endif +} +#endif diff --git a/configs/nucleo-f4x1re/src/stm32_buttons.c b/configs/nucleo-f4x1re/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..2960344c62e4403461b23b4254c1d9d05dd184d4 --- /dev/null +++ b/configs/nucleo-f4x1re/src/stm32_buttons.c @@ -0,0 +1,138 @@ +/**************************************************************************** + * configs/nucleo-f4x1re/src/stm32_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "nucleo-f4x1re.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + /* Configure the single button as an input. NOTE that EXTI interrupts are + * also configured for the pin. + */ + + stm32_configgpio(GPIO_BTN_USER); +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + /* Check that state of each USER button. A LOW value means that the key is + * pressed. + */ + + bool released = stm32_gpioread(GPIO_BTN_USER); + return !released; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id == BUTTON_USER) + { + oldhandler = stm32_gpiosetevent(GPIO_BTN_USER, true, true, true, irqhandler); + } + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/nucleo-f4x1re/src/stm32_io.c b/configs/nucleo-f4x1re/src/stm32_io.c new file mode 100644 index 0000000000000000000000000000000000000000..72563330d6c7d5be57d2b7ec074a0abca8c417f6 --- /dev/null +++ b/configs/nucleo-f4x1re/src/stm32_io.c @@ -0,0 +1,196 @@ +/**************************************************************************** + * configs/nucleo-f4x1re/src/stm32_io.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include "chip/stm32_tim.h" + +#include "nucleo-f4x1re.h" + +#ifndef CONFIG_CC3000_PROBES + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_leds + * + * Description: + * + ****************************************************************************/ + +void up_leds(int r, int g ,int b, int freqs) +{ + long fosc = 72000000; + long prescale = 2048; + long p1s = fosc/prescale; + long p0p5s = p1s/2; + long p; + + static struct stm32_tim_dev_s *tim1 = 0; + + if (tim1 == 0) + { + tim1 = stm32_tim_init(1); + STM32_TIM_SETMODE(tim1, STM32_TIM_MODE_UP); + STM32_TIM_SETCLOCK(tim1, p1s-8); + STM32_TIM_SETPERIOD(tim1, p1s); + STM32_TIM_SETCOMPARE(tim1, 1, 0); + STM32_TIM_SETCOMPARE(tim1, 2, 0); + STM32_TIM_SETCOMPARE(tim1, 3, 0); + STM32_TIM_SETCHANNEL(tim1, 1, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG); + STM32_TIM_SETCHANNEL(tim1, 2, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG); + STM32_TIM_SETCHANNEL(tim1, 3, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG); + } + + p = freqs == 0 ? p1s : p1s / freqs; + STM32_TIM_SETPERIOD(tim1, p); + + p = freqs == 0 ? p1s + 1 : p0p5s / freqs; + + STM32_TIM_SETCOMPARE(tim1, 2, (r * p) / 255); + STM32_TIM_SETCOMPARE(tim1, 1, (b * p) / 255); + STM32_TIM_SETCOMPARE(tim1, 3, (g * p) / 255); +} + +/**************************************************************************** + * Name: up_ioinit + * + * Description: + * + ****************************************************************************/ + +void up_ioinit(void) +{ + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + up_leds(0,0,0,0); + stm32_configgpio(GPIO_A0); /* Probes */ + stm32_configgpio(GPIO_A1); /* Probes */ + stm32_configgpio(GPIO_A2); /* Smart Config */ + stm32_configgpio(GPIO_A3); /* not used */ + stm32_configgpio(GPIO_BTN_USER); /* Sw 1 */ + stm32_configgpio(GPIO_D0); /* USART2 RX*/ + stm32_configgpio(GPIO_D1); /* uSART2 TX*/ + stm32_configgpio(GPIO_D2); /* Activate */ +} + +/**************************************************************************** + * Name: up_read_inputs + * + * N.B The return state in true logic, the button polarity is dealt here in + * + ****************************************************************************/ + +uint8_t up_read_inputs(void) +{ + uint8_t bits = 0; + bits |= stm32_gpioread(GPIO_D14) == 0 ? 1 : 0; + bits |= stm32_gpioread(GPIO_D15) == 0 ? 2 : 0; + bits |= stm32_gpioread(GPIO_A2) == 0 ? 4 : 0; + bits |= stm32_gpioread(GPIO_A3) == 0 ? 8 : 0; + return bits; +} + +/**************************************************************************** + * Name: up_write_outputs + * + * N.B The return state in true logic, the button polarity is dealt here in + * + ****************************************************************************/ + +void up_write_outputs(int id, bool bits) +{ + if (id == 2) + { + stm32_gpiowrite(GPIO_D2, bits); + } + else if (id == 0) + { + stm32_gpiowrite(GPIO_A0, bits); + } + else if (id == 1) + { + stm32_gpiowrite(GPIO_A1, bits); + } +} + +/**************************************************************************** + * Name: up_irqio + * + * Description: + * + ****************************************************************************/ + +xcpt_t up_irqio(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id == 0) + { + oldhandler = stm32_gpiosetevent(GPIO_D14, true, true, true, irqhandler); + } + else if (id == 1) + { + oldhandler = stm32_gpiosetevent(GPIO_D15, true, true, true, irqhandler); + } + + return oldhandler; +} +#endif /* CONFIG_CC3000_PROBES */ diff --git a/configs/nucleo-f4x1re/src/stm32_spi.c b/configs/nucleo-f4x1re/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..9a1a0a17f31d453e064225cab69f9e029f0c7922 --- /dev/null +++ b/configs/nucleo-f4x1re/src/stm32_spi.c @@ -0,0 +1,269 @@ +/**************************************************************************** + * configs/nucleo-f4x1re/src/stm32_spi.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" + +#include "nucleo-f4x1re.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_SPI +# undef CONFIG_DEBUG_VERBOSE +#endif + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ +/* Global driver instances */ + +#ifdef CONFIG_STM32_SPI1 +struct spi_dev_s *g_spi1; +#endif +#ifdef CONFIG_STM32_SPI2 +struct spi_dev_s *g_spi2; +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Nucleo-F401RE and + * Nucleo-F411RE boards. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ +#ifdef CONFIG_STM32_SPI1 + /* Configure SPI-based devices */ + + g_spi1 = stm32_spibus_initialize(1); + if (!g_spi1) + { + spidbg("[boot] FAILED to initialize SPI port 1\n"); + } + +#ifdef CONFIG_WL_CC3000 + stm32_configgpio(GPIO_SPI_CS_WIFI); +#endif + +#ifdef HAVE_MMCSD + stm32_configgpio(GPIO_SPI_CS_SD_CARD); +#endif +#endif + +#ifdef CONFIG_STM32_SPI2 + /* Configure SPI-based devices */ + + g_spi2 = stm32_spibus_initialize(2); + + /* Setup CS, EN & IRQ line IOs */ + +#ifdef CONFIG_WL_CC3000 + stm32_configgpio(GPIO_WIFI_CS); + stm32_configgpio(GPIO_WIFI_EN); + stm32_configgpio(GPIO_WIFI_INT); +#endif +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +#ifdef CONFIG_WL_CC3000 + if (devid == SPIDEV_WIRELESS) + { + stm32_gpiowrite(GPIO_SPI_CS_WIFI, !selected); + } + else +#endif +#ifdef HAVE_MMCSD + if (devid == SPIDEV_MMCSD) + { + stm32_gpiowrite(GPIO_SPI_CS_SD_CARD, !selected); + } +#endif +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +#ifdef CONFIG_WL_CC3000 + if (devid == SPIDEV_WIRELESS) + { + stm32_gpiowrite(GPIO_WIFI_CS, !selected); + } +#endif +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) + + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif +#endif /* CONFIG_SPI_CMDDATA */ + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 || CONFIG_STM32_SPI3 */ diff --git a/configs/nucleo-f4x1re/src/stm32_userleds.c b/configs/nucleo-f4x1re/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..9b02b9af7492ba4c666bc4a3c41765fd8deda142 --- /dev/null +++ b/configs/nucleo-f4x1re/src/stm32_userleds.c @@ -0,0 +1,237 @@ +/**************************************************************************** + * configs/nucleo-f4x1re/src/stm32_userleds.c + * + * Copyright (C) 2014-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "nucleo-f4x1re.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* LED Power Management */ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_PM +static struct pm_callback_s g_ledscb = +{ + .notify = led_pm_notify, + .prepare = led_pm_prepare, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + switch (pmstate) + { + case(PM_NORMAL): + { + /* Restore normal LEDs operation */ + + } + break; + + case(PM_IDLE): + { + /* Entering IDLE mode - Turn leds off */ + + } + break; + + case(PM_STANDBY): + { + /* Entering STANDBY mode - Logic for PM_STANDBY goes here */ + + } + break; + + case(PM_SLEEP): + { + /* Entering SLEEP mode - Logic for PM_SLEEP goes here */ + + } + break; + + default: + { + /* Should not get here */ + + } + break; + } +} +#endif + +/**************************************************************************** + * Name: led_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* No preparation to change power modes is required by the LEDs driver. + * We always accept the state change by returning OK. + */ + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LD2 GPIO for output */ + + stm32_configgpio(GPIO_LD2); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == 1) + { + stm32_gpiowrite(GPIO_LD2, ldeon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + if (led == 1) + { + stm32_gpiowrite(GPIO_LD2, (ledset & BOARD_LD2_BIT) != 0); + } +} + +/**************************************************************************** + * Name: stm32_led_pminitialize + ****************************************************************************/ + +#ifdef CONFIG_PM +void stm32_led_pminitialize(void) +{ + /* Register to receive power management callbacks */ + + int ret = pm_register(&g_ledscb); + DEBUGASSERT(ret == OK); + UNUSED(ret); +} +#endif /* CONFIG_PM */ + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/nucleo-f4x1re/src/stm32_wireless.c b/configs/nucleo-f4x1re/src/stm32_wireless.c new file mode 100644 index 0000000000000000000000000000000000000000..7b90d024c661a8fd7ae3846e030cfcfe22f836e0 --- /dev/null +++ b/configs/nucleo-f4x1re/src/stm32_wireless.c @@ -0,0 +1,362 @@ +/************************************************************************************ + * configs/nucleo-f4x1re/src/stm32_wireless.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Laurent Latil + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "stm32.h" +#include "nucleo-f4x1re.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifdef CONFIG_WL_CC3000 +#ifndef CONFIG_DRIVERS_WIRELESS +# error "Wireless support requires CONFIG_DRIVERS_WIRELESS" +#endif + +#ifndef CONFIG_STM32_SPI2 +# error "CC3000 Wireless support requires CONFIG_STM32_SPI2" +#endif + +#ifndef CC3000_SPI_FREQUENCY +# define CC3000_SPI_FREQUENCY 16000000 +#endif + +#ifndef CC3000_SPIDEV +# define CC3000_SPIDEV 2 +#endif + +#if CC3000_SPIDEV != 2 +# error "CC3000_SPIDEV must be 2" +#endif + +#ifndef CC3000_DEVMINOR +# define CC3000_DEVMINOR 0 +#endif + +#ifndef CONFIG_CC3000_RX_BUFFER_SIZE +#define CONFIG_CC3000_RX_BUFFER_SIZE 132 +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32_config_s +{ + struct cc3000_config_s dev; + xcpt_t handler; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind callbacks + * to isolate the CC3000 driver from differences in GPIO interrupt handling + * by varying boards and MCUs. If possible, interrupts should be configured + * on falling edges to detect the Ready Condition At T2: The normal master + * SPI write sequence is SPI_CS low, followed by SPI_IRQ low CC3000 to host, + * indicating that the CC3000 core module is ready to accept data. T2 + * duration is approximately 7 ms. + * + * irq_attach - Attach the CC3000 interrupt handler to the GPIO interrupt + * irq_enable - Enable or disable the GPIO interrupt + * clear_irq - Acknowledge/clear any pending GPIO interrupt + * power_enable - Enable or disable Module enable. + * chip_chip_select - The Chip Select + * wl_read_irq - Return the state of the interrupt GPIO input + */ + +static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler); +static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable); +static void wl_clear_irq(FAR struct cc3000_config_s *state); +static void wl_select(FAR struct cc3000_config_s *state, bool enable); +static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable); +static bool wl_read_irq(FAR struct cc3000_config_s *state); +#ifdef CONFIG_CC3000_PROBES +static bool probe(FAR struct cc3000_config_s *state,int n, bool s); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the CC3000 + * driver. This structure provides information about the configuration + * of the CC3000 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writable because, under certain circumstances, the driver + * may modify frequency or X plate resistance values. + */ + +static struct stm32_config_s g_cc3000_info = +{ + .dev.spi_frequency = CONFIG_CC3000_SPI_FREQUENCY, + .dev.spi_mode = CONFIG_CC3000_SPI_MODE, + .dev.max_rx_size = 0, + .dev.irq_attach = wl_attach_irq, + .dev.irq_enable = wl_enable_irq, + .dev.irq_clear = wl_clear_irq, + .dev.power_enable = wl_enable_power, + .dev.chip_chip_select = wl_select, + .dev.irq_read = wl_read_irq, +#ifdef CONFIG_CC3000_PROBES + .dev.probe = probe, /* This is used for debugging */ +#endif + .handler = NULL, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the CC3000 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the CC3000 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + */ + +static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler) +{ + FAR struct stm32_config_s *priv = (FAR struct stm32_config_s *)state; + + /* Just save the handler for use when the interrupt is enabled */ + + priv->handler = handler; + return OK; +} + +static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable) +{ + FAR struct stm32_config_s *priv = (FAR struct stm32_config_s *)state; + + /* The caller should not attempt to enable interrupts if the handler + * has not yet been 'attached' + */ + + DEBUGASSERT(priv->handler || !enable); + + /* Attach and enable, or detach and disable */ + + ivdbg("enable:%d\n", enable); + if (enable) + { + (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, true, false, priv->handler); + } + else + { + (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, false, false, NULL); + } +} + +static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable) +{ + ivdbg("enable:%d\n", enable); + + /* Active high enable */ + + stm32_gpiowrite(GPIO_WIFI_EN, enable); +} + +static void wl_select(FAR struct cc3000_config_s *state, bool enable) +{ + ivdbg("enable:%d\n", enable); + + /* Active high enable */ + + stm32_gpiowrite(GPIO_WIFI_CS, enable); +} + +static void wl_clear_irq(FAR struct cc3000_config_s *state) +{ + /* Does nothing */ +} + +static bool wl_read_irq(FAR struct cc3000_config_s *state) +{ + /* Active low*/ + + return stm32_gpioread(GPIO_WIFI_INT) ? false : true; +} + +#ifdef CONFIG_CC3000_PROBES +static bool probe(FAR struct cc3000_config_s *state,int n, bool s) +{ + if (n == 0) + { + stm32_gpiowrite(GPIO_D14, s); + } + + if (n == 1) + { + stm32_gpiowrite(GPIO_D15, s); + } + + return true; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arch_wlinitialize + * + * Description: + * Each board that supports a wireless device must provide this function. + * This function is called by application-specific, setup logic to + * configure the wireless device. This function will register the driver + * as /dev/wirelessN where N is the minor device number. + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int wireless_archinitialize(size_t max_rx_size) +{ + FAR struct spi_dev_s *spi; + + /* Init SPI bus */ + + idbg("minor %d\n", minor); + DEBUGASSERT(CONFIG_CC3000_DEVMINOR == 0); + +#ifdef CONFIG_CC3000_PROBES + stm32_configgpio(GPIO_D14); + stm32_configgpio(GPIO_D15); + stm32_gpiowrite(GPIO_D14, 1); + stm32_gpiowrite(GPIO_D15, 1); +#endif + + /* Get an instance of the SPI interface */ + + spi = stm32_spibus_initialize(CONFIG_CC3000_SPIDEV); + if (!spi) + { + idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV); + return -ENODEV; + } + + /* Initialize and register the SPI CC3000 device */ + + g_cc3000_info.dev.max_rx_size = max_rx_size ? max_rx_size : CONFIG_CC3000_RX_BUFFER_SIZE; + int ret = cc3000_register(spi, &g_cc3000_info.dev, CONFIG_CC3000_DEVMINOR); + if (ret < 0) + { + idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV); + return -ENODEV; + } + + return OK; +} + +/**************************************************************************** + * Name: C3000_wlan_init + * + * Description: + * Initialize wlan driver + * + * Warning: This function must be called before ANY other wlan driver + * function + * + * Input Parameters: + * sWlanCB Asynchronous events callback. + * 0 no event call back. + * - Call back parameters: + * 1) event_type: HCI_EVNT_WLAN_UNSOL_CONNECT connect event, + * HCI_EVNT_WLAN_UNSOL_DISCONNECT disconnect event, + * HCI_EVNT_WLAN_ASYNC_SIMPLE_CONFIG_DONE config done, + * HCI_EVNT_WLAN_UNSOL_DHCP dhcp report, + * HCI_EVNT_WLAN_ASYNC_PING_REPORT ping report OR + * HCI_EVNT_WLAN_KEEPALIVE keepalive. + * 2) data: pointer to extra data that received by the event + * (NULL no data). + * 3) length: data length. + * - Events with extra data: + * HCI_EVNT_WLAN_UNSOL_DHCP: 4 bytes IP, 4 bytes Mask, + * 4 bytes default gateway, 4 bytes DHCP server and 4 bytes + * for DNS server. + * HCI_EVNT_WLAN_ASYNC_PING_REPORT: 4 bytes Packets sent, + * 4 bytes Packets received, 4 bytes Min round time, + * 4 bytes Max round time and 4 bytes for Avg round time. + * + * sFWPatches 0 no patch or pointer to FW patches + * sDriverPatches 0 no patch or pointer to driver patches + * sBootLoaderPatches 0 no patch or pointer to bootloader patches + * + * Returned Value: + * None + * + ****************************************************************************/ + +void cc3000_wlan_init(size_t max_tx_len, + tWlanCB sWlanCB, + tFWPatches sFWPatches, tDriverPatches + sDriverPatches, tBootLoaderPatches sBootLoaderPatches) +{ + wlan_init(max_tx_len, sWlanCB, sFWPatches, sDriverPatches, sBootLoaderPatches); +} + +#endif /* CONFIG_WL_CC3000 */ diff --git a/configs/nucleo-l476rg/Kconfig b/configs/nucleo-l476rg/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..7361b3f49049a288e68b4c45dd9fd27807361f1b --- /dev/null +++ b/configs/nucleo-l476rg/Kconfig @@ -0,0 +1,21 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_NUCLEO_L476RG + +config NUCLEO_L476RG_AJOY_MINBUTTONS + bool "Minimal Joystick Buttons" + default n if !STM32_USART1 + default y if STM32_USART1 + depends on AJOYSTICK + ---help--- + The Itead Joystick shield supports analog X/Y position and up to 5 + buttons. Some of these buttons may conflict with other resources + (Button F, for example, conflicts with the default USART1 pin usage). + Selecting this option will return the number of buttons to the + minimal set: SELECT (joystick down), FIRE (BUTTON B), and JUMP + (BUTTON A). + +endif # ARCH_BOARD_NUCLEO_L476RG diff --git a/configs/nucleo-l476rg/README.txt b/configs/nucleo-l476rg/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..ab8ff50b27a15c5f02e00aa029f4c07a386f768a --- /dev/null +++ b/configs/nucleo-l476rg/README.txt @@ -0,0 +1,609 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the ST +NucleoL476RG board from ST Micro. See + + http://www.st.com/nucleo-l476rg + +NucleoF476RG: + + Microprocessor: 32-bit ARM Cortex M4 at 80MHz STM32F476RGT6 + Memory: 1024 KB Flash and 96+32 KB SRAM + ADC: 2×12-bit, 2.4 MSPS A/D converter: up to 24 channels + DMA: 16-stream DMA controllers with FIFOs and burst support + Timers: Up to 11 timers: up to eight 16-bit, two 32-bit timers, two + watchdog timers, and a SysTick timer + GPIO: Up to 51 I/O ports with interrupt capability + I2C: Up to 3 × I2C interfaces + USARTs: Up to 3 USARTs, 2 UARTs, 1 LPUART + SPIs: Up to 3 SPIs + SAIs: Up to 2 dual-channel audio interfaces + CAN interface + SDIO interface + QSPI interface + USB: USB 2.0 full-speed device/host/OTG controller with on-chip PHY + CRC calculation unit + RTC + +Board features: + + Peripherals: 1 led, 1 push button + Debug: Serial wire debug and JTAG interfaces + Expansion I/F Ardino and Morpho Headers + + Uses a STM32F103 to provide a ST-Link for programming, debug similar to the + OpenOcd FTDI function - USB to JTAG front-end. + + See http://mbed.org/platforms/ST-Nucleo-L476RG for more + information about these boards. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NXFLAT Toolchain + - Hardware + - Button + - LED + - USARTs and Serial Consoles + - LQFP64 + - mbed + - Shields + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, or + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the CodeSourcery toolchain for Linux. + To use the Atollic, devkitARM, Raisonance GNU, or NuttX buildroot toolchain, + you simply need to add one of the following configuration options to your + .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=n : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=n : NuttX buildroot under Linux or Cygwin (default) + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: There are several limitations to using a Windows based toolchain in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + V=1 make clean_context all 2>&1 |tee mout + + An alias in your .bashrc file might make that less painful. + + 3. Dependencies are not made when using Windows versions of the GCC. This is + because the dependencies are generated using Windows pathes which do not + work with the Cygwin make. + + MKDEP = $(TOPDIR)/tools/mknulldeps.sh + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Using Sourcery CodeBench from http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/overview + Download and install the latest version (as of this writting it was + sourceryg++-2013.05-64-arm-none-eabi) + + Import the project from git. + File->import->Git-URI, then import a Exiting code as a Makefile progject + from the working directory the git clone was done to. + + Select the Sourcery CodeBench for ARM EABI. N.B. You must do one command line + build, before the make will work in CodeBench. + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + $ (cd tools; ./configure.sh nucleo-f4x1re/f401-nsh) + $ make qconfig + $ V=1 make context all 2>&1 | tee mout + + Use the f411-nsh configuration if you have the Nucleo-F411RE board. + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toolchain; instead use the GCC 4.3.3 EABI toolchain. + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +mbed +==== + + The Nucleo-F401RE includes boot loader from mbed: + + https://mbed.org/platforms/ST-Nucleo-F401RE/ + https://mbed.org/handbook/Homepage + + Using the mbed loader: + + 1. Connect the Nucleo-F4x1RE to the host PC using the USB connector. + 2. A new file system will appear called NUCLEO; open it with Windows + Explorer (assuming that you are using Windows). + 3. Drag and drop nuttx.bin into the MBED window. This will load the + nuttx.bin binary into the Nucleo-F4x1RE. The NUCLEO window will + close then re-open and the Nucleo-F4x1RE will be running the new code. + +Hardware +======== + + GPIO + ---- + SERIAL_TX=PA_2 USER_BUTTON=PC_13 + SERIAL_RX=PA_3 LED1 =PA_5 + + A0=PA_0 USART2RX D0=PA_3 D8 =PA_9 + A1=PA_1 USART2TX D1=PA_2 D9 =PC_7 + A2=PA_4 D2=PA_10 WIFI_CS=D10=PB_6 SPI_CS + A3=PB_0 WIFI_INT=D3=PB_3 D11=PA_7 SPI_MOSI + A4=PC_1 SDCS=D4=PB_5 D12=PA_6 SPI_MISO + A5=PC_0 WIFI_EN=D5=PB_4 LED1=D13=PA_5 SPI_SCK + LED2=D6=PB_10 I2C1_SDA=D14=PB_9 Probe + D7=PA_8 I2C1_SCL=D15=PB_8 Probe + + From: https://mbed.org/platforms/ST-Nucleo-F401RE/ + + Buttons + ------- + B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32 + microcontroller. + + LEDs + ---- + The Nucleo F401RE and Nucleo F411RE provide a single user LED, LD2. LD2 + is the green LED connected to Arduino signal D13 corresponding to MCU I/O + PA5 (pin 21) or PB13 (pin 34) depending on the STM32target. + + - When the I/O is HIGH value, the LED is on. + - When the I/O is LOW, the LED is off. + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + events as follows when the red LED (PE24) is available: + + SYMBOL Meaning LD2 + ------------------- ----------------------- ----------- + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt No change + LED_SIGNAL In a signal handler No change + LED_ASSERTION An assertion failed No change + LED_PANIC The system has crashed Blinking + LED_IDLE MCU is is sleep mode Not used + + Thus if LD2, NuttX has successfully booted and is, apparently, running + normally. If LD2 is flashing at approximately 2Hz, then a fatal error + has been detected and the system has halted. + +Serial Consoles +=============== + + USART1 + ------ + Pins and Connectors: + + RXD: PA11 CN10 pin 14 + PB7 CN7 pin 21 + TXD: PA10 CN9 pin 3, CN10 pin 33 + PB6 CN5 pin 3, CN10 pin 17 + + NOTE: You may need to edit the include/board.h to select different USART1 + pin selections. + + TTL to RS-232 converter connection: + + Nucleo CN10 STM32F4x1RE + ----------- ------------ + Pin 21 PA9 USART1_RX *Warning you make need to reverse RX/TX on + Pin 33 PA10 USART1_TX some RS-232 converters + Pin 20 GND + Pin 8 U5V + + To configure USART1 as the console: + + CONFIG_STM32_USART1=y + CONFIG_USART1_ISUART=y + CONFIG_USART1_SERIAL_CONSOLE=y + CONFIG_USART1_RXBUFSIZE=256 + CONFIG_USART1_TXBUFSIZE=256 + CONFIG_USART1_BAUD=115200 + CONFIG_USART1_BITS=8 + CONFIG_USART1_PARITY=0 + CONFIG_USART1_2STOP=0 + + USART2 + ----- + Pins and Connectors: + + RXD: PA3 CN9 pin 1 (See SB13, 14, 62, 63). CN10 pin 37 + PD6 + TXD: PA2 CN9 pin 2(See SB13, 14, 62, 63). CN10 pin 35 + PD5 + + UART2 is the default in all of these configurations. + + TTL to RS-232 converter connection: + + Nucleo CN9 STM32F4x1RE + ----------- ------------ + Pin 1 PA3 USART2_RX *Warning you make need to reverse RX/TX on + Pin 2 PA2 USART2_TX some RS-232 converters + + Solder Bridges. This configuration requires: + + - SB62 and SB63 Closed: PA2 and PA3 on STM32 MCU are connected to D1 and D0 + (pin 7 and pin 8) on Arduino connector CN9 and ST Morpho connector CN10 + as USART signals. Thus SB13 and SB14 should be OFF. + + - SB13 and SB14 Open: PA2 and PA3 on STM32F103C8T6 (ST-LINK MCU) are + disconnected to PA3 and PA2 on STM32 MCU. + + To configure USART2 as the console: + + CONFIG_STM32_USART2=y + CONFIG_USART2_ISUART=y + CONFIG_USART2_SERIAL_CONSOLE=y + CONFIG_USART2_RXBUFSIZE=256 + CONFIG_USART2_TXBUFSIZE=256 + CONFIG_USART2_BAUD=115200 + CONFIG_USART2_BITS=8 + CONFIG_USART2_PARITY=0 + CONFIG_USART2_2STOP=0 + + USART6 + ------ + Pins and Connectors: + + RXD: PC7 CN5 pin2, CN10 pin 19 + PA12 CN10, pin 12 + TXD: PC6 CN10, pin 4 + PA11 CN10, pin 14 + + To configure USART6 as the console: + + CONFIG_STM32_USART6=y + CONFIG_USART6_ISUART=y + CONFIG_USART6_SERIAL_CONSOLE=y + CONFIG_USART6_RXBUFSIZE=256 + CONFIG_USART6_TXBUFSIZE=256 + CONFIG_USART6_BAUD=115200 + CONFIG_USART6_BITS=8 + CONFIG_USART6_PARITY=0 + CONFIG_USART6_2STOP=0 + + Virtual COM Port + ---------------- + Yet another option is to use UART2 and the USB virtual COM port. This + option may be more convenient for long term development, but is painful + to use during board bring-up. + + Solder Bridges. This configuration requires: + + - SB62 and SB63 Open: PA2 and PA3 on STM32 MCU are disconnected to D1 + and D0 (pin 7 and pin 8) on Arduino connector CN9 and ST Morpho + connector CN10. + + - SB13 and SB14 Closed: PA2 and PA3 on STM32F103C8T6 (ST-LINK MCU) are + connected to PA3 and PA2 on STM32 MCU to have USART communication + between them. Thus SB61, SB62 and SB63 should be OFF. + + Configuring USART2 is the same as given above. + + Question: What BAUD should be configure to interface with the Virtual + COM port? 115200 8N1? + + Default + ------- + As shipped, SB62 and SB63 are open and SB13 and SB14 closed, so the + virtual COM port is enabled. + +Shields +======= + + RS-232 from Cutedigi.com + ------------------------ + Supports a single RS-232 connected via + + Nucleo CN9 STM32F4x1RE Cutedigi + ----------- ------------ -------- + Pin 1 PA3 USART2_RX RXD + Pin 2 PA2 USART2_TX TXD + + Support for this shield is enabled by selecting USART2 and configuring + SB13, 14, 62, and 63 as described above under "Serial Consoles" + + Itead Joystick Shield + --------------------- + See http://imall.iteadstudio.com/im120417014.html for more information + about this joystick. + + Itead Joystick Connection: + + --------- ----------------- --------------------------------- + ARDUINO ITEAD NUCLEO-F4x1 + PIN NAME SIGNAL SIGNAL + --------- ----------------- --------------------------------- + D3 Button E Output PB3 + D4 Button D Output PB5 + D5 Button C Output PB4 + D6 Button B Output PB10 + D7 Button A Output PA8 + D8 Button F Output PA9 + D9 Button G Output PC7 + A0 Joystick Y Output PA0 ADC1_0 + A1 Joystick X Output PA1 ADC1_1 + --------- ----------------- --------------------------------- + + All buttons are pulled on the shield. A sensed low value indicates + when the button is pressed. + + NOTE: Button F cannot be used with the default USART1 configuration + because PA9 is configured for USART1_RX by default. Use select + different USART1 pins in the board.h file or select a different + USART or select CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS which will + eliminate all but buttons A, B, and C. + + Itead Joystick Signal interpretation: + + --------- ----------------------- --------------------------- + BUTTON TYPE NUTTX ALIAS + --------- ----------------------- --------------------------- + Button A Large button A JUMP/BUTTON 3 + Button B Large button B FIRE/BUTTON 2 + Button C Joystick select button SELECT/BUTTON 1 + Button D Tiny Button D BUTTON 6 + Button E Tiny Button E BUTTON 7 + Button F Large Button F BUTTON 4 + Button G Large Button G BUTTON 5 + --------- ----------------------- --------------------------- + + Itead Joystick configuration settings: + + System Type -> STM32 Peripheral Support + CONFIG_STM32_ADC1=y : Enable ADC1 driver support + + Drivers + CONFIG_ANALOG=y : Should be automatically selected + CONFIG_ADC=y : Should be automatically selected + CONFIG_INPUT=y : Select input device support + CONFIG_AJOYSTICK=y : Select analog joystick support + + There is nothing in the configuration that currently uses the joystick. + For testing, you can add the following configuration options to enable the + analog joystick example at apps/examples/ajoystick: + + CONFIG_NSH_ARCHINIT=y + CONFIG_EXAMPLES_AJOYSTICK=y + CONFIG_EXAMPLES_AJOYSTICK_DEVNAME="/dev/ajoy0" + CONFIG_EXAMPLES_AJOYSTICK_SIGNO=13 + + STATUS: + 2014-12-04: + - Without ADC DMA support, it is not possible to sample both X and Y + with a single ADC. Right now, only one axis is being converted. + - There is conflicts with some of the Arduino data pins and the + default USART1 configuration. I am currently running with USART1 + but with CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS to eliminate the + conflict. + - Current showstopper: I appear to be getting infinite interrupts as + soon as joystick button interrupts are enabled. + +Configurations +============== + + f401-nsh: + --------- + Configures the NuttShell (nsh) located at apps/examples/nsh for the + Nucleo-F401RE board. The Configuration enables the serial interfaces + on UART2. Support for builtin applications is enabled, but in the base + configuration no builtin applications are selected (see NOTES below). + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Linux. That can easily be reconfigured, of course. + + CONFIG_HOST_LINUX=y : Builds under Linux + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery for Linux + + 3. Although the default console is USART2 (which would correspond to + the Virtual COM port) I have done all testing with the console + device configured for USART1 (see instruction above under "Serial + Consoles). I have been using a TTL-to-RS-232 converter connected + as shown below: + + Nucleo CN10 STM32F4x1RE + ----------- ------------ + Pin 21 PA9 USART1_RX *Warning you make need to reverse RX/TX on + Pin 33 PA10 USART1_TX some RS-232 converters + Pin 20 GND + Pin 8 U5V + + f411-nsh + -------- + This configuration is the same as the f401-nsh configuration, except + that it is configured to support the Nucleo-F411RE. diff --git a/configs/nucleo-l476rg/include/board.h b/configs/nucleo-l476rg/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..cc132e838b09596200af80d6c9491a7cbeb8b90c --- /dev/null +++ b/configs/nucleo-l476rg/include/board.h @@ -0,0 +1,234 @@ +/************************************************************************************ + * configs/nucleo-l476rg/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_NUCLEO_L476RG_INCLUDE_BOARD_H +#define __CONFIGS_NUCLEO_L476RG_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +#if defined(CONFIG_ARCH_CHIP_STM32L476RG) +# include +#endif + +/* DMA Channel/Stream Selections ****************************************************/ +/* Stream selections are arbitrary for now but might become important in the future + * is we set aside more DMA channels/streams. + */ + +/* Values defined in arch/arm/src/stm32l4/chip/stm32l4x6xx_dma.h */ + +#define DMACHAN_SDMMC DMACHAN_SDMMC_1 /* 2 choices */ + +#define DMACHAN_SPI1_RX DMACHAN_SPI1_RX_1 /* 2 choices */ +#define DMACHAN_SPI1_TX DMACHAN_SPI1_TX_1 /* 2 choices */ + +/* UART RX DMA configurations */ + +#define DMACHAN_USART1_RX DMACHAN_USART1_RX_2 + +/* Alternate function pin selections ************************************************/ + +/* USART1: + * RXD: PA10 CN9 pin 3, CN10 pin 33 + * PB7 CN7 pin 21 + * TXD: PA9 CN5 pin 1, CN10 pin 21 + * PB6 CN5 pin 3, CN10 pin 17 + */ + +#if 1 +# define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */ +# define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */ +#else +# define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */ +# define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */ +#endif + +/* USART2: Connected to STLInk Debug via PA2, PA3 + * RXD: PA3 CN9 pin 1 (See SB13, 14, 62, 63). CN10 pin 37 + * PD6 + * TXD: PA2 CN9 pin 2 (See SB13, 14, 62, 63). CN10 pin 35 + * PD5 + */ + +#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */ +#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */ +#define GPIO_USART2_RTS GPIO_USART2_RTS_2 +#define GPIO_USART2_CTS GPIO_USART2_CTS_2 + +/* I2C + * + * The optional _GPIO configurations allow the I2C driver to manually + * reset the bus to clear stuck slaves. They match the pin configuration, + * but are normally-high GPIOs. + */ + +#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2 +#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2 +#define GPIO_I2C1_SCL_GPIO \ + (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8) +#define GPIO_I2C1_SDA_GPIO \ + (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9) + +#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1 +#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1 +#define GPIO_I2C2_SCL_GPIO \ + (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10) +#define GPIO_I2C2_SDA_GPIO \ + (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11) + +/* SPI + */ + +#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 +#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 +#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 + +#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1 +#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 +#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2 + +/* LEDs + * + * The Nucleo l476RG board provides a single user LED, LD2. LD2 + * is the green LED connected to Arduino signal D13 corresponding to MCU I/O + * PA5 (pin 21) or PB13 (pin 34) depending on the STM32 target. + * + * - When the I/O is HIGH value, the LED is on. + * - When the I/O is LOW, the LED is off. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LD2 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LD2_BIT (1 << BOARD_LD2) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows when the red LED (PE24) is available: + * + * SYMBOL Meaning LD2 + * ------------------- ----------------------- ----------- + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt No change + * LED_SIGNAL In a signal handler No change + * LED_ASSERTION An assertion failed No change + * LED_PANIC The system has crashed Blinking + * LED_IDLE MCU is is sleep mode Not used + * + * Thus if LD2, NuttX has successfully booted and is, apparently, running + * normally. If LD2 is flashing at approximately 2Hz, then a fatal error + * has been detected and the system has halted. + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 0 +#define LED_IRQSENABLED 0 +#define LED_STACKCREATED 1 +#define LED_INIRQ 2 +#define LED_SIGNAL 2 +#define LED_ASSERTION 2 +#define LED_PANIC 1 + +/* Buttons + * + * B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32 + * microcontroller. + */ + +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 + +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32l4_boardinitialize + * + * Description: + * All STM32L4 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32l4_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_NUCLEO_F476RG_INCLUDE_BOARD_H */ diff --git a/configs/nucleo-l476rg/include/nucleo-l476rg.h b/configs/nucleo-l476rg/include/nucleo-l476rg.h new file mode 100644 index 0000000000000000000000000000000000000000..4e4ec25d1f85c81b86a9f0feeac18ba4b427d046 --- /dev/null +++ b/configs/nucleo-l476rg/include/nucleo-l476rg.h @@ -0,0 +1,315 @@ +/************************************************************************************ + * configs/nucleo-l476rg/include/nucleo-l476rg.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_NUCLEO_L476RG_INCLUDE_NUCLEO_L476RG_H +#define __CONFIGS_NUCLEO_L476RG_INCLUDE_NUCLEO_L476RG_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* The NUCLEOL476RG supports both HSE and LSE crystals (X2 and X3). However, as + * shipped, the X3 crystal is not populated. Therefore the Nucleo-L476RG + * will need to run off the 16MHz HSI clock, or the 32khz-synced MSI. + * + * System Clock source : PLL (HSI) + * SYSCLK(Hz) : 80000000 Determined by PLL configuration + * HCLK(Hz) : 80000000 (STM32L4_RCC_CFGR_HPRE) (Max 80 MHz) + * AHB Prescaler : 1 (STM32L4_RCC_CFGR_HPRE) (Max 80 MHz) + * APB1 Prescaler : 1 (STM32L4_RCC_CFGR_PPRE1) (Max 80 MHz) + * APB2 Prescaler : 1 (STM32L4_RCC_CFGR_PPRE2) (Max 80 MHz) + * HSI Frequency(Hz) : 16000000 (nominal) + * PLLM : 1 (STM32L4_PLLCFG_PLLM) + * PLLN : 10 (STM32L4_PLLCFG_PLLN) + * PLLP : 0 (STM32L4_PLLCFG_PLLP) + * PLLQ : 0 (STM32L4_PLLCFG_PLLQ) + * PLLR : 2 (STM32L4_PLLCFG_PLLR) + * PLLSAI1N : 12 + * PLLSAI1Q : 4 + * Flash Latency(WS) : 4 + * Prefetch Buffer : OFF + * 48MHz for USB OTG FS, : Doable if required using PLLSAI1 or MSI + * SDIO and RNG clock + */ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC + * MSI - variable up to 48 MHz, synchronized to LSE + * HSE - not installed + * LSE - 32.768 kHz installed + */ + +#define STM32L4_HSI_FREQUENCY 16000000ul +#define STM32L4_LSI_FREQUENCY 32000 +#define STM32L4_LSE_FREQUENCY 32768 + +#define STM32L4_BOARD_USEHSI 1 + +/* REVISIT: Trimming of the HSI and MSI is not yet supported. */ + +/* Main PLL Configuration. + * + * Formulae: + * + * VCO input frequency = PLL input clock frequency / PLLM, 1 <= PLLM <= 8 + * VCO output frequency = VCO input frequency × PLLN, 8 <= PLLN <= 86, frequency range 64 to 344 MHz + * PLL output P (SAI3) clock frequency = VCO frequency / PLLP, PLLP = 7, or 17, or 0 to disable + * PLL output Q (48M1) clock frequency = VCO frequency / PLLQ, PLLQ = 2, 4, 6, or 8, or 0 to disable + * PLL output R (CLK) clock frequency = VCO frequency / PLLR, PLLR = 2, 4, 6, or 8, or 0 to disable + * + * PLL output P is used for SAI + * PLL output Q is used for OTG FS, SDMMC, RNG + * PLL output R is used for SYSCLK + * PLLP = 0 (not used) + * PLLQ = 0 (not used) + * PLLR = 2 + * PLLN = 10 + * PLLM = 1 + * + * We will configure like this + * + * PLL source is HSI + * + * PLL_REF = STM32L4_HSI_FREQUENCY / PLLM + * = 16,000,000 / 1 + * = 16,000,000 + * + * PLL_VCO = PLL_REF * PLLN + * = 16,000,000 * 10 + * = 160,000,000 + * + * PLL_CLK = PLL_VCO / PLLR + * = 160,000,000 / 2 = 80,000,000 + * PLL_48M1 = disabled + * PLL_SAI3 = disabled + * + * ---------------------------------------- + * + * PLLSAI1 Configuration + * + * The clock input and M divider are identical to the main PLL. + * However the multiplier and postscalers are independent. + * The PLLSAI1 is configured only if CONFIG_STM32L4_SAI1PLL is defined + * + * SAI1VCO input frequency = PLL input clock frequency + * SAI1VCO output frequency = SAI1VCO input frequency × PLLSAI1N, 8 <= PLLSAI1N <= 86, frequency range 64 to 344 MHz + * SAI1PLL output P (SAI1) clock frequency = SAI1VCO frequency / PLLSAI1P, PLLP = 7, or 17, or 0 to disable + * SAI1PLL output Q (48M2) clock frequency = SAI1VCO frequency / PLLSAI1Q, PLLQ = 2, 4, 6, or 8, or 0 to disable + * SAI1PLL output R (ADC1) clock frequency = SAI1VCO frequency / PLLSAI1R, PLLR = 2, 4, 6, or 8, or 0 to disable + * + * We will configure like this + * + * PLLSAI1 disabled + * + * ---------------------------------------- + * + * PLLSAI2 Configuration + * + * The clock input and M divider are identical to the main PLL. + * However the multiplier and postscalers are independent. + * The PLLSAI2 is configured only if CONFIG_STM32L4_SAI2PLL is defined + * + * SAI2VCO input frequency = PLL input clock frequency + * SAI2VCO output frequency = SAI2VCO input frequency × PLLSAI2N, 8 <= PLLSAI1N <= 86, frequency range 64 to 344 MHz + * SAI2PLL output P (SAI2) clock frequency = SAI2VCO frequency / PLLSAI2P, PLLP = 7, or 17, or 0 to disable + * SAI2PLL output R (ADC2) clock frequency = SAI2VCO frequency / PLLSAI2R, PLLR = 2, 4, 6, or 8, or 0 to disable + * + * We will configure like this + * + * PLLSAI2 disabled + * + * ---------------------------------------- + * + * TODO: The STM32L is a low power peripheral and all these clocks should be configurable at runtime. + * + * ---------------------------------------- + * + * TODO These clock sources can be configured in Kconfig (this is not a board feature) + * USART1 + * USART2 + * USART3 + * UART4 + * UART5 + * LPUART1 + * I2C1 + * I2C2 + * I2C3 + * LPTIM1 + * LPTIM2 + * SAI1 + * SAI2 + * CLK48 + * ADC + * SWPMI + * DFSDM + */ + +/* prescaler common to all PLL inputs; will be 1 (XXX source is implicitly + as per comment above HSI) */ + +#define STM32L4_PLLCFG_PLLM RCC_PLLCFG_PLLM(1) + +/* 'main' PLL config; we use this to generate our system clock via the R + * output. We set it up as 16 MHz / 1 * 10 / 2 = 80 MHz + * + * XXX NOTE: currently the main PLL is implicitly turned on and is implicitly + * the system clock; this should be configurable since not all applications may + * want things done this way. + */ + +#define STM32L4_PLLCFG_PLLN RCC_PLLCFG_PLLN(10) +#define STM32L4_PLLCFG_PLLP 0 +#undef STM32L4_PLLCFG_PLLP_ENABLED +#define STM32L4_PLLCFG_PLLQ RCC_PLLCFG_PLLQ_2 +#define STM32L4_PLLCFG_PLLQ_ENABLED +#define STM32L4_PLLCFG_PLLR RCC_PLLCFG_PLLR(2) +#define STM32L4_PLLCFG_PLLR_ENABLED + +/* 'SAIPLL1' is used to generate the 48 MHz clock, since we can't + * do that with the main PLL's N value. We set N = 12, and enable + * the Q output (ultimately for CLK48) with /4. So, + * 16 MHz / 1 * 12 / 4 = 48 MHz + * + * XXX NOTE: currently the SAIPLL /must/ be explicitly selected in the + * menuconfig, or else all this is a moot point, and the various 48 MHz + * peripherals will not work (RNG at present). I would suggest removing + * that option from Kconfig altogether, and simply making it an option + * that is selected via a #define here, like all these other params. + */ + +#define STM32L4_PLLSAI1CFG_PLLN RCC_PLLSAI1CFG_PLLN(12) +#define STM32L4_PLLSAI1CFG_PLLP 0 +#undef STM32L4_PLLSAI1CFG_PLLP_ENABLED +#define STM32L4_PLLSAI1CFG_PLLQ RCC_PLLSAI1CFG_PLLQ_4 +#define STM32L4_PLLSAI1CFG_PLLQ_ENABLED +#define STM32L4_PLLSAI1CFG_PLLR 0 +#undef STM32L4_PLLSAI1CFG_PLLR_ENABLED + +/* 'SAIPLL2' is not used in this application */ + +#define STM32L4_PLLSAI2CFG_PLLN RCC_PLLSAI2CFG_PLLN(8) +#define STM32L4_PLLSAI2CFG_PLLP 0 +#undef STM32L4_PLLSAI2CFG_PLLP_ENABLED +#define STM32L4_PLLSAI2CFG_PLLR 0 +#undef STM32L4_PLLSAI2CFG_PLLR_ENABLED + +#define STM32L4_SYSCLK_FREQUENCY 80000000ul + +/* CLK48 will come from PLLSAI1 (implicitly Q) */ + +#define STM32L4_USE_CLK48 +#define STM32L4_CLK48_SEL RCC_CCIPR_CLK48SEL_PLLSAI1 + +/* enable the LSE oscillator, used automatically trim the MSI, and for RTC */ + +//#define STM32L4_USE_LSE 1 + +/* AHB clock (HCLK) is SYSCLK (80MHz) */ + +#define STM32L4_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32L4_HCLK_FREQUENCY STM32L4_SYSCLK_FREQUENCY +#define STM32L4_BOARD_HCLK STM32L4_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/1 (80MHz) */ + +#define STM32L4_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK /* PCLK1 = HCLK / 1 */ +#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY/1) + +/* Timers driven from APB1 will be twice PCLK1 */ +/* REVISIT : this can be configured */ + +#define STM32L4_APB1_TIM2_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM3_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM4_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM5_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM6_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM7_CLKIN (2*STM32L4_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK (80MHz) */ + +#define STM32L4_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK / 1 */ +#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY/1) + +/* Timers driven from APB2 will be twice PCLK2 */ +/* REVISIT : this can be configured */ + +#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY) +#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ +/* REVISIT : this can be configured */ + +/* TODO SDMMC */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_NUCLEO_L476RG_INCLUDE_NUCLEO_L476RG_H */ diff --git a/configs/nucleo-l476rg/nsh/Make.defs b/configs/nucleo-l476rg/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..523dbd8c2285bb258056b739e73f180bd31110b6 --- /dev/null +++ b/configs/nucleo-l476rg/nsh/Make.defs @@ -0,0 +1,112 @@ +############################################################################ +# configs/nucleo-l476rg/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = l476rg.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mknulldeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/nucleo-l476rg/nsh/defconfig b/configs/nucleo-l476rg/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..10abc31849555e8ac3305c39b940ee1d1709f956 --- /dev/null +++ b/configs/nucleo-l476rg/nsh/defconfig @@ -0,0 +1,942 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_DEBUG_VERBOSE=y + +# +# Subsystem Debug Options +# +CONFIG_DEBUG_AUDIO=y +CONFIG_DEBUG_BINFMT=y +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_GRAPHICS=y +CONFIG_DEBUG_LIB=y +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_HEAP is not set +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +CONFIG_DEBUG_LEDS=y +CONFIG_DEBUG_ANALOG=y +CONFIG_DEBUG_GPIO=y +CONFIG_DEBUG_SPI=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +CONFIG_ARCH_CHIP_STM32L4=y +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32l4" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set +# CONFIG_DEBUG_HARDFAULT is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set + +# +# STM32L4 Configuration Options +# +CONFIG_ARCH_CHIP_STM32L476RG=y +# CONFIG_ARCH_CHIP_STM32L476RE is not set +# CONFIG_ARCH_CHIP_STM32L486 is not set +CONFIG_STM32L4_STM32L476XX=y +# CONFIG_STM32L4_STM32L486XX is not set +# CONFIG_STM32L4_FLASH_256KB is not set +# CONFIG_STM32L4_FLASH_512KB is not set +CONFIG_STM32L4_FLASH_1024KB=y + +# +# STM32L4 Peripheral Support +# +# CONFIG_STM32L4_HAVE_LTDC is not set +# CONFIG_STM32L4_ADC is not set +# CONFIG_STM32L4_CAN is not set +# CONFIG_STM32L4_DAC is not set +# CONFIG_STM32L4_DMA is not set +# CONFIG_STM32L4_I2C is not set +# CONFIG_STM32L4_SAI is not set +# CONFIG_STM32L4_SPI is not set +CONFIG_STM32L4_USART=y +# CONFIG_STM32L4_LPTIM is not set + +# +# AHB1 Peripherals +# +# CONFIG_STM32L4_DMA1 is not set +# CONFIG_STM32L4_DMA2 is not set +# CONFIG_STM32L4_CRC is not set +# CONFIG_STM32L4_TSC is not set + +# +# AHB2 Peripherals +# +# CONFIG_STM32L4_OTGFS is not set +# CONFIG_STM32L4_ADC1 is not set +# CONFIG_STM32L4_ADC2 is not set +# CONFIG_STM32L4_ADC3 is not set +# CONFIG_STM32L4_AES is not set +# CONFIG_STM32L4_RNG is not set + +# +# AHB3 Peripherals +# +# CONFIG_STM32L4_FMC is not set +# CONFIG_STM32L4_QUADSPI is not set + +# +# APB1 Peripherals +# +# CONFIG_STM32L4_TIM2 is not set +# CONFIG_STM32L4_TIM3 is not set +# CONFIG_STM32L4_TIM4 is not set +# CONFIG_STM32L4_TIM5 is not set +# CONFIG_STM32L4_TIM6 is not set +# CONFIG_STM32L4_TIM7 is not set +# CONFIG_STM32L4_LCD is not set +# CONFIG_STM32L4_SPI2 is not set +# CONFIG_STM32L4_SPI3 is not set +# CONFIG_STM32L4_USART1 is not set +CONFIG_STM32L4_USART2=y +# CONFIG_STM32L4_USART3 is not set +# CONFIG_STM32L4_UART4 is not set +# CONFIG_STM32L4_UART5 is not set +# CONFIG_STM32L4_I2C1 is not set +# CONFIG_STM32L4_I2C2 is not set +# CONFIG_STM32L4_I2C3 is not set +# CONFIG_STM32L4_CAN1 is not set +# CONFIG_STM32L4_DAC1 is not set +# CONFIG_STM32L4_DAC2 is not set +# CONFIG_STM32L4_OPAMP is not set +# CONFIG_STM32L4_LPTIM1 is not set +# CONFIG_STM32L4_LPUART1 is not set +# CONFIG_STM32L4_SWPMI is not set +# CONFIG_STM32L4_LPTIM2 is not set + +# +# APB2 Peripherals +# +CONFIG_STM32L4_SYSCFG=y +CONFIG_STM32L4_FIREWALL=y +# CONFIG_STM32L4_SDMMC1 is not set +# CONFIG_STM32L4_TIM1 is not set +# CONFIG_STM32L4_SPI1 is not set +# CONFIG_STM32L4_TIM8 is not set +# CONFIG_STM32L4_TIM15 is not set +# CONFIG_STM32L4_TIM16 is not set +# CONFIG_STM32L4_TIM17 is not set +# CONFIG_STM32L4_SAI1 is not set +# CONFIG_STM32L4_SAI2 is not set +# CONFIG_STM32L4_DFSDM is not set + +# +# Other Peripherals +# +# CONFIG_STM32L4_BKPSRAM is not set +# CONFIG_STM32L4_IWDG is not set +# CONFIG_STM32L4_WWDG is not set +CONFIG_STM32L4_FLASH_PREFETCH=y +CONFIG_STM32L4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32L4_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32L4_SAI1PLL is not set +# CONFIG_STM32L4_SAI2PLL is not set + +# +# U[S]ART Configuration +# +# CONFIG_STM32L4_FLOWCONTROL_BROKEN is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8499 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=98304 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NUCLEO_L476RG=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleo-l476rg" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=5 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=8192 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +CONFIG_EXAMPLES_OSTEST_WAITRESULT=y +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_RAMTRON is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-l476rg/nsh/setenv.sh b/configs/nucleo-l476rg/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c66a21a3ef3ce1431fe9b888795fbadc5e395930 --- /dev/null +++ b/configs/nucleo-l476rg/nsh/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/nucleo-l476rg/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/nucleo-l476rg/scripts/l476rg.ld b/configs/nucleo-l476rg/scripts/l476rg.ld new file mode 100644 index 0000000000000000000000000000000000000000..94c512fec54d222f04a86d4ae630575be198e149 --- /dev/null +++ b/configs/nucleo-l476rg/scripts/l476rg.ld @@ -0,0 +1,119 @@ +/**************************************************************************** + * configs/nucleo-l476rg/scripts/l476rg.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Sebastien Lorquet + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F411RE has 512Kb of FLASH beginning at address 0x0800:0000 and + * 128Kb of SRAM beginning at address 0x2000:0000. When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 96K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32L476RG has 96Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/nucleo-l476rg/src/Makefile b/configs/nucleo-l476rg/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..46faa0d565b9217412498c4b42ea7378badbd628 --- /dev/null +++ b/configs/nucleo-l476rg/src/Makefile @@ -0,0 +1,69 @@ +############################################################################ +# configs/nucleo-l476rg/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_WL_CC3000),y) +CSRCS += stm32_wireless.c +ifeq ($(CONFIG_CC3000_PROBES),) +CSRCS += stm32_io.c +endif +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += stm32_adc.c +ifeq ($(CONFIG_AJOYSTICK),y) +CSRCS += stm32_ajoystick.c +endif +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/nucleo-l476rg/src/nucleo-l476rg.h b/configs/nucleo-l476rg/src/nucleo-l476rg.h new file mode 100644 index 0000000000000000000000000000000000000000..b5b56eb5a0c1b61374f7d5a52f776f325323a2d0 --- /dev/null +++ b/configs/nucleo-l476rg/src/nucleo-l476rg.h @@ -0,0 +1,336 @@ +/************************************************************************************ + * configs/nucleo-l476rg/src/nucleo-l476rg.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Authors: Frank Bennett + * Gregory Nutt + * Sebastien Lorquet + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_NUCLEO_L476RG_SRC_NUCLEO_L476RG_H +#define __CONFIGS_NUCLEO_L476RG_SRC_NUCLEO_L476RG_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#define HAVE_MMCSD 1 +#if !defined(CONFIG_STM32_SDIO) || !defined(CONFIG_MMCSD) || \ + !defined(CONFIG_MMCSD_SDIO) +# undef HAVE_MMCSD +#endif + +/* LED. User LD2: the green LED is a user LED connected to Arduino signal D13 + * corresponding to MCU I/O PA5 (pin 21) or PB13 (pin 34) depending on the STM32 + * target. + * + * - When the I/O is HIGH value, the LED is on. + * - When the I/O is LOW, the LED is off. + */ + +#define GPIO_LD2 \ + (GPIO_PORTA | GPIO_PIN5 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PULLUP | \ + GPIO_SPEED_50MHz) + +/* Buttons + * + * B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32 + * microcontroller. + */ + +#define MIN_IRQBUTTON BUTTON_USER +#define MAX_IRQBUTTON BUTTON_USER +#define NUM_IRQBUTTONS 1 + +#define GPIO_BTN_USER \ + (GPIO_INPUT |GPIO_FLOAT |GPIO_EXTI | GPIO_PORTC | GPIO_PIN13) + +/* The shield uses the following pins: + * + * +5V + * GND + * SERIAL_TX=PA_2 USER_BUTTON=PC_13 + * SERIAL_RX=PA_3 LD2=PA_5 + * + * Analog Digital + * A0=PA_0 USART2RX D0=PA_3 D8 =PA_9 + * A1=PA_1 USART2TX D1=PA_2 D9 =PC_7 + * A2=PA_4 D2=PA_10 WIFI_CS=D10=PB_6 SPI_CS + * A3=PB_0 WIFI_INT=D3=PB_3 D11=PA_7 SPI_MOSI + * A4=PC_1 SD_CS=D4=PB_5 D12=PA_6 SPI_MISO + * A5=PC_0 WIFI_EN=D5=PB_4 LD2=D13=PA_5 SPI_SCK + * LED2=D6=PB_10 I2C1_SDA=D14=PB_9 WIFI Probe + * D7=PA_8 I2C1_SCL=D15=PB_8 WIFI Probe + * + * mostly from: https://mbed.org/platforms/ST-Nucleo-F401RE/ + * + */ + +#ifdef CONFIG_WL_CC3000 +# define GPIO_WIFI_INT (GPIO_PORTB | GPIO_PIN3 | GPIO_INPUT | \ + GPIO_PULLUP | GPIO_EXTI) +# define GPIO_WIFI_EN (GPIO_PORTB | GPIO_PIN4 | GPIO_OUTPUT_CLEAR | \ + GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) +# define GPIO_WIFI_CS (GPIO_PORTB | GPIO_PIN6 | GPIO_OUTPUT_SET | \ + GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) +# define GPIO_D14 (GPIO_PORTB | GPIO_PIN9 | GPIO_OUTPUT_CLEAR | \ + GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) +# define GPIO_D15 (GPIO_PORTB | GPIO_PIN8 | GPIO_OUTPUT_CLEAR | \ + GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) +# define GPIO_D0 (GPIO_PORTA | GPIO_PIN3 | GPIO_INPUT | \ + GPIO_PULLUP) +# define GPIO_D1 (GPIO_PORTA | GPIO_PIN2 | GPIO_OUTPUT_CLEAR | \ + GPIO_PULLUP) +# define GPIO_D2 (GPIO_PORTA | GPIO_PIN10 | GPIO_OUTPUT_CLEAR | \ + GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) +# define GPIO_A0 (GPIO_PORTA | GPIO_PIN0 | GPIO_OUTPUT_SET | \ + GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) +# define GPIO_A1 (GPIO_PORTA | GPIO_PIN1 | GPIO_OUTPUT_SET | \ + GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) +# define GPIO_A2 (GPIO_PORTA | GPIO_PIN4 | GPIO_INPUT | \ + GPIO_PULLUP) +# define GPIO_A3 (GPIO_PORTB | GPIO_PIN0 | GPIO_INPUT | \ + GPIO_PULLUP) +#endif + +/* SPI1 off */ + +#define GPIO_SPI1_MOSI_OFF (GPIO_INPUT | GPIO_PULLDOWN | \ + GPIO_PORTA | GPIO_PIN7) +#define GPIO_SPI1_MISO_OFF (GPIO_INPUT | GPIO_PULLDOWN | \ + GPIO_PORTA | GPIO_PIN6) +#define GPIO_SPI1_SCK_OFF (GPIO_INPUT | GPIO_PULLDOWN | \ + GPIO_PORTA | GPIO_PIN5) + +/* SPI1 chip selects off */ + +#ifdef CONFIG_WL_CC3000 +# define GPIO_SPI_CS_WIFI_OFF \ + (GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \ + GPIO_PORTB | GPIO_PIN6) +#endif + +#ifdef HAVE_MMCSD +# define GPIO_SPI_CS_SD_CARD_OFF \ + (GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \ + GPIO_PORTB | GPIO_PIN5) +#endif + +/* SPI chip selects */ + +#ifdef CONFIG_WL_CC3000 +# define GPIO_SPI_CS_WIFI \ + (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \ + GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN6) +#endif + +#ifdef HAVE_MMCSD +# define GPIO_SPI_CS_SD_CARD \ + (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \ + GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN5) +#endif + +/* Devices on the onboard bus. + * + * Note that these are unshifted addresses. + */ + +#define NUCLEO_I2C_OBDEV_LED 0x55 +#define NUCLEO_I2C_OBDEV_HMC5883 0x1e + +/* User GPIOs + * + * GPIO0-1 are for probing WIFI status + */ + +#ifdef CONFIG_WL_CC3000 +# define GPIO_GPIO0_INPUT \ + (GPIO_INPUT | GPIO_PULLUP | GPIO_PORTB | GPIO_PIN8) +# define GPIO_GPIO1_INPUT \ + (GPIO_INPUT | GPIO_PULLUP | GPIO_PORTB | GPIO_PIN9) +# define GPIO_GPIO0_OUTPUT \ + (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \ + GPIO_OUTPUT_CLEAR | GPIO_PORTB | GPIO_PIN8) +# define GPIO_GPIO1_OUTPUT \ + (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \ + GPIO_OUTPUT_CLEAR | GPIO_PORTB | GPIO_PIN9) +#endif + +/* Itead Joystick Shield + * + * See http://imall.iteadstudio.com/im120417014.html for more information + * about this joystick. + * + * --------- ----------------- --------------------------------- + * ARDUINO ITEAD NUCLEO-F4x1 + * PIN NAME SIGNAL SIGNAL + * --------- ----------------- --------------------------------- + * D3 Button E Output PB3 + * D4 Button D Output PB5 + * D5 Button C Output PB4 + * D6 Button B Output PB10 + * D7 Button A Output PA8 + * D8 Button F Output PA9 + * D9 Button G Output PC7 + * A0 Joystick Y Output PA0 ADC1_0 + * A1 Joystick X Output PA1 ADC1_1 + * --------- ----------------- --------------------------------- + * + * All buttons are pulled on the shield. A sensed low value indicates + * when the button is pressed. + * + * NOTE: Button F cannot be used with the default USART1 configuration + * because PA9 is configured for USART1_RX by default. Use select + * different USART1 pins in the board.h file or select a different + * USART or select CONFIG_NUCLEO_L476RG_AJOY_MINBUTTONS which will + * eliminate all but buttons A, B, and C. + */ + +#define ADC_XOUPUT 1 /* X output is on ADC channel 1 */ +#define ADC_YOUPUT 0 /* Y output is on ADC channel 0 */ + +#define GPIO_BUTTON_A \ + (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTA | GPIO_PIN8) +#define GPIO_BUTTON_B \ + (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTB | GPIO_PIN10) +#define GPIO_BUTTON_C \ + (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTB | GPIO_PIN4) +#define GPIO_BUTTON_D \ + (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTB | GPIO_PIN5) +#define GPIO_BUTTON_E \ + (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTB | GPIO_PIN3) +#define GPIO_BUTTON_F \ + (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTA | GPIO_PIN9) +#define GPIO_BUTTON_G \ + (GPIO_INPUT | GPIO_PULLUP |GPIO_EXTI | GPIO_PORTC | GPIO_PIN7) + +/* Itead Joystick Signal interpretation: + * + * --------- ----------------------- --------------------------- + * BUTTON TYPE NUTTX ALIAS + * --------- ----------------------- --------------------------- + * Button A Large button A JUMP/BUTTON 3 + * Button B Large button B FIRE/BUTTON 2 + * Button C Joystick select button SELECT/BUTTON 1 + * Button D Tiny Button D BUTTON 6 + * Button E Tiny Button E BUTTON 7 + * Button F Large Button F BUTTON 4 + * Button G Large Button G BUTTON 5 + * --------- ----------------------- --------------------------- + */ + +#define GPIO_BUTTON_1 GPIO_BUTTON_C +#define GPIO_BUTTON_2 GPIO_BUTTON_B +#define GPIO_BUTTON_3 GPIO_BUTTON_A +#define GPIO_BUTTON_4 GPIO_BUTTON_F +#define GPIO_BUTTON_5 GPIO_BUTTON_G +#define GPIO_BUTTON_6 GPIO_BUTTON_D +#define GPIO_BUTTON_7 GPIO_BUTTON_E + +#define GPIO_SELECT GPIO_BUTTON_1 +#define GPIO_FIRE GPIO_BUTTON_2 +#define GPIO_JUMP GPIO_BUTTON_3 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/* Global driver instances */ + +#ifdef CONFIG_STM32_SPI1 +extern struct spi_dev_s *g_spi1; +#endif +#ifdef CONFIG_STM32_SPI2 +extern struct spi_dev_s *g_spi2; +#endif +#ifdef HAVE_MMCSD +extern struct sdio_dev_s *g_sdio; +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spiinitialize + * + * Description: + * Called to configure SPI chip select GPIO pins. + * + ************************************************************************************/ + +void stm32_spiinitialize(void); + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins. + * + ************************************************************************************/ + +void stm32_usbinitialize(void); + +/************************************************************************************ + * Name: board_adc_initialize + * + * Description: + * Initialize and register the ADC driver(s) + * + ************************************************************************************/ + +#ifdef CONFIG_ADC +int board_adc_initialize(void); +#endif + +/**************************************************************************** + * Name: board_ajoy_initialize + * + * Description: + * Initialize and register the button joystick driver + * + ****************************************************************************/ + +#ifdef CONFIG_AJOYSTICK +int board_ajoy_initialize(void); +#endif + +#endif /* __CONFIGS_NUCLEO_L476RG_SRC_NUCLEO_L476RG_H */ diff --git a/configs/nucleo-l476rg/src/stm32_adc.c b/configs/nucleo-l476rg/src/stm32_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..45329b381785f2073d721e080e90bab5f13adc48 --- /dev/null +++ b/configs/nucleo-l476rg/src/stm32_adc.c @@ -0,0 +1,181 @@ +/************************************************************************************ + * configs/nucleo-l476rg/src/stm32_adc.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32l4_pwm.h" +#include "nucleo-l476rg.h" + +#ifdef CONFIG_STM32_ADC1 + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* The number of ADC channels in the conversion list */ + +#ifdef CONFIG_ADC_DMA +# define ADC1_NCHANNELS 2 +#else +# define ADC1_NCHANNELS 1 +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* Identifying number of each ADC channel. */ + +#ifdef CONFIG_STM32_ADC1 +#ifdef CONFIG_AJOYSTICK +#ifdef CONFIG_ADC_DMA +/* The Itead analog joystick gets inputs on ADC_IN0 and ADC_IN1 */ + +static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {0, 1}; + +/* Configurations of pins used byte each ADC channels */ + +static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN0, GPIO_ADC1_IN0}; + +#else +/* Without DMA, only a single channel can be supported */ + +/* The Itead analog joystick gets input on ADC_IN0 */ + +static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {0}; + +/* Configurations of pins used byte each ADC channels */ + +static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN0}; + +#endif /* CONFIG_ADC_DMA */ +#endif /* CONFIG_AJOYSTICK */ +#endif /* CONFIG_STM32_ADC1*/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_initialize + * + * Description: + * Initialize and register the ADC driver + * + ************************************************************************************/ + +int board_adc_initialize(void) +{ + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + int i; + + /* Check if we have already initialized */ + + if (!initialized) + { +#ifdef CONFIG_STM32_ADC1 + /* Configure the pins as analog inputs for the selected channels */ + + for (i = 0; i < ADC1_NCHANNELS; i++) + { + stm32_configgpio(g_adc1_pinlist[i]); + } + + /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + + adc = stm32_adcinitialize(1, g_adc1_chanlist, ADC1_NCHANNELS); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } +#endif + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +#ifdef CONFIG_EXAMPLES_ADC +int board_adc_setup(void) +{ +#ifdef CONFIG_SAMA5_ADC + return board_adc_initialize(); +#else + return -ENOSYS; +#endif +} +#endif /* CONFIG_EXAMPLES_ADC */ + +#endif /* CONFIG_STM32_ADC1 */ diff --git a/configs/nucleo-l476rg/src/stm32_ajoystick.c b/configs/nucleo-l476rg/src/stm32_ajoystick.c new file mode 100644 index 0000000000000000000000000000000000000000..53d58a77d9b15ee87f84f974861acdefa4962d5c --- /dev/null +++ b/configs/nucleo-l476rg/src/stm32_ajoystick.c @@ -0,0 +1,507 @@ +/**************************************************************************** + * configs/nucleo-f3x1re/src/stm32_ajoystick.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "stm32l4_gpio.h" +#include "stm32l4_adc.h" +#include "chip/stm32l4_adc.h" +#include "nucleo-l476rg.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Check for pre-requisites and pin conflicts */ + +#ifdef CONFIG_AJOYSTICK +# if !defined(CONFIG_ADC) +# error CONFIG_ADC is required for the Itead joystick +# undef CONFIG_AJOYSTICK +# elif !defined(CONFIG_STM32_ADC1) +# error CONFIG_STM32_ADC1 is required for Itead joystick +# undef CONFIG_AJOYSTICK +# endif +#endif /* CONFIG_AJOYSTICK */ + +#ifdef CONFIG_AJOYSTICK + +/* A no-ADC, buttons only version can be built for testing */ + +#undef NO_JOYSTICK_ADC + +/* Maximum number of ADC channels */ + +#define MAX_ADC_CHANNELS 8 + +/* Dual channel ADC support requires DMA */ + +#ifdef CONFIG_ADC_DMA +# define NJOYSTICK_CHANNELS 2 +#else +# define NJOYSTICK_CHANNELS 1 +#endif + +#ifdef CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS +/* Number of Joystick buttons */ + +# define AJOY_NGPIOS 3 + +/* Bitset of supported Joystick buttons */ + +# define AJOY_SUPPORTED (AJOY_BUTTON_1_BIT | AJOY_BUTTON_2_BIT | \ + AJOY_BUTTON_3_BIT) +#else +/* Number of Joystick buttons */ + +# define AJOY_NGPIOS 7 + +/* Bitset of supported Joystick buttons */ + +# define AJOY_SUPPORTED (AJOY_BUTTON_1_BIT | AJOY_BUTTON_2_BIT | \ + AJOY_BUTTON_3_BIT | AJOY_BUTTON_4_BIT | \ + AJOY_BUTTON_5_BIT | AJOY_BUTTON_6_BIT | \ + AJOY_BUTTON_7_BIT ) +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower); +static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower, + FAR struct ajoy_sample_s *sample); +static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower); +static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower, + ajoy_buttonset_t press, ajoy_buttonset_t release, + ajoy_handler_t handler, FAR void *arg); + +static void ajoy_disable(void); +static int ajoy_interrupt(int irq, FAR void *context); + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each Itead joystick button. Index using AJOY_* + * button definitions in include/nuttx/input/ajoystick.h. + */ + +#ifdef CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS +static const uint32_t g_joygpio[AJOY_NGPIOS] = +{ + GPIO_BUTTON_1, GPIO_BUTTON_2, GPIO_BUTTON_3 +}; +#else +static const uint32_t g_joygpio[AJOY_NGPIOS] = +{ + GPIO_BUTTON_1, GPIO_BUTTON_2, GPIO_BUTTON_3, GPIO_BUTTON_4, + GPIO_BUTTON_5, GPIO_BUTTON_6, GPIO_BUTTON_7 +}; +#endif + +/* This is the button joystick lower half driver interface */ + +static const struct ajoy_lowerhalf_s g_ajoylower = +{ + .al_supported = ajoy_supported, + .al_sample = ajoy_sample, + .al_buttons = ajoy_buttons, + .al_enable = ajoy_enable, +}; + +#ifndef NO_JOYSTICK_ADC +/* Descriptor for the open ADC driver */ + +static int g_adcfd = -1; +#endif + +/* Current interrupt handler and argument */ + +static ajoy_handler_t g_ajoyhandler; +static FAR void *g_ajoyarg; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: ajoy_supported + * + * Description: + * Return the set of buttons supported on the button joystick device + * + ****************************************************************************/ + +static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower) +{ + ivdbg("Supported: %02x\n", AJOY_SUPPORTED); + return (ajoy_buttonset_t)AJOY_SUPPORTED; +} + +/**************************************************************************** + * Name: ajoy_sample + * + * Description: + * Return the current state of all button joystick buttons + * + ****************************************************************************/ + +static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower, + FAR struct ajoy_sample_s *sample) +{ +#ifndef NO_JOYSTICK_ADC + struct adc_msg_s adcmsg[MAX_ADC_CHANNELS]; + FAR struct adc_msg_s *ptr; + ssize_t nread; + ssize_t offset; + int have; + int i; + + /* Read all of the available samples (handling the case where additional + * channels are enabled). + */ + + nread = read(g_adcfd, adcmsg, MAX_ADC_CHANNELS * sizeof(struct adc_msg_s)); + if (nread < 0) + { + int errcode = get_errno(); + if (errcode != EINTR) + { + idbg("ERROR: read failed: %d\n", errcode); + } + + return -errcode; + } + else if (nread < NJOYSTICK_CHANNELS * sizeof(struct adc_msg_s)) + { + idbg("ERROR: read too small: %ld\n", (long)nread); + return -EIO; + } + + /* Sample and the raw analog inputs */ + +#ifdef CONFIG_ADC_DMA + have = 0; + +#else + /* If DMA is not supported, then we will have only a single ADC channel */ + + have = 2; + sample->as_y = 0; +#endif + + for (i = 0, offset = 0; + i < MAX_ADC_CHANNELS && offset < nread && have != 3; + i++, offset += sizeof(struct adc_msg_s)) + { + ptr = &adcmsg[i]; + + /* Is this one of the channels that we need? */ + + if ((have & 1) == 0 && ptr->am_channel == 0) + { + int32_t tmp = ptr->am_data; + sample->as_x = (int16_t)tmp; + have |= 1; + + ivdbg("X sample: %ld -> %d\n", (long)tmp, (int)sample->as_x); + } + +#ifdef CONFIG_ADC_DMA + if ((have & 2) == 0 && ptr->am_channel == 1) + { + int32_t tmp = ptr->am_data; + sample->as_y = (int16_t)tmp; + have |= 2; + + ivdbg("Y sample: %ld -> %d\n", (long)tmp, (int)sample->as_y); + } +#endif + } + + if (have != 3) + { + idbg("ERROR: Could not find joystick channels\n"); + return -EIO; + } + +#else + /* ADC support is disabled */ + + sample->as_x = 0; + sample->as_y = 0; +#endif + + /* Sample the discrete button inputs */ + + sample->as_buttons = ajoy_buttons(lower); + ivdbg("Returning: %02x\n", sample->as_buttons); + return OK; +} + +/**************************************************************************** + * Name: ajoy_buttons + * + * Description: + * Return the current state of button data (only) + * + ****************************************************************************/ + +static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower) +{ + ajoy_buttonset_t ret = 0; + int i; + + /* Read each joystick GPIO value */ + + for (i = 0; i < AJOY_NGPIOS; i++) + { + /* Button outputs are pulled high. So a sensed low level means that the + * button is pressed. + */ + + if (!stm32_gpioread(g_joygpio[i])) + { + ret |= (1 << i); + } + } + + ivdbg("Returning: %02x\n", ret); + return ret; +} + +/**************************************************************************** + * Name: ajoy_enable + * + * Description: + * Enable interrupts on the selected set of joystick buttons. And empty + * set will disable all interrupts. + * + ****************************************************************************/ + +static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower, + ajoy_buttonset_t press, ajoy_buttonset_t release, + ajoy_handler_t handler, FAR void *arg) +{ + irqstate_t flags; + ajoy_buttonset_t either = press | release; + ajoy_buttonset_t bit; + bool rising; + bool falling; + int i; + + /* Start with all interrupts disabled */ + + flags = enter_critical_section(); + ajoy_disable(); + + illvdbg("press: %02x release: %02x handler: %p arg: %p\n", + press, release, handler, arg); + + /* If no events are indicated or if no handler is provided, then this + * must really be a request to disable interrupts. + */ + + if (either && handler) + { + /* Save the new the handler and argument */ + + g_ajoyhandler = handler; + g_ajoyarg = arg; + + /* Check each GPIO. */ + + for (i = 0; i < AJOY_NGPIOS; i++) + { + /* Enable interrupts on each pin that has either a press or + * release event associated with it. + */ + + bit = (1 << i); + if ((either & bit) != 0) + { + /* Active low so a press corresponds to a falling edge and + * a release corresponds to a rising edge. + */ + + falling = ((press & bit) != 0); + rising = ((release & bit) != 0); + + illvdbg("GPIO %d: rising: %d falling: %d\n", + i, rising, falling); + + (void)stm32_gpiosetevent(g_joygpio[i], rising, falling, + true, ajoy_interrupt); + } + } + } + + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: ajoy_disable + * + * Description: + * Disable all joystick interrupts + * + ****************************************************************************/ + +static void ajoy_disable(void) +{ + irqstate_t flags; + int i; + + /* Disable each joystick interrupt */ + + flags = up_irq_save(); + for (i = 0; i < AJOY_NGPIOS; i++) + { + (void)stm32_gpiosetevent(g_joygpio[i], false, false, false, NULL); + } + + up_irq_restore(flags); + + /* Nullify the handler and argument */ + + g_ajoyhandler = NULL; + g_ajoyarg = NULL; +} + +/**************************************************************************** + * Name: ajoy_interrupt + * + * Description: + * Discrete joystick interrupt handler + * + ****************************************************************************/ + +static int ajoy_interrupt(int irq, FAR void *context) +{ + DEBUGASSERT(g_ajoyhandler); + + if (g_ajoyhandler) + { + g_ajoyhandler(&g_ajoylower, g_ajoyarg); + } + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_ajoy_initialize + * + * Description: + * Initialize and register the button joystick driver + * + ****************************************************************************/ + +int board_ajoy_initialize(void) +{ + int ret; + int i; + +#ifndef NO_JOYSTICK_ADC + ivdbg("Initialize ADC driver: /dev/adc0\n"); + + /* Initialize ADC. We will need this to read the ADC inputs */ + + ret = board_adc_initialize(); + if (ret < 0) + { + idbg("ERROR: board_adc_initialize() failed: %d\n", ret); + return ret; + } + + /* Open the ADC driver for reading */ + + g_adcfd = open("/dev/adc0", O_RDONLY); + if (g_adcfd < 0) + { + int errcode = get_errno(); + idbg("ERROR: Failed to open /dev/adc0: %d\n", errcode); + return -errcode; + } +#endif + + /* Configure the GPIO pins as interrupting inputs. NOTE: This is + * unnecessary for interrupting pins since it will also be done by + * stm32_gpiosetevent(). + */ + + for (i = 0; i < AJOY_NGPIOS; i++) + { + /* Configure the PIO as an input */ + + stm32_configgpio(g_joygpio[i]); + } + + /* Register the joystick device as /dev/ajoy0 */ + + ivdbg("Initialize joystick driver: /dev/ajoy0\n"); + + ret = ajoy_register("/dev/ajoy0", &g_ajoylower); + if (ret < 0) + { + idbg("ERROR: ajoy_register failed: %d\n", ret); +#ifndef NO_JOYSTICK_ADC + close(g_adcfd); + g_adcfd = -1; +#endif + } + + return ret; +} + +#endif /* CONFIG_AJOYSTICK */ diff --git a/configs/nucleo-l476rg/src/stm32_appinit.c b/configs/nucleo-l476rg/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..b7f5f1e6b4de2dbc978c3773316f22327e890c5f --- /dev/null +++ b/configs/nucleo-l476rg/src/stm32_appinit.c @@ -0,0 +1,141 @@ +/**************************************************************************** + * configs/nucleo-l476rg/src/stm32_appinit.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include + +#include "nucleo-l476rg.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_netinitialize + * + * Description: + * Dummy function expected to start-up logic. + * + ****************************************************************************/ + +#ifdef CONFIG_WL_CC3000 +void up_netinitialize(void) +{ +} +#endif + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(HAVE_MMCSD) || defined(CONFIG_AJOYSTICK) + int ret; +#endif + + /* Configure CPU load estimation */ + +#ifdef CONFIG_SCHED_INSTRUMENTATION + cpuload_initialize_once(); +#endif + +#ifdef HAVE_MMCSD + /* First, get an instance of the SDIO interface */ + + g_sdio = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!g_sdio) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, g_sdio); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", + ret); + return ret; + } + + /* Then let's guess and say that there is a card in the slot. There is no + * card detect GPIO. + */ + + sdio_mediachange(g_sdio, true); + + syslog(LOG_INFO, "[boot] Initialized SDIO\n"); +#endif + +#ifdef CONFIG_AJOYSTICK + /* Initialize and register the joystick driver */ + + ret = board_ajoy_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to register the joystick driver: %d\n", + ret); + return ret; + } +#endif + + return OK; +} diff --git a/configs/nucleo-l476rg/src/stm32_autoleds.c b/configs/nucleo-l476rg/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..a280311138c31364ec93b81223d78eba77a3a69e --- /dev/null +++ b/configs/nucleo-l476rg/src/stm32_autoleds.c @@ -0,0 +1,120 @@ +/**************************************************************************** + * configs/nucleo-l476rg/src/stm32l4_autoleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32l4.h" +#include "nucleo-l476rg.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LD2 GPIO for output */ + + stm32l4_configgpio(GPIO_LD2); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led == 1) + { + stm32l4_gpiowrite(GPIO_LD2, true); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == 1) + { + stm32l4_gpiowrite(GPIO_LD2, false); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/nucleo-l476rg/src/stm32_boot.c b/configs/nucleo-l476rg/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..52d1a28f08f8c79258c7ee69ba8f68c307bf9ccc --- /dev/null +++ b/configs/nucleo-l476rg/src/stm32_boot.c @@ -0,0 +1,133 @@ +/************************************************************************************ + * configs/nucleo-l476rg/src/stm32_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include + +#include "up_arch.h" +#include "nucleo-l476rg.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32l4_boardinitialize + * + * Description: + * All STM32L4 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32l4_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + + /* Configure SPI chip selects if 1) SP2 is not disabled, and 2) the weak function + * stm32_spiinitialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + stm32l4_spiinitialize(); +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB) + stm32l4_usbinitialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_NSH_ARCHINIT) + board_app_initialize(); +#endif + + /* CC3000 wireless initialization */ + +#ifdef CONFIG_WL_CC3000 + wireless_archinitialize(0); +#endif +} +#endif diff --git a/configs/nucleo-l476rg/src/stm32_buttons.c b/configs/nucleo-l476rg/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..f9211a13c7da39a86e55d952de6be983eb9ad41f --- /dev/null +++ b/configs/nucleo-l476rg/src/stm32_buttons.c @@ -0,0 +1,138 @@ +/**************************************************************************** + * configs/nucleo-l476rg/src/stm32_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "nucleo-l476rg.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + /* Configure the single button as an input. NOTE that EXTI interrupts are + * also configured for the pin. + */ + + stm32_configgpio(GPIO_BTN_USER); +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + /* Check that state of each USER button. A LOW value means that the key is + * pressed. + */ + + bool released = stm32_gpioread(GPIO_BTN_USER); + return !released; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id == BUTTON_USER) + { + oldhandler = stm32_gpiosetevent(GPIO_BTN_USER, true, true, true, irqhandler); + } + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/nucleo-l476rg/src/stm32_io.c b/configs/nucleo-l476rg/src/stm32_io.c new file mode 100644 index 0000000000000000000000000000000000000000..d98f2985bf22ef07e9336bc19cef5f8f016a71fa --- /dev/null +++ b/configs/nucleo-l476rg/src/stm32_io.c @@ -0,0 +1,196 @@ +/**************************************************************************** + * configs/nucleo-l476rg/src/stm32_io.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include "chip/stm32l4_tim.h" + +#include "nucleo-l476rg.h" + +#ifndef CONFIG_CC3000_PROBES + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_leds + * + * Description: + * + ****************************************************************************/ + +void up_leds(int r, int g ,int b, int freqs) +{ + long fosc = 72000000; + long prescale = 2048; + long p1s = fosc/prescale; + long p0p5s = p1s/2; + long p; + + static struct stm32_tim_dev_s *tim1 = 0; + + if (tim1 == 0) + { + tim1 = stm32_tim_init(1); + STM32_TIM_SETMODE(tim1, STM32_TIM_MODE_UP); + STM32_TIM_SETCLOCK(tim1, p1s-8); + STM32_TIM_SETPERIOD(tim1, p1s); + STM32_TIM_SETCOMPARE(tim1, 1, 0); + STM32_TIM_SETCOMPARE(tim1, 2, 0); + STM32_TIM_SETCOMPARE(tim1, 3, 0); + STM32_TIM_SETCHANNEL(tim1, 1, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG); + STM32_TIM_SETCHANNEL(tim1, 2, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG); + STM32_TIM_SETCHANNEL(tim1, 3, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG); + } + + p = freqs == 0 ? p1s : p1s / freqs; + STM32_TIM_SETPERIOD(tim1, p); + + p = freqs == 0 ? p1s + 1 : p0p5s / freqs; + + STM32_TIM_SETCOMPARE(tim1, 2, (r * p) / 255); + STM32_TIM_SETCOMPARE(tim1, 1, (b * p) / 255); + STM32_TIM_SETCOMPARE(tim1, 3, (g * p) / 255); +} + +/**************************************************************************** + * Name: up_ioinit + * + * Description: + * + ****************************************************************************/ + +void up_ioinit(void) +{ + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + up_leds(0,0,0,0); + stm32_configgpio(GPIO_A0); /* Probes */ + stm32_configgpio(GPIO_A1); /* Probes */ + stm32_configgpio(GPIO_A2); /* Smart Config */ + stm32_configgpio(GPIO_A3); /* not used */ + stm32_configgpio(GPIO_BTN_USER); /* Sw 1 */ + stm32_configgpio(GPIO_D0); /* USART2 RX*/ + stm32_configgpio(GPIO_D1); /* uSART2 TX*/ + stm32_configgpio(GPIO_D2); /* Activate */ +} + +/**************************************************************************** + * Name: up_read_inputs + * + * N.B The return state in true logic, the button polarity is dealt here in + * + ****************************************************************************/ + +uint8_t up_read_inputs(void) +{ + uint8_t bits = 0; + bits |= stm32_gpioread(GPIO_D14) == 0 ? 1 : 0; + bits |= stm32_gpioread(GPIO_D15) == 0 ? 2 : 0; + bits |= stm32_gpioread(GPIO_A2) == 0 ? 4 : 0; + bits |= stm32_gpioread(GPIO_A3) == 0 ? 8 : 0; + return bits; +} + +/**************************************************************************** + * Name: up_write_outputs + * + * N.B The return state in true logic, the button polarity is dealt here in + * + ****************************************************************************/ + +void up_write_outputs(int id, bool bits) +{ + if (id == 2) + { + stm32_gpiowrite(GPIO_D2, bits); + } + else if (id == 0) + { + stm32_gpiowrite(GPIO_A0, bits); + } + else if (id == 1) + { + stm32_gpiowrite(GPIO_A1, bits); + } +} + +/**************************************************************************** + * Name: up_irqio + * + * Description: + * + ****************************************************************************/ + +xcpt_t up_irqio(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id == 0) + { + oldhandler = stm32_gpiosetevent(GPIO_D14, true, true, true, irqhandler); + } + else if (id == 1) + { + oldhandler = stm32_gpiosetevent(GPIO_D15, true, true, true, irqhandler); + } + + return oldhandler; +} +#endif /* CONFIG_CC3000_PROBES */ diff --git a/configs/nucleo-l476rg/src/stm32_spi.c b/configs/nucleo-l476rg/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..5dad71caf5c47f4a9835fc51f95e185f55f1fd5a --- /dev/null +++ b/configs/nucleo-l476rg/src/stm32_spi.c @@ -0,0 +1,269 @@ +/**************************************************************************** + * configs/nucleo-l476rg/src/stm32_spi.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include "nucleo-l476rg.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_SPI +# undef CONFIG_DEBUG_VERBOSE +#endif + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ +/* Global driver instances */ + +#ifdef CONFIG_STM32_SPI1 +struct spi_dev_s *g_spi1; +#endif +#ifdef CONFIG_STM32_SPI2 +struct spi_dev_s *g_spi2; +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spiinitialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Nucleo-F401RE and + * Nucleo-F411RE boards. + * + ************************************************************************************/ + +void weak_function stm32_spiinitialize(void) +{ +#ifdef CONFIG_STM32_SPI1 + /* Configure SPI-based devices */ + + g_spi1 = up_spiinitialize(1); + if (!g_spi1) + { + spidbg("[boot] FAILED to initialize SPI port 1\n"); + } + +#ifdef CONFIG_WL_CC3000 + stm32_configgpio(GPIO_SPI_CS_WIFI); +#endif + +#ifdef HAVE_MMCSD + stm32_configgpio(GPIO_SPI_CS_SD_CARD); +#endif +#endif + +#ifdef CONFIG_STM32_SPI2 + /* Configure SPI-based devices */ + + g_spi2 = up_spiinitialize(2); + + /* Setup CS, EN & IRQ line IOs */ + +#ifdef CONFIG_WL_CC3000 + stm32_configgpio(GPIO_WIFI_CS); + stm32_configgpio(GPIO_WIFI_EN); + stm32_configgpio(GPIO_WIFI_INT); +#endif +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including up_spiinitialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to up_spiinitialize() in your low level application + * initialization logic + * 4. The handle returned by up_spiinitialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +#ifdef CONFIG_WL_CC3000 + if (devid == SPIDEV_WIRELESS) + { + stm32_gpiowrite(GPIO_SPI_CS_WIFI, !selected); + } + else +#endif +#ifdef HAVE_MMCSD + if (devid == SPIDEV_MMCSD) + { + stm32_gpiowrite(GPIO_SPI_CS_SD_CARD, !selected); + } +#endif +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +#ifdef CONFIG_WL_CC3000 + if (devid == SPIDEV_WIRELESS) + { + stm32_gpiowrite(GPIO_WIFI_CS, !selected); + } +#endif +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) + + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif +#endif /* CONFIG_SPI_CMDDATA */ + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 || CONFIG_STM32_SPI3 */ diff --git a/configs/nucleo-l476rg/src/stm32_userleds.c b/configs/nucleo-l476rg/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..01d60f55edcb8184029fa0688c3719f7007a5892 --- /dev/null +++ b/configs/nucleo-l476rg/src/stm32_userleds.c @@ -0,0 +1,237 @@ +/**************************************************************************** + * configs/nucleo-l476rg/src/stm32_userleds.c + * + * Copyright (C) 2014-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32l4.h" +#include "nucleo-l476rg.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* LED Power Management */ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_PM +static struct pm_callback_s g_ledscb = +{ + .notify = led_pm_notify, + .prepare = led_pm_prepare, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + switch (pmstate) + { + case(PM_NORMAL): + { + /* Restore normal LEDs operation */ + + } + break; + + case(PM_IDLE): + { + /* Entering IDLE mode - Turn leds off */ + + } + break; + + case(PM_STANDBY): + { + /* Entering STANDBY mode - Logic for PM_STANDBY goes here */ + + } + break; + + case(PM_SLEEP): + { + /* Entering SLEEP mode - Logic for PM_SLEEP goes here */ + + } + break; + + default: + { + /* Should not get here */ + + } + break; + } +} +#endif + +/**************************************************************************** + * Name: led_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* No preparation to change power modes is required by the LEDs driver. + * We always accept the state change by returning OK. + */ + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LD2 GPIO for output */ + + stm32_configgpio(GPIO_LD2); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == 1) + { + stm32_gpiowrite(GPIO_LD2, ldeon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + if (led == 1) + { + stm32_gpiowrite(GPIO_LD2, (ledset & BOARD_LD2_BIT) != 0); + } +} + +/**************************************************************************** + * Name: stm32_led_pminitialize + ****************************************************************************/ + +#ifdef CONFIG_PM +void stm32_led_pminitialize(void) +{ + /* Register to receive power management callbacks */ + + int ret = pm_register(&g_ledscb); + DEBUGASSERT(ret == OK); + UNUSED(ret); +} +#endif /* CONFIG_PM */ + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/nucleo-l476rg/src/stm32_wireless.c b/configs/nucleo-l476rg/src/stm32_wireless.c new file mode 100644 index 0000000000000000000000000000000000000000..228749c5e55eca7abf9342399879ae4ba7fd3c01 --- /dev/null +++ b/configs/nucleo-l476rg/src/stm32_wireless.c @@ -0,0 +1,362 @@ +/************************************************************************************ + * configs/nucleo-l476rg/src/stm32_wireless.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Laurent Latil + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "stm32l4.h" +#include "nucleo-l476rg.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifdef CONFIG_WL_CC3000 +#ifndef CONFIG_WIRELESS +# error "Wireless support requires CONFIG_WIRELESS" +#endif + +#ifndef CONFIG_STM32_SPI2 +# error "CC3000 Wireless support requires CONFIG_STM32_SPI2" +#endif + +#ifndef CC3000_SPI_FREQUENCY +# define CC3000_SPI_FREQUENCY 16000000 +#endif + +#ifndef CC3000_SPIDEV +# define CC3000_SPIDEV 2 +#endif + +#if CC3000_SPIDEV != 2 +# error "CC3000_SPIDEV must be 2" +#endif + +#ifndef CC3000_DEVMINOR +# define CC3000_DEVMINOR 0 +#endif + +#ifndef CONFIG_CC3000_RX_BUFFER_SIZE +#define CONFIG_CC3000_RX_BUFFER_SIZE 132 +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32_config_s +{ + struct cc3000_config_s dev; + xcpt_t handler; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind callbacks + * to isolate the CC3000 driver from differences in GPIO interrupt handling + * by varying boards and MCUs. If possible, interrupts should be configured + * on falling edges to detect the Ready Condition At T2: The normal master + * SPI write sequence is SPI_CS low, followed by SPI_IRQ low CC3000 to host, + * indicating that the CC3000 core module is ready to accept data. T2 + * duration is approximately 7 ms. + * + * irq_attach - Attach the CC3000 interrupt handler to the GPIO interrupt + * irq_enable - Enable or disable the GPIO interrupt + * clear_irq - Acknowledge/clear any pending GPIO interrupt + * power_enable - Enable or disable Module enable. + * chip_chip_select - The Chip Select + * wl_read_irq - Return the state of the interrupt GPIO input + */ + +static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler); +static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable); +static void wl_clear_irq(FAR struct cc3000_config_s *state); +static void wl_select(FAR struct cc3000_config_s *state, bool enable); +static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable); +static bool wl_read_irq(FAR struct cc3000_config_s *state); +#ifdef CONFIG_CC3000_PROBES +static bool probe(FAR struct cc3000_config_s *state,int n, bool s); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the CC3000 + * driver. This structure provides information about the configuration + * of the CC3000 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writable because, under certain circumstances, the driver + * may modify frequency or X plate resistance values. + */ + +static struct stm32_config_s g_cc3000_info = +{ + .dev.spi_frequency = CONFIG_CC3000_SPI_FREQUENCY, + .dev.spi_mode = CONFIG_CC3000_SPI_MODE, + .dev.max_rx_size = 0, + .dev.irq_attach = wl_attach_irq, + .dev.irq_enable = wl_enable_irq, + .dev.irq_clear = wl_clear_irq, + .dev.power_enable = wl_enable_power, + .dev.chip_chip_select = wl_select, + .dev.irq_read = wl_read_irq, +#ifdef CONFIG_CC3000_PROBES + .dev.probe = probe, /* This is used for debugging */ +#endif + .handler = NULL, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the CC3000 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the CC3000 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + */ + +static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler) +{ + FAR struct stm32_config_s *priv = (FAR struct stm32_config_s *)state; + + /* Just save the handler for use when the interrupt is enabled */ + + priv->handler = handler; + return OK; +} + +static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable) +{ + FAR struct stm32_config_s *priv = (FAR struct stm32_config_s *)state; + + /* The caller should not attempt to enable interrupts if the handler + * has not yet been 'attached' + */ + + DEBUGASSERT(priv->handler || !enable); + + /* Attach and enable, or detach and disable */ + + ivdbg("enable:%d\n", enable); + if (enable) + { + (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, true, false, priv->handler); + } + else + { + (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, false, false, NULL); + } +} + +static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable) +{ + ivdbg("enable:%d\n", enable); + + /* Active high enable */ + + stm32_gpiowrite(GPIO_WIFI_EN, enable); +} + +static void wl_select(FAR struct cc3000_config_s *state, bool enable) +{ + ivdbg("enable:%d\n", enable); + + /* Active high enable */ + + stm32_gpiowrite(GPIO_WIFI_CS, enable); +} + +static void wl_clear_irq(FAR struct cc3000_config_s *state) +{ + /* Does nothing */ +} + +static bool wl_read_irq(FAR struct cc3000_config_s *state) +{ + /* Active low*/ + + return stm32_gpioread(GPIO_WIFI_INT) ? false : true; +} + +#ifdef CONFIG_CC3000_PROBES +static bool probe(FAR struct cc3000_config_s *state,int n, bool s) +{ + if (n == 0) + { + stm32_gpiowrite(GPIO_D14, s); + } + + if (n == 1) + { + stm32_gpiowrite(GPIO_D15, s); + } + + return true; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arch_wlinitialize + * + * Description: + * Each board that supports a wireless device must provide this function. + * This function is called by application-specific, setup logic to + * configure the wireless device. This function will register the driver + * as /dev/wirelessN where N is the minor device number. + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int wireless_archinitialize(size_t max_rx_size) +{ + FAR struct spi_dev_s *spi; + + /* Init SPI bus */ + + idbg("minor %d\n", minor); + DEBUGASSERT(CONFIG_CC3000_DEVMINOR == 0); + +#ifdef CONFIG_CC3000_PROBES + stm32_configgpio(GPIO_D14); + stm32_configgpio(GPIO_D15); + stm32_gpiowrite(GPIO_D14, 1); + stm32_gpiowrite(GPIO_D15, 1); +#endif + + /* Get an instance of the SPI interface */ + + spi = up_spiinitialize(CONFIG_CC3000_SPIDEV); + if (!spi) + { + idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV); + return -ENODEV; + } + + /* Initialize and register the SPI CC3000 device */ + + g_cc3000_info.dev.max_rx_size = max_rx_size ? max_rx_size : CONFIG_CC3000_RX_BUFFER_SIZE; + int ret = cc3000_register(spi, &g_cc3000_info.dev, CONFIG_CC3000_DEVMINOR); + if (ret < 0) + { + idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV); + return -ENODEV; + } + + return OK; +} + +/**************************************************************************** + * Name: C3000_wlan_init + * + * Description: + * Initialize wlan driver + * + * Warning: This function must be called before ANY other wlan driver + * function + * + * Input Parameters: + * sWlanCB Asynchronous events callback. + * 0 no event call back. + * - Call back parameters: + * 1) event_type: HCI_EVNT_WLAN_UNSOL_CONNECT connect event, + * HCI_EVNT_WLAN_UNSOL_DISCONNECT disconnect event, + * HCI_EVNT_WLAN_ASYNC_SIMPLE_CONFIG_DONE config done, + * HCI_EVNT_WLAN_UNSOL_DHCP dhcp report, + * HCI_EVNT_WLAN_ASYNC_PING_REPORT ping report OR + * HCI_EVNT_WLAN_KEEPALIVE keepalive. + * 2) data: pointer to extra data that received by the event + * (NULL no data). + * 3) length: data length. + * - Events with extra data: + * HCI_EVNT_WLAN_UNSOL_DHCP: 4 bytes IP, 4 bytes Mask, + * 4 bytes default gateway, 4 bytes DHCP server and 4 bytes + * for DNS server. + * HCI_EVNT_WLAN_ASYNC_PING_REPORT: 4 bytes Packets sent, + * 4 bytes Packets received, 4 bytes Min round time, + * 4 bytes Max round time and 4 bytes for Avg round time. + * + * sFWPatches 0 no patch or pointer to FW patches + * sDriverPatches 0 no patch or pointer to driver patches + * sBootLoaderPatches 0 no patch or pointer to bootloader patches + * + * Returned Value: + * None + * + ****************************************************************************/ + +void cc3000_wlan_init(size_t max_tx_len, + tWlanCB sWlanCB, + tFWPatches sFWPatches, tDriverPatches + sDriverPatches, tBootLoaderPatches sBootLoaderPatches) +{ + wlan_init(max_tx_len, sWlanCB, sFWPatches, sDriverPatches, sBootLoaderPatches); +} + +#endif /* CONFIG_WL_CC3000 */ diff --git a/configs/nucleus2g/Kconfig b/configs/nucleus2g/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..0ad7a4136a9061cdc623d8674229371f44a8df04 --- /dev/null +++ b/configs/nucleus2g/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_NUCLEUS2G +endif diff --git a/configs/nucleus2g/README.txt b/configs/nucleus2g/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..2c82f6bd80119e968539db473755e21d073dd652 --- /dev/null +++ b/configs/nucleus2g/README.txt @@ -0,0 +1,555 @@ +README +^^^^^^ + +README for NuttX port to the Nucleus 2G LPC1768 board from 2G Engineering +(http://www.2g-eng.com/) + +Contents +^^^^^^^^ + + 2G-Engineering Nucleus Board + Development Environment + GNU Toolchain Options + IDEs + NuttX EABI "buildroot" Toolchain + NuttX OABI "buildroot" Toolchain + NXFLAT Toolchain + LEDs + Nucleus 2G Configuration Options + Configurations + +Nucleus 2G Board +^^^^^^^^^^^^^^^^ + +GPIO Usage + + P0[0]/RD1/TXD3/SDA1 P0[0]/CAN_RX1 + P0[1]/TD1/RXD3/SCL P0[1]/CAN_TX1 + P0[2]/TXD0/AD0[7] TX0 + P0[3]/RXD0/AD0[6] RX0 + P0[4] P0[4]/CAN1_STB + P0[5] P0[5]/CAN2_STB + P0[6]/I2SRX_SDA/SSEL1/MAT2[0] GPI/O_CS1 + P0[7]/I2STX_CLK/SCK1/MAT2[1] SCLK1 + P0[8]/I2STX_WS/MISO1/MAT2[2] MISO1 + P0[9]/I2STX_SDA/MOSI1/MAT2[3] MOSI1 + P0[10] P0[10]/CAN1_TERM + P0[11] P0[11]/CAN2_TERM + P0[15]/TXD1/SCK0/SCK MMC_CLK + P0[16]/RXD1/SSEL0/SSEL MMC_CD + P0[17]/CTS1/MISO0/MISO MMC_DATA0 + P0[18]/DCD1/MOSI0/MOSI MMC_MISO + P0[19]/DSR1/SDA1 GPI/O_CS2 + P0[20]/DTR1/SCL1 GPI/O_CS3 + P0[21]/RI1/MCIPWR/RD1 P0[21] + P0[22]/RTS1/TD1 P0[22] + P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] AD0 + P0[24]/AD0[1]/I2SRX_WS/CAP3[1] AD1 + P0[25]/AD0[2]/I2SRX_SDA/TXD3 AD2 + P0[26]/AD0[3]/AOUT/RXD3 AD3 + P0[27]/SDA0/USB_SDA SDA + P0[28]/SCL0 SCL + P0[29]/USB_D+ USB+ + P0[30]/USB_D- USB- + + P1[0] - P1[17] Not connected + P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] USB_LINK + P1[19]-P[29] P[19]-P[29] + P1[30]/VBUS/AD0[4] USB_+5 + P1[31]/SCK1/AD0[5] AD5 + + P2[0] P2[0]/LED1_A + P2[1] P2[1]/LED1_B + P2[2] P2[2]/LED2_A + P2[3] P2[3]/LED2_B + P2[4] P2[4] + P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 232_POWERAVE + P2[6]/PCAP1[0]/RI1/TRACECLK 232_VALID + P2[7]/RD2/RTS1 P2[7]/CAN_RX2 + P2[8]/TD2/TXD2 P2[8]/CAN_TX2 + P2[9]/USB_CONNECT/RXD2 USB_CONNECT + P2[10]/EINT0/NMI BOOTLOADER + P2[11]/EINT1/I2STX_CLK HEARTBEAT + P2[12]/EINT2/I2STX_WS EXTRA_LED + P2[13]/EINT3/I2STX_SDA 5V_ENABLE + + P3[25]-P3[26] Not connected + + P4[28]-P4[29] P4[28]-P4[29] + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery or devkitARM toolchain, you simply need add one of the + following configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows)and devkitARM are Windows native toolchains. + The CodeSourcey (for Linux) and NuttX buildroot toolchains are Cygwin and/or + Linux native toolchains. There are several limitations to using a Windows based + toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lpc17xx, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/lpc17x/lpc17_vectors.S. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh nucleus2g/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +^^^^ + + If CONFIG_ARCH_LEDS is defined, then support for the Nucleus-2G LEDs will be + included in the build. See: + + - configs/nucleus2g/include/board.h - Defines LED constants, types and + prototypes the LED interface functions. + + - configs/nucleus2g/src/nucleus2g.h - GPIO settings for the LEDs. + + - configs/nucleus2g/src/up_leds.c - LED control logic. + + The Nucleus2G has 3 LEDs... two on the Babel CAN board and a "heartbeat" LED." + The LEDs on the Babel CAN board are capabl of OFF/GREEN/RED/AMBER status. + In normal usage, the two LEDs on the Babel CAN board would show CAN status, but if + CONFIG_ARCH_LEDS is defined, these LEDs will be controlled as follows for NuttX + debug functionality (where NC means "No Change"). + + During the boot phases. LED1 and LED2 will show boot status. + + /* LED1 LED2 HEARTBEAT */ + #define LED_STARTED 0 /* OFF OFF OFF */ + #define LED_HEAPALLOCATE 1 /* GREEN OFF OFF */ + #define LED_IRQSENABLED 2 /* OFF GREEN OFF */ + #define LED_STACKCREATED 3 /* OFF OFF OFF */ + + #define LED_INIRQ 4 /* NC NC ON (momentary) */ + #define LED_SIGNAL 5 /* NC NC ON (momentary) */ + #define LED_ASSERTION 6 /* NC NC ON (momentary) */ + #define LED_PANIC 7 /* NC NC ON (2Hz flashing) */ + #undef LED_IDLE /* Sleep mode indication not supported */ + + After the system is booted, this logic will no longer use LEDs 1 and 2. They + are then available for use the application software using lpc17_led1() and + lpc17_led2(): + + enum lpc17_ledstate_e + { + LPC17_LEDSTATE_OFF = 0, + LPC17_LEDSTATE_GREEN = 1, + LPC17_LEDSTATE_RED = 2, + LPC17_LEDSTATE_AMBER = (LPC17_LEDSTATE_GREEN|LPC17_LEDSTATE_RED), + }; + + EXTERN void lpc17_led1(enum lpc17_ledstate_e state); + EXTERN void lpc17_led2(enum lpc17_ledstate_e state); + + The heartbeat LED is illuminated during all interrupt and signal procressing. + Normally, it will glow dimly to inicate that the LPC17xx is taking interrupts. + On an assertion PANIC, it will flash at 2Hz. + +Nucleus 2G Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc17xx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LPC1768=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=nucleus2g (for the Nucleus 2G) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_NUCLEUS2G=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x10000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + CONFIG_LPC17_MAINOSC=y + CONFIG_LPC17_PLL0=y + CONFIG_LPC17_PLL1=n + CONFIG_LPC17_ETHERNET=n + CONFIG_LPC17_USBHOST=n + CONFIG_LPC17_USBOTG=n + CONFIG_LPC17_USBDEV=n + CONFIG_LPC17_UART0=y + CONFIG_LPC17_UART1=n + CONFIG_LPC17_UART2=n + CONFIG_LPC17_UART3=n + CONFIG_LPC17_CAN1=n + CONFIG_LPC17_CAN2=n + CONFIG_LPC17_SPI=n + CONFIG_LPC17_SSP0=n + CONFIG_LPC17_SSP1=n + CONFIG_LPC17_I2C0=n + CONFIG_LPC17_I2C1=n + CONFIG_LPC17_I2S=n + CONFIG_LPC17_TMR0=n + CONFIG_LPC17_TMR1=n + CONFIG_LPC17_TMR2=n + CONFIG_LPC17_TMR3=n + CONFIG_LPC17_RIT=n + CONFIG_LPC17_PWM0=n + CONFIG_LPC17_MCPWM=n + CONFIG_LPC17_QEI=n + CONFIG_LPC17_RTC=n + CONFIG_LPC17_WDT=n + CONFIG_LPC17_ADC=n + CONFIG_LPC17_DAC=n + CONFIG_LPC17_GPDMA=n + CONFIG_LPC17_FLASH=n + + LPC17xx specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + LPC17xx specific CAN device driver settings. These settings all + require CONFIG_CAN: + + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined. + CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7 + + LPC17xx specific PHY/Ethernet device driver settings. These setting + also require CONFIG_NET and CONFIG_LPC17_ETHERNET. + + CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY + CONFIG_PHY_AUTONEG - Enable auto-negotion + CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. + CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex + + CONFIG_NET_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb + CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 18 + CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18 + CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented). + CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs + CONFIG_DEBUG. + CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets. + Also needs CONFIG_DEBUG. + CONFIG_NET_HASH - Enable receipt of near-perfect match frames. + CONFIG_LPC17_MULTICAST - Enable receipt of multicast (and unicast) frames. + Automatically set if CONFIG_NET_IGMP is selected. + + LPC17xx USB Device Configuration + + CONFIG_LPC17_USBDEV_FRAME_INTERRUPT + Handle USB Start-Of-Frame events. + Enable reading SOF from interrupt handler vs. simply reading on demand. + Probably a bad idea... Unless there is some issue with sampling the SOF + from hardware asynchronously. + CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT + Enable high priority interrupts. I have no idea why you might want to + do that + CONFIG_LPC17_USBDEV_NDMADESCRIPTORS + Number of DMA descriptors to allocate in SRAM. + CONFIG_LPC17_USBDEV_DMA + Enable lpc17xx-specific DMA support + CONFIG_LPC17_USBDEV_NOVBUS + Define if the hardware implementation does not support the VBUS signal + CONFIG_LPC17_USBDEV_NOLED + Define if the hardware implementation does not support the LED output + + LPC17xx USB Host Configuration (the Nucleus2G does not support USB Host) + + CONFIG_USBHOST_OHCIRAM_SIZE + Total size of OHCI RAM (in AHB SRAM Bank 1) + CONFIG_USBHOST_NEDS + Number of endpoint descriptors + CONFIG_USBHOST_NTDS + Number of transfer descriptors + CONFIG_USBHOST_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_USBHOST_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_IOBUFSIZE + Size of one end-user I/O buffer. This can be zero if the + application can guarantee that all end-user I/O buffers + reside in AHB SRAM. + +Configurations +^^^^^^^^^^^^^^ + +Each Nucleus 2G configuration is maintained in a +sub-directory and can be selected as follow: + + cd tools + ./configure.sh nucleus2g/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables only the serial NSH interface. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + usbserial: + This configuration directory exercises the USB serial class + driver at examples/usbserial. See examples/README.txt for + more information. + + usbmsc: + This configuration directory exercises the USB mass storage + class driver at system/usbmsc. See examples/README.txt for + more information. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + diff --git a/configs/nucleus2g/include/board.h b/configs/nucleus2g/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..a60a565ec460480be28369f76eace466b13fbd77 --- /dev/null +++ b/configs/nucleus2g/include/board.h @@ -0,0 +1,291 @@ +/************************************************************************************ + * configs/nucleus2g/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* NOTE: The following definitions require lpc17_syscon.h. It is not included here + * because the including C file may not have that file in its include path. + */ + +#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency */ +#define BOARD_OSCCLK_FREQUENCY BOARD_XTAL_FREQUENCY /* Main oscillator frequency */ +#define BOARD_RTCCLK_FREQUENCY (32000) /* RTC oscillator frequency */ +#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */ + +/* This is the clock setup we configure for: + * + * SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1 + * CCLCK = 480MHz / 6 = 80MHz -> CCLK divider = 6 + */ + +#define LPC17_CCLK 80000000 /* 80Mhz */ + +/* Select the main oscillator as the frequency source. SYSCLK is then the frequency + * of the main oscillator. + */ + +#undef CONFIG_LPC17_MAINOSC +#define CONFIG_LPC17_MAINOSC 1 +#define BOARD_SCS_VALUE SYSCON_SCS_OSCEN + +/* Select the main oscillator and CCLK divider. The output of the divider is CCLK. + * The input to the divider (PLLCLK) will be determined by the PLL output. + */ + +#define BOARD_CCLKCFG_DIVIDER 6 +#define BOARD_CCLKCFG_VALUE ((BOARD_CCLKCFG_DIVIDER-1) << SYSCON_CCLKCFG_SHIFT) + +/* PLL0. PLL0 is used to generate the CPU clock divider input (PLLCLK). + * + * Source clock: Main oscillator + * PLL0 Multiplier value (M): 20 + * PLL0 Pre-divider value (N): 1 + * + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz + */ + +#undef CONFIG_LPC17_PLL0 +#define CONFIG_LPC17_PLL0 1 +#define BOARD_CLKSRCSEL_VALUE SYSCON_CLKSRCSEL_MAIN + +#define BOARD_PLL0CFG_MSEL 20 +#define BOARD_PLL0CFG_NSEL 1 +#define BOARD_PLL0CFG_VALUE \ + (((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLL0CFG_MSEL_SHIFT) | \ + ((BOARD_PLL0CFG_NSEL-1) << SYSCON_PLL0CFG_NSEL_SHIFT)) + +/* PLL1 -- Not used. */ + +#undef CONFIG_LPC17_PLL1 +#define BOARD_PLL1CFG_MSEL 36 +#define BOARD_PLL1CFG_NSEL 1 +#define BOARD_PLL1CFG_VALUE \ + (((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLL1CFG_MSEL_SHIFT) | \ + ((BOARD_PLL1CFG_NSEL-1) << SYSCON_PLL1CFG_NSEL_SHIFT)) + +/* USB divider. This divider is used when PLL1 is not enabled to get the + * USB clock from PLL0: + * + * USBCLK = PLL0CLK / 10 = 48MHz + */ + +#define BOARD_USBCLKCFG_VALUE SYSCON_USBCLKCFG_DIV10 + +/* FLASH Configuration */ + +#undef CONFIG_LPC17_FLASH +#define CONFIG_LPC17_FLASH 1 +#define BOARD_FLASHCFG_VALUE 0x0000303a + +/* LED definitions ******************************************************************/ +/* The Nucleus2G has 3 LEDs... two on the Babel CAN board and a "heartbeat" LED." + * The LEDs on the Babel CAN board are capabl of OFF/GREEN/RED/AMBER status. + * In normal usage, the two LEDs on the Babel CAN board would show CAN status, but if + * CONFIG_ARCH_LEDS is defined, these LEDs will be controlled as follows for NuttX + * debug functionality (where NC means "No Change"). + * + * During the boot phases. LED1 and LED2 will show boot status. + */ + /* LED1 LED2 HEARTBEAT */ +#define LED_STARTED 0 /* OFF OFF OFF */ +#define LED_HEAPALLOCATE 1 /* GREEN OFF OFF */ +#define LED_IRQSENABLED 2 /* OFF GREEN OFF */ +#define LED_STACKCREATED 3 /* OFF OFF OFF */ + +/* After the system is booted, this logic will no longer use LEDs 1 and 2. They + * are available for use the application software using lpc17_led1() and lpc17_led2() + * (prototyped below) + */ + /* LED1 LED2 HEARTBEAT */ +#define LED_INIRQ 4 /* NC NC ON (momentary) */ +#define LED_SIGNAL 5 /* NC NC ON (momentary) */ +#define LED_ASSERTION 6 /* NC NC ON (momentary) */ +#define LED_PANIC 7 /* NC NC ON (1Hz flashing) */ + +/* Alternate pin selections *********************************************************/ +/* UART1 -- Not connected */ + +#define GPIO_UART1_TXD GPIO_UART1_TXD_1 +#define GPIO_UART1_RXD GPIO_UART1_RXD_1 +#define GPIO_UART1_CTS GPIO_UART1_CTS_1 +#define GPIO_UART1_DCD GPIO_UART1_DCD_1 +#define GPIO_UART1_DSR GPIO_UART1_DSR_1 +#define GPIO_UART1_DTR GPIO_UART1_DTR_1 +#define GPIO_UART1_RI GPIO_UART1_RI_1 +#define GPIO_UART1_RTS GPIO_UART1_RTS_1 + +/* UART2 -- Not connected */ + +#define GPIO_UART2_TXD GPIO_UART2_TXD_1 +#define GPIO_UART2_RXD GPIO_UART2_RXD_1 + +/* UART3 -- Not connected */ + +#define GPIO_UART3_TXD GPIO_UART3_TXD_3 +#define GPIO_UART3_RXD GPIO_UART3_RXD_3 + +/* Either SPI or SSP0 can drive the MMC/SD slot (SSP0 alternate pin settings are + * not connected) + */ + +#define GPIO_SSP0_SCK GPIO_SSP0_SCK_1 +#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_1 +#define GPIO_SSP0_MISO GPIO_SSP0_MISO_1 +#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_1 + +/* SSP1 */ + +#define GPIO_SSP1_SCK GPIO_SSP1_SCK_1 + +/* Can bus config */ + +/* CAN1 GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P0[0]/RD1/TXD3/SDA1 46 RD1 + * P0[1]/TD1/RXD3/SCL1 47 TD1 + */ + +#define GPIO_CAN1_RD GPIO_CAN1_RD_1 +#define GPIO_CAN1_TD GPIO_CAN1_TD_1 + +/* Suppy default CAN BAUD (can be overridden in the .config file) */ + +#ifndef CONFIG_CAN1_BAUD +# define CONFIG_CAN1_BAUD 1000000 +#endif +#ifndef CONFIG_CAN2_BAUD +# define CONFIG_CAN2_BAUD 1000000 +#endif + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef CONFIG_ARCH_LEDS +enum lpc17_ledstate_e +{ + LPC17_LEDSTATE_OFF = 0, + LPC17_LEDSTATE_GREEN = 1, + LPC17_LEDSTATE_RED = 2, + LPC17_LEDSTATE_AMBER = (LPC17_LEDSTATE_GREEN|LPC17_LEDSTATE_RED), +}; +#endif + +enum output_state +{ + RELAY_OPEN = 0, + RELAY_CLOSED = 1, + RELAY_TOGGLE = 2, +}; + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void); + +/************************************************************************************ + * Name: lpc17_led1 and 2 + * + * Description: + * Once the system has booted, these functions can be used to control LEDs 1 and 2 + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void lpc17_led1(enum lpc17_ledstate_e state); +void lpc17_led2(enum lpc17_ledstate_e state); +#endif + +/************************************************************************************ + * Name: nucleus_bms_relay 1-4 + * + * Description: + * once booted these functions control the 4 isolated FET outputs from the + * master BMS controller + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_BOARD_NUCLEUS2G_BMS +void nucleus_bms_relay1(enum output_state state); +void nucleus_bms_relay2(enum output_state state); +void nucleus_bms_relay3(enum output_state state); +void nucleus_bms_relay4(enum output_state state); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/nucleus2g/nsh/Make.defs b/configs/nucleus2g/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..afc8df845332d91fbf78612b9cfb152902de6dd4 --- /dev/null +++ b/configs/nucleus2g/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/nucleus2g/nsh/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/nucleus2g/nsh/defconfig b/configs/nucleus2g/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..2fdc22d963f67e067524763ec99548290359f125 --- /dev/null +++ b/configs/nucleus2g/nsh/defconfig @@ -0,0 +1,830 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_ETHERNET is not set +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +CONFIG_LPC17_SSP0=y +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=7982 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_LPCXPRESSO is not set +# CONFIG_ARCH_BOARD_MBED is not set +CONFIG_ARCH_BOARD_NUCLEUS2G=y +# CONFIG_ARCH_BOARD_ZKITARM is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleus2g" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=22 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleus2g/nsh/setenv.sh b/configs/nucleus2g/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ffdc74e9b907b576046878b0881b9b6986e93739 --- /dev/null +++ b/configs/nucleus2g/nsh/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/nucleus2g/nsh/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export LPCTOOL_DIR="${WD}/configs/nucleus2g/tools" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/nucleus2g/scripts/ld.script b/configs/nucleus2g/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..3d6fcb1d2a0c76ad852ddfe043b3be1c3ce195a5 --- /dev/null +++ b/configs/nucleus2g/scripts/ld.script @@ -0,0 +1,115 @@ +/**************************************************************************** + * configs/nucleus2g/scripts/ld.script + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LPC1768 has 512Kb of FLASH beginning at address 0x0000:0000 and + * 64Kb of total SRAM: 32Kb of SRAM in the CPU block beginning at address + * 0x10000000 and 32Kb of AHB SRAM in two banks of 16Kb beginning at addresses + * 0x20070000 and 0x20080000. Here we assume that .data and .bss will all fit + * into the 32Kb CPU SRAM address range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K + sram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/nucleus2g/src/.gitignore b/configs/nucleus2g/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/nucleus2g/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/nucleus2g/src/Makefile b/configs/nucleus2g/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..2e0311d06c109e3530b7783afd6709b7f2a594d4 --- /dev/null +++ b/configs/nucleus2g/src/Makefile @@ -0,0 +1,49 @@ +############################################################################ +# configs/nucleus2g/src/Makefile +# +# Copyright (C) 2010-2012, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc17_boot.c lpc17_leds.c lpc17_ssp.c lpc17_outputs.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc17_appinit.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += lpc17_usbmsc.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/nucleus2g/src/lpc17_appinit.c b/configs/nucleus2g/src/lpc17_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..c0496b35cd79f6200a6e26c9dbe611e166a7eb52 --- /dev/null +++ b/configs/nucleus2g/src/lpc17_appinit.c @@ -0,0 +1,163 @@ +/**************************************************************************** + * config/nucleus2g/src/lpc17_appinit.c + * + * Copyright (C) 2010-2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "lpc17_ssp.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#define HAVE_USBDEV 1 +#define HAVE_MMCSD 1 + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_NSH_ARCHINIT +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 0 +# error "The Nucleus-2G MMC/SD is on SSP0" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 0 +# endif + +# if !defined(CONFIG_NSH_MMCSDSLOTNO) || CONFIG_NSH_MMCSDSLOTNO != 0 +# error "The Nucleus-2G MMC/SD is only one slot (0)" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif + +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif + +#else +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 0 +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# undef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/* Can't support USB device features if USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#ifdef HAVE_MMCSD +# ifndef CONFIG_LPC17_SSP0 +# warning "CONFIG_LPC17_SSP0 is require for MMC/SD support" +# undef HAVE_MMCSD +# endif + +# ifdef CONFIG_DISABLE_MOUNTPOINT +# warning "No MMC/SD support. Mountpoints disabled (CONFIG_DISABLE_MOUNTPOINT)" +# undef HAVE_MMCSD +# endif +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef HAVE_MMCSD + FAR struct spi_dev_s *ssp; + int ret; + + /* Get the SSP port */ + + ssp = lpc17_sspbus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + if (!ssp) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SSP port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SSP port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + /* Bind the SSP port to the slot */ + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, CONFIG_NSH_MMCSDSLOTNO, ssp); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to bind SSP port %d to MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfuly bound SSP port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); +#endif + + return OK; +} diff --git a/configs/nucleus2g/src/lpc17_boot.c b/configs/nucleus2g/src/lpc17_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..331896584577e5b2276c5cb1064686480ce7064b --- /dev/null +++ b/configs/nucleus2g/src/lpc17_boot.c @@ -0,0 +1,117 @@ +/************************************************************************************ + * configs/nucleus2g/src/lpc17_boot.c + * + * Copyright (C) 2010, 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_ssp.h" +#include "lpc17_gpio.h" + +#include "nucleus2g.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void) +{ + /* Enable +5V needed for CAN */ + +#if defined(CONFIG_LPC17_CAN1) || defined(CONFIG_LPC17_CAN2) + lpc17_configgpio(NUCLEUS2G_5V_ENABLE); +#else + lpc17_configgpio(NUCLEUS2G_5V_DISABLE); +#endif + + /* If UART0 is used, enabled the MAX232 driver */ + +#ifdef CONFIG_LPC17_UART0 + lpc17_configgpio(NUCLEUS2G_232_ENABLE); +#else + lpc17_configgpio(NUCLEUS2G_232_POWERSAVE); +#endif + + /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak + * function nucleus2g_sspdev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1) + if (nucleus2g_sspdev_initialize) + { + nucleus2g_sspdev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + + /* Configure the relay outptus for use on the BMS master board */ + +#ifdef CONFIG_ARCH_BOARD_NUCLEUS2G_BMS + up_relayinit(); +#endif +} diff --git a/configs/nucleus2g/src/lpc17_leds.c b/configs/nucleus2g/src/lpc17_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..501eeb8d49cd78e28c1064a4ca6d4b0926abc234 --- /dev/null +++ b/configs/nucleus2g/src/lpc17_leds.c @@ -0,0 +1,231 @@ +/**************************************************************************** + * configs/nucleus2g/src/lpc17_leds.c + * + * Copyright (C) 2010, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_gpio.h" + +#include "nucleus2g.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS) +# define led_dumpgpio(m) lpc17_dumpgpio(NUCLEUS2G_LED1_A, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* The Nucleus2G has 3 LEDs... two on the Babel CAN board and a "heartbeat" LED." + * The LEDs on the Babel CAN board are capabl of OFF/GREEN/RED/AMBER status. + * In normal usage, the two LEDs on the Babel CAN board would show CAN status, but if + * CONFIG_ARCH_LEDS is defined, these LEDs will be controlled as follows for NuttX + * debug functionality (where NC means "No Change"). + * + * LED1 LED2 HEARTBEAT + * +------- ------ ----------------------- + * LED_STARTED | OFF OFF OFF + * LED_HEAPALLOCATE | GREEN OFF OFF + * LED_IRQSENABLED | OFF GREEN OFF + * LED_STACKCREATED | OFF OFF OFF + * LED_INIRQ | NC NC ON (momentary) + * LED_SIGNAL | NC NC ON (momentary) + * LED_ASSERTION | NC NC ON (momentary) + * LED_PANIC | NC NC ON (1Hz flashing) + */ + +static bool g_initialized; +static int g_nestcount; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure all LED GPIO lines */ + + led_dumpgpio("board_autoled_initialize() Entry)"); + + lpc17_configgpio(NUCLEUS2G_LED1_A); + lpc17_configgpio(NUCLEUS2G_LED1_B); + lpc17_configgpio(NUCLEUS2G_LED2_A); + lpc17_configgpio(NUCLEUS2G_LED2_B); + lpc17_configgpio(NUCLEUS2G_HEARTBEAT); + lpc17_configgpio(NUCLEUS2G_EXTRA_LED); + + led_dumpgpio("board_autoled_initialize() Exit"); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + /* We will control LED1 and LED2 not yet completed the boot sequence. */ + + if (!g_initialized) + { + enum lpc17_ledstate_e led1 = LPC17_LEDSTATE_OFF; + enum lpc17_ledstate_e led2 = LPC17_LEDSTATE_OFF; + switch (led) + { + case LED_STACKCREATED: + g_initialized = true; + case LED_STARTED: + default: + break; + + case LED_HEAPALLOCATE: + led1 = LPC17_LEDSTATE_GREEN; + break; + + case LED_IRQSENABLED: + led2 = LPC17_LEDSTATE_GREEN; + } + lpc17_led1(led1); + lpc17_led2(led2); + } + + /* We will always control the HB LED */ + + switch (led) + { + default: + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + lpc17_gpiowrite(NUCLEUS2G_HEARTBEAT, false); + g_nestcount++; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + /* In all states, OFF can only mean turning off the HB LED */ + + if (g_nestcount <= 1) + { + lpc17_gpiowrite(NUCLEUS2G_HEARTBEAT, true); + g_nestcount = 0; + } + else + { + g_nestcount--; + } +} + +/************************************************************************************ + * Name: lpc17_led1 and 2 + * + * Description: + * Once the system has booted, these functions can be used to control LEDs 1 and 2 + * + ************************************************************************************/ + +void lpc17_led1(enum lpc17_ledstate_e state) +{ + bool red = (((unsigned int)state & LPC17_LEDSTATE_RED) != 0); + bool green = (((unsigned int)state & LPC17_LEDSTATE_GREEN) != 0); + + lpc17_gpiowrite(NUCLEUS2G_LED1_A, red); + lpc17_gpiowrite(NUCLEUS2G_LED1_B, green); +} + +void lpc17_led2(enum lpc17_ledstate_e state) +{ + bool red = (((unsigned int)state & LPC17_LEDSTATE_RED) != 0); + bool green = (((unsigned int)state & LPC17_LEDSTATE_GREEN) != 0); + + lpc17_gpiowrite(NUCLEUS2G_LED2_A, red); + lpc17_gpiowrite(NUCLEUS2G_LED2_B, green); +} +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/nucleus2g/src/lpc17_outputs.c b/configs/nucleus2g/src/lpc17_outputs.c new file mode 100644 index 0000000000000000000000000000000000000000..f50138db8f13630c7525088676be1274ed6a8ced --- /dev/null +++ b/configs/nucleus2g/src/lpc17_outputs.c @@ -0,0 +1,128 @@ +/**************************************************************************** + * configs/nucleus2g/src/lpc17_outputs.c + * + * Copyright (C) 2012 Hal Glenn. All rights reserved. + * Author: Hal Glenn + * + * This file is part of NuttX: + * + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_gpio.h" + +#include "nucleus2g.h" + +#ifdef CONFIG_ARCH_BOARD_NUCLEUS2G_BMS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nucleus_bms_relay 1-4 + * + * Description: + * Once booted these functions control the 4 isolated FET outputs from the + * master BMS controller + * + ****************************************************************************/ + +void nucleus_bms_relay1(enum output_state state) +{ + bool value = (state == (enum output_state)RELAY_OPEN); + lpc17_gpiowrite(NUCLEUS_BMS_RELAY1, value); +} + +void nucleus_bms_relay2(enum output_state state) +{ + bool value = (state == (enum output_state)RELAY_OPEN); + lpc17_gpiowrite(NUCLEUS_BMS_RELAY2, value); +} + +void nucleus_bms_relay3(enum output_state state) +{ + bool value = (state == (enum output_state)RELAY_OPEN); + lpc17_gpiowrite(NUCLEUS_BMS_RELAY3, value); +} + +void nucleus_bms_relay4(enum output_state state) +{ + bool value = (state == (enum output_state)RELAY_OPEN); + lpc17_gpiowrite(NUCLEUS_BMS_RELAY4, value); +} + +/**************************************************************************** + * Name: up_relayinit + * + * Description: + * This function is called on boot to init the GPIO for relay control + * + ****************************************************************************/ + +void up_relayinit(void) +{ + lpc17_configgpio(NUCLEUS_BMS_RELAY1); + lpc17_configgpio(NUCLEUS_BMS_RELAY2); + lpc17_configgpio(NUCLEUS_BMS_RELAY3); + lpc17_configgpio(NUCLEUS_BMS_RELAY4); +} + +#endif /* CONFIG_ARCH_BOARD_NUCLEUS2G_BMS */ + diff --git a/configs/nucleus2g/src/lpc17_ssp.c b/configs/nucleus2g/src/lpc17_ssp.c new file mode 100644 index 0000000000000000000000000000000000000000..ff950e3c30aad17b86c9b97a9c463ae1a4a72fe6 --- /dev/null +++ b/configs/nucleus2g/src/lpc17_ssp.c @@ -0,0 +1,183 @@ +/************************************************************************************ + * configs/nucleus2g/src/lpc17_ssp.c + * + * Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "lpc17_gpio.h" +#include "lpc17_ssp.h" +#include "nucleus2g.h" + +#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SSP_DEBUG /* Define to enable debug */ +#undef SSP_VERBOSE /* Define to enable verbose debug */ + +#ifdef SSP_DEBUG +# define sspdbg lldbg +# ifdef SSP_VERBOSE +# define sspvdbg lldbg +# else +# define sspvdbg(x...) +# endif +#else +# undef SSP_VERBOSE +# define sspdbg(x...) +# define sspvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef SSP_VERBOSE +# define ssp_dumpgpio(m) lpc17_dumpgpio(SDCCS_GPIO, m) +#else +# define ssp_dumpgpio(m) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: nucleus2g_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Nucleus 2G. + * + ************************************************************************************/ + +void weak_function nucleus2g_sspdev_initialize(void) +{ + /* Configure the SPI-based microSD CS GPIO */ + + ssp_dumpgpio("nucleus2g_sspdev_initialize() Entry)"); + + /* SSP0 connects only to the MMC/SD slot on the Nucleus 1G board. + * P0[15]/TXD1/SCK0/SCK MMC_CLK + * P0[16]/RXD1/SSEL0/SSEL MMC_CD + * P0[17]/CTS1/MISO0/MISO MMC_DATA0 + * P0[18]/DCD1/MOSI0/MOSI MMC_MISO + * + * In SPI mode the MMC/SD DATA3/CD functions as the SPI chip select. + */ + +#ifdef CONFIG_LPC17_SSP0 + lpc17_configgpio(NUCLEUS2G_MMCSD_CS); +#endif + + /* SSP1 goes off the Nucleus 2G board to the Babel CAN board along with 3 chip + * select pins. However, it is currently not used on that board. + */ + +#ifdef CONFIG_LPC17_SSP1 +# warning "SSP1 chip selects not known" +#endif + ssp_dumpgpio("nucleus2g_sspdev_initialize() Exit"); +} + +/************************************************************************************ + * Name: lpc17_ssp0/ssp1select and lpc17_ssp0/ssp1status + * + * Description: + * The external functions, lpc17_ssp0/ssp1select and lpc17_ssp0/ssp1status + * must be provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including lpc17_sspbus_initialize()) + * are provided by common LPC17xx logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in lpc17_boardinitialize() to configure SPI/SSP chip select + * pins. + * 2. Provide lpc17_ssp0/ssp1select() and lpc17_ssp0/ssp1status() functions + * in your board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 3. Add a calls to lpc17_sspbus_initialize() in your low level application + * initialization logic + * 4. The handle returned by lpc17_sspbus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +#ifdef CONFIG_LPC17_SSP0 +void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssp_dumpgpio("lpc17_ssp0select() Entry"); + + if (devid == SPIDEV_MMCSD) + { + /* Assert the CS pin to the card */ + + lpc17_gpiowrite(NUCLEUS2G_MMCSD_CS, !selected); + } + ssp_dumpgpio("lpc17_ssp0select() Exit"); +} + +uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + sspdbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_LPC17_SSP1 +# warning "SSP1 chip selects not known" +#endif + +#endif /* CONFIG_LPC17_SSP0 || CONFIG_LPC17_SSP1 */ diff --git a/configs/nucleus2g/src/lpc17_usbmsc.c b/configs/nucleus2g/src/lpc17_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..5c1f1134a557a258f4b145a643282fb2e317a70a --- /dev/null +++ b/configs/nucleus2g/src/lpc17_usbmsc.c @@ -0,0 +1,127 @@ +/**************************************************************************** + * configs/nucleus2g/src/lpc17_usbmsc.c + * + * Copyright (C) 2010, 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the LPC17xx MMC/SD SPI block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "lpc17_ssp.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_NUCLEUS2G +# undef LPC17XX_MMCSDSPIPORTNO +# define LPC17XX_MMCSDSPIPORTNO 1 +# undef LPC17XX_MMCSDSLOTNO +# define LPC17XX_MMCSDSLOTNO 0 +#else + /* Add configuration for new LPC17xx boards here */ +# error "Unrecognized LPC17xx board" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization of the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", + LPC17XX_MMCSDSPIPORTNO); + + spi = lpc17_sspbus_initialize(LPC17XX_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + LPC17XX_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + LPC17XX_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + syslog(LOG_INFO, "Binding SPI port %d to MMC/SD slot %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1, + LPC17XX_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SPI port %d to MMC/SD slot %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO); + return OK; +} diff --git a/configs/nucleus2g/src/nucleus2g.h b/configs/nucleus2g/src/nucleus2g.h new file mode 100644 index 0000000000000000000000000000000000000000..74c5db3d7314323093c34b632eced275f589becf --- /dev/null +++ b/configs/nucleus2g/src/nucleus2g.h @@ -0,0 +1,155 @@ +/************************************************************************************ + * configs/nucleus2g/src/nucleus2g.h + * + * Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef _CONFIGS_NUCLEUS2G_SRC_NUCLEUS2G_H +#define _CONFIGS_NUCLEUS2G_SRC_NUCLEUS2G_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* NUCLEUS-2G GPIO Pin Definitions **************************************************/ +/* Board GPIO Usage: + * + * P0[0]/RD1/TXD3/SDA1 P0[0]/CAN_RX1 + * P0[1]/TD1/RXD3/SCL P0[1]/CAN_TX1 + * P0[2]/TXD0/AD0[7] TX0 + * P0[3]/RXD0/AD0[6] RX0 + * P0[4] P0[4]/CAN1_STB + * P0[5] P0[5]/CAN2_STB + * P0[6]/I2SRX_SDA/SSEL1/MAT2[0] GPI/O_CS1 + * P0[7]/I2STX_CLK/SCK1/MAT2[1] SCLK1 + * P0[8]/I2STX_WS/MISO1/MAT2[2] MISO1 + * P0[9]/I2STX_SDA/MOSI1/MAT2[3] MOSI1 + * P0[10] P0[10]/CAN1_TERM + * P0[11] P0[11]/CAN2_TERM + * P0[15]/TXD1/SCK0/SCK MMC_CLK + * P0[16]/RXD1/SSEL0/SSEL MMC_CD + * P0[17]/CTS1/MISO0/MISO MMC_DATA0 + * P0[18]/DCD1/MOSI0/MOSI MMC_MISO + * P0[19]/DSR1/SDA1 GPI/O_CS2 + * P0[20]/DTR1/SCL1 GPI/O_CS3 + * P0[21]/RI1/MCIPWR/RD1 P0[21] + * P0[22]/RTS1/TD1 P0[22] + * P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] AD0 + * P0[24]/AD0[1]/I2SRX_WS/CAP3[1] AD1 + * P0[25]/AD0[2]/I2SRX_SDA/TXD3 AD2 + * P0[26]/AD0[3]/AOUT/RXD3 AD3 + * P0[27]/SDA0/USB_SDA SDA + * P0[28]/SCL0 SCL + * P0[29]/USB_D+ USB+ + * P0[30]/USB_D- USB- + * + * P1[0] - P1[17] Not connected + * P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] USB_LINK + * P1[19]-P[29] P[19]-P[29] + * P1[30]/VBUS/AD0[4] USB_+5 + * P1[31]/SCK1/AD0[5] AD5 + * + * P2[0] P2[0]/LED1_A + * P2[1] P2[1]/LED1_B + * P2[2] P2[2]/LED2_A + * P2[3] P2[3]/LED2_B + * P2[4] P2[4] + * P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 232_POWERAVE + * P2[6]/PCAP1[0]/RI1/TRACECLK 232_VALID + * P2[7]/RD2/RTS1 P2[7]/CAN_RX2 + * P2[8]/TD2/TXD2 P2[8]/CAN_TX2 + * P2[9]/USB_CONNECT/RXD2 USB_CONNECT + * P2[10]/EINT0/NMI BOOTLOADER + * P2[11]/EINT1/I2STX_CLK HEARTBEAT + * P2[12]/EINT2/I2STX_WS EXTRA_LED + * P2[13]/EINT3/I2STX_SDA 5V_ENABLE + * + * P3[25]-P3[26] Not connected + * + * P4[28]-P4[29] P4[28]-P4[29] + */ + +#define NUCLEUS2G_LED1_A (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN0) +#define NUCLEUS2G_LED1_B (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN1) +#define NUCLEUS2G_LED2_A (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN2) +#define NUCLEUS2G_LED2_B (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN3) +#define NUCLEUS2G_232_ENABLE (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN5) +#define NUCLEUS2G_232_POWERSAVE (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN5) +#define NUCLEUS2G_232_VALID (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN5) +#define NUCLEUS2G_HEARTBEAT (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN11) +#define NUCLEUS2G_EXTRA_LED (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN12) +#define NUCLEUS2G_5V_ENABLE (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN13) +#define NUCLEUS2G_5V_DISABLE (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN13) + +#define NUCLEUS2G_MMCSD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN16) + +#define NUCLEUS_BMS_RELAY1 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN20) +#define NUCLEUS_BMS_RELAY2 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN21) +#define NUCLEUS_BMS_RELAY3 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN22) +#define NUCLEUS_BMS_RELAY4 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN23) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: nucleus2g_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the NUCLEUS-2G board. + * + ************************************************************************************/ + +void weak_function nucleus2g_sspdev_initialize(void); + +void up_relayinit(void); + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_NUCLEUS2G_SRC_NUCLEUS2G_H */ + diff --git a/configs/nucleus2g/tools/olimex-tiny.cfg b/configs/nucleus2g/tools/olimex-tiny.cfg new file mode 100644 index 0000000000000000000000000000000000000000..03d3ac6bc0c4b78ad893e9658a6694837f4ec5db --- /dev/null +++ b/configs/nucleus2g/tools/olimex-tiny.cfg @@ -0,0 +1,61 @@ +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +#interface +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H" +ft2232_layout "olimex-jtag" +ft2232_vid_pid 0x15ba 0x002a + +# NXP LPC1768 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, clocked with 4MHz internal RC oscillator + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lpc1768 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x4ba00477 +} + +#delays on reset lines +jtag_nsrst_delay 200 +jtag_ntrst_delay 200 + +# LPC2000 & LPC1700 -> SRST causes TRST +reset_config trst_and_srst srst_pulls_trst + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME + +# LPC1768 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM) +$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000 -work-area-backup 0 + +# REVISIT is there any good reason to have this reset-init event handler?? +# Normally they should set up (board-specific) clocking then probe the flash... +$_TARGETNAME configure -event reset-init { + # Force NVIC.VTOR to point to flash at 0 ... + # WHY? This is it's reset value; we run right after reset!! + mwb 0xE000ED08 0x00 +} + +# LPC1768 has 512kB of user-available FLASH (bootloader is located in separate dedicated region). +# flash bank lpc1700 0 0 [calc_checksum] + +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME lpc1700 80000 calc_checksum + +# 4MHz / 6 = 666kHz, so use 500 +jtag_khz 500 diff --git a/configs/nucleus2g/tools/olimex.cfg b/configs/nucleus2g/tools/olimex.cfg new file mode 100644 index 0000000000000000000000000000000000000000..8183ffd922f68a39d4109c15748b601dcb4a60b9 --- /dev/null +++ b/configs/nucleus2g/tools/olimex.cfg @@ -0,0 +1,62 @@ +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +#interface +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG A" +ft2232_layout "olimex-jtag" +ft2232_vid_pid 0x15BA 0x0003 + +# NXP LPC1768 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, clocked with 4MHz internal RC oscillator + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lpc1768 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x4ba00477 +} + +#delays on reset lines +jtag_nsrst_delay 200 +jtag_ntrst_delay 200 + +# LPC2000 & LPC1700 -> SRST causes TRST +reset_config trst_and_srst srst_pulls_trst + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME + +# LPC1768 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM) +$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000 -work-area-backup 0 + +# REVISIT is there any good reason to have this reset-init event handler?? +# Normally they should set up (board-specific) clocking then probe the flash... +$_TARGETNAME configure -event reset-init { + # Force NVIC.VTOR to point to flash at 0 ... + # WHY? This is it's reset value; we run right after reset!! + mwb 0xE000ED08 0x00 +} + +# LPC1768 has 512kB of user-available FLASH (bootloader is located in separate dedicated region). +# flash bank lpc1700 0 0 [calc_checksum] + +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME lpc1700 80000 calc_checksum + +# 4MHz / 6 = 666kHz, so use 500 +jtag_khz 100 + diff --git a/configs/nucleus2g/tools/oocd.sh b/configs/nucleus2g/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..23bc9670316f1c29e184f5933dac14e0e1ebb9af --- /dev/null +++ b/configs/nucleus2g/tools/oocd.sh @@ -0,0 +1,49 @@ +#!/bin/sh + +TOPDIR=$1 +CFGFILE=$2 +USAGE="$0 [-d]" + +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +if [ -z "${CFGFILE}" ]; then + echo "Using olimex.cfg" + CFGFILE=olimex.cfg +fi + +OPENOCD_PATH="/cygdrive/c/OpenOCD/openocd-0.4.0/src" +OPENOCD_EXE=openocd.exe +OPENOCD_CFG="${TOPDIR}/configs/nucleus2g/tools/${CFGFILE}" +OPENOCD_ARGS="-f `cygpath -w ${OPENOCD_CFG}`" + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +if [ ! -d ${OPENOCD_PATH} ]; then + echo "OpenOCD path does not exist: ${OPENOCD_PATH}" + exit 1 +fi +if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then + echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f ${OPENOCD_CFG} ]; then + echo "OpenOCD config file does not exist: ${OPENOCD_CFG}" + exit 1 +fi + +echo "Starting OpenOCD" +${OPENOCD_PATH}/${OPENOCD_EXE} ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" + + + + diff --git a/configs/nucleus2g/tools/scarab.cfg b/configs/nucleus2g/tools/scarab.cfg new file mode 100644 index 0000000000000000000000000000000000000000..a94c6071a218193ed646e92149a92b767b7abe1c --- /dev/null +++ b/configs/nucleus2g/tools/scarab.cfg @@ -0,0 +1,63 @@ +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +#interface +interface ft2232 +ft2232_device_desc "usbScarab A" +ft2232_layout "olimex-jtag" +ft2232_vid_pid 0x0403 0xbbe0 + +# NXP LPC1768 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, clocked with 4MHz internal RC oscillator + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lpc1768 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x4ba00477 +} + +#delays on reset lines +jtag_nsrst_delay 200 +jtag_ntrst_delay 200 + +# LPC2000 & LPC1700 -> SRST causes TRST +reset_config trst_and_srst srst_pulls_trst + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME + +# LPC1768 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM) +$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000 -work-area-backup 0 + +# REVISIT is there any good reason to have this reset-init event handler?? +# Normally they should set up (board-specific) clocking then probe the flash... +$_TARGETNAME configure -event reset-init { + # Force NVIC.VTOR to point to flash at 0 ... + # WHY? This is it's reset value; we run right after reset!! + mwb 0xE000ED08 0x00 +} + +# LPC1768 has 512kB of user-available FLASH (bootloader is located in separate dedicated region). +# flash bank lpc1700 0 0 [calc_checksum] + +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME lpc1700 80000 calc_checksum + +# 4MHz / 6 = 666kHz, so use 500 +jtag_khz 100 +#jtag_rclk 1000 + diff --git a/configs/nucleus2g/tools/usb-driver.txt b/configs/nucleus2g/tools/usb-driver.txt new file mode 100644 index 0000000000000000000000000000000000000000..83d7598a5569e5b386da7281f201cfa2f6441ed7 --- /dev/null +++ b/configs/nucleus2g/tools/usb-driver.txt @@ -0,0 +1,25 @@ +https://www.olimex.com/dev/pdf/ARM/JTAG/Repair%20Procedure%20for%20OpenOcd-Rev.%20G%20drivers.pdf + +Repair procedure for ARM-USB-OCD drivers + +1. Uninstalling ARM-USB-OCD drivers +------------------------------------- +1.1. Connect your programmer/debugger to your computer, open Device Manager + and uninstall the drivers for ARM-USB-OCD. +1.2. After you have uninstalled ARM-USB-TINY driver from Device Manager, + disconnect the programmer from your computer. +1.3. Now you should download FTClean.exe from here: + http://www.ftdichip.com/Support/Utilities/FTClean.zip. +1.4. After download is complete extract the "*.zip" file, open folder FTClean, + and run FTClean.exe +1.5. Ror VID (Hex) select "Other". And after that fill the first box with 15ba + and "PID (Hex)" with 0004. +1.6. Press "Clean System" button. Make sure that all FTDI devices are + disconnected. (My require administrator privileges). + +2. Re-installing the ARM-USB-OCD driver +--------------------------------------- +2.1 Connect the programmer/debugger to the computer. +2.2 When prompted, browse to the C:\gccfd\DRIVERS\ARM-USB-OCD-DRIVER + directory and install. (A different driver is required for OpenOCD + 0.4.0. That driver is available from the olimex.com web site). diff --git a/configs/nucleus2g/usbmsc/Make.defs b/configs/nucleus2g/usbmsc/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..fced4554e86f319ade32128a3cd7edd92cecaf5d --- /dev/null +++ b/configs/nucleus2g/usbmsc/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/nucleus2g/usbmsc/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/nucleus2g/usbmsc/defconfig b/configs/nucleus2g/usbmsc/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b8e5177c6d31a3722b1d2d1c956f64ecf7909cf6 --- /dev/null +++ b/configs/nucleus2g/usbmsc/defconfig @@ -0,0 +1,779 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_ETHERNET is not set +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +CONFIG_LPC17_SSP0=y +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=7982 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_LPCXPRESSO is not set +# CONFIG_ARCH_BOARD_MBED is not set +CONFIG_ARCH_BOARD_NUCLEUS2G=y +# CONFIG_ARCH_BOARD_ZKITARM is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleus2g" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=15 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="msconn_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +CONFIG_USBMSC=y +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=2 +CONFIG_USBMSC_EPBULKIN=5 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=256 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" +CONFIG_USBMSC_VERSIONNO=0x0399 +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=2048 +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +CONFIG_SYSTEM_USBMSC=y +CONFIG_SYSTEM_USBMSC_NLUNS=1 +CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mmcsd0" +CONFIG_SYSTEM_USBMSC_DEVMINOR2=1 +CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_USBMSC_DEVMINOR3=2 +CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" +# CONFIG_SYSTEM_USBMSC_DEBUGMM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleus2g/usbmsc/setenv.sh b/configs/nucleus2g/usbmsc/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..30d3e55beffe82b3ae86d3bcd90f6d40a266c5ec --- /dev/null +++ b/configs/nucleus2g/usbmsc/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/nucleus2g/usbmsc/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export LPCTOOL_DIR="${WD}/configs/nucleus2g/tools" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/nucleus2g/usbserial/Make.defs b/configs/nucleus2g/usbserial/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..afbde5b80569f7eaa0ef17ce5156b4942716f058 --- /dev/null +++ b/configs/nucleus2g/usbserial/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/nucleus2g/usbserial/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/nucleus2g/usbserial/defconfig b/configs/nucleus2g/usbserial/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..1d3e0f08f2b38424908aeee35ded1fb595c54cb7 --- /dev/null +++ b/configs/nucleus2g/usbserial/defconfig @@ -0,0 +1,816 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_ETHERNET is not set +# CONFIG_LPC17_USBHOST is not set +CONFIG_LPC17_USBDEV=y +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# USB device driver options +# +CONFIG_LPC17_USBDEV_EP0_MAXSIZE=64 +# CONFIG_LPC17_USBDEV_FRAME_INTERRUPT is not set +# CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT is not set +CONFIG_LPC17_USBDEV_NDMADESCRIPTORS=0 +# CONFIG_LPC17_USBDEV_DMA is not set +# CONFIG_LPC17_USBDEV_NOVBUS is not set +# CONFIG_LPC17_USBDEV_NOLED is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=7982 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_LPCXPRESSO is not set +# CONFIG_ARCH_BOARD_MBED is not set +CONFIG_ARCH_BOARD_NUCLEUS2G=y +# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set +# CONFIG_ARCH_BOARD_ZKITARM is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleus2g" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="usbserial_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +CONFIG_PL2303=y +# CONFIG_PL2303_CONSOLE is not set +CONFIG_PL2303_EPINTIN=1 +CONFIG_PL2303_EPBULKOUT=2 +CONFIG_PL2303_EPBULKIN=5 +CONFIG_PL2303_EP0MAXPACKET=64 +CONFIG_PL2303_NWRREQS=4 +CONFIG_PL2303_NRDREQS=4 +CONFIG_PL2303_BULKIN_REQLEN=96 +CONFIG_PL2303_RXBUFSIZE=512 +CONFIG_PL2303_TXBUFSIZE=512 +CONFIG_PL2303_VENDORID=0x067b +CONFIG_PL2303_PRODUCTID=0x2303 +CONFIG_PL2303_VENDORSTR="Nuttx" +CONFIG_PL2303_PRODUCTSTR="USBdev Serial" +# CONFIG_CDCACM is not set +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +CONFIG_EXAMPLES_USBSERIAL=y +CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512 +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleus2g/usbserial/setenv.sh b/configs/nucleus2g/usbserial/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..9333b3a2f596a82eb72384dbb1fe922de1687505 --- /dev/null +++ b/configs/nucleus2g/usbserial/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/nucleus2g/usbserial/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export LPCTOOL_DIR="${WD}/configs/nucleus2g/tools" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/nutiny-nuc120/Kconfig b/configs/nutiny-nuc120/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..56738d856fe274f5d1e52630bf0d50a3c8555de2 --- /dev/null +++ b/configs/nutiny-nuc120/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_NUTINY_NUC120 +endif diff --git a/configs/nutiny-nuc120/README.txt b/configs/nutiny-nuc120/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..c6f747d16746234394879f5fbef1b670d3bf6b43 --- /dev/null +++ b/configs/nutiny-nuc120/README.txt @@ -0,0 +1,350 @@ +README.txt +========== + +This is the README file for the port of NuttX to the NuvoTon +NuTiny-SDK-NUC120 board. This board has the NUC120LE3AN chip +with a built-in NuLink debugger. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - NuttX Buildroot Toolchain + - LEDs + - Serial Console + - Debugging + - NuTiny-specific Configuration Options + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + As of this writing, all testing has been performed using the NuttX buildroot + toolchain described below. I have also verified the build using the + CodeSourcery GCC toolchain for windows. Most any contemporary EABI GCC + toolchain should work will a little tinkering. + +NuttX Buildroot Toolchain +========================= + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M0 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M0 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh nutiny-nuc120/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm0-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M0 toolchain for Cygwin under Windows. + +LEDs +==== + + The NuTiny has a single green LED that can be controlled from sofware. + This LED is connected to PIN17. It is pulled high so a low value will + illuminate the LED. + + If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board the + NuTiny. The following definitions describe how NuttX controls the LEDs: + + SYMBOL Meaning LED state + Initially all LED is OFF + ------------------- ----------------------- ------------- ------------ + LED_STARTED NuttX has been started LED ON + LED_HEAPALLOCATE Heap has been allocated LED ON + LED_IRQSENABLED Interrupts enabled LED ON + LED_STACKCREATED Idle stack created LED ON + LED_INIRQ In an interrupt LED should glow + LED_SIGNAL In a signal handler LED might glow + LED_ASSERTION An assertion failed LED ON while handling the assertion + LED_PANIC The system has crashed LED Blinking at 2Hz + LED_IDLE NUC1XX is in sleep mode (Optional, not used) + +Serial Console +============== + +As with most NuttX configurations, the NuTiny-SKD-NUC120 configurations +depend on having a serial console to interact with the software. The +NuTiny-SDK-NUC120, however, has not on-board RS-232 drivers so will be +necessary to connect the NuTiny-SDK-NUC120 UART pins to an external +RS-232 driver board or TTL-to-Serial USB adaptor. + +By default UART1 is used as the serial console on these boards. NUC120LE3AN +is provided as an LQFP48 package and, for this case, the UART1 RX signal +(RXD1) is on PB.4, pin 8, and the TX signal (TXD1) is on PB.5, pin 9. +These pins are available on the NuTiny-SDC-NUC120 JP5. + + NOTE: The TX vs RX labeling may be confusing. On one RS-232 driver board, + I had to connect the NUC120 TXD0 pin to the driver boards RXD pin. How + confusing! + +UART0 is an alternative that can be selected by modifying the default +configuation. UART0 RX (RXD0) is on PB.0, pin 17, and the TX signal (TXD0) +is on PB.1, pin 18. These pins are available on the NuTiny-SDC-NUC120 JP1. + + NOTE: PB.0, pin 17, is also used to control the user LED on board (labeled + "IO"). CONFIG_ARCH_LED should not be selected if UART0 is used. + +The NUC120LE3AN does not support UART2. + +Debugging +========= + +The NuTiny-SDK-NUC120 includes a built-in NuLink debugger. Unfortunately, +full debug support is available only with the Keil and IAR toolchains. +There is, however, a free program called ICP (In-Circuit Programmer). It +can be used to burn programs into FLASH (aka APROM). + +The ICP program can also be used to burn an ISP program into LDROM. The +ISP (In-System Programmer) is available free from the Nuvton website. + +Then NuttX build does not set the configuration words at 0x0030000-0x00300004. +You should uncheck the Config box when burning APROM or the previous contents +of the configuration words will be erased. + +NuTiny-specific Configuration Options +===================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM0=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=nuc1xx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_NUC120LE3AN=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=nutiny-nuc120 (for the NuTiny-SDK-NUC120 development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_NUTINY_NUC120=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=16384 (16Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled as follows. These settings are for + all of the NUC100/120 line and may not be available for the NUC120LE3AN + in particular: + + AHB + --- + + CONFIG_NUC_PDMA Peripheral DMA + CONFIG_NUC_FMC Flash memory + CONFIG_NUC_EBI External bus interface + + APB1 + ---- + + CONFIG_NUC_WDT Watchdog timer + CONFIG_NUC_RTC Real time clock (RTC) + CONFIG_NUC_TMR0 Timer0 + CONFIG_NUC_TMR1 Timer1 + CONFIG_NUC_I2C0 I2C interface + CONFIG_NUC_SPI0 SPI0 master/slave + CONFIG_NUC_SPI1 SPI1 master/slave + CONFIG_NUC_PWM0 PWM0 + CONFIG_NUC_PWM1 PWM1 + CONFIG_NUC_PWM2 PWM2 + CONFIG_NUC_PWM3 PWM3 + CONFIG_NUC_UART0 UART0 + CONFIG_NUC_USBD USB 2.0 FS device controller + CONFIG_NUC_ACMP Analog comparator + CONFIG_NUC_ADC Analog-digital-converter (ADC) + + APB2 + --- + + CONFIG_NUC_PS2 PS/2 interface + CONFIG_NUC_TIMR2 Timer2 + CONFIG_NUC_TIMR3 Timer3 + CONFIG_NUC_I2C1 I2C1 interface + CONFIG_NUC_SPI2 SPI2 master/slave + CONFIG_NUC_SPI3 SPI3 master/slave + CONFIG_NUC_PWM4 PWM4 + CONFIG_NUC_PWM5 PWM5 + CONFIG_NUC_PWM6 PWM6 + CONFIG_NUC_PWM7 PWM7 + CONFIG_NUC_UART1 UART1 + CONFIG_NUC_UART2 UART2 + CONFIG_NUC_I2S I2S interface + + NUC1XX specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - Selects the UARTn (n=0,1,2) for the + console and ttys0. + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer for UARTn. + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + for UARTn. + CONFIG_UARTn_BAUD - The configure BAUD of UARTn, + CONFIG_UARTn_BITS - The number of bits. Must be 5, 6, 7, or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + +Configurations +============== + +Each NuTiny-SDK-NUC120 configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh nutiny-nuc120/ + cd - + . ./setenv.sh + +If this is a Windows native build, then configure.bat should be used +instead of configure.sh: + + configure.bat nutiny-nuc120\ + +Where is one of the following: + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables the serial interfaces on UART1. Support for + builtin applications is disabled. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + 3. Serial Console. A serial console is necessary to interrupt with + NSH. The serial console is configured on UART1 which is available + on JP5: + + UART1 RX signal (RXD1) is on PB.4, pin 8, and + UART1 TX signal (TXD1) is on PB.5, pin 9. + + It is possible to configure NSH to use a USB serial console instead + of an RS-232 serial console. However, that configuration has not + been impelmented as of this writing. + + 4. Memory Usage. The size command gives us the static memory usage. + This is what I get: + + $ size nuttx + text data bss dec hex filename + 35037 106 1092 36235 8d8b nuttx + + And we can get the runtime memory usage from the NSH free command: + + NuttShell (NSH) NuttX-6.25 + nsh> free + total used free largest + Mem: 14160 3944 10216 10216 + nsh> + + Summary: + + - This slightly tuned NSH example uses 34.2KB of FLASH leaving 93.8KB + of FLASH (72%) free from additional application development. + + I did not do all of the arithmetic, but it appears to me that of this + 34+KB of FLASH usage, probably 20-30% of the FLASH is used by libgcc! + libgcc has gotten very fat! + + - Static SRAM usage is about 1.2KB (<4%). + + - At run time, 10.0KB of SRAM (62%) is still available for additional + applications. Most of the memory used at runtime is allocated I/O + buffers and the stack for the NSH main thread (1.5KB). + + There is probably enough free memroy to support 3 or 4 application + threads in addition to NSH. diff --git a/configs/nutiny-nuc120/include/board.h b/configs/nutiny-nuc120/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..c1661aa6fa6e0da704234276e845d957d06134e3 --- /dev/null +++ b/configs/nutiny-nuc120/include/board.h @@ -0,0 +1,170 @@ +/************************************************************************************ + * configs/nutiny-nuc120/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_NUTINY_NUC12_INCLUDE_BOARD_H +#define __CONFIGS_NUTINY_NUC12_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Clocking *************************************************************************/ +/* Crystal frequencies */ + +#define BOARD_XTALHI_FREQUENCY 12000000 +#define BOARD_XTALLO_FREQUENCY 32768 + +/* PLL: The PLL must be 48MHz x N times when using USB + * + * FOUT = FIN x (NF/NR) x (1 / NO) + * FIN = Input reference clock frequency + * NF = Feedback divider + * = (FB_DV + 2) + * NR = Input divider + * = (IN_DV + 2) + * NO = 1 if OUT_DV == 0 + * 2 if OUT_DV == 1 or 2 + * 4 if OUT_DV == 3 + * + * FOUT = 12000000 x 48 / 3 / 4 + * = 48MHz + */ + +#define BOARD_PLL_FIN BOARD_XTALHI_FREQUENCY +#define BOARD_PLL_FB_DV 46 +#define BOARD_PLL_NF (BOARD_PLL_FB_DV+2) +#define BOARD_PLL_IN_DV 1 +#define BOARD_PLL_NR (BOARD_PLL_IN_DV+2) +#define BOARD_PLL_OUT_DV 3 +#define BOARD_PLL_NO 4 + +#define BOARD_PLL_FOUT \ + (BOARD_PLL_FIN * BOARD_PLL_NF / BOARD_PLL_NR / BOARD_PLL_NO) + +/* HCLK. FOUT is the HCLK source clock. */ + +#define BOARD_HCLK_N 1 +#define BOARD_HCLK_FREQUENCY (BOARD_PLL_FOUT / BOARD_HCLK_N) + +/* USB. FOUT is the source. The USB CLK must be 48MHz */ + +#define BOARD_USB_N 1 +#define BOARD_USB_FREQUENCY (BOARD_PLL_FOUT / BOARD_USB_N) + +/* LED definitions ******************************************************************/ +/* The NuTiny has a single green LED that can be controlled from sofware. This LED + * is connected to PIN17. It is pulled high so a low value will illuminate the LED. + */ + +#define BOARD_NLEDS 1 + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board the + * NuTiny. The following definitions describe how NuttX controls the LEDs: + * + * SYMBOL Meaning LED state + * Initially all LED is OFF + * ------------------- ----------------------- ------------- ------------ + * LED_STARTED NuttX has been started LED ON + * LED_HEAPALLOCATE Heap has been allocated LED ON + * LED_IRQSENABLED Interrupts enabled LED ON + * LED_STACKCREATED Idle stack created LED ON + * LED_INIRQ In an interrupt LED should glow + * LED_SIGNAL In a signal handler LED might glow + * LED_ASSERTION An assertion failed LED ON while handling the assertion + * LED_PANIC The system has crashed LED Blinking at 2Hz + * LED_IDLE NUC1XX is is sleep mode (Optional, not used) + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 0 +#define LED_IRQSENABLED 0 +#define LED_STACKCREATED 0 +#define LED_INIRQ 0 +#define LED_SIGNAL 0 +#define LED_ASSERTION 0 +#define LED_PANIC 0 + +/* Button definitions ***************************************************************/ +/* The NuTiny has no buttons */ + +#define NUM_BUTTONS 0 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: nuc_boardinitialize + * + * Description: + * All NUC1XX architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void nuc_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_NUTINY_NUC12_INCLUDE_BOARD_H */ diff --git a/configs/nutiny-nuc120/nsh/Make.defs b/configs/nutiny-nuc120/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..226977656521d5350e188a64ecf4904755756155 --- /dev/null +++ b/configs/nutiny-nuc120/nsh/Make.defs @@ -0,0 +1,124 @@ +############################################################################ +# configs/nutiny-nuc120/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv6-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/nutiny-nuc120/nsh/defconfig b/configs/nutiny-nuc120/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..9858f39fee4c9957bc8dd31ee550a404139fd4d5 --- /dev/null +++ b/configs/nutiny-nuc120/nsh/defconfig @@ -0,0 +1,626 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_DEBUG_SYMBOLS is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +CONFIG_ARCH_CHIP_NUC1XX=y +# CONFIG_ARCH_CHIP_SAM3U is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +CONFIG_ARCH_CORTEXM0=y +CONFIG_ARCH_FAMILY="armv6-m" +CONFIG_ARCH_CHIP="nuc1xx" +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARCH_HAVE_MPU is not set + +# +# ARMV6M Configuration Options +# +# CONFIG_ARMV6M_TOOLCHAIN_ATOLLIC is not set +CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV6M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV6M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL is not set + +# +# NUC100/120 Configuration Options +# +# CONFIG_ARCH_CHIP_NUC100LC1BN is not set +# CONFIG_ARCH_CHIP_NUC100LD1BN is not set +# CONFIG_ARCH_CHIP_NUC100LD2BN is not set +# CONFIG_ARCH_CHIP_NUC100RC1BN is not set +# CONFIG_ARCH_CHIP_NUC100RD1BN is not set +# CONFIG_ARCH_CHIP_NUC100RD2BN is not set +# CONFIG_ARCH_CHIP_NUC100LD3AN is not set +# CONFIG_ARCH_CHIP_NUC100LE3AN is not set +# CONFIG_ARCH_CHIP_NUC100RD3AN is not set +# CONFIG_ARCH_CHIP_NUC100RE3AN is not set +# CONFIG_ARCH_CHIP_NUC100VD2AN is not set +# CONFIG_ARCH_CHIP_NUC100VD3AN is not set +# CONFIG_ARCH_CHIP_NUC100VE3AN is not set +# CONFIG_ARCH_CHIP_NUC120LC1BN is not set +# CONFIG_ARCH_CHIP_NUC120LD1BN is not set +# CONFIG_ARCH_CHIP_NUC120LD2BN is not set +# CONFIG_ARCH_CHIP_NUC120RC1BN is not set +# CONFIG_ARCH_CHIP_NUC120RD1BN is not set +# CONFIG_ARCH_CHIP_NUC120RD2BN is not set +# CONFIG_ARCH_CHIP_NUC120LD3AN is not set +CONFIG_ARCH_CHIP_NUC120LE3AN=y +# CONFIG_ARCH_CHIP_NUC120RD3AN is not set +# CONFIG_ARCH_CHIP_NUC120RE3AN is not set +# CONFIG_ARCH_CHIP_NUC120VD2AN is not set +# CONFIG_ARCH_CHIP_NUC120VD3AN is not set +# CONFIG_ARCH_CHIP_NUC120VE3AN is not set +CONFIG_ARCH_FAMILY_NUC120=y +CONFIG_ARCH_NUC_MEDIUMDENSITY=y + +# +# NUC1XX Peripheral Support +# +# CONFIG_NUC_PDMA is not set +# CONFIG_NUC_FMC is not set +# CONFIG_NUC_EBI is not set +# CONFIG_NUC_WDT is not set +# CONFIG_NUC_RTC is not set +# CONFIG_NUC_TMR0 is not set +# CONFIG_NUC_TMR1 is not set +# CONFIG_NUC_TIMR2 is not set +# CONFIG_NUC_TIMR3 is not set +# CONFIG_NUC_I2C0 is not set +# CONFIG_NUC_I2C1 is not set +# CONFIG_NUC_SPI0 is not set +# CONFIG_NUC_SPI1 is not set +# CONFIG_NUC_SPI2 is not set +# CONFIG_NUC_SPI3 is not set +# CONFIG_NUC_PWM0 is not set +# CONFIG_NUC_PWM1 is not set +# CONFIG_NUC_PWM2 is not set +# CONFIG_NUC_PWM3 is not set +# CONFIG_NUC_PWM4 is not set +# CONFIG_NUC_PWM5 is not set +# CONFIG_NUC_PWM6 is not set +# CONFIG_NUC_PWM7 is not set +# CONFIG_NUC_UART0 is not set +CONFIG_NUC_UART1=y +# CONFIG_NUC_USBD is not set +# CONFIG_NUC_ACMP is not set +# CONFIG_NUC_ADC is not set +# CONFIG_NUC_PS2 is not set +# CONFIG_NUC_I2S is not set +CONFIG_NUC_INTHI=y +CONFIG_NUC_SYSTICK_CORECLK=y +# CONFIG_NUC_SYSTICK_XTALHI is not set +# CONFIG_NUC_SYSTICK_XTALLO is not set +# CONFIG_NUC_SYSTICK_XTALHId2 is not set +# CONFIG_NUC_SYSTICK_HCLKd2 is not set +# CONFIG_NUC_SYSTICK_INTHId2 is not set +# CONFIG_NUC_UARTCLK_XTALHI is not set +# CONFIG_NUC_UARTCLK_PLL is not set +CONFIG_NUC_UARTCLK_INTHI=y + +# +# External Memory Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=2988 +# CONFIG_ARCH_CALIBRATION is not set +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=16384 +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NUTINY_NUC120=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nutiny-nuc120" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=26 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WORKQUEUE is not set +CONFIG_SCHED_WAITPID=y +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=8 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=6 +CONFIG_NFILE_STREAMS=6 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1536 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_PWM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART1=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=64 +CONFIG_UART1_TXBUFSIZE=64 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_FS_RAMMAP is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_GRAN is not set + +# +# Binary Formats +# +CONFIG_BINFMT_DISABLE=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Helper Functions +# +# CONFIG_LIB_KBDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_SYSTEM_COMPOSITE is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MODBUS is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_CAT is not set +CONFIG_NSH_DISABLE_CD=y +CONFIG_NSH_DISABLE_CP=y +CONFIG_NSH_DISABLE_DD=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +CONFIG_NSH_DISABLE_MKDIR=y +CONFIG_NSH_DISABLE_MKFATFS=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +CONFIG_NSH_DISABLE_MOUNT=y +# CONFIG_NSH_DISABLE_MW is not set +CONFIG_NSH_DISABLE_NSFMOUNT=y +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PING=y +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +CONFIG_NSH_DISABLE_RM=y +CONFIG_NSH_DISABLE_RMDIR=y +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_UMOUNT=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_FILEIOSIZE=64 +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_NESTDEPTH=3 +CONFIG_NSH_DISABLESCRIPT=y +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_CONSOLE=y + +# +# USB Trace Support +# +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# System NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# diff --git a/configs/nutiny-nuc120/nsh/setenv.sh b/configs/nutiny-nuc120/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..f026535006b476089bc8425c2062ea37335bd309 --- /dev/null +++ b/configs/nutiny-nuc120/nsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/nutiny-nuc120/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/nutiny-nuc120/scripts/ld.script b/configs/nutiny-nuc120/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..3709d1d8f0be08afad2035f5e3b8b044abec091f --- /dev/null +++ b/configs/nutiny-nuc120/scripts/ld.script @@ -0,0 +1,115 @@ +/**************************************************************************** + * configs/nutiny-nuc120/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The NUC120LE3AN has 128Kb of FLASH beginning at address 0x0000:0000 and + * 16Kb of SRAM at address 0x20000000. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 128K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 16K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/nutiny-nuc120/src/.gitignore b/configs/nutiny-nuc120/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/nutiny-nuc120/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/nutiny-nuc120/src/Makefile b/configs/nutiny-nuc120/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..21840d8a371502ab7ba64dcdd3ffcc1c10c35b7d --- /dev/null +++ b/configs/nutiny-nuc120/src/Makefile @@ -0,0 +1,65 @@ +############################################################################ +# configs/nutiny-nuc120/src/Makefile +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = nuc_boardinitialize.c + +ifeq ($(CONFIG_HAVE_CXX),y) +CSRCS += nuc_cxxinitialize.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += nuc_led.c +endif + +ifeq ($(CONFIG_NUC1XX_USBD),y) +CSRCS += nuc_usbd.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += nuc_pwm.c +endif + +ifeq ($(CONFIG_QENCODER),y) +CSRCS += nuc_qencoder.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += nuc_watchdog.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/nutiny-nuc120/src/nuc_boardinitialize.c b/configs/nutiny-nuc120/src/nuc_boardinitialize.c new file mode 100644 index 0000000000000000000000000000000000000000..ef4ec1a7e844a7e277bec5c8841bca21440c4b0d --- /dev/null +++ b/configs/nutiny-nuc120/src/nuc_boardinitialize.c @@ -0,0 +1,102 @@ +/************************************************************************************ + * configs/nutiny-nuc120/src/up_boot.c + * arch/arm/src/board/up_boot.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "nutiny-nuc120.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: nuc_boardinitialize + * + * Description: + * All NUC1XX architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void nuc_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * nuc_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_NUC1XX_SPI1) || defined(CONFIG_NUC1XX_SPI2) || defined(CONFIG_NUC1XX_SPI3) + if (nuc_spidev_initialize) + { + nuc_spidev_initialize(); + } +#endif + + /* Initialize USB if the 1) USB device controller is in the configuration and 2) + * disabled, and 3) the weak function nuc_usbinitialize() has been brought + * into the build. Presumeably either CONFIG_USBDEV is also selected. + */ + +#ifdef CONFIG_NUC1XX_USB + if (nuc_usbinitialize) + { + nuc_usbinitialize(); + } +#endif + + /* Configure on-board LED if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + nuc_led_initialize(); +#endif +} diff --git a/configs/nutiny-nuc120/src/nuc_led.c b/configs/nutiny-nuc120/src/nuc_led.c new file mode 100644 index 0000000000000000000000000000000000000000..87a08c7c8f6269e1433702eb7e8a70227515c5a6 --- /dev/null +++ b/configs/nutiny-nuc120/src/nuc_led.c @@ -0,0 +1,148 @@ +/**************************************************************************** + * configs/nutiny-nuc120/src/up_autoleds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* The NuTiny has a single green LED that can be controlled from sofware. + * This LED is connected to PIN17. It is pulled high so a low value will + * illuminate the LED. + * + * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board the + * NuTiny. The following definitions describe how NuttX controls the LEDs: + * + * SYMBOL Meaning LED state + * Initially all LED is OFF + * ------------------- ----------------------- ------------- ------------ + * LED_STARTED NuttX has been started LED ON + * LED_HEAPALLOCATE Heap has been allocated LED ON + * LED_IRQSENABLED Interrupts enabled LED ON + * LED_STACKCREATED Idle stack created LED ON + * LED_INIRQ In an interrupt LED should glow + * LED_SIGNAL In a signal handler LED might glow + * LED_ASSERTION An assertion failed LED ON while handling the assertion + * LED_PANIC The system has crashed LED Blinking at 2Hz + * LED_IDLE NUC1XX is is sleep mode (Optional, not used) + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "nuc_gpio.h" +#include "nutiny-nuc120.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS) +# define led_dumpgpio(m) nuc_dumpgpio(GPIO_LED, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nuc_led_initialize + * + * Description: + * Initialize the on-board LED + * + ****************************************************************************/ + +void nuc_led_initialize(void) +{ + led_dumpgpio("Before configuration"); + nuc_configgpio(GPIO_LED); + led_dumpgpio("After configuration"); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + nuc_gpiowrite(GPIO_LED, false); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + nuc_gpiowrite(GPIO_LED, true); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/nutiny-nuc120/src/nutiny-nuc120.h b/configs/nutiny-nuc120/src/nutiny-nuc120.h new file mode 100644 index 0000000000000000000000000000000000000000..ba5f4b3af3fc37d3821f757b2aac676378708f11 --- /dev/null +++ b/configs/nutiny-nuc120/src/nutiny-nuc120.h @@ -0,0 +1,131 @@ +/**************************************************************************************************** + * configs/nutiny-nuc120/src/nutiny-nuc120.h + * arch/arm/src/board/nutiny-nuc120.n + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __CONFIGS_NUTINY_NUC120_SRC_NUTINY_NUC120_H +#define __CONFIGS_NUTINY_NUC120_SRC_NUTINY_NUC120_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include +#include + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ +/* Configuration ************************************************************************************/ + +/* NuTiny-EVB-120 GPIOs *****************************************************************************/ +/* The NuTiny has a single green LED that can be controlled from sofware. This LED + * is connected to PIN17 (PB.0). It is pulled high so a low value will illuminate the LED. + * + * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board the + * NuTiny. The following definitions describe how NuttX controls the LEDs: + * + * SYMBOL Meaning LED state + * Initially all LED is OFF + * ------------------- ----------------------- ------------- ------------ + * LED_STARTED NuttX has been started LED ON + * LED_HEAPALLOCATE Heap has been allocated LED ON + * LED_IRQSENABLED Interrupts enabled LED ON + * LED_STACKCREATED Idle stack created LED ON + * LED_INIRQ In an interrupt LED should glow + * LED_SIGNAL In a signal handler LED might glow + * LED_ASSERTION An assertion failed LED ON while handling the assertion + * LED_PANIC The system has crashed LED Blinking at 2Hz + * LED_IDLE NUC1XX is in sleep mode (Optional, not used) + */ + +#define GPIO_LED (GPIO_OUTPUT | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN0) + +/* Button definitions ***************************************************************/ +/* The NuTiny has no buttons */ + +/**************************************************************************************************** + * Public Types + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +/**************************************************************************************************** + * Name: nuc_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the NuTiny-EVB-120 board. + * + ****************************************************************************************************/ + +void weak_function nuc_spidev_initialize(void); + +/**************************************************************************************************** + * Name: nuc_usbinitialize + * + * Description: + * Called from nuc_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the NuTiny-EVB-120 board. + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_USB +void weak_function nuc_usbinitialize(void); +#endif + +/**************************************************************************************************** + * Name: nuc_led_initialize + * + * Description: + * Initialize the on-board LED + * + ****************************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void nuc_led_initialize(void); +#endif + + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_NUTINY_NUC120_SRC_NUTINY_NUC120_H */ + diff --git a/configs/olimex-efm32g880f128-stk/Kconfig b/configs/olimex-efm32g880f128-stk/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..836315ffcaebdb13107fafc524f0be55f5bf98a9 --- /dev/null +++ b/configs/olimex-efm32g880f128-stk/Kconfig @@ -0,0 +1,10 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_OLIMEX_EFM32G880F128_STK + +#comment "EFM32 G8XX STK Hardware Configuration" + +endif # ARCH_BOARD_OLIMEX_EFM32G880F128_STK diff --git a/configs/olimex-efm32g880f128-stk/README.txt b/configs/olimex-efm32g880f128-stk/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..9309a0397689c2ef8291eac914053ef9592b1814 --- /dev/null +++ b/configs/olimex-efm32g880f128-stk/README.txt @@ -0,0 +1,173 @@ +README +====== + + This README file discusses the port of NuttX to the Olimex EFM32G880F128-STK + development board. This board features: + + • EFM32G880F128 + - 32 bit Cortex-M3™ + - 128KiB Program Flash, 16KiB Bytes RAM + - 85 GPIO, 8 Channel DMA + - 12 bit ADC 1Msps + - 3xUART/SPI, 2x low power UART + - I2C + - 3x 16bit TIMERS + - 3x2 CC-PWM + - SSC + - RTC + - WDT + - Up to 32MHz operation + • 32.768 kHz crystal + • 32 MHz crystal + • LCD custom display + • DEBUG connector with ARM 2x10 pin layout for programming/debugging + with ARM-JTAG-EW + • UEXT connector + • EXT extension connector + • RS232 connector and driver + • Power jack + • Lithium coin battery holder + • RESET circuit , RESET button + • Four user buttons + • Buzzer + • On-board voltage regulator 3.3V with up to 800mA current + • Power supply filtering capacitor + • Extension headers for some of the uC ports + RST and power supply + +STATUS +====== + + I created this configuration with good intentions but was stopped because + I do not have a SWD tool that I can use with the board -- and I am not + likely to get one soon. + +LEDs +==== + + The EFM32G880F128-STK has no user controllable LEDs. + +Buttons +======= + + The Olimex board has four buttons, BUT1-4. Each is grounded and so should + have a weak pull-up so that it will be sensed as "1" when open and "0" + when closed. + + --------------------- --------------------- + PIN CONNECTIONS + --------------------- --------------------- + PE0/PCNT0_S0IN/U0_TX BUT1, EXT-18 + PE1/PCNT0_S1IN/U0_RX BUT2, EXT-19 + PE2/ACMP0_O BUT3, EXT-20 + E3/ACMP1_O BUT4, EXT-21 + --------------------- --------------------- + +Serial Console +============== + + Pin Availability + ---------------- + The EFM32G890F128 support the following options for serial output. NOTE + (1) that not all of these pins are available for use as a serial console, + however. And (2) not all pins made available by the board. + + EFM32 PIN GPIO NOTES/CONFLICTS/AVAILABILITY + ------- -- ---- ---------------------------------------------- + US0_RX #0 PE11 SEG7 (LCD) + US0_RX #1 PE6 COM2 (LCD) + US0_RX #2 PC10 **AVAILABLE at EXT-12** + + US0_TX #0 PE10 SEG6 (LCD) + US0_TX #1 PE7 COM3 (LCD) + US0_TX #2 PC11 **AVAILABLE at EXT-13** + ------- -- ---- + US1_RX #0 PC1 **AVAILABLE at EXT-5** + US1_RX #1 PD1 MISO1, Available at UEXT-7 + + US1_TX #0 PC0 **AVAILABLE at EXT-4** + US1_TX #1 PD0 MOSI1, Available at UEXT-8 + ------- -- ---- + US2_RX #0 PC3 **AVAILABLE at EXT-7** + US2_RX #1 PB4 SEG21 (LCD) + + US2_TX #0 PC2 **AVAILABLE at EXT-6** + US2_TX #1 PB3 SEG20 (LCD) + ------- -- ---- + U0_RX #0 PF7 SEG25 (LCD) + U0_RX #1 PE1 **AVAILABLE at EXT-19** + U0_RX #2 PA4 SEG18 (LCD) + U0_RX #3 PC15 DBG_SWV + + U0_TX #0 PF6 SEG24 (LCD) + U0_TX #1 PE0 **AVAILABLE at EXT-18** + U0_TX #2 PA3 SEG17 (LCD) + U0_TX #3 PC14 **AVAILABLE at EXT-16** + ------- -- ---- + LEU0_RX #0 PD5 LEU0_RX, Available at UEXT-4 + LEU0_RX #1 PB14 HFXTAL_N + LEU0_RX #2 PE15 SEG11 (LCD) + + LEU0_TX #0 PD4 LEU0_TX, Available at UEXT-3 + LEU0_TX #1 PB13 HFXTAL_P + LEU0_TX #2 PE14 SEG10 (LCD) + ------- -- ---- + LEU1_RX #0 PC7 LEU1_RX to DB-9 connector + LEU1_RX #1 PA6 SEG19 (LCD) + + LEU1_TX #0 PC6 LEU1_TX to DB-9 connector + LEU1_TX #1 PA5 SEG18 (LCD) + ------- -- ---- + + RS-232 Driver/DB-9 Connector + ---------------------------- + LEUART1 is available on through an RS232 driver on DB-9 connector. + Unfortunately, there is no LEUART serial driver available in NuttX as of + this writing. + + Default Serial Console + ---------------------- + LEUART1 is configured as the default serial console at 2400 8N1 + on pins PC6 and PC7. + +Configurations +============== + Each EFM32G880F128-STK configuration is maintained in a sub-director + and can be selected as follow: + + cd tools + ./configure.sh olimex-efm32g880f128-stk/ + cd - + . ./setenv.sh + + If this is a Windows native build, then configure.bat should be used + instead of configure.sh: + + configure.bat olimex-efm32g880f128-stk\ + + Where is one of the following: + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables the serial interfaces on LEUART1. Support for + builtin applications is enabled, but in the base configuration no + builtin applications are selected (see NOTES below). + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows diff --git a/configs/olimex-efm32g880f128-stk/include/board.h b/configs/olimex-efm32g880f128-stk/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..f9c0a2c4cebf13a301a25da6dfa1e24a449a5976 --- /dev/null +++ b/configs/olimex-efm32g880f128-stk/include/board.h @@ -0,0 +1,258 @@ +/**************************************************************************** + * configs/olimex-efm32g880f128-stk/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_OLIMEX_EFM32G880F128_STK_INCLUDE_BOARD_H +#define __CONFIGS_OLIMEX_EFM32G880F128_STK_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "chip/efm32_cmu.h" +#include "chip/efm32_usart.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Clocking *****************************************************************/ +/* Clock Sources + * - 1-28 MHz High Frequency RC Oscillator (HFRCO) + * - 4-32 MHz High Frequency Crystal Oscillator (HFXO) + * - 32.768 kHz Low Frequency RC Oscillator (LFRCO) + * - 32.768 kHz Low Frequency Crystal Oscillator (LFXO) + * - 1KHz Ultra Low Frequency RC Oscillator (ULFRCO) + * + * The device boots with 14 MHz HFRCO as the HFCLK source. + */ + +#define BOARD_HAVE_HFXO 1 /* Have High frequency crystal oscillator */ +#define BOARD_HAVE_LFXO 1 /* Have Loq frequency crystal oscillator */ + +#define BOARD_HFRCO_FREQUENCY 14000000 /* 14MHz on reset */ +#define BOARD_HFXO_FREQUENCY 32000000 /* 32MHz crystal on board */ +#define BOARD_LFRCO_FREQUENCY 32768 /* Low frequency oscillator */ +#define BOARD_LFXO_FREQUENCY 32768 /* 32MHz crystal on board */ +#define BOARD_ULFRCO_FREQUNCY 1000 /* Ultra low frequency oscillator */ + +/* HFCLK - High Frequency Clock + * + * HFCLK is the selected High Frequency Clock. This clock is used by the CMU + * and drives the two prescalers that generate HFCORECLK and HFPERCLK. The + * HFCLK can be driven by a high-frequency oscillator (HFRCO or HFXO) or one + * of the low-frequency oscillators (LFRCO or LFXO). By default the HFRCO is + * selected. + */ + +#define BOARD_HFCLKSEL _CMU_CMD_HFCLKSEL_HFXO +#define BOARD_HFCLKDIV 0 /* Does not apply to EFM32G */ +#define BOARD_HFCLK_FREQUENCY BOARD_HFXO_FREQUENCY + +/* HFCORECLK - High Frequency Core Clock + * + * HFCORECLK is a prescaled version of HFCLK. This clock drives the Core + * Modules, which consists of the CPU and modules that are tightly coupled + * to the CPU, e.g. MSC, DMA etc. The frequency of HFCORECLK is set using + * the CMU_HFCORECLKDIV register. + */ + +#define BOARD_HFCORECLKDIV _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT +#define BOARD_HFCORECLK_FREQUENCY BOARD_HFXO_FREQUENCY + +/* HFPERCLK - High Frequency Peripheral Clock + * + * Like HFCORECLK, HFPERCLK can also be a prescaled version of HFCLK. This + * clock drives the High-Frequency Peripherals. The frequency of HFPERCLK is + * set using the CMU_HFPERCLKDIV register. + */ + +#define BOARD_HFPERCLKDIV _CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT +#define BOARD_HFPERCLK_FREQUENCY BOARD_HFXO_FREQUENCY + +/* LFACLK - Low Frequency A Clock + * + * LFACLK is the selected clock for the Low Energy A Peripherals. There are + * four selectable sources for LFACLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO. + * From reset, the LFACLK source is set to LFRCO. However, note that the + * LFRCO is disabled from reset. The selection is configured using the LFA + * field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the Low Energy A + * Peripherals to be used as high-frequency peripherals. + * + * Use _CMU_LFCLKSEL_LFA_DISABLED to disable + * ULFRCO is a special case. + */ + +#define BOARD_LFACLKSEL _CMU_LFCLKSEL_LFA_LFXO +#undef BOARD_LFACLK_ULFRCO +#define BOARD_LFACLK_FREQUENCY BOARD_LFXO_FREQUENCY + +/* LFBCLK - Low Frequency B Clock + * + * LFBCLK is the selected clock for the Low Energy B Peripherals. There are + * four selectable sources for LFBCLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO. + * From reset, the LFBCLK source is set to LFRCO. However, note that the + * LFRCO is disabled from reset. The selection is configured using the LFB + * field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the Low Energy B + * Peripherals to be used as high-frequency peripherals. + * + * Use _CMU_LFCLKSEL_LFB_DISABLED to disable + * ULFRCO is a special case. + */ + +#define BOARD_LFBCLKSEL _CMU_LFCLKSEL_LFB_LFXO +#undef BOARD_LFBCLK_ULFRCO +#define BOARD_LFBCLK_FREQUENCY BOARD_LFXO_FREQUENCY + +/* PCNTnCLK - Pulse Counter n Clock + * + * Each available pulse counter is driven by its own clock, PCNTnCLK where + * n is the pulse counter instance number. Each pulse counter can be + * configured to use an external pin (PCNTn_S0) or LFACLK as PCNTnCLK. + */ + +/* WDOGCLK - Watchdog Timer Clock + * + * The Watchdog Timer (WDOG) can be configured to use one of three different + * clock sources: LFRCO, LFXO or ULFRCO. ULFRCO (Ultra Low Frequency RC + * Oscillator) is a separate 1 kHz RC oscillator that also runs in EM3. + */ + +/* AUXCLK - Auxiliary Clock + * + * AUXCLK is a 1-28 MHz clock driven by a separate RC oscillator, AUXHFRCO. + * This clock is used for flash programming and Serial Wire Output (SWO). + * During flash programming this clock will be active. If the AUXHFRCO has + * not been enabled explicitly by software, the MSC will automatically + * start and stop it. The AUXHFRCO is enabled by writing a 1 to AUXHFRCOEN + * in CMU_OSCENCMD. This explicit enabling is required when SWO is used. + */ + +/* LEDs *********************************************************************/ +/* The EFM32 Gecko Starter Kit supports 4 yellow LEDs. One side is grounded + * so these LEDs are illuminated by outputting a high value. + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + * any way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_LED3 2 +#define BOARD_LED4 3 +#define BOARD_NLEDS 4 + +#define BOARD_LED_GREEN BOARD_LED1 +#define BOARD_LED_ORANGE BOARD_LED2 +#define BOARD_LED_RED BOARD_LED3 +#define BOARD_LED_BLUE BOARD_LED4 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) +#define BOARD_LED4_BIT (1 << BOARD_LED4) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on + * board the EFM32 Gecko Starter Kit. The following definitions describe + * how NuttX controls the LEDs in this configuration: + */ + +#define LED_STARTED 0 /* LED1 */ +#define LED_HEAPALLOCATE 1 /* LED2 */ +#define LED_IRQSENABLED 2 /* LED1 + LED2 */ +#define LED_STACKCREATED 3 /* LED3 */ +#define LED_INIRQ 4 /* LED1 + LED3 */ +#define LED_SIGNAL 5 /* LED2 + LED3 */ +#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */ +#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */ + +/* Buttons ******************************************************************/ +/* The Olimex board has four buttons, BUT1-4. Each is grounded and so should + * have a weak pull-up so that it will be sensed as "1" when open and "0" + * when closed. + * + * --------------------- --------------------- + * PIN CONNECTIONS + * --------------------- --------------------- + * PE0/PCNT0_S0IN/U0_TX BUT1, EXT-18 + * PE1/PCNT0_S1IN/U0_RX BUT2, EXT-19 + * PE2/ACMP0_O BUT3, EXT-20 + * PE3/ACMP1_O BUT4, EXT-21 + * --------------------- --------------------- + */ + +#define BUTTON_1 0 +#define BUTTON_2 1 +#define BUTTON_3 2 +#define BUTTON_4 3 +#define NUM_BUTTONS 4 + +#define BUTTON_1_BIT (1 << BUTTON_1) +#define BUTTON_2_BIT (1 << BUTTON_2) +#define BUTTON_3_BIT (1 << BUTTON_3) +#define BUTTON_4_BIT (1 << BUTTON_4) + +/* Pin routing **************************************************************/ +/* UART0: + * + * U0_RX #1 PE1 **AVAILABLE at EXT-19** + * U0_TX #1 PE0 **AVAILABLE at EXT-18** + */ + +#define BOARD_UART0_RX_GPIO (GPIO_PORTE|GPIO_PIN1) +#define BOARD_UART0_TX_GPIO (GPIO_PORTE|GPIO_PIN0) +#define BOARD_UART0_ROUTE_LOCATION _USART_ROUTE_LOCATION_LOC1 + +/* LEUART1: + * + * LEU1_RX #0 PC7 LEU1_RX to DB-9 connector + * LEU1_TX #0 PC6 LEU1_TX to DB-9 connector + */ + +#define BOARD_LEUART1_RX_GPIO (GPIO_PORTC|GPIO_PIN7) +#define BOARD_LEUART1_TX_GPIO (GPIO_PORTC|GPIO_PIN6) +#define BOARD_LEUART1_ROUTE_LOCATION _LEUART_ROUTE_LOCATION_LOC0 + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#endif /* __CONFIGS_EFM32_DK3650_INCLUDE_BOARD_H */ diff --git a/configs/olimex-efm32g880f128-stk/nsh/Make.defs b/configs/olimex-efm32g880f128-stk/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..3e8d7171f32ddb78c7ea49c8c9e62865d6ac5074 --- /dev/null +++ b/configs/olimex-efm32g880f128-stk/nsh/Make.defs @@ -0,0 +1,112 @@ +############################################################################ +# configs/olimex-efm32g880f128-stk/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs +include ${TOPDIR}/tools/Config.mk + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/olimex-efm32g880f128-stk/nsh/defconfig b/configs/olimex-efm32g880f128-stk/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..8783912c3e082c15ff901422749fe408119eacf3 --- /dev/null +++ b/configs/olimex-efm32g880f128-stk/nsh/defconfig @@ -0,0 +1,826 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +CONFIG_ARCH_CHIP_EFM32=y +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="efm32" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARCH_HAVE_FPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set + +# +# EFM32 Configuration Options +# +# CONFIG_ARCH_CHIP_EFM32TG840F32 is not set +CONFIG_ARCH_CHIP_EFM32G880F128=y +# CONFIG_ARCH_CHIP_EFM32G890F128 is not set +# CONFIG_ARCH_CHIP_EFM32GG332F1024 is not set +# CONFIG_EFM32_EFM32TG is not set +CONFIG_EFM32_EFM32G=y +# CONFIG_EFM32_EFM32GG is not set + +# +# EFM32 Peripheral Support +# +CONFIG_EFM32_HAVE_USART2=y +CONFIG_EFM32_HAVE_UART0=y +# CONFIG_EFM32_HAVE_UART1 is not set +CONFIG_EFM32_HAVE_LEUART1=y +# CONFIG_EFM32_USART is not set +# CONFIG_EFM32_UART is not set +CONFIG_EFM32_LEUART=y +# CONFIG_EFM32_USART0 is not set +# CONFIG_EFM32_USART1 is not set +# CONFIG_EFM32_USART2 is not set +# CONFIG_EFM32_UART0 is not set +# CONFIG_EFM32_UART1 is not set +# CONFIG_EFM32_LEUART0 is not set +CONFIG_EFM32_LEUART1=y +CONFIG_EFM32_GPIO_IRQ=y +CONFIG_LEUART1_SERIAL_CONSOLE=y +# CONFIG_NO_LEUART_SERIAL_CONSOLE is not set + +# +# LEUART1 Configuration +# +CONFIG_LEUART1_RXBUFSIZE=64 +CONFIG_LEUART1_TXBUFSIZE=64 +CONFIG_LEUART1_BAUD=2400 +CONFIG_LEUART1_BITS=8 +CONFIG_LEUART1_PARITY=0 +CONFIG_LEUART1_2STOP=0 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=2662 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_OLIMEX_EFM32G880F128_STK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-efm32g880f128-stk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_ARCH_HAVE_OTHER_UART=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_UART0_SERIAL_CONSOLE is not set +CONFIG_OTHER_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +# CONFIG_NSH_READLINE is not set +CONFIG_NSH_CLE=y +CONFIG_NSH_LINELEN=78 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=256 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +CONFIG_SYSTEM_CLE=y +CONFIG_SYSTEM_CLE_DEBUGLEVEL=0 + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-efm32g880f128-stk/nsh/setenv.sh b/configs/olimex-efm32g880f128-stk/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..2a2238f783e553d29cd9f395ba81114da29c9c27 --- /dev/null +++ b/configs/olimex-efm32g880f128-stk/nsh/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/olimex-efm32g880f128-stk/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-efm32g880f128-stk/scripts/ld.script b/configs/olimex-efm32g880f128-stk/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..1f934815c5c2b8fda17240176079aeb3c78063f7 --- /dev/null +++ b/configs/olimex-efm32g880f128-stk/scripts/ld.script @@ -0,0 +1,110 @@ +/**************************************************************************** + * configs/olimex-efm32g880f128-stk/scripts/ld.script + * + * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 131072 + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 16384 +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/olimex-efm32g880f128-stk/src/.gitignore b/configs/olimex-efm32g880f128-stk/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/olimex-efm32g880f128-stk/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/olimex-efm32g880f128-stk/src/Makefile b/configs/olimex-efm32g880f128-stk/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..413781b411404bfe6742646c0d0c1d2c7f549372 --- /dev/null +++ b/configs/olimex-efm32g880f128-stk/src/Makefile @@ -0,0 +1,45 @@ +############################################################################ +# configs/olimex-efm32g880f128-stk/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = efm32_boot.c + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += efm32_buttons.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/olimex-efm32g880f128-stk/src/efm32_boot.c b/configs/olimex-efm32g880f128-stk/src/efm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..76074dbe06a8944ea1ccc01ef42834a489537faa --- /dev/null +++ b/configs/olimex-efm32g880f128-stk/src/efm32_boot.c @@ -0,0 +1,83 @@ +/**************************************************************************** + * configs/olimex-efm32g880f128-stk/src/efm32_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "efm32_start.h" + +#include "efm32g880f128-stk.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: efm32_boardinitialize + * + * Description: + * All EFM32 architectures must provide the following entry point. This + * entry point is called early in the initialization before any devices + * have been initialized. + * + ****************************************************************************/ + +void efm32_boardinitialize(void) +{ +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_initialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ +} +#endif diff --git a/configs/olimex-efm32g880f128-stk/src/efm32_buttons.c b/configs/olimex-efm32g880f128-stk/src/efm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..5545d5dac7718873f76c7c37f7266ecdd5fc1cf8 --- /dev/null +++ b/configs/olimex-efm32g880f128-stk/src/efm32_buttons.c @@ -0,0 +1,228 @@ +/**************************************************************************** + * configs/olimex-efm32g880f128-stk/src/efm32_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* The Olimex board has four buttons, BUT1-4. Each is grounded and so should + * have a weak pull-up so that it will be sensed as "1" when open and "0" + * when closed. + * + * --------------------- --------------------- + * PIN CONNECTIONS + * --------------------- --------------------- + * PE0/PCNT0_S0IN/U0_TX BUT1, EXT-18 + * PE1/PCNT0_S1IN/U0_RX BUT2, EXT-19 + * PE2/ACMP0_O BUT3, EXT-20 + * E3/ACMP1_O BUT4, EXT-21 + * --------------------- --------------------- + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "efm32_gpio.h" +#include "efm32g880f128-stk.h" + +#if CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_EFM32_GPIO_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +#if 0 /* REVISIT -- See comments in board_button_irq() */ +static xcpt_t g_button_handlers[NUM_BUTTONS]; +#endif +static const uint8_t g_button_irqs[NUM_BUTTONS]; +#endif + +static const gpio_pinset_t g_button_configs[NUM_BUTTONS] = +{ + GPIO_BUTTON_1, GPIO_BUTTON_2, GPIO_BUTTON_3, GPIO_BUTTON_4 +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure each button */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + (void)efm32_configgpio(g_button_configs[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret; + int i; + + /* Check each button */ + + for (i = 0, ret = 0; i < NUM_BUTTONS; i++) + { + /* The button is closed if a low value is sensed */ + + if (!efm32_gpioread(g_button_configs[i])) + { + ret |= (1 << i); + } + } + + return ret; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address is returned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_EFM32_GPIO_IRQ must be selected to enable the + * overall GPIO IRQ feature. + * + * Returned Value: + * This function should return the old interrupt handler value, but + * currently always returns NULL. + * + ****************************************************************************/ + +#if defined(CONFIG_EFM32_GPIO_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id >=0 && id < NUM_BUTTONS) + { + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get/set the old button handler + * + * REVISIT: Keeping copies of the hander in RAM seems wasteful + * since the OS already has this information internally. + */ + +#if 0 /* REVISIT */ + oldhandler = g_button_handlers[id]; + g_button_handlers[id] = irqhandler; +#else + oldhandler = NULL; +#endif + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + /* Configure the interrupt */ + + efm32_gpioirq(g_button_configs[id]); + + /* Attach and enable the interrupt */ + + (void)irq_attach(g_button_irqs[id], irqhandler); + efm32_gpioirqenable(g_button_irqs[id]); + } + else + { + /* Disable and detach the interrupt */ + + efm32_gpioirqdisable(g_button_irqs[id]); + (void)irq_detach(g_button_irqs[id]); + } + + leave_critical_section(flags); + } + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/olimex-efm32g880f128-stk/src/efm32g880f128-stk.h b/configs/olimex-efm32g880f128-stk/src/efm32g880f128-stk.h new file mode 100644 index 0000000000000000000000000000000000000000..ebd0bab9dd53e97d57104c6f4d0903f9d0f5b120 --- /dev/null +++ b/configs/olimex-efm32g880f128-stk/src/efm32g880f128-stk.h @@ -0,0 +1,86 @@ +/**************************************************************************** + * configs/olimex-efm32g880f128-stk/src/efm32g880f128-stk.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_OLIMEX_EFM32G880F128_STK_SRC_EFM32G880F128_STK_H +#define __CONFIGS_OLIMEX_EFM32G880F128_STK_SRC_EFM32G880F128_STK_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Buttons: + * + * The Olimex board has four buttons, BUT1-4. Each is grounded and so should + * have a weak pull-up so that it will be sensed as "1" when open and "0" + * when closed. + * + * --------------------- --------------------- + * PIN CONNECTIONS + * --------------------- --------------------- + * PE0/PCNT0_S0IN/U0_TX BUT1, EXT-18 + * PE1/PCNT0_S1IN/U0_RX BUT2, EXT-19 + * PE2/ACMP0_O BUT3, EXT-20 + * PE3/ACMP1_O BUT4, EXT-21 + * --------------------- --------------------- + */ + +#ifdef CONFIG_EFM32_GPIO_IRQ +# define GPIO_BUTTON_1 (GPIO_INPUT_PULLUP|GPIO_INT_BOTH|GPIO_PORTE|GPIO_PIN0) +# define GPIO_BUTTON_2 (GPIO_INPUT_PULLUP|GPIO_INT_BOTH|GPIO_PORTE|GPIO_PIN1) +# define GPIO_BUTTON_3 (GPIO_INPUT_PULLUP|GPIO_INT_BOTH|GPIO_PORTE|GPIO_PIN2) +# define GPIO_BUTTON_4 (GPIO_INPUT_PULLUP|GPIO_INT_BOTH|GPIO_PORTE|GPIO_PIN3) + +# define GPIO_IRQ_BUTTON_1 EFM32_IRQ_EXTI0 +# define GPIO_IRQ_BUTTON_2 EFM32_IRQ_EXTI1 +# define GPIO_IRQ_BUTTON_3 EFM32_IRQ_EXTI2 +# define GPIO_IRQ_BUTTON_4 EFM32_IRQ_EXTI3 +#else +# define GPIO_BUTTON_1 (GPIO_INPUT_PULLUP|GPIO_PORTE|GPIO_PIN0) +# define GPIO_BUTTON_2 (GPIO_INPUT_PULLUP|GPIO_PORTE|GPIO_PIN1) +# define GPIO_BUTTON_3 (GPIO_INPUT_PULLUP|GPIO_PORTE|GPIO_PIN2) +# define GPIO_BUTTON_4 (GPIO_INPUT_PULLUP|GPIO_PORTE|GPIO_PIN3) +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#endif /* __CONFIGS_EFM32_DK3650_INCLUDE_BOARD_H */ diff --git a/configs/olimex-lpc-h3131/Kconfig b/configs/olimex-lpc-h3131/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..41e81a5441dd5346c86dc8b13ee12a255184b074 --- /dev/null +++ b/configs/olimex-lpc-h3131/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_OLIMEX_LPC_H3131 +endif diff --git a/configs/olimex-lpc-h3131/README.txt b/configs/olimex-lpc-h3131/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..61d5b0416b1747e3aad053b92fe87e27b710f137 --- /dev/null +++ b/configs/olimex-lpc-h3131/README.txt @@ -0,0 +1,895 @@ +README +====== + + This README file discusses the port of NuttX to the Olimex LPC-H3131 board. + + NOTE: This is a minimal port to the Olimex LPC-H3131. According to Olimex + documentation, the LPC-H3131 is similar in design to the Embedded Artists + EA3131. As a consequence, it should be possible to leverage additional + functionality from configs/ea3131 without too much difficulty. + +Contents +======== + + o Development Environment + o GNU Toolchain Options + o IDEs + o NuttX buildroot Toolchain + o Boot Sequence + o Buttons and LEDs + o Image Format + o Image Download to ISRAM + o Using OpenOCD and GDB + o ARM/LPC-H3131-specific Configuration Options + o Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. Raisonance GNU toolchain, + 4. The NuttX buildroot Toolchain (see below), or + 5. Any generic arm-none-eabi GNU toolchain. + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery, devkitARM or Raisonance GNU toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARM_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARM_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARM_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARM_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARM_TOOLCHAIN_GNU_EABIL : Generic arm-none-eabi toolchain for Linux + CONFIG_ARM_TOOLCHAIN_GNU_EABIW : Generic arm-none-eabi toolchain for Windows + + If you are not using CONFIG_ARM_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + The toolchain may also be set using the kconfig-mconf utility (make menuconfig) or by + passing CONFIG_ARM_TOOLCHAIN= to make, where is one + of CODESOURCERYW, CODESOURCERYL, DEVKITARM, BUILDROOT or GNU_EABI as described + above. + + NOTE: the CodeSourcery (for Windows), devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + + Generic arm-none-eabi GNU Toolchain + ----------------------------------- + There are a number of toolchain projects providing support for ARMv4/v5 + class processors, including: + + GCC ARM Embedded + https://launchpad.net/gcc-arm-embedded + + Summon ARM Toolchain + https://github.com/esden/summon-arm-toolchain + + Yagarto + http://www.yagarto.de + + Others exist for various Linux distributions, MacPorts, etc. Any version + based on GCC 4.6.3 or later should work. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lpc31xx, + arch/arm/src/common, arch/arm/src/arm, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/lpc31xx/lpc31_vectors.S. You may have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX buildroot Toolchain +========================= + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh olimex-lpc-h3131/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/arm926t-defconfig-4.2.4 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + +Boot Sequence +============= + + LPC313x has on chip bootrom which loads properly formatted images from multiple + sources into SRAM. These sources include including SPI Flash, NOR Flash, UART, + USB, SD Card, and NAND Flash. + + In all configurations, NuttX is loaded directly into ISRAM. NuttX is linked + to execute from ISRAM, regardless of the boot source. + +Buttons and LEDs +================ + + Buttons + ------- + + There are no user buttons on the H3131 + + LEDs + ---- + + There are two LEDs on the LPC-H3131 that can be controlled by software: + + LED GPIO + ---------------- ----- + LED1 Yellow GPIO17 High output illuminates + LED2 Green GPIO18 High output illuminates + + Both can be illuminated by driving the GPIO output to high. + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/lpc31_leds.c. The LEDs are used to encode + OS-related events as follows: + + SYMBOL Meaning LED state + LED2 LED1 + ------------------- ----------------------- -------- -------- + LED_STARTED NuttX has been started OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF + LED_IRQSENABLED Interrupts enabled OFF OFF + LED_STACKCREATED Idle stack created ON OFF + LED_INIRQ In an interrupt N/C N/C + LED_SIGNAL In a signal handler N/C N/C + LED_ASSERTION An assertion failed N/C N/C + LED_PANIC The system has crashed N/C Blinking + LED_IDLE MCU is is sleep mode Not used + + Thus if LED2 is statically on, NuttX has successfully booted and is, + apparently, running normmally. If LED1 is flashing at approximately + 2Hz, then a fatal error has been detected and the system has halted. + + NOTE: That LED2 is not used after completion of booting and may + be used by other board-specific logic. + +Image Format +============ + + In order to use the bootrom bootloader, a special header must be added to + the beginning of the binary image that includes information about the + binary (things like the entry point, the size, and CRC's to verify the image. + + NXP provides a Windows program to append such a header to the binary + image. However, (1) that program won't run under Linux, and (2) when I + try it under WinXP, Symantec immediately claims that the program is + misbehaving and deletes it! + + To work around both of these issues, I have created a small program under + configs/olimex-lpc-h3131/tools to add the header. This program can be + built under either Linux or Cygwin (and probably other tool environments + as well). That tool can be built as follows: + + - cd configs/olimex-lpc-h3131/tools + - make + + Then, to build the NuttX binary ready to load with the bootloader, just + following these steps: + + - cd tools/ # Configure Nuttx + - ./configure.sh olimex-lpc-h3131/ostest # (using the ostest configuration for this example) + - cd .. # Set up environment + - . ./setenv.sh # (see notes below) + - make # Make NuttX. This will produce nuttx.bin + - mklpc.sh # Make the bootloader binary (nuttx.lpc) + + NOTES: + + 1. setenv.sh just sets up pathes to the toolchain and also to + configs/olimex-lpc-h3131/tools where mklpc.sh resides. Use of + setenv.sh is optional. If you don't use setenv.sh, then just set + your PATH variable appropriately or use the full path to mklpc.sh + in the final step. + 2. You can instruct Symantec to ignore the errors and it will stop + quarantining the NXP program. + 3. The CRC32 logic in configs/olimex-lpc-h3131/tools doesn't seem to + work. As a result, the CRC is currently disabled in the header: + + RCS file: /cvsroot/nuttx/nuttx/configs/olimex-lpc-h3131/tools/lpchdr.c,v + retrieving revision 1.2 + diff -r1.2 lpchdr.c + 264c264 + < g_hdr.imageType = 0x0000000b; + --- + > g_hdr.imageType = 0x0000000a; + +Image Download to ISRAM +======================= + + Assuming that you already have the FTDI driver installed*, then here is the + are the steps that I use for loading new code into the LPC-H3131: + + 1. Create the bootloader binary, nuttx.lpc, as described above. + + 2. With the power off, set the boot jumpers to enable booting from UART. + The boot jumpers are the block of three jumper just in-board from the + JTAG connector; Jumper pair 1-2 is the pair furthest from the JTAG + connector: + + 1-2: Closed + 3-4: Closed + 5-6: Open + + 3. Connected the LPC-H3131 using the FTDI USB port (not the lpc3131 USB port) + This will power up the LPC-H3131 and start the bootloader. + + 4. Start a terminal emulator (such as TeraTerm) at 115200 8NI. + + 5. Reset the LPC-H3131 and you should see: + + LPC31xx READY FOR PLAIN IMAGE> + + 6. Send the nuttx.lpc file and you should see: + + Download finished + + That will load the NuttX binary into ISRAM and attempt to execute it. + + *See the LPC313x documentation if you do not have the FTDI driver installed. + + TeraTerm Note: This is how to send a file from TeraTerm. It is essentially + step 6 exploded in more detail for the case of TeraTerm: + + 1. Start the ROM bootloader as described above. + + 2. At the "LPC31xx READY FOR PLAIN IMAGE>" prompt, open the File menu and + select the "Send File..." option. + + 3. Select the file to send, + + 4. Before "Open" -ing the file MAKE SURE TO CHECK THE "Binary" BOX! This + has cost me a few hours a few times because I forget to do this. The + program will NOT RUN is sent non-binary. + + [NO, I am not SHOUTING. I am just making sure that I never forget to + do this again]. + + 5. "Open"-ing the file will send it to the ROM bootloader. + + 6. You should see "Download finished" from the bootloader followed + immediately by any serial console output from your program. + +Using OpenOCD and GDB +===================== + [NOTE: As of this writing, my OpenOCD script does NOT work. It fails + because it is unable to halt the LPC3131. So, unfortunately, OpenOCD + is not a option right now.] + + I have been using the Olimex ARM-USB-OCD JTAG debugger with the LPC-H3131 + (http://www.olimex.com). The OpenOCD configuration file is here: + tools/armusbocb.cfg. There is also a script on the tools directory that + I used to start the OpenOCD daemon on my system called oocd.sh. That + script would probably require some modifications to work in another + environment: + + - possibly the value of OPENOCD_PATH + - If you are working under Linux you will need to change any + occurances of `cygpath -w blablabla` to just blablabla + + Then you should be able to start the OpenOCD daemon like: + + configs/olimex-lpc-h3131/tools/oocd.sh $PWD + + Where it is assumed that you are executing oocd.sh from the top level + directory where NuttX is installed. + + Once the OpenOCD daemon has been started, you can connect to it via + GDB using the following GDB command: + + arm-nuttx-elf-gdb + (gdb) target remote localhost:3333 + + And you can load the NuttX ELF file: + + (gdb) symbol-file nuttx + (gdb) load nuttx + +ARM/LPC-H3131-specific Configuration Options +============================================ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_ARM926EJS=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc313x + + CONFIG_ARCH_CHIP_name - For use in C code + + CONFIG_ARCH_CHIP_LPC3131 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD="olimex-lpc-h3131" + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_OLIMEX_LPC_H3131 + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - For most ARM9 architectures, this describes the + size of installed DRAM. For the LPC313X, it is used only to + deterimine how to map the executable regions. It is SDRAM size + only if you are executing out of the external SDRAM; or it could + be NOR FLASH size, external SRAM size, or internal SRAM size. + + CONFIG_RAM_START - The start address of installed DRAM (physical) + + CONFIG_RAM_VSTART - The startaddress of DRAM (virtual) + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_BUTTONS - Enable support for buttons. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + CONFIG_ARCH_DMA - Support DMA initialization + CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000 + Undefine if vectors reside at address 0xffff:0000 + CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available. + If defined, then board-specific logic must also define PGTABLE_BASE_PADDR, + PGTABLE_BASE_VADDR, and all memory section mapping in a file named + board_memorymap.h. + + Individual subsystems can be enabled: + + CONFIG_LPC31_MCI, CONFIG_LPC31_SPI, CONFIG_LPC31_UART + + External memory available on the board (see also CONFIG_MM_REGIONS) + + CONFIG_LPC31_EXTSRAM0 - Select if external SRAM0 is present + CONFIG_LPC31_EXTSRAM0HEAP - Select if external SRAM0 should be + configured as part of the NuttX heap. + CONFIG_LPC31_EXTSRAM0SIZE - Size (in bytes) of the installed + external SRAM0 memory + CONFIG_LPC31_EXTSRAM1 - Select if external SRAM1 is present + CONFIG_LPC31_EXTSRAM1HEAP - Select if external SRAM1 should be + configured as part of the NuttX heap. + CONFIG_LPC31_EXTSRAM1SIZE - Size (in bytes) of the installed + external SRAM1 memory + CONFIG_LPC31_EXTDRAM - Select if external SDRAM is present + CONFIG_LPC31_EXTDRAMHEAP - Select if external SDRAM should be + configured as part of the NuttX heap. + CONFIG_LPC31_EXTDRAMSIZE - Size (in bytes) of the installed + external SDRAM memory + CONFIG_LPC31_EXTNAND - Select if external NAND is present + CONFIG_LPC31_EXTNANDSIZE - Size (in bytes) of the installed + external NAND memory + + LPC313X specific device driver settings + + CONFIG_UART_SERIAL_CONSOLE - selects the UART for the + console and ttys0 + CONFIG_UART_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UART_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UART_BAUD - The configure BAUD of the UART. Must be + CONFIG_UART_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UART_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UART_2STOP - Two stop bits + +Configurations +============== + +Configurations +============== + + Information Common to All Configurations + ---------------------------------------- + Each LPC-H3131 configuration is maintained in a sub-directory and can be + selected as follow: + + cd tools + ./configure.sh olimex-lpc-h3131/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on the UART0 associated with the FT232RL USB-to UART + converter. + + 3. Unless otherwise stated, the configurations are setup for + Windows undery Cygwin. This can, however, be easilty reconfigured. + + 4. All of these configurations use the Code Sourcery for Windows toolchain + (unless stated otherwise in the description of the configuration). That + toolchain selection can easily be reconfigured using 'make menuconfig'. + Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Microsoft Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin or other POSIX environment + + System Type -> Toolchain: + CONFIG_ARM_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for windows + + The setenv.sh file is available for you to use to set the PATH + variable. The path in the that file may not, however, be correct + for your installation. + + Configuration sub-directories + ----------------------------- + + nsh: + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables only the serial NSH interface. + + General Configuration. These are easily change by modifying the NuttX + configuration: + + - Console on UART -> UART-to-USB converter + - Platform: Windows with Cygwin + - Toolchain: CodeSourcery for Windows + + NOTES: + 1. Built-in applications are not supported by default. To enable NSH + built-in applications: + + Binary + CONFIG_BUILTIN=y : Support built-in applications + + Application Configuration -> NSH Library + CONFIG_NSH_BUILTIN_APPS=y : Enable built-in applications + + 2. SDRAM support is not enabled by default. SDRAM support can be enabled + by adding the following to your NuttX configuration file: + + [NOTE: There is still something wrong with the SDRAM setup. At present + it hangs on the first access from SDRAM during configuration.] + + System Type->LPC31xx Peripheral Support + CONFIG_LPC31_EXTDRAM=y : Enable external DRAM support + CONFIG_LPC31_EXTDRAMSIZE=33554432 : 256Mbit -> 32Mbyte + CONFIG_LPC31_SDRAM_16BIT=y : Organized 16Mbit x 16 bits wide + + Now that you have SDRAM enabled, what are you going to do with it? One + thing you can is add it to the heap + + System Type->Heap Configuration + CONFIG_LPC31_EXTDRAMHEAP=y : Add the SDRAM to the heap + + Memory Management + CONFIG_MM_REGIONS=2 : Two memory regions: ISRAM and SDRAM + + Another thing you could do is to enable the RAM test built-in + application: + + 3. You can enable the NuttX RAM test that may be used to verify the + external SDAM. To do this, keep the SDRAM out of the heap so that + it can be tested without crashing programs using the memory. + + First enable built-in applications as described above, then make + the following additional modifications to the NuttX configuration: + + System Type->Heap Configuration + CONFIG_LPC31_EXTDRAMHEAP=n : Don't add the SDRAM to the heap + + Memory Management + CONFIG_MM_REGIONS=1 : One memory regions: ISRAM + + Then enable the RAM test built-in application: + + Application Configuration->System NSH Add-Ons->Ram Test + CONFIG_SYSTEM_RAMTEST=y + + In this configuration, the SDRAM is not added to heap and so is not + excessible to the applications. So the RAM test can be freely + executed against the SRAM memory beginning at address 0x2000:0000 + (DDR CS): + + nsh> ramtest -h + Usage: ramtest [-w|h|b] + + Where: + starting address of the test. + number of memory locations (in bytes). + -w Sets the width of a memory location to 32-bits. + -h Sets the width of a memory location to 16-bits (default). + -b Sets the width of a memory location to 8-bits. + + To test the entire external 256MB SRAM: + + nsh> ramtest -w 30000000 33554432 + RAMTest: Marching ones: 30000000 33554432 + RAMTest: Marching zeroes: 30000000 33554432 + RAMTest: Pattern test: 30000000 33554432 55555555 aaaaaaaa + RAMTest: Pattern test: 30000000 33554432 66666666 99999999 + RAMTest: Pattern test: 30000000 33554432 33333333 cccccccc + RAMTest: Address-in-address test: 30000000 33554432 + + 4. This configuration has been used to test USB host functionality. USB + host is *not* enabled by default. If you will to enable USB host + support in the NSH configuration, please modify the NuttX + configuration as follows: + + a) Basic USB Host support + + Drivers -> USB Host Driver Support + CONFIG_USBHOST=y : General USB host support + CONFIG_USBHOST_INT_DISABLE=n : Interrupt EPs need with hub, HID keyboard, and HID mouse + CONFIG_USBHOST_ISOC_DISABLE=y : Not needed (or supported) + + System Type -> Peripherals + CONFIG_LPC31_USBOTG=y : Enable the USB OTG peripheral + + System Type -> USB host configuration + CONFIG_LPC31_EHCI_BUFSIZE=128 + CONFIG_LPC31_EHCI_PREALLOCATE=y + + RTOS Features -> Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : High priority queue support is needed + CONFIG_SCHED_HPWORK=y + CONFIG_SCHED_HPWORKSTACKSIZE=1536 (1024 seems to work okay too) + + b. Hub Support. + + Drivers -> USB Host Driver Support + CONFIG_USBHOST_INT_DISABLE=n : Interrupt endpoint support needed + CONFIG_USBHOST_HUB=y : Enable the hub class + CONFIG_USBHOST_ASYNCH=y : Asynchronous I/O supported needed for hubs + + RTOS Features -> Work Queue Support + CONFIG_SCHED_LPWORK=y : Low priority queue support is needed + CONFIG_SCHED_LPNTHREADS=1 + CONFIG_SCHED_LPWORKSTACKSIZE=1024 + + NOTES: + + 1. It is necessary to perform work on the low-priority work queue + (vs. the high priority work queue) because: + + a. Deferred work requires some delays and waiting, and + b. There are dependencies between the waiting and driver + interrupt related work. Since that interrupt related work + will performed on the high priority work queue, there would + be the likelihood of deadlocks if you wait for events on the + high priority work thread that can only occur if the high + priority work thread is available to post those events. + + 2. Logic nesting becomes deeper with a hub and it may also be + necessary to increase some stack sizes. + + c. USB Mass Storage Class. With this class enabled, you can support + connection of USB FLASH storage drives. Support for the USB + mass storage class is enabled like this: + + Drivers -> USB Host Driver Support + CONFIG_USBHOST_MSC=y : Mass storage class support + + The MSC class will work like this. When you first start NSH, you + can look at the available devices like this: + + NuttShell (NSH) NuttX-6.31 + nsh> ls -l /dev + /dev: + crw-rw-rw- 0 console + crw-rw-rw- 0 null + crw-rw-rw- 0 ttyS0 + + The crw-rw-rw- indicates a readable, write-able character device. + + nsh> ls -l /dev + /dev: + crw-rw-rw- 0 console + crw-rw-rw- 0 null + brw-rw-rw- 0 sda + crw-rw-rw- 0 ttyS0 + + The brw-rw-rw- indicates a readable, write-able block device. + This block device can then be mounted like this: + + nsh> mount -t vfat /dev/sda /mnt/flash + + The USB FLASH drive contents are then visible under /mnt/flash and + can be operated on with normal file system commands like: + + nsh> mount -t vfat /dev/sda /mnt/flash + nsh> cat /mnt/flash/filec.c + etc. + + It is recommended that the drive by unmounted BEFORE it is + removed. That is not always possible so if the USB FLASH is + removed BEFORE the drive is unmounted, the device at /dev/sda will + persist in an unusable stack until it is unmounted with the + following command (NOTE: If the FLASH drive is re-inserted in + this state, it will appear as /dev/sdb): + + nsh> umount /mnt/flash + + d. HID Keyboard support. The following support will enable support + for certain keyboard devices (only the so-called "boot" keyboard + class is supported): + + Drivers -> USB Host Driver Support + CONFIG_USBHOST_HIDKBD=y : HID keyboard class support + + Drivers -> USB Host Driver Support + CONFIG_USBHOST_INT_DISABLE=n : Interrupt endpoint support needed + + In this case, when the HID keyboard is installed, you see a new + character device called /dev/kbda. + + There is a HID keyboard test example that can be enabled with the + following settings. NOTE: In this case, NSH is disabled because + the HID keyboard test is a standalone test. + + This selects the HIDKBD example: + + Application Configuration -> Examples + CONFIG_EXAMPLES_HIDKBD=y + CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda" + + RTOS Features + CONFIG_USER_ENTRYPOINT="hidkbd_main" + + These settings disable NSH: + + Application Configuration -> Examples + CONFIG_EXAMPLES_NSH=n + + Application Configuration -> NSH Library + CONFIG_NSH_LIBRARY=y + + Using the HID Keyboard example: Anything typed on the keyboard + should be echoed on the serial console. Here is some sample of + a session: + + Initialization + + hidkbd_main: Register class drivers + hidkbd_main: Initialize USB host keyboard driver + hidkbd_main: Start hidkbd_waiter + hidkbd_waiter: Running + + The test example will periodically attempt to open /dev/kbda + + Opening device /dev/kbda + Failed: 2 + Opening device /dev/kbda + Failed: 2 + etc. + + The open will fail each time because there is no keyboard + attached. When a USB keyboard is attached, the open of /dev/kbda + will succeed and the test will begin echoing data to the serial + console: + + hidkbd_waiter: connected + Opening device /dev/kbda + Device /dev/kbda opened + + For example, this text was entered from the keyboard: + + Now is the time for all good men to come to the aid of their party. + + Then when the device is removed, the test will resume attempting + to open the driver until the next time it is connected + + Closing device /dev/kbda: -1 + Opening device /dev/kbda + Failed: 19 + hidkbd_waiter: disconnected + + Opening device /dev/kbda + Failed: 2 + etc. + + d. The USB monitor can also be enabled: + + Drivers -> USB Host Driver Support + CONFIG_USBHOST_TRACE=y + CONFIG_USBHOST_TRACE_NRECORDS=128 + CONFIG_USBHOST_TRACE_VERBOSE=y + + Application Configuration -> System Add-Ons + CONFIG_SYSTEM_USBMONITOR=y + CONFIG_SYSTEM_USBMONITOR_INTERVAL=1 + + NOTE: I have found that if you enable USB DEBUG and/or USB tracing, + the resulting image requires to much memory to execute out of + internal SRAM. I was able to get the configurations to run out of + SRAM with debug/tracing enabled by carefully going through the + configuration and reducing stack sizes, disabling unused OS features, + disabling un-necessary NSH commands, etc. + + 5. Making the Configuration Smaller. This configuration runs out of + internal SRAM. If you enable many features, then your code image + may outgrow the available SRAM; even if the code can be loaded into + SRAM, it may still fail at runtime due to insufficient memory. + + Since SDRAM is not currently working (see above) and NAND support + has not be integrated, the only really option is to put NSH "on a + diet" to reduct the size so that it will fit into memory. + + Here are a few things you can do: + + 1. Try using smaller stack sizes, + + 2. Disable operating system features. Here some that can go: + + CONFIG_DISABLE_ENVIRON=y + CONFIG_DISABLE_MQUEUE=y + CONFIG_DISABLE_POSIX_TIMERS=y + CONFIG_DISABLE_PTHREAD=y + CONFIG_MQ_MAXMSGSIZE=0 + CONFIG_NPTHREAD_KEYS=0 + CONFIG_NUNGET_CHARS=0 + CONFIG_PREALLOC_MQ_MSGS=0 + + 3. Disable NSH commands. I can life fine without these: + + CONFIG_NSH_DISABLE_ADDROUTE=y + CONFIG_NSH_DISABLE_CD=y + CONFIG_NSH_DISABLE_CMP=y + CONFIG_NSH_DISABLE_CP=y + CONFIG_NSH_DISABLE_DD=y + CONFIG_NSH_DISABLE_DELROUTE=y + CONFIG_NSH_DISABLE_EXEC=y + CONFIG_NSH_DISABLE_EXIT=y + CONFIG_NSH_DISABLE_GET=y + CONFIG_NSH_DISABLE_HEXDUMP=y + CONFIG_NSH_DISABLE_IFCONFIG=y + CONFIG_NSH_DISABLE_LOSETUP=y + CONFIG_NSH_DISABLE_MB=y + CONFIG_NSH_DISABLE_MH=y + CONFIG_NSH_DISABLE_MKFIFO=y + CONFIG_NSH_DISABLE_MKRD=y + CONFIG_NSH_DISABLE_NSFMOUNT=y + CONFIG_NSH_DISABLE_PING=y + CONFIG_NSH_DISABLE_PUT=y + CONFIG_NSH_DISABLE_PWD=y + CONFIG_NSH_DISABLE_RM=y + CONFIG_NSH_DISABLE_RMDIR=y + CONFIG_NSH_DISABLE_SET=y + CONFIG_NSH_DISABLE_SH=y + CONFIG_NSH_DISABLE_SLEEP=y + CONFIG_NSH_DISABLE_TEST=y + CONFIG_NSH_DISABLE_UNSET=y + CONFIG_NSH_DISABLE_USLEEP=y + CONFIG_NSH_DISABLE_WGET=y + CONFIG_NSH_DISABLE_XD=y diff --git a/configs/olimex-lpc-h3131/include/board.h b/configs/olimex-lpc-h3131/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..395eddee2beecd76a1ecfc437e4fb193c2272d13 --- /dev/null +++ b/configs/olimex-lpc-h3131/include/board.h @@ -0,0 +1,201 @@ +/************************************************************************************ + * configs/olimex-lpc-h3131/include/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_OLIMEX_LPC_H3131_INCLUDE_BOARD_H +#define __CONFIGS_OLIMEX_LPC_H3131_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +# include "lpc31_cgudrvr.h" +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* Frequency of the FFAST input */ + +#define BOARD_FREQIN_FFAST (12000000) /* ffast (12 MHz crystal) */ + +/* HPLL0 configuration */ + +#define BOARD_HPLL0_FINSEL CGU_HPFINSEL_FFAST /* Frequency input selection */ +#define BOARD_HPLL0_NDEC 131 /* PLL N-divider value */ +#define BOARD_HPLL0_MDEC 29784 /* PLL M-divider value */ +#define BOARD_HPLL0_PDEC 7 /* PLL P-divider value */ +#define BOARD_HPLL0_SELR 0 /* SELR bandwidth selection */ +#define BOARD_HPLL0_SELI 8 /* SELI bandwidth selection */ +#define BOARD_HPLL0_SELP 31 /* SELP bandwidth selection */ +#define BOARD_HPLL0_MODE 0 /* PLL mode */ +#define BOARD_HPLL0_FREQ 406425600 /* Frequency of the PLL in MHz */ + +/* HPLL1 configuration */ + +#define BOARD_HPLL1_FINSEL CGU_HPFINSEL_FFAST /* Frequency input selection */ +#define BOARD_HPLL1_NDEC 770 /* PLL N-divider value */ +#define BOARD_HPLL1_MDEC 8191 /* PLL M-divider value */ +#define BOARD_HPLL1_PDEC 98 /* PLL P-divider value */ +#define BOARD_HPLL1_SELR 0 /* SELR bandwidth selection */ +#define BOARD_HPLL1_SELI 16 /* SELI bandwidth selection */ +#define BOARD_HPLL1_SELP 8 /* SELP bandwidth selection */ +#define BOARD_HPLL1_MODE 0 /* PLL mode */ +#define BOARD_HPLL1_FREQ 180000000 /* Frequency of the PLL in MHz */ + +/* The following 3 bitsets determine which clocks will be enabled at initialization + * time. + */ + +#define BOARD_CLKS_0_31 \ + (_RBIT(CLKID_APB0CLK,0)|_RBIT(CLKID_APB1CLK,0)|_RBIT(CLKID_APB2CLK,0)|\ + _RBIT(CLKID_APB3CLK,0)|_RBIT(CLKID_APB4CLK,0)|_RBIT(CLKID_AHB2INTCCLK,0)|\ + _RBIT(CLKID_AHB0CLK,0)|_RBIT(CLKID_ARM926CORECLK,0)|_RBIT(CLKID_ARM926BUSIFCLK,0)|\ + _RBIT(CLKID_ARM926RETIMECLK,0)|_RBIT(CLKID_ISRAM0CLK,0)|_RBIT(CLKID_ISRAM1CLK,0)|\ + _RBIT(CLKID_ISROMCLK,0)|_RBIT(CLKID_INTCCLK,0)|_RBIT(CLKID_AHB2APB0PCLK,0)|\ + _RBIT(CLKID_EVENTROUTERPCLK,0)|_RBIT(CLKID_CLOCKOUT,0)) + +#define BOARD_CLKS_32_63 \ + (_RBIT(CLKID_IOCONFPCLK,32)|_RBIT(CLKID_CGUPCLK,32)|_RBIT(CLKID_SYSCREGPCLK,32)|\ + _RBIT(CLKID_OTPPCLK,32)|_RBIT(CLKID_AHB2APB1PCLK,32)|_RBIT(CLKID_AHB2APB2PCLK,32)|\ + _RBIT(CLKID_AHB2APB3PCLK,32)|_RBIT(CLKID_EDGEDETPCLK,32)) + +#define BOARD_CLKS_64_92 \ + (0) + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_NLEDS 2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is as follows: + * + * SYMBOL Meaning LED state + * LED2 LED1 + * ------------------------ -------------------------- ------ ------ */ + +#define LED_STARTED 0 /* NuttX has been started OFF OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON OFF */ +#define LED_INIRQ 2 /* In an interrupt N/C N/C */ +#define LED_SIGNAL 2 /* In a signal handler N/C N/C */ +#define LED_ASSERTION 2 /* An assertion failed N/C N/C */ +#define LED_PANIC 3 /* The system has crashed N/C Blinking */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* Thus if LED2 is statically on, NuttX has successfully booted and is, + * apparently, running normmally. If LED1 is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + * + * NOTE: That LED2 is not used after completion of booting and may + * be used by other board-specific logic. + */ + +/* Button definitions ***************************************************************/ +/* The Olimex LPC_H3131 has no user buttons */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: lpc31_boardinitialize + * + * Description: + * All LPC31XX architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc31_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +/************************************************************************************ + * Name: lpc31_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent condition is + * detected. + * + * Input parameter: + * handler - New overcurrent interrupt handler + * + * Returned value: + * Old overcurrent interrupt handler + * + ************************************************************************************/ + +#if 0 /* Not ready yet */ +xcpt_t lpc31_setup_overcurrent(xcpt_t handler); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_OLIMEX_LPC_H3131_INCLUDE_BOARD_H */ diff --git a/configs/olimex-lpc-h3131/include/board_memorymap.h b/configs/olimex-lpc-h3131/include/board_memorymap.h new file mode 100644 index 0000000000000000000000000000000000000000..fb528f0d9c2ce8b8b849c254d1f9885724922020 --- /dev/null +++ b/configs/olimex-lpc-h3131/include/board_memorymap.h @@ -0,0 +1,116 @@ +/************************************************************************************ + * configs/olimex-lpc-h3131/include/board_memorymap.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_OLIMEX_LPC_H3131_INCLUDE_BOARD_MEMORYMAP_H +#define __CONFIGS_OLIMEX_LPC_H3131_INCLUDE_BOARD_MEMORYMAP_H + +/* This file should never be included directly, but only indirectly via + * lpc31_memorymap.h. + */ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* If the LPC31xx ROM page table is selected, then the board-logic is required + * to provide: + * + * PGTABLE_BASE_PADDR - The physical address of the page table in ROM, + * PGTABLE_BASE_VADDR - The mapped address of the page table in ROM, and + * Mappings for each of the PSECTIONS in lpc31_memorymap.h + */ + +#ifdef CONFIG_ARCH_ROMPGTABLE + /* The LPC31xx ROM page table uses a 1-1 physical to virtual memory mapping */ + +# define LPC31_SHADOWSPACE_VSECTION 0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */ +# define LPC31_INTSRAM_VSECTION 0x11028000 /* Internal SRAM 96Kb-192Kb */ +# define LPC31_INTSRAM0_VADDR 0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */ +# define LPC31_INTSRAM1_VADDR 0x11040000 /* 0x11040000-0x11057fff: Internal SRAM 1 96Kb */ +# define LPC31_INTSROM0_VSECTION 0x12000000 /* 0x12000000-0x1201ffff: Internal SROM 0 128Kb */ +# define LPC31_APB01_VSECTION 0x13000000 /* 0x13000000-0x1300bfff: APB0 32Kb APB1 16Kb*/ +# define LPC31_APB0_VADDR 0x13000000 /* 0x13000000-0x13007fff: APB0 32Kb */ +# define LPC31_APB1_VADDR 0x13008000 /* 0x13008000-0x1300bfff: APB1 16Kb */ +# define LPC31_APB2_VSECTION 0x15000000 /* 0x15000000-0x15003fff: APB2 16Kb */ +# define LPC31_APB3_VSECTION 0x16000000 /* 0x16000000-0x160003ff: APB3 1Kb */ +# define LPC31_APB4MPMC_VSECTION 0x17000000 /* 8Kb */ +# define LPC31_APB4_VADDR 0x17000000 /* 0x17000000-0x17000fff: APB4 4Kb */ +# define LPC31_MPMC_VADDR 0x17008000 /* 0x17008000-0x17008fff: MPMC cfg 4Kb */ +# define LPC31_MCI_VSECTION 0x18000000 /* 0x18000000 0x180003ff: MCI/SD/SDIO 1Kb */ +# define LPC31_USBOTG_VSECTION 0x19000000 /* 0x19000000-0x19000fff: USB OTG 4Kb */ +# define LPC31_EXTSRAM_VSECTION 0x20020000 /* 64-128Kb */ +# define LPC31_EXTSRAM0_VADDR 0x20000000 /* 0x20000000-0x2001ffff: External SRAM 0 64-128Kb */ +# define LPC31_EXTSRAM1_VADDR 0x20020000 /* 0x20020000-0x2003ffff: External SRAM 1 64-128Kb */ +# define LPC31_EXTSDRAM0_VSECTION 0x30000000 /* 0x30000000-0x37ffffff: External SDRAM 0 128Mb */ +# define LPC31_INTC_VSECTION 0x60000000 /* 0x60000000-0x60000fff: Interrupt controller 4Kb */ +# define LPC31_NAND_VSECTION 0x70000000 /* 0x70000000-0x700007ff: NANDFLASH Ctrl 2Kb */ + + /* Define the address of the page table within the ROM */ + +# define ROMPGTABLE_OFFSET 0x0001c000 /* Offset of the ROM page table in ROM */ +# define PGTABLE_BASE_PADDR (LPC31_INTSROM0_PSECTION+ROMPGTABLE_OFFSET) +# define PGTABLE_BASE_VADDR (LPC31_INTSROM0_VSECTION+ROMPGTABLE_OFFSET) +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_OLIMEX_LPC_H3131_INCLUDE_BOARD_MEMORYMAP_H */ diff --git a/configs/olimex-lpc-h3131/nsh/Make.defs b/configs/olimex-lpc-h3131/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..4d167115d044a32a9e17fe72dfbfbc9a42d15f2d --- /dev/null +++ b/configs/olimex-lpc-h3131/nsh/Make.defs @@ -0,0 +1,115 @@ +############################################################################ +# configs/olimex-lpc-h3131/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mtune=arm9tdmi -march=armv5te -mfloat-abi=soft -fno-builtin +else + ARCHCPUFLAGS = -mapcs-32 -mtune=arm9tdmi -march=armv5te -msoft-float -fno-builtin +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CONFIG_ARM_TOOLCHAIN),BUILDROOT) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/olimex-lpc-h3131/nsh/defconfig b/configs/olimex-lpc-h3131/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..2e88b0d0884f065e400798fef040184c3eb52c8e --- /dev/null +++ b/configs/olimex-lpc-h3131/nsh/defconfig @@ -0,0 +1,772 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +CONFIG_ARCH_CHIP_LPC31XX=y +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +CONFIG_ARCH_ARM926EJS=y +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="lpc31xx" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +CONFIG_ARCH_ROMPGTABLE=y + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARM_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARM_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTDRAM=y +CONFIG_ARCH_HAVE_EXTSRAM0=y + +# +# LPC31xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC3130 is not set +CONFIG_ARCH_CHIP_LPC3131=y +# CONFIG_ARCH_CHIP_LPC3152 is not set +# CONFIG_ARCH_CHIP_LPC3154 is not set + +# +# LPC31xx Peripheral Support +# +CONFIG_LPC31_UART=y +# CONFIG_LPC31_SPI is not set +# CONFIG_LPC31_USBOTG is not set +# CONFIG_LPC31_MCI is not set + +# +# External Memory Configuration +# +CONFIG_ARCH_HAVE_EXTSRAM1=y +# CONFIG_LPC31_EXTNAND is not set +# CONFIG_LPC31_EXTDRAM is not set +# CONFIG_LPC31_EXTSRAM0 is not set +# CONFIG_LPC31_EXTSRAM1 is not set + +# +# LPC31xx UART Configuration +# +# CONFIG_LPC31_UART_PRECALCULATED is not set + +# +# SPI device driver options +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_USE_MMU=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4287 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x11028000 +CONFIG_RAM_VSTART=0x11028000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_EA3131 is not set +CONFIG_ARCH_BOARD_OLIMEX_LPC_H3131=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-lpc-h3131" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=15 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=768 +CONFIG_USERMAIN_STACKSIZE=1536 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART=y +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART Configuration +# +CONFIG_UART_RXBUFSIZE=256 +CONFIG_UART_TXBUFSIZE=256 +CONFIG_UART_BAUD=115200 +CONFIG_UART_BITS=8 +CONFIG_UART_PARITY=0 +CONFIG_UART_2STOP=0 +# CONFIG_UART_IFLOWCONTROL is not set +# CONFIG_UART_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=48 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc-h3131/nsh/setenv.sh b/configs/olimex-lpc-h3131/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..2bfe99b74aceef0119ab042cd40b85b0805c9a8b --- /dev/null +++ b/configs/olimex-lpc-h3131/nsh/setenv.sh @@ -0,0 +1,67 @@ +#!/bin/bash +# configs/olimex-lpc-h3131/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the tools subdirectory + +export LPCTOOL_DIR="${WD}/configs/olimex-lpc-h3131/tools" + +# Add the path to the toolchain to the PATH varialble + +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/olimex-lpc-h3131/scripts/ld.script b/configs/olimex-lpc-h3131/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..3efc2fdcde134b46048d6264bc4683ed7f280232 --- /dev/null +++ b/configs/olimex-lpc-h3131/scripts/ld.script @@ -0,0 +1,114 @@ +/**************************************************************************** + * configs/olimex-lpc-h3131/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LPC3131 has 192Kb of ISRAM beginning at virtual address 0x1102:8000. + * LPC31xx boot ROM expects the boot image be compiled with entry point at + * 0x1102:9000. A 128b header will appear at this address (applied by + * lpc313xImgCreator) and the executable code must begin at 0x1102:9080. + */ + +MEMORY +{ + isram (rwx) : ORIGIN = 0x11029080, LENGTH = 192K - 4224 +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > isram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > isram + + .ARM.extab : { + *(.ARM.extab*) + } > isram + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > isram + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > isram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > isram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/olimex-lpc-h3131/src/.gitignore b/configs/olimex-lpc-h3131/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/olimex-lpc-h3131/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/olimex-lpc-h3131/src/Makefile b/configs/olimex-lpc-h3131/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..8c636018e84f194532821e6044b08ea823295c9d --- /dev/null +++ b/configs/olimex-lpc-h3131/src/Makefile @@ -0,0 +1,70 @@ +############################################################################ +# configs/olimex-lpc-h3131/src/Makefile +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc31_boot.c lpc31_clkinit.c + +ifeq ($(CONFIG_LPC31_EXTDRAM),y) +CSRCS += lpc31_mem.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += lpc31_leds.c +endif + +ifeq ($(CONFIG_LPC31_SPI),y) +CSRCS += lpc31_spi.c +endif + +ifeq ($(CONFIG_LPC31_MCI),y) +CSRCS += lpc31_mmcsd.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc31_appinit.c +endif + +ifeq ($(CONFIG_LPC31_USBOTG),y) +ifeq ($(CONFIG_USBHOST),y) +CSRCS += lpc31_usbhost.c +ifeq ($(CONFIG_EXAMPLES_HIDKBD),y) +CSRCS += lpc31_hidkbd.c +endif +endif +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/olimex-lpc-h3131/src/lpc31_appinit.c b/configs/olimex-lpc-h3131/src/lpc31_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..d24c412ffd6915b453100da87f012c11711a207d --- /dev/null +++ b/configs/olimex-lpc-h3131/src/lpc31_appinit.c @@ -0,0 +1,131 @@ +/**************************************************************************** + * configs/olimex-lpc-h3131/src/lpc31_appinit.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#include "lpc31.h" + +#include "lpc_h3131.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef HAVE_MMCSD +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0 +# error "Only one MMC/SD slot" +# undef CONFIG_NSH_MMCSDSLOTNO +# endif +# ifndef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(HAVE_MMCSD) || defined(HAVE_USBHOST) + int ret; +#endif + +#ifdef HAVE_MMCSD + /* Create the SDIO-based MMC/SD device */ + + syslog(LOG_INFO, "Create the MMC/SD device\n"); + ret = lpc31_mmcsd_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!sdio) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO, CONFIG_NSH_MMCSDMINOR); + return -ENODEV; + } +#endif + +#ifdef HAVE_USBHOST + /* Initialize USB host operation. lpc31_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + + syslog(LOG_INFO, "Start USB host services\n"); + ret = lpc31_usbhost_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to start USB host services: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + syslog(LOG_ERR, "ERROR: Failed to start the USB monitor\n"); + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret); + } +#endif + + return OK; +} diff --git a/configs/olimex-lpc-h3131/src/lpc31_boot.c b/configs/olimex-lpc-h3131/src/lpc31_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..8db90d9f94889cd01bfa0d2a20483e14e7a8bebe --- /dev/null +++ b/configs/olimex-lpc-h3131/src/lpc31_boot.c @@ -0,0 +1,118 @@ +/************************************************************************************ + * configs/olimex-lpc-h3131/src/lpc31_boot.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "lpc31.h" +#include "lpc_h3131.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc31_boardinitialize + * + * Description: + * All LPC31XX architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc31_boardinitialize(void) +{ + /* Initialize configured, external memory resources */ + +#ifdef CONFIG_LPC31_EXTDRAM + lpc31_meminitialize(); +#endif + + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * lpc31_spidev_intialize() has been brought into the link. + */ + +#if defined(CONFIG_LPC31_SPI) + if (lpc31_spidev_intialize) + { + lpc31_spidev_intialize(); + } +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function lpc31_usbdev_initialize() has been brought + * into the build. + */ + +#ifdef HAVE_USBDEV + if (lpc31_usbdev_initialize) + { + lpc31_usbdev_initialize(); + } +#endif + + /* Initialize USB if the 1) the HS host or device controller is in the + * configuration and 2) the weak function lpc31_usbhost_bootinitialize() has + * been brought into the build. Presumably either CONFIG_USBDEV or + * CONFIG_USBHOST is also selected. + */ + +#ifdef HAVE_USBHOST + lpc31_usbhost_bootinitialize(); +#endif + + /* Configure on-board LEDs in all cases */ + + board_autoled_initialize(); +} diff --git a/configs/olimex-lpc-h3131/src/lpc31_clkinit.c b/configs/olimex-lpc-h3131/src/lpc31_clkinit.c new file mode 100644 index 0000000000000000000000000000000000000000..e794ea318118364a51f4bd6d1db7e76ff18db813 --- /dev/null +++ b/configs/olimex-lpc-h3131/src/lpc31_clkinit.c @@ -0,0 +1,437 @@ +/**************************************************************************** + * configs/olimex-lpc-h3131/src/lpc31_clkinit.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * References: + * - NXP UM10314 LPC3130/31 User manual Rev. 1.01 — 9 September 2009 + * - NXP lpc313x.cdl.drivers.zip example driver code + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "lpc31_cgu.h" +#include "lpc31_cgudrvr.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Sub-domain Clock Bitsets *************************************************/ +/* The following bitsets group clocks into bitsets associated with each + * domain and fractional divider subdomain. + * + * Domain 0 (DOMAINID_SYS), Clocks 0 - 29, Fraction dividers 0-6. Clocks not + * defined in the clock sets will be sourced with SYS_BASE_CLK. + */ + +/* Domain 0, Fractional divider 0: */ + +#define CGU_CLKSET_DOMAIN0_DIV0 \ + (_D0B(CLKID_APB0CLK)|_D0B(CLKID_APB1CLK)|_D0B(CLKID_APB2CLK)|\ + _D0B(CLKID_APB3CLK)|_D0B(CLKID_APB4CLK)|_D0B(CLKID_AHB2INTCCLK)|\ + _D0B(CLKID_AHB0CLK)|_D0B(CLKID_DMAPCLK)|_D0B(CLKID_DMACLKGATED)|\ + _D0B(CLKID_NANDFLASHS0CLK)|_D0B(CLKID_NANDFLASHPCLK)|\ + _D0B(CLKID_ARM926BUSIFCLK)|_D0B(CLKID_SDMMCHCLK)|_D0B(CLKID_USBOTGAHBCLK)|\ + _D0B(CLKID_ISRAM0CLK)|_D0B(CLKID_ISRAM1CLK)|_D0B(CLKID_ISROMCLK)|\ + _D0B(CLKID_MPMCCFGCLK)|_D0B(CLKID_MPMCCFGCLK2)|_D0B(CLKID_INTCCLK)) + +/* Domain 0, Fractional divider 1: */ + +#define CGU_CLKSET_DOMAIN0_DIV1 \ + (_D0B(CLKID_ARM926CORECLK)) + +/* Domain 0, Fractional divider 2: */ + +#define CGU_CLKSET_DOMAIN0_DIV2 \ + (_D0B(CLKID_NANDFLASHAESCLK)|_D0B(CLKID_NANDFLASHNANDCLK)) + +/* Domain 0, Fractional divider 3: */ + +#define CGU_CLKSET_DOMAIN0_DIV3 \ + (_D0B(CLKID_NANDFLASHECCCLK)) + +/* Domain 0, Fractional divider 4: */ + +#define CGU_CLKSET_DOMAIN0_DIV4 \ + (_D0B(CLKID_SDMMCCCLKIN)) + +/* Domain 0, Fractional divider 5: */ + +#define CGU_CLKSET_DOMAIN0_DIV5 \ + (_D0B(CLKID_CLOCKOUT)) + +/* Domain 0, Fractional divider 6: */ + +#define CGU_CLKSET_DOMAIN0_DIV6 \ + (_D0B(CLKID_EBICLK)) + +/* Domain 1 (DOMAINID_AHB0APB0), Clocks 30-39, Fraction dividers 7-8. Clocks + * not defined in the clock sets will be sourced with AHB_APB0_BASE_CLK. + */ + +/* Domain 1, Fractional divider 7: */ + +#define CGU_CLKSET_DOMAIN1_DIV7 \ + (_D1B(CLKID_ADCCLK)) + +/* Domain 1, Fractional divider 8: */ + +#define CGU_CLKSET_DOMAIN1_DIV8 \ + (_D1B(CLKID_AHB2APB0PCLK)|_D1B(CLKID_EVENTROUTERPCLK)|\ + _D1B(CLKID_ADCPCLK)|_D1B(CLKID_WDOGPCLK)|_D1B(CLKID_IOCONFPCLK)|\ + _D1B(CLKID_CGUPCLK)|_D1B(CLKID_SYSCREGPCLK)|_D1B(CLKID_OTPPCLK)|\ + _D1B(CLKID_RNGPCLK)) + +/* Domain 2 (DOMAINID_AHB0APB1), Clocks 40-49, Fraction dividers 9-10. Clocks + * not defined in the clock sets will be sourced with AHB_APB1_BASE_CLK. + */ + +/* Domain 2, Fractional divider 9: */ + +#define CGU_CLKSET_DOMAIN2_DIV9 \ + (_D2B(CLKID_AHB2APB1PCLK)|_D2B(CLKID_TIMER0PCLK)|_D2B(CLKID_TIMER1PCLK)|\ + _D2B(CLKID_TIMER2PCLK)|_D2B(CLKID_TIMER3PCLK)|_D2B(CLKID_PWMPCLK)|\ + _D2B(CLKID_PWMPCLKREGS)|_D2B(CLKID_I2C0PCLK)|_D2B(CLKID_I2C1PCLK)) + +/* Domain 2, Fractional divider 10: */ + +#define CGU_CLKSET_DOMAIN2_DIV10 \ + (_D2B(CLKID_PWMCLK)) + +/* Domain 3 (DOMAINID_AHB0APB2), Clocks 50-57, Fraction dividers 11-13. Clocks + * not defined in the clock sets will be sourced with AHB_APB2_BASE_CLK. + */ + +/* Domain 3, Fractional divider 11: */ + +#define CGU_CLKSET_DOMAIN3_DIV11 \ + ( _D3B(CLKID_AHB2APB2PCLK)|_D3B(CLKID_PCMPCLK)|_D3B(CLKID_PCMAPBPCLK)|\ + _D3B(CLKID_UARTAPBCLK)|_D3B(CLKID_LCDPCLK)|_D3B(CLKID_SPIPCLK)|\ + _D3B(CLKID_SPIPCLKGATED)) + +/* Domain 3, Fractional divider 12: */ + +#define CGU_CLKSET_DOMAIN3_DIV12 \ + (_D3B(CLKID_LCDCLK)) + +/* Domain 3, Fractional divider 13: */ + +#define CGU_CLKSET_DOMAIN3_DIV13 \ + (0) + +/* Domain 4 (DOMAINID_AHB0APB3), Clocks 58-70, Fraction divider 14. Clocks + * not defined in the clock sets will be sourced with AHB_APB3_BASE_CLK. + */ + +#define CGU_CLKSET_DOMAIN4_DIV14 \ + (_D4B(CLKID_AHB2APB3PCLK)|_D4B(CLKID_I2SCFGPCLK)|_D4B(CLKID_EDGEDETPCLK)|\ + _D4B(CLKID_I2STXFIFO0PCLK)|_D4B(CLKID_I2STXIF0PCLK)|_D4B(CLKID_I2STXFIFO1PCLK)|\ + _D4B(CLKID_I2STXIF1PCLK)|_D4B(CLKID_I2SRXFIFO0PCLK)|_D4B(CLKID_I2SRXIF0PCLK)|\ + _D4B(CLKID_I2SRXFIFO1PCLK)|_D4B(CLKID_I2SRXIF1PCLK)) + +/* Domain 5 (DOMAINID_PCM), Clock 71, Fraction divider 15. Clocks not + * defined in the clock sets will be sourced with AHB_APB3_BASE_CLK. + */ + +#define CGU_CLKSET_DOMAIN5_DIV15 \ + (_D5B(CLKID_PCMCLKIP)) + +/* Domain 6 (DOMAINID_UART), Clock 72, Fraction divider 16. Clocks mpt + * defined in the clock sets will be sourced with UART_BASE_CLK. + */ + +#define CGU_CLKSET_DOMAIN6_DIV16 \ + (0) + +/* Domain 7 (DOMAINID_CLK1024FS), Clocks 73-86, Fraction dividers 17-22. Clocks + * not defined in the clock sets will be sourced with CLK1024FS_BASE_CLK. + */ + +/* Domain 7, Fractional divider 17: */ + +#define CGU_CLKSET_DOMAIN7_DIV17 \ + ( _D7B(CLKID_I2SEDGEDETECTCLK)|_D7B(CLKID_I2STXWS0)|_D7B(CLKID_I2STXWS1)|\ + _D7B(CLKID_I2SRXWS0)|_D7B(CLKID_I2SRXWS1)) + +/* Domain 7, Fractional divider 18: */ + +#define CGU_CLKSET_DOMAIN7_DIV18 \ + ( _D7B(CLKID_I2STXBCK0N)|_D7B(CLKID_I2STXBCK1N)) + +/* Domain 7, Fractional divider 19: */ + +#define CGU_CLKSET_DOMAIN7_DIV19 \ + ( _D7B(CLKID_I2STXCLK0)|_D7B(CLKID_CLK256FS)) + +/* Domain 7, Fractional divider 20: */ + +#define CGU_CLKSET_DOMAIN7_DIV20 \ + ( _D7B(CLKID_I2SRXBCK0N)|_D7B(CLKID_I2SRXBCK1N)) + +/* Domain 7, Fractional divider 21: */ + +#define CGU_CLKSET_DOMAIN7_DIV21 \ + (0) + +/* Domain 7, Fractional divider 22: */ + +#define CGU_CLKSET_DOMAIN7_DIV22 \ + (0) + +/* Domain 8 (DOMAINID_BCK0, clock 87, and domain 9 (DOMAINID_BCK1), clock 88, + * are directly connected + */ + +/* Domain 10 (DOMAINID_SPI), Clocks 89-90, Fraction divider 23. Clocks + * not defined in the clock sets will be sourced with SPI_CLK_BASE_CLK. + */ + +#define CGU_CLKSET_DOMAIN10_DIV23 \ + ( _D10B(CLKID_SPICLK)|_D10B(CLKID_SPICLKGATED)) + +/* Domain 11 (DOMAINID_SYSCLKO, clock 91, is directly connected */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* Default clock configuration for the LPC-H3131 board. Every board must + * provide an implementation of g_boardclks. This rather complex structure + * is used by the boot-up logic to configure initial lpc313x clocking. + * + * FFAST: 12MHz + * MASTER PLL Freq: 180MHz; + * AUDIOPLL Freq: 1024Fs, Fs = 44.1kHz + * + * Domain Input Subdomain Divider Ratio + * ------------------------ ----------------- ----------------- ------------- + * 0 - DOMAIN_SYS MASTER PLL(HPLL1) DOMAIN0_DIV0 1/2 + * DOMAIN0_DIV1 1 + * DOMAIN0_DIV2 1/2 + * DOMAIN0_DIV3 1/4 + * DOMAIN0_DIV4 1/4 + * DOMAIN0_DIV5 1/2 + * DOMAIN0_DIV6 1/2 + * + * 1 - DOMAIN_AHB0APB0 FFAST DOMAIN1_DIV7 1/38 + * DOMAIN1_DIV8 1/2 + * + * 2 - DOMAIN_AHB0APB1 FFAST DOMAIN2_DIV9 1/2 + * DOMAIN2_DIV10 1/2 + * + * 3 - DOMAIN_AHB0APB2 MASTER PLL(HPLL1) DOMAIN3_DIV11 1/2 + * DOMAIN3_DIV12 1/40 + * DOMAIN3_DIV13 1 (not used) + * + * 4 - DOMAIN_AHB0APB3 FFAST DOMAIN4_DIV14 1/2 + * + * 5 - DOMAIN_PCM MASTER PLL(HPLL1) DOMAIN5_DIV15 1/2 + * + * 6 - DOMAIN_UART FFAST DOMAIN6_DIV16 1 + * + * 7 - DOMAIN_CLCK1024FS AUDIO PLL(HPLL0) DOMAIN7_DIV17 1/256 + * DOMAIN7_DIV18 1/4 + * DOMAIN7_DIV19 1 + * DOMAIN7_DIV20 1/4 + * DOMAIN7_DIV21 1/32 + * DOMAIN7_DIV22 1/2 + * + * 8 - DOMAIN_I2SRXBCK0 I2SRX_BCK0 - - + * + * 9 - DOMAIN_I2SRXBCK1 I2SRX_BCK1 - - + * + * 10 - DOMAIN_SPI MASTER PLL(HPLL1) DOMAIN10_DIV23 1/2 + * + * 11 - DOMAIN_SYSCLKO FFAST - - + */ + +const struct lpc31_clkinit_s g_boardclks = +{ + /* Domain 0 (DOMAINID_SYS), Clocks 0 - 29, Fraction dividers 0-6 */ + + { + CGU_FREQIN_HPPLL1, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV0}, + {{0, 0, 0}, CGU_CLKSET_DOMAIN0_DIV1}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV2}, + {{1, 1, 4}, CGU_CLKSET_DOMAIN0_DIV3}, + {{1, 1, 4}, CGU_CLKSET_DOMAIN0_DIV4}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV5}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV6} + } + }, + + /* Domain 1 (DOMAINID_AHB0APB0), Clocks 30-39, Fraction dividers 7-8 */ + + { + CGU_FREQIN_FFAST, + { + {{1, 1, 38}, CGU_CLKSET_DOMAIN1_DIV7}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN1_DIV8} + } + }, + + /* Domain 2 (DOMAINID_AHB0APB1), Clocks 40-49, Fraction dividers 9-10 */ + + { + CGU_FREQIN_FFAST, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN2_DIV9}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN2_DIV10} + } + }, + + /* Domain 3 (DOMAINID_AHB0APB2), Clocks 50-57, Fraction dividers 11-13 */ + + { + CGU_FREQIN_HPPLL1, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN3_DIV11}, + {{1, 1, 40}, CGU_CLKSET_DOMAIN3_DIV12}, + {{0, 0, 0}, CGU_CLKSET_DOMAIN3_DIV13} + } + }, + + /* Domain 4 (DOMAINID_AHB0APB3), Clocks 58-70, Fraction divider 14 */ + + { + CGU_FREQIN_FFAST, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN4_DIV14} + } + }, + + /* Domain 5 (DOMAINID_PCM), Clock 71, Fraction divider 15 */ + + { + CGU_FREQIN_HPPLL1, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN5_DIV15} + } + }, + + /* Domain 6 (DOMAINID_UART), Clock 72, Fraction divider 16 */ + + { + CGU_FREQIN_FFAST, + { + {{0, 0, 0}, CGU_CLKSET_DOMAIN6_DIV16} + } + }, + + /* Domain 7 (DOMAINID_CLK1024FS), Clocks 73-86, Fraction dividers 17-22 */ + + { + CGU_FREQIN_HPPLL0, + { + {{1, 1, 256}, CGU_CLKSET_DOMAIN7_DIV17}, + {{1, 1, 4}, CGU_CLKSET_DOMAIN7_DIV18}, + {{0, 0, 0}, CGU_CLKSET_DOMAIN7_DIV19}, + {{1, 1, 4}, CGU_CLKSET_DOMAIN7_DIV20}, + {{1, 1, 32}, CGU_CLKSET_DOMAIN7_DIV21}, + {{1, 1, 2}, CGU_CLKSET_DOMAIN7_DIV22} + } + }, + + /* Domain 8 (DOMAINID_BCK0, clock 87 */ + + { + CGU_FREQIN_I2SRXBCK0 + }, + + /* Domain 9 (DOMAINID_BCK1, clock 88 */ + + { + CGU_FREQIN_I2SRXBCK1 + }, + + /* Domain 10 (DOMAINID_SPI), Clocks 89-90, Fraction divider 23 */ + + { + CGU_FREQIN_HPPLL1, + { + {{1, 1, 2}, CGU_CLKSET_DOMAIN10_DIV23} + } + }, + + /* Domain 11 (DOMAINID_SYSCLKO, clock 91 */ + + { + CGU_FREQIN_FFAST + }, + + /* Dynamic fractional divider configuration (7) */ + +#if 0 /* Dynamic fractional divider initialization not implemented */ + { + { + CGU_DYNSEL_ALLBITS, {1, 1, 64} + }, + { + CGU_DYNSEL_ALLBITS, {0, 0, 0} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 3} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 6} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 6} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 6} + }, + { + CGU_DYNSEL_ALLBITS, {1, 1, 3} + } + } +#endif +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ diff --git a/configs/olimex-lpc-h3131/src/lpc31_hidkbd.c b/configs/olimex-lpc-h3131/src/lpc31_hidkbd.c new file mode 100644 index 0000000000000000000000000000000000000000..37f83def5cfe243dcb56f39b9a20967c839e7e13 --- /dev/null +++ b/configs/olimex-lpc-h3131/src/lpc31_hidkbd.c @@ -0,0 +1,72 @@ +/**************************************************************************** + * configs/olimex-lpc-h3131/src/lpc31_hidkbd.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "lpc31.h" +#include "lpc_h3131.h" + +#if defined(CONFIG_LPC31_USBOTG) && defined(CONFIG_USBHOST) && \ + defined(CONFIG_EXAMPLES_HIDKBD) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arch_usbhost_initialize + * + * Description: + * The apps/example/hidkbd test requires that platform-specific code + * provide a wrapper called arch_usbhost_initialize() that will perform + * the actual USB host initialization. + * + ****************************************************************************/ + +struct usbhost_connection_s *arch_usbhost_initialize(void) +{ + return lpc31_ehci_initialize(0); +} +#endif /* CONFIG_LPC31_USBOTG && CONFIG_USBHOST && CONFIG_EXAMPLES_HIDKBD */ diff --git a/configs/olimex-lpc-h3131/src/lpc31_leds.c b/configs/olimex-lpc-h3131/src/lpc31_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..7c484df2bef42c470fac48196ad3f6e992472194 --- /dev/null +++ b/configs/olimex-lpc-h3131/src/lpc31_leds.c @@ -0,0 +1,240 @@ +/**************************************************************************** + * configs/olimex-lpc-h3131/src/lpc31_leds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "lpc31.h" + +#include "lpc_h3131.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + * + * Description: + * Configure LEDs. LEDs are left in the OFF state. + * + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Turn off both LEDs */ + + gpio_outputlow(LPC31_IOCONFIG_GPIO, GPIO_LED1); + gpio_outputlow(LPC31_IOCONFIG_GPIO, GPIO_LED2); +} + +/**************************************************************************** + * Name: board_autoled_on + * + * Description: + * Select the "logical" ON state: + * + * SYMBOL Value Meaning LED state + * LED2 LED1 + * ---------------- ----- ----------------------- -------- -------- + * LED_STARTED 0 NuttX has been started OFF OFF + * LED_HEAPALLOCATE 0 Heap has been allocated OFF OFF + * LED_IRQSENABLED 0 Interrupts enabled OFF OFF + * LED_STACKCREATED 1 Idle stack created ON OFF + * LED_INIRQ 2 In an interrupt N/C N/C + * LED_SIGNAL 2 In a signal handler N/C N/C + * LED_ASSERTION 2 An assertion failed N/C N/C + * LED_PANIC 3 The system has crashed N/C Blinking + * LED_IDLE - MCU is is sleep mode Not used + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_on(int led) +{ + switch (led) + { + case 0: + gpio_outputlow(LPC31_IOCONFIG_GPIO, GPIO_LED1); + gpio_outputlow(LPC31_IOCONFIG_GPIO, GPIO_LED2); + break; + + case 1: + gpio_outputlow(LPC31_IOCONFIG_GPIO, GPIO_LED1); + gpio_outputhigh(LPC31_IOCONFIG_GPIO, GPIO_LED2); + break; + + case 2: + break; + + case 3: + gpio_outputhigh(LPC31_IOCONFIG_GPIO, GPIO_LED1); + break; + } +} +#endif + +/**************************************************************************** + * Name: board_autoled_off + * + * Description: + * Select the "logical" OFF state: + * + * SYMBOL Value Meaning LED state + * LED2 LED1 + * ---------------- ----- ----------------------- -------- -------- + * LED_STARTED 0 NuttX has been started OFF OFF + * LED_HEAPALLOCATE 0 Heap has been allocated OFF OFF + * LED_IRQSENABLED 0 Interrupts enabled OFF OFF + * LED_STACKCREATED 1 Idle stack created ON OFF + * LED_INIRQ 2 In an interrupt N/C N/C + * LED_SIGNAL 2 In a signal handler N/C N/C + * LED_ASSERTION 2 An assertion failed N/C N/C + * LED_PANIC 3 The system has crashed N/C Blinking + * LED_IDLE - MCU is is sleep mode Not used + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_off(int led) +{ + switch (led) + { + case 0: + case 1: + case 2: + break; + + case 3: + gpio_outputlow(LPC31_IOCONFIG_GPIO, GPIO_LED1); + break; + } +} +#endif + +/************************************************************************************ + * Name: board_userled_initialize, board_userled, and board_userled_all + * + * Description: + * These interfaces allow user control of the board LEDs. + * + * If CONFIG_ARCH_LEDS is defined, then NuttX will control both on-board LEDs up + * until the completion of boot. The it will continue to control LED2; LED1 is + * avaiable for application use. + * + * If CONFIG_ARCH_LEDS is not defined, then both LEDs are available for application + * use. + * + ************************************************************************************/ + +void board_userled_initialize(void) +{ + /* All initialization performed in board_autoled_initialize() */ +} + +void board_userled(int led, bool ledon) +{ + uint32_t bit; + +#ifndef CONFIG_ARCH_LEDS + if (led == BOARD_LED1) + { + bit = GPIO_LED1; + } + else +#endif + if (led == BOARD_LED2) + { + bit = GPIO_LED2; + } + else + { + return; + } + + if (ledon) + { + gpio_outputhigh(LPC31_IOCONFIG_GPIO, bit); + } + else + { + gpio_outputlow(LPC31_IOCONFIG_GPIO, bit); + } +} + +void board_userled_all(uint8_t ledset) +{ +#ifndef CONFIG_ARCH_LEDS + board_userled(BOARD_LED1, (ledset & BOARD_LED1_BIT) != 0); +#endif + board_userled(BOARD_LED2, (ledset & BOARD_LED2_BIT) != 0); +} diff --git a/configs/olimex-lpc-h3131/src/lpc31_mem.c b/configs/olimex-lpc-h3131/src/lpc31_mem.c new file mode 100644 index 0000000000000000000000000000000000000000..0783101e123b657b4eedf2c848a409cd568146d1 --- /dev/null +++ b/configs/olimex-lpc-h3131/src/lpc31_mem.c @@ -0,0 +1,337 @@ +/**************************************************************************** + * configs/olimex-lpc-h3131/src/lp31_mem.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Based on the EA3131 SDRAM initialization logic with adjustments to the + * timing parameters taken from Olimex LPC-H3131 sample code. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "lpc31_syscreg.h" +#include "lpc31_cgudrvr.h" +#include "lpc31_mpmc.h" +#include "lpc_h3131.h" + +#ifdef CONFIG_LPC31_EXTDRAM + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* My LPC-H3131 is fitted with a Samsung K4S561632J-UC/L75 256Mbit DRAM. + * The FLASH organization is 16Mbit x 16 + */ + +/* Command, address, and data delay (DEL2) */ + +#define H3131_MPMC_DELAY ((0x00 << SYSCREG_MPMC_DELAYMODES_DEL1_SHIFT) | \ + (0x20 << SYSCREG_MPMC_DELAYMODES_DEL2_SHIFT) | \ + (0x24 << SYSCREG_MPMC_DELAYMODES_DEL3_SHIFT)) + + +/* Delay constants in nanosecondss for K4S561632J-UC/L75 SDRAM on board */ +/* 90MHz SDRAM Clock */ + +#define H3131_SDRAM_REFRESH (15625) + +#define H3131_SDRAM_TRP (20) /* ns */ +#define H3131_SDRAM_TRAS (48) /* ns */ +#define H3131_SDRAM_TAPR (2) /* clocks */ +#define H3131_SDRAM_TWR (15) /* ns */ +#define H3131_SDRAM_TRC (72) /* ns */ +#define H3131_SDRAM_TRFC (80) /* ns */ +#define H3131_SDRAM_TREX (80) /* ns */ +#define H3131_SDRAM_TXSR (80) /* ns */ +#define H3131_SDRAM_TDAL (5) /* clocks */ +#define H3131_SDRAM_TRRD (2) /* clocks */ +#define H3131_SDRAM_TMRD (2) /* clocks */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc31_ns2clk + * + * Description: + * Convert nanoseconds to units of HCLK clocks + * + ****************************************************************************/ + +static uint32_t lpc31_ns2clk(uint32_t ns, uint32_t hclk2) +{ + /* delay (ns) * hclk (Hz) / scale (ns/sec) = cycles + * + * Example: ns=80, hclk2=90000000 + * clocks = 80 * 90000000 / 1000000000 + 1 = 8 (actual 7.2 cycles) + */ + + uint64_t tmp = (uint64_t)ns * (uint64_t)hclk2 / 1000000000ull; + if (tmp > 0) + { + tmp++; + } + + return (uint32_t)tmp; +} + +/**************************************************************************** + * Name: lpc31_sdraminitialize + * + * Description: + * Configure SDRAM on the Olimex LPC-H3131 board + * + * My LPC-H3131 is fitted with a Samsung K4S561632J-UC/L75 256Mbit DRAM. + * The FLASH organization is 16Mbit x 16 + * + ****************************************************************************/ + +static inline void lpc31_sdraminitialize(void) +{ + uint32_t regval; + + /* These run-time calculations can be reduced dramatically if hclk is + * replaced with an apriori value. + */ + +#ifdef CONFIG_LPC31_SDRAMHCLK +# define HCLK CONFIG_LPC31_SDRAMHCLK +#else + uint32_t hclk = lpc31_clkfreq(CLKID_MPMCCFGCLK2, DOMAINID_SYS); +# define HCLK hclk +#endif + + /* Check RTL for divide by 2 possible. If so change then enable the following logic */ +#if 0 + uint32_t hclk2 = hclk; + + if (((getreg32(LPC31_MPMC_CONFIG) & MPMC_CONFIG_CLK)) != 0) + { + hclk2 >>= 1; + } +# define HCLK2 hclk2 +#else +# define HCLK2 hclk +#endif + up_udelay(100); + + /* Set command delay strategy */ + + putreg32(MPMC_DYNREADCONFIG_CMDDEL, LPC31_MPMC_DYNREADCONFIG); + + /* Configure device config register nSDCE0 for proper width SDRAM: + * Type: 256Mb (16Mx16), 4 banks, row length=13, column length=9 + * Buffer disabled, writes not protected. + */ + + putreg32((MPMC_DYNCONFIG0_MDSDRAM | MPMC_DYNCONFIG_HP16_16MX16), + LPC31_MPMC_DYNCONFIG0); + + /* Disable buffers + writes not protected */ + + regval = getreg32(LPC31_MPMC_DYNCONFIG0); + regval &= ~(MPMC_DYNCONFIG0_B | MPMC_DYNCONFIG0_P); + putreg32(regval, LPC31_MPMC_DYNCONFIG0); + + /* Set RAS/CAS delays*/ + + putreg32((MPMC_DYNRASCAS0_RAS2CLK | MPMC_DYNRASCAS0_CAS2CLK), + LPC31_MPMC_DYNRASCAS0); + + /* Configure SDRAM timing */ + + putreg32(lpc31_ns2clk(H3131_SDRAM_TRP, HCLK2), LPC31_MPMC_DYNTRP); + putreg32(lpc31_ns2clk(H3131_SDRAM_TRAS, HCLK2), LPC31_MPMC_DYNTRAS); + putreg32(lpc31_ns2clk(H3131_SDRAM_TREX, HCLK2), LPC31_MPMC_DYNTSREX); + putreg32(H3131_SDRAM_TAPR, LPC31_MPMC_DYNTAPR); + putreg32(H3131_SDRAM_TDAL + lpc31_ns2clk(H3131_SDRAM_TRP, HCLK2), + LPC31_MPMC_DYNTDAL); + putreg32(lpc31_ns2clk(H3131_SDRAM_TWR, HCLK2), LPC31_MPMC_DYNTWR); + putreg32(lpc31_ns2clk(H3131_SDRAM_TRC, HCLK2), LPC31_MPMC_DYNTRC); + putreg32(lpc31_ns2clk(H3131_SDRAM_TRFC, HCLK2), LPC31_MPMC_DYNTRFC); + putreg32(lpc31_ns2clk(H3131_SDRAM_TXSR, HCLK2), LPC31_MPMC_DYNTXSR); + putreg32(H3131_SDRAM_TRRD, LPC31_MPMC_DYNTRRD); + putreg32(H3131_SDRAM_TMRD, LPC31_MPMC_DYNTMRD); + + /* JEDEC General SDRAM Initialization Sequence DELAY to allow power and + * clocks to stabilize ~100 us NOP + */ + + up_udelay(100); + + /* Issue continuous NOP commands */ + + putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_INOP), + LPC31_MPMC_DYNCONTROL); + + /* Wait ~200us */ + + up_udelay(200); + + /* Issue a "pre-charge all" command */ + + putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_IPALL), + LPC31_MPMC_DYNCONTROL); + + /* Minimum refresh pulse interval (tRFC) for MT48LC32M16A2=80nsec, + * 100nsec provides more than adequate interval. + */ + + putreg32(1, LPC31_MPMC_DYNREFRESH); + + /* Wait ~250us */ + + up_udelay(250); + + /* Recommended refresh interval for normal operation of the Micron + * MT48LC16LFFG = 7.8125usec (128KHz rate). ((HCLK / 128000) - 1) = + * refresh counter interval rate, (subtract one for safety margin). + * + * REVISIT: Is this okay for the Samsung part? + */ + + putreg32(lpc31_ns2clk(H3131_SDRAM_REFRESH, HCLK) >> 4, + LPC31_MPMC_DYNREFRESH); + + /* Select mode register update mode */ + + putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_IMODE), + LPC31_MPMC_DYNCONTROL); + + /* Program the SDRAM internal mode registers on bank nSDCE0 and reconfigure + * the SDRAM chips. Bus speeds up to 90MHz requires use of a CAS latency = 2. + * To get correct value on address bus CAS cycle, requires a shift by 12 for + * 16bit mode + */ + + (void)getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 12)); + + /* Select normal operating mode */ + + putreg32(MPMC_DYNCONTROL_INORMAL, LPC31_MPMC_DYNCONTROL); + + /* Enable buffers */ + + regval = getreg32(LPC31_MPMC_DYNCONFIG0); + regval |= MPMC_DYNCONFIG0_B; + putreg32(regval, LPC31_MPMC_DYNCONFIG0); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc31_meminitialize + * + * Description: + * Initialize external memory resources (sram, sdram, nand, nor, etc.) + * + ****************************************************************************/ + +void lpc31_meminitialize(void) +{ + /* Configure the LCD pins in external bus interface (EBI/MPMC) memory mode. + * + * LCD_CSB -> MPMC_NSTCS_0 + * LCD_DB_1 -> MPMC_NSTCS_1 + * LCD_DB_0 -> MPMC_CLKOUT + * LCD_E_RD -> MPMC_CKE + * LCD_RS -> MPMC_NDYCS + * LCD_RW_WR -> MPMC_DQM_1 + * LCD_DB_2 -> EBI_A_2 + * LCD_DB_3 -> EBI_A_3 l + * LCD_DB_4 -> EBI_A_4 l + * LCD_DB_5 -> EBI_A_5 l + * LCD_DB_6 -> EBI_A_6 + * LCD_DB_7 -> EBI_A_7 + * LCD_DB_8 -> EBI_A_8 + * LCD_DB_9 -> EBI_A_9 + * LCD_DB_10 -> EBI_A_10 + * LCD_DB_11 -> EBI_A_11 + * LCD_DB_12 -> EBI_A_12 + * LCD_DB_13 -> EBI_A_13 + * LCD_DB_14 -> EBI_A_14 + * LCD_DB_15 -> EBI_A_15 + */ + + putreg32(SYSCREG_MUX_LCDEBISEL_EBIMPMC, LPC31_SYSCREG_MUX_LCDEBISEL); + + /* Enable EBI clock */ + + lpc31_enableclock(CLKID_EBICLK); + + /* Enable MPMC controller clocks */ + + lpc31_enableclock(CLKID_MPMCCFGCLK); + lpc31_enableclock(CLKID_MPMCCFGCLK2); + lpc31_enableclock(CLKID_MPMCCFGCLK3); + + /* Enable the external memory controller */ + + putreg32(MPMC_CONTROL_E, LPC31_MPMC_CONTROL); + + /* Force HCLK to MPMC_CLK to 1:1 ratio, little-endian mode */ + + putreg32(0, LPC31_MPMC_CONFIG); + + /* Set MPMC delay based on trace lengths between SDRAM and the chip + * and on the delay strategy used for SDRAM. + */ + + putreg32(H3131_MPMC_DELAY, LPC31_SYSCREG_MPMC_DELAYMODES); + + /* Configure Samsung K4S561632J-UC/L75 DRAM on the H3131 board */ + + lpc31_sdraminitialize(); +} +#endif /* CONFIG_LPC31_EXTDRAM */ diff --git a/configs/olimex-lpc-h3131/src/lpc31_mmcsd.c b/configs/olimex-lpc-h3131/src/lpc31_mmcsd.c new file mode 100644 index 0000000000000000000000000000000000000000..9b974f083fba6a2272a46c9811d96ba8d4cb5af4 --- /dev/null +++ b/configs/olimex-lpc-h3131/src/lpc31_mmcsd.c @@ -0,0 +1,108 @@ +/**************************************************************************** + * configs/olimex-lpc-h3131/src/lpc31_mmcsd.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "lpc31.h" + +#include "lpc_h3131.h" + +#ifdef HAVE_MMCSD + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc31_mmcsd_initialize + * + * Description: + * Create the SDIO-based MMC/SD device + * + ****************************************************************************/ + +int lpc31_mmcsd_initialize(int slot, int minor) +{ + FAR struct sdio_dev_s *sdio; + int ret; + + /* First, get an instance of the SDIO interface */ + + fvdbg("Initializing SDIO slot %d\n", slot); + sdio = sdio_initialize(slot); + if (!sdio) + { + fdbg("ERROR: Failed to initialize SDIO slot %d\n", slot); + return -ENODEV; + } + + /* Now bind the SPI interface to the MMC/SD driver */ + + fvdbg("Bind SDIO to the MMC/SD driver, minor=%d\n", minor); + ret = mmcsd_slotinitialize(minor, sdio); + if (ret != OK) + { + fdbg("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + fvdbg("Successfully bound SDIO to the MMC/SD driver\n"); + + /* Then let's guess and say that there is a card in the slot. I need to check to + * see if the LPC-H3131 board supports a GPIO to detect if there is a card in + * the slot. + */ + + sdio_mediachange(sdio, true); + return OK; +} + +#endif /* HAVE_MMCSD */ diff --git a/configs/olimex-lpc-h3131/src/lpc31_spi.c b/configs/olimex-lpc-h3131/src/lpc31_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..91145242edd855c34d6880eb798588391bfc52f8 --- /dev/null +++ b/configs/olimex-lpc-h3131/src/lpc31_spi.c @@ -0,0 +1,141 @@ +/************************************************************************************ + * configs/olimex-lpc-h3131/src/lpc31_spi.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "lpc31.h" +#include "lpc_h3131.h" + +#ifdef CONFIG_LPC31_SPI +#if 0 /* At present, LPC-H3131 specific logic is hard-coded in the file lpc31_spi.c + * in arch/arm/src/lpc31xx */ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc31_spidev_intialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LPC-H3131 board. + * + ************************************************************************************/ + +void weak_function lpc31_spidev_intialize(void) +{ + /* NOTE: Clocking for SPI has already been provided. Pin configuration is performed + * on-the-fly, so no additional setup is required. + */ +} + +/************************************************************************************ + * Name: lpc31_spiselect and lpc31_spistatus + * + * Description: + * The external functions, lpc31_spiselect and lpc31_spistatus must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including lpc31_spibus_initialize()) + * are provided by common LPC31XX logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in lpc31_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide lpc31_spiselect() and lpc31_spistatus() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to lpc31_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by lpc31_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t lpc31_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} + +#endif /* 0 */ +#endif /* CONFIG_LPC31_SPI */ + diff --git a/configs/olimex-lpc-h3131/src/lpc31_usbhost.c b/configs/olimex-lpc-h3131/src/lpc31_usbhost.c new file mode 100644 index 0000000000000000000000000000000000000000..f333af6049f2d27a668a2b16c51d78d54878440b --- /dev/null +++ b/configs/olimex-lpc-h3131/src/lpc31_usbhost.c @@ -0,0 +1,329 @@ +/************************************************************************************ + * configs/olimex-lpc-h3131/src/lpc31_usbhost.c + * + * Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "up_arch.h" + +#include "lpc31.h" +#include "lpc_h3131.h" + +#ifdef HAVE_USBHOST + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_USBHOST_DEFPRIO +# define CONFIG_USBHOST_DEFPRIO 50 +#endif + +#ifndef CONFIG_USBHOST_STACKSIZE +# ifdef CONFIG_USBHOST_HUB +# define CONFIG_USBHOST_STACKSIZE 1536 +# else +# define CONFIG_USBHOST_STACKSIZE 1024 +# endif +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* Retained device driver handle */ + +static struct usbhost_connection_s *g_ehciconn; + +/* Overcurrent interrupt handler */ + +#if 0 /* Not yet implemented */ +static xcpt_t g_ochandler; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: ehci_waiter + * + * Description: + * Wait for USB devices to be connected to the EHCI root hub. + * + ************************************************************************************/ + +static int ehci_waiter(int argc, char *argv[]) +{ + FAR struct usbhost_hubport_s *hport; + + uvdbg("ehci_waiter: Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_ehciconn, &hport)); + syslog(LOG_INFO, "ehci_waiter: %s\n", + hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_ehciconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc31_usbhost_bootinitialize + * + * Description: + * Called from lpc31_boardinitialize very early in inialization to setup USB + * host-related GPIO pins for the LPC-H3131 board. + * + * SIGNAL GPIO + * ----------- ------- + * #OTG_PWR_E GPIO19 + * #OTG_OVRCR GPIO20 + * + ************************************************************************************/ + +void weak_function lpc31_usbhost_bootinitialize(void) +{ + /* Configure output pin to drive VBUS power (initial state: power off) */ + + gpio_outputhigh(LPC31_IOCONFIG_GPIO, GPIO_NOTG_PWR_E); + + /* Configure input pin to detect overrcurrent errors */ + + gpio_configinput(LPC31_IOCONFIG_GPIO, GPIO_NOTG_OVRCR); + + /* Configure to receive interrupts on the overrcurrent input pin */ +#warning Missing logic +} + +/*********************************************************************************** + * Name: lpc31_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +int lpc31_usbhost_initialize(void) +{ + pid_t pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about + */ + +#ifdef CONFIG_USBHOST_HUB + /* Initialize USB hub support */ + + ret = usbhost_hub_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: usbhost_hub_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_MSC + /* Register theUSB host Mass Storage Class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the CDC/ACM serial class\n"); + } +#endif + +#ifdef CONFIG_USBHOST_HIDKBD + /* Register the USB host HID keyboard class driver */ + + ret = usbhost_kbdinit(); + if (ret != OK) + { + udbg("ERROR: Failed to register the KBD class\n"); + } +#endif + + /* Then get an instance of the USB EHCI interface. */ + + g_ehciconn = lpc31_ehci_initialize(0); + if (!g_ehciconn) + { + udbg("ERROR: lpc31_ehci_initialize failed\n"); + return -ENODEV; + } + + /* Start a thread to handle device connection. */ + + pid = task_create("EHCI Monitor", CONFIG_USBHOST_DEFPRIO, CONFIG_USBHOST_STACKSIZE, + (main_t)ehci_waiter, (FAR char * const *)NULL); + if (pid < 0) + { + udbg("ERROR: Failed to create ehci_waiter task: %d\n", ret); + return -ENODEV; + } + + return OK; +} + +/*********************************************************************************** + * Name: lpc31_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be provided by + * each platform that implements the OHCI or EHCI host interface + * + * Input Parameters: + * rhport - Selects root hub port to be powered host interface. Since the LPC31 + * has only a downstream port, zero is the only possible value for this + * parameter. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ***********************************************************************************/ + +void lpc31_usbhost_vbusdrive(int rhport, bool enable) +{ + uvdbg("RHPort%d: enable=%d\n", rhport+1, enable); + + /* The LPC3131 has only a single root hub port */ + + if (rhport == 0) + { + /* Then enable or disable VBUS power */ + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ + + gpio_outputlow(LPC31_IOCONFIG_GPIO, GPIO_NOTG_PWR_E); + } + else + { + /* Disable the Power Switch by driving the enable pin high */ + + gpio_outputhigh(LPC31_IOCONFIG_GPIO, GPIO_NOTG_PWR_E); + } + } +} + +/************************************************************************************ + * Name: lpc31_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent condition is + * detected. + * + * Input parameter: + * handler - New overcurrent interrupt handler + * + * Returned value: + * Old overcurrent interrupt handler + * + ************************************************************************************/ + +#if 0 /* Not ready yet */ +xcpt_t lpc31_setup_overcurrent(xcpt_t handler) +{ + xcpt_t oldhandler; + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = g_ochandler; + g_ochandler = handler; + + /* Configure the interrupt */ +#warning Missing logic + + /* Return the old button handler (so that it can be restored) */ + + leave_critical_section(flags); + return oldhandler; +} +#endif /* 0 */ + +#endif /* HAVE_USBHOST */ diff --git a/configs/olimex-lpc-h3131/src/lpc_h3131.h b/configs/olimex-lpc-h3131/src/lpc_h3131.h new file mode 100644 index 0000000000000000000000000000000000000000..895b5ca596f91b954899abd44ff6446496b8b402 --- /dev/null +++ b/configs/olimex-lpc-h3131/src/lpc_h3131.h @@ -0,0 +1,210 @@ +/************************************************************************************ + * configs/olimex-lpc-h3131/src/lpc_h3131.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_OLIMEX_LPC_H3131_SRC_LPC_H3131_H +#define __CONFIGS_OLIMEX_LPC_H3131_SRC_LPC_H3131_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include "lpc31_ioconfig.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#define HAVE_MMCSD 1 +#undef HAVE_USBDEV +#define HAVE_USBHOST 1 +#define HAVE_USBMONITOR 1 + +/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support + * is not enabled. + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC31_MCI) +# undef HAVE_MMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/* Can't support USB host features if USB host is not enabled */ + +#if !defined(CONFIG_LPC31_USBOTG) || !defined(CONFIG_USBHOST) +# undef HAVE_USBHOST +#endif + +/* Check if we need to support the USB monitor */ + +#ifndef HAVE_USBHOST +# undef CONFIG_USBHOST_TRACE +#endif + +#if !defined(CONFIG_SYSTEM_USBMONITOR) || !defined(CONFIG_USBHOST_TRACE) +# undef HAVE_USBMONITOR +#endif + +/* LPC-H3131 GPIOs ******************************************************************/ +/* BUTTONS. There are no user accessible buttons on the LPC-H3131 */ + +/* LEDs + * + * SIGNAL COLOR GPIO ILLUMINATION + * ------ ------ ------ ----------------------- + * LED1 Yellow GPIO17 High output illuminates + * LED2 Green GPIO18 High output illuminates + */ + +#define GPIO_LED1 IOCONFIG_GPIO_GPIO17 +#define GPIO_LED2 IOCONFIG_GPIO_GPIO18 + +/* USB HOST + * + * SIGNAL GPIO + * ----------- ------- + * #OTG_PWR_E GPIO19 + * #OTG_OVRCR GPIO20 + */ + +#define GPIO_NOTG_PWR_E IOCONFIG_GPIO_GPIO19 +#define GPIO_NOTG_OVRCR IOCONFIG_GPIO_GPIO20 + +/* SPI Chip Selects */ +/* SPI NOR flash is the only device on SPI. SPI_CS_OUT0 is its chip select */ + +#define SPINOR_CS IOCONFIG_SPI_CSOUT0 + +/* USB Soft Connect Pullup -- NONE */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc31_meminitialize + * + * Description: + * Initialize external memory resources (sram, sdram, nand, nor, etc.) + * + ************************************************************************************/ + +#ifdef CONFIG_LPC31_EXTDRAM +void lpc31_meminitialize(void); +#endif + +/************************************************************************************ + * Name: lpc31_spidev_intialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LPC-H3131 board. + * + ************************************************************************************/ + +void weak_function lpc31_spidev_intialize(void); + +/************************************************************************************ + * Name: lpc31_usbdev_initialize + * + * Description: + * Called to setup USB-related GPIO pins for the LPC-H3131 board. + * + ************************************************************************************/ + +#ifdef HAVE_USBDEV +void weak_function lpc31_usbdev_initialize(void); +#endif + +/************************************************************************************ + * Name: lpc31_usbhost_bootinitialize + * + * Description: + * Called from lpc31_boardinitialize very early in inialization to setup USB + * host-related GPIO pins for the LPC-H3131 board. + * + ************************************************************************************/ + +#ifdef HAVE_USBHOST +void weak_function lpc31_usbhost_bootinitialize(void); +#endif + +/*********************************************************************************** + * Name: lpc31_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +#ifdef HAVE_USBHOST +int lpc31_usbhost_initialize(void); +#endif + +/**************************************************************************** + * Name: lpc31_mmcsd_initialize + * + * Description: + * Create the SDIO-based MMC/SD device + * + ****************************************************************************/ + +#ifdef HAVE_MMCSD +int lpc31_mmcsd_initialize(int slot, int minor) +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_OLIMEX_LPC_H3131_SRC_LPC_H3131_H */ + diff --git a/configs/olimex-lpc-h3131/tools/.gitignore b/configs/olimex-lpc-h3131/tools/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..76268bd4382fe0dbdcd737420f61777124a2c185 --- /dev/null +++ b/configs/olimex-lpc-h3131/tools/.gitignore @@ -0,0 +1,2 @@ +/lpchdr +/*.exe diff --git a/configs/olimex-lpc-h3131/tools/Makefile b/configs/olimex-lpc-h3131/tools/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..5327928acb7090a64d449f8b4177341452966a89 --- /dev/null +++ b/configs/olimex-lpc-h3131/tools/Makefile @@ -0,0 +1,53 @@ +############################################################################ +# configs/olimex-lpc-h3131/tools/Makefile +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +OBJS = lpchdr.o crc32.o +BIN = lpchdr + +CFLAGS += -Wall -g + +all: $(BIN) +.PHONY: clean + +$(OBJS): %.o: %.c + $(CC) -c $(CFLAGS) $< -o $@ + +lpchdr: $(OBJS) + $(CC) -o $@ $^ + +clean: + @rm -f $(BIN) *.o *~ + + diff --git a/configs/olimex-lpc-h3131/tools/armusbocd.cfg b/configs/olimex-lpc-h3131/tools/armusbocd.cfg new file mode 100644 index 0000000000000000000000000000000000000000..48fe376b670462b5a95cbba8dbdf2fa9ca0db544 --- /dev/null +++ b/configs/olimex-lpc-h3131/tools/armusbocd.cfg @@ -0,0 +1,106 @@ +################################################################## +# Settings taken from OpenOCD Version 0.7.0 +################################################################## +################################################################## +# daemon configuration +################################################################## +telnet_port 4444 +gdb_port 3333 + +################################################################## +# interface taken from scripts/interface/arm-usb-ocd.cfg +################################################################## +# +# Olimex ARM-USB-OCD +# +# http://www.olimex.com/dev/arm-usb-ocd.html +# + +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG" +ft2232_layout "olimex-jtag" +ft2232_vid_pid 0x15BA 0x0003 + +################################################################## +# Board-specific stuff +################################################################## + +adapter_khz 1000 +reset_config trst_and_srst srst_pulls_trst + +################################################################## +# target taken from scripts/target/lpc3131.cfg +################################################################## + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lpc3131 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +# ARM926EJS core +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x07926f0f +} + +# Scan Tap +# Wired to seperate STDO pin on the lpc3131, externally muxed to TDO on ea3131 module +# JTAGSEL pin must be 0 to activate, which reassigns arm tdo to a pass through. +if { [info exists SJCTAPID] } { + set _SJCTAPID $SJCTAPID +} else { + set _SJCTAPID 0x1541E02B +} + +jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID + +################################################################## +# various symbol definitions, to avoid hard-wiring addresses +################################################################## + +global lpc313x +set lpc313x [ dict create ] + +# Physical addresses for controllers and memory +dict set lpc313x sram0 0x11028000 +dict set lpc313x sram1 0x11040000 +dict set lpc313x uart 0x15001000 +dict set lpc313x cgu 0x13004000 +dict set lpc313x ioconfig 0x13003000 +dict set lpc313x sysconfig 0x13002800 +dict set lpc313x wdt 0x13002400 + +################################################################## +# Target configuration +################################################################## + +adapter_nsrst_delay 1000 +jtag_ntrst_delay 0 + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME + +$_TARGETNAME invoke-event halted + +$_TARGETNAME configure -work-area-phys [dict get $lpc313x sram0] -work-area-size 0x30000 -work-area-backup 0 + +$_TARGETNAME configure -event reset-init { + echo "\nRunning reset init script for LPC3131\n" + halt + wait_halt + reg cpsr 0xa00000d3 ;#Supervisor mode + reg pc 0x11029000 + poll + sleep 500 +} + +arm7_9 fast_memory_access enable +arm7_9 dcc_downloads enable diff --git a/configs/olimex-lpc-h3131/tools/crc32.c b/configs/olimex-lpc-h3131/tools/crc32.c new file mode 100644 index 0000000000000000000000000000000000000000..f6fd1b71c3008570967935b746dbf281c8c4d2f7 --- /dev/null +++ b/configs/olimex-lpc-h3131/tools/crc32.c @@ -0,0 +1,123 @@ +/************************************************************************************************ + * configs/olimex-lpc-h3131/tools/crc32.c + * + * This file is a part of NuttX: + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * + * The logic in this file was developed by Gary S. Brown: + * + * COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or code or tables + * extracted from it, as desired without restriction. + * + * First, the polynomial itself and its table of feedback terms. The polynomial is: + * + * X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0 + * + * Note that we take it "backwards" and put the highest-order term in the lowest-order bit. + * The X^32 term is "implied"; the LSB is the X^31 term, etc. The X^0 term (usually shown + * as "+1") results in the MSB being 1 + * + * Note that the usual hardware shift register implementation, which is what we're using + * (we're merely optimizing it by doing eight-bit chunks at a time) shifts bits into the + * lowest-order term. In our implementation, that means shifting towards the right. Why + * do we do it this way? Because the calculated CRC must be transmitted in order from + * highest-order term to lowest-order term. UARTs transmit characters in order from LSB + * to MSB. By storing the CRC this way we hand it to the UART in the order low-byte to + * high-byte; the UART sends each low-bit to hight-bit; and the result is transmission bit + * by bit from highest- to lowest-order term without requiring any bit shuffling on our + * part. Reception works similarly + * + * The feedback terms table consists of 256, 32-bit entries. Notes + * + * - The table can be generated at runtime if desired; code to do so is shown later. It + * might not be obvious, but the feedback terms simply represent the results of eight + * shift/xor operations for all combinations of data and CRC register values + * + * - The values must be right-shifted by eight bits by the updcrc logic; the shift must + * be u_(bring in zeroes). On some hardware you could probably optimize the shift in + * assembler by using byte-swap instructions polynomial $edb88320 + ************************************************************************************************/ + +/************************************************************************************************ + * Included Files + ************************************************************************************************/ + +#include +#include +#include "lpchdr.h" + +/************************************************************************************************ + * Private Data + ************************************************************************************************/ + +static const uint32_t crc32_tab[] = +{ + 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, + 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, + 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, + 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5, + 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, + 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, + 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f, + 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, + 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, + 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, + 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, + 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, + 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, + 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, + 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, + 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, + 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, + 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, + 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, + 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, + 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, + 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79, + 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, + 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, + 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, + 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, + 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, + 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, + 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, + 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, + 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, + 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d +}; + +/************************************************************************************************ + * Public Functions + ************************************************************************************************/ +/************************************************************************************************ + * Name: crc32part + * + * Description: + * Continue CRC calculation on a part of the buffer. + * + ************************************************************************************************/ + +uint32_t crc32part(const uint8_t *src, size_t len, uint32_t crc32val) +{ + size_t i; + + for (i = 0; i < len; i++) + { + crc32val = crc32_tab[(crc32val ^ src[i]) & 0xff] ^ (crc32val >> 8); + } + return crc32val; +} + +/************************************************************************************************ + * Name: crc32 + * + * Description: + * Return a 32-bit CRC of the contents of the 'src' buffer, length 'len' + * + ************************************************************************************************/ + +uint32_t crc32(const uint8_t *src, size_t len) +{ + return crc32part(src, len, 0); +} diff --git a/configs/olimex-lpc-h3131/tools/lpchdr.c b/configs/olimex-lpc-h3131/tools/lpchdr.c new file mode 100644 index 0000000000000000000000000000000000000000..04905e70e1426e9a60635a22788b99cb98070068 --- /dev/null +++ b/configs/olimex-lpc-h3131/tools/lpchdr.c @@ -0,0 +1,297 @@ +/************************************************************************************ + * configs/olimex-lpc-h3131/tools/lpchdr.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "lpchdr.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define IO_BUF_SIZE 1024 +#define HDR_SIZE 0x80 +#define HDR_CRC_SIZE 0x6c + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static const char *g_infile; +static const char *g_outfile; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +static void show_usage(const char *progname, int exitcode) +{ + fprintf(stderr, "%s -o \n", progname); + exit(exitcode); +} + +static void parse_args(int argc, char **argv) +{ + int ch; + + while ((ch = getopt(argc, argv, ":o:")) >= 0) + { + switch (ch) + { + case 'o': + g_outfile = optarg; + break; + + case ':': + fprintf(stderr, "Missing option argumen\n"); + show_usage(argv[0], 1); + + case '?': + default: + fprintf(stderr, "Unrecognized option\n"); + show_usage(argv[0], 1); + } + } + + if (optind >= argc) + { + fprintf(stderr, "Missing binary input file name\n"); + show_usage(argv[0], 1); + } + + g_infile = argv[optind]; + optind++; + + if (optind < argc) + { + fprintf(stderr, "Garbage at the end of the command line\n"); + show_usage(argv[0], 1); + } +} + +static inline uint32_t infilecrc32(int infd, size_t len, size_t padlen) +{ + off_t offset; + uint8_t buffer[IO_BUF_SIZE]; + ssize_t nbytes; + size_t bytesread; + uint32_t crc; + + offset = lseek(infd, 0, SEEK_SET); + if (offset == (off_t)-1) + { + fprintf(stderr, "lseek failed: %s\n", strerror(errno)); + exit(4); + } + + crc = 0; + for (bytesread = 0; bytesread < len; bytesread += nbytes) + { + nbytes = read(infd, buffer, IO_BUF_SIZE); + if (nbytes < 0) + { + fprintf(stderr, "read failed: %s\n", strerror(errno)); + exit(4); + } + else if (nbytes == 0) + { + fprintf(stderr, "Unexpected end-of-file: %s\n", strerror(errno)); + exit(4); + } + else + { + crc = crc32part(buffer, nbytes, crc); + } + } + + /* Add the zero-padding at the end of the binary in the CRC */ + + memset(buffer, 0, IO_BUF_SIZE); + return crc32part(buffer, padlen, crc); +} + +static inline void writefile(int infd, int outfd, size_t len, size_t padlen) +{ + off_t offset; + uint8_t buffer[IO_BUF_SIZE]; + ssize_t nbytesread; + ssize_t nbyteswritten; + size_t totalread; + + offset = lseek(infd, 0, SEEK_SET); + if (offset == (off_t)-1) + { + fprintf(stderr, "lseek failed: %s\n", strerror(errno)); + exit(4); + } + + for (totalread = 0; totalread < len; totalread += nbytesread) + { + nbytesread = read(infd, buffer, IO_BUF_SIZE); + if (nbytesread < 0) + { + fprintf(stderr, "read failed: %s\n", strerror(errno)); + exit(4); + } + else if (nbytesread == 0) + { + fprintf(stderr, "Unexpected end-of-file: %s\n", strerror(errno)); + exit(4); + } + else + { + nbyteswritten = write(outfd, buffer, nbytesread); + if (nbyteswritten < 0) + { + fprintf(stderr, "write failed: %s\n", strerror(errno)); + exit(4); + } + else if (nbyteswritten != nbytesread) + { + fprintf(stderr, "Short writes not handled\n"); + exit(4); + } + } + } + + /* Write the zero-padding at the end of the binary */ + + memset(buffer, 0, IO_BUF_SIZE); + nbyteswritten = write(outfd, buffer, padlen); + if (nbyteswritten < 0) + { + fprintf(stderr, "write failed: %s\n", strerror(errno)); + exit(4); + } + else if (nbyteswritten != padlen) + { + fprintf(stderr, "Short writes not handled\n"); + exit(4); + } +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +int main(int argc, char **argv, char **envp) +{ + struct lpc31_header_s g_hdr; + struct stat buf; + ssize_t nbytes; + size_t padlen; + int infd; + int outfd; + int ret; + + /* Parse arguments */ + + parse_args(argc, argv); + + /* Open files */ + + infd = open(g_infile, O_RDONLY); + if (infd < 0) + { + fprintf(stderr, "Failed to open %s for reading: %s\n", g_infile, strerror(errno)); + exit(2); + } + + outfd = open(g_outfile, O_WRONLY|O_CREAT|O_TRUNC, 0644); + if (outfd < 0) + { + fprintf(stderr, "Failed to open %s for writing: %s\n", g_outfile, strerror(errno)); + exit(2); + } + + /* Get the size of the binary file */ + + ret = fstat(infd, &buf); + if (ret < 0) + { + fprintf(stderr, "stat of %s failed: %s\n", g_infile, strerror(errno)); + exit(3); + } + + /* Initialize the header */ + + memset(&g_hdr, 0, sizeof(struct lpc31_header_s)); + g_hdr.vector = 0xea00001e; /* b 0x11029080 */ + g_hdr.magic = 0x41676d69; +#if 1 /* CRC doesn't seem to be functional */ + g_hdr.imageType = 0x0000000a; +#else + g_hdr.imageType = 0x0000000b; +#endif + g_hdr.imageLength = (buf.st_size + sizeof(struct lpc31_header_s) + 511) & ~0x1ff; + + /* This is how much we must pad at the end of the binary image. */ + + padlen = g_hdr.imageLength - buf.st_size; + + /* Calculate CRCs */ + + g_hdr.execution_crc32 = infilecrc32(infd, buf.st_size, padlen); + g_hdr.header_crc32 = crc32((const uint8_t*)&g_hdr, HDR_CRC_SIZE); + + /* Write the header */ + + nbytes = write(outfd, &g_hdr, HDR_SIZE); + if (nbytes != 0x80) + { + fprintf(stderr, "write of header to of %s failed: %s\n", g_outfile, strerror(errno)); + exit(4); + } + + /* Copy the input file to the output */ + + writefile(infd, outfd, buf.st_size, padlen); + close(infd); + close(outfd); + return 0; +} + + diff --git a/configs/olimex-lpc-h3131/tools/lpchdr.h b/configs/olimex-lpc-h3131/tools/lpchdr.h new file mode 100644 index 0000000000000000000000000000000000000000..5ddcba645399d0de08644c2053dcd9e54f1337dc --- /dev/null +++ b/configs/olimex-lpc-h3131/tools/lpchdr.h @@ -0,0 +1,105 @@ +/************************************************************************************ + * configs/olimex-lpc-h3131/tools/lpchdr.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_OLIMEX_LPC_H3131_TOOLS_LPCHDR_H +#define __CONFIGS_OLIMEX_LPC_H3131_TOOLS_LPCHDR_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +struct lpc31_header_s +{ + /* OFFS DESCRIPTION */ + uint32_t vector; /* 0x00 Valid ARM instruction. Usually this will be + * a branch instruction to entry point of the + * image. */ + uint32_t magic; /* 0x04 This field is used by boot ROM to detect a + * valid image header. This field should always + * be set to 0x41676d69. */ + uint32_t execution_crc32; /* 0x08 CRC32 value of execution part of the image. If + * the ‘image_type’ is set to ‘0xA’, this field + * is ignored by boot ROM. */ + uint32_t Reserved0[4]; /* 0x0c-0x18: Should be zero. */ + uint32_t imageType; /* 0x1c Specifies whether CRC check should be done + * on the image or not: + * 0xA – No CRC check required. + * 0xB – Do CRC32 check on both header and + * execution part of the image. */ + uint32_t imageLength; /* 0x20 Total image length including header rounded + * up to the nearest 512 byte boundary. In C + * language the field can be computed as: + * imageLength = (Actual length + 511) & ~0x1FF; */ + uint32_t releaseID; /* 0x24 Release or version number of the image. Note, + * this field is not used by boot ROM but is + * provided to track the image versions. */ + uint32_t buildTime; /* 0x28 Time (expressed in EPOC time format) at which + * image is built. Note, this field is not used + * by boot ROM but is provided to track the image + * versions. */ + uint32_t sbzBootParameter; /* 0x2c hould be zero. */ + uint32_t cust_reserved[15]; /* 0x30-0x68: Reserved for customer use (60 bytes) */ + uint32_t header_crc32; /* 0x6c CRC32 value of the header (bytes 0x00 to 0x6C + * of the image). If the ‘image_type’ is set + * to ‘0xA’, this field is ignored by boot ROM. */ + uint32_t Reserved1[4]; /* 0x70-0x7c: Should be zero. */ + /* 0x80 Start of program code (128Kb max). The final + * image has to be padded to the nearest 512 + * byte boundary */ +}; + +/************************************************************************************ + * Public data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +extern uint32_t crc32part(const uint8_t *src, size_t len, uint32_t crc32val); +extern uint32_t crc32(const uint8_t *src, size_t len); + +#endif /* __CONFIGS_OLIMEX_LPC_H3131_TOOLS_LPCHDR_H */ + diff --git a/configs/olimex-lpc-h3131/tools/mklpc.sh b/configs/olimex-lpc-h3131/tools/mklpc.sh new file mode 100644 index 0000000000000000000000000000000000000000..3f8de2d88e9cb660f4810d130e7cc614cb19c918 --- /dev/null +++ b/configs/olimex-lpc-h3131/tools/mklpc.sh @@ -0,0 +1,60 @@ +#!/bin/sh + +# This script lies in sub-directory configs/olimex-lpc-h3131/tools but make be executed +# from either that directory or TOPDIR + +MYNAME=`basename $0` +if [ -x "$PWD/$MYNAME" ]; then + TOPDIR="$PWD/../../.." +else + if [ -x "$PWD/configs/olimex-lpc-h3131/tools/$MYNAME" ]; then + TOPDIR="$PWD" + else + echo "This script must be executed from a known director" + exit 1 + fi +fi +echo "TOOLDIR: $TOOLDIR" + +# The lpchdr could be named lpchdr.exe if we are running under Cygwin or +# just lpchdr under Linux + +TOOLDIR=$TOPDIR/configs/olimex-lpc-h3131/tools + +if [ ! -d "$TOOLDIR" ]; then + echo "Tool directory $TOOLDIR does not exist" + exit 1 +fi + +if [ -x "$TOOLDIR/lpchdr.exe" ]; then + LPCHDR="$TOOLDIR/lpchdr.exe" +else + if [ -x "$TOOLDIR/lpchdr" ]; then + LPCHDR="$TOOLDIR/lpchdr" + else + echo "lpchdr executable does not exist in $TOODIR" + echo " - cd $TOOLDIR" + echo " - make" + fi +fi +echo "LPCHDR: $LPCHDR" + +# Now get the path to the NuttX executable + +NUTTXPATH="$TOPDIR/nuttx.bin" + +if [ ! -f "$NUTTXPATH" ]; then + echo "NuttX binary does not exist at $NUTTXPATH" + echo " - cd $TOPDIR" + echo " - make" + exit 1 +fi +echo "NUTTXPATH: $NUTTXPATH" + +# Create the binary + +echo "COMMAND: $LPCHDR -o $TOPDIR/nuttx.lpc $NUTTXPATH" +"$LPCHDR" -o "$TOPDIR/nuttx.lpc" "$NUTTXPATH" || \ + { echo "$LPCHDR failed" ; exit 1 ; } +echo "Successfully created binary" + diff --git a/configs/olimex-lpc-h3131/tools/oocd.sh b/configs/olimex-lpc-h3131/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..655f52d9cd749efd2d6acaf323c8e55443639b74 --- /dev/null +++ b/configs/olimex-lpc-h3131/tools/oocd.sh @@ -0,0 +1,61 @@ +#!/bin/sh +# +# See configs/olimex-lpc-h3131/README.txt for information about +# this file. + +TOPDIR=$1 +USAGE="$0 [-d]" +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +# Places where OpenOCD has been installed +#OPENOCD_PATH="/cygdrive/c/OpenOCD/openocd-0.4.0/src" +#OPENOCD_PATH="/cygdrive/c/gccfd/openocd/bin" +OPENOCD_PATH="/usr/local/bin" + +#TARGET_PATH="c:\OpenOCD\openocd-0.4.0\tcl" +TARGET_PATH="/usr/local/share/openocd/scripts" + +# OPENOCD_EXE=openocd-ftd2xx.exe +OPENOCD_EXE=openocd.exe + +#OPENOCD_CFG=`cygpath -w "${TOPDIR}/configs/olimex-lpc1766stk/tools/olimex.cfg"` +OPENOCD_CFG="${TOPDIR}/configs/olimex-lpc-h3131/tools/armusbocd.cfg" + +# OPENOCD_ARGS="-f `cygpath -w ${OPENOCD_CFG}` -s `cygpath -w ${TARGET_PATH}`" +# OPENOCD_ARGS="-f interface/arm-usb-ocd.cfg -f target/lpc3131.cfg -c \"adapter_khz 1000\"" +OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH} " + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +if [ ! -d ${OPENOCD_PATH} ]; then + echo "OpenOCD path does not exist: ${OPENOCD_PATH}" + exit 1 +fi +if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then + echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f ${OPENOCD_CFG} ]; then + echo "OpenOCD config file does not exist: ${OPENOCD_CFG}" + exit 1 +fi + +echo "Starting OpenOCD" +#${OPENOCD_PATH}/${OPENOCD_EXE} ${OPENOCD_ARGS} & +cd ${OPENOCD_PATH} || { echo "Failed to CD to ${OPENOCD_PATH}"; exit 1; } +${OPENOCD_EXE} ${OPENOCD_ARGS} & + +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" + + + + diff --git a/configs/olimex-lpc-h3131/tools/usb-driver.txt b/configs/olimex-lpc-h3131/tools/usb-driver.txt new file mode 100644 index 0000000000000000000000000000000000000000..83d7598a5569e5b386da7281f201cfa2f6441ed7 --- /dev/null +++ b/configs/olimex-lpc-h3131/tools/usb-driver.txt @@ -0,0 +1,25 @@ +https://www.olimex.com/dev/pdf/ARM/JTAG/Repair%20Procedure%20for%20OpenOcd-Rev.%20G%20drivers.pdf + +Repair procedure for ARM-USB-OCD drivers + +1. Uninstalling ARM-USB-OCD drivers +------------------------------------- +1.1. Connect your programmer/debugger to your computer, open Device Manager + and uninstall the drivers for ARM-USB-OCD. +1.2. After you have uninstalled ARM-USB-TINY driver from Device Manager, + disconnect the programmer from your computer. +1.3. Now you should download FTClean.exe from here: + http://www.ftdichip.com/Support/Utilities/FTClean.zip. +1.4. After download is complete extract the "*.zip" file, open folder FTClean, + and run FTClean.exe +1.5. Ror VID (Hex) select "Other". And after that fill the first box with 15ba + and "PID (Hex)" with 0004. +1.6. Press "Clean System" button. Make sure that all FTDI devices are + disconnected. (My require administrator privileges). + +2. Re-installing the ARM-USB-OCD driver +--------------------------------------- +2.1 Connect the programmer/debugger to the computer. +2.2 When prompted, browse to the C:\gccfd\DRIVERS\ARM-USB-OCD-DRIVER + directory and install. (A different driver is required for OpenOCD + 0.4.0. That driver is available from the olimex.com web site). diff --git a/configs/olimex-lpc1766stk/Kconfig b/configs/olimex-lpc1766stk/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..e057ff0aa4f97e1391186d22ae8abcffdf0e3389 --- /dev/null +++ b/configs/olimex-lpc1766stk/Kconfig @@ -0,0 +1,19 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_LPC1766STK + +config LPC1766STK_USBHOST_STACKSIZE + int "USB host waiter stack size" + default 1536 if USBHOST_HUB + default 1024 if !USBHOST_HUB + depends on USBHOST + +config LPC1766STK_USBHOST_PRIO + int "USB host waiter task priority" + default 100 + depends on USBHOST + +endif diff --git a/configs/olimex-lpc1766stk/README.txt b/configs/olimex-lpc1766stk/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..f4a3155edeb6991dffc3d5e6a583195a77c4129b --- /dev/null +++ b/configs/olimex-lpc1766stk/README.txt @@ -0,0 +1,1392 @@ +README +^^^^^^ + +README for NuttX port to the Olimex LPC1766-STK development board + +Contents +^^^^^^^^ + + Olimex LPC1766-STK development board + Development Environment + GNU Toolchain Options + IDEs + NuttX EABI "buildroot" Toolchain + NuttX OABI "buildroot" Toolchain + NXFLAT Toolchain + LEDs + Serial Console + Using OpenOCD and GDB with an FT2232 JTAG emulator + Olimex LPC1766-STK Configuration Options + USB Host Configuration + Configurations + +Olimex LPC1766-STK development board +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + GPIO Usage: + ----------- + + GPIO PIN SIGNAL NAME + -------------------------------- ---- -------------- + P0[0]/RD1/TXD3/SDA1 46 RD1 + P0[1]/TD1/RXD3/SCL1 47 TD1 + P0[2]/TXD0/AD0[7] 98 TXD0 + P0[3]/RXD0/AD0[6] 99 RXD0 + P0[4]/I2SRX_CLK/RD2/CAP2[0] 81 LED2/ACC IRQ + P0[5]/I2SRX_WS/TD2/CAP2[1] 80 CENTER + P0[6]/I2SRX_SDA/SSEL1/MAT2[0] 79 SSEL1 + P0[7]/I2STX_CLK/SCK1/MAT2[1] 78 SCK1 + P0[8]/I2STX_WS/MISO1/MAT2[2] 77 MISO1 + P0[9]/I2STX_SDA/MOSI1/MAT2[3] 76 MOSI1 + P0[10]/TXD2/SDA2/MAT3[0] 48 SDA2 + P0[11]/RXD2/SCL2/MAT3[1] 49 SCL2 + P0[15]/TXD1/SCK0/SCK 62 TXD1 + P0[16]/RXD1/SSEL0/SSEL 63 RXD1 + P0[17]/CTS1/MISO0/MISO 61 CTS1 + P0[18]/DCD1/MOSI0/MOSI 60 DCD1 + P0[19]/DSR1/SDA1 59 DSR1 + P0[20]/DTR1/SCL1 58 DTR1 + P0[21]/RI1/RD1 57 MMC PWR + P0[22]/RTS1/TD1 56 RTS1 + P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] 9 BUT1 + P0[24]/AD0[1]/I2SRX_WS/CAP3[1] 8 TEMP + P0[25]/AD0[2]/I2SRX_SDA/TXD3 7 MIC IN + P0[26]/AD0[3]/AOUT/RXD3 6 AOUT + P0[27]/SDA0/USB_SDA 25 USB_SDA + P0[28]/SCL0/USB_SCL 24 USB_SCL + P0[29]/USB_D+ 29 USB_D+ + P0[30]/USB_D- 30 USB_D- + P1[0]/ENET_TXD0 95 E_TXD0 + P1[1]/ENET_TXD1 94 E_TXD1 + P1[4]/ENET_TX_EN 93 E_TX_EN + P1[8]/ENET_CRS 92 E_CRS + P1[9]/ENET_RXD0 91 E_RXD0 + P1[10]/ENET_RXD1 90 E_RXD1 + P1[14]/ENET_RX_ER 89 E_RX_ER + P1[15]/ENET_REF_CLK 88 E_REF_CLK + P1[16]/ENET_MDC 87 E_MDC + P1[17]/ENET_MDIO 86 E_MDIO + P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] 32 USB_UP_LED + P1[19]/MC0A/#USB_PPWR/CAP1[1] 33 #USB_PPWR + P1[20]/MCFB0/PWM1[2]/SCK0 34 SCK0 + P1[21]/MCABORT/PWM1[3]/SSEL0 35 SSEL0 + P1[22]/MC0B/USB_PWRD/MAT1[0] 36 USBH_PWRD + P1[23]/MCFB1/PWM1[4]/MISO0 37 MISO0 + P1[24]/MCFB2/PWM1[5]/MOSI0 38 MOSI0 + P1[25]/MC1A/MAT1[1] 39 LED1 + P1[26]/MC1B/PWM1[6]/CAP0[0] 40 CS_UEXT + P1[27]/CLKOUT/#USB_OVRCR/CAP0[1] 43 #USB_OVRCR + P1[28]/MC2A/PCAP1[0]/MAT0[0] 44 P1.28 + P1[29]/MC2B/PCAP1[1]/MAT0[1] 45 P1.29 + P1[30]/VBUS/AD0[4] 21 VBUS + P1[31]/SCK1/AD0[5] 20 AIN5 + P2[0]/PWM1[1]/TXD1 75 UP + P2[1]/PWM1[2]/RXD1 74 DOWN + P2[2]/PWM1[3]/CTS1/TRACEDATA[3] 73 TRACE_D3 + P2[3]/PWM1[4]/DCD1/TRACEDATA[2] 70 TRACE_D2 + P2[4]/PWM1[5]/DSR1/TRACEDATA[1] 69 TRACE_D1 + P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 68 TRACE_D0 + P2[6]/PCAP1[0]/RI1/TRACECLK 67 TRACE_CLK + P2[7]/RD2/RTS1 66 LEFT + P2[8]/TD2/TXD2 65 RIGHT + P2[9]/USB_CONNECT/RXD2 64 USBD_CONNECT + P2[10]/#EINT0/NMI 53 ISP_E4 + P2[11]/#EINT1/I2STX_CLK 52 #EINT1 + P2[12]/#EINT2/I2STX_WS 51 WAKE-UP + P2[13]/#EINT3/I2STX_SDA 50 BUT2 + P3[25]/MAT0[0]/PWM1[2] 27 LCD_RST + P3[26]/STCLK/MAT0[1]/PWM1[3] 26 LCD_BL + + Serial Console + -------------- + + The LPC1766-STK board has two serial connectors. One, RS232_0, connects to + the LPC1766 UART0. This is the DB-9 connector next to the power connector. + The other RS232_1, connect to the LPC1766 UART1. This is he DB-9 connector + next to the Ethernet connector. + + Simple UART1 is the more flexible UART and since the needs for a serial + console are minimal, the more minimal UART0/RS232_0 is used for the NuttX + system console. Of course, this can be changed by editting the NuttX + configuration file as discussed below. + + The serial console is configured as follows (57600 8N1): + + BAUD: 57600 + Number of Bits: 8 + Parity: None + Stop bits: 1 + + You will need to connect a monitor program (Hyperterminal, Tera Term, + minicom, whatever) to UART0/RS232_0 and configure the serial port as + shown above. + + NOTE: These configurations have problems at 115200 baud. + + LCD + --- + + The LPC1766-STK has a Nokia 6100 132x132 LCD and either a Phillips PCF8833 + or an Epson S1D15G10 LCD controller. The NuttX configuration may have to + be adjusted depending on which controller is used with the LCD. The + "LPC1766-STK development board Users Manual" states tha the board features + a "LCD NOKIA 6610 128x128 x12bit color TFT with Epson LCD controller." + But, referring to a different Olimex board, "Nokia 6100 LCD Display + Driver," Revision 1, James P. Lynch ("Nokia 6100 LCD Display Driver.pdf") + says: + + "The major irritant in using this display is identifying the graphics + controller; there are two possibilities (Epson S1D15G00 or Philips + PCF8833). The LCD display sold by the German Web Shop Jelu has a Leadis + LDS176 controller but it is 100% compatible with the Philips PCF8833). + So how do you tell which controller you have? Some message boards have + suggested that the LCD display be disassembled and the controller chip + measured with a digital caliper – well that’s getting a bit extreme. + + "Here’s what I know. The Olimex boards have both display controllers + possible; if the LCD has a GE-12 sticker on it, it’s a Philips PCF8833. + If it has a GE-8 sticker, it’s an Epson controller. The older Sparkfun + 6100 displays were Epson, their web site indicates that the newer ones + are an Epson clone. Sparkfun software examples sometimes refer to the + Philips controller so the whole issue has become a bit murky. The + trading companies in Honk Kong have no idea what is inside the displays + they are selling. A Nokia 6100 display that I purchased from Hong Kong + a couple of weeks ago had the Philips controller." + + The LCD connects to the LPC1766 via SPI and two GPIOs. The two GPIOs are + noted above: + + P1.21 is the SPI chip select, and + P3.25 is the LCD reset + P3.26 is PWM1 output used to control the backlight intensity. + + MISO0 and MOSI0 are join via a 1K ohm resistor so the LCD appears to be + write only. + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery or devkitARM toolchain, you simply need add one of the + following configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows)and devkitARM are Windows native toolchains. + The CodeSourcey (for Linux) and NuttX buildroot toolchains are Cygwin and/or + Linux native toolchains. There are several limitations to using a Windows based + toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lpc17xx, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/lpc17x/lpc17_vectors.S. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh olimex-lpc1766stk/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +^^^^ + + If CONFIG_ARCH_LEDS is defined, then support for the LPC1766-STK LEDs will be + included in the build. See: + + - configs/olimex-lpc1766stk/include/board.h - Defines LED constants, types and + prototypes the LED interface functions. + + - configs/olimex-lpc1766stk/src/lpc1766stk.h - GPIO settings for the LEDs. + + - configs/olimex-lpc1766stk/src/up_leds.c - LED control logic. + + The LPC1766-STK has two LEDs. If CONFIG_ARCH_LEDS is defined, these LEDs will + be controlled as follows for NuttX debug functionality (where NC means "No Change"). + Basically, + + LED1: + - OFF means that the OS is still initializing. Initialization is very fast so + if you see this at all, it probably means that the system is hanging up + somewhere in the initialization phases. + - ON means that the OS completed initialization. + - Glowing means that the LPC17 is running in a reduced power mode: LED1 is + turned off when the processor enters sleep mode and back on when it wakesup + up. + + LED2: + - ON/OFF toggles means that various events are happening. + - GLowing: LED2 is turned on and off on every interrupt so even timer interrupts + should cause LED2 to glow faintly in the normal case. + - Flashing. If the LED2 is flashing at about 2Hz, that means that a crash + has occurred. If CONFIG_ARCH_STACKDUMP=y, you will get some diagnostic + information on the console to help debug what happened. + + NOTE: LED2 is controlled by a jumper labeled: ACC_IRQ/LED2. That jump must be + in the LED2 position in order to support LED2. + + LED1 LED2 Meaning + ------- -------- -------------------------------------------------------------------- + OFF OFF Still initializing and there is no interrupt activity. + Initialization is very fast so if you see this, it probably means + that the system is hung up somewhere in the initialization phases. + OFF Glowing Still initializing (see above) but taking interrupts. + OFF ON This would mean that (1) initialization did not complete but the + software is hung, perhaps in an infinite loop, somewhere inside + of an interrupt handler. + OFF Flashing Ooops! We crashed before finishing initialization (or, perhaps + after initialization, during an interrupt while the LPC17xx was + sleeping -- see below). + + ON OFF The system has completed initialization, but is apparently not taking + any interrupts. + ON Glowing The OS successfully initialized and is taking interrupts (but, for + some reason, is never entering a reduced power mode -- perhaps the + CPU is very busy?). + ON ON This would mean that (1) the OS complete initialization, but (2) + the software is hung, perhaps in an infinite loop, somewhere inside + of a signal or interrupt handler. + Glowing Glowing This is also a normal healthy state: The OS successfully initialized, + is running in reduced power mode, but taking interrupts. The glow + is very faint and you may have to dim the lights to see that LEDs are + active at all! See note below. + ON Flashing Ooops! We crashed sometime after initialization. + + NOTE: In glowing/glowing case, you get some good subjective information about the + behavior of your system by looking at the level of the LED glow (or better, by + connecting O-Scope and calculating the actual duty): + + 1. The intensity of the glow is determined by the duty of LED on/off toggle -- + as the ON period becomes larger with respect the OFF period, the LED will + glow more brightly. + 2. LED2 is turned ON when entering an interrupt and turned OFF when returning from + the interrupt. A brighter LED2 means that the system is spending more time in + interrupt handling. + 3. LED1 is turned OFF just before the processor goes to sleep. The processor + sleeps until awakened by an interrupt. LED1 is turned back ON after the + processor is re-awakened -- actually after returning from the interrupt that + cause the processor to re-awaken (LED1 will be off during the execution of + that interrupt). So a brighter LED1 means that the processor is spending + less time sleeping. + + When my LPC1766 sits IDLE -- doing absolutely nothing but processing timer interrupts -- + I see the following: + + 1. LED1 glows dimly due to the timer interrupts. + 2. But LED2 is even more dim! The LED ON time excludes the time processing the + interrupt that re-awakens the processing. So this tells me that the LPC1766 is + spending more time processing timer interrupts than doing any other kind of + processing. That, of course, makes sense if the system is truly idle and only + processing timer interrupts. + +Serial Console +^^^^^^^^^^^^^^ + + By default, all of these configurations use UART0 for the NuttX serial + console. UART0 corresponds to the DB-9 connector labelled "RS232_0". This + is a female connector and will require a normal male-to-female RS232 cable + to connect to a PC. + + An alternate is UART1 which connects to the other DB-9 connector labeled + "RS232_1". UART1 is not enabled by default unless specifically noted + otherwise in the configuration description. A normal serial cable must be + used with the port as well. + + By default serial console is configured for 57600 baud, 8-bit, 1 stop bit, + and no parity. Higher rates will probably require minor modification of + the UART initialization logic to use the fractional dividers. + +Using OpenOCD and GDB with an FT2232 JTAG emulator +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + Downloading OpenOCD + + You can get information about OpenOCD here: http://openocd.berlios.de/web/ + and you can download it from here. http://sourceforge.net/projects/openocd/files/. + To get the latest OpenOCD with more mature lpc17xx, you have to download + from the GIT archive. + + git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd + + At present, there is only the older, frozen 0.4.0 version. These, of course, + may have changed since I wrote this. + + Building OpenOCD under Cygwin: + + You can build OpenOCD for Windows using the Cygwin tools. Below are a + few notes that worked as of November 7, 2010. Things may have changed + by the time you read this, but perhaps the following will be helpful to + you: + + 1. Install Cygwin (http://www.cygwin.com/). My recommendation is to install + everything. There are many tools you will need and it is best just to + waste a little disk space and have everthing you need. Everything will + require a couple of gigbytes of disk space. + + 2. Create a directory /home/OpenOCD. + + 3. Get the FT2232 drivr from http://www.ftdichip.com/Drivers/D2XX.htm and + extract it into /home/OpenOCD/ftd2xx + + $ pwd + /home/OpenOCD + $ ls + CDM20802 WHQL Certified.zip + $ mkdir ftd2xx + $ cd ftd2xx + $ unzip ..CDM20802\ WHQL\ Certified.zip + Archive: CDM20802 WHQL Certified.zip + ... + + 3. Get the latest OpenOCD source + + $ pwd + /home/OpenOCD + $ git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd + + You will then have the source code in /home/OpenOCD/openocd + + 4. Build OpenOCD for the FT22322 interface + + $ pwd + /home/OpenOCD/openocd + $ ./bootstrap + + Jim is a tiny version of the Tcl scripting language. It is needed + by more recent versions of OpenOCD. Build libjim.a using the following + instructions: + + $ git submodule init + $ git submodule update + $ cd jimtcl + $ ./configure --with-jim-ext=nvp + $ make + $ make install + + Configure OpenOCD: + + $ ./configure --enable-maintainer-mode --disable-werror --disable-shared \ + --enable-ft2232_ftd2xx --with-ftd2xx-win32-zipdir=/home/OpenOCD/ftd2xx \ + LDFLAGS="-L/home/OpenOCD/openocd/jimtcl" + + Then build OpenOCD and its HTML documentation: + + $ make + $ make html + + The result of the first make will be the "openocd.exe" will be + created in the folder /home/openocd/src. The following command + will install OpenOCD to a standard location (/usr/local/bin) + using using this command: + + $ make install + + Helper Scripts. + + I have been using the Olimex ARM-USB-OCD JTAG debugger with the + LPC1766-STK (http://www.olimex.com). OpenOCD requires a configuration + file. I keep the one I used last here: + + configs/olimex-lpc1766stk/tools/olimex.cfg + + However, the "correct" configuration script to use with OpenOCD may + change as the features of OpenOCD evolve. So you should at least + compare that olimex.cfg file with configuration files in + /usr/local/share/openocd/scripts/target (or /home/OpenOCD/openocd/tcl/target). + As of this writing, there is no script for the lpc1766, but the + lpc1768 configurtion can be used after changing the flash size to + 256Kb. That is, change: + + flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME ... + + To: + + flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME ... + + There is also a script on the tools/ directory that I use to start + the OpenOCD daemon on my system called oocd.sh. That script will + probably require some modifications to work in another environment: + + - Possibly the value of OPENOCD_PATH and TARGET_PATH + - It assumes that the correct script to use is the one at + configs/olimex-lpc1766stk/tools/olimex.cfg + + Starting OpenOCD + + Then you should be able to start the OpenOCD daemon like: + + configs/olimex-lpc1766stk/tools/oocd.sh $PWD + + If you use the setenv.sh file, that the path to oocd.sh will be added + to your PATH environment variabl. So, in that case, the command simplifies + to just: + + oocd.sh $PWD + + Where it is assumed that you are executing oocd.sh from the top-level + directory where NuttX is installed. $PWD will be the path to the + top-level NuttX directory. + + Connecting GDB + + Once the OpenOCD daemon has been started, you can connect to it via + GDB using the following GDB command: + + arm-nuttx-elf-gdb + (gdb) target remote localhost:3333 + + NOTE: The name of your GDB program may differ. For example, with the + CodeSourcery toolchain, the ARM GDB would be called arm-none-eabi-gdb. + + After starting GDB, you can load the NuttX ELF file: + + (gdb) symbol-file nuttx + (gdb) load nuttx + + NOTES: + 1. Loading the symbol-file is only useful if you have built NuttX to + include debug symbols (by setting CONFIG_DEBUG_SYMBOLS=y in the + .config file). + 2. I usually have to reset, halt, and 'load nuttx' a second time. For + some reason, the first time apparently does not fully program the + FLASH. + 3. The MCU must be halted prior to loading code using 'mon reset' + as described below. + + OpenOCD will support several special 'monitor' commands. These + GDB commands will send comments to the OpenOCD monitor. Here + are a couple that you will need to use: + + (gdb) monitor reset + (gdb) monitor halt + + NOTES: + 1. The MCU must be halted using 'mon halt' prior to loading code. + 2. Reset will restart the processor after loading code. + 3. The 'monitor' command can be abbreviated as just 'mon'. + +Olimex LPC1766-STK Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc17xx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LPC1766=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=olimex-lpc1766stk (for the Olimex LPC1766-STK) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_LPC1766STK=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x10000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_LPC17_MAINOSC=y + CONFIG_LPC17_PLL0=y + CONFIG_LPC17_PLL1=n + CONFIG_LPC17_ETHERNET=n + CONFIG_LPC17_USBHOST=n + CONFIG_LPC17_USBOTG=n + CONFIG_LPC17_USBDEV=n + CONFIG_LPC17_UART0=y + CONFIG_LPC17_UART1=n + CONFIG_LPC17_UART2=n + CONFIG_LPC17_UART3=n + CONFIG_LPC17_CAN1=n + CONFIG_LPC17_CAN2=n + CONFIG_LPC17_SPI=n + CONFIG_LPC17_SSP0=n + CONFIG_LPC17_SSP1=n + CONFIG_LPC17_I2C0=n + CONFIG_LPC17_I2C1=n + CONFIG_LPC17_I2S=n + CONFIG_LPC17_TMR0=n + CONFIG_LPC17_TMR1=n + CONFIG_LPC17_TMR2=n + CONFIG_LPC17_TMR3=n + CONFIG_LPC17_RIT=n + CONFIG_LPC17_PWM0=n + CONFIG_LPC17_MCPWM=n + CONFIG_LPC17_QEI=n + CONFIG_LPC17_RTC=n + CONFIG_LPC17_WDT=n + CONFIG_LPC17_ADC=n + CONFIG_LPC17_DAC=n + CONFIG_LPC17_GPDMA=n + CONFIG_LPC17_FLASH=n + + LPC17xx specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + LPC17xx specific CAN device driver settings. These settings all + require CONFIG_CAN: + + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined. + CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + + LPC17xx specific PHY/Ethernet device driver settings. These setting + also require CONFIG_NET and CONFIG_LPC17_ETHERNET. + + CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY + CONFIG_PHY_AUTONEG - Enable auto-negotion + CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. + CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex + + CONFIG_NET_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb + CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 18 + CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18 + CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented). + CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs + CONFIG_DEBUG. + CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets. + Also needs CONFIG_DEBUG. + CONFIG_NET_HASH - Enable receipt of near-perfect match frames. + CONFIG_LPC17_MULTICAST - Enable receipt of multicast (and unicast) frames. + Automatically set if CONFIG_NET_IGMP is selected. + + LPC17xx USB Device Configuration + + CONFIG_LPC17_USBDEV_FRAME_INTERRUPT + Handle USB Start-Of-Frame events. + Enable reading SOF from interrupt handler vs. simply reading on demand. + Probably a bad idea... Unless there is some issue with sampling the SOF + from hardware asynchronously. + CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT + Enable high priority interrupts. I have no idea why you might want to + do that + CONFIG_LPC17_USBDEV_NDMADESCRIPTORS + Number of DMA descriptors to allocate in SRAM. + CONFIG_LPC17_USBDEV_DMA + Enable lpc17xx-specific DMA support + CONFIG_LPC17_USBDEV_NOVBUS + Define if the hardware implementation does not support the VBUS signal + CONFIG_LPC17_USBDEV_NOLED + Define if the hardware implementation does not support the LED output + + LPC17xx USB Host Configuration + CONFIG_USBHOST_OHCIRAM_SIZE + Total size of OHCI RAM (in AHB SRAM Bank 1) + CONFIG_USBHOST_NEDS + Number of endpoint descriptors + CONFIG_USBHOST_NTDS + Number of transfer descriptors + CONFIG_USBHOST_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_USBHOST_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_IOBUFSIZE + Size of one end-user I/O buffer. This can be zero if the + application can guarantee that all end-user I/O buffers + reside in AHB SRAM. + +USB Host Configuration +^^^^^^^^^^^^^^^^^^^^^^ + +The NuttShell (NSH) configuration can be modified in order to support +USB host operations. To make these modifications, do the following: + +1. First configure to build the NSH configuration from the top-level + NuttX directory: + + cd tools + ./configure olimex-lpc1766stk/nsh + cd .. + +2. Modify the top-level .config file to enable USB host using: + + make menuconfig + + Make the following changes: + + System Type -> LPC17xx Peripheral Support + CONFIG_LPC17_USBHOST=y + + Device Drivers-> USB Host Driver Support + CONFIG_USBHOST=y + CONFIG_USBHOST_ISOC_DISABLE=y + CONFIG_USBHOST_MSC=y + + Library Routines + CONFIG_SCHED_WORKQUEUE=y + +When this change is made, NSH should be extended to support USB flash +devices. When a FLASH device is inserted, you should see a device +appear in the /dev (pseudo) directory. The device name should be +like /dev/sda, /dev/sdb, etc. The USB mass storage device, is present +it can be mounted from the NSH command line like: + + ls /dev + mount -t vfat /dev/sda /mnt/flash + +Files on the connect USB flash device should then be accessible under +the mountpoint /mnt/flash. + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. Each Olimex LPC1766-STK configuration is maintained in a + sub-directory and can be selected as follow: + + cd tools + ./configure.sh olimex-lpc1766stk/ + cd - + . ./setenv.sh + + Where is one of the sub-directories identified in the following + paragraphs. + + Use configure.bat instead of configure.sh if you are building in a + Windows native environment. + + 2. These configurations use the mconf-based configuration tool. To + change a configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + +Configuration Sub-Directories +----------------------------- + + ftpc: + This is a simple FTP client shell used to exercise the capabilities + of the FTPC library (apps/netutils/ftpc). This example is configured + to that it will only work as a "built-in" program that can be run from + NSH when CONFIG_NSH_BUILTIN_APPS is defined. + + From NSH, the startup command sequence is then: + + nsh> mount -t vfat /dev/mmcsd0 /tmp # Mount the SD card at /tmp + nsh> cd /tmp # cd into the /tmp directory + nsh> ftpc xx.xx.xx.xx[:pp] # Start the FTP client + nfc> login # Log into the FTP server + nfc> help # See a list of FTP commands + + where xx.xx.xx.xx is the IP address of the FTP server and pp is an + optional port number (default is the standard FTP port number 21). + + NOTES: + + 1. Support for FAT long file names is built-in but can easily be + removed if you are concerned about Microsoft patent issues (see the + section "FAT Long File Names" in the top-level COPYING file). + + CONFIG_FS_FAT=y + CONFIG_FAT_LCNAMES=y <-- Long file name support + CONFIG_FAT_LFN=y + CONFIG_FAT_MAXFNAME=32 + CONFIG_FS_NXFFS=n + CONFIG_FS_ROMFS=n + + 2. This configuration targets Linux using a generic ARM EABI toolchain: + + CONFIG_LINUX=y + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y + + But that can easily be re-configured. + + 2. You may also want to define the following in your configuration file. + Otherwise, you will have not feedback about what is going on: + + CONFIG_DEBUG=y + CONFIG_DEBUG_VERBOSE=y + CONFIG_DEBUG_FTPC=y + + hidkbd: + This configuration directory, performs a simple test of the USB host + HID keyboard class driver using the test logic in apps/examples/hidkbd. + + NOTES: + + 1. Default platform/toolchain: This is how the build is configured by + be default. These options can easily be re-confured, however. + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + + 2. I used this configuration to test the USB hub class. I did this + testing with the following changes to the configuration: + + Drivers -> USB Host Driver Support + CONFIG_USBHOST_HUB=y : Enable the hub class + CONFIG_USBHOST_ASYNCH=y : Asynchonous I/O supported needed for hubs + + System Type -> USB host configuration + CONFIG_LPC17_USBHOST_NASYNCH=8 : Allow up to 8 asynchronous requests + CONFIG_USBHOST_NEDS=3 : Increase number of endpoint descriptors from 2 + CONFIG_USBHOST_NTDS=4 : Increase number of transfer descriptors from 3 + CONFIG_USBHOST_TDBUFFERS=4 : Increase number of transfer buffers from 3 + CONFIG_USBHOST_IOBUFSIZE=256 : Decrease the size of I/O buffers from 512 + + RTOS Features -> Work Queue Support + CONFIG_SCHED_LPWORK=y : Low priority queue support is needed + CONFIG_SCHED_LPNTHREADS=1 + CONFIG_SCHED_LPWORKSTACKSIZE=1024 + + NOTES: + + 1. It is necessary to perform work on the low-priority work queue + (vs. the high priority work queue) because deferred hub-related + work requires some delays and waiting that is not appropriate on + the high priority work queue. + + 2. I also increased some stack sizes. These values are not tuned. + When I ran into stack size issues, I just increased the size of + all threads that had smaller stacks. + + CONFIG_EXAMPLES_HIDKBD_STACKSIZE=2048 : Was 1024 + CONFIG_HIDKBD_STACKSIZE=2048 : Was 1024 + CONFIG_SCHED_HPWORKSTACKSIZE=2048 : Was 1024 (1024 is probably ok) + CONFIG_LPC1766STK_USBHOST_STACKSIZE=1536 | Was 1024 + + STATUS: + 2015-05-03: The hub basically works. The only problem that I see is + that the code does not enumerate the hub if it is + connected at the time of reset up. It does not a power-up + reset, but not with the reset button. This sounds like + a hardwares reset issue on the board to me. + + hidmouse: + This configuration directory supports a variant of an NSH configution. + It is set up to perform the touchscreen test at apps/examples/touchscreen + using a USB HIB mouse instead a touchsceen device. + + NOTES: + + 1. Default platform/toolchain: This is how the build is configured by + be default. These options can easily be re-confured, however. + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + + 2. The mouse is really useless with no display and no cursor. So this + configuration is only suited for low-level testing. It is also awkward + to use. Here are the steps: + + - Remove the USB HID mouse and reset the board. + - When the NSH prompt comes up type 'tc'. That will fail, but it + will register the USB HID mouse class driver. + - Now, insert the USB HID mouse. The next time that you enter the + 'tc' command, the mouse device at /dev/mouse0 should be found. + + nettest: + This configuration directory may be used to enable networking using the + LPC17xx's Ethernet controller. It uses apps/examples/nettest to excercise the + TCP/IP network. + + nsh: + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables both the serial and telnet NSH interfaces. + Support for the board's SPI-based MicroSD card is included. + + NOTE: If you start the program with no SD card inserted, there will be + a substantial delay. This is because there is no hardware support to sense + whether or not an SD card is inserted. As a result, the driver has to + go through many retries and timeouts before it finally decides that there + is not SD card in the slot. + + NOTES: + + 1. Uses the older, OABI, buildroot toolchain. But that is easily + reconfigured: + + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot toolchain + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : Older, OABI toolchain + + 2. This configuration supports a network. You may have to change + these settings for your network: + + CONFIG_NSH_IPADDR=0x0a000002 : IP address: 10.0.0.2 + CONFIG_NSH_DRIPADDR=0x0a000001 : Gateway: 10.0.0.1 + CONFIG_NSH_NETMASK=0xffffff00 : Netmask: 255.255.255.0 + + 3. This configuration supports the SPI-based MMC/SD card slot. + FAT file system support for FAT long file names is built-in but + can easily be removed if you are concerned about Microsoft patent + issues (see the section "FAT Long File Names" in the top-level + COPYING file). + + CONFIG_FAT_LFN=y : Enables long file name support + + nx: + An example using the NuttX graphics system (NX). This example uses + the Nokia 6100 LCD driver. + + NOTES: + + 1. The Nokia 6100 driver does not work on this board as of this writing. + + slip-httpd: + This configuration is identical to the thttpd configuration except that + it uses the SLIP data link layer via a serial driver instead of the + Ethernet data link layer. The Ethernet driver is disabled; SLIP IP + packets are exchanged on UART1; UART0 is still the serial console. + + 1. Configure and build the slip-httpd configuration. + 2. Connect to a Linux box (assuming /dev/ttyS0) + 3. Reset on the target side and attach SLIP on the Linux side: + + $ modprobe slip + $ slattach -L -p slip -s 57600 /dev/ttyS0 & + + This should create an interface with a name like sl0, or sl1, etc. + Add -d to get debug output. This will show the interface name. + + NOTE: The -L option is included to suppress use of hardware flow + control. This is necessary because I haven't figured out how to + use the UART1 hardware flow control yet. + + NOTE: The Linux slip module hard-codes its MTU size to 296. So you + might as well set CONFIG_NET_ETH_MTU to 296 as well. + + 4. After turning over the line to the SLIP driver, you must configure + the network interface. Again, you do this using the standard + ifconfig and route commands. Assume that we have connected to a + host PC with address 192.168.0.101 from your target with address + 10.0.0.2. On the Linux PC you would execute the following as root: + + $ ifconfig sl0 10.0.0.1 pointopoint 10.0.0.2 up + $ route add 10.0.0.2 dev sl0 + + Assuming the SLIP is attached to device sl0. + + 5. For monitoring/debugging traffic: + + $ tcpdump -n -nn -i sl0 -x -X -s 1500 + + NOTE: Only UART1 supports the hardware handshake. If hardware + handshake is not available, then you might try the slattach option + -L which is supposed to enable "3-wire operation." + + NOTE: This configurat only works with VERBOSE debug disabled. For some + reason, certain debug statements hang(?). + + NOTE: This example does not use UART1's hardware flow control. UART1 + hardware flow control is partially implemented but does not behave as + expected. It needs a little more work. + + thttpd-binfs: + This builds the THTTPD web server example using the THTTPD and + the apps/examples/thttpd application. This version uses the built-in + binary format with the BINFS file system and the Union File System. + Otherwise it is equivalent to thttpd-binfs. + + NOTES: + + 1. Uses the CodeSourcery EABI toolchain under Windows. But that is + easily reconfigured: + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_HOST_WINDOWS_CYGWIN=y : under Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery toolchain + + STATUS: + 2015-06-02. This configuration was added in an attempt to replace + thttpd-nxflat (see below). I concurrently get out-of-memory errors + during execution of CGI. The 32KiB SRAM may be insufficient for + this configuration; this might be fixed with some careful tuning + of stack usage. + + 2015-06-06: Modified to use the Union File System. Untested. + This configuration was ported to the lincoln60 which has an LPC1769 + and, hence, more SRAM. Additional memory reduction steps were + required to run on the LPC1769. See nuttx/configs/lincoln60/README.txt + for additional information. + + thttpd-nxflat: + This builds the THTTPD web server example using the THTTPD and + the apps/examples/thttpd application. This version uses the NXFLAT + binary format with the ROMFS file system, otherwise it is equivalent to + thttpd-binfs. + + NOTES: + + 1. Uses the newer, EABI, buildroot toolchain. But that is easily + reconfigured: + + CONFIG_HOST_LINUX=y : Linux + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot toolchain + CONFIG_ARMV7M_OABI_TOOLCHAIN=n : Newer, EABI toolchain + + STATUS: + 2015-06-02. Do to issues introduced by recent versions of GCC, NXFLAT + is not often usable. + + See http://www.nuttx.org/doku.php?id=wiki:vfs:nxflat#toolchain_compatibility_problem + + usbserial: + This configuration directory exercises the USB serial class + driver at apps/examples/usbserial. See apps/examples/README.txt for + more information. + + usbmsc: + This configuration directory exercises the USB mass storage + class driver at apps/system/usbmsc. See apps/examples/README.txt + for more information. + + zmodem: + This is an alternative NSH configuration that was used to test Zmodem + file transfers. It is similar to the standard NSH configuration but has + the following differences: + + 1. UART0 is still the NuttX serial console as with most of the other + configurations here. However, UART1 is also enabled for performing + the Zmodem transfers. + + CONFIG_LPC17XX_UART1=y + CONFIG_UART1_ISUART=y + CONFIG_UART1_RXBUFSIZE=1024 + CONFIG_UART1_TXBUFSIZE=256 + CONFIG_UART1_BAUD=2400 + CONFIG_UART1_BITS=8 + CONFIG_UART1_PARITY=0 + CONFIG_UART1_2STOP=0 + + 2. Hardware Flow Control + + In principle, Zmodem transfers could be performed on the any serial + device, including the console device. However, only the LPC17xx + UART1 supports hardware flow control which is required for Zmodem + trasnfers. Also, this configuration permits debug output on the + serial console while the transfer is in progress without interfering + with the file transfer. + + In additional, a very low BAUD is selected to avoid other sources + of data overrun. This should be unnecessary if buffering and hardware + flow control are set up correctly. + + However, in the LPC17xx serial driver, hardware flow control only + protects the hardware RX FIFO: Data will not be lost in the hardware + FIFO but can still be lost when it is taken from the FIFO. We can + still overflow the serial driver's RX buffer even with hardware flow + control enabled! That is probably a bug. But the workaround solution + that I have used is to use lower data rates and a large serial driver + RX buffer. + + Those measures should be unnecessary if buffering and hardware flow + control are set up and working correctly. + + 3. Buffering Notes: + + RX Buffer Size + -------------- + The Zmodem protocol supports a message that informs the file sender + of the maximum size of dat that you can buffer (ZRINIT). However, my + experience is that the Linux sz ignores this setting and always sends + file data at the maximum size (1024) no matter what size of buffer you + report. That is unfortunate because that, combined with the + possibilities of data overrun mean that you must use quite large + buffering for Zmodem file receipt to be reliable (none of these issues + effect sending of files). + + Buffer Recommendations + ---------------------- + Based on the limitations of NuttX hardware flow control and of the + Linux sz behavior, I have been testing with the following configuration + (assuming UART1 is the Zmodem device): + + a) This setting determines that maximum size of a data packet frame: + + CONFIG_SYSTEM_ZMODEM_PKTBUFSIZE=1024 + + b) Input Buffering. If the input buffering is set to a full frame, + then data overflow is less likely. + + CONFIG_UART1_RXBUFSIZE=1024 + + c) With a larger driver input buffer, the Zmodem receive I/O buffer + can be smaller: + + CONFIG_SYSTEM_ZMODEM_RCVBUFSIZE=256 + + d) Output buffering. Overrun cannot occur on output (on the NuttX side) + so there is no need to be so careful: + + CONFIG_SYSTEM_ZMODEM_SNDBUFSIZE=512 + CONFIG_UART1_TXBUFSIZE=256 + + 4. Support is included for the NuttX sz and rz commands. In order to + use these commands, you will need to mount the SD card so that you + will have a file system to transfer files in and out of: + + nsh> mount -t vfat /dev/mmcds0 /mnt/sdcard + + NOTE: You must use the mountpoint /mnt/sdcard because that is the + Zmodem sandbox specified in the configuration: All files received + from the remote host will be stored at /mnt/sdcard because of: + + CONFIG_SYSTEM_ZMODEM_MOUNTPOINT="/mnt/sdcard" + + Hmmm.. I probably should set up an NSH script to just mount /dev/mmcsd0 + at /mnt/sdcard each time the board boots. + + 4. Sending Files from the Target to the Linux Host PC + + This program has been verified against the rzsz programs running on a + Linux PC. To send a file to the PC, first make sure that the serial + port is configured to work with the board: + + $ sudo stty -F /dev/ttyS0 2400 # Select 2400 BAUD + $ sudo stty -F /dev/ttyS0 crtscts # Enables CTS/RTS handshaking * + $ sudo stty -F /dev/ttyS0 # Show the TTY configuration + + * Only is hardware flow control is enabled. It is *not* in this + default configuration. + + Start rz on the Linux host: + + $ sudo rz /dev/ttyS0 + + You can add the rz -v option multiple times, each increases the level + of debug output. + + NOTE: The NuttX Zmodem does sends rz\n when it starts in compliance with + the Zmodem specification. On Linux this, however, seems to start some + other, incompatible version of rz. You need to start rz manually to + make sure that the correct version is selected. You can tell when this + evil rz/sz has inserted itself because you will see the '^' (0x5e) + character replacing the standard Zmodem ZDLE character (0x19) in the + binary data stream. + + If you don't have the rz command on your Linux box, the package to + install rzsz (or possibily lrzsz). + + Then on the target: + + > sz -d /dev/ttyS1 + + Where filename is the full path to the file to send (i.e., it begins + with the '/' character). + + /dev/ttyS1 is configured to support Hardware flow control in order to + throttle therates of data transfer to fit within the allocated buffers. + Other devices may be used but if they do not support hardware flow + control, the transfers will fail + + 5. Receiving Files on the Target from the Linux Host PC + + NOTE: There are issues with using the Linux sz command with the NuttX + rz command. See "STATUS" below. It is recommended that you use the + NuttX sz command on Linux as described in the next paragraph. + + To send a file to the target, first make sure that the serial port on + the host is configured to work with the board: + + $ sudo stty -F /dev/ttyS0 2400 # Select 2400 BAUD + $ sudo stty -F /dev/ttyS0 crtscts # Enables CTS/RTS handshaking * + $ sudo stty -F /dev/ttyS0 # Show the TTY configuration + + * Only is hardware flow control is enabled. It is *not* in this + default configuration. + + Start rz on the on the target: + + nsh> rz -d /dev/ttyS1 + + /dev/ttyS1 is configured to support Hardware flow control in order to + throttle therates of data transfer to fit within the allocated buffers. + Other devices may be used but if they do not support hardware flow + control, the transfers will fail + + Then use the sz command on Linux to send the file to the target: + + $ sudo sz t /dev/ttyS0 + + Where is the file that you want to send. + + The resulting file will be found where you have configured the Zmodem + "sandbox" via CONFIG_SYSTEM_ZMODEM_MOUNTPOINT, in this case at + /mnt/sdcard. + + You can add the az -v option multiple times, each increases the level + of debug output. If you want to capture the Linux rz output, then + re-direct stderr to a log file by adding 2>az.log to the end of the + rz command. + + If you don't have the az command on your Linux box, the package to + install rzsz (or possibily lrzsz). + + STATUS + 2013-7-15: Testing against the Linux rz/sz commands. + + I have been able to send large and small files with the target sz + command. I have been able to receive small files, but there are + problems receiving large files using the Linux sz command: The + Linux SZ does not obey the buffering limits and continues to send + data while rz is writing the previously received data to the file + and the serial driver's RX buffer is overrun by a few bytes while + the write is in progress. As a result, when it reads the next + buffer of data, a few bytes may be missing. The symptom of this + missing data is a CRC check failure. + + Either (1) we need a more courteous host application, or (2) we + need to greatly improve the target side buffering capability! + + We might get better behavior if we use the NuttX rz/sz commands + on the host side (see apps/system/zmodem/README.txt). + + 2013-7-16: More Testing against the Linux rz/sz commands. + + I have verified that with debug off and at lower serial + BAUD (2400), the transfers of large files succeed without errors. I + do not consider this a "solution" to the problem. I also found that + the LPC17xx hardware flow control causes strange hangs; Zmodem works + much better with hardware flow control disabled. + + At this lower BAUD, RX buffer sizes could probably be reduced; Or + perhaps the BAUD coud be increased. My thought, however, is that + tuning in such an unhealthy situation is not the approach: The + best thing to do would be to use the matching NuttX sz on the Linux + host side. + + 2013-7-16. More Testing against the NuttX rz/sz on Both Ends. + + The NuttX sz/rz commands have been modified so that they can be + built and executed under Linux. In this case, there are no + transfer problems at all in either direction and with large or + small files. This configuration could probably run at much higher + serial speeds and with much smaller buffers (although that has not + been verified as of this writing). diff --git a/configs/olimex-lpc1766stk/ftpc/Make.defs b/configs/olimex-lpc1766stk/ftpc/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..b2b6be78a57519dca269c3c989a7ef81e1a8413a --- /dev/null +++ b/configs/olimex-lpc1766stk/ftpc/Make.defs @@ -0,0 +1,114 @@ +############################################################################ +# configs/olimex-lpc1766stk/ftpc/Make.defs +# +# Copyright (C) 2011, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimex-lpc1766stk/ftpc/defconfig b/configs/olimex-lpc1766stk/ftpc/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..bcad3a75a0f29b9cf79ae1fb1883362863eba283 --- /dev/null +++ b/configs/olimex-lpc1766stk/ftpc/defconfig @@ -0,0 +1,1033 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +CONFIG_ARCH_CHIP_LPC1766=y +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +CONFIG_LPC17_SSP1=y +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=8512 +CONFIG_NET_NTXDESC=7 +CONFIG_NET_NRXDESC=7 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8111 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC1766STK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-lpc1766stk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=2 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=12 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +CONFIG_ETH0_PHY_KS8721=y +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=550 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +CONFIG_NXFLAT=y +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +CONFIG_PIC=y +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +CONFIG_NETUTILS_FTPC=y +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +CONFIG_LIBC_NETDB=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/ftpc/setenv.sh b/configs/olimex-lpc1766stk/ftpc/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..5e21d73dc066c3c4d4884ed58c9daf7b89fdffb5 --- /dev/null +++ b/configs/olimex-lpc1766stk/ftpc/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/olimex-lpc1766stk/ftpc/setenv.sh +# +# Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The Olimex-lpc1766stk/tools directory +export LPCTOOL_DIR="${WD}/configs/olimex-lpc1766stk/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-lpc1766stk/hidkbd/Make.defs b/configs/olimex-lpc1766stk/hidkbd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e86130ce63a4f6bbe11641c6298dd492e8666ebc --- /dev/null +++ b/configs/olimex-lpc1766stk/hidkbd/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/olimex-lpc1766stk/hidkbd/Make.defs +# +# Copyright (C) 2011, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimex-lpc1766stk/hidkbd/defconfig b/configs/olimex-lpc1766stk/hidkbd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..57ff6174b35b97e5fe3de7b1de88e52d74590e71 --- /dev/null +++ b/configs/olimex-lpc1766stk/hidkbd/defconfig @@ -0,0 +1,780 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +CONFIG_ARCH_CHIP_LPC1766=y +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +# CONFIG_LPC17_PLL1 is not set +# CONFIG_LPC17_ETHERNET is not set +CONFIG_LPC17_USBHOST=y +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# USB host driver options +# +CONFIG_USBHOST_OHCIRAM_SIZE=1536 +CONFIG_USBHOST_NEDS=2 +CONFIG_USBHOST_NTDS=3 +CONFIG_USBHOST_TDBUFFERS=3 +CONFIG_USBHOST_TDBUFSIZE=128 +CONFIG_USBHOST_IOBUFSIZE=512 +CONFIG_USBHOST_BULK_DISABLE=y +# CONFIG_USBHOST_INT_DISABLE is not set +CONFIG_USBHOST_ISOC_DISABLE=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8111 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC1766STK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-lpc1766stk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="hidkbd_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +# CONFIG_INPUT_MXT is not set +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +CONFIG_USBHOST=y +CONFIG_USBHOST_NPREALLOC=0 +CONFIG_USBHOST_HAVE_ASYNCH=y +# CONFIG_USBHOST_ASYNCH is not set +# CONFIG_USBHOST_HUB is not set +# CONFIG_USBHOST_MSC is not set +CONFIG_USBHOST_HIDKBD=y +CONFIG_HIDKBD_POLLUSEC=100000 +CONFIG_HIDKBD_DEFPRIO=50 +CONFIG_HIDKBD_STACKSIZE=1024 +CONFIG_HIDKBD_BUFSIZE=64 +CONFIG_HIDKBD_NPOLLWAITERS=2 +# CONFIG_HIDKBD_RAWSCANCODES is not set +CONFIG_HIDKBD_ENCODED=y +# CONFIG_HIDKBD_ALLSCANCODES is not set +# CONFIG_HIDKBD_NODEBOUNCE is not set +# CONFIG_USBHOST_HIDMOUSE is not set +# CONFIG_USBHOST_TRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +CONFIG_LIB_KBDCODEC=y +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +CONFIG_EXAMPLES_HIDKBD=y +CONFIG_EXAMPLES_HIDKBD_DEFPRIO=50 +CONFIG_EXAMPLES_HIDKBD_STACKSIZE=1024 +CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda" +CONFIG_EXAMPLES_HIDKBD_ENCODED=y +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/hidkbd/setenv.sh b/configs/olimex-lpc1766stk/hidkbd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..7ebb4ddee2f110be13a731bf77b10182563b7b83 --- /dev/null +++ b/configs/olimex-lpc1766stk/hidkbd/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/olimex-lpc1766stk/hidkbd/setenv.sh +# +# Copyright (C) 2011, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The Olimex-lpc1766stk/tools directory +export LPCTOOL_DIR="${WD}/configs/olimex-lpc1766stk/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-lpc1766stk/hidmouse/Make.defs b/configs/olimex-lpc1766stk/hidmouse/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6ff8eda3fa21d15a7e0770ba6a272997c0925a44 --- /dev/null +++ b/configs/olimex-lpc1766stk/hidmouse/Make.defs @@ -0,0 +1,109 @@ +############################################################################ +# configs/olimex-lpc1766stk/hidmouse/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/olimex-lpc1766stk/hidmouse/defconfig b/configs/olimex-lpc1766stk/hidmouse/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..9128e7a1bae169a7d7617ea0cddd961e2cd206dd --- /dev/null +++ b/configs/olimex-lpc1766stk/hidmouse/defconfig @@ -0,0 +1,1079 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +CONFIG_ARCH_CHIP_LPC1766=y +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_ETHERNET is not set +CONFIG_LPC17_USBHOST=y +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# +# CONFIG_LPC17_MULTICAST is not set + +# +# USB host driver options +# +CONFIG_USBHOST_OHCIRAM_SIZE=16384 +CONFIG_USBHOST_NEDS=2 +CONFIG_USBHOST_NTDS=3 +CONFIG_USBHOST_TDBUFFERS=2 +CONFIG_USBHOST_TDBUFSIZE=128 +CONFIG_USBHOST_IOBUFSIZE=512 +CONFIG_LPC17_USBHOST_NPREALLOC=4 +# CONFIG_USBHOST_BULK_DISABLE is not set +# CONFIG_USBHOST_INT_DISABLE is not set +CONFIG_USBHOST_ISOC_DISABLE=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8111 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC1766STK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-lpc1766stk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LPC1766STK_USBHOST_STACKSIZE=1024 +CONFIG_LPC1766STK_USBHOST_PRIO=100 +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_TSCTEST=y +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +CONFIG_MOUSE=y +# CONFIG_MOUSE_WHEEL is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +# CONFIG_INPUT_MXT is not set +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_NETDEVICES is not set +CONFIG_NETDEV_TELNET=y +# CONFIG_NET_SLIP is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +CONFIG_USBHOST=y +CONFIG_USBHOST_NPREALLOC=4 +CONFIG_USBHOST_HAVE_ASYNCH=y +# CONFIG_USBHOST_ASYNCH is not set +# CONFIG_USBHOST_HUB is not set +# CONFIG_USBHOST_MSC is not set +# CONFIG_USBHOST_CDCACM is not set +# CONFIG_USBHOST_HIDKBD is not set +CONFIG_USBHOST_HIDMOUSE=y +# CONFIG_HIDMOUSE_TSCIF is not set +CONFIG_HIDMOUSE_DEFPRIO=50 +CONFIG_HIDMOUSE_STACKSIZE=1024 +CONFIG_HIDMOUSE_BUFSIZE=64 +# CONFIG_HIDMOUSE_SWAPXY is not set +CONFIG_HIDMOUSE_XMAX=320 +CONFIG_HIDMOUSE_YMAX=240 +CONFIG_HIDMOUSE_XSCALE=0x00010000 +CONFIG_HIDMOUSE_YSCALE=0x00010000 +CONFIG_HIDMOUSE_XTHRESH=12 +CONFIG_HIDMOUSE_THRESHY=12 +# CONFIG_USBHOST_RTL8187 is not set +# CONFIG_USBHOST_TRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +CONFIG_NET_TCP_SPLIT=y +CONFIG_NET_TCP_SPLIT_SIZE=40 +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +CONFIG_NXFLAT=y +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +CONFIG_PIC=y +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +CONFIG_EXAMPLES_TOUCHSCREEN=y +CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0 +CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/mouse0" +CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE=y +CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +CONFIG_NETUTILS_DHCPC=y +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# +# CONFIG_NSH_DHCPC is not set + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/hidmouse/setenv.sh b/configs/olimex-lpc1766stk/hidmouse/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..bb617ff32d5a7658dae2096cde969eb9d6acd244 --- /dev/null +++ b/configs/olimex-lpc1766stk/hidmouse/setenv.sh @@ -0,0 +1,67 @@ +#!/bin/bash +# configs/olimex-lpc1766stk/hidmouse/setenv.sh +# +# Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The Olimex-lpc1766stk/tools directory +export LPCTOOL_DIR="${WD}/configs/olimex-lpc1766stk/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-lpc1766stk/include/board.h b/configs/olimex-lpc1766stk/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..c522b051dfc8dcda3a8288aa44e3fddd4a67f6eb --- /dev/null +++ b/configs/olimex-lpc1766stk/include/board.h @@ -0,0 +1,391 @@ +/************************************************************************************ + * configs/olimex-lpc1766stk/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2010-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Clocking *************************************************************************/ +/* NOTE: The following definitions require lpc17_syscon.h. It is not included here + * because the including C file may not have that file in its include path. + */ + +#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency */ +#define BOARD_OSCCLK_FREQUENCY BOARD_XTAL_FREQUENCY /* Main oscillator frequency */ +#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency */ +#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */ + +/* This is the clock setup we configure for: + * + * SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1 + * CCLCK = 480MHz / 6 = 80MHz -> CCLK divider = 6 + */ + +#define LPC17_CCLK 80000000 /* 80Mhz */ + +/* Select the main oscillator as the frequency source. SYSCLK is then the frequency + * of the main oscillator. + */ + +#undef CONFIG_LPC17_MAINOSC +#define CONFIG_LPC17_MAINOSC 1 +#define BOARD_SCS_VALUE SYSCON_SCS_OSCEN + +/* Select the main oscillator and CCLK divider. The output of the divider is CCLK. + * The input to the divider (PLLCLK) will be determined by the PLL output. + */ + +#define BOARD_CCLKCFG_DIVIDER 6 +#define BOARD_CCLKCFG_VALUE ((BOARD_CCLKCFG_DIVIDER-1) << SYSCON_CCLKCFG_SHIFT) + +/* PLL0. PLL0 is used to generate the CPU clock divider input (PLLCLK). + * + * Source clock: Main oscillator + * PLL0 Multiplier value (M): 20 + * PLL0 Pre-divider value (N): 1 + * + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz + */ + +#undef CONFIG_LPC17_PLL0 +#define CONFIG_LPC17_PLL0 1 +#define BOARD_CLKSRCSEL_VALUE SYSCON_CLKSRCSEL_MAIN + +#define BOARD_PLL0CFG_MSEL 20 +#define BOARD_PLL0CFG_NSEL 1 +#define BOARD_PLL0CFG_VALUE \ + (((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLL0CFG_MSEL_SHIFT) | \ + ((BOARD_PLL0CFG_NSEL-1) << SYSCON_PLL0CFG_NSEL_SHIFT)) + +/* PLL1 -- Not used. */ + +#undef CONFIG_LPC17_PLL1 +#define BOARD_PLL1CFG_MSEL 36 +#define BOARD_PLL1CFG_NSEL 1 +#define BOARD_PLL1CFG_VALUE \ + (((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLL1CFG_MSEL_SHIFT) | \ + ((BOARD_PLL1CFG_NSEL-1) << SYSCON_PLL1CFG_NSEL_SHIFT)) + +/* USB divider. This divider is used when PLL1 is not enabled to get the + * USB clock from PLL0: + * + * USBCLK = PLL0CLK / 10 = 48MHz + */ + +#define BOARD_USBCLKCFG_VALUE SYSCON_USBCLKCFG_DIV10 + +/* FLASH Configuration */ + +#undef CONFIG_LPC17_FLASH +#define CONFIG_LPC17_FLASH 1 +#define BOARD_FLASHCFG_VALUE 0x0000303a + +/* Ethernet configuration */ + +//#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV44 +#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV20 + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + * any way. The following definitions are used to access individual LEDs. + * + * LED1 -- Connected to P1[25] + * LED2 -- Connected to P0[4] + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_NLEDS 2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 3 LEDs + * on board the Olimex LPC1766-STK. The following definitions + * describe how NuttX controls the LEDs: + */ + /* LED1 LED2 */ +#define LED_STARTED 0 /* OFF OFF = Still initializing */ +#define LED_HEAPALLOCATE 0 /* OFF OFF = Still initializing */ +#define LED_IRQSENABLED 0 /* OFF OFF = Still initializing */ +#define LED_STACKCREATED 1 /* ON OFF = Initialization complete */ +#define LED_INIRQ 2 /* N/C ON = In an interrupt handler */ +#define LED_SIGNAL 2 /* N/C ON = In a signal handler (glowing) */ +#define LED_ASSERTION 2 /* N/C ON = In an assertion */ +#define LED_PANIC 2 /* N/C ON = Oops! We crashed. (flashing) */ +#define LED_IDLE 3 /* OFF N/C = LPC17 in sleep mode (LED1 glowing) */ + +/* Button definitions ***************************************************************/ +/* The LPC1766-STK supports several buttons. All will read "1" when open and "0" + * when closed + * + * BUT1 -- Connected to P0[23] + * BUT2 -- Connected to P2[13] + * WAKE-UP -- Connected to P2[12] + * + * And a Joystick + * + * CENTER -- Connected to P0[4] + * DOWN -- Connected to P2[1] + * LEFT -- Connected to P2[7] + * RIGHT -- Connected to P2[8] + * UP -- Connected to P2[0] + */ + +#define BOARD_BUTTON_1 0 +#define BOARD_BUTTON_2 1 +#define BOARD_BUTTON_WAKEUP 2 + +#define BOARD_JOYSTICK_CENTER 3 +#define BOARD_JOYSTICK_UP 4 +#define BOARD_JOYSTICK_DOWN 5 +#define BOARD_JOYSTICK_LEFT 6 +#define BOARD_JOYSTICK_RIGHT 7 + +#define BOARD_NUM_BUTTONS 8 + +#define BOARD_BUTTON_BUTTON1_BIT (1 << BOARD_BUTTON_1) +#define BOARD_BUTTON_BUTTON2_BIT (1 << BOARD_BUTTON_2) +#define BOARD_BUTTON_WAKEUP_BIT (1 << BOARD_BUTTON_WAKEUP) + +#define BOARD_JOYSTICK_CENTER_BIT (1 << BOARD_JOYSTICK_CENTER) +#define BOARD_JOYSTICK_UP_BIT (1 << BOARD_JOYSTICK_UP) +#define BOARD_JOYSTICK_DOWN_BIT (1 << BOARD_JOYSTICK_DOWN) +#define BOARD_JOYSTICK_LEFT_BIT (1 << BOARD_JOYSTICK_LEFT) +#define BOARD_JOYSTICK_RIGHT_BIT (1 << BOARD_JOYSTICK_RIGHT) + +/* Alternate pin selections *********************************************************/ + +/* CAN1 GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P0[0]/RD1/TXD3/SDA1 46 RD1 + * P0[1]/TD1/RXD3/SCL1 47 TD1 + */ + +#define GPIO_CAN1_RD GPIO_CAN1_RD_1 +#define GPIO_CAN1_TD GPIO_CAN1_TD_1 + +/* UART0 GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P0[2]/TXD0/AD0[7] 98 TXD0 + * P0[3]/RXD0/AD0[6] 99 RXD0 + */ + +/* UART1 GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P0[15]/TXD1/SCK0/SCK 62 TXD1 + * P0[16]/RXD1/SSEL0/SSEL 63 RXD1 + * P0[17]/CTS1/MISO0/MISO 61 CTS1 + * P0[18]/DCD1/MOSI0/MOSI 60 DCD1 + * P0[19]/DSR1/SDA1 59 DSR1 + * P0[20]/DTR1/SCL1 58 DTR1 + * P0[22]/RTS1/TD1 56 RTS1 + */ + +#define GPIO_UART1_TXD GPIO_UART1_TXD_1 +#define GPIO_UART1_RXD GPIO_UART1_RXD_1 +#define GPIO_UART1_CTS GPIO_UART1_CTS_1 +#define GPIO_UART1_DCD GPIO_UART1_DCD_1 +#define GPIO_UART1_DSR GPIO_UART1_DSR_1 +#define GPIO_UART1_DTR GPIO_UART1_DTR_1 +#define GPIO_UART1_RTS GPIO_UART1_RTS_1 + +/* SSP0 GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P1[21]/MCABORT/PWM1[3]/SSEL0 35 SSEL0 + * P1[20]/MCFB0/PWM1[2]/SCK0 34 SCK0 + * P1[23]/MCFB1/PWM1[4]/MISO0 37 MISO0 + * P1[24]/MCFB2/PWM1[5]/MOSI0 38 MOSI0 + */ + +#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_2 +#define GPIO_SSP0_SCK GPIO_SSP0_SCK_2 +#define GPIO_SSP0_MISO GPIO_SSP0_MISO_2 +#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_2 + +/* SSP1 GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P0[6]/I2SRX_SDA/SSEL1/MAT2[0] 79 SSEL1 + * P0[7]/I2STX_CLK/SCK1/MAT2[1] 78 SCK1 + * P0[8]/I2STX_WS/MISO1/MAT2[2] 77 MISO1 + * P0[9]/I2STX_SDA/MOSI1/MAT2[3] 76 MOSI1 + */ + +#define GPIO_SSP1_SCK GPIO_SSP1_SCK_1 + +/* I2C2 GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P0[10]/TXD2/SDA2/MAT3[0] 48 SDA2 + * P0[11]/RXD2/SCL2/MAT3[1] 49 SCL2 + */ + +/* AD GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P0[24]/AD0[1]/I2SRX_WS/CAP3[1] 8 TEMP + * P0[25]/AD0[2]/I2SRX_SDA/TXD3 7 MIC IN + +/* USB GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P0[27]/SDA0/USB_SDA 25 USB_SDA + * P0[28]/SCL0/USB_SCL 24 USB_SCL + * P0[29]/USB_D+ 29 USB_D+ + * P0[30]/USB_D- 30 USB_D- + * P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] 32 USB_UP_LED + * P1[19]/MC0A/#USB_PPWR/CAP1[1] 33 #USB_PPWR + * P1[22]/MC0B/USB_PWRD/MAT1[0] 36 USBH_PWRD + * P1[27]/CLKOUT/#USB_OVRCR/CAP0[1] 43 #USB_OVRCR + * P1[30]/VBUS/AD0[4] 21 VBUS + * P2[9]/USB_CONNECT/RXD2 64 USBD_CONNECT + */ + +#ifdef GPIO_USB_PPWR /* We can only redefine this if they have been defined */ + +/* The Olimex LPC1766-STK has 10K pull-ups on PPWR and OVRCR and a 100k + * pull-down on PWRD so we should make sure that the outputs float. + */ + +# undef GPIO_USB_PPWR +# define GPIO_USB_PPWR (GPIO_ALT2 | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN19) +# undef GPIO_USB_OVRCR +# define GPIO_USB_OVRCR (GPIO_ALT2 | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN27) +# undef GPIO_USB_PWRD +# define GPIO_USB_PWRD (GPIO_ALT2 | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN22) + +/* In host mode (only) there are also 15K pull-downs on D+ and D- */ + +# ifdef CONFIG_USBHOST +# undef GPIO_USB_DP +# define GPIO_USB_DP (GPIO_ALT1 | GPIO_FLOAT | GPIO_PORT0 | GPIO_PIN29) +# undef GPIO_USB_DM +# define GPIO_USB_DM (GPIO_ALT1 | GPIO_FLOAT | GPIO_PORT0 | GPIO_PIN30) +# endif +#endif + +/* Ethernet GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P1[0]/ENET_TXD0 95 E_TXD0 + * P1[1]/ENET_TXD1 94 E_TXD1 + * P1[4]/ENET_TX_EN 93 E_TX_EN + * P1[8]/ENET_CRS 92 E_CRS + * P1[9]/ENET_RXD0 91 E_RXD0 + * P1[10]/ENET_RXD1 90 E_RXD1 + * P1[14]/ENET_RX_ER 89 E_RX_ER + * P1[15]/ENET_REF_CLK 88 E_REF_CLK + * P1[16]/ENET_MDC 87 E_MDC + * P1[17]/ENET_MDIO 86 E_MDIO + */ + +#define GPIO_ENET_MDC GPIO_ENET_MDC_1 +#define GPIO_ENET_MDIO GPIO_ENET_MDIO_1 + +/* Trace GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P2[2]/PWM1[3]/CTS1/TRACEDATA[3] 73 TRACE_D3 + * P2[3]/PWM1[4]/DCD1/TRACEDATA[2] 70 TRACE_D2 + * P2[4]/PWM1[5]/DSR1/TRACEDATA[1] 69 TRACE_D1 + * P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 68 TRACE_D0 + * P2[6]/PCAP1[0]/RI1/TRACECLK 67 TRACE_CLK + */ + +/* EINT GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P2[11]/#EINT1/I2STX_CLK 52 #EINT1 + */ + +/* ? + * P0[26]/AD0[3]/AOUT/RXD3 6 AOUT + * P1[31]/SCK1/AD0[5] 20 AIN5 + */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/olimex-lpc1766stk/nettest/Make.defs b/configs/olimex-lpc1766stk/nettest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..04883513dd2eae176d02cd5a31d2b0322c4cc8ef --- /dev/null +++ b/configs/olimex-lpc1766stk/nettest/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/olimex-lpc1766stk/nettest/Make.defs +# +# Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimex-lpc1766stk/nettest/defconfig b/configs/olimex-lpc1766stk/nettest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..9913ba909f7061367e29c70526d38a72834642f3 --- /dev/null +++ b/configs/olimex-lpc1766stk/nettest/defconfig @@ -0,0 +1,869 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +CONFIG_ARCH_CHIP_LPC1766=y +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=7296 +CONFIG_NET_NTXDESC=6 +CONFIG_NET_NRXDESC=6 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8111 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC1766STK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-lpc1766stk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nettest_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGWORK=17 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +CONFIG_ETH0_PHY_KS8721=y +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_NETTEST=y +# CONFIG_EXAMPLES_NETTEST_SERVER is not set +# CONFIG_EXAMPLES_NETTEST_PERFORMANCE is not set +CONFIG_EXAMPLES_NETTEST_IPv4=y +CONFIG_EXAMPLES_NETTEST_INIT=y +CONFIG_EXAMPLES_NETTEST_NOMAC=y + +# +# IPv4 addresses +# +CONFIG_EXAMPLES_NETTEST_IPADDR=0x0a000002 +CONFIG_EXAMPLES_NETTEST_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_NETTEST_NETMASK=0xffffff00 +CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/nettest/setenv.sh b/configs/olimex-lpc1766stk/nettest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..06d4574f1651af8f986c81126e8e80a781a914f4 --- /dev/null +++ b/configs/olimex-lpc1766stk/nettest/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/olimex-lpc1766stk/nettest/setenv.sh +# +# Copyright (C) 2010, 2014-2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The Olimex-lpc1766stk/tools directory +export LPCTOOL_DIR="${WD}/configs/olimex-lpc1766stk/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-lpc1766stk/nsh/Make.defs b/configs/olimex-lpc1766stk/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6e49ebc92038795826088228ba3f7bab086ae5f9 --- /dev/null +++ b/configs/olimex-lpc1766stk/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/olimex-lpc1766stk/nsh/Make.defs +# +# Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimex-lpc1766stk/nsh/defconfig b/configs/olimex-lpc1766stk/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..402f58514692d7ff8d01b00ecf0fe38c72c98f1c --- /dev/null +++ b/configs/olimex-lpc1766stk/nsh/defconfig @@ -0,0 +1,1128 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +CONFIG_ARCH_CHIP_LPC1766=y +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +CONFIG_LPC17_SSP1=y +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=7296 +CONFIG_NET_NTXDESC=6 +CONFIG_NET_NRXDESC=6 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8111 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC1766STK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-lpc1766stk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=1 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +CONFIG_ETH0_PHY_KS8721=y +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +CONFIG_NET_TCP_SPLIT=y +CONFIG_NET_TCP_SPLIT_SIZE=40 +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +CONFIG_NXFLAT=y +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +CONFIG_PIC=y +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +CONFIG_NETUTILS_DHCPC=y +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# +# CONFIG_NSH_DHCPC is not set + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/nsh/setenv.sh b/configs/olimex-lpc1766stk/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..4d5efee2baf3c5e90de3357b6ce2d5ca88a5d037 --- /dev/null +++ b/configs/olimex-lpc1766stk/nsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/olimex-lpc1766stk/nsh/setenv.sh +# +# Copyright (C) 2010, 2014-2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The Olimex-lpc1766stk/tools directory +export LPCTOOL_DIR="${WD}/configs/olimex-lpc1766stk/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-lpc1766stk/nx/Make.defs b/configs/olimex-lpc1766stk/nx/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..82c1d916f594bec51485f2eda528839c661bd0f2 --- /dev/null +++ b/configs/olimex-lpc1766stk/nx/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/olimex-lpc1766stk/nx/Make.defs +# +# Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimex-lpc1766stk/nx/defconfig b/configs/olimex-lpc1766stk/nx/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..cefbb19eb2361f10f61a0c5ab604a8577ddd0c8b --- /dev/null +++ b/configs/olimex-lpc1766stk/nx/defconfig @@ -0,0 +1,870 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +CONFIG_ARCH_CHIP_LPC1766=y +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_ETHERNET is not set +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +CONFIG_LPC17_SSP0=y +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8111 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC1766STK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-lpc1766stk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +CONFIG_BOARDCTL_GRAPHICS=y +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=5 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nx_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=12 +CONFIG_NFILE_STREAMS=12 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=127 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +CONFIG_LCD_NOKIA6100=y +CONFIG_NOKIA6100_NINTERFACES=1 +CONFIG_NOKIA6100_S1D15G10=y +# CONFIG_NOKIA6100_PCF8833 is not set +CONFIG_NOKIA6100_SPIMODE=0 +CONFIG_NOKIA6100_FREQUENCY=1000000 +CONFIG_NOKIA6100_BPP=8 +CONFIG_NOKIA6100_BLINIT=40 +CONFIG_NOKIA6100_INVERT=1 +CONFIG_NOKIA6100_MY=0 +CONFIG_NOKIA6100_MX=1 +CONFIG_NOKIA6100_V=0 +CONFIG_NOKIA6100_ML=0 +CONFIG_NOKIA6100_RGBORD=0 +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +# CONFIG_NX_DISABLE_8BPP is not set +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=6 +CONFIG_NXTK_BORDERCOLOR2=4 +CONFIG_NXTK_BORDERCOLOR3=8 +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +# CONFIG_EXAMPLES_NX_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NX_BGCOLOR=0x02 +CONFIG_EXAMPLES_NX_COLOR1=0xdf +CONFIG_EXAMPLES_NX_COLOR2=0xbe +CONFIG_EXAMPLES_NX_TBCOLOR=0x92 +CONFIG_EXAMPLES_NX_FONTCOLOR=0x00 +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=8 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +CONFIG_EXAMPLES_NX_EXTERNINIT=y +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/nx/setenv.sh b/configs/olimex-lpc1766stk/nx/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..d81126637059e066e68ed03ccff5f229de0ab125 --- /dev/null +++ b/configs/olimex-lpc1766stk/nx/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/olimex-lpc1766stk/nx/setenv.sh +# +# Copyright (C) 2010, 2014-2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The Olimex-lpc1766stk/tools directory +export LPCTOOL_DIR="${WD}/configs/olimex-lpc1766stk/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-lpc1766stk/scripts/ld.script b/configs/olimex-lpc1766stk/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..51615624e11a5c134a086c5be8cddebe90076cf0 --- /dev/null +++ b/configs/olimex-lpc1766stk/scripts/ld.script @@ -0,0 +1,117 @@ +/**************************************************************************** + * configs/olimex-lpc1766stk/scripts/ld.script + * + * Copyright (C) 2010-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LPC1766 has 256Kb of FLASH beginning at address 0x0000:0000 and + * 64Kb of total SRAM: 32Kb of SRAM in the CPU block beginning at address + * 0x10000000 and 32Kb of AHB SRAM in two banks of 16Kb beginning at addresses + * 0x20070000 and 0x20080000. Here we assume that .data and .bss will all fit + * into the 32Kb CPU SRAM address range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/olimex-lpc1766stk/slip-httpd/Make.defs b/configs/olimex-lpc1766stk/slip-httpd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..8f67068995c418899a300e9941a590f448f7ef82 --- /dev/null +++ b/configs/olimex-lpc1766stk/slip-httpd/Make.defs @@ -0,0 +1,114 @@ +############################################################################ +# configs/olimex-lpc1766stk/slip-httpd/Make.defs +# +# Copyright (C) 2011, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimex-lpc1766stk/slip-httpd/defconfig b/configs/olimex-lpc1766stk/slip-httpd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..9b7dacd49d6941444076f4dda989be451368d4a8 --- /dev/null +++ b/configs/olimex-lpc1766stk/slip-httpd/defconfig @@ -0,0 +1,868 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +CONFIG_ARCH_CHIP_LPC1766=y +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_ETHERNET is not set +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +CONFIG_LPC17_UART1=y +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# +# CONFIG_UART1_RINGINDICATOR is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8111 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC1766STK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-lpc1766stk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=23 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="thttp_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=8192 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_NETDEVICES is not set +CONFIG_NET_SLIP=y +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=57600 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_SLIP_MTU=296 +CONFIG_NET_SLIP_TCP_RECVWNDO=256 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +# CONFIG_NET_ETHERNET is not set +CONFIG_NET_SLIPNINTERFACES=1 +CONFIG_NET_SLIPSTACKSIZE=2048 +CONFIG_NET_SLIPDEFPRIO=128 +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +CONFIG_NXFLAT=y +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +CONFIG_PIC=y +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +CONFIG_EXAMPLES_THTTPD=y +CONFIG_EXAMPLES_THTTPD_NOMAC=y +CONFIG_EXAMPLES_THTTPD_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_THTTPD=y +CONFIG_THTTPD_PORT=80 +CONFIG_THTTPD_IPADDR=0x0a000002 +CONFIG_THTTPD_SERVER_ADDRESS="http://www.nuttx.org" +CONFIG_THTTPD_SERVER_SOFTWARE="thttpd/2.25b 29dec2003-NuttX" +CONFIG_THTTPD_NXFLAT=y +CONFIG_THTTPD_PATH="/mnt/www" +CONFIG_THTTPD_CGI_PATH="/mnt/www/cgi-bin" +CONFIG_THTTPD_CGI_PATTERN="/mnt/www/cgi-bin/*" +CONFIG_THTTPD_CGI_PRIORITY=50 +CONFIG_THTTPD_CGI_STACKSIZE=1024 +CONFIG_THTTPD_CGI_BYTECOUNT=20000 +CONFIG_THTTPD_CGI_TIMELIMIT=0 +CONFIG_THTTPD_CHARSET="iso-8859-1" +CONFIG_THTTPD_IOBUFFERSIZE=1024 +CONFIG_THTTPD_MINSTRSIZE=64 +CONFIG_THTTPD_REALLOCINCR=64 +CONFIG_THTTPD_MAXREALLOC=4096 +CONFIG_THTTPD_CGIINBUFFERSIZ=512 +CONFIG_THTTPD_CGIOUTBUFFERSIZE=512 +CONFIG_THTTPD_INDEX_NAMES="\"index.html\", \"index.htm\", \"index.cgi\"" +# CONFIG_THTTPD_USE_AUTH_FILE is not set +CONFIG_THTTPD_LISTEN_BACKLOG=8 +CONFIG_THTTPD_LINGER_MSEC=500 +CONFIG_THTTPD_OCCASIONAL_MSEC=120 +CONFIG_THTTPD_IDLE_READ_LIMIT_SEC=300 +CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300 +# CONFIG_THTTPD_USE_TILDE_MAP1 is not set +# CONFIG_THTTPD_USE_TILDE_MAP2 is not set +CONFIG_THTTPD_TILDE_MAP_NONE=y +# CONFIG_THTTPD_GENERATE_INDICES is not set +# CONFIG_THTTPD_USE_URLPATTERN is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/slip-httpd/setenv.sh b/configs/olimex-lpc1766stk/slip-httpd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..bb91fb0337d01bbe8f34ce78b85a3a1686585655 --- /dev/null +++ b/configs/olimex-lpc1766stk/slip-httpd/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/olimex-lpc1766stk/slip-httpd/setenv.sh +# +# Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The Olimex-lpc1766stk/tools directory +export LPCTOOL_DIR="${WD}/configs/olimex-lpc1766stk/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-lpc1766stk/src/.gitignore b/configs/olimex-lpc1766stk/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/olimex-lpc1766stk/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/olimex-lpc1766stk/src/Makefile b/configs/olimex-lpc1766stk/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..7e6270200d3dae07c57a61078a83a6508ede3643 --- /dev/null +++ b/configs/olimex-lpc1766stk/src/Makefile @@ -0,0 +1,69 @@ +############################################################################ +# configs/olimex-lpc1766stk/src/Makefile +# +# Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc17_boot.c lpc17_leds.c lpc17_ssp.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc17_appinit.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += lpc17_usbmsc.c +endif + +ifeq ($(CONFIG_NX_LCDDRIVER),y) +CSRCS += lpc17_lcd.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += lpc17_buttons.c +endif + +ifeq ($(CONFIG_CAN),y) +CSRCS += lpc17_can.c +endif + +ifeq ($(CONFIG_USBHOST_HIDKBD),y) +CSRCS += lpc17_hidkbd.c +endif + +ifeq ($(CONFIG_USBHOST_HIDMOUSE),y) +CSRCS += lpc17_hidmouse.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/olimex-lpc1766stk/src/lpc1766stk.h b/configs/olimex-lpc1766stk/src/lpc1766stk.h new file mode 100644 index 0000000000000000000000000000000000000000..da5a6da689cc52a530e6269fd0d91f8605020159 --- /dev/null +++ b/configs/olimex-lpc1766stk/src/lpc1766stk.h @@ -0,0 +1,265 @@ +/************************************************************************************ + * configs/olimex-lpc1766stk/src/lpc1766stk.h + * + * Copyright (C) 2010-2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef _CONFIGS_OLIMEX_LPC1766STK_SRC_LPC1766STK_H +#define _CONFIGS_OLIMEX_LPC1766STK_SRC_LPC1766STK_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* LPC1766-STK GPIO Pin Definitions *************************************************/ +/* Board GPIO Usage: + * + * GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P0[0]/RD1/TXD3/SDA1 46 RD1 + * P0[1]/TD1/RXD3/SCL1 47 TD1 + * P0[2]/TXD0/AD0[7] 98 TXD0 + * P0[3]/RXD0/AD0[6] 99 RXD0 + * P0[4]/I2SRX_CLK/RD2/CAP2[0] 81 LED2/ACC IRQ + * P0[5]/I2SRX_WS/TD2/CAP2[1] 80 CENTER + * P0[6]/I2SRX_SDA/SSEL1/MAT2[0] 79 SSEL1 + * P0[7]/I2STX_CLK/SCK1/MAT2[1] 78 SCK1 + * P0[8]/I2STX_WS/MISO1/MAT2[2] 77 MISO1 + * P0[9]/I2STX_SDA/MOSI1/MAT2[3] 76 MOSI1 + * P0[10]/TXD2/SDA2/MAT3[0] 48 SDA2 + * P0[11]/RXD2/SCL2/MAT3[1] 49 SCL2 + * P0[15]/TXD1/SCK0/SCK 62 TXD1 + * P0[16]/RXD1/SSEL0/SSEL 63 RXD1 + * P0[17]/CTS1/MISO0/MISO 61 CTS1 + * P0[18]/DCD1/MOSI0/MOSI 60 DCD1 + * P0[19]/DSR1/SDA1 59 DSR1 + * P0[20]/DTR1/SCL1 58 DTR1 + * P0[21]/RI1/RD1 57 MMC PWR + * P0[22]/RTS1/TD1 56 RTS1 + * P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] 9 BUT1 + * P0[24]/AD0[1]/I2SRX_WS/CAP3[1] 8 TEMP + * P0[25]/AD0[2]/I2SRX_SDA/TXD3 7 MIC IN + * P0[26]/AD0[3]/AOUT/RXD3 6 AOUT + * P0[27]/SDA0/USB_SDA 25 USB_SDA + * P0[28]/SCL0/USB_SCL 24 USB_SCL + * P0[29]/USB_D+ 29 USB_D+ + * P0[30]/USB_D- 30 USB_D- + * P1[0]/ENET_TXD0 95 E_TXD0 + * P1[1]/ENET_TXD1 94 E_TXD1 + * P1[4]/ENET_TX_EN 93 E_TX_EN + * P1[8]/ENET_CRS 92 E_CRS + * P1[9]/ENET_RXD0 91 E_RXD0 + * P1[10]/ENET_RXD1 90 E_RXD1 + * P1[14]/ENET_RX_ER 89 E_RX_ER + * P1[15]/ENET_REF_CLK 88 E_REF_CLK + * P1[16]/ENET_MDC 87 E_MDC + * P1[17]/ENET_MDIO 86 E_MDIO + * P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] 32 USB_UP_LED + * P1[19]/MC0A/#USB_PPWR/CAP1[1] 33 #USB_PPWR + * P1[20]/MCFB0/PWM1[2]/SCK0 34 SCK0 + * P1[21]/MCABORT/PWM1[3]/SSEL0 35 SSEL0 + * P1[22]/MC0B/USB_PWRD/MAT1[0] 36 USBH_PWRD + * P1[23]/MCFB1/PWM1[4]/MISO0 37 MISO0 + * P1[24]/MCFB2/PWM1[5]/MOSI0 38 MOSI0 + * P1[25]/MC1A/MAT1[1] 39 LED1 + * P1[26]/MC1B/PWM1[6]/CAP0[0] 40 CS_UEXT + * P1[27]/CLKOUT/#USB_OVRCR/CAP0[1] 43 #USB_OVRCR + * P1[28]/MC2A/PCAP1[0]/MAT0[0] 44 P1.28 + * P1[29]/MC2B/PCAP1[1]/MAT0[1] 45 P1.29 + * P1[30]/VBUS/AD0[4] 21 VBUS + * P1[31]/SCK1/AD0[5] 20 AIN5 + * P2[0]/PWM1[1]/TXD1 75 UP + * P2[1]/PWM1[2]/RXD1 74 DOWN + * P2[2]/PWM1[3]/CTS1/TRACEDATA[3] 73 TRACE_D3 + * P2[3]/PWM1[4]/DCD1/TRACEDATA[2] 70 TRACE_D2 + * P2[4]/PWM1[5]/DSR1/TRACEDATA[1] 69 TRACE_D1 + * P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 68 TRACE_D0 + * P2[6]/PCAP1[0]/RI1/TRACECLK 67 TRACE_CLK + * P2[7]/RD2/RTS1 66 LEFT + * P2[8]/TD2/TXD2 65 RIGHT + * P2[9]/USB_CONNECT/RXD2 64 USBD_CONNECT + * P2[10]/#EINT0/NMI 53 ISP_E4 + * P2[11]/#EINT1/I2STX_CLK 52 #EINT1 + * P2[12]/#EINT2/I2STX_WS 51 WAKE-UP + * P2[13]/#EINT3/I2STX_SDA 50 BUT2 + * P3[25]/MAT0[0]/PWM1[2] 27 LCD_RST + * P3[26]/STCLK/MAT0[1]/PWM1[3] 26 LCD_BL + */ + +/* LEDs GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P1[25]/MC1A/MAT1[1] 39 LED1 + * P0[4]/I2SRX_CLK/RD2/CAP2[0] 81 LED2/ACC IRQ + * + * LEDs are connected to +3.3V through a diode on one side and must be pulled + * low (through a resistor) on the LPC17xx side in order to illuminuate them. + */ + +#define LPC1766STK_LED1 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN25) +#define LPC1766STK_LED2 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN4) + +/* Buttons GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] 9 BUT1 + * P2[13]/#EINT3/I2STX_SDA 50 BUT2 + * P2[12]/#EINT2/I2STX_WS 51 WAKE-UP + * + * NOTES: + * 1. Pull-ups are not required because the pins are already pulled-up by + * through resistors on the board. + * 2. All buttons are capable of supporting interrupts if board_button_irq() is + * called to attach an interrupt handler. Interrupts are configured to + * occur on both edges. + */ + +#define LPC1766STK_BUT1 (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT0 | GPIO_PIN23) +#define LPC1766STK_BUT2 (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT2 | GPIO_PIN13) +#define LPC1766STK_WAKEUP (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT2 | GPIO_PIN12) + +/* Button IRQ numbers */ + +#define LPC1766STK_BUT1_IRQ LPC17_IRQ_P0p23 +#define LPC1766STK_BUT2_IRQ LPC17_IRQ_P2p13 +#define LPC1766STK_WAKEUP_IRQ LPC17_IRQ_P2p12 + +/* Joystick GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P0[5]/I2SRX_WS/TD2/CAP2[1] 80 CENTER + * P2[0]/PWM1[1]/TXD1 75 UP + * P2[1]/PWM1[2]/RXD1 74 DOWN + * P2[7]/RD2/RTS1 66 LEFT + * P2[8]/TD2/TXD2 65 RIGHT + * + * NOTES: + * 1. Pull-ups are not required because the pins are already pulled-up by + * through resistors on the board. + * 2. All buttons are capable of supporting interrupts if board_button_irq() is + * called to attach an interrupt handler. Interrupts are configured to + * occur on both edges. + */ + +#define LPC1766STK_CENTER (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT0 | GPIO_PIN5) +#define LPC1766STK_UP (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT2 | GPIO_PIN0) +#define LPC1766STK_DOWN (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT2 | GPIO_PIN1) +#define LPC1766STK_LEFT (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT2 | GPIO_PIN7) +#define LPC1766STK_RIGHT (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT2 | GPIO_PIN8) + +/* Joystick IRQ numbers */ + +#define LPC1766STK_CENTER_IRQ LPC17_IRQ_P0p5 +#define LPC1766STK_UP_IRQ LPC17_IRQ_P2p0 +#define LPC1766STK_DOWN_IRQ LPC17_IRQ_P2p1 +#define LPC1766STK_LEFT_IRQ LPC17_IRQ_P2p7 +#define LPC1766STK_RIGHT_IRQ LPC17_IRQ_P2p8 + +/* Nokia LCD GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P1[21]/MCABORT/PWM1[3]/SSEL0 35 SSEL0 + * P1[20]/MCFB0/PWM1[2]/SCK0 34 SCK0 + * P1[23]/MCFB1/PWM1[4]/MISO0 37 MISO0 + * P1[24]/MCFB2/PWM1[5]/MOSI0 38 MOSI0 + * P3[25]/MAT0[0]/PWM1[2] 27 LCD_RST + * P3[26]/STCLK/MAT0[1]/PWM1[3] 26 LCD_BL (PWM1) + */ + +#define LPC1766STK_LCD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN21) +#define LPC1766STK_LCD_RST (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT3 | GPIO_PIN25) +#define LPC1766STK_LCD_BL GPIO_PWM1p3_3 +#define GPIO_PWM1p3 GPIO_PWM1p3_3 + +/* SD/MMC GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P0[6]/I2SRX_SDA/SSEL1/MAT2[0] 79 SSEL1 (active low) + * P0[7]/I2STX_CLK/SCK1/MAT2[1] 78 SCK1 + * P0[8]/I2STX_WS/MISO1/MAT2[2] 77 MISO1 + * P0[9]/I2STX_SDA/MOSI1/MAT2[3] 76 MOSI1 + * P0[21]/RI1/RD1 57 MMC PWR (active low) + */ + +#define LPC1766STK_MMC_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN6) +#define LPC1766STK_MMC_PWR (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN21) + +/* AD GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P0[24]/AD0[1]/I2SRX_WS/CAP3[1] 8 TEMP + * P0[25]/AD0[2]/I2SRX_SDA/TXD3 7 MIC IN + */ + +#define LPC1766STK_TEMP GPIO_AD0p1 +#define LPC1766STK_MIC_IN GPIO_AD0p2 + +/* UEXT GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P1[26]/MC1B/PWM1[6]/CAP0[0] 40 CS_UEXT + */ + +#define LPC1766STK_CS_UEXT (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN26) + +/* ISP? GPIO PIN SIGNAL NAME + * -------------------------------- ---- -------------- + * P2[10]/#EINT0/NMI 53 ISP_E4 + */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc1766stk_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Olimex LPC1766-STK board. + * + ************************************************************************************/ + +void weak_function lpc1766stk_sspdev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_OLIMEX_LPC1766STK_SRC_LPC1766STK_H */ + diff --git a/configs/olimex-lpc1766stk/src/lpc17_appinit.c b/configs/olimex-lpc1766stk/src/lpc17_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..89fd701173c3d6f129d2e5c2a1007e274c38bddf --- /dev/null +++ b/configs/olimex-lpc1766stk/src/lpc17_appinit.c @@ -0,0 +1,342 @@ +/**************************************************************************** + * config/olimex-lpc1766stk/src/lpc17_appinit.c + * + * Copyright (C) 2010, 2013-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "lpc17_ssp.h" +#include "lpc17_gpio.h" +#include "lpc17_usbhost.h" + +#include "lpc1766stk.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#define HAVE_MMCSD 1 +#define HAVE_USBHOST 1 + +/* MMC/SD is on SSP port 1. There is only a single slot, slot 0 */ + +#ifdef CONFIG_NSH_ARCHINIT +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 1 +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 1 +# endif + +# if !defined(CONFIG_NSH_MMCSDSLOTNO) || CONFIG_NSH_MMCSDSLOTNO != 0 +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif + +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif + +#else +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 1 +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# undef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/* Can't support MMC/SD is SSP1 is not enabled */ + +#ifndef CONFIG_LPC17_SSP1 +# undef HAVE_MMCSD +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef HAVE_MMCSD +#endif + +/* USB Host */ + +#ifdef CONFIG_USBHOST +# ifndef CONFIG_LPC17_USBHOST +# error "CONFIG_LPC17_USBHOST is not selected" +# endif +#endif + +#ifdef CONFIG_LPC17_USBHOST +# ifndef CONFIG_USBHOST +# warning "CONFIG_USBHOST is not selected" +# endif +#endif + +#if !defined(CONFIG_USBHOST) || !defined(CONFIG_LPC17_USBHOST) +# undef HAVE_USBHOST +#endif + +#ifdef HAVE_USBHOST +# ifndef CONFIG_LPC1766STK_USBHOST_PRIO +# define CONFIG_LPC1766STK_USBHOST_PRIO 50 +# endif +# ifndef CONFIG_LPC1766STK_USBHOST_STACKSIZE +# define CONFIG_LPC1766STK_USBHOST_STACKSIZE 1024 +# endif +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef HAVE_USBHOST +static struct usbhost_connection_s *g_usbconn; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nsh_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ****************************************************************************/ + +#ifdef HAVE_USBHOST +static int nsh_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + syslog(LOG_INFO, "nsh_waiter: Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + syslog(LOG_INFO, "nsh_waiter: %s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/**************************************************************************** + * Name: nsh_sdinitialize + * + * Description: + * Initialize SPI-based microSD. + * + ****************************************************************************/ + +#ifdef HAVE_MMCSD +static int nsh_sdinitialize(void) +{ + FAR struct spi_dev_s *ssp; + int ret; + + /* Enable power to the SD/MMC via a GPIO. LOW enables SD/MMC. */ + + lpc17_gpiowrite(LPC1766STK_MMC_PWR, false); + + /* Get the SSP port. MMC/SD is on SSP port 1. */ + + ssp = lpc17_sspbus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + if (!ssp) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SSP port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + ret = -ENODEV; + goto errout; + } + + syslog(LOG_INFO, "Successfully initialized SSP port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + /* Bind the SSP port to the slot */ + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, + CONFIG_NSH_MMCSDSLOTNO, ssp); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SSP port %d to MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, + CONFIG_NSH_MMCSDSLOTNO, ret); + goto errout; + } + + syslog(LOG_INFO, "Successfully bound SSP port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, + CONFIG_NSH_MMCSDSLOTNO); + return OK; + + /* Disable power to the SD/MMC via a GPIO. HIGH disables SD/MMC. */ + +errout: + lpc17_gpiowrite(LPC1766STK_MMC_PWR, true); + return ret; +} +#else +# define nsh_sdinitialize() (OK) +#endif + +/**************************************************************************** + * Name: nsh_usbhostinitialize + * + * Description: + * Initialize SPI-based microSD. + * + ****************************************************************************/ + +#ifdef HAVE_USBHOST +static int nsh_usbhostinitialize(void) +{ + int pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + syslog(LOG_INFO, "Register class drivers\n"); + +#ifdef CONFIG_USBHOST_HUB + /* Initialize USB hub support */ + + ret = usbhost_hub_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: usbhost_hub_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_MSC + /* Initialize mass storage support */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + + UNUSED(ret); + + /* Then get an instance of the USB host interface */ + + syslog(LOG_INFO, "Initialize USB host\n"); + g_usbconn = lpc17_usbhost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + syslog(LOG_ERR, "ERROR: Start nsh_waiter\n"); + + pid = task_create("usbhost", CONFIG_LPC1766STK_USBHOST_PRIO, + CONFIG_LPC1766STK_USBHOST_STACKSIZE, + (main_t)nsh_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + + return -ENODEV; +} +#else +# define nsh_usbhostinitialize() (OK) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + int ret; + + /* Initialize SPI-based microSD */ + + ret = nsh_sdinitialize(); + if (ret == OK) + { + /* Initialize USB host */ + + ret = nsh_usbhostinitialize(); + } + + return ret; +} diff --git a/configs/olimex-lpc1766stk/src/lpc17_boot.c b/configs/olimex-lpc1766stk/src/lpc17_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..84e7198165271f4279ccc513dfc0838a42d5d951 --- /dev/null +++ b/configs/olimex-lpc1766stk/src/lpc17_boot.c @@ -0,0 +1,93 @@ +/************************************************************************************ + * configs/olimex-lpc1766stk/src/lpc17_boot.c + * + * Copyright (C) 2010, 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_ssp.h" +#include "lpc1766stk.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void) +{ + /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak + * function lpc1766stk_sspdev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1) + if (lpc1766stk_sspdev_initialize) + { + lpc1766stk_sspdev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/olimex-lpc1766stk/src/lpc17_buttons.c b/configs/olimex-lpc1766stk/src/lpc17_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..b2f2d811ca3e18368c909fc48250a7244a7aa4d6 --- /dev/null +++ b/configs/olimex-lpc1766stk/src/lpc17_buttons.c @@ -0,0 +1,229 @@ +/**************************************************************************** + * configs/olimex-lpc1766stk/src/lpc17_buttons.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include + +#include "lpc17_gpio.h" +#include "lpc1766stk.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each STM3210E-EVAL button. This array is indexed by + * the BUTTON_* and JOYSTICK_* definitions in board.h + */ + +static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] = +{ + LPC1766STK_BUT1, LPC1766STK_BUT2, LPC1766STK_WAKEUP, LPC1766STK_CENTER, + LPC1766STK_UP, LPC1766STK_DOWN, LPC1766STK_LEFT, LPC1766STK_RIGHT +}; + +/* This array defines all of the interrupt handlers current attached to + * button events. + */ + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS]; + +/* This array provides the mapping from button ID numbers to button IRQ + * numbers. + */ + +static uint8_t g_buttonirq[BOARD_NUM_BUTTONS] = +{ + LPC1766STK_BUT1_IRQ, LPC1766STK_BUT2_IRQ, LPC1766STK_WAKEUP_IRQ, + LPC1766STK_CENTER_IRQ, LPC1766STK_UP_IRQ, LPC1766STK_DOWN_IRQ, + LPC1766STK_LEFT_IRQ, LPC1766STK_RIGHT_IRQ +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as interrupting inputs. */ + + for (i = 0; i < BOARD_NUM_BUTTONS; i++) + { + lpc17_configgpio(g_buttoncfg[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons. + * + * board_buttons() may be called at any time to harvest the state of every + * button. The state of the buttons is returned as a bitset with one + * bit corresponding to each button: If the bit is set, then the button + * is pressed. See the BOARD_BUTTON_*_BIT and BOARD_JOYSTICK_*_BIT + * definitions in board.h for the meaning of each bit. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < BOARD_NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed. */ + + bool released = lpc17_gpioread(g_buttoncfg[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/**************************************************************************** + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_button_irq() may be called to register button interrupt handlers. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BOARD_BUTTON_* and BOARD_JOYSTICK_* definitions in board.h for the meaning + * of enumeration values. The previous interrupt handler address is returned + * (so that it may restored, if so desired). + * + * Note that board_button_irq() also enables button interrupts. Button + * interrupts will remain enabled after the interrupt handler is attached. + * Interrupts may be disabled (and detached) by calling board_button_irq with + * irqhandler equal to NULL. + * + ****************************************************************************/ + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + irqstate_t flags; + int irq; + + /* Verify that the button ID is within range */ + + if ((unsigned)id < BOARD_NUM_BUTTONS) + { + /* Return the current button handler and set the new interrupt handler */ + + oldhandler = g_buttonisr[id]; + g_buttonisr[id] = irqhandler; + + /* Disable interrupts until we are done */ + + flags = enter_critical_section(); + + /* Configure the interrupt. Either attach and enable the new + * interrupt or disable and detach the old interrupt handler. + */ + + irq = g_buttonirq[id]; + if (irqhandler) + { + /* Attach then enable the new interrupt handler */ + + (void)irq_attach(irq, irqhandler); + up_enable_irq(irq); + } + else + { + /* Disable then detach the old interrupt handler */ + + up_disable_irq(irq); + (void)irq_detach(irq); + } + leave_critical_section(flags); + } + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/olimex-lpc1766stk/src/lpc17_can.c b/configs/olimex-lpc1766stk/src/lpc17_can.c new file mode 100644 index 0000000000000000000000000000000000000000..ca0f8b05f1ee0e4ef434a9d7e6e8df62017e682e --- /dev/null +++ b/configs/olimex-lpc1766stk/src/lpc17_can.c @@ -0,0 +1,144 @@ +/************************************************************************************ + * configs/solimex-lpc1766stk/src/lpc17_can.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "lpc17_can.h" +#include "lpc1766stk.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_LPC17_CAN1) || defined(CONFIG_LPC17_CAN2)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#if defined(CONFIG_LPC17_CAN1) && defined(CONFIG_LPC17_CAN2) +# warning "Both CAN1 and CAN2 are enabled. Assuming only CAN1." +# undef CONFIG_LPC17_CAN2 +#endif + +#ifdef CONFIG_LPC17_CAN2 +# warning "CAN2 is not connected on the LPC1766-STK" +#endif + +#ifdef CONFIG_LPC17_CAN1 +# define CAN_PORT 1 +#else +# define CAN_PORT 2 +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All LPC17 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call lpc17_caninitialize() to get an instance of the CAN interface */ + + can = lpc17_caninitialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && (CONFIG_LPC17_CAN1 || CONFIG_LPC17_CAN2) */ diff --git a/configs/olimex-lpc1766stk/src/lpc17_hidkbd.c b/configs/olimex-lpc1766stk/src/lpc17_hidkbd.c new file mode 100644 index 0000000000000000000000000000000000000000..7c0d304fd11505366587a618a5e32e4610788ea1 --- /dev/null +++ b/configs/olimex-lpc1766stk/src/lpc17_hidkbd.c @@ -0,0 +1,85 @@ +/**************************************************************************** + * configs/olimex-lpc1766stk/src/lpc17_hidkbd.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "lpc17_usbhost.h" + +#if defined(CONFIG_LPC17_USBHOST) && defined(CONFIG_USBHOST) && \ + defined(CONFIG_EXAMPLES_HIDKBD) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arch_usbhost_initialize + * + * Description: + * The apps/example/hidkbd test requires that platform-specific code + * provide a wrapper called arch_usbhost_initialize() that will perform + * the actual USB host initialization. + * + ****************************************************************************/ + +struct usbhost_connection_s *arch_usbhost_initialize(void) +{ +#ifdef CONFIG_USBHOST_HUB + int ret; + + /* Initialize USB hub support */ + + ret = usbhost_hub_initialize(); + if (ret < 0) + { + udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret); + } +#endif + + return lpc17_usbhost_initialize(0); +} +#endif /* CONFIG_LPC17_USBHOST && CONFIG_USBHOST && CONFIG_EXAMPLES_HIDKBD */ diff --git a/configs/olimex-lpc1766stk/src/lpc17_hidmouse.c b/configs/olimex-lpc1766stk/src/lpc17_hidmouse.c new file mode 100644 index 0000000000000000000000000000000000000000..8c8f6f38add793fa0a5eee833f15e5a5c5f72e1d --- /dev/null +++ b/configs/olimex-lpc1766stk/src/lpc17_hidmouse.c @@ -0,0 +1,178 @@ +/************************************************************************************ + * configs/olimex-lpc1766stk/src/lpc17_touchscreen.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include + +#ifdef CONFIG_USBHOST_HIDMOUSE + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Both CONFIG_DEBUG_INPUT and CONFIG_DEBUG_USB could apply to this file. + * We assume here that CONFIG_DEBUG_INPUT might be enabled separately, but + * CONFIG_DEBUG_USB implies both. + */ + +#ifndef CONFIG_DEBUG_INPUT +# undef idbg +# define idbg udbg +# undef illdbg +# define illdbg ulldbg +# undef ivdbg +# define ivdbg uvdbg +# undef illvdbg +# define illvdbg ullvdbg +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this + * function. This function is called by application-specific, setup logic + * to configure the USB HID mouse driver that emulates a touchscreen + * device. This function will register the driver as /dev/mouseN where N + * is the minor device number. + * + * Input Parameters: + * minor - The mouse device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ + static bool initialized = false; + int ret; + + idbg("minor %d\n", minor); + DEBUGASSERT(minor == 0); + + /* Have we already initialized? Since we never uninitialize we must prevent + * multiple initializations. This is necessary, for example, when the + * touchscreen example is used as a built-in application in NSH and can be + * called numerous time. It will attempt to initialize each time. + */ + + if (!initialized) + { +#ifdef CONFIG_USBHOST_HUB + /* Initialize USB hub support */ + + ret = usbhost_hub_initialize(); + if (ret < 0) + { + idbg("ERROR: usbhost_hub_initialize failed: %d\n", ret); + } +#endif + + /* Initialize and register the USB HID mouse device class */ + + ret = usbhost_mouse_init(); + if (ret < 0) + { + idbg("Failed to register USB HID mouse device class\n"); + return -ENODEV; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* No support for un-initializing the USB mouse driver. It will continue + * to run and process touch interrupts in the background. + */ +} + +#endif /* CONFIG_USBHOST_HIDMOUSE */ diff --git a/configs/olimex-lpc1766stk/src/lpc17_lcd.c b/configs/olimex-lpc1766stk/src/lpc17_lcd.c new file mode 100644 index 0000000000000000000000000000000000000000..26de717fad4f693a18096415621c1b659873e350 --- /dev/null +++ b/configs/olimex-lpc1766stk/src/lpc17_lcd.c @@ -0,0 +1,267 @@ +/**************************************************************************** + * config/olimex-lpc1766stk/src/lpc17_lcd.c + * + * Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSPBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include "chip/lpc17_syscon.h" +#include "chip/lpc17_pwm.h" +#include "lpc17_gpio.h" +#include "lpc17_ssp.h" + +#include "lpc1766stk.h" + +#if defined(CONFIG_NX_LCDDRIVER) && defined(CONFIG_LCD_NOKIA6100) && defined(CONFIG_LPC17_SSP0) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Check power setting */ + +#if !defined(CONFIG_LCD_MAXPOWER) || CONFIG_LCD_MAXPOWER != 127 +# error "CONFIG_LCD_MAXPOWER must be 127" +#endif + +/* Backlight OFF PWM setting */ + +#define NOKIA_BACKLIGHT_OFF 0x40 + +/* Define the CONFIG_LCD_NOKIADBG to enable detailed debug output (stuff you + * would never want to see unless you are debugging this file). + * + * Verbose debug must also be enabled + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_LCD_NOKIADBG +#endif + +#ifdef CONFIG_LCD_NOKIADBG +# define lcddbg(format, ...) vdbg(format, ##__VA_ARGS__) +# define lcd_dumpgpio(m) lpc17_dumpgpio(LPC1766STK_LCD_RST, m) +#else +# define lcddbg(x...) +# define lcd_dumpgpio(m) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nokia_blinitialize + * + * Description: + * Initialize PWM1 to manage the LCD backlight. + * + ****************************************************************************/ + +void nokia_blinitialize(void) +{ + uint32_t regval; + + /* Enable clocking of PWM1 */ + + regval = getreg32(LPC17_SYSCON_PCONP); + regval |= SYSCON_PCONP_PCPWM1; + putreg32(regval, LPC17_SYSCON_PCONP); + + /* Disable and reset PWM1 */ + + regval = getreg32(LPC17_PWM1_TCR); + regval &= ~(PWM_TCR_PWMEN|PWM_TCR_CNTREN); + regval |= PWM_TCR_CNTRRST; + putreg32(regval, LPC17_PWM1_TCR); + + /* Put PWM1 in timer mode */ + + regval = getreg32(LPC17_PWM1_CTCR); + regval &= ~PWM_CTCR_MODE_MASK; + regval |= PWM_CTCR_MODE_TIMER; + putreg32(regval, LPC17_PWM1_CTCR); + + /* Reset on MR0 */ + + putreg32(PWM_MCR_MR0R, LPC17_PWM1_MCR); + + /* Single edge controlled mod for PWM3 and enable output */ + + regval = getreg32(LPC17_PWM1_PCR); + regval &= ~PWM_PCR_SEL3; + regval |= PWM_PCR_ENA3; + putreg32(regval, LPC17_PWM1_PCR); + + /* Clear prescaler */ + + putreg32(0, LPC17_PWM1_PR); + + /* Set 8-bit resolution */ + + putreg32(0xff, LPC17_PWM1_MCR); + + /* Enable PWM match 1 latch */ + + regval = getreg32(LPC17_PWM1_LER); + regval |= PWM_LER_M0EN; + putreg32(regval, LPC17_PWM1_LER); + + /* Clear match register 3 */ + + putreg32(0, LPC17_PWM1_MR3); + + /* Enable PWM1 */ + + regval |= PWM_LER_M3EN; + putreg32(regval, LPC17_PWM1_LER); + + regval = getreg32(LPC17_PWM1_TCR); + regval &= ~(PWM_TCR_CNTRRST); + regval |= (PWM_TCR_PWMEN|PWM_TCR_CNTREN); + putreg32(regval, LPC17_PWM1_TCR); + + nokia_backlight(0); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called NX initialization logic to configure the LCD. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the LCD GPIOs */ + + lcd_dumpgpio("board_graphics_setup: On entry"); + lpc17_configgpio(LPC1766STK_LCD_RST); + lpc17_configgpio(LPC1766STK_LCD_BL); + lcd_dumpgpio("board_graphics_setup: After GPIO setup"); + + /* Reset the LCD */ + + lpc17_gpiowrite(LPC1766STK_LCD_RST, false); + up_udelay(10); + lpc17_gpiowrite(LPC1766STK_LCD_RST, true); + up_mdelay(5); + + /* Configure PWM1 to support the backlight */ + + nokia_blinitialize(); + + /* Get the SSP0 port (configure as a Freescale SPI port) */ + + spi = lpc17_sspbus_initialize(0); + if (!spi) + { + glldbg("Failed to initialize SSP port 0\n"); + } + else + { + /* Bind the SSP port to the LCD */ + + dev = nokia_lcdinitialize(spi, devno); + if (!dev) + { + glldbg("Failed to bind SSP port 0 to LCD %d: %d\n", devno); + } + else + { + gllvdbg("Bound SSP port 0 to LCD %d\n", devno); + + /* And turn the LCD on (CONFIG_LCD_MAXPOWER should be 1) */ + + (void)dev->setpower(dev, CONFIG_LCD_MAXPOWER); + return dev; + } + } + return NULL; +} + +/**************************************************************************** + * Name: nokia_backlight + * + * Description: + * The Nokia 6100 backlight is controlled by logic outside of the LCD + * assembly. This function must be provided by board specific logic to + * manage the backlight. This function will receive a power value (0: + * full off - CONFIG_LCD_MAXPOWER: full on) and should set the backlight + * accordingly. + * + * On the Olimex LPC1766STK, the backlight level is controlled by PWM1. + * + ****************************************************************************/ + +int nokia_backlight(unsigned int power) +{ + uint32_t regval; + + putreg32(NOKIA_BACKLIGHT_OFF + power, LPC17_PWM1_MR3); + + regval = getreg32(LPC17_PWM1_LER); + regval |= PWM_LER_M3EN; + putreg32(regval, LPC17_PWM1_LER); + return OK; +} + +#endif /* CONFIG_NX_LCDDRIVER && CONFIG_LCD_NOKIA6100 && CONFIG_LPC17_SSP0 */ diff --git a/configs/olimex-lpc1766stk/src/lpc17_leds.c b/configs/olimex-lpc1766stk/src/lpc17_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..8f83ca967c6f752f351164aec423ced994de6d80 --- /dev/null +++ b/configs/olimex-lpc1766stk/src/lpc17_leds.c @@ -0,0 +1,206 @@ +/**************************************************************************** + * configs/olimex-lpc1766stk/src/lpc17_leds.c + * + * Copyright (C) 2010-2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_gpio.h" + +#include "lpc1766stk.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS) +# define led_dumpgpio(m) lpc17_dumpgpio(LPC1766STK_LED1, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +static bool g_uninitialized = true; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize/board_autoled_initialize + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled_initialize(void) /* Name when invoked externally */ +#else +void board_autoled_initialize(void) /* Name when invoked via lpc17_boot.c */ +#endif +{ + /* Configure all LED GPIO lines */ + + led_dumpgpio("board_*led_initialize() Entry)"); + + lpc17_configgpio(LPC1766STK_LED1); + lpc17_configgpio(LPC1766STK_LED2); + + led_dumpgpio("board_*led_initialize() Exit"); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled(int led, bool ledon) +{ + if (led == BOARD_LED1) + { + lpc17_gpiowrite(LPC1766STK_LED1, !ledon); + } + else if (led == BOARD_LED2) + { + lpc17_gpiowrite(LPC1766STK_LED2, !ledon); + } +} +#endif + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled_all(uint8_t ledset) +{ + lpc17_gpiowrite(LPC1766STK_LED1, (ledset & BOARD_LED1_BIT) == 0); + lpc17_gpiowrite(LPC1766STK_LED2, (ledset & BOARD_LED2_BIT) == 0); +} +#endif + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_on(int led) +{ + switch (led) + { + default: + case 0 : /* STARTED, HEAPALLOCATE, IRQSENABLED */ + lpc17_gpiowrite(LPC1766STK_LED1, true); + lpc17_gpiowrite(LPC1766STK_LED2, true); + break; + + case 1 : /* STACKCREATED */ + lpc17_gpiowrite(LPC1766STK_LED1, false); + lpc17_gpiowrite(LPC1766STK_LED2, true); + g_uninitialized = false; + break; + + case 2 : /* INIRQ, SIGNAL, ASSERTION, PANIC */ + lpc17_gpiowrite(LPC1766STK_LED2, false); + break; + + case 3 : /* IDLE */ + lpc17_gpiowrite(LPC1766STK_LED1, true); + break; + } +} +#endif + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_off(int led) +{ + switch (led) + { + default: + case 0 : /* STARTED, HEAPALLOCATE, IRQSENABLED */ + case 1 : /* STACKCREATED */ + lpc17_gpiowrite(LPC1766STK_LED1, true); + + case 2 : /* INIRQ, SIGNAL, ASSERTION, PANIC */ + lpc17_gpiowrite(LPC1766STK_LED2, true); + break; + + case 3 : /* IDLE */ + lpc17_gpiowrite(LPC1766STK_LED1, g_uninitialized); + break; + } +} +#endif diff --git a/configs/olimex-lpc1766stk/src/lpc17_ssp.c b/configs/olimex-lpc1766stk/src/lpc17_ssp.c new file mode 100644 index 0000000000000000000000000000000000000000..14d426ed375026137a9f39d79550751c7edc4fbe --- /dev/null +++ b/configs/olimex-lpc1766stk/src/lpc17_ssp.c @@ -0,0 +1,386 @@ +/************************************************************************************ + * configs/olimex-lpc1766stk/src/lpc17_ssp.c + * + * Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#ifdef CONFIG_SPI_CALLBACK +#include +#endif + +#include + +#include "up_arch.h" +#include "chip.h" +#include "lpc17_gpio.h" +#include "lpc17_ssp.h" +#include "lpc1766stk.h" + +#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ************************************************************/ + +#undef HAVE_SPI_CALLBACK +#ifdef CONFIG_SPI_CALLBACK +# ifndef CONFIG_GPIO_IRQ +# warning "CONFIG_GPIO_IRQ is required to support CONFIG_SPI_CALLBACK" +# else +# define HAVE_SPI_CALLBACK 1 +# endif +#endif + +/* Debug ********************************************************************/ +/* The following enable debug output from this file (needs CONFIG_DEBUG too). + * + * CONFIG_SSP_DEBUG - Define to enable basic SSP debug + * CONFIG_SSP_VERBOSE - Define to enable verbose SSP debug + */ + +#ifdef CONFIG_SSP_DEBUG +# define sspdbg lldbg +# ifdef CONFIG_SSP_VERBOSE +# define sspvdbg lldbg +# else +# define sspvdbg(x...) +# endif +#else +# undef CONFIG_SSP_VERBOSE +# define sspdbg(x...) +# define sspvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef CONFIG_SSP_VERBOSE +# define ssp_dumpssp0gpio(m) lpc17_dumpgpio(LPC1766STK_LCD_CS, m) +# define ssp_dumpssp1gpio(m) lpc17_dumpgpio(LPC1766STK_MMC_CS, m) +#else +# define ssp_dumpssp0gpio(m) +# define ssp_dumpssp1gpio(m) +#endif + +/************************************************************************************ + * Private Types + ************************************************************************************/ + +/* This structure describes on media change callback */ + +#ifdef HAVE_SPI_CALLBACK +struct lpc17_mediachange_s +{ + spi_mediachange_t callback; /* The media change callback */ + FAR void *arg; /* Callback argument */ +}; +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/* Registered media change callback */ + +#ifdef HAVE_SPI_CALLBACK +#ifdef CONFIG_LPC17_SSP0 +static struct lpc17_mediachange_s g_ssp0callback; +#endif +#ifdef CONFIG_LPC17_SSP1 +static struct lpc17_mediachange_s g_ssp1callback; +#endif +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: ssp_cdirqsetup + * + * Description: + * Setup to receive a card detection interrupt + * + ************************************************************************************/ + +#if 0 /* #ifdef HAVE_SPI_CALLBACK */ +static void ssp_cdirqsetup(int irq, xcpt_t irqhandler) +{ + irqstate_t flags; + + /* Disable interrupts until we are done */ + + flags = enter_critical_section(); + + /* Configure the interrupt. Either attach and enable the new + * interrupt or disable and detach the old interrupt handler. + */ + + if (irqhandler) + { + /* Attach then enable the new interrupt handler */ + + (void)irq_attach(irq, irqhandler); + up_enable_irq(irq); + } + else + { + /* Disable then detach the old interrupt handler */ + + up_disable_irq(irq); + (void)irq_detach(irq); + } + + leave_critical_section(flags); +} +#endif + +/************************************************************************************ + * Name: ssp0/1_cdinterrupt + * + * Description: + * Handle card detection interrupt + * + ************************************************************************************/ + +#if 0 /* ifdef HAVE_SPI_CALLBACK */ +#ifdef CONFIG_LPC17_SSP0 +static int ssp0_cdinterrupt(int irq, FAR void *context) +{ + /* Invoke the media change callback */ + + if (g_ssp0callback.callback) + { + g_ssp0callback.callback(g_ssp0callback.arg); + } + return OK; +} +#endif + +#ifdef CONFIG_LPC17_SSP1 +static int ssp1_cdinterrupt(int irq, FAR void *context) +{ + /* Invoke the media change callback */ + + if (g_ssp1callback.callback) + { + g_ssp1callback.callback(g_ssp1callback.arg); + } + return OK; +} +#endif +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc1766stk_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LPC1766-STK. + * + ************************************************************************************/ + +void weak_function lpc1766stk_sspdev_initialize(void) +{ + /* Configure the SSP0 chip select GPIOs. Only the Nokia LCD is connected to SSP0 */ + +#ifdef CONFIG_LPC17_SSP0 + ssp_dumpssp0gpio("BEFORE SSP0 Initialization"); + lpc17_configgpio(LPC1766STK_LCD_CS); + ssp_dumpssp0gpio("AFTER SSP0 Initialization"); +#endif + + /* Configure SSP1 chip select GPIOs. Only the SD/MMC card slot is connected to SSP1 */ + +#ifdef CONFIG_LPC17_SSP1 + ssp_dumpssp0gpio("BEFORE SSP1 Initialization"); + lpc17_configgpio(LPC1766STK_MMC_CS); + + /* Also configure the SD/MMC power GPIO (but leave power off). This really has + * nothing to do with SSP, but does belong with other SD/MMC GPIO configuration + * settings. + */ + + lpc17_configgpio(LPC1766STK_MMC_PWR); + ssp_dumpssp0gpio("AFTER SSP1 Initialization"); +#endif + +#ifdef HAVE_SPI_CALLBACK + /* If there were any CD detect pins for the LPC1766-STK, this is where + * they would be configured. + */ +#endif +} + +/************************************************************************************ + * Name: lpc17_ssp0/ssp1select and lpc17_ssp0/ssp1status + * + * Description: + * The external functions, lpc17_ssp0/ssp1select and lpc17_ssp0/ssp1status + * must be provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including lpc17_sspbus_initialize()) + * are provided by common LPC17xx logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in lpc17_boardinitialize() to configure SPI/SSP chip select + * pins. + * 2. Provide lpc17_ssp0/ssp1select() and lpc17_ssp0/ssp1status() functions + * in your board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 3. Add a calls to lpc17_sspbus_initialize() in your low level application + * initialization logic + * 4. The handle returned by lpc17_sspbus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +#ifdef CONFIG_LPC17_SSP0 +void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + if (devid == SPIDEV_DISPLAY) + { + /* Assert/de-assert the CS pin to the card */ + + ssp_dumpssp0gpio("lpc17_ssp0select() Entry"); + lpc17_gpiowrite(LPC1766STK_LCD_CS, !selected); + ssp_dumpssp0gpio("lpc17_ssp0select() Exit"); + } +} + +uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + sspdbg("Returning nothing\n"); + return 0; +} +#endif + +#ifdef CONFIG_LPC17_SSP1 +void lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + if (devid == SPIDEV_MMCSD) + { + /* Assert/de-assert the CS pin to the card */ + + ssp_dumpssp1gpio("lpc17_ssp1select() Entry"); + lpc17_gpiowrite(LPC1766STK_MMC_CS, !selected); + ssp_dumpssp1gpio("lpc17_ssp1select() Exit"); + } +} + +uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + sspdbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} +#endif + +/************************************************************************************ + * Name: lpc17_ssp0/1register + * + * Description: + * If the board supports a card detect callback to inform the SPI-based + * MMC/SD drvier when an SD card is inserted or removed, then + * CONFIG_SPI_CALLBACK should be defined and the following function(s) must + * must be implemented. These functiosn implements the registercallback + * method of the SPI interface (see include/nuttx/spi/spi.h for details) + * + * Input Parameters: + * dev - Device-specific state data + * callback - The funtion to call on the media change + * arg - A caller provided value to return with the callback + * + * Returned Value: + * 0 on success; negated errno on failure. + * + ************************************************************************************/ + +#ifdef CONFIG_SPI_CALLBACK +#ifdef CONFIG_LPC17_SSP0 + /* If there were any CD detect pins on the LPC1766-STK, this is how the + * would be configured. + */ + +int lpc17_ssp0register(FAR struct spi_dev_s *dev, spi_mediachange_t callback, void *arg) +{ + /* Save the callback information */ + +#if 0 + g_ssp0callback.callback = callback; + g_ssp0callback.arg = arg; + + /* Setup the interrupt */ + + spi_cdirqsetup(LPC1766STK_SPICD_IRQ, ssp0_cdinterrupt); +#endif + return OK; +} +#endif + +#ifdef CONFIG_LPC17_SSP1 +int lpc17_ssp1register(FAR struct spi_dev_s *dev, spi_mediachange_t callback, void *arg) +{ + /* Save the callback information */ + +#if 0 + g_ssp1callback.callback = callback; + g_ssp1callback.arg = arg; + + /* Setup the interrupt */ + + spi_cdirqsetup(LPC1766STK_SPICD_IRQ, ssp1_cdinterrupt); +#endif + return OK; +} +#endif +#endif + +#endif /* CONFIG_LPC17_SSP0 || CONFIG_LPC17_SSP1 */ diff --git a/configs/olimex-lpc1766stk/src/lpc17_usbmsc.c b/configs/olimex-lpc1766stk/src/lpc17_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..7fe2266714fa964bffd650352fc52715da1a55e7 --- /dev/null +++ b/configs/olimex-lpc1766stk/src/lpc17_usbmsc.c @@ -0,0 +1,141 @@ +/**************************************************************************** + * configs/olimex-lpc1766stk/src/lpc17_usbmsc.c + * + * Copyright (C) 2010, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the LPC17xx MMC/SD SPI block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "lpc17_gpio.h" +#include "lpc17_ssp.h" +#include "lpc1766stk.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_LPC1766STK +# undef LPC17XX_MMCSDSPIPORTNO +# define LPC17XX_MMCSDSPIPORTNO 1 +# undef LPC17XX_MMCSDSLOTNO +# define LPC17XX_MMCSDSLOTNO 0 +#else + /* Add configuration for new LPC17xx boards here */ +# error "Unrecognized LPC17xx board" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization of the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Enable power to the SD/MMC via a GPIO. LOW enables SD/MMC. */ + + lpc17_gpiowrite(LPC1766STK_MMC_PWR, false); + + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", + LPC17XX_MMCSDSPIPORTNO); + + spi = lpc17_sspbus_initialize(LPC17XX_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + LPC17XX_MMCSDSPIPORTNO); + ret = -ENODEV; + goto errout; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + LPC17XX_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + syslog(LOG_INFO, "Binding SPI port %d to MMC/SD slot %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1, + LPC17XX_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO, ret); + goto errout; + } + + syslog(LOG_INFO, + "Successfully bound SPI port %d to MMC/SD slot %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO); + return OK; + + /* Disable power to the SD/MMC via a GPIO. HIGH disables SD/MMC. */ + +errout: + lpc17_gpiowrite(LPC1766STK_MMC_PWR, true); + return ret; +} diff --git a/configs/olimex-lpc1766stk/thttpd-binfs/Make.defs b/configs/olimex-lpc1766stk/thttpd-binfs/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..9bf88272e98d47727b89d71b8fefa81e46d424f6 --- /dev/null +++ b/configs/olimex-lpc1766stk/thttpd-binfs/Make.defs @@ -0,0 +1,114 @@ +############################################################################ +# configs/olimex-lpc1766stk/thttpd-binfs/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimex-lpc1766stk/thttpd-binfs/defconfig b/configs/olimex-lpc1766stk/thttpd-binfs/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..af5952f54401ffc4aa3522bf41668821516ec81f --- /dev/null +++ b/configs/olimex-lpc1766stk/thttpd-binfs/defconfig @@ -0,0 +1,911 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +CONFIG_ARCH_CHIP_LPC1766=y +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=15776 +CONFIG_NET_NTXDESC=13 +CONFIG_NET_NRXDESC=13 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8111 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC1766STK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-lpc1766stk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=23 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="thttp_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGWORK=17 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=8192 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +CONFIG_ETH0_PHY_KS8721=y +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_BINFS=y +# CONFIG_FS_PROCFS is not set +CONFIG_FS_UNIONFS=y + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +CONFIG_EXAMPLES_THTTPD=y +CONFIG_EXAMPLES_THTTPD_NOMAC=y +CONFIG_EXAMPLES_THTTPD_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_THTTPD=y +CONFIG_THTTPD_PORT=80 +CONFIG_THTTPD_IPADDR=0x0a000002 +CONFIG_THTTPD_SERVER_ADDRESS="http://www.nuttx.org" +CONFIG_THTTPD_SERVER_SOFTWARE="thttpd/2.25b 29dec2003-NuttX" +CONFIG_THTTPD_BINFS=y +CONFIG_THTTPD_PATH="/mnt/www" +CONFIG_THTTPD_CGI_PATH="/mnt/www/cgi-bin" +CONFIG_THTTPD_CGI_PATTERN="/mnt/www/cgi-bin/*" +CONFIG_THTTPD_CGI_PRIORITY=100 +CONFIG_THTTPD_CGI_STACKSIZE=2048 +CONFIG_THTTPD_CGI_BYTECOUNT=20000 +CONFIG_THTTPD_CGI_TIMELIMIT=0 +CONFIG_THTTPD_CHARSET="iso-8859-1" +CONFIG_THTTPD_IOBUFFERSIZE=1024 +CONFIG_THTTPD_MINSTRSIZE=64 +CONFIG_THTTPD_REALLOCINCR=64 +CONFIG_THTTPD_MAXREALLOC=4096 +CONFIG_THTTPD_CGIINBUFFERSIZ=512 +CONFIG_THTTPD_CGIOUTBUFFERSIZE=512 +CONFIG_THTTPD_INDEX_NAMES="\"index.html\", \"index.htm\", \"index.cgi\"" +# CONFIG_THTTPD_USE_AUTH_FILE is not set +CONFIG_THTTPD_LISTEN_BACKLOG=8 +CONFIG_THTTPD_LINGER_MSEC=500 +CONFIG_THTTPD_OCCASIONAL_MSEC=120 +CONFIG_THTTPD_IDLE_READ_LIMIT_SEC=300 +CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300 +# CONFIG_THTTPD_USE_TILDE_MAP1 is not set +# CONFIG_THTTPD_USE_TILDE_MAP2 is not set +CONFIG_THTTPD_TILDE_MAP_NONE=y +# CONFIG_THTTPD_GENERATE_INDICES is not set +# CONFIG_THTTPD_USE_URLPATTERN is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/thttpd-binfs/setenv.sh b/configs/olimex-lpc1766stk/thttpd-binfs/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..7cbbdfbffcc2ad5fb8c9725e0233e1626a8fc5d7 --- /dev/null +++ b/configs/olimex-lpc1766stk/thttpd-binfs/setenv.sh @@ -0,0 +1,83 @@ +#!/bin/bash +# configs/olimex-lpc1766stk/thttpd-binfs/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The Olimex-lpc1766stk/tools directory +export LPCTOOL_DIR="${WD}/configs/olimex-lpc1766stk/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-lpc1766stk/thttpd-nxflat/Make.defs b/configs/olimex-lpc1766stk/thttpd-nxflat/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f5553eecad33a1b76f7658a5f78171caa3f7e575 --- /dev/null +++ b/configs/olimex-lpc1766stk/thttpd-nxflat/Make.defs @@ -0,0 +1,114 @@ +############################################################################ +# configs/olimex-lpc1766stk/thttpd-nxflat/Make.defs +# +# Copyright (C) 2010, 2012, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig b/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..e6bb9d820b3835d5f13772c24b5d5875c538ffd8 --- /dev/null +++ b/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig @@ -0,0 +1,898 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +CONFIG_ARCH_CHIP_LPC1766=y +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=15776 +CONFIG_NET_NTXDESC=13 +CONFIG_NET_NRXDESC=13 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8111 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC1766STK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-lpc1766stk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=23 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="thttp_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGWORK=17 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=8192 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +CONFIG_ETH0_PHY_KS8721=y +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +CONFIG_NXFLAT=y +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +CONFIG_PIC=y +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +CONFIG_EXAMPLES_THTTPD=y +CONFIG_EXAMPLES_THTTPD_NOMAC=y +CONFIG_EXAMPLES_THTTPD_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_THTTPD=y +CONFIG_THTTPD_PORT=80 +CONFIG_THTTPD_IPADDR=0x0a000002 +CONFIG_THTTPD_SERVER_ADDRESS="http://www.nuttx.org" +CONFIG_THTTPD_SERVER_SOFTWARE="thttpd/2.25b 29dec2003-NuttX" +CONFIG_THTTPD_PATH="/mnt/www" +CONFIG_THTTPD_CGI_PATH="/mnt/www/cgi-bin" +CONFIG_THTTPD_CGI_PATTERN="/mnt/www/cgi-bin/*" +CONFIG_THTTPD_CGI_PRIORITY=50 +CONFIG_THTTPD_CGI_STACKSIZE=1024 +CONFIG_THTTPD_CGI_BYTECOUNT=20000 +CONFIG_THTTPD_CGI_TIMELIMIT=0 +CONFIG_THTTPD_CHARSET="iso-8859-1" +CONFIG_THTTPD_IOBUFFERSIZE=1024 +CONFIG_THTTPD_MINSTRSIZE=64 +CONFIG_THTTPD_REALLOCINCR=64 +CONFIG_THTTPD_MAXREALLOC=4096 +CONFIG_THTTPD_CGIINBUFFERSIZ=512 +CONFIG_THTTPD_CGIOUTBUFFERSIZE=512 +CONFIG_THTTPD_INDEX_NAMES="\"index.html\", \"index.htm\", \"index.cgi\"" +# CONFIG_THTTPD_USE_AUTH_FILE is not set +CONFIG_THTTPD_LISTEN_BACKLOG=8 +CONFIG_THTTPD_LINGER_MSEC=500 +CONFIG_THTTPD_OCCASIONAL_MSEC=120 +CONFIG_THTTPD_IDLE_READ_LIMIT_SEC=300 +CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300 +# CONFIG_THTTPD_USE_TILDE_MAP1 is not set +# CONFIG_THTTPD_USE_TILDE_MAP2 is not set +CONFIG_THTTPD_TILDE_MAP_NONE=y +# CONFIG_THTTPD_GENERATE_INDICES is not set +# CONFIG_THTTPD_USE_URLPATTERN is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/thttpd-nxflat/setenv.sh b/configs/olimex-lpc1766stk/thttpd-nxflat/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..b7dc87b826fa012c564f60db7d877c6001a453df --- /dev/null +++ b/configs/olimex-lpc1766stk/thttpd-nxflat/setenv.sh @@ -0,0 +1,83 @@ +#!/bin/bash +# configs/olimex-lpc1766stk/thttpd/setenv.sh +# +# Copyright (C) 2010, 2014-2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The Olimex-lpc1766stk/tools directory +export LPCTOOL_DIR="${WD}/configs/olimex-lpc1766stk/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-lpc1766stk/tools/olimex.cfg b/configs/olimex-lpc1766stk/tools/olimex.cfg new file mode 100644 index 0000000000000000000000000000000000000000..6ce72864042b0f140c1c3f2e5abeb1698881752a --- /dev/null +++ b/configs/olimex-lpc1766stk/tools/olimex.cfg @@ -0,0 +1,109 @@ +# NXP LPC1766 Cortex-M3 with 256kB Flash and 32kB+32kB Local On-Chip SRAM, + +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +#interface +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG A" +ft2232_layout "olimex-jtag" +ft2232_vid_pid 0x15BA 0x0003 + +# LPC17xx chips support both JTAG and SWD transports. +# Adapt based on what transport is active. +source [find target/swj-dp.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lpc1766 +} + +# After reset the chip is clocked by the ~4MHz internal RC oscillator. +# When board-specific code (reset-init handler or device firmware) +# configures another oscillator and/or PLL0, set CCLK to match; if +# you don't, then flash erase and write operations may misbehave. +# (The ROM code doing those updates cares about core clock speed...) +# +# CCLK is the core clock frequency in KHz +if { [info exists CCLK ] } { + set _CCLK $CCLK +} else { + set _CCLK 4000 +} +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x4ba00477 +} + +if { [info exists CPURAMSIZE] } { + set _CPURAMSIZE $CPURAMSIZE +} else { + set _CPURAMSIZE 0x8000 +} + +if { [info exists CPUROMSIZE] } { + set _CPUROMSIZE $CPUROMSIZE +} else { + set _CPUROMSIZE 0x40000 +} + +#delays on reset lines +adapter_nsrst_delay 200 +jtag_ntrst_delay 200 + +# LPC2000 & LPC1700 -> SRST causes TRST +reset_config trst_and_srst srst_pulls_trst + +#swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID +jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +# openocd-0.4: +# target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME +# openocd-0.7: +target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME + +# LPC1766 has 32kB of SRAM In the ARMv7-M "Code" area (at 0x10000000) +# and 32K more on AHB, in the ARMv7-M "SRAM" area, (at 0x2007c000). +$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_CPURAMSIZE + +# LPC1766 has 256kB of flash memory, managed by ROM code (including a +# boot loader which verifies the flash exception table's checksum). +# flash bank lpc2000 0 0 [calc checksum] +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME lpc2000 0x0 $_CPUROMSIZE 0 0 $_TARGETNAME \ + lpc1700 $_CCLK calc_checksum + +# Run with *real slow* clock by default since the +# boot rom could have been playing with the PLL, so +# we have no idea what clock the target is running at. +# openocd-0.4: +# jtag_khz 100 +# openocd-0.7 +adapter_khz 100 + +$_TARGETNAME configure -event reset-init { + # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select + # "User Flash Mode" where interrupt vectors are _not_ remapped, + # and reside in flash instead). + # + # See Table 612. Memory Mapping Control register (MEMMAP - 0x400F C040) bit description + # Bit Symbol Value Description Reset + # value + # 0 MAP Memory map control. 0 + # 0 Boot mode. A portion of the Boot ROM is mapped to address 0. + # 1 User mode. The on-chip Flash memory is mapped to address 0. + # 31:1 - Reserved. The value read from a reserved bit is not defined. NA + # + # http://ics.nxp.com/support/documents/microcontrollers/?scope=LPC1766&type=user + + mww 0x400FC040 0x01 +} + +# if srst is not fitted use VECTRESET to +# perform a soft reset - SYSRESETREQ is not supported +# openocd-0.7: +cortex_m reset_config vectreset diff --git a/configs/olimex-lpc1766stk/tools/oocd.sh b/configs/olimex-lpc1766stk/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..b7fdba18bccb7b24175459b91b18828d7b60abe1 --- /dev/null +++ b/configs/olimex-lpc1766stk/tools/oocd.sh @@ -0,0 +1,52 @@ +#!/bin/sh +# +# See configs/olimex-lpc1766stk/README.txt for information about +# this file. + +TOPDIR=$1 +USAGE="$0 [-d]" +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +# Assume that OpenOCD was installed and at /usr/local/bin or maybe c:\OpenOCD +#OPENOCD_PATH="/cygdrive/c/OpenOCD/openocd-0.4.0/src" +#TARGET_PATH="c:\OpenOCD\openocd-0.4.0\tcl" +OPENOCD_PATH="/usr/local/bin" +TARGET_PATH="/usr/local/share/openocd/scripts" + +OPENOCD_EXE=openocd.exe +#OPENOCD_CFG=`cygpath -w "${TOPDIR}/configs/olimex-lpc1766stk/tools/olimex.cfg"` +OPENOCD_CFG="${TOPDIR}/configs/olimex-lpc1766stk/tools/olimex.cfg" +OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}" + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +if [ ! -d ${OPENOCD_PATH} ]; then + echo "OpenOCD path does not exist: ${OPENOCD_PATH}" + exit 1 +fi +if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then + echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f ${OPENOCD_CFG} ]; then + echo "OpenOCD config file does not exist: ${OPENOCD_CFG}" + exit 1 +fi + +echo "Starting OpenOCD" +cd ${OPENOCD_PATH} || { echo "Failed to CD to ${OPENOCD_PATH}"; exit 1; } +${OPENOCD_EXE} ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" + + + + diff --git a/configs/olimex-lpc1766stk/tools/usb-driver.txt b/configs/olimex-lpc1766stk/tools/usb-driver.txt new file mode 100644 index 0000000000000000000000000000000000000000..83d7598a5569e5b386da7281f201cfa2f6441ed7 --- /dev/null +++ b/configs/olimex-lpc1766stk/tools/usb-driver.txt @@ -0,0 +1,25 @@ +https://www.olimex.com/dev/pdf/ARM/JTAG/Repair%20Procedure%20for%20OpenOcd-Rev.%20G%20drivers.pdf + +Repair procedure for ARM-USB-OCD drivers + +1. Uninstalling ARM-USB-OCD drivers +------------------------------------- +1.1. Connect your programmer/debugger to your computer, open Device Manager + and uninstall the drivers for ARM-USB-OCD. +1.2. After you have uninstalled ARM-USB-TINY driver from Device Manager, + disconnect the programmer from your computer. +1.3. Now you should download FTClean.exe from here: + http://www.ftdichip.com/Support/Utilities/FTClean.zip. +1.4. After download is complete extract the "*.zip" file, open folder FTClean, + and run FTClean.exe +1.5. Ror VID (Hex) select "Other". And after that fill the first box with 15ba + and "PID (Hex)" with 0004. +1.6. Press "Clean System" button. Make sure that all FTDI devices are + disconnected. (My require administrator privileges). + +2. Re-installing the ARM-USB-OCD driver +--------------------------------------- +2.1 Connect the programmer/debugger to the computer. +2.2 When prompted, browse to the C:\gccfd\DRIVERS\ARM-USB-OCD-DRIVER + directory and install. (A different driver is required for OpenOCD + 0.4.0. That driver is available from the olimex.com web site). diff --git a/configs/olimex-lpc1766stk/usbmsc/Make.defs b/configs/olimex-lpc1766stk/usbmsc/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..01f55f9ce93306fbc257e2d2890b40ea9b350bed --- /dev/null +++ b/configs/olimex-lpc1766stk/usbmsc/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/olimex-lpc1766stk/usbmsc/Make.defs +# +# Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimex-lpc1766stk/usbmsc/defconfig b/configs/olimex-lpc1766stk/usbmsc/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c534bd45561e79b278fb36e3369e1540abc84cc1 --- /dev/null +++ b/configs/olimex-lpc1766stk/usbmsc/defconfig @@ -0,0 +1,791 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +CONFIG_ARCH_CHIP_LPC1766=y +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_ETHERNET is not set +# CONFIG_LPC17_USBHOST is not set +CONFIG_LPC17_USBDEV=y +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +CONFIG_LPC17_SSP1=y +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# USB device driver options +# +CONFIG_LPC17_USBDEV_EP0_MAXSIZE=64 +# CONFIG_LPC17_USBDEV_FRAME_INTERRUPT is not set +# CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT is not set +CONFIG_LPC17_USBDEV_NDMADESCRIPTORS=0 +# CONFIG_LPC17_USBDEV_DMA is not set +# CONFIG_LPC17_USBDEV_NOVBUS is not set +# CONFIG_LPC17_USBDEV_NOLED is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8111 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC1766STK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-lpc1766stk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="msconn_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +CONFIG_USBMSC=y +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=2 +CONFIG_USBMSC_EPBULKIN=5 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=256 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" +CONFIG_USBMSC_VERSIONNO=0x0399 +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=2048 +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +CONFIG_SYSTEM_USBMSC=y +CONFIG_SYSTEM_USBMSC_NLUNS=1 +CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mmcsd0" +CONFIG_SYSTEM_USBMSC_DEVMINOR2=1 +CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_USBMSC_DEVMINOR3=2 +CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" +# CONFIG_SYSTEM_USBMSC_DEBUGMM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/usbmsc/setenv.sh b/configs/olimex-lpc1766stk/usbmsc/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..2f2bc2d8d8516dbd97d99a968cfca19a74f951ea --- /dev/null +++ b/configs/olimex-lpc1766stk/usbmsc/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/olimex-lpc1766stk/usbmsc/setenv.sh +# +# Copyright (C) 2010, 2014-2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The Olimex-lpc1766stk/tools directory +export LPCTOOL_DIR="${WD}/configs/olimex-lpc1766stk/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-lpc1766stk/usbserial/Make.defs b/configs/olimex-lpc1766stk/usbserial/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6d17a6ae4977b6a551f61da89539bcc6309d8039 --- /dev/null +++ b/configs/olimex-lpc1766stk/usbserial/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/olimex-lpc1766stk/usbserial/Make.defs +# +# Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimex-lpc1766stk/usbserial/defconfig b/configs/olimex-lpc1766stk/usbserial/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..90b9bfad37511fe9b92d52437a79860b4a9d249e --- /dev/null +++ b/configs/olimex-lpc1766stk/usbserial/defconfig @@ -0,0 +1,815 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +CONFIG_ARCH_CHIP_LPC1766=y +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_ETHERNET is not set +# CONFIG_LPC17_USBHOST is not set +CONFIG_LPC17_USBDEV=y +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# USB device driver options +# +CONFIG_LPC17_USBDEV_EP0_MAXSIZE=64 +# CONFIG_LPC17_USBDEV_FRAME_INTERRUPT is not set +# CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT is not set +CONFIG_LPC17_USBDEV_NDMADESCRIPTORS=0 +# CONFIG_LPC17_USBDEV_DMA is not set +# CONFIG_LPC17_USBDEV_NOVBUS is not set +# CONFIG_LPC17_USBDEV_NOLED is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8111 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC1766STK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-lpc1766stk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="usbserial_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +CONFIG_PL2303=y +# CONFIG_PL2303_CONSOLE is not set +CONFIG_PL2303_EPINTIN=1 +CONFIG_PL2303_EPBULKOUT=2 +CONFIG_PL2303_EPBULKIN=5 +CONFIG_PL2303_EP0MAXPACKET=64 +CONFIG_PL2303_NWRREQS=4 +CONFIG_PL2303_NRDREQS=4 +CONFIG_PL2303_BULKIN_REQLEN=96 +CONFIG_PL2303_RXBUFSIZE=512 +CONFIG_PL2303_TXBUFSIZE=512 +CONFIG_PL2303_VENDORID=0x067b +CONFIG_PL2303_PRODUCTID=0x2303 +CONFIG_PL2303_VENDORSTR="Nuttx" +CONFIG_PL2303_PRODUCTSTR="USBdev Serial" +# CONFIG_CDCACM is not set +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +CONFIG_EXAMPLES_USBSERIAL=y +CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512 +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/usbserial/setenv.sh b/configs/olimex-lpc1766stk/usbserial/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..90049ced75fe94dcb10ad818fc30ba8c210df3cc --- /dev/null +++ b/configs/olimex-lpc1766stk/usbserial/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/olimex-lpc1766stk/usbserial/setenv.sh +# +# Copyright (C) 2010, 2014-2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The Olimex-lpc1766stk/tools directory +export LPCTOOL_DIR="${WD}/configs/olimex-lpc1766stk/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-lpc1766stk/zmodem/Make.defs b/configs/olimex-lpc1766stk/zmodem/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..a48683a886441516e053fe2ab665ff632e33c941 --- /dev/null +++ b/configs/olimex-lpc1766stk/zmodem/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/olimex-lpc1766stk/zmodem/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimex-lpc1766stk/zmodem/defconfig b/configs/olimex-lpc1766stk/zmodem/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..9a1e0933a8f7984aeec49c3b85abeac827a757f0 --- /dev/null +++ b/configs/olimex-lpc1766stk/zmodem/defconfig @@ -0,0 +1,1115 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +CONFIG_ARCH_CHIP_LPC1766=y +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +CONFIG_LPC17_UART1=y +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +CONFIG_LPC17_SSP1=y +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# +# CONFIG_UART1_RINGINDICATOR is not set + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=7296 +CONFIG_NET_NTXDESC=6 +CONFIG_NET_NRXDESC=6 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8111 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC1766STK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-lpc1766stk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=1 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +CONFIG_ETH0_PHY_KS8721=y +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=1024 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=2400 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_UART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +CONFIG_NET_TCP_SPLIT=y +CONFIG_NET_TCP_SPLIT_SIZE=40 +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +CONFIG_NXFLAT=y +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +CONFIG_PIC=y +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +CONFIG_SYSTEM_ZMODEM=y +CONFIG_SYSTEM_ZMODEM_DEVNAME="/dev/ttyS1" +CONFIG_SYSTEM_ZMODEM_RCVBUFSIZE=256 +CONFIG_SYSTEM_ZMODEM_PKTBUFSIZE=1024 +CONFIG_SYSTEM_ZMODEM_SNDBUFSIZE=512 +CONFIG_SYSTEM_ZMODEM_MOUNTPOINT="/mnt/sdcard" +# CONFIG_SYSTEM_ZMODEM_RCVSAMPLE is not set +# CONFIG_SYSTEM_ZMODEM_SENDATTN is not set +CONFIG_SYSTEM_ZMODEM_ALWAYSSINT=y +# CONFIG_SYSTEM_ZMODEM_SENDBRAK is not set +CONFIG_SYSTEM_ZMODEM_RESPTIME=20 +CONFIG_SYSTEM_ZMODEM_CONNTIME=30 +CONFIG_SYSTEM_ZMODEM_SERIALNO=0 +CONFIG_SYSTEM_ZMODEM_MAXERRORS=20 +CONFIG_SYSTEM_ZMODEM_WRITESIZE=512 +# CONFIG_DEBUG_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/zmodem/setenv.sh b/configs/olimex-lpc1766stk/zmodem/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..341ef38d6f6cf72020ea4e0b960d1e81b4788ded --- /dev/null +++ b/configs/olimex-lpc1766stk/zmodem/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/olimex-lpc1766stk/zmodem/setenv.sh +# +# Copyright (C) 2013-2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The Olimex-lpc1766stk/tools directory +export LPCTOOL_DIR="${WD}/configs/olimex-lpc1766stk/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-lpc2378/Kconfig b/configs/olimex-lpc2378/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..1e8c84c2839b954d45f6f99e01d3d26a00c76f2e --- /dev/null +++ b/configs/olimex-lpc2378/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# +# + +if ARCH_BOARD_OLIMEXLPC2378 +endif diff --git a/configs/olimex-lpc2378/README.txt b/configs/olimex-lpc2378/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..9b28f1b3fb604b9f5c7f46f63ad30623d5316ca0 --- /dev/null +++ b/configs/olimex-lpc2378/README.txt @@ -0,0 +1,11 @@ +There's not much here: + +EXT1 - P3 0:7 are used for LEDs. + +UEXT pin 3/4 -TXD2/RXD2- is UART2. + +The board I have has the revision '-' of LPC2378 even though I got the board +more than 2 years after the chip revision was released :-( . +I can't get Nuttx to work if I fully enabled the MAM. + +I used FTDI ft232 usb-serial with nsh piping as seen on the screenshot. diff --git a/configs/olimex-lpc2378/include/board.h b/configs/olimex-lpc2378/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..e076da6a5b3d304f52085cc7cb4a1bae6bf4ee26 --- /dev/null +++ b/configs/olimex-lpc2378/include/board.h @@ -0,0 +1,87 @@ +/**************************************************************************** + * configs/olimex-lpc2378/include/board.h + * + * Copyright (C) 2010 Rommel Marcelo. All rights reserved. + * Author: Rommel Marcelo + * + * This is part of the NuttX RTOS and based on the LPC2148 port: + * + * Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_OLIMEX_LPC2378_INCLUDE_BOARD_H +#define __CONFIGS_OLIMEX_LPC2378_INCLUDE_BOARD_H + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* If USB is enabled, PLL must be configured for 48MHz to provide USB + * clocking. + * + * F_pll = (2 * M * F_in) / N + * F_out = ((2 * (PLL_M + 1) * FOSC)/(PLL_N + 1))/(CCLK_DIV + 1) + * + * With PLL_M=11, PLL_N=0, CCLK_DIV=4: + * + * F_out = ((2 * (11 + 1) * 12000000)/(0 + 1))/(4 + 1) + * = 288,000,000 / 5 = 57,600,000 Hz + */ + +#define FOSC (12000000) /* Oscillator frequency */ +#define FCCO (288000000) /* CPU CCO clock */ +#define CCLK (57600000) /* CPU running clock */ + +#define PLL_M 11 +#define PLL_N 0 + +#define CCLK_DIV 4 +#define USBCLK_DIV 6 + +#define LPC23XX_CCLK 57600000 + + /* LED definitions **********************************************************/ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +#endif /* __CONFIGS_OLIMEX_LPC2378_INCLUDE_BOARD_H */ diff --git a/configs/olimex-lpc2378/nsh/Make.defs b/configs/olimex-lpc2378/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..d5c026545c47873aba5ff6874fdeb9981038c5d4 --- /dev/null +++ b/configs/olimex-lpc2378/nsh/Make.defs @@ -0,0 +1,130 @@ +############################################################################## +# configs/olimex-lpc2378/nsh/Make.defs +# +# Copyright (C) 2010 Rommel Marcelo. All rights reserved. +# Author: Rommel Marcelo +# +# This is part of the NuttX RTOS and based on the LPC2148 port: +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(ARCHCCMAJOR),4) +ifneq ($(HOSTOS),Cygwin) + OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment +endif +endif + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/olimex-lpc2378/nsh/defconfig b/configs/olimex-lpc2378/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..63e4b7cb5620dcfb28bfc4d9478500b829867045 --- /dev/null +++ b/configs/olimex-lpc2378/nsh/defconfig @@ -0,0 +1,785 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +CONFIG_ARCH_CHIP_LPC2378=y +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="lpc2378" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARM_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set + +# +# LPC2378 Configuration Options +# +CONFIG_LPC2378_DEFAULT_MODE=y +CONFIG_LPC2378_CODE_BASE=0x00000000 +CONFIG_LPC2378_PLL_SETUP=y +CONFIG_LPC2378_PLL_CLKSRC=1 +CONFIG_LPC2378_MAM_SETUP=y +CONFIG_LPC2378_MAMCR_VALUE=1 +CONFIG_LPC2378_MAMTIM_VALUE=3 + +# +# LPC2378 Peripheral Support +# +CONFIG_LPC2378_UART0=y +# CONFIG_LPC2378_UART1 is not set +CONFIG_LPC2378_UART2=y +# CONFIG_LPC2378_UART3 is not set +# CONFIG_LPC2378_I2C0 is not set +# CONFIG_LPC2378_I2C1 is not set +# CONFIG_LPC2378_I2C2 is not set +# CONFIG_LPC2378_SPI is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=3270 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x40000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_OLIMEXLPC2378=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-lpc2378" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=4 +CONFIG_START_DAY=8 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +CONFIG_ARCH_HAVE_UART2=y +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=128 +CONFIG_UART0_TXBUFSIZE=128 +CONFIG_UART0_BAUD=9600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set + +# +# UART2 Configuration +# +CONFIG_UART2_RXBUFSIZE=256 +CONFIG_UART2_TXBUFSIZE=256 +CONFIG_UART2_BAUD=576000 +CONFIG_UART2_BITS=8 +CONFIG_UART2_PARITY=0 +CONFIG_UART2_2STOP=0 +# CONFIG_UART2_IFLOWCONTROL is not set +# CONFIG_UART2_OFLOWCONTROL is not set +# CONFIG_UART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc2378/nsh/setenv.sh b/configs/olimex-lpc2378/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..6e87533e7036c4b6f01826e68aaacdb6095182a4 --- /dev/null +++ b/configs/olimex-lpc2378/nsh/setenv.sh @@ -0,0 +1,68 @@ +#!/bin/bash +# configs/olimex-lpc2378/ostest/setenv.sh +# +# Copyright (C) 2010 Rommel Marcelo. All rights reserved. +# Author: Rommel Marcelo +# +# This is part of the NuttX RTOS and based on the LPC2148 port: +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-lpc2378/scripts/ld.script b/configs/olimex-lpc2378/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..8434249b6e97b1eb4f72a9520360fccc6279955d --- /dev/null +++ b/configs/olimex-lpc2378/scripts/ld.script @@ -0,0 +1,165 @@ +/**************************************************************************** + * configs/olimex-lpc2378/scripts/ld.script + * + * Copyright (C) 2010 Rommel Marcelo. All rights reserved. + * Author: Rommel Marcelo + * + * This is part of the NuttX RTOS and based on the LPC2148 port: + * + * Copyright (C) 2010, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +MEMORY +{ + ROM (rx) : ORIGIN = 0x00000000, LENGTH = (512k-8k) /* Flash: 512k - boot code */ + RAM (rw) : ORIGIN = 0x40000000, LENGTH = (32k-32) /* SRAM: 32k - IAP work */ + URAM (rw) : ORIGIN = 0x7FD00000, LENGTH = (8k) /* USB RAM: 8k */ + ERAM (rw) : ORIGIN = 0x7FE00000, LENGTH = (16k) /* Ethernet RAM: 16k */ + BRAM (rw) : ORIGIN = 0xE0084000, LENGTH = (2k) /* Battery RAM: 2k */ +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > ROM + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > ROM + + .ARM.extab : { + *(.ARM.extab*) + } > ROM + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > ROM + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > RAM AT > ROM + +/* .bss section which is initialized by 0 */ + /* This section will be filled with zero by startup code */ + .bss (NOLOAD) : + { + _sbss = ABSOLUTE(.) ; + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > RAM + + .usbram (NOLOAD) : + { + __usbram_start = . ; + __usbram_start__ = . ; + *(.usbram) + . = ALIGN(4); + } > URAM + + .etherram (NOLOAD) : + { + __etherram_start = . ; + __etherram_start__ = . ; + *(.etherram) + . = ALIGN(4); + } > ERAM + + .batteryram (NOLOAD) : + { + __batteryram_start = . ; + __batteryram_start__ = . ; + *(.batteryram) + . = ALIGN(4); + } > BRAM + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/configs/olimex-lpc2378/src/.gitignore b/configs/olimex-lpc2378/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/olimex-lpc2378/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/olimex-lpc2378/src/Makefile b/configs/olimex-lpc2378/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..eb898252365bd6ed5214e2e707197fe9d3b67d5a --- /dev/null +++ b/configs/olimex-lpc2378/src/Makefile @@ -0,0 +1,50 @@ +############################################################################ +# configs/mcu123-lpc214x/src/Makefile +# +# Copyright (C) 2010 Rommel Marcelo. All rights reserved. +# Author: Rommel Marcelo +# +# This is part of the NuttX RTOS and based on the LPC2148 port: +# +# Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc2378_leds.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc2378_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/olimex-lpc2378/src/lpc2378_appinit.c b/configs/olimex-lpc2378/src/lpc2378_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..6f7e8b194f67a36220b6dac3e49a8e4d6305fb69 --- /dev/null +++ b/configs/olimex-lpc2378/src/lpc2378_appinit.c @@ -0,0 +1,98 @@ +/**************************************************************************** + * config/olimex-lpc2378/src/lpc2378_appinit.c + * + * Copyright (C) 2010 Rommel Marcelo. All rights reserved. + * Author: Rommel Marcelo + * + * This is part of the NuttX RTOS and based on the LPC2148 port: + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#undef NSH_HAVEUSBDEV +#undef NSH_HAVEMMCSD + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef NSH_HAVEMMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + return OK; +} diff --git a/configs/olimex-lpc2378/src/lpc2378_leds.c b/configs/olimex-lpc2378/src/lpc2378_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..39929f45452eb4c76dd8621f1e8ff2c6506aafdb --- /dev/null +++ b/configs/olimex-lpc2378/src/lpc2378_leds.c @@ -0,0 +1,134 @@ +/**************************************************************************** + * configs/olimex-lpc2378/src/lpc2378_leds.c + * + * Copyright (C) 2010 Rommel Marcelo. All rights reserved. + * Author: Rommel Marcelo + * + * This is part of the NuttX RTOS and based on the LPC2148 port: + * + * Copyright (C) 2010, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* P3.0 : P0.7 PINSEL6 LEDS 1-8 */ + +#define LEDBIT(led) (0x01 << (led)) +#define ALL_LEDS (0xff) +#define STATLED (0x08) + +#define putled8(v,o) putreg8((v), (LPC23XX_FIO_BASE+(o))) +#define putled32(v,r) putreg32((v),(LPC23XX_FIO_BASE+(r))) +#define CLRLEDS putled(ALL_LEDS,FIO3CLR0_OFFSET) + +#define LED_SET_OFFSET FIO3SET0_OFFSET +#define LED_CLR_OFFSET FIO3CLR0_OFFSET +#define LED_DIR_OFFSET FIO3DIR0_OFFSET +#define LED_MASK_OFFSET FIO3MASK0_OFFSET + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + /* Initialize GIOs P1.16-P1.23 */ + + putled8(ALL_LEDS, LED_DIR_OFFSET); + putled8(ALL_LEDS, LED_CLR_OFFSET); + putled8(LEDBIT(0), LED_SET_OFFSET); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + putled8(~(LEDBIT(led)), LED_MASK_OFFSET); + putled8(LEDBIT(led), LED_SET_OFFSET); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + putled8(LEDBIT(led), LED_CLR_OFFSET); +} + +/**************************************************************************** + * olimex board STATUS LED + ****************************************************************************/ + +void lpc2378_statledoff(void) +{ + putled8(~STATLED, FIO1MASK2_OFFSET); + putled8(STATLED, FIO1CLR2_OFFSET); +} + +void lpc2378_statledon(void) +{ + putled8(~STATLED, FIO1MASK2_OFFSET); + putled8(STATLED, FIO1SET2_OFFSET); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/olimex-stm32-h405/Kconfig b/configs/olimex-stm32-h405/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..40b1e933cdac9458c8bd8aa0536987370a2b495d --- /dev/null +++ b/configs/olimex-stm32-h405/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_OLIMEX_STM32H405 + +endif diff --git a/configs/olimex-stm32-h405/README.txt b/configs/olimex-stm32-h405/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..1eaf4bc6dd38a2d2aeb8366bbb98c45035de58fc --- /dev/null +++ b/configs/olimex-stm32-h405/README.txt @@ -0,0 +1,28 @@ +README +====== + +The NuttX configuration for the Olimex STM32-H405 is based on the configuration +Olimex STM32-P207. + +It was tested with the NuttX EABI "buildroot" Toolchain. + +Debugging with OpenOCD via an Olimex ARM-USB-TINY-H works. Note that +CONFIG_DEBUG_SYMBOLS and CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG +are enabled so that the JTAG connection is not disconnected by the idle +loop. + +Make sure that '# CONFIG_NSH_CONDEV is not set' is in the .config file - it defaults +to '/dev/console' which makes problems with the shell over USB. + +The following peripherals are enabled in this configuration. + - LED: Shows the sytem status + + - Button: Built in app 'buttons' works. + + - ADC: ADC1 samples ADC_IN1. Built in app 'adc' works. + + - USB-FS-OTG: The console is running on the virtual serial port. Note that you + have to press enter three times until NSH appears. + + - CAN: Built in app 'can' is enabled but not tested, since no CAN transceiver + is on board. \ No newline at end of file diff --git a/configs/olimex-stm32-h405/include/board.h b/configs/olimex-stm32-h405/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..462d34751d8890443f12a344c5a495cc4201742e --- /dev/null +++ b/configs/olimex-stm32-h405/include/board.h @@ -0,0 +1,219 @@ +/************************************************************************************ + * configs/olimex-stm32-h405/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_OLIMEX_STM32_H405_INCLUDE_BOARD_H +#define __CONFIGS_OLIMEX_STM32_H405_INCLUDE_BOARD_H 1 + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif +#include "stm32_rcc.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC (30-60KHz, uncalibrated) + * HSE - On-board crystal frequency is 8MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 8000000ul + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* Main PLL Configuration. + * + * PLL source is HSE + * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN + * = (25,000,000 / 12) * 360 + * = 240,000,000 + * SYSCLK = PLL_VCO / PLLP + * = 240,000,000 / 2 = 120,000,000 + * USB OTG FS, SDIO and RNG Clock + * = PLL_VCO / PLLQ + * = 240,000,000 / 5 = 48,000,000 + * = 48,000,000 + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(12) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(360) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(5) + +#define STM32_SYSCLK_FREQUENCY 120000000ul + +/* AHB clock (HCLK) is SYSCLK (120MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/4 (30MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) + +/* Timers driven from APB1 will be twice PCLK1 (60Mhz)*/ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 (60MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 (120Mhz)*/ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the status LED in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED_STATUS 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_STATUS_BIT (1 << BOARD_LED1) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the status LED of the + * Olimex STM32-H405. The following definitions describe how NuttX controls the LEDs: + */ + +#define LED_STARTED 0 /* LED_STATUS on */ +#define LED_HEAPALLOCATE 1 /* no change */ +#define LED_IRQSENABLED 2 /* no change */ +#define LED_STACKCREATED 3 /* no change */ +#define LED_INIRQ 4 /* no change */ +#define LED_SIGNAL 5 /* no change */ +#define LED_ASSERTION 6 /* LED_STATUS off */ +#define LED_PANIC 7 /* LED_STATUS blinking */ + +/* Button definitions ***************************************************************/ +/* The Olimex STM32-H405 supports one buttons: */ + +#define BUTTON_BUT 0 +#define NUM_BUTTONS 1 + +#define BUTTON_BUT_BIT (1 << BUTTON_BUT) + +/* Alternate function pin selections ************************************************/ + +//USART3: +#define GPIO_USART3_RX GPIO_USART3_RX_1 //PB11 +#define GPIO_USART3_TX GPIO_USART3_TX_1 //PB10 +#define GPIO_USART3_CTS GPIO_USART3_CTS_1 //PB13 +#define GPIO_USART3_RTS GPIO_USART3_RTS_1 //PB14 + +//CAN: +#define GPIO_CAN1_RX GPIO_CAN1_RX_2 //PB8 +#define GPIO_CAN1_TX GPIO_CAN1_TX_2 //PB9 +#define GPIO_CAN2_RX GPIO_CAN1_RX_2 //PB5 +#define GPIO_CAN2_TX GPIO_CAN1_TX_2 //PB6 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_OLIMEX_STM32_H405_INCLUDE_BOARD_H */ diff --git a/configs/olimex-stm32-h405/scripts/ld.script b/configs/olimex-stm32-h405/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..508d49e59c85575ff1815f5a7cc25b949d94e38f --- /dev/null +++ b/configs/olimex-stm32-h405/scripts/ld.script @@ -0,0 +1,122 @@ +/**************************************************************************** + * configs/olimex-stm32-h405/scripts/ld.script + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F405RGT6 has 1024Kb of FLASH beginning at address 0x0800:0000 and + * 192Kb of SRAM. SRAM is split up into two blocks: + * + * 1) 112Kb of SRAM beginning at address 0x2000:0000 + * 2) 16Kb of SRAM beginning at address 0x2001:c000 + 3) 64Kb of SRAM beginning at address 0x2002:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/olimex-stm32-h405/src/Makefile b/configs/olimex-stm32-h405/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..c7133219c5de42755b03ff8e958156f0e919a90a --- /dev/null +++ b/configs/olimex-stm32-h405/src/Makefile @@ -0,0 +1,67 @@ +############################################################################ +# configs/olimex-stm32-h405/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_STM32_OTGFS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_NSH_LIBRARY),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += stm32_adc.c +endif + +ifeq ($(CONFIG_CAN),y) +CSRCS += stm32_can.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/olimex-stm32-h405/src/olimex-stm32-h405.h b/configs/olimex-stm32-h405/src/olimex-stm32-h405.h new file mode 100644 index 0000000000000000000000000000000000000000..0ae22a4e2af9c649f353da43749dbdb5db7b0e9c --- /dev/null +++ b/configs/olimex-stm32-h405/src/olimex-stm32-h405.h @@ -0,0 +1,116 @@ +/**************************************************************************** + * configs/olimex-stm32-h405/src/olimex-stm32-h405.h + * + * Copyright (C) 2014 Max Holtzberg. All rights reserved. + * Author: Max Holtzberg + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_OLIMEX_STM32_H405_SRC_H +#define __CONFIGS_OLIMEX_STM32_H405_SRC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Olimex-STM32-P405 GPIOs ****************************************************/ +/* LEDs */ + +#define GPIO_LED_STATUS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN12) + +/* BUTTONS -- NOTE that all have EXTI interrupts configured */ + +#define MIN_IRQBUTTON BUTTON_BUT +#define MAX_IRQBUTTON BUTTON_BUT +#define NUM_IRQBUTTONS 1 + +#define GPIO_BTN_BUT (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0) + +/* USB OTG FS + * + * PC4 OTG_FS_VBUS VBUS sensing + */ + +#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN4) + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in initialization to setup USB-related + * GPIO pins for the Olimex-STM32-H405 board. + * + ************************************************************************************/ + +#ifdef CONFIG_STM32_OTGFS +void weak_function stm32_usbinitialize(void); +#endif + +/************************************************************************************ + * Name: stm32_adc_initialize + * + * Description: + * Called at application startup time to initialize the ADC functionality. + * + ************************************************************************************/ + +#ifdef CONFIG_ADC +int stm32_adc_initialize(void); +#endif + +/************************************************************************************ + * Name: stm32_can_initialize + * + * Description: + * Called at application startup time to initialize the CAN functionality. + * + ************************************************************************************/ + +#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)) +int stm32_can_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_OLIMEX_STM32_H405_SRC_H */ diff --git a/configs/olimex-stm32-h405/src/stm32_adc.c b/configs/olimex-stm32-h405/src/stm32_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..cc3a9ef0edbe795a6c6424af236b1f8b124ec7ae --- /dev/null +++ b/configs/olimex-stm32-h405/src/stm32_adc.c @@ -0,0 +1,187 @@ +/************************************************************************************ + * configs/olimex-stm32-h405/src/stm32_adc.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "stm32_adc.h" +#include "olimex-stm32-h405.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Configuration ********************************************************************/ +/* Up to 3 ADC interfaces are supported */ + +#if STM32_NADC < 3 +# undef CONFIG_STM32_ADC3 +#endif + +#if STM32_NADC < 2 +# undef CONFIG_STM32_ADC2 +#endif + +#if STM32_NADC < 1 +# undef CONFIG_STM32_ADC1 +#endif + +#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3) +#ifndef CONFIG_STM32_ADC1 +# warning "Channel information only available for ADC1" +#endif + +/* The number of ADC channels in the conversion list */ + +#define ADC1_NCHANNELS 1//14 + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* The Olimex STM32-P405 has a 10 Kohm potentiometer AN_TR connected to PC0 + * ADC123_IN10 + */ + +/* Identifying number of each ADC channel: Variable Resistor. */ + +#ifdef CONFIG_STM32_ADC1 +static const uint8_t g_chanlist[ADC1_NCHANNELS] = {1};/*, 2, 3, + 4, 5, 6, + 7, 8, 9, + 10, 11, 12, + 13, 15};*/ + +/* Configurations of pins used byte each ADC channels */ + +static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN1};/*, GPIO_ADC1_IN2, GPIO_ADC1_IN3, + GPIO_ADC1_IN4, GPIO_ADC1_IN5, GPIO_ADC1_IN6, + GPIO_ADC1_IN7, GPIO_ADC1_IN8, GPIO_ADC1_IN9, + GPIO_ADC1_IN10, GPIO_ADC1_IN11, GPIO_ADC1_IN12, + GPIO_ADC1_IN13, GPIO_ADC1_IN15};*/ +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ + return stm32_adc_initialize(); +} + +/************************************************************************************ + * Name: stm32_adc_initialize + * + * Description: + * Called at application startup time to initialize the ADC functionality. + * + ************************************************************************************/ + +int stm32_adc_initialize(void) +{ +#ifdef CONFIG_STM32_ADC1 + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + int i; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Configure the pins as analog inputs for the selected channels */ + + for (i = 0; i < ADC1_NCHANNELS; i++) + { + stm32_configgpio(g_pinlist[i]); + } + + /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + + adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +#else + return -ENOSYS; +#endif +} + +#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */ +#endif /* CONFIG_ADC */ diff --git a/configs/olimex-stm32-h405/src/stm32_appinit.c b/configs/olimex-stm32-h405/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..623d9e342898f40ca75a1a088520d908df351910 --- /dev/null +++ b/configs/olimex-stm32-h405/src/stm32_appinit.c @@ -0,0 +1,114 @@ +/**************************************************************************** + * config/olimex-stm32-h405/src/stm32_appinit.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#ifdef CONFIG_STM32_OTGFS +# include "stm32_usbhost.h" +#endif + +#include "stm32.h" +#include "olimex-stm32-h405.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#if !defined(CONFIG_STM32_CAN1) && !defined(CONFIG_STM32_CAN2) +# undef CONFIG_CAN +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + * CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + * CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, && + * CONFIG_LIB_BOARDCTL=n : + * Called from board_initialize(). + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(CONFIG_CAN) || defined(CONFIG_ADC) + int ret; +#endif + +#ifdef CONFIG_CAN + /* Configure on-board CAN if CAN support has been selected. */ + + ret = stm32_can_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize CAN: %d\n", ret); + } +#endif + +#ifdef CONFIG_ADC + /* Configure on-board ADCs if ADC support has been selected. */ + + ret = stm32_adc_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize ADC: %d\n", ret); + } +#endif + + return OK; +} diff --git a/configs/olimex-stm32-h405/src/stm32_autoleds.c b/configs/olimex-stm32-h405/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..32117cdf276131cca1c8e3ac46b76f745a52e817 --- /dev/null +++ b/configs/olimex-stm32-h405/src/stm32_autoleds.c @@ -0,0 +1,119 @@ +/**************************************************************************** + * configs/olimex-stm32-h405/src/stm32_autoleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "stm32.h" +#include "olimex-stm32-h405.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED_STATUS GPIO for output */ + + stm32_configgpio(GPIO_LED_STATUS); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if(led == LED_STARTED) + stm32_gpiowrite(GPIO_LED_STATUS, true); + + if(led == LED_ASSERTION || led == LED_PANIC) + stm32_gpiowrite(GPIO_LED_STATUS, false); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if(led == LED_STARTED) + stm32_gpiowrite(GPIO_LED_STATUS, false); + + if(led == LED_ASSERTION || led == LED_PANIC) + stm32_gpiowrite(GPIO_LED_STATUS, true); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/olimex-stm32-h405/src/stm32_boot.c b/configs/olimex-stm32-h405/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..f057314fb49bd7e8579aa478dd060eda93401c31 --- /dev/null +++ b/configs/olimex-stm32-h405/src/stm32_boot.c @@ -0,0 +1,124 @@ +/************************************************************************************ + * configs/olimex-stm32-h405/src/stm32_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "olimex-stm32-h405.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Initialize USB if the 1) OTG FS controller is in the configuration and 2) + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. Presumeably either CONFIG_USBDEV is also selected. + */ + +#ifdef CONFIG_STM32_OTGFS + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + + /* Configure on-board BUTTONs if BUTTON support has been selected. */ + +#ifdef CONFIG_ARCH_BUTTONS + board_button_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intitialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + board_app_initialize(); +#endif +} +#endif diff --git a/configs/olimex-stm32-h405/src/stm32_buttons.c b/configs/olimex-stm32-h405/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..aefe40fc8c3eee01ed158d41ab12643e24ca99dc --- /dev/null +++ b/configs/olimex-stm32-h405/src/stm32_buttons.c @@ -0,0 +1,158 @@ +/**************************************************************************** + * configs/olimex-stm32-h405/src/stm32_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "olimex-stm32-h405.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* Pin configuration for each Olimex-STM32-H405 button. This array is indexed by + * the BUTTON_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_BUT +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + + /* Check that state of each key */ + + if (!stm32_gpioread(g_buttons[BUTTON_BUT])) + { + ret |= BUTTON_BUT_BIT; + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/olimex-stm32-h405/src/stm32_can.c b/configs/olimex-stm32-h405/src/stm32_can.c new file mode 100644 index 0000000000000000000000000000000000000000..6443bdb88d9ee1bb87b323fe7576a30461a8be22 --- /dev/null +++ b/configs/olimex-stm32-h405/src/stm32_can.c @@ -0,0 +1,149 @@ +/************************************************************************************ + * configs/olimex-stm32-405/src/stm32_can.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include "stm32.h" +#include "stm32_can.h" +#include "olimex-stm32-h405.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2) +# warning "Both CAN1 and CAN2 are enabled. Only CAN1 is used." +# undef CONFIG_STM32_CAN2 +#endif + +#ifdef CONFIG_STM32_CAN1 +# define CAN_PORT 1 +#else +# define CAN_PORT 2 +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + return stm32_can_initialize(); +} + +/**************************************************************************************************** + * Name: stm32_can_initialize + * + * Description: + * Called at application startup time to initialize the CAN functionality. + * + ****************************************************************************************************/ + +int stm32_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = stm32_caninitialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && (CONFIG_STM32_CAN1 || CONFIG_STM32_CAN2) */ diff --git a/configs/olimex-stm32-h405/src/stm32_usb.c b/configs/olimex-stm32-h405/src/stm32_usb.c new file mode 100644 index 0000000000000000000000000000000000000000..438821fec29764e746c73a6ad11a3ab2b671b3b7 --- /dev/null +++ b/configs/olimex-stm32-h405/src/stm32_usb.c @@ -0,0 +1,117 @@ +/************************************************************************************ + * configs/olimex-stm32-h405/src/stm32_usbdev.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include "stm32.h" +#include "stm32_otgfs.h" +#include "olimex-stm32-h405.h" + +#ifdef CONFIG_STM32_OTGFS + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if defined(CONFIG_USBDEV) +# define HAVE_USB 1 +#else +# warning "CONFIG_STM32_OTGFS is enabled but not CONFIG_USBDEV" +# undef HAVE_USB +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the STM32F4Discovery board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + /* The OTG FS has an internal soft pull-up. No GPIO configuration is required */ + + /* Configure the OTG FS VBUS sensing GPIO */ + +#ifdef CONFIG_STM32_OTGFS + stm32_configgpio(GPIO_OTGFS_VBUS); +#endif +} + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} +#endif + +#endif /* CONFIG_STM32_OTGFS */ diff --git a/configs/olimex-stm32-h405/src/stm32_userleds.c b/configs/olimex-stm32-h405/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..8cbbcbd27d920524868c2e6cce8e9e58d0f53dab --- /dev/null +++ b/configs/olimex-stm32-h405/src/stm32_userleds.c @@ -0,0 +1,113 @@ +/**************************************************************************** + * configs/olimex-stm32-h405/src/stm32_leds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include "stm32.h" +#include "olimex-stm32-h405.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* This array maps an LED number to GPIO pin configuration */ + +static uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED_STATUS +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED_STATUS); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + stm32_gpiowrite(g_ledcfg[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LED_STATUS, (ledset & BOARD_LED1_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/olimex-stm32-h405/usbnsh/Make.defs b/configs/olimex-stm32-h405/usbnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f9dc1ee405977508998acb9cc00182056ea789c7 --- /dev/null +++ b/configs/olimex-stm32-h405/usbnsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/olimex-stm32-h405/usbnsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -gdwarf-2 +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/olimex-stm32-h405/usbnsh/defconfig b/configs/olimex-stm32-h405/usbnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..4b3b04b27bd123171be5e468cc1be1f40cf64e35 --- /dev/null +++ b/configs/olimex-stm32-h405/usbnsh/defconfig @@ -0,0 +1,1232 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_CAN_EXTID is not set +CONFIG_CAN1_BAUD=250000 +CONFIG_CAN_TSEG1=6 +CONFIG_CAN_TSEG2=8 +# CONFIG_CAN_LOOPBACK is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +CONFIG_ARCH_CHIP_STM32F405RG=y +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +CONFIG_STM32_STM32F405=y +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +CONFIG_STM32_ADC1=y +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +CONFIG_STM32_CAN1=y +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +CONFIG_STM32_OTGFS=y +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +CONFIG_STM32_TIM1=y +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_ADC=y +CONFIG_STM32_CAN=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_PWM is not set +CONFIG_STM32_TIM1_ADC=y +CONFIG_STM32_TIM1_ADC1=y +CONFIG_HAVE_ADC1_TIMER=y +CONFIG_STM32_ADC1_SAMPLE_FREQUENCY=100 +CONFIG_STM32_ADC1_TIMTRIG=0 +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set + +# +# ADC Configuration +# +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# CAN driver configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_OLIMEX_STM32H405=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-stm32-h405" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +CONFIG_BOARDCTL_ADCTEST=y +# CONFIG_BOARDCTL_PWMTEST is not set +CONFIG_BOARDCTL_CANINIT=y +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +CONFIG_CAN=y +# CONFIG_ARCH_HAVE_CAN_ERRORS is not set +# CONFIG_CAN_FD is not set +CONFIG_CAN_FIFOSIZE=8 +CONFIG_CAN_NPENDINGRTR=4 +# CONFIG_CAN_TXREADY is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +CONFIG_ANALOG=y +CONFIG_ADC=y +CONFIG_ADC_FIFOSIZE=8 +# CONFIG_ADC_NO_STARTUP_CONV is not set +# CONFIG_ADC_ADS1242 is not set +# CONFIG_ADC_ADS125X is not set +# CONFIG_ADC_PGA11X is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_USART3_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_ADC=y +CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0" +CONFIG_EXAMPLES_ADC_GROUPSIZE=4 +# CONFIG_EXAMPLES_ADC_SWTRIG is not set +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=0 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=0 +CONFIG_EXAMPLES_BUTTONS_NAME0="BUT" +CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +CONFIG_EXAMPLES_CAN=y +CONFIG_EXAMPLES_CAN_DEVPATH="/dev/can0" +CONFIG_EXAMPLES_CAN_NMSGS=32 +# CONFIG_EXAMPLES_CAN_READ is not set +# CONFIG_EXAMPLES_CAN_WRITE is not set +CONFIG_EXAMPLES_CAN_READWRITE=y +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-stm32-h405/usbnsh/setenv.sh b/configs/olimex-stm32-h405/usbnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..d2dc21a00c1c9078b0ec6a9b8849e83420765359 --- /dev/null +++ b/configs/olimex-stm32-h405/usbnsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/olimex-stm32-h405/usbnsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-stm32-h407/Kconfig b/configs/olimex-stm32-h407/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..d237822bf281c47ce1e97d16884e1fe9312c15d7 --- /dev/null +++ b/configs/olimex-stm32-h407/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_OLIMEX_STM32H407 + +endif diff --git a/configs/olimex-stm32-h407/README.txt b/configs/olimex-stm32-h407/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..7b76206c59a3589e4dace0205c05784830da80b9 --- /dev/null +++ b/configs/olimex-stm32-h407/README.txt @@ -0,0 +1,37 @@ +README +====== + +The Olimex STM32-H407 configuration is based on +stm32Fdiscovery and Olimex STM32-H405. + +The H407 was programmed with ST-LINK/V2 from both Win8.1 and Ubuntu 14.04 +This release provides baseline for H407 12MHZ clock in include/board.h + +nsh - Only basic shell response tested on USART2 + +Development Environment +======================= + +Either Linux or Cygwin on Windows can be used for the development environment. +The source has been built only using the GNU toolchain (see below). Other +toolchains will likely cause problems. + +LEDs +==== + +The H407 board has 1 Status LED; + +SDCard +====== + +Expects to be plugged in else hangs. TODO: Shouldn't hang. +SDIO 4bit with pulls/downs on pins. Doesn't have a SD card detect pin. + +UARTs +===== + +On the H407 board, ?? all uarts are available for pin mappings +USART2 is typically used for nsh console + +STM32-H407-specific Configuration Options +=============================================== diff --git a/configs/olimex-stm32-h407/include/board.h b/configs/olimex-stm32-h407/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..a116f5bb65aaef7b2e65bdc23c4af9fbb6d30735 --- /dev/null +++ b/configs/olimex-stm32-h407/include/board.h @@ -0,0 +1,308 @@ +/************************************************************************************ + * configs/olimex-stm32-h407/include/board.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Modified for H407 Neil Hancock + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_OLIMEX_STM32_H407_INCLUDE_BOARD_H +#define __CONFIGS_OLIMEX_STM32_H407_INCLUDE_BOARD_H 1 + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# include +#endif + +#ifdef __KERNEL__ +# include "stm32_rcc.h" +# include "stm32_sdio.h" +# include "stm32.h" +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The Olimex-STM32-H407 board features a 12MHz crystal and + * a 32kHz RTC backup crystal. + * + * This is the canonical configuration: + * System Clock source : PLL (HSE) + * SYSCLK(Hz) : 168000000 Determined by PLL configuration + * HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE) + * AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE) + * APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1) + * APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2) + * HSE Frequency(Hz) : 8000000 (STM32_BOARD_XTAL) + * PLLM : 8 (STM32_PLLCFG_PLLM) + * PLLN : 336 (STM32_PLLCFG_PLLN) + * PLLP : 2 (STM32_PLLCFG_PLLP) + * PLLQ : 7 (STM32_PLLCFG_PLLQ) + * Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK + * Flash Latency(WS) : 5 + * Prefetch Buffer : OFF + * Instruction cache : ON + * Data cache : ON + * Require 48MHz for USB OTG FS, : Enabled + * SDIO and RNG clock + */ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC (30-60KHz, uncalibrated) + * HSE - On-board crystal frequency is 12MHz + * LSE - 32.768 kHz + * STM32F407ZGT6 - too 168Mhz + */ + +#define STM32_BOARD_XTAL 12000000ul + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* Main PLL Configuration. + * + * PLL source is HSE + * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN + * = (25,000,000 / 12) * 360 + * = 240,000,000 + * SYSCLK = PLL_VCO / PLLP + * = 240,000,000 / 2 = 120,000,000 + * USB OTG FS, SDIO and RNG Clock + * = PLL_VCO / PLLQ + * = 240,000,000 / 5 = 48,000,000 + * = 48,000,000 + * + * Xtal /M *n /P SysClk AHB HCLK APB1 PCLK1 + * 12Mhz HSE /12 336 /2 PLLCLK 168Mhz /1 168 /4 42Mhz + * 12Mhz HSE /6 168 /2 PLLCLK 168Mhz /1 168 /4 42Mhz + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(3) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(84) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(5) +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7) + +#define STM32_SYSCLK_FREQUENCY 168000000ul + +/* AHB clock (HCLK) is SYSCLK (168MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) + +/* Timers driven from APB1 will be twice PCLK1 */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 */ + +#define STM32_APB2_TIM1_CLKIN (2 * STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2 * STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2 * STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2 * STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2 * STM32_PCLK2_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY (STM32_HCLK_FREQUENCY / 2) + +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz + */ + +#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the status LED in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED_STATUS 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_STATUS_BIT (1 << BOARD_LED_STATUS) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the status LED of the + * Olimex STM32-H405. The following definitions describe how NuttX controls the LEDs: + */ + +#define LED_STARTED 0 /* LED_STATUS on */ +#define LED_HEAPALLOCATE 1 /* no change */ +#define LED_IRQSENABLED 2 /* no change */ +#define LED_STACKCREATED 3 /* no change */ +#define LED_INIRQ 4 /* no change */ +#define LED_SIGNAL 5 /* no change */ +#define LED_ASSERTION 6 /* LED_STATUS off */ +#define LED_PANIC 7 /* LED_STATUS blinking */ + +/* Button definitions ***************************************************************/ +/* The Olimex STM32-H405 supports one buttons: */ + +#define BUTTON_BUT 0 +#define NUM_BUTTONS 1 + +#define BUTTON_BUT_BIT (1 << BUTTON_BUT) + +/* Alternate function pin selections ************************************************/ + +/* USART3: */ + +#if 0 +#define GPIO_USART3_RX GPIO_USART3_RX_1 /* PB11 */ +#define GPIO_USART3_TX GPIO_USART3_TX_1 /* PB10 */ +#define GPIO_USART3_CTS GPIO_USART3_CTS_1 /* PB13 */ +#define GPIO_USART3_RTS GPIO_USART3_RTS_1 /* PB14 */ +#endif + +/* USART2: */ + +#define GPIO_USART2_RX GPIO_USART2_RX_1 +#define GPIO_USART2_TX GPIO_USART2_TX_1 +#define GPIO_USART2_CTS GPIO_USART2_CTS_1 +#define GPIO_USART2_RTS GPIO_USART2_RTS_1 + +/* CAN: */ + +#define GPIO_CAN1_RX GPIO_CAN1_RX_2 /* PB8 */ +#define GPIO_CAN1_TX GPIO_CAN1_TX_2 /* PB9 */ +#define GPIO_CAN2_RX GPIO_CAN1_RX_2 /* PB5 */ +#define GPIO_CAN2_TX GPIO_CAN1_TX_2 /* PB6 */ + +/* DMA Channl/Stream Selections *****************************************************/ +/* Stream selections are arbitrary for now but might become important in the future + * if we set aside more DMA channels/streams. + * + * SDIO DMA + * DMAMAP_SDIO_1 = Channel 4, Stream 3 + * DMAMAP_SDIO_2 = Channel 4, Stream 6 + */ + +#define DMAMAP_SDIO DMAMAP_SDIO_1 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_OLIMEX_STM32_H407_INCLUDE_BOARD_H */ diff --git a/configs/olimex-stm32-h407/nsh/Make.defs b/configs/olimex-stm32-h407/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..41cbe3331337cbd6b7afd63d80be6c3c692fed06 --- /dev/null +++ b/configs/olimex-stm32-h407/nsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/olimex-stm32-h407/nsh/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimex-stm32-h407/nsh/defconfig b/configs/olimex-stm32-h407/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..edcd8070ec21fe60e1d50a1103e810f12498bfb6 --- /dev/null +++ b/configs/olimex-stm32-h407/nsh/defconfig @@ -0,0 +1,1141 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +CONFIG_ARCH_CHIP_STM32F407ZG=y +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +CONFIG_STM32_OTGFS=y +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_OLIMEX_STM32H407=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-stm32-h407" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2016 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-stm32-h407/nsh/setenv.sh b/configs/olimex-stm32-h407/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..38135e980edba9a1a6e33436c646a915421dbf3e --- /dev/null +++ b/configs/olimex-stm32-h407/nsh/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/stm32f4discovery/nsh/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-stm32-h407/scripts/ld.script b/configs/olimex-stm32-h407/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..8cb28bca0723233abe88257e020dcc7c3da5a207 --- /dev/null +++ b/configs/olimex-stm32-h407/scripts/ld.script @@ -0,0 +1,122 @@ +/**************************************************************************** + * configs/olimex-stm32-h405/scripts/ld.script + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F407ZGT6 has 1024Kb of FLASH beginning at address 0x0800:0000 and + * 192Kb of SRAM. SRAM is split up into two blocks: + * + * 1) 112Kb of SRAM beginning at address 0x2000:0000 + * 2) 16Kb of SRAM beginning at address 0x2001:c000 + * 3) 64Kb of SRAM beginning at address 0x2002:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/olimex-stm32-h407/src/.gitignore b/configs/olimex-stm32-h407/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/olimex-stm32-h407/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/olimex-stm32-h407/src/Makefile b/configs/olimex-stm32-h407/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..efb28f8870ec9fb0528dd9583e41ac49b1ff93b5 --- /dev/null +++ b/configs/olimex-stm32-h407/src/Makefile @@ -0,0 +1,87 @@ +############################################################################ +# configs/olimex-stm32-h407/src/Makefile +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_bringup.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_ARCH_IDLE_CUSTOM),y) +CSRCS += stm32_idle.c +endif + +ifeq ($(CONFIG_STM32_FSMC),y) +CSRCS += stm32_extmem.c +endif + +ifeq ($(CONFIG_STM32_OTGFS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_STM32_OTGHS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += stm32_adc.c +endif + +ifeq ($(CONFIG_CAN),y) +CSRCS += stm32_can.c +endif + +ifeq ($(CONFIG_STM32_SDIO),y) +CSRCS += stm32_sdio.c +endif + +ifeq ($(CONFIG_ARCH_FPU),y) +CSRCS += stm32_ostest.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/olimex-stm32-h407/src/olimex-stm32-h407.h b/configs/olimex-stm32-h407/src/olimex-stm32-h407.h new file mode 100644 index 0000000000000000000000000000000000000000..766ddb9c7b536a764380209890f207b16123fa67 --- /dev/null +++ b/configs/olimex-stm32-h407/src/olimex-stm32-h407.h @@ -0,0 +1,282 @@ +/**************************************************************************** + * configs/olimex-stm32-h407/src/olimex-stm32-h407.h + * + * Copyright (C) 2014 Max Holtzberg. All rights reserved. + * Author: Max Holtzberg + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_OLIMEX_STM32_H407_SRC_H +#define __CONFIGS_OLIMEX_STM32_H407_SRC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#define HAVE_USBDEV 1 +#define HAVE_USBHOST 1 +#define HAVE_USBMONITOR 1 +#define HAVE_SDIO 1 +#define HAVE_RTC_DRIVER 1 +# +/* Can't support USB host or device features if USB OTG HS is not enabled */ + +#ifndef CONFIG_STM32_OTGHS +# undef HAVE_USBDEV +# undef HAVE_USBHOST +# undef HAVE_USBMONITOR +#endif + +/* Can't support USB device monitor if USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +# undef HAVE_USBMONITOR +#endif + +/* Can't support USB host is USB host is not enabled */ + +#ifndef CONFIG_USBHOST +# undef HAVE_USBHOST +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR) +# undef HAVE_USBMONITOR +#endif + +#if !defined(CONFIG_STM32_CAN1) && !defined(CONFIG_STM32_CAN2) +# undef CONFIG_CAN +#endif + +/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support + * is not enabled. Can't support MMC/SD features if the upper half MMC/SD SDIO + * driver is not enabled. + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SDIO) +# undef HAVE_SDIO +#endif + +#if !defined(CONFIG_MMCSD_SDIO) +# undef HAVE_SDIO +#endif + +#undef SDIO_MINOR /* Any minor number, default 0 */ +#define SDIO_SLOTNO 0 /* Only one slot */ + +#ifdef HAVE_SDIO + +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0 +# warning Only one MMC/SD slot, slot 0 +# define CONFIG_NSH_MMCSDSLOTNO SDIO_SLOTNO +# endif + +# if defined(CONFIG_NSH_MMCSDMINOR) +# define SDIO_MINOR CONFIG_NSH_MMCSDMINOR +# else +# define SDIO_MINOR 0 +# endif + + /* SD card bringup does not work if performed on the IDLE thread because it + * will cause waiting. Use either: + * + * CONFIG_LIB_BOARDCTL=y, OR + * CONFIG_BOARD_INITIALIZE=y && CONFIG_BOARD_INITTHREAD=y + */ + +# if defined(CONFIG_BOARD_INITIALIZE) && !defined(CONFIG_LIB_BOARDCTL) && \ + !defined(CONFIG_BOARD_INITTHREAD) +# warning SDIO initialization cannot be perfomed on the IDLE thread +# undef HAVE_SDIO +# endif +#endif + +/* Check if we can support the RTC driver */ + +#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER) +# undef HAVE_RTC_DRIVER +#endif + +/* Olimex-STM32-P407 GPIOs **************************************************/ +/* LEDs */ + +#define GPIO_LED_STATUS (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | \ + GPIO_OUTPUT_CLEAR | GPIO_PORTC | GPIO_PIN12) + +/* BUTTONS -- NOTE that all have EXTI interrupts configured */ + +#define MIN_IRQBUTTON BUTTON_BUT +#define MAX_IRQBUTTON BUTTON_BUT +#define NUM_IRQBUTTONS 1 + +#define GPIO_BTN_BUT (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTA | \ + GPIO_PIN0) + +/* USB OTG FS - USB-A connector + * + * PC4 OTG_FS_VBUS VBUS sensing + */ + +#define GPIO_OTGFS_VBUS (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTC | GPIO_PIN4) + +/* USB OTG HS - miniUSB connector + * + * PB13 OTG_HS_VBUS VBUS sensing (also connected to the green LED) + * PA8 OTG_HS_PowerSwitchOn + * PB5 OTG_HS_Overcurrent + */ + +#define GPIO_OTGHS_VBUS (GPIO_INPUT | GPIO_FLOAT | GPIO_SPEED_100MHz | \ + GPIO_OPENDRAIN | GPIO_PORTB | GPIO_PIN13) +#define GPIO_OTGHS_PWRON (GPIO_OUTPUT | GPIO_OUTPUT_SET | GPIO_FLOAT | \ + GPIO_SPEED_100MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN8) + +#ifdef CONFIG_USBHOST +# define GPIO_OTGHS_OVER (GPIO_INPUT | GPIO_EXTI | GPIO_FLOAT | \ + GPIO_SPEED_100MHz | GPIO_PUSHPULL | GPIO_PORTB | \ + GPIO_PIN5) + +#else +# define GPIO_OTGHS_OVER (GPIO_INPUT | GPIO_FLOAT | GPIO_SPEED_100MHz | \ + GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN5) +#endif + +/* MicroSD SDIO + * + * ---------- -------- ------- --------------------------- + * PIO SIGNAL Pulled Comments + * ---------- -------- ------- ----------------------- + * -- NCD Card detect, combined with pins settings CD/PC11 + * PC9 DAT1 UP 33K Also interrupt + * PC8 DAT0 UP 33K " " "" " " + * PC12 CLK ---- " " "" " " + * PD2 CMD UP 33K " " "" " " + * PC11 CD/DAT3 DOWN 1M " " "" " " + * PC10 DAT2 UP 33K Also Read wait operation + * -- WrProtect Not Supported + * ---------- -------- ------- ---------------------- + */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_bringup + * + * Description: + * Perform architecture specific initialization + * + * CONFIG_LIB_BOARDCTL=y: + * If CONFIG_NSH_ARCHINITIALIZE=y: + * Called from the NSH library (or other application) + * Otherse, assumed to be called from some other application. + * + * Otherwise CONFIG_BOARD_INITIALIZE=y: + * Called from board_initialize(). + * + * Otherise, bad news: Never called + * + ****************************************************************************/ + +int stm32_bringup(void); + +/**************************************************************************** + * Name: stm32_sdio_initialize + * + * Description: + * Initialize SDIO-based MMC/SD card support + * + ****************************************************************************/ + +#if defined(HAVE_SDIO) +int stm32_sdio_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in initialization to setup + * USB-related GPIO pins for the Olimex-STM32-H405 board. + * + ****************************************************************************/ + +#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_OTGHS) +void weak_function stm32_usbinitialize(void); +#endif + +/**************************************************************************** + * Name: stm32_adc_initialize + * + * Description: + * Called at application startup time to initialize the ADC functionality. + * + ****************************************************************************/ + +#ifdef CONFIG_ADC +int stm32_adc_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_can_initialize + * + * Description: + * Called at application startup time to initialize the CAN functionality. + * + ****************************************************************************/ + +#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)) +int stm32_can_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_OLIMEX_STM32_H407_SRC_INTERNAL_H */ diff --git a/configs/olimex-stm32-h407/src/stm32_adc.c b/configs/olimex-stm32-h407/src/stm32_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..a7f3e6aa32380c6e4461e1f9444fdca5b746389c --- /dev/null +++ b/configs/olimex-stm32-h407/src/stm32_adc.c @@ -0,0 +1,187 @@ +/************************************************************************************ + * configs/olimex-stm32-h407/src/stm32_adc.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "stm32_adc.h" +#include "olimex-stm32-h407.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Configuration ********************************************************************/ +/* Up to 3 ADC interfaces are supported */ + +#if STM32_NADC < 3 +# undef CONFIG_STM32_ADC3 +#endif + +#if STM32_NADC < 2 +# undef CONFIG_STM32_ADC2 +#endif + +#if STM32_NADC < 1 +# undef CONFIG_STM32_ADC1 +#endif + +#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3) +#ifndef CONFIG_STM32_ADC1 +# warning "Channel information only available for ADC1" +#endif + +/* The number of ADC channels in the conversion list */ + +#define ADC1_NCHANNELS 1//14 + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* The Olimex STM32-P405 has a 10 Kohm potentiometer AN_TR connected to PC0 + * ADC123_IN10 + */ + +/* Identifying number of each ADC channel: Variable Resistor. + * + * {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 15}; + */ + +#ifdef CONFIG_STM32_ADC1 +static const uint8_t g_chanlist[ADC1_NCHANNELS] = {1}; + +/* Configurations of pins used byte each ADC channels + * + * {GPIO_ADC1_IN1, GPIO_ADC1_IN2, GPIO_ADC1_IN3, GPIO_ADC1_IN4, GPIO_ADC1_IN5, + * GPIO_ADC1_IN6, GPIO_ADC1_IN7, GPIO_ADC1_IN8, GPIO_ADC1_IN9, GPIO_ADC1_IN10, + * GPIO_ADC1_IN11, GPIO_ADC1_IN12, GPIO_ADC1_IN13, GPIO_ADC1_IN15}; + */ + +static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN1}; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ + return stm32_adc_initialize(); +} + +/************************************************************************************ + * Name: stm32_adc_initialize + * + * Description: + * Called at application startup time to initialize the ADC functionality. + * + ************************************************************************************/ + +int stm32_adc_initialize(void) +{ +#ifdef CONFIG_STM32_ADC1 + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + int i; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Configure the pins as analog inputs for the selected channels */ + + for (i = 0; i < ADC1_NCHANNELS; i++) + { + stm32_configgpio(g_pinlist[i]); + } + + /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + + adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +#else + return -ENOSYS; +#endif +} + +#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */ +#endif /* CONFIG_ADC */ diff --git a/configs/olimex-stm32-h407/src/stm32_appinit.c b/configs/olimex-stm32-h407/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..e67ab3138bbf89b32659765314ce55361caed043 --- /dev/null +++ b/configs/olimex-stm32-h407/src/stm32_appinit.c @@ -0,0 +1,88 @@ +/**************************************************************************** + * config/olimex-stm32-h407/src/stm32_appinit.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#ifdef CONFIG_STM32_OTGFS +# include "stm32_usbhost.h" +#endif + +#include "stm32.h" +#include "olimex-stm32-h407.h" + +#ifdef CONFIG_LIB_BOARDCTL + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + * CONFIG_LIB_BOARDCTL=y: + * If CONFIG_NSH_ARCHINITIALIZE=y: + * Called from the NSH library (or other application) + * Otherse, assumed to be called from some other application. + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + return stm32_bringup(); +} + +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/configs/olimex-stm32-h407/src/stm32_autoleds.c b/configs/olimex-stm32-h407/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..01bc2b5dae9e9045ae81d98443c90e9d9e15899f --- /dev/null +++ b/configs/olimex-stm32-h407/src/stm32_autoleds.c @@ -0,0 +1,122 @@ +/**************************************************************************** + * configs/olimex-stm32-h407/src/stm32_autoleds.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "olimex-stm32-h407.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED_STATUS GPIO for output */ + + stm32_configgpio(GPIO_LED_STATUS); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led == LED_STARTED) + { + stm32_gpiowrite(GPIO_LED_STATUS, true); + } + + if (led == LED_ASSERTION || led == LED_PANIC) + { + stm32_gpiowrite(GPIO_LED_STATUS, false); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == LED_STARTED) + { + stm32_gpiowrite(GPIO_LED_STATUS, false); + } + + if (led == LED_ASSERTION || led == LED_PANIC) + { + stm32_gpiowrite(GPIO_LED_STATUS, true); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/olimex-stm32-h407/src/stm32_boot.c b/configs/olimex-stm32-h407/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..a0e6c77f2756fedeb3a4c479d319799eefb8ca6c --- /dev/null +++ b/configs/olimex-stm32-h407/src/stm32_boot.c @@ -0,0 +1,119 @@ +/************************************************************************************ + * configs/olimex-stm32-h407/src/stm32_boot.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "up_arch.h" +#include "olimex-stm32-h407.h" +#include "stm32_ccm.h" + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ +#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_OTGHS) + /* Initialize USB if the 1) OTG FS controller is in the configuration and 2) + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. Presumeably either CONFIG_USBDEV is also selected. + */ + + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif + +#ifdef CONFIG_ARCH_BUTTONS + /* Configure on-board BUTTONs if BUTTON support has been selected. */ + + board_button_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intitialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ +#ifndef CONFIG_LIB_BOARDCTL + /* Perform NSH initialization here instead of from the board_app_initialize. + * If CONFIG_LIB_BOARDCTL=y we assume that come application will perform + * the initialization by calling board_app_initialize indirectly through + * boardctl(). + */ + + stm32_bringup(); +#endif +} +#endif diff --git a/configs/olimex-stm32-h407/src/stm32_bringup.c b/configs/olimex-stm32-h407/src/stm32_bringup.c new file mode 100644 index 0000000000000000000000000000000000000000..9c683a1158cd137bc480744ff72e88ee4c84d572 --- /dev/null +++ b/configs/olimex-stm32-h407/src/stm32_bringup.c @@ -0,0 +1,190 @@ +/**************************************************************************** + * config/olimex-stm32-h407/src/stm32_bringup.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#ifdef CONFIG_STM32_OTGFS +# include "stm32_usbhost.h" +#endif + +#include "stm32.h" +#include "olimex-stm32-h407.h" + +/* Conditional logic in olimex-stm32-h407.h will determine if certain features + * are supported. Tests for these features need to be made after including + * olimex-stm32-h407.h. + */ + +#ifdef HAVE_RTC_DRIVER +# include +# include "stm32_rtc.h" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_bringup + * + * Description: + * Perform architecture specific initialization + * + * CONFIG_LIB_BOARDCTL=y: + * If CONFIG_NSH_ARCHINITIALIZE=y: + * Called from the NSH library (or other application) + * Otherse, assumed to be called from some other application. + * + * Otherwise CONFIG_BOARD_INITIALIZE=y: + * Called from board_initialize(). + * + * Otherise, bad news: Never called + * + ****************************************************************************/ + +int stm32_bringup(void) +{ +#ifdef HAVE_RTC_DRIVER + FAR struct rtc_lowerhalf_s *lower; +#endif +#if defined(CONFIG_CAN) || defined(CONFIG_ADC) || defined(HAVE_SDIO) || \ + defined(HAVE_RTC_DRIVER) + int ret; +#endif + +#ifdef CONFIG_CAN + /* Configure on-board CAN if CAN support has been selected. */ + + ret = stm32_can_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize CAN: %d\n", + ret); + } +#endif + +#ifdef CONFIG_ADC + /* Configure on-board ADCs if ADC support has been selected. */ + + ret = stm32_adc_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize ADC: %d\n", + ret); + } +#endif + +#ifdef HAVE_SDIO + /* Initialize the SDIO block driver */ + + ret = stm32_sdio_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize MMC/SD driver: %d\n", + ret); + } +#endif + +#ifdef HAVE_USBHOST + /* Initialize USB host operation. stm32_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + + ret = stm32_usbhost_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize USB host: %d\n", + ret); + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to start USB monitor: %d\n", + ret); + } +#endif + +#ifdef HAVE_RTC_DRIVER + /* Instantiate the STM32 lower-half RTC driver */ + + lower = stm32_rtc_lowerhalf(); + if (!lower) + { + syslog(LOG_ERR, + "ERROR: Failed to instantiate the RTC lower-half driver\n"); + } + else + { + /* Bind the lower half driver and register the combined RTC driver + * as /dev/rtc0 + */ + + ret = rtc_initialize(0, lower); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to bind/register the RTC driver: %d\n", + ret); + } + } +#endif + + return OK; +} diff --git a/configs/olimex-stm32-h407/src/stm32_buttons.c b/configs/olimex-stm32-h407/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..24bcc1ee34ca04e956d77efde3afa669988a7999 --- /dev/null +++ b/configs/olimex-stm32-h407/src/stm32_buttons.c @@ -0,0 +1,150 @@ +/**************************************************************************** + * configs/olimex-stm32-h407/src/stm32_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "olimex-stm32-h407.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* Pin configuration for each Olimex-STM32-H405 button. This array is indexed by + * the BUTTON_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_BUT +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + + /* Check that state of each key */ + + if (!stm32_gpioread(g_buttons[BUTTON_BUT])) + { + ret |= BUTTON_BUT_BIT; + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/olimex-stm32-h407/src/stm32_can.c b/configs/olimex-stm32-h407/src/stm32_can.c new file mode 100644 index 0000000000000000000000000000000000000000..521c4445110143ccc4cc3817d890c7d412c90bb9 --- /dev/null +++ b/configs/olimex-stm32-h407/src/stm32_can.c @@ -0,0 +1,145 @@ +/************************************************************************************ + * configs/olimex-stm32-405/src/stm32_can.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include "stm32.h" +#include "stm32_can.h" +#include "olimex-stm32-h407.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2) +# warning "Both CAN1 and CAN2 are enabled. Only CAN1 is used." +# undef CONFIG_STM32_CAN2 +#endif + +#ifdef CONFIG_STM32_CAN1 +# define CAN_PORT 1 +#else +# define CAN_PORT 2 +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + return stm32_can_initialize(); +} + +/**************************************************************************************************** + * Name: stm32_can_initialize + * + * Description: + * Called at application startup time to initialize the CAN functionality. + * + ****************************************************************************************************/ + +int stm32_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = stm32_caninitialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && (CONFIG_STM32_CAN1 || CONFIG_STM32_CAN2) */ diff --git a/configs/olimex-stm32-h407/src/stm32_sdio.c b/configs/olimex-stm32-h407/src/stm32_sdio.c new file mode 100644 index 0000000000000000000000000000000000000000..919c503252fcfb1c6b5b523da09559813ffc647e --- /dev/null +++ b/configs/olimex-stm32-h407/src/stm32_sdio.c @@ -0,0 +1,175 @@ +/**************************************************************************** + * config/olimex-stm32_h407/src/stm32_sdio.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "stm32.h" +#include "olimex-stm32-h407.h" + +#ifdef HAVE_SDIO + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Card detections requires card support and a card detection GPIO */ + +#define HAVE_NCD 1 +#if !defined(HAVE_SDIO) || !defined(GPIO_SDIO_NCD) +# undef HAVE_NCD +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static FAR struct sdio_dev_s *g_sdio_dev; +#ifdef HAVE_NCD +static bool g_sd_inserted = 0xff; /* Impossible value */ +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_ncd_interrupt + * + * Description: + * Card detect interrupt handler. + * + ****************************************************************************/ + +#ifdef HAVE_NCD +static int stm32_ncd_interrupt(int irq, FAR void *context) +{ + bool present; + + present = !stm32_gpioread(GPIO_SDIO_NCD); + if (present != g_sd_inserted) + { + sdio_mediachange(g_sdio_dev, present); + g_sd_inserted = present; + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_sdio_initialize + * + * Description: + * Initialize SDIO-based MMC/SD card support + * + ****************************************************************************/ + +int stm32_sdio_initialize(void) +{ + int ret; + +#ifdef HAVE_NCD + /* Card detect */ + + bool cd_status; + + /* Configure the card detect GPIO */ + + stm32_configgpio(GPIO_SDIO_NCD); + + /* Register an interrupt handler for the card detect pin */ + + stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true, stm32_ncd_interrupt); +#endif + + /* Mount the SDIO-based MMC/SD block driver */ + /* First, get an instance of the SDIO interface */ + + fvdbg("Initializing SDIO slot %d\n", SDIO_SLOTNO); + + g_sdio_dev = sdio_initialize(SDIO_SLOTNO); + if (!g_sdio_dev) + { + fdbg("Failed to initialize SDIO slot %d\n", SDIO_SLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + fvdbg("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR); + + ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev); + if (ret != OK) + { + fdbg("Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + fvdbg("Successfully bound SDIO to the MMC/SD driver\n"); + +#ifdef HAVE_NCD + /* Use SD card detect pin to check if a card is g_sd_inserted */ + + cd_status = !stm32_gpioread(GPIO_SDIO_NCD); + fvdbg("Card detect : %d\n", cd_status); + + sdio_mediachange(g_sdio_dev, cd_status); +#else + /* Assume that the SD card is inserted. What choice do we have? */ + + sdio_mediachange(g_sdio_dev, true); +#endif + + return OK; +} + +#endif /* HAVE_SDIO */ diff --git a/configs/olimex-stm32-h407/src/stm32_usb.c b/configs/olimex-stm32-h407/src/stm32_usb.c new file mode 100644 index 0000000000000000000000000000000000000000..22b246af381db0ea5bc08c0976686120b4287f0f --- /dev/null +++ b/configs/olimex-stm32-h407/src/stm32_usb.c @@ -0,0 +1,314 @@ +/************************************************************************************ + * configs/olimex-stm32-h407/src/stm32_usbdev.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm32_otgfs.h" +#include "stm32_otghs.h" +#include "olimex-stm32-h407.h" + +#ifdef CONFIG_STM32_OTGHS + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST) +# define HAVE_USB 1 +#else +# warning "CONFIG_STM32_OTGHS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST" +# undef HAVE_USB +#endif + +#ifndef CONFIG_STM32F407_USBHOST_PRIO +# define CONFIG_STM32F407_USBHOST_PRIO 100 +#endif + +#ifndef CONFIG_STM32F407_USBHOST_STACKSIZE +# define CONFIG_STM32F407_USBHOST_STACKSIZE 1024 +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static struct usbhost_connection_s *g_usbconn; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: usbhost_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static int usbhost_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + uvdbg("Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + uvdbg("%s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the STM32F4Discovery board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + /* The OTG HS has an internal soft pull-up. No GPIO configuration is required */ + + /* Configure the OTG HS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */ + +#ifdef CONFIG_STM32_OTGHS + stm32_configgpio(GPIO_OTGHS_VBUS); + stm32_configgpio(GPIO_OTGHS_PWRON); + stm32_configgpio(GPIO_OTGHS_OVER); +#endif +} + +/*********************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +int stm32_usbhost_initialize(void) +{ + int pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + uvdbg("Register class drivers\n"); + +#ifdef CONFIG_USBHOST_HUB + /* Initialize USB hub class support */ + + ret = usbhost_hub_initialize(); + if (ret < 0) + { + udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB mass storage class class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + + /* Then get an instance of the USB host interface */ + + uvdbg("Initialize USB host\n"); + g_usbconn = stm32_otghshost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + uvdbg("Start usbhost_waiter\n"); + + pid = task_create("usbhost", CONFIG_STM32H407_USBHOST_PRIO, + CONFIG_STM32H407_USBHOST_STACKSIZE, + (main_t)usbhost_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + + return -ENODEV; +} +#endif + +/*********************************************************************************** + * Name: stm32_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be provided be + * each platform that implements the STM32 OTG HS host interface + * + * "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump + * or, if 5 V are available on the application board, a basic power switch, must + * be added externally to drive the 5 V VBUS line. The external charge pump can + * be driven by any GPIO output. When the application decides to power on VBUS + * using the chosen GPIO, it must also set the port power bit in the host port + * control and status register (PPWR bit in OTG_HS_HPRT). + * + * "The application uses this field to control power to this port, and the core + * clears this bit on an overcurrent condition." + * + * Input Parameters: + * iface - For future growth to handle multiple USB host interface. Should be zero. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +void stm32_usbhost_vbusdrive(int iface, bool enable) +{ + DEBUGASSERT(iface == 0); + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ + + stm32_gpiowrite(GPIO_OTGHS_PWRON, false); + } + else + { + /* Disable the Power Switch by driving the enable pin high */ + + stm32_gpiowrite(GPIO_OTGHS_PWRON, true); + } +} +#endif + +/************************************************************************************ + * Name: stm32_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent condition is + * detected. + * + * Input Parameters: + * handler - New overcurrent interrupt handler + * + * Returned Value: + * Old overcurrent interrupt handler + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +xcpt_t stm32_setup_overcurrent(xcpt_t handler) +{ + return stm32_gpiosetevent(GPIO_OTGHS_OVER, true, true, true, handler); +} +#endif + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} +#endif + +#endif /* CONFIG_STM32_OTGHS */ diff --git a/configs/olimex-stm32-h407/src/stm32_userleds.c b/configs/olimex-stm32-h407/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..44d85989e6765f55a8dbe2a906c06763454fb59f --- /dev/null +++ b/configs/olimex-stm32-h407/src/stm32_userleds.c @@ -0,0 +1,118 @@ +/**************************************************************************** + * configs/olimex-stm32-h407/src/stm32_leds.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "olimex-stm32-h407.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* This array maps an LED number to GPIO pin configuration */ + +static uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED_STATUS +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED_STATUS); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + stm32_gpiowrite(g_ledcfg[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LED_STATUS, (ledset & BOARD_LED1_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/olimex-stm32-p107/Kconfig b/configs/olimex-stm32-p107/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..3a14e35d2f4eaf6790ee04ac73f2c669e8804df8 --- /dev/null +++ b/configs/olimex-stm32-p107/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_OLIMEX_STM32P107 +endif diff --git a/configs/olimex-stm32-p107/include/board.h b/configs/olimex-stm32-p107/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..e82a41cb1ca797b96cd45aa8e622d92437098328 --- /dev/null +++ b/configs/olimex-stm32-p107/include/board.h @@ -0,0 +1,155 @@ +/************************************************************************************ + * configs/olimex-stm32-p107/include/board.h + * + * Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_OLIMEX_STM32_P107_INCLUDE_BOARD_H +#define __CONFIGS_OLIMEX_STM32_P107_INCLUDE_BOARD_H 1 + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* HSI - 8 MHz RC factory-trimmed + * LSI - 40 KHz RC (30-60KHz, uncalibrated) + * HSE - On-board crystal frequency is 25MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 25000000ul + +#define STM32_HSI_FREQUENCY 8000000ul +#define STM32_LSI_FREQUENCY 40000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* PLL ouput is 72MHz */ + +#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */ +#define STM32_PLL_PLL2MUL RCC_CFGR2_PLL2MULx8 /* 5MHz * 8 => 40MHz */ +#define STM32_PLL_PREDIV1 RCC_CFGR2_PREDIV1d5 /* 40MHz / 5 => 8MHz */ +#define STM32_PLL_PLLMUL RCC_CFGR_PLLMUL_CLKx9 /* 8MHz * 9 => 72Mhz */ +#define STM32_PLL_FREQUENCY (72000000) + +/* SYCLLK and HCLK are the PLL frequency */ + +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (72MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */ + +/* APB2 timers 1 and 8 will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* MCO output driven by PLL3. From above, we already have PLL3 input frequency as: + * + * STM32_PLL_PREDIV2 = 5, 25MHz / 5 => 5MHz + */ + +#if defined(CONFIG_STM32_MII_MCO) || defined(CONFIG_STM32_RMII_MCO) +# define BOARD_CFGR_MCO_SOURCE RCC_CFGR_PLL3CLK /* Source: PLL3 */ +# define STM32_PLL_PLL3MUL RCC_CFGR2_PLL3MULx10 /* MCO 5MHz * 10 = 50MHz */ +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +EXTERN void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_OLIMEX_STM32_P107_INCLUDE_BOARD_H */ diff --git a/configs/olimex-stm32-p107/nsh/Make.defs b/configs/olimex-stm32-p107/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..97e3247137a2c1d3635d276b4d5e08ec956639ae --- /dev/null +++ b/configs/olimex-stm32-p107/nsh/Make.defs @@ -0,0 +1,127 @@ +############################################################################ +# configs/olimex-stm32-p107/nsh/Make.defs +# +# Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)\tools\copydir.bat + DIRUNLINK = $(TOPDIR)\tools\unlink.bat + MKDEP = $(TOPDIR)\tools\mkdeps.exe + ARCHINCLUDES = -I. -isystem $(TOPDIR)\include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)\include -isystem $(TOPDIR)\include\cxx + ARCHSCRIPT = -T$(TOPDIR)\configs\$(CONFIG_ARCH_BOARD)\scripts\$(LDSCRIPT) +else +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimex-stm32-p107/nsh/defconfig b/configs/olimex-stm32-p107/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b867a39067d26a3c1f4ccbe2f24f00fcd9d90634 --- /dev/null +++ b/configs/olimex-stm32-p107/nsh/defconfig @@ -0,0 +1,1348 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_CAN_EXTID is not set +# CONFIG_CAN_LOOPBACK is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +CONFIG_ARCH_CHIP_STM32F107VC=y +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +CONFIG_STM32_CONNECTIVITYLINE=y +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +CONFIG_STM32_HAVE_ETHMAC=y +# CONFIG_STM32_HAVE_I2C2 is not set +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_OTGFS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_ETH_REMAP is not set +CONFIG_STM32_USART2_REMAP=y +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +# CONFIG_STM32_MII is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set +CONFIG_STM32_RMII=y +CONFIG_STM32_RMII_MCO=y +# CONFIG_STM32_RMII_EXTCLK is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_CLOUDCTRL is not set +CONFIG_ARCH_BOARD_OLIMEX_STM32P107=y +# CONFIG_ARCH_BOARD_SHENZHOU is not set +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-stm32-p107" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=9 +CONFIG_START_DAY=21 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +CONFIG_CAN=y +# CONFIG_ARCH_HAVE_CAN_ERRORS is not set +# CONFIG_CAN_FD is not set +CONFIG_CAN_FIFOSIZE=8 +CONFIG_CAN_NPENDINGRTR=4 +# CONFIG_CAN_TXREADY is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +CONFIG_ETH0_PHY_KS8721=y +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=650 +CONFIG_NET_ETH_TCP_RECVWNDO=624 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +# CONFIG_NET_UDP_CHECKSUMS is not set +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_DNSSERVER_NOADDR is not set +CONFIG_NETDB_DNSSERVER_IPv4=y +CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001 + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0xc0a80232 +CONFIG_NSH_DRIPADDR=0xc0a80201 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-stm32-p107/nsh/setenv.sh b/configs/olimex-stm32-p107/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..8916f538cc76fdf0649743acc59bf539e7c9c7dd --- /dev/null +++ b/configs/olimex-stm32-p107/nsh/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/olimex-stm32-p107/nsh/setenv.sh +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-stm32-p107/scripts/ld.script b/configs/olimex-stm32-p107/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..651848df71b453cbeaf1487b206d678416701191 --- /dev/null +++ b/configs/olimex-stm32-p107/scripts/ld.script @@ -0,0 +1,112 @@ +/**************************************************************************** + * configs/olimex-stm32-p107/scripts/ld.script + * + * Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K + +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F107VC has 64Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/olimex-stm32-p107/scripts/ld.script.dfu b/configs/olimex-stm32-p107/scripts/ld.script.dfu new file mode 100644 index 0000000000000000000000000000000000000000..c20a6224faaa466c585c36f7d75cd89d22db7cf1 --- /dev/null +++ b/configs/olimex-stm32-p107/scripts/ld.script.dfu @@ -0,0 +1,112 @@ +/**************************************************************************** + * configs/olimex-stm32-p107/scripts/ld.script.dfu + * + * Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* Don't know if this is correct. Just 256K-48K (not testet) */ +MEMORY +{ + flash (rx) : ORIGIN = 0x08003000, LENGTH = 208K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F103Z has 64Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/olimex-stm32-p107/src/.gitignore b/configs/olimex-stm32-p107/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/olimex-stm32-p107/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/olimex-stm32-p107/src/Makefile b/configs/olimex-stm32-p107/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..9d4acd1697858e20cc01ec763899bb5f7dc37d7a --- /dev/null +++ b/configs/olimex-stm32-p107/src/Makefile @@ -0,0 +1,49 @@ +############################################################################ +# configs/olimex-stm32-p107/src/Makefile +# +# Copyright (C) 2009-2010, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c + +ifeq ($(CONFIG_CAN),y) +CSRCS += stm32_can.c +endif + +ifeq ($(CONFIG_ENCX24J600),y) +CSRCS += stm32_encx24j600.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/olimex-stm32-p107/src/olimex-stm32-p107.h b/configs/olimex-stm32-p107/src/olimex-stm32-p107.h new file mode 100644 index 0000000000000000000000000000000000000000..4b4b2240e909c02c472e8c7cfc64fbc072a9992f --- /dev/null +++ b/configs/olimex-stm32-p107/src/olimex-stm32-p107.h @@ -0,0 +1,88 @@ +/**************************************************************************** + * configs/olimex-stm32-p107/src/olimex-stm32-p107.h + * + * Copyright (C) 2013 Max Holtzberg. All rights reserved. + * Author: Max Holtzberg + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +#ifndef __CONFIGS_OLIMEX_STM32_P107_SRC_H +#define __CONFIGS_OLIMEX_STM32_P107_SRC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Olimex MOD-ENC624J600 Module + * + * --- ------ -------------- --------------------------------------------------- + * PIN NAME SIGNAL NOTES + * --- ------ -------------- --------------------------------------------------- + * + * 54 PB15 PB15-CS_UEXT ENCX24J600 #CS + * 78 PC10 PC10-SPI3-SCK ENCX24J600 SCK + * 79 PC11 PC11-SPI3-MISO ENCX24J600 MISO + * 80 PC12 PC12-SPI3-MOSI ENCX24J600 MOSI + * 95 PB8 PB8 ENCX24J600 #Interrupt + */ + + +#ifdef CONFIG_ENCX24J600 +# define GPIO_ENCX24J600_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz| \ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN15) +# define GPIO_ENCX24J600_INTR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT| \ + GPIO_EXTI|GPIO_PORTB|GPIO_PIN8) +#endif + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the M3 Wildfire board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_OLIMEX_STM32_P107_SRC_H */ diff --git a/configs/olimex-stm32-p107/src/stm32_boot.c b/configs/olimex-stm32-p107/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..c1ae4152a83bb0fa48bd69187af1f537a70fc070 --- /dev/null +++ b/configs/olimex-stm32-p107/src/stm32_boot.c @@ -0,0 +1,82 @@ +/************************************************************************************ + * configs/olimex-stm32-p107/src/stm32_boot.c + * + * Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include "up_arch.h" +#include "olimex-stm32-p107.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI3) + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + +} diff --git a/configs/olimex-stm32-p107/src/stm32_can.c b/configs/olimex-stm32-p107/src/stm32_can.c new file mode 100644 index 0000000000000000000000000000000000000000..690417f9f50f9ea187763e6127995ddb8aaa9ce9 --- /dev/null +++ b/configs/olimex-stm32-p107/src/stm32_can.c @@ -0,0 +1,132 @@ +/************************************************************************************ + * configs/olimex-stm32-p107/src/stm32_can.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32.h" +#include "stm32_can.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* The STM32F107VC supports CAN1 and CAN2 */ + +#define CAN_PORT 1 + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = stm32_caninitialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && CONFIG_STM32_CAN1 */ diff --git a/configs/olimex-stm32-p107/src/stm32_encx24j600.c b/configs/olimex-stm32-p107/src/stm32_encx24j600.c new file mode 100644 index 0000000000000000000000000000000000000000..9f37781990979401fd00612621bffa059e3e719e --- /dev/null +++ b/configs/olimex-stm32-p107/src/stm32_encx24j600.c @@ -0,0 +1,202 @@ +/**************************************************************************** + * configs/olimex-stm32-p107/src/stm32_encx24j600.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32_spi.h" + +#include "olimex-stm32-p107.h" + +#ifdef CONFIG_ENCX24J600 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* ENCX24J600 + * + * --- ------ -------------- ------------------------------------------------ + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------ + * + * 54 PB15 PB15-CS_UEXT ENCX24J600 #CS + * 78 PC10 PC10-SPI3-SCK ENCX24J600 SCK + * 79 PC11 PC11-SPI3-MISO ENCX24J600 MISO + * 80 PC12 PC12-SPI3-MOSI ENCX24J600 MOSI + * 95 PB8 PB8 ENCX24J600 #Interrupt + */ + +/* ENCX24J600 is on SPI3 */ + +#ifndef CONFIG_STM32_SPI3 +# error "Need CONFIG_STM32_SPI3 in the configuration" +#endif + +#ifndef CONFIG_STM32_SPI3_REMAP +# error "SPI should be remapped for UEXT use" +#endif + +/* SPI Assumptions **********************************************************/ + +#define ENCX24J600_SPI_PORTNO 3 /* On SPI1 */ +#define ENCX24J600_DEVNO 0 /* Only one ENCX24J600 */ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32_lower_s +{ + const struct enc_lower_s lower; /* Low-level MCU interface */ + xcpt_t handler; /* ENCX24J600 interrupt handler */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler); +static void up_enable(FAR const struct enc_lower_s *lower); +static void up_disable(FAR const struct enc_lower_s *lower); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* The ENCX24J600 normal provides interrupts to the MCU via a GPIO pin. The + * following structure provides an MCU-independent mechanixm for controlling + * the ENCX24J600 GPIO interrupt. + */ + +static struct stm32_lower_s g_enclower = +{ + .lower = + { + .attach = up_attach, + .enable = up_enable, + .disable = up_disable + }, + .handler = NULL, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: struct enc_lower_s methods + ****************************************************************************/ + +static int up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler) +{ + FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower; + + /* Just save the handler for use when the interrupt is enabled */ + + priv->handler = handler; + return OK; +} + +static void up_enable(FAR const struct enc_lower_s *lower) +{ + FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower; + + DEBUGASSERT(priv->handler); + (void)stm32_gpiosetevent(GPIO_ENCX24J600_INTR, false, true, true, priv->handler); +} + +static void up_disable(FAR const struct enc_lower_s *lower) +{ + (void)stm32_gpiosetevent(GPIO_ENCX24J600_INTR, false, true, true, NULL); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_netinitialize + ****************************************************************************/ + +void up_netinitialize(void) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Assumptions: + * 1) ENCX24J600 pins were configured in up_spi.c early in the boot-up phase. + * 2) Clocking for the SPI1 peripheral was also provided earlier in boot-up. + */ + + spi = stm32_spibus_initialize(ENCX24J600_SPI_PORTNO); + if (!spi) + { + nlldbg("Failed to initialize SPI port %d\n", ENCX24J600_SPI_PORTNO); + return; + } + + /* Bind the SPI port to the ENCX24J600 driver */ + + ret = enc_initialize(spi, &g_enclower.lower, ENCX24J600_DEVNO); + + if (ret < 0) + { + nlldbg("Failed to bind SPI port %d ENCX24J600 device %d: %d\n", + ENCX24J600_SPI_PORTNO, ENCX24J600_DEVNO, ret); + return; + } + + nllvdbg("Bound SPI port %d to ENCX24J600 device %d\n", + ENCX24J600_SPI_PORTNO, ENCX24J600_DEVNO); +} + +#endif /* CONFIG_ENCX24J600 */ diff --git a/configs/olimex-stm32-p107/src/stm32_spi.c b/configs/olimex-stm32-p107/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..8fea7b1ac9a0d4df45ee3fa59540c7953b8167f3 --- /dev/null +++ b/configs/olimex-stm32-p107/src/stm32_spi.c @@ -0,0 +1,155 @@ +/************************************************************************************ + * configs/olimex-stm32-p107/src/stm32_spi.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" + +#include "olimex-stm32-p107.h" + +#if defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Olimex stm32-p107 board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ + /* NOTE: Clocking for SPI3 was already provided in stm32_rcc.c. + * Configurations of SPI pins is performed in stm32_spi.c. + * Here, we only initialize chip select pins unique to the board + * architecture. + */ + + /* Configure ENCX24J600 SPI1 CS (also RESET and interrupt pins) */ + +#if defined(CONFIG_ENCX24J600) && defined(CONFIG_STM32_SPI3) + stm32_configgpio(GPIO_ENCX24J600_CS); + stm32_configgpio(GPIO_ENCX24J600_INTR); +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + if (devid == SPIDEV_ETHERNET) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_ENCX24J600_CS, !selected); + } +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#endif /* CONFIG_STM32_SPI3 */ diff --git a/configs/olimex-stm32-p207/Kconfig b/configs/olimex-stm32-p207/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..92269e5df749be9a3532139cdcc02b35fe0b1979 --- /dev/null +++ b/configs/olimex-stm32-p207/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_OLIMEX_STM32P207 + +endif diff --git a/configs/olimex-stm32-p207/README.txt b/configs/olimex-stm32-p207/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..a543d00c98707a2b59adccdd1a4a6dab8a19954d --- /dev/null +++ b/configs/olimex-stm32-p207/README.txt @@ -0,0 +1,32 @@ +README +====== + +The NuttX configuration for the Olimex STM32-P207 is assembled mainly +from the configurations stm32f4discovery and stm3240g-eval. + +It was tested with the NuttX EABI "buildroot" Toolchain. + +Debugging with OpenOCD via an Olimex ARM-USB-TINY-H works. Note that +CONFIG_DEBUG_SYMBOLS and CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG +are enabled so that the JTAG connection is not disconnected by the idle +loop. + +The following peripherals are enabled in this configuration. + - LEDs: show the sytem status + + - Buttons: TAMPER-button, WKUP-button, J1-Joystick (consists of RIGHT-, + UP-, LEFT-, DOWN-, and CENTER-button). Built in app + 'buttons' works. + + - ADC: ADC1 samples the red trim potentiometer AN_TR + Built in app 'adc' works. + + - USB-FS-OTG: enabled but not really tested, since there is only a + USB-A-connector (host) connected to the full speed µC inputs. + The other connector (device) is connected to the high speed µC + inputs, but it seems that NuttX has currently no driver + for it. + + - CAN: Built in app 'can' works, but appart from that not really tested. + + - Ethernet: Ping to other station on the network works. \ No newline at end of file diff --git a/configs/olimex-stm32-p207/include/board.h b/configs/olimex-stm32-p207/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..c00053690543b1a71e286ea2ae566132387bd8f9 --- /dev/null +++ b/configs/olimex-stm32-p207/include/board.h @@ -0,0 +1,277 @@ +/************************************************************************************ + * configs/olimex-stm32-p207/include/board.h + * + * Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_OLIMEX_STM32_P207_INCLUDE_BOARD_H +#define __CONFIGS_OLIMEX_STM32_P207_INCLUDE_BOARD_H 1 + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif +#include "stm32_rcc.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC (30-60KHz, uncalibrated) + * HSE - On-board crystal frequency is 25MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 25000000ul + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* Main PLL Configuration. + * + * PLL source is HSE + * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN + * = (25,000,000 / 25) * 240 + * = 240,000,000 + * SYSCLK = PLL_VCO / PLLP + * = 240,000,000 / 2 = 120,000,000 + * USB OTG FS, SDIO and RNG Clock + * = PLL_VCO / PLLQ + * = 240,000,000 / 5 = 48,000,000 + * = 48,000,000 + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(240) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(5) + +#define STM32_SYSCLK_FREQUENCY 120000000ul + +/* AHB clock (HCLK) is SYSCLK (120MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/4 (30MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) + +/* Timers driven from APB1 will be twice PCLK1 (60Mhz)*/ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 (60MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 (120Mhz)*/ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_LED3 2 +#define BOARD_LED4 3 +#define BOARD_NLEDS 4 + +#define BOARD_LED_GREEN1 BOARD_LED1 +#define BOARD_LED_YELLOW BOARD_LED2 +#define BOARD_LED_RED BOARD_LED3 +#define BOARD_LED_GREEN2 BOARD_LED4 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) +#define BOARD_LED4_BIT (1 << BOARD_LED4) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the + * Olimex STM32-P207. The following definitions describe how NuttX controls the LEDs: + */ + +#define LED_STARTED 0 /* LED1 */ +#define LED_HEAPALLOCATE 1 /* LED2 */ +#define LED_IRQSENABLED 2 /* LED1 + LED2 */ +#define LED_STACKCREATED 3 /* LED3 */ +#define LED_INIRQ 4 /* LED1 + LED3 */ +#define LED_SIGNAL 5 /* LED2 + LED3 */ +#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */ +#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */ + +/* Button definitions ***************************************************************/ +/* The Olimex STM32-P207 supports seven buttons: */ + +#define BUTTON_TAMPER 0 +#define BUTTON_WKUP 1 +#define BUTTON_RIGHT 2 +#define BUTTON_UP 3 +#define BUTTON_LEFT 4 +#define BUTTON_DOWN 5 +#define BUTTON_CENTER 6 + +#define NUM_BUTTONS 7 + +#define BUTTON_TAMPER_BIT (1 << BUTTON_TAMPER) +#define BUTTON_WKUP_BIT (1 << BUTTON_WKUP) +#define BUTTON_RIGHT_BIT (1 << BUTTON_RIGHT) +#define BUTTON_UP_BIT (1 << BUTTON_UP) +#define BUTTON_LEFT_BIT (1 << BUTTON_LEFT) +#define BUTTON_DOWN_BIT (1 << BUTTON_DOWN) +#define BUTTON_CENTER_BIT (1 << BUTTON_CENTER) + +/* Alternate function pin selections ************************************************/ + +//USART3: +#define GPIO_USART3_RX GPIO_USART3_RX_3 //PD9 +#define GPIO_USART3_TX GPIO_USART3_TX_3 //PD8 +#define GPIO_USART3_CTS GPIO_USART3_CTS_2 //PD11 +#define GPIO_USART3_RTS GPIO_USART3_RTS_2 //PD12 + +//CAN: +#define GPIO_CAN1_RX GPIO_CAN1_RX_2 //PB8 +#define GPIO_CAN1_TX GPIO_CAN1_TX_2 //PB9 + +//Ethernet: +/* + * - PA2 is ETH_MDIO + * - PC1 is ETH_MDC + * - PB5 is ETH_PPS_OUT - NC (not connected) + * - PA0 is ETH_MII_CRS - NC + * - PA3 is ETH_MII_COL - NC + * - PB10 is ETH_MII_RX_ER - NC + * - PB0 is ETH_MII_RXD2 - NC + * - PH7 is ETH_MII_RXD3 - NC + * - PC3 is ETH_MII_TX_CLK - NC + * - PC2 is ETH_MII_TXD2 - NC + * - PB8 is ETH_MII_TXD3 - NC + * - PA1 is ETH_MII_RX_CLK/ETH_RMII_REF_CLK + * - PA7 is ETH_MII_RX_DV/ETH_RMII_CRS_DV + * - PC4 is ETH_MII_RXD0/ETH_RMII_RXD0 + * - PC5 is ETH_MII_RXD1/ETH_RMII_RXD1 + * - PB11 is ETH_MII_TX_EN/ETH_RMII_TX_EN + * - PG13 is ETH_MII_TXD0/ETH_RMII_TXD0 + * - PG14 is ETH_MII_TXD1/ETH_RMII_TXD1 + */ + +#define GPIO_ETH_PPS_OUT GPIO_ETH_PPS_OUT_1 +#define GPIO_ETH_MII_CRS GPIO_ETH_MII_CRS_1 +#define GPIO_ETH_MII_COL GPIO_ETH_MII_COL_1 +#define GPIO_ETH_MII_RX_ER GPIO_ETH_MII_RX_ER_1 +#define GPIO_ETH_MII_RXD2 GPIO_ETH_MII_RXD2_1 +#define GPIO_ETH_MII_RXD3 GPIO_ETH_MII_RXD3_1 +#define GPIO_ETH_MII_TXD3 GPIO_ETH_MII_TXD3_1 +#define GPIO_ETH_MII_TX_EN GPIO_ETH_MII_TX_EN_2 +#define GPIO_ETH_MII_TXD0 GPIO_ETH_MII_TXD0_2 +#define GPIO_ETH_MII_TXD1 GPIO_ETH_MII_TXD1_2 +#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_1 +#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 +#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_OLIMEX_STM32_P207_INCLUDE_BOARD_H */ diff --git a/configs/olimex-stm32-p207/nsh/Make.defs b/configs/olimex-stm32-p207/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..833e3f52a392fb90a912e388efa4d3ce36a93d6a --- /dev/null +++ b/configs/olimex-stm32-p207/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/olimex-stm32-p207/nsh/Make.defs +# +# Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/olimex-stm32-p207/nsh/defconfig b/configs/olimex-stm32-p207/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..8e72e8d52a5423188396c8bedc8cfc4d23c7c9e3 --- /dev/null +++ b/configs/olimex-stm32-p207/nsh/defconfig @@ -0,0 +1,1418 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_CAN_EXTID is not set +CONFIG_CAN1_BAUD=250000 +CONFIG_CAN_TSEG1=6 +CONFIG_CAN_TSEG2=8 +# CONFIG_CAN_LOOPBACK is not set +# CONFIG_USBHOST_BULK_DISABLE is not set +# CONFIG_USBHOST_INT_DISABLE is not set +# CONFIG_USBHOST_ISOC_DISABLE is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +CONFIG_ARCH_CHIP_STM32F207ZE=y +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +CONFIG_STM32_STM32F20XX=y +# CONFIG_STM32_STM32F205 is not set +CONFIG_STM32_STM32F207=y +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +CONFIG_STM32_ADC1=y +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +CONFIG_STM32_CAN1=y +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +CONFIG_STM32_OTGFS=y +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +CONFIG_STM32_TIM1=y +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_ADC=y +CONFIG_STM32_CAN=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_PWM is not set +CONFIG_STM32_TIM1_ADC=y +CONFIG_STM32_TIM1_ADC1=y +CONFIG_HAVE_ADC1_TIMER=y +CONFIG_STM32_ADC1_SAMPLE_FREQUENCY=100 +CONFIG_STM32_ADC1_TIMTRIG=0 +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set + +# +# ADC Configuration +# +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +# CONFIG_STM32_MII is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=31 +CONFIG_STM32_PHYSR_ALTCONFIG=y +CONFIG_STM32_PHYSR_ALTMODE=0x1c +CONFIG_STM32_PHYSR_10HD=0x4 +CONFIG_STM32_PHYSR_100HD=0x8 +CONFIG_STM32_PHYSR_10FD=0x14 +CONFIG_STM32_PHYSR_100FD=0x18 +# CONFIG_STM32_ETH_PTP is not set +CONFIG_STM32_RMII=y +# CONFIG_STM32_RMII_MCO1 is not set +# CONFIG_STM32_RMII_MCO2 is not set +CONFIG_STM32_RMII_EXTCLK=y + +# +# USB FS Host Configuration +# +CONFIG_STM32_OTGFS_RXFIFO_SIZE=128 +CONFIG_STM32_OTGFS_NPTXFIFO_SIZE=96 +CONFIG_STM32_OTGFS_PTXFIFO_SIZE=128 +CONFIG_STM32_OTGFS_DESCSIZE=128 +# CONFIG_STM32_OTGFS_SOFINTR is not set + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# +# CONFIG_STM32_USBHOST_REGDEBUG is not set +# CONFIG_STM32_USBHOST_PKTDUMP is not set + +# +# USB Device Configuration +# + +# +# CAN driver configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_OLIMEX_STM32P207=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-stm32-p207" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +CONFIG_BOARDCTL_ADCTEST=y +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_CANINIT is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +CONFIG_CAN=y +# CONFIG_ARCH_HAVE_CAN_ERRORS is not set +# CONFIG_CAN_FD is not set +CONFIG_CAN_FIFOSIZE=8 +CONFIG_CAN_NPENDINGRTR=4 +# CONFIG_CAN_TXREADY is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +CONFIG_ANALOG=y +CONFIG_ADC=y +CONFIG_ADC_FIFOSIZE=8 +# CONFIG_ADC_NO_STARTUP_CONV is not set +# CONFIG_ADC_ADS1242 is not set +# CONFIG_ADC_ADS125X is not set +# CONFIG_ADC_PGA11X is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +CONFIG_ETH0_PHY_KS8721=y +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +CONFIG_USBHOST=y +CONFIG_USBHOST_NPREALLOC=4 +CONFIG_USBHOST_HAVE_ASYNCH=y +# CONFIG_USBHOST_ASYNCH is not set +# CONFIG_USBHOST_HUB is not set +# CONFIG_USBHOST_MSC is not set +# CONFIG_USBHOST_CDCACM is not set +# CONFIG_USBHOST_HIDKBD is not set +# CONFIG_USBHOST_HIDMOUSE is not set +# CONFIG_USBHOST_RTL8187 is not set +# CONFIG_USBHOST_TRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +# CONFIG_NET_UDP_CHECKSUMS is not set +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +# CONFIG_NET_UDP_READAHEAD is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_DNSSERVER_NOADDR is not set +CONFIG_NETDB_DNSSERVER_IPv4=y +CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001 + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_ADC=y +CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0" +CONFIG_EXAMPLES_ADC_GROUPSIZE=1 +# CONFIG_EXAMPLES_ADC_SWTRIG is not set +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=6 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=7 +CONFIG_EXAMPLES_BUTTONS_NAME0="Button 0" +CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0xa0000002 +CONFIG_NSH_DRIPADDR=0xa0000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-stm32-p207/nsh/setenv.sh b/configs/olimex-stm32-p207/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ad8fd4e1e973d57ae02fe5b71f7d8b12e15d0688 --- /dev/null +++ b/configs/olimex-stm32-p207/nsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/olimex-stm32-p207/nsh/setenv.sh +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-stm32-p207/scripts/ld.script b/configs/olimex-stm32-p207/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..5b311478bc707a0a985ca3ed9ff2d690d3caed59 --- /dev/null +++ b/configs/olimex-stm32-p207/scripts/ld.script @@ -0,0 +1,121 @@ +/**************************************************************************** + * configs/olimex-stm32-p207/scripts/ld.script + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F207ZET6 has 512Kb of FLASH beginning at address 0x0800:0000 and + * 128Kb of SRAM. SRAM is split up into two blocks: + * + * 1) 112Kb of SRAM beginning at address 0x2000:0000 + * 2) 16Kb of SRAM beginning at address 0x2001:c000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/olimex-stm32-p207/src/Makefile b/configs/olimex-stm32-p207/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..ffd5a70b1aaf6852c152b1e6cae7503159950cc1 --- /dev/null +++ b/configs/olimex-stm32-p207/src/Makefile @@ -0,0 +1,67 @@ +############################################################################ +# configs/olimex-stm32-p207/src/Makefile +# +# Copyright (C) 2009-2010, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_STM32_OTGFS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_NSH_LIBRARY),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += stm32_adc.c +endif + +ifeq ($(CONFIG_CAN),y) +CSRCS += stm32_can.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/olimex-stm32-p207/src/olimex-stm32-p207.h b/configs/olimex-stm32-p207/src/olimex-stm32-p207.h new file mode 100644 index 0000000000000000000000000000000000000000..21f0d8ecfdd4eb45df0b08a9b5bc75c70fc935e3 --- /dev/null +++ b/configs/olimex-stm32-p207/src/olimex-stm32-p207.h @@ -0,0 +1,152 @@ +/**************************************************************************** + * configs/olimex-stm32-p107/src/olimex-stm32-p207.h + * + * Copyright (C) 2013 Max Holtzberg. All rights reserved. + * Author: Max Holtzberg + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_OLIMEX_STM32_P207_SRC_H +#define __CONFIGS_OLIMEX_STM32_P207_SRC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Olimex-STM32-P207 GPIOs ****************************************************/ +/* LEDs */ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN6) +#define GPIO_LED2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN7) +#define GPIO_LED3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN8) +#define GPIO_LED4 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN9) + +/* BUTTONS -- NOTE that all have EXTI interrupts configured */ + +#define MIN_IRQBUTTON BUTTON_TAMPER +#define MAX_IRQBUTTON BUTTON_CENTER +#define NUM_IRQBUTTONS 7 + +#define GPIO_BTN_TAMPER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN13) +#define GPIO_BTN_WKUP (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0) +#define GPIO_BTN_RIGHT (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTG|GPIO_PIN6) +#define GPIO_BTN_UP (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTG|GPIO_PIN7) +#define GPIO_BTN_LEFT (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTG|GPIO_PIN11) +#define GPIO_BTN_DOWN (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTG|GPIO_PIN8) +#define GPIO_BTN_CENTER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTG|GPIO_PIN15) + +/* USB OTG FS + * + * PA9 OTG_FS_VBUS VBUS sensing (also connected to the green LED) + * PC2 OTG_FS_PowerSwitchOn + * PB10 OTG_FS_Overcurrent + */ + +#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN9) +#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN2) + +#ifdef CONFIG_USBHOST +# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTB|GPIO_PIN10) + +#else +# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN10) +#endif + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the STM32F4Discovery board. + * + ************************************************************************************/ + +#ifdef CONFIG_STM32_OTGFS +void weak_function stm32_usbinitialize(void); +#endif + +/************************************************************************************ + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device connection/ + * disconnection events. + * + ************************************************************************************/ + +#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST) +int stm32_usbhost_initialize(void); +#endif + +/************************************************************************************ + * Name: stm32_adc_initialize + * + * Description: + * Called at application startup time to initialize the ADC functionality. + * + ************************************************************************************/ + +#ifdef CONFIG_ADC +int stm32_adc_initialize(void); +#endif + +/************************************************************************************ + * Name: stm32_can_initialize + * + * Description: + * Called at application startup time to initialize the CAN functionality. + * + ************************************************************************************/ + +#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)) +int stm32_can_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_OLIMEX_STM32_P207_SRC_H */ diff --git a/configs/olimex-stm32-p207/src/stm32_adc.c b/configs/olimex-stm32-p207/src/stm32_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..96fc837b9718e97deda2f8d9342bbf1bd186bbe6 --- /dev/null +++ b/configs/olimex-stm32-p207/src/stm32_adc.c @@ -0,0 +1,179 @@ +/************************************************************************************ + * configs/olimex-stm32-p207/src/stm32_adc.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "stm32_adc.h" +#include "olimex-stm32-p207.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Configuration ********************************************************************/ +/* Up to 3 ADC interfaces are supported */ + +#if STM32_NADC < 3 +# undef CONFIG_STM32_ADC3 +#endif + +#if STM32_NADC < 2 +# undef CONFIG_STM32_ADC2 +#endif + +#if STM32_NADC < 1 +# undef CONFIG_STM32_ADC1 +#endif + +#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3) +#ifndef CONFIG_STM32_ADC1 +# warning "Channel information only available for ADC1" +#endif + +/* The number of ADC channels in the conversion list */ + +#define ADC1_NCHANNELS 1 + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* The Olimex STM32-P207 has a 10 Kohm potentiometer AN_TR connected to PC0 + * ADC123_IN10 + */ + +/* Identifying number of each ADC channel: Variable Resistor. */ + +#ifdef CONFIG_STM32_ADC1 +static const uint8_t g_chanlist[ADC1_NCHANNELS] = {10}; + +/* Configurations of pins used byte each ADC channels */ + +static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN10}; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ + return stm32_adc_initialize(); +} + +/************************************************************************************ + * Name: stm32_adc_initialize + * + * Description: + * Called at application startup time to initialize the ADC functionality. + * + ************************************************************************************/ + +int stm32_adc_initialize(void) +{ +#ifdef CONFIG_STM32_ADC1 + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + int i; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Configure the pins as analog inputs for the selected channels */ + + for (i = 0; i < ADC1_NCHANNELS; i++) + { + stm32_configgpio(g_pinlist[i]); + } + + /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + + adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +#else + return -ENOSYS; +#endif +} + +#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */ +#endif /* CONFIG_ADC */ diff --git a/configs/olimex-stm32-p207/src/stm32_appinit.c b/configs/olimex-stm32-p207/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..01f6362c34490886dcc378b5e1d361f36c29ead3 --- /dev/null +++ b/configs/olimex-stm32-p207/src/stm32_appinit.c @@ -0,0 +1,166 @@ +/**************************************************************************** + * config/olimex-stm32-p207/src/stm32_appinit.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#ifdef CONFIG_STM32_OTGFS +# include "stm32_usbhost.h" +#endif + +#include "stm32.h" +#include "olimex-stm32-p207.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#define HAVE_USBDEV 1 +#define HAVE_USBHOST 1 +#define HAVE_USBMONITOR 1 + +/* Can't support USB host or device features if USB OTG FS is not enabled */ + +#ifndef CONFIG_STM32_OTGFS +# undef HAVE_USBDEV +# undef HAVE_USBHOST +# undef HAVE_USBMONITOR +#endif + +/* Can't support USB device monitor if USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +# undef HAVE_USBMONITOR +#endif + +/* Can't support USB host is USB host is not enabled */ + +#ifndef CONFIG_USBHOST +# undef HAVE_USBHOST +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR) +# undef HAVE_USBMONITOR +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + * CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + * CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, && + * CONFIG_LIB_BOARDCTL=n : + * Called from board_initialize(). + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR) || defined(CONFIG_ADC) + int ret; +#endif + +#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)) + /* Configure on-board CAN if CAN support has been selected. */ + + ret = stm32_can_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize CAN: %d\n", ret); + } +#endif + +#ifdef CONFIG_ADC + /* Configure on-board ADCs if ADC support has been selected. */ + + ret = stm32_adc_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize ADC: %d\n", ret); + } +#endif + +#ifdef HAVE_USBHOST + /* Initialize USB host operation. stm32_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + + ret = stm32_usbhost_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret); + } +#endif + + return OK; +} diff --git a/configs/olimex-stm32-p207/src/stm32_autoleds.c b/configs/olimex-stm32-p207/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..a46bfcc970bae84e7338259de30a373495aaa52f --- /dev/null +++ b/configs/olimex-stm32-p207/src/stm32_autoleds.c @@ -0,0 +1,184 @@ +/**************************************************************************** + * configs/olimex-stm32-p207/src/stm32_autoleds.c + * + * Copyright (C) 2011-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "stm32.h" +#include "olimex-stm32-p207.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* The following definitions map the encoded LED setting to GPIO settings */ + +#define LED_STARTED_BITS (BOARD_LED1_BIT) +#define LED_HEAPALLOCATE_BITS (BOARD_LED2_BIT) +#define LED_IRQSENABLED_BITS (BOARD_LED1_BIT | BOARD_LED2_BIT) +#define LED_STACKCREATED_BITS (BOARD_LED3_BIT) +#define LED_INIRQ_BITS (BOARD_LED1_BIT | BOARD_LED3_BIT) +#define LED_SIGNAL_BITS (BOARD_LED2_BIT | BOARD_LED3_BIT) +#define LED_ASSERTION_BITS (BOARD_LED1_BIT | BOARD_LED2_BIT | BOARD_LED3_BIT) +#define LED_PANIC_BITS (BOARD_LED4_BIT) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const unsigned int g_ledbits[8] = +{ + LED_STARTED_BITS, + LED_HEAPALLOCATE_BITS, + LED_IRQSENABLED_BITS, + LED_STACKCREATED_BITS, + LED_INIRQ_BITS, + LED_SIGNAL_BITS, + LED_ASSERTION_BITS, + LED_PANIC_BITS +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static inline void led_clrbits(unsigned int clrbits) +{ + if ((clrbits & BOARD_LED1_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED1, false); + } + + if ((clrbits & BOARD_LED2_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED2, false); + } + + if ((clrbits & BOARD_LED3_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED3, false); + } + + if ((clrbits & BOARD_LED4_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED4, false); + } +} + +static inline void led_setbits(unsigned int setbits) +{ + if ((setbits & BOARD_LED1_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED1, true); + } + + if ((setbits & BOARD_LED2_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED2, true); + } + + if ((setbits & BOARD_LED3_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED3, true); + } + + if ((setbits & BOARD_LED4_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED4, true); + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_clrbits(BOARD_LED1_BIT | BOARD_LED2_BIT | BOARD_LED3_BIT | BOARD_LED4_BIT); + led_setbits(g_ledbits[led]); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_clrbits(g_ledbits[led]); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/olimex-stm32-p207/src/stm32_boot.c b/configs/olimex-stm32-p207/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..7234449534eb729b19f33903ae91e681448c23cf --- /dev/null +++ b/configs/olimex-stm32-p207/src/stm32_boot.c @@ -0,0 +1,125 @@ +/************************************************************************************ + * configs/olimex-stm32-p207/src/stm32_boot.c + * + * Copyright (C) 2009, 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "olimex-stm32-p207.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Initialize USB if the 1) OTG FS controller is in the configuration and 2) + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. Presumeably either CONFIG_USBDEV or CONFIG_USBHOST is also + * selected. + */ + +#ifdef CONFIG_STM32_OTGFS + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + + /* Configure on-board BUTTONs if BUTTON support has been selected. */ + +#ifdef CONFIG_ARCH_BUTTONS + board_button_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + board_app_initialize(); +#endif +} +#endif diff --git a/configs/olimex-stm32-p207/src/stm32_buttons.c b/configs/olimex-stm32-p207/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..5caaeab83515c4b18b03cbfcb793a5b8edc3ce42 --- /dev/null +++ b/configs/olimex-stm32-p207/src/stm32_buttons.c @@ -0,0 +1,194 @@ +/**************************************************************************** + * configs/olimex-stm32-p207/src/stm32_buttons.c + * + * Copyright (C) 2011-2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "olimex-stm32-p207.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* Pin configuration for each STM32F4 Discovery button. This array is indexed by + * the BUTTON_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_TAMPER, + GPIO_BTN_WKUP, + GPIO_BTN_RIGHT, + GPIO_BTN_UP, + GPIO_BTN_LEFT, + GPIO_BTN_DOWN, + GPIO_BTN_CENTER +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + + /* Check that state of each key */ + + if (!stm32_gpioread(g_buttons[BUTTON_TAMPER])) + { + ret |= BUTTON_TAMPER_BIT; + } + + if (stm32_gpioread(g_buttons[BUTTON_WKUP])) + { + ret |= BUTTON_WKUP_BIT; + } + + if (stm32_gpioread(g_buttons[BUTTON_RIGHT])) + { + ret |= BUTTON_RIGHT_BIT; + } + + if (stm32_gpioread(g_buttons[BUTTON_UP])) + { + ret |= BUTTON_UP_BIT; + } + + if (stm32_gpioread(g_buttons[BUTTON_LEFT])) + { + ret |= BUTTON_LEFT_BIT; + } + + if (stm32_gpioread(g_buttons[BUTTON_DOWN])) + { + ret |= BUTTON_DOWN_BIT; + } + + if (stm32_gpioread(g_buttons[BUTTON_CENTER])) + { + ret |= BUTTON_CENTER_BIT; + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/olimex-stm32-p207/src/stm32_can.c b/configs/olimex-stm32-p207/src/stm32_can.c new file mode 100644 index 0000000000000000000000000000000000000000..9728422aeafcc86defa53526f872739743b93704 --- /dev/null +++ b/configs/olimex-stm32-p207/src/stm32_can.c @@ -0,0 +1,149 @@ +/************************************************************************************ + * configs/olimex-stm32-p207/src/stm32_can.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include "stm32.h" +#include "stm32_can.h" +#include "olimex-stm32-p207.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2) +# warning "Both CAN1 and CAN2 are enabled. Only CAN1 is connected." +# undef CONFIG_STM32_CAN2 +#endif + +#ifdef CONFIG_STM32_CAN1 +# define CAN_PORT 1 +#else +# define CAN_PORT 2 +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + return stm32_can_initialize(); +} + +/**************************************************************************************************** + * Name: stm32_can_initialize + * + * Description: + * Called at application startup time to initialize the CAN functionality. + * + ****************************************************************************************************/ + +int stm32_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = stm32_caninitialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && (CONFIG_STM32_CAN1 || CONFIG_STM32_CAN2) */ diff --git a/configs/olimex-stm32-p207/src/stm32_usb.c b/configs/olimex-stm32-p207/src/stm32_usb.c new file mode 100644 index 0000000000000000000000000000000000000000..c9b2c968aaef5e7ac7a8ba3c771019184abb5e8c --- /dev/null +++ b/configs/olimex-stm32-p207/src/stm32_usb.c @@ -0,0 +1,318 @@ +/************************************************************************************ + * configs/olimex-stm32-p207/src/stm32_usb.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "stm32.h" +#include "stm32_otgfs.h" +#include "olimex-stm32-p207.h" + +#ifdef CONFIG_STM32_OTGFS + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST) +# define HAVE_USB 1 +#else +# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST" +# undef HAVE_USB +#endif + +#ifndef CONFIG_USBHOST_DEFPRIO +# define CONFIG_USBHOST_DEFPRIO 50 +#endif + +#ifndef CONFIG_USBHOST_STACKSIZE +# ifdef CONFIG_USBHOST_HUB +# define CONFIG_USBHOST_STACKSIZE 1536 +# else +# define CONFIG_USBHOST_STACKSIZE 1024 +# endif +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static struct usbhost_connection_s *g_usbconn; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: usbhost_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static int usbhost_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + uvdbg("Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + uvdbg("%s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the STM32F4Discovery board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + /* The OTG FS has an internal soft pull-up. No GPIO configuration is required */ + + /* Configure the OTG FS VBUS sensing GPIO, and Power On GPIOs */ + +#ifdef CONFIG_STM32_OTGFS + stm32_configgpio(GPIO_OTGFS_VBUS); + stm32_configgpio(GPIO_OTGFS_PWRON); + stm32_configgpio(GPIO_OTGFS_OVER); +#endif +} + +/*********************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +int stm32_usbhost_initialize(void) +{ + int pid; +#if defined(CONFIG_USBHOST_HUB) || defined(CONFIG_USBHOST_MSC) || defined(CONFIG_USBHOST_CDCACM) + int ret; +#endif + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + uvdbg("Register class drivers\n"); + +#ifdef CONFIG_USBHOST_HUB + /* Initialize USB hub class support */ + + ret = usbhost_hub_initialize(); + if (ret < 0) + { + udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB host Mass Storage Class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + + /* Then get an instance of the USB host interface */ + + uvdbg("Initialize USB host\n"); + g_usbconn = stm32_otgfshost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + uvdbg("Start usbhost_waiter\n"); + + pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO, + CONFIG_USBHOST_STACKSIZE, + (main_t)usbhost_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + + return -ENODEV; +} +#endif + +/************************************************************************************ + * Name: stm32_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent condition is + * detected. + * + * Input Parameter: + * handler - New overcurrent interrupt handler + * + * Returned value: + * Old overcurrent interrupt handler + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +xcpt_t stm32_setup_overcurrent(xcpt_t handler) +{ + return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler); +} +#endif + +/*********************************************************************************** + * Name: stm32_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be provided be + * each platform that implements the STM32 OTG FS host interface + * + * "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump + * or, if 5 V are available on the application board, a basic power switch, must + * be added externally to drive the 5 V VBUS line. The external charge pump can + * be driven by any GPIO output. When the application decides to power on VBUS + * using the chosen GPIO, it must also set the port power bit in the host port + * control and status register (PPWR bit in OTG_FS_HPRT). + * + * "The application uses this field to control power to this port, and the core + * clears this bit on an overcurrent condition." + * + * Input Parameters: + * iface - For future growth to handle multiple USB host interface. Should be zero. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +void stm32_usbhost_vbusdrive(int iface, bool enable) +{ + DEBUGASSERT(iface == 0); + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, false); + } + else + { + /* Disable the Power Switch by driving the enable pin high */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, true); + } +} +#endif + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} +#endif + +#endif /* CONFIG_STM32_OTGFS */ diff --git a/configs/olimex-stm32-p207/src/stm32_userleds.c b/configs/olimex-stm32-p207/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..289c6beec8431ac624027c7cbe02a76c74db9730 --- /dev/null +++ b/configs/olimex-stm32-p207/src/stm32_userleds.c @@ -0,0 +1,131 @@ +/**************************************************************************** + * configs/olimex-stm32-p207/src/stm32_userleds.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include "stm32.h" +#include "olimex-stm32-p207.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* This array maps an LED number to GPIO pin configuration */ + +static uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4 +}; + +/**************************************************************************** + * Private Function Protototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + stm32_gpiowrite(g_ledcfg[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) != 0); + stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) != 0); + stm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) != 0); + stm32_gpiowrite(GPIO_LED4, (ledset & BOARD_LED4_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/olimex-strp711/Kconfig b/configs/olimex-strp711/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..0b1a75fb901c661bab9db2c8e86815b82470b8c5 --- /dev/null +++ b/configs/olimex-strp711/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_OLIMEX_STRP711 +endif diff --git a/configs/olimex-strp711/README.txt b/configs/olimex-strp711/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..f60345719349bcc2cba2a655aa83bb36ba5931cb --- /dev/null +++ b/configs/olimex-strp711/README.txt @@ -0,0 +1,447 @@ +README File for the Olimex STR-P711 NuttX Port +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Contents +^^^^^^^^ + + Olimex STR-P711 + Features + Power Supply + GIO Usage + Jumpers + External Interrupts + Development Environment + GNU Toolchain Options + NuttX buildroot Toolchain + Linux OpenOCD with Wiggler JTAG + Windows OpenOCD will Olimex JTAG + MMC/SD Slot + ENC28J60 Module + Configurations + STR71x-Specific Configuration Settings + +Olimex STR-P711 +^^^^^^^^^^^^^^^ + Features: + + - MCU: STR711FR2T6 16/32 bit ARM7TDMI™ with 256K Bytes Program Flash, + 64K Bytes RAM, USB 2.0, RTC, 12 bit ADC, 4x UARTs, 2x I2C,2x SPI, + 5x 32bit TIMERS, 2x PWM, 2x CCR, WDT, up to 50MHz operation + - Standard JTAG connector with ARM 2x10 pin layout for programming/debugging + with ARM-JTAG + - USB connector + - Two channel RS232 interface and drivers + - SD/MMC card connector + - Two buttons + - Trimpot connected to ADC + - Two status LEDs + - Buzzer + - UEXT - 10 pin extension connector for Olimex addon peripherials like MP3, + RF2.4Ghz, RFID etc. modules + - 2x SPI connectors + - I2C connector + - On board voltage regulator 3.3V with up to 800mA current + - Single power supply: 6V AC or DC required, USB port can power the board + - Power supply LED + - Power supply filtering capacitor + - RESET circuit + - RESET button + - 4 Mhz crystal oscillator + - 32768 Hz crystal and RTC + + Power Supply + + 6V AC or DC (or powered from USB port) + + GIO with on-board connections (others available for prototyping): + + SIGNAL DESCRIPTION PIN + ------- --------------------- ----- + MISO1 BSPI0 to MMC/SD P0.4 + MOSI1 " " "" " " P0.5 + SCLK1 " " "" " " P0.6 + SS1 " " "" " " P0.7 + U0RX UART 0 P0.8 + U0TX " " " P0.9 + U1RX UART 1 P0.10 + U1TX " " " P0.11 + BUZZ Buzzer P0.13 + WAKE-UP Button P0.15 + AIN0 Potentiometer (AN_TR) P1.3 + LED1 LED 1 P1.8 + LED2 LED 2 P1.9 + WP MMC/SD write protect P1.10 + USBOP USB P1.11 + USBON " " P1.12 + BUT Button P1.13 + CP MMC/SD card present P1.15 + + Jumpers + STNBY Will pull pin 23 /STDBY low + + External Interrupt (XTI) availability. + + XTI TQFP64 + LINE PIN SIGNAL * OLIMEX USAGE + ---- ------ ------------------------- - ------------------------ + 2 -- P2.8 (Not available in TQFP64) + 3 -- P2.9 (Not available in TQFP64) + 4 -- P2.10 (Not available in TQFP64) + 5 25 P2.11 (Not available in TQFP64) + 6 42 P1.11/CANRX USBOP (to USB connector) + 7 47 P1.13/HCLK/I0.SCL CLK ?????????????? + 8 48 P1.14/HRXD/I0.SDA BUT button (PL open, PU closed) + 9 53 P0.1/S0.MOSI/U3.RX * SPI0-3 MOSI0 + 10 54 P0.2/S0.SCLK/I1.SCL * SPI0-5 SCLK0 + 11 61 P0.6/S1.SCLK * SPI1-5 SCLK1 (also to MMC slot) + 12 63 P0.8/U0.RX/U0.TX U0.TX + 13 1 P0.10/U1.RX/U1.TX/SC.DATA U1.RX + 14 5 P0.13/U2.RX/T2.OCMPA BUZZ (to buzzer circult) + 15 20 P0.15/WAKEUP WAKE-UP button (PL open, PU closed) + + * Only these pins are available at a + connector and are not dedicated to + other board functions. + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The NuttX buildroot Toolchain (see below). + 2. The CodeSourcery GNU toolchain, + 3. The devkitARM GNU toolchain, or + + All testing has been conducted using the NuttX buildroot toolchain. To use + the CodeSourcery or devkitARM GNU toolchain, you simply need to build the + system as follows: + + make # Will build for the NuttX buildroot toolchain + make CROSSDEV=arm-eabi- # Will build for the devkitARM toolchain + make CROSSDEV=arm-none-eabi- # Will build for the CodeSourcery toolchain + make CROSSDEV=arm-nuttx-elf- # Will build for the NuttX buildroot toolchain + + Of course, hard coding this CROSS_COMPILE value in Make.defs file will save + some repetitive typing. + + NOTE: the CodeSourcery and devkitARM toolchains are Windows native toolchains. + The NuttX buildroot toolchain is a Cygwin toolchain. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context; make CROSSDEV=arm-none-eabi- + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) may not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +NuttX buildroot Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the ARM toolchain (if + different from the default). + + If you have no ARM toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + + 1. You must have already configured Nuttx in nuttx. + + cd tools + ./configure.sh olimex-strp711/ + + 2. Download the latest buildroot package into + + 3. unpack + + 4. cd /buildroot + + 5. cp configs/arm-defconfig .config + or + cp configs/arm7tdmi-defconfig-4.3.3 .config (Last tested with this toolchain) + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h so that the PATH variable includes the path to the + newly built binaries. + +Linux OpenOCD with Wiggler JTAG +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +For a debug environment, I am using OpenOCD with a Wiggler-clone JTAG interface. The +following steps worked for me with a 20081028 OpenOCD snapshot. + +GENERAL STEPS: + +1. Check out OpenOCD + + svn checkout svn://svn.berlios.de/openocd/trunk openocd + +2. Build OpenOCD + + Read the INSTALL file from the files you just downloaded. You probably just need + to run: + + ./bootstrap + + Then configure OpenOCD using the configure script created by ./bootstrap. + + ./configure --enable-parport + + Build OpenOCD with: + + make + + Install OpenOCD. Since we used the default configuration the code will be + installed at /usr/local/bin/openocd. Other files will be installed at + /usr/local/lib/openocd (configuration files, scripts, etc.) and /usr/local/share/info + (online documentation accessable via 'info openocd'). You need root priviledges + to do the following: + + make install. + +3. Setup + + OpenOCD reads its configuration from the file openocd.cfg in the current directory + when started. You have two different options: + + * Create a symbolic link named openocd.cfg to one of the configuration files in + /usr/local/lib/openocd, or + + * Use a custom configuration file specified with the ‘-f ’ command line + switch opeion when starting OpenOCD. + + For the STR-P711, I have included bash scripts in the scripts sub-directory. + +4. Running OpenOCD + + Make sure the ARM7TDMI board is powered and the JTAG cable is connected + + Run 'src/openocd -d' (might be required to be root) and check for any errors + reported. The '-d' option enables debugging info. + +5. Telnet interface + + telnet into port 4444 to get a command interface: 'telnet localhost 4444' + +6. GDB + + start arm-nuttx-elf-gdb + type 'file ' to load the executable + type 'set debug remote 1' to enable tracing of gdb protocol (if required) + type 'target remote localhost:3333' to connect to the target + The same commands from the telnet interface can now be accessed through the + 'monitor' command, e.g. 'monitor help' + +Windows OpenOCD will Olimex JTAG +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + I have been using the Olimex ARM-USB-OCD JTAG debugger with the STR-P711 + (http://www.olimex.com). The OpenOCD configuration file is here: + scripts/oocd_ft2xx.cfg. There is also a script on the scripts/ directory that + I used to start the OpenOCD daemon on my system called oocd.sh. That + script would probably require some modifications to work in another + environment: + + - possibly the value of OPENOCD_PATH + - If you are working under Linux you will need to change any + occurances of `cygpath -w blablabla` to just blablabla + + The setenv.sh file includes some environment varialble settings + that are needed by oocd.sh. If you have $PATH and other environment + variables set up, then you should be able to start the OpenOCD daemon like: + + oocd.sh + + To use the Windows Olimex USB JTAG (or 'oocd.sh pp' to use the Wriggler + JTAG) where it is assumed that you are executing oocd.sh from the top level + level NuttX directory. + + Once the OpenOCD daemon has been started, you can connect to it via + GDB using the following GDB command: + + arm-nuttx-elf-gdb + (gdb) target remote localhost:3333 + + And you can load the NuttX ELF file into FLASH: + + (gdb) load nuttx + + (There are also some files in the scripts/ directory that I used to + get OpenOCD working with a Wriggler clone... I never got that stuff + working). + +MMC/SD Slot +^^^^^^^^^^^ + + STR-P711 PIN MMC/SD USAGE PIN CONFIGURATION + ------------ ---------------- ----------------------- + P0.7/S1.SS 1 CD/DAT3/CS P.07 output + P0.5/S1.MOSI 2 CMD/DI MOSI1 + --- 3 VSS1 --- + --- 4 VDD --- + P0.6/S1.SCLK 5 CLK/SCLK SLCK1 + --- 6 VSS2 --- + P0.4/S1.MISO 7 DAT0/D0 MISO1 + --- 8 DAT1/RES (Pulled up) + --- 9 DAT2/RES (Pulled up) + + P1.10/USBCLK 10/14 WP P1.10 input + P1.15/HTXD 13/15 CP P1.15 input + + Use of SPI1 doesn't conflict with anything. WP conflicts USB; CP conflicts + with NTXD. + +ENC28J60 Module +^^^^^^^^^^^^^^^ + + The ENC28J60 module does not come on the Olimex-STR-P711, but this describes + how I have connected it. NOTE that the ENC28J60 requires an external interrupt + (XTI) pin. The only easily accessible XTI pins are on SPI0/1 so you can't have + both SPI0 and 1 together with this configuration. + + Module CON5 QFN ENC2860 Description + --------------- ------------------------------------------------------- + 1 J8-1 NET CS 5 ~CS Chip select input pin for SPI interface (active low) + 2 2 SCK 4 SCK Clock in pin for SPI interface + 3 3 MOSI 3 SI Data in pin for SPI interface + 4 4 MISO 2 SO Data out pin for SPI interface + 5 5 GND -- --- --- + 10 J9-1 3V3 -- --- --- + 9 2 WOL 1 ~WOL Unicast WOL filter + 8 3 NET INT 28 ~INT Interrupt output pin (active low) + 7 4 CLKOUT 27 CLKOUT Programmable clock output pin + 6 5 NET RST 6 ~RESET Active-low device Reset input + + For the Olimex STR-P711, the ENC28J60 module is placed on SPI0 and uses + P0.3 for CS, P0.6 for an interrupt, and P0.4 as a reset: + + Module CON5 Olimex STR-P711 Connection + --------------- ------------------------------------------------------- + 1 J8-1 NET CS SPI0-2 P0.3 output P0.3/S0.SS/I1.SDA + 2 2 SCK SPI0-5 SCLK0 P0.2/S0.SCLK/I1.SCL + 3 3 MOSI SPI0-3 MOSI0 P0.0/S0.MOSI/U3.RX + 4 4 MISO SPI0-4 MISO0 P0.1/S0.MISO/U3.TX + 5 5 GND SPI0-1 GND + 10 J9-1 3V3 SPI0-6 3.3V + 9 2 WOL NC + 8 3 NET INT SPI1-5 P0.6 XTI 11 P0.6/S1.SCLK + 7 4 CLKOUT NC + 6 5 NET RST SPI1-4 P0.4 output P0.4/S1.MISO + + UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60 + interrupt conflict with TIM1. + + NOTE: As of this writing, the ENC28J60 does not function on the board. + The board just locks up when the ENC29J60 is powered. Most likely, + in sufficient current is provided via USB to power both the board and + the ENC28J60 (And I don't have the correct wall wart to power the + the board). + +Common Configuration Notes: +--------------------------- + + 1. Each Olimex STRP711 configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh olimex-strp711/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume the NuttX Buildroot toolchain + under Linux (should work under Windows with Cygwin as well). This + is easily reconfigured: + + CONFIG_HOST_LINUX=y + CONFIG_ARM_TOOLCHAIN_BUILDROOT=y + +Configuration Sub-Directories: +------------------------------ + + nettest: + This configuration directory may be used to enable networking using the + an Microchip ENC28J60 SPI Ethernet module (see above for connection to + STR-P711). + + nsh: + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables both the serial and telnetd NSH interfaces. + +STR71x-Specific Configuration Settings +-------------------------------------- + + CONFIG_STR71X_I2C0, CONFIG_STR71X_I2C1, CONFIG_STR71X_UART0, CONFIG_STR71X_UART1, + CONFIG_STR71X_UART2, CONFIG_STR71X_UART3, CONFIG_STR71X_USB, CONFIG_STR71X_CAN, + CONFIG_STR71X_BSPI0, CONFIG_STR71X_BSPI1, CONFIG_STR71X_HDLC, CONFIG_STR71X_XTI, + CONFIG_STR71X_GPIO0, CONFIG_STR71X_GPIO1, CONFIG_STR71X_GPIO2, CONFIG_STR71X_ADC12, + CONFIG_STR71X_CKOUT, CONFIG_STR71X_TIM1, CONFIG_STR71X_TIM2, CONFIG_STR71X_TIM3, and + CONFIG_STR71X_RTC + Select peripherals to initialize (Timer0 and EIC are always initialized) + CONFIG_UART_PRI, STR71X_BSPI_PRI, CONFIG_TIM_PRI, CONFIG_USB_PRI + Can be defined to set the priority of NuttX managed devices. Default is 1. + CONFIG_STR71X_BANK0, CONFIG_STR71X_BANK1, CONFIG_STR71X_BANK2, and CONFIG_STR71X_BANK3 + Enable initialize of external memory banks 0-3. + CONFIG_STR71X_BANK0_SIZE, CONFIG_STR71X_BANK1_SIZE, CONFIG_STR71X_BANK2_SIZE, and + CONFIG_STR71X_BANK3_SIZE + If a particular external memory bank is configured, then its width must be provided. + 8 and 16 (bits) are the only valid options. + CONFIG_STR71X_BANK0_WAITSTATES, CONFIG_STR71X_BANK1_WAITSTATES, + CONFIG_STR71X_BANK2_WAITSTATES, and CONFIG_STR71X_BANK3_WAITSTATES + If a particular external memory bank is configured, then the number of waistates + for the bank must also be provided. Valid options are {0, .., 15} + CONFIG_STR71X_BIGEXTMEM + The default is to provide 20 bits of address for all external memory regions. If + any memory region is larger than 1Mb, then this option should be selected. In this + case, 24 bits of addressing will be used + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity, 3=mark 1, 4=space 0 + CONFIG_UARTn_2STOP - Two stop bits diff --git a/configs/olimex-strp711/include/board.h b/configs/olimex-strp711/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..7ee60e52dab502f2fe5f1d034af5c5ab05bd4707 --- /dev/null +++ b/configs/olimex-strp711/include/board.h @@ -0,0 +1,180 @@ +/**************************************************************************** + * configs/olimex-strp711/include/board.h + * + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/**************************************************************************** + * Features: + * + * - MCU: STR711FR2T6 16/32 bit ARM7TDMI™ with 256K Bytes Program Flash, + * 64K Bytes RAM, USB 2.0, RTC, 12 bit ADC, 4x UARTs, 2x I2C,2x SPI, + * 5x 32bit TIMERS, 2x PWM, 2x CCR, WDT, up to 50MHz operation + * - Standard JTAG connector with ARM 2x10 pin layout for programming/debugging + * with ARM-JTAG + * - USB connector + * - Two channel RS232 interface and drivers + * - SD/MMC card connector + * - Two buttons + * - Trimpot connected to ADC + * - Two status LEDs + * - Buzzer + * - UEXT - 10 pin extension connector for Olimex addon peripherials like MP3, + * RF2.4Ghz, RFID etc. modules + * - 2x SPI connectors + * - I2C connector + * - On board voltage regulator 3.3V with up to 800mA current + * - Single power supply: 6V AC or DC required, USB port can power the board + * - Power supply LED + * - Power supply filtering capacitor + * - RESET circuit + * - RESET button + * - 4 Mhz crystal oscillator + * - 32768 Hz crystal and RTC + * + ****************************************************************************/ + +#ifndef _CONFIGS_OLIMEX_STRP711_BOARD_H +#define _CONFIGS_OLIMEX_STRP711_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#ifndef __ASSEMBLY__ +# include +#endif +#include "chip.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* Main Oscillator Frequency = 4MHz */ + +#define STR71X_RCCU_MAIN_OSC (4000000) + +/* RTC Oscillator Frequency = 32,768 Hz */ + +#define STR71X_RCCU_RTC_OSC (32768) + +/* HCLK driving PLL2 */ + +#define STR71X_PCU_HCLK_OSC (4000000) /* ? */ + +/* PLL1 Setup: + * + * PLL1 input clock: CLK2 = Main OSC = 4MHz + * PLL1 output clock: PLL1OUT = 16 * CLK2 / 2 = 32MHz + * PLL1 output: CLK3 = PLL1OUT = 32MHz (hard coded selection) + * RCLK = CLK3 = 32MHz (hard coded selection) + * APB1 peripheral clock: PCLK1 = RCLK = 32MHz + * APB2 peripheral clock: PCLK2 = RCLK = 32MHz + * Main system clock: MCLK = RCLK = 32MHz + */ + +#undef STR71X_PLL1IN_DIV2 /* Don't divide main OSC by two */ +#define STR71X_PLL1OUT_MUL 16 /* PLL1OUT = 16 * CLK2 */ +#define STR71X_PLL1OUT_DIV 2 /* PLL1OUT = CLK2 / 2 */ +#define STR71X_APB1_DIV 1 /* PCLK1 = RCLK */ +#define STR71X_APB2_DIV 1 /* PCLK2 = RCLK */ +#define STR71X_MCLK_DIV 1 /* MCLK = RCLK */ + +/* PLL2 Setup -- only needed for HDLC or USB + * + * USB input: USB clock + * HCLK = 4MHz? + * USB clock = 12 * HCLK / 1 = 48 MHz + */ + +#undef STR71X_USBIN_PLL2 /* USB input is USB clock */ +#define STR71X_PLL2OUT_MUL 12 /* PLL2OUT = 12 * HCLK */ +#define STR71X_PLL2OUT_DIV 1 /* PLL2OUT = HCLK / 1 */ + +/* LED definitions **********************************************************/ + +/* The Olimex board has only two LEDs, so following states are faked as + * follows + * + * SET CLEAR + * LED_STARTED (none) (n/a) + * LED_HEAPALLOCATE LED1 (n/a) + * LED_IRQSENABLED LED1 (n/a) + * LED_STACKCREATED LED1 (n/a) + * LED_INIRQ LED1+LED2 LED1 + * LED_SIGNAL LED1+LED2 LED1 + * LED_ASSERTION LED1+LED2 LED1 + * LED_PANIC LED1+LED2* LED1 + * + * *The previous state of LED2 will be retained + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/* Button definitions *******************************************************/ + +/* The Olimex board has two buttons, one labled "BUT" and the other "WAKEUP" */ + +#define BUT_BUTTON 1 /* Bit 0: BUT button is depressed */ +#define WAKEUP_BUTTON 2 /* Bit 1: WAKEUP button is depressed */ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif +#endif + +#endif /* _CONFIGS_OLIMEX_STRP711_BOARD_H */ diff --git a/configs/olimex-strp711/nettest/Make.defs b/configs/olimex-strp711/nettest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..ca1550a6edd05e43f9ce3f3e4e48c8035c503048 --- /dev/null +++ b/configs/olimex-strp711/nettest/Make.defs @@ -0,0 +1,125 @@ +############################################################################## +# configs/olimex-strp711/nettest/Make.defs +# +# Copyright (C) 2010-2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(ARCHCCMAJOR),4) +ifneq ($(HOSTOS),Cygwin) + OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment +endif +endif + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/olimex-strp711/nettest/defconfig b/configs/olimex-strp711/nettest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..f8c48131aa7e452b6a43b82da02a880437bf74f0 --- /dev/null +++ b/configs/olimex-strp711/nettest/defconfig @@ -0,0 +1,827 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +CONFIG_ARCH_CHIP_STR71X=y +# CONFIG_ARCH_CHIP_MOXART is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="str71x" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +CONFIG_ARM_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARM_OABI_TOOLCHAIN is not set + +# +# STR71x Configuration Options +# + +# +# STR71x Peripheral Selections +# +# CONFIG_STR71X_ADC12 is not set +CONFIG_STR71X_BSPI0=y +# CONFIG_STR71X_BSPI1 is not set +# CONFIG_STR71X_CAN is not set +# CONFIG_STR71X_CKOUT is not set +CONFIG_STR71X_GPIO0=y +CONFIG_STR71X_GPIO1=y +# CONFIG_STR71X_GPIO2 is not set +# CONFIG_STR71X_HDLC is not set +# CONFIG_STR71X_I2C0 is not set +# CONFIG_STR71X_I2C1 is not set +# CONFIG_STR71X_RTC is not set +# CONFIG_STR71X_TIM1 is not set +# CONFIG_STR71X_TIM2 is not set +# CONFIG_STR71X_TIM3 is not set +CONFIG_STR71X_UART0=y +CONFIG_STR71X_UART1=y +# CONFIG_STR71X_UART2 is not set +# CONFIG_STR71X_UART3 is not set +# CONFIG_STR71X_USB is not set +CONFIG_STR71X_XTI=y +# CONFIG_STR71X_DISABLE_PERIPHINIT is not set + +# +# STR71x EMI Configuration +# +# CONFIG_STR71X_BANK0 is not set +# CONFIG_STR71X_BANK1 is not set +# CONFIG_STR71X_BANK2 is not set +# CONFIG_STR71X_BANK3 is not set +# CONFIG_STR71X_HAVE_EXTMEM is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1431 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_OLIMEX_STRP711=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-strp711" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nettest_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +CONFIG_ENC28J60=y +CONFIG_ENC28J60_NINTERFACES=1 +CONFIG_ENC28J60_SPIMODE=0 +CONFIG_ENC28J60_FREQUENCY=20000000 +CONFIG_ENC28J60_STATS=y +# CONFIG_ENC28J60_HALFDUPPLEX is not set +# CONFIG_ENC28J60_DUMPPACKET is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=38400 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=38400 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_NETTEST=y +# CONFIG_EXAMPLES_NETTEST_SERVER is not set +# CONFIG_EXAMPLES_NETTEST_PERFORMANCE is not set +CONFIG_EXAMPLES_NETTEST_IPv4=y +CONFIG_EXAMPLES_NETTEST_INIT=y +CONFIG_EXAMPLES_NETTEST_NOMAC=y + +# +# IPv4 addresses +# +CONFIG_EXAMPLES_NETTEST_IPADDR=0x0a000002 +CONFIG_EXAMPLES_NETTEST_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_NETTEST_NETMASK=0xffffff00 +CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-strp711/nettest/setenv.sh b/configs/olimex-strp711/nettest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..e30820e826277b96249be0871440096b22dd657b --- /dev/null +++ b/configs/olimex-strp711/nettest/setenv.sh @@ -0,0 +1,72 @@ +#!/bin/bash +# configs/olimex-strp711/nettest/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-strp711/nsh/Make.defs b/configs/olimex-strp711/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..268e6039ebdb0e53754dc16cc7fb0f394d866f7f --- /dev/null +++ b/configs/olimex-strp711/nsh/Make.defs @@ -0,0 +1,125 @@ +############################################################################## +# configs/olimex-strp711/nsh/Make.defs +# +# Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(ARCHCCMAJOR),4) +ifneq ($(HOSTOS),Cygwin) + OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment +endif +endif + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/olimex-strp711/nsh/defconfig b/configs/olimex-strp711/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d45d72b3cedff0330327f87dbd320c45263e1238 --- /dev/null +++ b/configs/olimex-strp711/nsh/defconfig @@ -0,0 +1,761 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +CONFIG_ARCH_CHIP_STR71X=y +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="str71x" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +CONFIG_ARM_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARM_OABI_TOOLCHAIN is not set + +# +# STR71x Configuration Options +# + +# +# STR71x Peripheral Selections +# +# CONFIG_STR71X_ADC12 is not set +# CONFIG_STR71X_BSPI0 is not set +CONFIG_STR71X_BSPI1=y +# CONFIG_STR71X_CAN is not set +# CONFIG_STR71X_CKOUT is not set +CONFIG_STR71X_GPIO0=y +CONFIG_STR71X_GPIO1=y +# CONFIG_STR71X_GPIO2 is not set +# CONFIG_STR71X_HDLC is not set +# CONFIG_STR71X_I2C0 is not set +# CONFIG_STR71X_I2C1 is not set +# CONFIG_STR71X_RTC is not set +# CONFIG_STR71X_TIM1 is not set +# CONFIG_STR71X_TIM2 is not set +# CONFIG_STR71X_TIM3 is not set +CONFIG_STR71X_UART0=y +CONFIG_STR71X_UART1=y +# CONFIG_STR71X_UART2 is not set +# CONFIG_STR71X_UART3 is not set +# CONFIG_STR71X_USB is not set +# CONFIG_STR71X_XTI is not set +# CONFIG_STR71X_DISABLE_PERIPHINIT is not set + +# +# STR71x EMI Configuration +# +# CONFIG_STR71X_BANK0 is not set +# CONFIG_STR71X_BANK1 is not set +# CONFIG_STR71X_BANK2 is not set +# CONFIG_STR71X_BANK3 is not set +# CONFIG_STR71X_HAVE_EXTMEM is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1431 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_OLIMEX_STRP711=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimex-strp711" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=1 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=5 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=16 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=38400 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=38400 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_TMPDIR="/tmp" +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_CONSOLE=y + +# +# USB Trace Support +# +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +CONFIG_LIB_BOARDCTL=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-strp711/nsh/setenv.sh b/configs/olimex-strp711/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..6724741f6976a68d3f3aefe80cd91a2d667955af --- /dev/null +++ b/configs/olimex-strp711/nsh/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/olimex-strp711/nsh/setenv.sh +# +# Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export STR41XSCRIPTS="$WD/configs/olimex-strp711/scripts" +export PATH="${BUILDROOT_BIN}:${STR41XSCRIPTS}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimex-strp711/scripts/ld.script b/configs/olimex-strp711/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..2717592dc725754a6401fdc797a5b231831e0e3f --- /dev/null +++ b/configs/olimex-strp711/scripts/ld.script @@ -0,0 +1,123 @@ +/**************************************************************************** + * configs/olimex-strp711/scripts/ld.script + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The str71x has 256Kb of non-volatile memory beginning at address + * 0x4000:0000 for program storage (Bank0, an addition 16Kb is available + * for data storage in Bank1). The OS entry point is via the reset vector + * at address 0x00000000 where the FLASH is remapped at reset. + * + * The str71x has 64Kb of on-chip static RAM beginning at address + * 0x2000:0000. The .data section will be relocated from _eronly + * to _sdata at boot time. + */ + +/* The STR711 has 256Kb of FLASH beginning at address 0x4000:0000 and 64Kb + * of SRAM beginning at address 0x2000:0000 + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x40000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/olimex-strp711/scripts/oocd-reset b/configs/olimex-strp711/scripts/oocd-reset new file mode 100644 index 0000000000000000000000000000000000000000..cd7bfb56c27c919c881d44f9023406658ee08f47 --- /dev/null +++ b/configs/olimex-strp711/scripts/oocd-reset @@ -0,0 +1,41 @@ +# +# The following command wills be executed on +# reset (because of run_and_init in the config-file) +# - wait for target halt +# - erase memory +# - flash content of file main.bin into target-memory +# - shutdown openocd +# +# created by Martin Thomas 8/2007 +# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects +# based on information from Dominic Rath +# + +arm7_9 dcc_downloads enable +wait_halt +sleep 10 +poll +flash probe 0 + +# STR710FZ2 erase all banks: +#flash erase 0 0 9 +# STR710FZ2 erase first 5 banks (0-4) +flash erase 0 0 4 +# if flash earse is not available in your OpenOCD-version use +# flash erase_sector but also read the documentation on +# flash auto_erase which can be used together with flash write_image + +flash write 0 main.bin 0x0 +# flash write may not be available in your OpenOCD-version +# alternative: flash write_binary (flash write_binary ) +# flash write_binary 0 main.bin 0x0 +# flash write_binary may not be available in your OpenOCD-version +# alternatives: flash write_bank or flash write_image +# syntax: flash write_image [offset] [type] where type can +# be ihex, bin, elf or s19 +# flash write_bank flash-bank bin-filename offset +# i.e. flash write_bank 0 main.bin 0x0 + +reset run +sleep 10 +shutdown diff --git a/configs/olimex-strp711/scripts/oocd.sh b/configs/olimex-strp711/scripts/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..33924c93d1630fbd411f5a0e4bac7bd7298884d1 --- /dev/null +++ b/configs/olimex-strp711/scripts/oocd.sh @@ -0,0 +1,79 @@ +#!/bin/sh + +# Set up pathes to binaries, scripts, configuration files + +hostos=`uname -o 2>/dev/null || echo "Other"` +if [ "X${hostos}" = "XCygwin" ]; then + installdir=/cygdrive/c/gccfd/openocd/bin + ft2exe=$installdir/openocd-ftd2xx.exe + ppexe=$installdir/openocd-ppdev.exe +else + installdir=/usr/local/bin + ft2exe=$installdir/openocd + ppexe=$installdir/openocd + SUDO=sudo +fi + +# The root to the top-level NuttX directory should be in an environment variable + +if [ -z $STR41XSCRIPTS ]; then + echo "Environment variable $STR41XSCRIPTS is not defined" + echo "Has NuttX been configured?" + echo "If so, try sourcing the setenv.sh script in the top-level directory" + exit 1 +fi + +# Check that at least one configuration file exists at that point +if [ ! -f $STR41XSCRIPTS/oocd_ft2xx.cfg ]; then + echo "No configuration files found at $STR41XSCRIPTS" + echo "Path to configuration files unknown" + exit 1 +fi + +# Parse command line inputs + +usage="USAGE: $0 [-h] [-d] [-pp] [-ft2xx]" + +debug=no +oocdcfg=$STR41XSCRIPTS/oocd_ft2xx.cfg +openocd=$ft2exe +while [ ! -z "$1" ]; do + case $1 in + -d ) + debug=yes + set -x + ;; + -pp ) + oocdcfg=$STR41XSCRIPTS/oocd_wiggler.cfg + openocd=$ppexe + ;; + -ft2xx ) + oocdcfg=$STR41XSCRIPTS/oocd_ft2xx.cfg + openocd=$ft2exe + ;; + -h ) + echo $usage + exit 0 + ;; + * ) + echo "Unrecognized option: $1" + echo $usage + exit 1 + ;; + esac + shift +done + +# Setup debug options + +export options="-d 1" + +# Run OpenOCD -- here it is assumed (1) that you must have root priveleges to +# execute OpenOCD and (2) that your user is listed in the /etc/sudoers file. + +$SUDO $openocd $options -f $oocdcfg +if [ "X${hostos}" = "XCygwin" ]; then + $openocd $options -f `cygpath -w $oocdcfg` +else + sudo $openocd $options -f $oocdcfg +fi diff --git a/configs/olimex-strp711/scripts/oocd_flash.script b/configs/olimex-strp711/scripts/oocd_flash.script new file mode 100644 index 0000000000000000000000000000000000000000..111a785b5e92291a1c154f53a748f0d9b571df22 --- /dev/null +++ b/configs/olimex-strp711/scripts/oocd_flash.script @@ -0,0 +1,26 @@ +# +# The following command will be executed on reset +# - wait for target halt +# - erase memory +# - flash content of file nuttx.bin into target-memory +# - shutdown openocd +# +# Based on file originally created by Martin Thomas +# + +arm7_9 dcc_downloads enable +wait_halt +sleep 10 +poll +flash probe 0 + +# STR710 erase all banks: +#flash erase 0 0 9 +# STR710 erase first 4 banks (32kB) +flash erase 0 0 4 + +flash write 0 nuttx.bin 0x0 +reset run +sleep 10 +shutdown + diff --git a/configs/olimex-strp711/scripts/oocd_ft2xx.cfg b/configs/olimex-strp711/scripts/oocd_ft2xx.cfg new file mode 100644 index 0000000000000000000000000000000000000000..395da86b8a308c1f19adc2062a710ebe405c4c19 --- /dev/null +++ b/configs/olimex-strp711/scripts/oocd_ft2xx.cfg @@ -0,0 +1,37 @@ +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +#interface +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG A" +ft2232_layout "olimex-jtag" +ft2232_vid_pid 0x15BA 0x0003 +jtag_speed 0 + +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config trst_and_srst srst_pulls_trst + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +#target configuration +daemon_startup reset + +#target +#target arm7tdmi +target arm7tdmi little run_and_halt 0 arm7tdmi +run_and_halt_time 0 30 + +working_area 0 0x2000C000 0x4000 nobackup + +#flash bank +flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x +#flash bank cfi 0x60000000 0x00400000 2 2 0 + +#Script used for FLASH programming +#target_script 0 reset str71x_flashprogram.ocd + +# For more information about the configuration files, take a look at: +# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger diff --git a/configs/olimex-strp711/scripts/oocd_wiggler.cfg b/configs/olimex-strp711/scripts/oocd_wiggler.cfg new file mode 100644 index 0000000000000000000000000000000000000000..ece900669ad54f6df99edd4942079dde932bfd9b --- /dev/null +++ b/configs/olimex-strp711/scripts/oocd_wiggler.cfg @@ -0,0 +1,46 @@ +# Daemon configuration +telnet_port 4444 +gdb_port 3333 + +# Interface - Wiggler-Type JTAG-device (see /usr/local/lib/openocd/interface/parport.cfg) +interface parport +parport_port 0x378 +parport_cable wiggler +jtag_speed 0 +jtag_nsrst_delay 20 +jtag_ntrst_delay 20 + +# Start the OpenOCD daemon and reset the processor +init +reset halt + +# (See /usr/local/lib/openocd/target/str710.cfg) +# Start slow, speed up after reset +jtag_khz 10 + +# Use combined on interfaces or targets that can't set TRST/SRST separately +reset_config trst_and_srst srst_pulls_trst + +# Jtag scan chain +# format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +# target +# target arm7tdmi +target arm7tdmi little 0 arm7tdmi +[new_target_name] configure -event reset-start { jtag_khz 10 } +[new_target_name] configure -event reset-init { jtag_khz 6000 } +[new_target_name] configure -event old-gdb_program_config { script event/str710_program.script } + +target_script 0 reset oocd_flash.script + +# Flash-configuration STR710FZ2/STR711FR2: +# internal flash at address 0x40000000 size 256kB (0x40000) +# internal ram at address 0x20000000 size 64kB (0x10000) +# a 16kB working area inside RAM: +working_area 0 0x2000C000 0x4000 nobackup + +# Flash bank str7x 0 0 +flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x +flash bank str7x 0x400C0000 0x00004000 0 0 0 STR71x + diff --git a/configs/olimex-strp711/scripts/usb-driver.txt b/configs/olimex-strp711/scripts/usb-driver.txt new file mode 100644 index 0000000000000000000000000000000000000000..83d7598a5569e5b386da7281f201cfa2f6441ed7 --- /dev/null +++ b/configs/olimex-strp711/scripts/usb-driver.txt @@ -0,0 +1,25 @@ +https://www.olimex.com/dev/pdf/ARM/JTAG/Repair%20Procedure%20for%20OpenOcd-Rev.%20G%20drivers.pdf + +Repair procedure for ARM-USB-OCD drivers + +1. Uninstalling ARM-USB-OCD drivers +------------------------------------- +1.1. Connect your programmer/debugger to your computer, open Device Manager + and uninstall the drivers for ARM-USB-OCD. +1.2. After you have uninstalled ARM-USB-TINY driver from Device Manager, + disconnect the programmer from your computer. +1.3. Now you should download FTClean.exe from here: + http://www.ftdichip.com/Support/Utilities/FTClean.zip. +1.4. After download is complete extract the "*.zip" file, open folder FTClean, + and run FTClean.exe +1.5. Ror VID (Hex) select "Other". And after that fill the first box with 15ba + and "PID (Hex)" with 0004. +1.6. Press "Clean System" button. Make sure that all FTDI devices are + disconnected. (My require administrator privileges). + +2. Re-installing the ARM-USB-OCD driver +--------------------------------------- +2.1 Connect the programmer/debugger to the computer. +2.2 When prompted, browse to the C:\gccfd\DRIVERS\ARM-USB-OCD-DRIVER + directory and install. (A different driver is required for OpenOCD + 0.4.0. That driver is available from the olimex.com web site). diff --git a/configs/olimex-strp711/src/.gitignore b/configs/olimex-strp711/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/olimex-strp711/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/olimex-strp711/src/Makefile b/configs/olimex-strp711/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..b7114e32d55830ce3f46023c1850e119910e248b --- /dev/null +++ b/configs/olimex-strp711/src/Makefile @@ -0,0 +1,47 @@ +############################################################################ +# configs/olimex-strp711/src/Makefile +# +# Copyright (C) 2007-2008, 2010, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = str71_spi.c str71_leds.c str71_buttons.c +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += str71_appinit.c +endif +ifeq ($(CONFIG_ENC28J60),y) +CSRCS += str71_enc28j60.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/olimex-strp711/src/str71_appinit.c b/configs/olimex-strp711/src/str71_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..44cca74773f58704f10aec807d45782e57d6cec6 --- /dev/null +++ b/configs/olimex-strp711/src/str71_appinit.c @@ -0,0 +1,152 @@ +/**************************************************************************** + * config/olimex-strp711/src/str71_appinit.c + * + * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "str71x.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#define NSH_HAVEUSBDEV 1 +#ifdef CONFIG_STR71X_BSPI1 +# define NSH_HAVEMMCSD 1 +# ifdef CONFIG_NSH_ARCHINIT +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 1 +# error "The Olimex STR-P711 MMC/SD is on BSPI1" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 0 +# endif +# if !defined(CONFIG_NSH_MMCSDSLOTNO) || CONFIG_NSH_MMCSDSLOTNO != 0 +# error "The Olimex STR-P711 MMC/SD is on BSPI1 slot 0" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +# else +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 0 +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#else +# undef NSH_HAVEMMCSD +#endif + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef NSH_HAVEMMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef NSH_HAVEMMCSD + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + spi = str71_spibus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + syslog(LOG_INFO, "Binding SPI port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, CONFIG_NSH_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SPI port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); +#endif + + return OK; +} diff --git a/configs/olimex-strp711/src/str71_buttons.c b/configs/olimex-strp711/src/str71_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..98537be3883b5be2c9bb8e17cc335759627dcabe --- /dev/null +++ b/configs/olimex-strp711/src/str71_buttons.c @@ -0,0 +1,131 @@ +/**************************************************************************** + * configs/olimex-strp711/src/str71_buttons.c + * + * Copyright (C) 2008-2009, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* The Olimex board has two buttons, one labled "BUT" and the other "WAKEUP" + * + * P0.15: WAKEUP button + * P1.13: BUT button + */ + +#define STR71X_BUTBUTTON_GPIO1 (0x2000) +#define STR71X_WAKEUPBUTTON_GPIO0 (0x8000) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_BUTTONS +void board_button_initialize(void) +{ + uint16_t reg16; + + /* Configure the GPIO0 & 1 pins as inputs */ + + reg16 = getreg16(STR71X_GPIO0_PC0); + reg16 |= STR71X_WAKEUPBUTTON_GPIO0; + putreg16(reg16, STR71X_GPIO0_PC0); + + reg16 = getreg16(STR71X_GPIO0_PC1); + reg16 &= ~STR71X_WAKEUPBUTTON_GPIO0; + putreg16(reg16, STR71X_GPIO0_PC1); + + reg16 = getreg16(STR71X_GPIO0_PC2); + reg16 &= ~STR71X_WAKEUPBUTTON_GPIO0; + putreg16(reg16, STR71X_GPIO0_PC2); + + reg16 = getreg16(STR71X_GPIO1_PC0); + reg16 |= STR71X_BUTBUTTON_GPIO1; + putreg16(reg16, STR71X_GPIO1_PC0); + + reg16 = getreg16(STR71X_GPIO1_PC1); + reg16 &= ~STR71X_BUTBUTTON_GPIO1; + putreg16(reg16, STR71X_GPIO1_PC1); + + reg16 = getreg16(STR71X_GPIO1_PC2); + reg16 &= ~STR71X_BUTBUTTON_GPIO1; + putreg16(reg16, STR71X_GPIO1_PC2); +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + + if ((getreg16(STR71X_GPIO0_PD) & STR71X_WAKEUPBUTTON_GPIO0) != 0) + { + ret |= WAKEUP_BUTTON; + } + + if ((getreg16(STR71X_GPIO1_PD) & STR71X_BUTBUTTON_GPIO1) != 0) + { + ret |= BUT_BUTTON; + } + + return ret; +} +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/olimex-strp711/src/str71_enc28j60.c b/configs/olimex-strp711/src/str71_enc28j60.c new file mode 100644 index 0000000000000000000000000000000000000000..d36f61000ad31fb4100fb3dc589645e735bd423c --- /dev/null +++ b/configs/olimex-strp711/src/str71_enc28j60.c @@ -0,0 +1,251 @@ +/**************************************************************************** + * configs/olimex-strp711/src/str71_enc28j60.c + * + * Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* + * ENC28J60 Module + * + * The ENC28J60 module does not come on the Olimex-STR-P711, but this + * describes how I have connected it. NOTE that the ENC28J60 requires an + * external interrupt (XTI) pin. The only easily accessible XTI pins are on + * SPI0/1 so you can't have both SPI0 and 1 together with this configuration. + * + * Module CON5 QFN ENC2860 Description + * --------------- ------------------------------------------------------- + * 1 J8-1 NET CS 5 ~CS Chip select input pin for SPI interface (active low) + * 2 2 SCK 4 SCK Clock in pin for SPI interface + * 3 3 MOSI 3 SI Data in pin for SPI interface + * 4 4 MISO 2 SO Data out pin for SPI interface + * 5 5 GND -- --- --- + * 10 J9-1 3V3 -- --- --- + * 9 2 WOL 1 ~WOL Unicast WOL filter + * 8 3 NET INT 28 ~INT Interrupt output pin (active low) + * 7 4 CLKOUT 27 CLKOUT Programmable clock output pin + * 6 5 NET RST 6 ~RESET Active-low device Reset input + * + * For the Olimex STR-P711, the ENC28J60 module is placed on SPI0 and uses + * P0.3 for CS, P0.6 for an interrupt, and P0.4 as a reset: + * + * Module CON5 Olimex STR-P711 Connection + * --------------- ------------------------------------------------------- + * 1 J8-1 NET CS SPI0-2 P0.3 output P0.3/S0.SS/I1.SDA + * 2 2 SCK SPI0-5 SCLK0 P0.2/S0.SCLK/I1.SCL + * 3 3 MOSI SPI0-3 MOSI0 P0.0/S0.MOSI/U3.RX + * 4 4 MISO SPI0-4 MISO0 P0.1/S0.MISO/U3.TX + * 5 5 GND SPI0-1 GND + * 10 J9-1 3V3 SPI0-6 3.3V + * 9 2 WOL NC + * 8 3 NET INT SPI1-5 P0.6 XTI 11 P0.6/S1.SCLK + * 7 4 CLKOUT NC + * 6 5 NET RST SPI1-4 P0.4 output P0.4/S1.MISO + * + * UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60 + * interrupt conflict with TMR1. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "str71x.h" + +#ifdef CONFIG_ENC28J60 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* We assume that the ENC28J60 is on SPI0 */ + +#ifndef CONFIG_STR71X_BSPI0 +# error "Need CONFIG_STR71X_BSPI0 in the configuration" +#endif + +#ifndef CONFIG_STR71X_XTI +# error "Need CONFIG_STR71X_XTI in the configuration" +#endif + +/* UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60 + * interrupt conflict with BSPI1. + */ + +#ifdef CONFIG_STR71X_UART3 +# error "CONFIG_STR71X_UART3 cannot be used in this configuration" +#endif + +#ifdef CONFIG_STR71X_I2C1 +# error "CONFIG_STR71X_I2C1 cannot be used in this configuration" +#endif + +#ifdef CONFIG_STR71X_BSP1 +# error "CONFIG_STR71X_BSP1 cannot be used in this configuration" +#endif + +/* SPI Assumptions **********************************************************/ + +#define ENC28J60_SPI_PORTNO 0 /* On SPI0 */ +#define ENC28J60_DEVNO 0 /* Only one ENC28J60 */ +#define ENC28J60_IRQ STR71X_IRQ_PORT0p6 /* XTI Line 11: P0.6 */ + +/* ENC28J60 additional pins ************************************************* + * + * NOTE: The ENC28J60 is a 3.3V part; however, it was designed to be + * easily integrated into 5V systems. The SPI CS, SCK and SI inputs, + * as well as the RESET pin, are all 5V tolerant. On the other hand, + * if the host controller is operated at 5V, it quite likely will + * not be within specifications when its SPI and interrupt inputs + * are driven by the 3.3V CMOS outputs on the ENC28J60. A + * unidirectional level translator would be necessary. + */ + +# define ENC_GPIO0_CS (1 << 3) /* Chip select (P0.3) */ +# define ENC_GPIO0_NETRST (1 << 4) /* Reset (P0.4) */ +# define ENC_GPIO0_NETINT (1 << 6) /* Interrupt (P0.6) */ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler); +static void up_enable(FAR const struct enc_lower_s *lower); +static void up_disable(FAR const struct enc_lower_s *lower); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* The ENC28J60 normal provides interrupts to the MCU via a GPIO pin. The + * following structure provides an MCU-independent mechanism for controlling + * the ENC28J60 GPIO interrupt. + */ + +static const struct enc_lower_s g_enclower = +{ + .attach = up_attach, + .enable = up_enable, + .disable = up_disable +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: struct enc_lower_s methods + ****************************************************************************/ + +static int up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler) +{ + return irq_attach(ENC28J60_IRQ, handler); +} + +static void up_enable(FAR const struct enc_lower_s *lower) +{ + up_enable_irq(ENC28J60_IRQ); +} + +static void up_disable(FAR const struct enc_lower_s *lower) +{ + up_disable_irq(ENC28J60_IRQ); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_netinitialize + ****************************************************************************/ + +void up_netinitialize(void) +{ + FAR struct spi_dev_s *spi; + uint16_t reg16; + int ret; + + /* Get the SPI port */ + + spi = str71_spibus_initialize(ENC28J60_SPI_PORTNO); + if (!spi) + { + nlldbg("Failed to initialize SPI port %d\n", ENC28J60_SPI_PORTNO); + return; + } + + /* Configure the XTI for the ENC28J60 interrupt. */ + + ret = str71x_xticonfig(ENC28J60_IRQ, false); + if (ret < 0) + { + nlldbg("Failed configure interrupt for IRQ %d: %d\n", ENC28J60_IRQ, ret); + return; + } + + /* Take ENC28J60 out of reset (active low)*/ + + reg16 = getreg16(STR71X_GPIO0_PD); + reg16 &= ~ENC_GPIO0_NETRST; + putreg16(reg16, STR71X_GPIO0_PD); + + /* Bind the SPI port to the ENC28J60 driver */ + + ret = enc_initialize(spi, &g_enclower, ENC28J60_DEVNO); + if (ret < 0) + { + nlldbg("Failed to bind SPI port %d ENC28J60 device %d: %d\n", + ENC28J60_SPI_PORTNO, ENC28J60_DEVNO, ret); + return; + } + + nllvdbg("Bound SPI port %d to ENC28J60 device %d\n", + ENC28J60_SPI_PORTNO, ENC28J60_DEVNO); +} +#endif /* CONFIG_ENC28J60 */ diff --git a/configs/olimex-strp711/src/str71_leds.c b/configs/olimex-strp711/src/str71_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..192ca7bcd0f89f33edd8adde28a248667319a2d3 --- /dev/null +++ b/configs/olimex-strp711/src/str71_leds.c @@ -0,0 +1,220 @@ +/**************************************************************************** + * configs/olimex-strp711/src/str71_leds.c + * + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* There are two LEDs are connected to P1.8 & 9 */ + +#if defined(CONFIG_ARCH_LEDS) && !defined(CONFIG_STR71X_GPIO1) +# error "LEDs require GPIO1" +#endif + +#define STR71X_LED1GPIO1_BIT (0x0100) +#define STR71X_LED2GPIO1_BIT (0x0200) +#define STR71X_LEDGPIO1_BITS (STR71X_LED1GPIO1_BIT|STR71X_LED2GPIO1_BIT) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static uint16_t g_led2set; +static uint16_t g_led2clr; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: str71_setleds + ****************************************************************************/ + +static void str71_setleds(uint16_t setbits, uint16_t clearbits) +{ + uint16_t reg16; + + /* Save the state of LED2 for later */ + + g_led2set = setbits & STR71X_LED2GPIO1_BIT; + g_led2clr = clearbits & STR71X_LED2GPIO1_BIT; + + /* Set and clear bits as directed */ + + reg16 = getreg16(STR71X_GPIO1_PD); + reg16 &= ~clearbits; + reg16 |= setbits; + putreg16(reg16, STR71X_GPIO1_PD); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + uint16_t reg16; + + /* Set normal function output */ + + reg16 = getreg16(STR71X_GPIO1_PC0); + reg16 |= STR71X_LEDGPIO1_BITS; + putreg16(reg16, STR71X_GPIO1_PC0); + + reg16 = getreg16(STR71X_GPIO1_PC1); + reg16 &= ~STR71X_LEDGPIO1_BITS; + putreg16(reg16, STR71X_GPIO1_PC1); + + reg16 = getreg16(STR71X_GPIO1_PC2); + reg16 |= STR71X_LEDGPIO1_BITS; + putreg16(reg16, STR71X_GPIO1_PC2); + + /* Clear the LEDs (1 clears; 0 sets) */ + + reg16 = getreg16(STR71X_GPIO1_PD); + reg16 |= STR71X_LEDGPIO1_BITS; + putreg16(reg16, STR71X_GPIO1_PD); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + /* The Olimex board has only two LEDs, so following states are faked as + * follows + * + * SET CLEAR + * LED_STARTED (none) (n/a) + * LED_HEAPALLOCATE LED1 (n/a) + * LED_IRQSENABLED LED1 (n/a) + * LED_STACKCREATED LED1 (n/a) + * LED_INIRQ LED1+LED2 LED1 + * LED_SIGNAL LED1+LED2 LED1 + * LED_ASSERTION LED1+LED2 LED1 + * LED_PANIC LED1+LED2* LED1 + * + * *The previous state of LED2 will be retained + */ + + switch (led) + { + default: + case LED_STARTED: + str71_setleds(0, STR71X_LED1GPIO1_BIT|STR71X_LED2GPIO1_BIT); /* Clear LED1&2 */ + break; + + case LED_HEAPALLOCATE: + case LED_IRQSENABLED: + case LED_STACKCREATED: + str71_setleds(STR71X_LED1GPIO1_BIT, STR71X_LED2GPIO1_BIT); /* Set LED1, clear LED2 */ + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + str71_setleds(STR71X_LED1GPIO1_BIT|STR71X_LED2GPIO1_BIT, 0); /* Set LED1&2 */ + break; + + case LED_PANIC: + str71_setleds(STR71X_LED2GPIO1_BIT|g_led2set, g_led2set); /* Set LED1, preserve LED2 */ + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + /* The Olimex board has only two LEDs, so following states are faked as + * follows + * + * SET CLEAR + * LED_STARTED (none) (n/a) + * LED_HEAPALLOCATE LED1 (n/a) + * LED_IRQSENABLED LED1 (n/a) + * LED_STACKCREATED LED1 (n/a) + * LED_INIRQ LED1+LED2 LED1 + * LED_SIGNAL LED1+LED2 LED1 + * LED_ASSERTION LED1+LED2 LED1 + * LED_PANIC LED1+LED2* LED1 + * + * *The previous state of LED2 will be retained + */ + + switch (led) + { + default: + case LED_STARTED: + case LED_HEAPALLOCATE: + case LED_IRQSENABLED: + case LED_STACKCREATED: + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + str71_setleds(STR71X_LED1GPIO1_BIT, STR71X_LED2GPIO1_BIT); /* Set LED1, clear LED2 */ + break; + + case LED_PANIC: + str71_setleds(g_led2set, STR71X_LED1GPIO1_BIT|g_led2clr); /* Clear LED1, preserve LED2 */ + break; + } +} +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/olimex-strp711/src/str71_spi.c b/configs/olimex-strp711/src/str71_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..f14df150338f1f87e1f7ecd3a45d8be16f4a7b85 --- /dev/null +++ b/configs/olimex-strp711/src/str71_spi.c @@ -0,0 +1,1147 @@ +/**************************************************************************** + * config/olimex-strp711/src/str71_spi.c + * + * Copyright (C) 2008-2010, 2012, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include "up_internal.h" +#include "up_arch.h" + +#include "chip.h" +#include "str71x.h" + +#if defined(CONFIG_STR71X_BSPI0) || defined(CONFIG_STR71X_BSPI1) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_STR714X_BSPI0_TXFIFO_DEPTH +# define CONFIG_STR714X_BSPI0_TXFIFO_DEPTH 8 +#endif + +#ifndef CONFIG_STR714X_BSPI0_RXFIFO_DEPTH +# define CONFIG_STR714X_BSPI0_RXFIFO_DEPTH 8 +#endif + +#ifndef CONFIG_STR714X_BSPI1_TXFIFO_DEPTH +# define CONFIG_STR714X_BSPI1_TXFIFO_DEPTH 8 +#endif + +#ifndef CONFIG_STR714X_BSPI1_RXFIFO_DEPTH +# define CONFIG_STR714X_BSPI1_RXFIFO_DEPTH 8 +#endif + +#if defined(CONFIG_STR71X_UART3) && defined (CONFIG_STR71X_BSPI0) +# warning "BSPI0 GPIO usage conflicts with UART3" +#endif + +#if defined(CONFIG_STR71X_IC21) && defined (CONFIG_STR71X_BSPI0) +# warning "BSPI0 GPIO usage conflicts with IC21" +#endif + +#if defined(CONFIG_STR71X_HDLC) && defined (CONFIG_STR71X_BSPI1) +# warning "BSPI1 GPIO usage conflicts with HDLC" +#endif + +/**************************************************************************** + * On the Olimex-STR-STR-P711, BSPI0 is not connected on board, but is + * available on a header for use in the prototyping area. BSPI connects + * to the MMC/SD card slot. + * + * GPIO pin configurations (STR710/STR711,2,5). + * BSP0: + * PIN NORMAL ALTERNATE Olimex-STR-STR-P711 Connection + * 123/52 P0.0 S0.MISO * UEXT-3 (Not connected on board) + * 124/53 P0.1 S0.MOSI * UEXT-4 " " " " "" " " + * 125/54 P0.2 S0.SCLK ** UEXT-5 " " " " "" " " + * 126/55 P0.3 ~SO.SS ** UEXT-6 " " " " "" " " + * + * * Programming the AF function selects UART3 by default. BSPI must be + * enabled with the SPI_EN bit in the BOOTCR register + * ** Programming the AF function selects I2C1 by default. BSPI must be + * enabled with the SPI_EN bit in the BOOTCR register + * + * BSP1 + * PIN NORMAL ALTERNATE Olimex-STR-STR-P711 Connection + * 127/56 P0.4 S1.MISO SD_CARDBOT DAT0/D0 + * 140/60 P0.5 S1.MOSI SD_CARDBOT CMD/DI + * 141/61 P0.6 S1.SCLK SD_CARDBOT CLK/SCLK + * 142/62 P0.7 ~S1.SS SD_CARDBOT CD/DAT/CS + * + * Two GPIO pins also connect to the MMC/SD slot: + * + * PIN NORMAL ALTERNATE Olimex-STR-STR-P711 Connection + * 106/46 P1.10 USB clock MMC/SD write protect (WP) + * 111/49 P1.15 HDLC xmit MMC/SD card present (CP) + * + ****************************************************************************/ + +/* SPI0 *********************************************************************/ + +#define BSPI0_GPIO0_MISO (1 << 0) +#define BSPI0_GPIO0_MOSI (1 << 1) +#define BSPI0_GPIO0_SCLK (1 << 2) +#define BSPI0_GPIO0_SS (1 << 3) /* Not used */ + +#define BSPI0_GPIO0_ALT (BSPI0_GPIO0_MISO|BSPI0_GPIO0_MOSI|BSPI0_GPIO0_SCLK) + +/* ENC28J60 Module + * + * The ENC28J60 module does not come on the Olimex-STR-P711, but this describes + * how I have connected it. NOTE that the ENC28J60 requires an external interrupt + * (XTI) pin. The only easily accessible XTI pins are on SPI0/1 so you can't have + * both SPI0 and 1 together with this configuration. + * + * STR-P711 PIN PIN CONFIGURATION ENC28J60 CONNECTION + * ----------------------- ----------------- ----------------------- + * P0.3/S0.SS/I1.SDA P0.3 output CON5 1 J8-1 NET CS + * P0.2/S0.SCLK/I1.SCL SCLK0 2 2 SCK + * P0.0/S0.MOSI/U3.RX MOSI0 3 3 MOSI + * P0.1/S0.MISO/U3.TX MISO0 4 4 MISO + * GND GND 5 5 GND + * 3.3V 3.3V 10 J9-1 3V3 + * NC NC 9 2 WOL + * P0.6/S1.SCLK P0.6 input 8 3 NET INT + * NC NC 7 4 CLKOUT + * P0.4/S1.MISO P0.4 output 6 5 NET RST + */ + +#ifdef CONFIG_ENC28J60 + +/* UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60 + * interrupt conflict with BSPI1 + */ + +# ifdef CONFIG_STR71X_BSPI1 +# warning "CONFIG_STR71X_BSPI1 cannot be used in this configuration" +# endif + +/* ENC28J60 additional pins + * + * NOTE: The ENC28J60 is a 3.3V part; however, it was designed to be + * easily integrated into 5V systems. The SPI CS, SCK and SI inputs, + * as well as the RESET pin, are all 5V tolerant. On the other hand, + * if the host controller is operated at 5V, it quite likely will + * not be within specifications when its SPI and interrupt inputs + * are driven by the 3.3V CMOS outputs on the ENC28J60. A + * unidirectional level translator would be necessary. + */ + +# define ENC_GPIO0_CS (1 << 3) +# define ENC_GPIO0_NETRST (1 << 4) +# define ENC_GPIO0_NETINT (1 << 6) + +# define ENC_GPIO0_INTTL (0) +# define ENC_GPIO0_INCMOS ENC_GPIO0_NETINT +# define ENC_GPIO0_OUTPP (ENC_GPIO0_CS|ENC_GPIO0_NETRST) +# define ENC_GPIO0_ALL (ENC_GPIO0_CS|ENC_GPIO0_NETINT|ENC_GPIO0_NETRST) + +# define BSPI0_GPIO0_INTTL ENC_GPIO0_INTTL +# define BSPI0_GPIO0_INCMOS ENC_GPIO0_INCMOS +# define BSPI0_GPIO0_OUTPP ENC_GPIO0_OUTPP +# define BSPI0_GPIO0_ALL (BSPI0_GPIO0_ALT|ENC_GPIO0_ALL) + +#else +# ifdef CONFIG_STR71X_BSPI0 +# warning "CONFIG_STR71X_BSPI0 has no function in this configuration" +# undef CONFIG_STR71X_BSPI0 +# endif + +# define BSPI0_GPIO0_INTTL (0) +# define BSPI0_GPIO0_INCMOS (0) +# define BSPI0_GPIO0_OUTPP (0) +# define BSPI0_GPIO0_ALL BSPI0_GPIO0_ALT +#endif + +/* SPI1 *********************************************************************/ + +#define BSPI1_GPIO0_MISO (1 << 4) +#define BSPI1_GPIO0_MOSI (1 << 5) +#define BSPI1_GPIO0_SCLK (1 << 6) +#define BSPI1_GPIO0_SS (1 << 7) /* Not used */ + +#define BSPI1_GPIO0_ALT (BSPI1_GPIO0_MISO|BSPI1_GPIO0_MOSI|BSPI1_GPIO0_SCLK) + +/* MMC/SD Pin Usage: + * + * STR-P711 PIN MMC/SD USAGE PIN CONFIGURATION + * ------------ ---------------- ----------------------- + * P0.7/S1.SS 1 CD/DAT3/CS P0.7 output + * P0.5/S1.MOSI 2 CMD/DI MOSI1 + * --- 3 VSS1 --- + * --- 4 VDD --- + * P0.6/S1.SCLK 5 CLK/SCLK SLCK1 + * --- 6 VSS2 --- + * P0.4/S1.MISO 7 DAT0/D0 MISO1 + * --- 8 DAT1/RES (Pulled up) + * --- 9 DAT2/RES (Pulled up) + * + * P1.10/USBCLK 10/14 WP P1.10 input + * P1.15/HTXD 13/15 CP P1.15 input + * + * Use of SPI1 doesn't conflict with anything. WP conflicts USB; CP conflicts + * with HTXD. + */ + +/* MMC/SD additional pins */ + +#define MMCSD_GPIO0_CS (1 << 7) +#define MMCSD_GPIO0_INTTL (0) +#define MMCSD_GPIO0_INCMOS (0) +#define MMCSD_GPIO0_OUTPP MMCSD_GPIO0_CS +#define MMCSD_GPIO0_ALL MMCSD_GPIO0_CS + +#define MMCSD_GPIO1_WPIN (1 << 10) +#define MMCSD_GPIO1_CPIN (1 << 15) +#define MMCSD_GPIO1_INTTL (MMCSD_GPIO1_WPIN|MMCSD_GPIO1_CPIN) +#define MMCSD_GPIO1_INCMOS (0) +#define MMCSD_GPIO1_OUTPP (0) +#define MMCSD_GPIO1_ALL (MMCSD_GPIO1_WPIN|MMCSD_GPIO1_CPIN) + +#define BSPI1_GPIO0_INTTL MMCSD_GPIO0_INTTL +#define BSPI1_GPIO0_INCMOS MMCSD_GPIO0_INCMOS +#define BSPI1_GPIO0_OUTPP MMCSD_GPIO0_OUTPP +#define BSPI1_GPIO0_ALL (BSPI1_GPIO0_ALT|MMCSD_GPIO0_ALL) + +#define BSPI1_GPIO1_INTTL MMCSD_GPIO1_INTTL +#define BSPI1_GPIO1_INCMOS MMCSD_GPIO1_INCMOS +#define BSPI1_GPIO1_OUTPP MMCSD_GPIO1_OUTPP +#define BSPI1_GPIO1_ALL MMCSD_GPIO1_ALL + +/* Configuration register settings ******************************************/ + +#if CONFIG_STR714X_BSPI0_RXFIFO_DEPTH == 1 +# define STR71X_BSPI0_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE1 +#elif CONFIG_STR714X_BSPI0_RXFIFO_DEPTH == 2 +# define STR71X_BSPI0_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE12 +#elif CONFIG_STR714X_BSPI0_RXFIFO_DEPTH == 3 +# define STR71X_BSPI0_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE13 +#elif CONFIG_STR714X_BSPI0_RXFIFO_DEPTH == 4 +# define STR71X_BSPI0_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE14 +#elif CONFIG_STR714X_BSPI0_RXFIFO_DEPTH == 5 +# define STR71X_BSPI0_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE15 +#elif CONFIG_STR714X_BSPI0_RXFIFO_DEPTH == 6 +# define STR71X_BSPI0_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE16 +#elif CONFIG_STR714X_BSPI0_RXFIFO_DEPTH == 7 +# define STR71X_BSPI0_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE17 +#elif CONFIG_STR714X_BSPI0_RXFIFO_DEPTH == 8 +# define STR71X_BSPI0_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE18 +#elif CONFIG_STR714X_BSPI0_RXFIFO_DEPTH == 9 +# define STR71X_BSPI0_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE19 +#elif CONFIG_STR714X_BSPI0_RXFIFO_DEPTH == 10 +# define STR71X_BSPI0_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE110 +#else +# error "Invaid RX FIFO depth setting" +#endif + +#define STR71X_BSPI0_CSR1DISABLE STR71X_BSPI0_CSR1RXFIFODEPTH +#define STR71X_BSPI0_CSR1ENABLE (STR71X_BSPICSR1_BSPE|STR71X_BSPICSR1_MSTR|STR71X_BSPI0_CSR1RXFIFODEPTH) + +#if CONFIG_STR714X_BSPI0_TXFIFO_DEPTH == 1 +# define STR71X_BSPI0_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE1 +#elif CONFIG_STR714X_BSPI0_TXFIFO_DEPTH == 2 +# define STR71X_BSPI0_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE12 +#elif CONFIG_STR714X_BSPI0_TXFIFO_DEPTH == 3 +# define STR71X_BSPI0_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE13 +#elif CONFIG_STR714X_BSPI0_TXFIFO_DEPTH == 4 +# define STR71X_BSPI0_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE14 +#elif CONFIG_STR714X_BSPI0_TXFIFO_DEPTH == 5 +# define STR71X_BSPI0_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE15 +#elif CONFIG_STR714X_BSPI0_TXFIFO_DEPTH == 6 +# define STR71X_BSPI0_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE16 +#elif CONFIG_STR714X_BSPI0_TXFIFO_DEPTH == 7 +# define STR71X_BSPI0_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE17 +#elif CONFIG_STR714X_BSPI0_TXFIFO_DEPTH == 8 +# define STR71X_BSPI0_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE18 +#elif CONFIG_STR714X_BSPI0_TXFIFO_DEPTH == 9 +# define STR71X_BSPI0_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE19 +#elif CONFIG_STR714X_BSPI0_TXFIFO_DEPTH == 10 +# define STR71X_BSPI0_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE110 +#else +# error "Invaid TX FIFO depth setting" +#endif + +#define STR71X_BSPI0_CSR2VALUE STR71X_BSPI0_CSR1TXFIFODEPTH + +#if CONFIG_STR714X_BSPI1_RXFIFO_DEPTH == 1 +# define STR71X_BSPI1_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE1 +#elif CONFIG_STR714X_BSPI1_RXFIFO_DEPTH == 2 +# define STR71X_BSPI1_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE12 +#elif CONFIG_STR714X_BSPI1_RXFIFO_DEPTH == 3 +# define STR71X_BSPI1_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE13 +#elif CONFIG_STR714X_BSPI1_RXFIFO_DEPTH == 4 +# define STR71X_BSPI1_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE14 +#elif CONFIG_STR714X_BSPI1_RXFIFO_DEPTH == 5 +# define STR71X_BSPI1_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE15 +#elif CONFIG_STR714X_BSPI1_RXFIFO_DEPTH == 6 +# define STR71X_BSPI1_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE16 +#elif CONFIG_STR714X_BSPI1_RXFIFO_DEPTH == 7 +# define STR71X_BSPI1_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE17 +#elif CONFIG_STR714X_BSPI1_RXFIFO_DEPTH == 8 +# define STR71X_BSPI1_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE18 +#elif CONFIG_STR714X_BSPI1_RXFIFO_DEPTH == 9 +# define STR71X_BSPI1_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE19 +#elif CONFIG_STR714X_BSPI1_RXFIFO_DEPTH == 10 +# define STR71X_BSPI1_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE110 +#else +# error "Invaid RX FIFO depth setting" +#endif + +#define STR71X_BSPI1_CSR1DISABLE STR71X_BSPI1_CSR1RXFIFODEPTH +#define STR71X_BSPI1_CSR1ENABLE (STR71X_BSPICSR1_BSPE|STR71X_BSPICSR1_MSTR|STR71X_BSPI1_CSR1RXFIFODEPTH) + +#if CONFIG_STR714X_BSPI1_TXFIFO_DEPTH == 1 +# define STR71X_BSPI1_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE1 +#elif CONFIG_STR714X_BSPI1_TXFIFO_DEPTH == 2 +# define STR71X_BSPI1_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE12 +#elif CONFIG_STR714X_BSPI1_TXFIFO_DEPTH == 3 +# define STR71X_BSPI1_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE13 +#elif CONFIG_STR714X_BSPI1_TXFIFO_DEPTH == 4 +# define STR71X_BSPI1_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE14 +#elif CONFIG_STR714X_BSPI1_TXFIFO_DEPTH == 5 +# define STR71X_BSPI1_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE15 +#elif CONFIG_STR714X_BSPI1_TXFIFO_DEPTH == 6 +# define STR71X_BSPI1_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE16 +#elif CONFIG_STR714X_BSPI1_TXFIFO_DEPTH == 7 +# define STR71X_BSPI1_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE17 +#elif CONFIG_STR714X_BSPI1_TXFIFO_DEPTH == 8 +# define STR71X_BSPI1_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE18 +#elif CONFIG_STR714X_BSPI1_TXFIFO_DEPTH == 9 +# define STR71X_BSPI1_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE19 +#elif CONFIG_STR714X_BSPI1_TXFIFO_DEPTH == 10 +# define STR71X_BSPI1_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE110 +#else +# error "Invaid TX FIFO depth setting" +#endif + +#define STR71X_BSPI1_CSR2VALUE STR71X_BSPI1_CSR1TXFIFODEPTH + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* NOTE: As implemented here, this driver will support only one device per + * SPI bus: Only one chip select, csbit, per bus; no locking, not mode or + * bits-per-word settings. To support multiple devices per but, spi_select + * would also require some logic changes. + */ + +struct str71x_spidev_s +{ + struct spi_dev_s spidev; /* Externally visible part of the SPI interface */ + bool initialized; /* Initialize port only once! */ + uint32_t spibase; /* BSPIn base address */ + uint16_t csbit; /* BSPIn SS bit int GPIO0 */ + sem_t exclsem; /* Supports mutually exclusive access */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* Helpers */ + +static inline uint16_t spi_getreg(FAR struct str71x_spidev_s *priv, uint8_t offset); +static inline void spi_putreg(FAR struct str71x_spidev_s *priv, uint8_t offset, uint16_t value); +static inline void spi_drain(FAR struct str71x_spidev_s *priv); + +/* SPI methods */ + +static int spi_lock(FAR struct spi_dev_s *dev, bool lock); +static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency); +static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +#ifdef CONFIG_SPI_CMDDATA +static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd); +#endif +static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd); +static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t buflen); +static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t buflen); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct spi_ops_s g_spiops = +{ + .lock = spi_lock, + .select = spi_select, + .setfrequency = spi_setfrequency, + .status = spi_status, +#ifdef CONFIG_SPI_CMDDATA + .cmddata = spi_cmddata, +#endif + .send = spi_send, + .sndblock = spi_sndblock, + .recvblock = spi_recvblock, + .registercallback = 0, /* Not implemented */ +}; + +#ifdef CONFIG_STR71X_BSPI0 +static struct str71x_spidev_s g_spidev0 = +{ + .spidev = { &g_spiops }, + .spibase = STR71X_BSPI0_BASE, + .csbit = ENC_GPIO0_CS, + .exclsem = SEM_INITIALIZER(1) +}; +#endif + +#ifdef CONFIG_STR71X_BSPI1 +static struct str71x_spidev_s g_spidev1 = +{ + .spidev = { &g_spiops }, + .spibase = STR71X_BSPI1_BASE, + .csbit = MMCSD_GPIO0_CS, + .exclsem = SEM_INITIALIZER(1) +}; +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: spi_getreg + * + * Description: + * Get the contents of the SPI register at offset + * + * Input Parameters: + * priv - private SPI device structure + * offset - offset to the register of interest + * + * Returned Value: + * The contents of the 16-bit register + * + ****************************************************************************/ + +static inline uint16_t spi_getreg(FAR struct str71x_spidev_s *priv, uint8_t offset) +{ + return getreg16(priv->spibase + offset); +} + +/**************************************************************************** + * Name: spi_putreg + * + * Description: + * Write a 16-bit value to the SPI register at offset + * + * Input Parameters: + * priv - private SPI device structure + * offset - offset to the register of interest + * value - the 16-bit value to be written + * + * Returned Value: + * The contents of the 16-bit register + * + ****************************************************************************/ + +static inline void spi_putreg(FAR struct str71x_spidev_s *priv, uint8_t offset, uint16_t value) +{ + putreg16(value, priv->spibase + offset); +} + +/**************************************************************************** + * Name: spi_drain + * + * Description: + * Drain any bytes left in the fifos. + * + * Input Parameters: + * dev - Device-specific state data + * + * Returned Value: + * None + * + ****************************************************************************/ + +static inline void spi_drain(FAR struct str71x_spidev_s *priv) +{ +#if CONFIG_STR714X_BSPI0_TXFIFO_DEPTH > 1 + /* Wait while the TX FIFO is full */ + + while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF) != 0); +#else + /* Wait until the TX FIFO is empty */ + + while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFE) == 0); +#endif + /* Write 0xff to the TX FIFO */ + + spi_putreg(priv, STR71X_BSPI_TXR_OFFSET, 0xff00); + + /* Wait for the TX FIFO empty */ + + while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFNE) != 0); + + /* Wait for the RX FIFO not empty */ + + while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE) == 0); + + /* Then read and discard bytes until the RX FIFO is empty */ + + do + { + (void)spi_getreg(priv, STR71X_BSPI_RXR_OFFSET); + } + while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE) != 0); +} + +/**************************************************************************** + * Name: spi_lock + * + * Description: + * On SPI busses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the busses for a sequence of + * transfers. The bus should be locked before the chip is selected. After + * locking the SPI bus, the caller should then also call the setfrequency, + * setbits, and setmode methods to make sure that the SPI is properly + * configured for the device. If the SPI buss is being shared, then it + * may have been left in an incompatible state. + * + * Input Parameters: + * dev - Device-specific state data + * lock - true: Lock spi bus, false: unlock SPI bus + * + * Returned Value: + * None + * + ****************************************************************************/ + +static int spi_lock(FAR struct spi_dev_s *dev, bool lock) +{ + FAR struct str71x_spidev_s *priv = (FAR struct str71x_spidev_s *)dev; + + if (lock) + { + /* Take the semaphore (perhaps waiting) */ + + while (sem_wait(&priv->exclsem) != 0) + { + /* The only case that an error should occur here is if the wait + * was awakened by a signal. + */ + + DEBUGASSERT(errno == EINTR); + } + } + else + { + (void)sem_post(&priv->exclsem); + } + + return OK; +} + +/**************************************************************************** + * Name: spi_select + * + * Description: + * Enable/disable the SPI slave select. The implementation of this method + * must include handshaking: If a device is selected, it must hold off + * all other attempts to select the device until the device is deselected. + * + * Input Parameters: + * dev - Device-specific state data + * devid - Identifies the device to select + * selected - true: slave selected, false: slave de-selected + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + FAR struct str71x_spidev_s *priv = (FAR struct str71x_spidev_s *)dev; + uint16_t reg16; + + DEBUGASSERT(priv && priv->spibase); + + reg16 = spi_getreg(priv, STR71X_GPIO_PD_OFFSET); + if (selected) + { + /* Enable slave select (low enables) */ + + reg16 &= ~priv->csbit; + spi_putreg(priv, STR71X_GPIO_PD_OFFSET, reg16); + } + else + { + /* Disable slave select (low enables) */ + + reg16 |= priv->csbit; + spi_putreg(priv, STR71X_GPIO_PD_OFFSET, reg16); + + /* And drain the FIFOs */ + + spi_drain(priv); + } +} + +/**************************************************************************** + * Name: spi_setfrequency + * + * Description: + * Set the SPI frequency. + * + * Input Parameters: + * dev - Device-specific state data + * frequency - The SPI frequency requested + * + * Returned Value: + * Returns the actual frequency selected + * + ****************************************************************************/ + +static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency) +{ + FAR struct str71x_spidev_s *priv = (FAR struct str71x_spidev_s *)dev; + uint32_t divisor; + uint32_t cr1; + + DEBUGASSERT(priv && priv->spibase); + + /* The BSPI clock is determined by divider the APB1 clock (PCLK1). + * + * Eg. PCLK1 = 32MHz, frequency = 20000000: + * correct divisor is 2.1, calculated value is 2. + */ + + divisor = (STR71X_PCLK1 + (frequency >> 1)) / frequency; + + /* The divisor must be an even number and contrained to the range of + * 5 (master mode, or 7 for slave mode) and 255. These bits must + * be configured BEFORE the BSPE or MSTR bits.. i.e., before the SPI + * is put into master mode. + */ + + divisor <<= 1; /* The full, even divisor */ + if (divisor < 6) + { + divisor = 6; + } + else if (divisor > 254) + { + divisor = 254; + } + + /* The BSPI must be disable when the following setting is made. */ + + cr1 = spi_getreg(priv, STR71X_BSPI_CSR1_OFFSET); + cr1 &= ~(STR71X_BSPICSR1_BSPE|STR71X_BSPICSR1_MSTR); + spi_putreg(priv, STR71X_BSPI_CSR1_OFFSET, cr1); + spi_putreg(priv, STR71X_BSPI_CLK_OFFSET, (uint16_t)divisor); + + /* Now we can enable the BSP in master mode */ + + cr1 |= (STR71X_BSPICSR1_BSPE|STR71X_BSPICSR1_MSTR); + spi_putreg(priv, STR71X_BSPI_CSR1_OFFSET, cr1); + + return STR71X_PCLK1 / divisor; +} + +/**************************************************************************** + * Name: spi_status + * + * Description: + * Get SPI/MMC status + * + * Input Parameters: + * dev - Device-specific state data + * devid - Identifies the device to report status on + * + * Returned Value: + * Returns a bitset of status values (see SPI_STATUS_* defines + * + ****************************************************************************/ + +static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + uint16_t reg16 = getreg16(STR71X_GPIO1_PD); + + if ((reg16 & MMCSD_GPIO1_WPIN) != 0) + { + ret |= SPI_STATUS_WRPROTECTED; + } + + if ((reg16 & MMCSD_GPIO1_CPIN) != 0) + { + ret |= SPI_STATUS_PRESENT; + } + + return ret; +} + +/**************************************************************************** + * Name: spi_cmddata + * + * Description: + * Some devices require and additional out-of-band bit to specify if the + * next word sent to the device is a command or data. This is typical, for + * example, in "9-bit" displays where the 9th bit is the CMD/DATA bit. + * This function provides selection of command or data. + * + * This "latches" the CMD/DATA state. It does not have to be called before + * every word is transferred; only when the CMD/DATA state changes. This + * method is required if CONFIG_SPI_CMDDATA is selected in the NuttX + * configuration + * + * Input Parameters: + * dev - Device-specific state data + * cmd - TRUE: The following word is a command; FALSE: the following words + * are data. + * + * Returned Value: + * OK unless an error occurs. Then a negated errno value is returned + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +# error "spi_cmddata not implemented" + return -ENOSYS; +} +#endif + +/**************************************************************************** + * Name: spi_send + * + * Description: + * Exchange one word on SPI + * + * Input Parameters: + * dev - Device-specific state data + * wd - The word to send. the size of the data is determined by the + * number of bits selected for the SPI interface. + * + * Returned Value: + * response + * + ****************************************************************************/ + +static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd) +{ + FAR struct str71x_spidev_s *priv = (FAR struct str71x_spidev_s *)dev; + + DEBUGASSERT(priv && priv->spibase); + +#if CONFIG_STR714X_BSPI0_TXFIFO_DEPTH > 1 + /* Wait while the TX FIFO is full */ + + while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF) != 0); +#else + /* Wait until the TX FIFO is empty */ + + while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFE) == 0); +#endif + + /* Write the byte to the TX FIFO */ + + spi_putreg(priv, STR71X_BSPI_TXR_OFFSET, wd << 8); + + /* Wait for the RX FIFO not empty */ + + while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE) == 0); + + /* Get the received value from the RX FIFO and return it */ + + return (uint8_t)(spi_getreg(priv, STR71X_BSPI_RXR_OFFSET) >> 8); +} + +/**************************************************************************** + * Name: spi_sndblock + * + * Description: + * Send a block of data on SPI + * + * Input Parameters: + * dev - Device-specific state data + * buffer - A pointer to the buffer of data to be sent + * buflen - the length of data to send from the buffer in number of words. + * The wordsize is determined by the number of bits-per-word + * selected for the SPI interface. If nbits <= 8, the data is + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t buflen) +{ + FAR struct str71x_spidev_s *priv = (FAR struct str71x_spidev_s *)dev; + FAR const uint8_t *ptr = (FAR const uint8_t *)buffer; + uint16_t csr2; + + DEBUGASSERT(priv && priv->spibase); + + /* Loop while thre are bytes remaining to be sent */ + + while (buflen > 0) + { + /* While the TX FIFO is not full and there are bytes left to send */ + + while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF) == 0 && buflen > 0) + { + /* Send the data */ + + spi_putreg(priv, STR71X_BSPI_TXR_OFFSET, ((uint16_t)*ptr) << 8); + ptr++; + buflen--; + } + } + + /* Then discard all card responses until the RX & TX FIFOs are emptied. */ + + do + { + /* Is there anything in the RX fifo? */ + + csr2 = spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET); + if ((csr2 & STR71X_BSPICSR2_RFNE) != 0) + { + /* Yes.. Read and discard */ + + (void)spi_getreg(priv, STR71X_BSPI_RXR_OFFSET); + } + + /* There is a race condition where TFNE may go false just before + * RFNE goes true and this loop terminates prematurely. The nasty little + * delay in the following solves that (it could probably be tuned to + * improve performance). + */ + + else if ((csr2 & STR71X_BSPICSR2_TFNE) != 0) + { + up_udelay(100); + csr2 = spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET); + } + } + while ((csr2 & STR71X_BSPICSR2_RFNE) != 0 || (csr2 & STR71X_BSPICSR2_TFNE) == 0); +} + +/**************************************************************************** + * Name: spi_recvblock + * + * Description: + * Revice a block of data from SPI + * + * Input Parameters: + * dev - Device-specific state data + * buffer - A pointer to the buffer in which to recieve data + * buflen - the length of data that can be received in the buffer in number + * of words. The wordsize is determined by the number of bits-per-word + * selected for the SPI interface. If nbits <= 8, the data is + * packed into uint8_t; if nbits >8, the data is packed into uint16_t's + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t buflen) +{ + FAR struct str71x_spidev_s *priv = (FAR struct str71x_spidev_s *)dev; + FAR uint8_t *ptr = (FAR uint8_t*)buffer; + uint32_t fifobytes = 0; + + DEBUGASSERT(priv && priv->spibase); + + /* While there is remaining to be sent (and no synchronization error has occurred) */ + + while (buflen || fifobytes) + { + /* Fill the transmit FIFO with 0xff... + * Write 0xff to the data register while (1) the TX FIFO is + * not full, (2) we have not exceeded the depth of the TX FIFO, + * and (3) there are more bytes to be sent. + */ + + while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_TFF) == 0 && + (fifobytes < CONFIG_STR714X_BSPI0_TXFIFO_DEPTH) && buflen > 0) + { + spi_putreg(priv, STR71X_BSPI_TXR_OFFSET, 0xff00); + buflen--; + fifobytes++; + } + + /* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */ + + while ((spi_getreg(priv, STR71X_BSPI_CSR2_OFFSET) & STR71X_BSPICSR2_RFNE) != 0) + { + *ptr++ = (uint8_t)(spi_getreg(priv, STR71X_BSPI_RXR_OFFSET) >> 8); + fifobytes--; + } + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: str71_spibus_initialize + * + * Description: + * Initialize the selected SPI port. This function could get called + * multiple times for each STR7 devices that needs an SPI reference. + * + * Input Parameter: + * Port number (for hardware that has mutiple SPI interfaces) + * + * Returned Value: + * Valid SPI device structre reference on succcess; a NULL on failure + * + ****************************************************************************/ + +FAR struct spi_dev_s *str71_spibus_initialize(int port) +{ + FAR struct spi_dev_s *ret; +#if defined(CONFIG_STR71X_BSPI0) || defined(CONFIG_STR71X_BSPI1) + uint16_t reg16; +#endif + irqstate_t flags; + + flags = enter_critical_section(); +#ifdef CONFIG_STR71X_BSPI0 + if (port == 0) + { + /* Check if this port has already been initialized */ + + if (!g_spidev0.initialized) + { + /* The default, alternate functionality of the GPIO0 pin selections is + * UART3/I2C1. In order to have BSP0 functionality, we also have to + * set the BSPI0 enable bit in the PCU BOOTCR register. + */ + + reg16 = getreg16(STR71X_PCU_BOOTCR); + reg16 |= STR71X_PCUBOOTCR_BSPIOEN; + putreg16(reg16, STR71X_PCU_BOOTCR); + + /* Configure all GPIO pins to their appropriate function: + * + * PC0=1 PC1=1 PC2=1: Alternate function, push-pull + * PC0=1 PC1=0 PC2=0: In, TTL + * PC0=0 PC1=1 PC2=0: In, CMOS + * PC0=1 PC1=0 PC2=1: Output, push pull + */ + + reg16 = getreg16(STR71X_GPIO0_PC0); + reg16 &= ~BSPI0_GPIO0_ALL; + reg16 |= (BSPI0_GPIO0_ALT|BSPI0_GPIO0_INTTL|BSPI0_GPIO0_OUTPP); + putreg16(reg16, STR71X_GPIO0_PC0); + + reg16 = getreg16(STR71X_GPIO0_PC1); + reg16 &= ~BSPI0_GPIO0_ALL; + reg16 |= (BSPI0_GPIO0_ALT|BSPI0_GPIO0_INCMOS); + putreg16(reg16, STR71X_GPIO0_PC1); + + reg16 = getreg16(STR71X_GPIO0_PC2); + reg16 &= ~BSPI0_GPIO0_ALL; + reg16 |= (BSPI0_GPIO0_ALT|BSPI0_GPIO0_OUTPP); + putreg16(reg16, STR71X_GPIO0_PC2); + + /* Start with enc28j60 de-selected (active low) and in + * reset (also active low) + */ + +#ifdef CONFIG_ENC28J60 + reg16 = getreg16(STR71X_GPIO0_PD); + reg16 |= (ENC_GPIO0_CS | ENC_GPIO0_NETRST); + putreg16(reg16, STR71X_GPIO0_PD); +#endif + + /* Set the clock divider to the maximum */ + + putreg16(255, STR71X_BSPI0_CLK); + + /* Set FIFO sizes and disable the BSP1. It won't be enabled + * until the frequency is set. + */ + + putreg16(STR71X_BSPI0_CSR1DISABLE, STR71X_BSPI0_CSR1); + putreg16(STR71X_BSPI0_CSR2VALUE, STR71X_BSPI0_CSR2); + + /* Configure GPIO1 pins for ENC28J60 inputs and outputs. + * + * PC0=1 PC1=0 PC2=0: In, TTL + * PC0=0 PC1=1 PC2=0: In, CMOS + * PC0=1 PC1=0 PC2=1: Output, push pull + */ + +#ifdef BSPI0_GPIO1_ALL + reg16 = getreg16(STR71X_GPIO1_PC0); + reg16 &= ~BSPI0_GPIO1_ALL; + reg16 |= (BSPI0_GPIO1_INTTL|BSPI0_GPIO1_OUTPP); + putreg16(reg16, STR71X_GPIO1_PC0); + + reg16 = getreg16(STR71X_GPIO1_PC1); + reg16 &= ~BSPI0_GPIO1_ALL; + reg16 |= BSPI0_GPIO0_INCMOS; + putreg16(reg16, STR71X_GPIO1_PC1); + + reg16 = getreg16(STR71X_GPIO1_PC2); + reg16 &= ~BSPI0_GPIO1_ALL; + reg16 |= BSPI0_GPIO0_OUTPP; + putreg16(reg16, STR71X_GPIO1_PC2); +#endif + g_spidev0.initialized = true; + } + + /* Return the SPI device reference */ + + ret = &g_spidev0.spidev; + } + else +#endif +#ifdef CONFIG_STR71X_BSPI1 + if (port == 1) + { + /* Check if this port has already been initialized */ + + if (!g_spidev1.initialized) + { + /* Configure all GPIO pins to their alternate function EXCEPT for + * the CS pin .. we will configure that as an push-pull output + * and control the chip select as a normal GPIO. + * + * PC0=1 PC1=1 PC2=1: Alternate function, push-pull + * PC0=1 PC1=0 PC2=0: In, TTL + * PC0=0 PC1=1 PC2=0: In, CMOS + * PC0=1 PC1=0 PC2=1: Output, push pull + */ + + reg16 = getreg16(STR71X_GPIO0_PC0); + reg16 &= ~BSPI1_GPIO0_ALL; + reg16 |= (BSPI1_GPIO0_ALT|BSPI1_GPIO0_INTTL|BSPI1_GPIO0_OUTPP); + putreg16(reg16, STR71X_GPIO0_PC0); + + reg16 = getreg16(STR71X_GPIO0_PC1); + reg16 &= ~BSPI1_GPIO0_ALL; + reg16 |= (BSPI1_GPIO0_ALT|BSPI1_GPIO0_INCMOS); + putreg16(reg16, STR71X_GPIO0_PC1); + + reg16 = getreg16(STR71X_GPIO0_PC2); + reg16 &= ~BSPI1_GPIO0_ALL; + reg16 |= (BSPI1_GPIO0_ALT|BSPI1_GPIO0_OUTPP); + putreg16(reg16, STR71X_GPIO0_PC2); + + /* Start with MMC/SD disabled */ + + reg16 = getreg16(STR71X_GPIO0_PD); + reg16 |= MMCSD_GPIO0_CS; + putreg16(reg16, STR71X_GPIO0_PD); + + /* Set the clock divider to the maximum */ + + putreg16(255, STR71X_BSPI1_CLK); + + /* Set FIFO sizes and disable the BSP1. It won't be enabled + * until the frequency is set. + */ + + putreg16(STR71X_BSPI1_CSR1DISABLE, STR71X_BSPI1_CSR1); + putreg16(STR71X_BSPI1_CSR2VALUE, STR71X_BSPI1_CSR2); + + /* Configure GPIO1 pins for WP/CP input + * + * PC0=1 PC1=0 PC2=0: In, TTL + * PC0=0 PC1=1 PC2=0: In, CMOS + * PC0=1 PC1=0 PC2=1: Output, push pull + */ + +#ifdef BSPI1_GPIO1_ALL + reg16 = getreg16(STR71X_GPIO1_PC0); + reg16 &= ~BSPI1_GPIO1_ALL; + reg16 |= (BSPI1_GPIO1_INTTL|BSPI1_GPIO1_OUTPP); + putreg16(reg16, STR71X_GPIO1_PC0); + + reg16 = getreg16(STR71X_GPIO1_PC1); + reg16 &= ~BSPI1_GPIO1_ALL; + reg16 |= BSPI1_GPIO0_INCMOS; + putreg16(reg16, STR71X_GPIO1_PC1); + + reg16 = getreg16(STR71X_GPIO1_PC2); + reg16 &= ~BSPI1_GPIO1_ALL; + reg16 |= BSPI1_GPIO0_OUTPP; + putreg16(reg16, STR71X_GPIO1_PC2); +#endif + g_spidev1.initialized = true; + } + + /* Return the SPI device reference */ + + ret = &g_spidev1.spidev; + } + else +#endif + { + ret = NULL; + } + + leave_critical_section(flags); + return ret; +} + +#endif /* CONFIG_STR71X_BSPI0 || CONFIG_STR71X_BSPI1 */ diff --git a/configs/olimexino-stm32/Kconfig b/configs/olimexino-stm32/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..24daede78e86b9f2c51e6639ecdbd55c48cede2b --- /dev/null +++ b/configs/olimexino-stm32/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_OLIMEXINO_STM32 +endif diff --git a/configs/olimexino-stm32/can/Make.defs b/configs/olimexino-stm32/can/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..48d67718ee2b5aba3844bee8c4dd10cd8c6e96a2 --- /dev/null +++ b/configs/olimexino-stm32/can/Make.defs @@ -0,0 +1,127 @@ +############################################################################ +# configs/olimexino-stm32/can/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)\tools\copydir.bat + DIRUNLINK = $(TOPDIR)\tools\unlink.bat + MKDEP = $(TOPDIR)\tools\mkdeps.exe + ARCHINCLUDES = -I. -isystem $(TOPDIR)\include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)\include -isystem $(TOPDIR)\include\cxx + ARCHSCRIPT = -T$(TOPDIR)\configs\$(CONFIG_ARCH_BOARD)\scripts\$(LDSCRIPT) +else +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimexino-stm32/can/defconfig b/configs/olimexino-stm32/can/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b8c9da6ec5625b9f3d7a06674491137735c7d9af --- /dev/null +++ b/configs/olimexino-stm32/can/defconfig @@ -0,0 +1,1190 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +CONFIG_SERIAL_TERMIOS=y +CONFIG_CAN_EXTID=y +CONFIG_CAN1_BAUD=250000 +CONFIG_CAN_TSEG1=6 +CONFIG_CAN_TSEG2=7 +CONFIG_CAN_LOOPBACK=y + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +CONFIG_ARCH_CHIP_STM32F103RB=y +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +CONFIG_STM32_ADC1=y +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +CONFIG_STM32_CAN1=y +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +CONFIG_STM32_I2C2=y +CONFIG_STM32_PWR=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI2=y +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_TIM1=y +# CONFIG_STM32_TIM2 is not set +CONFIG_STM32_TIM3=y +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_ADC=y +CONFIG_STM32_SPI=y +CONFIG_STM32_I2C=y +CONFIG_STM32_CAN=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_CAN1_NO_REMAP is not set +CONFIG_STM32_CAN1_REMAP1=y +# CONFIG_STM32_CAN1_REMAP2 is not set +# CONFIG_STM32_TIM1_NO_REMAP is not set +# CONFIG_STM32_TIM1_FULL_REMAP is not set +CONFIG_STM32_TIM1_PARTIAL_REMAP=y +# CONFIG_STM32_TIM3_NO_REMAP is not set +# CONFIG_STM32_TIM3_FULL_REMAP is not set +CONFIG_STM32_TIM3_PARTIAL_REMAP=y +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +CONFIG_STM32_FORCEPOWER=y +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_PWM is not set +# CONFIG_STM32_TIM3_PWM is not set +# CONFIG_STM32_TIM1_ADC is not set +# CONFIG_STM32_TIM3_ADC is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set + +# +# ADC Configuration +# +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +CONFIG_SERIAL_DISABLE_REORDERING=y +CONFIG_STM32_FLOWCONTROL_BROKEN=y +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +CONFIG_STM32_SPI_DMA=y + +# +# I2C Configuration +# +CONFIG_STM32_I2C_ALT=y +CONFIG_STM32_I2C_DYNTIMEO=y +CONFIG_STM32_I2C_DYNTIMEO_USECPERBYTE=40 +CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP=10 +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2C_DUTY16_9=y +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# CAN driver configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +CONFIG_ARCH_IRQPRIO=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=340 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +CONFIG_ARCH_HIPRI_INTERRUPT=y + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MAPLE is not set +CONFIG_ARCH_BOARD_OLIMEXINO_STM32=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimexino-stm32" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +CONFIG_BOARDCTL_CANINIT=y +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +CONFIG_SYSTEM_TIME64=y +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=2 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=12 +CONFIG_MAX_TASKS=12 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=5 +CONFIG_NFILE_STREAMS=5 +CONFIG_NAME_MAX=8 +CONFIG_PRIORITY_INHERITANCE=y +CONFIG_SEM_PREALLOCHOLDERS=16 +CONFIG_SEM_NNESTPRIO=16 + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=300 +CONFIG_USERMAIN_STACKSIZE=880 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=464 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +# CONFIG_DEV_NULL is not set +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +CONFIG_CAN=y +# CONFIG_ARCH_HAVE_CAN_ERRORS is not set +# CONFIG_CAN_FD is not set +CONFIG_CAN_FIFOSIZE=8 +CONFIG_CAN_NPENDINGRTR=4 +# CONFIG_CAN_TXREADY is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +CONFIG_I2C_RESET=y +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +CONFIG_ANALOG=y +# CONFIG_ADC is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=32 +CONFIG_USART1_TXBUFSIZE=32 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +CONFIG_FS_NAMED_SEMAPHORES=y +CONFIG_FS_NAMED_SEMPATH="/var/lock" +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +CONFIG_FS_FATTIME=y +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=768 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=768 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=0 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +CONFIG_C99_BOOL8=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=768 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +CONFIG_EXAMPLES_CAN=y +CONFIG_EXAMPLES_CAN_DEVPATH="/dev/can0" +CONFIG_EXAMPLES_CAN_NMSGS=32 +# CONFIG_EXAMPLES_CAN_READ is not set +# CONFIG_EXAMPLES_CAN_WRITE is not set +CONFIG_EXAMPLES_CAN_READWRITE=y +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +CONFIG_EXAMPLES_HELLOXX=y +CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=40 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=0 +CONFIG_NSH_DISABLEBG=y +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +CONFIG_NSH_DISABLE_EXIT=y +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +CONFIG_NSH_DISABLE_KILL=y +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +CONFIG_NSH_DISABLE_MKDIR=y +CONFIG_NSH_DISABLE_MKFATFS=y +CONFIG_NSH_DISABLE_MKFIFO=y +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +CONFIG_NSH_DISABLE_MOUNT=y +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_UMOUNT=y +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +CONFIG_NSH_DISABLE_USLEEP=y +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=0 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=128 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_STACKMONITOR is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimexino-stm32/can/setenv.sh b/configs/olimexino-stm32/can/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..1a4701269d69d8836349b04dcde3ff1b3c50356d --- /dev/null +++ b/configs/olimexino-stm32/can/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/olimexino-stm32/can/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimexino-stm32/composite/Make.defs b/configs/olimexino-stm32/composite/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..690947c11049f40cb7569b3638b348fadbfb68a8 --- /dev/null +++ b/configs/olimexino-stm32/composite/Make.defs @@ -0,0 +1,127 @@ +############################################################################ +# configs/olimexino-stm32/composite/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)\tools\copydir.bat + DIRUNLINK = $(TOPDIR)\tools\unlink.bat + MKDEP = $(TOPDIR)\tools\mkdeps.exe + ARCHINCLUDES = -I. -isystem $(TOPDIR)\include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)\include -isystem $(TOPDIR)\include\cxx + ARCHSCRIPT = -T$(TOPDIR)\configs\$(CONFIG_ARCH_BOARD)\scripts\$(LDSCRIPT) +else +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimexino-stm32/composite/defconfig b/configs/olimexino-stm32/composite/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..3dfff329ac8441bc577af658a7aa1943ab195ea2 --- /dev/null +++ b/configs/olimexino-stm32/composite/defconfig @@ -0,0 +1,1300 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +CONFIG_SERIAL_TERMIOS=y + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +CONFIG_ARCH_CHIP_STM32F103RB=y +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +CONFIG_STM32_HAVE_ADC1_DMA=y +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +CONFIG_STM32_ADC1=y +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +CONFIG_STM32_BKP=y +# CONFIG_STM32_CAN1 is not set +CONFIG_STM32_CRC=y +CONFIG_STM32_DMA1=y +CONFIG_STM32_DMA2=y +# CONFIG_STM32_I2C1 is not set +CONFIG_STM32_I2C2=y +CONFIG_STM32_PWR=y +# CONFIG_STM32_SDIO is not set +CONFIG_STM32_SPI1=y +CONFIG_STM32_SPI2=y +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_TIM1=y +# CONFIG_STM32_TIM2 is not set +CONFIG_STM32_TIM3=y +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_ADC=y +CONFIG_STM32_SPI=y +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_SPI1_REMAP is not set +# CONFIG_STM32_TIM1_NO_REMAP is not set +# CONFIG_STM32_TIM1_FULL_REMAP is not set +CONFIG_STM32_TIM1_PARTIAL_REMAP=y +# CONFIG_STM32_TIM3_NO_REMAP is not set +# CONFIG_STM32_TIM3_FULL_REMAP is not set +CONFIG_STM32_TIM3_PARTIAL_REMAP=y +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +CONFIG_STM32_FORCEPOWER=y +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +CONFIG_STM32_DMACAPABLE=y +# CONFIG_STM32_TIM1_PWM is not set +# CONFIG_STM32_TIM3_PWM is not set +# CONFIG_STM32_TIM1_ADC is not set +# CONFIG_STM32_TIM3_ADC is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set + +# +# ADC Configuration +# +# CONFIG_STM32_ADC1_DMA is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_USART1_RXDMA is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_USART2_RXDMA is not set +CONFIG_SERIAL_DISABLE_REORDERING=y +CONFIG_STM32_FLOWCONTROL_BROKEN=y +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +CONFIG_STM32_SPI_DMA=y + +# +# I2C Configuration +# +CONFIG_STM32_I2C_ALT=y +CONFIG_STM32_I2C_DYNTIMEO=y +CONFIG_STM32_I2C_DYNTIMEO_USECPERBYTE=40 +CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP=10 +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2C_DUTY16_9=y +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +CONFIG_ARCH_IRQPRIO=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=340 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +CONFIG_ARCH_HIPRI_INTERRUPT=y + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MAPLE is not set +CONFIG_ARCH_BOARD_OLIMEXINO_STM32=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimexino-stm32" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +CONFIG_SYSTEM_TIME64=y +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=2 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=12 +CONFIG_MAX_TASKS=12 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=5 +CONFIG_NFILE_STREAMS=5 +CONFIG_NAME_MAX=8 +CONFIG_PRIORITY_INHERITANCE=y +CONFIG_SEM_PREALLOCHOLDERS=16 +CONFIG_SEM_NNESTPRIO=16 + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=300 +CONFIG_USERMAIN_STACKSIZE=880 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=464 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +# CONFIG_RTC_DATETIME is not set +# CONFIG_RTC_HIRES is not set +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" +CONFIG_ANALOG=y +# CONFIG_ADC is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=32 +CONFIG_USART1_TXBUFSIZE=32 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=32 +CONFIG_USART2_TXBUFSIZE=32 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +CONFIG_USBDEV_COMPOSITE=y +CONFIG_COMPOSITE_IAD=y +CONFIG_COMPOSITE_EP0MAXPACKET=64 +CONFIG_COMPOSITE_VENDORID=0x03eb +CONFIG_COMPOSITE_VENDORSTR="NuttX" +CONFIG_COMPOSITE_PRODUCTID=0x2022 +CONFIG_COMPOSITE_PRODUCTSTR="Composite Device" +CONFIG_COMPOSITE_SERIALSTR="001" +CONFIG_COMPOSITE_CONFIGSTR="NuttX COMPOSITE config" +CONFIG_COMPOSITE_VERSIONNO=0x1010 +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +CONFIG_CDCACM_COMPOSITE=y +CONFIG_CDCACM_IFNOBASE=0 +CONFIG_CDCACM_STRBASE=4 +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=64 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=64 +CONFIG_CDCACM_NWRREQS=2 +CONFIG_CDCACM_NRDREQS=2 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=96 +CONFIG_CDCACM_TXBUFSIZE=96 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +CONFIG_USBMSC=y +CONFIG_USBMSC_COMPOSITE=y +CONFIG_USBMSC_IFNOBASE=2 +CONFIG_USBMSC_STRBASE=4 +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=4 +CONFIG_USBMSC_EPBULKIN=5 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=64 +CONFIG_USBMSC_BULKOUTREQLEN=64 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="Mass Storage" +CONFIG_USBMSC_VERSIONNO=0x399 +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=340 +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +CONFIG_FS_NAMED_SEMAPHORES=y +CONFIG_FS_NAMED_SEMPATH="/var/lock" +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +CONFIG_FS_FATTIME=y +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=768 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=768 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=0 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +CONFIG_C99_BOOL8=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=768 + +# +# CAN Utilities +# +# CONFIG_CANUTILS_UAVCAN is not set + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=0 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=0 +CONFIG_EXAMPLES_BUTTONS_NAME0="BOOT 0" +CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +CONFIG_EXAMPLES_HELLOXX=y +CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=40 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKFATFS=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=0 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=128 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +CONFIG_SYSTEM_FREE=y +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_STACKMONITOR is not set +# CONFIG_SYSTEM_CDCACM is not set +CONFIG_SYSTEM_COMPOSITE=y +CONFIG_SYSTEM_COMPOSITE_NLUNS=1 +CONFIG_SYSTEM_COMPOSITE_DEVMINOR1=0 +CONFIG_SYSTEM_COMPOSITE_DEVPATH1="/dev/mmcsd0" +CONFIG_SYSTEM_COMPOSITE_DEVMINOR2=1 +CONFIG_SYSTEM_COMPOSITE_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_COMPOSITE_DEVMINOR3=2 +CONFIG_SYSTEM_COMPOSITE_DEVPATH3="/dev/mmcsd2" +CONFIG_SYSTEM_COMPOSITE_TTYUSB=0 +CONFIG_SYSTEM_COMPOSITE_SERDEV="/dev/ttyACM0" +CONFIG_SYSTEM_COMPOSITE_BUFSIZE=256 +# CONFIG_SYSTEM_COMPOSITE_DEBUGMM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimexino-stm32/composite/setenv.sh b/configs/olimexino-stm32/composite/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..dd18f383b7223c06828db9d360e9e008fd0e9f04 --- /dev/null +++ b/configs/olimexino-stm32/composite/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/olimexino-stm32/composite/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimexino-stm32/include/board.h b/configs/olimexino-stm32/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..ac695f9710d3efc5817ce6b0c36c44dea4831fca --- /dev/null +++ b/configs/olimexino-stm32/include/board.h @@ -0,0 +1,207 @@ +/************************************************************************************ + * configs/olimexino-stm32/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_OLIMEXINO_STM32_INCLUDE_BOARD_H +#define __CONFIGS_OLIMEXINO_STM32_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Clocking *************************************************************************/ + +/* HSI - 8 MHz RC factory-trimmed + * LSI - 40 KHz RC (30-60KHz, uncalibrated) + * HSE - On-board crystal frequency is 8MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 8000000ul + +#define STM32_HSI_FREQUENCY 8000000ul +#define STM32_LSI_FREQUENCY 40000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */ + +#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC +#define STM32_CFGR_PLLXTPRE 0 +#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx9 +#define STM32_PLL_FREQUENCY (9*STM32_BOARD_XTAL) + +/* Use the PLL and set the SYSCLK source to be the PLL */ + +#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL +#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY + +/* AHB clock (HCLK) is SYSCLK (72MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (72MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY + +/* APB2 timers 1 and 8 will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* USB divider -- Divide PLL clock by 1.5 */ + +#define STM32_CFGR_USBPRE 0 + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY + +/* Buttons *************************************************************************/ + +#define BUTTON_BOOT0_BIT (0) +#define BUTTON_BOOT0_MASK (1< +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)\tools\copydir.bat + DIRUNLINK = $(TOPDIR)\tools\unlink.bat + MKDEP = $(TOPDIR)\tools\mkdeps.exe + ARCHINCLUDES = -I. -isystem $(TOPDIR)\include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)\include -isystem $(TOPDIR)\include\cxx + ARCHSCRIPT = -T$(TOPDIR)\configs\$(CONFIG_ARCH_BOARD)\scripts\$(LDSCRIPT) +else +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimexino-stm32/nsh/defconfig b/configs/olimexino-stm32/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..63b15cb7fcbd0d237872984fffdca437b08662c7 --- /dev/null +++ b/configs/olimexino-stm32/nsh/defconfig @@ -0,0 +1,1213 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +CONFIG_SERIAL_TERMIOS=y + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +CONFIG_ARCH_CHIP_STM32F103RB=y +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +CONFIG_STM32_HAVE_ADC1_DMA=y +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +CONFIG_STM32_ADC1=y +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +CONFIG_STM32_BKP=y +# CONFIG_STM32_CAN1 is not set +CONFIG_STM32_CRC=y +CONFIG_STM32_DMA1=y +CONFIG_STM32_DMA2=y +# CONFIG_STM32_I2C1 is not set +CONFIG_STM32_I2C2=y +CONFIG_STM32_PWR=y +# CONFIG_STM32_SDIO is not set +CONFIG_STM32_SPI1=y +CONFIG_STM32_SPI2=y +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_TIM1=y +# CONFIG_STM32_TIM2 is not set +CONFIG_STM32_TIM3=y +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_ADC=y +CONFIG_STM32_SPI=y +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_SPI1_REMAP is not set +# CONFIG_STM32_TIM1_NO_REMAP is not set +# CONFIG_STM32_TIM1_FULL_REMAP is not set +CONFIG_STM32_TIM1_PARTIAL_REMAP=y +# CONFIG_STM32_TIM3_NO_REMAP is not set +# CONFIG_STM32_TIM3_FULL_REMAP is not set +CONFIG_STM32_TIM3_PARTIAL_REMAP=y +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +CONFIG_STM32_FORCEPOWER=y +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +CONFIG_STM32_DMACAPABLE=y +# CONFIG_STM32_TIM1_PWM is not set +# CONFIG_STM32_TIM3_PWM is not set +# CONFIG_STM32_TIM1_ADC is not set +# CONFIG_STM32_TIM3_ADC is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set + +# +# ADC Configuration +# +# CONFIG_STM32_ADC1_DMA is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_USART1_RXDMA is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_USART2_RXDMA is not set +CONFIG_SERIAL_DISABLE_REORDERING=y +CONFIG_STM32_FLOWCONTROL_BROKEN=y +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +CONFIG_STM32_SPI_DMA=y + +# +# I2C Configuration +# +CONFIG_STM32_I2C_ALT=y +CONFIG_STM32_I2C_DYNTIMEO=y +CONFIG_STM32_I2C_DYNTIMEO_USECPERBYTE=40 +CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP=10 +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2C_DUTY16_9=y +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +CONFIG_ARCH_IRQPRIO=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=340 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +CONFIG_ARCH_HIPRI_INTERRUPT=y + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MAPLE is not set +CONFIG_ARCH_BOARD_OLIMEXINO_STM32=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimexino-stm32" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +CONFIG_SYSTEM_TIME64=y +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=2 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=12 +CONFIG_MAX_TASKS=12 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=5 +CONFIG_NFILE_STREAMS=5 +CONFIG_NAME_MAX=8 +CONFIG_PRIORITY_INHERITANCE=y +CONFIG_SEM_PREALLOCHOLDERS=16 +CONFIG_SEM_NNESTPRIO=16 + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=300 +CONFIG_USERMAIN_STACKSIZE=880 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=464 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +# CONFIG_RTC_DATETIME is not set +# CONFIG_RTC_HIRES is not set +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" +CONFIG_ANALOG=y +# CONFIG_ADC is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=32 +CONFIG_USART1_TXBUFSIZE=32 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=32 +CONFIG_USART2_TXBUFSIZE=32 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +CONFIG_FS_NAMED_SEMAPHORES=y +CONFIG_FS_NAMED_SEMPATH="/var/lock" +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +CONFIG_FS_FATTIME=y +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=768 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=768 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=0 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +CONFIG_C99_BOOL8=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=768 + +# +# CAN Utilities +# +# CONFIG_CANUTILS_UAVCAN is not set + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=0 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=0 +CONFIG_EXAMPLES_BUTTONS_NAME0="BOOT 0" +CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +CONFIG_EXAMPLES_HELLOXX=y +CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=40 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKFATFS=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=0 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=128 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +CONFIG_SYSTEM_FREE=y +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_STACKMONITOR is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimexino-stm32/nsh/setenv.sh b/configs/olimexino-stm32/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..025b27b553e8a8cfbd5a66747dee3c8e006b0c16 --- /dev/null +++ b/configs/olimexino-stm32/nsh/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/olimexino-stm32/nsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimexino-stm32/scripts/ld.script b/configs/olimexino-stm32/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..e771e9c2763aa3cbfa29e20bd5988622bd473ae4 --- /dev/null +++ b/configs/olimexino-stm32/scripts/ld.script @@ -0,0 +1,116 @@ +/**************************************************************************** + * configs/olimexino-stm32/scripts/ld.script + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F103xB has 128Kb of FLASH beginning at address 0x0800:0000 and + * 20Kb of SRAM beginning at address 0x2000:0000. When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/olimexino-stm32/scripts/ld.script.dfu b/configs/olimexino-stm32/scripts/ld.script.dfu new file mode 100644 index 0000000000000000000000000000000000000000..33403fc7b4cc474eb50cd2ec5653cb50bacd846c --- /dev/null +++ b/configs/olimexino-stm32/scripts/ld.script.dfu @@ -0,0 +1,112 @@ +/**************************************************************************** + * configs/olimexino-stm32/scripts/ld.script.dfu + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* Don't know if this is correct. Just 256K-48K (not tested) */ +MEMORY +{ + flash (rx) : ORIGIN = 0x08003000, LENGTH = 208K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F103Z has 64Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/olimexino-stm32/smallnsh/Make.defs b/configs/olimexino-stm32/smallnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..53f2d3ce6b16f6b43b08234a6221a627d7aa7402 --- /dev/null +++ b/configs/olimexino-stm32/smallnsh/Make.defs @@ -0,0 +1,127 @@ +############################################################################ +# configs/olimexino-stm32/smallnsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)\tools\copydir.bat + DIRUNLINK = $(TOPDIR)\tools\unlink.bat + MKDEP = $(TOPDIR)\tools\mkdeps.exe + ARCHINCLUDES = -I. -isystem $(TOPDIR)\include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)\include -isystem $(TOPDIR)\include\cxx + ARCHSCRIPT = -T$(TOPDIR)\configs\$(CONFIG_ARCH_BOARD)\scripts\$(LDSCRIPT) +else +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimexino-stm32/smallnsh/defconfig b/configs/olimexino-stm32/smallnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..fbaa9d791ebe072219f8f59fab7f718f51cff6fa --- /dev/null +++ b/configs/olimexino-stm32/smallnsh/defconfig @@ -0,0 +1,1149 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_CAN_EXTID=y +CONFIG_CAN1_BAUD=250000 +CONFIG_CAN_TSEG1=6 +CONFIG_CAN_TSEG2=7 +CONFIG_CAN_LOOPBACK=y + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +CONFIG_ARCH_CHIP_STM32F103RB=y +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +CONFIG_STM32_CAN1=y +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI2=y +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_TIM1=y +# CONFIG_STM32_TIM2 is not set +CONFIG_STM32_TIM3=y +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +CONFIG_STM32_CAN=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_CAN1_NO_REMAP is not set +CONFIG_STM32_CAN1_REMAP1=y +# CONFIG_STM32_CAN1_REMAP2 is not set +# CONFIG_STM32_TIM1_NO_REMAP is not set +# CONFIG_STM32_TIM1_FULL_REMAP is not set +CONFIG_STM32_TIM1_PARTIAL_REMAP=y +# CONFIG_STM32_TIM3_NO_REMAP is not set +# CONFIG_STM32_TIM3_FULL_REMAP is not set +CONFIG_STM32_TIM3_PARTIAL_REMAP=y +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +CONFIG_STM32_FORCEPOWER=y +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_PWM is not set +# CONFIG_STM32_TIM3_PWM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +CONFIG_SERIAL_DISABLE_REORDERING=y +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# CAN driver configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +CONFIG_ARCH_IRQPRIO=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=340 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +CONFIG_ARCH_HIPRI_INTERRUPT=y + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MAPLE is not set +CONFIG_ARCH_BOARD_OLIMEXINO_STM32=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimexino-stm32" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +CONFIG_BOARDCTL_CANINIT=y +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=2 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=12 +CONFIG_MAX_TASKS=4 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +CONFIG_FDCLONE_STDIO=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=5 +CONFIG_NFILE_STREAMS=5 +CONFIG_NAME_MAX=8 +CONFIG_PRIORITY_INHERITANCE=y +CONFIG_SEM_PREALLOCHOLDERS=16 +CONFIG_SEM_NNESTPRIO=16 + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=100000 +CONFIG_SCHED_HPWORKSTACKSIZE=758 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=300 +CONFIG_USERMAIN_STACKSIZE=880 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=464 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +# CONFIG_DEV_NULL is not set +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +CONFIG_CAN=y +# CONFIG_ARCH_HAVE_CAN_ERRORS is not set +# CONFIG_CAN_FD is not set +CONFIG_CAN_FIFOSIZE=8 +CONFIG_CAN_NPENDINGRTR=4 +# CONFIG_CAN_TXREADY is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=32 +CONFIG_USART1_TXBUFSIZE=32 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=768 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=768 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=0 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +CONFIG_C99_BOOL8=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=768 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_CAN=y +CONFIG_EXAMPLES_CAN_DEVPATH="/dev/can0" +CONFIG_EXAMPLES_CAN_NMSGS=32 +# CONFIG_EXAMPLES_CAN_READ is not set +# CONFIG_EXAMPLES_CAN_WRITE is not set +CONFIG_EXAMPLES_CAN_READWRITE=y +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=40 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=0 +CONFIG_NSH_DISABLEBG=y +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +CONFIG_NSH_DISABLE_CP=y +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +CONFIG_NSH_DISABLE_EXEC=y +CONFIG_NSH_DISABLE_EXIT=y +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +CONFIG_NSH_DISABLE_KILL=y +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +CONFIG_NSH_DISABLE_MKDIR=y +CONFIG_NSH_DISABLE_MKFIFO=y +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +CONFIG_NSH_DISABLE_MOUNT=y +CONFIG_NSH_DISABLE_MV=y +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +CONFIG_NSH_DISABLE_PWD=y +CONFIG_NSH_DISABLE_RM=y +CONFIG_NSH_DISABLE_RMDIR=y +CONFIG_NSH_DISABLE_SET=y +CONFIG_NSH_DISABLE_SH=y +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +CONFIG_NSH_DISABLE_TEST=y +CONFIG_NSH_DISABLE_UMOUNT=y +CONFIG_NSH_DISABLE_UNAME=y +CONFIG_NSH_DISABLE_UNSET=y +CONFIG_NSH_DISABLE_USLEEP=y +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=0 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=128 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_STACKMONITOR is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimexino-stm32/smallnsh/setenv.sh b/configs/olimexino-stm32/smallnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..4ad764c09eb777f9892be835aae7a783d420096b --- /dev/null +++ b/configs/olimexino-stm32/smallnsh/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/olimexino-stm32/smallnsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/olimexino-stm32/src/.gitignore b/configs/olimexino-stm32/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/olimexino-stm32/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/olimexino-stm32/src/Makefile b/configs/olimexino-stm32/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..284c1d3e3483ba9a947d4785552198dc0afe3805 --- /dev/null +++ b/configs/olimexino-stm32/src/Makefile @@ -0,0 +1,65 @@ +############################################################################ +# configs/olimexino-stm32/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c stm32_leds.c + +ifeq ($(CONFIG_CAN),y) +CSRCS += stm32_can.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += stm32_usbmsc.c +endif + +ifeq ($(CONFIG_USBDEV_COMPOSITE),y) +CSRCS += stm32_composite.c +endif + +ifeq ($(CONFIG_USBDEV),y) +CSRCS += stm32_usbdev.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/olimexino-stm32/src/olimexino-stm32.h b/configs/olimexino-stm32/src/olimexino-stm32.h new file mode 100644 index 0000000000000000000000000000000000000000..df496c98943db273d467361e1e4f879ee8c34ac7 --- /dev/null +++ b/configs/olimexino-stm32/src/olimexino-stm32.h @@ -0,0 +1,232 @@ +/************************************************************************************ + * configs/olimexino-stm32/src/olimexino-stm32.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * David_s5 + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_OLIMEXINO_STM32_SRC_OLIMEXINO_STM32_H +#define __CONFIGS_OLIMEXINO_STM32_SRC_OLIMEXINO_STM32_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +#endif + +/* LEDs ***************************************************************************** + * + * GPIO Function MPU Board + * Pin # Name + * -- ----- -------------------------------- ---------------------------- + * + * PA[05] PA5/SPI1_SCK/ADC5 21 D13(SCK1/LED1) + * PA[01] PA1/USART2_RTS/ADC1/TIM2_CH2 15 D3(LED2) + */ + +#define GPIO_LED1 (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz | \ + GPIO_PORTA | GPIO_PIN5 | GPIO_OUTPUT_CLEAR) +#define GPIO_LED_GREEN GPIO_LED1 +#define GPIO_LED2 (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz | \ + GPIO_PORTA | GPIO_PIN1 | GPIO_OUTPUT_CLEAR) +#define GPIO_LED_YELLOW GPIO_LED2 + +/* BUTTON *************************************************************************** + * + * GPIO Function MPU Board + * Pin # Name + * -- ----- -------------------------------- ---------------------------- + * + * PC[09] PC9/TIM3_CH4 40 BOOT0 + * + */ + +#define BUTTON_BOOT0n (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_PORTC | GPIO_PIN9 | \ + GPIO_EXTI) +#define IRQBUTTON BUTTON_BOOT0_BIT + +/* USBs ***************************************************************************** + * + * GPIO Function MPU Board + * Pin # Name + * -- ----- -------------------------------- ---------------------------- + * + * PC[11] PC11/USART3_RX 52 USB_P + * PC[12] PC12/USART3_CK 53 DISC + * + */ + +#define GPIO_USB_VBUS (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_PORTC | GPIO_PIN11) +#define GPIO_USB_PULLUPn (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz | \ + GPIO_PORTC | GPIO_PIN12 | GPIO_OUTPUT_SET) + +/* SPI *************************************************************************** + * + * GPIO Function MPU Board + * Pin # Name + * -- ----- -------------------------------- ---------------------------- + * + * PC[09] PA4/SPI1_NSS/USART2_CK/ADC4 20 D10(#SS1) + * PD[02] PD2/TIM3_ETR 54 D25(MMC_CS) + */ + +#define GPIO_SPI1_SSn (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz | \ + GPIO_PORTC | GPIO_PIN9 | GPIO_OUTPUT_SET) +#define USER_CSn GPIO_SPI1_SSn + +#define GPIO_SPI2_SSn (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz | \ + GPIO_PORTD | GPIO_PIN2 | GPIO_OUTPUT_SET) +#define MMCSD_CSn GPIO_SPI2_SSn + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins. + * + ************************************************************************************/ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || \ + defined(CONFIG_STM32_SPI3) +void weak_function stm32_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins. + * + ************************************************************************************/ + +void stm32_usbinitialize(void); + +/************************************************************************************ + * Name: stm32_usb_set_pwr_callback() + * + * Description: + * Called to setup set a call back for USB power state changes. + * + * Inputs: + * pwr_changed_handler: An interrupt handler that will be called on VBUS power + * state changes. + * + ************************************************************************************/ + +void stm32_usb_set_pwr_callback(xcpt_t pwr_changed_handler); + +/**************************************************************************** + * Name: stm32_led_initialize + * + * Description: + * This functions is called very early in initialization to perform board- + * specific initialization of LED-related resources. This includes such + * things as, for example, configure GPIO pins to drive the LEDs and also + * putting the LEDs in their correct initial state. + * + * NOTE: In most architectures, LED initialization() is called from + * board-specific initialization and should, therefore, have the name + * _led_intialize(). But there are a few architectures where the + * LED initialization function is still called from common chip + * architecture logic. This interface is not, however, a common board + * interface in any event and the name board_led_initialization is + * deprecated. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void stm32_led_initialize(void); +#endif + +/************************************************************************************ + * Name: stm32_can_initialize + * + * Description: + * Called at application startup time to initialize the CAN functionality. + * + ************************************************************************************/ + +#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)) +int stm32_can_initialize(void); +#endif + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Called from the application system/usbmc or the boards_nsh if the + * application is not included. + * Perform architecture specific initialization. This function must + * configure the block device to export via USB. This function must be + * provided by architecture-specific logic in order to use this add-on. + * + ****************************************************************************/ + +#ifndef CONFIG_BOARDCTL_USBDEVCTRL +int board_usbmsc_initialize(int port); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_OLIMEXINO_STM32_SRC_OLIMEXINO_STM32_H */ diff --git a/configs/olimexino-stm32/src/stm32_appinit.c b/configs/olimexino-stm32/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..c7de1858b3a6c5bc4dba458096f46b365f935b3c --- /dev/null +++ b/configs/olimexino-stm32/src/stm32_appinit.c @@ -0,0 +1,92 @@ +/************************************************************************************ + * configs/olimexino-stm32/src/stm32_appinit.c + * + * Copyright (C) 2015, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#ifdef CONFIG_USBDEV +# include "stm32_usbdev.h" +#endif + +#include "stm32.h" +#include "olimexino-stm32.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + int ret = OK; + +#ifdef CONFIG_USBMSC +#if !defined(CONFIG_NSH_BUILTIN_APPS) && !defined(CONFIG_SYSTEM_USBMSC) + ret = board_usbmsc_initialize(0); +#endif +#endif + +#ifdef CONFIG_USBDEV_COMPOSITE +#if !defined(CONFIG_NSH_BUILTIN_APPS) && !defined(CONFIG_SYSTEM_COMPOSITE) + ret = board_composite_initialize(0); +#endif +#endif + + return ret; +} diff --git a/configs/olimexino-stm32/src/stm32_boot.c b/configs/olimexino-stm32/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..e7f0b807e8a648255148705274bdf97b33789266 --- /dev/null +++ b/configs/olimexino-stm32/src/stm32_boot.c @@ -0,0 +1,146 @@ +/************************************************************************************ + * configs/olimexino-stm32/src/stm32_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include +#include "olimexino-stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: vbus_handler + ************************************************************************************/ + +#if defined(CONFIG_USBDEV) +static int vbus_handler(int irq, FAR void *context) +{ + return OK; +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + stm32_led_initialize(); +#endif + +#ifdef CONFIG_ARCH_BUTTONS + /* Configure on-board buttons. */ + + board_button_initialize(); +#endif + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || \ + defined(CONFIG_STM32_SPI3) + /* Configure SPI chip selects if 1) SP2 is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + +#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB) + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. + */ + + stm32_usbinitialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user- + * space but the initialization function must run in kernel space. + */ + + board_app_initialize(); +#endif + +#if defined(CONFIG_USBDEV) + stm32_usb_set_pwr_callback(vbus_handler); +#endif +} +#endif diff --git a/configs/olimexino-stm32/src/stm32_buttons.c b/configs/olimexino-stm32/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..85066d568f66aa487b1eb0c694d2d7672dd402af --- /dev/null +++ b/configs/olimexino-stm32/src/stm32_buttons.c @@ -0,0 +1,150 @@ +/**************************************************************************** + * configs/olimexino-stm32/src/stm32_buttons.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * David_s5 + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "olimexino-stm32.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ +/**************************************************************************** + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. + * See the BUTTON_*_BIT definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that + * will be called when a button is depressed or released. The ID value is + * a button enumeration value that uniquely identifies a button resource. + * See the BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned + * (so that it may restored, if so desired). + * + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state of + * all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + stm32_configgpio(BUTTON_BOOT0n); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. + * See the BUTTON_*_BIT definitions in board.h for the meaning of each bit. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return stm32_gpioread(BUTTON_BOOT0n) ? 0 : BUTTON_BOOT0_MASK; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * + * board_button_irq() may be called to register an interrupt handler that + * will be called when a button is depressed or released. The ID value is + * a button enumeration value that uniquely identifies a button resource. + * See the BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned + * (so that it may restored, if so desired). + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id == IRQBUTTON) + { + oldhandler = stm32_gpiosetevent(BUTTON_BOOT0n, true, true, true, irqhandler); + } + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/olimexino-stm32/src/stm32_can.c b/configs/olimexino-stm32/src/stm32_can.c new file mode 100644 index 0000000000000000000000000000000000000000..00e5c374de2efb6d492fd38bc9f2c8a1b5f13ebf --- /dev/null +++ b/configs/olimexino-stm32/src/stm32_can.c @@ -0,0 +1,135 @@ +/************************************************************************************ + * configs/olimexino-stm32/src/stm32_can.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "olimexino-stm32.h" + +#include "stm32.h" +#include "stm32_can.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* The STM32F107VC supports CAN1 and CAN2 */ + +#define CAN_PORT 1 + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = stm32_caninitialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && CONFIG_STM32_CAN1 */ diff --git a/configs/olimexino-stm32/src/stm32_composite.c b/configs/olimexino-stm32/src/stm32_composite.c new file mode 100644 index 0000000000000000000000000000000000000000..339b8c879be7730ff39c9080ab33d6f5987238a7 --- /dev/null +++ b/configs/olimexino-stm32/src/stm32_composite.c @@ -0,0 +1,138 @@ +/************************************************************************************ + * configs/olimexino-stm32/src/stm32_composite.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "stm32.h" +#include "olimexino-stm32.h" + +/* There is nothing to do here if SPI support is not selected. */ + +#ifdef CONFIG_STM32_SPI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_COMPOSITE_DEVMINOR1 +# define CONFIG_SYSTEM_COMPOSITE_DEVMINOR1 0 +#endif + +/* SLOT number(s) could depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_OLIMEXINO_STM32 +# undef OLIMEXINO_STM32_MMCSDSLOTNO +# define OLIMEXINO_STM32_MMCSDSLOTNO 0 +# undef OLIMEXINO_STM32_MMCSDSPIPORTNO +# define OLIMEXINO_STM32_MMCSDSPIPORTNO 2 +#else + /* Add configuration for new STM32 boards here */ +# error "Unrecognized STM32 board" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_composite_initialize + * + * Description: + * Perform architecture specific initialization of a composite USB device. + * + ****************************************************************************/ + +int board_composite_initialize(int port) +{ + /* If system/composite is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see stm32_appinit.c). + * In this case, there is nothing further to be done here. + */ + + FAR struct spi_dev_s *spi; + int ret; + + /* First, get an instance of the SPI interface */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", + OLIMEXINO_STM32_MMCSDSPIPORTNO); + + spi = stm32_spibus_initialize(OLIMEXINO_STM32_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + OLIMEXINO_STM32_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + OLIMEXINO_STM32_MMCSDSPIPORTNO); + + /* Now bind the SPI interface to the MMC/SD driver */ + + syslog(LOG_INFO, "Bind SPI to the MMC/SD driver, minor=%d slot=%d\n", + CONFIG_SYSTEM_COMPOSITE_DEVMINOR1, OLIMEXINO_STM32_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(CONFIG_SYSTEM_COMPOSITE_DEVMINOR1, + OLIMEXINO_STM32_MMCSDSLOTNO, spi); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SPI port %d to MMC/SD minor=%d slot=%d %d\n", + OLIMEXINO_STM32_MMCSDSPIPORTNO, CONFIG_SYSTEM_COMPOSITE_DEVMINOR1, + OLIMEXINO_STM32_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SPI to the MMC/SD driver\n"); + + return OK; +} +#endif /* CONFIG_STM32_SPI */ diff --git a/configs/olimexino-stm32/src/stm32_leds.c b/configs/olimexino-stm32/src/stm32_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..4e41af6ad3836125ee844cb09a26db52a6194c1c --- /dev/null +++ b/configs/olimexino-stm32/src/stm32_leds.c @@ -0,0 +1,212 @@ +/************************************************************************************ + * configs/olimexino-stm32/src/stm32_leds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "stm32.h" +#include "olimexino-stm32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS) +# define led_dumpgpio(m) stm32_dumpgpio(GPIO_LED_GREEN, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +static bool g_initialized = false; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_led_initialize/board_userled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void stm32_led_initialize(void) +#else +void board_userled_initialize(void) +#endif +{ + /* Configure all LED GPIO lines */ + + led_dumpgpio("board_*led_initialize() Entry)"); + + stm32_configgpio(GPIO_LED_YELLOW); + stm32_configgpio(GPIO_LED_GREEN); + + led_dumpgpio("board_*led_initialize() Exit"); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled(int led, bool ledon) +{ + if (led == BOARD_LED_GREEN) + { + stm32_gpiowrite(GPIO_LED_GREEN, !ledon); + } + else if (led == BOARD_LED_YELLOW) + { + stm32_gpiowrite(GPIO_LED_YELLOW, !ledon); + } +} +#endif + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LED_GREEN, (ledset & BOARD_LED_YELLOW_BIT) == 0); + stm32_gpiowrite(GPIO_LED_YELLOW, (ledset & BOARD_LED_YELLOW_BIT) == 0); +} +#endif + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_on(int led) +{ + switch (led) + { + default: + case LED_STARTED: + case LED_HEAPALLOCATE: + case LED_IRQSENABLED: + stm32_gpiowrite(GPIO_LED_GREEN, false); + stm32_gpiowrite(GPIO_LED_YELLOW, false); + break; + + case LED_STACKCREATED: + stm32_gpiowrite(GPIO_LED_GREEN, true); + stm32_gpiowrite(GPIO_LED_YELLOW, false); + g_initialized = true; + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + stm32_gpiowrite(GPIO_LED_YELLOW, true); + break; + + case LED_IDLE : /* IDLE */ + stm32_gpiowrite(GPIO_LED_GREEN, false); + break; + } +} +#endif + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_off(int led) +{ + switch (led) + { + default: + case LED_STARTED: + case LED_HEAPALLOCATE: + case LED_IRQSENABLED: + case LED_STACKCREATED: + stm32_gpiowrite(GPIO_LED_GREEN, false); + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + stm32_gpiowrite(GPIO_LED_YELLOW, false); + break; + + case LED_IDLE: /* IDLE */ + stm32_gpiowrite(GPIO_LED_GREEN, g_initialized); + break; + } +} +#endif diff --git a/configs/olimexino-stm32/src/stm32_spi.c b/configs/olimexino-stm32/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..59dc0db8922c21826bb96532cca8e5d7e70014ae --- /dev/null +++ b/configs/olimexino-stm32/src/stm32_spi.c @@ -0,0 +1,229 @@ +/************************************************************************************ + * configs/olimexino-stm32/src/stm32_spi.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include "chip.h" +#include "stm32.h" +#include "olimexino-stm32.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ + /* Setup CS */ + +#ifdef CONFIG_STM32_SPI1 + stm32_configgpio(USER_CSn); +#endif + +#ifdef CONFIG_STM32_SPI2 + stm32_configgpio(MMCSD_CSn); +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status + * must be provided by board-specific logic. They are implementations of + * the select and status methods of the SPI interface defined by struct + * spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including + * stm32_spibus_initialize()) are provided by common STM32 logic. To use this + * common SPI logic on your board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip + * select pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions + * in your board-specific logic. These functions will perform chip + * selection and status operations using GPIOs in the way your board + * is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind + * the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + if (devid == SPIDEV_USER) + { + stm32_gpiowrite(USER_CSn, !selected); + } +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#if defined(CONFIG_MMCSD) + if (devid == SPIDEV_MMCSD) + { + stm32_gpiowrite(MMCSD_CSn, !selected); + } +#endif +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + /* No switch on SD card socket so assume it is here */ + + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif +#endif /* CONFIG_SPI_CMDDATA */ + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/olimexino-stm32/src/stm32_usbdev.c b/configs/olimexino-stm32/src/stm32_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..8e600c508fb6424f1c7fb1d30a2c861b41d10021 --- /dev/null +++ b/configs/olimexino-stm32/src/stm32_usbdev.c @@ -0,0 +1,133 @@ +/************************************************************************************ + * configs/olimexino-stm32/src/stm32_usbdev.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include + +#include "stm32.h" +#include "olimexino-stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usb_set_pwr_callback() + * + * Description: + * Inputs: + * pwr_changed_handler: An interrupt handler that will be called on VBUS power + * state changes. + * + ************************************************************************************/ + +void stm32_usb_set_pwr_callback(xcpt_t pwr_changed_handler) +{ + (void) stm32_gpiosetevent(GPIO_USB_VBUS, true, true, true, pwr_changed_handler); +} + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + ulldbg("called\n"); + + /* USB Soft Connect Pullup */ + + stm32_configgpio(GPIO_USB_PULLUPn); +} + +/************************************************************************************ + * Name: stm32_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB software + * connect and disconnect), then the board software must provide stm32_pullup. + * See include/nuttx/usb/usbdev.h for additional description of this method. + * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be + * NULL. + * + ************************************************************************************/ + +int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); + stm32_gpiowrite(GPIO_USB_PULLUPn, !enable); + return OK; +} + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} diff --git a/configs/olimexino-stm32/src/stm32_usbmsc.c b/configs/olimexino-stm32/src/stm32_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..a64957cfbde43376ec02ed6e333b3da4bda3e91b --- /dev/null +++ b/configs/olimexino-stm32/src/stm32_usbmsc.c @@ -0,0 +1,140 @@ +/************************************************************************************ + * configs/olimexino-stm32/src/stm32_usbmsc.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "stm32.h" +#include "olimexino-stm32.h" + +/* There is nothing to do here if SPI support is not selected. */ + +#ifdef CONFIG_STM32_SPI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/* SLOT number(s) could depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_OLIMEXINO_STM32 +# undef OLIMEXINO_STM32_MMCSDSLOTNO +# define OLIMEXINO_STM32_MMCSDSLOTNO 0 +# undef OLIMEXINO_STM32_MMCSDSPIPORTNO +# define OLIMEXINO_STM32_MMCSDSPIPORTNO 2 +#else + /* Add configuration for new STM32 boards here */ +# error "Unrecognized STM32 board" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization of the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* If system/usbmsc is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see stm32_appinit.c). + * In this case, there is nothing further to be done here. + */ + + FAR struct spi_dev_s *spi; + int ret; + + /* First, get an instance of the SPI interface */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", + OLIMEXINO_STM32_MMCSDSPIPORTNO); + + spi = stm32_spibus_initialize(OLIMEXINO_STM32_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + OLIMEXINO_STM32_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + OLIMEXINO_STM32_MMCSDSPIPORTNO); + + /* Now bind the SPI interface to the MMC/SD driver */ + + syslog(LOG_INFO, "Bind SPI to the MMC/SD driver, minor=%d slot=%d\n", + CONFIG_SYSTEM_USBMSC_DEVMINOR1, OLIMEXINO_STM32_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1, + OLIMEXINO_STM32_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SPI port %d to MMC/SD minor=%d slot=%d %d\n", + OLIMEXINO_STM32_MMCSDSPIPORTNO, CONFIG_SYSTEM_USBMSC_DEVMINOR1, + OLIMEXINO_STM32_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SPI to the MMC/SD driver\n"); + + return OK; + +} + +#endif /* CONFIG_STM32_SPI */ diff --git a/configs/olimexino-stm32/tiny/Make.defs b/configs/olimexino-stm32/tiny/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..b9e08679d27a54b690b3188e3f862c171570fb9d --- /dev/null +++ b/configs/olimexino-stm32/tiny/Make.defs @@ -0,0 +1,127 @@ +############################################################################ +# configs/olimexino-stm32/tiny/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)\tools\copydir.bat + DIRUNLINK = $(TOPDIR)\tools\unlink.bat + MKDEP = $(TOPDIR)\tools\mkdeps.exe + ARCHINCLUDES = -I. -isystem $(TOPDIR)\include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)\include -isystem $(TOPDIR)\include\cxx + ARCHSCRIPT = -T$(TOPDIR)\configs\$(CONFIG_ARCH_BOARD)\scripts\$(LDSCRIPT) +else +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/olimexino-stm32/tiny/defconfig b/configs/olimexino-stm32/tiny/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d4c89d090a7394901f4ade70195f95daeebaba44 --- /dev/null +++ b/configs/olimexino-stm32/tiny/defconfig @@ -0,0 +1,1057 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_CAN_EXTID=y +CONFIG_CAN1_BAUD=250000 +CONFIG_CAN_TSEG1=6 +CONFIG_CAN_TSEG2=7 +CONFIG_CAN_LOOPBACK=y + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +CONFIG_ARCH_CHIP_STM32F103RB=y +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +CONFIG_STM32_CAN1=y +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI2=y +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_TIM1=y +# CONFIG_STM32_TIM2 is not set +CONFIG_STM32_TIM3=y +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +CONFIG_STM32_CAN=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_CAN1_NO_REMAP is not set +CONFIG_STM32_CAN1_REMAP1=y +# CONFIG_STM32_CAN1_REMAP2 is not set +# CONFIG_STM32_TIM1_NO_REMAP is not set +# CONFIG_STM32_TIM1_FULL_REMAP is not set +CONFIG_STM32_TIM1_PARTIAL_REMAP=y +# CONFIG_STM32_TIM3_NO_REMAP is not set +# CONFIG_STM32_TIM3_FULL_REMAP is not set +CONFIG_STM32_TIM3_PARTIAL_REMAP=y +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +CONFIG_STM32_FORCEPOWER=y +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_PWM is not set +# CONFIG_STM32_TIM3_PWM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +CONFIG_SERIAL_DISABLE_REORDERING=y +CONFIG_STM32_FLOWCONTROL_BROKEN=y +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# CAN driver configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +CONFIG_ARCH_IRQPRIO=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=340 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +CONFIG_ARCH_HIPRI_INTERRUPT=y + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MAPLE is not set +CONFIG_ARCH_BOARD_OLIMEXINO_STM32=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="olimexino-stm32" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +# CONFIG_ARCH_LEDS is not set +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +CONFIG_BOARDCTL_CANINIT=y +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=2 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="can_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=12 +CONFIG_MAX_TASKS=4 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +CONFIG_FDCLONE_DISABLE=y +CONFIG_FDCLONE_STDIO=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=5 +CONFIG_NFILE_STREAMS=5 +CONFIG_NAME_MAX=8 +CONFIG_PRIORITY_INHERITANCE=y +CONFIG_SEM_PREALLOCHOLDERS=16 +CONFIG_SEM_NNESTPRIO=16 + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=100000 +CONFIG_SCHED_HPWORKSTACKSIZE=758 +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_LPNTHREADS=1 +CONFIG_SCHED_LPWORKPRIORITY=50 +CONFIG_SCHED_LPWORKPRIOMAX=176 +CONFIG_SCHED_LPWORKPERIOD=50000 +CONFIG_SCHED_LPWORKSTACKSIZE=768 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=300 +CONFIG_USERMAIN_STACKSIZE=880 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=464 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +# CONFIG_DEV_NULL is not set +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +CONFIG_CAN=y +# CONFIG_ARCH_HAVE_CAN_ERRORS is not set +# CONFIG_CAN_FD is not set +CONFIG_CAN_FIFOSIZE=8 +CONFIG_CAN_NPENDINGRTR=4 +# CONFIG_CAN_TXREADY is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=32 +CONFIG_USART1_TXBUFSIZE=32 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_AIO is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=768 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=768 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=0 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +CONFIG_C99_BOOL8=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=768 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_CAN=y +CONFIG_EXAMPLES_CAN_DEVPATH="/dev/can0" +# CONFIG_EXAMPLES_CAN_READ is not set +# CONFIG_EXAMPLES_CAN_WRITE is not set +CONFIG_EXAMPLES_CAN_READWRITE=y +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LEDS is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_STACKMONITOR is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimexino-stm32/tiny/setenv.sh b/configs/olimexino-stm32/tiny/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..99645f9e45dc702dfd2a696ef8a9087a10acb57c --- /dev/null +++ b/configs/olimexino-stm32/tiny/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/olimexino-stm32/tiny/setenv.sh +# +# Copyright (C) 2025 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/open1788/Kconfig b/configs/open1788/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..e5910efdac0ee13327ba13a4957e15ee357ff7f7 --- /dev/null +++ b/configs/open1788/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_OPEN1788 +endif diff --git a/configs/open1788/README.txt b/configs/open1788/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..7d46f0e5cdf6374991452f93a484f05799d24b87 --- /dev/null +++ b/configs/open1788/README.txt @@ -0,0 +1,522 @@ +README.txt +========== + + This README file discusses the port of NuttX to the WaveShare Open1788 board: + See http://wvshare.com/product/Open1788-Standard.htm. This board features the + NXP LPC1788 MCU + +CONTENTS +======== + + o LEDs + o Buttons + o Serial Console + o Using OpenOCD with the Olimex ARM-USB-OCD + o Loading Code with the ISP Board + o Configuration + +LEDs +==== + + The Open1788 base board has four user LEDs + + LED1 : Connected to P1[14] + LED2 : Connected to P0[16] + LED3 : Connected to P1[13] + LED4 : Connected to P4[27] + + If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + any way using the defitions provided in the board.h header file. + + If CONFIG_ARCH_LEDs is defined, then NuttX will control the 3 LEDs on the + WaveShare Open1788K. The following definitions describe how NuttX controls + the LEDs: + LED1 LED2 LED3 LED4 + LED_STARTED OFF OFF OFF OFF + LED_HEAPALLOCATE ON OFF OFF OFF + LED_IRQSENABLED OFF ON OFF OFF + LED_STACKCREATED ON ON OFF OFF + LED_INIRQ LED3 glows, on while in interrupt + LED_SIGNAL LED3 glows, on while in signal handler + LED_ASSERTION LED3 glows, on while in assertion + LED_PANIC LED3 Flashes at 2Hz + LED_IDLE LED glows: ON while active; OFF while sleeping + +Buttons +======= + + The Open1788K supports several buttons: + + USER1 : Connected to P4[26] + USER2 : Connected to P2[22] + USER3 : Connected to P0[10] + + And a Joystick + + JOY_A : Connected to P2[25] + JOY_B : Connected to P2[26] + JOY_C : Connected to P2[23] + JOY_D : Connected to P2[19] + JOY_CTR : Connected to P0[14] + + These can be accessed using the definitions and interfaces defined in the + board.h header file. + +Serial Console +============== + + By Default, UART0 is used as the serial console in all configurations. This + may be connected to your computer via an external RS-232 driver or via the + WaveShare USB ISP/VCOM module. + + As an option, UART1 can also be used for the serial console. You might want, + to do this, for example, if you use UART0 for the ISP function and you want + to use a different UART for console output. UART1 can be configured as the + serial console by changing the configuration as follows: + + System Type: + CONFIG_LPC17_UART0=n : Disable UART0 if it is no longer used + CONFIG_LPC17_UART1=y : Enable UART1 + + Drivers: + CONFIG_UART1_SERIAL_CONSOLE=y : Setup up the UART1 configuration + CONFIG_UART1_RXBUFSIZE=256 + CONFIG_UART1_TXBUFSIZE=256 + CONFIG_UART1_BAUD=115200 + CONFIG_UART1_BITS=8 + CONFIG_UART1_PARITY=0 + CONFIG_UART1_2STOP=0 + + In this configuration using UART1, it is necessary to disable LED support + on the board. That is because UART1 RXD is set for pin p0.16, but so is + LED2. If you do not disable LED support then no incoming serial data will + be recevied. + + Common Board Options + CONFIG_ARCH_LEDS=n : Disable LED support + + You should also remove the LED2 jumper so that the RXD input does not + attempt to drive LED2 as well (However, this does not seem to interfere with + data receipt). + + NOTE: If you intend to use LEDs with UART1, then you might want to + redesign some ofthe LED logic in the src/ subdirectory so that it does not + attempt to use LED2. + +Using OpenOCD with the Olimex ARM-USB-OCD +========================================= + + Building OpenOCD under Cygwin: + + Refer to configs/olimex-lpc1766stk/README.txt + + Installing OpenOCD in Ubuntu Linux: + + sudo apt-get install openocd + + Helper Scripts. + + I have been using the Olimex ARM-USB-OCD debugger. OpenOCD + requires a configuration file. I keep the one I used last here: + + configs/open1788/tools/open1788.cfg + + However, the "correct" configuration script to use with OpenOCD may + change as the features of OpenOCD evolve. So you should at least + compare that open1788.cfg file with configuration files in + /usr/share/openocd/scripts. As of this writing, the configuration + files of interest were: + + /usr/local/share/openocd/scripts/interface/openocd-usb.cfg + This is the configuration file for the Olimex ARM-USB-OCD + debugger. Select a different file if you are using some + other debugger supported by OpenOCD. + + /usr/local/share/openocd/scripts/board/? + I don't see a board configuration file for the WaveShare + Open1788 board. + + /usr/local/share/openocd/scripts/target/lpc1788.cfg + This is the configuration file for the LPC1788 target. + It just sets up a few parameters then sources lpc17xx.cfg + + /usr/local/share/openocd/scripts/target/lpc17xx.cfg + This is the generic LPC configuration for the LPC17xx + family. It is included by lpc1788.cfg. + + NOTE: These files could also be located under /usr/share in some + installations. They could be most anywhwere if you are using a + windows version of OpenOCD. + + configs/open1788/tools/open1788.cfg + This is simply openocd-usb.cfg, lpc1788.cfg, and lpc17xx.cfg + concatenated into one file for convenience. Don't use it + unless you have to. + + There is also a script on the tools/ directory that I use to start + the OpenOCD daemon on my system called oocd.sh. That script will + probably require some modifications to work in another environment: + + - Possibly the value of OPENOCD_PATH and TARGET_PATH + - It assumes that the correct script to use is the one at + configs/open1788/tools/open1788.cfg + + Starting OpenOCD + + Then you should be able to start the OpenOCD daemon as follows. This + assumes that you have already CD'ed to the NuttX build directory: + + . ./setenv.sh + oocd.sh $PWD + + The setenv.sh script is a convenience script that you may choose to + use or not. It simply sets up the PATH variable so that you can + automatically find oocd.sh. You could also do: + + configs/open1788/tools/oocd.sh $PWD + + Connecting GDB + + Once the OpenOCD daemon has been started, you can connect to it via + GDB using the following GDB command: + + arm-nuttx-elf-gdb + (gdb) target remote localhost:3333 + + NOTE: The name of your GDB program may differ. For example, with the + CodeSourcery toolchain, the ARM GDB would be called arm-none-eabi-gdb. + + OpenOCD will support several special 'monitor' sub-commands. You can + use the 'monitor' (or simply 'mon') command to invoke these sub- + commands. These GDB commands will send comments to the OpenOCD monitor. + Here are a couple that you will need to use: + + (gdb) monitor reset + (gdb) monitor halt + + NOTES: + + 1. The MCU must be halted using 'monitor halt' prior to loading code. + + 2. 'monitor reset' will restart the processor after loading code. + + 3. The 'monitor' command can be abbreviated as just 'mon'. + + After starting GDB, you can load the NuttX ELF file like this: + + (gdb) mon halt + (gdb) load nuttx + + NOTES: + + 1. NuttX should have been built so that it has debugging symbols + (by setting CONFIG_DEBUG_SYMBOLS=y in the .config file). + + 2. The MCU must be halted prior to loading code. + + 3. I find that there are often undetected write failures when using + the Olimex ARM-USB-OCD debugber and that if you start the program + with a bad FLASH failure, it will lock up OpenOCD. I usually + oad nuttx twice, restarting OpenOCD in between in order to assure + good FLASH contents: + + (gdb) mon halt + (gdb) load nuttx + (gdb) mon reset + + Exit GDB, kill the OpenOCD server, recycle power on the board, + restart the OpenOCD server and GDB, then: + + (gdb) mon halt + (gdb) load nuttx + (gdb) mon reset + + Other debuggers may not have these issues and such drastic steps may + not be necessary. + +Loading Code with the ISP Board +=============================== + + Use can also load code onto the board using the WaveShare and the UART0 + ISP/VCOM board. I use the FlashMagic program for Windows available here: + http://www.flashmagictool.com/ . It is so easy to use that no further + explanation should be necessary: Just select the LPC1788, the ISP COM + port, and the NuttX .hex file and program it. + +CONFIGURATION +============= + + knsh + ---- + This is identical to the nsh configuration below except that NuttX + is built as a kernel-mode, monolithic module and the user applications + are built separately. Is is recommened to use a special make command; + not just 'make' but make with the following two arguments: + + make pass1 pass2 + + In the normal case (just 'make'), make will attempt to build both user- + and kernel-mode blobs more or less interleaved. This actual works! + However, for me it is very confusing so I prefer the above make command: + Make the user-space binaries first (pass1), then make the kernel-space + binaries (pass2) + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Uses the older, OABI, buildroot toolchain. But that is easily + reconfigured: + + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot toolchain + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : Older, OABI toolchain + + 3. This configuration has DMA-based SD card support enabled by + default. That support can be disabled as follow: + + CONFIG_LPC17_GPDMA=n : No DMA + CONFIG_ARCH_DMA=n + CONFIG_LPC17_SDCARD=n : No SD card driver + CONFIG_SDIO_DMA=n : No SD card DMA + CONFIG_MMCSD=n : No MMC/SD driver support + CONFIG_FS_FAT=n : No FAT file system support + + 4. At the end of the build, there will be several files in the top-level + NuttX build directory: + + PASS1: + nuttx_user.elf - The pass1 user-space ELF file + nuttx_user.hex - The pass1 Intel HEX format file (selected in defconfig) + User.map - Symbols in the user-space ELF file + + PASS2: + nuttx - The pass2 kernel-space ELF file + nuttx.hex - The pass2 Intel HEX file (selected in defconfig) + System.map - Symbols in the kernel-space ELF file + + Loading these .elf files with OpenOCD is tricky. It appears to me + that when nuttx_user.elf is loaded, it destroys the nuttx image + in FLASH. But loading the nuttx ELF does not harm the nuttx_user.elf + in FLASH. Conclusion: Always load nuttx_user.elf before nuttx. + + Just to complicate matters, it is sometimes the case that you need + load objects twice to account for write failures. I have not yet + found a simple foolproof way to reliably get the code into FLASH. + + 5. Combining .hex files. If you plan to use the .hex files with your + debugger or FLASH utility, then you may need to combine the two hex + files into a single .hex file. Here is how you can do that. + + a. The 'tail' of the nuttx.hex file should look something like this + (with my comments added): + + $ tail nuttx.hex + # 00, data records + ... + :10 9DC0 00 01000000000800006400020100001F0004 + :10 9DD0 00 3B005A0078009700B500D400F300110151 + :08 9DE0 00 30014E016D0100008D + # 05, Start Linear Address Record + :04 0000 05 0800 0419 D2 + # 01, End Of File record + :00 0000 01 FF + + Use an editor such as vi to remove the 05 and 01 records. + + b. The 'head' of the nuttx_user.hex file should look something like + this (again with my comments added): + + $ head nuttx_user.hex + # 04, Extended Linear Address Record + :02 0000 04 0801 F1 + # 00, data records + :10 8000 00 BD89 01084C800108C8110208D01102087E + :10 8010 00 0010 00201C1000201C1000203C16002026 + :10 8020 00 4D80 01085D80010869800108ED83010829 + ... + + Nothing needs to be done here. The nuttx_user.hex file should + be fine. + + c. Combine the edited nuttx.hex and un-edited nuttx_user.hex + file to produce a single combined hex file: + + $ cat nuttx.hex nuttx_user.hex >combined.hex + + Then use the combined.hex file with the to write the FLASH image. + If you do this a lot, you will probably want to invest a little time + to develop a tool to automate these steps. + + nsh + --- + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables only the serial NSH interface. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository./README.txt. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Uses the older, OABI, buildroot toolchain. But that is easily + reconfigured: + + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot toolchain + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : Older, OABI toolchain + + 3. This NSH has support for built-in applications enabled, however, + no built-in configurations are built in the defulat configuration. + + 4. This configuration has DMA-based SD card support enabled by + default. That support can be disabled as follow: + + CONFIG_LPC17_GPDMA=n : No DMA + CONFIG_ARCH_DMA=n + CONFIG_LPC17_SDCARD=n : No SD card driver + CONFIG_SDIO_DMA=n : No SD card DMA + CONFIG_MMCSD=n : No MMC/SD driver support + CONFIG_FS_FAT=n : No FAT file system support + + 5. This configuration has been used for verifying SDRAM by modifying + the configuration in the following ways: + + CONFIG_LPC17_EMC=y : Enable the EMC + CONFIG_LPC17_EXTDRAM=y : Configure external DRAM + CONFIG_LPC17_EXTDRAMSIZE=67108864 : DRAM size 2x256/8 = 64MB + CONFIG_SYSTEM_RAMTEST=y : Enable the RAM test built-in + + In this configuration, the SDRAM is not added to heap and so is + not excessible to the applications. So the RAM test can be + freely executed against the SRAM memory beginning at address + 0xa000:0000 (CS0). + + 6. This configuration has been used for verifying the touchscreen on + on the 4.3" LCD module. + + a) As of this writing, this touchscreen is still not functional. + Rommel Marcelo has tracked this problem down to noise on the + PENIRQ interrupt. There are so many false interrupts that + the NuttX interrupt-driven touchscreen driver cannot be used. + Other compatible LCDs, however, may not have this issue. + + b) You can enable the touchscreen by modifying the configuration + in the following ways: + + Drivers: + CONFIG_INPUT=y : Enable support for input devices + CONFIG_INPUT_ADS7843E=y : Enable support for the XPT2048 + CONFIG_ADS7843E_SPIDEV=1 : Use SSP1 for communication + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=n : exchange() method is not supported + + System Type: + CONFIG_GPIO_IRQ=y : GPIO interrupt support + CONFIG_LPC17_SSP1=y : Enable support for SSP1 + + RTOS Features: + CONFIG_DISABLE_SIGNALS=n : Signals are required + + Library Support: + CONFIG_SCHED_WORKQUEUE=y : Work queue support required + + Applicaton Configuration: + CONFIG_EXAMPLES_TOUCHSCREEN=y : Enable the touchscreen built-int test + + Defaults should be okay for related touchscreen settings. Touchscreen + debug output can be enabled with: + + Build Setup: + CONFIG_DEBUG=y : Enable debug features + CONFIG_DEBUG_VERBOSE=y : Enable verbose debug output + CONFIG_DEBUG_INPUT=y : Enable debug output from input devices + + c) You will also have to disable SD card support to use this test. The + SD card detect (CD) signal is on P0[13]. This signal is shared. It + is also used for MOSI1 and USB_UP_LED. The CD pin may be disconnected. + There is a jumper on board that enables the CD pin. OR, you can simply + remove the SD module so that it does not drive the CD pin. + + Drivers: + CONFIG_MMCSD=n : No MMC/SD driver support + + System Type: + CONFIG_LPC17_GPDMA=n : No DMA + CONFIG_LPC17_SDCARD=n : No SD card driver + CONFIG_SDIO_DMA=n : No SD card DMA + CONFIG_ARCH_DMA=n + + File Systems: + CONFIG_FS_FAT=n : No FAT file system support + + For touchscreen debug output: + + Build Setup: + CONFIG_DEBUG=y + CONFIG_DEBUG_VERBOSE=y + CONFIG_DEBUG_INPUT=y + + 7. The button test (apps/examples/buttons) can be built-in by adding + the following options. See apps/examples/README.txt for further + information about the button test. + + System Type: + CONFIG_GPIO_IRQ=y + + Board Selection: + CONFIG_ARCH_BUTTONS=y + CONFIG_ARCH_IRQBUTTONS=y + + Application Configuration: + CONFIG_EXAMPLES_BUTTONS=y + CONFIG_EXAMPLES_BUTTONS_MIN=0 + CONFIG_EXAMPLES_BUTTONS_MAX=7 + CONFIG_EXAMPLES_IRQBUTTONS_MIN=1 + CONFIG_EXAMPLES_IRQBUTTONS_MAX=7 + CONFIG_EXAMPLES_BUTTONS_NAME0="USER1" + CONFIG_EXAMPLES_BUTTONS_NAME1="USER2" + CONFIG_EXAMPLES_BUTTONS_NAME2="USER3" + CONFIG_EXAMPLES_BUTTONS_NAME3="JOYSTICK_A" + CONFIG_EXAMPLES_BUTTONS_NAME4="JOYSTICK_B" + CONFIG_EXAMPLES_BUTTONS_NAME5="JOYSTICK_C" + CONFIG_EXAMPLES_BUTTONS_NAME6="JOYSTICK_D" + CONFIG_EXAMPLES_BUTTONS_NAME7="JOYSTICK_CTR" + + nxlines + ------- + Configures the graphics example located at examples/nsh. This + configuration enables SDRAM to hold the LCD framebuffer and enables + the LPC178x LCD driver in order to support the WaveShare 4.3 inch TFT + panel. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository./README.txt. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Uses the older, OABI, buildroot toolchain. But that is easily + reconfigured: + + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot toolchain + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : Older, OABI toolchain + + 3. In this configuration, the SDRAM is not added to heap but is + dedicated to supporting an LCD frame buffer at address 0xa0010000. + diff --git a/configs/open1788/include/board.h b/configs/open1788/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..c811ad4f6604267e5241cd43c85485015d03b894 --- /dev/null +++ b/configs/open1788/include/board.h @@ -0,0 +1,476 @@ +/************************************************************************************ + * configs/open1788/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIG_OPEN1788_INCLUDE_BOARD_H +#define __CONFIG_OPEN1788_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Clocking *************************************************************************/ +/* NOTE: The following definitions require lpc17_syscon.h. It is not included here + * because the including C file may not have that file in its include path. + */ + +#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency */ +#define BOARD_OSCCLK_FREQUENCY BOARD_XTAL_FREQUENCY /* Main oscillator frequency */ +#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency */ +#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */ +#define BOARD_WDTOSC_FREQUENCY (500000) /* WDT oscillator frequency */ + +/* This is the clock setup we configure for: + * + * SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source + * PLL0CLK = (10 * SYSCLK) / 1 = 120MHz -> PLL0 multipler=10, pre-divider=1 + * CCLCK = 120MHz -> CCLK divider = 1 + */ + +#define LPC17_CCLK 120000000 /* 120Mhz */ +#define BOARD_PCLKDIV 2 /* Peripheral clock = LPC17_CCLK/2 */ +#define BOARD_PCLK_FREQUENCY (LPC17_CCLK / BOARD_PCLKDIV) + +/* Select the main oscillator as the frequency source. SYSCLK is then the frequency + * of the main oscillator. + * + * If BOARD_XTAL_FREQUENCY > 15000000, then the SCS OSCRS bit (bit 4) should also + * be set in the BOARD_SCS_VALUE. + */ + +#undef CONFIG_LPC17_MAINOSC +#define CONFIG_LPC17_MAINOSC 1 +#define BOARD_SCS_VALUE SYSCON_SCS_OSCEN + +/* Select the main oscillator and CCLK divider. The output of the divider is CCLK. + * The input to the divider (PLLCLK) will be determined by the PLL output. + */ + +#define BOARD_CCLKSEL_DIVIDER 1 +#define BOARD_CCLKSEL_VALUE (BOARD_CCLKSEL_DIVIDER | SYSCON_CCLKSEL_CCLKSEL) + +/* PLL0. PLL0 is used to generate the CPU clock (PLLCLK). + * + * Source clock: Main oscillator + * PLL0 Multiplier value (M): 10 + * PLL0 Pre-divider value (P): 1 + * + * PLL0CLK = (M * SYSCLK) = 120MHz + */ + +#undef CONFIG_LPC17_PLL0 +#define CONFIG_LPC17_PLL0 1 +#define BOARD_CLKSRCSEL_VALUE SYSCON_CLKSRCSEL_MAIN + +#define BOARD_PLL0CFG_MSEL 10 +#define BOARD_PLL0CFG_PSEL 1 +#define BOARD_PLL0CFG_VALUE \ + (((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLLCFG_MSEL_SHIFT) | \ + ((BOARD_PLL0CFG_PSEL-1) << SYSCON_PLLCFG_PSEL_SHIFT)) + +/* PLL1 : PLL1 is used to generate clock for the USB */ + +#undef CONFIG_LPC17_PLL1 +#define BOARD_PLL1CFG_MSEL 4 +#define BOARD_PLL1CFG_PSEL 2 +#define BOARD_PLL1CFG_VALUE \ + (((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLLCFG_MSEL_SHIFT) | \ + ((BOARD_PLL1CFG_PSEL-1) << SYSCON_PLLCFG_PSEL_SHIFT)) + +#ifdef CONFIG_LPC17_EMC +/* EMC clock selection. + * + * The EMC clock should not be driven above 80MHz. As a result the EMC + * uses the CPU clock divided by two. + */ + +# define BOARD_EMCCLKSEL_DIVIDER 2 +# define BOARD_EMCCLKSEL_VALUE SYSCON_EMCCLKSEL_CCLK_DIV2 +# define LPC17_EMCCLK (LPC17_CCLK / BOARD_EMCCLKSEL_DIVIDER) +#endif + +#if defined(CONFIG_LPC17_USBHOST) || (CONFIG_LPC17_USBDEV) +/* USB divider. The output of the PLL is used as the USB clock + * + * USBCLK = PLL1CLK = (SYSCLK * 4) = 48MHz + */ + +# define BOARD_USBCLKSEL_DIVIDER 1 +# define BOARD_USBCLKSEL_VALUE (SYSCON_USBCLKSEL_USBDIV_DIV1 | \ + SYSCON_USBCLKSEL_USBSEL_PLL1) +#endif + +/* FLASH Configuration */ + +#undef CONFIG_LPC17_FLASH +#define CONFIG_LPC17_FLASH 1 + +/* Flash access use 6 CPU clocks - Safe for any allowed conditions */ + +#define BOARD_FLASHCFG_VALUE (SYSCON_FLASHCFG_TIM_5 | 0x03a) + +/* Ethernet configuration */ + +#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV20 + +#ifdef CONFIG_LPC17_SDCARD +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. + * SDCARD_CLOCK=PCLK/(2*(SDCARD_CLKDIV+1)) + */ + +# define SDCARD_CLKDIV_INIT 74 /* 400Khz */ +# define SDCARD_INIT_CLKDIV (SDCARD_CLKDIV_INIT) + +# define SDCARD_NORMAL_CLKDIV 1 /* DMA ON: SDCARD_CLOCK=15MHz */ +#define SDCARD_SLOW_CLKDIV 14 /* DMA OFF: SDCARD_CLOCK=2MHz */ + +# ifdef CONFIG_SDIO_DMA +# define SDCARD_MMCXFR_CLKDIV (SDCARD_NORMAL_CLKDIV) +# else +# define SDCARD_MMCXFR_CLKDIV (SDCARD_SLOW_CLKDIV) +# endif + +# ifdef CONFIG_SDIO_DMA +# define SDCARD_SDXFR_CLKDIV (SDCARD_NORMAL_CLKDIV) +# else +# define SDCARD_SDXFR_CLKDIV (SDCARD_SLOW_CLKDIV) +# endif +#endif + +/* Set EMC delay values: + * + * CMDDLY: Programmable delay value for EMC outputs in command delayed + * mode. The delay amount is roughly CMDDLY * 250 picoseconds. + * FBCLKDLY: Programmable delay value for the feedback clock that controls + * input data sampling. The delay amount is roughly (FBCLKDLY+1) * 250 + * picoseconds. + * CLKOUT0DLY: Programmable delay value for the CLKOUT0 output. This would + * typically be used in clock delayed mode. The delay amount is roughly + * (CLKOUT0DLY+1) * 250 picoseconds. + * CLKOUT1DLY: Programmable delay value for the CLKOUT1 output. This would + * typically be used in clock delayed mode. The delay amount is roughly + * (CLKOUT1DLY+1) * 250 picoseconds. + * + * Optimal for NOR: {1,1,1,1} + * Needed for NAND and SDRAM: {17,1,2,1} + */ + +#ifdef CONFIG_LPC17_EMC +#if defined(CONFIG_LPC17_EXTNAND) || defined(CONFIG_LPC17_EXTDRAM) +# define BOARD_CMDDLY 17 +# define BOARD_FBCLKDLY 17 +# define BOARD_CLKOUT0DLY 1 +# define BOARD_CLKOUT1DLY 1 +#else +# define BOARD_CMDDLY 1 +# define BOARD_FBCLKDLY 1 +# define BOARD_CLKOUT0DLY 1 +# define BOARD_CLKOUT1DLY 1 +#endif +#endif + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + * any way. The following definitions are used to access individual LEDs. + * + * LED1 -- Connected to P1[14] + * LED2 -- Connected to P0[16] (shared with UART1 RXD) + * LED3 -- Connected to P1[13] + * LED4 -- Connected to P4[27] + * + * These LEDs are connecte to ground so a high output value will illuminate them. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_LED3 2 +#define BOARD_LED4 3 +#define BOARD_NLEDS 4 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) +#define BOARD_LED4_BIT (1 << BOARD_LED4) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the four LEDs + * on the WaveShare Open1788K. The following definitions describe how NuttX + * controls the LEDs: + */ + /* LED1 LED2 LED3 LED4 */ +#define LED_STARTED 0 /* OFF OFF OFF OFF */ +#define LED_HEAPALLOCATE 1 /* ON OFF OFF OFF */ +#define LED_IRQSENABLED 2 /* OFF ON OFF OFF */ +#define LED_STACKCREATED 3 /* ON ON OFF OFF */ +#define LED_INIRQ 4 /* LED3 glows, on while in interrupt */ +#define LED_SIGNAL 4 /* LED3 glows, on while in signal handler */ +#define LED_ASSERTION 4 /* LED3 glows, on while in assertion */ +#define LED_PANIC 4 /* LED3 Flashes at 2Hz */ +#define LED_IDLE 5 /* LED4 glows: ON while active * + * OFF while sleeping */ + +/* Button definitions ***************************************************************/ +/* The Open1788 supports several buttons. All must be pulled up by the Open1788. + * When closed, the pins will be pulled to ground. So the buttons will read "1" + * when open and "0" when closed. All except USER1 are capable of generating + * interrupts. + * + * USER1 -- Connected to P4[26] + * USER2 -- Connected to P2[22] + * USER3 -- Connected to P0[10] + * + * And a Joystick + * + * JOY_A -- Connected to P2[25] + * JOY_B -- Connected to P2[26] + * JOY_C -- Connected to P2[23] + * JOY_D -- Connected to P2[19] + * JOY_CTR -- Connected to P0[14] (shared with SSP1 SSEL) + * + * For the interrupting buttons, interrupts are generated on both edges (press and + * release). + */ + + +#define BOARD_BUTTON_USER1 0 +#define BOARD_BUTTON_USER2 1 +#define BOARD_BUTTON_USER3 2 + +#define BOARD_JOYSTICK_A 3 +#define BOARD_JOYSTICK_B 4 +#define BOARD_JOYSTICK_C 5 +#define BOARD_JOYSTICK_D 6 +#define BOARD_JOYSTICK_CTR 7 + +#define BOARD_NUM_BUTTONS 8 + +#define BOARD_BUTTON_USER1_BIT (1 << BOARD_BUTTON_USER1) +#define BOARD_BUTTON_USER2_BIT (1 << BOARD_BUTTON_USER2) +#define BOARD_BUTTON_USER3_BIT (1 << BOARD_BUTTON_USER3) + +#define BOARD_JOYSTICK_A_BIT (1 << BOARD_JOYSTICK_A) +#define BOARD_JOYSTICK_B_BIT (1 << BOARD_JOYSTICK_B) +#define BOARD_JOYSTICK_C_BIT (1 << BOARD_JOYSTICK_C) +#define BOARD_JOYSTICK_D_BIT (1 << BOARD_JOYSTICK_D) +#define BOARD_JOYSTICK_CTR_BIT (1 << BOARD_JOYSTICK_CTR) + +/* Alternate pin selections *********************************************************/ + +/* UART0: + * + * TX --- Connected to P0[2] + * RX --- Connected to P0[3] + */ + +#define GPIO_UART0_TXD GPIO_UART0_TXD_2 +#define GPIO_UART0_RXD GPIO_UART0_RXD_2 + +/* UART1: + * + * All pin options are controlled by older briges on the bottom of the board. There + * are the default settings on my board as it came out of the box: + * + * RTS --- Connected to P0[22] + * RI --- Connected to P0[21] + * DSR --- Connected to P0[19] + * DCD --- Connected to P0[18] + * CTS --- Connected to P0[17] + * DTR --- Connected to P0[20] + * TXD --- Connected to P0[15] + * RXD --- Connected to P0[16] (Shared with LED2) + */ + +#define GPIO_UART1_RTS GPIO_UART1_RTS_2 +#define GPIO_UART1_RI GPIO_UART1_RI_1 +#define GPIO_UART1_DSR GPIO_UART1_DSR_1 +#define GPIO_UART1_DCD GPIO_UART1_DCD_1 +#define GPIO_UART1_CTS GPIO_UART1_CTS_1 +#define GPIO_UART1_DTR GPIO_UART1_DTR_1 +#define GPIO_UART1_TXD GPIO_UART1_TXD_1 +#define GPIO_UART1_RXD GPIO_UART1_RXD_1 + +/* MCI-SDIO: + * + * D0 --- Connected to P1[6] + * D1 --- Connected to P2[11] + * D2 --- Connected to P2[12] + * D3 --- Connected to P2[13] + * CLK --- Connected to P1[2] + * CMD --- Connected to P1[3] + */ + +#define GPIO_SD_DAT0 GPIO_SD_DAT0_2 +#define GPIO_SD_DAT1 GPIO_SD_DAT1_2 +#define GPIO_SD_DAT2 GPIO_SD_DAT2_2 +#define GPIO_SD_DAT3 GPIO_SD_DAT3_2 +#define GPIO_SD_CLK GPIO_SD_CLK_2 +#define GPIO_SD_CMD GPIO_SD_CMD_2 + +/* LCD R: + * + * VD0 --- Connected to P0[4] + * VD1 --- Connected to P0[5] + * VD2 --- Connected to P4[28] + * VD3 --- Connected to P4[29] + * VD4 --- Connected to P2[6] + * VD5 --- Connected to P2[7] + * VD6 --- Connected to P2[8] + * VD7 --- Connected to P2[9] + */ + +#define GPIO_LCD_VD0 GPIO_LCD_VD0_1 +#define GPIO_LCD_VD1 GPIO_LCD_VD1_1 +#define GPIO_LCD_VD2 GPIO_LCD_VD2_2 +#define GPIO_LCD_VD3 GPIO_LCD_VD3_3 +#define GPIO_LCD_VD4 GPIO_LCD_VD4_1 +#define GPIO_LCD_VD5 GPIO_LCD_VD5_1 +#define GPIO_LCD_VD6 GPIO_LCD_VD6_2 +#define GPIO_LCD_VD7 GPIO_LCD_VD7_2 + +/* LED G: + * + * VD8 --- Connected to P0[6] + * VD9 --- Connected to P0[7] + * VD10 --- Connected to P1[20] + * VD11 --- Connected to P1[21] + * VD12 --- Connected to P1[22] + * VD13 --- Connected to P1[23] + * VD14 --- Connected to P1[24] + * VD15 --- Connected to P1[25] + */ + +#define GPIO_LCD_VD8 GPIO_LCD_VD8_1 +#define GPIO_LCD_VD9 GPIO_LCD_VD9_1 +#define GPIO_LCD_VD10 GPIO_LCD_VD10_1 +#define GPIO_LCD_VD11 GPIO_LCD_VD11_1 +#define GPIO_LCD_VD12 GPIO_LCD_VD12_1 +#define GPIO_LCD_VD13 GPIO_LCD_VD13_1 +#define GPIO_LCD_VD14 GPIO_LCD_VD14_1 +#define GPIO_LCD_VD15 GPIO_LCD_VD15_1 + +/* LCD B: + * + * VD16 --- Connected to P0[8] + * VD17 --- Connected to P0[9] + * VD18 --- Connected to P2[12] + * VD19 --- Connected to P2[13] + * VD20 --- Connected to P1[26] + * VD21 --- Connected to P1[27] + * VD22 --- Connected to P1[28] + * VD23 --- Connected to P1[29] + * + * DCLK --- Connected to P2[2] + * LP --- Connected to P2[5] + * FP --- Connected to P2[3] + * ENAB_M --- Connected to P2[4] + * PWR --- Connected to P2[0] + */ + +/* XPT2046 Touchscreen: + * +/* -------------- -------------------- ------------ -------------------------------- + * XTPT2046 Module Module Open1788 LED + * Signal Connector Connector + * -------------- -------------------- ------------ --------------------------------- + * Pin 11 PENIRQ\ PENIRQ (pulled high) PORT3 Pin 1 P2.15 PENIRQ + * Pin 12 DOUT MISO PORT3 Pin 4 P1.18 MISO1 (Also USB HOST UP LED) + * Pin 13 BUSY BUSY (pulled high) PORT3 Pin 9 P2.14 BUSY + * Pin 14 DIN MOSI PORT3 Pin 3 P0.13 MOSI1 (Also USB Device up LED and SD CD pin) + * Pin 15 CS\ SSEL (pulled high) PORT3 Pin 6 P1.8 GPIO (Also RMII_CRS_DV) + * Pin 16 DCLK SCK PORT3 Pin 5 P1.19 SCK1 + * -------------- -------------------- ------------ --------------------------------- + */ + + +#define GPIO_SSP1_MISO GPIO_SSP1_MISO_3 +#define GPIO_SSP1_MOSI GPIO_SSP1_MOSI_2 +#define GPIO_SSP1_SCK GPIO_SSP1_SCK_2 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIG_OPEN1788_INCLUDE_BOARD_H */ diff --git a/configs/open1788/kernel/.gitignore b/configs/open1788/kernel/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..7bacd5aee3e49e11d2753d091bd2c9b31c0b16b0 --- /dev/null +++ b/configs/open1788/kernel/.gitignore @@ -0,0 +1,2 @@ +/nuttx_user.elf + diff --git a/configs/open1788/kernel/Makefile b/configs/open1788/kernel/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..b10b3a455d7d4e587f86fc12de83e968e2fae657 --- /dev/null +++ b/configs/open1788/kernel/Makefile @@ -0,0 +1,122 @@ +############################################################################ +# configs/open1788/kernel/Makefile +# +# Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +# This is the directory for the board-specific header files + +BOARD_INCLUDE = $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)include + +# The entry point name (if none is provided in the .config file) + +CONFIG_USER_ENTRYPOINT ?= user_start +ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT)) + +# Get the paths to the libraries and the links script path in format that +# is appropriate for the host OS + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done} + USER_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}" + USER_LDSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld}" + USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}" + USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}" + USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}" +else + # Linux/Cygwin-native toolchain + USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS))) + USER_LDSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld + USER_LDSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld + USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex" + USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec" + USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" +endif + +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) +USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) +USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" + +# Source files + +CSRCS = lpc17_userspace.c +COBJS = $(CSRCS:.c=$(OBJEXT)) +OBJS = $(COBJS) + +# Targets: + +all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map +.PHONY: nuttx_user.elf depend clean distclean + +$(COBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +# Create the nuttx_user.elf file containing all of the user-mode code + +nuttx_user.elf: $(OBJS) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) + +$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf + @echo "LD: nuttx_user.elf" + $(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf +ifeq ($(CONFIG_INTELHEX_BINARY),y) + @echo "CP: nuttx_user.hex" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE) +endif +ifeq ($(CONFIG_MOTOROLA_SREC),y) + @echo "CP: nuttx_user.srec" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE) +endif +ifeq ($(CONFIG_RAW_BINARY),y) + @echo "CP: nuttx_user.bin" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE) +endif + +$(TOPDIR)$(DELIM)User.map: nuttx_user.elf + @echo "MK: User.map" + $(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map + $(Q) $(CROSSDEV)size nuttx_user.elf + +.depend: + +depend: .depend + +clean: + $(call DELFILE, nuttx_user.elf) + $(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*") + $(call DELFILE, "$(TOPDIR)$(DELIM)User.map") + $(call CLEAN) + +distclean: clean diff --git a/configs/open1788/kernel/lpc17_userspace.c b/configs/open1788/kernel/lpc17_userspace.c new file mode 100644 index 0000000000000000000000000000000000000000..37e0dfd3d6df27d28c7303144bf3f43a20f88fd3 --- /dev/null +++ b/configs/open1788/kernel/lpc17_userspace.c @@ -0,0 +1,132 @@ +/**************************************************************************** + * configs/open1788/kernel/lpc17_userspace.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_NUTTX_USERSPACE +# error "CONFIG_NUTTX_USERSPACE not defined" +#endif + +#if CONFIG_NUTTX_USERSPACE != 0x00010000 +# error "CONFIG_NUTTX_USERSPACE must be 0x00010000 to match memory.ld" +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* These 'addresses' of these values are setup by the linker script. They are + * not actual uint32_t storage locations! They are only used meaningfully in the + * following way: + * + * - The linker script defines, for example, the symbol_sdata. + * - The declareion extern uint32_t _sdata; makes C happy. C will believe + * that the value _sdata is the address of a uint32_t variable _data (it is + * not!). + * - We can recoved the linker value then by simply taking the address of + * of _data. like: uint32_t *pdata = &_sdata; + */ + +extern uint32_t _stext; /* Start of .text */ +extern uint32_t _etext; /* End_1 of .text + .rodata */ +extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */ +extern uint32_t _sdata; /* Start of .data */ +extern uint32_t _edata; /* End+1 of .data */ +extern uint32_t _sbss; /* Start of .bss */ +extern uint32_t _ebss; /* End+1 of .bss */ + +/* This is the user space entry point */ + +int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); + +const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +{ + /* General memory map */ + + .us_entrypoint = (main_t)CONFIG_USER_ENTRYPOINT, + .us_textstart = (uintptr_t)&_stext, + .us_textend = (uintptr_t)&_etext, + .us_datasource = (uintptr_t)&_eronly, + .us_datastart = (uintptr_t)&_sdata, + .us_dataend = (uintptr_t)&_edata, + .us_bssstart = (uintptr_t)&_sbss, + .us_bssend = (uintptr_t)&_ebss, + + /* Memory manager heap structure */ + + .us_heap = &g_mmheap, + + /* Task/thread startup routines */ + + .task_startup = task_startup, +#ifndef CONFIG_DISABLE_PTHREAD + .pthread_startup = pthread_startup, +#endif + + /* Signal handler trampoline */ + +#ifndef CONFIG_DISABLE_SIGNALS + .signal_handler = up_signal_handler, +#endif + + /* User-space work queue support (declared in include/nuttx/wqueue.h) */ + +#ifdef CONFIG_LIB_USRWORK + .work_usrstart = work_usrstart, +#endif +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */ diff --git a/configs/open1788/knsh/Make.defs b/configs/open1788/knsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f4f93007ab342223e140f718156b1de794343fd5 --- /dev/null +++ b/configs/open1788/knsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/open1788/knsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-m$(DELIM)Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}" + ARCHSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)kernel-space.ld}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld + ARCHSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)kernel-space.ld +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/open1788/knsh/defconfig b/configs/open1788/knsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..9081e8dba9ecc639b36b5fbf90a15d9b882315df --- /dev/null +++ b/configs/open1788/knsh/defconfig @@ -0,0 +1,909 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_FLAT is not set +CONFIG_BUILD_PROTECTED=y +CONFIG_BUILD_2PASS=y +CONFIG_PASS1_TARGET="all" +CONFIG_PASS1_BUILDIR="configs/open1788/kernel" +CONFIG_PASS1_OBJECT="" +CONFIG_NUTTX_USERSPACE=0x00010000 + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARCH_HAVE_FPU is not set +CONFIG_ARM_MPU=y +CONFIG_ARM_MPU_NREGIONS=8 + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_GPIO_IRQ is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +CONFIG_ARCH_CHIP_LPC1788=y +CONFIG_ARCH_FAMILY_LPC178X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_EMC is not set +# CONFIG_LPC17_ETHERNET is not set +# CONFIG_LPC17_LCD is not set +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_SDCARD=y +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_SSP2 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +CONFIG_LPC17_GPDMA=y +# CONFIG_LPC17_CRC is not set +# CONFIG_LPC17_FLASH is not set +# CONFIG_LPC17_EEPROM is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# +# CONFIG_SERIAL_TERMIOS is not set + +# +# SDIO Configuration +# +CONFIG_SDIO_DMA=y +CONFIG_SDIO_DMAPRIO=0x0 +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_USE_MPU=y +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=11934 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_OPEN1788=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="open1788" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=11 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +CONFIG_LIB_SYSCALL=y +CONFIG_SYS_RESERVED=8 +CONFIG_SYS_NNEST=2 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +CONFIG_DEV_LOOP=y + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +CONFIG_BCH=y +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_ARCH_HAVE_SDIO=y +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MTD is not set +CONFIG_PIPES=y +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_KERNEL_HEAP=y +CONFIG_MM_KERNEL_HEAPSIZE=8192 +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set +# CONFIG_LIB_USRWORK is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DD=y +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKFATFS=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_ROMFSETC is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/open1788/knsh/setenv.sh b/configs/open1788/knsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..4418984233ce30fe14124f075be4a8c91d6e5072 --- /dev/null +++ b/configs/open1788/knsh/setenv.sh @@ -0,0 +1,73 @@ +#!/bin/bash +# configs/open1788/knsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The Olimex-lpc1766stk/tools directory +export LPCTOOL_DIR="${WD}/configs/open1788/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/open1788/nsh/Make.defs b/configs/open1788/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..8b6db9259eb05cd35da3c0e74758ca0ee1a12d61 --- /dev/null +++ b/configs/open1788/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/open1788k/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-m$(DELIM)Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/open1788/nsh/defconfig b/configs/open1788/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..13381a0bb9f9dc06efa5cf596ec004f2ce144973 --- /dev/null +++ b/configs/open1788/nsh/defconfig @@ -0,0 +1,871 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +CONFIG_ARCH_CHIP_LPC1788=y +CONFIG_ARCH_FAMILY_LPC178X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +# CONFIG_LPC17_EMC is not set +# CONFIG_LPC17_ETHERNET is not set +# CONFIG_LPC17_LCD is not set +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_SDCARD=y +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_SSP2 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +CONFIG_LPC17_GPDMA=y +# CONFIG_LPC17_CRC is not set +# CONFIG_LPC17_FLASH is not set +# CONFIG_LPC17_EEPROM is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# SDIO Configuration +# +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=11934 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_OPEN1788=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="open1788" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=4 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +CONFIG_DEV_LOOP=y + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +CONFIG_BCH=y +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_SDIO_BLOCKSETUP is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_PIPES=y +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_ROMFSETC is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/open1788/nsh/setenv.sh b/configs/open1788/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..84c8100e1b2321b7732645bf9eb5c8343c0c66ff --- /dev/null +++ b/configs/open1788/nsh/setenv.sh @@ -0,0 +1,73 @@ +#!/bin/bash +# configs/open1788/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The open1788/tools directory +export LPCTOOL_DIR="${WD}/configs/open1788/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/open1788/nxlines/Make.defs b/configs/open1788/nxlines/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..fbe022bd306832dfbbd141511eef762b37c7a860 --- /dev/null +++ b/configs/open1788/nxlines/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/open1788k/nxlines/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-m$(DELIM)Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/open1788/nxlines/defconfig b/configs/open1788/nxlines/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..93dd9d965f7da9deffb8059e9ca3b67c37546d8c --- /dev/null +++ b/configs/open1788/nxlines/defconfig @@ -0,0 +1,720 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_DEBUG_SYMBOLS is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_LM is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAM3U is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +CONFIG_ARCH_CORTEXM3=y +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_GPIO_IRQ is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +# CONFIG_ARCH_CHIP_LPC1768 is not set +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +CONFIG_ARCH_CHIP_LPC1788=y +CONFIG_ARCH_FAMILY_LPC178X=y +CONFIG_ARCH_HAVE_SDIO=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_EMC=y +# CONFIG_LPC17_ETHERNET is not set +CONFIG_LPC17_LCD=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_SDCARD=y +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_SSP2 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +CONFIG_LPC17_GPDMA=y +# CONFIG_LPC17_CRC is not set +# CONFIG_LPC17_FLASH is not set +# CONFIG_LPC17_EEPROM is not set + +# +# Serial driver options +# +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_UART0_FLOWCONTROL is not set + +# +# SDIO Configuration +# +# CONFIG_SDIO_DMA is not set +CONFIG_SDIO_DMAPRIO=0x0 +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# LCD device driver options +# +CONFIG_LPC17_LCD_VRAMBASE=0xa0010000 +CONFIG_LPC17_LCD_REFRESH_FREQ=50 +CONFIG_LPC17_LCD_BACKLIGHT=y +CONFIG_LPC17_LCD_TFTPANEL=y +# CONFIG_LPC17_LCD_BPP1 is not set +# CONFIG_LPC17_LCD_BPP2 is not set +# CONFIG_LPC17_LCD_BPP4 is not set +# CONFIG_LPC17_LCD_BPP8 is not set +# CONFIG_LPC17_LCD_BPP16 is not set +CONFIG_LPC17_LCD_BPP24=y +# CONFIG_LPC17_LCD_BPP16_565 is not set +# CONFIG_LPC17_LCD_BPP12_444 is not set +CONFIG_LPC17_LCD_BACKCOLOR=0x0 +CONFIG_LPC17_LCD_HWIDTH=480 +CONFIG_LPC17_LCD_HPULSE=2 +CONFIG_LPC17_LCD_HFRONTPORCH=5 +CONFIG_LPC17_LCD_HBACKPORCH=40 +CONFIG_LPC17_LCD_VHEIGHT=272 +CONFIG_LPC17_LCD_VPULSE=2 +CONFIG_LPC17_LCD_VFRONTPORCH=8 +CONFIG_LPC17_LCD_VBACKPORCH=8 + +# +# External Memory Configuration +# +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTNOR=y +CONFIG_ARCH_HAVE_EXTDRAM=y +CONFIG_ARCH_HAVE_EXTSRAM0=y +# CONFIG_LPC17_EXTNAND is not set +# CONFIG_LPC17_EXTNOR is not set +CONFIG_LPC17_EXTDRAM=y +CONFIG_LPC17_EXTDRAMSIZE=67108864 +CONFIG_LPC17_EXTDRAMHEAP=y +# CONFIG_LPC17_EXTSRAM0 is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=11934 +# CONFIG_ARCH_CALIBRATION is not set +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=65536 +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_OPEN1788=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="open1788" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=4 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_SCHED_WAITPID=y +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="nxlines_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=16 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +CONFIG_DEV_LOOP=y +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_PWM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +CONFIG_BCH=y +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_SDIO_BLOCKSETUP is not set +# CONFIG_MTD is not set +CONFIG_PIPES=y +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_CONFIG_SERIAL_NPOLLWAITERS=2 +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_BINFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_NPLANES=1 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +# CONFIG_NX_DISABLE_32BPP is not set +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +# CONFIG_NX_KBD is not set + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_BORDERCOLOR1=0 +CONFIG_NXTK_BORDERCOLOR2=0 +CONFIG_NXTK_BORDERCOLOR3=0 +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +CONFIG_NXFONT_SANS28X37B=y +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_GRAN is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set +# CONFIG_LIB_KBDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_SYSTEM_COMPOSITE is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +CONFIG_EXAMPLES_NXLINES=y +CONFIG_EXAMPLES_NXLINES_VPLANE=0 +CONFIG_EXAMPLES_NXLINES_DEVNO=0 +CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x00006400 +CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16 +CONFIG_EXAMPLES_NXLINES_LINECOLOR=0x00ffff00 +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=16 +CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0x00ffff00 +CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0x00f5f5dc +CONFIG_EXAMPLES_NXLINES_BPP=32 +# CONFIG_EXAMPLES_NXLINES_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# System NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# RAM Test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# diff --git a/configs/open1788/nxlines/setenv.sh b/configs/open1788/nxlines/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c454f6ee30b4ccb8bcc57b74b074eda058c7741b --- /dev/null +++ b/configs/open1788/nxlines/setenv.sh @@ -0,0 +1,73 @@ +#!/bin/bash +# configs/open1788/nxlines/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The open1788/tools directory +export LPCTOOL_DIR="${WD}/configs/open1788/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/open1788/scripts/kernel-space.ld b/configs/open1788/scripts/kernel-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..e80fa7d110c8382086a4430d823a0dba9405c88a --- /dev/null +++ b/configs/open1788/scripts/kernel-space.ld @@ -0,0 +1,109 @@ +/**************************************************************************** + * configs/open1788/scripts/kernel-space.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > kflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > kflash + + .ARM.extab : { + *(.ARM.extab*) + } > kflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > kflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > ksram AT > kflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > ksram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/open1788/scripts/ld.script b/configs/open1788/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..78a0e89110e5cbd6462e94c5a564b57c089d7fd7 --- /dev/null +++ b/configs/open1788/scripts/ld.script @@ -0,0 +1,126 @@ +/**************************************************************************** + * configs/open1788/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Rommel Marcelo + * Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LPC1788 has 512Kb of FLASH beginning at address 0x0000:0000 and + * 96Kb of total SRAM: 64Kb of SRAM in the CPU block beginning at address + * 0x10000000 and 32Kb of Peripheral SRAM in two banks, 8Kb at addresses + * 0x20000000 bank0 first and 8kb at 0x20002000 at bank0 second. And 16Kb + * at 0x20004000 on bank1. + * + * Here we assume that .data and .bss will all fit into the 64Kb CPU SRAM + * address range. + */ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K + SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K + AHBRAM8_B0A(rwx): ORIGIN = 0x20000000, LENGTH = 8K + AHBRAM8_B0B(rwx): ORIGIN = 0x20002000, LENGTH = 8K + AHBRAM16(rwx): ORIGIN = 0x20004000, LENGTH = 16K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > FLASH + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > FLASH + + .ARM.extab : { + *(.ARM.extab*) + } > FLASH + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > FLASH + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > SRAM AT > FLASH + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > SRAM + + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/open1788/scripts/memory.ld b/configs/open1788/scripts/memory.ld new file mode 100644 index 0000000000000000000000000000000000000000..33f93a195eedda97276ccec26b2a774e039dd3f3 --- /dev/null +++ b/configs/open1788/scripts/memory.ld @@ -0,0 +1,98 @@ +/**************************************************************************** + * configs/open1788/scripts/memory.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LPC1788 has 512Kb of FLASH beginning at address 0x0000:0000 and + * 96KB of total SRAM: 64KB of SRAM in the CPU block beginning at address + * 0x10000000 and 32Kb of Peripheral SRAM in two banks, 8KB at addresses + * 0x20000000 bank0 first and 8KB at 0x20002000 at bank0 second. And 16KB + * at 0x20004000 on bank1. + * + * For MPU support, the kernel-mode NuttX section is assumed to be 64KB of + * FLASH and 4KB of SRAM. That, of course, can be optimized as needed (See + * also configs/open1788/scripts/kernel-space.ld). + * + * Alignment of the user space FLASH partition is a critical factor: The + * user space FLASH partition will be spanned with a single region of size + * 2**n bytes. The alignment of the user-space region must be the same. As + * a consequence, as the user-space increases in size, the alignmment + * requirement also increases. + * + * This alignment requirement means that the largest user space FLASH region + * you can have will be 256KB at it would have to be positioned at + * 0x00400000. If you change this address, don't forget to change the + * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify + * the check in kernel/userspace.c. + * + * For the same reasons, the maximum size of the SRAM mapping is limited to + * 4KB. Both of these alignment limitations could be reduced by using + * multiple regions to map the FLASH/SDRAM range or perhaps with some + * clever use of subregions. + * + * A detailed memory map for the 64KB CPU SRAM region is as follows: + * + * 0x10000 0000: Kernel .data region. Typical size: 0.1KB + * ------- ---- Kernel .bss region. Typical size: 1.8KB + * 0x10000 0800: Kernel IDLE thread stack (approximate). Size is + * determined by CONFIG_IDLETHREAD_STACKSIZE and + * adjustments for alignment. Typical is 1KB. + * ------- ---- Padded to 4KB + * 0x10000 1000: User .data region. Size is variable. + * ------- ---- User .bss region Size is variable. + * ------- ---- Beginning of kernel heap. Size determined by + * CONFIG_MM_KERNEL_HEAPSIZE. + * 0x10000 8000: Beginning of user heap. Can vary with other settings. + * 0x10001 0000: End+1 of CPU RAM + */ + +MEMORY +{ + /* 256Kb FLASH */ + + kflash (rx) : ORIGIN = 0x00000000, LENGTH = 64K + uflash (rx) : ORIGIN = 0x00010000, LENGTH = 64K + xflash (rx) : ORIGIN = 0x00010000, LENGTH = 384K + + /* 64Kb of SRAM in the CPU block */ + + ksram (rwx) : ORIGIN = 0x10000000, LENGTH = 4K + usram (rwx) : ORIGIN = 0x10001000, LENGTH = 4K + xsram (rwx) : ORIGIN = 0x10001000, LENGTH = 56K + + /* Other peripheral memory (free, nothing is linked here) */ + + ahbram8_b0a(rwx) : ORIGIN = 0x20000000, LENGTH = 8K + ahbram8_b0b(rwx) : ORIGIN = 0x20002000, LENGTH = 8K + ahbram16(rwx) : ORIGIN = 0x20004000, LENGTH = 16K +} diff --git a/configs/open1788/scripts/user-space.ld b/configs/open1788/scripts/user-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..734e492d57760eee284097d3e34ea031d763436f --- /dev/null +++ b/configs/open1788/scripts/user-space.ld @@ -0,0 +1,111 @@ +/**************************************************************************** + * configs/open1788/scripts/user-space.ld + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +SECTIONS +{ + .userspace : { + *(.userspace) + } > uflash + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > uflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > uflash + + .ARM.extab : { + *(.ARM.extab*) + } > uflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > uflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > usram AT > uflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > usram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/open1788/src/.gitignore b/configs/open1788/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/open1788/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/open1788/src/Makefile b/configs/open1788/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..656c9754c596966699f95b832e1262c34d18df11 --- /dev/null +++ b/configs/open1788/src/Makefile @@ -0,0 +1,77 @@ +############################################################################ +# configs/open1788/src/Makefile +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc17_boardinitialize.c lpc17_ssp.c + +ifeq ($(CONFIG_LPC17_EMC),y) +ifeq ($(CONFIG_LPC17_EXTNOR),y) + CSRCS += lpc17_norinitialize.c +endif + +ifeq ($(CONFIG_LPC17_EXTNAND),y) + CSRCS += lpc17_nandinitialize.c +endif + +ifeq ($(CONFIG_LPC17_EXTDRAM),y) + CSRCS += lpc17_sdraminitialize.c +endif +endif + +ifeq ($(CONFIG_LPC17_LCD),y) + CSRCS += lpc17_lcd.c +endif + +ifeq ($(CONFIG_NSH_LIBRARY),y) + CSRCS += lpc17_appinit.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) + CSRCS += lpc17_autoleds.c +else + CSRCS += lpc17_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) + CSRCS += lpc17_buttons.c +endif + +ifeq ($(CONFIG_INPUT_ADS7843E),y) + CSRCS += lpc17_touchscreen.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/open1788/src/lpc17_appinit.c b/configs/open1788/src/lpc17_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..53dd70aeb9d2984389e6521b0ffa35e6f7b47650 --- /dev/null +++ b/configs/open1788/src/lpc17_appinit.c @@ -0,0 +1,391 @@ +/**************************************************************************** + * config/open1788/src/lpc17_appinit.c + * arch/arm/src/board/lpc17_appinit.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "lpc17_gpio.h" +#include "lpc17_sdcard.h" +#include "lpc17_usbhost.h" +#include "open1788.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#define NSH_HAVE_MMCSD 1 +#define NSH_HAVE_USBHOST 1 +#define NSH_HAVE_USBHDEV 1 + +#undef NSH_HAVE_MMCSD_CD +#undef NSH_HAVE_MMCSD_CDINT + +/* MMC/SD support */ + +#if !defined(CONFIG_LPC17_SDCARD) || !defined(CONFIG_MMCSD) && !defined(CONFIG_MMCD_SDIO) +# undef NSH_HAVE_MMCSD +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef NSH_HAVE_MMCSD +#endif + +/* MMC/SD support requires that an SPI support is enabled and an SPI port is selected */ + +#ifdef NSH_HAVE_MMCSD +# if !defined(CONFIG_NSH_MMCSDSLOTNO) +# warning "Assuming slot MMC/SD slot 0" +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#endif + +#ifdef NSH_HAVE_MMCSD +# if !defined(CONFIG_NSH_MMCSDMINOR) +# warning "Assuming /dev/mmcsd0" +# define CONFIG_NSH_MMCSDMINOR 0 +# endif +#endif + +/* The SD card detect (CD) signal is on P0[13]. This signal is shared. It is also + * used for MOSI1 and USB_UP_LED. The CD pin may be disconnected. There is a jumper + * on board that enables the CD pin. + */ + +#ifdef NSH_HAVE_MMCSD +# ifdef CONFIG_MMCSD_HAVECARDDETECT +# define NSH_HAVE_MMCSD_CD 1 +# ifdef CONFIG_GPIO_IRQ +# define NSH_HAVE_MMCSD_CDINT 1 +# endif +# endif +#endif + +#if defined(NSH_HAVE_MMCSD_CD) && \ + (defined(CONFIG_LPC17_SSP1) || defined(CONFIG_LPC17_USBDEV)) +# warning "Use of SD Card Detect pin conflicts with SSP1 and/or USB device" +#endif + +/* USB Host */ + +#ifndef CONFIG_USBHOST +# undef NSH_HAVE_USBHOST +#endif + +#ifndef CONFIG_LPC17_USBHOST +# undef NSH_HAVE_USBHOST +#endif + +#ifdef NSH_HAVE_USBHOST +# ifndef CONFIG_USBHOST_DEFPRIO +# define CONFIG_USBHOST_DEFPRIO 50 +# endif +# ifndef CONFIG_USBHOST_STACKSIZE +# ifdef CONFIG_USBHOST_HUB +# define CONFIG_USBHOST_STACKSIZE 1536 +# else +# define CONFIG_USBHOST_STACKSIZE 1024 +# endif +# endif +#endif + +/* USB Device */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVE_USBDEV +#endif + +#ifndef CONFIG_LPC17_USBDEV +# undef NSH_HAVE_USBDEV +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef NSH_HAVE_USBHOST +static struct usbhost_connection_s *g_usbconn; +#endif +#ifdef NSH_HAVE_MMCSD +static FAR struct sdio_dev_s *g_sdiodev; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nsh_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ****************************************************************************/ + +#ifdef NSH_HAVE_USBHOST +static int nsh_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + syslog(LOG_INFO, "nsh_waiter: Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + syslog(LOG_INFO, "nsh_waiter: %s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/**************************************************************************** + * Name: nsh_cdinterrupt + * + * Description: + * Card detect interrupt handler. + * + ****************************************************************************/ + +#ifdef NSH_HAVE_MMCSD_CDINT +static int nsh_cdinterrupt(int irq, FAR void *context) +{ + static bool inserted = 0xff; /* Impossible value */ + bool present; + + present = !lpc17_gpioread(GPIO_SD_CD); + if (present != inserted) + { + sdio_mediachange(g_sdiodev, present); + inserted = present; + } + + return OK; +} +#endif + +/**************************************************************************** + * Name: nsh_sdinitialize + * + * Description: + * Initialize SPI-based microSD. + * + ****************************************************************************/ + +#ifdef NSH_HAVE_MMCSD +static int nsh_sdinitialize(void) +{ + int ret; + +#ifdef NSH_HAVE_MMCSD_CD + /* Configure the SD card detect GPIO */ + + lpc17_configgpio(GPIO_SD_CD); + + /* Attach an interrupt handler to get notifications when a card is + * inserted or deleted. + */ + +#ifdef NSH_HAVE_MMCSD_CDINT + + (void)irq_attach(LPC17_IRQ_P0p13, nsh_cdinterrupt); + up_enable_irq(LPC17_IRQ_P0p13); + +#endif +#endif + + /* First, get an instance of the SDIO interface */ + + g_sdiodev = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!g_sdiodev) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, g_sdiodev); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", + ret); + return ret; + } + + /* Check if there is a card in the slot and inform the SDCARD driver. If + * we do not support the card detect, then let's assume that there is + * one. + */ + +#ifdef NSH_HAVE_MMCSD_CD + sdio_mediachange(g_sdiodev, !lpc17_gpioread(GPIO_SD_CD)); +#else + sdio_mediachange(g_sdiodev, true); +#endif + return OK; +} +#else +# define nsh_sdinitialize() (OK) +#endif + +/**************************************************************************** + * Name: nsh_usbhostinitialize + * + * Description: + * Initialize SPI-based microSD. + * + ****************************************************************************/ + +#ifdef NSH_HAVE_USBHOST +static int nsh_usbhostinitialize(void) +{ + int pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + syslog(LOG_INFO, "Register class drivers\n"); + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB host Mass Storage Class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + + /* Then get an instance of the USB host interface */ + + syslog(LOG_INFO, "Initialize USB host\n"); + g_usbconn = lpc17_usbhost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + syslog(LOG_INFO, "Start nsh_waiter\n"); + + pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO, + CONFIG_USBHOST_STACKSIZE, + (main_t)nsh_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + return -ENODEV; +} +#else +# define nsh_usbhostinitialize() (OK) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization for NSH. + * + * CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + * CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, && + * CONFIG_LIB_BOARDCTL=n: + * Called from board_initialize(). + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + int ret; + + /* Initialize SPI-based microSD */ + + ret = nsh_sdinitialize(); + if (ret == OK) + { + /* Initialize USB host */ + + ret = nsh_usbhostinitialize(); + } + + return ret; +} diff --git a/configs/open1788/src/lpc17_autoleds.c b/configs/open1788/src/lpc17_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..b2d5f997c309acde1e12e8cd951e23341f717c87 --- /dev/null +++ b/configs/open1788/src/lpc17_autoleds.c @@ -0,0 +1,280 @@ +/**************************************************************************** + * configs/open1788/src/lpc17_autoleds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_gpio.h" +#include "open1788.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + * any way. The following definitions are used to access individual LEDs. + * + * LED1 -- Connected to P1[14] + * LED2 -- Connected to P0[16] + * LED3 -- Connected to P1[13] + * LED4 -- Connected to P4[27] + * + * These LEDs are connected to ground so a high output value will illuminate them. + * + * If CONFIG_ARCH_LEDs is defined, then NuttX will control the four LEDs + * on the WaveShare Open1788K. The following definitions describe how NuttX + * controls the LEDs: + * + * LED1 LED2 LED3 LED4 + * LED_STARTED 0 OFF OFF OFF OFF + * LED_HEAPALLOCATE 1 ON OFF OFF OFF + * LED_IRQSENABLED 2 OFF ON OFF OFF + * LED_STACKCREATED 3 ON ON OFF OFF + * LED_INIRQ 4 LED3 glows, on while in interrupt + * LED_SIGNAL 4 LED3 glows, on while in signal handler + * LED_ASSERTION 4 LED3 glows, on while in assertion + * LED_PANIC 4 LED3 Flashes at 2Hz + * LED_IDLE 5 LED glows, ON while sleeping + */ + +/* The following definitions map the encoded LED setting to GPIO settings */ + +#define OPEN1788_LED1 (1 << 0) +#define OPEN1788_LED2 (1 << 1) +#define OPEN1788_LED3 (1 << 2) +#define OPEN1788_LED4 (1 << 3) + +#define ON_SETBITS_SHIFT (0) +#define ON_CLRBITS_SHIFT (4) +#define OFF_SETBITS_SHIFT (8) +#define OFF_CLRBITS_SHIFT (12) + +#define ON_BITS(v) ((v) & 0xff) +#define OFF_BITS(v) (((v) >> 8) & 0x0ff) +#define SETBITS(b) ((b) & 0x0f) +#define CLRBITS(b) (((b) >> 4) & 0x0f) + +#define ON_SETBITS(v) (SETBITS(ON_BITS(v)) +#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v)) +#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v)) +#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v)) + +#define LED_STARTED_ON_SETBITS ((0) << ON_SETBITS_SHIFT) +#define LED_STARTED_ON_CLRBITS ((OPEN1788_LED1|OPEN1788_LED2|OPEN1788_LED3|OPEN1788_LED4) << ON_CLRBITS_SHIFT) +#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT) +#define LED_STARTED_OFF_CLRBITS ((OPEN1788_LED1|OPEN1788_LED2|OPEN1788_LED3|OPEN1788_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_HEAPALLOCATE_ON_SETBITS ((OPEN1788_LED1) << ON_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_ON_CLRBITS ((OPEN1788_LED2|OPEN1788_LED3|OPEN1788_LED4) << ON_CLRBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_SETBITS (0 << OFF_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_CLRBITS ((OPEN1788_LED1|OPEN1788_LED2|OPEN1788_LED3|OPEN1788_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_IRQSENABLED_ON_SETBITS ((OPEN1788_LED2) << ON_SETBITS_SHIFT) +#define LED_IRQSENABLED_ON_CLRBITS ((OPEN1788_LED1|OPEN1788_LED3|OPEN1788_LED4) << ON_CLRBITS_SHIFT) +#define LED_IRQSENABLED_OFF_SETBITS ((OPEN1788_LED1) << OFF_SETBITS_SHIFT) +#define LED_IRQSENABLED_OFF_CLRBITS ((OPEN1788_LED2|OPEN1788_LED3|OPEN1788_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_STACKCREATED_ON_SETBITS ((OPEN1788_LED1|OPEN1788_LED2) << ON_SETBITS_SHIFT) +#define LED_STACKCREATED_ON_CLRBITS ((OPEN1788_LED3|OPEN1788_LED4) << ON_CLRBITS_SHIFT) +#define LED_STACKCREATED_OFF_SETBITS ((OPEN1788_LED2) << OFF_SETBITS_SHIFT) +#define LED_STACKCREATED_OFF_CLRBITS ((OPEN1788_LED1|OPEN1788_LED3|OPEN1788_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_EVENT_ON_SETBITS ((OPEN1788_LED3) << ON_SETBITS_SHIFT) +#define LED_EVENT_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_EVENT_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_EVENT_OFF_CLRBITS ((OPEN1788_LED3) << OFF_CLRBITS_SHIFT) + +#define LED_IDLE_ON_SETBITS ((0) << ON_SETBITS_SHIFT) +#define LED_IDLE_ON_CLRBITS ((OPEN1788_LED4) << ON_CLRBITS_SHIFT) +#define LED_IDLE_OFF_SETBITS ((OPEN1788_LED4) << OFF_SETBITS_SHIFT) +#define LED_IDLE_OFF_CLRBITS ((0) << OFF_CLRBITS_SHIFT) + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS) +# define led_dumpgpio(m) lpc17_dumpgpio(???, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint16_t g_ledbits[8] = +{ + (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | + LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS), + + (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS | + LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS), + + (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS | + LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS), + + (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS | + LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS), + + (LED_EVENT_ON_SETBITS | LED_EVENT_ON_CLRBITS | + LED_EVENT_OFF_SETBITS | LED_EVENT_OFF_CLRBITS), + + (LED_IDLE_ON_SETBITS | LED_IDLE_ON_CLRBITS | + LED_IDLE_OFF_SETBITS | LED_IDLE_OFF_CLRBITS) +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static inline void led_clrbits(unsigned int clrbits) +{ + if ((clrbits & OPEN1788_LED1) != 0) + { + lpc17_gpiowrite(GPIO_LED1, false); + } + + if ((clrbits & OPEN1788_LED2) != 0) + { + lpc17_gpiowrite(GPIO_LED2, false); + } + + if ((clrbits & OPEN1788_LED3) != 0) + { + lpc17_gpiowrite(GPIO_LED3, false); + } + + if ((clrbits & OPEN1788_LED4) != 0) + { + lpc17_gpiowrite(GPIO_LED4, false); + } +} + +static inline void led_setbits(unsigned int setbits) +{ + if ((setbits & OPEN1788_LED1) != 0) + { + lpc17_gpiowrite(GPIO_LED1, true); + } + + if ((setbits & OPEN1788_LED2) != 0) + { + lpc17_gpiowrite(GPIO_LED2, true); + } + + if ((setbits & OPEN1788_LED3) != 0) + { + lpc17_gpiowrite(GPIO_LED3, true); + } + + if ((setbits & OPEN1788_LED4) != 0) + { + lpc17_gpiowrite(GPIO_LED4, true); + } +} + +static void led_setonoff(unsigned int bits) +{ + led_clrbits(CLRBITS(bits)); + led_setbits(SETBITS(bits)); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + lpc17_configgpio(GPIO_LED1); + lpc17_configgpio(GPIO_LED2); + lpc17_configgpio(GPIO_LED3); + lpc17_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_setonoff(ON_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_setonoff(OFF_BITS(g_ledbits[led])); +} diff --git a/configs/open1788/src/lpc17_boardinitialize.c b/configs/open1788/src/lpc17_boardinitialize.c new file mode 100644 index 0000000000000000000000000000000000000000..201e6ff210e4689017bbdd9c8ee604073c148e3c --- /dev/null +++ b/configs/open1788/src/lpc17_boardinitialize.c @@ -0,0 +1,142 @@ +/************************************************************************************ + * configs/open1788/src/lpc17_boardinitialize.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_emc.h" + +#include "open1788.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void) +{ + /* Initialize the EMC, SDRAM, NOR FLASH, and NAND FLASH */ + +#ifdef CONFIG_LPC17_EMC + lpc17_emcinitialize(); +#ifdef CONFIG_LPC17_EXTDRAM + open1788_sdram_initialize(); +#endif +#ifdef CONFIG_LPC17_EXTNOR + open1788_nor_initialize(); +#endif +#ifdef CONFIG_LPC17_EXTNAND + open1788_nand_initialize(); +#endif +#endif + + /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak + * function open1788_sspdev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1) || defined(CONFIG_LPC17_SSP2) + if (open1788_sspdev_initialize) + { + open1788_sspdev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + + /* Configure the LCD GPIOs if LCD support has been selected. */ + +#ifdef CONFIG_LPC17_LCD + open1788_lcd_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + (void)board_app_initialize(); +#endif +} +#endif diff --git a/configs/open1788/src/lpc17_buttons.c b/configs/open1788/src/lpc17_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..4509e2fe598eb0ea939c1be1cef56c2837e5099d --- /dev/null +++ b/configs/open1788/src/lpc17_buttons.c @@ -0,0 +1,256 @@ +/**************************************************************************** + * configs/open1788/src/lpc17_buttons.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include + +#include "lpc17_gpio.h" +#include "open1788.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* The Open1788 supports several buttons. All will read "1" when open and "0" + * when closed + * + * USER1 -- Connected to P4[26] + * USER2 -- Connected to P2[22] + * USER3 -- Connected to P0[10] + * + * And a Joystick + * + * JOY_A -- Connected to P2[25] + * JOY_B -- Connected to P2[26] + * JOY_C -- Connected to P2[23] + * JOY_D -- Connected to P2[19] + * JOY_CTR -- Connected to P0[14] + * + * The switches are all connected to ground and should be pulled up and sensed + * with a value of '0' when closed. + */ + +/* Pin configuration for each Open1788 button. This array is indexed by + * the BUTTON_* and JOYSTICK_* definitions in board.h + */ + +static const lpc17_pinset_t g_buttoncfg[BOARD_NUM_BUTTONS] = +{ + GPIO_USER1, GPIO_USER2, GPIO_USER3, GPIO_JOY_A, + GPIO_JOY_B, GPIO_JOY_C, GPIO_JOY_D, GPIO_JOY_CTR +}; + +/* This array defines all of the interrupt handlers current attached to + * button events. + */ + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS]; + +/* This array provides the mapping from button ID numbers to button IRQ + * numbers. + */ + +static uint8_t g_buttonirq[BOARD_NUM_BUTTONS] = +{ + 0, GPIO_USER2_IRQ, GPIO_USER3_IRQ, GPIO_JOY_A_IRQ, + GPIO_JOY_B_IRQ, GPIO_JOY_C_IRQ, GPIO_JOY_D_IRQ, GPIO_JOY_CTR_IRQ +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as interrupting inputs. */ + + for (i = 0; i < BOARD_NUM_BUTTONS; i++) + { + lpc17_configgpio(g_buttoncfg[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons. + * + * board_buttons() may be called at any time to harvest the state of every + * button. The state of the buttons is returned as a bitset with one + * bit corresponding to each button: If the bit is set, then the button + * is pressed. See the BOARD_BUTTON_*_BIT and BOARD_JOYSTICK_*_BIT + * definitions in board.h for the meaning of each bit. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < BOARD_NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed. */ + + bool released = lpc17_gpioread(g_buttoncfg[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/**************************************************************************** + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_button_irq() may be called to register button interrupt handlers. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BOARD_BUTTON_* and BOARD_JOYSTICK_* definitions in board.h for the meaning + * of enumeration values. The previous interrupt handler address is returned + * (so that it may restored, if so desired). + * + * Note that board_button_irq() also enables button interrupts. Button + * interrupts will remain enabled after the interrupt handler is attached. + * Interrupts may be disabled (and detached) by calling board_button_irq with + * irqhandler equal to NULL. + * + ****************************************************************************/ + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + irqstate_t flags; + int irq; + + /* Verify that the button ID is within range */ + + if ((unsigned)id < BOARD_NUM_BUTTONS) + { + /* Get the IRQ number for the button; A value of zero indicates that + * the button does not support the interrupt function. + */ + + irq = g_buttonirq[id]; + if (irq > 0) + { + /* Disable interrupts until we are done */ + + flags = enter_critical_section(); + + /* Return the current button handler and set the new interrupt handler */ + + oldhandler = g_buttonisr[id]; + g_buttonisr[id] = irqhandler; + + /* Configure the interrupt. Either attach and enable the new + * interrupt or disable and detach the old interrupt handler. + */ + + if (irqhandler) + { + /* Attach then enable the new interrupt handler */ + + (void)irq_attach(irq, irqhandler); + up_enable_irq(irq); + } + else + { + /* Disable then detach the old interrupt handler */ + + up_disable_irq(irq); + (void)irq_detach(irq); + } + + leave_critical_section(flags); + } + } + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/open1788/src/lpc17_lcd.c b/configs/open1788/src/lpc17_lcd.c new file mode 100644 index 0000000000000000000000000000000000000000..448ddc6ced0f12d6170fc573fadc5a3a1a6e5f04 --- /dev/null +++ b/configs/open1788/src/lpc17_lcd.c @@ -0,0 +1,96 @@ +/************************************************************************************ + * configs/open1788/src/lpc17_lcd.c + * arch/arm/src/board/lpc17_lcd.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include "lpc17_lcd.h" +#include "lpc17_gpio.h" + +#include "open1788.h" + +#ifdef CONFIG_LPC17_LCD + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: open1788_lcd_initialize + * + * Description: + * Initialize the LCD. Setup backlight (initially off) + * + ************************************************************************************/ + +void open1788_lcd_initialize(void) +{ + /* Configure the LCD backlight (and turn the backlight off) */ + + lpc17_configgpio(GPIO_LCD_BL); +} + +/************************************************************************************ + * Name: lpc17_backlight + * + * Description: + * If CONFIG_LPC17_LCD_BACKLIGHT is defined, then the board-specific logic must + * provide this interface to turn the backlight on and off. + * + ************************************************************************************/ + +#ifdef CONFIG_LPC17_LCD_BACKLIGHT +void lpc17_backlight(bool blon) +{ + lpc17_gpiowrite(GPIO_LCD_BL, blon); +} +#endif + +#endif /* CONFIG_LPC17_LCD */ diff --git a/configs/open1788/src/lpc17_nandinitialize.c b/configs/open1788/src/lpc17_nandinitialize.c new file mode 100644 index 0000000000000000000000000000000000000000..39565face23b86095597d0a408a86f146ddac985 --- /dev/null +++ b/configs/open1788/src/lpc17_nandinitialize.c @@ -0,0 +1,101 @@ +/************************************************************************************ + * configs/open1788/src/lpc17_nandinitialize.c + * arch/arm/src/board/lpc17_nandinitialize.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "open1788.h" + +#if defined(CONFIG_LPC17_EMC) && defined(CONFIG_LPC17_EXTNAND) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: open1788_nand_initialize + * + * Description: + * Initialize NAND FLASH + * + ************************************************************************************/ + +void open1788_nand_initialize(void) +{ + uint32_t regval; + + /* Set the memory width and byte lanes */ + + regval = getreg32(LPC17_EMC_STATICCONFIG1); + regval &= ~EMC_STATICCONFIG_MW_MASK; + regbal |= (EMC_STATICCONFIG_MW_8BIT | EMC_STATICCONFIG_PB); + putreg32(regval, LPC17_EMC_STATICCONFIG1); + + /* Configure timing */ + + putreg32(2, LPC17_EMC_STATICWAITWEN1); + putreg32(2, LPC17_EMC_STATICWAITOEN1); + putreg32(31, LPC17_EMC_STATICWAITRD1); + putreg32(31, LPC17_EMC_STATICWAITPAGE1); + putreg32(31, LPC17_EMC_STATICWAITWR1); + putreg32(31, LPC17_EMC_STATICWAITTURN1); + + /* GPIO P2[21] connects to the Ready/Busy pin of the NAND part. We need to + * reconfigure this pin as normal GPIO input. + */ + + lpc17_gpioconfig(GPIO_NAND_RB); +} + +#endif /* CONFIG_LPC17_EMC && CONFIG_LPC17_EXTNAND */ diff --git a/configs/open1788/src/lpc17_norinitialize.c b/configs/open1788/src/lpc17_norinitialize.c new file mode 100644 index 0000000000000000000000000000000000000000..f5b594a861db9dc0482d3df99c6a4c111c44e581 --- /dev/null +++ b/configs/open1788/src/lpc17_norinitialize.c @@ -0,0 +1,97 @@ +/************************************************************************************ + * configs/open1788/src/lpc17_norinitialize.c + * arch/arm/src/board/lpc17_norinitialize.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "open1788.h" + +#if defined(CONFIG_LPC17_EMC) && defined(CONFIG_LPC17_EXTNOR) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: open1788_nor_initialize + * + * Description: + * Initialize NOR FLASH + * + ************************************************************************************/ + +void open1788_nor_initialize(void) +{ + uint32_t regval; + + /* Set the memory width and byte lanes */ + + regval = getreg32(LPC17_EMC_STATICCONFIG0); + regval &= ~EMC_STATICCONFIG_MW_MASK; + regbal |= (EMC_STATICCONFIG_MW_16BIT | EMC_STATICCONFIG_PB); + putreg32(regval, LPC17_EMC_STATICCONFIG0); + + /* Configure timing */ + + putreg32(2, LPC17_EMC_STATICWAITWEN0); + putreg32(2, LPC17_EMC_STATICWAITOEN0); + putreg32(31, LPC17_EMC_STATICWAITRD0); + putreg32(31, LPC17_EMC_STATICWAITPAGE0); + putreg32(31, LPC17_EMC_STATICWAITWR0); + putreg32(31, LPC17_EMC_STATICWAITTURN0); + + up_mdelay(10); +} + +#endif /* CONFIG_LPC17_EMC && CONFIG_LPC17_EXTNOR */ diff --git a/configs/open1788/src/lpc17_sdraminitialize.c b/configs/open1788/src/lpc17_sdraminitialize.c new file mode 100644 index 0000000000000000000000000000000000000000..054faa029edab1ce458342413c9cce93d6f80a2c --- /dev/null +++ b/configs/open1788/src/lpc17_sdraminitialize.c @@ -0,0 +1,237 @@ +/************************************************************************************ + * configs/open1788/src/lpc17_sdraminitialize.c + * arch/arm/src/board/lpc17_sdraminitialize.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "chip/lpc17_syscon.h" +#include "lpc17_emc.h" + +#include "open1788.h" + +#if defined(CONFIG_LPC17_EMC) && defined(CONFIG_LPC17_EXTDRAM) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* The core clock is LPC17_EMCCLK which may be either LPC17_CCLK* (undivided), or + * LPC17_CCLK / 2 as determined by settings in the board.h header file. + * + * For example: + * LPC17_CCLCK = 120,000,000 + * EMCCLKSEL -> LPC17_CCLK divided by 2 + * LPC17_EMCCLK = 60,000,000 + * LPC17_EMCCLK_MHZ = 60 (Rounded to an integer) + * EMC_NSPERCLK = 16.667 (Represented with 4 bits of fraction, 267) + * + * EMC_NS2CLK(63) = ((63 << 4) + 266) / 267 = 4 (actual 3.78) + * EMC_NS2CLK(20) = ((20 << 4) + 266) / 267 = 2 (actual 1.20) + */ + +#define LPC17_EMCCLK_MHZ ((LPC17_EMCCLK + 500000) / 1000000) +#define EMC_NSPERCLK_B4 (((1000 << 4) + (LPC17_EMCCLK_MHZ >> 1)) / LPC17_EMCCLK_MHZ) +#define EMC_NS2CLK(ns) (((ns << 4) + (EMC_NSPERCLK_B4 - 1)) / EMC_NSPERCLK_B4) +#define MDKCFG_RASCAS0VAL 0x00000303 + +/* Set up for 32-bit SDRAM at CS0 */ + +#ifdef CONFIG_LPC17_EXTDRAMSIZE +# define SDRAM_SIZE CONFIG_LPC17_EXTDRAMSIZE +#endif + +#ifdef CONFIG_LPC17_SDRAM_16BIT +# ifndef SDRAM_SIZE +# define SDRAM_SIZE 0x02000000 /* 256Mbit */ +# endif +#else /* if defined(CONFIG_LPC17_SDRAM_32BIT) */ +# undef CONFIG_LPC17_SDRAM_32BIT +# define CONFIG_LPC17_SDRAM_32BIT 1 +# ifndef SDRAM_SIZE +# define SDRAM_SIZE 0x04000000 /* 512Mbit */ +# endif +#endif + +#define SDRAM_BASE 0xa0000000 /* CS0 */ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: open1788_sdram_initialize + * + * Description: + * Initialize SDRAM + * + ************************************************************************************/ + +void open1788_sdram_initialize(void) +{ + uint32_t regval; + int i; + + /* Reconfigure delays: + * + * CMDDLY: Programmable delay value for EMC outputs in command delayed + * mode. The delay amount is roughly CMDDLY * 250 picoseconds. + * FBCLKDLY: Programmable delay value for the feedback clock that controls + * input data sampling. The delay amount is roughly (FBCLKDLY+1) * 250 + * picoseconds. + * CLKOUT0DLY: Programmable delay value for the CLKOUT0 output. This would + * typically be used in clock delayed mode. The delay amount is roughly + * (CLKOUT0DLY+1) * 250 picoseconds. + * CLKOUT1DLY: Programmable delay value for the CLKOUT1 output. This would + * typically be used in clock delayed mode. The delay amount is roughly + * (CLKOUT1DLY+1) * 250 picoseconds. + */ + + regval = SYSCON_EMCDLYCTL_CMDDLY(32) | + SYSCON_EMCDLYCTL_FBCLKDLY(32) | + SYSCON_EMCDLYCTL_CLKOUT0DLY(1) | + SYSCON_EMCDLYCTL_CLKOUT1DLY(1); + putreg32(regval, LPC17_SYSCON_EMCDLYCTL); + + /* Configure the SDRAM */ + + putreg32( EMC_NS2CLK(20), LPC17_EMC_DYNAMICRP); /* TRP = 20 nS */ + putreg32( 15, LPC17_EMC_DYNAMICRAS); /* RAS = 42ns to 100K ns, */ + putreg32( 0, LPC17_EMC_DYNAMICSREX); /* TSREX = 1 clock */ + putreg32( 1, LPC17_EMC_DYNAMICAPR); /* TAPR = 2 clocks? */ + putreg32(EMC_NS2CLK(20) + 2, LPC17_EMC_DYNAMICDAL); /* TDAL = TRP + TDPL = 20ns + 2clk */ + putreg32( 1, LPC17_EMC_DYNAMICWR); /* TWR = 2 clocks */ + putreg32( EMC_NS2CLK(63), LPC17_EMC_DYNAMICRC); /* H57V2562GTR-75C TRC = 63ns(min)*/ + putreg32( EMC_NS2CLK(63), LPC17_EMC_DYNAMICRFC); /* H57V2562GTR-75C TRFC = TRC */ + putreg32( 15, LPC17_EMC_DYNAMICXSR); /* Exit self-refresh to active */ + putreg32( EMC_NS2CLK(63), LPC17_EMC_DYNAMICRRD); /* 3 clock, TRRD = 15ns (min) */ + putreg32( 1, LPC17_EMC_DYNAMICMRD); /* 2 clock, TMRD = 2 clocks (min) */ + + /* Command delayed strategy, using EMCCLKDELAY */ + + putreg32(EMC_DYNAMICREADCONFIG_RD_CMD, LPC17_EMC_DYNAMICREADCONFIG); + + /* H57V2562GTR-75C: TCL=3CLK, TRCD = 20ns(min), 3 CLK = 24ns */ + + putreg32(MDKCFG_RASCAS0VAL, LPC17_EMC_DYNAMICRASCAS0); + +#ifdef CONFIG_LPC17_SDRAM_16BIT + /* For Manley lpc1778 SDRAM: H57V2562GTR-75C, 256Mb, 16Mx16, 4 banks, row=13, column=9: + * + * 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC + */ + + putreg32(EMC_DYNAMICCONFIG_MD_SDRAM | EMC_DYNAMICCONFIG_AM0(13), + LPC17_EMC_DYNAMICCONFIG0); + +#elif defined CONFIG_LPC17_SDRAM_32BIT + /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */ + + putreg32(EMC_DYNAMICCONFIG_MD_SDRAM | EMC_DYNAMICCONFIG_AM0(13) | EMC_DYNAMICCONFIG_AM1, + LPC17_EMC_DYNAMICCONFIG0); +#endif + + up_mdelay(100); + + /* Issue NOP command */ + + putreg32(EMC_DYNAMICCONTROL_CE | EMC_DYNAMICCONTROL_CS | EMC_DYNAMICCONTROL_I_NOP, + LPC17_EMC_DYNAMICCONTROL); + + /* Wait 200 Msec */ + + up_mdelay(200); + + /* Issue PALL command */ + + putreg32(EMC_DYNAMICCONTROL_CE | EMC_DYNAMICCONTROL_CS | EMC_DYNAMICCONTROL_I_PALL, + LPC17_EMC_DYNAMICCONTROL); + + putreg32(2, LPC17_EMC_DYNAMICREFRESH); /* ( n * 16 ) -> 32 clock cycles */ + + /* Wait 128 AHB clock cycles */ + + for (i = 0; i < 128; i++); + + /* 64ms/8192 = 7.8125us, nx16x8.33ns < 7.8125us, n < 58.6*/ + + regval = 64000000 / (1 << 13); + regval -= 16; + regval >>= 4; + regval = regval * LPC17_EMCCLK_MHZ / 1000; + putreg32(regval, LPC17_EMC_DYNAMICREFRESH); + + /* Issue MODE command */ + + putreg32(EMC_DYNAMICCONTROL_CE | EMC_DYNAMICCONTROL_CS | EMC_DYNAMICCONTROL_I_MODE, + LPC17_EMC_DYNAMICCONTROL); + +#ifdef CONFIG_LPC17_SDRAM_16BIT + (void)getreg16(SDRAM_BASE | (0x33 << 12)); /* 8 burst, 3 CAS latency */ +#elif defined CONFIG_LPC17_SDRAM_32BIT + (void)getreg32(SDRAM_BASE | (0x32 << 13)); /* 4 burst, 3 CAS latency */ +#endif + + /* Issue NORMAL command */ + + putreg32(EMC_DYNAMICCONTROL_I_NORMAL, LPC17_EMC_DYNAMICCONTROL); + + /* Enable buffer */ + + regval = getreg32(LPC17_EMC_DYNAMICCONFIG0); + regval |= EMC_DYNAMICCONFIG_B; + putreg32(regval, LPC17_EMC_DYNAMICCONFIG0); + up_mdelay(12); + + regval = getreg32(LPC17_SYSCON_EMCDLYCTL); + regval &= ~SYSCON_EMCDLYCTL_CMDDLY_MASK; + regval |= SYSCON_EMCDLYCTL_CMDDLY(18); + putreg32(regval, LPC17_SYSCON_EMCDLYCTL); +} + +#endif /* CONFIG_LPC17_EMC && CONFIG_LPC17_EXTDRAM */ diff --git a/configs/open1788/src/lpc17_ssp.c b/configs/open1788/src/lpc17_ssp.c new file mode 100644 index 0000000000000000000000000000000000000000..033d7933f14da0896d9e1825cebbf06d0aa95c10 --- /dev/null +++ b/configs/open1788/src/lpc17_ssp.c @@ -0,0 +1,205 @@ +/**************************************************************************** + * configs/open1788/src/lpc17_ssp.c + * arch/arm/src/board/lpc17_ssp.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include + +#include "up_arch.h" +#include "chip.h" +#include "lpc17_gpio.h" +#include "lpc17_ssp.h" +#include "open1788.h" + +#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1) || \ + defined(CONFIG_LPC17_SSP2) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_SPI +# define sspdbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define sspvdbg lldbg +# else +# define sspvdbg(x...) +# endif +#else +# define sspdbg(x...) +# define sspvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef CONFIG_DEBUG_VERBOSE +# define ssp_dumpgpio(p,m) lpc17_dumpgpio(p,m) +#else +# define ssp_dumpgpio(p,m) +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: open1788_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LPC1766-STK. + * + ****************************************************************************/ + +void weak_function open1788_sspdev_initialize(void) +{ + /* Configure the SSP0 chip select GPIOs. */ + +#ifdef CONFIG_LPC17_SSP0 +#endif + + /* Configure SSP1 chip select GPIOs. This includes the touchscreen on the + * the LCD module. + */ + +#ifdef CONFIG_LPC17_SSP1 + ssp_dumpgpio(GPIO_TC_CS, "BEFORE SSP1 Initialization"); + lpc17_configgpio(GPIO_TC_CS); + ssp_dumpgpio(GPIO_TC_CS, "AFTER SSP1 Initialization"); +#endif + + /* Configure the SSP2 chip select GPIOs. */ + +#ifdef CONFIG_LPC17_SSP2 +#endif +} + +/************************************************************************************ + * Name: lpc17_ssp0/1/2select and lpc17_ssp0/1/2status + * + * Description: + * The external functions, lpc17_ssp0/1/2select and lpc17_ssp0/1/2status + * must be provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including lpc17_sspbus_initialize()) + * are provided by common LPC17xx logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in lpc17_boardinitialize() to configure SPI/SSP chip select + * pins. + * 2. Provide lpc17_ssp0/1/2select() and lpc17_ssp0/1/2status() functions + * in your board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 3. Add a calls to lpc17_sspbus_initialize() in your low level application + * initialization logic + * 4. The handle returned by lpc17_sspbus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +#ifdef CONFIG_LPC17_SSP0 +void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + sspdbg("Returning nothing\n"); + return 0; +} +#endif + +#ifdef CONFIG_LPC17_SSP1 +void lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + if (devid == SPIDEV_TOUCHSCREEN) + { + /* Assert/de-assert the CS pin to the touchscreen */ + + ssp_dumpgpio(GPIO_TC_CS, "lpc17_ssp1select() Entry"); + lpc17_gpiowrite(GPIO_TC_CS, !selected); + ssp_dumpgpio(GPIO_TC_CS, "lpc17_ssp1select() Exit"); + } +} + +uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + sspdbg("Returning nothing\n"); + return 0; +} +#endif + +#ifdef CONFIG_LPC17_SSP2 +void lpc17_ssp2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t lpc17_ssp2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + sspdbg("Returning nothing\n"); + return 0; +} +#endif + +#endif /* CONFIG_LPC17_SSP0 || CONFIG_LPC17_SSP1 || CONFIG_LPC17_SSP2 */ diff --git a/configs/open1788/src/lpc17_touchscreen.c b/configs/open1788/src/lpc17_touchscreen.c new file mode 100644 index 0000000000000000000000000000000000000000..933fc3c3a51f50ff557f7349c85e56c6d5bd35b6 --- /dev/null +++ b/configs/open1788/src/lpc17_touchscreen.c @@ -0,0 +1,346 @@ +/************************************************************************************ + * configs/open1788/src/lpc17_touchscreen.c + * arch/arm/src/board/lpc17_touchscreen.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "lpc17_gpio.h" +#include "lpc17_ssp.h" +#include "open1788.h" + +#ifdef CONFIG_INPUT_ADS7843E + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_INPUT +# error "Touchscreen support requires CONFIG_INPUT" +#endif + +#ifndef CONFIG_LPC17_SSP1 +# error "Touchscreen support requires CONFIG_LPC17_SSP1" +#endif + +#ifndef CONFIG_GPIO_IRQ +# error "Touchscreen support requires CONFIG_GPIO_IRQ" +#endif + +#ifndef CONFIG_ADS7843E_FREQUENCY +# define CONFIG_ADS7843E_FREQUENCY 500000 +#endif + +#ifndef CONFIG_ADS7843E_SPIDEV +# define CONFIG_ADS7843E_SPIDEV 1 +#endif + +#if CONFIG_ADS7843E_SPIDEV != 1 +# error "CONFIG_ADS7843E_SPIDEV must be one" +#endif + +#ifndef CONFIG_ADS7843E_DEVMINOR +# define CONFIG_ADS7843E_DEVMINOR 0 +#endif + +/* REVISIT: Currently, XPT2046 reports BUSY all of the time. This is + * probably GPIO setting issues. But there is this cryptic statement in + * the XPT2046 spec: "No DCLK delay required with dedicated serial port." + * + * The busy state is used by the XPT2046 driver to control the delay + * between sending the command, then reading the returned data. + */ + +#define XPT2046_NO_BUSY 1 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the XPT2046 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the XPT2046 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + */ + +static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr); +static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable); +static void tsc_clear(FAR struct ads7843e_config_s *state); +static bool tsc_busy(FAR struct ads7843e_config_s *state); +static bool tsc_pendown(FAR struct ads7843e_config_s *state); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the XPT2046 + * driver. This structure provides information about the configuration + * of the XPT2046 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. + */ + +static struct ads7843e_config_s g_tscinfo = +{ + .frequency = CONFIG_ADS7843E_FREQUENCY, + .attach = tsc_attach, + .enable = tsc_enable, + .clear = tsc_clear, + .busy = tsc_busy, + .pendown = tsc_pendown, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the XPT2046 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the XPT2046 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + */ + +static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t handler) +{ + /* Attach then enable the touchscreen interrupt handler */ + + (void)irq_attach(LPC17_IRQ_PENIRQ, handler); + return OK; +} + +static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable) +{ + ivdbg("enable:%d\n", enable); + if (enable) + { + /* Enable PENIRQ interrupts. NOTE: The pin interrupt is enabled from worker thread + * logic after completion of processing of the touchscreen interrupt. + */ + + up_enable_irq(LPC17_IRQ_PENIRQ); + } + else + { + /* Disable PENIRQ interrupts. NOTE: The PENIRQ interrupt will be disabled from + * interrupt handling logic. + */ + + up_disable_irq(LPC17_IRQ_PENIRQ); + } +} + +static void tsc_clear(FAR struct ads7843e_config_s *state) +{ + /* Does nothing. The interrupt is cleared automatically in the GPIO + * logic for the LPC17xx family. + */ +} + +static bool tsc_busy(FAR struct ads7843e_config_s *state) +{ +/* The busy state is used by the XPT2046 driver to control the delay + * between sending the command, then reading the returned data. + */ + +#ifdef XPT2046_NO_BUSY +/* REVISIT: Currently, XPT2046 reports BUSY all of the time. This is + * probably GPIO setting issues. But there is this cryptic statement in + * the XPT2046 spec: "No DCLK delay required with dedicated serial port." + */ + + return false; + +#else /* XPT2046_NO_BUSY */ + +#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_VERBOSE) + static bool last = (bool)-1; +#endif + + /* REVISIT: This might need to be inverted */ + + bool busy = lpc17_gpioread(GPIO_TC_BUSY); +#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_VERBOSE) + if (busy != last) + { + ivdbg("busy:%d\n", busy); + last = busy; + } +#endif + + return busy; + +#endif /* XPT2046_NO_BUSY */ +} + +static bool tsc_pendown(FAR struct ads7843e_config_s *state) +{ + /* XPT2046 uses an an internal pullup resistor. The PENIRQ output goes low + * due to the current path through the touch screen to ground, which + * initiates an interrupt to the processor via TP_INT. + */ + + bool pendown = !lpc17_gpioread(GPIO_TC_PENIRQ); + ivdbg("pendown:%d\n", pendown); + return pendown; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this + * function. This function is called by application-specific, setup logic + * to configure the touchscreen device. This function will register the + * driver as /dev/inputN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ + static bool initialized = false; + FAR struct spi_dev_s *dev; + int ret; + + idbg("initialized:%d minor:%d\n", initialized, minor); + DEBUGASSERT(minor == 0); + + /* Since there is no uninitialized logic, this initialization can be + * performed only one time. + */ + + if (!initialized) + { + /* Configure and enable the XPT2046 PENIRQ pin as an interrupting input. */ + + (void)lpc17_configgpio(GPIO_TC_PENIRQ); + + /* Configure the XPT2046 BUSY pin as a normal input. */ + +#ifndef XPT2046_NO_BUSY + (void)lpc17_configgpio(GPIO_TC_BUSY); +#endif + + /* Get an instance of the SPI interface */ + + dev = lpc17_sspbus_initialize(CONFIG_ADS7843E_SPIDEV); + if (!dev) + { + idbg("Failed to initialize SPI bus %d\n", CONFIG_ADS7843E_SPIDEV); + return -ENODEV; + } + + /* Initialize and register the SPI touchscreen device */ + + ret = ads7843e_register(dev, &g_tscinfo, CONFIG_ADS7843E_DEVMINOR); + if (ret < 0) + { + idbg("Failed to register touchscreen device minor=%d\n", + CONFIG_ADS7843E_DEVMINOR); + /* up_spiuninitialize(dev); */ + return -ENODEV; + } + + initialized = true; + } + + return OK; +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* No support for un-initializing the touchscreen XPT2046 device yet */ +} + +#endif /* CONFIG_INPUT_ADS7843E */ diff --git a/configs/open1788/src/lpc17_userleds.c b/configs/open1788/src/lpc17_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..077cdc994abca4d930431d300f67144969e061e8 --- /dev/null +++ b/configs/open1788/src/lpc17_userleds.c @@ -0,0 +1,139 @@ +/**************************************************************************** + * configs/open1788/src/lpc17_userleds.c + * arch/arm/src/board/lpc17_userleds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_gpio.h" +#include "open1788.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS) +# define led_dumpgpio(m) lpc17_dumpgpio(???, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* This array maps an LED number to GPIO pin configuration */ + +static uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4 +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + lpc17_configgpio(GPIO_LED1); + lpc17_configgpio(GPIO_LED2); + lpc17_configgpio(GPIO_LED3); + lpc17_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + lpc17_gpiowrite(g_ledcfg[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + lpc17_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0); + lpc17_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0); + lpc17_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) == 0); + lpc17_gpiowrite(GPIO_LED4, (ledset & BOARD_LED4_BIT) == 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/open1788/src/open1788.h b/configs/open1788/src/open1788.h new file mode 100644 index 0000000000000000000000000000000000000000..411139b177daa43e4b1daeba48b126f50694450f --- /dev/null +++ b/configs/open1788/src/open1788.h @@ -0,0 +1,229 @@ +/************************************************************************************ + * configs/open1788/src/open1788.h + * arch/arm/src/board/open1788.n + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef _CONFIGS_OPEN1788_SRC_OPEN1788_H +#define _CONFIGS_OPEN1788_SRC_OPEN1788_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Open1788 GPIO Pin Definitions ****************************************************/ +/* GPIO P2[21] connects to the Ready/Busy pin of the NAND part. We need to + * reconfigure this pin as normal GPIO input if NAND is used. + */ + +#define GPIO_NAND_RB (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN21) + +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + * any way. The following definitions are used to access individual LEDs. + * + * LED1 -- Connected to P1[14] + * LED2 -- Connected to P0[16] + * LED3 -- Connected to P1[13] + * LED4 -- Connected to P4[27] + * + * These LEDs are connecte to ground so a high output value will illuminate them. + */ + +#define GPIO_LED1 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN14) +#define GPIO_LED2 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN16) +#define GPIO_LED3 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN13) +#define GPIO_LED4 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT4 | GPIO_PIN27) + +/* Button definitions ***************************************************************/ +/* The Open1788 supports several buttons. All must be pulled up by the Open1788. + * When closed, the pins will be pulled to ground. So the buttons will read "1" + * when open and "0" when closed. All except USER1 are capable of generating + * interrupts. + * + * USER1 -- Connected to P4[26] + * USER2 -- Connected to P2[22] + * USER3 -- Connected to P0[10] + * + * And a Joystick + * + * JOY_A -- Connected to P2[25] + * JOY_B -- Connected to P2[26] + * JOY_C -- Connected to P2[23] + * JOY_D -- Connected to P2[19] + * JOY_CTR -- Connected to P0[14] (shared with SSP1 SSEL) + * + * For the interrupting buttons, interrupts are generated on both edges (press and + * release). + */ + +#define GPIO_USER1 (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT4 | GPIO_PIN26) +#define GPIO_USER2 (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN22) +#define GPIO_USER3 (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN10) + +#define GPIO_JOY_A (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN25) +#define GPIO_JOY_B (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN26) +#define GPIO_JOY_C (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN23) +#define GPIO_JOY_D (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN19) +#define GPIO_JOY_CTR (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN14) + +/* IRQ numbers for the buttons that do support interrupts */ + +#define GPIO_USER2_IRQ LPC17_IRQ_P2p22 +#define GPIO_USER3_IRQ LPC17_IRQ_P0p10 +#define GPIO_JOY_A_IRQ LPC17_IRQ_P2p25 +#define GPIO_JOY_B_IRQ LPC17_IRQ_P2p26 +#define GPIO_JOY_C_IRQ LPC17_IRQ_P2p23 +#define GPIO_JOY_D_IRQ LPC17_IRQ_P2p19 +#define GPIO_JOY_CTR_IRQ LPC17_IRQ_P0p14 + +/* SD Card **************************************************************************/ +/* The SD card detect (CD) signal is on P0[13]. This signal is shared. It is also + * used for MOSI1 and USB_UP_LED. The CD pin may be disconnected. There is a jumper + * on board that enables the CD pin. + * + * The CD pin is interrupting: + */ + +#define GPIO_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN13) + +/* LCD ******************************************************************************/ +/* Backlight enable, P2[1]. Initial state is OFF (zero) */ + +#define GPIO_LCD_BL (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN1) + +/* XPT2046 Touchscreen **************************************************************/ +/* -------------- -------------------- ------------ -------------------------------- + * XTPT2046 Module Module Open1788 LED + * Signal Connector Connector + * -------------- -------------------- ------------ --------------------------------- + * Pin 11 PENIRQ\ PENIRQ (pulled high) PORT3 Pin 1 P2.15 PENIRQ + * Pin 12 DOUT MISO PORT3 Pin 4 P1.18 MISO1 (Also USB HOST UP LED) + * Pin 13 BUSY BUSY (pulled high) PORT3 Pin 9 P2.14 BUSY + * Pin 14 DIN MOSI PORT3 Pin 3 P0.13 MOSI1 (Also USB Device up LED and SD CD pin) + * Pin 15 CS\ SSEL (pulled high) PORT3 Pin 6 P1.8 GPIO (Also RMII_CRS_DV) + * Pin 16 DCLK SCK PORT3 Pin 5 P1.19 SCK1 + * -------------- -------------------- ------------ --------------------------------- + * + * Pins should not need to be configured as pull-ups because, according to the LCD + * schematic, the are pulled-up on board the LCD module. + */ + +#define GPIO_TC_PENIRQ (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT2 | GPIO_PIN15) +#define GPIO_TC_BUSY (GPIO_INPUT | GPIO_FLOAT | GPIO_PORT2 | GPIO_PIN14) +#define GPIO_TC_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN8) + +#define LPC17_IRQ_PENIRQ LPC17_IRQ_P2p15 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: open1788_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the WaveShare Open1788 board. + * + ************************************************************************************/ + +void weak_function open1788_sspdev_initialize(void); + +/************************************************************************************ + * Name: open1788_sdram_initialize + * + * Description: + * Initialize SDRAM + * + ************************************************************************************/ + +#ifdef CONFIG_LPC17_EMC +#ifdef CONFIG_LPC17_EXTDRAM +void open1788_sdram_initialize(void); +#endif + +/************************************************************************************ + * Name: open1788_nor_initialize + * + * Description: + * Initialize NOR FLASH + * + ************************************************************************************/ + +#ifdef CONFIG_LPC17_EXTNOR +void open1788_nor_initialize(void); +#endif + +/************************************************************************************ + * Name: open1788_nand_initialize + * + * Description: + * Initialize NAND FLASH + * + ************************************************************************************/ + +#ifdef CONFIG_LPC17_EXTNAND +void open1788_nand_initialize(void); +#endif +#endif /* CONFIG_LPC17_EMC */ + +/************************************************************************************ + * Name: open1788_lcd_initialize + * + * Description: + * Initialize the LCD. Setup backlight (initially off) + * + ************************************************************************************/ + +#ifdef CONFIG_LPC17_LCD +void open1788_lcd_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_OPEN1788_SRC_OPEN1788_H */ diff --git a/configs/open1788/tools/oocd.sh b/configs/open1788/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..e3526c059fbd62a8c36de46d14a5d2c7097be928 --- /dev/null +++ b/configs/open1788/tools/oocd.sh @@ -0,0 +1,57 @@ +#!/bin/sh +# +# See configs/open1788/README.txt for information about +# this file. + +TOPDIR=$1 +USAGE="$0 [-d]" +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +# Assume that OpenOCD was installed and at /usr/local/bin. Uncomment +# the following to run directly from the build directory + +# OPENOCD_PATH="/home/OpenOCD/openocd/src" +# OPENOCD_PATH="/usr/bin" +OPENOCD_PATH="/usr/local/bin" + +# TARGET_PATH="/home/OpenOCD/openocd/tcl" +# TARGET_PATH="/usr/share/openocd/scripts" +TARGET_PATH="/usr/local/share/openocd/scripts" + +# Assume a Unix development environment. Uncomment to use a Windows +# like environment + +OPENOCD_EXE=openocd.exe +# OPENOCD_EXE=openocd + +OPENOCD_CFG="${TOPDIR}/configs/open1788/tools/open1788.cfg" +OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}" + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +if [ ! -d ${OPENOCD_PATH} ]; then + echo "OpenOCD path does not exist: ${OPENOCD_PATH}" + exit 1 +fi +if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then + echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f ${OPENOCD_CFG} ]; then + echo "OpenOCD config file does not exist: ${OPENOCD_CFG}" + exit 1 +fi + +echo "Starting OpenOCD" +cd ${OPENOCD_PATH} || { echo "Failed to CD to ${OPENOCD_PATH}"; exit 1; } +${OPENOCD_EXE} ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" diff --git a/configs/open1788/tools/open1788.cfg b/configs/open1788/tools/open1788.cfg new file mode 100644 index 0000000000000000000000000000000000000000..94c97c3c1b5cf2811b38523541ff19e3d8c8faf1 --- /dev/null +++ b/configs/open1788/tools/open1788.cfg @@ -0,0 +1,166 @@ +### From /usr/local/share/openocd/scripts/interface/olimex-arm-usb-ocd.cfg +# +# Olimex ARM-USB-OCD +# +# http://www.olimex.com/dev/arm-usb-ocd.html +# + +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG A" +ft2232_layout olimex-jtag +ft2232_vid_pid 0x15ba 0x0003 + +### From /usr/local/share/openocd/scripts/targets/lpc1788.cfg +# NXP LPC1788 Cortex-M3 with 512kB Flash and 96kB Local On-Chip SRAM +# remember to place in the same folder as lpc17xx.cfg + +set CHIPNAME lpc1788 +set CPUTAPID 0x4ba00477 +set CPURAMSIZE 0x18000 +set CPUROMSIZE 0x80000 + +# After reset the chip is clocked by the ~4MHz internal RC oscillator. +# When board-specific code (reset-init handler or device firmware) +# configures another oscillator and/or PLL0, set CCLK to match; if +# you don't, then flash erase and write operations may misbehave. +# (The ROM code doing those updates cares about core clock speed...) +# +# CCLK is the core clock frequency in KHz +set CCLK 12000 + +### From /usr/local/share/openocd/scripts/targets/lpc17xx.cfg +### With additions to set the operating frequency to 120MHz +# Common LPC17xx logic + +# LPC17xx chips support both JTAG and SWD transports. +# JTAG is hard-coded in this configuration +# Adapt based on what transport is active. +# source [find target/swj-dp.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + error "_CHIPNAME not set" +} + +# After reset the chip is clocked by the ~4MHz internal RC oscillator. +# When board-specific code (reset-init handler or device firmware) +# configures another oscillator and/or PLL0, set CCLK to match; if +# you don't, then flash erase and write operations may misbehave. +# (The ROM code doing those updates cares about core clock speed...) +# +# CCLK is the core clock frequency in KHz +if { [info exists CCLK] } { + set _CCLK $CCLK +} else { + set _CCLK 4000 +} + +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + error "_CPUTAPID not set" +} + +if { [info exists CPURAMSIZE] } { + set _CPURAMSIZE $CPURAMSIZE +} else { + error "_CPURAMSIZE not set" +} + +if { [info exists CPUROMSIZE] } { + set _CPUROMSIZE $CPUROMSIZE +} else { + error "_CPUROMSIZE not set" +} + +#delays on reset lines +adapter_nsrst_delay 500 +jtag_ntrst_delay 500 + +# Use of JTAG is hard-coded +#swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID +jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME + +# The LPC17xx devices have 8/16/32kB of SRAM In the ARMv7-M "Code" area (at 0x10000000) +$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_CPURAMSIZE + +# The LPC17xx devices have 32/64/128/256/512kB of flash memory, managed by ROM code +# (including a boot loader which verifies the flash exception table's checksum). +# flash bank lpc2000 0 0 [calc checksum] +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME lpc2000 0x0 $_CPUROMSIZE 0 0 $_TARGETNAME \ + lpc1700 $_CCLK calc_checksum + +# Run with *real slow* clock by default since the +# boot rom could have been playing with the PLL, so +# we have no idea what clock the target is running at. +adapter_khz 1000 + +$_TARGETNAME configure -event reset-init { + echo "Going to 120MHz" + + # PLL0CON: Disable PLL + mww 0x400FC080 0x00000000 + # PLLFEED + mww 0x400FC08C 0x000000AA + # PLLFEED + mww 0x400FC08C 0x00000055 + + # CLKSEL: internal 12MHz RC oscillator Div 1. + mww 0x400FC104 0x00000001 + # CLKSRCSEL: Clock source = internal 12MHz RC oscillator + mww 0x400FC10C 0x00000000 + + # PLL0CFG: M=10,P=1 -> PLL=240 MHz + mww 0x400FC084 0x00000009 + # PLLFEED + mww 0x400FC08C 0x000000AA + # PLLFEED + mww 0x400FC08C 0x00000055 + + # PLL0CON: Enable PLL + mww 0x400FC080 0x00000001 + # PLLFEED + mww 0x400FC08C 0x000000AA + # PLLFEED + mww 0x400FC08C 0x00000055 + + sleep 50 + + # PLL0CON: Connect PLL + # CCLKSEL=PLLED(240MHz)/2 (=120 MHz) + mww 0x400FC104 0x00000102 + # PLLFEED + mww 0x400FC08C 0x000000AA + # PLLFEED + mww 0x400FC08C 0x00000055 + + # Dividing CPU clock by 8 should be pretty conservative + # + # + adapter_khz 1500 + + # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select + # "User Flash Mode" where interrupt vectors are _not_ remapped, + # and reside in flash instead). + # + # See Table 612. Memory Mapping Control register (MEMMAP - 0x400F C040) bit description + # Bit Symbol Value Description Reset + # value + # 0 MAP Memory map control. 0 + # 0 Boot mode. A portion of the Boot ROM is mapped to address 0. + # 1 User mode. The on-chip Flash memory is mapped to address 0. + # 31:1 - Reserved. The value read from a reserved bit is not defined. NA + # + # http://ics.nxp.com/support/documents/microcontrollers/?scope=LPC1768&type=user + + mww 0x400FC040 0x01 +} + +# if srst is not fitted use VECTRESET to +# perform a soft reset - SYSRESETREQ is not supported +cortex_m3 reset_config vectreset diff --git a/configs/p112/Kconfig b/configs/p112/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/p112/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/p112/README.txt b/configs/p112/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..0d5e8ea29d8b78830d2bf05d1486f2bce31dc892 --- /dev/null +++ b/configs/p112/README.txt @@ -0,0 +1,153 @@ +P112 README +=========== + +The P112 is notable because it was the first of the hobbyist single board +computers to reach the production stage. The P112 hobbyist computers +were relatively widespread and inspired other hobbyist centered home brew +computing projects such as N8VEM home brew computing project. The P112 +project still maintains many devoted enthusiasts and has an online +repository of software and other information. + +The P112 computer originated as a commercial product of "D-X Designs Pty +Ltd" of Australia. They describe the computer as "The P112 is a stand-alone +8-bit CPU board. Typically running CP/M (tm) or a similar operating system, +it provides a Z80182 (Z-80 upgrade) CPU with up to 1MB of memory, serial, +parallel and diskette IO, and realtime clock, in a 3.5-inch drive form factor. +Powered solely from 5V, it draws 150mA (nominal: not including disk drives) +with a 16MHz CPU clock. Clock speeds up to 24.576MHz are possible." + +The P112 board was last available new in 1996 by Dave Brooks. In late 2004 +on the Usenet Newsgroup comp.os.cpm, talk about making another run of P112 +boards was discussed. David Griffith decided to produce additional P112 kits +with Dave Brooks blessing and the assistance of others. In addition Terry +Gulczynski makes additional P112 derivative hobbyist home brew computers. +Hal Bower was very active in the mid 1990's on the P112 project and ported +the "Banked/Portable BIOS". + +Dave Griffith was successfully funded through Kickstarter for another run +of P112 boards in November of 2012. + +Pin Configuration +================= + +The P112 is based on the 5V Z8018216FSG running at 16MHz. The Z8018216FSG +comes in a 100-pin QFP package: + +PIN NAME + 1 /INT0 INT0, pulled up, J1 DIN48 pin 13C + 2 /INT1/PC6 FINTR, Floppy disk controller + 3 /INT2/PC7 PINTR1, Floppy disk controller + 4 ST ST, to AEN of Floppy disk controller + 5 A0 A0-A12 Common memory bus + ... + 17 A12 " " + 18 VSS --- + 19 A13 A13-A17 Common memory bus + ... + 23 A17 " " + 24 A18/TOUT A18 Common memory bus + 25 VDD --- + 26 A19 A19 Common memory bus + 27 D0 D0-D4 Common memory bus + ... + 30 D3 " " + + 31 D4 D4-D7 Common memory bus + ... + 34 D7 " " + 35 /RTS0/PB0 RTS0, 20-pin P14, pin 3 + 36 /CTS0/PB1 CTS0, pulled high (U16), 20-pin P14, pin 4 + 37 /DCD0/PB2 DCD0, pulled high (U16), 20-pin P14, pin 10 + 38 TXA0/PB3 TXA0, 20-pin P14, pin 8 + 39 RXA0/PB4 RXA0, pulled high (U17), 20-pin P14, pin 2 + 40 TXA1/PB5 TXA1, 20-pin P14, pin 1 + 41 RXA1/PB6 RXA1, pulled high (U17), 20-pin P14, pin 9 + 42 RXS//CTS1/PB7 CTS1, pulled high (U17), 20-pin P14, pin 7 + 43 CKA0//DREQ0 /DREQ0, DMA Request Select, 5-pin P2, pin 2 + 44 VSS --- + 45 CKA1//TEND0 /TEND0, J1 DIN48 pin 14A + 46 TXS//DTR//REQB//HINTR DTRB, 20-pin P14, pin 6 + 47 CKS//W//REQB//HTXRDY SIORQ, DMA Request Select, 5-pin P2, pin 5 (may be DREQ 0 or DREQ1) + 48 /DREQ1 /DREQ1, DMA Request Select, 5-pin P2, pin 4 + 49 VDD --- + 50 /TEND1//RTSB//HRXRDY NB /TEND1 = RTSB, 20-pin P14, pin 5; J1 DIN48 pin 14B + + 51 /RAMCS /RAMCS, Chip select logic (U11B); also J1 DIN48 pin 9B + 52 /ROMCS /ROMCS, Chip select logic (P2); also J1 DIN48 pin 12B + 53 EV1 Grounded + 54 EV2 Grounded + 55 PA0/HD0 IO, U6 DS1202 Serial Timekeeping chip + 56 PA1/HD1 CLK, U6 DS1202 Serial Timekeeping chip + 57 PA2/HD2 /RST, U6 DS1202 Serial Timekeeping chip + 58 PA3/HD3 N/C + 59 PA4/HD4 N/C + 60 PA5/HD5 U12 NMF0512S, Isolated 1W regulated single output DC/DC converter + 61 PA6/HD6 DSR, U7 LT1133, Advanced Low Power 5V RS232 Driver/Receiver + 62 PA7/HD7 RTS, U7 LT1133, Advanced Low Power 5V RS232 Driver/Receiver + 63 /W//REQA/PC5 WREQA, N/C + 64 /DTR//REQA/PC3 DTRA, U7 LT1133, Advanced Low Power 5V RS232 Driver/Receiver + 65 /MWR/PC2//RTSA /MWR, Common memory bus signal + 66 /CTSA/PC1 CTSA, U7 LT1133, Advanced Low Power 5V RS232 Driver/Receiver + 67 /DCDA/PC0 DCDA, U7 LT1133, Advanced Low Power 5V RS232 Driver/Receiver + 68 /SYNCA/PC4 SYNCA, U7 LT1133, Advanced Low Power 5V RS232 Driver/Receiver + 69 /RTXCA ? + 70 VSS --- + 71 /IOCS/IEO /IOCS, Logic circuit with M1, generates LIVE which conditions inputs + to the floppy disk controller + 72 IEI IEI, J1 DIN48 pin 14C + 73 VDD --- + 74 RXDA RXDA, U7 LT1133, Advanced Low Power 5V RS232 Driver/Receiver + 75 /TRXCA ? + 76 TXDA TXDA, U7 LT1133, Advanced Low Power 5V RS232 Driver/Receiver + 77 /DCDB//HRD DCDB, pulled high (U16), 20-pin P14, pin 12 + 78 /CTSB//HWR DCDB, pulled high (U17), 20-pin P14, pin 11 + 79 TXDB//HDDIS TXDB, 20-pin P14, pin 14 + 80 /TRXCB/HA0 TRXCB, pulled high (U17), 20-pin P14, pin 15 + + 81 RXDB/HA1 RXDB, pulled high (U16), 20-pin P14, pin 16 + 82 /RTXCB/HA2 RTXCB, pulled high (U17), 20-pin P14, pin 17 + 83 /SYNCB//HCS SYNCB, pulled high (U16), 20-pin P14, pin 18 + 84 /HALT ? + 85 /RFSH ? + 86 /IORQ /IORQ, J1 DIN48 pin 12A + 87 /MRD//MREQ /MRD, Common memory bus signal + 88 E E, Conditions inputs to floppy disk controller; also J1 DIN48 pin 13B + 89 /M1 /M1, Logic circuit with /IOCS, generates LIVE which conditions inputs + to the floppy disk controller; also J1 DIN48 pin 11A + 90 /WR /WR, Common memory bus; Conditions inputs to floppy disk controller; + also J1 DIN48 pin 12C + 91 /RD /RD, J1 DIN48 pin 11C + 92 PHI PHI, J1 DIN48 pin 15B + 93 VSS --- + 94 XTAL 16 MHz XTAL + 95 EXTAL 16 MHz XTAL + 96 /WAIT /WAIT, J1 DIN48 pin 11B + 97 /BUSACK ? + 98 /BUSREQ /BUSREQ, Pulled high + 99 /RESET /RST (to lots of places) +100 /NMI /NMI, Pulled high + +P112 Serial Console +=================== + +The UARTs are not used on the P112 board (the UART signals are avaiable off-board through P14). +The serial console is provided by U7 LT1133, Advanced Low Power 5V RS232 Driver/Receiver +that connects to the P112 via the Z85230 ESCC channel A. + +Status +====== + +2014-8-22: After some time idling away, I tried rebuilding with Windows 8, the latest MinGW +and the latest SDCC. I fixed a few things but there a still a few issues. The last "show +stopper" before I gave up for now was during building dependencies: + +ASlink-Error- : "bin/mm_initialize.rel" + +Clearly there is something wrong with the command line options given to SDCC because it is +trying to compile and link when we really only want dependencies. I did not spend very much +time trying to solve the problem; I assume that it is not too difficult. + +2014-9-15: There has been a lot of change to the address environment APIs with the inegration +of address environments on the Cortex-A. It is likely that there is some breakage due to +incompatibilities with the Z180's mini-MMU. + diff --git a/configs/p112/include/board.h b/configs/p112/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..4d86c20cc193e9c2b207a0a454cff25131cfe0f1 --- /dev/null +++ b/configs/p112/include/board.h @@ -0,0 +1,66 @@ +/**************************************************************************** + * configs/p112/include/board.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_P112_INCLUDE_BOARD_H +#define __CONFIGS_P112_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* The Z180 is driven by a 16MHz crystal. The system clock + * is equal to the crystal frequency. + */ + +#define Z180_BOARD_XTAL 16000000 /* 16 MHz */ +#define Z180_SYSCLOCK Z180_BOARD_XTAL /* 16 MHz */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#if defined(__cplusplus) +extern "C" +{ +#endif + +#if defined(__cplusplus) +} +#endif + +#endif /* __CONFIGS_P112_INCLUDE_BOARD_H */ diff --git a/configs/p112/ostest/Make.defs b/configs/p112/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..1529640fafd49b5535efd7c692ab17da3abbb80a --- /dev/null +++ b/configs/p112/ostest/Make.defs @@ -0,0 +1,170 @@ +############################################################################ +# configs/p112/ostest/Make.defs +# +# Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +# These are the directories where the SDCC toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + SDCC_INSTALLDIR = C:\PROGRA~2\SDCC + SDCC_BINDIR = $(SDCC_INSTALLDIR)\bin + SDCC_LIBDIR = $(SDCC_INSTALLDIR)\lib\z180 +else + SDCC_INSTALLDIR = /usr/local + SDCC_BINDIR = $(SDCC_INSTALLDIR)/bin + SDCC_LIBDIR = $(SDCC_INSTALLDIR)/share/sdcc/lib/z180 +endif + +CROSSDEV = +CC = sdcc +CPP = sdcpp +LD = sdldz80 +AS = sdasz80 +AR = sdar -r +ARCHCPUFLAGS = -mz180 + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = --debug +else + ARCHOPTIMIZATION = +endif + +ARCHPICFLAGS = +ARCHWARNINGS = +ARCHDEFINES = +ARCHINCLUDES = -I. -I$(TOPDIR)$(DELIM)include + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = -x -a -l -o -s -g + +SDCCLIB = z180.lib + +ASMEXT = .asm +# OBJEXT = .o +OBJEXT = .rel +LIBEXT = .lib +EXEEXT = .hex + +# Custom ASSEMBLE definition. The most common toolchain, GCC, uses the +# compiler to assemble files because this has the advantage of running the C +# Pre-Processor against. This is not possible with other SDCC; we need to +# define AS and over-ride the common definition in order to use the assembler +# directly. + +define ASSEMBLE + @echo "AS: $1" + $(Q) $(AS) $(AFLAGS) $2 $1 +endef + +# Custom CLEAN definition + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) +define CLEAN + $(Q) if exist *.o (del /f /q *.o) + $(Q) if exist *.asm (del /f /q *.asm) + $(Q) if exist *.rel (del /f /q *.rel) + $(Q) if exist *.lst (del /f /q *.lst) + $(Q) if exist *.rst (del /f /q *.rst) + $(Q) if exist *.sym (del /f /q *.sym) + $(Q) if exist *.adb (del /f /q *.adb) + $(Q) if exist *.lnk (del /f /q *.lnk) + $(Q) if exist *.map (del /f /q *.map) + $(Q) if exist *.mem (del /f /q *.mem) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.cmd (del /f /q *.cmd) +endef +else +define CLEAN + $(Q) rm -f *.o *.asm *.rel *.lst *.rst *.sym *.adb *.lnk *.map *.mem *.hex *.cmd +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) +# You may need to customize the binary name: +# HOSTCC = mingw32-gcc.exe + HOSTCC = x86_64-w64-mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative # --dep-debug + + # Use NTFS links or directory copies + +ifeq ($(CONFIG_WINDOWS_MKLINK),y) + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)link.bat +else + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.bat +endif +DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.bat + +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + + # SDCC for Linux, OSX, or Cygwin understands symbolic links. Windows SDCC + # running under Cygwin does not + +ifeq ($(WINTOOL),y) + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh +else + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)link.sh +endif +DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + +endif diff --git a/configs/p112/ostest/defconfig b/configs/p112/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..4e2ebbff0839dba585f7d18b62b4b4800ba9e4e0 --- /dev/null +++ b/configs/p112/ostest/defconfig @@ -0,0 +1,518 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +CONFIG_WINDOWS_NATIVE=y +# CONFIG_WINDOWS_CYGWIN is not set +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set +# CONFIG_WINDOWS_MKLINK is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="..\apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_DEBUG_SYMBOLS is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="z180" +CONFIG_BOARD_LOOPSPERMSEC=100 +# CONFIG_ARCH_CHIP_Z80 is not set +# CONFIG_ARCH_CHIP_Z8018006VSG is not set +# CONFIG_ARCH_CHIP_Z8018010VSG is not set +# CONFIG_ARCH_CHIP_Z8018008VSG is not set +# CONFIG_ARCH_CHIP_Z8018010FSG is not set +# CONFIG_ARCH_CHIP_Z8018008VEG is not set +# CONFIG_ARCH_CHIP_Z8018006VEG is not set +# CONFIG_ARCH_CHIP_Z8018006PSG is not set +# CONFIG_ARCH_CHIP_Z8018008FSG is not set +# CONFIG_ARCH_CHIP_Z8018010PSG is not set +# CONFIG_ARCH_CHIP_Z8018006PEG is not set +# CONFIG_ARCH_CHIP_Z8018010VEG is not set +# CONFIG_ARCH_CHIP_Z8018010PEG is not set +# CONFIG_ARCH_CHIP_Z8018008PSG is not set +# CONFIG_ARCH_CHIP_Z8018006FSG is not set +# CONFIG_ARCH_CHIP_Z8018000XSO is not set +# CONFIG_ARCH_CHIP_Z8018010FEG is not set +# CONFIG_ARCH_CHIP_Z8018000WSO is not set +# CONFIG_ARCH_CHIP_Z8018008PEG is not set +# CONFIG_ARCH_CHIP_Z8018110FEG is not set +# CONFIG_ARCH_CHIP_Z8018233FSG is not set +# CONFIG_ARCH_CHIP_Z8018220AEG is not set +CONFIG_ARCH_CHIP_Z8018216FSG=y +# CONFIG_ARCH_CHIP_Z8018216ASG is not set +# CONFIG_ARCH_CHIP_Z8018233ASG is not set +# CONFIG_ARCH_CHIP_Z8019520FSG is not set +# CONFIG_ARCH_CHIP_Z8019533FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020VSG is not set +# CONFIG_ARCH_CHIP_Z8L18020FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020PSG is not set +# CONFIG_ARCH_CHIP_Z8L18220ASG is not set +# CONFIG_ARCH_CHIP_Z8L18220FSG is not set +# CONFIG_ARCH_CHIP_Z8L18220AEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG1960 is not set +# CONFIG_ARCH_CHIP_Z8S18033VSG is not set +# CONFIG_ARCH_CHIP_Z8S18010FSG is not set +# CONFIG_ARCH_CHIP_Z8S18010VEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020PSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FEG is not set +# CONFIG_ARCH_CHIP_Z8S18020FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PSG is not set +# CONFIG_ARCH_CHIP_Z8S18020FEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PEG is not set +# CONFIG_ARCH_CHIP_Z8S18010FEG is not set +# CONFIG_ARCH_CHIP_Z8F6403 is not set +# CONFIG_ARCH_CHIP_Z8F6423 is not set +# CONFIG_ARCH_CHIP_EZ80F91 is not set +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +CONFIG_ARCH_CHIP_Z180=y +CONFIG_ARCH_CHIP_Z80182=y +CONFIG_HAVE_LOWSERIALINIT=y +CONFIG_LINKER_HOME_AREA=0x0000 +CONFIG_LINKER_CODE_AREA=0x0200 +CONFIG_LINKER_DATA_AREA=0x8000 +# CONFIG_LINKER_ROM_AT_0000 is not set +# CONFIG_ARCH_HAVEHEAD is not set +# CONFIG_Z180_TOOLCHAIN_SDCCL is not set +CONFIG_Z180_TOOLCHAIN_SDCCW=y +CONFIG_Z180_BANKAREA_VIRTBASE=0x8000 +CONFIG_Z180_BANKAREA_PHYSBASE=0x08000 +CONFIG_Z180_COMMON1AREA_VIRTBASE=0xc000 +CONFIG_Z180_PHYSHEAP_START=0x0c000 +CONFIG_Z180_PHYSHEAP_END=0x100000 + +# +# Z180 Peripheral Support +# +# CONFIG_Z180_UART0 is not set +# CONFIG_Z180_UART1 is not set +CONFIG_Z180_ESCCA=y +# CONFIG_Z180_ESCCB is not set +# CONFIG_Z180_PRT1 is not set +# CONFIG_Z180_PORTA is not set +# CONFIG_Z180_PORTB is not set +# CONFIG_Z180_MIMIC is not set +CONFIG_Z180_ESCCA_SERIAL_CONSOLE=y + +# +# ESCC Channel A Configuration +# +CONFIG_Z180_ESCCA_RXBUFSIZE=64 +CONFIG_Z180_ESCCA_TXBUFSIZE=64 +CONFIG_Z180_ESCCA_BAUD=9600 +CONFIG_Z180_ESCCA_BITS=8 +CONFIG_Z180_ESCCA_PARITY=0 +CONFIG_Z180_ESCCA_2STOP=0 + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_ADDRENV=y +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set + +# +# Board Settings +# +CONFIG_RAM_START=0x0000 +CONFIG_RAM_SIZE=65536 + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_P112=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="p112" + +# +# Common Board Options +# + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_USEC_PER_TICK=10000 +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=21 +# CONFIG_DEV_CONSOLE is not set +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_ENVIRON=y +CONFIG_DISABLE_POLL=y + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=8 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=0 +CONFIG_NFILE_STREAMS=0 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 + +# +# Device Drivers +# +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_PWM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_FS_RAMMAP is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +CONFIG_GRAN=y +CONFIG_GRAN_SINGLE=y +# CONFIG_GRAN_INTR is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Named Applications +# +# CONFIG_BUILTIN is not set + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_COMPOSITE is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=1024 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=4 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WLAN is not set + +# +# Interpreters +# + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# ModBus +# + +# +# FreeModbus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# System NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# diff --git a/configs/p112/ostest/setenv.bat b/configs/p112/ostest/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..01eb774dd56a2a6b296cf7723883fb12bf63b71d --- /dev/null +++ b/configs/p112/ostest/setenv.bat @@ -0,0 +1,51 @@ +@echo off + +rem configs/p112/ostest/setenv.bat +rem +rem Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the SDCC toolchain for windows. + +rem set PATH=C:\Program Files (x86)\SDCC/bin;%PATH% +set PATH=C:\Program Files\SDCC/bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% +echo %PATH% diff --git a/configs/p112/scripts/setenv.bat b/configs/p112/scripts/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..dc214445f181ed7ae28e1ba5e14a4448545af620 --- /dev/null +++ b/configs/p112/scripts/setenv.bat @@ -0,0 +1,50 @@ +@echo off + +rem configs/p112/scripts/setenv.bat +rem +rem Copyright (C) 2012 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the SDCC toolchain for windows. + +set PATH=C:\Program Files (x86)\SDCC/bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% +echo %PATH% diff --git a/configs/p112/scripts/setenv.sh b/configs/p112/scripts/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c55027d62296763cec321810de62ac9f57e097b6 --- /dev/null +++ b/configs/p112/scripts/setenv.sh @@ -0,0 +1,66 @@ +#!/bin/bash +# configs/p112/ostest/setenv.sh +# +# Copyright (C) 2007, 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# +# This is the normal installation directory for SDCC under Linux, OSX +# or Linux: +# +export TOOLCHAIN_BIN=/usr/local/bin + +# +# This is the normal installation directory for SDCC under Windows +# +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/SDCC/bin" + +# +# Add the path to the toolchain to the PATH varialble +# +export PATH="${TOOLCHAIN_BIN}":/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/p112/src/.gitignore b/configs/p112/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/p112/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/p112/src/Makefile b/configs/p112/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..57e263690b67e0957f18860d89fdaf0ac297e1bc --- /dev/null +++ b/configs/p112/src/Makefile @@ -0,0 +1,41 @@ +############################################################################ +# configs/p112/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/pcblogic-pic32mx/Kconfig b/configs/pcblogic-pic32mx/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/pcblogic-pic32mx/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/pcblogic-pic32mx/README.txt b/configs/pcblogic-pic32mx/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..50657c8cb1e42b066bde8540a2e712559127e3e1 --- /dev/null +++ b/configs/pcblogic-pic32mx/README.txt @@ -0,0 +1,641 @@ +configs/pic32mx README +===================== + + This README file discusses the port of NuttX to the PIC32MX board from + PCB Logic Design Co. This board features the MicroChip PIC32MX460F512L. + The board is a very simple -- little more than a carrier for the PIC32 + MCU plus voltage regulation, debug interface, and an OTG connector. + +Contents +======== + + PIC32MX460F512L Pin Out + MAX3232 Connection + Toolchains + Loading NuttX with PICkit2 + LCD1602 + PIC32MX Configuration Options + Configurations + +PIC32MX460F512L Pin Out +======================= + + PIC32MX460F512L 100-Pin TQFP (USB) Pin Out. The mapping to the pins on + the PCL Logic board are very simple, each pin is brought out to a connector + label with the PIC32MX460F512L pin number. + + On board logic only manages power, crystal, and USB signals. + + LEFT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) + PIN NAME + ---- ---------------------------- + 1 RG15 + 2 Vdd + 3 PMD5/RE5 + 4 PMD6/RE6 + 5 PMD7/RE7 + 6 T2CK/RC1 + 7 T3CK/RC2 + 8 T4CK/RC3 + 9 T5CK/SDI1/RC4 + 10 SCK2/PMA5/CN8/RG6 + 11 SDI2/PMA4/CN9/RG7 + 12 SDO2/PMA3/CN10/RG8 + 13 MCLR + 14 SS2/PMA2/CN11/RG9 + 15 Vss + 16 Vdd + 17 TMS/RA0 + 18 INT1/RE8 + 19 INT2/RE9 + 20 AN5/C1IN+/VBUSON/CN7/RB5 + 21 AN4/C1IN-/CN6/RB4 + 22 AN3/C2IN+/CN5/RB3 + 23 AN2/C2IN-/CN4/RB2 + 24 PGEC1/AN1/CN3/RB1 + 25 PGED1/AN0/CN2/RB0 + + BOTTOM SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) + PIN NAME + ---- ---------------------------- + 26 PGEC2/AN6/OCFA/RB6 + 27 PGED2/AN7/RB7 + 28 VREF-/CVREF-/PMA7/RA9 + 29 VREF+/CVREF+/PMA6/RA10 + 30 AVdd + 31 AVss + 32 AN8/C1OUT/RB8 + 33 AN9/C2OUT/RB9 + 34 AN10/CVREFOUT/PMA13/RB10 + 35 AN11/PMA12/RB11 + 36 Vss + 37 Vdd + 38 TCK/RA1 + 39 U2RTS/RF13 + 40 U2CTS/RF12 + 41 AN12/PMA11/RB12 + 42 AN13/PMA10/RB13 + 43 AN14/PMALH/PMA1/RB14 + 44 AN15/OCFB/PMALL/PMA0/CN12/RB15 + 45 Vss + 46 Vdd + 47 U1CTS/CN20/RD14 + 48 U1RTS/CN21/RD15 + 49 U2RX/PMA9/CN17/RF4 + 50 U2TX/PMA8/CN18/RF5 + + RIGHT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) + PIN NAME + ---- ---------------------------- + 75 Vss + 74 SOSCO/T1CK/CN0/RC14 + 73 SOSCI/CN1/RC13 + 72 SDO1/OC1/INT0/RD0 + 71 IC4/PMCS1/PMA14/RD11 + 70 SCK1/IC3/PMCS2/PMA15/RD10 + 69 SS1/IC2/RD9 + 68 RTCC/IC1/RD8 + 67 SDA1/INT4/RA15 + 66 SCL1/INT3/RA14 + 65 Vss + 64 OSC2/CLKO/RC15 + 63 OSC1/CLKI/RC12 + 62 Vdd + 61 TDO/RA5 + 60 TDI/RA4 + 59 SDA2/RA3 + 58 SCL2/RA2 + 57 D+/RG2 + 56 D-/RG3 + 55 VUSB + 54 VBUS + 53 U1TX/RF8 + 52 U1RX/RF2 + 51 USBID/RF3 + + TOP SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) + PIN NAME + ---- ---------------------------- + 100 PMD4/RE4 + 99 PMD3/RE3 + 98 PMD2/RE2 + 97 TRD0/RG13 + 96 TRD1/RG12 + 95 TRD2/RG14 + 94 PMD1/RE1 + 93 PMD0/RE0 + 92 TRD3/RA7 + 91 TRCLK/RA6 + 90 PMD8/RG0 + 89 PMD9/RG1 + 88 PMD10/RF1 + 87 PMD11/RF0 + 86 ENVREG + 85 Vcap/Vddcore + 84 PMD15/CN16/RD7 + 83 PMD14/CN15/RD6 + 82 PMRD/CN14/RD5 + 81 OC5/PMWR/CN13/RD4 + 80 PMD13/CN19/RD13 + 79 IC5/PMD12/RD12 + 78 OC4/RD3 + 77 OC3/RD2 + 76 OC2/RD1 + + Additional Signals available from the board: + + PROGRAM CONNECTOR: Vpp Vdd GND PGED1 PGEC1 NC PGED2 PGEC2 + POWER POINTS: +5Vin +3.3V AVdd AGND Vdd GND USB+5V + +MAX3232 Connection +================== + + I use a tiny, MAX3232 board that I got from the eBay made by NKC + Electronics (http://www.nkcelectronics.com/). As of this writing, it + is also available here: http://www.nkcelectronics.com/rs232-to-ttl-3v--55v-convert232356.html + + CTS -- Not connected + RTS -- Not connected + TX -- Pin 53: U1TX/RF8 + RX -- Pin 52: U1RX/RF2 + GND -- POWER POINT: GND + Vcc -- POWER POINT: Vdd (3.3V) -- Or P32_VBUS (+5V) + Or +5V from a USB PC port. + +Toolchains +========== + + MPLAB/C32 + --------- + + I am using the free, "Lite" version of the PIC32MX toolchain available + for download from the microchip.com web site. I am using the Windows + version. The MicroChip toolchain is the only toolchain currently + supported in these configurations, but it should be a simple matter to + adapt to other toolchains by modifying the Make.defs file include in + each configuration. + + C32 Toolchain Options: + + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW - MicroChip full toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL - MicroChip full toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE - MicroChip "Lite" toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_LITE - MicroChip "Lite" toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_PINGUINOL - Pinquino toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_PINGUINOW - Pinquino toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPOPENL - Microchip open toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_GNU_ELF - General mips-elf toolchain for Linux + + NOTE: The "Lite" versions of the toolchain does not support C++. Also + certain optimization levels are not supported by the "Lite" toolchain. + + MicrochipOpen + ------------- + + An alternative, build-it-yourself toolchain is available here: + http://sourceforge.net/projects/microchipopen/ . These tools were + last updated circa 2010. NOTE: C++ support still not available + in this toolchain. + + Building MicrochipOpen (on Linux) + + 1) Get the build script from this location: + + http://microchipopen.svn.sourceforge.net/viewvc/microchipopen/ccompiler4pic32/buildscripts/trunk/ + + 2) Build the code using the build script, for example: + + ./build.sh -b v105_freeze + + This will check out the selected branch and build the tools. + + 3) Binaries will then be available in a subdirectory with a name something like + pic32-v105-freeze-20120622/install-image/bin (depending on the current data + and the branch that you selected. + + Note that the tools will have the prefix, mypic32- so, for example, the + compiler will be called mypic32-gcc. + + Pinguino mips-elf Toolchain + --------------------------- + + Another option is the mips-elf toolchain used with the Pinguino project. This + is a relatively current mips-elf GCC and should provide free C++ support as + well. This toolchain can be downloded from the Pinguino website: + http://wiki.pinguino.cc/index.php/Main_Page#Download . There is some general + information about using the Pinguino mips-elf toolchain in this thread: + https://groups.yahoo.com/neo/groups/nuttx/conversations/messages/1821 + + See also configs/mirtoo/README.txt. There is an experimental (untested) + configuration for the Mirtoo platform in that directory. + + MPLAB/C32 vs MPLABX/X32 + ----------------------- + + It appears that Microchip is phasing out the MPLAB/C32 toolchain and replacing + it with MPLABX and XC32. At present, the XC32 toolchain is *not* compatible + with the NuttX build scripts. Here are some of the issues that I see when trying + to build with XC32: + + 1) Make.def changes: You have to change the tool prefix: + + CROSSDEV=xc32- + + 2) debug.ld/release.ld: The like expect some things that are not present in + the current linker scripts (or are expected with different names). Here + are some partial fixes: + + Rename: kseg0_progmem to kseg0_program_mem + Rename: kseg1_datamem to kseg1_data_mem + + Even then, there are more warnings from the linker and some undefined symbols + for non-NuttX code that resides in the unused Microchip libraries. See this + email thread at https://groups.yahoo.com/neo/groups/nuttx/conversations/messages/1458 for more + information. You will have to solve at least this undefined symbol problem if + you want to used the XC32 toolchain. + + Windows Native Toolchains + ------------------------- + + NOTE: There are several limitations to using a Windows based toolchain in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + +Loading NuttX with PICkit2 +========================== + + NOTE: You need a PICKit3 if you plan to use the MPLAB debugger! The PICKit2 + can, however, still be used to load programs. Instructions for the PICKit3 + are similar. + + Intel Hex Forma Files: + ---------------------- + + When NuttX is built it will produce two files in the top-level NuttX + directory: + + 1) nuttx - This is an ELF file, and + 2) nuttx.hex - This is an Intel Hex format file. This is controlled by + the setting CONFIG_INTELHEX_BINARY in the .config file. + + The PICkit tool wants an Intel Hex format file to burn into FLASH. However, + there is a problem with the generated nutt.hex: The tool expects the nuttx.hex + file to contain physical addresses. But the nuttx.hex file generated from the + top-level make will have address in the KSEG0 and KSEG1 regions. + + tools/pic32mx/mkpichex: + ---------------------- + + There is a simple tool in the NuttX tools/pic32mx directory that can be + used to solve both issues with the nuttx.hex file. But, first, you must + build the tool: + + cd tools/pic32mx + make + + Now you will have an excecutable file call mkpichex (or mkpichex.exe on + Cygwin). This program will take the nutt.hex file as an input, it will + convert all of the KSEG0 and KSEG1 addresses to physical address, and + it will write the modified file, replacing the original nuttx.hex. + + To use this file, you need to do the following things: + + . ./setenv.sh # Source setenv.sh. Among other this, this script + # will add the NuttX tools/pic32mx directory to your + # PATH variable + make # Build nuttx and nuttx.hex + mkpichex $PWD # Convert addresses in nuttx.hex. $PWD is the path + # to the top-level build directory. It is the only + # required input to mkpichex. +LCD1602 +======= + The LCD1602 is an HD4478OU-based LCD from Wave share. The function + up_lcd1602_initialize() initializes the LCD1602 hardware and registers the + SLCD character driver as /dev/lcd1602. See include/nuttx/lcd/hd4478ou.h + + LCD pin mapping: + + ----------------------------------- ---------- ---------------------------------- + PIC32 LCD1602 PCBLogic PIN + PIN SIGNAL NAME PIN NAME(s) + ----------------------------------- ---------- ---------------------------------- + 1. Vss --> Powerpoint GND + 2. Vdd --> Powerpoint USB+5V + 3. Vee N/C To ground via 10K potentiometer + 44 AN15/OCFB/PMALL/PMA0/CN12/RB15 4. RS 4 PMA0, Selects registers + 82 PMRD/CN14/RD5 5. RW 82 PMRD/PMWR, Selects read or write + 81 OC5/PMWR/CN13/RD4 6. E 81 PMENB, Starts data read/write + 93 PMD0/RE0 7. D0 93 PMD0 + 94 PMD1/RE1 8. D1 94 PMD1 + 98 PMD2/RE2 9. D2 98 PMD2 + 99 PMD3/RE3 10. D3 99 PMD3 + 100 PMD4/RE4 11. D4 100 PMD4 + 3 PMD5/RE5 12. D5 3 PMD5 + 4 PMD6/RE6 13. D6 4 PMD6 + 5 PMD7/RE7 14. D7 5 PMD7 + 15. A N/C To Vcc (5V) via 10K potentiometer + 16. K --> Powerpoint GND + ----------------------------------- ---------- ---------------------------------- + +PIC32MX Configuration Options +============================= + + General Architecture Settings: + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=mips + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_MIPS=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_MIPS32=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=pic32mx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_PIC32MX460F512L=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=pcblogic-pic32mx + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_PCBLOGICPIC32MX=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0xa0000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + PIC32MX Configuration + + CONFIG_PIC32MX_MVEC - Select muli- vs. single-vectored interrupts + + Individual subsystems can be enabled: + + CONFIG_PIC32MX_WDT - Watchdog timer + CONFIG_PIC32MX_T2 - Timer 2 (Timer 1 is the system time and always enabled) + CONFIG_PIC32MX_T3 - Timer 3 + CONFIG_PIC32MX_T4 - Timer 4 + CONFIG_PIC32MX_T5 - Timer 5 + CONFIG_PIC32MX_IC1 - Input Capture 1 + CONFIG_PIC32MX_IC2 - Input Capture 2 + CONFIG_PIC32MX_IC3 - Input Capture 3 + CONFIG_PIC32MX_IC4 - Input Capture 4 + CONFIG_PIC32MX_IC5 - Input Capture 5 + CONFIG_PIC32MX_OC1 - Output Compare 1 + CONFIG_PIC32MX_OC2 - Output Compare 2 + CONFIG_PIC32MX_OC3 - Output Compare 3 + CONFIG_PIC32MX_OC4 - Output Compare 4 + CONFIG_PIC32MX_OC5 - Output Compare 5 + CONFIG_PIC32MX_I2C1 - I2C 1 + CONFIG_PIC32MX_I2C2 - I2C 2 + CONFIG_PIC32MX_SPI1 - SPI 1 + CONFIG_PIC32MX_SPI2 - SPI 2 + CONFIG_PIC32MX_UART1 - UART 1 + CONFIG_PIC32MX_UART2 - UART 2 + CONFIG_PIC32MX_ADC - ADC 1 + CONFIG_PIC32MX_PMP - Parallel Master Port + CONFIG_PIC32MX_CM1 - Comparator 1 + CONFIG_PIC32MX_CM2 - Comparator 2 + CONFIG_PIC32MX_RTCC - Real-Time Clock and Calendar + CONFIG_PIC32MX_DMA - DMA + CONFIG_PIC32MX_FLASH - FLASH + CONFIG_PIC32MX_USBDEV - USB device + CONFIG_PIC32MX_USBHOST - USB host + + PIC32MX Configuration Settings + DEVCFG0: + CONFIG_PIC32MX_DEBUGGER - Background Debugger Enable. Default 3 (disabled). The + value 2 enables. + CONFIG_PIC32MX_ICESEL - In-Circuit Emulator/Debugger Communication Channel Select + Default 1 (PG2) + CONFIG_PIC32MX_PROGFLASHWP - Program FLASH write protect. Default 0xff (disabled) + CONFIG_PIC32MX_BOOTFLASHWP - Default 1 (disabled) + CONFIG_PIC32MX_CODEWP - Default 1 (disabled) + DEVCFG1: (All settings determined by selections in board.h) + DEVCFG2: (All settings determined by selections in board.h) + DEVCFG3: + CONFIG_PIC32MX_USBIDO - USB USBID Selection. Default 1 if USB enabled + (USBID pin is controlled by the USB module), but 0 (GPIO) otherwise. + CONFIG_PIC32MX_VBUSIO - USB VBUSON Selection (Default 1 if USB enabled + (VBUSON pin is controlled by the USB module, but 0 (GPIO) otherwise. + CONFIG_PIC32MX_WDENABLE - Enabled watchdog on power up. Default 0 (watchdog + can be enabled later by software). + + The priority of interrupts may be specified. The value ranage of + priority is 4-31. The default (16) will be used if these any of these + are undefined. + + CONFIG_PIC32MX_CTPRIO - Core Timer Interrupt + CONFIG_PIC32MX_CS0PRIO - Core Software Interrupt 0 + CONFIG_PIC32MX_CS1PRIO - Core Software Interrupt 1 + CONFIG_PIC32MX_INT0PRIO - External Interrupt 0 + CONFIG_PIC32MX_INT1PRIO - External Interrupt 1 + CONFIG_PIC32MX_INT2PRIO - External Interrupt 2 + CONFIG_PIC32MX_INT3PRIO - External Interrupt 3 + CONFIG_PIC32MX_INT4PRIO - External Interrupt 4 + CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor + CONFIG_PIC32MX_T1PRIO - Timer 1 (System timer) priority + CONFIG_PIC32MX_T2PRIO - Timer 2 priority + CONFIG_PIC32MX_T3PRIO - Timer 3 priority + CONFIG_PIC32MX_T4PRIO - Timer 4 priority + CONFIG_PIC32MX_T5PRIO - Timer 5 priority + CONFIG_PIC32MX_IC1PRIO - Input Capture 1 + CONFIG_PIC32MX_IC2PRIO - Input Capture 2 + CONFIG_PIC32MX_IC3PRIO - Input Capture 3 + CONFIG_PIC32MX_IC4PRIO - Input Capture 4 + CONFIG_PIC32MX_IC5PRIO - Input Capture 5 + CONFIG_PIC32MX_OC1PRIO - Output Compare 1 + CONFIG_PIC32MX_OC2PRIO - Output Compare 2 + CONFIG_PIC32MX_OC3PRIO - Output Compare 3 + CONFIG_PIC32MX_OC4PRIO - Output Compare 4 + CONFIG_PIC32MX_OC5PRIO - Output Compare 5 + CONFIG_PIC32MX_I2C1PRIO - I2C 1 + CONFIG_PIC32MX_I2C2PRIO - I2C 2 + CONFIG_PIC32MX_SPI1PRIO - SPI 1 + CONFIG_PIC32MX_SPI2PRIO - SPI 2 + CONFIG_PIC32MX_UART1PRIO - UART 1 + CONFIG_PIC32MX_UART2PRIO - UART 2 + CONFIG_PIC32MX_CN - Input Change Interrupt + CONFIG_PIC32MX_ADCPRIO - ADC1 Convert Done + CONFIG_PIC32MX_PMPPRIO - Parallel Master Port + CONFIG_PIC32MX_CM1PRIO - Comparator 1 + CONFIG_PIC32MX_CM2PRIO - Comparator 2 + CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor + CONFIG_PIC32MX_RTCCPRIO - Real-Time Clock and Calendar + CONFIG_PIC32MX_DMA0PRIO - DMA Channel 0 + CONFIG_PIC32MX_DMA1PRIO - DMA Channel 1 + CONFIG_PIC32MX_DMA2PRIO - DMA Channel 2 + CONFIG_PIC32MX_DMA3PRIO - DMA Channel 3 + CONFIG_PIC32MX_FCEPRIO - Flash Control Event + CONFIG_PIC32MX_USBPRIO - USB + + PIC32MXx specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + PIC32MXx USB Device Configuration + + PIC32MXx USB Host Configuration (the PIC32MX does not support USB Host) + +Configurations +============== + + Each PIC32MX configuration is maintained in a sub-directory and can be + selected as follow: + + cd tools + ./configure.sh pcblogic-pic32mx/ + cd - + . ./setenv.sh + + Where is one of the following sub-directories. + + NOTE: These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + +Configuration sub-directories +----------------------------- + + nsh: + This configuration directory holds configuration files tht can + be used to support the NuttShell (NSH). + + NOTES: + + 1. The serial console is on UART1. Therefore, you will need an external + RS232 driver or TTL serial-to-USB converter. The UART1 TX and RX + pins are available on: + + TX -- Pin 53: U1TX/RF8 + RX -- Pin 52: U1RX/RF2 + + Power for the converter is available from the power point connector: + + GND -- POWER POINT: GND + Vcc -- POWER POINT: Vdd (3.3V) -- Or P32_VBUS (+5V) + Or +5V from a USB PC port. + + The serial console is configured for 115200 8N1 by default. + + 2. Support for NSH built-in applications is enabled. + + 3. By default, this configuration uses an older Microchip C32 toolchain + for Windows (the newer ones seem to be incompatible) and builds under + Cygwin (or probably MSYS). That can easily be reconfigured, of course. + + Build Setup: + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + + System Type: + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE=y : Older C32 toolchain + + 4. To enable LCD1602 support: + + Device Drivers: + CONFIG_LCD=y : Enable LCD menus + CONFIG_LCD_LCD1602=y : Select LCD1602 + + Library Routines: + CONFIG_LIB_SLCDCODEC=y : Enable the SLCD CODEC + + System Type -> PIC32MX Peripheral Support: + CONFIG_PIC32MX_PMP=y : Enable PMP support + + To enable apps/examples/slcd to test the LCD: + + Application Configuration: + CONFIG_NSH_ARCHINIT=y : Needed to initialize the SLCD + CONFIG_EXAMPLES_SLCD=y : Enable apps/examples/slcd use /dev/lcd1602 + CONFIG_EXAMPLES_SLCD_DEVNAME="/dev/lcd1602" + + To enable LCD debug output: + + Build Setup: + CONFIG_DEBUG=y : Enable debug features + CONFIG_DEBUG_VERBOSE=y : Enable LCD debug + + NOTES: + a. I do not have the LCD1602 working. I may just be getting lost in the + tangle of wires or perhaps there is something fundamentally wrong with + the code. If you decide to work on this, you might want to consider + the working, big-bang version of this driver at configs/sure-pic32mx/src/pic32mx_lcd1602.c. + A bit-bang driver is probably more appropriate for such a low performance + device (and a LOT easier to debug). + b. At this point in time, testing of the SLCD is very limited because + there is not much in apps/examples/slcd. Basically driver with a working + test setup and ready to be tested and debugged. diff --git a/configs/pcblogic-pic32mx/include/board.h b/configs/pcblogic-pic32mx/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..394005f5218cf096baf7ea9b9bf2b12c6175418f --- /dev/null +++ b/configs/pcblogic-pic32mx/include/board.h @@ -0,0 +1,130 @@ +/**************************************************************************** + * configs/pcblogic-pic32mx/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_PCBLOGIC_PIC32MX_INCLUDE_BOARD_H +#define __CONFIGS_PCBLOGIC_PIC32MX_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Clocking *****************************************************************/ +/* Crystal frequencies */ + +#define BOARD_POSC_FREQ 8000000 /* Primary OSC XTAL frequency (8MHz) */ +#define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */ + +/* Oscillator modes */ + +#define BOARD_FNOSC_POSCPLL 1 /* Use primary oscillator w/PLL */ +#define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */ + +/* PLL configuration and resulting CPU clock. + * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV + */ + +#define BOARD_PLL_INPUT BOARD_POSC_FREQ +#define BOARD_PLL_IDIV 2 /* PLL input divider */ +#define BOARD_PLL_MULT 20 /* PLL multiplier */ +#define BOARD_PLL_ODIV 1 /* PLL output divider */ + +#define BOARD_CPU_CLOCK 80000000 /* CPU clock (80MHz = 8MHz * 20 / 2) */ + +/* USB PLL configuration. + * USB_CLOCK = ((POSC_XTAL / IDIV) * 24) / 2 + */ + +#define BOARD_UPLL_IDIV 2 /* USB PLL divider (revisit) */ +#define BOARD_USB_CLOCK 48000000 /* USB clock (8MHz / 2) * 24 / 2) */ + +/* Peripheral clock is divided down from CPU clock. + * PBCLOCK = CPU_CLOCK / PBDIV + */ + +#define BOARD_PBDIV 2 /* Peripheral clock divisor (PBDIV) */ +#define BOARD_PBCLOCK 40000000 /* Peripheral clock (PBCLK = 80MHz/2) */ + +/* Watchdog pre-scaler (re-visit) */ + +#define BOARD_WD_ENABLE 0 /* Watchdog is disabled */ +#define BOARD_WD_PRESCALER 8 /* Watchdog pre-scaler */ + +/* LED definitions **********************************************************/ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_PCBLOGIC_PIC32MX_INCLUDE_BOARD_H */ diff --git a/configs/pcblogic-pic32mx/nsh/Make.defs b/configs/pcblogic-pic32mx/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..00cf7c88e31af91fd4148267cb50fb35cf6c2765 --- /dev/null +++ b/configs/pcblogic-pic32mx/nsh/Make.defs @@ -0,0 +1,100 @@ +############################################################################ +# configs/pcblogic-pic32mx/nsh/Make.defs +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/mips/src/mips32/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/pcblogic-pic32mx/nsh/defconfig b/configs/pcblogic-pic32mx/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..35dc7761453f05e6c3512d9409c158f4ccc40d7b --- /dev/null +++ b/configs/pcblogic-pic32mx/nsh/defconfig @@ -0,0 +1,851 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +CONFIG_ARCH_MIPS=y +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="mips" +CONFIG_ARCH_FAMILY="mips32" +CONFIG_ARCH_CHIP="pic32mx" +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_CHIP_PIC32MX=y +# CONFIG_ARCH_CHIP_PIC32MZ is not set +CONFIG_ARCH_MIPS32=y +CONFIG_ARCH_MIPS_24KC=y +# CONFIG_ARCH_MIPS_M14K is not set +# CONFIG_ARCH_HAVE_MICROMIPS is not set + +# +# MIPS32 Configuration Options +# +# CONFIG_MIPS32_TOOLCHAIN_GNU_ELF is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_XC32 is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW is not set +CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE=y +# CONFIG_MIPS32_TOOLCHAIN_PINGUINOW is not set +# CONFIG_MIPS32_FRAMEPOINTER is not set + +# +# PIC32MX Configuration Options +# +# CONFIG_ARCH_CHIP_PIC32MX110F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX320F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX420F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX440F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX460F256L is not set +CONFIG_ARCH_CHIP_PIC32MX460F512L=y +# CONFIG_ARCH_CHIP_PIC32MX534F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX1 is not set +# CONFIG_ARCH_CHIP_PIC32MX2 is not set +# CONFIG_ARCH_CHIP_PIC32MX3 is not set +CONFIG_ARCH_CHIP_PIC32MX4=y +# CONFIG_ARCH_CHIP_PIC32MX5 is not set +# CONFIG_ARCH_CHIP_PIC32MX6 is not set +# CONFIG_ARCH_CHIP_PIC32MX7 is not set +# CONFIG_PIC32MX_MVEC is not set +# CONFIG_PIC32MX_SPI is not set +CONFIG_PIC32MX_T1=y + +# +# PIC32MX Peripheral Support +# +# CONFIG_PIC32MX_WDT is not set +# CONFIG_PIC32MX_T2 is not set +# CONFIG_PIC32MX_T3 is not set +# CONFIG_PIC32MX_T4 is not set +# CONFIG_PIC32MX_T5 is not set +# CONFIG_PIC32MX_IC1 is not set +# CONFIG_PIC32MX_IC2 is not set +# CONFIG_PIC32MX_IC3 is not set +# CONFIG_PIC32MX_IC4 is not set +# CONFIG_PIC32MX_IC5 is not set +# CONFIG_PIC32MX_OC1 is not set +# CONFIG_PIC32MX_OC2 is not set +# CONFIG_PIC32MX_OC3 is not set +# CONFIG_PIC32MX_OC4 is not set +# CONFIG_PIC32MX_OC5 is not set +# CONFIG_PIC32MX_I2C1 is not set +# CONFIG_PIC32MX_I2C2 is not set +# CONFIG_PIC32MX_I2C3 is not set +# CONFIG_PIC32MX_I2C4 is not set +# CONFIG_PIC32MX_I2C5 is not set +# CONFIG_PIC32MX_SPI1 is not set +# CONFIG_PIC32MX_SPI2 is not set +# CONFIG_PIC32MX_SPI3 is not set +# CONFIG_PIC32MX_SPI4 is not set +CONFIG_PIC32MX_UART1=y +# CONFIG_PIC32MX_UART2 is not set +# CONFIG_PIC32MX_UART3 is not set +# CONFIG_PIC32MX_UART4 is not set +# CONFIG_PIC32MX_UART5 is not set +# CONFIG_PIC32MX_UART6 is not set +# CONFIG_PIC32MX_ADC is not set +# CONFIG_PIC32MX_PMP is not set +# CONFIG_PIC32MX_CM1 is not set +# CONFIG_PIC32MX_CM2 is not set +# CONFIG_PIC32MX_CM3 is not set +# CONFIG_PIC32MX_RTCC is not set +# CONFIG_PIC32MX_DMA is not set +# CONFIG_PIC32MX_FLASH is not set +# CONFIG_PIC32MX_USBDEV is not set +# CONFIG_PIC32MX_USBHOST is not set +# CONFIG_PIC32MX_CAN1 is not set +# CONFIG_PIC32MX_CAN2 is not set +# CONFIG_PIC32MX_ETHERNET is not set +# CONFIG_PIC32MX_CTMU is not set + +# +# PIC32MX Peripheral Interrupt Priorities +# +CONFIG_PIC32MX_CTPRIO=16 +CONFIG_PIC32MX_CS0PRIO=16 +CONFIG_PIC32MX_CS1PRIO=16 +CONFIG_PIC32MX_INT0PRIO=16 +CONFIG_PIC32MX_INT1PRIO=16 +CONFIG_PIC32MX_INT2PRIO=16 +CONFIG_PIC32MX_INT3PRIO=16 +CONFIG_PIC32MX_INT4PRIO=16 +CONFIG_PIC32MX_T1PRIO=16 +CONFIG_PIC32MX_UART1PRIO=16 + +# +# Device Configuration 0 (DEVCFG0) +# +CONFIG_PIC32MX_DEBUGGER=2 +CONFIG_PIC32MX_ICESEL=1 +CONFIG_PIC32MX_PROGFLASHWP=0xff +CONFIG_PIC32MX_BOOTFLASHWP=1 +CONFIG_PIC32MX_CODEWP=1 + +# +# Device Configuration 1 (DEVCFG1) +# + +# +# Device Configuration 3 (DEVCFG3) +# +CONFIG_PIC32MX_USBIDO=0 +CONFIG_PIC32MX_VBUSIO=0 +# CONFIG_PIC32MX_WDENABLE is not set +CONFIG_PIC32MX_FETHIO=1 +CONFIG_PIC32MX_FMIIEN=1 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +CONFIG_ARCH_VECNOTIRQ=y +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8079 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0xa0000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_PCBLOGICPIC32MX=y +# CONFIG_ARCH_BOARD_UBW32 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="pcblogic-pic32mx" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=25 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/pcblogic-pic32mx/nsh/ld.script b/configs/pcblogic-pic32mx/nsh/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..f80cc04365d07b80a86f09896420ba15a817bb41 --- /dev/null +++ b/configs/pcblogic-pic32mx/nsh/ld.script @@ -0,0 +1,317 @@ +/**************************************************************************** + * configs/pcblogic-pic32mx/nsh/ld.script + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MX460F512L has 512Kb of program FLASH at physical address + * 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 512K + + /* The PIC32MX460F512L has 12Kb of boot FLASH at physical address + * 0x1fc00000. The initial reset vector is in KSEG1, but all other + * accesses are in KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 8192-1168 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16 + + /* The PIC32MX460F512L has 32Kb of data memory at physical address + * 0x00000000. Since the PIC32MX has no data cache, this memory is + * always accessed through KSEG1. + * + * When used with MPLAB, we need to set aside 512 bytes of memory + * for use by MPLAB. + */ + + kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(pic32mx) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/pcblogic-pic32mx/nsh/setenv.sh b/configs/pcblogic-pic32mx/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..91f0b8f2cba344145604a5b79c052bbe1457f406 --- /dev/null +++ b/configs/pcblogic-pic32mx/nsh/setenv.sh @@ -0,0 +1,61 @@ +#!/bin/bash +# configs/pcblogic-pic32mx/nsh/setenv.sh +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +# This is the Cygwin path to the location where I installed the MicroChip +# PIC32MX toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install a different version of if you install +# the Linux PIC32MX toolchain as well +export TOOLCHAIN_BIN="/cygdrive/c/MicroChip/mplabc32/v1.12/bin" + +# This is the path to the toosl subdirectory +export PIC32TOOL_DIR="${WD}/tools/pic32mx" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${PIC32TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/pcblogic-pic32mx/src/.gitignore b/configs/pcblogic-pic32mx/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/pcblogic-pic32mx/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/pcblogic-pic32mx/src/Makefile b/configs/pcblogic-pic32mx/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..89a27422749d2ff1e8629fb24014735f0a67e199 --- /dev/null +++ b/configs/pcblogic-pic32mx/src/Makefile @@ -0,0 +1,49 @@ +############################################################################ +# configs/pcblogic-pic32mx/src/Makefile +# +# Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = pic32mx_boot.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += pic32mx_appinit.c +endif + +ifeq ($(CONFIG_LCD_LCD1602),y) +CSRCS += pic32mx_lcd1602.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/pcblogic-pic32mx/src/pcblogic-pic32mx.h b/configs/pcblogic-pic32mx/src/pcblogic-pic32mx.h new file mode 100644 index 0000000000000000000000000000000000000000..8d5ac4da998f3e8f31b244f054e1a45d03121dd4 --- /dev/null +++ b/configs/pcblogic-pic32mx/src/pcblogic-pic32mx.h @@ -0,0 +1,101 @@ +/**************************************************************************** + * configs/pcblogic-pic32mx/src/pcblogic.h + * + * Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_PCBLOGIC_PIC32MX_SRC_PCBLOGIC_PIC32MX_H +#define __CONFIGS_PCBLOGIC_PIC32MX_SRC_PCBLOGIC_PIC32MX_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Name: pic32mx_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the PCB Logic board. + * + ************************************************************************************/ + +#if defined(CONFIG_PIC32MX_SPI1) || defined(CONFIG_PIC32MX_SPI2) +EXTERN void weak_function pic32mx_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: pic32mx_led_initialize + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +EXTERN void pic32mx_led_initialize(void); +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_PCBLOGIC_PIC32MX_SRC_PCBLOGIC_PIC32MX_H */ diff --git a/configs/pcblogic-pic32mx/src/pic32mx_appinit.c b/configs/pcblogic-pic32mx/src/pic32mx_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..97baa0009eaabe33b02bd751ad58ea260d752b20 --- /dev/null +++ b/configs/pcblogic-pic32mx/src/pic32mx_appinit.c @@ -0,0 +1,83 @@ +/**************************************************************************** + * config/pcblocic-pic32mx/src/pic32mx_appinit.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "pcblogic-pic32mx.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef OK +# define OK 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + int ret = OK; + + /* Initialize the LCD1602 and register the device as /dev/lcd1602 */ + +#ifdef CONFIG_LCD_LCD1602 + ret = up_lcd1602_initialize(); +#endif + + return ret; +} diff --git a/configs/pcblogic-pic32mx/src/pic32mx_boot.c b/configs/pcblogic-pic32mx/src/pic32mx_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..8b93c58884b53a6979bff9a50db5175cd185203b --- /dev/null +++ b/configs/pcblogic-pic32mx/src/pic32mx_boot.c @@ -0,0 +1,92 @@ +/************************************************************************************ + * configs/pcblogic-pic32mx/src/pic32mx_boot.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "pic32mx.h" +#include "pcblogic-pic32mx.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_boardinitialize + * + * Description: + * All PIC32MX architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void pic32mx_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) at least one SPI is enabled, and 2) the weak + * function pic32mx_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_PIC32MX_SPI1) || defined(CONFIG_PIC32MX_SPI2) + if (pic32mx_spidev_initialize) + { + pic32mx_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + pic32mx_led_initialize(); +#endif +} diff --git a/configs/pcblogic-pic32mx/src/pic32mx_lcd1602.c b/configs/pcblogic-pic32mx/src/pic32mx_lcd1602.c new file mode 100644 index 0000000000000000000000000000000000000000..d63543eabecc02f6b151f81425021ab4c22730dc --- /dev/null +++ b/configs/pcblogic-pic32mx/src/pic32mx_lcd1602.c @@ -0,0 +1,963 @@ +/**************************************************************************** + * configs/pcblocic-pic32mx/src/pic32mx_lcd1602.c + * + * This logic supports the connection of an LCD1602 LCD to the PCB Logic + * PIC32MX board. The LCD1602 is based on the Hitachi HD44780U LCD + * controller + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* LCD pin mapping (see configs/pcblogic-pic32mx/README.txt) + * + * ----------------------------------- ---------- ---------------------------------- + * PIC32 LCD1602 PCBLogic PIN + * PIN SIGNAL NAME PIN NAME(s) + * ----------------------------------- ---------- ---------------------------------- + * 1. Vss --> Powerpoint GND + * 2. Vdd --> Powerpoint USB+5V + * 3. Vee N/C To ground via 10K potentiometer + * 44 AN15/OCFB/PMALL/PMA0/CN12/RB15 4. RS 4 PMA0, Selects registers + * 82 PMRD/CN14/RD5 5. RW 82 PMRD/PMWR, Selects read or write + * 81 OC5/PMWR/CN13/RD4 6. E 81 PMENB, Starts data read/write + * 93 PMD0/RE0 7. D0 93 PMD0 + * 94 PMD1/RE1 8. D1 94 PMD1 + * 98 PMD2/RE2 9. D2 98 PMD2 + * 99 PMD3/RE3 10. D3 99 PMD3 + * 100 PMD4/RE4 11. D4 100 PMD4 + * 3 PMD5/RE5 12. D5 3 PMD5 + * 4 PMD6/RE6 13. D6 4 PMD6 + * 5 PMD7/RE7 14. D7 5 PMD7 + * 15. A N/C To Vcc (5V) via 10K potentiometer + * 16. K --> Powerpoint GND + * ----------------------------------- ---------- ---------------------------------- + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include "pic32mx-pmp.h" +#include "pic32mx-int.h" +#include "pic32mx.h" +#include "pcblogic-pic32mx.h" + +#ifdef CONFIG_LCD_LCD1602 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_PIC32MX_PMP +# error "CONFIG_PIC32MX_PMP is required to use the LCD" +#endif + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* The ever-present MIN/MAX macros ******************************************/ + +#ifndef MIN +# define MIN(a,b) (a < b ? a : b) +#endif + +#ifndef MAX +# define MAX(a,b) (a > b ? a : b) +#endif + +/* Pin configuration ********************************************************/ +/* RB15, RS -- High values selects data */ + +#define GPIO_LCD_RS (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTB|GPIO_PIN15) + +/* LCD **********************************************************************/ + +#define LCD_NROWS 2 +#define LCD_NCOLUMNS 16 +#define LCD_NCHARS (LCD_NROWS * LCD_NCOLUMNS) + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Private Type Definition + ****************************************************************************/ + +/* SLCD incoming stream structure */ + +struct lcd_instream_s +{ + struct lib_instream_s stream; + FAR const char *buffer; + ssize_t nbytes; +}; + +/* Global LCD state */ + +struct lcd1602_2 +{ + bool initialized; /* True: Completed initialization sequence */ + uint8_t currow; /* Current row */ + uint8_t curcol; /* Current column */ +}; + +/**************************************************************************** + * Private Function Protototypes + ****************************************************************************/ +/* Debug */ + +#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE) +static void lcd_dumpstate(FAR const char *msg); +static void lcd_dumpstream(FAR const char *msg, + FAR const struct lcd_instream_s *stream); +#else +# define lcd_dumpstate(msg) +# define lcd_dumpstream(msg, stream) +#endif + +/* Internal functions */ + +static int lcd_getstream(FAR struct lib_instream_s *instream); +static void lcd_wrcommand(uint8_t cmd); +static void lcd_wrdata(uint8_t data); +static uint8_t lcd_rddata(void); +static uint8_t lcd_readch(uint8_t row, uint8_t column); +static void lcd_writech(uint8_t ch, uint8_t row, uint8_t column); +static void lcd_appendch(uint8_t ch); +static void lcd_action(enum slcdcode_e code, uint8_t count); + +/* Character driver operations */ + +static ssize_t lcd_read(FAR struct file *, FAR char *, size_t); +static ssize_t lcd_write(FAR struct file *, FAR const char *, size_t); +static int lcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg); +#ifndef CONFIG_DISABLE_POLL +static int lcd_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Character driver operations */ + +static const struct file_operations g_lcdops = +{ + 0, /* open */ + 0, /* close */ + lcd_read, /* read */ + lcd_write, /* write */ + 0, /* seek */ + lcd_ioctl /* ioctl */ +#ifndef CONFIG_DISABLE_POLL + , lcd_poll /* poll */ +#endif +}; + +/* This is the driver state structure */ + +static struct lcd1602_2 g_lcd1602; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lcd_dumpstate + ****************************************************************************/ + +#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE) +static void lcd_dumpstate(FAR const char *msg) +{ + uint8_t buffer[LCD_NCOLUMNS]; + uint8_t ch; + int row; + int column; + + lcdvdbg("%s:\n", msg); + lcdvdbg(" currow: %d curcol: %d\n", + g_lcd1602.currow, g_lcd1602.curcol); + + for (row = 0, column = 0; row < LCD_NROWS; ) + { + ch = lcd_readch(row, column); + buffer[column] = isprint(ch) ? ch : '.'; + if (++column >= LCD_NCOLUMNS) + { + lcdvdbg(" [%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c]\n", + buffer[0], buffer[1], buffer[2], buffer[3], + buffer[4], buffer[5], buffer[6], buffer[7], + buffer[8], buffer[9], buffer[10], buffer[11], + buffer[12], buffer[13], buffer[14], buffer[15]); + + column = 0; + row++; + } + } +} +#endif + +/**************************************************************************** + * Name: lcd_dumpstate + ****************************************************************************/ + +#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE) +static void lcd_dumpstream(FAR const char *msg, + FAR const struct lcd_instream_s *stream) +{ + lcdvdbg("%s:\n", msg); + lcdvdbg(" nget: %d nbytes: %d\n", + stream->stream.nget, stream->nbytes); + lib_dumpbuffer("STREAM", stream->buffer, stream->nbytes); +} +#endif + +/**************************************************************************** + * Name: lcd_getstream + * + * Description: + * Get one character from the keyboard. + * + ****************************************************************************/ + +static int lcd_getstream(FAR struct lib_instream_s *instream) +{ + FAR struct lcd_instream_s *lcdstream = (FAR struct lcd_instream_s *)instream; + + DEBUGASSERT(lcdstream && lcdstream->buffer); + if (lcdstream->nbytes > 0) + { + lcdstream->nbytes--; + lcdstream->stream.nget++; + return (int)*lcdstream->buffer++; + } + + return EOF; +} + +/**************************************************************************** + * Name: lcd_wrcommand + * + * Description: + * Configure to write an LCD command + * + ****************************************************************************/ + +static void lcd_wrcommand(uint8_t cmd) +{ + /* Address bit A0 is RS. Set the address latch to A0=0 */ + + putreg32(1, PIC32MX_PMP_ADDRCLR); + + /* And write the command to the data out register */ + + putreg32((uint32_t)cmd, PIC32MX_PMP_DOUT); +} + +/**************************************************************************** + * Name: lcd_wrdata + * + * Description: + * Configure to read or write LCD data + * + ****************************************************************************/ + +static void lcd_wrdata(uint8_t data) +{ + /* Address bit A0 is RS. Set the address latch to A0=1 */ + + putreg32(1, PIC32MX_PMP_ADDRSET); + + /* And write the data to the data out register */ + + putreg32((uint32_t)data, PIC32MX_PMP_DOUT); +} + +/**************************************************************************** + * Name: lcd_rddata + * + * Description: + * Configure to read or write LCD data + * + ****************************************************************************/ + +static uint8_t lcd_rddata(void) +{ + /* Address bit A0 is RS. Set the address latch to A0=1 */ + + putreg32(1, PIC32MX_PMP_ADDRSET); + + /* And read the data to the data in register */ + + return (uint8_t)getreg32(PIC32MX_PMP_DIN); +} + +/**************************************************************************** + * Name: lcd_readch + ****************************************************************************/ + +static uint8_t lcd_readch(uint8_t row, uint8_t column) +{ + uint8_t addr; + + /* Set the cursor position. Internally, the HD44780U supports a display + * size of up to 2x40 addressed as follows: + * + * Column 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ... 39 + * Row 0 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f ... 27 + * Ro1 1 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f ... 67 + */ + + addr = column; + if (row > 0) + { + addr |= HD4478OU_DDRAM_ROW1; + } + + lcd_wrcommand(HD4478OU_DDRAM_AD(addr)); + + /* And write the character here */ + + return lcd_rddata(); +} + +/**************************************************************************** + * Name: lcd_writech + ****************************************************************************/ + +static void lcd_writech(uint8_t ch, uint8_t row, uint8_t column) +{ + uint8_t addr; + + /* Set the cursor position. Internally, the HD44780U supports a display + * size of up to 2x40 addressed as follows: + * + * Column 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ... 39 + * Row 0 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f ... 27 + * Ro1 1 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f ... 67 + */ + + addr = column; + if (row > 0) + { + addr |= HD4478OU_DDRAM_ROW1; + } + + lcd_wrcommand(HD4478OU_DDRAM_AD(addr)); + + /* And write the character here */ + + lcd_wrdata(ch); +} + +/**************************************************************************** + * Name: lcd_appendch + ****************************************************************************/ + +static void lcd_appendch(uint8_t ch) +{ + if (g_lcd1602.curcol < LCD_NCOLUMNS) + { + lcd_writech(ch, g_lcd1602.currow, g_lcd1602.curcol); + g_lcd1602.curcol++; + } +} + +/**************************************************************************** + * Name: lcd_action + ****************************************************************************/ + +static void lcd_action(enum slcdcode_e code, uint8_t count) +{ + lcdvdbg("Action: %d count: %d\n", code, count); + lcd_dumpstate("BEFORE ACTION"); + + switch (code) + { + /* Erasure */ + + case SLCDCODE_BACKDEL: /* Backspace (backward delete) N characters */ + { + int tmp; + + /* If we are at the home position or if the count is zero, then ignore the action */ + + if (g_lcd1602.curcol < 1 || count < 1) + { + break; + } + + /* Otherwise, BACKDEL is like moving the cursor back N characters then doing a + * forward deletion. Decrement the cursor position and fall through. + */ + + tmp = (int)g_lcd1602.curcol - count; + if (tmp < 0) + { + tmp = 0; + count = g_lcd1602.curcol; + } + + /* Save the updated cursor positions */ + + g_lcd1602.curcol = tmp; + } + + case SLCDCODE_FWDDEL: /* DELete (forward delete) N characters moving text */ + if (count > 0) + { + int nchars; + int nmove; + int i; + + /* How many characters are to the right of the cursor position + * (including the one at the cursor position)? Then get the + * number of characters to move. + */ + + nchars = LCD_NCOLUMNS - g_lcd1602.curcol; + nmove = MIN(nchars, count) - 1; + + /* Move all characters after the current cursor position left by 'nmove' characters */ + + for (i = g_lcd1602.curcol + nmove; i < LCD_NCOLUMNS - 1; i++) + { + uint8_t ch = lcd_readch(g_lcd1602.currow, i); + lcd_writech(ch, g_lcd1602.currow, i - nmove); + } + + /* Erase the last 'nmove' characters on the display */ + + for (i = LCD_NCOLUMNS - nmove; i < LCD_NCOLUMNS; i++) + { + lcd_writech(' ', i, 0); + } + } + break; + + case SLCDCODE_ERASE: /* Erase N characters from the cursor position */ + if (count > 0) + { + int last; + int i; + + /* Get the last position to clear and make sure that the last + * position is on the SLCD. + */ + + last = g_lcd1602.curcol + count - 1; + if (last >= LCD_NCOLUMNS) + { + last = LCD_NCOLUMNS - 1; + } + + /* Erase N characters after the current cursor position left by one */ + + for (i = g_lcd1602.curcol; i < last; i++) + { + lcd_writech(' ', g_lcd1602.currow, i); + } + } + break; + + case SLCDCODE_CLEAR: /* Home the cursor and erase the entire display */ + { + /* Clear the display */ + + lcd_wrcommand(HD4478OU_CLEAR); + + /* And home the cursor */ + + g_lcd1602.currow = 0; + g_lcd1602.curcol = 0; + } + break; + + case SLCDCODE_ERASEEOL: /* Erase from the cursor position to the end of line */ + { + int i; + + /* Erase characters after the current cursor position to the end of the line */ + + for (i = g_lcd1602.curcol; i < LCD_NCOLUMNS; i++) + { + lcd_writech(' ', g_lcd1602.currow, i); + } + } + break; + + /* Cursor movement */ + + case SLCDCODE_HOME: /* Cursor home */ + { + g_lcd1602.currow = 0; + g_lcd1602.curcol = 0; + } + break; + + case SLCDCODE_END: /* Cursor end */ + { + g_lcd1602.curcol = LCD_NCOLUMNS - 1; + } + break; + + case SLCDCODE_LEFT: /* Cursor left by N characters */ + { + int tmp = (int)g_lcd1602.curcol - count; + + /* Don't permit movement past the beginning of the SLCD */ + + if (tmp < 0) + { + tmp = 0; + } + + /* Save the new cursor position */ + + g_lcd1602.curcol = (uint8_t)tmp; + } + break; + + case SLCDCODE_RIGHT: /* Cursor right by N characters */ + { + int tmp = (int)g_lcd1602.curcol + count; + + /* Don't permit movement past the end of the SLCD */ + + if (tmp >= LCD_NCOLUMNS) + { + tmp = LCD_NCOLUMNS - 1; + } + + /* Save the new cursor position */ + + g_lcd1602.curcol = (uint8_t)tmp; + } + break; + + case SLCDCODE_UP: /* Cursor up by N lines */ + { + int tmp = (int)g_lcd1602.currow - count; + + /* Don't permit movement past the top of the SLCD */ + + if (tmp < 0) + { + tmp = 0; + } + + /* Save the new cursor position */ + + g_lcd1602.currow = (uint8_t)tmp; + } + break; + + case SLCDCODE_DOWN: /* Cursor down by N lines */ + { + int tmp = (int)g_lcd1602.currow + count; + + /* Don't permit movement past the bottom of the SLCD */ + + if (tmp >= LCD_NROWS) + { + tmp = LCD_NROWS - 1; + } + + /* Save the new cursor position */ + + g_lcd1602.currow = (uint8_t)tmp; + } + break; + + case SLCDCODE_PAGEUP: /* Cursor up by N pages */ + case SLCDCODE_PAGEDOWN: /* Cursor down by N pages */ + break; /* Not supportable on this SLCD */ + + /* Blinking */ + + case SLCDCODE_BLINKSTART: /* Start blinking with current cursor position */ + case SLCDCODE_BLINKEND: /* End blinking after the current cursor position */ + case SLCDCODE_BLINKOFF: /* Turn blinking off */ + break; /* Not implemented */ + + /* These are actually unreportable errors */ + + default: + case SLCDCODE_NORMAL: /* Not a special keycode */ + break; + } + + lcd_dumpstate("AFTER ACTION"); +} + +/**************************************************************************** + * Name: lcd_read + ****************************************************************************/ + +static ssize_t lcd_read(FAR struct file *filep, FAR char *buffer, size_t len) +{ + uint8_t row; + uint8_t column; + int nread; + + /* Try to read the entire display. Notice that the seek offset + * (filep->f_pos) is ignored. It probably should be taken into account + * and also updated after each read and write. + */ + + row = 0; + column = 0; + + for (nread = 0; nread < len; nread++) + { + *buffer++ = lcd_readch(row, column); + if (++column >= LCD_NCOLUMNS) + { + column = 0; + if (++row >= LCD_NROWS) + { + break; + } + } + } + + return nread; +} + +/**************************************************************************** + * Name: lcd_write + ****************************************************************************/ + +static ssize_t lcd_write(FAR struct file *filep, FAR const char *buffer, + size_t len) +{ + struct lcd_instream_s instream; + struct slcdstate_s state; + enum slcdret_e result; + uint8_t ch; + uint8_t count; + + /* Initialize the stream for use with the SLCD CODEC */ + + instream.stream.get = lcd_getstream; + instream.stream.nget = 0; + instream.buffer = buffer; + instream.nbytes = len; + + lcd_dumpstream("BEFORE WRITE", &instream); + + /* Now decode and process every byte in the input buffer */ + + memset(&state, 0, sizeof(struct slcdstate_s)); + while ((result = slcd_decode(&instream.stream, &state, &ch, &count)) != SLCDRET_EOF) + { + lcdvdbg("slcd_decode returned result=%d char=%d count=%d\n", + result, ch, count); + + if (result == SLCDRET_CHAR) /* A normal character was returned */ + { + /* Check for ASCII control characters */ + + if (ch < ASCII_SPACE) + { + /* All are ignored except for backspace and carriage return */ + + if (ch == ASCII_BS) + { + /* Perform the backward deletion */ + + lcd_action(SLCDCODE_BACKDEL, 1); + } + else if (ch == ASCII_CR) + { + /* Perform the carriage return */ + + g_lcd1602.curcol = 0; + lcd_action(SLCDCODE_DOWN, 1); + } + } + + /* Handle ASCII_DEL */ + + else if (ch == ASCII_DEL) + { + /* Perform the forward deletion */ + + lcd_action(SLCDCODE_FWDDEL, 1); + } + + /* The rest of the 7-bit ASCII characters are fair game */ + + else if (ch < 128) + { + /* Write the character if it valid */ + + lcd_appendch(ch); + } + } + else /* (result == SLCDRET_SPEC) */ /* A special SLCD action was returned */ + { + /* Then Perform the action */ + + lcd_action((enum slcdcode_e)ch, count); + } + } + + /* Assume that the entire input buffer was processed */ + + lcd_dumpstream("AFTER WRITE", &instream); + return (ssize_t)len; +} + +/**************************************************************************** + * Name: lcd_ioctl + ****************************************************************************/ + +static int lcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + switch (cmd) + { + + /* SLCDIOC_GETATTRIBUTES: Get the attributes of the SLCD + * + * argument: Pointer to struct slcd_attributes_s in which values will be + * returned + */ + + case SLCDIOC_GETATTRIBUTES: + { + FAR struct slcd_attributes_s *attr = (FAR struct slcd_attributes_s *)((uintptr_t)arg); + + lcdvdbg("SLCDIOC_GETATTRIBUTES:\n"); + + if (!attr) + { + return -EINVAL; + } + + attr->nrows = LCD_NROWS; + attr->ncolumns = LCD_NCOLUMNS; + attr->nbars = 0; + attr->maxcontrast = 0; + attr->maxbrightness = 0 + } + break; + + /* SLCDIOC_CURPOS: Get the SLCD cursor positioni (rows x characters) + * + * argument: Pointer to struct slcd_curpos_s in which values will be + * returned + */ + + + case SLCDIOC_CURPOS: + { + FAR struct slcd_curpos_s *curpos = (FAR struct slcd_curpos_s *)((uintptr_t)arg); + + lcdvdbg("SLCDIOC_CURPOS: row=%d column=%d\n", g_lcd1602.currow, g_lcd1602.curcol); + + if (!curpos) + { + return -EINVAL; + } + + curpos->row = g_lcd1602.currow; + curpos->column = g_lcd1602.curcol; + } + break; + + case SLCDIOC_SETBAR: /* SLCDIOC_SETBAR: Set bars on a bar display */ + case SLCDIOC_GETCONTRAST: /* SLCDIOC_GETCONTRAST: Get the current contrast setting */ + case SLCDIOC_SETCONTRAST: /* SLCDIOC_SETCONTRAST: Set the contrast to a new value */ + case SLCDIOC_GETBRIGHTNESS: /* Get the current brightness setting */ + case SLCDIOC_SETBRIGHTNESS: /* Set the brightness to a new value */ + default: + return -ENOTTY; + } + + return OK; +} + +/**************************************************************************** + * Name: lcd_poll + ****************************************************************************/ + +#ifndef CONFIG_DISABLE_POLL +static int lcd_poll(FAR struct file *filep, FAR struct pollfd *fds, + bool setup) +{ + if (setup) + { + /* Data is always avaialble to be read */ + + fds->revents |= (fds->events & (POLLIN|POLLOUT)); + if (fds->revents != 0) + { + sem_post(fds->sem); + } + } + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_lcd1602_initialize + * + * Description: + * Initialize the LCD1602 hardware and register the character driver as + * /dev/lcd1602. Prototype is in include/nuttx/lcd/hd4478ou.h. + * + ****************************************************************************/ + +int up_lcd1602_initialize(void) +{ + uint32_t regval; + int ret = OK; + + /* Only initialize the driver once. */ + + if (!g_lcd1602.initialized) + { + lcdvdbg("Initializing\n"); + + /* PMP Master mode configuration */ + /* Make sure that interrupts are disabled */ + + putreg32(INT_PMP, PIC32MX_INT_IEC1CLR); + + /* Stop and reset the PMP module and clear the mode and control registers. */ + + putreg32(0, PIC32MX_PMP_MODE); + putreg32(0, PIC32MX_PMP_AEN); + putreg32(0, PIC32MX_PMP_CON); + putreg32(0, PIC32MX_PMP_ADDR); + + /* Set LCD timing values, PMP master mode 3, 8-bit mode, no address + * increment, and no interrupts. + */ + + regval = (PMP_MODE_WAITE_RD(0) | PMP_MODE_WAITM(3) | PMP_MODE_WAITB_1TPB | + PMP_MODE_MODE_MODE1 | PMP_MODE_MODE8 | PMP_MODE_INCM_NONE | + PMP_MODE_IRQM_NONE); + putreg32(regval, PIC32MX_PMP_MODE); + + /* Enable the PMP for reading and writing + * PMRD/PMWR is active high (1=RD; 0=WR) + * PMENB is active high. + * No chip selects + * Address latch is active high + * Enable PMRD/PMWR, PMENB, and the PMP. + */ + + + regval = (PMP_CON_RDSP | PMP_CON_WRSP | PMP_CON_ALP | + PMP_CON_CSF_ADDR1415 | PMP_CON_PTRDEN | PMP_CON_PTWREN | + PMP_CON_ADRMUX_NONE | PMP_CON_ON); + putreg32(regval, PIC32MX_PMP_CON); + + /* Configure and enable the LCD */ + /* Wait > 15 milliseconds afer Vdd > 4.5V */ + + up_mdelay(100); + + /* Select the 8-bit interface. BF cannot be checked before this command. + * This needs to be done a few times with some magic delays. + */ + + lcd_wrcommand(HD4478OU_FUNC | HD4478OU_FUNC_DL8D | HD4478OU_FUNC_N1); + up_mdelay(50); + lcd_wrcommand(HD4478OU_FUNC | HD4478OU_FUNC_DL8D | HD4478OU_FUNC_N1); + up_udelay(50); + lcd_wrcommand(HD4478OU_FUNC | HD4478OU_FUNC_DL8D | HD4478OU_FUNC_N1); + lcd_wrcommand(HD4478OU_FUNC | HD4478OU_FUNC_DL8D | HD4478OU_FUNC_N1); + + /* Configure the display */ + + lcd_wrcommand(HD4478OU_DISPLAY); /* Display, cursor, and blink off */ + lcd_wrcommand(HD4478OU_CLEAR); /* Clear the display */ + lcd_wrcommand(HD4478OU_INPUT | HD4478OU_INPUT_INCR); /* Increment mode */ + lcd_wrcommand(HD4478OU_DISPLAY | HD4478OU_DISPLAY_ON); /* Display on, cursor and blink off */ + lcd_wrcommand(HD4478OU_DDRAM_AD(0)); /* Select DDRAM RAM AD=0 */ + + /* Register the LCD device driver */ + + ret = register_driver("/dev/lcd1602", &g_lcdops, 0644, &g_lcd1602); + g_lcd1602.initialized = true; + } + + return ret; +} + +#endif /* CONFIG_LCD_LCD1602 */ diff --git a/configs/pcduino-a10/Kconfig b/configs/pcduino-a10/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..1bf5ca671c2e2675fd72e2288dfb0da21cc6cfd7 --- /dev/null +++ b/configs/pcduino-a10/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_PCDUINO_A10 +endif # ARCH_BOARD_PCDUINO_A10 diff --git a/configs/pcduino-a10/README.txt b/configs/pcduino-a10/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..b3c26c6267a9a6489aba69dafd2caee16d22d198 --- /dev/null +++ b/configs/pcduino-a10/README.txt @@ -0,0 +1,406 @@ +README +====== + + This directory contains the port of NuttX to the pcDuino v1 board + See http://www.pcduino.com/ for information about pcDuino Lite, v1, + and v2. These boards are based around the Allwinner A10 Cortex-A8 CPU. + I have not compared these boards in detail, but I believe that the + differences are cosmetic. This port was developed on the v1 board, but + the others may be compatible: + + pcDuino Lite (See http://www.pcduino.com/?page_id=1707) + + ITEMS DETAILS + -------------------- --------------------------------------------------- + CPU 1GHz ARM Cortex A8 + GPU OpenGL ES2.0, OpenVG 1.1 Mali 400 core + DRAM 512B + Onboard Storage NO Flash, microSD card (TF) slot for up to 32GB + Video Output HDMI + Extension Interface 2.54mm Headers + Network interface 10/100Mbps RJ45 and USB WiFi extension (not included) + Power 5V, 2000mA + Overall Size 125mm X 52mm + + pcDuino v1 (http://www.pcduino.com/?page_id=12) + + ITEMS DETAILS + -------------------- --------------------------------------------------- + Items Details + CPU 1GHz ARM Cortex A8 + GPU OpenGL ES2.0, OpenVG 1.1 Mali 400 core + * DRAM 1GB + * Onboard Storage 2GB Flash, microSD card (TF) slot for up to 32GB + Video Output HDMI + Extension Interface 2.54mm Headers + Network interface 10/100Mbps RJ45 and USB WiFi extension (not included) + Power 5V, 2000mA + Overall Size 125mm X 52mm + + pcDuino v2 (http://www.pcduino.com/?page_id=1618) + + ITEMS DETAILS + -------------------- --------------------------------------------------- + Items Details + CPU 1GHz ARM Cortex A8 + GPU OpenGL ES2.0, OpenVG 1.1 Mali 400 core + DRAM 1GB + Onboard Storage 2GB Flash, microSD card (TF) slot for up to 32GB + Video Output HDMI + * Extension Interface Arduino Headers + * Network interface 10/100Mbps RJ45 and on-board WiFi module + Power 5V, 2000mA + Overall Size 125mm X 52mm + + Main features of the Allwinner A10 + (See http://www.allwinnertech.com/en/product/a10.html): + + CPU + - ARM Cortex™-A8 + - 32KB I-Cache + - 32KB D-Cache + - 256KB L2 Cache + + GPU + - ARM Mali-400 + + Video + - UHD 2160P video decoding + - 3D video decoding + - Support various video decoding formats, including VP8, AVS, H. 264 + MVC, VC-1, MPEG-1,2,4, etc + - H.264 HP video encoding up to 1080p @ 30 fps or dual-channel 720p @ 30 + fps + + Display + - Multi-channel HD display + - Integrated HDMI 1.4 + - YPbPr, CVBS, VGA + - Multiple LCD interfaces, including CPU, RGB, LVDS up to Full HD + + Memory + - 32-bit DDR2/DDR3 + - Memory capacity up to 16G bits + - SLC/MLC/TLC/DDR NAND + - 8 flash chips, 64-bit ECC + + Memory capacity up to 64GB + Support NAND of 5xnm, 4xnm, 3xnm, 2xnm, etc + Support NAND of Samsung, Toshiba, Hynix, etc + + Boot Devices + - NAND Flash + - SPI NOR Flash + - SD Card + - USB + +Contents +======== + + - pcDuino v1 Connectors + - Serial Console + - LEDs + - Buttons + - JTAG + - Booting NuttX from an SD card + - Configurations + +pcDuino v1 Connectors +===================== + + TOP + --- + - HDMI + - RJ45 + - USB Host (2) + + - J11 + 1. UART-Rx / GPIO0 UART2_RX + 2. UART-Tx / GPIO1 UART2_TX + 3. GPIO3 / GPIO2 GPIO2 + 4. PWM0 / GPIO3 PWM0 + 5. GPIO4 GPIO3 + 6. PWM1 / GPIO5 PWM1 + 7. PWM2 /GPIO6 PWM2 + 8. GPIO7 GPIO4 + + - J8 + 1. GPIO8 GPIO5 + 2. PWM3 / GPIO9 PWM3 + 3. SPI_CS / GPIO10 / PWM4 SPI0_CS + 4. SPI_MOSI / GPIO11 / PWM5 SPI0_MOSI + 5. SPI_MISO / GPIO12 SPI0_MISO + 6. SPI_CLK / GPIO13 SPI0_CLK + 7. Gnd + 8. ARef + 9. I2C-SDA TWI2_SDA + 10. I2C-SCK TWI2_SCK + + - J12 + 1. ADC0 + 2. ADC1 + 3. ADC2 + 4. ADC3 + 5. ADC4 + 6. ADC5 + + - J9 + 1. 5V + 2. Gnd + 3. Gnd + 4. 5V + 5. 3.3V + 6. Reset + 7. 5V + 8. NC + + - J5 Debug Port + 1. Rx UART0-RX + 2. Gnd GND + 3. Tx UART0-TX + + - J6 SPI2 + 1. SPI2_MISO + 2. DC_5V + 3. SPI2_CLK + 4. SPI2_MOSI + 5. RESET# + 6. GND + + - J7 SPI0 + 1. SPI0_MISO + 2. DC_5V + 3. SPI0_CLK + 4. SPI0_MOSI + 5. RESET# + 6. GND + + - J10 + 1. GPIO6 + 2. GPIO8 + 3. GPIO7 + 4. GPIO9 + + Bottom + ------ + - USB OTG + - DC Power IN (USB) + - microSD card slot + +Serial Console +============== + + 1. UART0 is available on J5 Debug Port. + + J15 Pin 1 Rx UART0-RX UART0_RX/IR1_RX/PB23 + J15 Pin 3 Tx UART0-TX UART0_TX/IR1_TX/PB22 + + 2. UART2 is available on J11 + + J11 Pin1 UART-Rx / GPIO0 UART2_RX EINT31/SPI1_MISO/UART2_RX/PI19 + J11 Pin2 UART-Tx / GPIO1 UART2_TX EINT30/SPI1_MOSI/UART2_TX/PI18 + + By default, the serial console will be provided on UART0 in all of these + configurations. + +LEDs +==== + + The pcDuino v1 has four green LEDs; three can be controlled from software. + Two are tied to ground and, hence, illuminated by driving the output pins + to a high value: + + 1. LED1 SPI0_CLK SPI0_CLK/UART5_RX/EINT23/PI11 + 2. LED5 IPSOUT From the PMU (not controllable by software) + + And two are pull high and, hence, illuminated by grounding the output: + + 3. LED3 RX_LED LCD1_D16/ATAD12/KP_IN6/SMC_DET/EINT16/CSI1_D16/PH16 + 4. LED4 TX_LED LCD1_D15/ATAD11/KP_IN5/SMC_VPPPP/EINT15/CSI1_D15/PH15 + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related + events as follows: + + SYMBOL Meaning LED state + LED1 LED3 LED4 + ----------------- ----------------------- ---- ---- ------------ + LED_STARTED NuttX has been started ON OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF ON OFF + LED_IRQSENABLED Interrupts enabled ON ON OFF + LED_STACKCREATED Idle stack created ON ON OFF + LED_INIRQ In an interrupt N/C N/C Soft glow + LED_SIGNAL In a signal handler N/C N/C Soft glow + LED_ASSERTION An assertion failed N/C N/C Soft glow + LED_PANIC The system has crashed N/C N/C 2Hz Flashing + LED_IDLE MCU is is sleep mode Not used + + After booting, LED1 and 3 are not longer used by the system and can be used for + other purposes by the application (Of course, all LEDs are available to the + application if CONFIG_ARCH_LEDS is not defined. + +Buttons +======= + + There are a total of five switches on-board. All pulled high and, hence, + will be sensed as low when closed. + + SW1 Reset (not available to software) + SW2 UBOOT UBOOT_SEL (?) + SW3 Key_Back LCD1_D17/ATAD13/KP_IN7/SMC_VCCEN/EINT17/CSI1_D17/PH17 + SW4 Key_Home LCD1_D18/ATAD14/KP_OUT0/SMC_SLK/EINT18/CSI1_D18/PH18 + SW5 Key_Menu LCD1_D19/ATAD15/KP_OUT1/SMC_SDA/EINT19/CSI1_D19/PH19 + +JTAG +==== + + A. I didn't get success testing J-Link with pcDuino, it is reading TDI + always as 1. + + I think the main problem is because pcDuino JTAG doesn't have RESET + (no trst or srst). I tried to connect the JTAG reset to Power_Reset + of pcDuino, but it didn't work. + + B. Notice that the OlinuxIno JTAG does have a reset line called RESET_N. + But it is nothing special. It just connects to the RESET# pin C14 on + the A10. The pcDuino also brings out the RESET# on several connectors. + + So it seems like you could get the reset line if you need it, just not + from the set of JTAG pads. + + A. I discovered the issue in the JTAG, it was not working because + JTAG_SEL was not tied to GND. + + I compared the Olimex schematic with pcDuino and noticed there is a + R64 resister that is not placed in the board. + + It was a little bit difficult to find this resistor, because it is + "hidden" among the capacitors in the bottom of the board. + + After short circuiting the resistor PADs the JTAG started to work, + well, JLinkExe now recognize it, but OpenOCD is not working yet. + +Booting NuttX from an SD card +============================= + + These are the steps to get U-Boot booting from SD Card: + + 1. Get the U-Boot sources for the pcDuino + + $ git clone https://github.com/yuq/u-boot-sunxi.git + + 2. Build U-Boot. We really only want the SPL program; this builds + the whole thing: + + $ cd u-boot-sunxi + $ make pcduino CROSS_COMPILE=arm-none-eabi- + + At the conclusion of a success bin, you will find the u-boot binary + at ./u-boot.bin and the SPL binary at ./spl/sunxi-spl.bin + + NOTES: + a. You may need to use a different tool prefix for the CROSS_COMPILE= + value, depending upon what toolchain you have installed and upon + which platform your are working. + b. When I try this on Cygwin, I get a make failure that is, apparently, + due to some script incompatibility. + + 3. Insert a FLASH stick. Use dmesg to get the name of the new USB + device. Make sure that it is not mounted, then (assuming that the + USB device is /dev/sdb): + + $ sudo dd if=./spl/sunxi-spl.bin of=/dev/sdb bs=1024 seek=8 + $ sudo dd if=nuttx.bin of=/dev/sdb bs=1024 seek=32 + + 4. Remove the FLASH stick from the host pc. Insert into the pcDuino + microSD slot. Reset the pcDuino and NuttX should be running. + + Reference: https://www.olimex.com/wiki/Bare_Metal_programming_A13#Stand_alone_program_running_with_uboot + +Configurations +============== + + Information Common to All Configurations + ---------------------------------------- + Each pcDuino configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh pcduino-a10/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on UART0. + + 3. All of these configurations use the Code Sourcery for Windows toolchain + (unless stated otherwise in the description of the configuration). That + toolchain selection can easily be reconfigured using 'make menuconfig'. + Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Microsoft Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin or other POSIX environment + + System Type -> Toolchain: + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + The setenv.sh file is available for you to use to set the PATH + variable. The path in the that file may not, however, be correct + for your installation. Try 'which arm-none-eabi-gcc' to make sure that + you are selecting the right tool. + + Configuration Sub-directories + ----------------------------- + + nsh: + + This configuration directory provide the NuttShell (NSH). There are + + STATUS: + This configuration builds and runs, but only if the patch at + nuttx/configs/pcduino-a10/nsh/pcduino-140107.patch is applied. This patchfile + contains some fixes that are as-of-yet not well understood and so cannot be checked + in. Below is a summary of the kludges currently in this patch file: + + a) nuttx/arch/arm/src/armv7-a/arm_head.S: Initializes the MMU so that A10 + peripherals can be accessed very early. This is not normally necessary, but + is required because of certain debug statements that seem to be necessary + in a1x_boot.c (see the next item). + + b) nuttx/arch/arm/src/a1x/a1x_boot.c: This file contains several arbitrary + statements that just output debug information. Some of these can be removed, + but if you remove all of the debug output, the pcDuino will not boot. No + idea yet why. + + c) nuttx/arch/arm/src/armv7-a/arm_mmu.c: After setting a page table entry + for the MMU, the MMU's TLBs are flushed for that memory region. That + flushing must currently be commented out. Why? I am not sure, but I + think that this is because TLBs are being flushed why they are in use. For + the pcDuino, we are executing out of SDRAM so when the TLBs for the SDRAM + region are invalidated that cause a crash. That has not been proven, + however. diff --git a/configs/pcduino-a10/include/board.h b/configs/pcduino-a10/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..11ea8fa18c6fca36eecbd262f72aedf5ec4817de --- /dev/null +++ b/configs/pcduino-a10/include/board.h @@ -0,0 +1,195 @@ +/************************************************************************************ + * configs/pcduino-a10/include/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_PCDUINO_A10_INCLUDE_BOARD_H +#define __CONFIGS_PCDUINO_A10_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include "chip/a1x_piocfg.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* Since NuttX is booted from a loader on the A10, clocking should already be setup + * when NuttX starts. + */ + +/* LED definitions ******************************************************************/ +/* The pcDuino v1 has four green LEDs; three can be controlled from software. Two + * are tied to ground and, hence, illuminated by driving the output pins to a high + * value: + * + * 1. LED1 SPI0_CLK SPI0_CLK/UART5_RX/EINT23/PI11 + * 2. LED5 IPSOUT From the PMU (not controllable by software) + * + * And two are pull high and, hence, illuminated by grounding the output: + * + * 3. LED3 RX_LED LCD1_D16/ATAD12/KP_IN6/SMC_DET/EINT16/CSI1_D16/PH16 + * 4. LED4 TX_LED LCD1_D15/ATAD11/KP_IN5/SMC_VPPPP/EINT15/CSI1_D15/PH15 + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED3 1 +#define BOARD_LED4 2 +#define BOARD_NLEDS 3 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED3_BIT (1 << BOARD_LED3) +#define BOARD_LED4_BIT (1 << BOARD_LED4) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/a1x_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL Value Meaning LED state + * LED1 LED3 LED4 + * ----------------- ----- ----------------------- ---- ---- ------------ */ + +#define LED_STARTED 0 /* NuttX has been started ON OFF OFF */ +#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF ON OFF */ +#define LED_IRQSENABLED 2 /* Interrupts enabled ON ON OFF */ +#define LED_STACKCREATED 2 /* Idle stack created ON ON OFF */ +#define LED_INIRQ 3 /* In an interrupt N/C N/C Soft glow */ +#define LED_SIGNAL 3 /* In a signal handler N/C N/C Soft glow */ +#define LED_ASSERTION 3 /* An assertion failed N/C N/C Soft glow */ +#define LED_PANIC 3 /* The system has crashed N/C N/C 2Hz Flashing */ + +/* LED_IDLE --- /* MCU is is sleep mode Not used + * + * After booting, LED1 and 3 are not longer used by the system and can be used for + * other purposes by the application (Of course, all LEDs are available to the + * application if CONFIG_ARCH_LEDS is not defined. + */ + +/* Button definitions ***************************************************************/ +/* There are a total of five switches on-board. All pulled high and, hence, will be + * sensed as low when closed. + * + * SW1 Reset (not available to software) + * SW2 UBOOT UBOOT_SEL (?) + * SW3 Key_Back LCD1_D17/ATAD13/KP_IN7/SMC_VCCEN/EINT17/CSI1_D17/PH17 + * SW4 Key_Home LCD1_D18/ATAD14/KP_OUT0/SMC_SLK/EINT18/CSI1_D18/PH18 + * SW5 Key_Menu LCD1_D19/ATAD15/KP_OUT1/SMC_SDA/EINT19/CSI1_D19/PH19 + */ + +#define BUTTON_KEY_BACK 0 +#define BUTTON_KEY_HOME 1 +#define BUTTON_KEY_MENU 2 +#define NUM_BUTTONS 3 + +#define BUTTON_KEY_BACK_BIT (1 << BUTTON_KEY_BACK) +#define BUTTON_KEY_HOME_BIT (1 << BUTTON_KEY_HOME) +#define BUTTON_KEY_MENU_BIT (1 << BUTTON_KEY_MENU) + +/* NAND *****************************************************************************/ + +/* GPIO pin disambiguation **********************************************************/ +/* UARTs ****************************************************************************/ +/* Two UART connections are available: + * + * 1. UART0 is available on J5 Debug Port. + * + * J15 Pin 1 Rx UART0-RX UART0_RX/IR1_RX/PB23 + * J15 Pin 2 Tx UART0-TX UART0_TX/IR1_TX/PB22 + * + * 2. UART2 is available on J11 + * + * J11 Pin1 UART-Rx / GPIO0 UART2_RX EINT31/SPI1_MISO/UART2_RX/PI19 + * J11 Pin2 UART-Tx / GPIO1 UART2_TX EINT30/SPI1_MOSI/UART2_TX/PI18 + */ + +#define PIO_UART0_RX PIO_UART0_RX_1 +#define PIO_UART0_TX PIO_UART0_TX_1 + +#define PIO_UART2_RX PIO_UART2_RX_1 +#define PIO_UART2_TX PIO_UART2_TX_1 + +/************************************************************************************ + * Assembly Language Macros + ************************************************************************************/ + +#ifdef __ASSEMBLY__ + .macro config_sdram + .endm +#endif /* __ASSEMBLY__ */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: a1x_boardinitialize + * + * Description: + * All A1X architectures must provide the following entry point. This entry + * point point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void a1x_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_PCDUINO_A10_INCLUDE_BOARD_H */ diff --git a/configs/pcduino-a10/include/board_memorymap.h b/configs/pcduino-a10/include/board_memorymap.h new file mode 100644 index 0000000000000000000000000000000000000000..bac6723c95c443497d3bab7a4dcf94d0b7c7b7ab --- /dev/null +++ b/configs/pcduino-a10/include/board_memorymap.h @@ -0,0 +1,73 @@ +/************************************************************************************ + * configs/pcduino-a10/include/board_memorymap.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_PCDUINO_A10_INCLUDE_BOARD_MEMORYMAP_H +#define __CONFIGS_PCDUINO_A10_INCLUDE_BOARD_MEMORYMAP_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_PCDUINO_A10_INCLUDE_BOARD_MEMORYMAP_H */ diff --git a/configs/pcduino-a10/nsh/Make.defs b/configs/pcduino-a10/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..82094d510eccadbf5abda86e5368f2e8cc0f5a93 --- /dev/null +++ b/configs/pcduino-a10/nsh/Make.defs @@ -0,0 +1,121 @@ +############################################################################ +# configs/pcduino-a10/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +LDSCRIPT = sdram.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a8 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/pcduino-a10/nsh/defconfig b/configs/pcduino-a10/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..a2bf40bf07f98fae4e7feb795e3d9fbac095788e --- /dev/null +++ b/configs/pcduino-a10/nsh/defconfig @@ -0,0 +1,902 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +CONFIG_ARCH_CHIP_A1X=y +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXA5 is not set +CONFIG_ARCH_CORTEXA8=y +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="a1x" +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_L2CC is not set +# CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set + +# +# A1x Configuration Options +# +CONFIG_ARCH_CHIP_A10=y + +# +# Allwinner A1X Peripheral Support +# +CONFIG_A1X_UART0=y +# CONFIG_A1X_UART1 is not set +# CONFIG_A1X_UART2 is not set +# CONFIG_A1X_UART3 is not set +# CONFIG_A1X_UART4 is not set +# CONFIG_A1X_UART5 is not set +# CONFIG_A1X_UART6 is not set +# CONFIG_A1X_UART7 is not set +# CONFIG_A1X_IR0 is not set +# CONFIG_A1X_IR1 is not set +# CONFIG_A1X_TWI0 is not set +# CONFIG_A1X_TWI1 is not set +# CONFIG_A1X_TWI2 is not set +# CONFIG_A1X_SPI0 is not set +# CONFIG_A1X_SPI1 is not set +# CONFIG_A1X_SPI2 is not set +# CONFIG_A1X_SPI3 is not set +# CONFIG_A1X_NC is not set +# CONFIG_A1X_AC97 is not set +# CONFIG_A1X_TS is not set +# CONFIG_A1X_IIS is not set +# CONFIG_A1X_KEYPAD is not set +# CONFIG_A1X_TIMER1 is not set +# CONFIG_A1X_TIMER2 is not set +# CONFIG_A1X_TIMER3 is not set +# CONFIG_A1X_TIMER4 is not set +# CONFIG_A1X_TIMER5 is not set +# CONFIG_A1X_IRQ_Alarm is not set +# CONFIG_A1X_IRQ_WD is not set +# CONFIG_A1X_CAN is not set +# CONFIG_A1X_DMA is not set +# CONFIG_A1X_PIO is not set +# CONFIG_A1X_TOUCH is not set +# CONFIG_A1X_AUDIO is not set +# CONFIG_A1X_LRADC is not set +# CONFIG_A1X_SDMMC0 is not set +# CONFIG_A1X_SDMMC1 is not set +# CONFIG_A1X_SDMMC2 is not set +# CONFIG_A1X_SDMMC3 is not set +# CONFIG_A1X_NAND is not set +# CONFIG_A1X_USB0 is not set +# CONFIG_A1X_USB1 is not set +# CONFIG_A1X_USB2 is not set +# CONFIG_A1X_USB3 is not set +# CONFIG_A1X_USB4 is not set +# CONFIG_A1X_SCR is not set +# CONFIG_A1X_CSI0 is not set +# CONFIG_A1X_CSI1 is not set +# CONFIG_A1X_LCDC0 is not set +# CONFIG_A1X_LCDC1 is not set +# CONFIG_A1X_MP is not set +# CONFIG_A1X_DEFE0 is not set +# CONFIG_A1X_IRQ_DEBE0 is not set +# CONFIG_A1X_DEFE1 is not set +# CONFIG_A1X_IRQ_DEBE1 is not set +# CONFIG_A1X_PMU is not set +# CONFIG_A1X_TZASC is not set +# CONFIG_A1X_PATA is not set +# CONFIG_A1X_VE is not set +# CONFIG_A1X_SS is not set +# CONFIG_A1X_EMAC is not set +# CONFIG_A1X_HDMI is not set +# CONFIG_A1X_TVE is not set +# CONFIG_A1X_ACE is not set +# CONFIG_A1X_TVD is not set +# CONFIG_A1X_PS20 is not set +# CONFIG_A1X_PS21 is not set +# CONFIG_A1X_PLE is not set +# CONFIG_A1X_IRQ_PERFMU is not set +# CONFIG_A1X_GPU is not set +# CONFIG_A1X_PIO_IRQ is not set +# CONFIG_A1X_BOOT_NAND is not set +# CONFIG_A1X_BOOT_SPINOR is not set +CONFIG_A1X_BOOT_SDCARD=y +# CONFIG_A1X_BOOT_USB is not set +CONFIG_A1X_DDR_MAPOFFSET=0 +CONFIG_A1X_DDR_MAPSIZE=1073741824 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=49341 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x4a000000 +CONFIG_RAM_VSTART=0x4a000000 +CONFIG_RAM_SIZE=905969664 +CONFIG_ARCH_HAVE_SDRAM=y + +# +# Board Selection +# +CONFIG_ARCH_BOARD_PCDUINO_A10=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="pcduino-a10" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=31 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/pcduino-a10/nsh/pcduino-140107.patch b/configs/pcduino-a10/nsh/pcduino-140107.patch new file mode 100644 index 0000000000000000000000000000000000000000..50d4a0aca1a8d81b0fed7fbe622ca8807966ecbd --- /dev/null +++ b/configs/pcduino-a10/nsh/pcduino-140107.patch @@ -0,0 +1,93 @@ +diff --git a/nuttx/arch/arm/src/a1x/a1x_boot.c b/nuttx/arch/arm/src/a1x/a1x_boot.c +index 3cc6323..ad42790 100644 +--- a/nuttx/arch/arm/src/a1x/a1x_boot.c ++++ b/nuttx/arch/arm/src/a1x/a1x_boot.c +@@ -312,12 +312,14 @@ void up_boot(void) + * for all IO regions (Including the vector region). + */ + ++lowsyslog(LOG_INFO, "Calling a1x_setupmappings\n"); // REMOVE ME + a1x_setupmappings(); + + /* Provide a special mapping for the IRAM interrupt vector positioned in + * high memory. + */ + ++lowsyslog(LOG_INFO, "Calling a1x_vectormapping\n"); // REMOVE ME + a1x_vectormapping(); + + #endif /* CONFIG_ARCH_ROMPGTABLE */ +@@ -326,16 +328,19 @@ void up_boot(void) + * arm_vector.S + */ + ++lowsyslog(LOG_INFO, "Calling a1x_copyvectorblock\n"); // REMOVE ME + a1x_copyvectorblock(); + + /* Initialize the FPU */ + + #ifdef CONFIG_ARCH_FPU ++lowsyslog(LOG_INFO, "Calling arm_fpuconfig\n"); // REMOVE ME + arm_fpuconfig(); + #endif + + /* Perform common, low-level chip initialization (might do nothing) */ + ++lowsyslog(LOG_INFO, "Calling a1x_lowsetup\n"); // REMOVE ME + a1x_lowsetup(); + + /* Perform early serial initialization if we are going to use the serial +@@ -343,6 +348,7 @@ void up_boot(void) + */ + + #ifdef USE_EARLYSERIALINIT ++lowsyslog(LOG_INFO, "Calling up_earlyserialinit\n"); // REMOVE ME + up_earlyserialinit(); + #endif + +@@ -353,6 +359,7 @@ void up_boot(void) + */ + + #ifdef CONFIG_BUILD_PROTECTED ++lowsyslog(LOG_INFO, "Calling a1x_userspace\n"); // REMOVE ME + a1x_userspace(); + #endif + +@@ -362,5 +369,7 @@ void up_boot(void) + * - Configuration of board specific resources (PIOs, LEDs, etc). + */ + ++lowsyslog(LOG_INFO, "Calling a1x_boardinitialize\n"); // REMOVE ME + a1x_boardinitialize(); ++lowsyslog(LOG_INFO, "Returning\n"); // REMOVE ME + } +diff --git a/nuttx/arch/arm/src/armv7-a/arm_head.S b/nuttx/arch/arm/src/armv7-a/arm_head.S +index bce82d5..924bd24 100644 +--- a/nuttx/arch/arm/src/armv7-a/arm_head.S ++++ b/nuttx/arch/arm/src/armv7-a/arm_head.S +@@ -220,6 +220,12 @@ __start: + teq r0, r2 + bne .Lpgtableclear + ++ movw r1, #0x0416 // REMOVE ME ++ movt r1, #0x01c0 ++ movw r2, #0x4070 ++ movt r2, #0x0000 ++ str r1, [r2] ++ + #ifdef ARMV7A_PGTABLE_MAPPING + /* If the page table does not lie in the same address space as does the + * mapped RAM in either case. So we will need to create a special +diff --git a/nuttx/arch/arm/src/armv7-a/arm_mmu.c b/nuttx/arch/arm/src/armv7-a/arm_mmu.c +index f82490c..5c16e48 100644 +--- a/nuttx/arch/arm/src/armv7-a/arm_mmu.c ++++ b/nuttx/arch/arm/src/armv7-a/arm_mmu.c +@@ -94,7 +94,7 @@ void mmu_l1_setentry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags) + + /* Invalidate the TLB cache associated with virtual address range */ + +- mmu_invalidate_region(vaddr, 1024*1024); ++// mmu_invalidate_region(vaddr, 1024*1024); + } + #endif + diff --git a/configs/pcduino-a10/nsh/setenv.sh b/configs/pcduino-a10/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..4877f86e81b508eae6a8c57f12b8d7b3bbada7e7 --- /dev/null +++ b/configs/pcduino-a10/nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/pcduino-a10/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/pcduino-a10/scripts/sdram.ld b/configs/pcduino-a10/scripts/sdram.ld new file mode 100644 index 0000000000000000000000000000000000000000..414c408a4ac8cf787d40db6131228b2ed6c8c75d --- /dev/null +++ b/configs/pcduino-a10/scripts/sdram.ld @@ -0,0 +1,118 @@ +/**************************************************************************** + * configs/pcduino-a10/scripts/sdram.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The pcDuino and 1GB of SDRAM beginning at virtual address 0x4000:0000. + * Execution begins at address 0x4a00000, leaving 864MB for NuttX. + */ + +MEMORY +{ + sdram (W!RX) : ORIGIN = 0x4a000000, LENGTH = 864M +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _etext = ABSOLUTE(.); + } > sdram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > sdram + + .ARM.extab : { + *(.ARM.extab*) + } > sdram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > sdram + PROVIDE_HIDDEN (__exidx_end = .); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sdram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sdram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/pcduino-a10/src/Makefile b/configs/pcduino-a10/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..9ec24b5a19b50db39f83130cbf572dff136b2603 --- /dev/null +++ b/configs/pcduino-a10/src/Makefile @@ -0,0 +1,49 @@ +############################################################################ +# configs/pcduino-a10/src/Makefile +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = a1x_boot.c a1x_leds.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += a1x_appinit.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += a1x_buttons.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/pcduino-a10/src/a1x_boot.c b/configs/pcduino-a10/src/a1x_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..951e8a87750282b41a237046134019461fa50740 --- /dev/null +++ b/configs/pcduino-a10/src/a1x_boot.c @@ -0,0 +1,102 @@ +/************************************************************************************ + * configs/pcduino-a10/src/a1x_boot.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "pcduino_a10.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: a1x_boardinitialize + * + * Description: + * All A1x architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void a1x_boardinitialize(void) +{ + /* Configure on-board LEDs. */ + + a1x_led_initialize(); +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + (void)board_app_initialize(); +#endif +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/pcduino-a10/src/a1x_buttons.c b/configs/pcduino-a10/src/a1x_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..1802b3656d8937ea45815011f59cf339979d9ec4 --- /dev/null +++ b/configs/pcduino-a10/src/a1x_buttons.c @@ -0,0 +1,156 @@ +/**************************************************************************** + * configs/pcduino-a10/src/a1x_buttons.c + * + * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "pcduino_a10.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +static xcpt_t g_irqbutton[BOARD_NBUTTONS]; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ +# warning Missing logic +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON* definitions + * above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ +# warning Missing logic +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address isreturned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_ARCH_IRQBUTTONS must be selected to enable the + * overall GPIO IRQ feature. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id < BOARD_NBUTTONS) + { + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = g_irqbutton[id]; + g_irqbutton[id] = irqhandler; + + /* Configure the interrupt */ + + a1x_pioirq(xxx); + (void)irq_attach(xxx, irqhandler); + a1x_pioirqenable(xxx); + leave_critical_section(flags); + } + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/pcduino-a10/src/a1x_leds.c b/configs/pcduino-a10/src/a1x_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..1801625f51668cc8b5f0642567a48b248526b182 --- /dev/null +++ b/configs/pcduino-a10/src/a1x_leds.c @@ -0,0 +1,274 @@ +/**************************************************************************** + * configs/pcduino-a10/src/a1x_leds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "pcduino_a10.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* The pcDuino v1 has four green LEDs; three can be controlled from software. + * Two are tied to ground and, hence, illuminated by driving the output pins + * to a high value: + * + * 1. LED1 SPI0_CLK SPI0_CLK/UART5_RX/EINT23/PI11 + * 2. LED5 IPSOUT From the PMU (not controllable by software) + * + * And two are pull high and, hence, illuminated by grounding the output: + * + * 3. LED3 RX_LED LCD1_D16/ATAD12/KP_IN6/SMC_DET/EINT16/CSI1_D16/PH16 + * 4. LED4 TX_LED LCD1_D15/ATAD11/KP_IN5/SMC_VPPPP/EINT15/CSI1_D15/PH15 + + * These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL Meaning LED state + * LED1 LED3 LED4 + * ----------------- ----------------------- ---- ---- ---- ------------ + * LED_STARTED NuttX has been started ON OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF ON OFF + * LED_IRQSENABLED Interrupts enabled ON ON OFF + * LED_STACKCREATED Idle stack created ON ON OFF + * LED_INIRQ In an interrupt N/C N/C Soft glow + * LED_SIGNAL In a signal handler N/C N/C Soft glow + * LED_ASSERTION An assertion failed N/C N/C Soft glow + * LED_PANIC The system has crashed N/C N/C 2Hz Flashing + * LED_IDLE MCU is is sleep mode Not used + * + * After booting, LED1 and 3 are not longer used by the system and can be used for + * other purposes by the application (Of course, all LEDs are available to the + * application if CONFIG_ARCH_LEDS is not defined. + */ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: a1x_led_initialize + * + * Description: + * Configure LEDs. LEDs are left in the OFF state. + * + ****************************************************************************/ + +void a1x_led_initialize(void) +{ + a1x_pio_config(PIO_LED1); + a1x_pio_config(PIO_LED3); + a1x_pio_config(PIO_LED4); +} + +/**************************************************************************** + * Name: board_autoled_on + * + * Description: + * Select the "logical" ON state: + * + * SYMBOL Value Meaning LED state + * LED1 LED3 LED4 + * ----------------- ----- ----------------------- ---- ---- ------------ + * LED_STARTED 0 NuttX has been started ON OFF OFF + * LED_HEAPALLOCATE 1 Heap has been allocated OFF ON OFF + * LED_IRQSENABLED 2 Interrupts enabled ON ON OFF + * LED_STACKCREATED 2 Idle stack created ON ON OFF + * LED_INIRQ 3 In an interrupt N/C N/C Soft glow + * LED_SIGNAL 3 In a signal handler N/C N/C Soft glow + * LED_ASSERTION 3 An assertion failed N/C N/C Soft glow + * LED_PANIC 3 The system has crashed N/C N/C 2Hz Flashing + * LED_IDLE --- MCU is is sleep mode Not used + * + * LED1 is illuminated by driving the output pins to a high value + * LED3 and LED 4 are illuminated by taking the output to ground. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_on(int led) +{ + switch (led) + { + case 0: + a1x_pio_write(PIO_LED1, true); + a1x_pio_write(PIO_LED3, true); + a1x_pio_write(PIO_LED4, true); + break; + + case 1: + a1x_pio_write(PIO_LED1, false); + a1x_pio_write(PIO_LED3, false); + a1x_pio_write(PIO_LED4, true); + break; + + case 2: + a1x_pio_write(PIO_LED1, false); + a1x_pio_write(PIO_LED3, true); + a1x_pio_write(PIO_LED4, true); + break; + + case 3: + a1x_pio_write(PIO_LED4, false); + break; + } +} +#endif + +/**************************************************************************** + * Name: board_autoled_off + * + * Description: + * Select the "logical" OFF state: + * + * SYMBOL Value Meaning LED state + * LED1 LED3 LED4 + * ----------------- ----- ----------------------- ---- ---- ------------ + * LED_STARTED 0 NuttX has been started ON OFF OFF + * LED_HEAPALLOCATE 1 Heap has been allocated OFF ON OFF + * LED_IRQSENABLED 2 Interrupts enabled ON ON OFF + * LED_STACKCREATED 2 Idle stack created ON ON OFF + * LED_INIRQ 3 In an interrupt N/C N/C Soft glow + * LED_SIGNAL 3 In a signal handler N/C N/C Soft glow + * LED_ASSERTION 3 An assertion failed N/C N/C Soft glow + * LED_PANIC 3 The system has crashed N/C N/C 2Hz Flashing + * LED_IDLE --- MCU is is sleep mode Not used + * + * LED1 is illuminated by driving the output pins to a high value + * LED3 and LED 4 are illuminated by taking the output to ground. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_off(int led) +{ + switch (led) + { + case 0: + case 1: + case 2: + break; + + case 3: + a1x_pio_write(PIO_LED4, true); + break; + } +} +#endif + +/************************************************************************************ + * Name: board_userled_initialize, board_userled, and board_userled_all + * + * Description: + * These interfaces allow user control of the board LEDs. + * + * If CONFIG_ARCH_LEDS is defined, then NuttX will control both on-board LEDs up + * until the completion of boot. The it will continue to control LED2; LED1 is + * avaiable for application use. + * + * If CONFIG_ARCH_LEDS is not defined, then both LEDs are available for application + * use. + * + ************************************************************************************/ + +void board_userled_initialize(void) +{ + /* Initialization already performed in a1x_led_initialize */ +} + +void board_userled(int led, bool ledon) +{ + switch (led) + { + case BOARD_LED1: + a1x_pio_write(PIO_LED1, ledon); + break; + + case BOARD_LED3: + a1x_pio_write(PIO_LED3, !ledon); + break; + +#ifndef CONFIG_ARCH_LEDS + case BOARD_LED4: + a1x_pio_write(PIO_LED4, !ledon); + break; +#endif + } +} + +void board_userled_all(uint8_t ledset) +{ + board_userled(BOARD_LED1, (ledset & BOARD_LED1) != 0); + board_userled(BOARD_LED3, (ledset & BOARD_LED3) != 0); +#ifndef CONFIG_ARCH_LEDS + board_userled(BOARD_LED4, (ledset & BOARD_LED4) != 0); +#endif +} diff --git a/configs/pcduino-a10/src/pcduino_a10.h b/configs/pcduino-a10/src/pcduino_a10.h new file mode 100644 index 0000000000000000000000000000000000000000..16dd0bc61b7dcf2a5804e69d1768a1075eed659a --- /dev/null +++ b/configs/pcduino-a10/src/pcduino_a10.h @@ -0,0 +1,159 @@ +/************************************************************************************ + * configs/pcduino-a10/src/pcduino-a10.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_PCDUINO_A10_PCDUINO_A10_H +#define __CONFIGS_PCDUINO_A10_PCDUINO_A10_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +#include +#include + +#include "a1x_pio.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +/* LEDs *****************************************************************************/ +/* The pcDuino v1 has four green LEDs; three can be controlled from software. Two + * are tied to ground and, hence, illuminated by driving the output pins to a high + * value: + * + * 1. LED1 SPI0_CLK SPI0_CLK/UART5_RX/EINT23/PI11 + * 2. LED5 IPSOUT From the PMU (not controllable by software) + */ + +#define PIO_LED1 (PIO_OUTPUT | PIO_PULL_NONE | PIO_DRIVE_MEDLOW | PIO_INT_NONE | \ + PIO_OUTPUT_CLEAR | PIO_PORT_PIOI | PIO_PIN11) + +/* And two are pull high and, hence, illuminated by grounding the output: + * + * 3. LED3 RX_LED LCD1_D16/ATAD12/KP_IN6/SMC_DET/EINT16/CSI1_D16/PH16 + * 4. LED4 TX_LED LCD1_D15/ATAD11/KP_IN5/SMC_VPPPP/EINT15/CSI1_D15/PH15 + */ + +#define PIO_LED3 (PIO_OUTPUT | PIO_PULL_NONE | PIO_DRIVE_MEDLOW | PIO_INT_NONE | \ + PIO_OUTPUT_SET | PIO_PORT_PIOH | PIO_PIN16) + +#define PIO_LED4 (PIO_OUTPUT | PIO_PULL_NONE | PIO_DRIVE_MEDLOW | PIO_INT_NONE | \ + PIO_OUTPUT_SET | PIO_PORT_PIOH | PIO_PIN15) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL Meaning LED state + * LED1 LED3 LED4 + * ----------------- ----------------------- ---- ---- ---- ------------ + * LED_STARTED NuttX has been started ON OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF ON OFF + * LED_IRQSENABLED Interrupts enabled ON ON OFF + * LED_STACKCREATED Idle stack created ON ON OFF + * LED_INIRQ In an interrupt N/C N/C Soft glow + * LED_SIGNAL In a signal handler N/C N/C Soft glow + * LED_ASSERTION An assertion failed N/C N/C Soft glow + * LED_PANIC The system has crashed N/C N/C 2Hz Flashing + * LED_IDLE MCU is is sleep mode Not used + * + * After booting, LED1 and 3 are not longer used by the system and can be used for + * other purposes by the application (Of course, all LEDs are available to the + * application if CONFIG_ARCH_LEDS is not defined. + */ + +/* Buttons **************************************************************************/ +/* There are a total of five switches on-board. All pulled high and, hence, will be + * sensed as low when closed. + * + * SW1 Reset (not available to software) + * SW2 UBOOT UBOOT_SEL (?) + * SW3 Key_Back LCD1_D17/ATAD13/KP_IN7/SMC_VCCEN/EINT17/CSI1_D17/PH17 + * SW4 Key_Home LCD1_D18/ATAD14/KP_OUT0/SMC_SLK/EINT18/CSI1_D18/PH18 + * SW5 Key_Menu LCD1_D19/ATAD15/KP_OUT1/SMC_SDA/EINT19/CSI1_D19/PH19 + */ + +#ifdef CONFIG_A1X_PIO_IRQ +# define PIO_KEY_BACK (PIO_EINT | PIO_PULL_NONE | PIO_DRIVE_NONE | \ + PIO_INT_BOTHEDGES | IO_PORT_PIOH | PIO_PIN17) +# define PIO_KEY_HOME (PIO_EINT | PIO_PULL_NONE | PIO_DRIVE_NONE | \ + PIO_INT_BOTHEDGES | IO_PORT_PIOH | PIO_PIN18) +# define PIO_KEY_MENU (PIO_EINT | PIO_PULL_NONE | PIO_DRIVE_NONE | \ + PIO_INT_BOTHEDGES | IO_PORT_PIOH | PIO_PIN19) +#else +# define PIO_KEY_BACK (PIO_INPUT | PIO_PULL_NONE | PIO_DRIVE_NONE | \ + PIO_INT_NONE | IO_PORT_PIOH | PIO_PIN17) +# define PIO_KEY_HOME (PIO_INPUT | PIO_PULL_NONE | PIO_DRIVE_NONE | \ + PIO_INT_NONE | IO_PORT_PIOH | PIO_PIN18) +# define PIO_KEY_MENU (PIO_INPUT | PIO_PULL_NONE | PIO_DRIVE_NONE | \ + PIO_INT_NONE | IO_PORT_PIOH | PIO_PIN19) +#endif + +/* SPI Chip Selects *****************************************************************/ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: a1x_led_initialize + * + * Description: + * Configure LEDs. LEDs are left in the OFF state. + * + ****************************************************************************/ + +void a1x_led_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_PCDUINO_A10_PCDUINO_A10_H */ diff --git a/configs/pic32mx-starterkit/Kconfig b/configs/pic32mx-starterkit/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..73433a1e47733a33185be79c7a7f954443b1a9f0 --- /dev/null +++ b/configs/pic32mx-starterkit/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_PIC32MX_STARTERKIT +endif diff --git a/configs/pic32mx-starterkit/README.txt b/configs/pic32mx-starterkit/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..f89cf1466342999a406d716618e97bf890bd580e --- /dev/null +++ b/configs/pic32mx-starterkit/README.txt @@ -0,0 +1,1210 @@ +configs/pic32mx-starterkit README +=============================== + + +This README file discusses the port of NuttX to the Microchip PIC32 Ethernet +Starter Kit (DM320004) with either + + 1) The Multimedia Expansion Board (MEB, DM320005), or + 2) The Starter Kit I/O Expansion Board + +See www.microchip.com for further information. + +The PIC32 Ethernet Starter Kit includes: + +- PIC32MX795F512L 32-bit microcontroller. +- PIC32MX795F512L USB microcontroller for on-board debugging. +- Green power indicator LED. +- Orange debug indicator LED. +- Three user-defined indicator LEDs. +- Ethernet 10/100 bus speed indicator LED. +- Three push button switches for user-defined inputs. +- On-board crystal for precision microcontroller clocking (8 MHz). +- 50 MHz Ethernet PHY oscillator. +- 32 kHz oscillator (optional). +- USB connectivity for on-board debugger communications. +- USB Host and OTG power supply for powering PIC32 USB applications. +- USB Type A receptacle connectivity for PIC32 host-based applications. +- USB Type micro-AB receptacle for OTG and USB device connectivity for PIC32 + OTG/device-based applications. +- RJ-45 Ethernet port (External Ethernet PHY). + +The MEB adds: + +- 3.2 inch (8.1 cm) QVGA touch screen display with backlight +- Solomon Systech Graphics Controller (SSD1926) +- Five user-controlled LEDs +- Power LED +- Four-way joystick +- Fire button +- Headphone jack +- Line output jack +- Microphone input jack +- microSD card slot. +- Accelerometer and temperature sensor +- 24LC08 EEPROM. +- SPI Flash +- 24-bit audio codec +- CPLD for SPI and Chip Select configuration +- Integrated 802.11 wireless connectivity + +The Starter Kit I/O Expansion Board: + +Mostly just brings out all of the pins from the tiny Starter Kit connector. + +Contents +======== + + PIC32MX795F512L Pin Out + MEB Connector + PICtail + Serial Output using the + Toolchains + Creating Compatible NuttX HEX files + Serial Console: MEB + Serial Console: Starter Kit I/O Expansion Board + LEDs + PIC32MX Configuration Options + Configurations + +PIC32MX795F512L Pin Out +======================= + +LEFT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) +--- ---------------------------------- -------------------------- ----------------------------------------------- +PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + (Family Data Sheet Table 1-1) (Starter Kit User Guide) +--- ---------------------------------- -------------------------- ----------------------------------------------- + 1 RG15/AERXERR ERXERR Ethernet RX_ER/MDIX_IN + 2 VDD P32_VDD --- + 3 PMD5/RE5 PMPD5/RE5 J2 pin 13 + 4 PMD6/RE6 PMPD6/RE6 J2 pin 9 + 5 PMD7/RE7 PMPD7/RE7 J2 pin 7 + 6 RC1/T2CK T2CLK/RC1 J2 pin 35 (timer) + 7 RC2/AC2TX/T3CK T3CLK/RC2 J2 pin 37 (timer) + 8 RC3/AC2RX/T4CK T4CLK/RC3 J2 pin 39 (timer) + 9 RC4/SDI1/T5CK SDI1/T4CLK/RC4 J2 pin 41 (timer) + J2 pin 93 (SPI1) + 10 PMA5/CN8/ECOL/RG6/SCK2/U3RTS/U6TX PMPA5/SCM2C/CN8/RG6 J2 pin 45 (SPI2) + J2 pin 117 (PMP address) + 11 PMA4/CN9/ECRS/RG7/SDA4/SDI2/U3RX PMPA4/SCM2A/CN9/RG7 J2 pin 47 (SPI2) + J2 pin 119 (PMP address) + 12 PMA3/AECRSDV/AERXDV/CN10/ECRSDV/ ECRS_DV Ethernet CRS/CRS_DV/LED_CFG + ERXDV/RG8/SCL4/SDO2/U3TX + 13 MCLR PIC32_MCLR (pulled up) + PIC32MX440F512H debug processor + J2 pin 130 (ICSP) + 14 PMA2/AEREFCLK/AERXCLK/CN11/ EREF_CLK 50MHz clock, Ethernet X1 + EREFCLK/ERXCLK/RG9/SS2/U3CTS/ + U6RX + 15 VSS (grounded) --- + 16 VDD P32_VDD --- + 17 RA0/TMS TMS/RA0 J2 pin 126 (JTAG/GPIO) + 18 AERXD0/INT1/RE8 ERXD0(2) Ethernet RXD_0/PHYAD1 + 19 AERXD1/INT2/RE9 ERXD1(2) Ethernet RXD_1/PHYAD2 + 20 AN5/C1IN+/CN7/RB5/VBUSON VBUSON/C1IN+/AN5/CN7/RB5 USB host power supply, TPS20x1B ~EN, + Low enables power to host port (J4) + USB OTG power supply, MCP1253_MSOP ~SHDN + Enables power to device/OTG port (J5) + J2 pin 63 (comparator 1) + J2 pin 62 (A/D) + 21 AN4/C1IN-/CN6/RB4 USBOEN/C1IN-/AN4/CN6/RB4 J2 pin 65 (comparator 1) + J2 pin 64 (A/D) + 22 AN3/C2IN+/CN5/RB3 C2IN+/AN3/CN5/RB3 TPS20x1B ~OC, sense host port power + MCP1253_MSOP PGOOD, sense device/OTG port power + J2 pin 67 (comparator 2) + J2 pin 66 (A/D) + 23 AN2/C2IN-/CN4/RB2 C2IN-/AN2/CN4/RB2 J2 pin 69 (comparator 2) + J2 pin 101 + J2 pin 68 (A/D) + 24 AN1/CN3/PGEC1/RB1 PGC1/AN1/CN3/RB1 J2 pin 70 (A/D) + 25 AN0/CN2/PGED1/RB0 PGD1/AN0/CN2/RB0 J2 pin 72 (A/D) + +BOTTOM SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) +--- ---------------------------------- -------------------------- ----------------------------------------------- +PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + (Family Data Sheet Table 1-1) (Starter Kit User Guide) +--- ---------------------------------- -------------------------- ----------------------------------------------- + 26 AN6/OCFA/PGEC2/RB6 PIC32_PGC2 PIC32MX440F512H debug processor + J2 pin 128 (ICSP) + 27 AN7/PGED2/RB7 PIC32_PGD2/DBG_SD0 PIC32MX440F512H debug processor + J2 pin 132 (ICSP) + 28 PMA7/AERXD2/CVREF-/RA9 PMPA7/VREF-/RA9 J2 pin 113 (PMP address) + J2 pin 114 (A/D ref) + 29 PMA6/AERXD3/CVREF+/RA10/VREF+ PMPA6/VREF+/RA10 J2 pin 115 (PMP address) + J2 pin 116 (A/D ref) + 30 AVDD P32_VDD --- + 31 AVSS (grounded) --- + 32 AN8/C1OUT/RB8 C1OUT/AN8/RB8 J2 pin 71 + 33 AN9/C2OUT/RB9 C2OUT/AN9/RB9 J2 pin 73 + 34 PMA13/AN10/RB10/CVREFOUT PMPA13/CVREF/AN10 J2 pin 101 (PMP address) + J2 pin 102 (Comparator ref) + 35 PMA12/AETXERR/AN11/ERXERR/RB11 PMPA12/AN11/RB11 J2 pin 103 (PMP address) + 36 VSS (grounded) --- + 37 VDD P32_VDD --- + 38 RA1/TCK TCK/RA1 PIC32MX440F512H debug processor + J2 pin 124 (JTAG/GPIO) + 39 AC1TX/RF13/SCK4/U2RTS/U5TX SCM3D/BCLK2/RF13 J2 pin 106 (UART2) + 40 AC1RX/RF12/SS4/U2CTS/U5RX SCM3C/RF12 J2 pin 108 (UART2) + 41 PMA11/AECRS/AN12/ERXD0/RB12 PMPA11/AN12/RB12 J2 pin 105 (PMP address) + 42 PMA10/AECOL/AN13/ERXD1/RB13 PMPA10/AN13/RB13 J2 pin 107 (PMP address) + 43 PMA1/AETXD3/AN14/ERXD2/PMALH/RB14 PMPA1/AN14/RB14 J2 pin 127 (PMP address) + 44 PMA0/AETXD2/AN15/CN12/ERXD3/OCFB/ PMPA0/AN15/OCFB/CN12 J2 pin 129 (PMP address) + PMALL/RB15 J2 pin 36 + 45 VSS (grounded) --- + 46 VDD P32_VDD --- + 47 AETXD0/CN20/RD14/SS3/U1CTS/U4RX EXTD0(2) Ethernet TXD_0 + 48 AETXD1/CN21/RD15/SCK3/U1RTS/U4TX EXTD1(2) Ethernet TXD_1 + 49 PMA9/CN17/RF4/SDA5/SDI4/U2RX PMPA9/SCM3A/CN17/RF4 J2 pin 109 (PMP address) + J2 pin 110 (UART2) + 50 PMA8/CN18/RF5/SCL5/SDO4/U2TX PMPA8/SCM3B/CN18/RF5 J2 pin 111 (PMP address) + J2 pin 112 (UART2) + +RIGHT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) +--- ---------------------------------- -------------------------- ----------------------------------------------- +PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + (Family Data Sheet Table 1-1) (Starter Kit User Guide) +--- ---------------------------------- -------------------------- ----------------------------------------------- + 75 VSS (grounded) + 74 CN0/RC14/SOSCO/T1CK SOSC0/T1CK/CN0/RC14 32kHz Oscillator, J2 pin (timer) + J2 pin 32 (secondary OSC) + 73 CN1/RC13/SOSCI SOSC1/CN1/RC13 32kHz Oscillator + J2 pin 32 (secondary OSC) + 72 OC1/INT0/RD0/SDO1 SDO1/INT0/OC1/RD0 User LED D4 (high illuminates) + J2 pin 87 (EXT_INT) + J2 pin 95 (SPI1) + J2 pin 46 (OC/PWM) + 71 PMA14/AEMDC/EMDC/IC4/PMCS1/RD11 EMDC Ethernet MDC + 70 PMA15/IC3/PMCS2/RD10/SCK1 SCK1/IC3/PMPCS2/RD10 J2 pin 29 (PMP control) + J2 pin 91 (SPI1) + J2 pin 52 (input capture) + 69 IC2/RD9/SS1 SS1/IC2/RD9 J2 pin 54 (input capture) + 68 AEMDIO/EMDIO/IC1/RD8/RTCC EMDIO Ethernet MDIO + 67 AETXEN/INT4/RA15/SDA1 ETXEN(2) Ethernet TX_EN + 66 AETXCLK/INT3/RA14/SCL1 INT3/SCL1/RA14 Ethernet PWR_DOWN/INT + 65 VSS (grounded) --- + 64 CLKO/OSC2/RC15 8MHz crystal + 63 CLKI/OSC1/RC12 8MHz crystal + 62 VDD P32_VDD --- + 61 RA5/TDO TDO/RA5 PIC32MX440F512H debug processor + J2 pin 118 (JTAG/GPIO) + 60 RA4/TDI TDI/RA4 PIC32MX440F512H debug processor + 59 RA3/SDA2 SDA2/RA3 J2 pin 74 (I2C2) + 58 RA2/SCL2 SCL2/RA2 J2 pin 76 (I2C2) + 57 D+/RG2 D+/RG2 Host port (J4), Device OTG port (J5) + 56 D-/RG3 D-/RG3 Host port (J4), Device OTG port (J5) + 55 VUSB P32_VDD --- + 54 VBUS P32_VBUS --- + 53 RF8/SCL3/SDO3/U1TX SCM1B/RF8 J2 pin 90 (UART1) + 52 RF2/SDA3/SDI3/U1RX SCM1A/RF2 J2 pin 88 (UART1) + 51 RF3/USBID USBID/RF3 Device OTG port (J5) + +TOP SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) +--- ---------------------------------- -------------------------- ----------------------------------------------- +PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + (Family Data Sheet Table 1-1) (Starter Kit User Guide) +--- ---------------------------------- -------------------------- ----------------------------------------------- +100 PMD4/RE4 PMPD4/RE4 J2 pin 15 (PMP data) + 99 PMD3/RE3 PMPD3/RE3 J2 pin 17 (PMP data) + 98 PMD2/RE2 PMPD2/RE2 J2 pin 19 (PMP data) + 97 RG13/TRD0 TRD0/RG13 J2 pin 8 (Trace/GPIO) + 96 RG12/TRD1 TRD1/RG12 J2 pin 5 + 95 RG14/TRD2 TRD2/RG14 J2 pin 3 + 94 PMD1/RE1 PMPD1/RE1 J2 pin 21 (PMP data) + 93 PMD0/RE0 PMPD0/RE0 J2 pin 23 (PMP data) + 92 RA7/TRD3 TRD3/RA7 J2 pin 6 (Trace/GPIO) + 91 RA6/TRCLK TRCLK/RA6 J2 pin 4 (Trace/GPIO) + 90 PMD8/C2RX/RG0 PMPD8/RG0 J2 pin 10 (PMP data) + 89 PMD9/C2TX/ETXERR/RG1 PMPD9/RG1 J2 pin 14 (PMP data) + 88 PMD10/C1TX/ETXD0/RF1 PMPD10/RF1 J2 pin 16 (PMP data) + 87 PMD11/C1RX/ETXD1/RF0 PMPD11/RF0 J2 pin 18 (PMP data) + 86 VDD P32_VDD --- + 85 VCAP/VCORE (capacitor to ground) --- + 84 PMD15/CN16/ETXCLK/RD7 PMPD15/CN16/RD7 Switch SW2 (low when closed) + J2 pin 26 (PMP data) + 83 PMD14/CN15/ETXEN/RD6 PMPD14/CN15/RD6 Switch SW1 (low when closed) + J2 pin 24 (PMP data) + 82 CN14/PMRD/RD5 PMPRD/CN14/RD5 J2 pin 25 + 81 CN13/OC5/PMWR/RD4 PMPWR/OC5/C13/RD4 J2 pin 28 (PMP control) + J2 pin 38 + 80 PMD13/CN19/ETXD3/RD13 CN19/PMPD13/RD13 Switch SW3 (low when closed) + J2 pin 22 (PMP data) + 79 PMD12/ETXD2/IC5/RD12 IC5/PMPD12/RD12 J2 pin 20 (PMP data) + J2 pin 48 + 78 OC4/RD3 OC4/RD3 J2 pin 40 (OC/PWM) + 77 OC3/RD2 OC3/RD2 User LED D5 (high illuminates) + J2 pin 42 (OC/PWM) + 76 OC2/RD1 OC1/RD1 User LED D6 (high illuminates) + J2 pin 44 (OC/PWM) + +MEB Connector +============= + +The following table summarizes how the pins brought the MEB through the +J2 on the Ethernet Starter Kit are mapped. This connect is J2 on the Ethernet +Starter Kit and J3 on the MEB. + + J3 +PIC32 SIGNAL PIN CONNECTION +-------------------------- ------- ---------------------------------- +PMPD0 pin 23 Graphics Controller (SSD1926) +PMPD1 pin 21 8-bit or 16-bit Data Bus +PMPD2 pin 19 +PMPD3 pin 17 +PMPD4 pin 15 +PMPD6 pin 9 +PMPD7 pin 7 +-------------------------- ------- ---------------------------------- +PMPD8 pin 10 Graphics Controller (SSD1926) +PMPD9 pin 14 16-bit Data Bus +PMPD10 pin 16 +PMPD11 pin 18 +PMPD12 pin 20 +PMPD13 pin 22 +PMPD14 pin 24 +PMPD15 pin 26 +-------------------------- ------- ---------------------------------- + Graphics Controller (SSD1926) +RG13 pin 8 Chip select +RB10 pin 101 Register select +RC3 pin 39 Wait line +RA10 pin 115 Reset (see MRF24WBOMA and PICtail) +-------------------------- ------- ---------------------------------- + Touchscreen +RB11 pin 103 X+ +RB12 pin 105 Y- +RB13 pin 107 X- +RB14 pin 127 Y+ +-------------------------- ------- ---------------------------------- + Joystick +CN2/RB0 pin 72 Left +CN3/RB1 pin 70 Up +CN5/RB3 pin 66 Down +CN6/RB4 pin 64 Right +CN12/RB15 pin 36 Fire +-------------------------- ------- ---------------------------------- + LEDs +RD1 pin 44 LED1 +RD2 pin 42 LED2 +RD3 pin 40 LED3 +RC1 pin 35 LED4 +RC2 pin 37 LED5 +-------------------------- ------- ---------------------------------- +SDA2 pin 74 I2C2 bus for BMA150, MCHP24LC08 +SCL2 pin 76 and WM8731 (see also MRF24WBOMA) +-------------------------- ------- ---------------------------------- +SCK1 pin 91 SPI1 bus for WM8731 +SDI1 pin 93 +SDO1 pin 95 +-------------------------- ------- ---------------------------------- +RA6 pin 4 CPLD +RA7 pin 6 +RG12 pin 5 +RG14 pin 3 +SCK2 pin 45 (see MRF24WBOMA) +SDI2 pin 47 (see MRF24WBOMA) +SDO2 pin 49 (see MRF24WBOMA) +RG9 pin 51 (see MRF24WBOMA) +SCK3A pin 106 (see PICtail) +SDI3A pin 110 (see PICtail) +SDO3A pin 112 (see PICtail) +RF12 pin 108 (see PICtail) +~SSI pin 97 (see PICtail) +RD9 pin 54 +-------------------------- ------- ---------------------------------- +INT3 pin 81 MRF24WBOMA +RA10 pin 115 (also Graphics Controller and PICtail) +RB8 pin 71 +-------------------------- ------- ---------------------------------- + PICtail J5 +SDA2 pin 74 I2C2 bus (see above) +SCL2 pin 76 I2C2 bus (see above) +SCK2 pin 45 (see CPLD) +SDI2 pin 47 (see CPLD) +SDO2 pin 49 (see CPLD) +RG9 pin 51 (see CPLD) +U1RX pin 88 +U1TX pin 90 +~U1RTS pin 92 +~U1CTS pin 94 +RB9 pin 73 +RA10 pin 115 Reset (see Graphics controller and MRF24WBOMA) +INT1 pin 85 +SCL1 pin 84 +SDA1 pin 86 (see CPLD) +~SSI pin 97 (see CPLD) +U2RX pin 110 (see CPLD) +U2TX pin 112 (see CPLD) +~U2RTS pin 106 (see CPLD) +~U2CTS pin 108 (see CPLD) + +PICtail +======= + +The MEB brings many of the signals out via the PICtail (J5). J5 is +a 28 pin connector bringing out signals as summarized here (J3 is the +designation of the connection to the Ethernet starter kit on the +MEB side): + +--- --- ------------------------ +J3 J5 Table 2-1 +PIN PIN Description +--- --- ------------------------ + 1 3.3V + 2 I/O_4 (Test Point) + 76 3 SCL2 + 84 4 SCL1 + 74 5 SDA2 + 86 6 SDA1 + 47 7 SDI2/SDI2A/CN9/RG7 + 97 8 SS1, WFI_SDO + 49 9 SDO2/SDO2A + 10 WFI_SDI + 45 11 SCK2/SCK2A + 12 WFI_SCK + 51 13 SS2/SS2A/RG9 + 14 SS1/RB2 + 88 15 U1RX/SDI1A +110 16 U2RX/SDI3A + 90 17 U1TX/RA10 +112 18 U2TX/SDO3A + 92 19 U1RTS/C2OUT/AN9 +106 20 U2RTS/SCK3A + 94 21 U1CTS/SDO1A +108 22 U2CTS/SS3A/RF12 + 73 23 RB9/INT1/RE8 + 115 25 RA10/SCK1A + 26 3.3V + 85 27 INT1/SS1/RD14 + 28 GND + +Toolchains +========== + + MPLAB/C32 + --------- + + I am using the free, "Lite" version of the PIC32MX toolchain available + for download from the microchip.com web site. I am using the Windows + version. The MicroChip toolchain is the only toolchain currently + supported in these configurations, but it should be a simple matter to + adapt to other toolchains by modifying the Make.defs file include in + each configuration. + + C32 Toolchain Options: + + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW - MicroChip full toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL - MicroChip full toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE - MicroChip "Lite" toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_LITE - MicroChip "Lite" toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_PINGUINOL - Pinquino toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_PINGUINOW - Pinquino toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPOPENL - Microchip open toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_GNU_ELF - General mips-elf toolchain for Linux + + NOTE: The "Lite" versions of the toolchain does not support C++. Also + certain optimization levels are not supported by the "Lite" toolchain. + + MicrochipOpen + ------------- + + An alternative, build-it-yourself toolchain is available here: + http://sourceforge.net/projects/microchipopen/ . These tools were + last updated circa 2010. NOTE: C++ support still not available + in this toolchain. + + Building MicrochipOpen (on Linux) + + 1) Get the build script from this location: + + http://microchipopen.svn.sourceforge.net/viewvc/microchipopen/ccompiler4pic32/buildscripts/trunk/ + + 2) Build the code using the build script, for example: + + ./build.sh -b v105_freeze + + This will check out the selected branch and build the tools. + + 3) Binaries will then be available in a subdirectory with a name something like + pic32-v105-freeze-20120622/install-image/bin (depending on the current data + and the branch that you selected. + + Note that the tools will have the prefix, mypic32- so, for example, the + compiler will be called mypic32-gcc. + + Pinguino mips-elf Toolchain + --------------------------- + + Another option is the mips-elf toolchain used with the Pinguino project. This + is a relatively current mips-elf GCC and should provide free C++ support as + well. This toolchain can be downloded from the Pinguino website: + http://wiki.pinguino.cc/index.php/Main_Page#Download . There is some general + information about using the Pinguino mips-elf toolchain in this thread: + https://groups.yahoo.com/neo/groups/nuttx/conversations/messages/1821 + + See also configs/mirtoo/README.txt. There is an experimental (untested) + configuration for the Mirtoo platform in that directory. + + MPLAB/C32 vs MPLABX/X32 + ----------------------- + + It appears that Microchip is phasing out the MPLAB/C32 toolchain and replacing + it with MPLABX and XC32. At present, the XC32 toolchain is *not* compatible + with the NuttX build scripts. Here are some of the issues that I see when trying + to build with XC32: + + 1) Make.def changes: You have to change the tool prefix: + + CROSSDEV=xc32- + + 2) debug.ld/release.ld: The like expect some things that are not present in + the current linker scripts (or are expected with different names). Here + are some partial fixes: + + Rename: kseg0_progmem to kseg0_program_mem + Rename: kseg1_datamem to kseg1_data_mem + + Even then, there are more warnings from the linker and some undefined symbols + for non-NuttX code that resides in the unused Microchip libraries. See this + email thread at https://groups.yahoo.com/neo/groups/nuttx/conversations/messages/1458 for more + information. You will have to solve at least this undefined symbol problem if + you want to used the XC32 toolchain. + + Windows Native Toolchains + ------------------------- + + NOTE: There are several limitations to using a Windows based toolchain in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + +Powering the Board +================== + + Ethernet Starter Kit: + + There are two ways to supply power to the PIC32 Ethernet Starter Kit: + + - USB bus power connected to USB debug connector J1. + - An external application board with a regulated DC power supply that + provides +5V can be connected to the J2 application board connector + that is provided on the bottom side of the board. + + One green LED (D3) is provided to show that the PIC32 microcontroller + is powered up. + + Ethernet Starter Kit with MEB: + + Power can be supplied to the Multimedia Expansion Board through the DC + connector located on the Multimedia Expansion Board... By connecting + 9-14V power supply to the DC connector, the Multimedia Expansion Board + and starter kit will receive the proper voltages. The user can also + supply power via the starter kit. However, if the application uses + multiple features of the Multimedia Expansion Board, it is recommended + to use 9-14V power supply." + +On Board Debug Support +====================== + + The PIC32 Ethernet Starter Kit includes a PIC32MX440F512H USB microcontroller + that provides debugger connectivity over USB. The PIC32MX440F512H is hard-wired + to the PIC32 device to provide two types of protocol translation: + + - I/O pins of PIC32MX440F512H to the ICSP™ pins of the PIC32 + - I/O pins of PIC32MX440F512H to the JTAG pins of the PIC32 + + The PIC32 Ethernet Starter Kit currently uses the JTAG pins of the PIC32 device for + programming and debugging. + +Creating Compatible NuttX HEX files +=================================== + + Intel Hex Format Files: + ----------------------- + + When NuttX is built it will produce two files in the top-level NuttX + directory: + + 1) nuttx - This is an ELF file, and + 2) nuttx.hex - This is an Intel Hex format file. This is controlled by + the setting CONFIG_INTELHEX_BINARY in the .config file. + + The PICkit tool wants an Intel Hex format file to burn into FLASH. However, + there is a problem with the generated nutt.hex: The tool expects the nuttx.hex + file to contain physical addresses. But the nuttx.hex file generated from the + top-level make will have address in the KSEG0 and KSEG1 regions. + + tools/pic32mx/mkpichex: + ---------------------- + + There is a simple tool in the NuttX tools/pic32mx directory that can be + used to solve both issues with the nuttx.hex file. But, first, you must + build the tool: + + cd tools/pic32mx + make + + Now you will have an excecutable file call mkpichex (or mkpichex.exe on + Cygwin). This program will take the nutt.hex file as an input, it will + convert all of the KSEG0 and KSEG1 addresses to physical address, and + it will write the modified file, replacing the original nuttx.hex. + + To use this file, you need to do the following things: + + . ./setenv.sh # Source setenv.sh. Among other this, this script + # will add the NuttX tools/pic32mx directory to your + # PATH variable + make # Build nuttx and nuttx.hex + mkpichex $PWD # Convert addresses in nuttx.hex. $PWD is the path + # to the top-level build directory. It is the only + # required input to mkpichex. + +Serial Console: MEB +=================== + + [[Warning: This all sounds great, but the fact is that I have not yet + gotten any serial UART output to work from the MEB.]] + + A serial console is not required to use NuttX. However, all of the + Nuttx example code in the apps/examples assumes that you have a + serial console. The Ethernet Starter Kit(even with the MEB) does not + have any RS-232 connector needed to drive the serial console. + + Raw UART signals are available at the MEB's PICtail connector, however, + and can be connected to an external MAX2232 board to get a serial console. + The defconfig files are set up to use UART2. So the proper connections + would be: + + PICtail + PIN FUNCTION + -------- ----------- + 1 3.3V + 16 U2RX + 18 U2TX + 28 GND + + UART1 is also brought out on the PICtail and would be connected as: + + PICtail + PIN FUNCTION + -------- ----------- + 1 3.3V + 15 U1RX + 17 U1TX + 28 GND + + Here is a summary of the tortuous routes taken by the PIC32MX UART pins: + + --- ---------------------------------- -------------------------- ------------------------- + PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + (Family Data Sheet Table 1-1) (Starter Kit User Guide) + --- ---------------------------------- -------------------------- ------------------------- + + 39 AC1TX/RF13/SCK4/U2RTS/U5TX SCM3D/BCLK2/RF13 J2 pin 106 (UART2) + 40 AC1RX/RF12/SS4/U2CTS/U5RX SCM3C/RF12 J2 pin 108 (UART2) + 49 PMA9/CN17/RF4/SDA5/SDI4/U2RX PMPA9/SCM3A/CN17/RF4 J2 pin 109 (PMP address) + J2 pin 110 (UART2) + 50 PMA8/CN18/RF5/SCL5/SDO4/U2TX PMPA8/SCM3B/CN18/RF5 J2 pin 111 (PMP address) + J2 pin 112 (UART2) + 52 RF2/SDA3/SDI3/U1RX SCM1A/RF2 J2 pin 88 (UART1) + 53 RF8/SCL3/SDO3/U1TX SCM1B/RF8 J2 pin 90 (UART1) + + J2 is the connector at the bottom of the Ethernet start kit that + mates the Ethernet Starter kit to the MEB. The MEB then makes the + following signals available on the PICtail (J5): + + MEB Connector: + + -------------------------- ------- ---------------------------------- + Signal J3 + -------------------------- ------- + U1RX pin 88 + U1TX pin 90 + ~U1RTS pin 92 + ~U1CTS pin 94 + U2RX pin 110 + U2TX pin 112 + ~U2RTS pin 106 + ~U2CTS pin 108 + -------------------------- ------- + + PICtail: + + The pins are labeled differently in Table 2-1 and in the schematic. This is + confusing. I will trust Table 2-1. + + --- --- ------- --- --- ----------------- + Table 2-1 Schematic + J3 J5 J3 J5 + PIN PIN NAME PIN PIN Description + --- --- ------- ---- --- ------------ + 1 3.3V + 88 15 U1RX 88 15 SDI1A + 110 16 U2RX 110 16 SDI3A + 90 17 U1TX 17 RA10 + 90 SD01A + 112 18 U2TX 113 18 SDO3A + 92 19 U1RTS 19 C2OUT/AN9 + 92 SCK1A + 106 20 U2RTS 106 20 SCK3A + 94 21 U1CTS 21 SDO1A + 94 SS1/RD14 + 108 22 U2CTS 108 22 SS3A/RF12 + 26 3.3V + 28 GND + +Serial Console: Starter Kit I/O Expansion Board +=============================================== + + U1: + Ethernet Starter Kit Expansion I/O board + --------------------------------------------- ------------------------- + PIN Description J2 J1 J10/J11 + --- ---------------------------------- ------------- ------------------ + 47 AETXD0/CN20/RD14/SS3/U1CTS/U4RX Not available N/A + 48 AETXD1/CN21/RD15/SCK3/U1RTS/U4TX Not available N/A + 52 RF2/SDA3/SDI3/U1RX J2 pin 88 J11 pin 41 + 53 RF8/SCL3/SDO3/U1TX J2 pin 90 J11 pin 43 + + U2: + Ethernet Starter Kit Expansion I/O board + --------------------------------------------- ------------------------- + PIN Description J2 J1 J10/J11 + --- ---------------------------------- ------------- ------------------ + 39 AC1TX/RF13/SCK4/U2RTS/U5TX J2 pin 106 J11 pin 42 + 40 AC1RX/RF12/SS4/U2CTS/U5RX J2 pin 108 J11 pin 44 + 50 PMA8/CN18/RF5/SCL5/SDO4/U2TX J2 pin 111 J10 pin 52 + J2 pin 112 J11 pin 48 + 49 PMA9/CN17/RF4/SDA5/SDI4/U2RX J2 pin 109 J10 pin 51 + J2 pin 110 J11 pin 46 + + U3: + Ethernet Starter Kit Expansion I/O board + --------------------------------------------- ------------------------- + PIN Description J2 J1 J10/J11 + --- ---------------------------------- ------------- ------------------ + 10 PMA5/CN8/ECOL/RG6/SCK2/U3RTS/U6TX J2 pin 45 J10 pin 23 + J2 pin 117 J10 pin 55 + 11 PMA4/CN9/ECRS/RG7/SDA4/SDI2/U3RX J2 pin 47 J10 pin 24 + J2 pin 119 J10 pin 56 + 12 PMA3/AECRSDV/AERXDV/CN10/ECRSDV/ Not available N/A + ERXDV/RG8/SCL4/SDO2/U3TX + 14 PMA2/AEREFCLK/AERXCLK/CN11/ + EREFCLK/ERXCLK/RG9/SS2/U3CTS/ Not available N/A + U6RX + + U4: + Ethernet Starter Kit Expansion I/O board + --------------------------------------------- ------------------------- + PIN Description J2 J1 J10/J11 + --- ---------------------------------- ------------- ------------------ + 47 AETXD0/CN20/RD14/SS3/U1CTS/U4RX Not available N/A + 48 AETXD1/CN21/RD15/SCK3/U1RTS/U4TX Not available N/A + + U5: + Ethernet Starter Kit Expansion I/O board + --------------------------------------------- ------------------------- + PIN Description J2 J1 J10/J11 + --- ---------------------------------- ------------- ------------------ + 39 AC1TX/RF13/SCK4/U2RTS/U5TX J2 pin 106 J11 pin 42 + 40 AC1RX/RF12/SS4/U2CTS/U5RX J2 pin 108 J11 pin 44 + + U6: + PIN Description + --- ---------------------------------- + 10 PMA5/CN8/ECOL/RG6/SCK2/U3RTS/U6TX J2 pin 45 J10 pin 23 + J2 pin 117 J10 pin 55 + 14 PMA2/AEREFCLK/AERXCLK/CN11/ Not available N/A + EREFCLK/ERXCLK/RG9/SS2/U3CTS/ + U6RX + +LEDs +==== + + The PIC32MX Ethernet Starter kit has 3 user LEDs labeled LED1-3 on the + board graphics (but referred to as LED4-6 in the schematic): + + PIN User's Guide Board Stencil Notes + --- ------------- -------------- ------------------------- + RD0 "User LED D4" "LED1 (RD0") High illuminates (RED) + RD2 "User LED D5" "LED3 (RD2)" High illuminates (YELLOW) + RD1 "User LED D6" "LED2 (RD1)" High illuminates (GREEN) + + We will use the labels on the board to identify LEDs. If CONFIG_ARCH_LEDS + is defined, then NuttX will control these LEDs as follows: + + ON OFF + ------------------------- ---- ---- ---- ---- ---- ---- + LED1 LED2 LED3 LED1 LED2 LED3 + ------------------------- ---- ---- ---- ---- ---- ---- + LED_STARTED 0 OFF OFF OFF --- --- --- + LED_HEAPALLOCATE 1 ON OFF N/C --- --- --- + LED_IRQSENABLED 2 OFF ON N/C --- --- --- + LED_STACKCREATED 3 ON ON N/C --- --- --- + LED_INIRQ 4 N/C N/C ON N/C N/C OFF + LED_SIGNAL 4 N/C N/C ON N/C N/C OFF + LED_ASSERTION 4 N/C N/C ON N/C N/C OFF + LED_PANIC 5 ON N/C N/C OFF N/C N/C + + There are 5 additional LEDs available on the MEB. These are not + used by NuttX. + + RD1 LED1 + RD2 LED2 + RD3 LED3 + RC1 LED4 + RC2 LED5 + +PIC32MX Configuration Options +============================= + + General Architecture Settings: + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=mips + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_MIPS=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_MIPS32=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=pic32mx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_PIC32MX795F512L=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=pic32mx-starterkit + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_PIC32MX_STARTERKIT=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0xa0000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + PIC32MX Configuration + + CONFIG_PIC32MX_MVEC - Select muli- vs. single-vectored interrupts + + Individual subsystems can be enabled: + + CONFIG_PIC32MX_WDT - Watchdog timer + CONFIG_PIC32MX_T2 - Timer 2 (Timer 1 is the system time and always enabled) + CONFIG_PIC32MX_T3 - Timer 3 + CONFIG_PIC32MX_T4 - Timer 4 + CONFIG_PIC32MX_T5 - Timer 5 + CONFIG_PIC32MX_IC1 - Input Capture 1 + CONFIG_PIC32MX_IC2 - Input Capture 2 + CONFIG_PIC32MX_IC3 - Input Capture 3 + CONFIG_PIC32MX_IC4 - Input Capture 4 + CONFIG_PIC32MX_IC5 - Input Capture 5 + CONFIG_PIC32MX_OC1 - Output Compare 1 + CONFIG_PIC32MX_OC2 - Output Compare 2 + CONFIG_PIC32MX_OC3 - Output Compare 3 + CONFIG_PIC32MX_OC4 - Output Compare 4 + CONFIG_PIC32MX_OC5 - Output Compare 5 + CONFIG_PIC32MX_I2C1 - I2C 1 + CONFIG_PIC32MX_I2C2 - I2C 2 + CONFIG_PIC32MX_I2C3 - I2C 3 + CONFIG_PIC32MX_I2C4 - I2C 4 + CONFIG_PIC32MX_I2C5 - I2C 5 + CONFIG_PIC32MX_SPI1 - SPI 1 + CONFIG_PIC32MX_SPI2 - SPI 2 + CONFIG_PIC32MX_SPI3 - SPI 3 + CONFIG_PIC32MX_SPI4 - SPI 4 + CONFIG_PIC32MX_UART1 - UART 1 + CONFIG_PIC32MX_UART2 - UART 2 + CONFIG_PIC32MX_UART3 - UART 3 + CONFIG_PIC32MX_UART4 - UART 4 + CONFIG_PIC32MX_UART5 - UART 5 + CONFIG_PIC32MX_UART6 - UART 6 + CONFIG_PIC32MX_ADC - ADC 1 + CONFIG_PIC32MX_PMP - Parallel Master Port + CONFIG_PIC32MX_CM1 - Comparator 1 + CONFIG_PIC32MX_CM2 - Comparator 2 + CONFIG_PIC32MX_RTCC - Real-Time Clock and Calendar + CONFIG_PIC32MX_DMA - DMA + CONFIG_PIC32MX_FLASH - FLASH + CONFIG_PIC32MX_USBDEV - USB device + CONFIG_PIC32MX_USBHOST - USB host + CONFIG_PIC32MX_CAN1 - Controller area network 1 + CONFIG_PIC32MX_CAN2 - Controller area network 2 + CONFIG_PIC32MX_ETHERNET - Ethernet + + PIC32MX Configuration Settings + DEVCFG0: + CONFIG_PIC32MX_DEBUGGER - Background Debugger Enable. Default 3 (disabled). The + value 2 enables. + CONFIG_PIC32MX_ICESEL - In-Circuit Emulator/Debugger Communication Channel Select + Default 1 (PG2) + CONFIG_PIC32MX_PROGFLASHWP - Program FLASH write protect. Default 0xff (disabled) + CONFIG_PIC32MX_BOOTFLASHWP - Default 1 (disabled) + CONFIG_PIC32MX_CODEWP - Default 1 (disabled) + DEVCFG1: (All settings determined by selections in board.h) + DEVCFG2: (All settings determined by selections in board.h) + DEVCFG3: + CONFIG_PIC32MX_USBIDO - USB USBID Selection. Default 1 if USB enabled + (USBID pin is controlled by the USB module), but 0 (GPIO) otherwise. + CONFIG_PIC32MX_VBUSIO - USB VBUSON Selection (Default 1 if USB enabled + (VBUSON pin is controlled by the USB module, but 0 (GPIO) otherwise. + CONFIG_PIC32MX_WDENABLE - Enabled watchdog on power up. Default 0 (watchdog + can be enabled later by software). + + The priority of interrupts may be specified. The value ranage of + priority is 4-31. The default (16) will be used if these any of these + are undefined. + + CONFIG_PIC32MX_CTPRIO - Core Timer Interrupt + CONFIG_PIC32MX_CS0PRIO - Core Software Interrupt 0 + CONFIG_PIC32MX_CS1PRIO - Core Software Interrupt 1 + CONFIG_PIC32MX_INT0PRIO - External Interrupt 0 + CONFIG_PIC32MX_INT1PRIO - External Interrupt 1 + CONFIG_PIC32MX_INT2PRIO - External Interrupt 2 + CONFIG_PIC32MX_INT3PRIO - External Interrupt 3 + CONFIG_PIC32MX_INT4PRIO - External Interrupt 4 + CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor + CONFIG_PIC32MX_T1PRIO - Timer 1 (System timer) priority + CONFIG_PIC32MX_T2PRIO - Timer 2 priority + CONFIG_PIC32MX_T3PRIO - Timer 3 priority + CONFIG_PIC32MX_T4PRIO - Timer 4 priority + CONFIG_PIC32MX_T5PRIO - Timer 5 priority + CONFIG_PIC32MX_IC1PRIO - Input Capture 1 + CONFIG_PIC32MX_IC2PRIO - Input Capture 2 + CONFIG_PIC32MX_IC3PRIO - Input Capture 3 + CONFIG_PIC32MX_IC4PRIO - Input Capture 4 + CONFIG_PIC32MX_IC5PRIO - Input Capture 5 + CONFIG_PIC32MX_OC1PRIO - Output Compare 1 + CONFIG_PIC32MX_OC2PRIO - Output Compare 2 + CONFIG_PIC32MX_OC3PRIO - Output Compare 3 + CONFIG_PIC32MX_OC4PRIO - Output Compare 4 + CONFIG_PIC32MX_OC5PRIO - Output Compare 5 + CONFIG_PIC32MX_I2C1PRIO - I2C 1 + CONFIG_PIC32MX_I2C2PRIO - I2C 2 + CONFIG_PIC32MX_I2C3PRIO - I2C 3 + CONFIG_PIC32MX_I2C4PRIO - I2C 4 + CONFIG_PIC32MX_I2C5PRIO - I2C 5 + CONFIG_PIC32MX_SPI2PRIO - SPI 2 + CONFIG_PIC32MX_UART1PRIO - UART 1 + CONFIG_PIC32MX_UART2PRIO - UART 2 + CONFIG_PIC32MX_CN - Input Change Interrupt + CONFIG_PIC32MX_ADCPRIO - ADC1 Convert Done + CONFIG_PIC32MX_PMPPRIO - Parallel Master Port + CONFIG_PIC32MX_CM1PRIO - Comparator 1 + CONFIG_PIC32MX_CM2PRIO - Comparator 2 + CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor + CONFIG_PIC32MX_RTCCPRIO - Real-Time Clock and Calendar + CONFIG_PIC32MX_DMA0PRIO - DMA Channel 0 + CONFIG_PIC32MX_DMA1PRIO - DMA Channel 1 + CONFIG_PIC32MX_DMA2PRIO - DMA Channel 2 + CONFIG_PIC32MX_DMA3PRIO - DMA Channel 3 + CONFIG_PIC32MX_DMA4PRIO - DMA Channel 4 + CONFIG_PIC32MX_DMA5PRIO - DMA Channel 5 + CONFIG_PIC32MX_DMA6PRIO - DMA Channel 6 + CONFIG_PIC32MX_DMA7PRIO - DMA Channel 7 + CONFIG_PIC32MX_FCEPRIO - Flash Control Event + CONFIG_PIC32MX_USBPRIO - USB + + PIC32MXx specific device driver settings. NOTE: For the Ethernet + starter kit, there is no RS-232 connector (even with the MEB). See + discussion above ("") for information about how you can configure + an external MAX2232 board to get a serial console. + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + +PIC32MX specific PHY/Ethernet device driver settings + + CONFIG_ETH0_PHY_KS8721 - Selects the Micrel KS8721 PHY + CONFIG_ETH0_PHY_DP83848C - Selects the National Semiconduction DP83848C PHY + CONFIG_ETH0_PHY_LAN8720 - Selects the SMSC LAN8720 PHY + CONFIG_PHY_AUTONEG - Enable auto-negotion + CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. + CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex + CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 2 + CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 4 + CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented). + CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets. + Also needs CONFIG_DEBUG. + CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs + CONFIG_DEBUG. + CONFIG_NET_HASH - Enable receipt of near-perfect match frames. + CONFIG_PIC32MX_MULTICAST - Enable receipt of multicast (and unicast) frames. + Automatically set if CONFIG_NET_IGMP is selected. + + Related DEVCFG3 Configuration Settings: + CONFIG_PIC32MX_FETHIO: Ethernet I/O Pin Selection bit: + 1 = Default Ethernet I/O Pins + 0 = Alternate Ethernet I/O Pins + CONFIG_PIC32MX_FMIIEN: Ethernet MII Enable bit + 1 = MII enabled + 0 = RMII enabled + + PIC32MXx USB Device Configuration + + PIC32MXx USB Host Configuration (the PIC32MX does not support USB Host) + +Configurations +============== + +Each PIC32MX configuration is maintained in a sub-directory and can be +selected as follow: + + cd tools + ./configure.sh pic32mx-starterkit/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + + This is the NuttShell (NSH) using the NSH startup logic at + apps/examples/nsh. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Serial Output + + The OS test produces all of its test output on the serial console. + This configuration has UART1 enabled as a serial console. I have + been unable to get this UART work on the MEB. But on the Expansion + I/O board, this maps to RX = J11 pin 41 and TX = J11 pin 43 + + 3. SB Configurations + + Several USB device configurations can be enabled and included + as NSH built-in built in functions. + + To use USB device, connect the starter kit to the host using a cable + with a Type-B micro-plug to the starter kit’s micro-A/B port J5, located + on the bottom side of the starter kit. The other end of the cable + must have a Type-A plug. Connect it to a USB host. Jumper JP2 should be + removed. + + All USB device configurations require the following basic setup in + your NuttX configuration file to enable USB device support: + + CONFIG_USBDEV=y : Enable basic USB device support + CONFIG_PIC32MX_USBDEV=y : Enable PIC32 USB device support + + examples/usbterm - This option can be enabled by adding the + following line in the NuttX configuration file: + + CONFIG_EXAMPLES_USBTERM=y + + And by enabling one of the USB serial devices: + + CONFIG_PL2303=y : Enable the Prolifics PL2303 emulation + CONFIG_CDCACM=y : or the CDC/ACM serial driver (not both) + + system/cdcacm - The system/cdcacm program can be included by + adding the following to the configuration file: + + CONFIG_CDCACM=y : Enable the CDCACM device + CONFIG_EXAMPLES_CDCACM=y + + 3. Networking Configurations + + Several Networking configurations can be enabled and included + as NSH built-in built in functions. The following additional + configuration settings are required: + + CONFIG_NET=y : Enable networking support + CONFIG_PIC32MX_ETHERNET=y : Enable the PIC32 Ethernet driver + CONFIG_NSH_TELNET=y : Enable the Telnet NSH console (optional) + + NOTES: + + a. This logic will assume that a network is connected. During its + initialization, it will try to negotiate the link speed. If you have + no network connected when you reset the board, there will be a long + delay (maybe 30 seconds?) before anything happens. That is the timeout + before the networking finally gives up and decides that no network is + available. + + b. This example can support an FTP client. In order to build in FTP client + support simply add the following to the Nuttx configuration file: + + CONFIG_NETUTILS_FTPC=y + CONFIG_EXAMPLES_FTPC=y + + c. This example can support an FTP server. In order to build in FTP server + support simply add the following to the Nuttx configuration file: + + CONFIG_DISABLE_POLL=n + CONFIG_NETUTILS_FTPD=y + CONFIG_EXAMPLES_FTPD=y + + nsh2: + + This is an alternative NSH configuration. Without the Expansion I/O board, + there is no way to connect a serial console. This NSH alternative supports + only a Telnet console. The nsh2 differs from the nsh configuration in the + following ways: + + NOTES: + + 1. Networking is enabled: + + CONFIG_NET=y : Enable networking support + CONFIG_PIC32MX_ETHERNET=y : Enable the PIC32 Ethernet driver + CONFIG_NSH_CONSOLE=n : Disable NSH serial console + CONFIG_NSH_TELNET=y : Enable the Telnet NSH console + + See apps/nshlib/README.txt for other NSH networking-related configuration + settings. + + 2. UART1 is disabled + + CONFIG_PIC32MX_UART1=n : UART1 is disabled (as well as other UARTs) + CONFIG_UART1_SERIAL_CONSOLE=n : There is no serial console + + 3. The RAM log is enabled" + + CONFIG_SYSLOG=y : Enables the System Logging feature. + CONFIG_RAMLOG=y : Enable the RAM-based logging feature. + CONFIG_RAMLOG_CONSOLE=n : (there is no default console device) + CONFIG_RAMLOG_SYSLOG=y : This enables the RAM-based logger as the + system logger. + + Logging is currently set up to use 16Kb of memory: + + CONFIG_RAMLOG_BUFSIZE=16384 + + There are a few other configuration differences as necessary to support + this different device configuration. Just the do the 'diff' if you are + curious. + + NOTES: + See the notes for the nsh configuration. Most also apply to the nsh2 + configuration. + + Using a RAM disk and the USB MSC device with nsh and nsh2 + --------------------------------------------------------- + Here is an experimental change to either examples/nsh or examples/nsh2 + that will create a RAM disk and attempt to export that RAM disk as a + USB mass storage device. + + 1. Changes to nuttx/.config + + a) Enable support for the PIC32 USB device + + -CONFIG_PIC32MX_USBDEV=n + +CONFIG_PIC32MX_USBDEV=y + + b) Enable NuttX USB device support + + -CONFIG_USBDEV=n + +CONFIG_USBDEV=y + + c) Enable the USB MSC class driver + + -CONFIG_USBMSC=n + +CONFIG_USBMSC=y + + d) Use a RAM disk (instead of an SD card) as the USB MSC logical unit: + + -CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mmcsd0" + +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/ram0" + + e) Enable building of the system/usbmsc: + + +CONFIG_SYSTEM_USBMSC=y + + 3. When NSH first comes up, you must manually create the RAM disk + before exporting it: + + a) Create a 64Kb RAM disk at /dev/ram0: + + nsh> mkrd -s 512 128 + + b) Put a FAT file system on the RAM disk: + + nsh> mkfatfs /dev/ram0 + + b) Now the 'msconn' command will connect to the host and + export /dev/ram0 as the USB logical unit: + + nsh> msconn + + NOTE: This modification should be considered experimental. IN the + little testing I have done with it, it appears functional. But the + logic has not been stressed and there could still be lurking issues. + (There is a bug associated with this configuration listed in the + top-level TODO list). diff --git a/configs/pic32mx-starterkit/include/board.h b/configs/pic32mx-starterkit/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..98333e96741aef63f6e3b470c9696dae42e7d0ef --- /dev/null +++ b/configs/pic32mx-starterkit/include/board.h @@ -0,0 +1,206 @@ +/**************************************************************************** + * configs/pic32mx-starterkit/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_SURE_PIC32MX_INCLUDE_BOARD_H +#define __CONFIGS_SURE_PIC32MX_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Clocking *****************************************************************/ +/* Crystal frequencies */ + +#define BOARD_POSC_FREQ 8000000 /* Primary OSC XTAL frequency (8MHz) */ +#define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */ + +/* Oscillator modes */ + +#define BOARD_FNOSC_POSCPLL 1 /* Use primary oscillator w/PLL */ +#define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */ + +/* PLL configuration and resulting CPU clock. + * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV + */ + +#define BOARD_PLL_INPUT BOARD_POSC_FREQ +#define BOARD_PLL_IDIV 2 /* PLL input divider */ +#define BOARD_PLL_MULT 20 /* PLL multiplier */ +#define BOARD_PLL_ODIV 1 /* PLL output divider */ + +#define BOARD_CPU_CLOCK 80000000 /* CPU clock (80MHz = 8MHz * 20 / 2) */ + +/* USB PLL configuration. + * USB_CLOCK = ((POSC_XTAL / IDIV) * 24) / 2 + */ + +#define BOARD_UPLL_IDIV 2 /* USB PLL divider (revisit) */ +#define BOARD_USB_CLOCK 48000000 /* USB clock (8MHz / 2) * 24 / 2) */ + +/* Peripheral clock is divided down from CPU clock. + * PBCLOCK = CPU_CLOCK / PBDIV + */ + +#define BOARD_PBDIV 2 /* Peripheral clock divisor (PBDIV) */ +#define BOARD_PBCLOCK 40000000 /* Peripheral clock (PBCLK = 80MHz/2) */ + +/* Watchdog pre-scaler (re-visit) */ + +#define BOARD_WD_ENABLE 0 /* Watchdog is disabled */ +#define BOARD_WD_PRESCALER 8 /* Watchdog pre-scaler */ + +/* Ethernet MII clocking. + * + * The clock divider used to create the MII Management Clock (MDC). The MIIM + * module uses the SYSCLK as an input clock. According to the IEEE 802.3 + * Specification this should be no faster than 2.5 MHz. However, some PHYs + * support clock rates up to 12.5 MHz. + */ + +#define BOARD_EMAC_MIIM_DIV 32 /* Ideal: 80MHz/32 = 2.5MHz */ + +/* LED definitions **********************************************************/ +/* LED Configuration ********************************************************/ +/* The PIC32MX Ethernet Starter kit has 3 user LEDs labeled LED1-3 on the + * board graphics (but referred to as LED4-6 in the schematic): + * + * PIN User's Guide Board Stencil Notes + * --- ------------- -------------- ------------------------- + * RD0 "User LED D4" "LED1 (RD0") High illuminates (RED) + * RD2 "User LED D5" "LED3 (RD2)" High illuminates (YELLOW) + * RD1 "User LED D6" "LED2 (RD1)" High illuminates (GREEN) + * + * We will use the labels on the board to identify LEDs + * + * There are 5 additional LEDs available on the MEB (but not used by NuttX): + * + * RD1 LED1 + * RD2 LED2 + * RD3 LED3 + * RC1 LED4 + * RC2 LED5 + */ + +/* LED index values for use with board_userled() */ + +#define PIC32MX_STARTERKIT_LED1 0 +#define PIC32MX_STARTERKIT_LED2 1 +#define PIC32MX_STARTERKIT_LED3 2 +#define PIC32MX_STARTERKIT_NLEDS 3 + +/* LED bits for use with board_userled_all() */ + +#define PIC32MX_STARTERKIT_LED1_BIT (1 << PIC32MX_STARTERKIT_LED1) +#define PIC32MX_STARTERKIT_LED2_BIT (1 << PIC32MX_STARTERKIT_LED2) +#define PIC32MX_STARTERKIT_LED3_BIT (1 << PIC32MX_STARTERKIT_LED3) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 3 LEDs + * on board the Ethernet Starter Kit. The following definitions + * describe how NuttX controls the LEDs: + * + * ON OFF + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED1 LED2 LED3 LED1 LED2 LED3 + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED_STARTED 0 OFF OFF OFF --- --- --- + * LED_HEAPALLOCATE 1 ON OFF N/C --- --- --- + * LED_IRQSENABLED 2 OFF ON N/C --- --- --- + * LED_STACKCREATED 3 ON ON N/C --- --- --- + * LED_INIRQ 4 N/C N/C ON N/C N/C OFF + * LED_SIGNAL 4 N/C N/C ON N/C N/C OFF + * LED_ASSERTION 4 N/C N/C ON N/C N/C OFF + * LED_PANIC 5 ON N/C N/C OFF N/C N/C + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 4 +#define LED_ASSERTION 4 +#define LED_PANIC 5 + +#define LED_NVALUES 6 + +/* Switch definitions *******************************************************/ +/* The PIC32 starter kit has 3 switches: + * + * RD7 Switch SW2 (low when closed) + * RD6 Switch SW1 (low when closed) + * RD13 Switch SW3 (low when closed) + */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SURE_PIC32MX_INCLUDE_BOARD_H */ diff --git a/configs/pic32mx-starterkit/nsh/Make.defs b/configs/pic32mx-starterkit/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..8cf55c2e12d7fb7c4bb1088163743305e344049c --- /dev/null +++ b/configs/pic32mx-starterkit/nsh/Make.defs @@ -0,0 +1,116 @@ +############################################################################ +# configs/pic32mx-starterkit/nsh/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/mips/src/mips32/Toolchain.defs + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_GNU_ELF),y) +LDSCRIPT = mips-release.ld +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_PINGUINOW),y) +LDSCRIPT = mips-release.ld +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW),y) +LDSCRIPT = c32-release.ld +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE),y) +LDSCRIPT = c32-release.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/pic32mx-starterkit/nsh/defconfig b/configs/pic32mx-starterkit/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..2ed828d4892cca12dd86251da69f30431076b387 --- /dev/null +++ b/configs/pic32mx-starterkit/nsh/defconfig @@ -0,0 +1,900 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +CONFIG_ARCH_MIPS=y +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="mips" +CONFIG_ARCH_FAMILY="mips32" +CONFIG_ARCH_CHIP="pic32mx" +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_CHIP_PIC32MX=y +# CONFIG_ARCH_CHIP_PIC32MZ is not set +CONFIG_ARCH_MIPS32=y +CONFIG_ARCH_MIPS_24KC=y +# CONFIG_ARCH_MIPS_M14K is not set +# CONFIG_ARCH_HAVE_MICROMIPS is not set + +# +# MIPS32 Configuration Options +# +# CONFIG_MIPS32_TOOLCHAIN_GNU_ELF is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_XC32 is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW is not set +CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE=y +# CONFIG_MIPS32_TOOLCHAIN_PINGUINOW is not set +# CONFIG_MIPS32_FRAMEPOINTER is not set + +# +# PIC32MX Configuration Options +# +# CONFIG_ARCH_CHIP_PIC32MX110F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX320F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX420F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX440F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX460F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX460F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512H is not set +CONFIG_ARCH_CHIP_PIC32MX795F512L=y +# CONFIG_ARCH_CHIP_PIC32MX1 is not set +# CONFIG_ARCH_CHIP_PIC32MX2 is not set +# CONFIG_ARCH_CHIP_PIC32MX3 is not set +# CONFIG_ARCH_CHIP_PIC32MX4 is not set +# CONFIG_ARCH_CHIP_PIC32MX5 is not set +# CONFIG_ARCH_CHIP_PIC32MX6 is not set +CONFIG_ARCH_CHIP_PIC32MX7=y +# CONFIG_PIC32MX_MVEC is not set +# CONFIG_PIC32MX_SPI is not set +CONFIG_PIC32MX_T1=y + +# +# PIC32MX Peripheral Support +# +# CONFIG_PIC32MX_WDT is not set +# CONFIG_PIC32MX_T2 is not set +# CONFIG_PIC32MX_T3 is not set +# CONFIG_PIC32MX_T4 is not set +# CONFIG_PIC32MX_T5 is not set +# CONFIG_PIC32MX_IC1 is not set +# CONFIG_PIC32MX_IC2 is not set +# CONFIG_PIC32MX_IC3 is not set +# CONFIG_PIC32MX_IC4 is not set +# CONFIG_PIC32MX_IC5 is not set +# CONFIG_PIC32MX_OC1 is not set +# CONFIG_PIC32MX_OC2 is not set +# CONFIG_PIC32MX_OC3 is not set +# CONFIG_PIC32MX_OC4 is not set +# CONFIG_PIC32MX_OC5 is not set +# CONFIG_PIC32MX_I2C1 is not set +# CONFIG_PIC32MX_I2C2 is not set +# CONFIG_PIC32MX_I2C3 is not set +# CONFIG_PIC32MX_I2C4 is not set +# CONFIG_PIC32MX_I2C5 is not set +# CONFIG_PIC32MX_SPI1 is not set +# CONFIG_PIC32MX_SPI2 is not set +# CONFIG_PIC32MX_SPI3 is not set +# CONFIG_PIC32MX_SPI4 is not set +CONFIG_PIC32MX_UART1=y +# CONFIG_PIC32MX_UART2 is not set +# CONFIG_PIC32MX_UART3 is not set +# CONFIG_PIC32MX_UART4 is not set +# CONFIG_PIC32MX_UART5 is not set +# CONFIG_PIC32MX_UART6 is not set +# CONFIG_PIC32MX_ADC is not set +# CONFIG_PIC32MX_PMP is not set +# CONFIG_PIC32MX_CM1 is not set +# CONFIG_PIC32MX_CM2 is not set +# CONFIG_PIC32MX_CM3 is not set +# CONFIG_PIC32MX_RTCC is not set +# CONFIG_PIC32MX_DMA is not set +# CONFIG_PIC32MX_FLASH is not set +# CONFIG_PIC32MX_USBDEV is not set +# CONFIG_PIC32MX_USBHOST is not set +# CONFIG_PIC32MX_CAN1 is not set +# CONFIG_PIC32MX_CAN2 is not set +# CONFIG_PIC32MX_ETHERNET is not set +# CONFIG_PIC32MX_CTMU is not set + +# +# PIC32MX Peripheral Interrupt Priorities +# +CONFIG_PIC32MX_CTPRIO=16 +CONFIG_PIC32MX_CS0PRIO=16 +CONFIG_PIC32MX_CS1PRIO=16 +CONFIG_PIC32MX_INT0PRIO=16 +CONFIG_PIC32MX_INT1PRIO=16 +CONFIG_PIC32MX_INT2PRIO=16 +CONFIG_PIC32MX_INT3PRIO=16 +CONFIG_PIC32MX_INT4PRIO=16 +CONFIG_PIC32MX_T1PRIO=16 +CONFIG_PIC32MX_UART1PRIO=16 + +# +# Device Configuration 0 (DEVCFG0) +# +CONFIG_PIC32MX_DEBUGGER=2 +CONFIG_PIC32MX_ICESEL=1 +CONFIG_PIC32MX_PROGFLASHWP=0xff +CONFIG_PIC32MX_BOOTFLASHWP=1 +CONFIG_PIC32MX_CODEWP=1 + +# +# Device Configuration 1 (DEVCFG1) +# + +# +# Device Configuration 3 (DEVCFG3) +# +CONFIG_PIC32MX_USBIDO=0 +CONFIG_PIC32MX_VBUSIO=0 +# CONFIG_PIC32MX_WDENABLE is not set +CONFIG_PIC32MX_FETHIO=0 +CONFIG_PIC32MX_FMIIEN=0 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +CONFIG_ARCH_VECNOTIRQ=y +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=7245 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0xa0000000 +CONFIG_RAM_SIZE=131072 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_PIC32MX_STARTERKIT=y +# CONFIG_ARCH_BOARD_PIC32MX7MMB is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="pic32mx-starterkit" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=7 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/pic32mx-starterkit/nsh/setenv.sh b/configs/pic32mx-starterkit/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..7bfde6dd629c6d06be91d9531749af6bee1f91bb --- /dev/null +++ b/configs/pic32mx-starterkit/nsh/setenv.sh @@ -0,0 +1,66 @@ +#!/bin/bash +# configs/pic32mx-starterkit/nsh/setenv.sh +# +# Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +# This is the Cygwin path to the location where I installed the MicroChip +# PIC32MX toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install a different version of if you install +# the Linux PIC32MX toolchain as well +export TOOLCHAIN_PREBIN="/cygdrive/c/MicroChip/mplabc32/v1.12/bin": + +# This is where I have the Pinquino toolchain installed +# Careful with the ordering in the PATH variable... there is an incompatible +# version of make in this directory too! +#export TOOLCHAIN_POSTBIN=:"/cygdrive/c/pinguino-11/compilers/p32/bin" + +# This is the path to the tools subdirectory +export PIC32TOOL_DIR="${WD}/tools/pic32mx" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_PREBIN}${PIC32TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}${TOOLCHAIN_POSTBIN}" + +echo "PATH : ${PATH}" diff --git a/configs/pic32mx-starterkit/nsh2/Make.defs b/configs/pic32mx-starterkit/nsh2/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..20f5175d09d7dfddbf400168b6f183c707621414 --- /dev/null +++ b/configs/pic32mx-starterkit/nsh2/Make.defs @@ -0,0 +1,116 @@ +############################################################################ +# configs/pic32mx-starterkit/nsh2/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/mips/src/mips32/Toolchain.defs + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_GNU_ELF),y) +LDSCRIPT = mips-release.ld +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_PINGUINOW),y) +LDSCRIPT = mips-release.ld +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW),y) +LDSCRIPT = c32-release.ld +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE),y) +LDSCRIPT = c32-release.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/pic32mx-starterkit/nsh2/defconfig b/configs/pic32mx-starterkit/nsh2/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d6d57e13e88e95754818bc5153d31a1e16a4cf5e --- /dev/null +++ b/configs/pic32mx-starterkit/nsh2/defconfig @@ -0,0 +1,1135 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +CONFIG_ARCH_MIPS=y +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="mips" +CONFIG_ARCH_FAMILY="mips32" +CONFIG_ARCH_CHIP="pic32mx" +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_PHY_AUTONEG=y +CONFIG_NET_NTXDESC=7 +CONFIG_NET_NRXDESC=7 +CONFIG_NET_PRIORITY=28 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_PIC32MX_MULTICAST is not set +CONFIG_ARCH_CHIP_PIC32MX=y +# CONFIG_ARCH_CHIP_PIC32MZ is not set +CONFIG_ARCH_MIPS32=y +CONFIG_ARCH_MIPS_24KC=y +# CONFIG_ARCH_MIPS_M14K is not set +# CONFIG_ARCH_HAVE_MICROMIPS is not set + +# +# MIPS32 Configuration Options +# +# CONFIG_MIPS32_TOOLCHAIN_GNU_ELF is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_XC32 is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW is not set +CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE=y +# CONFIG_MIPS32_TOOLCHAIN_PINGUINOW is not set +# CONFIG_MIPS32_FRAMEPOINTER is not set + +# +# PIC32MX Configuration Options +# +# CONFIG_ARCH_CHIP_PIC32MX110F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX320F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX420F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX440F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX460F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX460F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512H is not set +CONFIG_ARCH_CHIP_PIC32MX795F512L=y +# CONFIG_ARCH_CHIP_PIC32MX1 is not set +# CONFIG_ARCH_CHIP_PIC32MX2 is not set +# CONFIG_ARCH_CHIP_PIC32MX3 is not set +# CONFIG_ARCH_CHIP_PIC32MX4 is not set +# CONFIG_ARCH_CHIP_PIC32MX5 is not set +# CONFIG_ARCH_CHIP_PIC32MX6 is not set +CONFIG_ARCH_CHIP_PIC32MX7=y +# CONFIG_PIC32MX_MVEC is not set +# CONFIG_PIC32MX_SPI is not set +CONFIG_PIC32MX_T1=y + +# +# PIC32MX Peripheral Support +# +# CONFIG_PIC32MX_WDT is not set +# CONFIG_PIC32MX_T2 is not set +# CONFIG_PIC32MX_T3 is not set +# CONFIG_PIC32MX_T4 is not set +# CONFIG_PIC32MX_T5 is not set +# CONFIG_PIC32MX_IC1 is not set +# CONFIG_PIC32MX_IC2 is not set +# CONFIG_PIC32MX_IC3 is not set +# CONFIG_PIC32MX_IC4 is not set +# CONFIG_PIC32MX_IC5 is not set +# CONFIG_PIC32MX_OC1 is not set +# CONFIG_PIC32MX_OC2 is not set +# CONFIG_PIC32MX_OC3 is not set +# CONFIG_PIC32MX_OC4 is not set +# CONFIG_PIC32MX_OC5 is not set +# CONFIG_PIC32MX_I2C1 is not set +# CONFIG_PIC32MX_I2C2 is not set +# CONFIG_PIC32MX_I2C3 is not set +# CONFIG_PIC32MX_I2C4 is not set +# CONFIG_PIC32MX_I2C5 is not set +# CONFIG_PIC32MX_SPI1 is not set +# CONFIG_PIC32MX_SPI2 is not set +# CONFIG_PIC32MX_SPI3 is not set +# CONFIG_PIC32MX_SPI4 is not set +# CONFIG_PIC32MX_UART1 is not set +# CONFIG_PIC32MX_UART2 is not set +# CONFIG_PIC32MX_UART3 is not set +# CONFIG_PIC32MX_UART4 is not set +# CONFIG_PIC32MX_UART5 is not set +# CONFIG_PIC32MX_UART6 is not set +# CONFIG_PIC32MX_ADC is not set +# CONFIG_PIC32MX_PMP is not set +# CONFIG_PIC32MX_CM1 is not set +# CONFIG_PIC32MX_CM2 is not set +# CONFIG_PIC32MX_CM3 is not set +# CONFIG_PIC32MX_RTCC is not set +# CONFIG_PIC32MX_DMA is not set +# CONFIG_PIC32MX_FLASH is not set +# CONFIG_PIC32MX_USBDEV is not set +# CONFIG_PIC32MX_USBHOST is not set +# CONFIG_PIC32MX_CAN1 is not set +# CONFIG_PIC32MX_CAN2 is not set +CONFIG_PIC32MX_ETHERNET=y +# CONFIG_PIC32MX_CTMU is not set + +# +# PIC32MX Peripheral Interrupt Priorities +# +CONFIG_PIC32MX_CTPRIO=16 +CONFIG_PIC32MX_CS0PRIO=16 +CONFIG_PIC32MX_CS1PRIO=16 +CONFIG_PIC32MX_INT0PRIO=16 +CONFIG_PIC32MX_INT1PRIO=16 +CONFIG_PIC32MX_INT2PRIO=16 +CONFIG_PIC32MX_INT3PRIO=16 +CONFIG_PIC32MX_INT4PRIO=16 +CONFIG_PIC32MX_T1PRIO=16 + +# +# PIC32MX PHY/Ethernet device driver settings +# + +# +# Device Configuration 0 (DEVCFG0) +# +CONFIG_PIC32MX_DEBUGGER=2 +CONFIG_PIC32MX_ICESEL=1 +CONFIG_PIC32MX_PROGFLASHWP=0xff +CONFIG_PIC32MX_BOOTFLASHWP=1 +CONFIG_PIC32MX_CODEWP=1 + +# +# Device Configuration 1 (DEVCFG1) +# + +# +# Device Configuration 3 (DEVCFG3) +# +CONFIG_PIC32MX_USBIDO=0 +CONFIG_PIC32MX_VBUSIO=0 +# CONFIG_PIC32MX_WDENABLE is not set +CONFIG_PIC32MX_FETHIO=0 +CONFIG_PIC32MX_FMIIEN=0 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +CONFIG_ARCH_VECNOTIRQ=y +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=7245 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0xa0000000 +CONFIG_RAM_SIZE=131072 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_PIC32MX_STARTERKIT=y +# CONFIG_ARCH_BOARD_PIC32MX7MMB is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="pic32mx-starterkit" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=7 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +CONFIG_RAMLOG=y +CONFIG_RAMLOG_SYSLOG=y +# CONFIG_RAMLOG_CONSOLE is not set +CONFIG_RAMLOG_BUFSIZE=16384 +# CONFIG_RAMLOG_CRLF is not set +CONFIG_RAMLOG_NONBLOCKING=y +CONFIG_RAMLOG_NPOLLWAITERS=4 +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_CHAR is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +# CONFIG_NSH_CONSOLE is not set +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/pic32mx-starterkit/nsh2/setenv.sh b/configs/pic32mx-starterkit/nsh2/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3b2145ed3c84bf4927f1958148a1debb50fe72de --- /dev/null +++ b/configs/pic32mx-starterkit/nsh2/setenv.sh @@ -0,0 +1,66 @@ +#!/bin/bash +# configs/pic32mx-starterkit/nsh2/setenv.sh +# +# Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +# This is the Cygwin path to the location where I installed the MicroChip +# PIC32MX toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install a different version of if you install +# the Linux PIC32MX toolchain as well +export TOOLCHAIN_PREBIN="/cygdrive/c/MicroChip/mplabc32/v1.12/bin": + +# This is where I have the Pinquino toolchain installed +# Careful with the ordering in the PATH variable... there is an incompatible +# version of make in this directory too! +#export TOOLCHAIN_POSTBIN=:"/cygdrive/c/pinguino-11/compilers/p32/bin" + +# This is the path to the tools subdirectory +export PIC32TOOL_DIR="${WD}/tools/pic32mx" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_PREBIN}${PIC32TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}${TOOLCHAIN_POSTBIN}" + +echo "PATH : ${PATH}" diff --git a/configs/pic32mx-starterkit/scripts/c32-release.ld b/configs/pic32mx-starterkit/scripts/c32-release.ld new file mode 100644 index 0000000000000000000000000000000000000000..ab777f4a91f03e4868703c7b659251fb1f61de3a --- /dev/null +++ b/configs/pic32mx-starterkit/scripts/c32-release.ld @@ -0,0 +1,317 @@ +/**************************************************************************** + * configs/pic32mx-starterkit/nsh/ld.script + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MX795F512L has 512Kb of program FLASH at physical address + * 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 512K + + /* The PIC32MX795F512L has 12Kb of boot FLASH at physical address + * 0x1fc00000. The initial reset vector is in KSEG1, but all other + * accesses are in KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 8192-1168 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16 + + /* The PIC32MX795F512L has 128Kb of data memory at physical address + * 0x00000000. Since the PIC32MX has no data cache, this memory is + * always accessed through KSEG1. + * + * When used with MPLAB, we need to set aside 512 bytes of memory + * for use by MPLAB. + */ + + kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 128K - 512 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(pic32mx) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/pic32mx-starterkit/scripts/mips-release.ld b/configs/pic32mx-starterkit/scripts/mips-release.ld new file mode 100644 index 0000000000000000000000000000000000000000..0d13e78729d542ece77a684ebe5bcae82f541d55 --- /dev/null +++ b/configs/pic32mx-starterkit/scripts/mips-release.ld @@ -0,0 +1,317 @@ +/**************************************************************************** + * configs/pic32mx-starterkit/nsh/ld.script + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MX795F512L has 512Kb of program FLASH at physical address + * 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 512K + + /* The PIC32MX795F512L has 12Kb of boot FLASH at physical address + * 0x1fc00000. The initial reset vector is in KSEG1, but all other + * accesses are in KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 8192-1168 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16 + + /* The PIC32MX795F512L has 128Kb of data memory at physical address + * 0x00000000. Since the PIC32MX has no data cache, this memory is + * always accessed through KSEG1. + * + * When used with MPLAB, we need to set aside 512 bytes of memory + * for use by MPLAB. + */ + + kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 128K - 512 +} + +OUTPUT_FORMAT("elf32-littlemips") +OUTPUT_ARCH(mips) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/pic32mx-starterkit/src/.gitignore b/configs/pic32mx-starterkit/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/pic32mx-starterkit/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/pic32mx-starterkit/src/Makefile b/configs/pic32mx-starterkit/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..52a42079ae710381d2b38c3b0e002d6cca9361e2 --- /dev/null +++ b/configs/pic32mx-starterkit/src/Makefile @@ -0,0 +1,56 @@ +############################################################################ +# configs/pic32mx-starterkit/src/Makefile +# +# Copyright (C) 2011-2012, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = pic32mx_boot.c pic32mx_leds.c pic32mx_spi.c + +ifeq ($(CONFIG_PIC32MX_USBDEV),y) +CSRCS += pic32mx_usbdev.c +ifeq ($(CONFIG_EXAMPLES_USBTERM_DEVINIT),y) +CSRCS += pic32mx_usbterm.c +endif +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += pic32mx_appinit.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += pic32mx_usbmsc.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/pic32mx-starterkit/src/pic32mx-starterkit.h b/configs/pic32mx-starterkit/src/pic32mx-starterkit.h new file mode 100644 index 0000000000000000000000000000000000000000..dabd7238f6a687bc2d603ce51c8c5f4d31921009 --- /dev/null +++ b/configs/pic32mx-starterkit/src/pic32mx-starterkit.h @@ -0,0 +1,123 @@ +/**************************************************************************** + * configs/pic32mx-starterkit/src/pic32mx-starterkit.h + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_PIC32MX_STARTERKIT_SRC_PIC32MX_STARTERKIT_H +#define __CONFIGS_PIC32MX_STARTERKIT_SRC_PIC32MX_STARTERKIT_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* The PIC32 starter kit has 3 user LEDs + * + * RD0 User LED D4 (high illuminates) + * RD2 User LED D5 (high illuminates) + * RD1 User LED D6 (high illuminates) + * + * There are 5 LEDs available on the MEB: + * + * RD1 LED1 + * RD2 LED2 + * RD3 LED3 + * RC1 LED4 + * RC2 LED5 + */ + +/* The PIC32 starter kit has 3 switches: + * + * RD7 Switch SW2 (low when closed) + * RD6 Switch SW1 (low when closed) + * RD13 Switch SW3 (low when closed) + */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Name: pic32mx_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the PCB Logic board. + * + ************************************************************************************/ + +#if defined(CONFIG_PIC32MX_SPI2) +void weak_function pic32mx_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: pic32mx_led_initialize + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void pic32mx_led_initialize(void); +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_PIC32MX_STARTERKIT_SRC_PIC32MX_STARTERKIT_H */ diff --git a/configs/pic32mx-starterkit/src/pic32mx_appinit.c b/configs/pic32mx-starterkit/src/pic32mx_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..64236307337804e797e98989f4c7dab691a23320 --- /dev/null +++ b/configs/pic32mx-starterkit/src/pic32mx_appinit.c @@ -0,0 +1,380 @@ +/**************************************************************************** + * config/pic32mx-starterkit/src/pic32mx_appinit.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "pic32mx.h" +#include "pic32mx-starterkit.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* Assume that we have MMC/SD, USB host (and USB device) */ + +#define NSH_HAVEMMCSD 1 +#define NSH_HAVEUSBHOST 1 + +/* The PIC32 Ethernet Starter Kit does not have an SD slot on board. If one + * is added, then it must be specified by defining which SPI bus that it + * is connected on. + */ + +#ifndef CONFIG_PIC32MX_MMCSDSPIPORTNO +# undef NSH_HAVEMMCSD +#endif + +/* Make sure that the configuration will support the SD card */ + +#ifdef NSH_HAVEMMCSD + + /* Make sure that the NSH configuration uses the correct SPI */ + +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) +# define CONFIG_NSH_MMCSDSPIPORTNO CONFIG_PIC32MX_MMCSDSPIPORTNO +# elif CONFIG_NSH_MMCSDSPIPORTNO != CONFIG_PIC32MX_MMCSDSPIPORTNO +# warning "CONFIG_PIC32MX_MMCSDSPIPORTNO does not match CONFIG_NSH_MMCSDSPIPORTNO" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO CONFIG_PIC32MX_MMCSDSPIPORTNO +# endif + + /* Make sure that the NSH configuration uses the slot */ + +# if !defined(CONFIG_NSH_MMCSDSLOTNO) +# define CONFIG_NSH_MMCSDSLOTNO 0 +# elif CONFIG_NSH_MMCSDSLOTNO != 0 +# warning "The PIC32 Starter Kit has only one slot (0)" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif + + /* Make sure that the correct SPI is enabled in the configuration */ + +# if CONFIG_PIC32MX_MMCSDSPIPORTNO == 1 && !defined(CONFIG_PIC32MX_SPI1) +# warning "CONFIG_PIC32MX_SPI1 is not enabled" +# undef NSH_HAVEMMCSD +# elif CONFIG_PIC32MX_MMCSDSPIPORTNO == 2 && !defined(CONFIG_PIC32MX_SPI2) +# warning "CONFIG_PIC32MX_SPI2 is not enabled" +# undef NSH_HAVEMMCSD +# elif CONFIG_PIC32MX_MMCSDSPIPORTNO == 3 && !defined(CONFIG_PIC32MX_SPI3) +# warning "CONFIG_PIC32MX_SPI3 is not enabled" +# undef NSH_HAVEMMCSD +# elif CONFIG_PIC32MX_MMCSDSPIPORTNO == 4 && !defined(CONFIG_PIC32MX_SPI4) +# warning "CONFIG_PIC32MX_SPI4 is not enabled" +# undef NSH_HAVEMMCSD +# endif +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef NSH_HAVEMMCSD +#endif + +/* Select /dev/mmcsd0 if no other minor number is provided */ + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/* USB Host */ + +#ifdef CONFIG_USBHOST +# ifndef CONFIG_PIC32MX_USBHOST +# error "CONFIG_PIC32MX_USBHOST is not selected" +# undef NSH_HAVEUSBHOST +# endif +#endif + +#ifdef CONFIG_PIC32MX_USBHOST +# ifndef CONFIG_USBHOST +# warning "CONFIG_USBHOST is not selected" +# undef NSH_HAVEUSBHOST +# endif +#endif + +#if !defined(CONFIG_USBHOST) || !defined(CONFIG_PIC32MX_USBHOST) +# undef NSH_HAVEUSBHOST +#endif + +#ifdef NSH_HAVEUSBHOST +# ifndef CONFIG_USBHOST_DEFPRIO +# define CONFIG_USBHOST_DEFPRIO 50 +# endif +# ifndef CONFIG_USBHOST_STACKSIZE +# ifdef CONFIG_USBHOST_HUB +# define CONFIG_USBHOST_STACKSIZE 1536 +# else +# define CONFIG_USBHOST_STACKSIZE 1024 +# endif +# endif +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef NSH_HAVEUSBHOST +static struct usbhost_connection_s *g_usbconn; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nsh_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ****************************************************************************/ + +#ifdef NSH_HAVEUSBHOST +static int nsh_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + syslog(LOG_INFO, "nsh_waiter: Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + syslog(LOG_INFO, "nsh_waiter: %s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/**************************************************************************** + * Name: nsh_sdinitialize + * + * Description: + * Initialize SPI-based microSD. + * + ****************************************************************************/ + +#ifdef NSH_HAVEMMCSD +static int nsh_sdinitialize(void) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + spi = pic32mx_spibus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + ret = -ENODEV; + goto errout; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, + CONFIG_NSH_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, + CONFIG_NSH_MMCSDSLOTNO, ret); + goto errout; + } + + syslog(LOG_INFO, "Successfuly bound SPI port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, + CONFIG_NSH_MMCSDSLOTNO); + return OK; + +errout: + return ret; +} +#else +# define nsh_sdinitialize() (OK) +#endif + +/**************************************************************************** + * Name: nsh_usbhostinitialize + * + * Description: + * Initialize SPI-based microSD. + * + ****************************************************************************/ + +#ifdef NSH_HAVEUSBHOST +static int nsh_usbhostinitialize(void) +{ + int pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + syslog(LOG_INFO, "Register class drivers\n"); + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB host Mass Storage Class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + + /* Then get an instance of the USB host interface */ + + syslog(LOG_INFO, "Initialize USB host\n"); + g_usbconn = pic32_usbhost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + syslog(LOG_INFO, "Start nsh_waiter\n"); + + pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO, + CONFIG_USBHOST_STACKSIZE, + (main_t)nsh_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + + return -ENODEV; +} +#else +# define nsh_usbhostinitialize() (OK) +#endif + +/**************************************************************************** + * Name: nsh_usbdevinitialize + * + * Description: + * Initialize SPI-based microSD. + * + ****************************************************************************/ + +#ifdef CONFIG_USBDEV +static int nsh_usbdevinitialize(void) +{ + /* The PIC32 Starter Kit has no way to know when the USB is connected. So + * we will fake it and tell the USB driver that the USB is connected now. + */ + + pic32mx_usbattach(); + return OK; +} +#else +# define nsh_usbdevinitialize() (OK) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + int ret; + + /* Initialize SPI-based microSD */ + + ret = nsh_sdinitialize(); + if (ret == OK) + { + /* Initialize USB host */ + + ret = nsh_usbhostinitialize(); + } + + if (ret == OK) + { + /* Initialize USB device */ + + ret = nsh_usbdevinitialize(); + } + + return ret; +} diff --git a/configs/pic32mx-starterkit/src/pic32mx_boot.c b/configs/pic32mx-starterkit/src/pic32mx_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..4c537a1f2e8d6f8d07e57e1a103b0aa65905c590 --- /dev/null +++ b/configs/pic32mx-starterkit/src/pic32mx_boot.c @@ -0,0 +1,93 @@ +/************************************************************************************ + * configs/pic32mx-starterkit/src/pic32mx_boot.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "pic32mx.h" +#include "pic32mx-starterkit.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_boardinitialize + * + * Description: + * All PIC32MX architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void pic32mx_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) at least one SPI is enabled, and 2) the weak + * function pic32mx_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_PIC32MX_SPI1) || defined(CONFIG_PIC32MX_SPI2) || \ + defined(CONFIG_PIC32MX_SPI3) || defined(CONFIG_PIC32MX_SPI4) + if (pic32mx_spidev_initialize) + { + pic32mx_spidev_initialize(); + } +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + pic32mx_led_initialize(); +#endif +} diff --git a/configs/pic32mx-starterkit/src/pic32mx_leds.c b/configs/pic32mx-starterkit/src/pic32mx_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..0c29d08c53a37b5f711eb6abeec0f00ab406d944 --- /dev/null +++ b/configs/pic32mx-starterkit/src/pic32mx_leds.c @@ -0,0 +1,283 @@ +/**************************************************************************** + * configs/pic32mx-starterkit/src/pic32mx_leds.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "pic32mx.h" +#include "pic32mx-ioport.h" +#include "pic32mx-starterkit.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED Configuration ********************************************************/ +/* The PIC32MX Ethernet Starter kit has 3 user LEDs labelled LED1-3 on the + * board graphics (but referred to as LED4-6 in the schematic): + * + * PIN User's Guide Board Stencil Notes + * --- ------------- -------------- ------------------------- + * RD0 "User LED D4" "LED1 (RD0") High illuminates (RED) + * RD2 "User LED D5" "LED3 (RD2)" High illuminates (YELLOW) + * RD1 "User LED D6" "LED2 (RD1)" High illuminates (GREEN) + * + * We will use the labels on the board to identify LEDs + * + * ON OFF + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED1 LED2 LED3 LED1 LED2 LED3 + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED_STARTED 0 OFF OFF OFF --- --- --- + * LED_HEAPALLOCATE 1 ON OFF N/C --- --- --- + * LED_IRQSENABLED 2 OFF ON N/C --- --- --- + * LED_STACKCREATED 3 ON ON N/C --- --- --- + * LED_INIRQ 4 N/C N/C ON N/C N/C OFF + * LED_SIGNAL 4 N/C N/C ON N/C N/C OFF + * LED_ASSERTION 4 N/C N/C ON N/C N/C OFF + * LED_PANIC 5 ON N/C N/C OFF N/C N/C + */ + +#define GPIO_LED_1 (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTD|GPIO_PIN0) +#define GPIO_LED_2 (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTD|GPIO_PIN1) +#define GPIO_LED_3 (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTD|GPIO_PIN2) + +/* LED Management Definitions ***********************************************/ + +#ifdef CONFIG_ARCH_LEDS +# define LED_OFF 0 +# define LED_ON 1 +# define LED_NC 2 +#endif + +/* Debug ********************************************************************/ + +#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_LEDS) +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# undef CONFIG_DEBUG_LEDS +# undef CONFIG_DEBUG_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private types + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +struct led_setting_s +{ + uint8_t led1 : 2; + uint8_t led2 : 2; + uint8_t led3 : 2; + uint8_t unused : 2; +}; +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* If CONFIG_ARCH_LEDS is defined then NuttX will control the LEDs. The + * following structures identified the LED settings for each NuttX LED state. + */ + +#ifdef CONFIG_ARCH_LEDS +static const struct led_setting_s g_ledonvalues[LED_NVALUES] = +{ + {LED_OFF, LED_OFF, LED_OFF, LED_OFF}, + {LED_ON, LED_OFF, LED_NC, LED_OFF}, + {LED_OFF, LED_ON, LED_NC, LED_OFF}, + {LED_ON, LED_ON, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_ON, LED_OFF}, + {LED_ON, LED_NC, LED_NC, LED_OFF}, +}; + +static const struct led_setting_s g_ledoffvalues[LED_NVALUES] = +{ + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_OFF, LED_OFF}, + {LED_OFF, LED_NC, LED_NC, LED_OFF}, +}; + +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + * any way. The following array simply maps the PIC32MX_STARTERKIT_LEDn + * index values to the correct LED pin configuration. + */ + +#else +static const uint16_t g_ledpincfg[PIC32MX_STARTERKIT_NLEDS] = +{ + GPIO_LED_1, GPIO_LED_2, GPIO_LED_3 +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pic32mx_setleds + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +static void pic32mx_setleds(FAR const struct led_setting_s *setting) +{ + if (setting->led1 != LED_NC) + { + pic32mx_gpiowrite(GPIO_LED_1, setting->led1 == LED_ON); + } + + if (setting->led2 != LED_NC) + { + pic32mx_gpiowrite(GPIO_LED_2, setting->led2 == LED_ON); + } + + if (setting->led3 != LED_NC) + { + pic32mx_gpiowrite(GPIO_LED_3, setting->led3 == LED_ON); + } +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled_initialize(void) +{ + /* Configure output pins */ + + pic32mx_configgpio(GPIO_LED_1); + pic32mx_configgpio(GPIO_LED_2); + pic32mx_configgpio(GPIO_LED_3); +} +#endif + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < PIC32MX_STARTERKIT_NLEDS) + { + pic32mx_gpiowrite(g_ledpincfg[led], ledon); + } +} +#endif + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled_all(uint8_t ledset) +{ + board_userled(PIC32MX_STARTERKIT_LED1, (ledset & PIC32MX_STARTERKIT_LED1_BIT) != 0); + board_userled(PIC32MX_STARTERKIT_LED2, (ledset & PIC32MX_STARTERKIT_LED2_BIT) != 0); + board_userled(PIC32MX_STARTERKIT_LED3, (ledset & PIC32MX_STARTERKIT_LED3_BIT) != 0); +} +#endif + +/**************************************************************************** + * Name: pic32mx_led_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void pic32mx_led_initialize(void) +{ + /* Configure output pins */ + + pic32mx_configgpio(GPIO_LED_1); + pic32mx_configgpio(GPIO_LED_2); + pic32mx_configgpio(GPIO_LED_3); +} +#endif + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_on(int led) +{ + if ((unsigned)led < LED_NVALUES) + { + pic32mx_setleds(&g_ledonvalues[led]); + } +} +#endif + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_off(int led) +{ + if ((unsigned)led < LED_NVALUES) + { + pic32mx_setleds(&g_ledoffvalues[led]); + } +} +#endif diff --git a/configs/pic32mx-starterkit/src/pic32mx_spi.c b/configs/pic32mx-starterkit/src/pic32mx_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..a9e2df2e6adc1e8ea464a8d67b3afaad1b276494 --- /dev/null +++ b/configs/pic32mx-starterkit/src/pic32mx_spi.c @@ -0,0 +1,222 @@ +/************************************************************************************ + * configs/pic32mx-starterkit/src/pic32mx_spi.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "pic32mx.h" +#include "pic32mx-starterkit.h" + +#if defined(CONFIG_PIC32MX_SPI1) || defined(CONFIG_PIC32MX_SPI2) || \ + defined(CONFIG_PIC32MX_SPI3) || defined(CONFIG_PIC32MX_SPI4) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* The following enable debug output from this file (needs CONFIG_DEBUG too). + * + * CONFIG_SPI_DEBUG - Define to enable basic SPI debug + * CONFIG_SPI_VERBOSE - Define to enable verbose SPI debug + */ + +#ifdef CONFIG_SPI_DEBUG +# define spidbg lldbg +# ifdef CONFIG_SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef CONFIG_SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Sure PIC32MX board. + * + ************************************************************************************/ + +void weak_function pic32mx_spidev_initialize(void) +{ + /* Configure the SPI chip select GPIOs */ + +#warning "Missing logic" +} + +/************************************************************************************ + * Name: pic32mx_spiNselect, pic32mx_spiNstatus, and pic32mx_spiNcmddata + * + * Description: + * These external functions must be provided by board-specific logic. They are + * implementations of the select, status, and cmddata methods of the SPI interface + * defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All other methods + * including pic32mx_spibus_initialize()) are provided by common PIC32MX logic. To use + * this common SPI logic on your board: + * + * 1. Provide logic in pic32mx_boardinitialize() to configure SPI/SSP chip select + * pins. + * 2. Provide pic32mx_spiNselect() and pic32mx_spiNstatus() functions + * in your board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * pic32mx_spiNcmddata() functions in your board-specific logic. These + * functions will perform cmd/data selection operations using GPIOs in the way + * your board is configured. + * 3. Add a call to pic32mx_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by pic32mx_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +struct spi_dev_s; +enum spi_dev_e; + +#ifdef CONFIG_PIC32MX_SPI1 +void pic32mx_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t pic32mx_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + spidbg("Returning nothing\n"); +#warning "Missing logic" + return 0; +} +#ifdef CONFIG_SPI_CMDDATA +int pic32mx_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif + +#ifdef CONFIG_PIC32MX_SPI1 +void pic32mx_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t pic32mx_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + spidbg("Returning nothing\n"); +#warning "Missing logic" + return 0; +} +#ifdef CONFIG_SPI_CMDDATA +int pic32mx_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif + +#ifdef CONFIG_PIC32MX_SPI3 +void pic32mx_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t pic32mx_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + spidbg("Returning nothing\n"); +#warning "Missing logic" + return 0; +} +#ifdef CONFIG_SPI_CMDDATA +int pic32mx_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif + +#ifdef CONFIG_PIC32MX_SPI4 +void pic32mx_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t pic32mx_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + spidbg("Returning nothing\n"); +#warning "Missing logic" + return 0; +} +#ifdef CONFIG_SPI_CMDDATA +int pic32mx_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif + +#endif /* CONFIG_PIC32MX_SPI1..4 */ diff --git a/configs/pic32mx-starterkit/src/pic32mx_usbdev.c b/configs/pic32mx-starterkit/src/pic32mx_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..2bf94566bcadaef8ada0c589ec577bbc13134a3e --- /dev/null +++ b/configs/pic32mx-starterkit/src/pic32mx_usbdev.c @@ -0,0 +1,162 @@ +/************************************************************************************ + * configs/pic32mx-starterkit/src/pic32mx_usbdev.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include + +#include "pic32mx.h" +#include "pic32mx-starterkit.h" + +#if defined(CONFIG_PIC32MX_USBDEV) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* + * PIN NAME SIGNAL NOTES + * ---- ------------------------------- -------------- ------------------------------ + * 20 VBUSON/C1IN+/AN5/CN7/RB5 VBUSON To USB VBUS circuitry + * 43 C2IN+/AN3/CN5/RB3 USB_PGOOD Power good (low if bad) + */ + +#define GPIO_USB_VBUSON (GPIO_INPUT|GPIO_PORTB|GPIO_PIN5) +#define GPIO_USB_PGOOD (GPIO_INPUT|GPIO_PORTB|GPIO_PIN3) + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_usbdevinitialize + * + * Description: + * Called to configure the mini-A/B J5 on the PIC32 Ethernet Starter Kit for the + * USB device + * + ************************************************************************************/ + +void weak_function pic32mx_usbdevinitialize(void) +{ + /* Connect the PHY to the USB mini-B port. Order and timing matter! */ + + pic32mx_configgpio(GPIO_USB_PGOOD); + + /* Notes from the Sure Electronics sample code: + * + * "The USB specifications require that USB peripheral devices must never source + * current onto the Vbus pin. Additionally, USB peripherals should not source + * current on D+ or D- when the host/hub is not actively powering the Vbus line. + * When designing a self powered (as opposed to bus powered) USB peripheral + * device, the firmware should make sure not to turn on the USB module and D+ + * or D- pull up resistor unless Vbus is actively powered. Therefore, the + * firmware needs some means to detect when Vbus is being powered by the host. + * A 5V tolerant I/O pin can be connected to Vbus (through a resistor), and + * can be used to detect when Vbus is high (host actively powering), or low + * (host is shut down or otherwise not supplying power). The USB firmware + * can then periodically poll this I/O pin to know when it is okay to turn on + * the USB module/D+/D- pull up resistor. When designing a purely bus powered + * peripheral device, it is not possible to source current on D+ or D- when the + * host is not actively providing power on Vbus. Therefore, implementing this + * bus sense feature is optional. ..." + */ + +#ifdef CONFIG_USBHOST + //pic32mx_configgpio(GPIO_USB_VBUSON); +#endif + + /* "If the host PC sends a GetStatus (device) request, the firmware must respond + * and let the host know if the USB peripheral device is currently bus powered + * or self powered. See chapter 9 in the official USB specifications for details + * regarding this request. If the peripheral device is capable of being both + * self and bus powered, it should not return a hard coded value for this request. + * Instead, firmware should check if it is currently self or bus powered, and + * respond accordingly. If the hardware has been configured like demonstrated + * on the PICDEM FS USB Demo Board, an I/O pin can be polled to determine the + * currently selected power source. ..." + */ + +#ifdef CONFIG_USB_PWRSENSE + //pic32mx_configgpio(GPIO_USB_PWRSENSE); +#endif +} + +/************************************************************************************ + * Name: pic32mx_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB + * software connect and disconnect), then the board software must provide + * stm32_pullup. See include/nuttx/usb/usbdev.h for additional description + * of this method. Alternatively, if no pull-up GPIO the following EXTERN + * can be redefined to be NULL. + * + ************************************************************************************/ + +int pic32mx_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + /* The PIC32 Ethernet Starter Kit does not have a USB pull-up */ + + return OK; +} + +/************************************************************************************ + * Name: pic32mx_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver + * is used. This function is called whenever the USB enters or leaves + * suspend mode. This is an opportunity for the board logic to shutdown + * clocks, power, etc. while the USB is suspended. + * + ************************************************************************************/ + +void pic32mx_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + /* Do nothing */ +} + +#endif /* CONFIG_PIC32MX_USBDEV */ diff --git a/configs/pic32mx-starterkit/src/pic32mx_usbmsc.c b/configs/pic32mx-starterkit/src/pic32mx_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..e7caf0f94f59e92f709f987b9201d0819541b6a7 --- /dev/null +++ b/configs/pic32mx-starterkit/src/pic32mx_usbmsc.c @@ -0,0 +1,70 @@ +/**************************************************************************** + * configs/pic32mx-starterkit/src/up_usbmsc.c + * + * Copyright (C) 2012, 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "pic32mx-starterkit.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* If system/usbmsc is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see + * pic32mx_appinit.c). In this case, there is nothing further to be done here. + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS +# warning "Missing Logic" +#endif /* CONFIG_NSH_BUILTIN_APPS */ + + return 0; +} diff --git a/configs/pic32mx-starterkit/src/pic32mx_usbterm.c b/configs/pic32mx-starterkit/src/pic32mx_usbterm.c new file mode 100644 index 0000000000000000000000000000000000000000..1c56211c7435e03d2a34b709fccda510069a2873 --- /dev/null +++ b/configs/pic32mx-starterkit/src/pic32mx_usbterm.c @@ -0,0 +1,104 @@ +/************************************************************************************ + * configs/pic32mx-starterkit/src/pic32mx_usbterm.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include + +#include "pic32mx.h" +#include "pic32mx-starterkit.h" + +#if defined(CONFIG_PIC32MX_USBDEV) && defined(CONFIG_EXAMPLES_USBTERM_DEVINIT) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: + * + * Description: + * If CONFIG_EXAMPLES_USBTERM_DEVINIT is defined, then the example will + * call this user provided function as part of its initialization. + * + ****************************************************************************/ + +int usbterm_devinit(void) +{ + /* The PIO32 Starter Kit has no way to know when the USB is connected. So + * we will fake it and tell the USB driver that the USB is connected now. + * + * If examples/usbterm is built as an NSH built-in application, then + * pic32mx_usbattach() will be called in board_app_initialize(). + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS + pic32mx_usbattach(); +#endif + return OK; +} + +/**************************************************************************** + * Name: + * + * Description: + * If CONFIG_EXAMPLES_USBTERM_DEVINIT is defined, then the example will + * call this user provided function as part of its termination sequence. + * + ****************************************************************************/ + +void usbterm_devuninit(void) +{ + /* Tell the USB driver that the USB is no longer connected */ + + pic32mx_usbdetach(); +} + +#endif /* CONFIG_PIC32MX_USBDEV && CONFIG_EXAMPLES_USBTERM_DEVINIT */ diff --git a/configs/pic32mx7mmb/Kconfig b/configs/pic32mx7mmb/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..8b68012f7d1cc56cbf178c75f6791804c2c61c65 --- /dev/null +++ b/configs/pic32mx7mmb/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_PIC32_PIC32MX7MMB +endif diff --git a/configs/pic32mx7mmb/README.txt b/configs/pic32mx7mmb/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..641f15902445a80dad8be8d8d88f1b675912d71d --- /dev/null +++ b/configs/pic32mx7mmb/README.txt @@ -0,0 +1,810 @@ +configs/pic32mx7mmb README +=============================== + +This README file discusses the port of NuttX to the Mikroelektronika PIC32MX7 +Multimedia Board (MMB). See http://www.mikroe.com/ for further information. + +Contents +======== + + PIC32MX795F512L Pin Out + Toolchains + Creating Compatible NuttX HEX files + Serial Console + LEDs + PIC32MX Configuration Options + Configurations + +PIC32MX795F512L Pin Out +======================= + +LEFT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) +--- ---------------------------------- -------------------------- ----------------------------------------------- +PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + (Family Data Sheet Table 1-1) (PIC32MX7 Schematic) +--- ---------------------------------- -------------------------- ----------------------------------------------- + 1 RG15/AERXERR AERXERR LAN8720A RXERR + 2 VDD VCC3 --- + 3 PMD5/RE5 PMPD5 TFT display, HDR1 pin 13 + 4 PMD6/RE6 PMPD6 TFT display, HDR1 pin 12 + 5 PMD7/RE7 PMPD7 TFT display, HDR1 pin 11 + 6 RC1/T2CK LCD_RST TFT display + 7 RC2/AC2TX/T3CK EE_CS# M25P80 CS + 8 RC3/AC2RX/T4CK ACL_CS# ADXL345 CS and VCC + 9 RC4/SDI1/T5CK SDI1 SPI1 data IN + 10 PMA5/CN8/ECOL/RG6/SCK2/U3RTS/U6TX SD_WP SD card, write protect + 11 PMA4/CN9/ECRS/RG7/SDA4/SDI2/U3RX SD_CD# SD card, card detect (not) + 12 PMA3/AECRSDV/AERXDV/CN10/ECRSDV/ AECRSDV LAN8720A SRS_DIV + ERXDV/RG8/SCL4/SDO2/U3TX + 13 MCLR MCLR Debug connector + 14 PMA2/AEREFCLK/AERXCLK/CN11/ AEREFCLK LAN8720A INT + EREFCLK/ERXCLK/RG9/SS2/U3CTS/ + U6RX + 15 VSS (grounded) --- + 16 VDD VCC3 --- + 17 RA0/TMS LED-0 LED0 (pulled up), HDR2 pin 26 + 18 AERXD0/INT1/RE8 AERXD0 LAN8720A RXD0 + 19 AERXD1/INT2/RE9 AERXD1 LAN8720A RXD1 + 20 AN5/C1IN+/CN7/RB5/VBUSON RB5 HDR1 pin 28 + 21 AN4/C1IN-/CN6/RB4 CDC_CS# ? + 22 AN3/C2IN+/CN5/RB3 JOY-D Joystick D, HDR1 pin 21 + 23 AN2/C2IN-/CN4/RB2 JOY-C Joystick C, HDR1 pin 22 + 24 AN1/CN3/PGEC1/RB1 JOY-B Joystick B, HDR1 pin 23 + 25 AN0/CN2/PGED1/RB0 JOY-A Joystick A, HDR1 pin 24 + +BOTTOM SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) +--- ---------------------------------- -------------------------- ----------------------------------------------- +PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + (Family Data Sheet Table 1-1) (PIC32MX7 Schematic) +--- ---------------------------------- -------------------------- ----------------------------------------------- + 26 AN6/OCFA/PGEC2/RB6 PGC2 Debugger interface + 27 AN7/PGED2/RB7 PGD2 Debugger interface + 28 PMA7/AERXD2/CVREF-/RA9 SD_CD# SD Connector + 29 PMA6/AERXD3/CVREF+/RA10/VREF+ JOY-CP Joystick CP, HDR1 pin 25 + 30 AVDD VCC3 --- + 31 AVSS (grounded) --- + 32 AN8/C1OUT/RB8 TEMP MCP9700A VOUT + 33 AN9/C2OUT/RB9 USB-PSW USB soft-connect pull-up, HDR2 pin 3 + 34 PMA13/AN10/RB10/CVREFOUT LCD-YD TFT display + 35 PMA12/AETXERR/AN11/ERXERR/RB11 LCD-XR TFT display + 36 VSS (grounded) --- + 37 VDD P32_VDD --- + 38 RA1/TCK LED-1 LED1 (pulled up), HDR2 pin 27 + 39 AC1TX/RF13/SCK4/U2RTS/U5TX SCK3A WM873ASEDS BCLK, HDR2 pin 21 + 40 AC1RX/RF12/SS4/U2CTS/U5RX LRC WM873ASEDS DACLRC + 41 PMA11/AECRS/AN12/ERXD0/RB12 LCD-YU TFT display + 42 PMA10/AECOL/AN13/ERXD1/RB13 LCD-XL TFT display + 43 PMA1/AETXD3/AN14/ERXD2/PMALH/RB14 LCD-CS# TFT display, HDR2 pin 3 + 44 PMA0/AETXD2/AN15/CN12/ERXD3/OCFB/ LCD-RS TFT display + PMALL/RB15 + 45 VSS (grounded) --- + 46 VDD P32_VDD --- + 47 AETXD0/CN20/RD14/SS3/U1CTS/U4RX AETXD0 LAN8720A TXD0 + 48 AETXD1/CN21/RD15/SCK3/U1RTS/U4TX AETXD1 LAN8720A TXD1 + 49 PMA9/CN17/RF4/SDA5/SDI4/U2RX SDI3A WM873ASEDS ADCDAT, HDR2 pin 19 + 50 PMA8/CN18/RF5/SCL5/SDO4/U2TX SDO3A WM873ASEDS DACDAT, HDR2 pin 20 + +RIGHT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) +--- ---------------------------------- -------------------------- ----------------------------------------------- +PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + (Family Data Sheet Table 1-1) (PIC32MX7 Schematic) +--- ---------------------------------- -------------------------- ----------------------------------------------- + 75 VSS (grounded) + 74 CN0/RC14/SOSCO/T1CK SOSC0 32.768kHz Oscillator + 73 CN1/RC13/SOSCI SOSC1 32.768kHz Oscillator + 72 OC1/INT0/RD0/SDO1 SDO1M SPI1 data out + 71 PMA14/AEMDC/EMDC/IC4/PMCS1/RD11 AEMDC LAN8720A MDC + 70 PMA15/IC3/PMCS2/RD10/SCK1 SCK1M SPI1 clock + 69 IC2/RD9/SS1 LED-2 LED2 (pulled up), HDR2 pin 28 + 68 AEMDIO/EMDIO/IC1/RD8/RTCC AEMDIO LAN8720A MDIO + 67 AETXEN/INT4/RA15/SDA1 AETXN LAN8720A TXEN + 66 AETXCLK/INT3/RA14/SCL1 RA14 HDR2 pin 14 + 65 VSS (grounded) --- + 64 CLKO/OSC2/RC15 8MHz crystal + 63 CLKI/OSC1/RC12 8MHz crystal + 62 VDD VCC3 --- + 61 RA5/TDO RA5 HDR2 pin 13 + 60 RA4/TDI RA4 HDR2 pin 12 + 59 RA3/SDA2 SDA2 I2C2 SDA, 24AA01 SDA + 58 RA2/SCL2 SCL2 I2C2 SCL, 24AA01 SCL + 57 D+/RG2 USBDP USB device + 56 D-/RG3 USBDM USB device + 55 VUSB VCC3 --- + 54 VBUS USB_DET USB device + 53 RF8/SCL3/SDO3/U1TX U1TX RS-232 + 52 RF2/SDA3/SDI3/U1RX U2RX RS-232 + 51 RF3/USBID USB-ID USB device + +TOP SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) +--- ---------------------------------- -------------------------- ----------------------------------------------- +PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + (Family Data Sheet Table 1-1) (PIC32MX7 Schematic) +--- ---------------------------------- -------------------------- ----------------------------------------------- +100 PMD4/RE4 PMPD4 TFT display, HDR1 pin 14 + 99 PMD3/RE3 PMPD3 TFT display, HDR1 pin 15 + 98 PMD2/RE2 PMPD2 TFT display, HDR1 pin 16 + 97 RG13/TRD0 TRD0 HDR2 pin 7 + 96 RG12/TRD1 TRD1 HDR2 pin 8 + 95 RG14/TRD2 TRD2 HDR2 pin 9 + 94 PMD1/RE1 PMPD1 TFT display, HDR1 pin 17 + 93 PMD0/RE0 PMPD0 TFT display, HDR1 pin 18 + 92 RA7/TRD3 TRD3 HDR2 pin 10 + 91 RA6/TRCLK TRCLK HDR2 pin 6 + 90 PMD8/C2RX/RG0 PMPD8 TFT display, HDR1 pin 10 + 89 PMD9/C2TX/ETXERR/RG1 PMPD9 TFT display, HDR1 pin 9 + 88 PMD10/C1TX/ETXD0/RF1 PMPD10 TFT display, HDR1 pin 8 + 87 PMD11/C1RX/ETXD1/RF0 PMPD11 TFT display, HDR1 pin 7 + 86 VDD P32_VDD --- + 85 VCAP/VCORE (capacitor to ground) --- + 84 PMD15/CN16/ETXCLK/RD7 PMPD15 TFT display, HDR1 pin 3 + 83 PMD14/CN15/ETXEN/RD6 PMPD14 TFT display, HDR1 pin 4 + 82 CN14/PMRD/RD5 PMPRD + 81 CN13/OC5/PMWR/RD4 PMPWR + 80 PMD13/CN19/ETXD3/RD13 PMPD13 TFT display, HDR1 pin 5 + 79 PMD12/ETXD2/IC5/RD12 PMPD12 TFT display, HDR1 pin 6 + 78 OC4/RD3 RD3 HDR2 pin 5 + 77 OC3/RD2 LCD_BLED LCD backlight LED + 76 OC2/RD1 RD1 HDR2 pin 11 + +Toolchains +========== + + MPLAB/C32 + --------- + + I am using the free, "Lite" version of the PIC32MX toolchain available + for download from the microchip.com web site. I am using the Windows + version. The MicroChip toolchain is the only toolchain currently + supported in these configurations, but it should be a simple matter to + adapt to other toolchains by modifying the Make.defs file include in + each configuration. + + C32 Toolchain Options: + + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW - MicroChip full toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL - MicroChip full toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE - MicroChip "Lite" toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_LITE - MicroChip "Lite" toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_PINGUINOL - Pinquino toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_PINGUINOW - Pinquino toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPOPENL - Microchip open toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_GNU_ELF - General mips-elf toolchain for Linux + + NOTE: The "Lite" versions of the toolchain does not support C++. Also + certain optimization levels are not supported by the "Lite" toolchain. + + MicrochipOpen + ------------- + + An alternative, build-it-yourself toolchain is available here: + http://sourceforge.net/projects/microchipopen/ . These tools were + last updated circa 2010. NOTE: C++ support still not available + in this toolchain. + + Building MicrochipOpen (on Linux) + + 1) Get the build script from this location: + + http://microchipopen.svn.sourceforge.net/viewvc/microchipopen/ccompiler4pic32/buildscripts/trunk/ + + 2) Build the code using the build script, for example: + + ./build.sh -b v105_freeze + + This will check out the selected branch and build the tools. + + 3) Binaries will then be available in a subdirectory with a name something like + pic32-v105-freeze-20120622/install-image/bin (depending on the current data + and the branch that you selected. + + Note that the tools will have the prefix, mypic32- so, for example, the + compiler will be called mypic32-gcc. + + Pinguino mips-elf Toolchain + --------------------------- + + Another option is the mips-elf toolchain used with the Pinguino project. This + is a relatively current mips-elf GCC and should provide free C++ support as + well. This toolchain can be downloded from the Pinguino website: + http://wiki.pinguino.cc/index.php/Main_Page#Download . There is some general + information about using the Pinguino mips-elf toolchain in this thread: + https://groups.yahoo.com/neo/groups/nuttx/conversations/messages/1821 + + See also configs/mirtoo/README.txt. There is an experimental (untested) + configuration for the Mirtoo platform in that directory. + + MPLAB/C32 vs MPLABX/X32 + ----------------------- + + It appears that Microchip is phasing out the MPLAB/C32 toolchain and replacing + it with MPLABX and XC32. At present, the XC32 toolchain is *not* compatible + with the NuttX build scripts. Here are some of the issues that I see when trying + to build with XC32: + + 1) Make.def changes: You have to change the tool prefix: + + CROSSDEV=xc32- + + 2) debug.ld/release.ld: The like expect some things that are not present in + the current linker scripts (or are expected with different names). Here + are some partial fixes: + + Rename: kseg0_progmem to kseg0_program_mem + Rename: kseg1_datamem to kseg1_data_mem + + Even then, there are more warnings from the linker and some undefined symbols + for non-NuttX code that resides in the unused Microchip libraries. See this + email thread at https://groups.yahoo.com/neo/groups/nuttx/conversations/messages/1458 for more + information. You will have to solve at least this undefined symbol problem if + you want to used the XC32 toolchain. + + Windows Native Toolchains + ------------------------- + + NOTE: There are several limitations to using a Windows based toolchain in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + +Powering the Board +================== + + [To be provided] + +Creating Compatible NuttX HEX files +=================================== + + Intel Hex Format Files: + ----------------------- + + When NuttX is built it will produce two files in the top-level NuttX + directory: + + 1) nuttx - This is an ELF file, and + 2) nuttx.hex - This is an Intel Hex format file. This is controlled by + the setting CONFIG_INTELHEX_BINARY in the .config file. + + The PICkit tool wants an Intel Hex format file to burn into FLASH. However, + there is a problem with the generated nutt.hex: The tool expects the nuttx.hex + file to contain physical addresses. But the nuttx.hex file generated from the + top-level make will have address in the KSEG0 and KSEG1 regions. + + tools/pic32mx/mkpichex: + ---------------------- + + There is a simple tool in the NuttX tools/pic32mx directory that can be + used to solve both issues with the nuttx.hex file. But, first, you must + build the tool: + + cd tools/pic32mx + make + + Now you will have an excecutable file call mkpichex (or mkpichex.exe on + Cygwin). This program will take the nutt.hex file as an input, it will + convert all of the KSEG0 and KSEG1 addresses to physical address, and + it will write the modified file, replacing the original nuttx.hex. + + To use this file, you need to do the following things: + + . ./setenv.sh # Source setenv.sh. Among other this, this script + # will add the NuttX tools/pic32mx directory to your + # PATH variable + make # Build nuttx and nuttx.hex + mkpichex $PWD # Convert addresses in nuttx.hex. $PWD is the path + # to the top-level build directory. It is the only + # required input to mkpichex. + +Serial Console +============== + + UART1 is connected to the on-board RS-232 connector + +LEDs +==== + + The Mikroelektronika PIC32MX7 MMB has 3 user LEDs labeled LED0-2 in the + schematics: + + --- ----- --------------------------------------------------------- + PIN Board Notes + --- ----- --------------------------------------------------------- + RA0 LED0 Pulled-up, low value illuminates + RA1 LED1 Pulled-up, low value illuminates + RD9 LED2 Pulled-up, low value illuminates + RA9 LED4 Not available for general use*, indicates MMC/SD activity + --- LED5 Not controllable by software, indicates power-on + + * RA9 is also the SD chip select. It will illuminate whenever the SD card + is selected. If SD is not used, then LED4 could also be used as a user- + controlled LED. + + If CONFIG_ARCH_LEDS is defined, then NuttX will control these LEDs as follows: + + ON OFF + ------------------------- ---- ---- ---- ---- ---- ---- + LED0 LED1 LED2 LED0 LED1 LED2 + ------------------------- ---- ---- ---- ---- ---- ---- + LED_STARTED 0 OFF OFF OFF --- --- --- + LED_HEAPALLOCATE 1 ON OFF N/C --- --- --- + LED_IRQSENABLED 2 OFF ON N/C --- --- --- + LED_STACKCREATED 3 ON ON N/C --- --- --- + LED_INIRQ 4 N/C N/C ON N/C N/C OFF + LED_SIGNAL 4 N/C N/C ON N/C N/C OFF + LED_ASSERTION 4 N/C N/C ON N/C N/C OFF + LED_PANIC 5 ON N/C N/C OFF N/C N/C + +PIC32MX Configuration Options +============================= + + General Architecture Settings: + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=mips + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_MIPS=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_MIPS32=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=pic32mx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_PIC32MX795F512L=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=pic32mx7mmb + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_PIC32MX7MMB=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0xa0000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + PIC32MX Configuration + + CONFIG_PIC32MX_MVEC - Select muli- vs. single-vectored interrupts + + Individual subsystems can be enabled: + + CONFIG_PIC32MX_WDT - Watchdog timer + CONFIG_PIC32MX_T2 - Timer 2 (Timer 1 is the system time and always enabled) + CONFIG_PIC32MX_T3 - Timer 3 + CONFIG_PIC32MX_T4 - Timer 4 + CONFIG_PIC32MX_T5 - Timer 5 + CONFIG_PIC32MX_IC1 - Input Capture 1 + CONFIG_PIC32MX_IC2 - Input Capture 2 + CONFIG_PIC32MX_IC3 - Input Capture 3 + CONFIG_PIC32MX_IC4 - Input Capture 4 + CONFIG_PIC32MX_IC5 - Input Capture 5 + CONFIG_PIC32MX_OC1 - Output Compare 1 + CONFIG_PIC32MX_OC2 - Output Compare 2 + CONFIG_PIC32MX_OC3 - Output Compare 3 + CONFIG_PIC32MX_OC4 - Output Compare 4 + CONFIG_PIC32MX_OC5 - Output Compare 5 + CONFIG_PIC32MX_I2C1 - I2C 1 + CONFIG_PIC32MX_I2C2 - I2C 2 + CONFIG_PIC32MX_I2C3 - I2C 3 + CONFIG_PIC32MX_I2C4 - I2C 4 + CONFIG_PIC32MX_I2C5 - I2C 5 + CONFIG_PIC32MX_SPI1 - SPI 1 + CONFIG_PIC32MX_SPI2 - SPI 2 + CONFIG_PIC32MX_SPI3 - SPI 3 + CONFIG_PIC32MX_SPI4 - SPI 4 + CONFIG_PIC32MX_UART1 - UART 1 + CONFIG_PIC32MX_UART2 - UART 2 + CONFIG_PIC32MX_UART3 - UART 3 + CONFIG_PIC32MX_UART4 - UART 4 + CONFIG_PIC32MX_UART5 - UART 5 + CONFIG_PIC32MX_UART6 - UART 6 + CONFIG_PIC32MX_ADC - ADC 1 + CONFIG_PIC32MX_PMP - Parallel Master Port + CONFIG_PIC32MX_CM1 - Comparator 1 + CONFIG_PIC32MX_CM2 - Comparator 2 + CONFIG_PIC32MX_RTCC - Real-Time Clock and Calendar + CONFIG_PIC32MX_DMA - DMA + CONFIG_PIC32MX_FLASH - FLASH + CONFIG_PIC32MX_USBDEV - USB device + CONFIG_PIC32MX_USBHOST - USB host + CONFIG_PIC32MX_CAN1 - Controller area network 1 + CONFIG_PIC32MX_CAN2 - Controller area network 2 + CONFIG_PIC32MX_ETHERNET - Ethernet + + PIC32MX Configuration Settings + DEVCFG0: + CONFIG_PIC32MX_DEBUGGER - Background Debugger Enable. Default 3 (disabled). The + value 2 enables. + CONFIG_PIC32MX_ICESEL - In-Circuit Emulator/Debugger Communication Channel Select + Default 1 (PG2) + CONFIG_PIC32MX_PROGFLASHWP - Program FLASH write protect. Default 0xff (disabled) + CONFIG_PIC32MX_BOOTFLASHWP - Default 1 (disabled) + CONFIG_PIC32MX_CODEWP - Default 1 (disabled) + DEVCFG1: (All settings determined by selections in board.h) + DEVCFG2: (All settings determined by selections in board.h) + DEVCFG3: + CONFIG_PIC32MX_USBIDO - USB USBID Selection. Default 1 if USB enabled + (USBID pin is controlled by the USB module), but 0 (GPIO) otherwise. + CONFIG_PIC32MX_VBUSIO - USB VBUSON Selection (Default 1 if USB enabled + (VBUSON pin is controlled by the USB module, but 0 (GPIO) otherwise. + CONFIG_PIC32MX_WDENABLE - Enabled watchdog on power up. Default 0 (watchdog + can be enabled later by software). + + The priority of interrupts may be specified. The value ranage of + priority is 4-31. The default (16) will be used if these any of these + are undefined. + + CONFIG_PIC32MX_CTPRIO - Core Timer Interrupt + CONFIG_PIC32MX_CS0PRIO - Core Software Interrupt 0 + CONFIG_PIC32MX_CS1PRIO - Core Software Interrupt 1 + CONFIG_PIC32MX_INT0PRIO - External Interrupt 0 + CONFIG_PIC32MX_INT1PRIO - External Interrupt 1 + CONFIG_PIC32MX_INT2PRIO - External Interrupt 2 + CONFIG_PIC32MX_INT3PRIO - External Interrupt 3 + CONFIG_PIC32MX_INT4PRIO - External Interrupt 4 + CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor + CONFIG_PIC32MX_T1PRIO - Timer 1 (System timer) priority + CONFIG_PIC32MX_T2PRIO - Timer 2 priority + CONFIG_PIC32MX_T3PRIO - Timer 3 priority + CONFIG_PIC32MX_T4PRIO - Timer 4 priority + CONFIG_PIC32MX_T5PRIO - Timer 5 priority + CONFIG_PIC32MX_IC1PRIO - Input Capture 1 + CONFIG_PIC32MX_IC2PRIO - Input Capture 2 + CONFIG_PIC32MX_IC3PRIO - Input Capture 3 + CONFIG_PIC32MX_IC4PRIO - Input Capture 4 + CONFIG_PIC32MX_IC5PRIO - Input Capture 5 + CONFIG_PIC32MX_OC1PRIO - Output Compare 1 + CONFIG_PIC32MX_OC2PRIO - Output Compare 2 + CONFIG_PIC32MX_OC3PRIO - Output Compare 3 + CONFIG_PIC32MX_OC4PRIO - Output Compare 4 + CONFIG_PIC32MX_OC5PRIO - Output Compare 5 + CONFIG_PIC32MX_I2C1PRIO - I2C 1 + CONFIG_PIC32MX_I2C2PRIO - I2C 2 + CONFIG_PIC32MX_I2C3PRIO - I2C 3 + CONFIG_PIC32MX_I2C4PRIO - I2C 4 + CONFIG_PIC32MX_I2C5PRIO - I2C 5 + CONFIG_PIC32MX_SPI2PRIO - SPI 2 + CONFIG_PIC32MX_UART1PRIO - UART 1 + CONFIG_PIC32MX_UART2PRIO - UART 2 + CONFIG_PIC32MX_CN - Input Change Interrupt + CONFIG_PIC32MX_ADCPRIO - ADC1 Convert Done + CONFIG_PIC32MX_PMPPRIO - Parallel Master Port + CONFIG_PIC32MX_CM1PRIO - Comparator 1 + CONFIG_PIC32MX_CM2PRIO - Comparator 2 + CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor + CONFIG_PIC32MX_RTCCPRIO - Real-Time Clock and Calendar + CONFIG_PIC32MX_DMA0PRIO - DMA Channel 0 + CONFIG_PIC32MX_DMA1PRIO - DMA Channel 1 + CONFIG_PIC32MX_DMA2PRIO - DMA Channel 2 + CONFIG_PIC32MX_DMA3PRIO - DMA Channel 3 + CONFIG_PIC32MX_DMA4PRIO - DMA Channel 4 + CONFIG_PIC32MX_DMA5PRIO - DMA Channel 5 + CONFIG_PIC32MX_DMA6PRIO - DMA Channel 6 + CONFIG_PIC32MX_DMA7PRIO - DMA Channel 7 + CONFIG_PIC32MX_FCEPRIO - Flash Control Event + CONFIG_PIC32MX_USBPRIO - USB + + PIC32MXx specific device driver settings. NOTE: For the Ethernet + starter kit, there is no RS-232 connector (even with the MEB). See + discussion above ("") for information about how you can configure + an external MAX2232 board to get a serial console. + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + +PIC32MX specific PHY/Ethernet device driver settings + + CONFIG_ETH0_PHY_KS8721 - Selects the Micrel KS8721 PHY + CONFIG_ETH0_PHY_DP83848C - Selects the National Semiconduction DP83848C PHY + CONFIG_ETH0_PHY_LAN8720 - Selects the SMSC LAN8720 PHY + CONFIG_PHY_AUTONEG - Enable auto-negotion + CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. + CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex + CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 2 + CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 4 + CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented). + CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets. + Also needs CONFIG_DEBUG. + CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs + CONFIG_DEBUG. + CONFIG_NET_HASH - Enable receipt of near-perfect match frames. + CONFIG_PIC32MX_MULTICAST - Enable receipt of multicast (and unicast) frames. + Automatically set if CONFIG_NET_IGMP is selected. + + Related DEVCFG3 Configuration Settings: + CONFIG_PIC32MX_FETHIO: Ethernet I/O Pin Selection bit: + 1 = Default Ethernet I/O Pins + 0 = Alternate Ethernet I/O Pins + CONFIG_PIC32MX_FMIIEN: Ethernet MII Enable bit + 1 = MII enabled + 0 = RMII enabled + + PIC32MXx USB Device Configuration + + PIC32MXx USB Host Configuration (the PIC32MX does not support USB Host) + +Configurations +============== + +Each PIC32MX configuration is maintained in a sub-directory and can be +selected as follow: + + cd tools + ./configure.sh pic32mx7mmb/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + + This is the NuttShell (NSH) using the NSH startup logic at + apps/examples/nsh. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Serial Output + + The OS test produces all of its test output on the serial console. + This configuration has UART1 enabled as a serial console. + + 3. SD Card Support + + SD card support is built into this example by default: + + CONFIG_PIC32MX_SPI1=y + CONFIG_NSH_ARCHINIT=y + + The SD card can be mounted from the NSH command line as follows: + + nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard + nsh> ls -l /mnt/sdcard + /mnt/sdcard: + -rw-rw-rw- 16 ATEST.TXT + -rw-rw-rw- 21170 TODO + -rw-rw-rw- 22 ANOTHER.TXT + -rw-rw-rw- 22 HI2148.TXT + -rw-rw-rw- 16 HiFromNotePad.txt + + 4. USB Configurations + + USB device support is enabled by default in this configuration. + The following settings are defined by default (and can be set + to 'n' to disabled USB device support). + + CONFIG_USBDEV=y : Enable basic USB device support + CONFIG_PIC32MX_USBDEV=y : Enable PIC32 USB device support + CONFIG_USBMSC=y : USB supports a mass storage device. + + In this configuration, NSH will support the following commands: + + msconn : Connect the mass storage device, exportint the SD + card as the USB mass storage logical unit. + msdis : Disconnect the USB mass storage device + + NOTE: The SD card should *not* be mounted under NSH *and* exported + by the mass storage device!!! That can result in corruption of the + SD card format. This is the sequence of commands that you should + use to work with the SD card safely: + + mount -t vfat /dev/mmcsd0 /mnt/sdcard : Mount the SD card initially + ... + umount /mnt/sdcard : Unmount the SD card before connecting + msconn : Connect the USB MSC + ... + msdis : Disconnect the USB MSC + mount -t vfat /dev/mmcsd0 /mnt/sdcard : Re-mount the SD card + ... + + Other USB other device configurations can be enabled and + included as NSH built-in built in functions. + + examples/usbterm - This option can be enabled by adding the + following to the NuttX configuration file: + + CONFIG_EXAMPLES_USBTERM=y + + And by enabling one of the USB serial devices: + + CONFIG_USBMSC=n : Disable USB mass storage device. + CONFIG_PL2303=y : Enable the Prolifics PL2303 emulation + CONFIG_CDCACM=y : or the CDC/ACM serial driver (not both) + + system/cdcacm - The system/cdcacm program can be included as an + function by adding the following to the NuttX configuration file: + + CONFIG_SYSTEM_CDCACM=y + + and defining the following in your .config file: + + CONFIG_USBMSC=n : Disable USB mass storage device. + CONFIG_CDCACM=y : Enable the CDCACM device + + 5. Networking Configurations + + Networking is enabled by default in this configuration: + + CONFIG_NET=y : Enable networking support + CONFIG_PIC32MX_ETHERNET=y : Enable the PIC32 Ethernet driver + CONFIG_NSH_TELNET=y : Enable the Telnet NSH console (optional) + + The default configuration has: + + CONFIG_NSH_DHCPC=n : DHCP is disabled + CONFIG_NSH_IPADDR=(10<<24|0<<16|0<<8|2) : Target IP address 10.0.0.2 + CONFIG_NSH_DRIPADDR=(10<<24|0<<16|0<<8|1) : Host IP address 10.0.0.1 + + This will probably need to be customized for your network. + + NOTES: + + a. This logic will assume that a network is connected. During its + initialization, it will try to negotiate the link speed. If you have + no network connected when you reset the board, there will be a long + delay (maybe 30 seconds?) before anything happens. That is the timeout + before the networking finally gives up and decides that no network is + available. + + b. This example can support an FTP client. In order to build in FTP client + support simply add the following to the NuttX configuration file: + + CONFIG_NETUTILS_FTPC=y + CONFIG_EXAMPLES_FTPC=y + + 3. This example can support an FTP server. In order to build in FTP server + support simply add the following to the NuttX configuration file: + + CONFIG_NETUTILS_FTPD=y + CONFIG_SYSTEM_FTPD=y + + And enable poll() support in the NuttX configuration file: + + CONFIG_DISABLE_POLL=n + + 6. Using a RAM disk and the USB MSC device to the nsh configuration + + Here is an experimental change to examples/nsh that will create a RAM + disk and attempt to export that RAM disk as a USB mass storage device. + + 1. Changes to nuttx/.config + + a) Enable support for the PIC32 USB device + + -CONFIG_PIC32MX_USBDEV=n + +CONFIG_PIC32MX_USBDEV=y + + b) Enable NuttX USB device support + + -CONFIG_USBDEV=n + +CONFIG_USBDEV=y + + c) Enable the USB MSC class driver + + -CONFIG_USBMSC=n + +CONFIG_USBMSC=y + + d) Use a RAM disk (instead of an SD card) as the USB MSC logical unit: + + -CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mmcsd0" + +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/ram0" + + 2. Changes to nuttx/.config. + + a) Enable building of the system/usbmsc: + + CONFIG_SYSTEM_USBMSC=y + + 3. When NSH first comes up, you must manually create the RAM disk + before exporting it: + + a) Create a 64Kb RAM disk at /dev/ram0: + + nsh> mkrd -s 512 128 + + b) Put a FAT file system on the RAM disk: + + nsh> mkfatfs /dev/ram0 + + b) Now the 'msconn' command will connect to the host and + export /dev/ram0 as the USB logical unit: + + nsh> msconn + + NOTE: This modification should be considered experimental. IN the + little testing I have done with it, it appears functional. But the + logic has not been stressed and there could still be lurking issues. + (There is a bug associated with this configuration listed in the + top-level TODO list). + + 7. Adding LCD and graphics support to the nsh configuration + + LCD support is already enabled in defconfig (nuttx/.config): + + CONFIG_NX=y : Enable graphics suppport + CONFIG_PIC32MX_PMP=y : Enable parallel port support + CONFIG_LCD_MIO283QT2=y : MIO283QT2 LCD support + + But you will have to enable a specific graphics example application + in the NuttX configuration file in order to see anything. + + 8. Enabling touch screen support in the nsh configuaration + + In defconfig (or nuttx/.config), set: + + CONFIG_INPUT=y : Enable input device support + CONFIG_SCHED_WORKQUEUE=y : Work queue support needed + CONFIG_EXAMPLES_TOUCHSCREEN=y : Touchscreen example code diff --git a/configs/pic32mx7mmb/include/board.h b/configs/pic32mx7mmb/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..ff6b417b1de23a97876e2857ab112f23bea873f5 --- /dev/null +++ b/configs/pic32mx7mmb/include/board.h @@ -0,0 +1,212 @@ +/**************************************************************************** + * configs/pic32mx7mmb/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MIKROELEKTRONIKA_PIC32MX7MMB_INCLUDE_BOARD_H +#define __CONFIGS_MIKROELEKTRONIKA_PIC32MX7MMB_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Clocking *****************************************************************/ +/* Crystal frequencies */ + +#define BOARD_POSC_FREQ 8000000 /* Primary OSC XTAL frequency (8MHz) */ +#define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */ + +/* Oscillator modes */ + +#define BOARD_FNOSC_POSCPLL 1 /* Use primary oscillator w/PLL */ +#define BOARD_POSC_XTMODE 1 /* Resonator, crystal or resonator (XT) mode */ +#undef BOARD_POSC_SWITCH /* Use FRC until POSC stabilizes, then switch */ +#undef BOARD_POSC_FSCM /* Switch to FRC if POSC fails */ +#define BOARD_SOSC_ENABLE 1 /* Enable Secondary Oscillator */ +#define BOARD_SOSC_IESO 1 /* Internal External Switchover mode is enabled */ + +/* PLL configuration and resulting CPU clock. + * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV + */ + +#define BOARD_PLL_INPUT BOARD_POSC_FREQ +#define BOARD_PLL_IDIV 2 /* PLL input divider */ +#define BOARD_PLL_MULT 20 /* PLL multiplier */ +#define BOARD_PLL_ODIV 1 /* PLL output divider */ + +#define BOARD_CPU_CLOCK 80000000 /* CPU clock (80MHz = 8MHz * 20 / 2) */ + +/* USB PLL configuration. + * USB_CLOCK = ((POSC_XTAL / IDIV) * 24) / 2 + */ + +#define BOARD_UPLL_IDIV 2 /* USB PLL divider (revisit) */ +#define BOARD_USB_CLOCK 48000000 /* USB clock (8MHz / 2) * 24 / 2) */ + +/* Peripheral clock is divided down from CPU clock. + * PBCLOCK = CPU_CLOCK / PBDIV + */ + +#define BOARD_PBDIV 2 /* Peripheral clock divisor (PBDIV) */ +#define BOARD_PBCLOCK 40000000 /* Peripheral clock (PBCLK = 80MHz/2) */ + +/* Watchdog pre-scaler (re-visit) */ + +#define BOARD_WD_ENABLE 0 /* Watchdog is disabled */ +#define BOARD_WD_PRESCALER 8 /* Watchdog pre-scaler */ + +/* Ethernet MII clocking. + * + * The clock divider used to create the MII Management Clock (MDC). The MIIM + * module uses the SYSCLK as an input clock. According to the IEEE 802.3 + * Specification this should be no faster than 2.5 MHz. However, some PHYs + * support clock rates up to 12.5 MHz. + */ + +#define BOARD_EMAC_MIIM_DIV 32 /* Ideal: 80MHz/32 = 2.5MHz */ + +/* LED definitions **********************************************************/ +/* LED Configuration ********************************************************/ +/* The Mikroelektronika PIC32MX7 MMB has 3 user LEDs labeled LED0-2 in the + * schematics: + * + * --- ----- -------------------------------------------------------------- + * PIN Board Notes + * --- ----- -------------------------------------------------------------- + * RA0 LED0 Pulled-up, low value illuminates + * RA1 LED1 Pulled-up, low value illuminates + * RD9 LED2 Pulled-up, low value illuminates + * RA9 LED4 Not available for general use*, indicates MMC/SD activity + * --- LED5 Not controllable by software, indicates power-on + * + * * RA9 is also the SD chip select. It will illuminate whenever the SD card + * is selected. If SD is not used, then LED4 could also be used as a user- + * controlled LED. + */ + +/* LED index values for use with board_userled() */ + +#define PIC32MX_PIC32MX7MMB_LED0 0 +#define PIC32MX_PIC32MX7MMB_LED1 1 +#define PIC32MX_PIC32MX7MMB_LED2 2 +#define PIC32MX_PIC32MX7MMB_NLEDS 3 + +/* LED bits for use with board_userled_all() */ + +#define PIC32MX_PIC32MX7MMB_LED0_BIT (1 << PIC32MX_PIC32MX7MMB_LED0) +#define PIC32MX_PIC32MX7MMB_LED1_BIT (1 << PIC32MX_PIC32MX7MMB_LED1) +#define PIC32MX_PIC32MX7MMB_LED2_BIT (1 << PIC32MX_PIC32MX7MMB_LED2) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 3 LEDs + * on board the Mikroelektronika PIC32MX7 MMB. The following definitions + * describe how NuttX controls the LEDs: + * + * ON OFF + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED0 LED1 LED2 LED0 LED1 LED2 + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED_STARTED 0 OFF OFF OFF --- --- --- + * LED_HEAPALLOCATE 1 ON OFF N/C --- --- --- + * LED_IRQSENABLED 2 OFF ON N/C --- --- --- + * LED_STACKCREATED 3 ON ON N/C --- --- --- + * LED_INIRQ 4 N/C N/C ON N/C N/C OFF + * LED_SIGNAL 4 N/C N/C ON N/C N/C OFF + * LED_ASSERTION 4 N/C N/C ON N/C N/C OFF + * LED_PANIC 5 ON N/C N/C OFF N/C N/C + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 4 +#define LED_ASSERTION 4 +#define LED_PANIC 5 + +#define LED_NVALUES 6 + +/* Switch definitions *******************************************************/ +/* The Mikroelektronika PIC32MX7 MMB has a joystick: + * + * ------ -------- -------------------------- + * GPIO SIGNAL BOARD CONNECTION + * ------ -------- -------------------------- + * RB0 JOY-A Joystick A, HDR1 pin 24 + * RB2 JOY-C Joystick C, HDR1 pin 22 + * RB1 JOY-B Joystick B, HDR1 pin 23 + * RB3 JOY-D Joystick D, HDR1 pin 21 + * RA10 JOY-CP Joystick CP, HDR1 pin 25 + */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MIKROELEKTRONIKA_PIC32MX7MMB_INCLUDE_BOARD_H */ diff --git a/configs/pic32mx7mmb/nsh/Make.defs b/configs/pic32mx7mmb/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..ec3f79738fc3b188f3080a2e9bdbb3b349a471b4 --- /dev/null +++ b/configs/pic32mx7mmb/nsh/Make.defs @@ -0,0 +1,100 @@ +############################################################################ +# configs/pic32mx7mmb/nsh/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/mips/src/mips32/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/pic32mx7mmb/nsh/defconfig b/configs/pic32mx7mmb/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..64bd042c81af785c38d34ba051bdc6ac0af81771 --- /dev/null +++ b/configs/pic32mx7mmb/nsh/defconfig @@ -0,0 +1,1206 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +CONFIG_ARCH_MIPS=y +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="mips" +CONFIG_ARCH_FAMILY="mips32" +CONFIG_ARCH_CHIP="pic32mx" +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_PHY_AUTONEG=y +CONFIG_NET_NTXDESC=7 +CONFIG_NET_NRXDESC=7 +CONFIG_NET_PRIORITY=28 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_PIC32MX_MULTICAST is not set +CONFIG_ARCH_CHIP_PIC32MX=y +# CONFIG_ARCH_CHIP_PIC32MZ is not set +CONFIG_ARCH_MIPS32=y +CONFIG_ARCH_MIPS_24KC=y +# CONFIG_ARCH_MIPS_M14K is not set +# CONFIG_ARCH_HAVE_MICROMIPS is not set + +# +# MIPS32 Configuration Options +# +# CONFIG_MIPS32_TOOLCHAIN_GNU_ELF is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_XC32 is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW is not set +CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE=y +# CONFIG_MIPS32_TOOLCHAIN_PINGUINOW is not set +# CONFIG_MIPS32_FRAMEPOINTER is not set + +# +# PIC32MX Configuration Options +# +# CONFIG_ARCH_CHIP_PIC32MX110F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX320F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX420F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX440F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX460F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX460F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512H is not set +CONFIG_ARCH_CHIP_PIC32MX795F512L=y +# CONFIG_ARCH_CHIP_PIC32MX1 is not set +# CONFIG_ARCH_CHIP_PIC32MX2 is not set +# CONFIG_ARCH_CHIP_PIC32MX3 is not set +# CONFIG_ARCH_CHIP_PIC32MX4 is not set +# CONFIG_ARCH_CHIP_PIC32MX5 is not set +# CONFIG_ARCH_CHIP_PIC32MX6 is not set +CONFIG_ARCH_CHIP_PIC32MX7=y +# CONFIG_PIC32MX_MVEC is not set +CONFIG_PIC32MX_SPI=y +CONFIG_PIC32MX_T1=y + +# +# PIC32MX Peripheral Support +# +# CONFIG_PIC32MX_WDT is not set +# CONFIG_PIC32MX_T2 is not set +# CONFIG_PIC32MX_T3 is not set +# CONFIG_PIC32MX_T4 is not set +# CONFIG_PIC32MX_T5 is not set +# CONFIG_PIC32MX_IC1 is not set +# CONFIG_PIC32MX_IC2 is not set +# CONFIG_PIC32MX_IC3 is not set +# CONFIG_PIC32MX_IC4 is not set +# CONFIG_PIC32MX_IC5 is not set +# CONFIG_PIC32MX_OC1 is not set +# CONFIG_PIC32MX_OC2 is not set +# CONFIG_PIC32MX_OC3 is not set +# CONFIG_PIC32MX_OC4 is not set +# CONFIG_PIC32MX_OC5 is not set +# CONFIG_PIC32MX_I2C1 is not set +# CONFIG_PIC32MX_I2C2 is not set +# CONFIG_PIC32MX_I2C3 is not set +# CONFIG_PIC32MX_I2C4 is not set +# CONFIG_PIC32MX_I2C5 is not set +CONFIG_PIC32MX_SPI1=y +# CONFIG_PIC32MX_SPI2 is not set +# CONFIG_PIC32MX_SPI3 is not set +# CONFIG_PIC32MX_SPI4 is not set +CONFIG_PIC32MX_UART1=y +# CONFIG_PIC32MX_UART2 is not set +# CONFIG_PIC32MX_UART3 is not set +# CONFIG_PIC32MX_UART4 is not set +# CONFIG_PIC32MX_UART5 is not set +# CONFIG_PIC32MX_UART6 is not set +# CONFIG_PIC32MX_ADC is not set +CONFIG_PIC32MX_PMP=y +# CONFIG_PIC32MX_CM1 is not set +# CONFIG_PIC32MX_CM2 is not set +# CONFIG_PIC32MX_CM3 is not set +# CONFIG_PIC32MX_RTCC is not set +# CONFIG_PIC32MX_DMA is not set +# CONFIG_PIC32MX_FLASH is not set +CONFIG_PIC32MX_USBDEV=y +# CONFIG_PIC32MX_USBHOST is not set +# CONFIG_PIC32MX_CAN1 is not set +# CONFIG_PIC32MX_CAN2 is not set +CONFIG_PIC32MX_ETHERNET=y +# CONFIG_PIC32MX_CTMU is not set + +# +# PIC32MX Peripheral Interrupt Priorities +# +CONFIG_PIC32MX_CTPRIO=16 +CONFIG_PIC32MX_CS0PRIO=16 +CONFIG_PIC32MX_CS1PRIO=16 +CONFIG_PIC32MX_INT0PRIO=16 +CONFIG_PIC32MX_INT1PRIO=16 +CONFIG_PIC32MX_INT2PRIO=16 +CONFIG_PIC32MX_INT3PRIO=16 +CONFIG_PIC32MX_INT4PRIO=16 +CONFIG_PIC32MX_T1PRIO=16 +CONFIG_PIC32MX_SPI1PRIO=16 +CONFIG_PIC32MX_UART1PRIO=16 +CONFIG_PIC32MX_PMPPRIO=16 +CONFIG_PIC32MX_USBPRIO=16 + +# +# SPI Driver Configuration +# + +# +# PIC32MX PHY/Ethernet device driver settings +# + +# +# Device Configuration 0 (DEVCFG0) +# +CONFIG_PIC32MX_DEBUGGER=2 +CONFIG_PIC32MX_ICESEL=1 +CONFIG_PIC32MX_PROGFLASHWP=0xff +CONFIG_PIC32MX_BOOTFLASHWP=1 +CONFIG_PIC32MX_CODEWP=1 + +# +# Device Configuration 1 (DEVCFG1) +# + +# +# Device Configuration 3 (DEVCFG3) +# +CONFIG_PIC32MX_USBIDO=0 +CONFIG_PIC32MX_VBUSIO=0 +# CONFIG_PIC32MX_WDENABLE is not set +CONFIG_PIC32MX_FETHIO=0 +CONFIG_PIC32MX_FMIIEN=0 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +CONFIG_ARCH_VECNOTIRQ=y +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=7245 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0xa0000000 +CONFIG_RAM_SIZE=131072 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_PIC32MX_STARTERKIT is not set +CONFIG_ARCH_BOARD_PIC32MX7MMB=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="pic32mx7mmb" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=1 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +CONFIG_ETH0_PHY_LAN8720=y +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_UART1_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +CONFIG_USBMSC=y +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=1 +CONFIG_USBMSC_EPBULKIN=2 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=8 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=64 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" +CONFIG_USBMSC_VERSIONNO=0x0399 +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=2048 +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +CONFIG_SYSTEM_USBMSC=y +CONFIG_SYSTEM_USBMSC_NLUNS=1 +CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mmcsd0" +CONFIG_SYSTEM_USBMSC_DEVMINOR2=1 +CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_USBMSC_DEVMINOR3=2 +CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" +# CONFIG_SYSTEM_USBMSC_DEBUGMM is not set +CONFIG_SYSTEM_USBMSC_CMD_STACKSIZE=768 +CONFIG_SYSTEM_USBMSC_CMD_PRIORITY=100 +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/pic32mx7mmb/nsh/ld.script b/configs/pic32mx7mmb/nsh/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..f6ec304c3e1a13e6e827f890591b6d0a4b370521 --- /dev/null +++ b/configs/pic32mx7mmb/nsh/ld.script @@ -0,0 +1,317 @@ +/**************************************************************************** + * configs/pic32mx7mmb/nsh/ld.script + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MX795F512L has 512Kb of program FLASH at physical address + * 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 512K + + /* The PIC32MX795F512L has 12Kb of boot FLASH at physical address + * 0x1fc00000. The initial reset vector is in KSEG1, but all other + * accesses are in KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 8192-1168 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16 + + /* The PIC32MX795F512L has 128Kb of data memory at physical address + * 0x00000000. Since the PIC32MX has no data cache, this memory is + * always accessed through KSEG1. + * + * When used with MPLAB, we need to set aside 512 bytes of memory + * for use by MPLAB. + */ + + kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 128K - 512 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(pic32mx) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/pic32mx7mmb/nsh/setenv.sh b/configs/pic32mx7mmb/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..82518d74046fc41391bbd467276edd87c68a40ae --- /dev/null +++ b/configs/pic32mx7mmb/nsh/setenv.sh @@ -0,0 +1,61 @@ +#!/bin/bash +# configs/pic32mx7mmb/nsh/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +# This is the Cygwin path to the location where I installed the MicroChip +# PIC32MX toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install a different version of if you install +# the Linux PIC32MX toolchain as well +export TOOLCHAIN_BIN="/cygdrive/c/MicroChip/mplabc32/v1.12/bin" + +# This is the path to the tools subdirectory +export PIC32TOOL_DIR="${WD}/tools/pic32mx" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:${PIC32TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/pic32mx7mmb/src/.gitignore b/configs/pic32mx7mmb/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/pic32mx7mmb/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/pic32mx7mmb/src/Makefile b/configs/pic32mx7mmb/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..79643f11c7d69701b435ef0f2bb429fd4aa09a63 --- /dev/null +++ b/configs/pic32mx7mmb/src/Makefile @@ -0,0 +1,60 @@ +############################################################################ +# configs/pic32mx7mmb/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = pic32_boot.c pic32_leds.c pic32_spi.c pic32_mio283qt2.c + +ifeq ($(CONFIG_PIC32MX_USBDEV),y) +CSRCS += pic32_usbdev.c +ifeq ($(CONFIG_EXAMPLES_USBTERM_DEVINIT),y) +CSRCS += pic32_usbterm.c +endif +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += pic32_appinit.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += pic32_usbmsc.c +endif + +ifeq ($(CONFIG_INPUT),y) +CSRCS += pic32_touchscreen.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/pic32mx7mmb/src/pic32_appinit.c b/configs/pic32mx7mmb/src/pic32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..0970e277817c6c5e22775d5cfa79c6911143ee8f --- /dev/null +++ b/configs/pic32mx7mmb/src/pic32_appinit.c @@ -0,0 +1,390 @@ +/**************************************************************************** + * config/pic32mx7mmb/src/pic32_appinit.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "pic32mx.h" +#include "pic32mx7mmb.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* Assume that we have MMC/SD, USB host (and USB device) */ + +#define NSH_HAVEMMCSD 1 +#define NSH_HAVEUSBHOST 1 + +/* The Mikroelektronika PIC32MX7 MMB has one SD slot on board, connected to SPI 1. */ + +#ifndef CONFIG_PIC32MX_MMCSDSPIPORTNO +# define CONFIG_PIC32MX_MMCSDSPIPORTNO 1 +#endif + +/* Make sure that the configuration will support the SD card */ + +#ifdef NSH_HAVEMMCSD + + /* Make sure that the NSH configuration uses the correct SPI */ + +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) +# define CONFIG_NSH_MMCSDSPIPORTNO CONFIG_PIC32MX_MMCSDSPIPORTNO +# elif CONFIG_NSH_MMCSDSPIPORTNO != CONFIG_PIC32MX_MMCSDSPIPORTNO +# warning "CONFIG_PIC32MX_MMCSDSPIPORTNO does not match CONFIG_NSH_MMCSDSPIPORTNO" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO CONFIG_PIC32MX_MMCSDSPIPORTNO +# endif + + /* Make sure that the NSH configuration uses slot 0 (there is only one + * SD slot on the Mikroelektronica PIC32MX7 MMB). + */ + +# if !defined(CONFIG_NSH_MMCSDSLOTNO) +# define CONFIG_NSH_MMCSDSLOTNO 0 +# elif CONFIG_NSH_MMCSDSLOTNO != 0 +# warning "The Mikroelektronika PIC32MX7 MMB has only one slot (0)" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif + + /* Make sure that the correct SPI is enabled in the configuration */ + +# if CONFIG_PIC32MX_MMCSDSPIPORTNO == 1 && !defined(CONFIG_PIC32MX_SPI1) +# warning "CONFIG_PIC32MX_SPI1 is not enabled" +# undef NSH_HAVEMMCSD +# elif CONFIG_PIC32MX_MMCSDSPIPORTNO == 2 && !defined(CONFIG_PIC32MX_SPI2) +# warning "CONFIG_PIC32MX_SPI2 is not enabled" +# undef NSH_HAVEMMCSD +# elif CONFIG_PIC32MX_MMCSDSPIPORTNO == 3 && !defined(CONFIG_PIC32MX_SPI3) +# warning "CONFIG_PIC32MX_SPI3 is not enabled" +# undef NSH_HAVEMMCSD +# elif CONFIG_PIC32MX_MMCSDSPIPORTNO == 4 && !defined(CONFIG_PIC32MX_SPI4) +# warning "CONFIG_PIC32MX_SPI4 is not enabled" +# undef NSH_HAVEMMCSD +# endif +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef NSH_HAVEMMCSD +#endif + +/* Select /dev/mmcsd0 if no other minor number is provided */ + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/* USB Host */ + +#ifdef CONFIG_USBHOST +# ifndef CONFIG_PIC32MX_USBHOST +# error "CONFIG_PIC32MX_USBHOST is not selected" +# undef NSH_HAVEUSBHOST +# endif +#endif + +#ifdef CONFIG_PIC32MX_USBHOST +# ifndef CONFIG_USBHOST +# warning "CONFIG_USBHOST is not selected" +# undef NSH_HAVEUSBHOST +# endif +#endif + +#if !defined(CONFIG_USBHOST) || !defined(CONFIG_PIC32MX_USBHOST) +# undef NSH_HAVEUSBHOST +#endif + +#ifdef NSH_HAVEUSBHOST +# ifndef CONFIG_USBHOST_DEFPRIO +# define CONFIG_USBHOST_DEFPRIO 50 +# endif +# ifndef CONFIG_USBHOST_STACKSIZE +# ifdef CONFIG_USBHOST_HUB +# define CONFIG_USBHOST_STACKSIZE 1536 +# else +# define CONFIG_USBHOST_STACKSIZE 1024 +# endif +# endif +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef NSH_HAVEUSBHOST +static struct usbhost_connection_s *g_usbconn; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nsh_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ****************************************************************************/ + +#ifdef NSH_HAVEUSBHOST +static int nsh_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + syslog(LOG_INFO, "nsh_waiter: Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + syslog(LOG_INFO, "nsh_waiter: %s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/**************************************************************************** + * Name: nsh_sdinitialize + * + * Description: + * Initialize SPI-based microSD. + * + ****************************************************************************/ + +#ifdef NSH_HAVEMMCSD +static int nsh_sdinitialize(void) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + spi = pic32mx_spibus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + ret = -ENODEV; + goto errout; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + /* The SPI should be in 8-bit (default) and mode2: CKP=1, CKE=0. + * The MMC/SD driver will control the SPI frequency. WARNING: + * this is not the right way to do this... this should be done + * the MMC/SD driver: Other device on SPI1 may need other mode + * settings. + */ + + SPI_SETMODE(spi, SPIDEV_MODE2); + + /* Bind the SPI port to the slot */ + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, + CONFIG_NSH_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, + CONFIG_NSH_MMCSDSLOTNO, ret); + goto errout; + } + + syslog(LOG_INFO, + "Successfully bound SPI port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, + CONFIG_NSH_MMCSDSLOTNO); + + return OK; + +errout: + return ret; +} +#else +# define nsh_sdinitialize() (OK) +#endif + +/**************************************************************************** + * Name: nsh_usbhostinitialize + * + * Description: + * Initialize SPI-based microSD. + * + ****************************************************************************/ + +#ifdef NSH_HAVEUSBHOST +static int nsh_usbhostinitialize(void) +{ + int pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + syslog(LOG_INFO, "Register class drivers\n"); + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB host Mass Storage Class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + + /* Then get an instance of the USB host interface */ + + syslog(LOG_INFO, "Initialize USB host\n"); + g_usbconn = pic32_usbhost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + syslog(LOG_INFO, "Start nsh_waiter\n"); + + pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO, + CONFIG_USBHOST_STACKSIZE, + (main_t)nsh_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + return -ENODEV; +} +#else +# define nsh_usbhostinitialize() (OK) +#endif + +/**************************************************************************** + * Name: nsh_usbdevinitialize + * + * Description: + * Initialize SPI-based microSD. + * + ****************************************************************************/ + +#ifdef CONFIG_USBDEV +static int nsh_usbdevinitialize(void) +{ + /* The Mikroelektronika PIC32MX7 MMB has no way to know when the USB is + * connected. So we will fake it and tell the USB driver that the USB is + * connected now. + */ + + pic32mx_usbattach(); + return OK; +} +#else +# define nsh_usbdevinitialize() (OK) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + int ret; + + /* Initialize SPI-based microSD */ + + ret = nsh_sdinitialize(); + if (ret == OK) + { + /* Initialize USB host */ + + ret = nsh_usbhostinitialize(); + } + + if (ret == OK) + { + /* Initialize USB device */ + + ret = nsh_usbdevinitialize(); + } + + return ret; +} diff --git a/configs/pic32mx7mmb/src/pic32_boot.c b/configs/pic32mx7mmb/src/pic32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..cda70ea95a7c43549279d7774c2f68966352b730 --- /dev/null +++ b/configs/pic32mx7mmb/src/pic32_boot.c @@ -0,0 +1,100 @@ +/************************************************************************************ + * configs/pic32mx7mmb/src/pic32_boot.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "pic32mx.h" +#include "pic32mx7mmb.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_boardinitialize + * + * Description: + * All PIC32MX architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void pic32mx_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) at least one SPI is enabled, and 2) the weak + * function pic32mx_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_PIC32MX_SPI1) || defined(CONFIG_PIC32MX_SPI2) || \ + defined(CONFIG_PIC32MX_SPI3) || defined(CONFIG_PIC32MX_SPI4) + if (pic32mx_spidev_initialize) + { + pic32mx_spidev_initialize(); + } +#endif + +/* Initialize the LCD. The LCD initialization function should be called early in the + * boot sequence -- even if the LCD is not enabled. In that case we should + * at a minimum at least disable the LCD backlight. + */ + + pic32mx_lcdinitialize(); + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + pic32mx_led_initialize(); +#endif +} diff --git a/configs/pic32mx7mmb/src/pic32_leds.c b/configs/pic32mx7mmb/src/pic32_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..1b462996292f28fee50fc6c80ac9898775a4f7c1 --- /dev/null +++ b/configs/pic32mx7mmb/src/pic32_leds.c @@ -0,0 +1,292 @@ +/**************************************************************************** + * configs/pic32mx7mmb/src/pic32_leds.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "pic32mx.h" +#include "pic32mx7mmb.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED Configuration ********************************************************/ +/* The Mikroelektronika PIC32MX7 MMB has 3 user LEDs labelled LED0-2 in the + * schematics: + * + * --- ----- -------------------------------------------------------------- + * PIN Board Notes + * --- ----- -------------------------------------------------------------- + * RA0 LED0 Pulled-up, low value illuminates + * RA1 LED1 Pulled-up, low value illuminates + * RD9 LED2 Pulled-up, low value illuminates + * RA9 LED4 Not available for general use*, indicates MMC/SD activity + * --- LED5 Not controllable by software, indicates power-on + * + * * RA9 is also the SD chip select. It will illuminate whenever the SD card + * is selected. If SD is not used, then LED4 could also be used as a user- + * controlled LED. + * + * If CONFIG_ARCH_LEDS is defined, then NuttX will control these LEDs as + * follows: + * ON OFF + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED0 LED1 LED2 LED0 LED1 LED2 + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED_STARTED 0 OFF OFF OFF --- --- --- + * LED_HEAPALLOCATE 1 ON OFF N/C --- --- --- + * LED_IRQSENABLED 2 OFF ON N/C --- --- --- + * LED_STACKCREATED 3 ON ON N/C --- --- --- + * LED_INIRQ 4 N/C N/C ON N/C N/C OFF + * LED_SIGNAL 4 N/C N/C ON N/C N/C OFF + * LED_ASSERTION 4 N/C N/C ON N/C N/C OFF + * LED_PANIC 5 ON N/C N/C OFF N/C N/C + */ + +#define GPIO_LED_0 (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTA|GPIO_PIN0) +#define GPIO_LED_1 (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTA|GPIO_PIN1) +#define GPIO_LED_2 (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTD|GPIO_PIN9) +#define GPIO_LED_4 (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTA|GPIO_PIN9) + +/* LED Management Definitions ***********************************************/ + +#ifdef CONFIG_ARCH_LEDS +# define LED_OFF 0 +# define LED_ON 1 +# define LED_NC 2 +#endif + +/* Debug ********************************************************************/ + +#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_LEDS) +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# undef CONFIG_DEBUG_LEDS +# undef CONFIG_DEBUG_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private types + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +struct led_setting_s +{ + uint8_t led0 : 2; + uint8_t led1 : 2; + uint8_t led2 : 2; + uint8_t unused : 2; +}; +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* If CONFIG_ARCH_LEDS is defined then NuttX will control the LEDs. The + * following structures identified the LED settings for each NuttX LED state. + */ + +#ifdef CONFIG_ARCH_LEDS +static const struct led_setting_s g_ledonvalues[LED_NVALUES] = +{ + {LED_OFF, LED_OFF, LED_OFF, LED_OFF}, + {LED_ON, LED_OFF, LED_NC, LED_OFF}, + {LED_OFF, LED_ON, LED_NC, LED_OFF}, + {LED_ON, LED_ON, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_ON, LED_OFF}, + {LED_ON, LED_NC, LED_NC, LED_OFF}, +}; + +static const struct led_setting_s g_ledoffvalues[LED_NVALUES] = +{ + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_OFF, LED_OFF}, + {LED_OFF, LED_NC, LED_NC, LED_OFF}, +}; + +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + * any way. The following array simply maps the PIC32MX_PIC32MX7MMB_LEDn + * index values to the correct LED pin configuration. + */ + +#else +static const uint16_t g_ledpincfg[PIC32MX_PIC32MX7MMB_NLEDS] = +{ + GPIO_LED_0, GPIO_LED_1, GPIO_LED_2 +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pic32mx_setleds + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +static void pic32mx_setleds(FAR const struct led_setting_s *setting) +{ + /* LEDs are pulled up so writing a low value (false) illuminates them */ + + if (setting->led0 != LED_NC) + { + pic32mx_gpiowrite(GPIO_LED_0, setting->led0 != LED_ON); + } + + if (setting->led1 != LED_NC) + { + pic32mx_gpiowrite(GPIO_LED_1, setting->led1 != LED_ON); + } + + if (setting->led2 != LED_NC) + { + pic32mx_gpiowrite(GPIO_LED_2, setting->led2 != LED_ON); + } +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled_initialize(void) +{ + /* Configure output pins */ + + pic32mx_configgpio(GPIO_LED_0); + pic32mx_configgpio(GPIO_LED_1); + pic32mx_configgpio(GPIO_LED_2); +} +#endif + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled(int led, bool ledon) +{ + /* LEDs are pulled up so writing a low value (false) illuminates them */ + + if ((unsigned)led < PIC32MX_PIC32MX7MMB_NLEDS) + { + pic32mx_gpiowrite(g_ledpincfg[led], !ledon); + } +} +#endif + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled_all(uint8_t ledset) +{ + /* Call board_userled() with ledon == true to illuminated the LED */ + + board_userled(PIC32MX_PIC32MX7MMB_LED0, (ledset & PIC32MX_PIC32MX7MMB_LED0_BIT) != 0); + board_userled(PIC32MX_PIC32MX7MMB_LED1, (ledset & PIC32MX_PIC32MX7MMB_LED1_BIT) != 0); + board_userled(PIC32MX_PIC32MX7MMB_LED2, (ledset & PIC32MX_PIC32MX7MMB_LED2_BIT) != 0); +} +#endif + +/**************************************************************************** + * Name: pic32mx_led_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void pic32mx_led_initialize(void) +{ + /* Configure output pins */ + + pic32mx_configgpio(GPIO_LED_0); + pic32mx_configgpio(GPIO_LED_1); + pic32mx_configgpio(GPIO_LED_2); +} +#endif + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_on(int led) +{ + if ((unsigned)led < LED_NVALUES) + { + pic32mx_setleds(&g_ledonvalues[led]); + } +} +#endif + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_off(int led) +{ + if ((unsigned)led < LED_NVALUES) + { + pic32mx_setleds(&g_ledoffvalues[led]); + } +} +#endif diff --git a/configs/pic32mx7mmb/src/pic32_mio283qt2.c b/configs/pic32mx7mmb/src/pic32_mio283qt2.c new file mode 100644 index 0000000000000000000000000000000000000000..061fd20d28c1708496b12710913531bde6502700 --- /dev/null +++ b/configs/pic32mx7mmb/src/pic32_mio283qt2.c @@ -0,0 +1,552 @@ +/************************************************************************************** + * configs/stm32fdiscover/src/pic32_mio283qt2.c + * + * Interface definition for the MI0283QT-2 LCD from Multi-Inno Technology Co., Ltd. + * This LCD is based on the Himax HX8347-D LCD controller. + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************/ + +/************************************************************************************** + * Included Files + **************************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "pic32mx.h" +#include "pic32mx-pmp.h" +#include "pic32mx7mmb.h" + +/************************************************************************************** + * Pre-processor Definitions + **************************************************************************************/ +/* Configuration **********************************************************************/ + +#if defined(CONFIG_LCD_MIO283QT2) && !defined(CONFIG_PIC32MX_PMP) +# error "CONFIG_PIC32MX_PMP is required to use the LCD" +#endif + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* PIC32MX7MMB LCD Hardware Definitions ***********************************************/ +/* --- ---------------------------------- -------------------- ------------------------ + * PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS + * (Family Data Sheet Table 1-1) (PIC32MX7 Schematic) + * --- ---------------------------------- -------------------- ------------------------ + * 6 RC1/T2CK LCD_RST TFT display + * 43 PMA1/AETXD3/AN14/ERXD2/PMALH/RB14 LCD-CS# TFT display, HDR2 pin 3 + * 77 OC3/RD2 LCD_BLED LCD backlight LED + * 44 PMA0/AETXD2/AN15/CN12/ERXD3/OCFB/ LCD-RS TFT display + * PMALL/RB15 + * + * 34 PMA13/AN10/RB10/CVREFOUT LCD-YD TFT display + * 35 PMA12/AETXERR/AN11/ERXERR/RB11 LCD-XR TFT display + * 41 PMA11/AECRS/AN12/ERXD0/RB12 LCD-YU TFT display + * 42 PMA10/AECOL/AN13/ERXD1/RB13 LCD-XL TFT display + * + * 93 PMD0/RE0 PMPD0 TFT display, HDR1 pin 18 + * 94 PMD1/RE1 PMPD1 TFT display, HDR1 pin 17 + * 98 PMD2/RE2 PMPD2 TFT display, HDR1 pin 16 + * 99 PMD3/RE3 PMPD3 TFT display, HDR1 pin 15 + * 100 PMD4/RE4 PMPD4 TFT display, HDR1 pin 14 + * 3 PMD5/RE5 PMPD5 TFT display, HDR1 pin 13 + * 4 PMD6/RE6 PMPD6 TFT display, HDR1 pin 12 + * 5 PMD7/RE7 PMPD7 TFT display, HDR1 pin 11 + * 90 PMD8/C2RX/RG0 PMPD8 TFT display, HDR1 pin 10 + * 89 PMD9/C2TX/ETXERR/RG1 PMPD9 TFT display, HDR1 pin 9 + * 88 PMD10/C1TX/ETXD0/RF1 PMPD10 TFT display, HDR1 pin 8 + * 87 PMD11/C1RX/ETXD1/RF0 PMPD11 TFT display, HDR1 pin 7 + * 79 PMD12/ETXD2/IC5/RD12 PMPD12 TFT display, HDR1 pin 6 + * 80 PMD13/CN19/ETXD3/RD13 PMPD13 TFT display, HDR1 pin 5 + * 83 PMD14/CN15/ETXEN/RD6 PMPD14 TFT display, HDR1 pin 4 + * 84 PMD15/CN16/ETXCLK/RD7 PMPD15 TFT display, HDR1 pin 3 + * + * 82 CN14/PMRD/RD5 PMPRD + * 81 CN13/OC5/PMWR/RD4 PMPWR + */ + +/* RC1, Reset -- Low value holds in reset */ + +#define GPIO_LCD_RST (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTC|GPIO_PIN1) + +/* RB14, LCD select -- Low value selects LCD */ + +#define GPIO_LCD_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTB|GPIO_PIN14) + +/* RD2, Backlight -- Low value turns off */ + +#define GPIO_LCD_BLED (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTD|GPIO_PIN2) + +/* RB15, RS -- High values selects data */ + +#define GPIO_LCD_RS (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTB|GPIO_PIN15) + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +#ifdef CONFIG_LCD_MIO283QT2 + +/************************************************************************************** + * Private Type Definition + **************************************************************************************/ + +struct pic32mx7mmb_dev_s +{ + struct mio283qt2_lcd_s dev; /* The externally visible part of the driver */ + bool data; /* true=data selected */ + bool selected; /* true=LCD selected */ + bool reading; /* true=We are in a read sequence */ + FAR struct lcd_dev_s *drvr; /* The saved instance of the LCD driver */ +}; + +/************************************************************************************** + * Private Function Protototypes + **************************************************************************************/ +/* Low Level LCD access */ + +static void pic32mx_select(FAR struct mio283qt2_lcd_s *dev); +static void pic32mx_deselect(FAR struct mio283qt2_lcd_s *dev); +static void pic32mx_index(FAR struct mio283qt2_lcd_s *dev, uint8_t index); +#ifndef CONFIG_MIO283QT2_WRONLY +static uint16_t pic32mx_read(FAR struct mio283qt2_lcd_s *dev); +#endif +static void pic32mx_write(FAR struct mio283qt2_lcd_s *dev, uint16_t data); +static void pic32mx_backlight(FAR struct mio283qt2_lcd_s *dev, int power); + +/************************************************************************************** + * Private Data + **************************************************************************************/ + +/* This is the driver state structure (there is no retained state information) */ + +static struct pic32mx7mmb_dev_s g_pic32mx7mmb_lcd = +{ + { + .select = pic32mx_select, + .deselect = pic32mx_deselect, + .index = pic32mx_index, +#ifndef CONFIG_MIO283QT2_WRONLY + .read = pic32mx_read, +#endif + .write = pic32mx_write, + .backlight = pic32mx_backlight + } +}; + +/************************************************************************************** + * Private Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: pic32mx_command + * + * Description: + * Configure to write an LCD command + * + **************************************************************************************/ + +static void pic32mx_command(FAR struct pic32mx7mmb_dev_s *priv) +{ + /* Low selects command */ + + if (priv->data) + { + pic32mx_gpiowrite(GPIO_LCD_RS, false); + + priv->data = false; /* Command, not data */ + priv->reading = false; /* No read sequence in progress */ + } +} + +/************************************************************************************** + * Name: pic32mx_data + * + * Description: + * Configure to read or write LCD data + * + **************************************************************************************/ + +static void pic32mx_data(FAR struct pic32mx7mmb_dev_s *priv) +{ + /* Hi selects data */ + + if (!priv->data) + { + pic32mx_gpiowrite(GPIO_LCD_RS, true); + + priv->data = true; /* Data, not command */ + priv->reading = false; /* No read sequence in progress */ + } +} + +/************************************************************************************** + * Name: pic32mx_data + * + * Description: + * Wait until the PMP is no longer busy + * + **************************************************************************************/ + +static void pic32mx_busywait(void) +{ + while ((getreg32(PIC32MX_PMP_MODE) & PMP_MODE_BUSY) != 0); +} + +/************************************************************************************** + * Name: pic32mx_select + * + * Description: + * Select the LCD device + * + **************************************************************************************/ + +static void pic32mx_select(FAR struct mio283qt2_lcd_s *dev) +{ + FAR struct pic32mx7mmb_dev_s *priv = (FAR struct pic32mx7mmb_dev_s *)dev; + + /* CS low selects */ + + if (!priv->selected) + { + pic32mx_gpiowrite(GPIO_LCD_CS, false); + + priv->selected = true; /* LCD selected */ + priv->reading = false; /* No read sequence in progress */ + } +} + +/************************************************************************************** + * Name: pic32mx_deselect + * + * Description: + * De-select the LCD device + * + **************************************************************************************/ + +static void pic32mx_deselect(FAR struct mio283qt2_lcd_s *dev) +{ + FAR struct pic32mx7mmb_dev_s *priv = (FAR struct pic32mx7mmb_dev_s *)dev; + + /* CS high de-selects */ + + if (priv->selected) + { + pic32mx_gpiowrite(GPIO_LCD_CS, true); + + priv->selected = false; /* LCD not selected */ + priv->reading = false; /* No read sequence in progress */ + } +} + +/************************************************************************************** + * Name: pic32mx_index + * + * Description: + * Set the index register + * + **************************************************************************************/ + +static void pic32mx_index(FAR struct mio283qt2_lcd_s *dev, uint8_t index) +{ + FAR struct pic32mx7mmb_dev_s *priv = (FAR struct pic32mx7mmb_dev_s *)dev; + + /* Make sure that the PMP is not busy from the last transaction. Read data is not + * available until the busy bit becomes zero. + */ + + pic32mx_busywait(); + + /* Write the 8-bit command (on the 16-bit data bus) */ + + pic32mx_command(priv); + putreg16((uint16_t)index, PIC32MX_PMP_DIN); +} + +/************************************************************************************** + * Name: pic32mx_read + * + * Description: + * Read LCD data (GRAM data or register contents) + * + **************************************************************************************/ + +#ifndef CONFIG_MIO283QT2_WRONLY +static uint16_t pic32mx_read(FAR struct mio283qt2_lcd_s *dev) +{ + FAR struct pic32mx7mmb_dev_s *priv = (FAR struct pic32mx7mmb_dev_s *)dev; + uint16_t data; + + /* Make sure that the PMP is not busy from the last transaction. Read data is not + * available until the busy bit becomes zero. + */ + + pic32mx_busywait(); + + /* Read 16-bits of data */ + + pic32mx_data(priv); + data = getreg16(PIC32MX_PMP_DIN); + + /* We need to discard the first 16-bits of data that we read and re-read inorder + * to get valid data (that is just the way that the PMP works). + */ + + if (!priv->reading) + { + data = getreg16(PIC32MX_PMP_DIN); + } + + return data; +} +#endif + +/************************************************************************************** + * Name: pic32mx_write + * + * Description: + * Write LCD data (GRAM data or register contents) + * + **************************************************************************************/ + +static void pic32mx_write(FAR struct mio283qt2_lcd_s *dev, uint16_t data) +{ + FAR struct pic32mx7mmb_dev_s *priv = (FAR struct pic32mx7mmb_dev_s *)dev; + + /* Make sure that the PMP is not busy from the last transaction */ + + pic32mx_busywait(); + + /* Write 16-bits of data */ + + pic32mx_data(priv); + putreg16(data, PIC32MX_PMP_DIN); + + /* We are not in a write sequence */ + + priv->reading = false; +} + +/************************************************************************************** + * Name: pic32mx_write + * + * Description: + * Write LCD data (GRAM data or register contents) + * + **************************************************************************************/ + +static void pic32mx_backlight(FAR struct mio283qt2_lcd_s *dev, int power) +{ + /* For now, we just control the backlight as a discrete. Pulse width modulation + * would be required to vary the backlight level. A low value turns the backlight + * off. + */ + + pic32mx_gpiowrite(GPIO_LCD_BLED, power > 0); +} + +/************************************************************************************** + * Public Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + **************************************************************************************/ + +int board_lcd_initialize(void) +{ + uint32_t regval; + + /* Only initialize the driver once. NOTE: The LCD GPIOs were already configured + * by pic32mx_lcdinitialize. + */ + + if (!g_pic32mx7mmb_lcd.drvr) + { + lcdvdbg("Initializing\n"); + + /* Hold the LCD in reset (active low) */ + + pic32mx_gpiowrite(GPIO_LCD_RST, false); + + /* Configure PMP to support the LCD */ + + putreg32(0, PIC32MX_PMP_MODE); + putreg32(0, PIC32MX_PMP_AEN); + putreg32(0, PIC32MX_PMP_CON); + + /* Set LCD timing values, PMP master mode 2, 16-bit mode, no address + * increment, and no interrupts. + */ + + regval = (PMP_MODE_WAITE_RD(0) | PMP_MODE_WAITM(3) | PMP_MODE_WAITB_1TPB | + PMP_MODE_MODE_MODE2 | PMP_MODE_MODE16 | PMP_MODE_INCM_NONE | + PMP_MODE_IRQM_NONE); + putreg32(regval, PIC32MX_PMP_MODE); + + /* Enable the PMP for reading and writing */ + + regval = (PMP_CON_CSF_ADDR1415 | PMP_CON_PTRDEN | PMP_CON_PTWREN | + PMP_CON_ADRMUX_NONE | PMP_CON_ON); + putreg32(regval, PIC32MX_PMP_CON); + + /* Bring the LCD out of reset */ + + up_mdelay(5); + pic32mx_gpiowrite(GPIO_LCD_RST, true); + + /* Configure and enable the LCD */ + + up_mdelay(50); + g_pic32mx7mmb_lcd.drvr = mio283qt2_lcdinitialize(&g_pic32mx7mmb_lcd.dev); + if (!g_pic32mx7mmb_lcd.drvr) + { + lcddbg("ERROR: mio283qt2_lcdinitialize failed\n"); + return -ENODEV; + } + } + + /* Clear the display (setting it to the color 0=black) */ + +#if 0 /* Already done in the driver */ + mio283qt2_clear(g_pic32mx7mmb_lcd.drvr, 0); +#endif + + /* Turn the display off */ + + g_pic32mx7mmb_lcd.drvr->setpower(g_pic32mx7mmb_lcd.drvr, 0); + return OK; +} + +/************************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows support + * for multiple LCD devices. + * + **************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return g_pic32mx7mmb_lcd.drvr; +} + +/************************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Uninitialize the LCD support + * + **************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* Turn the display off */ + + g_pic32mx7mmb_lcd.drvr->setpower(g_pic32mx7mmb_lcd.drvr, 0); +} + +#endif /* CONFIG_LCD_MIO283QT2 */ + +/**************************************************************************** + * Name: pic32mx_lcdinitialize + * + * Description: + * Initialize the LCD. This function should be called early in the boot + * sequendce -- Even if the LCD is not enabled. In that case we should + * at a minimum at least disable the LCD backlight. + * + ****************************************************************************/ + +void pic32mx_lcdinitialize(void) +{ + /* Configure all LCD discrete controls. LCD will be left in this state: + * 1. Held in reset, + * 2. Not selected, + * 3. Backlight off, + * 4. Command selected. + */ + +#ifdef CONFIG_LCD_MIO283QT2 + pic32mx_configgpio(GPIO_LCD_RST); + pic32mx_configgpio(GPIO_LCD_CS); + pic32mx_configgpio(GPIO_LCD_BLED); + pic32mx_configgpio(GPIO_LCD_RS); + +#else + /* Just configure the backlight control as an output and turn off the + * backlight for now. + */ + + pic32mx_configgpio(GPIO_LCD_BLED); +#endif +} diff --git a/configs/pic32mx7mmb/src/pic32_spi.c b/configs/pic32mx7mmb/src/pic32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..f89b06d93b0bbadbd674aced34566c63c00a5ecc --- /dev/null +++ b/configs/pic32mx7mmb/src/pic32_spi.c @@ -0,0 +1,263 @@ +/************************************************************************************ + * configs/pic32mx7mmb/src/pic32_spi.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "pic32mx.h" +#include "pic32mx7mmb.h" + +#if defined(CONFIG_PIC32MX_SPI1) || defined(CONFIG_PIC32MX_SPI2) || \ + defined(CONFIG_PIC32MX_SPI3) || defined(CONFIG_PIC32MX_SPI4) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* SPI1 and SD Card + * + * ------ -------- ------------------------- -------------------------------- + * GPIO SIGNAL BOARD CONNECTION NOTES + * ------ -------- ------------------------- -------------------------------- + * RC4 SPI1 SD card slot SPI1 data IN + * RD0 SPO1 SD card slot SPI1 data OUT + * RD10 SCK1 SD card slot SD card, SPI clock + * + * RA9 SD_CS# SD card slot SD card, SPI chip select (active low) + * RG6 SD_WP SD card slot SD card, write protect + * RG7 SD_CD# SD card slot SD card, card detect (not) + */ + +#define GPIO_SD_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTA|GPIO_PIN9) +#define GPIO_SD_WP (GPIO_INPUT|GPIO_PORTG|GPIO_PIN6) +#define GPIO_SD_CD (GPIO_INPUT|GPIO_INT|GPIO_PORTG|GPIO_PIN7) + +/* The following enable debug output from this file (needs CONFIG_DEBUG too). + * + * CONFIG_DEBUG_SPI - Define to enable basic SPI debug + */ + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# define spivdbg llvdbg +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Mikroelektronka PIC32MX7 + * MMB board. + * + ************************************************************************************/ + +void weak_function pic32mx_spidev_initialize(void) +{ + /* Configure the SPI chip select, write protect, and card detect GPIOs */ + +#ifdef CONFIG_PIC32MX_SPI1 + pic32mx_configgpio(GPIO_SD_CS); + pic32mx_configgpio(GPIO_SD_WP); + pic32mx_configgpio(GPIO_SD_CD); +#endif +} + +/************************************************************************************ + * Name: pic32mx_spiNselect, pic32mx_spiNstatus, and pic32mx_spiNcmddata + * + * Description: + * These external functions must be provided by board-specific logic. They are + * implementations of the select, status, and cmddata methods of the SPI interface + * defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All other methods + * including pic32mx_spibus_initialize()) are provided by common PIC32MX logic. To use + * this common SPI logic on your board: + * + * 1. Provide logic in pic32mx_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide pic32mx_spiNselect() and pic32mx_spiNstatus() functions + * in your board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * pic32mx_spiNcmddata() functions in your board-specific logic. These + * functions will perform cmd/data selection operations using GPIOs in the way + * your board is configured. + * 3. Add a call to pic32mx_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by pic32mx_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +struct spi_dev_s; +enum spi_dev_e; + +#ifdef CONFIG_PIC32MX_SPI1 +void pic32mx_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + if (devid == SPIDEV_MMCSD) + { + pic32mx_gpiowrite(GPIO_SD_CS, !selected); + } +} + +uint8_t pic32mx_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + + /* Card detect active low. */ + + if (devid == SPIDEV_MMCSD) + { + if (!pic32mx_gpioread(GPIO_SD_CD)) + { + ret = SPI_STATUS_PRESENT; + + /* A high value indicates that the card is write protected. */ + + if (pic32mx_gpioread(GPIO_SD_WP)) + { + ret |= SPI_STATUS_WRPROTECTED; + } + } + } + + spidbg("Returning %02x\n", ret); + return ret; +} +#ifdef CONFIG_SPI_CMDDATA +int pic32mx_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif + +#ifdef CONFIG_PIC32MX_SPI2 +void pic31mx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t pic31mx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + spidbg("Returning nothing\n"); +#warning "Missing logic" + return 0; +} + +#ifdef CONFIG_SPI_CMDDATA +int pic31mx_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif + +#ifdef CONFIG_PIC32MX_SPI3 +void pic32mx_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t pic32mx_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + spidbg("Returning nothing\n"); +#warning "Missing logic" + return 0; +} + +#ifdef CONFIG_SPI_CMDDATA +int pic32mx_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif + +#ifdef CONFIG_PIC32MX_SPI4 +void pic32mx_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t pic32mx_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + spidbg("Returning nothing\n"); +#warning "Missing logic" + return 0; +} + +#ifdef CONFIG_SPI_CMDDATA +int pic32mx_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif + +#endif /* CONFIG_PIC32MX_SPI1..4 */ diff --git a/configs/pic32mx7mmb/src/pic32_touchscreen.c b/configs/pic32mx7mmb/src/pic32_touchscreen.c new file mode 100644 index 0000000000000000000000000000000000000000..333325622edaa6a3682716011bfad4ead644651e --- /dev/null +++ b/configs/pic32mx7mmb/src/pic32_touchscreen.c @@ -0,0 +1,1460 @@ +/************************************************************************************ + * configs/pic32mx7mmb/src/pic32_touchscreen.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include "up_arch.h" +#include "up_internal.h" + +#include "pic32mx.h" +#include "pic32mx-adc.h" +#include "pic32mx-ioport.h" +#include "pic32mx7mmb.h" + +#ifdef CONFIG_INPUT + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* Reference counting is partially implemented, but not needed in the current design. + */ + +#undef CONFIG_TOUCHSCREEN_REFCNT + +/* Should we try again on bad samples? */ + +#undef CONFIG_TOUCHSCREEN_RESAMPLE + +/* Work queue support is required */ + +#ifndef CONFIG_SCHED_WORKQUEUE +# warning "Work queue support is required (CONFIG_SCHED_WORKQUEUE=y) +#endif + +/* CONFIG_TOUCHSCREEN_THRESHX and CONFIG_TOUCHSCREEN_THRESHY + * Touchscreen data comes in a a very high rate. New touch positions + * will only be reported when the X or Y data changes by these thresholds. + * This trades reduces data rate for some loss in dragging accuracy. The + * touchscreen is configure for 10-bit values so the raw ranges are 0-1023. So + * for example, if your display is 320x240, then THRESHX=3 and THRESHY=4 + * would correspond to one pixel. Default: 4 + */ + +#ifndef CONFIG_TOUCHSCREEN_THRESHX +# define CONFIG_TOUCHSCREEN_THRESHX 4 +#endif + +#ifndef CONFIG_TOUCHSCREEN_THRESHY +# define CONFIG_TOUCHSCREEN_THRESHY 4 +#endif + +/* Driver support *******************************************************************/ +/* This format is used to construct the /dev/input[n] device driver path. It is + * defined here so that it will be used consistently in all places. + */ + +#define DEV_FORMAT "/dev/input%d" +#define DEV_NAMELEN 16 + +/* PIC32MX7MMB Touchscreen Hardware Definitions *************************************/ +/* ----- ------ -------------------- + * GPIO ADC IN TFT Signal Name + * ----- ------ -------------------- + * RB10 AN10 LCD-YD + * RB11 AN11 LCD-XR + * RB12 AN12 LCD-YU + * RB13 AN13 LCD-XL + */ + +#define LCD_XPLUS_PIN (11) +#define LCD_YPLUS_PIN (12) +#define LCD_XMINUS_PIN (13) +#define LCD_YMINUS_PIN (10) + +#define LCD_XPLUS_BIT (1 << LCD_XPLUS_PIN) +#define LCD_YPLUS_BIT (1 << LCD_YPLUS_PIN) +#define LCD_XMINUS_BIT (1 << LCD_XMINUS_PIN) +#define LCD_YMINUS_BIT (1 << LCD_YMINUS_PIN) +#define LCD_ALL_BITS (LCD_XPLUS_BIT | LCD_YPLUS_BIT | LCD_XMINUS_BIT | LCD_YMINUS_BIT) + +/* Conversions are performed as 10-bit samples represented as 16-bit unsigned integers: */ + +#define MAX_ADC (1023) + +/* A measured value has to be within this range to be considered */ + +#define UPPER_THRESHOLD (MAX_ADC-1) +#define LOWER_THRESHOLD (1) + +/* Delays ***************************************************************************/ +/* All values will be increased by one system timer tick (probably 10MS). */ + +#define TC_PENUP_POLL_TICKS MSEC2TICK(100) /* IDLE polling rate: 100 MSec */ +#define TC_PENDOWN_POLL_TICKS MSEC2TICK(60) /* Active polling rate: 60 MSec */ +#define TC_DEBOUNCE_TICKS MSEC2TICK(30) /* Delay before re-sampling: 30 MSec */ +#define TC_SAMPLE_TICKS MSEC2TICK(4) /* Delay for A/D sampling: 4 MSec */ +#define TC_RESAMPLE_TICKS TC_SAMPLE_TICKS + +/************************************************************************************ + * Private Types + ************************************************************************************/ +/* This enumeration describes the state of touchscreen state machine */ + +enum tc_state_e +{ + TC_READY = 0, /* Ready to begin next sample */ + TC_YMPENDOWN, /* Allowing time for the Y- pen down sampling */ + TC_DEBOUNCE, /* Allowing a debounce time for the first sample */ + TC_RESAMPLE, /* Restart sampling on a bad measurement */ + TC_YMSAMPLE, /* Allowing time for the Y- sampling */ + TC_YPSAMPLE, /* Allowing time for the Y+ sampling */ + TC_XPSAMPLE, /* Allowing time for the X+ sampling */ + TC_XMSAMPLE, /* Allowing time for the X- sampling */ + TC_PENDOWN, /* Conversion is complete -- pen down */ + TC_PENUP /* Conversion is complete -- pen up */ +}; + +/* This describes the state of one contact */ + +enum tc_contact_e +{ + CONTACT_NONE = 0, /* No contact */ + CONTACT_DOWN, /* First contact */ + CONTACT_MOVE, /* Same contact, possibly different position */ + CONTACT_UP, /* Contact lost */ +}; + +/* This structure describes the results of one touchscreen sample */ + +struct tc_sample_s +{ + uint8_t id; /* Sampled touch point ID */ + uint8_t contact; /* Contact state (see enum tc_contact_e) */ + bool valid; /* True: x,y contain valid, sampled data */ + uint16_t x; /* Thresholded X position */ + uint16_t y; /* Thresholded Y position */ +}; + +/* This structure describes the state of one touchscreen driver instance */ + +struct tc_dev_s +{ +#ifdef CONFIG_TOUCHSCREEN_REFCNT + uint8_t crefs; /* Number of times the device has been opened */ +#endif + uint8_t state; /* See enum tc_state_e */ + uint8_t nwaiters; /* Number of threads waiting for touchscreen data */ + uint8_t id; /* Current touch point ID */ + volatile bool penchange; /* An unreported event is buffered */ + uint16_t value; /* Partial sample value (Y+ or X-) */ + uint16_t newy; /* New, un-thresholded Y value */ + sem_t devsem; /* Manages exclusive access to this structure */ + sem_t waitsem; /* Used to wait for the availability of data */ + struct tc_sample_s sample; /* Last sampled touch point data */ + struct work_s work; /* Supports the state machine delayed processing */ + + /* The following is a list if poll structures of threads waiting for + * driver events. The 'struct pollfd' reference for each open is also + * retained in the f_priv field of the 'struct file'. + */ + +#ifndef CONFIG_DISABLE_POLL + struct pollfd *fds[CONFIG_TOUCHSCREEN_NPOLLWAITERS]; +#endif +}; + +/************************************************************************************ + * Private Function Prototypes + ************************************************************************************/ + +static void tc_adc_sample(int pin); +static uint16_t tc_adc_convert(void); +static void tc_yminus_sample(void); +static void tc_yplus_sample(void); +static void tc_xplus_sample(void); +static void tc_xminus_sample(void); +static inline bool tc_valid_sample(uint16_t sample); + +static void tc_notify(FAR struct tc_dev_s *priv); +static int tc_sample(FAR struct tc_dev_s *priv, + FAR struct tc_sample_s *sample); +static int tc_waitsample(FAR struct tc_dev_s *priv, + FAR struct tc_sample_s *sample); +static void tc_worker(FAR void *arg); + +/* Character driver methods */ + +static int tc_open(FAR struct file *filep); +static int tc_close(FAR struct file *filep); +static ssize_t tc_read(FAR struct file *filep, FAR char *buffer, size_t len); +static int tc_ioctl(FAR struct file *filep, int cmd, unsigned long arg); +#ifndef CONFIG_DISABLE_POLL +static int tc_poll(FAR struct file *filep, struct pollfd *fds, bool setup); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* This the vtable that supports the character driver interface */ + +static const struct file_operations tc_fops = +{ + tc_open, /* open */ + tc_close, /* close */ + tc_read, /* read */ + 0, /* write */ + 0, /* seek */ + tc_ioctl /* ioctl */ +#ifndef CONFIG_DISABLE_POLL + , tc_poll /* poll */ +#endif +}; + +/* If only a single touchscreen device is supported, then the driver state + * structure may as well be pre-allocated. + */ + +#ifndef CONFIG_TOUCHSCREEN_MULTIPLE +static struct tc_dev_s g_touchscreen; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ +/************************************************************************************ + * Name: tc_adc_sample + * + * Description: + * Perform A/D sampling. Time must be allowed betwen the start of sampling + * and conversion (approx. 100Ms). + * + ************************************************************************************/ + +static void tc_adc_sample(int pin) +{ + /* Configure the pins for as an analog input. AD1PCFG specifies the + * configuration of device pins to be used as analog inputs. A pin + * is configured as an analog input when the corresponding PCFGn bit + * is 0. + */ + + putreg32(ADC_CFG(pin), PIC32MX_ADC_CFGCLR); + + /* Set SAMP=0, format 16-bit unsigned integer, manual conversion, + * SAMP=1 will trigger. + */ + + putreg32(0, PIC32MX_ADC_CON1); + + /* Select the pin as the MUXA CH0 input (positive) */ + + putreg32(ADC_CHS_CH0SA(pin), PIC32MX_ADC_CHS); + + /* No input scan */ + + putreg32(0, PIC32MX_ADC_CSSL); + + /* Manual sample, TAD = internal, 6 TPB */ + + putreg32(ADC_CON3_ADCS(6) | ADC_CON3_SAMC(0), PIC32MX_ADC_CON3); + + /* No interrupts, no scan, internal voltage reference */ + + putreg32(ADC_CON2_VCFG_AVDDAVSS, PIC32MX_ADC_CON2); + + /* Turn on the ADC */ + + putreg32(ADC_CON1_ON, PIC32MX_ADC_CON1SET); + + /* Start sampling */ + + putreg32(ADC_CON1_SAMP, PIC32MX_ADC_CON1SET); +} + +/************************************************************************************ + * Name: tc_adc_convert + * + * Description: + * Begin A/D conversion. Time must be allowed betwen the start of sampling + * and conversion (approx. 100Ms). + * + * Assumptions: + * 1) All output pins configured as outputs: + * 2) Approprite pins are driven high and low + * + ************************************************************************************/ + +static uint16_t tc_adc_convert(void) +{ + uint32_t retval; + + /* Start conversion */ + + putreg32(ADC_CON1_SAMP, PIC32MX_ADC_CON1CLR); + + /* Wait for the conversion to complete */ + + while ((getreg32(PIC32MX_ADC_CON1) & ADC_CON1_DONE) == 0); + + /* Then read the converted ADC value */ + + retval = getreg32(PIC32MX_ADC_BUF0); + + /* Disable the ADC */ + + putreg32(ADC_CON1_ON, PIC32MX_ADC_CON1CLR); + + /* Reset all pins to digital function */ + + putreg32(LCD_ALL_BITS, PIC32MX_ADC_CFGSET); + return (uint16_t)retval; +} + +/************************************************************************************ + * Name: tc_yminus_sample + * + * Description: + * Initiate sampling on Y- + * + ************************************************************************************/ + +static void tc_yminus_sample(void) +{ + /* Configure X- as an input and X+, Y+, and Y- as outputs */ + + putreg32(LCD_XPLUS_BIT | LCD_YPLUS_BIT | LCD_YMINUS_BIT, PIC32MX_IOPORTB_TRISCLR); + putreg32(LCD_XMINUS_BIT, PIC32MX_IOPORTB_TRISSET); + + /* Energize the X plate: Y+ and Y- high, X+ low */ + + putreg32(LCD_XPLUS_BIT, PIC32MX_IOPORTB_PORTCLR); + putreg32(LCD_YPLUS_BIT | LCD_YMINUS_BIT, PIC32MX_IOPORTB_PORTSET); + + /* Start the Y axis sampling */ + + tc_adc_sample(LCD_XMINUS_PIN); +} + +/************************************************************************************ + * Name: tc_yplus_sample + * + * Description: + * Initiate sampling on Y+ + * + ************************************************************************************/ + +static void tc_yplus_sample(void) +{ + /* Configure X+ as an input and X-, Y+, and Y- as outputs */ + + putreg32(LCD_XMINUS_BIT | LCD_YPLUS_BIT | LCD_YMINUS_BIT, PIC32MX_IOPORTB_TRISCLR); + putreg32(LCD_XPLUS_BIT, PIC32MX_IOPORTB_TRISSET); + + /* Energize the X plate: Y+ and Y- High, X- low (X+ is an input) */ + + putreg32(LCD_XMINUS_BIT, PIC32MX_IOPORTB_PORTCLR); + putreg32(LCD_YPLUS_BIT | LCD_YMINUS_BIT, PIC32MX_IOPORTB_PORTSET); + + /* Start the Y axis sampling */ + + tc_adc_sample(LCD_XPLUS_PIN); +} + +/************************************************************************************ + * Name: tc_xplus_sample + * + * Description: + * Initiate sampling on X+ + * + ************************************************************************************/ + +static void tc_xplus_sample(void) +{ + /* Configure Y+ as an input and X+, X-, and Y- as outputs */ + + putreg32(LCD_XPLUS_BIT | LCD_XMINUS_BIT | LCD_YMINUS_BIT, PIC32MX_IOPORTB_TRISCLR); + putreg32(LCD_YPLUS_BIT, PIC32MX_IOPORTB_TRISSET); + + /* Energize the Y plate: X+ and X- high, Y- low (Y+ is an input) */ + + putreg32(LCD_YMINUS_BIT, PIC32MX_IOPORTB_PORTCLR); + putreg32(LCD_XPLUS_BIT | LCD_XMINUS_BIT, PIC32MX_IOPORTB_PORTSET); + + /* Read the X axis value */ + + tc_adc_sample(LCD_YPLUS_PIN); +} + +/************************************************************************************ + * Name: tc_xminus_sample + * + * Description: + * Initiate sampling on X- + * + ************************************************************************************/ + +static void tc_xminus_sample(void) +{ + /* Configure Y- as an input and X+, Y+, and X- as outputs */ + + putreg32(LCD_XPLUS_BIT | LCD_XMINUS_BIT | LCD_YPLUS_BIT, PIC32MX_IOPORTB_TRISCLR); + putreg32(LCD_YMINUS_BIT, PIC32MX_IOPORTB_TRISSET); + + /* Energize the Y plate: X+ and X- high, Y+ low (Y- is an input) */ + + putreg32(LCD_YPLUS_BIT, PIC32MX_IOPORTB_PORTCLR); + putreg32(LCD_XPLUS_BIT | LCD_XMINUS_BIT, PIC32MX_IOPORTB_PORTSET); + + /* Start X axis sampling */ + + tc_adc_sample(LCD_YMINUS_PIN); +} + +/**************************************************************************** + * Name: tc_valid_sample + ****************************************************************************/ + +static inline bool tc_valid_sample(uint16_t sample) +{ + return (sample > LOWER_THRESHOLD /* && sample < UPPER_THRESHOLD */); +} + +/**************************************************************************** + * Name: tc_notify + ****************************************************************************/ + +static void tc_notify(FAR struct tc_dev_s *priv) +{ +#ifndef CONFIG_DISABLE_POLL + int i; +#endif + + /* If there are threads waiting for read data, then signal one of them + * that the read data is available. + */ + + if (priv->nwaiters > 0) + { + /* After posting this semaphore, we need to exit because the touchscreen + * is no longer available. + */ + + sem_post(&priv->waitsem); + } + + /* If there are threads waiting on poll() for touchscreen data to become available, + * then wake them up now. NOTE: we wake up all waiting threads because we + * do not know that they are going to do. If they all try to read the data, + * then some make end up blocking after all. + */ + +#ifndef CONFIG_DISABLE_POLL + for (i = 0; i < CONFIG_TOUCHSCREEN_NPOLLWAITERS; i++) + { + struct pollfd *fds = priv->fds[i]; + if (fds) + { + fds->revents |= POLLIN; + ivdbg("Report events: %02x\n", fds->revents); + sem_post(fds->sem); + } + } +#endif +} + +/**************************************************************************** + * Name: tc_sample + * + * Assumptions: pre-emption is disabled + * + ****************************************************************************/ + +static int tc_sample(FAR struct tc_dev_s *priv, + FAR struct tc_sample_s *sample) +{ + int ret = -EAGAIN; + + /* Is there new touchscreen sample data available? */ + + if (priv->penchange) + { + /* Yes.. the state has changed in some way. Return a copy of the + * sampled data. + */ + + memcpy(sample, &priv->sample, sizeof(struct tc_sample_s )); + + /* Now manage state transitions */ + + if (sample->contact == CONTACT_UP) + { + /* Next.. no contact. Increment the ID so that next contact ID + * will be unique. X/Y positions are no longer valid. + */ + + priv->sample.contact = CONTACT_NONE; + priv->sample.valid = false; + priv->id++; + } + else if (sample->contact == CONTACT_DOWN) + { + /* First report -- next report will be a movement */ + + priv->sample.contact = CONTACT_MOVE; + } + + priv->penchange = false; + ret = OK; + } + + return ret; +} + +/**************************************************************************** + * Name: tc_waitsample + ****************************************************************************/ + +static int tc_waitsample(FAR struct tc_dev_s *priv, + FAR struct tc_sample_s *sample) +{ + int ret; + + /* Pre-emption must be disabled when this is called to to prevent sampled + * data from changing until it has been reported. + */ + + sched_lock(); + + /* Now release the semaphore that manages mutually exclusive access to + * the device structure. This may cause other tasks to become ready to + * run, but they cannot run yet because pre-emption is disabled. + */ + + sem_post(&priv->devsem); + + /* Try to get the a sample... if we cannot, then wait on the semaphore + * that is posted when new sample data is availble. + */ + + while (tc_sample(priv, sample) < 0) + { + /* Wait for a change in the touchscreen state */ + + priv->nwaiters++; + ret = sem_wait(&priv->waitsem); + priv->nwaiters--; + + if (ret < 0) + { + /* If we are awakened by a signal, then we need to return + * the failure now. + */ + + DEBUGASSERT(errno == EINTR); + ret = -EINTR; + goto errout; + } + } + + /* Re-acquire the semaphore that manages mutually exclusive access to + * the device structure. We may have to wait here. But we have our sample. + * Interrupts and pre-emption will be re-enabled while we wait. + */ + + ret = sem_wait(&priv->devsem); + +errout: + /* Restore pre-emption. We might get suspended here but that is okay + * because we already have our sample. Note: this means that if there + * were two threads reading from the touchscreen for some reason, the data + * might be read out of order. + */ + + sched_unlock(); + return ret; +} + +/**************************************************************************** + * Name: tc_worker + ****************************************************************************/ + +static void tc_worker(FAR void *arg) +{ + FAR struct tc_dev_s *priv = (FAR struct tc_dev_s *)arg; + uint32_t delay; + uint16_t value; + uint16_t newx; + int16_t xdiff; + int16_t ydiff; + int ret; + + ASSERT(priv != NULL); + + /* Perform the next action based on the state of the conversions */ + + switch (priv->state) + { + /* The touchscreen is IDLE and we are ready to begin the next sample */ + + case TC_READY: + { + /* Start Y- sampling */ + + tc_yminus_sample(); + + /* Allow time for the Y- pend down sampling */ + + priv->state = TC_YMPENDOWN; + delay = TC_SAMPLE_TICKS; + } + break; + + /* The Y- sampling time has elapsed and the Y- value should be ready + * for conversion + */ + + case TC_YMPENDOWN: + { + /* Convert the Y- sample value */ + + value = tc_adc_convert(); + + /* A converted value at the minimum would mean that there is no touch + * and that the sampling period is complete. + */ + + if (!tc_valid_sample(value)) + { + priv->state = TC_PENUP; + } + else + { + /* Allow time for touch inputs to stabilize */ + + priv->state = TC_DEBOUNCE; + delay = TC_DEBOUNCE_TICKS; + } + } + break; + + /* The debounce time period has elapsed and we are ready to re-sample + * the touchscreen. + */ + + case TC_RESAMPLE: + case TC_DEBOUNCE: + { + /* (Re-)start Y- sampling */ + + tc_yminus_sample(); + + /* Allow time for the Y- sampling */ + + priv->state = TC_YMSAMPLE; + delay = TC_SAMPLE_TICKS; + } + break; + + /* The Y- sampling period has elapsed and we are ready to perform the + * conversion. + */ + + case TC_YMSAMPLE: + { + /* Convert and save the Y- sample value */ + + value = tc_adc_convert(); + + /* A converted value at the minimum would mean that there is no touch + * and that the sampling period is complete. At converted value at + * the maximum value is probably bad too. + */ + + if (!tc_valid_sample(value)) + { + priv->state = TC_PENUP; + } + else + { + /* Save the Y- sample and start Y+ sampling */ + + priv->value = value; + tc_yplus_sample(); + + /* Allow time for the Y+ sampling */ + + priv->state = TC_YPSAMPLE; + delay = TC_SAMPLE_TICKS; + } + } + break; + + /* The Y+ sampling period has elapsed and we are ready to perform the + * conversion. + */ + + case TC_YPSAMPLE: /* Allowing time for the Y+ sampling */ + { + /* Read the Y+ axis position */ + + value = tc_adc_convert(); + + /* A converted value at the minimum would mean that we lost the contact + * before all of the conversions were completed. At converted value at + * the maximum value is probably bad too. + */ + + if (!tc_valid_sample(value)) + { +#ifdef CONFIG_TOUCHSCREEN_RESAMPLE + priv->state = TC_RESAMPLE; + delay = TC_RESAMPLE_TICKS; +#else + priv->state = TC_PENUP; +#endif + } + else + { + value = MAX_ADC - value; + priv->newy = (value + priv->value) >> 1; + ivdbg("Y-=%d Y+=%d[%d] Y=%d\n", priv->value, value, MAX_ADC - value, priv->newy); + + /* Start X+ sampling */ + + tc_xplus_sample(); + + /* Allow time for the X+ sampling */ + + priv->state = TC_XPSAMPLE; + delay = TC_SAMPLE_TICKS; + } + } + break; + + /* The X+ sampling period has elapsed and we are ready to perform the + * conversion. + */ + + case TC_XPSAMPLE: + { + /* Convert the X+ sample value */ + + value = tc_adc_convert(); + + /* A converted value at the minimum would mean that we lost the contact + * before all of the conversions were completed. At converted value at + * the maximum value is probably bad too. + */ + + if (!tc_valid_sample(value)) + { +#ifdef CONFIG_TOUCHSCREEN_RESAMPLE + priv->state = TC_RESAMPLE; + delay = TC_RESAMPLE_TICKS; +#else + priv->state = TC_PENUP; +#endif + } + else + { + /* Save the X+ sample value */ + + priv->value = value; + + /* Start X- sampling */ + + tc_xminus_sample(); + + /* Allow time for the X- pend down sampling */ + + priv->state = TC_XMSAMPLE; + delay = TC_SAMPLE_TICKS; + } + } + break; + + /* The X+ sampling period has elapsed and we are ready to perform the + * conversion. + */ + + case TC_XMSAMPLE: /* Allowing time for the X- sampling */ + { + /* Read the converted X- axis position */ + + value = tc_adc_convert(); + + /* A converted value at the minimum would mean that we lost the contact + * before all of the conversions were completed. At converted value at + * the maximum value is probably bad too. + */ + + if (!tc_valid_sample(value)) + { +#ifdef CONFIG_TOUCHSCREEN_RESAMPLE + priv->state = TC_RESAMPLE; + delay = TC_RESAMPLE_TICKS; +#else + priv->state = TC_PENUP; +#endif + } + else + { + /* Calculate the X- axis position */ + + value = MAX_ADC - value; + newx = (value + priv->value) >> 1; + ivdbg("X+=%d X-=%d[%d] X=%d\n", priv->value, value, MAX_ADC - value, newx); + + /* Samples are available */ + + priv->state = TC_PENDOWN; + } + } + break; + } + + /* Check for terminal conditions.. */ + + /* Check if the sampling resulted in a pen up decision. If so, we need to + * handle the change from pen down to pen up. + */ + + if (priv->state == TC_PENUP) + { + /* Ignore if the pen was already down (CONTACT_NONE == pen up and already + * reported. CONTACT_UP == pen up, but not reported) + */ + + if (priv->sample.contact != CONTACT_NONE) + { + /* The pen is up. We know from the above test, that this is a + * loss of contact condition. This will be changed to CONTACT_NONE + * after the loss of contact is sampled. + */ + + priv->sample.contact = CONTACT_UP; + + /* Indicate the availability of new sample data for this ID */ + + priv->sample.id = priv->id; + priv->penchange = true; + + /* Notify any waiters that nes touchscreen data is available */ + + tc_notify(priv); + } + + /* Set up for the next poll */ + + priv->sample.valid = false; + priv->state = TC_READY; + delay = TC_PENUP_POLL_TICKS; + } + + /* Check if the sampling resulted in a pen down decision. */ + + else if (priv->state == TC_PENDOWN) + { + /* It is a pen down event. If the last loss-of-contact event has not been + * processed yet, then we have to ignore the pen down event (or else it will + * look like a drag event) + */ + + if (priv->sample.contact != CONTACT_UP) + { + /* Perform a thresholding operation so that the results will be more stable. + * If the difference from the last sample is small, then ignore the event. + */ + + xdiff = (int16_t)priv->sample.x - (int16_t)newx; + if (xdiff < 0) + { + xdiff = -xdiff; + } + + ydiff = (int16_t)priv->sample.y - (int16_t)priv->newy; + if (ydiff < 0) + { + ydiff = -ydiff; + } + + if (xdiff >= CONFIG_TOUCHSCREEN_THRESHX || + ydiff >= CONFIG_TOUCHSCREEN_THRESHY) + { + /* There is some change above the threshold... Report the change. */ + + priv->sample.x = newx; + priv->sample.y = priv->newy; + priv->sample.valid = true; + + /* If this is the first (acknowledged) penddown report, then report + * this as the first contact. If contact == CONTACT_DOWN, it will be + * set to set to CONTACT_MOVE after the contact is first sampled. + */ + + if (priv->sample.contact != CONTACT_MOVE) + { + /* First contact */ + + priv->sample.contact = CONTACT_DOWN; + } + + /* Indicate the availability of new sample data for this ID */ + + priv->sample.id = priv->id; + priv->penchange = true; + + /* Notify any waiters that nes touchscreen data is available */ + + tc_notify(priv); + } + } + + /* Set up for the next poll */ + + priv->state = TC_READY; + delay = TC_PENDOWN_POLL_TICKS; + } + + /* Set up the next sample event */ + + ret = work_queue(HPWORK, &priv->work, tc_worker, priv, delay); + ASSERT(ret == 0); +} + +/**************************************************************************** + * Name: tc_open + ****************************************************************************/ + +static int tc_open(FAR struct file *filep) +{ +#ifdef CONFIG_TOUCHSCREEN_REFCNT + FAR struct inode *inode; + FAR struct tc_dev_s *priv; + uint8_t tmp; + int ret; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct tc_dev_s *)inode->i_private; + + /* Get exclusive access to the driver data structure */ + + ret = sem_wait(&priv->devsem); + if (ret < 0) + { + /* This should only happen if the wait was canceled by an signal */ + + DEBUGASSERT(errno == EINTR); + return -EINTR; + } + + /* Increment the reference count */ + + tmp = priv->crefs + 1; + if (tmp == 0) + { + /* More than 255 opens; uint8_t overflows to zero */ + + ret = -EMFILE; + goto errout_with_sem; + } + + /* When the reference increments to 1, this is the first open event + * on the driver.. and an opportunity to do any one-time initialization. + */ + + /* Save the new open count on success */ + + priv->crefs = tmp; + +errout_with_sem: + sem_post(&priv->devsem); + return ret; +#else + return OK; +#endif +} + +/**************************************************************************** + * Name: tc_close + ****************************************************************************/ + +static int tc_close(FAR struct file *filep) +{ +#ifdef CONFIG_TOUCHSCREEN_REFCNT + FAR struct inode *inode; + FAR struct tc_dev_s *priv; + int ret; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct tc_dev_s *)inode->i_private; + + /* Get exclusive access to the driver data structure */ + + ret = sem_wait(&priv->devsem); + if (ret < 0) + { + /* This should only happen if the wait was canceled by an signal */ + + DEBUGASSERT(errno == EINTR); + return -EINTR; + } + + /* Decrement the reference count unless it would decrement a negative + * value. When the count decrements to zero, there are no further + * open references to the driver. + */ + + if (priv->crefs >= 1) + { + priv->crefs--; + } + + sem_post(&priv->devsem); +#endif + return OK; +} + +/**************************************************************************** + * Name: tc_read + ****************************************************************************/ + +static ssize_t tc_read(FAR struct file *filep, FAR char *buffer, size_t len) +{ + FAR struct inode *inode; + FAR struct tc_dev_s *priv; + FAR struct touch_sample_s *report; + struct tc_sample_s sample; + int ret; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct tc_dev_s *)inode->i_private; + + /* Verify that the caller has provided a buffer large enough to receive + * the touch data. + */ + + if (len < SIZEOF_TOUCH_SAMPLE_S(1)) + { + /* We could provide logic to break up a touch report into segments and + * handle smaller reads... but why? + */ + + return -ENOSYS; + } + + /* Get exclusive access to the driver data structure */ + + ret = sem_wait(&priv->devsem); + if (ret < 0) + { + /* This should only happen if the wait was canceled by an signal */ + + DEBUGASSERT(errno == EINTR); + return -EINTR; + } + + /* Try to read sample data. */ + + ret = tc_sample(priv, &sample); + if (ret < 0) + { + /* Sample data is not available now. We would ave to wait to get + * receive sample data. If the user has specified the O_NONBLOCK + * option, then just return an error. + */ + + if (filep->f_oflags & O_NONBLOCK) + { + ret = -EAGAIN; + goto errout; + } + + /* Wait for sample data */ + + ret = tc_waitsample(priv, &sample); + if (ret < 0) + { + /* We might have been awakened by a signal */ + + goto errout; + } + } + + /* In any event, we now have sampled touchscreen data that we can report + * to the caller. + */ + + report = (FAR struct touch_sample_s *)buffer; + memset(report, 0, SIZEOF_TOUCH_SAMPLE_S(1)); + report->npoints = 1; + report->point[0].id = sample.id; + report->point[0].x = sample.x; + report->point[0].y = sample.y; + + /* Report the appropriate flags */ + + if (sample.contact == CONTACT_UP) + { + /* Pen is now up. Is the positional data valid? This is important to + * know because the release will be sent to the window based on its + * last positional data. + */ + + if (sample.valid) + { + report->point[0].flags = TOUCH_UP | TOUCH_ID_VALID | + TOUCH_POS_VALID | TOUCH_PRESSURE_VALID; + } + else + { + report->point[0].flags = TOUCH_UP | TOUCH_ID_VALID; + } + } + else + { + if (sample.contact == CONTACT_DOWN) + { + /* First contact */ + + report->point[0].flags = TOUCH_DOWN | TOUCH_ID_VALID | TOUCH_POS_VALID; + } + else /* if (sample->contact == CONTACT_MOVE) */ + { + /* Movement of the same contact */ + + report->point[0].flags = TOUCH_MOVE | TOUCH_ID_VALID | TOUCH_POS_VALID; + } + } + + ret = SIZEOF_TOUCH_SAMPLE_S(1); + +errout: + sem_post(&priv->devsem); + return ret; +} + +/**************************************************************************** + * Name:tc_ioctl + ****************************************************************************/ + +static int tc_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ +#if 1 + ivdbg("cmd: %d arg: %ld\n", cmd, arg); + return -ENOTTY; /* None yet supported */ +#else + FAR struct inode *inode; + FAR struct tc_dev_s *priv; + int ret; + + ivdbg("cmd: %d arg: %ld\n", cmd, arg); + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct tc_dev_s *)inode->i_private; + + /* Get exclusive access to the driver data structure */ + + ret = sem_wait(&priv->devsem); + if (ret < 0) + { + /* This should only happen if the wait was canceled by an signal */ + + DEBUGASSERT(errno == EINTR); + return -EINTR; + } + + /* Process the IOCTL by command */ + + switch (cmd) + { + /* ADD IOCTL COMMAND CASES HERE */ + + default: + ret = -ENOTTY; + break; + } + + sem_post(&priv->devsem); + return ret; +#endif +} + +/**************************************************************************** + * Name: tc_poll + ****************************************************************************/ + +#ifndef CONFIG_DISABLE_POLL +static int tc_poll(FAR struct file *filep, FAR struct pollfd *fds, + bool setup) +{ + FAR struct inode *inode; + FAR struct tc_dev_s *priv; + int ret; + int i; + + ivdbg("setup: %d\n", (int)setup); + DEBUGASSERT(filep && fds); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct tc_dev_s *)inode->i_private; + + /* Are we setting up the poll? Or tearing it down? */ + + ret = sem_wait(&priv->devsem); + if (ret < 0) + { + /* This should only happen if the wait was canceled by an signal */ + + DEBUGASSERT(errno == EINTR); + return -EINTR; + } + + if (setup) + { + /* Ignore waits that do not include POLLIN */ + + if ((fds->events & POLLIN) == 0) + { + idbg("Missing POLLIN: revents: %08x\n", fds->revents); + ret = -EDEADLK; + goto errout; + } + + /* This is a request to set up the poll. Find an available + * slot for the poll structure reference + */ + + for (i = 0; i < CONFIG_TOUCHSCREEN_NPOLLWAITERS; i++) + { + /* Find an available slot */ + + if (!priv->fds[i]) + { + /* Bind the poll structure and this slot */ + + priv->fds[i] = fds; + fds->priv = &priv->fds[i]; + break; + } + } + + if (i >= CONFIG_TOUCHSCREEN_NPOLLWAITERS) + { + idbg("No availabled slot found: %d\n", i); + fds->priv = NULL; + ret = -EBUSY; + goto errout; + } + + /* Should we immediately notify on any of the requested events? */ + + if (priv->penchange) + { + tc_notify(priv); + } + } + else if (fds->priv) + { + /* This is a request to tear down the poll. */ + + struct pollfd **slot = (struct pollfd **)fds->priv; + DEBUGASSERT(slot != NULL); + + /* Remove all memory of the poll setup */ + + *slot = NULL; + fds->priv = NULL; + } + +errout: + sem_post(&priv->devsem); + return ret; +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * configure the touchscreen device. This function will register the driver + * as /dev/inputN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ + FAR struct tc_dev_s *priv; + char devname[DEV_NAMELEN]; + int ret; + + ivdbg("minor: %d\n", minor); + DEBUGASSERT(minor >= 0 && minor < 100); + + /* Configure all touchscreen pins as inputs, undriven */ + + putreg32(LCD_ALL_BITS, PIC32MX_IOPORTB_TRISSET); + + /* Configure all pins for as digital. AD1PCFG specifies the configuration + * of device pins to be used as analog inputs. A pin is configured as an + * analog input when the corresponding PCFGn bit is 0. + */ + + putreg32(LCD_ALL_BITS, PIC32MX_ADC_CFGSET); + + /* Create and initialize a touchscreen device driver instance */ + +#ifndef CONFIG_TOUCHSCREEN_MULTIPLE + priv = &g_touchscreen; +#else + priv = (FAR struct tc_dev_s *)kmm_malloc(sizeof(struct tc_dev_s)); + if (!priv) + { + idbg("kmm_malloc(%d) failed\n", sizeof(struct tc_dev_s)); + return -ENOMEM; + } +#endif + + /* Initialize the touchscreen device driver instance */ + + memset(priv, 0, sizeof(struct tc_dev_s)); + sem_init(&priv->devsem, 0, 1); /* Initialize device structure semaphore */ + sem_init(&priv->waitsem, 0, 0); /* Initialize pen event wait semaphore */ + + /* Register the device as an input device */ + + (void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor); + ivdbg("Registering %s\n", devname); + + ret = register_driver(devname, &tc_fops, 0666, priv); + if (ret < 0) + { + idbg("register_driver() failed: %d\n", ret); + goto errout_with_priv; + } + + /* Schedule work to perform the initial sampling and to set the data + * availability conditions. + */ + + priv->state = TC_READY; + ret = work_queue(HPWORK, &priv->work, tc_worker, priv, 0); + if (ret != 0) + { + idbg("Failed to queue work: %d\n", ret); + goto errout_with_priv; + } + + /* And return success (?) */ + + return OK; + +errout_with_priv: + sem_destroy(&priv->devsem); +#ifdef CONFIG_TOUCHSCREEN_MULTIPLE + kmm_free(priv); +#endif + return ret; +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* Need to unregister the /dev/inputN device here. */ +} + +#endif /* CONFIG_INPUT */ diff --git a/configs/pic32mx7mmb/src/pic32_usbdev.c b/configs/pic32mx7mmb/src/pic32_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..75e4c4cff6be563a0327311cfe61af3d1cea14e7 --- /dev/null +++ b/configs/pic32mx7mmb/src/pic32_usbdev.c @@ -0,0 +1,162 @@ +/************************************************************************************ + * configs/pic32mx7mmb/src/pic32_usbdev.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include + +#include "pic32mx.h" +#include "pic32mx7mmb.h" + +#if defined(CONFIG_PIC32MX_USBDEV) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* + * PIN NAME SIGNAL NOTES + * ---- ------------------------------- -------------- ------------------------------ + * 20 VBUSON/C1IN+/AN5/CN7/RB5 VBUSON To USB VBUS circuitry + * 43 C2IN+/AN3/CN5/RB3 USB_PGOOD Power good (low if bad) + */ + +#define GPIO_USB_VBUSON (GPIO_INPUT|GPIO_PORTB|GPIO_PIN5) +#define GPIO_USB_PGOOD (GPIO_INPUT|GPIO_PORTB|GPIO_PIN3) + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_usbdevinitialize + * + * Description: + * Called to configure the mini-A/B J5 on the Mikroelektronika PIC32MX7 MMB for the + * USB device + * + ************************************************************************************/ + +void weak_function pic32mx_usbdevinitialize(void) +{ + /* Connect the PHY to the USB mini-B port. Order and timing matter! */ + + pic32mx_configgpio(GPIO_USB_PGOOD); + + /* Notes from the Sure Electronics sample code: + * + * "The USB specifications require that USB peripheral devices must never source + * current onto the Vbus pin. Additionally, USB peripherals should not source + * current on D+ or D- when the host/hub is not actively powering the Vbus line. + * When designing a self powered (as opposed to bus powered) USB peripheral + * device, the firmware should make sure not to turn on the USB module and D+ + * or D- pull up resistor unless Vbus is actively powered. Therefore, the + * firmware needs some means to detect when Vbus is being powered by the host. + * A 5V tolerant I/O pin can be connected to Vbus (through a resistor), and + * can be used to detect when Vbus is high (host actively powering), or low + * (host is shut down or otherwise not supplying power). The USB firmware + * can then periodically poll this I/O pin to know when it is okay to turn on + * the USB module/D+/D- pull up resistor. When designing a purely bus powered + * peripheral device, it is not possible to source current on D+ or D- when the + * host is not actively providing power on Vbus. Therefore, implementing this + * bus sense feature is optional. ..." + */ + +#ifdef CONFIG_USBHOST + //pic32mx_configgpio(GPIO_USB_VBUSON); +#endif + + /* "If the host PC sends a GetStatus (device) request, the firmware must respond + * and let the host know if the USB peripheral device is currently bus powered + * or self powered. See chapter 9 in the official USB specifications for details + * regarding this request. If the peripheral device is capable of being both + * self and bus powered, it should not return a hard coded value for this request. + * Instead, firmware should check if it is currently self or bus powered, and + * respond accordingly. If the hardware has been configured like demonstrated + * on the PICDEM FS USB Demo Board, an I/O pin can be polled to determine the + * currently selected power source. ..." + */ + +#ifdef CONFIG_USB_PWRSENSE + //pic32mx_configgpio(GPIO_USB_PWRSENSE); +#endif +} + +/************************************************************************************ + * Name: pic32mx_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB + * software connect and disconnect), then the board software must provide + * stm32_pullup. See include/nuttx/usb/usbdev.h for additional description + * of this method. Alternatively, if no pull-up GPIO the following EXTERN + * can be redefined to be NULL. + * + ************************************************************************************/ + +int pic32mx_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + /* The Mikroelektronika PIC32MX7 MMB does not have a USB pull-up */ + + return OK; +} + +/************************************************************************************ + * Name: pic32mx_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver + * is used. This function is called whenever the USB enters or leaves + * suspend mode. This is an opportunity for the board logic to shutdown + * clocks, power, etc. while the USB is suspended. + * + ************************************************************************************/ + +void pic32mx_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + /* Do nothing */ +} + +#endif /* CONFIG_PIC32MX_USBDEV */ diff --git a/configs/pic32mx7mmb/src/pic32_usbmsc.c b/configs/pic32mx7mmb/src/pic32_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..af40ad9bb4844d96e2afa14ce61db853dacafe4a --- /dev/null +++ b/configs/pic32mx7mmb/src/pic32_usbmsc.c @@ -0,0 +1,70 @@ +/**************************************************************************** + * configs/pic32mx7mmb/src/pic32_usbmsc.c + * + * Copyright (C) 2012, 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "pic32mx7mmb.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* If system/usbmsc is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see pic32_appinit.c). + * In this case, there is nothing further to be done here. + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS +# warning "Missing Logic" +#endif /* CONFIG_NSH_BUILTIN_APPS */ + + return 0; +} diff --git a/configs/pic32mx7mmb/src/pic32_usbterm.c b/configs/pic32mx7mmb/src/pic32_usbterm.c new file mode 100644 index 0000000000000000000000000000000000000000..5652d1ebc6c729fef233325d888dda07b1df806b --- /dev/null +++ b/configs/pic32mx7mmb/src/pic32_usbterm.c @@ -0,0 +1,105 @@ +/************************************************************************************ + * configs/pic32mx7mmb/src/pic32_usbterm.c + * + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include + +#include "pic32mx.h" +#include "pic32mx7mmb.h" + +#if defined(CONFIG_PIC32MX_USBDEV) && defined(CONFIG_EXAMPLES_USBTERM_DEVINIT) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: + * + * Description: + * If CONFIG_EXAMPLES_USBTERM_DEVINIT is defined, then the example will + * call this user provided function as part of its initialization. + * + ****************************************************************************/ + +int usbterm_devinit(void) +{ + /* The Mikroelektronika PIC32MX7 MMB has no way to know when the USB is + * connected. So we will fake it and tell the USB driver that the USB is + * connected now. + * + * If examples/usbterm is built as an NSH built-in application, then + * pic32mx_usbattach() will be called in board_app_initialize(). + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS + pic32mx_usbattach(); +#endif + return OK; +} + +/**************************************************************************** + * Name: + * + * Description: + * If CONFIG_EXAMPLES_USBTERM_DEVINIT is defined, then the example will + * call this user provided function as part of its termination sequence. + * + ****************************************************************************/ + +void usbterm_devuninit(void) +{ + /* Tell the USB driver that the USB is no longer connected */ + + pic32mx_usbdetach(); +} + +#endif /* CONFIG_PIC32MX_USBDEV && CONFIG_EXAMPLES_USBTERM_DEVINIT */ diff --git a/configs/pic32mx7mmb/src/pic32mx7mmb.h b/configs/pic32mx7mmb/src/pic32mx7mmb.h new file mode 100644 index 0000000000000000000000000000000000000000..4160779a7f88562bcf6ee1be0a3902f50c9209e5 --- /dev/null +++ b/configs/pic32mx7mmb/src/pic32mx7mmb.h @@ -0,0 +1,166 @@ +/**************************************************************************** + * configs/pic32mx7mmb/src/pic32mx7mmb.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MIKROELEKTRONIKA_PIC32MX7MMB_SRC_PIC32MX7MMB_H +#define __CONFIGS_MIKROELEKTRONIKA_PIC32MX7MMB_SRC_PIC32MX7MMB_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* The Mikroelektronika PIC32MX7 MMB has 3 user LEDs labeled LED0-2 in the + * schematics: + * + * --- ----- -------------------------------------------------------------- + * PIN Board Notes + * --- ----- -------------------------------------------------------------- + * RA0 LED0 Pulled-up, low value illuminates + * RA1 LED1 Pulled-up, low value illuminates + * RD9 LED2 Pulled-up, low value illuminates + * RA9 LED4 Not available for general use*, indicates MMC/SD activity + * --- LED5 Not controllable by software, indicates power-on + * + * * RA9 is also the SD chip select. It will illuminate whenever the SD card + * is selected. If SD is not used, then LED4 could also be used as a user- + * controlled LED. + */ + +/* The Mikroelektronika PIC32MX7 MMB has a joystick: + * + * ------ -------- ------------------------- -------------------------------- + * GPIO SIGNAL BOARD CONNECTION NOTES + * ------ -------- ------------------------- -------------------------------- + * RB0 JOY-A Joystick A, HDR1 pin 24 Pulled up, low value when closed + * RB2 JOY-C Joystick C, HDR1 pin 22 Pulled up, low value when closed + * RB1 JOY-B Joystick B, HDR1 pin 23 Pulled up, low value when closed + * RB3 JOY-D Joystick D, HDR1 pin 21 Pulled up, low value when closed + * RA10 JOY-CP Joystick CP, HDR1 pin 25 Pulled up, low value when closed + */ + +/* LCD + * + * ------ -------- ------------------------- -------------------------------- + * GPIO SIGNAL BOARD CONNECTION NOTES + * ------ -------- ------------------------- -------------------------------- + * RD2 LCD-BLED Backlight Light Low value turns off + */ + +/* SPI1 and SD Card + * + * ------ -------- ------------------------- -------------------------------- + * GPIO SIGNAL BOARD CONNECTION NOTES + * ------ -------- ------------------------- -------------------------------- + * RC4 SPI1 SD card slot SPI1 data IN + * RD0 SPO1 SD card slot SPI1 data OUT + * RD10 SCK1 SD card slot SD card, SPI clock + * + * RA9 SD_CS# SD card slot SD card, SPI chip select (active low) + * RG6 SD_WP SD card slot SD card, write protect + * RG7 SD_CD# SD card slot SD card, card detect (not) + */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Name: pic32mx_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Mikroelektronika PIC32MX7 + * MMB board. + * + ************************************************************************************/ + +#if defined(CONFIG_PIC32MX_SPI1) || defined(CONFIG_PIC32MX_SPI2) || \ + defined(CONFIG_PIC32MX_SPI3) || defined(CONFIG_PIC32MX_SPI4) +void weak_function pic32mx_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: pic32mx_led_initialize + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void pic32mx_led_initialize(void); +#endif + +/**************************************************************************** + * Name: pic32mx_lcdinitialize + * + * Description: + * Initialize the LCD. This function should be called early in the boot + * sequence -- even if the LCD is not enabled. In that case we should + * at a minimum at least disable the LCD backlight. + * + ****************************************************************************/ + +void pic32mx_lcdinitialize(void); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MIKROELEKTRONIKA_PIC32MX7MMB_SRC_PIC32MX7MMB_H */ diff --git a/configs/pic32mz-starterkit/Kconfig b/configs/pic32mz-starterkit/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..7b556af38c063ae60e8a009f08ca895e7918cd0f --- /dev/null +++ b/configs/pic32mz-starterkit/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_PIC32MZ_STARTERKIT +endif diff --git a/configs/pic32mz-starterkit/README.txt b/configs/pic32mz-starterkit/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..4166a4728f6054798ee6e3d355b7d9c98e1e09fa --- /dev/null +++ b/configs/pic32mz-starterkit/README.txt @@ -0,0 +1,404 @@ +configs/pic32mz-starterkit README +=============================== + +This README file discusses the port of NuttX to the Microchip PIC32MZ +Embedded Connectivity (EC) Starter Kit. + +Contents +======== + + Port Status + Board Overview + On Board Debug Support + Creating Compatible NuttX HEX files + Tool Issues + Serial Console + LEDs + Configurations + +Port Status +=========== + + As of this writing (2015-03-01), the basic port is complete including + minimal support for the NuttShell (NSH) over UART1. No testing has yet + been performed due to seemingly insurmountable debug problems: + + Thusfar, no one has been successful using NuttX with MPLABX. All + debug is being performed using a J-Link debugger via some custom + interconnect boards. + + Patches were provided by Kristopher Tate on 2015-03-21 that support the + serial console with the NuttShell, completing the basic bring-up. + +Board Overview +============== + +There are two configurations of the Microchip PIC32MZ Embedded Connectivity +(EC) Starter Kit: + + 1) The PIC32MZ Embedded Connectivity Starter Kit based on the + PIC32MZ2048ECH144-I/PH chip (DM320006), and + 2) The PIC32MZ Embedded Connectivity Starter Kit based on the + PIC32MZ2048ECM144-I/PH w/Crypto Engine (DM320006-C) + +See www.microchip.com for further information. + +Key features of the PIC32MZ Starter Kit include; + + * On-board crystal or oscillator for precision microcontroller clocking + (24 MHz). + * 32 kHz oscillator for RTCC and Timer1 (optional). + * Three push button switches for user-defined inputs. + * Three user-defined indicator LEDs. + * USB Type A receptacle connectivity for PIC32 host-based applications. + * USB Type micro-AB receptacle for OTG and USB device connectivity for + PIC32 OTG/device-based applications. + * Daughter board connectors for flexible Ethernet PHY options. + * 50 MHz Ethernet PHY oscillator. + * External 4 GB SQI memory for expanded memory applications. + * PIC24FJ256GB106 USB microcontroller for on-board debugging. + * USB connectivity for on-board debugger communications. + * Regulated +3.3V power supply for powering the starter kit through USB or + expansion board. + * Connector for various expansion boards. + +The PIC32MZ starter kit comes complete with a LAN8740 PHY daughter board. + +Testing was performed with the following additional hardware: + +- Microchip PIC32MZ Embedded Connectivity (EC) Adapter Board (AC320006) + that allows connection of the PIC32MZEC Starter Kit to the Microchip + Multimedia Expansion Board (MEB, DM320005) or PIC32 I/O Expansion Board + (DM320002). These were previously used with the PIC32MX bringup. +- Microchip Multimedia Expansion Board II (MEB II, DM320005-2). + +On Board Debug Support +====================== + + The starter kit includes a PIC24FJ256GB106 USB microcontroller that + provides debugger connectivity over USB. The PIC24FJ256GB106 is hard-wired + to the PIC32 device to provide protocol translation through the I/O pins + of the PIC24FJ256GB106 to the ICSP™ pins of the PIC32 device. + + If MPLAB® REAL ICE™ or MPLAB ICD 3 is used with the starter kit, + disconnect the onboard debugger from the PIC32 device by removing the + jumper JP2. When the on-board debugger is required, replace the jumper + JP2. When the jumper JP2 is installed, pin 1 must be connected to pin 3 + and pin 2 must be connected to pin 4. + +Creating Compatible NuttX HEX files +=================================== + + Intel Hex Format Files: + ----------------------- + + When NuttX is built it will produce two files in the top-level NuttX + directory: + + 1) nuttx - This is an ELF file, and + 2) nuttx.hex - This is an Intel Hex format file. This is controlled by + the setting CONFIG_INTELHEX_BINARY in the .config file. + + The PICkit tool wants an Intel Hex format file to burn into FLASH. However, + there is a problem with the generated nutt.hex: The tool expects the nuttx.hex + file to contain physical addresses. But the nuttx.hex file generated from the + top-level make will have address in the KSEG0 and KSEG1 regions. + + tools/pic32mx/mkpichex: + ---------------------- + + There is a simple tool in the NuttX tools/pic32mx directory that can be + used to solve both issues with the nuttx.hex file. But, first, you must + build the tool: + + cd tools/pic32mx + make + + Now you will have an excecutable file call mkpichex (or mkpichex.exe on + Cygwin). This program will take the nutt.hex file as an input, it will + convert all of the KSEG0 and KSEG1 addresses to physical address, and + it will write the modified file, replacing the original nuttx.hex. + + To use this file, you need to do the following things: + + . ./setenv.sh # Source setenv.sh. Among other this, this script + # will add the NuttX tools/pic32mx directory to your + # PATH variable + make # Build nuttx and nuttx.hex + mkpichex $PWD # Convert addresses in nuttx.hex. $PWD is the path + # to the top-level build directory. It is the only + # required input to mkpichex. + +Tool Issues +=========== + + Pinquino Toolchain + ------------------ + If you use the Pinguino toolchain, you will probably see this error: + + C:\pinguino-11\compilers\p32\bin\p32-ld.exe: target elf32-tradlittlemips not found + + This is due to linker differences in the toolchains. The linker script + at configs/pic32mz-starterkit has: + + OUTPUT_FORMAT("elf32-tradlittlemips") + + This error can be eliminated with the Pinguino toolchain by changing this to: + + OUTPUT_FORMAT("elf32-littlemips") + + Mentor Toolchain + ---------------- + + https://sourcery.mentor.com/GNUToolchain/release2934 tools. + + If you use this toolchain, you will need to add CROSSDEV=mips-sde-elf- to + your Make.defs file. + + ICD3 + ---- + The onboard debugger is Slow and one is better off using an ICD3. By removing + jumper JP2, I can disable the on-board OpenHCD debugger an enable the RJ11 + debug connector. My ICD 3 does seems to work properly using this configuration, + at least in the sense that it is recognized by both MPLABX IDE and IPE. + + Segger J-Link + ------------- + If using a Jlink that only these versions work with PIC32: + + J-Link BASE / EDU V9 or later + J-Link ULTRA+ / PRO V4 or later + + Oddly, you must use the G version in the command: + + JLinkGDBServer -device PIC32MZ2048ECG144 -if 2-wire-JTAG-PIC32 -speed 12000 + + Even though we have PIC32MZ2048ECM144 parts on our board. (JLinkGDBServer + will except anything and just mess up your weekend) + +Serial Console +============== + + MEB-II + ------ + By default, the UART1 is configured for the pins used by the MEB-II + board. The UART1 signals are available at the MEB-II PICTail + connector: + + --------------- --------- -------------- ------------ + PIC32MZ PIN CONNECTOR MEB-II PIN PICTAIL PIN + FUNCTION J1 NAME J2 + --------------- --------- -------------- ------------ + RPA14/SCL1/RA14 124 SCL1/TOUCH_SCL 4 + RPA15/SDA1/RA15 126 SDA1/TOUCH_SDA 6 + +3.3V 1,26 + GND 28 + --------------- --------- -------------- ------------ + + This pin selection is controlled by these definitions in + pic32mz-starterkit/include/board.h: + + #define BOARD_U1RX_PPS U1RXR_RPA14 + #define BOARD_U1TX_PPS U1TX_RPA15R + + PIC32MX I/O Expansion Board with Adapter Board + ------------------------------------------ + If the MEB-II UART configuration when used with the I/O Expansion board + (with the adapter), then UART will be on J11 with Pin 35 being U1RX (into + MZ) and Pin 37 being TU1X (out od MZ). + + Directly from the Adapter Board + ------------------------------- + But you can get serial port directly from the PIC32MZ Embedded + Connectivity (EC) Adapter Board (AC320006). The Microchip + adapter board brings out UART signals as follows: + + JP7 redirects J1 U3_TX to either J2 SOSCO/RC14 or U1_TX: + + Adapter + ----------------------------------------------------------------------- + JP7, Pin 1: J2 Pin 32, SOSCO/RC14 + Pin 2: J1 Pin 17, U3_TX + Pin 3: J2 Pin 90, U1_TX + + PIC32MZ Starter Kit + ----------------------------------------------------------------------- + J1 Pin 17, SOSCO/RC14 PIC32MZ SOSCO/RPC14/T1CK/RC14 + + RPC14 supports U1RX, U4RX, and U3TX + + JP8 redirects J1 RB3/AN3/SDO4/WIFI_SDI to either J2 AN3/SDO4/WIFI_SDI or U3_RX: + + Adapter PIC32MZ Starter Kit + ---------------------------------------------- ------------------------- + JP8, Pin 1: J2, Pin 66, AN3/SDO4/WIFI_SDI + Pin 2: J1, Pin 105, RB3/AN3/SDO4/WIFI_SDI + Pin 3: J2, Pin 88, U3_RX + + PIC32MZ Starter Kit + ----------------------------------------------------------------------- + J1, Pin 105, AN3/C2INA/RPB3/RB3 + + RPB3 supports U3RX, U1TX, and U5TX + + Thus UART1 or UART3 could be used as a serial console if only the + PIC32MZEC Adapter Board is connected. + + The default serial configuration here in these configurations is UART1 + using RPC14 and RPB3. That UART selection can be change by running 'make + menuconfig'. The UART pin selections would need to be changed by editing + configs/pc32mz-starterkit/include/board.h. + + If using a AC320006 by itself, JP7 pin 2 and JP8 pin 2 is where you would + connect a 3.3 Volt TTL serial interface. + + For a configuration using UART1 connect: + TX to AC320006-JP7 pin 2 which is PIC32MZ pin 106 (RPC14) used as U1RX + RX to AC320006-JP8 pin 2 which is PIC32MZ pin 31 (RPB3)) used as U1TX + + For a configuration using For UART3 connect: + TX to AC320006-JP8 pin 2 which is PIC32MZ pin 31 (RPB3)) used as U3RX + RX to AC320006-JP7 pin 2 which is PIC32MZ pin 106 (RPC14) used as U3TX + + If using a AC320006 plugged into a DM320002 then regardless of which UART, + UART1 or UART3 is configured in software, the jumpers on the AC320006 are + the same, just the signal directions and UART changes. + + UART1 UART3 + AC320006-JP7 connect pin 2 to pin 3. U1RX U3TX + AC320006-JP8 connect pin 2 to pin 3. U1TX U3RX + + For the default configuration using UART1 the PIC32MZ pin 106 (RPC14) + will be configured as U1RX and is tied to the AC320006's JP7 Pin 2. + With the jumpers as listed above, once the AC320006 is plugged into + the DM320002, the PIC32MZ U1RX will be connected to the DM320002's + J11 pin 43. The DM320002's J11 pin 43 should then be connected to + the TX of a 3.3 volt TTL serial converter such as a FTDI TTL232RG. + For the FTDI TTL232RG TX is the orange wire. + + Likewise the PIC32MZ pin 31 (RPB3) will be configured as U1TX and + is tied to the AC320006's JP8 Pin 2. With the jumpers as listed above, + once the AC320006 is plugged into the DM320002, the PIC32MZ' U1TX will + be connected to the DM320002's J11 pin 41. The DM320002's J11 pin 41 + should then be connected to the RX signal of a 3.3 volt TTL serial + converter. For the FTDI TTL232RG RX is the yellow wire. + + For the alternate configuration using UART3 the PIC32MZ pin 106 (RPC14) + will be configured as U3TX and is tied to the AC320006's JP7 Pin 2. + With the jumpers as listed above, once the AC320006 is plugged into + the DM320002, the PIC32MZ U3TX will be connected to the DM320002's + J11 pin 43. The DM320002's J11 pin 43 should then be connected to + the RX of a 3.3 volt TTL serial converter such as a FTDI TTL232RG. + For the FTDI TTL232RG TX is the yellow wire. + + Likewise the PIC32MZ pin 31 (RPB3) will be configured as U3RX and + is tied to the AC320006's JP8 Pin 2. With the jumpers as listed above, + once the AC320006 is plugged into the DM320002, the PIC32MZ' U3RX will + be connected to the DM320002's J11 pin 41. The DM320002's J11 pin 41 + should then be connected to the TX signal of a 3.3 volt TTL serial + converter. For the FTDI TTL232RG RX is the orange wire. + + board.h Header File Changes + --------------------------- + The board configuration is currently set up to use the Serial console + on the MEB-II board. If you want to use the adapter board directly, + you willneed to change pic32mz-starterkit/include/board.h as follows: + + -#define BOARD_U1RX_PPS U1RXR_RPA14 + -#define BOARD_U1TX_PPS U1TX_RPA15R + +#define BOARD_U1RX_PPS U1RXR_RPC14 + +#define BOARD_U1TX_PPS U1TX_RPB3R + +LEDs and Buttons +================ + + LEDs + ---- + The PIC32MZ Ethernet Starter kit has 3 user LEDs labelled LED1-3 on the + board: + + PIN LED Notes + --- ----- ------------------------- + RH0 LED1 High illuminates (RED) + RH1 LED3 High illuminates (YELLOW) + RH2 LED2 High illuminates (GREEN) + + If CONFIG_ARCH_LEDS is defined, then NuttX will control these LEDs as + follows: + + ON OFF + ------------------------- ---- ---- ---- ---- ---- ---- + LED1 LED2 LED3 LED1 LED2 LED3 + ------------------------- ---- ---- ---- ---- ---- ---- + LED_STARTED 0 OFF OFF OFF --- --- --- + LED_HEAPALLOCATE 1 ON OFF N/C --- --- --- + LED_IRQSENABLED 2 OFF ON N/C --- --- --- + LED_STACKCREATED 3 ON ON N/C --- --- --- + LED_INIRQ 4 N/C N/C ON N/C N/C OFF + LED_SIGNAL 4 N/C N/C ON N/C N/C OFF + LED_ASSERTION 4 N/C N/C ON N/C N/C OFF + LED_PANIC 5 ON N/C N/C OFF N/C N/C + + Buttons + ------- + + The PIC32MZ Ethernet Starter kit has 3 user push buttons labelled SW1-3 on + the board: + + PIN LED Notes + ---- ---- ------------------------- + RB12 SW1 Active-low + RB13 SW2 Active-low + RB14 SW3 Active-low + + The switches do not have any debounce circuitry and require internal pull- + up resistors. When Idle, the switches are pulled high (+3.3V), and they + are grounded when pressed. + +Configurations +============== + +Each PIC32MZ configuration is maintained in a sub-directory and can be +selected as follow: + + cd tools + ./configure.sh pic32mz-starterkit/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + + This is the NuttShell (NSH) using the NSH startup logic at + apps/examples/nsh. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Serial Output + + The OS test produces all of its test output on the serial console. + This configuration has UART1 enabled as a serial console. This + can easily be changed by reconfiguring with 'make menuconfig'. + + 3. Toolchain + + By default, the Pinguino MIPs tool chain is used. This toolchain + selection can easily be changed with 'make menuconfig'. + + 4. Default configuration: These are other things that you may want to + change in the configuration: + + CONFIG_ARCH_CHIP_PIC32MZ2048ECM=y : Assumes part with Crypto Engine + CONFIG_PIC32MZ_DEBUGGER_ENABLE=n : Debugger is disabled + CONFIG_PIC32MZ_TRACE_ENABLE=n : Trace is disabled + CONFIG_PIC32MZ_JTAG_ENABLE=n : JTAG is disabled diff --git a/configs/pic32mz-starterkit/include/board.h b/configs/pic32mz-starterkit/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..3259ce2c32f5b40079d34d6a7e2ca59028df0460 --- /dev/null +++ b/configs/pic32mz-starterkit/include/board.h @@ -0,0 +1,316 @@ +/**************************************************************************** + * configs/pic32mz-starterkit/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_SURE_PIC32MZ_INCLUDE_BOARD_H +#define __CONFIGS_SURE_PIC32MZ_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Clocking *****************************************************************/ +/* Crystal frequencies + * + * - A 24 MHz oscillator circuit (Y4) is connected to the on-board + * microcontroller. This oscillator circuit functions as the controller’s + * primary oscillator. Depending on which is populated on the starter kit + * board, a 24 MHz crystal (Y1) may be used instead of Y4. + * - The starter kit also has provisions for an external secondary 32 kHz + * oscillator (Y2); however, this is not populated. + */ + +#define BOARD_POSC_FREQ 24000000 /* Primary OSC XTAL frequency (Y4, 24MHz) */ +#define BOARD_SOSC_FREQ 32000 /* Secondary OSC XTAL frequency (Y2, 32KHz) */ + +/* Oscillator modes. + * + * - BOARD_POSC_ECMODE: An external oscillator is connected to OSC1/OSC2 + * - BOARD_POSC_HSMODE: An external crystal or resonator is connected to + * OSC1/OSC2 + */ + +#define BOARD_FNOSC_SPLL 1 /* Use system PLL */ +#define BOARD_POSC_ECMODE 1 /* External clock (EC) mode */ +#define BOARD_POSC_SWITCH 1 /* Enable clock switching */ +#undef BOARD_POSC_FSCM /* Disable clock monitoring */ + +/* PLL configuration and resulting CPU clock. + * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV + */ + +#define BOARD_PLL_INPUT BOARD_POSC_FREQ +#define BOARD_PLL_IDIV 3 /* PLL input divider */ +#define BOARD_PLL_MULT 50 /* PLL multiplier */ +#define BOARD_PLL_ODIV 2 /* PLL output divider */ + +#define BOARD_CPU_CLOCK 200000000 /* CPU clock: 200MHz = (24MHz / 3) * 50 / 2) */ + +/* Peripheral clocks */ +/* PBCLK1 + * Peripherals: OSC2 pin + * + * NOTES: + * - PBCLK1 is used by system modules and cannot be turned off + * - PBCLK1 divided by 2 is available on the OSC2 pin in certain clock + * modes. + */ + +#define BOARD_PB1DIV 5 /* Divider = 5 */ +#define BOARD_PBCLK1 40000000 /* PBCLK1 frequency = 200MHz/5 = 40MHz */ + +/* PBCLK2 + * Peripherals: PMP, I2C, UART, SPI + */ + +#define BOARD_PBCLK2_ENABLE 1 /* Enable PBCLK2 */ +#define BOARD_PB2DIV 2 /* Divider = 2 */ +#define BOARD_PBCLK2 100000000 /* PBCLK2 frequency = 200MHz/2 = 100MHz */ + +/* PBCLK3 + * Peripherals: ADC, Comparator, Timers, Output Compare, Input Compare + * + * NOTES: + * - Timer 1 uses SOSC + */ + +#define BOARD_PBCLK3_ENABLE 1 /* Enable PBCLK3 */ +#define BOARD_PB3DIV 4 /* Divider = 4 */ +#define BOARD_PBCLK3 50000000 /* PBCLK3 frequency = 200MHz/4 = 50MHz */ + +/* PBCLK4 + * Peripherals: Ports + */ + +#define BOARD_PBCLK4_ENABLE 1 /* Enable PBCLK4 */ +#define BOARD_PB4DIV 2 /* Divider = 2 */ +#define BOARD_PBCLK4 100000000 /* PBCLK4 frequency = 200MHz/2 = 100MHz */ + +/* PBCLK5 + * Peripherals: Flash, Crypto, RND, USB, CAN, Ethernet, SQI + * + * NOTES: + * - PBCLK5 is used to fetch data from/to the Flash Controller, while the + * FRC clock is used for programming + */ + +#define BOARD_PBCLK5_ENABLE 1 /* Enable PBCLK5 */ +#define BOARD_PB5DIV 2 /* Divider = 2 */ +#define BOARD_PBCLK5 100000000 /* PBCLK5 frequency = 200MHz/2 = 100MHz */ + + +/* PBCLK6 + * Peripherals: + */ + +#undef BOARD_PBCLK6_ENABLE + +/* PBCLK7 + * Peripherals: CPU, Deadman timer + */ + +#undef BOARD_PBCLK7_ENABLE + +/* PBCLK8 + * Peripherals: EBI + */ + +#undef BOARD_PBCLK8_ENABLE + +/* Watchdog pre-scaler (re-visit) */ + +#define BOARD_WD_PRESCALER 1048576 /* Watchdog pre-scaler */ + +/* Ethernet MII clocking. + * + * The clock divider used to create the MII Management Clock (MDC). The MIIM + * module uses the PBCLK5 as an input clock. According to the IEEE 802.3 + * Specification this should be no faster than 2.5 MHz. However, some PHYs + * support clock rates up to 12.5 MHz. + */ + +#define BOARD_EMAC_MIIM_DIV 40 /* Ideal: 100MHz/40 = 2.5MHz */ + +/* LED definitions **********************************************************/ +/* LED Configuration ********************************************************/ +/* The PIC32MZ Ethernet Starter kit has 3 user LEDs labelled LED1-3 on the + * board: + * + * PIN LED Notes + * --- ----- ------------------------- + * RH0 LED1 High illuminates (RED) + * RH1 LED3 High illuminates (YELLOW) + * RH2 LED2 High illuminates (GREEN) + */ + +/* LED index values for use with board_userled() */ + +#define PIC32MZ_STARTERKIT_LED1 0 +#define PIC32MZ_STARTERKIT_LED2 1 +#define PIC32MZ_STARTERKIT_LED3 2 +#define PIC32MZ_STARTERKIT_NLEDS 3 + +/* LED bits for use with board_userled_all() */ + +#define PIC32MZ_STARTERKIT_LED1_BIT (1 << PIC32MZ_STARTERKIT_LED1) +#define PIC32MZ_STARTERKIT_LED2_BIT (1 << PIC32MZ_STARTERKIT_LED2) +#define PIC32MZ_STARTERKIT_LED3_BIT (1 << PIC32MZ_STARTERKIT_LED3) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 3 LEDs + * on board the Ethernet Starter Kit. The following definitions + * describe how NuttX controls the LEDs: + * + * ON OFF + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED1 LED2 LED3 LED1 LED2 LED3 + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED_STARTED 0 OFF OFF OFF --- --- --- + * LED_HEAPALLOCATE 1 ON OFF N/C --- --- --- + * LED_IRQSENABLED 2 OFF ON N/C --- --- --- + * LED_STACKCREATED 3 ON ON N/C --- --- --- + * LED_INIRQ 4 N/C N/C ON N/C N/C OFF + * LED_SIGNAL 4 N/C N/C ON N/C N/C OFF + * LED_ASSERTION 4 N/C N/C ON N/C N/C OFF + * LED_PANIC 5 ON N/C N/C OFF N/C N/C + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 4 +#define LED_ASSERTION 4 +#define LED_PANIC 5 + +#define LED_NVALUES 6 + +/* Switch definitions *******************************************************/ +/* The PIC32MZ Ethernet Starter kit has 3 user push buttons labelled SW1-3 + * on the board: + * + * PIN LED Notes + * ---- ---- ------------------------- + * RB12 SW1 Active-low + * RB13 SW2 Active-low + * RB14 SW3 Active-low + * + * The switches do not have any debounce circuitry and require internal pull- + * up resistors. When Idle, the switches are pulled high (+3.3V), and they + * are grounded when pressed. + */ + +#define BUTTON_SW1 0 +#define BUTTON_SW2 1 +#define BUTTON_SW3 2 +#define NUM_BUTTONS 3 + +#define BUTTON_SW1_BIT (1 << BUTTON_SW1) +#define BUTTON_SW2_BIT (1 << BUTTON_SW2) +#define BUTTON_SW3_BIT (1 << BUTTON_SW3) + +/* UARTS ********************************************************************/ +/* MEB-II + * + * By default, the UART1 is configured for the pins used by the MEB-II + * board. The UART1 signals are available at the MEB-II PICTail + * connector: + * + * --------------- --------- -------------- ------------ + * PIC32MZ PIN CONNECTOR MEB-II PIN PICTAIL PIN + * FUNCTION J1 NAME J2 + * --------------- --------- -------------- ------------ + * RPA14/SCL1/RA14 124 SCL1/TOUCH_SCL 4 + * RPA15/SDA1/RA15 126 SDA1/TOUCH_SDA 6 + * +3.3V 1,26 + * GND 28 + * --------------- --------- -------------- ------------ + * + * The following pin assignment is used with the MEB-II board. If you are + * using signals from PIC32MZEC Adaptor Board (as described in the the README + * file), then UART1 signals are available at these locations on the adaptor + * board: + * + * JP7 Pin 2: RPC14 + * JP8 Pin 2: RPB3 + * + * And the following should be changed to: + * + * #define BOARD_U1RX_PPS U1RXR_RPC14 + * #define BOARD_U1TX_PPS U1TX_RPB3R + */ + +#define BOARD_U1RX_PPS U1RXR_RPA14 +#define BOARD_U1TX_PPS U1TX_RPA15R + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SURE_PIC32MZ_INCLUDE_BOARD_H */ diff --git a/configs/pic32mz-starterkit/nsh/Make.defs b/configs/pic32mz-starterkit/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..83d48045e88a5ef091d6ba43366880447c576656 --- /dev/null +++ b/configs/pic32mz-starterkit/nsh/Make.defs @@ -0,0 +1,138 @@ +############################################################################ +# configs/pic32mz-starterkit/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/mips/src/mips32/Toolchain.defs + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_GNU_ELF),y) + LDSCRIPT = mips-debug.ld +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_PINGUINOW),y) + LDSCRIPT = pinguino-debug.ld +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_XC32),y) + LDSCRIPT = xc32-debug.ld + MIPS_MPROCESSOR = 32MZ2048ECM144 +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_XC32),y) + LDSCRIPT = xc32-debug.ld + MIPS_MPROCESSOR = 32MZ2048ECM144 +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW),y) + LDSCRIPT = c32-debug.ld +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE),y) + LDSCRIPT = c32-debug.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_XC32),y) +ifeq ($(CONFIG_DEBUG),y) + ARCHCFLAGS += -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist +endif +endif + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_XC32),y) + LDFLAGS = -nostdlib --defsym=__MPLAB_BUILD=1 --defsym=__MPLAB_DEBUG=1 --defsym=__DEBUG=1 --defsym=__MPLAB_DEBUGGER_PK3=1 --defsym=_min_heap_size=0 --gc-sections +else + LDFLAGS = # -no-isn32 --relax +endif + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/pic32mz-starterkit/nsh/defconfig b/configs/pic32mz-starterkit/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..983aa7508629a940dcb539f7ff898df9002c14e6 --- /dev/null +++ b/configs/pic32mz-starterkit/nsh/defconfig @@ -0,0 +1,827 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +CONFIG_ARCH_MIPS=y +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="mips" +CONFIG_ARCH_FAMILY="mips32" +CONFIG_ARCH_CHIP="pic32mz" +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_ARCH_CHIP_PIC32MX is not set +CONFIG_ARCH_CHIP_PIC32MZ=y +CONFIG_ARCH_MIPS32=y +# CONFIG_ARCH_MIPS_24KC is not set +CONFIG_ARCH_MIPS_M14K=y +CONFIG_ARCH_HAVE_MICROMIPS=y +CONFIG_MIPS_MICROMIPS=y + +# +# MIPS32 Configuration Options +# +# CONFIG_MIPS32_TOOLCHAIN_GNU_ELF is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_XC32 is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE is not set +CONFIG_MIPS32_TOOLCHAIN_PINGUINOW=y +# CONFIG_MIPS32_FRAMEPOINTER is not set + +# +# PIC32MZ Configuration Options +# +# CONFIG_ARCH_CHIP_PIC32MZ2048ECH is not set +CONFIG_ARCH_CHIP_PIC32MZ2048ECM=y +CONFIG_ARCH_CHIP_PIC32MZEC=y +# CONFIG_PIC32MZ_MVEC is not set +# CONFIG_PIC32MZ_SPI is not set +CONFIG_PIC32MZ_T1=y + +# +# PIC32MZ Peripheral Support +# +# CONFIG_PIC32MZ_WDT is not set +# CONFIG_PIC32MZ_T2 is not set +# CONFIG_PIC32MZ_T3 is not set +# CONFIG_PIC32MZ_T4 is not set +# CONFIG_PIC32MZ_T5 is not set +# CONFIG_PIC32MZ_T6 is not set +# CONFIG_PIC32MZ_T7 is not set +# CONFIG_PIC32MZ_T8 is not set +# CONFIG_PIC32MZ_T9 is not set +# CONFIG_PIC32MZ_IC1 is not set +# CONFIG_PIC32MZ_IC2 is not set +# CONFIG_PIC32MZ_IC3 is not set +# CONFIG_PIC32MZ_IC4 is not set +# CONFIG_PIC32MZ_IC5 is not set +# CONFIG_PIC32MZ_OC1 is not set +# CONFIG_PIC32MZ_OC2 is not set +# CONFIG_PIC32MZ_OC3 is not set +# CONFIG_PIC32MZ_OC4 is not set +# CONFIG_PIC32MZ_OC5 is not set +# CONFIG_PIC32MZ_I2C1 is not set +# CONFIG_PIC32MZ_I2C2 is not set +# CONFIG_PIC32MZ_I2C3 is not set +# CONFIG_PIC32MZ_I2C4 is not set +# CONFIG_PIC32MZ_I2C5 is not set +# CONFIG_PIC32MZ_SPI1 is not set +# CONFIG_PIC32MZ_SPI2 is not set +# CONFIG_PIC32MZ_SPI3 is not set +# CONFIG_PIC32MZ_SPI4 is not set +# CONFIG_PIC32MZ_SPI5 is not set +# CONFIG_PIC32MZ_SPI6 is not set +CONFIG_PIC32MZ_UART1=y +# CONFIG_PIC32MZ_UART2 is not set +# CONFIG_PIC32MZ_UART3 is not set +# CONFIG_PIC32MZ_UART4 is not set +# CONFIG_PIC32MZ_UART5 is not set +# CONFIG_PIC32MZ_UART6 is not set +# CONFIG_PIC32MZ_ADC is not set +# CONFIG_PIC32MZ_PMP is not set +# CONFIG_PIC32MZ_CM1 is not set +# CONFIG_PIC32MZ_CM2 is not set +# CONFIG_PIC32MZ_CM3 is not set +# CONFIG_PIC32MZ_RTCC is not set +# CONFIG_PIC32MZ_DMA is not set +# CONFIG_PIC32MZ_FLASH is not set +# CONFIG_PIC32MZ_USBDEV is not set +# CONFIG_PIC32MZ_USBHOST is not set +# CONFIG_PIC32MZ_CAN1 is not set +# CONFIG_PIC32MZ_CAN2 is not set +# CONFIG_PIC32MZ_ETHERNET is not set +# CONFIG_PIC32MZ_CTMU is not set +# CONFIG_PIC32MZ_GPIOIRQ is not set +# CONFIG_PIC32MZ_T1_SOSC is not set + +# +# Device Configuration 0 (DEVCFG0) +# +# CONFIG_PIC32MZ_DEBUGGER_ENABLE is not set +# CONFIG_PIC32MZ_JTAG_ENABLE is not set +CONFIG_PIC32MZ_ICESEL_CH2=y +# CONFIG_PIC32MZ_TRACE_ENABLE is not set +CONFIG_PIC32MZ_ECC_OPTION=3 + +# +# Device Configuration 1 (DEVCFG1) +# +CONFIG_PIC32MZ_OSCIOFNC=1 +# CONFIG_PIC32MZ_WDTENABLE is not set + +# +# Device Configuration 3 (DEVCFG3) +# +CONFIG_PIC32MZ_USERID=0x584e +CONFIG_PIC32MZ_FMIIEN=1 +CONFIG_PIC32MZ_PGL1WAY=0 +CONFIG_PIC32MZ_PMDL1WAY=0 +CONFIG_PIC32MZ_IOL1WAY=0 +CONFIG_PIC32MZ_FETHIO=1 +CONFIG_PIC32MZ_FUSBIDIO=0 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +CONFIG_ARCH_VECNOTIRQ=y +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=7245 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0xa0000000 +CONFIG_RAM_SIZE=131072 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_PIC32MZ_STARTERKIT=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="pic32mz-starterkit" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=7 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/pic32mz-starterkit/nsh/setenv.sh b/configs/pic32mz-starterkit/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..255d73293f43f5c79d1f8eddd509c5fc8bb472eb --- /dev/null +++ b/configs/pic32mz-starterkit/nsh/setenv.sh @@ -0,0 +1,68 @@ +#!/bin/bash +# configs/pic32mz-starterkit/nsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +# This is the Cygwin path to the location where I installed the MicroChip +# PIC32MZ toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install a different version of if you install +# the Linux PIC32MZ toolchain as well +#export TOOLCHAIN_PREBIN="/cygdrive/c/Program Files (x86)/Microchip/xc32/v1.34/bin": +#export TOOLCHAIN_POSTBIN= + +# This is where I have the Pinquino toolchain installed +# Careful with the ordering in the PATH variable... there is an incompatible +# version of make in this directory too! +export TOOLCHAIN_PREBIN= +export TOOLCHAIN_POSTBIN=:"/cygdrive/c/pinguino-11/compilers/p32/bin" + +# This is the path to the tools subdirectory +export PIC32TOOL_DIR="${WD}/tools/pic32mx" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_PREBIN}${PIC32TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}${TOOLCHAIN_POSTBIN}" + +echo "PATH : ${PATH}" diff --git a/configs/pic32mz-starterkit/scripts/c32-debug.ld b/configs/pic32mz-starterkit/scripts/c32-debug.ld new file mode 100644 index 0000000000000000000000000000000000000000..62fe8f6caacc45717c887efaf2aa09c047558f16 --- /dev/null +++ b/configs/pic32mz-starterkit/scripts/c32-debug.ld @@ -0,0 +1,336 @@ +/**************************************************************************** + * configs/pic32mz-starterkit/nsh/c32-debug.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 2048Kb of + * program FLASH at physical address 0x1d000000 but is always accessed + * at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 2048K + + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have 160Kb of boot + * FLASH: 80Kb at physical address 0x1fc4000 (Boot Flash 1, boot1) and + * 80Kb at physical address 0x1fc60000 (Boot Flash 2, boot2). Either + * may be mappled to the lower boot alias region (0x1fc00000, + * boolalias1) or the upper boot alias region (0x1fc20000, bootalias2). + * This linker script assumes that Boot Flash 1 is mapped to the lower + * alias region and Boot Flash 2 to the upper region. + * + * NOTE: This linker script simply writes into the lower boot alias, + * whichever boot FLASH that may correspond to. The other boot FLASH + * is simply ignored. + * + * The initial reset vector is in KSEG1, but all other accesses are in + * KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * ADEVCFG3-0 0x1fc0ff40 KSEG1 16 12288 (12Kb) + * DEVCFG3-0 0x1fc0ffc0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc004ac, LENGTH = 8192-1196 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_adevcfg (r) : ORIGIN = 0x1fc0ff40, LENGTH = 128 + kseg1_devcfg (r) : ORIGIN = 0x1fc0ffc0, LENGTH = 128 + + /* The The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 512Kb + * of data memory at physical address 0x00000000. Since the PIC32MZ + * has no data cache, this memory is always accessed through KSEG1. + * + * When used with MPLABX, we need to set aside 512 bytes of memory + * for use by MPLABX and 128 for DSP register storage. + */ + + kseg1_datamem (rw!x) : ORIGIN = 0xa0000200, LENGTH = 512K - 640 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(pic32mz) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .adevcfg : + { + KEEP (*(.adevcfg)) + } > kseg1_adevcfg + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/pic32mz-starterkit/scripts/mips-debug.ld b/configs/pic32mz-starterkit/scripts/mips-debug.ld new file mode 100644 index 0000000000000000000000000000000000000000..b517bb15f4ced97879f51c3de29318ebc28c6961 --- /dev/null +++ b/configs/pic32mz-starterkit/scripts/mips-debug.ld @@ -0,0 +1,336 @@ +/**************************************************************************** + * configs/pic32mz-starterkit/nsh/mips-debug.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 2048Kb of + * program FLASH at physical address 0x1d000000 but is always accessed + * at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 2048K + + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have 160Kb of boot + * FLASH: 80Kb at physical address 0x1fc4000 (Boot Flash 1, boot1) and + * 80Kb at physical address 0x1fc60000 (Boot Flash 2, boot2). Either + * may be mappled to the lower boot alias region (0x1fc00000, + * boolalias1) or the upper boot alias region (0x1fc20000, bootalias2). + * This linker script assumes that Boot Flash 1 is mapped to the lower + * alias region and Boot Flash 2 to the upper region. + * + * NOTE: This linker script simply writes into the lower boot alias, + * whichever boot FLASH that may correspond to. The other boot FLASH + * is simply ignored. + * + * The initial reset vector is in KSEG1, but all other accesses are in + * KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * ADEVCFG3-0 0x1fc0ff40 KSEG1 16 12288 (12Kb) + * DEVCFG3-0 0x1fc0ffc0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc004ac, LENGTH = 8192-1196 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_adevcfg (r) : ORIGIN = 0x1fc0ff40, LENGTH = 128 + kseg1_devcfg (r) : ORIGIN = 0x1fc0ffc0, LENGTH = 128 + + /* The The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 512Kb + * of data memory at physical address 0x00000000. Since the PIC32MZ + * has no data cache, this memory is always accessed through KSEG1. + * + * When used with MPLABX, we need to set aside 512 bytes of memory + * for use by MPLABX and 128 for DSP register storage. + */ + + kseg1_datamem (rw!x) : ORIGIN = 0xa0000200, LENGTH = 512K - 640 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(mips) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .adevcfg : + { + KEEP (*(.adevcfg)) + } > kseg1_adevcfg + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/pic32mz-starterkit/scripts/pinguino-debug.ld b/configs/pic32mz-starterkit/scripts/pinguino-debug.ld new file mode 100644 index 0000000000000000000000000000000000000000..236602526daca2a37612ab481130cd6c61f7ad0e --- /dev/null +++ b/configs/pic32mz-starterkit/scripts/pinguino-debug.ld @@ -0,0 +1,336 @@ +/**************************************************************************** + * configs/pic32mz-starterkit/nsh/mips-debug.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 2048Kb of + * program FLASH at physical address 0x1d000000 but is always accessed + * at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 2048K + + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have 160Kb of boot + * FLASH: 80Kb at physical address 0x1fc4000 (Boot Flash 1, boot1) and + * 80Kb at physical address 0x1fc60000 (Boot Flash 2, boot2). Either + * may be mappled to the lower boot alias region (0x1fc00000, + * boolalias1) or the upper boot alias region (0x1fc20000, bootalias2). + * This linker script assumes that Boot Flash 1 is mapped to the lower + * alias region and Boot Flash 2 to the upper region. + * + * NOTE: This linker script simply writes into the lower boot alias, + * whichever boot FLASH that may correspond to. The other boot FLASH + * is simply ignored. + * + * The initial reset vector is in KSEG1, but all other accesses are in + * KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * ADEVCFG3-0 0x1fc0ff40 KSEG1 16 12288 (12Kb) + * DEVCFG3-0 0x1fc0ffc0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc004ac, LENGTH = 8192-1196 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_adevcfg (r) : ORIGIN = 0x1fc0ff40, LENGTH = 128 + kseg1_devcfg (r) : ORIGIN = 0x1fc0ffc0, LENGTH = 128 + + /* The The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 512Kb + * of data memory at physical address 0x00000000. Since the PIC32MZ + * has no data cache, this memory is always accessed through KSEG1. + * + * When used with MPLABX, we need to set aside 512 bytes of memory + * for use by MPLABX and 128 for DSP register storage. + */ + + kseg1_datamem (rw!x) : ORIGIN = 0xa0000200, LENGTH = 512K - 640 +} + +OUTPUT_FORMAT("elf32-littlemips") +OUTPUT_ARCH(mips) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .adevcfg : + { + KEEP (*(.adevcfg)) + } > kseg1_adevcfg + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/pic32mz-starterkit/scripts/xc32-debug.ld b/configs/pic32mz-starterkit/scripts/xc32-debug.ld new file mode 100644 index 0000000000000000000000000000000000000000..6928486558a2011a6d43d54c1cf540711926d85b --- /dev/null +++ b/configs/pic32mz-starterkit/scripts/xc32-debug.ld @@ -0,0 +1,336 @@ +/**************************************************************************** + * configs/pic32mz-starterkit/nsh/mips-debug.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 2048Kb of + * program FLASH at physical address 0x1d000000 but is always accessed + * at KSEG0 address 0x9d00:0000 + */ + + kseg0_program_mem (rx) : ORIGIN = 0x9d000000, LENGTH = 2048K + + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have 160Kb of boot + * FLASH: 80Kb at physical address 0x1fc4000 (Boot Flash 1, boot1) and + * 80Kb at physical address 0x1fc60000 (Boot Flash 2, boot2). Either + * may be mappled to the lower boot alias region (0x1fc00000, + * boolalias1) or the upper boot alias region (0x1fc20000, bootalias2). + * This linker script assumes that Boot Flash 1 is mapped to the lower + * alias region and Boot Flash 2 to the upper region. + * + * NOTE: This linker script simply writes into the lower boot alias, + * whichever boot FLASH that may correspond to. The other boot FLASH + * is simply ignored. + * + * The initial reset vector is in KSEG1, but all other accesses are in + * KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * ADEVCFG3-0 0x1fc0ff40 KSEG1 16 12288 (12Kb) + * DEVCFG3-0 0x1fc0ffc0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc004ac, LENGTH = 8192-1196 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_adevcfg (r) : ORIGIN = 0x1fc0ff40, LENGTH = 128 + kseg1_devcfg (r) : ORIGIN = 0x1fc0ffc0, LENGTH = 128 + + /* The The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 512Kb + * of data memory at physical address 0x00000000. Since the PIC32MZ + * has no data cache, this memory is always accessed through KSEG1. + * + * When used with MPLABX, we need to set aside 512 bytes of memory + * for use by MPLABX and 128 for DSP register storage. + */ + + kseg1_data_mem (rw!x) : ORIGIN = 0xa0000200, LENGTH = 512K - 640 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(pic32mx) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .adevcfg : + { + KEEP (*(.adevcfg)) + } > kseg1_adevcfg + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_program_mem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_data_mem AT > kseg0_program_mem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_data_mem) ; + _bmxdudba_address = LENGTH(kseg1_data_mem) ; + _bmxdupba_address = LENGTH(kseg1_data_mem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_data_mem AT > kseg0_program_mem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_data_mem AT > kseg0_program_mem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_data_mem AT > kseg0_program_mem + + .lit8 : + { + *(.lit8) + } > kseg1_data_mem AT > kseg0_program_mem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_data_mem AT>kseg0_program_mem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_data_mem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_data_mem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/pic32mz-starterkit/src/.gitignore b/configs/pic32mz-starterkit/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/pic32mz-starterkit/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/pic32mz-starterkit/src/Makefile b/configs/pic32mz-starterkit/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..b4c5b71af1fd8280c7012b3e6d80634da3b8b18b --- /dev/null +++ b/configs/pic32mz-starterkit/src/Makefile @@ -0,0 +1,55 @@ +############################################################################ +# configs/pic32mz-starterkit/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = pic32mz_boot.c pic32mz_bringup.c pic32mz_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += pic32mz_autoleds.c +else +CSRCS += pic32mz_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += pic32mz_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += pic32mz_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/pic32mz-starterkit/src/pic32mz-starterkit.h b/configs/pic32mz-starterkit/src/pic32mz-starterkit.h new file mode 100644 index 0000000000000000000000000000000000000000..a47423f7542ca8667863e9789c976ae4bdce0875 --- /dev/null +++ b/configs/pic32mz-starterkit/src/pic32mz-starterkit.h @@ -0,0 +1,221 @@ +/**************************************************************************** + * configs/pic32mz-starterkit/src/pic32mz-starterkit.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_PIC32MZ_STARTERKIT_SRC_PIC32MZ_STARTERKIT_H +#define __CONFIGS_PIC32MZ_STARTERKIT_SRC_PIC32MZ_STARTERKIT_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* Assume that we have MMC/SD */ + +#define PIC32MZ_HAVE_MMCSD 1 + +/* The PIC32 Ethernet Starter Kit does not have an SD slot on board. If one + * is added, then it must be specified by defining which SPI bus that it + * is connected on. + */ + +#ifndef CONFIG_PIC32MZ_MMCSDSPIPORTNO +# undef PIC32MZ_HAVE_MMCSD +#endif + +#define PIC32MZ_MMCSDSPIPORTNO CONFIG_PIC32MZ_MMCSDSPIPORTNO +#define PIC32MZ_MMCSDSLOTNO 0 +#define PIC32MZ_MMCSDMINOR 0 + +/* Assume /dev/mmcsd0 */ + +#define PIC32MZ_MMCSDMINOR 0 + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef PIC32MZ_HAVE_MMCSD +#endif + +/* Make sure that the NSH configuration will support the SD card */ + +#if defined(PIC32MZ_HAVE_MMCSD) && defined(CONFIG_LIB_BOARDCTL) + + /* Make sure that the NSH configuration uses the correct SPI */ + +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) +# define CONFIG_NSH_MMCSDSPIPORTNO PIC32MZ_MMCSDSPIPORTNO +# elif CONFIG_NSH_MMCSDSPIPORTNO != PIC32MZ_MMCSDSPIPORTNO +# warning "CONFIG_PIC32MZ_MMCSDSPIPORTNO does not match CONFIG_NSH_MMCSDSPIPORTNO" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO PIC32MZ_MMCSDSPIPORTNO +# endif + + /* Make sure that the NSH configuration uses the slot */ + +# if !defined(CONFIG_NSH_MMCSDSLOTNO) +# define CONFIG_NSH_MMCSDSLOTNO 0 +# elif CONFIG_NSH_MMCSDSLOTNO != 0 +# warning "The PIC32 Starter Kit has only one slot (0)" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif + + /* Make sure that the correct SPI is enabled in the configuration */ + +# if PIC32MZ_MMCSDSPIPORTNO == 1 && !defined(CONFIG_PIC32MZ_SPI1) +# warning "CONFIG_PIC32MZ_SPI1 is not enabled" +# undef PIC32MZ_HAVE_MMCSD +# elif PIC32MZ_MMCSDSPIPORTNO == 2 && !defined(CONFIG_PIC32MZ_SPI2) +# warning "CONFIG_PIC32MZ_SPI2 is not enabled" +# undef PIC32MZ_HAVE_MMCSD +# elif PIC32MZ_MMCSDSPIPORTNO == 3 && !defined(CONFIG_PIC32MZ_SPI3) +# warning "CONFIG_PIC32MZ_SPI3 is not enabled" +# undef PIC32MZ_HAVE_MMCSD +# elif PIC32MZ_MMCSDSPIPORTNO == 4 && !defined(CONFIG_PIC32MZ_SPI4) +# warning "CONFIG_PIC32MZ_SPI4 is not enabled" +# undef PIC32MZ_HAVE_MMCSD +# endif + + /* Use the minor number selected in the NSH configuration */ + +# ifdef CONFIG_NSH_MMCSDMINOR +# define PIC32MZ_MMCSDMINOR CONFIG_NSH_MMCSDMINOR +# endif +#endif + +/* LEDs *********************************************************************/ +/* The PIC32 starter kit has 3 user LEDs + * + * PIN LED Notes + * --- ----- ------------------------- + * RH0 LED1 High illuminates (RED) + * RH1 LED3 High illuminates (YELLOW) + * RH2 LED2 High illuminates (GREEN) + */ + +#define GPIO_LED_1 (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTH | GPIO_PIN0) +#define GPIO_LED_2 (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTH | GPIO_PIN1) +#define GPIO_LED_3 (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTH | GPIO_PIN2) + +/* The PIC32MZ Ethernet Starter kit has 3 user push buttons labelled SW1-3 + * on the board: + * + * PIN LED Notes + * ---- ---- ------------------------- + * RB12 SW1 Active-low + * RB13 SW2 Active-low + * RB14 SW3 Active-low + * + * The switches do not have any debounce circuitry and require internal pull- + * up resistors. When Idle, the switches are pulled high (+3.3V), and they + * are grounded when pressed. + */ + +#define GPIO_SW_1 (GPIO_INPUT | GPIO_INTERRUPT | GPIO_PULLUP | \ + GPIO_PORTB | GPIO_PIN12) +#define GPIO_SW_2 (GPIO_INPUT | GPIO_INTERRUPT | GPIO_PULLUP | \ + GPIO_PORTB | GPIO_PIN13) +#define GPIO_SW_3 (GPIO_INPUT | GPIO_INTERRUPT | GPIO_PULLUP | \ + GPIO_PORTB | GPIO_PIN14) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Name: pic32mz_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the PCB Logic board. + * + ************************************************************************************/ + +#ifdef CONFIG_PIC32MZ_SPI +void weak_function pic32mz_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: pic32mz_led_initialize + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void pic32mz_led_initialize(void); +#endif + +/**************************************************************************** + * Name: pic32mz_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int pic32mz_bringup(void); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_PIC32MZ_STARTERKIT_SRC_PIC32MZ_STARTERKIT_H */ diff --git a/configs/pic32mz-starterkit/src/pic32mz_appinit.c b/configs/pic32mz-starterkit/src/pic32mz_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..a312b0e3272679a9f6223e3305b91f97479fd0cc --- /dev/null +++ b/configs/pic32mz-starterkit/src/pic32mz_appinit.c @@ -0,0 +1,73 @@ +/**************************************************************************** + * config/pic32mz-starterkit/src/pic32mz_appinit.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "pic32mz-starterkit.h" + +#ifdef CONFIG_LIB_BOARDCTL + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + /* If CONFIG_BOARD_INITIALIZE is selected then board initialization was + * already performed in board_initialize. + */ + +#ifndef CONFIG_BOARD_INITIALIZE + return pic32mz_bringup(); +#else + return OK; +#endif +} + +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/configs/pic32mz-starterkit/src/pic32mz_autoleds.c b/configs/pic32mz-starterkit/src/pic32mz_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..ec77d3d1f9b9601c7812aecb266b2b842053f7b4 --- /dev/null +++ b/configs/pic32mz-starterkit/src/pic32mz_autoleds.c @@ -0,0 +1,216 @@ +/**************************************************************************** + * configs/pic32mz-starterkit/src/pic32mz_leds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "pic32mz-gpio.h" +#include "pic32mz-starterkit.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED Configuration ********************************************************/ +/* The PIC32MZ Ethernet Starter kit has 3 user LEDs labelled LED1-3 on the + * board: + * + * PIN LED Notes + * --- ----- ------------------------- + * RH0 LED1 High illuminates (RED) + * RH1 LED3 High illuminates (YELLOW) + * RH2 LED2 High illuminates (GREEN) + * + * If CONFIG_ARCH_LEDs is defined, then NuttX will control the 3 LEDs + * on board the Ethernet Starter Kit. The following definitions + * describe how NuttX controls the LEDs: + * + * ON OFF + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED1 LED2 LED3 LED1 LED2 LED3 + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED_STARTED 0 OFF OFF OFF --- --- --- + * LED_HEAPALLOCATE 1 ON OFF N/C --- --- --- + * LED_IRQSENABLED 2 OFF ON N/C --- --- --- + * LED_STACKCREATED 3 ON ON N/C --- --- --- + * LED_INIRQ 4 N/C N/C ON N/C N/C OFF + * LED_SIGNAL 4 N/C N/C ON N/C N/C OFF + * LED_ASSERTION 4 N/C N/C ON N/C N/C OFF + * LED_PANIC 5 ON N/C N/C OFF N/C N/C + */ + +/* LED Management Definitions ***********************************************/ + +#define LED_OFF 0 +#define LED_ON 1 +#define LED_NC 2 + +/* Debug ********************************************************************/ + +#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_LEDS) +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# undef CONFIG_DEBUG_LEDS +# undef CONFIG_DEBUG_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private types + ****************************************************************************/ + +struct led_setting_s +{ + uint8_t led1 : 2; + uint8_t led2 : 2; + uint8_t led3 : 2; + uint8_t unused : 2; +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* If CONFIG_ARCH_LEDS is defined then NuttX will control the LEDs. The + * following structures identified the LED settings for each NuttX LED state. + */ + +static const struct led_setting_s g_ledonvalues[LED_NVALUES] = +{ + {LED_OFF, LED_OFF, LED_OFF, LED_OFF}, + {LED_ON, LED_OFF, LED_NC, LED_OFF}, + {LED_OFF, LED_ON, LED_NC, LED_OFF}, + {LED_ON, LED_ON, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_ON, LED_OFF}, + {LED_ON, LED_NC, LED_NC, LED_OFF}, +}; + +static const struct led_setting_s g_ledoffvalues[LED_NVALUES] = +{ + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_OFF, LED_OFF}, + {LED_OFF, LED_NC, LED_NC, LED_OFF}, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pic32mz_setleds + ****************************************************************************/ + +static void pic32mz_setleds(FAR const struct led_setting_s *setting) +{ + if (setting->led1 != LED_NC) + { + pic32mz_gpiowrite(GPIO_LED_1, setting->led1 == LED_ON); + } + + if (setting->led2 != LED_NC) + { + pic32mz_gpiowrite(GPIO_LED_2, setting->led2 == LED_ON); + } + + if (setting->led3 != LED_NC) + { + pic32mz_gpiowrite(GPIO_LED_3, setting->led3 == LED_ON); + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pic32mz_led_initialize + ****************************************************************************/ + +void pic32mz_led_initialize(void) +{ + /* Configure output pins */ + + pic32mz_configgpio(GPIO_LED_1); + pic32mz_configgpio(GPIO_LED_2); + pic32mz_configgpio(GPIO_LED_3); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if ((unsigned)led < LED_NVALUES) + { + pic32mz_setleds(&g_ledonvalues[led]); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if ((unsigned)led < LED_NVALUES) + { + pic32mz_setleds(&g_ledoffvalues[led]); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/pic32mz-starterkit/src/pic32mz_boot.c b/configs/pic32mz-starterkit/src/pic32mz_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..4b2dcf4a626c53ae567d8833a01ad85c7bf715ac --- /dev/null +++ b/configs/pic32mz-starterkit/src/pic32mz_boot.c @@ -0,0 +1,111 @@ +/************************************************************************************ + * configs/pic32mz-starterkit/src/pic32mz_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "pic32mz-starterkit.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mz_boardinitialize + * + * Description: + * All PIC32MZ architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void pic32mz_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) at least one SPI is enabled, and 2) the weak + * function pic32mz_spidev_initialize() has been brought into the link. + */ + +#ifdef CONFIG_PIC32MZ_SPI + if (pic32mz_spidev_initialize) + { + pic32mz_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + pic32mz_led_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform board initialization */ + + (void)pic32mz_bringup(); +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/pic32mz-starterkit/src/pic32mz_bringup.c b/configs/pic32mz-starterkit/src/pic32mz_bringup.c new file mode 100644 index 0000000000000000000000000000000000000000..a84121683b8838ab8be214ee8685ef76c4123fa9 --- /dev/null +++ b/configs/pic32mz-starterkit/src/pic32mz_bringup.c @@ -0,0 +1,131 @@ +/**************************************************************************** + * config/pic32mz-starterkit/src/pic32mz_bringup.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "pic32mz-starterkit.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nsh_sdinitialize + * + * Description: + * Initialize SPI-based microSD. + * + ****************************************************************************/ + +#ifdef PIC32MZ_HAVE_MMCSD +static int nsh_sdinitialize(void) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + spi = pic32mz_spibus_initialize(PIC32MZ_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + PIC32MZ_MMCSDSPIPORTNO); + ret = -ENODEV; + goto errout; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + PIC32MZ_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + ret = mmcsd_spislotinitialize(PIC32MZ_MMCSDMINOR, PIC32MZ_MMCSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + PIC32MZ_MMCSDSPIPORTNO, PIC32MZ_MMCSLOTNO, ret); + goto errout; + } + + syslog(LOG_INFO, "Successfully bound SPI port %d to MMC/SD slot %d\n", + PIC32MZ_MMCSDSPIPORTNO, PIC32MZ_MMCSLOTNO); + return OK; + +errout: + return ret; +} +#else +# define nsh_sdinitialize() (OK) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pic32mz_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int pic32mz_bringup(void) +{ + int ret; + + /* Initialize SPI-based microSD */ + + ret = nsh_sdinitialize(); + + return ret; +} diff --git a/configs/pic32mz-starterkit/src/pic32mz_buttons.c b/configs/pic32mz-starterkit/src/pic32mz_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..4e26b559507f5dd87b6e88e971d86ce8d1b54b72 --- /dev/null +++ b/configs/pic32mz-starterkit/src/pic32mz_buttons.c @@ -0,0 +1,184 @@ +/**************************************************************************** + * configs/pic32mz-starterkit/src/pic32mz_buttons.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "pic32mz-gpio.h" +#include "pic32mz-starterkit.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* Pin configuration for each start kit switch. This array is indexed by + * the BUTTON_* definitions in board.h + */ + +static const pinset_t g_buttons[NUM_BUTTONS] = +{ + GPIO_SW_1, GPIO_SW_2, GPIO_SW_3 +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + pic32mz_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed. */ + + bool released = pic32mz_gpioread(g_buttons[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/**************************************************************************** + * Button interrupt support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupthandlers. + * + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the + * BUTTON_*_BIT definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that + * will be called when a button is depressed or released. The ID value is + * a button enumeration value that uniquely identifies a button resource. + * See the BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it + * may restored, if so desired). + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ +#ifdef CONFIG_PIC32MZ_GPIOIRQ_PORTB + xcpt_t oldhandler = NULL; + + if ((unsigned)id < NUM_BUTTONS) + { + /* Perform the attach/detach operation */ + + oldhandler = pic32mz_gpioattach(g_buttons[id], irqhandler); + + /* The interrupt is now disabled. Are we attaching or detaching from + * button interrupt? + */ + + if (irqhandler) + { + /* Attaching... enable button interrupts now */ + + pic32mz_gpioirqenable(g_buttons[id]); + } + } + + return oldhandler; +#else + return NULL; +#endif +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/pic32mz-starterkit/src/pic32mz_spi.c b/configs/pic32mz-starterkit/src/pic32mz_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..5a0b2599c670a1552e7d2d534c603b5b93867d58 --- /dev/null +++ b/configs/pic32mz-starterkit/src/pic32mz_spi.c @@ -0,0 +1,260 @@ +/************************************************************************************ + * configs/pic32mz-starterkit/src/pic32mz_spi.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" + +#include "pic32mz-starterkit.h" + +#ifdef CONFIG_PIC32MZ_SPI + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Debug */ + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef CONFIG_SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mz_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Sure PIC32MZ board. + * + ************************************************************************************/ + +void weak_function pic32mz_spidev_initialize(void) +{ + /* Configure the SPI chip select GPIOs */ + +#warning "Missing logic" +} + +/************************************************************************************ + * Name: pic32mz_spiNselect, pic32mz_spiNstatus, and pic32mz_spiNcmddata + * + * Description: + * These external functions must be provided by board-specific logic. They are + * implementations of the select, status, and cmddata methods of the SPI interface + * defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All other methods + * including pic32mz_spibus_initialize()) are provided by common PIC32MZ logic. To use + * this common SPI logic on your board: + * + * 1. Provide logic in pic32mz_boardinitialize() to configure SPI/SPI chip select + * pins. + * 2. Provide pic32mz_spiNselect() and pic32mz_spiNstatus() functions + * in your board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * pic32mz_spiNcmddata() functions in your board-specific logic. These + * functions will perform cmd/data selection operations using GPIOs in the way + * your board is configured. + * 3. Add a call to pic32mz_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by pic32mz_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +struct spi_dev_s; +enum spi_dev_e; + +#ifdef CONFIG_PIC32MZ_SPI1 +void pic32mz_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t pic32mz_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + spidbg("Returning nothing\n"); +#warning "Missing logic" + return 0; +} +#ifdef CONFIG_SPI_CMDDATA +int pic32mz_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif + +#ifdef CONFIG_PIC32MZ_SPI2 +void pic32mz_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t pic32mz_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + spidbg("Returning nothing\n"); +#warning "Missing logic" + return 0; +} +#ifdef CONFIG_SPI_CMDDATA +int pic32mz_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif + +#ifdef CONFIG_PIC32MZ_SPI3 +void pic32mz_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t pic32mz_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + spidbg("Returning nothing\n"); +#warning "Missing logic" + return 0; +} +#ifdef CONFIG_SPI_CMDDATA +int pic32mz_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif + +#ifdef CONFIG_PIC32MZ_SPI4 +void pic32mz_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t pic32mz_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + spidbg("Returning nothing\n"); +#warning "Missing logic" + return 0; +} +#ifdef CONFIG_SPI_CMDDATA +int pic32mz_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif + +#ifdef CONFIG_PIC32MZ_SPI5 +void pic32mz_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t pic32mz_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + spidbg("Returning nothing\n"); +#warning "Missing logic" + return 0; +} +#ifdef CONFIG_SPI_CMDDATA +int pic32mz_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif + +#ifdef CONFIG_PIC32MZ_SPI6 +void pic32mz_spi6select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t pic32mz_spi6status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + spidbg("Returning nothing\n"); +#warning "Missing logic" + return 0; +} +#ifdef CONFIG_SPI_CMDDATA +int pic32mz_spi6cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif + +#endif /* CONFIG_PIC32MZ_SPI */ diff --git a/configs/pic32mz-starterkit/src/pic32mz_userleds.c b/configs/pic32mz-starterkit/src/pic32mz_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..7defe1597711bcf5a1410ecaeb162dabd13f3fd6 --- /dev/null +++ b/configs/pic32mz-starterkit/src/pic32mz_userleds.c @@ -0,0 +1,146 @@ +/**************************************************************************** + * configs/pic32mz-starterkit/src/pic32mz_userleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "pic32mz-gpio.h" +#include "pic32mz-starterkit.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED Configuration ********************************************************/ +/* The PIC32MZ Ethernet Starter kit has 3 user LEDs labelled LED1-3 on the + * board: + * + * PIN LED Notes + * --- ----- ------------------------- + * RH0 LED1 High illuminates (RED) + * RH1 LED3 High illuminates (YELLOW) + * RH2 LED2 High illuminates (GREEN) + * + * If CONFIG_ARCH_LEDS is not defined, then the user is free to control the + * LEDs through the functions provided in this file + */ + +/* Debug ********************************************************************/ + +#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_LEDS) +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# undef CONFIG_DEBUG_LEDS +# undef CONFIG_DEBUG_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* The following array simply maps the PIC32MZ_STARTERKIT_LEDn index values + * to the correct LED pin configuration. + */ + +static const uint16_t g_ledpincfg[PIC32MZ_STARTERKIT_NLEDS] = +{ + GPIO_LED_1, GPIO_LED_2, GPIO_LED_3 +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure output pins */ + + pic32mz_configgpio(GPIO_LED_1); + pic32mz_configgpio(GPIO_LED_2); + pic32mz_configgpio(GPIO_LED_3); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < PIC32MZ_STARTERKIT_NLEDS) + { + pic32mz_gpiowrite(g_ledpincfg[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + board_userled(PIC32MZ_STARTERKIT_LED1, + (ledset & PIC32MZ_STARTERKIT_LED1_BIT) != 0); + board_userled(PIC32MZ_STARTERKIT_LED2, + (ledset & PIC32MZ_STARTERKIT_LED2_BIT) != 0); + board_userled(PIC32MZ_STARTERKIT_LED3, + (ledset & PIC32MZ_STARTERKIT_LED3_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/pirelli_dpl10/Kconfig b/configs/pirelli_dpl10/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/pirelli_dpl10/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/pirelli_dpl10/README.txt b/configs/pirelli_dpl10/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..e9f0204df5118d4b51bb79535b99b0e52c085481 --- /dev/null +++ b/configs/pirelli_dpl10/README.txt @@ -0,0 +1,363 @@ +pirelli_dpl10 +============= + + This directory contains the board support for Pirelli "Discus" DP-L10 + phones. + +Contents +======== + + * History + * Hardware + * Osmocom-BB Dependencies and Sercomm + * Loading NuttX + * Memory Map + * USB Serial Console + * NuttX OABI "buildroot" Toolchain + * Generic OABI Toolchain + * Configurations + +History +======= + This port is a variant of the compal_e88 configuration with the small + change of enabling the IrDA serial console: + + - CONFIG_SERIAL_IRDA_CONSOLE=y + + This port is based on patches contributed by Denis Carikli for both the + compal e99 and e88. At the time of initial check-in, the following phones + were tested: + + - Pirelli DPL-10 nsh_highram loaded via romload in osmocon + + The patches were made by Alan Carvalho de Assis and Denis Carikli using + the Stefan Richter's patches that can be found here: + + http://cgit.osmocom.org/cgit/nuttx-bb/log/?h=lputt%2Ftesting + +Hardware +======== + + * CPU/DBB: TI Calypso (D751992AZHH) + + See http://bb.osmocom.org/trac/wiki/Hardware/Calypso + + * ABB: TI Iota (TWL3014) + + Analog baseband chip. See http://bb.osmocom.org/trac/wiki/Iota + + * GSM Transceiver: TI Rita (TRF6151) + + GSM Transceiver. See http://bb.osmocom.org/trac/wiki/Rita + + * PA: SKY77328-13 + + Quad-band GSM/GPRS: See http://www.skyworksinc.com/Product.aspx?ProductID=434 + + * Flash/SRAM: Spansion S71PL129NC0 128MBit/64MBit + + Combined FLASH and SDRAM: + FLASH: 128Mbit + SDRAM: 64Mbit + + * Wifi: Marvell 88W8385 802.11 MAC + Marvell 88W8015 802.11b/g transceiver + + * Winbond W56940 ringtone chip + + * Sunplus SPCA552E multimedia controller + + Multimedia processor: integrates CMOS sensor interface, DSC processor, JPEG + codec engine, LCM interface and other peripherals. + + I have not yet been able to find a data sheet for this chip. I believe that + it will be critical to develop drivers for the display. + + * LSI-65194A1 ASIC (seems to be a DSP for VoIP en-/decoding) + + * Silabs CP2102 USB UART (connected to UART_IRDA of the Calypso) + +Osmocom-BB Dependencies and Sercomm +=================================== + + Sercomm is an HDLC protocol used to communicate between a Calypso phone + and the host PC. By default, NuttX will not use sercomm (HDLC protocol) to + communicate with the host system. Sercomm is the transport used by + osmocom-bb that runs on top of serial. See + http://bb.osmocom.org/trac/wiki/nuttx-bb/run for detailed the usage of nuttx + with sercomm. + + If you build with sercomm, you must add support for sercomm in your + configuration (CONFIG_SERCOMM_CONSOLE=y). In this case, the build + environment assumes that you have the osmocom-bb project directory at same + level as the nuttx project: + + |- nuttx + |- apps + `- osmocom-bb + + If you attempt to build a sercomm-enaled configuration without osmocom-bb, + you will get compilation errors in drivers/sercomm due to header files that + are needed from the osmocom-bb directory. + +Loading NuttX +============= + + General + ------- + The osmocom-bb wiki describes how to load NuttX. See + http://bb.osmocom.org/trac/wiki/nuttx-bb for detailed information. + The way that nuttx is loaded depends on the configuration (highram/compalram) + and phone: + + - compalram is for the ramloader(for phone having a bootloader on flash) + - highram is for phones having the romloader(if the phone has a bootrom) + or for loading in the ram trough a special loader(loaded first on ram + by talking to the ramloader) when having a ramloader(which can only + load 64k). + + The Pirelli USB Serial Interface + -------------------------------- + The Pirelli phone is epecially easy to use because you just use the + supplied USB cable. The phone already has an integrated Silabs CP210x + USB-UART, which is supported by Linux. No need for a T191 cable. + + Most of the phones seem to use USB vid:pid 0489:e003, which is mainline + since Linux 2.6.36. You can do the following for Kernels < 2.6.36: + + # modprobe -v cp210x + # echo "0489 e003" > /sys/bus/usb-serial/drivers/cp210x/new_id + + Loading NuttX + ------------- + Here's how I load NuttX into the phone: + + - Take out the battery + - Plug in the USB adapter into the phone then the computer + - Start osmocon like: osmocon -p /dev/ttyUSB0 -m romload nuttx.bin + - Put the battery back in + + This works most of the time. Sometimes I have to take out and put in + the battery a few times or re-start the whole set of steps but it's + generally quite reliable. + +Memory Map +========= + + Internal SRAM and ROM + --------------------- + Calypso has 256KB of internal SRAM (0x800000-0x83ffff, although some of + this is, I believe, actually ROM). Only this internal SRAM is used by + these configurations. The internal SRAM is broken up into two logical + banks. + + LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000 + HRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00020000 + + Code can be loaded by the CalypsoBootloader only into HRAM beginning at + address 0x00820000 and, hence, is restricted to 128KB (including then + non-loaded sections: Uninitialized data and the NuttX heap). + + SDRAM and NOR FLASH + ------------------- + SDRAM is provided by a Flash/SRAM: Spansion S71PL129NC0 part that provices + 128MBit (16MB) of FLASH and 64MBit (8MB) of SDRAM. + + * SDRAM + + The Pirelli DP-L10 has 8MB of SDRAM beginning at address 0x01000000. + This DRAM appears to be initialized by the Pirelli ROM loader and is + ready for use with no further initialization required. + + * NOR FLASH + + The 16MB FLASH is at address 0x00000000. + +USB Serial Console +================== + + These configurations are set up to use the Calypso IrDA UART as the serial + port. On the Pirelli phone, this port connects to the built-in USB-serial + adaptor so that that NuttX serial console will be available on your PC as + a USB serial device. You should see something this using 'dmesg' when you + plug the Pirelli phone into a PC running Linux: + + usb 5-2: new full speed USB device number 3 using uhci_hcd + usb 5-2: New USB device found, idVendor=0489, idProduct=e003 + usb 5-2: New USB device strings: Mfr=1, Product=2, SerialNumber=3 + usb 5-2: Product: DP-L10 + usb 5-2: Manufacturer: Silicon Labs + usb 5-2: SerialNumber: 0001 + usbcore: registered new interface driver usbserial + USB Serial support registered for generic + usbcore: registered new interface driver usbserial_generic + usbserial: USB Serial Driver core + USB Serial support registered for cp210x + cp210x 5-2:1.0: cp210x converter detected + usb 5-2: reset full speed USB device number 3 using uhci_hcd + usb 5-2: cp210x converter now attached to ttyUSB0 + usbcore: registered new interface driver cp210x + cp210x: v0.09:Silicon Labs CP210x RS232 serial adaptor driver + + + Before you use this port to communicate with Nuttx, make sure that osmocon is + no longer running. Then start a serial terminal such as minicom on your host + PC. Configure the serial terminal so that it uses: + + Port: /dev/ttyUSB0 + Baud: 115,200 8N1 + +JTAG and Alternative Serial Console +=================================== + +JTAG + All JTAG lines, as well as the second uart (UART_MODEM), go to the + unpopulated connector next to the display connector. NOTE: You have + to disassemble the phone to get to this connector. + + + --- --------------------------- + PIN SIGNAL + --- --------------------------- + 1 Vcc + 2 RX_MODEM + 3 TESTRSTz (Iota) + 4 TDI + 5 TMS + 6 TCK + 7 TX_MODEM + 8 TDO + 9 N/C + 10 GND + 11 N/C + 12 N/C + --- --------------------------- + +JTAG Apapter: + + ------- ----------- --------------- -------------------------------------- + JTAG 20-PIN DESCRIPTION NOTES + SIGNAL CONNECTOR + ------- ----------- --------------- -------------------------------------- + Vcc 1, 2 Vcc + nTRST 3 Reset Connect this pin to the (active + low) reset input of the target MCU. + Some JTAG adapters driver nTRST (high + and low). Others can can configure + nTRST as open collector (only drive + low). + GND 4, 6, 8, Ground + 10, 12, 14, + 16, 20 + TDI 5 JTAG Test Data Use 10K-100K Ohm pull-up resistor to + Input VCC + TMS 7 JTAG Test Mode Use 10K-100K Ohm pull-up resistor to + Select VCC + TCK 9 Clock into the Use 10K-100K Ohm pull-down resistor to + core GND + RTCK 11 Return clock Some JTAG adapters have adaptive clocking + using an RTCK signal. + DBGSEL 11 Debug Select Some devices have special pins that + enable the JTAG interface. For example, + on the NXP LPC2129 the signal RTCK must + be driven low during RESET to enable the + JTAG interface. + TDO 13 JTAG Test Data Use 10K-100K Ohm pull-up resistor to VCC + Output + DBGRQ 17 N/C + DGBACK 19 N/C + ISP ?? ISP Most NXP MCU's have an ISP pin which + (when pulled low) can be used to cause + the MCU to enter a bootloader on reset. + Use 10K-100K Ohm pull up resistor. + ------- ----------- --------------- -------------------------------------- + +NuttX OABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the ARM GCC toolchain (if + different from the default in your PATH variable). + + If you have no ARMtoolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh pirelli_dpl10/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/arm7tdmi-defconfig-4.3.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + +Generic OABI Toolchain +====================== + + The NuttX OABI toolchain is selected with: + + CONFIG_ARM_TOOLCHAIN_BUILDROOT=y + CONFIG_ARM_OABI_TOOLCHAIN=y + + In most cases, OsmocomBB is built with a different OABI toolchain with a + prefix of arm-elf-. To use that toolchain, change the configuration as + follows: + + CONFIG_ARM_TOOLCHAIN_GNU_OABI=y + +Configurations +============== + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. This configuration enables the serial interface on IrDA UART which + will appears as a USB serial device. + + CONFIG_SERIAL_IRDA_CONSOLE=y + + 3. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_LINUX=y : Builds under Linux + CONFIG_ARM_TOOLCHAIN_BUILDROOT=y : NuttX buildroot OABI toolchain + CONFIG_ARM_OABI_TOOLCHAIN=y + + You can switch to use the generic arm-elf- GCC toolchain by + setting: + + CONFIG_ARM_TOOLCHAIN_GNU_OABI=y : General arm-elf- toolchain + + 4. Support for builtin applications is enabled. A builtin 'poweroff' + command is supported. diff --git a/configs/pirelli_dpl10/include/board.h b/configs/pirelli_dpl10/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..1426ea73247306f8a9432c18fd677263a766edaa --- /dev/null +++ b/configs/pirelli_dpl10/include/board.h @@ -0,0 +1,6 @@ +/**************************************************************************** + * configs/pirelli_dpl10/include/board.h + * + * Supposed to be empty + * + ****************************************************************************/ diff --git a/configs/pirelli_dpl10/nsh_highram/Make.defs b/configs/pirelli_dpl10/nsh_highram/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..4b95922be4fe8681d2d7bd3b56abb8fd1677ce3b --- /dev/null +++ b/configs/pirelli_dpl10/nsh_highram/Make.defs @@ -0,0 +1,131 @@ +############################################################################ +# configs/pirelli_dpl10/nsh/Make.defs +# +# Copyright (C) 2007, 2008, 2011, 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +LDSCRIPT = highram.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +ifeq ("${CONFIG_SERCOMM_CONSOLE}","y") +OSMODIR = $(TOPDIR)/../../osmocom-bb +EXTRA_LIBS = $(OSMODIR)/src/target/firmware/comm/libcomm.a \ + $(OSMODIR)/src/shared/libosmocore/build-target/src/.libs/libosmocore.a \ + $(OSMODIR)/src/target/firmware/calypso/libcalypso.a \ + $(OSMODIR)/src/target/firmware/comm/libcomm.a + # ^^^ Stupid hack! Why do I have to put it twice??? +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) +endif diff --git a/configs/pirelli_dpl10/nsh_highram/defconfig b/configs/pirelli_dpl10/nsh_highram/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c24e5a51ec7edcf0421dee768a2e8475f42ce92d --- /dev/null +++ b/configs/pirelli_dpl10/nsh_highram/defconfig @@ -0,0 +1,736 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +CONFIG_ARCH_CHIP_CALYPSO=y +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="calypso" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +CONFIG_ARM_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set +CONFIG_ARM_OABI_TOOLCHAIN=y +CONFIG_UART_IRDA_BAUD=115200 +CONFIG_UART_IRDA_PARITY=0 +CONFIG_UART_IRDA_BITS=8 +CONFIG_UART_IRDA_2STOP=0 +CONFIG_UART_IRDA_RXBUFSIZE=256 +CONFIG_UART_IRDA_TXBUFSIZE=256 +CONFIG_UART_MODEM_BAUD=115200 +CONFIG_UART_MODEM_PARITY=0 +CONFIG_UART_MODEM_BITS=8 +CONFIG_UART_MODEM_2STOP=0 +CONFIG_UART_MODEM_RXBUFSIZE=256 +CONFIG_UART_MODEM_TXBUFSIZE=256 + +# +# Calypso Configuration Options +# + +# +# Modem UART Configuration +# +# CONFIG_UART_MODEM_HWFLOWCONTROL is not set + +# +# IrDA UART Configuration +# +# CONFIG_UART_IRDA_HWFLOWCONTROL is not set +# CONFIG_USE_SERCOMM_CONSOLE is not set +# CONFIG_SERIAL_MODEM_CONSOLE is not set +CONFIG_SERIAL_IRDA_CONSOLE=y +# CONFIG_SERIAL_CONSOLE_NONE is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00800000 +CONFIG_RAM_SIZE=262144 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_COMPALE86 is not set +# CONFIG_ARCH_BOARD_COMPALE88 is not set +# CONFIG_ARCH_BOARD_COMPALE99 is not set +CONFIG_ARCH_BOARD_PIRELLI_DPL10=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="pirelli_dpl10" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_POWEROFF=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=13 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_ARCH_HAVE_OTHER_UART=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_OTHER_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=1024 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/pirelli_dpl10/nsh_highram/setenv.sh b/configs/pirelli_dpl10/nsh_highram/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..56d2c4cf94e0c2411f645114703d850f376618bb --- /dev/null +++ b/configs/pirelli_dpl10/nsh_highram/setenv.sh @@ -0,0 +1,62 @@ +#!/bin/bash +# configs/pirelli_dpl10/nsh/setenv.sh +# +# Copyright (C) 2007, 2008, 2011, 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/pirelli_dpl10/scripts/highram.ld b/configs/pirelli_dpl10/scripts/highram.ld new file mode 100644 index 0000000000000000000000000000000000000000..f20a5f89c2a1af0df6828e794e30b7d7f56521ca --- /dev/null +++ b/configs/pirelli_dpl10/scripts/highram.ld @@ -0,0 +1,132 @@ +/* + * Linker script for running from internal SRAM on Pirelli DP-L10 phones + * + * This script is tailored specifically to the requirements imposed + * on us by the CalypsoRomloader in the Pirelli rom. + * + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(__start) + +MEMORY +{ + /* 0x00800000-0x0082000: Low RAM. Used only for exception vectors */ + + LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000 + + /* 0x00820000-0x0084000: High RAM. The CalypsoRomloader loads binary to + * address 0x00820000 */ + + HRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00020000 +} + +SECTIONS +{ + . = 0x800000; + + /* romloader data section, contains passthru interrupt vectors */ + .compal.loader (NOLOAD) : { . = 0x100; } > LRAM + + /* image signature (prepended by osmocon according to phone type) */ + .compal.header (NOLOAD) : { . = 4; } > LRAM + + /* initialization code */ + . = ALIGN(4); + .text.start : { + PROVIDE(__start = .); + KEEP(*(.text.start)) + *(.text.start) + } > HRAM + + /* exception vectors from 0x80001c to 0x800034 */ + .text.exceptions 0x80001c : AT (LOADADDR(.text.start) + SIZEOF(.text.start)) { + KEEP(*(.text.exceptions)) + * (.text.exceptions) + . = ALIGN(4); + } > LRAM + PROVIDE(_exceptions = LOADADDR(.text.exceptions)); + + /* code */ + . = ALIGN(4); + .text (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) : + AT (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) { + /* regular code */ + *(.text*) + /* always-in-ram code */ + *(.ramtext*) + /* gcc voodoo */ + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) + . = ALIGN(4); + } > HRAM + PROVIDE(_text_start = LOADADDR(.text)); + PROVIDE(_text_end = LOADADDR(.text) + SIZEOF(.text)); + + /* constructor pointers */ + .ctors : { + /* ctor count */ + LONG(SIZEOF(.ctors) / 4 - 2) + /* ctor pointers */ + KEEP(*(SORT(.ctors))) + /* end of list */ + LONG(0) + } > HRAM + PROVIDE(_ctor_start = LOADADDR(.ctors)); + PROVIDE(_ctor_end = LOADADDR(.ctors) + SIZEOF(.ctors)); + + /* destructor pointers */ + .dtors : { + /* dtor count */ + LONG(SIZEOF(.dtors) / 4 - 2) + /* dtor pointers */ + KEEP(*(SORT(.dtors))) + /* end of list */ + LONG(0) + } > HRAM + PROVIDE(_dtor_start = LOADADDR(.dtors)); + PROVIDE(_dtor_end = LOADADDR(.dtors) + SIZEOF(.dtors)); + + /* read-only data */ + . = ALIGN(4); + .rodata : { + *(.rodata*) + } > HRAM + PROVIDE(_rodata_start = LOADADDR(.rodata)); + PROVIDE(_rodata_end = LOADADDR(.rodata) + SIZEOF(.rodata)); + + /* initialized data */ + . = ALIGN(4); + .data : { + *(.data) + } > HRAM + PROVIDE(_data_start = LOADADDR(.data)); + PROVIDE(_data_end = LOADADDR(.data) + SIZEOF(.data)); + + /* pic offset tables */ + . = ALIGN(4); + .got : { + *(.got) + *(.got.plt) *(.igot.plt) *(.got) *(.igot) + } > HRAM + PROVIDE(_got_start = LOADADDR(.got)); + PROVIDE(_got_end = LOADADDR(.got) + SIZEOF(.got)); + + /* uninitialized data */ + .bss (NOLOAD) : { + . = ALIGN(4); + __bss_start = .; + _sbss = ABSOLUTE(.); + *(.bss) + _ebss = ABSOLUTE(.); + } > HRAM + . = ALIGN(4); + __bss_end = .; + PROVIDE(_bss_start = __bss_start); + PROVIDE(_bss_end = __bss_end); + + /* end of image */ + . = ALIGN(4); + _end = .; + PROVIDE(end = .); +} diff --git a/configs/pirelli_dpl10/src/.gitignore b/configs/pirelli_dpl10/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/pirelli_dpl10/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/pirelli_dpl10/src/Makefile b/configs/pirelli_dpl10/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..4026b5fb1c9091d35816679c3561379697ff2f3f --- /dev/null +++ b/configs/pirelli_dpl10/src/Makefile @@ -0,0 +1,44 @@ +############################################################################ +# configs/pirelli_dpl10/src/Makefile +# +# Copyright (C) 2007, 2008, 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Copyright (C) 2011 Stefan Richter. All rights reserved. +# Author: Stefan Richter +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = boot.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/pirelli_dpl10/src/boot.c b/configs/pirelli_dpl10/src/boot.c new file mode 100644 index 0000000000000000000000000000000000000000..4cd07fb0a698c358a07e3c5b3d461849e2428173 --- /dev/null +++ b/configs/pirelli_dpl10/src/boot.c @@ -0,0 +1,54 @@ +/**************************************************************************** + * configs/pirelli_dpl10/boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/* Application initialization stub for boardctl() */ + +#ifdef CONFIG_LIB_BOARDCTL +int board_app_initialize(void) +{ + return 0; +} +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/configs/qemu-i486/Kconfig b/configs/qemu-i486/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/qemu-i486/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/qemu-i486/README.txt b/configs/qemu-i486/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..c91270f5689421169ba409f1bd1c7bbe246ac23b --- /dev/null +++ b/configs/qemu-i486/README.txt @@ -0,0 +1,196 @@ +README +====== + +This README file describes the contents of the build configurations available +for the NuttX QEMU i486 port. + +Contents +======== + + * QEMU + - Building QEMU + - Cygwin Build Problems + - Running QEMU + * Toolchains + - Cygwin Buildroot Toolchain + - Buildroot Instructions + * FAQ + * Configurations + - ostest + - nsh + +QEMU +==== + +QEMU is a generic and open source machine emulator and virtualizer. Here are +some links (which will probably be mostly outdated by the time your read this): + + Home Page: http://wiki.qemu.org/Main_Page + Downloads: http://wiki.qemu.org/Download + Documentation: http://wiki.qemu.org/Manual + Usage: qemu -nographic -kernel nuttx.elf + +Building QEMU +------------- + + tar zxf qemu-0.14.0.tar.gz + cd qemu-0.14.0 + ./configure --target-list=i386-softmmu + make + make install + +Cygwin Build Problems +--------------------- + + Error: + + "gcc: The -mno-cygwin flag has been removed; use a mingw-targeted cross-compiler." + + Workaround: + + None known. It does not seem possible to build QEMU using the Cygwin gcc. + I tried editing configure. Removing the following line will allow QEMU to + configure: + + QEMU_CFLAGS="-mno-cygwin $QEMU_CFLAGS" + + However, it then fails later during the compilation phase. + + Recommendation: + + 1. Google for "qemu windows download" and download some pre-built QEMU + binaries. I found 0.14.0 here: http://dietpc.org/windows/qemu/, or + 2. Try building QEMU with MingGW (I understand that this is difficult). + + NOTE: As of this writing, I have not been successful getting ANY pre-built + version of QEMU to work successfully with WinXP. The same binaries work + fine on Vista, however. + +Running QEMU +------------ + + In the top-level NuttX directory: + + qemu -cpu 486 -m 2 -kernel nuttx.elf -nographic + + The -nographic option redirects COM1 to your console. However, the -nographic + option does not work under Cygwin. For simple testing under Cygwin, I use + + qemu -cpu 486 -m 2 -kernel nuttx.elf -serial file:test.txt + + which will send COM1 output to the file test.txt. + +Toolchains +========== + + Two target environments are supported: (1) Linux and (2) Cygwin under Windows. + Any GCC toolchain that can produce i486 ELF binaries should work. On Linux, + you can probably use the installed system gcc. But that will not work with + Cygwin. Why? Because the Cygwin gcc (and probably the MinGW gcc as well) do + not produce ELF final binaries but, rather, DOS MZ executables (i.e., .exe + files). Those cannot be used with QEMU. + + NOTE: It has also been reported to me that with a certain Ubuntu virtual + installation, the native x86 did not build correct i486 code. Other + installations of the same vintage do not have such issues. However, + there is always a possibility that any GCC release will be incompatible + with i486. That fallback used by this person in this particular case + was to use the Buildroot i486 cross-development tool described below. I + suspect that this was not necessary, but it was a simple work-around + that allowed that person to build a work-able system. + + In any event, the file */setenv.sh should be modified to point to the correct + path to the GCC toolchain (if different from the default in your PATH + variable). + +Cygwin Buildroot Toolchain +-------------------------- + + With Cygwin the solution is to build an i486 cross-development toolchain to + generate the i486 ELF files needed by QEMU. The NuttX buildroot package will + create such a toolchain. + + NOTE: As of this writing, none of the released buildroot packages support the + i486 build. This is only available in GIT or in any any 1.10 or later buildroot + release. + +Buildroot Instructions +---------------------- + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh qemu-i486/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/i486-defconfig-4.3.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you + run into problems building the toolchain for Cygwin under Windows. + +FAQ +=== + +Q: I get the following error message, "undefined reference to '__stack_chk_fail'" +A: Add -fno-stack-protector to ARCHCPUFLAGS in you Make.defs file. Switch the + commenting on the following two lines in the Make.defs file: + + ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin + #ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin -fno-stack-protector + +Configurations +============== + +Common Configuration Notes +-------------------------- + + 1. Each Qemu-i486 Web Server configuration is maintained in a sub-directory + and can be selected as follow: + + cd tools + ./configure.sh qemu-i486/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume the Linux. This is easily + reconfigured: + + CONFIG_HOST_LINUX=y + +Configuration Sub-Directories +----------------------------- + + ostest + + The "standard" NuttX examples/ostest configuration. + + nsh + + Configures the NuttShell (nsh) located at examples/nsh. diff --git a/configs/qemu-i486/include/board.h b/configs/qemu-i486/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..7ce9e3b5cf6fb3d4ad0fb01bb321a97122609729 --- /dev/null +++ b/configs/qemu-i486/include/board.h @@ -0,0 +1,91 @@ +/************************************************************************************ + * configs/qemu-i486/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef _CONFIGS_QEMU_I486_INCLUDE_BOARD_H +#define _CONFIGS_QEMU_I486_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* Programmable interval timer (PIT) */ + +#define PIT_CLOCK 1041816 /* PIT input clock */ + +/* LED definitions ******************************************************************/ + +/* Button definitions ***************************************************************/ + +/* Alternate pin selections *********************************************************/ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_QEMU_I486_INCLUDE_BOARD_H */ diff --git a/configs/qemu-i486/nsh/Make.defs b/configs/qemu-i486/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..7f5be321fdefb7338a3c5366789e85cdbe289c44 --- /dev/null +++ b/configs/qemu-i486/nsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/qemu-i486/nsh/Make.defs +# +# Copyright (C) 2011, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/ld.script}" + MAXOPTIMIZATION = -O2 +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/ld.script +endif + +ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin +#ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin -fno-stack-protector +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHDEFINES = + +# Check if building a 32-bit target with a 64-bit toolchain + +ifeq ($(ARCH_X86_M32),y) +ARCHCPUFLAGS += -m32 +endif + +# We have to use a cross-development toolchain under Cygwin because the native +# Cygwin toolchains don't generate ELF binaries. + +ifeq ($(HOSTOS),Cygwin) +CROSSDEV = i486-nuttx-elf- +else +CROSSDEV = +endif + +CC = $(CROSSDEV)gcc +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = .elf + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDESv = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/qemu-i486/nsh/defconfig b/configs/qemu-i486/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..68cf8bcff9b53456b187914b3651b566ef7281df --- /dev/null +++ b/configs/qemu-i486/nsh/defconfig @@ -0,0 +1,693 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +CONFIG_ARCH_X86=y +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="x86" +CONFIG_ARCH_CHIP="qemu" + +# +# x86 Configuration Options +# +CONFIG_ARCH_I486=y +CONFIG_ARCH_CHIP_QEMU=y +CONFIG_ARCH_X86_HAVE_32BIT=y +# CONFIG_ARCH_X86_M32 is not set + +# +# Common Configuration Options +# + +# +# i486 Configuration Options +# + +# +# QEMU Configuration Options +# +# CONFIG_QEMU_KEYPAD is not set +# CONFIG_QEMU_VGA is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=999 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +CONFIG_BOOT_RUNFROMEXTSRAM=y +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00100000 +CONFIG_RAM_SIZE=1048576 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_QEMU_I486=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="qemu-i486" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=31 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=3 +CONFIG_DEV_CONSOLE=y +CONFIG_MUTEX_TYPES=y +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=64 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_16550_UART=y +CONFIG_16550_UART0=y +CONFIG_16550_UART0_BASE=0x3f8 +CONFIG_16550_UART0_CLOCK=16000000 +CONFIG_16550_UART0_IRQ=4 +CONFIG_16550_UART0_BAUD=57600 +CONFIG_16550_UART0_PARITY=0 +CONFIG_16550_UART0_BITS=8 +CONFIG_16550_UART0_2STOP=0 +CONFIG_16550_UART0_RXBUFSIZE=256 +CONFIG_16550_UART0_TXBUFSIZE=256 +# CONFIG_16550_UART0_IFLOWCONTROL is not set +# CONFIG_16550_UART0_OFLOWCONTROL is not set +# CONFIG_16550_UART1 is not set +# CONFIG_16550_UART2 is not set +# CONFIG_16550_UART3 is not set +CONFIG_16550_UART0_SERIAL_CONSOLE=y +# CONFIG_16550_NO_SERIAL_CONSOLE is not set +CONFIG_16550_SUPRESS_CONFIG=y +CONFIG_16550_REGINCR=1 +CONFIG_16550_REGWIDTH=8 +CONFIG_16550_ADDRWIDTH=16 +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_TMPDIR="/tmp" +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_DISABLEBG is not set +# CONFIG_NSH_ROMFSETC is not set +CONFIG_NSH_CONSOLE=y + +# +# USB Trace Support +# +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/qemu-i486/nsh/ld.script b/configs/qemu-i486/nsh/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..ddab1327e97666580bf67d696bf316158f70467d --- /dev/null +++ b/configs/qemu-i486/nsh/ld.script @@ -0,0 +1,91 @@ +/**************************************************************************** + * configs/qemu-i486/nsh/ld.script + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_ARCH(i386) +ENTRY(__start) +SECTIONS +{ + . = 0x00100000; + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.gnu.linkonce.t.*) + _etext = ABSOLUTE(.); + } + + .text ALIGN (0x1000) : { + _srodata = ABSOLUTE(.); + *(.rodata .rodata.*) + *(.fixup) + *(.gnu.warning) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _erodata = ABSOLUTE(.); + } + + .data ALIGN (0x1000) : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } + + /* Stabs debugging sections */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/qemu-i486/nsh/setenv.sh b/configs/qemu-i486/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..25ae59d71bd344afa61d560f5a725e3429445ad5 --- /dev/null +++ b/configs/qemu-i486/nsh/setenv.sh @@ -0,0 +1,48 @@ +#!/bin/bash +# configs/qemu-i486/nsh/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +# Uncomment and modify the following if you are using anything other +# than the system GCC +# WD=`pwd` +# export BUILDROOT_BIN="${WD}/../../../buildroot/build_i486/staging_dir/bin" +# export PATH="${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/qemu-i486/ostest/Make.defs b/configs/qemu-i486/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..72f26452bb67fe32392adb67904e9a657615b3d5 --- /dev/null +++ b/configs/qemu-i486/ostest/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/qemu-i486/ostest/Make.defs +# +# Copyright (C) 2011, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script}" + MAXOPTIMIZATION = -O2 +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script +endif + +ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin +#ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin -fno-stack-protector +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHDEFINES = + +# Check if building a 32-bit target with a 64-bit toolchain + +ifeq ($(ARCH_X86_M32),y) +ARCHCPUFLAGS += -m32 +endif + +# We have to use a cross-development toolchain under Cygwin because the native +# Cygwin toolchains don't generate ELF binaries. + +ifeq ($(HOSTOS),Cygwin) +CROSSDEV = i486-nuttx-elf- +else +CROSSDEV = +endif + +CC = $(CROSSDEV)gcc +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = .elf + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDESv = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/qemu-i486/ostest/defconfig b/configs/qemu-i486/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..75ebb89269f7bf47f6fcc3a99b871a6663b56cb7 --- /dev/null +++ b/configs/qemu-i486/ostest/defconfig @@ -0,0 +1,600 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +CONFIG_ARCH_X86=y +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="x86" +CONFIG_ARCH_CHIP="qemu" + +# +# x86 Configuration Options +# +CONFIG_ARCH_I486=y +CONFIG_ARCH_CHIP_QEMU=y +CONFIG_ARCH_X86_HAVE_32BIT=y +# CONFIG_ARCH_X86_M32 is not set + +# +# Common Configuration Options +# + +# +# i486 Configuration Options +# + +# +# QEMU Configuration Options +# +# CONFIG_QEMU_KEYPAD is not set +# CONFIG_QEMU_VGA is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=999 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +CONFIG_BOOT_RUNFROMEXTSRAM=y +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00100000 +CONFIG_RAM_SIZE=1048576 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_QEMU_I486=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="qemu-i486" + +# +# Common Board Options +# + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=31 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=3 +CONFIG_DEV_CONSOLE=y +CONFIG_MUTEX_TYPES=y +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=64 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=100 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=4096 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/qemu-i486/ostest/ld.script b/configs/qemu-i486/ostest/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..e6e1c90e7b34abdad49848e5d4b1e990bd5e2b0e --- /dev/null +++ b/configs/qemu-i486/ostest/ld.script @@ -0,0 +1,91 @@ +/**************************************************************************** + * configs/qemu-i486/ostest/ld.script + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_ARCH(i386) +ENTRY(__start) +SECTIONS +{ + . = 0x00100000; + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.gnu.linkonce.t.*) + _etext = ABSOLUTE(.); + } + + .text ALIGN (0x1000) : { + _srodata = ABSOLUTE(.); + *(.rodata .rodata.*) + *(.fixup) + *(.gnu.warning) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _erodata = ABSOLUTE(.); + } + + .data ALIGN (0x1000) : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } + + /* Stabs debugging sections */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/qemu-i486/ostest/setenv.sh b/configs/qemu-i486/ostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..f9c3bdec8d6d2e8c66b5c6f8c39feae7562da0cf --- /dev/null +++ b/configs/qemu-i486/ostest/setenv.sh @@ -0,0 +1,48 @@ +#!/bin/bash +# configs/qemu-i486/ostest/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +# Uncomment and modify the following if you are using anything other +# than the system GCC +# WD=`pwd` +# export BUILDROOT_BIN="${WD}/../../../buildroot/build_i486/staging_dir/bin" +# export PATH="${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/qemu-i486/src/.gitignore b/configs/qemu-i486/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/qemu-i486/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/qemu-i486/src/Makefile b/configs/qemu-i486/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..8de2ab6596378a18c0ca3a2dd3657240042252e5 --- /dev/null +++ b/configs/qemu-i486/src/Makefile @@ -0,0 +1,41 @@ +############################################################################ +# configs/qemu-i486/src/Makefile +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = qemu_boot.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/qemu-i486/src/qemu_boot.c b/configs/qemu-i486/src/qemu_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..b7d44f9f7c0dc3be879ab00073c834bf2fb0c20c --- /dev/null +++ b/configs/qemu-i486/src/qemu_boot.c @@ -0,0 +1,82 @@ +/************************************************************************************ + * configs/qemu-i486/src/qemu_boot.c + * + * Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "qemu.h" +#include "qemu_i486.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: x86_boardinitialize + * + * Description: + * All x86 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void x86_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/qemu-i486/src/qemu_i486.h b/configs/qemu-i486/src/qemu_i486.h new file mode 100644 index 0000000000000000000000000000000000000000..6de6d7512981860fc3ee6cf897ce7ba45b6cc97f --- /dev/null +++ b/configs/qemu-i486/src/qemu_i486.h @@ -0,0 +1,67 @@ +/************************************************************************************ + * configs/qemu-i486/src/qemu_i486.h + * + * Copyright (C) 2011, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef _CONFIGS_QEMU_I486_SRC_QEMU_I486_H +#define _CONFIGS_QEMU_I486_SRC_QEMU_I486_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* GPIO Pin Definitions *************************************************************/ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_QEMU_I486_SRC_QEMU_I486_H */ diff --git a/configs/rgmp/Kconfig b/configs/rgmp/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..ba62632ecbe0b57dd6e60fcedcb6fba49fb3e38a --- /dev/null +++ b/configs/rgmp/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_RGMP + +endif # ARCH_BOARD_RGMP diff --git a/configs/rgmp/README.txt b/configs/rgmp/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..ac92ef91a48ec995cdcc15754b5d84d6413923cb --- /dev/null +++ b/configs/rgmp/README.txt @@ -0,0 +1,90 @@ +RGMP README File +================ + +RGMP stands for RTOS and GPOS on Multi-Processor. RGMP is a project for +running GPOS and RTOS simultaneously on multi-processor platforms. You can +port your favorite RTOS to RGMP together with an unmodified Linux to form a +hybrid operating system. This makes your application able to use both RTOS +and GPOS features. + +See http://rgmp.sourceforge.net/wiki/index.php/Main_Page for further +information about RGMP. + +The updated build instructions can be found at: +http://rgmp.sourceforge.net/wiki/index.php/Documentation + +Ubuntu Build Instructions +-------------------------- +Build requirements: + * x86 PC: + Ubuntu 10.04, 10.10 or 11.04 + * OMAP4430 pandaboard: + Ubuntu 11.04 + +Run requirements: + * multi-processor x86 PC: + Ubuntu 10.04, 10.10 or 11.04 + * OMAP4430 pandaboard: + Ubuntu 11.04 + +1. Download RGMP from the following URL: + + http://rgmp.sourceforge.net/wiki/index.php/Download + + You should choose a right verion of RGMP compatible with this NuttX release. + Extract the tar file: + + $ tar -xjvf rgmp-.tar.bz2 + +2. Get Linux kernel header: + + $ sudo apt-get install linux-headers-$(uname -r) + +3. Build and install RGMP: + + $ cd + $ ./configure + $ make + $ sudo make install + $ sudo /usr/rgmp/setup + $ exit + +4. Configure NuttX. For example, for the RGMP x86 NSH configuration, do the + following: + + $ cd + $ cd tools + $ ./configure.sh rgmp/x86/nsh + $ cd .. + +5. Build NuttX. Get the binary image at /kernel.img. + + $ cd + $ make + +6. Run NuttX in RGMP: + + $ cd + $ su + $ rgmp_run + + +Other Linux OS Build Instruction +-------------------------------------- +Requirements: + * multi-processor x86 PC + running Linux kernel 2.6.32, 2.6.35 or 2.6.38 + * OMAP4430 pandaboard + running Linux kernel 2.6.38 + +1. Get your running Linux kernel header under /usr/src/linux-headers-$(uname -r) + directory. + +2. Following the Ubuntu steps begin at 3. + +Note: You can configure the RGMP to find Linux kernel header in a different + place and install RGMP to a different place. See information printed + by the following instruction: + + $ cd + $ ./configure -h diff --git a/configs/rgmp/arm/default/Make.defs b/configs/rgmp/arm/default/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..ef6dcbbb3d4967cafc84add52df57d4ed5894be2 --- /dev/null +++ b/configs/rgmp/arm/default/Make.defs @@ -0,0 +1,96 @@ +############################################################################ +# configs/rgmp/default/Make.defs +# +# Copyright (C) 2011 Yu Qiang. All rights reserved. +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Authors: Yu Qiang +# Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +RGMPLIBDIR := $(RGMP_INST_DIR)/lib +RGMPINCDIR := $(RGMP_INST_DIR)/include +RGMPLKSCPT := $(RGMP_INST_DIR)/etc/rgmp.ld + +HOSTOS = ${shell uname -o} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -O2 -gstabs +else + ARCHOPTIMIZATION = -O2 +endif + +ARCHCPUFLAGS = -fno-builtin -nostdinc -fno-stack-protector -fno-omit-frame-pointer \ + -marm -march=armv7-a +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \ + -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/arm +ARCHSCRIPT = + +CROSSDEV = +CC = $(CROSSDEV)gcc +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDFLAGS += -nostdlib +EXTRA_LIBS = + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/rgmp/arm/default/defconfig b/configs/rgmp/arm/default/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..5089009ade13952264e2db1afc438212af67ce90 --- /dev/null +++ b/configs/rgmp/arm/default/defconfig @@ -0,0 +1,661 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +CONFIG_ARCH_STDINT_H=y +CONFIG_ARCH_STDBOOL_H=y +CONFIG_ARCH_MATH_H=y +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +CONFIG_ARCH_RGMP=y +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="rgmp" + +# +# RGMP Configuration Options +# +CONFIG_RGMP_SUBARCH_ARM=y +# CONFIG_RGMP_SUBARCH_X86 is not set +CONFIG_RGMP_SUBARCH="arm" + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_RGMP=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="rgmp" + +# +# Common Board Options +# + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=1000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=31 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=27 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="rgmp_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=64 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +CONFIG_NET_VNET=y +CONFIG_VNET_NINTERFACES=1 +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +CONFIG_NET_IPv4=y +# CONFIG_NET_MULTIBUFFER is not set +# CONFIG_NET_PROMISCUOUS is not set +CONFIG_NSOCKET_DESCRIPTORS=5 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set +CONFIG_NET_ETH_MTU=1514 +# CONFIG_NET_TCPURGDATA is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y +# CONFIG_NET_IGMP is not set +CONFIG_NET_STATISTICS=y +CONFIG_NET_ETH_TCP_RECVWNDO=1460 +CONFIG_NET_ARPTAB_SIZE=16 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=0 + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_ETHERNET=y + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +CONFIG_ARCH_OPTIMIZED_FUNCTIONS=y +CONFIG_ARCH_MEMCPY=y +CONFIG_ARCH_MEMCMP=y +CONFIG_ARCH_MEMMOVE=y +CONFIG_ARCH_MEMSET=y +# CONFIG_ARCH_STRCHR is not set +CONFIG_ARCH_STRCMP=y +CONFIG_ARCH_STRCPY=y +CONFIG_ARCH_STRNCPY=y +CONFIG_ARCH_STRLEN=y +CONFIG_ARCH_STRNLEN=y +# CONFIG_ARCH_BZERO is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +CONFIG_EXAMPLES_RGMP=y +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/rgmp/arm/default/setenv.sh b/configs/rgmp/arm/default/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..bfb02549bd4817af97a105e83286aff6683c57af --- /dev/null +++ b/configs/rgmp/arm/default/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# config/rgmp/default/setenv.sh +# +# Copyright (C) 2011 Yu Qiang. All rights reserved. +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Authors: Yu Qiang +# Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/rgmp/arm/nsh/Make.defs b/configs/rgmp/arm/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..3361618528b105d832790d73dc98897643b90c01 --- /dev/null +++ b/configs/rgmp/arm/nsh/Make.defs @@ -0,0 +1,96 @@ +############################################################################ +# configs/rgmp/nsh/Make.defs +# +# Copyright (C) 2011 Yu Qiang. All rights reserved. +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Authors: Yu Qiang +# Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +RGMPLIBDIR := $(RGMP_INST_DIR)/lib +RGMPINCDIR := $(RGMP_INST_DIR)/include +RGMPLKSCPT := $(RGMP_INST_DIR)/etc/rgmp.ld + +HOSTOS = ${shell uname -o} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -O2 -gstabs +else + ARCHOPTIMIZATION = -O2 +endif + +ARCHCPUFLAGS = -fno-builtin -nostdinc -fno-stack-protector -fno-omit-frame-pointer \ + -marm -march=armv7-a +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \ + -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/arm +ARCHSCRIPT = + +CROSSDEV = +CC = $(CROSSDEV)gcc +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDFLAGS += -nostdlib +EXTRA_LIBS = + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/rgmp/arm/nsh/defconfig b/configs/rgmp/arm/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..e6422b47095f60aa14004df530550b605e3dbde2 --- /dev/null +++ b/configs/rgmp/arm/nsh/defconfig @@ -0,0 +1,770 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +CONFIG_ARCH_STDINT_H=y +CONFIG_ARCH_STDBOOL_H=y +CONFIG_ARCH_MATH_H=y +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set +# CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_AUDIO is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +CONFIG_ARCH_RGMP=y +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="rgmp" + +# +# RGMP Configuration Options +# +CONFIG_RGMP_SUBARCH_ARM=y +# CONFIG_RGMP_SUBARCH_X86 is not set +CONFIG_RGMP_SUBARCH="arm" + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_RGMP=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="rgmp" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=1000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=31 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=27 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=64 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_NET_DUMPPACKET is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +CONFIG_NET_VNET=y +CONFIG_VNET_NINTERFACES=1 +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +CONFIG_NET_IPv4=y +# CONFIG_NET_MULTIBUFFER is not set +# CONFIG_NET_PROMISCUOUS is not set +CONFIG_NSOCKET_DESCRIPTORS=5 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set +CONFIG_NET_ETH_MTU=1514 +# CONFIG_NET_TCPURGDATA is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y +# CONFIG_NET_IGMP is not set +CONFIG_NET_STATISTICS=y +CONFIG_NET_ETH_TCP_RECVWNDO=1460 +CONFIG_NET_ARPTAB_SIZE=8 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=0 + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_ETHERNET=y + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +CONFIG_ARCH_OPTIMIZED_FUNCTIONS=y +CONFIG_ARCH_MEMCPY=y +CONFIG_ARCH_MEMCMP=y +CONFIG_ARCH_MEMMOVE=y +CONFIG_ARCH_MEMSET=y +# CONFIG_ARCH_STRCHR is not set +CONFIG_ARCH_STRCMP=y +CONFIG_ARCH_STRCPY=y +CONFIG_ARCH_STRNCPY=y +CONFIG_ARCH_STRLEN=y +CONFIG_ARCH_STRNLEN=y +# CONFIG_ARCH_BZERO is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +CONFIG_NETUTILS_DHCPC=y +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +CONFIG_LIBC_NETDB=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_TFTPC=y +# CONFIG_NETUTILS_THTTPD is not set +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 +CONFIG_NSH_LINELEN=40 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_TMPDIR="/tmp" +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_CONSOLE=y + +# +# USB Trace Support +# +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_DHCPC is not set +CONFIG_NSH_IPADDR=0xc0a80a02 +CONFIG_NSH_DRIPADDR=0xc0a80a01 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/rgmp/arm/nsh/setenv.sh b/configs/rgmp/arm/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..b2180473be88bd929e3b09fd39ed6b7574196298 --- /dev/null +++ b/configs/rgmp/arm/nsh/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# config/rgmp/nsh/setenv.sh +# +# Copyright (C) 2011 Yu Qiang. All rights reserved. +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Authors: Yu Qiang +# Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/rgmp/include/stdarg.h b/configs/rgmp/include/stdarg.h new file mode 100644 index 0000000000000000000000000000000000000000..b748243d155f26e4e54ab596a82d6a5c07898b9d --- /dev/null +++ b/configs/rgmp/include/stdarg.h @@ -0,0 +1,8 @@ +#ifndef _CONFIG_RGMP_STDARG_H +#define _CONFIG_RGMP_STDARG_H + + +#include + + +#endif diff --git a/configs/rgmp/x86/cxxtest/Make.defs b/configs/rgmp/x86/cxxtest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..1070975f21321cf90880f1efad0efc15def2ffc5 --- /dev/null +++ b/configs/rgmp/x86/cxxtest/Make.defs @@ -0,0 +1,107 @@ +#################################################################################### +# configs/rgmp/default/Make.defs +# +# Copyright (C) 2011 Yu Qiang. All rights reserved. +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Authors: Yu Qiang +# Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +RGMPLIBDIR := $(RGMP_INST_DIR)/lib +RGMPINCDIR := $(RGMP_INST_DIR)/include +RGMPLKSCPT := $(RGMP_INST_DIR)/etc/rgmp.ld + +HOSTOS = ${shell uname -o} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -O2 -gstabs +else + ARCHOPTIMIZATION = -O2 +endif + +#ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin +ARCHCPUFLAGS = -fno-builtin -nostdinc -fno-stack-protector +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = -D__RGMP_KERNEL__ -D__RTOS_KERNEL__ -D__SHARE_KERNEL__ +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \ + -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/x86 + +ARCHXXDEFINES = +ARCHXXINCLUDES = -I$(TOPDIR)/include/cxx -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \ + -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/x86 \ + -I$(TOPDIR)/include/uClibc++ + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) \ + $(ARCHXXDEFINES) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) \ + -pipe -nodefaultlibs -nostdinc++ +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDFLAGS += -nostdlib +EXTRA_LIBS = $(shell $(CC) -print-file-name=libsupc++.a) \ + $(shell $(CC) -print-file-name=libgcc_eh.a) + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/rgmp/x86/cxxtest/defconfig b/configs/rgmp/x86/cxxtest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..80f6559d66e7246a87436651d8acfee2ded5f8d2 --- /dev/null +++ b/configs/rgmp/x86/cxxtest/defconfig @@ -0,0 +1,702 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +CONFIG_ARCH_STDINT_H=y +CONFIG_ARCH_STDBOOL_H=y +CONFIG_ARCH_MATH_H=y +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_VERBOSE=y + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set +# CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_AUDIO is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +CONFIG_ARCH_RGMP=y +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="rgmp" + +# +# RGMP Configuration Options +# +# CONFIG_RGMP_SUBARCH_ARM is not set +CONFIG_RGMP_SUBARCH_X86=y +CONFIG_RGMP_SUBARCH="x86" + +# +# x86 Peripheral Selections +# +CONFIG_COM1=y +CONFIG_COM2=y +# CONFIG_COM3 is not set +# CONFIG_COM4 is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_RGMP=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="rgmp" + +# +# Common Board Options +# + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=1000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=31 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=27 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="cxxtest_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=64 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_NET_DUMPPACKET is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +CONFIG_NET_VNET=y +CONFIG_VNET_NINTERFACES=1 +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +CONFIG_NET_IPv4=y +# CONFIG_NET_MULTIBUFFER is not set +# CONFIG_NET_PROMISCUOUS is not set +CONFIG_NSOCKET_DESCRIPTORS=5 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set +CONFIG_NET_ETH_MTU=1514 +# CONFIG_NET_TCPURGDATA is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y +# CONFIG_NET_IGMP is not set +CONFIG_NET_STATISTICS=y +CONFIG_NET_ETH_TCP_RECVWNDO=1460 +CONFIG_NET_ARPTAB_SIZE=16 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=0 + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_ETHERNET=y + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +CONFIG_ARCH_OPTIMIZED_FUNCTIONS=y +CONFIG_ARCH_MEMCPY=y +CONFIG_ARCH_MEMCMP=y +CONFIG_ARCH_MEMMOVE=y +CONFIG_ARCH_MEMSET=y +CONFIG_ARCH_STRCHR=y +CONFIG_ARCH_STRCMP=y +CONFIG_ARCH_STRCPY=y +CONFIG_ARCH_STRNCPY=y +CONFIG_ARCH_STRLEN=y +CONFIG_ARCH_STRNLEN=y +# CONFIG_ARCH_BZERO is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +CONFIG_UCLIBCXX=y +CONFIG_UCLIBCXX_EXCEPTION=y +CONFIG_UCLIBCXX_IOSTREAM_BUFSIZE=32 +CONFIG_UCLIBCXX_HAVE_LIBSUPCXX=y + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +CONFIG_EXAMPLES_CXXTEST=y +CONFIG_EXAMPLES_CXXTEST_CXXINITIALIZE=y +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/rgmp/x86/cxxtest/setenv.sh b/configs/rgmp/x86/cxxtest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..a6a533e477cc29970cdc716f5fb7c581020b9dd8 --- /dev/null +++ b/configs/rgmp/x86/cxxtest/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# config/rgmp/default/setenv.sh +# +# Copyright (C) 2011 Yu Qiang. All rights reserved. +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Authors: Yu Qiang +# Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/rgmp/x86/default/Make.defs b/configs/rgmp/x86/default/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..2fed4fdcf867522b020a057875affe75d39b2ce2 --- /dev/null +++ b/configs/rgmp/x86/default/Make.defs @@ -0,0 +1,95 @@ +############################################################################ +# configs/rgmp/default/Make.defs +# +# Copyright (C) 2011 Yu Qiang. All rights reserved. +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Authors: Yu Qiang +# Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +RGMPLIBDIR := $(RGMP_INST_DIR)/lib +RGMPINCDIR := $(RGMP_INST_DIR)/include +RGMPLKSCPT := $(RGMP_INST_DIR)/etc/rgmp.ld + +HOSTOS = ${shell uname -o} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -O2 -gstabs +else + ARCHOPTIMIZATION = -O2 +endif + +ARCHCPUFLAGS = -fno-builtin -nostdinc -fno-stack-protector +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHDEFINES = -D__RGMP_KERNEL__ -D__RTOS_KERNEL__ -D__SHARE_KERNEL__ +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \ + -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/x86 +ARCHSCRIPT = + +CROSSDEV = +CC = $(CROSSDEV)gcc +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDFLAGS += -nostdlib +EXTRA_LIBS = + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/rgmp/x86/default/defconfig b/configs/rgmp/x86/default/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..58c51f727bc9cc40b84eb1a0d7cb0690e325f959 --- /dev/null +++ b/configs/rgmp/x86/default/defconfig @@ -0,0 +1,669 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +CONFIG_ARCH_STDINT_H=y +CONFIG_ARCH_STDBOOL_H=y +CONFIG_ARCH_MATH_H=y +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +CONFIG_ARCH_RGMP=y +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="rgmp" + +# +# RGMP Configuration Options +# +# CONFIG_RGMP_SUBARCH_ARM is not set +CONFIG_RGMP_SUBARCH_X86=y +CONFIG_RGMP_SUBARCH="x86" + +# +# x86 Peripheral Selections +# +CONFIG_COM1=y +CONFIG_COM2=y +# CONFIG_COM3 is not set +# CONFIG_COM4 is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_RGMP=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="rgmp" + +# +# Common Board Options +# + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=1000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=31 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=27 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="rgmp_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=64 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +CONFIG_NET_VNET=y +CONFIG_VNET_NINTERFACES=1 +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +CONFIG_NET_IPv4=y +# CONFIG_NET_MULTIBUFFER is not set +# CONFIG_NET_PROMISCUOUS is not set +CONFIG_NSOCKET_DESCRIPTORS=5 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set +CONFIG_NET_ETH_MTU=1514 +# CONFIG_NET_TCPURGDATA is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y +# CONFIG_NET_IGMP is not set +CONFIG_NET_STATISTICS=y +CONFIG_NET_ETH_TCP_RECVWNDO=1460 +CONFIG_NET_ARPTAB_SIZE=16 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=0 + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_ETHERNET=y + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +CONFIG_ARCH_OPTIMIZED_FUNCTIONS=y +CONFIG_ARCH_MEMCPY=y +CONFIG_ARCH_MEMCMP=y +CONFIG_ARCH_MEMMOVE=y +CONFIG_ARCH_MEMSET=y +CONFIG_ARCH_STRCHR=y +CONFIG_ARCH_STRCMP=y +CONFIG_ARCH_STRCPY=y +CONFIG_ARCH_STRNCPY=y +CONFIG_ARCH_STRLEN=y +CONFIG_ARCH_STRNLEN=y +# CONFIG_ARCH_BZERO is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +CONFIG_EXAMPLES_RGMP=y +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/rgmp/x86/default/setenv.sh b/configs/rgmp/x86/default/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..bfb02549bd4817af97a105e83286aff6683c57af --- /dev/null +++ b/configs/rgmp/x86/default/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# config/rgmp/default/setenv.sh +# +# Copyright (C) 2011 Yu Qiang. All rights reserved. +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Authors: Yu Qiang +# Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/rgmp/x86/helloxx/Make.defs b/configs/rgmp/x86/helloxx/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..458d1c5fac9692758c0ca3723caba38fe490706d --- /dev/null +++ b/configs/rgmp/x86/helloxx/Make.defs @@ -0,0 +1,105 @@ +#################################################################################### +# configs/rgmp/default/Make.defs +# +# Copyright (C) 2011 Yu Qiang. All rights reserved. +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Authors: Yu Qiang +# Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +RGMPLIBDIR := $(RGMP_INST_DIR)/lib +RGMPINCDIR := $(RGMP_INST_DIR)/include +RGMPLKSCPT := $(RGMP_INST_DIR)/etc/rgmp.ld + +HOSTOS = ${shell uname -o} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -O2 -gstabs +else + ARCHOPTIMIZATION = -O2 +endif + +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGS = -fno-builtin -nostdinc -fno-stack-protector +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = -D__RGMP_KERNEL__ -D__RTOS_KERNEL__ -D__SHARE_KERNEL__ +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \ + -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/x86 + +ARCHXXINCLUDES = -I$(TOPDIR)/include/cxx -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \ + -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/x86 \ + -I$(TOPDIR)/include/uClibc++ + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) \ + $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe -nodefaultlibs \ + -nostdinc++ +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDFLAGS += -nostdlib +EXTRA_LIBS = $(shell $(CC) -print-file-name=libsupc++.a) \ + $(shell $(CC) -print-file-name=libgcc_eh.a) + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/rgmp/x86/helloxx/defconfig b/configs/rgmp/x86/helloxx/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d7f663d4cb6b31ebdd870668633e10d143cc9f2a --- /dev/null +++ b/configs/rgmp/x86/helloxx/defconfig @@ -0,0 +1,699 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +CONFIG_ARCH_STDINT_H=y +CONFIG_ARCH_STDBOOL_H=y +CONFIG_ARCH_MATH_H=y +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_VERBOSE=y + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set +# CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_AUDIO is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +CONFIG_ARCH_RGMP=y +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="rgmp" + +# +# RGMP Configuration Options +# +# CONFIG_RGMP_SUBARCH_ARM is not set +CONFIG_RGMP_SUBARCH_X86=y +CONFIG_RGMP_SUBARCH="x86" + +# +# x86 Peripheral Selections +# +CONFIG_COM1=y +CONFIG_COM2=y +# CONFIG_COM3 is not set +# CONFIG_COM4 is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_RGMP=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="rgmp" + +# +# Common Board Options +# + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=1000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=31 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=27 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="helloxx_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=64 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_NET_DUMPPACKET is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +CONFIG_NET_VNET=y +CONFIG_VNET_NINTERFACES=1 +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +CONFIG_NET_IPv4=y +# CONFIG_NET_MULTIBUFFER is not set +# CONFIG_NET_PROMISCUOUS is not set +CONFIG_NSOCKET_DESCRIPTORS=5 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set +CONFIG_NET_ETH_MTU=1514 +# CONFIG_NET_TCPURGDATA is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y +# CONFIG_NET_IGMP is not set +CONFIG_NET_STATISTICS=y +CONFIG_NET_ETH_TCP_RECVWNDO=1460 +CONFIG_NET_ARPTAB_SIZE=16 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=0 + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_ETHERNET=y + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +CONFIG_ARCH_OPTIMIZED_FUNCTIONS=y +CONFIG_ARCH_MEMCPY=y +CONFIG_ARCH_MEMCMP=y +CONFIG_ARCH_MEMMOVE=y +CONFIG_ARCH_MEMSET=y +CONFIG_ARCH_STRCHR=y +CONFIG_ARCH_STRCMP=y +CONFIG_ARCH_STRCPY=y +CONFIG_ARCH_STRNCPY=y +CONFIG_ARCH_STRLEN=y +CONFIG_ARCH_STRNLEN=y +# CONFIG_ARCH_BZERO is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +CONFIG_EXAMPLES_HELLOXX=y +CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/rgmp/x86/helloxx/setenv.sh b/configs/rgmp/x86/helloxx/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..a6a533e477cc29970cdc716f5fb7c581020b9dd8 --- /dev/null +++ b/configs/rgmp/x86/helloxx/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# config/rgmp/default/setenv.sh +# +# Copyright (C) 2011 Yu Qiang. All rights reserved. +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Authors: Yu Qiang +# Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/rgmp/x86/nsh/Make.defs b/configs/rgmp/x86/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..fb81d4f577afce6eabef0e7475942befa3245061 --- /dev/null +++ b/configs/rgmp/x86/nsh/Make.defs @@ -0,0 +1,95 @@ +############################################################################ +# configs/rgmp/nsh/Make.defs +# +# Copyright (C) 2011 Yu Qiang. All rights reserved. +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Authors: Yu Qiang +# Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +RGMPLIBDIR := $(RGMP_INST_DIR)/lib +RGMPINCDIR := $(RGMP_INST_DIR)/include +RGMPLKSCPT := $(RGMP_INST_DIR)/etc/rgmp.ld + +HOSTOS = ${shell uname -o} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -O2 -gstabs +else + ARCHOPTIMIZATION = -O2 +endif + +ARCHCPUFLAGS = -fno-builtin -nostdinc -fno-stack-protector +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHDEFINES = -D__RGMP_KERNEL__ -D__RTOS_KERNEL__ -D__SHARE_KERNEL__ +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include -I$(RGMPINCDIR) \ + -I$(TOPDIR)/configs/rgmp/include -I$(TOPDIR)/arch/rgmp/include/x86 +ARCHSCRIPT = + +CROSSDEV = +CC = $(CROSSDEV)gcc +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDFLAGS += -nostdlib +EXTRA_LIBS = + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/rgmp/x86/nsh/defconfig b/configs/rgmp/x86/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..74022b3e8d654c66cb00ecdce98260b670b0821c --- /dev/null +++ b/configs/rgmp/x86/nsh/defconfig @@ -0,0 +1,783 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +CONFIG_ARCH_STDINT_H=y +CONFIG_ARCH_STDBOOL_H=y +CONFIG_ARCH_MATH_H=y +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set +# CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_AUDIO is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +CONFIG_ARCH_RGMP=y +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="rgmp" + +# +# RGMP Configuration Options +# +# CONFIG_RGMP_SUBARCH_ARM is not set +CONFIG_RGMP_SUBARCH_X86=y +CONFIG_RGMP_SUBARCH="x86" + +# +# x86 Peripheral Selections +# +CONFIG_COM1=y +CONFIG_COM2=y +# CONFIG_COM3 is not set +# CONFIG_COM4 is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_RGMP=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="rgmp" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=1000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=31 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=27 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=64 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_NET_DUMPPACKET is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +CONFIG_NET_VNET=y +CONFIG_VNET_NINTERFACES=1 +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +CONFIG_NET_IPv4=y +# CONFIG_NET_MULTIBUFFER is not set +# CONFIG_NET_PROMISCUOUS is not set +CONFIG_NSOCKET_DESCRIPTORS=5 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set +CONFIG_NET_ETH_MTU=1514 +# CONFIG_NET_TCPURGDATA is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y +# CONFIG_NET_IGMP is not set +CONFIG_NET_STATISTICS=y +CONFIG_NET_ETH_TCP_RECVWNDO=1460 +CONFIG_NET_ARPTAB_SIZE=8 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=0 + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_ETHERNET=y + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +CONFIG_ARCH_OPTIMIZED_FUNCTIONS=y +CONFIG_ARCH_MEMCPY=y +CONFIG_ARCH_MEMCMP=y +CONFIG_ARCH_MEMMOVE=y +CONFIG_ARCH_MEMSET=y +CONFIG_ARCH_STRCHR=y +CONFIG_ARCH_STRCMP=y +CONFIG_ARCH_STRCPY=y +CONFIG_ARCH_STRNCPY=y +CONFIG_ARCH_STRLEN=y +CONFIG_ARCH_STRNLEN=y +# CONFIG_ARCH_BZERO is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +CONFIG_NETUTILS_CODECS=y +# CONFIG_CODECS_BASE64 is not set +# CONFIG_CODECS_HASH_MD5 is not set +# CONFIG_CODECS_URLCODE is not set +# CONFIG_CODECS_URLCODE_NEWMEMORY is not set +# CONFIG_CODECS_AVR_URLCODE is not set +CONFIG_NETUTILS_DHCPC=y +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +CONFIG_LIBC_NETDB=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_TFTPC=y +# CONFIG_NETUTILS_THTTPD is not set +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 +CONFIG_NSH_LINELEN=40 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_TMPDIR="/tmp" +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_CONSOLE=y + +# +# USB Trace Support +# +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_DHCPC is not set +CONFIG_NSH_IPADDR=0xc0a80a02 +CONFIG_NSH_DRIPADDR=0xc0a80a01 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/rgmp/x86/nsh/setenv.sh b/configs/rgmp/x86/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..b2180473be88bd929e3b09fd39ed6b7574196298 --- /dev/null +++ b/configs/rgmp/x86/nsh/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# config/rgmp/nsh/setenv.sh +# +# Copyright (C) 2011 Yu Qiang. All rights reserved. +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Authors: Yu Qiang +# Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sabre-6quad/Kconfig b/configs/sabre-6quad/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..d7e5d1dc9993e958f7d46b36710b4e608131242d --- /dev/null +++ b/configs/sabre-6quad/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SABRE6QUAD +endif diff --git a/configs/sabre-6quad/README.txt b/configs/sabre-6quad/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..07eb1d95f38a2585bf0aecaac0ace025642d44ad --- /dev/null +++ b/configs/sabre-6quad/README.txt @@ -0,0 +1,483 @@ +README.txt +========== + +This directory holds a port of NuttX to the NXP/Freescale Sabre board +featuring the iMX 6Quad CPU. + +Contents +======== + + - Status + - Platform Features + - Serial Console + - LEDs and Buttons + - Using U-Boot to Run NuttX + - Debugging with the Segger J-Link + - Configurations + +Status +====== + +2016-02-28: The i.MX6Q port is just beginning. A few files have been +populated with the port is a long way from being complete or even ready to +begin any kind of testing. + +2016-03-12: The i.MX6Q port is code complete including initial +implementation of logic needed for CONFIG_SMP=y . There is no clock +configuration logic. This is probably not an issue if we are loaded into +SDRAM by a bootloader (because we cannot change the clocking anyway in +that case). + +There is a lot of testing that could be done but, unfortunately, I still +have no i.MX6 hardware to test on. + +2016-03-28: I now have a used MCIMX6Q-SDB which is similar to the target +configuration described below except that it does not have the 10.1" LVDS +display. Next step: Figure out how to run a copy of NuttX using U-Boot. + +2016-03-31: Most all of the boot of the NSH configuration seems to be +working. It gets to NSH and NSH appears to run normally. Non-interrupt +driver serial output to the VCOM console is working (llsyslog). However, +there does not appear to be any interrupt activity: No timer interrupts, +no interrupt driver serial console output (syslog, printf). + +Platform Features +================= + +Processor: + - i.MX 6Quad or 6DualLite 1 GHz ARM Cortex-A9 processor +Memory/storage: + - 1 GB DDR3 SDRAM up to 533 MHz (1066 MTPS) memory + - 8 GB eMMC flash + - 4 MB SPI NOR flash +Display: + - 10.1" 1024 x 768 LVDS display with integrated P-cap sensing + - HDMI connector + - LVDS connector (for optional second display) + - LCD expansion connector (parallel, 24-bit) + - EPDC expansion connector (for 6DualLite only) + - MIPI DSI connector (two data lanes, 1 GHz each) +User Interface: + - 10.1" capacitive multitouch display + - Buttons: power, reset, volume +Power Management: + - Proprietary PF0100 PMIC +Audio: + - Audio codec + - 2x digital microphones + - 2x 3.5 mm audio ports + - Dual 1 watt speakers +Expansion Connector: + - Camera MIPI CSI port + - I2C, SPI signals +Connectivity: + - 2x full-size SD/MMC card slots + - 7-pin SATA data connector + - 10/100/1000 Ethernet port + - 1x USB 2.0 OTG port (micro USB) +Debug: + - JTAG connector (20-pin) + - 1x Serial-to-USB connector (for JTAG) +OS Support: + - Linux® and Android™ from NXP/Freescale + - Others supported via third party (QNX, Windows Embedded) +Tools Support: + - Manufacturing tool from NXP/Freescale + - IOMUX tool from NXP/Freescale + - Lauterbach, ARM (DS-5), IAR and Macraigor +Additional Features: + - Proprietary 3-axis accelerometer + - Proprietary 3D magnetometer + - Ambient light sensor + - GPS receiver module + - 2x 5MP cameras + - Battery charger + - Battery connectors (battery not included) + +Serial Console +============== + +A DEBUG VCOM is available MICRO USB AB 5 J509. This corresponds to UART1 +from the i.MX6. UART1 connects to J509 via the CSIO_DAT10 and CSIO_DAT11 +pins + +LEDs and Buttons +================ + +LEDs +---- +A single LED is available driven GPIO1_IO02. On the schematic this is +USR_DEF_RED_LED signal to pin T1 (GPIO_2). This signal is shared with +KEY_ROW6 (ALT2). A low value illuminates the LED. + +This LED is not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/sam_autoleds.c. The LED is used to encode +OS-related events as follows: + + ------------------- ----------------------- ------ + SYMBOL Meaning LED + ------------------- ----------------------- ------ + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt N/C + LED_SIGNAL In a signal handler N/C + LED_ASSERTION An assertion failed N/C + LED_PANIC The system has crashed FLASH + +Thus if the LED is statically on, NuttX has successfully booted and is, +apparently, running normally. If the LED is flashing at approximately +2Hz, then a fatal error has been detected and the system has halted. + +Buttons +------- + +Using U-Boot to Run NuttX +========================= + +The MCIMX6Q-SDB comes with a 8GB SD card containing the U-Boot and Android. +You simply put the SD card in the SD card slot SD3 (on the bottom of the +board next to the HDMI connect) and Android will boot. + +But we need some other way to boot NuttX. Here are some things that I have +experimented with. + +Building U-Boot (Failed Attempt #1) +----------------------------------- + +I have been unsuccessful getting building a working version of u-boot from +scratch. It builds, but it does not run. Here are the things I did: + +1. Get a copy of the u-boot i.MX6 code via: + + https://github.com/boundarydevices/u-boot-imx6/tree/production + + or + + $ git clone git://git.denx.de/u-boot.git + +2. Build U-Boot for the i.MX6Q Sabre using the following steps. This + assumes that you have the path to your arm-none-eabi- toolchain at the + beginning of your PATH variable: + + $ cd u-boot + $ export ARCH=arm + $ export CROSS_COMPILE=arm-none-eabi- + $ make mx6qsabresd_config + $ make + + This should create a number of files, including u-boot.imx + +3. Format an SD card + + Create a FAT16 partition at an offset of about 1MB into the SD card. + This is where we will put nuttx.bin. + +4. Put U-Boot on SD. U-boot should reside at offset 1024B of your SD + card. To put it there, do: + + $ dd if=u-boot.imx of=/dev/ bs=1k seek=1 + $ sync + + Your SD card device is typically something in /dev/sd or + /dev/mmcblk. Note that you need write permissions on the SD card + for the command to succeed, so you might need to su - as root, or use + sudo, or do a chmod a+w as root on the SD card device node to grant + permissions to users. + +Using the Other SD Card Slot (Failed Attempt #2) +------------------------------------------------ + +Another option is to use the version u-boot that came on the 8GB but put +NuttX on another SD card inserted in the other SD card slot at the opposite +corner of the board. + +To make a long story short: This doesn't work. As far as I can tell, +U-Boot does not support any other other SC card except for mmc 2 with is the +boot SD card slot. + +Replace Boot SD Card (Successful Attempt #3) +-------------------------------------------- + +What if you remove the SD card after U-boot has booted, then then insert +another SD card containing the nuttx.bin image? + +1. Build nuttx.bin and copy it only a FAT formated SD card. Insert the SD + card containing NuttX into the "other" SD card slot. Insert the 8GB SD + card with U-boot already on it in the normal, boot SD card slot. + +2. Connect the VCOM port using the USB port next to the boot SD card slot. + +3. Start a console at 11500 8N1 on the VCOM port + +4. Power up the board with the 8GB SD card in place. U-Boot will start and + countdown before starting Linux. Press enter to break into U-Boot before + Linux is started. + +5. Remove the 8GB U-Boot SD card; insert in its place. + +6. Rescan the SD card: + + MX6Q SABRESD U-Boot > mmc dev 2 + mmc2 is current device + MX6Q SABRESD U-Boot > mmc rescan + MX6Q SABRESD U-Boot > fatls mmc 2 + system volume information/ + 87260 nuttx.bin + + 1 file(s), 1 dir(s) + +7. Then we can boot NuttX off the rescanned SD card: + + MX6Q SABRESD U-Boot > fatload mmc 2 0x10800000 nuttx.bin + reading nuttx.bin + + 87260 bytes read + MX6Q SABRESD U-Boot > go 0x10800040 + ## Starting application at 0x10800040 ... + + That seems to work okay. + +Use the FAT Partition on the 8GB SD Card (Untested Idea #4) +----------------------------------------------------------- + +Partition 4 on the SD card is an Android FAT file system. So one thing you +could do would be put the nuttx.bin file on that partition, then boot like: + + MX6Q SABRESD U-Boot > fatload mmc 2:4 0x10800000 nuttx.bin + +SD Card Image Copy (Successful Attempt #5) +------------------------------------- + +You can use the 'dd' command to copy the first couple of megabytes from the +8GB SD card and copy that to another SD card. You then have to use 'fdisk' +to fix the partition table and to add a single FAT16 partition at an offset +of 1MB or so. + +1. Insert the 8GB boot SD card into your PC: Copy the first 2Mb from the SD + card to a file: + + $ dd if=/dev/sdh of=sdh.img bs=512 count=4096 + +2. Remove the 8GB boot SD card and replace it with a fresh SD card. Copy the + saved file to the first the new SD card: + + $ dd of=/dev/sdh if=sdh.img bs=512 count=4096 + +3. Then use 'fdisk' to: + + - Remove all of the non-existent partitions created by the 'dd' copy. + - Make a single FAT16 partition at the end of the SD card. + + You will also need to format the partion for FAT. + +4. You can put nuttx.bin here and then boot very simply with: + + MX6Q SABRESD U-Boot > fatload mmc 2:1 0x10800000 nuttx.bin + MX6Q SABRESD U-Boot > go 0x10800040 + +A little hokey, but not such a bad solution. + +Debugging with the Segger J-Link +================================ + +These procedures work for debugging the boot-up sequence when there is a +single CPU running and not much else going on. If you want to do higher +level debugger, you will need something more capable. NXP/Freescale suggest +some other debuggers that you might want to consider. + +These instructions all assume that you have built NuttX with debug symbols +enabled. When debugging the nuttx.bin file on the SD card, it is also +assumed the the nuttx ELF file with the debug symbol addresses is from the +same build so that the symbols match up. + +Debugging the NuttX image on the SD card +---------------------------------------- + +1. Connect the J-Link to the 20-pin JTAG connector. + +2. Connect the "USB TO UART" USB VCOM port to the host PC. Start a + terminal emulation program like TeraTerm on Minicom. Select the USB + VCOM serial port at 115200 8N1. + + When you apply power to the board, you should see the U-Boot messages in + the terminal window. Stop the U-Boot countdown to get to the U-Boot + prompt. + +2. Start the Segger GDB server: + + Target: MCIMX6Q6 + Target Interface: JTAG + + If the GDB server starts correctly you should see the following in the + Log output: + + Waiting for GDB Connection + +3. In another Xterm terminal window, start arm-none-eabi-gdb and connect to + the GDB server. + + From the Xterm Window: + $ arm-none-eabi-gdb + + You will need to have the path to the arm-none-eabi-gdb program in your + PATH variable. + + Then from GDB: + gdb> target connect localhost:2331 + gdb> mon halt + +4. Start U-boot under GDB control: + + From GDB: + gdb> mon reset + gdb> mon go + + Again stop the U-Boot countdown to get to the U-Boot prompt. + +5. Load NuttX from the SD card into RAM + + From U-Boot: + MX6Q SABRESD U-Boot > fatload mmc 2:1 0x10800000 nuttx.bin + +6. Load symbols and set a breakpoint + + From GDB: + gdb> mon halt + gdb> file nuttx + gdb> b __start + gdb> c + + __start is the entry point into the NuttX binary at 0x10800040. You can, + of course, use a different symbol if you want to start debugging later + in the boot sequence. + +7. Start NuttX + + From U-Boot: + MX6Q SABRESD U-Boot > go 0x10800040 + +8. You should hit the breakpoint that you set above and be off and + debugging. + +Debugging a Different NuttX Image +--------------------------------- + +Q: What if I want do run a different version of nuttx than the nuttx.bin + file on the SD card. I just want to build and debug without futzing with + the SD card. Can I do that? + +A: Yes with the following modifications to the prodecure above. + + - Skip step 5, don't bother to load NuttX into RAM + - In step 6, load NuttX into RAM like this: + + gdb> mon halt + gdb> load nuttx <-- Loads NuttX into RAM at 0x010800000 + gdb> file nuttx + gdb> b __start + gdb> c + + - Then after step 7, you should hit the breakpoint at the instruction you + just loaded at address 0x10800040. + + - Or, in step 6, instead of continuing ('c') which will resume U-Boot, + even just: + + gdb> mon halt + gdb> load nuttx <-- Loads NuttX into RAM at 0x010800000 + gdb> file nuttx + gdb> mon set pc 0x10800040 + gdb> s + + The final single will then step into the freshly loaded program. + You can then forget about steps 7 and 8. + + This is, in fact, my preferred way to debug. + + You can restart the debug session at any time at the gdb> prompt by: + + gdb> mon reset + gdb> mon go + + That will restart U-Boot and you have to press ENTER in the terminal + window to stop U-Boot. Restarting U-Boot is a necesary part of the + restart process because you need to put the hardware back in its initial + state before running NuttX + + Then this will restart the debug session just as before: + + gdb> mon halt + gdb> load nuttx <-- Loads NuttX into RAM at 0x010800000 + gdb> file nuttx + gdb> mon set pc 0x10800040 + gdb> s + +Configurations +============== + +Information Common to All Configurations +---------------------------------------- +Each Sabre-6Quad configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh sabre-6quad/ + cd - + . ./setenv.sh + +Before sourcing the setenv.sh file above, you should examine it and perform +edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory +than holds your toolchain binaries. + +And then build NuttX by simply typing the following. At the conclusion of +the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make oldconfig + make + +The that is provided above as an argument to the tools/configure.sh +must be is one of the following. + +NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on UART1 which is a available to the host PC from the USB + micro AB as a VCOM part. + + 3. All of these configurations are set up to build under Windows using the + "GNU Tools for ARM Embedded Processors" that is maintained by ARM + (unless stated otherwise in the description of the configuration). + + https://launchpad.net/gcc-arm-embedded + + That toolchain selection can easily be reconfigured using + 'make menuconfig'. Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Window environment + CONFIG_WINDOWS_CYGWIN=y : Cywin under Windows + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU ARM EABI toolchain + +Configuration sub-directories +----------------------------- + + nsh + --- + This is a NuttShell (NSH) configuration that uses the NSH library + at apps/nshlib with the start logic at apps/examples/nsh. + + NOTES: diff --git a/configs/sabre-6quad/include/board.h b/configs/sabre-6quad/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..f9d7d8e95b01423503facf2d06cdc74dff5fca58 --- /dev/null +++ b/configs/sabre-6quad/include/board.h @@ -0,0 +1,166 @@ +/************************************************************************************ + * configs/sabre-6quad/include/board.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SABRE_6QUAD_INCLUDE_BOARD_H +#define __CONFIGS_SABRE_6QUAD_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Clocking *************************************************************************/ +/* The Sabre-6Quad board has two crystals: + * + * Y1 24 MHz CPU_XTALI/CPU_XTALO + * QZ500 32.768 KHz RTC_XTALI/RTC_XTALO + */ + +#define BOARD_CPUXTAL_FREQUENCY 24000000 +#define BAORD_RTCXTAL_FREQUENCY 32768 + +/* Clocking will be configured at 792 MHz initially when started via U-Boot. The + * Linux kernel will use the CPU frequency scaling code which will switch the + * processor frequency between 400 MHz and 1GHz based on load and temperature. + * + * These are the frequencies reported with U-Boot starts up: + * + * mx6q pll1 : 792MHz + * mx6q pll2 : 528MHz + * mx6q pll3 : 480MHz + * mx6q pll8 : 50MHz + * + * ipg clock : 66000000Hz + * ipg per clock : 66000000Hz + * uart clock : 80000000Hz + * cspi clock : 60000000Hz + * ahb clock : 132000000Hz + * axi clock : 264000000Hz + * emi_slow clock : 29333333Hz + * ddr clock : 528000000Hz + * usdhc1 clock : 198000000Hz + * usdhc2 clock : 198000000Hz + * usdhc3 clock : 198000000Hz + * usdhc4 clock : 198000000Hz + * nfc clock : 24000000Hz + * + * For now, NuttX simply leaves the clocking at 792MHz. + */ + +/* LED definitions ******************************************************************/ +/* LEDs + * + * A single LED is available driven GPIO1_IO02. On the schematic this is + * USR_DEF_RED_LED signal to pin T1 (GPIO_2). This signal is shared with KEY_ROW6 + * (ALT2). A low value illuminates the LED. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_BIT (1 << BOARD_LED) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_autoleds.c. The LEDs are used to encode + * OS-related events as follows: + * + * ---------------------- ---------------------------- ------ + * SYMBOL Meaning LED + * ---------------------- ---------------------------- ------ */ + +#define LED_STARTED 0 /* NuttX has been started OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON */ +#define LED_INIRQ 2 /* In an interrupt N/C */ +#define LED_SIGNAL 2 /* In a signal handler N/C */ +#define LED_ASSERTION 2 /* An assertion failed N/C */ +#define LED_PANIC 3 /* The system has crashed FLASH */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* Thus is LED is statically on, NuttX has successfully booted and is, + * apparently, running normally. If LED is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +/* Button definitions ***************************************************************/ + +/* GPIO Disambiguation **************************************************************/ +/* A DEBUG VCOM is available MICRO USB AB 5 J509. This corresponds to UART1 from + * the i.MX6. UART1 connects to J509 via the CSIO_DAT10 and CSIO_DAT11 pins: + */ + +#define GPIO_UART1_RX_DATA GPIO_UART1_RX_DATA_2 +#define GPIO_UART1_TX_DATA GPIO_UART1_TX_DATA_2 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SABRE_6QUAD_INCLUDE_BOARD_H */ diff --git a/configs/sabre-6quad/include/board_memorymap.h b/configs/sabre-6quad/include/board_memorymap.h new file mode 100644 index 0000000000000000000000000000000000000000..9c64a4eb4f19a9e17b7666c66894614e2aa1d39b --- /dev/null +++ b/configs/sabre-6quad/include/board_memorymap.h @@ -0,0 +1,74 @@ +/************************************************************************************ + * configs/sabr-6quad/include/board_memorymap.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SABRE_6QUAD_INCLUDE_BOARD_MEMORYMAP_H +#define __CONFIGS_SABRE_6QUAD_INCLUDE_BOARD_MEMORYMAP_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SABRE_6QUAD_INCLUDE_BOARD_MEMORYMAP_H */ diff --git a/configs/sabre-6quad/nsh/Make.defs b/configs/sabre-6quad/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..cba549a9fb4eaa882ba80e5ed1d845fbe75a693d --- /dev/null +++ b/configs/sabre-6quad/nsh/Make.defs @@ -0,0 +1,134 @@ +############################################################################ +# configs/sabre-6quad/nsh/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +LDSCRIPT = dramboot.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a9 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif diff --git a/configs/sabre-6quad/nsh/defconfig b/configs/sabre-6quad/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..1c9f8ba3380d5af71f2160916dbaee1415d68f14 --- /dev/null +++ b/configs/sabre-6quad/nsh/defconfig @@ -0,0 +1,860 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +CONFIG_ARCH_CHIP_IMX6=y +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_CORTEXA9=y +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="imx6" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +CONFIG_ARCH_HAVE_TRUSTZONE=y +CONFIG_ARCH_TRUSTZONE_SECURE=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +CONFIG_ARMV7A_HAVE_GICv2=y +CONFIG_ARMV7A_HAVE_GTM=y +CONFIG_ARMV7A_HAVE_PTM=y +CONFIG_ARMV7A_HAVE_L2CC=y +CONFIG_ARMV7A_HAVE_L2CC_PL310=y + +# +# L2 Cache Configuration +# +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set + +# +# iMX.6 Chip Selection +# +# CONFIG_ARCH_CHIP_IMX6_6SOLOLITE is not set +# CONFIG_ARCH_CHIP_IMX6_6SOLO is not set +# CONFIG_ARCH_CHIP_IMX6_6DUALLITE is not set +# CONFIG_ARCH_CHIP_IMX6_6DUAL is not set +CONFIG_ARCH_CHIP_IMX6_6QUAD=y +# CONFIG_IMX6_HAVE_HDCP is not set + +# +# iMX.6 Peripheral Selection +# +CONFIG_IMX6_UART1=y +# CONFIG_IMX6_UART2 is not set +# CONFIG_IMX6_UART3 is not set +# CONFIG_IMX6_UART4 is not set +# CONFIG_IMX6_UART5 is not set +# CONFIG_IMX6_SPI1 is not set +# CONFIG_IMX6_SPI2 is not set +CONFIG_IMX_DDR_SIZE=1073741824 +# CONFIG_IMX6_BOOT_OCRAM is not set +CONFIG_IMX6_BOOT_SDRAM=y +# CONFIG_IMX6_BOOT_NOR is not set +# CONFIG_IMX6_BOOT_SRAM is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +CONFIG_ARCH_HAVE_MULTICPU=y +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=65775 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_VSTART=0x10000000 +CONFIG_RAM_SIZE=1073741824 +CONFIG_ARCH_HAVE_SDRAM=y + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SABRE_6QUAD=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sabre-6quad" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2016 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_UART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +CONFIG_RAMLOG=y +CONFIG_RAMLOG_SYSLOG=y +# CONFIG_RAMLOG_CONSOLE is not set +CONFIG_RAMLOG_BUFSIZE=16384 +# CONFIG_RAMLOG_CRLF is not set +CONFIG_RAMLOG_NONBLOCKING=y +CONFIG_RAMLOG_NPOLLWAITERS=4 +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_CHAR is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sabre-6quad/nsh/setenv.sh b/configs/sabre-6quad/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..cbdfc139bcaeb3ecf4ac9acf29ad71571507e73e --- /dev/null +++ b/configs/sabre-6quad/nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sabre-6quad/nsh/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sabre-6quad/scripts/dramboot.ld b/configs/sabre-6quad/scripts/dramboot.ld new file mode 100644 index 0000000000000000000000000000000000000000..ef87268ff6f9f15438c87dc4551e18aee94c9dd6 --- /dev/null +++ b/configs/sabre-6quad/scripts/dramboot.ld @@ -0,0 +1,124 @@ +/**************************************************************************** + * configs/sabre-6quad/scripts/dramboot.ld + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The i.MX6 has 256 KB of OCRAM beginning at virtual address 0x0090:0000 + * This memory configuration, however, loads into the 1GB DDR3 on board + * the Sabre 6Quad K which lies at 0x1000:0000. Code is positioned at + * 0x10800000 which the standard load address of Linux when used with uBoot. + * + * Vectors in low memory are assumed and 16KB of OCRAM is reserved at the + * high end of OCRAM for the page table. + */ + +MEMORY +{ + oscram (W!RX) : ORIGIN = 0x00900000, LENGTH = 256K - 16K + ddr3 (W!RX) : ORIGIN = 0x10800000, LENGTH = 1024M - 8M +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _etext = ABSOLUTE(.); + } > ddr3 + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > ddr3 + + .ARM.extab : { + *(.ARM.extab*) + } > ddr3 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > ddr3 + PROVIDE_HIDDEN (__exidx_end = .); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > ddr3 + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > ddr3 + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sabre-6quad/src/Makefile b/configs/sabre-6quad/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..6492cd66e8169c193f586998ef91c03a05e271f1 --- /dev/null +++ b/configs/sabre-6quad/src/Makefile @@ -0,0 +1,51 @@ +############################################################################ +# configs/sabre-6quad/src/Makefile +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = imx_boardinit.c imx_bringup.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += imx_appinit.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += imx_autoleds.c +else +CSRCS += imx_userleds.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/sabre-6quad/src/imx_appinit.c b/configs/sabre-6quad/src/imx_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..a1022c6cf130747b8a2a7b1b3603a0c1b92121e4 --- /dev/null +++ b/configs/sabre-6quad/src/imx_appinit.c @@ -0,0 +1,73 @@ +/**************************************************************************** + * config/sabre-6quad/src/imx_appinit.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "sabre-6quad.h" + +#if defined(CONFIG_LIB_BOARDCTL) && !defined(CONFIG_BUILD_KERNEL) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifndef CONFIG_BOARD_INITIALIZE + /* Perform board initialization */ + + return imx_bringup(); +#else + return OK; +#endif +} + +#endif /* CONFIG_LIB_BOARDCTL && !CONFIG_BUILD_KERNEL */ diff --git a/configs/sabre-6quad/src/imx_autoleds.c b/configs/sabre-6quad/src/imx_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..ce31d0a93ecd9d026fb472128e167d5c1dfcb48a --- /dev/null +++ b/configs/sabre-6quad/src/imx_autoleds.c @@ -0,0 +1,136 @@ +/**************************************************************************** + * configs/sabre-6quad/include/imx_autoleds.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* LEDs + * + * A single LED is available driven by USR_DEF_RED_LED. + * + * These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/imx_autoleds.c. The LEDs are used to encode + * OS-related events as follows: + * + * ------------------- ----------------------- ------ + * SYMBOL Meaning LED + * ------------------- ----------------------- ------ + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt N/C + * LED_SIGNAL In a signal handler N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus is LED is statically on, NuttX has successfully booted and is, + * apparently, running normally. If LED is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "imx_gpio.h" +#include "sabre-6quad.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED PIOs for output */ + + imx_config_gpio(GPIO_LED); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led == 1 || led == 3) + { + imx_gpio_write(GPIO_LED, false); /* Low illuminates */ + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == 3) + { + imx_gpio_write(GPIO_LED, true); /* High extinguishes */ + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/sabre-6quad/src/imx_boardinit.c b/configs/sabre-6quad/src/imx_boardinit.c new file mode 100644 index 0000000000000000000000000000000000000000..e287ed2c867bb58a237393c8f7f18fc677277b26 --- /dev/null +++ b/configs/sabre-6quad/src/imx_boardinit.c @@ -0,0 +1,105 @@ +/**************************************************************************** + * configs/sabre-6quad/src/imx_boot.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "chip.h" +#include "up_arch.h" + +#include "imx_boot.h" +#include "sabre-6quad.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: imx_board_initialize + * + * Description: + * All i.MX6 architectures must provide the following entry point. This + * entry point is called early in the initialization -- after all memory + * has been configured and mapped but before any devices have been + * initialized. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void imx_board_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intitialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform board initialization */ + + (void)imx_bringup(); +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/sabre-6quad/src/imx_bringup.c b/configs/sabre-6quad/src/imx_bringup.c new file mode 100644 index 0000000000000000000000000000000000000000..d4ace48cd48a8d1119aac125e4a219440b5eaadb --- /dev/null +++ b/configs/sabre-6quad/src/imx_bringup.c @@ -0,0 +1,78 @@ +/**************************************************************************** + * config/sabre-6quad/src/imx_bringup.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "sabre-6quad.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Debug ********************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +# define SYSLOG lldbg +#else +# define SYSLOG dbg +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: imx_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int imx_bringup(void) +{ + return OK; +} diff --git a/configs/sabre-6quad/src/imx_userleds.c b/configs/sabre-6quad/src/imx_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..9b977d3d1a3c6361b180833c4ff1ce34c13a9a31 --- /dev/null +++ b/configs/sabre-6quad/src/imx_userleds.c @@ -0,0 +1,86 @@ +/**************************************************************************** + * configs/sabre-6quad/src/imx_userleds.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sabre-6quad.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED PIOs for output */ + + imx_config_gpio(GPIO_LED); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_LED) + { + imx_gpio_write(GPIO_LED, !ledon); /* Low illuminates */ + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + /* Low illuminates */ + + imx_gpio_write(GPIO_LED, (ledset & BOARD_LED_BIT) == 0)); +} diff --git a/configs/sabre-6quad/src/sabre-6quad.h b/configs/sabre-6quad/src/sabre-6quad.h new file mode 100644 index 0000000000000000000000000000000000000000..5ae480d637e5c1336911eadf7bfad4578897916b --- /dev/null +++ b/configs/sabre-6quad/src/sabre-6quad.h @@ -0,0 +1,95 @@ +/************************************************************************************ + * configs/sabre-6quad/src/sabre-6quad.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SABRE_6QUAD_SRC_SABRE_6QUAD_H +#define __CONFIGS_SABRE_6QUAD_SRC_SABRE_6QUAD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include "imx_gpio.h" +#include "imx_iomuxc.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +/* SABRE-6QUAD GPIO Pin Definitions *************************************************/ +/* LED + * + * A single LED is available driven GPIO1_IO02. On the schematic this is + * USR_DEF_RED_LED signal to pin T1 (GPIO_2). This signal is shared with KEY_ROW6 + * (ALT2). A low value illuminates the LED. + */ + +#define IOMUX_LED (IOMUX_PULL_NONE | IOMUX_CMOS_OUTPUT | IOMUX_DRIVE_40OHM | \ + IOMUX_SPEED_MEDIUM | IOMUX_SLEW_SLOW) +#define GPIO_LED (GPIO_OUTPUT | GPIO_OUTPUT_ONE | GPIO_PORT1 | GPIO_PIN2 | \ + IOMUX_LED) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: imx_bringup + * + * Description: + * Bring up board features + * + ************************************************************************************/ + +#if defined(CONFIG_LIB_BOARDCTL) || defined(CONFIG_BOARD_INITIALIZE) +int imx_bringup(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SABRE_6QUAD_SRC_SABRE_6QUAD_H */ diff --git a/configs/sam3u-ek/Kconfig b/configs/sam3u-ek/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..27611b6f8bd50d4f0887b543674e8718e11705c7 --- /dev/null +++ b/configs/sam3u-ek/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAM3UEK +endif diff --git a/configs/sam3u-ek/README.txt b/configs/sam3u-ek/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..d2e92fb08beb3ad3668a7c862997f85375858fd8 --- /dev/null +++ b/configs/sam3u-ek/README.txt @@ -0,0 +1,759 @@ +README +^^^^^^ + +This README discusses issues unique to NuttX configurations for the Atmel +SAM3U-EK development board featuring the ATAM3U. This board features the +ATSAM3U4E MCU running at 96MHz. + +Contents +^^^^^^^^ + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - AtmelStudio6.1 + - LEDs + - Serial Console + - SAM3U-EK-specific Configuration Options + - Configurations + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, ok + 4. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. To use + the CodeSourcery, devkitARM, Atollic, or AtmelStudio GNU toolchain, you simply + need to add one of the following configuration options to your .config (or + defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : Generic GCC ARM EABI toolchain for Windows + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE about Windows native toolchains + ------------------------------------ + + The CodeSourcery (for Windows), Atollic, and devkitARM toolchains are + Windows native toolchains. The CodeSourcery (for Linux), NuttX buildroot, + and, perhaps, the generic GCC toolchains are Cygwin and/or Linux native + toolchains. There are several limitations to using a Windows based + toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/sam34, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/sam34/sam_vectors.S. You may need to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh sam3u-ek/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh sam3u-ek/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +AtmelStudio6.1 +^^^^^^^^^^^^^^ + + You can use AtmelStudio6.1 to load and debug code. + + - To load code: + + Tools -> Device Programming + + Configure the debugger and chip and you are in business. + + - To Debug Code: + + File -> Open -> Open Object File for Debugging + + Select the project name, the full path to the NuttX object (called + just nuttx with no extension), and chip. Take the time to resolve + all of the source file linkages or else you will not have source + level debug! + +LEDs +^^^^ + + The SAM3U-EK board has four LEDs labeled LD1, LD2, LD3 and LD4 on the + the board. Usage of these LEDs is defined in include/board.h and src/up_leds.c. + They are encoded as follows: + + SYMBOL Meaning LED0* LED1 LED2 + ------------------- ----------------------- ------- ------- ------- + LED_STARTED NuttX has been started OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + LED_IRQSENABLED Interrupts enabled OFF ON OFF + LED_STACKCREATED Idle stack created OFF ON ON + LED_INIRQ In an interrupt** N/C FLASH N/C + LED_SIGNAL In a signal handler*** N/C N/C FLASH + LED_ASSERTION An assertion failed FLASH N/C N/C + LED_PANIC The system has crashed FLASH N/C N/C + + * If LED1 and LED2 are statically on, then NuttX probably failed to boot + and these LEDs will give you some indication of where the failure was + ** The normal state is LED0=OFF, LED2=ON and LED1 faintly glowing. This faint + glow is because of timer interrupts that result in the LED being illuminated + on a small proportion of the time. +*** LED2 may also flicker normally if signals are processed. + +Serial Console +^^^^^^^^^^^^^^ + + By default, all of these configurations use UART0 for the NuttX serial + console. UART0 corresponds to the DB-9 connector labelled "UART". This + is a male connector and will require a female-to-female, NUL modem cable + to connect to a PC. + + An alternate is USART1 which connects to the other DB-9 connector labeled + "USART". USART1 is not enabled by default unless specifically noted + otherwise in the configuration description. A NUL modem cable must be + used with the port as well. + + NOTE: One of the USART1 pins is shared with the audio CODEC. The audio + CODEC cannot be used of USART1 is enabled. + + By default serial console is configured for 115000, 8-bit, 1 stop bit, and + no parity. + +SAM3U-EK-specific Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="sam34" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_SAM34 + CONFIG_ARCH_CHIP_SAM3U + CONFIG_ARCH_CHIP_ATSAM3U4 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=sam3u-ek (for the SAM3U-EK development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SAM3UEK=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x0000c000 (48Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_SAM34_RTC - Real Time Clock + CONFIG_SAM34_RTT - Real Time Timer + CONFIG_SAM34_WDT - Watchdog Timer + CONFIG_SAM34_UART0 - UART 0 + CONFIG_SAM34_SMC - Static Memory Controller + CONFIG_SAM34_USART0 - USART 0 + CONFIG_SAM34_USART1 - USART 1 + CONFIG_SAM34_USART2 - USART 2 + CONFIG_SAM34_USART3 - USART 3 + CONFIG_SAM34_HSMCI - High Speed Multimedia Card Interface + CONFIG_SAM34_TWI0 - Two-Wire Interface 0 + CONFIG_SAM34_TWI1 - Two-Wire Interface 1 + CONFIG_SAM34_SPI0 - Serial Peripheral Interface + CONFIG_SAM34_SSC - Synchronous Serial Controller + CONFIG_SAM34_TC0 - Timer Counter 0 + CONFIG_SAM34_TC1 - Timer Counter 1 + CONFIG_SAM34_TC2 - Timer Counter 2 + CONFIG_SAM34_PWM - Pulse Width Modulation Controller + CONFIG_SAM34_ADC12B - 12-bit ADC Controller + CONFIG_SAM34_ADC - 10-bit ADC Controller + CONFIG_SAM34_DMAC0 - DMA Controller + CONFIG_SAM34_UDPHS - USB Device High Speed + + Some subsystems can be configured to operate in different ways. The drivers + need to know how to configure the subsystem. + + CONFIG_SAM34_GPIOA_IRQ + CONFIG_SAM34_GPIOB_IRQ + CONFIG_SAM34_GPIOC_IRQ + CONFIG_USART0_ISUART + CONFIG_USART1_ISUART + CONFIG_USART2_ISUART + CONFIG_USART3_ISUART + CONFIG_SAM34_NAND - NAND memory + + SAM3U specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + LCD Options. Other than the standard LCD configuration options + (see configs/README.txt), the SAM3U-EK driver also supports: + + CONFIG_LCD_PORTRAIT - Present the display in the standard 240x320 + "Portrait" orientation. Default: The display is rotated to + support a 320x240 "Landscape" orientation. + +Configurations +^^^^^^^^^^^^^^ + + Information Common to All Configurations + ---------------------------------------- + Each SAM3U-EK configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh sam3u-ek/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that BUILDROOT_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on UART0 (J3). + + 3. Unless otherwise stated, the configurations are setup for + Linux (or any other POSIX environment like Cygwin under Windows): + + Build Setup: + CONFIG_HOST_LINUX=y : Linux or other POSIX environment + + 4. All of these configurations use the older, OABI, buildroot toolchain + (unless stated otherwise in the description of the configuration). That + toolchain selection can easily be reconfigured using 'make menuconfig'. + Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_LINUX=y : Linux or other pure POSIX invironment + : (including Cygwin) + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot toolchain + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : Older, OABI toolchain + + If you want to use the Atmel GCC toolchain, for example, here are the + steps to do so: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_HOST_CYGWIN=y : Using Cygwin or other POSIX environment + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : General GCC EABI toolchain under windows + + Library Routines -> + CONFIG_CXX_NEWLONG=n : size_t is an unsigned int, not long + + This re-configuration should be done before making NuttX or else the + subsequent 'make' will fail. If you have already attempted building + NuttX then you will have to 1) 'make distclean' to remove the old + configuration, 2) 'cd tools; ./configure.sh sam3u-ek/ksnh' to start + with a fresh configuration, and 3) perform the configuration changes + above. + + Also, make sure that your PATH variable has the new path to your + Atmel tools. Try 'which arm-none-eabi-gcc' to make sure that you + are selecting the right tool. setenv.sh is available for you to + use to set or PATH variable. The path in the that file may not, + however, be correct for your installation. + + See also the "NOTE about Windows native toolchains" in the section call + "GNU Toolchain Options" above. + + Configuration sub-directories + ----------------------------- + + knsh: + This is identical to the nsh configuration below except that NuttX + is built as a kernel-mode, monolithic module and the user applications + are built separately. It is recommends to use a special make command; + not just 'make' but make with the following two arguments: + + make pass1 pass2 + + In the normal case (just 'make'), make will attempt to build both user- + and kernel-mode blobs more or less interleaved. This actual works! + However, for me it is very confusing so I prefer the above make command: + Make the user-space binaries first (pass1), then make the kernel-space + binaries (pass2) + + NOTES: + + 1. At the end of the build, there will be several files in the top-level + NuttX build directory: + + PASS1: + nuttx_user.elf - The pass1 user-space ELF file + nuttx_user.hex - The pass1 Intel HEX format file (selected in defconfig) + User.map - Symbols in the user-space ELF file + + PASS2: + nuttx - The pass2 kernel-space ELF file + nuttx.hex - The pass2 Intel HEX file (selected in defconfig) + System.map - Symbols in the kernel-space ELF file + + The J-Link programmer will except files in .hex, .mot, .srec, and .bin + formats. + + 2. Combining .hex files. If you plan to use the .hex files with your + debugger or FLASH utility, then you may need to combine the two hex + files into a single .hex file. Here is how you can do that. + + a. The 'tail' of the nuttx.hex file should look something like this + (with my comments added): + + $ tail nuttx.hex + # 00, data records + ... + :10 9DC0 00 01000000000800006400020100001F0004 + :10 9DD0 00 3B005A0078009700B500D400F300110151 + :08 9DE0 00 30014E016D0100008D + # 05, Start Linear Address Record + :04 0000 05 0800 0419 D2 + # 01, End Of File record + :00 0000 01 FF + + Use an editor such as vi to remove the 05 and 01 records. + + b. The 'head' of the nuttx_user.hex file should look something like + this (again with my comments added): + + $ head nuttx_user.hex + # 04, Extended Linear Address Record + :02 0000 04 0801 F1 + # 00, data records + :10 8000 00 BD89 01084C800108C8110208D01102087E + :10 8010 00 0010 00201C1000201C1000203C16002026 + :10 8020 00 4D80 01085D80010869800108ED83010829 + ... + + Nothing needs to be done here. The nuttx_user.hex file should + be fine. + + c. Combine the edited nuttx.hex and un-edited nuttx_user.hex + file to produce a single combined hex file: + + $ cat nuttx.hex nuttx_user.hex >combined.hex + + Then use the combined.hex file with the to write the FLASH image. + If you do this a lot, you will probably want to invest a little time + to develop a tool to automate these steps. + + nsh: + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables both the serial and telnetd NSH interfaces. + + NOTES: + + 1. NSH built-in applications are supported. However, there are + no built-in applications built with the default configuration. + + Binary Formats: + CONFIG_BUILTIN=y : Enable support for built-in programs + + Applicaton Configuration: + CONFIG_NSH_BUILTIN_APPS=y : Enable starting apps from NSH command line + + 2. This configuration has been used for verifying the touchscreen on + on the SAM3U-EK LCD. With these modifications, you can include the + touchscreen test program at apps/examples/touchscreen as an NSH built-in + application. You can enable the touchscreen and test by modifying the + default configuration in the following ways: + + Device Drivers + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + + CONFIG_INPUT=y : Enable support for input devices + CONFIG_INPUT_ADS7843E=y : Enable support for the XPT2046 + CONFIG_ADS7843E_SPIDEV=2 : Use SPI CS 2 for communication + CONFIG_ADS7843E_SPIMODE=0 : Use SPI mode 0 + CONFIG_ADS7843E_FREQUENCY=1000000 : SPI BAUD 1MHz + CONFIG_ADS7843E_SWAPXY=y : If landscpe orientation + CONFIG_ADS7843E_THRESHX=51 : These will probably need to be tuned + CONFIG_ADS7843E_THRESHY=39 + + System Type -> Peripherals: + CONFIG_SAM34_SPI0=y : Enable support for SPI + + System Type: + CONFIG_SAM34_GPIO_IRQ=y : GPIO interrupt support + CONFIG_SAM34_GPIOA_IRQ=y : Enable GPIO interrupts from port A + + RTOS Features: + CONFIG_DISABLE_SIGNALS=n : Signals are required + + Library Support: + CONFIG_SCHED_WORKQUEUE=y : Work queue support required + + Applicaton Configuration: + CONFIG_EXAMPLES_TOUCHSCREEN=y : Enable the touchscreen built-int test + + Defaults should be okay for related touchscreen settings. Touchscreen + debug output on UART0 can be enabled with: + + Build Setup: + CONFIG_DEBUG=y : Enable debug features + CONFIG_DEBUG_VERBOSE=y : Enable verbose debug output + CONFIG_DEBUG_INPUT=y : Enable debug output from input devices + + 3. Enabling HSMCI support. The SAM3U-KE provides a an SD memory card + slot. Support for the SD slot can be enabled with the following + settings: + + System Type->ATSAM3/4 Peripheral Support + CONFIG_SAM34_HSMCI=y : Enable HSMCI support + CONFIG_SAM34_DMAC0=y : DMAC support is needed by HSMCI + + System Type + CONFIG_SAM34_GPIO_IRQ=y : PIO interrupts needed + CONFIG_SAM34_GPIOA_IRQ=y : Card detect pin is on PIOA + + Device Drivers -> MMC/SD Driver Support + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMSCD_NSLOTS=1 : One slot per driver instance + CONFIG_MMCSD_HAVECARDDETECT=y : Supports card-detect PIOs + CONFIG_MMCSD_SDIO=y : SDIO-based MMC/SD support + CONFIG_SDIO_DMA=y : Use SDIO DMA + CONFIG_SDIO_BLOCKSETUP=y : Needs to know block sizes + + Library Routines + CONFIG_SCHED_WORKQUEUE=y : Driver needs work queue support + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + STATUS: + 2013-6-28: The touchscreen is functional. + 2013-6-29: Hmmm... but there appear to be conditions when the + touchscreen driver locks up. Looks like some issue with + managing the interrupts. + 2013-6-30: Those lock-ups appear to be due to poorly placed + debug output statements. If you do not enable debug output, + the touchscreen is rock-solid. + 2013-8-10: Added the comments above above enabling HSMCI memory + card support and verified that the configuration builds without + error. However, that configuration has not yet been tested (and + is may even be incomplete). + + nx: + Configures to use examples/nx using the HX834x LCD hardware on + the SAM3U-EK development board. + + nxwm: + This is a special configuration setup for the NxWM window manager + UnitTest. It includes support for both the HX834x LCD and the + ADS7843E touchscreen controller on board the SAM3U-EK board. + + The NxWM window manager is a tiny window manager tailored for use + with smaller LCDs. It supports a toolchain, a start window, and + multiple application windows. However, to make the best use of + the visible LCD space, only one application window is visiable at + at time. + + The NxWM window manager can be found here: + + nuttx-git/NxWidgets/nxwm + + The NxWM unit test can be found at: + + nuttx-git/NxWidgets/UnitTests/nxwm + + Documentation for installing the NxWM unit test can be found here: + + nuttx-git/NxWidgets/UnitTests/README.txt + + Here is the quick summary of the build steps. These steps assume that + you have the entire NuttX GIT in some directory ~/nuttx-git. You may + have these components installed elsewhere. In that case, you will need + to adjust all of the paths in the following accordingly: + + 1. Intall the nxwm configuration + + $ cd ~/nuttx-git/nuttx/tools + $ ./configure.sh sam3u-ek/nxwm + + 2. Make the build context (only) + + $ cd .. + $ . ./setenv.sh + $ make context + ... + + NOTE: the use of the setenv.sh file is optional. All that it will + do is to adjust your PATH variable so that the build system can find + your tools. If you use it, you will most likely need to modify the + script so that it has the correct path to your tool binaries + directory. + + 3. Install the nxwm unit test + + $ cd ~/nuttx-git/NxWidgets + $ tools/install.sh ~/nuttx-git/apps nxwm + Creating symbolic link + - To ~/nuttx-git/NxWidgets/UnitTests/nxwm + - At ~/nuttx-git/apps/external + + 4. Build the NxWidgets library + + $ cd ~/nuttx-git/NxWidgets/libnxwidgets + $ make TOPDIR=~/nuttx-git/nuttx + ... + + 5. Build the NxWM library + + $ cd ~/nuttx-git/NxWidgets/nxwm + $ make TOPDIR=~/nuttx-git/nuttx + ... + + 6. Built NuttX with the installed unit test as the application + + $ cd ~/nuttx-git/nuttx + $ make + + STATUS: + + 1. 2013-6-28: Created the configuration but have not yet done + anything with it. + + 2. 2013-6-29: Various changes to get a clean build of this + configuration. Still untested. + + 3. 20113-6-30: I cannot load this program using AtmelStudio6.1. + The total size with DEBUG on is 138.9 KB. I have verified + that the first 128KB may have been written correctly, but then + the code above 128KB wraps and overwrites the code at the + beginning of FLASH, trashing the FLASH images. + + Bottom line: Still untested. diff --git a/configs/sam3u-ek/include/board.h b/configs/sam3u-ek/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..52b9647f6c66ae01ee91e5dd9a2d22b58d082148 --- /dev/null +++ b/configs/sam3u-ek/include/board.h @@ -0,0 +1,194 @@ +/************************************************************************************ + * configs/sam3u-ek/include/board.h + * + * Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_SAM3U_EK_INCLUDE_BOARD_H +#define __ARCH_SAM3U_EK_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# ifdef CONFIG_SAM34_GPIO_IRQ +# include +# endif +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the sam3u device is running on a 4MHz internal RC. These + * definitions will configure clocking + * + * MAINOSC: Frequency = 12MHz (crysta) + * PLLA: PLL Divider = 1, Multiplier = 16 to generate PLLACK = 192MHz + * Master Clock (MCK): Source = PLLACK, Prescalar = 1 to generate MCK = 96MHz + * CPU clock: 96MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Divider = 1 + * Multipler = 16 + */ + +#define BOARD_CKGR_PLLAR_MUL (15 << PMC_CKGR_PLLAR_MUL_SHIFT) +#define BOARD_CKGR_PLLAR_STMODE PMC_CKGR_PLLAR_STMODE_FAST +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS + +/* PMC master clock register settings. + * + * Source = PLLA + * Divider = 2 + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV2 + +/* USB UTMI PLL start-up time */ + +#define BOARD_CKGR_UCKR_UPLLCOUNT (3 << PMC_CKGR_UCKR_UPLLCOUNT_SHIFT) + +/* Resulting frequencies */ + +#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */ +#define BOARD_PLLA_FREQUENCY (192000000) /* PLLACK: 16 * 12Mhz / 1 */ +#define BOARD_MCK_FREQUENCY (96000000) /* MCK: PLLACK / 2 */ +#define BOARD_CPU_FREQUENCY (96000000) /* CPU: MCK */ + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV+1)). + * + * MCI_SPEED = MCK / (2*(CLKDIV+1)) + * CLKDIV = MCI / MCI_SPEED / 2 - 1 + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 96MHz, CLKDIV = 119, MCI_SPEED = 96MHz / 2 * (119+1) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (119 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 96MHz, CLKDIV = 3, MCI_SPEED = 96MHz / 2 * (3+1) = 12 MHz */ + +#define HSMCI_MMCXFR_CLKDIV (3 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 96MHz, CLKDIV = 1, MCI_SPEED = 96MHz / 2 * (1+1) = 24 MHz */ + +#define HSMCI_SDXFR_CLKDIV (1 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/* FLASH wait states + * + * FWS Max frequency + * 1.62V 1.8V + * --- ----- ------ + * 0 24MHz 27MHz + * 1 40MHz 47MHz + * 2 72MHz 84MHz + * 3 84MHz 96MHz + */ + +#define BOARD_FWS 3 + +/* LED definitions ******************************************************************/ + +#define LED_STARTED 0 /* LED0=OFF LED1=OFF LED2=OFF */ +#define LED_HEAPALLOCATE 1 /* LED0=OFF LED1=OFF LED2=ON */ +#define LED_IRQSENABLED 2 /* LED0=OFF LED1=ON LED2=OFF */ +#define LED_STACKCREATED 3 /* LED0=OFF LED1=ON LED2=ON */ + +#define LED_INIRQ 4 /* LED0=XXX LED1=TOG LED2=XXX */ +#define LED_SIGNAL 5 /* LED0=XXX LED1=XXX LED2=TOG */ +#define LED_ASSERTION 6 /* LED0=TOG LED1=XXX LED2=XXX */ +#define LED_PANIC 7 /* LED0=TOG LED1=XXX LED2=XXX */ + +/* Button definitions ***************************************************************/ + +#define BUTTON1 1 /* Bit 0: Button 1 */ +#define BUTTON2 2 /* Bit 1: Button 2 */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_SAM3U_EK_INCLUDE_BOARD_H */ diff --git a/configs/sam3u-ek/kernel/.gitignore b/configs/sam3u-ek/kernel/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..7bacd5aee3e49e11d2753d091bd2c9b31c0b16b0 --- /dev/null +++ b/configs/sam3u-ek/kernel/.gitignore @@ -0,0 +1,2 @@ +/nuttx_user.elf + diff --git a/configs/sam3u-ek/kernel/Makefile b/configs/sam3u-ek/kernel/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..a1986ba6c2e00fbd76ca38bd2e20f378869528b9 --- /dev/null +++ b/configs/sam3u-ek/kernel/Makefile @@ -0,0 +1,116 @@ +############################################################################ +# configs/sam3u-ek/kernel/Makefile +# +# Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +# This is the directory for the board-specific header files + +BOARD_INCLUDE = $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)include + +# The entry point name (if none is provided in the .config file) + +CONFIG_USER_ENTRYPOINT ?= user_start +ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT)) + +# Get the paths to the libraries and the links script path in format that +# is appropriate for the host OS + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done} + USER_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}" + USER_LDSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld}" +else + # Linux/Cygwin-native toolchain + USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS))) + USER_LDSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld + USER_LDSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld +endif + +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) +USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) +USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" + +# Source files + +CSRCS = sam_userspace.c +COBJS = $(CSRCS:.c=$(OBJEXT)) +OBJS = $(COBJS) + +# Targets: + +all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map +.PHONY: nuttx_user.elf depend clean distclean + +$(COBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +# Create the nuttx_user.elf file containing all of the user-mode code + +nuttx_user.elf: $(OBJS) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) + +$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf + @echo "LD: nuttx_user.elf" + $(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf +ifeq ($(CONFIG_INTELHEX_BINARY),y) + @echo "CP: nuttx_user.hex" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.hex +endif +ifeq ($(CONFIG_MOTOROLA_SREC),y) + @echo "CP: nuttx_user.srec" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.srec +endif +ifeq ($(CONFIG_RAW_BINARY),y) + @echo "CP: nuttx_user.bin" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.bin +endif + +$(TOPDIR)$(DELIM)User.map: nuttx_user.elf + @echo "MK: User.map" + $(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map + $(Q) $(CROSSDEV)size nuttx_user.elf + +.depend: + +depend: .depend + +clean: + $(call DELFILE, nuttx_user.elf) + $(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*") + $(call DELFILE, "$(TOPDIR)$(DELIM)User.map") + $(call CLEAN) + +distclean: clean diff --git a/configs/sam3u-ek/kernel/sam_userspace.c b/configs/sam3u-ek/kernel/sam_userspace.c new file mode 100644 index 0000000000000000000000000000000000000000..9ca96b123085b4e32e8c526fe4559a10d02de677 --- /dev/null +++ b/configs/sam3u-ek/kernel/sam_userspace.c @@ -0,0 +1,132 @@ +/**************************************************************************** + * configs/sam3u-ek/kernel/sam_userspace.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_NUTTX_USERSPACE +# error "CONFIG_NUTTX_USERSPACE not defined" +#endif + +#if CONFIG_NUTTX_USERSPACE != 0x00090000 +# error "CONFIG_NUTTX_USERSPACE must be 0x00090000 to match user-space.ld" +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* These 'addresses' of these values are setup by the linker script. They are + * not actual uint32_t storage locations! They are only used meaningfully in the + * following way: + * + * - The linker script defines, for example, the symbol_sdata. + * - The declareion extern uint32_t _sdata; makes C happy. C will believe + * that the value _sdata is the address of a uint32_t variable _data (it is + * not!). + * - We can recoved the linker value then by simply taking the address of + * of _data. like: uint32_t *pdata = &_sdata; + */ + +extern uint32_t _stext; /* Start of .text */ +extern uint32_t _etext; /* End_1 of .text + .rodata */ +extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */ +extern uint32_t _sdata; /* Start of .data */ +extern uint32_t _edata; /* End+1 of .data */ +extern uint32_t _sbss; /* Start of .bss */ +extern uint32_t _ebss; /* End+1 of .bss */ + +/* This is the user space entry point */ + +int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); + +const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +{ + /* General memory map */ + + .us_entrypoint = (main_t)CONFIG_USER_ENTRYPOINT, + .us_textstart = (uintptr_t)&_stext, + .us_textend = (uintptr_t)&_etext, + .us_datasource = (uintptr_t)&_eronly, + .us_datastart = (uintptr_t)&_sdata, + .us_dataend = (uintptr_t)&_edata, + .us_bssstart = (uintptr_t)&_sbss, + .us_bssend = (uintptr_t)&_ebss, + + /* Memory manager heap structure */ + + .us_heap = &g_mmheap, + + /* Task/thread startup routines */ + + .task_startup = task_startup, +#ifndef CONFIG_DISABLE_PTHREAD + .pthread_startup = pthread_startup, +#endif + + /* Signal handler trampoline */ + +#ifndef CONFIG_DISABLE_SIGNALS + .signal_handler = up_signal_handler, +#endif + + /* User-space work queue support (declared in include/nuttx/wqueue.h) */ + +#ifdef CONFIG_LIB_USRWORK + .work_usrstart = work_usrstart, +#endif +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */ diff --git a/configs/sam3u-ek/knsh/Make.defs b/configs/sam3u-ek/knsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..7475431366b852d115a126dcfe4240211e983de6 --- /dev/null +++ b/configs/sam3u-ek/knsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/sam3u-ek/knsh/Make.defs +# +# Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-m$(DELIM)Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}" + ARCHSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)kernel-space.ld}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld + ARCHSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)kernel-space.ld +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/sam3u-ek/knsh/defconfig b/configs/sam3u-ek/knsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d6568a852c5b08b942f9e5cfeeae8e55d32cd2df --- /dev/null +++ b/configs/sam3u-ek/knsh/defconfig @@ -0,0 +1,922 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_FLAT is not set +CONFIG_BUILD_PROTECTED=y +CONFIG_BUILD_2PASS=y +CONFIG_PASS1_TARGET="all" +CONFIG_PASS1_BUILDIR="configs/sam3u-ek/kernel" +CONFIG_PASS1_OBJECT="" +CONFIG_NUTTX_USERSPACE=0x00090000 + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +CONFIG_ARCH_CHIP_SAM34=y +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="sam34" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +CONFIG_ARM_MPU=y +CONFIG_ARM_MPU_NREGIONS=8 + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTNOR=y +CONFIG_ARCH_HAVE_EXTSRAM0=y +CONFIG_ARCH_HAVE_EXTSRAM1=y + +# +# AT91SAM3/4 Configuration Options +# +CONFIG_ARCH_CHIP_ATSAM3U4E=y +# CONFIG_ARCH_CHIP_ATSAM3U4C is not set +# CONFIG_ARCH_CHIP_ATSAM3U2E is not set +# CONFIG_ARCH_CHIP_ATSAM3U2C is not set +# CONFIG_ARCH_CHIP_ATSAM3U1E is not set +# CONFIG_ARCH_CHIP_ATSAM3U1C is not set +# CONFIG_ARCH_CHIP_ATSAM3X8E is not set +# CONFIG_ARCH_CHIP_ATSAM3X8C is not set +# CONFIG_ARCH_CHIP_ATSAM3X4E is not set +# CONFIG_ARCH_CHIP_ATSAM3X4C is not set +# CONFIG_ARCH_CHIP_ATSAM3A8C is not set +# CONFIG_ARCH_CHIP_ATSAM3A4C is not set +# CONFIG_ARCH_CHIP_ATSAM4CMP16B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4A is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32B is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16B is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S16C is not set +# CONFIG_ARCH_CHIP_ATSAM4S16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S8C is not set +# CONFIG_ARCH_CHIP_ATSAM4S8B is not set +# CONFIG_ARCH_CHIP_ATSAM4E16E is not set +# CONFIG_ARCH_CHIP_ATSAM4E16C is not set +# CONFIG_ARCH_CHIP_ATSAM4E8E is not set +# CONFIG_ARCH_CHIP_ATSAM4E8C is not set +CONFIG_ARCH_CHIP_SAM3U=y +# CONFIG_ARCH_CHIP_SAM3X is not set +# CONFIG_ARCH_CHIP_SAM3A is not set +# CONFIG_ARCH_CHIP_SAM4CM is not set +# CONFIG_ARCH_CHIP_SAM4L is not set +# CONFIG_ARCH_CHIP_SAM4E is not set +# CONFIG_ARCH_CHIP_SAM4S is not set + +# +# AT91SAM3/4 Peripheral Support +# +# CONFIG_SAM34_ADC is not set +# CONFIG_SAM34_ADC12B is not set +# CONFIG_SAM34_DMAC0 is not set +# CONFIG_SAM34_DMAC1 is not set +# CONFIG_SAM34_HSMCI is not set +# CONFIG_SAM34_NAND is not set +# CONFIG_SAM34_PWM is not set +# CONFIG_SAM34_RTC is not set +# CONFIG_SAM34_RTT is not set +# CONFIG_SAM34_SMC is not set +# CONFIG_SAM34_SPI0 is not set +# CONFIG_SAM34_SSC is not set +# CONFIG_SAM34_TC0 is not set +# CONFIG_SAM34_TC1 is not set +# CONFIG_SAM34_TC2 is not set +# CONFIG_SAM34_TWI is not set +# CONFIG_SAM34_TWIM is not set +# CONFIG_SAM34_TWIS is not set +# CONFIG_SAM34_TWIM0 is not set +# CONFIG_SAM34_TWIS0 is not set +# CONFIG_SAM34_TWIM1 is not set +# CONFIG_SAM34_TWIS1 is not set +CONFIG_SAM34_UART0=y +# CONFIG_SAM34_UDPHS is not set +# CONFIG_SAM34_USART0 is not set +# CONFIG_SAM34_USART1 is not set +# CONFIG_SAM34_USART2 is not set +# CONFIG_SAM34_USART3 is not set +# CONFIG_SAM34_WDT is not set + +# +# AT91SAM3/4 External Memory Configuration +# +# CONFIG_SAM34_EXTNAND is not set +# CONFIG_SAM34_EXTNOR is not set +# CONFIG_SAM34_EXTSRAM0 is not set +# CONFIG_SAM34_EXTSRAM1 is not set + +# +# AT91SAM3/4 GPIO Interrupt Configuration +# +# CONFIG_SAM34_HAVE_GPIOD_IRQ is not set +# CONFIG_SAM34_HAVE_GPIOE_IRQ is not set +# CONFIG_SAM34_HAVE_GPIOF_IRQ is not set +# CONFIG_SAM34_GPIO_IRQ is not set +# CONFIG_SAM34_TC is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +CONFIG_ARCH_USE_MPU=y +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8720 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAM3UEK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sam3u-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +CONFIG_LIB_SYSCALL=y +CONFIG_SYS_RESERVED=8 +CONFIG_SYS_NNEST=2 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_KERNEL_HEAP=y +CONFIG_MM_KERNEL_HEAPSIZE=8192 +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_USRWORK is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_DISABLE_DD=y +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKFATFS=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +CONFIG_NSH_DISABLE_PS=y +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sam3u-ek/knsh/setenv.sh b/configs/sam3u-ek/knsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..844c14ebf4a9013d7ca551588d53b35bf5e2b72c --- /dev/null +++ b/configs/sam3u-ek/knsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/sam3u-ek/knsh/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sam3u-ek/nsh/Make.defs b/configs/sam3u-ek/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f54ceca5849eb00f858d1d95a861eb2d36a27899 --- /dev/null +++ b/configs/sam3u-ek/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/sam3u-ek/nsh/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/sam3u-ek/nsh/defconfig b/configs/sam3u-ek/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..57859252931ca48acacf11f1786fd534264d58fd --- /dev/null +++ b/configs/sam3u-ek/nsh/defconfig @@ -0,0 +1,916 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +CONFIG_ARCH_CHIP_SAM34=y +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="sam34" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTNOR=y +CONFIG_ARCH_HAVE_EXTSRAM0=y +CONFIG_ARCH_HAVE_EXTSRAM1=y + +# +# AT91SAM3/4 Configuration Options +# +CONFIG_ARCH_CHIP_ATSAM3U4E=y +# CONFIG_ARCH_CHIP_ATSAM3U4C is not set +# CONFIG_ARCH_CHIP_ATSAM3U2E is not set +# CONFIG_ARCH_CHIP_ATSAM3U2C is not set +# CONFIG_ARCH_CHIP_ATSAM3U1E is not set +# CONFIG_ARCH_CHIP_ATSAM3U1C is not set +# CONFIG_ARCH_CHIP_ATSAM3X8E is not set +# CONFIG_ARCH_CHIP_ATSAM3X8C is not set +# CONFIG_ARCH_CHIP_ATSAM3X4E is not set +# CONFIG_ARCH_CHIP_ATSAM3X4C is not set +# CONFIG_ARCH_CHIP_ATSAM3A8C is not set +# CONFIG_ARCH_CHIP_ATSAM3A4C is not set +# CONFIG_ARCH_CHIP_ATSAM4CMP16B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4A is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32B is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16B is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S16C is not set +# CONFIG_ARCH_CHIP_ATSAM4S16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S8C is not set +# CONFIG_ARCH_CHIP_ATSAM4S8B is not set +# CONFIG_ARCH_CHIP_ATSAM4E16E is not set +# CONFIG_ARCH_CHIP_ATSAM4E16C is not set +# CONFIG_ARCH_CHIP_ATSAM4E8E is not set +# CONFIG_ARCH_CHIP_ATSAM4E8C is not set +CONFIG_ARCH_CHIP_SAM3U=y +# CONFIG_ARCH_CHIP_SAM3X is not set +# CONFIG_ARCH_CHIP_SAM3A is not set +# CONFIG_ARCH_CHIP_SAM4CM is not set +# CONFIG_ARCH_CHIP_SAM4L is not set +# CONFIG_ARCH_CHIP_SAM4E is not set +# CONFIG_ARCH_CHIP_SAM4S is not set + +# +# AT91SAM3/4 Peripheral Support +# +# CONFIG_SAM34_ADC is not set +# CONFIG_SAM34_ADC12B is not set +# CONFIG_SAM34_DMAC0 is not set +# CONFIG_SAM34_DMAC1 is not set +# CONFIG_SAM34_HSMCI is not set +# CONFIG_SAM34_NAND is not set +# CONFIG_SAM34_PWM is not set +# CONFIG_SAM34_RTC is not set +# CONFIG_SAM34_RTT is not set +# CONFIG_SAM34_SMC is not set +# CONFIG_SAM34_SPI0 is not set +# CONFIG_SAM34_SSC is not set +# CONFIG_SAM34_TC0 is not set +# CONFIG_SAM34_TC1 is not set +# CONFIG_SAM34_TC2 is not set +# CONFIG_SAM34_TWI is not set +# CONFIG_SAM34_TWIM is not set +# CONFIG_SAM34_TWIS is not set +# CONFIG_SAM34_TWIM0 is not set +# CONFIG_SAM34_TWIS0 is not set +# CONFIG_SAM34_TWIM1 is not set +# CONFIG_SAM34_TWIS1 is not set +CONFIG_SAM34_UART0=y +# CONFIG_SAM34_UDPHS is not set +# CONFIG_SAM34_USART0 is not set +# CONFIG_SAM34_USART1 is not set +# CONFIG_SAM34_USART2 is not set +# CONFIG_SAM34_USART3 is not set +# CONFIG_SAM34_WDT is not set + +# +# AT91SAM3/4 External Memory Configuration +# +# CONFIG_SAM34_EXTNAND is not set +# CONFIG_SAM34_EXTNOR is not set +# CONFIG_SAM34_EXTSRAM0 is not set +# CONFIG_SAM34_EXTSRAM1 is not set + +# +# AT91SAM3/4 GPIO Interrupt Configuration +# +# CONFIG_SAM34_HAVE_GPIOD_IRQ is not set +# CONFIG_SAM34_HAVE_GPIOE_IRQ is not set +# CONFIG_SAM34_HAVE_GPIOF_IRQ is not set +# CONFIG_SAM34_GPIO_IRQ is not set +# CONFIG_SAM34_TC is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8720 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAM3UEK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sam3u-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=9 +CONFIG_START_DAY=21 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sam3u-ek/nsh/setenv.sh b/configs/sam3u-ek/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..0bbec9cdf018826c303958880dee4a64c36fa51f --- /dev/null +++ b/configs/sam3u-ek/nsh/setenv.sh @@ -0,0 +1,74 @@ +#!/bin/bash +# configs/sam3u-ek/nsh/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sam3u-ek/nx/Make.defs b/configs/sam3u-ek/nx/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..07ec51c05397e10c9a11473d0213953f57e61d2a --- /dev/null +++ b/configs/sam3u-ek/nx/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/sam3u-ek/nx/Make.defs +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/sam3u-ek/nx/defconfig b/configs/sam3u-ek/nx/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..a67abe25d4e6711a109a119b4ae595da4c148993 --- /dev/null +++ b/configs/sam3u-ek/nx/defconfig @@ -0,0 +1,919 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +CONFIG_ARCH_CHIP_SAM34=y +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="sam34" +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTNOR=y +CONFIG_ARCH_HAVE_EXTSRAM0=y +CONFIG_ARCH_HAVE_EXTSRAM1=y + +# +# AT91SAM3/4 Configuration Options +# +CONFIG_ARCH_CHIP_ATSAM3U4E=y +# CONFIG_ARCH_CHIP_ATSAM3U4C is not set +# CONFIG_ARCH_CHIP_ATSAM3U2E is not set +# CONFIG_ARCH_CHIP_ATSAM3U2C is not set +# CONFIG_ARCH_CHIP_ATSAM3U1E is not set +# CONFIG_ARCH_CHIP_ATSAM3U1C is not set +# CONFIG_ARCH_CHIP_ATSAM3X8E is not set +# CONFIG_ARCH_CHIP_ATSAM3X8C is not set +# CONFIG_ARCH_CHIP_ATSAM3X4E is not set +# CONFIG_ARCH_CHIP_ATSAM3X4C is not set +# CONFIG_ARCH_CHIP_ATSAM3A8C is not set +# CONFIG_ARCH_CHIP_ATSAM3A4C is not set +# CONFIG_ARCH_CHIP_ATSAM4CMP16B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4A is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32B is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16B is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S16C is not set +# CONFIG_ARCH_CHIP_ATSAM4S16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S8C is not set +# CONFIG_ARCH_CHIP_ATSAM4S8B is not set +# CONFIG_ARCH_CHIP_ATSAM4E16E is not set +# CONFIG_ARCH_CHIP_ATSAM4E16C is not set +# CONFIG_ARCH_CHIP_ATSAM4E8E is not set +# CONFIG_ARCH_CHIP_ATSAM4E8C is not set +CONFIG_ARCH_CHIP_SAM3U=y +# CONFIG_ARCH_CHIP_SAM3X is not set +# CONFIG_ARCH_CHIP_SAM3A is not set +# CONFIG_ARCH_CHIP_SAM4CM is not set +# CONFIG_ARCH_CHIP_SAM4L is not set +# CONFIG_ARCH_CHIP_SAM4E is not set +# CONFIG_ARCH_CHIP_SAM4S is not set + +# +# AT91SAM3/4 Peripheral Support +# +# CONFIG_SAM34_ADC is not set +# CONFIG_SAM34_ADC12B is not set +# CONFIG_SAM34_DMAC0 is not set +# CONFIG_SAM34_DMAC1 is not set +# CONFIG_SAM34_HSMCI is not set +# CONFIG_SAM34_NAND is not set +# CONFIG_SAM34_PWM is not set +# CONFIG_SAM34_RTC is not set +# CONFIG_SAM34_RTT is not set +# CONFIG_SAM34_SMC is not set +# CONFIG_SAM34_SPI0 is not set +# CONFIG_SAM34_SSC is not set +# CONFIG_SAM34_TC0 is not set +# CONFIG_SAM34_TC1 is not set +# CONFIG_SAM34_TC2 is not set +# CONFIG_SAM34_TWI is not set +# CONFIG_SAM34_TWIM is not set +# CONFIG_SAM34_TWIS is not set +# CONFIG_SAM34_TWIM0 is not set +# CONFIG_SAM34_TWIS0 is not set +# CONFIG_SAM34_TWIM1 is not set +# CONFIG_SAM34_TWIS1 is not set +CONFIG_SAM34_UART0=y +# CONFIG_SAM34_UDPHS is not set +# CONFIG_SAM34_USART0 is not set +# CONFIG_SAM34_USART1 is not set +# CONFIG_SAM34_USART2 is not set +# CONFIG_SAM34_USART3 is not set +# CONFIG_SAM34_WDT is not set + +# +# AT91SAM3/4 External Memory Configuration +# +# CONFIG_SAM34_EXTNAND is not set +# CONFIG_SAM34_EXTNOR is not set +# CONFIG_SAM34_EXTSRAM0 is not set +# CONFIG_SAM34_EXTSRAM1 is not set + +# +# AT91SAM3/4 GPIO Interrupt Configuration +# +# CONFIG_SAM34_HAVE_GPIOD_IRQ is not set +# CONFIG_SAM34_HAVE_GPIOE_IRQ is not set +# CONFIG_SAM34_HAVE_GPIOF_IRQ is not set +# CONFIG_SAM34_GPIO_IRQ is not set +# CONFIG_SAM34_TC is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8720 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAM3UEK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sam3u-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=4 +CONFIG_START_DAY=18 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nx_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=12 +CONFIG_NFILE_STREAMS=12 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=1 +CONFIG_LCD_MAXPOWER=31 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +# CONFIG_LCD_LANDSCAPE is not set +CONFIG_LCD_PORTRAIT=y +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +# CONFIG_EXAMPLES_NX_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NX_BGCOLOR=0x7b5d +CONFIG_EXAMPLES_NX_COLOR1=0xe73f +CONFIG_EXAMPLES_NX_COLOR2=0xdefb +CONFIG_EXAMPLES_NX_TBCOLOR=0xad55 +CONFIG_EXAMPLES_NX_FONTCOLOR=0x0000 +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=16 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sam3u-ek/nx/setenv.sh b/configs/sam3u-ek/nx/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..60df5e7f1508be0c66edb130c3def4b72741d38a --- /dev/null +++ b/configs/sam3u-ek/nx/setenv.sh @@ -0,0 +1,74 @@ +#!/bin/bash +# configs/sam3u-ek/nx/setenv.sh +# +# Copyright (C) 2010 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sam3u-ek/nxwm/Make.defs b/configs/sam3u-ek/nxwm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..dbd49e2239e05433c7df017b8bda074b8a4d949f --- /dev/null +++ b/configs/sam3u-ek/nxwm/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/sam3u-ek/nxwm/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/sam3u-ek/nxwm/defconfig b/configs/sam3u-ek/nxwm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c8c85da0048702de23e67226e9af405e9cd47810 --- /dev/null +++ b/configs/sam3u-ek/nxwm/defconfig @@ -0,0 +1,1257 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +CONFIG_ARCH_CHIP_SAM34=y +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="sam34" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTNOR=y +CONFIG_ARCH_HAVE_EXTSRAM0=y +CONFIG_ARCH_HAVE_EXTSRAM1=y + +# +# AT91SAM3/4 Configuration Options +# +CONFIG_ARCH_CHIP_ATSAM3U4E=y +# CONFIG_ARCH_CHIP_ATSAM3U4C is not set +# CONFIG_ARCH_CHIP_ATSAM3U2E is not set +# CONFIG_ARCH_CHIP_ATSAM3U2C is not set +# CONFIG_ARCH_CHIP_ATSAM3U1E is not set +# CONFIG_ARCH_CHIP_ATSAM3U1C is not set +# CONFIG_ARCH_CHIP_ATSAM3X8E is not set +# CONFIG_ARCH_CHIP_ATSAM3X8C is not set +# CONFIG_ARCH_CHIP_ATSAM3X4E is not set +# CONFIG_ARCH_CHIP_ATSAM3X4C is not set +# CONFIG_ARCH_CHIP_ATSAM3A8C is not set +# CONFIG_ARCH_CHIP_ATSAM3A4C is not set +# CONFIG_ARCH_CHIP_ATSAM4CMP16B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4A is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32B is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16B is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S16C is not set +# CONFIG_ARCH_CHIP_ATSAM4S16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S8C is not set +# CONFIG_ARCH_CHIP_ATSAM4S8B is not set +# CONFIG_ARCH_CHIP_ATSAM4E16E is not set +# CONFIG_ARCH_CHIP_ATSAM4E16C is not set +# CONFIG_ARCH_CHIP_ATSAM4E8E is not set +# CONFIG_ARCH_CHIP_ATSAM4E8C is not set +CONFIG_ARCH_CHIP_SAM3U=y +# CONFIG_ARCH_CHIP_SAM3X is not set +# CONFIG_ARCH_CHIP_SAM3A is not set +# CONFIG_ARCH_CHIP_SAM4CM is not set +# CONFIG_ARCH_CHIP_SAM4L is not set +# CONFIG_ARCH_CHIP_SAM4E is not set +# CONFIG_ARCH_CHIP_SAM4S is not set + +# +# AT91SAM3/4 Peripheral Support +# +# CONFIG_SAM34_ADC is not set +# CONFIG_SAM34_ADC12B is not set +# CONFIG_SAM34_DMAC0 is not set +# CONFIG_SAM34_DMAC1 is not set +# CONFIG_SAM34_HSMCI is not set +# CONFIG_SAM34_NAND is not set +# CONFIG_SAM34_PWM is not set +# CONFIG_SAM34_RTC is not set +# CONFIG_SAM34_RTT is not set +# CONFIG_SAM34_SMC is not set +CONFIG_SAM34_SPI0=y +# CONFIG_SAM34_SSC is not set +# CONFIG_SAM34_TC0 is not set +# CONFIG_SAM34_TC1 is not set +# CONFIG_SAM34_TC2 is not set +# CONFIG_SAM34_TWI is not set +# CONFIG_SAM34_TWIM is not set +# CONFIG_SAM34_TWIS is not set +# CONFIG_SAM34_TWIM0 is not set +# CONFIG_SAM34_TWIS0 is not set +# CONFIG_SAM34_TWIM1 is not set +# CONFIG_SAM34_TWIS1 is not set +CONFIG_SAM34_UART0=y +# CONFIG_SAM34_UDPHS is not set +# CONFIG_SAM34_USART0 is not set +# CONFIG_SAM34_USART1 is not set +# CONFIG_SAM34_USART2 is not set +# CONFIG_SAM34_USART3 is not set +# CONFIG_SAM34_WDT is not set + +# +# AT91SAM3/4 External Memory Configuration +# +# CONFIG_SAM34_EXTNAND is not set +# CONFIG_SAM34_EXTNOR is not set +# CONFIG_SAM34_EXTSRAM0 is not set +# CONFIG_SAM34_EXTSRAM1 is not set + +# +# AT91SAM3/4 GPIO Interrupt Configuration +# +# CONFIG_SAM34_HAVE_GPIOD_IRQ is not set +# CONFIG_SAM34_HAVE_GPIOE_IRQ is not set +# CONFIG_SAM34_HAVE_GPIOF_IRQ is not set +CONFIG_SAM34_GPIO_IRQ=y +CONFIG_SAM34_GPIOA_IRQ=y +# CONFIG_SAM34_GPIOB_IRQ is not set +# CONFIG_SAM34_GPIOC_IRQ is not set + +# +# AT91SAM3/4 SPI device driver options +# +# CONFIG_SAM34_TC is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8720 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAM3UEK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sam3u-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=28 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxwm_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=12 +CONFIG_NFILE_STREAMS=12 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=48 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +CONFIG_INPUT_ADS7843E=y +# CONFIG_ADS7843E_MULTIPLE is not set +CONFIG_ADS7843E_SPIDEV=2 +CONFIG_ADS7843E_DEVMINOR=0 +CONFIG_ADS7843E_SPIMODE=0 +CONFIG_ADS7843E_FREQUENCY=100000 +CONFIG_ADS7843E_SWAPXY=y +CONFIG_ADS7843E_THRESHX=51 +CONFIG_ADS7843E_THRESHY=39 +# CONFIG_INPUT_MXT is not set +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=1 +CONFIG_LCD_MAXPOWER=31 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +CONFIG_NX_WRITEONLY=y + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +# CONFIG_NX_XYINPUT_MOUSE is not set +CONFIG_NX_XYINPUT_TOUCHSCREEN=y +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +CONFIG_NXFONT_SANS22X29B=y +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +CONFIG_NXTERM=y + +# +# NxTerm Output Text/Graphics Options +# +CONFIG_NXTERM_BPP=16 +CONFIG_NXTERM_CURSORCHAR=137 +CONFIG_NXTERM_MXCHARS=325 +CONFIG_NXTERM_CACHESIZE=32 +CONFIG_NXTERM_LINESEPARATION=0 +# CONFIG_NXTERM_NOWRAP is not set + +# +# NxTerm Input options +# +CONFIG_NXTERM_NXKBDIN=y +CONFIG_NXTERM_KBDBUFSIZE=16 +CONFIG_NXTERM_NPOLLWAITERS=4 + +# +# NX Multi-user only options +# +CONFIG_NX_MULTIUSER=y +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXSERVERMSGS=32 +CONFIG_NX_MXCLIENTMSGS=16 +# CONFIG_NX_NXSTART is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_CXX_NEWLONG=y + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# +CONFIG_NXWIDGETS=y + +# +# NX Server/Device Configuration +# +CONFIG_NXWIDGETS_FLICKERFREE=y +# CONFIG_NXWIDGETS_EXTERNINIT is not set +CONFIG_NXWIDGETS_DEVNO=0 +CONFIG_NXWIDGET_SERVERINIT=y +CONFIG_NXWIDGETS_SERVERPRIO=110 +CONFIG_NXWIDGETS_SERVERSTACK=1596 +CONFIG_NXWIDGETS_CLIENTPRIO=100 +CONFIG_NXWIDGETS_LISTENERPRIO=100 +CONFIG_NXWIDGETS_LISTENERSTACK=1596 +# CONFIG_NXWIDGET_EVENTWAIT is not set + +# +# NXWidget Configuration +# +CONFIG_NXWIDGETS_BPP=16 +CONFIG_NXWIDGETS_SIZEOFCHAR=1 + +# +# NXWidget Default Values +# +# CONFIG_NXWIDGETS_SYSTEM_CUSTOM_FONTID is not set +CONFIG_NXWIDGETS_TNXARRAY_INITIALSIZE=16 +CONFIG_NXWIDGETS_TNXARRAY_SIZEINCREMENT=8 +# CONFIG_NXWIDGETS_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_TEXTCOLORS is not set +CONFIG_NXWIDGETS_TRANSPARENT_COLOR=0x0 + +# +# Keypad behavior +# +CONFIG_NXWIDGETS_FIRST_REPEAT_TIME=500 +CONFIG_NXWIDGETS_CONTINUE_REPEAT_TIME=200 +CONFIG_NXWIDGETS_DOUBLECLICK_TIME=350 +CONFIG_NXWIDGETS_KBDBUFFER_SIZE=16 +CONFIG_NXWIDGETS_CURSORCONTROL_SIZE=4 +# CONFIG_NXWIDGET_MEMMONITOR is not set +CONFIG_NXWM=y + +# +# NxWM General Settings +# +# CONFIG_NXWM_LARGE_ICONS is not set +# CONFIG_NXWM_CUSTOM_FONTID is not set +CONFIG_NXWM_UNITTEST=y + +# +# Color configuration +# +# CONFIG_NXWM_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWM_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWM_CUSTOM_TEXTCOLORS is not set + +# +# Background Image +# +# CONFIG_NXWM_DISABLE_BACKGROUND_IMAGE is not set +CONFIG_NXWM_BACKGROUND_IMAGE="" + +# +# NxWM Taskbar Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_TASKBAR_VSPACING=4 +CONFIG_NXWM_TASKBAR_HSPACING=4 +# CONFIG_NXWM_TASKBAR_TOP is not set +# CONFIG_NXWM_TASKBAR_BOTTOM is not set +CONFIG_NXWM_TASKBAR_LEFT=y +# CONFIG_NXWM_TASKBAR_RIGHT is not set +# CONFIG_NXWM_CUSTOM_TASKBAR_WIDTH is not set +# CONFIG_NXWM_TASKBAR_ICONSCALE is not set +# CONFIG_NXWM_DISABLE_MINIMIZE is not set +# CONFIG_NXWM_TASKBAR_NO_BORDER is not set + +# +# NxWM Toolbar Configuration +# +# CONFIG_NXWM_CUSTOM_TOOLBAR_HEIGHT is not set +# CONFIG_NXWM_TOOLBAR_CUSTOM_FONTID is not set + +# +# NxWM Application Window Configuration +# +# CONFIG_NXWM_CUSTOM_APPWINDOW_ICONS is not set + +# +# NxWM Start Window Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_STARTWINDOW_VSPACING=4 +CONFIG_NXWM_STARTWINDOW_HSPACING=4 +# CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set +CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm" +CONFIG_NXWM_STARTWINDOW_MXMSGS=32 +CONFIG_NXWM_STARTWINDOW_MXMPRIO=42 +CONFIG_NXWM_STARTWINDOW_PRIO=100 +CONFIG_NXWM_STARTWINDOW_STACKSIZE=1596 + +# +# NxTerm Window Settings +# +CONFIG_NXWM_NXTERM=y +CONFIG_NXWM_NXTERM_PRIO=100 +CONFIG_NXWM_NXTERM_STACKSIZE=1596 +# CONFIG_NXWM_NXTERM_CUSTOM_COLORS is not set +# CONFIG_NXWM_NXTERM_CUSTOM_FONTID is not set +# CONFIG_NXWM_CUSTOM_NXTERM_ICON is not set + +# +# NxWM Touchscreen Configuration +# +CONFIG_NXWM_TOUCHSCREEN=y + +# +# Touchscreen Device Settings +# +CONFIG_NXWM_TOUCHSCREEN_DEVINIT=y +CONFIG_NXWM_TOUCHSCREEN_DEVNO=0 +CONFIG_NXWM_TOUCHSCREEN_DEVPATH="/dev/input0" +CONFIG_NXWM_TOUCHSCREEN_SIGNO=5 +CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=100 +CONFIG_NXWM_TOUCHSCREEN_LISTENERSTACK=1596 + +# +# NxWM Keyboard Configuration +# +CONFIG_NXWM_KEYBOARD=y + +# +# Keyboard Device Settings +# +CONFIG_NXWM_KEYBOARD_DEVPATH="/dev/console" +# CONFIG_NXWM_KEYBOARD_USBHOST is not set +CONFIG_NXWM_KEYBOARD_SIGNO=6 +CONFIG_NXWM_KEYBOARD_BUFSIZE=16 +CONFIG_NXWM_KEYBOARD_LISTENERPRIO=100 +CONFIG_NXWM_KEYBOARD_LISTENERSTACK=1024 + +# +# NxWM Calibration Display Settings +# +CONFIG_NXWM_CALIBRATION_MARGIN=40 +# CONFIG_NXWM_CALIBRATION_CUSTOM_COLORS is not set +# CONFIG_NXWM_CALIBRATION_MESSAGES is not set +# CONFIG_NXWM_CALIBRATION_ANISOTROPIC is not set +# CONFIG_NXWM_CUSTOM_CALIBRATION_ICON is not set +CONFIG_NXWM_CALIBRATION_SIGNO=5 +CONFIG_NXWM_CALIBRATION_LISTENERPRIO=100 +CONFIG_NXWM_CALIBRATION_LISTENERSTACK=1024 + +# +# NxWM Hex Calculator Display Settings +# +# CONFIG_NXWM_HEXCALCULATOR_CUSTOM_COLORS is not set +# CONFIG_NXWM_CUSTOM_HEXCALCULATOR_ICON is not set +CONFIG_NXWM_HEXCALCULATOR_CUSTOM_FONTID=y +CONFIG_NXWM_HEXCALCULATOR_FONTID=5 + +# +# NxWM Media Player Display Settings +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sam3u-ek/nxwm/setenv.sh b/configs/sam3u-ek/nxwm/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..75bbc22895faad329b52317c4d1572483f3ab276 --- /dev/null +++ b/configs/sam3u-ek/nxwm/setenv.sh @@ -0,0 +1,74 @@ +#!/bin/bash +# configs/sam3u-ek/nxwm/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sam3u-ek/scripts/kernel-space.ld b/configs/sam3u-ek/scripts/kernel-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..75fef5ca8b2b3ce5c27c61a48ce0f714f37c55c4 --- /dev/null +++ b/configs/sam3u-ek/scripts/kernel-space.ld @@ -0,0 +1,108 @@ +/**************************************************************************** + * configs/sam3u-ek/scripts/kernel-space.ld + * + * Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > kflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > kflash + + .ARM.extab : { + *(.ARM.extab*) + } > kflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > kflash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > ksram1 AT > kflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > ksram1 + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sam3u-ek/scripts/ld.script b/configs/sam3u-ek/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..55915357dc17a50fefc20c4d5b94a946ba274e34 --- /dev/null +++ b/configs/sam3u-ek/scripts/ld.script @@ -0,0 +1,118 @@ +/**************************************************************************** + * configs/sam3u-ek/scripts/ld.script + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The ATSAM3U4E has 256Kb of FLASH beginning at address 0x0008:0000, + * 32Kb of SRAM beginning at address 0x2000:0000, and 16Kb of SRAM beginning + * at address 0x2008:000 (used only for heap). When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00080000, LENGTH = 256K + sram1 (rwx) : ORIGIN = 0x20000000, LENGTH = 32K + sram2 (rwx) : ORIGIN = 0x20080000, LENGTH = 16K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram1 AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram1 + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sam3u-ek/scripts/memory.ld b/configs/sam3u-ek/scripts/memory.ld new file mode 100644 index 0000000000000000000000000000000000000000..70369776b4b1844f0f7d29581dc88d880b5e7c5f --- /dev/null +++ b/configs/sam3u-ek/scripts/memory.ld @@ -0,0 +1,97 @@ +/**************************************************************************** + * configs/sam3u-ek/scripts/user-space.ld + * + * Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The ATSAM3U4E has 256KB of FLASH beginning at address 0x0008:0000, + * 32KB of SRAM beginning at address 0x2000:0000, and 16Kb of SRAM beginning + * at address 0x2008:000 (used only for heap). When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + * + * For MPU support, the kernel-mode NuttX section is assumed to be 64KB of + * FLASH and 4KB of SRAM. That, of course, can be optimized as needed (See + * also configs/open1788/scripts/kernel-space.ld). + * + * Alignment of the user space FLASH partition is a critical factor: The + * user space FLASH partition will be spanned with a single region of size + * 2**n bytes. The alignment of the user-space region must be the same. As + * a consequence, as the user-space increases in size, the alignmment + * requirement also increases. + * + * This alignment requirement means that the largest user space FLASH region + * you can have will be 128KB at it would have to be positioned at + * 0x000a0000. If you change this address, don't forget to change the + * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify + * the check in kernel/userspace.c. + * + * For the same reasons, the maximum size of the SRAM mapping is limited to + * 4KB. Both of these alignment limitations could be reduced by using + * multiple regions to map the FLASH/SDRAM range or perhaps with some + * clever use of subregions. + * + * A detailed memory map for the 16Kb SRAM region is as follows: + * + * 0x20000 0000: Kernel .data region. Typical size: 0.1KB + * ------- ---- Kernel .bss region. Typical size: 1.8KB + * ------- ---- Kernel IDLE thread stack (approximate). Size is + * determined by CONFIG_IDLETHREAD_STACKSIZE and + * adjustments for alignment. Typical is 1KB. + * ------- ---- Padded to 4KB + * 0x20000 1000: User .data region. Size is variable. + * ------- ---- User .bss region Size is variable. + * ------- ---- Beginning of kernel heap. Size determined by + * CONFIG_MM_KERNEL_HEAPSIZE. + * ------- ---- Beginning of user heap. Can vary with other settings. + * 0x20000 8000: End+1 of CPU RAM + */ + +MEMORY +{ + /* 256Kb FLASH */ + + kflash (rx) : ORIGIN = 0x00080000, LENGTH = 64K + uflash (rx) : ORIGIN = 0x00090000, LENGTH = 64K + xflash (rx) : ORIGIN = 0x000a0000, LENGTH = 128K + + /* 32Kb SRAM */ + + ksram1 (rwx) : ORIGIN = 0x20000000, LENGTH = 4K + usram1 (rwx) : ORIGIN = 0x20001000, LENGTH = 4K + xsram1 (rwx) : ORIGIN = 0x20002000, LENGTH = 24K + + /* 16Kb SRAM */ + + sram2 (rwx) : ORIGIN = 0x20080000, LENGTH = 16K +} diff --git a/configs/sam3u-ek/scripts/user-space.ld b/configs/sam3u-ek/scripts/user-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..fed1c24eadc1747ea915e5b209a246944c245d51 --- /dev/null +++ b/configs/sam3u-ek/scripts/user-space.ld @@ -0,0 +1,111 @@ +/**************************************************************************** + * configs/sam3u-ek/scripts/user-space.ld + * + * Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +SECTIONS +{ + .userspace : { + *(.userspace) + } > uflash + + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > uflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > uflash + + .ARM.extab : { + *(.ARM.extab*) + } > uflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > uflash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > usram1 AT > uflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > usram1 + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sam3u-ek/src/.gitignore b/configs/sam3u-ek/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/sam3u-ek/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/sam3u-ek/src/Makefile b/configs/sam3u-ek/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..74126afa91273a645a0d58dc038295a29e57957e --- /dev/null +++ b/configs/sam3u-ek/src/Makefile @@ -0,0 +1,61 @@ +############################################################################ +# configs/sam3u-ek/src/Makefile +# +# Copyright (C) 2009-2010, 2012-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c sam_leds.c sam_buttons.c sam_spi.c sam_usbdev.c + +ifeq ($(CONFIG_LCD),y) +CSRCS += sam_lcd.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += sam_appinit.c +endif + +ifeq ($(CONFIG_SAM34_HSMCI),y) +CSRCS += sam_mmcsd.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += sam_usbmsc.c +endif + +ifeq ($(CONFIG_INPUT_ADS7843E),y) +CSRCS += sam_touchscreen.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/sam3u-ek/src/sam3u-ek.h b/configs/sam3u-ek/src/sam3u-ek.h new file mode 100644 index 0000000000000000000000000000000000000000..714ff54c2a4a6e03fe518a39130873bf6618a016 --- /dev/null +++ b/configs/sam3u-ek/src/sam3u-ek.h @@ -0,0 +1,267 @@ +/************************************************************************************ + * configs/sam3u-ek/src/sam3u-ek.h + * + * Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAM3U_EK_SRC_SAM3U_EK_H +#define __CONFIGS_SAM3U_EK_SRC_SAM3U_EK_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +#include +#include + +#include "chip/sam_pinmap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* External Memory Usage ************************************************************/ +/* LCD on CS2 */ + +#define LCD_BASE SAM_EXTCS2_BASE + +/* Touchscreen controller (TSC) */ + +#define CONFIG_TSC_ADS7843 1 /* ADS7843 present on board */ +#define CONFIG_TSC_SPI 0 /* On SPI0 */ + +/* SAM3U-EK GPIO Pin Definitions ****************************************************/ + +/* LCD: + * LCD Module Pin Out: SAM3U PIO: + * -------------------------------------------- -------------------------------------- + * Pin Symbol Function LCD PeriphA PeriphB Extra + * ---- ------ -------------------------------- -------------- -------- ------- ------ + * 1 GND Ground N/A --- --- --- + * 2 CS Chip Select PC16 NCS2 PWML3 AD12BAD5 + * 3 RS Register select signal PB8 (see A1) CTS0 A1 AD3 + * 4 WR Write operation signal PB23 (NWE) NWR0/NEW PCK1 --- + * 5 RD Read operation signal PB19 (NRD) NRD PWML2 --- + * 6 DB0 Data bus PB9 D0 DTR0 --- + * 7 DB1 Data bus PB10 D1 DSR0 --- + * 8 DB2 Data bus PB11 D2 DCD0 --- + * 9 DB3 Data bus PB12 D3 RI0 --- + * 10 DB4 Data bus PB13 D4 PWMH0 --- + * 11 DB5 Data bus PB14 D5 PWMH1 --- + * 12 DB6 Data bus PB15 D6 PWMH2 --- + * 13 DB7 Data bus PB16 D7 PMWH3 --- + * 14 DB8 Data bus PB25 D8 PWML0 --- + * 15 DB9 Data bus PB26 D9 PWML1 --- + * 16 DB10 Data bus PB27 D10 PWML2 --- + * 17 DB11 Data bus PB28 D11 PWML3 --- + * 18 DB12 Data bus PB29 D12 --- --- + * 19 DB13 Data bus PB30 D13 --- --- + * 20 DB14 Data bus PB31 D14 --- --- + * 21 DB15 Data bus PB6 TIOA1 D15 AD1 + * 22 NC No connection N/A --- --- --- + * 23 NC No connection N/A --- --- --- + * 24 RESET Reset signal N/A --- --- --- + * 25 GND Ground N/A --- --- --- + * 26 X+ Touch panel X_RIGHT PA15 SPCK PWMH2 --- + * 27 Y+ Touch panel Y_UP PA14 MOSI --- --- + * 28 X- Touch panel X_LEFT PA13 MISO --- --- + * 29 Y- Touch panel Y_DOWN PC14 A3 NPCS2 --- + * 30 GND Ground N/A --- --- --- + * 31 VDD1 Power supply for digital IO Pad N/A --- --- --- + * 32 VDD2 Power supply for analog circuit N/A --- --- --- + * 33 A1 Power supply for backlight PB8 (see RS) CTS0 A1 AD3 + * 34 A2 Power supply for backlight N/A --- --- --- + * 35 A3 Power supply for backlight N/A --- --- --- + * 36 A4 Power supply for backlight N/A --- --- --- + * 37 NC No connection N/A --- --- --- + * 38 NC No connection N/A --- --- --- + * 39 K Backlight ground N/A --- --- --- + */ + +#define GPIO_LCD_NCS2 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOC | GPIO_PIN16) +#define GPIO_LCD_RS (GPIO_PERIPHB | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN8) +#define GPIO_LCD_NWE (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN23) +#define GPIO_LCD_NRD (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN19) + +#define GPIO_LCD_D0 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN9) +#define GPIO_LCD_D1 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN10) +#define GPIO_LCD_D2 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN11) +#define GPIO_LCD_D3 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN12) +#define GPIO_LCD_D4 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN13) +#define GPIO_LCD_D5 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN14) +#define GPIO_LCD_D6 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN15) +#define GPIO_LCD_D7 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN16) +#define GPIO_LCD_D8 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN25) +#define GPIO_LCD_D9 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN26) +#define GPIO_LCD_D10 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN27) +#define GPIO_LCD_D11 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN28) +#define GPIO_LCD_D12 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN29) +#define GPIO_LCD_D13 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN30) +#define GPIO_LCD_D14 (GPIO_PERIPHA | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN31) +#define GPIO_LCD_D15 (GPIO_PERIPHB | GPIO_CFG_PULLUP | GPIO_PORT_PIOB | GPIO_PIN6) + +/* LCD Backlight pin definition. */ + +#define GPIO_LCD_BKL (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOC | GPIO_PIN19) + +/* Touchscreen controller (TSC) + * + * The IRQ is active low and pulled up. + * + * Pen Interrupt. Open anode output, requires 10kO to 100kO pull-up resistor + * externally. There is a 100KO pull-up on the SAM3U-EK board so no additional + * pull-up should be required. + * + * BUSY is high impedance when CS is high (not selected). When CS is + * is low, BUSY is active high. Since the pin is pulled up, it will appear + * busy if CS is not selected (there is no pull-up onboard). + */ + +#define GPIO_TCS_IRQ (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_INT_BOTHEDGES | \ + GPIO_PORT_PIOA | GPIO_PIN24) +#define GPIO_TCS_BUSY (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_PORT_PIOA | \ + GPIO_PIN2) + +#define SAM_TCS_IRQ SAM_IRQ_PA24 + +/* LEDs */ + +#define GPIO_LED0 (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | \ + GPIO_OUTPUT_CLEAR | GPIO_PIN0) +#define GPIO_LED1 (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | \ + GPIO_OUTPUT_SET | GPIO_PIN1) +#define GPIO_LED2 (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | \ + GPIO_OUTPUT_SET | GPIO_PIN2) + +/* BUTTONS */ + +#define GPIO_BUTTON1 (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOA | GPIO_PIN18) +#define GPIO_BUTTON2 (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOA | GPIO_PIN19) + +#define IRQ_BUTTON1 SAM_IRQ_PA18 +#define IRQ_BUTTON2 SAM_IRQ_PA19 + +/* SD Card Detect */ + +#define GPIO_MCI_CD (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_PORT_PIOA | GPIO_PIN25) + +/* SPI Chip Selects */ + +/* Chip select pin connected to the touchscreen controller and to the ZigBee module + * connector. Notice that the touchscreen chip select is implemented as a GPIO + * OUTPUT that must be controlled by board-specific. This is because the ADS7843E + * driver must be able to sample the device BUSY GPIO input between SPI transfers. + * However, the AD7843E will tri-state the BUSY input whenever the chip select is + * de-asserted. So the only option is to control the chip select manually and hold + * it low throughout the SPI transfer. + */ + +#define GPIO_TSC_NPCS2 (GPIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN14) +#define TSC_CSNUM 2 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the SAM3U-EK board. + * + ************************************************************************************/ + +void weak_function sam_spidev_initialize(void); + +/************************************************************************************ + * Name: sam_hsmciinit + * + * Description: + * Initialize HSMCI support + * + ************************************************************************************/ + +#ifdef CONFIG_SAM34_HSMCI +int weak_function sam_hsmciinit(void); +#else +# define sam_hsmciinit() +#endif + +/************************************************************************************ + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ************************************************************************************/ + +#ifdef CONFIG_SAM34_HSMCI +bool sam_cardinserted(unsigned char slot); +#else +# define sam_cardinserted(slot) (false) +#endif + +/************************************************************************************ + * Name: sam_writeprotected + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ************************************************************************************/ + +#ifdef CONFIG_SAM34_HSMCI +bool sam_writeprotected(unsigned char slot); +#else +# define sam_writeprotected(slot) (false) +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAM3U_EK_SRC_SAM3U_EK_H */ diff --git a/configs/sam3u-ek/src/sam_appinit.c b/configs/sam3u-ek/src/sam_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..481cc8ffbc12a19befeadb34061f9fdb043f2318 --- /dev/null +++ b/configs/sam3u-ek/src/sam_appinit.c @@ -0,0 +1,151 @@ +/**************************************************************************** + * config/sam3u-ek/src/sam_appinit.c + * + * Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "sam_hsmci.h" +#include "sam3u-ek.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#define NSH_HAVE_USBDEV 1 +#define NSH_HAVE_MMCSD 1 + +/* Can't support MMC/SD if the card interface is not enable */ + +#ifndef CONFIG_SAM34_HSMCI +# undef NSH_HAVE_MMCSD +#endif + +/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support + * is not enabled. + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_SAM34_HSMCI) +# undef NSH_HAVE_MMCSD +#endif + +#ifdef NSH_HAVE_MMCSD +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0 +# error "Only one MMC/SD slot" +# undef CONFIG_NSH_MMCSDSLOTNO +# endif + +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif + +# ifndef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#endif + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVE_USBDEV +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef NSH_HAVE_MMCSD + FAR struct sdio_dev_s *sdio; + int ret; + + /* Mount the SDIO-based MMC/SD block driver */ + /* First, get an instance of the SDIO interface */ + + syslog(LOG_INFO, "Initializing SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + + sdio = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!sdio) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + syslog(LOG_INFO, "Bind SDIO to the MMC/SD driver, minor=%d\n", + CONFIG_NSH_MMCSDMINOR); + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdio); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SDIO to the MMC/SD driver\n"); + + /* Then inform the HSMCI driver if there is or is not a card in the slot. */ + + sdio_mediachange(sdio, sam_cardinserted(0)); +#endif + return OK; +} diff --git a/configs/sam3u-ek/src/sam_boot.c b/configs/sam3u-ek/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..a9544913f1a2e9c1b4688ff0ea849fcc60346969 --- /dev/null +++ b/configs/sam3u-ek/src/sam_boot.c @@ -0,0 +1,101 @@ +/************************************************************************************ + * configs/sam3u-ek/src/sam_boot.c + * + * Copyright (C) 2009-2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "sam3u-ek.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * sam_spidev_initialize() has been brought into the link. + */ + +#ifdef CONFIG_SAM34_SPI0 + if (sam_spidev_initialize) + { + sam_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + + /* Setup SD card-related PIOs if 1) HSMCI is selected and 2) the weak + * function sam_hsmciinit() has been brought into the build. + */ + +#ifdef CONFIG_SAM34_HSMCI + if (sam_hsmciinit) + { + sam_hsmciinit(); + } +#endif +} diff --git a/configs/sam3u-ek/src/sam_buttons.c b/configs/sam3u-ek/src/sam_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..57d087792ff24b34243db9e9540b2dd5170c90ef --- /dev/null +++ b/configs/sam3u-ek/src/sam_buttons.c @@ -0,0 +1,205 @@ +/**************************************************************************** + * configs/sam3u-ek/src/up_leds.c + * + * Copyright (C) 2010, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "sam3u-ek.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +static xcpt_t g_irqbutton1; +static xcpt_t g_irqbutton2; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_irqx + * + * Description: + * This function implements the core of the board_button_irq() logic. + * + ****************************************************************************/ + +#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq, + xcpt_t irqhandler, xcpt_t *store) +{ + xcpt_t oldhandler; + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the following + * operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = *store; + *store = irqhandler; + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + /* Configure the interrupt */ + + sam_gpioirq(pinset); + (void)irq_attach(irq, irqhandler); + sam_gpioirqenable(irq); + } + else + { + /* Detach and disable the interrupt */ + + (void)irq_detach(irq); + sam_gpioirqdisable(irq); + } + + leave_critical_section(flags); + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + (void)sam_configgpio(GPIO_BUTTON1); + (void)sam_configgpio(GPIO_BUTTON2); +} + +/************************************************************************************ + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be called to collect + * the state of all buttons. board_buttons() returns an 8-bit bit set with each bit + * associated with a button. See the BUTTON* definitions above for the meaning of + * each bit in the returned value. + * + ************************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t retval; + + retval = sam_gpioread(GPIO_BUTTON1) ? 0 : BUTTON1; + retval |= sam_gpioread(GPIO_BUTTON2) ? 0 : BUTTON2; + + return retval; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address isreturned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the + * overall GPIO IRQ feature and CONFIG_AVR32_GPIOIRQSETA and/or + * CONFIG_AVR32_GPIOIRQSETB must be enabled to select GPIOs to support + * interrupts on. For button support, bits 2 and 3 must be set in + * CONFIG_AVR32_GPIOIRQSETB (PB2 and PB3). + * + ****************************************************************************/ + +#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + if (id == BUTTON1) + { + return board_button_irqx(GPIO_BUTTON1, IRQ_BUTTON1, + irqhandler, &g_irqbutton1); + } + else if (id == BUTTON2) + { + return board_button_irqx(GPIO_BUTTON2, IRQ_BUTTON2, + irqhandler, &g_irqbutton2); + } + else + { + return NULL; + } +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/sam3u-ek/src/sam_lcd.c b/configs/sam3u-ek/src/sam_lcd.c new file mode 100644 index 0000000000000000000000000000000000000000..c2a13f115b034f60f04057460c40b7f5f41e79bf --- /dev/null +++ b/configs/sam3u-ek/src/sam_lcd.c @@ -0,0 +1,1079 @@ +/************************************************************************************** + * configs/sam3u-ek/src/sam_lcd.c + * + * Copyright (C) 2010-2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************/ + +/************************************************************************************** + * The SAM3U-EK developement board features a TFT/Transmissive color LCD module with + * touch-screen, FTM280C12D, with integratd driver IC HX8346. The LCD display size + * is 2.8 inches, with a native resolution of 240 x 320 pixels. + * + * LCD Module Pin Out: SAM3U PIO: + * -------------------------------------------- -------------------------------------- + * Pin Symbol Function LCD PeriphA PeriphB Extra + * ---- ------ -------------------------------- -------------- -------- ------- ------ + * 1 GND Ground N/A --- --- --- + * 2 CS Chip Select PC16 NCS2 PWML3 AD12BAD5 + * 3 RS Register select signal PB8 (see A1) CTS0 A1 AD3 + * 4 WR Write operation signal PB23 (NWE) NWR0/NEW PCK1 --- + * 5 RD Read operation signal PB19 (NRD) NRD PWML2 --- + * 6 DB0 Data bus PB9 D0 DTR0 --- + * 7 DB1 Data bus PB10 D1 DSR0 --- + * 8 DB2 Data bus PB11 D2 DCD0 --- + * 9 DB3 Data bus PB12 D3 RI0 --- + * 10 DB4 Data bus PB13 D4 PWMH0 --- + * 11 DB5 Data bus PB14 D5 PWMH1 --- + * 12 DB6 Data bus PB15 D6 PWMH2 --- + * 13 DB7 Data bus PB16 D7 PMWH3 --- + * 14 DB8 Data bus PB25 D8 PWML0 --- + * 15 DB9 Data bus PB26 D9 PWML1 --- + * 16 DB10 Data bus PB27 D10 PWML2 --- + * 17 DB11 Data bus PB28 D11 PWML3 --- + * 18 DB12 Data bus PB29 D12 --- --- + * 19 DB13 Data bus PB30 D13 --- --- + * 20 DB14 Data bus PB31 D14 --- --- + * 21 DB15 Data bus PB6 TIOA1 D15 AD1 + * 22 NC No connection N/A --- --- --- + * 23 NC No connection N/A --- --- --- + * 24 RESET Reset signal N/A --- --- --- + * 25 GND Ground N/A --- --- --- + * 26 X+ Touch panel X_RIGHT PA15 SPCK PWMH2 --- + * 27 Y+ Touch panel Y_UP PA14 MOSI --- --- + * 28 X- Touch panel X_LEFT PA13 MISO --- --- + * 29 Y- Touch panel Y_DOWN PC14 A3 NPCS2 --- + * 30 GND Ground N/A --- --- --- + * 31 VDD1 Power supply for digital IO Pad N/A --- --- --- + * 32 VDD2 Power supply for analog circuit N/A --- --- --- + * 33 A1 Power supply for backlight PB8 (see RS) CTS0 A1 AD3 + * 34 A2 Power supply for backlight N/A --- --- --- + * 35 A3 Power supply for backlight N/A --- --- --- + * 36 A4 Power supply for backlight N/A --- --- --- + * 37 NC No connection N/A --- --- --- + * 38 NC No connection N/A --- --- --- + * 39 K Backlight ground N/A --- --- --- + * + * The LCD module gets its reset from NRST. As explained previously, this NRST is + * shared with the JTAG port and the push button BP1. The LCD chip select signal is + * connected to NCS2 (a dedicated jumper can disable it, making NCS2 available for + * other custom usage). + * + * The SAM3U4E communicates with the LCD through PIOB where a 16-bit parallel + * 8080-like protocol data bus has to be implemented by software. + * + * LCD backlight is made of 4 white chip LEDs in parallel, driven by an AAT3194 + * charge pump, MN4. The AAT3194 is controlled by the SAM3U4E through a single line + * Simple Serial Control (S2Cwire) interface, which permits to enable, disable, and + * set the LED drive current (LED brightness control) from a 32-level logarithmic + * scale. Four resistors R93/R94/R95/R96 are implemented for optional current + * limitation. + * + * The LCD module integrates a 4-wire touch screen panel controlled by + * MN5, ADS7843, which is a slave device on the SAM3U4E SPI bus. The ADS7843 touch + * ADC auxiliary inputs IN3/IN4 are connected to test points for optional function + * extension. + * + **************************************************************************************/ + +/************************************************************************************** + * Included Files + **************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "sam_gpio.h" +#include "chip/sam_pmc.h" +#include "chip/sam_smc.h" +#include "sam3u-ek.h" + +/************************************************************************************** + * Pre-processor Definitions + **************************************************************************************/ + +/* Configuration **********************************************************************/ + +/* Define the following to enable register-level debug output */ + +#undef CONFIG_LCD_REGDEBUG + +/* Verbose debug must also be enabled */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LED +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_LCD_REGDEBUG +#endif + +/* CONFIG_LCD_MAXCONTRAST -- must be defined and less than 32 */ + +#if !defined(CONFIG_LCD_MAXCONTRAST) || CONFIG_LCD_MAXCONTRAST < 1 || CONFIG_LCD_MAXCONTRAST > 31 +# error "CONFIG_LCD_MAXCONTRAST must be defined in the range 1 to 31" +#endif + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_LCD_REGDEBUG +# define regdbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define regdbg(x...) +#endif + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) dbg(format, ##__VA_ARGS__) +# define lcdvdbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/* Graphics Capbilities ***************************************************************/ + +/* LCD resolution: 320 (columns) by 240 (rows). The physical dimensions of the device + * are really 240 (columns) by 320 (rows), but unless CONFIG_LCD_PORTRAIT is defined, + * we swap rows and columns in setcursor to make things behave nicer (there IS a + * performance hit for this swap!). + */ + +#ifdef CONFIG_LCD_PORTRAIT +# define SAM3UEK_XRES 240 +# define SAM3UEK_YRES 320 +#else +# define SAM3UEK_XRES 320 +# define SAM3UEK_YRES 240 +#endif + +/* Color depth and format. BPP=16 R=6, G=6, B=5: RRRR RBBB BBBG GGGG */ + +#define SAM3UEK_BPP 16 +#define SAM3UEK_RGBFMT FB_FMT_RGB16_565 + +/* HX834x Definitions ****************************************************************/ + +/* HX834x register select */ + +#define HX843X_LCD_RS (1 << 1) + +/* HX8347 ID code */ + +#define HX8347_CHIPID 0x47 + +/* HX8347 LCD Registers */ + +#define HX8347_R00H 0x00 +#define HX8347_R01H 0x01 +#define HX8347_R02H 0x02 +#define HX8347_R03H 0x03 +#define HX8347_R04H 0x04 +#define HX8347_R05H 0x05 +#define HX8347_R06H 0x06 +#define HX8347_R07H 0x07 +#define HX8347_R08H 0x08 +#define HX8347_R09H 0x09 +#define HX8347_R0AH 0x0a +#define HX8347_R0CH 0x0c +#define HX8347_R0DH 0x0d +#define HX8347_R0EH 0x0e +#define HX8347_R0FH 0x0f +#define HX8347_R10H 0x10 +#define HX8347_R11H 0x11 +#define HX8347_R12H 0x12 +#define HX8347_R13H 0x13 +#define HX8347_R14H 0x14 +#define HX8347_R15H 0x15 +#define HX8347_R16H 0x16 +#define HX8347_R18H 0x18 +#define HX8347_R19H 0x19 +#define HX8347_R1AH 0x1a +#define HX8347_R1BH 0x1b +#define HX8347_R1CH 0x1c +#define HX8347_R1DH 0x1d +#define HX8347_R1EH 0x1e +#define HX8347_R1FH 0x1f +#define HX8347_R20H 0x20 +#define HX8347_R21H 0x21 +#define HX8347_R22H 0x22 +#define HX8347_R23H 0x23 +#define HX8347_R24H 0x24 +#define HX8347_R25H 0x25 +#define HX8347_R26H 0x26 +#define HX8347_R27H 0x27 +#define HX8347_R28H 0x28 +#define HX8347_R29H 0x29 +#define HX8347_R2AH 0x2a +#define HX8347_R2BH 0x2b +#define HX8347_R2CH 0x2c +#define HX8347_R2DH 0x2d +#define HX8347_R35H 0x35 +#define HX8347_R36H 0x36 +#define HX8347_R37H 0x37 +#define HX8347_R38H 0x38 +#define HX8347_R39H 0x39 +#define HX8347_R3AH 0x3a +#define HX8347_R3BH 0x3b +#define HX8347_R3CH 0x3c +#define HX8347_R3DH 0x3d +#define HX8347_R3EH 0x3e +#define HX8347_R40H 0x40 +#define HX8347_R41H 0x41 +#define HX8347_R42H 0x42 +#define HX8347_R43H 0x43 +#define HX8347_R44H 0x44 +#define HX8347_R45H 0x45 +#define HX8347_R46H 0x46 +#define HX8347_R47H 0x47 +#define HX8347_R48H 0x48 +#define HX8347_R49H 0x49 +#define HX8347_R4AH 0x4a +#define HX8347_R4BH 0x4b +#define HX8347_R4CH 0x4c +#define HX8347_R4DH 0x4d +#define HX8347_R4EH 0x4e +#define HX8347_R4FH 0x4f +#define HX8347_R50H 0x50 +#define HX8347_R51H 0x51 +#define HX8347_R64H 0x64 +#define HX8347_R65H 0x65 +#define HX8347_R66H 0x66 +#define HX8347_R67H 0x67 +#define HX8347_R70H 0x70 +#define HX8347_R72H 0x72 +#define HX8347_R90H 0x90 +#define HX8347_R91H 0x91 +#define HX8347_R93H 0x93 +#define HX8347_R94H 0x94 +#define HX8347_R95H 0x95 + +/************************************************************************************** + * Private Type Definition + **************************************************************************************/ + +/* This structure describes the state of this driver */ + +struct sam_dev_s +{ + /* Publically visible device structure */ + + struct lcd_dev_s dev; + + /* Private device state */ + + uint8_t power; /* The current power setting */ +}; + +/************************************************************************************** + * Private Function Protototypes + **************************************************************************************/ + +/* Low-level HX834x Register access */ + +static void sam_putreg(uint16_t reg, uint16_t data); +#ifdef CONFIG_DEBUG_LCD +static uint16_t sam_getreg(uint16_t reg); +#endif + +/* Misc. LCD Helper Functions */ + +static void sam_setcursor(fb_coord_t row, fb_coord_t col); +static inline void sam_wrsetup(void); +static inline void sam_wrram(uint16_t color); +static inline uint16_t sam_rdram(void); +static void sam_lcdon(void); +static void sam_lcdoff(void); + +#if 0 /* CONFIG_DEBUG_LCD */ +static void sam_dumpreg(uint8_t startreg, uint8_t endreg); +#endif + +/* LCD Data Transfer Methods */ + +static int sam_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels); +static int sam_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels); + +/* LCD Configuration */ + +static int sam_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo); +static int sam_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo); + +/* LCD RGB Mapping */ + +#ifdef CONFIG_FB_CMAP +# error "RGB color mapping not supported by this driver" +#endif + +/* Cursor Controls */ + +#ifdef CONFIG_FB_HWCURSOR +# error "Cursor control not supported by this driver" +#endif + +/* LCD Specific Controls */ + +static int sam_getpower(struct lcd_dev_s *dev); +static int sam_setpower(struct lcd_dev_s *dev, int power); +static int sam_getcontrast(struct lcd_dev_s *dev); +static int sam_setcontrast(struct lcd_dev_s *dev, unsigned int contrast); + +/************************************************************************************** + * Private Data + **************************************************************************************/ + +/* This is working memory allocated by the LCD driver for each LCD device + * and for each color plane. This memory will hold one raster line of data. + * The size of the allocated run buffer must therefor be at least + * (bpp * xres / 8). Actual alignment of the buffer must conform to the + * bitwidth of the underlying pixel type. + * + * If there are multiple planes, they may share the same working buffer + * because different planes will not be operate on concurrently. However, + * if there are multiple LCD devices, they must each have unique run buffers. + */ + +static uint16_t g_runbuffer[SAM3UEK_XRES]; + +/* This structure describes the overall LCD video controller */ + +static const struct fb_videoinfo_s g_videoinfo = +{ + .fmt = SAM3UEK_RGBFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */ + .xres = SAM3UEK_XRES, /* Horizontal resolution in pixel columns */ + .yres = SAM3UEK_YRES, /* Vertical resolution in pixel rows */ + .nplanes = 1, /* Number of color planes supported */ +}; + +/* This is the standard, NuttX Plane information object */ + +static const struct lcd_planeinfo_s g_planeinfo = +{ + .putrun = sam_putrun, /* Put a run into LCD memory */ + .getrun = sam_getrun, /* Get a run from LCD memory */ + .buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ + .bpp = SAM3UEK_BPP, /* Bits-per-pixel */ +}; + +/* This is the standard, NuttX LCD driver object */ + +static struct sam_dev_s g_lcddev_s = +{ + .dev = + { + /* LCD Configuration */ + + .getvideoinfo = sam_getvideoinfo, + .getplaneinfo = sam_getplaneinfo, + + /* LCD RGB Mapping -- Not supported */ + /* Cursor Controls -- Not supported */ + + /* LCD Specific Controls */ + + .getpower = sam_getpower, + .setpower = sam_setpower, + .getcontrast = sam_getcontrast, + .setcontrast = sam_setcontrast, + }, +}; + +/************************************************************************************** + * Private Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: sam_putreg + * + * Description: + * Write to a HX834x register + * + **************************************************************************************/ + +static void sam_putreg(uint16_t reg, uint16_t data) +{ + regdbg("base: %08x RS: %04x data: %04x\n", LCD_BASE, LCD_BASE + HX843X_LCD_RS, data); + putreg16(reg, LCD_BASE); + putreg16(data, LCD_BASE + HX843X_LCD_RS); +} + +/************************************************************************************** + * Name: sam_getreg + * + * Description: + * Read from a HX834x register + * + **************************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +static uint16_t sam_getreg(uint16_t reg) +{ + uint16_t data; + putreg16(reg, LCD_BASE); + data = getreg16(LCD_BASE + HX843X_LCD_RS); + regdbg("base: %08x RS: %04x data: %04x\n", LCD_BASE, LCD_BASE + HX843X_LCD_RS, data); + return data; +} +#endif + +/************************************************************************************** + * Name: sam_setcursor + * + * Description: + * Set the LCD cursor position. + * + **************************************************************************************/ + +static void sam_setcursor(fb_coord_t row, fb_coord_t col) +{ + uint8_t x1; + uint8_t x2; + uint8_t y1; + uint8_t y2; + + /* Get the upper and lower x and y positions */ + + x1 = (uint8_t)col; + x2 = (uint8_t)((uint16_t)col >> 8); + + y1 = (uint8_t)row; + y2 = (uint8_t)((uint16_t)row >> 8); + + /* Then set the cursor position */ + + sam_putreg(HX8347_R02H, x2); /* column high */ + sam_putreg(HX8347_R03H, x1); /* column low */ + sam_putreg(HX8347_R06H, y2); /* row high */ + sam_putreg(HX8347_R07H, y1); /* row low */ +} + +/************************************************************************************** + * Name: sam_wrsetup + * + * Description: + * Set up for a GRAM write operation. + * + **************************************************************************************/ + +static inline void sam_wrsetup(void) +{ + putreg16(HX8347_R22H, LCD_BASE); +} + +/************************************************************************************** + * Name: sam_wrram + * + * Description: + * Write to the 16-bit GRAM register + * + **************************************************************************************/ + +static inline void sam_wrram(uint16_t color) +{ + putreg16(color, LCD_BASE + HX843X_LCD_RS); +} + +/************************************************************************************** + * Name: sam_rdram + * + * Description: + * Read from the 16-bit GRAM register + * + **************************************************************************************/ + +static inline uint16_t sam_rdram(void) +{ + return getreg16(LCD_BASE + HX843X_LCD_RS); +} + +/************************************************************************************** + * Name: sam_lcdon + * + * Description: + * Turn the LCD on + * + **************************************************************************************/ + +static void sam_lcdon(void) +{ + /* Display ON Setting */ + + lcdvdbg("ON\n"); + sam_putreg(HX8347_R90H, 0x7f); /* SAP=0111 1111 */ + sam_putreg(HX8347_R26H, 0x04); /* GON=0 DTE=0 D=01 */ + up_mdelay(100); + sam_putreg(HX8347_R26H, 0x24); /* GON=1 DTE=0 D=01 */ + sam_putreg(HX8347_R26H, 0x2c); /* GON=1 DTE=0 D=11 */ + up_mdelay(100); + sam_putreg(HX8347_R26H, 0x3c); /* GON=1 DTE=1 D=11 */ +} + +/************************************************************************************** + * Name: sam_lcdoff + * + * Description: + * Turn the LCD off + * + **************************************************************************************/ + +static void sam_lcdoff(void) +{ + lcdvdbg("OFF\n"); + sam_putreg(HX8347_R90H, 0x00); /* SAP=0000 0000 */ + sam_putreg(HX8347_R26H, 0x00); /* GON=0 DTE=0 D=00 */ +} + +/************************************************************************************** + * Name: sam_dumpreg + * + * Description: + * Dump a range of LCD registers. + * + **************************************************************************************/ + +#if 0 /* CONFIG_DEBUG_LCD */ +static void sam_dumpreg(uint8_t startreg, uint8_t endreg) +{ + uint16_t value; + uint8_t addr; + + for (addr = startreg; addr <= endreg; addr++) + { + value = sam_getreg(addr); + lcddbg(" %02x: %04x\n", addr, value); + } +} +#endif + +/************************************************************************************** + * Name: sam_putrun + * + * Description: + * This method can be used to write a partial raster line to the LCD: + * + * row - Starting row to write to (range: 0 <= row < yres) + * col - Starting column to write to (range: 0 <= col <= xres-npixels) + * buffer - The buffer containing the run to be written to the LCD + * npixels - The number of pixels to write to the LCD + * (range: 0 < npixels <= xres-col) + * + **************************************************************************************/ + +static int sam_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels) +{ + uint16_t *run = (uint16_t*)buffer; + unsigned int i; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + +#ifdef CONFIG_LCD_PORTRAIT + /* Set up to write the run. */ + + sam_setcursor(row, col); + sam_wrsetup(); + + /* Write the run to GRAM. */ + + for (i = 0; i < npixels; i++) + { + /* Write the pixel pixel to GRAM */ + + sam_wrram(*run++); + } +#else + /* Write the run to GRAM. Because rows and colums are swapped, we need to reset + * the cursor position for every pixel. We could do this much faster if we + * adapted to the strange device aspect ratio. + */ + + col = 319-col; + for (i = 0; i < npixels; i++) + { + /* Set up to write the next pixel. Swapping x and y orientations so that the image + * comes out with the 320x240 aspect ratio (not the native 240x320). That is: + * + * row: 0-239 maps to x: 0-239 + * col: 0-319 maps to y: 319-0 + */ + + sam_setcursor(col--, row); + sam_wrsetup(); + + /* Write the pixel pixel to GRAM */ + + sam_wrram(*run++); + } +#endif + return OK; +} + +/************************************************************************************** + * Name: sam_getrun + * + * Description: + * This method can be used to read a partial raster line from the LCD: + * + * row - Starting row to read from (range: 0 <= row < yres) + * col - Starting column to read read (range: 0 <= col <= xres-npixels) + * buffer - The buffer in which to return the run read from the LCD + * npixels - The number of pixels to read from the LCD + * (range: 0 < npixels <= xres-col) + * + **************************************************************************************/ + +static int sam_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels) +{ + uint16_t *run = (uint16_t*)buffer; + unsigned int i; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + +#ifdef CONFIG_LCD_PORTRAIT + /* Set up to read the run */ + + sam_setcursor(row, col); + + /* Read the run from GRAM. */ + + for (i = 0; i < npixels; i++) + { + /* Read the next pixel */ + + *run++ = sam_rdram(); + } +#else + /* Read the run from GRAM Because rows and colums are swapped, we need to reset + * the cursor position for every pixel. We could do this much faster if we + * adapted to the strange device aspect ratio. + */ + + col = 319 - col; + for (i = 0; i < npixels; i++) + { + /* Read the next pixel.. Swapping x and y orientations so that the image + * comes out with the 320x240 aspect ratio (not the native 240x320). That is: + * + * row: 0-239 maps to x: 0-239 + * col: 0-319 maps to y: 319-0 + */ + + sam_setcursor(col--, row); + *run++ = sam_rdram(); + } +#endif + return OK; +} + +/************************************************************************************** + * Name: sam_getvideoinfo + * + * Description: + * Get information about the LCD video controller configuration. + * + **************************************************************************************/ + +static int sam_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo) +{ + DEBUGASSERT(dev && vinfo); + lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n", + g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes); + memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s)); + return OK; +} + +/************************************************************************************** + * Name: sam_getplaneinfo + * + * Description: + * Get information about the configuration of each LCD color plane. + * + **************************************************************************************/ + +static int sam_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo) +{ + DEBUGASSERT(dev && pinfo && planeno == 0); + lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp); + memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s)); + return OK; +} + +/************************************************************************************** + * Name: sam_getpower + * + * Description: + * Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on. On + * backlit LCDs, this setting may correspond to the backlight setting. + * + **************************************************************************************/ + +static int sam_getpower(struct lcd_dev_s *dev) +{ + struct sam_dev_s *priv = (struct sam_dev_s *)dev; + DEBUGASSERT(dev); + lcdvdbg("power: %d\n", priv->power); + return priv->power; +} + +/************************************************************************************** + * Name: sam_setpower + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + * LCD backlight is made of 4 white chip LEDs in parallel, driven by an AAT3194 charge + * pump, MN4. The AAT3194 is controlled by the SAM3U4E through a single line. Simple + * Serial Control (S2Cwire) interface, which permits to enable, disable, and set the + * LED drive current (LED brightness control) from a 32-level logarithmic scale. Four + * resistors R93/R94/R95/R96 are implemented for optional current limitation. + * + **************************************************************************************/ + +static int sam_setpower(struct lcd_dev_s *dev, int power) +{ + struct sam_dev_s *priv = (struct sam_dev_s *)dev; + unsigned int i; + + lcdvdbg("power: %d\n", power); + DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER); + + /* Switch off backlight */ + + sam_gpiowrite(GPIO_LCD_BKL, false); + + /* For for at least 500uS to drain the charge pump */ + + up_udelay(500); + + /* Set new backlight level by pumping "level" times */ + + for (i = 0; i < power; i++) + { + sam_gpiowrite(GPIO_LCD_BKL, false); + sam_gpiowrite(GPIO_LCD_BKL, false); + sam_gpiowrite(GPIO_LCD_BKL, false); + sam_gpiowrite(GPIO_LCD_BKL, true); + sam_gpiowrite(GPIO_LCD_BKL, true); + sam_gpiowrite(GPIO_LCD_BKL, true); + } + + /* This delay seems to be required... perhaps because of the big current jump? */ + + if (power != LCD_FULL_OFF) + { + up_mdelay(100); + } + + priv->power = power; + return OK; +} + +/************************************************************************************** + * Name: sam_getcontrast + * + * Description: + * Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static int sam_getcontrast(struct lcd_dev_s *dev) +{ + lcdvdbg("Not implemented\n"); + return -ENOSYS; +} + +/************************************************************************************** + * Name: sam_getcontrast + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static int sam_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) +{ + lcdvdbg("contrast: %d\n", contrast); + return -ENOSYS; +} + +/************************************************************************************** + * Public Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + **************************************************************************************/ + +int board_lcd_initialize(void) +{ +#ifdef CONFIG_DEBUG_LCD + uint16_t hxregval; +#endif + uint32_t regval; + unsigned int i; + + lcdvdbg("Initializing\n"); + + /* Enable LCD EXTCS2 pins */ + + sam_configgpio(GPIO_LCD_NCS2); + sam_configgpio(GPIO_LCD_RS); + sam_configgpio(GPIO_LCD_NWE); + sam_configgpio(GPIO_LCD_NRD); + + sam_configgpio(GPIO_LCD_D0); + sam_configgpio(GPIO_LCD_D1); + sam_configgpio(GPIO_LCD_D2); + sam_configgpio(GPIO_LCD_D3); + sam_configgpio(GPIO_LCD_D4); + sam_configgpio(GPIO_LCD_D5); + sam_configgpio(GPIO_LCD_D6); + sam_configgpio(GPIO_LCD_D7); + sam_configgpio(GPIO_LCD_D8); + sam_configgpio(GPIO_LCD_D9); + sam_configgpio(GPIO_LCD_D10); + sam_configgpio(GPIO_LCD_D11); + sam_configgpio(GPIO_LCD_D12); + sam_configgpio(GPIO_LCD_D13); + sam_configgpio(GPIO_LCD_D14); + sam_configgpio(GPIO_LCD_D15); + +#ifdef CONFIG_LCD_REGDEBUG + sam_dumpgpio(GPIO_PORT_PIOB, "PORTB"); + sam_dumpgpio(GPIO_PORT_PIOC, "PORTC"); +#endif + + /* Configure LCD Backlight Pin */ + + sam_configgpio(GPIO_LCD_BKL); + + /* Enable SMC peripheral clock */ + + putreg32((1 << SAM_PID_SMC), SAM_PMC_PCER); + regdbg("PMC PCSR: %08x SMC: %08x\n", getreg32(SAM_PMC_PCSR), (1 << SAM_PID_SMC)); + + /* Configure SMC CS2 */ + + regval = (4 << SMCCS_SETUP_NWESETUP_SHIFT) | (2 << SMCCS_SETUP_NCSWRSETUP_SHIFT) | + (4 << SMCCS_SETUP_NRDSETUP_SHIFT) | (2 << SMCCS_SETUP_NCSRDSETUP_SHIFT); + putreg32(regval, SAM_SMCCS_SETUP(2)); + + regval = (5 << SMCCS_PULSE_NWEPULSE_SHIFT) | (18 << SMCCS_PULSE_NCSWRPULSE_SHIFT) | + (5 << SMCCS_PULSE_NRDPULSE_SHIFT) | (18 << SMCCS_PULSE_NCSRDPULSE_SHIFT); + putreg32(regval, SAM_SMCCS_PULSE(2)); + + regval = (22 << SMCCS_CYCLE_NWECYCLE_SHIFT) | (22 << SMCCS_CYCLE_NRDCYCLE_SHIFT); + putreg32(regval, SAM_SMCCS_CYCLE(2)); + + regval = getreg32(SAM_SMCCS_MODE(2)); + regval &= ~(SMCCS_MODE_DBW_MASK | SMCCS_MODE_PMEN); + regval |= (SMCCS_MODE_READMODE) | (SMCCS_MODE_WRITEMODE) | (SMCCS_MODE_DBW_16BITS); + putreg32(regval, SAM_SMCCS_MODE(2)); + + regdbg("SMC SETUP[%08x]: %08x PULSE[%08x]: %08x\n", + SAM_SMCCS_SETUP(2), getreg32(SAM_SMCCS_SETUP(2)), + SAM_SMCCS_PULSE(2), getreg32(SAM_SMCCS_PULSE(2))); + regdbg(" CYCLE[%08x]: %08x MODE[%08x]: %08x\n", + SAM_SMCCS_CYCLE(2), getreg32(SAM_SMCCS_CYCLE(2)), + SAM_SMCCS_MODE(2), getreg32(SAM_SMCCS_MODE(2))); + + /* Check HX8347 Chip ID */ + +#ifdef CONFIG_DEBUG_LCD + hxregval = sam_getreg(HX8347_R67H); + lcdvdbg("Chip ID: %04x\n", hxregval); + if (hxregval != HX8347_CHIPID) + { + lcddbg("Bad chip ID: %04x Expected: %04x\n", hxregval, HX8347_CHIPID); + return -ENODEV; + } +#endif + + /* Initialize LCD controller (HX8347) -- Magic code from Atmel LCD example */ + + /* Start internal OSC */ + + sam_putreg(HX8347_R19H, 0x49); /* OSCADJ=10 0000 OSD_EN=1 60Hz */ + sam_putreg(HX8347_R93H, 0x0C); /* RADJ=1100 */ + + /* Power on flow */ + + sam_putreg(HX8347_R44H, 0x4D); /* VCM=100 1101 */ + sam_putreg(HX8347_R45H, 0x11); /* VDV=1 0001 */ + sam_putreg(HX8347_R20H, 0x40); /* BT=0100 */ + sam_putreg(HX8347_R1DH, 0x07); /* VC1=111 */ + sam_putreg(HX8347_R1EH, 0x00); /* VC3=000 */ + sam_putreg(HX8347_R1FH, 0x04); /* VRH=0100 */ + sam_putreg(HX8347_R1CH, 0x04); /* AP=100 */ + sam_putreg(HX8347_R1BH, 0x10); /* GASENB=0 PON=1 DK=0 XDK=0 DDVDH_TRI=0 STB=0 */ + up_mdelay(50); + sam_putreg(HX8347_R43H, 0x80); /* Set VCOMG=1 */ + up_mdelay(50); + + /* Gamma for CMO 2.8 */ + + sam_putreg(HX8347_R46H, 0x95); + sam_putreg(HX8347_R47H, 0x51); + sam_putreg(HX8347_R48H, 0x00); + sam_putreg(HX8347_R49H, 0x36); + sam_putreg(HX8347_R4AH, 0x11); + sam_putreg(HX8347_R4BH, 0x66); + sam_putreg(HX8347_R4CH, 0x14); + sam_putreg(HX8347_R4DH, 0x77); + sam_putreg(HX8347_R4EH, 0x13); + sam_putreg(HX8347_R4FH, 0x4c); + sam_putreg(HX8347_R50H, 0x46); + sam_putreg(HX8347_R51H, 0x46); + + /* 240x320 window setting */ + + sam_putreg(HX8347_R02H, 0x00); /* Column address start2 */ + sam_putreg(HX8347_R03H, 0x00); /* Column address start1 */ + sam_putreg(HX8347_R04H, 0x00); /* Column address end2 */ + sam_putreg(HX8347_R05H, 0xef); /* Column address end1 */ + sam_putreg(HX8347_R06H, 0x00); /* Row address start2 */ + sam_putreg(HX8347_R07H, 0x00); /* Row address start1 */ + sam_putreg(HX8347_R08H, 0x01); /* Row address end2 */ + sam_putreg(HX8347_R09H, 0x3f); /* Row address end1 */ + + /* Display Setting */ + + sam_putreg(HX8347_R01H, 0x06); /* IDMON=0 INVON=1 NORON=1 PTLON=0 */ + sam_putreg(HX8347_R16H, 0xc8); /* MY=1 MX=1 MV=0 BGR=1 */ + sam_putreg(HX8347_R23H, 0x95); /* N_DC=1001 0101 */ + sam_putreg(HX8347_R24H, 0x95); /* P_DC=1001 0101 */ + sam_putreg(HX8347_R25H, 0xff); /* I_DC=1111 1111 */ + sam_putreg(HX8347_R27H, 0x06); /* N_BP=0000 0110 */ + sam_putreg(HX8347_R28H, 0x06); /* N_FP=0000 0110 */ + sam_putreg(HX8347_R29H, 0x06); /* P_BP=0000 0110 */ + sam_putreg(HX8347_R2AH, 0x06); /* P_FP=0000 0110 */ + sam_putreg(HX8347_R2CH, 0x06); /* I_BP=0000 0110 */ + sam_putreg(HX8347_R2DH, 0x06); /* I_FP=0000 0110 */ + sam_putreg(HX8347_R3AH, 0x01); /* N_RTN=0000 N_NW=001 */ + sam_putreg(HX8347_R3BH, 0x01); /* P_RTN=0000 P_NW=001 */ + sam_putreg(HX8347_R3CH, 0xf0); /* I_RTN=1111 I_NW=000 */ + sam_putreg(HX8347_R3DH, 0x00); /* DIV=00 */ + sam_putreg(HX8347_R3EH, 0x38); /* SON=38h */ + sam_putreg(HX8347_R40H, 0x0f); /* GDON=0Fh */ + sam_putreg(HX8347_R41H, 0xf0); /* GDOF=F0h */ + + /* Set LCD backlight to FULL off */ + + sam_setpower(&g_lcddev_s.dev, LCD_FULL_OFF); + + /* Fill the display memory with the color BLACK */ + + sam_setcursor(0, 0); + sam_wrsetup(); + for (i = 0; i < (SAM3UEK_XRES * SAM3UEK_YRES); i++) + { + sam_wrram(RGB16_BLACK); + } + + /* Turn the LCD on (but with the backlight off) */ + + sam_lcdon(); + return OK; +} + +/************************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows + * support for multiple LCD devices. + * + **************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + lcdvdbg("lcddev: %d\n", lcddev); + return lcddev == 0 ? &g_lcddev_s.dev : NULL; +} + +/************************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Unitialize the framebuffer support. + * + **************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* Turn the LCD off */ + + sam_lcdoff(); + + /* Set LCD backlight to FULL off */ + + sam_setpower(&g_lcddev_s.dev, LCD_FULL_OFF); + + /* Disable SMC peripheral clock */ + + putreg32((1 << SAM_PID_SMC), SAM_PMC_PCDR); +} + + diff --git a/configs/sam3u-ek/src/sam_leds.c b/configs/sam3u-ek/src/sam_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..ee31f1871673e4ad4a1a3b9543942048e39dc3e9 --- /dev/null +++ b/configs/sam3u-ek/src/sam_leds.c @@ -0,0 +1,194 @@ +/**************************************************************************** + * configs/sam3u-ek/src/sam_leds.c + * + * Copyright (C) 2009-2010, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "sam_gpio.h" +#include "sam3u-ek.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +#define LED_OFF 0 +#define LED_ON 1 +#define LED_NOCHANGE 2 +#define LED_MASK 3 + +#define LED0_SHIFT 0 +#define LED0_OFF (LED_OFF << LED0_SHIFT) +#define LED0_ON (LED_ON << LED0_SHIFT) +#define LED0_NOCHANGE (LED_NOCHANGE << LED0_SHIFT) +#define LED1_SHIFT 2 +#define LED1_OFF (LED_OFF << LED1_SHIFT) +#define LED1_ON (LED_ON << LED1_SHIFT) +#define LED1_NOCHANGE (LED_NOCHANGE << LED1_SHIFT) +#define LED2_SHIFT 4 +#define LED2_OFF (LED_OFF << LED2_SHIFT) +#define LED2_ON (LED_ON << LED2_SHIFT) +#define LED2_NOCHANGE (LED_NOCHANGE << LED2_SHIFT) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint8_t g_ledon[8] = +{ + (LED0_OFF |LED1_OFF |LED2_OFF), /* LED_STARTED */ + (LED0_ON |LED1_OFF |LED2_ON), /* LED_HEAPALLOCATE */ + (LED0_OFF |LED1_ON |LED2_OFF), /* LED_IRQSENABLED */ + (LED0_ON |LED1_ON |LED2_ON), /* LED_STACKCREATED */ + + (LED0_NOCHANGE|LED1_OFF |LED2_NOCHANGE), /* LED_INIRQ */ + (LED0_NOCHANGE|LED1_NOCHANGE|LED2_OFF), /* LED_SIGNAL */ + (LED0_ON |LED1_NOCHANGE|LED2_NOCHANGE), /* LED_ASSERTION */ + (LED0_ON |LED1_NOCHANGE|LED2_NOCHANGE) /* LED_PANIC */ +}; + +static const uint8_t g_ledoff[8] = +{ + (LED0_OFF |LED1_OFF |LED2_OFF), /* LED_STARTED (does not happen) */ + (LED0_ON |LED1_OFF |LED2_ON), /* LED_HEAPALLOCATE (does not happen) */ + (LED0_OFF |LED1_ON |LED2_OFF), /* LED_IRQSENABLED (does not happen) */ + (LED0_ON |LED1_ON |LED2_ON), /* LED_STACKCREATED (does not happen) */ + + (LED0_NOCHANGE|LED1_ON |LED2_NOCHANGE), /* LED_INIRQ */ + (LED0_NOCHANGE|LED1_NOCHANGE|LED2_ON), /* LED_SIGNAL */ + (LED0_OFF |LED1_NOCHANGE|LED2_NOCHANGE), /* LED_ASSERTION */ + (LED0_OFF |LED1_NOCHANGE|LED2_NOCHANGE) /* LED_PANIC */ +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_setled + ****************************************************************************/ + +static void sam_setled(uint16_t pinset, uint8_t state) +{ + /* Assume active high. Initial state == 0 means active high */ + + bool polarity = ((pinset & GPIO_OUTPUT_SET) == 0); + switch (state) + { + case LED_OFF: + polarity = !polarity; + + case LED_ON: + break; + + case LED_NOCHANGE: + default: + return; + } + + sam_gpiowrite(pinset, polarity); +} + +/**************************************************************************** + * Name: sam_setleds + ****************************************************************************/ + +static void sam_setleds(uint8_t state) +{ + sam_setled(GPIO_LED0, (state >> LED0_SHIFT) & LED_MASK); + sam_setled(GPIO_LED1, (state >> LED1_SHIFT) & LED_MASK); + sam_setled(GPIO_LED2, (state >> LED2_SHIFT) & LED_MASK); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + (void)sam_configgpio(GPIO_LED0); + (void)sam_configgpio(GPIO_LED1); + (void)sam_configgpio(GPIO_LED2); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + sam_setleds(g_ledon[led & 7]); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + sam_setleds(g_ledoff[led & 7]); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/sam3u-ek/src/sam_mmcsd.c b/configs/sam3u-ek/src/sam_mmcsd.c new file mode 100644 index 0000000000000000000000000000000000000000..2d44104cb0b60ae910af4cf1e5ab68332c331b7b --- /dev/null +++ b/configs/sam3u-ek/src/sam_mmcsd.c @@ -0,0 +1,147 @@ +/************************************************************************************ + * configs/sam3u-ek/src/sam_mmcsd.c + * + * Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include "sam_gpio.h" +#include "sam3u-ek.h" + +#ifdef CONFIG_SAM34_HSMCI + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* This needs to be extended. The card detect GPIO must be configured as an interrupt. + * when the interrupt indicating that a card has been inserted or removed is received, + * this function must call sio_mediachange() to handle that event. See + * arch/arm/src/sam34/sam_hsmci.h for more information. + * + * Also see the SAMA5D3x-EK implementation of this same logic. The card detect + * interrupt handling should be a drop-in. + */ + +#ifdef GPIO_MCI_CD +# warning "Card detect interrupt handling needed" +#endif + +/* Usually defined in NuttX header files */ + +#ifndef OK +# define OK 0 +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_hsmciinit + * + * Description: + * Initialize HSMCI support. This function is called very early in board + * initialization. + * + ************************************************************************************/ + +int sam_hsmciinit(void) +{ +#ifdef GPIO_MCI_CD + sam_configgpio(GPIO_MCI_CD); +#endif +#ifdef GPIO_MCI_WP + sam_configgpio(GPIO_MCI_WP); +#endif + return OK; +} + +/************************************************************************************ + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ************************************************************************************/ + +bool sam_cardinserted(unsigned char slot) +{ + if (slot == 0) + { +#ifdef GPIO_MCI_CD + bool inserted = sam_gpioread(GPIO_MCI_CD); + fvdbg("inserted: %s\n", inserted ? "NO" : "YES"); + return !inserted; +#else + return true; +#endif + } + return false; +} + +/************************************************************************************ + * Name: sam_writeprotected + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ************************************************************************************/ + +bool sam_writeprotected(unsigned char slot) +{ + if (slot == 0) + { +#ifdef GPIO_MCI_WP + bool protected = sam_gpioread(GPIO_MCI_WP); + fvdbg("protected: %s\n", inserted ? "YES" : "NO"); + return protected; +#else + return false; +#endif + } + return false; +} + +#endif /* CONFIG_SAM34_HSMCI */ diff --git a/configs/sam3u-ek/src/sam_spi.c b/configs/sam3u-ek/src/sam_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..014dff663559ae6802687091a02dafd217acf4ee --- /dev/null +++ b/configs/sam3u-ek/src/sam_spi.c @@ -0,0 +1,204 @@ +/************************************************************************************ + * configs/sam3u-ek/src/sam_spi.c + * + * Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "sam_gpio.h" +#include "sam_spi.h" +#include "sam3u-ek.h" + +#ifdef CONFIG_SAM34_SPI0 + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the SAM3U-EK board. + * + ************************************************************************************/ + +void weak_function sam_spidev_initialize(void) +{ + /* The ZigBee module connects used NPCS0. However, there is not yet any + * ZigBee support. + */ + + /* The touchscreen connects using NPCS2 (PC14). */ + +#if defined(CONFIG_INPUT) && defined(CONFIG_INPUT_ADS7843E) + sam_configgpio(GPIO_TSC_NPCS2); +#endif +} + +/**************************************************************************** + * Name: sam_spi0select, sam_spi0status, and sam_spic0mddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * include: + * + * o sam_spi0select is a functions tomanage the board-specific chip selects + * o sam_spi0status and sam_spic0mddata: Implementations of the status + * and cmddata methods of the SPI interface defined by struct spi_ops_ + * (see include/nuttx/spi/spi.h). All other methods including + * sam_spibus_initialize()) are provided by common SAM3/4 logic. + * + * To use this common SPI logic on your board: + * + * 1. Provide logic in sam_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide sam_spi0select() and sam_spi0status() functions in your board- + * specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * sam_spic0mddata() functions in your board-specific logic. This + * function will perform cmd/data selection operations using GPIOs in + * the way your board is configured. + * 3. Add a call to sam_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by sam_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spi0select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * GPIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the GPIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +void sam_spi0select(enum spi_dev_e devid, bool selected) +{ + /* The touchscreen chip select is implemented as a GPIO OUTPUT that must + * be controlled by this function. This is because the ADS7843E driver + * must be able to sample the device BUSY GPIO input between SPI transfers. + * However, the AD7843E will tri-state the BUSY input whenever the chip + * select is de-asserted. So the only option is to control the chip select + * manually and hold it low throughout the SPI transfer. + */ + +#if defined(CONFIG_INPUT) && defined(CONFIG_INPUT_ADS7843E) + if (devid == SPIDEV_TOUCHSCREEN) + { + sam_gpiowrite(GPIO_TSC_NPCS2, !selected); + } +#endif +} + +/**************************************************************************** + * Name: sam_spi0status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} + +#endif /* CONFIG_SAM34_SPI0 */ diff --git a/configs/sam3u-ek/src/sam_touchscreen.c b/configs/sam3u-ek/src/sam_touchscreen.c new file mode 100644 index 0000000000000000000000000000000000000000..f45efa1ea7693bec389e8475e58022674dff26df --- /dev/null +++ b/configs/sam3u-ek/src/sam_touchscreen.c @@ -0,0 +1,297 @@ +/************************************************************************************ + * configs/sam3u-ek/src/sam_touchscreen.c + * + * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "sam_gpio.h" +#include "sam_spi.h" + +#include "sam3u-ek.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifdef CONFIG_INPUT_ADS7843E +#ifndef CONFIG_INPUT +# error "Touchscreen support requires CONFIG_INPUT" +#endif + +#ifndef CONFIG_SAM34_SPI0 +# error "Touchscreen support requires CONFIG_SAM34_SPI0" +#endif + +#ifndef CONFIG_SAM34_GPIOA_IRQ +# error "Touchscreen support requires CONFIG_SAM34_GPIOA_IRQ" +#endif + +#ifndef CONFIG_ADS7843E_FREQUENCY +# define CONFIG_ADS7843E_FREQUENCY 500000 +#endif + +#ifndef CONFIG_ADS7843E_SPIDEV +# define CONFIG_ADS7843E_SPIDEV TSC_CSNUM +#endif + +#if CONFIG_ADS7843E_SPIDEV != TSC_CSNUM +# error "CONFIG_ADS7843E_SPIDEV must have the same value as TSC_CSNUM" +#endif + +#ifndef CONFIG_ADS7843E_DEVMINOR +# define CONFIG_ADS7843E_DEVMINOR 0 +#endif + +/**************************************************************************** + * Static Function Prototypes + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the ADS7843E driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the ADS7843E interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + */ + +static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr); +static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable); +static void tsc_clear(FAR struct ads7843e_config_s *state); +static bool tsc_busy(FAR struct ads7843e_config_s *state); +static bool tsc_pendown(FAR struct ads7843e_config_s *state); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the ADS7843E + * driver. This structure provides information about the configuration + * of the ADS7843E and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writable because, under certain circumstances, the driver + * may modify frequency or X plate resistance values. + */ + +static struct ads7843e_config_s g_tscinfo = +{ + .frequency = CONFIG_ADS7843E_FREQUENCY, + + .attach = tsc_attach, + .enable = tsc_enable, + .clear = tsc_clear, + .busy = tsc_busy, + .pendown = tsc_pendown, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the ADS7843E driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the ADS7843E interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + */ + +static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr) +{ + /* Attach the ADS7843E interrupt */ + + ivdbg("Attaching %p to IRQ %d\n", isr, SAM_TCS_IRQ); + return irq_attach(SAM_TCS_IRQ, isr); +} + +static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable) +{ + /* Attach and enable, or detach and disable */ + + ivdbg("IRQ:%d enable:%d\n", SAM_TCS_IRQ, enable); + if (enable) + { + sam_gpioirqenable(SAM_TCS_IRQ); + } + else + { + sam_gpioirqdisable(SAM_TCS_IRQ); + } +} + +static void tsc_clear(FAR struct ads7843e_config_s *state) +{ + /* Does nothing */ +} + +static bool tsc_busy(FAR struct ads7843e_config_s *state) +{ +#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_VERBOSE) + static bool last = (bool)-1; +#endif + + /* BUSY is high impedance when CS is high (not selected). When CS is + * is low, BUSY is active high. + */ + + bool busy = sam_gpioread(GPIO_TCS_BUSY); +#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_VERBOSE) + if (busy != last) + { + ivdbg("busy:%d\n", busy); + last = busy; + } +#endif + + return busy; +} + +static bool tsc_pendown(FAR struct ads7843e_config_s *state) +{ + /* The /PENIRQ value is active low */ + + bool pendown = !sam_gpioread(GPIO_TCS_IRQ); + ivdbg("pendown:%d\n", pendown); + return pendown; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * configure the touchscreen device. This function will register the driver + * as /dev/inputN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ + FAR struct spi_dev_s *dev; + int ret; + + idbg("minor %d\n", minor); + DEBUGASSERT(minor == 0); + + /* Configure and enable the ADS7843E interrupt pin as an input */ + + (void)sam_configgpio(GPIO_TCS_BUSY); + (void)sam_configgpio(GPIO_TCS_IRQ); + + /* Configure the PIO interrupt */ + + sam_gpioirq(GPIO_TCS_IRQ); + + /* Get an instance of the SPI interface for the touchscreen chip select */ + + dev = sam_spibus_initialize(TSC_CSNUM); + if (!dev) + { + idbg("Failed to initialize SPI chip select %d\n", TSC_CSNUM); + return -ENODEV; + } + + /* Initialize and register the SPI touschscreen device */ + + ret = ads7843e_register(dev, &g_tscinfo, CONFIG_ADS7843E_DEVMINOR); + if (ret < 0) + { + idbg("Failed to initialize SPI chip select %d\n", TSC_CSNUM); + /* sam_spibus_uninitialize(dev); */ + return -ENODEV; + } + + return OK; +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* No support for un-initializing the touchscreen ADS7843E device yet */ +} + +#endif /* CONFIG_INPUT_ADS7843E */ + diff --git a/configs/sam3u-ek/src/sam_usbdev.c b/configs/sam3u-ek/src/sam_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..6d189cee424427b21572c93a4f963a6d433e6b48 --- /dev/null +++ b/configs/sam3u-ek/src/sam_usbdev.c @@ -0,0 +1,79 @@ +/************************************************************************************ + * configs/sam3u-ek/src/sam_usbdev.c + * + * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "sam3u-ek.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_usbsuspend + * + * Description: + * Board logic must provide the sam_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} diff --git a/configs/sam3u-ek/src/sam_usbmsc.c b/configs/sam3u-ek/src/sam_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..1780d27b101f2cdf5c1bbc84f88c72f78c2403f8 --- /dev/null +++ b/configs/sam3u-ek/src/sam_usbmsc.c @@ -0,0 +1,128 @@ +/**************************************************************************** + * configs/sam3u-ek/src/sam_usbmsc.c + * + * Copyright (C) 2009, 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the SAM3U MMC/SD SDIO block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "sam_hsmci.h" + +#ifdef CONFIG_SAM34_HSMCI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/* SLOT number(s) depends on the board configuration */ + +#undef SAM_MMCSDSLOTNO +#define SAM_MMCSDSLOTNO 0 + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + FAR struct sdio_dev_s *sdio; + int ret; + + /* First, get an instance of the SDIO interface */ + + syslg(LOG_INFO, "Initializing SDIO slot %d\n", + SAM_MMCSDSLOTNO); + + sdio = sdio_initialize(SAM_MMCSDSLOTNO); + if (!sdio) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + SAM_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SPI interface to the MMC/SD driver */ + + syslog(LOG_INFO, "" + "Bind SDIO to the MMC/SD driver, minor=%d\n", + CONFIG_SYSTEM_USBMSC_DEVMINOR1); + + ret = mmcsd_slotinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1, sdio); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", + ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SDIO to the MMC/SD driver\n"); + + /* Then let's guess and say that there is a card in the slot. I need to check to + * see if the SAM3U10E-EVAL board supports a GPIO to detect if there is a card in + * the slot. + */ + + sdio_mediachange(sdio, true); + return OK; +} + +#endif /* CONFIG_SAM34_HSMCI */ diff --git a/configs/sam4e-ek/Kconfig b/configs/sam4e-ek/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..8b2c167394f040270c3a51724d3d45e8a81395b6 --- /dev/null +++ b/configs/sam4e-ek/Kconfig @@ -0,0 +1,99 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAM4EEK + +choice + prompt "CPU Frequency" + default SAM4EEK_96MHZ + +config SAM4EEK_96MHZ + bool "96 MHz" + +config SAM4EEK_120MHZ + bool "120 MHz" + +endchoice # CPU Frequency + +config SAM4EEK_AT25_BLOCKMOUNT + bool "AT25 serial FLASH auto-mount" + default n + depends on SAM34_SPI0 && MTD_AT25 + ---help--- + Automatically initialize the AT25 SPI FLASH driver when NSH starts. + +choice + prompt "AT25 serial FLASH configuration" + default SAM4EEK_AT25_FTL + depends on SAM4EEK_AT25_BLOCKMOUNT + +config SAM4EEK_AT25_FTL + bool "Create AT25 Serial FLASH block driver" + ---help--- + Create the MTD driver for the AT25 and "wrap" the AT25 as a standard + block driver that could then, for example, be mounted using FAT or + any other file system. Any file system may be used, but there will + be no wear-leveling. + +config SAM4EEK_AT25_NXFFS + bool "Create AT25 serial FLASH NXFFS file system" + depends on FS_NXFFS + ---help--- + Create the MTD driver for the AT25 and mount the AT25 device as + a wear-leveling, NuttX FLASH file system (NXFFS). The downside of + NXFFS is that it can be very slow. + +endchoice # AT25 serial FLASH configuration + +choice + prompt "USB MSC block device" + default SAM4EEK_AT25_BLOCKDEVICE if SAM4EEK_AT25_FTL + default SAM4EEK_HSMCI_BLOCKDEVICE if !SAM4EEK_AT25_FTL + depends on SYSTEM_USBMSC && (SAM4EEK_AT25_FTL || SAM34_HSMCI) + +config SAM4EEK_AT25_BLOCKDEVICE + bool "AT25 Serial FLASH" + +config SAM4EEK_HSMCI_BLOCKDEVICE + bool "SD card" + depends on SAM34_HSMCI + +endchoice # AT25 serial FLASH configuration + +if LCD + +choice + prompt "LCD Type" + default SAM4EEK_LCD_ILI9341 + +config SAM4EEK_LCD_ILI9325 + bool "ILI9325 LCD controller" + +config SAM4EEK_LCD_ILI9341 + bool "ILI9341 LCD controller" + +endchoice # LCD Type + +choice + prompt "LCD Color Configuration" + default SAM4EEK_LCD_RGB565 + +config SAM4EEK_LCD_RGB565 + bool "RGB565" + +config SAM4EEK_LCD_RGB24 + bool "RGB24 / RGB888" + +config SAM4EEK_LCD_RGB32 + bool "RGB32" + +endchoice # LCD Color Configuration + +config SAM4EEK_LCD_BGCOLOR + hex "Initial background color" + default 0x00 + +endif # LCD +endif # ARCH_BOARD_SAM4EEK diff --git a/configs/sam4e-ek/README.txt b/configs/sam4e-ek/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..22f9ab157b6b68237cd73d8a95c2f09359e5e779 --- /dev/null +++ b/configs/sam4e-ek/README.txt @@ -0,0 +1,1667 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the Atmel +SAM4E-EK development. This board features the SAM4E16 MCU running at 96 +or 120MHz. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - Atmel Studio 6.1 + - Loading Code with J-Link + - Loading Code OpenOCD + - Writing to FLASH using SAM-BA + - LEDs + - Serial Console + - Networking Support + - AT25 Serial FLASH + - USB Full-Speed Device + - HSMCI + - Touchscreen + - ILI9325/41-Based LCD + - SAM4E-EK-specific Configuration Options + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +===================== + + The NuttX make system can be configured to support the various different + toolchain options. All testing has been conducted using the NuttX buildroot + toolchain. To use alternative toolchain, you simply need to add change of + the following configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : Generic GCC ARM EABI toolchain for Windows + + You may also have to modify the PATH in the setenv.h file if your + make cannot find the tools. + + NOTE about Windows native toolchains + ------------------------------------ + + There are basically three kinds of GCC toolchains that can be used: + + 1. A Linux native toolchain in a Linux environment, + 2. The buildroot Cygwin tool chain built in the Cygwin environment, + 3. A Windows native toolchain. + + There are several limitations to using a Windows based toolchain (#3) in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' + utility but you might easily find some new path problems. If so, check + out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic + links are used in Nuttx (e.g., include/arch). The make system works + around these problems for the Windows tools by copying directories + instead of linking them. But this can also cause some confusion for + you: For example, you may edit a file in a "linked" directory and find + that your changes had no effect. That is because you are building the + copy of the file in the "fake" symbolic directory. If you use a + Windows toolchain, you should get in the habit of making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/sam34, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/sam34/sam_vectors.S. You may need to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh sam4e-ek/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh sam4e-ek/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +Atmel Studio 6.1 +================ + + You can use Atmel Studio 6.1 to load and debug code. + + - To load code into FLASH: + + Tools menus: Tools -> Device Programming. + + Configure the debugger and chip and you are in business. + + - Debugging the NuttX Object File: + + 1) Rename object file from nuttx to nuttx.elf. That is an extension that + will be recognized by the file menu. + + 2) Select the project name, the full path to the NuttX object (called + just nuttx with no extension), and chip. Take the time to resolve + all of the source file linkages or else you will not have source + level debug! + + File menu: File -> Open -> Open object file for debugging + - Select nuttx.elf object file + - Select AT91SAM4E16 + - Select files for symbols as desired + - Select debugger + + 3) Debug menu: Debug -> Start debugging and break + - This will reload the nuttx.elf file into FLASH + + STATUS: At this point, Atmel Studio 6.1 claims that my object files are + not readable. A little more needs to be done to wring out this procedure. + +Loading Code with J-Link +======================== + + Loading code with the Segger tools and GDB + ------------------------------------------ + + 1) Change directories into the directory where you built NuttX. + 2) Start the GDB server and wait until it is ready to accept GDB + connections. + 3) Then run GDB like this: + + $ arm-none-eabi-gdb + (gdb) target remote localhost:2331 + (gdb) mon reset + (gdb) load nuttx + (gdb) ... start debugging ... + + Loading code using J-Link Commander + ---------------------------------- + + J-Link> r + J-Link> loadbin
+ J-Link> setpc
+ J-Link> ... start debugging ... + + STATUS: As of this writing, I have not been successful writing to FLASH + using the GDB server; the write succeeds with no complaints, but the contents + of the FLASH memory remain unchanged. This may be because of issues with + GPNVM1 settings and flash lock bits? In any event, the GDB server works + great for debugging after writing the program to FLASH using SAM-BA. + +Loading Code OpenOCD +==================== + + OpenOCD scripts are available in the configs/sam4e-ek/tools directory. + These scripts were used with OpenOCD 0.8.0. If you use a version after + OpenOCD 0.8.0, then you should comment out the following lines in the + openocd.cfg file: + + # set CHIPNAME SAM4E16E + # source [find target/at91sam4sXX.cfg] + + And uncomment this line: + + source [find board/atmel_sam4e_ek.cfg] + + This have been reported to work under Linux, but I have not been + successful using it under Windows OpenOCD 0.8.0 with libUSB. I get + + Open On-Chip Debugger 0.8.0 (2014-04-28-08:42) + ... + Error: libusb_open() failed with LIBUSB_ERROR_NOT_SUPPORTED + Error: Cannot find jlink Interface! Please check connection and permissions. + ... + + This is telling me that the Segger J-Link USB driver is incompatible + with libUSB. It may be necessary to replace the Segger J-Link driver + with the driver from libusb-win32-device-bin on sourceforge. + + - Go into Control Panel/System/Device Manager and update the J-Link + driver to point at the new jlink.inf file made with the + libusb-win32/bin inf-wizard. Browse to the unsigned driver + pointed to by the inf, libusb0.dll from the libusb-win32-device-bin + distribution to complete the installation. + + - The Segger driver appeared under "Universal Serial Bus Controllers" + in Device Manager (winXP) while the libusb-win32 driver appears as + new top level Dev Mgr category "LibUSB-Win32 Devices". + +Writing to FLASH using SAM-BA +============================= + + Assumed starting configuration: + + 1. You have installed the J-Link USB driver + + Using SAM-BA to write to FLASH: + + 1. Start the SAM-BA application, selecting (1) the SAM-ICE/J-Link + port, and (2) board = at91sam4e16-ek. + 2. The SAM-BA menu should appear. + 3. Select the FLASH tab and enable FLASH access + 4. "Send" the file to flash + 5. Enable "Boot from Flash (GPNVM1) + 6. Reset the board. + + STATUS: Works great! + +LEDs +==== + + The SAM4E-EK board has three, user-controllable LEDs labelled D2 (blue), + D3 (amber), and D4 (green) on the board. Usage of these LEDs is defined + in include/board.h and src/up_leds.c. They are encoded as follows: + + SYMBOL Meaning D3* D2 D4 + ------------------- ----------------------- ------- ------- ------- + LED_STARTED NuttX has been started OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + LED_IRQSENABLED Interrupts enabled OFF ON OFF + LED_STACKCREATED Idle stack created OFF ON ON + LED_INIRQ In an interrupt** N/C FLASH N/C + LED_SIGNAL In a signal handler*** N/C N/C FLASH + LED_ASSERTION An assertion failed FLASH N/C N/C + LED_PANIC The system has crashed FLASH N/C N/C + + * If D2 and D4 are statically on, then NuttX probably failed to boot + and these LEDs will give you some indication of where the failure was + ** The normal state is D3=OFF, D4=ON and D2 faintly glowing. This faint + glow is because of timer interrupts that result in the LED being + illuminated on a small proportion of the time. +*** D4 may also flicker normally if signals are processed. + +Serial Console +============== + + By default, all of these configurations use UART0 for the NuttX serial + console. UART0 corresponds to the DB-9 connector J17 labelled "DBGU". + This is a male connector and will require a female-to-female, NUL modem + cable to connect to a PC. + + An alternate is USART1 which connects to the other DB-9 connector labelled + "USART1". USART1 is not enabled by default unless specifically noted + otherwise in the configuration description. A NUL modem cable must be + used with the port as well. + + NOTE: To avoid any electrical conflict, the RS232 and RS485 transceiver + are isolated from the receiving line PA21. + + - Chose RS485 channel: Close 1-2 pins on JP11 and set PA23 to high level + - Chose RS232 channel: Close 2-3 pins on JP11 and set PA23 to low level + + By default serial console is configured for 115000, 8-bit, 1 stop bit, and + no parity. + +Networking Support +================== + + Networking support via the can be added to NSH by selecting the following + configuration options. + + Selecting the EMAC peripheral + ----------------------------- + + System Type -> SAM34 Peripheral Support + CONFIG_SAM34_EMAC=y : Enable the EMAC peripheral + + System Type -> EMAC device driver options + CONFIG_SAM34_EMAC_NRXBUFFERS=16 : Set aside some RS and TX buffers + CONFIG_SAM34_EMAC_NTXBUFFERS=4 + CONFIG_SAM34_EMAC_PHYADDR=1 : KSZ8051 PHY is at address 1 + CONFIG_SAM34_EMAC_AUTONEG=y : Use autonegotiation + CONFIG_SAM34_EMAC_MII=y : Only the MII interface is supported + CONFIG_SAM34_EMAC_PHYSR=30 : Address of PHY status register on KSZ8051 + CONFIG_SAM34_EMAC_PHYSR_ALTCONFIG=y : Needed for KSZ8051 + CONFIG_SAM34_EMAC_PHYSR_ALTMODE=0x7 : " " " " " " + CONFIG_SAM34_EMAC_PHYSR_10HD=0x1 : " " " " " " + CONFIG_SAM34_EMAC_PHYSR_100HD=0x2 : " " " " " " + CONFIG_SAM34_EMAC_PHYSR_10FD=0x5 : " " " " " " + CONFIG_SAM34_EMAC_PHYSR_100FD=0x6 : " " " " " " + + PHY selection. Later in the configuration steps, you will need to select + the KSZ8051 PHY for EMAC (See below) + + Networking Support + CONFIG_NET=y : Enable Neworking + CONFIG_NET_SOCKOPTS=y : Enable socket operations + CONFIG_NET_ETH_MTU=562 : Maximum packet size (MTU) 1518 is more standard + CONFIG_NET_ETH_TCP_RECVWNDO=536 : Should be the same as CONFIG_NET_ETH_MTU + CONFIG_NET_TCP=y : Enable TCP/IP networking + CONFIG_NET_TCPBACKLOG=y : Support TCP/IP backlog + CONFIG_NET_TCP_READAHEAD_BUFSIZE=536 Read-ahead buffer size + CONFIG_NET_UDP=y : Enable UDP networking + CONFIG_NET_BROADCAST=y : Needed for DNS name resolution + CONFIG_NET_ICMP=y : Enable ICMP networking + CONFIG_NET_ICMP_PING=y : Needed for NSH ping command + : Defaults should be okay for other options + Device drivers -> Network Device/PHY Support + CONFIG_NETDEVICES=y : Enabled PHY selection + CONFIG_ETH0_PHY_KSZ8051=y : Select the KSZ8051 PHY (for EMAC) + + Application Configuration -> Network Utilities + CONFIG_NETDB_DNSCLIENT=y : Enable host address resolution + CONFIG_NETUTILS_TELNETD=y : Enable the Telnet daemon + CONFIG_NETUTILS_TFTPC=y : Enable TFTP data file transfers for get and put commands + CONFIG_NETUTILS_NETLIB=y : Network library support is needed + CONFIG_NETUTILS_WEBCLIENT=y : Needed for wget support + : Defaults should be okay for other options + Application Configuration -> NSH Library + CONFIG_NSH_TELNET=y : Enable NSH session via Telnet + CONFIG_NSH_IPADDR=0x0a000002 : Select a fixed IP address + CONFIG_NSH_DRIPADDR=0x0a000001 : IP address of gateway/host PC + CONFIG_NSH_NETMASK=0xffffff00 : Netmask + CONFIG_NSH_NOMAC=y : Need to make up a bogus MAC address + : Defaults should be okay for other options + + You can also enable enable the DHCPC client for networks that use + dynamically assigned address: + + Application Configuration -> Network Utilities + CONFIG_NETUTILS_DHCPC=y : Enables the DHCP client + + Networking Support + CONFIG_NET_UDP=y : Depends on broadcast UDP + + Application Configuration -> NSH Library + CONFIG_NET_BROADCAST=y + CONFIG_NSH_DHCPC=y : Tells NSH to use DHCPC, not + : the fixed addresses + + Using the network with NSH + -------------------------- + + So what can you do with this networking support? First you see that + NSH has several new network related commands: + + ifconfig, ifdown, ifup: Commands to help manage your network + get and put: TFTP file transfers + wget: HTML file transfers + ping: Check for access to peers on the network + Telnet console: You can access the NSH remotely via telnet. + + You can also enable other add on features like full FTP or a Web + Server or XML RPC and others. There are also other features that + you can enable like DHCP client (or server) or network name + resolution. + + By default, the IP address of the SAM4E-EK will be 10.0.0.2 and + it will assume that your host is the gateway and has the IP address + 10.0.0.1. + + nsh> ifconfig + eth0 HWaddr 00:e0:de:ad:be:ef at UP + IPaddr:10.0.0.2 DRaddr:10.0.0.1 Mask:255.255.255.0 + + You can use ping to test for connectivity to the host (Careful, + Window firewalls usually block ping-related ICMP traffic). On the + target side, you can: + + nsh> ping 10.0.0.1 + PING 10.0.0.1 56 bytes of data + 56 bytes from 10.0.0.1: icmp_seq=1 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=2 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=3 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=4 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=5 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=6 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=7 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=8 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=9 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=10 time=0 ms + 10 packets transmitted, 10 received, 0% packet loss, time 10100 ms + + NOTE: In this configuration is is normal to have packet loss > 0% + the first time you ping due to the default handling of the ARP + table. + + On the host side, you should also be able to ping the SAM4E-EK: + + $ ping 10.0.0.2 + + You can also log into the NSH from the host PC like this: + + $ telnet 10.0.0.2 + Trying 10.0.0.2... + Connected to 10.0.0.2. + Escape character is '^]'. + sh_telnetmain: Session [3] Started + + NuttShell (NSH) NuttX-6.31 + nsh> help + help usage: help [-v] [] + + [ echo ifconfig mkdir mw sleep + ? exec ifdown mkfatfs ping test + cat exit ifup mkfifo ps umount + cp free kill mkrd put usleep + cmp get losetup mh rm wget + dd help ls mount rmdir xd + df hexdump mb mv sh + + Builtin Apps: + nsh> + + NOTE: If you enable this feature, you experience a delay on booting. + That is because the start-up logic waits for the network connection + to be established before starting NuttX. In a real application, you + would probably want to do the network bringup on a separate thread + so that access to the NSH prompt is not delayed. + + This delay will be especially long if the board is not connected to + a network because additional time will be required to fail with timeout + errors. + + This delay will be especially long if the board is not connected to + a network. On the order of a minute! You will probably think that + NuttX has crashed! And then, when it finally does come up, the + network will not be available. + + Network Initialization Thread + ----------------------------- + There is a configuration option enabled by CONFIG_NSH_NETINIT_THREAD + that will do the NSH network bring-up asynchronously in parallel on + a separate thread. This eliminates the (visible) networking delay + altogether. This current implementation, however, has some limitations: + + - If no network is connected, the network bring-up will fail and + the network initialization thread will simply exit. There are no + retries and no mechanism to know if the network initialization was + successful (it could perform a network Ioctl to see if the link is + up and it now, keep trying, but it does not do that now). + + - Furthermore, there is currently no support for detecting loss of + network connection and recovery of the connection (similarly, this + thread could poll periodically for network status, but does not). + + Both of these shortcomings could be eliminated by enabling the network + monitor. See the SAMA5 configurations for a description of what it would + take to incorporate the network monitor feature. + +AT25 Serial FLASH +================= + + Connections + ----------- + + Both the SAM4E-EK include an Atmel AT25DF321A, 32-megabit, 2.7-volt + SPI serial flash. The SPI + connection is as follows: + + ------ ------- --------------- + SAM4E AT25 SAM4E + GPIO PIN FUNCTION + ------ ------- --------------- + PA13 SI MOSI + PA12 SO MIS0 + PA14 SCK SPCK + PA5 /CS NPCS3 (pulled high externally) + ------ ------- --------------- + + Configuration + ------------- + + Support for the serial FLASH can be enabled in these configurations. These + are the relevant configuration settings. These settings (1) Enable SPI0, + (2) Enable DMAC0 to support DMA transfers on SPI for best performance, + (3) Enable the AT25 Serial FLASH, and (3) Set up NuttX to configure the + file system on the AT25 FLASH: + + System Type -> ATSAM3/4 Peripheral Support + CONFIG_SAM34_SPI0=y : Enable SPI0 + CONFIG_SAM34_DMAC0=y : Enable DMA controller 0 + + System Type -> SPI device driver options + CONFIG_SAM34_SPI_DMA=y : Use DMA for SPI transfers + CONFIG_SAM34_SPI_DMATHRESHOLD=4 : Don't DMA for small transfers + + Device Drivers -> SPI Driver Support + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : Support the exchange method + + Device Drivers -> Memory Technology Device (MTD) Support + CONFIG_MTD=y : Enable MTD support + CONFIG_MTD_AT25=y : Enable the AT25 driver + CONFIG_AT25_SPIMODE=0 : Use SPI mode 0 + CONFIG_AT25_SPIFREQUENCY=20000000 : Use SPI frequency 12MHz + + The AT25 is capable of operation at 20MHz. However, if you experience + any issues with the AT25, then lower this frequency may give more + predictable performance. + + File Systems -> FAT + CONFIG_FS_FAT=y : Enable and configure FAT + CONFIG_FAT_LCNAMES=y : Upper/lower case names + CONFIG_FAT_LFN=y : Long file name support (See NOTE) + CONFIG_FAT_MAXFNAME=32 : Limit filename sizes to 32 bytes + + NOTE: Use care if you plan to use FAT long file name feature in a product; + There are issues with certain Microsoft patents on the long file name + technology. + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + Board Selection + CONFIG_SAM4EEK_AT25_BLOCKMOUNT=y : Mounts AT25 for NSH + CONFIG_SAM4EEK_AT25_FTL=y : Create block driver for FAT + + You can then format the AT25 FLASH for a FAT file system and mount the + file system at /mnt/at25 using these NSH commands: + + nsh> mkfatfs /dev/mtdblock0 + nsh> mount -t vfat /dev/mtdblock0 /mnt/at25 + + Then you an use the FLASH as a normal FAT file system: + + nsh> echo "This is a test" >/mnt/at25/atest.txt + nsh> ls -l /mnt/at25 + /mnt/at25: + -rw-rw-rw- 16 atest.txt + nsh> cat /mnt/at25/atest.txt + This is a test + +USB Full-Speed Device +===================== + + Basic USB Full-Speed Device Configuration + ----------------------------------------- + + Support the USB full-speed device (UDP) driver can be enabled with these + NuttX configuration settings. + + Device Drivers -> USB Device Driver Support + CONFIG_USBDEV=y : Enable USB device support + CONFIG_USBDEV_DUALSPEED=n : Device does not support High-Speed + CONFIG_USBDEV_DMA=n : Device does not use DMA + + System Type -> ATSAM3/4 Peripheral Support + CONFIG_SAM34_UDP=y : Enable UDP Full Speed USB device + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + Mass Storage Class + ------------------ + + The Mass Storage Class (MSC) class driver can be selected for use with + UDP. Note: The following assumes that the internal AT25 Serial FLASH + is configured to support a FAT file system through an FTL layer as + described about under "AT25 Serial FLASH". + + Device Drivers -> USB Device Driver Support + CONFIG_USBMSC=y : Enable the USB MSC class driver + CONFIG_USBMSC_EPBULKOUT=1 : Use EP1 for the BULK OUT endpoint + CONFIG_USBMSC_EPBULKIN=2 : Use EP2 for the BULK IN endpoint + CONFIG_USBMSC_BULKINREQLEN=64 : (Defaults for full speed) + CONFIG_USBMSC_BULKOUTREQLEN=64 : + : Defaults for other settings as well? + Board Selection + CONFIG_SAM4EEK_AT25_BLOCKDEVICE=y : Export AT25 serial FLASH device + CONFIG_SAM4EEK_HSMCI_BLOCKDEVICE=n : Don't export HSMCI SD card + + Note: If properly configured, you could export the HSMCI SD card instead + of the internal AT25 Serial FLASH. + + The following setting enables an add-on that can can be used to control + the USB MSC device. It will add two new NSH commands: + + a. msconn will connect the USB serial device and export the AT25 + to the host, and + b. msdis which will disconnect the USB serial device. + + Application Configuration -> System Add-Ons: + CONFIG_SYSTEM_USBMSC=y : Enable the USBMSC add-on + CONFIG_SYSTEM_USBMSC_NLUNS=1 : One LUN + CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 : Minor device zero + CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mtdblock0" + : Use a single, LUN: The AT25 + : block driver. + NOTES: + + a. To prevent file system corruption, make sure that the AT25 is un- + mounted *before* exporting the mass storage device to the host: + + nsh> umount /mnt/at25 + nsh> mscon + + The AT25 can be re-mounted after the mass storage class is disconnected: + + nsh> msdis + nsh> mount -t vfat /dev/mtdblock0 /mnt/at25 + + b. If you change the value CONFIG_SYSTEM_USBMSC_DEVPATH1, then you + can export other file systems: + + "/dev/mmcsd0" would export the HSMCI SD slot (not currently available, + see the "HSMCI" section). + + "/dev/ram0" could even be used to export a RAM disk. But you would + first have to use mkrd to create the RAM disk and mkfatfs to put + a FAT file system on it. + + STATUS: + + 2014-3-25: Marginally functional. Very slow to come up. USB analyzer + shows several resets before the host decides that it is + happy with the device. There are no obvious errors in the + USB data capture. Testing is insufficient. This needs to + be revisited. + + Last tested at 96MHz with the CMCC disabled. + + CDC/ACM Serial Device Class + --------------------------- + + This will select the CDC/ACM serial device. Defaults for the other + options should be okay. + + Device Drivers -> USB Device Driver Support + CONFIG_CDCACM=y : Enable the CDC/ACM device + CONFIG_CDCACM_EPINTIN=1 : Select endpoint numbers + CONFIG_CDCACM_EPBULKOUT=2 + CONFIG_CDCACM_EPBULKIN=3 + + The following setting enables an example that can can be used to control + the CDC/ACM device. It will add two new NSH commands: + + a. sercon will connect the USB serial device (creating /dev/ttyACM0), and + b. serdis which will disconnect the USB serial device (destroying + /dev/ttyACM0). + + Application Configuration -> Examples: + CONFIG_SYSTEM_CDCACM=y : Enable an CDC/ACM example + CONFIG_SYSTEM_CDCACM_DEVMINOR=0 : Use /dev/ttyUSB0 + + NOTES: + + 1. You cannot have both the CDC/ACM and the MSC class drivers enabled + simultaneously in the way described here. If you want to use both, then + you will need to consider a USB "composite" devices that support supports + both interfaces. There are no instructures here for setting up the USB + composite device, but there are other examples in the NuttX board support + directories that can be used for reference. + + 2. Linux supports the CDC/ACM driver out of the box. Windows, on the other + than requires that you first install a serial driver (a .inf file). There + are example .inf files for NuttX in the nuttx/configs/spark directories. + + 3. There is hand-shaking to pace incoming serial data. As a result, you may + experience data loss due to RX overrun errors. The overrun errors occur + when more data is received than can be buffered in memory on the target. + + At present, the only workaround is to increase the amount of buffering + in the target. That allow the target to accept short bursts of larger + volumes of data (but would still fail on sustained, high speed incoming + data. The following configuration options can be changed to increase + the buffering. + + 1. RX buffer size. All incoming data is buffered by the serial driver + until it can be read by the application. The default size of this + RX buffer is only 256 but can be increased as you see fit: + + CONFIG_CDCACM_RXBUFSIZE=256 : Default RX buffer size is only 256 bytes + + 2. Upstream from the RX buffers are USB read request buffers. Each + buffer is the maximum size of one USB packet (64 byte) and that cannot + really be changed. But if you want to increase this upstream buffering + capability, you can increase the number of available read requests. + The default is four, providing an additional buffering capability of + of 4*64=256 bytes. + + Each read request receives data from USB, copies the data into the + serial RX buffer, and then is available to receive more data. This + recycling of read requests stalls as soon as the serial RX buffer is + full. Data loss occurs when there are no available read requests to + accept the next packet from the host. So increasing the number of + read requests can also help to minimize RX overrun: + + CONFIG_CDCACM_NRDREQS=4 : Default is only 4 read requests + + STATUS: + + 2013-2-23: Checks out OK. See discussion of the usbnsh configuration + below. + + Debugging USB Device + -------------------- + + There is normal console debug output available that can be enabled with + CONFIG_DEBUG + CONFIG_DEBUG_USB. However, USB device operation is very + time critical and enabling this debug output WILL interfere with the + operation of the UDP. USB device tracing is a less invasive way to get + debug information: If tracing is enabled, the USB device will save + encoded trace output in in-memory buffer; if the USB monitor is also + enabled, that trace buffer will be periodically emptied and dumped to the + system logging device (the serial console in this configuration): + + Device Drivers -> "USB Device Driver Support: + CONFIG_USBDEV_TRACE=y : Enable USB trace feature + CONFIG_USBDEV_TRACE_NRECORDS=256 : Buffer 256 records in memory + CONFIG_USBDEV_TRACE_STRINGS=y : (optional) + + If you get data loss in the trace buffer, then you may want to increase the + CONFIG_USBDEV_TRACE_NRECORDS. I have used buffers up to 4096 records to + avoid data loss. + + Application Configuration -> NSH LIbrary: + CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH + CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor + + Application Configuration -> System NSH Add-Ons: + CONFIG_SYSTEM_USBMONITOR=y : Enable the USB monitor daemon + CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size + CONFIG_SYSTEM_USBMONITOR_PRIORITY=50 : USB monitor daemon priority + CONFIG_SYSTEM_USBMONITOR_INTERVAL=1 : Dump trace data every second + CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y : Enable TRACE output + CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y + CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y + CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y + CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y + + NOTE: If USB debug output is also enabled, both outputs will appear on the + serial console. However, the debug output will be asynchronous with the + trace output and, hence, difficult to interpret. + +HSMCI +===== + + Enabling HSMCI support. The SAM3U-KE provides a an SD memory card slot. + Support for the SD slot can be enabled with the following settings: + + System Type->ATSAM3/4 Peripheral Support + CONFIG_SAM34_HSMCI=y : Enable HSMCI support + CONFIG_SAM34_DMAC0=y : DMAC support is needed by HSMCI + + System Type + CONFIG_SAM34_GPIO_IRQ=y : PIO interrupts needed + CONFIG_SAM34_GPIOA_IRQ=y : Card detect pin is on PIOA + + Device Drivers -> MMC/SD Driver Support + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMCSD_NSLOTS=1 : One slot per driver instance + CONFIG_MMCSD_HAVECARDDETECT=y : Supports card-detect PIOs + CONFIG_MMCSD_SDIO=y : SDIO-based MMC/SD support + CONFIG_MMCSD_MULTIBLOCK_DISABLE=y : Probably works but is untested + + CONFIG_SDIO_DMA=y : Use SDIO DMA + CONFIG_SDIO_BLOCKSETUP=y : Needs to know block sizes + + Library Routines + CONFIG_SCHED_WORKQUEUE=y : Driver needs work queue support + : Defaults for other settings okay + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + CONFIG_NSH_MMCSDSLOTNO=0 : Only one slot, slot 0 + + After an SD card is successfully initialized, the block device /dev/mmcsd0 + will be available. To mount the SD card, use the following NSH command: + + nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard + + The SD card contents will then be available under /mnt/sdcard. + + NOTES: + + 1. DMA is not currently functional and without DMA, there may not be + reliable data transfers at high speeds due to data overrun problems. + The current HSMCI driver supports DMA via the DMAC. However, the data + sheet only discusses PDC-based HSMCI DMA (although there is a DMA + channel interface definition for HSMCI). + + Bottom line: Untested and probably not usable on the SAM4E-EK in its + current form. + +Touchscreen +=========== + + The NSH configuration can be used to verify the ADS7843E touchscreen on + the SAM4E-EK LCD. With these modifications, you can include the touchscreen + test program at apps/examples/touchscreen as an NSH built-in application. + You can enable the touchscreen and test by modifying the default + configuration in the following ways: + + Device Drivers + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + + CONFIG_INPUT=y : Enable support for input devices + CONFIG_INPUT_ADS7843E=y : Enable support for the ADS7843E + CONFIG_ADS7843E_SPIDEV=0 : Use SPI CS 0 for communication + CONFIG_ADS7843E_SPIMODE=0 : Use SPI mode 0 + CONFIG_ADS7843E_FREQUENCY=1000000 : SPI BAUD 1MHz + CONFIG_ADS7843E_SWAPXY=y : If landscape orientation + CONFIG_ADS7843E_THRESHX=51 : These will probably need to be tuned + CONFIG_ADS7843E_THRESHY=39 + + System Type -> Peripherals: + CONFIG_SAM34_SPI0=y : Enable support for SPI + + System Type: + CONFIG_SAM34_GPIO_IRQ=y : GPIO interrupt support + CONFIG_SAM34_GPIOA_IRQ=y : Enable GPIO interrupts from port A + + RTOS Features: + CONFIG_DISABLE_SIGNALS=n : Signals are required + + Library Support: + CONFIG_SCHED_WORKQUEUE=y : Work queue support required + + Application Configuration: + CONFIG_EXAMPLES_TOUCHSCREEN=y : Enable the touchscreen built-in test + + Defaults should be okay for related touchscreen settings. Touchscreen + debug output on UART0 can be enabled with: + + Build Setup: + CONFIG_DEBUG=y : Enable debug features + CONFIG_DEBUG_VERBOSE=y : Enable verbose debug output + CONFIG_DEBUG_INPUT=y : Enable debug output from input devices + + STATUS: Verified 2014-05-14 + +ILI9325/41-Based LCD +================= + + The SAM4E-EK carries a TFT transmissive LCD module with touch panel, + FTM280C34D. Its integrated driver IC is either a ILI9325 ILI9342 (the + original schematics said ILI9325, but I learned the hard way that I had + an ILI9341-based LCD). The LCD display area is 2.8 inches diagonally + measured, with a native resolution of 240 x 320 + dots. + + Connectivity + ------------ + + The SAM4E16 communicates with the LCD through PIOC where an 8-bit + parallel "8080-like" protocol data bus has to be implemented in + software. + + ---- ----- --------- -------------------------------- + PIN PIO SIGNAL NOTES + ---- ----- --------- -------------------------------- + 1 VDD + 2 PC7 DB17 + 3 PC6 DB16 + 4 PC5 DB15 + 5 PC4 DB14 + 6 PC3 DB13 + 7 PC2 DB12 + 8 PC1 DB11 + 9 PC0 DB10 + 10 DB9 Pulled low + 11 DB8 Pulled low + 12 DB7 Pulled low + 13 DB6 Pulled low + 14 DB5 Pulled low + 15 DB4 Pulled low + 16 DB3 Pulled low + 17 DB2 Pulled low + 18 DB1 Pulled low + 19 DB0 Pulled low + ---- ----- --------- -------------------------------- + 20 VDD + 21 PC11 RD + 22 PC8 WR + 23 PC19 RS + 24 PD18 CS Via J8, pulled high. + 25 RESET Connects to NSRST + 26 IM0 Pulled high + 27 IM1 Grounded + 28 GND + ---- ----- --------- -------------------------------- + 29 [PC13] LED-A Backlight controls: PC13 enables + 30 [PC13] LEDK1 AAT3155 charge pump that drives + 31 [PC13] LEDK2 the backlight LEDs + 32 [PC13] LEDK3 + 33 [PC13] LEDK4 + 34 [PC13] LEDK1 + ---- ----- --------- -------------------------------- + 35 Y+ These go to the ADS7843 + 36 Y- touchscreen controller. + 37 X+ + 38 X- + 39 NC + ---- ----- --------- -------------------------------- + + Jumpers + ------- + + Make sure the JP8 is closed. This connects PD18 as the LCD CS. + + Backlight + --------- + + LCD backlight is made of 4 white chip LEDs in parallel, driven by an + AAT3155 charge pump, MN4. The AAT3155 is controlled by the SAM3U4E + through a single line Simple Serial Control (S2Cwire) interface, which + permits to enable, disable, and set the LED drive current (LED + brightness control) from a 32-level logarithmic scale. Four resistors + R93/R94/R95/R96 are implemented for optional current limitation. + + Configuration + ------------- + + This is the basic configuration that enables the ILI9341-based LCD. + Of course additional settings would be necessary to enable the graphic + capabilities to do anything with the LCD. + + System Type -> AT91SAM3/4 Configuration Options + CONFIG_SAM34_SMC=y : SMC support + + Device Drivers -> LCD Driver Support + CONFIG_LCD=y : Enable LCD support + CONFIG_LCD_MAXCONTRAST=1 : Value should not matter + CONFIG_LCD_MAXPOWER=64 : Must be > 16 + CONFIG_LCD_LANDSCAPE=y : Landscape orientation + + Board Selection + CONFIG_SAM4EEK_LCD_ILI9341=y : For the ILI9341-based LCD + CONFIG_SAM4EEK_LCD_RGB565=y : Color resolution + CONFIG_SAM4EEK_LCD_BGCOLOR=0x00 : Initial background color + + STATUS: + + 2014-8-20: Updated. The ILI9341 LCD has some basic functionality. + Certainly it can transfer and display data fine. But there are some + issues with the geometry of data that appears on the LCD.. + + The LCD backlight is functional. + +SAM4E-EK-specific Configuration Options +======================================= + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="sam34" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_SAM34 + CONFIG_ARCH_CHIP_SAM3U + CONFIG_ARCH_CHIP_ATSAM3U4 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=sam4e-ek (for the SAM4E-EK development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SAM4EEK=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00020000 (128Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_SAM34_SPI0 - Serial Peripheral Interface 0 (SPI0) + CONFIG_SAM34_SPI1 - Serial Peripheral Interface 1 (SPI1) + CONFIG_SAM34_SSC - Synchronous Serial Controller (SSC) + CONFIG_SAM34_TC0 - Timer/Counter 0 (TC0) + CONFIG_SAM34_TC1 - Timer/Counter 1 (TC1) + CONFIG_SAM34_TC2 - Timer/Counter 2 (TC2) + CONFIG_SAM34_TC3 - Timer/Counter 3 (TC3) + CONFIG_SAM34_TC4 - Timer/Counter 4 (TC4) + CONFIG_SAM34_TC5 - Timer/Counter 5 (TC5) + CONFIG_SAM34_TC6 - Timer/Counter 6 (TC6) + CONFIG_SAM34_TC7 - Timer/Counter 7 (TC6) + CONFIG_SAM34_TC8 - Timer/Counter 6 (TC8) + CONFIG_SAM34_PWM - Pulse Width Modulation (PWM) Controller + CONFIG_SAM34_TWIM0 - Two-wire Master Interface 0 (TWIM0) + CONFIG_SAM34_TWIS0 - Two-wire Slave Interface 0 (TWIS0) + CONFIG_SAM34_TWIM1B - Two-wire Master Interface 1 (TWIM1) + CONFIG_SAM34_TWIS1 - Two-wire Slave Interface 1 (TWIS1) + CONFIG_SAM34_UART0 - UART 0 + CONFIG_SAM34_UART1 - UART 1 + CONFIG_SAM34_USART0 - USART 0 + CONFIG_SAM34_USART1 - USART 1 + CONFIG_SAM34_USART2 - USART 2 + CONFIG_SAM34_USART3 - USART 3 + CONFIG_SAM34_AFEC0 - Analog Front End 0 + CONFIG_SAM34_AFEC1 - Analog Front End 1 + CONFIG_SAM34_DACC - Digital-to-Analog Converter + CONFIG_SAM34_ACC - Analog Comparator + CONFIG_SAM34_EMAC - Ethernet MAC + CONFIG_SAM34_CAN0 - CAN 0 + CONFIG_SAM34_CAN1 - CAN 1 + CONFIG_SAM34_SMC - Static Memory Controller + CONFIG_SAM34_NAND - NAND support + CONFIG_SAM34_PDCA - Peripheral DMA controller + CONFIG_SAM34_DMAC0 - DMA controller + CONFIG_SAM34_UDP - USB 2.0 Full-Speed device + CONFIG_SAM34_CHIPID - Chip ID + CONFIG_SAM34_RTC - Real Time Clock + CONFIG_SAM34_RTT - Real Time Timer + CONFIG_SAM34_WDT - Watchdog Timer + CONFIG_SAM34_EIC - Interrupt controller + CONFIG_SAM34_HSMCI - High Speed Multimedia Card Interface + + Some subsystems can be configured to operate in different ways. The drivers + need to know how to configure the subsystem. + + CONFIG_SAM34_GPIOA_IRQ + CONFIG_SAM34_GPIOB_IRQ + CONFIG_SAM34_GPIOC_IRQ + CONFIG_SAM34_GPIOD_IRQ + CONFIG_SAM34_GPIOE_IRQ + CONFIG_SAM34_GPIOF_IRQ + CONFIG_SAM34_GPIOG_IRQ + CONFIG_SAM34_GPIOH_IRQ + CONFIG_SAM34_GPIOJ_IRQ + CONFIG_SAM34_GPIOK_IRQ + CONFIG_SAM34_GPIOL_IRQ + CONFIG_SAM34_GPIOM_IRQ + CONFIG_SAM34_GPION_IRQ + CONFIG_SAM34_GPIOP_IRQ + CONFIG_SAM34_GPIOQ_IRQ + + CONFIG_USART0_ISUART + CONFIG_USART1_ISUART + CONFIG_USART2_ISUART + CONFIG_USART3_ISUART + + SAM3U specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + LCD Options. Other than the standard LCD configuration options + (see configs/README.txt), the SAM4E-EK driver also supports: + + CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape" + support. Default is this 320x240 "landscape" orientation + CONFIG_LCD_RLANDSCAPE - Define for 320x240 display "reverse + landscape" support. + CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait" + orientation support. + CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse + portrait" orientation support. + +Configurations +============== + + Information Common to All Configurations + ---------------------------------------- + Each SAM4E-EK configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh sam4e-ek/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on UART0 (J3). + + 3. All of these configurations are set up to build under Linux using the + EABI buildroot toolchain (unless stated otherwise in the description of + the configuration). That build selection can easily be reconfigured + using 'make menuconfig'. Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_LINUX=y : Linux or other pure POSIX invironment + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot toolchain + CONFIG_ARMV7M_OABI_TOOLCHAIN=n : EABI (Not OABI + + If you want to use the Atmel GCC toolchain, for example, here are the + steps to do so: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_HOST_CYGWIN=y : Using Cygwin or other POSIX environment + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : General GCC EABI toolchain under windows + + Library Routines -> + CONFIG_CXX_NEWLONG=n : size_t is an unsigned int, not long + + This re-configuration should be done before making NuttX or else the + subsequent 'make' will fail. If you have already attempted building + NuttX then you will have to 1) 'make distclean' to remove the old + configuration, 2) 'cd tools; ./configure.sh sam4e-ek/ksnh' to start + with a fresh configuration, and 3) perform the configuration changes + above. + + Also, make sure that your PATH variable has the new path to your + Atmel tools. Try 'which arm-none-eabi-gcc' to make sure that you + are selecting the right tool. setenv.sh is available for you to + use to set or PATH variable. The path in the that file may not, + however, be correct for your installation. + + See also the "NOTE about Windows native toolchains" in the section call + "GNU Toolchain Options" above. + + Configuration sub-directories + ----------------------------- + + nsh: + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables both the serial and telnetd NSH interfaces. + + NOTES: + + 1. This configuration runs with a CPU clock of 120MHz and with the + the CMCC enabled. If you disable these, then you must also + re-calibrate the delay loop. + + 2. Default stack sizes are large and should really be tuned to reduce + the RAM footprint: + + CONFIG_ARCH_INTERRUPTSTACK=2048 + CONFIG_IDLETHREAD_STACKSIZE=1024 + CONFIG_USERMAIN_STACKSIZE=2048 + CONFIG_PTHREAD_STACK_DEFAULT=2048 + ... and others ... + + 3. NSH built-in applications are supported. + + Binary Formats: + CONFIG_BUILTIN=y : Enable support for built-in programs + + Applicaton Configuration: + CONFIG_NSH_BUILTIN_APPS=y : Enable starting apps from NSH command line + + 4. This configuration has the network enabled by default. This can be + easily disabled or reconfigured (See see the network related + configuration settings above in the section entitled "Networking"). + + NOTE: In boot-up sequence is very simple in this example; all + initialization is done sequentially (vs. in parallel) and so you will + not see the NSH prompt until all initialization is complete. The + network bring-up in particular will add some delay before the NSH + prompt appears. In a real application, you would probably want to + do the network bringup on a separate thread so that access to the + NSH prompt is not delayed. + + This delay will be especially long if the board is not connected to + a network because additional time will be required to fail with + timeout errors. This delay can be eliminated, however, if you enable + an NSH initialization option as described above in a paragraph + entitled, "Network Initialization Thread." + + STATUS: + 2014-3-13: The basic NSH serial console is working. Network support + has been verified. + + 5. This configuration supports a network with fixed IP address. You + may have to change these settings for your network: + + CONFIG_NSH_IPADDR=0x0a000002 : IP address: 10.0.0.2 + CONFIG_NSH_DRIPADDR=0x0a000001 : Gateway: 10.0.0.1 + CONFIG_NSH_NETMASK=0xffffff00 : Netmask: 255.255.255.0 + + You can also enable enable the DHCPC client for networks that use + dynamically assigned address: + + CONFIG_NETUTILS_DHCPC=y : Enables the DHCP client + CONFIG_NET_UDP=y : Depends on broadcast UDP + CONFIG_NET_BROADCAST=y + CONFIG_NSH_DHCPC=y : Tells NSH to use DHCPC, not + : the fixed addresses + + 6. This configuration has the DMA-based SPI0 and AT25 Serial FLASH + support enabled by default. This can be easily disabled or + reconfigured (See see the configuration settings and usage notes + above in the section entitled "AT25 Serial FLASH"). + + To mount the AT25 Serial FLASH as a FAT file system: + + nsh>mount -t vfat /dev/mtdblock0 /mnt/at25 + + STATUS: + 2014-3-14: The DMA-based SPI appears to be functional and can be used + to support a FAT file system on the AT25 Serial FLASH. + + 7. USB device support is not enabled in this configuration by default. + To add USB device support to this configuration, see the instructions + above under "USB Full-Speed Device." + + STATUS: + 2014-3-21: USB support is partially functional. Additional test and + integration is required. See STATUS in the "USB Full-Speed + Device" for further information + 2014-3-22: USB seems to work properly (there are not obvious errors + in a USB bus capture. However, as of this data the AT25 + does not mount on either the Linux or Windows host. This + needs to be retested. + + 8. Enabling HSMCI support. The SAM3U-KE provides a an SD memory card + slot. Support for the SD slot can be enabled following the + instructions provided above in the paragraph entitled "HSMCI." + + 9. This configuration has been used for verifying the touchscreen on + on the SAM4E-EK LCD module. + + The NSH configuration can be used to verify the ADS7843E touchscreen on + the SAM4E-EK LCD. With these modifications, you can include the touchscreen + test program at apps/examples/touchscreen as an NSH built-in application. + You can enable the touchscreen and test by modifying the default + configuration in the following ways: + + Device Drivers + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + + CONFIG_INPUT=y : Enable support for input devices + CONFIG_INPUT_ADS7843E=y : Enable support for the ADS7843E + CONFIG_ADS7843E_SPIDEV=0 : Use SPI CS 0 for communication + CONFIG_ADS7843E_SPIMODE=0 : Use SPI mode 0 + CONFIG_ADS7843E_FREQUENCY=1000000 : SPI BAUD 1MHz + CONFIG_ADS7843E_SWAPXY=y : If landscape orientation + CONFIG_ADS7843E_THRESHX=51 : These will probably need to be tuned + CONFIG_ADS7843E_THRESHY=39 + + System Type -> Peripherals: + CONFIG_SAM34_SPI0=y : Enable support for SPI + + System Type: + CONFIG_SAM34_GPIO_IRQ=y : GPIO interrupt support + CONFIG_SAM34_GPIOA_IRQ=y : Enable GPIO interrupts from port A + + RTOS Features: + CONFIG_DISABLE_SIGNALS=n : Signals are required + + Library Support: + CONFIG_SCHED_WORKQUEUE=y : Work queue support required + + Application Configuration: + CONFIG_EXAMPLES_TOUCHSCREEN=y : Enable the touchscreen built-in test + + Defaults should be okay for related touchscreen settings. Touchscreen + debug output on UART0 can be enabled with: + + Build Setup: + CONFIG_DEBUG=y : Enable debug features + CONFIG_DEBUG_VERBOSE=y : Enable verbose debug output + CONFIG_DEBUG_INPUT=y : Enable debug output from input devices + + 10. This configuration can be re-configured to test the on-board LCD + module. + + System Type -> AT91SAM3/4 Configuration Options + CONFIG_SAM34_SMC=y : SMC support + + Device Drivers -> LCD Driver Support + CONFIG_LCD=y : Enable LCD support + CONFIG_LCD_MAXCONTRAST=1 : Value should not matter + CONFIG_LCD_MAXPOWER=64 : Must be > 16 + CONFIG_LCD_LANDSCAPE=y : Landscape orientation + + Board Selection + CONFIG_SAM4EEK_LCD_ILI9341=y : For the ILI9341-based LCD + CONFIG_SAM4EEK_LCD_RGB565=y : Color resolution + CONFIG_SAM4EEK_LCD_BGCOLOR=0x00 : Initial background color + + Graphics Support + CONFIG_NX=y : Enable Graphics support + CONFIG_NX_LCDDRIVER=y : LCD graphics device + + Graphics Support -> Supported Pixel Depths + CONFIG_NX_DISABLE_1BPP=y : Only 16BPP supported + CONFIG_NX_DISABLE_2BPP=y + CONFIG_NX_DISABLE_4BPP=y + CONFIG_NX_DISABLE_8BPP=y + CONFIG_NX_DISABLE_24BPP=y + CONFIG_NX_DISABLE_32BPP=y + + Graphics Support -> Font Selections + CONFIG_NXFONTS_CHARBITS=7 + CONFIG_NXFONT_SANS23X27=y + CONFIG_NXFONT_SANS22X29B=y + + Application Configuration -> Examples + CONFIG_EXAMPLES_NXLINES=y + CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x0320 + CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16 + CONFIG_EXAMPLES_NXLINES_LINECOLOR=0xffe0 + CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4 + CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xffe0 + CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0xf7bb + CONFIG_EXAMPLES_NXLINES_BPP=16 + + STATUS: + 2014-30-24: DMA is not currently functional and without DMA, there + may not be reliable data transfers at high speeds due + to data overrun problems. The current HSMCI driver + supports DMA via the DMAC. However, the data sheet + only discusses PDC-based HSMCI DMA (although there is + a DMA channel interface definition for HSMCI). So + this is effort is dead-in-the-water for now. + 2014-05-15: The HSCMCI driver has been recently updated to support + PCD DMA. That modified driver, however, has not yet + been tested with the SAM4E-EK + + 2014-05-14: The touchscreen interface was successfully verified. + + 2014-08-20: The LCD interface is fully implemented and data appears + to be transferred okay. However, there are errors in + geometry that leave the LCD unusable still. + + The LCD backlight appears to be functional. + + usbnsh: + + This is another NSH example. If differs from the 'nsh' configuration + in that this configurations uses a USB serial device for console I/O. + + STATUS: + 2014-3-23: This configuration appears to be fully functional. + + NOTES: + + 1. See the NOTES in the description of the nsh configuration. Those + notes all apply here as well. Some additional notes unique to + the USB console version follow: + + 2. The configuration differences between this configuration and the + nsh configuration is: + + a. USB device support is enabled as described in the paragraph + entitled "USB Full-Speed Device", + + b. The CDC/ACM serial class is enabled as described in the paragraph + "CDC/ACM Serial Device Class". + + c. The serial console is disabled: + + RTOS Features: + CONFIG_DEV_CONSOLE=n : No console at boot time + + Driver Support -> USB Device Driver Support + CONFIG_UART0_SERIAL_CONSOLE=n : UART0 is not the console + CONFIG_NO_SERIAL_CONSOLE=y : There is no serial console + + Driver Support -> USB Device Driver Support + CONFIG_CDCACM_CONSOLE=y : USB CDC/ACM console + + d. Support for debug output on UART0 is provided as described in the + next note. + + 3. If you send large amounts of data to the target, you may see data + loss due to RX overrun errors. See the NOTES in the section entitled + "CDC/ACM Serial Device Class" for an explanation and some possible + work-arounds. + + 3. This configuration does have UART0 output enabled and set up as + the system logging device: + + File Systems -> Advanced SYSLOG Features + CONFIG_SYSLOG=y : Enable output to syslog, not console + CONFIG_SYSLOG_CHAR=y : Use a character device for system logging + CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART0 will be /dev/ttyS0 + + However, there is nothing to generate SYLOG output in the default + configuration so nothing should appear on UART0 unless you enable + some debug output or enable the USB monitor. + + NOTE: Using the SYSLOG to get debug output has limitations. Among + those are that you cannot get debug output from interrupt handlers. + So, in particularly, debug output is not a useful way to debug the + USB device controller driver. Instead, use the USB monitor with + USB debug off and USB trace on (see below). + + 4. Enabling USB monitor SYSLOG output. See the paragraph entitle + "Debugging USB Device" for a summary of the configuration settings + needed to enable the USB monitor and get USB debug data out UART0. + + 5. By default, this configuration uses the CDC/ACM serial device to + provide the USB console. This works out-of-the-box for Linux. + Windows, on the other hand, will require a CDC/ACM device driver + (.inf file). There is a sample .inf file in the nuttx/configs/spark + directories. + + 5. Using the Prolifics PL2303 Emulation + + You could also use the non-standard PL2303 serial device instead of + the standard CDC/ACM serial device by changing: + + CONFIG_CDCACM=n : Disable the CDC/ACM serial device class + CONFIG_CDCACM_CONSOLE=n : The CDC/ACM serial device is NOT the console + CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled + CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console + + nxwm: + + This is a special configuration setup for the NxWM window manager + UnitTest. It integrates support for both the SAM4E-EK ILI9341 LCDC and + the SAM4E-EK ADS7843E touchscreen controller and provides a more + advanced graphics demo. It provides an interactive windowing experience. + + The NxWM window manager is a tiny window manager tailored for use + with smaller LCDs. It supports a task, a start window, and + multiple application windows with toolbars. However, to make the best + use of the visible LCD space, only one application window is visible at + at time. + + The NxWM window manager can be found here: + + nuttx-git/NxWidgets/nxwm + + The NxWM unit test can be found at: + + nuttx-git/NxWidgets/UnitTests/nxwm + + Documentation for installing the NxWM unit test can be found here: + + nuttx-git/NxWidgets/UnitTests/README.txt + + Here is the quick summary of the build steps. These steps assume that + you have the entire NuttX GIT in some directory ~/nuttx-git. You may + have these components installed elsewhere. In that case, you will need + to adjust all of the paths in the following accordingly: + + 1. Install the nxwm configuration + + $ cd ~/nuttx-git/nuttx/tools + $ ./configure.sh sam4e-ek/nxwm + + 2. Make the build context (only) + + $ cd .. + $ . ./setenv.sh + $ make context + ... + + NOTE: the use of the setenv.sh file is optional. All that it will + do is to adjust your PATH variable so that the build system can find + your tools. If you use it, you will most likely need to modify the + script so that it has the correct path to your tool binaries + directory. + + 3. Install the nxwm unit test + + $ cd ~/nuttx-git/NxWidgets + $ tools/install.sh ~/nuttx-git/apps nxwm + Creating symbolic link + - To ~/nuttx-git/NxWidgets/UnitTests/nxwm + - At ~/nuttx-git/apps/external + + 4. Build the NxWidgets library + + $ cd ~/nuttx-git/NxWidgets/libnxwidgets + $ make TOPDIR=~/nuttx-git/nuttx + ... + + 5. Build the NxWM library + + $ cd ~/nuttx-git/NxWidgets/nxwm + $ make TOPDIR=~/nuttx-git/nuttx + ... + + 6. Built NuttX with the installed unit test as the application + + $ cd ~/nuttx-git/nuttx + $ make + + STATUS: + 2014-08-20. I have seen the demo work well but it is not thoroughly + exercised. I suspect some touchscreen issues. + 2014-10-11. Today's build crashes in nxwm_main on startup. diff --git a/configs/sam4e-ek/include/board.h b/configs/sam4e-ek/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..8a9c965ac1dae30bbc2fdb86e93be4109124c886 --- /dev/null +++ b/configs/sam4e-ek/include/board.h @@ -0,0 +1,321 @@ +/************************************************************************************ + * configs/sam4e-ek/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_SAM4E_EK_INCLUDE_BOARD_H +#define __ARCH_SAM4E_EK_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# include +# ifdef CONFIG_SAM34_GPIO_IRQ +# include +# endif +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAM4E16 device is running out of the Master Clock using + * the Fast RC Oscillator running at 4 MHz. + * + * MAINOSC: Frequency = 12MHz (crystal) + * + * CONFIG_SAM4EEK_120MHZ + * PLLA: PLL Divider = 1, Multiplier = 20 to generate PLLACK = 240MHz + * Master Clock (MCK): Source = PLLACK, Prescalar = 1 to generate MCK = 120MHz + * CPU clock: 120MHz + * + * CONFIG_SAM4EEK_96MHZ + * PLLA: PLL Divider = 1, Multiplier = 16 to generate PLLACK = 192MHz + * Master Clock (MCK): Source = PLLACK, Prescalar = 1 to generate MCK = 96MHz + * CPU clock: 96MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Divider = 1 + * Multiplier = 16 or 20 + */ + +#ifdef CONFIG_SAM4EEK_120MHZ +# define BOARD_CKGR_PLLAR_MUL (19 << PMC_CKGR_PLLAR_MUL_SHIFT) +#else +# define BOARD_CKGR_PLLAR_MUL (15 << PMC_CKGR_PLLAR_MUL_SHIFT) +#endif + +#define BOARD_CKGR_PLLAR_STMODE PMC_CKGR_PLLAR_STMODE_FAST +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS + +/* PMC master clock register settings. + * + * Source = PLLA + * Divider = 2 + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV2 + +/* The PLL clock (USB_48M or UDPCK) is driven from the output of the PLL, + * PLLACK. The PLL clock must be 48MHz. PLLACK can be divided down via the + * PMC USB register to provide the PLL clock. So in order to use the USB + * feature, the PLL output must be a multiple of 48MHz. + * + * PLLACK = 240MHz, USBDIV=4, USB_48M = 240 MHz / (4 + 1) = 48MHz + * PLLACK = 192MHz, USBDIV=5, USB_48M = 192 MHz / (3 + 1) = 48MHz + */ + +#define BOARD_PMC_USBS (0) + +#ifdef CONFIG_SAM4EEK_120MHZ +# define BOARD_PMC_USBDIV (4 << PMC_USB_USBDIV_SHIFT) +#else +# define BOARD_PMC_USBDIV (3 << PMC_USB_USBDIV_SHIFT) +#endif + +/* Resulting frequencies */ + +#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */ + +#ifdef CONFIG_SAM4EEK_120MHZ +# define BOARD_PLLA_FREQUENCY (240000000) /* PLLACK: 20 * 12Mhz / 1 */ +# define BOARD_MCK_FREQUENCY (120000000) /* MCK: PLLACK / 2 */ +# define BOARD_CPU_FREQUENCY (120000000) /* CPU: MCK */ +#else +# define BOARD_PLLA_FREQUENCY (192000000) /* PLLACK: 16 * 12Mhz / 1 */ +# define BOARD_MCK_FREQUENCY (96000000) /* MCK: PLLACK / 2 */ +# define BOARD_CPU_FREQUENCY (96000000) /* CPU: MCK */ +#endif + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV+1)). + * + * MCI_SPEED = MCK / (2*(CLKDIV+1)) + * CLKDIV = MCK / MCI_SPEED / 2 - 1 + * + * Where CLKDIV has a range of 0-255. + */ + +#ifdef CONFIG_SAM4EEK_120MHZ + /* MCK = 120MHz, CLKDIV = 149 w/o CLKODD, MCI_SPEED = 120MHz / (2*149 + 0 + 2) = 400 KHz */ + +# define HSMCI_INIT_CLKDIV (149 << HSMCI_MR_CLKDIV_SHIFT) + + /* MCK = 120MHz, CLKDIV = 2 w/o CLKODD, MCI_SPEED = 120MHz / (2*2 + 0 + 2) = 20 MHz */ + +# define HSMCI_MMCXFR_CLKDIV (3 << HSMCI_MR_CLKDIV_SHIFT) + + /* MCK = 120MHz, CLKDIV = 1 w/ CLKODD, MCI_SPEED = 120MHz / (2*1 + 1 + 2) = 24 MHz */ + +# define HSMCI_SDXFR_CLKDIV ((1 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +#else +/* MCK = 96MHz, CLKDIV = 119, w/o CLKODD, MCI_SPEED = 96MHz / (2 * 119 + 0 + 2) = 400 KHz */ + +# define HSMCI_INIT_CLKDIV (119 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 96MHz, CLKDIV = 1 w/ CLKODD, MCI_SPEED = 96MHz / (2*1 + 1 + 2) = 19.2 MHz */ + +# define HSMCI_MMCXFR_CLKDIV ((3 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 96MHz, CLKDIV = 1 w/o CLKODD, MCI_SPEED = 96MHz / (2*1 + 0 + 2) = 24 MHz */ + +# define HSMCI_SDXFR_CLKDIV (1 << HSMCI_MR_CLKDIV_SHIFT) +#endif + +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/* FLASH wait states. + * + * SAM4E-EK documentation says: + * VDDCORE: "The voltage ranges from 1.08V to 1.32V." + * VDDIO: Looks like it is at 3.3V + * + * FWS Max frequency + * (1) (2) (3) (4) + * --- ------- ------- ------- ------- + * 0 17 MHz 20 MHz 17 MHz 21 MHz + * 1 34 MHz 41 MHz 35 MHz 43 MHz + * 2 51 MHz 62 MHz 53 MHz 64 MHz + * 3 69 MHz 83 MHz 71 MHz 86 MHz + * 4 86 MHz 96 MHz 88 MHz 107 MHz + * 5 100 MHz 104 MHz 106 MHz 129 MHz + * 6 124 MHz + + * (1) VDDCORE set at 1.08V and VDDIO 1.62V to 3.6V @105C + * (2) VDDCORE set at 1.08V and VDDIO 2.7V to 3.6V @105C + * (3) VDDCORE set at 1.20V and VDDIO 1.62V to 3.6V @ 105C + * (4) VDDCORE set at 1.20V and VDDIO 2.7V to 3.6V @ 105C + */ + +#ifdef CONFIG_SAM4EEK_120MHZ +# define BOARD_FWS 5 +#else +# define BOARD_FWS 4 +#endif + +/* LED definitions ******************************************************************/ +/* The SAM4E-EK board has three, user-controllable LEDs labelled D2 (blue), + * D3 (amber), and D4 (green) on the board. Usage of these LEDs is defined + * in include/board.h and src/up_leds.c. They are encoded as follows: + * + * SYMBOL Meaning D3* D2 D4 + * ------------------- ----------------------- ------- ------- ------- + * LED_STARTED NuttX has been started OFF OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + * LED_IRQSENABLED Interrupts enabled OFF ON OFF + * LED_STACKCREATED Idle stack created OFF ON ON + * LED_INIRQ In an interrupt** N/C FLASH N/C + * LED_SIGNAL In a signal handler*** N/C N/C FLASH + * LED_ASSERTION An assertion failed FLASH N/C N/C + * LED_PANIC The system has crashed FLASH N/C N/C + * + * * If D2 and D4 are statically on, then NuttX probably failed to boot + * and these LEDs will give you some indication of where the failure was + * ** The normal state is D3=OFF, D4=ON and D2 faintly glowing. This faint + * glow is because of timer interrupts that result in the LED being + * illuminated on a small proportion of the time. + * *** D4 may also flicker normally if signals are processed. + */ + +#define LED_STARTED 0 /* LED0=OFF LED1=OFF LED2=OFF */ +#define LED_HEAPALLOCATE 1 /* LED0=OFF LED1=OFF LED2=ON */ +#define LED_IRQSENABLED 2 /* LED0=OFF LED1=ON LED2=OFF */ +#define LED_STACKCREATED 3 /* LED0=OFF LED1=ON LED2=ON */ + +#define LED_INIRQ 4 /* LED0=XXX LED1=TOG LED2=XXX */ +#define LED_SIGNAL 5 /* LED0=XXX LED1=XXX LED2=TOG */ +#define LED_ASSERTION 6 /* LED0=TOG LED1=XXX LED2=XXX */ +#define LED_PANIC 7 /* LED0=TOG LED1=XXX LED2=XXX */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED_D3 0 +#define BOARD_LED_D2 1 +#define BOARD_LED_D4 2 +#define BOARD_NLEDS 3 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_D3_BIT (1 << BOARD_LED_D3) +#define BOARD_LED_D2_BIT (1 << BOARD_LED_D2) +#define BOARD_LED_D4_BIT (1 << BOARD_LED_D4) + +/* Button definitions ***************************************************************/ +/* Four buttons for software inputs: + * + * PA1 BUTTON_SCROLL-UP Grounded + * PA2 BUTTON_SCROLL-DOWN Grounded + * PA19 BUTTON_WAKU Grounded + * PA20 BUTTON_TAMP Grounded + */ + +#define BUTTON_SCROLLUP 1 /* Bit 0: Scroll-up button */ +#define BUTTON_SCROLLDOWN 2 /* Bit 1: Scroll-down button */ +#define BUTTON_WAKU 4 /* Bit 2: Waku button */ +#define BUTTON_TAMP 8 /* Bit 3: Tamp button */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM4E architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void); + +/************************************************************************************ + * Name: sam_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the SAM4e-EK board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * display is cleared by simply setting all GRAM memory to the specified color. + * + ************************************************************************************/ + +#if defined(CONFIG_SAM4EEK_LCD_RGB565) +void sam_lcdclear(uint16_t color); +#else /* CONFIG_SAM4EEK_LCD_RGB24 || CONFIG_SAM4EEK_LCD_RGB32 */ +void sam_lcdclear(uint32_t color); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_SAM4E_EK_INCLUDE_BOARD_H */ diff --git a/configs/sam4e-ek/nsh/Make.defs b/configs/sam4e-ek/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..7efd66cf1d8e1fc4a0c088738e0d5c54bf740044 --- /dev/null +++ b/configs/sam4e-ek/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/sam4e-ek/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/sam4e-ek/nsh/defconfig b/configs/sam4e-ek/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..1a2c5869105f031c67e8e63aa67032349a094f56 --- /dev/null +++ b/configs/sam4e-ek/nsh/defconfig @@ -0,0 +1,1233 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +CONFIG_ARCH_CHIP_SAM34=y +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="sam34" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTNOR=y +CONFIG_ARCH_HAVE_EXTSRAM0=y +CONFIG_ARCH_HAVE_EXTSRAM1=y + +# +# AT91SAM3/4 Configuration Options +# +# CONFIG_ARCH_CHIP_ATSAM3U4E is not set +# CONFIG_ARCH_CHIP_ATSAM3U4C is not set +# CONFIG_ARCH_CHIP_ATSAM3U2E is not set +# CONFIG_ARCH_CHIP_ATSAM3U2C is not set +# CONFIG_ARCH_CHIP_ATSAM3U1E is not set +# CONFIG_ARCH_CHIP_ATSAM3U1C is not set +# CONFIG_ARCH_CHIP_ATSAM3X8E is not set +# CONFIG_ARCH_CHIP_ATSAM3X8C is not set +# CONFIG_ARCH_CHIP_ATSAM3X4E is not set +# CONFIG_ARCH_CHIP_ATSAM3X4C is not set +# CONFIG_ARCH_CHIP_ATSAM3A8C is not set +# CONFIG_ARCH_CHIP_ATSAM3A4C is not set +# CONFIG_ARCH_CHIP_ATSAM4CMP16B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4A is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32B is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16B is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S16C is not set +# CONFIG_ARCH_CHIP_ATSAM4S16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S8C is not set +# CONFIG_ARCH_CHIP_ATSAM4S8B is not set +CONFIG_ARCH_CHIP_ATSAM4E16E=y +# CONFIG_ARCH_CHIP_ATSAM4E16C is not set +# CONFIG_ARCH_CHIP_ATSAM4E8E is not set +# CONFIG_ARCH_CHIP_ATSAM4E8C is not set +# CONFIG_ARCH_CHIP_SAM3U is not set +# CONFIG_ARCH_CHIP_SAM3X is not set +# CONFIG_ARCH_CHIP_SAM3A is not set +# CONFIG_ARCH_CHIP_SAM4CM is not set +# CONFIG_ARCH_CHIP_SAM4L is not set +CONFIG_ARCH_CHIP_SAM4E=y +# CONFIG_ARCH_CHIP_SAM4S is not set + +# +# AT91SAM3/4 Peripheral Support +# +# CONFIG_SAM34_ACC is not set +# CONFIG_SAM34_AES is not set +# CONFIG_SAM34_AFEC0 is not set +# CONFIG_SAM34_AFEC1 is not set +# CONFIG_SAM34_CAN0 is not set +# CONFIG_SAM34_CAN1 is not set +# CONFIG_SAM34_CHIPID is not set +CONFIG_SAM34_CMCC=y +# CONFIG_SAM34_DACC is not set +# CONFIG_SAM34_EIC is not set +CONFIG_SAM34_DMAC0=y +# CONFIG_SAM34_DMAC1 is not set +CONFIG_SAM34_EMAC=y +# CONFIG_SAM34_HSMCI is not set +# CONFIG_SAM34_NAND is not set +# CONFIG_SAM34_PDCA is not set +# CONFIG_SAM34_PWM is not set +# CONFIG_SAM34_RTC is not set +# CONFIG_SAM34_RTT is not set +# CONFIG_SAM34_SMC is not set +CONFIG_SAM34_SPI0=y +# CONFIG_SAM34_TC0 is not set +# CONFIG_SAM34_TC1 is not set +# CONFIG_SAM34_TC2 is not set +# CONFIG_SAM34_TC3 is not set +# CONFIG_SAM34_TC4 is not set +# CONFIG_SAM34_TC5 is not set +# CONFIG_SAM34_TC6 is not set +# CONFIG_SAM34_TC7 is not set +# CONFIG_SAM34_TC8 is not set +# CONFIG_SAM34_TWI is not set +# CONFIG_SAM34_TWIM is not set +# CONFIG_SAM34_TWIS is not set +# CONFIG_SAM34_TWIM0 is not set +# CONFIG_SAM34_TWIS0 is not set +# CONFIG_SAM34_TWIM1 is not set +# CONFIG_SAM34_TWIS1 is not set +CONFIG_SAM34_UART0=y +# CONFIG_SAM34_UART1 is not set +# CONFIG_SAM34_UDP is not set +# CONFIG_SAM34_USART0 is not set +CONFIG_SAM34_USART1=y +# CONFIG_SAM34_WDT is not set + +# +# AT91SAM3/4 External Memory Configuration +# +# CONFIG_SAM34_EXTNAND is not set +# CONFIG_SAM34_EXTNOR is not set +# CONFIG_SAM34_EXTSRAM0 is not set +# CONFIG_SAM34_EXTSRAM1 is not set + +# +# AT91SAM3/4 GPIO Interrupt Configuration +# +CONFIG_SAM34_HAVE_GPIOD_IRQ=y +CONFIG_SAM34_HAVE_GPIOE_IRQ=y +CONFIG_SAM34_HAVE_GPIOF_IRQ=y +# CONFIG_SAM34_GPIO_IRQ is not set + +# +# AT91SAM3/4 SPI device driver options +# +CONFIG_SAM34_SPI_DMA=y +CONFIG_SAM34_SPI_DMATHRESHOLD=4 + +# +# AT91SAM3/4 EMAC device driver options +# +CONFIG_SAM34_EMAC_NRXBUFFERS=16 +CONFIG_SAM34_EMAC_NTXBUFFERS=8 +# CONFIG_SAM34_EMAC_PREALLOCATE is not set +# CONFIG_SAM34_EMAC_NBC is not set +CONFIG_SAM34_EMAC_PHYADDR=1 +# CONFIG_SAM34_EMAC_PHYINIT is not set +CONFIG_SAM34_EMAC_MII=y +# CONFIG_SAM34_EMAC_CLAUSE45 is not set +CONFIG_SAM34_EMAC_AUTONEG=y +CONFIG_SAM34_EMAC_PHYSR=30 +CONFIG_SAM34_EMAC_PHYSR_ALTCONFIG=y +CONFIG_SAM34_EMAC_PHYSR_ALTMODE=0x7 +CONFIG_SAM34_EMAC_PHYSR_10HD=0x1 +CONFIG_SAM34_EMAC_PHYSR_100HD=0x2 +CONFIG_SAM34_EMAC_PHYSR_10FD=0x5 +CONFIG_SAM34_EMAC_PHYSR_100FD=0x6 +CONFIG_SAM34_EMAC_ISETH0=y +# CONFIG_SAM34_TC is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=11990 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=131072 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAM4EEK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sam4e-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_SAM4EEK_96MHZ is not set +CONFIG_SAM4EEK_120MHZ=y +CONFIG_SAM4EEK_AT25_BLOCKMOUNT=y +CONFIG_SAM4EEK_AT25_FTL=y +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +CONFIG_MTD_AT25=y +CONFIG_AT25_SPIMODE=0 +CONFIG_AT25_SPIFREQUENCY=20000000 +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +CONFIG_ARCH_PHY_INTERRUPT=y +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +CONFIG_ETH0_PHY_KSZ8051=y +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_USART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=16 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sam4e-ek/nsh/setenv.sh b/configs/sam4e-ek/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..eb0b7a2e66e5445b458c142f200b90b95806989e --- /dev/null +++ b/configs/sam4e-ek/nsh/setenv.sh @@ -0,0 +1,69 @@ +#!/bin/bash +# configs/sam4e-ek/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sam4e-ek/nxwm/Make.defs b/configs/sam4e-ek/nxwm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..b267c099165453e0fef2d7c6aee6d59ec435bcd7 --- /dev/null +++ b/configs/sam4e-ek/nxwm/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/sam4e-ek/nxwm/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/sam4e-ek/nxwm/defconfig b/configs/sam4e-ek/nxwm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..67b3f0cdc11711842aa1cf2a56ed240ae5beaff6 --- /dev/null +++ b/configs/sam4e-ek/nxwm/defconfig @@ -0,0 +1,1589 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +CONFIG_ARCH_CHIP_SAM34=y +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="sam34" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTNOR=y +CONFIG_ARCH_HAVE_EXTSRAM0=y +CONFIG_ARCH_HAVE_EXTSRAM1=y + +# +# AT91SAM3/4 Configuration Options +# +# CONFIG_ARCH_CHIP_ATSAM3U4E is not set +# CONFIG_ARCH_CHIP_ATSAM3U4C is not set +# CONFIG_ARCH_CHIP_ATSAM3U2E is not set +# CONFIG_ARCH_CHIP_ATSAM3U2C is not set +# CONFIG_ARCH_CHIP_ATSAM3U1E is not set +# CONFIG_ARCH_CHIP_ATSAM3U1C is not set +# CONFIG_ARCH_CHIP_ATSAM3X8E is not set +# CONFIG_ARCH_CHIP_ATSAM3X8C is not set +# CONFIG_ARCH_CHIP_ATSAM3X4E is not set +# CONFIG_ARCH_CHIP_ATSAM3X4C is not set +# CONFIG_ARCH_CHIP_ATSAM3A8C is not set +# CONFIG_ARCH_CHIP_ATSAM3A4C is not set +# CONFIG_ARCH_CHIP_ATSAM4CMP16B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4A is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32B is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16B is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S16C is not set +# CONFIG_ARCH_CHIP_ATSAM4S16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S8C is not set +# CONFIG_ARCH_CHIP_ATSAM4S8B is not set +CONFIG_ARCH_CHIP_ATSAM4E16E=y +# CONFIG_ARCH_CHIP_ATSAM4E16C is not set +# CONFIG_ARCH_CHIP_ATSAM4E8E is not set +# CONFIG_ARCH_CHIP_ATSAM4E8C is not set +# CONFIG_ARCH_CHIP_SAM3U is not set +# CONFIG_ARCH_CHIP_SAM3X is not set +# CONFIG_ARCH_CHIP_SAM3A is not set +# CONFIG_ARCH_CHIP_SAM4CM is not set +# CONFIG_ARCH_CHIP_SAM4L is not set +CONFIG_ARCH_CHIP_SAM4E=y +# CONFIG_ARCH_CHIP_SAM4S is not set + +# +# AT91SAM3/4 Peripheral Support +# +# CONFIG_SAM34_ACC is not set +# CONFIG_SAM34_AES is not set +# CONFIG_SAM34_AFEC0 is not set +# CONFIG_SAM34_AFEC1 is not set +# CONFIG_SAM34_CAN0 is not set +# CONFIG_SAM34_CAN1 is not set +# CONFIG_SAM34_CHIPID is not set +CONFIG_SAM34_CMCC=y +# CONFIG_SAM34_DACC is not set +# CONFIG_SAM34_EIC is not set +CONFIG_SAM34_DMAC0=y +# CONFIG_SAM34_DMAC1 is not set +CONFIG_SAM34_EMAC=y +# CONFIG_SAM34_HSMCI is not set +# CONFIG_SAM34_NAND is not set +# CONFIG_SAM34_PDCA is not set +# CONFIG_SAM34_PWM is not set +# CONFIG_SAM34_RTC is not set +# CONFIG_SAM34_RTT is not set +CONFIG_SAM34_SMC=y +CONFIG_SAM34_SPI0=y +# CONFIG_SAM34_TC0 is not set +# CONFIG_SAM34_TC1 is not set +# CONFIG_SAM34_TC2 is not set +# CONFIG_SAM34_TC3 is not set +# CONFIG_SAM34_TC4 is not set +# CONFIG_SAM34_TC5 is not set +# CONFIG_SAM34_TC6 is not set +# CONFIG_SAM34_TC7 is not set +# CONFIG_SAM34_TC8 is not set +# CONFIG_SAM34_TWI is not set +# CONFIG_SAM34_TWIM is not set +# CONFIG_SAM34_TWIS is not set +# CONFIG_SAM34_TWIM0 is not set +# CONFIG_SAM34_TWIS0 is not set +# CONFIG_SAM34_TWIM1 is not set +# CONFIG_SAM34_TWIS1 is not set +CONFIG_SAM34_UART0=y +# CONFIG_SAM34_UART1 is not set +# CONFIG_SAM34_UDP is not set +# CONFIG_SAM34_USART0 is not set +CONFIG_SAM34_USART1=y +# CONFIG_SAM34_WDT is not set + +# +# AT91SAM3/4 External Memory Configuration +# +# CONFIG_SAM34_EXTNAND is not set +# CONFIG_SAM34_EXTNOR is not set +# CONFIG_SAM34_EXTSRAM0 is not set +# CONFIG_SAM34_EXTSRAM1 is not set + +# +# AT91SAM3/4 GPIO Interrupt Configuration +# +CONFIG_SAM34_HAVE_GPIOD_IRQ=y +CONFIG_SAM34_HAVE_GPIOE_IRQ=y +CONFIG_SAM34_HAVE_GPIOF_IRQ=y +CONFIG_SAM34_GPIO_IRQ=y +CONFIG_SAM34_GPIOA_IRQ=y +# CONFIG_SAM34_GPIOB_IRQ is not set +# CONFIG_SAM34_GPIOC_IRQ is not set +# CONFIG_SAM34_GPIOD_IRQ is not set +# CONFIG_SAM34_GPIOE_IRQ is not set +# CONFIG_SAM34_GPIOF_IRQ is not set + +# +# AT91SAM3/4 SPI device driver options +# +CONFIG_SAM34_SPI_DMA=y +CONFIG_SAM34_SPI_DMATHRESHOLD=4 + +# +# AT91SAM3/4 EMAC device driver options +# +CONFIG_SAM34_EMAC_NRXBUFFERS=16 +CONFIG_SAM34_EMAC_NTXBUFFERS=8 +# CONFIG_SAM34_EMAC_PREALLOCATE is not set +# CONFIG_SAM34_EMAC_NBC is not set +CONFIG_SAM34_EMAC_PHYADDR=1 +# CONFIG_SAM34_EMAC_PHYINIT is not set +CONFIG_SAM34_EMAC_MII=y +# CONFIG_SAM34_EMAC_CLAUSE45 is not set +CONFIG_SAM34_EMAC_AUTONEG=y +CONFIG_SAM34_EMAC_PHYSR=30 +CONFIG_SAM34_EMAC_PHYSR_ALTCONFIG=y +CONFIG_SAM34_EMAC_PHYSR_ALTMODE=0x7 +CONFIG_SAM34_EMAC_PHYSR_10HD=0x1 +CONFIG_SAM34_EMAC_PHYSR_100HD=0x2 +CONFIG_SAM34_EMAC_PHYSR_10FD=0x5 +CONFIG_SAM34_EMAC_PHYSR_100FD=0x6 +CONFIG_SAM34_EMAC_ISETH0=y +# CONFIG_SAM34_TC is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=11990 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=131072 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAM4EEK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sam4e-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_SAM4EEK_96MHZ is not set +CONFIG_SAM4EEK_120MHZ=y +CONFIG_SAM4EEK_AT25_BLOCKMOUNT=y +CONFIG_SAM4EEK_AT25_FTL=y +# CONFIG_SAM4EEK_LCD_ILI9325 is not set +CONFIG_SAM4EEK_LCD_ILI9341=y +CONFIG_SAM4EEK_LCD_RGB565=y +# CONFIG_SAM4EEK_LCD_RGB24 is not set +# CONFIG_SAM4EEK_LCD_RGB32 is not set +CONFIG_SAM4EEK_LCD_BGCOLOR=0x95fa +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxwm_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +CONFIG_SCHED_HAVE_PARENT=y +# CONFIG_SCHED_CHILD_STATUS is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCHLD=4 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=48 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +CONFIG_INPUT_ADS7843E=y +# CONFIG_ADS7843E_MULTIPLE is not set +CONFIG_ADS7843E_SPIDEV=0 +CONFIG_ADS7843E_DEVMINOR=0 +CONFIG_ADS7843E_SPIMODE=0 +CONFIG_ADS7843E_FREQUENCY=100000 +CONFIG_ADS7843E_SWAPXY=y +CONFIG_ADS7843E_THRESHX=51 +CONFIG_ADS7843E_THRESHY=39 +# CONFIG_INPUT_MXT is not set +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=1 +CONFIG_LCD_MAXPOWER=64 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +CONFIG_MTD_AT25=y +CONFIG_AT25_SPIMODE=0 +CONFIG_AT25_SPIFREQUENCY=20000000 +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +CONFIG_ARCH_PHY_INTERRUPT=y +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +CONFIG_ETH0_PHY_KSZ8051=y +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_USART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=16 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x95fa +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +# CONFIG_NX_XYINPUT_MOUSE is not set +CONFIG_NX_XYINPUT_TOUCHSCREEN=y +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +CONFIG_NXFONT_SANS22X29B=y +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +CONFIG_NXTERM=y + +# +# NxTerm Output Text/Graphics Options +# +CONFIG_NXTERM_BPP=16 +CONFIG_NXTERM_CURSORCHAR=137 +CONFIG_NXTERM_MXCHARS=396 +CONFIG_NXTERM_CACHESIZE=32 +CONFIG_NXTERM_LINESEPARATION=0 +# CONFIG_NXTERM_NOWRAP is not set + +# +# NxTerm Input options +# +CONFIG_NXTERM_NXKBDIN=y +CONFIG_NXTERM_KBDBUFSIZE=16 +CONFIG_NXTERM_NPOLLWAITERS=4 + +# +# NX Multi-user only options +# +CONFIG_NX_MULTIUSER=y +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXSERVERMSGS=32 +CONFIG_NX_MXCLIENTMSGS=16 +# CONFIG_NX_NXSTART is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# +CONFIG_NXWIDGETS=y + +# +# NX Server/Device Configuration +# +CONFIG_NXWIDGETS_FLICKERFREE=y +# CONFIG_NXWIDGETS_EXTERNINIT is not set +CONFIG_NXWIDGETS_DEVNO=0 +CONFIG_NXWIDGET_SERVERINIT=y +CONFIG_NXWIDGETS_SERVERPRIO=110 +CONFIG_NXWIDGETS_SERVERSTACK=1596 +CONFIG_NXWIDGETS_CLIENTPRIO=100 +CONFIG_NXWIDGETS_LISTENERPRIO=100 +CONFIG_NXWIDGETS_LISTENERSTACK=1596 +# CONFIG_NXWIDGET_EVENTWAIT is not set + +# +# NXWidget Configuration +# +CONFIG_NXWIDGETS_BPP=16 +CONFIG_NXWIDGETS_SIZEOFCHAR=1 + +# +# NXWidget Default Values +# +# CONFIG_NXWIDGETS_SYSTEM_CUSTOM_FONTID is not set +CONFIG_NXWIDGETS_TNXARRAY_INITIALSIZE=16 +CONFIG_NXWIDGETS_TNXARRAY_SIZEINCREMENT=8 +# CONFIG_NXWIDGETS_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_TEXTCOLORS is not set +CONFIG_NXWIDGETS_TRANSPARENT_COLOR=0x0 + +# +# Keypad behavior +# +CONFIG_NXWIDGETS_FIRST_REPEAT_TIME=500 +CONFIG_NXWIDGETS_CONTINUE_REPEAT_TIME=200 +CONFIG_NXWIDGETS_DOUBLECLICK_TIME=350 +CONFIG_NXWIDGETS_KBDBUFFER_SIZE=16 +CONFIG_NXWIDGETS_CURSORCONTROL_SIZE=4 +# CONFIG_NXWIDGET_MEMMONITOR is not set +CONFIG_NXWM=y + +# +# NxWM General Settings +# +# CONFIG_NXWM_LARGE_ICONS is not set +# CONFIG_NXWM_CUSTOM_FONTID is not set +CONFIG_NXWM_UNITTEST=y + +# +# Color configuration +# +# CONFIG_NXWM_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWM_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWM_CUSTOM_TEXTCOLORS is not set + +# +# Background Image +# +# CONFIG_NXWM_DISABLE_BACKGROUND_IMAGE is not set +CONFIG_NXWM_BACKGROUND_IMAGE="NXWidgets::g_nuttxBitmap160x160" + +# +# NxWM Taskbar Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_TASKBAR_VSPACING=4 +CONFIG_NXWM_TASKBAR_HSPACING=4 +# CONFIG_NXWM_TASKBAR_TOP is not set +# CONFIG_NXWM_TASKBAR_BOTTOM is not set +CONFIG_NXWM_TASKBAR_LEFT=y +# CONFIG_NXWM_TASKBAR_RIGHT is not set +# CONFIG_NXWM_CUSTOM_TASKBAR_WIDTH is not set +# CONFIG_NXWM_TASKBAR_ICONSCALE is not set +# CONFIG_NXWM_DISABLE_MINIMIZE is not set +# CONFIG_NXWM_TASKBAR_NO_BORDER is not set + +# +# NxWM Toolbar Configuration +# +# CONFIG_NXWM_CUSTOM_TOOLBAR_HEIGHT is not set +CONFIG_NXWM_TOOLBAR_CUSTOM_FONTID=y +CONFIG_NXWM_TOOLBAR_FONTID=5 + +# +# NxWM Application Window Configuration +# +# CONFIG_NXWM_CUSTOM_APPWINDOW_ICONS is not set + +# +# NxWM Start Window Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_STARTWINDOW_VSPACING=4 +CONFIG_NXWM_STARTWINDOW_HSPACING=4 +# CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set +CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm" +CONFIG_NXWM_STARTWINDOW_MXMSGS=32 +CONFIG_NXWM_STARTWINDOW_MXMPRIO=42 +CONFIG_NXWM_STARTWINDOW_PRIO=100 +CONFIG_NXWM_STARTWINDOW_STACKSIZE=2048 + +# +# NxTerm Window Settings +# +CONFIG_NXWM_NXTERM=y +CONFIG_NXWM_NXTERM_PRIO=100 +CONFIG_NXWM_NXTERM_STACKSIZE=1596 +# CONFIG_NXWM_NXTERM_CUSTOM_COLORS is not set +# CONFIG_NXWM_NXTERM_CUSTOM_FONTID is not set +# CONFIG_NXWM_CUSTOM_NXTERM_ICON is not set + +# +# NxWM Touchscreen Configuration +# +CONFIG_NXWM_TOUCHSCREEN=y + +# +# Touchscreen Device Settings +# +CONFIG_NXWM_TOUCHSCREEN_DEVINIT=y +CONFIG_NXWM_TOUCHSCREEN_DEVNO=0 +CONFIG_NXWM_TOUCHSCREEN_DEVPATH="/dev/input0" +CONFIG_NXWM_TOUCHSCREEN_SIGNO=5 +CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=120 +CONFIG_NXWM_TOUCHSCREEN_LISTENERSTACK=1596 + +# +# NxWM Keyboard Configuration +# +CONFIG_NXWM_KEYBOARD=y + +# +# Keyboard Device Settings +# +CONFIG_NXWM_KEYBOARD_DEVPATH="/dev/console" +# CONFIG_NXWM_KEYBOARD_USBHOST is not set +CONFIG_NXWM_KEYBOARD_SIGNO=6 +CONFIG_NXWM_KEYBOARD_BUFSIZE=16 +CONFIG_NXWM_KEYBOARD_LISTENERPRIO=120 +CONFIG_NXWM_KEYBOARD_LISTENERSTACK=1024 + +# +# NxWM Calibration Display Settings +# +CONFIG_NXWM_CALIBRATION_MARGIN=40 +# CONFIG_NXWM_CALIBRATION_CUSTOM_COLORS is not set +CONFIG_NXWM_CALIBRATION_MESSAGES=y +CONFIG_NXWM_CALIBRATION_CUSTOM_FONTID=y +CONFIG_NXWM_CALIBRATION_FONTID=5 +CONFIG_NXWM_CALIBRATION_AVERAGE=y +CONFIG_NXWM_CALIBRATION_NSAMPLES=2 +# CONFIG_NXWM_CALIBRATION_DISCARD_MINMAX is not set +# CONFIG_NXWM_CALIBRATION_ANISOTROPIC is not set +# CONFIG_NXWM_CUSTOM_CALIBRATION_ICON is not set +CONFIG_NXWM_CALIBRATION_SIGNO=5 +CONFIG_NXWM_CALIBRATION_LISTENERPRIO=100 +CONFIG_NXWM_CALIBRATION_LISTENERSTACK=1024 + +# +# NxWM Hex Calculator Display Settings +# +# CONFIG_NXWM_HEXCALCULATOR_CUSTOM_COLORS is not set +# CONFIG_NXWM_CUSTOM_HEXCALCULATOR_ICON is not set +CONFIG_NXWM_HEXCALCULATOR_CUSTOM_FONTID=y +CONFIG_NXWM_HEXCALCULATOR_FONTID=5 + +# +# NxWM Media Player Display Settings +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sam4e-ek/nxwm/setenv.sh b/configs/sam4e-ek/nxwm/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..b227abda1a7c4db44357605b89fac4422874c028 --- /dev/null +++ b/configs/sam4e-ek/nxwm/setenv.sh @@ -0,0 +1,69 @@ +#!/bin/bash +# configs/sam4e-ek/nxwm/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sam4e-ek/scripts/flash.ld b/configs/sam4e-ek/scripts/flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..1a8d3a3995473bc47c804dcd215d09f6c08c5f76 --- /dev/null +++ b/configs/sam4e-ek/scripts/flash.ld @@ -0,0 +1,116 @@ +/**************************************************************************** + * configs/sam4e-ek/scripts/flash.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAM4E16 has 1024KB of FLASH beginning at address 0x0040:0000, + * 128KB of SRAM beginning at address 0x2000:0000. When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00400000, LENGTH = 1024K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sam4e-ek/src/.gitignore b/configs/sam4e-ek/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/sam4e-ek/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/sam4e-ek/src/Makefile b/configs/sam4e-ek/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..680ddaab020529ed8a2cd7b458e9d711974fd08b --- /dev/null +++ b/configs/sam4e-ek/src/Makefile @@ -0,0 +1,78 @@ +############################################################################ +# configs/sam4e-ek/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c sam_leds.c sam_buttons.c sam_udp.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += sam_appinit.c +endif + +ifeq ($(CONFIG_SAM34_HSMCI),y) +CSRCS += sam_hsmci.c +endif + +ifeq ($(CONFIG_LCD),y) +ifeq ($(CONFIG_SAM4EEK_LCD_ILI9325),y) +CSRCS += sam_ili9325.c +else +ifeq ($(CONFIG_SAM4EEK_LCD_ILI9341),y) +CSRCS += sam_ili9341.c +endif +endif +endif + +ifeq ($(CONFIG_SAM34_EMAC),y) +CSRCS += sam_ethernet.c +endif + +ifeq ($(CONFIG_INPUT_ADS7843E),y) +CSRCS += sam_ads7843e.c +endif + +ifeq ($(CONFIG_SAM34_SPI0),y) +CSRCS += sam_spi.c +ifeq ($(CONFIG_MTD_AT25),y) +CSRCS += sam_at25.c +endif +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += sam_usbmsc.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/sam4e-ek/src/sam4e-ek.h b/configs/sam4e-ek/src/sam4e-ek.h new file mode 100644 index 0000000000000000000000000000000000000000..1b11b47c6f16ec05e91eb279d3c37cb4c3c4d983 --- /dev/null +++ b/configs/sam4e-ek/src/sam4e-ek.h @@ -0,0 +1,459 @@ +/************************************************************************************ + * configs/sam4e-ek/src/sam4e-ek.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAM4E_EK_SRC_SAM4E_EK_H +#define __CONFIGS_SAM4E_EK_SRC_SAM4E_EK_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +#include +#include + +#include "chip/sam_pinmap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#define HAVE_HSMCI 1 +#define HAVE_AT25 1 +#define HAVE_USBDEV 1 +#define HAVE_USBMONITOR 1 +#define HAVE_NETWORK 1 + +/* HSMCI */ +/* Can't support MMC/SD if the card interface is not enabled */ + +#if !defined(CONFIG_SAM34_HSMCI) +# undef HAVE_HSMCI +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(HAVE_HSMCI) && defined(CONFIG_DISABLE_MOUNTPOINT) +# warning Mountpoints disabled. No MMC/SD support +# undef HAVE_HSMCI +#endif + +/* We need PIO interrupts on GPIOA to support card detect interrupts */ + +#if defined(HAVE_HSMCI) && !defined(CONFIG_SAM34_GPIOA_IRQ) +# warning PIOA interrupts not enabled. No MMC/SD support. +# undef HAVE_HSMCI +#endif + +/* AT25 Serial FLASH */ +/* Can't support the AT25 device if it SPI0 or AT25 support are not enabled */ + +#if !defined(CONFIG_SAM34_SPI0) || !defined(CONFIG_MTD_AT25) +# undef HAVE_AT25 +#endif + +/* Can't support AT25 features if mountpoints are disabled or if we were not + * asked to mount the AT25 part + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_SAM4EEK_AT25_BLOCKMOUNT) +# undef HAVE_AT25 +#endif + +/* If we are going to mount the AT25, then they user must also have told + * us what to do with it by setting one of these. + */ + +#ifndef CONFIG_FS_NXFFS +# undef CONFIG_SAM4EEK_AT25_NXFFS +#endif + +#if !defined(CONFIG_SAM4EEK_AT25_FTL) && !defined(CONFIG_SAM4EEK_AT25_NXFFS) +# undef HAVE_AT25 +#endif + +#if defined(CONFIG_SAM4EEK_AT25_FTL) && defined(CONFIG_SAM4EEK_AT25_NXFFS) +# warning Both CONFIG_SAM4EEK_AT25_FTL and CONFIG_SAM4EEK_AT25_NXFFS are set +# warning Ignoring CONFIG_SAM4EEK_AT25_NXFFS +# undef CONFIG_SAM4EEK_AT25_NXFFS +#endif + +/* USB Device */ +/* CONFIG_SAM34_UDP and CONFIG_USBDEV must be defined, or there is no USB + * device. + */ + +#if !defined(CONFIG_SAM34_UDP) || !defined(CONFIG_USBDEV) +# undef HAVE_USBDEV +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#ifndef HAVE_USBDEV +# undef CONFIG_USBDEV_TRACE +#endif + +#if !defined(CONFIG_SYSTEM_USBMONITOR) || !defined(CONFIG_USBDEV_TRACE) +# undef HAVE_USBMONITOR +#endif + +/* Networking */ + +#if !defined(CONFIG_NET) || !defined(CONFIG_SAM34_EMAC) +# undef HAVE_NETWORK +#endif + +/* SAM4E-EK GPIO Pin Definitions ****************************************************/ + +/* LCD: + * + * The SAM4E-EK carries a TFT transmissive LCD module with touch panel, FTM280C34D. + * Its integrated driver IC is ILI9325. The LCD display area is 2.8 inches diagonally + * measured, with a native resolution of 240 x 320 dots. + * + * The SAM4E16 communicates with the LCD through PIOC where an 8-bit parallel "8080- + * like" protocol data bus has to be implemented in software. + * + * ---- ----- --------- -------------------------------- + * PIN PIO SIGNAL NOTES + * ---- ----- --------- -------------------------------- + * 1 VDD + * 2 PC7 DB17 + * 3 PC6 DB16 + * 4 PC5 DB15 + * 5 PC4 DB14 + * 6 PC3 DB13 + * 7 PC2 DB12 + * 8 PC1 DB11 + * 9 PC0 DB10 + * 10 DB9 Pulled low + * 11 DB8 Pulled low + * 12 DB7 Pulled low + * 13 DB6 Pulled low + * 14 DB5 Pulled low + * 15 DB4 Pulled low + * 16 DB3 Pulled low + * 17 DB2 Pulled low + * 18 DB1 Pulled low + * 19 DB0 Pulled low + * ---- ----- --------- -------------------------------- + * 20 VDD + * 21 PC11 RD + * 22 PC8 WR + * 23 PC19 RS + * 24 PD18 CS Via J8, pulled high. + * 25 RESET Connects to NSRST + * 26 IM0 Pulled high + * 27 IM1 Grounded + * 28 GND + * ---- ----- --------- -------------------------------- + * 29 [PC13] LED-A Backlight controls: PC13 enables + * 30 [PC13] LEDK1 AAT3155 charge pump that drives + * 31 [PC13] LEDK2 the backlight LEDs + * 32 [PC13] LEDK3 + * 33 [PC13] LEDK4 + * 34 [PC13] LEDK1 + * ---- ----- --------- -------------------------------- + * 35 Y+ These go to the ADS7843 + * 36 Y- touchscreen controller. + * 37 X+ + * 38 X- + * 39 NC + * ---- ----- --------- -------------------------------- + * + * LCD backlight is made of 4 white chip LEDs in parallel, driven by an AAT3155 + * charge pump, MN4. The AAT3155 is controlled by the SAM3U4E through a single line + * Simple Serial Control (S2Cwire) interface, which permits to enable, disable, and + * set the LED drive current (LED brightness control) from a 32-level logarithmic + * scale. Four resistors R93/R94/R95/R96 are implemented for optional current + * limitation. + */ + + +/* LCD Backlight pin definition. */ + +#define GPIO_LCD_BKL (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOC | GPIO_PIN13) + +/* ADS7843 Touchscreen controller (TSC) + * + * The LCD module integrates a 4-wire touch screen panel controlled by + * MN5, ADS7843, which is a slave device on the SAM3U4E SPI bus. The ADS7843 touch + * ADC auxiliary inputs IN3/IN4 are connected to test points for optional function + * extension. + * + * ------ ------- + * GPIO PIN + * ------ ------- + * PA11 /CS (pulled high) + * PA12 DOUT + * PA13 DIN + * PA14 DCLK + * PA16 /PENIRQ + * PA17 BUSY + * ------ ------- + * + * The IRQ is active low and pulled up. + * + * Pen Interrupt. Open anode output, requires 10kO to 100kO pull-up resistor + * externally. There is a 100KO pull-up on the SAM4E-EK board so no additional + * pull-up should be required. + * + * BUSY is high impedance when CS is high (not selected). When CS is + * is low, BUSY is active high. Since the pin is pulled up, it will appear + * busy if CS is not selected (there is no pull-up onboard). + */ + +#define GPIO_TCS_IRQ (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_INT_BOTHEDGES | \ + GPIO_PORT_PIOA | GPIO_PIN16) +#define GPIO_TCS_BUSY (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_PORT_PIOA | \ + GPIO_PIN17) + +#define SAM_TCS_IRQ SAM_IRQ_PA16 + +/* Ethernet MAC. The PHY interrupt is available on pin PD28 */ + +#define GPIO_PHY_IRQ (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_FALLING | GPIO_PORT_PIOD | GPIO_PIN28) +#define SAM_PHY_IRQ SAM_IRQ_PD28 + +/* LEDs + * + * D2 PA0 Blue Pulled high + * D3 PD20 Amber Pulled high + * D4 PD21 Green Pulled high + */ + +#define GPIO_D3 (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | \ + GPIO_OUTPUT_CLEAR | GPIO_PIN20) +#define GPIO_D2 (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_PORT_PIOA | \ + GPIO_OUTPUT_SET | GPIO_PIN0) +#define GPIO_D4 (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | \ + GPIO_OUTPUT_SET | GPIO_PIN21) + +/* Buttons + * + * Four buttons for software inputs: + * + * PA1 BUTTON_SCROLL-UP Grounded + * PA2 BUTTON_SCROLL-DOWN Grounded + * PA19 BUTTON_WAKU Grounded + * PA20 BUTTON_TAMP Grounded + */ + +#define GPIO_SCROLLUP (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOA | GPIO_PIN1) +#define GPIO_SCROLLDWN (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOA | GPIO_PIN2) +#define GPIO_WAKU (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOA | GPIO_PIN19) +#define GPIO_TAMP (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOA | GPIO_PIN20) + +#define IRQ_SCROLLUP SAM_IRQ_PA1 +#define IRQ_SCROLLDWN SAM_IRQ_PA2 +#define IRQ_WAKU SAM_IRQ_PA19 +#define IRQ_TAMP SAM_IRQ_PA20 + +/* USART1: To avoid any electrical conflict, the RS232 and RS485 transceiver + * are isolated from the receiving line PA21. + * + * - Chose RS485 channel: Close 1-2 pins on JP11 and set PA23 to high level + * - Chose RS232 channel: Close 2-3 pins on JP11 and set PA23 to low level + */ + +#define GPIO_RS232_ENABLE (GPIO_OUTPUT | GPIO_CFG_DEFAULT | \ + GPIO_OUTPUT_CLEAR | GPIO_PORT_PIOA | GPIO_PIN23) +#define GPIO_RS485_ENABLE (GPIO_OUTPUT | GPIO_CFG_DEFAULT | \ + GPIO_OUTPUT_SET | GPIO_PORT_PIOA | GPIO_PIN23) + +/* HSMCI SD Card Detect + * + * PA26 DAT2 + * PA27 DAT3 + * PA28 CMD + * PA29 CLK + * PA30 DAT0 + * PA31 DAT1 + * PA6 CD Pulled high + */ + +#define GPIO_MCI_CD (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_PORT_PIOA | GPIO_PIN6) +#define MCI_CD_IRQ SAM_IRQ_PA6 + +/* SPI Chip Selects */ + +/* Touchscreen Controller: + * + * ------ ------- + * GPIO PIN + * ------ ------- + * PA11 /CS (pulled high externally) + * PA12 DOUT + * PA13 DIN + * PA14 DCLK + * PA16 /PENIRQ + * PA17 BUSY + * ------ ------- + * + * Chip select pin connected to the touchscreen controller and to the ZigBee module + * connector. Notice that the touchscreen chip select is implemented as a GPIO + * OUTPUT that must be controlled by board-specific. This is because the ADS7843E + * driver must be able to sample the device BUSY GPIO input between SPI transfers. + * However, the AD7843E will tri-state the BUSY input whenever the chip select is + * de-asserted. So the only option is to control the chip select manually and hold + * it low throughout the SPI transfer. + */ + +#define GPIO_TSC_CS (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOA | GPIO_PIN11) +#define TSC_CSNUM 0 + +/* Serial FLASH (AT25DF321A) + * + * ------ ------- --------------- + * GPIO PIN SAM4E FUNCTION + * ------ ------- --------------- + * PA13 SI MOSI + * PA12 SO MIS0 + * PA14 SCK SPCK + * PA5 /CS NPCS3 (pulled high externally) + * ------ ------- --------------- + */ + +#define GPIO_FLASH_CS (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOA | GPIO_PIN5) +#define FLASH_CSNUM 3 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the SAM4E-EK board. + * + ************************************************************************************/ + +void weak_function sam_spidev_initialize(void); + +/************************************************************************************ + * Name: sam_hsmci_initialize + * + * Description: + * Initialize HSMCI support + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +int sam_hsmci_initialize(int minor); +#else +# define sam_hsmci_initialize(minor) (-ENOSYS) +#endif + +/************************************************************************************ + * Name: sam_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +#ifdef HAVE_NETWORK +void weak_function sam_netinitialize(void); +#endif + +/************************************************************************************ + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_cardinserted(int slotno); +#else +# define sam_cardinserted(slotno) (false) +#endif + +/************************************************************************************ + * Name: sam_writeprotected + * + * Description: + * Check if the card in the MMCSD slot is write protected + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_writeprotected(int slotno); +#else +# define sam_writeprotected(slotno) (false) +#endif + +/**************************************************************************** + * Name: sam_at25_automount + * + * Description: + * Initialize, configure, and mount the AT25 serial FLASH. The FLASH will + * be mounted at /dev/at25. + * + ****************************************************************************/ + +#ifdef HAVE_AT25 +int sam_at25_automount(int minor); +#else +# define sam_at25_automount(minor) (-ENOSYS) +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAM4E_EK_SRC_SAM4E_EK_H */ diff --git a/configs/sam4e-ek/src/sam_ads7843e.c b/configs/sam4e-ek/src/sam_ads7843e.c new file mode 100644 index 0000000000000000000000000000000000000000..70f83e94efc37848baf3a125770fd46ae428d13a --- /dev/null +++ b/configs/sam4e-ek/src/sam_ads7843e.c @@ -0,0 +1,293 @@ +/************************************************************************************ + * configs/sam4e-ek/src/sam_ads7843e.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "sam_gpio.h" +#include "sam_spi.h" + +#include "sam4e-ek.h" + +#if defined(CONFIG_INPUT) && defined(CONFIG_INPUT_ADS7843E) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_SAM34_SPI0 +# error "Touchscreen support requires CONFIG_SAM34_SPI0" +#endif + +#ifndef CONFIG_SAM34_GPIOA_IRQ +# error "Touchscreen support requires CONFIG_SAM34_GPIOA_IRQ" +#endif + +#ifndef CONFIG_ADS7843E_FREQUENCY +# define CONFIG_ADS7843E_FREQUENCY 500000 +#endif + +#ifndef CONFIG_ADS7843E_SPIDEV +# define CONFIG_ADS7843E_SPIDEV TSC_CSNUM +#endif + +#if CONFIG_ADS7843E_SPIDEV != TSC_CSNUM +# error "CONFIG_ADS7843E_SPIDEV must have the same value as TSC_CSNUM" +#endif + +#ifndef CONFIG_ADS7843E_DEVMINOR +# define CONFIG_ADS7843E_DEVMINOR 0 +#endif + +/**************************************************************************** + * Static Function Prototypes + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the ADS7843E driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the ADS7843E interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + */ + +static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr); +static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable); +static void tsc_clear(FAR struct ads7843e_config_s *state); +static bool tsc_busy(FAR struct ads7843e_config_s *state); +static bool tsc_pendown(FAR struct ads7843e_config_s *state); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the ADS7843E + * driver. This structure provides information about the configuration + * of the ADS7843E and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writeable because, under certain circumstances, the driver + * may modify frequency or X plate resistance values. + */ + +static struct ads7843e_config_s g_tscinfo = +{ + .frequency = CONFIG_ADS7843E_FREQUENCY, + + .attach = tsc_attach, + .enable = tsc_enable, + .clear = tsc_clear, + .busy = tsc_busy, + .pendown = tsc_pendown, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the ADS7843E driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the ADS7843E interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + */ + +static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr) +{ + /* Attach the ADS7843E interrupt */ + + ivdbg("Attaching %p to IRQ %d\n", isr, SAM_TCS_IRQ); + return irq_attach(SAM_TCS_IRQ, isr); +} + +static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable) +{ + /* Attach and enable, or detach and disable */ + + ivdbg("IRQ:%d enable:%d\n", SAM_TCS_IRQ, enable); + if (enable) + { + sam_gpioirqenable(SAM_TCS_IRQ); + } + else + { + sam_gpioirqdisable(SAM_TCS_IRQ); + } +} + +static void tsc_clear(FAR struct ads7843e_config_s *state) +{ + /* Does nothing */ +} + +static bool tsc_busy(FAR struct ads7843e_config_s *state) +{ +#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_VERBOSE) + static bool last = (bool)-1; +#endif + + /* BUSY is high impedance when CS is high (not selected). When CS is + * is low, BUSY is active high. + */ + + bool busy = sam_gpioread(GPIO_TCS_BUSY); +#if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_VERBOSE) + if (busy != last) + { + ivdbg("busy:%d\n", busy); + last = busy; + } +#endif + + return busy; +} + +static bool tsc_pendown(FAR struct ads7843e_config_s *state) +{ + /* The /PENIRQ value is active low */ + + bool pendown = !sam_gpioread(GPIO_TCS_IRQ); + ivdbg("pendown:%d\n", pendown); + return pendown; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * configure the touchscreen device. This function will register the driver + * as /dev/inputN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ + FAR struct spi_dev_s *dev; + int ret; + + idbg("minor %d\n", minor); + DEBUGASSERT(minor == 0); + + /* Configure and enable the ADS7843E interrupt pin as an input */ + + (void)sam_configgpio(GPIO_TCS_BUSY); + (void)sam_configgpio(GPIO_TCS_IRQ); + + /* Configure the PIO interrupt */ + + sam_gpioirq(GPIO_TCS_IRQ); + + /* Get an instance of the SPI interface for the touchscreen chip select */ + + dev = sam_spibus_initialize(TSC_CSNUM); + if (!dev) + { + idbg("Failed to initialize SPI chip select %d\n", TSC_CSNUM); + return -ENODEV; + } + + /* Initialize and register the SPI touschscreen device */ + + ret = ads7843e_register(dev, &g_tscinfo, CONFIG_ADS7843E_DEVMINOR); + if (ret < 0) + { + idbg("Failed to initialize SPI chip select %d\n", TSC_CSNUM); + /* sam_spibus_uninitialize(dev); */ + return -ENODEV; + } + + return OK; +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* No support for un-initializing the touchscreen ADS7843E device yet */ +} + +#endif /* CONFIG_INPUT && CONFIG_INPUT_ADS7843E */ diff --git a/configs/sam4e-ek/src/sam_appinit.c b/configs/sam4e-ek/src/sam_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..0a577dc9250d89628f934b48eb29d1231ffd40b9 --- /dev/null +++ b/configs/sam4e-ek/src/sam_appinit.c @@ -0,0 +1,113 @@ +/**************************************************************************** + * config/sam4e-ek/src/sam_appinit.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#include "sam4e-ek.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(HAVE_AT25) || defined(HAVE_HSMCI) || defined(HAVE_USBMONITOR) + int ret; +#endif + +#ifdef HAVE_AT25 + /* Initialize the AT25 driver */ + + ret = sam_at25_automount(0); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_at25_automount() failed: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_HSMCI + /* Initialize the HSMCI driver */ + + ret = sam_hsmci_initialize(0); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_hsmci_initialize(0) failed: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret); + return ret; + } +#endif + + return OK; +} diff --git a/configs/sam4e-ek/src/sam_at25.c b/configs/sam4e-ek/src/sam_at25.c new file mode 100644 index 0000000000000000000000000000000000000000..2b3473d6d9569405d226de52d1923c7259eb5755 --- /dev/null +++ b/configs/sam4e-ek/src/sam_at25.c @@ -0,0 +1,143 @@ +/**************************************************************************** + * config/sam4e-ek/src/sam_at25.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "sam_spi.h" +#include "sam4e-ek.h" + +#ifdef HAVE_AT25 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_at25_automount + * + * Description: + * Initialize, configure, and mount the AT25 serial FLASH. The FLASH will + * be mounted at /dev/at25. + * + ****************************************************************************/ + +int sam_at25_automount(int minor) +{ + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; + static bool initialized = false; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* No.. Get the SPI port driver */ + + spi = sam_spibus_initialize(FLASH_CSNUM); + if (!spi) + { + fdbg("ERROR: Failed to initialize SPI port %d\n", FLASH_CSNUM); + return -ENODEV; + } + + /* Now bind the SPI interface to the AT25 SPI FLASH driver */ + + mtd = at25_initialize(spi); + if (!mtd) + { + fdbg("ERROR: Failed to bind SPI port %d to the AT25 FLASH driver\n"); + return -ENODEV; + } + +#if defined(CONFIG_SAM4EEK_AT25_FTL) + /* And finally, use the FTL layer to wrap the MTD driver as a block + * driver at /dev/mtdblockN, where N=minor device number. + */ + + ret = ftl_initialize(minor, mtd); + if (ret < 0) + { + fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + +#elif defined(CONFIG_SAM4EEK_AT25_NXFFS) + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", ret); + return ret; + } + + /* Mount the file system at /mnt/at25 */ + + ret = mount(NULL, "/mnt/at25", "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* HAVE_AT25 */ diff --git a/configs/sam4e-ek/src/sam_boot.c b/configs/sam4e-ek/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..d75f6bebc340bd93473216f5e080413d4db81b46 --- /dev/null +++ b/configs/sam4e-ek/src/sam_boot.c @@ -0,0 +1,158 @@ +/************************************************************************************ + * configs/sam4e-ek/src/sam_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "sam4e-ek.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_config_usart1 + * + * Description: + * USART1: To avoid any electrical conflict, the RS232 and RS485 transceiver are + * isolated from the receiving line PA21. + * + * - Chose RS485 channel: Close 1-2 pins on JP11 and set PA23 to high level + * - Chose RS232 channel: Close 2-3 pins on JP11 and set PA23 to low level + * + ************************************************************************************/ + +#ifdef CONFIG_SAM34_USART1 +static inline void board_config_usart1(void) +{ +#if defined(CONFIG_USART1_ISUART) + (void)sam_configgpio(GPIO_RS232_ENABLE); +#else /* if defined(CONFIG_USART1_RS485) */ + (void)sam_configgpio(GPIO_RS485_ENABLE); +#endif +} +#else +# define board_config_usart1() +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void) +{ + /* Configure USART1 for RS-232/RS-485 operation */ + + board_config_usart1(); + + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * sam_spidev_initialize() has been brought into the link. + */ + +#ifdef CONFIG_SAM34_SPI0 + if (sam_spidev_initialize) + { + sam_spidev_initialize(); + } +#endif + + /* Configure board resources to support networkingif the 1) networking is enabled, + * 2) the EMAC module is enabled, and 2) the weak function sam_netinitialize() + * has been brought into the build. + */ + +#ifdef HAVE_NETWORK + if (sam_netinitialize) + { + sam_netinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + (void)board_app_initialize(); +#endif +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/sam4e-ek/src/sam_buttons.c b/configs/sam4e-ek/src/sam_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..d6650047284fca264cd871fda4ed0a4f70df0b12 --- /dev/null +++ b/configs/sam4e-ek/src/sam_buttons.c @@ -0,0 +1,218 @@ +/**************************************************************************** + * configs/sam4e-ek/src/sam_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "sam4e-ek.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +static xcpt_t g_irq_scrollup; +static xcpt_t g_irq_scrolldown; +static xcpt_t g_irq_waku; +static xcpt_t g_irq_tamp; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_irqx + * + * Description: + * This function implements the core of the board_button_irq() logic. + * + ****************************************************************************/ + +#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq, + xcpt_t irqhandler, xcpt_t *store) +{ + xcpt_t oldhandler; + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the following + * operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = *store; + *store = irqhandler; + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + /* Configure the interrupt */ + + sam_gpioirq(pinset); + (void)irq_attach(irq, irqhandler); + sam_gpioirqenable(irq); + } + else + { + /* Detach and disable the interrupt */ + + (void)irq_detach(irq); + sam_gpioirqdisable(irq); + } + + leave_critical_section(flags); + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + (void)sam_configgpio(GPIO_SCROLLUP); + (void)sam_configgpio(GPIO_SCROLLDWN); + (void)sam_configgpio(GPIO_WAKU); + (void)sam_configgpio(GPIO_TAMP); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t retval; + + retval = sam_gpioread(GPIO_SCROLLUP) ? 0 : BUTTON_SCROLLUP; + retval |= sam_gpioread(GPIO_SCROLLDWN) ? 0 : BUTTON_SCROLLDOWN; + retval |= sam_gpioread(GPIO_WAKU) ? 0 : BUTTON_WAKU; + retval |= sam_gpioread(GPIO_TAMP) ? 0 : BUTTON_TAMP; + + return retval; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address isreturned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the + * overall GPIO IRQ feature and CONFIG_AVR32_GPIOIRQSETA and/or + * CONFIG_AVR32_GPIOIRQSETB must be enabled to select GPIOs to support + * interrupts on. For button support, bits 2 and 3 must be set in + * CONFIG_AVR32_GPIOIRQSETB (PB2 and PB3). + * + ****************************************************************************/ + +#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + switch (id) + { + case BUTTON_SCROLLUP: + return board_button_irqx(GPIO_SCROLLUP, IRQ_SCROLLUP, + irqhandler, &g_irq_scrollup); + + case BUTTON_SCROLLDOWN: + return board_button_irqx(GPIO_SCROLLDWN, IRQ_SCROLLDWN, + irqhandler, &g_irq_scrolldown); + + case BUTTON_WAKU: + return board_button_irqx(GPIO_WAKU, IRQ_WAKU, + irqhandler, &g_irq_waku); + + case BUTTON_TAMP: + return board_button_irqx(GPIO_TAMP, IRQ_TAMP, + irqhandler, &g_irq_tamp); + + default: + return NULL; + } +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/sam4e-ek/src/sam_ethernet.c b/configs/sam4e-ek/src/sam_ethernet.c new file mode 100644 index 0000000000000000000000000000000000000000..0e1199307d31b11df4372b6285de25843413efe4 --- /dev/null +++ b/configs/sam4e-ek/src/sam_ethernet.c @@ -0,0 +1,271 @@ +/************************************************************************************ + * configs/sam4e-ek/src/sam_ethernet.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/* Force verbose debug on in this file only to support unit-level testing. */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# define CONFIG_DEBUG_VERBOSE 1 +# undef CONFIG_DEBUG_NET +# define CONFIG_DEBUG_NET 1 +#endif + +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "sam_emac.h" + +#include "sam4e-ek.h" + +#ifdef HAVE_NETWORK + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define SAM34_EMAC_DEVNAME "eth0" + +/* Debug ********************************************************************/ +/* Extra, in-depth debug output that is only available if + * CONFIG_NETDEV_PHY_DEBUG us defined. + */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# define phydbg dbg +# define phylldbg lldbg +#else +# define phydbg(x...) +# define phylldbg(x...) +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_SAM34_GPIOD_IRQ +static xcpt_t g_emac_handler; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_emac_phy_enable and sam_gmac_enable + ************************************************************************************/ + +#ifdef CONFIG_SAM34_GPIOD_IRQ +static void sam_emac_phy_enable(bool enable) +{ + phydbg("IRQ%d: enable=%d\n", SAM_PHY_IRQ, enable); + if (enable) + { + sam_gpioirqenable(SAM_PHY_IRQ); + } + else + { + sam_gpioirqdisable(SAM_PHY_IRQ); + } +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +void weak_function sam_netinitialize(void) +{ + phydbg("Configuring %08x\n", GPIO_PHY_IRQ); + sam_configgpio(GPIO_PHY_IRQ); +} + +/**************************************************************************** + * Name: arch_phy_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a PHY interrupt occurs. This function both attaches + * the interrupt handler and enables the interrupt if 'handler' is non- + * NULL. If handler is NULL, then the interrupt is detached and disabled + * instead. + * + * The PHY interrupt is always disabled upon return. The caller must + * call back through the enable function point to control the state of + * the interrupt. + * + * This interrupt may or may not be available on a given platform depending + * on how the network hardware architecture is implemented. In a typical + * case, the PHY interrupt is provided to board-level logic as a GPIO + * interrupt (in which case this is a board-specific interface and really + * should be called board_phy_irq()); In other cases, the PHY interrupt + * may be cause by the chip's MAC logic (in which case arch_phy_irq()) is + * an appropriate name. Other other boards, there may be no PHY interrupts + * available at all. If client attachable PHY interrupts are available + * from the board or from the chip, then CONFIG_ARCH_PHY_INTERRUPT should + * be defined to indicate that fact. + * + * Typical usage: + * a. OS service logic (not application logic*) attaches to the PHY + * PHY interrupt and enables the PHY interrupt. + * b. When the PHY interrupt occurs: (1) the interrupt should be + * disabled and () work should be scheduled on the worker thread (or + * perhaps a dedicated application thread). + * c. That worker thread should use the SIOCGMIIPHY, SIOCGMIIREG, + * and SIOCSMIIREG ioctl calls** to communicate with the PHY, + * determine what network event took place (Link Up/Down?), and + * take the appropriate actions. + * d. It should then interact the the PHY to clear any pending + * interrupts, then re-enable the PHY interrupt. + * + * * This is an OS internal interface and should not be used from + * application space. Rather applications should use the SIOCMIISIG + * ioctl to receive a signal when a PHY event occurs. + * ** This interrupt is really of no use if the Ethernet MAC driver + * does not support these ioctl calls. + * + * Input Parameters: + * intf - Identifies the network interface. For example "eth0". Only + * useful on platforms that support multiple Ethernet interfaces + * and, hence, multiple PHYs and PHY interrupts. + * handler - The client interrupt handler to be invoked when the PHY + * asserts an interrupt. Must reside in OS space, but can + * signal tasks in user space. A value of NULL can be passed + * in order to detach and disable the PHY interrupt. + * enable - A function pointer that be unsed to enable or disable the + * PHY interrupt. + * + * Returned Value: + * The previous PHY interrupt handler address is returned. This allows you + * to temporarily replace an interrupt handler, then restore the original + * interrupt handler. NULL is returned if there is was not handler in + * place when the call was made. + * + ****************************************************************************/ + +#ifdef CONFIG_SAM34_GPIOD_IRQ +xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable) +{ + irqstate_t flags; + xcpt_t *phandler; + xcpt_t oldhandler; + gpio_pinset_t pinset; + phy_enable_t enabler; + int irq; + + DEBUGASSERT(intf); + + nvdbg("%s: handler=%p\n", intf, handler); + phydbg("EMAC: devname=%s\n", SAM34_EMAC_DEVNAME); + + if (strcmp(intf, SAM34_EMAC_DEVNAME) == 0) + { + phydbg("Select EMAC\n"); + phandler = &g_emac_handler; + pinset = GPIO_PHY_IRQ; + irq = SAM_PHY_IRQ; + enabler = sam_emac_phy_enable; + } + else + { + ndbg("Unsupported interface: %s\n", intf); + return NULL; + } + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old interrupt handler and save the new one */ + + oldhandler = *phandler; + *phandler = handler; + + /* Configure the interrupt */ + + if (handler) + { + phydbg("Configure pin: %08x\n", pinset); + sam_gpioirq(pinset); + + phydbg("Attach IRQ%d\n", irq); + (void)irq_attach(irq, handler); + } + else + { + phydbg("Detach IRQ%d\n", irq); + (void)irq_detach(irq); + enabler = NULL; + } + + /* Return with the interrupt disabled in either case */ + + sam_gpioirqdisable(irq); + + /* Return the enabling function pointer */ + + if (enable) + { + *enable = enabler; + } + + /* Return the old handler (so that it can be restored) */ + + leave_critical_section(flags); + return oldhandler; +} +#endif /* CONFIG_SAM34_GPIOD_IRQ */ + +#endif /* HAVE_NETWORK */ diff --git a/configs/sam4e-ek/src/sam_hsmci.c b/configs/sam4e-ek/src/sam_hsmci.c new file mode 100644 index 0000000000000000000000000000000000000000..8577c0a318ee63ca461ed8669e9f16cb2105b7f5 --- /dev/null +++ b/configs/sam4e-ek/src/sam_hsmci.c @@ -0,0 +1,217 @@ +/**************************************************************************** + * config/sam4e-ek/src/sam_hsmci.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "sam_hsmci.h" + +#include "sam4e-ek.h" + +#ifdef HAVE_HSMCI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ +/* This structure holds static information unique to one HSMCI peripheral */ + +struct sam_hsmci_state_s +{ + struct sdio_dev_s *hsmci; /* R/W device handle */ + bool initialized; /* TRUE: HSMCI block driver is initialized */ + bool inserted; /* TRUE: card is inserted */ +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* HSCMI device state */ + +static struct sam_hsmci_state_s g_hsmci; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_hsmci_cardetect + * + * Description: + * Card detect interrupt handler + * + ****************************************************************************/ + +static int sam_hsmci_cardetect(int irq, void *regs) +{ + bool inserted; + + /* Get the state of the GPIO pin */ + + inserted = sam_cardinserted(0); + + /* Has the card detect state changed? */ + + if (inserted == g_hsmci.inserted) + { + /* Yes... remember that new state and inform the HSMCI driver */ + + g_hsmci.inserted = inserted; + + /* Report the new state to the SDIO driver */ + + sdio_mediachange(g_hsmci.hsmci, inserted); + } + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_hsmci_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int sam_hsmci_initialize(int minor) +{ + int ret; + + /* Have we already initialized? */ + + if (!g_hsmci.initialized) + { + /* Initialize card-detect GPIO. There is no write-protection GPIO. */ + + sam_configgpio(GPIO_MCI_CD); + + /* Mount the SDIO-based MMC/SD block driver */ + /* First, get an instance of the SDIO interface */ + + g_hsmci.hsmci = sdio_initialize(0); + if (!g_hsmci.hsmci) + { + fdbg("Failed to initialize SDIO\n"); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(minor, g_hsmci.hsmci); + if (ret != OK) + { + fdbg("Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + /* Configure card detect interrupts */ + + sam_gpioirq(GPIO_MCI_CD); + (void)irq_attach(MCI_CD_IRQ, sam_hsmci_cardetect); + + /* Then inform the HSMCI driver if there is or is not a card in the slot. */ + + g_hsmci.inserted = sam_cardinserted(0); + sdio_mediachange(g_hsmci.hsmci, g_hsmci.inserted); + + /* Now we are initialized */ + + g_hsmci.initialized = true; + + /* Enable card detect interrupts */ + + sam_gpioirqenable(MCI_CD_IRQ); + } + + return OK; +} + +/**************************************************************************** + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_cardinserted(int slotno) +{ + bool removed; + + /* Get the state of the GPIO pin */ + + removed = sam_gpioread(GPIO_MCI_CD); + fllvdbg("Slot %d inserted: %s\n", slotno, removed ? "NO" : "YES"); + + return !removed; +} + +/**************************************************************************** + * Name: sam_writeprotected + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_writeprotected(int slotno) +{ + /* There are no write protect pins */ + + return false; +} + +#endif /* HAVE_HSMCI */ diff --git a/configs/sam4e-ek/src/sam_ili9325.c b/configs/sam4e-ek/src/sam_ili9325.c new file mode 100644 index 0000000000000000000000000000000000000000..532e208037790633b1f37f763cb6846f4429b14e --- /dev/null +++ b/configs/sam4e-ek/src/sam_ili9325.c @@ -0,0 +1,1419 @@ +/************************************************************************************ + * configs/sam4e-ek/src/sam_ili9335.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * References: + * - This driver is a modification of the Shenzhou ILI9325 LCD driver. + * - ILI9325 Datasheet, Version: V0.43, ILI9325DS_V0.43.pdf, ILI TECHNOLOGY CORP., + * - SAM4Ex Datasheet, Atmel + * - Atmel ILI9325 Sample code for the SAM4S + * + * Some the LCD and SMC initialization logic comes from Atmel sample code for the + * SAM4S. The Atmel sample code has a BSD-like license with an additional + * requirement that restricts the code from being used on anything but Atmel + * microprocessors. I do not believe that this file "derives" from the Atmel + * sample code nor do I believe that it contains anything but generally available + * ILI9325 and SAM4x logic. Credit, however, needs to go where it is due. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************** + * + * The SAM4E-EK carries a TFT transmissive LCD module with touch panel, FTM280C34D. + * Its integrated driver IC is ILI9325. The LCD display area is 2.8 inches diagonally + * measured, with a native resolution of 240 x 320 dots. + * + * The SAM4E16 communicates with the LCD through PIOC where an 8-bit parallel "8080- + * like" protocol data bus has to be implemented in software. + * + * ---- ----- --------- -------------------------------- + * PIN PIO SIGNAL NOTES + * ---- ----- --------- -------------------------------- + * 1 VDD + * 2 PC7 DB17 + * 3 PC6 DB16 + * 4 PC5 DB15 + * 5 PC4 DB14 + * 6 PC3 DB13 + * 7 PC2 DB12 + * 8 PC1 DB11 + * 9 PC0 DB10 + * 10 DB9 Pulled low + * 11 DB8 Pulled low + * 12 DB7 Pulled low + * 13 DB6 Pulled low + * 14 DB5 Pulled low + * 15 DB4 Pulled low + * 16 DB3 Pulled low + * 17 DB2 Pulled low + * 18 DB1 Pulled low + * 19 DB0 Pulled low + * ---- ----- --------- -------------------------------- + * 20 VDD + * 21 PC11 RD + * 22 PC8 WR + * 23 PC19 RS + * 24 PD18 CS Via J8, pulled high. + * 25 RESET Connects to NSRST + * 26 IM0 Pulled high + * 27 IM1 Grounded + * 28 GND + * ---- ----- --------- -------------------------------- + * 29 [PC13] LED-A Backlight controls: PC13 enables + * 30 [PC13] LEDK1 AAT3155 charge pump that drives + * 31 [PC13] LEDK2 the backlight LEDs + * 32 [PC13] LEDK3 + * 33 [PC13] LEDK4 + * 34 [PC13] LEDK1 + * ---- ----- --------- -------------------------------- + * 35 Y+ These go to the ADS7843 + * 36 Y- touchscreen controller. + * 37 X+ + * 38 X- + * 39 NC + * ---- ----- --------- -------------------------------- + * + * LCD backlight is made of 4 white chip LEDs in parallel, driven by an AAT3155 + * charge pump, MN4. The AAT3155 is controlled by the SAM3U4E through a single line + * Simple Serial Control (S2Cwire) interface, which permits to enable, disable, and + * set the LED drive current (LED brightness control) from a 32-level logarithmic + * scale. Four resistors R93/R94/R95/R96 are implemented for optional current + * limitation. + * + **************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "sam_gpio.h" +#include "sam_periphclks.h" +#include "chip/sam_pmc.h" +#include "chip/sam_smc.h" +#include "sam4e-ek.h" + +#ifdef CONFIG_LCD + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* SMC must be selected */ + +#if !defined(CONFIG_SAM34_SMC) +# error "CONFIG_SAM34_SMC is required" +#endif + +/* Check contrast selection */ + +#if !defined(CONFIG_LCD_MAXCONTRAST) +# define CONFIG_LCD_MAXCONTRAST 1 +#endif + +/* Check power setting */ + +#if !defined(CONFIG_LCD_MAXPOWER) +# define CONFIG_LCD_MAXPOWER 16 +#endif + +#if CONFIG_LCD_MAXPOWER < 16 +# error CONFIG_LCD_MAXPOWER should be >= 16 +# undef CONFIG_LCD_MAXPOWER +# define CONFIG_LCD_MAXPOWER 16 +#endif + +#if CONFIG_LCD_MAXPOWER > 255 +# error "CONFIG_LCD_MAXPOWER must be less than 256 to fit in uint8_t" +#endif + +/* Check orientation */ + +#if defined(CONFIG_LCD_PORTRAIT) +# if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) || defined(CONFIG_LCD_RPORTRAIT) +# error "Cannot define both portrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_RPORTRAIT) +# if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) +# error "Cannot define both rportrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_LANDSCAPE) +# ifdef CONFIG_LCD_RLANDSCAPE +# error "Cannot define both landscape and any other orientations" +# endif +#elif !defined(CONFIG_LCD_RLANDSCAPE) +# define CONFIG_LCD_LANDSCAPE 1 +#endif + +/* Background color */ + +#if !defined(CONFIG_SAM4EEK_LCD_BGCOLOR) +# define CONFIG_SAM4EEK_LCD_BGCOLOR 0 +#endif + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +# undef CONFIG_LCD_REGDEBUG +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* Display/Color Properties ***********************************************************/ +/* Display Resolution */ + +#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) +# define SAM_XRES 320 +# define SAM_YRES 240 +#else +# define SAM_XRES 240 +# define SAM_YRES 320 +#endif + +/* Color depth and format */ + +#if defined(CONFIG_SAM4EEK_LCD_RGB565) +# define SAM_BPP 16 +# define SAM_COLORFMT FB_FMT_RGB16_565 +#elif defined(CONFIG_SAM4EEK_LCD_RGB24) +# define SAM_BPP 24 +# define SAM_COLORFMT FB_FMT_RGB24 +#else /* if defined(CONFIG_SAM4EEK_LCD_RGB32) -- without ALPHA */ +# define SAM_BPP 32 +# define SAM_COLORFMT FB_FMT_RGB32 +#endif + +/* Color decoding macros */ + +#ifdef CONFIG_SAM4EEK_LCD_RGB565 +# define RGB_RED(rgb) (((rgb) >> 8) & 0xf8) +# define RGB_GREEN(rgb) (((rgb) >> 3) & 0xfc) +# define RGB_BLUE(rgb) (((rgb) << 3) & 0xf8) +#else /* RGB888 or RGB32 without ALPHA */ +# define RGB_RED(rgb) (((rgb) >> 16) & 0xff) +# define RGB_GREEN(rgb) (((rgb) >> 8) & 0xff) +# define RGB_BLUE(rgb) ( (rgb) & 0xff) +#endif + +/* SAM4E-EK LCD Hardware Definitions **************************************************/ +/* LCD /CS is CE4, Bank 3 of NOR/SRAM Bank 1~4 */ + +#define SAM_LCD_BASE ((uintptr_t)SAM_EXTCS1_BASE) +#define LCD_INDEX (*(volatile uint8_t *)(SAM_LCD_BASE)) +#define LCD_DATA (*(volatile uint8_t *)(SAM_LCD_BASE + 2)) + +/* LCD SMC chip select number to be set */ + +#define SAM_LCD_CS 1 + +/* Backlight */ + +#define BKL_LEVELS 16 +#define BKL_PULSE_DURATION 24 +#define BKL_ENABLE_DURATION (128*1024) +#define BKL_DISABLE_DURATION (128*1024) + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/************************************************************************************ + * Private Type Definition + ************************************************************************************/ + +/* Type definition for the correct size of one pixel (from the application standpoint). */ + +#ifdef CONFIG_SAM4EEK_LCD_RGB565 +typedef uint16_t sam_color_t; +#else /* RGB888 or RGB32 (without ALPHA) */ +typedef uint32_t sam_color_t; +#endif + +/* This structure describes the LCD registers */ + +struct lcd_regs_s +{ + volatile uint16_t index; + volatile uint16_t value; +}; + +/* This structure describes the state of this driver */ + +struct sam_dev_s +{ + /* Publicly visible device structure */ + + struct lcd_dev_s dev; + + /* Private LCD-specific information follows */ + + uint8_t power; /* Current power setting */ + bool output; /* True: Configured for output */ +}; + +/************************************************************************************ + * Private Function Prototypes + ************************************************************************************/ +/* Low Level LCD access */ + +static void sam_write_reg(uint8_t regaddr, uint16_t regval); +static uint16_t sam_read_reg(uint8_t regaddr); +static inline void sam_gram_prepare(void); +static inline void sam_gram_write(sam_color_t color); +static inline sam_color_t sam_gram_read(void); +static void sam_set_cursor(uint16_t col, uint16_t row); + +/* Backlight/power controls */ + +static void sam_disable_backlight(void); +static void sam_set_backlight(unsigned int power); +static int sam_poweroff(FAR struct sam_dev_s *priv); + +/* LCD Data Transfer Methods */ + +static int sam_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels); +static int sam_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels); + +/* LCD Configuration */ + +static int sam_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo); +static int sam_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo); + +/* LCD RGB Mapping */ + +#ifdef CONFIG_FB_CMAP +# error "RGB color mapping not supported by this driver" +#endif + +/* Cursor Controls */ + +#ifdef CONFIG_FB_HWCURSOR +# error "Cursor control not supported by this driver" +#endif + +/* LCD Specific Controls */ + +static int sam_getpower(struct lcd_dev_s *dev); +static int sam_setpower(struct lcd_dev_s *dev, int power); +static int sam_getcontrast(struct lcd_dev_s *dev); +static int sam_setcontrast(struct lcd_dev_s *dev, unsigned int contrast); + +/* Initialization */ + +static void sam_gpio_initialize(void); +static inline void sam_smc_initialize(void); +static void sam_lcd9325_initialize(void); +static inline int sam_lcd_initialize(void); + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* LCD GPIO configurations */ + +static const uint32_t g_lcdpin[] = +{ + GPIO_SMC_D0, GPIO_SMC_D1, GPIO_SMC_D2, GPIO_SMC_D3, /* D0-D3 */ + GPIO_SMC_D4, GPIO_SMC_D5, GPIO_SMC_D6, GPIO_SMC_D7, /* D4-D7 */ + GPIO_SMC_NRD, GPIO_SMC_NWE, GPIO_SMC_A1, GPIO_SMC_NCS1_2, /* RD, WR, RS, CS */ + GPIO_LCD_BKL /* Backlight control */ +}; + +#define LCD_NPINS (sizeof(g_lcdpin) / sizeof(uint32_t)) + +/* This is working memory allocated by the LCD driver for each LCD device + * and for each color plane. This memory will hold one raster line of data. + * The size of the allocated run buffer must therefore be at least + * (bpp * xres / 8). Actual alignment of the buffer must conform to the + * bitwidth of the underlying pixel type. + * + * If there are multiple planes, they may share the same working buffer + * because different planes will not be operate on concurrently. However, + * if there are multiple LCD devices, they must each have unique run buffers. + */ + +static uint16_t g_runbuffer[SAM_XRES]; + +/* This structure describes the overall LCD video controller */ + +static const struct fb_videoinfo_s g_videoinfo = +{ + .fmt = SAM_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */ + .xres = SAM_XRES, /* Horizontal resolution in pixel columns */ + .yres = SAM_YRES, /* Vertical resolution in pixel rows */ + .nplanes = 1, /* Number of color planes supported */ +}; + +/* This is the standard, NuttX Plane information object */ + +static const struct lcd_planeinfo_s g_planeinfo = +{ + .putrun = sam_putrun, /* Put a run into LCD memory */ + .getrun = sam_getrun, /* Get a run from LCD memory */ + .buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ + .bpp = SAM_BPP, /* Bits-per-pixel */ +}; + +/* This is the standard, NuttX LCD driver object */ + +static struct sam_dev_s g_lcddev = +{ + .dev = + { + /* LCD Configuration */ + + .getvideoinfo = sam_getvideoinfo, + .getplaneinfo = sam_getplaneinfo, + + /* LCD RGB Mapping -- Not supported */ + /* Cursor Controls -- Not supported */ + + /* LCD Specific Controls */ + + .getpower = sam_getpower, + .setpower = sam_setpower, + .getcontrast = sam_getcontrast, + .setcontrast = sam_setcontrast, + }, +}; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_write_reg + * + * Description: + * Write to an LCD register + * + ************************************************************************************/ + +static void sam_write_reg(uint8_t regaddr, uint16_t regval) +{ + LCD_INDEX = 0; + LCD_INDEX = regaddr; + + /* Write the 16-bit register value */ + + LCD_DATA = (uint8_t)(regval >> 8); + LCD_DATA = (uint8_t)(regval & 0xff); +} + +/************************************************************************************ + * Name: sam_read_reg + * + * Description: + * Read from an LCD register + * + ************************************************************************************/ + +static uint16_t sam_read_reg(uint8_t regaddr) +{ + uint16_t regval; + + LCD_INDEX = 0; + LCD_INDEX = regaddr; + + /* Read and return the 16-bit register contents */ + + regval = (uint16_t)LCD_DATA; + regval = (regval << 8) | (uint16_t)LCD_DATA; + + return regval; +} + +/************************************************************************************ + * Name: sam_gram_prepare + * + * Description: + * Setup to read or write multiple pixels to the GRAM memory + * + ************************************************************************************/ + +static inline void sam_gram_prepare(void) +{ + LCD_INDEX = 0; + LCD_INDEX = ILI9325_GRAM_DATA_REG; +} + +/************************************************************************************ + * Name: sam_gram_write + * + * Description: + * Write one pixel to the GRAM memory + * + ************************************************************************************/ + +static inline void sam_gram_write(sam_color_t color) +{ + LCD_DATA = RGB_RED(color); + LCD_DATA = RGB_GREEN(color); + LCD_DATA = RGB_BLUE(color); +} + +/************************************************************************************ + * Name: sam_gram_read + * + * Description: + * Read one 16-bit pixel to the GRAM memory + * + ************************************************************************************/ + +static inline sam_color_t sam_gram_read(void) +{ + uint8_t value[2]; + + value[0] = LCD_DATA; /* Dummy read */ + value[1] = LCD_DATA; /* Dummy read */ + value[0] = LCD_DATA; /* RGB565 data upper byte */ + value[1] = LCD_DATA; /* RGB565 data lower byte */ + + /* Convert and transfer the color to the user buffer */ + +#if defined(CONFIG_SAM4EEK_LCD_RGB565) + /* Return the raw RGB565 color */ + + return (sam_color_t)value[0] << 8 | (sam_color_t)value[1]; + +#else /* if defined(CONFIG_SAM4EEK_LCD_RGB24) || defined(CONFIG_SAM4EEK_LCD_RGB32) */ + /* RRRR RGGG GGGB BBBB -> 0000 0000 RRRR R000 GGGG GG00 BBBB B000 */ + + return ((value[0] & 0xf8)) | + ((value[0] & 0x07) << 13) | ((value[1] & 0xE0) << 5) | + ((value[1] & 0x1f) << 19); +#endif +} + +/************************************************************************************ + * Name: sam_set_cursor + * + * Description: + * Set the cursor position. In landscape mode, the "column" is actually the physical + * Y position and the "row" is the physical X position. + * + ************************************************************************************/ + +static void sam_set_cursor(uint16_t col, uint16_t row) +{ + sam_write_reg(ILI9325_HORIZONTAL_GRAM_ADDR_SET, row); + sam_write_reg(ILI9325_VERTICAL_GRAM_ADDR_SET, col); +} + +/************************************************************************************ + * Name: sam_dumprun + * + * Description: + * Dump the contexts of the run buffer: + * + * run - The buffer in containing the run read to be dumped + * npixels - The number of pixels to dump + * + ************************************************************************************/ + +#if 0 /* Sometimes useful */ +static void sam_dumprun(FAR const char *msg, FAR uint16_t *run, size_t npixels) +{ + int i, j; + + syslog(LOG_DEBUG, "\n%s:\n", msg); + for (i = 0; i < npixels; i += 16) + { + up_putc(' '); + syslog(LOG_DEBUG, " "); + for (j = 0; j < 16; j++) + { + syslog(LOG_DEBUG, " %04x", *run++); + } + up_putc('\n'); + } +} +#endif + +/************************************************************************************ + * Name: sam_disable_backlight + * + * Description: + * Turn the backlight off. + * + ************************************************************************************/ + +static void sam_disable_backlight(void) +{ + volatile int delay; + + sam_gpiowrite(GPIO_LCD_BKL, false); + for (delay = 0; delay < BKL_DISABLE_DURATION; delay++); +} + +/************************************************************************************ + * Name: sam_set_backlight + * + * Description: + * The the backlight to the level associated with the specified power value. + * + ************************************************************************************/ + +static void sam_set_backlight(unsigned int power) +{ + volatile int delay; + unsigned int level; + int i; + + /* Scale the power setting to the range 1...BKL_LEVELS */ + + DEBUGASSERT(power > 0 && power <= CONFIG_LCD_MAXPOWER); + level = (power * BKL_LEVELS) / CONFIG_LCD_MAXPOWER; + if (level < 1) + { + level = 1; + } + + level = BKL_LEVELS - level + 1; + + /* Set the new backlight level */ + + for (i = 0; i < level; i++) + { + /* Generate a pulse to the charge pump */ + + sam_gpiowrite(GPIO_LCD_BKL, false); + for (delay = 0; delay < BKL_PULSE_DURATION; delay++); + + sam_gpiowrite(GPIO_LCD_BKL, true); + for (delay = 0; delay < BKL_PULSE_DURATION; delay++); + } + + /* Lock in this level */ + + for (delay = 0; delay < BKL_ENABLE_DURATION; delay++); +} + +/************************************************************************************ + * Name: sam_poweroff + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + ************************************************************************************/ + +static int sam_poweroff(FAR struct sam_dev_s *priv) +{ + /* Turn the display off */ + + sam_write_reg(ILI9325_DISP_CTRL1, 0); + + /* Disable the backlight */ + + sam_disable_backlight(); + + /* Remember the power off state */ + + priv->power = 0; + return OK; +} + +/************************************************************************************ + * Name: sam_putrun + * + * Description: + * This method can be used to write a partial raster line to the LCD: + * + * row - Starting row to write to (range: 0 <= row < yres) + * col - Starting column to write to (range: 0 <= col <= xres-npixels) + * buffer - The buffer containing the run to be written to the LCD + * npixels - The number of pixels to write to the LCD + * (range: 0 < npixels <= xres-col) + * + ************************************************************************************/ + +static int sam_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels) +{ +#if defined(CONFIG_SAM4EEK_LCD_RGB565) + FAR const uint16_t *src = (FAR const uint16_t*)buffer; +#elif defined(CONFIG_SAM4EEK_LCD_RGB24) + FAR const uint8_t *src = (FAR const uint8_t*)buffer; +#elif defined(CONFIG_SAM4EEK_LCD_RGB32) + FAR const uint32_t *src = (FAR const uint32_t*)buffer; +#endif + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + /* Set the cursor position */ + + sam_set_cursor(col, row); + + /* Prepare to write GRAM data */ + + sam_gram_prepare(); + + /* Then transfer the pixels as 3 8-bit transfers, each providing 6 bits of the + * color component in the MS bits. + */ + +#if defined(CONFIG_SAM4EEK_LCD_RGB565) || defined(CONFIG_SAM4EEK_LCD_RGB32) + while (npixels--) + { + sam_color_t color = *src++; + LCD_DATA = RGB_RED(color); + LCD_DATA = RGB_GREEN(color); + LCD_DATA = RGB_BLUE(color); + } +#else /* defined(CONFIG_SAM4EEK_LCD_RGB24) */ + while (npixels--) + { + LCD_DATA = *src++; + LCD_DATA = *src++; + LCD_DATA = *src++; + } +#endif + + return OK; +} + +/************************************************************************************ + * Name: sam_getrun + * + * Description: + * This method can be used to read a partial raster line from the LCD: + * + * row - Starting row to read from (range: 0 <= row < yres) + * col - Starting column to read read (range: 0 <= col <= xres-npixels) + * buffer - The buffer in which to return the run read from the LCD + * npixels - The number of pixels to read from the LCD + * (range: 0 < npixels <= xres-col) + * + ************************************************************************************/ + +static int sam_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels) +{ + uint8_t value[2]; +#if defined(CONFIG_SAM4EEK_LCD_RGB24) + FAR uint8_t *ptr = (FAR uint8_t *)buffer; +#endif + /* Set the cursor position */ + + sam_set_cursor(col, row); + + /* Prepare to write GRAM data */ + + sam_gram_prepare(); + + /* Then transfer the pixels, reading RGB565 and converting this to the format + * expected by the caller. + */ + + while (npixels--) + { + /* Read the RGB565 colot */ + + value[0] = LCD_DATA; /* Dummy read */ + value[1] = LCD_DATA; /* Dummy read */ + value[0] = LCD_DATA; /* Data upper byte */ + value[1] = LCD_DATA; /* Data lower byte */ + + /* Convert and transfer the color to the user buffer */ + +#if defined(CONFIG_SAM4EEK_LCD_RGB565) + /* Return the raw RGB565 color */ + + *buffer++ = (sam_color_t)value[0] << 8 | (sam_color_t)value[1]; + +#elif defined(CONFIG_SAM4EEK_LCD_RGB24) + /* RRRR RGGG GGGB BBBB -> RRRR R000, GGGG GG00, BBBB B000 */ + + *ptr++ = (value[0] & 0xf8); + *ptr++ = (value[0] & 0x07) << 5) | ((value[1] & 0xe0) >> 3); + *ptr++ = (value[1] & 0x1f) << 3; + +#else /* if defined(CONFIG_SAM4EEK_LCD_RGB32) */ + /* RRRR RGGG GGGB BBBB -> 0000 0000 RRRR R000 GGGG GG00 BBBB B000 */ + + *buffer++ = ((value[0] & 0xf8)) | + ((value[0] & 0x07) << 13) | ((value[1] & 0xE0) << 5) | + ((value[1] & 0x1f) << 19); +#endif + } + + return OK; +} + +/************************************************************************************ + * Name: sam_getvideoinfo + * + * Description: + * Get information about the LCD video controller configuration. + * + ************************************************************************************/ + +static int sam_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo) +{ + DEBUGASSERT(dev && vinfo); + lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n", + g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes); + memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s)); + return OK; +} + +/************************************************************************************ + * Name: sam_getplaneinfo + * + * Description: + * Get information about the configuration of each LCD color plane. + * + ************************************************************************************/ + +static int sam_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo) +{ + DEBUGASSERT(dev && pinfo && planeno == 0); + lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp); + memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s)); + return OK; +} + +/************************************************************************************ + * Name: sam_getpower + * + * Description: + * Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + ************************************************************************************/ + +static int sam_getpower(struct lcd_dev_s *dev) +{ + FAR struct sam_dev_s *priv = (FAR struct sam_dev_s *)dev; + + lcdvdbg("power: %d\n", 0); + return priv->power; +} + +/************************************************************************************ + * Name: sam_setpower + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + ************************************************************************************/ + +static int sam_setpower(struct lcd_dev_s *dev, int power) +{ + FAR struct sam_dev_s *priv = (FAR struct sam_dev_s *)dev; + + lcdvdbg("power: %d\n", power); + DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER); + + /* Set new power level */ + + if (power > 0) + { + /* Then turn the display on */ + + sam_write_reg(ILI9325_DISP_CTRL1, + ILI9325_DISP_CTRL1_BASEE | ILI9325_DISP_CTRL1_GON | + ILI9325_DISP_CTRL1_DTE | ILI9325_DISP_CTRL1_D(3)); + + /* Set the backlight level */ + + sam_set_backlight((unsigned int)power); + up_mdelay(50); + priv->power = power; + } + else + { + /* Turn the display off */ + + sam_poweroff(priv); + } + + return OK; +} + +/************************************************************************************ + * Name: sam_getcontrast + * + * Description: + * Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST). + * + ************************************************************************************/ + +static int sam_getcontrast(struct lcd_dev_s *dev) +{ + lcdvdbg("Not implemented\n"); + return -ENOSYS; +} + +/************************************************************************************ + * Name: sam_setcontrast + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + ************************************************************************************/ + +static int sam_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) +{ + lcdvdbg("contrast: %d\n", contrast); + return -ENOSYS; +} + +/************************************************************************************ + * Name: sam_gpio_initialize + * + * Description: + * Configure LCD GPIO pins + * + ************************************************************************************/ + +static inline void sam_gpio_initialize(void) +{ + int i; + + /* Configure all LCD pins pins (backlight is initially off) */ + + for (i = 0; i < LCD_NPINS; i++) + { + sam_configgpio(g_lcdpin[i]); + } +} + +/************************************************************************************ + * Name: sam_smc_initialize + * + * Description: + * Configure LCD SMC interface + * + ************************************************************************************/ + +static inline void sam_smc_initialize(void) +{ + uintptr_t smcbase = SAM_SMCCS_BASE(SAM_LCD_CS); + uint32_t regval; + + /* Configure SMC interface for the LCD */ + + regval = SMCCS_SETUP_NWESETUP(2) | SMCCS_SETUP_NCSWRSETUP(2) | + SMCCS_SETUP_NRDSETUP(2) | SMCCS_SETUP_NCSRDSETUP(2); + putreg32(regval, smcbase + SAM_SMCCS_SETUP_OFFSET); + + regval = SMCCS_PULSE_NWEPULSE(4) | SMCCS_PULSE_NCSWRPULSE(4) | + SMCCS_PULSE_NRDPULSE(10) | SMCCS_PULSE_NCSRDPULSE(10); + putreg32(regval, smcbase + SAM_SMCCS_PULSE_OFFSET); + + regval = SMCCS_CYCLE_NWECYCLE(10) | SMCCS_CYCLE_NRDCYCLE(22); + putreg32(regval, smcbase + SAM_SMCCS_CYCLE_OFFSET); + +#ifdef SMCCS_MODE_DBW_8BITS /* SAM3U, SAM3X, SAM3A */ + regval = SMCCS_MODE_READMODE | SMCCS_MODE_WRITEMODE | SMCCS_MODE_DBW_8BITS; +#else + regval = SMCCS_MODE_READMODE | SMCCS_MODE_WRITEMODE; +#endif + putreg32(regval, smcbase + SAM_SMCCS_MODE_OFFSET); +} + +/************************************************************************************ + * Name: sam_lcd9325_initialize + * + * Description: + * Initialize the ILI9325 LCD. + * + ************************************************************************************/ + +static void sam_lcd9325_initialize(void) +{ + uint16_t regval; + + /* Turn off the LCD ***************************************************************/ + + sam_write_reg(ILI9325_DISP_CTRL1, + ILI9325_DISP_CTRL1_GON | ILI9325_DISP_CTRL1_DTE | + ILI9325_DISP_CTRL1_D(3)); + + /* Initial sequence ***************************************************************/ + /* Disable sleep and standby mode*/ + + sam_write_reg(ILI9325_POWER_CTRL1, 0); + + /* Start internal OSC */ + + sam_write_reg(ILI9325_START_OSC_CTRL, ILI9325_START_OSC_CTRL_EN); + + /* Set SS bit and direction output from S720 to S1 */ + + sam_write_reg(ILI9325_DRIVER_OUTPUT_CTRL1, ILI9325_DRIVER_OUTPUT_CTRL1_SS); + + /* Set 1 line inversion */ + + sam_write_reg(ILI9325_LCD_DRIVING_CTRL, + ILI9325_LCD_DRIVING_CTRL_BIT10 | ILI9325_LCD_DRIVING_CTRL_EOR | + ILI9325_LCD_DRIVING_CTRL_BC0); + + /* Disable resizing feature */ + + sam_write_reg(ILI9325_RESIZE_CTRL, 0); + + /* Set the back porch and front porch */ + + sam_write_reg(ILI9325_DISP_CTRL2, + ILI9325_DISP_CTRL2_BP(7) | ILI9325_DISP_CTRL2_FP(2)); + + /* Set non-display area refresh cycle ISC[3:0] */ + + sam_write_reg(ILI9325_DISP_CTRL3, 0); + + /* Disable FMARK function */ + + sam_write_reg(ILI9325_DISP_CTRL4, 0); + + /* 18-bit RGB interface and writing display data by the system interface */ + + sam_write_reg(ILI9325_RGB_DISP_INTERFACE_CTRL1, 0); + + /* Set the output position of frame cycle */ + + sam_write_reg(ILI9325_FRAME_MAKER_SHIFT, 0); + + /* RGB interface polarity */ + + sam_write_reg(ILI9325_RGB_DISP_INTERFACE_CTRL2, 0); + + /* Power on sequence **************************************************************/ + /* Disable sleep and standby mode */ + + sam_write_reg(ILI9325_POWER_CTRL1, 0); + + /* Select the operating frequency of the step-up circuit 1,2 and set the + * ratio factor of Vci + */ + + sam_write_reg(ILI9325_POWER_CTRL2, 0); + + /* Set VREG1OUT voltage */ + + sam_write_reg(ILI9325_POWER_CTRL3, 0); + + /* Set VCOM amplitude */ + + sam_write_reg(ILI9325_POWER_CTRL4, 0); + up_mdelay(200); + + /* Enable power supply and source driver ******************************************/ + /* Adjust the constant current and set the factor used in the step-up + * circuits. + */ + + sam_write_reg(ILI9325_POWER_CTRL1, + ILI9325_POWER_CTRL1_SAP | ILI9325_POWER_CTRL1_BT(2) | + ILI9325_POWER_CTRL1_APE | ILI9325_POWER_CTRL1_AP(1)); + + /* Select the operating frequency of the step-up circuit 1,2 and set the + * ratio factor of Vci + */ + + sam_write_reg(ILI9325_POWER_CTRL2, + ILI9325_POWER_CTRL2_DC1(2) | ILI9325_POWER_CTRL2_DC0(2) | + ILI9325_POWER_CTRL2_VC(7)); + up_mdelay(50); + + /* Internal reference voltage= Vci */ + + sam_write_reg(ILI9325_POWER_CTRL3, + ILI9325_POWER_CTRL3_PON | ILI9325_POWER_CTRL3_VRH(11)); + up_mdelay(50); + + /* Set VDV[4:0] for VCOM amplitude */ + + sam_write_reg(ILI9325_POWER_CTRL4, ILI9325_POWER_CTRL4_VDV(17)); + + /* Set VCM[5:0] for VCOMH */ + + sam_write_reg(ILI9325_POWER_CTRL7, ILI9325_POWER_CTRL7_VCM(25)); + + /* Set Frame Rate */ + + sam_write_reg(ILI9325_FRAME_RATE_AND_COLOR_CTRL, + ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS(13)); + up_mdelay(50); + + /* Adjust the Gamma Curve */ + + sam_write_reg(ILI9325_GAMMA_CTRL1, 9); + sam_write_reg(ILI9325_GAMMA_CTRL2, + ILI9325_GAMMA_CTRL2_KP3(2) | ILI9325_GAMMA_CTRL2_KP2(4)); + sam_write_reg(ILI9325_GAMMA_CTRL3, + ILI9325_GAMMA_CTRL3_KP5(2) | ILI9325_GAMMA_CTRL3_KP4(0)); + sam_write_reg(ILI9325_GAMMA_CTRL4, + ILI9325_GAMMA_CTRL4_RP1(0) | ILI9325_GAMMA_CTRL4_RP0(7)); + sam_write_reg(ILI9325_GAMMA_CTRL5, + ILI9325_GAMMA_CTRL5_VRP1(20) | ILI9325_GAMMA_CTRL5_VRP0(4)); + sam_write_reg(ILI9325_GAMMA_CTRL6, + ILI9325_GAMMA_CTRL6_KN1(7) | ILI9325_GAMMA_CTRL6_KN0(5)); + sam_write_reg(ILI9325_GAMMA_CTRL7, + ILI9325_GAMMA_CTRL7_KN3(3) | ILI9325_GAMMA_CTRL7_KN2(5)); + sam_write_reg(ILI9325_GAMMA_CTRL8, + ILI9325_GAMMA_CTRL8_KN5(7) | ILI9325_GAMMA_CTRL8_KN4(7)); + sam_write_reg(ILI9325_GAMMA_CTRL9, + ILI9325_GAMMA_CTRL9_RN1(7) | ILI9325_GAMMA_CTRL9_RN0(1)); + sam_write_reg(ILI9325_GAMMA_CTRL10, + ILI9325_GAMMA_CTRL10_VRN1(0) | ILI9325_GAMMA_CTRL10_VRN0(14)); + + /* Set the Entry Mode: + * + * AM controls the GRAM update direction. + * 0 = The address is updated in horizontal writing direction. + * 1 = The address is updated in vertical writing direction. + * + * I/D[1:0] controls the address counter (AC) to automatically increase or + * decrease by 1 when update one pixel display data. + * + * 00 = Horizontal decrement, Vertical decrement + * 01 = Horizontal increment, Vertical decrement + * 10 = Horizontal decrement, Vertical increment + * 11 = Horizontal increment, Vertical increment + * + * ORG moves the origin address according to the ID setting when a window address + * area is made. + * 0 = The origin address is not moved. + * 1 = The original address moves according to the I/D[1:0] setting. + * + * BGR swaps the R and B order of written data. + * 0 = Follow the RGB order to write the pixel data. + * 1 = Swap the RGB data to BGR in writing into GRAM. + * + * TRI = 1: Data are transferred to the internal RAM in 8-bit x 3 transfers mode + * via the 8-bit interface. + * + * DFM + TRI: Data is transferred as 3 byte transfers + * + * Use the high speed write mode (HWM=1). When TRI = 1, data are transferred to + * the internal RAM in 8-bit x 3 transfers mode via the 8-bit interface. DFM set + * the mode of transferring data to the internal RAM when TRI = 1. + * I/D[1:0] = 11 Horizontal : increment Vertical : increment, AM=0:Horizontal + */ + +#if defined(CONFIG_LCD_LANDSCAPE) + /* Landscape: Horizontal increment/ Vertical decrement, address is update in + * horizontal direction + */ + + regval = ILI9325_ENTRY_MODE_ID(1) | ILI9325_ENTRY_MODE_ORG | ILI9325_ENTRY_MODE_HWM | + ILI9325_ENTRY_MODE_BGR | ILI9325_ENTRY_MODE_TRI | ILI9325_ENTRY_MODE_DFM; + +#elif defined(CONFIG_LCD_RLANDSCAPE) + /* Landscape: Horizontal decrement/ Vertical increment, address is update in + * horizontal direction + */ + + regval = ILI9325_ENTRY_MODE_ID(2) | ILI9325_ENTRY_MODE_ORG | ILI9325_ENTRY_MODE_HWM | + ILI9325_ENTRY_MODE_BGR | ILI9325_ENTRY_MODE_TRI | ILI9325_ENTRY_MODE_DFM; + +#elif defined(CONFIG_LCD_PORTRAIT) + /* Landscape: Horizontal decrement/ Vertical decrement, address is update in + * vertical direction + */ + + regval = ILI9325_ENTRY_MODE_AM | ILI9325_ENTRY_MODE_ID(0) | ILI9325_ENTRY_MODE_ORG | + ILI9325_ENTRY_MODE_HWM | ILI9325_ENTRY_MODE_BGR | ILI9325_ENTRY_MODE_TRI | + ILI9325_ENTRY_MODE_DFM; + +#else /* if defined(CONFIG_LCD_RPORTRAIT) */ + /* Landscape: Horizontal increment/ Vertical increment, address is update in + * vertical direction + */ + + regval = ILI9325_ENTRY_MODE_AM | ILI9325_ENTRY_MODE_ID(3) | ILI9325_ENTRY_MODE_ORG | + ILI9325_ENTRY_MODE_HWM | ILI9325_ENTRY_MODE_BGR | ILI9325_ENTRY_MODE_TRI | + ILI9325_ENTRY_MODE_DFM; +#endif + + sam_write_reg(ILI9325_ENTRY_MODE, regval); + + /* Driver Output Control + * + * SS: Select the shift direction of outputs from the source driver + * 0 = The shift direction of outputs is from S1 to S720 + * 1 = The shift direction of outputs is from S720 to S1 + * SM: Sets the gate driver pin arrangement in combination with the GS bit + */ + +#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RPORTRAIT) + /* Horizontal increment */ + + regval = 0; + +#else /* defined(CONFIG_LCD_RLANDSCAPE) || defined(CONFIG_LCD_PORTRAIT) */ + /* Horizontal decrement */ + + regval = ILI9325_DRIVER_OUTPUT_CTRL1_SS; +#endif + + sam_write_reg(ILI9325_DRIVER_OUTPUT_CTRL1, regval); + + /* Set the number of lines to drive the LCD at an interval of 8 lines. The scan + * direction is from G320 to G1 + */ + + regval = ILI9325_DRIVER_OUTPUT_CTRL2_NL((SAM_XRES / 8) - 1); + +#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_PORTRAIT) + /* Vertical decrement */ + + regval |= ILI9325_DRIVER_OUTPUT_CTRL2_GS; +#endif + + sam_write_reg(ILI9325_DRIVER_OUTPUT_CTRL2, regval); + + /* Vertical Scrolling *************************************************************/ + /* Disable scrolling and enable the grayscale inversion */ + + sam_write_reg(ILI9325_BASE_IMG_DISP_CTRL, ILI9325_BASE_IMG_DISP_CTRL_REV); + sam_write_reg(ILI9325_VERTICAL_SCROLL_CTRL, 0); + + /* Disable Partial Display */ + + sam_write_reg(ILI9325_PARTIAL_IMG1_DISP_SHIFT, 0); + sam_write_reg(ILI9325_PARTIAL_IMG1_AREA_START_LINE, 0); + sam_write_reg(ILI9325_PARTIAL_IMG1_AREA_END_LINE, 0); + sam_write_reg(ILI9325_PARTIAL_IMG2_DISP_SHIFT, 0); + sam_write_reg(ILI9325_PARTIAL_IMG2_AREA_START_LINE, 0); + sam_write_reg(ILI9325_PARTIAL_IMG2_AREA_END_LINE, 0); + + /* Panel Control */ + + sam_write_reg(ILI9325_PANEL_INTERFACE_CTRL1, + ILI9325_PANEL_INTERFACE_CTRL1_RTNI(16)); + sam_write_reg(ILI9325_PANEL_INTERFACE_CTRL2, + ILI9325_PANEL_INTERFACE_CTRL2_NOWI(6)); + sam_write_reg(ILI9325_PANEL_INTERFACE_CTRL4, + ILI9325_PANEL_INTERFACE_CTRL4_DIVE(1) | + ILI9325_PANEL_INTERFACE_CTRL4_RTNE(16)); + + /* Set the drawing window */ + + sam_write_reg(ILI9325_HORIZONTAL_ADDR_START, 0); + sam_write_reg(ILI9325_HORIZONTAL_ADDR_END, SAM_XRES - 1); + sam_write_reg(ILI9325_VERTICAL_ADDR_START, 0); + sam_write_reg(ILI9325_VERTICAL_ADDR_END, SAM_YRES - 1); + + /* Home the cursor */ + + sam_set_cursor(0, 0); +} + +/************************************************************************************ + * Name: sam_lcd_initialize + * + * Description: + * Initialize the LCD panel + * + ************************************************************************************/ + +static inline int sam_lcd_initialize(void) +{ + uint16_t id; + + /* Check the LCD ID */ + + id = sam_read_reg(ILI9325_DEVICE_CODE_REG); + lcdvdbg("LCD ID: %04x\n", id); + + /* Initialize the LCD hardware */ + + if (id != ILI9325_DEVICE_CODE) + { + lcddbg("ERROR: Unsupported LCD: %04x\n", id); + return -ENODEV; + } + + sam_lcd9325_initialize(); + return OK; +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the + * power setting at 0 (full off). + * + ************************************************************************************/ + +int board_lcd_initialize(void) +{ + FAR struct sam_dev_s *priv = &g_lcddev; + int ret; + + lcdvdbg("Initializing\n"); + + /* Configure all LCD pins pins (backlight is initially off) */ + + sam_gpio_initialize(); + + /* Enable peripheral clock */ + + sam_smc_enableclk(); + + /* Configure SMC interface for the LCD */ + + sam_smc_initialize(); + + /* Identify and configure the LCD */ + + up_mdelay(50); + ret = sam_lcd_initialize(); + if (ret == OK) + { + /* Clear the display (setting it to the color 0=black) */ + + sam_lcdclear(CONFIG_SAM4EEK_LCD_BGCOLOR); + + /* Turn the display off */ + + sam_poweroff(priv); + } + + return ret; +} + +/************************************************************************************ + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows + * support for multiple LCD devices. + * + ************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return &g_lcddev.dev; +} + +/************************************************************************************ + * Name: board_lcd_uninitialize + * + * Description: + * Uninitialize the LCD support + * + ************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + FAR struct sam_dev_s *priv = &g_lcddev; + + /* Put the LCD in the lowest possible power state */ + + sam_poweroff(priv); +} + +/************************************************************************************ + * Name: sam_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the SAM4E-EK board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * display is cleared by simply setting all GRAM memory to the specified color. + * + ************************************************************************************/ + +#if defined(CONFIG_SAM4EEK_LCD_RGB565) +void sam_lcdclear(uint16_t color) +#else /* if defined(CONFIG_SAM4EEK_LCD_RGB24) defined(CONFIG_SAM4EEK_LCD_RGB32) */ +void sam_lcdclear(uint32_t color) +#endif +{ + uint8_t r = RGB_RED(color); + uint8_t g = RGB_GREEN(color); + uint8_t b = RGB_BLUE(color); + uint32_t i; + + sam_set_cursor(0, 0); + sam_gram_prepare(); + + for (i = SAM_XRES * SAM_YRES; i > 0; i--) + { + LCD_DATA = r; + LCD_DATA = g; + LCD_DATA = b; + } +} + +#endif /* CONFIG_LCD */ diff --git a/configs/sam4e-ek/src/sam_ili9341.c b/configs/sam4e-ek/src/sam_ili9341.c new file mode 100644 index 0000000000000000000000000000000000000000..4864e17c96d76e3d96900304e2006a67832f70c1 --- /dev/null +++ b/configs/sam4e-ek/src/sam_ili9341.c @@ -0,0 +1,1293 @@ +/************************************************************************************ + * configs/sam4e-ek/src/sam_ili9341.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * References: + * - This driver is a modification of the SAMA4E ILI9325 LCD driver. + * - ILI9341 Datasheet, Version: V1.11, ILI9341_DS_V1.11.pdf, ILI TECHNOLOGY CORP., + * - SAM4Ex Datasheet, Atmel + * - Atmel ILI93241 Sample code for the SAM4E + * + * Some the LCD and SMC initialization logic comes from Atmel sample code for the + * SAM4E. The Atmel sample code has a BSD-like license with an additional + * requirement that restricts the code from being used on anything but Atmel + * microprocessors. I do not believe that this file "derives" from the Atmel + * sample code nor do I believe that it contains anything but generally available + * ILI9341 and SAM4x logic. Credit, however, needs to go where it is due. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************** + * + * The SAM4E-EK carries a TFT transmissive LCD module with touch panel, FTM280C34D. + * Its integrated driver IC is ILI9341. The LCD display area is 2.8 inches diagonally + * measured, with a native resolution of 240 x 320 dots. + * + * The SAM4E16 communicates with the LCD through PIOC where an 8-bit parallel "8080- + * like" protocol data bus has to be implemented in software. + * + * ---- ----- --------- -------------------------------- + * PIN PIO SIGNAL NOTES + * ---- ----- --------- -------------------------------- + * 1 VDD + * 2 PC7 DB17 + * 3 PC6 DB16 + * 4 PC5 DB15 + * 5 PC4 DB14 + * 6 PC3 DB13 + * 7 PC2 DB12 + * 8 PC1 DB11 + * 9 PC0 DB10 + * 10 DB9 Pulled low + * 11 DB8 Pulled low + * 12 DB7 Pulled low + * 13 DB6 Pulled low + * 14 DB5 Pulled low + * 15 DB4 Pulled low + * 16 DB3 Pulled low + * 17 DB2 Pulled low + * 18 DB1 Pulled low + * 19 DB0 Pulled low + * ---- ----- --------- -------------------------------- + * 20 VDD + * 21 PC11 RD + * 22 PC8 WR + * 23 PC19 RS + * 24 PD18 CS Via J8, pulled high. + * 25 RESET Connects to NSRST + * 26 IM0 Pulled high + * 27 IM1 Grounded + * 28 GND + * ---- ----- --------- -------------------------------- + * 29 [PC13] LED-A Backlight controls: PC13 enables + * 30 [PC13] LEDK1 AAT3155 charge pump that drives + * 31 [PC13] LEDK2 the backlight LEDs + * 32 [PC13] LEDK3 + * 33 [PC13] LEDK4 + * 34 [PC13] LEDK1 + * ---- ----- --------- -------------------------------- + * 35 Y+ These go to the ADS7843 + * 36 Y- touchscreen controller. + * 37 X+ + * 38 X- + * 39 NC + * ---- ----- --------- -------------------------------- + * + * LCD backlight is made of 4 white chip LEDs in parallel, driven by an AAT3155 + * charge pump, MN4. The AAT3155 is controlled by the SAM3U4E through a single line + * Simple Serial Control (S2Cwire) interface, which permits to enable, disable, and + * set the LED drive current (LED brightness control) from a 32-level logarithmic + * scale. Four resistors R93/R94/R95/R96 are implemented for optional current + * limitation. + * + **************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "sam_gpio.h" +#include "sam_periphclks.h" +#include "chip/sam_pmc.h" +#include "chip/sam_smc.h" +#include "sam4e-ek.h" + +#ifdef CONFIG_LCD + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* SMC must be selected */ + +#if !defined(CONFIG_SAM34_SMC) +# error "CONFIG_SAM34_SMC is required" +#endif + +/* Check contrast selection */ + +#if !defined(CONFIG_LCD_MAXCONTRAST) +# define CONFIG_LCD_MAXCONTRAST 1 +#endif + +/* Check power setting */ + +#if !defined(CONFIG_LCD_MAXPOWER) +# define CONFIG_LCD_MAXPOWER 16 +#endif + +#if CONFIG_LCD_MAXPOWER < 16 +# error CONFIG_LCD_MAXPOWER should be >= 16 +# undef CONFIG_LCD_MAXPOWER +# define CONFIG_LCD_MAXPOWER 16 +#endif + +#if CONFIG_LCD_MAXPOWER > 255 +# error "CONFIG_LCD_MAXPOWER must be less than 256 to fit in uint8_t" +#endif + +/* Check orientation */ + +#if defined(CONFIG_LCD_LANDSCAPE) +# if defined(CONFIG_LCD_PORTRAIT) || defined(CONFIG_LCD_RPORTRAIT) || \ + defined(CONFIG_LCD_RLANDSCAPE) +# error "Cannot define both portrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_RLANDSCAPE) +# if defined(CONFIG_LCD_PORTRAIT) || defined(CONFIG_LCD_RPORTRAIT) +# error "Cannot define both rportrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_PORTRAIT) +# ifdef CONFIG_LCD_RPORTRAIT +# error "Cannot define both landscape and any other orientations" +# endif +#elif !defined(CONFIG_LCD_RPORTRAIT) +# define CONFIG_LCD_LANDSCAPE 1 +#endif + +/* Background color */ + +#if !defined(CONFIG_SAM4EEK_LCD_BGCOLOR) +# define CONFIG_SAM4EEK_LCD_BGCOLOR 0 +#endif + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +# undef CONFIG_LCD_REGDEBUG +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* Display/Color Properties ***********************************************************/ +/* Display Resolution */ + +#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) +# define SAM_XRES 320 +# define SAM_YRES 240 +#else +# define SAM_XRES 240 +# define SAM_YRES 320 +#endif + +/* Color depth and format */ + +#if defined(CONFIG_SAM4EEK_LCD_RGB565) +# define SAM_BPP 16 +# define SAM_COLORFMT FB_FMT_RGB16_565 +#elif defined(CONFIG_SAM4EEK_LCD_RGB24) +# define SAM_BPP 24 +# define SAM_COLORFMT FB_FMT_RGB24 +#else /* if defined(CONFIG_SAM4EEK_LCD_RGB32) -- without ALPHA */ +# define SAM_BPP 32 +# define SAM_COLORFMT FB_FMT_RGB32 +#endif + +/* Color decoding macros */ + +#ifdef CONFIG_SAM4EEK_LCD_RGB565 +# define RGB_RED(rgb) RGB16RED(rgb) +# define RGB_GREEN(rgb) RGB16GREEN(rgb) +# define RGB_BLUE(rgb) RGB16BLUE(rgb) +# define RGB_COLOR(r,g,b) RGBTO16(r,g,b) +#else /* RGB888 or RGB32 without ALPHA */ +# define RGB_RED(rgb) RGB24RED(rgb) +# define RGB_GREEN(rgb) RGB24GREEN(rgb) +# define RGB_BLUE(rgb) RGB24BLUE(rgb) +# define RGB_COLOR(r,g,b) RGBTO24(r,g,b) +#endif + +/* SAM4E-EK LCD Hardware Definitions **************************************************/ +/* LCD /CS is CE4, Bank 3 of NOR/SRAM Bank 1~4 */ + +#define SAM_LCD_BASE ((uintptr_t)SAM_EXTCS1_BASE) +#define LCD_INDEX (*(volatile uint8_t *)(SAM_LCD_BASE)) +#define LCD_DATA (*(volatile uint8_t *)(SAM_LCD_BASE + 2)) + +/* LCD SMC chip select number to be set */ + +#define SAM_LCD_CS 1 + +/* Backlight */ + +#define BKL_LEVELS 16 +#define BKL_PULSE_DURATION 24 +#define BKL_ENABLE_DURATION (128*1024) +#define BKL_DISABLE_DURATION (128*1024) + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/************************************************************************************ + * Private Type Definition + ************************************************************************************/ + +/* Type definition for the correct size of one pixel (from the application standpoint). */ + +#ifdef CONFIG_SAM4EEK_LCD_RGB565 +typedef uint16_t sam_color_t; +#else /* RGB888 or RGB32 (without ALPHA) */ +typedef uint32_t sam_color_t; +#endif + +/* This structure describes the LCD registers */ + +struct lcd_regs_s +{ + volatile uint16_t index; + volatile uint16_t value; +}; + +/* This structure describes the state of this driver */ + +struct sam_dev_s +{ + /* Publicly visible device structure */ + + struct lcd_dev_s dev; + + /* Private LCD-specific information follows */ + + uint8_t power; /* Current power setting */ + bool output; /* True: Configured for output */ +}; + +/************************************************************************************ + * Private Function Prototypes + ************************************************************************************/ +/* Low Level LCD access */ + +static void sam_putreg(uint8_t regaddr, FAR const uint8_t *buffer, unsigned int buflen); +static void sam_getreg(uint8_t regaddr, FAR uint8_t *buffer, unsigned int buflen); +static void sam_setwindow(sam_color_t row, sam_color_t col, + sam_color_t width, sam_color_t height); +static inline void sam_gram_wrprepare(void); +static inline void sam_gram_rdprepare(void); +static inline void sam_gram_write(sam_color_t color); +static inline sam_color_t sam_gram_read(void); + +/* Backlight/power controls */ + +static void sam_disable_backlight(void); +static void sam_set_backlight(unsigned int power); +static int sam_poweroff(FAR struct sam_dev_s *priv); + +/* LCD Data Transfer Methods */ + +static int sam_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels); +static int sam_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels); + +/* LCD Configuration */ + +static int sam_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo); +static int sam_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo); + +/* LCD RGB Mapping */ + +#ifdef CONFIG_FB_CMAP +# error "RGB color mapping not supported by this driver" +#endif + +/* Cursor Controls */ + +#ifdef CONFIG_FB_HWCURSOR +# error "Cursor control not supported by this driver" +#endif + +/* LCD Specific Controls */ + +static int sam_getpower(struct lcd_dev_s *dev); +static int sam_setpower(struct lcd_dev_s *dev, int power); +static int sam_getcontrast(struct lcd_dev_s *dev); +static int sam_setcontrast(struct lcd_dev_s *dev, unsigned int contrast); + +/* Initialization */ + +static void sam_gpio_initialize(void); +static inline void sam_smc_initialize(void); +static void sam_lcd9341_initialize(void); +static inline int sam_lcd_initialize(void); + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* LCD GPIO configurations */ + +static const uint32_t g_lcdpin[] = +{ + GPIO_SMC_D0, GPIO_SMC_D1, GPIO_SMC_D2, GPIO_SMC_D3, /* D0-D3 */ + GPIO_SMC_D4, GPIO_SMC_D5, GPIO_SMC_D6, GPIO_SMC_D7, /* D4-D7 */ + GPIO_SMC_NRD, GPIO_SMC_NWE, GPIO_SMC_A1, GPIO_SMC_NCS1_2, /* RD, WR, RS, CS */ + GPIO_LCD_BKL /* Backlight control */ +}; + +#define LCD_NPINS (sizeof(g_lcdpin) / sizeof(uint32_t)) + +/* This is working memory allocated by the LCD driver for each LCD device + * and for each color plane. This memory will hold one raster line of data. + * The size of the allocated run buffer must therefore be at least + * (bpp * xres / 8). Actual alignment of the buffer must conform to the + * bitwidth of the underlying pixel type. + * + * If there are multiple planes, they may share the same working buffer + * because different planes will not be operate on concurrently. However, + * if there are multiple LCD devices, they must each have unique run buffers. + */ + +static uint16_t g_runbuffer[SAM_XRES]; + +/* This structure describes the overall LCD video controller */ + +static const struct fb_videoinfo_s g_videoinfo = +{ + .fmt = SAM_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */ + .xres = SAM_XRES, /* Horizontal resolution in pixel columns */ + .yres = SAM_YRES, /* Vertical resolution in pixel rows */ + .nplanes = 1, /* Number of color planes supported */ +}; + +/* This is the standard, NuttX Plane information object */ + +static const struct lcd_planeinfo_s g_planeinfo = +{ + .putrun = sam_putrun, /* Put a run into LCD memory */ + .getrun = sam_getrun, /* Get a run from LCD memory */ + .buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ + .bpp = SAM_BPP, /* Bits-per-pixel */ +}; + +/* This is the standard, NuttX LCD driver object */ + +static struct sam_dev_s g_lcddev = +{ + .dev = + { + /* LCD Configuration */ + + .getvideoinfo = sam_getvideoinfo, + .getplaneinfo = sam_getplaneinfo, + + /* LCD RGB Mapping -- Not supported */ + /* Cursor Controls -- Not supported */ + + /* LCD Specific Controls */ + + .getpower = sam_getpower, + .setpower = sam_setpower, + .getcontrast = sam_getcontrast, + .setcontrast = sam_setcontrast, + }, +}; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_putreg + * + * Description: + * Write to a multi-byte ILI9341 register + * + ************************************************************************************/ + +static void sam_putreg(uint8_t regaddr, FAR const uint8_t *buffer, unsigned int buflen) +{ + LCD_INDEX = 0; + LCD_INDEX = regaddr; + + /* Write the multi-byte register value */ + + for (; buflen > 0; buflen--) + { + LCD_DATA = *buffer++; + } +} + +/************************************************************************************ + * Name: sam_getreg + * + * Description: + * Read from a multi-byte ILI9341 register + * + ************************************************************************************/ + +static void sam_getreg(uint8_t regaddr, FAR uint8_t *buffer, unsigned int buflen) +{ + LCD_INDEX = 0; + LCD_INDEX = regaddr; + + /* Read the multi-byte register value */ + + for (; buflen > 0; buflen--) + { + *buffer++ = LCD_DATA; + } +} + +/************************************************************************************ + * Name: sam_setwindow + * + * Description: + * Setup drawing window + * + ************************************************************************************/ + +static void sam_setwindow(sam_color_t row, sam_color_t col, + sam_color_t width, sam_color_t height) +{ + uint8_t buffer[4]; + + lcdvdbg("row=%d col=%d width=%d height=%d\n", row, col, width, height); + + /* Set Column Address Position */ + + buffer[0] = (col >> 8) & 0xff; + buffer[1] = col & 0xff; + buffer[2] = ((col + width - 1) >> 8) & 0xff; + buffer[3] = (col + width - 1) & 0xff; + sam_putreg(ILI9341_COLUMN_ADDRESS_SET, buffer, 4); + + /* Set Page Address Position */ + + buffer[0] = (row >> 8) & 0xff; + buffer[1] = row & 0xff; + buffer[2] = ((row + height - 1) >> 8) & 0xff; + buffer[3] = (row + height - 1) & 0xff; + sam_putreg(ILI9341_PAGE_ADDRESS_SET, buffer, 4); +} + +/************************************************************************************ + * Name: sam_gram_wrprepare + * + * Description: + * Setup to write multiple pixels to the GRAM memory + * + ************************************************************************************/ + +static inline void sam_gram_wrprepare(void) +{ + /* Memory write command */ + + LCD_INDEX = ILI9341_MEMORY_WRITE; + LCD_INDEX = 0; + LCD_INDEX = ILI9341_WRITE_MEMORY_CONTINUE; +} + +/************************************************************************************ + * Name: sam_gram_rdprepare + * + * Description: + * Setup to read multiple pixels from the GRAM memory + * + ************************************************************************************/ + +static inline void sam_gram_rdprepare(void) +{ + /* Write Data to GRAM */ + + LCD_INDEX = 0; + LCD_INDEX = ILI9341_MEMORY_READ; +} + +/************************************************************************************ + * Name: sam_gram_write + * + * Description: + * Write one pixel to the GRAM memory + * + ************************************************************************************/ + +static inline void sam_gram_write(sam_color_t color) +{ + LCD_DATA = RGB_RED(color); + LCD_DATA = RGB_GREEN(color); + LCD_DATA = RGB_BLUE(color); +} + +/************************************************************************************ + * Name: sam_gram_read + * + * Description: + * Read one 16-bit pixel to the GRAM memory + * + ************************************************************************************/ + +static inline sam_color_t sam_gram_read(void) +{ + uint8_t buffer[3]; + + buffer[0] = LCD_DATA; /* Dummy read */ + buffer[0] = LCD_DATA; /* R */ + buffer[1] = LCD_DATA; /* G */ + buffer[2] = LCD_DATA; /* B */ + + /* Return the converted color */ + + return RGB_COLOR((sam_color_t)buffer[0], (sam_color_t)buffer[1], + (sam_color_t)buffer[2]); +} + +/************************************************************************************ + * Name: sam_dumprun + * + * Description: + * Dump the contexts of the run buffer: + * + * run - The buffer in containing the run read to be dumped + * npixels - The number of pixels to dump + * + ************************************************************************************/ + +#if 0 /* Sometimes useful */ +static void sam_dumprun(FAR const char *msg, FAR uint16_t *run, size_t npixels) +{ + int i, j; + + syslog(LOG_DEBUG, "\n%s:\n", msg); + for (i = 0; i < npixels; i += 16) + { + up_putc(' '); + syslog(LOG_DEBUG, " "); + for (j = 0; j < 16; j++) + { + syslog(LOG_DEBUG, " %04x", *run++); + } + + up_putc('\n'); + } +} +#endif + +/************************************************************************************ + * Name: sam_disable_backlight + * + * Description: + * Turn the backlight off. + * + ************************************************************************************/ + +static void sam_disable_backlight(void) +{ + volatile int delay; + + sam_gpiowrite(GPIO_LCD_BKL, false); + for (delay = 0; delay < BKL_DISABLE_DURATION; delay++); +} + +/************************************************************************************ + * Name: sam_set_backlight + * + * Description: + * The the backlight to the level associated with the specified power value. + * + ************************************************************************************/ + +static void sam_set_backlight(unsigned int power) +{ + volatile int delay; + unsigned int level; + int i; + + lcdvdbg("power=%d\n", power); + + /* Scale the power setting to the range 1...BKL_LEVELS */ + + DEBUGASSERT(power > 0 && power <= CONFIG_LCD_MAXPOWER); + level = (power * BKL_LEVELS) / CONFIG_LCD_MAXPOWER; + if (level < 1) + { + level = 1; + } + + level = BKL_LEVELS - level + 1; + + /* Set the new backlight level */ + + for (i = 0; i < level; i++) + { + /* Generate a pulse to the charge pump */ + + sam_gpiowrite(GPIO_LCD_BKL, false); + for (delay = 0; delay < BKL_PULSE_DURATION; delay++); + + sam_gpiowrite(GPIO_LCD_BKL, true); + for (delay = 0; delay < BKL_PULSE_DURATION; delay++); + } + + /* Lock in this level */ + + for (delay = 0; delay < BKL_ENABLE_DURATION; delay++); +} + +/************************************************************************************ + * Name: sam_poweroff + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + ************************************************************************************/ + +static int sam_poweroff(FAR struct sam_dev_s *priv) +{ + lcdvdbg("OFF\n"); + + /* Turn the display off */ + + sam_putreg(ILI9341_DISPLAY_OFF, NULL, 0); + + /* Disable the backlight */ + + sam_disable_backlight(); + + /* Remember the power off state */ + + priv->power = 0; + return OK; +} + +/************************************************************************************ + * Name: sam_putrun + * + * Description: + * This method can be used to write a partial raster line to the LCD: + * + * row - Starting row to write to (range: 0 <= row < yres) + * col - Starting column to write to (range: 0 <= col <= xres-npixels) + * buffer - The buffer containing the run to be written to the LCD + * npixels - The number of pixels to write to the LCD + * (range: 0 < npixels <= xres-col) + * + ************************************************************************************/ + +static int sam_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels) +{ +#if defined(CONFIG_SAM4EEK_LCD_RGB565) + FAR const uint16_t *src = (FAR const uint16_t*)buffer; +#elif defined(CONFIG_SAM4EEK_LCD_RGB24) + FAR const uint8_t *src = (FAR const uint8_t*)buffer; +#elif defined(CONFIG_SAM4EEK_LCD_RGB32) + FAR const uint32_t *src = (FAR const uint32_t*)buffer; +#endif + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); + +#if defined(CONFIG_SAM4EEK_LCD_RGB565) + DEBUGASSERT(src && ((uintptr_t)src & 1) == 0); +#elif defined(CONFIG_SAM4EEK_LCD_RGB24) + DEBUGASSERT(src); +#elif defined(CONFIG_SAM4EEK_LCD_RGB32) + DEBUGASSERT(src && ((uintptr_t)src & 3) == 0); +#endif + + /* Determine the refresh window area */ + + sam_setwindow(row, col, npixels, 1); + + /* Prepare to write in GRAM */ + + sam_gram_wrprepare(); + + /* Write the run into GRAM memory */ + + while (npixels-- > 0) + { + sam_gram_write(*src++); + } + + /* Reset the refresh window area */ + + sam_setwindow(0, 0, SAM_XRES, SAM_YRES); + return OK; +} + +/************************************************************************************ + * Name: sam_getrun + * + * Description: + * This method can be used to read a partial raster line from the LCD: + * + * row - Starting row to read from (range: 0 <= row < yres) + * col - Starting column to read read (range: 0 <= col <= xres-npixels) + * buffer - The buffer in which to return the run read from the LCD + * npixels - The number of pixels to read from the LCD + * (range: 0 < npixels <= xres-col) + * + ************************************************************************************/ + +static int sam_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels) +{ +#if defined(CONFIG_SAM4EEK_LCD_RGB565) + FAR uint16_t *dest = (FAR uint16_t*)buffer; +#elif defined(CONFIG_SAM4EEK_LCD_RGB24) + FAR uint8_t *dest = (FAR uint8_t*)buffer; +#elif defined(dest) + FAR uint32_t *dest = (FAR uint32_t*)buffer; +#endif + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); + +#if defined(CONFIG_SAM4EEK_LCD_RGB565) + DEBUGASSERT(dest && ((uintptr_t)dest & 1) == 0); +#elif defined(CONFIG_SAM4EEK_LCD_RGB24) + DEBUGASSERT(dest); +#elif defined(CONFIG_SAM4EEK_LCD_RGB32) + DEBUGASSERT(dest && ((uintptr_t)dest & 3) == 0); +#endif + + /* Determine the refresh window area */ + + sam_setwindow(row, col, npixels, 1); + + /* Prepare to read GRAM data */ + + sam_gram_rdprepare(); + + /* Write the run into GRAM memory */ + + while (npixels-- > 0) + { + *dest++ = sam_gram_read(); + } + + /* Reset the refresh window area */ + + sam_setwindow(0, 0, SAM_XRES, SAM_YRES); + return OK; +} + +/************************************************************************************ + * Name: sam_getvideoinfo + * + * Description: + * Get information about the LCD video controller configuration. + * + ************************************************************************************/ + +static int sam_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo) +{ + DEBUGASSERT(dev && vinfo); + lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n", + g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes); + memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s)); + return OK; +} + +/************************************************************************************ + * Name: sam_getplaneinfo + * + * Description: + * Get information about the configuration of each LCD color plane. + * + ************************************************************************************/ + +static int sam_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo) +{ + DEBUGASSERT(dev && pinfo && planeno == 0); + lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp); + memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s)); + return OK; +} + +/************************************************************************************ + * Name: sam_getpower + * + * Description: + * Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + ************************************************************************************/ + +static int sam_getpower(struct lcd_dev_s *dev) +{ + FAR struct sam_dev_s *priv = (FAR struct sam_dev_s *)dev; + + lcdvdbg("power: %d\n", 0); + return priv->power; +} + +/************************************************************************************ + * Name: sam_setpower + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + ************************************************************************************/ + +static int sam_setpower(struct lcd_dev_s *dev, int power) +{ + FAR struct sam_dev_s *priv = (FAR struct sam_dev_s *)dev; + + lcdvdbg("power: %d\n", power); + DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER); + + /* Set new power level */ + + if (power > 0) + { + /* Then turn the display on */ + + sam_putreg(ILI9341_DISPLAY_ON, NULL, 0); + + /* Set the backlight level */ + + sam_set_backlight((unsigned int)power); + up_mdelay(50); + priv->power = power; + } + else + { + /* Turn the display off */ + + sam_poweroff(priv); + } + + return OK; +} + +/************************************************************************************ + * Name: sam_getcontrast + * + * Description: + * Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST). + * + ************************************************************************************/ + +static int sam_getcontrast(struct lcd_dev_s *dev) +{ + lcdvdbg("Not implemented\n"); + return -ENOSYS; +} + +/************************************************************************************ + * Name: sam_setcontrast + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + ************************************************************************************/ + +static int sam_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) +{ + lcdvdbg("contrast: %d\n", contrast); + return -ENOSYS; +} + +/************************************************************************************ + * Name: sam_gpio_initialize + * + * Description: + * Configure LCD GPIO pins + * + ************************************************************************************/ + +static inline void sam_gpio_initialize(void) +{ + int i; + + /* Configure all LCD pins pins (backlight is initially off) */ + + for (i = 0; i < LCD_NPINS; i++) + { + sam_configgpio(g_lcdpin[i]); + } +} + +/************************************************************************************ + * Name: sam_smc_initialize + * + * Description: + * Configure LCD SMC interface + * + ************************************************************************************/ + +static inline void sam_smc_initialize(void) +{ + uintptr_t smcbase = SAM_SMCCS_BASE(SAM_LCD_CS); + uint32_t regval; + + /* Configure SMC interface for the LCD */ + + regval = SMCCS_SETUP_NWESETUP(2) | SMCCS_SETUP_NCSWRSETUP(2) | + SMCCS_SETUP_NRDSETUP(2) | SMCCS_SETUP_NCSRDSETUP(2); + putreg32(regval, smcbase + SAM_SMCCS_SETUP_OFFSET); + + regval = SMCCS_PULSE_NWEPULSE(4) | SMCCS_PULSE_NCSWRPULSE(4) | + SMCCS_PULSE_NRDPULSE(10) | SMCCS_PULSE_NCSRDPULSE(10); + putreg32(regval, smcbase + SAM_SMCCS_PULSE_OFFSET); + + regval = SMCCS_CYCLE_NWECYCLE(10) | SMCCS_CYCLE_NRDCYCLE(22); + putreg32(regval, smcbase + SAM_SMCCS_CYCLE_OFFSET); + +#ifdef SMCCS_MODE_DBW_8BITS /* SAM3U, SAM3X, SAM3A */ + regval = SMCCS_MODE_READMODE | SMCCS_MODE_WRITEMODE | SMCCS_MODE_DBW_8BITS; +#else + regval = SMCCS_MODE_READMODE | SMCCS_MODE_WRITEMODE; +#endif + putreg32(regval, smcbase + SAM_SMCCS_MODE_OFFSET); +} + +/************************************************************************************ + * Name: sam_lcd9341_initialize + * + * Description: + * Initialize the ILI9341 LCD. + * + ************************************************************************************/ + +static void sam_lcd9341_initialize(void) +{ + uint8_t buffer[5]; + + /* Power control A configuration*/ + + buffer[0] = 0x39; + buffer[1] = 0x2C; + buffer[2] = 0x00; + buffer[3] = 0x34; + buffer[4] = 0x02; + sam_putreg(ILI9341_POWER_CONTROL_A, buffer, 5); + + /* Power control B configuration */ + + buffer[0] = 0x00; + buffer[1] = 0xaa; + buffer[2] = 0xb0; + sam_putreg(ILI9341_POWER_CONTROL_B, buffer, 3); + + /* Pump Ratio Control configuration */ + + buffer[0] = 0x30; + sam_putreg(ILI9341_PUMP_RATIO_CONTROL, buffer, 1); + + /* Power Control 1 configuration */ + + buffer[0] = 0x25; + sam_putreg(ILI9341_POWER_CONTROL_1, buffer, 1); + + /* Power Control 2 configuration */ + + buffer[0] = 0x11; + sam_putreg(ILI9341_POWER_CONTROL_2, buffer, 1); + + /* VOM Control 1 configuration */ + + buffer[0] = 0x5C; + buffer[1] = 0x4C; + sam_putreg(ILI9341_VCOM_CONTROL_1, buffer, 2); + + /* VOM control 2 configuration */ + + buffer[0] = 0x94; + sam_putreg(ILI9341_VCOM_CONTROL_2, buffer, 1); + + /* Driver Timing Control A configuration */ + + buffer[0] = 0x85; + buffer[1] = 0x01; + buffer[2] = 0x78; + sam_putreg(ILI9341_DRIVER_TIMING_CTL_A, buffer, 3); + + /* Driver Timing Control B configuration */ + + buffer[0] = 0x00; + buffer[1] = 0x00; + sam_putreg(ILI9341_DRIVER_TIMING_CTL_B, buffer, 2); + + /* Memory Access Control configuration */ + +#if defined(CONFIG_LCD_LANDSCAPE) + /* Horizontal refresh order (MH): 0 + * RGB/BGR order (BGR) : 1 + * Vertical refresh order (ML) : 0 + * Row/column exchange (MV) : 1 + * Column address order (MX) : 0 + * Row address order (MY) : 1 + */ + + buffer[0] = ILI9341_MEMORY_ACCESS_CONTROL_BGR | + ILI9341_MEMORY_ACCESS_CONTROL_MV; + +#elif defined(CONFIG_LCD_PORTRAIT) + /* Horizontal refresh order (MH): 0 + * RGB/BGR order (BGR) : 1 + * Vertical refresh order (ML) : 0 + * Row/column exchange (MV) : 0 + * Column address order (MX) : 0 + * Row address order (MY) : 0 + */ + + buffer[0] = ILI9341_MEMORY_ACCESS_CONTROL_BGR; + +#elif defined(CONFIG_LCD_RLANDSCAPE) + /* Horizontal refresh order (MH): 0 + * RGB/BGR order (BGR) : 1 + * Vertical refresh order (ML) : 0 + * Row/column exchange (MV) : 1 + * Column address order (MX) : 1 + * Row address order (MY) : 0 + */ + + buffer[0] = ILI9341_MEMORY_ACCESS_CONTROL_BGR | + ILI9341_MEMORY_ACCESS_CONTROL_MV | + ILI9341_MEMORY_ACCESS_CONTROL_MX; + +#elif defined(CONFIG_LCD_RPORTRAIT) + /* Horizontal refresh order (MH): 0 + * RGB/BGR order (BGR) : 1 + * Vertical refresh order (ML) : 0 + * Row/column exchange (MV) : 1 + * Column address order (MX) : 0 + * Row address order (MY) : 1 + */ + + buffer[0] = ILI9341_MEMORY_ACCESS_CONTROL_BGR | + ILI9341_MEMORY_ACCESS_CONTROL_MX | + ILI9341_MEMORY_ACCESS_CONTROL_MY; + +#endif + + sam_putreg(ILI9341_MEMORY_ACCESS_CONTROL, buffer, 1); + + /* Colmod Pixel Format Set configuration */ + + buffer[0] = 0x06; + sam_putreg(ILI9341_PIXEL_FORMAT_SET, buffer, 1); + + /* Display Function Control */ + + buffer[0] = 0x02; + buffer[1] = 0x82; + buffer[2] = 0x27; + buffer[3] = 0x00; + sam_putreg(ILI9341_DISPLAY_FUNCTION_CTL, buffer, 4); + + /* Set window area*/ + + sam_setwindow(0, 0, SAM_XRES, SAM_YRES); + + /* Leave sleep mode*/ + + sam_putreg(ILI9341_SLEEP_OUT, buffer, 0); + up_mdelay(10); + + /* Initial state: LCD off */ + + sam_putreg(ILI9341_DISPLAY_OFF, buffer, 0); +} + +/************************************************************************************ + * Name: sam_lcd_initialize + * + * Description: + * Initialize the LCD panel + * + ************************************************************************************/ + +static inline int sam_lcd_initialize(void) +{ + uint8_t buffer[4]; + uint16_t id; + + /* Check the LCD ID */ + + sam_getreg(ILI9341_READ_ID4, buffer, 4); + + id = ((uint16_t)buffer[2] << 8) | (uint16_t)buffer[3]; + if (id != ILI9341_DEVICE_CODE) + { + lcddbg("ERROR: Unsupported LCD: %04x\n", id); + return -ENODEV; + } + + sam_lcd9341_initialize(); + return OK; +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the + * power setting at 0 (full off). + * + ************************************************************************************/ + +int board_lcd_initialize(void) +{ + FAR struct sam_dev_s *priv = &g_lcddev; + int ret; + + lcdvdbg("Initializing\n"); + + /* Configure all LCD pins pins (backlight is initially off) */ + + sam_gpio_initialize(); + + /* Enable peripheral clock */ + + sam_smc_enableclk(); + + /* Configure SMC interface for the LCD */ + + sam_smc_initialize(); + + /* Identify and configure the LCD */ + + up_mdelay(50); + ret = sam_lcd_initialize(); + if (ret == OK) + { + /* Clear the display (setting it to the color 0=black) */ + + sam_lcdclear(CONFIG_SAM4EEK_LCD_BGCOLOR); + + /* Turn the display off */ + + sam_poweroff(priv); + } + + return ret; +} + +/************************************************************************************ + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows + * support for multiple LCD devices. + * + ************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return &g_lcddev.dev; +} + +/************************************************************************************ + * Name: board_lcd_uninitialize + * + * Description: + * Uninitialize the LCD support + * + ************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + FAR struct sam_dev_s *priv = &g_lcddev; + + /* Put the LCD in the lowest possible power state */ + + sam_poweroff(priv); +} + +/************************************************************************************ + * Name: sam_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the SAM4E-EK board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * display is cleared by simply setting all GRAM memory to the specified color. + * + ************************************************************************************/ + +#if defined(CONFIG_SAM4EEK_LCD_RGB565) +void sam_lcdclear(uint16_t color) +#else /* if defined(CONFIG_SAM4EEK_LCD_RGB24) defined(CONFIG_SAM4EEK_LCD_RGB32) */ +void sam_lcdclear(uint32_t color) +#endif +{ + unsigned long i; + + sam_setwindow(0, 0, SAM_XRES, SAM_YRES); + sam_gram_wrprepare(); + + for (i = SAM_XRES * SAM_YRES; i > 0; i--) + { + sam_gram_write(color); + } +} + +#endif /* CONFIG_LCD */ diff --git a/configs/sam4e-ek/src/sam_leds.c b/configs/sam4e-ek/src/sam_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..6f32ed2ae1b92328025f8f76e18e66bbc5365367 --- /dev/null +++ b/configs/sam4e-ek/src/sam_leds.c @@ -0,0 +1,216 @@ +/**************************************************************************** + * configs/sam4e-ek/src/sam_leds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "sam_gpio.h" +#include "sam4e-ek.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* The SAM4E-EK board has three, user-controllable LEDs labelled D2 (blue), + * D3 (amber), and D4 (green) on the board. Usage of these LEDs is defined + * in include/board.h and src/up_leds.c. They are encoded as follows: + * + * SYMBOL Meaning D3* D2 D4 + * ------------------- ----------------------- ------- ------- ------- + * LED_STARTED NuttX has been started OFF OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + * LED_IRQSENABLED Interrupts enabled OFF ON OFF + * LED_STACKCREATED Idle stack created OFF ON ON + * LED_INIRQ In an interrupt** N/C FLASH N/C + * LED_SIGNAL In a signal handler*** N/C N/C FLASH + * LED_ASSERTION An assertion failed FLASH N/C N/C + * LED_PANIC The system has crashed FLASH N/C N/C + * + * * If D2 and D4 are statically on, then NuttX probably failed to boot + * and these LEDs will give you some indication of where the failure was + * ** The normal state is D3=OFF, D4=ON and D2 faintly glowing. This faint + * glow is because of timer interrupts that result in the LED being + * illuminated on a small proportion of the time. + * *** D4 may also flicker normally if signals are processed. + */ + +#define LED_OFF 0 +#define LED_ON 1 +#define LED_NOCHANGE 2 +#define LED_MASK 3 + +#define D3_SHIFT 0 +#define D3_OFF (LED_OFF << D3_SHIFT) +#define D3_ON (LED_ON << D3_SHIFT) +#define D3_NOCHANGE (LED_NOCHANGE << D3_SHIFT) +#define D2_SHIFT 2 +#define D2_OFF (LED_OFF << D2_SHIFT) +#define D2_ON (LED_ON << D2_SHIFT) +#define D2_NOCHANGE (LED_NOCHANGE << D2_SHIFT) +#define D4_SHIFT 4 +#define D4_OFF (LED_OFF << D4_SHIFT) +#define D4_ON (LED_ON << D4_SHIFT) +#define D4_NOCHANGE (LED_NOCHANGE << D4_SHIFT) + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint8_t g_ledon[8] = +{ + (D3_OFF | D2_OFF | D4_OFF), /* LED_STARTED */ + (D3_ON | D2_OFF | D4_ON), /* LED_HEAPALLOCATE */ + (D3_OFF | D2_ON | D4_OFF), /* LED_IRQSENABLED */ + (D3_ON | D2_ON | D4_ON), /* LED_STACKCREATED */ + + (D3_NOCHANGE | D2_OFF | D4_NOCHANGE), /* LED_INIRQ */ + (D3_NOCHANGE | D2_NOCHANGE | D4_OFF), /* LED_SIGNAL */ + (D3_ON | D2_NOCHANGE | D4_NOCHANGE), /* LED_ASSERTION */ + (D3_ON | D2_NOCHANGE | D4_NOCHANGE) /* LED_PANIC */ +}; + +static const uint8_t g_ledoff[8] = +{ + (D3_OFF | D2_OFF | D4_OFF), /* LED_STARTED (does not happen) */ + (D3_ON | D2_OFF | D4_ON), /* LED_HEAPALLOCATE (does not happen) */ + (D3_OFF | D2_ON | D4_OFF), /* LED_IRQSENABLED (does not happen) */ + (D3_ON | D2_ON | D4_ON), /* LED_STACKCREATED (does not happen) */ + + (D3_NOCHANGE | D2_ON | D4_NOCHANGE), /* LED_INIRQ */ + (D3_NOCHANGE | D2_NOCHANGE | D4_ON), /* LED_SIGNAL */ + (D3_OFF | D2_NOCHANGE | D4_NOCHANGE), /* LED_ASSERTION */ + (D3_OFF | D2_NOCHANGE | D4_NOCHANGE) /* LED_PANIC */ +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_setled + ****************************************************************************/ + +static void sam_setled(gpio_pinset_t pinset, uint8_t state) +{ + /* Assume active high. Initial state == 0 means active high */ + + bool polarity = ((pinset & GPIO_OUTPUT_SET) == 0); + switch (state) + { + case LED_OFF: + polarity = !polarity; + + case LED_ON: + break; + + case LED_NOCHANGE: + default: + return; + } + + sam_gpiowrite(pinset, polarity); +} + +/**************************************************************************** + * Name: sam_setleds + ****************************************************************************/ + +static void sam_setleds(uint8_t state) +{ + sam_setled(GPIO_D3, (state >> D3_SHIFT) & LED_MASK); + sam_setled(GPIO_D2, (state >> D2_SHIFT) & LED_MASK); + sam_setled(GPIO_D4, (state >> D4_SHIFT) & LED_MASK); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + (void)sam_configgpio(GPIO_D3); + (void)sam_configgpio(GPIO_D2); + (void)sam_configgpio(GPIO_D4); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + sam_setleds(g_ledon[led & 7]); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + sam_setleds(g_ledoff[led & 7]); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/sam4e-ek/src/sam_spi.c b/configs/sam4e-ek/src/sam_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..01b38608280d906bdb9d6efcb4b944dc278d1913 --- /dev/null +++ b/configs/sam4e-ek/src/sam_spi.c @@ -0,0 +1,219 @@ +/************************************************************************************ + * configs/sam4e-ek/src/sam_spi.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "sam_gpio.h" +#include "sam_spi.h" +#include "sam4e-ek.h" + +#if defined(CONFIG_SAM34_SPI0) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the SAM4E-EK board. + * + ************************************************************************************/ + +void weak_function sam_spidev_initialize(void) +{ +#if defined(CONFIG_INPUT) && defined(CONFIG_INPUT_ADS7843E) + /* The touchscreen connects using NPCS0 (PA11). */ + + sam_configgpio(GPIO_TSC_CS); +#endif + +#if defined(CONFIG_MTD_AT25) + /* The AT25 Serial FLASH connects using NPCS3 (PA5). */ + + sam_configgpio(GPIO_FLASH_CS); +#endif +} + +/**************************************************************************** + * Name: sam_spi0select, sam_spi0status, and sam_spic0mddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * include: + * + * o sam_spi0select is a functions tomanage the board-specific chip selects + * o sam_spi0status and sam_spic0mddata: Implementations of the status + * and cmddata methods of the SPI interface defined by struct spi_ops_ + * (see include/nuttx/spi/spi.h). All other methods including + * sam_spibus_initialize()) are provided by common SAM3/4 logic. + * + * To use this common SPI logic on your board: + * + * 1. Provide logic in sam_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide sam_spi0select() and sam_spi0status() functions in your board- + * specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * sam_spic0mddata() functions in your board-specific logic. This + * function will perform cmd/data selection operations using GPIOs in + * the way your board is configured. + * 3. Add a call to sam_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by sam_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spi0select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * GPIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the GPIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +void sam_spi0select(enum spi_dev_e devid, bool selected) +{ + switch (devid) + { +#if defined(CONFIG_INPUT) && defined(CONFIG_INPUT_ADS7843E) + /* The touchscreen chip select is implemented as a GPIO OUTPUT that must + * be controlled by this function. This is because the ADS7843E driver + * must be able to sample the device BUSY GPIO input between SPI transfers. + * However, the AD7843E will tri-state the BUSY input whenever the chip + * select is de-asserted. So the only option is to control the chip select + * manually and hold it low throughout the SPI transfer. + */ + + case SPIDEV_TOUCHSCREEN: + sam_gpiowrite(GPIO_TSC_CS, !selected); + break; +#endif + +#if defined(CONFIG_MTD_AT25) + /* The AT25 Serial FLASH connects using NPCS3 (PA5). */ + + case SPIDEV_FLASH: + sam_gpiowrite(GPIO_FLASH_CS, !selected); + break; +#endif + + default: + break; + } +} + +/**************************************************************************** + * Name: sam_spi0status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} + +#endif /* CONFIG_SAM34_SPI0 || CONFIG_SAM34_SPI1 */ diff --git a/configs/sam4e-ek/src/sam_udp.c b/configs/sam4e-ek/src/sam_udp.c new file mode 100644 index 0000000000000000000000000000000000000000..8c271ba90ac93c8263f75be4cf7fa044e4fd7400 --- /dev/null +++ b/configs/sam4e-ek/src/sam_udp.c @@ -0,0 +1,87 @@ +/************************************************************************************ + * configs/sam4e-ek/src/sam_udp.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "sam4e-ek.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_udp_suspend + * + * Description: + * Board logic must provide the sam_udp_suspend logic if the UDP driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * + * When 'resume' is false, this function call provides an opportunity to perform + * board-specific power-saving actions so that less power is consumed while the + * USB is suspended. + * + * Certain power-saving operations are performed by the UDP driver when it enters + * suspend mode: The USB device peripheral clocks are be switched off. MCK and + * UDPCK are switched off and the USB transceiver is disabled. + * + * When 'resume' is true, normal clocking and operations must all be restored. + * + ************************************************************************************/ + +void sam_udp_suspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} diff --git a/configs/sam4e-ek/src/sam_usbmsc.c b/configs/sam4e-ek/src/sam_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..bf23302a0ea3ddc7fcfef0fc07d39c5e026d61dd --- /dev/null +++ b/configs/sam4e-ek/src/sam_usbmsc.c @@ -0,0 +1,121 @@ +/**************************************************************************** + * configs/sam4e-ek/src/sam_usbmsc.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the SAM3U MMC/SD SDIO block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam4e-ek.h" + +#ifdef CONFIG_SAM34_UDP + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/* SLOT number(s) depends on the board configuration */ + +#undef SAM_MMCSDSLOTNO +#define SAM_MMCSDSLOTNO 0 + +/* Can't use a block device if it is not available */ + +#ifndef HAVE_AT25 +# undef CONFIG_SAM4EEK_AT25_BLOCKDEVICE +#endif + +#ifndef HAVE_HSMCI +# undef CONFIG_SAM4EEK_HSMCI_BLOCKDEVICE +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* Initialize the AT25 MTD driver */ + +#if defined(CONFIG_SAM4EEK_AT25_BLOCKDEVICE) + int ret = sam_at25_automount(0); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_at25_automount failed: %d\n", ret); + } + + return ret; + +#elif defined(CONFIG_SAM4EEK_HSMCI_BLOCKDEVICE) + /* Initialize the HSMCI driver */ + + int ret = sam_hsmci_initialize(0); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_hsmci_initialize(0) failed: %d\n", ret); + } + + return ret; + +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_SAM34_UDP */ diff --git a/configs/sam4e-ek/tools/gdb.ini b/configs/sam4e-ek/tools/gdb.ini new file mode 100644 index 0000000000000000000000000000000000000000..594fcf8bc3ff2974fc2e1b2c253b8323ac46514b --- /dev/null +++ b/configs/sam4e-ek/tools/gdb.ini @@ -0,0 +1,7 @@ +target remote localhost:3333 +file nuttx +b os_start +mon at91sam4 gpnvm set 1 +load +mon reset init +continue diff --git a/configs/sam4e-ek/tools/openocd.cfg b/configs/sam4e-ek/tools/openocd.cfg new file mode 100644 index 0000000000000000000000000000000000000000..19d372eb59ce3087f3de98176eb6c1c5db19a16f --- /dev/null +++ b/configs/sam4e-ek/tools/openocd.cfg @@ -0,0 +1,64 @@ +# This is an SAM4E-EK board with a single SAM4E16 chip. +# http://www.atmel.com/tools/sam4e-ek.aspx +# +# Tested with OpenOCD 0.8.0 + +source [find interface/jlink.cfg] + +# chip name +set CHIPNAME SAM4E16E + +# Versions of OpenOCD after have atmel_sam4e_ek.cfg +# source [find board/atmel_sam4e_ek.cfg] +source [find target/at91sam4sXX.cfg] + +# SAM4E chip has only NRST signal +# SAM4E-EK board has only nSRST. nTRST is connected to +3V3 by pull-up. +reset_config srst_only + +$_TARGETNAME configure -event gdb-attach { +reset init +} + +$_TARGETNAME configure -event reset-init { +sam4e_pll_init +} + +$_TARGETNAME configure -event reset-start { +adapter_khz 500 +} + +$_TARGETNAME configure -event reset-end { +adapter_khz 10000 +flash probe 0 +} + +proc sam4e_pll_init {} { +# Same sequence from ASF/pmc.c + +mww 0x400E0A00 0x04000500 ;# FLASH 6 WS + +# Initialize main oscillator +mww 0x400E0420 0x00373E09 ;# CKGR_MOR +sleep 10 + +# Switch to 3-20MHz Xtal oscillator +mww 0x400E0420 0x01373E09 ;# CKGR_MOR +sleep 10 + +# Disable PLL first +mww 0x400E0428 0x20000000 ;# CKGR_PLLAR +sleep 10 + +# PLLA 240 MHz +mww 0x400E0428 0x20133F01 ;# CKGR_PLLAR +sleep 10 + +# PRES CLK_2, MAINCK -> MCK = 120 MHz +mww 0x400E0430 0x00000011 ;# PMC_MCKR +sleep 10 + +# PRES CLK_2, PLLACK +mww 0x400E0430 0x00000012 ;# PMC_MCKR +sleep 10 +} diff --git a/configs/sam4e-ek/usbnsh/Make.defs b/configs/sam4e-ek/usbnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..80e229163e17b3aa1838c18e2580b29f79565c54 --- /dev/null +++ b/configs/sam4e-ek/usbnsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/sam4e-ek/usbnsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/sam4e-ek/usbnsh/defconfig b/configs/sam4e-ek/usbnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..dce360c285018e13f2d80d38b101fecffaca812c --- /dev/null +++ b/configs/sam4e-ek/usbnsh/defconfig @@ -0,0 +1,1274 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +CONFIG_ARCH_CHIP_SAM34=y +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="sam34" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTNOR=y +CONFIG_ARCH_HAVE_EXTSRAM0=y +CONFIG_ARCH_HAVE_EXTSRAM1=y + +# +# AT91SAM3/4 Configuration Options +# +# CONFIG_ARCH_CHIP_ATSAM3U4E is not set +# CONFIG_ARCH_CHIP_ATSAM3U4C is not set +# CONFIG_ARCH_CHIP_ATSAM3U2E is not set +# CONFIG_ARCH_CHIP_ATSAM3U2C is not set +# CONFIG_ARCH_CHIP_ATSAM3U1E is not set +# CONFIG_ARCH_CHIP_ATSAM3U1C is not set +# CONFIG_ARCH_CHIP_ATSAM3X8E is not set +# CONFIG_ARCH_CHIP_ATSAM3X8C is not set +# CONFIG_ARCH_CHIP_ATSAM3X4E is not set +# CONFIG_ARCH_CHIP_ATSAM3X4C is not set +# CONFIG_ARCH_CHIP_ATSAM3A8C is not set +# CONFIG_ARCH_CHIP_ATSAM3A4C is not set +# CONFIG_ARCH_CHIP_ATSAM4CMP16B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4A is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32B is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16B is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S16C is not set +# CONFIG_ARCH_CHIP_ATSAM4S16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S8C is not set +# CONFIG_ARCH_CHIP_ATSAM4S8B is not set +CONFIG_ARCH_CHIP_ATSAM4E16E=y +# CONFIG_ARCH_CHIP_ATSAM4E16C is not set +# CONFIG_ARCH_CHIP_ATSAM4E8E is not set +# CONFIG_ARCH_CHIP_ATSAM4E8C is not set +# CONFIG_ARCH_CHIP_SAM3U is not set +# CONFIG_ARCH_CHIP_SAM3X is not set +# CONFIG_ARCH_CHIP_SAM3A is not set +# CONFIG_ARCH_CHIP_SAM4CM is not set +# CONFIG_ARCH_CHIP_SAM4L is not set +CONFIG_ARCH_CHIP_SAM4E=y +# CONFIG_ARCH_CHIP_SAM4S is not set + +# +# AT91SAM3/4 Peripheral Support +# +# CONFIG_SAM34_ACC is not set +# CONFIG_SAM34_AES is not set +# CONFIG_SAM34_AFEC0 is not set +# CONFIG_SAM34_AFEC1 is not set +# CONFIG_SAM34_CAN0 is not set +# CONFIG_SAM34_CAN1 is not set +# CONFIG_SAM34_CHIPID is not set +CONFIG_SAM34_CMCC=y +# CONFIG_SAM34_DACC is not set +# CONFIG_SAM34_EIC is not set +CONFIG_SAM34_DMAC0=y +# CONFIG_SAM34_DMAC1 is not set +CONFIG_SAM34_EMAC=y +# CONFIG_SAM34_HSMCI is not set +# CONFIG_SAM34_NAND is not set +# CONFIG_SAM34_PDCA is not set +# CONFIG_SAM34_PWM is not set +# CONFIG_SAM34_RTC is not set +# CONFIG_SAM34_RTT is not set +# CONFIG_SAM34_SMC is not set +CONFIG_SAM34_SPI0=y +# CONFIG_SAM34_TC0 is not set +# CONFIG_SAM34_TC1 is not set +# CONFIG_SAM34_TC2 is not set +# CONFIG_SAM34_TC3 is not set +# CONFIG_SAM34_TC4 is not set +# CONFIG_SAM34_TC5 is not set +# CONFIG_SAM34_TC6 is not set +# CONFIG_SAM34_TC7 is not set +# CONFIG_SAM34_TC8 is not set +# CONFIG_SAM34_TWI is not set +# CONFIG_SAM34_TWIM is not set +# CONFIG_SAM34_TWIS is not set +# CONFIG_SAM34_TWIM0 is not set +# CONFIG_SAM34_TWIS0 is not set +# CONFIG_SAM34_TWIM1 is not set +# CONFIG_SAM34_TWIS1 is not set +CONFIG_SAM34_UART0=y +# CONFIG_SAM34_UART1 is not set +CONFIG_SAM34_UDP=y +# CONFIG_SAM34_USART0 is not set +CONFIG_SAM34_USART1=y +# CONFIG_SAM34_WDT is not set + +# +# AT91SAM3/4 External Memory Configuration +# +# CONFIG_SAM34_EXTNAND is not set +# CONFIG_SAM34_EXTNOR is not set +# CONFIG_SAM34_EXTSRAM0 is not set +# CONFIG_SAM34_EXTSRAM1 is not set + +# +# AT91SAM3/4 GPIO Interrupt Configuration +# +CONFIG_SAM34_HAVE_GPIOD_IRQ=y +CONFIG_SAM34_HAVE_GPIOE_IRQ=y +CONFIG_SAM34_HAVE_GPIOF_IRQ=y +# CONFIG_SAM34_GPIO_IRQ is not set + +# +# AT91SAM3/4 SPI device driver options +# +CONFIG_SAM34_SPI_DMA=y +CONFIG_SAM34_SPI_DMATHRESHOLD=4 + +# +# AT91SAM3/4 EMAC device driver options +# +CONFIG_SAM34_EMAC_NRXBUFFERS=16 +CONFIG_SAM34_EMAC_NTXBUFFERS=8 +# CONFIG_SAM34_EMAC_PREALLOCATE is not set +# CONFIG_SAM34_EMAC_NBC is not set +CONFIG_SAM34_EMAC_PHYADDR=1 +# CONFIG_SAM34_EMAC_PHYINIT is not set +CONFIG_SAM34_EMAC_MII=y +# CONFIG_SAM34_EMAC_CLAUSE45 is not set +CONFIG_SAM34_EMAC_AUTONEG=y +CONFIG_SAM34_EMAC_PHYSR=30 +CONFIG_SAM34_EMAC_PHYSR_ALTCONFIG=y +CONFIG_SAM34_EMAC_PHYSR_ALTMODE=0x7 +CONFIG_SAM34_EMAC_PHYSR_10HD=0x1 +CONFIG_SAM34_EMAC_PHYSR_100HD=0x2 +CONFIG_SAM34_EMAC_PHYSR_10FD=0x5 +CONFIG_SAM34_EMAC_PHYSR_100FD=0x6 +CONFIG_SAM34_EMAC_ISETH0=y + +# +# AT91SAM3/4 USB Full Speed Device Controller driver (DCD) options +# +# CONFIG_SAM34_TC is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=11990 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=131072 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAM4EEK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sam4e-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_SAM4EEK_96MHZ is not set +CONFIG_SAM4EEK_120MHZ=y +CONFIG_SAM4EEK_AT25_BLOCKMOUNT=y +CONFIG_SAM4EEK_AT25_FTL=y +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=22 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +CONFIG_MTD_AT25=y +CONFIG_AT25_SPIMODE=0 +CONFIG_AT25_SPIFREQUENCY=20000000 +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +CONFIG_ARCH_PHY_INTERRUPT=y +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +CONFIG_ETH0_PHY_KSZ8051=y +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_UART0_SERIAL_CONSOLE is not set +# CONFIG_USART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +CONFIG_ARCH_USBDEV_STALLQUEUE=y +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=2 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=3 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=16 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_CHAR=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sam4e-ek/usbnsh/setenv.sh b/configs/sam4e-ek/usbnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..19f255a6c5c5fc202098e7b420fa29c3b1894a8d --- /dev/null +++ b/configs/sam4e-ek/usbnsh/setenv.sh @@ -0,0 +1,69 @@ +#!/bin/bash +# configs/sam4e-ek/usbnsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sam4l-xplained/Kconfig b/configs/sam4l-xplained/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..cf92c5238e1549adbaed11684916adc8033ad4fa --- /dev/null +++ b/configs/sam4l-xplained/Kconfig @@ -0,0 +1,65 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAM4L_XPLAINED + +menu "SAM4L Xplained Pro Modules" + +config SAM4L_XPLAINED_SLCD1MODULE + bool "SLCD1 Module" + default n + ---help--- + The SLCD 1 module is attached. This module provides a segment LCD + that connects directly to the "EXT5 SEGMENT LCD" connector. When + the SLCD is connected, EXT2 is not available for other modules. + +config SAM4L_XPLAINED_IOMODULE + bool "I/O1 Module" + default n + ---help--- + The I/O 1 module is attached. This module provides an MMC/SD card + slot. + +if SAM4L_XPLAINED_IOMODULE + +choice + prompt "I/O1 Module Location" + default SAM4L_XPLAINED_IOMODULE_EXT1 + +config SAM4L_XPLAINED_IOMODULE_EXT1 + bool "EXT1" + +config SAM4L_XPLAINED_IOMODULE_EXT2 + bool "EXT2" + depends on !SAM4L_XPLAINED_SLCD1MODULE + +endchoice +endif + +config SAM4L_XPLAINED_OLED1MODULE + bool "OLED1 Module" + default n + ---help--- + The OLED 1 module is attached. This module provides an OLED plus 3 + additional switches and 3 additional LEDs. + +if SAM4L_XPLAINED_OLED1MODULE + +choice + prompt "OLED1 Module Location" + default SAM4L_XPLAINED_OLED1MODULE_EXT1 + +config SAM4L_XPLAINED_OLED1MODULE_EXT1 + bool "EXT1" + +config SAM4L_XPLAINED_OLED1MODULE_EXT2 + bool "EXT2" + depends on !SAM4L_XPLAINED_SLCD1MODULE + +endchoice +endif + +endmenu +endif diff --git a/configs/sam4l-xplained/README.txt b/configs/sam4l-xplained/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..de3ef5a81c97711eff2f2e89a4a3494b7f113b80 --- /dev/null +++ b/configs/sam4l-xplained/README.txt @@ -0,0 +1,878 @@ +README +^^^^^^ + +This README discusses issues unique to NuttX configurations for the +Atmel SAM4L Xplained Pro development board. This board features the +ATSAM4LC4C MCU. + +The SAM4L Xplained Pro Starter Kit is bundled with four modules: + +1) I/O1 - An MMC/SD card slot, PWM LED control, ADC light sensor, UART + loopback, TWI AT30TSE758 Temperature sensor. +2) OLED1 - An OLED plus 3 additional switches and 3 additional LEDs +3) SLCD1 - A segment LCD that connects directly to the "EXT5 SEGMENT LCD" + connector +4) PROTO1 - A prototyping board with logic on board (other than power-related + logic). + +Contents +^^^^^^^^ + + - Modules + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - LEDs + - Serial Consoles + - SAM4L Xplained Pro-specific Configuration Options + - Configurations + +Modules +^^^^^^^ + The SAM4L Xplained Pro Starter Kit is bundled with four modules: + + I/O1 + ---- + The primary function of this module is to provide SD card support, but + the full list of modules features include: + + - microSD card connector (SPI interface) + - PWM (LED control) + - ADC (light sensor) + - UART loopback + - TWI AT30TSE758 Temperature sensor with EEPROM + + SPI is available on two of the SAM4L Xplained connectors, EXT1 and EXT2. + They mate with the I/O1 connector as indicated in this table. + + I/O1 Connector + -------------- + I/O1 EXT1 EXT2 Other use of either pin + ----------------- -------------------- -------------------- ------------------------------------ + 1 ID 1 1 + 2 GND 2 GND 2 + 3 LIGHTSENSOR 3 PA04 ADCIFE/AD0 3 PA07 ADCIFE/AD2 + 4 LP_OUT 4 PA05 ADCIFE/AD1 4 PB02 ADCIFE/AD3 + 5 GPIO1 5 PB12 GPIO 5 PC08 GPIO PB12 and PC8 on EXT5 + 6 GPIO2 6 PC02 GPIO 6 PB10 GPIO PB10 on EXT5 + 7 LED 7 PC00 TC/1/A0 7 PC04 TC/1/A2 + 8 LP_IN 8 PC01 TC/1/B0 8 PC05 TC/1/B2 PC05 on EXT5 + 9 TEMP_ALERT 9 PC25 EIC/EXTINT2 9 PC06 EIC/EXTINT8 PC25 on EXT5 + 10 microSD_DETECT 10 PB13 SPI/NPCS1 10 PC09 GPIO PB13 on EXT5 + 11 TWI SDA 11 PA23 TWIMS/0/TWD 11 PB14 TWIMS/3/TWD PB14 on EXT3&4, PA23 and PB14 on EXT5 + 12 TWI SCL 12 PA24 TWIMS/0/TWCK 12 PB15 TWIMS/3/TWCK PB15 on EXT3&4, PA24 and PB15 on EXT5 + 13 UART RX 13 PB00 USART/0/RXD 13 PC26 USART/1/RXD PB00 on EXT4, PC26 on EXT3&5 + 14 UART TX 14 PB01 USART/0/TXD 14 PC27 USART/1/TXD PB01 on EXT4, PC27 on EXT3&5 + 15 microSD_SS 15 PC03 SPI/NPCS0 15 PB11 SPI/NPCS2 PB11 on EXT5 + 16 SPI_MOSI 16 PA22 SPI/MOSI 16 PA22 SPI/MOSI PA22 on EXT5 + 17 SPI_MISO 17 PA21 SPI/MISO 17 PA21 SPI/MISO PA21 on EXT5 + 18 SPI_SCK 18 PC30 SPI/SCK 18 PC30 SPI/SCK PC30 on EXT5 + 19 GND 19 GND GND + 20 VCC 20 VCC VCC + + The mapping between the I/O1 pins and the SD connector are shown in the + following table. + + SD Card Connection + ------------------ + I/O1 SD PIN Description + ---- ---- --- ------------------------------------------------- + D2 1 Data line 2 (not used) + 15 D3 2 Data line 3. Active low chip select, pulled high + 16 CMD 3 Command line, connected to SPI_MOSI. + 20 VDD 4 + 18 CLK 5 Clock line, connected to SPI_SCK. + 2/19 GND 6 + 17 D0 7 Data line 0, connected to SPI_MISO. + D1 8 Data line 1 (not used) + 10 SW_A 9 Card detect + 2/19 SW_B 10 GND + + Card Detect + ----------- + When a microSD card is put into the connector SW_A and SW_B are short- + circuited. SW_A is connected to the microSD_DETECT signal. To use this + as a card indicator remember to enable internal pullup in the target + device. + + GPIOs + ----- + So all that is required to connect the SD is configure the SPI + + PIN EXT1 EXT2 Description + --- -------------- --------------- ------------------------------------- + 15 PC03 SPI/NPCS0 PB11 SPI/NPCS2 Active low chip select OUTPUT, pulled + high on board. + 10 PB13 SPI/NPCS1 10 PC09 GPIO Active low card detect INPUT, must + use internal pull-up. + + Configuration Options: + ---------------------- + CONFIG_SAM4L_XPLAINED_IOMODULE=y : Informs the system that the + I/O1 module is installed + CONFIG_SAM4L_XPLAINED_IOMODULE_EXT1=y : The module is installed in EXT1 + CONFIG_SAM4L_XPLAINED_IOMODULE_EXT2=y : The mdoule is installed in EXT2 + + See the set-up in the discussion of the nsh configuration below for other + required configuration options. + + NOTE: As of this writing, only the SD card slot is supported in the I/O1 + module. + + OLED1 + ----- + This module provides an OLED plus 3 additional switches and 3 additional + LEDs. + + OLED1 Connector + -------------- + OLED1 EXT1 EXT2 Other use of either pin + ----------------- -------------------- -------------------- ------------------------------------ + 1 ID 1 1 + 2 GND 2 GND 2 + 3 BUTTON2 3 PA04 ADCIFE/AD0 3 PA07 ADCIFE/AD2 + 4 BUTTON3 4 PA05 ADCIFE/AD1 4 PB02 ADCIFE/AD3 + 5 DATA_CMD_SEL 5 PB12 GPIO 5 PC08 GPIO PB12 and PC8 on EXT5 + 6 LED3 6 PC02 GPIO 6 PB10 GPIO PB10 on EXT5 + 7 LED1 7 PC00 TC/1/A0 7 PC04 TC/1/A2 + 8 LED2 8 PC01 TC/1/B0 8 PC05 TC/1/B2 PC05 on EXT5 + 9 BUTTON1 9 PC25 EIC/EXTINT2 9 PC06 EIC/EXTINT8 PC25 on EXT5 + 10 DISPLAY_RESET 10 PB13 SPI/NPCS1 10 PC09 GPIO PB13 on EXT5 + 11 N/C 11 PA23 TWIMS/0/TWD 11 PB14 TWIMS/3/TWD PB14 on EXT3&4, PA23 and PB14 on EXT5 + 12 N/C 12 PA24 TWIMS/0/TWCK 12 PB15 TWIMS/3/TWCK PB15 on EXT3&4, PA24 and PB15 on EXT5 + 13 N/C 13 PB00 USART/0/RXD 13 PC26 USART/1/RXD PB00 on EXT4, PC26 on EXT3&5 + 14 N/C 14 PB01 USART/0/TXD 14 PC27 USART/1/TXD PB01 on EXT4, PC27 on EXT3&5 + 15 DISPLAY_SS 15 PC03 SPI/NPCS0 15 PB11 SPI/NPCS2 PB11 on EXT5 + 16 SPI_MOSI 16 PA22 SPI/MOSI 16 PA22 SPI/MOSI PA22 on EXT5 + 17 N/C 17 PA21 SPI/MISO 17 PA21 SPI/MISO PA21 on EXT5 + 18 SPI_SCK 18 PC30 SPI/SCK 18 PC30 SPI/SCK PC30 on EXT5 + 19 GND 19 GND GND + 20 VCC 20 VCC VCC + + Configuration Options: + ---------------------- + CONFIG_SAM4L_XPLAINED_OLED1MODULE=y : Informs the system that the + I/O1 module is installed + CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT1=y : The module is installed in EXT1 + CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT2=y : The mdoule is installed in EXT2 + + See the set-up in the discussion of the nsh configuration below for other + required configuration options. + + SLCD1 + ----- + This module provides a A segment LCD that connects directly to the "EXT5 + SEGMENT LCD" connector + + Configuration Options: + ---------------------- + CONFIG_SAM4L_XPLAINED_SLCD1MODULE=y : Informs the system that the + I/O1 module is installed + + See the set-up in the discussion of the nsh configuration below for other + required configuration options. + + PROTO1 + ------ + A prototyping board with logic on board (other than power-related logic). + There is no built-in support for the PROTO1 module. + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, ok + 4. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. To use + the CodeSourcery, devkitARM or Raisonance GNU toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : Generic GCC ARM EABI toolchain for Windows + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also + have to modify the PATH in the setenv.h file if your make cannot find the tools. + + NOTE about Windows native toolchains + ------------------------------------ + + The CodeSourcery (for Windows), Atollic, and devkitARM toolchains are + Windows native toolchains. The CodeSourcery (for Linux), NuttX buildroot, + and, perhaps, the generic GCC toolchains are Cygwin and/or Linux native + toolchains. There are several limitations to using a Windows based + toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/sam34, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/sam34/sam_vectors.S. You may need to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh sam4l-xplained/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +^^^^ + There are three LEDs on board the SAM4L Xplained Pro board: The EDBG + controls two of the LEDs, a power LED and a status LED. There is only + one user controllable LED, a yellow LED labeled LED0 near the SAM4L USB + connector. + + This LED is controlled by PC07 and LED0 can be activated by driving the + PC07 to GND. + + When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + control LED0 as follows: + + SYMBOL Meaning LED0 + ------------------- ----------------------- ------ + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt N/C + LED_SIGNAL In a signal handler N/C + LED_ASSERTION An assertion failed N/C + LED_PANIC The system has crashed FLASH + + Thus is LED0 is statically on, NuttX has successfully booted and is, + apparently, running normmally. If LED0 is flashing at approximately + 2Hz, then a fatal error has been detected and the system has halted. + +Serial Consoles +^^^^^^^^^^^^^^^ + + USART0 + ------ + + USART0 is available on connectors EXT1 and EXT4 + + EXT1 EXT4 GPIO Function + ---- ---- ------ ----------- + 13 13 PB00 USART0_RXD + 14 14 PB01 USART0_TXD + 19 19 GND + 20 20 VCC + + If you have a TTL to RS-232 convertor then this is the most convenient + serial console to use. It is the default in all of these configurations. + An option is to use the virtual COM port. + + Virtual COM Port + ---------------- + + The SAM4L Xplained Pro contains an Embedded Debugger (EDBG) that can be + used to program and debug the ATSAM4LC4C using Serial Wire Debug (SWD). + The Embedded debugger also include a Virtual Com port interface over + USART1. Virtual COM port connections: + + PC26 USART1 RXD + PC27 USART1 TXD + +SAM4L Xplained Pro-specific Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="sam34" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_SAM34 + CONFIG_ARCH_CHIP_SAM4L + CONFIG_ARCH_CHIP_ATSAM4LC4C + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=sam4l-xplained (for the SAM4L Xplained Pro development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SAM4L_XPLAINED=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00008000 (32Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CPU + --- + CONFIG_SAM34_OCD + + HSB + --- + CONFIG_SAM34_APBA + CONFIG_SAM34_AESA + + PBA + --- + CONFIG_SAM34_IISC + CONFIG_SAM34_SPI0 + CONFIG_SAM34_TC0 + CONFIG_SAM34_TC1 + CONFIG_SAM34_TWIM0 + CONFIG_SAM34_TWIS0 + CONFIG_SAM34_TWIM1 + CONFIG_SAM34_TWIS1 + CONFIG_SAM34_USART0 + CONFIG_SAM34_USART1 + CONFIG_SAM34_USART2 + CONFIG_SAM34_USART3 + CONFIG_SAM34_ADC12B + CONFIG_SAM34_DACC + CONFIG_SAM34_ACC + CONFIG_SAM34_GLOC + CONFIG_SAM34_ABDACB + CONFIG_SAM34_TRNG + CONFIG_SAM34_PARC + CONFIG_SAM34_CATB + CONFIG_SAM34_TWIM2 + CONFIG_SAM34_TWIM3 + CONFIG_SAM34_LCDCA + + PBB + --- + CONFIG_SAM34_HRAMC1 + CONFIG_SAM34_HMATRIX + CONFIG_SAM34_PDCA + CONFIG_SAM34_CRCCU + CONFIG_SAM34_USBC + CONFIG_SAM34_PEVC + + PBC + --- + CONFIG_SAM34_CHIPID + CONFIG_SAM34_FREQM + + PBD + --- + CONFIG_SAM34_AST + CONFIG_SAM34_WDT + CONFIG_SAM34_EIC + CONFIG_SAM34_PICOUART + + Some subsystems can be configured to operate in different ways. The drivers + need to know how to configure the subsystem. + + CONFIG_SAM34_GPIOA_IRQ + CONFIG_SAM34_GPIOB_IRQ + CONFIG_SAM34_GPIOC_IRQ + CONFIG_USART0_ISUART + CONFIG_USART1_ISUART + CONFIG_USART2_ISUART + CONFIG_USART3_ISUART + + ST91SAM4L specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + +Configurations +^^^^^^^^^^^^^^ + + Each SAM4L Xplained Pro configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh sam4l-xplained/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that BUILDROOT_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTE: These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output of on USART0 which is available on EXT1 or EXT4 (see the + section "Serial Consoles" above). The virtual COM port could + be used, instead, by reconfiguring to use USART1 instead of + USART0: + + System Type -> AT91SAM3/4 Peripheral Support + CONFIG_SAM_USART0=y + CONFIG_SAM_USART1=n + + Device Drivers -> Serial Driver Support -> Serial Console + CONFIG_USART0_SERIAL_CONSOLE=y + + Device Drivers -> Serial Driver Support -> USART0 Configuration + CONFIG_USART0_2STOP=0 + CONFIG_USART0_BAUD=115200 + CONFIG_USART0_BITS=8 + CONFIG_USART0_PARITY=0 + CONFIG_USART0_RXBUFSIZE=256 + CONFIG_USART0_TXBUFSIZE=256 + + 3. Unless otherwise stated, the configurations are setup for + Linux (or any other POSIX environment like Cygwin under Windows): + + Build Setup: + CONFIG_HOST_LINUX=y : Linux or other POSIX environment + + 4. These configurations use the older, OABI, buildroot toolchain. But + that is easily reconfigured: + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot toolchain + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : Older, OABI toolchain + + If you want to use the Atmel GCC toolchain, here are the steps to + do so: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_HOST_CYGWIN=y : Using Cygwin or other POSIX environment + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : General GCC EABI toolchain under windows + + This re-configuration should be done before making NuttX or else the + subsequent 'make' will fail. If you have already attempted building + NuttX then you will have to 1) 'make distclean' to remove the old + configuration, 2) 'cd tools; ./configure.sh sam3u-ek/ksnh' to start + with a fresh configuration, and 3) perform the configuration changes + above. + + Also, make sure that your PATH variable has the new path to your + Atmel tools. Try 'which arm-none-eabi-gcc' to make sure that you + are selecting the right tool. setenv.sh is available for you to + use to set or PATH variable. The path in the that file may not, + however, be correct for your installation. + + See also the "NOTE about Windows native toolchains" in the section call + "GNU Toolchain Options" above. + +Configuration sub-directories +----------------------------- + + nsh: + This configuration directory will built the NuttShell. See NOTES above + and below: + + NOTES: + + 1. NOTE: If you get a compilation error like: + + libxx_new.cxx:74:40: error: 'operator new' takes type 'size_t' + ('unsigned int') as first parameter [-fper + + Sometimes NuttX and your toolchain will disagree on the underlying + type of size_t; sometimes it is an 'unsigned int' and sometimes it is + an 'unsigned long int'. If this error occurs, then you may need to + toggle the value of CONFIG_CXX_NEWLONG. + + 2. If the I/O1 module is connected to the SAM4L Xplained Pro, then + support for the SD card slot can be enabled by making the following + changes to the configuration: + + File Systems: + CONFIG_FS_FAT=y : Enable the FAT file system + CONFIG_FAT_LCNAMES=y : Enable upper/lower case 8.3 file names (Optional, see below) + CONFIG_FAT_LFN=y : Enable long file named (Optional, see below) + CONFIG_FAT_MAXFNAME=32 : Maximum supported file name length + + There are issues related to patents that Microsoft holds on FAT long + file name technologies. See the top level COPYING file for further + details. + + System Type -> Peripherals: + CONFIG_SAM34_SPI0=y : Enable the SAM4L SPI peripheral + + Device Drivers + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMCSD_NSLOTS=1 : Only one MMC/SD card slot + CONFIG_MMCSD_MULTIBLOCK_DISABLE=n : Should not need to disable multi-block transfers + CONFIG_MMCSD_HAVECARDDETECT=y : I/O1 module as a card detect GPIO + CONFIG_MMCSD_SPI=y : Use the SPI interface to the MMC/SD card + CONFIG_MMCSD_SPICLOCK=20000000 : This is a guess for the optimal MMC/SD frequency + CONFIG_MMCSD_SPIMODE=0 : Mode 0 is required + + Board Selection -> Common Board Options + CONFIG_NSH_MMCSDSLOTNO=0 : Only one MMC/SD slot, slot 0 + CONFIG_NSH_MMCSDSPIPORTNO=0 : Use CS=0 if the I/O1 is in EXT1, OR + CONFIG_NSH_MMCSDSPIPORTNO=2 : Use CS=2 if the I/O1 is in EXT2 + + Board Selection -> SAM4L Xplained Pro Modules + CONFIG_SAM4L_XPLAINED_IOMODULE=y : I/O1 module is connected + CONFIG_SAM4L_XPLAINED_IOMODULE_EXT1=y : In EXT1, or EXT2 + CONFIG_SAM4L_XPLAINED_IOMODULE_EXT2=y + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : Board has architecture-specific initialization + + NOTE: If you enable the I/O1 this configuration with USART0 as the + console and with the I/O1 module in EXT1, you *must* remove UART + jumper. Otherwise, you have lookpack on USART0 and NSH will *not* + behave very well (since its outgoing prompts also appear as incoming + commands). + + STATUS: As of 2013-6-18, this configuration appears completely + functional. Testing, however, has been very light. Example: + + NuttShell (NSH) NuttX-6.28 + nsh> mount -t vfat /dev/mmcsd0 /mnt/stuff + nsh> ls /mnt/stuff + /mnt/stuff: + nsh> echo "This is a test" >/mnt/stuff/atest.txt + nsh> ls /mnt/stuff + /mnt/stuff: + atest.txt + nsh> cat /mnt/stuff/atest.txt + This is a test + nsh> + + 3. If the OLED1 module is connected to the SAM4L Xplained Pro, then + support for the OLED display can be enabled by making the following + changes to the configuration: + + System Type -> Peripherals: + CONFIG_SAM34_SPI0=y : Enable the SAM4L SPI peripheral + + Device Drivers -> SPI + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + CONFIG_SPI_CMDDATA=y : CMD/DATA support is required + + Device Drivers -> LCDs + CONFIG_LCD=y : Enable LCD support + CONFIG_LCD_MAXCONTRAST=255 : Maximum contrast value + CONFIG_LCD_LANDSCAPE=y : Landscape orientation (see below*) + CONFIG_LCD_UG2832HSWEG04=y : Enable support for the OLED + CONFIG_LCD_SSD1306_SPIMODE=0 : SPI Mode 0 + CONFIG_LCD_SSD1306_SPIMODE=3500000 : Pick an SPI frequency + + Board Selection -> SAM4L Xplained Pro Modules + CONFIG_SAM4L_XPLAINED_OLED1MODULE=y : OLED1 module is connected + CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT1=y : In EXT1, or EXT2 + CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT2=y + + The NX graphics subsystem also needs to be configured: + + CONFIG_NX=y : Enable graphics support + CONFIG_NX_LCDDRIVER=y : Using an LCD driver + CONFIG_NX_NPLANES=1 : With a single color plane + CONFIG_NX_WRITEONLY=n : You can read from the LCD (see below**) + CONFIG_NX_DISABLE_2BPP=y : Disable all resolutions except 1BPP + CONFIG_NX_DISABLE_4BPP=y + CONFIG_NX_DISABLE_8BPP=y + CONFIG_NX_DISABLE_16BPP=y + CONFIG_NX_DISABLE_24BPP=y + CONFIG_NX_DISABLE_32BPP=y + CONFIG_NX_PACKEDMSFIRST=y : LSB packed first (shouldn't matter) + CONFIG_NXTK_BORDERWIDTH=2 : Use a small border + CONFIG_NXTK_DEFAULT_BORDERCOLORS=y : Default border colors + CONFIG_NXFONTS_CHARBITS=7 : 7-bit fonts + CONFIG_NXFONT_SANS17X23B=y : Pick a font (any that will fit) + + * This orientation will put the buttons "above" the LCD. The + reverse landscape configuration (CONFIG_LCD_RLANDSCAPE) will + "flip" the display so that the buttons are "below" the LCD. + + ** The hardware is write only, but the driver maintains a frame buffer + to support read and read-write-modiry operations on the LCD. + Reading from the frame buffer is, however, untested. + + Then, in order to use the OLED, you will need to build some kind of + graphics application or use one of the NuttX graphics examples. + Here, for example, is the setup for the graphic "Hello, World!" + example: + + CONFIG_EXAMPLES_NXHELLO=y : Enables the example + CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y : Use default colors (see below *) + CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y : Use the default font + CONFIG_EXAMPLES_NXHELLO_BPP=1 : One bit per pixel + CONFIG_EXAMPLES_NXHELLO_EXTERNINIT=y : Special initialization is required. + + * The OLED is monochrome so the only "colors" are blacka nd white. + The default "colors" will give you while text on a black background. + You can override the faults it you want black text on a while background. + + NOTE: One issue that I have seen with the NXHello example when + running as an NSH command is that it only works the first time. + So, after you run the 'nxhello' command one time, you will have to + reset the board before you run it again. + + This is clearly some issue with initializing, un-initializing, and + then re-initializing. If you want to fix this, patches are quite + welcome. + + 4. If the LCD1 module is connected to the SAM4L Xplained Pro, then + support for the SLCDt can be enabled by making the following + changes to the configuration: + + System Type -> AT91SAM3/4 Peripheral Support + CONFIG_SAM34_LCDCA=y + + System Type -> AT91SAM3/4 Clock Configuration + CONFIG_SAM34_OSC32K=y + + Board Selection -> Board-Specific Options -> SAM4L Xplained Pro Modules + CONFIG_SAM4L_XPLAINED_SLCD1MODULE=y + + Device Drivers + CONFIG_LCD=y + CONFIG_LCD_MAXCONTRAST=63 + + Library Routines -> Non-standard Library Support + CONFIG_LIB_SLCDCODEC=y + + The SLCD example can be enabled to verify the SLCD: + + Application Configuration -> Examples + CONFIG_EXAMPLES_SLCD=y + CONFIG_EXAMPLES_SLCD_DEVNAME="/dev/slcd" + CONFIG_EXAMPLES_SLCD_BUFSIZE=64 + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y + + NOTE: In order to use the segment LCD you *must* open the VLCD_A and + VLCD_BC jumpers or the SLD will not be powered! diff --git a/configs/sam4l-xplained/include/board.h b/configs/sam4l-xplained/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..f299f063ecdba9351663b583c5c9f15b7d7ca4c1 --- /dev/null +++ b/configs/sam4l-xplained/include/board.h @@ -0,0 +1,326 @@ +/************************************************************************************ + * configs/sam4l-xplained/include/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAM4L_XPLAINED_INCLUDE_BOARD_H +#define __CONFIGS_SAM4L_XPLAINED_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# ifdef CONFIG_SAM34_GPIO_IRQ +# include +# endif +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* Select the DFLL as the source of the system clock. + * + * Options (define one): + * BOARD_SYSCLK_SOURCE_RCSYS - System RC oscillator + * BOARD_SYSCLK_SOURCE_OSC0 - Oscillator 0 + * BOARD_SYSCLK_SOURCE_PLL0 - Phase Locked Loop 0 + * BOARD_SYSCLK_SOURCE_DFLL0 - Digital Frequency Locked Loop + * BOARD_SYSCLK_SOURCE_RC80M - 80 MHz RC oscillator + * BOARD_SYSCLK_SOURCE_FCFAST12M - 12 MHz RC oscillator + * BOARD_SYSCLK_SOURCE_FCFAST8M - 8 MHz RC oscillator + * BOARD_SYSCLK_SOURCE_FCFAST4M - 4 MHz RC oscillator + * BOARD_SYSCLK_SOURCE_RC1M - 1 MHz RC oscillator + */ + +#define BOARD_SYSCLK_SOURCE_DFLL0 1 + +/* Nominal frequencies in on-chip RC oscillators. These are *not* configurable + * but appear here for use in frequency calculations. NOTE: These may frequencies + * may vary with temperature changes. + */ + +#define BOARD_RCSYS_FREQUENCY 115000 /* Nominal frequency of RCSYS (Hz) */ +#define BOARD_RC32K_FREQUENCY 32768 /* Nominal frequency of RC32K (Hz) */ +#define BOARD_RC80M_FREQUENCY 80000000 /* Nominal frequency of RC80M (Hz) */ +#define BOARD_RCFAST4M_FREQUENCY 4000000 /* Nominal frequency of RCFAST4M (Hz) */ +#define BOARD_RCFAST8M_FREQUENCY 8000000 /* Nominal frequency of RCFAST8M (Hz) */ +#define BOARD_RCFAST12M_FREQUENCY 12000000 /* Nominal frequency of RCFAST12M (Hz) */ +#define BOARD_RC1M_FREQUENCY 1000000 /* Nominal frequency of RC1M (Hz) */ + +/* The SAM4L Xplained Pro has two on-board crystals: + * XC100 12MHz OSC0 + * XC101 32.768KHz OSC32 + */ + +/* OSC0 Configuration */ + +#define BOARD_OSC0_FREQUENCY 12000000 /* 12MHz XTAL */ + +/* OSC32 Configuration */ + +#define BOARD_OSC32_FREQUENCY 32768 /* 32.768KHz XTAL */ +#define BOARD_OSC32_STARTUP_US 6100 +#define BOARD_OSC32_SELCURR BSCIF_OSCCTRL32_SELCURR_300 +#define BOARD_OSC32_ISXTAL 1 /* OSC32 is a crystal */ + +/* Digital Frequency Locked Loop configuration + * Fdfll = (Fclk * DFLLmul) / DFLLdiv + * = 32768 * (48000000/32768) / 1 = 48MHz + * + * The actual frequency is 47.97MHz due to truncation of the multiplier. + * The 48MHz target value is treated as "not-to-exceed" value). Use OSC0 + * if you need more accuracy (12MHz with a multiplier of 4). + * + * DFLL0 source options (select one): + * BOARD_DFLL0_SOURCE_RCSYS - System RC oscillator + * BOARD_DFLL0_SOURCE_OSC32K - 32.768KHz oscillator + * BOARD_DFLL0_SOURCE_OSC0 - Oscillator 0 + * BOARD_DFLL0_SOURCE_RC80M - 80 MHz RC oscillator + * BOARD_DFLL0_SOURCE_RC32K - 32 kHz RC oscillator + * + * NOTE: Nothing must be defined if the DFPLL is not used + */ + +#define BOARD_DFLL0_SOURCE_OSC32K 1 +#define BOARD_DFLL0_TARGET 48000000 +#define BOARD_DFLL0_MUL (BOARD_DFLL0_TARGET / BOARD_OSC32_FREQUENCY) +#define BOARD_DFLL0_DIV 1 +#define BOARD_DFLL0_FREQUENCY (BOARD_OSC32_FREQUENCY * BOARD_DFLL0_MUL / BOARD_DFLL0_DIV) + +/* Phase Locked Loop configuration + * Fdfll = (Fclk * PLLmul) / PLLdiv + * + * PLL0 source options (select one): + * BOARD_PLL0_SOURCE_OSC0 - Oscillator 0 + * BOARD_PLL0_SOURCE_GCLK9 - General clock 9 + * + * BOARD_GLCK9_SOURCE_RCSYS - System RC oscillator + * BOARD_GLCK9_SOURCE_OSC32K - Output from OSC32K + * BOARD_GLCK9_SOURCE_DFLL0 - Output from DFLL0 + * BOARD_GLCK9_SOURCE_OSC0 - Output from Oscillator0 + * BOARD_GLCK9_SOURCE_RC80M - Output from 80MHz RCOSC + * BOARD_GLCK9_SOURCE_RCFAST - Output from 4,8,12MHz RCFAST + * BOARD_GLCK9_SOURCE_RC1M - Output from 1MHz RC1M + * BOARD_GLCK9_SOURCE_CPUCLK - The CPU clock + * BOARD_GLCK9_SOURCE_HSBCLK - High Speed Bus clock + * BOARD_GLCK9_SOURCE_PBACLK - Peripheral Bus A clock + * BOARD_GLCK9_SOURCE_PBBCLK - Peripheral Bus B clock + * BOARD_GLCK9_SOURCE_PBCCLK - Peripheral Bus C clock + * BOARD_GLCK9_SOURCE_PBDCLK - Peripheral Bus D clock + * BOARD_GLCK9_SOURCE_RC32K - Output from 32kHz RCOSC + * + * NOTE: Nothing must be defined if the PLL0 is not used + */ + +/* System clock dividers: Fbus = Fmck >> BUSshift */ + +#define BOARD_CPU_SHIFT 0 /* Fcpu = Fmck = 48MHz */ +#define BOARD_PBA_SHIFT 0 /* Fpba = Fmck = 48MHz */ +#define BOARD_PBB_SHIFT 0 /* Fpbb = Fmck = 48MHz */ +#define BOARD_PBC_SHIFT 0 /* Fpbc = Fmck = 48MHz */ +#define BOARD_PBD_SHIFT 0 /* Fpbd = Fmck = 48MHz */ + +/* Resulting frequencies */ + +#define BOARD_MCK_FREQUENCY (BOARD_DFLL0_FREQUENCY) +#define BOARD_CPU_FREQUENCY (BOARD_MCK_FREQUENCY >> BOARD_CPU_SHIFT) +#define BOARD_PBA_FREQUENCY (BOARD_MCK_FREQUENCY >> BOARD_PBA_SHIFT) +#define BOARD_PBB_FREQUENCY (BOARD_MCK_FREQUENCY >> BOARD_PBB_SHIFT) +#define BOARD_PBC_FREQUENCY (BOARD_MCK_FREQUENCY >> BOARD_PBC_SHIFT) +#define BOARD_PBD_FREQUENCY (BOARD_MCK_FREQUENCY >> BOARD_PBD_SHIFT) + +/* USBC. + * + * "The USBC has two bus clocks connected: One High Speed Bus clock + * (CLK_USBC_AHB) and one Peripheral Bus clock (CLK_USBC_APB). These clocks + * are generated by the Power Manager. Both clocks are enabled at reset + * and can be disabled by the Power Manager. It is recommended to disable + * the USBC before disabling the clocks, to avoid freezing the USBC in + * an undefined state. + * + * "To follow the usb data rate at 12Mbit/s in full-speed mode, the + * CLK_USBC_AHB clock should be at minimum 12MHz. + * + * "The 48MHz USB clock is generated by a dedicated generic clock from + * the SCIF module. Before using the USB, the user must ensure that the + * USB generic clock (GCLK_USBC) is enabled at 48MHz in the SCIF module." + * + * USB Generic Clock 7 (GCLK_USBC) source selection (one only) + * + * BOARD_USBC_SRC_OSC0 + * BOARD_USBC_SRC_PLL0 + * BOARD_USBC_SRC_DFLL + * BOARD_USBC_SRC_GCLKIN0 + */ + +#define BOARD_USBC_SRC_DFLL 1 /* Source DFLL0 at 48MHz */ +#define BOARD_USBC_GCLK_DIV 1 /* Fusb = Fdfll / 1 = 48MHz */ + +/* LED definitions ******************************************************************/ +/* There are three LEDs on board the SAM4L Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labelled LED0 near the SAM4L USB + * connector. + * + * This LED is controlled by PC07 and LED0 can be activated by driving the + * PC07 to GND. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED0 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED0_BIT (1 << BOARD_LED0) + +/* When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control LED0 as defined below. Thus if LED0 is statically on, NuttX has + * successfully booted and is, apparently, running normally. If LED0 is + * flashing at approximately 2Hz, then a fatal error has been detected and the + * system has halted. + */ + +#define LED_STARTED 0 /* LED0=OFF */ +#define LED_HEAPALLOCATE 0 /* LED0=OFF */ +#define LED_IRQSENABLED 0 /* LED0=OFF */ +#define LED_STACKCREATED 1 /* LED0=ON */ +#define LED_INIRQ 2 /* LED0=no change */ +#define LED_SIGNAL 2 /* LED0=no change */ +#define LED_ASSERTION 2 /* LED0=no change */ +#define LED_PANIC 3 /* LED0=flashing */ + +/* Button definitions ***************************************************************/ +/* QTouch button: The SAM4L Xplained Pro kit has one QTouch button. The connection + * to the SAM4L is: + * + * PC13 CATB_SENSE15 + * PC14 CATB_DIS + */ + +/* Mechanical buttons: + * + * The SAM4L Xplained Pro contains two mechanical buttons. One button is the + * RESET button connected to the SAM4L reset line and the other is a generic user + * configurable button. When a button is pressed it will drive the I/O line to GND. + * + * PC24 SW0 + */ + +/* The SAM4l Xplained Pro supports one button: */ + +#define BUTTON_SW0 0 +#define NUM_BUTTONS 1 + +#define BUTTON_SW0_BIT (1 << BUTTON_SW0) + +/* Alternate Function Disambiguation ************************************************/ +/* USART0 is also available on connectors EXT1 and EXT4: + * + * EXT1 TXT4 GPIO Function + * ---- ---- ------ ----------- + * 13 13 PB00 USART0_RXD + * 14 14 PB01 USART0_TXD + */ + +#define GPIO_USART0_RXD GPIO_USART0_RXD_4 +#define GPIO_USART0_TXD GPIO_USART0_TXD_4 + +/* The SAM4L Xplained Pro contains an Embedded Debugger (EDBG) that can be used to + * program and debug the ATSAM4LC4C using Serial Wire Debug (SWD). The Embedded + * debugger also include a Virtual Com port interface over USART1. Virtual COM + * port connections: + * + * PC26 USART1 RXD + * PC27 USART1 TXD + */ + +#define GPIO_USART1_RXD GPIO_USART1_RXD_2 +#define GPIO_USART1_TXD GPIO_USART1_TXD_2 + +/* SPI pins are brought out on EXT1 and EXT2 as: + * + * PA22 SPI/MOSI + * PA21 SPI/MISO + * PC30 SPI/SCK + */ + +#define GPIO_SPI0_MISO GPIO_SPI0_MISO_1 +#define GPIO_SPI0_MOSI GPIO_SPI0_MOSI_1 +#define GPIO_SPI0_SPCK GPIO_SPI0_SPCK_4 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAM4L_XPLAINED_INCLUDE_BOARD_H */ diff --git a/configs/sam4l-xplained/nsh/Make.defs b/configs/sam4l-xplained/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..3459a329b7e2471e4509cc4fd253fe8602202048 --- /dev/null +++ b/configs/sam4l-xplained/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/sam4l-xplained/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/sam4l-xplained/nsh/defconfig b/configs/sam4l-xplained/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..2668c210120263d6553d7f4c93a121aeb144e4e7 --- /dev/null +++ b/configs/sam4l-xplained/nsh/defconfig @@ -0,0 +1,927 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +CONFIG_ARCH_CHIP_SAM34=y +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="sam34" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# AT91SAM3/4 Configuration Options +# +# CONFIG_ARCH_CHIP_ATSAM3U4E is not set +# CONFIG_ARCH_CHIP_ATSAM3U4C is not set +# CONFIG_ARCH_CHIP_ATSAM3U2E is not set +# CONFIG_ARCH_CHIP_ATSAM3U2C is not set +# CONFIG_ARCH_CHIP_ATSAM3U1E is not set +# CONFIG_ARCH_CHIP_ATSAM3U1C is not set +# CONFIG_ARCH_CHIP_ATSAM3X8E is not set +# CONFIG_ARCH_CHIP_ATSAM3X8C is not set +# CONFIG_ARCH_CHIP_ATSAM3X4E is not set +# CONFIG_ARCH_CHIP_ATSAM3X4C is not set +# CONFIG_ARCH_CHIP_ATSAM3A8C is not set +# CONFIG_ARCH_CHIP_ATSAM3A4C is not set +# CONFIG_ARCH_CHIP_ATSAM4CMP16B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2A is not set +CONFIG_ARCH_CHIP_ATSAM4LC4C=y +# CONFIG_ARCH_CHIP_ATSAM4LC4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4A is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32B is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16B is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S16C is not set +# CONFIG_ARCH_CHIP_ATSAM4S16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S8C is not set +# CONFIG_ARCH_CHIP_ATSAM4S8B is not set +# CONFIG_ARCH_CHIP_ATSAM4E16E is not set +# CONFIG_ARCH_CHIP_ATSAM4E16C is not set +# CONFIG_ARCH_CHIP_ATSAM4E8E is not set +# CONFIG_ARCH_CHIP_ATSAM4E8C is not set +# CONFIG_ARCH_CHIP_SAM3U is not set +# CONFIG_ARCH_CHIP_SAM3X is not set +# CONFIG_ARCH_CHIP_SAM3A is not set +# CONFIG_ARCH_CHIP_SAM4CM is not set +CONFIG_ARCH_CHIP_SAM4L=y +# CONFIG_ARCH_CHIP_SAM4E is not set +# CONFIG_ARCH_CHIP_SAM4S is not set + +# +# AT91SAM3/4 Peripheral Support +# +# CONFIG_SAM34_ABDACB is not set +# CONFIG_SAM34_ACC is not set +# CONFIG_SAM34_ADC12B is not set +# CONFIG_SAM34_AESA is not set +# CONFIG_SAM34_APBA is not set +# CONFIG_SAM34_AST is not set +# CONFIG_SAM34_CATB is not set +# CONFIG_SAM34_CHIPID is not set +# CONFIG_SAM34_CRCCU is not set +# CONFIG_SAM34_DACC is not set +# CONFIG_SAM34_EIC is not set +# CONFIG_SAM34_DMAC1 is not set +# CONFIG_SAM34_FREQM is not set +# CONFIG_SAM34_GLOC is not set +# CONFIG_SAM34_HMATRIX is not set +# CONFIG_SAM34_HRAMC1 is not set +# CONFIG_SAM34_IISC is not set +# CONFIG_SAM34_LCDCA is not set +# CONFIG_SAM34_OCD is not set +# CONFIG_SAM34_PARC is not set +# CONFIG_SAM34_PDCA is not set +# CONFIG_SAM34_PEVC is not set +CONFIG_SAM_PICOCACHE=y +# CONFIG_SAM34_PICOUART is not set +# CONFIG_SAM34_SPI0 is not set +# CONFIG_SAM34_TC0 is not set +# CONFIG_SAM34_TC1 is not set +# CONFIG_SAM34_TRNG is not set +# CONFIG_SAM34_TWI is not set +# CONFIG_SAM34_TWIM is not set +# CONFIG_SAM34_TWIS is not set +# CONFIG_SAM34_TWIM0 is not set +# CONFIG_SAM34_TWIS0 is not set +# CONFIG_SAM34_TWIM1 is not set +# CONFIG_SAM34_TWIS1 is not set +# CONFIG_SAM34_TWIM2 is not set +# CONFIG_SAM34_TWIM3 is not set +# CONFIG_SAM34_USBC is not set +CONFIG_SAM34_USART0=y +# CONFIG_SAM34_USART1 is not set +# CONFIG_SAM34_USART2 is not set +# CONFIG_SAM34_USART3 is not set +# CONFIG_SAM34_WDT is not set + +# +# AT91SAM3/4 Clock Configuration +# +# CONFIG_SAM34_RESET_PERIPHCLKS is not set +# CONFIG_SAM34_OSC0 is not set +# CONFIG_SAM34_OSC32K is not set +# CONFIG_SAM34_RC80M is not set +# CONFIG_SAM34_RCFAST is not set +# CONFIG_SAM34_RC1M is not set +# CONFIG_SAM34_RC32K is not set + +# +# AT91SAM3/4 External Memory Configuration +# + +# +# AT91SAM3/4 GPIO Interrupt Configuration +# +# CONFIG_SAM34_HAVE_GPIOD_IRQ is not set +# CONFIG_SAM34_HAVE_GPIOE_IRQ is not set +# CONFIG_SAM34_HAVE_GPIOF_IRQ is not set +# CONFIG_SAM34_TC is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=3410 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAM4L_XPLAINED=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sam4l-xplained" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# SAM4L Xplained Pro Modules +# +# CONFIG_SAM4L_XPLAINED_SLCD1MODULE is not set +# CONFIG_SAM4L_XPLAINED_IOMODULE is not set +# CONFIG_SAM4L_XPLAINED_OLED1MODULE is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=9 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1536 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +CONFIG_ARCH_HAVE_USART0=y +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART0_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART0 Configuration +# +CONFIG_USART0_RXBUFSIZE=256 +CONFIG_USART0_TXBUFSIZE=256 +CONFIG_USART0_BAUD=115200 +CONFIG_USART0_BITS=8 +CONFIG_USART0_PARITY=0 +CONFIG_USART0_2STOP=0 +# CONFIG_USART0_IFLOWCONTROL is not set +# CONFIG_USART0_OFLOWCONTROL is not set +# CONFIG_USART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=3 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_CXX_NEWLONG=y + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sam4l-xplained/nsh/setenv.sh b/configs/sam4l-xplained/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..46f9aec12e84213867a72062b0047113e0d6278d --- /dev/null +++ b/configs/sam4l-xplained/nsh/setenv.sh @@ -0,0 +1,74 @@ +#!/bin/bash +# configs/sam4l-xplained/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sam4l-xplained/scripts/ld.script b/configs/sam4l-xplained/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..53f44eedd08780e7611a0ae05bd1fe8fbb6807aa --- /dev/null +++ b/configs/sam4l-xplained/scripts/ld.script @@ -0,0 +1,121 @@ +/**************************************************************************** + * configs/sam4l-xplained/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The ATSAM4LC4C has 256KB of FLASH beginning at address 0x0000:0000 and + * 32KB of SRAM beginning at address 0x2000:0000 + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } >flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } >flash + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > sram AT > flash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sam4l-xplained/src/.gitignore b/configs/sam4l-xplained/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/sam4l-xplained/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/sam4l-xplained/src/Makefile b/configs/sam4l-xplained/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..9a736c5d30042caf625d11ebc86ef1bac94117eb --- /dev/null +++ b/configs/sam4l-xplained/src/Makefile @@ -0,0 +1,79 @@ +############################################################################ +# configs/sam4l-xplained/src/Makefile +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c + +ifeq ($(CONFIG_SAM34_SPI0),y) +CSRCS += sam_spi.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += sam_autoleds.c +else +CSRCS += sam_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += sam_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += sam_appinit.c +endif + +ifeq ($(CONFIG_SAM34_LCDCA),y) +ifeq ($(CONFIG_SAM4L_XPLAINED_SLCD1MODULE),y) +CSRCS += sam_slcd.c +endif +endif + +ifeq ($(CONFIG_SAM34_SPI0),y) +ifeq ($(CONFIG_SAM4L_XPLAINED_IOMODULE),y) +CSRCS += sam_mmcsd.c +endif +endif + +ifeq ($(CONFIG_SAM34_SPI0),y) +ifeq ($(CONFIG_SAM4L_XPLAINED_OLED1MODULE),y) +ifeq ($(CONFIG_LCD_UG2832HSWEG04),y) +CSRCS += sam_ug2832hsweg04.c +endif +endif +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/sam4l-xplained/src/sam4l-xplained.h b/configs/sam4l-xplained/src/sam4l-xplained.h new file mode 100644 index 0000000000000000000000000000000000000000..dc26f38c6760c1b5769d600dc6f506b1f9a01ff1 --- /dev/null +++ b/configs/sam4l-xplained/src/sam4l-xplained.h @@ -0,0 +1,363 @@ +/************************************************************************************ + * configs/sam4l-xplained/src/sam4l-xplained.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAM4L_XPLAINED_SRC_SAM4L_XPLAINED_H +#define __CONFIGS_SAM4L_XPLAINED_SRC_SAM4L_XPLAINED_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +#include +#include + +#include "chip/sam_pinmap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* LEDs: There are three LEDs on board the SAM4L Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labeled LED0 near the SAM4L USB + * connector. + * + * This LED is controlled by PC07 and LED0 can be activated by driving the + * PC07 to GND. + * + * When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control LED0 as follows: + * + * SYMBOL Meaning LED0 + * ------------------- ----------------------- ------ + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt N/C + * LED_SIGNAL In a signal handler N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus is LED0 is statically on, NuttX has successfully booted and is, + * apparently, running normmally. If LED0 is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +#define GPIO_LED0 (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \ + GPIO_PORTC | GPIO_PIN7) + +/* QTouch button: The SAM4L Xplained Pro kit has one QTouch button. The connection + * to the SAM4L is: + * + * PC13 CATB_SENSE15 + * PC14 CATB_DIS + */ + +/* Mechanical buttons: + * + * The SAM4L Xplained Pro contains two mechanical buttons. One button is the + * RESET button connected to the SAM4L reset line and the other is a generic user + * configurable button. When a button is pressed it will drive the I/O line to GND. + * + * PC24 SW0 + */ + +#define GPIO_SW0 (GPIO_INTERRUPT | GPIO_PULL_UP | GPIO_GLITCH_FILTER | \ + GPIO_PORTC | GPIO_PIN24) +#define IRQ_SW0 SAM_IRQ_PC24 + +/* LCD1 + * + * EXT5 SAM4L BOARD LCD1 SHARED + * PIN PIN FUNCTION FUNCTION WITH + * 1 PA09 COM3 COM3 EXT3 + * 2 PA10 COM2 COM2 EXT3 + * 3 PA11 COM1 COM1 EXT4 + * 4 PA12 COM0 COM0 EXT4 + * 5 PC15 SEG0 SEG0 EXT3 + * 6 PC16 SEG1 SEG1 EXT3 + * 7 PC17 SEG2 SEG2 EXT4 + * 8 PC18 SEG3 SEG3 EXT4 + * 9 PC19 SEG4 SEG4 + * 10 PA13 SEG5 SEG5 EXT4 + * 11 PA14 SEG6 SEG6 + * 12 PA15 SEG7 SEG7 EXT4 + * 13 PA16 SEG8 SEG8 EXT4 + * 14 PA17 SEG9 SEG9 EXT3 + * 15 PC20 SEG10 SEG10 + * 16 PC21 SEG11 SEG11 + * 17 PC22 SEG12 SEG12 + * 18 PC23 SEG13 SEG13 + * 19 PB08 SEG14 SEG14 + * 20 PB09 SEG15 SEG15 + * 21 PB10 SEG16 SEG16 EXT2 + * 22 PB11 SEG17 SEG17 EXT2 + * 23 PA18 SEG18 SEG18 EXT3-4 + * 24 PA19 SEG19 SEG19 EXT3-4 + * 25 PA20 SEG20 SEG20 EXT3-4 + * 26 PB07 SEG21 SEG21 + * 27 PB06 SEG22 SEG22 + * 28 PA08 SEG23 SEG32 EXT3 + * 29 PC24 SEG24 N/C + * 30 PC25 SEG25 N/C EXT1 + * 31 PC26 SEG26 N/C EXT2-3 + * 32 PC27 SEG27 N/C EXT2-3 + * 33 PC28 SEG28 N/C + * 34 PC29 SEG29 N/C + * 35 PC30 SEG30 N/C EXT1-2 + * 36 PC31 SEG31 N/C + * 37 PB12 SEG32 N/C EXT1 + * 38 PB13 SEG33 N/C EXT1 + * 39 PA21 SEG34 N/C EXT1-2 + * 40 PA22 SEG35 N/C EXT1-2 + * 41 PB14 SEG36 N/C EXT2-4 + * 42 PB15 SEG37 N/C EXT2-4 + * 43 PA23 SEG38 N/C EXT1 + * 44 PA24 SEG39 N/C EXT1 + * 45 --- N/C N/C + * 46 --- N/C N/C + * 47 --- VCC_P3V3 BL V+ + * 48 --- GND BL V- + * 49 PC05 BL BL CTRL EXT2 + * 50 --- ID ID + * 51 --- GND GND + * + * The backlight control is active high. + */ + +#ifdef CONFIG_SAM4L_XPLAINED_SLCD1MODULE + +# ifndef CONFIG_SAM34_LCDCA +# error CONFIG_SAM34_LCDCA is required to use the LCD1 module +# endif + +# define GPIO_LCD1_BL (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTC | GPIO_PIN5) +#endif + +/* I/O1 + * + * Support for the microSD card slot on the I/O1 module. The I/O1 requires + * SPI support and two GPIOs. These the GPIOs will vary if the I/O1 + * is installed on the EXT1 or EXT2 connector: + * + * + * PIN EXT1 EXT2 Description + * --- -------------- --------------- ------------------------------------- + * 15 PC03 SPI/NPCS0 PB11 SPI/NPCS2 Active low chip select OUTPUT, pulled + * high on board. + * 10 PB13 SPI/NPCS1 PC09 GPIO Active low card detect INPUT, must + * use internal pull-up. + */ + +#ifdef CONFIG_SAM4L_XPLAINED_IOMODULE + +# ifndef CONFIG_SAM34_SPI0 +# error CONFIG_SAM34_SPI0 is required to use the I/O1 module +# endif + +# if defined(CONFIG_SAM4L_XPLAINED_IOMODULE_EXT1) + +# if defined(CONFIG_SAM4L_XPLAINED_OLED1MODULE) && \ + defined(CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT1) +# error I/O1 and OLED1 modules cannot both reside in EXT1 +# endif + +# define GPIO_SD_CD (GPIO_INTERRUPT | GPIO_INT_CHANGE | GPIO_PULL_UP | \ + GPIO_GLITCH_FILTER | GPIO_PORTB | GPIO_PIN13) +# define IRQ_SD_CD SAM_IRQ_PB13 + +# define GPIO_SD_CS (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \ + GPIO_PORTC | GPIO_PIN3) +# define SD_CSNO 0 + +# elif defined(CONFIG_SAM4L_XPLAINED_IOMODULE_EXT2) + +# ifndef CONFIG_SAM4L_XPLAINED_SLCD1MODULE +# error I/O1 cannot be in EXT2 if the LCD1 module is connected +# endif + +# if defined(CONFIG_SAM4L_XPLAINED_OLED1MODULE) && \ + defined(CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT2) +# error I/O1 and OLED1 modules cannot both reside in EXT2 +# endif + +# define GPIO_CD (GPIO_INTERRUPT | GPIO_INT_CHANGE | GPIO_PULL_UP | \ + GPIO_GLITCH_FILTER | GPIO_PORTC | GPIO_PIN9) +# define IRQ_CD SAM_IRQ_PC9 + +# define GPIO_SD_CS (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \ + GPIO_PORTB | GPIO_PIN11) +# define SD_CSNO 2 + +# else +# error Which connector is the I/O1 module installed in? +# endif +#endif + +/* OLED1 + * + * Support for the microSD card slot on the I/O1 module. The I/O1 requires + * SPI support and three output GPIOs. These the GPIOs will vary if the OLED1 + * is installed on the EXT1 or EXT2 connector: + * + * + * PIN EXT1 EXT2 Description + * --- -------------- --------------- ------------------------------------- + * 5 PB12 GPIO PC08 GPIO DATA_CMD_SEL + * 10 PB13 SPI/NPCS1 PC09 GPIO DISPLAY_RESET. Active low. + * 15 PC03 SPI/NPCS0 PB11 SPI/NPCS2 DISPLAY_SS. Active low. + */ + +#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE + +# ifndef CONFIG_SAM34_SPI0 +# error CONFIG_SAM34_SPI0 is required to use the OLED1 module +# endif + +# ifndef CONFIG_SPI_CMDDATA +# error CONFIG_SPI_CMDDATA is required to use the OLED1 module +# endif + +# ifndef CONFIG_LCD_SSD1306 +# error CONFIG_LCD_SSD1306 is required to use the OLED1 module +# endif + +# ifndef CONFIG_LCD_UG2832HSWEG04 +# error CONFIG_LCD_UG2832HSWEG04 is required to use the OLED1 module +# endif + +# if defined(CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT1) + +# if defined(CONFIG_SAM4L_XPLAINED_IOMODULE) && \ + defined(CONFIG_SAM4L_XPLAINED_IOMODULE_EXT1) +# error OLED1 and I/O1 modules cannot both reside in EXT1 +# endif + +# define GPIO_OLED_DATA (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTB | GPIO_PIN12) +# define GPIO_OLED_RST (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTB | GPIO_PIN13) +# define GPIO_OLED_CS (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \ + GPIO_PORTC | GPIO_PIN3) +# define OLED_CSNO 0 + +# elif defined(CONFIG_SAM4L_XPLAINED_OLED1MODULE_EXT2) + +# ifndef CONFIG_SAM4L_XPLAINED_SLCD1MODULE +# error OLED1 cannot be in EXT2 if the LCD1 module is connected +# endif + +# if defined(CONFIG_SAM4L_XPLAINED_IOMODULE) && \ + defined(CONFIG_SAM4L_XPLAINED_IOMODULE_EXT2) +# error OLED1 and I/O1 modules cannot both reside in EXT2 +# endif + +# define GPIO_OLED_DATA (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTC | GPIO_PIN8) +# define GPIO_OLED_RST (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTc | GPIO_PIN9) +# define GPIO_OLED_CS (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \ + GPIO_PORTB | GPIO_PIN11) +# define OLED_CSNO 2 + +# else +# error Which connector is the OLED1 module installed in? +# endif +#endif + +#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) +# define GPIO_SD_CS (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \ + GPIO_PORTB | GPIO_PIN11) +#endif + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the SAM3U-EK board. + * + ************************************************************************************/ + +void weak_function sam_spidev_initialize(void); + +/************************************************************************************ + * Name: sam_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires CONFIG_SAM4L_XPLAINED_IOMODULE=y, + * CONFIG_DISABLE_MOUNTPOINT=n, CONFIG_MMCSD=y, and CONFIG_SAM34_SPI0=y + * + ************************************************************************************/ + +#if defined(CONFIG_SAM34_SPI0) && defined(CONFIG_SAM4L_XPLAINED_IOMODULE) +int sam_sdinitialize(int minor); +#endif + +/**************************************************************************** + * Name: sam_slcd_initialize + * + * Description: + * Initialize the SAM4L Xplained Pro LCD hardware and register the character + * driver as /dev/slcd. + * + ****************************************************************************/ + +#if defined(CONFIG_SAM34_LCDCA) && defined(CONFIG_SAM4L_XPLAINED_SLCD1MODULE) +int sam_slcd_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAM4L_XPLAINED_SRC_SAM4L_XPLAINED_H */ + diff --git a/configs/sam4l-xplained/src/sam_appinit.c b/configs/sam4l-xplained/src/sam_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..48c072c98afffd4230727619010d6826fac0c69f --- /dev/null +++ b/configs/sam4l-xplained/src/sam_appinit.c @@ -0,0 +1,116 @@ +/**************************************************************************** + * config/sam4l-xplained/src/sam_appinit.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "sam4l-xplained.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef CONFIG_SAM4L_XPLAINED_IOMODULE +/* Support for the SD card slot on the I/O1 module */ +/* Verify NSH PORT and SLOT settings */ + +# define SAM34_MMCSDSLOTNO 0 /* There is only one slot */ + +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != SAM34_MMCSDSLOTNO +# error Only one MMC/SD slot: Slot 0 (CONFIG_NSH_MMCSDSLOTNO) +# endif + +# if defined(CONFIG_NSH_MMCSDSPIPORTNO) && CONFIG_NSH_MMCSDSPIPORTNO != SD_CSNO +# error CONFIG_NSH_MMCSDSPIPORTNO must have the same value as SD_CSNO +# endif + +/* Default MMC/SD minor number */ + +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(CONFIG_SAM34_LCDCA) && defined(CONFIG_SAM4L_XPLAINED_SLCD1MODULE) + /* Initialize the SLCD and register the SLCD device as /dev/slcd */ + + { + int ret = sam_slcd_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize the LCD: %d\n", + ret); + return ret; + } + } +#endif +#if defined(CONFIG_SAM34_SPI0) && defined(CONFIG_SAM4L_XPLAINED_IOMODULE) + /* Initialize the SPI-based MMC/SD slot */ + + { + int ret = sam_sdinitialize(CONFIG_NSH_MMCSDMINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize MMC/SD slot: %d\n", + ret); + return ret; + } + } +#endif + + return OK; +} diff --git a/configs/sam4l-xplained/src/sam_autoleds.c b/configs/sam4l-xplained/src/sam_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..aa256593909a7cad6fb948f9b5c7339de9b0d73b --- /dev/null +++ b/configs/sam4l-xplained/src/sam_autoleds.c @@ -0,0 +1,178 @@ +/**************************************************************************** + * configs/sam4l-xplained/src/sam_autoleds.c + * + * Copyright (C) 201, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are three LEDs on board the SAM4L Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labeled LED0 near the SAM4L USB + * connector. + * + * This LED is controlled by PC07 and LED0 can be activated by driving the + * PC07 to GND. + * + * When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control LED0 as follows: + * + * SYMBOL Meaning LED0 + * ------------------- ----------------------- ------ + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt** N/C + * LED_SIGNAL In a signal handler*** N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus is LED0 is statically on, NuttX has successfully booted and is, + * apparently, running normally. If LED0 is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "sam4l-xplained.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + (void)sam_configgpio(GPIO_LED0); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool ledstate = true; + + switch (led) + { + case 0: /* LED_STARTED: NuttX has been started LED0=OFF */ + /* LED_HEAPALLOCATE: Heap has been allocated LED0=OFF */ + /* LED_IRQSENABLED: Interrupts enabled LED0=OFF */ + break; /* Leave ledstate == true to turn OFF */ + + default: + case 2: /* LED_INIRQ: In an interrupt LED0=N/C */ + /* LED_SIGNAL: In a signal handler LED0=N/C */ + /* LED_ASSERTION: An assertion failed LED0=N/C */ + return; /* Return to leave LED0 unchanged */ + + case 3: /* LED_PANIC: The system has crashed LED0=FLASH */ + case 1: /* LED_STACKCREATED: Idle stack created LED0=ON */ + ledstate = false; /* Set ledstate == false to turn ON */ + break; + } + + sam_gpiowrite(GPIO_LED0, ledstate); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + /* These should not happen and are ignored */ + + default: + case 0: /* LED_STARTED: NuttX has been started LED0=OFF */ + /* LED_HEAPALLOCATE: Heap has been allocated LED0=OFF */ + /* LED_IRQSENABLED: Interrupts enabled LED0=OFF */ + case 1: /* LED_STACKCREATED: Idle stack created LED0=ON */ + + /* These result in no-change */ + + case 2: /* LED_INIRQ: In an interrupt LED0=N/C */ + /* LED_SIGNAL: In a signal handler LED0=N/C */ + /* LED_ASSERTION: An assertion failed LED0=N/C */ + return; /* Return to leave LED0 unchanged */ + + /* Turn LED0 off set driving the output high */ + + case 3: /* LED_PANIC: The system has crashed LED0=FLASH */ + sam_gpiowrite(GPIO_LED0, true); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/sam4l-xplained/src/sam_boot.c b/configs/sam4l-xplained/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..4bd06612547dc9729b1f1b30793925c3cc768a98 --- /dev/null +++ b/configs/sam4l-xplained/src/sam_boot.c @@ -0,0 +1,88 @@ +/************************************************************************************ + * configs/sam4l-xplained/src/sam_boot.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "sam4l-xplained.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * sam_spidev_initialize() has been brought into the link. + */ + +#ifdef CONFIG_SAM34_SPI0 + if (sam_spidev_initialize) + { + sam_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/sam4l-xplained/src/sam_buttons.c b/configs/sam4l-xplained/src/sam_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..f57cf79eb5bede495954eaf55366744ea6cdd70f --- /dev/null +++ b/configs/sam4l-xplained/src/sam_buttons.c @@ -0,0 +1,173 @@ +/**************************************************************************** + * configs/sam4l-xplained/src/sam_buttons.c + * + * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "sam4l-xplained.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +static xcpt_t g_irqsw0; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + (void)sam_configgpio(GPIO_SW0); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return sam_gpioread(GPIO_SW0) ? 0 : BUTTON_SW0_BIT; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address is returned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the + * overall GPIO IRQ feature and CONFIG_AVR32_GPIOIRQSETA and/or + * CONFIG_AVR32_GPIOIRQSETB must be enabled to select GPIOs to support + * interrupts on. For button support, bits 2 and 3 must be set in + * CONFIG_AVR32_GPIOIRQSETB (PB2 and PB3). + * + ****************************************************************************/ + +#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id == BUTTON_SW0) + { + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = *g_irqsw0; + *g_irqsw0 = irqhandler; + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + /* Configure the interrupt */ + + sam_gpioirq(GPIO_SW0); + (void)irq_attach(IRQ_SW0, irqhandler); + sam_gpioirqenable(IRQ_SW0); + } + else + { + /* Detach and disable the interrupt */ + + (void)irq_detach(IRQ_SW0); + sam_gpioirqdisable(IRQ_SW0); + } + + leave_critical_section(flags); + } + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/sam4l-xplained/src/sam_mmcsd.c b/configs/sam4l-xplained/src/sam_mmcsd.c new file mode 100644 index 0000000000000000000000000000000000000000..bc5fd368c737ba9ce1a4e34ef56340187264ce27 --- /dev/null +++ b/configs/sam4l-xplained/src/sam_mmcsd.c @@ -0,0 +1,127 @@ +/**************************************************************************** + * config/sam4l-xplained/src/sam_mmcsd.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_spi.h" + +#include "sam4l-xplained.h" + +#ifdef CONFIG_SAM4L_XPLAINED_IOMODULE + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# error Mountpoints are disabled (CONFIG_DISABLE_MOUNTPOINT=y) +#endif + +#ifndef CONFIG_SAM34_SPI0 +# error SPI support is required (CONFIG_SAM34_SPI0) +#endif + +#ifndef CONFIG_MMCSD +# error MMC/SD support is required (CONFIG_MMCSD) +#endif + +#define SAM34_MMCSDSLOTNO 0 /* There is only one slot */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires + * - CONFIG_SAM4L_XPLAINED_IOMODULE=y, + * - CONFIG_DISABLE_MOUNTPOINT=n, + * - CONFIG_MMCSD=y, and + * - CONFIG_SAM34_SPI0=y + * + ****************************************************************************/ + +int sam_sdinitialize(int minor) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI driver instance for the SD chip select */ + + fvdbg("Initializing SPI chip select %d\n", SD_CSNO); + + spi = sam_spibus_initialize(SD_CSNO); + if (!spi) + { + fdbg("Failed to initialize SPI chip select %d\n", SD_CSNO); + return -ENODEV; + } + + fvdbg("Successfully initialized SPI chip select %d\n", SD_CSNO); + + /* Bind the SPI device for the chip select to the slot */ + + fvdbg("Binding SPI chip select %d to MMC/SD slot %d\n", + SD_CSNO, SAM34_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(minor, SAM34_MMCSDSLOTNO, spi); + if (ret < 0) + { + fdbg("Failed to bind SPI chip select %d to MMC/SD slot %d: %d\n", + SD_CSNO, SAM34_MMCSDSLOTNO, ret); + return ret; + } + + fvdbg("Successfuly bound SPI chip select %d to MMC/SD slot %d\n", + SD_CSNO, SAM34_MMCSDSLOTNO); + + return OK; +} + +#endif /* CONFIG_SAM4L_XPLAINED_IOMODULE */ diff --git a/configs/sam4l-xplained/src/sam_slcd.c b/configs/sam4l-xplained/src/sam_slcd.c new file mode 100644 index 0000000000000000000000000000000000000000..3b0d61bc36bbbc04cf1a138c266d437324672ddd --- /dev/null +++ b/configs/sam4l-xplained/src/sam_slcd.c @@ -0,0 +1,1329 @@ +/**************************************************************************** + * configs/sam4l-xlplained/src/sam_slcd.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* TODO: Add support for additional pixels: B0-B2, G0-G7, and E0-E7, + * probably via ioctl calls. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include "sam_gpio.h" +#include "sam4l_periphclks.h" +#include "chip/sam4l_lcdca.h" + +#include "sam4l-xplained.h" + +#if defined(CONFIG_SAM34_LCDCA) && defined(CONFIG_SAM4L_XPLAINED_SLCD1MODULE) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug + * must also be enabled. + */ + +#ifndef CONFIG_LIB_SLCDCODEC +# error This SLCD driver requires CONFIG_LIB_SLCDCODEC +#endif + +#if !defined(CONFIG_SAM34_OSC32K) && !defined(CONFIG_SAM34_RC32K) +# error This SLCD driver requires that either CONFIG_SAM34_OSC32K or +# error CONFIG_SAM34_RC32K be selected in the board configuration +#endif + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* The ever-present MIN/MAX macros ******************************************/ + +#ifndef MIN +# define MIN(a,b) (a < b ? a : b) +#endif + +#ifndef MAX +# define MAX(a,b) (a > b ? a : b) +#endif + +/* LCD **********************************************************************/ +/* LCD characteristics. The logic in this driver is not portable; it is + * tailored for the SAM4l Xplained Pro's LED1 module. However, in an effort + * to add some reusability to this module, some of the tunable settings are + * included here as BOARD_ definitions (although they do not appear in the + * board.h header file. + */ + +#define SLCD_NROWS 1 +#define SLCD_NCHARS 5 +#define SLCD_NBARS 4 +#define SLCD_MAXCONTRAST 63 + +#define BOARD_SLCD_NCOM 4 +#define BOARD_SLCD_NSEG 24 +#define SLCD_NPINS (BOARD_SLCD_NCOM+BOARD_SLCD_NSEG+1) + +/* An ASCII character may need to be decorated with a preceding decimal + * point + */ + +#define SLCD_DP 0x01 + +/* LCD controller bias configuration. */ + +#undef BOARD_XBIAS +#define BOARD_LPWAVE 1 + +/* LCD controller initial contrast setting. */ + +#define BOARD_INITIAL_CONTRAST (SLCD_MAXCONTRAST / 2) + +/* LCD controller timing configuration */ + +#define BOARD_TIM_PRES 0 /* Clock prescaler {0|LCDCA_TIM_PRESC} */ +#define BOARD_TIM_CLOCKDIV 8 /* Clock divider {1..8} */ +#define BOARD_TIM_FC0 2 /* Frame 0 configuration {0..31} */ +#define BOARD_TIM_FC1 2 /* Frame 1 configuration {0..31} */ +#define BOARD_TIM_FC2 1 /* Frame 2 configuration {0..31} */ + +/* LCD controller configuration */ + +#if BOARD_SLCD_NCOM < 2 +# define LCD_DUTY LCDCA_CFG_DUTY_STATIC /* Static COM0 */ +#elif BOARD_SLCD_NCOM < 3 +# define LCD_DUTY LCDCA_CFG_DUTY_1TO2 /* 1/2 COM[0:1] */ +#elif BOARD_SLCD_NCOM < 4 +# define LCD_DUTY LCDCA_CFG_DUTY_1TO3 /* 1/3 COM[0:2] */ +#elif BOARD_SLCD_NCOM < 5 +# define LCD_DUTY LCDCA_CFG_DUTY_1TO4 /* 1/4 COM[0:3] */ +#else +# error Value of BOARD_SLCD_NCOM not supported +#endif + +/* LCD Mapping + * + * a + * --------- + * |\ |h /| + * f| g | i |b + * | \ | / | + * --j-- --k-+ + * | /| \ | + * e| l | n |c + * _ | / |m \| _ + * B | | --------- | | B + * - d - + * + * ----- ---- ---- ---- ----- ---------------------------------------------- + * COM0 COM1 COM2 COM3 Comments + * ----- ---- ---- ---- ----- ---------------------------------------------- + * SEG0 G1 G2 G4 G3 Atmel logo, 4 stage battery-, Dot-point-, + * SEG1 G0 G6 G7 G5 usband play indicator + * SEG2 E7 E5 E3 E1 4 stage wireless-, AM-, PM- Volt- and milli + * SEG3 E6 E4 E2 E0 voltindicator + * SEG4 A0-h A0-i A0-k A0-n 1st 14-segment character + * SEG5 B3 A0-f A0-e A0-d + * SEG6 A0-a A0-b A0-c B4 + * SEG7 A0-g A0-j A0-l A0-m + * SEG8 A1-h A1-i A1-k A1-n 2nd 14-segment character + * SEG9 B2 A1-f A1-e A1-d + * SEG10 A1-a A1-b A1-c B5 + * SEG11 A1-g A1-j A1-l A1-m + * SEG12 A2-h A2-i A2-k A2-n 3rd 14-segment character + * SEG13 B1 A2-f A2-e A2-d + * SEG14 A2-a A2-b A2-c B6 + * SEG15 A2-g A2-j A2-l A2-m + * SEG16 A3-h A3-i A3-k A3-n 4th 14-segment character + * SEG17 B0 A3-f A3-e A3-d + * SEG18 A3-a A3-b A3-c B7 + * SEG19 A3-g A3-j A3-l A3-m + * SEG20 A4-h A4-i A4-k A4-n 5th 14-segment character. Celsius and + * SEG21 B8 A4-f A4-e A4-d Fahrenheit indicator + * SEG22 A4-a A4-b A4-c B9 + * SEG23 A4-g A4-j A4-l A4-m + */ + +#define SLCD_A0_STARTSEG 4 +#define SLCD_A0_ENDSEG 7 +#define SLCD_A1_STARTSEG 8 +#define SLCD_A1_ENDSEG 11 +#define SLCD_A2_STARTSEG 12 +#define SLCD_A2_ENDSEG 15 +#define SLCD_A3_STARTSEG 16 +#define SLCD_A3_ENDSEG 19 +#define SLCD_A4_STARTSEG 20 +#define SLCD_A4_ENDSEG 23 + +#define SLCD_NB 10 /* Number of 'B' segments B0-B9 */ +#define SLCD_NG 8 /* Number of 'G' segments G0-G7 */ +#define SLCD_NE 8 /* Number of 'E' segments G0-G7 */ + +/* Named pixels */ + +#define SLCD_MINUS (&g_binfo[0]) +#define SLCD_H (&g_binfo[1]) +#define SLCD_M (&g_binfo[2]) +#define SLCD_DP0 (&g_binfo[3]) +#define SLCD_DP1 (&g_binfo[4]) +#define SLCD_DP2 (&g_binfo[5]) +#define SLCD_DP3 (&g_binfo[6]) +#define SLCD_DP4 (&g_binfo[7]) +#define SLCD_CENTIGRADE (&g_binfo[8]) +#define SLCD_FAHRENHEIT (&g_binfo[9]) + +#define SLCD_ATMEL (&g_ginfo[0]) +#define SLCD_BAR0 (&g_ginfo[1]) +#define SLCD_BAR1 (&g_ginfo[2]) +#define SLCD_BAR2 (&g_ginfo[3]) +#define SLCD_BAR3 (&g_ginfo[4]) +#define SLCD_COLON (&g_ginfo[5]) +#define SLCD_USB (&g_ginfo[6]) +#define SLCD_PAY (&g_ginfo[7]) + +#define SLCD_RNG0 (&g_einfo[0]) +#define SLCD_RNG1 (&g_einfo[1]) +#define SLCD_RNG2 (&g_einfo[2]) +#define SLCD_RNG3 (&g_einfo[3]) +#define SLCD_MV (&g_einfo[4]) +#define SLCD_V (&g_einfo[5]) +#define SLCD_PM (&g_einfo[6]) +#define SLCD_AM (&g_einfo[7]) + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Private Type Definition + ****************************************************************************/ + +/* SLCD incoming stream structure */ + +struct slcd_instream_s +{ + struct lib_instream_s stream; + FAR const char *buffer; + ssize_t nbytes; +}; + +/* Global SLCD state */ + +struct sam_slcdstate_s +{ + bool initialized; /* True: Completed initialization sequence */ + uint8_t curpos; /* The current cursor position */ + uint8_t buffer[SLCD_NCHARS]; /* SLCD ASCII content */ + uint8_t options[SLCD_NCHARS]; /* Ornamentations */ +}; + +/* Describes one pixel */ + +struct slcd_pixel_s +{ + uint8_t segment; + uint8_t com; +}; + +/**************************************************************************** + * Private Function Protototypes + ****************************************************************************/ +/* Debug */ + +#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE) +static void slcd_dumpstate(FAR const char *msg); +static void slcd_dumpslcd(FAR const char *msg); +#else +# define slcd_dumpstate(msg) +# define slcd_dumpslcd(msg) +#endif + +/* Internal utilities */ + +#if 0 /* Not used */ +static void slcd_clear(void); +#endif +static void slcd_setpixel(FAR const struct slcd_pixel_s *info); +static void slcd_clrpixel(FAR const struct slcd_pixel_s *info); +static inline void slcd_setdp(uint8_t curpos); +static inline void slcd_clrdp(uint8_t curpos); +static int slcd_getstream(FAR struct lib_instream_s *instream); +static uint8_t slcd_getcontrast(void); +static int slcd_setcontrast(unsigned int contrast); +static void slcd_writech(uint8_t ch, uint8_t curpos, uint8_t options); +static void slcd_action(enum slcdcode_e code, uint8_t count); + +/* Character driver methods */ + +static ssize_t slcd_read(FAR struct file *, FAR char *, size_t); +static ssize_t slcd_write(FAR struct file *, FAR const char *, size_t); +static int slcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg); +#ifndef CONFIG_DISABLE_POLL +static int slcd_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* This is the driver state structure (there is no retained state information) */ + +static const struct file_operations g_slcdops = +{ + 0, /* open */ + 0, /* close */ + slcd_read, /* read */ + slcd_write, /* write */ + 0, /* seek */ + slcd_ioctl /* ioctl */ +#ifndef CONFIG_DISABLE_POLL + , slcd_poll /* poll */ +#endif +}; + +/* LCD state data */ + +static struct sam_slcdstate_s g_slcdstate; + +/* LCD pin configurations */ + +static gpio_pinset_t g_slcdgpio[SLCD_NPINS] = +{ + GPIO_LCDCA_COM0, GPIO_LCDCA_COM1, GPIO_LCDCA_COM2, GPIO_LCDCA_COM3, + + GPIO_LCDCA_SEG0, GPIO_LCDCA_SEG1, GPIO_LCDCA_SEG2, GPIO_LCDCA_SEG3, + GPIO_LCDCA_SEG4, GPIO_LCDCA_SEG5, GPIO_LCDCA_SEG6, GPIO_LCDCA_SEG7, + GPIO_LCDCA_SEG8, GPIO_LCDCA_SEG9, GPIO_LCDCA_SEG10, GPIO_LCDCA_SEG11, + GPIO_LCDCA_SEG12, GPIO_LCDCA_SEG13, GPIO_LCDCA_SEG14, GPIO_LCDCA_SEG15, + GPIO_LCDCA_SEG16, GPIO_LCDCA_SEG17, GPIO_LCDCA_SEG18, GPIO_LCDCA_SEG19, + GPIO_LCDCA_SEG20, GPIO_LCDCA_SEG21, GPIO_LCDCA_SEG22, GPIO_LCDCA_SEG23, + + GPIO_LCD1_BL +}; + +/* First segment of each character */ + +static const uint8_t g_startseg[SLCD_NCHARS] = +{ + SLCD_A0_STARTSEG, SLCD_A1_STARTSEG, SLCD_A2_STARTSEG, SLCD_A3_STARTSEG, + SLCD_A4_STARTSEG +}; + +/* Pixel position for each 'B' segment */ + +static const struct slcd_pixel_s g_binfo[SLCD_NB] = +{ + {17, 0}, {13, 0}, {9, 0}, {5, 0}, {6, 3}, + {10, 3}, {14, 3}, {18, 3}, {21, 0}, {22, 3} +}; + +/* Pixel position for each 'G' segment */ + +static const struct slcd_pixel_s g_ginfo[SLCD_NG] = +{ + {1, 0}, {0, 0}, {0, 1}, {0, 3}, {0, 2}, + {1, 3}, {1, 1}, {1, 2} +}; + +/* Pixel position for each 'E' segment */ + +static const struct slcd_pixel_s g_einfo[SLCD_NE] = +{ + {3, 3}, {2, 3}, {3, 2}, {2, 2}, {3, 1}, + {2, 1}, {3, 0}, {2, 0} +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: slcd_dumpstate + ****************************************************************************/ + +#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE) +static void slcd_dumpstate(FAR const char *msg) +{ + lcdvdbg("%s:\n", msg); + lcdvdbg(" curpos: %d\n", + g_slcdstate.curpos); + lcdvdbg(" Display: [%c%c%c%c%c]\n", + g_slcdstate.buffer[0], g_slcdstate.buffer[1], g_slcdstate.buffer[2], + g_slcdstate.buffer[3], g_slcdstate.buffer[4]); + lcdvdbg(" Options: [%d%d%d%d%d]\n", + g_slcdstate.options[0], g_slcdstate.options[1], g_slcdstate.options[2], + g_slcdstate.options[3], g_slcdstate.options[4]); +} +#endif + +/**************************************************************************** + * Name: slcd_dumpslcd + ****************************************************************************/ + +#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE) +static void slcd_dumpslcd(FAR const char *msg) +{ + lcdvdbg("%s:\n", msg); + lcdvdbg(" CFG: %08x TIM: %08x SR: %08x\n", + getreg32(SAM_LCDCA_CFG), getreg32(SAM_LCDCA_TIM), + getreg32(SAM_LCDCA_SR)); + lcdvdbg(" DR0: %02x %08x DR1: %02x %08x\n", + getreg32(SAM_LCDCA_DRH0), getreg32(SAM_LCDCA_DRL0), + getreg32(SAM_LCDCA_DRH1), getreg32(SAM_LCDCA_DRL1)); + lcdvdbg(" DR2: %02x %08x DR3: %02x %08x\n", + getreg32(SAM_LCDCA_DRH2), getreg32(SAM_LCDCA_DRL2), + getreg32(SAM_LCDCA_DRH3), getreg32(SAM_LCDCA_DRL3)); + lcdvdbg(" BCFG: %08x CSRCFG: %08x CMCFG: %08x ACMCFG: %08x\n", + getreg32(SAM_LCDCA_BCFG), getreg32(SAM_LCDCA_CSRCFG), + getreg32(SAM_LCDCA_CMCFG), getreg32(SAM_LCDCA_ACMCFG)); + lcdvdbg(" ABMCFG: %08x IMR: %08x VER: %08x\n", + getreg32(SAM_LCDCA_ABMCFG), getreg32(SAM_LCDCA_IMR), + getreg32(SAM_LCDCA_VERSION)); +} +#endif + +/**************************************************************************** + * Name: slcd_clear + ****************************************************************************/ + +#if 0 /* Not used */ +static void slcd_clear(void) +{ + lvdbg("Clearing\n"); + + /* Clear display memory */ + + putreg32(LCDCA_CR_CDM, SAM_LCDCA_CR); +} +#endif + +/**************************************************************************** + * Name: slcd_setpixel + ****************************************************************************/ + +static void slcd_setpixel(FAR const struct slcd_pixel_s *info) +{ + uintptr_t regaddr; + uint32_t regval; + + regaddr = SAM_LCDCA_DRL(info->com); + regval = getreg32(regaddr); + regval |= (1 << info->segment); + putreg32(regval, regaddr); +} + +/**************************************************************************** + * Name: slcd_clrpixel + ****************************************************************************/ + +static void slcd_clrpixel(FAR const struct slcd_pixel_s *info) +{ + uintptr_t regaddr; + uint32_t regval; + + regaddr = SAM_LCDCA_DRL(info->com); + regval = getreg32(regaddr); + regval &= ~(1 << info->segment); + putreg32(regval, regaddr); +} + +/**************************************************************************** + * Name: slcd_setdp + ****************************************************************************/ + +static inline void slcd_setdp(uint8_t curpos) +{ + /* Set the decimal point before the current cursor position + * + * B3 B4 B5 B6 B7 + * .O .O .O .O .O + */ + + slcd_setpixel(&g_binfo[curpos + 3]); +} + +/**************************************************************************** + * Name: slcd_clrdp + ****************************************************************************/ + +static inline void slcd_clrdp(uint8_t curpos) +{ + /* Set the decimal point before the current cursor position + * + * B3 B4 B5 B6 B7 + * .O .O .O .O .O + */ + + slcd_clrpixel(&g_binfo[curpos + 3]); +} + +/**************************************************************************** + * Name: slcd_getstream + * + * Description: + * Get one character from the keyboard. + * + ****************************************************************************/ + +static int slcd_getstream(FAR struct lib_instream_s *instream) +{ + FAR struct slcd_instream_s *slcdstream = (FAR struct slcd_instream_s *)instream; + + DEBUGASSERT(slcdstream && slcdstream->buffer); + if (slcdstream->nbytes > 0) + { + slcdstream->nbytes--; + slcdstream->stream.nget++; + return (int)*slcdstream->buffer++; + } + + return EOF; +} + +/**************************************************************************** + * Name: slcd_getcontrast + ****************************************************************************/ + +static uint8_t slcd_getcontrast(void) +{ + uint32_t regval; + uint32_t ucontrast; + int32_t scontrast; + + /* Get the current contast value */ + + regval = getreg32(SAM_LCDCA_CFG); + ucontrast = (regval & LCDCA_CFG_FCST_MASK) >> LCDCA_CFG_FCST_SHIFT; + + /* Sign extend and translate the 6 bit signed value + * + * Unsigned Signed Extended Translated + * Value Hex Dec + * ---------- --------- ----- ----------- + * 0000 001f 0000 001f 31 63 + * 0000 0000 0000 0000 0 32 + * 0000 0020 ffff ffe0 -32 0 + */ + + scontrast = (int32_t)(ucontrast << (32-6)); + scontrast >>= (32 - 6); + return scontrast + 32; +} + +/**************************************************************************** + * Name: slcd_setcontrast + ****************************************************************************/ + +static int slcd_setcontrast(unsigned int contrast) +{ + uint32_t regval; + int scontrast; + int ret = OK; + + /* Make sure that the contrast setting is within range */ + + if (contrast > SLCD_MAXCONTRAST) + { + contrast = SLCD_MAXCONTRAST; + ret = -ERANGE; + } + + /* Translate to get a signed value: + * + * Input Translated Value Masked Value + * Dec Hex + * ------ --- ------------ ----------- + * 63 -> 31 0000 0001f 0000 0001f + * 32 -> 0 0000 00000 0000 00000 + * 0 -> -32 ffff fffe0 0000 00020 + */ + + scontrast = (int)contrast - 32; + + /* Set the new contast value */ + + regval = getreg32(SAM_LCDCA_CFG); + regval &= ~LCDCA_CFG_FCST_MASK; + regval |= LCDCA_CFG_FCST(scontrast); + putreg32(regval, SAM_LCDCA_CFG); + + lcdvdbg("contrast: %d CFG: %08x\n", contrast, getreg32(SAM_LCDCA_CFG)); + return ret; +} + +/**************************************************************************** + * Name: slcd_writech + ****************************************************************************/ + +static void slcd_writech(uint8_t ch, uint8_t curpos, uint8_t options) +{ + uint8_t segment; + + /* "LCDCA handles up to four ASCII characters tables, configured in + * Character Mapping Configuration register (CMCFG). Instead of handling + * each segments in display memory for a selected digit, user writes ASCII + * code in Character Mapping Control Register (CMCR) to display the + * corresponding character. + * + * "User can then drive several digits with few operations: + * + * "1. Select the Type of Digit (CMCFG.TDG), + * "2. Write the Start Segment value (CMCFG.STSEG) of the first digit, + * "3. Select Digit Reverse Mode (CMCFG.DREV) if required. If DREV is one, + * segment index is decremented, + * "4. Then write ASCII code in CMCR register." + */ + + segment = g_startseg[curpos]; + putreg32(LCDCA_CMCFG_TDG_14S4C | LCDCA_CMCFG_STSEG(segment), SAM_LCDCA_CMCFG); + putreg32(ch, SAM_LCDCA_CMDR); + + /* Check if we need to decorate the character with a preceding dot. */ + + if ((options & SLCD_DP) != 0) + { + slcd_setdp(curpos); + } + else + { + slcd_clrdp(curpos); + } + + /* Save these values in the state structure */ + + g_slcdstate.buffer[curpos] = ch; + g_slcdstate.options[curpos] = options; + slcd_dumpstate("AFTER WRITE"); +} + +/**************************************************************************** + * Name: slcd_action + ****************************************************************************/ + +static void slcd_action(enum slcdcode_e code, uint8_t count) +{ + lcdvdbg("Action: %d count: %d\n", code, count); + slcd_dumpstate("BEFORE ACTION"); + + switch (code) + { + /* Erasure */ + + case SLCDCODE_BACKDEL: /* Backspace (backward delete) N characters */ + { + int tmp; + + /* If we are at the home position or if the count is zero, then ignore the action */ + + if (g_slcdstate.curpos < 1 || count < 1) + { + break; + } + + /* Otherwise, BACKDEL is like moving the cursor back N characters then doing a + * forward deletion. Decrement the cursor position and fall through. + */ + + tmp = (int)g_slcdstate.curpos - count; + if (tmp < 0) + { + tmp = 0; + count = g_slcdstate.curpos; + } + + /* Save the updated cursor positions */ + + g_slcdstate.curpos = tmp; + } + + case SLCDCODE_FWDDEL: /* DELete (forward delete) N characters moving text */ + if (count > 0) + { + int nchars; + int nmove; + int i; + + /* How many characters are to the right of the cursor position + * (including the one at the cursor position)? Then get the + * number of characters to move. + */ + + nchars = SLCD_NCHARS - g_slcdstate.curpos; + nmove = MIN(nchars, count) - 1; + + /* Move all characters after the current cursor position left by + * 'nmove' characters + */ + + for (i = g_slcdstate.curpos + nmove; i < SLCD_NCHARS - 1; i++) + { + slcd_writech(g_slcdstate.buffer[i-nmove], i, + g_slcdstate.options[i-nmove]); + } + + /* Erase the last 'nmove' characters on the display */ + + for (i = SLCD_NCHARS - nmove; i < SLCD_NCHARS; i++) + { + slcd_writech(' ', i, 0); + } + } + break; + + case SLCDCODE_ERASE: /* Erase N characters from the cursor position */ + if (count > 0) + { + int last; + int i; + + /* Get the last position to clear and make sure that the last + * position is on the SLCD. + */ + + last = g_slcdstate.curpos + count - 1; + if (last >= SLCD_NCHARS) + { + last = SLCD_NCHARS - 1; + } + + /* Erase N characters after the current cursor position left by one */ + + for (i = g_slcdstate.curpos; i < last; i++) + { + slcd_writech(' ', i, 0); + } + } + break; + + case SLCDCODE_CLEAR: /* Home the cursor and erase the entire display */ + { + /* This is like HOME followed by ERASEEOL. Home the cursor and + * fall through. + */ + + g_slcdstate.curpos = 0; + } + + case SLCDCODE_ERASEEOL: /* Erase from the cursor position to the end of line */ + { + int i; + + /* Erase characters after the current cursor position to the end of the line */ + + for (i = g_slcdstate.curpos; i < SLCD_NCHARS; i++) + { + slcd_writech(' ', i, 0); + } + } + break; + + /* Cursor movement */ + + case SLCDCODE_HOME: /* Cursor home */ + { + g_slcdstate.curpos = 0; + } + break; + + case SLCDCODE_END: /* Cursor end */ + { + g_slcdstate.curpos = SLCD_NCHARS - 1; + } + break; + + case SLCDCODE_LEFT: /* Cursor left by N characters */ + { + int tmp = (int)g_slcdstate.curpos - count; + + /* Don't permit movement past the beginning of the SLCD */ + + if (tmp < 0) + { + tmp = 0; + } + + /* Save the new cursor position */ + + g_slcdstate.curpos = (uint8_t)tmp; + } + break; + + case SLCDCODE_RIGHT: /* Cursor right by N characters */ + { + int tmp = (int)g_slcdstate.curpos + count; + + /* Don't permit movement past the end of the SLCD */ + + if (tmp >= SLCD_NCHARS) + { + tmp = SLCD_NCHARS - 1; + } + + /* Save the new cursor position */ + + g_slcdstate.curpos = (uint8_t)tmp; + } + break; + + case SLCDCODE_UP: /* Cursor up by N lines */ + case SLCDCODE_DOWN: /* Cursor down by N lines */ + case SLCDCODE_PAGEUP: /* Cursor up by N pages */ + case SLCDCODE_PAGEDOWN: /* Cursor down by N pages */ + break; /* Not supportable on this SLCD */ + + /* Blinking */ + + case SLCDCODE_BLINKSTART: /* Start blinking with current cursor position */ + case SLCDCODE_BLINKEND: /* End blinking after the current cursor position */ + case SLCDCODE_BLINKOFF: /* Turn blinking off */ + break; /* Not implemented */ + + /* These are actually unreportable errors */ + + default: + case SLCDCODE_NORMAL: /* Not a special keycode */ + break; + } + + slcd_dumpstate("AFTER ACTION"); +} + +/**************************************************************************** + * Name: slcd_read + ****************************************************************************/ + +static ssize_t slcd_read(FAR struct file *filep, FAR char *buffer, size_t len) +{ + int ret = 0; + int i; + + /* Try to read the entire display. Notice that the seek offset + * (filep->f_pos) is ignored. It probably should be taken into account + * and also updated after each read and write. + */ + + for (i = 0; i < SLCD_NCHARS && ret < len; i++) + { + /* Check if the character is decorated with a preceding period */ + + if (ret < len && g_slcdstate.options[i] != 0) + { + if ((g_slcdstate.options[i] & SLCD_DP) != 0) + { + *buffer++ = '.'; + ret++; + } + } + /* Return the character */ + + *buffer++ = g_slcdstate.buffer[i]; + ret++; + } + + slcd_dumpstate("READ"); + return ret; +} + +/**************************************************************************** + * Name: slcd_write + ****************************************************************************/ + +static ssize_t slcd_write(FAR struct file *filep, + FAR const char *buffer, size_t len) +{ + struct slcd_instream_s instream; + struct slcdstate_s state; + enum slcdret_e result; + uint8_t ch; + uint8_t count; + uint8_t options; + + /* Initialize the stream for use with the SLCD CODEC */ + + instream.stream.get = slcd_getstream; + instream.stream.nget = 0; + instream.buffer = buffer; + instream.nbytes = len; + + /* Initialize the SLCD decode state buffer */ + + memset(&state, 0, sizeof(struct slcdstate_s)); + + /* Decode and process every byte in the input buffer */ + + options = 0; + while ((result = slcd_decode(&instream.stream, &state, &ch, &count)) != SLCDRET_EOF) + { + lcdvdbg("slcd_decode returned result=%d char=%d count=%d\n", + result, ch, count); + + if (result == SLCDRET_CHAR) /* A normal character was returned */ + { + /* Check for ASCII control characters */ + + if (ch < ASCII_SPACE) + { + /* All are ignored except for backspace and carriage return */ + + if (ch == ASCII_BS) + { + /* Perform the backward deletion */ + + slcd_action(SLCDCODE_BACKDEL, 1); + } + else if (ch == ASCII_CR) + { + /* Perform the carriage return */ + + slcd_action(SLCDCODE_HOME, 0); + } + + /* Ignore dots before control characters (all of them?) */ + + options = 0; + } + + /* Handle characters decoreated with a preceding period */ + + else if (ch == '.') + { + /* The next character will need a dot in front of it */ + + options |= SLCD_DP; + } + + /* Handle ASCII_DEL */ + + else if (ch == ASCII_DEL) + { + /* Perform the foward deletion */ + + slcd_action(SLCDCODE_FWDDEL, 1); + options = 0; + } + + /* The rest of the 7-bit ASCII characters are fair game */ + + else if (ch < 128) + { + lcdvdbg("ch: %c[%02x] options: %02x\n", ch, ch, options); + + /* Write the character at the current cursor position */ + + slcd_writech(ch, g_slcdstate.curpos, options); + options = 0; + + /* And advance the cursor position */ + + if (g_slcdstate.curpos < (SLCD_NCHARS - 1)) + { + g_slcdstate.curpos++; + } + + slcd_dumpstate("AFTER APPEND"); + } + } + else /* (result == SLCDRET_SPEC) */ /* A special SLCD action was returned */ + { + /* Then Perform the action */ + + slcd_action((enum slcdcode_e)ch, count); + } + } + + /* Ignore any dots with no following characters */ + + /* Assume that the entire input buffer was processed */ + + return (ssize_t)len; +} + +/**************************************************************************** + * Name: slcd_poll + ****************************************************************************/ + +static int slcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + switch (cmd) + { + + /* SLCDIOC_GETATTRIBUTES: Get the attributes of the SLCD + * + * argument: Pointer to struct slcd_attributes_s in which values will be + * returned + */ + + case SLCDIOC_GETATTRIBUTES: + { + FAR struct slcd_attributes_s *attr = (FAR struct slcd_attributes_s *)((uintptr_t)arg); + + lcdvdbg("SLCDIOC_GETATTRIBUTES:\n"); + + if (!attr) + { + return -EINVAL; + } + + attr->nrows = SLCD_NROWS; + attr->ncolumns = SLCD_NCHARS; + attr->nbars = SLCD_NBARS; + attr->maxcontrast = SLCD_MAXCONTRAST; + attr->maxbrightness = 0; + } + break; + + /* SLCDIOC_CURPOS: Get the SLCD cursor positioni (rows x characters) + * + * argument: Pointer to struct slcd_curpos_s in which values will be + * returned + */ + + case SLCDIOC_CURPOS: + { + FAR struct slcd_curpos_s *curpos = (FAR struct slcd_curpos_s *)((uintptr_t)arg); + + lcdvdbg("SLCDIOC_CURPOS: row=0 column=%d\n", g_slcdstate.curpos); + + if (!curpos) + { + return -EINVAL; + } + + curpos->row = 0; + curpos->column = g_slcdstate.curpos; + } + break; + + /* SLCDIOC_SETBAR: Set bars on a bar display + * + * argument: 32-bit bitset, with each bit corresponding to one bar. + */ + + case SLCDIOC_SETBAR: + { + lcdvdbg("SLCDIOC_SETBAR: arg=0x%02lx\n", arg); + + if ((arg & 1) != 0) + { + slcd_setpixel(SLCD_RNG0); + } + else + { + slcd_clrpixel(SLCD_RNG0); + } + + if ((arg & 2) != 0) + { + slcd_setpixel(SLCD_RNG1); + } + else + { + slcd_clrpixel(SLCD_RNG1); + } + + if ((arg & 4) != 0) + { + slcd_setpixel(SLCD_RNG2); + } + else + { + slcd_clrpixel(SLCD_RNG2); + } + + if ((arg & 8) != 0) + { + slcd_clrpixel(SLCD_RNG3); + } + else + { + slcd_setpixel(SLCD_RNG3); + } + } + break; + + /* SLCDIOC_GETCONTRAST: Get the current contrast setting + * + * argument: Pointer type int that will receive the current contrast + * setting + */ + + case SLCDIOC_GETCONTRAST: + { + FAR int *contrast = (FAR int *)((uintptr_t)arg); + if (!contrast) + { + return -EINVAL; + } + + *contrast = (int)slcd_getcontrast(); + lcdvdbg("SLCDIOC_GETCONTRAST: contrast=%d\n", *contrast); + } + break; + + /* SLCDIOC_SETCONTRAST: Set the contrast to a new value + * + * argument: The new contrast value + */ + + case SLCDIOC_SETCONTRAST: + { + lcdvdbg("SLCDIOC_SETCONTRAST: arg=%ld\n", arg); + + if (arg > SLCD_MAXCONTRAST) + { + return -ERANGE; + } + + return slcd_setcontrast((unsigned int)arg); + } + break; + + case SLCDIOC_GETBRIGHTNESS: /* Get the current brightness setting */ + case SLCDIOC_SETBRIGHTNESS: /* Set the brightness to a new value */ + default: + return -ENOTTY; + } + + return OK; +} + +/**************************************************************************** + * Name: slcd_poll + ****************************************************************************/ + +#ifndef CONFIG_DISABLE_POLL +static int slcd_poll(FAR struct file *filep, FAR struct pollfd *fds, + bool setup) +{ + if (setup) + { + /* Data is always avaialble to be read / Data can always be written */ + + fds->revents |= (fds->events & (POLLIN|POLLOUT)); + if (fds->revents != 0) + { + sem_post(fds->sem); + } + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_slcd_initialize + * + * Description: + * Initialize the SAM4L Xplained Pro LCD hardware and register the character + * driver as /dev/slcd. + * + ****************************************************************************/ + +int sam_slcd_initialize(void) +{ + uint32_t regval; + int ret = OK; + int i; + + /* Only initialize the driver once. */ + + if (!g_slcdstate.initialized) + { + lcdvdbg("Initializing\n"); + + /* Configure LCD GPIO pins */ + + for (i = 0; i < SLCD_NPINS; i++) + { + sam_configgpio(g_slcdgpio[i]); + } + + /* Enable APB clock for LCDCA */ + + sam_lcdca_enableclk(); + + /* Here we require that either CONFIG_SAM34_OSC32K or CONFIG_SAM34_RC32K + * is defined in the configuration. In that case, the source clock was + * initialized during boot up and we can be assured that it is read for + * use now. + */ + + /* Disable the LCD controller and frame counters */ + + putreg32(LCDCA_CR_DIS | LCDCA_CR_FC0DIS | LCDCA_CR_FC1DIS | + LCDCA_CR_FC2DIS, SAM_LCDCA_CR); + + /* Configure LCD controller timing */ + + regval = BOARD_TIM_PRES | LCDCA_TIM_CLKDIV(BOARD_TIM_CLOCKDIV) | + LCDCA_TIM_FC0(BOARD_TIM_FC0) | LCDCA_TIM_FC1(BOARD_TIM_FC1) | + LCDCA_TIM_FC2(BOARD_TIM_FC2); + putreg32(regval, SAM_LCDCA_TIM); + + /* Setup the LCD controller configuration. + * + * External bias generation (XBIAS): Controlled by board setting + * Waveform mode: Controlled by board setting + * Blank LCD: No + * Lock: No + * Duty: Controlled by board setting + * Fine Contrast (FCST): 0 + * Number of segments (NSU): Controlled by board setting + */ + + regval = +#ifdef BOARD_XBIAS + LCDCA_CFG_XBIAS | +#endif +#ifndef BOARD_LPWAVE + LCDCA_CFG_WMOD | +#endif + LCD_DUTY | + LCDCA_CFG_FCST(0) | + LCDCA_CFG_NSU(BOARD_SLCD_NSEG); + + putreg32(regval, SAM_LCDCA_CFG); + + /* Provide an initial contrast setting */ + + slcd_setcontrast(BOARD_INITIAL_CONTRAST); + + /* Turn off blanking of display segments */ + + regval = getreg32(SAM_LCDCA_CFG); + regval &= ~LCDCA_CFG_BLANK; + putreg32(regval, SAM_LCDCA_CFG); + + /* Enable the display controller */ + + putreg32(LCDCA_CR_EN, SAM_LCDCA_CR); + + /* Clear all display memory */ + + putreg32(LCDCA_CR_CDM, SAM_LCDCA_CR); + + /* Wait for the LCD to be fully enabled */ + + while ((getreg32(SAM_LCDCA_SR) & LCDCA_SR_EN) == 0); + + /* Enable frame counters */ + + putreg32(LCDCA_CR_FC0EN, SAM_LCDCA_CR); + while ((getreg32(SAM_LCDCA_SR) & LCDCA_SR_FC0S) == 0); + + putreg32(LCDCA_CR_FC1EN, SAM_LCDCA_CR); + while ((getreg32(SAM_LCDCA_SR) & LCDCA_SR_FC1S) == 0); + + putreg32(LCDCA_CR_FC2EN, SAM_LCDCA_CR); + while ((getreg32(SAM_LCDCA_SR) & LCDCA_SR_FC2S) == 0); + + /* Make sure that blinking and circular shifting is off */ + + putreg32(LCDCA_CR_BSTOP | LCDCA_CR_CSTOP, SAM_LCDCA_CR); + + /* Disable any automated display */ + + regval = getreg32(SAM_LCDCA_ACMCFG); + regval &= ~LCDCA_ACMCFG_EN; + putreg32(regval, SAM_LCDCA_ACMCFG); + + /* Initialize display memory */ + + putreg32(0, SAM_LCDCA_DRL0); + putreg32(0, SAM_LCDCA_DRH0); + putreg32(0, SAM_LCDCA_DRL1); + putreg32(0, SAM_LCDCA_DRH1); + putreg32(0, SAM_LCDCA_DRL2); + putreg32(0, SAM_LCDCA_DRH2); + putreg32(0, SAM_LCDCA_DRL3); + putreg32(0, SAM_LCDCA_DRH3); + + /* Turn on the Atmel pixel */ + + slcd_setpixel(SLCD_ATMEL); + + /* Register the LCD device driver */ + + ret = register_driver("/dev/slcd", &g_slcdops, 0644, &g_slcdstate); + g_slcdstate.initialized = true; + + /* Turn on the backlight */ + + sam_gpiowrite(GPIO_LCD1_BL, true); + + slcd_dumpstate("AFTER INITIALIZATION"); + slcd_dumpslcd("AFTER INITIALIZATION"); + } + + return ret; +} + +#endif /* CONFIG_SAM34_LCDCA && CONFIG_SAM4L_XPLAINED_SLCD1MODULE */ diff --git a/configs/sam4l-xplained/src/sam_spi.c b/configs/sam4l-xplained/src/sam_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..8c45e010e331d092395c8edf79f263abd8f8e6e9 --- /dev/null +++ b/configs/sam4l-xplained/src/sam_spi.c @@ -0,0 +1,276 @@ +/************************************************************************************ + * configs/sam4l-xplained/src/sam_spi.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_gpio.h" +#include "sam_spi.h" +#include "sam4l-xplained.h" + +#ifdef CONFIG_SAM34_SPI0 + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the SAM3U10E-EVAL board. + * + ************************************************************************************/ + +void weak_function sam_spidev_initialize(void) +{ + /* The I/O module containing the SD connector may or may not be installed. And, if + * it is installed, it may be in connector EXT1 or EXT2. + */ + +#ifdef CONFIG_SAM4L_XPLAINED_IOMODULE + /* TODO: enable interrupt on card detect */ + + sam_configgpio(GPIO_SD_CD); /* Card detect input */ + sam_configgpio(GPIO_SD_CS); /* Chip select output */ +#endif + +#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE + sam_configgpio(GPIO_OLED_DATA); /* Command/data */ + sam_configgpio(GPIO_OLED_CS); /* Card detect input */ +#endif +} + +/**************************************************************************** + * Name: sam_spi0select, sam_spi0status, and sam_spic0mddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * include: + * + * o sam_spi0select is a functions tomanage the board-specific chip selects + * o sam_spi0status and sam_spic0mddata: Implementations of the status + * and cmddata methods of the SPI interface defined by struct spi_ops_ + * (see include/nuttx/spi/spi.h). All other methods including + * sam_spibus_initialize()) are provided by common SAM3/4 logic. + * + * To use this common SPI logic on your board: + * + * 1. Provide logic in sam_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide sam_spi0select() and sam_spi0status() functions in your board- + * specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * sam_spic0mddata() functions in your board-specific logic. This + * function will perform cmd/data selection operations using GPIOs in + * the way your board is configured. + * 3. Add a call to sam_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by sam_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spi0select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * GPIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the GPIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +void sam_spi0select(enum spi_dev_e devid, bool selected) +{ +#ifdef CONFIG_SAM4L_XPLAINED_IOMODULE + /* Select/de-select the SD card */ + + if (devid == SPIDEV_MMCSD) + { + /* Active low */ + + sam_gpiowrite(GPIO_SD_CS, !selected); + } + +#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE + else +#endif +#endif + +#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE + /* Select/de-select the OLED */ + + if (devid == SPIDEV_DISPLAY) + { + /* Active low */ + + sam_gpiowrite(GPIO_OLED_CS, !selected); + } +#endif +} + +/**************************************************************************** + * Name: sam_spi0status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + +#ifdef CONFIG_SAM4L_XPLAINED_IOMODULE + /* Check if an SD card is present in the microSD slot */ + + if (devid == SPIDEV_MMCSD) + { + /* Active low */ + + if (!sam_gpioread(GPIO_SD_CD)) + { + ret |= SPI_STATUS_PRESENT; + } + } +#endif + + return ret; +} + +#endif /* CONFIG_SAM34_SPI0 */ + +/**************************************************************************** + * Name: sam_spic0mddata + * + * Description: + * Some SPI devices require an additional control to determine if the SPI + * data being sent is a command or is data. If CONFIG_SPI_CMDDATA then + * this function will be called to different be command and data transfers. + * + * This is often needed, for example, by LCD drivers. Some LCD hardware + * may be configured to use 9-bit data transfers with the 9th bit + * indicating command or data. That same hardware may be configurable, + * instead, to use 8-bit data but to require an additional, board- + * specific GPIO control to distinguish command and data. This function + * would be needed in that latter case. + * + * Input Parameters: + * dev - SPI device info + * devid - Identifies the (logical) device + * + * Returned Values: + * Zero on success; a negated errno on failure. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +int sam_spic0mddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE + if (devid == SPIDEV_DISPLAY) + { + /* This is the Data/Command control pad which determines whether the + * data bits are data or a command. + * + * High: the inputs are treated as display data. + * Low: the inputs are transferred to the command registers. + */ + + (void)sam_gpiowrite(GPIO_OLED_DATA, !cmd); + } +#endif + return OK; +} +#endif diff --git a/configs/sam4l-xplained/src/sam_ug2832hsweg04.c b/configs/sam4l-xplained/src/sam_ug2832hsweg04.c new file mode 100644 index 0000000000000000000000000000000000000000..1d60b6710c1cb15ac9a460a984cfbae141330b7b --- /dev/null +++ b/configs/sam4l-xplained/src/sam_ug2832hsweg04.c @@ -0,0 +1,184 @@ +/**************************************************************************** + * config/sam4l-xplained/src/sam_ug2832hsweg04.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* OLED1 Connector: + * + * OLED1 EXT1 EXT2 Other use of either pin + * ----------------- -------------------- -------------------- ------------------------------------ + * 1 ID 1 1 + * 2 GND 2 GND 2 + * 3 BUTTON2 3 PA04 ADCIFE/AD0 3 PA07 ADCIFE/AD2 + * 4 BUTTON3 4 PA05 ADCIFE/AD1 4 PB02 ADCIFE/AD3 + * 5 DATA_CMD_SEL 5 PB12 GPIO 5 PC08 GPIO PB12 and PC8 on EXT5 + * 6 LED3 6 PC02 GPIO 6 PB10 GPIO PB10 on EXT5 + * 7 LED1 7 PC00 TC/1/A0 7 PC04 TC/1/A2 + * 8 LED2 8 PC01 TC/1/B0 8 PC05 TC/1/B2 PC05 on EXT5 + * 9 BUTTON1 9 PC25 EIC/EXTINT2 9 PC06 EIC/EXTINT8 PC25 on EXT5 + * 10 DISPLAY_RESET 10 PB13 SPI/NPCS1 10 PC09 GPIO PB13 on EXT5 + * 11 N/C 11 PA23 TWIMS/0/TWD 11 PB14 TWIMS/3/TWD PB14 on EXT3&4, PA23 and PB14 on EXT5 + * 12 N/C 12 PA24 TWIMS/0/TWCK 12 PB15 TWIMS/3/TWCK PB15 on EXT3&4, PA24 and PB15 on EXT5 + * 13 N/C 13 PB00 USART/0/RXD 13 PC26 USART/1/RXD PB00 on EXT4, PC26 on EXT3&5 + * 14 N/C 14 PB01 USART/0/TXD 14 PC27 USART/1/TXD PB01 on EXT4, PC27 on EXT3&5 + * 15 DISPLAY_SS 15 PC03 SPI/NPCS0 15 PB11 SPI/NPCS2 PB11 on EXT5 + * 16 SPI_MOSI 16 PA22 SPI/MOSI 16 PA22 SPI/MOSI PA22 on EXT5 + * 17 N/C 17 PA21 SPI/MISO 17 PA21 SPI/MISO PA21 on EXT5 + * 18 SPI_SCK 18 PC30 SPI/SCK 18 PC30 SPI/SCK PC30 on EXT5 + * 19 GND 19 GND GND + * 20 VCC 20 VCC VCC + * + * OLED1 signals + * + * DATA_CMD_SEL - Data/command select. Used to choose whether the + * communication is data to the display memory or a command to the LCD + * controller. High = data, low = command + * DISPLAY_RESET - Reset signal to the OLED display, active low. Used during + * initialization of the display. + * DISPLAY_SS - SPI slave select signal, must be held low during SPI + * communication. + * SPI_MOSI - SPI master out, slave in signal. Used to write data to the + * display + * SPI_SCK SPI - clock signal, generated by the master. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include "sam_gpio.h" +#include "sam_spi.h" + +#include "sam4l-xplained.h" + +#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* The pin configurations here require that SPI1 is selected */ + +#ifndef CONFIG_LCD_SSD1306 +# error "The OLED driver requires CONFIG_LCD_SSD1306 in the configuration" +#endif + +#ifndef CONFIG_LCD_UG2832HSWEG04 +# error "The OLED driver requires CONFIG_LCD_UG2832HSWEG04 in the configuration" +#endif + +#ifndef CONFIG_SAM34_SPI0 +# error "The OLED driver requires CONFIG_SAM34_SPI0 in the configuration" +#endif + +#ifndef CONFIG_SPI_CMDDATA +# error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration" +#endif + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) dbg(format, ##__VA_ARGS__) +# define lcdvdbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED GPIOs. This initial configuration is RESET low, + * putting the OLED into reset state. + */ + + (void)sam_configgpio(GPIO_OLED_RST); + + /* Wait a bit then release the OLED from the reset state */ + + up_mdelay(20); + sam_gpiowrite(GPIO_OLED_RST, true); + + /* Get the SPI1 port interface */ + + spi = sam_spibus_initialize(OLED_CSNO); + if (!spi) + { + lcddbg("Failed to initialize SPI port 1\n"); + } + else + { + /* Bind the SPI port to the OLED */ + + dev = ssd1306_initialize(spi, devno); + if (!dev) + { + lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno); + } + else + { + lcdvdbg("Bound SPI port 1 to OLED %d\n", devno); + + /* And turn the OLED on */ + + (void)dev->setpower(dev, CONFIG_LCD_MAXPOWER); + return dev; + } + } + + return NULL; +} +#endif /* CONFIG_SAM4L_XPLAINED_OLED1MODULE */ diff --git a/configs/sam4l-xplained/src/sam_userleds.c b/configs/sam4l-xplained/src/sam_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..8e053363ce53fc0fec1e5c24627d0256fa749247 --- /dev/null +++ b/configs/sam4l-xplained/src/sam_userleds.c @@ -0,0 +1,135 @@ +/**************************************************************************** + * configs/sam4l-xplained/src/sam_userleds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are three LEDs on board the SAM4L Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labeled LED0 near the SAM4L USB + * connector. + * + * This LED is controlled by PC07 and LED0 can be activated by driving the + * PC07 to GND. + * + * When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control LED0. Otherwise, LED0 can be controlled from user applications + * using the logic in this file. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_gpio.h" +#include "sam4l-xplained.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the + * board_userled_initialize() is available to initialize the LED0 from + * user application logic. + * + ****************************************************************************/ + +void board_userled_initialize(void) +{ + (void)sam_configgpio(GPIO_LED0); +} + +/**************************************************************************** + * Name: board_userled + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled() is + * available to control the LED0 from user application logic. + * + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_LED0) + { + sam_gpiowrite(GPIO_LED0, !ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled_all() is + * available to control the LED0 from user application logic. NOTE: since + * there is only a single LED on-board, this is function is not very useful. + * + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + board_userled(BOARD_LED0, (ledset & BOARD_LED0_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/sam4s-xplained-pro/Kconfig b/configs/sam4s-xplained-pro/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..b669f8f659cb4671fec95cbdd44284b3a8610e32 --- /dev/null +++ b/configs/sam4s-xplained-pro/Kconfig @@ -0,0 +1,23 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAM4S_XPLAINED_PRO + +config SAM4S_XPLAINED_PRO_CDCACM_DEVMINOR + int "CDC/ACM Device Minor" + default 0 + depends on SAM34_UDP && USBDEV && CDCACM + +config SAM4S_XPLAINED_PRO_SCHED_TIMER_DEVPATH + string "Scheduler Timer Device Path" + default "/dev/rtt0" + depends on TIMER && SYSTEMTICK_EXTCLK + +config SAM4S_XPLAINED_PRO_CPULOAD_TIMER_DEVPATH + string "CPU Load Timer Device Path" + default "/dev/tc0" + depends on TIMER && SCHED_CPULOAD && SCHED_CPULOAD_EXTCLK + +endif diff --git a/configs/sam4s-xplained-pro/README.txt b/configs/sam4s-xplained-pro/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..b0b76de1cd5a87bfceca79a0da610f49c657211f --- /dev/null +++ b/configs/sam4s-xplained-pro/README.txt @@ -0,0 +1,637 @@ +README +^^^^^^ + + This README discusses issues unique to NuttX configurations for the + Atmel SAM4S Xplained development board. This board features the + ATSAM4S32C MCU with 1MB FLASH and 128KB. + + The SAM4S Xplained features: + + - 120 MHz Cortex-M4 with MPU + - 12MHz crystal (no 32.768KHz crystal) + - Segger J-Link JTAG emulator on-board for program and debug + - MICRO USB A/B connector for USB connectivity + - IS66WV51216DBLL ISSI SRAM 8Mb 512K x 16 55ns PSRAM 2.5v-3.6v + - Four Atmel QTouch buttons + - External voltage input + - Two LEDs, one controllable from software + - Xplained expansion headers + - Footprint for external serial Flash (not fitted) + +Contents +^^^^^^^^ + + - PIO Muliplexing + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - Buttons and LEDs + - Serial Consoles + - SAM4S Xplained-specific Configuration Options + - Configurations + +PIO Muliplexing +^^^^^^^^^^^^^^^ + + PA0 SMC_A17 PB0 J2.3 default PC0 SMC_D0 + PA1 SMC_A18 PB1 J2.4 PC1 SMC_D1 + PA2 J3.7 default PB2 J1.3 & J4.3 PC2 SMC_D2 + PA3 J1.1 & J4.1 PB3 J1.4 & J4.4 PC3 SMC_D3 + PA4 J1.2 & J4.2 PB4 JTAG PC4 SMC_D4 + PA5 User_button BP2 PB5 JTAG PC5 SMC_D5 + PA6 J3.7 optional PB6 JTAG PC6 SMC_D6 + PA7 CLK_32K PB7 JTAG PC7 SMC_D7 + PA8 CLK_32K PB8 CLK_12M PC8 SMC_NWE + PA9 RX_UART0 PB9 CLK_12M PC9 Power on detect + PA10 TX_UART0 PB10 USB_DDM PC10 User LED D9 + PA11 J3.2 default PB11 USB_DDP PC11 SMC_NRD + PA12 MISO PB12 ERASE PC12 J2.2 + PA13 MOSI PB13 J2.3 optional PC13 J2.7 + PA14 SPCK PB14 N/A PC14 SMC_NCS0 + PA15 J3.5 PC15 SMC_NSC1 + PA16 J3.6 PC16 N/A + PA17 J2.5 PC17 User LED D10 + PA18 J3.4 & SMC_A14 PC18 SMC_A0 + PA19 J3.4 optional & SMC_A15 PC19 SMC_A1 + PA20 J3.1 & SMC_A16 PC20 SMC_A2 + PA21 J2.6 PC21 SMC_A3 + PA22 J2.1 PC22 SMC_A4 + PA23 J3.3 PC23 SMC_A5 + PA24 TSLIDR_SL_SN PC24 SMC_A6 + PA25 TSLIDR_SL_SNSK PC25 SMC_A7 + PA26 TSLIDR_SM_SNS PC26 SMC_A8 + PA27 TSLIDR_SM_SNSK PC27 SMC_A9 + PA28 TSLIDR_SR_SNS PC28 SMC_A10 + PA29 TSLIDR_SR_SNSK PC29 SMC_A11 + PA30 J4.5 PC30 SMC_A12 + PA31 J1.5 PC31 SMC_A13 + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Several possibile development enviorments may be use: + + - Linux or OSX native + - Cygwin unders Windows + - MinGW + MSYS under Windows + - Windows native (with GNUMake from GNUWin32). + + All testing has been performed using Cygwin under Windows. + + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the several different + toolchain options. + + All testing has been conducted using the NuttX buildroot toolchain. To use + the CodeSourcery, devkitARM or Raisonance GNU toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : Generic GCC ARM EABI toolchain for Windows + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also + have to modify the PATH in the setenv.h file if your make cannot find the + tools. + + NOTE about Windows native toolchains + ------------------------------------ + + The CodeSourcery (for Windows), Atollic, and devkitARM toolchains are + Windows native toolchains. The CodeSourcery (for Linux), NuttX buildroot, + and, perhaps, the generic GCC toolchains are Cygwin and/or Linux native + toolchains. There are several limitations to using a Windows based + toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: Older CodeSourcery toolchains (2009q1) do not work with default + optimization level of -Os (See Make.defs). It will work with -O0, -O1, or + -O2, but not with -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project (There is a simple RIDE project + in the RIDE subdirectory). + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/sam34, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/sam34/sam_vectors.S. You may need to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh sam4s-xplained-pro/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh sam4s-xplained-pro/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +Buttons and LEDs +^^^^^^^^^^^^^^^^ + + Buttons + ------- + + The SAM4S Xplained has two mechanical buttons. One button is the RESET button + connected to the SAM4S reset line and the other is a generic user configurable + button labeled BP2 and connected to GPIO PA5. When a button is pressed it + will drive the I/O line to GND. + + LEDs + ---- +======================= + There is one LED on board the SAM4S Xplained board Pro that can be + controlled by software in the SAM4S: + + LED GPIO + ---------------- ----- + LED0 Yellow LED PC23 + + It can be illuminated by driving the GPIO output to ground (low). + + If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on + board the SAM4S Xplained Pro, otherwise it can controlled by the user + with functions defined into boards file src/sam_userleds.c. + + The user LED is not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/sam_leds.c. The LEDs are used to encode OS- + related events as follows: + + SYMBOL Meaning LED state + LED0 + ------------------- ----------------------- ----------- + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt No change + LED_SIGNAL In a signal handler No change + LED_ASSERTION An assertion failed No change + LED_PANIC The system has crashed OFF + LED_IDLE MCU is is sleep mode Not used + + Thus if LED0 is statically on, NuttX has successfully booted and is, + apparently, running normally. If LED0 is flashing at approximately + 2Hz, then a fatal error has been detected and the system has halted. + +Serial Consoles +^^^^^^^^^^^^^^^ + + UART1 + ----- + If you have a TTL to RS-232 convertor then this is the most convenient + serial console to use. UART1 is the default in all of these + configurations. + + UART1 RXD PB2 J1 pin 3 J4 pin 3 + UART1 TXD PB3 J1 pin 4 J4 pin 4 + GND J1 pin 9 J4 pin 9 + Vdd J1 pin 10 J4 pin 10 + + USART1 + ------ + USART1 is another option: + + USART1 RXD PA21 J2 pin 6 + USART1 TXD PA22 J2 pin 1 + GND J2 pin 9 + Vdd J2 pin 10 + + Virtual COM Port + ---------------- + Yet another option is to use UART0 and the virtual COM port. This + option may be more convenient for long term development, but was + painful to use during board bring-up. + + The SAM4S Xplained contains an Embedded Debugger (EDBG) that can be + used to program and debug the ATSAM4S16C using Serial Wire Debug (SWD). + The Embedded debugger also include a Virtual Com port interface over + USART1. Virtual COM port connections: + + AT91SAM4S16 ATSAM3U4CAU + -------------- -------------- + PA9 RX_UART0 PA9_4S PA12 + PA10 TX_UART0 RX_3U PA11 + +SAM4S Xplained-specific Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="sam34" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_SAM34 + CONFIG_ARCH_CHIP_SAM4S + CONFIG_ARCH_CHIP_ATSAM4D32C + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=sam4s-xplained-pro (for the SAM4S Xplained Pro development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SAM4S_XPLAINED_PRO=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00008000 (32Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_IRQPRIO - The SAM4S supports interrupt prioritization + + CONFIG_ARCH_IRQPRIO=y + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_SAM34_RTC - Real Time Clock + CONFIG_SAM34_RTT - Real Time Timer + CONFIG_SAM34_WDT - Watchdog Timer + CONFIG_SAM34_UART0 - UART 0 + CONFIG_SAM34_UART1 - UART 1 + CONFIG_SAM34_SMC - Static Memory Controller + CONFIG_SAM34_USART0 - USART 0 + CONFIG_SAM34_USART1 - USART 1 + CONFIG_SAM34_HSMCI - High Speed Multimedia Card Interface + CONFIG_SAM34_TWI0 - Two-Wire Interface 0 + CONFIG_SAM34_TWI1 - Two-Wire Interface 1 + CONFIG_SAM34_SPI0 - Serial Peripheral Interface + CONFIG_SAM34_SSC - Synchronous Serial Controller + CONFIG_SAM34_TC0 - Timer Counter 0 + CONFIG_SAM34_TC1 - Timer Counter 1 + CONFIG_SAM34_TC2 - Timer Counter 2 + CONFIG_SAM34_TC3 - Timer Counter 3 + CONFIG_SAM34_TC4 - Timer Counter 4 + CONFIG_SAM34_TC5 - Timer Counter 5 + CONFIG_SAM34_ADC12B - 12-bit Analog To Digital Converter + CONFIG_SAM34_DACC - Digital To Analog Converter + CONFIG_SAM34_PWM - Pulse Width Modulation + CONFIG_SAM34_CRCCU - CRC Calculation Unit + CONFIG_SAM34_ACC - Analog Comparator + CONFIG_SAM34_UDP - USB Device Port + + Some subsystems can be configured to operate in different ways. The drivers + need to know how to configure the subsystem. + + CONFIG_GPIOA_IRQ + CONFIG_GPIOB_IRQ + CONFIG_GPIOC_IRQ + CONFIG_USART0_ISUART + CONFIG_USART1_ISUART + CONFIG_USART2_ISUART + CONFIG_USART3_ISUART + + ST91SAM4S specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + +Configurations +^^^^^^^^^^^^^^ + + Each SAM4S Xplained configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.shsam4s-xplained-pro/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that BUILDROOT_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on UART1 which is available on J1 or J4 (see the + section "Serial Consoles" above). USART1 or the virtual COM + port on UART0 are options. The virtual COM port could + be used, for example, by reconfiguring to use UART0 like: + + System Type -> AT91SAM3/4 Peripheral Support + CONFIG_SAM_UART0=y + CONFIG_SAM_UART1=n + + Device Drivers -> Serial Driver Support -> Serial Console + CONFIG_UART0_SERIAL_CONSOLE=y + + Device Drivers -> Serial Driver Support -> UART0 Configuration + CONFIG_UART0_2STOP=0 + CONFIG_UART0_BAUD=115200 + CONFIG_UART0_BITS=8 + CONFIG_UART0_PARITY=0 + CONFIG_UART0_RXBUFSIZE=256 + CONFIG_UART0_TXBUFSIZE=256 + + 3. Unless otherwise stated, the configurations are setup for + Linux (or any other POSIX environment like Cygwin under Windows): + + Build Setup: + CONFIG_HOST_LINUX=y : Linux or other POSIX environment + + 4. These configurations use the older, OABI, buildroot toolchain. But + that is easily reconfigured: + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot toolchain + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : Older, OABI toolchain + + If you want to use the Atmel GCC toolchain, here are the steps to + do so: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_HOST_CYGWIN=y : Using Cygwin or other POSIX environment + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : General GCC EABI toolchain under windows + + This re-configuration should be done before making NuttX or else the + subsequent 'make' will fail. If you have already attempted building + NuttX then you will have to 1) 'make distclean' to remove the old + configuration, 2) 'cd tools; ./configure.sh sam3u-ek/ksnh' to start + with a fresh configuration, and 3) perform the configuration changes + above. + + Also, make sure that your PATH variable has the new path to your + Atmel tools. Try 'which arm-none-eabi-gcc' to make sure that you + are selecting the right tool. setenv.sh is available for you to + use to set or PATH variable. The path in the that file may not, + however, be correct for your installation. + + See also the "NOTE about Windows native toolchains" in the section call + "GNU Toolchain Options" above. + +Configuration sub-directories +----------------------------- + + nsh: + This configuration directory will built the NuttShell. See NOTES above. + + NOTES: + 1. The configuration configuration can be modified to include support + for the on-board SRAM (1MB). + + System Type -> External Memory Configuration + CONFIG_SAM34_EXTSRAM0=y : Select SRAM on CS0 + CONFIG_SAM34_EXTSRAM0SIZE=1048576 : Size=1MB + + Now what are you going to do with the SRAM. There are two choices: + + a) To enable the NuttX RAM test that may be used to verify the + external SRAM: + + System Type -> External Memory Configuration + CONFIG_SAM34_EXTSRAM0HEAP=n : Don't add to heap + + Application Configuration -> System NSH Add-Ons + CONFIG_SYSTEM_RAMTEST=y : Enable the RAM test built-in + + In this configuration, the SDRAM is not added to heap and so is + not excessible to the applications. So the RAM test can be + freely executed against the SRAM memory beginning at address + 0x6000:0000 (CS0). + + nsh> ramtest -h + Usage: [-w|h|b] + + Where: + starting address of the test. + number of memory locations (in bytes). + -w Sets the width of a memory location to 32-bits. + -h Sets the width of a memory location to 16-bits (default). + -b Sets the width of a memory location to 8-bits. + + To test the entire external SRAM: + + nsh> ramtest 60000000 1048576 + RAMTest: Marching ones: 60000000 1048576 + RAMTest: Marching zeroes: 60000000 1048576 + RAMTest: Pattern test: 60000000 1048576 55555555 aaaaaaaa + RAMTest: Pattern test: 60000000 1048576 66666666 99999999 + RAMTest: Pattern test: 60000000 1048576 33333333 cccccccc + RAMTest: Address-in-address test: 60000000 1048576 + + b) To add this RAM to the NuttX heap, you would need to change the + configuration as follows: + + System Type -> External Memory Configuration + CONFIG_SAM34_EXTSRAM0HEAP=y : Add external RAM to heap + + Memory Management + -CONFIG_MM_REGIONS=1 : Only the internal SRAM + +CONFIG_MM_REGIONS=2 : Also include external SRAM diff --git a/configs/sam4s-xplained-pro/TODO.txt b/configs/sam4s-xplained-pro/TODO.txt new file mode 100644 index 0000000000000000000000000000000000000000..5c1a088abdf6f46b5deb6fd987bd41fbae825135 --- /dev/null +++ b/configs/sam4s-xplained-pro/TODO.txt @@ -0,0 +1,56 @@ + - implement flash driver + - see arch/arm/src/stm32/stm32_flash.c and related + - both banks could be mapped with care taken not to erase the active code. + - perhaps the MPU could block code corruption? + + - once implemented, the free() cmd replacement can show flash information. + + - Seen crashes when running serial ports below 921600 + + - COM34 (UART1, ttyS1) runs the smoothest with 'serialblaster' test... + the other two (UART0, USART1) seem to stutter... + + - created a cpuhog test. Each instance takes a semaphore, burns cpu for 6ms and then releases + the sem to exercises semaphores passing and a busy cpu. The first two instances become a + producer/consumer pair using a pipe (FIFO) to exercise the fileio data passing. + -> no crashes with 8 instances running. (No MMU, No BASEPRI) + -> no crashes with 8 instances running. (MMU + BASEPRI) + -> not however that the serial ports are very finicky with BASEPRI enabled! + This setup sends single charactes for each produced or consumed block, + and doesn't seem to have any issues: + NuttShell (NSH) + nsh> cpuhog > /dev/ttyS1 & + cpuhog [5:50] + nsh> cpuhog > /dev/ttyS2 & + cpuhog [7:50] + nsh> cpuhog & + cpuhog [8:50] + nsh> cpuhog 2 + cpuhog & + cpuhog [9:50] + nsh> cpuhog 3 + cpuhog & + cpuhog [10:50] + nsh> cpuhog 4 + cpuhog & + cpuhog [11:50] + nsh> cpuhog 5 + + nsh> cpuhog & + cpuhog [12:50] + nsh> cpuhog 6 + + nsh> cpuhog & + cpuhog [13:50] + nsh> cpuhog 7 + + - USB serial not quite stable when pushing lots of data + + - UARTs don't use DMA. We may need this for high baudrates. + - Inbound hardware flow control requires dma. + +Current Test: + +40mA: 120Mhz (240 MHz PLL) with SDCard mounted, UART0+UART1+USART1 enabled, USB Device availible (but nothing plugged in) +37.8mA: 120Mhz (120 MHz PLL) with SDCard mounted, UART0+UART1+USART1 enabled +16.9mA: "" with WFI added to up_idle() diff --git a/configs/sam4s-xplained-pro/include/board.h b/configs/sam4s-xplained-pro/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..58380480a9d07dd5e23f745b5086b50673e6841b --- /dev/null +++ b/configs/sam4s-xplained-pro/include/board.h @@ -0,0 +1,290 @@ +/************************************************************************************ + * configs/sam4s-xplained-pro/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Bob Doiron + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAM4S_XPLAINED_PRO_INCLUDE_BOARD_H +#define __CONFIGS_SAM4S_XPLAINED_PRO_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#ifndef __ASSEMBLY__ +# include +# ifdef CONFIG_GPIO_IRQ +# include +# endif +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the sam4s device is running on a 4MHz internal RC. These + * definitions will configure clocking with MCK = 120MHz, PLLA = 240, and CPU=120MHz. + */ + +#define BOARD_32KOSC_FREQUENCY (32768) +#define BOARD_SCLK_FREQUENCY (BOARD_32KOSC_FREQUENCY) +#define BOARD_MAINOSC_FREQUENCY (12000000) + +/* Main oscillator register settings */ + +#define BOARD_CKGR_MOR_MOSCXTST (63 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +#ifdef CONFIG_SAM34_UDP +/* PLLA configuration: + * + * Source: 12MHz crystall at 12MHz + * PLLmul: 10 + * PLLdiv: 1 (bypassed) + * Fpll: (12MHz * 20) / 1 = 240MHz + */ + +# define BOARD_CKGR_PLLAR_MUL (19 << PMC_CKGR_PLLAR_MUL_SHIFT) +# define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS +# define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +# define BOARD_PLLA_FREQUENCY (20*BOARD_MAINOSC_FREQUENCY) /* PLLA = 240Mhz */ + +/* PMC master clock register settings */ + +# define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +# define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV2 +# define BOARD_MCK_FREQUENCY (BOARD_PLLA_FREQUENCY/2) /* MCK = 120Mhz */ +# define BOARD_CPU_FREQUENCY (BOARD_PLLA_FREQUENCY/2) /* CPU = 120Mhz */ + +/* USB UTMI PLL start-up time */ + +# define BOARD_CKGR_UCKR_UPLLCOUNT (3 << PMC_CKGR_UCKR_UPLLCOUNT_SHIFT) + +#else +/* PLLA configuration: + * + * Source: 12MHz crystall at 12MHz + * PLLmul: 10 + * PLLdiv: 1 (bypassed) + * Fpll: (12MHz * 10) / 1 = 120MHz + */ + +# define BOARD_CKGR_PLLAR_MUL (9 << PMC_CKGR_PLLAR_MUL_SHIFT) +# define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS +# define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +# define BOARD_PLLA_FREQUENCY (10*BOARD_MAINOSC_FREQUENCY) /* PLLA = 120Mhz */ + +/* PMC master clock register settings */ + +# define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +# define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 +# define BOARD_MCK_FREQUENCY (BOARD_PLLA_FREQUENCY) /* MCK = 120Mhz */ +# define BOARD_CPU_FREQUENCY (BOARD_PLLA_FREQUENCY) /* CPU = 120Mhz */ +#endif + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV+1)). + * + * MCI_SPEED = MCK / (2*(CLKDIV+1)) + * CLKDIV = MCI / MCI_SPEED / 2 - 1 + */ + +/* MCK = 120MHz, CLKDIV = 149, MCI_SPEED = 120MHz / 2 * (149+1) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (149 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 120MHz, CLKDIV = 3, MCI_SPEED = 120MHz / 2 * (3+1) = 15 MHz */ + +#define HSMCI_MMCXFR_CLKDIV (3 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 120MHz, CLKDIV = 0, MCI_SPEED = 120MHz / 2 * (2+1) = 20 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +#ifdef CONFIG_SAM34_UDP +/* The PLL clock (USB_48M or UDPCK) is driven from the output of the PLL, + * PLLACK. The PLL clock must be 48MHz. PLLACK can be divided down via the + * PMC USB register to provide the PLL clock. So in order to use the USB + * feature, the PLL output must be a multiple of 48MHz. + * + * PLLACK = 240MHz, USBDIV=4, USB_48M = 240 MHz / (4 + 1) = 48MHz + * PLLACK = 192MHz, USBDIV=5, USB_48M = 192 MHz / (3 + 1) = 48MHz + */ + +# define BOARD_PMC_USBS (0) +# define BOARD_PMC_USBDIV (4 << PMC_USB_USBDIV_SHIFT) +#endif + +/* FLASH wait states: + * + * DC Characteristics + * + * Parameter Min Typ Max + * ---------------------- ----- ----- ---- + * Vddcore DC Supply Core 1.08V 1.2V 1.32V + * Vvddio DC Supply I/Os 1.62V 3.3V 3.6V + * + * Wait Maximum + * Vddcore Vvddio States Frequency (MHz) + * ------- ---------- ------ --------------- + * 1.08V 1.62-3.6V 0 16 + * " " " "-" " 1 33 + * " " " "-" " 2 50 + * " " " "-" " 3 67 + * " " " "-" " 4 84 + * " " " "-" " 5 100 + * 1.08V 2.7-3.6V 0 20 + * " " " "-" " 1 40 + * " " " "-" " 2 60 + * " " " "-" " 3 80 + * " " " "-" " 4 100 + * 1.2V 1.62-3.6V 0 17 + * " " " "-" " 1 34 + * " " " "-" " 2 52 + * " " " "-" " 3 69 + * " " " "-" " 4 87 + * " " " "-" " 5 104 + * " " " "-" " 6 121 + * 1.2V 2.7-3.6V 0 21 + * " " " "-" " 1 42 + * " " " "-" " 2 63 + * " " " "-" " 3 84 + * " " " "-" " 4 105 + * " " " "-" " 5 123 << SELECTION + */ + +#define BOARD_FWS 5 + +/* LED definitions ******************************************************************/ +/* There are two LEDs on board the SAM4S Xplained Pro board, One of these can be + * controlled by software in the SAM4S: + * + * LED GPIO + * ---------------- ----- + * D301 Yellow LED PC23 + * + * Both can be illuminated by driving the GPIO output to ground (low). + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_D301 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_D301_BIT (1 << BOARD_D301) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/up_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL Val Meaning LED state + * D301 + * ----------------------- --- ----------------------- -------------- */ +#define LED_STARTED 0 /* NuttX has been started OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON */ +#define LED_INIRQ 2 /* In an interrupt OFF */ +#define LED_SIGNAL 2 /* In a signal handler OFF */ +#define LED_ASSERTION 4 /* An assertion failed No change */ +#define LED_PANIC 3 /* The system has crashed Flash @ 250ms */ +#define LED_IDLE 4 /* MCU is is sleep mode Not used */ + +#define LED_D301_OFF true /* GPIO high for OFF */ +#define LED_D301_ON false /* GPIO low for ON */ + +/* Thus if D301 is statically on, NuttX has successfully booted and is, + * apparently, running normally. + */ + +/* Button definitions ***************************************************************/ +/* Mechanical buttons: + * + * The SAM4S Xplained Pro has two mechanical buttons. One button is the RESET button + * connected to the SAM4S reset line and the other is a generic user configurable + * button labeled SW0. When a button is pressed it will drive the I/O line to GND. + * + * PA2 SW0 + */ + +#define BUTTON_SW0 0 +#define NUM_BUTTONS 1 + +#define BUTTON_SW0_BIT (1 << BUTTON_SW0) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAM4S_XPLAINED_PRO_INCLUDE_BOARD_H */ diff --git a/configs/sam4s-xplained-pro/nsh/Make.defs b/configs/sam4s-xplained-pro/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6755b3e21eb45c4630e8e3eea4b2667cdac954e3 --- /dev/null +++ b/configs/sam4s-xplained-pro/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/sam4s-xplained-pro/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/sam4s-xplained-pro/nsh/defconfig b/configs/sam4s-xplained-pro/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..251b028c77970c4da4e5abcd6b2f8e99c2f45cb3 --- /dev/null +++ b/configs/sam4s-xplained-pro/nsh/defconfig @@ -0,0 +1,1086 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_PROTECTED is not set +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +CONFIG_ARCH_CHIP_SAM34=y +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="sam34" +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +CONFIG_ARM_MPU=y +CONFIG_ARM_MPU_NREGIONS=8 + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTNOR=y +CONFIG_ARCH_HAVE_EXTSRAM0=y +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set +CONFIG_ARCH_HAVE_EXTSRAM1=y + +# +# AT91SAM3/4 Configuration Options +# +# CONFIG_ARCH_CHIP_ATSAM3U4E is not set +# CONFIG_ARCH_CHIP_ATSAM3U4C is not set +# CONFIG_ARCH_CHIP_ATSAM3U2E is not set +# CONFIG_ARCH_CHIP_ATSAM3U2C is not set +# CONFIG_ARCH_CHIP_ATSAM3U1E is not set +# CONFIG_ARCH_CHIP_ATSAM3U1C is not set +# CONFIG_ARCH_CHIP_ATSAM3X8E is not set +# CONFIG_ARCH_CHIP_ATSAM3X8C is not set +# CONFIG_ARCH_CHIP_ATSAM3X4E is not set +# CONFIG_ARCH_CHIP_ATSAM3X4C is not set +# CONFIG_ARCH_CHIP_ATSAM3A8C is not set +# CONFIG_ARCH_CHIP_ATSAM3A4C is not set +# CONFIG_ARCH_CHIP_ATSAM4CMP16B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4A is not set +CONFIG_ARCH_CHIP_ATSAM4SD32C=y +# CONFIG_ARCH_CHIP_ATSAM4SD32B is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16B is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S16C is not set +# CONFIG_ARCH_CHIP_ATSAM4S16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S8C is not set +# CONFIG_ARCH_CHIP_ATSAM4S8B is not set +# CONFIG_ARCH_CHIP_ATSAM4E16E is not set +# CONFIG_ARCH_CHIP_ATSAM4E16C is not set +# CONFIG_ARCH_CHIP_ATSAM4E8E is not set +# CONFIG_ARCH_CHIP_ATSAM4E8C is not set +# CONFIG_ARCH_CHIP_SAM3U is not set +# CONFIG_ARCH_CHIP_SAM3X is not set +# CONFIG_ARCH_CHIP_SAM3A is not set +# CONFIG_ARCH_CHIP_SAM4CM is not set +# CONFIG_ARCH_CHIP_SAM4L is not set +# CONFIG_ARCH_CHIP_SAM4E is not set +CONFIG_ARCH_CHIP_SAM4S=y + +# +# AT91SAM3/4 Peripheral Support +# +# CONFIG_SAM34_ACC is not set +# CONFIG_SAM34_ADC12B is not set +# CONFIG_SAM34_CRCCU is not set +# CONFIG_SAM34_DACC is not set +# CONFIG_SAM34_DMAC1 is not set +CONFIG_SAM34_HSMCI=y +CONFIG_SAM34_PDCA=y +# CONFIG_SAM34_PWM is not set +CONFIG_SAM34_RTC=y +CONFIG_SAM34_RTT=y +CONFIG_SAM34_SMC=y +# CONFIG_SAM34_SPI0 is not set +# CONFIG_SAM34_SSC is not set +CONFIG_SAM34_TC0=y +CONFIG_SAM34_TC1=y +# CONFIG_SAM34_TC2 is not set +# CONFIG_SAM34_TC3 is not set +# CONFIG_SAM34_TC4 is not set +# CONFIG_SAM34_TC5 is not set +# CONFIG_SAM34_TWI is not set +# CONFIG_SAM34_TWIM is not set +# CONFIG_SAM34_TWIS is not set +# CONFIG_SAM34_TWIM0 is not set +# CONFIG_SAM34_TWIS0 is not set +# CONFIG_SAM34_TWIM1 is not set +# CONFIG_SAM34_TWIS1 is not set +CONFIG_SAM34_UART0=y +CONFIG_SAM34_UART1=y +CONFIG_SAM34_UDP=y +# CONFIG_SAM34_USART0 is not set +CONFIG_SAM34_USART1=y +CONFIG_SAM34_WDT=y + +# +# AT91SAM3/4 External Memory Configuration +# +CONFIG_SAM34_EXTNAND=y +CONFIG_SAM34_EXTNANDSIZE=268435456 +# CONFIG_SAM34_EXTNOR is not set +# CONFIG_SAM34_EXTSRAM0 is not set +# CONFIG_SAM34_EXTSRAM1 is not set + +# +# AT91SAM3/4 GPIO Interrupt Configuration +# +# CONFIG_SAM34_HAVE_GPIOD_IRQ is not set +# CONFIG_SAM34_HAVE_GPIOE_IRQ is not set +# CONFIG_SAM34_HAVE_GPIOF_IRQ is not set +CONFIG_SAM34_GPIO_IRQ=y +# CONFIG_SAM34_GPIOA_IRQ is not set +# CONFIG_SAM34_GPIOB_IRQ is not set +CONFIG_SAM34_GPIOC_IRQ=y + +# +# AT91SAM3/4 HSMCI device driver options +# +# CONFIG_SAM34_HSMCI_RDPROOF is not set +# CONFIG_SAM34_HSMCI_WRPROOF is not set + +# +# AT91SAM3/4 USB Full Speed Device Controller driver (DCD) options +# +CONFIG_SAM34_TC=y + +# +# AT91SAM3/4 Timer/Counter options +# + +# +# AT91SAM3/4 Watchdog Configuration +# +CONFIG_WDT_ENABLED_ON_RESET=y +# CONFIG_WDT_DISABLE_ON_RESET is not set +CONFIG_WDT_TIMEOUT=5000 +CONFIG_WDT_MINTIME=2500 +CONFIG_WDT_THREAD=y +CONFIG_WDT_THREAD_NAME="wdog" +CONFIG_WDT_THREAD_INTERVAL=2500 +CONFIG_WDT_THREAD_PRIORITY=200 +CONFIG_WDT_THREAD_STACKSIZE=512 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +CONFIG_ARCH_HAVE_EXTCLK=y +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +CONFIG_ARCH_USE_MPU=y +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=9186 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=163840 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAM4S_XPLAINED_PRO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sam4s-xplained-pro" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_SAM4S_XPLAINED_PRO_CDCACM_DEVMINOR=0 +CONFIG_SAM4S_XPLAINED_PRO_SCHED_TIMER_DEVPATH="/dev/rtt0" +CONFIG_SAM4S_XPLAINED_PRO_CPULOAD_TIMER_DEVPATH="/dev/tc0" +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +CONFIG_SYSTEMTICK_EXTCLK=y +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +CONFIG_JULIAN_TIME=y +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=50 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=15 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +CONFIG_SCHED_CPULOAD=y +CONFIG_SCHED_CPULOAD_EXTCLK=y +CONFIG_SCHED_CPULOAD_TICKSPERSEC=222 +CONFIG_SCHED_CPULOAD_TIMECONSTANT=2 +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=16 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=8 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=512 +CONFIG_PTHREAD_STACK_DEFAULT=4096 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +CONFIG_TIMER=y +CONFIG_RTC=y +# CONFIG_RTC_DATETIME is not set +CONFIG_RTC_HIRES=y +CONFIG_RTC_FREQUENCY=32768 +CONFIG_RTC_ALARM=y +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_PIPES=y +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_UART0_SERIAL_CONSOLE is not set +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_USART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_UART1_DMA is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +CONFIG_ARCH_USBDEV_STALLQUEUE=y +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=250 +CONFIG_CDCACM_RXBUFSIZE=1024 +CONFIG_CDCACM_TXBUFSIZE=1024 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_CPULOAD is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=256 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIBC_STRERROR=y +CONFIG_LIBC_STRERROR_SHORT=y +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +CONFIG_EXAMPLES_CPUHOG=y +CONFIG_EXAMPLES_CPUHOG_STACKSIZE=2048 +CONFIG_EXAMPLES_CPUHOG_PRIORITY=50 +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +CONFIG_EXAMPLES_SERIALBLASTER=y +CONFIG_EXAMPLES_SERIALBLASTER_STACKSIZE=2048 +CONFIG_EXAMPLES_SERIALBLASTER_PRIORITY=50 +CONFIG_EXAMPLES_SERIALRX=y +CONFIG_EXAMPLES_SERIALRX_STACKSIZE=2048 +CONFIG_EXAMPLES_SERIALRX_PRIORITY=50 +# CONFIG_EXAMPLES_SERIALRX_BUFFERED is not set +CONFIG_EXAMPLES_SERIALRX_BUFSIZE=4096 +CONFIG_EXAMPLES_SERIALRX_DEVPATH="/dev/ttyS0" +# CONFIG_EXAMPLES_SERIALRX_PRINTHYPHEN is not set +CONFIG_EXAMPLES_SERIALRX_PRINTHEX=y +# CONFIG_EXAMPLES_SERIALRX_PRINTSTR is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIMER is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +CONFIG_NSH_DISABLE_DELROUTE=y +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=2048 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sam4s-xplained-pro/nsh/setenv.sh b/configs/sam4s-xplained-pro/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..b5c9eba437a4a6b069f843d94989fa1937f5ee30 --- /dev/null +++ b/configs/sam4s-xplained-pro/nsh/setenv.sh @@ -0,0 +1,73 @@ +#!/bin/bash +# configs/sam4s-xplained-pro/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sam4s-xplained-pro/scripts/ld.script b/configs/sam4s-xplained-pro/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..dee9c22187de3115261d4c5b8074a1c985cdf344 --- /dev/null +++ b/configs/sam4s-xplained-pro/scripts/ld.script @@ -0,0 +1,126 @@ +/**************************************************************************** + * configs/sam4s-xplained-pro/scripts/ld.script + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The ATSAM4SD32C has 2 banks of 1MB of FLASH beginning at address + * 0x0040:0000 and 160KB of SRAM beginning at address 0x2000:0000 + * + * Flash 0 / 1 can be swapped with the GPNVM bit 2. We'll avoid using + * the 2nd bank to allow this as an option for firmware upgrading or failsafe + * + */ + +MEMORY +{ + flash0 (rx) : ORIGIN = 0x00400000, LENGTH = 1024K + flash1 (rx) : ORIGIN = 0x00500000, LENGTH = 1024K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 160K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash0 + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash0 + + .ARM.extab : { + *(.ARM.extab*) + } >flash0 + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } >flash0 + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash0 + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > sram AT > flash0 + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sam4s-xplained-pro/src/Makefile b/configs/sam4s-xplained-pro/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..62b5b37250360012b8e2655c67318fb92d2816ef --- /dev/null +++ b/configs/sam4s-xplained-pro/src/Makefile @@ -0,0 +1,71 @@ +############################################################################ +# configs/sam4s-xplained-pro/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += sam_appinit.c +endif + +ifeq ($(CONFIG_SAM34_HSMCI),y) +CSRCS += sam_hsmci.c +endif + +ifeq ($(CONFIG_SAM34_UDP),y) +CSRCS += sam_udp.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += sam_autoleds.c +else +CSRCS += sam_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += sam_buttons.c +endif + +ifeq ($(CONFIG_SAM34_WDT),y) +CSRCS += sam_wdt.c +endif + +ifeq ($(CONFIG_TIMER),y) +CSRCS += sam_tc.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/sam4s-xplained-pro/src/sam4s-xplained-pro.h b/configs/sam4s-xplained-pro/src/sam4s-xplained-pro.h new file mode 100644 index 0000000000000000000000000000000000000000..9cd4a9ab6811e94f678003646d37cb6a8dc10535 --- /dev/null +++ b/configs/sam4s-xplained-pro/src/sam4s-xplained-pro.h @@ -0,0 +1,233 @@ +/************************************************************************************ + * configs/sam4s-xplained-pro/src/sam4s-xplained-pro.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Bob Doiron + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAM4S_XPLAINED_SRC_SAM4S_XPLAINED_H +#define __CONFIGS_SAM4S_XPLAINED_SRC_SAM4S_XPLAINED_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +#include +#include + +#include "chip/sam_pinmap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#define HAVE_HSMCI 1 +#define HAVE_PROC 1 +#define HAVE_USBDEV 1 +#undef HAVE_USBMONITOR + +/* HSMCI */ +/* Can't support MMC/SD if the card interface is not enabled */ + +#if !defined(CONFIG_SAM34_HSMCI) +# undef HAVE_HSMCI +#endif + +#if !defined(CONFIG_FS_PROCFS) +# undef HAVE_PROC +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(HAVE_HSMCI) && defined(CONFIG_DISABLE_MOUNTPOINT) +# warning Mountpoints disabled. No MMC/SD support +# undef HAVE_HSMCI +#endif + +#if defined(HAVE_PROC) && defined(CONFIG_DISABLE_MOUNTPOINT) +# warning Mountpoints disabled. No procfs support +# undef HAVE_PROC +#endif + +/* We need PIO interrupts on PIOC to support card detect interrupts */ + +#if defined(HAVE_HSMCI) && !defined(CONFIG_SAM34_GPIOC_IRQ) +# warning PIOC interrupts not enabled. No MMC/SD support. +# undef HAVE_HSMCI +#endif + +/* USB Device */ +/* CONFIG_SAM34_UDP and CONFIG_USBDEV must be defined, or there is no USB + * device. + */ + +#if !defined(CONFIG_SAM34_UDP) || !defined(CONFIG_USBDEV) ||!defined(CONFIG_CDCACM) +# undef HAVE_USBDEV +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#ifndef HAVE_USBDEV +# undef CONFIG_USBDEV_TRACE +#endif + +#if !defined(CONFIG_SYSTEM_USBMONITOR) && !defined(CONFIG_USBDEV_TRACE) +# undef HAVE_USBMONITOR +#endif + +/* There is one LED on board the SAM4S Xplained board Pro that can be + * controlled by software in the SAM4S: + * + * LED GPIO + * ---------------- ----- + * LED0 Yellow LED PC23 + * + * It can be illuminated by driving the GPIO output to ground (low). + * + * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on + * board the SAM4S Xplained Pro, otherwise it can controlled by the user + * with functions defined into boards file src/sam_userleds.c. + * + * The following definitions describe how NuttX + * controls the LEDs: + * + * SYMBOL Meaning LED state + * LED0 + * ------------------- ----------------------- ----------- + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt No change + * LED_SIGNAL In a signal handler No change + * LED_ASSERTION An assertion failed No change + * LED_PANIC The system has crashed OFF + * LED_IDLE MCU is is sleep mode Not used + */ + +#define GPIO_D301 (GPIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN23) + +/* Mechanical buttons: + * + * The SAM4S Xplained Pro has two mechanical buttons. One button is the RESET button + * connected to the SAM4S reset line and the other is a generic user configurable + * button labeled SW0. When a button is pressed it will drive the I/O line to GND. + * + * PA2 SW0 + */ + +#define GPIO_SW0 (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOA | GPIO_PIN2) +#define IRQ_SW0 SAM_IRQ_PA2 + +/* HSMCI SD Card Detect PC12 */ + +#define GPIO_MCI_CD (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_PORT_PIOC | GPIO_PIN12) +#define MCI_CD_IRQ SAM_IRQ_PC12 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_hsmci_initialize + * + * Description: + * Initialize HSMCI support + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +int sam_hsmci_initialize(void); +#else +# define sam_hsmci_initialize() +#endif + +/************************************************************************************ + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ************************************************************************************/ + +#if defined(HAVE_HSMCI) && defined(CONFIG_MMCSD_HAVECARDDETECT) +bool sam_cardinserted(int slotno); +#endif + +/************************************************************************************ + * Name: sam_writeprotected + * + * Description: + * Check if the card in the MMCSD slot is write protected + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_writeprotected(int slotno); +#else +# define sam_writeprotected(slotno) (false) +#endif + +/************************************************************************************ + * Name: sam_timerinitialize() + * + * Description: + * Perform architecture-specific initialization of the timer hardware. + * + ************************************************************************************/ + +#ifdef CONFIG_TIMER +int sam_timerinitialize(void); +#else +# define sam_timerinitialize() (0) +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAM4S_XPLAINED_SRC_SAM4S_XPLAINED_H */ diff --git a/configs/sam4s-xplained-pro/src/sam_appinit.c b/configs/sam4s-xplained-pro/src/sam_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..e85b97ae934e0ccad23927930ee4b0f8d2738336 --- /dev/null +++ b/configs/sam4s-xplained-pro/src/sam_appinit.c @@ -0,0 +1,164 @@ +/**************************************************************************** + * config/sam4s-xplained-pro/src/sam_appinit.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Bob Doiron + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include +#include + +#include +#include + +#ifdef CONFIG_CDCACM +# include +#endif + +#ifdef CONFIG_PL2303 +# include +#endif + +#ifdef CONFIG_TIMER +# include +#endif + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#include "sam4s-xplained-pro.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined (HAVE_USBDEV) || defined(HAVE_HSMCI) || defined (HAVE_PROC) || \ + defined(HAVE_USBMONITOR) + int ret; +#endif + +#ifdef HAVE_USBDEV + syslog(LOG_INFO, "Registering CDC/ACM serial driver\n"); + + ret = cdcacm_initialize(CONFIG_SAM4S_XPLAINED_PRO_CDCACM_DEVMINOR, NULL); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to create the CDC/ACM serial device: %d (%d)\n", + ret, errno); + return ret; + } +#endif + +#ifdef HAVE_HSMCI + /* Initialize the HSMCI driver */ + + syslog(LOG_INFO, "initializing HSMCI\n"); + + ret = sam_hsmci_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: sam_hsmci_initialize() failed: %d (%d)\n", + ret, errno); + return ret; + } +#endif + +#ifdef HAVE_PROC + /* mount the proc filesystem */ + + syslog(LOG_INFO, "Mounting procfs to /proc\n"); + + ret = mount(NULL, "/proc", "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to mount the PROC filesystem: %d (%d)\n", + ret, errno); + return ret; + } +#endif + +#if HAVE_HSMCI + syslog(LOG_INFO, "Mounting /dev/mmcsd0 to /fat\n"); + + ret = mount("/dev/mmcsd0", "/fat", "vfat", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to mount the FAT filesystem: %d (%d)\n", + ret, errno); + return ret; + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + syslog(LOG_INFO, "Starting USB Monitor\n"); + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d (%d)\n", ret, errno); + return ret; + } +#endif + + return OK; +} diff --git a/configs/sam4s-xplained-pro/src/sam_autoleds.c b/configs/sam4s-xplained-pro/src/sam_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..442e0ad7365508d5359368dcf275ff13cb6efbd3 --- /dev/null +++ b/configs/sam4s-xplained-pro/src/sam_autoleds.c @@ -0,0 +1,163 @@ +/**************************************************************************** + * configs/sam4s-xplained-pro/src/sam_autoleds.c + * + * Copyright (C) 2014, 2015 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Bob Doiron + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "sam_gpio.h" +#include "sam4s-xplained-pro.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on + * board the SAM4S Xplained Pro. The following definitions describe how NuttX + * controls the LEDs: + * + * SYMBOL Meaning LED state + * D9 D10 + * ------------------- ----------------------- -------- -------- + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt No change + * LED_SIGNAL In a signal handler No change + * LED_ASSERTION An assertion failed No change + * LED_PANIC The system has crashed OFF + * LED_IDLE MCU is is sleep mode Not used + */ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED GPIO for output */ + + sam_configgpio(GPIO_D301); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED - off while initializing */ + sam_gpiowrite(GPIO_D301, LED_D301_OFF); + break; + + case 1: /* LED_STACKCREATED - turn on when ready */ + sam_gpiowrite(GPIO_D301, LED_D301_ON); + break; + + case 2: /* LED_INIRQ, LED_SIGNAL - turn off inside irqs/signal processing */ + sam_gpiowrite(GPIO_D301, LED_D301_OFF); + return; + + case 3: /* LED_PANIC - flash */ + sam_gpiowrite(GPIO_D301, LED_D301_ON); + break; + + default: + break; + } + +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + default: + break; + + case 2: /* LED_INIRQ, LED_SIGNAL - return to on after irq/signal processing */ + sam_gpiowrite(GPIO_D301, LED_D301_ON); + return; + + case 3: /* LED_PANIC - flashes */ + sam_gpiowrite(GPIO_D301, LED_D301_OFF); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/sam4s-xplained-pro/src/sam_boot.c b/configs/sam4s-xplained-pro/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..f8caef92c07781c889b592e7a1e048bcbba85354 --- /dev/null +++ b/configs/sam4s-xplained-pro/src/sam_boot.c @@ -0,0 +1,116 @@ +/************************************************************************************ + * configs/sam4s-xplained-pro/src/sam_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "sam4s-xplained-pro.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void) +{ +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} + + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_initialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ +#if (defined(CONFIG_SAM34_WDT) && !defined(CONFIG_WDT_DISABLE_ON_RESET)) + /* Configure watchdog timer and enable kicker kernel thread. */ + + DEBUGASSERT(up_wdginitialize() >= 0); +#endif + +#ifndef CONFIG_ARCH_LEDS + /* Initialize user led */ + + sam_led_initialize(); +#endif + +#ifdef CONFIG_TIMER + /* Registers the timers and starts any async processes (which may include the scheduler) */ + + sam_timerinitialize(); +#endif + +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/sam4s-xplained-pro/src/sam_buttons.c b/configs/sam4s-xplained-pro/src/sam_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..85d461217a5494db24985809b763e73e98ce7f5c --- /dev/null +++ b/configs/sam4s-xplained-pro/src/sam_buttons.c @@ -0,0 +1,172 @@ +/**************************************************************************** + * configs/sam4s-xplained-pro/src/sam_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Bob Doiron + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "sam4s-xplained-pro.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static xcpt_t g_irqsw0; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + (void)sam_configgpio(GPIO_SW0); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return sam_gpioread(GPIO_SW0) ? 0 : BUTTON_SW0_BIT; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address is returned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the + * overall GPIO IRQ feature and CONFIG_AVR32_GPIOIRQSETA and/or + * CONFIG_AVR32_GPIOIRQSETB must be enabled to select GPIOs to support + * interrupts on. For button support, bits 2 and 3 must be set in + * CONFIG_AVR32_GPIOIRQSETB (PB2 and PB3). + * + ****************************************************************************/ + +#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id == BUTTON_SW0) + { + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = g_irqsw0; + g_irqsw0 = irqhandler; + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + /* Configure the interrupt */ + + sam_gpioirq(GPIO_SW0); + (void)irq_attach(IRQ_SW0, irqhandler); + sam_gpioirqenable(IRQ_SW0); + } + else + { + /* Detach and disable the interrupt */ + + (void)irq_detach(IRQ_SW0); + sam_gpioirqdisable(IRQ_SW0); + } + + leave_critical_section(flags); + } + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/sam4s-xplained-pro/src/sam_hsmci.c b/configs/sam4s-xplained-pro/src/sam_hsmci.c new file mode 100644 index 0000000000000000000000000000000000000000..eedc7a475a2457999987514815fac3ad757fe163 --- /dev/null +++ b/configs/sam4s-xplained-pro/src/sam_hsmci.c @@ -0,0 +1,231 @@ +/**************************************************************************** + * config/sam4s-xplained-pro/src/sam_hsmci.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Bob Doiron + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "sam_hsmci.h" + +#include "sam4s-xplained-pro.h" + +#ifdef HAVE_HSMCI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ +/* This structure holds static information unique to one HSMCI peripheral */ + +struct sam_hsmci_state_s +{ + struct sdio_dev_s *hsmci; /* R/W device handle */ + bool initialized; /* TRUE: HSMCI block driver is initialized */ + bool inserted; /* TRUE: card is inserted */ +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* HSCMI device state */ + +static struct sam_hsmci_state_s g_hsmci; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_hsmci_cardetect_int + * + * Description: + * Card detect interrupt handler + * + * TODO: Any way to automatically moun/unmount filesystem based on card + * detect status? Yes... send a message or signal to an application. + * + ****************************************************************************/ + +#ifdef CONFIG_MMCSD_HAVECARDDETECT +static int sam_hsmci_cardetect_int(int irq, void *regs) +{ + bool inserted; + + /* Get the state of the GPIO pin */ + + inserted = sam_cardinserted(0); + + /* Has the card detect state changed? */ + + if (inserted != g_hsmci.inserted) + { + /* Yes... remember that new state and inform the HSMCI driver */ + + g_hsmci.inserted = inserted; + + /* Report the new state to the SDIO driver */ + + sdio_mediachange(g_hsmci.hsmci, inserted); + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_hsmci_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int sam_hsmci_initialize(void) +{ + int ret; + fdbg("Initializing SDIO\n"); + + /* Have we already initialized? */ + + if (!g_hsmci.initialized) + { + /* Mount the SDIO-based MMC/SD block driver */ + /* First, get an instance of the SDIO interface */ + + g_hsmci.hsmci = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!g_hsmci.hsmci) + { + fdbg("Failed to initialize SDIO\n"); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, g_hsmci.hsmci); + if (ret != OK) + { + fdbg("Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + +#ifdef CONFIG_MMCSD_HAVECARDDETECT + /* Initialize card-detect GPIO. There is no write-protection GPIO. */ + + sam_configgpio(GPIO_MCI_CD); + + /* Configure card detect interrupts */ + + sam_gpioirq(GPIO_MCI_CD); + (void)irq_attach(MCI_CD_IRQ, sam_hsmci_cardetect_int); + g_hsmci.inserted = sam_cardinserted(0); +#else + g_hsmci.inserted = true; /* An assumption? */ +#endif + /* Then inform the HSMCI driver if there is or is not a card in the slot. */ + + sdio_mediachange(g_hsmci.hsmci, g_hsmci.inserted); + + /* Now we are initialized */ + + g_hsmci.initialized = true; + + /* Enable card detect interrupts */ + +#ifdef CONFIG_MMCSD_HAVECARDDETECT + sam_gpioirqenable(MCI_CD_IRQ); +#endif + } + + return OK; +} + +/**************************************************************************** + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +#ifdef CONFIG_MMCSD_HAVECARDDETECT +bool sam_cardinserted(int slotno) +{ + bool removed; + + /* Get the state of the GPIO pin */ + + removed = sam_gpioread(GPIO_MCI_CD); + fllvdbg("Slot %d inserted: %s\n", slotno, removed ? "NO" : "YES"); + + return !removed; +} +#endif + +/**************************************************************************** + * Name: sam_writeprotected + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_writeprotected(int slotno) +{ + /* There are no write protect pins */ + + return false; +} + +#endif /* HAVE_HSMCI */ diff --git a/configs/sam4s-xplained-pro/src/sam_tc.c b/configs/sam4s-xplained-pro/src/sam_tc.c new file mode 100644 index 0000000000000000000000000000000000000000..afd92aacd8f43d6aa1ccaab27c79490333967eb9 --- /dev/null +++ b/configs/sam4s-xplained-pro/src/sam_tc.c @@ -0,0 +1,316 @@ +/**************************************************************************** + * configs/sam4s-xplained-pro/src/sam_tc.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Bob Doiron + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "sam_lowputc.h" +#include "sam_tc.h" +#include "sam_rtt.h" + +#ifdef CONFIG_TIMER + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#if !(defined(CONFIG_SAM34_TC0) || defined(CONFIG_SAM34_TC1) || defined(CONFIG_SAM34_TC2) \ + || defined(CONFIG_SAM34_TC3) || defined(CONFIG_SAM34_TC4) || defined(CONFIG_SAM34_RTT) ) +# warning "CONFIG_SAM34_TCx or CONFIG_SAM34_RTT must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_TIMER0_DEVPATH +# define CONFIG_TIMER0_DEVPATH "/dev/tc0" +#endif +#ifndef CONFIG_TIMER1_DEVPATH +# define CONFIG_TIMER1_DEVPATH "/dev/tc1" +#endif +#ifndef CONFIG_TIMER2_DEVPATH +# define CONFIG_TIMER2_DEVPATH "/dev/tc2" +#endif +#ifndef CONFIG_TIMER3_DEVPATH +# define CONFIG_TIMER3_DEVPATH "/dev/tc3" +#endif +#ifndef CONFIG_TIMER4_DEVPATH +# define CONFIG_TIMER4_DEVPATH "/dev/tc4" +#endif +#ifndef CONFIG_TIMER5_DEVPATH +# define CONFIG_TIMER5_DEVPATH "/dev/tc5" +#endif +#ifndef CONFIG_RTT_DEVPATH +# define CONFIG_RTT_DEVPATH "/dev/rtt0" +#endif + +/* Timer Definitions ********************************************************/ + +/* Debug ********************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog + * timer + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_TIMER +#endif + +#ifdef CONFIG_DEBUG_TIMER +# define tcdbg dbg +# define tclldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define tcvdbg vdbg +# define tcllvdbg llvdbg +# else +# define tcvdbg(x...) +# define tcllvdbg(x...) +# endif +#else +# define tcdbg(x...) +# define tclldbg(x...) +# define tcvdbg(x...) +# define tcllvdbg(x...) +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +#if defined(CONFIG_SYSTEMTICK_EXTCLK) && !defined(CONFIG_SUPPRESS_INTERRUPTS) && \ + !defined(CONFIG_SUPPRESS_TIMER_INTS) + +static bool systemtick(FAR uint32_t *next_interval_us) +{ + sched_process_timer(); + return true; // reload, no change to interval +} + +#endif /* CONFIG_SYSTEMTICK_EXTCLK && !CONFIG_SUPPRESS_INTERRUPTS && !CONFIG_SUPPRESS_TIMER_INTS */ + +#if defined(CONFIG_SCHED_CPULOAD) && defined(CONFIG_SCHED_CPULOAD_EXTCLK) + +static bool calc_cpuload(FAR uint32_t *next_interval_us) +{ + sched_process_cpuload(); + return TRUE; /* Reload, no change to interval */ +} + +#endif /* CONFIG_SCHED_CPULOAD && CONFIG_SCHED_CPULOAD_EXTCLK */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_timerinitialize() + * + * Description: + * Perform architecture-specific initialization of the timer hardware. + * + ****************************************************************************/ + +int sam_timerinitialize(void) +{ + int fd; + int ret; + + /* Initialize and register the timer devices */ + +#if defined(CONFIG_SAM34_TC0) + tcvdbg("Initializing %s...\n", CONFIG_TIMER0_DEVPATH); + sam_tcinitialize(CONFIG_TIMER0_DEVPATH, SAM_IRQ_TC0); +#endif + +#if defined(CONFIG_SAM34_TC1) + tcvdbg("Initializing %s...\n", CONFIG_TIMER1_DEVPATH); + sam_tcinitialize(CONFIG_TIMER1_DEVPATH, SAM_IRQ_TC1); +#endif + +#if defined(CONFIG_SAM34_TC2) + tcvdbg("Initializing %s...\n", CONFIG_TIMER2_DEVPATH); + sam_tcinitialize(CONFIG_TIMER2_DEVPATH, SAM_IRQ_TC2); +#endif + +#if defined(CONFIG_SAM34_TC3) + tcvdbg("Initializing %s...\n", CONFIG_TIMER3_DEVPATH); + sam_tcinitialize(CONFIG_TIMER3_DEVPATH, SAM_IRQ_TC3); +#endif + +#if defined(CONFIG_SAM34_TC4) + tcvdbg("Initializing %s...\n", CONFIG_TIMER4_DEVPATH); + sam_tcinitialize(CONFIG_TIMER4_DEVPATH, SAM_IRQ_TC4); +#endif + +#if defined(CONFIG_SAM34_TC5) + tcvdbg("Initializing %s...\n", CONFIG_TIMER5_DEVPATH); + sam_tcinitialize(CONFIG_TIMER5_DEVPATH, SAM_IRQ_TC5); +#endif + +#if defined(CONFIG_SAM34_RTT) + tcvdbg("Initializing %s...\n", CONFIG_RTT_DEVPATH); + sam_rttinitialize(CONFIG_RTT_DEVPATH); +#endif + +#if defined(CONFIG_SYSTEMTICK_EXTCLK) && !defined(CONFIG_SUPPRESS_INTERRUPTS) && \ + !defined(CONFIG_SUPPRESS_TIMER_INTS) + /* System Timer Initialization */ + + tcvdbg("Opening %s\n", CONFIG_SAM4S_XPLAINED_PRO_SCHED_TIMER_DEVPATH); + + fd = open(CONFIG_SAM4S_XPLAINED_PRO_SCHED_TIMER_DEVPATH, O_RDONLY); + if (fd < 0) + { + tcdbg("open %s failed: %d\n", + CONFIG_SAM4S_XPLAINED_PRO_SCHED_TIMER_DEVPATH, errno); + goto errout; + } + + /* Set the timeout */ + + tcvdbg("Interval = %d us.\n", (unsigned long)USEC_PER_TICK); + ret = ioctl(fd, TCIOC_SETTIMEOUT, (unsigned long)USEC_PER_TICK); + if (ret < 0) + { + tcdbg("ioctl(TCIOC_SETTIMEOUT) failed: %d\n", errno); + goto errout_with_dev; + } + + /* install user callback */ + { + struct timer_sethandler_s tccb; + tccb.newhandler = systemtick; + tccb.oldhandler = NULL; + + ret = ioctl(fd, TCIOC_SETHANDLER, (unsigned long)&tccb); + if (ret < 0) + { + tcdbg("ioctl(TCIOC_SETHANDLER) failed: %d\n", errno); + goto errout_with_dev; + } + } + + /* Start the timer */ + + tcvdbg("Starting.\n"); + ret = ioctl(fd, TCIOC_START, 0); + if (ret < 0) + { + tcdbg("ioctl(TCIOC_START) failed: %d\n", errno); + goto errout_with_dev; + } +#endif + +#if defined(CONFIG_SCHED_CPULOAD) && defined(CONFIG_SCHED_CPULOAD_EXTCLK) + /* CPU Load initialization */ + + tcvdbg("Opening %s\n", CONFIG_SAM4S_XPLAINED_PRO_CPULOAD_TIMER_DEVPATH); + + fd = open(CONFIG_SAM4S_XPLAINED_PRO_CPULOAD_TIMER_DEVPATH, O_RDONLY); + if (fd < 0) + { + tcdbg("open %s failed: %d\n", + CONFIG_SAM4S_XPLAINED_PRO_CPULOAD_TIMER_DEVPATH, errno); + goto errout; + } + + /* Set the timeout */ + + tcvdbg("Interval = %d us.\n", (unsigned long)1000000 / CONFIG_SCHED_CPULOAD_TICKSPERSEC); + + ret = ioctl(fd, TCIOC_SETTIMEOUT, + (unsigned long)1000000 / CONFIG_SCHED_CPULOAD_TICKSPERSEC); + if (ret < 0) + { + tcdbg("ioctl(TCIOC_SETTIMEOUT) failed: %d\n", errno); + goto errout_with_dev; + } + + /* Install user callback */ + + { + struct timer_sethandler_s tccb; + tccb.newhandler = calc_cpuload; + tccb.oldhandler = NULL; + + ret = ioctl(fd, TCIOC_SETHANDLER, (unsigned long)&tccb); + if (ret < 0) + { + tcdbg("ioctl(TCIOC_SETHANDLER) failed: %d\n", errno); + goto errout_with_dev; + } + } + + /* Start the timer */ + + tcvdbg("Starting.\n"); + ret = ioctl(fd, TCIOC_START, 0); + if (ret < 0) + { + tcdbg("ioctl(TCIOC_START) failed: %d\n", errno); + goto errout_with_dev; + } +#endif + + goto success; +errout_with_dev: + close(fd); +errout: + return ERROR; + +success: + return OK; + +} + +#endif /* CONFIG_TIMER */ diff --git a/configs/sam4s-xplained-pro/src/sam_udp.c b/configs/sam4s-xplained-pro/src/sam_udp.c new file mode 100644 index 0000000000000000000000000000000000000000..e47c37a9fba9ceb98a8aebecb2e7a3a0860a7b7b --- /dev/null +++ b/configs/sam4s-xplained-pro/src/sam_udp.c @@ -0,0 +1,88 @@ +/************************************************************************************ + * configs/sam4s-xplained-pro/src/sam_udp.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Bob Doiron + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "sam4s-xplained-pro.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_udp_suspend + * + * Description: + * Board logic must provide the sam_udp_suspend logic if the UDP driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * + * When 'resume' is false, this function call provides an opportunity to perform + * board-specific power-saving actions so that less power is consumed while the + * USB is suspended. + * + * Certain power-saving operations are performed by the UDP driver when it enters + * suspend mode: The USB device peripheral clocks are be switched off. MCK and + * UDPCK are switched off and the USB transceiver is disabled. + * + * When 'resume' is true, normal clocking and operations must all be restored. + * + ************************************************************************************/ + +void sam_udp_suspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} diff --git a/configs/sam4s-xplained-pro/src/sam_userleds.c b/configs/sam4s-xplained-pro/src/sam_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..ca16d45cba3ba0cd9b9625d711314bf81c528095 --- /dev/null +++ b/configs/sam4s-xplained-pro/src/sam_userleds.c @@ -0,0 +1,107 @@ +/**************************************************************************** + * configs/sam4s-xplained-pro/src/sam_userleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Bob Doiron + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "sam_gpio.h" +#include "sam4s-xplained-pro.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure D301 GPIO for output */ + + sam_configgpio(GPIO_D301); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_D301) + { + sam_gpiowrite(GPIO_D301, ledon ? LED_D301_ON : LED_D301_OFF); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + sam_gpiowrite(GPIO_D301, (ledset & BOARD_D301_BIT) ? LED_D301_ON : LED_D301_OFF); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/sam4s-xplained-pro/src/sam_wdt.c b/configs/sam4s-xplained-pro/src/sam_wdt.c new file mode 100644 index 0000000000000000000000000000000000000000..5ce6cc25dfcdac47fd5587f268ab3936690e17b1 --- /dev/null +++ b/configs/sam4s-xplained-pro/src/sam_wdt.c @@ -0,0 +1,240 @@ +/************************************************************************************ + * configs/sam4s-xplained-pro/src/up_watchdog.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Bob Doiron + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include "sam_wdt.h" +#include + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Watchdog hardware should be enabled */ + +#if !defined(CONFIG_SAM34_WDT) +# warning "CONFIG_SAM34_WDT must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_WATCHDOG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_WATCHDOG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_WATCHDOG_DEVPATH "/dev/watchdog0" +# endif +#endif + +#if (CONFIG_WDT_THREAD_INTERVAL < CONFIG_WDT_MINTIME) +# error "WDT_THREAD_INTERVAL must be greater than or equal to WDT_MINTIME" +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/* Watchdog kicker task */ + +#if defined(CONFIG_WDT_THREAD) +static int wdog_daemon(int argc, char *argv[]) +{ + int fd; + int ret; + + /* Open the watchdog device for reading */ + + wdgvdbg("Opening.\n"); + fd = open(CONFIG_WATCHDOG_DEVPATH, O_RDONLY); + if (fd < 0) + { + wdgdbg("open %s failed: %d\n", CONFIG_WATCHDOG_DEVPATH, errno); + goto errout; + } + + /* Start the watchdog timer. */ + + wdgvdbg("Starting.\n"); + ret = ioctl(fd, WDIOC_START, 0); + if (ret < 0) + { + wdgdbg("ioctl(WDIOC_START) failed: %d\n", errno); + goto errout_with_dev; + } + + usleep(200); + while(1) + { + usleep((CONFIG_WDT_THREAD_INTERVAL)*1000); + + wdgvdbg("ping\n"); + ret = ioctl(fd, WDIOC_KEEPALIVE, 0); + if (ret < 0) + { + wdgdbg("ioctl(WDIOC_KEEPALIVE) failed: %d\n", errno); + goto errout_with_dev; + } + } + +errout_with_dev: + close(fd); +errout: + return ERROR; +} +#endif + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ +#if (defined(CONFIG_SAM34_WDT) && !defined(CONFIG_WDT_DISABLE_ON_RESET)) + int fd; + int ret; + + /* Initialize tha register the watchdog timer device */ + + wdgvdbg("Initializing Watchdog driver...\n"); + sam_wdtinitialize(CONFIG_WATCHDOG_DEVPATH); + + /* Open the watchdog device */ + + wdgvdbg("Opening.\n"); + fd = open(CONFIG_WATCHDOG_DEVPATH, O_RDONLY); + if (fd < 0) + { + wdgdbg("open %s failed: %d\n", CONFIG_WATCHDOG_DEVPATH, errno); + goto errout; + } + + /* Set the watchdog timeout */ + + wdgvdbg("Timeout = %d.\n", CONFIG_WDT_TIMEOUT); + ret = ioctl(fd, WDIOC_SETTIMEOUT, (unsigned long)CONFIG_WDT_TIMEOUT); + if (ret < 0) + { + wdgdbg("ioctl(WDIOC_SETTIMEOUT) failed: %d\n", errno); + goto errout_with_dev; + } + + /* Set the watchdog minimum time */ + + wdgvdbg("MinTime = %d.\n", CONFIG_WDT_MINTIME); + ret = ioctl(fd, WDIOC_MINTIME, (unsigned long)CONFIG_WDT_MINTIME); + if (ret < 0) + { + wdgdbg("ioctl(WDIOC_MINTIME) failed: %d\n", errno); + goto errout_with_dev; + } + + /* Start Kicker task */ + +#if defined(CONFIG_WDT_THREAD) + sched_lock(); + + int taskid = kernel_thread(CONFIG_WDT_THREAD_NAME, + CONFIG_WDT_THREAD_PRIORITY, + CONFIG_WDT_THREAD_STACKSIZE, + (main_t)wdog_daemon, (FAR char * const *)NULL); + + ASSERT(taskid > 0); + sched_unlock(); +#endif + return OK; +errout_with_dev: + close(fd); +errout: + return ERROR; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/sam4s-xplained/Kconfig b/configs/sam4s-xplained/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..bc94c5a6f6b9e82b685b7ca6d32331dc229f5571 --- /dev/null +++ b/configs/sam4s-xplained/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAM4S_XPLAINED +endif diff --git a/configs/sam4s-xplained/README.txt b/configs/sam4s-xplained/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..4d49a0a5bf192e4b30c02e1517b8adc48fa5ea05 --- /dev/null +++ b/configs/sam4s-xplained/README.txt @@ -0,0 +1,629 @@ +README +^^^^^^ + + This README discusses issues unique to NuttX configurations for the + Atmel SAM4S Xplained development board. This board features the + ATSAM4S16C MCU with 1MB FLASH and 128KB. + + The SAM4S Xplained features: + + - 120 MHz Cortex-M4 with MPU + - 12MHz crystal (no 32.768KHz crystal) + - Segger J-Link JTAG emulator on-board for program and debug + - MICRO USB A/B connector for USB connectivity + - IS66WV51216DBLL ISSI SRAM 8Mb 512K x 16 55ns PSRAM 2.5v-3.6v + - Four Atmel QTouch buttons + - External voltage input + - Four LEDs, two controllable from software + - Xplained expansion headers + - Footprint for external serial Flash (not fitted) + +Contents +^^^^^^^^ + + - PIO Muliplexing + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - Buttons and LEDs + - Serial Consoles + - SAM4S Xplained-specific Configuration Options + - Configurations + +PIO Muliplexing +^^^^^^^^^^^^^^^ + + PA0 SMC_A17 PB0 J2.3 default PC0 SMC_D0 + PA1 SMC_A18 PB1 J2.4 PC1 SMC_D1 + PA2 J3.7 default PB2 J1.3 & J4.3 PC2 SMC_D2 + PA3 J1.1 & J4.1 PB3 J1.4 & J4.4 PC3 SMC_D3 + PA4 J1.2 & J4.2 PB4 JTAG PC4 SMC_D4 + PA5 User_button BP2 PB5 JTAG PC5 SMC_D5 + PA6 J3.7 optional PB6 JTAG PC6 SMC_D6 + PA7 CLK_32K PB7 JTAG PC7 SMC_D7 + PA8 CLK_32K PB8 CLK_12M PC8 SMC_NWE + PA9 RX_UART0 PB9 CLK_12M PC9 Power on detect + PA10 TX_UART0 PB10 USB_DDM PC10 User LED D9 + PA11 J3.2 default PB11 USB_DDP PC11 SMC_NRD + PA12 MISO PB12 ERASE PC12 J2.2 + PA13 MOSI PB13 J2.3 optional PC13 J2.7 + PA14 SPCK PB14 N/A PC14 SMC_NCS0 + PA15 J3.5 PC15 SMC_NSC1 + PA16 J3.6 PC16 N/A + PA17 J2.5 PC17 User LED D10 + PA18 J3.4 & SMC_A14 PC18 SMC_A0 + PA19 J3.4 optional & SMC_A15 PC19 SMC_A1 + PA20 J3.1 & SMC_A16 PC20 SMC_A2 + PA21 J2.6 PC21 SMC_A3 + PA22 J2.1 PC22 SMC_A4 + PA23 J3.3 PC23 SMC_A5 + PA24 TSLIDR_SL_SN PC24 SMC_A6 + PA25 TSLIDR_SL_SNSK PC25 SMC_A7 + PA26 TSLIDR_SM_SNS PC26 SMC_A8 + PA27 TSLIDR_SM_SNSK PC27 SMC_A9 + PA28 TSLIDR_SR_SNS PC28 SMC_A10 + PA29 TSLIDR_SR_SNSK PC29 SMC_A11 + PA30 J4.5 PC30 SMC_A12 + PA31 J1.5 PC31 SMC_A13 + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Several possibile development enviorments may be use: + + - Linux or OSX native + - Cygwin unders Windows + - MinGW + MSYS under Windows + - Windows native (with GNUMake from GNUWin32). + + All testing has been performed using Cygwin under Windows. + + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the several different + toolchain options. + + All testing has been conducted using the NuttX buildroot toolchain. To use + the CodeSourcery, devkitARM or Raisonance GNU toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : Generic GCC ARM EABI toolchain for Windows + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also + have to modify the PATH in the setenv.h file if your make cannot find the + tools. + + NOTE about Windows native toolchains + ------------------------------------ + + The CodeSourcery (for Windows), Atollic, and devkitARM toolchains are + Windows native toolchains. The CodeSourcery (for Linux), NuttX buildroot, + and, perhaps, the generic GCC toolchains are Cygwin and/or Linux native + toolchains. There are several limitations to using a Windows based + toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: Older CodeSourcery toolchains (2009q1) do not work with default + optimization level of -Os (See Make.defs). It will work with -O0, -O1, or + -O2, but not with -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +^^^^ + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/sam34, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/sam34/sam_vectors.S. You may need to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX EABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.shsam4s-xplained/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh sam4s-xplained/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +Buttons and LEDs +^^^^^^^^^^^^^^^^ + + Buttons + ------- + + The SAM4S Xplained has two mechanical buttons. One button is the RESET button + connected to the SAM4S reset line and the other is a generic user configurable + button labeled BP2 and connected to GPIO PA5. When a button is pressed it + will drive the I/O line to GND. + + LEDs + ---- + + There are four LEDs on board the SAM4X Xplained board, two of these can be + controlled by software in the SAM4S: + + LED GPIO + ---------------- ----- + D9 Yellow LED PC10 + D10 Yellow LED PC17 + + Both can be illuminated by driving the GPIO output to ground (low). + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + events as follows: + + SYMBOL Meaning LED state + D9 D10 + ------------------- ----------------------- -------- -------- + LED_STARTED NuttX has been started OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF + LED_IRQSENABLED Interrupts enabled OFF OFF + LED_STACKCREATED Idle stack created ON OFF + LED_INIRQ In an interrupt No change + LED_SIGNAL In a signal handler No change + LED_ASSERTION An assertion failed No change + LED_PANIC The system has crashed OFF Blinking + LED_IDLE MCU is is sleep mode Not used + + Thus if D9 is statically on, NuttX has successfully booted and is, + apparently, running normmally. If D10 is flashing at approximately + 2Hz, then a fatal error has been detected and the system has halted. + +Serial Consoles +^^^^^^^^^^^^^^^ + + UART1 + ----- + If you have a TTL to RS-232 convertor then this is the most convenient + serial console to use. UART1 is the default in all of these + configurations. + + UART1 RXD PB2 J1 pin 3 J4 pin 3 + UART1 TXD PB3 J1 pin 4 J4 pin 4 + GND J1 pin 9 J4 pin 9 + Vdd J1 pin 10 J4 pin 10 + + USART1 + ------ + USART1 is another option: + + USART1 RXD PA21 J2 pin 6 + USART1 TXD PA22 J2 pin 1 + GND J2 pin 9 + Vdd J2 pin 10 + + Virtual COM Port + ---------------- + Yet another option is to use UART0 and the virtual COM port. This + option may be more convenient for long term development, but was + painful to use during board bring-up. + + The SAM4S Xplained contains an Embedded Debugger (EDBG) that can be + used to program and debug the ATSAM4S16C using Serial Wire Debug (SWD). + The Embedded debugger also include a Virtual Com port interface over + USART1. Virtual COM port connections: + + AT91SAM4S16 ATSAM3U4CAU + -------------- -------------- + PA9 RX_UART0 PA9_4S PA12 + PA10 TX_UART0 RX_3U PA11 + +SAM4S Xplained-specific Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="sam34" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_SAM34 + CONFIG_ARCH_CHIP_SAM4S + CONFIG_ARCH_CHIP_ATSAM4S16C + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=sam4s-xplained (for the SAM4S Xplained development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SAM4S_XPLAINED=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00008000 (32Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_SAM34_RTC - Real Time Clock + CONFIG_SAM34_RTT - Real Time Timer + CONFIG_SAM34_WDT - Watchdog Timer + CONFIG_SAM34_UART0 - UART 0 + CONFIG_SAM34_UART1 - UART 1 + CONFIG_SAM34_SMC - Static Memory Controller + CONFIG_SAM34_USART0 - USART 0 + CONFIG_SAM34_USART1 - USART 1 + CONFIG_SAM34_HSMCI - High Speed Multimedia Card Interface + CONFIG_SAM34_TWI0 - Two-Wire Interface 0 + CONFIG_SAM34_TWI1 - Two-Wire Interface 1 + CONFIG_SAM34_SPI0 - Serial Peripheral Interface + CONFIG_SAM34_SSC - Synchronous Serial Controller + CONFIG_SAM34_TC0 - Timer Counter 0 + CONFIG_SAM34_TC1 - Timer Counter 1 + CONFIG_SAM34_TC2 - Timer Counter 2 + CONFIG_SAM34_TC3 - Timer Counter 3 + CONFIG_SAM34_TC4 - Timer Counter 4 + CONFIG_SAM34_TC5 - Timer Counter 5 + CONFIG_SAM34_ADC12B - 12-bit Analog To Digital Converter + CONFIG_SAM34_DACC - Digital To Analog Converter + CONFIG_SAM34_PWM - Pulse Width Modulation + CONFIG_SAM34_CRCCU - CRC Calculation Unit + CONFIG_SAM34_ACC - Analog Comparator + CONFIG_SAM34_UDP - USB Device Port + + Some subsystems can be configured to operate in different ways. The drivers + need to know how to configure the subsystem. + + CONFIG_SAM34_GPIOA_IRQ + CONFIG_SAM34_GPIOB_IRQ + CONFIG_SAM34_GPIOC_IRQ + CONFIG_USART0_ISUART + CONFIG_USART1_ISUART + CONFIG_USART2_ISUART + CONFIG_USART3_ISUART + + ST91SAM4S specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + +Configurations +^^^^^^^^^^^^^^ + + Each SAM4S Xplained configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.shsam4s-xplained/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that BUILDROOT_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on UART1 which is available on J1 or J4 (see the + section "Serial Consoles" above). USART1 or the virtual COM + port on UART0 are options. The virtual COM port could + be used, for example, by reconfiguring to use UART0 like: + + System Type -> AT91SAM3/4 Peripheral Support + CONFIG_SAM_UART0=y + CONFIG_SAM_UART1=n + + Device Drivers -> Serial Driver Support -> Serial Console + CONFIG_UART0_SERIAL_CONSOLE=y + + Device Drivers -> Serial Driver Support -> UART0 Configuration + CONFIG_UART0_2STOP=0 + CONFIG_UART0_BAUD=115200 + CONFIG_UART0_BITS=8 + CONFIG_UART0_PARITY=0 + CONFIG_UART0_RXBUFSIZE=256 + CONFIG_UART0_TXBUFSIZE=256 + + 3. Unless otherwise stated, the configurations are setup for + Linux (or any other POSIX environment like Cygwin under Windows): + + Build Setup: + CONFIG_HOST_LINUX=y : Linux or other POSIX environment + + 4. These configurations use the older, OABI, buildroot toolchain. But + that is easily reconfigured: + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot toolchain + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : Older, OABI toolchain + + If you want to use the Atmel GCC toolchain, here are the steps to + do so: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_HOST_CYGWIN=y : Using Cygwin or other POSIX environment + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : General GCC EABI toolchain under windows + + This re-configuration should be done before making NuttX or else the + subsequent 'make' will fail. If you have already attempted building + NuttX then you will have to 1) 'make distclean' to remove the old + configuration, 2) 'cd tools; ./configure.sh sam3u-ek/ksnh' to start + with a fresh configuration, and 3) perform the configuration changes + above. + + Also, make sure that your PATH variable has the new path to your + Atmel tools. Try 'which arm-none-eabi-gcc' to make sure that you + are selecting the right tool. setenv.sh is available for you to + use to set or PATH variable. The path in the that file may not, + however, be correct for your installation. + + See also the "NOTE about Windows native toolchains" in the section call + "GNU Toolchain Options" above. + +Configuration sub-directories +----------------------------- + + nsh: + This configuration directory will built the NuttShell. See NOTES above. + + NOTES: + 1. The configuration configuration can be modified to include support + for the on-board SRAM (1MB). + + System Type -> External Memory Configuration + CONFIG_SAM34_EXTSRAM0=y : Select SRAM on CS0 + CONFIG_SAM34_EXTSRAM0SIZE=1048576 : Size=1MB + + Now what are you going to do with the SRAM. There are two choices: + + a) To enable the NuttX RAM test that may be used to verify the + external SRAM: + + System Type -> External Memory Configuration + CONFIG_SAM34_EXTSRAM0HEAP=n : Don't add to heap + + Application Configuration -> System NSH Add-Ons + CONFIG_SYSTEM_RAMTEST=y : Enable the RAM test built-in + + In this configuration, the SDRAM is not added to heap and so is + not excessible to the applications. So the RAM test can be + freely executed against the SRAM memory beginning at address + 0x6000:0000 (CS0). + + nsh> ramtest -h + Usage: [-w|h|b] + + Where: + starting address of the test. + number of memory locations (in bytes). + -w Sets the width of a memory location to 32-bits. + -h Sets the width of a memory location to 16-bits (default). + -b Sets the width of a memory location to 8-bits. + + To test the entire external SRAM: + + nsh> ramtest 60000000 1048576 + RAMTest: Marching ones: 60000000 1048576 + RAMTest: Marching zeroes: 60000000 1048576 + RAMTest: Pattern test: 60000000 1048576 55555555 aaaaaaaa + RAMTest: Pattern test: 60000000 1048576 66666666 99999999 + RAMTest: Pattern test: 60000000 1048576 33333333 cccccccc + RAMTest: Address-in-address test: 60000000 1048576 + + b) To add this RAM to the NuttX heap, you would need to change the + configuration as follows: + + System Type -> External Memory Configuration + CONFIG_SAM34_EXTSRAM0HEAP=y : Add external RAM to heap + + Memory Management + -CONFIG_MM_REGIONS=1 : Only the internal SRAM + +CONFIG_MM_REGIONS=2 : Also include external SRAM diff --git a/configs/sam4s-xplained/include/board.h b/configs/sam4s-xplained/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..7fc97d5ccc6f9f7248f5c9cec0a9dce0779a843d --- /dev/null +++ b/configs/sam4s-xplained/include/board.h @@ -0,0 +1,266 @@ +/************************************************************************************ + * configs/sam4s-xplained/include/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAM4L_XPLAINED_INCLUDE_BOARD_H +#define __CONFIGS_SAM4L_XPLAINED_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# ifdef CONFIG_SAM34_GPIO_IRQ +# include +# endif +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# ifdef CONFIG_SAM34_GPIO_IRQ +# include +# endif +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the sam3u device is running on a 4MHz internal RC. These + * definitions will configure clocking with MCK = 48MHz, PLLA = 96, and CPU=120MHz. + */ + +/* Main oscillator register settings */ + +#define BOARD_CKGR_MOR_MOSCXTST (63 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration: + * + * Source: 12MHz crystall at 12MHz + * PLLdiv: 10 + * PLLmul: 1 (bypassed) + * Fpll: (12MHz * 10) / 1 = 120MHz + */ + +#define BOARD_MAINOSC_FREQUENCY (12000000) +#define BOARD_CKGR_PLLAR_MUL (9 << PMC_CKGR_PLLAR_MUL_SHIFT) +#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_PLLA_FREQUENCY (10*BOARD_MAINOSC_FREQUENCY) + +/* PMC master clock register settings */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 +#define BOARD_MCK_FREQUENCY (BOARD_PLLA_FREQUENCY/1) +#define BOARD_CPU_FREQUENCY (BOARD_PLLA_FREQUENCY/1) + +/* USB UTMI PLL start-up time */ + +#define BOARD_CKGR_UCKR_UPLLCOUNT (3 << PMC_CKGR_UCKR_UPLLCOUNT_SHIFT) + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV+1)). + * + * MCI_SPEED = MCK / (2*(CLKDIV+1)) + * CLKDIV = MCI / MCI_SPEED / 2 - 1 + */ + +/* MCK = 48MHz, CLKDIV = 59, MCI_SPEED = 48MHz / 2 * (59+1) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (59 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 48MHz, CLKDIV = 1, MCI_SPEED = 48MHz / 2 * (1+1) = 12 MHz */ + +#define HSMCI_MMCXFR_CLKDIV (1 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 48MHz, CLKDIV = 0, MCI_SPEED = 48MHz / 2 * (0+1) = 24 MHz */ + +#define HSMCI_SDXFR_CLKDIV (0 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/* FLASH wait states: + * + * DC Characteristics + * + * Parameter Min Typ Max + * ---------------------- ----- ----- ---- + * Vddcore DC Supply Core 1.08V 1.2V 1.32V + * Vvddio DC Supply I/Os 1.62V 3.3V 3.6V + * + * Wait Maximum + * Vddcore Vvddio States Frequency (MHz) + * ------- ---------- ------ --------------- + * 1.08V 1.62-3.6V 0 16 + * " " " "-" " 1 33 + * " " " "-" " 2 50 + * " " " "-" " 3 67 + * " " " "-" " 4 84 + * " " " "-" " 5 100 + * 1.08V 2.7-3.6V 0 20 + * " " " "-" " 1 40 + * " " " "-" " 2 60 + * " " " "-" " 3 80 + * " " " "-" " 4 100 + * 1.2V 1.62-3.6V 0 17 + * " " " "-" " 1 34 + * " " " "-" " 2 52 + * " " " "-" " 3 69 + * " " " "-" " 4 87 + * " " " "-" " 5 104 + * " " " "-" " 6 121 + * 1.2V 2.7-3.6V 0 21 + * " " " "-" " 1 42 + * " " " "-" " 2 63 + * " " " "-" " 3 84 + * " " " "-" " 4 105 + * " " " "-" " 5 123 << SELECTION + */ + +#define BOARD_FWS 5 + +/* LED definitions ******************************************************************/ +/* There are four LEDs on board the SAM4S Xplained board, two of these can be + * controlled by software in the SAM4S: + * + * LED GPIO + * ---------------- ----- + * D9 Yellow LED PC10 + * D10 Yellow LED PC17 + * + * Both can be illuminated by driving the GPIO output to ground (low). + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_D9 0 +#define BOARD_D10 1 +#define BOARD_NLEDS 2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_D9_BIT (1 << BOARD_D9) +#define BOARD_D10_BIT (1 << BOARD_D10) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/up_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL Val Meaning LED state + * D9 D10 + * ----------------------- --- ----------------------- -------- -------- */ +#define LED_STARTED 0 /* NuttX has been started OFF OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF */ +#define LED_STACKCREATED 0 /* Idle stack created ON OFF */ +#define LED_INIRQ 0 /* In an interrupt No change */ +#define LED_SIGNAL 0 /* In a signal handler No change */ +#define LED_ASSERTION 0 /* An assertion failed No change */ +#define LED_PANIC 0 /* The system has crashed OFF Blinking */ +#define LED_IDLE 0 /* MCU is is sleep mode Not used */ + +/* Thus if D9 is statically on, NuttX has successfully booted and is, + * apparently, running normmally. If D10 is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +/* Button definitions ***************************************************************/ +/* Mechanical buttons: + * + * The SAM4S Xplained has two mechanical buttons. One button is the RESET button + * connected to the SAM4S reset line and the other is a generic user configurable + * button labeled BP2. When a button is pressed it will drive the I/O line to GND. + * + * PA5 BP2 + */ + +#define BUTTON_BP2 0 +#define NUM_BUTTONS 1 + +#define BUTTON_BP2_BIT (1 << BUTTON_BP2) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAM4L_XPLAINED_INCLUDE_BOARD_H */ diff --git a/configs/sam4s-xplained/nsh/Make.defs b/configs/sam4s-xplained/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..8bd815700e6db4c572297c8e4954c22f6797c3f8 --- /dev/null +++ b/configs/sam4s-xplained/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/sam4s-xplained/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/sam4s-xplained/nsh/defconfig b/configs/sam4s-xplained/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..a4292f7b453b1fdaa6f2dc8fd4d7e97b7cce05e3 --- /dev/null +++ b/configs/sam4s-xplained/nsh/defconfig @@ -0,0 +1,899 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +CONFIG_ARCH_CHIP_SAM34=y +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="sam34" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_HAVE_EXTNAND=y +CONFIG_ARCH_HAVE_EXTNOR=y +CONFIG_ARCH_HAVE_EXTSRAM0=y +CONFIG_ARCH_HAVE_EXTSRAM1=y + +# +# AT91SAM3/4 Configuration Options +# +# CONFIG_ARCH_CHIP_ATSAM3U4E is not set +# CONFIG_ARCH_CHIP_ATSAM3U4C is not set +# CONFIG_ARCH_CHIP_ATSAM3U2E is not set +# CONFIG_ARCH_CHIP_ATSAM3U2C is not set +# CONFIG_ARCH_CHIP_ATSAM3U1E is not set +# CONFIG_ARCH_CHIP_ATSAM3U1C is not set +# CONFIG_ARCH_CHIP_ATSAM3X8E is not set +# CONFIG_ARCH_CHIP_ATSAM3X8C is not set +# CONFIG_ARCH_CHIP_ATSAM3X4E is not set +# CONFIG_ARCH_CHIP_ATSAM3X4C is not set +# CONFIG_ARCH_CHIP_ATSAM3A8C is not set +# CONFIG_ARCH_CHIP_ATSAM3A4C is not set +# CONFIG_ARCH_CHIP_ATSAM4CMP16B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LC4A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS2A is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4C is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4B is not set +# CONFIG_ARCH_CHIP_ATSAM4LS4A is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD32B is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SD16B is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16C is not set +# CONFIG_ARCH_CHIP_ATSAM4SA16B is not set +CONFIG_ARCH_CHIP_ATSAM4S16C=y +# CONFIG_ARCH_CHIP_ATSAM4S16B is not set +# CONFIG_ARCH_CHIP_ATSAM4S8C is not set +# CONFIG_ARCH_CHIP_ATSAM4S8B is not set +# CONFIG_ARCH_CHIP_ATSAM4E16E is not set +# CONFIG_ARCH_CHIP_ATSAM4E16C is not set +# CONFIG_ARCH_CHIP_ATSAM4E8E is not set +# CONFIG_ARCH_CHIP_ATSAM4E8C is not set +# CONFIG_ARCH_CHIP_SAM3U is not set +# CONFIG_ARCH_CHIP_SAM3X is not set +# CONFIG_ARCH_CHIP_SAM3A is not set +# CONFIG_ARCH_CHIP_SAM4CM is not set +# CONFIG_ARCH_CHIP_SAM4L is not set +# CONFIG_ARCH_CHIP_SAM4E is not set +CONFIG_ARCH_CHIP_SAM4S=y + +# +# AT91SAM3/4 Peripheral Support +# +# CONFIG_SAM34_ACC is not set +# CONFIG_SAM34_ADC12B is not set +# CONFIG_SAM34_CRCCU is not set +# CONFIG_SAM34_DACC is not set +# CONFIG_SAM34_DMAC1 is not set +# CONFIG_SAM34_HSMCI is not set +# CONFIG_SAM34_PDCA is not set +# CONFIG_SAM34_PWM is not set +# CONFIG_SAM34_RTC is not set +# CONFIG_SAM34_RTT is not set +# CONFIG_SAM34_SMC is not set +# CONFIG_SAM34_SPI0 is not set +# CONFIG_SAM34_SSC is not set +# CONFIG_SAM34_TC0 is not set +# CONFIG_SAM34_TC1 is not set +# CONFIG_SAM34_TC2 is not set +# CONFIG_SAM34_TC3 is not set +# CONFIG_SAM34_TC4 is not set +# CONFIG_SAM34_TC5 is not set +# CONFIG_SAM34_TWI is not set +# CONFIG_SAM34_TWIM is not set +# CONFIG_SAM34_TWIS is not set +# CONFIG_SAM34_TWIM0 is not set +# CONFIG_SAM34_TWIS0 is not set +# CONFIG_SAM34_TWIM1 is not set +# CONFIG_SAM34_TWIS1 is not set +# CONFIG_SAM34_UART0 is not set +CONFIG_SAM34_UART1=y +# CONFIG_SAM34_UDP is not set +# CONFIG_SAM34_USART0 is not set +# CONFIG_SAM34_USART1 is not set +# CONFIG_SAM34_WDT is not set + +# +# AT91SAM3/4 External Memory Configuration +# +# CONFIG_SAM34_EXTNAND is not set +# CONFIG_SAM34_EXTNOR is not set +# CONFIG_SAM34_EXTSRAM0 is not set +# CONFIG_SAM34_EXTSRAM1 is not set + +# +# AT91SAM3/4 GPIO Interrupt Configuration +# +# CONFIG_SAM34_HAVE_GPIOD_IRQ is not set +# CONFIG_SAM34_HAVE_GPIOE_IRQ is not set +# CONFIG_SAM34_HAVE_GPIOF_IRQ is not set +# CONFIG_SAM34_GPIO_IRQ is not set +# CONFIG_SAM34_TC is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=9186 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=131072 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAM4S_XPLAINED=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sam4s-xplained" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=12 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_UART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_CXX_NEWLONG=y + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sam4s-xplained/nsh/setenv.sh b/configs/sam4s-xplained/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..00fd3c9171f144e8f7ec765a8020ffdd3c75cb68 --- /dev/null +++ b/configs/sam4s-xplained/nsh/setenv.sh @@ -0,0 +1,73 @@ +#!/bin/bash +# configs/sam4s-xplained/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sam4s-xplained/scripts/ld.script b/configs/sam4s-xplained/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..8e4c874df862a54c0ac6a27610ac92f8990feff4 --- /dev/null +++ b/configs/sam4s-xplained/scripts/ld.script @@ -0,0 +1,121 @@ +/**************************************************************************** + * configs/sam4s-xplained/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The ATSAM4S16C has 1MB of FLASH beginning at address 0x0040:0000 and + * 128KB of SRAM beginning at address 0x2000:0000 + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00400000, LENGTH = 1024K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } >flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } >flash + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > sram AT > flash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sam4s-xplained/src/Makefile b/configs/sam4s-xplained/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..eb505df562cc80655f159f587b1fcde4bca56e63 --- /dev/null +++ b/configs/sam4s-xplained/src/Makefile @@ -0,0 +1,55 @@ +############################################################################ +# configs/sam4s-xplained/src/Makefile +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c + +ifeq ($(CONFIG_SAM34_EXTSRAM0),y) +CSRCS += sam_sram.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += sam_autoleds.c +else +CSRCS += sam_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += sam_buttons.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/sam4s-xplained/src/sam4s-xplained.h b/configs/sam4s-xplained/src/sam4s-xplained.h new file mode 100644 index 0000000000000000000000000000000000000000..9e96a89072a5ace8ba4921f566baff22b6b957cc --- /dev/null +++ b/configs/sam4s-xplained/src/sam4s-xplained.h @@ -0,0 +1,140 @@ +/************************************************************************************ + * configs/sam4s-xplained/src/sam4s-xplained.h + * + * Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAM4S_XPLAINED_SRC_SAM4S_XPLAINED_H +#define __CONFIGS_SAM4S_XPLAINED_SRC_SAM4S_XPLAINED_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +#include +#include + +#include "chip/sam_pinmap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* There are four LEDs on board the SAM4S Xplained board, two of these can be + * controlled by software in the SAM4S: + * + * LED GPIO + * ---------------- ----- + * D9 Yellow LED PC10 + * D10 Yellow LED PC17 + * + * Both can be illuminated by driving the GPIO output to ground (low). + * + * These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/up_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL Meaning LED state + * D9 D10 + * ------------------- ----------------------- -------- -------- + * LED_STARTED NuttX has been started OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF + * LED_IRQSENABLED Interrupts enabled OFF OFF + * LED_STACKCREATED Idle stack created ON OFF + * LED_INIRQ In an interrupt No change + * LED_SIGNAL In a signal handler No change + * LED_ASSERTION An assertion failed No change + * LED_PANIC The system has crashed OFF Blinking + * LED_IDLE MCU is is sleep mode Not used + * + * Thus if D9 is statically on, NuttX has successfully booted and is, + * apparently, running normmally. If D10 is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +#define GPIO_D9 (GPIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN10) +#define GPIO_D10 (GPIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN17) + +/* Mechanical buttons: + * + * The SAM4S Xplained has two mechanical buttons. One button is the RESET button + * connected to the SAM4S reset line and the other is a generic user configurable + * button labeled BP2. When a button is pressed it will drive the I/O line to GND. + * + * PA5 BP2 + */ + +#define GPIO_BP2 (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOA | GPIO_PIN5) +#define IRQ_BP2 SAM_IRQ_PA5 + +/* SRAM Enable. EBI_NLB PC16. Active=low; Standby=high */ + +#define GPIO_EBI_NLB (GPIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN16) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_sram_initialize + * + * Description: + * Configure and enable SRAM on board the SAM4S Xplained + * + ************************************************************************************/ + +#ifdef CONFIG_SAM34_EXTSRAM0 +void sam_sram_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAM4S_XPLAINED_SRC_SAM4S_XPLAINED_H */ + diff --git a/configs/sam4s-xplained/src/sam_autoleds.c b/configs/sam4s-xplained/src/sam_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..35eabd5bdb711fee269b4bcce2a8fc353427c709 --- /dev/null +++ b/configs/sam4s-xplained/src/sam_autoleds.c @@ -0,0 +1,156 @@ +/**************************************************************************** + * configs/sam4s-xplained/src/sam_autoleds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "sam_gpio.h" +#include "sam4s-xplained.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the two LEDs on + * board the SAM4S Xplained. The following definitions describe how NuttX + * controls the LEDs: + * + * SYMBOL Meaning LED state + * D9 D10 + * ------------------- ----------------------- -------- -------- + * LED_STARTED NuttX has been started OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF + * LED_IRQSENABLED Interrupts enabled OFF OFF + * LED_STACKCREATED Idle stack created ON OFF + * LED_INIRQ In an interrupt No change + * LED_SIGNAL In a signal handler No change + * LED_ASSERTION An assertion failed No change + * LED_PANIC The system has crashed OFF Blinking + * LED_IDLE MCU is is sleep mode Not used + */ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED1-2 GPIOs for output */ + + sam_configgpio(GPIO_D9); + sam_configgpio(GPIO_D10); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool led1on = false; + bool led2on = false; + + switch (led) + { + case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED */ + break; + + case 1: /* LED_STACKCREATED */ + led1on = true; + break; + + default: + case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ + return; + + case 3: /* LED_PANIC */ + led2on = true; + break; + } + + sam_gpiowrite(GPIO_D9, led1on); + sam_gpiowrite(GPIO_D10, led2on); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led != 2) + { + sam_gpiowrite(GPIO_D9, false); + sam_gpiowrite(GPIO_D10, false); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/sam4s-xplained/src/sam_boot.c b/configs/sam4s-xplained/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..6b3b03bd86c2f82dc4e22ea2b2110a05434a5f52 --- /dev/null +++ b/configs/sam4s-xplained/src/sam_boot.c @@ -0,0 +1,83 @@ +/************************************************************************************ + * configs/sam4s-xplained/src/sam_boot.c + * + * Copyright (C) 201, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "sam4s-xplained.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void) +{ +#ifdef CONFIG_SAM34_EXTSRAM0 + /* Configure and enable SRAM on board the SAM4S Xplained */ + + sam_sram_initialize(); +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} diff --git a/configs/sam4s-xplained/src/sam_buttons.c b/configs/sam4s-xplained/src/sam_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..b48e88461bbe121b467399a2d4bb72c8991a1483 --- /dev/null +++ b/configs/sam4s-xplained/src/sam_buttons.c @@ -0,0 +1,173 @@ +/**************************************************************************** + * configs/sam4s-xplained/src/sam_buttons.c + * + * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "sam4s-xplained.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +static xcpt_t g_irqbp2; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + (void)sam_configgpio(GPIO_BP2); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return sam_gpioread(GPIO_BP2) ? 0 : BUTTON_BP2_BIT; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address is returned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the + * overall GPIO IRQ feature and CONFIG_AVR32_GPIOIRQSETA and/or + * CONFIG_AVR32_GPIOIRQSETB must be enabled to select GPIOs to support + * interrupts on. For button support, bits 2 and 3 must be set in + * CONFIG_AVR32_GPIOIRQSETB (PB2 and PB3). + * + ****************************************************************************/ + +#if defined(CONFIG_SAM34_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id == BUTTON_BP2) + { + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = *g_irqbp2; + *g_irqbp2 = irqhandler; + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + /* Configure the interrupt */ + + sam_gpioirq(GPIO_BP2); + (void)irq_attach(IRQ_BP2, irqhandler); + sam_gpioirqenable(IRQ_BP2); + } + else + { + /* Detach and disable the interrupt */ + + (void)irq_detach(IRQ_BP2); + sam_gpioirqdisable(IRQ_BP2); + } + + leave_critical_section(flags); + } + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/sam4s-xplained/src/sam_sram.c b/configs/sam4s-xplained/src/sam_sram.c new file mode 100644 index 0000000000000000000000000000000000000000..28e9ae7ec22db72d2b0e47f2b71de331eeed1748 --- /dev/null +++ b/configs/sam4s-xplained/src/sam_sram.c @@ -0,0 +1,134 @@ +/************************************************************************************ + * configs/sam4s-xplained/src/sam_sram.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include "up_arch.h" +#include "sam4s_periphclks.h" +#include "chip/sam_smc.h" +#include "sam4s-xplained.h" + +#ifdef CONFIG_SAM34_EXTSRAM0 + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define NPINS (3+8+19+1) + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static const gpio_pinset_t g_srampins[NPINS] = +{ + GPIO_SMC_NCS0, GPIO_SMC_NRD, GPIO_SMC_NWE, + + GPIO_SMC_D0, GPIO_SMC_D1, GPIO_SMC_D2, GPIO_SMC_D3, + GPIO_SMC_D4, GPIO_SMC_D5, GPIO_SMC_D6, GPIO_SMC_D7, + + GPIO_SMC_A0, GPIO_SMC_A1, GPIO_SMC_A2, GPIO_SMC_A3, + GPIO_SMC_A4, GPIO_SMC_A5, GPIO_SMC_A6, GPIO_SMC_A7, + GPIO_SMC_A8, GPIO_SMC_A9, GPIO_SMC_A10, GPIO_SMC_A11, + GPIO_SMC_A12, GPIO_SMC_A13, GPIO_SMC_A14, GPIO_SMC_A15, + GPIO_SMC_A16, GPIO_SMC_A17, GPIO_SMC_A18, + + GPIO_EBI_NLB +}; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_sram_initialize + * + * Description: + * Configure and enable SRAM on board the SAM4S Xplained + * + ************************************************************************************/ + +void sam_sram_initialize(void) +{ + int i; + + /* Configure GPIO pins (leaving SRAM in the disabled state) */ + + for (i = 0; i < NPINS; i++) + { + sam_configgpio(g_srampins[i]); + } + + /* Enable PMC clock to the SMC */ + + sam_smc_enableclk(); + + /* Configure SMC setup timing */ + + putreg32(SMCCS_SETUP_NWESETUP(1) | SMCCS_SETUP_NCSWRSETUP(1) | + SMCCS_SETUP_NRDSETUP(1) | SMCCS_SETUP_NCSRDSETUP(1), + SAM_SMCCS0_SETUP); + + /* Configure the SMC pulse timing */ + + putreg32(SMCCS_PULSE_NWEPULSE(6) | SMCCS_PULSE_NCSWRPULSE(6) | + SMCCS_PULSE_NRDPULSE(6) | SMCCS_PULSE_NCSRDPULSE(6), + SAM_SMCCS0_PULSE); + + /* Configure the SMC cycle timing */ + + putreg32(SMCCS_CYCLE_NWECYCLE(7) | SMCCS_CYCLE_NRDCYCLE(7), + SAM_SMCCS0_CYCLE); + + /* Configure the SMC mode */ + + putreg32(SMCCS_MODE_READMODE | SMCCS_MODE_WRITEMODE, SAM_SMCCS0_MODE); + + /* Enable SRAM access (active low) */ + + sam_gpiowrite(GPIO_EBI_NLB, false); +} + +#endif /* CONFIG_SAM34_EXTSRAM0 */ diff --git a/configs/sam4s-xplained/src/sam_userleds.c b/configs/sam4s-xplained/src/sam_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..f1e7c5f61b4d3c678de4168bd6bd2d7ee029f322 --- /dev/null +++ b/configs/sam4s-xplained/src/sam_userleds.c @@ -0,0 +1,125 @@ +/**************************************************************************** + * configs/sam4s-xplained/src/sam_userleds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "sam_gpio.h" +#include "sam4s-xplained.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure D9-2 GPIOs for output */ + + sam_configgpio(GPIO_D9); + sam_configgpio(GPIO_D10); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint32_t ledcfg; + + if (led == BOARD_D9) + { + ledcfg = GPIO_D9; + } + else if (led == BOARD_D10) + { + ledcfg = GPIO_D10; + } + else + { + return; + } + + sam_gpiowrite(ledcfg, ledon); +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + bool ledon; + + ledon = ((ledset & BOARD_D9_BIT) != 0); + sam_gpiowrite(GPIO_D9, ledon); + + ledon = ((ledset & BOARD_D10_BIT) != 0); + sam_gpiowrite(GPIO_D10, ledon); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/sama5d2-xult/Kconfig b/configs/sama5d2-xult/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..dad9dc0538b74fc952b78c158efa1cd01edc85ce --- /dev/null +++ b/configs/sama5d2-xult/Kconfig @@ -0,0 +1,23 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAMA5D2_XULT + +choice + prompt "CPU Frequency" + default SAMA5D2XULT_396MHZ + +config SAMA5D2XULT_384MHZ + bool "384 MHz" + +config SAMA5D2XULT_396MHZ + bool "396 MHz" + +config SAMA5D2XULT_528MHZ + bool "528 MHz" + +endchoice # CPU Frequency + +endif # ARCH_BOARD_SAMA5D2_XULT diff --git a/configs/sama5d2-xult/README.txt b/configs/sama5d2-xult/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..8adbabe7fdf4cda36bd22086292089e0d4946a58 --- /dev/null +++ b/configs/sama5d2-xult/README.txt @@ -0,0 +1,1169 @@ +README +====== + + This README file describes the port of NuttX to the SAMA5D2 Xplained Ulta + development board. This board features the Atmel SAMA5D27 microprocessor. + See http://www.atmel.com for further information. + +Contents +======== + + - STATUS + - Loading Code into SRAM with J-Link + - Creating and Using DRAMBOOT + - Creating and Using AT25BOOT + - Running NuttX from SDRAM + - Buttons and LEDs + - Serial Console + - SAMA5D2-XULT Configuration Options + - Configurations + +STATUS +====== + +1. Most of this document is a partially corrected clone of the SAMA5D4-EK + README.txt and still contains errors and inconsistencies. + +2. Coding is complete for the the basic SAMA5D2-XULT NSH configuration, but + is completely untested as of this writing (2015-09-15). The primary + issue is that I have not yet determine how to load and test code. + +Loading Code into SRAM with J-Link +================================== +REVISIT: Unverified, cloned text from the SAMA5D4-EK README.txt + + Loading code with the Segger tools and GDB + ------------------------------------------ + + 1) Change directories into the directory where you built NuttX. + 2) Start the GDB server and wait until it is ready to accept GDB + connections. + 3) Then run GDB like this: + + $ arm-none-eabi-gdb + (gdb) target remote localhost:2331 + (gdb) mon reset + (gdb) load nuttx + (gdb) ... start debugging ... + + Loading code using J-Link Commander + ---------------------------------- + + J-Link> r + J-Link> loadbin
+ J-Link> setpc
+ J-Link> ... start debugging ... + +Creating and Using DRAMBOOT +=========================== +REVISIT: Unverified, cloned text from the SAMA5D4-EK README.txt + + In order to have more control of debugging code that runs out of DARM, + I created the sama5d2-xult/dramboot configuration. That configuration is + described below under "Configurations." + + Here are some general instructions on how to build an use dramboot: + + Building: + 1. Remove any old configurations (if applicable). + + cd + make distclean + + 2. Install and build the dramboot configuration. This steps will establish + the dramboot configuration and setup the PATH variable in order to do + the build: + + cd tools + ./configure.sh sama5d2-xult/dramboot + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and + perform edits as necessary so that TOOLCHAIN_BIN is the correct path + to the directory than holds your toolchain binaries. + + NOTE: Be aware that the default dramboot also disables the watchdog. + Since you will not be able to re-enable the watchdog later, you may + need to set CONFIG_SAMA5_WDT=y in the NuttX configuration file. + + Then make dramboot: + + make + + This will result in an ELF binary called 'nuttx' and also HEX and + binary versions called 'nuttx.hex' and 'nuttx.bin'. + + 3. Rename the binaries. Since you will need two versions of NuttX: this + dramboot version that runs in internal SRAM and another under test in + NOR FLASH, I rename the resulting binary files so that they can be + distinguished: + + mv nuttx dramboot + mv nuttx.hex dramboot.hex + mv nuttx.bin dramboot.bin + + 4. Build the "real" DRAM configuration. This will create the nuttx.hex + that you will load using dramboot. Note that you must select + CONFIG_SAMA5D2XULT_DRAM_BOOT=y. This controls the origin at which the + code is linked and positions it correctly for the DRAMBOOT program. + + 5. Restart the system holding DIS_BOOT. You should see the RomBOOT + prompt on the 115200 8N1 serial console (and nothing) more. Hit + the ENTER key with the focus on your terminal window a few time. + This will enable JTAG. + + 6. Then start the J-Link GDB server and GDB. In GDB, I do the following: + + (gdb) mon heal # Halt the CPU + (gdb) load dramboot # Load dramboot into internal SRAM + (gdb) mon go # Start dramboot + + You should see this message: + + Send Intel HEX file now + + Load your program by sending the nuttx.hex via the terminal program. + Then: + + (gdb) mon halt # Break in + (gdb) mon reg pc = 0x20000040 # Set the PC to DRAM entry point + (gdb) mon go # And jump into DRAM + + The dramboot program can also be configured to jump directly into + DRAM without requiring the final halt and go by setting + CONFIG_SAMA5D2XULT_DRAM_START=y in the NuttX configuration. However, + since I have been debugging the early boot sequence, the above + sequence has been most convenient for me since it allows me to + step into the program in SDRAM. + + 7. An option is to use the SAM-BA tool to write the DRAMBOOT image into + Serial FLASH. Then, the system will boot from Serial FLASH by + copying the DRAMBOOT image in SRAM which will run, download the nuttx.hex + file, and then start the image loaded into DRAM automatically. This is + a very convenient usage! + + NOTES: (1) There is that must be closed to enable use of the AT25 + Serial Flash. (2) If using SAM-BA, make sure that you load the DRAM + boot program into the boot area via the pull-down menu. (3) If + you don't have SAM-BA, an alternative is to use the AT25BOOT program + described in the next section. + + STATUS: I don't have a working SAM-BA at the moment and there are issues + with my AT25BOOT (see below). I currently work around these issues by + putting DRAMBOOT on a microSD card (as boot.bin). The RomBOOT loader does + boot that image without issue. + +Creating and Using AT25BOOT +=========================== +REVISIT: Unverified, cloned text from the SAMA5D4-EK README.txt + + To work around some SAM-BA availability issues that I had at one time, + I created the AT25BOOT program. AT25BOOT is a tiny program that runs in + ISRAM. AT25BOOT will enable SDRAM and configure the AT25 Serial FLASH. + It will prompt and then load an Intel HEX program into SDRAM over the + serial console. If the program is successfully loaded in SDRAM, AT25BOOT + will copy the program at the beginning of the AT26 Serial FLASH. + If the jumpering is set correctly, the SAMA5D2 RomBOOT loader will + then boot the program from the serial FLASH the next time that it + reset. + + The AT25BOOT configuration is described below under "Configurations." + + Here are some general instructions on how to build an use AT25BOOT: + + Building: + 1. Remove any old configurations (if applicable). + + cd + make distclean + + 2. Install and build the AT25BOOT configuration. This steps will establish + the AT25BOOT configuration and setup the PATH variable in order to do + the build: + + cd tools + ./configure.sh sama5d2-xult/at25boot + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and + perform edits as necessary so that TOOLCHAIN_BIN is the correct path + to the directory than holds your toolchain binaries. + + Then make AT25BOOT: + + make + + This will result in an ELF binary called 'nuttx' and also HEX and + binary versions called 'nuttx.hex' and 'nuttx.bin'. + + 3. Rename the binaries. If you want to save this version of AT25BOOT so + that it does not get clobbered later, you may want to rename the + binaries: + + mv nuttx at25boot + mv nuttx.hex at25boot.hex + mv nuttx.bin at25boot.bin + + 4. Build the "real" DRAMBOOT configuration. This will create the + dramboot.hex that you will write to the AT25 FLASH using AT25BOOT. See + the section above entitled "Creating and Using AT25BOOT" for more + information. + + 5. Restart the system holding DIS_BOOT. You should see the RomBOOT + prompt on the 115200 8N1 serial console (and nothing) more. Hit + the ENTER key with the focus on your terminal window a few time. + This will enable JTAG. + + 6. Then start the J-Link GDB server and GDB. In GDB, I do the following: + + (gdb) mon heal # Halt the CPU + (gdb) load at25boot # Load AT25BOOT into internal SRAM + (gdb) mon go # Start AT25BOOT + + You should see this message: + + Send Intel HEX file now + + Load DRAMBOOT by sending the dramboot.hex via the terminal program. + At this point you will get messages indicated whether or not the write + to the AT25 FLASH was successful or not. When you reset the board, + it should then boot from the AT25 Serial FLASH and you should again + get the prompt: + + Send Intel HEX file now + + But now you are being prompted to load the DRAM program under test + (See the section above entitled "Creating and Using AT25BOOT"). + + 7. An better option, if available, is to use the SAM-BA tool to write the + DRAMBOOT image into Serial FLASH. + + NOTES: (1) There is that must be closed to enable use of the AT25 + Serial Flash. (2) If using SAM-BA, make sure that you load the DRAM + boot program into the boot area via the pull-down menu. + + STATUS: While this program works great and appears to correctly write + the binary image onto the AT25 Serial FLASH, the RomBOOT loader will + not boot it! I believe that is because the secure boot loader has some + undocumented requirements that I am unaware of. (2014-6-28) + +Running NuttX from SDRAM +======================== +REVISIT: Unverified, cloned text from the SAMA5D4-EK README.txt + + NuttX may be executed from SDRAM. But this case means that the NuttX + binary must reside on some other media (typically NAND FLASH, Serial + FLASH) or transferred over some interface (perhaps a UARt or even a + TFTP server). In these cases, an intermediate bootloader such as U-Boot + or Barebox must be used to configure the SAMA5D2 clocks and SDRAM and + then to copy the NuttX binary into SDRAM. + + The SRAMBOOT program is another option (see above). But this section + will focus on U-Boot. + + - NuttX Configuration + - Boot sequence + - NAND FLASH Memory Map + - Programming the AT91Boostrap Binary + - Programming U-Boot + - Load NuttX with U-Boot on AT91 boards + + TODO: Some drivers may require some adjustments to run from SDRAM. That + is because in this case macros like BOARD_MCK_FREQUENCY are not constants + but are instead function calls: The MCK clock frequency is not known in + advance but instead has to be calculated from the bootloader PLL configuration. + See the TODO list at the end of this file for further information. + + NuttX Configuration + ------------------- + + In order to run from SDRAM, NuttX must be built at origin 0x20008000 in + SDRAM (skipping over SDRAM memory used by the bootloader). The following + configuration option is required: + + CONFIG_SAMA5_BOOT_SDRAM=y + CONFIG_BOOT_RUNFROMSDRAM=y + + These options tell the NuttX code that it will be booting and running from + SDRAM. In this case, the start-logic will do to things: (1) it will not + configure the SAMA5D2 clocking. Rather, it will use the clock configuration + as set up by the bootloader. And (2) it will not attempt to configure the + SDRAM. Since NuttX is already running from SDRAM, it must accept the SDRAM + configuration as set up by the bootloader. + + Boot sequence + ------------- + + Reference: http://www.at91.com/linux4sam/bin/view/Linux4SAM/GettingStarted + + Several pieces of software are involved to boot a Nutt5X into SDRAM. First + is the primary bootloader in ROM which is in charge to check if a valid + application is present on supported media (NOR FLASH, Serial DataFlash, + NAND FLASH, SD card). + + The boot sequence of linux4SAM is done in several steps : + + 1. The ROM bootloader checks if a valid application is present in FLASH + and if it is the case downloads it into internal SRAM. This program + is usually a second level bootloader called AT91BootStrap. + + 2. AT91Bootstrap is the second level bootloader. It is in charge of the + hardware configuration. It downloads U-Boot / Barebox binary from + FLASH to SDRAM / DDRAM and starts the third level bootloader + (U-Boot / Barebox) + + (see http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap). + + 3. The third level bootloader is either U-Boot or Barebox. The third + level bootloader is in charge of downloading NuttX binary from FLASH, + network, SD card, etc. It then starts NuttX. + + 4. Then NuttX runs from SDRAM + + NAND FLASH Memory Map + --------------------- + + Reference: http://www.at91.com/linux4sam/bin/view/Linux4SAM/GettingStarted + + 0x0000:0000 - 0x0003:ffff: AT91BootStrap + 0x0004:0000 - 0x000b:ffff: U-Boot + 0x000c:0000 - 0x000f:ffff: U-Boot environment + 0x0010:0000 - 0x0017:ffff: U-Boot environement redundant + 0x0018:0000 - 0x001f:ffff: Device tree (DTB) + 0x0020:0000 - 0x007f:ffff: NuttX + 0x0080:0000 - end: Available for use as a NAND file system + + Programming the AT91Boostrap Binary + ----------------------------------- + + Reference: http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap + + This section describes how to program AT91Bootstrap binary into the boot + media with SAM-BA tool using NandFlash as boot media. + + 1. Get AT91BootStrap binaries. Build instructions are available here: + + http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap#Build_AT91Bootstrap_from_sources + + A pre-built AT91BootStrap binary is available here: + + ftp://www.at91.com/pub/at91bootstrap/AT91Bootstrap3.6.1/sama5d3_xplained-nandflashboot-uboot-3.6.1.bin + + 2. Start the SAM-BA GUI Application: + + - Connect the USB Device interface to your host machine using the USB + Device Cable. + - Make sure that the chip can execute the SAM-BA Monitor. + - Start SAM-BA GUI application. + - Select the board in the drop-down menu and choose the USB connection. + + 3. In the SAM-BA GUI Application: + + - Choose the "NandFlash" tab in the SAM-BA GUI interface. + - Initialize the NandFlash by choosing the "Enable NandFlash" action in + the Scripts rolling menu, then press "Execute" button. + - Erase the NandFlash device by choosing the "Erase All" action, then + press "Execute" button. + - Enable the PMECC by choosing the "Enable OS PMECC parameters" action, + then press "Execute" button. + + PMECC + Number of sectors per page: 4 + Spare Size: 64 + Number of ECC bits required: 4 + Size of the ECC sector: 512 + ECC offset: 36 + + - Choose "Send Boot File" action, then press Execute button to select the + at91bootstrap binary file and to program the binary to the NandFlash. + - Close SAM-BA, remove the USB Device cable. + + Programming U-Boot + ------------------- + + Reference http://www.at91.com/linux4sam/bin/view/Linux4SAM/U-Boot + + 1. Get U-Boot Binaries. Build instructions are available here: + + http://www.at91.com/linux4sam/bin/view/Linux4SAM/U-Boot#Build_U_Boot_from_sources + + A pre-Built binay image is available here: + + ftp://www.at91.com/pub/uboot/u-boot-v2013.07/u-boot-sama5d3_xplained-v2013.07-at91-r1.bin + + 2. Start the SAM-BA GUI Application: + + - Connect the USB Device interface to your host machine using the USB + Device Cable. + - Make sure that the chip can execute the SAM-BA Monitor. + - Start SAM-BA GUI application. + - Select the board in the drop-down menu and choose the USB connection. + + 3. In the SAM-BA GUI Application: + + - Choose the NandFlash tab in the SAM-BA GUI interface. + - Initialize the NandFlash by choosing the "Enable NandFlash" action in + the Scripts rolling menu, then press Execute button. + - Enable the PMECC by choosing the "Enable OS PMECC parameters" action, + then press Execute button. + + PMECC + Number of sectors per page: 4 + Spare Size: 64 + Number of ECC bits required: 4 + Size of the ECC sector: 512 + ECC offset: 36 + + - Press the "Send File Name" Browse button + - Choose u-boot.bin binary file and press Open + - Enter the proper address on media in the Address text field: + 0x00040000 + - Press the "Send File" button + - Close SAM-BA, remove the USB Device cable. + + You should now be able to interrupt with U-Boot vie the DBGU interface. + + Load NuttX with U-Boot on AT91 boards + ------------------------------------- + + Reference http://www.at91.com/linux4sam/bin/view/Linux4SAM/U-Boot + + Preparing NuttX image + + U-Boot does not support normal binary images. Instead you have to + create an uImage file with the mkimage tool which encapsulates kernel + image with header information, CRC32 checksum, etc. + + mkimage comes in source code with U-Boot distribution and it is built + during U-Boot compilation (u-boot-source-dir/tools/mkimage). There + are also sites where you can download pre-built mkimage binaries. For + example: http://www.trimslice.com/wiki/index.php/U-Boot_images + + See the U-Boot README file for more information. More information is + also available in the mkimage man page (for example, + http://linux.die.net/man/1/mkimage). + + Command to generate an uncompressed uImage file (4) : + + mkimage -A arm -O linux -C none -T kernel -a 20008000 -e 20008000 \ + -n nuttx -d nuttx.bin uImage + + Where: + + -A arm: Set architecture to ARM + -O linux: Select operating system. bootm command of u-boot changes + boot method by os type. + -T kernel: Set image type. + -C none: Set compression type. + -a 20008000: Set load address. + -e 20008000: Set entry point. + -n nuttx: Set image name. + -d nuttx.bin: Use image data from nuttx.bin. + + This will generate a binary called uImage. If you have the path to + mkimage in your PATH variable, then you can automatically build the + uImage file by adding the following to your .config file: + + CONFIG_RAW_BINARY=y + CONFIG_UBOOT_UIMAGE=y + CONFIG_UIMAGE_LOAD_ADDRESS=0x20008000 + CONFIG_UIMAGE_ENTRY_POINT=0x20008040 + + The uImage file can them be loaded into memory from a variety of sources + (serial, SD card, JFFS2 on NAND, TFTP). + + STATUS: + 2014-4-1: So far, I am unable to get U-Boot to execute the uImage + file. I get the following error messages (in this case + trying to load from an SD card): + + U-Boot> fatload mmc 0 0x22000000 uimage + reading uimage + 97744 bytes read in 21 ms (4.4 MiB/s) + + U-Boot> bootm 0x22000000 + ## Booting kernel from Legacy Image at 0x22000000 ... + Image Name: nuttx + Image Type: ARM Linux Kernel Image (uncompressed) + Data Size: 97680 Bytes = 95.4 KiB + Load Address: 20008000 + Entry Point: 20008040 + Verifying Checksum ... OK + XIP Kernel Image ... OK + FDT and ATAGS support not compiled in - hanging + ### ERROR ### Please RESET the board ### + + This, however, appears to be a usable workaround: + + U-Boot> fatload mmc 0 0x20008000 nuttx.bin + mci: setting clock 257812 Hz, block size 512 + mci: setting clock 257812 Hz, block size 512 + mci: setting clock 257812 Hz, block size 512 + gen_atmel_mci: CMDR 00001048 ( 8) ARGR 000001aa (SR: 0c100025) Command Time Out + mci: setting clock 257812 Hz, block size 512 + mci: setting clock 22000000 Hz, block size 512 + reading nuttx.bin + 108076 bytes read in 23 ms (4.5 MiB/s) + + U-Boot> go 0x20008040 + ## Starting application at 0x20008040 ... + + NuttShell (NSH) NuttX-7.2 + nsh> + + Loading through network + + On a development system, it is useful to get the kernel and root file + system through the network. U-Boot provides support for loading + binaries from a remote host on the network using the TFTP protocol. + + To manage to use TFTP with U-Boot, you will have to configure a TFTP + server on your host machine. Check your distribution manual or Internet + resources to configure a Linux or Windows TFTP server on your host: + + - U-Boot documentation on a Linux host: + http://www.denx.de/wiki/view/DULG/SystemSetup#Section_4.6. + + - Another TFTP configuration reference: + http://www.linuxhomenetworking.com/wiki/index.php/Quick_HOWTO_:_Ch16_:_Telnet%2C_TFTP%2C_and_xinetd#TFTP + + On the U-Boot side, you will have to setup the networking parameters: + + 1. Setup an Ethernet address (MAC address) + Check this U-Boot network BuildRootFAQ entry to choose a proper MAC + address: http://www.denx.de/wiki/DULG/EthernetDoesNotWork + + setenv ethaddr 00:e0:de:ad:be:ef + + 2. Setup IP parameters: + The board ip address + + setenv ipaddr 10.0.0.2 + + The server ip address where the TFTP server is running + + setenv serverip 10.0.0.1 + + 3. saving Environment to flash + + saveenv + + 4. If Ethernet Phy has not been detected during former bootup, reset + the board to reload U-Boot : the Ethernet address and Phy + initialization shall be ok, now + + 5. Download the NuttX uImage and the root file system to a ram location + using the U-Boot tftp command (Cf. U-Boot script capability chapter). + + 6. Launch NuttX issuing a bootm or boot command. + + If the board has both emac and gmac, you can use following to choose + which one to use: + + setenv ethact macb0,gmacb0 + setenv ethprime gmacb0 + + STATUS: + 2014-3-30: These instructions were adapted from the Linux4SAM website + but have not yet been used. + + Using JTAG + ---------- + + This description assumes that you have a JTAG debugger such as Segger + J-Link connected to the SAMA5D3-Xplained. + + 1. Start the GDB server + 2. Start GDB + 3. Use the 'target remote localhost:xxxx' command to attach to the GDG + server + 4. Do 'mon reset' then 'mon go' to start the internal boot loader (maybe + U-Boot). + 5. Let the boot loader run until it completes SDRAM initialization, then + do 'mon halt'. + 6. Now you have SDRAM initialized and you use 'load nuttx' to load the + ELF file into SDRAM. + 7. Use 'file nuttx' to load symbols + 8. Set the PC to the NuttX entry point 'mon pc 0x20008040' and start + nuttx using 'mon go'. + +Buttons and LEDs +================ + + Buttons + ------- + A single button, PB_USER1 (PB6), is available on the SAMA5D2-XULT + + ------------------------------ ------------------- ------------------------- + SAMA5D2 PIO SIGNAL USAGE + ------------------------------ ------------------- ------------------------- + PB6 USER_PB_PB6 PB_USER push button + ------------------------------ ------------------- ------------------------- + + Closing PB_USER will bring PB6 to ground so 1) PB6 should have a weak pull-up, + and 2) when PB_USER is pressed, a low value will be senses. + + Support for pollable buttons is enabled with: + + CONFIG_ARCH_BUTTONS=y + + For interrupt driven buttons, add: + + CONFIG_ARCH_IRQBUTTONS=y + + Program interfaces for button access are described in nuttx/include/nuttx/arch.h + + There is an example that can be enabled to test button interrupts. That + example is enabled like: + + CONFIG_EXAMPLES_BUTTONS=y + CONFIG_EXAMPLES_BUTTONS_MAX=0 + CONFIG_EXAMPLES_BUTTONS_MIN=0 + CONFIG_EXAMPLES_BUTTONS_NAME0="PB_USER" + CONFIG_EXAMPLES_IRQBUTTONS_MAX=0 + CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 + + LEDs + ---- + + There is an RGB LED on board the SAMA5D2-XULT. The RED component is driven by + the SDHC_CD pin (PA13) and so will not be used. The LEDs are provided VDD_LED + and so bringing the LED low will will illuminated the LED. + + ------------------------------ ------------------- ------------------------- + SAMA5D2 PIO SIGNAL USAGE + ------------------------------ ------------------- ------------------------- + PA13 SDHC_CD_PA13 Red LED + PB5 LED_GREEN_PB5 Green LED + PB0 LED_BLUE_PB0 Blue LED + ------------------------------ ------------------- ------------------------- + + When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + control the Green LED (only)as follows: + + SYMBOL Meaning Green LED + ------------------- ----------------------- --------- + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt N/C + LED_SIGNAL In a signal handler N/C + LED_ASSERTION An assertion failed N/C + LED_PANIC The system has crashed FLASH + + Thus if the Green LED is statically on, NuttX has successfully booted and + is, apparently, running normally. If LED is flashing at approximately + 2Hz, then a fatal error has been detected and the system has halted. + +Serial Console +============== + + DEBUG / DBGU Port (J1). There is a TTL serial connection available on + pins 2 and 3 of the DEBUG connector. This may be driven by UART1, + depending upon the setting of JP2 (DBGU_PE on the schematic, DEBUG_DIS + on the board): + + ---- ------------------------ ------------- + J1 SCHEMATIC SAMA5D2 + PIN NAME(s) PIO FUNCTION + ---- ------------------------ ------------- + 2 DBGU_TXD DBGU_UTXD1_PD3 PD3 UTXD1 + 3 DBGU_RXD DBGU_URXD1_PD2 PD2 URXD1 + ---- ------------------------ ------------- + + Standard UART on Arduino connector (J21) is FLEXCOM4. + Terminologicy: FLEXCOM is the same as USART in previous SAMA5D versions. + + ---- ------- ------------- + J21 BOARD SAMA5D2 + PIN NAME PIO FUNCTION + ---- ------- ------------- + 7 F4_TXD PD12 FLEXCOM4 + 8 F4_RXD PD13 FLEXCOM4 + ---- ------- ------------- + + Other USARTs are available on J22: + + ---- ------- ------------- + J22 BOARD SAMA5D2 + PIN NAME PIO FUNCTION + ---- ------- ------------- + 3 F0_TXD PB28 FLEXCOM0 + 4 F0_RXD PB29 FLEXCOM0 + 5 F3_TXD PB23 FLEXCOM3 + 6 F3_RXD PB22 FLEXCOM3 + ---- ------- ------------- + + UARTs available of EXT1 + + ---- ------- ------------- + EXT1 BOARD SAMA5D2 + PIN NAME PIO FUNCTION + ---- ------- ------------- + 13 UART_RX PA23 FLEXCOM1 + 14 UART_TX PA24 FLEXCOM1 + ---- ------- ---- -------- + + UARTs available of EXT2 + + ---- ------- ------------- + EXT2 BOARD SAMA5D2 + PIN NAME PIO FUNCTION + ---- ------- ------------- + 13 UART_RX PB29 FLEXCOM0 + 14 UART_TX PB28 FLEXCOM0 + ---- ------- ---- -------- + + By default, the standard UART on Arduino connector (J21, FLEXCOM4) is + enabled in all of these configurations unless otherwise noted. + +REVISIT: UART1 on the DBGU connect might be a better choice for the +default serial console + +SAMA5D2-XULT Configuration Options +================================= + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH="arm" + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXA5=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="sama5" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_SAMA5=y + CONFIG_ARCH_CHIP_ATSAMA5D27=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD="sama5d2-xult" (for the SAMA5D2-XULT development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SAMA5D2_XULT=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x0002000 (128Kb) + + CONFIG_RAM_START - The physical start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_RAM_VSTART - The virtual start address of installed DRAM + + CONFIG_RAM_VSTART=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibrate + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: +REVISIT: Unverified, cloned text from the SAMA5D4-EK README.txt + + CONFIG_SAMA5_DBGU - Debug Unit + CONFIG_SAMA5_PIT - Periodic Interval Timer + CONFIG_SAMA5_WDT - Watchdog timer + CONFIG_SAMA5_HSMC - Multi-bit ECC + CONFIG_SAMA5_SMD - SMD Soft Modem + CONFIG_SAMA5_FLEXCOM0 - Flexcom 0 + CONFIG_SAMA5_FLEXCOM1 - Flexcom 0 + CONFIG_SAMA5_FLEXCOM2 - Flexcom 0 + CONFIG_SAMA5_FLEXCOM3 - Flexcom 0 + CONFIG_SAMA5_FLEXCOM4 - Flexcom 0 + CONFIG_SAMA5_UART0 - UART 0 + CONFIG_SAMA5_UART1 - UART 1 + CONFIG_SAMA5_UART2 - UART 2 + CONFIG_SAMA5_UART3 - UART 3 + CONFIG_SAMA5_UART4 - UART 4 + CONFIG_SAMA5_TWI0 - Two-Wire Interface 0 + CONFIG_SAMA5_TWI1 - Two-Wire Interface 1 + CONFIG_SAMA5_SDMMC0 - SD MMC card interface 0 + CONFIG_SAMA5_SDMMC1 - SD MMC card interface 1 + CONFIG_SAMA5_SPI0 - Serial Peripheral Interface 0 + CONFIG_SAMA5_SPI1 - Serial Peripheral Interface 1 + CONFIG_SAMA5_TC0 - Timer Counter 0 (ch. 0, 1, 2) + CONFIG_SAMA5_TC1 - Timer Counter 1 (ch. 3, 4, 5) + CONFIG_SAMA5_PWM - Pulse Width Modulation Controller + CONFIG_SAMA5_ADC - Touch Screen ADC Controller + CONFIG_SAMA5_XDMAC0 - XDMA Controller 0 + CONFIG_SAMA5_XDMAC1 - XDMA Controller 1 + CONFIG_SAMA5_UHPHS - USB Host High Speed + CONFIG_SAMA5_UDPHS - USB Device High Speed + CONFIG_SAMA5_EMAC0 - Ethernet MAC 0 (GMAC0) + CONFIG_SAMA5_EMAC1 - Ethernet MAC 1 (GMAC1) + CONFIG_SAMA5_LCDC - LCD Controller + CONFIG_SAMA5_ISI - Image Sensor Interface + CONFIG_SAMA5_SSC0 - Synchronous Serial Controller 0 + CONFIG_SAMA5_SSC1 - Synchronous Serial Controller 1 + CONFIG_SAMA5_SHA - Secure Hash Algorithm + CONFIG_SAMA5_AES - Advanced Encryption Standard + CONFIG_SAMA5_TDES - Triple Data Encryption Standard + CONFIG_SAMA5_TRNG - True Random Number Generator + CONFIG_SAMA5_ARM - Performance Monitor Unit + CONFIG_SAMA5_FUSE - Fuse Controller + CONFIG_SAMA5_MPDDRC - MPDDR controller + + Some subsystems can be configured to operate in different ways. The drivers + need to know how to configure the subsystem. + + CONFIG_SAMA5_PIOA_IRQ - Support PIOA interrupts + CONFIG_SAMA5_PIOB_IRQ - Support PIOB interrupts + CONFIG_SAMA5_PIOC_IRQ - Support PIOD interrupts + CONFIG_SAMA5_PIOD_IRQ - Support PIOD interrupts + + CONFIG_USART0_ISUART - Flexcom0 is configured as a UART + CONFIG_USART1_ISUART - Flexcom1 is configured as a UART + CONFIG_USART2_ISUART - Flexcom2 is configured as a UART + CONFIG_USART3_ISUART - Flexcom3 is configured as a UART + CONFIG_USART4_ISUART - Flexcom4 is configured as a UART + + AT91SAMA5 specific device driver settings + + CONFIG_SAMA5_DBGU_SERIAL_CONSOLE - selects the DBGU + for the console and ttyDBGU + CONFIG_SAMA5_DBGU_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_SAMA5_DBGU_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_SAMA5_DBGU_BAUD - The configure BAUD of the DBGU. + CONFIG_SAMA5_DBGU_PARITY - 0=no parity, 1=odd parity, 2=even parity + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the DBGU). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARITY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + AT91SAMA5 USB Host Configuration + Pre-requisites + + CONFIG_USBDEV - Enable USB device support + CONFIG_USBHOST - Enable USB host support + CONFIG_SAMA5_UHPHS - Needed + CONFIG_SAMA5_OHCI - Enable the STM32 USB OTG FS block + CONFIG_SCHED_WORKQUEUE - Worker thread support is required + + Options: + + CONFIG_SAMA5_OHCI_NEDS + Number of endpoint descriptors + CONFIG_SAMA5_OHCI_NTDS + Number of transfer descriptors + CONFIG_SAMA5_OHCI_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_SAMA5_OHCI_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_INT_DISABLE + Disable interrupt endpoint support + CONFIG_USBHOST_ISOC_DISABLE + Disable isochronous endpoint support + CONFIG_USBHOST_BULK_DISABLE + Disable bulk endpoint support + +config SAMA5_OHCI_REGDEBUG + +Configurations +============== + + Information Common to All Configurations + ---------------------------------------- + Each SAMA5D2-XULT configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh sama5d2-xult/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on the DBGU (J23). + + 3. All of these configurations use the Code Sourcery for Windows toolchain + (unless stated otherwise in the description of the configuration). That + toolchain selection can easily be reconfigured using 'make menuconfig'. + Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Microsoft Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin or other POSIX environment + + System Type -> Toolchain: + CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for windows + + That same configuration will work with Atmel GCC toolchain. The only + change required to use the Atmel GCC toolchain is to change the PATH + variable so that those tools are selected instead of the CodeSourcery + tools. Try 'which arm-none-eabi-gcc' to make sure that you are + selecting the right tool. + + The setenv.sh file is available for you to use to set the PATH + variable. The path in the that file may not, however, be correct + for your installation. + + See also the "NOTE about Windows native toolchains" in the section call + "GNU Toolchain Options" above. + + !!!WARNING!!! The first time that you type 'make', the system will + configure itself based on the settings in the .config file. One of + these settings can cause a lot of confusion if you configure the build + in the wrong state: If you are running on Linux, make *certain* that + you have CONFIG_HOST_LINUX=y *before* the first make or you will + create a very corrupt configuration that may not be easy to recover + from. + + 4. The SAMA5Dx is running at 528MHz by default in these configurations. + + Board Selection -> CPU Frequency + CONFIG_SAMA5D2XULT_528MHZ=y : Enable 528MHz operation + CONFIG_BOARD_LOOPSPERMSEC=65775 : Calibrated on SAMA5D3-Xplained at + : 528MHz running from SDRAM + + Configuration Sub-directories + ----------------------------- + Summary: Some of the descriptions below are long and wordy. Here is the + concise summary of the available SAMA5D2-XULT configurations: + + nsh: This is a basic NuttShell (NSH) configuration. + + There may be issues with some of these configurations. See the details + for status of individual configurations. + + Now for the gory details: + + nsh: + + This configuration directory provide the NuttShell (NSH). This is a + very simple NSH configuration upon which you can build further + functionality. + + NOTES: + + 1. This configuration uses the the USART3 for the serial console + which is available at the "DBGU" RS-232 connector (J24). That + is easily changed by reconfiguring to (1) enable a different + serial peripheral, and (2) selecting that serial peripheral as + the console device. + + 2. By default, this configuration is set up to build on Windows + under either a Cygwin or MSYS environment using a recent, Windows- + native, generic ARM EABI GCC toolchain (such as the ARM supported + toolchain). Both the build environment and the toolchain + selection can easily be changed by reconfiguring: + + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + CONFIG_ARMV7A_TOOLCHAIN_EABIW=y : Generic GCC EABI toolchain for Windows + + If you are running on Linux, make *certain* that you have + CONFIG_HOST_LINUX=y *before* the first make or you will create a + corrupt configuration that may not be easy to recover from. See + the warning in the section "Information Common to All Configurations" + for further information. + + 4. This configuration supports logging of debug output to a circular + buffer in RAM. This feature is discussed fully in this Wiki page: + http://nuttx.org/doku.php?id=wiki:howtos:syslog . Relevant + configuration settings are summarized below: + + File System: + CONFIG_SYSLOG=y : Enables the System Logging feature. + + Device Drivers: + CONFIG_RAMLOG=y : Enable the RAM-based logging feature. + CONFIG_RAMLOG_CONSOLE=n : (We don't use the RAMLOG console) + CONFIG_RAMLOG_SYSLOG=y : This enables the RAM-based logger as the + system logger. + CONFIG_RAMLOG_NONBLOCKING=y : Needs to be non-blocking for dmesg + CONFIG_RAMLOG_BUFSIZE=16384 : Buffer size is 16KiB + + NOTE: This RAMLOG feature is really only of value if debug output + is enabled. But, by default, no debug output is disabled in this + configuration. Therefore, there is no logic that will add anything + to the RAM buffer. This feature is configured and in place only + to support any future debugging needs that you may have. + + If you don't plan on using the debug features, then by all means + disable this feature and save 16KiB of RAM! + + NOTE: There is an issue with capturing data in the RAMLOG: If + the system crashes, all of the crash dump information will into + the RAMLOG and you will be unable to access it! You can tell that + the system has crashed because (a) it will be unresponsive and (b) + the RED LED will be blinking at about 2Hz. + + That is another good reason to disable the RAMLOG! + + 5. This configuration executes out of SDRAM flash and is loaded into + SDRAM from NAND, Serial DataFlash, SD card or from a TFTPC sever via + U-Boot, BareBox, or the DRAMBOOT configuration described above. Data + also is positioned in SDRAM. + + The load address is different for the DRAMBOOT program and the Linux + bootloaders. This can easily be reconfigured, however: + + CONFIG_SAMA5D2XULT_DRAM_BOOT=y + + See the section above entitled "Creating and Using DRAMBOOT" above + for more information. Here is a summary of the steps that I used + to boot the NSH configuration: + + a. Create the DRAMBOOT program as described above. It should be + configured with CONFIG_SAMA5D2XULT_DRAM_START=y so that DRAMBOOT + will immediately start the program. You may not want to do + this is your prefer to break in with GDB. + + b. Write the DRAMBOOT program binary (nuttx.bin) to a microSD + card as "boot.bin". Insert the microSD card into the boar; + The ROM Booloader should now boot DRAMBOOT on reset and you + should see this message: + + Send Intel HEX file now + + c. Build the NSH version of NuttX. Send the Intel HEX of NSH + at the prompt. After the file is received, NSH should start + automatically. + + At times the past, have have tested with nuttx.bin on an SD card and + booting with U-Boot. These are the commands that I used to boot NuttX + from the SD card: + + U-Boot> fatload mmc 0 0x20008000 nuttx.bin + U-Boot> go 0x20008040 + + 6. Board LEDs and buttons are supported as described under "Buttons and + LEDs". The interrupt button test is also enabled as an NSH built-in + commands. To run this test, you simply inter the command: + + nsh>buttons [npresses] + + The interrupt button test will log button press information to the + syslog. Since the RAMLOG is enabled, the SYSLOG output will be + captured to a circular buffer in ram and may be examined using the + NSH dmesg command: + + nsh> buttons 2 + nsh> dmesg + maxbuttons: 2 + Attached handler at 200106f0 to button 0 [PB_USER], oldhandler:0 + IRQ:81 Button 0:PB_USER SET:01: + PB_USER depressed + IRQ:81 Button 0:PB_USER SET:00: + PB_USER released + IRQ:81 Button 0:PB_USER SET:01: + PB_USER depressed + IRQ:81 Button 0:PB_USER SET:00: + PB_USER released + + 7. This configuration supports /dev/null, /dev/zero, and /dev/random. + + CONFIG_DEV_NULL=y : Enables /dev/null + CONFIG_DEV_ZERO=y : Enabled /dev/zero + + Support for /dev/random is implemented using the SAMA5D2's True + Random Number Generator (TRNG). See the section above entitled + "TRNG and /dev/random" for information about configuring /dev/random. + + CONFIG_SAMA5_TRNG=y : Enables the TRNG peripheral + CONFIG_DEV_RANDOM=y : Enables /dev/random + + 8. This configuration has support for NSH built-in applications enabled. + No built-in applications are enabled, however. + + 9. This configuration has support for the FAT and PROCFS file + systems built in. + + The FAT file system includes long file name support. Please be aware + that Microsoft claims patents against the long file name support (see + more discussion in the top-level COPYING file). + + CONFIG_FS_FAT=y : Enables the FAT file system + CONFIG_FAT_LCNAMES=y : Enable lower case 8.3 file names + CONFIG_FAT_LFN=y : Enables long file name support + CONFIG_FAT_MAXFNAME=32 : Arbitrarily limits the size of a path + segment name to 32 bytes + + The PROCFS file system is enabled simply with: + + CONFIG_FS_PROCFS=y : Enable PROCFS file system + + 10. The Real Time Clock/Calendar (RTC) is enabled in this configuration. + See the section entitled "RTC" above for detailed configuration + settings. + + The RTC alarm is not enabled by default since there is nothing in + this configuration that uses it. The alarm can easily be enabled, + however, as described in the "RTC" section. + + The time value from the RTC will be used as the NuttX system time + in all timestamp operations. You may use the NSH 'date' command + to set or view the RTC as described above in the "RTC" section. + + NOTE: If you want the RTC to preserve time over power cycles, you + will need to install a battery in the battery holder (J12) and close + the jumper, JP13. diff --git a/configs/sama5d2-xult/include/.gitignore b/configs/sama5d2-xult/include/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..0558284d5110fc92af69839ff0d1bf1d9bb1e293 --- /dev/null +++ b/configs/sama5d2-xult/include/.gitignore @@ -0,0 +1 @@ +/boot_romfsimg.h \ No newline at end of file diff --git a/configs/sama5d2-xult/include/board.h b/configs/sama5d2-xult/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..6408b13808d34cdbf35f53d32fa69d0c17d86db7 --- /dev/null +++ b/configs/sama5d2-xult/include/board.h @@ -0,0 +1,306 @@ +/************************************************************************************ + * configs/sama5d2-xult/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_H +#define __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + */ + +/* On-board crystal frequencies */ + +#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */ +#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */ + +#if defined(CONFIG_SAMA5_BOOT_SDRAM) +/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader. + * That bootloader had to have already configured the PLL and SDRAM for proper + * operation. + * + * In this case, we don not reconfigure the clocking. Rather, we need to query + * the register settings to determine the clock frequencies. We can only assume that + * the Main clock source is the on-board 12MHz crystal. + */ + +# include + +#elif defined(CONFIG_SAMA5D2XULT_384MHZ) +/* OHCI Only. This is an alternative slower configuration that will produce a 48MHz + * USB clock with the required accuracy using only PLLA. When PPLA is used to clock + * OHCI, an additional requirement is the PLLACK be a multiple of 48MHz. This setup + * results in a CPU clock of 384MHz. + * + * This case is only interesting for experimentation. + */ + +# include + +#elif defined(CONFIG_SAMA5D2XULT_528MHZ) +/* This is the configuration results in a CPU clock of 528MHz. + * + * In this configuration, UPLL is the source of the UHPHS clock (if enabled). + */ + +# include + +#else /* #elif defined(CONFIG_SAMA5D2XULT_396MHZ) */ +/* This is the configuration provided in the Atmel example code. This setup results + * in a CPU clock of 396MHz. + * + * In this configuration, UPLL is the source of the UHPHS clock (if enabled). + */ + +# include + +#endif + +/* LED definitions ******************************************************************/ +/* There is an RGB LED on board the SAMA5D2-XULT. The RED component is driven by + * the SDHC_CD pin (PA13) and so will not be used. The LEDs are provided VDD_LED + * and so bringing the LED low will will illuminated the LED. + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D2 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PA13 SDHC_CD_PA13 Red LED + * PB5 LED_GREEN_PB5 Green LED + * PB0 LED_BLUE_PB0 Blue LED + * ------------------------------ ------------------- ------------------------- + */ + +#ifndef CONFIG_ARCH_LEDS +/* LED index values for use with board_userled() */ + +#define BOARD_GREEN 0 +#define BOARD_BLUE 1 +#define BOARD_NLEDS 2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_GREEN_BIT (1 << BOARD_GREEN) +#define BOARD_BLUE_BIT (1 << BOARD_BLUE) + +#else +/* LED index values for use with board_userled() */ + +#define BOARD_BLUE 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_BLUE_BIT (1 << BOARD_BLUE) +#endif + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows. Note that only the GREEN LED is used in this case + * + * SYMBOL Val Meaning Green LED + * ----------------- --- ----------------------- ----------- */ +#define LED_STARTED 0 /* NuttX has been started OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON */ +#define LED_INIRQ 2 /* In an interrupt N/C */ +#define LED_SIGNAL 2 /* In a signal handler N/C */ +#define LED_ASSERTION 2 /* An assertion failed N/C */ +#define LED_PANIC 3 /* The system has crashed Flash */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* Thus if the Green LED is statically on, NuttX has successfully booted and + * is, apparently, running normally. If LED is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +/* Button definitions ***************************************************************/ +/* A single button, PB_USER (PB6), is available on the SAMA5D2-XULT + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D2 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PB6 USER_PB_PB6 PB_USER push button + * ------------------------------ ------------------- ------------------------- + * + * Closing PB_USER will bring PB6 to ground so 1) PB6 should have a weak pull-up, + * and 2) when PB_USER is pressed, a low value will be senses. + */ + +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 + +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* Pin disambiguation ***************************************************************/ +/* Alternative pin selections are provided with a numeric suffix like _1, _2, etc. + * Drivers, however, will use the pin selection without the numeric suffix. + * Additional definitions are required in this board.h file. For example, if we + * wanted the PCK0on PB26, then the following definition should appear in the + * board.h header file for that board: + * + * #define PIO_PMC_PCK0 PIO_PMC_PCK0_1 + * + * The PCK logic will then automatically configure PB26 as the PCK0 pin. + */ + +/* DEBUG / DBGU Port (J1). There is a TTL serial connection available on + * pins 2 and 3 of the DEBUG connector. This may be driven by UART1, + * depending upon the setting of JP2 (DBGU_PE on the schematic, DEBUG_DIS + * on the board): + * + * ---- ------------------------ ------------- + * J1 SCHEMATIC SAMA5D2 + * PIN NAME(s) PIO FUNCTION + * ---- ------------------------ ------------- + * 2 DBGU_TXD DBGU_UTXD1_PD3 PD3 UTXD1 + * 3 DBGU_RXD DBGU_URXD1_PD2 PD2 URXD1 + * ---- ------------------------ ------------- + */ + +/* Standard UART on Arduino connector (J21) is FLEXCOM4. + * + * ---- ------- ------------- + * J21 BOARD SAMA5D2 + * PIN NAME PIO FUNCTION + * ---- ------- ------------- + * 7 F4_TXD PD12 FLEXCOM4 + * 8 F4_RXD PD13 FLEXCOM4 + * ---- ------- ------------- + */ + +#define PIO_FLEXCOM4_IO0 PIO_FLEXCOM4_IO0_2 +#define PIO_FLEXCOM4_IO1 PIO_FLEXCOM4_IO1_2 + +/* Other USARTs are available on J22: + * + * ---- ------- ------------- + * J22 BOARD SAMA5D2 + * PIN NAME PIO FUNCTION + * ---- ------- ------------- + * 3 F0_TXD PB28 FLEXCOM0 + * 4 F0_RXD PB29 FLEXCOM0 + * 5 F3_TXD PB23 FLEXCOM3 + * 6 F3_RXD PB22 FLEXCOM3 + * ---- ------- ------------- + */ + +#define PIO_FLEXCOM3_IO0 PIO_FLEXCOM3_IO0_2 +#define PIO_FLEXCOM3_IO1 PIO_FLEXCOM3_IO1_2 + +/* UARTs available of EXT1 + * + * ---- ------- ------------- + * EXT1 BOARD SAMA5D2 + * PIN NAME PIO FUNCTION + * ---- ------- ------------- + * 13 UART_RX PA23 FLEXCOM1 + * 14 UART_TX PA24 FLEXCOM1 + * ---- ------- ---- -------- + */ + +/* UARTs available of EXT2 + * + * ---- ------- ------------- + * EXT2 BOARD SAMA5D2 + * PIN NAME PIO FUNCTION + * ---- ------- ------------- + * 13 UART_RX PB29 FLEXCOM0 + * 14 UART_TX PB28 FLEXCOM0 + * ---- ------- ---- -------- + */ + +/************************************************************************************ + * Assembly Language Macros + ************************************************************************************/ + +#ifdef __ASSEMBLY__ + .macro config_sdram + .endm +#endif /* __ASSEMBLY__ */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAMA5 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_H */ diff --git a/configs/sama5d2-xult/include/board_384mhz.h b/configs/sama5d2-xult/include/board_384mhz.h new file mode 100644 index 0000000000000000000000000000000000000000..177e22b54cdf8516483b7009e8143902cf41b852 --- /dev/null +++ b/configs/sama5d2-xult/include/board_384mhz.h @@ -0,0 +1,224 @@ +/************************************************************************************ + * configs/sama5d2-xult/include/board_384mhz.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_384MHZ_H +#define __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_384MHZ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + * + * This is an alternative slower configuration that will produce a 48MHz USB clock + * with the required accuracy. When used with OHCI, an additional requirement is + * the PLLACK be a multiple of 48MHz. This setup results in a CPU clock of 384MHz. + * + * MAINOSC: Frequency = 12MHz (crystal) + * PLLA: PLL Multiplier = 64 to generate PLLACK = 768MHz + * Master Clock (MCK): Source = PLLACK/2, Prescalar = 1, MDIV = 3 to generate + * MCK = 128MHz + * CPU clock = 384MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Multipler = 64: PLLACK = 64 * 12MHz = 768MHz + */ + +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_OUT (0) +#define BOARD_CKGR_PLLAR_MUL (63 << PMC_CKGR_PLLAR_MUL_SHIFT) + +/* PMC master clock register settings. + * + * Master/Processor Clock Source Selection = PLLA + * Master/Processor Clock Prescaler = 1 + * PLLA Divider = 2 + * Master Clock Division (MDIV) = 3 + * + * NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3. + * + * Prescaler input = 768MHz / 2 = 384MHz + * Prescaler output = 384MHz / 1 = 384MHz + * Processor Clock (PCK) = 384MHz + * Master clock (MCK) = 396MHz / 3 = 128MHz + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 +#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV2 +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV3 + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* For OHCI Full-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in PMC_PCER + * register. + * 2) Select PLLACK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 3) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV value is calculated regarding the PLLACK + * value and USB Full-speed accuracy. + * 4) Enable the OHCI clocks, UHP bit in PMC_SCER register. + * + * "The USB Host controller requires 48 MHz and 12 MHz clocks for OHCI + * full-speed operations. These clocks must be generated by a PLL with a + * correct accuracy of ± 0.25% thanks to USBDIV field. + * + * "Thus the USB Host peripheral receives three clocks from the Power + * Management Controller (PMC): the Peripheral Clock (MCK domain), the + * UHP48M and the UHP12M (built-in UHP48M divided by four) used by the + * OHCI to interface with the bus USB signals (Recovered 12 MHz domain) + * in Full-speed operations" + * + * USB Clock = PLLACK / (USBDIV + 1) = 48MHz + * USBDIV = PLLACK / 48MHz - 1 + * = 15 + * + * The maximum value of USBDIV is 15 corresponding to a divisor of 16. + * REVISIT: However, using the divisor of (15+1) yields a frame rate + * of 500 frames per second. A divisor of (7+1) gives the correct 1MS + * frame rate. I cannot explain the factor of 2 difference. + */ + +# undef BOARD_USE_UPLL /* Use PLLA as source clock */ +# define BOARD_OHCI_INPUT PMC_USB_USBS_PLLA /* Input is PLLACK */ +# if 1 /* REVISIT */ +# define BOARD_OHCI_DIVIDER (7) /* Divided by 8 */ +# else +# define BOARD_OHCI_DIVIDER (15) /* Divided by 16 */ +# endif +#endif + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * + * Given: + * MCK = 128MHz + * ADCClock = 8MHz + * Then: + * PRESCAL = 7 + */ + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* Resulting frequencies */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */ +#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */ +#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */ +#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */ + +/* Clocking to certain peripherals may be MCK/2. + * + * REVISIT: I am not sure why this is. Perhaps because of H32MXDIV? + */ + +#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) +#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) +#define BOARD_FLEXCOM_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 128MHz, CLKDIV = 159, MCI_SPEED = 128MHz / (2*159 + 0 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (159 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 128MHz, CLKDIV = 2 w/CLOCKODD, MCI_SPEED = 128MHz /(2*2 + 1 + 2) = 18.3 MHz */ + +#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 128MHz, CLKDIV = 2, MCI_SPEED = 128MHz /(2*2 + 0 + 2) = 21.3 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + + #undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_384MHZ_H */ diff --git a/configs/sama5d2-xult/include/board_396mhz.h b/configs/sama5d2-xult/include/board_396mhz.h new file mode 100644 index 0000000000000000000000000000000000000000..01673d49920a54a3b9dd162aad3eb59743c8fdc5 --- /dev/null +++ b/configs/sama5d2-xult/include/board_396mhz.h @@ -0,0 +1,216 @@ +/************************************************************************************ + * configs/sama5d2-xult/include/board_396mhz.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_396MHZ_H +#define __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_396MHZ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + * + * This is the configuration provided in the Atmel example code. This results in a + * CPU clock of 396MHz: + * + * MAINOSC: Frequency = 12MHz (crystal) + * PLLA: PLL Multiplier = 66 to generate PLLACK = 792MHz + * Master Clock (MCK): Source = PLLACK/2, Prescalar = 1, MDIV = 3 to generate + * MCK = 132MHz + * CPU clock = 396MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Multipler = 66: PLLACK = 66 * 12MHz = 792MHz + */ + +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_OUT (0) +#define BOARD_CKGR_PLLAR_MUL (65 << PMC_CKGR_PLLAR_MUL_SHIFT) + +/* PMC master clock register settings. + * + * Master/Processor Clock Source Selection = PLLA + * Master/Processor Clock Prescaler = 1 + * PLLA Divider = 2 + * Master Clock Division (MDIV) = 3 + * + * NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3. + * + * Prescaler input = 792MHz / 2 = 396MHz + * Prescaler output = 396MHz / 1 = 396MHz + * Processor Clock (PCK) = 396MHz + * Master clock (MCK) = 396MHz / 3 = 132MHz + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 +#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV2 +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV3 + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * + * Given: + * MCK = 132MHz + * ADCClock = 8MHz + * Then: + * PRESCAL = 7.25 + * + * PRESCAL=7 and MCK=132MHz yields ADC clock of 8.25MHz + */ + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* Resulting frequencies */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */ +#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */ +#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */ +#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */ + +/* Clocking to certain peripherals may be MCK/2. + * + * REVISIT: I am not sure why this is. Perhaps because of H32MXDIV? + */ + +#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) +#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) +#define BOARD_FLEXCOM_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded + * High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL + * (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either + * the 12MHz internal RC oscillator on a an external 12MHz crystal. The + * Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier. + * + * For High-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in + * PMC_PCER register. + * 2) Write CKGR_PLLCOUNT field in PMC_UCKR register. + * 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register. + * 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register + * 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register. + * 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is + * selected. + * 8) Enable OHCI clocks, UHP bit in PMC_SCER register. + * + * Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI + * driver is initialized. + */ + +# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */ +# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */ +# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */ +# define BOARD_UPLL_OHCI_DIV (10) /* Divide by 10 */ +#endif + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 132MHz, CLKDIV = 164, MCI_SPEED = 132MHz / (2*164 + 0 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (164 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 132MHz, CLKDIV = 2 w/CLOCKODD, MCI_SPEED = 132MHz /(2*2 + 1 + 2) = 18.9 MHz */ + +#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 132MHz, CLKDIV = 2, MCI_SPEED = 132MHz /(2*2 + 0 + 2) = 22 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_396MHZ_H */ diff --git a/configs/sama5d2-xult/include/board_528mhz.h b/configs/sama5d2-xult/include/board_528mhz.h new file mode 100644 index 0000000000000000000000000000000000000000..bc7ef83e6a8254d70271de015f4240ba07b767b8 --- /dev/null +++ b/configs/sama5d2-xult/include/board_528mhz.h @@ -0,0 +1,215 @@ +/************************************************************************************ + * configs/sama5d2-xult/include/board_528mhz.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_528MHZ_H +#define __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_528MHZ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + * + * This is the configuration results in a CPU clock of 528MHz: + * + * MAINOSC: Frequency = 12MHz (crystal) + * PLLA: PLL Multiplier = 43+1 to generate PLLACK = 528MHz + * Master Clock (MCK): Source = PLLACK/1, Prescalar = 1, MDIV = 4 to generate + * MCK = 132MHz + * CPU clock = 528MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Multipler = 43+1: PLLACK = 44 * 12MHz = 528MHz + */ + +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_OUT (0) +#define BOARD_CKGR_PLLAR_MUL (43 << PMC_CKGR_PLLAR_MUL_SHIFT) + +/* PMC master clock register settings. + * + * Master/Processor Clock Source Selection = PLLA + * Master/Processor Clock Prescaler = 1 + * PLLA Divider = 1 + * Master Clock Division (MDIV) = 4 + * + * NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3. + * + * Prescaler input = 528MHz / 1 = 528MHz + * Prescaler output = 528MHz / 1 = 528MHz + * Processor Clock (PCK) = 528MHz + * Master clock (MCK) = 528MHz / 4 = 132MHz + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 +#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV1 +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV4 + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * + * Given: + * MCK = 132MHz + * ADCClock = 8MHz + * Then: + * PRESCAL = 7.25 + * + * PRESCAL=7 and MCK=132MHz yields ADC clock of 8.25MHz + */ + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* Resulting frequencies */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */ +#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */ +#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */ +#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */ + +/* Clocking to certain peripherals may be MCK/2. + * + * REVISIT: I am not sure why this is. Perhaps because of H32MXDIV? + */ + +#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) +#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) +#define BOARD_FLEXCOM_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded + * High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL + * (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either + * the 12MHz internal RC oscillator on a an external 12MHz crystal. The + * Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier. + * + * For High-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in + * PMC_PCER register. + * 2) Write CKGR_PLLCOUNT field in PMC_UCKR register. + * 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register. + * 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register + * 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register. + * 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is + * selected. + * 8) Enable OHCI clocks, UHP bit in PMC_SCER register. + * + * Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI + * driver is initialized. + */ + +# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */ +# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */ +# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */ +# define BOARD_UPLL_OHCI_DIV (10) /* Divide by 10 */ +#endif + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 132MHz, CLKDIV = 164, MCI_SPEED = 132MHz / (2*164 + 0 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (164 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 132MHz, CLKDIV = 2 w/CLOCKODD, MCI_SPEED = 132MHz /(2*2 + 1 + 2) = 18.9 MHz */ + +#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 132MHz, CLKDIV = 2, MCI_SPEED = 132MHz /(2*2 + 0 + 2) = 22 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_528MHZ_H */ diff --git a/configs/sama5d2-xult/include/board_memorymap.h b/configs/sama5d2-xult/include/board_memorymap.h new file mode 100644 index 0000000000000000000000000000000000000000..ad291f8834e55834ea52741ae362cd61781a443d --- /dev/null +++ b/configs/sama5d2-xult/include/board_memorymap.h @@ -0,0 +1,73 @@ +/************************************************************************************ + * configs/sama5d2-xult/include/board_memorymap.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_MEMORYMAP_H +#define __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_MEMORYMAP_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_MEMORYMAP_H */ diff --git a/configs/sama5d2-xult/include/board_sdram.h b/configs/sama5d2-xult/include/board_sdram.h new file mode 100644 index 0000000000000000000000000000000000000000..550914e6166ef9f11977246d12f7a9985da2940b --- /dev/null +++ b/configs/sama5d2-xult/include/board_sdram.h @@ -0,0 +1,177 @@ +/************************************************************************************ + * configs/sama5d2-xult/include/board_sdram.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_SDRAM_H +#define __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_SDRAM_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include "sam_pmc.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. When + * booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader. That + * bootloader had to have already configured the PLL and SDRAM for proper operation. + * + * In this case, we do not reconfigure the clocking. Rather, we need to query + * the register settings to determine the clock frequencies. We can only assume that + * the Main clock source is the on-board 12MHz crystal. + */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY)) +#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY)) +#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY)) +#define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY)) + +/* Clocking to certain peripherals may be MCK/2. + * + * REVISIT: I am not sure why this is. Perhaps because of H32MXDIV? + */ + +#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) +#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) +#define BOARD_FLEXCOM_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded + * High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL + * (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either + * the 12MHz internal RC oscillator on a an external 12MHz crystal. The + * Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier. + * + * For High-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in + * PMC_PCER register. + * 2) Write CKGR_PLLCOUNT field in PMC_UCKR register. + * 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register. + * 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register + * 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register. + * 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is + * selected. + * 8) Enable OHCI clocks, UHP bit in PMC_SCER register. + * + * Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI + * driver is initialized. + */ + +# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */ +# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */ +# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */ +# define BOARD_UPLL_OHCI_DIV (10) /* Divide by 10 */ +#endif + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * PRESCAL = (MCK / (2 * ADCClock) - 1) + */ + +#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */ +#define BOARD_ADCCLK_FREQUENCY \ + ((BOARD_PLLADIV2_FREQUENCY / (2 *BOARD_PLLADIV2_FREQUENCY)) - 1) + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * CLKFULLDIV = 2*CLKDIV + CLOCKODD; + * MCI_SPEED = MCK / (CLKFULLDIV + 2) + * CLKFULLDIV = MCK / MCI_SPEED - 2 + * + * CLKDIV = CLKFULLDIV >> 1 + * CLOCKODD = CLKFULLDIV & 1 + * + * Where CLKDIV has a range of 0-255. + */ + +/* Initial clock: 400 KHz (target) */ + +#define HSMCI_INIT_CLKDIV sam_hsmci_clkdiv(400000) + +/* MMC transfer clock: 20 MHz (target) */ + +#define HSMCI_MMCXFR_CLKDIV sam_hsmci_clkdiv(20000000) + +/* SD transfer clock: 25 MHz (target) */ + +#define HSMCI_SDXFR_CLKDIV sam_hsmci_clkdiv(25000000) + +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D2_XULT_INCLUDE_BOARD_SDRAM_H */ diff --git a/configs/sama5d2-xult/nsh/Make.defs b/configs/sama5d2-xult/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..50f6cf8d4a588b7f79bc2db479648b983087c234 --- /dev/null +++ b/configs/sama5d2-xult/nsh/Make.defs @@ -0,0 +1,145 @@ +############################################################################ +# configs/sama5d2-xult/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) +ifeq ($(CONFIG_SAMA5D2XULT_DRAM_BOOT),y) + LDSCRIPT = dramboot.ld +else + LDSCRIPT = uboot.ld +endif +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d2-xult/nsh/defconfig b/configs/sama5d2-xult/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..064eb50ef509d7fb6c542e27eb39dade648211cd --- /dev/null +++ b/configs/sama5d2-xult/nsh/defconfig @@ -0,0 +1,1091 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +CONFIG_ARMV7A_HAVE_L2CC=y +CONFIG_ARMV7A_HAVE_L2CC_PL310=y + +# +# L2 Cache Configuration +# +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USBHOST_BULK_DISABLE is not set +# CONFIG_USBHOST_INT_DISABLE is not set +# CONFIG_USBHOST_ISOC_DISABLE is not set + +# +# SAMA5 Configuration Options +# +CONFIG_SAMA5_HAVE_AESB=y +CONFIG_SAMA5_HAVE_ICM=y +CONFIG_SAMA5_HAVE_RXLP=y +CONFIG_SAMA5_HAVE_UART0=y +CONFIG_SAMA5_HAVE_UART1=y +CONFIG_SAMA5_HAVE_UART2=y +CONFIG_SAMA5_HAVE_UART3=y +CONFIG_SAMA5_HAVE_UART4=y +# CONFIG_SAMA5_HAVE_USART0 is not set +# CONFIG_SAMA5_HAVE_USART1 is not set +# CONFIG_SAMA5_HAVE_USART2 is not set +# CONFIG_SAMA5_HAVE_USART3 is not set +# CONFIG_SAMA5_HAVE_USART4 is not set +CONFIG_SAMA5_HAVE_FLEXCOM0=y +CONFIG_SAMA5_HAVE_FLEXCOM1=y +CONFIG_SAMA5_HAVE_FLEXCOM2=y +CONFIG_SAMA5_HAVE_FLEXCOM3=y +CONFIG_SAMA5_HAVE_FLEXCOM4=y +CONFIG_SAMA5_HAVE_CAN0=y +CONFIG_SAMA5_HAVE_CAN1=y +# CONFIG_SAMA5_HAVE_DMA is not set +CONFIG_SAMA5_HAVE_DDR32=y +CONFIG_SAMA5_HAVE_XDMA=y +CONFIG_SAMA5_HAVE_LCDC=y +# CONFIG_SAMA5_HAVE_GMAC is not set +# CONFIG_SAMA5_HAVE_EMACA is not set +CONFIG_SAMA5_HAVE_EMACB=y +# CONFIG_SAMA5_HAVE_EMAC1 is not set +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +# CONFIG_SAMA5_HAVE_PIOE is not set +CONFIG_SAMA5_HAVE_SAIC=y +# CONFIG_SAMA5_HAVE_SBM is not set +CONFIG_SAMA5_HAVE_SFC=y +CONFIG_SAMA5_HAVE_SPI2=y +# CONFIG_SAMA5_HAVE_TC is not set +CONFIG_SAMA5_HAVE_TC1=y +# CONFIG_SAMA5_HAVE_TC2 is not set +CONFIG_ARCH_HAVE_TRUSTZONE=y +# CONFIG_SAMA5_HAVE_TWI3 is not set +# CONFIG_SAMA5_HAVE_VDEC is not set +CONFIG_SAMA5_FLEXCOM=y +CONFIG_SAMA5_FLEXCOM_USART=y +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +CONFIG_ARCH_CHIP_SAMA5D2=y +# CONFIG_ARCH_CHIP_SAMA5D3 is not set +# CONFIG_ARCH_CHIP_SAMA5D4 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +CONFIG_ARCH_CHIP_ATSAMA5D27=y +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D33 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D44 is not set + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_AESB is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +CONFIG_SAMA5_RTC=y +# CONFIG_SAMA5_ICM is not set +# CONFIG_SAMA5_HSMC is not set +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_SAIC is not set +CONFIG_SAMA5_RXLP=y +# CONFIG_SAMA5_UART0 is not set +# CONFIG_SAMA5_UART1 is not set +# CONFIG_SAMA5_UART2 is not set +# CONFIG_SAMA5_UART3 is not set +# CONFIG_SAMA5_UART4 is not set +# CONFIG_SAMA5_FLEXCOM0 is not set +# CONFIG_SAMA5_FLEXCOM1 is not set +# CONFIG_SAMA5_FLEXCOM2 is not set +# CONFIG_SAMA5_FLEXCOM3 is not set +CONFIG_SAMA5_FLEXCOM4=y +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SFC is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_SPI2 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_TC1 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +# CONFIG_SAMA5_XDMAC0 is not set +# CONFIG_SAMA5_XDMAC1 is not set +CONFIG_SAMA5_UHPHS=y +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_EMACB is not set +# CONFIG_SAMA5_EMAC0 is not set +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_CAN0 is not set +# CONFIG_SAMA5_CAN1 is not set +# CONFIG_SAMA5_SHA is not set +CONFIG_SAMA5_TRNG=y +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +# CONFIG_SAMA5_MPDDRC is not set +CONFIG_SAMA5_PIO_IRQ=y +# CONFIG_SAMA5_PIOA_IRQ is not set +# CONFIG_SAMA5_PIOB_IRQ is not set +# CONFIG_SAMA5_PIOC_IRQ is not set +# CONFIG_SAMA5_PIOD_IRQ is not set + +# +# Flexcom Configuration +# +CONFIG_SAMA5_FLEXCOM4_USART=y +# CONFIG_SAMA5_FLEXCOM4_SPI is not set + +# +# USB High Speed Host Controller driver (HCD) options +# +CONFIG_SAMA5_OHCI=y +CONFIG_SAMA5_OHCI_NEDS=6 +CONFIG_SAMA5_OHCI_NTDS=9 +CONFIG_SAMA5_OHCI_TDBUFFERS=6 +CONFIG_SAMA5_OHCI_TDBUFSIZE=128 +CONFIG_SAMA5_EHCI=y +CONFIG_SAMA5_EHCI_NQHS=4 +CONFIG_SAMA5_EHCI_NQTDS=6 +CONFIG_SAMA5_EHCI_BUFSIZE=128 +CONFIG_SAMA5_EHCI_PREALLOCATE=y +# CONFIG_SAMA5_UHPHS_RHPORT1 is not set +CONFIG_SAMA5_UHPHS_RHPORT2=y +CONFIG_SAMA5_UHPHS_RHPORT3=y + +# +# External Memory Configuration +# +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +CONFIG_SAMA5_BOOT_SDRAM=y + +# +# Heap Configuration +# +CONFIG_SAMA5_ISRAM_HEAP=y +CONFIG_SAMA5_DDRCS_RESERVE=y +CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=65775 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_VSTART=0x20000000 +CONFIG_RAM_SIZE=268435456 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D2_XULT=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d2-xult" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_SAMA5D2XULT_384MHZ is not set +# CONFIG_SAMA5D2XULT_396MHZ is not set +CONFIG_SAMA5D2XULT_528MHZ=y +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +CONFIG_I2S=y + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +CONFIG_ARCH_HAVE_USART4=y +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART4_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART4_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART4 Configuration +# +CONFIG_USART4_RXBUFSIZE=256 +CONFIG_USART4_TXBUFSIZE=256 +CONFIG_USART4_BAUD=115200 +CONFIG_USART4_BITS=8 +CONFIG_USART4_PARITY=0 +CONFIG_USART4_2STOP=0 +# CONFIG_USART4_IFLOWCONTROL is not set +# CONFIG_USART4_OFLOWCONTROL is not set +# CONFIG_USART4_DMA is not set +# CONFIG_USBDEV is not set +CONFIG_USBHOST=y +CONFIG_USBHOST_NPREALLOC=4 +CONFIG_USBHOST_HAVE_ASYNCH=y +# CONFIG_USBHOST_ASYNCH is not set +# CONFIG_USBHOST_HUB is not set +CONFIG_USBHOST_MSC=y +# CONFIG_USBHOST_CDCACM is not set +CONFIG_USBHOST_HIDKBD=y +CONFIG_HIDKBD_POLLUSEC=80000 +CONFIG_HIDKBD_DEFPRIO=50 +CONFIG_HIDKBD_STACKSIZE=1024 +CONFIG_HIDKBD_BUFSIZE=64 +CONFIG_HIDKBD_NPOLLWAITERS=2 +# CONFIG_HIDKBD_RAWSCANCODES is not set +# CONFIG_HIDKBD_ALLSCANCODES is not set +# CONFIG_HIDKBD_NODEBOUNCE is not set +# CONFIG_USBHOST_HIDMOUSE is not set +# CONFIG_USBHOST_TRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +CONFIG_RAMLOG=y +CONFIG_RAMLOG_SYSLOG=y +# CONFIG_RAMLOG_CONSOLE is not set +CONFIG_RAMLOG_BUFSIZE=16384 +# CONFIG_RAMLOG_CRLF is not set +CONFIG_RAMLOG_NONBLOCKING=y +CONFIG_RAMLOG_NPOLLWAITERS=4 +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_CHAR is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +CONFIG_AUDIO=y +# CONFIG_AUDIO_MULTI_SESSION is not set + +# +# Audio Buffer Configuration +# +# CONFIG_AUDIO_LARGE_BUFFERS is not set +CONFIG_AUDIO_NUM_BUFFERS=8 +CONFIG_AUDIO_BUFFER_NUMBYTES=8192 +# CONFIG_AUDIO_DRIVER_SPECIFIC_BUFFERS is not set + +# +# Supported Audio Formats +# +# CONFIG_AUDIO_FORMAT_AC3 is not set +# CONFIG_AUDIO_FORMAT_DTS is not set +CONFIG_AUDIO_FORMAT_PCM=y +# CONFIG_AUDIO_FORMAT_MP3 is not set +# CONFIG_AUDIO_FORMAT_MIDI is not set +# CONFIG_AUDIO_FORMAT_WMA is not set +# CONFIG_AUDIO_FORMAT_OGG_VORBIS is not set + +# +# Exclude Specific Audio Features +# +# CONFIG_AUDIO_EXCLUDE_VOLUME is not set +# CONFIG_AUDIO_EXCLUDE_BALANCE is not set +CONFIG_AUDIO_EXCLUDE_EQUALIZER=y +# CONFIG_AUDIO_EXCLUDE_TONE is not set +# CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME is not set +# CONFIG_AUDIO_EXCLUDE_STOP is not set +# CONFIG_AUDIO_EXCLUDE_FFORWARD is not set +CONFIG_AUDIO_EXCLUDE_REWIND=y +# CONFIG_AUDIO_CUSTOM_DEV_PATH is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_USBKBD is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +CONFIG_SYSTEM_NXPLAYER=y +CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500 +CONFIG_NXPLAYER_COMMAND_LINE=y +CONFIG_NXPLAYER_INCLUDE_HELP=y +CONFIG_NXPLAYER_INCLUDE_DEVICE_SEARCH=y +CONFIG_NXPLAYER_INCLUDE_PREFERRED_DEVICE=y +CONFIG_NXPLAYER_FMT_FROM_EXT=y +# CONFIG_NXPLAYER_FMT_FROM_HEADER is not set +CONFIG_NXPLAYER_INCLUDE_MEDIADIR=y +CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/mnt/sdcard" +CONFIG_NXPLAYER_RECURSIVE_MEDIA_SEARCH=y +CONFIG_NXPLAYER_INCLUDE_SYSTEM_RESET=y +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d2-xult/nsh/setenv.sh b/configs/sama5d2-xult/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..4fac00230324f99d5fdf227aac6cf7460f32772d --- /dev/null +++ b/configs/sama5d2-xult/nsh/setenv.sh @@ -0,0 +1,81 @@ +#!/bin/bash +# configs/sama5d2-xult/nsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d2-xult/scripts/dramboot.ld b/configs/sama5d2-xult/scripts/dramboot.ld new file mode 100644 index 0000000000000000000000000000000000000000..0494ff0a911095b394269d2d9fb3c951bc83786f --- /dev/null +++ b/configs/sama5d2-xult/scripts/dramboot.ld @@ -0,0 +1,123 @@ +/**************************************************************************** + * configs/sama5d2-xult/scripts/dramboot.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMA5D4 has 128 KB of ISRAM beginning at virtual address 0x0020:0000. + * This memory configuration, however, loads into the 256MB SDRAM on board + * the SAMA5D4-EK which lies at 0x2000:0000. + * + * Vectors in low memory are assumed and 16KB of ISRAM is reserved at the + * high end of ISRAM for the page table. + */ + +MEMORY +{ + isram (W!RX) : ORIGIN = 0x00200000, LENGTH = 128K - 16K + sdram (W!RX) : ORIGIN = 0x20000000, LENGTH = 256M +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _etext = ABSOLUTE(.); + } > sdram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > sdram + + .ARM.extab : { + *(.ARM.extab*) + } > sdram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > sdram + PROVIDE_HIDDEN (__exidx_end = .); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sdram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sdram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d2-xult/scripts/gnu-elf.ld b/configs/sama5d2-xult/scripts/gnu-elf.ld new file mode 100644 index 0000000000000000000000000000000000000000..d84460b4c05501a9caca35af8b590aa18d62d46d --- /dev/null +++ b/configs/sama5d2-xult/scripts/gnu-elf.ld @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/sama5d2-xult/scripts/gnu-elf.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +SECTIONS +{ + .text 0x00000000 : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + *(.ctors) /* Old ABI: Unallocated */ + *(.init_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .dtors : + { + _sdtors = . ; + *(.dtors) /* Old ABI: Unallocated */ + *(.fini_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = . ; + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d2-xult/scripts/isram.ld b/configs/sama5d2-xult/scripts/isram.ld new file mode 100644 index 0000000000000000000000000000000000000000..a170e022600e631687625429af85b26a889a8494 --- /dev/null +++ b/configs/sama5d2-xult/scripts/isram.ld @@ -0,0 +1,120 @@ +/**************************************************************************** + * configs/sama5d2-xult/scripts/isram.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMA5D27 has 128 KB of ISRAM beginning at virtual address 0x0020:0000. + * + * Vectors in low memory are assumed and 16KB of ISRAM is reserved at the + * high end of ISRAM for the page table. + */ + +MEMORY +{ + isram (W!RX) : ORIGIN = 0x00200000, LENGTH = 128K - 16K +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _etext = ABSOLUTE(.); + } > isram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > isram + + .ARM.extab : { + *(.ARM.extab*) + } > isram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > isram + PROVIDE_HIDDEN (__exidx_end = .); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > isram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > isram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d2-xult/scripts/uboot.ld b/configs/sama5d2-xult/scripts/uboot.ld new file mode 100644 index 0000000000000000000000000000000000000000..66e524d9225c2416e191226f2721b56963a688c9 --- /dev/null +++ b/configs/sama5d2-xult/scripts/uboot.ld @@ -0,0 +1,124 @@ +/**************************************************************************** + * configs/sama5d2-xult/scripts/uboot.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMA5D4 has 128 KB of ISRAM beginning at virtual address 0x0020:0000. + * This memory configuration, however, loads into the 256MB SDRAM on board + * the SAMA5D4-EK which lies at 0x2000:0000. An offset 0x00008000 is + * reserved for used by the U-boot bootloader. + * + * Vectors in low memory are assumed and 16KB of ISRAM is reserved at the + * high end of ISRAM for the page table. + */ + +MEMORY +{ + isram (W!RX) : ORIGIN = 0x00200000, LENGTH = 128K - 16K + sdram (W!RX) : ORIGIN = 0x20008000, LENGTH = 256M - 32K +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _etext = ABSOLUTE(.); + } > sdram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > sdram + + .ARM.extab : { + *(.ARM.extab*) + } > sdram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > sdram + PROVIDE_HIDDEN (__exidx_end = .); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sdram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sdram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d2-xult/src/Makefile b/configs/sama5d2-xult/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..55e3d8b58e6fbbf6af849c1c2648a1cc07498280 --- /dev/null +++ b/configs/sama5d2-xult/src/Makefile @@ -0,0 +1,57 @@ +############################################################################ +# configs/sama5d2-xult/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c sam_userleds.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += sam_appinit.c sam_bringup.c +else +ifeq ($(CONFIG_BOARD_INITIALIZE),y) +CSRCS += sam_bringup.c +endif +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += sam_autoleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += sam_buttons.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/sama5d2-xult/src/sam_appinit.c b/configs/sama5d2-xult/src/sam_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..8472bc995cdddfa41fb884b0be5ef335aebcb7dc --- /dev/null +++ b/configs/sama5d2-xult/src/sam_appinit.c @@ -0,0 +1,75 @@ +/**************************************************************************** + * config/sama5d2-xult/src/sam_appinit.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "sama5d2-xult.h" + +#ifndef CONFIG_BUILD_KERNEL + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifndef CONFIG_BOARD_INITIALIZE + /* Perform board initialization */ + + return sam_bringup(); +#else + return OK; +#endif +} + +#endif /* CONFIG_BUILD_KERNEL */ diff --git a/configs/sama5d2-xult/src/sam_autoleds.c b/configs/sama5d2-xult/src/sam_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..08f48811f13db23c26e6b452835513b5361aea04 --- /dev/null +++ b/configs/sama5d2-xult/src/sam_autoleds.c @@ -0,0 +1,179 @@ +/**************************************************************************** + * configs/sama5d2-xult/src/sam_autoleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There is an RGB LED on board the SAMA5D2-XULT. The RED component is + * driven by the SDHC_CD pin (PA13) and so will not be used. The LEDs are + * provided VDD_LED and so bringing the LED low will will illuminated the + * LED. + * + * ------------------------------ ------------------- --------------------- + * SAMA5D2 PIO SIGNAL USAGE + * ------------------------------ ------------------- --------------------- + * PA13 SDHC_CD_PA13 Red LED + * PB5 LED_GREEN_PB5 Green LED + * PB0 LED_BLUE_PB0 Blue LED + * ------------------------------ ------------------- --------------------- + * + * These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows. Note that only the GREEN LED is used in this case + * + * SYMBOL Meaning Green LED + * ------------------- ----------------------- --------- + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt N/C + * LED_SIGNAL In a signal handler N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus if the Green LED is statically on, NuttX has successfully booted + * and is, apparently, running normally. If LED is flashing at + * approximately 2Hz, then a fatal error has been detected and the system + * has halted. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_pio.h" +#include "sama5d2-xult.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED PIOs for output */ + + sam_configpio(PIO_LED_GREEN); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + default: + case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED */ + break; /* Leave Green LED off */ + + case 1: /* LED_STACKCREATED */ + case 3: /* LED_PANIC */ + { + /* Green LED is ON (Low illuminates) */ + + sam_piowrite(PIO_LED_GREEN, false); + } + break; + + case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ + break; /* No change */ + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + default: + case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED, */ + case 1: /* LED_STACKCREATED */ + break; /* Will not happen */ + + case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ + break; /* No change */ + + case 3: /* LED_PANIC */ + { + /* Power LED is OFF (Low illuminates) */ + + sam_piowrite(PIO_LED_GREEN, true); + } + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/sama5d2-xult/src/sam_boot.c b/configs/sama5d2-xult/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..ccfc900d094f660fe38c6f8f05faa15d64818733 --- /dev/null +++ b/configs/sama5d2-xult/src/sam_boot.c @@ -0,0 +1,100 @@ +/************************************************************************************ + * configs/sama5d2-xult/src/sam_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "sama5d2-xult.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAMA5 architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void) +{ +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform board initialization */ + + (void)sam_bringup(); +} +#endif /* CONFIG_BOARD_INITIALIZE */ + diff --git a/configs/sama5d2-xult/src/sam_bringup.c b/configs/sama5d2-xult/src/sam_bringup.c new file mode 100644 index 0000000000000000000000000000000000000000..3603c51d9a9bd7ae8ffaa8e322ee1627be0a938e --- /dev/null +++ b/configs/sama5d2-xult/src/sam_bringup.c @@ -0,0 +1,86 @@ +/**************************************************************************** + * config/sama5d2-xult/src/sam_bringup.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include "sama5d2-xult.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +# define SYSLOG lldbg +#else +# define SYSLOG dbg +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int sam_bringup(void) +{ +#ifdef CONFIG_FS_PROCFS + int ret; + + /* Mount the procfs file system */ + + ret = mount(NULL, SAMA5_PROCFS_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to mount procfs at %s: %d\n", + SAMA5_PROCFS_MOUNTPOINT, ret); + } +#endif + + return OK; +} diff --git a/configs/sama5d2-xult/src/sam_buttons.c b/configs/sama5d2-xult/src/sam_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..2bdef205c0242dd32ffd2ba51c550e9808ecbc0e --- /dev/null +++ b/configs/sama5d2-xult/src/sam_buttons.c @@ -0,0 +1,182 @@ +/**************************************************************************** + * configs/sama5d2-xult/src/sam_buttons.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* A single button, PB_USER (PB6), is available on the SAMA5D2-XULT + * + * ------------------------------ ------------------- ---------------------- + * SAMA5D2 PIO SIGNAL USAGE + * ------------------------------ ------------------- ---------------------- + * PB6 USER_PB_PB6 PB_USER push button + * ------------------------------ ------------------- ---------------------- + * + * Closing PB_USER will bring PB6 to ground so 1) PB6 should have a weak + * pull-up, and 2) when PB_USER is pressed, a low value will be senses. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "sam_pio.h" +#include "sama5d2-xult.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_SAMA5_PIOB_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +static xcpt_t g_irquser1; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + (void)sam_configpio(PIO_BTN_USER); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return sam_pioread(PIO_BTN_USER) ? 0 : BUTTON_USER_BIT; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address is returned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_SAMA5_PIO_IRQ must be selected to enable the + * overall PIO IRQ feature and CONFIG_SAMA5_PIOB_IRQ must be enabled to + * select PIOs to support interrupts on PIOE. + * + ****************************************************************************/ + +#if defined(CONFIG_SAMA5_PIOB_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id == BUTTON_USER) + { + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = g_irquser1; + g_irquser1 = irqhandler; + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + /* Configure the interrupt */ + + sam_pioirq(PIO_BTN_USER); + (void)irq_attach(IRQ_BTN_USER, irqhandler); + sam_pioirqenable(IRQ_BTN_USER); + } + else + { + /* Disable and detach the interrupt */ + + sam_pioirqdisable(IRQ_BTN_USER); + (void)irq_detach(IRQ_BTN_USER); + } + + leave_critical_section(flags); + } + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/sama5d2-xult/src/sam_userleds.c b/configs/sama5d2-xult/src/sam_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..1de7aaf6a4693311e1f9182a26ea20ece2e90b43 --- /dev/null +++ b/configs/sama5d2-xult/src/sam_userleds.c @@ -0,0 +1,146 @@ +/**************************************************************************** + * configs/sama5d2-xult/src/sam_userleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There is an RGB LED on board the SAMA5D2-XULT. The RED component is + * driven by the SDHC_CD pin (PA13) and so will not be used. The LEDs are + * provided VDD_LED and so bringing the LED low will will illuminated the + * LED. + * + * ------------------------------ ------------------- --------------------- + * SAMA5D2 PIO SIGNAL USAGE + * ------------------------------ ------------------- --------------------- + * PA13 SDHC_CD_PA13 Red LED + * PB5 LED_GREEN_PB5 Green LED + * PB0 LED_BLUE_PB0 Blue LED + * ------------------------------ ------------------- --------------------- + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_pio.h" +#include "sama5d2-xult.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED PIOs for output */ + +#ifndef CONFIG_ARCH_LEDS + sam_configpio(PIO_LED_GREEN); +#endif + sam_configpio(PIO_LED_BLUE); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint32_t ledcfg; + +#ifndef CONFIG_ARCH_LEDS + if (led == BOARD_GREEN) + { + ledcfg = PIO_LED_GREEN; + } + else +#endif + if (led == BOARD_BLUE) + { + ledcfg = PIO_LED_BLUE; + } + else + { + return; + } + + /* Low illuminates */ + + sam_piowrite(ledcfg, !ledon); +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + bool ledon; + +#ifndef CONFIG_ARCH_LEDS + /* Low illuminates */ + + ledon = ((ledset & BOARD_GREEN_BIT) == 0); + sam_piowrite(PIO_LED_GREEN, ledon); +#endif + + /* Low illuminates */ + + ledon = ((ledset &BOARD_BLUE_BIT) != 0); + sam_piowrite(PIO_LED_BLUE, ledon); +} diff --git a/configs/sama5d2-xult/src/sama5d2-xult.h b/configs/sama5d2-xult/src/sama5d2-xult.h new file mode 100644 index 0000000000000000000000000000000000000000..59875ae36b91e5781608f7b08774b86544212821 --- /dev/null +++ b/configs/sama5d2-xult/src/sama5d2-xult.h @@ -0,0 +1,131 @@ +/************************************************************************************ + * configs/sama5d2-xult/src/sama5d2-xult.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D2_XULT_SRC_SAMA5D2_XULT_H +#define __CONFIGS_SAMA5D2_XULT_SRC_SAMA5D2_XULT_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include +#include + +#include +#include + +#include "chip/sam_pinmap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* procfs File System */ + +#ifdef CONFIG_FS_PROCFS +# ifdef CONFIG_NSH_PROC_MOUNTPOINT +# define SAMA5_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT +# else +# define SAMA5_PROCFS_MOUNTPOINT "/proc" +# endif +#endif + +/* LEDs *****************************************************************************/ +/* There is an RGB LED on board the SAMA5D2-XULT. The RED component is driven by + * the SDHC_CD pin (PA13) and so will not be used. The LEDs are provided VDD_LED + * and so bringing the LED low will illuminated the LED. + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D2 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PA13 SDHC_CD_PA13 Red LED + * PB5 LED_GREEN_PB5 Green LED + * PB0 LED_BLUE_PB0 Blue LED + * ------------------------------ ------------------- ------------------------- + */ + +#define PIO_LED_GREEN (PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_SET | \ + PIO_PORT_PIOB | PIO_PIN5) +#define PIO_LED_BLUE (PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_SET | \ + PIO_PORT_PIOB | PIO_PIN0) + +/* Buttons **************************************************************************/ +/* A single button, PB_USER (PB6), is available on the SAMA5D2-XULT + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D2 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PB6 USER_PB_PB6 PB_USER push button + * ------------------------------ ------------------- ------------------------- + * + * Closing PB_USER will bring PB6 to ground so 1) PB6 should have a weak pull-up, + * and 2) when PB_USER is pressed, a low value will be senses. + */ + +#define PIO_BTN_USER (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOB | PIO_PIN6) +#define IRQ_BTN_USER SAM_IRQ_PB6 + + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: sam_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int sam_bringup(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D2_XULT_SRC_SAMA5D2_XULT_H */ + diff --git a/configs/sama5d3-xplained/Kconfig b/configs/sama5d3-xplained/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..46087605adef69600512fa3a10340df3086e27d9 --- /dev/null +++ b/configs/sama5d3-xplained/Kconfig @@ -0,0 +1,176 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAMA5D3_XPLAINED + +choice + prompt "CPU Frequency" + default SAMA5D3XPLAINED_396MHZ + +config SAMA5D3XPLAINED_384MHZ + bool "384 MHz" + +config SAMA5D3XPLAINED_396MHZ + bool "396 MHz" + +config SAMA5D3XPLAINED_528MHZ + bool "528 MHz" + +endchoice # CPU Frequency + +config SAMA5D3XPLAINED_SLOWCLOCK + bool + default y if SCHED_TICKLESS + default n if !SCHED_TICKLESS + +choice + prompt "SAMA5D3-Xplained DRAM Type" + default SAMA5D3XPLAINED_MT47H128M16RT + depends on SAMA5_DDRCS + +config SAMA5D3XPLAINED_MT47H128M16RT + bool "MT47H128M16RT" + ---help--- + Micron 2Gbit x16 DDR2-1066 128Mb + +config SAMA5D3XPLAINED_MT47H64M16HR + bool "MT47H64M16HR" + ---help--- + Micron 1Gbit x16 DDR2-800 64Mb + +endchoice # SAMA5D3-Xplained DRAM Type + +config SAMA5D3XPLAINED_NAND_BLOCKMOUNT + bool "NAND FLASH auto-mount" + default n + depends on NSH_ARCHINIT && SAMA5_EBICS3_NAND + ---help--- + Automatically initialize the NAND FLASH driver when NSH starts. + +choice + prompt "NAND FLASH configuration" + default SAMA5D3XPLAINED_NAND_NXFFS + depends on SAMA5D3XPLAINED_NAND_BLOCKMOUNT + +config SAMA5D3XPLAINED_NAND_FTL + bool "Create NAND FLASH block driver" + depends on MTD && MTD_NAND + ---help--- + Create the MTD driver for the NAND and "wrap" the NAND as a standard + block driver that could then, for example, be mounted using FAT or + any other file system. Any file system may be used, but there will + be no wear-leveling. + + NOTE: This options is not currently recommended. There is not now + NuttX file system that can handle the NAND back blocks or performs + wear-leveling other than NXFFS and NXFFS does not use a block driver + but, rather, operates directly upon the NAND MTD device. + +config SAMA5D3XPLAINED_NAND_NXFFS + bool "Create NAND FLASH NXFFS file system" + depends on MTD && MTD_NAND && FS_NXFFS && NXFFS_NAND + ---help--- + Create the MTD driver for the NAND and mount the NAND device as + a wear-leveling, NuttX FLASH file system (NXFFS). The downside of + NXFFS is that it can be very slow. + + NOTE: NXFFS is recommended because (1) it can handle the NAND back + blocks and (1) performs wear-leveling. + +endchoice # NAND FLASH configuration + +config SAMA5D3XPLAINED_AT25_AUTOMOUNT + bool "AT25 serial FLASH auto-mount" + default n + depends on NSH_ARCHINIT && SAMA5_SPI0 && MTD_AT25 + ---help--- + Automatically initialize the AT25 SPI FLASH driver when NSH starts. + +choice + prompt "AT25 serial FLASH configuration" + default SAMA5D3XPLAINED_AT25_FTL + depends on SAMA5D3XPLAINED_AT25_AUTOMOUNT + +config SAMA5D3XPLAINED_AT25_FTL + bool "Create AT25 Serial FLASH block driver" + ---help--- + Create the MTD driver for the AT25 and "wrap" the AT25 as a standard + block driver that could then, for example, be mounted using FAT or + any other file system. Any file system may be used, but there will + be no wear-leveling. + +config SAMA5D3XPLAINED_AT25_NXFFS + bool "Create AT25 serial FLASH NXFFS file system" + depends on FS_NXFFS + ---help--- + Create the MTD driver for the AT25 and mount the AT25 device as + a wear-leveling, NuttX FLASH file system (NXFFS). The downside of + NXFFS is that it can be very slow. + +endchoice # AT25 serial FLASH configuration + +config SAMA5D3XPLAINED_USBHOST_STACKSIZE + int "USB host waiter stack size" + default 1536 if USBHOST_HUB + default 1024 if !USBHOST_HUB + depends on USBHOST + +config SAMA5D3XPLAINED_USBHOST_PRIO + int "USB host waiter task priority" + default 100 + depends on USBHOST + +config SAMA5D3XPLAINED_CHANNEL + int "PWM channel number" + default 0 if SAMA5_PWM_CHAN0 + default 1 if SAMA5_PWM_CHAN1 + default 2 if SAMA5_PWM_CHAN2 + default 3 if SAMA5_PWM_CHAN3 + range 0 3 + depends on PWM && SAMA5_PWM + ---help--- + Selects the PWM channel number that will be used to perform the PWM + test. See apps/examples/pwm. + +if AUDIO_I2SCHAR && (SAMA5_SSC0 || SAMA5_SSC1) + +if SAMA5_SSC0 && SAMA5_SSC1 + +config SAMA5D3XPLAINED_SSC_PORT + int "SSC port number" + default 0 + range 0 1 + ---help--- + Specify the I2S port to use, i.e., 0 for SSC0 or 1 for SSC1 + +endif # SAMA5_SSC0 && SAMA5_SSC1 + +if SAMA5_SSC0 && !SAMA5_SSC1 + +config SAMA5D3XPLAINED_SSC_PORT + int + default 0 + +endif # SAMA5_SSC0 && !SAMA5_SSC1 + +if !SAMA5_SSC0 && SAMA5_SSC1 + +config SAMA5D3XPLAINED_SSC_PORT + int + default 1 + +endif # SAMA5_SSC0 && !SAMA5_SSC1 + +config SAMA5D3XPLAINED_I2SCHAR_MINOR + int "I2S character driver minor number" + default 0 + ---help--- + The minor device number to use when registering the I2S character + device. The driver will be registered at /dev/is2charN where N is + the value provided by this setting. + +endif # AUDIO_I2SCHAR && (SAMA5_SSC0 || SAMA5_SSC1) + +endif # ARCH_BOARD_SAMA5D3_XPLAINED diff --git a/configs/sama5d3-xplained/README.txt b/configs/sama5d3-xplained/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..5421b218f93afb437ea4db45e9466d556e4f3a97 --- /dev/null +++ b/configs/sama5d3-xplained/README.txt @@ -0,0 +1,3275 @@ +README +====== + + This README file describes the port of NuttX to the SAMA5D3-Xplained + development board. This board features the Atmel SAMA5D36 microprocessor. + See http://www.atmel.com/devices/sama5d36.aspx for further information. + + PARAMETER SAMA5D36 + ------------------------- ------------- + Pin Count 324 + Max. Operating Frequency 536 MHz + CPU Cortex-A5 + Max I/O Pins 160 + Ext Interrupts 160 + USB Transceiver 3 + USB Speed Hi-Speed + USB Interface Host, Device + SPI 6 + TWI (I2C) 3 + UART 7 + CAN 2 + LIN 4 + SSC 2 + Ethernet 2 + SD / eMMC 3 + Graphic LCD Yes + Camera Interface Yes + ADC channels 12 + ADC Resolution (bits) 12 + ADC Speed (ksps) 1000 + Resistive Touch Screen Yes + Crypto Engine AES/DES/ + SHA/TRNG + SRAM (Kbytes) 128 + External Bus Interface 1 + DRAM Memory DDR2/LPDDR, + SDRAM/LPSDR + NAND Interface Yes + Temp. Range (deg C) -40 to 105 + I/O Supply Class 1.8/3.3 + Operating Voltage (Vcc) 1.08 to 1.32 + FPU Yes + MPU / MMU No/Yes + Timers 6 + Output Compare channels 6 + Input Capture Channels 6 + PWM Channels 4 + 32kHz RTC Yes + Packages LFBGA324_A + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NXFLAT Toolchain + - Loading Code into SRAM with J-Link + - Writing to FLASH using SAM-BA + - Running NuttX from SDRAM + - Buttons and LEDs + - Serial Console + - Networking + - AT25 Serial FLASH + - HSMCI Card Slots + - Auto-Mounter + - USB Ports + - USB High-Speed Device + - USB High-Speed Host + - SDRAM Support + - NAND Support + - I2C Tool + - CAN Usage + - SAMA5 ADC Support + - SAMA5 PWM Support + - RTC + - Watchdog Timer + - TRNG and /dev/random + - Tickless OS + - I2S Audio Support + - Shields + - SAMA5D3-Xplained Configuration Options + - Configurations + - To-Do List + +Development Environment +======================= + + Several possible development environments may be used: + + - Linux or OSX native + - Cygwin unders Windows + - MinGW + MSYS under Windows + - Windows native (with GNUMake from GNUWin32). + + All testing has been performed using Cygwin under Windows. + + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + The NuttX make system will support the several different toolchain options. + + All testing has been conducted using the CodeSourcery GCC toolchain. To use + a different toolchain, you simply need to add change to one of the following + configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7A_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux + CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y : Generic GCC ARM EABI toolchain for Windows + + The CodeSourcery GCC toolchain is selected with + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y and setting the PATH variable + appropriately. + + NOTE about Windows native toolchains + ------------------------------------ + + There are several limitations to using a Windows based toolchain in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' + utility but you might easily find some new path problems. If so, check + out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic + links are used in Nuttx (e.g., include/arch). The make system works + around these problems for the Windows tools by copying directories + instead of linking them. But this can also cause some confusion for + you: For example, you may edit a file in a "linked" directory and find + that your changes had no effect. That is because you are building the + copy of the file in the "fake" symbolic directory. If you use a\ + Windows toolchain, you should get in the habit of making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/sam34, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/sam34/sam_vectors.S. You may need to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh sama5d3-xplained/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. Copy the configuration file from the configs/ sub-directory to the + top-level build directory: + + cp configs/cortexa8-eabi-defconfig-4.8.2 .config + + 6a. You may wish to modify the configuration before you build it. For + example, it is recommended that you build the kconfig-frontends tools, + generomfs, and the NXFLAT tools as well. You may also want to change + the selected toolchain. These reconfigurations can all be done with + + make menuconfig + + 6b. If you chose to make the configuration with no changes, then you + should still do the following to make certain that the build + configuration is up-to-date: + + make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh sama5d3-xplained/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built NXFLAT binaries. + + NOTE: There are some known incompatibilities with 4.6.3 EABI toolchain + and the NXFLAT tools. See the top-level TODO file (under "Binary + loaders") for more information about this problem. If you plan to use + NXFLAT, please do not use the GCC 4.6.3 EABI toochain. + +Loading Code into SRAM with J-Link +================================== + + Loading code with the Segger tools and GDB + ------------------------------------------ + + 1) Change directories into the directory where you built NuttX. + 2) Start the GDB server and wait until it is ready to accept GDB + connections. + 3) Then run GDB like this: + + $ arm-none-eabi-gdb + (gdb) target remote localhost:2331 + (gdb) mon reset + (gdb) load nuttx + (gdb) ... start debugging ... + + Loading code using J-Link Commander + ---------------------------------- + + J-Link> r + J-Link> loadbin
+ J-Link> setpc
+ J-Link> ... start debugging ... + +Writing to FLASH using SAM-BA +============================= + + Assumed starting configuration: + + 1. You have installed the J-Link CDC USB driver (Windows only, there is + no need to install a driver on any regular Linux distribution), + 2. You have the USB connected to DBGU port (J23) + 3. Terminal configuration: 115200 8N1 + + Using SAM-BA to write to FLASH: + + 1. Exit the terminal emulation program and remove the USB cable from + the DBGU port (J23) + 2. Connect the USB cable to the device USB port (J6) + 3. JP9 must open (BMS == 1) to boot from on-chip Boot ROM. + 4. Press and maintain PB4 CS_BOOT button and power up the board. PB4 + CS_BOOT button prevents booting from Nand or serial Flash by + disabling Flash Chip Selects after having powered the board, you can + release the PB4 BS_BOOT button. + 5. On Windows you may need to wait for a device driver to be installed. + 6. Start the SAM-BA application, selecting (1) the correct USB serial + port, and (2) board = at91sama5d3-xplained. + 7. The SAM-BA menu should appear. + 8. Select the FLASH bank that you want to use and the address to write + to and "Execute" + 9. When you are finished writing to FLASH, remove the USB cable from J6 + and re-connect the serial link on USB CDC / DBGU connector (J23) and + re-open the terminal emulator program. + 10. Power cycle the board. + +Running NuttX from SDRAM +======================== + + NuttX may be executed from SDRAM. But this case means that the NuttX + binary must reside on some other media (typically NAND FLASH, Serial + FLASH, or, perhaps even a TFTP server). In these cases, an intermediate + bootloader such as U-Boot or Barebox must be used to configure the + SAMA5D3 clocks and SDRAM and then to copy the NuttX binary into SDRAM. + + - NuttX Configuration + - Boot sequence + - NAND FLASH Memory Map + - Programming the AT91Boostrap Binary + - Programming U-Boot + - Load NuttX with U-Boot on AT91 boards + + TODO: Some drivers may require some adjustments to run from SDRAM. That + is because in this case macros like BOARD_MCK_FREQUENCY are not constants + but are instead function calls: The MCK clock frequency is not known in + advance but instead has to be calculated from the bootloader PLL configuration. + See the TODO list at the end of this file for further information. + +NuttX Configuration +------------------- + + In order to run from SDRAM, NuttX must be built at origin 0x20008000 in + SDRAM (skipping over SDRAM memory used by the bootloader). The following + configuration option is required: + + CONFIG_SAMA5_BOOT_SDRAM=y + CONFIG_BOOT_RUNFROMSDRAM=y + + These options tell the NuttX code that it will be booting and running from + SDRAM. In this case, the start-logic will do to things: (1) it will not + configure the SAMA5D3 clocking. Rather, it will use the clock configuration + as set up by the bootloader. And (2) it will not attempt to configure the + SDRAM. Since NuttX is already running from SDRAM, it must accept the SDRAM + configuration as set up by the bootloader. + +Boot sequence +------------- + + Reference: http://www.at91.com/linux4sam/bin/view/Linux4SAM/GettingStarted + + Several pieces of software are involved to boot a Nutt5X into SDRAM. First + is the primary bootloader in ROM which is in charge to check if a valid + application is present on supported media (NOR FLASH, Serial DataFlash, + NAND FLASH, SD card). + + The boot sequence of linux4SAM is done in several steps : + + 1. The ROM bootloader checks if a valid application is present in FLASH + and if it is the case downloads it into internal SRAM. This program + is usually a second level bootloader called AT91BootStrap. + + 2. AT91Bootstrap is the second level bootloader. It is in charge of the + hardware configuration. It downloads U-Boot / Barebox binary from + FLASH to SDRAM / DDRAM and starts the third level bootloader + (U-Boot / Barebox) + + (see http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap). + + 3. The third level bootloader is either U-Boot or Barebox. The third + level bootloader is in charge of downloading NuttX binary from FLASH, + network, SD card, etc. It then starts NuttX. + + 4. Then NuttX runs from SDRAM + +NAND FLASH Memory Map +--------------------- + + Reference: http://www.at91.com/linux4sam/bin/view/Linux4SAM/GettingStarted + + 0x0000:0000 - 0x0003:ffff: AT91BootStrap + 0x0004:0000 - 0x000b:ffff: U-Boot + 0x000c:0000 - 0x000f:ffff: U-Boot environment + 0x0010:0000 - 0x0017:ffff: U-Boot environement redundant + 0x0018:0000 - 0x001f:ffff: Device tree (DTB) + 0x0020:0000 - 0x007f:ffff: NuttX + 0x0080:0000 - end: Available for use as a NAND file system + +Programming the AT91Boostrap Binary +----------------------------------- + + Reference: http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap + + This section describes how to program AT91Bootstrap binary into the boot + media with SAM-BA tool using NandFlash as boot media. + + 1. Get AT91BootStrap binaries. Build instructions are available here: + + http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap#Build_AT91Bootstrap_from_sources + + A pre-built AT91BootStrap binary is available here: + + ftp://www.at91.com/pub/at91bootstrap/AT91Bootstrap3.6.1/sama5d3_xplained-nandflashboot-uboot-3.6.1.bin + + 2. Start the SAM-BA GUI Application: + + - Connect the USB Device interface to your host machine using the USB + Device Cable. + - Make sure that the chip can execute the SAM-BA Monitor. + - Start SAM-BA GUI application. + - Select the board in the drop-down menu and choose the USB connection. + + 3. In the SAM-BA GUI Application: + + - Choose the "NandFlash" tab in the SAM-BA GUI interface. + - Initialize the NandFlash by choosing the "Enable NandFlash" action in + the Scripts rolling menu, then press "Execute" button. + - Erase the NandFlash device by choosing the "Erase All" action, then + press "Execute" button. + - Enable the PMECC by choosing the "Enable OS PMECC parameters" action, + then press "Execute" button. + + PMECC + Number of sectors per page: 4 + Spare Size: 64 + Number of ECC bits required: 4 + Size of the ECC sector: 512 + ECC offset: 36 + + - Choose "Send Boot File" action, then press Execute button to select the + at91bootstrap binary file and to program the binary to the NandFlash. + - Close SAM-BA, remove the USB Device cable. + +Programming U-Boot +------------------- + + Reference http://www.at91.com/linux4sam/bin/view/Linux4SAM/U-Boot + + 1. Get U-Boot Binaries. Build instructions are available here: + + http://www.at91.com/linux4sam/bin/view/Linux4SAM/U-Boot#Build_U_Boot_from_sources + + A pre-Built binary image is available here: + + ftp://www.at91.com/pub/uboot/u-boot-v2013.07/u-boot-sama5d3_xplained-v2013.07-at91-r1.bin + + 2. Start the SAM-BA GUI Application: + + - Connect the USB Device interface to your host machine using the USB + Device Cable. + - Make sure that the chip can execute the SAM-BA Monitor. + - Start SAM-BA GUI application. + - Select the board in the drop-down menu and choose the USB connection. + + 3. In the SAM-BA GUI Application: + + - Choose the NandFlash tab in the SAM-BA GUI interface. + - Initialize the NandFlash by choosing the "Enable NandFlash" action in + the Scripts rolling menu, then press Execute button. + - Enable the PMECC by choosing the "Enable OS PMECC parameters" action, + then press Execute button. + + PMECC + Number of sectors per page: 4 + Spare Size: 64 + Number of ECC bits required: 4 + Size of the ECC sector: 512 + ECC offset: 36 + + - Press the "Send File Name" Browse button + - Choose u-boot.bin binary file and press Open + - Enter the proper address on media in the Address text field: + 0x00040000 + - Press the "Send File" button + - Close SAM-BA, remove the USB Device cable. + + You should now be able to interrupt with U-Boot vie the DBGU interface. + +Load NuttX with U-Boot on AT91 boards +------------------------------------- + + Reference http://www.at91.com/linux4sam/bin/view/Linux4SAM/U-Boot + + Preparing NuttX image + + U-Boot does not support normal binary images. Instead you have to + create an uImage file with the mkimage tool which encapsulates kernel + image with header information, CRC32 checksum, etc. + + mkimage comes in source code with U-Boot distribution and it is built + during U-Boot compilation (u-boot-source-dir/tools/mkimage). There + are also sites where you can download pre-built mkimage binaries. For + example: http://www.trimslice.com/wiki/index.php/U-Boot_images + + See the U-Boot README file for more information. More information is + also available in the mkimage man page (for example, + http://linux.die.net/man/1/mkimage). + + Command to generate an uncompressed uImage file (4) : + + mkimage -A arm -O linux -C none -T kernel -a 20008000 -e 20008000 \ + -n nuttx -d nuttx.bin uImage + + Where: + + -A arm: Set architecture to ARM + -O linux: Select operating system. bootm command of u-boot changes + boot method by os type. + -T kernel: Set image type. + -C none: Set compression type. + -a 20008000: Set load address. + -e 20008000: Set entry point. + -n nuttx: Set image name. + -d nuttx.bin: Use image data from nuttx.bin. + + This will generate a binary called uImage. If you have the path to + mkimage in your PATH variable, then you can automatically build the + uImage file by adding the following to your .config file: + + CONFIG_RAW_BINARY=y + CONFIG_UBOOT_UIMAGE=y + CONFIG_UIMAGE_LOAD_ADDRESS=0x20008000 + CONFIG_UIMAGE_ENTRY_POINT=0x20008040 + + The uImage file can them be loaded into memory from a variety of sources + (serial, SD card, JFFS2 on NAND, TFTP). + + STATUS: + 2014-4-1: So far, I am unable to get U-Boot to execute the uImage + file. I get the following error messages (in this case + trying to load from an SD card): + + U-Boot> fatload mmc 0 0x22000000 uimage + reading uimage + 97744 bytes read in 21 ms (4.4 MiB/s) + + U-Boot> bootm 0x22000000 + ## Booting kernel from Legacy Image at 0x22000000 ... + Image Name: nuttx + Image Type: ARM Linux Kernel Image (uncompressed) + Data Size: 97680 Bytes = 95.4 KiB + Load Address: 20008000 + Entry Point: 20008040 + Verifying Checksum ... OK + XIP Kernel Image ... OK + FDT and ATAGS support not compiled in - hanging + ### ERROR ### Please RESET the board ### + + This, however, appears to be a usable workaround: + + U-Boot> fatload mmc 0 0x20008000 nuttx.bin + mci: setting clock 257812 Hz, block size 512 + mci: setting clock 257812 Hz, block size 512 + mci: setting clock 257812 Hz, block size 512 + gen_atmel_mci: CMDR 00001048 ( 8) ARGR 000001aa (SR: 0c100025) Command Time Out + mci: setting clock 257812 Hz, block size 512 + mci: setting clock 22000000 Hz, block size 512 + reading nuttx.bin + 108076 bytes read in 23 ms (4.5 MiB/s) + + U-Boot> go 0x20008040 + ## Starting application at 0x20008040 ... + + NuttShell (NSH) NuttX-7.2 + nsh> + + Loading through network + + On a development system, it is useful to get the kernel and root file + system through the network. U-Boot provides support for loading + binaries from a remote host on the network using the TFTP protocol. + + To manage to use TFTP with U-Boot, you will have to configure a TFTP + server on your host machine. Check your distribution manual or Internet + resources to configure a Linux or Windows TFTP server on your host: + + - U-Boot documentation on a Linux host: + http://www.denx.de/wiki/view/DULG/SystemSetup#Section_4.6. + + - Another TFTP configuration reference: + http://www.linuxhomenetworking.com/wiki/index.php/Quick_HOWTO_:_Ch16_:_Telnet%2C_TFTP%2C_and_xinetd#TFTP + + On the U-Boot side, you will have to setup the networking parameters: + + 1. Setup an Ethernet address (MAC address) + Check this U-Boot network BuildRootFAQ entry to choose a proper MAC + address: http://www.denx.de/wiki/DULG/EthernetDoesNotWork + + setenv ethaddr 00:e0:de:ad:be:ef + + 2. Setup IP parameters: + The board ip address + + setenv ipaddr 10.0.0.2 + + The server ip address where the TFTP server is running + + setenv serverip 10.0.0.1 + + 3. saving Environment to flash + + saveenv + + 4. If Ethernet Phy has not been detected during former bootup, reset + the board to reload U-Boot : the Ethernet address and Phy + initialization shall be ok, now + + 5. Download the NuttX uImage and the root file system to a ram location + using the U-Boot tftp command (Cf. U-Boot script capability chapter). + + 6. Launch NuttX issuing a bootm or boot command. + + If the board has both emac and gmac, you can use following to choose + which one to use: + + setenv ethact macb0,gmacb0 + setenv ethprime gmacb0 + + STATUS: + 2014-3-30: These instructions were adapted from the Linux4SAM website + but have not yet been used. + + Using JTAG + ---------- + + This description assumes that you have a JTAG debugger such as Segger + J-Link connected to the SAMA5D3-Xplained. + + 1. Start the GDB server + 2. Start GDB + 3. Use the 'target remote localhost:xxxx' command to attach to the GDG + server + 4. Do 'mon reset' then 'mon go' to start the internal boot loader (maybe + U-Boot). + 5. Let the boot loader run until it completes SDRAM initialization, then + do 'mon halt'. + 6. Now you have SDRAM initialized and you use 'load nuttx' to load the + ELF file into SDRAM. + 7. Use 'file nuttx' to load symbols + 8. Set the PC to the NuttX entry point 'mon pc 0x20008040' and start + nuttx using 'mon go'. + +Buttons and LEDs +================ + + Buttons + ------- + + The following push buttons switches are available: + + 1. One board reset button (BP2). When pressed and released, this push + button causes a power-on reset of the whole board. + + 2. One wakeup pushbutton that brings the processor out of Low-power mode + (BP1) + + 3. One user pushbutton (BP3) + + Only the user push button (BP3) is controllable by software: + + - PE29. Pressing the switch connect PE29 to ground. Therefore, PE29 + must be pulled high internally. When the button is pressed the SAMA5 + will sense "0" is on PE29. + + LEDs + ---- + There are two LEDs on the SAMA5D3 series-CM board that can be controlled + by software. A blue LED is controlled via PIO pins. A red LED normally + provides an indication that power is supplied to the board but can also + be controlled via software. + + PE23. This blue LED is pulled high and is illuminated by pulling PE23 + low. + + PE24. The red LED is also pulled high but is driven by a transistor so + that it is illuminated when power is applied even if PE24 is not + configured as an output. If PE24 is configured as an output, then the + LED is illuminated by a high output. + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + events as follows: + + SYMBOL Meaning LED state + Blue Red + ------------------- ----------------------- -------- -------- + LED_STARTED NuttX has been started OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF + LED_IRQSENABLED Interrupts enabled OFF OFF + LED_STACKCREATED Idle stack created ON OFF + LED_INIRQ In an interrupt No change + LED_SIGNAL In a signal handler No change + LED_ASSERTION An assertion failed No change + LED_PANIC The system has crashed OFF Blinking + LED_IDLE MCU is is sleep mode Not used + + Thus if the blue LED is statically on, NuttX has successfully booted and + is, apparently, running normally. If the red LED is flashing at + approximately 2Hz, then a fatal error has been detected and the system + has halted. + +Serial Console +============== + + UARTS/USARTS + ------------ + + CONN LABEL PIO UART/USART FUNCTION + ----- ------- ----- ----------- --------------- + J18 SCL0 PC30 UART0 UTXD0 + J18 SDA0 PC29 UART0 URXD0 + J15 1 PA31 UART1 UTXD1 + J15 0 PA30 UART1 URXD1 + J20 TXD3 14 PC26 UART1 URXD1 + J20 RXD3 15 PC27 UART1 UTXD1 + J20 TXD1 16 PD18 USART0 TXD0 + J20 RXD1 17 PD17 USART0 RXD0 + J20 TXD0 18 PB29 USART1 TXD1 + J20 RXD0 19 PB28 USART1 RXD1 + J20 SDA 20 PE19 USART3 TXD3 + J20 SCL 21 PE18 USART3 RXD3 + + DBGU Interface + -------------- + + The SAMA5D3 Xplained board has a dedicated serial port for debugging, + which is accessible through the 6-pin male header J23. + + PIN PIO Usage + --- ---- ----------------------------------------- + 1 PE13 (available) + 2 PB31 DBGU DTXD + 3 PB30 DBGU DRXD + 4 N/C (may be used by debug interface tool) + 5 PE14 (available) + 6 GND + + By default the DBUG port is used as the NuttX serial console in all + configurations (unless otherwise noted). The DBGU is available at + logic levels at pins RXD and TXD of the DEBUG connector (J23). GND + is available at J23 and +3.3V is available from J14 + +Networking +========== + + Networking support via the can be added to NSH by selecting the following + configuration options. The SAMA5D36 supports two different Ethernet MAC + peripherals: (1) The 10/100Base-T EMAC peripheral and (2) the + 10/100/1000Base-T GMAC peripheral. + + Selecting the EMAC peripheral + ----------------------------- + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_EMACA=y : Enable the EMAC A peripheral + + System Type -> EMAC device driver options + CONFIG_SAMA5_EMAC_NRXBUFFERS=16 : Set aside some RS and TX buffers + CONFIG_SAMA5_EMAC_NTXBUFFERS=4 + CONFIG_SAMA5_EMAC_PHYADDR=1 : KSZ9031 PHY is at address 1 + CONFIG_SAMA5_EMAC_AUTONEG=y : Use autonegotiation + CONFIG_SAMA5_EMAC_RMII=y : Either MII or RMII interface should work + CONFIG_SAMA5_EMAC_PHYSR=30 : Address of PHY status register on KSZ9031 + CONFIG_SAMA5_EMAC_PHYSR_ALTCONFIG=y : Needed for KSZ9031 + CONFIG_SAMA5_EMAC_PHYSR_ALTMODE=0x7 : " " " " " " + CONFIG_SAMA5_EMAC_PHYSR_10HD=0x1 : " " " " " " + CONFIG_SAMA5_EMAC_PHYSR_100HD=0x2 : " " " " " " + CONFIG_SAMA5_EMAC_PHYSR_10FD=0x5 : " " " " " " + CONFIG_SAMA5_EMAC_PHYSR_100FD=0x6 : " " " " " " + + PHY selection. Later in the configuration steps, you will need to select + the KSZ9031 PHY for EMAC (See below) + + Selecting the GMAC peripheral + ----------------------------- + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_GMAC=y : Enable the GMAC peripheral + + System Type -> GMAC device driver options + CONFIG_SAMA5_GMAC_NRXBUFFERS=16 : Set aside some RS and TX buffers + CONFIG_SAMA5_GMAC_NTXBUFFERS=4 + CONFIG_SAMA5_GMAC_PHYADDR=1 : KSZ8081 PHY is at address 1 + CONFIG_SAMA5_GMAC_AUTONEG=y : Use autonegotiation + + If both EMAC and GMAC are selected, you will also need: + + CONFIG_SAMA5_GMAC_ISETH0=y : GMAC is "eth0"; EMAC is "eth1" + + PHY selection. Later in the configuration steps, you will need to select + the KSZ9081 PHY for GMAC (See below) + + Common configuration settings + ----------------------------- + + Networking Support + CONFIG_NET=y : Enable Neworking + CONFIG_NET_SOCKOPTS=y : Enable socket operations + CONFIG_NET_ETH_MTU=562 : Maximum packet size (MTU) 1518 is more standard + CONFIG_NET_ETH_TCP_RECVWNDO=562 : Should be the same as CONFIG_NET_ETH_MTU + CONFIG_NET_TCP=y : Enable TCP/IP networking + CONFIG_NET_TCPBACKLOG=y : Support TCP/IP backlog + CONFIG_NET_TCP_READAHEAD_BUFSIZE=562 : Read-ahead buffer size + CONFIG_NET_UDP=y : Enable UDP networking + CONFIG_NET_ICMP=y : Enable ICMP networking + CONFIG_NET_ICMP_PING=y : Needed for NSH ping command + : Defaults should be okay for other options + Device drivers -> Network Device/PHY Support + CONFIG_NETDEVICES=y : Enabled PHY selection + CONFIG_ETH0_PHY_KSZ8081=y : Select the KSZ8081 PHY (for EMAC), OR + CONFIG_ETH0_PHY_KSZ90x1=y : Select the KSZ9031 PHY (for GMAC) + + Application Configuration -> Network Utilities + CONFIG_NETDB_DNSCLIENT=y : Enable host address resolution + CONFIG_NETUTILS_TELNETD=y : Enable the Telnet daemon + CONFIG_NETUTILS_TFTPC=y : Enable TFTP data file transfers for get and put commands + CONFIG_NETUTILS_NETLIB=y : Network library support is needed + CONFIG_NETUTILS_WEBCLIENT=y : Needed for wget support + : Defaults should be okay for other options + Application Configuration -> NSH Library + CONFIG_NSH_TELNET=y : Enable NSH session via Telnet + CONFIG_NSH_IPADDR=0x0a000002 : Select an IP address + CONFIG_NSH_DRIPADDR=0x0a000001 : IP address of gateway/host PC + CONFIG_NSH_NETMASK=0xffffff00 : Netmask + CONFIG_NSH_NOMAC=y : Need to make up a bogus MAC address + : Defaults should be okay for other options + + Using the network with NSH + -------------------------- + + So what can you do with this networking support? First you see that + NSH has several new network related commands: + + ifconfig, ifdown, ifup: Commands to help manage your network + get and put: TFTP file transfers + wget: HTML file transfers + ping: Check for access to peers on the network + Telnet console: You can access the NSH remotely via telnet. + + You can also enable other add on features like full FTP or a Web + Server or XML RPC and others. There are also other features that + you can enable like DHCP client (or server) or network name + resolution. + + By default, the IP address of the SAMA5D3-Xplained will be 10.0.0.2 and + it will assume that your host is the gateway and has the IP address + 10.0.0.1. + + nsh> ifconfig + eth0 HWaddr 00:e0:de:ad:be:ef at UP + IPaddr:10.0.0.2 DRaddr:10.0.0.1 Mask:255.255.255.0 + + You can use ping to test for connectivity to the host (Careful, + Window firewalls usually block ping-related ICMP traffic). On the + target side, you can: + + nsh> ping 10.0.0.1 + PING 10.0.0.1 56 bytes of data + 56 bytes from 10.0.0.1: icmp_seq=1 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=2 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=3 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=4 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=5 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=6 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=7 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=8 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=9 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=10 time=0 ms + 10 packets transmitted, 10 received, 0% packet loss, time 10100 ms + + NOTE: In this configuration is is normal to have packet loss > 0% + the first time you ping due to the default handling of the ARP + table. + + On the host side, you should also be able to ping the SAMA5D3-Xplained: + + $ ping 10.0.0.2 + + You can also log into the NSH from the host PC like this: + + $ telnet 10.0.0.2 + Trying 10.0.0.2... + Connected to 10.0.0.2. + Escape character is '^]'. + sh_telnetmain: Session [3] Started + + NuttShell (NSH) NuttX-6.31 + nsh> help + help usage: help [-v] [] + + [ echo ifconfig mkdir mw sleep + ? exec ifdown mkfatfs ping test + cat exit ifup mkfifo ps umount + cp free kill mkrd put usleep + cmp get losetup mh rm wget + dd help ls mount rmdir xd + df hexdump mb mv sh + + Builtin Apps: + nsh> + + NOTE: If you enable this feature, you experience a delay on booting. + That is because the start-up logic waits for the network connection + to be established before starting NuttX. In a real application, you + would probably want to do the network bringup on a separate thread + so that access to the NSH prompt is not delayed. + + This delay will be especially long if the board is not connected to + a network. On the order of a minute! You will probably think that + NuttX has crashed! And then, when it finally does come up, the + network will not be available. + + Network Initialization Thread + ----------------------------- + There is a configuration option enabled by CONFIG_NSH_NETINIT_THREAD + that will do the NSH network bring-up asynchronously in parallel on + a separate thread. This eliminates the (visible) networking delay + altogether. This networking initialization feature by itself has + some limitations: + + - If no network is connected, the network bring-up will fail and + the network initialization thread will simply exit. There are no + retries and no mechanism to know if the network initialization was + successful. + + - Furthermore, there is no support for detecting loss of the network + connection and recovery of networking when the connection is restored. + + Both of these shortcomings can be eliminated by enabling the network + monitor: + + Network Monitor + --------------- + By default the network initialization thread will bring-up the network + then exit, freeing all of the resources that it required. This is a + good behavior for systems with limited memory. + + If the CONFIG_NSH_NETINIT_MONITOR option is selected, however, then the + network initialization thread will persist forever; it will monitor the + network status. In the event that the network goes down (for example, if + a cable is removed), then the thread will monitor the link status and + attempt to bring the network back up. In this case the resources + required for network initialization are never released. + + Pre-requisites: + + - CONFIG_NSH_NETINIT_THREAD as described above. + + - CONFIG_NETDEV_PHY_IOCTL. Enable PHY IOCTL commands in the Ethernet + device driver. Special IOCTL commands must be provided by the Ethernet + driver to support certain PHY operations that will be needed for link + management. There operations are not complex and are implemented for + the Atmel SAMA5 family. + + - CONFIG_ARCH_PHY_INTERRUPT. This is not a user selectable option. + Rather, it is set when you select a board that supports PHY interrupts. + In most architectures, the PHY interrupt is not associated with the + Ethernet driver at all. Rather, the PHY interrupt is provided via some + board-specific GPIO and the board-specific logic must provide support + for that GPIO interrupt. To do this, the board logic must do two things: + (1) It must provide the function arch_phy_irq() as described and + prototyped in the nuttx/include/nuttx/arch.h, and (2) it must select + CONFIG_ARCH_PHY_INTERRUPT in the board configuration file to advertise + that it supports arch_phy_irq(). This logic can be found at + nuttx/configs/sama5d3-xplained/src/sam_ethernet.c. + + - And a few other things: UDP support is required (CONFIG_NET_UDP) and + signals must not be disabled (CONFIG_DISABLE_SIGNALS). + + Given those prerequisites, the newtork monitor can be selected with these additional settings. + + Networking Support -> Networking Device Support + CONFIG_NETDEV_PHY_IOCTL=y : Enable PHY ioctl support + + Application Configuration -> NSH Library -> Networking Configuration + CONFIG_NSH_NETINIT_THREAD : Enable the network initialization thread + CONFIG_NSH_NETINIT_MONITOR=y : Enable the network monitor + CONFIG_NSH_NETINIT_RETRYMSEC=2000 : Configure the network monitor as you like + CONFIG_NSH_NETINIT_SIGNO=18 + +AT25 Serial FLASH +================= + + Connections + ----------- + + The SAMA5D3-Xplained board supports an options Serial DataFlash connected + at MN8. The SPI connection is as follows: + + MN8 SAMA5 + ------------- ----------------------------------------------- + PIN FUNCTION PIO FUNCTION + --- --------- ----- ----------------------------------------- + 5 SI PD11 SPI0_MOSI + 2 SO PD10 SPI0_MIS0 + 6 SCK PD12 SPI0_SPCK + 1 /CS PD13 if jumper JP6 is closed. + + NOTE: The MN8 is not populated on my SAMAD3 Xplained board. So, as a + result, these instructions would only apply if you were to have an AT25 + Serial DataFlash installed in MN8. + + Configuration + ------------- + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_SPI0=y : Enable SPI0 + CONFIG_SAMA5_DMAC0=y : Enable DMA controller 0 + + System Type -> SPI device driver options + CONFIG_SAMA5_SPI_DMA=y : Use DMA for SPI transfers + CONFIG_SAMA5_SPI_DMATHRESHOLD=4 : Don't DMA for small transfers + + Device Drivers -> SPI Driver Support + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : Support the exchange method + + Device Drivers -> Memory Technology Device (MTD) Support + CONFIG_MTD=y : Enable MTD support + CONFIG_MTD_AT25=y : Enable the AT25 driver + CONFIG_AT25_SPIMODE=0 : Use SPI mode 0 + CONFIG_AT25_SPIFREQUENCY=10000000 : Use SPI frequency 10MHz + + The AT25 is capable of higher SPI rates than this. I have not experimented + a lot, but at 20MHz, the behavior is not the same with all CM modules. This + lower rate gives more predictable performance. + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + Board Selection + CONFIG_SAMA5D3XPLAINED_AT25_AUTOMOUNT=y : Mounts AT25 for NSH + CONFIG_SAMA5D3XPLAINED_AT25_FTL=y : Create block driver for FAT + + NOTE: that you must close JP6 in order to enable the AT25 FLASH chip select. + + You can then format the AT25 FLASH for a FAT file system and mount the + file system at /mnt/at25 using these NSH commands: + + nsh> mkfatfs /dev/mtdblock0 + nsh> mount -t vfat /dev/mtdblock0 /mnt/at25 + + Then you an use the FLASH as a normal FAT file system: + + nsh> echo "This is a test" >/mnt/at25/atest.txt + nsh> ls -l /mnt/at25 + /mnt/at25: + -rw-rw-rw- 16 atest.txt + nsh> cat /mnt/at25/atest.txt + This is a test + +HSMCI Card Slots +================ + + Physical Slots + -------------- + + The SAMA5D3-Xplained provides a two SD memory card slots: (1) a full size SD + card slot (J10), and (2) a microSD memory card slot (J11). + + The full size SD card slot connects via HSMCI0. The card detect discrete + is available on PD17 (pulled high). The write protect discrete is tied to + ground and not i savailable to software. The slot supports 8-bit wide + transfer mode, but the NuttX driver currently uses only the 4-bit wide + transfer mode + + PD17 MCI0_CD + PD1 MCI0_DA0 + PD2 MCI0_DA1 + PD3 MCI0_DA2 + PD4 MCI0_DA3 + PD5 MCI0_DA4 + PD6 MCI0_DA5 + PD7 MCI0_DA6 + PD8 MCI0_DA7 + PD9 MCI0_CK + PD0 MCI0_CDA + + PE2 PWR_MCI0 + + The microSD connects vi HSMCI1. The card detect discrete is available on + PD18 (pulled high): + + PD18 MCI1_CD + PB20 MCI1_DA0 + PB21 MCI1_DA1 + PB22 MCI1_DA2 + PB23 MCI1_DA3 + PB24 MCI1_CK + PB19 MCI1_CDA + + Configuration Settings + ---------------------- + + Enabling HSMCI support. The SAMA5D3-Xplained provides a two SD memory card + slots: (1) a full size SD card slot (J10), and (2) a microSD memory card + slot (J11). The full size SD card slot connects via HSMCI0; the microSD + connects via HSMCI1. Support for both SD slots can be enabled with the + following settings: + + System Type->ATSAMA5 Peripheral Support + CONFIG_SAMA5_HSMCI0=y : Enable HSMCI0 support + CONFIG_SAMA5_HSMCI1=y : Enable HSMCI1 support + CONFIG_SAMA5_DMAC0=y : DMAC0 is needed by HSMCI0 + CONFIG_SAMA5_DMAC1=y : DMAC1 is needed by HSMCI1 + + System Type + CONFIG_SAMA5_PIO_IRQ=y : PIO interrupts needed + CONFIG_SAMA5_PIOD_IRQ=y : Card detect pins are on PIOD + + Device Drivers -> MMC/SD Driver Support + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMSCD_NSLOTS=1 : One slot per driver instance + CONFIG_MMCSD_MULTIBLOCK_DISABLE=y : (REVISIT) + CONFIG_MMCSD_HAVECARDDETECT=y : Supports card-detect PIOs + CONFIG_MMCSD_MMCSUPPORT=n : Interferes with some SD cards + CONFIG_MMCSD_SPI=n : No SPI-based MMC/SD support + CONFIG_MMCSD_SDIO=y : SDIO-based MMC/SD support + CONFIG_SDIO_DMA=y : Use SDIO DMA + CONFIG_SDIO_BLOCKSETUP=y : Needs to know block sizes + + Library Routines + CONFIG_SCHED_WORKQUEUE=y : Driver needs work queue support + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + Using the SD card + ----------------- + + 1) After booting, the HSCMI devices will appear as /dev/mmcsd0 + and /dev/mmcsd1. + + 2) If you try mounting an SD card with nothing in the slot, the + mount will fail: + + nsh> mount -t vfat /dev/mmcsd1 /mnt/sd1 + nsh: mount: mount failed: 19 + + NSH can be configured to provide errors as strings instead of + numbers. But in this case, only the error number is reported. The + error numbers can be found in nuttx/include/errno.h: + + #define ENODEV 19 + #define ENODEV_STR "No such device" + + So the mount command is saying that there is no device or, more + correctly, that there is no card in the SD card slot. + + 3) Inserted the SD card. Then the mount should succeed. + + nsh> mount -t vfat /dev/mmcsd1 /mnt/sd1 + nsh> ls /mnt/sd1 + /mnt/sd1: + atest.txt + nsh> cat /mnt/sd1/atest.txt + This is a test + + NOTE: See the next section entitled "Auto-Mounter" for another way + to mount your SD card. + + 4) Before removing the card, you must umount the file system. This is + equivalent to "ejecting" or "safely removing" the card on Windows: It + flushes any cached data to the card and makes the SD card unavailable + to the applications. + + nsh> umount -t /mnt/sd1 + + It is now safe to remove the card. NuttX provides into callbacks + that can be used by an application to automatically unmount the + volume when it is removed. But those callbacks are not used in + these configurations. + +Auto-Mounter +============ + + NuttX implements an auto-mounter than can make working with SD cards + easier. With the auto-mounter, the file system will be automatically + mounted when the SD card is inserted into the HSMCI slot and automatically + unmounted when the SD card is removed. + + The auto-mounter is enable with: + + CONFIG_FS_AUTOMOUNTER=y + + However, to use the automounter you will to provide some additional + board-level support. See configs/sama5d4-ek for and example of how + you might do this. + + WARNING: SD cards should never be removed without first unmounting + them. This is to avoid data and possible corruption of the file + system. Certainly this is the case if you are writing to the SD card + at the time of the removal. If you use the SD card for read-only access, + however, then I cannot think of any reason why removing the card without + mounting would be harmful. + +USB Ports +========= + + The SAMA5D3-Xplained features three USB communication ports: + + * Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed with + USB Device High Speed Micro AB connector, J6 + + * Port B Host High Speed (EHCI) and Full Speed (OHCI) standard type A + connector, J7 upper port + + * Port C Host Full Speed (OHCI) only standard type A connector, J7 + lower port + + The two USB host ports (only) are equipped with 500-mA high-side power + switch for self-powered and bus-powered applications. + + The USB device port A (J6) features a VBUS insert detection function. + + Port A + ------ + + PIO Signal Name Function + ---- ----------- ------------------------------------------------------- + PE9 VBUS_SENSE VBus detection + + Note: No VBus power switch enable on port A. I think that this limits + this port to a device port or as a host port for self-powered devices + only. + + Port B + ------ + + PIO Signal Name Function + ---- ----------- ------------------------------------------------------- + PE4 EN5V_USBB VBus power enable (via MN3 power switch). To the A1 + pin of J7 Dual USB A connector + + Port C + ------ + + PIO Signal Name Function + ---- ----------- ------------------------------------------------------- + PE3 EN5V_USBC VBus power enable (via MN3 power switch). To the B1 + pin of J7 Dual USB A connector + + Both Ports B and C + ------------------ + + PIO Signal Name Function + ---- ----------- ------------------------------------------------------- + PE5 OVCUR_USB Combined over-current indication from port A and B + +USB High-Speed Device +===================== + + Basic USB High-Speed Device Configuration + ----------------------------------------- + + Support the USB high-speed device (UDPHS) driver can be enabled with these + NuttX configuration settings. + + Device Drivers -> USB Device Driver Support + CONFIG_USBDEV=y : Enable USB device support + CONFIG_USBDEV_DUALSPEED=y : Device support High and Full Speed + CONFIG_USBDEV_DMA=y : Device uses DMA + + System Type -> ATSAMA5 Peripheral Support + CONFIG_SAMA5_UDPHS=y : Enable UDPHS High Speed USB device + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + Mass Storage Class + ------------------ + + The Mass Storage Class (MSC) class driver is selected for use with + UDPHS: + + Device Drivers -> USB Device Driver Support + CONFIG_USBMSC=y : Enable the USB MSC class driver + CONFIG_USBMSC_EPBULKOUT=1 : Use EP1 for the BULK OUT endpoint + CONFIG_USBMSC_EPBULKIN=2 : Use EP2 for the BULK IN endpoint + + The following setting enables an add-on that can can be used to control + the USB MSC device. It will add two new NSH commands: + + a. msconn will connect the USB serial device and export the AT25 + to the host, and + b. msdis which will disconnect the USB serial device. + + Application Configuration -> System Add-Ons: + CONFIG_SYSTEM_USBMSC=y : Enable the USBMSC add-on + CONFIG_SYSTEM_USBMSC_NLUNS=1 : One LUN + CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 : Minor device zero + CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mtdblock0" + : Use a single, LUN: The AT25 + : block driver. + + NOTES: + + a. To prevent file system corruption, make sure that the AT25 is un- + mounted *before* exporting the mass storage device to the host: + + nsh> umount /mnt/at25 + nsh> mscon + + The AT25 can be re-mounted after the mass storage class is disconnected: + + nsh> msdis + nsh> mount -t vfat /dev/mtdblock0 /mnt/at25 + + b. If you change the value CONFIG_SYSTEM_USBMSC_DEVPATH1, then you + can export other file systems: + + "/dev/mmcsd1" will export the HSMCI1 microSD + "/dev/mmcsd0" will export the HSMCI0 full-size SD slot + "/dev/ram0" could even be used to export a RAM disk. But you would + first have to use mkrd to create the RAM disk and mkfatfs to put + a FAT file system on it. + + CDC/ACM Serial Device Class + --------------------------- + + This will select the CDC/ACM serial device. Defaults for the other + options should be okay. + + Device Drivers -> USB Device Driver Support + CONFIG_CDCACM=y : Enable the CDC/ACM device + CONFIG_CDCACM_BULKIN_REQLEN=768 : Default too small for high-speed + + The following setting enables an example that can can be used to control + the CDC/ACM device. It will add two new NSH commands: + + a. sercon will connect the USB serial device (creating /dev/ttyACM0), and + b. serdis which will disconnect the USB serial device (destroying + /dev/ttyACM0). + + Application Configuration -> Examples: + CONFIG_SYSTEM_CDCACM=y : Enable an CDC/ACM example + + Debugging USB Device + -------------------- + + There is normal console debug output available that can be enabled with + CONFIG_DEBUG + CONFIG_DEBUG_USB. However, USB device operation is very + time critical and enabling this debug output WILL interfere with the + operation of the UDPHS. USB device tracing is a less invasive way to get + debug information: If tracing is enabled, the USB device will save + encoded trace output in in-memory buffer; if the USB monitor is also + enabled, that trace buffer will be periodically emptied and dumped to the + system logging device (the serial console in this configuration): + + Device Drivers -> "USB Device Driver Support: + CONFIG_USBDEV_TRACE=y : Enable USB trace feature + CONFIG_USBDEV_TRACE_NRECORDS=256 : Buffer 256 records in memory + CONFIG_USBDEV_TRACE_STRINGS=y : (optional) + + Application Configuration -> NSH LIbrary: + CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH + CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor + + Application Configuration -> System NSH Add-Ons: + CONFIG_SYSTEM_USBMONITOR=y : Enable the USB monitor daemon + CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size + CONFIG_SYSTEM_USBMONITOR_PRIORITY=50 : USB monitor daemon priority + CONFIG_SYSTEM_USBMONITOR_INTERVAL=1 : Dump trace data every second + CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y : Enable TRACE output + CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y + CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y + CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y + CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y + + NOTE: If USB debug output is also enabled, both outputs will appear on the + serial console. However, the debug output will be asynchronous with the + trace output and, hence, difficult to interpret. + +USB High-Speed Host +=================== + + OHCI Only + --------- + + Support the USB low/full-speed OHCI host driver can be enabled by changing + the NuttX configuration file as follows: + + System Type -> ATSAMA5 Peripheral Support + CONFIG_SAMA5_UHPHS=y : USB Host High Speed + + System Type -> USB High Speed Host driver options + CONFIG_SAMA5_OHCI=y : Low/full-speed OHCI support + : Defaults for values probably OK + Device Drivers + CONFIG_USBHOST=y : Enable USB host support + + Device Drivers -> USB Host Driver Support + CONFIG_USBHOST_ISOC_DISABLE=y : Isochronous endpoints not used + CONFIG_USBHOST_MSC=y : Enable the mass storage class driver + CONFIG_USBHOST_HIDKBD=y : Enable the HID keyboard class driver + + RTOS Features -> Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : High priority worker thread support is required + CONFIG_SCHED_HPWORK=y : + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization +file1: CONFIG_USBHOST_ISOC_DISABLE=y + + NOTE: When OHCI is selected, the SAMA5 will operate at 384MHz instead of + 396MHz. This is so that the PLL generates a frequency which is a multiple + of the 48MHz needed for OHCI. The delay loop calibration values that are + used will be off slightly because of this. + + EHCI + ---- + + Support the USB high-speed EHCI host driver can be enabled by changing the + NuttX configuration file as follows. If EHCI is enabled by itself, then + only high-speed devices can be supported. If OHCI is also enabled, then + all low-, full-, and high speed devices will work. + + System Type -> ATSAMA5 Peripheral Support + CONFIG_SAMA5_UHPHS=y : USB Host High Speed + + System Type -> USB High Speed Host driver options + CONFIG_SAMA5_EHCI=y : High-speed EHCI support + CONFIG_SAMA5_OHCI=y : Low/full-speed OHCI support + : Defaults for values probably OK for both + Device Drivers + CONFIG_USBHOST=y : Enable USB host support + CONFIG_USBHOST_INT_DISABLE=y : Interrupt endpoints not needed + CONFIG_USBHOST_ISOC_DISABLE=y : Isochronous endpoints not needed + + Device Drivers -> USB Host Driver Support + CONFIG_USBHOST_ISOC_DISABLE=y : Isochronous endpoints not used + CONFIG_USBHOST_MSC=y : Enable the mass storage class driver + CONFIG_USBHOST_HIDKBD=y : Enable the HID keyboard class driver + + RTOS Features -> Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : High priority worker thread support is required + CONFIG_SCHED_HPWORK=y : + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + USB Hub Support + ---------------- + + USB hub support can be included by adding the following changes to the configuration (in addition to those listed above): + + Drivers -> USB Host Driver Support + CONFIG_USBHOST_HUB=y : Enable the hub class + CONFIG_USBHOST_ASYNCH=y : Asynchonous I/O supported needed for hubs + + System Type -> USB High Speed Host driver options + CONFIG_SAMA5_OHCI_NEDS=12 : You will probably want more pipes + CONFIG_SAMA5_OHCI_NTDS=18 + CONFIG_SAMA5_OHCI_TDBUFFERS=12 + CONFIG_SAMA5_OHCI_TDBUFSIZE=128 + + Board Selection -> + CONFIG_SAMA5D3XPLAINED_USBHOST_STACKSIZE=2048 (bigger than it needs to be) + + RTOS Features -> Work Queue Support + CONFIG_SCHED_LPWORK=y : Low priority queue support is needed + CONFIG_SCHED_LPNTHREADS=1 + CONFIG_SCHED_LPWORKSTACKSIZE=1024 + + NOTES: + + 1. It is necessary to perform work on the low-priority work queue + (vs. the high priority work queue) because deferred hub-related + work requires some delays and waiting that is not appropriate on + the high priority work queue. + + 2. Stack usage make increase when USB hub support is enabled because + the nesting depth of certain USB host class logic can increase. + + STATUS: + 2015-05-01: + This USB host function does not work on the SAMA5D3-Xplained board. + Those same drivers work on the other SAMA5Dx boards and so I believe + that there is some issue with either clocking to USB or to powering + of the USB host ports. + + Mass Storage Device Usage + ------------------------- + + Example Usage: + + NuttShell (NSH) NuttX-6.29 + nsh> ls /dev + /dev: + console + mtdblock0 + null + ttyS0 + + Here a USB FLASH stick is inserted. Nothing visible happens in the + shell. But a new device will appear: + + nsh> ls /dev + /dev: + console + mtdblock0 + null + sda + ttyS0 + nsh> mount -t vfat /dev/sda /mnt/sda + nsh> ls -l /mnt/sda + /mnt/sda: + -rw-rw-rw- 8788 viminfo + drw-rw-rw- 0 .Trash-1000/ + -rw-rw-rw- 3378 zmodem.patch + -rw-rw-rw- 1503 sz-1.log + -rw-rw-rw- 613 .bashrc + + HID Keyboard Usage + ------------------ + + If a (supported) USB keyboard is connected, a /dev/kbda device will appear: + + nsh> ls /dev + /dev: + console + kbda + mtdblock0 + null + ttyS0 + + /dev/kbda is a read-only serial device. Reading from /dev/kbda will get + keyboard input as ASCII data (other encodings are possible): + + nsh> cat /dev/kbda + + Debugging USB Host + ------------------ + + There is normal console debug output available that can be enabled with + CONFIG_DEBUG + CONFIG_DEBUG_USB. However, USB host operation is very time + critical and enabling this debug output might interfere with the operation + of the UDPHS. USB host tracing is a less invasive way to get debug + information: If tracing is enabled, the USB host will save encoded trace + output in in-memory buffer; if the USB monitor is also enabled, that trace + buffer will be periodically emptied and dumped to the system logging device + (the serial console in this configuration): + + Device Drivers -> "USB Host Driver Support: + CONFIG_USBHOST_TRACE=y : Enable USB host trace feature + CONFIG_USBHOST_TRACE_NRECORDS=256 : Buffer 256 records in memory + CONFIG_USBHOST_TRACE_VERBOSE=y : Buffer everything + + Application Configuration -> NSH LIbrary: + CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH + CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor + + Application Configuration -> System NSH Add-Ons: + CONFIG_SYSTEM_USBMONITOR=y : Enable the USB monitor daemon + CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size + CONFIG_SYSTEM_USBMONITOR_PRIORITY=50 : USB monitor daemon priority + CONFIG_SYSTEM_USBMONITOR_INTERVAL=1 : Dump trace data every second + + NOTE: If USB debug output is also enabled, both outpus will appear on the + serial console. However, the debug output will be asynchronous with the + trace output and, hence, difficult to interpret. + +SDRAM Support +============= + + SRAM Heap Configuration + ----------------------- + + In these configurations, .data and .bss are retained in ISRAM. SDRAM can + be initialized and included in the heap. Relevant configuration settings: + + System Type->ATSAMA5 Peripheral Support + CONFIG_SAMA5_MPDDRC=y : Enable the DDR controller + + System Type->External Memory Configuration + CONFIG_SAMA5_DDRCS=y : Tell the system that DRAM is at the DDR CS + CONFIG_SAMA5_DDRCS_SIZE=268435456 : 2Gb DRAM -> 256MB + CONFIG_SAMA5_DDRCS_LPDDR2=y : Its DDR2 + CONFIG_SAMA5D3XPLAINED_MT47H128M16RT=y : This is the type of DDR2 + + System Type->Heap Configuration + CONFIG_SAMA5_DDRCS_HEAP=y : Add the SDRAM to the heap + CONFIG_SAMA5_DDRCS_HEAP_OFFSET=0 + CONFIG_SAMA5_DDRCS_HEAP_SIZE=268435456 + + Memory Management + CONFIG_MM_REGIONS=2 : Two heap memory regions: ISRAM and SDRAM + + RAM Test + -------- + + Another thing you could do is to enable the RAM test built-in application. + You can enable the NuttX RAM test that may be used to verify the external + SDRAM. To do this, keep the SDRAM out of the heap so that it can be tested + without crashing programs using the memory: + + System Type->Heap Configuration + CONFIG_SAMA5_DDRCS_HEAP=n : Don't add the SDRAM to the heap + + Memory Management + CONFIG_MM_REGIONS=1 : One memory regions: ISRAM + + Then enable the RAM test built-in application: + + Application Configuration->System NSH Add-Ons->Ram Test + CONFIG_SYSTEM_RAMTEST=y + + In this configuration, the SDRAM is not added to heap and so is not + accessable to the applications. So the RAM test can be freely executed + against the SRAM memory beginning at address 0x2000:0000 (DDR CS): + + nsh> ramtest -h + Usage: [-w|h|b] + + Where: + starting address of the test. + number of memory locations (in bytes). + -w Sets the width of a memory location to 32-bits. + -h Sets the width of a memory location to 16-bits (default). + -b Sets the width of a memory location to 8-bits. + + To test the entire external 256MB SRAM: + + nsh> ramtest -w 20000000 268435456 + RAMTest: Marching ones: 20000000 268435456 + RAMTest: Marching zeroes: 20000000 268435456 + RAMTest: Pattern test: 20000000 268435456 55555555 aaaaaaaa + RAMTest: Pattern test: 20000000 268435456 66666666 99999999 + RAMTest: Pattern test: 20000000 268435456 33333333 cccccccc + RAMTest: Address-in-address test: 20000000 268435456 + + SDRAM Data Configuration + ------------------------ + + In these configurations, .data and .bss are retained in ISRAM by default. + .data and .bss can also be retained in SDRAM using these slightly + different configuration settings. In this configuration, ISRAM is + used only for the Cortex-A5 page table for the IDLE thread stack. + + System Type->ATSAMA5 Peripheral Support + CONFIG_SAMA5_MPDDRC=y : Enable the DDR controller + + System Type->External Memory Configuration + CONFIG_SAMA5_DDRCS=y : Tell the system that DRAM is at the DDR CS + CONFIG_SAMA5_DDRCS_SIZE=268435456 : 2Gb DRAM -> 256GB + CONFIG_SAMA5_DDRCS_LPDDR2=y : Its DDR2 + CONFIG_SAMA5D3XPLAINED_MT47H128M16RT=y : This is the type of DDR2 + + System Type->Heap Configuration + CONFIG_SAMA5_ISRAM_HEAP=n : These do not apply in this case + CONFIG_SAMA5_DDRCS_HEAP=n + + System Type->Boot Memory Configuration + CONFIG_RAM_START=0x20000000 : Physical address of SDRAM + CONFIG_RAM_VSTART=0x20000000 : Virtual address of SDRAM + CONFIG_RAM_SIZE=268435456 : Size of SDRAM + CONFIG_BOOT_SDRAM_DATA=y : Data is in SDRAM + + Care must be used applied these RAM locations; graphics + configurations may use SDRAM in an incompatible way to set aside + LCD framebuffers. + + Memory Management + CONFIG_MM_REGIONS=1 : One heap memory region: ISDRAM + +NAND Support +============ + + NAND support is only partial in that there is no file system that works + with it properly. Lower-level NAND support has been developed and + verified, but there is no way to use it in the current NuttX architecture + other than through the raw MTD interface. + + NAND should still be considered a work in progress. You will not want to + use NAND unless you are interested in investing a little effort, + particularly in infrastructure. See the "STATUS SUMMARY" section below. + + NAND Support + ------------ + + NAND Support can be added to the NSH configuration by modifying the + NuttX configuration file as follows: + + Build Setup + CONFIG_EXPERIMENTAL=y : NXFFS implementation is incomplete and + : not yet fully functional. + + System Type -> SAMA5 Peripheral support + CONFIG_SAMA5_HSMC=y : Make sure that the SMC is enabled + + Drivers -> Memory Technology Device (MTD) Support + CONFIG_MTD=y : Enable MTD support + CONFIG_MTD_NAND=y : Enable NAND support + CONFIG_MTD_NAND_BLOCKCHECK=n : Interferes with NXFFS bad block checking + CONFIG_MTD_NAND_SWECC=y : Use S/W ECC calculation + + Defaults for all other NAND settings should be okay + + System Type -> External Memory Configuration + CONFIG_SAMA5_EBICS3=y : Enable External CS3 memory + CONFIG_SAMA5_EBICS3_NAND=y : Select NAND memory type + CONFIG_SAMA5_EBICS3_SIZE=8388608 : Use this size + CONFIG_SAMA5_EBICS3_SWECC=y : Use S/W ECC calculation + + Defaults for ROM page table addresses should be okay + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : Use architecture-specific initialization + + NOTES: + + 1. WARNING: This will wipe out everything that you may have on the NAND + FLASH! I have found that using the JTAG with no valid image on NAND + or Serial FLASH is a problem: In that case, the code always ends up + in the SAM-BA bootloader. + + My understanding is that you can enable JTAG in this case by simply + entering any data on the DBG serial port. I have not tried this. + Instead, I just changed to boot from Serial Flash: + + 2. Unfortunately, there are no appropriate NAND file system in NuttX as + of this writing. The following sections discussion issues/problems + with using NXFFS and FAT. + + PMECC + ----- + + Hardware ECC calculation using the SAMA5D3's PMECC can be enable as + follows: + + Drivers -> Memory Technology Device (MTD) Support + CONFIG_MTD_NAND_SWECC=y : Don't use S/W ECC calculation + CONFIG_MTD_NAND_HWECC=y : Use H/W ECC instead + + System Type -> External Memory Configuration + CONFIG_SAMA5_EBICS3_SWECC=n : Don't use S/W ECC calculation + CONFIG_SAMA5_HAVE_PMECC=n : Use H/W ECC instead + + Other PMECC-related default settings should be okay. + + STATUS: As of the writing, NAND transfers using PMECC appear to + work correctly. However, the PMECC based systems do not work as + as well with FAT or NXFFS. My belief that that the FAT/NXFFS layers + are inappropriate for NAND and, as a result, happen not to work with + the PMECC ECC calculation. See also the "STATUS SUMMARY" section below. + + DMA Support + ----------- + + DMA support can be enabled as follows: + + System Type -> SAMA5 Peripheral support + CONFIG_SAMA5_DMAC0=y : Use DMAC0 for memory-to-memory DMA + + System Type -> External Memory Configuration + CONFIG_SAMA5_NAND_DMA=y : Use DMAC0 for NAND data transfers + + STATUS: DMA appears to be functional, but probably has not been + exercised enough to claim that with any certainty. See also the "STATUS + SUMMARY" section below. + + NXFFS + ----- + + The NuttX FLASH File System (NXFFS) works well with NOR-like FLASH + but does not work well with NAND (See comments below under STATUS) + + File Systems: + CONFIG_FS_NXFFS=y : Enable the NXFFS file system + + Defaults for all other NXFFS settings should be okay. + + NOTE: NXFFS will require some significant buffering because of + the large size of the NAND flash blocks. You will also need + to enable SDRAM as described above. + + Board Selection + CONFIG_SAMA5D3XPLAINED_NAND_BLOCKMOUNT=y : Enable FS support on NAND + CONFIG_SAMA5D3XPLAINED_NAND_NXFFS=y : Use the NXFFS file system + + Other file systems are not recommended because only NXFFS can handle + bad blocks and only NXFFS performs wear-levelling. + + FAT + --- + + Another option is FAT. FAT, however, is not appropriate for use with + NAND: FAT will not handle bad blocks, does not perform any wear + levelling, and may not conform to writing ordering requirements of NAND. + Also, there appear to be issues with FAT when PMECC is enabled (see + "STATUS SUMMARY" below). + + File Systems: + CONFIG_FS_FAT=y : Enable the FAT FS + CONFIG_FAT_LCNAMES=y : With lower case name support + CONFIG_FAT_LFN=y : And (patented) FAT long file name support + CONFIG_FS_NXFFS=n : Don't need NXFFS + + Defaults for all other NXFFS settings should be okay. + + Board Selection + CONFIG_SAMA5D3XPLAINED_NAND_BLOCKMOUNT=y : Enable FS support on NAND + CONFIG_SAMA5D3XPLAINED_NAND_FTL=y : Use an flash translation layer + + NOTE: FTL will require some significant buffering because of + the large size of the NAND flash blocks. You will also need + to enable SDRAM as described above. + + SMART FS + -------- + + Another option is Smart FS. Smart FS is another small file system + designed to work with FLASH. Properties: It does support some wear- + leveling like NXFFS, but like FAT, cannot handle bad blocks and like + NXFFS, it will try to re-write erased bits. + + Using NAND with NXFFS + --------------------- + + With the options CONFIG_SAMA5D3XPLAINED_NAND_BLOCKMOUNT=y and + CONFIG_SAMA5D3XPLAINED_NAND_NXFFS=y, the NAND FLASH will be mounted in the NSH + start-up logic before the NSH prompt appears. There is no feedback as + to whether or not the mount was successful. You can, however, see the + mounted file systems using the nsh 'mount' command: + + nsh> mount + /mnt/nand type nxffs + + Then NAND can be used like any other file system: + + nsh> echo "This is a test" >/mnt/nand/atest.txt + nsh> ls -l /mnt/nand + /mnt/nand: + ---x--x--x 16 atest.txt + nsh> cat /mnt/nand/atest.txt + This is a test + + The NAND volume can be un-mounted with this comment: + + nsh> umount /mnt/nand + nsh> mount + + And re-mounted with this command: + + nsh> mount -t nxffs /mnt/mystuff + nsh> mount + /mnt/mystuff type nxffs + + NOTES: + 1. NXFFS can be very slow. The first time that you start the system, + be prepared for a wait; NXFFS will need to format the NAND volume. + I have lots of debug on so I don't yet know what the optimized wait + will be. But with debug ON, software ECC, and no DMA the wait is + in many tens of minutes (and substantially longer if many debug + options are enabled. + + [I don't yet have data for the more optimal cases. It will be + significantly less, but still not fast.] + + 2. On subsequent boots, after the NXFFS file system has been created + the delay will be less. When the new file system is empty, it will + be very fast. But the NAND-related boot time can become substantial + when there has been a lot of usage of the NAND. This is because + NXFFS needs to scan the NAND device and build the in-memory dataset + needed to access NAND and there is more that must be scanned after + the device has been used. You may want to create a separate thread at + boot time to bring up NXFFS so that you don't delay the boot-to-prompt + time excessively in these longer delay cases. + + 3. There is another NXFFS related performance issue: When the FLASH + is fully used, NXFFS will restructure the entire FLASH, the delay + to restructure the entire FLASH will probably be even larger. This + solution in this case is to implement an NXFSS clean-up daemon that + does the job a little-at-a-time so that there is no massive clean-up + when the FLASH becomes full. + + 4. Bad NXFFS behavior with NAND: If you restart NuttX, the files that + you wrote to NAND will be gone. Why? Because the multiple writes + have corrupted the NAND ECC bits. See STATUS below. NXFFS would + require a major overhaul to be usable with NAND. + + Using NAND with FAT + ------------------- + + If configured for FAT, the system will create block driver at + /dev/mtdblock0: + + NuttShell (NSH) + nsh> ls /dev + /dev: + console + mtdblock0 + null + ttyS0 + + You will not that the system comes up immediately because there is not + need to scan the volume in this case.. + + The NSH 'mkfatfs' command can be used to format a FAT file system on + NAND. + + nsh> mkfatfs /dev/mtdblock0 + + This step, on the other hand, requires quite a bit of time. + + And the FAT file system can be mounted like: + + nsh> mount -t vfat /dev/mtdblock0 /mnt/nand + nsh> ls /mnt/nand + /mnt/nand: + + nsh> echo "This is a test" > /mnt/nand/atest.txt + + NOTE: This will take a long time because it will require reading, + modifying, and re-writing the 128KB erase page! + + nsh> ls -l /mnt/nand + /mnt/nand: + -rw-rw-rw- 16 atest.txt + + nsh> cat /mnt/fat/atest.txt + This is a test + + NOTES: + + 1. Unlike NXFFS, FAT can work with NAND (at least with PMECC disabled). + But there are some significant issues. + + 2. First, each NAND write access will cause a 256KB data transfer: It + will read the entire 128KB erase block, modify it and write it back + to memory. There is some caching logic so that this cached erase + block can be re-used if possible and writes will be deferred as long + as possible. + + 3. If you hit a bad block, then FAT is finished. There is no mechanism + in place in FAT not to mark and skip over bad blocks. + + What is Needed + -------------- + + What is needed to work with FAT properly would be another MTD layer + between the FTL layer and the NAND FLASH layer. That layer would + perform bad block detection and sparing so that FAT works transparently + on top of the NAND. + + Another, less general, option would be support bad blocks within FAT. + + STATUS SUMMARY + -------------- + + 1. PMECC appears to be working in that I can write a NAND block with its + ECC and read the block back and verify that that is are no bit + failures. However, when attempting to work with FAT, it does not + work correctly: The MBR is written and read back correctly, but gets + corrupted later for unknown reasons. + + 2. DMA works (at least with software ECC), but I have seen occasional + failures. I recommend enabling DMA with caution. + + In NuttX, DMA will also cost two context switches (and, hence, four + register state transfers). With smaller NAND page sizes (say 2KiB and + below), I would expect little or no performance improvement with DMA + for this reason. + + 3. NXFFS does not work with NAND. NAND differs from other other FLASH + types several ways. For one thing, NAND requires error correction + (ECC) bytes that must be set in order to work around bit failures. + This affects NXFFS in two ways: + + a. First, write failures are not fatal. Rather, they should be tried by + bad blocks and simply ignored. This is because unrecoverable bit + failures will cause read failures when reading from NAND. Setting + the CONFIG_EXPERIMENTAL+CONFIG_NXFFS_NANDs option will enable this + behavior. + + b. Secondly, NXFFS will write a block many times. It tries to keep + bits in the erased state and assumes that it can overwrite those bits + to change them from the erased to the non-erased state. This works + will with NOR-like FLASH. NAND behaves this way too. But the + problem with NAND is that the ECC bits cannot be re-written in this + way. So once a block has been written, it cannot be modified. This + behavior has NOT been fixed in NXFFS. Currently, NXFFS will attempt + to re-write the ECC bits causing the ECC to become corrupted because + the ECC bits cannot be overwritten without erasing the entire block. + + This may prohibit NXFFS from ever being used with NAND. + + 4. As mentioned above, FAT does work but (1) has some performance issues on + writes and (2) cannot handle bad blocks. + + 5. There was a major reorganization of the SAMA5 code after NuttX-7.11 to + add support for the SAMA5D2. Only the SAMA5D4-EK nsh configuration was + re-verified on 2015-09-29. But as of this writing, none of the SAMA5D3- + Xplained configurations a been re-verified. Some regression testing is + needed. + +I2C Tool +======== + + I2C Tool. NuttX supports an I2C tool at apps/system/i2c that can be used + to peek and poke I2C devices. That tool can be enabled by setting the + following: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_TWI0=y : Enable TWI0 + CONFIG_SAMA5_TWI1=y : Enable TWI1 + CONFIG_SAMA5_TWI2=y : Enable TWI2 + + System Type -> TWI device driver options + SAMA5_TWI0_FREQUENCY=100000 : Select a TWI0 frequency + SAMA5_TWI1_FREQUENCY=100000 : Select a TWI1 frequency + SAMA5_TWI2_FREQUENCY=100000 : Select a TWI2 frequency + + Device Drivers -> I2C Driver Support + CONFIG_I2C=y : Enable I2C support + + Application Configuration -> NSH Library + CONFIG_SYSTEM_I2CTOOL=y : Enable the I2C tool + CONFIG_I2CTOOL_MINBUS=0 : TWI0 has the minimum bus number 0 + CONFIG_I2CTOOL_MAXBUS=2 : TWI2 has the maximum bus number 2 + CONFIG_I2CTOOL_DEFFREQ=100000 : Pick a consistent frequency + + The I2C tool has extensive help that can be accessed as follows: + + nsh> i2c help + Usage: i2c [arguments] + Where is one of: + + Show help : ? + List busses : bus + List devices : dev [OPTIONS] + Read register : get [OPTIONS] [] + Show help : help + Write register: set [OPTIONS] [] + Verify access : verf [OPTIONS] [] [] + + Where common "sticky" OPTIONS include: + [-a addr] is the I2C device address (hex). Default: 03 Current: 03 + [-b bus] is the I2C bus number (decimal). Default: 0 Current: 0 + [-r regaddr] is the I2C device register address (hex). Default: 00 Current: 00 + [-w width] is the data width (8 or 16 decimal). Default: 8 Current: 8 + [-s|n], send/don't send start between command and data. Default: -n Current: -n + [-i|j], Auto increment|don't increment regaddr on repititions. Default: NO Current: NO + [-f freq] I2C frequency. Default: 100000 Current: 100000 + + NOTES: + o Arguments are "sticky". For example, once the I2C address is + specified, that address will be re-used until it is changed. + + WARNING: + o The I2C dev command may have bad side effects on your I2C devices. + Use only at your own risk. + + As an example, the I2C dev comman can be used to list all devices + responding on TWI0 (the default) like this: + + nsh> i2c dev 0x03 0x77 + 0 1 2 3 4 5 6 7 8 9 a b c d e f + 00: -- -- -- -- -- -- -- -- -- -- -- -- -- + 10: -- -- -- -- -- -- -- -- -- -- 1a -- -- -- -- -- + 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 30: -- -- -- -- -- -- -- -- -- 39 -- -- -- 3d -- -- + 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 60: 60 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 70: -- -- -- -- -- -- -- -- + nsh> + + Address 0x1a is the WM8904. Address 0x39 is the SIL9022A. I am not sure + what is at address 0x3d and 0x60 + +CAN Usage +========= + I planned to verify CAN using the IXXAT USB-to-CAN Compact. This section + provides miscellaneous CAN-related notes, mostly to myself but perhaps of + interest to others. + + [Unfortunately, as of this writing, I still do not have a proper CAN test + bed to verify the CAN driver.] + + CAN Configuration + ----------------- + + The following steps illustrate how to enable CAN0 and/or CAN1 in the NuttX + configuration: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_CAN0=y : Select CAN0 and/or CAN1 + CONFIG_SAMA5_CAN1=y + + Device Drivers -> CAN Driver Support + CONFIG_CAN=y : (Automatically selected) + CONFIG_CAN_EXTID=y : For extended, 29-bit CAN IDs + + System Type -> CAN Drive Support + CONFIG_SAMA5_CAN0_BAUD=250000 : Select some BAUD for CAN0 (if enabled) + CONFIG_SAMA5_CAN0_NRECVMB=1 : Select number of receive mailboxes (see below) + CONFIG_SAMA5_CAN1_BAUD=250000 : Select some BAUD for CAN1 (if enabled) + CONFIG_SAMA5_CAN1_NRECVMB=1 : Select number of receive mailboxes (see below) + + Receive Mailboxes and Address Filtering + --------------------------------------- + + The SAMA5 CAN0 peripheral supports 8 mailboxes that can be used for sending + and receiving messages. Note that the number of dedicated receive mailboxes + (CONFIG_SAMA5_CANn_NRECVMB) was set to one in the above configuration. This + could be set to any value from 1 to 3 (the upper limit of 3 is purely + arbrary and can be increased with some minor code enhancement). The + remainder can be configured dynamically to send CAN messages. + + Why would you want to use more than one receive mailbox? There are two + reasons. Multiple receive mailboxes might needed to either (1) receive + bursts of messages, or (2) to support multiple groups of messages filtered + on message ID. + + You must also specify the address filtering for each dedicated receive mailbox: + + System Type -> CAN Drive Support + CONFIG_SAMA5_CAN0_ADDR0 and CONFIG_SAMA5_CAN0_MASK0 : If CONFIG_SAMA5_CAN0_NRECVMB >= 1 + CONFIG_SAMA5_CAN0_ADDR1 and CONFIG_SAMA5_CAN0_MASK1 : If CONFIG_SAMA5_CAN0_NRECVMB >= 2 + CONFIG_SAMA5_CAN0_ADDR2 and CONFIG_SAMA5_CAN0_MASK2 : If CONFIG_SAMA5_CAN0_NRECVMB >= 3 + CONFIG_SAMA5_CAN1_ADDR0 and CONFIG_SAMA5_CAN1_MASK0 : If CONFIG_SAMA5_CAN1_NRECVMB >= 1 + CONFIG_SAMA5_CAN1_ADDR1 and CONFIG_SAMA5_CAN1_MASK1 : If CONFIG_SAMA5_CAN1_NRECVMB >= 2 + CONFIG_SAMA5_CAN1_ADDR2 and CONFIG_SAMA5_CAN1_MASK2 : If CONFIG_SAMA5_CAN1_NRECVMB >= 3 + + Only messages that have IDs that match the CONFIG_SAMA5_CANn_ADDRn when both + the received and the configured address are masked by CONFIG_SAMA5_CANn_MASKn + will be accepted. For example, if the mask is all ones, then only messasges + with exact address matches will be accepted; if the mask is all zeroes than + any address will be accepted. + + CAN connectors + -------------- + + CAN1 and CAN2 are available via RJ-11 connectors on the SAMA5D3-Xplained. Each + is wired as follows. Also shown below is the matching pins if you want connect + the CAN to a device that uses an DB-9 connector (Such as the IXXAT USB-to-CAN + Compact). Both connector types (as well as RJ-45) are common. + + +----------+ RJ-11 DB-9 + | O | ----------- -------------- + +------------+ | | Pin 1 3v3 Pin 1 N/C + | +--+ | | o5 | Pin 2 5v Pin 2 CANL + | | | | | o9 | Pin 3 N/C Pin 3 GND + | +-+ +-+ | | o4 | Pin 4 CANL Pin 4 N/C + | | | | | o8 | Pin 5 CANH Pin 5 N/C + | |654321| | | o3 | Pin 6 N/C Pin 6 N/C + | |oooooo| | | o7 | Pin 7 CANH + | +------+ | | o2 | Pin 8 N/C + +------------+ | o6 | Pin 9 CANV+ (N/C on IXXAT) RJ-11 Female | x1 | + | | + | O | + +----------+ + DB-9 Male + +SAMA5 ADC Support +================= + + Basic driver configuration + -------------------------- + ADC support can be added to the NSH configuration. However, there are no + ADC input pins available to the user for ADC testing (the touchscreen ADC + inputs are intended for other functionality). Because of this, there is + not much motivation to enable ADC support on the SAMA5D3-Xplained. This + paragraph is included here, however, for people using a custom SAMA5D3x + board that requires ADC support. + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_ADC=y : Enable ADC driver support + CONFIG_SAMA5_TC0=y : Enable the Timer/counter library need for periodic sampling + + Drivers + CONFIG_ANALOG=y : Should be automatically selected + CONFIG_ADC=y : Should be automatically selected + + System Type -> ADC Configuration + CONFIG_SAMA5_ADC_CHAN0=y : These settings enable the sequencer to collect + CONFIG_SAMA5_ADC_CHAN1=y : Samples from ADC channels 0-3 on each trigger + CONFIG_SAMA5_ADC_CHAN2=y + CONFIG_SAMA5_ADC_CHAN3=y + CONFIG_SAMA5_ADC_SEQUENCER=y + + CONFIG_SAMA5_ADC_TIOA0TRIG=y : Trigger on the TC0, channel 0 output A + CONFIG_SAMA5_ADC_TIOAFREQ=2 : At a frequency of 2Hz + CONFIG_SAMA5_ADC_TIOA_RISING=y : Trigger on the rising edge + + Default ADC settings (like gain and offset) may also be set if desired. + + System Type -> Timer/counter Configuration + CONFIG_SAMA5_TC0_TIOA0=y : Should be automatically selected + + Work queue supported is also needed: + + Library routines + CONFIG_SCHED_WORKQUEUE=y + + ADC Test Example + ---------------- + For testing purposes, there is an ADC program at apps/examples/adc that + will collect a specified number of samples. This test program can be + enabled as follows: + + Application Configuration -> Examples -> ADC example + CONFIG_EXAMPLES_ADC=y : Enables the example code + CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0" + + Other default settings for the ADC example should be okay. + + ADC DMA Support + --------------- + At 2Hz, DMA is not necessary nor desire-able. The ADC driver has support + for DMA transfers of converted data (although that support has not been + tested as of this writing). DMA support can be added by include the + following in the configuration. + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_DMAC1=y : Enable DMAC1 support + + System Type -> ADC Configuration + CONFIG_SAMA5_ADC_DMA=y : Enable ADC DMA transfers + CONFIG_SAMA5_ADC_DMASAMPLES=2 : Collect two sets of samples per DMA + + Drivers -> Analog device (ADC/DAC) support + CONFIG_ADC_FIFOSIZE=16 : Driver may need a large ring buffer + + Application Configuration -> Examples -> ADC example + CONFIG_EXAMPLES_ADC_GROUPSIZE=16 : Larger buffers in the test + +SAMA5 PWM Support +================= + + Basic driver configuration + -------------------------- + PWM support can be added to the NSH configuration. However, there are no + PWM output pins available to the user for PWM testing. Because of this, + there is not much motivation to enable PWM support on the SAMA5D3-Xplained. This + paragraph is included here, however, for people using a custom SAMA5D3x + board that requires PWM support. + + Basic driver configuration: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_PWM=y : Enable PWM driver support + + Drivers + CONFIG_PWM=y : Should be automatically selected + + PWM Channel/Output Selection + ---------------------------- + In order to use the PWM, you must enable one or more PWM Channels: + + System Type -> PWM Configuration + CONFIG_SAMA5_PWM_CHAN0=y : Enable one or more of channels 0-3 + CONFIG_SAMA5_PWM_CHAN1=y + CONFIG_SAMA5_PWM_CHAN2=y + CONFIG_SAMA5_PWM_CHAN3=y + + For each channel that is enabled, you must also specify the output pins + to be enabled and the clocking supplied to the PWM channel. + + CONFIG_SAMA5_PWM_CHANx_FAULTINPUT=n : (not used currently) + CONFIG_SAMA5_PWM_CHANx_OUTPUTH=y : Enable One of both of the H and L output pins + CONFIG_SAMA5_PWM_CHANx_OUTPUTL=y + + Where x=0..3. + + Care must be taken because all PWM output pins conflict with some other + usage of the pin by other devices. Furthermore, many of these pins have + not been brought out to an external connector: + + -----+---+---+----+------+---------------- + PWM PIN PER PIO I/O CONFLICTS + -----+---+---+----+------+---------------- + PWM0 FI B PC28 J2.30 SPI1, ISI + H B PB0 --- GMAC + B PA20 J1.14 LCDC, ISI + L B PB1 --- GMAC + B PA21 J1.16 LCDC, ISI + -----+---+---+----+------+---------------- + PWM1 FI B PC31 J2.36 HDMI + H B PB4 --- GMAC + B PA22 J1.18 LCDC, ISI + L B PB5 --- GMAC + B PE31 J3.20 ISI, HDMI + B PA23 J1.20 LCDC, ISI + -----+---+---+----+------+---------------- + PWM2 FI B PC29 J2.29 UART0, ISI, HDMI + H C PD5 --- HSMCI0 + B PB8 --- GMAC + L C PD6 --- HSMCI0 + B PB9 --- GMAC + -----+---+---+----+------+---------------- + PWM3 FI C PD16 --- SPI0, Audio + H C PD7 --- HSMCI0 + B PB12 J3.7 GMAC + L C PD8 --- HSMCI0 + B PB13 --- GMAC + -----+---+---+----+-------------------- + + See configs/sama5d3-xplained/include/board.h for all of the default PWM + pin selections. I used PWM channel 0, pins PA20 and PA21 for testing. + + Clocking is addressed in the next paragraph. + + PWM Clock Configuration + ----------------------- + PWM Channels can be clocked from either a coarsely divided divided down + MCK or from a custom frequency from PWM CLKA and/or CLKB. If you want + to use CLKA or CLKB, you must enable and configure them. + + System Type -> PWM Configuration + CONFIG_SAMA5_PWM_CLKA=y + CONFIG_SAMA5_PWM_CLKA_FREQUENCY=3300 + CONFIG_SAMA5_PWM_CLKB=y + CONFIG_SAMA5_PWM_CLKB_FREQUENCY=3300 + + Then for each of the enabled, channels you must select the input clock + for that channel: + + System Type -> PWM Configuration + CONFIG_SAMA5_PWM_CHANx_CLKA=y : Pick one of MCK, CLKA, or CLKB (only) + CONFIG_SAMA5_PWM_CHANx_CLKB=y + CONFIG_SAMA5_PWM_CHANx_MCK=y + CONFIG_SAMA5_PWM_CHANx_MCKDIV=128 : If MCK is selected, then the MCK divider must + : also be provided (1,2,4,8,16,32,64,128,256,512, or 1024). + + PWM Test Example + ---------------- + For testing purposes, there is an PWM program at apps/examples/pwm that + will collect a specified number of samples. This test program can be + enabled as follows: + + Application Configuration -> Examples -> PWM example + CONFIG_EXAMPLES_PWM=y : Enables the example code + + Other default settings for the PWM example should be okay. + + CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm0" + CONFIG_EXAMPLES_PWM_FREQUENCY=100 + + Usage of the example is straightforward: + + nsh> pwm -h + Usage: pwm [OPTIONS] + + Arguments are "sticky". For example, once the PWM frequency is + specified, that frequency will be re-used until it is changed. + + "sticky" OPTIONS include: + [-p devpath] selects the PWM device. Default: /dev/pwm0 Current: /dev/pwm0 + [-f frequency] selects the pulse frequency. Default: 100 Hz Current: 100 Hz + [-d duty] selects the pulse duty as a percentage. Default: 50 % Current: 50 % + [-t duration] is the duration of the pulse train in seconds. Default: 5 Current: 5 + [-h] shows this message and exits + +RTC +=== + + The Real Time Clock/Calendar RTC) may be enabled with these settings: + + System Type: + CONFIG_SAMA5_RTC=y : Enable the RTC driver + + Drivers (these values will be selected automatically): + CONFIG_RTC=y : Use the RTC for system time + CONFIG_RTC_DATETIME=y : RTC supports data/time + + You can set the RTC using the NSH date command: + + NuttShell (NSH) NuttX-7.3 + nsh> help date + date usage: date [-s "MMM DD HH:MM:SS YYYY"] + nsh> date + Jan 01 00:34:45 2012 + nsh> date -s "JUN 29 7:30:00 2014" + nsh> date + Jun 29 07:30:01 2014 + + After a power cycle and reboot: + + NuttShell (NSH) NuttX-7.3 + nsh> date + Jun 29 07:30:55 2014 + nsh> + + The RTC also supports an alarm that may be enable with the following + settings. However, there is nothing in the system that currently makes + use of this alarm. + + Drivers: + CONFIG_RTC_ALARM=y : Enable the RTC alarm + + Library Routines + CONFIG_SCHED_WORKQUEUE=y : Alarm needs work queue support + +Watchdog Timer +============== + + NSH can be configured to exercise the watchdog timer test + (apps/examples/watchdog). This can be selected with the following + settings in the NuttX configuration file: + + System Type: + CONFIG_SAMA5_WDT=y : Enable the WDT peripheral + : Defaults in "RTC Configuration" should be OK + + Drivers (this will automatically be selected): + CONFIG_WATCHDOG=y : Enables watchdog timer driver support + + Application Configuration -> Examples + CONFIG_EXAMPLES_WATCHDOG=y : Enable apps/examples/watchdog + + The WDT timer is driven off the slow, 32768Hz clock divided by 128. As a + result, the watchdog a maximum timeout value of 16 seconds. The SAMA5 WDT + may also only be programmed one time; the processor must be reset before + the WDT can be reprogrammed. + + The SAMA5 always boots with the watchdog timer enabled at its maximum + timeout (16 seconds). In the normal case where no watchdog timer driver + has been configured, the watchdog timer is disabled as part of the start + up logic. But, since we are permitted only one opportunity to program + the WDT, we cannot disable the watchdog time if CONFIG_SAMA5_WDT=y. So, + be forewarned: You have only 16 seconds to run your watchdog timer test! + +TRNG and /dev/random +==================== + + NSH can be configured to enable the SAMA5 TRNG peripheral so that it + provides /dev/random. The following configuration will enable the TRNG, + and support for /dev/random: + + System Type: + CONFIG_SAMA5_TRNG=y : Enable the TRNG peripheral + + Drivers: + CONFIG_DEV_RANDOM=y : Enable /dev/random + + A simple test of /dev/random is available at apps/examples/random and + can be enabled as a NSH application via the following additional + configuration settings: + + Applications -> Examples + CONFIG_EXAMPLES_RANDOM=y : Enable apps/examples/random + CONFIG_EXAMPLES_MAXSAMPLES=64 : Default settings are probably OK + CONFIG_EXAMPLES_NSAMPLES=8 + +Tickless OS +=========== + + Background + ---------- + By default, a NuttX configuration uses a periodic timer interrupt that + drives all system timing. The timer is provided by architecture-specifi + code that calls into NuttX at a rate controlled by CONFIG_USEC_PER_TICK. + The default value of CONFIG_USEC_PER_TICK is 10000 microseconds which + corresponds to a timer interrupt rate of 100 Hz. + + An option is to configure NuttX to operation in a "tickless" mode. Some + limitations of default system timer are, in increasing order of + importance: + + - Overhead: Although the CPU usage of the system timer interrupt at 100Hz + is really very low, it is still mostly wasted processing time. One most + timer interrupts, there is really nothing that needs be done other than + incrementing the counter. + - Resolution: Resolution of all system timing is also determined by + CONFIG_USEC_PER_TICK. So nothing that be time with resolution finer than + 10 milliseconds be default. To increase this resolution, + CONFIG_USEC_PER_TICK an be reduced. However, then the system timer + interrupts use more of the CPU bandwidth processing useless interrupts. + - Power Usage: But the biggest issue is power usage. When the system is + IDLE, it enters a light, low-power mode (for ARMs, this mode is entered + with the wfi or wfe instructions for example). But each interrupt + awakens the system from this low power mode. Therefore, higher rates + of interrupts cause greater power consumption. + + The so-called Tickless OS provides one solution to issue. The basic + concept here is that the periodic, timer interrupt is eliminated and + replaced with a one-shot, interval timer. It becomes event driven + instead of polled: The default system timer is a polled design. On + each interrupt, the NuttX logic checks if it needs to do anything + and, if so, it does it. + + Using an interval timer, one can anticipate when the next interesting + OS event will occur, program the interval time and wait for it to fire. + When the interval time fires, then the scheduled activity is performed. + + Configuration + ------------- + The following configuration options will enable support for the Tickless + OS for the SAMA5D platforms using TC0 channels 0-3 (other timers or + timer channels could be used making the obvious substitutions): + + RTOS Features -> Clocks and Timers + CONFIG_SCHED_TICKLESS=y : Configures the RTOS in tickless mode + CONFIG_SCHED_TICKLESS_ALARM=n : (option not implemented) + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_TC0=y : Enable TC0 (TC channels 0-3 + + System Type -> Timer/counter Configuration + CONFIG_SAMA5_ONESHOT=y : Enables one-shot timer wrapper + CONFIG_SAMA5_FREERUN=y : Enabled free-running timer wrapper + CONFIG_SAMA5_TICKLESS_ONESHOT=0 : Selects TC0 channel 0 for the one-shot + CONFIG_SAMA5_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free- + : running timer + + The resolution of the clock is provided by the CONFIG_USEC_PER_TICK + setting in the configuration file. + + NOTE: In most cases, the slow clock will be used as the timer/counter + input. You should enable the 32.768KHz crystal for the slow clock by + calling sam_sckc_enable(). Otherwise, you will be doing all system + timing using the RC clock! UPDATE: This will now be selected by default + when you configure for TICKLESS support. + + The slow clock has a resolution of about 30.518 microseconds. Ideally, + the value of CONFIG_USEC_PER_TICK should be the exact clock resolution. + Otherwise there will be cumulative timing inaccuracies. But a choice + choice of: + + CONFIG_USEC_PER_TICK=31 + + will have an error of 0.6% and will have inaccuracies that will + effect the time due to long term error build-up. + + UPDATE: As of this writing (2015-12-03), the Tickless support is + functional. However, there are inaccuracies in delays. For example, + + nsh> sleep 10 + + results in a delay of maybe 5.4 seconds. But the timing accuracy is + correct if all competing uses of the interval timer are disabled (mostly + from the high priority work queue). Therefore, I conclude that this + inaccuracy is due to the inaccuracies in the representation of the clock + rate. 30.518 usec cannot be represented accurately. Each timing + calculation results in a small error. When the interval timer is very + busy, long delays will be divided into many small pieces and each small + piece has a large error in the calculation. The cumulative error is the + cause of the problem. + + SAMA5 Timer Usage + ----------------- + This current implementation uses two timers: A one-shot timer to + provide the timed events and a free running timer to provide the current + time. Since timers are a limited resource, that could be an issue on + some systems. + + We could do the job with a single timer if we were to keep the single + timer in a free-running at all times. The SAMA5 timer/counters have + 32-bit counters with the capability to generate a compare interrupt when + the timer matches a compare value but also to continue counting without + stopping (giving another, different interrupt when the timer rolls over + from 0xffffffff to zero). So we could potentially just set the compare + at the number of ticks you want PLUS the current value of timer. Then + you could have both with a single timer: An interval timer and a free- + running counter with the same timer! In this case, you would want to + to set CONFIG_SCHED_TICKLESS_ALARM in the NuttX configuration. + + Patches are welcome! + +I2S Audio Support +================= + + The SAMA5D3-Xplained has two devices on-board that can be used for verification + of I2S functionality: HDMI and a WM8904 audio CODEC. As of this writing, + the I2S driver is present, but there are not drivers for either the HDMI + or the WM8904. + + WM8904 Audio CODEC Interface + ---------------------------- + + ------------- ---------------- ----------------- + WM8904 SAMA5D3 NuttX Pin Name + ------------- ---------------- ----------------- + 3 SDA PA30 TWD0 PIO_TWI0_D + 2 SCLK PA31 TWCK0 PIO_TWI0_CK + 28 MCLK PD30 PCK0 PIO_PMC_PCK0 + 29 BCLK/GPIO4 PC16 TK PIO_SSC0_TK + "" " " PC19 RK PIO_SSC0_RK + 30 LRCLK PC17 TF PIO_SSC0_TF + "" " " PC20 RF PIO_SSC0_RF + 31 ADCDAT PC21 RD PIO_SSC0_RD + 32 DACDAT PC18 TD PIO_SSC0_TD + 1 IRQ/GPIO1 PD16 INT_AUDIO N/A + ------------- ---------------- ----------------- + + I2S Loopback Test + ----------------- + + The I2S driver was verified using a special I2C character driver (at + nuttx/drivers/audio/i2schar.c) and a test driver at apps/examples/i2schar. + The I2S driver was verified in loopback mode with no audio device. + + [NOTE: The above statement is anticipatory: As of this writing I2S driver + verification is underway and still not complete]. + + This section describes the modifications to the NSH configuration that were + used to perform the I2S testing: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_SSCO=y : Enable SSC0 driver support + CONFIG_SAMA5_DMAC0=y : DMAC0 required by SSC0 + + Alternatively, SSC1 could have be used: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_SSC1=y : Enable SSC0 driver support + CONFIG_SAMA5_DMAC1=y : DMAC0 required by SSC0 + + System Type -> SSC Configuration + CONFIG_SAMA5_SSC_MAXINFLIGHT=16 : Up to 16 pending DMA transfers + CONFIG_SAMA5_SSC0_MASTER=y : Master mode + CONFIG_SAMA5_SSC0_DATALEN=16 : 16-bit data + CONFIG_SAMA5_SSC0_RX=y : Support a receiver + CONFIG_SAMA5_SSC0_RX_RKINPUT=y : Receiver gets clock from RK input + CONFIG_SAMA5_SSC0_TX=y : Support a transmitter + CONFIG_SAMA5_SSC0_TX_MCKDIV=y : Transmitter gets clock from MCK/2 + CONFIG_SAMA5_SSC0_MCKDIV_SAMPLERATE=48000 : Sampling at 48K samples/sec + CONFIG_SAMA5_SSC0_TX_TKOUTPUT_XFR=y : Outputs clock on TK when transferring data + CONFIG_SAMA5_SSC0_LOOPBACK=y : Loopmode mode connects RD/TD and RK/TK + + Audio + CONFIG_AUDIO=y : Audio support needed + : Defaults should be okay + + Drivers -> Audio + CONFIG_I2S=y : General I2S support + CONFIG_AUDIO_DEVICES=y : Audio device support + CONFIG_AUDIO_I2SCHAR=y : Build I2S character driver + + The following describes how I have the test application at + apps/examples/i2schar configured: + + CONFIG_EXAMPLES_I2SCHAR=y + CONFIG_EXAMPLES_I2SCHAR_DEVPATH="/dev/i2schar0" + CONFIG_EXAMPLES_I2SCHAR_TX=y + CONFIG_EXAMPLES_I2SCHAR_TXBUFFERS=4 + CONFIG_EXAMPLES_I2SCHAR_TXSTACKSIZE=1536 + CONFIG_EXAMPLES_I2SCHAR_RX=y + CONFIG_EXAMPLES_I2SCHAR_RXBUFFERS=4 + CONFIG_EXAMPLES_I2SCHAR_RXSTACKSIZE=1536 + CONFIG_EXAMPLES_I2SCHAR_BUFSIZE=256 + CONFIG_EXAMPLES_I2SCHAR_DEVINIT=y + + Board Selection + CONFIG_SAMA5D3XPLAINED_I2SCHAR_MINOR=0 + CONFIG_SAMA5D3XPLAINED_SSC_PORT=0 : 0 or SSC0, 1 for SSC1 + + Library Routines + CONFIG_SCHED_WORKQUEUE=y : Driver needs work queue support + +Shields +======= + + Support is built in for the following shields: + + Itead Joystick Shield + --------------------- + See http://imall.iteadstudio.com/im120417014.html for more information + about this joystick. + + Itead Joystick Connection: + + --------- ----------------- --------------------------------- + ARDUINO ITEAD SAMA5D3 XPLAINED + PIN NAME SIGNAL CONNECTOR SIGNAL + --------- ----------------- ---------- ---------------------- + D3 Button E Output J18 pin 4 PC8 + D4 Button D Output J18 pin 5 PC28 + D5 Button C Output J18 pin 6 PC7 + D6 Button B Output J18 pin 7 PC6 + D7 Button A Output J18 pin 8 PC5 + D8 Button F Output J15 pin 1 PC4 + D9 Button G Output J15 pin 2 PC3 + A0 Joystick Y Output J17 pin 1 PC18 AD0 (function 4) + A1 Joystick X Output J17 pin 2 PD21 AD1 (function 1) + --------- ----------------- ---------- ---------------------- + + All buttons are pulled on the shield. A sensed low value indicates + when the button is pressed. + + Possible conflicts: + + ---- ----- -------------------------------------------------- + ARDU SAMA5 SAMA5D3 XPLAINED + PIN GPIO SIGNAL FUNCTION + ---- ----- ----------------- -------------------------------- + D3 PC8 EMDC 10/100Mbit Ethernet MAC + D4 PC28 SPI1_NPCS3/ISI_D9 SPI1/ISI + D5 PC7 EREFCK 10/100Mbit Ethernet MAC + D6 PC6 ECRSDV 10/100Mbit Ethernet MAC + D7 PC5 ECRSDV 10/100Mbit Ethernet MAC + D8 PC4 ETXEN 10/100Mbit Ethernet MAC + D9 PC3 ERX1 10/100Mbit Ethernet MAC + A0 PC18 RK0 SSC/Audio + A1 PC21 RD0 SSC/Audio + ---- ----- ----------------- -------------------------------- + + Itead Joystick Signal interpretation: + + --------- ----------------------- --------------------------- + BUTTON TYPE NUTTX ALIAS + --------- ----------------------- --------------------------- + Button A Large button A JUMP/BUTTON 3 + Button B Large button B FIRE/BUTTON 2 + Button C Joystick select button SELECT/BUTTON 1 + Button D Tiny Button D BUTTON 6 + Button E Tiny Button E BUTTON 7 + Button F Large Button F BUTTON 4 + Button G Large Button G BUTTON 5 + --------- ----------------------- --------------------------- + + Itead Joystick configuration settings: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_ADC=y : Enable ADC driver support + CONFIG_SAMA5_TC0=y : Enable the Timer/counter library need for periodic sampling + CONFIG_SAMA5_EMACA=n : 10/100Mbit Ethernet MAC conflicts + CONFIG_SAMA5_SSC0=n : SSC0 Audio conflicts + CONFIG_SAMA5_SPI1=? : SPI1 might conflict if PCS3 is used + CONFIG_SAMA5_ISI=? : ISIS conflics if bit 9 is used + + System Type -> PIO Interrupts + CONFIG_SAMA5_PIO_IRQ=y : PIO interrupt support is required + CONFIG_SAMA5_PIOC_IRQ=y : PIOC interrupt support is required + + Drivers + CONFIG_ANALOG=y : Should be automatically selected + CONFIG_ADC=y : Should be automatically selected + CONFIG_INPUT=y : Select input device support + CONFIG_AJOYSTICK=y : Select analog joystick support + + System Type -> ADC Configuration + CONFIG_SAMA5_ADC_CHAN0=y : These settings enable the sequencer to collect + CONFIG_SAMA5_ADC_CHAN1=y : Samples from ADC channels 0-1 on each trigger + CONFIG_SAMA5_ADC_SEQUENCER=y + CONFIG_SAMA5_ADC_TIOA0TRIG=y : Trigger on the TC0, channel 0 output A + CONFIG_SAMA5_ADC_TIOAFREQ=10 : At a frequency of 10Hz + CONFIG_SAMA5_ADC_TIOA_RISING=y : Trigger on the rising edge + + Default ADC settings (like gain and offset) may also be set if desired. + + System Type -> Timer/counter Configuration + CONFIG_SAMA5_TC0_TIOA0=y : Should be automatically selected + + Library routines + CONFIG_SCHED_WORKQUEUE=y : Work queue support is needed + + There is nothing in the configuration that currently uses the joystick. + For testing, you can add the following configuration options to enable the + analog joystick example at apps/examples/ajoystick: + + CONFIG_NSH_ARCHINIT=y + CONFIG_EXAMPLES_AJOYSTICK=y + CONFIG_EXAMPLES_AJOYSTICK_DEVNAME="/dev/ajoy0" + CONFIG_EXAMPLES_AJOYSTICK_SIGNO=13 + + STATUS: + 2014-12-03: As nearly I can tell, the Itead Joystick shield cannot be + used with the SAMA5D3-Xplained. I believe that the EMAC PHY chip is + enableed and since it shares pins with the Joystick, it interferes with + the Joystick inputs. There is probably more wrong than this; perhaps I + am not setting up the pins correctly. But having seen the states of the + button output pins change when powering up the board, I have lost hope + of getting the shield to work on this board. I leave the + implementation in place only for reference. + +SAMA5D3-Xplained Configuration Options +================================= + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH="arm" + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXA5=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="sama5" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_SAMA5=y + + and one of: + + CONFIG_ARCH_CHIP_ATSAMA5D31=y + CONFIG_ARCH_CHIP_ATSAMA5D33=y + CONFIG_ARCH_CHIP_ATSAMA5D34=y + CONFIG_ARCH_CHIP_ATSAMA5D35=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD="sama5d3-xplained" (for the SAMA5D3-Xplained development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SAMA5D3_XPLAINED=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x0002000 (128Kb) + + CONFIG_RAM_START - The physical start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_RAM_VSTART - The virutal start address of installed DRAM + + CONFIG_RAM_VSTART=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibrate + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_SAMA5_DBGU - Debug Unit + CONFIG_SAMA5_PIT - Periodic Interval Timer + CONFIG_SAMA5_WDT - Watchdog timer + CONFIG_SAMA5_HSMC - Multi-bit ECC + CONFIG_SAMA5_SMD - SMD Soft Modem + CONFIG_SAMA5_USART0 - USART 0 + CONFIG_SAMA5_USART1 - USART 1 + CONFIG_SAMA5_USART2 - USART 2 + CONFIG_SAMA5_USART3 - USART 3 + CONFIG_SAMA5_UART0 - UART 0 + CONFIG_SAMA5_UART1 - UART 1 + CONFIG_SAMA5_TWI0 - Two-Wire Interface 0 + CONFIG_SAMA5_TWI1 - Two-Wire Interface 1 + CONFIG_SAMA5_TWI2 - Two-Wire Interface 2 + CONFIG_SAMA5_HSMCI0 - High Speed Multimedia Card Interface 0 + CONFIG_SAMA5_HSMCI1 - High Speed Multimedia Card Interface 1 + CONFIG_SAMA5_HSMCI2 - High Speed Multimedia Card Interface 2 + CONFIG_SAMA5_SPI0 - Serial Peripheral Interface 0 + CONFIG_SAMA5_SPI1 - Serial Peripheral Interface 1 + CONFIG_SAMA5_TC0 - Timer Counter 0 (ch. 0, 1, 2) + CONFIG_SAMA5_TC1 - Timer Counter 1 (ch. 3, 4, 5) + CONFIG_SAMA5_PWM - Pulse Width Modulation Controller + CONFIG_SAMA5_ADC - Touch Screen ADC Controller + CONFIG_SAMA5_DMAC0 - DMA Controller 0 + CONFIG_SAMA5_DMAC1 - DMA Controller 1 + CONFIG_SAMA5_UHPHS - USB Host High Speed + CONFIG_SAMA5_UDPHS - USB Device High Speed + CONFIG_SAMA5_GMAC - Gigabit Ethernet MAC + CONFIG_SAMA5_EMACA - Ethernet MAC (type A) + CONFIG_SAMA5_LCDC - LCD Controller + CONFIG_SAMA5_ISI - Image Sensor Interface + CONFIG_SAMA5_SSC0 - Synchronous Serial Controller 0 + CONFIG_SAMA5_SSC1 - Synchronous Serial Controller 1 + CONFIG_SAMA5_CAN0 - CAN controller 0 + CONFIG_SAMA5_CAN1 - CAN controller 1 + CONFIG_SAMA5_SHA - Secure Hash Algorithm + CONFIG_SAMA5_AES - Advanced Encryption Standard + CONFIG_SAMA5_TDES - Triple Data Encryption Standard + CONFIG_SAMA5_TRNG - True Random Number Generator + CONFIG_SAMA5_ARM - Performance Monitor Unit + CONFIG_SAMA5_FUSE - Fuse Controller + CONFIG_SAMA5_MPDDRC - MPDDR controller + + Some subsystems can be configured to operate in different ways. The drivers + need to know how to configure the subsystem. + + CONFIG_SAMA5_PIOA_IRQ - Support PIOA interrupts + CONFIG_SAMA5_PIOB_IRQ - Support PIOB interrupts + CONFIG_SAMA5_PIOC_IRQ - Support PIOD interrupts + CONFIG_SAMA5_PIOD_IRQ - Support PIOD interrupts + CONFIG_SAMA5_PIOE_IRQ - Support PIOE interrupts + + CONFIG_USART0_ISUART - USART0 is configured as a UART + CONFIG_USART1_ISUART - USART1 is configured as a UART + CONFIG_USART2_ISUART - USART2 is configured as a UART + CONFIG_USART3_ISUART - USART3 is configured as a UART + + AT91SAMA5 specific device driver settings + + CONFIG_SAMA5_DBGU_SERIAL_CONSOLE - selects the DBGU + for the console and ttyDBGU + CONFIG_SAMA5_DBGU_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_SAMA5_DBGU_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_SAMA5_DBGU_BAUD - The configure BAUD of the DBGU. + CONFIG_SAMA5_DBGU_PARITY - 0=no parity, 1=odd parity, 2=even parity + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the DBGU). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARITY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + AT91SAMA5 USB Host Configuration + Pre-requisites + + CONFIG_USBDEV - Enable USB device support + CONFIG_USBHOST - Enable USB host support + CONFIG_SAMA5_UHPHS - Needed + CONFIG_SAMA5_OHCI - Enable the STM32 USB OTG FS block + CONFIG_SCHED_WORKQUEUE - Worker thread support is required + + Options: + + CONFIG_SAMA5_OHCI_NEDS + Number of endpoint descriptors + CONFIG_SAMA5_OHCI_NTDS + Number of transfer descriptors + CONFIG_SAMA5_OHCI_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_SAMA5_OHCI_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_INT_DISABLE + Disable interrupt endpoint support + CONFIG_USBHOST_ISOC_DISABLE + Disable isochronous endpoint support + CONFIG_USBHOST_BULK_DISABLE + Disable bulk endpoint support + +config SAMA5_OHCI_REGDEBUG + +Configurations +============== + + Information Common to All Configurations + ---------------------------------------- + Each SAMA5D3-Xplained configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh sama5d3-xplained/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on the DBGU (J23). + + 3. All of these configurations use the Code Sourcery for Windows toolchain + (unless stated otherwise in the description of the configuration). That + toolchain selection can easily be reconfigured using 'make menuconfig'. + Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Microsoft Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin or other POSIX environment + + System Type -> Toolchain: + CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for windows + + That same configuration will work with Atmel GCC toolchain. The only + change required to use the Atmel GCC toolchain is to change the PATH + variable so that those tools are selected instead of the CodeSourcery + tools. Try 'which arm-none-eabi-gcc' to make sure that you are + selecting the right tool. + + The setenv.sh file is available for you to use to set the PATH + variable. The path in the that file may not, however, be correct + for your installation. + + See also the "NOTE about Windows native toolchains" in the section call + "GNU Toolchain Options" above. + + !!!WARNING!!! The first time that you type 'make', the system will + configure itself based on the settings in the .config file. One of + these settings can cause a lot of confusion if you configure the build + in the wrong state: If you are running on Linux, make *certain* that + you have CONFIG_HOST_LINUX=y *before* the first make or you will + create a very corrupt configuration that may not be easy to recover + from. + + 4. The SAMA5Dx is running at 396MHz by default in these configurations. + This is because the original timing for the PLLs, NOR FLASH, and SDRAM + came from the Atmel NoOS sample code which runs at that rate. + + The SAMA5Dx is capable of running at 528MHz, however, and is easily + re-configured: + + Board Selection -> CPU Frequency + CONFIG_SAMA5D3xEK_396MHZ=n # Disable 396MHz operation + CONFIG_SAMA5D3xEK_528MHZ=y # Enable 528MHz operation + + If you switch to 528MHz, you should also check the loop calibration + value in your .config file. Of course, it would be best to re-calibrate + the timing loop, but these values should get you in the ballpark: + + CONFIG_BOARD_LOOPSPERMSEC=49341 # Calibrated on SAMA5D3-EK at 396MHz + # running from ISRAM + CONFIG_BOARD_LOOPSPERMSEC=65775 # Calibrated on SAMA4D3-Xplained at + # 528MHz running from SDRAM + + Operation at 528MHz has been verified but is not the default in these + configurations because most testing was done at 396MHz. NAND has not + been verified at these rates. + + Configuration Sub-directories + ----------------------------- + Summary: Some of the descriptions below are long and wordy. Here is the + concise summary of the available SAMA5D3-Xplained configurations: + + bridge: This is a simple testing that exercises EMAC and GMAC for + a simple UDP relay bridge test. + nsh: This is another NSH configuration, not too different from the + demo configuration. The nsh configuration is, however, bare bones. + It is the simplest possible NSH configuration and is useful as a + platform for debugging and integrating new features in isolation. + + There may be issues with some of these configurations. See the details + before of the status of individual configurations. + + Now for the gory details: + + bridge: + + This is a simple testing that exercises EMAC and GEMAC for a simple + UDP relay bridge test using apps/examples/bridge. See + apps/examples/README.txt for more information about this test. + + + NOTES: + + 1. This configuration uses the default DBGU serial console. That + is easily changed by reconfiguring to (1) enable a different + serial peripheral, and (2) selecting that serial peripheral as + the console device. + + 2. By default, this configuration is set up to build on Windows + under either a Cygwin or MSYS environment using a recent, Windows- + native, generic ARM EABI GCC toolchain (such as the CodeSourcery + toolchain). Both the build environment and the toolchain + selection can easily be changed by reconfiguring: + + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + If you are running on Linux, make *certain* that you have + CONFIG_HOST_LINUX=y *before* the first make or you will create a + corrupt configuration that may not be easy to recover from. See + the warning in the section "Information Common to All Configurations" + for further information. + + 3. This configuration executes out of SDRAM flash and is loaded into + SDRAM from NAND, Serial DataFlash, SD card or from a TFTPC sever via + U-Boot or BareBox. Data also is positioned in SDRAM. + + I did most testing with nuttx.bin on an SD card. These are the + commands that I used to boot NuttX from the SD card: + + U-Boot> fatload mmc 0 0x20008000 nuttx.bin + U-Boot> go 0x20008040 + + 4. You will almost certainly need to adapt this configuration to + work in your network environment. I did all testing with a + single 10.0.0.xx network and a 4+1 port switch: + + - Host PC IP 10.0.0.1 + - Target GMAC IP: 10.0.0.2 + - Target EMAC IP: 10.0.0.3 + + Host PC, EMAC, and GMAC were all connected using an Ethernet + switch to the same 255.255.255.0 network. + + STATUS: + + 2014-11-20: Configuration created. Partially verified. Both the + EMAC and GMAC appear to be function; both respond to pings from + the host PC. But I cannot perform the full bridge test yet + because there still is no host-side test driver in apps/examples/bridge. + 2014-11-21: Added the host-side test driver and correct a number + of errors in the test logic. The testing is working (according + to WireShark), but I an having some procedural issues related to + the Windows firewall. + + nsh: + + This configuration directory provide the NuttShell (NSH). There are + two NSH configurations: nsh and demo. The difference is that nsh is + intended to be a very simple NSH configuration upon which you can build + further functionality. The demo configuration, on the other hand, is + intended to be a rich configuration that shows many features all working + together. + + NOTES: + 1. This configuration uses the default DBGU serial console. That + is easily changed by reconfiguring to (1) enable a different + serial peripheral, and (2) selecting that serial peripheral as + the console device. + + 2. By default, this configuration is set up to build on Windows + under either a Cygwin or MSYS environment using a recent, Windows- + native, generic ARM EABI GCC toolchain (such as the CodeSourcery + toolchain). Both the build environment and the toolchain + selection can easily be changed by reconfiguring: + + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + If you are running on Linux, make *certain* that you have + CONFIG_HOST_LINUX=y *before* the first make or you will create a + corrupt configuration that may not be easy to recover from. See + the warning in the section "Information Common to All Configurations" + for further information. + + 3. This configuration executes out of SDRAM flash and is loaded into + SDRAM from NAND, Serial DataFlash, SD card or from a TFTPC sever via + U-Boot or BareBox. Data also is positioned in SDRAM. + + I did most testing with nuttx.bin on an SD card. These are the + commands that I used to boot NuttX from the SD card: + + U-Boot> fatload mmc 0 0x20008000 nuttx.bin + U-Boot> go 0x20008040 + + 4. This configuration has support for NSH built-in applications enabled. + However, no built-in applications are selected in the base configuration. + + 5. This configuration has support for the FAT file system built in. However, + by default, there are no block drivers initialized. The FAT file system can + still be used to create RAM disks. + + 6. The SAMA5D3 Xplained board includes an option serial DataFlash. Support + for that serial FLASH can be enabled by modifying the NuttX configuration + as described above in the paragraph entitled "AT25 Serial FLASH". + + 7. Enabling HSMCI support. The SAMA5D3-Xplained provides a two SD memory + card slots: (1) a full size SD card slot (J10), and (2) a microSD + memory card slot (J11). The full size SD card slot connects via HSMCI0; + the microSD connects vi HSMCI1. Support for both SD slots can be enabled + with the settings provided in the paragraph entitled "HSMCI Card Slots" + above. + + 8. Support the USB low-, high- and full-speed OHCI host driver can be enabled + by changing the NuttX configuration file as described in the section + entitled "USB High-Speed Host" above. + + 9. Support the USB high-speed USB device driver (UDPHS) can be enabled + by changing the NuttX configuration file as described above in the + section entitled "USB High-Speed Device." + + 10. I2C Tool. NuttX supports an I2C tool at apps/system/i2c that can be + used to peek and poke I2C devices. See the discussion above under + "I2C Tool" for detailed configuration settings. + + 11. Networking support via the can be added to NSH by modifying the + configuration. See the "Networking" section above for detailed + configuration settings. + + 12. The Real Time Clock/Calendar (RTC) may be enabled by reconfiguring NuttX. + See the section entitled "RTC" above for detailed configuration settings. + + 13. This example can be configured to exercise the watchdog timer test + (apps/examples/watchdog). See the detailed configuration settings in + the section entitled "Watchdog Timer" above. + + 14. This example can be configured to enable the SAMA5 TRNG peripheral so + that it provides /dev/random. See the section entitled "TRNG and + /dev/random" above for detailed configuration information. + + 16. See also the sections above for additional configuration options: + "CAN Usage", "SAMA5 ADC Support", "SAMA5 PWM Support", "I2S Audio + Support" + + STATUS: + See the To-Do list below + + 2014-4-3: Delay loop calibrated: CONFIG_BOARD_LOOPSPERMSEC=65775 + +To-Do List +========== + +1) Neither USB OHCI nor EHCI support Isochronous endpoints. Interrupt + endpoint support in the EHCI driver is untested (but works in similar + EHCI drivers). + +2) HSCMI. CONFIG_MMCSD_MULTIBLOCK_DISABLE=y is set to disable multi-block + transfers because of some issues that I saw during testing. The is very + low priority to me but might be important to you if you are need very + high performance SD card accesses. + + HSMCI TX DMA is currently disabled for the SAMA5D3. There is some + issue with the TX DMA setup (HSMCI TX DMA the same driver works with + the SAMA5D4 which has a different DMA subsystem). This is a bug that + needs to be resolved. + + UPDATE: This problem may be fixed with a bug correct on 2015-03-15). + Need to retest. That change is necessary, but may not be sufficient to + solve the problem. + +3) GMAC has only been tested on a 10/100Base-T network. I don't have a + 1000Base-T network to support additional testing. + +4) Some drivers may require some adjustments if you intend to run from SDRAM. + That is because in this case macros like BOARD_MCK_FREQUENCY are not constants + but are instead function calls: The MCK clock frequency is not known in + advance but instead has to be calculated from the bootloader PLL configuration. + + As of this writing, all drivers have been converted to run from SDRAM except + for the PWM and the Timer/Counter drivers. These drivers use the + BOARD_MCK_FREQUENCY definition in more complex ways and will require some + minor redesign and re-testing before they can be available. diff --git a/configs/sama5d3-xplained/bridge/Make.defs b/configs/sama5d3-xplained/bridge/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..7ce0dad5266e8f25af3e87248ff6e4c137f45938 --- /dev/null +++ b/configs/sama5d3-xplained/bridge/Make.defs @@ -0,0 +1,141 @@ +############################################################################ +# configs/sama5d3-xplained/bridge/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) + LDSCRIPT = ddram.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d3-xplained/bridge/defconfig b/configs/sama5d3-xplained/bridge/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..72f4e6832552a1703fc1d56d979c2a9a6cb209ec --- /dev/null +++ b/configs/sama5d3-xplained/bridge/defconfig @@ -0,0 +1,1081 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +# CONFIG_ARMV7A_HAVE_L2CC is not set +# CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set + +# +# SAMA5 Configuration Options +# +# CONFIG_SAMA5_HAVE_AESB is not set +# CONFIG_SAMA5_HAVE_ICM is not set +# CONFIG_SAMA5_HAVE_RXLP is not set +CONFIG_SAMA5_HAVE_UART0=y +CONFIG_SAMA5_HAVE_UART1=y +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +# CONFIG_SAMA5_HAVE_USART4 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +CONFIG_SAMA5_HAVE_CAN0=y +CONFIG_SAMA5_HAVE_CAN1=y +CONFIG_SAMA5_HAVE_DMA=y +# CONFIG_SAMA5_HAVE_DDR32 is not set +# CONFIG_SAMA5_HAVE_XDMA is not set +CONFIG_SAMA5_HAVE_LCDC=y +CONFIG_SAMA5_HAVE_GMAC=y +CONFIG_SAMA5_HAVE_EMACA=y +# CONFIG_SAMA5_HAVE_EMACB is not set +# CONFIG_SAMA5_HAVE_EMAC1 is not set +CONFIG_SAMA5_HAVE_HSMCI2=y +CONFIG_SAMA5_HAVE_PIOE=y +# CONFIG_SAMA5_HAVE_SAIC is not set +# CONFIG_SAMA5_HAVE_SBM is not set +# CONFIG_SAMA5_HAVE_SFC is not set +# CONFIG_SAMA5_HAVE_SPI2 is not set +# CONFIG_SAMA5_HAVE_TC is not set +CONFIG_SAMA5_HAVE_TC1=y +# CONFIG_SAMA5_HAVE_TC2 is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +# CONFIG_SAMA5_HAVE_TWI3 is not set +# CONFIG_SAMA5_HAVE_VDEC is not set +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +CONFIG_ARCH_CHIP_SAMA5D3=y +# CONFIG_ARCH_CHIP_SAMA5D4 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D33 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +CONFIG_ARCH_CHIP_ATSAMA5D36=y +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D44 is not set + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +CONFIG_SAMA5_DBGU=y +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +# CONFIG_SAMA5_RTC is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_UART0 is not set +# CONFIG_SAMA5_UART1 is not set +# CONFIG_SAMA5_USART0 is not set +# CONFIG_SAMA5_USART1 is not set +# CONFIG_SAMA5_USART2 is not set +# CONFIG_SAMA5_USART3 is not set +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_HSMCI2 is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_TC1 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +# CONFIG_SAMA5_DMAC0 is not set +# CONFIG_SAMA5_DMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +CONFIG_SAMA5_GMAC=y +CONFIG_SAMA5_EMACA=y +# CONFIG_SAMA5_EMACB is not set +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_CAN0 is not set +# CONFIG_SAMA5_CAN1 is not set +# CONFIG_SAMA5_SHA is not set +# CONFIG_SAMA5_TRNG is not set +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +# CONFIG_SAMA5_MPDDRC is not set +# CONFIG_SAMA5_PIO_IRQ is not set + +# +# DBGU Configuration +# +CONFIG_SAMA5_DBGU_CONSOLE=y +CONFIG_SAMA5_DBGU_RXBUFSIZE=256 +CONFIG_SAMA5_DBGU_TXBUFSIZE=256 +CONFIG_SAMA5_DBGU_NOCONFIG=y + +# +# GMAC device driver options +# +CONFIG_SAMA5_GMAC_NRXBUFFERS=16 +CONFIG_SAMA5_GMAC_NTXBUFFERS=8 +# CONFIG_SAMA5_GMAC_PREALLOCATE is not set +# CONFIG_SAMA5_GMAC_NBC is not set +CONFIG_SAMA5_GMAC_PHYADDR=1 +# CONFIG_SAMA5_GMAC_PHYINIT is not set +CONFIG_SAMA5_GMAC_AUTONEG=y + +# +# EMAC device driver options +# +CONFIG_SAMA5_EMAC_NRXBUFFERS=16 +CONFIG_SAMA5_EMAC_NTXBUFFERS=8 +CONFIG_SAMA5_EMAC_PHYADDR=1 +# CONFIG_SAMA5_EMAC_PHYINIT is not set +# CONFIG_SAMA5_EMAC_MII is not set +CONFIG_SAMA5_EMAC_RMII=y +CONFIG_SAMA5_EMAC_AUTONEG=y +CONFIG_SAMA5_EMAC_PHYSR=30 +CONFIG_SAMA5_EMAC_PHYSR_ALTCONFIG=y +CONFIG_SAMA5_EMAC_PHYSR_ALTMODE=0x7 +CONFIG_SAMA5_EMAC_PHYSR_10HD=0x1 +CONFIG_SAMA5_EMAC_PHYSR_100HD=0x2 +CONFIG_SAMA5_EMAC_PHYSR_10FD=0x5 +CONFIG_SAMA5_EMAC_PHYSR_100FD=0x6 +# CONFIG_SAMA5_EMACA_PREALLOCATE is not set +# CONFIG_SAMA5_EMACA_NBC is not set +# CONFIG_SAMA5_EMAC_ISETH0 is not set +CONFIG_SAMA5_GMAC_ISETH0=y + +# +# External Memory Configuration +# +# CONFIG_SAMA5_EBICS0 is not set +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +CONFIG_SAMA5_BOOT_SDRAM=y + +# +# Heap Configuration +# +# CONFIG_SAMA5_ISRAM_HEAP is not set +# CONFIG_SAMA5_DDRCS_RESERVE is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=65775 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_VSTART=0x20000000 +CONFIG_RAM_SIZE=268435456 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D3_XPLAINED=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d3-xplained" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_SAMA5D3XPLAINED_384MHZ is not set +CONFIG_SAMA5D3XPLAINED_396MHZ=y +# CONFIG_SAMA5D3XPLAINED_528MHZ is not set +# CONFIG_SAMA5D3XPLAINED_SLOWCLOCK is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=17 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="bridge_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_MULTINIC=y +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +CONFIG_ARCH_PHY_INTERRUPT=y +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +CONFIG_ETH0_PHY_KSZ90x1=y +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_ETH1_PHY_NONE is not set +# CONFIG_ETH1_PHY_AM79C874 is not set +# CONFIG_ETH1_PHY_KS8721 is not set +# CONFIG_ETH1_PHY_KSZ8041 is not set +# CONFIG_ETH1_PHY_KSZ8051 is not set +CONFIG_ETH1_PHY_KSZ8081=y +# CONFIG_ETH1_PHY_KSZ90x1 is not set +# CONFIG_ETH1_PHY_DP83848C is not set +# CONFIG_ETH1_PHY_LAN8720 is not set +# CONFIG_ETH1_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_ARCH_HAVE_OTHER_UART=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_OTHER_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +# CONFIG_NET_TCP is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +# CONFIG_NET_UDP_CHECKSUMS is not set +CONFIG_NET_UDP_CONNS=16 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +# CONFIG_NET_UDP_READAHEAD is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +# CONFIG_NET_IOB is not set +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set +# CONFIG_NETDB_DNSCLIENT is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BRIDGE=y + +# +# Network 1 configuration +# +CONFIG_EXAMPLES_BRIDGE_NET1_IFNAME="eth0" +CONFIG_EXAMPLES_BRIDGE_NET1_RECVPORT=5471 +CONFIG_EXAMPLES_BRIDGE_NET1_IOBUFIZE=1024 +# CONFIG_EXAMPLES_BRIDGE_NET1_DHCPC is not set +CONFIG_EXAMPLES_BRIDGE_NET1_NOMAC=y +CONFIG_EXAMPLES_BRIDGE_NET1_MACADDR=0x00e0deadbeef +CONFIG_EXAMPLES_BRIDGE_NET1_IPADDR=0x0a000002 +CONFIG_EXAMPLES_BRIDGE_NET1_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_BRIDGE_NET1_NETMASK=0xffffff00 +CONFIG_EXAMPLES_BRIDGE_NET1_IPHOST=0x0a000001 +CONFIG_EXAMPLES_BRIDGE_NET1_HOSTPORT=5472 +CONFIG_EXAMPLES_BRIDGE_NET1_STACKSIZE=2048 +CONFIG_EXAMPLES_BRIDGE_NET1_PRIORITY=100 + +# +# Network 2 configuration +# +CONFIG_EXAMPLES_BRIDGE_NET2_IFNAME="eth1" +CONFIG_EXAMPLES_BRIDGE_NET2_RECVPORT=5471 +CONFIG_EXAMPLES_BRIDGE_NET2_IOBUFIZE=1024 +# CONFIG_EXAMPLES_BRIDGE_NET2_DHCPC is not set +CONFIG_EXAMPLES_BRIDGE_NET2_NOMAC=y +CONFIG_EXAMPLES_BRIDGE_NET2_MACADDR=0x00e0f00dface +CONFIG_EXAMPLES_BRIDGE_NET2_IPADDR=0x0a000003 +CONFIG_EXAMPLES_BRIDGE_NET2_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_BRIDGE_NET2_NETMASK=0xffffff00 +CONFIG_EXAMPLES_BRIDGE_NET2_IPHOST=0x0a000001 +CONFIG_EXAMPLES_BRIDGE_NET2_HOSTPORT=5472 +CONFIG_EXAMPLES_BRIDGE_NET2_STACKSIZE=2048 +CONFIG_EXAMPLES_BRIDGE_NET2_PRIORITY=100 +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +CONFIG_SYSTEM_RAMTEST=y +# CONFIG_READLINE_HAVE_EXTMATCH is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d3-xplained/bridge/setenv.sh b/configs/sama5d3-xplained/bridge/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..fb6fe50e339054f0aa3a11d411f32747905ab01e --- /dev/null +++ b/configs/sama5d3-xplained/bridge/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d3-xplained/bridge/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d3-xplained/include/board.h b/configs/sama5d3-xplained/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..2358af2a0e42b4da46c8e7ac825fdc8e4b5de1a8 --- /dev/null +++ b/configs/sama5d3-xplained/include/board.h @@ -0,0 +1,341 @@ +/************************************************************************************ + * configs/sama5d3-xplained/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_H +#define __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + */ + +/* On-board crystal frequencies */ + +#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */ +#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */ + +#if defined(CONFIG_SAMA5_BOOT_SDRAM) +/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader. + * That bootloader had to have already configured the PLL and SDRAM for proper + * operation. + * + * In this case, we don not reconfigure the clocking. Rather, we need to query + * the register settings to determine the clock frequencies. We can only assume that + * the Main clock source is the on-board 12MHz crystal. + */ + +# include + +#elif defined(CONFIG_SAMA5D3XPLAINED_384MHZ) +/* OHCI Only. This is an alternative slower configuration that will produce a 48MHz + * USB clock with the required accuracy using only PLLA. When PPLA is used to clock + * OHCI, an additional requirement is the PLLACK be a multiple of 48MHz. This setup + * results in a CPU clock of 384MHz. + * + * This case is only interesting for experimentation. + */ + +# include + +#elif defined(CONFIG_SAMA5D3XPLAINED_528MHZ) +/* This is the configuration results in a CPU clock of 528MHz. + * + * In this configuration, UPLL is the source of the UHPHS clock (if enabled). + */ + +# include + +#else /* #elif defined(CONFIG_SAMA5D3XPLAINED_396MHZ) */ +/* This is the configuration provided in the Atmel example code. This setup results + * in a CPU clock of 396MHz. + * + * In this configuration, UPLL is the source of the UHPHS clock (if enabled). + */ + +# include + +#endif + +/* LED definitions ******************************************************************/ +/* There are two LEDs on the SAMA5D3 series-CM board that can be controlled + * by software. A blue LED is controlled via PIO pins. A red LED normally + * provides an indication that power is supplied to the board but can also + * be controlled via software. + * + * PE23. This blue LED is pulled high and is illuminated by pulling PE23 + * low. + * + * PE24. The red LED is also pulled high but is driven by a transistor so + * that it is illuminated when power is applied even if PE24 is not + * configured as an output. If PE24 is configured as an output, then the + * LCD is illuminated by a high output. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_BLUE 0 +#define BOARD_RED 1 +#define BOARD_NLEDS 2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_BLUE_BIT (1 << BOARD_BLUE) +#define BOARD_RED_BIT (1 << BOARD_RED) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL Val Meaning LED state + * Blue Red + * ----------------- --- ----------------------- -------- -------- */ +#define LED_STARTED 0 /* NuttX has been started OFF OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON OFF */ +#define LED_INIRQ 2 /* In an interrupt No change */ +#define LED_SIGNAL 2 /* In a signal handler No change */ +#define LED_ASSERTION 2 /* An assertion failed No change */ +#define LED_PANIC 3 /* The system has crashed OFF Blinking */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* Thus if the blue LED is statically on, NuttX has successfully booted and + * is, apparently, running normmally. If the red is flashing at + * approximately 2Hz, then a fatal error has been detected and the system + * has halted. + */ + +/* Button definitions ***************************************************************/ +/* The following push buttons switches are available: + * + * 1. One board reset button (BP2). When pressed and released, this push + * button causes a power-on reset of the whole board. + * + * 2. One wakeup pushbutton that brings the processor out of Low-power mode + * (BP1) + * + * 3. One user pushbutton (BP3) + * + * Only the user push button (BP3) is controllable by software: + * + * - PE29. Pressing the switch connect PE29 to ground. Therefore, PE29 + * must be pulled high internally. When the button is pressed the SAMA5 + * will sense "0" is on PE29. + */ + +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 + +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* NAND *****************************************************************************/ + +/* Address for transferring command bytes to the nandflash, CLE A22*/ + +#define BOARD_EBICS3_NAND_CMDADDR 0x60400000 + +/* Address for transferring address bytes to the nandflash, ALE A21*/ + +#define BOARD_EBICS3_NAND_ADDRADDR 0x60200000 + +/* Address for transferring data bytes to the nandflash.*/ + +#define BOARD_EBICS3_NAND_DATAADDR 0x60000000 + +/* PIO configuration ****************************************************************/ +/* PWM. There are no dedicated PWM output pins available to the user for PWM + * testing. Care must be taken because all PWM output pins conflict with some other + * usage of the pin by other devices. Furthermore, many of these pins have not been + * brought out to an external connector: + * + * -----+---+---+----+------+---------------- + * PWM PIN PER PIO I/O CONFLICTS + * -----+---+---+----+------+---------------- + * PWM0 FI B PC28 J2.30 SPI1, ISI + * H B PB0 --- GMAC + * B PA20 J1.14 LCDC, ISI + * L B PB1 --- GMAC + * B PA21 J1.16 LCDC, ISI + * -----+---+---+----+------+---------------- + * PWM1 FI B PC31 J2.36 HDMI + * H B PB4 --- GMAC + * B PA22 J1.18 LCDC, ISI + * L B PB5 --- GMAC + * B PE31 J3.20 ISI, HDMI + * B PA23 J1.20 LCDC, ISI + * -----+---+---+----+------+---------------- + * PWM2 FI B PC29 J2.29 UART0, ISI, HDMI + * H C PD5 --- HSMCI0 + * B PB8 --- GMAC + * L C PD6 --- HSMCI0 + * B PB9 --- GMAC + * -----+---+---+----+------+---------------- + * PWM3 FI C PD16 --- SPI0, Audio + * H C PD7 --- HSMCI0 + * B PB12 J3.7 GMAC + * L C PD8 --- HSMCI0 + * B PB13 --- GMAC + * -----+---+---+----+------+---------------- + */ + +/* PWM channel 0: + * + * PA20 and PA21 can be used if the LCDC or ISI are not selected. These outputs are + * available on J1, pins 14 and 16, respectively. + * + * If the GMAC is not selected, then PB0 and PB1 could also be used. However, + * these pins are not available at the I/O expansion connectors. + */ + +#if !defined(CONFIG_SAMA5_LCDC) && !defined(CONFIG_SAMA5_ISI) +# define PIO_PWM0_H PIO_PWM0_H_2 +# define PIO_PWM0_L PIO_PWM0_L_2 +#elif !defined(CONFIG_SAMA5_GMAC) +# define PIO_PWM0_H PIO_PWM0_H_1 +# define PIO_PWM0_L PIO_PWM0_L_1 +#endif + +/* PWM channel 1: + * + * PA22 and PA23 can be used if the LCDC or ISI are not selected. These outputs are + * available on J1, pins 18 and 20, respectively. + * + * PE31 can be used if the ISI is not selected (and the HDMI is not being used). + * That signal is available at J3 pin 20. + * + * If the GMAC is not selected, then PB4 and PB5 could also be used. However, + * these pins are not available at the I/O expansion connectors. + */ + +#if !defined(CONFIG_SAMA5_LCDC) && !defined(CONFIG_SAMA5_ISI) +# define PIO_PWM1_H PIO_PWM1_H_2 +#elif !defined(CONFIG_SAMA5_GMAC) +# define PIO_PWM1_H PIO_PWM1_H_1 +#endif + +#if !defined(CONFIG_SAMA5_LCDC) && !defined(CONFIG_SAMA5_ISI) +# define PIO_PWM1_L PIO_PWM1_L_3 +#elif !defined(CONFIG_SAMA5_ISI) +# define PIO_PWM1_L PIO_PWM1_L_2 +#elif !defined(CONFIG_SAMA5_GMAC) +# define PIO_PWM1_L PIO_PWM1_L_1 +#endif + +/* PWM channel 2: + * + * None of the output pin options are available at any of the I/O expansion + * connectors for PWM channel 2 + */ + +#if !defined(CONFIG_SAMA5_HSMCI0) +# define PIO_PWM2_H PIO_PWM2_H_1 +# define PIO_PWM2_L PIO_PWM2_L_1 +#elif !defined(CONFIG_SAMA5_GMAC) +# define PIO_PWM2_H PIO_PWM2_H_2 +# define PIO_PWM2_L PIO_PWM2_L_2 +#endif + +/* PWM channel 3: + * + * If the GMAC is not selected, then PB12 can used and is available at J3 pin 7. + * None of the other output pins are accessible at the I/O expansion connectors. + */ + +#if !defined(CONFIG_SAMA5_GMAC) +# define PIO_PWM3_H PIO_PWM3_H_2 +# define PIO_PWM3_L PIO_PWM3_L_2 +#elif !defined(CONFIG_SAMA5_HSMCI0) +# define PIO_PWM3_H PIO_PWM3_H_1 +# define PIO_PWM3_L PIO_PWM3_L_1 +#endif + +/************************************************************************************ + * Assembly Language Macros + ************************************************************************************/ + +#ifdef __ASSEMBLY__ + .macro config_sdram + .endm +#endif /* __ASSEMBLY__ */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAMA5 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_H */ diff --git a/configs/sama5d3-xplained/include/board_384mhz.h b/configs/sama5d3-xplained/include/board_384mhz.h new file mode 100644 index 0000000000000000000000000000000000000000..eaa3b7db40573de73bf1da8aedb752505bcd3546 --- /dev/null +++ b/configs/sama5d3-xplained/include/board_384mhz.h @@ -0,0 +1,224 @@ +/************************************************************************************ + * configs/sama5d3-xplained/include/board_384mhz.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_384MHZ_H +#define __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_384MHZ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + * + * This is an alternative slower configuration that will produce a 48MHz USB clock + * with the required accuracy. When used with OHCI, an additional requirement is + * the PLLACK be a multiple of 48MHz. This setup results in a CPU clock of 384MHz. + * + * MAINOSC: Frequency = 12MHz (crystal) + * PLLA: PLL Divider = 1, Multiplier = 64 to generate PLLACK = 768MHz + * Master Clock (MCK): Source = PLLACK/2, Prescalar = 1, MDIV = 3 to generate + * MCK = 128MHz + * CPU clock = 384MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Divider = 1 + * Multipler = 64 + */ + +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_OUT (0) +#define BOARD_CKGR_PLLAR_MUL (63 << PMC_CKGR_PLLAR_MUL_SHIFT) +#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS + +/* PMC master clock register settings. + * + * Master/Processor Clock Source Selection = PLLA + * Master/Processor Clock Prescaler = 1 + * PLLA Divider = 2 + * Master Clock Division (MDIV) = 3 + * + * NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3. + * + * Prescaler input = 768MHz / 2 = 384MHz + * Prescaler output = 384MHz / 1 = 384MHz + * Processor Clock (PCK) = 384MHz + * Master clock (MCK) = 396MHz / 3 = 128MHz + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 +#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV2 +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV3 + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* For OHCI Full-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in PMC_PCER + * register. + * 2) Select PLLACK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 3) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV value is calculated regarding the PLLACK + * value and USB Full-speed accuracy. + * 4) Enable the OHCI clocks, UHP bit in PMC_SCER register. + * + * "The USB Host controller requires 48 MHz and 12 MHz clocks for OHCI + * full-speed operations. These clocks must be generated by a PLL with a + * correct accuracy of ± 0.25% thanks to USBDIV field. + * + * "Thus the USB Host peripheral receives three clocks from the Power + * Management Controller (PMC): the Peripheral Clock (MCK domain), the + * UHP48M and the UHP12M (built-in UHP48M divided by four) used by the + * OHCI to interface with the bus USB signals (Recovered 12 MHz domain) + * in Full-speed operations" + * + * USB Clock = PLLACK / (USBDIV + 1) = 48MHz + * USBDIV = PLLACK / 48MHz - 1 + * = 15 + * + * The maximum value of USBDIV is 15 corresponding to a divisor of 16. + * REVISIT: However, using the divisor of (15+1) yields a frame rate + * of 500 frames per second. A divisor of (7+1) gives the correct 1MS + * frame rate. I cannot explain the factor of 2 difference. + */ + +# undef BOARD_USE_UPLL /* Use PLLA as source clock */ +# define BOARD_OHCI_INPUT PMC_USB_USBS_PLLA /* Input is PLLACK */ +# if 1 /* REVISIT */ +# define BOARD_OHCI_DIVIDER (7) /* Divided by 8 */ +# else +# define BOARD_OHCI_DIVIDER (15) /* Divided by 16 */ +# endif +#endif + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * + * Given: + * MCK = 128MHz + * ADCClock = 8MHz + * Then: + * PRESCAL = 7 + */ + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* Resulting frequencies */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */ +#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */ +#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */ +#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */ + +/* On some SAMA5's, the clocking to peripherals may be divided down from MCK, + * but not for the SAMA5D3. + */ + +#define BOARD_PIT_FREQUENCY BOARD_MCK_FREQUENCY +#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 128MHz, CLKDIV = 159, MCI_SPEED = 128MHz / (2*159 + 0 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (159 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 128MHz, CLKDIV = 2 w/CLOCKODD, MCI_SPEED = 128MHz /(2*2 + 1 + 2) = 18.3 MHz */ + +#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 128MHz, CLKDIV = 2, MCI_SPEED = 128MHz /(2*2 + 0 + 2) = 21.3 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + + #undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_384MHZ_H */ diff --git a/configs/sama5d3-xplained/include/board_396mhz.h b/configs/sama5d3-xplained/include/board_396mhz.h new file mode 100644 index 0000000000000000000000000000000000000000..638d3a5a23781fd551a2ae114f0e0019a657732a --- /dev/null +++ b/configs/sama5d3-xplained/include/board_396mhz.h @@ -0,0 +1,221 @@ +/************************************************************************************ + * configs/sama5d3-xplained/include/board_396mhz.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_396MHZ_H +#define __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_396MHZ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + * + * This is the configuration provided in the Atmel example code. This results in a + * CPU clock of 396MHz: + * + * MAINOSC: Frequency = 12MHz (crystal) + * PLLA: PLL Divider = 1, Multiplier = 66 to generate PLLACK = 792MHz + * Master Clock (MCK): Source = PLLACK/2, Prescalar = 1, MDIV = 3 to generate + * MCK = 132MHz + * CPU clock = 396MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Divider = 1 + * Multipler = 66 + */ + +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_OUT (0) +#define BOARD_CKGR_PLLAR_MUL (65 << PMC_CKGR_PLLAR_MUL_SHIFT) +#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS + +/* PMC master clock register settings. + * + * Master/Processor Clock Source Selection = PLLA + * Master/Processor Clock Prescaler = 1 + * PLLA Divider = 2 + * Master Clock Division (MDIV) = 3 + * + * NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3. + * + * Prescaler input = 792MHz / 2 = 396MHz + * Prescaler output = 396MHz / 1 = 396MHz + * Processor Clock (PCK) = 396MHz + * Master clock (MCK) = 396MHz / 3 = 132MHz + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 +#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV2 +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV3 + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * + * Given: + * MCK = 132MHz + * ADCClock = 8MHz + * Then: + * PRESCAL = 7.25 + * + * PRESCAL=7 and MCK=132MHz yields ADC clock of 8.25MHz + */ + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* Resulting frequencies */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */ +#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */ +#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */ +#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */ + +/* On some SAMA5's, the clocking to peripherals may be divided down from MCK, + * but not for the SAMA5D3. + */ + +#define BOARD_PIT_FREQUENCY BOARD_MCK_FREQUENCY +#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded + * High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL + * (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either + * the 12MHz internal RC oscillator on a an external 12MHz crystal. The + * Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier. + * + * For High-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in + * PMC_PCER register. + * 2) Write CKGR_PLLCOUNT field in PMC_UCKR register. + * 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register. + * 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register + * 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register. + * 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is + * selected. + * 8) Enable OHCI clocks, UHP bit in PMC_SCER register. + * + * Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI + * driver is initialized. + */ + +# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */ +# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */ +# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */ + +/* REVISIT: The divisor of 10 produces a rate that is too high. Division + * by 5, however, seems to work just fine. No idea why? + */ + +# define BOARD_UPLL_OHCI_DIV (5) /* Divide by 5 */ +#endif + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 132MHz, CLKDIV = 164, MCI_SPEED = 132MHz / (2*164 + 0 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (164 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 132MHz, CLKDIV = 2 w/CLOCKODD, MCI_SPEED = 132MHz /(2*2 + 1 + 2) = 18.9 MHz */ + +#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 132MHz, CLKDIV = 2, MCI_SPEED = 132MHz /(2*2 + 0 + 2) = 22 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_396MHZ_H */ diff --git a/configs/sama5d3-xplained/include/board_528mhz.h b/configs/sama5d3-xplained/include/board_528mhz.h new file mode 100644 index 0000000000000000000000000000000000000000..a0942aeedc7828173e22ab847fc7712014e41e99 --- /dev/null +++ b/configs/sama5d3-xplained/include/board_528mhz.h @@ -0,0 +1,220 @@ +/************************************************************************************ + * configs/sama5d3-xplained/include/board_528mhz.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_528MHZ_H +#define __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_528MHZ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + * + * This is the configuration results in a CPU clock of 528MHz: + * + * MAINOSC: Frequency = 12MHz (crystal) + * PLLA: PLL Divider = 1, Multiplier = 43+1 to generate PLLACK = 528MHz + * Master Clock (MCK): Source = PLLACK/1, Prescalar = 1, MDIV = 4 to generate + * MCK = 132MHz + * CPU clock = 528MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Divider = 1 + * Multipler = 43+1 + */ + +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_OUT (0) +#define BOARD_CKGR_PLLAR_MUL (43 << PMC_CKGR_PLLAR_MUL_SHIFT) +#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS + +/* PMC master clock register settings. + * + * Master/Processor Clock Source Selection = PLLA + * Master/Processor Clock Prescaler = 1 + * PLLA Divider = 1 + * Master Clock Division (MDIV) = 4 + * + * NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3. + * + * Prescaler input = 528MHz / 1 = 528MHz + * Prescaler output = 528MHz / 1 = 528MHz + * Processor Clock (PCK) = 528MHz + * Master clock (MCK) = 528MHz / 4 = 132MHz + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 +#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV1 +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV4 + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * + * Given: + * MCK = 132MHz + * ADCClock = 8MHz + * Then: + * PRESCAL = 7.25 + * + * PRESCAL=7 and MCK=132MHz yields ADC clock of 8.25MHz + */ + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* Resulting frequencies */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */ +#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */ +#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */ +#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */ + +/* On some SAMA5's, the clocking to peripherals may be divided down from MCK, + * but not for the SAMA5D3. + */ + +#define BOARD_PIT_FREQUENCY BOARD_MCK_FREQUENCY +#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded + * High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL + * (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either + * the 12MHz internal RC oscillator on a an external 12MHz crystal. The + * Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier. + * + * For High-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in + * PMC_PCER register. + * 2) Write CKGR_PLLCOUNT field in PMC_UCKR register. + * 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register. + * 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register + * 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register. + * 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is + * selected. + * 8) Enable OHCI clocks, UHP bit in PMC_SCER register. + * + * Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI + * driver is initialized. + */ + +# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */ +# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */ +# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */ + +/* REVISIT: The divisor of 10 produces a rate that is too high. Division + * by 5, however, seems to work just fine. No idea why? + */ + +# define BOARD_UPLL_OHCI_DIV (5) /* Divide by 5 */ +#endif + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 132MHz, CLKDIV = 164, MCI_SPEED = 132MHz / (2*164 + 0 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (164 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 132MHz, CLKDIV = 2 w/CLOCKODD, MCI_SPEED = 132MHz /(2*2 + 1 + 2) = 18.9 MHz */ + +#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 132MHz, CLKDIV = 2, MCI_SPEED = 132MHz /(2*2 + 0 + 2) = 22 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_528MHZ_H */ diff --git a/configs/sama5d3-xplained/include/board_memorymap.h b/configs/sama5d3-xplained/include/board_memorymap.h new file mode 100644 index 0000000000000000000000000000000000000000..bb39b72df83fa5159adcf3b59330ff75dcb410fd --- /dev/null +++ b/configs/sama5d3-xplained/include/board_memorymap.h @@ -0,0 +1,73 @@ +/************************************************************************************ + * configs/sama5d3-xplained/include/board_memorymap.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_MEMORYMAP_H +#define __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_MEMORYMAP_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_MEMORYMAP_H */ diff --git a/configs/sama5d3-xplained/include/board_sdram.h b/configs/sama5d3-xplained/include/board_sdram.h new file mode 100644 index 0000000000000000000000000000000000000000..d9ff2c5930d1673ecf9ae8e41d57208b9009f66e --- /dev/null +++ b/configs/sama5d3-xplained/include/board_sdram.h @@ -0,0 +1,180 @@ +/************************************************************************************ + * configs/sama5d3-xplained/include/board_sdram.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_SDRAM_H +#define __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_SDRAM_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include "sam_pmc.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. When + * booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader. That + * bootloader had to have already configured the PLL and SDRAM for proper operation. + * + * In this case, we do not reconfigure the clocking. Rather, we need to query + * the register settings to determine the clock frequencies. We can only assume that + * the Main clock source is the on-board 12MHz crystal. + */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY)) +#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY)) +#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY)) +#define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY)) + +/* On some SAMA5's, the clocking to peripherals may be divided down from MCK, + * but not for the SAMA5D3. + */ + +#define BOARD_PIT_FREQUENCY BOARD_MCK_FREQUENCY +#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded + * High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL + * (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either + * the 12MHz internal RC oscillator on a an external 12MHz crystal. The + * Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier. + * + * For High-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in + * PMC_PCER register. + * 2) Write CKGR_PLLCOUNT field in PMC_UCKR register. + * 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register. + * 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register + * 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register. + * 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is + * selected. + * 8) Enable OHCI clocks, UHP bit in PMC_SCER register. + * + * Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI + * driver is initialized. + */ + +# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */ +# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */ +# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */ + +/* REVISIT: The divisor of 10 produces a rate that is too high. Division + * by 5, however, seems to work just fine. No idea why? + */ + +# define BOARD_UPLL_OHCI_DIV (5) /* Divide by 5 */ +#endif + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * PRESCAL = (MCK / (2 * ADCClock) - 1) + */ + +#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */ +#define BOARD_ADCCLK_FREQUENCY \ + ((BOARD_PLLADIV2_FREQUENCY / (2 *BOARD_PLLADIV2_FREQUENCY)) - 1) + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * CLKFULLDIV = 2*CLKDIV + CLOCKODD; + * MCI_SPEED = MCK / (CLKFULLDIV + 2) + * CLKFULLDIV = MCK / MCI_SPEED - 2 + * + * CLKDIV = CLKFULLDIV >> 1 + * CLOCKODD = CLKFULLDIV & 1 + * + * Where CLKDIV has a range of 0-255. + */ + +/* Initial clock: 400 KHz (target) */ + +#define HSMCI_INIT_CLKDIV sam_hsmci_clkdiv(400000) + +/* MMC transfer clock: 20 MHz (target) */ + +#define HSMCI_MMCXFR_CLKDIV sam_hsmci_clkdiv(20000000) + +/* SD transfer clock: 25 MHz (target) */ + +#define HSMCI_SDXFR_CLKDIV sam_hsmci_clkdiv(25000000) + +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D3_XPLAINED_INCLUDE_BOARD_SDRAM_H */ diff --git a/configs/sama5d3-xplained/nsh/Make.defs b/configs/sama5d3-xplained/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e53e9803ae43a6ca664d4b04ad9bb3d158d14cee --- /dev/null +++ b/configs/sama5d3-xplained/nsh/Make.defs @@ -0,0 +1,141 @@ +############################################################################ +# configs/sama5d3-xplained/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) + LDSCRIPT = ddram.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d3-xplained/nsh/defconfig b/configs/sama5d3-xplained/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d24d9a19fab3fc1ea08431b9db30aedd99d23508 --- /dev/null +++ b/configs/sama5d3-xplained/nsh/defconfig @@ -0,0 +1,953 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +# CONFIG_ARMV7A_HAVE_L2CC is not set +# CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set + +# +# SAMA5 Configuration Options +# +# CONFIG_SAMA5_HAVE_AESB is not set +# CONFIG_SAMA5_HAVE_ICM is not set +# CONFIG_SAMA5_HAVE_RXLP is not set +CONFIG_SAMA5_HAVE_UART0=y +CONFIG_SAMA5_HAVE_UART1=y +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +# CONFIG_SAMA5_HAVE_USART4 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +CONFIG_SAMA5_HAVE_CAN0=y +CONFIG_SAMA5_HAVE_CAN1=y +CONFIG_SAMA5_HAVE_DMA=y +# CONFIG_SAMA5_HAVE_DDR32 is not set +# CONFIG_SAMA5_HAVE_XDMA is not set +CONFIG_SAMA5_HAVE_LCDC=y +CONFIG_SAMA5_HAVE_GMAC=y +CONFIG_SAMA5_HAVE_EMACA=y +# CONFIG_SAMA5_HAVE_EMACB is not set +# CONFIG_SAMA5_HAVE_EMAC1 is not set +CONFIG_SAMA5_HAVE_HSMCI2=y +CONFIG_SAMA5_HAVE_PIOE=y +# CONFIG_SAMA5_HAVE_SAIC is not set +# CONFIG_SAMA5_HAVE_SBM is not set +# CONFIG_SAMA5_HAVE_SFC is not set +# CONFIG_SAMA5_HAVE_SPI2 is not set +# CONFIG_SAMA5_HAVE_TC is not set +CONFIG_SAMA5_HAVE_TC1=y +# CONFIG_SAMA5_HAVE_TC2 is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +# CONFIG_SAMA5_HAVE_TWI3 is not set +# CONFIG_SAMA5_HAVE_VDEC is not set +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +CONFIG_ARCH_CHIP_SAMA5D3=y +# CONFIG_ARCH_CHIP_SAMA5D4 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D33 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +CONFIG_ARCH_CHIP_ATSAMA5D36=y +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D44 is not set + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +CONFIG_SAMA5_DBGU=y +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +# CONFIG_SAMA5_RTC is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_UART0 is not set +# CONFIG_SAMA5_UART1 is not set +# CONFIG_SAMA5_USART0 is not set +# CONFIG_SAMA5_USART1 is not set +# CONFIG_SAMA5_USART2 is not set +# CONFIG_SAMA5_USART3 is not set +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_HSMCI2 is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_TC1 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +# CONFIG_SAMA5_DMAC0 is not set +# CONFIG_SAMA5_DMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_GMAC is not set +# CONFIG_SAMA5_EMACA is not set +# CONFIG_SAMA5_EMACB is not set +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_CAN0 is not set +# CONFIG_SAMA5_CAN1 is not set +# CONFIG_SAMA5_SHA is not set +# CONFIG_SAMA5_TRNG is not set +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +# CONFIG_SAMA5_MPDDRC is not set +# CONFIG_SAMA5_PIO_IRQ is not set + +# +# DBGU Configuration +# +CONFIG_SAMA5_DBGU_CONSOLE=y +CONFIG_SAMA5_DBGU_RXBUFSIZE=256 +CONFIG_SAMA5_DBGU_TXBUFSIZE=256 +CONFIG_SAMA5_DBGU_NOCONFIG=y + +# +# External Memory Configuration +# +# CONFIG_SAMA5_EBICS0 is not set +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +CONFIG_SAMA5_BOOT_SDRAM=y + +# +# Heap Configuration +# +CONFIG_SAMA5_ISRAM_HEAP=y +# CONFIG_SAMA5_DDRCS_RESERVE is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=65775 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_VSTART=0x20000000 +CONFIG_RAM_SIZE=268435456 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D3_XPLAINED=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d3-xplained" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_SAMA5D3XPLAINED_384MHZ is not set +CONFIG_SAMA5D3XPLAINED_396MHZ=y +# CONFIG_SAMA5D3XPLAINED_528MHZ is not set +# CONFIG_SAMA5D3XPLAINED_SLOWCLOCK is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=31 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_ARCH_HAVE_OTHER_UART=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_OTHER_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d3-xplained/nsh/setenv.sh b/configs/sama5d3-xplained/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..99d755d8e5795962d46b11a4972c578f856ee700 --- /dev/null +++ b/configs/sama5d3-xplained/nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d3-xplained/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d3-xplained/scripts/ddram.ld b/configs/sama5d3-xplained/scripts/ddram.ld new file mode 100644 index 0000000000000000000000000000000000000000..edb3f63a49e0133dfa73a9851072d65567703d82 --- /dev/null +++ b/configs/sama5d3-xplained/scripts/ddram.ld @@ -0,0 +1,124 @@ +/**************************************************************************** + * configs/sama5d3-xplained/scripts/ddram.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMA5D3 has 128 KB of ISRAM beginning at virtual address 0x0030:0000. + * This memory configuration, however, loads into the 256MB SDRAM on board + * the SAMA5D3 Xplained which lies at 0x2000:0000. An offset 0x00008000 is + * reserved by the bootloader. + * + * Vectors in low memory are assumed and 16KB of ISRAM is reserved at the + * high end of ISRAM for the page table. + */ + +MEMORY +{ + isram (W!RX) : ORIGIN = 0x300000, LENGTH = 128K - 16K + sdram (W!RX) : ORIGIN = 0x20008000, LENGTH = 256M - 32K +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _etext = ABSOLUTE(.); + } > sdram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > sdram + + .ARM.extab : { + *(.ARM.extab*) + } > sdram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > sdram + PROVIDE_HIDDEN (__exidx_end = .); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sdram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sdram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d3-xplained/scripts/gnu-elf.ld b/configs/sama5d3-xplained/scripts/gnu-elf.ld new file mode 100644 index 0000000000000000000000000000000000000000..88c53fe05f0b57a75b3bfdc3589c9dc26eb6e65a --- /dev/null +++ b/configs/sama5d3-xplained/scripts/gnu-elf.ld @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/sama5d3-xplained/scripts/gnu-elf.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +SECTIONS +{ + .text 0x00000000 : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + *(.ctors) /* Old ABI: Unallocated */ + *(.init_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .dtors : + { + _sdtors = . ; + *(.dtors) /* Old ABI: Unallocated */ + *(.fini_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = . ; + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d3-xplained/scripts/isram.ld b/configs/sama5d3-xplained/scripts/isram.ld new file mode 100644 index 0000000000000000000000000000000000000000..dae430c30814f83f8155abc96ea247bd64c2c79a --- /dev/null +++ b/configs/sama5d3-xplained/scripts/isram.ld @@ -0,0 +1,120 @@ +/**************************************************************************** + * configs/sama5d3-xplained/scripts/isram.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMA5D36 has 128 KB of ISRAM beginning at virtual address 0x0030:0000. + * + * Vectors in low memory are assumed and 16KB of ISRAM is reserved at the + * high end of ISRAM for the page table. + */ + +MEMORY +{ + isram (W!RX) : ORIGIN = 0x300000, LENGTH = 128K - 16K +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _etext = ABSOLUTE(.); + } > isram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > isram + + .ARM.extab : { + *(.ARM.extab*) + } > isram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > isram + PROVIDE_HIDDEN (__exidx_end = .); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > isram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > isram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d3-xplained/src/Makefile b/configs/sama5d3-xplained/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..09ae19353f53e691e25e69352b598d5fa34e19b5 --- /dev/null +++ b/configs/sama5d3-xplained/src/Makefile @@ -0,0 +1,134 @@ +############################################################################ +# configs/sama5d3-xplained/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c + +ifeq ($(CONFIG_SAMA5_SPI0),y) +CSRCS += sam_spi.c +else +ifeq ($(CONFIG_SAMA5_SPI1),y) +CSRCS += sam_spi.c +endif +endif + +ifeq ($(CONFIG_SAMA5_DDRCS),y) +CSRCS += sam_sdram.c +endif + +ifeq ($(CONFIG_SAMA5_EBICS3_NAND),y) +CSRCS += sam_nandflash.c +endif + +ifeq ($(CONFIG_MTD_AT25),y) +ifeq ($(CONFIG_SAMA5_SPI0),y) +CSRCS += sam_at25.c +endif +endif + +ifeq ($(CONFIG_SAMA5_HSMCI0),y) +CSRCS += sam_hsmci.c +else +ifeq ($(CONFIG_SAMA5_HSMCI1),y) +CSRCS += sam_hsmci.c +endif +endif + +ifeq ($(CONFIG_SAMA5_UHPHS),y) +CSRCS += sam_usb.c +else +ifeq ($(CONFIG_SAMA5_UDPHS),y) +CSRCS += sam_usb.c +endif +endif + +ifeq ($(CONFIG_SAMA5_EMACA),y) +CSRCS += sam_ethernet.c +else +ifeq ($(CONFIG_SAMA5_GMAC),y) +CSRCS += sam_ethernet.c +endif +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += sam_appinit.c +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += sam_adc.c +ifeq ($(CONFIG_AJOYSTICK),y) +CSRCS += sam_ajoystick.c +endif +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += sam_pwm.c +endif + +ifeq ($(CONFIG_CAN),y) +CSRCS += sam_can.c +endif + +ifeq ($(CONFIG_AUDIO_I2SCHAR),y) +ifeq ($(CONFIG_SAMA5_SSC0),y) +CSRCS += sam_i2schar.c +else +ifeq ($(CONFIG_SAMA5_SSC1),y) +CSRCS += sam_i2schar.c +endif +endif +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += sam_usbmsc.c +endif + +ifeq ($(CONFIG_ARCH_FPU),y) +CSRCS += sam_ostest.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += sam_autoleds.c +else +CSRCS += sam_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += sam_buttons.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/sama5d3-xplained/src/sam_adc.c b/configs/sama5d3-xplained/src/sam_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..f770ba5d22bb1eeb9b2a61bc44c3b9cc735668ec --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_adc.c @@ -0,0 +1,131 @@ +/************************************************************************************ + * configs/sama5d3-xplained/src/sam_adc.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "sam_adc.h" +#include "sama5d3-xplained.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_initialize + * + * Description: + * Initialize and register the ADC driver + * + ************************************************************************************/ + +#ifdef CONFIG_SAMA5_ADC +int board_adc_initialize(void) +{ + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + + adc = sam_adc_initialize(); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} +#endif /* CONFIG_ADC */ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All SAMA5 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +#ifdef CONFIG_EXAMPLES_ADC +int board_adc_setup(void) +{ +#ifdef CONFIG_SAMA5_ADC + return board_adc_initialize(); +#else + return -ENOSYS; +#endif +} +#endif /* CONFIG_EXAMPLES_ADC */ diff --git a/configs/sama5d3-xplained/src/sam_ajoystick.c b/configs/sama5d3-xplained/src/sam_ajoystick.c new file mode 100644 index 0000000000000000000000000000000000000000..20c24c424efe51bf7df34fa3ed50ef051e1f3c3a --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_ajoystick.c @@ -0,0 +1,459 @@ +/**************************************************************************** + * configs/sama5d3-xplained/src/sam_ajoystick.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "sam_pio.h" +#include "sam_adc.h" +#include "chip/sam_adc.h" +#include "sama5d3-xplained.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Check for pre-requisites and pin conflicts */ + +#ifdef CONFIG_AJOYSTICK +# if !defined(CONFIG_ADC) +# error CONFIG_ADC is required for the Itead joystick +# undef CONFIG_AJOYSTICK +# elif !defined(CONFIG_SAMA5_ADC_CHAN0) || !defined(CONFIG_SAMA5_ADC_CHAN1) +# error CONFIG_SAMA5_ADC_CHAN0 and 1 are required for Itead joystick +# elif !defined(CONFIG_SAMA5_PIOC_IRQ) +# error CONFIG_SAMA5_PIOC_IRQ is required for the Itead joystick +# undef CONFIG_AJOYSTICK +# elif defined(CONFIG_SAMA5_EMACA) +# error EMAC conflicts with the Itead PIO usage +# undef CONFIG_AJOYSTICK +# elif defined(CONFIG_SAMA5_SSC0) +# error SSC0 conflicts with the Itead PIO usage +# undef CONFIG_AJOYSTICK +# elif defined(CONFIG_SAMA5_SPI1) +# warning SPI1 may conflict with the Itead PIO usage +# elif defined(CONFIG_SAMA5_ISI) +# warning ISI may conflict with the Itead PIO usage +# endif +#endif /* CONFIG_AJOYSTICK */ + +#ifdef CONFIG_AJOYSTICK + +/* Number of Joystick buttons */ + +#define AJOY_NGPIOS 7 + +/* Bitset of supported Joystick buttons */ + +#define AJOY_SUPPORTED (AJOY_BUTTON_1_BIT | AJOY_BUTTON_2_BIT | \ + AJOY_BUTTON_3_BIT | AJOY_BUTTON_4_BIT | \ + AJOY_BUTTON_5_BIT | AJOY_BUTTON_6_BIT | \ + AJOY_BUTTON_7_BIT ) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower); +static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower, + FAR struct ajoy_sample_s *sample); +static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower); +static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower, + ajoy_buttonset_t press, ajoy_buttonset_t release, + ajoy_handler_t handler, FAR void *arg); + +static void ajoy_disable(void); +static int ajoy_interrupt(int irq, FAR void *context); + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each Itead joystick button. Index using AJOY_* + * button definitions in include/nuttx/input/ajoystick.h. + */ + +static const pio_pinset_t g_joypio[AJOY_NGPIOS] = +{ + PIO_BUTTON_1, PIO_BUTTON_2, PIO_BUTTON_3, PIO_BUTTON_4, + PIO_BUTTON_5, PIO_BUTTON_6, PIO_BUTTON_6 +}; + +static const uint8_t g_joyirq[AJOY_NGPIOS] = +{ + IRQ_BUTTON_1, IRQ_BUTTON_2, IRQ_BUTTON_3, IRQ_BUTTON_4, + IRQ_BUTTON_5, IRQ_BUTTON_6, IRQ_BUTTON_6 +}; + +/* This is the button joystick lower half driver interface */ + +static const struct ajoy_lowerhalf_s g_ajoylower = +{ + .al_supported = ajoy_supported, + .al_sample = ajoy_sample, + .al_buttons = ajoy_buttons, + .al_enable = ajoy_enable, +}; + +/* Descriptor for the open ADC driver */ + +static int g_adcfd = -1; + +/* Current interrupt handler and argument */ + +static ajoy_handler_t g_ajoyhandler; +static FAR void *g_ajoyarg; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: ajoy_supported + * + * Description: + * Return the set of buttons supported on the button joystick device + * + ****************************************************************************/ + +static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s *lower) +{ + ivdbg("Supported: %02x\n", AJOY_SUPPORTED); + return (ajoy_buttonset_t)AJOY_SUPPORTED; +} + +/**************************************************************************** + * Name: ajoy_sample + * + * Description: + * Return the current state of all button joystick buttons + * + ****************************************************************************/ + +static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower, + FAR struct ajoy_sample_s *sample) +{ + struct adc_msg_s adcmsg[SAM_ADC_NCHANNELS]; + FAR struct adc_msg_s *ptr; + ssize_t nread; + ssize_t offset; + int have; + int i; + + /* Read all of the available samples (handling the case where additional + * channels are enabled). + */ + + nread = read(g_adcfd, adcmsg, SAM_ADC_NCHANNELS * sizeof(struct adc_msg_s)); + if (nread < 0) + { + int errcode = get_errno(); + if (errcode != EINTR) + { + idbg("ERROR: read failed: %d\n", errcode); + } + + return -errcode; + } + else if (nread < 2 * sizeof(struct adc_msg_s)) + { + idbg("ERROR: read too small: %ld\n", (long)nread); + return -EIO; + } + + /* Sample and the raw analog inputs */ + + for (i = 0, offset = 0, have = 0; + i < SAM_ADC_NCHANNELS && offset < nread && have != 3; + i++, offset += sizeof(struct adc_msg_s)) + { + ptr = &adcmsg[i]; + + /* Is this one of the channels that we need? */ + + if ((have & 1) == 0 && ptr->am_channel == 0) + { + int32_t tmp = ptr->am_data; + sample->as_x = (int16_t)tmp; + have |= 1; + + ivdbg("X sample: %ld -> %d\n", (long)tmp, (int)sample->as_x); + } + + if ((have & 2) == 0 && ptr->am_channel == 1) + { + int32_t tmp = ptr->am_data; + sample->as_y = (int16_t)tmp; + have |= 2; + + ivdbg("Y sample: %ld -> %d\n", (long)tmp, (int)sample->as_y); + } + } + + if (have != 3) + { + idbg("ERROR: Could not find joystack channels\n"); + return -EIO; + } + + + /* Sample the discrete button inputs */ + + sample->as_buttons = ajoy_buttons(lower); + ivdbg("Returning: %02x\n", AJOY_SUPPORTED); + return OK; +} + +/**************************************************************************** + * Name: ajoy_buttons + * + * Description: + * Return the current state of button data (only) + * + ****************************************************************************/ + +static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower) +{ + ajoy_buttonset_t ret = 0; + int i; + + /* Read each joystick GPIO value */ + + for (i = 0; i < AJOY_NGPIOS; i++) + { + /* Button outputs are pulled high. So a sensed low level means that the + * button is pressed. + */ + + if (!sam_pioread(g_joypio[i])) + { + ret |= (1 << i); + } + } + + ivdbg("Returning: %02x\n", ret); + return ret; +} + +/**************************************************************************** + * Name: ajoy_enable + * + * Description: + * Enable interrupts on the selected set of joystick buttons. And empty + * set will disable all interrupts. + * + ****************************************************************************/ + +static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower, + ajoy_buttonset_t press, ajoy_buttonset_t release, + ajoy_handler_t handler, FAR void *arg) +{ + irqstate_t flags; + ajoy_buttonset_t either = press | release; + ajoy_buttonset_t bit; + int i; + + /* Start with all interrupts disabled */ + + flags = enter_critical_section(); + ajoy_disable(); + + illvdbg("press: %02x release: %02x handler: %p arg: %p\n", + press, release, handler, arg); + + /* If no events are indicated or if no handler is provided, then this + * must really be a request to disable interrupts. + */ + + if (either && handler) + { + /* Save the new the handler and argument */ + + g_ajoyhandler = handler; + g_ajoyarg = arg; + + /* Check each GPIO. */ + + for (i = 0; i < AJOY_NGPIOS; i++) + { + /* Enable interrupts on each pin that has either a press or + * release event associated with it. + */ + + bit = (1 << i); + if ((either & bit) != 0) + { + /* REVISIT: It would be better if we reconfigured for + * the edges of interest so that we do not get spurious + * interrupts. + */ + + sam_pioirqenable(g_joyirq[i]); + } + } + } + + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: ajoy_disable + * + * Description: + * Disable all joystick interrupts + * + ****************************************************************************/ + +static void ajoy_disable(void) +{ + irqstate_t flags; + int i; + + /* Disable each joystick interrupt */ + + flags = enter_critical_section(); + for (i = 0; i < AJOY_NGPIOS; i++) + { + sam_pioirqdisable(g_joyirq[i]); + } + + leave_critical_section(flags); + + /* Nullify the handler and argument */ + + g_ajoyhandler = NULL; + g_ajoyarg = NULL; +} + +/**************************************************************************** + * Name: ajoy_interrupt + * + * Description: + * Discrete joystick interrupt handler + * + ****************************************************************************/ + +static int ajoy_interrupt(int irq, FAR void *context) +{ + DEBUGASSERT(g_ajoyhandler); + if (g_ajoyhandler) + { + g_ajoyhandler(&g_ajoylower, g_ajoyarg); + } + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_ajoy_initialization + * + * Description: + * Initialize and register the button joystick driver + * + ****************************************************************************/ + +int sam_ajoy_initialization(void) +{ + int ret; + int i; + + /* Initialize ADC. We will need this to read the ADC inputs */ + + ret = board_adc_initialize(); + if (ret < 0) + { + idbg("ERROR: board_adc_initialize() failed: %d\n", ret); + return ret; + } + + /* Open the ADC driver for reading */ + + g_adcfd = open("/dev/adc0", O_RDONLY); + if (g_adcfd < 0) + { + int errcode = get_errno(); + idbg("ERROR: Failed to open /dev/adc0: %d\n", errcode); + return -errcode; + } + + /* Configure the GPIO pins as interrupting inputs. */ + + for (i = 0; i < AJOY_NGPIOS; i++) + { + /* Configure the PIO as an input */ + + sam_configpio(g_joypio[i]); + + /* Configure PIO interrupts, attach the interrupt handler, but leave + * the interrupt disabled. + */ + + sam_pioirq(g_joypio[i]); + (void)irq_attach(g_joyirq[i], ajoy_interrupt); + sam_pioirqdisable(g_joyirq[i]); + } + + /* Register the joystick device as /dev/ajoy0 */ + + ret = ajoy_register("/dev/ajoy0", &g_ajoylower); + if (ret < 0) + { + idbg("ERROR: ajoy_register failed: %d\n", ret); + close(g_adcfd); + g_adcfd = -1; + } + + return ret; +} + +#endif /* CONFIG_AJOYSTICK */ diff --git a/configs/sama5d3-xplained/src/sam_appinit.c b/configs/sama5d3-xplained/src/sam_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..1215fea595039435a0a20ccf363732788e1ce1aa --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_appinit.c @@ -0,0 +1,178 @@ +/**************************************************************************** + * config/sama5d3-xplained/src/sam_appinit.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#include "sama5d3-xplained.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(HAVE_NAND) || defined(HAVE_AT25) || defined(HAVE_HSMCI) || \ + defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR) || \\ + defined(CONFIG_AJOYSTICK) || defined(CONFIG_FS_PROCFS) + int ret; +#endif + +#ifdef HAVE_NAND + /* Initialize the NAND driver */ + + ret = sam_nand_automount(NAND_MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_nand_automount failed: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_AT25 + /* Initialize the AT25 driver */ + + ret = sam_at25_automount(AT25_MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_at25_automount failed: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_HSMCI +#ifdef CONFIG_SAMA5_HSMCI0 + /* Initialize the HSMCI0 driver */ + + ret = sam_hsmci_initialize(HSMCI0_SLOTNO, HSMCI0_MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n", + HSMCI0_SLOTNO, HSMCI0_MINOR, ret); + return ret; + } +#endif + +#ifdef CONFIG_SAMA5_HSMCI1 + /* Initialize the HSMCI1 driver */ + + ret = sam_hsmci_initialize(HSMCI1_SLOTNO, HSMCI1_MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n", + HSMCI1_SLOTNO, HSMCI1_MINOR, ret); + return ret; + } +#endif +#endif + +#ifdef HAVE_USBHOST + /* Initialize USB host operation. sam_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + + ret = sam_usbhost_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret); + } +#endif + +#ifdef CONFIG_AJOYSTICK + /* Initialize and register the joystick driver */ + + ret = sam_ajoy_initialization(); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to register the joystick driver: %d\n", + ret); + return ret; + } +#endif + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = mount(NULL, SAMA5_PROCFS_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to mount procfs at %s: %d\n", + SAMA5_PROCFS_MOUNTPOINT, ret); + } +#endif + + return OK; +} diff --git a/configs/sama5d3-xplained/src/sam_at25.c b/configs/sama5d3-xplained/src/sam_at25.c new file mode 100644 index 0000000000000000000000000000000000000000..a6ef86fc06e90e9f9d45fe49a7fccabca58ddc05 --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_at25.c @@ -0,0 +1,140 @@ +/**************************************************************************** + * config/sama5d3-xplained/src/sam_at25.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "sam_spi.h" +#include "sama5d3-xplained.h" + +#ifdef HAVE_AT25 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_at25_automount + * + * Description: + * Initialize and configure the AT25 serial FLASH + * + ****************************************************************************/ + +int sam_at25_automount(int minor) +{ + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; + static bool initialized = false; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* No.. Get the SPI port driver */ + + spi = sam_spibus_initialize(AT25_PORT); + if (!spi) + { + fdbg("ERROR: Failed to initialize SPI port %d\n", AT25_PORT); + return -ENODEV; + } + + /* Now bind the SPI interface to the AT25 SPI FLASH driver */ + + mtd = at25_initialize(spi); + if (!mtd) + { + fdbg("ERROR: Failed to bind SPI port %d to the AT25 FLASH driver\n"); + return -ENODEV; + } + +#if defined(CONFIG_SAMA5D3XPLAINED_AT25_FTL) + /* And finally, use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(AT25_MINOR, mtd); + if (ret < 0) + { + fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + +#elif defined(CONFIG_SAMA5D3XPLAINED_AT25_NXFFS) + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", ret); + return ret; + } + + /* Mount the file system at /mnt/at25 */ + + ret = mount(NULL, "/mnt/at25", "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif + /* Now we are initializeed */ + + initialized = true; + } + + return OK; +} + +#endif /* HAVE_AT25 */ diff --git a/configs/sama5d3-xplained/src/sam_autoleds.c b/configs/sama5d3-xplained/src/sam_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..553cccc3706a3776993a8c37307666630f883d16 --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_autoleds.c @@ -0,0 +1,174 @@ +/**************************************************************************** + * configs/sama5d3-xplained/src/sam_autoleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are two LEDs on the SAMA5D3 series-CM board that can be controlled + * by software. A blue LED is controlled via PIO pins. A red LED normally + * provides an indication that power is supplied to the board but can also + * be controlled via software. + * + * PE25. This blue LED is pulled high and is illuminated by pulling PE25 + * low. + * + * PE24. The red LED is also pulled high but is driven by a transistor so + * that it is illuminated when power is applied even if PE24 is not + * configured as an output. If PE24 is configured as an output, then the + * LCD is illuminated by a low output. + * + * These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL Val Meaning LED state + * Blue Red + * ----------------- --- ----------------------- -------- -------- + * LED_STARTED 0 NuttX has been started OFF OFF + * LED_HEAPALLOCATE 0 Heap has been allocated OFF OFF + * LED_IRQSENABLED 0 Interrupts enabled OFF OFF + * LED_STACKCREATED 1 Idle stack created ON OFF + * LED_INIRQ 2 In an interrupt No change + * LED_SIGNAL 2 In a signal handler No change + * LED_ASSERTION 2 An assertion failed No change + * LED_PANIC 3 The system has crashed OFF Blinking + * LED_IDLE N/A MCU is is sleep mode Not used + * + * Thus if the blue LED is statically on, NuttX has successfully booted and + * is, apparently, running normally. If the red is flashing at + * approximately 2Hz, then a fatal error has been detected and the system + * has halted. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_pio.h" +#include "sama5d3-xplained.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED PIOs for output */ + + sam_configpio(PIO_BLUE); + sam_configpio(PIO_RED); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool blueoff = true; /* Low illuminates */ + bool redon = false; /* High illuminates */ + + switch (led) + { + case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED */ + break; + + case 1: /* LED_STACKCREATED */ + blueoff = false; + break; + + default: + case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ + return; + + case 3: /* LED_PANIC */ + redon = true; + break; + } + + sam_piowrite(PIO_BLUE, blueoff); + sam_piowrite(PIO_RED, redon); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led != 2) + { + sam_piowrite(PIO_BLUE, true); /* Low illuminates */ + sam_piowrite(PIO_RED, false); /* High illuminates */ + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/sama5d3-xplained/src/sam_boot.c b/configs/sama5d3-xplained/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..9a3c34c8256652dd92a1f4796720ace1bbbbd63b --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_boot.c @@ -0,0 +1,159 @@ +/************************************************************************************ + * configs/sama5d3-xplained/src/sam_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "sam_sckc.h" +#include "sama5d3-xplained.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAMA5 architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void) +{ +#ifdef CONFIG_SAMA5D3XPLAINED_SLOWCLOCK + /* Enable the external slow clock */ + + sam_sckc_enable(true); +#endif + + /* Configure SPI chip selects if 1) SPI is enable, and 2) the weak function + * sam_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1) + if (sam_spidev_initialize) + { + sam_spidev_initialize(); + } +#endif + +#if defined(CONFIG_SAMA5_DDRCS) && !defined(CONFIG_SAMA5_BOOT_SDRAM) + + /* Configure SDRAM if (1) SDRAM has been enalbled in the NuttX configuration and + * (2) if we are not currently running out of SDRAM. If we are now running out + * of SDRAM then we have to assume that some second level bootloader has properly + * configured SDRAM for our use. + */ + + sam_sdram_config(); + +#endif + + /* Initialize USB if the 1) the HS host or device controller is in the + * configuration and 2) the weak function sam_usbinitialize() has been brought + * into the build. Presumeably either CONFIG_USBDEV or CONFIG_USBHOST is also + * selected. + */ + +#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS) + if (sam_usbinitialize) + { + sam_usbinitialize(); + } +#endif + + /* Configure board resources to support networkingif the 1) networking is enabled, + * 2) the EMAC or GMAC module is enabled, and 2) the weak function + * sam_netinitialize() has been brought into the build. + */ + +#ifdef HAVE_NETWORK + if (sam_netinitialize) + { + sam_netinitialize(); + } +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + (void)board_app_initialize(); +#endif +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/sama5d3-xplained/src/sam_buttons.c b/configs/sama5d3-xplained/src/sam_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..50636737c4ea5795263a6e8c4e93b53470ae3cbd --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_buttons.c @@ -0,0 +1,187 @@ +/**************************************************************************** + * configs/sama5d3-xplained/src/sam_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are five push button switches on the SAMA5D3-Xplained base board: + * + * 1. One Reset, board reset (BP1) + * 2. One Wake up, push button to bring the processor out of low power mode + * (BP2) + * 3. One User momentary Push Button + * 4. One Disable CS Push Button + * + * Only the momentary push button is controllable by software (labeled + * "PB_USER1" on the board): + * + * - PE27. Pressing the switch connect PE27 to grounded. Therefore, PE27 + * must be pulled high internally. When the button is pressed the SAMA5 + * will sense "0" is on PE27. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "sam_pio.h" +#include "sama5d3-xplained.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_SAMA5_PIOE_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +static xcpt_t g_irquser1; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + (void)sam_configpio(PIO_USER); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return sam_pioread(PIO_USER) ? 0 : BUTTON_USER_BIT; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address is returned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_SAMA5_PIO_IRQ must be selected to enable the + * overall PIO IRQ feature and CONFIG_SAMA5_PIOE_IRQ must be enabled to + * select PIOs to support interrupts on PIOE. + * + ****************************************************************************/ + +#if defined(CONFIG_SAMA5_PIOE_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id == BUTTON_USER) + { + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = g_irquser1; + g_irquser1 = irqhandler; + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + /* Configure the interrupt */ + + sam_pioirq(PIO_USER); + (void)irq_attach(IRQ_USER1, irqhandler); + sam_pioirqenable(IRQ_USER1); + } + else + { + /* Disable and detach the interrupt */ + + sam_pioirqdisable(IRQ_USER1); + (void)irq_detach(IRQ_USER1); + } + /* Configure the interrupt */ + + leave_critical_section(flags); + } + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/sama5d3-xplained/src/sam_can.c b/configs/sama5d3-xplained/src/sam_can.c new file mode 100644 index 0000000000000000000000000000000000000000..9fc10f9d2b3a7aea5caed8176255c5689fb5bb94 --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_can.c @@ -0,0 +1,140 @@ +/************************************************************************************ + * configs/sama5d3-xplained/src/sam_can.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "sam_can.h" +#include "sama5d3-xplained.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_SAMA5_CAN0) || defined(CONFIG_SAMA5_CAN1)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#if defined(CONFIG_SAMA5_CAN0) && defined(CONFIG_SAMA5_CAN1) +# warning "Both CAN0 and CAN1 are enabled. Assuming only CAN0." +# undef CONFIG_SAMA5_CAN1 +#endif + +#ifdef CONFIG_SAMA5_CAN0 +# define CAN_PORT 0 +#else +# define CAN_PORT 1 +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = sam_caninitialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && (CONFIG_SAMA5_CAN0 || CONFIG_SAMA5_CAN1) */ diff --git a/configs/sama5d3-xplained/src/sam_ethernet.c b/configs/sama5d3-xplained/src/sam_ethernet.c new file mode 100644 index 0000000000000000000000000000000000000000..ed022800f1cdc5fe1726637152b2d76f80f69b0f --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_ethernet.c @@ -0,0 +1,360 @@ +/************************************************************************************ + * configs/sama5d3-xplained/src/sam_ethernet.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/* Force verbose debug on in this file only to support unit-level testing. */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# define CONFIG_DEBUG_VERBOSE 1 +# undef CONFIG_DEBUG_NET +# define CONFIG_DEBUG_NET 1 +#endif + +#include +#include +#include + +#include +#include + +#include "sam_pio.h" +#include "sam_ethernet.h" + +#include "sama5d3-xplained.h" + +#ifdef HAVE_NETWORK + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_SAMA5_EMACA +# undef CONFIG_SAMA5_EMAC_ISETH0 +#endif + +#ifdef CONFIG_SAMA5_EMAC_ISETH0 +# define SAMA5_EMAC_DEVNAME "eth0" +# define SAMA5_GMAC_DEVNAME "eth1" +#else +# define SAMA5_GMAC_DEVNAME "eth0" +# define SAMA5_EMAC_DEVNAME "eth1" +#endif + +/* Debug ********************************************************************/ +/* Extra, in-depth debug output that is only available if + * CONFIG_NETDEV_PHY_DEBUG us defined. + */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# define phydbg dbg +# define phylldbg lldbg +#else +# define phydbg(x...) +# define phylldbg(x...) +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_SAMA5_PIOE_IRQ +#ifdef CONFIG_SAMA5_EMACA +static xcpt_t g_emac_handler; +#endif +#ifdef CONFIG_SAMA5_GMAC +static xcpt_t g_gmac_handler; +#endif +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_emac_phy_enable and sam_gmac_enable + ************************************************************************************/ + +#ifdef CONFIG_SAMA5_PIOE_IRQ +#ifdef CONFIG_SAMA5_EMACA +static void sam_emac_phy_enable(bool enable) +{ + phydbg("IRQ%d: enable=%d\n", IRQ_INT_ETH1, enable); + if (enable) + { + sam_pioirqenable(IRQ_INT_ETH1); + } + else + { + sam_pioirqdisable(IRQ_INT_ETH1); + } +} + +#endif + +#ifdef CONFIG_SAMA5_GMAC +static void sam_gmac_phy_enable(bool enable) +{ + phydbg("IRQ%d: enable=%d\n", IRQ_INT_ETH0, enable); + if (enable) + { + sam_pioirqenable(IRQ_INT_ETH0); + } + else + { + sam_pioirqdisable(IRQ_INT_ETH0); + } +} +#endif +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +void weak_function sam_netinitialize(void) +{ +#ifdef CONFIG_SAMA5_EMACA + /* Ethernet 10/100 (EMAC A) Port + * + * The main board contains a MICREL PHY device (KSZ8051) operating at 10/100 Mbps. + * The board supports MII and RMII interface modes. + * + * The two independent PHY devices embedded on CM and MB boards are connected to + * independent RJ-45 connectors with built-in magnetic and status LEDs. + * + * At the De-Assertion of Reset: + * PHY ADD[2:0]:001 + * CONFIG[2:0]:001,Mode:RMII + * Duplex Mode:Half Duplex + * Isolate Mode:Disable + * Speed Mode:100Mbps + * Nway Auto-Negotiation:Enable + * + * The KSZ8051 PHY interrupt is available on PE30 INT_ETH1 + */ + + phydbg("Configuring %08x\n", PIO_INT_ETH1); + sam_configpio(PIO_INT_ETH1); +#endif + +#ifdef CONFIG_SAMA5_GMAC + /* Tri-Speed Ethernet PHY + * + * The SAMA5D3 series-CM board is equipped with a MICREL PHY devices (MICREL + * KSZ9021/31) operating at 10/100/1000 Mbps. The board supports RGMII interface + * mode. The Ethernet interface consists of 4 pairs of low voltage differential + * pair signals designated from GRX± and GTx± plus control signals for link + * activity indicators. These signals can be used to connect to a 10/100/1000 + * BaseT RJ45 connector integrated on the main board. + * + * The KSZ9021/31 interrupt is available on PB35 INT_GETH0 + */ + + phydbg("Configuring %08x\n", PIO_INT_ETH0); + sam_configpio(PIO_INT_ETH0); +#endif +} + +/**************************************************************************** + * Name: arch_phy_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a PHY interrupt occurs. This function both attaches + * the interrupt handler and enables the interrupt if 'handler' is non- + * NULL. If handler is NULL, then the interrupt is detached and disabled + * instead. + * + * The PHY interrupt is always disabled upon return. The caller must + * call back through the enable function point to control the state of + * the interrupt. + * + * This interrupt may or may not be available on a given platform depending + * on how the network hardware architecture is implemented. In a typical + * case, the PHY interrupt is provided to board-level logic as a GPIO + * interrupt (in which case this is a board-specific interface and really + * should be called board_phy_irq()); In other cases, the PHY interrupt + * may be cause by the chip's MAC logic (in which case arch_phy_irq()) is + * an appropriate name. Other other boards, there may be no PHY interrupts + * available at all. If client attachable PHY interrupts are available + * from the board or from the chip, then CONFIG_ARCH_PHY_INTERRUPT should + * be defined to indicate that fact. + * + * Typical usage: + * a. OS service logic (not application logic*) attaches to the PHY + * PHY interrupt and enables the PHY interrupt. + * b. When the PHY interrupt occurs: (1) the interrupt should be + * disabled and () work should be scheduled on the worker thread (or + * perhaps a dedicated application thread). + * c. That worker thread should use the SIOCGMIIPHY, SIOCGMIIREG, + * and SIOCSMIIREG ioctl calls** to communicate with the PHY, + * determine what network event took place (Link Up/Down?), and + * take the appropriate actions. + * d. It should then interact the the PHY to clear any pending + * interrupts, then re-enable the PHY interrupt. + * + * * This is an OS internal interface and should not be used from + * application space. Rather applications should use the SIOCMIISIG + * ioctl to receive a signal when a PHY event occurs. + * ** This interrupt is really of no use if the Ethernet MAC driver + * does not support these ioctl calls. + * + * Input Parameters: + * intf - Identifies the network interface. For example "eth0". Only + * useful on platforms that support multiple Ethernet interfaces + * and, hence, multiple PHYs and PHY interrupts. + * handler - The client interrupt handler to be invoked when the PHY + * asserts an interrupt. Must reside in OS space, but can + * signal tasks in user space. A value of NULL can be passed + * in order to detach and disable the PHY interrupt. + * enable - A function pointer that be unsed to enable or disable the + * PHY interrupt. + * + * Returned Value: + * The previous PHY interrupt handler address is returned. This allows you + * to temporarily replace an interrupt handler, then restore the original + * interrupt handler. NULL is returned if there is was not handler in + * place when the call was made. + * + ****************************************************************************/ + +#ifdef CONFIG_SAMA5_PIOE_IRQ +xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable) +{ + irqstate_t flags; + xcpt_t *phandler; + xcpt_t oldhandler; + pio_pinset_t pinset; + phy_enable_t enabler; + int irq; + + DEBUGASSERT(intf); + + nvdbg("%s: handler=%p\n", intf, handler); +#ifdef CONFIG_SAMA5_EMACA + phydbg("EMAC: devname=%s\n", SAMA5_EMAC_DEVNAME); +#endif +#ifdef CONFIG_SAMA5_GMAC + phydbg("GMAC: devname=%s\n", SAMA5_GMAC_DEVNAME); +#endif + +#ifdef CONFIG_SAMA5_EMACA + if (strcmp(intf, SAMA5_EMAC_DEVNAME) == 0) + { + phydbg("Select EMAC\n"); + phandler = &g_emac_handler; + pinset = PIO_INT_ETH1; + irq = IRQ_INT_ETH1; + enabler = sam_emac_phy_enable; + } + else +#endif +#ifdef CONFIG_SAMA5_GMAC + if (strcmp(intf, SAMA5_GMAC_DEVNAME) == 0) + { + phydbg("Select GMAC\n"); + phandler = &g_gmac_handler; + pinset = PIO_INT_ETH0; + irq = IRQ_INT_ETH0; + enabler = sam_gmac_phy_enable; + } + else +#endif + { + ndbg("Unsupported interface: %s\n", intf); + return NULL; + } + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old interrupt handler and save the new one */ + + oldhandler = *phandler; + *phandler = handler; + + /* Configure the interrupt */ + + if (handler) + { + phydbg("Configure pin: %08x\n", pinset); + sam_pioirq(pinset); + + phydbg("Attach IRQ%d\n", irq); + (void)irq_attach(irq, handler); + } + else + { + phydbg("Detach IRQ%d\n", irq); + (void)irq_detach(irq); + enabler = NULL; + } + + /* Return with the interrupt disabled in either case */ + + sam_pioirqdisable(irq); + + /* Return the enabling function pointer */ + + if (enable) + { + *enable = enabler; + } + + /* Return the old handler (so that it can be restored) */ + + leave_critical_section(flags); + return oldhandler; +} +#endif /* CONFIG_SAMA5_PIOE_IRQ */ + +#endif /* HAVE_NETWORK */ diff --git a/configs/sama5d3-xplained/src/sam_hsmci.c b/configs/sama5d3-xplained/src/sam_hsmci.c new file mode 100644 index 0000000000000000000000000000000000000000..4ba3e529d1bd5775d0bd5a4408647502d2b85b4e --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_hsmci.c @@ -0,0 +1,344 @@ +/**************************************************************************** + * config/sama5d3-xplained/src/sam_hsmci.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* The SAMA5D3-Xplained provides a two SD memory card slots: (1) a full size SD card + * slot (J10), and (2) a microSD memory card slot (J11). + * + * The full size SD card slot connects via HSMCI0. The card detect discrete + * is available on PB17 (pulled high). The write protect descrete is tied to + * ground (via PP6) and not available to software. The slot supports 8-bit + * wide transfer mode, but the NuttX driver currently uses only the 4-bit + * wide transfer mode + * + * PD17 MCI0_CD + * PD1 MCI0_DA0 + * PD2 MCI0_DA1 + * PD3 MCI0_DA2 + * PD4 MCI0_DA3 + * PD5 MCI0_DA4 + * PD6 MCI0_DA5 + * PD7 MCI0_DA6 + * PD8 MCI0_DA7 + * PD9 MCI0_CK + * PD0 MCI0_CDA + * + * The microSD connects vi HSMCI1. The card detect discrete is available on + * PB18 (pulled high): + * + * PD18 MCI1_CD + * PB20 MCI1_DA0 + * PB21 MCI1_DA1 + * PB22 MCI1_DA2 + * PB23 MCI1_DA3 + * PB24 MCI1_CK + * PB19 MCI1_CDA + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "sam_pio.h" +#include "sam_hsmci.h" + +#include "sama5d3-xplained.h" + +#ifdef HAVE_HSMCI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ +/* This structure holds static information unique to one HSMCI peripheral */ + +struct sam_hsmci_state_s +{ + struct sdio_dev_s *hsmci; /* R/W device handle */ + pio_pinset_t pincfg; /* Card detect PIO pin configuratin */ + uint8_t irq; /* Interrupt number (same as pid) */ + uint8_t slotno; /* Slot number */ + bool cd; /* TRUE: card is inserted */ + xcpt_t handler; /* Interrupt handler */ +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* HSCMI device state */ + +#ifdef CONFIG_SAMA5_HSMCI0 +static int sam_hsmci0_cardetect(int irq, void *regs); + +static struct sam_hsmci_state_s g_hsmci0 = +{ + .pincfg = PIO_MCI0_CD, + .irq = IRQ_MCI0_CD, + .slotno = 0, + .handler = sam_hsmci0_cardetect, +}; +#endif + +#ifdef CONFIG_SAMA5_HSMCI1 +static int sam_hsmci1_cardetect(int irq, void *regs); + +static struct sam_hsmci_state_s g_hsmci1 = +{ + .pincfg = PIO_MCI1_CD, + .irq = IRQ_MCI1_CD, + .slotno = 1, + .handler = sam_hsmci1_cardetect, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_cardinserted_internal + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_cardinserted_internal(struct sam_hsmci_state_s *state) +{ + bool inserted; + + /* Get the state of the PIO pin */ + + inserted = sam_pioread(state->pincfg); + fllvdbg("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES"); + return !inserted; +} + +/**************************************************************************** + * Name: sam_hsmci_cardetect, sam_hsmci0_cardetect, and sam_hsmci1_cardetect + * + * Description: + * Card detect interrupt handlers + * + ****************************************************************************/ + +static int sam_hsmci_cardetect(struct sam_hsmci_state_s *state) +{ + /* Get the current card insertion state */ + + bool cd = sam_cardinserted_internal(state); + + /* Has the card detect state changed? */ + + if (cd != state->cd) + { + /* Yes... remember that new state and inform the HSMCI driver */ + + state->cd = cd; + + /* Report the new state to the SDIO driver */ + + sdio_mediachange(state->hsmci, cd); + } + + return OK; +} + +#ifdef CONFIG_SAMA5_HSMCI0 +static int sam_hsmci0_cardetect(int irq, void *regs) +{ + return sam_hsmci_cardetect(&g_hsmci0); +} +#endif + +#ifdef CONFIG_SAMA5_HSMCI1 +static int sam_hsmci1_cardetect(int irq, void *regs) +{ + return sam_hsmci_cardetect(&g_hsmci1); +} +#endif + +/**************************************************************************** + * Name: sam_hsmci_state + * + * Description: + * Initialize HSMCI PIOs. + * + ****************************************************************************/ + +static struct sam_hsmci_state_s *sam_hsmci_state(int slotno) +{ + struct sam_hsmci_state_s *state = NULL; + +#ifdef CONFIG_SAMA5_HSMCI0 +#ifdef CONFIG_SAMA5_HSMCI1 + if (slotno == 0) +#endif + { + state = &g_hsmci0; + } +#ifdef CONFIG_SAMA5_HSMCI1 + else +#endif +#endif + +#ifdef CONFIG_SAMA5_HSMCI1 + { + state = &g_hsmci1; + } +#endif + + return state; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_hsmci_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int sam_hsmci_initialize(int slotno, int minor) +{ + struct sam_hsmci_state_s *state; + int ret; + + /* Get the static HSMI description */ + + state = sam_hsmci_state(slotno); + if (!state) + { + fdbg("No state for slotno %d\n", slotno); + return -EINVAL; + } + + /* Initialize card-detect and write-protect PIOs */ + + sam_configpio(state->pincfg); + + /* Mount the SDIO-based MMC/SD block driver */ + /* First, get an instance of the SDIO interface */ + + state->hsmci = sdio_initialize(slotno); + if (!state->hsmci) + { + fdbg("Failed to initialize SDIO slot %d\n", slotno); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(minor, state->hsmci); + if (ret != OK) + { + fdbg("Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + /* Configure card detect interrupts */ + + sam_pioirq(state->pincfg); + (void)irq_attach(state->irq, state->handler); + + /* Then inform the HSMCI driver if there is or is not a card in the slot. */ + + state->cd = sam_cardinserted_internal(state); + sdio_mediachange(state->hsmci, state->cd); + + /* Enable card detect interrupts */ + + sam_pioirqenable(state->irq); + return OK; +} + +/**************************************************************************** + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_cardinserted(int slotno) +{ + struct sam_hsmci_state_s *state; + + /* Get the HSMI description */ + + state = sam_hsmci_state(slotno); + if (!state) + { + fdbg("No state for slotno %d\n", slotno); + return false; + } + + /* Return the state of the PIO pin */ + + return sam_cardinserted_internal(state); +} + +/**************************************************************************** + * Name: sam_writeprotected + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_writeprotected(int slotno) +{ + /* There are no write protect pins */ + + return false; +} + +#endif /* HAVE_HSMCI */ diff --git a/configs/sama5d3-xplained/src/sam_i2schar.c b/configs/sama5d3-xplained/src/sam_i2schar.c new file mode 100644 index 0000000000000000000000000000000000000000..8842c1046f1c13f9b5ed7a1c5d364e6851d1c38b --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_i2schar.c @@ -0,0 +1,124 @@ +/************************************************************************************ + * configs/sama5d3-xplained/src/sam_i2schar.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_ssc.h" +#include "sama5d3-xplained.h" + +#if defined(CONFIG_AUDIO_I2SCHAR) && \ + (defined(CONFIG_SAMA5_SSC0) || defined(CONFIG_SAMA5_SSC1)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_SAMA5D3XPLAINED_SSC_PORT +# if defined(CONFIG_SAMA5_SSC0) +# define CONFIG_SAMA5D3XPLAINED_SSC_PORT 0 +# elif defined(CONFIG_SAMA5_SSC1) +# define CONFIG_SAMA5D3XPLAINED_SSC_PORT 1 +# endif +#endif + +#ifndef CONFIG_SAMA5D3XPLAINED_I2SCHAR_MINOR +# define CONFIG_SAMA5D3XPLAINED_I2SCHAR_MINOR 0 +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: i2schar_devinit + * + * Description: + * All architectures must provide the following interface in order to work with + * apps/examples/i2schar. + * + ************************************************************************************/ + +int i2schar_devinit(void) +{ + static bool initialized = false; + struct i2s_dev_s *i2s; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call sam_ssc_initialize() to get an instance of the SSC/I2S interface */ + + i2s = sam_ssc_initialize(CONFIG_SAMA5D3XPLAINED_SSC_PORT); + if (!i2s) + { + dbg("ERROR: Failed to get the SAMA5 SSC/I2S driver for SSC%d\n", + CONFIG_SAMA5D3XPLAINED_SSC_PORT); + return -ENODEV; + } + + /* Register the I2S character driver at "/dev/i2schar0" */ + + ret = i2schar_register(i2s, CONFIG_SAMA5D3XPLAINED_I2SCHAR_MINOR); + if (ret < 0) + { + adbg("ERROR: i2schar_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_AUDIO_I2SCHAR && (CONFIG_SAMA5_SSC0 || CONFIG_SAMA5_SSC1) */ diff --git a/configs/sama5d3-xplained/src/sam_nandflash.c b/configs/sama5d3-xplained/src/sam_nandflash.c new file mode 100644 index 0000000000000000000000000000000000000000..270b3624daa461a146aee3f3a286a4fe24452c20 --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_nandflash.c @@ -0,0 +1,231 @@ +/**************************************************************************** + * configs/sama5d3-xplained/src/sam_nandflash.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Most of this file derives from Atmel sample code for the SAMA5D3-Xplained + * board. That sample code has licensing that is compatible with the NuttX + * modified BSD license: + * + * Copyright (c) 2012, Atmel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor Atmel nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "sam_periphclks.h" +#include "sam_pio.h" +#include "sam_nand.h" +#include "chip/sam_hsmc.h" +#include "chip/sam_pinmap.h" + +#include "sama5d3-xplained.h" + +#ifdef CONFIG_SAMA5_EBICS3_NAND + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_nandflash_config + * + * Description: + * If CONFIG_SAMA5_EBICS3_NAND is defined, then NAND FLASH support is + * enabled. This function provides the board-specific implementation of + * the logic to reprogram the SMC to support NAND FLASH on the specified + * CS. + * + * Input Parameters: + * cs - Chip select number (in the event that multiple NAND devices + * are connected on-board). + * + * Returned Values: + * OK if the HSMC was successfully configured for this CS. A negated + * errno value is returned on a failure. This would fail with -ENODEV, + * for example, if the board does not support NAND FLASH on the requested + * CS. + * + ****************************************************************************/ + +int board_nandflash_config(int cs) +{ + uint32_t regval; + + /* The Embest and Ronetix CM boards and one Hynix NAND HY27UF(08/16)2G2B + * Series NAND (MT29F2G08ABAEAWP). This part has a capacity of 256Mx8bit + * () with spare 8Mx8 bit capacity. The device contains 2048 blocks, composed + * by 64 x 2112 byte pages. The effective size is approximately 256MiB. + * + * NAND is available on CS3. + */ + + if (cs == HSMC_CS3) + { + /* Make sure that the SMC peripheral is enabled. */ + + sam_hsmc_enableclk(); + + /* Configure the SMC */ + + regval = HSMC_SETUP_NWE_SETUP(1) | HSMC_SETUP_NCS_WRSETUP(1) | + HSMC_SETUP_NRD_SETUP(2) | HSMC_SETUP_NCS_RDSETUP(1); + putreg32(regval, SAM_HSMC_SETUP(HSMC_CS3)); + + regval = HSMC_PULSE_NWE_PULSE(5) | HSMC_PULSE_NCS_WRPULSE(7) | + HSMC_PULSE_NRD_PULSE(5) | HSMC_PULSE_NCS_RDPULSE(7); + putreg32(regval, SAM_HSMC_PULSE(HSMC_CS3)); + + regval = HSMC_CYCLE_NWE_CYCLE(8) | HSMC_CYCLE_NRD_CYCLE(9); + putreg32(regval, SAM_HSMC_CYCLE(HSMC_CS3)); + + regval = HSMC_TIMINGS_TCLR(3) | HSMC_TIMINGS_TADL(10) | + HSMC_TIMINGS_TAR(3) | HSMC_TIMINGS_TRR(4) | + HSMC_TIMINGS_TWB(5) | HSMC_TIMINGS_RBNSEL(3) | + HSMC_TIMINGS_NFSEL; + putreg32(regval, SAM_HSMC_TIMINGS(HSMC_CS3)); + + regval = HSMC_MODE_READMODE | HSMC_MODE_WRITEMODE | + HSMC_MODE_BIT_8 | HSMC_MODE_TDFCYCLES(1); + putreg32(regval, SAM_HSMC_MODE(HSMC_CS3)); + + /* Configure NAND PIO pins + * + * NAND Interface: + * + * NCS3/NANDCE - Dedicated pin; no configuration needed + * NANDCLE - PE21 + * NANDALE - PE22 + * NRD/NANDOE - Dedicated pin; no configuration needed + * NWE/NANDWE - Dedicated pin; no configuration needed + * NANDRDY - Dedicated pin; no configuration needed + * M_EBI_D0-7 - Dedicated pins; no configuration needed + */ + + sam_configpio(PIO_HSMC_NANDALE); + sam_configpio(PIO_HSMC_NANDCLE); + + return OK; + } + + return -ENODEV; +} + +/**************************************************************************** + * Name: sam_nand_automount + * + * Description: + * Initialize and configure the NAND on CS3 + * + ****************************************************************************/ + +#ifdef HAVE_NAND +int sam_nand_automount(int minor) +{ + FAR struct mtd_dev_s *mtd; + static bool initialized = false; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Create and initialize an NAND MATD device */ + + mtd = sam_nand_initialize(HSMC_CS3); + if (!mtd) + { + fdbg("ERROR: Failed to create the NAND driver on CS%d\n", HSMC_CS3); + return -ENODEV; + } + +#if defined(CONFIG_SAMA5D3XPLAINED_NAND_FTL) + /* Use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(NAND_MINOR, mtd); + if (ret < 0) + { + fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + +#elif defined(CONFIG_SAMA5D3XPLAINED_NAND_NXFFS) + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", ret); + return ret; + } + + /* Mount the file system at /mnt/nand */ + + ret = mount(NULL, "/mnt/nand", "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} +#endif + +#endif /* CONFIG_SAMA5_EBICS3_NAND */ diff --git a/configs/sama5d3-xplained/src/sam_ostest.c b/configs/sama5d3-xplained/src/sam_ostest.c new file mode 100644 index 0000000000000000000000000000000000000000..bce5794831132ae03c23abc337d7195548e238db --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_ostest.c @@ -0,0 +1,113 @@ +/************************************************************************************ + * configs/sama5d3-xplained/src/sam_ostest.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "sama5d3-xplained.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#undef HAVE_FPU +#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_EXAMPLES_OSTEST_FPUTESTDISABLE) && \ + defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && defined(CONFIG_SCHED_WAITPID) && \ + !defined(CONFIG_DISABLE_SIGNALS) +# define HAVE_FPU 1 +#endif + +#ifdef HAVE_FPU + +#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*FPU_CONTEXT_REGS) +# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size" +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static uint32_t g_saveregs[XCPTCONTEXT_REGS]; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ +/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return + * the current FPU registers. + */ + +void arch_getfpu(FAR uint32_t *fpusave) +{ + irqstate_t flags; + + /* Take a snapshot of the thread context right now */ + + flags = enter_critical_section(); + up_saveusercontext(g_saveregs); + + /* Return only the floating register values */ + + memcpy(fpusave, &g_saveregs[REG_S0], (4*FPU_CONTEXT_REGS)); + leave_critical_section(flags); +} + +/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function + * will compare them and return true if they are identical. + */ + +bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2) +{ + return memcmp(fpusave1, fpusave2, (4*FPU_CONTEXT_REGS)) == 0; +} + +#endif /* HAVE_FPU */ diff --git a/configs/sama5d3-xplained/src/sam_pwm.c b/configs/sama5d3-xplained/src/sam_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..59eca5189c7a621b2d39fd9910801ce7ebd9b891 --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_pwm.c @@ -0,0 +1,163 @@ +/************************************************************************************ + * configs/sama5d3-xplained/src/sam_pwm.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include + +#include "sam_pwm.h" +#include "sama5d3-xplained.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* PWM. There are no dedicated PWM output pins available to the user for PWM + * testing. Care must be taken because all PWM output pins conflict with some other + * usage of the pin by other devices: + * + * -----+---+---+----+-------------------- + * PWM PIN PER PIO CONFLICTS + * -----+---+---+----+-------------------- + * PWM0 FI B PC28 SPI1, ISI + * H B PB0 GMAC + * B PA20 LCDC, ISI + * L B PB1 GMAC + * B PA21 LCDC, ISI + * -----+---+---+----+-------------------- + * PWM1 FI B PC31 HDMI + * H B PB4 GMAC + * B PA22 LCDC, ISI + * L B PB5 GMAC + * B PE31 ISI, HDMI + * B PA23 LCDC, ISI + * -----+---+---+----+-------------------- + * PWM2 FI B PC29 UART0, ISI, HDMI + * H C PD5 HSMCI0 + * B PB8 GMAC + * L C PD6 HSMCI0 + * B PB9 GMAC + * -----+---+---+----+-------------------- + * PWM3 FI C PD16 SPI0, Audio + * H C PD7 HSMCI0 + * B PB12 GMAC + * L C PD8 HSMCI0 + * B PB13 GMAC + * -----+---+---+----+-------------------- + */ + +#ifndef CONFIG_SAMA5D3XPLAINED_CHANNEL +# if defined(CONFIG_SAMA5_PWM_CHAN0) +# warning Assuming PWM channel 0 +# define CONFIG_SAMA5D3XPLAINED_CHANNEL 0 +# elif defined(CONFIG_SAMA5_PWM_CHAN1) +# warning Assuming PWM channel 1 +# define CONFIG_SAMA5D3XPLAINED_CHANNEL 1 +# elif defined(CONFIG_SAMA5_PWM_CHAN2) +# warning Assuming PWM channel 2 +# define CONFIG_SAMA5D3XPLAINED_CHANNEL 2 +# elif defined(CONFIG_SAMA5_PWM_CHAN3) +# warning Assuming PWM channel 3 +# define CONFIG_SAMA5D3XPLAINED_CHANNEL 3 +# endif +#endif + +#if defined(CONFIG_PWM) && defined(CONFIG_SAMA5_PWM) + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All SAMA5 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call sam_pwminitialize() to get an instance of the PWM interface */ + + pwm = sam_pwminitialize(CONFIG_SAMA5D3XPLAINED_CHANNEL); + if (!pwm) + { + dbg("Failed to get the SAMA5 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/sama5d3-xplained/src/sam_sdram.c b/configs/sama5d3-xplained/src/sam_sdram.c new file mode 100644 index 0000000000000000000000000000000000000000..abd75d666419a7c8a60f1628e06312311568f86a --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_sdram.c @@ -0,0 +1,607 @@ +/**************************************************************************** + * configs/sama5d3-xplained/src/sam_sdram.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Most of this file derives from Atmel sample code for the SAMA5D3x-E + * board. That sample code has licensing that is compatible with the NuttX + * modified BSD license: + * + * Copyright (c) 2012, Atmel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor Atmel nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "up_arch.h" + +#include "sam_periphclks.h" +#include "chip/sam_memorymap.h" +#include "chip/sam_pmc.h" +#include "chip/sam_sfr.h" +#include "chip/sam_mpddrc.h" + +#include "sama5d3-xplained.h" + +/* This file requires: + * + * CONFIG_SAMA5_DDRCS -- DRAM support is enabled, and + * !CONFIG_SAMA5_BOOT_SDRAM - We did not boot into SRAM. + */ + +#if defined(CONFIG_SAMA5_DDRCS) && !defined(CONFIG_SAMA5_BOOT_SDRAM) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* SDRAM differences */ + +#if defined(CONFIG_SAMA5D3XPLAINED_MT47H128M16RT) + + /* Used for SDRAM command handshaking */ + +# define DDR2_BA0 (1 << 26) +# define DDR2_BA1 (1 << 27) + +#elif defined(CONFIG_SAMA5D3XPLAINED_MT47H64M16HR) + + /* Used for SDRAM command handshaking */ + +# define DDR2_BA0 (1 << 25) +# define DDR2_BA1 (1 << 26) + +#else +# error Unknown SDRAM type +#endif + +/* The delay loop in sam_sdram_delay requires 6 core cycles per iteration. + * + * At 384MHz: + * + * (6 cycles/iteration) / (0.384 cycles/nanosecond) = + * 15.6250 nanoseconds per iteration + * + * At 396MHz: + * + * (6 cycles/iteration) / (0.396 cycles/nanosecond) = + * 15.1515 nanoseconds per iteration + * + * At 528MHz: + * + * (6 cycles/iteration) / (0.528 cycles/nanosecond) = + * 11.3636 nanoseconds per iteration + */ + +#define LOOP_GUARD 100 +# define CYCLES_TO_COUNT(cycles) (((cycles) / 6) + LOOP_GUARD) + +#if defined(CONFIG_SAMA5D3XPLAINED_384MHZ) +# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 15625) + LOOP_GUARD) +# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 15625) + LOOP_GUARD) +#elif defined(CONFIG_SAMA5D3XPLAINED_528MHZ) +# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 11364) + LOOP_GUARD) +# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 11364) + LOOP_GUARD) +#else /* #elif defined(CONFIG_SAMA5D3XPLAINED_396MHZ) */ +# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 15152) + LOOP_GUARD) +# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 15152) + LOOP_GUARD) +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_sdram_delay + * + * Description: + * Precision delay function for SDRAM configuration. + * + * This delay loop requires 6 core cycles per iteration. The actual + * amount of time delayed will then vary with PCK. + * + ****************************************************************************/ + +static inline void sam_sdram_delay(unsigned int loops) +{ + volatile unsigned int i; + + for (i = 0; i < loops; i++) + { + asm("nop"); + } +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_sdram_config + * + * Description: + * Configures DDR2 (MT47H128M16RT 128MB or, optionally, MT47H64M16HR) + * + * Per the SAMA5D3-Xplained User guide: "Two DDR2/SDRAM (MT47H64M16HR) used as + * main system memory (256 MByte). The board includes 2 Gbits of on-board soldered + * DDR2 (double data rate) SDRAM. The footprints can also host two DDR2 + * (MT47H128M16RT) from Micron® for a total of 512 MBytes of DDR2 memory. The + * memory bus is 32 bits wide and operates with a frequency of up to 166 MHz." + * + * From the Atmel Code Example: + * MT47H64M16HR : 8 Meg x 16 x 8 banks + * Refresh count: 8K + * Row address: A[12:0] (8K) + * Column address A[9:0] (1K) + * Bank address BA[2:0] a(24,25) (8) + * + * This logic was taken from Atmel sample code for the SAMA5D3x-EK. + * + * Input Parameters: + * devtype - Either DDRAM_MT47H128M16RT or DDRAM_MT47H64M16HR + * + * Assumptions: + * The DDR memory regions is configured as strongly ordered memory. When + * we complete initialization of SDRAM and it is ready for use, we will + * make DRAM into normal memory. + * + ************************************************************************************/ + +void sam_sdram_config(void) +{ + volatile uint8_t *ddr = (uint8_t *)SAM_DDRCS_VSECTION; + uint32_t regval; + + /* Enable x2 clocking to the MPDDRC */ + + sam_mpddrc_enableclk(); + + /* Enable DDR clocking */ + + regval = getreg32(SAM_PMC_SCER); + regval |= PMC_DDRCK; + putreg32(regval, SAM_PMC_SCER); + + /* Clear the low power register */ + + putreg32(0, SAM_MPDDRC_LPR); + + /* Enable autofresh during calibration (undocumented) */ + + regval = getreg32(SAM_MPDDRC_HS); + regval |= MPDDRC_HS_AUTOREFRESH_CAL; + putreg32(regval, SAM_MPDDRC_HS); + + /* Force DDR_DQ and DDR_DQS input buffer always on */ + + regval = getreg32(SAM_SFR_DDRCFG); + regval |= SFR_FDQIEN | SFR_FDQSIEN; + putreg32(regval, SAM_SFR_DDRCFG); + + /* Configure the slave offset register */ + + regval = MPDDRC_DLL_SOR_S0OFF(1) | /* DLL Slave 0 Delay Line Offset */ + MPDDRC_DLL_SOR_S1OFF(0) | /* DLL Slave 1 Delay Line Offset */ + MPDDRC_DLL_SOR_S2OFF(1) | /* DLL Slave 2 Delay Line Offset */ + MPDDRC_DLL_SOR_S3OFF(1); /* DLL Slave 3 Delay Line Offset */ + putreg32(regval, SAM_MPDDRC_DLL_SOR); + + /* Configure the master offset register (including upper mystery bits) */ + + regval = MPDDRC_DLL_MOR_MOFF(7) | /* DLL Master Delay Line Offset */ + MPDDRC_DLL_MOR_CLK90OFF(31) | /* DLL CLK90 Delay Line Offset */ + MPDDRC_DLL_MOR_SELOFF | /* DLL Offset Selection */ + MPDDRC_DLL_MOR_KEY; /* Undocumented key */ + putreg32(regval, SAM_MPDDRC_DLL_MOR); + + /* Configure the I/O calibration register */ + + regval = getreg32(SAM_MPDDRC_IO_CALIBR); + regval &= ~(MPDDRC_IO_CALIBR_RDIV_MASK | MPDDRC_IO_CALIBR_TZQIO_MASK); + regval |= (MPDDRC_IO_CALIBR_RZQ48_40 | MPDDRC_IO_CALIBR_TZQIO(3)); + putreg32(regval, SAM_MPDDRC_IO_CALIBR); + + /* Force DDR_DQ and DDR_DQS input buffer always on */ + + putreg32(SFR_FDQIEN | SFR_FDQSIEN, SAM_SFR_DDRCFG); + + /* Step 1: Program the memory device type + * + * DBW = 0 (32-bit bus wide) + * Memory Device = DDR2-SDRAM + */ + + putreg32(MPDDRC_MD_DDR2_SDRAM, SAM_MPDDRC_MD); + + /* Step 2: Program the features of DDR2-SDRAM device into the Timing + * Register + */ + +#if defined(CONFIG_SAMA5D3XPLAINED_MT47H128M16RT) + + /* For MT47H128M16RT + * + * NC = 10 DDR column bits + * NR = 14 DDR row bits + * CAS = DDR2/LPDDR2 CAS Latency 4 + * DLL = Disable reset (0) + * DIC_DS = 0 + * DIS_DLL = Enable PLL (0) + * ZQ = Calibration command after initialization (0) + * OCD = OCD calibration mode exit, maintain setting (0) + * DQMS = Not shared (0) + * ENDRM = Disable read measure (0) + * NB = 8 banks + * NDQS = Not DQS disabled + * DECODE = Sequential decoding (0) + * UNAL = Unaliged access supported + */ + + regval = MPDDRC_CR_NC_10 | /* Number of Column Bits */ + MPDDRC_CR_NR_14 | /* Number of Row Bits */ + MPDDRC_CR_CAS_4 | /* CAS Latency */ + MPDDRC_CR_OCD_EXIT | /* Off-chip Driver */ + MPDDRC_CR_8BANKS | /* Number of Banks */ + MPDDRC_CR_NDQS | /* Not DQS */ + MPDDRC_CR_UNAL; /* upport Unaligned Access */ + +#elif defined(CONFIG_SAMA5D3XPLAINED_MT47H64M16HR) + /* For MT47H64M16HR + * + * NC = 10 DDR column bits + * NR = 13 DDR row bits + * CAS = DDR2/LPDDR2 CAS Latency 3 + * DLL = Disable reset (0) + * DIC_DS = 0 + * DIS_DLL = Enable PLL (0) + * ZQ = Calibration command after initialization (0) + * OCD = OCD calibration mode exit, maintain setting (0) + * DQMS = Not shared (0) + * ENDRM = Disable read measure (0) + * NB = 8 banks + * NDQS = Not DQS disabled + * DECODE = Sequential decoding (0) + * UNAL = Unaliged access supported + */ + + regval = MPDDRC_CR_NC_10 | /* Number of Column Bits */ + MPDDRC_CR_NR_13 | /* Number of Row Bits */ + MPDDRC_CR_CAS_3 | /* CAS Latency */ + MPDDRC_CR_OCD_EXIT | /* Off-chip Driver */ + MPDDRC_CR_8BANKS | /* Number of Banks */ + MPDDRC_CR_NDQS | /* Not DQS */ + MPDDRC_CR_UNAL; /* upport Unaligned Access */ + +#else +# error Unknwon SDRAM type +#endif + + putreg32(regval, SAM_MPDDRC_CR); + + /* Configure the Timing Parameter 0 Register */ + + regval = MPDDRC_TPR0_TRAS(6) | /* Active to Precharge Delay: 6 * 7.5 = 45 ns */ + MPDDRC_TPR0_TRCD(2) | /* Row to Column Delay: 2 * 7.5 = 15 ns */ + MPDDRC_TPR0_TWR(2) | /* Write Recovery Delay: 3 * 7.5 = 22.5 ns */ + MPDDRC_TPR0_TRC(8) | /* Row Cycle Delay: 8 * 7.5 = 60 ns */ + MPDDRC_TPR0_TRP(2) | /* Row Precharge Delay: 2 * 7.5 = 15 ns */ + MPDDRC_TPR0_TRRD(1) | /* Active BankA to Active BankB: 2 * 7.5 = 15 ns */ + MPDDRC_TPR0_TWTR(2) | /* Internal Write to Read Delay: 2 clock cycle */ + MPDDRC_TPR0_TMRD(2); /* Load Mode Register Command to + * Activate or Refresh Command: 2 clock cycles */ + putreg32(regval, SAM_MPDDRC_TPR0); + + /* Configure the Timing Parameter 1 Register */ + + regval = MPDDRC_TPR1_TRFC(14) | /* Row Cycle Delay: + * 18 * 7.5 = 135 ns (min 127.5 ns for 1Gb DDR) */ + MPDDRC_TPR1_TXSNR(16) | /* Exit Self Refresh Delay to Non Read Command: + * 20 * 7.5 > 142.5ns TXSNR: Exit self refresh + * delay to non read command */ + MPDDRC_TPR1_TXSRD(208) | /* Exit Self Refresh Delay to Read Command: + * min 200 clock cycles, TXSRD: Exit self refresh + * delay to Read command */ + MPDDRC_TPR1_TXP(2); /* Exit Power-down Delay to First Command: + * 2 * 7.5 = 15 ns */ + putreg32(regval, SAM_MPDDRC_TPR1); + + /* Configure the Timing Parameter 2 Register */ + + regval = MPDDRC_TPR2_TXARD(7) | /* Exit Active Power Down Delay to Read Command in Mode 'Fast Exit': + * min 2 clock cycles */ + MPDDRC_TPR2_TXARDS(7) | /* Exit Active Power Down Delay to Read Command in Mode 'Slow Exit': + * min 7 clock cycles */ + MPDDRC_TPR2_TRPA(2) | /* Row Precharge All Delay: + * min 18ns */ + MPDDRC_TPR2_TRTP(2) | /* Four Active Windows: + * 2 * 7.5 = 15 ns (min 7.5ns) */ + MPDDRC_TPR2_TFAW(10); + putreg32(regval, SAM_MPDDRC_TPR2); + + /* DDRSDRC Low-power Register */ + + sam_sdram_delay(USEC_TO_COUNT(200)); + + regval = MPDDRC_LPR_LPCB_DISABLED | /* Low-power Feature is inhibited */ + MPDDRC_LPR_TIMEOUT_0CLKS | /* Activates low-power mode after the end of transfer */ + MPDDRC_LPR_APDE_FAST; /* Active Power Down Exit Time */ + putreg32(regval, SAM_MPDDRC_LPR); + + /* Step 3: An NOP command is issued to the DDR2-SDRAM. Program the NOP + * command into the Mode Register, the application must set MODE to 1 in + * the Mode Register. + */ + + putreg32(MPDDRC_MR_MODE_NOP, SAM_MPDDRC_MR); + + /* Perform a write access to any DDR2-SDRAM address to acknowledge this + * command. + */ + + *ddr = 0; + + /* Now clocks which drive DDR2-SDRAM device are enabled. + * + * A minimum pause of 200 usec is provided to precede any signal toggle. + * (6 core cycles per iteration, core is at 396MHz: min 13200 loops) + */ + + sam_sdram_delay(USEC_TO_COUNT(200)); + + /* Step 4: An NOP command is issued to the DDR2-SDRAM */ + + putreg32(MPDDRC_MR_MODE_NOP, SAM_MPDDRC_MR); + + /* Perform a write access to any DDR2-SDRAM address to acknowledge this command.*/ + + *ddr = 0; + + /* Now CKE is driven high.*/ + /* Wait 400 ns min */ + + sam_sdram_delay(NSEC_TO_COUNT(400)); + + /* Step 5: An all banks precharge command is issued to the DDR2-SDRAM. */ + + putreg32(MPDDRC_MR_MODE_PRCGALL, SAM_MPDDRC_MR); + + /* Perform a write access to any DDR2-SDRAM address to acknowledge this command.*/ + + *ddr = 0; + + /* Wait 400 ns min */ + + sam_sdram_delay(NSEC_TO_COUNT(400)); + + /* Step 6: An Extended Mode Register set (EMRS2) cycle is issued to chose + * between commercialor high temperature operations. + * + * The write address must be chosen so that BA[1] is set to 1 and BA[0] is + * set to 0. + */ + + putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA1)) = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 7: An Extended Mode Register set (EMRS3) cycle is issued to set + * all registers to 0. + * + * The write address must be chosen so that BA[1] is set to 1 and BA[0] is + * set to 1. + */ + + putreg32(MPDDRC_MR_MODE_LMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA1 + DDR2_BA0)) = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 8: An Extended Mode Register set (EMRS1) cycle is issued to enable DLL. + * + * The write address must be chosen so that BA[1] is set to 0 and BA[0] is set to 1. + */ + + putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA0)) = 0; + + /* An additional 200 cycles of clock are required for locking DLL */ + + sam_sdram_delay(10000 /* CYCLES_TO_COUNT(200) */); + + /* Step 9: Program DLL field into the Configuration Register.*/ + + regval = getreg32(SAM_MPDDRC_CR); + regval |= MPDDRC_CR_DLL; + putreg32(regval, SAM_MPDDRC_CR); + + /* Step 10: A Mode Register set (MRS) cycle is issued to reset DLL. + * + * The write address must be chosen so that BA[1:0] bits are set to 0. + */ + + putreg32(MPDDRC_MR_MODE_LMR, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 11: An all banks precharge command is issued to the DDR2-SDRAM. + * + * Perform a write access to any DDR2-SDRAM address to acknowledge this + * command + */ + + putreg32(MPDDRC_MR_MODE_PRCGALL, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 12: Two auto-refresh (CBR) cycles are provided. Program the auto + * refresh command (CBR) into the Mode Register. + * + * Perform a write access to any DDR2-SDRAM address to acknowledge this + * command. + */ + + putreg32(MPDDRC_MR_MODE_RFSH, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Configure 2nd CBR. + * + * Perform a write access to any DDR2-SDRAM address to acknowledge this command. + */ + + putreg32(MPDDRC_MR_MODE_RFSH, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 13: Program DLL field into the Configuration Register to low + * (Disable DLL reset). + */ + + regval = getreg32(SAM_MPDDRC_CR); + regval &= ~MPDDRC_CR_DLL; + putreg32(regval, SAM_MPDDRC_CR); + + /* Step 14: A Mode Register set (MRS) cycle is issued to program the + * parameters of the DDR2-SDRAM devices. + * + * The write address must be chosen so that BA[1:0] are set to 0. + */ + + putreg32(MPDDRC_MR_MODE_LMR, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 15: Program OCD field into the Configuration Register to high (OCD + * calibration default). + */ + + regval = getreg32(SAM_MPDDRC_CR); + regval |= MPDDRC_CR_OCD_DEFAULT; + putreg32(regval, SAM_MPDDRC_CR); + + /* Step 16: An Extended Mode Register set (EMRS1) cycle is issued to OCD + * default value. + * + * The write address must be chosen so that BA[1] is set to 0 and BA[0] is + * set to 1. + */ + + putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA0)) = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 17: Program OCD field into the Configuration Register to low (OCD + * calibration mode exit). + */ + +#if 0 + regval = getreg32(SAM_MPDDRC_CR); + regval &= ~MPDDRC_CR_OCD_MASK; + putreg32(regval, SAM_MPDDRC_CR); +#endif + + /* Step 18: An Extended Mode Register set (EMRS1) cycle is issued to + * enable OCD exit. + * + * The write address must be chosen so that BA[1] is set to 0 and BA[0] is + * set to 1. + */ + + putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA0)) = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 19,20: A mode Normal command is provided. Program the Normal mode + * into Mode Register. + */ + + putreg32(MPDDRC_MR_MODE_NORMAL, SAM_MPDDRC_MR); + *ddr = 0; + + /* Step 21: Write the refresh rate into the count field in the Refresh + * Timer register. The DDR2-SDRAM device requires a refresh every 15.625 + * usec or 7.81 usec. + * + * With a 100MHz frequency, the refresh timer count register must to be + * set with (15.625 /100 MHz) = 1562 i.e. 0x061A or (7.81 /100MHz) = 781 + * i.e. 0x030d. + */ + + /* For MT47H64M16HR, The refresh period is 64ms (commercial), This equates + * to an average refresh rate of 7.8125usec (commercial), To ensure all + * rows of all banks are properly refreshed, 8192 REFRESH commands must be + * issued every 64ms (commercial) + */ + + /* ((64 x 10(^-3))/8192) x133 x (10^6) */ + /* Set Refresh timer 7.8125 us */ + + putreg32( MPDDRC_RTR_COUNT(300), SAM_MPDDRC_RTR); + + /* OK now we are ready to work on the DDRSDR */ + /* Wait for end of calibration */ + + sam_sdram_delay(500); +} + +#endif /* CONFIG_SAMA5_DDRCS && !CONFIG_SAMA5_BOOT_SDRAM */ diff --git a/configs/sama5d3-xplained/src/sam_spi.c b/configs/sama5d3-xplained/src/sam_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..24672d8c334c082568a02ac65df090bccd6274af --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_spi.c @@ -0,0 +1,216 @@ +/************************************************************************************ + * configs/sama5d3-xplained/src/sam_spi.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "sam_pio.h" +#include "sam_spi.h" +#include "sama5d3-xplained.h" + +#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select PIO pins for the SAMA5D3-Xplained board. + * + ************************************************************************************/ + +void weak_function sam_spidev_initialize(void) +{ +#ifdef CONFIG_SAMA5_SPI0 +#ifdef CONFIG_MTD_AT25 + /* The AT25 serial FLASH connects using NPCS0 */ + + sam_configpio(PIO_AT25_NPCS0); +#endif +#endif + +#ifdef CONFIG_SAMA5_SPI1 +#endif +} + +/**************************************************************************** + * Name: sam_spi[0|1]select, sam_spi[0|1]status, and sam_spi[0|1]cmddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * include: + * + * o sam_spi[0|1]select is a functions tomanage the board-specific chip selects + * o sam_spi[0|1]status and sam_spi[0|1]cmddata: Implementations of the status + * and cmddata methods of the SPI interface defined by struct spi_ops_ + * (see include/nuttx/spi/spi.h). All other methods including + * sam_spibus_initialize()) are provided by common SAM3/4 logic. + * + * To use this common SPI logic on your board: + * + * 1. Provide logic in sam_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide sam_spi[0|1]select() and sam_spi[0|1]status() functions in your board- + * specific logic. These functions will perform chip selection and + * status operations using PIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * sam_spi[0|1]cmddata() functions in your board-specific logic. This + * function will perform cmd/data selection operations using PIOs in + * the way your board is configured. + * 3. Add a call to sam_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by sam_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spi[0|1]select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * PIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the PIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SAMA5_SPI0 +void sam_spi0select(enum spi_dev_e devid, bool selected) +{ +#ifdef CONFIG_MTD_AT25 + /* The AT25 serial FLASH connects using NPCS0 */ + + if (devid == SPIDEV_FLASH) + { + sam_piowrite(PIO_AT25_NPCS0, !selected); + } +#endif +} +#endif + +#ifdef CONFIG_SAMA5_SPI1 +void sam_spi1select(enum spi_dev_e devid, bool selected) +{ +} +#endif + +/**************************************************************************** + * Name: sam_spi[0|1]status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef CONFIG_SAMA5_SPI0 +uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_SAMA5_SPI0 +uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#endif /* CONFIG_SAMA5_SPI0 || CONFIG_SAMA5_SPI1 */ diff --git a/configs/sama5d3-xplained/src/sam_usb.c b/configs/sama5d3-xplained/src/sam_usb.c new file mode 100644 index 0000000000000000000000000000000000000000..ac747277ffe444d1a36af04f27d4de94e637123c --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_usb.c @@ -0,0 +1,553 @@ +/************************************************************************************ + * configs/sama5d3-xplained/src/sam_usb.c + * + * Copyright (C) 2014-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "up_arch.h" +#include "sam_pio.h" +#include "sam_usbhost.h" +#include "chip/sam_ohci.h" +#include "sama5d3-xplained.h" + +#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_SAMA5D3XPLAINED_USBHOST_PRIO +# define CONFIG_SAMA5D3XPLAINED_USBHOST_PRIO 50 +#endif + +#ifndef CONFIG_SAMA5D3XPLAINED_USBHOST_STACKSIZE +# define CONFIG_SAMA5D3XPLAINED_USBHOST_STACKSIZE 1024 +#endif + +#ifdef HAVE_USBDEV +# undef CONFIG_SAMA5_UHPHS_RHPORT1 +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* Retained device driver handles */ + +#ifdef CONFIG_SAMA5_OHCI +static struct usbhost_connection_s *g_ohciconn; +#endif +#ifdef CONFIG_SAMA5_EHCI +static struct usbhost_connection_s *g_ehciconn; +#endif + +/* Overcurrent interrupt handler */ + +#if defined(HAVE_USBHOST) && defined(CONFIG_SAMA5_PIOD_IRQ) +static xcpt_t g_ochandler; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: usbhost_waiter + * + * Description: + * Wait for USB devices to be connected to either the OHCI or EHCI hub. + * + ************************************************************************************/ + +#if HAVE_USBHOST +#ifdef CONFIG_DEBUG_USB +static int usbhost_waiter(struct usbhost_connection_s *dev, const char *hcistr) +#else +static int usbhost_waiter(struct usbhost_connection_s *dev) +#endif +{ + struct usbhost_hubport_s *hport; + + uvdbg("Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(dev, &hport)); + uvdbg("%s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(dev, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/************************************************************************************ + * Name: ohci_waiter + * + * Description: + * Wait for USB devices to be connected to the OHCI hub. + * + ************************************************************************************/ + +#ifdef CONFIG_SAMA5_OHCI +static int ohci_waiter(int argc, char *argv[]) +{ +#ifdef CONFIG_DEBUG_USB + return usbhost_waiter(g_ohciconn, "OHCI"); +#else + return usbhost_waiter(g_ohciconn); +#endif +} +#endif + +/************************************************************************************ + * Name: ehci_waiter + * + * Description: + * Wait for USB devices to be connected to the EHCI hub. + * + ************************************************************************************/ + +#ifdef CONFIG_SAMA5_EHCI +static int ehci_waiter(int argc, char *argv[]) +{ +#ifdef CONFIG_DEBUG_USB + return usbhost_waiter(g_ehciconn, "EHCI"); +#else + return usbhost_waiter(g_ehciconn); +#endif +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_usbinitialize + * + * Description: + * Called from sam_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the SAMA5D3-Xplained board. + * + * USB Ports + * The SAMA5D3 series-MB features three USB communication ports: + * + * 1. Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed with + * USB Device High Speed Micro AB connector, J20 + * + * 2. Port B Host High Speed (EHCI) and Full Speed (OHCI) standard type A + * connector, J19 upper port + * + * 3. Port C Host Full Speed (OHCI) only standard type A connector, J19 + * lower port + * + * The two USB host ports (only) are equipped with 500-mA high-side power + * switch for self-powered and bus-powered applications. + * + * The USB device port A (J6) features a VBUS insert detection function. + * + * Port A + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PE9 VBUS_SENSE VBus detection + * + * Note: No VBus power switch enable on port A. I think that this limits + * this port to a device port or as a host port for self-powered devices + * only. + * + * Port B + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PE4 EN5V_USBB VBus power enable (via MN3 power switch). To the A1 + * pin of J19 Dual USB A connector + * + * Port C + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PE3 EN5V_USBC VBus power enable (via MN3 power switch). To the B1 + * pin of J19 Dual USB A connector + * + * Both Ports B and C + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PE5 OVCUR_USB Combined over-current indication from port A and B + * + * That offers a lot of flexibility. However, here we enable the ports only + * as follows: + * + * Port A -- USB device + * Port B -- EHCI host + * Port C -- OHCI host + * + ************************************************************************************/ + +void weak_function sam_usbinitialize(void) +{ +#ifdef HAVE_USBDEV + /* Configure Port A to support the USB device function */ + + sam_configpio(PIO_USBA_VBUS_SENSE); /* VBUS sense */ + + /* TODO: Configure an interrupt on VBUS sense */ +#endif + +#ifdef HAVE_USBHOST +#ifdef CONFIG_SAMA5_UHPHS_RHPORT1 + /* Configure Port A to support the USB OHCI/EHCI function */ + +#ifdef PIO_USBA_VBUS_ENABLE /* SAMA5D3-Xplained has no port A VBUS enable */ + sam_configpio(PIO_USBA_VBUS_ENABLE); /* VBUS enable, initially OFF */ +#endif +#endif + +#ifdef CONFIG_SAMA5_UHPHS_RHPORT2 + /* Configure Port B to support the USB OHCI/EHCI function */ + + sam_configpio(PIO_USBB_VBUS_ENABLE); /* VBUS enable, initially OFF */ +#endif + +#ifdef CONFIG_SAMA5_UHPHS_RHPORT3 + /* Configure Port C to support the USB OHCI/EHCI function */ + + sam_configpio(PIO_USBC_VBUS_ENABLE); /* VBUS enable, initially OFF */ +#endif + +#if defined(CONFIG_SAMA5_UHPHS_RHPORT2) || defined(CONFIG_SAMA5_UHPHS_RHPORT3) + /* Configure Port B/C VBUS overrcurrent detection */ + + sam_configpio(PIO_USBBC_VBUS_OVERCURRENT); /* VBUS overcurrent */ +#endif +#endif /* HAVE_USBHOST */ +} + +/*********************************************************************************** + * Name: sam_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +#if HAVE_USBHOST +int sam_usbhost_initialize(void) +{ + pid_t pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about + */ + +#ifdef CONFIG_USBHOST_HUB + /* Initialize USB hub class support */ + + ret = usbhost_hub_initialize(); + if (ret < 0) + { + udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_MSC + /* Register theUSB host Mass Storage Class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_HIDKBD + /* Register the USB host HID keyboard class driver */ + + ret = usbhost_kbdinit(); + if (ret != OK) + { + udbg("ERROR: Failed to register the KBD class\n"); + } +#endif + + /* Then get an instance of the USB host interface. */ + +#ifdef CONFIG_SAMA5_OHCI + /* Get an instance of the USB OHCI interface */ + + g_ohciconn = sam_ohci_initialize(0); + if (!g_ohciconn) + { + udbg("ERROR: sam_ohci_initialize failed\n"); + return -ENODEV; + } + + /* Start a thread to handle device connection. */ + + pid = task_create("OHCI Monitor", CONFIG_SAMA5D3XPLAINED_USBHOST_PRIO, + CONFIG_SAMA5D3XPLAINED_USBHOST_STACKSIZE, + (main_t)ohci_waiter, (FAR char * const *)NULL); + if (pid < 0) + { + udbg("ERROR: Failed to create ohci_waiter task: %d\n", ret); + return -ENODEV; + } +#endif + +#ifdef CONFIG_SAMA5_EHCI + /* Get an instance of the USB EHCI interface */ + + g_ehciconn = sam_ehci_initialize(0); + if (!g_ehciconn) + { + udbg("ERROR: sam_ehci_initialize failed\n"); + return -ENODEV; + } + + /* Start a thread to handle device connection. */ + + pid = task_create("EHCI Monitor", CONFIG_SAMA5D3XPLAINED_USBHOST_PRIO, + CONFIG_SAMA5D3XPLAINED_USBHOST_STACKSIZE, + (main_t)ehci_waiter, (FAR char * const *)NULL); + if (pid < 0) + { + udbg("ERROR: Failed to create ehci_waiter task: %d\n", ret); + return -ENODEV; + } +#endif + + return OK; +} +#endif + +/*********************************************************************************** + * Name: sam_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be provided by + * each platform that implements the OHCI or EHCI host interface + * + * Input Parameters: + * rhport - Selects root hub port to be powered host interface. See SAM_RHPORT_* + * definitions above. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ***********************************************************************************/ + +#if HAVE_USBHOST +void sam_usbhost_vbusdrive(int rhport, bool enable) +{ + pio_pinset_t pinset = 0; + + uvdbg("RHPort%d: enable=%d\n", rhport+1, enable); + + /* Pick the PIO configuration associated with the selected root hub port */ + + switch (rhport) + { + case SAM_RHPORT1: +#if !defined(CONFIG_SAMA5_UHPHS_RHPORT1) + udbg("ERROR: RHPort1 is not available in this configuration\n"); + return; + +#elif !defined(PIO_USBA_VBUS_ENABLE) + /* SAMA5D3-Xplained has no port A VBUS enable */ + + udbg("ERROR: RHPort1 has no VBUS enable\n"); + return; +#else + pinset = PIO_USBA_VBUS_ENABLE; + break; +#endif + + case SAM_RHPORT2: +#ifndef CONFIG_SAMA5_UHPHS_RHPORT2 + udbg("ERROR: RHPort2 is not available in this configuration\n"); + return; +#else + pinset = PIO_USBB_VBUS_ENABLE; + break; +#endif + + case SAM_RHPORT3: +#ifndef CONFIG_SAMA5_UHPHS_RHPORT3 + udbg("ERROR: RHPort3 is not available in this configuration\n"); + return; +#else + pinset = PIO_USBC_VBUS_ENABLE; + break; +#endif + + default: + udbg("ERROR: RHPort%d is not supported\n", rhport+1); + return; + } + + /* Then enable or disable VBUS power (active low for SP2526A-2) */ + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ + + sam_piowrite(pinset, false); + } + else + { + /* Disable the Power Switch by driving the enable pin high */ + + sam_piowrite(pinset, true); + } +} +#endif + +/************************************************************************************ + * Name: sam_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent condition is + * detected on port B or C. + * + * REVISIT: Since this is a common signal, we will need to come up with some way + * to inform both EHCI and OHCI drivers when this error occurs. + * + * Input Parameter: + * handler - New overcurrent interrupt handler + * + * Returned value: + * Old overcurrent interrupt handler + * + ************************************************************************************/ + +#if HAVE_USBHOST +xcpt_t sam_setup_overcurrent(xcpt_t handler) +{ +#if defined(CONFIG_SAMA5_PIOD_IRQ) && (defined(CONFIG_SAMA5_UHPHS_RHPORT2) || \ + defined(CONFIG_SAMA5_UHPHS_RHPORT3)) + + xcpt_t oldhandler; + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old interrupt handler and save the new one */ + + oldhandler = g_ochandler; + g_ochandler = handler; + + /* Configure the interrupt */ + + sam_pioirq(PIO_USBBC_VBUS_OVERCURRENT); + (void)irq_attach(IRQ_USBBC_VBUS_OVERCURRENT, handler); + sam_pioirqenable(IRQ_USBBC_VBUS_OVERCURRENT); + + /* Return the old handler (so that it can be restored) */ + + leave_critical_section(flags); + return oldhandler; + +#else + return NULL; + +#endif +} +#endif /* CONFIG_SAMA5_PIOD_IRQ ... */ + +/************************************************************************************ + * Name: sam_usbsuspend + * + * Description: + * Board logic must provide the sam_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} +#endif + +#endif /* CONFIG_SAMA5_UHPHS || CONFIG_SAMA5_UDPHS */ diff --git a/configs/sama5d3-xplained/src/sam_usbmsc.c b/configs/sama5d3-xplained/src/sam_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..2ec32c01a696551879b337fbe19d34fd6d99b891 --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_usbmsc.c @@ -0,0 +1,108 @@ +/**************************************************************************** + * configs/sama5d3-xplained/src/sam_usbmsc.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the SAM3U MMC/SD SDIO block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sama5d3-xplained.h" + +#ifdef CONFIG_USBMSC + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef HAVE_AT25 +# error AT25 Serial FLASH not supported +#endif + +#ifndef CONFIG_SAMA5D3XPLAINED_AT25_FTL +# error AT25 FTL support required (CONFIG_SAMA5D3XPLAINED_AT25_FTL) +# undef HAVE_AT25 +#endif + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +#if CONFIG_SYSTEM_USBMSC_DEVMINOR1 != AT25_MINOR +# error Confusion in the assignment of minor device numbers +# undef HAVE_AT25 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* Initialize the AT25 MTD driver */ + +#ifdef HAVE_AT25 + int ret = sam_at25_automount(AT25_MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_at25_automount failed: %d\n", ret); + } + + return ret; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_USBMSC */ diff --git a/configs/sama5d3-xplained/src/sam_userleds.c b/configs/sama5d3-xplained/src/sam_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..ae103f242c29d70cd283c9a6de159372443d03c5 --- /dev/null +++ b/configs/sama5d3-xplained/src/sam_userleds.c @@ -0,0 +1,146 @@ +/**************************************************************************** + * configs/sama5d3-xplained/src/sam_userleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are two LEDs on the SAMA5D3 series-CM board that can be controlled + * by software. A blue LED is controlled via PIO pins. A red LED normally + * provides an indication that power is supplied to the board but can also + * be controlled via software. + * + * PE25. This blue LED is pulled high and is illuminated by pulling PE25 + * low. + * + * PE24. The red LED is also pulled high but is driven by a transistor so + * that it is illuminated when power is applied even if PE24 is not + * configured as an output. If PE24 is configured as an output, then the + * LCD is illuminated by a low output. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_pio.h" +#include "sama5d3-xplained.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED PIOs for output */ + + sam_configpio(PIO_BLUE); + sam_configpio(PIO_RED); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint32_t ledcfg; + + if (led == BOARD_BLUE) + { + /* Low illuminates */ + + ledcfg = PIO_BLUE; + ledon = !ledon; + } + else if (led == BOARD_RED) + { + /* High illuminates */ + + ledcfg = PIO_RED; + } + else + { + return; + } + + sam_piowrite(ledcfg, ledon); +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + bool ledon; + + /* Low illuminates */ + + ledon = ((ledset & BOARD_BLUE_BIT) == 0); + sam_piowrite(PIO_BLUE, ledon); + + /* High illuminates */ + + ledon = ((ledset & BOARD_RED_BIT) != 0); + sam_piowrite(PIO_RED, ledon); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/sama5d3-xplained/src/sama5d3-xplained.h b/configs/sama5d3-xplained/src/sama5d3-xplained.h new file mode 100644 index 0000000000000000000000000000000000000000..9b4c56b93da01debb31165ce79e20b06b0ebad92 --- /dev/null +++ b/configs/sama5d3-xplained/src/sama5d3-xplained.h @@ -0,0 +1,767 @@ +/************************************************************************************ + * configs/sama5d3-xplained/src/sama5d3-xplained.h + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D3_XPLAINED_SRC_SAMA5D3_XPLAINED_H +#define __CONFIGS_SAMA5D3_XPLAINED_SRC_SAMA5D3_XPLAINED_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +#include +#include + +#include "chip/sam_pinmap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ************************************************************/ + +#define HAVE_HSMCI 1 +#define HAVE_AT25 1 +#define HAVE_NAND 1 +#define HAVE_USBHOST 1 +#define HAVE_USBDEV 1 +#define HAVE_USBMONITOR 1 +#define HAVE_NETWORK 1 + +/* HSMCI */ +/* Can't support MMC/SD if the card interface(s) are not enable */ + +#if !defined(CONFIG_SAMA5_HSMCI0) && !defined(CONFIG_SAMA5_HSMCI1) +# undef HAVE_HSMCI +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(HAVE_HSMCI) && defined(CONFIG_DISABLE_MOUNTPOINT) +# warning Mountpoints disabled. No MMC/SD support +# undef HAVE_HSMCI +#endif + +/* We need PIO interrupts on PIOD to support card detect interrupts */ + +#if defined(HAVE_HSMCI) && !defined(CONFIG_SAMA5_PIOD_IRQ) +# warning PIOD interrupts not enabled. No MMC/SD support. +# undef HAVE_HSMCI +#endif + +/* NAND FLASH */ +/* Can't support the NAND device if NAND flash is not configured on EBI CS3 */ + +#ifndef CONFIG_SAMA5_EBICS3_NAND +# undef HAVE_NAND +#endif + +/* Can't support NAND features if mountpoints are disabled or if we were not + * asked to mount the NAND part + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_SAMA5D3XPLAINED_NAND_BLOCKMOUNT) +# undef HAVE_NAND +#endif + +/* Can't support NAND if the MTD feature is not enabled */ + +#if !defined(CONFIG_MTD) || !defined(CONFIG_MTD_NAND) +# undef HAVE_NAND +#endif + +/* If we are going to mount the NAND, then they user must also have told + * us what to do with it by setting one of CONFIG_SAMA5D3XPLAINED_NAND_FTL or + * CONFIG_SAMA5D3XPLAINED_NAND_NXFFS. + */ + +#ifndef CONFIG_MTD +# undef CONFIG_SAMA5D3XPLAINED_NAND_NXFFS +# undef CONFIG_SAMA5D3XPLAINED_NAND_FTL +#endif + +#if !defined(CONFIG_FS_NXFFS) || !defined(CONFIG_NXFFS_NAND) +# undef CONFIG_SAMA5D3XPLAINED_NAND_NXFFS +#endif + +#if !defined(CONFIG_SAMA5D3XPLAINED_NAND_FTL) && !defined(CONFIG_SAMA5D3XPLAINED_NAND_NXFFS) +# undef HAVE_NAND +#endif + +#if defined(CONFIG_SAMA5D3XPLAINED_NAND_FTL) && defined(CONFIG_SAMA5D3XPLAINED_NAND_NXFFS) +# warning Both CONFIG_SAMA5D3XPLAINED_NAND_FTL and CONFIG_SAMA5D3XPLAINED_NAND_NXFFS are set +# warning Ignoring CONFIG_SAMA5D3XPLAINED_NAND_NXFFS +# undef CONFIG_SAMA5D3XPLAINED_NAND_NXFFS +#endif + +/* AT25 Serial FLASH */ +/* Can't support the AT25 device if it SPI0 or AT25 support are not enabled */ + +#if !defined(CONFIG_SAMA5_SPI0) || !defined(CONFIG_MTD_AT25) +# undef HAVE_AT25 +#endif + +/* Can't support AT25 features if mountpoints are disabled or if we were not + * asked to mount the AT25 part + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_SAMA5D3XPLAINED_AT25_AUTOMOUNT) +# undef HAVE_AT25 +#endif + +/* If we are going to mount the AT25, then they user must also have told + * us what to do with it by setting one of these. + */ + +#ifndef CONFIG_FS_NXFFS +# undef CONFIG_SAMA5D3XPLAINED_AT25_NXFFS +#endif + +#if !defined(CONFIG_SAMA5D3XPLAINED_AT25_FTL) && !defined(CONFIG_SAMA5D3XPLAINED_AT25_NXFFS) +# undef HAVE_AT25 +#endif + +#if defined(CONFIG_SAMA5D3XPLAINED_AT25_FTL) && defined(CONFIG_SAMA5D3XPLAINED_AT25_NXFFS) +# warning Both CONFIG_SAMA5D3XPLAINED_AT25_FTL and CONFIG_SAMA5D3XPLAINED_AT25_NXFFS are set +# warning Ignoring CONFIG_SAMA5D3XPLAINED_AT25_NXFFS +# undef CONFIG_SAMA5D3XPLAINED_AT25_NXFFS +#endif + +/* Assign minor device numbers. For example, if we also use MINOR number 0 + * for the AT25, it should appear as /dev/mtdblock0 + */ + +#define _NAND_MINOR 0 + +#ifdef HAVE_NAND +# define NAND_MINOR _NAND_MINOR +# define _AT25_MINOR (_NAND_MINOR+1) +#else +# define _AT25_MINOR _NAND_MINOR +#endif + +#ifdef HAVE_AT25 +# define AT25_MINOR _AT25_MINOR +#endif + +/* MMC/SD minor numbers: The NSH device minor extended is extended to support + * two devices. If CONFIG_NSH_MMCSDMINOR is zero, these will be: /dev/mmcsd0 + * and /dev/mmcsd1. + */ + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +#ifdef HAVE_HSMCI + +# define HSMCI0_SLOTNO 0 +# define HSMCI1_SLOTNO 1 + +# ifdef CONFIG_SAMA5_HSMCI0 +# define HSMCI0_MINOR CONFIG_NSH_MMCSDMINOR +# define HSMCI1_MINOR (CONFIG_NSH_MMCSDMINOR+1) +# else +# define HSMCI1_MINOR CONFIG_NSH_MMCSDMINOR +# endif +#else +#endif + +/* USB Host / USB Device */ +/* Either CONFIG_SAMA5_UHPHS or CONFIG_SAMA5_UDPHS must be defined, or there is + * no USB of any kind. + */ + +#if !defined(CONFIG_SAMA5_UHPHS) +# undef CONFIG_SAMA5_OHCI +# undef CONFIG_SAMA5_EHCI +#endif + +#if !defined(CONFIG_SAMA5_UDPHS) +# undef HAVE_USBDEV +#endif + +/* CONFIG_USBDEV and CONFIG_USBHOST must also be defined */ + +#if !defined(CONFIG_USBDEV) +# undef HAVE_USBDEV +#endif + +#if defined(CONFIG_USBHOST) +# if !defined(CONFIG_SAMA5_OHCI) && !defined(CONFIG_SAMA5_EHCI) +# warning CONFIG_USBHOST is defined, but neither CONFIG_SAMA5_OHCI nor CONFIG_SAMA5_EHCI are defined +# endif +#else +# undef CONFIG_SAMA5_OHCI +# undef CONFIG_SAMA5_EHCI +#endif + +#if !defined(CONFIG_SAMA5_OHCI) && !defined(CONFIG_SAMA5_EHCI) +# undef HAVE_USBHOST +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#ifndef CONFIG_SYSTEM_USBMONITOR +# undef HAVE_USBMONITOR +#endif + +#ifndef HAVE_USBDEV +# undef CONFIG_USBDEV_TRACE +#endif + +#ifndef HAVE_USBHOST +# undef CONFIG_USBHOST_TRACE +#endif + +#if !defined(CONFIG_USBDEV_TRACE) && !defined(CONFIG_USBHOST_TRACE) +# undef HAVE_USBMONITOR +#endif + +/* Networking */ + +#if !defined(CONFIG_NET) || (!defined(CONFIG_SAMA5_EMACA) && !defined(CONFIG_SAMA5_GMAC)) +# undef HAVE_NETWORK +#endif + +/* procfs File System */ + +#ifdef CONFIG_FS_PROCFS +# ifdef CONFIG_NSH_PROC_MOUNTPOINT +# define SAMA5_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT +# else +# define SAMA5_PROCFS_MOUNTPOINT "/proc" +# endif +#endif + +/* LEDs *****************************************************************************/ +/* There are two LEDs on the SAMA5D3 series-CM board that can be controlled + * by software. A blue LED is controlled via PIO pins. A red LED normally + * provides an indication that power is supplied to the board but can also + * be controlled via software. + * + * PE23. This blue LED is pulled high and is illuminated by pulling PE23 + * low. + * + * PE24. The red LED is also pulled high but is driven by a transistor so + * that it is illuminated when power is applied even if PE24 is not + * configured as an output. If PE24 is configured as an output, then the + * LCD is illuminated by a high output. + */ + +#define PIO_BLUE (PIO_OUTPUT | PIO_CFG_PULLUP | PIO_OUTPUT_SET | \ + PIO_PORT_PIOE | PIO_PIN23) +#define PIO_RED (PIO_OUTPUT | PIO_CFG_PULLUP | PIO_OUTPUT_CLEAR | \ + PIO_PORT_PIOE | PIO_PIN24) + +/* Buttons **************************************************************************/ +/* There are five push button switches on the SAMA5D3-Xplained base board: + * + * 1. One Reset, board reset (BP1) + * 2. One Wake up, push button to bring the processor out of low power mode + * (BP2) + * 3. One User momentary Push Button + * 4. One Disable CS Push Button + * + * Only the user push button is controllable by software (labeled + * "PB_USER1" on the board): + * + * - PE29. Pressing the switch connects PE29 to ground. Therefore, PE29 + * must be pulled high internally. When the button is pressed the SAMA5 + * will sense "0" is on PE29. + */ + +#define PIO_USER (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOE | PIO_PIN29) +#define IRQ_USER SAM_IRQ_PE29 + +/* HSMCI Card Slots *****************************************************************/ +/* The SAMA5D3-Xplained provides a two SD memory card slots: (1) a full size SD card + * slot (J10), and (2) a microSD memory card slot (J11). + * + * The full size SD card slot connects via HSMCI0. The card detect discrete + * is available on PD17 (pulled high). The write protect descrete is tied to + * ground (via PP6) and not available to software. The slot supports 8-bit + * wide transfer mode, but the NuttX driver currently uses only the 4-bit + * wide transfer mode + * + * PD17 MCI0_CD + * PD1 MCI0_DA0 + * PD2 MCI0_DA1 + * PD3 MCI0_DA2 + * PD4 MCI0_DA3 + * PD5 MCI0_DA4 + * PD6 MCI0_DA5 + * PD7 MCI0_DA6 + * PD8 MCI0_DA7 + * PD9 MCI0_CK + * PD0 MCI0_CDA + */ + +#define PIO_MCI0_CD (PIO_INPUT | PIO_CFG_DEFAULT | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOD | PIO_PIN17) +#define IRQ_MCI0_CD SAM_IRQ_PD17 + +/* The microSD connects vi HSMCI1. The card detect discrete is available on + * PBD8 (pulled high): + * + * PD18 MCI1_CD + * PB20 MCI1_DA0 + * PB21 MCI1_DA1 + * PB22 MCI1_DA2 + * PB23 MCI1_DA3 + * PB24 MCI1_CK + * PB19 MCI1_CDA + */ + +#define PIO_MCI1_CD (PIO_INPUT | PIO_CFG_DEFAULT | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOD | PIO_PIN18) +#define IRQ_MCI1_CD SAM_IRQ_PD18 + +/* USB Ports ************************************************************************/ +/* The SAMA5D3 series-MB features three USB communication ports: + * + * 1. Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed with + * USB Device High Speed Micro AB connector, J6 + * + * 2. Port B Host High Speed (EHCI) and Full Speed (OHCI) standard type A + * connector, J7 upper port + * + * 3. Port C Host Full Speed (OHCI) only standard type A connector, J7 + * lower port + * + * The two USB host ports (only) are equipped with 500-mA high-side power + * switch for self-powered and bus-powered applications. + * + * The USB device port A (J6) features a VBUS insert detection function. + * + * + * Port A + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PE9 VBUS_SENSE VBus detection + * + * Note: No VBus power switch enable on port A. I think that this limits + * this port to a device port or as a host port for self-powered devices + * only. + */ + +#define PIO_USBA_VBUS_SENSE \ + (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOE | PIO_PIN9) +#define IRQ_USBA_VBUS_SENSE \ + SAM_IRQ_PE9 + +/* Port B + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PE3 EN5V_USBB VBus power enable via MN3 SP2526A-2E dual power + * switch. PE3 (EN5V_USBB)connects to ENB pin of MN3. + * MN3 OUTB (5V_USBB) is provided to pin 5 of J7 Dual USB + * A connector + * + * Active high for SP2526A-1; active low for SP2526A-2 + */ + +#define PIO_USBB_VBUS_ENABLE \ + (PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_SET | \ + PIO_PORT_PIOE | PIO_PIN3) + +/* Port C + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PE4 EN5V_USBC VBus power enable via MN3 SP2526A-2E dual power + * switch. PE4 (EN5V_USBC) connects to ENA pin of the + * MN3. MN3 OUTA (5V_USBC) is provided to the pin 1 of J7 + * Dual USB A connector + * + * Active high for SP2526A-1; active low for SP2526A-2 + */ + +#define PIO_USBC_VBUS_ENABLE \ + (PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_SET | \ + PIO_PORT_PIOE | PIO_PIN4) + +/* Both Ports B and C + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PE5 OVCUR_USB Combined over-current indication from port A and B + */ + +#define PIO_USBBC_VBUS_OVERCURRENT \ + (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOE | PIO_PIN5) +#define IRQ_USBBC_VBUS_OVERCURRENT \ + SAM_IRQ_PE5 + +/* Ethernet */ + +#ifdef CONFIG_SAMA5_EMACA + /* ETH1: Ethernet 10/100 (EMAC A) Port + * + * The main board contains a MICREL PHY device (KSZ8051) operating at 10/100 Mbps. + * The board supports MII and RMII interface modes. + * + * The two independent PHY devices embedded on CM and MB boards are connected to + * independent RJ-45 connectors with built-in magnetic and status LEDs. + * + * At the De-Assertion of Reset: + * PHY ADD[2:0]:001 + * CONFIG[2:0]:001,Mode:RMII + * Duplex Mode:Half Duplex + * Isolate Mode:Disable + * Speed Mode:100Mbps + * Nway Auto-Negotiation:Enable + * + * The KSZ8051 PHY interrupt is available on PE30 INT_ETH1. The sense of + * the interrupt is configurable but is, by default, active low. + */ + +#define PIO_INT_ETH1 (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_FALLING | PIO_PORT_PIOE | PIO_PIN30) +#define IRQ_INT_ETH1 SAM_IRQ_PE30 + +#endif + +#ifdef CONFIG_SAMA5_GMAC + /* ETH0: Tri-Speed Ethernet PHY + * + * The SAMA5D3 series-CM board is equipped with a MICREL PHY devices (MICREL + * KSZ9021/31) operating at 10/100/1000 Mbps. The board supports RGMII interface + * mode. The Ethernet interface consists of 4 pairs of low voltage differential + * pair signals designated from GRX± and GTx± plus control signals for link + * activity indicators. These signals can be used to connect to a 10/100/1000 + * BaseT RJ45 connector integrated on the main board. + * + * The KSZ9021/31 interrupt is available on PB35 INT_GETH0. The sense of + * the interrupt is configurable but is, by default, active low. + */ + +#define PIO_INT_ETH0 (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_FALLING | PIO_PORT_PIOB | PIO_PIN25) +#define IRQ_INT_ETH0 SAM_IRQ_PB25 + +#endif + +/* SPI Chip Selects *****************************************************************/ +/* Both the Ronetix and Embest versions of the SAMAD3x CPU modules include an + * Atmel AT25DF321A, 32-megabit, 2.7-volt SPI serial flash. The SPI + * connection is as follows: + * + * AT25DF321A SAMA5 + * --------------- ----------------------------------------------- + * SI PD11 SPI0_MOSI + * SO PD10 SPI0_MIS0 + * SCK PD12 SPI0_SPCK + * /CS PD13 via NL17SZ126 if JP1 is closed (See below) + * + * JP1 and JP2 seem to related to /CS on the Ronetix board, but the usage is + * less clear. For the Embest module, JP1 must be closed to connect /CS to + * PD13; on the Ronetix schematic, JP11 seems only to bypass a resistor (may + * not be populated?). I think closing JP1 is correct in either case. + */ + +#define PIO_AT25_NPCS0 (PIO_OUTPUT | PIO_CFG_PULLUP | PIO_OUTPUT_SET | \ + PIO_PORT_PIOD | PIO_PIN13) +#define AT25_PORT SPI0_CS0 + +/* Itead Joystick Shield + * + * See http://imall.iteadstudio.com/im120417014.html for more information + * about this joystick. + * + * --------- ----------------- --------------------------------- + * ARDUINO ITEAD SAMA5D3 XPLAINED + * PIN NAME SIGNAL CONNECTOR SIGNAL + * --------- ----------------- ---------- ---------------------- + * D3 Button E Output J18 pin 4 PC8 + * D4 Button D Output J18 pin 5 PC28 + * D5 Button C Output J18 pin 6 PC7 + * D6 Button B Output J18 pin 7 PC6 + * D7 Button A Output J18 pin 8 PC5 + * D8 Button F Output J15 pin 1 PC4 + * D9 Button G Output J15 pin 2 PC3 + * A0 Joystick Y Output J17 pin 1 PC18 AD0 (function 4) + * A1 Joystick X Output J17 pin 2 PD21 AD1 (function 1) + * --------- ----------------- ---------- ---------------------- + * + * All buttons are pulled on the shield. A sensed low value indicates + * when the button is pressed. + */ + +#define ADC_XOUPUT 1 /* X output is on ADC channel 1 */ +#define ADC_YOUPUT 0 /* Y output is on ADC channel 0 */ + +#define PIO_BUTTON_A (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOC | PIO_PIN5) +#define IRQ_BUTTON_A SAM_IRQ_PC5 +#define PIO_BUTTON_B (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOC | PIO_PIN6) +#define IRQ_BUTTON_B SAM_IRQ_PC6 +#define PIO_BUTTON_C (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOC | PIO_PIN7) +#define IRQ_BUTTON_C SAM_IRQ_PC7 +#define PIO_BUTTON_D (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOC | PIO_PIN28) +#define IRQ_BUTTON_D SAM_IRQ_PC28 +#define PIO_BUTTON_E (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOC | PIO_PIN8) +#define IRQ_BUTTON_E SAM_IRQ_PC8 +#define PIO_BUTTON_F (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOC | PIO_PIN4) +#define IRQ_BUTTON_F SAM_IRQ_PC4 +#define PIO_BUTTON_G (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOC | PIO_PIN3) +#define IRQ_BUTTON_G SAM_IRQ_PC3 + +/* Itead Joystick Signal interpretation: + * + * --------- ----------------------- --------------------------- + * BUTTON TYPE NUTTX ALIAS + * --------- ----------------------- --------------------------- + * Button A Large button A JUMP/BUTTON 3 + * Button B Large button B FIRE/BUTTON 2 + * Button C Joystick select button SELECT/BUTTON 1 + * Button D Tiny Button D BUTTON 6 + * Button E Tiny Button E BUTTON 7 + * Button F Large Button F BUTTON 4 + * Button G Large Button G BUTTON 5 + * --------- ----------------------- --------------------------- + */ + +#define PIO_BUTTON_1 PIO_BUTTON_C +#define IRQ_BUTTON_1 IRQ_BUTTON_C +#define PIO_BUTTON_2 PIO_BUTTON_B +#define IRQ_BUTTON_2 IRQ_BUTTON_B +#define PIO_BUTTON_3 PIO_BUTTON_A +#define IRQ_BUTTON_3 IRQ_BUTTON_A +#define PIO_BUTTON_4 PIO_BUTTON_F +#define IRQ_BUTTON_4 IRQ_BUTTON_F +#define PIO_BUTTON_5 PIO_BUTTON_G +#define IRQ_BUTTON_5 IRQ_BUTTON_G +#define PIO_BUTTON_6 PIO_BUTTON_D +#define IRQ_BUTTON_6 IRQ_BUTTON_D +#define PIO_BUTTON_7 PIO_BUTTON_E +#define IRQ_BUTTON_7 IRQ_BUTTON_E + +#define PIO_SELECT PIO_BUTTON_1 +#define IRQ_SELECT IRQ_BUTTON_1 +#define PIO_FIRE PIO_BUTTON_2 +#define IRQ_FIRE IRQ_BUTTON_2 +#define PIO_JUMP PIO_BUTTON_3 +#define IRQ_JUMP IRQ_BUTTON_3 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select PIO pins for the SAMA5D3-Xplained board. + * + ************************************************************************************/ + +#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1) +void weak_function sam_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: sam_sdram_config + * + * Description: + * Configures DDR2 (MT47H128M16RT 128MB or, optionally, MT47H64M16HR) + * + * Per the SAMA5D3-Xplained User guide: "Two SDRAM/DDR2 used as main system memory. + * MT47H128M16 - 2 Gb - 16 Meg x 16 x 8 banks, the board provides up to 2 Gb on- + * board, soldered DDR2 SDRAM. The memory bus is 32 bits wide and operates with + * up to 166 MHz." + * + * From the Atmel Code Example: + * MT47H64M16HR : 8 Meg x 16 x 8 banks + * Refresh count: 8K + * Row address: A[12:0] (8K) + * Column address A[9:0] (1K) + * Bank address BA[2:0] a(24,25) (8) + * + * This logic was taken from Atmel sample code for the SAMA5D3-Xplained. + * + * Input Parameters: + * None + * + * Assumptions: + * The DDR memory regions is configured as strongly ordered memory. When we + * complete initialization of SDRAM and it is ready for use, we will make DRAM + * into normal memory. + * + ************************************************************************************/ + +#if defined(CONFIG_SAMA5_DDRCS) && !defined(CONFIG_SAMA5_BOOT_SDRAM) +void sam_sdram_config(void); +#else +# define sam_sdram_config() +#endif + +/**************************************************************************** + * Name: sam_nand_automount + * + * Description: + * Initialize and configure the NAND on CS3 + * + ****************************************************************************/ + +#ifdef HAVE_NAND +int sam_nand_automount(int minor); +#endif + +/**************************************************************************** + * Name: sam_at25_automount + * + * Description: + * Initialize and configure the AT25 serial FLASH + * + ****************************************************************************/ + +#ifdef HAVE_AT25 +int sam_at25_automount(int minor); +#endif + +/**************************************************************************** + * Name: sam_hsmci_initialize + * + * Description: + * Initialize and configure one HSMCI slot + * + ****************************************************************************/ + +#ifdef HAVE_HSMCI +int sam_hsmci_initialize(int slotno, int minor); +#endif + +/************************************************************************************ + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_cardinserted(int slotno); +#endif + +/************************************************************************************ + * Name: sam_writeprotected + * + * Description: + * Check if the card in the MMCSD slot is write protected + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_writeprotected(int slotno); +#endif + +/************************************************************************************ + * Name: sam_usbinitialize + * + * Description: + * Called from sam_usbinitialize very early in initialization to setup USB-related + * PIO pins for the SAMA5D3-Xplained board. + * + ************************************************************************************/ + +#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS) +void weak_function sam_usbinitialize(void); +#endif + +/**************************************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. This function will + * start a thread that will monitor for device connection/disconnection events. + * + ****************************************************************************************************/ + +#ifdef HAVE_USBHOST +int sam_usbhost_initialize(void); +#endif + +/************************************************************************************ + * Name: sam_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +#ifdef HAVE_NETWORK +void weak_function sam_netinitialize(void); +#endif + +/************************************************************************************ + * Name: board_adc_initialize + * + * Description: + * Initialize and register the ADC driver + * + ************************************************************************************/ + +#ifdef CONFIG_SAMA5_ADC +int board_adc_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D3_XPLAINED_SRC_SAMA5D3_XPLAINED_H */ + diff --git a/configs/sama5d3x-ek/Kconfig b/configs/sama5d3x-ek/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..a4ec696250742cb864f085a83a34ffd6118b5da4 --- /dev/null +++ b/configs/sama5d3x-ek/Kconfig @@ -0,0 +1,292 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAMA5D3X_EK + +choice + prompt "CPU Frequency" + default SAMA5D3xEK_396MHZ + +config SAMA5D3xEK_384MHZ + bool "384 MHz" + +config SAMA5D3xEK_396MHZ + bool "396 MHz" + +config SAMA5D3xEK_528MHZ + bool "528 MHz" + +endchoice # CPU Frequency + +choice + prompt "SAMA5D3x-EK DRAM Type" + default SAMA5D3xEK_MT47H128M16RT + depends on SAMA5_DDRCS + +config SAMA5D3xEK_MT47H128M16RT + bool "MT47H128M16RT" + ---help--- + Micron 2Gbit x16 DDR2-1066 128Mb + +config SAMA5D3xEK_MT47H64M16HR + bool "MT47H64M16HR" + ---help--- + Micron 1Gbit x16 DDR2-800 64Mb + +endchoice # SAMA5D3x-EK DRAM Type + +config SAMA5D3xEK_NOREDLED + bool "Red LED not available" + default n + ---help--- + By default, both the blue LED and the red LED are used by the + SAMA5D3x-EK board logic. However, the PIO associated with the red + LED (PE24) has other board functions. For example, PE24 is also the + ISI_RST reset signal to the camera interface. So when PE24 is not + available to control the red LED, this configuration variable should + be set so that the LED logic will only used the blue LED. + +config SAMA5D3xEK_NOR_MAIN + bool "Build nor_main" + default n + depends on SAMA5_BOOT_ISRAM + ---help--- + nor_main is a tiny program that runs in ISRAM. nor_main will enable + NOR flash then either (1) jump to the program in NOR flash or (2) + wait for you to break in with GDB to debug the NOR program. + +config SAMA5D3xEK_NOR_START + bool "Start NOR program" + default n + depends on SAMA5D3xEK_NOR_MAIN + ---help--- + The default behavior of the NOR boot program is to initialize the + NOR FLASH at CS0, then patiently wait for you to break into the + program with GDB. An alternative behavior is enabled with this + option: If SAMA5D3xEK_NOR_START is defined, then it will not wait but + will, instead, immediately start the program in NOR FLASH. + +config SAMA5D3XEK_NAND_BLOCKMOUNT + bool "NAND FLASH auto-mount" + default n + depends on NSH_ARCHINIT && SAMA5_EBICS3_NAND + ---help--- + Automatically initialize the NAND FLASH driver when NSH starts. + +choice + prompt "NAND FLASH configuration" + default SAMA5D3xEK_NAND_NXFFS + depends on SAMA5D3XEK_NAND_BLOCKMOUNT + +config SAMA5D3xEK_NAND_FTL + bool "Create NAND FLASH block driver" + depends on MTD && MTD_NAND + ---help--- + Create the MTD driver for the NAND and "wrap" the NAND as a standard + block driver that could then, for example, be mounted using FAT or + any other file system. Any file system may be used, but there will + be no wear-leveling. + + NOTE: This options is not currently recommended. There is not now + NuttX file system that can handle the NAND back blocks or performs + wear-leveling other than NXFFS and NXFFS does not use a block driver + but, rather, operates directly upon the NAND MTD device. + +config SAMA5D3xEK_NAND_NXFFS + bool "Create NAND FLASH NXFFS file system" + depends on MTD && MTD_NAND && FS_NXFFS && NXFFS_NAND + ---help--- + Create the MTD driver for the NAND and mount the NAND device as + a wear-leveling, NuttX FLASH file system (NXFFS). The downside of + NXFFS is that it can be very slow. + + NOTE: NXFFS is recommended because (1) it can handle the NAND back + blocks and (1) performs wear-leveling. + +endchoice # NAND FLASH configuration + +config SAMA5D3xEK_AT25_BLOCKMOUNT + bool "AT25 serial FLASH auto-mount" + default n + depends on NSH_ARCHINIT && SAMA5_SPI0 && MTD_AT25 + ---help--- + Automatically initialize the AT25 SPI FLASH driver when NSH starts. + +choice + prompt "AT25 serial FLASH configuration" + default SAMA5D3xEK_AT25_FTL + depends on SAMA5D3xEK_AT25_BLOCKMOUNT + +config SAMA5D3xEK_AT25_FTL + bool "Create AT25 Serial FLASH block driver" + ---help--- + Create the MTD driver for the AT25 and "wrap" the AT25 as a standard + block driver that could then, for example, be mounted using FAT or + any other file system. Any file system may be used, but there will + be no wear-leveling. + +config SAMA5D3xEK_AT25_NXFFS + bool "Create AT25 serial FLASH NXFFS file system" + depends on FS_NXFFS + ---help--- + Create the MTD driver for the AT25 and mount the AT25 device as + a wear-leveling, NuttX FLASH file system (NXFFS). The downside of + NXFFS is that it can be very slow. + +endchoice # AT25 serial FLASH configuration + +config SAMA5D3xEK_AT24_BLOCKMOUNT + bool "AT24 Serial EEPROM auto-mount" + default n + depends on NSH_ARCHINIT && SAMA5_TWI0 && MTD_AT24XX + ---help--- + Automatically initialize the AT24 SPI EEPROM driver when NSH starts. + + The Serial EEPROM was mounted on an external adaptor board and + connected to the SAMA5D3x-EK thusly: + + - VCC -- VCC + - GND -- GND + - TWCK0(PA31) -- SCL + - TWD0(PA30) -- SDA + + By default, PA30 and PA31 are SWJ-DP pins, it can be used as a pin + for TWI peripheral in the end application. + +choice + prompt "AT24 serial EPPROM configuration" + default SAMA5D3xEK_AT24_FTL + depends on SAMA5D3xEK_AT24_BLOCKMOUNT + +config SAMA5D3xEK_AT24_FTL + bool "Create AT24 block driver" + ---help--- + Create the MTD driver for the AT24 and "wrap" the AT24 as a standard + block driver that could then, for example, be mounted using FAT or + any other file system. Any file system may be used, but there will + be no wear-leveling. + +config SAMA5D3xEK_AT24_NXFFS + bool "Create AT24 NXFFS file system" + depends on FS_NXFFS + ---help--- + Create the MTD driver for the AT24 and mount the AT24 device as + a wear-leveling, NuttX FLASH file system (NXFFS). The downside of + NXFFS is that it can be very slow. + +endchoice # AT24 serial EPPROM configuration + +config SAMA5D3xEK_USBHOST_STACKSIZE + int "USB host waiter stack size" + default 1536 if USBHOST_HUB + default 1024 if !USBHOST_HUB + depends on USBHOST + +config SAMA5D3xEK_USBHOST_PRIO + int "USB host waiter task priority" + default 100 + depends on USBHOST + +config SAMA5D3xEK_TSD_DEVMINOR + int "Touchscreen device minor" + default 0 + depends on SAMA5_TSD + ---help--- + This touchscreen will be register as /dev/inputN where the value of + N is provided by this configuration setting. + +config SAMA5D3xEK_CHANNEL + int "PWM channel number" + default 0 if SAMA5_PWM_CHAN0 + default 1 if SAMA5_PWM_CHAN1 + default 2 if SAMA5_PWM_CHAN2 + default 3 if SAMA5_PWM_CHAN3 + range 0 3 + depends on PWM && SAMA5_PWM + ---help--- + Selects the PWM channel number that will be used to perform the PWM + test. See apps/examples/pwm. + +if AUDIO_I2SCHAR && (SAMA5_SSC0 || SAMA5_SSC1) + +if SAMA5_SSC0 && SAMA5_SSC1 + +config SAMA5D3xEK_SSC_PORT + int "SSC port number" + default 0 + range 0 1 + ---help--- + Specify the I2S port to use, i.e., 0 for SSC0 or 1 for SSC1 + +endif # SAMA5_SSC0 && SAMA5_SSC1 + +if SAMA5_SSC0 && !SAMA5_SSC1 + +config SAMA5D3xEK_SSC_PORT + int + default 0 + +endif # SAMA5_SSC0 && !SAMA5_SSC1 + +if !SAMA5_SSC0 && SAMA5_SSC1 + +config SAMA5D3xEK_SSC_PORT + int + default 1 + +endif # SAMA5_SSC0 && !SAMA5_SSC1 + +config SAMA5D3xEK_I2SCHAR_MINOR + int "I2S character driver minor number" + default 0 + ---help--- + The minor device number to use when registering the I2S character + device. The driver will be registered at /dev/is2charN where N is + the value provided by this setting. + +endif # AUDIO_I2SCHAR && (SAMA5_SSC0 || SAMA5_SSC1) + +if VIDEO_OV2640 + +config SAMA5D3xEK_OV2640_DEMO + bool "SAMA5 OV2640 camera demo" + default n + select SAMA5D3xEK_NOREDLED + ---help--- + Enable the SAMA5 OV2640 camera demo + +endif # VIDEO_OV2640 + +config SAMA5D3xEK_SLOWCLOCK + bool + default y if SCHED_TICKLESS + default n if !SCHED_TICKLESS + +if AUDIO_WM8904 + +config SAMA5D3xEK_WM8904_I2CFREQUENCY + int "WM8904 I2C Frequency" + default 400000 + range 1 400000 + ---help--- + This option selects the I2C frequency to use when communicating with + the WM8904 device. The default, 400KHz, is the maximum supported by + the WM8904. If you have problems communicating with the WM8904, + then you might want to try lowering this rate. + +choice + prompt "WM8904 MCLK source" + default SAMA5D3xEK_WM8904_SRCMAIN + +config SAMA5D3xEK_WM8904_SRCMAIN + bool "Main Clock (12MHz)" + select SAMA5D3xEK_SLOWCLOCK + +config SAMA5D3xEK_WM8904_SRCSCK + bool "Slow XTAL (32.768KHz)" + +endchoice # WM8904 MCLK source +endif # AUDIO_WM8904 +endif # ARCH_BOARD_SAMA5D3X_EK diff --git a/configs/sama5d3x-ek/README.txt b/configs/sama5d3x-ek/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..3a7ebc57294656a0fb40b670a553ee3227984522 --- /dev/null +++ b/configs/sama5d3x-ek/README.txt @@ -0,0 +1,3983 @@ +README +====== + + This README file describes the port of NuttX to the SAMA5D3x-EK + development boards. These boards feature the Atmel SAMA5D3 + microprocessors. Four different SAMA5D3x-EK kits are available + + - SAMA5D31-EK with the ATSAMA5D31 (http://www.atmel.com/devices/sama5d31.aspx) + - SAMA5D33-EK with the ATSAMA5D33 (http://www.atmel.com/devices/sama5d33.aspx) + - SAMA5D34-EK with the ATSAMA5D34 (http://www.atmel.com/devices/sama5d34.aspx) + - SAMA5D35-EK with the ATSAMA5D35 (http://www.atmel.com/devices/sama5d35.aspx) + + The each consist of an identical base board with different plug-in + modules for each CPU. I also have a 5 inch LCD for my SAMA5D3x-EK, + Atmel 5.0_WVGA_R_AEA_DM, Rev. B, but this LCD is not yet generally available + as of this writing. + + I have seen SAMA5D3x-EK boards with different LCDs attached. One of the more + common LCDS is the 7 inch TM0000 TFT LCD controller with MaXTouch multi-touch, + capacitive touchscreen (http://www.pdaatl.com/doc/tm7000.pdf). That is NOT the + LCD supported by this configuration; the LCD used here is smaller and has a + resistive touchscreen that interfaces via the SAMA5D3 ADC interface. Refer to + the SAMA5D4-EK for TM0000 support that can be back-ported to the SAMA5D3x-EK. + + SAMA5D3 Family + + ATSAMA5D31 ATSAMA5D33 ATSAMA5D34 ATSAMA5D35 + ------------------------- ------------- ------------- ------------- ------------- + Pin Count 324 324 324 324 + Max. Operating Frequency 536 536 536 536 + CPU Cortex-A5 Cortex-A5 Cortex-A5 Cortex-A5 + Max I/O Pins 160 160 160 160 + Ext Interrupts 160 160 160 160 + USB Transceiver 3 3 3 3 + USB Speed Hi-Speed Hi-Speed Hi-Speed Hi-Speed + USB Interface Host, Device Host, Device Host, Device Host, Device + SPI 6 6 6 6 + TWI (I2C) 3 3 3 3 + UART 7 5 5 7 + CAN - - 2 2 + LIN 4 4 4 4 + SSC 2 2 2 2 + Ethernet 1 1 1 2 + SD / eMMC 3 2 3 3 + Graphic LCD Yes Yes Yes - + Camera Interface Yes Yes Yes Yes + ADC channels 12 12 12 12 + ADC Resolution (bits) 12 12 12 12 + ADC Speed (ksps) 440 440 440 440 + Resistive Touch Screen Yes Yes Yes Yes + Crypto Engine AES/DES/ AES/DES/ AES/DES/ AES/DES/ + SHA/TRNG SHA/TRNG SHA/TRNG SHA/TRNG + SRAM (Kbytes) 128 128 128 128 + External Bus Interface 1 1 1 1 + DRAM Memory DDR2/LPDDR, DDR2/LPDDR, DDR2/LPDDR, DDR2/LPDDR, + SDRAM/LPSDR SDRAM/LPSDR DDR2/LPDDR, DDR2/LPDDR, + NAND Interface Yes Yes Yes Yes + Temp. Range (deg C) -40 to 85 -40 to 85 -40 to 85 -40 to 85 + I/O Supply Class 1.8/3.3 1.8/3.3 1.8/3.3 1.8/3.3 + Operating Voltage (Vcc) 1.08 to 1.32 1.08 to 1.32 1.08 to 1.32 1.08 to 1.32 + FPU Yes Yes Yes Yes + MPU / MMU No/Yes No/Yes No/Yes No/Yes + Timers 5 5 5 6 + Output Compare channels 6 6 6 6 + Input Capture Channels 6 6 6 6 + PWM Channels 4 4 4 4 + 32kHz RTC Yes Yes Yes Yes + Packages LFBGA324_A LFBGA324_A LFBGA324_A LFBGA324_A + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NXFLAT Toolchain + - Loading Code into SRAM with J-Link + - Writing to FLASH using SAM-BA + - Creating and Using NORBOOT + - Running NuttX from SDRAM + - Buttons and LEDs + - Serial Consoles + - Networking + - AT25 Serial FLASH + - HSMCI Card Slots + - Auto-Mounter + - USB Ports + - USB High-Speed Device + - USB High-Speed Host + - SDRAM Support + - NAND Support + - AT24 Serial EEPROM + - I2C Tool + - CAN Usage + - SAMA5 ADC Support + - SAMA5 PWM Support + - RTC + - Watchdog Timer + - TRNG and /dev/random + - Touchscreen Testing + - Tickless OS + - OV2640 Camera Interface + - I2S Audio Support + - SAMA5D3x-EK Configuration Options + - Configurations + - To-Do List + +Development Environment +======================= + + Several possible development environments may be used: + + - Linux or OSX native + - Cygwin unders Windows + - MinGW + MSYS under Windows + - Windows native (with GNUMake from GNUWin32). + + All testing has been performed using Cygwin under Windows. + + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + The NuttX make system will support the several different toolchain options. + + All testing has been conducted using the CodeSourcery GCC toolchain. To use + a different toolchain, you simply need to add change to one of the following + configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7A_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux + CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y : Generic GCC ARM EABI toolchain for Windows + + The CodeSourcery GCC toolchain is selected with + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y and setting the PATH variable + appropriately. + + NOTE about Windows native toolchains + ------------------------------------ + + There are several limitations to using a Windows based toolchain in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' + utility but you might easily find some new path problems. If so, check + out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic + links are used in Nuttx (e.g., include/arch). The make system works + around these problems for the Windows tools by copying directories + instead of linking them. But this can also cause some confusion for + you: For example, you may edit a file in a "linked" directory and find + that your changes had no effect. That is because you are building the + copy of the file in the "fake" symbolic directory. If you use a\ + Windows toolchain, you should get in the habit of making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/sam34, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/sam34/sam_vectors.S. You may need to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh sama5d3x-ek/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. Copy the configuration file from the configs/ sub-directory to the + top-level build directory: + + cp configs/cortexa8-eabi-defconfig-4.8.2 .config + + 6a. You may wish to modify the configuration before you build it. For + example, it is recommended that you build the kconfig-frontends tools, + generomfs, and the NXFLAT tools as well. You may also want to change + the selected toolchain. These reconfigurations can all be done with + + make menuconfig + + 6b. If you chose to make the configuration with no changes, then you + should still do the following to make certain that the build + configuration is up-to-date: + + make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh sama5d3x-ek/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built NXFLAT binaries. + + NOTE: There are some known incompatibilities with 4.6.3 EABI toolchain + and the NXFLAT tools. See the top-level TODO file (under "Binary + loaders") for more information about this problem. If you plan to use + NXFLAT, please do not use the GCC 4.6.3 EABI toochain. + +Loading Code into SRAM with J-Link +================================== + + Loading code with the Segger tools and GDB + ------------------------------------------ + + 1) Change directories into the directory where you built NuttX. + 2) Start the GDB server and wait until it is ready to accept GDB + connections. + 3) Then run GDB like this: + + $ arm-none-eabi-gdb + (gdb) target remote localhost:2331 + (gdb) mon reset + (gdb) load nuttx + (gdb) ... start debugging ... + + Loading code using J-Link Commander + ---------------------------------- + + J-Link> r + J-Link> loadbin
+ J-Link> setpc
+ J-Link> ... start debugging ... + +Writing to FLASH using SAM-BA +============================= + + Assumed starting configuration: + + 1. You have installed the J-Link CDC USB driver (Windows only, there is + no need to install a driver on any regular Linux distribution), + 2. You have the USB connected to DBGU port (J14) + 3. Terminal configuration: 115200 8N1 + + Using SAM-BA to write to FLASH: + + 1. Exit the terminal emulation program and remove the USB cable from + the DBGU port (J14) + 2. Connect the USB cable to the device USB port (J20) + 3. JP9 must open (BMS == 1) to boot from on-chip Boot ROM. + 4. Press and maintain PB4 CS_BOOT button and power up the board. PB4 + CS_BOOT button prevents booting from Nand or serial Flash by + disabling Flash Chip Selects after having powered the board, you can + release the PB4 BS_BOOT button. + 5. On Windows you may need to wait for a device driver to be installed. + 6. Start the SAM-BA application, selecting (1) the correct USB serial + port, and (2) board = at91sama5d3x-ek. + 7. The SAM-BA menu should appear. + 8. Select the FLASH bank that you want to use and the address to write + to and "Execute" + 9. When you are finished writing to FLASH, remove the USB cable from J20 + and re-connect the serial link on USB CDC / DBGU connector (J14) and + re-open the terminal emulator program. + 10. If you loaded code in NOR flash (CS0), then you will need to close + JP9 (BMS == 0) to force booting out of NOR flash (see NOTE). + 11. Power cycle the board. + + NOTES: By closing JP9 (BMS == 0), you can force the board to boot + directly to NOR FLASH. Executing from other memories will require that + you provide a special code header so that you code can be recognized as a + boot-able image by the ROM bootloader. + +Creating and Using NORBOOT +========================== + + In order to have more control of debugging code that runs out of NOR FLASH, + I created the sama5d3x-ek/norboot configuration. That configuration is + described below under "Configurations." + + Here are some general instructions on how to build an use norboot: + + Building: + 1. Remove any old configurations (if applicable). + + cd + make distclean + + 2. Install and build the norboot configuration. This steps will establish + the norboot configuration and setup the PATH variable in order to do + the build: + + cd tools + ./configure.sh sama5d3x-ek/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and + perform edits as necessary so that TOOLCHAIN_BIN is the correct path + to the directory than holds your toolchain binaries. + + NOTE: Be aware that the default norboot also disables the watchdog. + Since you will not be able to re-enable the watchdog later, you may + need to set CONFIG_SAMA5_WDT=y in the NuttX configuration file. + + Then make norboot: + + make + + This will result in an ELF binary called 'nuttx' and also HEX and + binary versions called 'nuttx.hex' and 'nuttx.bin'. + + 3. Rename the binaries. Since you will need two versions of NuttX: this + norboot version that runs in internal SRAM and another under test in + NOR FLASH, I rename the resulting binary files so that they can be + distinguished: + + mv nuttx norboot + mv nuttx.hex norboot.hex + mv nuttx.bin norboot.bin + + 4. Build your NOR configuration and write this into NOR FLASH. Here, for + example, is how you would create the NSH NOR configuration: + + cd + make distclean # Remove the norboot configuration + cd tools + ./configure.sh sama5d3x-ek/nsh # Establish the NSH configuration + cd - + make # Build the NSH configuration + + Then use SAM-BA to write the nuttx.bin binary into NOR FLASH. This + will involve holding the CS_BOOT button and power cycling to start + the ROM loader. The SAM-BA serial connection will be on the device + USB port, not the debug USB port. Follow the SAM-BA instruction to + write the nuttx.bin binary to NOR FLASH. + + 5. Restart the system without holding CS_BOOT to get back to the normal + debug setup. + + 6. Then start the J-Link GDB server and GDB. In GDB, I do the following: + + (gdb) mon reset # Reset and halt the CPU + (gdb) load norboot # Load norboot into internal SRAM + (gdb) mon go # Start norboot + (gdb) mon halt # Break in + (gdb) mon reg pc = 0x10000040 # Set the PC to NOR flash entry point + (gdb) mon go # And jump into NOR flash + + The norboot program can also be configured to jump directly into + NOR FLASH without requiring the final halt and go by setting + CONFIG_SAMA5D3xEK_NOR_START=y in the NuttX configuration. However, + since I have been debugging the early boot sequence, the above + sequence has been most convenient for me since it allows me to + step into the program in NOR. + + 7. An option is to use the SAM-BA tool to write the NORBOOT image into + Serial FLASH. Then, the system will boot from Serial FLASH by + copying the NORBOOT image in SRAM which will run and then start the + image in NOR FLASH automatically. This is a very convenient usage! + + NOTES: (1) There is jumper on the CM module that must be closed to + enable use of the AT25 Serial Flash. (2) If using SAM-BA, make sure + that you load the NOR boot program into the boot area via the pull- + down menu. + + STATUS: + 2013-7-30: I have been unable to execute these configurations from NOR + FLASH by closing the BMS jumper (J9). As far as I can tell, this + jumper does nothing on my board??? So I have been using the norboot + configuration exclusively to start the program-under-test in NOR FLASH. + +Running NuttX from SDRAM +======================== + + Executing from SDRAM + -------------------- + + NuttX may be executed from SDRAM. But this case means that the NuttX + binary must reside on some other media (typically NAND FLASH, Serial + FLASH, or, perhaps even a TFTP server). In these cases, an intermediate + bootloader such as U-Boot or Barebox must be used to configure the + SAMA5D3 clocks and SDRAM and then to copy the NuttX binary into SDRAM. + + - NuttX Configuration + - Boot sequence + - NAND FLASH Memory Map + - Programming the AT91Boostrap Binary + - Programming U-Boot + - Load NuttX with U-Boot on AT91 boards + + TODO: Some drivers may require some adjustments to run from SDRAM. That + is because in this case macros like BOARD_MCK_FREQUENCY are not constants + but are instead function calls: The MCK clock frequency is not known in + advance but instead has to be calculated from the bootloader PLL configuration. + See the TODO list at the end of this file for further information. + + Using JTAG + ---------- + + This description assumes that you have a JTAG debugger such as Segger + J-Link connected to the SAMA5D3-Xplained. + + 1. Start the GDB server + 2. Start GDB + 3. Use the 'target remote localhost:xxxx' command to attach to the GDG + server + 4. Do 'mon reset' then 'mon go' to start the internal boot loader (maybe + U-Boot). + 5. Let the boot loader run until it completes SDRAM initialization, then + do 'mon halt'. + 6. Now you have SDRAM initialized and you use 'load nuttx' to load the + ELF file into SDRAM. + 7. Use 'file nuttx' to load symbols + 8. Set the PC to the NuttX entry point 'mon pc 0x20008040' and start + nuttx using 'mon go'. + +NuttX Configuration +------------------- + + In order to run from SDRAM, NuttX must be built at origin 0x20008000 in + SDRAM (skipping over SDRAM memory used by the bootloader). The following + configuration option is required: + + CONFIG_SAMA5_BOOT_SDRAM=y + CONFIG_BOOT_RUNFROMSDRAM=y + + These options tell the NuttX code that it will be booting and running from + SDRAM. In this case, the start-logic will do to things: (1) it will not + configure the SAMA5D3 clocking. Rather, it will use the clock configuration + as set up by the bootloader. And (2) it will not attempt to configure the + SDRAM. Since NuttX is already running from SDRAM, it must accept the SDRAM + configuration as set up by the bootloader. + +Boot sequence +------------- + + Reference: http://www.at91.com/linux4sam/bin/view/Linux4SAM/GettingStarted + + Several pieces of software are involved to boot a Nutt5X into SDRAM. First + is the primary bootloader in ROM which is in charge to check if a valid + application is present on supported media (NOR FLASH, Serial DataFlash, + NAND FLASH, SD card). + + The boot sequence of linux4SAM is done in several steps : + + 1. The ROM bootloader checks if a valid application is present in FLASH + and if it is the case downloads it into internal SRAM. This program + is usually a second level bootloader called AT91BootStrap. + + 2. AT91Bootstrap is the second level bootloader. It is in charge of the + hardware configuration. It downloads U-Boot / Barebox binary from + FLASH to SDRAM / DDRAM and starts the third level bootloader + (U-Boot / Barebox) + + (see http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap). + + 3. The third level bootloader is either U-Boot or Barebox. The third + level bootloader is in charge of downloading NuttX binary from FLASH, + network, SD card, etc. It then starts NuttX. + + 4. Then NuttX runs from SDRAM + +DRAMBOOT +-------- + + See also configs/sama5d4-ek/README.txt for a description of the DRAMBOOT + program. This is a tiny version of NuttX that can run out of internal + SRAM. If you put this program on the HSMCI1 microSD card as boot.bin, then + it will boot on power up and you can download NuttX directly into DRAM by + sending the nuttx.hex file over the serial connection. + +NAND FLASH Memory Map +--------------------- + + Reference: http://www.at91.com/linux4sam/bin/view/Linux4SAM/GettingStarted + + 0x0000:0000 - 0x0003:ffff: AT91BootStrap + 0x0004:0000 - 0x000b:ffff: U-Boot + 0x000c:0000 - 0x000f:ffff: U-Boot environment + 0x0010:0000 - 0x0017:ffff: U-Boot environement redundant + 0x0018:0000 - 0x001f:ffff: Device tree (DTB) + 0x0020:0000 - 0x007f:ffff: NuttX + 0x0080:0000 - end: Available for use as a NAND file system + +Programming the AT91Boostrap Binary +----------------------------------- + + Reference: http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap + + This section describes how to program AT91Bootstrap binary into the boot + media with SAM-BA tool using NandFlash as boot media. + + 1. Get AT91BootStrap binaries. Build instructions are available here: + + http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap#Build_AT91Bootstrap_from_sources + + A pre-built AT91BootStrap binary is available here: + + ftp://www.at91.com/pub/at91bootstrap/AT91Bootstrap3.6.0/sama5d3xek-nandflashboot-uboot-3.6.0.bin + + 2. Start the SAM-BA GUI Application: + + - Connect the USB Device interface to your host machine using the USB + Device Cable. + - Make sure that the chip can execute the SAM-BA Monitor. + - Start SAM-BA GUI application. + - Select the board in the drop-down menu and choose the USB connection. + + 3. In the SAM-BA GUI Application: + + - Choose the "NandFlash" tab in the SAM-BA GUI interface. + - Initialize the NandFlash by choosing the "Enable NandFlash" action in + the Scripts rolling menu, then press "Execute" button. + - Erase the NandFlash device by choosing the "Erase All" action, then + press "Execute" button. + - Enable the PMECC by choosing the "Enable OS PMECC parameters" action, + then press "Execute" button. + + PMECC + Number of sectors per page: 4 + Spare Size: 64 + Number of ECC bits required: 4 + Size of the ECC sector: 512 + ECC offset: 36 + + - Choose "Send Boot File" action, then press Execute button to select the + at91bootstrap binary file and to program the binary to the NandFlash. + - Close SAM-BA, remove the USB Device cable. + +Programming U-Boot +------------------- + + Reference http://www.at91.com/linux4sam/bin/view/Linux4SAM/U-Boot + + 1. Get U-Boot Binaries. Build instructions are available here: + + http://www.at91.com/linux4sam/bin/view/Linux4SAM/U-Boot#Build_U_Boot_from_sources + + A pre-built binary is available here: + + ftp://www.at91.com/pub/uboot/u-boot-v2012.10/u-boot-sama5d3xek_nandflash_linux4sam_4.2.bin + + 2. Start the SAM-BA GUI Application: + + - Connect the USB Device interface to your host machine using the USB + Device Cable. + - Make sure that the chip can execute the SAM-BA Monitor. + - Start SAM-BA GUI application. + - Select the board in the drop-down menu and choose the USB connection. + + 3. In the SAM-BA GUI Application: + + - Choose the NandFlash tab in the SAM-BA GUI interface. + - Initialize the NandFlash by choosing the "Enable NandFlash" action in + the Scripts rolling menu, then press Execute button. + - Enable the PMECC by choosing the "Enable OS PMECC parameters" action, + then press Execute button. + + PMECC + Number of sectors per page: 4 + Spare Size: 64 + Number of ECC bits required: 4 + Size of the ECC sector: 512 + ECC offset: 36 + + - Press the "Send File Name" Browse button + - Choose u-boot.bin binary file and press Open + - Enter the proper address on media in the Address text field: + 0x00040000 + - Press the "Send File" button + - Close SAM-BA, remove the USB Device cable. + + You should now be able to interrupt with U-Boot vie the DBGU interface. + +Load NuttX with U-Boot on AT91 boards +------------------------------------- + + Reference http://www.at91.com/linux4sam/bin/view/Linux4SAM/U-Boot + + Preparing NuttX image + + U-Boot does not support normal binary images. Instead you have to + create an uImage file with the mkimage tool which encapsulates kernel + image with header information, CRC32 checksum, etc. + + mkimage comes in source code with U-Boot distribution and it is built + during U-Boot compilation (u-boot-source-dir/tools/mkimage). There + are also sites where you can download pre-built mkimage binaries. For + example: http://www.trimslice.com/wiki/index.php/U-Boot_images + + See the U-Boot README file for more information. More information is + also available in the mkimage man page (for example, + http://linux.die.net/man/1/mkimage). + + Command to generate an uncompressed uImage file (4) : + + mkimage -A arm -O linux -C none -T kernel -a 20008000 -e 20008000 \ + -n nuttx -d nuttx.bin uImage + + Where: + + -A arm: Set architecture to ARM + -O linux: Select operating system. bootm command of u-boot changes + boot method by os type. + -T kernel: Set image type. + -C none: Set compression type. + -a 20008000: Set load address. + -e 20008000: Set entry point. + -n nuttx: Set image name. + -d nuttx.bin: Use image data from nuttx.bin. + + This will generate a binary called uImage. If you have the path to + mkimage in your PATH variable, then you can automatically build the + uImage file by adding the following to your .config file: + + CONFIG_RAW_BINARY=y + CONFIG_UBOOT_UIMAGE=y + CONFIG_UIMAGE_LOAD_ADDRESS=0x20008000 + CONFIG_UIMAGE_ENTRY_POINT=0x20008040 + + The uImage file can them be loaded into memory from a variety of sources + (serial, SD card, JFFS2 on NAND, TFTP). + + STATUS: + 2014-4-1: So far, I am unable to get U-Boot to execute the uImage + file. I get the following error messages (in this case + trying to load from an SD card): + + U-Boot> fatload mmc 0 0x22000000 uimage + reading uimage + 97744 bytes read in 21 ms (4.4 MiB/s) + + U-Boot> bootm 0x22000000 + ## Booting kernel from Legacy Image at 0x22000000 ... + Image Name: nuttx + Image Type: ARM Linux Kernel Image (uncompressed) + Data Size: 97680 Bytes = 95.4 KiB + Load Address: 20008000 + Entry Point: 20008040 + Verifying Checksum ... OK + XIP Kernel Image ... OK + FDT and ATAGS support not compiled in - hanging + ### ERROR ### Please RESET the board ### + + This, however, appears to be a usable workaround: + + U-Boot> fatload mmc 0 0x20008000 nuttx.bin + mci: setting clock 257812 Hz, block size 512 + mci: setting clock 257812 Hz, block size 512 + mci: setting clock 257812 Hz, block size 512 + gen_atmel_mci: CMDR 00001048 ( 8) ARGR 000001aa (SR: 0c100025) Command Time Out + mci: setting clock 257812 Hz, block size 512 + mci: setting clock 22000000 Hz, block size 512 + reading nuttx.bin + 108076 bytes read in 23 ms (4.5 MiB/s) + + U-Boot> go 0x20008040 + ## Starting application at 0x20008040 ... + + NuttShell (NSH) NuttX-7.2 + nsh> + + Loading through network + + On a development system, it is useful to get the kernel and root file + system through the network. U-Boot provides support for loading + binaries from a remote host on the network using the TFTP protocol. + + To manage to use TFTP with U-Boot, you will have to configure a TFTP + server on your host machine. Check your distribution manual or Internet + resources to configure a Linux or Windows TFTP server on your host: + + - U-Boot documentation on a Linux host: + http://www.denx.de/wiki/view/DULG/SystemSetup#Section_4.6. + + - Another TFTP configuration reference: + http://www.linuxhomenetworking.com/wiki/index.php/Quick_HOWTO_:_Ch16_:_Telnet%2C_TFTP%2C_and_xinetd#TFTP + + On the U-Boot side, you will have to setup the networking parameters: + + 1. Setup an Ethernet address (MAC address) + Check this U-Boot network BuildRootFAQ entry to choose a proper MAC + address: http://www.denx.de/wiki/DULG/EthernetDoesNotWork + + setenv ethaddr 00:e0:de:ad:be:ef + + 2. Setup IP parameters: + The board ip address + + setenv ipaddr 10.0.0.2 + + The server ip address where the TFTP server is running + + setenv serverip 10.0.0.1 + + 3. saving Environment to flash + + saveenv + + 4. If Ethernet Phy has not been detected during former bootup, reset + the board to reload U-Boot : the Ethernet address and Phy + initialization shall be ok, now + + 5. Download the NuttX uImage and the root file system to a ram location + using the U-Boot tftp command (Cf. U-Boot script capability chapter). + + 6. Launch NuttX issuing a bootm or boot command. + + If the board has both emac and gmac, you can use following to choose + which one to use: + + setenv ethact macb0,gmacb0 + setenv ethprime gmacb0 + + STATUS: + 2014-3-30: These instructions were adapted from the Linux4SAM website + but have not yet been used. + +Buttons and LEDs +================ + + Buttons + ------- + There are five push button switches on the SAMA5D3X-EK base board: + + 1. One Reset, board reset (BP1) + 2. One Wake up, push button to bring the processor out of low power mode + (BP2) + 3. One User momentary Push Button + 4. One Disable CS Push Button + + Only the momentary push button is controllable by software (labeled + "PB_USER1" on the board): + + - PE27. Pressing the switch connects PE27 to grounded. Therefore, PE27 + must be pulled high internally. When the button is pressed the SAMA5 + will sense "0" is on PE27. + + LEDs + ---- + There are two LEDs on the SAMA5D3 series-CM board that can be controlled + by software. A blue LED is controlled via PIO pins. A red LED normally + provides an indication that power is supplied to the board but can also + be controlled via software. + + PE25. This blue LED is pulled high and is illuminated by pulling PE25 + low. + + PE24. The red LED is also pulled high but is driven by a transistor so + that it is illuminated when power is applied even if PE24 is not + configured as an output. If PE24 is configured as an output, then the + LED is illuminated by a high output. + + N.B. PE24 Drives the RED Led on the CM (SODIMM200), but unfortunately + it is also connected to ISI_RST on the MB (Main Board) and controlling + it will reset a Camera connected to the ISI + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + events as follows when the red LED (PE24) is available: + + SYMBOL Meaning LED state + Blue Red + ------------------- ----------------------- -------- -------- + LED_STARTED NuttX has been started OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF + LED_IRQSENABLED Interrupts enabled OFF OFF + LED_STACKCREATED Idle stack created ON OFF + LED_INIRQ In an interrupt -- No change -- + LED_SIGNAL In a signal handler -- No change -- + LED_ASSERTION An assertion failed -- No change -- + LED_PANIC The system has crashed OFF Blinking + LED_IDLE MCU is is sleep mode -- Not used -- + + If CONFIG_SAMA5D3xEK_NOREDLED=y, then the red LED is not used by the + system and the controls are as follows: + + SYMBOL Meaning LED state + Blue Red + ------------------- ----------------------- ----------- ----------- + LED_STARTED NuttX has been started OFF Not used + LED_HEAPALLOCATE Heap has been allocated OFF " " " " + LED_IRQSENABLED Interrupts enabled OFF " " " " + LED_STACKCREATED Idle stack created ON " " " " + LED_INIRQ In an interrupt No change " " " " + LED_SIGNAL In a signal handler No change " " " " + LED_ASSERTION An assertion failed No change " " " " + LED_PANIC The system has crashed Blinking " " " " + LED_IDLE MCU is is sleep mode Not used " " " " + + Thus if the blue LED is statically on, NuttX has successfully booted and + is, apparently, running normally. If the red (or blue) LED is flashing + at approximately 2Hz, then a fatal error has been detected and the system + has halted. + +Serial Consoles +=============== + + USART1 + ------ + By default USART1 is used as the NuttX serial console in all + configurations (unless otherwise noted). USART1 is buffered with an + RS-232 Transceiver (Analog Devices ADM3312EARU) and connected to the DB-9 + male socket (J8). + + USART1 Connector J8 + ------------------------------- + SAMA5 FUNCTION NUTTX PIO + PIO NAME CONFIGURATION + ---- ---------- --------------- + PB27 RTS1 PIO_USART1_RTS + PB29 TXD1 PIO_USART1_TXD + PB28 RXD1 PIO_USART1_RXD + PB26 CTS1 PIO_USART1_CTS + + NOTE: Debug TX (DTXD) and RX (DRXD) pins also are routed to the + ADM3312EARU via non populated 0 Ohm resistors. Thus allowing one + skilled with a soldering iron to choose which UART is level + translated by the ADM3312EARU + + ------------------------------- + SAMA5 FUNCTION NUTTX PIO + PIO NAME CONFIGURATION + ---- ---------- --------------- + PB31 DTXD PIO_DBGU_DTXD + PB30 DRXD PIO_DBGU_DRXD + + Hardware UART via CDC + --------------------- + "J-Link-OB-ATSAM3U4C comes with an additional hardware UART that is + accessible from a host via CDC which allows terminal communication with + the target device. This feature is enabled only if a certain port (CDC + disabled, PA25, pin 24 on J-Link-OB-ATSAM3U4C) is NOT connected to ground + (open). + + - Jumper JP16 not fitted: CDC is enabled + - Jumper JP16 fitted : CDC is disabled" + +Networking +========== + + Networking support via the can be added to NSH by selecting the following + configuration options. The SAMA5D3x supports two different Ethernet MAC + peripherals: (1) The 10/100Base-T EMAC peripheral and (2) the + 10/100/1000Base-T GMAC peripheral. Only the SAMA5D31 and SAMAD35 support + the EMAC peripheral; Only the SAMA5D33, SAMA5D34, and SAMA5D35 support + the GMAC perpheral! NOTE that the SAMA5D35 supports both! + + Selecting the EMAC peripheral + ----------------------------- + + System Type + CONFIG_ARCH_CHIP_ATSAMA5D31=y : SAMA5D31 or SAMAD35 support EMAC + CONFIG_ARCH_CHIP_ATSAMA5D35=y : (others do not) + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_EMACA=y : Enable the EMAC (type A) peripheral + + System Type -> EMAC device driver options + CONFIG_SAMA5_EMAC_NRXBUFFERS=16 : Set aside some RS and TX buffers + CONFIG_SAMA5_EMAC_NTXBUFFERS=4 + CONFIG_SAMA5_EMAC_PHYADDR=1 : KSZ8021/31 PHY is at address 1 + CONFIG_SAMA5_EMAC_AUTONEG=y : Use autonegotiation + CONFIG_SAMA5_EMAC_RMII=y : Either MII or RMII interface should work + CONFIG_SAMA5_EMAC_PHYSR=30 : Address of PHY status register on KSZ8021/31 + CONFIG_SAMA5_EMAC_PHYSR_ALTCONFIG=y : Needed for KSZ8021/31 + CONFIG_SAMA5_EMAC_PHYSR_ALTMODE=0x7 : " " " " " " + CONFIG_SAMA5_EMAC_PHYSR_10HD=0x1 : " " " " " " + CONFIG_SAMA5_EMAC_PHYSR_100HD=0x2 : " " " " " " + CONFIG_SAMA5_EMAC_PHYSR_10FD=0x5 : " " " " " " + CONFIG_SAMA5_EMAC_PHYSR_100FD=0x6 : " " " " " " + + PHY selection. Later in the configuration steps, you will need to select + the KSZ8021/31 PHY for EMAC (See below) + + Selecting the GMAC peripheral + ----------------------------- + + System Type + CONFIG_ARCH_CHIP_ATSAMA5D33=y : SAMA5D31, SAMA5D33 and SAMAD35 + CONFIG_ARCH_CHIP_ATSAMA5D34=y : support GMAC (others do not) + CONFIG_ARCH_CHIP_ATSAMA5D35=y : + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_GMAC=y : Enable the GMAC peripheral + + System Type -> GMAC device driver options + CONFIG_SAMA5_GMAC_NRXBUFFERS=16 : Set aside some RS and TX buffers + CONFIG_SAMA5_GMAC_NTXBUFFERS=4 + CONFIG_SAMA5_GMAC_PHYADDR=1 : KSZ8051 PHY is at address 1 + CONFIG_SAMA5_GMAC_AUTONEG=y : Use autonegotiation + + If both EMAC and GMAC are selected, you will also need: + + CONFIG_SAMA5_GMAC_ISETH0=y : GMAC is "eth0"; EMAC is "eth1" + + PHY selection. Later in the configuration steps, you will need to select + the KSZ9021/31 PHY for GMAC (See below) + + Common configuration settings + ----------------------------- + + Networking Support + CONFIG_NET=y : Enable Networking + CONFIG_NET_SOCKOPTS=y : Enable socket operations + CONFIG_NET_ETH_MTU=562 : Maximum packet size (MTU) 1518 is more standard + CONFIG_NET_ETH_TCP_RECVWNDO=562 : Should be the same as CONFIG_NET_ETH_MTU + CONFIG_NET_TCP=y : Enable TCP/IP networking + CONFIG_NET_TCPBACKLOG=y : Support TCP/IP backlog + CONFIG_NET_TCP_READAHEAD_BUFSIZE=562 : Read-ahead buffer size + CONFIG_NET_UDP=y : Enable UDP networking + CONFIG_NET_ICMP=y : Enable ICMP networking + CONFIG_NET_ICMP_PING=y : Needed for NSH ping command + : Defaults should be okay for other options + Device drivers -> Network Device/PHY Support + CONFIG_NETDEVICES=y : Enabled PHY selection + CONFIG_ETH0_PHY_KSZ8051=y : Select the KSZ8051 PHY (for EMAC), OR + CONFIG_ETH0_PHY_KSZ90x1=y : Select the KSZ9021/31 PHY (for GMAC) + + Application Configuration -> Network Utilities + CONFIG_NETDB_DNSCLIENT=y : Enable host address resolution + CONFIG_NETUTILS_TELNETD=y : Enable the Telnet daemon + CONFIG_NETUTILS_TFTPC=y : Enable TFTP data file transfers for get and put commands + CONFIG_NETUTILS_NETLIB=y : Network library support is needed + CONFIG_NETUTILS_WEBCLIENT=y : Needed for wget support + : Defaults should be okay for other options + Application Configuration -> NSH Library + CONFIG_NSH_TELNET=y : Enable NSH session via Telnet + CONFIG_NSH_IPADDR=0x0a000002 : Select an IP address + CONFIG_NSH_DRIPADDR=0x0a000001 : IP address of gateway/host PC + CONFIG_NSH_NETMASK=0xffffff00 : Netmask + CONFIG_NSH_NOMAC=y : Need to make up a bogus MAC address + : Defaults should be okay for other options + + Using the network with NSH + -------------------------- + + So what can you do with this networking support? First you see that + NSH has several new network related commands: + + ifconfig, ifdown, ifup: Commands to help manage your network + get and put: TFTP file transfers + wget: HTML file transfers + ping: Check for access to peers on the network + Telnet console: You can access the NSH remotely via telnet. + + You can also enable other add on features like full FTP or a Web + Server or XML RPC and others. There are also other features that + you can enable like DHCP client (or server) or network name + resolution. + + By default, the IP address of the SAMA5D3x-EK will be 10.0.0.2 and + it will assume that your host is the gateway and has the IP address + 10.0.0.1. + + nsh> ifconfig + eth0 HWaddr 00:e0:de:ad:be:ef at UP + IPaddr:10.0.0.2 DRaddr:10.0.0.1 Mask:255.255.255.0 + + You can use ping to test for connectivity to the host (Careful, + Window firewalls usually block ping-related ICMP traffic). On the + target side, you can: + + nsh> ping 10.0.0.1 + PING 10.0.0.1 56 bytes of data + 56 bytes from 10.0.0.1: icmp_seq=1 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=2 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=3 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=4 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=5 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=6 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=7 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=8 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=9 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=10 time=0 ms + 10 packets transmitted, 10 received, 0% packet loss, time 10100 ms + + NOTE: In this configuration is is normal to have packet loss > 0% + the first time you ping due to the default handling of the ARP + table. + + On the host side, you should also be able to ping the SAMA5D3x-EK: + + $ ping 10.0.0.2 + + You can also log into the NSH from the host PC like this: + + $ telnet 10.0.0.2 + Trying 10.0.0.2... + Connected to 10.0.0.2. + Escape character is '^]'. + sh_telnetmain: Session [3] Started + + NuttShell (NSH) NuttX-6.31 + nsh> help + help usage: help [-v] [] + + [ echo ifconfig mkdir mw sleep + ? exec ifdown mkfatfs ping test + cat exit ifup mkfifo ps umount + cp free kill mkrd put usleep + cmp get losetup mh rm wget + dd help ls mount rmdir xd + df hexdump mb mv sh + + Builtin Apps: + nsh> + + NOTE: If you enable this feature, you experience a delay on booting. + That is because the start-up logic waits for the network connection + to be established before starting NuttX. In a real application, you + would probably want to do the network bringup on a separate thread + so that access to the NSH prompt is not delayed. + + This delay will be especially long if the board is not connected to + a network. On the order of a minute! You will probably think that + NuttX has crashed! And then, when it finally does come up, the + network will not be available. + + Network Initialization Thread + ----------------------------- + There is a configuration option enabled by CONFIG_NSH_NETINIT_THREAD + that will do the NSH network bring-up asynchronously in parallel on + a separate thread. This eliminates the (visible) networking delay + altogether. This networking initialization feature by itself has + some limitations: + + - If no network is connected, the network bring-up will fail and + the network initialization thread will simply exit. There are no + retries and no mechanism to know if the network initialization was + successful. + + - Furthermore, there is no support for detecting loss of the network + connection and recovery of networking when the connection is restored. + + Both of these shortcomings can be eliminated by enabling the network + monitor: + + Network Monitor + --------------- + By default the network initialization thread will bring-up the network + then exit, freeing all of the resources that it required. This is a + good behavior for systems with limited memory. + + If the CONFIG_NSH_NETINIT_MONITOR option is selected, however, then the + network initialization thread will persist forever; it will monitor the + network status. In the event that the network goes down (for example, if + a cable is removed), then the thread will monitor the link status and + attempt to bring the network back up. In this case the resources + required for network initialization are never released. + + Pre-requisites: + + - CONFIG_NSH_NETINIT_THREAD as described above. + + - CONFIG_NETDEV_PHY_IOCTL. Enable PHY IOCTL commands in the Ethernet + device driver. Special IOCTL commands must be provided by the Ethernet + driver to support certain PHY operations that will be needed for link + management. There operations are not complex and are implemented for + the Atmel SAMA5 family. + + - CONFIG_ARCH_PHY_INTERRUPT. This is not a user selectable option. + Rather, it is set when you select a board that supports PHY interrupts. + In most architectures, the PHY interrupt is not associated with the + Ethernet driver at all. Rather, the PHY interrupt is provided via some + board-specific GPIO and the board-specific logic must provide support + for that GPIO interrupt. To do this, the board logic must do two things: + (1) It must provide the function arch_phy_irq() as described and + prototyped in the nuttx/include/nuttx/arch.h, and (2) it must select + CONFIG_ARCH_PHY_INTERRUPT in the board configuration file to advertise + that it supports arch_phy_irq(). This logic can be found at + nuttx/configs/sama5d3x-ek/src/sam_ethernet.c. + + - And a few other things: UDP support is required (CONFIG_NET_UDP) and + signals must not be disabled (CONFIG_DISABLE_SIGNALS). + + Given those prerequisites, the newtork monitor can be selected with these additional settings. + + Networking Support -> Networking Device Support + CONFIG_NETDEV_PHY_IOCTL=y : Enable PHY ioctl support + + Application Configuration -> NSH Library -> Networking Configuration + CONFIG_NSH_NETINIT_THREAD : Enable the network initialization thread + CONFIG_NSH_NETINIT_MONITOR=y : Enable the network monitor + CONFIG_NSH_NETINIT_RETRYMSEC=2000 : Configure the network monitor as you like + CONFIG_NSH_NETINIT_SIGNO=18 + +AT25 Serial FLASH +================= + + Connections + ----------- + + Both the Ronetix and Embest versions of the SAMAD3x CPU modules include an + Atmel AT25DF321A, 32-megabit, 2.7-volt SPI serial flash. The SPI + connection is as follows: + + AT25DF321A SAMA5 + --------------- ----------------------------------------------- + SI PD11 SPI0_MOSI + SO PD10 SPI0_MIS0 + SCK PD12 SPI0_SPCK + /CS PD13 via NL17SZ126 if JP1 is closed (See below) + + JP1 and JP2 seem to related to /CS on the Ronetix board, but the usage is + less clear. For the Embest module, JP1 must be closed to connect /CS to + PD13; on the Ronetix schematic, JP11 seems only to bypass a resistor (may + not be populated?). I think closing JP1 is correct in either case. + + Configuration + ------------- + + The Embest or Ronetix CPU module includes an Atmel AT25DF321A, 32-megabit, + 2.7-volt SPI serial flash. Support for that serial FLASH can be enabled + in these configurations. These are the relevant configuration settings: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_SPI0=y : Enable SPI0 + CONFIG_SAMA5_DMAC0=y : Enable DMA controller 0 + + System Type -> SPI device driver options + CONFIG_SAMA5_SPI_DMA=y : Use DMA for SPI transfers + CONFIG_SAMA5_SPI_DMATHRESHOLD=4 : Don't DMA for small transfers + + Device Drivers -> SPI Driver Support + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : Support the exchange method + + Device Drivers -> Memory Technology Device (MTD) Support + CONFIG_MTD=y : Enable MTD support + CONFIG_MTD_AT25=y : Enable the AT25 driver + CONFIG_AT25_SPIMODE=0 : Use SPI mode 0 + CONFIG_AT25_SPIFREQUENCY=10000000 : Use SPI frequency 10MHz + + The AT25 is capable of higher SPI rates than this. I have not experimented + a lot, but at 20MHz, the behavior is not the same with all CM modules. This + lower rate gives more predictable performance. + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + Board Selection + CONFIG_SAMA5D3xEK_AT25_BLOCKMOUNT=y : Mounts AT25 for NSH + CONFIG_SAMA5D3xEK_AT25_FTL=y : Create block driver for FAT + + NOTE that you must close JP1 on the Embest/Ronetix board in order to + enable the AT25 FLASH chip select. + + You can then format the AT25 FLASH for a FAT file system and mount the + file system at /mnt/at25 using these NSH commands: + + nsh> mkfatfs /dev/mtdblock0 + nsh> mount -t vfat /dev/mtdblock0 /mnt/at25 + + Then you an use the FLASH as a normal FAT file system: + + nsh> echo "This is a test" >/mnt/at25/atest.txt + nsh> ls -l /mnt/at25 + /mnt/at25: + -rw-rw-rw- 16 atest.txt + nsh> cat /mnt/at25/atest.txt + This is a test + + NOTE: It appears that if Linux runs out of NAND, it will destroy the + contents of the AT25. + +HSMCI Card Slots +================ + + Physical Slots + -------------- + + The SAMA5D3x-EK provides a two SD memory card slots: (1) a full size SD + card slot (J7 labelled MCI0), and (2) a microSD memory card slot (J6 + labelled MCI1). + + The full size SD card slot connects via HSMCI0. The card detect discrete + is available on PD17 (pulled high). The write protect discrete is tied to + ground (via PP6) and not available to software. The slot supports 8-bit + wide transfer mode, but the NuttX driver currently uses only the 4-bit + wide transfer mode + + PD17 MCI0_CD + PD1 MCI0_DA0 + PD2 MCI0_DA1 + PD3 MCI0_DA2 + PD4 MCI0_DA3 + PD5 MCI0_DA4 + PD6 MCI0_DA5 + PD7 MCI0_DA6 + PD8 MCI0_DA7 + PD9 MCI0_CK + PD0 MCI0_CDA + + The microSD connects vi HSMCI1. The card detect discrete is available on + PD18 (pulled high): + + PD18 MCI1_CD + PB20 MCI1_DA0 + PB21 MCI1_DA1 + PB22 MCI1_DA2 + PB23 MCI1_DA3 + PB24 MCI1_CK + PB19 MCI1_CDA + + Configuration Settings + ---------------------- + + Enabling HSMCI support. The SAMA5D3x-EK provides a two SD memory card + slots: (1) a full size SD card slot (J7 labelled MCI0), and (2) a + microSD memory card slot (J6 labelled MCI1). The full size SD card slot + connects via HSMCI0; the microSD connects vi HSMCI1. Support for both SD + slots can be enabled with the following settings: + + System Type->ATSAMA5 Peripheral Support + CONFIG_SAMA5_HSMCI0=y : Enable HSMCI0 support + CONFIG_SAMA5_HSMCI1=y : Enable HSMCI1 support + CONFIG_SAMA5_DMAC0=y : DMAC0 is needed by HSMCI0 + CONFIG_SAMA5_DMAC1=y : DMAC1 is needed by HSMCI1 + + System Type + CONFIG_SAMA5_PIO_IRQ=y : PIO interrupts needed + CONFIG_SAMA5_PIOD_IRQ=y : Card detect pins are on PIOD + + Device Drivers -> MMC/SD Driver Support + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMSCD_NSLOTS=1 : One slot per driver instance + CONFIG_MMCSD_MULTIBLOCK_DISABLE=y : (REVISIT) + CONFIG_MMCSD_HAVECARDDETECT=y : Supports card-detect PIOs + CONFIG_MMCSD_MMCSUPPORT=n : Interferes with some SD cards + CONFIG_MMCSD_SPI=n : No SPI-based MMC/SD support + CONFIG_MMCSD_SDIO=y : SDIO-based MMC/SD support + CONFIG_SDIO_DMA=y : Use SDIO DMA + CONFIG_SDIO_BLOCKSETUP=y : Needs to know block sizes + + Library Routines + CONFIG_SCHED_WORKQUEUE=y : Driver needs work queue support + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + Using the SD card + ----------------- + + 1) After booting, the HSCMI devices will appear as /dev/mmcsd0 + and /dev/mmcsd1. + + 2) If you try mounting an SD card with nothing in the slot, the + mount will fail: + + nsh> mount -t vfat /dev/mmcsd1 /mnt/sd1 + nsh: mount: mount failed: 19 + + NSH can be configured to provide errors as strings instead of + numbers. But in this case, only the error number is reported. The + error numbers can be found in nuttx/include/errno.h: + + #define ENODEV 19 + #define ENODEV_STR "No such device" + + So the mount command is saying that there is no device or, more + correctly, that there is no card in the SD card slot. + + 3) Inserted the SD card. Then the mount should succeed. + + nsh> mount -t vfat /dev/mmcsd1 /mnt/sd1 + nsh> ls /mnt/sd1 + /mnt/sd1: + atest.txt + nsh> cat /mnt/sd1/atest.txt + This is a test + + NOTE: See the next section entitled "Auto-Mounter" for another way + to mount your SD card. + + 4) Before removing the card, you must umount the file system. This is + equivalent to "ejecting" or "safely removing" the card on Windows: It + flushes any cached data to the card and makes the SD card unavailable + to the applications. + + nsh> umount -t /mnt/sd1 + + It is now safe to remove the card. NuttX provides into callbacks + that can be used by an application to automatically unmount the + volume when it is removed. But those callbacks are not used in + these configurations. + +Auto-Mounter +============ + + NuttX implements an auto-mounter than can make working with SD cards + easier. With the auto-mounter, the file system will be automatically + mounted when the SD card is inserted into the HSMCI slot and automatically + unmounted when the SD card is removed. + + The auto-mounter is enable with: + + CONFIG_FS_AUTOMOUNTER=y + + However, to use the automounter you will to provide some additional + board-level support. See configs/sama5d4-ek for and example of how + you might do this. + + WARNING: SD cards should never be removed without first unmounting + them. This is to avoid data and possible corruption of the file + system. Certainly this is the case if you are writing to the SD card + at the time of the removal. If you use the SD card for read-only access, + however, then I cannot think of any reason why removing the card without + mounting would be harmful. + +USB Ports +========= + + The SAMA5D3 series-MB features three USB communication ports: + + * Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed with + USB Device High Speed Micro AB connector, J20 + + * Port B Host High Speed (EHCI) and Full Speed (OHCI) standard type A + connector, J19 upper port + + * Port C Host Full Speed (OHCI) only standard type A connector, J19 + lower port + + All three USB host ports are equipped with 500 mA high-side power switch + for self-powered and bus powered applications. The USB device port feature + VBUS inserts detection function. + + Port A + ------ + + PIO Signal Name Function + ---- ----------- ------------------------------------------------------- + PD29 VBUS_SENSE VBus detection + PD25 EN5V_USBA VBus power enable (via MN15 AIC1526 Dual USB High-Side + Power Switch. The other channel of the switch is for + the LCD) + + Port B + ------ + + PIO Signal Name Function + ---- ----------- ------------------------------------------------------- + PD26 EN5V_USBB VBus power enable (via MN14 AIC1526 Dual USB High-Side + Power Switch). To the A1 pin of J19 Dual USB A + connector + + Port C + ------ + + PIO Signal Name Function + ---- ----------- ------------------------------------------------------- + PD27 EN5V_USBC VBus power enable (via MN14 AIC1526 Dual USB High-Side + Power Switch). To the B1 pin of J19 Dual USB A + connector + + Both Ports B and C + ------------------ + + PIO Signal Name Function + ---- ----------- ------------------------------------------------------- + PD28 OVCUR_USB Combined overrcurrent indication from port A and B + +USB High-Speed Device +===================== + + Basic USB High-Speed Device Configuration + ----------------------------------------- + + Support the USB high-speed device (UDPHS) driver can be enabled with these + NuttX configuration settings. + + Device Drivers -> USB Device Driver Support + CONFIG_USBDEV=y : Enable USB device support + CONFIG_USBDEV_DUALSPEED=y : Device support High and Full Speed + CONFIG_USBDEV_DMA=y : Device uses DMA + + System Type -> ATSAMA5 Peripheral Support + CONFIG_SAMA5_UDPHS=y : Enable UDPHS High Speed USB device + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + Mass Storage Class + ------------------ + + The Mass Storage Class (MSC) class driver is selected for use with + UDPHS: + + Device Drivers -> USB Device Driver Support + CONFIG_USBMSC=y : Enable the USB MSC class driver + CONFIG_USBMSC_EPBULKOUT=1 : Use EP1 for the BULK OUT endpoint + CONFIG_USBMSC_EPBULKIN=2 : Use EP2 for the BULK IN endpoint + + The following setting enables an add-on that can can be used to control + the USB MSC device. It will add two new NSH commands: + + a. msconn will connect the USB serial device and export the AT25 + to the host, and + b. msdis which will disconnect the USB serial device. + + Application Configuration -> System Add-Ons: + CONFIG_SYSTEM_USBMSC=y : Enable the USBMSC add-on + CONFIG_SYSTEM_USBMSC_NLUNS=1 : One LUN + CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 : Minor device zero + CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mtdblock0" + : Use a single, LUN: The AT25 + : block driver. + + NOTES: + + a. To prevent file system corruption, make sure that the AT25 is un- + mounted *before* exporting the mass storage device to the host: + + nsh> umount /mnt/at25 + nsh> mscon + + The AT25 can be re-mounted after the mass storage class is disconnected: + + nsh> msdis + nsh> mount -t vfat /dev/mtdblock0 /mnt/at25 + + b. If you change the value CONFIG_SYSTEM_USBMSC_DEVPATH1, then you + can export other file systems: + + "/dev/mmcsd1" will export the HSMCI1 microSD + "/dev/mmcsd0" will export the HSMCI0 full-size SD slot + "/dev/ram0" could even be used to export a RAM disk. But you would + first have to use mkrd to create the RAM disk and mkfatfs to put + a FAT file system on it. + + CDC/ACM Serial Device Class + --------------------------- + + This will select the CDC/ACM serial device. Defaults for the other + options should be okay. + + Device Drivers -> USB Device Driver Support + CONFIG_CDCACM=y : Enable the CDC/ACM device + CONFIG_CDCACM_BULKIN_REQLEN=768 : Default too small for high-speed + + The following setting enables an example that can can be used to control + the CDC/ACM device. It will add two new NSH commands: + + a. sercon will connect the USB serial device (creating /dev/ttyACM0), and + b. serdis which will disconnect the USB serial device (destroying + /dev/ttyACM0). + + Application Configuration -> Examples: + CONFIG_SYSTEM_CDCACM=y : Enable an CDC/ACM example + + Debugging USB Device + -------------------- + + There is normal console debug output available that can be enabled with + CONFIG_DEBUG + CONFIG_DEBUG_USB. However, USB device operation is very + time critical and enabling this debug output WILL interfere with the + operation of the UDPHS. USB device tracing is a less invasive way to get + debug information: If tracing is enabled, the USB device will save + encoded trace output in in-memory buffer; if the USB monitor is also + enabled, that trace buffer will be periodically emptied and dumped to the + system logging device (the serial console in this configuration): + + Device Drivers -> "USB Device Driver Support: + CONFIG_USBDEV_TRACE=y : Enable USB trace feature + CONFIG_USBDEV_TRACE_NRECORDS=256 : Buffer 256 records in memory + CONFIG_USBDEV_TRACE_STRINGS=y : (optional) + + Application Configuration -> NSH LIbrary: + CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH + CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor + + Application Configuration -> System NSH Add-Ons: + CONFIG_SYSTEM_USBMONITOR=y : Enable the USB monitor daemon + CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size + CONFIG_SYSTEM_USBMONITOR_PRIORITY=50 : USB monitor daemon priority + CONFIG_SYSTEM_USBMONITOR_INTERVAL=1 : Dump trace data every second + CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y : Enable TRACE output + CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y + CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y + CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y + CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y + + NOTE: If USB debug output is also enabled, both outputs will appear on the + serial console. However, the debug output will be asynchronous with the + trace output and, hence, difficult to interpret. + +USB High-Speed Host +=================== + + OHCI Only + --------- + + Support the USB low/full-speed OHCI host driver can be enabled by changing + the NuttX configuration file as follows: + + System Type -> ATSAMA5 Peripheral Support + CONFIG_SAMA5_UHPHS=y : USB Host High Speed + + System Type -> USB High Speed Host driver options + CONFIG_SAMA5_OHCI=y : Low/full-speed OHCI support + : Defaults for values probably OK + Device Drivers + CONFIG_USBHOST=y : Enable USB host support + + Device Drivers -> USB Host Driver Support + CONFIG_USBHOST_ISOC_DISABLE=y : Isochronous endpoints not used + CONFIG_USBHOST_MSC=y : Enable the mass storage class driver + CONFIG_USBHOST_HIDKBD=y : Enable the HID keyboard class driver + + RTOS Features -> Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : High priority worker thread support is required + CONFIG_SCHED_HPWORK=y : + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + EHCI + ---- + + Support the USB high-speed EHCI host driver can be enabled by changing the + NuttX configuration file as follows. If EHCI is enabled by itself, then + only high-speed devices can be supported. If OHCI is also enabled, then + all low-, full-, and high speed devices will work. + + System Type -> ATSAMA5 Peripheral Support + CONFIG_SAMA5_UHPHS=y : USB Host High Speed + + System Type -> USB High Speed Host driver options + CONFIG_SAMA5_EHCI=y : High-speed EHCI support + CONFIG_SAMA5_OHCI=y : Low/full-speed OHCI support + : Defaults for values probably OK for both + Device Drivers + CONFIG_USBHOST=y : Enable USB host support + CONFIG_USBHOST_INT_DISABLE=y : Interrupt endpoints not needed + CONFIG_USBHOST_ISOC_DISABLE=y : Isochronous endpoints not needed + + Device Drivers -> USB Host Driver Support + CONFIG_USBHOST_ISOC_DISABLE=y : Isochronous endpoints not used + CONFIG_USBHOST_MSC=y : Enable the mass storage class driver + CONFIG_USBHOST_HIDKBD=y : Enable the HID keyboard class driver + + RTOS Features -> Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : High priority worker thread support is required + CONFIG_SCHED_HPWORK=y : + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + USB Hub Support + ---------------- + + USB hub support can be included by adding the following changes to the configuration (in addition to those listed above): + + Drivers -> USB Host Driver Support + CONFIG_USBHOST_HUB=y : Enable the hub class + CONFIG_USBHOST_ASYNCH=y : Asynchonous I/O supported needed for hubs + + System Type -> USB High Speed Host driver options + CONFIG_SAMA5_OHCI_NEDS=12 : You will probably want more pipes + CONFIG_SAMA5_OHCI_NTDS=18 + CONFIG_SAMA5_OHCI_TDBUFFERS=12 + CONFIG_SAMA5_OHCI_TDBUFSIZE=128 + + Board Selection -> + CONFIG_SAMA5D3XEK_USBHOST_STACKSIZE=2048 (bigger than it needs to be) + + RTOS Features -> Work Queue Support + CONFIG_SCHED_LPWORK=y : Low priority queue support is needed + CONFIG_SCHED_LPNTHREADS=1 + CONFIG_SCHED_LPWORKSTACKSIZE=1024 + + NOTES: + + 1. It is necessary to perform work on the low-priority work queue + (vs. the high priority work queue) because deferred hub-related + work requires some delays and waiting that is not appropriate on + the high priority work queue. + + 2. Stack usage make increase when USB hub support is enabled because + the nesting depth of certain USB host class logic can increase. + + STATUS: + Hub support has not been verified on this board yet. + + Mass Storage Device Usage + ------------------------- + + Example Usage: + + NuttShell (NSH) NuttX-6.29 + nsh> ls /dev + /dev: + console + mtdblock0 + null + ttyS0 + + Here a USB FLASH stick is inserted. Nothing visible happens in the + shell. But a new device will appear: + + nsh> ls /dev + /dev: + console + mtdblock0 + null + sda + ttyS0 + nsh> mount -t vfat /dev/sda /mnt/sda + nsh> ls -l /mnt/sda + /mnt/sda: + -rw-rw-rw- 8788 viminfo + drw-rw-rw- 0 .Trash-1000/ + -rw-rw-rw- 3378 zmodem.patch + -rw-rw-rw- 1503 sz-1.log + -rw-rw-rw- 613 .bashrc + + HID Keyboard Usage + ------------------ + + If a (supported) USB keyboard is connected, a /dev/kbda device will appear: + + nsh> ls /dev + /dev: + console + kbda + mtdblock0 + null + ttyS0 + + /dev/kbda is a read-only serial device. Reading from /dev/kbda will get + keyboard input as ASCII data (other encodings are possible): + + nsh> cat /dev/kbda + + Debugging USB Host + ------------------ + + There is normal console debug output available that can be enabled with + CONFIG_DEBUG + CONFIG_DEBUG_USB. However, USB host operation is very time + critical and enabling this debug output might interfere with the operation + of the UDPHS. USB host tracing is a less invasive way to get debug + information: If tracing is enabled, the USB host will save encoded trace + output in in-memory buffer; if the USB monitor is also enabled, that trace + buffer will be periodically emptied and dumped to the system logging device + (the serial console in this configuration): + + Device Drivers -> "USB Host Driver Support: + CONFIG_USBHOST_TRACE=y : Enable USB host trace feature + CONFIG_USBHOST_TRACE_NRECORDS=256 : Buffer 256 records in memory + CONFIG_USBHOST_TRACE_VERBOSE=y : Buffer everything + + Application Configuration -> NSH LIbrary: + CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH + CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor + + Application Configuration -> System NSH Add-Ons: + CONFIG_SYSTEM_USBMONITOR=y : Enable the USB monitor daemon + CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size + CONFIG_SYSTEM_USBMONITOR_PRIORITY=50 : USB monitor daemon priority + CONFIG_SYSTEM_USBMONITOR_INTERVAL=1 : Dump trace data every second + + NOTE: If USB debug output is also enabled, both outpus will appear on the + serial console. However, the debug output will be asynchronous with the + trace output and, hence, difficult to interpret. + +NOR FLASH Support +================= + + Most of these configurations execute out of CS0 NOR flash and can only be + loaded via SAM-BA. These are the relevant configuration options the + define the NOR FLASH configuration: + + CONFIG_SAMA5_BOOT_CS0FLASH=y : Boot from FLASH on CS0 + CONFIG_BOOT_RUNFROMFLASH=y : Run in place on FLASH (vs copying to RAM) + + CONFIG_SAMA5_EBICS0=y : Enable CS0 external memory + CONFIG_SAMA5_EBICS0_SIZE=134217728 : Memory size is 128KB + CONFIG_SAMA5_EBICS0_NOR=y : Memory type is NOR FLASH + + CONFIG_FLASH_START=0x10000000 : Physical FLASH start address + CONFIG_FLASH_VSTART=0x10000000 : Virtual FLASH start address + CONFIG_FLASH_SIZE=134217728 : FLASH size (again) + + CONFIG_RAM_START=0x00300400 : Data stored after page table + CONFIG_RAM_VSTART=0x00300400 + CONFIG_RAM_SIZE=114688 : Available size of 128KB - 16KB for page table + + NOTE: In order to boot in this configuration, you need to close the BMS + jumper. + + STATUS: I have been unable to execute these configurations from NOR FLASH + by closing the BMS jumper (J9). As far as I can tell, this jumper does + nothing on my board??? So I have been using the norboot configuration + exclusively to start the program-under-test in NOR FLASH (see the section + entitled "Creating and Using NORBOOT" above.) + +SDRAM Support +============= + + SRAM Heap Configuration + ----------------------- + + In these configurations, .data and .bss are retained in ISRAM. SDRAM can + be initialized and included in the heap. Relevant configuration settings: + + System Type->ATSAMA5 Peripheral Support + CONFIG_SAMA5_MPDDRC=y : Enable the DDR controller + + System Type->External Memory Configuration + CONFIG_SAMA5_DDRCS=y : Tell the system that DRAM is at the DDR CS + CONFIG_SAMA5_DDRCS_SIZE=268435456 : 2Gb DRAM -> 256MB + CONFIG_SAMA5_DDRCS_LPDDR2=y : Its DDR2 + + Board Selection + CONFIG_SAMA5D3xEK_MT47H128M16RT=y : This is the type of DDR2 + + System Type->Heap Configuration + CONFIG_SAMA5_DDRCS_HEAP=y : Add the SDRAM to the heap + CONFIG_SAMA5_DDRCS_HEAP_OFFSET=0 + CONFIG_SAMA5_DDRCS_HEAP_SIZE=268435456 + + Memory Management + CONFIG_MM_REGIONS=2 : Two heap memory regions: ISRAM and SDRAM + + RAM Test + -------- + + Another thing you could do is to enable the RAM test built-in application. + You can enable the NuttX RAM test that may be used to verify the external + SDRAM. To do this, keep the SDRAM out of the heap so that it can be tested + without crashing programs using the memory: + + System Type->Heap Configuration + CONFIG_SAMA5_DDRCS_HEAP=n : Don't add the SDRAM to the heap + + Memory Management + CONFIG_MM_REGIONS=1 : One memory regions: ISRAM + + Then enable the RAM test built-in application: + + Application Configuration->System NSH Add-Ons->Ram Test + CONFIG_SYSTEM_RAMTEST=y + + In this configuration, the SDRAM is not added to heap and so is not + accessible to the applications. So the RAM test can be freely executed + against the SRAM memory beginning at address 0x2000:0000 (DDR CS): + + nsh> ramtest -h + Usage: [-w|h|b] + + Where: + starting address of the test. + number of memory locations (in bytes). + -w Sets the width of a memory location to 32-bits. + -h Sets the width of a memory location to 16-bits (default). + -b Sets the width of a memory location to 8-bits. + + To test the entire external 256MB SRAM: + + nsh> ramtest -w 20000000 268435456 + RAMTest: Marching ones: 20000000 268435456 + RAMTest: Marching zeroes: 20000000 268435456 + RAMTest: Pattern test: 20000000 268435456 55555555 aaaaaaaa + RAMTest: Pattern test: 20000000 268435456 66666666 99999999 + RAMTest: Pattern test: 20000000 268435456 33333333 cccccccc + RAMTest: Address-in-address test: 20000000 268435456 + + SDRAM Data Configuration + ------------------------ + + In these configurations, .data and .bss are retained in ISRAM by default. + .data and .bss can also be retained in SDRAM using these slightly + different configuration settings. In this configuration, ISRAM is + used only for the Cortex-A5 page table for the IDLE thread stack. + + System Type->ATSAMA5 Peripheral Support + CONFIG_SAMA5_MPDDRC=y : Enable the DDR controller + + System Type->External Memory Configuration + CONFIG_SAMA5_DDRCS=y : Tell the system that DRAM is at the DDR CS + CONFIG_SAMA5_DDRCS_SIZE=268435456 : 2Gb DRAM -> 256GB + CONFIG_SAMA5_DDRCS_LPDDR2=y : Its DDR2 + + Board Selection + CONFIG_SAMA5D3xEK_MT47H128M16RT=y : This is the type of DDR2 + + System Type->Heap Configuration + CONFIG_SAMA5_ISRAM_HEAP=n : These do not apply in this case + CONFIG_SAMA5_DDRCS_HEAP=n + + System Type->Boot Memory Configuration + CONFIG_RAM_START=0x20000000 : Physical address of SDRAM + CONFIG_RAM_VSTART=0x20000000 : Virtual address of SDRAM + CONFIG_RAM_SIZE=268435456 : Size of SDRAM + CONFIG_BOOT_SDRAM_DATA=y : Data is in SDRAM + + Care must be used applied these RAM locations; the graphics + configurations use SDRAM in an incompatible way to set aside + LCD framebuffers. + + Memory Management + CONFIG_MM_REGIONS=1 : One heap memory region: ISDRAM + +NAND Support +============ + + NAND support is only partial in that there is no file system that works + with it properly. Lower-level NAND support has been developed and + verified, but there is no way to use it in the current NuttX architecture + other than through the raw MTD interface. + + NAND should still be considered a work in progress. You will not want to + use NAND unless you are interested in investing a little effort, + particularly in infrastructure. See the "STATUS SUMMARY" section below. + + NAND Support + ------------ + + NAND Support can be added to the NSH configuration by modifying the + NuttX configuration file as follows: + + Build Setup + CONFIG_EXPERIMENTAL=y : NXFFS implementation is incomplete and + : not yet fully functional. + + System Type -> SAMA5 Peripheral support + CONFIG_SAMA5_HSMC=y : Make sure that the SMC is enabled + + Drivers -> Memory Technology Device (MTD) Support + CONFIG_MTD=y : Enable MTD support + CONFIG_MTD_NAND=y : Enable NAND support + CONFIG_MTD_NAND_BLOCKCHECK=n : Interferes with NXFFS bad block checking + CONFIG_MTD_NAND_SWECC=y : Use S/W ECC calculation + + Defaults for all other NAND settings should be okay + + System Type -> External Memory Configuration + CONFIG_SAMA5_EBICS3=y : Enable External CS3 memory + CONFIG_SAMA5_EBICS3_NAND=y : Select NAND memory type + CONFIG_SAMA5_EBICS3_SIZE=8388608 : Use this size + CONFIG_SAMA5_EBICS3_SWECC=y : Use S/W ECC calculation + + Defaults for ROM page table addresses should be okay + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : Use architecture-specific initialization + + NOTES: + + 1. WARNING: This will wipe out everything that you may have on the NAND + FLASH! I have found that using the JTAG with no valid image on NAND + or Serial FLASH is a problem: In that case, the code always ends up + in the SAM-BA bootloader. + + My understanding is that you can enable JTAG in this case by simply + entering any data on the DBG serial port. I have not tried this. + Instead, I just changed to boot from Serial Flash: + + 2. Booting from Serial Flash. The work around for this case is to put + the NORBOOT image into Serial FLASH. Then, the system will boot from + Serial FLASH by copying the NORBOOT image in SRAM which will run and + then start the image in NOR FLASH. See the discussion of the NORBOOT + configuration in the "Creating and Using NORBOOT" section above. + + NOTE that there is jumper on the CM module that must be closed to enable + use of the AT25 Serial Flash. Also, if you are using using SAM-BA, + make sure that you load the NOR boot program into the boot area via + the pull-down menu. + + 3. Unfortunately, there are no appropriate NAND file system in NuttX as + of this writing. The following sections discussion issues/problems + with using NXFFS and FAT. + + PMECC + ----- + + Hardware ECC calculation using the SAMA5D3's PMECC can be enable as + follows: + + Drivers -> Memory Technology Device (MTD) Support + CONFIG_MTD_NAND_SWECC=y : Don't use S/W ECC calculation + CONFIG_MTD_NAND_HWECC=y : Use H/W ECC instead + + System Type -> External Memory Configuration + CONFIG_SAMA5_EBICS3_SWECC=n : Don't use S/W ECC calculation + CONFIG_SAMA5_HAVE_PMECC=n : Use H/W ECC instead + + Other PMECC-related default settings should be okay. + + STATUS: As of the writing, NAND transfers using PMECC appear to + work correctly. However, the PMECC based systems do not work as + as well with FAT or NXFFS. My belief that that the FAT/NXFFS layers + are inappropriate for NAND and, as a result, happen not to work with + the PMECC ECC calculation. See also the "STATUS SUMMARY" section below. + + DMA Support + ----------- + + DMA support can be enabled as follows: + + System Type -> SAMA5 Peripheral support + CONFIG_SAMA5_DMAC0=y : Use DMAC0 for memory-to-memory DMA + + System Type -> External Memory Configuration + CONFIG_SAMA5_NAND_DMA=y : Use DMAC0 for NAND data transfers + + STATUS: DMA appears to be functional, but probably has not been + exercised enough to claim that with any certainty. See also the "STATUS + SUMMARY" section below. + + NXFFS + ----- + + The NuttX FLASH File System (NXFFS) works well with NOR-like FLASH + but does not work well with NAND (See comments below under STATUS) + + File Systems: + CONFIG_FS_NXFFS=y : Enable the NXFFS file system + + Defaults for all other NXFFS settings should be okay. + + NOTE: NXFFS will require some significant buffering because of + the large size of the NAND flash blocks. You will also need + to enable SDRAM as described above. + + Board Selection + CONFIG_SAMA5D3XEK_NAND_BLOCKMOUNT=y : Enable FS support on NAND + CONFIG_SAMA5D3xEK_NAND_NXFFS=y : Use the NXFFS file system + + Other file systems are not recommended because only NXFFS can handle + bad blocks and only NXFFS performs wear-levelling. + + FAT + --- + + Another option is FAT. FAT, however, is not appropriate for use with + NAND: FAT will not handle bad blocks, does not perform any wear + levelling, and may not conform to writing ordering requirements of NAND. + Also, there appear to be issues with FAT when PMECC is enabled (see + "STATUS SUMMARY" below). + + File Systems: + CONFIG_FS_FAT=y : Enable the FAT FS + CONFIG_FAT_LCNAMES=y : With lower case name support + CONFIG_FAT_LFN=y : And (patented) FAT long file name support + CONFIG_FS_NXFFS=n : Don't need NXFFS + + Defaults for all other NXFFS settings should be okay. + + Board Selection + CONFIG_SAMA5D3XEK_NAND_BLOCKMOUNT=y : Enable FS support on NAND + CONFIG_SAMA5D3xEK_NAND_FTL=y : Use an flash translation layer + + NOTE: FTL will require some significant buffering because of + the large size of the NAND flash blocks. You will also need + to enable SDRAM as described above. + + SMART FS + -------- + + Another option is Smart FS. Smart FS is another small file system + designed to work with FLASH. Properties: It does support some wear- + leveling like NXFFS, but like FAT, cannot handle bad blocks and like + NXFFS, it will try to re-write erased bits. + + Using NAND with NXFFS + --------------------- + + With the options CONFIG_SAMA5D3XEK_NAND_BLOCKMOUNT=y and + CONFIG_SAMA5D3xEK_NAND_NXFFS=y, the NAND FLASH will be mounted in the NSH + start-up logic before the NSH prompt appears. There is no feedback as + to whether or not the mount was successful. You can, however, see the + mounted file systems using the nsh 'mount' command: + + nsh> mount + /mnt/nand type nxffs + + Then NAND can be used like any other file system: + + nsh> echo "This is a test" >/mnt/nand/atest.txt + nsh> ls -l /mnt/nand + /mnt/nand: + ---x--x--x 16 atest.txt + nsh> cat /mnt/nand/atest.txt + This is a test + + The NAND volume can be un-mounted with this comment: + + nsh> umount /mnt/nand + nsh> mount + + And re-mounted with this command: + + nsh> mount -t nxffs /mnt/mystuff + nsh> mount + /mnt/mystuff type nxffs + + NOTES: + 1. NXFFS can be very slow. The first time that you start the system, + be prepared for a wait; NXFFS will need to format the NAND volume. + I have lots of debug on so I don't yet know what the optimized wait + will be. But with debug ON, software ECC, and no DMA the wait is + in many tens of minutes (and substantially longer if many debug + options are enabled. + + [I don't yet have data for the more optimal cases. It will be + significantly less, but still not fast.] + + 2. On subsequent boots, after the NXFFS file system has been created + the delay will be less. When the new file system is empty, it will + be very fast. But the NAND-related boot time can become substantial + when there has been a lot of usage of the NAND. This is because + NXFFS needs to scan the NAND device and build the in-memory dataset + needed to access NAND and there is more that must be scanned after + the device has been used. You may want to create a separate thread at + boot time to bring up NXFFS so that you don't delay the boot-to-prompt + time excessively in these longer delay cases. + + 3. There is another NXFFS related performance issue: When the FLASH + is fully used, NXFFS will restructure the entire FLASH, the delay + to restructure the entire FLASH will probably be even larger. This + solution in this case is to implement an NXFSS clean-up daemon that + does the job a little-at-a-time so that there is no massive clean-up + when the FLASH becomes full. + + 4. Bad NXFFS behavior with NAND: If you restart NuttX, the files that + you wrote to NAND will be gone. Why? Because the multiple writes + have corrupted the NAND ECC bits. See STATUS below. NXFFS would + require a major overhaul to be usable with NAND. + + Using NAND with FAT + ------------------- + + If configured for FAT, the system will create block driver at + /dev/mtdblock0: + + NuttShell (NSH) + nsh> ls /dev + /dev: + console + mtdblock0 + null + ttyS0 + + You will not that the system comes up immediately because there is not + need to scan the volume in this case.. + + The NSH 'mkfatfs' command can be used to format a FAT file system on + NAND. + + nsh> mkfatfs /dev/mtdblock0 + + This step, on the other hand, requires quite a bit of time. + + And the FAT file system can be mounted like: + + nsh> mount -t vfat /dev/mtdblock0 /mnt/nand + nsh> ls /mnt/nand + /mnt/nand: + + nsh> echo "This is a test" > /mnt/nand/atest.txt + + NOTE: This will take a long time because it will require reading, + modifying, and re-writing the 128KB erase page! + + nsh> ls -l /mnt/nand + /mnt/nand: + -rw-rw-rw- 16 atest.txt + + nsh> cat /mnt/fat/atest.txt + This is a test + + NOTES: + + 1. Unlike NXFFS, FAT can work with NAND (at least with PMECC disabled). + But there are some significant issues. + + 2. First, each NAND write access will cause a 256KB data transfer: It + will read the entire 128KB erase block, modify it and write it back + to memory. There is some caching logic so that this cached erase + block can be re-used if possible and writes will be deferred as long + as possible. + + 3. If you hit a bad block, then FAT is finished. There is no mechanism + in place in FAT not to mark and skip over bad blocks. + + What is Needed + -------------- + + What is needed to work with FAT properly would be another MTD layer + between the FTL layer and the NAND FLASH layer. That layer would + perform bad block detection and sparing so that FAT works transparently + on top of the NAND. + + Another, less general, option would be support bad blocks within FAT. + + STATUS SUMMARY + -------------- + + 1. PMECC appears to be working in that I can write a NAND block with its + ECC and read the block back and verify that that is are no bit + failures. However, when attempting to work with FAT, it does not + work correctly: The MBR is written and read back correctly, but gets + corrupted later for unknown reasons. + + 2. DMA works (at least with software ECC), but I have seen occasional + failures. I recommend enabling DMA with caution. + + In NuttX, DMA will also cost two context switches (and, hence, four + register state transfers). With smaller NAND page sizes (say 2KiB and + below), I would expect little or no performance improvement with DMA + for this reason. + + 3. NXFFS does not work with NAND. NAND differs from other other FLASH + types several ways. For one thing, NAND requires error correction + (ECC) bytes that must be set in order to work around bit failures. + This affects NXFFS in two ways: + + a. First, write failures are not fatal. Rather, they should be tried by + bad blocks and simply ignored. This is because unrecoverable bit + failures will cause read failures when reading from NAND. Setting + the CONFIG_EXPERIMENTAL+CONFIG_NXFFS_NANDs option will enable this + behavior. + + b. Secondly, NXFFS will write a block many times. It tries to keep + bits in the erased state and assumes that it can overwrite those bits + to change them from the erased to the non-erased state. This works + will with NOR-like FLASH. NAND behaves this way too. But the + problem with NAND is that the ECC bits cannot be re-written in this + way. So once a block has been written, it cannot be modified. This + behavior has NOT been fixed in NXFFS. Currently, NXFFS will attempt + to re-write the ECC bits causing the ECC to become corrupted because + the ECC bits cannot be overwritten without erasing the entire block. + + This may prohibit NXFFS from ever being used with NAND. + + 4. As mentioned above, FAT does work but (1) has some performance issues on + writes and (2) cannot handle bad blocks. + + 5. There was a major reorganization of the SAMA5 code after NuttX-7.11 to + add support for the SAMA5D2. Only the SAMA5D4-EK nsh configuration was + re-verified on 2015-09-29. But as of this writing, none of the SAMA5D3- + EK configurations a been re-verified. Some regression testing is needed. + +AT24 Serial EEPROM +================== + + AT24 Connections + ---------------- + + A AT24C512 Serial EEPPROM was used for tested I2C. There are other I2C/TWI + devices on-board, but the serial EEPROM is the simplest test. + + There is, however, no AT24 EEPROM on board the SAMA5D3x-EK: The Serial + EEPROM was mounted on an external adaptor board and connected to the + SAMA5D3x-EK thusly: + + - VCC -- VCC + - GND -- GND + - TWCK0(PA31) -- SCL + - TWD0(PA30) -- SDA + + By default, PA30 and PA31 are SWJ-DP pins, it can be used as a pin for TWI + peripheral in the end application. + + Configuration Settings + ---------------------- + + The following configuration settings were used: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_TWI0=y : Enable TWI0 + + System Type -> TWI device driver options + SAMA5_TWI0_FREQUENCY=100000 : Select a TWI frequency + + Device Drivers -> I2C Driver Support + CONFIG_I2C=y : Enable I2C support + + Device Drivers -> Memory Technology Device (MTD) Support + CONFIG_MTD=y : Enable MTD support + CONFIG_MTD_AT24XX=y : Enable the AT24 driver + CONFIG_AT24XX_SIZE=512 : Specifies the AT 24C512 part + CONFIG_AT24XX_ADDR=0x53 : AT24 I2C address + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + File systems + CONFIG_NXFFS=y : Enables the NXFFS file system + CONFIG_NXFFS_PREALLOCATED=y : Required + : Other defaults are probably OK + + Board Selection + CONFIG_SAMA5D3xEK_AT24_BLOCKMOUNT=y : Mounts AT24 for NSH + CONFIG_SAMA5D3xEK_AT24_NXFFS=y : Mount the AT24 using NXFFS + + You can then format the AT24 EEPROM for a FAT file system and mount the + file system at /mnt/at24 using these NSH commands: + + nsh> mkfatfs /dev/mtdblock0 + nsh> mount -t vfat /dev/mtdblock0 /mnt/at24 + + Then you an use the FLASH as a normal FAT file system: + + nsh> echo "This is a test" >/mnt/at24/atest.txt + nsh> ls -l /mnt/at24 + /mnt/at24: + -rw-rw-rw- 16 atest.txt + nsh> cat /mnt/at24/atest.txt + This is a test + +I2C Tool +======== + + I2C Tool. NuttX supports an I2C tool at apps/system/i2c that can be used + to peek and poke I2C devices. That tool can be enabled by setting the + following: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_TWI0=y : Enable TWI0 + CONFIG_SAMA5_TWI1=y : Enable TWI1 + CONFIG_SAMA5_TWI2=y : Enable TWI2 + + System Type -> TWI device driver options + SAMA5_TWI0_FREQUENCY=100000 : Select a TWI0 frequency + SAMA5_TWI1_FREQUENCY=100000 : Select a TWI1 frequency + SAMA5_TWI2_FREQUENCY=100000 : Select a TWI2 frequency + + Device Drivers -> I2C Driver Support + CONFIG_I2C=y : Enable I2C support + + Application Configuration -> NSH Library + CONFIG_SYSTEM_I2CTOOL=y : Enable the I2C tool + CONFIG_I2CTOOL_MINBUS=0 : TWI0 has the minimum bus number 0 + CONFIG_I2CTOOL_MAXBUS=2 : TWI2 has the maximum bus number 2 + CONFIG_I2CTOOL_DEFFREQ=100000 : Pick a consistent frequency + + The I2C tool has extensive help that can be accessed as follows: + + nsh> i2c help + Usage: i2c [arguments] + Where is one of: + + Show help : ? + List busses : bus + List devices : dev [OPTIONS] + Read register : get [OPTIONS] [] + Show help : help + Write register: set [OPTIONS] [] + Verify access : verf [OPTIONS] [] [] + + Where common "sticky" OPTIONS include: + [-a addr] is the I2C device address (hex). Default: 03 Current: 03 + [-b bus] is the I2C bus number (decimal). Default: 0 Current: 0 + [-r regaddr] is the I2C device register address (hex). Default: 00 Current: 00 + [-w width] is the data width (8 or 16 decimal). Default: 8 Current: 8 + [-s|n], send/don't send start between command and data. Default: -n Current: -n + [-i|j], Auto increment|don't increment regaddr on repititions. Default: NO Current: NO + [-f freq] I2C frequency. Default: 100000 Current: 100000 + + NOTES: + o Arguments are "sticky". For example, once the I2C address is + specified, that address will be re-used until it is changed. + + WARNING: + o The I2C dev command may have bad side effects on your I2C devices. + Use only at your own risk. + + As an example, the I2C dev comman can be used to list all devices + responding on TWI0 (the default) like this: + + nsh> i2c dev 0x03 0x77 + 0 1 2 3 4 5 6 7 8 9 a b c d e f + 00: -- -- -- -- -- -- -- -- -- -- -- -- -- + 10: -- -- -- -- -- -- -- -- -- -- 1a -- -- -- -- -- + 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 30: -- -- -- -- -- -- -- -- -- 39 -- -- -- 3d -- -- + 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 60: 60 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 70: -- -- -- -- -- -- -- -- + nsh> + + Address 0x1a is the WM8904. Address 0x39 is the SIL9022A. I am not sure + what is at address 0x3d and 0x60 + +CAN Usage +========= + I planned to verify CAN using the IXXAT USB-to-CAN Compact. This section + provides miscellaneous CAN-related notes, mostly to myself but perhaps of + interest to others. + + [Unfortunately, as of this writing, I still do not have a proper CAN test + bed to verify the CAN driver.] + + CAN Configuration + ----------------- + + The following steps illustrate how to enable CAN0 and/or CAN1 in the NuttX + configuration: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_CAN0=y : Select CAN0 and/or CAN1 + CONFIG_SAMA5_CAN1=y + + Device Drivers -> CAN Driver Support + CONFIG_CAN=y : (Automatically selected) + CONFIG_CAN_EXTID=y : For extended, 29-bit CAN IDs + + System Type -> CAN Drive Support + CONFIG_SAMA5_CAN0_BAUD=250000 : Select some BAUD for CAN0 (if enabled) + CONFIG_SAMA5_CAN0_NRECVMB=1 : Select number of receive mailboxes (see below) + CONFIG_SAMA5_CAN1_BAUD=250000 : Select some BAUD for CAN1 (if enabled) + CONFIG_SAMA5_CAN1_NRECVMB=1 : Select number of receive mailboxes (see below) + + Receive Mailboxes and Address Filtering + --------------------------------------- + + The SAMA5 CAN0 peripheral supports 8 mailboxes that can be used for sending + and receiving messages. Note that the number of dedicated receive mailboxes + (CONFIG_SAMA5_CANn_NRECVMB) was set to one in the above configuration. This + could be set to any value from 1 to 3 (the upper limit of 3 is purely + arbrary and can be increased with some minor code enhancement). The + remainder can be configured dynamically to send CAN messages. + + Why would you want to use more than one receive mailbox? There are two + reasons. Multiple receive mailboxes might needed to either (1) receive + bursts of messages, or (2) to support multiple groups of messages filtered + on message ID. + + You must also specify the address filtering for each dedicated receive mailbox: + + System Type -> CAN Drive Support + CONFIG_SAMA5_CAN0_ADDR0 and CONFIG_SAMA5_CAN0_MASK0 : If CONFIG_SAMA5_CAN0_NRECVMB >= 1 + CONFIG_SAMA5_CAN0_ADDR1 and CONFIG_SAMA5_CAN0_MASK1 : If CONFIG_SAMA5_CAN0_NRECVMB >= 2 + CONFIG_SAMA5_CAN0_ADDR2 and CONFIG_SAMA5_CAN0_MASK2 : If CONFIG_SAMA5_CAN0_NRECVMB >= 3 + CONFIG_SAMA5_CAN1_ADDR0 and CONFIG_SAMA5_CAN1_MASK0 : If CONFIG_SAMA5_CAN1_NRECVMB >= 1 + CONFIG_SAMA5_CAN1_ADDR1 and CONFIG_SAMA5_CAN1_MASK1 : If CONFIG_SAMA5_CAN1_NRECVMB >= 2 + CONFIG_SAMA5_CAN1_ADDR2 and CONFIG_SAMA5_CAN1_MASK2 : If CONFIG_SAMA5_CAN1_NRECVMB >= 3 + + Only messages that have IDs that match the CONFIG_SAMA5_CANn_ADDRn when both + the received and the configured address are masked by CONFIG_SAMA5_CANn_MASKn + will be accepted. For example, if the mask is all ones, then only messasges + with exact address matches will be accepted; if the mask is all zeroes than + any address will be accepted. + + CAN connectors + -------------- + + CAN1 and CAN2 are available via RJ-11 connectors on the SAMA5D3x-EK. Each + is wired as follows. Also shown below is the matching pins if you want connect + the CAN to a device that uses an DB-9 connector (Such as the IXXAT USB-to-CAN + Compact). Both connector types (as well as RJ-45) are common. + + +----------+ RJ-11 DB-9 + | O | ----------- -------------- + +------------+ | | Pin 1 3v3 Pin 1 N/C + | +--+ | | o5 | Pin 2 5v Pin 2 CANL + | | | | | o9 | Pin 3 N/C Pin 3 GND + | +-+ +-+ | | o4 | Pin 4 CANL Pin 4 N/C + | | | | | o8 | Pin 5 CANH Pin 5 N/C + | |654321| | | o3 | Pin 6 N/C Pin 6 N/C + | |oooooo| | | o7 | Pin 7 CANH + | +------+ | | o2 | Pin 8 N/C + +------------+ | o6 | Pin 9 CANV+ (N/C on IXXAT) RJ-11 Female | x1 | + | | + | O | + +----------+ + DB-9 Male + +SAMA5 ADC Support +================= + + Basic driver configuration + -------------------------- + ADC support can be added to the NSH configuration. However, there are no + ADC input pins available to the user for ADC testing (the touchscreen ADC + inputs are intended for other functionality). Because of this, there is + not much motivation to enable ADC support on the SAMA5D3x-EK. This + paragraph is included here, however, for people using a custom SAMA5D3x + board that requires ADC support. + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_ADC=y : Enable ADC driver support + CONFIG_SAMA5_TC0=y : Enable the Timer/counter library need for periodic sampling + + Drivers + CONFIG_ANALOG=y : Should be automatically selected + CONFIG_ADC=y : Should be automatically selected + + System Type -> ADC Configuration + CONFIG_SAMA5_ADC_CHAN0=y : These settings enable the sequencer to collect + CONFIG_SAMA5_ADC_CHAN1=y : Samples from ADC channels 0-3 on each trigger + CONFIG_SAMA5_ADC_CHAN2=y + CONFIG_SAMA5_ADC_CHAN3=y + CONFIG_SAMA5_ADC_SEQUENCER=y + + CONFIG_SAMA5_ADC_TIOA0TRIG=y : Trigger on the TC0, channel 0 output A + CONFIG_SAMA5_ADC_TIOAFREQ=2 : At a frequency of 2Hz + CONFIG_SAMA5_ADC_TIOA_RISING=y : Trigger on the rising edge + + Default ADC settings (like gain and offset) may also be set if desired. + + System Type -> Timer/counter Configuration + CONFIG_SAMA5_TC0_TIOA0=y : Should be automatically selected + + Work queue supported is also needed: + + Library routines + CONFIG_SCHED_WORKQUEUE=y + + ADC Test Example + ---------------- + For testing purposes, there is an ADC program at apps/examples/adc that + will collect a specified number of samples. This test program can be + enabled as follows: + + Application Configuration -> Examples -> ADC example + CONFIG_EXAMPLES_ADC=y : Enables the example code + CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0" + + Other default settings for the ADC example should be okay. + + ADC DMA Support + --------------- + At 2Hz, DMA is not necessary nor desire-able. The ADC driver has support + for DMA transfers of converted data (although that support has not been + tested as of this writing). DMA support can be added by include the + following in the configuration. + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_DMAC1=y : Enable DMAC1 support + + System Type -> ADC Configuration + CONFIG_SAMA5_ADC_DMA=y : Enable ADC DMA transfers + CONFIG_SAMA5_ADC_DMASAMPLES=2 : Collect two sets of samples per DMA + + Drivers -> Analog device (ADC/DAC) support + CONFIG_ADC_FIFOSIZE=16 : Driver may need a large ring buffer + + Application Configuration -> Examples -> ADC example + CONFIG_EXAMPLES_ADC_GROUPSIZE=16 : Larger buffers in the test + +SAMA5 PWM Support +================= + + Basic driver configuration + -------------------------- + PWM support can be added to the NSH configuration. However, there are no + PWM output pins available to the user for PWM testing. Because of this, + there is not much motivation to enable PWM support on the SAMA5D3x-EK. This + paragraph is included here, however, for people using a custom SAMA5D3x + board that requires PWM support. + + Basic driver configuration: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_PWM=y : Enable PWM driver support + + Drivers + CONFIG_PWM=y : Should be automatically selected + + PWM Channel/Output Selection + ---------------------------- + In order to use the PWM, you must enable one or more PWM Channels: + + System Type -> PWM Configuration + CONFIG_SAMA5_PWM_CHAN0=y : Enable one or more of channels 0-3 + CONFIG_SAMA5_PWM_CHAN1=y + CONFIG_SAMA5_PWM_CHAN2=y + CONFIG_SAMA5_PWM_CHAN3=y + + For each channel that is enabled, you must also specify the output pins + to be enabled and the clocking supplied to the PWM channel. + + CONFIG_SAMA5_PWM_CHANx_FAULTINPUT=n : (not used currently) + CONFIG_SAMA5_PWM_CHANx_OUTPUTH=y : Enable One of both of the H and L output pins + CONFIG_SAMA5_PWM_CHANx_OUTPUTL=y + + Where x=0..3. + + Care must be taken because all PWM output pins conflict with some other + usage of the pin by other devices. Furthermore, many of these pins have + not been brought out to an external connector: + + -----+---+---+----+------+---------------- + PWM PIN PER PIO I/O CONFLICTS + -----+---+---+----+------+---------------- + PWM0 FI B PC28 J2.30 SPI1, ISI + H B PB0 --- GMAC + B PA20 J1.14 LCDC, ISI + L B PB1 --- GMAC + B PA21 J1.16 LCDC, ISI + -----+---+---+----+------+---------------- + PWM1 FI B PC31 J2.36 HDMI + H B PB4 --- GMAC + B PA22 J1.18 LCDC, ISI + L B PB5 --- GMAC + B PE31 J3.20 ISI, HDMI + B PA23 J1.20 LCDC, ISI + -----+---+---+----+------+---------------- + PWM2 FI B PC29 J2.29 UART0, ISI, HDMI + H C PD5 --- HSMCI0 + B PB8 --- GMAC + L C PD6 --- HSMCI0 + B PB9 --- GMAC + -----+---+---+----+------+---------------- + PWM3 FI C PD16 --- SPI0, Audio + H C PD7 --- HSMCI0 + B PB12 J3.7 GMAC + L C PD8 --- HSMCI0 + B PB13 --- GMAC + -----+---+---+----+-------------------- + + See configs/sama5d3x-ek/include/board.h for all of the default PWM + pin selections. I used PWM channel 0, pins PA20 and PA21 for testing. + + Clocking is addressed in the next paragraph. + + PWM Clock Configuration + ----------------------- + PWM Channels can be clocked from either a coarsely divided divided down + MCK or from a custom frequency from PWM CLKA and/or CLKB. If you want + to use CLKA or CLKB, you must enable and configure them. + + System Type -> PWM Configuration + CONFIG_SAMA5_PWM_CLKA=y + CONFIG_SAMA5_PWM_CLKA_FREQUENCY=3300 + CONFIG_SAMA5_PWM_CLKB=y + CONFIG_SAMA5_PWM_CLKB_FREQUENCY=3300 + + Then for each of the enabled, channels you must select the input clock + for that channel: + + System Type -> PWM Configuration + CONFIG_SAMA5_PWM_CHANx_CLKA=y : Pick one of MCK, CLKA, or CLKB (only) + CONFIG_SAMA5_PWM_CHANx_CLKB=y + CONFIG_SAMA5_PWM_CHANx_MCK=y + CONFIG_SAMA5_PWM_CHANx_MCKDIV=128 : If MCK is selected, then the MCK divider must + : also be provided (1,2,4,8,16,32,64,128,256,512, or 1024). + + PWM Test Example + ---------------- + For testing purposes, there is an PWM program at apps/examples/pwm that + will collect a specified number of samples. This test program can be + enabled as follows: + + Application Configuration -> Examples -> PWM example + CONFIG_EXAMPLES_PWM=y : Enables the example code + + Other default settings for the PWM example should be okay. + + CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm0" + CONFIG_EXAMPLES_PWM_FREQUENCY=100 + + Usage of the example is straightforward: + + nsh> pwm -h + Usage: pwm [OPTIONS] + + Arguments are "sticky". For example, once the PWM frequency is + specified, that frequency will be re-used until it is changed. + + "sticky" OPTIONS include: + [-p devpath] selects the PWM device. Default: /dev/pwm0 Current: /dev/pwm0 + [-f frequency] selects the pulse frequency. Default: 100 Hz Current: 100 Hz + [-d duty] selects the pulse duty as a percentage. Default: 50 % Current: 50 % + [-t duration] is the duration of the pulse train in seconds. Default: 5 Current: 5 + [-h] shows this message and exits + +RTC +=== + + The Real Time Clock/Calendar RTC) may be enabled with these settings: + + System Type: + CONFIG_SAMA5_RTC=y : Enable the RTC driver + + Drivers (these values will be selected automatically): + CONFIG_RTC=y : Use the RTC for system time + CONFIG_RTC_DATETIME=y : RTC supports data/time + + You can set the RTC using the NSH date command: + + NuttShell (NSH) NuttX-7.3 + nsh> help date + date usage: date [-s "MMM DD HH:MM:SS YYYY"] + nsh> date + Jan 01 00:34:45 2012 + nsh> date -s "JUN 29 7:30:00 2014" + nsh> date + Jun 29 07:30:01 2014 + + After a power cycle and reboot: + + NuttShell (NSH) NuttX-7.3 + nsh> date + Jun 29 07:30:55 2014 + nsh> + + The RTC also supports an alarm that may be enable with the following + settings. However, there is nothing in the system that currently makes + use of this alarm. + + Drivers: + CONFIG_RTC_ALARM=y : Enable the RTC alarm + + Library Routines + CONFIG_SCHED_WORKQUEUE=y : Alarm needs work queue support + +Watchdog Timer +============== + + NSH can be configured to exercise the watchdog timer test + (apps/examples/watchdog). This can be selected with the following + settings in the NuttX configuration file: + + System Type: + CONFIG_SAMA5_WDT=y : Enable the WDT peripheral + : Defaults in "RTC Configuration" should be OK + + Drivers (this will automatically be selected): + CONFIG_WATCHDOG=y : Enables watchdog timer driver support + + Application Configuration -> Examples + CONFIG_EXAMPLES_WATCHDOG=y : Enable apps/examples/watchdog + + The WDT timer is driven off the slow, 32768Hz clock divided by 128. As a + result, the watchdog a maximum timeout value of 16 seconds. The SAMA5 WDT + may also only be programmed one time; the processor must be reset before + the WDT can be reprogrammed. + + The SAMA5 always boots with the watchdog timer enabled at its maximum + timeout (16 seconds). In the normal case where no watchdog timer driver + has been configured, the watchdog timer is disabled as part of the start + up logic. But, since we are permitted only one opportunity to program + the WDT, we cannot disable the watchdog time if CONFIG_SAMA5_WDT=y. So, + be forewarned: You have only 16 seconds to run your watchdog timer test! + + NOTE: If you are using the norboot program to run from FLASH as I did, + beware that the default version also disables the watchdog. You will + need a special version of norboot with CONFIG_SAMA5_WDT=y. + +TRNG and /dev/random +==================== + + NSH can be configured to enable the SAMA5 TRNG peripheral so that it + provides /dev/random. The following configuration will enable the TRNG, + and support for /dev/random: + + System Type: + CONFIG_SAMA5_TRNG=y : Enable the TRNG peripheral + + Drivers: + CONFIG_DEV_RANDOM=y : Enable /dev/random + + A simple test of /dev/random is available at apps/examples/random and + can be enabled as a NSH application via the following additional + configuration settings: + + Applications -> Examples + CONFIG_EXAMPLES_RANDOM=y : Enable apps/examples/random + CONFIG_EXAMPLES_MAXSAMPLES=64 : Default settings are probably OK + CONFIG_EXAMPLES_NSAMPLES=8 + +Touchscreen Testing +=================== + + You can enable the touchscreen by modifying the configuration in the + following ways: + + System Type: + CONFIG_SAMA5_ADC=y : ADC support is required + CONFIG_SAMA5_TSD=y : Enabled touchcreen device support + SAMA5_TSD_4WIRE=y : 4-Wire interface with pressure + + You might want to tinker with the SWAPXY and THRESHX and THRESHY settings + to get the result that you want. + + Drivers: + CONFIG_INPUT=y : (automatically selected) + + Board Selection: + CONFIG_SAMA5D3xEK_TSD_DEVMINOR=0 : Register as /dev/input0 + + Library Support: + CONFIG_SCHED_WORKQUEUE=y : Work queue support required + + These options may also be applied to enable a built-in touchscreen test + application: + + Application Configuration: + CONFIG_EXAMPLES_TOUCHSCREEN=y : Enable the touchscreen built-int test + CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0 : To match the board selection + CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0" + + Defaults should be okay for all related settings. + +Tickless OS +=========== + + Background + ---------- + By default, a NuttX configuration uses a periodic timer interrupt that + drives all system timing. The timer is provided by architecture-specifi + code that calls into NuttX at a rate controlled by CONFIG_USEC_PER_TICK. + The default value of CONFIG_USEC_PER_TICK is 10000 microseconds which + corresponds to a timer interrupt rate of 100 Hz. + + An option is to configure NuttX to operation in a "tickless" mode. Some + limitations of default system timer are, in increasing order of + importance: + + - Overhead: Although the CPU usage of the system timer interrupt at 100Hz + is really very low, it is still mostly wasted processing time. One most + timer interrupts, there is really nothing that needs be done other than + incrementing the counter. + - Resolution: Resolution of all system timing is also determined by + CONFIG_USEC_PER_TICK. So nothing that be time with resolution finer than + 10 milliseconds be default. To increase this resolution, + CONFIG_USEC_PER_TICK an be reduced. However, then the system timer + interrupts use more of the CPU bandwidth processing useless interrupts. + - Power Usage: But the biggest issue is power usage. When the system is + IDLE, it enters a light, low-power mode (for ARMs, this mode is entered + with the wfi or wfe instructions for example). But each interrupt + awakens the system from this low power mode. Therefore, higher rates + of interrupts cause greater power consumption. + + The so-called Tickless OS provides one solution to issue. The basic + concept here is that the periodic, timer interrupt is eliminated and + replaced with a one-shot, interval timer. It becomes event driven + instead of polled: The default system timer is a polled design. On + each interrupt, the NuttX logic checks if it needs to do anything + and, if so, it does it. + + Using an interval timer, one can anticipate when the next interesting + OS event will occur, program the interval time and wait for it to fire. + When the interval time fires, then the scheduled activity is performed. + + Configuration + ------------- + The following configuration options will enable support for the Tickless + OS for the SAMA5D platforms using TC0 channels 0-3 (other timers or + timer channels could be used making the obvious substitutions): + + RTOS Features -> Clocks and Timers + CONFIG_SCHED_TICKLESS=y : Configures the RTOS in tickless mode + CONFIG_SCHED_TICKLESS_ALARM=n : (option not implemented) + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_TC0=y : Enable TC0 (TC channels 0-3 + + System Type -> Timer/counter Configuration + CONFIG_SAMA5_ONESHOT=y : Enables one-shot timer wrapper + CONFIG_SAMA5_FREERUN=y : Enabled free-running timer wrapper + CONFIG_SAMA5_TICKLESS_ONESHOT=0 : Selects TC0 channel 0 for the one-shot + CONFIG_SAMA5_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free- + : running timer + + The resolution of the clock is provided by the CONFIG_USEC_PER_TICK + setting in the configuration file. + + NOTE: In most cases, the slow clock will be used as the timer/counter + input. You should enable the 32.768KHz crystal for the slow clock by + calling sam_sckc_enable(). Otherwise, you will be doing all system + timing using the RC clock! UPDATE: This will now be selected by default + when you configure for TICKLESS support. + + The slow clock has a resolution of about 30.518 microseconds. Ideally, + the value of CONFIG_USEC_PER_TICK should be the exact clock resolution. + Otherwise there will be cumulative timing inaccuracies. But a choice + choice of: + + CONFIG_USEC_PER_TICK=31 + + will have an error of 0.6% and will have inaccuracies that will + effect the time due to long term error build-up. + + UPDATE: As of this writing (2015-12-03), the Tickless support is + functional. However, there are inaccuracies in delays. For example, + + nsh> sleep 10 + + results in a delay of maybe 5.4 seconds. But the timing accuracy is + correct if all competing uses of the interval timer are disabled (mostly + from the high priority work queue). Therefore, I conclude that this + inaccuracy is due to the inaccuracies in the representation of the clock + rate. 30.518 usec cannot be represented accurately. Each timing + calculation results in a small error. When the interval timer is very + busy, long delays will be divided into many small pieces and each small + piece has a large error in the calculation. The cumulative error is the + cause of the problem. + + SAMA5 Timer Usage + ----------------- + This current implementation uses two timers: A one-shot timer to + provide the timed events and a free running timer to provide the current + time. Since timers are a limited resource, that could be an issue on + some systems. + + We could do the job with a single timer if we were to keep the single + timer in a free-running at all times. The SAMA5 timer/counters have + 32-bit counters with the capability to generate a compare interrupt when + the timer matches a compare value but also to continue counting without + stopping (giving another, different interrupt when the timer rolls over + from 0xffffffff to zero). So we could potentially used the just set the compare + at the number of ticks you want PLUS the current value of timer. Then + you could have both with a single timer: An interval timer and a free- + running counter with the same timer! In this case, you would want to + to set CONFIG_SCHED_TICKLESS_ALARM in the NuttX configuration. + + Patches are welcome! + +OV2640 Camera Interface +======================= + + SAMA5D3x PIN SAMA5D3x-EK OV2640 + PIO PER SIGNAL ISI Socket J11 + ---- --- ------------- --- ------------ ---------------------------------------- + --- 1 VDDISI --- + --- 2 GND --- + --- 3 VDDISI --- + --- 4 GND --- + PE28 ? ? 5 ZB_SLPTR ??? + PE29 ? ? 6 ZB_RST C6 RESETB Reset mode (?) + PC27 B TWI1_CK 7 TWCK1 C2 SIO_C SCCB serial interface clock input + PC26 B TWI1_D 8 TWD1 C1 SIO_D SCCB serial interface data I/O + --- 9 GND --- + PD31 B PCK1 (ISI_MCK) 10 ISI_MCK C4 XVCLK System clock input (?) + --- 11 GND --- + PA30 C ISI_VSYNC 12 ISI_VSYNC D2 VSYNC Vertical synchronization + --- 13 GND --- + PA31 C ISI_HSYNC 14 ISI_HSYNC C3 HREF Horizontal reference output (?) + --- 15 GND --- + PC30 C ISI_PCK 16 ISI_PCK E3 PCLK Pixel clock output + --- 17 GND --- + PA16 C ISI_D0 18 ISI_D0 E2 Y0 Video port output bit[0] + PA17 C ISI_D1 19 ISI_D1 E1 Y1 Video port output bit[1] + PA18 C ISI_D2 20 ISI_D2 F3 Y2 Video port output bit[2] + PA19 C ISI_D3 21 ISI_D3 G3 Y3 Video port output bit[3] + PA20 C ISI_D4 22 ISI_D4 F4 Y4 Video port output bit[4] + PA21 C ISI_D5 23 ISI_D5 G4 Y5 Video port output bit[5] + PA22 C ISI_D6 24 ISI_D6 E5 Y6 Video port output bit[6] + PA23 C ISI_D7 25 ISI_D7 G5 Y7 Video port output bit[7] + PC29 C ISI_D8 26 ISI_D8 F5 Y8 Video port output bit[8] + PC28 C ISI_D9 27 ISI_D9 G6 Y9 Video port output bit[9] + PC27 C ISI_D10 28 ISI_D10 --- + PC26 C ISI_D11 29 ISI_D11 --- + --- 30 GND --- + + ??? ?? A2 EXPST_B Snapshot exposure start trigger + ??? ?? A6 STROBE Flash control output + ??? ?? B2 FREX Snapshot trigger + ??? ?? B6 PWDN Power-down mode enable + +I2S Audio Support +================= + + The SAMA5D3x-EK has two devices on-board that can be used for verification + of I2S functionality: HDMI and a WM8904 audio CODEC. As of this writing, + the I2S driver is present, but there are not drivers for either the HDMI + or the WM8904. + + WM8904 Audio CODEC Interface + ---------------------------- + + ------------- ---------------- ----------------- ---------------------- + WM8904 SAMA5D3 NuttX Pin Name External Access + ------------- ---------------- ----------------- ---------------------- + 3 SDA PA30 TWD0 PIO_TWI0_D J1 Pin 34 + 2 SCLK PA31 TWCK0 PIO_TWI0_CK J1 Pin 36 + 28 MCLK PD30 PCK0 PIO_PMC_PCK0 (Not available) + 29 BCLK/GPIO4 PC16 TK PIO_SSC0_TK J2 Pin 6 + "" " " PC19 RK PIO_SSC0_RK J2 Pin 12 + 30 LRCLK PC17 TF PIO_SSC0_TF J2 Pin 8 + "" " " PC20 RF PIO_SSC0_RF J2 Pin 14 + 31 ADCDAT PC21 RD PIO_SSC0_RD J2 Pin 16 + 32 DACDAT PC18 TD PIO_SSC0_TD J2 Pin 10 + 1 IRQ/GPIO1 PD16 INT_AUDIO N/A (Not available) + ------------- ---------------- ----------------- ---------------------- + Ground at Pins 3,4,37,38 + + WM8904 Configuration + -------------------- + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_DMAC0=y : DMAC0 required by SSC0 + CONFIG_SAMA5_TWI0=y : Enable TWI0 driver support + CONFIG_SAMA5_SSCO=y : Enable SSC0 driver support + + System Type -> SSC0 Configuration + CONFIG_SAMA5_SSC_MAXINFLIGHT=16 + CONFIG_SAMA5_SSC0_DATALEN=16 + + Device Drivers -> I2C Driver Support + CONFIG_I2C=y : Enable I2C support + CONFIG_I2C_EXCHANGE=y : Support the exchange method + CONFIG_I2C_RESET=n : (Maybe y, if you have bus problems) + + System Type -> SSC Configuration + CONFIG_SAMA5_SSC_MAXINFLIGHT=16 : Up to 16 pending DMA transfers + CONFIG_SAMA5_SSC0_DATALEN=16 : 16-bit data + CONFIG_SAMA5_SSC0_RX=y : Support a receiver (although it is not used!) + CONFIG_SAMA5_SSC0_RX_RKINPUT=y : Receiver gets clock the RK0 input + CONFIG_SAMA5_SSC0_RX_FSLEN=1 : Minimal frame sync length + CONFIG_SAMA5_SSC0_RX_STTDLY=1 : Start delay + CONFIG_SAMA5_SSC0_TX=y : Support a transmitter + CONFIG_SAMA5_SSC0_TX_RXCLK=y : Transmitter gets clock the RXCLCK + CONFIG_SAMA5_SSC0_TX_FSLEN=0 : Disable frame synch generation + CONFIG_SAMA5_SSC0_TX_STTDLY=1 : Start delay + CONFIG_SAMA5_SSC0_TX_TKOUTPUT_NONE=y : No output + + Audio + CONFIG_AUDIO=y : Audio support needed + CONFIG_AUDIO_FORMAT_PCM=y : Only PCM files are supported + CONFIG_AUDIO_NUM_BUFFERS=8 : Number of audio buffers + CONFIG_AUDIO_BUFFER_NUMBYTES=8192 : Audio buffer size + + Drivers -> Audio + CONFIG_I2S=y : General I2S support + CONFIG_AUDIO_DEVICES=y : Audio device support + CONFIG_AUDIO_WM8904=y : Build WM8904 driver character driver + + Board Selection + CONFIG_SAMA5D3xEK_WM8904_I2CFREQUENCY=400000 + CONFIG_SAMA5D3xEK_WM8904_SRCMAIN=y : WM8904 MCLK is the SAMA5D Main Clock + + Library Routines + CONFIG_SCHED_WORKQUEUE=y : MW8904 driver needs work queue support + + The NxPlayer + ------------ + + The NxPlayer is a audio library and command line application for playing + audio file. The NxPlayer can be found at apps/system/nxplayer. If you + would like to add the NxPlayer, here are some recommended configuration + settings. + + First of all, the NxPlayer depends on the NuttX audio subsystem. See the + "WM8904 Configuration" above for an example of how the audio subsystem is + configured to use the WM8904 CODED with PCM decoding. + + Then the NxPlayer can be enabled as follows: + + System Libraries and NSH Add-Ons -> NxPlayer media player / command line -> + CONFIG_SYSTEM_NXPLAYER=y : Build the NxPlayer library + CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500 : Size of the audio player stack + CONFIG_NXPLAYER_COMMAND_LINE=y : Build command line application + CONFIG_NXPLAYER_INCLUDE_HELP=y : Includes a help command + CONFIG_NXPLAYER_INCLUDE_DEVICE_SEARCH=n : (Since there is only one audio device) + CONFIG_NXPLAYER_INCLUDE_PREFERRED_DEVICE=y : Only one audio device is supported + CONFIG_NXPLAYER_FMT_FROM_EXT=y : (Since only PCM is supported) + CONFIG_NXPLAYER_FMT_FROM_HEADER=n : (Since only PCM is supported) + CONFIG_NXPLAYER_INCLUDE_MEDIADIR=y : Specify a media directory + CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/music" : See nxplayer configuration + CONFIG_NXPLAYER_RECURSIVE_MEDIA_SEARCH=y : Search all sub-directories + CONFIG_NXPLAYER_INCLUDE_SYSTEM_RESET=y : Add support for reset command + + You must include the full path to the location where NxPlayer can find the + media files. That path is given by CONFIG_NXPLAYER_DEFAULT_MEDIADIR. + Here I use the example "/mnt/scard". That is a location where you could, + for example, mount an MMC/SD card driver. + + I2S Loopback Test + ----------------- + + The I2S driver was verified using a special I2C character driver (at + nuttx/drivers/audio/i2schar.c) and a test driver at apps/examples/i2schar. + The I2S driver was verified in loopback mode with no audio device. + + This section describes the modifications to the NSH configuration that were + used to perform the I2S testing: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_SSCO=y : Enable SSC0 driver support + CONFIG_SAMA5_DMAC0=y : DMAC0 required by SSC0 + + Alternatively, SSC1 could have be used: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_SSC1=y : Enable SSC0 driver support + CONFIG_SAMA5_DMAC0=y : DMAC0 required by SSC0 + + System Type -> SSC Configuration + CONFIG_SAMA5_SSC_MAXINFLIGHT=16 : Up to 16 pending DMA transfers + CONFIG_SAMA5_SSC0_MASTER=y : Master mode + CONFIG_SAMA5_SSC0_DATALEN=16 : 16-bit data + CONFIG_SAMA5_SSC0_RX=y : Support a receiver + CONFIG_SAMA5_SSC0_RX_RKINPUT=y : Receiver gets clock from RK input + CONFIG_SAMA5_SSC0_RX_FSLEN=2 : Pick some matching frame synch length + CONFIG_SAMA5_SSC0_TX=y : Support a transmitter + CONFIG_SAMA5_SSC0_TX_MCKDIV=y : Transmitter gets clock from MCK/2 + CONFIG_SAMA5_SSC0_TX_FSLEN=2 : Pick some matching frame synch length + CONFIG_SAMA5_SSC0_MCKDIV_SAMPLERATE=48000 : Sampling at 48K samples/sec + CONFIG_SAMA5_SSC0_TX_TKOUTPUT_XFR=y : Outputs clock on TK when transferring data + CONFIG_SAMA5_SSC0_LOOPBACK=y : Loopmode mode connects RD/TD and RK/TK + + Audio + CONFIG_AUDIO=y : Audio support needed + : Defaults should be okay + + Drivers -> Audio + CONFIG_I2S=y : General I2S support + CONFIG_AUDIO_DEVICES=y : Audio device support + CONFIG_AUDIO_I2SCHAR=y : Build I2S character driver + + The following describes how I have the test application at + apps/examples/i2schar configured: + + CONFIG_EXAMPLES_I2SCHAR=y + CONFIG_EXAMPLES_I2SCHAR_DEVPATH="/dev/i2schar0" + CONFIG_EXAMPLES_I2SCHAR_TX=y + CONFIG_EXAMPLES_I2SCHAR_TXBUFFERS=4 + CONFIG_EXAMPLES_I2SCHAR_TXSTACKSIZE=1536 + CONFIG_EXAMPLES_I2SCHAR_RX=y + CONFIG_EXAMPLES_I2SCHAR_RXBUFFERS=4 + CONFIG_EXAMPLES_I2SCHAR_RXSTACKSIZE=1536 + CONFIG_EXAMPLES_I2SCHAR_BUFSIZE=256 + CONFIG_EXAMPLES_I2SCHAR_DEVINIT=y + + Board Selection + CONFIG_SAMA5D3xEK_I2SCHAR_MINOR=0 + CONFIG_SAMA5D3xEK_SSC_PORT=0 : 0 or SSC0, 1 for SSC1 + + Library Routines + CONFIG_SCHED_WORKQUEUE=y : Driver needs work queue support + +SAMA5D3x-EK Configuration Options +================================= + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH="arm" + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXA5=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="sama5" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_SAMA5=y + + and one of: + + CONFIG_ARCH_CHIP_ATSAMA5D31=y + CONFIG_ARCH_CHIP_ATSAMA5D33=y + CONFIG_ARCH_CHIP_ATSAMA5D34=y + CONFIG_ARCH_CHIP_ATSAMA5D35=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD="sama5d3x-ek" (for the SAMA5D3x-EK development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SAMA5D3X_EK=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x0002000 (128Kb) + + CONFIG_RAM_START - The physical start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_RAM_VSTART - The virutal start address of installed DRAM + + CONFIG_RAM_VSTART=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibrate + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_SAMA5_DBGU - Debug Unit + CONFIG_SAMA5_PIT - Periodic Interval Timer + CONFIG_SAMA5_WDT - Watchdog timer + CONFIG_SAMA5_HSMC - Multi-bit ECC + CONFIG_SAMA5_SMD - SMD Soft Modem + CONFIG_SAMA5_USART0 - USART 0 + CONFIG_SAMA5_USART1 - USART 1 + CONFIG_SAMA5_USART2 - USART 2 + CONFIG_SAMA5_USART3 - USART 3 + CONFIG_SAMA5_UART0 - UART 0 + CONFIG_SAMA5_UART1 - UART 1 + CONFIG_SAMA5_TWI0 - Two-Wire Interface 0 + CONFIG_SAMA5_TWI1 - Two-Wire Interface 1 + CONFIG_SAMA5_TWI2 - Two-Wire Interface 2 + CONFIG_SAMA5_HSMCI0 - High Speed Multimedia Card Interface 0 + CONFIG_SAMA5_HSMCI1 - High Speed Multimedia Card Interface 1 + CONFIG_SAMA5_HSMCI2 - High Speed Multimedia Card Interface 2 + CONFIG_SAMA5_SPI0 - Serial Peripheral Interface 0 + CONFIG_SAMA5_SPI1 - Serial Peripheral Interface 1 + CONFIG_SAMA5_TC0 - Timer Counter 0 (ch. 0, 1, 2) + CONFIG_SAMA5_TC1 - Timer Counter 1 (ch. 3, 4, 5) + CONFIG_SAMA5_PWM - Pulse Width Modulation Controller + CONFIG_SAMA5_ADC - Touch Screen ADC Controller + CONFIG_SAMA5_DMAC0 - DMA Controller 0 + CONFIG_SAMA5_DMAC1 - DMA Controller 1 + CONFIG_SAMA5_UHPHS - USB Host High Speed + CONFIG_SAMA5_UDPHS - USB Device High Speed + CONFIG_SAMA5_GMAC - Gigabit Ethernet MAC + CONFIG_SAMA5_EMACA - Ethernet MAC (Type A) + CONFIG_SAMA5_LCDC - LCD Controller + CONFIG_SAMA5_ISI - Image Sensor Interface + CONFIG_SAMA5_SSC0 - Synchronous Serial Controller 0 + CONFIG_SAMA5_SSC1 - Synchronous Serial Controller 1 + CONFIG_SAMA5_CAN0 - CAN controller 0 + CONFIG_SAMA5_CAN1 - CAN controller 1 + CONFIG_SAMA5_SHA - Secure Hash Algorithm + CONFIG_SAMA5_AES - Advanced Encryption Standard + CONFIG_SAMA5_TDES - Triple Data Encryption Standard + CONFIG_SAMA5_TRNG - True Random Number Generator + CONFIG_SAMA5_ARM - Performance Monitor Unit + CONFIG_SAMA5_FUSE - Fuse Controller + CONFIG_SAMA5_MPDDRC - MPDDR controller + + Some subsystems can be configured to operate in different ways. The drivers + need to know how to configure the subsystem. + + CONFIG_SAMA5_PIOA_IRQ - Support PIOA interrupts + CONFIG_SAMA5_PIOB_IRQ - Support PIOB interrupts + CONFIG_SAMA5_PIOC_IRQ - Support PIOD interrupts + CONFIG_SAMA5_PIOD_IRQ - Support PIOD interrupts + CONFIG_SAMA5_PIOE_IRQ - Support PIOE interrupts + + CONFIG_USART0_ISUART - USART0 is configured as a UART + CONFIG_USART1_ISUART - USART1 is configured as a UART + CONFIG_USART2_ISUART - USART2 is configured as a UART + CONFIG_USART3_ISUART - USART3 is configured as a UART + + AT91SAMA5 specific device driver settings + + CONFIG_SAMA5_DBGU_SERIAL_CONSOLE - selects the DBGU + for the console and ttyDBGU + CONFIG_SAMA5_DBGU_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_SAMA5_DBGU_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_SAMA5_DBGU_BAUD - The configure BAUD of the DBGU. + CONFIG_SAMA5_DBGU_PARITY - 0=no parity, 1=odd parity, 2=even parity + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARITY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + AT91SAMA5 USB Host Configuration + Pre-requisites + + CONFIG_USBDEV - Enable USB device support + CONFIG_USBHOST - Enable USB host support + CONFIG_SAMA5_UHPHS - Needed + CONFIG_SAMA5_OHCI - Enable the STM32 USB OTG FS block + CONFIG_SCHED_WORKQUEUE - Worker thread support is required + + Options: + + CONFIG_SAMA5_OHCI_NEDS + Number of endpoint descriptors + CONFIG_SAMA5_OHCI_NTDS + Number of transfer descriptors + CONFIG_SAMA5_OHCI_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_SAMA5_OHCI_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_INT_DISABLE + Disable interrupt endpoint support + CONFIG_USBHOST_ISOC_DISABLE + Disable isochronous endpoint support + CONFIG_USBHOST_BULK_DISABLE + Disable bulk endpoint support + +config SAMA5_OHCI_REGDEBUG + +Configurations +============== + + Information Common to All Configurations + ---------------------------------------- + Each SAMA5D3x-EK configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh sama5d3x-ek/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on USART1 (J8). + + 3. All of these configurations use the Code Sourcery for Windows toolchain + (unless stated otherwise in the description of the configuration). That + toolchain selection can easily be reconfigured using 'make menuconfig'. + Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Microsoft Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin or other POSIX environment + + System Type -> Toolchain: + CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for windows + + That same configuration will work with Atmel GCC toolchain. The only + change required to use the Atmel GCC toolchain is to change the PATH + variable so that those tools are selected instead of the CodeSourcery + tools. Try 'which arm-none-eabi-gcc' to make sure that you are + selecting the right tool. + + The setenv.sh file is available for you to use to set the PATH + variable. The path in the that file may not, however, be correct + for your installation. + + See also the "NOTE about Windows native toolchains" in the section call + "GNU Toolchain Options" above. + + !!!WARNING!!! The first time that you type 'make', the system will + configure itself based on the settings in the .config file. One of + these settings can cause a lot of confusion if you configure the build + in the wrong state: If you are running on Linux, make *certain* that + you have CONFIG_HOST_LINUX=y *before* the first make or you will + create a very corrupt configuration that may not be easy to recover + from. + + 4. The SAMA5Dx is running at 396MHz by default in these configurations. + This is because the original timing for the PLLs, NOR FLASH, and SDRAM + came from the Atmel NoOS sample code which runs at that rate. + + The SAMA5Dx is capable of running at 528MHz, however, and is easily + re-configured: + + Board Selection -> CPU Frequency + CONFIG_SAMA5D3xEK_396MHZ=n # Disable 396MHz operation + CONFIG_SAMA5D3xEK_528MHZ=y # Enable 528MHz operation + + If you switch to 528MHz, you should also check the loop calibration + value in your .config file. Of course, it would be best to re-calibrate + the timing loop, but these values should get you in the ballpark: + + CONFIG_BOARD_LOOPSPERMSEC=49341 # Calibrated on SAMA5D3-EK at 396MHz + # running from ISRAM + CONFIG_BOARD_LOOPSPERMSEC=65775 # Calibrated on SAMA4D3-Xplained at + # 528MHz running from SDRAM + + Operation at 528MHz has been verified but is not the default in these + configurations because most testing was done at 396MHz. NAND has not + been verified at these rates. + + 5. By default, all of these configurations run from ISRAM or NOR FLASH + (as indicated below in each description of the configuration). + Operation from SDRAM is also an option as described in the paragraph + entitled, "Running NuttX from SDRAM." + + Configuration Sub-directories + ----------------------------- + Summary: Some of the descriptions below are long and wordy. Here is the + concise summary of the available SAMA5D3x-EK configurations: + + demo: This is an NSH configuration that supports as much functionality + as possible. That is why it gets its name: It attempts to show as + much as possible + hello: The tiniest configuration possible (almost). It just says + "Hello, World!" On the serial console. It is so tiny that it is + able to run entirely out of internal SRAM (all of the other + configurations except norboot use NOR FLASH for .text and internal + SRAM for .data and .bass). This configuration is only useful for + bring-up. + norboot: + This is a little program to help debug of code in NOR flash. I wrote + it because I don't yet understand how to get the SAMA5 to boot from + NOR FLASH. See the description below and the section above entitled + "Creating and Using NORBOOT" for more information + nsh: This is another NSH configuration, not too different from the + demo configuration. The nsh configuration is, however, bare bones. + It is the simplest possible NSH configuration and is useful as a + platform for debugging and integrating new features in isolation. + nx: A simple test using the NuttX graphics system (NX) that has been + used to verify the SAMA5D3x-EK TFT LCD. This test case focuses on + general window controls, movement, mouse and keyboard input. It + requires no user interaction. + nxplayer: A command line media player using the on-board WM8904 audio + CODEC. + nxwm: This is a special configuration setup for the NxWM window manager + UnitTest. It integrates support for both the SAMA5 LCDC and the + SAMA5 ADC touchscreen controller and provides a more advance + graphics demo. It provides an interactive windowing experience. + ov2640: A test of the SAMA5 ISI using an OV2640 camera. INCOMPLETE! + + There may be issues with some of these configurations. See the details + before of the status of individual configurations. + + Now for the gory details: + + demo: + + This configuration directory provide the NuttShell (NSH). There are + two NSH configurations: nsh and demo. The difference is that nsh is + intended to be a very simple NSH configuration upon which you can build + further functionality. The demo configuration, on the other hand, is + intended to be a rich configuration that shows many features all working + together. + + See also the NOTES associated with the nsh configuration for other hints + about features that can be included with this configuration. + + NOTES: + 1. This configuration uses the default USART1 serial console. That + is easily changed by reconfiguring to (1) enable a different + serial peripheral, and (2) selecting that serial peripheral as + the console device. + + 2. By default, this configuration is set up to build on Windows + under either a Cygwin or MSYS environment using a recent, Windows- + native, generic ARM EABI GCC toolchain (such as the CodeSourcery + toolchain). Both the build environment and the toolchain + selection can easily be changed by reconfiguring: + + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + If you are running on Linux, make *certain* that you have + CONFIG_HOST_LINUX=y *before* the first make or you will create a + corrupt configuration that may not be easy to recover from. See + the warning in the section "Information Common to All Configurations" + for further information. + + 3. This configuration executes out of CS0 NOR flash and can only + be loaded via SAM-BA. The are the relevant configuration options + are provided above in the section entitled "NOR FLASH Support". + + 4. Data resides in ISRAM, but can be moved to SDRAM as described above + under "SDRAM Data Configuration." + + The following features are pre-enabled in the demo configuration, but not + in the nsh configuration: + + 5. SDRAM is supported. .data and .bss is still retained in ISRAM, but + SDRAM is initializeed and the SDRAM memory is included in the heap. + Relevant configuration settings are provided in the paragraph entitled + "SDRAM Support" above. + + 6. The Real Time Clock/Calendar (RTC) is enabled. See the section entitled + "RTC" above. + + 7. The Embest or Ronetix CPU module includes an Atmel AT25DF321A, + 32-megabit, 2.7-volt SPI serial flash. Support for that serial + FLASH can is enabled in this configuration. See the paragraph + entitle "AT25 Serial FLASH" for detailed configuration settings. + + 8. Support for HSMCI car slots. The SAMA5D3x-EK provides a two SD memory + card slots: (1) a full size SD card slot (J7 labelled MCI0), and (2) + a microSD memory card slot (J6 labelled MCI1). The full size SD card + slot connects via HSMCI0; the microSD connects vi HSMCI1. Relevant + configuration settings can be found in the section entitled "HSMCI + Card Slots" above. + + 9. Support the USB high-speed device (UDPHS) driver is enabled. See the + section above entitled "USB High-Speed Device" for relevant NuttX + configuration settings. + + 10. The USB high-speed EHCI and the low-/full- OHCI host drivers are supported + in this configuration. See the section above entitle "USB High-Speed Host" + for relevant configuration information. + + 11. Support SAMA5D3 TRNG peripheral is enabled so that it provides + /dev/random. See the section entitled "TRNG and /dev/random" + above for detailed configuration information. + + STATUS: + See the To-Do list below + + 2014-3-30: I some casual retesting, I am seeing some slow boot- + up times and possible microSD card issues. I will + need to revisit this. + hello: + + This configuration directory, performs the (almost) simplest of all + possible examples: examples/hello. This just comes up, says hello + on the serial console and terminates. This configuration is of + value during bring-up because it is small and can run entirely out + of internal SRAM. + + NOTES: + 1. This configuration uses the default USART1 serial console. That + is easily changed by reconfiguring to (1) enable a different + serial peripheral, and (2) selecting that serial peripheral as + the console device. + + 2. By default, this configuration is set up to build on Windows + under either a Cygwin or MSYS environment using a recent, Windows- + native, generic ARM EABI GCC toolchain (such as the CodeSourcery + toolchain). Both the build environment and the toolchain + selection can easily be changed by reconfiguring: + + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + If you are running on Linux, make *certain* that you have + CONFIG_HOST_LINUX=y *before* the first make or you will create a + corrupt configuration that may not be easy to recover from. See + the warning in the section "Information Common to All Configurations" + for further information. + + 3. This configuration executes out of internal SRAM and can only + be loaded via JTAG. + + CONFIG_SAMA5_BOOT_ISRAM=y : Boot into internal SRAM + CONFIG_BOOT_RUNFROMISRAM=y : Run from internal SRAM + + STATUS: + See the To-Do list below + + norboot: + This is a little program to help debug of code in NOR flash. It + does the following: + + - It enables and configures NOR FLASH, then + - Waits for you to break in with GDB. + + At that point, you can set the PC and begin executing from NOR FLASH + under debug control. See the section entitled "Creating and Using + NORBOOT" above. + + NOTES: + + 1. This program derives from the hello configuration. All of the + notes there apply to this configuration as well. + + 2. The default norboot program initializes the NOR memory, + displays a message and halts. The norboot program can also be + configured to jump directly into NOR FLASH without requiring the + final halt and go by setting CONFIG_SAMA5D3xEK_NOR_START=y in the + NuttX configuration. + + 3. Be aware that the default norboot also disables the watchdog. + Since you will not be able to re-enable the watchdog later, you may + need to set CONFIG_SAMA5_WDT=y in the NuttX configuration file. + + 4. If you put norboot on the Serial FLASH, you can automatically + boot to NOR on reset. See the section "Creating and Using NORBOOT" + above. + + STATUS: + See the To-Do list below + + nsh: + + This configuration directory provide the NuttShell (NSH). There are + two NSH configurations: nsh and demo. The difference is that nsh is + intended to be a very simple NSH configuration upon which you can build + further functionality. The demo configuration, on the other hand, is + intended to be a rich configuration that shows many features all working + together. + + NOTES: + 1. This configuration uses the default USART1 serial console. That + is easily changed by reconfiguring to (1) enable a different + serial peripheral, and (2) selecting that serial peripheral as + the console device. + + 2. By default, this configuration is set up to build on Windows + under either a Cygwin or MSYS environment using a recent, Windows- + native, generic ARM EABI GCC toolchain (such as the CodeSourcery + toolchain). Both the build environment and the toolchain + selection can easily be changed by reconfiguring: + + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + If you are running on Linux, make *certain* that you have + CONFIG_HOST_LINUX=y *before* the first make or you will create a + corrupt configuration that may not be easy to recover from. See + the warning in the section "Information Common to All Configurations" + for further information. + + 3. This configuration executes out of CS0 NOR flash and can only + be loaded via SAM-BA. The are the relevant configuration options + are provided above in the section entitled "NOR FLASH Support". + + 4. This configuration has support for NSH built-in applications enabled. + However, no built-in applications are selected in the base configuration. + + 5. Data resides in ISRAM, but can be moved to SDRAM as described above + under "SDRAM Data Configuration." + + 6. This configuration has support for the FAT file system built in. However, + by default, there are no block drivers initialized. The FAT file system can + still be used to create RAM disks. + + 7. SDRAM support can be enabled by modifying your NuttX configuration as + described above in the paragraph entitle "SDRAM Support" + + 8. The Embest or Ronetix CPU module includes an Atmel AT25DF321A, + 32-megabit, 2.7-volt SPI serial flash. Support for that serial + FLASH can be enabled by modifying the NuttX configuration as + described above in the paragraph entitled "AT25 Serial FLASH". + + 9. Enabling HSMCI support. The SAMA5D3x-EK provides a two SD memory card + slots: (1) a full size SD card slot (J7 labeled MCI0), and (2) a + microSD memory card slot (J6 labeled MCI1). The full size SD card + slot connects via HSMCI0; the microSD connects vi HSMCI1. Support + for both SD slots can be enabled with the settings provided in the + paragraph entitled "HSMCI Card Slots" above. + + 10. Support the USB low-, high- and full-speed OHCI host driver can be enabled + by changing the NuttX configuration file as described in the section + entitled "USB High-Speed Host" above. + + 11. Support the USB high-speed USB device driver (UDPHS) can be enabled + by changing the NuttX configuration file as described above in the + section entitled "USB High-Speed Device." + + 12. AT24 Serial EEPROM. A AT24C512 Serial EEPPROM was used for tested + I2C. There is, however, no AT24 EEPROM on board the SAMA5D3x-EK: + The serial EEPROM was mounted on an external adaptor board and + connected to the SAMA5D3x-EK thusly. See the section above entitle + "AT24 Serial EEPROM" for further information. + + 13. I2C Tool. NuttX supports an I2C tool at apps/system/i2c that can be + used to peek and poke I2C devices. See the discussion above under + "I2C Tool" for detailed configuration settings. + + 14. Networking support via the can be added to NSH by modifying the + configuration. See the "Networking" section above for detailed + configuration settings. + + 15. You can enable the touchscreen and a touchscreen by following the + configuration instrcutions in the section entitled "Touchscreen + Testing" above. + + 16. The Real Time Clock/Calendar (RTC) may be enabled by reconfiguring NuttX. + See the section entitled "RTC" above for detailed configuration settings. + + 17. This example can be configured to exercise the watchdog timer test + (apps/examples/watchdog). See the detailed configuration settings in + the section entitled "Watchdog Timer" above. + + 18. This example can be configured to enable the SAMA5 TRNG peripheral so + that it provides /dev/random. See the section entitled "TRNG and + /dev/random" above for detailed configuration information. + + 19. See also the sections above for additional configuration options: + "AT24 Serial EEPROM", "CAN Usage", "SAMA5 ADC Support", "SAMA5 PWM + Support", "OV2640 Camera Interface", "I2S Audio Support" + + STATUS: + See the To-Do list below + + I2C + 2013-9-12: I have been unsuccessful getting the external serial + AT24 EEPROM to work. I am pretty sure that this is a problem with + my external AT24 board (the TWI0 bus hangs when the AT24 is plugged + in). I will skip the AT24 integration since it is not on the critical + path at the moment. + 2013-9-12: The I2C tool, however, seems to work well. It succesfully + enumerates the devices on the bus and successfully exchanges a few + commands. The real test of the come later when a real I2C device is + integrated. + + nx: + + A simple test using the NuttX graphics system (NX) that has been used to + verify the SAMA5D3x-EK TFT LCD. This test case focuses on general + window controls, movement, mouse and keyboard input. It requires no + user interaction. + + nxplayer + + A command line media player using the on-board WM8904 audio CODEC. + This configuration is based on the nsh configuration above with the + following extensions: + + a. It runs at 528MHz + b. It includes SDRAM support + c. Support for the WM8904 audio CODEC is enabled along with + support for TWI0, SSC0, and DMAC0 needed by the SM8904. + d. Support for the full size SD card slot (HSMCI0) is enable + e. The NxPlayer command line media player is built in. + + NOTES: + + 1. See the NOTEs for the nsh configuration. Since this configuration + derives from that configuration, all notes apply. + + 2. Using NxPlayer + + This configuration depends on media files in the default mountpoint + at /music. You will need to mount the media before running + NxPlayer, Here are the general steps to play a file: + + a. You will need an (full size) SD card containing the .WAV files + that you want to play (.WAV is only format supported as of this + writing). That SD card should be inserted in the HSMCI0 media + slot A (best done before powering up). + + b. If the NuttX auto-mounter is enabled and properly configured, + then the FAT file system appear at /music. If the auto- + mounter is not enabled, then here are the steps to manually + mount the FAT file system: + + Then from NSH prompt, you need to mount the media volume like: + + nsh> mount -t vfat /dev/mmcsd0 /music + + NOTE: There is an auto-mounter that could be used to eliminate + this step. The auto mounter is not enabled or integrated into + in this configuration, however. See the section entitle + "Auto-Mounter " above. + + c. You can then see the available .wav files like: + + nsh>ls /music + + d. Then you can run the media player like: + + nsh> nxplayer + nxplayer> device pcm0 + nxplayer> play + + where is name or path of the .WAV file to be playerd. + + nxwm: + + This is a special configuration setup for the NxWM window manager + UnitTest. It integrates support for both the SAMA5 LCDC and the + SAMA5 ADC touchscreen controller and provides a more advance + graphics demo. It provides an interactive windowing experience. + + The NxWM window manager is a tiny window manager tailored for use + with smaller LCDs. It supports a taskbar, a start window, and + multiple application windows with toolbars. However, to make the + best use of the visible LCD space, only one application window is + visible at at time. + + The NxWM window manager can be found here: + + nuttx-git/NxWidgets/nxwm + + The NxWM unit test can be found at: + + nuttx-git/NxWidgets/UnitTests/nxwm + + Documentation for installing the NxWM unit test can be found here: + + nuttx-git/NxWidgets/UnitTests/README.txt + + Here is the quick summary of the build steps. These steps assume that + you have the entire NuttX GIT in some directory ~/nuttx-git. You may + have these components installed elsewhere. In that case, you will need + to adjust all of the paths in the following accordingly: + + 1. Install the nxwm configuration + + $ cd ~/nuttx-git/nuttx/tools + $ ./configure.sh sama5d3x-ek/nxwm + + 2. Make the build context (only) + + $ cd .. + $ . ./setenv.sh + $ make context + ... + + NOTE: the use of the setenv.sh file is optional. All that it will + do is to adjust your PATH variable so that the build system can find + your tools. If you use it, you will most likely need to modify the + script so that it has the correct path to your tool binaries + directory. + + 3. Install the nxwm unit test + + $ cd ~/nuttx-git/NxWidgets + $ tools/install.sh ~/nuttx-git/apps nxwm + Creating symbolic link + - To ~/nuttx-git/NxWidgets/UnitTests/nxwm + - At ~/nuttx-git/apps/external + + 4. Build the NxWidgets library + + $ cd ~/nuttx-git/NxWidgets/libnxwidgets + $ make TOPDIR=~/nuttx-git/nuttx + ... + + 5. Build the NxWM library + + $ cd ~/nuttx-git/NxWidgets/nxwm + $ make TOPDIR=~/nuttx-git/nuttx + ... + + 6. Built NuttX with the installed unit test as the application + + $ cd ~/nuttx-git/nuttx + $ make + + STATUS: + See the To-Do list below + + 2013-10-18. This example kind of works, but there are still far too + many outstanding issues: + + a) It runs of the SAMA5D31 and SAMA5D34, but not on the SAMA5D33. This + board is from a different manufacturer and there may be some SDRAM- + related issues? + b) There may be an SDRAM noise issue on the SAMA5D31 and SAMA5D34. + I suspect that the SDRAM setup is non-optimal. The symptom is that + writing into frame buffer (in SDRAM) occasionally corrupts the DMA + descriptors (also in SDRAM) When the bad DMA descriptors are + fetched, the channel shuts down and the display goes black. This + problem could also be cause by a bad write outside of the framebuffer + and, in fact, putting a guard band around the framebuffers seems to + eliminate the problem. + c) There are some occasional start up issues. It appears that the LCDC + is programmed incorrectly and groups of pixels in the images are + reversed (producing an odd serrated look to the images). + Update: I corrected a similar problem on the SAMA5D4-EK by + increasing the SCLK from MCK to 2*MCK. That eliminated all start up + problems with the SAMA5D4-EK and needs to be tried on the SAMA5D3e-EK + as well. This is controlled by an LCD setting in include/board.h. + d) I think that there may be more issues if GRAPHICS and INPUT debug is + off. I have not tested with DEBUG off. + e) The biggest problem is the touchscreen accuracy. The touchscreen + seems stable during calibration, but the first thing that this + example requires is a touch in the far, far, upper left corner of + the display. In that region, I cannot get reliable touch measurements + and so I cannot get past the opening display. + + Bottom line: Not ready for prime time. + + 2014-9-20: Trying to verify the build today, there are now compilation + errors in the ADC/Touchscreen driver. See STATUS at the end of this file + + ov2640: + + A test of the SAMA5 ISI using an OV2640 camera. + +To-Do List +========== + +1) Most of these configurations execute from NOR FLASH. I have been unable + to execute these configurations from NOR FLASH by closing the BMS jumper + (J9). As far as I can tell, this jumper does nothing on my board??? I + have been using the norboot configuration to start the program in NOR + FLASH (see just above). See "Creating and Using NORBOOT" above. + + UPDATE: It has been confirmed at that there is an issue with the BMS + jumper on my board. However, other NuttX users have confirmed operation + booting directly into NOR FLASH. So although I cannot confirm this + behavior, this appears to be no longer an issue. + +2) Neither USB OHCI nor EHCI support Isochronous endpoints. Interrupt + endpoint support in the EHCI driver is untested (but works in similar + EHCI drivers). + +3) HSCMI. CONFIG_MMCSD_MULTIBLOCK_DISABLE=y is set to disable multi-block + transfers because of some issues that I saw during testing. The is very + low priority to me but might be important to you if you are need very + high performance SD card accesses. + + HSMCI TX DMA is currently disabled for the SAMA5D3. There is some + issue with the TX DMA setup (HSMCI TX DMA the same driver works with + the SAMA5D4 which has a different DMA subsystem). This is a bug that + needs to be resolved. + + UPDATE: This problem may be fixed with a bug correct on 2015-03-15). + Need to retest. That change is necessary, but may not be sufficient to + solve the problem. + +4) I believe that there is an issue when the internal AT25 FLASH is + formatted by NuttX. That format works fine with Linux, but does not + appear to work with Windows. Reformatting on Windows can resolve this. + NOTE: This is not a SAMA5Dx issue. + + UPDATE: Two important bugs were recently fixed in the NuttX FAT + formatting function (mkfatfs). It is likely that these fixes will + eliminate this issue, but that has not yet been verified. + +5) CAN testing has not yet been performed due to issues with cabling. I + just do not have a good test bed (or sufficient CAN knowledge) for + good CAN testing. + +6) There are lots of LCDC hardware features that are not tested with NuttX. + The simple NuttX graphics system does not have support for all of the + layers and other features of the LCDC. + +7) I have a Camera, but there is still no ISI driver. I am not sure what to + do with the camera. NuttX needs something like V4L to provide the + definition for what a camera driver is supposed to do. + + I will probably develop a test harness for ISI, but it is of only + minimal value with no OS infrastructure to deal with images and video. + +8) GMAC has only been tested on a 10/100Base-T network. I don't have a + 1000Base-T network to support additional testing. + +9) Some drivers may require some adjustments if you intend to run from SDRAM. + That is because in this case macros like BOARD_MCK_FREQUENCY are not constants + but are instead function calls: The MCK clock frequency is not known in + advance but instead has to be calculated from the bootloader PLL configuration. + + As of this writing, all drivers have been converted to run from SDRAM except + for the PWM and the Timer/Counter drivers. These drivers use the + BOARD_MCK_FREQUENCY definition in more complex ways and will require some + minor redesign and re-testing before they can be available. + +10) 2014-9-20: Failed to build the NxWM configuration: + + CC: chip/sam_adc.c + chip/sam_adc.c: In function 'sam_adc_interrupt': + chip/sam_adc.c:886:21: warning: unused variable 'priv' [-Wunused-variable] + struct sam_adc_s *priv = &g_adcpriv; + ^ + chip/sam_adc.c: In function 'sam_adc_initialize': + chip/sam_adc.c:1977:7: error: 'g_adcdev' undeclared (first use in this function) + g_adcdev.ad_ops = &g_adcops; + ^ + chip/sam_adc.c:1977:7: note: each undeclared identifier is reported only once for each function it appears in + chip/sam_adc.c:1977:27: error: 'g_adcops' undeclared (first use in this function) + g_adcdev.ad_ops = &g_adcops; + ^ + chip/sam_adc.c:1983:11: error: 'struct sam_adc_s' has no member named 'dev' + priv->dev = &g_adcdev; + ^ + chip/sam_adc.c:2090:1: warning: control reaches end of non-void function [-Wreturn-type] + } + ^ + + The failure occurs because there are no ADC channels configured (as there + should not be) so SAMA5_ADC_HAVE_CHANNELS is not defined (as it should + not be). However, if there are no configured ADC channel, then + sam_adc_initialize() does not compile correctly -- and it should not + given nature the logic that is in place there now. + + A quick glance at the history of these files does not reveal what the + obvious solution is so I will need to come back and revisit this in the + future. diff --git a/configs/sama5d3x-ek/Using-NxPlayer.txt b/configs/sama5d3x-ek/Using-NxPlayer.txt new file mode 100644 index 0000000000000000000000000000000000000000..22ce45a3bd15b6190a853d03778e97cfe77f9048 --- /dev/null +++ b/configs/sama5d3x-ek/Using-NxPlayer.txt @@ -0,0 +1,43 @@ +Using the Binaries: +================== + +Prequisites: +=========== + +1. SAMA5D3x-EK board and power supply +2. RS-232 NUL modem cable +3. A full size SD card. This should be older style SD or SDHC cards. Some + of the newest very high capacity cards will not work. +4. The WAV file jsbach16.wav +5. The NuttX HEX binary, nuttx.hex, .bin or .elf. + +Procedure: + +1. Put the WAV file jsbach16.wav on the SD card + +2. Place the SD card in the full size SD slot on the motherboard. + +3. Use SAM-BA to copy the NuttX binary to NOR flash + +4. Set the boot jumper to boot from NOR FLASH + +5. NSH shouls start + + NuttShell (NSH) NuttX-7.3 + nsh> + +6. Mount the SD card at /music + + nsh> mount -t vfat /dev/mmcsd0 /music + +7. Star the NxPlayer and select the pcm0 device + + nsh> nxplayer + NxPlayer version 1.04 + h for commands, q to exit + + nxplayer> device pcm0 + +8. And play the WAV file + + nxplayer> play jsbach16.wav diff --git a/configs/sama5d3x-ek/demo/Make.defs b/configs/sama5d3x-ek/demo/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..30196f10fdd19f48406b684bc6a13a701e91efed --- /dev/null +++ b/configs/sama5d3x-ek/demo/Make.defs @@ -0,0 +1,161 @@ +############################################################################ +# configs/sama5d3x-ek/demo/Make.defs +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) + LDSCRIPT = ddram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y) +ifeq ($(CONFIG_BOOT_SDRAM_DATA),y) + LDSCRIPT = nor-ddram.ld +else + LDSCRIPT = nor-isram.ld +endif +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS1FLASH),y) +# LDSCRIPT = cs1flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS2FLASH),y) +# LDSCRIPT = cs2flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS3FLASH),y) +# LDSCRIPT = cs3flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d3x-ek/demo/defconfig b/configs/sama5d3x-ek/demo/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..71ae23046380daa8c71bc9bf6a4442cbf51a2e87 --- /dev/null +++ b/configs/sama5d3x-ek/demo/defconfig @@ -0,0 +1,1158 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +# CONFIG_ARMV7A_HAVE_L2CC is not set +# CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set +# CONFIG_USBHOST_BULK_DISABLE is not set +# CONFIG_USBHOST_INT_DISABLE is not set +CONFIG_USBHOST_ISOC_DISABLE=y + +# +# SAMA5 Configuration Options +# +# CONFIG_SAMA5_HAVE_AESB is not set +# CONFIG_SAMA5_HAVE_ICM is not set +# CONFIG_SAMA5_HAVE_RXLP is not set +# CONFIG_SAMA5_HAVE_UART0 is not set +# CONFIG_SAMA5_HAVE_UART1 is not set +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +# CONFIG_SAMA5_HAVE_USART4 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +CONFIG_SAMA5_HAVE_DMA=y +# CONFIG_SAMA5_HAVE_DDR32 is not set +# CONFIG_SAMA5_HAVE_XDMA is not set +CONFIG_SAMA5_HAVE_LCDC=y +CONFIG_SAMA5_HAVE_GMAC=y +# CONFIG_SAMA5_HAVE_EMACA is not set +# CONFIG_SAMA5_HAVE_EMACB is not set +# CONFIG_SAMA5_HAVE_EMAC1 is not set +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +# CONFIG_SAMA5_HAVE_SAIC is not set +# CONFIG_SAMA5_HAVE_SBM is not set +# CONFIG_SAMA5_HAVE_SFC is not set +# CONFIG_SAMA5_HAVE_SPI2 is not set +# CONFIG_SAMA5_HAVE_TC is not set +# CONFIG_SAMA5_HAVE_TC1 is not set +# CONFIG_SAMA5_HAVE_TC2 is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +# CONFIG_SAMA5_HAVE_TWI3 is not set +# CONFIG_SAMA5_HAVE_VDEC is not set +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +CONFIG_ARCH_CHIP_SAMA5D3=y +# CONFIG_ARCH_CHIP_SAMA5D4 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +CONFIG_ARCH_CHIP_ATSAMA5D33=y +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D44 is not set + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +CONFIG_SAMA5_RTC=y +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_USART0 is not set +CONFIG_SAMA5_USART1=y +# CONFIG_SAMA5_USART2 is not set +# CONFIG_SAMA5_USART3 is not set +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +CONFIG_SAMA5_HSMCI0=y +CONFIG_SAMA5_HSMCI1=y +CONFIG_SAMA5_SPI0=y +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +CONFIG_SAMA5_DMAC0=y +CONFIG_SAMA5_DMAC1=y +CONFIG_SAMA5_UHPHS=y +CONFIG_SAMA5_UDPHS=y +# CONFIG_SAMA5_GMAC is not set +# CONFIG_SAMA5_EMACB is not set +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_SSC0 is not set +# CONFIG_SAMA5_SSC1 is not set +# CONFIG_SAMA5_SHA is not set +CONFIG_SAMA5_TRNG=y +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +CONFIG_SAMA5_MPDDRC=y +CONFIG_SAMA5_PIO_IRQ=y +# CONFIG_SAMA5_PIOA_IRQ is not set +# CONFIG_SAMA5_PIOB_IRQ is not set +# CONFIG_SAMA5_PIOC_IRQ is not set +CONFIG_SAMA5_PIOD_IRQ=y +# CONFIG_SAMA5_PIOE_IRQ is not set + +# +# SPI device driver options +# +CONFIG_SAMA5_SPI_DMA=y +CONFIG_SAMA5_SPI_DMATHRESHOLD=4 + +# +# HSMCI device driver options +# +# CONFIG_SAMA5_HSMCI_RDPROOF is not set +# CONFIG_SAMA5_HSMCI_WRPROOF is not set + +# +# USB High Speed Device Controller driver (DCD) options +# +CONFIG_SAMA5_UDPHS_NDTDS=8 +CONFIG_SAMA5_UDPHS_PREALLOCATE=y + +# +# USB High Speed Host Controller driver (HCD) options +# +CONFIG_SAMA5_OHCI=y +CONFIG_SAMA5_OHCI_NEDS=6 +CONFIG_SAMA5_OHCI_NTDS=9 +CONFIG_SAMA5_OHCI_TDBUFFERS=6 +CONFIG_SAMA5_OHCI_TDBUFSIZE=128 +CONFIG_SAMA5_EHCI=y +CONFIG_SAMA5_EHCI_NQHS=4 +CONFIG_SAMA5_EHCI_NQTDS=6 +CONFIG_SAMA5_EHCI_BUFSIZE=128 +CONFIG_SAMA5_EHCI_PREALLOCATE=y +CONFIG_SAMA5_UHPHS_RHPORT2=y +CONFIG_SAMA5_UHPHS_RHPORT3=y + +# +# External Memory Configuration +# +CONFIG_SAMA5_DDRCS=y +CONFIG_SAMA5_DDRCS_SIZE=268435456 +# CONFIG_SAMA5_DDRCS_LPDDR1 is not set +CONFIG_SAMA5_DDRCS_LPDDR2=y +CONFIG_SAMA5_EBICS0=y +CONFIG_SAMA5_EBICS0_SIZE=134217728 +# CONFIG_SAMA5_EBICS0_SRAM is not set +# CONFIG_SAMA5_EBICS0_PSRAM is not set +# CONFIG_SAMA5_EBICS0_PROM is not set +# CONFIG_SAMA5_EBICS0_EEPROM is not set +# CONFIG_SAMA5_EBICS0_EPROM is not set +# CONFIG_SAMA5_EBICS0_LCD is not set +CONFIG_SAMA5_EBICS0_NOR=y +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +# CONFIG_SAMA5_BOOT_SDRAM is not set +CONFIG_SAMA5_BOOT_CS0FLASH=y + +# +# Heap Configuration +# +CONFIG_SAMA5_ISRAM_HEAP=y +CONFIG_SAMA5_DDRCS_HEAP=y +CONFIG_SAMA5_DDRCS_HEAP_OFFSET=0 +CONFIG_SAMA5_DDRCS_HEAP_SIZE=268435456 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=49341 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00304000 +CONFIG_RAM_VSTART=0x00304000 +CONFIG_RAM_SIZE=114688 +CONFIG_FLASH_START=0x10000000 +CONFIG_FLASH_VSTART=0x10000000 +CONFIG_FLASH_SIZE=134217728 +CONFIG_ARCH_HAVE_SDRAM=y +# CONFIG_BOOT_SDRAM_DATA is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D3X_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d3x-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +# CONFIG_SAMA5D3xEK_384MHZ is not set +CONFIG_SAMA5D3xEK_396MHZ=y +# CONFIG_SAMA5D3xEK_528MHZ is not set +CONFIG_SAMA5D3xEK_MT47H128M16RT=y +# CONFIG_SAMA5D3xEK_MT47H64M16HR is not set +# CONFIG_SAMA5D3xEK_NOREDLED is not set +CONFIG_SAMA5D3xEK_AT25_BLOCKMOUNT=y +CONFIG_SAMA5D3xEK_AT25_FTL=y +CONFIG_SAMA5D3xEK_USBHOST_STACKSIZE=1024 +CONFIG_SAMA5D3xEK_USBHOST_PRIO=100 +# CONFIG_SAMA5D3xEK_SLOWCLOCK is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_MMCSD_SPI is not set +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +CONFIG_MTD_AT25=y +CONFIG_AT25_SPIMODE=0 +CONFIG_AT25_SPIFREQUENCY=10000000 +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +CONFIG_USBDEV_DUALSPEED=y +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +CONFIG_USBDEV_DMA=y +# CONFIG_USBDEV_DMAMEMORY is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +CONFIG_USBMSC=y +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=1 +CONFIG_USBMSC_EPBULKIN=2 +CONFIG_USBMSC_NWRREQS=4 +CONFIG_USBMSC_NRDREQS=4 +CONFIG_USBMSC_BULKINREQLEN=512 +CONFIG_USBMSC_BULKOUTREQLEN=512 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="Nuttx" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="Mass Storage" +CONFIG_USBMSC_VERSIONNO=0x399 +# CONFIG_USBMSC_REMOVABLE is not set +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=2048 +CONFIG_USBHOST=y +CONFIG_USBHOST_NPREALLOC=4 +CONFIG_USBHOST_HAVE_ASYNCH=y +# CONFIG_USBHOST_ASYNCH is not set +# CONFIG_USBHOST_HUB is not set +CONFIG_USBHOST_MSC=y +# CONFIG_USBHOST_CDCACM is not set +CONFIG_USBHOST_HIDKBD=y +CONFIG_HIDKBD_POLLUSEC=100000 +CONFIG_HIDKBD_DEFPRIO=50 +CONFIG_HIDKBD_STACKSIZE=1024 +CONFIG_HIDKBD_BUFSIZE=64 +# CONFIG_HIDKBD_RAWSCANCODES is not set +# CONFIG_HIDKBD_ALLSCANCODES is not set +# CONFIG_HIDKBD_NODEBOUNCE is not set +# CONFIG_USBHOST_HIDMOUSE is not set +# CONFIG_USBHOST_TRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_MTD is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_USBKBD is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +CONFIG_SYSTEM_USBMSC=y +CONFIG_SYSTEM_USBMSC_NLUNS=1 +CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mtdblock0" +CONFIG_SYSTEM_USBMSC_DEVMINOR2=1 +CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_USBMSC_DEVMINOR3=2 +CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" +# CONFIG_SYSTEM_USBMSC_DEBUGMM is not set +CONFIG_SYSTEM_USBMSC_CMD_STACKSIZE=768 +CONFIG_SYSTEM_USBMSC_CMD_PRIORITY=100 +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d3x-ek/demo/setenv.sh b/configs/sama5d3x-ek/demo/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..6a0cb44297be7e5b5602df58524d3edf8fa53065 --- /dev/null +++ b/configs/sama5d3x-ek/demo/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d3x-ek/demo/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d3x-ek/hello/Make.defs b/configs/sama5d3x-ek/hello/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..534cbd06bc15ad0eb1fc1b85bfe03efda2d348b1 --- /dev/null +++ b/configs/sama5d3x-ek/hello/Make.defs @@ -0,0 +1,160 @@ +############################################################################ +# configs/sama5d3x-ek/hello/Make.defs +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) + LDSCRIPT = ddram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y) +ifeq ($(CONFIG_BOOT_SDRAM_DATA),y) + LDSCRIPT = nor-ddram.ld +else + LDSCRIPT = nor-isram.ld +endif +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS1FLASH),y) +# LDSCRIPT = cs1flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS2FLASH),y) +# LDSCRIPT = cs2flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS3FLASH),y) +# LDSCRIPT = cs3flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d3x-ek/hello/defconfig b/configs/sama5d3x-ek/hello/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d6b76a8c74a22871616921df80014352443cbb0a --- /dev/null +++ b/configs/sama5d3x-ek/hello/defconfig @@ -0,0 +1,811 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +# CONFIG_ARMV7A_HAVE_L2CC is not set +# CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# SAMA5 Configuration Options +# +# CONFIG_SAMA5_HAVE_AESB is not set +# CONFIG_SAMA5_HAVE_ICM is not set +# CONFIG_SAMA5_HAVE_RXLP is not set +# CONFIG_SAMA5_HAVE_UART0 is not set +# CONFIG_SAMA5_HAVE_UART1 is not set +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +# CONFIG_SAMA5_HAVE_USART4 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +CONFIG_SAMA5_HAVE_DMA=y +# CONFIG_SAMA5_HAVE_DDR32 is not set +# CONFIG_SAMA5_HAVE_XDMA is not set +CONFIG_SAMA5_HAVE_LCDC=y +CONFIG_SAMA5_HAVE_GMAC=y +# CONFIG_SAMA5_HAVE_EMACA is not set +# CONFIG_SAMA5_HAVE_EMACB is not set +# CONFIG_SAMA5_HAVE_EMAC1 is not set +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +# CONFIG_SAMA5_HAVE_SAIC is not set +# CONFIG_SAMA5_HAVE_SBM is not set +# CONFIG_SAMA5_HAVE_SFC is not set +# CONFIG_SAMA5_HAVE_SPI2 is not set +# CONFIG_SAMA5_HAVE_TC is not set +# CONFIG_SAMA5_HAVE_TC1 is not set +# CONFIG_SAMA5_HAVE_TC2 is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +# CONFIG_SAMA5_HAVE_TWI3 is not set +# CONFIG_SAMA5_HAVE_VDEC is not set +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +CONFIG_ARCH_CHIP_SAMA5D3=y +# CONFIG_ARCH_CHIP_SAMA5D4 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +CONFIG_ARCH_CHIP_ATSAMA5D33=y +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D44 is not set + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +# CONFIG_SAMA5_RTC is not set +# CONFIG_SAMA5_HSMC is not set +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_USART0 is not set +CONFIG_SAMA5_USART1=y +# CONFIG_SAMA5_USART2 is not set +# CONFIG_SAMA5_USART3 is not set +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +# CONFIG_SAMA5_DMAC0 is not set +# CONFIG_SAMA5_DMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_GMAC is not set +# CONFIG_SAMA5_EMACB is not set +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_SHA is not set +# CONFIG_SAMA5_TRNG is not set +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +# CONFIG_SAMA5_MPDDRC is not set +# CONFIG_SAMA5_PIO_IRQ is not set + +# +# External Memory Configuration +# +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +CONFIG_SAMA5_BOOT_ISRAM=y +# CONFIG_SAMA5_BOOT_SDRAM is not set + +# +# Heap Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=49341 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00300000 +CONFIG_RAM_VSTART=0x00300000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D3X_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d3x-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_SAMA5D3xEK_384MHZ is not set +CONFIG_SAMA5D3xEK_396MHZ=y +# CONFIG_SAMA5D3xEK_528MHZ is not set +# CONFIG_SAMA5D3xEK_NOREDLED is not set +# CONFIG_SAMA5D3xEK_NOR_MAIN is not set +# CONFIG_SAMA5D3xEK_SLOWCLOCK is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="hello_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +CONFIG_EXAMPLES_HELLO_PRIORITY=100 +CONFIG_EXAMPLES_HELLO_STACKSIZE=2048 +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d3x-ek/hello/setenv.sh b/configs/sama5d3x-ek/hello/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..28f2a0dc6e58530c20ef67902dd40b844f229861 --- /dev/null +++ b/configs/sama5d3x-ek/hello/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d3x-ek/hello/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d3x-ek/include/board.h b/configs/sama5d3x-ek/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..9c16288885352777f2d0b85ef5b84874a01cc586 --- /dev/null +++ b/configs/sama5d3x-ek/include/board.h @@ -0,0 +1,382 @@ +/************************************************************************************ + * configs/sama5d3x-ek/include/board.h + * + * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_H +#define __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + */ + +/* On-board crystal frequencies */ + +#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */ +#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */ + +#if defined(CONFIG_SAMA5_BOOT_SDRAM) +/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader. + * That bootloader had to have already configured the PLL and SDRAM for proper + * operation. + * + * In this case, we don not reconfigure the clocking. Rather, we need to query + * the register settings to determine the clock frequencies. We can only assume that + * the Main clock source is the on-board 12MHz crystal. + */ + +# include + +#elif defined(CONFIG_SAMA5D3xEK_384MHZ) +/* OHCI Only. This is an alternative slower configuration that will produce a 48MHz + * USB clock with the required accuracy using only PLLA. When PPLA is used to clock + * OHCI, an additional requirement is the PLLACK be a multiple of 48MHz. This setup + * results in a CPU clock of 384MHz. + * + * This case is only interesting for experimentation. + */ + +# include + +#elif defined(CONFIG_SAMA5D3xEK_528MHZ) +/* This is the configuration results in a CPU clock of 528MHz. + * + * In this configuration, UPLL is the source of the UHPHS clock (if enabled). + */ + +# include + +#else /* #elif defined(CONFIG_SAMA5D3xEK_396MHZ) */ +/* This is the configuration provided in the Atmel example code. This setup results + * in a CPU clock of 396MHz. + * + * In this configuration, UPLL is the source of the UHPHS clock (if enabled). + */ + +# include + +#endif + +/* LCD Interface, Geometry and Timing */ + +#define BOARD_LCDC_OUTPUT_BPP 24 /* Output format to H/W is 24BPP RGB */ +#define BOARD_LCDC_WIDTH 800 /* Display width (pixels) */ +#define BOARD_LCDC_HEIGHT 480 /* Display height (rows) */ +#undef BOARD_LCDC_MCK_MUL2 /* Source clock is Mck (vs 2*Mck) */ +#define BOARD_LCDC_PIXCLK_INV 1 /* Invert pixel clock, use falling edge */ +#define BOARD_LCDC_PIXELCLOCK 33260000 /* Pixel clock frequency */ +#define BOARD_LCDC_GUARDTIME 9 /* Guard time (frames) */ +#define BOARD_LCDC_VSPW 2 /* Vertical pulse width (lines) */ +#define BOARD_LCDC_HSPW 128 /* Horizontal pulse width (LCDDOTCLK) */ +#define BOARD_LCDC_VFPW 37 /* Vertical front porch (lines) */ +#define BOARD_LCDC_VBPW 8 /* Vertical back porch (lines) */ +#define BOARD_LCDC_HFPW 168 /* Horizontal front porch (LCDDOTCLK) */ +#define BOARD_LCDC_HBPW 88 /* Horizontal back porch (LCDDOTCLK) */ + +/* Backlight prescaler value and PWM output polarity */ + +#define BOARD_LCDC_PWMPS LCDC_LCDCFG6_PWMPS_DIV1 +#define BOARD_LCDC_PWMPOL LCDC_LCDCFG6_PWMPOL + +/* LED definitions ******************************************************************/ +/* There are two LEDs on the SAMA5D3 series-CM board that can be controlled + * by software. A blue LED is controlled via PIO pins. A red LED normally + * provides an indication that power is supplied to the board but can also + * be controlled via software. + * + * PE25. This blue LED is pulled high and is illuminated by pulling PE25 + * low. + * + * PE24. The red LED is also pulled high but is driven by a transistor so + * that it is illuminated when power is applied even if PE24 is not + * configured as an output. If PE24 is configured as an output, then the + * LCD is illuminated by a high output. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_BLUE 0 +#ifdef CONFIG_SAMA5D3xEK_NOREDLED +# define BOARD_NLEDS 1 +#else +# define BOARD_RED 1 +# define BOARD_NLEDS 2 +#endif + +/* LED bits for use with board_userled_all() */ + +#define BOARD_BLUE_BIT (1 << BOARD_BLUE) +#ifndef CONFIG_SAMA5D3xEK_NOREDLED +# define BOARD_RED_BIT (1 << BOARD_RED) +#endif + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows when the red LED (PE24) is available: + * + * SYMBOL Val Meaning LED state + * Blue Red + * ----------------- --- ----------------------- -------- -------- */ +#define LED_STARTED 0 /* NuttX has been started OFF OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON OFF */ +#define LED_INIRQ 2 /* In an interrupt No change */ +#define LED_SIGNAL 2 /* In a signal handler No change */ +#define LED_ASSERTION 2 /* An assertion failed No change */ +#define LED_PANIC 3 /* The system has crashed OFF Blinking */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* If CONFIG_SAMA5D3xEK_NOREDLED=y, then the red LED is not used by the + * system. The only difference from the above is that it is the blue, not + * the red LED that blinks in the event of an PANIC. + * + * Thus if the blue LED is statically on, NuttX has successfully booted and + * is, apparently, running normally. If the red (or blue) LED is flashing + * at approximately 2Hz, then a fatal error has been detected and the system + * has halted. + */ + +/* Button definitions ***************************************************************/ +/* There are five push button switches on the SAMA5D3X-EK base board: + * + * 1. One Reset, board reset (BP1) + * 2. One Wake up, push button to bring the processor out of low power mode + * (BP2) + * 3. One User momentary Push Button + * 4. One Disable CS Push Button + * + * Only the momentary push button is controllable by software (labelled + * "PB_USER1" on the board): + * + * - PE27. Pressing the switch connect PE27 to grounded. Therefore, PE27 + * must be pulled high internally. When the button is pressed the SAMA5 + * will sense "0" is on PE27. + */ + +#define BUTTON_USER1 0 +#define NUM_BUTTONS 1 + +#define BUTTON_USER1_BIT (1 << BUTTON_USER1) + +/* NAND *****************************************************************************/ + +/* Address for transferring command bytes to the nandflash, CLE A22*/ + +#define BOARD_EBICS3_NAND_CMDADDR 0x60400000 + +/* Address for transferring address bytes to the nandflash, ALE A21*/ + +#define BOARD_EBICS3_NAND_ADDRADDR 0x60200000 + +/* Address for transferring data bytes to the nandflash.*/ + +#define BOARD_EBICS3_NAND_DATAADDR 0x60000000 + +/* PIO configuration ****************************************************************/ +/* LCDC */ + +#define PIO_LCD_DAT16 PIO_LCD_DAT16_2 +#define PIO_LCD_DAT17 PIO_LCD_DAT17_2 +#define PIO_LCD_DAT18 PIO_LCD_DAT18_2 +#define PIO_LCD_DAT19 PIO_LCD_DAT19_2 +#define PIO_LCD_DAT20 PIO_LCD_DAT20_2 +#define PIO_LCD_DAT21 PIO_LCD_DAT21_2 +#define PIO_LCD_DAT22 PIO_LCD_DAT22_1 +#define PIO_LCD_DAT23 PIO_LCD_DAT23_1 + +/* PWM. There are no dedicated PWM output pins available to the user for PWM + * testing. Care must be taken because all PWM output pins conflict with some other + * usage of the pin by other devices. Furthermore, many of these pins have not been + * brought out to an external connector: + * + * -----+---+---+----+------+---------------- + * PWM PIN PER PIO I/O CONFLICTS + * -----+---+---+----+------+---------------- + * PWM0 FI B PC28 J2.30 SPI1, ISI + * H B PB0 --- GMAC + * B PA20 J1.14 LCDC, ISI + * L B PB1 --- GMAC + * B PA21 J1.16 LCDC, ISI + * -----+---+---+----+------+---------------- + * PWM1 FI B PC31 J2.36 HDMI + * H B PB4 --- GMAC + * B PA22 J1.18 LCDC, ISI + * L B PB5 --- GMAC + * B PE31 J3.20 ISI, HDMI + * B PA23 J1.20 LCDC, ISI + * -----+---+---+----+------+---------------- + * PWM2 FI B PC29 J2.29 UART0, ISI, HDMI + * H C PD5 --- HSMCI0 + * B PB8 --- GMAC + * L C PD6 --- HSMCI0 + * B PB9 --- GMAC + * -----+---+---+----+------+---------------- + * PWM3 FI C PD16 --- SPI0, Audio + * H C PD7 --- HSMCI0 + * B PB12 J3.7 GMAC + * L C PD8 --- HSMCI0 + * B PB13 --- GMAC + * -----+---+---+----+------+---------------- + */ + +/* PWM channel 0: + * + * PA20 and PA21 can be used if the LCDC or ISI are not selected. These outputs are + * available on J1, pins 14 and 16, respectively. + * + * If the GMAC is not selected, then PB0 and PB1 could also be used. However, + * these pins are not available at the I/O expansion connectors. + */ + +#if !defined(CONFIG_SAMA5_LCDC) && !defined(CONFIG_SAMA5_ISI) +# define PIO_PWM0_H PIO_PWM0_H_2 +# define PIO_PWM0_L PIO_PWM0_L_2 +#elif !defined(CONFIG_SAMA5_GMAC) +# define PIO_PWM0_H PIO_PWM0_H_1 +# define PIO_PWM0_L PIO_PWM0_L_1 +#endif + +/* PWM channel 1: + * + * PA22 and PA23 can be used if the LCDC or ISI are not selected. These outputs are + * available on J1, pins 18 and 20, respectively. + * + * PE31 can be used if the ISI is not selected (and the HDMI is not being used). + * That signal is available at J3 pin 20. + * + * If the GMAC is not selected, then PB4 and PB5 could also be used. However, + * these pins are not available at the I/O expansion connectors. + */ + +#if !defined(CONFIG_SAMA5_LCDC) && !defined(CONFIG_SAMA5_ISI) +# define PIO_PWM1_H PIO_PWM1_H_2 +#elif !defined(CONFIG_SAMA5_GMAC) +# define PIO_PWM1_H PIO_PWM1_H_1 +#endif + +#if !defined(CONFIG_SAMA5_LCDC) && !defined(CONFIG_SAMA5_ISI) +# define PIO_PWM1_L PIO_PWM1_L_3 +#elif !defined(CONFIG_SAMA5_ISI) +# define PIO_PWM1_L PIO_PWM1_L_2 +#elif !defined(CONFIG_SAMA5_GMAC) +# define PIO_PWM1_L PIO_PWM1_L_1 +#endif + +/* PWM channel 2: + * + * None of the output pin options are available at any of the I/O expansion + * connectors for PWM channel 2 + */ + +#if !defined(CONFIG_SAMA5_HSMCI0) +# define PIO_PWM2_H PIO_PWM2_H_1 +# define PIO_PWM2_L PIO_PWM2_L_1 +#elif !defined(CONFIG_SAMA5_GMAC) +# define PIO_PWM2_H PIO_PWM2_H_2 +# define PIO_PWM2_L PIO_PWM2_L_2 +#endif + +/* PWM channel 3: + * + * If the GMAC is not selected, then PB12 can used and is available at J3 pin 7. + * None of the other output pins are accessible at the I/O expansion connectors. + */ + +#if !defined(CONFIG_SAMA5_GMAC) +# define PIO_PWM3_H PIO_PWM3_H_2 +# define PIO_PWM3_L PIO_PWM3_L_2 +#elif !defined(CONFIG_SAMA5_HSMCI0) +# define PIO_PWM3_H PIO_PWM3_H_1 +# define PIO_PWM3_L PIO_PWM3_L_1 +#endif + +/************************************************************************************ + * Assembly Language Macros + ************************************************************************************/ + +#ifdef __ASSEMBLY__ + .macro config_sdram + .endm +#endif /* __ASSEMBLY__ */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAMA5 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_H */ diff --git a/configs/sama5d3x-ek/include/board_384mhz.h b/configs/sama5d3x-ek/include/board_384mhz.h new file mode 100644 index 0000000000000000000000000000000000000000..158cd44c8b285877d732c69f7c2b17c9ae1dcaf1 --- /dev/null +++ b/configs/sama5d3x-ek/include/board_384mhz.h @@ -0,0 +1,224 @@ +/************************************************************************************ + * configs/sama5d3x-ek/include/board_384mhz.h + * + * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_384MHZ_H +#define __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_384MHZ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + * + * This is an alternative slower configuration that will produce a 48MHz USB clock + * with the required accuracy. When used with OHCI, an additional requirement is + * the PLLACK be a multiple of 48MHz. This setup results in a CPU clock of 384MHz. + * + * MAINOSC: Frequency = 12MHz (crystal) + * PLLA: PLL Divider = 1, Multiplier = 64 to generate PLLACK = 768MHz + * Master Clock (MCK): Source = PLLACK/2, Prescalar = 1, MDIV = 3 to generate + * MCK = 128MHz + * CPU clock = 384MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Divider = 1 + * Multipler = 64 + */ + +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_OUT (0) +#define BOARD_CKGR_PLLAR_MUL (63 << PMC_CKGR_PLLAR_MUL_SHIFT) +#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS + +/* PMC master clock register settings. + * + * Master/Processor Clock Source Selection = PLLA + * Master/Processor Clock Prescaler = 1 + * PLLA Divider = 2 + * Master Clock Division (MDIV) = 3 + * + * NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3. + * + * Prescaler input = 768MHz / 2 = 384MHz + * Prescaler output = 384MHz / 1 = 384MHz + * Processor Clock (PCK) = 384MHz + * Master clock (MCK) = 396MHz / 3 = 128MHz + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 +#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV2 +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV3 + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* For OHCI Full-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in PMC_PCER + * register. + * 2) Select PLLACK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 3) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV value is calculated regarding the PLLACK + * value and USB Full-speed accuracy. + * 4) Enable the OHCI clocks, UHP bit in PMC_SCER register. + * + * "The USB Host controller requires 48 MHz and 12 MHz clocks for OHCI + * full-speed operations. These clocks must be generated by a PLL with a + * correct accuracy of ± 0.25% thanks to USBDIV field. + * + * "Thus the USB Host peripheral receives three clocks from the Power + * Management Controller (PMC): the Peripheral Clock (MCK domain), the + * UHP48M and the UHP12M (built-in UHP48M divided by four) used by the + * OHCI to interface with the bus USB signals (Recovered 12 MHz domain) + * in Full-speed operations" + * + * USB Clock = PLLACK / (USBDIV + 1) = 48MHz + * USBDIV = PLLACK / 48MHz - 1 + * = 15 + * + * The maximum value of USBDIV is 15 corresponding to a divisor of 16. + * REVISIT: However, using the divisor of (15+1) yields a frame rate + * of 500 frames per second. A divisor of (7+1) gives the correct 1MS + * frame rate. I cannot explain the factor of 2 difference. + */ + +# undef BOARD_USE_UPLL /* Use PLLA as source clock */ +# define BOARD_OHCI_INPUT PMC_USB_USBS_PLLA /* Input is PLLACK */ +# if 1 /* REVISIT */ +# define BOARD_OHCI_DIVIDER (7) /* Divided by 8 */ +# else +# define BOARD_OHCI_DIVIDER (15) /* Divided by 16 */ +# endif +#endif + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * + * Given: + * MCK = 128MHz + * ADCClock = 8MHz + * Then: + * PRESCAL = 7 + */ + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* Resulting frequencies */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */ +#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */ +#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */ +#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */ + +/* On some SAMA5's, the clocking to peripherals may be divided down from MCK, + * but not for the SAMA5D3. + */ + +#define BOARD_PIT_FREQUENCY BOARD_MCK_FREQUENCY +#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 128MHz, CLKDIV = 159, MCI_SPEED = 128MHz / (2*159 + 0 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (159 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 128MHz, CLKDIV = 2 w/CLOCKODD, MCI_SPEED = 128MHz /(2*2 + 1 + 2) = 18.3 MHz */ + +#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 128MHz, CLKDIV = 2, MCI_SPEED = 128MHz /(2*2 + 0 + 2) = 21.3 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + + #undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_384MHZ_H */ diff --git a/configs/sama5d3x-ek/include/board_396mhz.h b/configs/sama5d3x-ek/include/board_396mhz.h new file mode 100644 index 0000000000000000000000000000000000000000..dea0068b0c5229a8aa5962d3e237e9b24effcc55 --- /dev/null +++ b/configs/sama5d3x-ek/include/board_396mhz.h @@ -0,0 +1,221 @@ +/************************************************************************************ + * configs/sama5d3x-ek/include/board_396mhz.h + * + * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_396MHZ_H +#define __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_396MHZ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + * + * This is the configuration provided in the Atmel example code. This results in a + * CPU clock of 396MHz: + * + * MAINOSC: Frequency = 12MHz (crystal) + * PLLA: PLL Divider = 1, Multiplier = 66 to generate PLLACK = 792MHz + * Master Clock (MCK): Source = PLLACK/2, Prescalar = 1, MDIV = 3 to generate + * MCK = 132MHz + * CPU clock = 396MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Divider = 1 + * Multipler = 66 + */ + +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_OUT (0) +#define BOARD_CKGR_PLLAR_MUL (65 << PMC_CKGR_PLLAR_MUL_SHIFT) +#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS + +/* PMC master clock register settings. + * + * Master/Processor Clock Source Selection = PLLA + * Master/Processor Clock Prescaler = 1 + * PLLA Divider = 2 + * Master Clock Division (MDIV) = 3 + * + * NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3. + * + * Prescaler input = 792MHz / 2 = 396MHz + * Prescaler output = 396MHz / 1 = 396MHz + * Processor Clock (PCK) = 396MHz + * Master clock (MCK) = 396MHz / 3 = 132MHz + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 +#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV2 +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV3 + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * + * Given: + * MCK = 132MHz + * ADCClock = 8MHz + * Then: + * PRESCAL = 7.25 + * + * PRESCAL=7 and MCK=132MHz yields ADC clock of 8.25MHz + */ + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* Resulting frequencies */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */ +#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */ +#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */ +#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */ + +/* On some SAMA5's, the clocking to peripherals may be divided down from MCK, + * but not for the SAMA5D3. + */ + +#define BOARD_PIT_FREQUENCY BOARD_MCK_FREQUENCY +#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded + * High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL + * (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either + * the 12MHz internal RC oscillator on a an external 12MHz crystal. The + * Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier. + * + * For High-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in + * PMC_PCER register. + * 2) Write CKGR_PLLCOUNT field in PMC_UCKR register. + * 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register. + * 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register + * 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register. + * 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is + * selected. + * 8) Enable OHCI clocks, UHP bit in PMC_SCER register. + * + * Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI + * driver is initialized. + */ + +# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */ +# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */ +# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */ + +/* REVISIT: The divisor of 10 produces a rate that is too high. Division + * by 5, however, seems to work just fine. No idea why? + */ + +# define BOARD_UPLL_OHCI_DIV (5) /* Divide by 5 */ +#endif + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 132MHz, CLKDIV = 164, MCI_SPEED = 132MHz / (2*164 + 0 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (164 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 132MHz, CLKDIV = 2 w/CLOCKODD, MCI_SPEED = 132MHz /(2*2 + 1 + 2) = 18.9 MHz */ + +#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 132MHz, CLKDIV = 2, MCI_SPEED = 132MHz /(2*2 + 0 + 2) = 22 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_396MHZ_H */ diff --git a/configs/sama5d3x-ek/include/board_528mhz.h b/configs/sama5d3x-ek/include/board_528mhz.h new file mode 100644 index 0000000000000000000000000000000000000000..e3975deebe323cfd50a06ba06afbb865b8adeab2 --- /dev/null +++ b/configs/sama5d3x-ek/include/board_528mhz.h @@ -0,0 +1,220 @@ +/************************************************************************************ + * configs/sama5d3x-ek/include/board_528mhz.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_528MHZ_H +#define __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_528MHZ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + * + * This is the configuration results in a CPU clock of 528MHz: + * + * MAINOSC: Frequency = 12MHz (crystal) + * PLLA: PLL Divider = 1, Multiplier = 43+1 to generate PLLACK = 528MHz + * Master Clock (MCK): Source = PLLACK/1, Prescalar = 1, MDIV = 4 to generate + * MCK = 132MHz + * CPU clock = 528MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Divider = 1 + * Multipler = 43+1 + */ + +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_OUT (0) +#define BOARD_CKGR_PLLAR_MUL (43 << PMC_CKGR_PLLAR_MUL_SHIFT) +#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS + +/* PMC master clock register settings. + * + * Master/Processor Clock Source Selection = PLLA + * Master/Processor Clock Prescaler = 1 + * PLLA Divider = 1 + * Master Clock Division (MDIV) = 4 + * + * NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3. + * + * Prescaler input = 528MHz / 1 = 528MHz + * Prescaler output = 528MHz / 1 = 528MHz + * Processor Clock (PCK) = 528MHz + * Master clock (MCK) = 528MHz / 4 = 132MHz + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 +#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV1 +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV4 + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * + * Given: + * MCK = 132MHz + * ADCClock = 8MHz + * Then: + * PRESCAL = 7.25 + * + * PRESCAL=7 and MCK=132MHz yields ADC clock of 8.25MHz + */ + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* Resulting frequencies */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */ +#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */ +#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */ +#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */ + +/* On some SAMA5's, the clocking to peripherals may be divided down from MCK, + * but not for the SAMA5D3. + */ + +#define BOARD_PIT_FREQUENCY BOARD_MCK_FREQUENCY +#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded + * High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL + * (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either + * the 12MHz internal RC oscillator on a an external 12MHz crystal. The + * Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier. + * + * For High-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in + * PMC_PCER register. + * 2) Write CKGR_PLLCOUNT field in PMC_UCKR register. + * 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register. + * 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register + * 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register. + * 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is + * selected. + * 8) Enable OHCI clocks, UHP bit in PMC_SCER register. + * + * Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI + * driver is initialized. + */ + +# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */ +# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */ +# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */ + +/* REVISIT: The divisor of 10 produces a rate that is too high. Division + * by 5, however, seems to work just fine. No idea why? + */ + +# define BOARD_UPLL_OHCI_DIV (5) /* Divide by 5 */ +#endif + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 132MHz, CLKDIV = 164, MCI_SPEED = 132MHz / (2*164 + 0 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (164 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 132MHz, CLKDIV = 2 w/CLOCKODD, MCI_SPEED = 132MHz /(2*2 + 1 + 2) = 18.9 MHz */ + +#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 132MHz, CLKDIV = 2, MCI_SPEED = 132MHz /(2*2 + 0 + 2) = 22 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_528MHZ_H */ diff --git a/configs/sama5d3x-ek/include/board_memorymap.h b/configs/sama5d3x-ek/include/board_memorymap.h new file mode 100644 index 0000000000000000000000000000000000000000..868c131c9641ecae2bcf10b0e2e2df73bf52c97c --- /dev/null +++ b/configs/sama5d3x-ek/include/board_memorymap.h @@ -0,0 +1,73 @@ +/************************************************************************************ + * configs/sama5d3x-ek/include/board_memorymap.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_MEMORYMAP_H +#define __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_MEMORYMAP_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_MEMORYMAP_H */ diff --git a/configs/sama5d3x-ek/include/board_sdram.h b/configs/sama5d3x-ek/include/board_sdram.h new file mode 100644 index 0000000000000000000000000000000000000000..09c23a1738aef1933a7df4995b76b59c15c37ffe --- /dev/null +++ b/configs/sama5d3x-ek/include/board_sdram.h @@ -0,0 +1,180 @@ +/************************************************************************************ + * configs/sama5d3x-ek/include/board_sdram.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_SDRAM_H +#define __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_SDRAM_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include "sam_pmc.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. When + * booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader. That + * bootloader had to have already configured the PLL and SDRAM for proper operation. + * + * In this case, we do not reconfigure the clocking. Rather, we need to query + * the register settings to determine the clock frequencies. We can only assume that + * the Main clock source is the on-board 12MHz crystal. + */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY)) +#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY)) +#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY)) +#define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY)) + +/* On some SAMA5's, the clocking to peripherals may be divided down from MCK, + * but not for the SAMA5D3. + */ + +#define BOARD_PIT_FREQUENCY BOARD_MCK_FREQUENCY +#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded + * High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL + * (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either + * the 12MHz internal RC oscillator on a an external 12MHz crystal. The + * Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier. + * + * For High-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in + * PMC_PCER register. + * 2) Write CKGR_PLLCOUNT field in PMC_UCKR register. + * 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register. + * 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register + * 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register. + * 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is + * selected. + * 8) Enable OHCI clocks, UHP bit in PMC_SCER register. + * + * Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI + * driver is initialized. + */ + +# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */ +# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */ +# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */ + +/* REVISIT: The divisor of 10 produces a rate that is too high. Division + * by 5, however, seems to work just fine. No idea why? + */ + +# define BOARD_UPLL_OHCI_DIV (5) /* Divide by 5 */ +#endif + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * PRESCAL = (MCK / (2 * ADCClock) - 1) + */ + +#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */ +#define BOARD_ADCCLK_FREQUENCY \ + ((BOARD_PLLADIV2_FREQUENCY / (2 *BOARD_PLLADIV2_FREQUENCY)) - 1) + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * CLKFULLDIV = 2*CLKDIV + CLOCKODD; + * MCI_SPEED = MCK / (CLKFULLDIV + 2) + * CLKFULLDIV = MCK / MCI_SPEED - 2 + * + * CLKDIV = CLKFULLDIV >> 1 + * CLOCKODD = CLKFULLDIV & 1 + * + * Where CLKDIV has a range of 0-255. + */ + +/* Initial clock: 400 KHz (target) */ + +#define HSMCI_INIT_CLKDIV sam_hsmci_clkdiv(400000) + +/* MMC transfer clock: 20 MHz (target) */ + +#define HSMCI_MMCXFR_CLKDIV sam_hsmci_clkdiv(20000000) + +/* SD transfer clock: 25 MHz (target) */ + +#define HSMCI_SDXFR_CLKDIV sam_hsmci_clkdiv(25000000) + +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_SDRAM_H */ diff --git a/configs/sama5d3x-ek/norboot/Make.defs b/configs/sama5d3x-ek/norboot/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..a1685440e9362ff7753a6f42548488d746ea89f4 --- /dev/null +++ b/configs/sama5d3x-ek/norboot/Make.defs @@ -0,0 +1,161 @@ +############################################################################ +# configs/sama5d3x-ek/norboot/Make.defs +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) + LDSCRIPT = ddram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y) +ifeq ($(CONFIG_BOOT_SDRAM_DATA),y) + LDSCRIPT = nor-ddram.ld +else + LDSCRIPT = nor-isram.ld +endif +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS1FLASH),y) +# LDSCRIPT = cs1flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS2FLASH),y) +# LDSCRIPT = cs2flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS3FLASH),y) +# LDSCRIPT = cs3flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d3x-ek/norboot/defconfig b/configs/sama5d3x-ek/norboot/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b0481632b11a9ff876c9bd31255d9c54bfa3d3cb --- /dev/null +++ b/configs/sama5d3x-ek/norboot/defconfig @@ -0,0 +1,825 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +# CONFIG_ARMV7A_HAVE_L2CC is not set +# CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# SAMA5 Configuration Options +# +# CONFIG_SAMA5_HAVE_AESB is not set +# CONFIG_SAMA5_HAVE_ICM is not set +# CONFIG_SAMA5_HAVE_RXLP is not set +# CONFIG_SAMA5_HAVE_UART0 is not set +# CONFIG_SAMA5_HAVE_UART1 is not set +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +# CONFIG_SAMA5_HAVE_USART4 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +CONFIG_SAMA5_HAVE_DMA=y +# CONFIG_SAMA5_HAVE_DDR32 is not set +# CONFIG_SAMA5_HAVE_XDMA is not set +CONFIG_SAMA5_HAVE_LCDC=y +CONFIG_SAMA5_HAVE_GMAC=y +# CONFIG_SAMA5_HAVE_EMACA is not set +# CONFIG_SAMA5_HAVE_EMACB is not set +# CONFIG_SAMA5_HAVE_EMAC1 is not set +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +# CONFIG_SAMA5_HAVE_SAIC is not set +# CONFIG_SAMA5_HAVE_SBM is not set +# CONFIG_SAMA5_HAVE_SFC is not set +# CONFIG_SAMA5_HAVE_SPI2 is not set +# CONFIG_SAMA5_HAVE_TC is not set +# CONFIG_SAMA5_HAVE_TC1 is not set +# CONFIG_SAMA5_HAVE_TC2 is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +# CONFIG_SAMA5_HAVE_TWI3 is not set +# CONFIG_SAMA5_HAVE_VDEC is not set +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +CONFIG_ARCH_CHIP_SAMA5D3=y +# CONFIG_ARCH_CHIP_SAMA5D4 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +CONFIG_ARCH_CHIP_ATSAMA5D33=y +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D44 is not set + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +# CONFIG_SAMA5_RTC is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_USART0 is not set +CONFIG_SAMA5_USART1=y +# CONFIG_SAMA5_USART2 is not set +# CONFIG_SAMA5_USART3 is not set +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +# CONFIG_SAMA5_DMAC0 is not set +# CONFIG_SAMA5_DMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_GMAC is not set +# CONFIG_SAMA5_EMACB is not set +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_SHA is not set +# CONFIG_SAMA5_TRNG is not set +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +# CONFIG_SAMA5_MPDDRC is not set +# CONFIG_SAMA5_PIO_IRQ is not set + +# +# External Memory Configuration +# +CONFIG_SAMA5_EBICS0=y +CONFIG_SAMA5_EBICS0_SIZE=134217728 +# CONFIG_SAMA5_EBICS0_SRAM is not set +# CONFIG_SAMA5_EBICS0_PSRAM is not set +# CONFIG_SAMA5_EBICS0_PROM is not set +# CONFIG_SAMA5_EBICS0_EEPROM is not set +# CONFIG_SAMA5_EBICS0_EPROM is not set +# CONFIG_SAMA5_EBICS0_LCD is not set +CONFIG_SAMA5_EBICS0_NOR=y +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +CONFIG_SAMA5_BOOT_ISRAM=y +# CONFIG_SAMA5_BOOT_SDRAM is not set +# CONFIG_SAMA5_BOOT_CS0FLASH is not set + +# +# Heap Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=49341 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00300000 +CONFIG_RAM_VSTART=0x00300000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D3X_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d3x-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_SAMA5D3xEK_384MHZ is not set +CONFIG_SAMA5D3xEK_396MHZ=y +# CONFIG_SAMA5D3xEK_528MHZ is not set +# CONFIG_SAMA5D3xEK_NOREDLED is not set +CONFIG_SAMA5D3xEK_NOR_MAIN=y +# CONFIG_SAMA5D3xEK_NOR_START is not set +# CONFIG_SAMA5D3xEK_SLOWCLOCK is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=29 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nor_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +CONFIG_EXAMPLES_HELLO_PRIORITY=100 +CONFIG_EXAMPLES_HELLO_STACKSIZE=2048 +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d3x-ek/norboot/setenv.sh b/configs/sama5d3x-ek/norboot/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..77b6f710645a401290bee50f1cd0393f68d19017 --- /dev/null +++ b/configs/sama5d3x-ek/norboot/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d3x-ek/norboot/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d3x-ek/nsh/Make.defs b/configs/sama5d3x-ek/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..8c63acfd6c05a29f324eb2d2dbb579baf1a90035 --- /dev/null +++ b/configs/sama5d3x-ek/nsh/Make.defs @@ -0,0 +1,161 @@ +############################################################################ +# configs/sama5d3x-ek/nsh/Make.defs +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) + LDSCRIPT = ddram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y) +ifeq ($(CONFIG_BOOT_SDRAM_DATA),y) + LDSCRIPT = nor-ddram.ld +else + LDSCRIPT = nor-isram.ld +endif +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS1FLASH),y) +# LDSCRIPT = cs1flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS2FLASH),y) +# LDSCRIPT = cs2flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS3FLASH),y) +# LDSCRIPT = cs3flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d3x-ek/nsh/defconfig b/configs/sama5d3x-ek/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..e0e8a622b115d425715d25408f372a69b344148c --- /dev/null +++ b/configs/sama5d3x-ek/nsh/defconfig @@ -0,0 +1,967 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +# CONFIG_ARMV7A_HAVE_L2CC is not set +# CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# SAMA5 Configuration Options +# +# CONFIG_SAMA5_HAVE_AESB is not set +# CONFIG_SAMA5_HAVE_ICM is not set +# CONFIG_SAMA5_HAVE_RXLP is not set +# CONFIG_SAMA5_HAVE_UART0 is not set +# CONFIG_SAMA5_HAVE_UART1 is not set +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +# CONFIG_SAMA5_HAVE_USART4 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +CONFIG_SAMA5_HAVE_DMA=y +# CONFIG_SAMA5_HAVE_DDR32 is not set +# CONFIG_SAMA5_HAVE_XDMA is not set +CONFIG_SAMA5_HAVE_LCDC=y +CONFIG_SAMA5_HAVE_GMAC=y +# CONFIG_SAMA5_HAVE_EMACA is not set +# CONFIG_SAMA5_HAVE_EMACB is not set +# CONFIG_SAMA5_HAVE_EMAC1 is not set +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +# CONFIG_SAMA5_HAVE_SAIC is not set +# CONFIG_SAMA5_HAVE_SBM is not set +# CONFIG_SAMA5_HAVE_SFC is not set +# CONFIG_SAMA5_HAVE_SPI2 is not set +# CONFIG_SAMA5_HAVE_TC is not set +# CONFIG_SAMA5_HAVE_TC1 is not set +# CONFIG_SAMA5_HAVE_TC2 is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +# CONFIG_SAMA5_HAVE_TWI3 is not set +# CONFIG_SAMA5_HAVE_VDEC is not set +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +CONFIG_ARCH_CHIP_SAMA5D3=y +# CONFIG_ARCH_CHIP_SAMA5D4 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +CONFIG_ARCH_CHIP_ATSAMA5D33=y +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D44 is not set + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +# CONFIG_SAMA5_RTC is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_USART0 is not set +CONFIG_SAMA5_USART1=y +# CONFIG_SAMA5_USART2 is not set +# CONFIG_SAMA5_USART3 is not set +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +# CONFIG_SAMA5_DMAC0 is not set +# CONFIG_SAMA5_DMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_GMAC is not set +# CONFIG_SAMA5_EMACB is not set +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_SHA is not set +# CONFIG_SAMA5_TRNG is not set +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +# CONFIG_SAMA5_MPDDRC is not set +# CONFIG_SAMA5_PIO_IRQ is not set + +# +# External Memory Configuration +# +CONFIG_SAMA5_EBICS0=y +CONFIG_SAMA5_EBICS0_SIZE=134217728 +# CONFIG_SAMA5_EBICS0_SRAM is not set +# CONFIG_SAMA5_EBICS0_PSRAM is not set +# CONFIG_SAMA5_EBICS0_PROM is not set +# CONFIG_SAMA5_EBICS0_EEPROM is not set +# CONFIG_SAMA5_EBICS0_EPROM is not set +# CONFIG_SAMA5_EBICS0_LCD is not set +CONFIG_SAMA5_EBICS0_NOR=y +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +# CONFIG_SAMA5_BOOT_SDRAM is not set +CONFIG_SAMA5_BOOT_CS0FLASH=y + +# +# Heap Configuration +# +CONFIG_SAMA5_ISRAM_HEAP=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=49341 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00304000 +CONFIG_RAM_VSTART=0x00304000 +CONFIG_RAM_SIZE=114688 +CONFIG_FLASH_START=0x10000000 +CONFIG_FLASH_VSTART=0x10000000 +CONFIG_FLASH_SIZE=134217728 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D3X_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d3x-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_SAMA5D3xEK_384MHZ is not set +CONFIG_SAMA5D3xEK_396MHZ=y +# CONFIG_SAMA5D3xEK_528MHZ is not set +# CONFIG_SAMA5D3xEK_NOREDLED is not set +# CONFIG_SAMA5D3xEK_SLOWCLOCK is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=31 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d3x-ek/nsh/setenv.sh b/configs/sama5d3x-ek/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..0e95851bd2e327d51d05a1ef6e1a4f2ebe13a470 --- /dev/null +++ b/configs/sama5d3x-ek/nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d3x-ek/nsh/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d3x-ek/nx/Make.defs b/configs/sama5d3x-ek/nx/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..4e0b8da8a904f59997d73c1d3f61fc87cd1a1f18 --- /dev/null +++ b/configs/sama5d3x-ek/nx/Make.defs @@ -0,0 +1,161 @@ +############################################################################ +# configs/sama5d3x-ek/nx/Make.defs +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) + LDSCRIPT = ddram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y) +ifeq ($(CONFIG_BOOT_SDRAM_DATA),y) + LDSCRIPT = nor-ddram.ld +else + LDSCRIPT = nor-isram.ld +endif +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS1FLASH),y) +# LDSCRIPT = cs1flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS2FLASH),y) +# LDSCRIPT = cs2flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS3FLASH),y) +# LDSCRIPT = cs3flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d3x-ek/nx/defconfig b/configs/sama5d3x-ek/nx/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..7faf908eeccf762760b27c8934856b1ae2a851ee --- /dev/null +++ b/configs/sama5d3x-ek/nx/defconfig @@ -0,0 +1,986 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +# CONFIG_ARMV7A_HAVE_L2CC is not set +# CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# SAMA5 Configuration Options +# +# CONFIG_SAMA5_HAVE_AESB is not set +# CONFIG_SAMA5_HAVE_ICM is not set +# CONFIG_SAMA5_HAVE_RXLP is not set +# CONFIG_SAMA5_HAVE_UART0 is not set +# CONFIG_SAMA5_HAVE_UART1 is not set +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +# CONFIG_SAMA5_HAVE_USART4 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +CONFIG_SAMA5_HAVE_DMA=y +# CONFIG_SAMA5_HAVE_DDR32 is not set +# CONFIG_SAMA5_HAVE_XDMA is not set +CONFIG_SAMA5_HAVE_LCDC=y +CONFIG_SAMA5_HAVE_GMAC=y +# CONFIG_SAMA5_HAVE_EMACA is not set +# CONFIG_SAMA5_HAVE_EMACB is not set +# CONFIG_SAMA5_HAVE_EMAC1 is not set +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +# CONFIG_SAMA5_HAVE_SAIC is not set +# CONFIG_SAMA5_HAVE_SBM is not set +# CONFIG_SAMA5_HAVE_SFC is not set +# CONFIG_SAMA5_HAVE_SPI2 is not set +# CONFIG_SAMA5_HAVE_TC is not set +# CONFIG_SAMA5_HAVE_TC1 is not set +# CONFIG_SAMA5_HAVE_TC2 is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +# CONFIG_SAMA5_HAVE_TWI3 is not set +# CONFIG_SAMA5_HAVE_VDEC is not set +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +CONFIG_ARCH_CHIP_SAMA5D3=y +# CONFIG_ARCH_CHIP_SAMA5D4 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +CONFIG_ARCH_CHIP_ATSAMA5D33=y +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D44 is not set + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +# CONFIG_SAMA5_RTC is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_USART0 is not set +CONFIG_SAMA5_USART1=y +# CONFIG_SAMA5_USART2 is not set +# CONFIG_SAMA5_USART3 is not set +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +# CONFIG_SAMA5_DMAC0 is not set +# CONFIG_SAMA5_DMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_GMAC is not set +# CONFIG_SAMA5_EMACB is not set +CONFIG_SAMA5_LCDC=y +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_SHA is not set +# CONFIG_SAMA5_TRNG is not set +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +CONFIG_SAMA5_MPDDRC=y +# CONFIG_SAMA5_PIO_IRQ is not set + +# +# LCDC Configuration +# +CONFIG_SAMA5_LCDC_BACKLIGHT=y +CONFIG_SAMA5_LCDC_DEFBACKLIGHT=0xc8 +CONFIG_SAMA5_LCDC_BACKCOLOR=0x7b5d +CONFIG_SAMA5_LCDC_FB_VBASE=0x20000000 +CONFIG_SAMA5_LCDC_FB_PBASE=0x20000000 +CONFIG_SAMA5_LCDC_FB_SIZE=5767168 + +# +# Base layer configuration +# +CONFIG_SAMA5_LCDC_BASE_ROT0=y +# CONFIG_SAMA5_LCDC_BASE_ROT90 is not set +# CONFIG_SAMA5_LCDC_BASE_ROT180 is not set +# CONFIG_SAMA5_LCDC_BASE_ROT270 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB444 is not set +# CONFIG_SAMA5_LCDC_BASE_ARGB4444 is not set +# CONFIG_SAMA5_LCDC_BASE_RGBA4444 is not set +CONFIG_SAMA5_LCDC_BASE_RGB565=y +# CONFIG_SAMA5_LCDC_BASE_TRGB1555 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB666 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB666P is not set +# CONFIG_SAMA5_LCDC_BASE_TRGB1666 is not set +# CONFIG_SAMA5_LCDC_BASE_TRGBP is not set +# CONFIG_SAMA5_LCDC_BASE_RGB888 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB888P is not set +# CONFIG_SAMA5_LCDC_BASE_TRGB1888 is not set +# CONFIG_SAMA5_LCDC_BASE_ARGB8888 is not set +# CONFIG_SAMA5_LCDC_BASE_RGBA8888 is not set + +# +# External Memory Configuration +# +CONFIG_SAMA5_DDRCS=y +CONFIG_SAMA5_DDRCS_SIZE=268435456 +# CONFIG_SAMA5_DDRCS_LPDDR1 is not set +CONFIG_SAMA5_DDRCS_LPDDR2=y +CONFIG_SAMA5_EBICS0=y +CONFIG_SAMA5_EBICS0_SIZE=134217728 +# CONFIG_SAMA5_EBICS0_SRAM is not set +# CONFIG_SAMA5_EBICS0_PSRAM is not set +# CONFIG_SAMA5_EBICS0_PROM is not set +# CONFIG_SAMA5_EBICS0_EEPROM is not set +# CONFIG_SAMA5_EBICS0_EPROM is not set +# CONFIG_SAMA5_EBICS0_LCD is not set +CONFIG_SAMA5_EBICS0_NOR=y +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +# CONFIG_SAMA5_BOOT_SDRAM is not set +CONFIG_SAMA5_BOOT_CS0FLASH=y + +# +# Heap Configuration +# +CONFIG_SAMA5_ISRAM_HEAP=y +CONFIG_SAMA5_DDRCS_HEAP=y +CONFIG_SAMA5_DDRCS_HEAP_OFFSET=5767168 +CONFIG_SAMA5_DDRCS_HEAP_SIZE=262668288 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=49341 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00304000 +CONFIG_RAM_VSTART=0x00304000 +CONFIG_RAM_SIZE=114688 +CONFIG_FLASH_START=0x10000000 +CONFIG_FLASH_VSTART=0x10000000 +CONFIG_FLASH_SIZE=134217728 +CONFIG_ARCH_HAVE_SDRAM=y +# CONFIG_BOOT_SDRAM_DATA is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D3X_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d3x-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_SAMA5D3xEK_384MHZ is not set +CONFIG_SAMA5D3xEK_396MHZ=y +# CONFIG_SAMA5D3xEK_528MHZ is not set +CONFIG_SAMA5D3xEK_MT47H128M16RT=y +# CONFIG_SAMA5D3xEK_MT47H64M16HR is not set +# CONFIG_SAMA5D3xEK_NOREDLED is not set +# CONFIG_SAMA5D3xEK_SLOWCLOCK is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=8 +CONFIG_START_DAY=16 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nx_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_ANTIALIASING is not set +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=3 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +CONFIG_NXFONT_SERIF22X28B=y +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=16 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# +# CONFIG_NXWIDGETS is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d3x-ek/nx/setenv.sh b/configs/sama5d3x-ek/nx/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c0685defc490bd562c669104f38633b843312b98 --- /dev/null +++ b/configs/sama5d3x-ek/nx/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d3x-ek/nx/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d3x-ek/nxplayer/Make.defs b/configs/sama5d3x-ek/nxplayer/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..813d3a1460eadf01f52b639ef8505ac82fd583cd --- /dev/null +++ b/configs/sama5d3x-ek/nxplayer/Make.defs @@ -0,0 +1,161 @@ +############################################################################ +# configs/sama5d3x-ek/nxplayer/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) + LDSCRIPT = ddram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y) +ifeq ($(CONFIG_BOOT_SDRAM_DATA),y) + LDSCRIPT = nor-ddram.ld +else + LDSCRIPT = nor-isram.ld +endif +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS1FLASH),y) +# LDSCRIPT = cs1flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS2FLASH),y) +# LDSCRIPT = cs2flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS3FLASH),y) +# LDSCRIPT = cs3flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d3x-ek/nxplayer/defconfig b/configs/sama5d3x-ek/nxplayer/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b7495de3e84dc9fd92a72d1e1ee60db1c5a48392 --- /dev/null +++ b/configs/sama5d3x-ek/nxplayer/defconfig @@ -0,0 +1,1112 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +# CONFIG_ARMV7A_HAVE_L2CC is not set +# CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# SAMA5 Configuration Options +# +# CONFIG_SAMA5_HAVE_AESB is not set +# CONFIG_SAMA5_HAVE_ICM is not set +# CONFIG_SAMA5_HAVE_RXLP is not set +# CONFIG_SAMA5_HAVE_UART0 is not set +# CONFIG_SAMA5_HAVE_UART1 is not set +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +# CONFIG_SAMA5_HAVE_USART4 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +CONFIG_SAMA5_HAVE_DMA=y +# CONFIG_SAMA5_HAVE_DDR32 is not set +# CONFIG_SAMA5_HAVE_XDMA is not set +CONFIG_SAMA5_HAVE_LCDC=y +CONFIG_SAMA5_HAVE_GMAC=y +# CONFIG_SAMA5_HAVE_EMACA is not set +# CONFIG_SAMA5_HAVE_EMACB is not set +# CONFIG_SAMA5_HAVE_EMAC1 is not set +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +# CONFIG_SAMA5_HAVE_SAIC is not set +# CONFIG_SAMA5_HAVE_SBM is not set +# CONFIG_SAMA5_HAVE_SFC is not set +# CONFIG_SAMA5_HAVE_SPI2 is not set +# CONFIG_SAMA5_HAVE_TC is not set +# CONFIG_SAMA5_HAVE_TC1 is not set +# CONFIG_SAMA5_HAVE_TC2 is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +# CONFIG_SAMA5_HAVE_TWI3 is not set +# CONFIG_SAMA5_HAVE_VDEC is not set +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +CONFIG_ARCH_CHIP_SAMA5D3=y +# CONFIG_ARCH_CHIP_SAMA5D4 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +CONFIG_ARCH_CHIP_ATSAMA5D33=y +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D44 is not set + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +# CONFIG_SAMA5_RTC is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_USART0 is not set +CONFIG_SAMA5_USART1=y +# CONFIG_SAMA5_USART2 is not set +# CONFIG_SAMA5_USART3 is not set +CONFIG_SAMA5_TWI0=y +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +CONFIG_SAMA5_HSMCI0=y +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +CONFIG_SAMA5_DMAC0=y +# CONFIG_SAMA5_DMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_GMAC is not set +# CONFIG_SAMA5_EMACB is not set +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +CONFIG_SAMA5_SSC0=y +# CONFIG_SAMA5_SHA is not set +# CONFIG_SAMA5_TRNG is not set +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +CONFIG_SAMA5_MPDDRC=y +CONFIG_SAMA5_PIO_IRQ=y +# CONFIG_SAMA5_PIOA_IRQ is not set +# CONFIG_SAMA5_PIOB_IRQ is not set +# CONFIG_SAMA5_PIOC_IRQ is not set +CONFIG_SAMA5_PIOD_IRQ=y +# CONFIG_SAMA5_PIOE_IRQ is not set + +# +# TWI device driver options +# +CONFIG_SAMA5_TWI0_FREQUENCY=100000 + +# +# SSC Configuration +# +CONFIG_SAMA5_SSC_MAXINFLIGHT=16 + +# +# SSC0 Configuration +# +CONFIG_SAMA5_SSC0_DATALEN=16 +CONFIG_SAMA5_SSC0_RX=y +CONFIG_SAMA5_SSC0_RX_RKINPUT=y +# CONFIG_SAMA5_SSC0_RX_TXCLK is not set +# CONFIG_SAMA5_SSC0_RX_MCKDIV is not set +CONFIG_SAMA5_SSC0_RX_FSLEN=1 +CONFIG_SAMA5_SSC0_RX_STTDLY=1 +CONFIG_SAMA5_SSC0_TX=y +# CONFIG_SAMA5_SSC0_TX_TKINPUT is not set +CONFIG_SAMA5_SSC0_TX_RXCLK=y +# CONFIG_SAMA5_SSC0_TX_MCKDIV is not set +CONFIG_SAMA5_SSC0_TX_TKOUTPUT_NONE=y +# CONFIG_SAMA5_SSC0_TX_TKOUTPUT_CONT is not set +# CONFIG_SAMA5_SSC0_TX_TKOUTPUT_XFR is not set +CONFIG_SAMA5_SSC0_TX_FSLEN=0 +CONFIG_SAMA5_SSC0_TX_STTDLY=1 +# CONFIG_SAMA5_SSC0_LOOPBACK is not set + +# +# HSMCI device driver options +# +# CONFIG_SAMA5_HSMCI_RDPROOF is not set +# CONFIG_SAMA5_HSMCI_WRPROOF is not set + +# +# External Memory Configuration +# +CONFIG_SAMA5_DDRCS=y +CONFIG_SAMA5_DDRCS_SIZE=268435456 +# CONFIG_SAMA5_DDRCS_LPDDR1 is not set +CONFIG_SAMA5_DDRCS_LPDDR2=y +CONFIG_SAMA5_EBICS0=y +CONFIG_SAMA5_EBICS0_SIZE=134217728 +# CONFIG_SAMA5_EBICS0_SRAM is not set +# CONFIG_SAMA5_EBICS0_PSRAM is not set +# CONFIG_SAMA5_EBICS0_PROM is not set +# CONFIG_SAMA5_EBICS0_EEPROM is not set +# CONFIG_SAMA5_EBICS0_EPROM is not set +# CONFIG_SAMA5_EBICS0_LCD is not set +CONFIG_SAMA5_EBICS0_NOR=y +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +# CONFIG_SAMA5_BOOT_SDRAM is not set +CONFIG_SAMA5_BOOT_CS0FLASH=y + +# +# Heap Configuration +# +CONFIG_SAMA5_ISRAM_HEAP=y +CONFIG_SAMA5_DDRCS_HEAP=y +CONFIG_SAMA5_DDRCS_HEAP_OFFSET=0 +CONFIG_SAMA5_DDRCS_HEAP_SIZE=268435456 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=49341 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00304000 +CONFIG_RAM_VSTART=0x00304000 +CONFIG_RAM_SIZE=114688 +CONFIG_FLASH_START=0x10000000 +CONFIG_FLASH_VSTART=0x10000000 +CONFIG_FLASH_SIZE=134217728 +CONFIG_ARCH_HAVE_SDRAM=y +# CONFIG_BOOT_SDRAM_DATA is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D3X_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d3x-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +# CONFIG_SAMA5D3xEK_384MHZ is not set +# CONFIG_SAMA5D3xEK_396MHZ is not set +CONFIG_SAMA5D3xEK_528MHZ=y +CONFIG_SAMA5D3xEK_MT47H128M16RT=y +# CONFIG_SAMA5D3xEK_MT47H64M16HR is not set +# CONFIG_SAMA5D3xEK_NOREDLED is not set +CONFIG_SAMA5D3xEK_SLOWCLOCK=y +CONFIG_SAMA5D3xEK_WM8904_I2CFREQUENCY=400000 +CONFIG_SAMA5D3xEK_WM8904_SRCMAIN=y +# CONFIG_SAMA5D3xEK_WM8904_SRCSCK is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=31 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +CONFIG_I2C_RESET=y +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set +# CONFIG_SPI is not set +CONFIG_I2S=y + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +CONFIG_AUDIO_DEVICES=y +# CONFIG_AUDIO_I2SCHAR is not set +# CONFIG_VS1053 is not set +CONFIG_AUDIO_WM8904=y +CONFIG_WM8904_INITVOLUME=250 +CONFIG_WM8904_INFLIGHT=2 +CONFIG_WM8904_MSG_PRIO=1 +CONFIG_WM8904_BUFFER_SIZE=8192 +CONFIG_WM8904_NUM_BUFFERS=8 +CONFIG_WM8904_WORKER_STACKSIZE=1536 +# CONFIG_WM8904_REGDUMP is not set +# CONFIG_WM8904_CLKDEBUG is not set +# CONFIG_AUDIO_NULL is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +CONFIG_AUDIO=y +# CONFIG_AUDIO_MULTI_SESSION is not set + +# +# Audio Buffer Configuration +# +# CONFIG_AUDIO_LARGE_BUFFERS is not set +CONFIG_AUDIO_NUM_BUFFERS=8 +CONFIG_AUDIO_BUFFER_NUMBYTES=8192 +# CONFIG_AUDIO_DRIVER_SPECIFIC_BUFFERS is not set + +# +# Supported Audio Formats +# +# CONFIG_AUDIO_FORMAT_AC3 is not set +# CONFIG_AUDIO_FORMAT_DTS is not set +CONFIG_AUDIO_FORMAT_PCM=y +# CONFIG_AUDIO_FORMAT_MP3 is not set +# CONFIG_AUDIO_FORMAT_MIDI is not set +# CONFIG_AUDIO_FORMAT_WMA is not set +# CONFIG_AUDIO_FORMAT_OGG_VORBIS is not set + +# +# Exclude Specific Audio Features +# +# CONFIG_AUDIO_EXCLUDE_VOLUME is not set +# CONFIG_AUDIO_EXCLUDE_BALANCE is not set +CONFIG_AUDIO_EXCLUDE_EQUALIZER=y +# CONFIG_AUDIO_EXCLUDE_TONE is not set +# CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME is not set +# CONFIG_AUDIO_EXCLUDE_STOP is not set +# CONFIG_AUDIO_EXCLUDE_FFORWARD is not set +CONFIG_AUDIO_EXCLUDE_REWIND=y +# CONFIG_AUDIO_CUSTOM_DEV_PATH is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_HEXED is not set +CONFIG_SYSTEM_NXPLAYER=y +CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500 +CONFIG_NXPLAYER_COMMAND_LINE=y +CONFIG_NXPLAYER_INCLUDE_HELP=y +CONFIG_NXPLAYER_INCLUDE_DEVICE_SEARCH=y +CONFIG_NXPLAYER_INCLUDE_PREFERRED_DEVICE=y +CONFIG_NXPLAYER_FMT_FROM_EXT=y +# CONFIG_NXPLAYER_FMT_FROM_HEADER is not set +CONFIG_NXPLAYER_INCLUDE_MEDIADIR=y +CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/music" +CONFIG_NXPLAYER_RECURSIVE_MEDIA_SEARCH=y +CONFIG_NXPLAYER_INCLUDE_SYSTEM_RESET=y +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d3x-ek/nxplayer/setenv.sh b/configs/sama5d3x-ek/nxplayer/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..722fb349daaa4ccb35df3360460af69181a23aea --- /dev/null +++ b/configs/sama5d3x-ek/nxplayer/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d3x-ek/nxplayer/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d3x-ek/nxwm/Make.defs b/configs/sama5d3x-ek/nxwm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..089d2b4500ecb831328a9b8f956b390502339b05 --- /dev/null +++ b/configs/sama5d3x-ek/nxwm/Make.defs @@ -0,0 +1,161 @@ +############################################################################ +# configs/sama5d3x-ek/nxwm/Make.defs +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) + LDSCRIPT = ddram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y) +ifeq ($(CONFIG_BOOT_SDRAM_DATA),y) + LDSCRIPT = nor-ddram.ld +else + LDSCRIPT = nor-isram.ld +endif +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS1FLASH),y) +# LDSCRIPT = cs1flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS2FLASH),y) +# LDSCRIPT = cs2flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS3FLASH),y) +# LDSCRIPT = cs3flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d3x-ek/nxwm/defconfig b/configs/sama5d3x-ek/nxwm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..1fbbd687983534e591dc92f098c981497469997a --- /dev/null +++ b/configs/sama5d3x-ek/nxwm/defconfig @@ -0,0 +1,1342 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +# CONFIG_ARMV7A_HAVE_L2CC is not set +# CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# SAMA5 Configuration Options +# +# CONFIG_SAMA5_HAVE_AESB is not set +# CONFIG_SAMA5_HAVE_ICM is not set +# CONFIG_SAMA5_HAVE_RXLP is not set +# CONFIG_SAMA5_HAVE_UART0 is not set +# CONFIG_SAMA5_HAVE_UART1 is not set +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +# CONFIG_SAMA5_HAVE_USART4 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +CONFIG_SAMA5_HAVE_DMA=y +# CONFIG_SAMA5_HAVE_DDR32 is not set +# CONFIG_SAMA5_HAVE_XDMA is not set +CONFIG_SAMA5_HAVE_LCDC=y +CONFIG_SAMA5_HAVE_GMAC=y +# CONFIG_SAMA5_HAVE_EMACA is not set +# CONFIG_SAMA5_HAVE_EMACB is not set +# CONFIG_SAMA5_HAVE_EMAC1 is not set +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +# CONFIG_SAMA5_HAVE_SAIC is not set +# CONFIG_SAMA5_HAVE_SBM is not set +# CONFIG_SAMA5_HAVE_SFC is not set +# CONFIG_SAMA5_HAVE_SPI2 is not set +# CONFIG_SAMA5_HAVE_TC is not set +# CONFIG_SAMA5_HAVE_TC1 is not set +# CONFIG_SAMA5_HAVE_TC2 is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +# CONFIG_SAMA5_HAVE_TWI3 is not set +# CONFIG_SAMA5_HAVE_VDEC is not set +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +CONFIG_ARCH_CHIP_SAMA5D3=y +# CONFIG_ARCH_CHIP_SAMA5D4 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +CONFIG_ARCH_CHIP_ATSAMA5D33=y +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D44 is not set + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +# CONFIG_SAMA5_RTC is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_USART0 is not set +CONFIG_SAMA5_USART1=y +# CONFIG_SAMA5_USART2 is not set +# CONFIG_SAMA5_USART3 is not set +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_PWM is not set +CONFIG_SAMA5_ADC=y +# CONFIG_SAMA5_DMAC0 is not set +# CONFIG_SAMA5_DMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_GMAC is not set +# CONFIG_SAMA5_EMACB is not set +CONFIG_SAMA5_LCDC=y +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_SHA is not set +# CONFIG_SAMA5_TRNG is not set +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +CONFIG_SAMA5_MPDDRC=y +# CONFIG_SAMA5_PIO_IRQ is not set + +# +# LCDC Configuration +# +CONFIG_SAMA5_LCDC_BACKLIGHT=y +CONFIG_SAMA5_LCDC_DEFBACKLIGHT=0xc8 +CONFIG_SAMA5_LCDC_BACKCOLOR=0x95fa +CONFIG_SAMA5_LCDC_FB_VBASE=0x20000000 +CONFIG_SAMA5_LCDC_FB_PBASE=0x20000000 +CONFIG_SAMA5_LCDC_FB_SIZE=5767168 + +# +# Base layer configuration +# +CONFIG_SAMA5_LCDC_BASE_ROT0=y +# CONFIG_SAMA5_LCDC_BASE_ROT90 is not set +# CONFIG_SAMA5_LCDC_BASE_ROT180 is not set +# CONFIG_SAMA5_LCDC_BASE_ROT270 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB444 is not set +# CONFIG_SAMA5_LCDC_BASE_ARGB4444 is not set +# CONFIG_SAMA5_LCDC_BASE_RGBA4444 is not set +CONFIG_SAMA5_LCDC_BASE_RGB565=y +# CONFIG_SAMA5_LCDC_BASE_TRGB1555 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB666 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB666P is not set +# CONFIG_SAMA5_LCDC_BASE_TRGB1666 is not set +# CONFIG_SAMA5_LCDC_BASE_TRGBP is not set +# CONFIG_SAMA5_LCDC_BASE_RGB888 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB888P is not set +# CONFIG_SAMA5_LCDC_BASE_TRGB1888 is not set +# CONFIG_SAMA5_LCDC_BASE_ARGB8888 is not set +# CONFIG_SAMA5_LCDC_BASE_RGBA8888 is not set + +# +# ADC configuration +# +# CONFIG_SAMA5_ADC_HAVE_CHAN is not set + +# +# ADC Channel selection +# +# CONFIG_SAMA5_ADC_CHAN4 is not set +# CONFIG_SAMA5_ADC_CHAN5 is not set +# CONFIG_SAMA5_ADC_CHAN6 is not set +# CONFIG_SAMA5_ADC_CHAN7 is not set +# CONFIG_SAMA5_ADC_CHAN8 is not set +# CONFIG_SAMA5_ADC_CHAN9 is not set +# CONFIG_SAMA5_ADC_CHAN10 is not set +# CONFIG_SAMA5_ADC_CHAN11 is not set + +# +# Touchscreen configuration +# +CONFIG_SAMA5_TSD=y +CONFIG_SAMA5_TSD_4WIRE=y +# CONFIG_SAMA5_TSD_4WIRENPM is not set +# CONFIG_SAMA5_TSD_5WIRE is not set +CONFIG_SAMA5_TSD_SWAPXY=y +CONFIG_SAMA5_TSD_THRESHX=12 +CONFIG_SAMA5_TSD_THRESHY=12 +CONFIG_SAMA_TSD_RXP=6 + +# +# External Memory Configuration +# +CONFIG_SAMA5_DDRCS=y +CONFIG_SAMA5_DDRCS_SIZE=268435456 +# CONFIG_SAMA5_DDRCS_LPDDR1 is not set +CONFIG_SAMA5_DDRCS_LPDDR2=y +CONFIG_SAMA5_EBICS0=y +CONFIG_SAMA5_EBICS0_SIZE=134217728 +# CONFIG_SAMA5_EBICS0_SRAM is not set +# CONFIG_SAMA5_EBICS0_PSRAM is not set +# CONFIG_SAMA5_EBICS0_PROM is not set +# CONFIG_SAMA5_EBICS0_EEPROM is not set +# CONFIG_SAMA5_EBICS0_EPROM is not set +# CONFIG_SAMA5_EBICS0_LCD is not set +CONFIG_SAMA5_EBICS0_NOR=y +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +# CONFIG_SAMA5_BOOT_SDRAM is not set +CONFIG_SAMA5_BOOT_CS0FLASH=y + +# +# Heap Configuration +# +CONFIG_SAMA5_ISRAM_HEAP=y +CONFIG_SAMA5_DDRCS_HEAP=y +CONFIG_SAMA5_DDRCS_HEAP_OFFSET=5767168 +CONFIG_SAMA5_DDRCS_HEAP_SIZE=262668288 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=49341 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00304000 +CONFIG_RAM_VSTART=0x00304000 +CONFIG_RAM_SIZE=114688 +CONFIG_FLASH_START=0x10000000 +CONFIG_FLASH_VSTART=0x10000000 +CONFIG_FLASH_SIZE=134217728 +CONFIG_ARCH_HAVE_SDRAM=y +# CONFIG_BOOT_SDRAM_DATA is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D3X_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d3x-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_SAMA5D3xEK_384MHZ is not set +CONFIG_SAMA5D3xEK_396MHZ=y +# CONFIG_SAMA5D3xEK_528MHZ is not set +CONFIG_SAMA5D3xEK_MT47H128M16RT=y +# CONFIG_SAMA5D3xEK_MT47H64M16HR is not set +# CONFIG_SAMA5D3xEK_NOREDLED is not set +CONFIG_SAMA5D3xEK_TSD_DEVMINOR=0 +# CONFIG_SAMA5D3xEK_SLOWCLOCK is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=13 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxwm_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=48 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +CONFIG_ANALOG=y +CONFIG_ADC=y +CONFIG_ADC_FIFOSIZE=8 +# CONFIG_ADC_ADS1242 is not set +# CONFIG_ADC_ADS125X is not set +# CONFIG_ADC_PGA11X is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +# CONFIG_INPUT_MXT is not set +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x95fa +# CONFIG_NX_ANTIALIASING is not set +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +# CONFIG_NX_XYINPUT_MOUSE is not set +CONFIG_NX_XYINPUT_TOUCHSCREEN=y +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=3 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +CONFIG_NXFONT_SANS28X37=y +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +CONFIG_NXFONT_SANS28X37B=y +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +CONFIG_NXTERM=y + +# +# NxTerm Output Text/Graphics Options +# +CONFIG_NXTERM_BPP=16 +CONFIG_NXTERM_CURSORCHAR=137 +CONFIG_NXTERM_MXCHARS=640 +CONFIG_NXTERM_CACHESIZE=32 +CONFIG_NXTERM_LINESEPARATION=0 +# CONFIG_NXTERM_NOWRAP is not set + +# +# NxTerm Input options +# +CONFIG_NXTERM_NXKBDIN=y +CONFIG_NXTERM_KBDBUFSIZE=16 +CONFIG_NXTERM_NPOLLWAITERS=4 + +# +# NX Multi-user only options +# +CONFIG_NX_MULTIUSER=y +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXSERVERMSGS=32 +CONFIG_NX_MXCLIENTMSGS=16 +# CONFIG_NX_NXSTART is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +# CONFIG_NSH_BUILTIN_APPS is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# +CONFIG_NXWIDGETS=y + +# +# NX Server/Device Configuration +# +# CONFIG_NXWIDGETS_FLICKERFREE is not set +# CONFIG_NXWIDGETS_EXTERNINIT is not set +CONFIG_NXWIDGETS_VPLANE=0 +CONFIG_NXWIDGET_SERVERINIT=y +CONFIG_NXWIDGETS_SERVERPRIO=110 +CONFIG_NXWIDGETS_SERVERSTACK=1596 +CONFIG_NXWIDGETS_CLIENTPRIO=100 +CONFIG_NXWIDGETS_LISTENERPRIO=100 +CONFIG_NXWIDGETS_LISTENERSTACK=1596 +# CONFIG_NXWIDGET_EVENTWAIT is not set + +# +# NXWidget Configuration +# +CONFIG_NXWIDGETS_BPP=16 +CONFIG_NXWIDGETS_SIZEOFCHAR=1 + +# +# NXWidget Default Values +# +# CONFIG_NXWIDGETS_SYSTEM_CUSTOM_FONTID is not set +CONFIG_NXWIDGETS_TNXARRAY_INITIALSIZE=16 +CONFIG_NXWIDGETS_TNXARRAY_SIZEINCREMENT=8 +# CONFIG_NXWIDGETS_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_TEXTCOLORS is not set +CONFIG_NXWIDGETS_TRANSPARENT_COLOR=0x0 + +# +# Keypad behavior +# +CONFIG_NXWIDGETS_FIRST_REPEAT_TIME=500 +CONFIG_NXWIDGETS_CONTINUE_REPEAT_TIME=200 +CONFIG_NXWIDGETS_DOUBLECLICK_TIME=350 +CONFIG_NXWIDGETS_KBDBUFFER_SIZE=16 +CONFIG_NXWIDGETS_CURSORCONTROL_SIZE=4 +# CONFIG_NXWIDGET_MEMMONITOR is not set +CONFIG_NXWM=y + +# +# NxWM General Settings +# +CONFIG_NXWM_LARGE_ICONS=y +# CONFIG_NXWM_CUSTOM_FONTID is not set +CONFIG_NXWM_UNITTEST=y + +# +# Color configuration +# +# CONFIG_NXWM_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWM_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWM_CUSTOM_TEXTCOLORS is not set + +# +# Background Image +# +# CONFIG_NXWM_DISABLE_BACKGROUND_IMAGE is not set +CONFIG_NXWM_BACKGROUND_IMAGE="NXWidgets::g_nuttxBitmap320x320" + +# +# NxWM Taskbar Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_TASKBAR_VSPACING=8 +CONFIG_NXWM_TASKBAR_HSPACING=8 +# CONFIG_NXWM_TASKBAR_TOP is not set +# CONFIG_NXWM_TASKBAR_BOTTOM is not set +CONFIG_NXWM_TASKBAR_LEFT=y +# CONFIG_NXWM_TASKBAR_RIGHT is not set +# CONFIG_NXWM_CUSTOM_TASKBAR_WIDTH is not set +# CONFIG_NXWM_TASKBAR_ICONSCALE is not set +# CONFIG_NXWM_DISABLE_MINIMIZE is not set +# CONFIG_NXWM_TASKBAR_NO_BORDER is not set + +# +# NxWM Toolbar Configuration +# +# CONFIG_NXWM_CUSTOM_TOOLBAR_HEIGHT is not set +CONFIG_NXWM_TOOLBAR_CUSTOM_FONTID=y +CONFIG_NXWM_TOOLBAR_FONTID=6 + +# +# NxWM Application Window Configuration +# +# CONFIG_NXWM_CUSTOM_APPWINDOW_ICONS is not set + +# +# NxWM Start Window Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_STARTWINDOW_VSPACING=8 +CONFIG_NXWM_STARTWINDOW_HSPACING=8 +# CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set +CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm" +CONFIG_NXWM_STARTWINDOW_MXMSGS=32 +CONFIG_NXWM_STARTWINDOW_MXMPRIO=42 +CONFIG_NXWM_STARTWINDOW_PRIO=100 +CONFIG_NXWM_STARTWINDOW_STACKSIZE=1596 + +# +# NxTerm Window Settings +# +CONFIG_NXWM_NXTERM=y +CONFIG_NXWM_NXTERM_PRIO=100 +CONFIG_NXWM_NXTERM_STACKSIZE=1596 +# CONFIG_NXWM_NXTERM_CUSTOM_COLORS is not set +CONFIG_NXWM_NXTERM_CUSTOM_FONTID=y +CONFIG_NXWM_NXTERM_FONTID=3 +# CONFIG_NXWM_CUSTOM_NXTERM_ICON is not set + +# +# NxWM Touchscreen Configuration +# +CONFIG_NXWM_TOUCHSCREEN=y + +# +# Touchscreen Device Settings +# +CONFIG_NXWM_TOUCHSCREEN_DEVINIT=y +CONFIG_NXWM_TOUCHSCREEN_DEVNO=0 +CONFIG_NXWM_TOUCHSCREEN_DEVPATH="/dev/input0" +CONFIG_NXWM_TOUCHSCREEN_SIGNO=5 +CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=120 +CONFIG_NXWM_TOUCHSCREEN_LISTENERSTACK=1596 + +# +# NxWM Keyboard Configuration +# +CONFIG_NXWM_KEYBOARD=y + +# +# Keyboard Device Settings +# +CONFIG_NXWM_KEYBOARD_DEVPATH="/dev/console" +# CONFIG_NXWM_KEYBOARD_USBHOST is not set +CONFIG_NXWM_KEYBOARD_SIGNO=6 +CONFIG_NXWM_KEYBOARD_BUFSIZE=16 +CONFIG_NXWM_KEYBOARD_LISTENERPRIO=120 +CONFIG_NXWM_KEYBOARD_LISTENERSTACK=1024 + +# +# NxWM Calibration Display Settings +# +CONFIG_NXWM_CALIBRATION_MARGIN=80 +# CONFIG_NXWM_CALIBRATION_CUSTOM_COLORS is not set +CONFIG_NXWM_CALIBRATION_MESSAGES=y +CONFIG_NXWM_CALIBRATION_CUSTOM_FONTID=y +CONFIG_NXWM_CALIBRATION_FONTID=6 +CONFIG_NXWM_CALIBRATION_AVERAGE=y +CONFIG_NXWM_CALIBRATION_NSAMPLES=4 +CONFIG_NXWM_CALIBRATION_DISCARD_MINMAX=y +CONFIG_NXWM_CALIBRATION_ANISOTROPIC=y +# CONFIG_NXWM_CUSTOM_CALIBRATION_ICON is not set +CONFIG_NXWM_CALIBRATION_SIGNO=5 +CONFIG_NXWM_CALIBRATION_LISTENERPRIO=100 +CONFIG_NXWM_CALIBRATION_LISTENERSTACK=1024 + +# +# NxWM Hex Calculator Display Settings +# +# CONFIG_NXWM_HEXCALCULATOR_CUSTOM_COLORS is not set +# CONFIG_NXWM_CUSTOM_HEXCALCULATOR_ICON is not set +CONFIG_NXWM_HEXCALCULATOR_CUSTOM_FONTID=y +CONFIG_NXWM_HEXCALCULATOR_FONTID=6 + +# +# NxWM Media Player Display Settings +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d3x-ek/nxwm/setenv.sh b/configs/sama5d3x-ek/nxwm/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..b1b4082aae47c968789690b30f862db1076b7d62 --- /dev/null +++ b/configs/sama5d3x-ek/nxwm/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d3x-ek/nxwm/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d3x-ek/ov2640/Make.defs b/configs/sama5d3x-ek/ov2640/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..b5090629e750a09b23a2a1489f1fb857437837cf --- /dev/null +++ b/configs/sama5d3x-ek/ov2640/Make.defs @@ -0,0 +1,161 @@ +############################################################################ +# configs/sama5d3x-ek/ov2640/Make.defs +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) + LDSCRIPT = ddram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y) +ifeq ($(CONFIG_BOOT_SDRAM_DATA),y) + LDSCRIPT = nor-ddram.ld +else + LDSCRIPT = nor-isram.ld +endif +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS1FLASH),y) +# LDSCRIPT = cs1flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS2FLASH),y) +# LDSCRIPT = cs2flash.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_CS3FLASH),y) +# LDSCRIPT = cs3flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d3x-ek/ov2640/defconfig b/configs/sama5d3x-ek/ov2640/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..e6d4510e1a0f8dd7c4f3ed8b4d164c028a37cd74 --- /dev/null +++ b/configs/sama5d3x-ek/ov2640/defconfig @@ -0,0 +1,895 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +# CONFIG_ARMV7A_HAVE_L2CC is not set +# CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# SAMA5 Configuration Options +# +# CONFIG_SAMA5_HAVE_AESB is not set +# CONFIG_SAMA5_HAVE_ICM is not set +# CONFIG_SAMA5_HAVE_RXLP is not set +# CONFIG_SAMA5_HAVE_UART0 is not set +# CONFIG_SAMA5_HAVE_UART1 is not set +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +# CONFIG_SAMA5_HAVE_USART4 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +CONFIG_SAMA5_HAVE_DMA=y +# CONFIG_SAMA5_HAVE_DDR32 is not set +# CONFIG_SAMA5_HAVE_XDMA is not set +CONFIG_SAMA5_HAVE_LCDC=y +CONFIG_SAMA5_HAVE_GMAC=y +# CONFIG_SAMA5_HAVE_EMACA is not set +# CONFIG_SAMA5_HAVE_EMACB is not set +# CONFIG_SAMA5_HAVE_EMAC1 is not set +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +# CONFIG_SAMA5_HAVE_SAIC is not set +# CONFIG_SAMA5_HAVE_SBM is not set +# CONFIG_SAMA5_HAVE_SFC is not set +# CONFIG_SAMA5_HAVE_SPI2 is not set +# CONFIG_SAMA5_HAVE_TC is not set +# CONFIG_SAMA5_HAVE_TC1 is not set +# CONFIG_SAMA5_HAVE_TC2 is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +# CONFIG_SAMA5_HAVE_TWI3 is not set +# CONFIG_SAMA5_HAVE_VDEC is not set +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +CONFIG_ARCH_CHIP_SAMA5D3=y +# CONFIG_ARCH_CHIP_SAMA5D4 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +CONFIG_ARCH_CHIP_ATSAMA5D33=y +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D44 is not set + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +# CONFIG_SAMA5_RTC is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_USART0 is not set +CONFIG_SAMA5_USART1=y +# CONFIG_SAMA5_USART2 is not set +# CONFIG_SAMA5_USART3 is not set +# CONFIG_SAMA5_TWI0 is not set +CONFIG_SAMA5_TWI1=y +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +# CONFIG_SAMA5_DMAC0 is not set +# CONFIG_SAMA5_DMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_GMAC is not set +# CONFIG_SAMA5_EMACB is not set +CONFIG_SAMA5_LCDC=y +CONFIG_SAMA5_ISI=y +# CONFIG_SAMA5_SHA is not set +# CONFIG_SAMA5_TRNG is not set +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +CONFIG_SAMA5_MPDDRC=y +# CONFIG_SAMA5_PIO_IRQ is not set + +# +# LCDC Configuration +# +CONFIG_SAMA5_LCDC_BACKLIGHT=y +CONFIG_SAMA5_LCDC_DEFBACKLIGHT=0xc8 +CONFIG_SAMA5_LCDC_BACKCOLOR=0x7b5d +CONFIG_SAMA5_LCDC_FB_VBASE=0x20000000 +CONFIG_SAMA5_LCDC_FB_PBASE=0x20000000 +CONFIG_SAMA5_LCDC_FB_SIZE=5767168 + +# +# Base layer configuration +# +CONFIG_SAMA5_LCDC_BASE_ROT0=y +# CONFIG_SAMA5_LCDC_BASE_ROT90 is not set +# CONFIG_SAMA5_LCDC_BASE_ROT180 is not set +# CONFIG_SAMA5_LCDC_BASE_ROT270 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB444 is not set +# CONFIG_SAMA5_LCDC_BASE_ARGB4444 is not set +# CONFIG_SAMA5_LCDC_BASE_RGBA4444 is not set +CONFIG_SAMA5_LCDC_BASE_RGB565=y +# CONFIG_SAMA5_LCDC_BASE_TRGB1555 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB666 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB666P is not set +# CONFIG_SAMA5_LCDC_BASE_TRGB1666 is not set +# CONFIG_SAMA5_LCDC_BASE_TRGBP is not set +# CONFIG_SAMA5_LCDC_BASE_RGB888 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB888P is not set +# CONFIG_SAMA5_LCDC_BASE_TRGB1888 is not set +# CONFIG_SAMA5_LCDC_BASE_ARGB8888 is not set +# CONFIG_SAMA5_LCDC_BASE_RGBA8888 is not set + +# +# TWI device driver options +# +CONFIG_SAMA5_TWI1_FREQUENCY=100000 + +# +# External Memory Configuration +# +CONFIG_SAMA5_DDRCS=y +CONFIG_SAMA5_DDRCS_SIZE=268435456 +# CONFIG_SAMA5_DDRCS_LPDDR1 is not set +CONFIG_SAMA5_DDRCS_LPDDR2=y +CONFIG_SAMA5_EBICS0=y +CONFIG_SAMA5_EBICS0_SIZE=134217728 +# CONFIG_SAMA5_EBICS0_SRAM is not set +# CONFIG_SAMA5_EBICS0_PSRAM is not set +# CONFIG_SAMA5_EBICS0_PROM is not set +# CONFIG_SAMA5_EBICS0_EEPROM is not set +# CONFIG_SAMA5_EBICS0_EPROM is not set +# CONFIG_SAMA5_EBICS0_LCD is not set +CONFIG_SAMA5_EBICS0_NOR=y +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +# CONFIG_SAMA5_BOOT_SDRAM is not set +CONFIG_SAMA5_BOOT_CS0FLASH=y + +# +# Heap Configuration +# +CONFIG_SAMA5_ISRAM_HEAP=y +CONFIG_SAMA5_DDRCS_HEAP=y +CONFIG_SAMA5_DDRCS_HEAP_OFFSET=0 +CONFIG_SAMA5_DDRCS_HEAP_SIZE=268435456 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=49341 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00304000 +CONFIG_RAM_VSTART=0x00304000 +CONFIG_RAM_SIZE=114688 +CONFIG_FLASH_START=0x10000000 +CONFIG_FLASH_VSTART=0x10000000 +CONFIG_FLASH_SIZE=134217728 +CONFIG_ARCH_HAVE_SDRAM=y +# CONFIG_BOOT_SDRAM_DATA is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D3X_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d3x-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_SAMA5D3xEK_384MHZ is not set +CONFIG_SAMA5D3xEK_396MHZ=y +# CONFIG_SAMA5D3xEK_528MHZ is not set +CONFIG_SAMA5D3xEK_MT47H128M16RT=y +# CONFIG_SAMA5D3xEK_MT47H64M16HR is not set +CONFIG_SAMA5D3xEK_NOREDLED=y +CONFIG_SAMA5D3xEK_OV2640_DEMO=y +# CONFIG_SAMA5D3xEK_SLOWCLOCK is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=9 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="ov2640_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +CONFIG_VIDEO_DEVICES=y +CONFIG_VIDEO_OV2640=y +CONFIG_OV2640_I2CADDR=0x21 +CONFIG_OV2640_FREQUENCY=400000 +CONFIG_OV2640_RGB565_COLORFMT=y +# CONFIG_OV2640_YUV422_COLORFMT is not set +# CONFIG_OV2640_JPEG is not set +# CONFIG_OV2640_QCIF_RESOLUTION is not set +# CONFIG_OV2640_QVGA_RESOLUTION is not set +# CONFIG_OV2640_CIF_RESOLUTION is not set +# CONFIG_OV2640_VGA_RESOLUTION is not set +CONFIG_OV2640_SVGA_RESOLUTION=y +# CONFIG_OV2640_XVGA_RESOLUTION is not set +# CONFIG_OV2640_SXGA_RESOLUTION is not set +# CONFIG_OV2640_UXGA_RESOLUTION is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d3x-ek/ov2640/setenv.sh b/configs/sama5d3x-ek/ov2640/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..edbf185a00e791ff36223f83156849714bcda8cc --- /dev/null +++ b/configs/sama5d3x-ek/ov2640/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d3x-ek/ov2640/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d3x-ek/scripts/ddram.ld b/configs/sama5d3x-ek/scripts/ddram.ld new file mode 100644 index 0000000000000000000000000000000000000000..8735df50a666f5d6a95f25a03d823ec406bca52c --- /dev/null +++ b/configs/sama5d3x-ek/scripts/ddram.ld @@ -0,0 +1,124 @@ +/**************************************************************************** + * configs/sama5d3x-ek/scripts/ddram.ld + * + * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMA5D3 has 128 KB of ISRAM beginning at virtual address 0x0030:0000. + * This memory configuration, however, loads into the 2Gb SDRAM on board + * the SAMA5D3x-EK which lies at 0x2000:0000. An offset 0x00008000 is + * reserved by the bootloader. + * + * Vectors in low memory are assumed and 16KB of ISRAM is reserved at the + * high end of ISRAM for the page table. + */ + +MEMORY +{ + isram (W!RX) : ORIGIN = 0x300000, LENGTH = 128K - 16K + sdram (W!RX) : ORIGIN = 0x20008000, LENGTH = 2G - 32K +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _etext = ABSOLUTE(.); + } > sdram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > sdram + + .ARM.extab : { + *(.ARM.extab*) + } > sdram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > sdram + PROVIDE_HIDDEN (__exidx_end = .); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sdram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sdram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d3x-ek/scripts/gnu-elf.ld b/configs/sama5d3x-ek/scripts/gnu-elf.ld new file mode 100644 index 0000000000000000000000000000000000000000..82c9b37e2f14a271334391d57f2cfdb39fcf3250 --- /dev/null +++ b/configs/sama5d3x-ek/scripts/gnu-elf.ld @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/sama5d3x-ek/scripts/gnu-elf.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +SECTIONS +{ + .text 0x00000000 : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + *(.ctors) /* Old ABI: Unallocated */ + *(.init_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .dtors : + { + _sdtors = . ; + *(.dtors) /* Old ABI: Unallocated */ + *(.fini_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = . ; + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d3x-ek/scripts/isram.ld b/configs/sama5d3x-ek/scripts/isram.ld new file mode 100644 index 0000000000000000000000000000000000000000..0dde103d9907dd164939ebf45c9ad359a386291e --- /dev/null +++ b/configs/sama5d3x-ek/scripts/isram.ld @@ -0,0 +1,120 @@ +/**************************************************************************** + * configs/sama5d3x-ek/scripts/isram.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMA5D3 has 128 KB of ISRAM beginning at virtual address 0x0030:0000. + * + * Vectors in low memory are assumed and 16KB of ISRAM is reserved at the + * high end of ISRAM for the page table. + */ + +MEMORY +{ + isram (W!RX) : ORIGIN = 0x300000, LENGTH = 128K - 16K +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _etext = ABSOLUTE(.); + } > isram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > isram + + .ARM.extab : { + *(.ARM.extab*) + } > isram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > isram + PROVIDE_HIDDEN (__exidx_end = .); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > isram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > isram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d3x-ek/scripts/nor-ddram.ld b/configs/sama5d3x-ek/scripts/nor-ddram.ld new file mode 100644 index 0000000000000000000000000000000000000000..ecebee5930ffce4f002d1478ff68774760ccb24e --- /dev/null +++ b/configs/sama5d3x-ek/scripts/nor-ddram.ld @@ -0,0 +1,131 @@ +/**************************************************************************** + * configs/sama5d3x-ek/scripts/nor-ddram.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMA5D3x-EK has 128MB of NOR flash at CS0 (0x1000:0000). In this + * configuration, the .text and a copy of the .data section will be loaded + * into NOR flash. NuttX .data, .bss, the IDLE stack, and the primary + * heap will be allocated in SRAM. The SAMA5D3 has 128 KB of ISRAM beginning + * at virtual address 0x0030:0000. + * + * The SAMA5D3 has 128 KB of ISRAM beginning at virtual address 0x0030:0000 + * And 256Mb of SDRAm at address 0x2000:0000. This script assumes ISRAM used + * only for the page table. All variables are retained in SDRAM. + * + * Vectors in low memory are assumed to reside at the beginning of NOR flash. + */ + +MEMORY +{ + norflash (W!RX) : ORIGIN = 0x10000000, LENGTH = 128M + isram (WR) : ORIGIN = 0x00304000, LENGTH = 128K - 16K + sdram (W!RX) : ORIGIN = 0x20000000, LENGTH = 256K +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _etext = ABSOLUTE(.); + } > norflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > norflash + + .ARM.extab : { + *(.ARM.extab*) + } > norflash + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > norflash + PROVIDE_HIDDEN (__exidx_end = .); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sdram AT > norflash + + _eronly = LOADADDR(.data); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sdram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d3x-ek/scripts/nor-isram.ld b/configs/sama5d3x-ek/scripts/nor-isram.ld new file mode 100644 index 0000000000000000000000000000000000000000..c8681562e282ca43ff4f68cea7476992759cfffa --- /dev/null +++ b/configs/sama5d3x-ek/scripts/nor-isram.ld @@ -0,0 +1,135 @@ +/**************************************************************************** + * configs/sama5d3x-ek/scripts/nor-isram.ld + * + * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMA5D3x-EK has 128MB of NOR flash at CS0 (0x1000:0000). In this + * configuration, the .text and a copy of the .data section will be loaded + * into NOR flash. NuttX .data, .bss, the IDLE stack, and the primary + * heap will be allocated in SRAM. The SAMA5D3 has 128 KB of ISRAM beginning + * at virtual address 0x0030:0000. + * + * Vectors in low memory are assumed to reside at the beginning of NOR flash + * 16KB of ISRAM is reserved at the beginning of ISRAM for the page table. + */ + +MEMORY +{ + norflash (W!RX) : ORIGIN = 0x10000000, LENGTH = 128M + isram (WRX) : ORIGIN = 0x00304000, LENGTH = 128K - 16K +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _etext = ABSOLUTE(.); + } > norflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > norflash + + .ARM.extab : { + *(.ARM.extab*) + } > norflash + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > norflash + PROVIDE_HIDDEN (__exidx_end = .); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > isram AT > norflash + + _eronly = LOADADDR(.data); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > isram + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > isram AT > norflash + + _framfuncs = LOADADDR(.ramfunc); + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d3x-ek/scripts/pg-sram.ld b/configs/sama5d3x-ek/scripts/pg-sram.ld new file mode 100644 index 0000000000000000000000000000000000000000..549802619fe8bd0938f53bfc82bae6dd9fec2f28 --- /dev/null +++ b/configs/sama5d3x-ek/scripts/pg-sram.ld @@ -0,0 +1,158 @@ +/**************************************************************************** + * configs/sama5d3x-ek/scripts/pg-isram.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMA5D3 has 128 KB of ISRAM beginning at virtual address 0x0030:0000. + * The .text vitual address space begins at the same location as the physical + * address space: 0x0030:0000. The virtual space is broken up into three + * regions: + * + * PHYSICAL VIRTUAL + * NAME DESCRIPTION SIZE START SIZE START + * -------- -------------------------- ----- ----------- ------- ----------- + * locked Pages locked in memory. 40KB 0x0030:0000 40KB 0x0030:0000 + * paged Pages in nonvolatile store. 48KB 0x0030:a000 48KB 0x0030:a000 + * data .data/.bss/heap. 24KB 0x0031:6000 24KB 0x0031:6000 + * Reserved for page table 16KB 0x0031:c000 16KB 0x0031:c000 + * -------- -------------------------- ----- ----------- ------- ----------- + * 128KB 0x0032 0000 128KB 0x0032 0000 + * + * These region sizes must match the size in pages specified for each region + * in the NuttX configuration file: CONFIG_PAGING_NLOCKED, CONFIG_PAGING_NVPAGED, + * and CONFIG_PAGING_NDATA. + * + * NOTE 1: The locked region is should be big here so that you can enable lots of + * debug output without overflowing the locked region. 32KB would probably be + * plenty if this were a real, optimized application. + * + * NOTE 2: Different compilers will compile the code to different sizes. If you + * get a link time error saying that the locked region is full, you may have to + * re-organize this memory layout (here and in defconfig) to make the locked + * region even bigger. + * + * NOTE 3: Vectors in low memory are assumed and 16KB of ISRAM is reserved at + * the high end of ISRAM for the page table (?). + */ + +MEMORY +{ + locked (rx) : ORIGIN = 0x00300000, LENGTH = 40K + paged (rx) : ORIGIN = 0x0030a000, LENGTH = 48K + data (rw) : ORIGIN = 0x00316000, LENGTH = 24K +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .locked : { + _slocked = ABSOLUTE(.); + *(.vectors) + up_head.o locked.r (.text .text.*) + up_head.o locked.r (.fixup) + up_head.o locked.r (.gnu.warning) + up_head.o locked.r (.rodata .rodata.*) + up_head.o locked.r (.gnu.linkonce.t.*) + up_head.o locked.r (.glue_7) + up_head.o locked.r (.glue_7t) + up_head.o locked.r (.got) + up_head.o locked.r (.gcc_except_table) + up_head.o locked.r (.gnu.linkonce.r.*) + _elocked = ABSOLUTE(.); + } >locked + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > locked + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > isram + PROVIDE_HIDDEN (__exidx_end = .); + + .paged : { + _spaged = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _epaged = ABSOLUTE(.); + } > paged + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > data AT > locked + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > data + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d3x-ek/src/Makefile b/configs/sama5d3x-ek/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..86fd69cd020587853285a7ea9f8d30aa87801bc8 --- /dev/null +++ b/configs/sama5d3x-ek/src/Makefile @@ -0,0 +1,161 @@ +############################################################################ +# configs/sama5d3x-ek/src/Makefile +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c + +ifeq ($(CONFIG_SAMA5_SPI0),y) +CSRCS += sam_spi.c +else +ifeq ($(CONFIG_SAMA5_SPI1),y) +CSRCS += sam_spi.c +endif +endif + +ifeq ($(CONFIG_SAMA5_DDRCS),y) +CSRCS += sam_sdram.c +endif + +ifeq ($(CONFIG_SAMA5_EBICS0_NOR),y) +CSRCS += sam_norflash.c +endif + +ifeq ($(CONFIG_SAMA5_EBICS3_NAND),y) +CSRCS += sam_nandflash.c +endif + +ifeq ($(CONFIG_SAMA5D3xEK_NOR_MAIN),y) +CSRCS += nor_main.c +endif + +ifeq ($(CONFIG_MTD_AT25),y) +ifeq ($(CONFIG_SAMA5_SPI0),y) +CSRCS += sam_at25.c +endif +endif + +ifeq ($(CONFIG_MTD_AT24XX),y) +ifeq ($(CONFIG_SAMA5_TWI0),y) +CSRCS += sam_at24.c +endif +endif + +ifeq ($(CONFIG_SAMA5_HSMCI0),y) +CSRCS += sam_hsmci.c +else +ifeq ($(CONFIG_SAMA5_HSMCI1),y) +CSRCS += sam_hsmci.c +endif +endif + +ifeq ($(CONFIG_SAMA5_UHPHS),y) +CSRCS += sam_usb.c +else +ifeq ($(CONFIG_SAMA5_UDPHS),y) +CSRCS += sam_usb.c +endif +endif + +ifeq ($(CONFIG_SAMA5_EMACA),y) +CSRCS += sam_ethernet.c +else +ifeq ($(CONFIG_SAMA5_GMAC),y) +CSRCS += sam_ethernet.c +endif +endif + +ifeq ($(CONFIG_AUDIO_WM8904),y) +ifeq ($(CONFIG_SAMA5_TWI0),y) +ifeq ($(CONFIG_SAMA5_SSC0),y) +CSRCS += sam_wm8904.c +endif +endif +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += sam_appinit.c +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += sam_adc.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += sam_pwm.c +endif + +ifeq ($(CONFIG_CAN),y) +CSRCS += sam_can.c +endif + +ifeq ($(CONFIG_AUDIO_I2SCHAR),y) +ifeq ($(CONFIG_SAMA5_SSC0),y) +CSRCS += sam_i2schar.c +else +ifeq ($(CONFIG_SAMA5_SSC1),y) +CSRCS += sam_i2schar.c +endif +endif +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += sam_usbmsc.c +endif + +ifeq ($(CONFIG_ARCH_FPU),y) +CSRCS += sam_ostest.c +endif + +ifeq ($(CONFIG_SAMA5_TSD),y) +CSRCS += sam_touchscreen.c +endif + +ifeq ($(CONFIG_VIDEO_OV2640),y) +CSRCS += sam_ov2640.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += sam_autoleds.c +else +CSRCS += sam_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += sam_buttons.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/sama5d3x-ek/src/nor_main.c b/configs/sama5d3x-ek/src/nor_main.c new file mode 100644 index 0000000000000000000000000000000000000000..62fcb9c8e404a7a8b0ab11fda4bbcc6e0784e564 --- /dev/null +++ b/configs/sama5d3x-ek/src/nor_main.c @@ -0,0 +1,199 @@ +/**************************************************************************** + * configs/sama5d3x-ek/src/nor_main.c + * + * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "up_arch.h" +#include "mmu.h" +#include "cache.h" + +#include "sam_periphclks.h" +#include "chip/sam_hsmc.h" +#include "chip/sam_matrix.h" +#include "chip/sam_aximx.h" + +#include "sama5d3x-ek.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define NOR_ENTRY ((nor_entry_t)SAM_EBICS0_VSECTION) + +#define NOR_WAIT 1 +#define NOR_NO_WAIT 0 + +#ifdef CONFIG_SAMA5D3xEK_NOR_START +# define NOR_BOOT_MODE NOR_NO_WAIT +#else +# define NOR_BOOT_MODE NOR_WAIT +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +typedef void (*nor_entry_t)(void); + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nor_main + * + * Description: + * nor_main is a tiny program that runs in ISRAM. nor_main will enable + * NOR flash then jump to the program in NOR flash + * + ****************************************************************************/ + +int nor_main(int argc, char *argv) +{ + uint32_t regval; + + /* Here we have a in memory value we can change in the debugger + * to begin booting in NOR Flash + */ + + static volatile uint32_t wait = NOR_BOOT_MODE; + + printf("Configuring NOR FLASH on CS0 and %s\n", wait ? "waiting" : "booting"); + + /* Make sure that the SMC peripheral is enabled (But of course it is... we + * are executing from NOR FLASH now). + */ + + sam_hsmc_enableclk(); + + /* The SAMA5D3x-EK has 118MB of 16-bit NOR FLASH at CS0. The NOR FLASH + * has already been configured by the first level ROM bootloader... we + * simply need to modify the timing here. + */ + + regval = HSMC_SETUP_NWE_SETUP(1) | HSMC_SETUP_NCS_WRSETUP(0) | + HSMC_SETUP_NRD_SETUP(2) | HSMC_SETUP_NCS_RDSETUP(0); + putreg32(regval, SAM_HSMC_SETUP(HSMC_CS0)); + + regval = HSMC_PULSE_NWE_PULSE(10) | HSMC_PULSE_NCS_WRPULSE(10) | + HSMC_PULSE_NRD_PULSE(11) | HSMC_PULSE_NCS_RDPULSE(11); + putreg32(regval, SAM_HSMC_PULSE(HSMC_CS0)); + + regval = HSMC_CYCLE_NWE_CYCLE(11) | HSMC_CYCLE_NRD_CYCLE(14); + putreg32(regval, SAM_HSMC_CYCLE(HSMC_CS0)); + + regval = HSMC_TIMINGS_TCLR(0) | HSMC_TIMINGS_TADL(0) | + HSMC_TIMINGS_TAR(0) | HSMC_TIMINGS_TRR(0) | + HSMC_TIMINGS_TWB(0) | HSMC_TIMINGS_RBNSEL(0); + putreg32(regval, SAM_HSMC_TIMINGS(HSMC_CS0)); + + regval = HSMC_MODE_READMODE | HSMC_MODE_WRITEMODE | + HSMC_MODE_EXNWMODE_DISABLED | HSMC_MODE_BIT_16 | + HSMC_MODE_TDFCYCLES(1); + putreg32(regval, SAM_HSMC_MODE(HSMC_CS0)); + + /* Interrupts must be disabled through the following. In this configuration, + * there should only be timer interrupts. Your NuttX configuration must use + * CONFIG_SERIAL_LOWCONSOLE=y or printf() will hang when the interrupts + * are disabled! + */ + + (void)up_irq_save(); + + /* Disable MATRIX write protection */ + +#if 0 /* Disabled on reset */ + putreg32(MATRIX_WPMR_WPKEY, SAM_MATRIX_WPMR); +#endif + + /* Set remap state 1. + * + * Boot state: ROM is seen at address 0x00000000 + * Remap State 0: SRAM is seen at address 0x00000000 (through AHB slave + * interface) instead of ROM. + * Remap State 1: HEBI is seen at address 0x00000000 (through AHB slave + * interface) instead of ROM for external boot. + * + * REVISIT: This does not work. No matter what I do, the internal + * SRAM is always visible at address zero. I am missing something. + */ + + putreg32(MATRIX_MRCR_RCB0, SAM_MATRIX_MRCR); /* Enable remap */ + putreg32(AXIMX_REMAP_REMAP1, SAM_AXIMX_REMAP); /* Remap HEBI */ + + /* Restore MATRIX write protection */ + +#if 0 /* Disabled on reset */ + putreg32(MATRIX_WPMR_WPKEY | MATRIX_WPMR_WPEN, SAM_MATRIX_WPMR); +#endif + + /* Disable the caches and the MMU. Disabling the MMU should be safe here + * because there is a 1-to-1 identity mapping between the physical and + * virtual addressing. + */ + + /* NOTE: This generates crashes and lots of error, but does leave the + * system in the proper state to run from NOR: very ugly but usable. + * Better than the alternative. + */ + + cp15_disable_mmu(); + cp15_disable_caches(); + + /* Invalidate caches and TLBs */ + + arch_invalidate_icache(); + arch_invalidate_dcache_all(); + cp15_invalidate_tlbs(); + + /* Then jump into NOR flash */ + + while (wait) + { + } + + NOR_ENTRY(); + + return 0; /* We should not get here in either case */ +} diff --git a/configs/sama5d3x-ek/src/sam_adc.c b/configs/sama5d3x-ek/src/sam_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..f27ba7be0de65ea0f37e8ddbe720edcd2567c3a7 --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_adc.c @@ -0,0 +1,119 @@ +/************************************************************************************ + * configs/sama5d3x-ek/src/sam_adc.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "sam_adc.h" +#include "sama5d3x-ek.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ +#ifdef CONFIG_SAMA5_ADC + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + + adc = sam_adc_initialize(); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +#else + return -ENOSYS; +#endif +} + +#endif /* CONFIG_ADC */ diff --git a/configs/sama5d3x-ek/src/sam_appinit.c b/configs/sama5d3x-ek/src/sam_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..56589915ce70fa5c8b0c0698a82183f190abd078 --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_appinit.c @@ -0,0 +1,186 @@ +/**************************************************************************** + * config/sama5d3x-ek/src/sam_appinit.c + * + * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#include "sama5d3x-ek.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(HAVE_NAND) || defined(HAVE_AT25) || defined(HAVE_AT24) || \ + defined(HAVE_HSMCI) || defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR) ||\ + defined(HAVE_WM8904) || defined(CONFIG_FS_PROCFS) + int ret; +#endif + +#ifdef HAVE_NAND + /* Initialize the NAND driver */ + + ret = sam_nand_automount(NAND_MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_nand_automount failed: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_AT25 + /* Initialize the AT25 driver */ + + ret = sam_at25_automount(AT25_MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_at25_automount failed: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_AT24 + /* Initialize the AT24 driver */ + + ret = sam_at24_automount(AT24_MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_at24_automount failed: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_HSMCI +#ifdef CONFIG_SAMA5_HSMCI0 + /* Initialize the HSMCI0 driver */ + + ret = sam_hsmci_initialize(HSMCI0_SLOTNO, HSMCI0_MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n", + HSMCI0_SLOTNO, HSMCI0_MINOR, ret); + return ret; + } +#endif + +#ifdef CONFIG_SAMA5_HSMCI1 + /* Initialize the HSMCI1 driver */ + + ret = sam_hsmci_initialize(HSMCI1_SLOTNO, HSMCI1_MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n", + HSMCI1_SLOTNO, HSMCI1_MINOR, ret); + return ret; + } +#endif +#endif + +#ifdef HAVE_USBHOST + /* Initialize USB host operation. sam_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + + ret = sam_usbhost_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Start USB monitor: %d\n", ret); + } +#endif + +#ifdef HAVE_WM8904 + /* Configure WM8904 audio */ + + ret = sam_wm8904_initialize(0); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize WM8904 audio: %d\n", + ret); + } +#endif + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = mount(NULL, SAMA5_PROCFS_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to mount procfs at %s: %d\n", + SAMA5_PROCFS_MOUNTPOINT, ret); + } +#endif + + return OK; +} diff --git a/configs/sama5d3x-ek/src/sam_at24.c b/configs/sama5d3x-ek/src/sam_at24.c new file mode 100644 index 0000000000000000000000000000000000000000..ea59b48b33f1542bee356c860e28598469b3301d --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_at24.c @@ -0,0 +1,164 @@ +/**************************************************************************** + * config/sama5d3x-ek/src/sam_at24.c + * + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* AT24 Serial EEPROM + * + * A AT24C512 Serial EEPPROM was used for tested I2C. There are other I2C/TWI + * devices on-board, but the serial EEPROM is the simplest test. + * + * There is, however, no AT24 EEPROM on board the SAMA5D3x-EK: The Serial + * EEPROM was mounted on an external adaptor board and connected to the + * SAMA5D3x-EK thusly: + * + * - VCC -- VCC + * - GND -- GND + * - TWCK0(PA31) -- SCL + * - TWD0(PA30) -- SDA + * + * By default, PA30 and PA31 are SWJ-DP pins, it can be used as a pin for TWI + * peripheral in the end application. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "sam_twi.h" +#include "sama5d3x-ek.h" + +#ifdef HAVE_AT24 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_at24_automount + * + * Description: + * Initialize and configure the AT24 serial EEPROM + * + ****************************************************************************/ + +int sam_at24_automount(int minor) +{ + FAR struct i2c_master_s *i2c; + FAR struct mtd_dev_s *mtd; + static bool initialized = false; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* No.. Get the I2C bus driver */ + + fvdbg("Initialize TWI%d\n", AT24_BUS); + i2c = sam_i2cbus_initialize(AT24_BUS); + if (!i2c) + { + fdbg("ERROR: Failed to initialize TWI%d\n", AT24_BUS); + return -ENODEV; + } + + /* Now bind the I2C interface to the AT24 I2C EEPROM driver */ + + fvdbg("Bind the AT24 EEPROM driver to TWI%d\n", AT24_BUS); + mtd = at24c_initialize(i2c); + if (!mtd) + { + fdbg("ERROR: Failed to bind TWI%d to the AT24 EEPROM driver\n", + AT24_BUS); + return -ENODEV; + } + +#if defined(CONFIG_SAMA5D3xEK_AT24_FTL) + /* And finally, use the FTL layer to wrap the MTD driver as a block driver */ + + fvdbg("Initialize the FTL layer to create /dev/mtdblock%d\n", AT24_MINOR); + ret = ftl_initialize(AT24_MINOR, mtd); + if (ret < 0) + { + fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + +#elif defined(CONFIG_SAMA5D3xEK_AT24_NXFFS) + /* Initialize to provide NXFFS on the MTD interface */ + + fvdbg("Initialize the NXFFS file system\n"); + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", ret); + return ret; + } + + /* Mount the file system at /mnt/at24 */ + + fvdbg("Mount the NXFFS file system at /dev/at24\n"); + ret = mount(NULL, "/mnt/at24", "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif + /* Now we are initializeed */ + + initialized = true; + } + + return OK; +} + +#endif /* HAVE_AT24 */ diff --git a/configs/sama5d3x-ek/src/sam_at25.c b/configs/sama5d3x-ek/src/sam_at25.c new file mode 100644 index 0000000000000000000000000000000000000000..14a77b94934a28e72989863c9e7d9ef186a3f4fa --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_at25.c @@ -0,0 +1,140 @@ +/**************************************************************************** + * config/sama5d3x-ek/src/sam_at25.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "sam_spi.h" +#include "sama5d3x-ek.h" + +#ifdef HAVE_AT25 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_at25_automount + * + * Description: + * Initialize and configure the AT25 serial FLASH + * + ****************************************************************************/ + +int sam_at25_automount(int minor) +{ + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; + static bool initialized = false; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* No.. Get the SPI port driver */ + + spi = sam_spibus_initialize(AT25_PORT); + if (!spi) + { + fdbg("ERROR: Failed to initialize SPI port %d\n", AT25_PORT); + return -ENODEV; + } + + /* Now bind the SPI interface to the AT25 SPI FLASH driver */ + + mtd = at25_initialize(spi); + if (!mtd) + { + fdbg("ERROR: Failed to bind SPI port %d to the AT25 FLASH driver\n"); + return -ENODEV; + } + +#if defined(CONFIG_SAMA5D3xEK_AT25_FTL) + /* And finally, use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(AT25_MINOR, mtd); + if (ret < 0) + { + fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + +#elif defined(CONFIG_SAMA5D3xEK_AT25_NXFFS) + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", ret); + return ret; + } + + /* Mount the file system at /mnt/at25 */ + + ret = mount(NULL, "/mnt/at25", "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif + /* Now we are initializeed */ + + initialized = true; + } + + return OK; +} + +#endif /* HAVE_AT25 */ diff --git a/configs/sama5d3x-ek/src/sam_autoleds.c b/configs/sama5d3x-ek/src/sam_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..7e612dde9d3145ad210a54fe9cf2514250504606 --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_autoleds.c @@ -0,0 +1,186 @@ +/**************************************************************************** + * configs/sama5d3x-ek/src/sam_autoleds.c + * + * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are two LEDs on the SAMA5D3 series-CM board that can be controlled + * by software. A blue LED is controlled via PIO pins. A red LED normally + * provides an indication that power is supplied to the board but can also + * be controlled via software. + * + * PE25. This blue LED is pulled high and is illuminated by pulling PE25 + * low. + * + * PE24. The red LED is also pulled high but is driven by a transistor so + * that it is illuminated when power is applied even if PE24 is not + * configured as an output. If PE24 is configured as an output, then the + * LCD is illuminated by a low output. + * + * These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL Val Meaning LED state + * Blue Red + * ----------------- --- ----------------------- -------- -------- + * LED_STARTED 0 NuttX has been started OFF OFF + * LED_HEAPALLOCATE 0 Heap has been allocated OFF OFF + * LED_IRQSENABLED 0 Interrupts enabled OFF OFF + * LED_STACKCREATED 1 Idle stack created ON OFF + * LED_INIRQ 2 In an interrupt No change + * LED_SIGNAL 2 In a signal handler No change + * LED_ASSERTION 2 An assertion failed No change + * LED_PANIC 3 The system has crashed OFF Blinking + * LED_IDLE N/A MCU is is sleep mode Not used + * + * Thus if the blue LED is statically on, NuttX has successfully booted and + * is, apparently, running normally. If the red is flashing at + * approximately 2Hz, then a fatal error has been detected and the system + * has halted. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_pio.h" +#include "sama5d3x-ek.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED PIOs for output */ + + sam_configpio(PIO_BLUE); +#ifndef CONFIG_SAMA5D3xEK_NOREDLED + sam_configpio(PIO_RED); +#endif +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool blueoff = true; /* Low illuminates */ +#ifndef CONFIG_SAMA5D3xEK_NOREDLED + bool redon = false; /* High illuminates */ +#endif + + switch (led) + { + case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED */ + break; + + case 1: /* LED_STACKCREATED */ + blueoff = false; + break; + + default: + case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ + return; + + case 3: /* LED_PANIC */ +#ifdef CONFIG_SAMA5D3xEK_NOREDLED + blueoff = false; +#else + redon = true; +#endif + break; + } + + sam_piowrite(PIO_BLUE, blueoff); +#ifndef CONFIG_SAMA5D3xEK_NOREDLED + sam_piowrite(PIO_RED, redon); +#endif +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led != 2) + { + sam_piowrite(PIO_BLUE, true); /* Low illuminates */ +#ifndef CONFIG_SAMA5D3xEK_NOREDLED + sam_piowrite(PIO_RED, false); /* High illuminates */ +#endif + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/sama5d3x-ek/src/sam_boot.c b/configs/sama5d3x-ek/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..ce065150c4c7d3c6c35e5084afd81aaa0acb6dfa --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_boot.c @@ -0,0 +1,159 @@ +/************************************************************************************ + * configs/sama5d3x-ek/src/sam_boot.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "sam_sckc.h" +#include "sama5d3x-ek.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAMA5 architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void) +{ +#ifdef CONFIG_SAMA5D3xEK_SLOWCLOCK + /* Enable the external slow clock */ + + sam_sckc_enable(true); +#endif + + /* Configure SPI chip selects if 1) SPI is enable, and 2) the weak function + * sam_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1) + if (sam_spidev_initialize) + { + sam_spidev_initialize(); + } +#endif + +#if defined(CONFIG_SAMA5_DDRCS) && !defined(CONFIG_SAMA5_BOOT_SDRAM) + + /* Configure SDRAM if (1) SDRAM has been enabled in the NuttX configuration and + * (2) if we are not currently running out of SDRAM. If we are now running out + * of SDRAM then we have to assume that some second level bootloader has properly + * configured SDRAM for our use. + */ + + sam_sdram_config(); + +#endif + + /* Initialize USB if the 1) the HS host or device controller is in the + * configuration and 2) the weak function sam_usbinitialize() has been brought + * into the build. Presumeably either CONFIG_USBDEV or CONFIG_USBHOST is also + * selected. + */ + +#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS) + if (sam_usbinitialize) + { + sam_usbinitialize(); + } +#endif + + /* Configure board resources to support networking if the 1) networking is enabled, + * 2) the EMAC or GMAC module is enabled, and 2) the weak function + * sam_netinitialize() has been brought into the build. + */ + +#ifdef HAVE_NETWORK + if (sam_netinitialize) + { + sam_netinitialize(); + } +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + (void)board_app_initialize(); +#endif +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/sama5d3x-ek/src/sam_buttons.c b/configs/sama5d3x-ek/src/sam_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..0449c3a4627c0669bb93ea083a5a5fbd2db33750 --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_buttons.c @@ -0,0 +1,186 @@ +/**************************************************************************** + * configs/sama5d3x-ek/src/sam_buttons.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are five push button switches on the SAMA5D3X-EK base board: + * + * 1. One Reset, board reset (BP1) + * 2. One Wake up, push button to bring the processor out of low power mode + * (BP2) + * 3. One User momentary Push Button + * 4. One Disable CS Push Button + * + * Only the momentary push button is controllable by software (labeled + * "PB_USER1" on the board): + * + * - PE27. Pressing the switch connect PE27 to grounded. Therefore, PE27 + * must be pulled high internally. When the button is pressed the SAMA5 + * will sense "0" is on PE27. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "sam_pio.h" +#include "sama5d3x-ek.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_SAMA5_PIOE_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +static xcpt_t g_irquser1; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + (void)sam_configpio(PIO_USER1); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return sam_pioread(PIO_USER1) ? 0 : BUTTON_USER1_BIT; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address isreturned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_SAMA5_PIO_IRQ must be selected to enable the + * overall PIO IRQ feature and CONFIG_SAMA5_PIOE_IRQ must be enabled to + * select PIOs to support interrupts on PIOE. + * + ****************************************************************************/ + +#if defined(CONFIG_SAMA5_PIOE_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id == BUTTON_USER1) + { + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = g_irquser1; + g_irquser1 = irqhandler; + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + /* Configure the interrupt */ + + sam_pioirq(PIO_USER1); + (void)irq_attach(IRQ_USER1, irqhandler); + sam_pioirqenable(IRQ_USER1); + } + else + { + /* Disable and detach the interrupt */ + + sam_pioirqdisable(IRQ_USER1); + (void)irq_detach(IRQ_USER1); + } + + leave_critical_section(flags); + } + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/sama5d3x-ek/src/sam_can.c b/configs/sama5d3x-ek/src/sam_can.c new file mode 100644 index 0000000000000000000000000000000000000000..d904d12d832ccc843756b33522ee359bb7c58445 --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_can.c @@ -0,0 +1,140 @@ +/************************************************************************************ + * configs/sama5d3x-ek/src/sam_can.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "sam_can.h" +#include "sama5d3x-ek.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_SAMA5_CAN0) || defined(CONFIG_SAMA5_CAN1)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#if defined(CONFIG_SAMA5_CAN0) && defined(CONFIG_SAMA5_CAN1) +# warning "Both CAN0 and CAN1 are enabled. Assuming only CAN0." +# undef CONFIG_SAMA5_CAN1 +#endif + +#ifdef CONFIG_SAMA5_CAN0 +# define CAN_PORT 0 +#else +# define CAN_PORT 1 +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = sam_caninitialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && (CONFIG_SAMA5_CAN0 || CONFIG_SAMA5_CAN1) */ diff --git a/configs/sama5d3x-ek/src/sam_ethernet.c b/configs/sama5d3x-ek/src/sam_ethernet.c new file mode 100644 index 0000000000000000000000000000000000000000..1ac9640c693c3ce0c16465fa8d6e94308576db08 --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_ethernet.c @@ -0,0 +1,360 @@ +/************************************************************************************ + * configs/sama5d3x-ek/src/sam_ethernet.c + * + * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/* Force verbose debug on in this file only to support unit-level testing. */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# define CONFIG_DEBUG_VERBOSE 1 +# undef CONFIG_DEBUG_NET +# define CONFIG_DEBUG_NET 1 +#endif + +#include +#include +#include + +#include +#include + +#include "sam_pio.h" +#include "sam_ethernet.h" + +#include "sama5d3x-ek.h" + +#ifdef HAVE_NETWORK + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_SAMA5_EMACA +# undef CONFIG_SAMA5_EMAC_ISETH0 +#endif + +#ifdef CONFIG_SAMA5_EMAC_ISETH0 +# define SAMA5_EMAC_DEVNAME "eth0" +# define SAMA5_GMAC_DEVNAME "eth1" +#else +# define SAMA5_GMAC_DEVNAME "eth0" +# define SAMA5_EMAC_DEVNAME "eth1" +#endif + +/* Debug ********************************************************************/ +/* Extra, in-depth debug output that is only available if + * CONFIG_NETDEV_PHY_DEBUG us defined. + */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# define phydbg dbg +# define phylldbg lldbg +#else +# define phydbg(x...) +# define phylldbg(x...) +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_SAMA5_PIOE_IRQ +#ifdef CONFIG_SAMA5_EMACA +static xcpt_t g_emac_handler; +#endif +#ifdef CONFIG_SAMA5_GMAC +static xcpt_t g_gmac_handler; +#endif +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_emac_phy_enable and sam_gmac_enable + ************************************************************************************/ + +#ifdef CONFIG_SAMA5_PIOE_IRQ +#ifdef CONFIG_SAMA5_EMACA +static void sam_emac_phy_enable(bool enable) +{ + phydbg("IRQ%d: enable=%d\n", IRQ_INT_ETH1, enable); + if (enable) + { + sam_pioirqenable(IRQ_INT_ETH1); + } + else + { + sam_pioirqdisable(IRQ_INT_ETH1); + } +} + +#endif + +#ifdef CONFIG_SAMA5_GMAC +static void sam_gmac_phy_enable(bool enable) +{ + phydbg("IRQ%d: enable=%d\n", IRQ_INT_ETH0, enable); + if (enable) + { + sam_pioirqenable(IRQ_INT_ETH0); + } + else + { + sam_pioirqdisable(IRQ_INT_ETH0); + } +} +#endif +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +void weak_function sam_netinitialize(void) +{ +#ifdef CONFIG_SAMA5_EMACA + /* Ethernet 10/100 (EMAC A) Port + * + * The main board contains a MICREL PHY device (KSZ8051) operating at 10/100 Mbps. + * The board supports MII and RMII interface modes. + * + * The two independent PHY devices embedded on CM and MB boards are connected to + * independent RJ-45 connectors with built-in magnetic and status LEDs. + * + * At the De-Assertion of Reset: + * PHY ADD[2:0]:001 + * CONFIG[2:0]:001,Mode:RMII + * Duplex Mode:Half Duplex + * Isolate Mode:Disable + * Speed Mode:100Mbps + * Nway Auto-Negotiation:Enable + * + * The KSZ8051 PHY interrupt is available on PE30 INT_ETH1 + */ + + phydbg("Configuring %08x\n", PIO_INT_ETH1); + sam_configpio(PIO_INT_ETH1); +#endif + +#ifdef CONFIG_SAMA5_GMAC + /* Tri-Speed Ethernet PHY + * + * The SAMA5D3 series-CM board is equipped with a MICREL PHY devices (MICREL + * KSZ9021/31) operating at 10/100/1000 Mbps. The board supports RGMII interface + * mode. The Ethernet interface consists of 4 pairs of low voltage differential + * pair signals designated from GRX± and GTx± plus control signals for link + * activity indicators. These signals can be used to connect to a 10/100/1000 + * BaseT RJ45 connector integrated on the main board. + * + * The KSZ9021/31 interrupt is available on PB35 INT_GETH0 + */ + + phydbg("Configuring %08x\n", PIO_INT_ETH0); + sam_configpio(PIO_INT_ETH0); +#endif +} + +/**************************************************************************** + * Name: arch_phy_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a PHY interrupt occurs. This function both attaches + * the interrupt handler and enables the interrupt if 'handler' is non- + * NULL. If handler is NULL, then the interrupt is detached and disabled + * instead. + * + * The PHY interrupt is always disabled upon return. The caller must + * call back through the enable function point to control the state of + * the interrupt. + * + * This interrupt may or may not be available on a given platform depending + * on how the network hardware architecture is implemented. In a typical + * case, the PHY interrupt is provided to board-level logic as a GPIO + * interrupt (in which case this is a board-specific interface and really + * should be called board_phy_irq()); In other cases, the PHY interrupt + * may be cause by the chip's MAC logic (in which case arch_phy_irq()) is + * an appropriate name. Other other boards, there may be no PHY interrupts + * available at all. If client attachable PHY interrupts are available + * from the board or from the chip, then CONFIG_ARCH_PHY_INTERRUPT should + * be defined to indicate that fact. + * + * Typical usage: + * a. OS service logic (not application logic*) attaches to the PHY + * PHY interrupt and enables the PHY interrupt. + * b. When the PHY interrupt occurs: (1) the interrupt should be + * disabled and () work should be scheduled on the worker thread (or + * perhaps a dedicated application thread). + * c. That worker thread should use the SIOCGMIIPHY, SIOCGMIIREG, + * and SIOCSMIIREG ioctl calls** to communicate with the PHY, + * determine what network event took place (Link Up/Down?), and + * take the appropriate actions. + * d. It should then interact the the PHY to clear any pending + * interrupts, then re-enable the PHY interrupt. + * + * * This is an OS internal interface and should not be used from + * application space. Rather applications should use the SIOCMIISIG + * ioctl to receive a signal when a PHY event occurs. + * ** This interrupt is really of no use if the Ethernet MAC driver + * does not support these ioctl calls. + * + * Input Parameters: + * intf - Identifies the network interface. For example "eth0". Only + * useful on platforms that support multiple Ethernet interfaces + * and, hence, multiple PHYs and PHY interrupts. + * handler - The client interrupt handler to be invoked when the PHY + * asserts an interrupt. Must reside in OS space, but can + * signal tasks in user space. A value of NULL can be passed + * in order to detach and disable the PHY interrupt. + * enable - A function pointer that be unsed to enable or disable the + * PHY interrupt. + * + * Returned Value: + * The previous PHY interrupt handler address is returned. This allows you + * to temporarily replace an interrupt handler, then restore the original + * interrupt handler. NULL is returned if there is was not handler in + * place when the call was made. + * + ****************************************************************************/ + +#ifdef CONFIG_SAMA5_PIOE_IRQ +xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable) +{ + irqstate_t flags; + xcpt_t *phandler; + xcpt_t oldhandler; + pio_pinset_t pinset; + phy_enable_t enabler; + int irq; + + DEBUGASSERT(intf); + + nvdbg("%s: handler=%p\n", intf, handler); +#ifdef CONFIG_SAMA5_EMACA + phydbg("EMAC: devname=%s\n", SAMA5_EMAC_DEVNAME); +#endif +#ifdef CONFIG_SAMA5_GMAC + phydbg("GMAC: devname=%s\n", SAMA5_GMAC_DEVNAME); +#endif + +#ifdef CONFIG_SAMA5_EMACA + if (strcmp(intf, SAMA5_EMAC_DEVNAME) == 0) + { + phydbg("Select EMAC\n"); + phandler = &g_emac_handler; + pinset = PIO_INT_ETH1; + irq = IRQ_INT_ETH1; + enabler = sam_emac_phy_enable; + } + else +#endif +#ifdef CONFIG_SAMA5_GMAC + if (strcmp(intf, SAMA5_GMAC_DEVNAME) == 0) + { + phydbg("Select GMAC\n"); + phandler = &g_gmac_handler; + pinset = PIO_INT_ETH0; + irq = IRQ_INT_ETH0; + enabler = sam_gmac_phy_enable; + } + else +#endif + { + ndbg("Unsupported interface: %s\n", intf); + return NULL; + } + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old interrupt handler and save the new one */ + + oldhandler = *phandler; + *phandler = handler; + + /* Configure the interrupt */ + + if (handler) + { + phydbg("Configure pin: %08x\n", pinset); + sam_pioirq(pinset); + + phydbg("Attach IRQ%d\n", irq); + (void)irq_attach(irq, handler); + } + else + { + phydbg("Detach IRQ%d\n", irq); + (void)irq_detach(irq); + enabler = NULL; + } + + /* Return with the interrupt disabled in either case */ + + sam_pioirqdisable(irq); + + /* Return the enabling function pointer */ + + if (enable) + { + *enable = enabler; + } + + /* Return the old handler (so that it can be restored) */ + + leave_critical_section(flags); + return oldhandler; +} +#endif /* CONFIG_SAMA5_PIOE_IRQ */ + +#endif /* HAVE_NETWORK */ diff --git a/configs/sama5d3x-ek/src/sam_hsmci.c b/configs/sama5d3x-ek/src/sam_hsmci.c new file mode 100644 index 0000000000000000000000000000000000000000..a999da2f9a0ad611deeed9d706049f20923bb325 --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_hsmci.c @@ -0,0 +1,344 @@ +/**************************************************************************** + * config/sama5d3x-ek/src/sam_hsmci.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* The SAMA5D3x-EK provides a two SD memory card slots: (1) a full size SD card + * slot (J7 labeled MCI0), and (2) a microSD memory card slot (J6 labeled MCI1). + * + * The full size SD card slot connects via HSMCI0. The card detect discrete + * is available on PB17 (pulled high). The write protect descrete is tied to + * ground (via PP6) and not available to software. The slot supports 8-bit + * wide transfer mode, but the NuttX driver currently uses only the 4-bit + * wide transfer mode + * + * PD17 MCI0_CD + * PD1 MCI0_DA0 + * PD2 MCI0_DA1 + * PD3 MCI0_DA2 + * PD4 MCI0_DA3 + * PD5 MCI0_DA4 + * PD6 MCI0_DA5 + * PD7 MCI0_DA6 + * PD8 MCI0_DA7 + * PD9 MCI0_CK + * PD0 MCI0_CDA + * + * The microSD connects vi HSMCI1. The card detect discrete is available on + * PB18 (pulled high): + * + * PD18 MCI1_CD + * PB20 MCI1_DA0 + * PB21 MCI1_DA1 + * PB22 MCI1_DA2 + * PB23 MCI1_DA3 + * PB24 MCI1_CK + * PB19 MCI1_CDA + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "sam_pio.h" +#include "sam_hsmci.h" + +#include "sama5d3x-ek.h" + +#ifdef HAVE_HSMCI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ +/* This structure holds static information unique to one HSMCI peripheral */ + +struct sam_hsmci_state_s +{ + struct sdio_dev_s *hsmci; /* R/W device handle */ + pio_pinset_t pincfg; /* Card detect PIO pin configuratin */ + uint8_t irq; /* Interrupt number (same as pid) */ + uint8_t slotno; /* Slot number */ + bool cd; /* TRUE: card is inserted */ + xcpt_t handler; /* Interrupt handler */ +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* HSCMI device state */ + +#ifdef CONFIG_SAMA5_HSMCI0 +static int sam_hsmci0_cardetect(int irq, void *regs); + +static struct sam_hsmci_state_s g_hsmci0 = +{ + .pincfg = PIO_MCI0_CD, + .irq = IRQ_MCI0_CD, + .slotno = 0, + .handler = sam_hsmci0_cardetect, +}; +#endif + +#ifdef CONFIG_SAMA5_HSMCI1 +static int sam_hsmci1_cardetect(int irq, void *regs); + +static struct sam_hsmci_state_s g_hsmci1 = +{ + .pincfg = PIO_MCI1_CD, + .irq = IRQ_MCI1_CD, + .slotno = 1, + .handler = sam_hsmci1_cardetect, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_cardinserted_internal + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_cardinserted_internal(struct sam_hsmci_state_s *state) +{ + bool inserted; + + /* Get the state of the PIO pin */ + + inserted = sam_pioread(state->pincfg); + fllvdbg("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES"); + return !inserted; +} + +/**************************************************************************** + * Name: sam_hsmci_cardetect, sam_hsmci0_cardetect, and sam_hsmci1_cardetect + * + * Description: + * Card detect interrupt handlers + * + ****************************************************************************/ + +static int sam_hsmci_cardetect(struct sam_hsmci_state_s *state) +{ + /* Get the current card insertion state */ + + bool cd = sam_cardinserted_internal(state); + + /* Has the card detect state changed? */ + + if (cd != state->cd) + { + /* Yes... remember that new state and inform the HSMCI driver */ + + state->cd = cd; + + /* Report the new state to the SDIO driver */ + + sdio_mediachange(state->hsmci, cd); + } + + return OK; +} + +#ifdef CONFIG_SAMA5_HSMCI0 +static int sam_hsmci0_cardetect(int irq, void *regs) +{ + return sam_hsmci_cardetect(&g_hsmci0); +} +#endif + +#ifdef CONFIG_SAMA5_HSMCI1 +static int sam_hsmci1_cardetect(int irq, void *regs) +{ + return sam_hsmci_cardetect(&g_hsmci1); +} +#endif + +/**************************************************************************** + * Name: sam_hsmci_state + * + * Description: + * Initialize HSMCI PIOs. + * + ****************************************************************************/ + +static struct sam_hsmci_state_s *sam_hsmci_state(int slotno) +{ + struct sam_hsmci_state_s *state = NULL; + +#ifdef CONFIG_SAMA5_HSMCI0 +#ifdef CONFIG_SAMA5_HSMCI1 + if (slotno == 0) +#endif + { + state = &g_hsmci0; + } +#ifdef CONFIG_SAMA5_HSMCI1 + else +#endif +#endif + +#ifdef CONFIG_SAMA5_HSMCI1 + { + state = &g_hsmci1; + } +#endif + + return state; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_hsmci_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int sam_hsmci_initialize(int slotno, int minor) +{ + struct sam_hsmci_state_s *state; + int ret; + + /* Get the static HSMI description */ + + state = sam_hsmci_state(slotno); + if (!state) + { + fdbg("No state for slotno %d\n", slotno); + return -EINVAL; + } + + /* Initialize card-detect and write-protect PIOs */ + + sam_configpio(state->pincfg); + + /* Mount the SDIO-based MMC/SD block driver */ + /* First, get an instance of the SDIO interface */ + + state->hsmci = sdio_initialize(slotno); + if (!state->hsmci) + { + fdbg("Failed to initialize SDIO slot %d\n", slotno); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(minor, state->hsmci); + if (ret != OK) + { + fdbg("Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + /* Configure card detect interrupts */ + + sam_pioirq(state->pincfg); + (void)irq_attach(state->irq, state->handler); + + /* Then inform the HSMCI driver if there is or is not a card in the slot. */ + + state->cd = sam_cardinserted_internal(state); + sdio_mediachange(state->hsmci, state->cd); + + /* Enable card detect interrupts */ + + sam_pioirqenable(state->irq); + return OK; +} + +/**************************************************************************** + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_cardinserted(int slotno) +{ + struct sam_hsmci_state_s *state; + + /* Get the HSMI description */ + + state = sam_hsmci_state(slotno); + if (!state) + { + fdbg("No state for slotno %d\n", slotno); + return false; + } + + /* Return the state of the PIO pin */ + + return sam_cardinserted_internal(state); +} + +/**************************************************************************** + * Name: sam_writeprotected + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_writeprotected(int slotno) +{ + /* There are no write protect pins */ + + return false; +} + +#endif /* HAVE_HSMCI */ diff --git a/configs/sama5d3x-ek/src/sam_i2schar.c b/configs/sama5d3x-ek/src/sam_i2schar.c new file mode 100644 index 0000000000000000000000000000000000000000..5fa7c324db87c8c052f189c2ad57fa4bea7c2f7f --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_i2schar.c @@ -0,0 +1,124 @@ +/************************************************************************************ + * configs/sama5d3x-ek/src/sam_i2schar.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_ssc.h" +#include "sama5d3x-ek.h" + +#if defined(CONFIG_AUDIO_I2SCHAR) && \ + (defined(CONFIG_SAMA5_SSC0) || defined(CONFIG_SAMA5_SSC1)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_SAMA5D3xEK_SSC_PORT +# if defined(CONFIG_SAMA5_SSC0) +# define CONFIG_SAMA5D3xEK_SSC_PORT 0 +# elif defined(CONFIG_SAMA5_SSC1) +# define CONFIG_SAMA5D3xEK_SSC_PORT 1 +# endif +#endif + +#ifndef CONFIG_SAMA5D3xEK_I2SCHAR_MINOR +# define CONFIG_SAMA5D3xEK_I2SCHAR_MINOR 0 +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: i2schar_devinit + * + * Description: + * All architectures must provide the following interface in order to work with + * apps/examples/i2schar. + * + ************************************************************************************/ + +int i2schar_devinit(void) +{ + static bool initialized = false; + struct i2s_dev_s *i2s; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call sam_ssc_initialize() to get an instance of the SSC/I2S interface */ + + i2s = sam_ssc_initialize(CONFIG_SAMA5D3xEK_SSC_PORT); + if (!i2s) + { + dbg("ERROR: Failed to get the SAMA5 SSC/I2S driver for SSC%d\n", + CONFIG_SAMA5D3xEK_SSC_PORT); + return -ENODEV; + } + + /* Register the I2S character driver at "/dev/i2schar0" */ + + ret = i2schar_register(i2s, CONFIG_SAMA5D3xEK_I2SCHAR_MINOR); + if (ret < 0) + { + adbg("ERROR: i2schar_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_AUDIO_I2SCHAR && (CONFIG_SAMA5_SSC0 || CONFIG_SAMA5_SSC1) */ diff --git a/configs/sama5d3x-ek/src/sam_nandflash.c b/configs/sama5d3x-ek/src/sam_nandflash.c new file mode 100644 index 0000000000000000000000000000000000000000..709d3c240c956e838a7a6a05a76ae7f8fbf58d6c --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_nandflash.c @@ -0,0 +1,231 @@ +/**************************************************************************** + * configs/sama5d3x-ek/src/sam_nandflash.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Most of this file derives from Atmel sample code for the SAMA5D3x-EK + * board. That sample code has licensing that is compatible with the NuttX + * modified BSD license: + * + * Copyright (c) 2012, Atmel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor Atmel nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "sam_periphclks.h" +#include "sam_pio.h" +#include "sam_nand.h" +#include "chip/sam_hsmc.h" +#include "chip/sam_pinmap.h" + +#include "sama5d3x-ek.h" + +#ifdef CONFIG_SAMA5_EBICS3_NAND + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_nandflash_config + * + * Description: + * If CONFIG_SAMA5_EBICS3_NAND is defined, then NAND FLASH support is + * enabled. This function provides the board-specific implementation of + * the logic to reprogram the SMC to support NAND FLASH on the specified + * CS. + * + * Input Parameters: + * cs - Chip select number (in the event that multiple NAND devices + * are connected on-board). + * + * Returned Values: + * OK if the HSMC was successfully configured for this CS. A negated + * errno value is returned on a failure. This would fail with -ENODEV, + * for example, if the board does not support NAND FLASH on the requested + * CS. + * + ****************************************************************************/ + +int board_nandflash_config(int cs) +{ + uint32_t regval; + + /* The Embest and Ronetix CM boards and one Hynix NAND HY27UF(08/16)2G2B + * Series NAND (MT29F2G08ABAEAWP). This part has a capacity of 256Mx8bit + * () with spare 8Mx8 bit capacity. The device contains 2048 blocks, composed + * by 64 x 2112 byte pages. The effective size is approximately 256MiB. + * + * NAND is available on CS3. + */ + + if (cs == HSMC_CS3) + { + /* Make sure that the SMC peripheral is enabled. */ + + sam_hsmc_enableclk(); + + /* Configure the SMC */ + + regval = HSMC_SETUP_NWE_SETUP(1) | HSMC_SETUP_NCS_WRSETUP(1) | + HSMC_SETUP_NRD_SETUP(2) | HSMC_SETUP_NCS_RDSETUP(1); + putreg32(regval, SAM_HSMC_SETUP(HSMC_CS3)); + + regval = HSMC_PULSE_NWE_PULSE(5) | HSMC_PULSE_NCS_WRPULSE(7) | + HSMC_PULSE_NRD_PULSE(5) | HSMC_PULSE_NCS_RDPULSE(7); + putreg32(regval, SAM_HSMC_PULSE(HSMC_CS3)); + + regval = HSMC_CYCLE_NWE_CYCLE(8) | HSMC_CYCLE_NRD_CYCLE(9); + putreg32(regval, SAM_HSMC_CYCLE(HSMC_CS3)); + + regval = HSMC_TIMINGS_TCLR(3) | HSMC_TIMINGS_TADL(10) | + HSMC_TIMINGS_TAR(3) | HSMC_TIMINGS_TRR(4) | + HSMC_TIMINGS_TWB(5) | HSMC_TIMINGS_RBNSEL(3) | + HSMC_TIMINGS_NFSEL; + putreg32(regval, SAM_HSMC_TIMINGS(HSMC_CS3)); + + regval = HSMC_MODE_READMODE | HSMC_MODE_WRITEMODE | + HSMC_MODE_BIT_8 | HSMC_MODE_TDFCYCLES(1); + putreg32(regval, SAM_HSMC_MODE(HSMC_CS3)); + + /* Configure NAND PIO pins + * + * NAND Interface: + * + * NCS3/NANDCE - Dedicated pin; no configuration needed + * NANDCLE - PE21 + * NANDALE - PE22 + * NRD/NANDOE - Dedicated pin; no configuration needed + * NWE/NANDWE - Dedicated pin; no configuration needed + * NANDRDY - Dedicated pin; no configuration needed + * M_EBI_D0-7 - Dedicated pins; no configuration needed + */ + + sam_configpio(PIO_HSMC_NANDALE); + sam_configpio(PIO_HSMC_NANDCLE); + + return OK; + } + + return -ENODEV; +} + +/**************************************************************************** + * Name: sam_nand_automount + * + * Description: + * Initialize and configure the NAND on CS3 + * + ****************************************************************************/ + +#ifdef HAVE_NAND +int sam_nand_automount(int minor) +{ + FAR struct mtd_dev_s *mtd; + static bool initialized = false; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Create and initialize an NAND MATD device */ + + mtd = sam_nand_initialize(HSMC_CS3); + if (!mtd) + { + fdbg("ERROR: Failed to create the NAND driver on CS%d\n", HSMC_CS3); + return -ENODEV; + } + +#if defined(CONFIG_SAMA5D3xEK_NAND_FTL) + /* Use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(NAND_MINOR, mtd); + if (ret < 0) + { + fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + +#elif defined(CONFIG_SAMA5D3xEK_NAND_NXFFS) + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", ret); + return ret; + } + + /* Mount the file system at /mnt/nand */ + + ret = mount(NULL, "/mnt/nand", "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} +#endif + +#endif /* CONFIG_SAMA5_EBICS3_NAND */ diff --git a/configs/sama5d3x-ek/src/sam_norflash.c b/configs/sama5d3x-ek/src/sam_norflash.c new file mode 100644 index 0000000000000000000000000000000000000000..1b4ff0c3fb5d56a62949c0d8a1571e5eba92bfc8 --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_norflash.c @@ -0,0 +1,145 @@ +/**************************************************************************** + * configs/sama5d3x-ek/src/sam_norflash.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Most of this file derives from Atmel sample code for the SAMA5D3x-EK + * board. That sample code has licensing that is compatible with the NuttX + * modified BSD license: + * + * Copyright (c) 2012, Atmel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor Atmel nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "up_arch.h" +#include "sam_periphclks.h" +#include "chip/sam_hsmc.h" + +#include "sama5d3x-ek.h" + +#ifdef CONFIG_SAMA5_BOOT_CS0FLASH + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_norflash_config + * + * Description: + * If CONFIG_SAMA5_BOOT_CS0FLASH, then the system is boot directly off + * CS0 NOR FLASH. In this case, we assume that we get here from the + * primary boot loader under these conditions: + * + * "If BMS signal is tied to 0, BMS_BIT is read at 1. The ROM Code + * allows execution of the code contained into the memory connected to + * Chip Select 0 of the External Bus Interface. + * + * "To achieve that, the following sequence is preformed by the ROM + * Code: + * + * - The main clock is the on-chip 12 MHz RC oscillator, + * - The Static Memory Controller is configured with timing allowing + * code execution inCS0 external memory at 12 MHz + * - AXI matrix is configured to remap EBI CS0 address at 0x0 + * - 0x0 is loaded in the Program Counter register + * + * "The user software in the external memory must perform the next + * operation in order to complete the clocks and SMC timings + * configuration to run at a higher clock frequency: + * + * - Enable the 32768 Hz oscillator if best accuracy is needed + * - Reprogram the SMC setup, cycle, hold, mode timing registers + * for EBI CS0, to adapt them to the new clock + * - Program the PMC (Main Oscillator Enable or Bypass mode) + * - Program and Start the PLL + * - Switch the system clock to the new value" + * + * This function provides the board-specific implementation of the logic + * to reprogram the SMC. + * + ****************************************************************************/ + +void board_norflash_config(void) +{ + uint32_t regval; + + /* Make sure that the SMC peripheral is enabled (But of course it is... we + * are executing from NOR FLASH now). + */ + + sam_hsmc_enableclk(); + + /* The SAMA5D3x-EK has 118MB of 16-bit NOR FLASH at CS0. The NOR FLASH + * has already been configured by the first level ROM bootloader... we + * simply need to modify the timing here. + */ + + regval = HSMC_SETUP_NWE_SETUP(1) | HSMC_SETUP_NCS_WRSETUP(0) | + HSMC_SETUP_NRD_SETUP(2) | HSMC_SETUP_NCS_RDSETUP(0); + putreg32(regval, SAM_HSMC_SETUP(HSMC_CS0)); + + regval = HSMC_PULSE_NWE_PULSE(10) | HSMC_PULSE_NCS_WRPULSE(10) | + HSMC_PULSE_NRD_PULSE(11) | HSMC_PULSE_NCS_RDPULSE(11); + putreg32(regval, SAM_HSMC_PULSE(HSMC_CS0)); + + regval = HSMC_CYCLE_NWE_CYCLE(11) | HSMC_CYCLE_NRD_CYCLE(14); + putreg32(regval, SAM_HSMC_CYCLE(HSMC_CS0)); + + regval = HSMC_TIMINGS_TCLR(0) | HSMC_TIMINGS_TADL(0) | + HSMC_TIMINGS_TAR(0) | HSMC_TIMINGS_TRR(0) | + HSMC_TIMINGS_TWB(0) | HSMC_TIMINGS_RBNSEL(0); + putreg32(regval, SAM_HSMC_TIMINGS(HSMC_CS0)); + + regval = HSMC_MODE_READMODE | HSMC_MODE_WRITEMODE | + HSMC_MODE_EXNWMODE_DISABLED | HSMC_MODE_BIT_16 | + HSMC_MODE_TDFCYCLES(1); + putreg32(regval, SAM_HSMC_MODE(HSMC_CS0)); +} + +#endif /* CONFIG_SAMA5_BOOT_CS0FLASH */ diff --git a/configs/sama5d3x-ek/src/sam_ostest.c b/configs/sama5d3x-ek/src/sam_ostest.c new file mode 100644 index 0000000000000000000000000000000000000000..4e521e61ae84f274eddfde6985162b0f56f13848 --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_ostest.c @@ -0,0 +1,113 @@ +/************************************************************************************ + * configs/sama5d3x-ek/src/sam_ostest.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "sama5d3x-ek.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#undef HAVE_FPU +#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_EXAMPLES_OSTEST_FPUTESTDISABLE) && \ + defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && defined(CONFIG_SCHED_WAITPID) && \ + !defined(CONFIG_DISABLE_SIGNALS) +# define HAVE_FPU 1 +#endif + +#ifdef HAVE_FPU + +#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*FPU_CONTEXT_REGS) +# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size" +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static uint32_t g_saveregs[XCPTCONTEXT_REGS]; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ +/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return + * the current FPU registers. + */ + +void arch_getfpu(FAR uint32_t *fpusave) +{ + irqstate_t flags; + + /* Take a snapshot of the thread context right now */ + + flags = enter_critical_section(); + up_saveusercontext(g_saveregs); + + /* Return only the floating register values */ + + memcpy(fpusave, &g_saveregs[REG_S0], (4*FPU_CONTEXT_REGS)); + leave_critical_section(flags); +} + +/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function + * will compare them and return true if they are identical. + */ + +bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2) +{ + return memcmp(fpusave1, fpusave2, (4*FPU_CONTEXT_REGS)) == 0; +} + +#endif /* HAVE_FPU */ diff --git a/configs/sama5d3x-ek/src/sam_ov2640.c b/configs/sama5d3x-ek/src/sam_ov2640.c new file mode 100644 index 0000000000000000000000000000000000000000..cc401ac56ad6e9073b01e15293899a8b7dfa63e0 --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_ov2640.c @@ -0,0 +1,262 @@ +/**************************************************************************** + * configs/sama5d3x-ek/src/sam_ov2640.c + * + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "up_arch.h" + +#include "sam_periphclks.h" +#include "sam_lcd.h" +#include "sam_pck.h" +#include "sam_twi.h" +#include "sam_pio.h" +#include "chip/sam_pinmap.h" + +#include "sama5d3x-ek.h" + +#ifdef HAVE_CAMERA + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Typical OV2640 XVCLK is 24MHz */ + +#define OV2640_FREQUENCY 24000000 + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: ov2640_lcd_initialize + ****************************************************************************/ + +static inline FAR struct fb_vtable_s *ov2640_lcd_initialize(void) +{ + FAR struct fb_vtable_s *vplane; + int ret; + + /* Initialize the frame buffer device */ + + ret = up_fbinitialize(); + if (ret < 0) + { + gdbg("ERROR: up_fbinitialize failed: %d\n", -ret); + return NULL; + } + + vplane = up_fbgetvplane(0); + if (!vplane) + { + gdbg("ERROR: up_fbgetvplane failed\n"); + } + + return vplane; +} + +/**************************************************************************** + * Name: ov2640_camera_initialize + * + * Description: + * Initialize the OV2640 camera in the correct mode of operation + * + * OV2640 Camera Interface + * + * SAMA5D3x PIN SAMA5D3x-EK OV2640 + * PIO PER SIGNAL ISI Socket J11 + * ---- --- ------------- --- ------------ ---------------------------------------- + * --- 1 VDDISI --- + * --- 2 GND --- + * --- 3 VDDISI --- + * --- 4 GND --- + * PE28 ? ? 5 ZB_SLPTR ??? + * PE29 ? ? 6 ZB_RST C6 RESETB Reset mode (?) + * PC27 B TWI1_CK 7 TWCK1 C2 SIO_C SCCB serial interface clock input + * PC26 B TWI1_D 8 TWD1 C1 SIO_D SCCB serial interface data I/O + * --- 9 GND --- + * PD31 B PCK1 (ISI_MCK) 10 ISI_MCK C4 XVCLK System clock input (?) + * --- 11 GND --- + * PA30 C ISI_VSYNC 12 ISI_VSYNC D2 VSYNC Vertical synchronization + * --- 13 GND --- + * PA31 C ISI_HSYNC 14 ISI_HSYNC C3 HREF Horizontal reference output (?) + * --- 15 GND --- + * PC30 C ISI_PCK 16 ISI_PCK E3 PCLK Pixel clock output + * --- 17 GND --- + * PA16 C ISI_D0 18 ISI_D0 E2 Y0 Video port output bit[0] + * PA17 C ISI_D1 19 ISI_D1 E1 Y1 Video port output bit[1] + * PA18 C ISI_D2 20 ISI_D2 F3 Y2 Video port output bit[2] + * PA19 C ISI_D3 21 ISI_D3 G3 Y3 Video port output bit[3] + * PA20 C ISI_D4 22 ISI_D4 F4 Y4 Video port output bit[4] + * PA21 C ISI_D5 23 ISI_D5 G4 Y5 Video port output bit[5] + * PA22 C ISI_D6 24 ISI_D6 E5 Y6 Video port output bit[6] + * PA23 C ISI_D7 25 ISI_D7 G5 Y7 Video port output bit[7] + * PC29 C ISI_D8 26 ISI_D8 F5 Y8 Video port output bit[8] + * PC28 C ISI_D9 27 ISI_D9 G6 Y9 Video port output bit[9] + * PC27 C ISI_D10 28 ISI_D10 --- + * PC26 C ISI_D11 29 ISI_D11 --- + * --- 30 GND --- + * + * ??? ?? A2 EXPST_B Snapshot exposure start trigger + * ??? ?? A6 STROBE Flash control output + * ??? ?? B2 FREX Snapshot trigger + * ??? ?? B6 PWDN Power-down mode enable + * + ****************************************************************************/ + +static inline int ov2640_camera_initialize(void) +{ + FAR struct i2c_master_s *i2c; + uint32_t actual; + int ret; + + /* Get the I2C driver that interfaces with the camers (OV2640_BUS)*/ + + i2c = sam_i2cbus_initialize(OV2640_BUS); + if (!i2c) + { + gdbg("ERROR: Failed to initialize TWI%d\n", OV2640_BUS); + return EXIT_FAILURE; + } + + /* Enable clocking to the ISI peripheral */ + + sam_isi_enableclk(); + + /* Configure OV2640 pins + * + * ISI: + * - HSYNC, VSYNC, PCK + * - 8 data bits for 8-bit color + * PCK + * - PCK1 provides OV2640 system clock + */ + + sam_configpio(PIO_ISI_HSYNC); + sam_configpio(PIO_ISI_VSYNC); + sam_configpio(PIO_ISI_PCK); + + sam_configpio(PIO_ISI_D0); + sam_configpio(PIO_ISI_D1); + sam_configpio(PIO_ISI_D2); + sam_configpio(PIO_ISI_D3); + sam_configpio(PIO_ISI_D4); + sam_configpio(PIO_ISI_D5); + sam_configpio(PIO_ISI_D6); + sam_configpio(PIO_ISI_D7); + + sam_configpio(PIO_PMC_PCK1); + + /* Configure and enable the PCK1 output */ + + actual = sam_pck_configure(PCK1, PCKSRC_MCK, OV2640_FREQUENCY); + gvdbg("Desired PCK1 frequency: %ld Actual: %ld\n", + (long)OV2640_FREQUENCY, (long)actual); + UNUSED(actual); + + sam_pck_enable(PCK1, true); + + /* Configure the ISI peripheral */ +#warning Missing Logic + + /* Initialize the OV2640 camera */ + + ret = ov2640_initialize(i2c); + if (ret < 0) + { + gdbg("ERROR: Failed to initialize the OV2640: %d\n", ret); + return EXIT_FAILURE; + } + + return EXIT_FAILURE; +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: ov2640_main + * + * Description: + * Entry point for the OV2640 Camera Demo + * + ************************************************************************************/ + +int ov2640_main(int argc, char *argv[]) +{ + FAR struct fb_vtable_s *vplane; + int ret; + + /* First, initialize the display */ + + vplane = ov2640_lcd_initialize(); + if (!vplane) + { + gdbg("ERROR: ov2640_lcd_initialize failed\n"); + return EXIT_FAILURE; + } + + /* Then, initialize the camera */ + + ret = ov2640_camera_initialize(); + if (ret != EXIT_SUCCESS) + { + gdbg("ERROR: ov2640_camera_initialize failed\n"); + return EXIT_FAILURE; + } + + /* Now if everything is set up properly, the camera output should be + * visible on the LCD. + */ + + return EXIT_SUCCESS; +} + +#endif /* HAVE_CAMERA */ diff --git a/configs/sama5d3x-ek/src/sam_pwm.c b/configs/sama5d3x-ek/src/sam_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..79ff78e337c34f3a2765ae7d78fb5f6dfbb57bbd --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_pwm.c @@ -0,0 +1,163 @@ +/************************************************************************************ + * configs/sama5d3x-ek/src/sam_pwm.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include + +#include "sam_pwm.h" +#include "sama5d3x-ek.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* PWM. There are no dedicated PWM output pins available to the user for PWM + * testing. Care must be taken because all PWM output pins conflict with some other + * usage of the pin by other devices: + * + * -----+---+---+----+-------------------- + * PWM PIN PER PIO CONFLICTS + * -----+---+---+----+-------------------- + * PWM0 FI B PC28 SPI1, ISI + * H B PB0 GMAC + * B PA20 LCDC, ISI + * L B PB1 GMAC + * B PA21 LCDC, ISI + * -----+---+---+----+-------------------- + * PWM1 FI B PC31 HDMI + * H B PB4 GMAC + * B PA22 LCDC, ISI + * L B PB5 GMAC + * B PE31 ISI, HDMI + * B PA23 LCDC, ISI + * -----+---+---+----+-------------------- + * PWM2 FI B PC29 UART0, ISI, HDMI + * H C PD5 HSMCI0 + * B PB8 GMAC + * L C PD6 HSMCI0 + * B PB9 GMAC + * -----+---+---+----+-------------------- + * PWM3 FI C PD16 SPI0, Audio + * H C PD7 HSMCI0 + * B PB12 GMAC + * L C PD8 HSMCI0 + * B PB13 GMAC + * -----+---+---+----+-------------------- + */ + +#ifndef CONFIG_SAMA5D3xEK_CHANNEL +# if defined(CONFIG_SAMA5_PWM_CHAN0) +# warning Assuming PWM channel 0 +# define CONFIG_SAMA5D3xEK_CHANNEL 0 +# elif defined(CONFIG_SAMA5_PWM_CHAN1) +# warning Assuming PWM channel 1 +# define CONFIG_SAMA5D3xEK_CHANNEL 1 +# elif defined(CONFIG_SAMA5_PWM_CHAN2) +# warning Assuming PWM channel 2 +# define CONFIG_SAMA5D3xEK_CHANNEL 2 +# elif defined(CONFIG_SAMA5_PWM_CHAN3) +# warning Assuming PWM channel 3 +# define CONFIG_SAMA5D3xEK_CHANNEL 3 +# endif +#endif + +#if defined(CONFIG_PWM) && defined(CONFIG_SAMA5_PWM) + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All SAMA5 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call sam_pwminitialize() to get an instance of the PWM interface */ + + pwm = sam_pwminitialize(CONFIG_SAMA5D3xEK_CHANNEL); + if (!pwm) + { + dbg("Failed to get the SAMA5 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/sama5d3x-ek/src/sam_sdram.c b/configs/sama5d3x-ek/src/sam_sdram.c new file mode 100644 index 0000000000000000000000000000000000000000..184c5cbda4b2047d92c0419cc4cd3b34503ed4f9 --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_sdram.c @@ -0,0 +1,606 @@ +/**************************************************************************** + * configs/sama5d3x-ek/src/sam_sdram.c + * + * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Most of this file derives from Atmel sample code for the SAMA5D3x-E + * board. That sample code has licensing that is compatible with the NuttX + * modified BSD license: + * + * Copyright (c) 2012, Atmel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor Atmel nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "up_arch.h" + +#include "sam_periphclks.h" +#include "chip/sam_memorymap.h" +#include "chip/sam_pmc.h" +#include "chip/sam_sfr.h" +#include "chip/sam_mpddrc.h" + +#include "sama5d3x-ek.h" + +/* This file requires: + * + * CONFIG_SAMA5_DDRCS -- DRAM support is enabled, and + * !CONFIG_SAMA5_BOOT_SDRAM - We did not boot into SRAM. + */ + +#if defined(CONFIG_SAMA5_DDRCS) && !defined(CONFIG_SAMA5_BOOT_SDRAM) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* SDRAM differences */ + +#if defined(CONFIG_SAMA5D3xEK_MT47H128M16RT) + + /* Used for SDRAM command handshaking */ + +# define DDR2_BA0 (1 << 26) +# define DDR2_BA1 (1 << 27) + +#elif defined(CONFIG_SAMA5D3xEK_MT47H64M16HR) + + /* Used for SDRAM command handshaking */ + +# define DDR2_BA0 (1 << 25) +# define DDR2_BA1 (1 << 26) + +#else +# error Unknown SDRAM type +#endif + +/* The delay loop in sam_sdram_delay requires 6 core cycles per iteration. + * + * At 384MHz: + * + * (6 cycles/iteration) / (0.384 cycles/nanosecond) = + * 15.6250 nanoseconds per iteration + * + * At 396MHz: + * + * (6 cycles/iteration) / (0.396 cycles/nanosecond) = + * 15.1515 nanoseconds per iteration + * + * At 528MHz: + * + * (6 cycles/iteration) / (0.528 cycles/nanosecond) = + * 11.3636 nanoseconds per iteration + */ + +#define LOOP_GUARD 100 +# define CYCLES_TO_COUNT(cycles) (((cycles) / 6) + LOOP_GUARD) + +#if defined(CONFIG_SAMA5D3xEK_384MHZ) +# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 15625) + LOOP_GUARD) +# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 15625) + LOOP_GUARD) +#elif defined(CONFIG_SAMA5D3xEK_528MHZ) +# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 11364) + LOOP_GUARD) +# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 11364) + LOOP_GUARD) +#else /* #elif defined(CONFIG_SAMA5D3xEK_396MHZ) */ +# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 15152) + LOOP_GUARD) +# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 15152) + LOOP_GUARD) +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_sdram_delay + * + * Description: + * Precision delay function for SDRAM configuration. + * + * This delay loop requires 6 core cycles per iteration. The actual + * amount of time delayed will then vary with PCK. + * + ****************************************************************************/ + +static inline void sam_sdram_delay(unsigned int loops) +{ + volatile unsigned int i; + + for (i = 0; i < loops; i++) + { + asm("nop"); + } +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_sdram_config + * + * Description: + * Configures DDR2 (MT47H128M16RT 128MB or, optionally, MT47H64M16HR) + * + * Per the SAMA5D3x-EK User guide: "Two SDRAM/DDR2 used as main system memory. + * MT47H128M16 - 2 Gb - 16 Meg x 16 x 8 banks, the board provides up to 2 Gb on- + * board, soldered DDR2 SDRAM. The memory bus is 32 bits wide and operates with + * up to 166 MHz." + * + * From the Atmel Code Example: + * MT47H64M16HR : 8 Meg x 16 x 8 banks + * Refresh count: 8K + * Row address: A[12:0] (8K) + * Column address A[9:0] (1K) + * Bank address BA[2:0] a(24,25) (8) + * + * This logic was taken from Atmel sample code for the SAMA5D3x-EK. + * + * Input Parameters: + * devtype - Either DDRAM_MT47H128M16RT or DDRAM_MT47H64M16HR + * + * Assumptions: + * The DDR memory regions is configured as strongly ordered memory. When + * we complete initialization of SDRAM and it is ready for use, we will + * make DRAM into normal memory. + * + ************************************************************************************/ + +void sam_sdram_config(void) +{ + volatile uint8_t *ddr = (uint8_t *)SAM_DDRCS_VSECTION; + uint32_t regval; + + /* Enable x2 clocking to the MPDDRC */ + + sam_mpddrc_enableclk(); + + /* Enable DDR clocking */ + + regval = getreg32(SAM_PMC_SCER); + regval |= PMC_DDRCK; + putreg32(regval, SAM_PMC_SCER); + + /* Clear the low power register */ + + putreg32(0, SAM_MPDDRC_LPR); + + /* Enable autofresh during calibration (undocumented) */ + + regval = getreg32(SAM_MPDDRC_HS); + regval |= MPDDRC_HS_AUTOREFRESH_CAL; + putreg32(regval, SAM_MPDDRC_HS); + + /* Force DDR_DQ and DDR_DQS input buffer always on */ + + regval = getreg32(SAM_SFR_DDRCFG); + regval |= SFR_FDQIEN | SFR_FDQSIEN; + putreg32(regval, SAM_SFR_DDRCFG); + + /* Configure the slave offset register */ + + regval = MPDDRC_DLL_SOR_S0OFF(1) | /* DLL Slave 0 Delay Line Offset */ + MPDDRC_DLL_SOR_S1OFF(0) | /* DLL Slave 1 Delay Line Offset */ + MPDDRC_DLL_SOR_S2OFF(1) | /* DLL Slave 2 Delay Line Offset */ + MPDDRC_DLL_SOR_S3OFF(1); /* DLL Slave 3 Delay Line Offset */ + putreg32(regval, SAM_MPDDRC_DLL_SOR); + + /* Configure the master offset register (including upper mystery bits) */ + + regval = MPDDRC_DLL_MOR_MOFF(7) | /* DLL Master Delay Line Offset */ + MPDDRC_DLL_MOR_CLK90OFF(31) | /* DLL CLK90 Delay Line Offset */ + MPDDRC_DLL_MOR_SELOFF | /* DLL Offset Selection */ + MPDDRC_DLL_MOR_KEY; /* Undocumented key */ + putreg32(regval, SAM_MPDDRC_DLL_MOR); + + /* Configure the I/O calibration register */ + + regval = getreg32(SAM_MPDDRC_IO_CALIBR); + regval &= ~(MPDDRC_IO_CALIBR_RDIV_MASK | MPDDRC_IO_CALIBR_TZQIO_MASK); + regval |= (MPDDRC_IO_CALIBR_RZQ48_40 | MPDDRC_IO_CALIBR_TZQIO(3)); + putreg32(regval, SAM_MPDDRC_IO_CALIBR); + + /* Force DDR_DQ and DDR_DQS input buffer always on */ + + putreg32(SFR_FDQIEN | SFR_FDQSIEN, SAM_SFR_DDRCFG); + + /* Step 1: Program the memory device type + * + * DBW = 0 (32-bit bus wide) + * Memory Device = DDR2-SDRAM + */ + + putreg32(MPDDRC_MD_DDR2_SDRAM, SAM_MPDDRC_MD); + + /* Step 2: Program the features of DDR2-SDRAM device into the Timing + * Register + */ + +#if defined(CONFIG_SAMA5D3xEK_MT47H128M16RT) + + /* For MT47H128M16RT + * + * NC = 10 DDR column bits + * NR = 14 DDR row bits + * CAS = DDR2/LPDDR2 CAS Latency 4 + * DLL = Disable reset (0) + * DIC_DS = 0 + * DIS_DLL = Enable PLL (0) + * ZQ = Calibration command after initialization (0) + * OCD = OCD calibration mode exit, maintain setting (0) + * DQMS = Not shared (0) + * ENDRM = Disable read measure (0) + * NB = 8 banks + * NDQS = Not DQS disabled + * DECODE = Sequential decoding (0) + * UNAL = Unaliged access supported + */ + + regval = MPDDRC_CR_NC_10 | /* Number of Column Bits */ + MPDDRC_CR_NR_14 | /* Number of Row Bits */ + MPDDRC_CR_CAS_4 | /* CAS Latency */ + MPDDRC_CR_OCD_EXIT | /* Off-chip Driver */ + MPDDRC_CR_8BANKS | /* Number of Banks */ + MPDDRC_CR_NDQS | /* Not DQS */ + MPDDRC_CR_UNAL; /* upport Unaligned Access */ + +#elif defined(CONFIG_SAMA5D3xEK_MT47H64M16HR) + /* For MT47H64M16HR + * + * NC = 10 DDR column bits + * NR = 13 DDR row bits + * CAS = DDR2/LPDDR2 CAS Latency 3 + * DLL = Disable reset (0) + * DIC_DS = 0 + * DIS_DLL = Enable PLL (0) + * ZQ = Calibration command after initialization (0) + * OCD = OCD calibration mode exit, maintain setting (0) + * DQMS = Not shared (0) + * ENDRM = Disable read measure (0) + * NB = 8 banks + * NDQS = Not DQS disabled + * DECODE = Sequential decoding (0) + * UNAL = Unaliged access supported + */ + + regval = MPDDRC_CR_NC_10 | /* Number of Column Bits */ + MPDDRC_CR_NR_13 | /* Number of Row Bits */ + MPDDRC_CR_CAS_3 | /* CAS Latency */ + MPDDRC_CR_OCD_EXIT | /* Off-chip Driver */ + MPDDRC_CR_8BANKS | /* Number of Banks */ + MPDDRC_CR_NDQS | /* Not DQS */ + MPDDRC_CR_UNAL; /* upport Unaligned Access */ + +#else +# error Unknwon SDRAM type +#endif + + putreg32(regval, SAM_MPDDRC_CR); + + /* Configure the Timing Parameter 0 Register */ + + regval = MPDDRC_TPR0_TRAS(6) | /* Active to Precharge Delay: 6 * 7.5 = 45 ns */ + MPDDRC_TPR0_TRCD(2) | /* Row to Column Delay: 2 * 7.5 = 15 ns */ + MPDDRC_TPR0_TWR(2) | /* Write Recovery Delay: 3 * 7.5 = 22.5 ns */ + MPDDRC_TPR0_TRC(8) | /* Row Cycle Delay: 8 * 7.5 = 60 ns */ + MPDDRC_TPR0_TRP(2) | /* Row Precharge Delay: 2 * 7.5 = 15 ns */ + MPDDRC_TPR0_TRRD(1) | /* Active BankA to Active BankB: 2 * 7.5 = 15 ns */ + MPDDRC_TPR0_TWTR(2) | /* Internal Write to Read Delay: 2 clock cycle */ + MPDDRC_TPR0_TMRD(2); /* Load Mode Register Command to + * Activate or Refresh Command: 2 clock cycles */ + putreg32(regval, SAM_MPDDRC_TPR0); + + /* Configure the Timing Parameter 1 Register */ + + regval = MPDDRC_TPR1_TRFC(14) | /* Row Cycle Delay: + * 18 * 7.5 = 135 ns (min 127.5 ns for 1Gb DDR) */ + MPDDRC_TPR1_TXSNR(16) | /* Exit Self Refresh Delay to Non Read Command: + * 20 * 7.5 > 142.5ns TXSNR: Exit self refresh + * delay to non read command */ + MPDDRC_TPR1_TXSRD(208) | /* Exit Self Refresh Delay to Read Command: + * min 200 clock cycles, TXSRD: Exit self refresh + * delay to Read command */ + MPDDRC_TPR1_TXP(2); /* Exit Power-down Delay to First Command: + * 2 * 7.5 = 15 ns */ + putreg32(regval, SAM_MPDDRC_TPR1); + + /* Configure the Timing Parameter 2 Register */ + + regval = MPDDRC_TPR2_TXARD(7) | /* Exit Active Power Down Delay to Read Command in Mode 'Fast Exit': + * min 2 clock cycles */ + MPDDRC_TPR2_TXARDS(7) | /* Exit Active Power Down Delay to Read Command in Mode 'Slow Exit': + * min 7 clock cycles */ + MPDDRC_TPR2_TRPA(2) | /* Row Precharge All Delay: + * min 18ns */ + MPDDRC_TPR2_TRTP(2) | /* Four Active Windows: + * 2 * 7.5 = 15 ns (min 7.5ns) */ + MPDDRC_TPR2_TFAW(10); + putreg32(regval, SAM_MPDDRC_TPR2); + + /* DDRSDRC Low-power Register */ + + sam_sdram_delay(USEC_TO_COUNT(200)); + + regval = MPDDRC_LPR_LPCB_DISABLED | /* Low-power Feature is inhibited */ + MPDDRC_LPR_TIMEOUT_0CLKS | /* Activates low-power mode after the end of transfer */ + MPDDRC_LPR_APDE_FAST; /* Active Power Down Exit Time */ + putreg32(regval, SAM_MPDDRC_LPR); + + /* Step 3: An NOP command is issued to the DDR2-SDRAM. Program the NOP + * command into the Mode Register, the application must set MODE to 1 in + * the Mode Register. + */ + + putreg32(MPDDRC_MR_MODE_NOP, SAM_MPDDRC_MR); + + /* Perform a write access to any DDR2-SDRAM address to acknowledge this + * command. + */ + + *ddr = 0; + + /* Now clocks which drive DDR2-SDRAM device are enabled. + * + * A minimum pause of 200 usec is provided to precede any signal toggle. + * (6 core cycles per iteration, core is at 396MHz: min 13200 loops) + */ + + sam_sdram_delay(USEC_TO_COUNT(200)); + + /* Step 4: An NOP command is issued to the DDR2-SDRAM */ + + putreg32(MPDDRC_MR_MODE_NOP, SAM_MPDDRC_MR); + + /* Perform a write access to any DDR2-SDRAM address to acknowledge this command.*/ + + *ddr = 0; + + /* Now CKE is driven high.*/ + /* Wait 400 ns min */ + + sam_sdram_delay(NSEC_TO_COUNT(400)); + + /* Step 5: An all banks precharge command is issued to the DDR2-SDRAM. */ + + putreg32(MPDDRC_MR_MODE_PRCGALL, SAM_MPDDRC_MR); + + /* Perform a write access to any DDR2-SDRAM address to acknowledge this command.*/ + + *ddr = 0; + + /* Wait 400 ns min */ + + sam_sdram_delay(NSEC_TO_COUNT(400)); + + /* Step 6: An Extended Mode Register set (EMRS2) cycle is issued to chose + * between commercialor high temperature operations. + * + * The write address must be chosen so that BA[1] is set to 1 and BA[0] is + * set to 0. + */ + + putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA1)) = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 7: An Extended Mode Register set (EMRS3) cycle is issued to set + * all registers to 0. + * + * The write address must be chosen so that BA[1] is set to 1 and BA[0] is + * set to 1. + */ + + putreg32(MPDDRC_MR_MODE_LMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA1 + DDR2_BA0)) = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 8: An Extended Mode Register set (EMRS1) cycle is issued to enable DLL. + * + * The write address must be chosen so that BA[1] is set to 0 and BA[0] is set to 1. + */ + + putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA0)) = 0; + + /* An additional 200 cycles of clock are required for locking DLL */ + + sam_sdram_delay(10000 /* CYCLES_TO_COUNT(200) */); + + /* Step 9: Program DLL field into the Configuration Register.*/ + + regval = getreg32(SAM_MPDDRC_CR); + regval |= MPDDRC_CR_DLL; + putreg32(regval, SAM_MPDDRC_CR); + + /* Step 10: A Mode Register set (MRS) cycle is issued to reset DLL. + * + * The write address must be chosen so that BA[1:0] bits are set to 0. + */ + + putreg32(MPDDRC_MR_MODE_LMR, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 11: An all banks precharge command is issued to the DDR2-SDRAM. + * + * Perform a write access to any DDR2-SDRAM address to acknowledge this + * command + */ + + putreg32(MPDDRC_MR_MODE_PRCGALL, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 12: Two auto-refresh (CBR) cycles are provided. Program the auto + * refresh command (CBR) into the Mode Register. + * + * Perform a write access to any DDR2-SDRAM address to acknowledge this + * command. + */ + + putreg32(MPDDRC_MR_MODE_RFSH, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Configure 2nd CBR. + * + * Perform a write access to any DDR2-SDRAM address to acknowledge this command. + */ + + putreg32(MPDDRC_MR_MODE_RFSH, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 13: Program DLL field into the Configuration Register to low + * (Disable DLL reset). + */ + + regval = getreg32(SAM_MPDDRC_CR); + regval &= ~MPDDRC_CR_DLL; + putreg32(regval, SAM_MPDDRC_CR); + + /* Step 14: A Mode Register set (MRS) cycle is issued to program the + * parameters of the DDR2-SDRAM devices. + * + * The write address must be chosen so that BA[1:0] are set to 0. + */ + + putreg32(MPDDRC_MR_MODE_LMR, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 15: Program OCD field into the Configuration Register to high (OCD + * calibration default). + */ + + regval = getreg32(SAM_MPDDRC_CR); + regval |= MPDDRC_CR_OCD_DEFAULT; + putreg32(regval, SAM_MPDDRC_CR); + + /* Step 16: An Extended Mode Register set (EMRS1) cycle is issued to OCD + * default value. + * + * The write address must be chosen so that BA[1] is set to 0 and BA[0] is + * set to 1. + */ + + putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA0)) = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 17: Program OCD field into the Configuration Register to low (OCD + * calibration mode exit). + */ + +#if 0 + regval = getreg32(SAM_MPDDRC_CR); + regval &= ~MPDDRC_CR_OCD_MASK; + putreg32(regval, SAM_MPDDRC_CR); +#endif + + /* Step 18: An Extended Mode Register set (EMRS1) cycle is issued to + * enable OCD exit. + * + * The write address must be chosen so that BA[1] is set to 0 and BA[0] is + * set to 1. + */ + + putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA0)) = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 19,20: A mode Normal command is provided. Program the Normal mode + * into Mode Register. + */ + + putreg32(MPDDRC_MR_MODE_NORMAL, SAM_MPDDRC_MR); + *ddr = 0; + + /* Step 21: Write the refresh rate into the count field in the Refresh + * Timer register. The DDR2-SDRAM device requires a refresh every 15.625 + * usec or 7.81 usec. + * + * With a 100MHz frequency, the refresh timer count register must to be + * set with (15.625 /100 MHz) = 1562 i.e. 0x061A or (7.81 /100MHz) = 781 + * i.e. 0x030d. + */ + + /* For MT47H64M16HR, The refresh period is 64ms (commercial), This equates + * to an average refresh rate of 7.8125usec (commercial), To ensure all + * rows of all banks are properly refreshed, 8192 REFRESH commands must be + * issued every 64ms (commercial) + */ + + /* ((64 x 10(^-3))/8192) x133 x (10^6) */ + /* Set Refresh timer 7.8125 us */ + + putreg32( MPDDRC_RTR_COUNT(300), SAM_MPDDRC_RTR); + + /* OK now we are ready to work on the DDRSDR */ + /* Wait for end of calibration */ + + sam_sdram_delay(500); +} + +#endif /* CONFIG_SAMA5_DDRCS && !CONFIG_SAMA5_BOOT_SDRAM */ diff --git a/configs/sama5d3x-ek/src/sam_spi.c b/configs/sama5d3x-ek/src/sam_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..9a0ba344a8598ae7b5c07ace9152bf6a15dfee3a --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_spi.c @@ -0,0 +1,216 @@ +/************************************************************************************ + * configs/sama5d3x-ek/src/sam_spi.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "sam_pio.h" +#include "sam_spi.h" +#include "sama5d3x-ek.h" + +#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select PIO pins for the SAMA5D3x-EK board. + * + ************************************************************************************/ + +void weak_function sam_spidev_initialize(void) +{ +#ifdef CONFIG_SAMA5_SPI0 +#ifdef CONFIG_MTD_AT25 + /* The AT25 serial FLASH connects using NPCS0 */ + + sam_configpio(PIO_AT25_NPCS0); +#endif +#endif + +#ifdef CONFIG_SAMA5_SPI1 +#endif +} + +/**************************************************************************** + * Name: sam_spi[0|1]select, sam_spi[0|1]status, and sam_spi[0|1]cmddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * include: + * + * o sam_spi[0|1]select is a functions tomanage the board-specific chip selects + * o sam_spi[0|1]status and sam_spi[0|1]cmddata: Implementations of the status + * and cmddata methods of the SPI interface defined by struct spi_ops_ + * (see include/nuttx/spi/spi.h). All other methods including + * sam_spibus_initialize()) are provided by common SAM3/4 logic. + * + * To use this common SPI logic on your board: + * + * 1. Provide logic in sam_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide sam_spi[0|1]select() and sam_spi[0|1]status() functions in your board- + * specific logic. These functions will perform chip selection and + * status operations using PIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * sam_spi[0|1]cmddata() functions in your board-specific logic. This + * function will perform cmd/data selection operations using PIOs in + * the way your board is configured. + * 3. Add a call to sam_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by sam_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spi[0|1]select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * PIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the PIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SAMA5_SPI0 +void sam_spi0select(enum spi_dev_e devid, bool selected) +{ +#ifdef CONFIG_MTD_AT25 + /* The AT25 serial FLASH connects using NPCS0 */ + + if (devid == SPIDEV_FLASH) + { + sam_piowrite(PIO_AT25_NPCS0, !selected); + } +#endif +} +#endif + +#ifdef CONFIG_SAMA5_SPI1 +void sam_spi1select(enum spi_dev_e devid, bool selected) +{ +} +#endif + +/**************************************************************************** + * Name: sam_spi[0|1]status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef CONFIG_SAMA5_SPI0 +uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_SAMA5_SPI0 +uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#endif /* CONFIG_SAMA5_SPI0 || CONFIG_SAMA5_SPI1 */ diff --git a/configs/sama5d3x-ek/src/sam_touchscreen.c b/configs/sama5d3x-ek/src/sam_touchscreen.c new file mode 100644 index 0000000000000000000000000000000000000000..4b69d561ac121ac1c207080acc0491d1054a9f23 --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_touchscreen.c @@ -0,0 +1,166 @@ +/************************************************************************************ + * configs/sama5d3x-ek/src/sam_touchscreen.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include "sam_adc.h" +#include "sam_tsd.h" +#include "sama5d3x-ek.h" + +#include + +#ifdef CONFIG_SAMA5_TSD + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_INPUT +# error "Touchscreen support requires CONFIG_INPUT" +#endif + +#ifndef CONFIG_SAMA5D3xEK_TSD_DEVMINOR +# define CONFIG_SAMA5D3xEK_TSD_DEVMINOR 0 +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this + * function. This function is called by application-specific, setup logic + * to configure the touchscreen device. This function will register the + * driver as /dev/inputN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ + struct sam_adc_s *adc; + static bool initialized = false; + int ret; + + idbg("initialized:%d minor:%d\n", initialized, minor); + DEBUGASSERT(minor == 0); + + /* Since there is no uninitialized logic, this initialization can be + * performed only one time. + */ + + if (!initialized) + { + /* Initialize the ADC driver */ + + adc = sam_adc_initialize(); + if (!adc) + { + idbg("ERROR: Failed to initialize the ADC driver\n"); + return -ENODEV; + } + + /* Initialize and register the SPI touchscreen device */ + + ret = sam_tsd_register(adc, CONFIG_SAMA5D3xEK_TSD_DEVMINOR); + if (ret < 0) + { + idbg("ERROR: Failed to register touchscreen device /dev/input%d: %d\n", + CONFIG_SAMA5D3xEK_TSD_DEVMINOR, ret); + return -ENODEV; + } + + initialized = true; + } + + return OK; +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* No support for un-initializing the touchscreen yet */ +} + +#endif /* CONFIG_INPUT_ADS7843E */ diff --git a/configs/sama5d3x-ek/src/sam_usb.c b/configs/sama5d3x-ek/src/sam_usb.c new file mode 100644 index 0000000000000000000000000000000000000000..b9883e8561cb560acf26ddeedbd16ab849db8364 --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_usb.c @@ -0,0 +1,545 @@ +/************************************************************************************ + * configs/sama5d3x-ek/src/sam_usb.c + * + * Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "up_arch.h" +#include "sam_pio.h" +#include "sam_usbhost.h" +#include "chip/sam_ohci.h" +#include "sama5d3x-ek.h" + +#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_SAMA5D3xEK_USBHOST_PRIO +# define CONFIG_SAMA5D3xEK_USBHOST_PRIO 50 +#endif + +#ifndef CONFIG_SAMA5D3xEK_USBHOST_STACKSIZE +# define CONFIG_SAMA5D3xEK_USBHOST_STACKSIZE 1024 +#endif + +#ifdef HAVE_USBDEV +# undef CONFIG_SAMA5_UHPHS_RHPORT1 +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* Retained device driver handles */ + +#ifdef CONFIG_SAMA5_OHCI +static struct usbhost_connection_s *g_ohciconn; +#endif +#ifdef CONFIG_SAMA5_EHCI +static struct usbhost_connection_s *g_ehciconn; +#endif + +/* Overcurrent interrupt handler */ + +#if defined(HAVE_USBHOST) && defined(CONFIG_SAMA5_PIOD_IRQ) +static xcpt_t g_ochandler; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: usbhost_waiter + * + * Description: + * Wait for USB devices to be connected to either the OHCI or EHCI hub. + * + ************************************************************************************/ + +#if HAVE_USBHOST +#ifdef CONFIG_DEBUG_USB +static int usbhost_waiter(struct usbhost_connection_s *dev, const char *hcistr) +#else +static int usbhost_waiter(struct usbhost_connection_s *dev) +#endif +{ + struct usbhost_hubport_s *hport; + + uvdbg("Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(dev, &hport)); + uvdbg("%s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(dev, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/************************************************************************************ + * Name: ohci_waiter + * + * Description: + * Wait for USB devices to be connected to the OHCI hub. + * + ************************************************************************************/ + +#ifdef CONFIG_SAMA5_OHCI +static int ohci_waiter(int argc, char *argv[]) +{ +#ifdef CONFIG_DEBUG_USB + return usbhost_waiter(g_ohciconn, "OHCI"); +#else + return usbhost_waiter(g_ohciconn); +#endif +} +#endif + +/************************************************************************************ + * Name: ehci_waiter + * + * Description: + * Wait for USB devices to be connected to the EHCI hub. + * + ************************************************************************************/ + +#ifdef CONFIG_SAMA5_EHCI +static int ehci_waiter(int argc, char *argv[]) +{ +#ifdef CONFIG_DEBUG_USB + return usbhost_waiter(g_ehciconn, "EHCI"); +#else + return usbhost_waiter(g_ehciconn); +#endif +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_usbinitialize + * + * Description: + * Called from sam_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the SAMA5D3x-EK board. + * + * USB Ports + * The SAMA5D3 series-MB features three USB communication ports: + * + * 1. Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed with + * USB Device High Speed Micro AB connector, J20 + * + * 2. Port B Host High Speed (EHCI) and Full Speed (OHCI) standard type A + * connector, J19 upper port + * + * 3. Port C Host Full Speed (OHCI) only standard type A connector, J19 + * lower port + * + * All three USB host ports are equipped with 500 mA high-side power switch + * for self-powered and buspowered applications. The USB device port feature + * VBUS inserts detection function. + * + * Port A + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PD29 VBUS_SENSE VBus detection + * PD25 EN5V_USBA VBus power enable (via MN15 AIC1526 Dual USB High-Side + * Power Switch. The other channel of the switch is for + * the LCD) + * + * Port B + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PD26 EN5V_USBB VBus power enable (via MN14 AIC1526 Dual USB High-Side + * Power Switch). To the A1 pin of J19 Dual USB A + * connector + * + * Port C + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PD27 EN5V_USBC VBus power enable (via MN14 AIC1526 Dual USB High-Side + * Power Switch). To the B1 pin of J19 Dual USB A + * connector + * + * Both Ports B and C + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PD28 OVCUR_USB Combined overrcurrent indication from port A and B + * + * That offers a lot of flexibility. However, here we enable the ports only + * as follows: + * + * Port A -- USB device + * Port B -- EHCI host + * Port C -- OHCI host + * + ************************************************************************************/ + +void weak_function sam_usbinitialize(void) +{ +#ifdef HAVE_USBDEV + /* Configure Port A to support the USB device function */ + + sam_configpio(PIO_USBA_VBUS_SENSE); /* VBUS sense */ + + /* TODO: Configure an interrupt on VBUS sense */ +#endif + +#ifdef HAVE_USBHOST +#ifdef CONFIG_SAMA5_UHPHS_RHPORT1 + /* Configure Port A to support the USB OHCI/EHCI function */ + + sam_configpio(PIO_USBA_VBUS_ENABLE); /* VBUS enable, initially OFF */ +#endif + +#ifdef CONFIG_SAMA5_UHPHS_RHPORT2 + /* Configure Port B to support the USB OHCI/EHCI function */ + + sam_configpio(PIO_USBB_VBUS_ENABLE); /* VBUS enable, initially OFF */ +#endif + +#ifdef CONFIG_SAMA5_UHPHS_RHPORT3 + /* Configure Port C to support the USB OHCI/EHCI function */ + + sam_configpio(PIO_USBC_VBUS_ENABLE); /* VBUS enable, initially OFF */ +#endif + +#if defined(CONFIG_SAMA5_UHPHS_RHPORT2) || defined(CONFIG_SAMA5_UHPHS_RHPORT3) + /* Configure Port B/C VBUS overrcurrent detection */ + + sam_configpio(PIO_USBBC_VBUS_OVERCURRENT); /* VBUS overcurrent */ +#endif +#endif /* HAVE_USBHOST */ +} + +/*********************************************************************************** + * Name: sam_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +#if HAVE_USBHOST +int sam_usbhost_initialize(void) +{ + pid_t pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about/ + */ + +#ifdef CONFIG_USBHOST_HUB + /* Initialize USB hub class support */ + + ret = usbhost_hub_initialize(); + if (ret < 0) + { + udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB host Mass Storage Class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_HIDKBD + /* Register the USB host HID keyboard class driver */ + + ret = usbhost_kbdinit(); + if (ret != OK) + { + udbg("ERROR: Failed to register the KBD class\n"); + } +#endif + + /* Then get an instance of the USB host interface. */ + +#ifdef CONFIG_SAMA5_OHCI + /* Get an instance of the USB OHCI interface */ + + g_ohciconn = sam_ohci_initialize(0); + if (!g_ohciconn) + { + udbg("ERROR: sam_ohci_initialize failed\n"); + return -ENODEV; + } + + /* Start a thread to handle device connection. */ + + pid = task_create("OHCI Monitor", CONFIG_SAMA5D3xEK_USBHOST_PRIO, + CONFIG_SAMA5D3xEK_USBHOST_STACKSIZE, + (main_t)ohci_waiter, (FAR char * const *)NULL); + if (pid < 0) + { + udbg("ERROR: Failed to create ohci_waiter task: %d\n", ret); + return -ENODEV; + } +#endif + +#ifdef CONFIG_SAMA5_EHCI + /* Get an instance of the USB EHCI interface */ + + g_ehciconn = sam_ehci_initialize(0); + if (!g_ehciconn) + { + udbg("ERROR: sam_ehci_initialize failed\n"); + return -ENODEV; + } + + /* Start a thread to handle device connection. */ + + pid = task_create("EHCI Monitor", CONFIG_SAMA5D3xEK_USBHOST_PRIO, + CONFIG_SAMA5D3xEK_USBHOST_STACKSIZE, + (main_t)ehci_waiter, (FAR char * const *)NULL); + if (pid < 0) + { + udbg("ERROR: Failed to create ehci_waiter task: %d\n", ret); + return -ENODEV; + } +#endif + + return OK; +} +#endif + +/*********************************************************************************** + * Name: sam_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be provided by + * each platform that implements the OHCI or EHCI host interface + * + * Input Parameters: + * rhport - Selects root hub port to be powered host interface. See SAM_RHPORT_* + * definitions above. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ***********************************************************************************/ + +#if HAVE_USBHOST +void sam_usbhost_vbusdrive(int rhport, bool enable) +{ + pio_pinset_t pinset = 0; + + uvdbg("RHPort%d: enable=%d\n", rhport+1, enable); + + /* Pick the PIO configuration associated with the selected root hub port */ + + switch (rhport) + { + case SAM_RHPORT1: +#ifndef CONFIG_SAMA5_UHPHS_RHPORT1 + udbg("ERROR: RHPort1 is not available in this configuration\n"); + return; +#else + pinset = PIO_USBA_VBUS_ENABLE; + break; +#endif + + case SAM_RHPORT2: +#ifndef CONFIG_SAMA5_UHPHS_RHPORT2 + udbg("ERROR: RHPort2 is not available in this configuration\n"); + return; +#else + pinset = PIO_USBB_VBUS_ENABLE; + break; +#endif + + case SAM_RHPORT3: +#ifndef CONFIG_SAMA5_UHPHS_RHPORT3 + udbg("ERROR: RHPort3 is not available in this configuration\n"); + return; +#else + pinset = PIO_USBC_VBUS_ENABLE; + break; +#endif + + default: + udbg("ERROR: RHPort%d is not supported\n", rhport+1); + return; + } + + /* Then enable or disable VBUS power */ + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ + + sam_piowrite(pinset, false); + } + else + { + /* Disable the Power Switch by driving the enable pin high */ + + sam_piowrite(pinset, true); + } +} +#endif + +/************************************************************************************ + * Name: sam_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent condition is + * detected on port B or C. + * + * REVISIT: Since this is a common signal, we will need to come up with some way + * to inform both EHCI and OHCI drivers when this error occurs. + * + * Input Parameter: + * handler - New overcurrent interrupt handler + * + * Returned value: + * Old overcurrent interrupt handler + * + ************************************************************************************/ + +#if HAVE_USBHOST +xcpt_t sam_setup_overcurrent(xcpt_t handler) +{ +#if defined(CONFIG_SAMA5_PIOD_IRQ) && (defined(CONFIG_SAMA5_UHPHS_RHPORT2) || \ + defined(CONFIG_SAMA5_UHPHS_RHPORT3)) + + xcpt_t oldhandler; + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old interrupt handler and save the new one */ + + oldhandler = g_ochandler; + g_ochandler = handler; + + /* Configure the interrupt */ + + sam_pioirq(PIO_USBBC_VBUS_OVERCURRENT); + (void)irq_attach(IRQ_USBBC_VBUS_OVERCURRENT, handler); + sam_pioirqenable(IRQ_USBBC_VBUS_OVERCURRENT); + + /* Return the old handler (so that it can be restored) */ + + leave_critical_section(flags); + return oldhandler; + +#else + return NULL; + +#endif +} +#endif /* CONFIG_SAMA5_PIOD_IRQ ... */ + +/************************************************************************************ + * Name: sam_usbsuspend + * + * Description: + * Board logic must provide the sam_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} +#endif + +#endif /* CONFIG_SAMA5_UHPHS || CONFIG_SAMA5_UDPHS */ diff --git a/configs/sama5d3x-ek/src/sam_usbmsc.c b/configs/sama5d3x-ek/src/sam_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..b31ce7b09840916bf5e3b41bf1f92b4c5f736d53 --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_usbmsc.c @@ -0,0 +1,108 @@ +/**************************************************************************** + * configs/sama5d3x-ek/src/sam_usbmsc.c + * + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the SAM3U MMC/SD SDIO block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sama5d3x-ek.h" + +#ifdef CONFIG_USBMSC + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef HAVE_AT25 +# error AT25 Serial FLASH not supported +#endif + +#ifndef CONFIG_SAMA5D3xEK_AT25_FTL +# error AT25 FTL support required (CONFIG_SAMA5D3xEK_AT25_FTL) +# undef HAVE_AT25 +#endif + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +#if CONFIG_SYSTEM_USBMSC_DEVMINOR1 != AT25_MINOR +# error Confusion in the assignment of minor device numbers +# undef HAVE_AT25 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* Initialize the AT25 MTD driver */ + +#ifdef HAVE_AT25 + int ret = sam_at25_automount(AT25_MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_at25_automount failed: %d\n", ret); + } + + return ret; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_USBMSC */ diff --git a/configs/sama5d3x-ek/src/sam_userleds.c b/configs/sama5d3x-ek/src/sam_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..19f6da340efa36891afcc4a76f3c0241cbcb255a --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_userleds.c @@ -0,0 +1,152 @@ +/**************************************************************************** + * configs/sama5d3x-ek/src/sam_userleds.c + * + * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are two LEDs on the SAMA5D3 series-CM board that can be controlled + * by software. A blue LED is controlled via PIO pins. A red LED normally + * provides an indication that power is supplied to the board but can also + * be controlled via software. + * + * PE25. This blue LED is pulled high and is illuminated by pulling PE25 + * low. + * + * PE24. The red LED is also pulled high but is driven by a transistor so + * that it is illuminated when power is applied even if PE24 is not + * configured as an output. If PE24 is configured as an output, then the + * LCD is illuminated by a low output. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_pio.h" +#include "sama5d3x-ek.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED PIOs for output */ + + sam_configpio(PIO_BLUE); +#ifndef CONFIG_SAMA5D3xEK_NOREDLED + sam_configpio(PIO_RED); +#endif +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint32_t ledcfg; + + if (led == BOARD_BLUE) + { + /* Low illuminates */ + + ledcfg = PIO_BLUE; + ledon = !ledon; + } +#ifndef CONFIG_SAMA5D3xEK_NOREDLED + else if (led == BOARD_RED) + { + /* High illuminates */ + + ledcfg = PIO_RED; + } +#endif + else + { + return; + } + + sam_piowrite(ledcfg, ledon); +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + bool ledon; + + /* Low illuminates */ + + ledon = ((ledset & BOARD_BLUE_BIT) == 0); + sam_piowrite(PIO_BLUE, ledon); + +#ifndef CONFIG_SAMA5D3xEK_NOREDLED + /* High illuminates */ + + ledon = ((ledset & BOARD_RED_BIT) != 0); + sam_piowrite(PIO_RED, ledon); +#endif +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/sama5d3x-ek/src/sam_wm8904.c b/configs/sama5d3x-ek/src/sam_wm8904.c new file mode 100644 index 0000000000000000000000000000000000000000..5639a5a4021ea4387163170f5850433043e85ffa --- /dev/null +++ b/configs/sama5d3x-ek/src/sam_wm8904.c @@ -0,0 +1,383 @@ +/************************************************************************************ + * configs/sama5d3x-ek/src/sam_wm8904.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "sam_pio.h" +#include "sam_twi.h" +#include "sam_ssc.h" +#include "sam_pck.h" + +#include "sama5d3x-ek.h" + +#ifdef HAVE_WM8904 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct sama5d3ek_mwinfo_s +{ + /* Standard MW8904 interface */ + + struct wm8904_lower_s lower; + + /* Extensions for the sama5d3x-ek board */ + + wm8904_handler_t handler; + FAR void *arg; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/PIO access callbacks. These operations all hidden behind + * callbacks to isolate the WM8904 driver from differences in PIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the WM8904 interrupt handler to the PIO interrupt + * enable - Enable or disable the PIO interrupt + */ + +static int wm8904_attach(FAR const struct wm8904_lower_s *lower, + wm8904_handler_t isr, FAR void *arg); +static bool wm8904_enable(FAR const struct wm8904_lower_s *lower, + bool enable); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the WM8904 + * driver. This structure provides information about the configuration + * of the WM8904 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. + */ + +static struct sama5d3ek_mwinfo_s g_wm8904info = +{ + .lower = + { + .address = WM8904_I2C_ADDRESS, + .frequency = CONFIG_SAMA5D3xEK_WM8904_I2CFREQUENCY, +#ifdef CONFIG_SAMA5D3xEK_WM8904_SRCSCK + .mclk = BOARD_SLOWCLK_FREQUENCY, +#else + .mclk = BOARD_MAINCK_FREQUENCY, +#endif + + .attach = wm8904_attach, + .enable = wm8904_enable, + }, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * IRQ/PIO access callbacks. These operations all hidden behind + * callbacks to isolate the WM8904 driver from differences in PIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the WM8904 interrupt handler to the PIO interrupt + * enable - Enable or disable the PIO interrupt + * clear - Acknowledge/clear any pending PIO interrupt + * + ****************************************************************************/ + +static int wm8904_attach(FAR const struct wm8904_lower_s *lower, + wm8904_handler_t isr, FAR void *arg) +{ + if (isr) + { + /* Just save the address of the handler and its argument for now. The + * new handler will called via wm8904_interrupt() when the interrupt occurs. + */ + + audvdbg("Attaching %p\n", isr); + g_wm8904info.handler = isr; + g_wm8904info.arg = arg; + } + else + { + audvdbg("Detaching %p\n", g_wm8904info.handler); + (void)wm8904_enable(lower, false); + g_wm8904info.handler = NULL; + g_wm8904info.arg = NULL; + } + + return OK; +} + +static bool wm8904_enable(FAR const struct wm8904_lower_s *lower, bool enable) +{ + static bool enabled; + irqstate_t flags; + bool ret; + + /* Has the interrupt state changed */ + + flags = enter_critical_section(); + if (enable != enabled) + { + /* Enable or disable interrupts */ + + if (enable && g_wm8904info.handler) + { + audvdbg("Enabling\n"); + sam_pioirqenable(IRQ_INT_WM8904); + enabled = true; + } + else + { + audvdbg("Disabling\n"); + sam_pioirqdisable(IRQ_INT_WM8904); + enabled = false; + } + } + + ret = enabled; + leave_critical_section(flags); + return ret; +} + +static int wm8904_interrupt(int irq, FAR void *context) +{ + /* Just forward the interrupt to the WM8904 driver */ + + audvdbg("handler %p\n", g_wm8904info.handler); + if (g_wm8904info.handler) + { + return g_wm8904info.handler(&g_wm8904info.lower, g_wm8904info.arg); + } + + /* We got an interrupt with no handler. This should not + * happen. + */ + + sam_pioirqdisable(IRQ_INT_WM8904); + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_wm8904_initialize + * + * Description: + * This function is called by platform-specific, setup logic to configure + * and register the WM8904 device. This function will register the driver + * as /dev/wm8904[x] where x is determined by the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int sam_wm8904_initialize(int minor) +{ + FAR struct audio_lowerhalf_s *wm8904; + FAR struct audio_lowerhalf_s *pcm; + FAR struct i2c_master_s *i2c; + FAR struct i2s_dev_s *i2s; + static bool initialized = false; + char devname[12]; + int ret; + + auddbg("minor %d\n", minor); + DEBUGASSERT(minor >= 0 && minor <= 25); + + /* Have we already initialized? Since we never uninitialize we must prevent + * multiple initializations. This is necessary, for example, when the + * touchscreen example is used as a built-in application in NSH and can be + * called numerous time. It will attempt to initialize each time. + */ + + if (!initialized) + { + /* Configure the WM8904 interrupt pin */ + + (void)sam_configpio(PIO_INT_WM8904); + + /* Get an instance of the I2C interface for the WM8904 chip select */ + + i2c = sam_i2cbus_initialize(WM8904_TWI_BUS); + if (!i2c) + { + auddbg("Failed to initialize TWI%d\n", WM8904_TWI_BUS); + ret = -ENODEV; + goto errout; + } + + /* Get an instance of the I2S interface for the WM8904 data channel */ + + i2s = sam_ssc_initialize(WM8904_SSC_BUS); + if (!i2s) + { + auddbg("Failed to initialize SSC%d\n", WM8904_SSC_BUS); + ret = -ENODEV; + goto errout_with_i2c; + } + + /* Configure the DAC master clock. This clock is provided by PCK0 (PD30) + * that is connected to the WM8904 MCLK. + */ + +#ifdef CONFIG_SAMA5D3xEK_WM8904_SRCSCK + /* Drive the DAC with the slow clock (32.768 KHz). The slow clock was + * enabled in sam_boot.c if needed. + */ + + (void)sam_pck_configure(PCK0, PCKSRC_SCK, BOARD_SLOWCLK_FREQUENCY); +#else + /* Drive the DAC with the main clock (12 MHz) */ + + (void)sam_pck_configure(PCK0, PCKSRC_MAINCK, BOARD_MAINCK_FREQUENCY); +#endif + + /* Enable the DAC master clock */ + + sam_pck_enable(PCK0, true); + + /* Configure WM8904 interrupts */ + + sam_pioirq(PIO_INT_WM8904); + ret = irq_attach(IRQ_INT_WM8904, wm8904_interrupt); + if (ret < 0) + { + auddbg("ERROR: Failed to attach WM8904 interrupt: %d\n", ret); + goto errout_with_i2s; + } + + /* Now we can use these I2C and I2S interfaces to initialize the + * MW8904 which will return an audio interface. + */ + + wm8904 = wm8904_initialize(i2c, i2s, &g_wm8904info.lower); + if (!wm8904) + { + auddbg("Failed to initialize the WM8904\n"); + ret = -ENODEV; + goto errout_with_irq; + } + + /* No we can embed the WM8904/I2C/I2S conglomerate into a PCM decoder + * instance so that we will have a PCM front end for the the WM8904 + * driver. + */ + + pcm = pcm_decode_initialize(wm8904); + if (!pcm) + { + auddbg("ERROR: Failed create the PCM decoder\n"); + ret = -ENODEV; + goto errout_with_wm8904; + } + + /* Create a device name */ + + snprintf(devname, 12, "pcm%d", minor); + + /* Finally, we can register the PCM/WM8904/I2C/I2S audio device. + * + * Is anyone young enough to remember Rube Goldberg? + */ + + ret = audio_register(devname, pcm); + if (ret < 0) + { + auddbg("ERROR: Failed to register /dev/%s device: %d\n", devname, ret); + goto errout_with_pcm; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; + + /* Error exits. Unfortunately there is no mechanism in place now to + * recover resources from most errors on initialization failures. + */ + +errout_with_pcm: +errout_with_wm8904: +errout_with_irq: + irq_detach(IRQ_INT_WM8904); +errout_with_i2s: +errout_with_i2c: +errout: + return ret; +} + +#endif /* HAVE_WM8904 */ diff --git a/configs/sama5d3x-ek/src/sama5d3x-ek.h b/configs/sama5d3x-ek/src/sama5d3x-ek.h new file mode 100644 index 0000000000000000000000000000000000000000..403412a71c9d28c8d62737758503e3a1d01106ff --- /dev/null +++ b/configs/sama5d3x-ek/src/sama5d3x-ek.h @@ -0,0 +1,858 @@ +/************************************************************************************ + * configs/sama5d3x-ek/src/sama5d3x-ek.h + * + * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D3X_EK_SRC_SAMA5D3X_EK_H +#define __CONFIGS_SAMA5D3X_EK_SRC_SAMA5D3X_EK_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +#include +#include + +#include "chip/sam_pinmap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ************************************************************/ + +#define HAVE_HSMCI 1 +#define HAVE_AT24 1 +#define HAVE_AT25 1 +#define HAVE_NAND 1 +#define HAVE_USBHOST 1 +#define HAVE_USBDEV 1 +#define HAVE_USBMONITOR 1 +#define HAVE_NETWORK 1 +#define HAVE_CAMERA 1 +#define HAVE_WM8904 1 + +/* HSMCI */ +/* Can't support MMC/SD if the card interface(s) are not enable */ + +#if !defined(CONFIG_SAMA5_HSMCI0) && !defined(CONFIG_SAMA5_HSMCI1) +# undef HAVE_HSMCI +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(HAVE_HSMCI) && defined(CONFIG_DISABLE_MOUNTPOINT) +# warning Mountpoints disabled. No MMC/SD support +# undef HAVE_HSMCI +#endif + +/* We need PIO interrupts on PIOD to support card detect interrupts */ + +#if defined(HAVE_HSMCI) && !defined(CONFIG_SAMA5_PIOD_IRQ) +# warning PIOD interrupts not enabled. No MMC/SD support. +# undef HAVE_HSMCI +#endif + +/* NAND FLASH */ +/* Can't support the NAND device if NAND flash is not configured on EBI CS3 */ + +#ifndef CONFIG_SAMA5_EBICS3_NAND +# undef HAVE_NAND +#endif + +/* Can't support NAND features if mountpoints are disabled or if we were not + * asked to mount the NAND part + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_SAMA5D3XEK_NAND_BLOCKMOUNT) +# undef HAVE_NAND +#endif + +/* Can't support NAND if the MTD feature is not enabled */ + +#if !defined(CONFIG_MTD) || !defined(CONFIG_MTD_NAND) +# undef HAVE_NAND +#endif + +/* If we are going to mount the NAND, then they user must also have told + * us what to do with it by setting one of CONFIG_SAMA5D3xEK_NAND_FTL or + * CONFIG_SAMA5D3xEK_NAND_NXFFS. + */ + +#ifndef CONFIG_MTD +# undef CONFIG_SAMA5D3xEK_NAND_NXFFS +# undef CONFIG_SAMA5D3xEK_NAND_FTL +#endif + +#if !defined(CONFIG_FS_NXFFS) || !defined(CONFIG_NXFFS_NAND) +# undef CONFIG_SAMA5D3xEK_NAND_NXFFS +#endif + +#if !defined(CONFIG_SAMA5D3xEK_NAND_FTL) && !defined(CONFIG_SAMA5D3xEK_NAND_NXFFS) +# undef HAVE_NAND +#endif + +#if defined(CONFIG_SAMA5D3xEK_NAND_FTL) && defined(CONFIG_SAMA5D3xEK_NAND_NXFFS) +# warning Both CONFIG_SAMA5D3xEK_NAND_FTL and CONFIG_SAMA5D3xEK_NAND_NXFFS are set +# warning Ignoring CONFIG_SAMA5D3xEK_NAND_NXFFS +# undef CONFIG_SAMA5D3xEK_NAND_NXFFS +#endif + +/* AT25 Serial FLASH */ +/* Can't support the AT25 device if it SPI0 or AT25 support are not enabled */ + +#if !defined(CONFIG_SAMA5_SPI0) || !defined(CONFIG_MTD_AT25) +# undef HAVE_AT25 +#endif + +/* Can't support AT25 features if mountpoints are disabled or if we were not + * asked to mount the AT25 part + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_SAMA5D3xEK_AT25_BLOCKMOUNT) +# undef HAVE_AT25 +#endif + +/* If we are going to mount the AT25, then they user must also have told + * us what to do with it by setting one of these. + */ + +#ifndef CONFIG_FS_NXFFS +# undef CONFIG_SAMA5D3xEK_AT25_NXFFS +#endif + +#if !defined(CONFIG_SAMA5D3xEK_AT25_FTL) && !defined(CONFIG_SAMA5D3xEK_AT25_NXFFS) +# undef HAVE_AT25 +#endif + +#if defined(CONFIG_SAMA5D3xEK_AT25_FTL) && defined(CONFIG_SAMA5D3xEK_AT25_NXFFS) +# warning Both CONFIG_SAMA5D3xEK_AT25_FTL and CONFIG_SAMA5D3xEK_AT25_NXFFS are set +# warning Ignoring CONFIG_SAMA5D3xEK_AT25_NXFFS +# undef CONFIG_SAMA5D3xEK_AT25_NXFFS +#endif + +/* AT24 Serial EEPROM + * + * A AT24C512 Serial EEPPROM was used for tested I2C. There are other I2C/TWI + * devices on-board, but the serial EEPROM is the simplest test. + * + * There is, however, no AT24 EEPROM on board the SAMA5D3x-EK: The Serial + * EEPROM was mounted on an external adaptor board and connected to the + * SAMA5D3x-EK thusly: + * + * - VCC -- VCC + * - GND -- GND + * - TWCK0(PA31) -- SCL + * - TWD0(PA30) -- SDA + * + * By default, PA30 and PA31 are SWJ-DP pins, it can be used as a pin for TWI + * peripheral in the end application. + */ + +#define AT24_BUS 0 + +#if !defined(CONFIG_MTD_AT24XX) || !defined(CONFIG_SAMA5_TWI0) +# undef HAVE_AT24 +#endif + +/* Can't support AT25 features if mountpoints are disabled or if we were not + * asked to mount the AT25 part + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_SAMA5D3xEK_AT24_BLOCKMOUNT) +# undef HAVE_AT24 +#endif + +/* If we are going to mount the AT25, then they user must also have told + * us what to do with it by setting one of these. + */ + +#ifndef CONFIG_FS_NXFFS +# undef CONFIG_SAMA5D3xEK_AT24_NXFFS +#endif + +#if !defined(CONFIG_SAMA5D3xEK_AT24_FTL) && !defined(CONFIG_SAMA5D3xEK_AT24_NXFFS) +# undef HAVE_AT24 +#endif + +#if defined(CONFIG_SAMA5D3xEK_AT24_FTL) && defined(CONFIG_SAMA5D3xEK_AT24_NXFFS) +# warning Both CONFIG_SAMA5D3xEK_AT24_FTL and CONFIG_SAMA5D3xEK_AT24_NXFFS are set +# warning Ignoring CONFIG_SAMA5D3xEK_AT24_NXFFS +# undef CONFIG_SAMA5D3xEK_AT24_NXFFS +#endif + +/* Assign minor device numbers. For example, if we also use MINOR number 0 + * for the AT25, it should appear as /dev/mtdblock0 + */ + +#define _NAND_MINOR 0 + +#ifdef HAVE_NAND +# define NAND_MINOR _NAND_MINOR +# define _AT25_MINOR (_NAND_MINOR+1) +#else +# define _AT25_MINOR _NAND_MINOR +#endif + +#ifdef HAVE_AT25 +# define AT25_MINOR _AT25_MINOR +# define _AT24_MINOR (_AT25_MINOR+1) +#else +# define _AT24_MINOR _AT25_MINOR +#endif + +#ifdef HAVE_AT24 +# define AT24_MINOR _AT24_MINOR +#endif + +/* MMC/SD minor numbers: The NSH device minor extended is extended to support + * two devices. If CONFIG_NSH_MMCSDMINOR is zero, these will be: /dev/mmcsd0 + * and /dev/mmcsd1. + */ + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +#ifdef HAVE_HSMCI + +# define HSMCI0_SLOTNO 0 +# define HSMCI1_SLOTNO 1 + +# ifdef CONFIG_SAMA5_HSMCI0 +# define HSMCI0_MINOR CONFIG_NSH_MMCSDMINOR +# define HSMCI1_MINOR (CONFIG_NSH_MMCSDMINOR+1) +# else +# define HSMCI1_MINOR CONFIG_NSH_MMCSDMINOR +# endif +#else +#endif + +/* USB Host / USB Device */ +/* Either CONFIG_SAMA5_UHPHS or CONFIG_SAMA5_UDPHS must be defined, or there is + * no USB of any kind. + */ + +#if !defined(CONFIG_SAMA5_UHPHS) +# undef CONFIG_SAMA5_OHCI +# undef CONFIG_SAMA5_EHCI +#endif + +#if !defined(CONFIG_SAMA5_UDPHS) +# undef HAVE_USBDEV +#endif + +/* CONFIG_USBDEV and CONFIG_USBHOST must also be defined */ + +#if !defined(CONFIG_USBDEV) +# undef HAVE_USBDEV +#endif + +#if defined(CONFIG_USBHOST) +# if !defined(CONFIG_SAMA5_OHCI) && !defined(CONFIG_SAMA5_EHCI) +# warning CONFIG_USBHOST is defined, but neither CONFIG_SAMA5_OHCI nor CONFIG_SAMA5_EHCI are defined +# endif +#else +# undef CONFIG_SAMA5_OHCI +# undef CONFIG_SAMA5_EHCI +#endif + +#if !defined(CONFIG_SAMA5_OHCI) && !defined(CONFIG_SAMA5_EHCI) +# undef HAVE_USBHOST +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#ifndef CONFIG_SYSTEM_USBMONITOR +# undef HAVE_USBMONITOR +#endif + +#ifndef HAVE_USBDEV +# undef CONFIG_USBDEV_TRACE +#endif + +#ifndef HAVE_USBHOST +# undef CONFIG_USBHOST_TRACE +#endif + +#if !defined(CONFIG_USBDEV_TRACE) && !defined(CONFIG_USBHOST_TRACE) +# undef HAVE_USBMONITOR +#endif + +/* Networking */ + +#if !defined(CONFIG_NET) || (!defined(CONFIG_SAMA5_EMACA) && !defined(CONFIG_SAMA5_GMAC)) +# undef HAVE_NETWORK +#endif + +/* Audio */ +/* PCM/WM8904 driver */ + +#ifndef CONFIG_AUDIO_WM8904 +# undef HAVE_WM8904 +#endif + +#ifdef HAVE_WM8904 +# ifndef CONFIG_SAMA5_TWI0 +# warning CONFIG_SAMA5_TWI0 is required for audio support +# undef HAVE_WM8904 +# endif + +# ifndef CONFIG_SAMA5_SSC0 +# warning CONFIG_SAMA5_SSC0 is required for audio support +# undef HAVE_WM8904 +# endif + +# if !defined(CONFIG_SAMA5_PIOD_IRQ) +# warning CONFIG_SAMA5_PIOD_IRQ is required for audio support +# undef HAVE_HSMCI +# endif + +# ifndef CONFIG_AUDIO_FORMAT_PCM +# warning CONFIG_AUDIO_FORMAT_PCM is required for audio support +# undef HAVE_WM8904 +# endif + +# ifndef CONFIG_SAMA5D3xEK_WM8904_I2CFREQUENCY +# warning Defaulting to maximum WM8904 I2C frequency +# define CONFIG_SAMA5D3xEK_WM8904_I2CFREQUENCY 400000 +# endif + +# if CONFIG_SAMA5D3xEK_WM8904_I2CFREQUENCY > 400000 +# warning WM8904 I2C frequency cannot exceed 400KHz +# undef CONFIG_SAMA5D3xEK_WM8904_I2CFREQUENCY +# define CONFIG_SAMA5D3xEK_WM8904_I2CFREQUENCY 400000 +# endif +#endif + +/* Camera */ + +#define OV2640_BUS 1 + +#ifndef CONFIG_SAMA5D3xEK_OV2640_DEMO +# undef HAVE_CAMERA +#endif + +#if defined(HAVE_CAMERA) && !defined(CONFIG_SAMA5_ISI) +# warning OV2640 camera demo requires CONFIG_SAMA5_ISI +# undef HAVE_CAMERA +#endif + +#if defined(HAVE_CAMERA) && !defined(CONFIG_SAMA5_TWI1) +# warning OV2640 camera demo requires CONFIG_SAMA5_TWI1 +# undef HAVE_CAMERA +#endif + +/* procfs File System */ + +#ifdef CONFIG_FS_PROCFS +# ifdef CONFIG_NSH_PROC_MOUNTPOINT +# define SAMA5_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT +# else +# define SAMA5_PROCFS_MOUNTPOINT "/proc" +# endif +#endif + +/* LEDs *****************************************************************************/ +/* There are two LEDs on the SAMA5D3 series-CM board that can be controlled + * by software. A blue LED is controlled via PIO pins. A red LED normally + * provides an indication that power is supplied to the board but can also + * be controlled via software. + * + * PE25. This blue LED is pulled high and is illuminated by pulling PE25 + * low. + * + * PE24. The red LED is also pulled high but is driven by a transistor so + * that it is illuminated when power is applied even if PE24 is not + * configured as an output. If PE24 is configured as an output, then the + * LCD is illuminated by a high output. + * + * N.B. PE24 Drives the RED Led on the CM (SODIMM200), but unfortunately + * it is also connected to ISI_RST on the MB (Main Board) and controlling + * it will reset a Camera connected to the ISI + */ + +#define PIO_BLUE (PIO_OUTPUT | PIO_CFG_PULLUP | PIO_OUTPUT_SET | \ + PIO_PORT_PIOE | PIO_PIN25) + +#ifndef CONFIG_SAMA5D3xEK_NOREDLED +# define PIO_RED (PIO_OUTPUT | PIO_CFG_PULLUP | PIO_OUTPUT_CLEAR | \ + PIO_PORT_PIOE | PIO_PIN24) +#endif + +/* Buttons **************************************************************************/ +/* There are five push button switches on the SAMA5D3X-EK base board: + * + * 1. One Reset, board reset (BP1) + * 2. One Wake up, push button to bring the processor out of low power mode + * (BP2) + * 3. One User momentary Push Button + * 4. One Disable CS Push Button + * + * Only the momentary push button is controllable by software (labeled + * "PB_USER1" on the board): + * + * - PE27. Pressing the switch connects PE27 to ground. Therefore, PE27 + * must be pulled high internally. When the button is pressed the SAMA5 + * will sense "0" is on PE27. + */ + +#define PIO_USER1 (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOE | PIO_PIN27) +#define IRQ_USER1 SAM_IRQ_PE27 + +/* HSMCI Card Slots *****************************************************************/ +/* The SAMA5D3x-EK provides a two SD memory card slots: (1) a full size SD card + * slot (J7 labeled MCI0), and (2) a microSD memory card slot (J6 labeled MCI1). + * + * The full size SD card slot connects via HSMCI0. The card detect discrete + * is available on PB17 (pulled high). The write protect descrete is tied to + * ground (via PP6) and not available to software. The slot supports 8-bit + * wide transfer mode, but the NuttX driver currently uses only the 4-bit + * wide transfer mode + * + * PD17 MCI0_CD + * PD1 MCI0_DA0 + * PD2 MCI0_DA1 + * PD3 MCI0_DA2 + * PD4 MCI0_DA3 + * PD5 MCI0_DA4 + * PD6 MCI0_DA5 + * PD7 MCI0_DA6 + * PD8 MCI0_DA7 + * PD9 MCI0_CK + * PD0 MCI0_CDA + */ + +#define PIO_MCI0_CD (PIO_INPUT | PIO_CFG_DEFAULT | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOD | PIO_PIN17) +#define IRQ_MCI0_CD SAM_IRQ_PD17 + +/* The microSD connects vi HSMCI1. The card detect discrete is available on + * PB18 (pulled high): + * + * PD18 MCI1_CD + * PB20 MCI1_DA0 + * PB21 MCI1_DA1 + * PB22 MCI1_DA2 + * PB23 MCI1_DA3 + * PB24 MCI1_CK + * PB19 MCI1_CDA + */ + +#define PIO_MCI1_CD (PIO_INPUT | PIO_CFG_DEFAULT | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOD | PIO_PIN18) +#define IRQ_MCI1_CD SAM_IRQ_PD18 + +/* USB Ports ************************************************************************/ +/* The SAMA5D3 series-MB features three USB communication ports: + * + * 1. Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed with + * USB Device High Speed Micro AB connector, J20 + * + * 2. Port B Host High Speed (EHCI) and Full Speed (OHCI) standard type A + * connector, J19 upper port + * + * 3. Port C Host Full Speed (OHCI) only standard type A connector, J19 + * lower port + * + * All three USB host ports are equipped with 500 mA high-side power switch + * for self-powered and buspowered applications. The USB device port feature + * VBUS inserts detection function. + * + * Port A + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PD29 VBUS_SENSE VBus detection + * PD25 EN5V_USBA VBus power enable (via MN15 AIC1526 Dual USB High-Side + * Power Switch. The other channel of the switch is for + * the LCD) + */ + +#define PIO_USBA_VBUS_SENSE \ + (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOD | PIO_PIN29) +#define IRQ_USBA_VBUS_SENSE \ + SAM_IRQ_PD29 + +#define PIO_USBA_VBUS_ENABLE \ + (PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_CLEAR | \ + PIO_PORT_PIOD | PIO_PIN25) + +/* Port B + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PD26 EN5V_USBB VBus power enable (via MN14 AIC1526 Dual USB High-Side + * Power Switch). To the A1 pin of J19 Dual USB A + * connector + */ + +#define PIO_USBB_VBUS_ENABLE \ + (PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_CLEAR | \ + PIO_PORT_PIOD | PIO_PIN26) + +/* Port C + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PD27 EN5V_USBC VBus power enable (via MN14 AIC1526 Dual USB High-Side + * Power Switch). To the B1 pin of J19 Dual USB A + * connector + */ + +#define PIO_USBC_VBUS_ENABLE \ + (PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_CLEAR | \ + PIO_PORT_PIOD | PIO_PIN27) + +/* Both Ports B and C + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PD28 OVCUR_USB Combined overrcurrent indication from port A and B + */ + +#define PIO_USBBC_VBUS_OVERCURRENT \ + (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOD | PIO_PIN28) +#define IRQ_USBBC_VBUS_OVERCURRENT \ + SAM_IRQ_PD28 + +/* Ethernet */ + +#ifdef CONFIG_SAMA5_EMACA + /* ETH1: Ethernet 10/100 (EMAC A) Port + * + * The main board contains a MICREL PHY device (KSZ8051) operating at 10/100 Mbps. + * The board supports MII and RMII interface modes. + * + * The two independent PHY devices embedded on CM and MB boards are connected to + * independent RJ-45 connectors with built-in magnetic and status LEDs. + * + * At the De-Assertion of Reset: + * PHY ADD[2:0]:001 + * CONFIG[2:0]:001,Mode:RMII + * Duplex Mode:Half Duplex + * Isolate Mode:Disable + * Speed Mode:100Mbps + * Nway Auto-Negotiation:Enable + * + * The KSZ8051 PHY interrupt is available on PE30 INT_ETH1. The sense of + * the interrupt is configurable but is, by default, active low. + */ + +#define PIO_INT_ETH1 (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_FALLING | PIO_PORT_PIOE | PIO_PIN30) +#define IRQ_INT_ETH1 SAM_IRQ_PE30 + +#endif + +#ifdef CONFIG_SAMA5_GMAC + /* ETH0: Tri-Speed Ethernet PHY + * + * The SAMA5D3 series-CM board is equipped with a MICREL PHY devices (MICREL + * KSZ9021/31) operating at 10/100/1000 Mbps. The board supports RGMII interface + * mode. The Ethernet interface consists of 4 pairs of low voltage differential + * pair signals designated from GRX± and GTx± plus control signals for link + * activity indicators. These signals can be used to connect to a 10/100/1000 + * BaseT RJ45 connector integrated on the main board. + * + * The KSZ9021/31 interrupt is available on PB35 INT_GETH0. The sense of + * the interrupt is configurable but is, by default, active low. + */ + +#define PIO_INT_ETH0 (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_FALLING | PIO_PORT_PIOB | PIO_PIN25) +#define IRQ_INT_ETH0 SAM_IRQ_PB25 + +#endif + +/* WM8904 Audio Codec ***************************************************************/ +/* SAMA5D3-EK Interface + * ------------- ---------------- ----------------- + * WM8904 SAMA5D3 NuttX Pin Name + * ------------- ---------------- ----------------- + * 3 SDA PA30 TWD0 PIO_TWI0_D + * 2 SCLK PA31 TWCK0 PIO_TWI0_CK + * 28 MCLK PD30 PCK0 PIO_PMC_PCK0 + * 29 BCLK/GPIO4 PC16 TK PIO_SSC0_TK + * "" " " PC19 RK PIO_SSC0_RK + * 30 LRCLK PC17 TF PIO_SSC0_TF + * "" " " PC20 RF PIO_SSC0_RF + * 31 ADCDAT PC21 RD PIO_SSC0_RD + * 32 DACDAT PC18 TD PIO_SSC0_TD + * 1 IRQ/GPIO1 PD16 INT_AUDIO N/A + * ------------- ---------------- ----------------- + */ + +/* Audio Interrupt. All interrupts are default, active high level. Pull down + * internally in the WM8904. So we want no pull-up/downs and we want to + * interrupt on the high level. + */ + +#define PIO_INT_WM8904 (PIO_INPUT | PIO_CFG_DEFAULT | PIO_CFG_DEGLITCH | \ + PIO_INT_HIGHLEVEL | PIO_PORT_PIOD | PIO_PIN16) +#define IRQ_INT_WM8904 SAM_IRQ_PD16 + +/* The MW8904 communicates on TWI0, I2C address 0x1a for control operations */ + +#define WM8904_TWI_BUS 0 +#define WM8904_I2C_ADDRESS 0x1a + +/* The MW8904 transfers data on SSC0 */ + +#define WM8904_SSC_BUS 0 + +/* SPI Chip Selects *****************************************************************/ +/* Both the Ronetix and Embest versions of the SAMAD3x CPU modules include an + * Atmel AT25DF321A, 32-megabit, 2.7-volt SPI serial flash. The SPI + * connection is as follows: + * + * AT25DF321A SAMA5 + * --------------- ----------------------------------------------- + * SI PD11 SPI0_MOSI + * SO PD10 SPI0_MIS0 + * SCK PD12 SPI0_SPCK + * /CS PD13 via NL17SZ126 if JP1 is closed (See below) + * + * JP1 and JP2 seem to related to /CS on the Ronetix board, but the usage is + * less clear. For the Embest module, JP1 must be closed to connect /CS to + * PD13; on the Ronetix schematic, JP11 seems only to bypass a resistor (may + * not be populated?). I think closing JP1 is correct in either case. + */ + +#define PIO_AT25_NPCS0 (PIO_OUTPUT | PIO_CFG_PULLUP | PIO_OUTPUT_SET | \ + PIO_PORT_PIOD | PIO_PIN13) +#define AT25_PORT SPI0_CS0 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select PIO pins for the SAMA5D3x-EK board. + * + ************************************************************************************/ + +#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1) +void weak_function sam_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: sam_sdram_config + * + * Description: + * Configures DDR2 (MT47H128M16RT 128MB or, optionally, MT47H64M16HR) + * + * Per the SAMA5D3x-EK User guide: "Two SDRAM/DDR2 used as main system memory. + * MT47H128M16 - 2 Gb - 16 Meg x 16 x 8 banks, the board provides up to 2 Gb on- + * board, soldered DDR2 SDRAM. The memory bus is 32 bits wide and operates with + * up to 166 MHz." + * + * From the Atmel Code Example: + * MT47H64M16HR : 8 Meg x 16 x 8 banks + * Refresh count: 8K + * Row address: A[12:0] (8K) + * Column address A[9:0] (1K) + * Bank address BA[2:0] a(24,25) (8) + * + * This logic was taken from Atmel sample code for the SAMA5D3x-EK. + * + * Input Parameters: + * None + * + * Assumptions: + * The DDR memory regions is configured as strongly ordered memory. When we + * complete initialization of SDRAM and it is ready for use, we will make DRAM + * into normal memory. + * + ************************************************************************************/ + +#if defined(CONFIG_SAMA5_DDRCS) && !defined(CONFIG_SAMA5_BOOT_SDRAM) +void sam_sdram_config(void); +#else +# define sam_sdram_config() +#endif + +/**************************************************************************** + * Name: sam_nand_automount + * + * Description: + * Initialize and configure the NAND on CS3 + * + ****************************************************************************/ + +#ifdef HAVE_NAND +int sam_nand_automount(int minor); +#endif + +/**************************************************************************** + * Name: sam_at25_automount + * + * Description: + * Initialize and configure the AT25 serial FLASH + * + ****************************************************************************/ + +#ifdef HAVE_AT25 +int sam_at25_automount(int minor); +#endif + +/**************************************************************************** + * Name: sam_at24_automount + * + * Description: + * Initialize and configure the AT24 serial EEPROM + * + ****************************************************************************/ + +#ifdef HAVE_AT24 +int sam_at24_automount(int minor); +#endif + +/**************************************************************************** + * Name: sam_hsmci_initialize + * + * Description: + * Initialize and configure one HSMCI slot + * + ****************************************************************************/ + +#ifdef HAVE_HSMCI +int sam_hsmci_initialize(int slotno, int minor); +#endif + +/************************************************************************************ + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_cardinserted(int slotno); +#endif + +/************************************************************************************ + * Name: sam_writeprotected + * + * Description: + * Check if the card in the MMCSD slot is write protected + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_writeprotected(int slotno); +#endif + +/************************************************************************************ + * Name: sam_usbinitialize + * + * Description: + * Called from sam_usbinitialize very early in inialization to setup USB-related + * PIO pins for the SAMA5D3x-EK board. + * + ************************************************************************************/ + +#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS) +void weak_function sam_usbinitialize(void); +#endif + +/**************************************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. This function will + * start a thread that will monitor for device connection/disconnection events. + * + ****************************************************************************************************/ + +#ifdef HAVE_USBHOST +int sam_usbhost_initialize(void); +#endif + +/************************************************************************************ + * Name: sam_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +#ifdef HAVE_NETWORK +void weak_function sam_netinitialize(void); +#endif + +/**************************************************************************** + * Name: sam_wm8904_initialize + * + * Description: + * This function is called by platform-specific, setup logic to configure + * and register the WM8904 device. This function will register the driver + * as /dev/wm8904[x] where x is determined by the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef HAVE_WM8904 +int sam_wm8904_initialize(int minor); +#endif /* HAVE_WM8904 */ + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D3X_EK_SRC_SAMA5D3X_EK_H */ + diff --git a/configs/sama5d4-ek/Kconfig b/configs/sama5d4-ek/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..d204951b04a2cba706ad84a9ee367441e7085f8c --- /dev/null +++ b/configs/sama5d4-ek/Kconfig @@ -0,0 +1,389 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAMA5D4_EK + +choice + prompt "SAMA5D4-EK Board Version" + default SAMA5D4_MB_REVC + +config SAMA5D4_MB_REVC + bool "SAMA5D44-MB Rev. C" + +config SAMA5D4_MB_REVE + bool "SAMA5D44-MB Rev. E" + +endchoice # SAMA5D4-EK Board Version + +choice + prompt "CPU Frequency" + default SAMA5D4EK_396MHZ + +config SAMA5D4EK_384MHZ + bool "384 MHz" + +config SAMA5D4EK_396MHZ + bool "396 MHz" + +config SAMA5D4EK_528MHZ + bool "528 MHz" + +endchoice # CPU Frequency + +choice + prompt "SAMA4D4-EK DRAM Type" + default SAMA5D4EK_MT47H128M16RT + depends on SAMA5_DDRCS + +config SAMA5D4EK_MT47H128M16RT + bool "MT47H128M16RT" + ---help--- + Micron 2Gbit x16 DDR2-1066 128Mb + +config SAMA5D4EK_MT47H64M16HR + bool "MT47H64M16HR" + ---help--- + Micron 1Gbit x16 DDR2-800 64Mb + +endchoice # SAMA4D4-EK DRAM Type + +config SAMA5D4EK_DRAM_MAIN + bool "Build dram_main" + default n + depends on SAMA5_BOOT_ISRAM + ---help--- + dram_main is a tiny program that runs in ISRAM. dram_main will + enable SDRAM and load an Intel HEX program into SDRAM over the + serial console. Then it will either (1) jump to the program in + DRAM at address 0x2000:0000 (2) wait for you to break in with GDB to + debug the SDRAM program. These different behaviors are controlled + by SAMA5D4EK_DRAM_START. + + NOTE: If you use this boot loader, then your program must be built at + origin 0x2000:0000, not at 0x2000:8000 as is customary with U-Boot. + +config SAMA5D4EK_DRAM_START + bool "Start DRAM program" + default n + depends on SAMA5D4EK_DRAM_MAIN + ---help--- + The default behavior of the DRAM boot program is to initialize the + DRAM, then patiently wait for you to break into the program with GDB. + An alternative behavior is enabled with this option: If + SAMA5D4EK_DRAM_START is defined, then it will not wait but will, + instead, immediately start the program in DRAM. + +config SAMA5D4EK_AT25_MAIN + bool "Build at25_main" + default n + depends on SAMA5_BOOT_ISRAM + ---help--- + at25_main is a tiny program that runs in ISRAM. at25_main will + enable SDRAM and configure the AT25 Serial FLASH. It will prompt + and then load an Intel HEX program into SDRAM over the serial + console. If the program is successfully loaded in SDRAM, at25_main + will copy the program at the beginning of the AT26 Serial FLASH. + If the jumpering is set correctly, the SAMA5D4 RomBOOT loader will + then boot the program from the serial FLASH the next time that it + reset. + +config SAMA5D4EK_AT25_PROGSIZE + int "AT25 partition size" + default 131072 + depends on SAMA5D4EK_AT25_MAIN + ---help--- + This is the size of the partition at the beginning to the AT25 + serial FLASH that will be used to hold the boot program. Since + this program must run from SRAM, there would be no purpose int + making this size any larger than the size of the internal SRAM. + +config SAMA5D4EK_DRAM_BOOT + bool "Using DRAM boot loader" + default y + depends on SAMA5_BOOT_SDRAM && !SAMA5D4EK_DRAM_MAIN && !SAMA5D4EK_AT25_MAIN + ---help--- + Select this option if you are going to boot using the sdram_main + bootloader (created with SAMA5D4EK_DRAM_MAIN=y). This selection + will simply origin your program at 0x2000:0000 as required by the + sdram_main bootloader (vs. 0x2000:8000 as required by U-Boot). + +config SAMA5D4EK_NAND_BLOCKMOUNT + bool "NAND FLASH auto-mount" + default n + depends on NSH_ARCHINIT && SAMA5_EBICS3_NAND + ---help--- + Automatically initialize the NAND FLASH driver when NSH starts. + +choice + prompt "NAND FLASH configuration" + default SAMA5D4EK_NAND_NXFFS + depends on SAMA5D4EK_NAND_BLOCKMOUNT + +config SAMA5D4EK_NAND_FTL + bool "Create NAND FLASH block driver" + depends on MTD && MTD_NAND + ---help--- + Create the MTD driver for the NAND and "wrap" the NAND as a standard + block driver that could then, for example, be mounted using FAT or + any other file system. Any file system may be used, but there will + be no wear-leveling. + + NOTE: This options is not currently recommended. There is not now + NuttX file system that can handle the NAND back blocks or performs + wear-leveling other than NXFFS and NXFFS does not use a block driver + but, rather, operates directly upon the NAND MTD device. + +config SAMA5D4EK_NAND_NXFFS + bool "Create NAND FLASH NXFFS file system" + depends on MTD && MTD_NAND && FS_NXFFS && NXFFS_NAND + ---help--- + Create the MTD driver for the NAND and mount the NAND device as + a wear-leveling, NuttX FLASH file system (NXFFS). The downside of + NXFFS is that it can be very slow. + + NOTE: NXFFS is recommended because (1) it can handle the NAND back + blocks and (1) performs wear-leveling. + +endchoice # NAND FLASH configuration + +config SAMA5D4EK_AT25_BLOCKMOUNT + bool "AT25 serial FLASH auto-mount" + default n + depends on (NSH_ARCHINIT || SAMA5D4EK_AT25_MAIN) && SAMA5_SPI0 && MTD_AT25 + ---help--- + Automatically initialize the AT25 SPI FLASH driver when NSH starts. + +choice + prompt "AT25 serial FLASH configuration" + default SAMA5D4EK_AT25_FTL + depends on SAMA5D4EK_AT25_BLOCKMOUNT + +config SAMA5D4EK_AT25_FTL + bool "Create AT25 Serial FLASH block driver" + ---help--- + Create the MTD driver for the AT25 and "wrap" the AT25 as a standard + block driver that could then, for example, be mounted using FAT or + any other file system. Any file system may be used, but there will + be no wear-leveling. + +config SAMA5D4EK_AT25_CHARDEV + bool "Create AT25 Serial FLASH character driver" + ---help--- + Create the MTD driver for the AT25 and "wrap" the AT25 as a standard + character driver that could then, for example, via simple open, close, + read, write file system operations. There will be no wear-leveling + in this configuration. + +config SAMA5D4EK_AT25_NXFFS + bool "Create AT25 serial FLASH NXFFS file system" + depends on FS_NXFFS + ---help--- + Create the MTD driver for the AT25 and mount the AT25 device as + a wear-leveling, NuttX FLASH file system (NXFFS). The downside of + NXFFS is that it can be very slow. + +endchoice # AT25 serial FLASH configuration + +if FS_AUTOMOUNTER + +config SAMA5D4EK_HSMCI0_AUTOMOUNT + bool "HSMCI0 automounter" + default n + depends on SAMA5_HSMCI0 + +if SAMA5D4EK_HSMCI0_AUTOMOUNT + +config SAMA5D4EK_HSMCI0_AUTOMOUNT_FSTYPE + string "HSMCI0 file system type" + default "vfat" + +config SAMA5D4EK_HSMCI0_AUTOMOUNT_BLKDEV + string "HSMCI0 block device" + default "/dev/mmcsd0" + +config SAMA5D4EK_HSMCI0_AUTOMOUNT_MOUNTPOINT + string "HSMCI0 mount point" + default "/mnt/sdcard0" + +config SAMA5D4EK_HSMCI0_AUTOMOUNT_DDELAY + int "HSMCI0 debounce delay (milliseconds)" + default 1000 + +config SAMA5D4EK_HSMCI0_AUTOMOUNT_UDELAY + int "HSMCI0 unmount retry delay (milliseconds)" + default 2000 + +endif # SAMA5D4EK_HSMCI0_AUTOMOUNT + +config SAMA5D4EK_HSMCI1_AUTOMOUNT + bool "HSMCI1 automounter" + default n + depends on SAMA5_HSMCI1 + +if SAMA5D4EK_HSMCI1_AUTOMOUNT + +config SAMA5D4EK_HSMCI1_AUTOMOUNT_FSTYPE + string "HSMCI1 file system type" + default "vfat" + +config SAMA5D4EK_HSMCI1_AUTOMOUNT_BLKDEV + string "HSMCI1 block device" + default "/dev/mmcsd1" + +config SAMA5D4EK_HSMCI1_AUTOMOUNT_MOUNTPOINT + string "HSMCI1 mount point" + default "/mnt/sdcard1" + +config SAMA5D4EK_HSMCI1_AUTOMOUNT_DDELAY + int "HSMCI1 debounce delay (milliseconds)" + default 1000 + +config SAMA5D4EK_HSMCI1_AUTOMOUNT_UDELAY + int "HSMCI1 unmount retry delay (milliseconds)" + default 2000 + +endif # SAMA5D4EK_HSMCI1_AUTOMOUNT +endif # FS_AUTOMOUNTER + +config SAMA5D4EK_HSMCI0_MOUNT + bool "HSMCI0 boot mount" + default n + depends on SAMA5_HSMCI0 && !SAMA5D4EK_HSMCI0_AUTOMOUNT + +if SAMA5D4EK_HSMCI0_MOUNT + +config SAMA5D4EK_HSMCI0_MOUNT_FSTYPE + string "HSMCI0 file system type" + default "vfat" + +config SAMA5D4EK_HSMCI0_MOUNT_BLKDEV + string "HSMCI0 block device" + default "/dev/mmcsd0" + +config SAMA5D4EK_HSMCI0_MOUNT_MOUNTPOINT + string "HSMCI0 mount point" + default "/bin" + +endif # SAMA5D4EK_HSMCI0_MOUNT + +config SAMA5D4EK_HSMCI1_MOUNT + bool "HSMCI1 boot mount" + default n + depends on SAMA5_HSMCI1 && !SAMA5D4EK_HSMCI1_AUTOMOUNT + +if SAMA5D4EK_HSMCI1_MOUNT + +config SAMA5D4EK_HSMCI1_MOUNT_FSTYPE + string "HSMCI1 file system type" + default "vfat" + +config SAMA5D4EK_HSMCI1_MOUNT_BLKDEV + string "HSMCI1 block device" + default "/dev/mmcsd1" + +config SAMA5D4EK_HSMCI1_MOUNT_MOUNTPOINT + string "HSMCI1 mount point" + default "/bin" + +endif # SAMA5D4EK_HSMCI1_MOUNT + +config SAMA5D4EK_ROMFS_MOUNT + bool "ROMFS boot mount" + default n + depends on FS_ROMFS + ---help--- + By selecting this option, you an build mount a ROMFS file system as + part of the system boot operation. NOTE that the board logic + contains no a priori ROMFS file system. In order to use this option, + you must provide the file nuttx/configs/sama5d4-ek/include/boot_romfsimg.h. + You might use logic in the tool at apps/tools/mkromfsimg.sh to create + this header file. + +if SAMA5D4EK_ROMFS_MOUNT + +config SAMA5D4EK_ROMFS_ROMDISK_MINOR + int "ROM disk minor device number" + default 0 + +config SAMA5D4EK_ROMFS_ROMDISK_DEVNAME + string "ROM disk block device" + default "/dev/ram0" + +config SAMA5D4EK_ROMFS_ROMDISK_SECTSIZE + int "ROM disk sector size" + default 512 + +config SAMA5D4EK_ROMFS_MOUNT_MOUNTPOINT + string "ROMFS mount point" + default "/bin" + +endif # SAMA5D4EK_ROMFS_MOUNT + +config SAMA5D4EK_USBHOST_STACKSIZE + int "USB host waiter stack size" + default 1536 if USBHOST_HUB + default 1024 if !USBHOST_HUB + depends on USBHOST + +config SAMA5D4EK_USBHOST_PRIO + int "USB host waiter task priority" + default 100 + depends on USBHOST + +if INPUT_MXT + +config SAMA5D4EK_MXT_I2CFREQUENCY + int "maXTouch I2C frequency" + default 400000 + +config SAMA5D4EK_MXT_DEVMINOR + int "/dev/input minor number" + default 0 + +endif # INPUT_MXT + +config SAMA5D4EK_CHANNEL + int "PWM channel number" + default 0 if SAMA5_PWM_CHAN0 + default 1 if SAMA5_PWM_CHAN1 + default 2 if SAMA5_PWM_CHAN2 + default 3 if SAMA5_PWM_CHAN3 + range 0 3 + depends on PWM && SAMA5_PWM + ---help--- + Selects the PWM channel number that will be used to perform the PWM + test. See apps/examples/pwm. + +config SAMA5D4EK_SLOWCLOCK + bool + default y if SCHED_TICKLESS + default n if !SCHED_TICKLESS + +if AUDIO_WM8904 + +config SAMA5D4EK_WM8904_I2CFREQUENCY + int "WM8904 I2C Frequency" + default 400000 + range 1 400000 + ---help--- + This option selects the I2C frequency to use when communicating with + the WM8904 device. The default, 400KHz, is the maximum supported by + the WM8904. If you have problems communicating with the WM8904, + then you might want to try lowering this rate. + +choice + prompt "WM8904 MCLK source" + default SAMA5D4EK_WM8904_SRCMAIN + +config SAMA5D4EK_WM8904_SRCMAIN + bool "Main Clock (12MHz)" + +config SAMA5D4EK_WM8904_SRCSCK + bool "Slow XTAL (32.768KHz)" + select SAMA5D4EK_SLOWCLOCK + +endchoice # WM8904 MCLK source +endif # AUDIO_WM8904 +endif # ARCH_BOARD_SAMA5D4_EK diff --git a/configs/sama5d4-ek/README.txt b/configs/sama5d4-ek/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..5f2e569a0876da92442670053efbe3b9d09b88ac --- /dev/null +++ b/configs/sama5d4-ek/README.txt @@ -0,0 +1,5095 @@ +README +====== + + This README file describes the port of NuttX to the SAMA4D4-EK + development board. This board features the Atmel SAMA5D44 microprocessor. + See http://www.atmel.com for further information. + + This port was actually performed on a board designated SAMA5D4-MB. This + board should be equivalent to the SAMA5D4-EK. However, care should be + taken when I refer to PIO, Connector, or Jumper Usage in this document. + Please consult the schematic for your actual board-in-hand to verify that + information. + + SAMA5D44 + -------- + + ---------------------------- ------------- + PARAMETER SAMA5D44 + ---------------------------- ------------- + CPU Cortex-A5 + ARM TrustZone Yes + NEON Multimedia Architecture Yes + Pin Count 361 + Data Cache 32KiB + Instruction Cache 32KiB + L2 Cache 128KiB + Max. Operating Frequency 533MHz + SRAM 128KiB + Max I/O Pins 138 + USB Transceiver 3 + USB Speed Hi-Speed + USB Interface Host, Device + SPI 3 + TWI (I2C) 4 + UART 7 + LIN 4 + SSC 2 + Ethernet 2 10/100Mbps + SD / eMMC 2 + Graphic LCD Yes + Camera Interface Yes + Video Decoder Yes + Soft Modem Yes + ADC channels 5 + Resistive Touch Screen Yes + Capacitive Touch Module Yes + Crypto Engine SHA/AES/TDES + TRNG Yes + External Bus Interface 1 + DRAM Memory DDR2/LPDDR, + SDRAM/LPSDR, + 32-bit + NAND Interface Yes + FPU Yes + MPU / MMU No/Yes + Timers 9 + Output Compare channels 9 + Input Capture Channels 9 + PWM Channels 4 + 32kHz RTC Yes + Package BGA361 + ---------------------------- ------------- + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NXFLAT Toolchain + - Loading Code into SRAM with J-Link + - Writing to FLASH using SAM-BA + - Creating and Using DRAMBOOT + - Creating and Using AT25BOOT + - Running NuttX from SDRAM + - SAMA4D44-MB RevC PIO Usage + - Board Revisions + - Buttons and LEDs + - Serial Console + - Networking + - AT25 Serial FLASH + - HSMCI Card Slots + - Auto-Mounter + - USB Ports + - USB High-Speed Device + - USB High-Speed Host + - SDRAM Support + - NAND Support + - I2C Tool + - SAMA5 ADC Support + - SAMA5 PWM Support + - RTC + - Watchdog Timer + - TRNG and /dev/random + - Audio Support + - TM7000 LCD/Touchscreen + - Tickless OS + - SAMA4D4-EK Configuration Options + - Configurations + - To-Do List + +Development Environment +======================= + + Several possible development environments may be used: + + - Linux or OSX native + - Cygwin unders Windows + - MinGW + MSYS under Windows + - Windows native (with GNUMake from GNUWin32). + + All testing has been performed using Cygwin under Windows. + + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + The NuttX make system will support the several different toolchain options. + + All testing has been conducted using the CodeSourcery GCC toolchain. To use + a different toolchain, you simply need to add change to one of the following + configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7A_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux + CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y : Generic GCC ARM EABI toolchain for Windows + + The CodeSourcery GCC toolchain is selected with + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y and setting the PATH variable + appropriately. + + NOTE about Windows native toolchains + ------------------------------------ + + There are several limitations to using a Windows based toolchain in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' + utility but you might easily find some new path problems. If so, check + out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic + links are used in Nuttx (e.g., include/arch). The make system works + around these problems for the Windows tools by copying directories + instead of linking them. But this can also cause some confusion for + you: For example, you may edit a file in a "linked" directory and find + that your changes had no effect. That is because you are building the + copy of the file in the "fake" symbolic directory. If you use a\ + Windows toolchain, you should get in the habit of making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/sam34, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/sam34/sam_vectors.S. You may need to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh sama5d4-ek/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. Copy the configuration file from the configs/ sub-directory to the + top-level build directory: + + cp configs/cortexa8-eabi-defconfig-4.8.2 .config + + 6a. You may wish to modify the configuration before you build it. For + example, it is recommended that you build the kconfig-frontends tools, + generomfs, and the NXFLAT tools as well. You may also want to change + the selected toolchain. These reconfigurations can all be done with + + make menuconfig + + 6b. If you chose to make the configuration with no changes, then you + should still do the following to make certain that the build + configuration is up-to-date: + + make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh sama5d4-ek/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built NXFLAT binaries. + + NOTE: There are some known incompatibilities with 4.6.3 EABI toolchain + and the NXFLAT tools. See the top-level TODO file (under "Binary + loaders") for more information about this problem. If you plan to use + NXFLAT, please do not use the GCC 4.6.3 EABI toochain. + +Loading Code into SRAM with J-Link +================================== + + Loading code with the Segger tools and GDB + ------------------------------------------ + + 1) Change directories into the directory where you built NuttX. + 2) Start the GDB server and wait until it is ready to accept GDB + connections. + 3) Then run GDB like this: + + $ arm-none-eabi-gdb + (gdb) target remote localhost:2331 + (gdb) mon reset + (gdb) load nuttx + (gdb) ... start debugging ... + + Loading code using J-Link Commander + ---------------------------------- + + J-Link> r + J-Link> loadbin
+ J-Link> setpc
+ J-Link> ... start debugging ... + +Writing to FLASH using SAM-BA +============================= + + Assumed starting configuration: + + 1. You have installed the J-Link CDC USB driver (Windows only, there is + no need to install a driver on any regular Linux distribution), + 2. You have the USB connected to DBGU port (J23) + 3. Terminal configuration: 115200 8N1 + + Using SAM-BA to write to FLASH: + + 1. Exit the terminal emulation program and remove the USB cable from + the DBGU port (J23) + 2. Connect the USB cable to the device USB port (J6) + 3. JP9 must open (BMS == 1) to boot from on-chip Boot ROM. + 4. Press and maintain PB4 CS_BOOT button and power up the board. PB4 + CS_BOOT button prevents booting from Nand or serial Flash by + disabling Flash Chip Selects after having powered the board, you can + release the PB4 BS_BOOT button. + 5. On Windows you may need to wait for a device driver to be installed. + 6. Start the SAM-BA application, selecting (1) the correct USB serial + port, and (2) board = at91sama5d4-ek. + 7. The SAM-BA menu should appear. + 8. Select the FLASH bank that you want to use and the address to write + to and "Execute" + 9. When you are finished writing to FLASH, remove the USB cable from J6 + and re-connect the serial link on USB CDC / DBGU connector (J23) and + re-open the terminal emulator program. + 10. Power cycle the board. + +Creating and Using DRAMBOOT +=========================== + + In order to have more control of debugging code that runs out of DARM, + I created the sama5d4-ek/dramboot configuration. That configuration is + described below under "Configurations." + + Here are some general instructions on how to build an use dramboot: + + Building: + 1. Remove any old configurations (if applicable). + + cd + make distclean + + 2. Install and build the dramboot configuration. This steps will establish + the dramboot configuration and setup the PATH variable in order to do + the build: + + cd tools + ./configure.sh sama5d4-ek/dramboot + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and + perform edits as necessary so that TOOLCHAIN_BIN is the correct path + to the directory than holds your toolchain binaries. + + NOTE: Be aware that the default dramboot also disables the watchdog. + Since you will not be able to re-enable the watchdog later, you may + need to set CONFIG_SAMA5_WDT=y in the NuttX configuration file. + + Then make dramboot: + + make + + This will result in an ELF binary called 'nuttx' and also HEX and + binary versions called 'nuttx.hex' and 'nuttx.bin'. + + 3. Rename the binaries. Since you will need two versions of NuttX: this + dramboot version that runs in internal SRAM and another under test in + NOR FLASH, I rename the resulting binary files so that they can be + distinguished: + + mv nuttx dramboot + mv nuttx.hex dramboot.hex + mv nuttx.bin dramboot.bin + + 4. Build the "real" DRAM configuration. This will create the nuttx.hex + that you will load using dramboot. Note that you must select + CONFIG_SAMA5D4EK_DRAM_BOOT=y. This controls the origin at which the + code is linked and positions it correctly for the DRAMBOOT program. + + 5. Restart the system holding DIS_BOOT. You should see the RomBOOT + prompt on the 115200 8N1 serial console (and nothing) more. Hit + the ENTER key with the focus on your terminal window a few time. + This will enable JTAG. + + 6. Then start the J-Link GDB server and GDB. In GDB, I do the following: + + (gdb) mon heal # Halt the CPU + (gdb) load dramboot # Load dramboot into internal SRAM + (gdb) mon go # Start dramboot + + You should see this message: + + Send Intel HEX file now + + Load your program by sending the nuttx.hex via the terminal program. + Then: + + (gdb) mon halt # Break in + (gdb) mon reg pc = 0x20000040 # Set the PC to DRAM entry point + (gdb) mon go # And jump into DRAM + + The dramboot program can also be configured to jump directly into + DRAM without requiring the final halt and go by setting + CONFIG_SAMA5D4EK_DRAM_START=y in the NuttX configuration. However, + since I have been debugging the early boot sequence, the above + sequence has been most convenient for me since it allows me to + step into the program in SDRAM. + + 7. An option is to use the SAM-BA tool to write the DRAMBOOT image into + Serial FLASH. Then, the system will boot from Serial FLASH by + copying the DRAMBOOT image in SRAM which will run, download the nuttx.hex + file, and then start the image loaded into DRAM automatically. This is + a very convenient usage! + + NOTES: (1) There is that must be closed to enable use of the AT25 + Serial Flash. (2) If using SAM-BA, make sure that you load the DRAM + boot program into the boot area via the pull-down menu. (3) If + you don't have SAM-BA, an alternative is to use the AT25BOOT program + described in the next section. + + STATUS: I don't have a working SAM-BA at the moment and there are issues + with my AT25BOOT (see below). I currently work around these issues by + putting DRAMBOOT on a microSD card (as boot.bin). The RomBOOT loader does + boot that image without issue. + +Creating and Using AT25BOOT +=========================== + + To work around some SAM-BA availability issues that I had at one time, + I created the AT25BOOT program. AT25BOOT is a tiny program that runs in + ISRAM. AT25BOOT will enable SDRAM and configure the AT25 Serial FLASH. + It will prompt and then load an Intel HEX program into SDRAM over the + serial console. If the program is successfully loaded in SDRAM, AT25BOOT + will copy the program at the beginning of the AT26 Serial FLASH. + If the jumpering is set correctly, the SAMA5D4 RomBOOT loader will + then boot the program from the serial FLASH the next time that it + reset. + + The AT25BOOT configuration is described below under "Configurations." + + Here are some general instructions on how to build an use AT25BOOT: + + Building: + 1. Remove any old configurations (if applicable). + + cd + make distclean + + 2. Install and build the AT25BOOT configuration. This steps will establish + the AT25BOOT configuration and setup the PATH variable in order to do + the build: + + cd tools + ./configure.sh sama5d4-ek/at25boot + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and + perform edits as necessary so that TOOLCHAIN_BIN is the correct path + to the directory than holds your toolchain binaries. + + Then make AT25BOOT: + + make + + This will result in an ELF binary called 'nuttx' and also HEX and + binary versions called 'nuttx.hex' and 'nuttx.bin'. + + 3. Rename the binaries. If you want to save this version of AT25BOOT so + that it does not get clobbered later, you may want to rename the + binaries: + + mv nuttx at25boot + mv nuttx.hex at25boot.hex + mv nuttx.bin at25boot.bin + + 4. Build the "real" DRAMBOOT configuration. This will create the + dramboot.hex that you will write to the AT25 FLASH using AT25BOOT. See + the section above entitled "Creating and Using AT25BOOT" for more + information. + + 5. Restart the system holding DIS_BOOT. You should see the RomBOOT + prompt on the 115200 8N1 serial console (and nothing) more. Hit + the ENTER key with the focus on your terminal window a few time. + This will enable JTAG. + + 6. Then start the J-Link GDB server and GDB. In GDB, I do the following: + + (gdb) mon heal # Halt the CPU + (gdb) load at25boot # Load AT25BOOT into internal SRAM + (gdb) mon go # Start AT25BOOT + + You should see this message: + + Send Intel HEX file now + + Load DRAMBOOT by sending the dramboot.hex via the terminal program. + At this point you will get messages indicated whether or not the write + to the AT25 FLASH was successful or not. When you reset the board, + it should then boot from the AT25 Serial FLASH and you should again + get the prompt: + + Send Intel HEX file now + + But now you are being prompted to load the DRAM program under test + (See the section above entitled "Creating and Using AT25BOOT"). + + 7. An better option, if available, is to use the SAM-BA tool to write the + DRAMBOOT image into Serial FLASH. + + NOTES: (1) There is that must be closed to enable use of the AT25 + Serial Flash. (2) If using SAM-BA, make sure that you load the DRAM + boot program into the boot area via the pull-down menu. + + STATUS: While this program works great and appears to correctly write + the binary image onto the AT25 Serial FLASH, the RomBOOT loader will + not boot it! I believe that is because the secure boot loader has some + undocumented requirements that I am unaware of. (2014-6-28) + +Running NuttX from SDRAM +======================== + + NuttX may be executed from SDRAM. But this case means that the NuttX + binary must reside on some other media (typically NAND FLASH, Serial + FLASH) or transferred over some interface (perhaps a UARt or even a + TFTP server). In these cases, an intermediate bootloader such as U-Boot + or Barebox must be used to configure the SAMA5D4 clocks and SDRAM and + then to copy the NuttX binary into SDRAM. + + The SRAMBOOT program is another option (see above). But this section + will focus on U-Boot. + + - NuttX Configuration + - Boot sequence + - NAND FLASH Memory Map + - Programming the AT91Boostrap Binary + - Programming U-Boot + - Load NuttX with U-Boot on AT91 boards + + TODO: Some drivers may require some adjustments to run from SDRAM. That + is because in this case macros like BOARD_MCK_FREQUENCY are not constants + but are instead function calls: The MCK clock frequency is not known in + advance but instead has to be calculated from the bootloader PLL configuration. + See the TODO list at the end of this file for further information. + + NuttX Configuration + ------------------- + + In order to run from SDRAM, NuttX must be built at origin 0x20008000 in + SDRAM (skipping over SDRAM memory used by the bootloader). The following + configuration option is required: + + CONFIG_SAMA5_BOOT_SDRAM=y + CONFIG_BOOT_RUNFROMSDRAM=y + + These options tell the NuttX code that it will be booting and running from + SDRAM. In this case, the start-logic will do to things: (1) it will not + configure the SAMA5D4 clocking. Rather, it will use the clock configuration + as set up by the bootloader. And (2) it will not attempt to configure the + SDRAM. Since NuttX is already running from SDRAM, it must accept the SDRAM + configuration as set up by the bootloader. + + Boot sequence + ------------- + + Reference: http://www.at91.com/linux4sam/bin/view/Linux4SAM/GettingStarted + + Several pieces of software are involved to boot a Nutt5X into SDRAM. First + is the primary bootloader in ROM which is in charge to check if a valid + application is present on supported media (NOR FLASH, Serial DataFlash, + NAND FLASH, SD card). + + The boot sequence of linux4SAM is done in several steps : + + 1. The ROM bootloader checks if a valid application is present in FLASH + and if it is the case downloads it into internal SRAM. This program + is usually a second level bootloader called AT91BootStrap. + + 2. AT91Bootstrap is the second level bootloader. It is in charge of the + hardware configuration. It downloads U-Boot / Barebox binary from + FLASH to SDRAM / DDRAM and starts the third level bootloader + (U-Boot / Barebox) + + (see http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap). + + 3. The third level bootloader is either U-Boot or Barebox. The third + level bootloader is in charge of downloading NuttX binary from FLASH, + network, SD card, etc. It then starts NuttX. + + 4. Then NuttX runs from SDRAM + + NAND FLASH Memory Map + --------------------- + + Reference: http://www.at91.com/linux4sam/bin/view/Linux4SAM/GettingStarted + + 0x0000:0000 - 0x0003:ffff: AT91BootStrap + 0x0004:0000 - 0x000b:ffff: U-Boot + 0x000c:0000 - 0x000f:ffff: U-Boot environment + 0x0010:0000 - 0x0017:ffff: U-Boot environement redundant + 0x0018:0000 - 0x001f:ffff: Device tree (DTB) + 0x0020:0000 - 0x007f:ffff: NuttX + 0x0080:0000 - end: Available for use as a NAND file system + + Programming the AT91Boostrap Binary + ----------------------------------- + + Reference: http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap + + This section describes how to program AT91Bootstrap binary into the boot + media with SAM-BA tool using NandFlash as boot media. + + 1. Get AT91BootStrap binaries. Build instructions are available here: + + http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap#Build_AT91Bootstrap_from_sources + + A pre-built AT91BootStrap binary is available here: + + ftp://www.at91.com/pub/at91bootstrap/AT91Bootstrap3.6.1/sama5d3_xplained-nandflashboot-uboot-3.6.1.bin + + 2. Start the SAM-BA GUI Application: + + - Connect the USB Device interface to your host machine using the USB + Device Cable. + - Make sure that the chip can execute the SAM-BA Monitor. + - Start SAM-BA GUI application. + - Select the board in the drop-down menu and choose the USB connection. + + 3. In the SAM-BA GUI Application: + + - Choose the "NandFlash" tab in the SAM-BA GUI interface. + - Initialize the NandFlash by choosing the "Enable NandFlash" action in + the Scripts rolling menu, then press "Execute" button. + - Erase the NandFlash device by choosing the "Erase All" action, then + press "Execute" button. + - Enable the PMECC by choosing the "Enable OS PMECC parameters" action, + then press "Execute" button. + + PMECC + Number of sectors per page: 4 + Spare Size: 64 + Number of ECC bits required: 4 + Size of the ECC sector: 512 + ECC offset: 36 + + - Choose "Send Boot File" action, then press Execute button to select the + at91bootstrap binary file and to program the binary to the NandFlash. + - Close SAM-BA, remove the USB Device cable. + + Programming U-Boot + ------------------- + + Reference http://www.at91.com/linux4sam/bin/view/Linux4SAM/U-Boot + + 1. Get U-Boot Binaries. Build instructions are available here: + + http://www.at91.com/linux4sam/bin/view/Linux4SAM/U-Boot#Build_U_Boot_from_sources + + A pre-Built binay image is available here: + + ftp://www.at91.com/pub/uboot/u-boot-v2013.07/u-boot-sama5d3_xplained-v2013.07-at91-r1.bin + + 2. Start the SAM-BA GUI Application: + + - Connect the USB Device interface to your host machine using the USB + Device Cable. + - Make sure that the chip can execute the SAM-BA Monitor. + - Start SAM-BA GUI application. + - Select the board in the drop-down menu and choose the USB connection. + + 3. In the SAM-BA GUI Application: + + - Choose the NandFlash tab in the SAM-BA GUI interface. + - Initialize the NandFlash by choosing the "Enable NandFlash" action in + the Scripts rolling menu, then press Execute button. + - Enable the PMECC by choosing the "Enable OS PMECC parameters" action, + then press Execute button. + + PMECC + Number of sectors per page: 4 + Spare Size: 64 + Number of ECC bits required: 4 + Size of the ECC sector: 512 + ECC offset: 36 + + - Press the "Send File Name" Browse button + - Choose u-boot.bin binary file and press Open + - Enter the proper address on media in the Address text field: + 0x00040000 + - Press the "Send File" button + - Close SAM-BA, remove the USB Device cable. + + You should now be able to interrupt with U-Boot vie the DBGU interface. + + Load NuttX with U-Boot on AT91 boards + ------------------------------------- + + Reference http://www.at91.com/linux4sam/bin/view/Linux4SAM/U-Boot + + Preparing NuttX image + + U-Boot does not support normal binary images. Instead you have to + create an uImage file with the mkimage tool which encapsulates kernel + image with header information, CRC32 checksum, etc. + + mkimage comes in source code with U-Boot distribution and it is built + during U-Boot compilation (u-boot-source-dir/tools/mkimage). There + are also sites where you can download pre-built mkimage binaries. For + example: http://www.trimslice.com/wiki/index.php/U-Boot_images + + See the U-Boot README file for more information. More information is + also available in the mkimage man page (for example, + http://linux.die.net/man/1/mkimage). + + Command to generate an uncompressed uImage file (4) : + + mkimage -A arm -O linux -C none -T kernel -a 20008000 -e 20008000 \ + -n nuttx -d nuttx.bin uImage + + Where: + + -A arm: Set architecture to ARM + -O linux: Select operating system. bootm command of u-boot changes + boot method by os type. + -T kernel: Set image type. + -C none: Set compression type. + -a 20008000: Set load address. + -e 20008000: Set entry point. + -n nuttx: Set image name. + -d nuttx.bin: Use image data from nuttx.bin. + + This will generate a binary called uImage. If you have the path to + mkimage in your PATH variable, then you can automatically build the + uImage file by adding the following to your .config file: + + CONFIG_RAW_BINARY=y + CONFIG_UBOOT_UIMAGE=y + CONFIG_UIMAGE_LOAD_ADDRESS=0x20008000 + CONFIG_UIMAGE_ENTRY_POINT=0x20008040 + + The uImage file can them be loaded into memory from a variety of sources + (serial, SD card, JFFS2 on NAND, TFTP). + + STATUS: + 2014-4-1: So far, I am unable to get U-Boot to execute the uImage + file. I get the following error messages (in this case + trying to load from an SD card): + + U-Boot> fatload mmc 0 0x22000000 uimage + reading uimage + 97744 bytes read in 21 ms (4.4 MiB/s) + + U-Boot> bootm 0x22000000 + ## Booting kernel from Legacy Image at 0x22000000 ... + Image Name: nuttx + Image Type: ARM Linux Kernel Image (uncompressed) + Data Size: 97680 Bytes = 95.4 KiB + Load Address: 20008000 + Entry Point: 20008040 + Verifying Checksum ... OK + XIP Kernel Image ... OK + FDT and ATAGS support not compiled in - hanging + ### ERROR ### Please RESET the board ### + + This, however, appears to be a usable workaround: + + U-Boot> fatload mmc 0 0x20008000 nuttx.bin + mci: setting clock 257812 Hz, block size 512 + mci: setting clock 257812 Hz, block size 512 + mci: setting clock 257812 Hz, block size 512 + gen_atmel_mci: CMDR 00001048 ( 8) ARGR 000001aa (SR: 0c100025) Command Time Out + mci: setting clock 257812 Hz, block size 512 + mci: setting clock 22000000 Hz, block size 512 + reading nuttx.bin + 108076 bytes read in 23 ms (4.5 MiB/s) + + U-Boot> go 0x20008040 + ## Starting application at 0x20008040 ... + + NuttShell (NSH) NuttX-7.2 + nsh> + + Loading through network + + On a development system, it is useful to get the kernel and root file + system through the network. U-Boot provides support for loading + binaries from a remote host on the network using the TFTP protocol. + + To manage to use TFTP with U-Boot, you will have to configure a TFTP + server on your host machine. Check your distribution manual or Internet + resources to configure a Linux or Windows TFTP server on your host: + + - U-Boot documentation on a Linux host: + http://www.denx.de/wiki/view/DULG/SystemSetup#Section_4.6. + + - Another TFTP configuration reference: + http://www.linuxhomenetworking.com/wiki/index.php/Quick_HOWTO_:_Ch16_:_Telnet%2C_TFTP%2C_and_xinetd#TFTP + + On the U-Boot side, you will have to setup the networking parameters: + + 1. Setup an Ethernet address (MAC address) + Check this U-Boot network BuildRootFAQ entry to choose a proper MAC + address: http://www.denx.de/wiki/DULG/EthernetDoesNotWork + + setenv ethaddr 00:e0:de:ad:be:ef + + 2. Setup IP parameters: + The board ip address + + setenv ipaddr 10.0.0.2 + + The server ip address where the TFTP server is running + + setenv serverip 10.0.0.1 + + 3. saving Environment to flash + + saveenv + + 4. If Ethernet Phy has not been detected during former bootup, reset + the board to reload U-Boot : the Ethernet address and Phy + initialization shall be ok, now + + 5. Download the NuttX uImage and the root file system to a ram location + using the U-Boot tftp command (Cf. U-Boot script capability chapter). + + 6. Launch NuttX issuing a bootm or boot command. + + If the board has both emac and gmac, you can use following to choose + which one to use: + + setenv ethact macb0,gmacb0 + setenv ethprime gmacb0 + + STATUS: + 2014-3-30: These instructions were adapted from the Linux4SAM website + but have not yet been used. + + Using JTAG + ---------- + + This description assumes that you have a JTAG debugger such as Segger + J-Link connected to the SAMA5D3-Xplained. + + 1. Start the GDB server + 2. Start GDB + 3. Use the 'target remote localhost:xxxx' command to attach to the GDG + server + 4. Do 'mon reset' then 'mon go' to start the internal boot loader (maybe + U-Boot). + 5. Let the boot loader run until it completes SDRAM initialization, then + do 'mon halt'. + 6. Now you have SDRAM initialized and you use 'load nuttx' to load the + ELF file into SDRAM. + 7. Use 'file nuttx' to load symbols + 8. Set the PC to the NuttX entry point 'mon pc 0x20008040' and start + nuttx using 'mon go'. + +SAMA4D44-MB RevC PIO Usage +========================== + + Rev. B. 0111A + ------------------------------ ------------------- ------------------------- + SAMA5D4 PIO SIGNAL USAGE + ------------------------------ ------------------- ------------------------- + PA0/LCDDAT0/TMS PA0 LCDDAT0, TMS + PA1/LCDDAT1 PA1 LCDDAT1 + PA2/LCDDAT2/G1_TXCK PA2 LCDDAT2, G1_TXCK + PA3/LCDDAT3/G1_RXCK PA3 LCDDAT3 + PA4/LCDDAT4/G1_TXEN PA4 LCDDAT4, G1_TXEN + PA5/LCDDAT5/G1_TXER PA5 LCDDAT5 + PA6/LCDDAT6/G1_CRS PA6 LCDDAT6 + PA7/LCDDAT7 PA7 LCDDAT7 + PA8/LCDDAT8/TCK PA8 LCDDAT8, TCK + PA9/LCDDAT9/G1_COL PA9 LCDDAT9 + PA10/LCDDAT10/G1_RXDV PA10 LCDDAT10, G1_RXDV + PA11/LCDDAT11/G1_RXER PA11 LCDDAT11, G1_RXER + PA12/LCDDAT12/G1_RX0 PA12 LCDDAT12, G1_RX0 + PA13/LCDDAT13/G1_RX1 PA13 LCDDAT13, G1_RX1 + PA14/LCDDAT14/G1_TX0 PA14 LCDDAT14, G1_TX0 + PA15/LCDDAT15/G1_TX1 PA15 LCDDAT15, G1_TX1 + PA16/LCDDAT16/NTRST PA16 LCDDAT16, NTRST + PA17/LCDDAT17 PA17 LCDDAT17 + PA18/LCDDAT18/G1_RX2 PA18 LCDDAT18 + PA19/LCDDAT19/G1_RX3 PA19 LCDDAT19 + PA20/LCDDAT20/G1_TX2 PA20 LCDDAT20 + PA21/LCDDAT21/G1_TX3 PA21 LCDDAT21 + PA22/LCDDAT22/G1_MDC PA22 LCDDAT22, G1_MDC + PA23/LCDDAT23/G1_MDIO PA23 LCDDAT23, G1_MDIO + PA24/LCDPWM/PCK0 PA24 LCDPWM, EXP + PA25/LCDDISP/TD0 PA25 LCDDISP, EXP + PA26/LCDVSYNC/PWMH0/SPI1_NPCS1 PA26 LCDVSYNC + PA27/LCDHSYNC/PWML0/SPI1_NPCS2 PA27 LCDHSYNC + PA28/LCDPCK/PWMH1/SPI1_NPCS3 PA28 LCDPCK + PA29/LCDDEN/PWML1 PA29 LCDDEN + PA30/TWD0 PA30 TWD0 + PA31/TWCK0 PA31 TWCK0 + ------------------------------ ------------------- ------------------------- + PB0/G0_TXCK PB0 G0_TXCK, EXP + PB1/G0_RXCK/SCK2/ISI_PCK ISI_PCK_PB1 ISI_PCK + PB2/G0_TXEN PB2 G0_TXEN,EXP + PB3/G0_TXER/CTS2/ISI_VSYNC ISI_VSYNC_PB3 ISI_VSYNC + PB4/G0_CRS/RXD2/ISI_HSYNC ISI_HSYNC_PB4 ISI_HSYNC + PB5/G0_COL/TXD2/PCK2 ISI_PWD_PB5 ISI_PWD + PB6/G0_RXDV PB6 G0_RXDV, EXP + PB7/G0_RXER PB7 G0_RXER, EXP + PB8/G0_RX0 PB8 G0_RX0, EXP + PB9/G0_RX1 PB9 G0_RX1, EXP + PB10/G0_RX2/PCK2/PWML1 PB10 AUDIO_PCK2, EXP + PB11/G0_RX3/RTS2/PWMH1 ISI_RST_PB11 ISI_RST + PB12/G0_TX0 PB12 G0_TX0, EXP + PB13/G0_TX1 PB13 G0_TX1, EXP + PB14/G0_TX2/SPI2_NPCS1/PWMH0 ZIG_SPI2_NPCS1 ZIG_SPI2_NPCS1 + PB15/G0_TX3/SPI2_NPCS2/PWML0 HDMI_RST_PB15 HDMI_RST + PB16/G0_MDC PB16 G0_MDC, EXP + PB17/G0_MDIO PB17 G0_MDIO, EXP + PB18/SPI1_MISO/D8 LCD_SPI1_SO LCD_SPI1_SO + PB19/SPI1_MOSI/D9 LCD_SPI1_SI LCD_SPI1_SI + PB20/SPI1_SPCK/D10 LCD_SPI1_CLK LCD_SPI1_CLK + PB21/SPI1_NPCS0/D11 EXP_PB21 EXP + PB22/SPI1_NPCS1/D12 EXP_PB22 EXP + PB23/SPI1_NPCS2/D13 LCD_SPI1_CS2 LCD_SPI1_NPCS2 + PB24/DRXD/D14/TDI PB24 TDI, EXP + PB25/DTXD/D15/TDO PB25 TDO, EXP + PB26/PCK0/RK0/PWMH0 PB26 AUDIO_RK0 + PB27/SPI1_NPCS3/TK0/PWML0 PB27 AUDIO, HDMI_TK0, EXP + PB28/SPI2_NPCS3/TD0/PWMH1 PB28 AUDIO, HDMI_TD0, EXP + PB29/TWD2/RD0/PWML1 PB29 AUDIO_RD0, ZIG_TWD2 + PB30/TWCK2/RF0 PB30 AUDIO_RF, ZIG_TWCK2 + PB31/TF0 PB31 AUDIO, HDMI_TF0, EXP + ------------------------------ ------------------- ------------------------- + PC0/SPI0_MISO/PWMH2/ISI_D8 PC0 AT25_SPI0_SO, ISI_D8 + PC1/SPI0_MOSI/PWML2/ISI_D9 PC1 AT25_SPI0_SI, ISI_D9 + PC2/SPI0_SPCK/PWMH3/ISI_D10 PC2 AT25_SPI0_SPCK, ISI_D10, + ZIG_PWMH3_PC2 + PC3/SPI0_NPCS0/PWML3/ISI_D11 PC3 AT25_SPI0_NCPS0, ISI_D11, + ZIG_PWML3_PC3 (See JP6) + PC4/SPI0_NPCS1/MCI0_CK/PCK1 PC4 MCI0_CK, ISI_MCK, EXP + PC5/D0/MCI0_CDA PC5 MCI0_CDA, NAND_IO0 + PC6/D1/MCI0_DA0 PC6 MCI0_DA0, NAND_IO1 + PC7/D2/MCI0_DA1 PC7 MCI0_DA1, NAND_IO2 + PC8/D3/MCI0_DA2 PC8 MCI0_DA2, NAND_IO3 + PC9/D4/MCI0_DA3 PC9 MCI0_DA3, NAND_IO4 + PC10/D5/MCI0_DA4 PC10 MCI0_DA4, NAND_IO5 + PC11/D6/MCI0_DA5 PC11 MCI0_DA5, NAND_IO6 + PC12/D7/MCI0_DA6 PC12 MCI0_DA6, NAND_IO7 + PC13/NRD/NANDOE/MCI0_DA7 PC13 MCI0_DA7, NAND_RE + PC14/NWE/NANDWE NAND_WEn NWE, NANDWE + PC15/NCS3 NAND_NCS3 NAND_NCS3 + PC16/NANDRDY NAND_RDY NANDRDY + PC17/A21/NANDALE NAND_ALE NAND_ALE + PC18/A22/NANDCLE NAND_CLE NAND_CLE + PC19/ISI_D0/TK1 PC19 ISI_D0 + PC20/ISI_D1/TF1 PC20 ISI_D1 + PC21/ISI_D2/TD1 PC21 ISI_D2 + PC22/ISI_D3/RF1 PC22 ISI_D3 + PC23/ISI_D4/RD1 PC23 ISI_D4 + PC24/ISI_D5/RK1/PCK1 PC24 ISI_D5 + PC25/ISI_D6/TWD3/URXD1 PC25 AUDIO_TWD3, ISI_D6 + PC26/ISI_D7/TWCK3/UTXD1 PC26 AUDIO_TWCK3, ISI_D7 + PC27/AD0/SPI0_NPCS1/PWML0 AD0_XP AD0_XP + PC28/AD1/SPI0_NPCS2/PWML1 AD1_XM AD1_XM + PC29/AD2/SPI0_NPCS3/PWMFI0 AD2_YP AD2_YP + PC30/AD3/PWMH0 AD3_YM AD3_YM + PC31/AD4/PWMH1 AD4_LR AD4_LR, ADC_INPUT + ------------------------------ ------------------- ------------------------- + PD8/PCK0 PD8 EXP_PCK0 + PD9/FIQ USB_OVCUR_PD9 USB_OVCUR_PD9 + PD10/CTS0/CDETA ZIG_CTS0_PD10 ZIG_CTS0 + PD11/RTS0/SPI2_MISO ZIG_SPI2_MISO_RTS0 ZIG_SPI2_MISO_RTS0 + PD12/RXD0/DCENA ZIG_RXD0_PD12 ZIG_RXD0 + PD13/TXD0/SPI2_MOSI ZIG_SPI2_MOSI_TXD0 ZIG_SPI2_MOSI_TXD0 + PD14/CTS1/CDETB ZIG_CTS1_PD14 ZIG_CTS1 + PD15/RTS1/SPI2_SPCK ZIG_SPI2_SPCK_RTS1 ZIG_SPI2_SPCK_RTS + PD16/RXD1/DCENB ZIG_RXD1_PD16 ZIG_RXD1_PD16 + PD17/TXD1/SPI2_NPCS0 ZIG_SPI2_NPCS0_TXD1 ZIG_SPI2_NPCS0_TXD + PD18/SENSE0 SENSE0_PD18 SENSE0 + PD19/SENSE1 SENSE1_PD19 SENSE1 + PD20/SENSE2 SENSE2_PD20 SENSE2 + PD21/SENSE3 SENSE3_PD21 SENSE3 + PD22/SENSE4 SENSE4_PD22 SENSE4 + PD23/SENSE5 N/C N/C + PD24/SENSE6 N/C N/C + PD25/SENSE7 N/C N/C + PD26/SENSE8 N/C N/C + PD27/SENSE9 N/C N/C + PD28/SCK0 N/C PD28 + PD29/SCK1 SENSE_DISCH_PD29 SENSE_DISCH + PD30 EXP_PD30 EXP + PD31/SPI0_NPCS2/PCK1 EXP_PD31 EXP + ------------------------------ ------------------- ------------------------- + PE0/A0/NBS0/MCI0_CDB/CTS4 PMIC_IRQ_PE0 PMIC_IRQ + PE1/A1/MCI0_DB0 G0_IRQ_PE1 G0_IRQ + PE2/A2/MCI0_DB1 G1_IRQ_PE2 G1_IRQ + PE3/A3/MCI0_DB2 HDMI_IRQ_PE3 HDMI_IRQ + PE4/A4/MCI0_DB3 AUDIO_IRQ_PE4 AUDIO_IRQ + PE5/A5/CTS3 MCI0_CD_PE5 MCI0_CD + PE6/A6/TIOA3 MCI1_CD_PE6 MCI1_CD + PE7/A7/TIOB3/PWMFI1 EXP_PE7 EXP + PE8/A8/TCLK3/PWML3 LED_USER_PE8 LED_USER (D10) + PE9/A9/TIOA2 LED_POWER_PE9 LED_POWER (D9, Red) + PE10/A10/TIOB2 USBA_EN5V_PE10 EN5V_USBA + PE11/A11/TCLK2 USBB_EN5V_PE11 EN5V_USBB + PE12/A12/TIOA1/PWMH2 USBC_EN5V_PE12 EN5V_USBC + PE13/A13/TIOB1/PWML2 PB_USER1_PE13 PB_USER1 + PE14/A14/TCLK1/PWMH3 MCI1_CD_PE14 MCI1_CD ??? + PE15/A15/SCK3/TIOA0 MCI1_PWR_PE15 MCI1_PWR + PE16/A16/RXD3/TIOB0 DBGU_RXD3_PE16 DBGU_RXD3 (See JP19) + PE17/A17/TXD3/TCLK0 DBGU_TXD3_PE17 DBGU_TXD3 (See JP20) + PE18/A18/TIOA5/MCI1_CK PE18 MCI1_CK, EXP + PE19/A19/TIOB5/MCI1_CDA PE19 MCI1_CDA, EXP + PE20/A20/TCLK5/MCI1_DA0 PE20 MCI1_DA0, EXP + PE21/A23/TIOA4/MCI1_DA1 PE21 MCI1_DA1, EXP + PE22/A24/TIOB4/MCI1_DA2 PE22 MCI1_DA2, EXP + PE23/A25/TCLK4/MCI1_DA3 PE23 MCI1_DA3, EXP + PE24/NCS0/RTS3 LCD_PE24 LCD_PE24 + PE25/NCS1/SCK4/IRQ LCD_PE25 LCD_PE25 + PE26/NCS2/RXD4/A18 RXD4_PE26 RXD4 + PE27/NWR1/NBS1/TXD4 TXD4_PE27 TXD4 + PE28/NWAIT/RTS4/A19 1Wire_PE28 1-WIRE ROM, LCD, D8 (green) + PE29/DIBP/URXD0/TWD1 SMD_DIBP_PE29 DIBP + PE30/DIBN/UTXD0/TWCK1 SMD_DIBN_PE30 DIBP + PE31/ADTRG USBA_VBUS_PE31 USBA_VBUS_PE31 + ------------------------------ ------------------- ------------------------- + +Board Revisions +=============== + + PIO Usage + --------- + Most of this work was developed on a SAMA5D4-MB Rev C. board. Here is a + pin-for-pin comparison between the Rev C and Rev E boards. This is a + comparison of signal naming only; some differences are simply due to + differences in naming and any functional differences with no signal name + change would no be noted. + + ---------- --------------------- --------------------- + PINS SAMA5D44-MB Rev C. SAMA5D44-MB Rev E. + ---------- --------------------- --------------------- + PA0-PA31: Identical + ---------- --------------------- --------------------- + PB0-PB13: Identical + PB14 ZIG_SPI2_NPCS1 XPRO_SPI2_NPCS1 + PB15-PB31: Identical + ---------- --------------------- --------------------- + PC0-PC1: Identical + PC2 A-SPCK/ISI_D10/PWMH3 SPCK/ISI_D10/PWMH3 + PC3 A-NCPS0/ISI_D11/PWML3 NCPS0/ISI_D11/PWML3 + PC4-PC31: Identical + ---------- --------------------- --------------------- + PD0-PD9: Identical + PD10 ZIG_CTS0 XPRO_CTS0 + PD11 ZIG_SPI2_MISO_RTS0 XPRO_MISO_RTS0 + PD12 ZIG_RXD0 XPRO_RXD0 + PD13 ZIG_SPI2_MOSI_TXD0 XPRO_MOSI_TXD0 + PD14 ZIG_CTS1 XPRO_CTS1 + PD15 ZIG_SPI2_SPCK_RTS1 XPRO_SPCK_RTS1 + PD16 ZIG_RXD1_PD16 XPRO_RXD1_PD16 + PD17 ZIG_SPI2_NPCS0_TXD XPRO_NPCS0_TXD1 + PD18 SENSE0 NC + PD19 SENSE1 NC + PD20 SENSE2 NC + PD21 SENSE3 NC + PD22 NSENSE4C NC + PD23-PD27: Identical + PD28 PD28 SCK0 + PD29 SENSE_DISCH SCK1 + PD30-PD31: Identical + ---------- --------------------- --------------------- + PE0-PE13: Identical + PE14 MCI1_CD EXP + PE15-PE30: Identical + PE31 USBA_VBUS_PE31 USBA_VBUS/ADTRG + ---------- --------------------- --------------------- + + Jumpers + ------- + ---------- --------------------- --------------------- + Jumpers SAMA5D44-MB Rev C. SAMA5D44-MB Rev E. + ---------- --------------------- --------------------- + JP2-J3 Identical function + JP4 Force power on Not present on Rev E. + function selection + JP5-J22 Identical function + JP23 AUDIO_TWD0_PA30 Not present on Rev E. + JP24 Not present on Rev. C For CTS,RTS usage + +Buttons and LEDs +================ + + Buttons + ------- + A single button, PB_USER1 (PB2), is available on the SAMA5D4-EK: + + ------------------------------ ------------------- ------------------------- + SAMA5D4 PIO SIGNAL USAGE + ------------------------------ ------------------- ------------------------- + PE13/A13/TIOB1/PWML2 PB_USER1_PE13 PB_USER1 + ------------------------------ ------------------- ------------------------- + + Closing JP2 will bring PE13 to ground so 1) PE13 should have a weak pull-up, + and 2) when PB2 is pressed, a low value will be senses. + + Support for pollable buttons is enabled with: + + CONFIG_ARCH_BUTTONS=y + + For interrupt driven buttons, add: + + CONFIG_ARCH_IRQBUTTONS=y + + Program interfaces for button access are described in nuttx/include/nuttx/arch.h + + There is an example that can be enabled to test button interrupts. That + example is enabled like: + + CONFIG_EXAMPLES_BUTTONS=y + CONFIG_EXAMPLES_BUTTONS_MAX=0 + CONFIG_EXAMPLES_BUTTONS_MIN=0 + CONFIG_EXAMPLES_BUTTONS_NAME0="PB_USER" + CONFIG_EXAMPLES_IRQBUTTONS_MAX=0 + CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 + + LEDs + ---- + There are 3 LEDs on the SAMA5D4-EK: + + ------------------------------ ------------------- ------------------------- + SAMA5D4 PIO SIGNAL USAGE + ------------------------------ ------------------- ------------------------- + PE28/NWAIT/RTS4/A19 1Wire_PE28 1-WIRE ROM, LCD, D8 (green) + PE8/A8/TCLK3/PWML3 LED_USER_PE8 LED_USER (D10) + PE9/A9/TIOA2 LED_POWER_PE9 LED_POWER (D9, Red) + ------------------------------ ------------------- ------------------------- + + - D8: D8 is shared with other functions and cannot be used if the 1-Wire ROM + is used. I am not sure of the LCD function, but the LED may not be available + if the LCD is used either. We will avoid using D8 just for simplicity. + - D10: Nothing special here. A low output illuminates. + - D9: The Power ON LED. Connects to the via an IRLML2502 MOSFET. This LED will + be on when power is applied but otherwise a low output value will turn it + off. + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + events as follows: + + SYMBOL Meaning LED state + USER D10 POWER D9 + ------------------- ----------------------- -------- -------- + LED_STARTED NuttX has been started OFF ON + LED_HEAPALLOCATE Heap has been allocated OFF ON + LED_IRQSENABLED Interrupts enabled OFF ON + LED_STACKCREATED Idle stack created ON ON + LED_INIRQ In an interrupt No change + LED_SIGNAL In a signal handler No change + LED_ASSERTION An assertion failed No change + LED_PANIC The system has crashed OFF Blinking + LED_IDLE MCU is is sleep mode Not used + + Thus if the D0 and D9 are statically on, NuttX has successfully booted and + is, apparently, running normally. If the red D9 LED is flashing at + approximately 2Hz, then a fatal error has been detected and the system + has halted. + +Serial Console +============== + + Two UART ports are available: + + Virtual COM / DBGU Port (J24). Either may be driven by USART3, depending + upon the setting of JP19 and JP20: + + ------------------------------ ------------------- ------------------------- + SAMA5D4 PIO SIGNAL USAGE + ------------------------------ ------------------- ------------------------- + PE16/A16/RXD3/TIOB0 DBGU_RXD3_PE16 DBGU_RXD3 (See JP19) + PE17/A17/TXD3/TCLK0 DBGU_TXD3_PE17 DBGU_TXD3 (See JP20) + ------------------------------ ------------------- ------------------------- + + In one jumper position UART3 connects to the SAM3U which will, in turn, + provide the serial output over a USB virtual COM port. In other other + jumper position, UART3 will connect the RS-232 port labelled DBGU (J24). + + I personally prefer the RS-232 port because my terminal software does not + lose the USB Virtual COM every time I reset or power-cycle the board. + + USART4 TTL-Level + ------------------------------ ------------------- ------------------------- + SAMA5D4 PIO SIGNAL USAGE + ------------------------------ ------------------- ------------------------- + PE26/NCS2/RXD4/A18 RXD4_PE26 RXD4 + PE27/NWR1/NBS1/TXD4 TXD4_PE27 TXD4 + ------------------------------ ------------------- ------------------------- + + A TTL-to-RS232 converter is required to use this USART for a serial console. + + - RXD4/PE26 is available at Expansion Interface, J19C pin 59 + - TXD4/PE27 is available at Expansion Interface, J19C pin 60 + - VCC_3V3 is also available at Expansion Interface, J19B pins 21 and 22 + - GND is available J19A pin 11, J19B pin 31, and J19C pin 51 + + By default the RS-232 DBGU port on USART3 is used as the NuttX serial + console in all configurations (unless otherwise noted). USART4, however, + is the also available. + +Networking +========== + + Networking support via the can be added to NSH by selecting the following + configuration options. The SAMA5D44 supports two different 10/100Base-T + Ethernet MAC peripherals. + + NOTE: See the "kludge" for EMAC that is documented in the To-Do + list at the end of this README file. + + ------------------------------ ------------------- ------------------------- + SAMA5D4 PIO SAMA5D4-MB KSZ8081RNB + ------------------------------ ------------------- ------------------------- + PB0/G0_TXCK G0_TXCK_PB0 RXF_CLK/B-CAST_OFF + PB1/G0_RXCK/SCK2/ISI_PCK (RMII, not used) (RMII, not used) + PB2/G0_TXEN G0_TXEN_PB2 TXEN + PB3/G0_TXER/CTS2/ISI_VSYNC (RMII, not used) (RMII, not used) + PB4/G0_CRS/RXD2/ISI_HSYNC (RMII, not used) (RMII, not used) + PB5/G0_COL/TXD2/PCK2 (RMII, not used) (RMII, not used) + PB6/G0_RXDV G0_RXDV_PB6 CRS_DV/CONFIG2 + PB7/G0_RXER G0_RXER_PB7 RXER/ISO + PB8/G0_RX0 G0_RX0_PB8 RXD0/DUPLEX + PB9/G0_RX1 G0_RX1_PB9 RXD1/PHYAD2 + PB10/G0_RX2/PCK2/PWML1 (RMII, not used) (RMII, not used) + PB11/G0_RX3/RTS2/PWMH1 (RMII, not used) (RMII, not used) + PB12/G0_TX0 G0_TX0_PB12 TXD0 + PB13/G0_TX1 G0_TX1_PB13 TXD1 + PB14/G0_TX2/SPI2_NPCS1/PWMH0 (RMII, not used) (RMII, not used) + PB15/G0_TX3/SPI2_NPCS2/PWML0 (RMII, not used) (RMII, not used) + PB16/G0_MDC G0_MDC_PB16 MDC + PB17/G0_MDIO G0_MDIO_PB17 MDIO + PE1/A1/MCI0_DB0 G0_IRQ_PE1 nINTRP/NAND_TREE + ------------------------------ ------------------- ------------------------- + PA2/LCDDAT2/G1_TXCK G1_TXCK_PA2 RXF_CLK/B-CAST_OFF + PA3/LCDDAT3/G1_RXCK (RMII, not used) (RMII, not used) + PA4/LCDDAT4/G1_TXEN G1_TXEN_PA4 TXEN + PA5/LCDDAT5/G1_TXER (RMII, not used) (RMII, not used) + PA6/LCDDAT6/G1_CRS (RMII, not used) (RMII, not used) + PA9/LCDDAT9/G1_COL (RMII, not used) (RMII, not used) + PA10/LCDDAT10/G1_RXDV G1_RXDV_PA10 CRS_DV/CONFIG2 + PA11/LCDDAT11/G1_RXER G1_RXER_PA11 RXER/ISO + PA12/LCDDAT12/G1_RX0 G1_RX0_PA12 RXD0/DUPLEX + PA13/LCDDAT13/G1_RX1 G1_RX1_PA13 RXD1/PHYAD2 + PA18/LCDDAT18/G1_RX2 (RMII, not used) (RMII, not used) + PA19/LCDDAT19/G1_RX3 (RMII, not used) (RMII, not used) + PA14/LCDDAT14/G1_TX0 G1_TX0_PA14 TXD0 + PA15/LCDDAT15/G1_TX1 G1_TX1_PA15 TXD1 + PA20/LCDDAT20/G1_TX2 (RMII, not used) (RMII, not used) + PA21/LCDDAT21/G1_TX3 (RMII, not used) (RMII, not used) + PA22/LCDDAT22/G1_MDC G1_MDC_PA22 MDC + PA23/LCDDAT23/G1_MDIO G1_MDIO_PA23 MDIO + PE2/A2/MCI0_DB1 G1_IRQ_PE2 nINTRP/NAND_TREE + ------------------------------ ------------------- ------------------------- + + EMAC2 connects (directly) to a KSZ8081RNB PHY (U10) and is available at + the ETH0 connector. + + EMAC1 connects (indirectly) to another KSZ8081RNB PHY (U7) and is available + at the ETH1 connector. + + The ETH1 signals go through line drivers that are enabled via the board + LCD_ETH1_CONFIG signal. Jumper JP2 selects either the EMAC1 or the LCD by + controlling the the LCD_ETH1_CONFIG signal on the board. + + - JP2 open, LCD_ETH1_CONFIG pulled high: + + LCD_ETH1_CONFIG=1: LCD 5v enable(LCD_DETECT#=0); ETH1 disable + + - JP2 closed, LCD_ETH1_CONFIG grounded: + + LCD_ETH1_CONFIG=0: LCD 5v disable; ETH1 enable + + Selecting the EMAC0 peripheral + ----------------------------- + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_EMAC0=y : Enable the EMAC peripheral + + System Type -> EMAC device driver options + CONFIG_SAMA5_EMAC0_NRXBUFFERS=16 : Set aside some RS and TX buffers + CONFIG_SAMA5_EMAC0_NTXBUFFERS=8 + CONFIG_SAMA5_EMAC0_PHYADDR=1 : KSZ8081 PHY is at address 1 + CONFIG_SAMA5_EMAC0_AUTONEG=y : Use autonegotiation + CONFIG_SAMA5_EMAC0_RMII=y : The RMII interfaces is used on the board + CONFIG_SAMA5_EMAC0_PHYSR=30 : Address of PHY status register on KSZ8081 + CONFIG_SAMA5_EMAC0_PHYSR_ALTCONFIG=y : Needed for KSZ8081 + CONFIG_SAMA5_EMAC0_PHYSR_ALTMODE=0x7 : " " " " " " + CONFIG_SAMA5_EMAC0_PHYSR_10HD=0x1 : " " " " " " + CONFIG_SAMA5_EMAC0_PHYSR_100HD=0x2 : " " " " " " + CONFIG_SAMA5_EMAC0_PHYSR_10FD=0x5 : " " " " " " + CONFIG_SAMA5_EMAC0_PHYSR_100FD=0x6 : " " " " " " + + PHY selection. Later in the configuration steps, you will need to select + the KSZ8081 PHY for EMAC (See below) + + Selecting the EMAC1 peripheral + ----------------------------- + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_EMAC1=y : Enable the EMAC peripheral + + System Type -> EMAC device driver options + CONFIG_SAMA5_EMAC1_NRXBUFFERS=16 : Set aside some RS and TX buffers + CONFIG_SAMA5_EMAC1_NTXBUFFERS=8 + CONFIG_SAMA5_EMAC1_PHYADDR=1 : KSZ8081 PHY is at address 1 + CONFIG_SAMA5_EMAC1_AUTONEG=y : Use autonegotiation + CONFIG_SAMA5_EMAC1_RMII=y : The RMII interfaces is used on the board + CONFIG_SAMA5_EMAC1_PHYSR=30 : Address of PHY status register on KSZ8081 + CONFIG_SAMA5_EMAC1_PHYSR_ALTCONFIG=y : Needed for KSZ8081 + CONFIG_SAMA5_EMAC1_PHYSR_ALTMODE=0x7 : " " " " " " + CONFIG_SAMA5_EMAC1_PHYSR_10HD=0x1 : " " " " " " + CONFIG_SAMA5_EMAC1_PHYSR_100HD=0x2 : " " " " " " + CONFIG_SAMA5_EMAC1_PHYSR_10FD=0x5 : " " " " " " + CONFIG_SAMA5_EMAC1_PHYSR_100FD=0x6 : " " " " " " + + PHY selection. Later in the configuration steps, you will need to select + the KSZ8081 PHY for EMAC (See below) + + If both EMAC0 and EMAC1 are selected, you will also need: + + CONFIG_SAMA5_EMAC0_ISETH0=y : EMAC0 is "eth0"; EMAC1 is "eth1" + + PHY selection. Later in the configuration steps, you will need to select + the KSZ9081 PHY for GMAC (See below) + + Common configuration settings + ----------------------------- + + Networking Support + CONFIG_NET=y : Enable Neworking + CONFIG_NET_SOCKOPTS=y : Enable socket operations + CONFIG_NET_ETH_MTU=562 : Maximum packet size (MTU) 1518 is more standard + CONFIG_NET_ETH_TCP_RECVWNDO=562 : Should be the same as CONFIG_NET_ETH_MTU + CONFIG_NET_ARP=y : ARP support should be enabled + CONFIG_NET_ARP_IPIN=y : IP address harvesting (optional) + CONFIG_NET_TCP=y : Enable TCP/IP networking + CONFIG_NET_TCPBACKLOG=y : Support TCP/IP backlog + CONFIG_NET_TCP_READAHEAD=y : Enable TCP read-ahead buffering + CONFIG_NET_TCP_WRITE_BUFFERS=y : Enable TCP write buffering + CONFIG_NET_UDP=y : Enable UDP networking + CONFIG_NET_BROADCAST=y : Support UDP broadcase packets + CONFIG_NET_ICMP=y : Enable ICMP networking + CONFIG_NET_ICMP_PING=y : Needed for NSH ping command + : Defaults should be okay for other options + Device drivers -> Network Device/PHY Support + CONFIG_NETDEVICES=y : Enabled PHY selection + CONFIG_ETH0_PHY_KSZ8081=y : Select the KSZ8081 PHY used with EMAC0 and 1 + + Application Configuration -> Network Utilities + CONFIG_NETDB_DNSCLIENT=y : Enable host address resolution + CONFIG_NETUTILS_TELNETD=y : Enable the Telnet daemon + CONFIG_NETUTILS_TFTPC=y : Enable TFTP data file transfers for get and put commands + CONFIG_NETUTILS_NETLIB=y : Network library support is needed + CONFIG_NETUTILS_WEBCLIENT=y : Needed for wget support + : Defaults should be okay for other options + Application Configuration -> NSH Library + CONFIG_NSH_TELNET=y : Enable NSH session via Telnet + CONFIG_NSH_IPADDR=0x0a000002 : Select an IP address + CONFIG_NSH_DRIPADDR=0x0a000001 : IP address of gateway/host PC + CONFIG_NSH_NETMASK=0xffffff00 : Netmask + CONFIG_NSH_NOMAC=y : Need to make up a bogus MAC address + : Defaults should be okay for other options + + Using the network with NSH + -------------------------- + + So what can you do with this networking support? First you see that + NSH has several new network related commands: + + ifconfig, ifdown, ifup: Commands to help manage your network + get and put: TFTP file transfers + wget: HTML file transfers + ping: Check for access to peers on the network + Telnet console: You can access the NSH remotely via telnet. + + You can also enable other add on features like full FTP or a Web + Server or XML RPC and others. There are also other features that + you can enable like DHCP client (or server) or network name + resolution. + + By default, the IP address of the SAMA4D4-EK will be 10.0.0.2 and + it will assume that your host is the gateway and has the IP address + 10.0.0.1. + + nsh> ifconfig + eth0 HWaddr 00:e0:de:ad:be:ef at UP + IPaddr:10.0.0.2 DRaddr:10.0.0.1 Mask:255.255.255.0 + + You can use ping to test for connectivity to the host (Careful, + Window firewalls usually block ping-related ICMP traffic). On the + target side, you can: + + nsh> ping 10.0.0.1 + PING 10.0.0.1 56 bytes of data + 56 bytes from 10.0.0.1: icmp_seq=1 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=2 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=3 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=4 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=5 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=6 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=7 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=8 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=9 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=10 time=0 ms + 10 packets transmitted, 10 received, 0% packet loss, time 10100 ms + + NOTE: In this configuration is is normal to have packet loss > 0% + the first time you ping due to the default handling of the ARP + table. + + On the host side, you should also be able to ping the SAMA4D4-EK: + + $ ping 10.0.0.2 + + You can also log into the NSH from the host PC like this: + + $ telnet 10.0.0.2 + Trying 10.0.0.2... + Connected to 10.0.0.2. + Escape character is '^]'. + sh_telnetmain: Session [3] Started + + NuttShell (NSH) NuttX-6.31 + nsh> help + help usage: help [-v] [] + + [ echo ifconfig mkdir mw sleep + ? exec ifdown mkfatfs ping test + cat exit ifup mkfifo ps umount + cp free kill mkrd put usleep + cmp get losetup mh rm wget + dd help ls mount rmdir xd + df hexdump mb mv sh + + Builtin Apps: + nsh> + + NOTE: If you enable this feature, you experience a delay on booting. + That is because the start-up logic waits for the network connection + to be established before starting NuttX. In a real application, you + would probably want to do the network bringup on a separate thread + so that access to the NSH prompt is not delayed. + + This delay will be especially long if the board is not connected to + a network. On the order of a minute! You will probably think that + NuttX has crashed! And then, when it finally does come up, the + network will not be available. + + Network Initialization Thread + ----------------------------- + There is a configuration option enabled by CONFIG_NSH_NETINIT_THREAD + that will do the NSH network bring-up asynchronously in parallel on + a separate thread. This eliminates the (visible) networking delay + altogether. This networking initialization feature by itself has + some limitations: + + - If no network is connected, the network bring-up will fail and + the network initialization thread will simply exit. There are no + retries and no mechanism to know if the network initialization was + successful. + + - Furthermore, there is no support for detecting loss of the network + connection and recovery of networking when the connection is restored. + + Both of these shortcomings can be eliminated by enabling the network + monitor: + + Network Monitor + --------------- + By default the network initialization thread will bring-up the network + then exit, freeing all of the resources that it required. This is a + good behavior for systems with limited memory. + + If the CONFIG_NSH_NETINIT_MONITOR option is selected, however, then the + network initialization thread will persist forever; it will monitor the + network status. In the event that the network goes down (for example, if + a cable is removed), then the thread will monitor the link status and + attempt to bring the network back up. In this case the resources + required for network initialization are never released. + + Pre-requisites: + + - CONFIG_NSH_NETINIT_THREAD as described above. + + - CONFIG_NETDEV_PHY_IOCTL. Enable PHY IOCTL commands in the Ethernet + device driver. Special IOCTL commands must be provided by the Ethernet + driver to support certain PHY operations that will be needed for link + management. There operations are not complex and are implemented for + the Atmel SAMA5 family. + + - CONFIG_ARCH_PHY_INTERRUPT. This is not a user selectable option. + Rather, it is set when you select a board that supports PHY interrupts. + In most architectures, the PHY interrupt is not associated with the + Ethernet driver at all. Rather, the PHY interrupt is provided via some + board-specific GPIO and the board-specific logic must provide support + for that GPIO interrupt. To do this, the board logic must do two things: + (1) It must provide the function arch_phy_irq() as described and + prototyped in the nuttx/include/nuttx/arch.h, and (2) it must select + CONFIG_ARCH_PHY_INTERRUPT in the board configuration file to advertise + that it supports arch_phy_irq(). This logic can be found at + nuttx/configs/sama5d4-ek/src/sam_ethernet.c. + + - And a few other things: UDP support is required (CONFIG_NET_UDP) and + signals must not be disabled (CONFIG_DISABLE_SIGNALS). + + Given those prerequisites, the network monitor can be selected with these + additional settings. + + Networking Support -> Networking Device Support + CONFIG_NETDEV_PHY_IOCTL=y : Enable PHY ioctl support + + Application Configuration -> NSH Library -> Networking Configuration + CONFIG_NSH_NETINIT_THREAD : Enable the network initialization thread + CONFIG_NSH_NETINIT_MONITOR=y : Enable the network monitor + CONFIG_NSH_NETINIT_RETRYMSEC=2000 : Configure the network monitor as you like + CONFIG_NSH_NETINIT_SIGNO=18 + +AT25 Serial FLASH +================= + + Connections + ----------- + + The SAMA4D4-EK board supports an options Serial DataFlash connected + at MN8. The SPI connection is as follows: + + ------------------------------ ------------------- ------------------------- + SAMA5D4 PIO SIGNAL USAGE + ------------------------------ ------------------- ------------------------- + PC0/SPI0_MISO/PWMH2/ISI_D8 PC0 AT25_SPI0_SO, ISI_D8 + PC1/SPI0_MOSI/PWML2/ISI_D9 PC1 AT25_SPI0_SI, ISI_D9 + PC2/SPI0_SPCK/PWMH3/ISI_D10 PC2 AT25_SPI0_SPCK, ISI_D10, + ZIG_PWMH3_PC2 + PC3/SPI0_NPCS0/PWML3/ISI_D11 PC3 AT25_SPI0_NCPS0, ISI_D11, + ZIG_PWML3_PC3 (See JP6) + ------------------------------ ------------------- ------------------------- + + Configuration + ------------- + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_SPI0=y : Enable SPI0 + CONFIG_SAMA5_DMAC0=y : Enable DMA controller 0 + + System Type -> SPI device driver options + CONFIG_SAMA5_SPI_DMA=y : Use DMA for SPI transfers + CONFIG_SAMA5_SPI_DMATHRESHOLD=4 : Don't DMA for small transfers + + Device Drivers -> SPI Driver Support + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : Support the exchange method + + Device Drivers -> Memory Technology Device (MTD) Support + CONFIG_MTD=y : Enable MTD support + CONFIG_MTD_AT25=y : Enable the AT25 driver + CONFIG_AT25_SPIMODE=0 : Use SPI mode 0 + CONFIG_AT25_SPIFREQUENCY=10000000 : Use SPI frequency 10MHz + + The AT25 is capable of higher SPI rates than this. I have not experimented + a lot, but at 20MHz, the behavior is not the same with all CM modules. This + lower rate gives more predictable performance. + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + Board Selection + CONFIG_SAMA5D4EK_AT25_BLOCKMOUNT=y : Mounts AT25 for NSH + CONFIG_SAMA5D4EK_AT25_FTL=y : Create block driver for FAT + + NOTE: that you must close JP6 in order to enable the AT25 FLASH chip select. + + You can then format the AT25 FLASH for a FAT file system and mount the + file system at /mnt/at25 using these NSH commands: + + nsh> mkfatfs /dev/mtdblock0 + nsh> mount -t vfat /dev/mtdblock0 /mnt/at25 + + Then you an use the FLASH as a normal FAT file system: + + nsh> echo "This is a test" >/mnt/at25/atest.txt + nsh> ls -l /mnt/at25 + /mnt/at25: + -rw-rw-rw- 16 atest.txt + nsh> cat /mnt/at25/atest.txt + This is a test + +HSMCI Card Slots +================ + + Physical Slots + -------------- + + The SAMA4D4-EK provides a two SD memory card slots: (1) a full size SD + card slot (J10), and (2) a microSD memory card slot (J11). + + HSMCI0 + ------ + The full size SD card slot connects via HSMCI0. The card detect discrete + is available on PE5 (pulled high). The write protect discrete is tied to + ground and is not available to software. The slot supports 8-bit wide + transfer mode, but the NuttX driver currently uses only the 4-bit wide + transfer mode + + ------------------------------ ------------------- ------------------------- + SAMA5D4 PIO SIGNAL USAGE + ------------------------------ ------------------- ------------------------- + PC4/SPI0_NPCS1/MCI0_CK/PCK1 PC4 MCI0_CK, ISI_MCK, EXP + PC5/D0/MCI0_CDA PC5 MCI0_CDA, NAND_IO0 + PC6/D1/MCI0_DA0 PC6 MCI0_DA0, NAND_IO1 + PC7/D2/MCI0_DA1 PC7 MCI0_DA1, NAND_IO2 + PC8/D3/MCI0_DA2 PC8 MCI0_DA2, NAND_IO3 + PC9/D4/MCI0_DA3 PC9 MCI0_DA3, NAND_IO4 + PC10/D5/MCI0_DA4 PC10 MCI0_DA4, NAND_IO5 + PC11/D6/MCI0_DA5 PC11 MCI0_DA5, NAND_IO6 + PC12/D7/MCI0_DA6 PC12 MCI0_DA6, NAND_IO7 + PC13/NRD/NANDOE/MCI0_DA7 PC13 MCI0_DA7, NAND_RE + PE5/A5/CTS3 MCI0_CD_PE5 MCI0_CD + ------------------------------ ------------------- ------------------------- + + HSMCI1 + ------ + The microSD connects vi HSMCI1. The card detect discrete is available on + PE6 (pulled high). NOTE that PE15 must be controlled to provide power + to the HSMCI1 slot (the HSMCI0 slot is always powered). + + ------------------------------ ------------------- ------------------------- + SAMA5D4 PIO SIGNAL USAGE + ------------------------------ ------------------- ------------------------- + PE14/A14/TCLK1/PWMH3 MCI1_CD_PE14 MCI1_CD Rev C. ??? + PE15/A15/SCK3/TIOA0 MCI1_PWR_PE15 MCI1_PWR + PE18/A18/TIOA5/MCI1_CK PE18 MCI1_CK, EXP + PE19/A19/TIOB5/MCI1_CDA PE19 MCI1_CDA, EXP + PE20/A20/TCLK5/MCI1_DA0 PE20 MCI1_DA0, EXP + PE21/A23/TIOA4/MCI1_DA1 PE21 MCI1_DA1, EXP + PE22/A24/TIOB4/MCI1_DA2 PE22 MCI1_DA2, EXP + PE23/A25/TCLK4/MCI1_DA3 PE23 MCI1_DA3, EXP + PE6/A6/TIOA3 MCI1_CD_PE6 MCI1_CD + ------------------------------ ------------------- ------------------------- + + Configuration Settings + ---------------------- + + Enabling HSMCI support. The SAMA4D4-EK provides a two SD memory card + slots: (1) a full size SD card slot (J10), and (2) a microSD memory card + slot (J11). The full size SD card slot connects via HSMCI0; the microSD + connects via HSMCI1. Support for both SD slots can be enabled with the + following settings: + + System Type->ATSAMA5 Peripheral Support + CONFIG_SAMA5_HSMCI0=y : To enable HSMCI0 support + CONFIG_SAMA5_HSMCI1=y : To enable HSMCI1 support + CONFIG_SAMA5_XDMAC0=y : XDMAC0 is needed by HSMCI0/1 + : (HSMCI0 seemds to be secure by default) + System Type + CONFIG_SAMA5_PIO_IRQ=y : PIO interrupts needed + CONFIG_SAMA5_PIOE_IRQ=y : Card detect pins are on PE5 and PE6 + + Device Drivers -> MMC/SD Driver Support + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMSCD_NSLOTS=1 : One slot per driver instance + CONFIG_MMCSD_MULTIBLOCK_DISABLE=y : (REVISIT) + CONFIG_MMCSD_HAVECARDDETECT=y : Supports card-detect PIOs + CONFIG_MMCSD_MMCSUPPORT=n : Interferes with some SD cards + CONFIG_MMCSD_SPI=n : No SPI-based MMC/SD support + CONFIG_MMCSD_SDIO=y : SDIO-based MMC/SD support + CONFIG_SDIO_DMA=y : Use SDIO DMA + CONFIG_SDIO_BLOCKSETUP=y : Needs to know block sizes + + Library Routines + CONFIG_SCHED_WORKQUEUE=y : Driver needs work queue support + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization, OR + CONFIG_BOARD_INITIALIZE=y + + Using the SD card + ----------------- + + 1) After booting, the HSCMI devices will appear as /dev/mmcsd0 + and /dev/mmcsd1. + + 2) If you try mounting an SD card with nothing in the slot, the + mount will fail: + + nsh> mount -t vfat /dev/mmcsd1 /mnt/sd1 + nsh: mount: mount failed: 19 + + NSH can be configured to provide errors as strings instead of + numbers. But in this case, only the error number is reported. The + error numbers can be found in nuttx/include/errno.h: + + #define ENODEV 19 + #define ENODEV_STR "No such device" + + So the mount command is saying that there is no device or, more + correctly, that there is no card in the SD card slot. + + 3) Inserted the SD card. Then the mount should succeed. + + nsh> mount -t vfat /dev/mmcsd1 /mnt/sd1 + nsh> ls /mnt/sd1 + /mnt/sd1: + atest.txt + nsh> cat /mnt/sd1/atest.txt + This is a test + + NOTE: See the next section entitled "Auto-Mounter" for another way + to mount your SD card. + + 4) Before removing the card, you must umount the file system. This is + equivalent to "ejecting" or "safely removing" the card on Windows: It + flushes any cached data to an SD card and makes the SD card unavailable + to the applications. + + nsh> umount -t /mnt/sd1 + + It is now safe to remove the card. NuttX provides into callbacks + that can be used by an application to automatically unmount the + volume when it is removed. But those callbacks are not used in + these configurations. + +Auto-Mounter +============ + + NuttX implements an auto-mounter than can make working with SD cards + easier. With the auto-mounter, the file system will be automatically + mounted when the SD card is inserted into the HSMCI slot and automatically + unmounted when the SD card is removed. + + Here is a sample configuration for the auto-mounter: + + File System Configuration + CONFIG_FS_AUTOMOUNTER=y + + Board-Specific Options + CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT=y + CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_FSTYPE="vfat" + CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_BLKDEV="/dev/mmcsd0" + CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_MOUNTPOINT="/mnt/sdcard" + CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_DDELAY=1000 + CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_UDELAY=2000 + + WARNING: SD cards should never be removed without first unmounting + them. This is to avoid data and possible corruption of the file + system. Certainly this is the case if you are writing to the SD card + at the time of the removal. If you use the SD card for read-only access, + however, then I cannot think of any reason why removing the card without + mounting would be harmful. + +USB Ports +========= + + The SAMA4D4-EK features three USB communication ports: + + * Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed with + USB Device High Speed Micro AB connector, J1 + + * Port B Host High Speed (EHCI) and Full Speed (OHCI) standard type A + connector, J5 upper port + + * Port C Host Full Speed (OHCI) and Full Speed (OHCI) standard type A + connector, J5 lower port + + The three USB host ports are equipped with 500-mA high-side power + switch for self-powered and bus-powered applications. + + The USB device port A (J5) features a VBUS insert detection function. + + Port A + ------ + + PIO Signal Name Function + ---- -------------- ------------------------------------------------------- + PE10 USBA_EN5V_PE10 VBus power enable (via MN2 power switch) to VBus pin of + the OTG connector (host) + PE31 USBA_VBUS_PE31 VBus sensing from the VBus pin of the OTG connector (device) + + Port B + ------ + + PIO Signal Name Function + ---- -------------- ------------------------------------------------------- + PE11 USBB_EN5V_PE11 VBus power enable (via MN4 power switch). To the A1 + pin of J5 Dual USB A connector + + Port C + ------ + + PIO Signal Name Function + ---- -------------- ------------------------------------------------------- + PE12 USB_OVCUR_PD9 VBus power enable (via MN4 power switch). To the B1 + pin of J5 Dual USB A connector + + Both Ports B and C + ------------------ + + PIO Signal Name Function + ---- ------------- ------------------------------------------------------- + PD9 USB_OVCUR_PD9 Combined over-current indication from port A and B + +USB High-Speed Device +===================== + + Basic USB High-Speed Device Configuration + ----------------------------------------- + + Support the USB high-speed device (UDPHS) driver can be enabled with these + NuttX configuration settings. + + Device Drivers -> USB Device Driver Support + CONFIG_USBDEV=y : Enable USB device support + CONFIG_USBDEV_DUALSPEED=y : Device support High and Full Speed + CONFIG_USBDEV_DMA=y : Device uses DMA + + System Type -> ATSAMA5 Peripheral Support + CONFIG_SAMA5_UDPHS=y : Enable UDPHS High Speed USB device + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + Mass Storage Class + ------------------ + + The Mass Storage Class (MSC) class driver is selected for use with + UDPHS: + + Device Drivers -> USB Device Driver Support + CONFIG_USBMSC=y : Enable the USB MSC class driver + CONFIG_USBMSC_EPBULKOUT=1 : Use EP1 for the BULK OUT endpoint + CONFIG_USBMSC_EPBULKIN=2 : Use EP2 for the BULK IN endpoint + + The following setting enables an add-on that can can be used to control + the USB MSC device. It will add two new NSH commands: + + a. msconn will connect the USB serial device and export the AT25 + to the host, and + b. msdis which will disconnect the USB serial device. + + Application Configuration -> System Add-Ons: + CONFIG_SYSTEM_USBMSC=y : Enable the USBMSC add-on + CONFIG_SYSTEM_USBMSC_NLUNS=1 : One LUN + CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 : Minor device zero + CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mtdblock0" + : Use a single, LUN: The AT25 + : block driver. + + NOTES: + + a. To prevent file system corruption, make sure that the AT25 is un- + mounted *before* exporting the mass storage device to the host: + + nsh> umount /mnt/at25 + nsh> mscon + + The AT25 can be re-mounted after the mass storage class is disconnected: + + nsh> msdis + nsh> mount -t vfat /dev/mtdblock0 /mnt/at25 + + b. If you change the value CONFIG_SYSTEM_USBMSC_DEVPATH1, then you + can export other file systems: + + "/dev/mmcsd1" will export the HSMCI1 microSD + "/dev/mmcsd0" will export the HSMCI0 full-size SD slot + "/dev/ram0" could even be used to export a RAM disk. But you would + first have to use mkrd to create the RAM disk and mkfatfs to put + a FAT file system on it. + + CDC/ACM Serial Device Class + --------------------------- + + This will select the CDC/ACM serial device. Defaults for the other + options should be okay. + + Device Drivers -> USB Device Driver Support + CONFIG_CDCACM=y : Enable the CDC/ACM device + CONFIG_CDCACM_BULKIN_REQLEN=768 : Default too small for high-speed + + The following setting enables an example that can can be used to control + the CDC/ACM device. It will add two new NSH commands: + + a. sercon will connect the USB serial device (creating /dev/ttyACM0), and + b. serdis which will disconnect the USB serial device (destroying + /dev/ttyACM0). + + Application Configuration -> Examples: + CONFIG_SYSTEM_CDCACM=y : Enable an CDC/ACM example + + Debugging USB Device + -------------------- + + There is normal console debug output available that can be enabled with + CONFIG_DEBUG + CONFIG_DEBUG_USB. However, USB device operation is very + time critical and enabling this debug output WILL interfere with the + operation of the UDPHS. USB device tracing is a less invasive way to get + debug information: If tracing is enabled, the USB device will save + encoded trace output in in-memory buffer; if the USB monitor is also + enabled, that trace buffer will be periodically emptied and dumped to the + system logging device (the serial console in this configuration): + + Device Drivers -> "USB Device Driver Support: + CONFIG_USBDEV_TRACE=y : Enable USB trace feature + CONFIG_USBDEV_TRACE_NRECORDS=256 : Buffer 256 records in memory + CONFIG_USBDEV_TRACE_STRINGS=y : (optional) + + Application Configuration -> NSH LIbrary: + CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH + CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor + + Application Configuration -> System NSH Add-Ons: + CONFIG_SYSTEM_USBMONITOR=y : Enable the USB monitor daemon + CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size + CONFIG_SYSTEM_USBMONITOR_PRIORITY=50 : USB monitor daemon priority + CONFIG_SYSTEM_USBMONITOR_INTERVAL=1 : Dump trace data every second + CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y : Enable TRACE output + CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y + CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y + CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y + CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y + + NOTE: If USB debug output is also enabled, both outputs will appear on the + serial console. However, the debug output will be asynchronous with the + trace output and, hence, difficult to interpret. + +USB High-Speed Host +=================== + + OHCI Only + --------- + + Support the USB low/full-speed OHCI host driver can be enabled by changing + the NuttX configuration file as follows: + + System Type -> ATSAMA5 Peripheral Support + CONFIG_SAMA5_UHPHS=y : USB Host High Speed + + System Type -> USB High Speed Host driver options + CONFIG_SAMA5_OHCI=y : Low/full-speed OHCI support + : Defaults for values probably OK + Device Drivers + CONFIG_USBHOST=y : Enable USB host support + + Device Drivers -> USB Host Driver Support + CONFIG_USBHOST_ISOC_DISABLE=y : Isochronous endpoints not used + CONFIG_USBHOST_MSC=y : Enable the mass storage class driver + CONFIG_USBHOST_HIDKBD=y : Enable the HID keyboard class driver + + RTOS Features -> Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : High priority worker thread support is required + CONFIG_SCHED_HPWORK=y : + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + EHCI + ---- + + Support the USB high-speed EHCI host driver can be enabled by changing the + NuttX configuration file as follows. If EHCI is enabled by itself, then + only high-speed devices can be supported. If OHCI is also enabled, then + all low-, full-, and high speed devices will work. + + System Type -> ATSAMA5 Peripheral Support + CONFIG_SAMA5_UHPHS=y : USB Host High Speed + + System Type -> USB High Speed Host driver options + CONFIG_SAMA5_EHCI=y : High-speed EHCI support + CONFIG_SAMA5_OHCI=y : Low/full-speed OHCI support + : Defaults for values probably OK for both + CONFIG_SAMA5_UHPHS_RHPORT1=n : (Reserved for use by USB device) + CONFIG_SAMA5_UHPHS_RHPORT2=y : Enable port B + CONFIG_SAMA5_UHPHS_RHPORT3=y : Enable port C + + Device Drivers + CONFIG_USBHOST=y : Enable USB host support + CONFIG_USBHOST_ISOC_DISABLE=y : Isochronous endpoints not needed + + Device Drivers -> USB Host Driver Support + CONFIG_USBHOST_ISOC_DISABLE=y : Isochronous endpoints not used + CONFIG_USBHOST_MSC=y : Enable the mass storage class driver + CONFIG_USBHOST_HIDKBD=y : Enable the HID keyboard class driver + + RTOS Features -> Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : High priority worker thread support is required + CONFIG_SCHED_HPWORK=y : + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + USB Hub Support + ---------------- + + USB hub support can be included by adding the following changes to the configuration (in addition to those listed above): + + Drivers -> USB Host Driver Support + CONFIG_USBHOST_HUB=y : Enable the hub class + CONFIG_USBHOST_ASYNCH=y : Asynchonous I/O supported needed for hubs + + System Type -> USB High Speed Host driver options + CONFIG_SAMA5_OHCI_NEDS=12 : You will probably want more OHCI pipes + CONFIG_SAMA5_OHCI_NTDS=18 : You will probably want more OHCI pipes + CONFIG_SAMA5_OHCI_TDBUFFERS=12 + CONFIG_SAMA5_OHCI_TDBUFSIZE=128 + + CONFIG_SAMA5_EHCI_NQHS=12 : You will probably want more OHCI pipes + CONFIG_SAMA5_EHCI_NQTDS=16 : You will probably want more OHCI pipes + CONFIG_SAMA5_EHCI_BUFSIZE=128 + + Board Selection -> + CONFIG_SAMA5D4EK_USBHOST_STACKSIZE=2048 (bigger than it needs to be) + + RTOS Features -> Work Queue Support + CONFIG_SCHED_LPWORK=y : Low priority queue support is needed + CONFIG_SCHED_LPNTHREADS=1 + CONFIG_SCHED_LPWORKSTACKSIZE=1024 + + NOTES: + + 1. It is necessary to perform work on the low-priority work queue + (vs. the high priority work queue) because deferred hub-related + work requires some delays and waiting that is not appropriate on + the high priority work queue. + + 2. Stack usage make increase when USB hub support is enabled because + the nesting depth of certain USB host class logic can increase. + + STATUS: + 2015-05-01: + Verified that normal, non-hub OHCI still works. + + Mass Storage Device Usage + ------------------------- + + Example Usage: + + NuttShell (NSH) NuttX-6.29 + nsh> ls /dev + /dev: + console + mtdblock0 + null + ttyS0 + + Here a USB FLASH stick is inserted. Nothing visible happens in the + shell. But a new device will appear: + + nsh> ls /dev + /dev: + console + mtdblock0 + null + sda + ttyS0 + nsh> mount -t vfat /dev/sda /mnt/sda + nsh> ls -l /mnt/sda + /mnt/sda: + -rw-rw-rw- 8788 viminfo + drw-rw-rw- 0 .Trash-1000/ + -rw-rw-rw- 3378 zmodem.patch + -rw-rw-rw- 1503 sz-1.log + -rw-rw-rw- 613 .bashrc + + HID Keyboard Usage + ------------------ + + If a (supported) USB keyboard is connected, a /dev/kbda device will appear: + + nsh> ls /dev + /dev: + console + kbda + mtdblock0 + null + ttyS0 + + /dev/kbda is a read-only serial device. Reading from /dev/kbda will get + keyboard input as ASCII data (other encodings are possible): + + nsh> cat /dev/kbda + + Debugging USB Host + ------------------ + + There is normal console debug output available that can be enabled with + CONFIG_DEBUG + CONFIG_DEBUG_USB. However, USB host operation is very time + critical and enabling this debug output might interfere with the operation + of the UDPHS. USB host tracing is a less invasive way to get debug + information: If tracing is enabled, the USB host will save encoded trace + output in in-memory buffer; if the USB monitor is also enabled, that trace + buffer will be periodically emptied and dumped to the system logging device + (the serial console in this configuration): + + Device Drivers -> "USB Host Driver Support: + CONFIG_USBHOST_TRACE=y : Enable USB host trace feature + CONFIG_USBHOST_TRACE_NRECORDS=256 : Buffer 256 records in memory + CONFIG_USBHOST_TRACE_VERBOSE=y : Buffer everything + + Application Configuration -> NSH LIbrary: + CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH + CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor + + Application Configuration -> System NSH Add-Ons: + CONFIG_SYSTEM_USBMONITOR=y : Enable the USB monitor daemon + CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size + CONFIG_SYSTEM_USBMONITOR_PRIORITY=50 : USB monitor daemon priority + CONFIG_SYSTEM_USBMONITOR_INTERVAL=1 : Dump trace data every second + + NOTE: If USB debug output is also enabled, both outpus will appear on the + serial console. However, the debug output will be asynchronous with the + trace output and, hence, difficult to interpret. + +SDRAM Support +============= + + SRAM Heap Configuration + ----------------------- + + In these configurations, .data and .bss are retained in ISRAM. SDRAM can + be initialized and included in the heap. Relevant configuration settings: + + System Type->ATSAMA5 Peripheral Support + CONFIG_SAMA5_MPDDRC=y : Enable the DDR controller + + System Type->External Memory Configuration + CONFIG_SAMA5_DDRCS=y : Tell the system that DRAM is at the DDR CS + CONFIG_SAMA5_DDRCS_SIZE=268435456 : 2Gb DRAM -> 256MB + CONFIG_SAMA5_DDRCS_LPDDR2=y : Its DDR2 + CONFIG_SAMA5D4EK_MT47H128M16RT=y : This is the type of DDR2 + + System Type->Heap Configuration + CONFIG_SAMA5_DDRCS_HEAP=y : Add the SDRAM to the heap + CONFIG_SAMA5_DDRCS_HEAP_OFFSET=0 + CONFIG_SAMA5_DDRCS_HEAP_SIZE=268435456 + + Memory Management + CONFIG_MM_REGIONS=2 : Two heap memory regions: ISRAM and SDRAM + + RAM Test + -------- + + Another thing you could do is to enable the RAM test built-in application. + You can enable the NuttX RAM test that may be used to verify the external + SDRAM. To do this, keep the SDRAM out of the heap so that it can be tested + without crashing programs using the memory: + + System Type->Heap Configuration + CONFIG_SAMA5_DDRCS_HEAP=n : Don't add the SDRAM to the heap + + Memory Management + CONFIG_MM_REGIONS=1 : One memory regions: ISRAM + + Then enable the RAM test built-in application: + + Application Configuration->System NSH Add-Ons->Ram Test + CONFIG_SYSTEM_RAMTEST=y + + In this configuration, the SDRAM is not added to heap and so is not + accessable to the applications. So the RAM test can be freely executed + against the SRAM memory beginning at address 0x2000:0000 (DDR CS): + + nsh> ramtest -h + Usage: [-w|h|b] + + Where: + starting address of the test. + number of memory locations (in bytes). + -w Sets the width of a memory location to 32-bits. + -h Sets the width of a memory location to 16-bits (default). + -b Sets the width of a memory location to 8-bits. + + To test the entire external 256MB SRAM: + + nsh> ramtest -w 20000000 268435456 + RAMTest: Marching ones: 20000000 268435456 + RAMTest: Marching zeroes: 20000000 268435456 + RAMTest: Pattern test: 20000000 268435456 55555555 aaaaaaaa + RAMTest: Pattern test: 20000000 268435456 66666666 99999999 + RAMTest: Pattern test: 20000000 268435456 33333333 cccccccc + RAMTest: Address-in-address test: 20000000 268435456 + + SDRAM Data Configuration + ------------------------ + + In these configurations, .data and .bss are retained in ISRAM by default. + .data and .bss can also be retained in SDRAM using these slightly + different configuration settings. In this configuration, ISRAM is + used only for the Cortex-A5 page table for the IDLE thread stack. + + System Type->ATSAMA5 Peripheral Support + CONFIG_SAMA5_MPDDRC=y : Enable the DDR controller + + System Type->External Memory Configuration + CONFIG_SAMA5_DDRCS=y : Tell the system that DRAM is at the DDR CS + CONFIG_SAMA5_DDRCS_SIZE=268435456 : 2Gb DRAM -> 256GB + CONFIG_SAMA5_DDRCS_LPDDR2=y : Its DDR2 + CONFIG_SAMA5D4EK_MT47H128M16RT=y : This is the type of DDR2 + + System Type->Heap Configuration + CONFIG_SAMA5_ISRAM_HEAP=n : These do not apply in this case + CONFIG_SAMA5_DDRCS_HEAP=n + + System Type->Boot Memory Configuration + CONFIG_RAM_START=0x20000000 : Physical address of SDRAM + CONFIG_RAM_VSTART=0x20000000 : Virtual address of SDRAM + CONFIG_RAM_SIZE=268435456 : Size of SDRAM + CONFIG_BOOT_SDRAM_DATA=y : Data is in SDRAM + + Care must be used applied these RAM locations; graphics + configurations may use SDRAM in an incompatible way to set aside + LCD framebuffers. + + Memory Management + CONFIG_MM_REGIONS=1 : One heap memory region: ISDRAM + +NAND Support +============ + + NAND support is only partial in that there is no file system that works + with it properly. Lower-level NAND support has been developed and + verified, but there is no way to use it in the current NuttX architecture + other than through the raw MTD interface. + + NAND should still be considered a work in progress. You will not want to + use NAND unless you are interested in investing a little effort, + particularly in infrastructure. See the "STATUS SUMMARY" section below. + + NAND Support + ------------ + + NAND Support can be added to the NSH configuration by modifying the + NuttX configuration file as follows: + + Build Setup + CONFIG_EXPERIMENTAL=y : NXFFS implementation is incomplete and + : not yet fully functional. + + System Type -> SAMA5 Peripheral support + CONFIG_SAMA5_HSMC=y : Make sure that the SMC is enabled + + Drivers -> Memory Technology Device (MTD) Support + CONFIG_MTD=y : Enable MTD support + CONFIG_MTD_NAND=y : Enable NAND support + CONFIG_MTD_NAND_BLOCKCHECK=n : Interferes with NXFFS bad block checking + CONFIG_MTD_NAND_SWECC=y : Use S/W ECC calculation + + Defaults for all other NAND settings should be okay + + System Type -> External Memory Configuration + CONFIG_SAMA5_EBICS3=y : Enable External CS3 memory + CONFIG_SAMA5_EBICS3_NAND=y : Select NAND memory type + CONFIG_SAMA5_EBICS3_SIZE=8388608 : Use this size + CONFIG_SAMA5_EBICS3_SWECC=y : Use S/W ECC calculation + + Defaults for ROM page table addresses should be okay + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : Use architecture-specific initialization + + NOTES: + + 1. WARNING: This will wipe out everything that you may have on the NAND + FLASH! I have found that using the JTAG with no valid image on NAND + or Serial FLASH is a problem: In that case, the code always ends up + in the SAM-BA bootloader. + + My understanding is that you can enable JTAG in this case by simply + entering any data on the DBG serial port. I have not tried this. + Instead, I just changed to boot from Serial Flash: + + 2. Unfortunately, there are no appropriate NAND file system in NuttX as + of this writing. The following sections discussion issues/problems + with using NXFFS and FAT. + + PMECC + ----- + + Hardware ECC calculation using the SAMA5D4's PMECC can be enable as + follows: + + Drivers -> Memory Technology Device (MTD) Support + CONFIG_MTD_NAND_SWECC=y : Don't use S/W ECC calculation + CONFIG_MTD_NAND_HWECC=y : Use H/W ECC instead + + System Type -> External Memory Configuration + CONFIG_SAMA5_EBICS3_SWECC=n : Don't use S/W ECC calculation + CONFIG_SAMA5_HAVE_PMECC=n : Use H/W ECC instead + + Other PMECC-related default settings should be okay. + + STATUS: As of the writing, NAND transfers using PMECC appear to + work correctly. However, the PMECC based systems do not work as + as well with FAT or NXFFS. My belief that that the FAT/NXFFS layers + are inappropriate for NAND and, as a result, happen not to work with + the PMECC ECC calculation. See also the "STATUS SUMMARY" section below. + + DMA Support + ----------- + + DMA support can be enabled as follows: + + System Type -> SAMA5 Peripheral support + CONFIG_SAMA5_DMAC0=y : Use DMAC0 for memory-to-memory DMA + + System Type -> External Memory Configuration + CONFIG_SAMA5_NAND_DMA=y : Use DMAC0 for NAND data transfers + + STATUS: DMA appears to be functional, but probably has not been + exercised enough to claim that with any certainty. See also the "STATUS + SUMMARY" section below. + + NXFFS + ----- + + The NuttX FLASH File System (NXFFS) works well with NOR-like FLASH + but does not work well with NAND (See comments below under STATUS) + + File Systems: + CONFIG_FS_NXFFS=y : Enable the NXFFS file system + + Defaults for all other NXFFS settings should be okay. + + NOTE: NXFFS will require some significant buffering because of + the large size of the NAND flash blocks. You will also need + to enable SDRAM as described above. + + Board Selection + CONFIG_SAMA5D4EK_NAND_BLOCKMOUNT=y : Enable FS support on NAND + CONFIG_SAMA5D4EK_NAND_NXFFS=y : Use the NXFFS file system + + Other file systems are not recommended because only NXFFS can handle + bad blocks and only NXFFS performs wear-levelling. + + FAT + --- + + Another option is FAT. FAT, however, is not appropriate for use with + NAND: FAT will not handle bad blocks, does not perform any wear + levelling, and may not conform to writing ordering requirements of NAND. + Also, there appear to be issues with FAT when PMECC is enabled (see + "STATUS SUMMARY" below). + + File Systems: + CONFIG_FS_FAT=y : Enable the FAT FS + CONFIG_FAT_LCNAMES=y : With lower case name support + CONFIG_FAT_LFN=y : And (patented) FAT long file name support + CONFIG_FS_NXFFS=n : Don't need NXFFS + + Defaults for all other NXFFS settings should be okay. + + Board Selection + CONFIG_SAMA5D4EK_NAND_BLOCKOMOUNT=y : Enable FS support on NAND + CONFIG_SAMA5D4EK_NAND_FTL=y : Use an flash translation layer + + NOTE: FTL will require some significant buffering because of + the large size of the NAND flash blocks. You will also need + to enable SDRAM as described above. + + SMART FS + -------- + + Another option is Smart FS. Smart FS is another small file system + designed to work with FLASH. Properties: It does support some wear- + leveling like NXFFS, but like FAT, cannot handle bad blocks and like + NXFFS, it will try to re-write erased bits. + + Using NAND with NXFFS + --------------------- + + With the options CONFIG_SAMA5D4EK_NAND_BLOCKMOUNT=y and + CONFIG_SAMA5D4EK_NAND_NXFFS=y, the NAND FLASH will be mounted in the NSH + start-up logic before the NSH prompt appears. There is no feedback as + to whether or not the mount was successful. You can, however, see the + mounted file systems using the nsh 'mount' command: + + nsh> mount + /mnt/nand type nxffs + + Then NAND can be used like any other file system: + + nsh> echo "This is a test" >/mnt/nand/atest.txt + nsh> ls -l /mnt/nand + /mnt/nand: + ---x--x--x 16 atest.txt + nsh> cat /mnt/nand/atest.txt + This is a test + + The NAND volume can be un-mounted with this comment: + + nsh> umount /mnt/nand + nsh> mount + + And re-mounted with this command: + + nsh> mount -t nxffs /mnt/mystuff + nsh> mount + /mnt/mystuff type nxffs + + NOTES: + 1. NXFFS can be very slow. The first time that you start the system, + be prepared for a wait; NXFFS will need to format the NAND volume. + I have lots of debug on so I don't yet know what the optimized wait + will be. But with debug ON, software ECC, and no DMA the wait is + in many tens of minutes (and substantially longer if many debug + options are enabled. + + [I don't yet have data for the more optimal cases. It will be + significantly less, but still not fast.] + + 2. On subsequent boots, after the NXFFS file system has been created + the delay will be less. When the new file system is empty, it will + be very fast. But the NAND-related boot time can become substantial + when there has been a lot of usage of the NAND. This is because + NXFFS needs to scan the NAND device and build the in-memory dataset + needed to access NAND and there is more that must be scanned after + the device has been used. You may want to create a separate thread at + boot time to bring up NXFFS so that you don't delay the boot-to-prompt + time excessively in these longer delay cases. + + 3. There is another NXFFS related performance issue: When the FLASH + is fully used, NXFFS will restructure the entire FLASH, the delay + to restructure the entire FLASH will probably be even larger. This + solution in this case is to implement an NXFSS clean-up daemon that + does the job a little-at-a-time so that there is no massive clean-up + when the FLASH becomes full. + + 4. Bad NXFFS behavior with NAND: If you restart NuttX, the files that + you wrote to NAND will be gone. Why? Because the multiple writes + have corrupted the NAND ECC bits. See STATUS below. NXFFS would + require a major overhaul to be usable with NAND. + + Using NAND with FAT + ------------------- + + If configured for FAT, the system will create block driver at + /dev/mtdblock0: + + NuttShell (NSH) + nsh> ls /dev + /dev: + console + mtdblock0 + null + ttyS0 + + You will not that the system comes up immediately because there is not + need to scan the volume in this case.. + + The NSH 'mkfatfs' command can be used to format a FAT file system on + NAND. + + nsh> mkfatfs /dev/mtdblock0 + + This step, on the other hand, requires quite a bit of time. + + And the FAT file system can be mounted like: + + nsh> mount -t vfat /dev/mtdblock0 /mnt/nand + nsh> ls /mnt/nand + /mnt/nand: + + nsh> echo "This is a test" > /mnt/nand/atest.txt + + NOTE: This will take a long time because it will require reading, + modifying, and re-writing the 128KB erase page! + + nsh> ls -l /mnt/nand + /mnt/nand: + -rw-rw-rw- 16 atest.txt + + nsh> cat /mnt/fat/atest.txt + This is a test + + NOTES: + + 1. Unlike NXFFS, FAT can work with NAND (at least with PMECC disabled). + But there are some significant issues. + + 2. First, each NAND write access will cause a 256KB data transfer: It + will read the entire 128KB erase block, modify it and write it back + to memory. There is some caching logic so that this cached erase + block can be re-used if possible and writes will be deferred as long + as possible. + + 3. If you hit a bad block, then FAT is finished. There is no mechanism + in place in FAT not to mark and skip over bad blocks. + + What is Needed + -------------- + + What is needed to work with FAT properly would be another MTD layer + between the FTL layer and the NAND FLASH layer. That layer would + perform bad block detection and sparing so that FAT works transparently + on top of the NAND. + + Another, less general, option would be support bad blocks within FAT. + + STATUS SUMMARY + -------------- + + 1. PMECC appears to be working in that I can write a NAND block with its + ECC and read the block back and verify that that is are no bit + failures. However, when attempting to work with FAT, it does not + work correctly: The MBR is written and read back correctly, but gets + corrupted later for unknown reasons. + + 2. DMA works (at least with software ECC), but I have seen occasional + failures. I recommend enabling DMA with caution. + + In NuttX, DMA will also cost two context switches (and, hence, four + register state transfers). With smaller NAND page sizes (say 2KiB and + below), I would expect little or no performance improvement with DMA + for this reason. + + 3. NXFFS does not work with NAND. NAND differs from other other FLASH + types several ways. For one thing, NAND requires error correction + (ECC) bytes that must be set in order to work around bit failures. + This affects NXFFS in two ways: + + a. First, write failures are not fatal. Rather, they should be tried by + bad blocks and simply ignored. This is because unrecoverable bit + failures will cause read failures when reading from NAND. Setting + the CONFIG_EXPERIMENTAL+CONFIG_NXFFS_NANDs option will enable this + behavior. + + b. Secondly, NXFFS will write a block many times. It tries to keep + bits in the erased state and assumes that it can overwrite those bits + to change them from the erased to the non-erased state. This works + will with NOR-like FLASH. NAND behaves this way too. But the + problem with NAND is that the ECC bits cannot be re-written in this + way. So once a block has been written, it cannot be modified. This + behavior has NOT been fixed in NXFFS. Currently, NXFFS will attempt + to re-write the ECC bits causing the ECC to become corrupted because + the ECC bits cannot be overwritten without erasing the entire block. + + This may prohibit NXFFS from ever being used with NAND. + + 4. As mentioned above, FAT does work but (1) has some performance issues on + writes and (2) cannot handle bad blocks. + + 5. There was a major reorganization of the SAMA5 code after NuttX-7.11 to + add support for the SAMA5D2. Only the SAMA5D4-EK nsh configuration was + re-verified on 2015-09-29. + +I2C Tool +======== + + I2C Tool. NuttX supports an I2C tool at apps/system/i2c that can be used + to peek and poke I2C devices. That tool can be enabled by setting the + following: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_TWI0=y : Enable TWI0 + CONFIG_SAMA5_TWI1=y : Enable TWI1 + CONFIG_SAMA5_TWI2=y : Enable TWI2 + + System Type -> TWI device driver options + SAMA5_TWI0_FREQUENCY=100000 : Select a TWI0 frequency (default) + SAMA5_TWI1_FREQUENCY=100000 : Select a TWI1 frequency (default) + SAMA5_TWI2_FREQUENCY=100000 : Select a TWI2 frequency (default) + + Device Drivers -> I2C Driver Support + CONFIG_I2C=y : Enable I2C support + + Application Configuration -> NSH Library + CONFIG_SYSTEM_I2CTOOL=y : Enable the I2C tool + CONFIG_I2CTOOL_MINBUS=0 : TWI0 has the minimum bus number 0 + CONFIG_I2CTOOL_MAXBUS=2 : TWI2 has the maximum bus number 2 + CONFIG_I2CTOOL_DEFFREQ=100000 : Pick a consistent frequency + + The I2C tool has extensive help that can be accessed as follows: + + nsh> i2c help + Usage: i2c [arguments] + Where is one of: + + Show help : ? + List busses : bus + List devices : dev [OPTIONS] + Read register : get [OPTIONS] [] + Show help : help + Write register: set [OPTIONS] [] + Verify access : verf [OPTIONS] [] [] + + Where common "sticky" OPTIONS include: + [-a addr] is the I2C device address (hex). Default: 03 Current: 03 + [-b bus] is the I2C bus number (decimal). Default: 0 Current: 0 + [-r regaddr] is the I2C device register address (hex). Default: 00 Current: 00 + [-w width] is the data width (8 or 16 decimal). Default: 8 Current: 8 + [-s|n], send/don't send start between command and data. Default: -n Current: -n + [-i|j], Auto increment|don't increment regaddr on repititions. Default: NO Current: NO + [-f freq] I2C frequency. Default: 100000 Current: 100000 + + NOTES: + o Arguments are "sticky". For example, once the I2C address is + specified, that address will be re-used until it is changed. + + WARNING: + o The I2C dev command may have bad side effects on your I2C devices. + Use only at your own risk. + + As an example, the I2C dev comman can be used to list all devices + responding on TWI0 (the default) like this: + + nsh> i2c dev 0x03 0x77 + 0 1 2 3 4 5 6 7 8 9 a b c d e f + 00: -- -- -- -- -- -- -- -- -- -- -- -- -- + 10: -- -- -- -- -- -- -- -- -- -- -- 1b -- -- -- -- + 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 40: -- -- -- -- -- -- -- -- -- -- -- -- 4c -- -- -- + 50: 50 -- -- -- -- -- -- -- -- -- -- 5b -- -- -- -- + 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 70: -- -- -- -- -- -- -- -- + nsh> + + Addresses 0x1b, 0x4c, and 0x50 are devices on the TM7000 module. + 0x5b is the address of the on-board PMIC chip. + +SAMA5 ADC Support +================= + + Basic driver configuration + -------------------------- + ADC support can be added to the NSH configuration. However, there are no + ADC input pins available to the user for ADC testing (the touchscreen ADC + inputs are intended for other functionality). Because of this, there is + not much motivation to enable ADC support on the SAMA4D4-EK. This + paragraph is included here, however, for people using a custom SAMA5D4x + board that requires ADC support. + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_ADC=y : Enable ADC driver support + CONFIG_SAMA5_TC0=y : Enable the Timer/counter library need for periodic sampling + + Drivers + CONFIG_ANALOG=y : Should be automatically selected + CONFIG_ADC=y : Should be automatically selected + + System Type -> ADC Configuration + CONFIG_SAMA5_ADC_CHAN0=y : These settings enable the sequencer to collect + CONFIG_SAMA5_ADC_CHAN1=y : Samples from ADC channels 0-3 on each trigger + CONFIG_SAMA5_ADC_CHAN2=y + CONFIG_SAMA5_ADC_CHAN3=y + CONFIG_SAMA5_ADC_SEQUENCER=y + + CONFIG_SAMA5_ADC_TIOA0TRIG=y : Trigger on the TC0, channel 0 output A + CONFIG_SAMA5_ADC_TIOAFREQ=2 : At a frequency of 2Hz + CONFIG_SAMA5_ADC_TIOA_RISING=y : Trigger on the rising edge + + Default ADC settings (like gain and offset) may also be set if desired. + + System Type -> Timer/counter Configuration + CONFIG_SAMA5_TC0_TIOA0=y : Should be automatically selected + + Work queue supported is also needed: + + Library routines + CONFIG_SCHED_WORKQUEUE=y + + ADC Test Example + ---------------- + For testing purposes, there is an ADC program at apps/examples/adc that + will collect a specified number of samples. This test program can be + enabled as follows: + + Application Configuration -> Examples -> ADC example + CONFIG_EXAMPLES_ADC=y : Enables the example code + CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0" + + Other default settings for the ADC example should be okay. + + ADC DMA Support + --------------- + At 2Hz, DMA is not necessary nor desire-able. The ADC driver has support + for DMA transfers of converted data (although that support has not been + tested as of this writing). DMA support can be added by include the + following in the configuration. + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_DMAC1=y : Enable DMAC1 support + + System Type -> ADC Configuration + CONFIG_SAMA5_ADC_DMA=y : Enable ADC DMA transfers + CONFIG_SAMA5_ADC_DMASAMPLES=2 : Collect two sets of samples per DMA + + Drivers -> Analog device (ADC/DAC) support + CONFIG_ADC_FIFOSIZE=16 : Driver may need a large ring buffer + + Application Configuration -> Examples -> ADC example + CONFIG_EXAMPLES_ADC_GROUPSIZE=16 : Larger buffers in the test + +SAMA5 PWM Support +================= + + Basic driver configuration + -------------------------- + PWM support can be added to the NSH configuration. However, there are no + PWM output pins available to the user for PWM testing. Because of this, + there is not much motivation to enable PWM support on the SAMA4D4-EK. This + paragraph is included here, however, for people using a custom SAMA5D4x + board that requires PWM support. + + Basic driver configuration: + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_PWM=y : Enable PWM driver support + + Drivers + CONFIG_PWM=y : Should be automatically selected + + PWM Channel/Output Selection + ---------------------------- + In order to use the PWM, you must enable one or more PWM Channels: + + System Type -> PWM Configuration + CONFIG_SAMA5_PWM_CHAN0=y : Enable one or more of channels 0-3 + CONFIG_SAMA5_PWM_CHAN1=y + CONFIG_SAMA5_PWM_CHAN2=y + CONFIG_SAMA5_PWM_CHAN3=y + + For each channel that is enabled, you must also specify the output pins + to be enabled and the clocking supplied to the PWM channel. + + CONFIG_SAMA5_PWM_CHANx_FAULTINPUT=n : (not used currently) + CONFIG_SAMA5_PWM_CHANx_OUTPUTH=y : Enable One of both of the H and L output pins + CONFIG_SAMA5_PWM_CHANx_OUTPUTL=y + + Where x=0..3. + + Care must be taken because all PWM output pins conflict with some other + usage of the pin by other devices. Furthermore, many of these pins have + not been brought out to an external connector: + + -----+---+---+----+------+---------------- + PWM PIN PER PIO I/O CONFLICTS + -----+---+---+----+------+---------------- + PWM0 FI B PC28 J2.30 SPI1, ISI + H B PB0 --- GMAC + B PA20 J1.14 LCDC, ISI + L B PB1 --- GMAC + B PA21 J1.16 LCDC, ISI + -----+---+---+----+------+---------------- + PWM1 FI B PC31 J2.36 HDMI + H B PB4 --- GMAC + B PA22 J1.18 LCDC, ISI + L B PB5 --- GMAC + B PE31 J3.20 ISI, HDMI + B PA23 J1.20 LCDC, ISI + -----+---+---+----+------+---------------- + PWM2 FI B PC29 J2.29 UART0, ISI, HDMI + H C PD5 --- HSMCI0 + B PB8 --- GMAC + L C PD6 --- HSMCI0 + B PB9 --- GMAC + -----+---+---+----+------+---------------- + PWM3 FI C PD16 --- SPI0, Audio + H C PD7 --- HSMCI0 + B PB12 J3.7 GMAC + L C PD8 --- HSMCI0 + B PB13 --- GMAC + -----+---+---+----+-------------------- + + See configs/sama5d4-ek/include/board.h for all of the default PWM + pin selections. I used PWM channel 0, pins PA20 and PA21 for testing. + + Clocking is addressed in the next paragraph. + + PWM Clock Configuration + ----------------------- + PWM Channels can be clocked from either a coarsely divided divided down + MCK or from a custom frequency from PWM CLKA and/or CLKB. If you want + to use CLKA or CLKB, you must enable and configure them. + + System Type -> PWM Configuration + CONFIG_SAMA5_PWM_CLKA=y + CONFIG_SAMA5_PWM_CLKA_FREQUENCY=3300 + CONFIG_SAMA5_PWM_CLKB=y + CONFIG_SAMA5_PWM_CLKB_FREQUENCY=3300 + + Then for each of the enabled, channels you must select the input clock + for that channel: + + System Type -> PWM Configuration + CONFIG_SAMA5_PWM_CHANx_CLKA=y : Pick one of MCK, CLKA, or CLKB (only) + CONFIG_SAMA5_PWM_CHANx_CLKB=y + CONFIG_SAMA5_PWM_CHANx_MCK=y + CONFIG_SAMA5_PWM_CHANx_MCKDIV=128 : If MCK is selected, then the MCK divider must + : also be provided (1,2,4,8,16,32,64,128,256,512, or 1024). + + PWM Test Example + ---------------- + For testing purposes, there is an PWM program at apps/examples/pwm that + will collect a specified number of samples. This test program can be + enabled as follows: + + Application Configuration -> Examples -> PWM example + CONFIG_EXAMPLES_PWM=y : Enables the example code + + Other default settings for the PWM example should be okay. + + CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm0" + CONFIG_EXAMPLES_PWM_FREQUENCY=100 + + Usage of the example is straightforward: + + nsh> pwm -h + Usage: pwm [OPTIONS] + + Arguments are "sticky". For example, once the PWM frequency is + specified, that frequency will be re-used until it is changed. + + "sticky" OPTIONS include: + [-p devpath] selects the PWM device. Default: /dev/pwm0 Current: /dev/pwm0 + [-f frequency] selects the pulse frequency. Default: 100 Hz Current: 100 Hz + [-d duty] selects the pulse duty as a percentage. Default: 50 % Current: 50 % + [-t duration] is the duration of the pulse train in seconds. Default: 5 Current: 5 + [-h] shows this message and exits + +RTC +=== + + The Real Time Clock/Calendar RTC) may be enabled with these settings: + + System Type: + CONFIG_SAMA5_RTC=y : Enable the RTC driver + + Drivers (these values will be selected automatically): + CONFIG_RTC=y : Use the RTC for system time + CONFIG_RTC_DATETIME=y : RTC supports data/time + + NOTE: If you want the RTC to preserve time over power cycles, you will + need to install a battery in the battery holder (J12) and close the jumper, + JP13. + + You can set the RTC using the NSH date command: + + NuttShell (NSH) NuttX-7.3 + nsh> help date + date usage: date [-s "MMM DD HH:MM:SS YYYY"] + nsh> date + Jan 01 00:34:45 2012 + nsh> date -s "JUN 29 7:30:00 2014" + nsh> date + Jun 29 07:30:01 2014 + + After a power cycle and reboot: + + NuttShell (NSH) NuttX-7.3 + nsh> date + Jun 29 07:30:55 2014 + nsh> + + The RTC also supports an alarm that may be enable with the following + settings. However, there is nothing in the system that currently makes + use of this alarm. + + Drivers: + CONFIG_RTC_ALARM=y : Enable the RTC alarm + + Library Routines + CONFIG_SCHED_WORKQUEUE=y : Alarm needs work queue support + +Watchdog Timer +============== + + NSH can be configured to exercise the watchdog timer test + (apps/examples/watchdog). This can be selected with the following + settings in the NuttX configuration file: + + System Type: + CONFIG_SAMA5_WDT=y : Enable the WDT peripheral + : Defaults values for others settings + should be OK + + Drivers (this will automatically be selected): + CONFIG_WATCHDOG=y : Enables watchdog timer driver support + + Application Configuration -> Examples + CONFIG_EXAMPLES_WATCHDOG=y : Enable apps/examples/watchdog + + The WDT timer is driven off the slow, 32768Hz clock divided by 128. As a + result, the watchdog a maximum timeout value of 16 seconds. The SAMA5 WDT + may also only be programmed one time; the processor must be reset before + the WDT can be reprogrammed. + + The SAMA5 always boots with the watchdog timer enabled at its maximum + timeout (16 seconds). In the normal case where no watchdog timer driver + has been configured, the watchdog timer is disabled as part of the start + up logic. But, since we are permitted only one opportunity to program + the WDT, we cannot disable the watchdog time if CONFIG_SAMA5_WDT=y. So, + be forewarned: You have only 16 seconds to run your watchdog timer test! + + NOTE: If you are using the dramboot program to run from DRAM as I did, + beware that the default version also disables the watchdog. You will + need a special version of dramboot with CONFIG_SAMA5_WDT=y. + +TRNG and /dev/random +==================== + + NSH can be configured to enable the SAMA5 TRNG peripheral so that it + provides /dev/random. The following configuration will enable the TRNG, + and support for /dev/random: + + System Type: + CONFIG_SAMA5_TRNG=y : Enable the TRNG peripheral + + Drivers: + CONFIG_DEV_RANDOM=y : Enable /dev/random + + A simple test of /dev/random is available at apps/examples/random and + can be enabled as a NSH application via the following additional + configuration settings: + + Applications -> Examples + CONFIG_EXAMPLES_RANDOM=y : Enable apps/examples/random + CONFIG_EXAMPLES_MAXSAMPLES=64 : Default settings are probably OK + CONFIG_EXAMPLES_NSAMPLES=8 + +Audio Support +============== + + WM8904 CODEC + ------------ + The SAMA4D4-EK has two devices on-board that can be used for verification + of I2S functionality: HDMI and a WM8904 audio CODEC. As of this writing, + the I2S driver is present, but there are not drivers for either the HDMI + or the WM8904. + + WM8904 Audio CODEC Interface: + ---- ------------------ ---------------- ------------- --------------------------------------- + PIO USAGE BOARD SIGNAL WM8904 PIN NOTE + ---- ------------------ ---------------- ------------- --------------------------------------- + PA30 TWD0 AUDIO_TWD0_PA30 3 SDA Pulled up, See JP23 note below + PA31 TWCK0 AUDIO_TWCK0_PA31 2 SCLK Pulled up + PB10 AUDIO_PCK2/EXP AUDIO_PCK2_PB10 28 MCLK + PB27 AUDIO/HDMI_TK0/EXP AUDIO_TK0_PB27 29 BCLK/GPIO4 Note TK0 and RK0 are mutually exclusive + PB26 AUDIO_RK0 AUDIO_RK0_PB26 29 " "/" " " " " " " " " " " " " " " " + PB30 AUDIO_RF/ZIG_TWCK2 AUDIO_RF0_PB30 30 LRCLK Note TF0 and RF0 are mutually exclusive + PB31 AUDIO/HDMI_TF0/EXP AUDIO_TF0_PB31 30 " " " " " " " " " " " " " " " " + PB29 AUDIO_RD0/ZIG_TWD2 AUDIO_RD0_PB29 31 ADCDAT + PB28 AUDIO/HDMI_TD0/EXP AUDIO_TD0_PB28 32 ACDAT + PE4 AUDIO_IRQ AUDIO_IRQ_PE4 1 IRQ/GPIO1 Audio interrupt + ---- ------------------ ---------------- ------------- --------------------------------------- + Note that jumper JP23 must be closed to connect AUDIO_TWD0_PA30 (Rev C. only) + + WM8904 Configuration + -------------------- + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_XDMAC0=y : XDMAC0 required by SSC0 + CONFIG_SAMA5_TWI0=y : Enable TWI0 driver support + CONFIG_SAMA5_SSCO=y : Enable SSC0 driver support + + System Type -> SSC0 Configuration + CONFIG_SAMA5D4_MB_REVE=y : No WM8904 for Rev C version of the board + CONFIG_SAMA5_SSC_MAXINFLIGHT=16 + CONFIG_SAMA5_SSC0_DATALEN=16 + + Device Drivers -> I2C Driver Support + CONFIG_I2C=y : Enable I2C support + CONFIG_I2C_RESET=n : (Maybe y, if you have bus problems) + + System Type -> SSC Configuration + CONFIG_SAMA5_SSC_MAXINFLIGHT=16 : Up to 16 pending DMA transfers + CONFIG_SAMA5_SSC0_DATALEN=16 : 16-bit data + CONFIG_SAMA5_SSC0_RX=y : Support a receiver (although it is not used!) + CONFIG_SAMA5_SSC0_RX_RKINPUT=y : Receiver gets clock the RK0 input + CONFIG_SAMA5_SSC0_RX_FSLEN=1 : Minimal frame sync length + CONFIG_SAMA5_SSC0_RX_STTDLY=1 : Start delay + CONFIG_SAMA5_SSC0_TX=y : Support a transmitter + CONFIG_SAMA5_SSC0_TX_RXCLK=y : Transmitter gets clock the RXCLCK + CONFIG_SAMA5_SSC0_TX_FSLEN=0 : Disable frame synch generation + CONFIG_SAMA5_SSC0_TX_STTDLY=1 : Start delay + CONFIG_SAMA5_SSC0_TX_TKOUTPUT_NONE=y : No output + + Audio Support + CONFIG_AUDIO=y : Audio support needed + CONFIG_AUDIO_FORMAT_PCM=y : Only PCM files are supported + CONFIG_AUDIO_NUM_BUFFERS=8 : Number of audio buffers + CONFIG_AUDIO_BUFFER_NUMBYTES=8192 : Audio buffer size + + Drivers -> Audio + CONFIG_I2S=y : General I2S support + CONFIG_AUDIO_DEVICES=y : Audio device support + CONFIG_AUDIO_WM8904=y : Build WM8904 driver character driver + + Board Selection + CONFIG_SAMA5D4EK_WM8904_I2CFREQUENCY=400000 + CONFIG_SAMA5D4EK_WM8904_SRCMAIN=y : WM8904 MCLK is the SAMA5D Main Clock + + Library Routines + CONFIG_SCHED_WORKQUEUE=y : MW8904 driver needs work queue support + + I2S Loopback Test + ----------------- + + The I2S driver was verified using a special I2C character driver (at + nuttx/drivers/audio/i2schar.c) and a test driver at apps/examples/i2schar. + The I2S driver was verified in loopback mode with no audio device. That + test case has never been exercised on the SAMA454-EK. See the README.txt + file at SAMA5D4-EK for information about how you might implement this test + for the SAMA5D4-EK. + + The NxPlayer + ------------ + + The NxPlayer is a audio library and command line application for playing + audio file. The NxPlayer can be found at apps/system/nxplayer. If you + would like to add the NxPlayer, here are some recommended configuration + settings. + + First of all, the NxPlayer depends on the NuttX audio subsystem. See the + "WM8904 Configuration" above for an example of how the audio subsystem is + configured to use the WM8904 CODED with PCM decoding. Or, for testing + purposes, here is how might want to configure NULL, do-nothing audio + device: + + Audio Support -> + CONFIG_AUDIO=y + CONFIG_AUDIO_NUM_BUFFERS=4 + CONFIG_AUDIO_BUFFER_NUMBYTES=8192 + CONFIG_AUDIO_FORMAT_PCM=y + + CONFIG_AUDIO_NULL=y + CONFIG_AUDIO_NULL_BUFFER_SIZE=8192 + CONFIG_AUDIO_NULL_MSG_PRIO=1 + CONFIG_AUDIO_NULL_WORKER_STACKSIZE=768 + + Then the NxPlayer can be enabled as follows: + + System Libraries and NSH Add-Ons -> NxPlayer media player / command line -> + CONFIG_SYSTEM_NXPLAYER=y : Build the NxPlayer library + CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500 : Size of the audio player stack + CONFIG_NXPLAYER_COMMAND_LINE=y : Build command line application + CONFIG_NXPLAYER_INCLUDE_HELP=y : Includes a help command + CONFIG_NXPLAYER_INCLUDE_DEVICE_SEARCH=n : (Since there is only one audio device) + CONFIG_NXPLAYER_INCLUDE_PREFERRED_DEVICE=y : Only one audio device is supported + CONFIG_NXPLAYER_FMT_FROM_EXT=y : (Since only PCM is supported) + CONFIG_NXPLAYER_FMT_FROM_HEADER=n : (Since only PCM is supported) + CONFIG_NXPLAYER_INCLUDE_MEDIADIR=y : Specify a media directory + CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/mnt/sdcard" : See below + CONFIG_NXPLAYER_RECURSIVE_MEDIA_SEARCH=y : Search all sub-directories + CONFIG_NXPLAYER_INCLUDE_SYSTEM_RESET=y : Add support for reset command + + You must include the full path to the location where NxPlayer can find the + media files. That path is given by CONFIG_NXPLAYER_DEFAULT_MEDIADIR. + Here I use the example "/mnt/scard". That is a location where you could, + for example, mount an MMC/SD card driver. + +TM7000 LCD/Touchscreen +====================== + + The TM7000 LCD is available for the SAMA5D4-EK. See documentation + available on the Precision Design Associates website: + http://www.pdaatl.com/doc/tm7000.pdf + + The TM7000 features: + + - 7 inch LCD at 800x480 18-bit RGB resolution and white backlight + - Projected Capacitive Multi-Touch Controller based on the Atmel + MXT768E maXTouch™ IC + - 4 Capacitive “Navigation” Keys available via an Atmel AT42QT1070 + QTouch™ Button Sensor IC + - 200 bytes of non-volatile serial EEPROM + + NOTE: It appears that my TM7000 differs slightly from the version + described in the tm7000.pdf file: That document claims that the + hardware interface to the LCD is 18-bit RGB666; but the one that + I have is certainly 24-bit RGB888. If you have LCD issues, you may + need to tweak some of the settings in configs/sama5d4-ek/include/board.h. + + Jumper JP2 selects either the EMAC1 or the LCD by controlling the + the LCD_ETH1_CONFIG signal on the board. + + - JP2 open, LCD_ETH1_CONFIG pulled high: + + LCD_ETH1_CONFIG=1: LCD 5v enable(LCD_DETECT#=0); ETH1 disable + + - JP2 closed, LCD_ETH1_CONFIG grounded: + + LCD_ETH1_CONFIG=0: LCD 5v disable; ETH1 enable + + LCD Connector + ------------- + + ------------------------- ----------------------- -------- + SAMA5D4-EK TM7000 FUNCTION + ------------------------- ----------------------- -------- + LCD_PE24 J9 pin 5 ~MXT_CHG J4 pin 5 MXT + LCD_PE25 J9 pin 6 ~QT_CHG J4 pin 6 QT + LCD_TWCK0_PA31 J9 pin 7 I2C SCL J4 pin 7 MXT,QT + LCD_TWD0_PA30 J9 pin 8 I2C SDA J4 pin 8 MXT,QT + LCD_DAT0_PA0 J9 pin 18 LCD_DATA_0 J4 pin 18 LCD + LCD_DAT1_PA1 J9 pin 19 LCD_DATA_1 J4 pin 19 LCD + LCD_DAT2_PA2 J9 pin 20 LCD_DATA_2 J4 pin 20 LCD + LCD_DAT3_PA3 J9 pin 21 LCD_DATA_3 J4 pin 21 LCD + LCD_DAT4_PA4 J9 pin 22 LCD_DATA_4 J4 pin 22 LCD + LCD_DAT3_PA5 J9 pin 23 LCD_DATA_5 J4 pin 23 LCD + LCD_DAT6_PA6 J9 pin 24 LCD_DATA_6 J4 pin 24 LCD + LCD_DAT7_PA7 J9 pin 25 LCD_DATA_7 J4 pin 25 LCD + LCD_DAT8_PA8 J9 pin 26 LCD_DATA_8 J4 pin 26 LCD + LCD_DAT9_PA9 J9 pin 27 LCD_DATA_9 J4 pin 27 LCD + LCD_DAT10_PA10 J9 pin 28 LCD_DATA_10 J4 pin 28 LCD + LCD_DAT11_PA11 J9 pin 29 LCD_DATA_11 J4 pin 29 LCD + LCD_DAT12_PA12 J9 pin 16 LCD_DATA_12 J4 pin 16 LCD + LCD_DAT13_PA13 J9 pin 12 LCD_DATA_13 J4 pin 12 LCD + LCD_DAT14_PA14 J9 pin 14 LCD_DATA_14 J4 pin 14 LCD + LCD_DAT15_PA15 J9 pin 10 LCD_DATA_15 J4 pin 10 LCD + ------------------------- ----------------------- -------- + LCD_DAT16_PA16 J10 pin 5 LCD_DATA_16 J5 pin 5 LCD + LCD_DAT17_PA17 J10 pin 6 LCD_DATA_17 J5 pin 6 LCD + LCD_DAT18_PA18 J10 pin 7 LCD_DATA_18 J5 pin 7 LCD + LCD_DAT19_PA19 J10 pin 8 LCD_DATA_19 J5 pin 8 LCD + LCD_DAT20_PA20 J10 pin 9 LCD_DATA_20 J5 pin 9 LCD + LCD_DAT21_PA21 J10 pin 10 LCD_DATA_21 J5 pin 10 LCD + LCD_DAT22_PA22 J10 pin 11 LCD_DATA_22 J5 pin 11 LCD + LCD_DAT23_PA23 J10 pin 12 LCD_DATA_23 J5 pin 12 LCD + LCD_DISP_PA25 J10 pin 15 DISP J5 pin 15 LCD (Display Enable) + LCD_PWM_PA24 J10 pin 16 Backlight PWM J5 pin 16 LCD + LCD_VSYNC_PA26 J10 pin 17 VSYNC J5 pin 17 LCD + LCD_HSYNC_PA27 J10 pin 18 HSYNC J5 pin 18 LCD + LCD_DEN_PA29 J10 pin 19 DE J5 pin 19 LCD + LCD_PCK_PA28 J10 pin 20 PCLK J5 pin 20 LCD + AD0_XP J10 pin 23 N/C J5 pin 23 N/A + AD1_XM J10 pin 24 N/C J5 pin 24 N/A + AD2_YP J10 pin 25 N/C J5 pin 25 N/A + AD3_YM J10 pin 26 N/C J5 pin 26 N/A + AD4_LR J10 pin 27 N/C J5 pin 27 N/A + 1Wire_PE28 J10 pin 28 1-Wire J5 pin 28 EE + LCD_SPI1_SO J10 pin 31 N/C J5 pin 31 N/A + LCD_SPI1_SI J10 pin 32 N/C J5 pin 32 N/A + LCD_SPI1_CLK J10 pin 33 N/C J5 pin 33 N/A + LCD_SPI1_CS2 J10 pin 34 N/C J5 pin 34 N/A + EN_PWRLCD J10 pin 35 N/C J5 pin 35 N/A + LCD_DETECT# J10 pin 36 LCD Presence J5 pin 36 All + RXD4_PE26 J10 pin 37 N/C J5 pin 37 N/A + XD4_PE27 J10 pin 38 N/C J5 pin 38 N/A + ------------------------- ----------------------- -------- + + LCD Configuration + ----------------- + + Here is a configuration that enables the LCD with backlight in RGB565 + color mode. Notice that this configuration sets up an LCD framebuffer of + size 6,291,456 (0x0060:0000, 6MiB) at the end of DRAM. DRAM begins at + address 0x2000:0000 and has size 268,435,456 (0x1000:0000); The + framebuffer the begins at 0x2000:0000 + 0x1000:0000 - 0x0060:0000 = + 0x2fa0:0000. + + System Type -> SAMA5 Peripheral Support -> + CONFIG_SAMA5_LCDC=y : Enable LCDC + + System Type -> LCDC Configuration -> + CONFIG_SAMA5_LCDC_BACKLIGHT=y : With backlight + CONFIG_SAMA5_LCDC_DEFBACKLIGHT=0xc8 + CONFIG_SAMA5_LCDC_BACKCOLOR=0x7b5d : Color to use when clearing the display + CONFIG_SAMA5_LCDC_FB_VBASE=0x2fa00000 : Set aside the framebuffer + CONFIG_SAMA5_LCDC_FB_PBASE=0x2fa00000 + CONFIG_SAMA5_LCDC_FB_SIZE=6291456 + CONFIG_SAMA5_LCDC_BASE_ROT0=y : No rotation + CONFIG_SAMA5_LCDC_BASE_RGB565=y : RGB565 color format + + This framebuffer size must then be subtracted from the memory available in the + heap (0x3000:0000 - 0x0058:0000 = 0x2fa8:0000): + + System Type -> Heap Configuration -> + CONFIG_SAMA5_DDRCS_RESERVE=y : Reserve DRAM for the framebuffer + CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000 : End of DRAM heap (excludes framebuffer) + + There are several simple graphics examples under apps/examples/ that can + be use to verify the LCD: nx, nxhello, nximage, nxlines, nxtext. See + apps/examples/README.txt for information about configuring these examples. + + For example, these settings will enable the apps/examples/nx example. The + NX example is a simple test using the NuttX graphics system (NX). This + test case focuses on general window controls, movement, mouse and keyboard + input. It requires no user interaction. + + First you need to enable NuttX graphics support: + + Graphics Support -> + CONFIG_NX=y : Enable NX graphics + CONFIG_NX_NPLANES=1 : 1 color plane + CONFIG_NX_PACKEDMSFIRST=y + + Graphics Support -> Supported Pixel Depths -> + CONFIG_NX_DISABLE_1BPP=y : Disable all resolutions except 16 bpp + CONFIG_NX_DISABLE_2BPP=y + CONFIG_NX_DISABLE_4BPP=y + CONFIG_NX_DISABLE_8BPP=y + CONFIG_NX_DISABLE_24BPP=y + CONFIG_NX_DISABLE_32BPP=y + + Graphics Support -> Input Devices -> + CONFIG_NX_XYINPUT=y : Build in mouse/touchscreen support (not used) + CONFIG_NX_KBD=y : Build in keyboard support (not used) + + Graphics Support -> Framed Window Borders -> + CONFIG_NXTK_BORDERWIDTH=4 : Framed window configuration + CONFIG_NXTK_DEFAULT_BORDERCOLORS=y + + Graphics Support -> Font Selections -> + CONFIG_NXFONTS_CHARBITS=7 : Font configuration + CONFIG_NXFONT_SERIF22X28B=y + + Then you can enable the NX example: + + Application Configuration -> Examples -> NX graphics example + CONFIG_EXAMPLES_NX=y : Enable the NX example + CONFIG_EXAMPLES_NX_VPLANE=0 : Use color plane 0 + CONFIG_EXAMPLES_NX_DEVNO=0 : Use device zero + CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y : Use default colors + CONFIG_EXAMPLES_NX_DEFAULT_FONT=y : Use default fonts + CONFIG_EXAMPLES_NX_BPP=16 : Use 16 bpp + CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 : Configure toolbar + + maXTouch + -------- + Both the MXT768E and the AT42QT1070 are I2C devices with interrupting + PIO pins: + + ------------------------ ----------------- + SAMA5D4-EK TM7000 + ------------------------ ----------------- + J9 pin 5 LCD_PE24 J4 pin 5 ~CHG_mxt + J9 pin 6 LCD_PE25 J4 pin 6 ~CHG_QT + J9 pin 7 LCD_TWCK0_PA31 J4 pin 7 SCL_0 + J9 pin 8 LCD_TWD0_PA30 J4 pin 8 SDA_0 + ------------------------ ----------------- + + The schematic indicates the the MXT468E address is 0x4c/0x4d. + + Here are the configuration settings the configuration settings that will + enable the maXTouch touchscreen controller: + + System Type + CONFIG_SAMA5_TWI0=y : Enable the TWI0 peripheral + CONFIG_SAMA5_PIO_IRQ=y : Support for PIOE interrupts + CONFIG_SAMA5_PIOE_IRQ=y + + Device Drivers + CONFIG_INPUT=y : Input device support + CONFIG_INPUT_MXT=y : Enable maXTouch input device + + Optionally, use CONFIG_ARCH_HAVE_I2CRESET=y if you have issues + with other I2C devices on board locking up the I2C bus. + + Board Configuration + CONFIG_SAMA5D4EK_MXT_DEVMINOR=0 + CONFIG_SAMA5D4EK_MXT_I2CFREQUENCY=100000 + + There is a test at apps/examples/touchscreen that can be enabled to + build in a touchscreen test: + + CONFIG_EXAMPLES_TOUCHSCREEN=y + CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y + CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0" + CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0 + + Usage is like: + + nsh> tc [] + + QTouch Button Sensor + -------------------- + To be provided. + + LCD + --- + To be provided. + +Tickless OS +=========== + + Background + ---------- + By default, a NuttX configuration uses a periodic timer interrupt that + drives all system timing. The timer is provided by architecture-specific + code that calls into NuttX at a rate controlled by CONFIG_USEC_PER_TICK. + The default value of CONFIG_USEC_PER_TICK is 10000 microseconds which + corresponds to a timer interrupt rate of 100 Hz. + + An option is to configure NuttX to operation in a "tickless" mode. Some + limitations of default system timer are, in increasing order of + importance: + + - Overhead: Although the CPU usage of the system timer interrupt at 100Hz + is really very low, it is still mostly wasted processing time. One most + timer interrupts, there is really nothing that needs be done other than + incrementing the counter. + - Resolution: Resolution of all system timing is also determined by + CONFIG_USEC_PER_TICK. So nothing that be time with resolution finer than + 10 milliseconds be default. To increase this resolution, + CONFIG_USEC_PER_TICK an be reduced. However, then the system timer + interrupts use more of the CPU bandwidth processing useless interrupts. + - Power Usage: But the biggest issue is power usage. When the system is + IDLE, it enters a light, low-power mode (for ARMs, this mode is entered + with the wfi or wfe instructions for example). But each interrupt + awakens the system from this low power mode. Therefore, higher rates + of interrupts cause greater power consumption. + + The so-called Tickless OS provides one solution to issue. The basic + concept here is that the periodic, timer interrupt is eliminated and + replaced with a one-shot, interval timer. It becomes event driven + instead of polled: The default system timer is a polled design. On + each interrupt, the NuttX logic checks if it needs to do anything + and, if so, it does it. + + Using an interval timer, one can anticipate when the next interesting + OS event will occur, program the interval time and wait for it to fire. + When the interval time fires, then the scheduled activity is performed. + + Configuration + ------------- + The following configuration options will enable support for the Tickless + OS for the SAMA5D platforms using TC0 channels 0-3 (other timers or + timer channels could be used making the obvious substitutions): + + RTOS Features -> Clocks and Timers + CONFIG_SCHED_TICKLESS=y : Configures the RTOS in tickless mode + CONFIG_SCHED_TICKLESS_ALARM=n : (option not implemented) + + System Type -> SAMA5 Peripheral Support + CONFIG_SAMA5_TC0=y : Enable TC0 (TC channels 0-3 + + System Type -> Timer/counter Configuration + CONFIG_SAMA5_ONESHOT=y : Enables one-shot timer wrapper + CONFIG_SAMA5_FREERUN=y : Enabled free-running timer wrapper + CONFIG_SAMA5_TICKLESS_ONESHOT=0 : Selects TC0 channel 0 for the one-shot + CONFIG_SAMA5_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free- + : running timer + + The resolution of the clock is provided by the CONFIG_USEC_PER_TICK + setting in the configuration file. + + NOTE: In most cases, the slow clock will be used as the timer/counter + input. You should enable the 32.768KHz crystal for the slow clock by + calling sam_sckc_enable(). Otherwise, you will be doing all system + timing using the RC clock! UPDATE: This will now be selected by default + when you configure for TICKLESS support. + + The slow clock has a resolution of about 30.518 microseconds. Ideally, + the value of CONFIG_USEC_PER_TICK should be the exact clock resolution. + Otherwise there will be cumulative timing inaccuracies. But a choice + choice of: + + CONFIG_USEC_PER_TICK=31 + + will have an error of 0.6% and will have inaccuracies that will + effect the time due to long term error build-up. + + UPDATE: As of this writing (2015-12-03), the Tickless support is + functional. However, there are inaccuracies in delays. For example, + + nsh> sleep 10 + + results in a delay of maybe 5.4 seconds. But the timing accuracy is + correct if all competing uses of the interval timer are disabled (mostly + from the high priority work queue). Therefore, I conclude that this + inaccuracy is due to the inaccuracies in the representation of the clock + rate. 30.518 usec cannot be represented accurately. Each timing + calculation results in a small error. When the interval timer is very + busy, long delays will be divided into many small pieces and each small + piece has a large error in the calculation. The cumulative error is the + cause of the problem. + + SAMA5 Timer Usage + ----------------- + This current implementation uses two timers: A one-shot timer to + provide the timed events and a free running timer to provide the current + time. Since timers are a limited resource, that could be an issue on + some systems. + + We could do the job with a single timer if we were to keep the single + timer in a free-running at all times. The SAMA5 timer/counters have + 32-bit counters with the capability to generate a compare interrupt when + the timer matches a compare value but also to continue counting without + stopping (giving another, different interrupt when the timer rolls over + from 0xffffffff to zero). So we could potentially just set the compare + at the number of ticks you want PLUS the current value of timer. Then + you could have both with a single timer: An interval timer and a free- + running counter with the same timer! In this case, you would want to + to set CONFIG_SCHED_TICKLESS_ALARM in the NuttX configuration. + + Patches are welcome! + +SAMA4D4-EK Configuration Options +================================= + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH="arm" + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXA5=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="sama5" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_SAMA5=y + CONFIG_ARCH_CHIP_ATSAMA5D44=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD="sama5d4-ek" (for the SAMA4D4-EK development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SAMA5D4_EK=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x0002000 (128Kb) + + CONFIG_RAM_START - The physical start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_RAM_VSTART - The virtual start address of installed DRAM + + CONFIG_RAM_VSTART=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibrate + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_SAMA5_DBGU - Debug Unit + CONFIG_SAMA5_PIT - Periodic Interval Timer + CONFIG_SAMA5_WDT - Watchdog timer + CONFIG_SAMA5_HSMC - Multi-bit ECC + CONFIG_SAMA5_SMD - SMD Soft Modem + CONFIG_SAMA5_USART0 - USART 0 + CONFIG_SAMA5_USART1 - USART 1 + CONFIG_SAMA5_USART2 - USART 2 + CONFIG_SAMA5_USART3 - USART 3 + CONFIG_SAMA5_UART0 - UART 0 + CONFIG_SAMA5_UART1 - UART 1 + CONFIG_SAMA5_TWI0 - Two-Wire Interface 0 + CONFIG_SAMA5_TWI1 - Two-Wire Interface 1 + CONFIG_SAMA5_TWI2 - Two-Wire Interface 2 + CONFIG_SAMA5_HSMCI0 - High Speed Multimedia Card Interface 0 + CONFIG_SAMA5_HSMCI1 - High Speed Multimedia Card Interface 1 + CONFIG_SAMA5_SPI0 - Serial Peripheral Interface 0 + CONFIG_SAMA5_SPI1 - Serial Peripheral Interface 1 + CONFIG_SAMA5_TC0 - Timer Counter 0 (ch. 0, 1, 2) + CONFIG_SAMA5_TC1 - Timer Counter 1 (ch. 3, 4, 5) + CONFIG_SAMA5_PWM - Pulse Width Modulation Controller + CONFIG_SAMA5_ADC - Touch Screen ADC Controller + CONFIG_SAMA5_XDMAC0 - XDMA Controller 0 + CONFIG_SAMA5_XDMAC1 - XDMA Controller 1 + CONFIG_SAMA5_UHPHS - USB Host High Speed + CONFIG_SAMA5_UDPHS - USB Device High Speed + CONFIG_SAMA5_EMAC0 - Ethernet MAC 0 (GMAC0) + CONFIG_SAMA5_EMAC1 - Ethernet MAC 1 (GMAC1) + CONFIG_SAMA5_LCDC - LCD Controller + CONFIG_SAMA5_ISI - Image Sensor Interface + CONFIG_SAMA5_SSC0 - Synchronous Serial Controller 0 + CONFIG_SAMA5_SSC1 - Synchronous Serial Controller 1 + CONFIG_SAMA5_SHA - Secure Hash Algorithm + CONFIG_SAMA5_AES - Advanced Encryption Standard + CONFIG_SAMA5_TDES - Triple Data Encryption Standard + CONFIG_SAMA5_TRNG - True Random Number Generator + CONFIG_SAMA5_ARM - Performance Monitor Unit + CONFIG_SAMA5_FUSE - Fuse Controller + CONFIG_SAMA5_MPDDRC - MPDDR controller + + Some subsystems can be configured to operate in different ways. The drivers + need to know how to configure the subsystem. + + CONFIG_SAMA5_PIOA_IRQ - Support PIOA interrupts + CONFIG_SAMA5_PIOB_IRQ - Support PIOB interrupts + CONFIG_SAMA5_PIOC_IRQ - Support PIOD interrupts + CONFIG_SAMA5_PIOD_IRQ - Support PIOD interrupts + CONFIG_SAMA5_PIOE_IRQ - Support PIOE interrupts + + CONFIG_USART0_ISUART - USART0 is configured as a UART + CONFIG_USART1_ISUART - USART1 is configured as a UART + CONFIG_USART2_ISUART - USART2 is configured as a UART + CONFIG_USART3_ISUART - USART3 is configured as a UART + + AT91SAMA5 specific device driver settings + + CONFIG_SAMA5_DBGU_SERIAL_CONSOLE - selects the DBGU + for the console and ttyDBGU + CONFIG_SAMA5_DBGU_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_SAMA5_DBGU_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_SAMA5_DBGU_BAUD - The configure BAUD of the DBGU. + CONFIG_SAMA5_DBGU_PARITY - 0=no parity, 1=odd parity, 2=even parity + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the DBGU). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARITY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + AT91SAMA5 USB Host Configuration + Pre-requisites + + CONFIG_USBDEV - Enable USB device support + CONFIG_USBHOST - Enable USB host support + CONFIG_SAMA5_UHPHS - Needed + CONFIG_SAMA5_OHCI - Enable the STM32 USB OTG FS block + CONFIG_SCHED_WORKQUEUE - Worker thread support is required + + Options: + + CONFIG_SAMA5_OHCI_NEDS + Number of endpoint descriptors + CONFIG_SAMA5_OHCI_NTDS + Number of transfer descriptors + CONFIG_SAMA5_OHCI_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_SAMA5_OHCI_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_INT_DISABLE + Disable interrupt endpoint support + CONFIG_USBHOST_ISOC_DISABLE + Disable isochronous endpoint support + CONFIG_USBHOST_BULK_DISABLE + Disable bulk endpoint support + +config SAMA5_OHCI_REGDEBUG + +Configurations +============== + + Information Common to All Configurations + ---------------------------------------- + Each SAMA4D4-EK configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh sama5d4-ek/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on the DBGU (J23). + + 3. All of these configurations use the Code Sourcery for Windows toolchain + (unless stated otherwise in the description of the configuration). That + toolchain selection can easily be reconfigured using 'make menuconfig'. + Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Microsoft Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin or other POSIX environment + + System Type -> Toolchain: + CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for windows + + That same configuration will work with Atmel GCC toolchain. The only + change required to use the Atmel GCC toolchain is to change the PATH + variable so that those tools are selected instead of the CodeSourcery + tools. Try 'which arm-none-eabi-gcc' to make sure that you are + selecting the right tool. + + The setenv.sh file is available for you to use to set the PATH + variable. The path in the that file may not, however, be correct + for your installation. + + See also the "NOTE about Windows native toolchains" in the section call + "GNU Toolchain Options" above. + + !!!WARNING!!! The first time that you type 'make', the system will + configure itself based on the settings in the .config file. One of + these settings can cause a lot of confusion if you configure the build + in the wrong state: If you are running on Linux, make *certain* that + you have CONFIG_HOST_LINUX=y *before* the first make or you will + create a very corrupt configuration that may not be easy to recover + from. + + 4. The SAMA5Dx is running at 528MHz by default in these configurations. + + Board Selection -> CPU Frequency + CONFIG_SAMA5D4EK_528MHZ=y : Enable 528MHz operation + CONFIG_BOARD_LOOPSPERMSEC=65775 : Calibrated on SAMA5D3-Xplained at + : 528MHz running from SDRAM + + Configuration Sub-directories + ----------------------------- + Summary: Some of the descriptions below are long and wordy. Here is the + concise summary of the available SAMA4D4-EK configurations: + + at25boot: This is a little program to write a boot loader into the + AT25 serial FLASH (in particular, dramboot). See the description + below and the section above entitled "Creating and Using AT25BOOT" + for more information + bridge: This is a simple testing that exercises EMAC0 and EMAC1 for + a simple UDP relay bridge test. + dramboot: This is a little program to help debug of code in DRAM. See + the description below and the section above entitled "Creating and + Using DRAMBOOT" for more information + elf: Demonstrates execution of ELF file from a file system. + ipv6: This is another version of the NuttShell configuration. It is + very similar to the nsh configuration except that it has IPv6 enabled + and IPv4 disabled. + knsh: An NSH configuration used to test the SAMA5D kernel build + configuration. Uses a tiny NSH configuration that runs at + start time from a mounted file system. + nsh: This is an NuttShell (NSH) configuration that supports extensive + functionality as possible (unlike the minimal ramtest configuration). + See the detailed description below for a summary of the feature + set supported by this configuration. You may want to disable some + of these features if you plan to use the NSH as a platform for + debugging and integrating new features. + nxwm: This is a special configuration setup for the NxWM window manager + UnitTest. It integrates support for both the SAMA5 LCDC and the + SAMA5 ADC touchscreen controller and provides a more advance + graphics demo. It provides an interactive windowing experience. + ramtest: This is a stripped down version of NSH that runs out of + internal SRAM. It configures SDRAM and supports only the RAM test + at apps/examples/ramtest. This configuration is useful for + bringing up SDRAM. + + There may be issues with some of these configurations. See the details + before of the status of individual configurations. + + Now for the gory details: + + at25boot: + + To work around some SAM-BA availability issues that I had at one time, + I created the at25boot program. at25boot is a tiny program that runs in + ISRAM. at25boot will enable SDRAM and configure the AT25 Serial FLASH. + It will prompt and then load an Intel HEX program into SDRAM over the + serial console. If the program is successfully loaded in SDRAM, at25boot + will copy the program at the beginning of the AT26 Serial FLASH. + If the jumpering is set correctly, the SAMA5D4 RomBOOT loader will + then boot the program from the serial FLASH the next time that it + reset. + + The usage is different, otherwise I believe the notes for the dramboot + configuration should all apply. + + STATUS: While this program works great and appears to correctly write + the binary image onto the AT25 Serial FLASH, the RomBOOT loader will + not boot it! I believe that is because the secure boot loader has some + undocumented requirements that I am unaware of. (2014-6-28) + + bridge: + + This is a simple testing that exercises EMAC0 and EMAC1 for a simple + UDP relay bridge test using apps/examples/bridge. See + apps/examples/README.txt for more information about this test. + + + NOTES: + + 1. This configuration uses the the USART3 for the serial console + which is available at the "DBGU" RS-232 connector (J24). That + is easily changed by reconfiguring to (1) enable a different + serial peripheral, and (2) selecting that serial peripheral as + the console device. + + 2. By default, this configuration is set up to build on Windows + under either a Cygwin or MSYS environment using a recent, Windows- + native, generic ARM EABI GCC toolchain (such as the CodeSourcery + toolchain). Both the build environment and the toolchain + selection can easily be changed by reconfiguring: + + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + If you are running on Linux, make *certain* that you have + CONFIG_HOST_LINUX=y *before* the first make or you will create a + corrupt configuration that may not be easy to recover from. See + the warning in the section "Information Common to All Configurations" + for further information. + + 3. EMAC0 and EMAC1 connect KSZ8081RNB PHYs and are available at the + ETH0 and ETH1 connector, respectively. + + The ETH1 signals go through line drivers that are enabled via the + board LCD_ETH1_CONFIG signal. Jumper JP2 selects either the EMAC1 + or the LCD by controlling the the LCD_ETH1_CONFIG signal on the + board. + + - JP2 open, LCD_ETH1_CONFIG pulled high: + + LCD_ETH1_CONFIG=1: LCD 5v enable(LCD_DETECT#=0); ETH1 disable + + - JP2 closed, LCD_ETH1_CONFIG grounded: + + LCD_ETH1_CONFIG=0: LCD 5v disable; ETH1 enable + + STATUS: + + 2014-11-17: Configuration created. Only partially verified. EMAC0 + seems functional, but EMAC1 does not respond to pings. Cannot perform + the full bridge test yet anyway because there still is no host-side + test driver in apps/examples/bridge. + 2014-11-18: Continued working with EMAC1: It does not work. No + errors are reported, link auto-negotiation works without error, but I + cannot send or receive anything on EMAC1: TX transfers all timeout + with no interrupts and nothing appearing on the line; RX transfers + are not received... no RX interrupts and no RX status gets set. This + appears to be some very low-level issue, perhaps a pin configuration + problem. But I am not seeing it yet. No interrupts are ever received. + + dramboot: + + This is a little program to help debug of code in DRAM. It does the + following: + + - Sets the clocking so that the SAMA5 is running at 528MHz. + - Configures DRAM, + - Loads and Intel HEX file into DRAM over the terminal port, + - Waits for you to break in with GDB (or optionally starts the + newly loaded program). + + At that point, you can set the PC and begin executing from SDRAM under + debug control. See the section entitled "Creating and Using + DRAMBOOT" above. + + NOTES: + + 1. This configuration uses the the USART3 for the serial console + which is available at the "DBGU" RS-232 connector (J24). That + is easily changed by reconfiguring to (1) enable a different + serial peripheral, and (2) selecting that serial peripheral as + the console device. + + 2. By default, this configuration is set up to build on Windows + under either a Cygwin or MSYS environment using a recent, Windows- + native, generic ARM EABI GCC toolchain (such as the CodeSourcery + toolchain). Both the build environment and the toolchain + selection can easily be changed by reconfiguring: + + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + If you are running on Linux, make *certain* that you have + CONFIG_HOST_LINUX=y *before* the first make or you will create a + corrupt configuration that may not be easy to recover from. See + the warning in the section "Information Common to All Configurations" + for further information. + + 3. This configuration executes out of internal SRAM flash and is + loaded into SRAM by the boot RomBoot from NAND, Serial + DataFlash, SD card or from a TFTPC sever via the Boot ROM. + Data also is positioned in SRAM. + + 2. The default dramboot program initializes the DRAM memory, + displays a message, loads an Intel HEX program into DRAM over the + serial console and halts. The dramboot program can also be + configured to jump directly into DRAM without requiring the + final halt and go by setting CONFIG_SAMA5D4EK_DRAM_START=y in the + NuttX configuration. + + 3. Be aware that the default dramboot also disables the watchdog. + Since you will not be able to re-enable the watchdog later, you may + need to set CONFIG_SAMA5_WDT=y in the NuttX configuration file. + + 4. If you put dramboot on the Serial FLASH, you can automatically + boot to SDRAM on reset. See the section "Creating and Using DRAMBOOT" + above. + + 5. Here are the steps that I use to execute this program in SRAM + using only the ROM Bootloader: + + a) Hold the DIS_BOOT button and + + b) With the DIS_BOOT button pressed, power cycle the board. A + reset does not seem to be sufficient. + + c) The serial should show RomBOOT in a terminal window (at 115200 + 8N1) and nothing more. + + d) Press ENTER in the terminal window a few times to enable JTAG. + + e) Start the Segger GDB server. It should successfully connect to + the board via JTAG (if JTAG was correctly enabled in step d)). + + f) Start GDB, connect, to the GDB server, load NuttX, and debug. + + gdb> target remote localhost:2331 + gdb> mon halt (don't do mon reset) + gdb> load nuttx + gdb> mon reg pc (make sure that the PC is 0x200040 + gdb> ... and debug ... + + STATUS: I don't have a working SAM-BA at the moment and there are issues + with my AT25BOOT (see above). I currently work around these issues by + putting DRAMBOOT on a microSD card (as boot.bin). The RomBOOT loader does + boot that image without issue. + + elf: + + Demonstrates execution of ELF file from a file system using + apps/examples/elf. This is a very simple configuration so there is not + really much that needs to be said. + + NOTES: + + 1. This configuration uses the the USART3 for the serial console + which is available at the "DBGU" RS-232 connector (J24). That + is easily changed by reconfiguring to (1) enable a different + serial peripheral, and (2) selecting that serial peripheral as + the console device. + + 2. By default, this configuration is set up to build on Windows + under either a Cygwin or MSYS environment using a recent, Windows- + native, generic ARM EABI GCC toolchain (such as the CodeSourcery + toolchain). Both the build environment and the toolchain + selection can easily be changed by reconfiguring: + + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + If you are running on Linux, make *certain* that you have + CONFIG_HOST_LINUX=y *before* the first make or you will create a + corrupt configuration that may not be easy to recover from. See + the warning in the section "Information Common to All Configurations" + for further information. + + 3. This configuration currently has Cortex-A address environments selected. + With this option, the MMU is used to create a custom address environment + for each ELF program (effectively making them processes). This option + can be disabled in which case the ELF programs will simply execute out + normal memory allocated from the heap. To disable this feature: + + System Type -> Architecture Options + CONFIG_ARCH_ADDRENV=n : Disable address environment support + + System Type -> Heap Configuration + CONFIG_SAMA5_DDRCS_RESERVE=n : Don't reserve any page cache memory + CONFIG_SAMA5_DDRCS_PGHEAP=n : Don't try to set up the page allocator + + Memory Management + CONFIG_GRAN=n : Disable the granule allocator + CONFIG_MM_PGALLOC=n : Disable the page allocator + + 4. A system call interface is enabled and the ELF test programs interface + with the base RTOS code system calls. This eliminates the need for symbol + tables to link with the base RTOS (symbol tables are still used, however, + to interface with the common C library instaniation). Relevant + configuration settings: + + RTOS Features -> System call support + CONFIG_LIB_SYSCALL=y : Enable system call support + CONFIG_SYS_NNEST=2 : Max number of nested system calls + CONFIG_SYS_RESERVED=1 : SYStem call 0 is reserved on this platform + + Application Configurations -> Examples -> ELF Loader Example + CONFIG_EXAMPLES_ELF_SYSCALL=y : Link apps with the SYStem call library + + STATUS: + 2014-8-24: This configuration works with the address environment + and system call options disabled. + 2014-8-28: Now this option works well well with address environments + enabled. There is a potential issue with the use of + task_create() as it is used in the ELF test, but the code + seems to survive it. See: + + http://www.nuttx.org/doku.php?id=wiki:nxinternal:memconfigs#task_create + + 2014-8-29: System call interface verified. + 2014-9-16: Reverified after fixing changes for the knsh configuration + that broke this on. All seems to be well now. + + ipv6: + ---- + This is another version of the NuttShell configuration. It is very + similar to the nsh configuration except that it has IPv6 enabled and + IPv4 disabled. Several network utilities that are not yet available + under IPv6 are disabled. + + NOTES: + + 1. As of 2015-02-09, this configuration was identical to the nsh + configuration other than using IPv6. So all of the notes below + regarding the nsh configuration apply. + + Telnet does not work with IPv6. + + 2. This configuration can be modified to that both IPv4 and IPv6 + are support. Here is a summary of the additional configuration + settings requird to support both IPv4 and IPv6: + + CONFIG_NET_IPv4=y + CONFIG_NET_ARP=y + CONFIG_NET_ARP_SEND=y (optional) + CONFIG_NET_ICMP=y + CONFIG_NET_ICMP_PING=y + + CONFIG_NETDB_DNSCLIENT=y + CONFIG_NETUTILS_TELNETD=y + + CONFIG_NSH_IPADDR=0x0a000002 + CONFIG_NSH_DRIPADDR=0x0a000001 + CONFIG_NSH_NETMASK=0xffffff00 + CONFIG_NSH_TELNET=y + + Then from NSH, you have both ping and ping6 commands: + + nsh> ping 10.0.0.1 + nsh> ping6 fc00::1 + + And from the host you can do similar: + + ping 10.0.0.2 + ping6 fc00::2 (Linux) + ping -6 fc00::2 (Windows cmd) + + and Telnet again works from the host: + + telent 10.0.0.2 + + 3. You can enable IPv6 autonomous address configuration with the + following changes to the configuration: + + + CONFIG_NET_ICMPv6_AUTOCONF=y + + CONFIG_ICMPv6_AUTOCONF_DELAYMSEC=100 + + CONFIG_ICMPv6_AUTOCONF_MAXTRIES=5 + + - CONFIG_NSH_DRIPv6ADDR_1=0xfc00 + - CONFIG_NSH_DRIPv6ADDR_2=0x0000 + - CONFIG_NSH_DRIPv6ADDR_3=0x0000 + - CONFIG_NSH_DRIPv6ADDR_4=0x0000 + - CONFIG_NSH_DRIPv6ADDR_5=0x0000 + - CONFIG_NSH_DRIPv6ADDR_6=0x0000 + - CONFIG_NSH_DRIPv6ADDR_7=0x0000 + - CONFIG_NSH_DRIPv6ADDR_8=0x0001 + + - CONFIG_NSH_IPv6ADDR_1=0xfc00 + - CONFIG_NSH_IPv6ADDR_2=0x0000 + - CONFIG_NSH_IPv6ADDR_3=0x0000 + - CONFIG_NSH_IPv6ADDR_4=0x0000 + - CONFIG_NSH_IPv6ADDR_5=0x0000 + - CONFIG_NSH_IPv6ADDR_6=0x0000 + - CONFIG_NSH_IPv6ADDR_7=0x0000 + - CONFIG_NSH_IPv6ADDR_8=0x0002 + - CONFIG_NSH_IPv6NETMASK_1=0xffff + - CONFIG_NSH_IPv6NETMASK_2=0xffff + - CONFIG_NSH_IPv6NETMASK_3=0xffff + - CONFIG_NSH_IPv6NETMASK_4=0xffff + - CONFIG_NSH_IPv6NETMASK_5=0xffff + - CONFIG_NSH_IPv6NETMASK_6=0xffff + - CONFIG_NSH_IPv6NETMASK_7=0xffff + - CONFIG_NSH_IPv6NETMASK_8=0xff80 + + knsh: + An NSH configuration used to test the SAMA5D kenel build configuration. + + NOTES: + + 1. This configuration uses the the USART3 for the serial console + which is available at the "DBGU" RS-232 connector (J24). That + is easily changed by reconfiguring to (1) enable a different + serial peripheral, and (2) selecting that serial peripheral as + the console device. + + 2. By default, this configuration is set up to build on Windows + under either a Cygwin or MSYS environment using a recent, Windows- + native, generic ARM EABI GCC toolchain (such as the CodeSourcery + toolchain). Both the build environment and the toolchain + selection can easily be changed by reconfiguring: + + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + If you are running on Linux, make *certain* that you have + CONFIG_HOST_LINUX=y *before* the first make or you will create a + corrupt configuration that may not be easy to recover from. See + the warning in the section "Information Common to All Configurations" + for further information. + + 3. Some key setup configuration values for this configuration: + + Build Setup -> Build Configuration -> Memory Organization + CONFIG_BUILD_KERNEL=y : Kernel build enabled + + RTOS Features -> Tasks and Scheduling + CONFIG_INIT_FILEPATH=y : Start-up is via an ELF file + CONFIG_USER_INITPATH="/bin/init" : The location of the startup + CONFIG_SCHED_HAVE_PARENT=y : Needed to handle task exit + + RTOS Features -> System call support + CONFIG_SYS_RESERVED=5 : More reserved SYSCALLs + + RTOS Features -> RTOS hooks + CONFIG_SCHED_ONEXIT=y : Needed to handle task exit + CONFIG_SCHED_ONEXIT_MAX=2 + + Memory Management + CONFIG_MM_KERNEL_HEAP=y : Enable a kernel heap + CONFIG_MM_KERNEL_HEAPSIZE=8192 : (temporary.. will change) + + 4. By default, this configuration is setup to boot from an SD card. + Unfortunately, there some issues when using the SD card that prevent + this from working properly (see STATUS below). And alternative is to + use a built-in ROMFS file system that does not suffer from the + (assumed) HSMCI bug. + + So why isn't this the default configuration? Because it does not + build out-of-the-box. You have to take special steps in the build + process as described below. + + Assuming that you will want to reconfigure to use the ROMFS (rather + than debugging HSCMI), you will need to disable all of these settings: + + System Type->ATSAMA5 Peripheral Support + CONFIG_SAMA5_HSMCI0=n : Disable HSMCI0 support + CONFIG_SAMA5_XDMAC0=n : XDMAC0 is no longer needed + + System Type + CONFIG_SAMA5_PIO_IRQ=n : PIO interrupts are no longer needed + + Device Drivers -> MMC/SD Driver Support + CONFIG_MMCSD=n : Disable MMC/SD support + + File System + CONFIG_FS_FAT=n : FAT file system no longer needed + + Board Selection + CONFIG_SAMA5D4EK_HSMCI0_MOUNT=y : Don't mount HSMCI0 at boot + + And then enable these features in order to use the ROMFS boot file + system: + + File System + CONFIG_FS_ROMFS=y : Enable the ROMFS file system + + Board Selection + CONFIG_SAMA5D4EK_ROMFS_MOUNT=y : Mount the ROMFS file system at boot + CONFIG_SAMA5D4EK_ROMFS_MOUNT_MOUNTPOINT="/bin" + CONFIG_SAMA5D4EK_ROMFS_ROMDISK_DEVNAME="/dev/ram0" + CONFIG_SAMA5D4EK_ROMFS_ROMDISK_MINOR=0 + CONFIG_SAMA5D4EK_ROMFS_ROMDISK_SECTSIZE=512 + + Then you will need to follow some special build instructions below + in order to build and install the ROMFS file system image. + + UPDATE: The ROMFS configuration is pre-configured in the the + file nuttx/configs/sama5d4-ek/knsh/defconfig.ROMFS + + 5. Board initialization is performed performed before the application + is started: + + RTOS Features -> RTOS Hooks + CONFIG_BOARD_INITITIALIZE=y + + In the special ROMFS boot configuration, you need to do nothing + additional: The board initialization will mount the ROMFS file + system at boot time. + + In the default configuration, however, the board initialization + will instead mount the FAT filesystem on an SD card inserted in + the HSMCI0 slot (full size). The SAMA4D4-EK provides two SD + memory card slots: (1) a full size SD card slot (J10), and (2) a + microSD memory card slot (J11). The full size SD card slot connects + via HSMCI0; the microSD connects vi HSMCI1. See the relevant + configuration settings above in the paragraph entitled "HSMCI Card + Slots" above. + + The SD card is mounted at /bin by this board initialization logic. + NuttX will boot from the SD card so there are some special operational + requirements to use this configuration: + + a. The SD card must contain a NuttX executable called 'init' + b. The SD card must be in the HSCMCI slot when NuttX boots and must + not be removed while NuttX is running. + + The NuttX automounter is *not* enabled. It cannot be used it would + mount the boot file system with a delay. In this configuration. The + file system must be mounted immediately at boot up. To accomplish + this, the board logic supports these special configurations: + + Board Selection -> + CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT=y + CONFIG_SAMA5D4EK_HSMCI0_MOUNT_BLKDEV="/dev/mmcsd0" + CONFIG_SAMA5D4EK_HSMCI0_MOUNT_FSTYPE="vfat" + CONFIG_SAMA5D4EK_HSMCI0_MOUNT_MOUNTPOINT="/bin" + + 6a. General build directions (boot from SD card): + + $ cd nuttx/tools : Go to the tools sub-directory + $ ./configure.sh sama5d4-ek/kernel : Establish this configuration + $ cd .. : Back to the NuttX build directory + : Edit setenv.sh to use the correct path + $ . ./setenv.sh : Set up the PATH variable + $ make : Build the kerne with a dummy ROMFS image + : This should create the nuttx ELF + $ make export : Create the kernel export package + : You should have a file like + : nuttx-export-*.zip + $ cd apps/ : Go to the apps/ directory + $ tools/mkimport.sh -x : Use the full path to nuttx-export-*.zip + $ make import : This will build the file system. + + You will then need to copy the files from apps/bin to an SD card to + create the the bootable SD card. + + 6b. General build directions (boot from ROMFS image): + + $ cd nuttx/tools : Go to the tools sub-directory + $ ./configure.sh sama5d4-ek/kernel : Establish this configuration + $ cd .. : Back to the NuttX build directory + : Edit setenv.sh to use the correct path + $ . ./setenv.sh : Set up the PATH variable + $ touch configs/sama5d4-ek/include/boot_romfsimg.h + $ make : Build the kernel with a dummy ROMFS image + : This should create the nuttx ELF + $ make export : Create the kernel export package + : You should have a file like + : nuttx-export-*.zip + $ cd apps/ : Go to the apps/ directory + $ tools/mkimport.sh -x : Use the full path to nuttx-export-*.zip + $ make import : This will build the file system + $ tools/mkromfsimg.sh : Create the real ROMFS image + $ mv boot_romfsimg.h ../nuttx/configs/sama5d4-ek/include/boot_romfsimg.h + $ cd nuttx/ : Rebuild the system with the correct + $ make clean_context all : ROMFS file system + + STATUS: + + 2014-9-4: The kernel works up to the point where the nsh 'init' + is started from the file system then fails. This is good, + however, because I do not yet have the file system in place yet. + + 2014-9-8: I am seeing HSMCI read() failures while loading the ELF image + from the SD card. This seems odd since I have never seen other read() + failures with HSMCI (and, hence, this may be some issue unique to this + configuration). In any a event, this has stopped testing for the + moment. + + Also, the mount() in configs/sama5d4x-ek/src/sam_bringup.c will fail + unless you add a delay between the HSMCI initialization and the mount. + No idea why (and there they is now delay in the baseline code... one + has to be added). + + Update: I don't believe that this HSMCI error occurs if file system + debug output is enabled. + + 2014-9-11: Everything seems to be working quite nicely witn the ROMFS + file system. A considerable amount of testing has been done and + there are no known defects as of this writing. + + 2014-9-16: After some substantial effort, I think I may have resolved + the last of the mainstream bugs that prevented from executing other + user processes from a user processes. Long story but I am glad to + haave that done. + + nsh: + + This configuration directory provide the NuttShell (NSH). This is a + very simple NSH configuration upon which you can build further + functionality. + + NOTES: + + 1. This configuration uses the the USART3 for the serial console + which is available at the "DBGU" RS-232 connector (J24). That + is easily changed by reconfiguring to (1) enable a different + serial peripheral, and (2) selecting that serial peripheral as + the console device. + + 2. This configuration was verified using the SAMA5D4-MB, Rev C. board. + There may be some differences in the released SAMA5D4-EK board. Also, + this configuration assumes that you have the TM7000 LCD/Touchscreen + attached. If you do not, you should disable the LCD and touchscreen + drivers as described above under "TM7000 LCD/Touchscreen" and also + below. + + 3. By default, this configuration is set up to build on Windows + under either a Cygwin or MSYS environment using a recent, Windows- + native, generic ARM EABI GCC toolchain (such as the CodeSourcery + toolchain). Both the build environment and the toolchain + selection can easily be changed by reconfiguring: + + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + If you are running on Linux, make *certain* that you have + CONFIG_HOST_LINUX=y *before* the first make or you will create a + corrupt configuration that may not be easy to recover from. See + the warning in the section "Information Common to All Configurations" + for further information. + + 4. This configuration supports logging of debug output to a circular + buffer in RAM. This feature is discussed fully in this Wiki page: + http://nuttx.org/doku.php?id=wiki:howtos:syslog . Relevant + configuration settings are summarized below: + + File System: + CONFIG_SYSLOG=y : Enables the System Logging feature. + + Device Drivers: + CONFIG_RAMLOG=y : Enable the RAM-based logging feature. + CONFIG_RAMLOG_CONSOLE=n : (We don't use the RAMLOG console) + CONFIG_RAMLOG_SYSLOG=y : This enables the RAM-based logger as the + system logger. + CONFIG_RAMLOG_NONBLOCKING=y : Needs to be non-blocking for dmesg + CONFIG_RAMLOG_BUFSIZE=16384 : Buffer size is 16KiB + + NOTE: This RAMLOG feature is really only of value if debug output + is enabled. But, by default, no debug output is disabled in this + configuration. Therefore, there is no logic that will add anything + to the RAM buffer. This feature is configured and in place only + to support any future debugging needs that you may have. + + If you don't plan on using the debug features, then by all means + disable this feature and save 16KiB of RAM! + + NOTE: There is an issue with capturing data in the RAMLOG: If + the system crashes, all of the crash dump information will into + the RAMLOG and you will be unable to access it! You can tell that + the system has crashed because (a) it will be unresponsive and (b) + the RED LED will be blinking at about 2Hz. + + That is another good reason to disable the RAMLOG! + + 5. This configuration executes out of SDRAM flash and is loaded into + SDRAM from NAND, Serial DataFlash, SD card or from a TFTPC sever via + U-Boot, BareBox, or the DRAMBOOT configuration described above. Data + also is positioned in SDRAM. + + The load address is different for the DRAMBOOT program and the Linux + bootloaders. This can easily be reconfigured, however: + + CONFIG_SAMA5D4EK_DRAM_BOOT=y + + See the section above entitled "Creating and Using DRAMBOOT" above + for more information. Here is a summary of the steps that I used + to boot the NSH configuration: + + a. Create the DRAMBOOT program as described above. It should be + configured with CONFIG_SAMA5D4EK_DRAM_START=y so that DRAMBOOT + will immediately start the program. You may not want to do + this is your prefer to break in with GDB. + + b. Write the DRAMBOOT program binary (nuttx.bin) to a microSD + card as "boot.bin". Insert the microSD card into the boar; + The ROM Booloader should now boot DRAMBOOT on reset and you + should see this message: + + Send Intel HEX file now + + c. Build the NSH version of NuttX. Send the Intel HEX of NSH + at the prompt. After the file is received, NSH should start + automatically. + + At times the past, have have tested with nuttx.bin on an SD card and + booting with U-Boot. These are the commands that I used to boot NuttX + from the SD card: + + U-Boot> fatload mmc 0 0x20008000 nuttx.bin + U-Boot> go 0x20008040 + + 6. Board LEDs and buttons are supported as described under "Buttons and + LEDs". The interrupt button test is also enabled as an NSH built-in + commands. To run this test, you simply inter the command: + + nsh>buttons [npresses] + + The interrupt button test will log button press information to the + syslog. Since the RAMLOG is enabled, the SYSLOG output will be + captured to a circular buffer in ram and may be examined using the + NSH dmesg command: + + nsh> buttons 2 + nsh> dmesg + maxbuttons: 2 + Attached handler at 200106f0 to button 0 [PB_USER], oldhandler:0 + IRQ:81 Button 0:PB_USER SET:01: + PB_USER depressed + IRQ:81 Button 0:PB_USER SET:00: + PB_USER released + IRQ:81 Button 0:PB_USER SET:01: + PB_USER depressed + IRQ:81 Button 0:PB_USER SET:00: + PB_USER released + + 7. This configuration supports /dev/null, /dev/zero, and /dev/random. + + CONFIG_DEV_NULL=y : Enables /dev/null + CONFIG_DEV_ZERO=y : Enabled /dev/zero + + Support for /dev/random is implemented using the SAMA5D4's True + Random Number Generator (TRNG). See the section above entitled + "TRNG and /dev/random" for information about configuring /dev/random. + + CONFIG_SAMA5_TRNG=y : Enables the TRNG peripheral + CONFIG_DEV_RANDOM=y : Enables /dev/random + + 8. This configuration has support for NSH built-in applications enabled. + Two built-in applications are included by default: + + a. The I2C Tool. See the section above entitled "I2C Tool" and the + note with regard to I2C below. + b. The interrupting button test as described above in these notes. + c. The touchscreen test program as described above under "TM7000 + LCD/Touchscreen" and also below in this notes. + d. An LCD/graphics test program. See the section above entitle + "TM7000 LCD/Touchscreen" and also below in this notes. + e. The NxPlayer command line media player. This is a work in + progress see the "Audio Support" section above and additional + notes below. + + 9. This configuration has support for the FAT, ROMFS, and PROCFS file + systems built in. + + The FAT file system includes long file name support. Please be aware + that Microsoft claims patents against the long file name support (see + more discussion in the top-level COPYING file). + + CONFIG_FS_FAT=y : Enables the FAT file system + CONFIG_FAT_LCNAMES=y : Enable lower case 8.3 file names + CONFIG_FAT_LFN=y : Enables long file name support + CONFIG_FAT_MAXFNAME=32 : Arbitrarily limits the size of a path + segment name to 32 bytes + + The ROMFS file system is enabled simply with: + + CONFIG_FS_ROMFS=y : Enable ROMFS file system + + The ROMFS file system is enabled simply with: + + CONFIG_FS_PROCFS=y : Enable PROCFS file system + + 10. An NSH start-up script is provided by the ROMFS file system. The ROMFS + file system is mounted at /etc and provides: + + |- dev/ + | |- ... + | `- ram0 : ROMFS block driver + `- etc/ + `- init.d/ + `- rcS : Start-up script + + (There will, of course, be other devices under /dev including /dev/console, + /dev/null, /dev/zero, /dev/random, etc.). + + Relevant configuration options include: + + CONFIG_NSH_ROMFSETC=y : Enable mounting at of startup file system + CONFIG_NSH_ROMFSMOUNTPT="/etc" : Mount at /etc + CONFIG_NSH_ROMFSDEVNO=0 : Device is /dev/ram0 + CONFIG_NSH_ARCHROMFS=y : ROMFS image is at + configs/sama5d4-ek/include/nsh_romfsimg.h + The content of /etc/init.d/rcS can be see in the file rcS.template that + can be found at: configs/sama5d4-ek/include/rcS.template: + + # Mount the procfs file system at /proc + + mount -f procfs /proc + echo "rcS: Mounted /proc" + + # Create a RAMDISK at /dev/ram1, size 0.5MiB, format it with a FAT + # file system and mount it at /tmp + + mkrd -m 1 -s 512 1024 + mkfatfs /dev/ram1 + mount -t vfat /dev/ram1 /tmp + echo "rcS: Mounted /tmp" + + The above commands will mount the procfs file system at /proc and a + RAM disk at /tmp. + + The second group of commands will: (1) Create a RAM disk block device + at /dev/ram1 (mkrd). The RAM disk will take 0.4MiB of memory (512 x + 1024). Then it will then: (2) create a FAT file system on the ram + disk (mkfatfs) and (3) mount it at /tmp (mount). + + So after NSH starts and runs the rcS script, we will have: + + |- dev/ + | |- ... + | `- ram0 : ROMFS block driver + | `- ram1 : RAM disk block driver + |- etc/ + | `- init.d/ + | `- rcS : Start-up script + |- proc/ + | |- 0/ : Information about Task ID 0 + | | |- cmdline : Command line used to start the task + | | |- stack : Stack allocation + | | |- status : Current task status + | | `- group/ : Information about the task group + | | |- fd : File descriptors open in the group + | | `- status : Status of the group + | |- 1/ : Information about Task ID 1 + | | `- ... : Same psuedo-directories as for Task ID 0 + | |- ... : ... + | |- n/ : Information about Task ID n + | | `- ... : Same psuedo-directories as for Task ID 0 + | |- uptime : Processor uptime + `- tmp/ + + The /tmp directory can them be used for and scratch purpose. The + pseudo-files in the proc/ directory can be used to query properties + of NuttX. As examples: + + nsh> cat /proc/1/stack + StackBase: 0x2003b1e8 + StackSize: 2044 + + nsh> cat /proc/uptime + 31.89 + + nsh> cat /proc/1/status + Name: work + Type: Kernel thread + State: Signal wait + Priority: 192 + Scheduler: SCHED_FIFO + SigMask: 00000000 + + nsh> cat /proc/1/cmdline + work + + nsh> cat /proc/1/group/status + Flags: 0x00 + Members: 1 + + nsh> cat /proc/1/group/fd + + FD POS OFLAGS + 0 0 0003 + 1 0 0003 + 2 0 0003 + + SD RF TYP FLAGS + + 11. The Real Time Clock/Calendar (RTC) is enabled in this configuration. + See the section entitled "RTC" above for detailed configuration + settings. + + The RTC alarm is not enabled by default since there is nothing in + this configuration that uses it. The alarm can easily be enabled, + however, as described in the "RTC" section. + + The time value from the RTC will be used as the NuttX system time + in all timestamp operations. You may use the NSH 'date' command + to set or view the RTC as described above in the "RTC" section. + + NOTE: If you want the RTC to preserve time over power cycles, you + will need to install a battery in the battery holder (J12) and close + the jumper, JP13. + + 12. Support for HSMCI0 is built-in by default. The SAMA4D4-EK provides + two SD memory card slots: (1) a full size SD card slot (J10), and + (2) a microSD memory card slot (J11). The full size SD card slot + connects via HSMCI0; the microSD connects vi HSMCI1. Support for + the microSD slot could also be enabled with the settings provided + in the paragraph entitled "HSMCI Card Slots" above. + + NOTE: For now I am boot off the microSD slot so, unless are booting + in a different manner, this HSMCI1 slot may not be useful to you + anyway. + + The auto-mounter is also enabled. See the section above entitled + "Auto-Mounter". + + 13. Networking is supported via EMAC0. See the "Networking" section + above for detailed configuration settings. DHCP is not used in + this configuration; rather, a hard-coded IP address of 10.0.0.2 is + used with a netmask of 255.255.255.0. The host is assumed to be + 10.0.0.1 in places. You can reconfigure to enabled DHCPC or to + change these addresses as you see fit. + + See also the "kludge" for EMAC that is documented in the To-Do list + at the end of this README file. + + The configuration option CONFIG_NSH_NETINIT_THREAD is enabled so + that NSH network bring-up asynchronously and in parallel on a + separate thread. This eliminates the (visible) networking bring-up + delay. This networking initialization feature by itself has + some limitations: + + - If no network is connected, the network bring-up will fail and + the network initialization thread will simply exit. There are no + retries and no mechanism to know if the network initialization was + successful. + + - Furthermore, there is no support for detecting loss of the network + connection and recovery of networking when the connection is restored. + + Both of these shortcomings can be eliminated by enabling the network + monitor as described above in the "Network Monitor" paragraph. + + 14. I2C Tool. This configuration enables TWI0 (only) as an I2C master + device. This configuration also supports the I2C tool at + apps/system/i2c that can be used to peek and poke I2C devices on the + TIW0 bus. See the discussion above under "I2C Tool" for detailed + configuration settings. + + 15. Support the USB low-, high- and full-speed OHCI host driver is enabled + enabled with the NuttX configuration file as described in the section + above entitled "USB High-Speed Host". Only port B and port C, the + larger "Type A" connectors, are enabled; port A (the smaller OTG + connector) is reserved for future use with USB device (but could also + be configured as a USB host port if desired). + + Support for Mass Storage Class and USB (Boot) Keyboard class is also + enabled. The keyboard class was useful for verifying that low-speed + devices can connect successfully, but is otherwise not used by this + configuration. Feel free to disable it if you like: + + CONFIG_USBHOST_HIDKBD=n + + You could also replace the NSH stdin device to take input from a USB + keyboard with: + + CONFIG_NSH_USBKBD=y + CONFIG_NSH_USBKBD_DEVNAME="/dev/kbda" + + The keyboard is currently configured to poll at 80 MSec intervals. + This is controlled by: + + CONFIG_HIDKBD_POLLUSEC=80000 + + which can be reduced if better keyboard response is required. + + NOTE: You will not have access to the RAMLOG via the NSH dmseg command + if the USB keyboard is selected. You can still access NSH via Telnet + or you may want to disable the RAMLOG so that debug information comes + out on the console. + + 16. Support the USB high-speed USB device driver (UDPHS) is not enabled by + default but could be enabled by changing the NuttX configuration file as + described above in the section entitled "USB High-Speed Device." + + 17. Support for the maXTouch MXT768E touchscreen driver on the TM7000 + LCD/Touchscreen module is enabled by default. See the section above + entitled "TM7000 LCD/Touchscreen" for detailed configuration information. + You will probably want to disable this option if you are not using the + TM7000 LCD/Touchscreen. + + The Touchscreen test program is also built in. This test program can + be found in the source tree at apps/examples/touchscreen. Usage is + like: + + nsh> tc [] + + 18. Support for the TM7000 LCD is enabled by default. See the section above + entitled "TM7000 LCD/Touchscreen" for detailed configuration information. + You will probably want to disable this option if you are not using the + TM7000 LCD. + + There are several LCD test programs available. One is built into this + configuration: apps/examples/nx. The NX example is a simple test + using the NuttX graphics system (NX). This test case focuses on general + window controls, movement, mouse and keyboard input. It requires no + user interaction. + + The test is executed by simply typing: + + nsh> nx + + There are several simple graphics examples under apps/examples/ that + could be configured to verify LCD/graphics operation: + + a. nxhello. Just displays "Hello, World!" at the center of the + display. + b. nximage. Displays the NuttX logo in the center of the display. + c. nxlines. Shows many fat lines. This generally looks like a + "clock" with a cicle and a rotating line in the center. + d. nxtext. This demonstrates scrolling text with pop-up windows on + top of the test. The pop-up windows come and go without + corrupting the scrolling text. + + See apps/examples/README.txt for information about configuring these + examples. + + 19. NxPlayer + + This configuration has the command line NxPlayer enabled. Support + for the WM8904 CODEC is built in. + + NOTE: The WM8904 driver should not be included in the + configuration if you are using the Rev C version of the board + (there were some I2C communication issues for the WM8904 interface + on Rev C of the board): + + CONFIG_SYSTEM_NXPLAYER=n + + This configuration depends on media files in the default mountpoint + at /mnt/sdard. You will need to mount the media before running + NxPlayer, Here are the general steps to play a file: + + a. You will need an (full size) SD card containing the .WAV files + that you want to play (.WAV is only format supported as of this + writing). That SD card should be inserted in the HSMCI0 media + slot A (best done before powering up). + + b. If the NuttX auto-mounter is enabled and properly configured, + then the FAT file system appear at /mnt/sdcard. If the auto- + mounter is not enabled, then here are the steps to manually + mount the FAT file system: + + Then from NSH prompt, you need to mount the media volume like: + + nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard + + NOTE: The auto-mounter is enabled by default in this + configuration. + + c. Then you can run the media player like: + + nsh> nxplayer + nxplayer> device pcm0 + nxplayer> play + + STATUS: Not yet functional. See the To-Do list at the bottom of this + README file. + + 20. The SAMA5D4-EK includes for an AT25 serial DataFlash. That support is + NOT enabled in this configuration. Support for that serial FLASH could + be enabled by modifying the NuttX configuration as described above in + the paragraph entitled "AT25 Serial FLASH". + + 21. This example can be configured to exercise the watchdog timer test + (apps/examples/watchdog). See the detailed configuration settings in + the section entitled "Watchdog Timer" above. + + STATUS: + See the To-Do list below + + 2014-8-30: Retesting today I am seeing a strange behavior: Serial + output is coming out in chunks with delays between the chunks. It + appears that something is not good in the serial port configuration. + I see no such chunky behavior in, for example, graphics output. + 2014-9-17: I do not see that chunked output behavior. However, I do + notice that the serial output is sluggish if there is not network + cable connected. When the network connected the serial output is + responsive: Something must be keeping the system too busy when + there is not network (probably the network monitor). + + nxwm: + + This is a special configuration setup for the NxWM window manager + UnitTest. It integrates support for both the SAMA5 LCDC and the + SAMA5 ADC touchscreen controller and provides a more advance + graphics demo. It provides an interactive windowing experience. + + NOTES: + + 1. The NxWM window manager is a tiny window manager tailored for use + with smaller LCDs but which is show here on the larger, SAMA5D4-EK + TM7000 LCD. It supports a toolchain, a start window, and + multiple application windows. However, to make the best use of + the visible LCD space, only one application window is visible at + at time. + + The NxWM window manager can be found here: + + nuttx-git/NxWidgets/nxwm + + The NxWM unit test can be found at: + + nuttx-git/NxWidgets/UnitTests/nxwm + + Documentation for installing the NxWM unit test can be found here: + + nuttx-git/NxWidgets/UnitTests/README.txt + + 2. This configuration is set up generally like the nsh configuration + except that: + + - It boots into a graphic, window manage environment instead of + the serial console command line. + - The console command line is still available within NxTerm + windows. + - Obviously, the nx and touchscreen built in applications cannot + be supported. + + Refer to the NOTES for the nsh configuration. Those also apply + for the nxwm configuration (other than the differences noted + above). + + 3. Here is the quick summary of the build steps. These steps assume + that you have the entire NuttX GIT in some directory ~/nuttx-git. + You may have these components installed elsewhere. In that case, you + will need to adjust all of the paths in the following accordingly: + + a. Install the nxwm configuration + + $ cd ~/nuttx-git/nuttx/tools + $ ./configure.sh sama5d4-ek/nxwm + + b. Make the build context (only) + + $ cd .. + $ . ./setenv.sh + $ make context + ... + + NOTE: the use of the setenv.sh file is optional. All that it + will do is to adjust your PATH variable so that the build system + can find your tools. If you use it, you will most likely need to + modify the script so that it has the correct path to your tool + binary directory. + + c. Install the nxwm unit test + + $ cd ~/nuttx-git/NxWidgets + $ tools/install.sh ~/nuttx-git/apps nxwm + Creating symbolic link + - To ~/nuttx-git/NxWidgets/UnitTests/nxwm + - At ~/nuttx-git/apps/external + + d. Build the NxWidgets library + + $ cd ~/nuttx-git/NxWidgets/libnxwidgets + $ make TOPDIR=~/nuttx-git/nuttx + ... + + e. Build the NxWM library + + $ cd ~/nuttx-git/NxWidgets/nxwm + $ make TOPDIR=~/nuttx-git/nuttx + ... + + f. Built NuttX with the installed unit test as the application + + $ cd ~/nuttx-git/nuttx + $ make + + 4. NSH Console Access. + + This configuration boots directly into a graphic, window manage + environment. There is no serial console. Some initial stdout + information will go to the USART3 serial output, but otherwise + the serial port will be silent. + + Access to the NSH console is available in two ways: + + a. The NxWM provides a graphics-based terminals (called NxTerms); + The console command line is still available within NxTerm + windows once NxWM is up and running. The console input (stdin) is + provided via a USB HID keyboard, but console output will go to the + NxTerm terminal. See below for more information about the USB + HID keyboard input, + +| b. Telnet NSH sessions are still supported and this is, in general, + the convenient way to access the shell (and RAMLOG). + + As with the NSH configuration, debug output will still go to the + circular RAMLOG buffer but cannot be accessed from a serial console. + Instead, you will need use the dmesg command from an NxTerm or + from a Telnet session to see the debug output + + 5. USB HID Keyboard Input + + USB keyboard support is enabled in the default configuration, but + can be disabled: + + CONFIG_USBHOST_HIDKBD=y + + Not all keyboards may be supported; only "boot" keyboards will be + recognized. + + The USB keyboard is configured to replace the NSH stdin device some + that NSH will take input from the USB keyboard. This has to be + done a little differently for the case of NxWM::CNxTerms than + in the standard NSH configuration. Here the relevant configuration + options are: + + CONFIG_NXWM_KEYBOARD_USBHOST=y + CONFIG_NXWM_KEYBOARD_DEVPATH="/dev/kbda" + + NSH will then automatically start when the NxTerm is started: + + NuttShell (NSH) NuttX-7.3 + nsh> + + When the NxTerm comes up, it will attempt to use /dev/kbda device + for input. Obviously, you cannot enter text if there is no keyboard + but otherwise you will not see any indication whether a keyboard is + connected or not. + + If the keyboard is detached, you not be able to enter text until the + keyboard is reconnected. Again, there is no other special indication + of the keyboard state. + + The keyboard is currently configured to poll at 80 MSec intervals. + That might not be fast enough for you if you are a fast typist. This + polling rate is controlled by: + + CONFIG_HIDKBD_POLLUSEC=80000 + + which can be reduced if better keyboard response is required. + + 6. Media Player + + This configuration has the media player application enabled. Support + for the WM8904 CODEC is built in. + + NOTE: The WM8904 driver should not be included in the + configuration if you are using the Rev C version of the board + (there were some I2C communication issues for the WM8904 interface + on Rev C of the board). You may either (1) Disable audio support + and disable the Media Player GUI, or (2) configure the "NULL" audio + device so that the GUI will function correctly (with no sound, + of course). + + This configuration depends on media files in the default mountpoint + at /mnt/sdard (configurable). If you see the message "Media volume + not mounted" in the media player text box, then you will need to + mount the media volume: + + a. You will need an (full size) SD card containing the .WAV files + that you want to play (.WAV is only format supported as of this + writing). That SD card should be inserted in the HSMCI0 media + slot A (best done before powering up). + + b. If the NuttX auto-mounter is enabled and properly configured, + then the FAT file system appear at /mnt/sdcard. If the auto- + mounter is not enabled, then you need to perform the following + steps to manually mount the FAT file system: + + Then from NSH prompt, you need to mount the media volume like: + + nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard + + I usually do this via Telnet from the host PC. Here is a + complete host Telnet session: + + $ telnet 10.0.0.2 + Trying 10.0.0.2... + Connected to 10.0.0.2. + Escape character is '^]'. + + NuttShell (NSH) NuttX-7.3 + nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard + nsh> exit + Connection closed by foreign host. + + NOTE: The auto-mounter is enabled by default in this + configuration. + + c. Then if you close the old media player window and bring up a + new one, you should see the .WAV files on the SD card in the lis + box. + + STATUS: Despite the comments above, WM8904 support has *NOT* yet + been enabled in this configuration. This is because it is not yet + working in the nxwm configuration. See the To-Do list at the + bottom of this README file. The current nxwm configuration is still + set up for the Rev C board using the "NULL" audio device. + + Things still to do: + + a. Currently the list box is not scrollable. So you will be + limited to the number .WAV files that will fit in the existing + list box (a scrollable list box class exists, but has not been + integrated into the media play demo). + + b. Although the lower level NxPlayer does support them, there are + no controls at the GUI for balance or tone/equalization. + + c. There is no visual indication of play status or end of playing. + + STATUS: + See the To-Do list below + + ramtest: + + This is a stripped down version of NSH that runs out of + internal SRAM. It configures SDRAM and supports only the RAM test + at apps/examples/ramtest. This configuration is useful for + bringing up SDRAM. + + NOTES: + + 1. This configuration uses the the USART3 for the serial console + which is available at the "DBGU" RS-232 connector (J24). That + is easily changed by reconfiguring to (1) enable a different + serial peripheral, and (2) selecting that serial peripheral as + the console device. + + 2. By default, this configuration is set up to build on Windows + under either a Cygwin or MSYS environment using a recent, Windows- + native, generic ARM EABI GCC toolchain (such as the CodeSourcery + toolchain). Both the build environment and the toolchain + selection can easily be changed by reconfiguring: + + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + If you are running on Linux, make *certain* that you have + CONFIG_HOST_LINUX=y *before* the first make or you will create a + corrupt configuration that may not be easy to recover from. See + the warning in the section "Information Common to All Configurations" + for further information. + + 3. This configuration executes out of internal SRAM flash and is + loaded into SRAM by the boot ROM SDRAM from NAND, Serial + DataFlash, SD card or from a TFTPC sever via the Boot ROM. + Data also is positioned in SRAM. + + Here are the steps that I use to execute this program in SRAM + using only the ROM Bootloader: + + a) Hold the DIS_BOOT button and + + b) With the DIS_BOOT button pressed, power cycle the board. A + reset does not seem to be sufficient. + + c) The serial should show RomBOOT in a terminal window (at 115200 + 8N1) and nothing more. + + d) Press ENTER in the terminal window a few times to enable JTAG. + + e) Start the Segger GDB server. It should successfully connect to + the board via JTAG (if JTAG was correctly enabled in step d)). + + f) Start GDB, connect, to the GDB server, load NuttX, and debug. + + gdb> target remote localhost:2331 + gdb> mon halt (don't do mon reset) + gdb> load nuttx + gdb> mon reg pc (make sure that the PC is 0x200040 + gdb> ... and debug ... + +To-Do List +========== + +1) Neither USB OHCI nor EHCI support Isochronous endpoints. Interrupt + endpoint support in the EHCI driver is untested (but works in similar + EHCI drivers). + +2) HSCMI. CONFIG_MMCSD_MULTIBLOCK_DISABLE=y is set to disable multi-block + transfers because of some issues that I saw during testing. The is very + low priority to me but might be important to you if you are need very + high performance SD card accesses. + +3) There is a kludge in place in the Ethernet code to work around a problem + that I see. The problem that I see is as follows: + + a. To send packets, the software keeps a queue of TX descriptors in + memory. + + b. When a packet is ready to be sent, the software clears bit 31 of a + status word in the descriptor meaning that the descriptor now + "belongs" to the hardware. + + c. The hardware sets bit 31 in memory when the transfer completes. + + The problem that I see is that: + + d. Occasionally bit 31 of the status word is not cleared even though + the Ethernet packet was successfully sent. + + Since the software does not see bit 31 set, it seems like the transfer + did not complete and the Ethernet locks up. + + The workaround/kludge that is in place makes this assumption: If an + Ethernet transfer complete interrupt is received, then at least one + packet must have completed. In this case, the software ignores + checking the USED bit for one packet. + + With this kludge in place, the driver appears to work fine. However, + there is a danger to what I have done: If a spurious interrupt + occurs, than the USED bit would not be set and the transfer would be + lost. + +4) Some drivers may require some adjustments if you intend to run from SDRAM. + That is because in this case macros like BOARD_MCK_FREQUENCY are not constants + but are instead function calls: The MCK clock frequency is not known in + advance but instead has to be calculated from the bootloader PLL configuration. + + As of this writing, all drivers have been converted to run from SDRAM except + for the PWM and the Timer/Counter drivers. These drivers use the + BOARD_MCK_FREQUENCY definition in more complex ways and will require some + minor redesign and re-testing before they can be available. + +5) The WM8904 is not usable on the Rev C version of the board due to some I2C + related issues. These issues seem to be resolved on the Rev E version of + the board. However, the WM8904 is still not function: + + a) With a logic analyzer I can see that the I2C writes to the WM8904 + device look good. This is the same setup that was used in the working + SAMA5D3x-EK nxplayer configuration and so should be correct (you + cannot even get this far on the Rev C board). + b) I2C readback of the WM8904 registers (via CONFIG_WM8904_REGDUMP) does + not, however, show proper registers contents. Groups of extra bits + (apparently 0x01fd) appear to be set in many registers on reading. + This is assumed to be some interference from some other device on the + I2C bus rather that errors in writing. This assumption is credible + since the bad bits appear immediately after resetting the WM8904 and + before anything has been written to it. + c) Also with the logic analyzer, I can that the 12MHz MCLK input is + being provided to the WM8904. + d) However, no bit clock (BLCK) is being generated by the WM8904. This + should appear on both AUDIO_TK0_PB27 and AUDIO_RK0_PB28, but I do not + see a clock on these pins. + e) With no BCLK, I would expect the SSC0 DMA transfers to hang... they do + not. No errors of any kind are detected by the firmware; it believes + that it is successfully playing .WAV files. This leads to believe + that there may be some schematic error. + e) There is, of course, no audio output. + + You can replace the WM8904 with the "NULL" audio driver by: + + CONFIG_AUDIO_WM8904=n : Disable the WM8904 + CONFIG_SAMA5_SSC0=n : Disable SSC0 + + CONFIG_AUDIO_NULL=y : Enable the NULL audio device + CONFIG_AUDIO_NULL_BUFFER_SIZE=8192 + CONFIG_AUDIO_NULL_MSG_PRIO=1 + CONFIG_AUDIO_NULL_NUM_BUFFERS=4 + CONFIG_AUDIO_NULL_WORKER_STACKSIZE=768 + CONFIG_AUDIO_NUM_BUFFERS=2 diff --git a/configs/sama5d4-ek/RunningNxWM.txt b/configs/sama5d4-ek/RunningNxWM.txt new file mode 100644 index 0000000000000000000000000000000000000000..a10660a65f09a8c94535889b940b19ebe1b1bdaf --- /dev/null +++ b/configs/sama5d4-ek/RunningNxWM.txt @@ -0,0 +1,112 @@ +Simplified instructions for Running the NxWM Demo: + +Prequisites: +=========== + +1. SAMA5D4-MB Rev. C board and power supply +2. TM7000 LCD panel +3. RS-232 NUL modem cable +4. Ethernet cross-over cable +5. USB "Boot" Keyboard +6. One each of a microSD card and a full size SD card. These should + be older style SD or SDHC cards. Some of the newest very high + capacity cards will not work. +7. The file dramboot.bin which is the NuttX boot program. It runs + from SRAM and will load the NuttX HEX binary from serial into + DRAM. +8. The NuttX HEX binary, nuttx.hex. + +References: +========== + +See the README.txt for much more detailed, technical information. + +Setup: +===== + +1. Make sure that the you a terminal like TeraTerm connected to the DB-9 + and configured to work at 11520 8N1. + +2. You should also connect a USB keyboard and the TM7000 LCD to the + SAMA5D4-MB Rev C. Note only USB "Boot" keyboards are supported. + +3. The binary has networking enabled. The network is configured to + work in my test environment so it does not use DHCP, rather the board + uses the fixed IP address of 10.0.0.2. It expects the host PC to + have the address 10.0.0.1. + + For testing, usually use a PC with two networks (one configured at + 115200 8N1) and an Ethernet crossover cable. + +4. A full size SD card with some sample .WAV files may be inserted in + HSMCI0 slot. These files will be accessed by the Media Player demo. + +If you do not connect a network to the board, the consequence will be an +extremely slow start up time. Ideally, network bring-up should occur on +a separate thread so that it does not interfere with the main application. +If you have the network connected, the start up will be quick. If there +is no network connected, it could take a long time to start (perhaps a +minute?). The delay is the time before the Ethernet driver decides to +fail the attempt to negotiate the link speed. + +Starting the Demo: +================= + +1. Copy dramboot.bin to a microSD card as boot.bin + +2. Inserted the microSD card in the HSMCI1 slot. + +3. Power cycle the board, you should see: + + RomBOOT + Send Intel HEX file now + +4. Send the NuttX file from the terminal. If you use TeraTerm, this is in + the "Files" menu as "Send file ..." + +5. When the file download completes, NuttX will start. + +Running the Demo: +================ + +When NuttX first starts, you will need to perform a touchscreen calibration: + +1. Touch the circular when you see the "Touch" or "Again" messages. + +2. Release the touch when you see the "OK" message. + +There are four points to be touched and the software will expect you to +touch each position twice. + +There is a NuttX configuration option that will allow you to save this +calibration file to FLASH or a file, but that option is not enabled in +this configuration. As you result, you have to do this calibration on +each boot. + +After that the Demo will start. The opening screen will show a taskbar +and tray to the left and the background with the NuttX logo. + +Touching the triange button in the taskbar will bring up the Start Window. +The start window holds icons for each installed application. For this demo +the following icons will be visible: + +1. Scales: This will perform touchscreen calibration again. + +2. NxTerm. This is will bring up a graphics terminal running the + NuttShell (NSH). You interact with NSH using the attached USB + keyboard. + +3. Calculator. A simple HEX calculator + +4. Media Player. This brings up the media player GUI. There is a list + box that shows all of the .WAV fails from the SD card that are available. + Touching the file name selects it. There are also controls to play, + pause, fast forward, rewind, and adjust the volume. + + Unfortunately in this version, the WM8904 audio CODEC is stubbed out so + you will not actually be able to heard any of the .WAV files that you + +Telnet access: +============== + +For better access to NSH, you can also Telnet to the target at address 10.0.0.2 diff --git a/configs/sama5d4-ek/at25boot/Make.defs b/configs/sama5d4-ek/at25boot/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..4bad9e5074af59259ecda4170732e0edf0ea8f18 --- /dev/null +++ b/configs/sama5d4-ek/at25boot/Make.defs @@ -0,0 +1,145 @@ +############################################################################ +# configs/sama5d4-ek/at25boot/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) +ifeq ($(CONFIG_SAMA5D4EK_DRAM_BOOT),y) + LDSCRIPT = dramboot.ld +else + LDSCRIPT = uboot.ld +endif +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d4-ek/at25boot/defconfig b/configs/sama5d4-ek/at25boot/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..cec1129ef6ebc896ea21b121c4a37e08aef6f4c3 --- /dev/null +++ b/configs/sama5d4-ek/at25boot/defconfig @@ -0,0 +1,926 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +CONFIG_ARMV7A_HAVE_L2CC=y +CONFIG_ARMV7A_HAVE_L2CC_PL310=y + +# +# L2 Cache Configuration +# +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# SAMA5 Configuration Options +# +CONFIG_SAMA5_HAVE_AESB=y +CONFIG_SAMA5_HAVE_ICM=y +# CONFIG_SAMA5_HAVE_RXLP is not set +CONFIG_SAMA5_HAVE_UART0=y +CONFIG_SAMA5_HAVE_UART1=y +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +CONFIG_SAMA5_HAVE_USART4=y +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +# CONFIG_SAMA5_HAVE_DMA is not set +CONFIG_SAMA5_HAVE_DDR32=y +CONFIG_SAMA5_HAVE_XDMA=y +CONFIG_SAMA5_HAVE_LCDC=y +# CONFIG_SAMA5_HAVE_GMAC is not set +# CONFIG_SAMA5_HAVE_EMACA is not set +CONFIG_SAMA5_HAVE_EMACB=y +CONFIG_SAMA5_HAVE_EMAC1=y +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +CONFIG_SAMA5_HAVE_SAIC=y +CONFIG_SAMA5_HAVE_SBM=y +CONFIG_SAMA5_HAVE_SFC=y +CONFIG_SAMA5_HAVE_SPI2=y +# CONFIG_SAMA5_HAVE_TC is not set +CONFIG_SAMA5_HAVE_TC1=y +CONFIG_SAMA5_HAVE_TC2=y +CONFIG_ARCH_HAVE_TRUSTZONE=y +CONFIG_SAMA5_HAVE_TWI3=y +CONFIG_SAMA5_HAVE_VDEC=y +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +# CONFIG_ARCH_CHIP_SAMA5D3 is not set +CONFIG_ARCH_CHIP_SAMA5D4=y +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D33 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +CONFIG_ARCH_CHIP_ATSAMA5D44=y + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_AESB is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +# CONFIG_SAMA5_RTC is not set +# CONFIG_SAMA5_ICM is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_SAIC is not set +# CONFIG_SAMA5_UART0 is not set +# CONFIG_SAMA5_UART1 is not set +# CONFIG_SAMA5_USART0 is not set +# CONFIG_SAMA5_USART1 is not set +# CONFIG_SAMA5_USART2 is not set +CONFIG_SAMA5_USART3=y +# CONFIG_SAMA5_USART4 is not set +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_TWI3 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SBM is not set +# CONFIG_SAMA5_SFC is not set +CONFIG_SAMA5_SPI0=y +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_SPI2 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_TC1 is not set +# CONFIG_SAMA5_TC2 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +# CONFIG_SAMA5_XDMAC0 is not set +# CONFIG_SAMA5_XDMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_EMACB is not set +# CONFIG_SAMA5_EMAC0 is not set +# CONFIG_SAMA5_EMAC1 is not set +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_SHA is not set +# CONFIG_SAMA5_TRNG is not set +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +CONFIG_SAMA5_MPDDRC=y +# CONFIG_SAMA5_VDEC is not set +# CONFIG_SAMA5_PIO_IRQ is not set + +# +# SPI device driver options +# + +# +# External Memory Configuration +# +CONFIG_SAMA5_DDRCS=y +CONFIG_SAMA5_DDRCS_SIZE=268435456 +# CONFIG_SAMA5_DDRCS_LPDDR1 is not set +CONFIG_SAMA5_DDRCS_LPDDR2=y +# CONFIG_SAMA5_EBICS0 is not set +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +CONFIG_SAMA5_BOOT_ISRAM=y +# CONFIG_SAMA5_BOOT_SDRAM is not set + +# +# Heap Configuration +# +CONFIG_SAMA5_DDRCS_HEAP=y +CONFIG_SAMA5_DDRCS_HEAP_OFFSET=0 +CONFIG_SAMA5_DDRCS_HEAP_SIZE=0 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=65775 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00200000 +CONFIG_RAM_VSTART=0x00200000 +CONFIG_RAM_SIZE=114688 +CONFIG_ARCH_HAVE_SDRAM=y +# CONFIG_BOOT_SDRAM_DATA is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D4_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d4-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +CONFIG_SAMA5D4_MB_REVC=y +# CONFIG_SAMA5D4_MB_REVE is not set +# CONFIG_SAMA5D4EK_384MHZ is not set +# CONFIG_SAMA5D4EK_396MHZ is not set +CONFIG_SAMA5D4EK_528MHZ=y +CONFIG_SAMA5D4EK_MT47H128M16RT=y +# CONFIG_SAMA5D4EK_MT47H64M16HR is not set +# CONFIG_SAMA5D4EK_DRAM_MAIN is not set +CONFIG_SAMA5D4EK_AT25_MAIN=y +CONFIG_SAMA5D4EK_AT25_PROGSIZE=131072 +CONFIG_SAMA5D4EK_AT25_BLOCKMOUNT=y +# CONFIG_SAMA5D4EK_AT25_FTL is not set +CONFIG_SAMA5D4EK_AT25_CHARDEV=y +# CONFIG_SAMA5D4EK_SLOWCLOCK is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=31 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="at25_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +CONFIG_MTD_AT25=y +CONFIG_AT25_SPIMODE=0 +CONFIG_AT25_SPIFREQUENCY=20000000 +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +CONFIG_SYSTEM_HEX2BIN=y +# CONFIG_SYSTEM_HEX2BIN_DEBUG is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d4-ek/at25boot/setenv.sh b/configs/sama5d4-ek/at25boot/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..46b09fdf03e9f8e6a0f1b084b1a0cb44d581549a --- /dev/null +++ b/configs/sama5d4-ek/at25boot/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d4-ek/at25boot/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d4-ek/bridge/Make.defs b/configs/sama5d4-ek/bridge/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..254381fd843df38713aa5343be8b635fa10adcc8 --- /dev/null +++ b/configs/sama5d4-ek/bridge/Make.defs @@ -0,0 +1,145 @@ +############################################################################ +# configs/sama5d4-ek/bridge/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) +ifeq ($(CONFIG_SAMA5D4EK_DRAM_BOOT),y) + LDSCRIPT = dramboot.ld +else + LDSCRIPT = uboot.ld +endif +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d4-ek/bridge/defconfig b/configs/sama5d4-ek/bridge/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..39d09056da1320e76c8579860c4b1a0c8b4dcd6e --- /dev/null +++ b/configs/sama5d4-ek/bridge/defconfig @@ -0,0 +1,1114 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +CONFIG_ARMV7A_HAVE_L2CC=y +CONFIG_ARMV7A_HAVE_L2CC_PL310=y + +# +# L2 Cache Configuration +# +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# SAMA5 Configuration Options +# +CONFIG_SAMA5_HAVE_AESB=y +CONFIG_SAMA5_HAVE_ICM=y +# CONFIG_SAMA5_HAVE_RXLP is not set +CONFIG_SAMA5_HAVE_UART0=y +CONFIG_SAMA5_HAVE_UART1=y +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +CONFIG_SAMA5_HAVE_USART4=y +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +# CONFIG_SAMA5_HAVE_DMA is not set +CONFIG_SAMA5_HAVE_DDR32=y +CONFIG_SAMA5_HAVE_XDMA=y +CONFIG_SAMA5_HAVE_LCDC=y +# CONFIG_SAMA5_HAVE_GMAC is not set +# CONFIG_SAMA5_HAVE_EMACA is not set +CONFIG_SAMA5_HAVE_EMACB=y +CONFIG_SAMA5_HAVE_EMAC1=y +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +CONFIG_SAMA5_HAVE_SAIC=y +CONFIG_SAMA5_HAVE_SBM=y +CONFIG_SAMA5_HAVE_SFC=y +CONFIG_SAMA5_HAVE_SPI2=y +# CONFIG_SAMA5_HAVE_TC is not set +CONFIG_SAMA5_HAVE_TC1=y +CONFIG_SAMA5_HAVE_TC2=y +CONFIG_ARCH_HAVE_TRUSTZONE=y +CONFIG_SAMA5_HAVE_TWI3=y +CONFIG_SAMA5_HAVE_VDEC=y +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +# CONFIG_ARCH_CHIP_SAMA5D3 is not set +CONFIG_ARCH_CHIP_SAMA5D4=y +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D33 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +CONFIG_ARCH_CHIP_ATSAMA5D44=y + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_AESB is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +# CONFIG_SAMA5_RTC is not set +# CONFIG_SAMA5_ICM is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_SAIC is not set +# CONFIG_SAMA5_UART0 is not set +# CONFIG_SAMA5_UART1 is not set +# CONFIG_SAMA5_USART0 is not set +# CONFIG_SAMA5_USART1 is not set +# CONFIG_SAMA5_USART2 is not set +CONFIG_SAMA5_USART3=y +# CONFIG_SAMA5_USART4 is not set +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_TWI3 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SBM is not set +# CONFIG_SAMA5_SFC is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_SPI2 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_TC1 is not set +# CONFIG_SAMA5_TC2 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +# CONFIG_SAMA5_XDMAC0 is not set +# CONFIG_SAMA5_XDMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +CONFIG_SAMA5_EMACB=y +CONFIG_SAMA5_EMAC0=y +CONFIG_SAMA5_EMAC1=y +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_SHA is not set +# CONFIG_SAMA5_TRNG is not set +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +# CONFIG_SAMA5_MPDDRC is not set +# CONFIG_SAMA5_VDEC is not set +# CONFIG_SAMA5_PIO_IRQ is not set + +# +# EMAC device driver options +# + +# +# EMAC0 device driver options +# +CONFIG_SAMA5_EMAC0_NRXBUFFERS=16 +CONFIG_SAMA5_EMAC0_NTXBUFFERS=8 +CONFIG_SAMA5_EMAC0_PHYADDR=1 +# CONFIG_SAMA5_EMAC0_PHYINIT is not set +# CONFIG_SAMA5_EMAC0_MII is not set +CONFIG_SAMA5_EMAC0_RMII=y +CONFIG_SAMA5_EMAC0_AUTONEG=y +CONFIG_SAMA5_EMAC0_PHYSR=30 +CONFIG_SAMA5_EMAC0_PHYSR_ALTCONFIG=y +CONFIG_SAMA5_EMAC0_PHYSR_ALTMODE=0x7 +CONFIG_SAMA5_EMAC0_PHYSR_10HD=0x1 +CONFIG_SAMA5_EMAC0_PHYSR_100HD=0x2 +CONFIG_SAMA5_EMAC0_PHYSR_10FD=0x5 +CONFIG_SAMA5_EMAC0_PHYSR_100FD=0x6 + +# +# EMAC1 device driver options +# +CONFIG_SAMA5_EMAC1_NRXBUFFERS=16 +CONFIG_SAMA5_EMAC1_NTXBUFFERS=8 +CONFIG_SAMA5_EMAC1_PHYADDR=1 +# CONFIG_SAMA5_EMAC1_PHYINIT is not set +# CONFIG_SAMA5_EMAC1_MII is not set +CONFIG_SAMA5_EMAC1_RMII=y +CONFIG_SAMA5_EMAC1_AUTONEG=y +CONFIG_SAMA5_EMAC1_PHYSR=30 +CONFIG_SAMA5_EMAC1_PHYSR_ALTCONFIG=y +CONFIG_SAMA5_EMAC1_PHYSR_ALTMODE=0x7 +CONFIG_SAMA5_EMAC1_PHYSR_10HD=0x1 +CONFIG_SAMA5_EMAC1_PHYSR_100HD=0x2 +CONFIG_SAMA5_EMAC1_PHYSR_10FD=0x5 +CONFIG_SAMA5_EMAC1_PHYSR_100FD=0x6 +# CONFIG_SAMA5_EMACB_PREALLOCATE is not set +# CONFIG_SAMA5_EMACB_NBC is not set +CONFIG_SAMA5_EMAC0_ISETH0=y +# CONFIG_SAMA5_EMAC1_ISETH0 is not set + +# +# External Memory Configuration +# +# CONFIG_SAMA5_EBICS0 is not set +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +CONFIG_SAMA5_BOOT_SDRAM=y + +# +# Heap Configuration +# +# CONFIG_SAMA5_ISRAM_HEAP is not set +# CONFIG_SAMA5_DDRCS_RESERVE is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=65775 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_VSTART=0x20000000 +CONFIG_RAM_SIZE=268435456 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D4_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d4-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_SAMA5D4_MB_REVC is not set +CONFIG_SAMA5D4_MB_REVE=y +# CONFIG_SAMA5D4EK_384MHZ is not set +# CONFIG_SAMA5D4EK_396MHZ is not set +CONFIG_SAMA5D4EK_528MHZ=y +CONFIG_SAMA5D4EK_DRAM_BOOT=y +# CONFIG_SAMA5D4EK_SLOWCLOCK is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=17 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="bridge_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_MULTINIC=y +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +CONFIG_ARCH_PHY_INTERRUPT=y +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +CONFIG_ETH0_PHY_KSZ8081=y +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_ETH1_PHY_NONE is not set +# CONFIG_ETH1_PHY_AM79C874 is not set +# CONFIG_ETH1_PHY_KS8721 is not set +# CONFIG_ETH1_PHY_KSZ8041 is not set +# CONFIG_ETH1_PHY_KSZ8051 is not set +CONFIG_ETH1_PHY_KSZ8081=y +# CONFIG_ETH1_PHY_KSZ90x1 is not set +# CONFIG_ETH1_PHY_DP83848C is not set +# CONFIG_ETH1_PHY_LAN8720 is not set +# CONFIG_ETH1_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +# CONFIG_NET_TCP is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +# CONFIG_NET_UDP_CHECKSUMS is not set +CONFIG_NET_UDP_CONNS=16 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +# CONFIG_NET_UDP_READAHEAD is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +# CONFIG_NET_IOB is not set +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set +# CONFIG_NETDB_DNSCLIENT is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BRIDGE=y + +# +# Network 1 configuration +# +CONFIG_EXAMPLES_BRIDGE_NET1_IFNAME="eth0" +CONFIG_EXAMPLES_BRIDGE_NET1_RECVPORT=5471 +CONFIG_EXAMPLES_BRIDGE_NET1_IOBUFIZE=1024 +# CONFIG_EXAMPLES_BRIDGE_NET1_DHCPC is not set +CONFIG_EXAMPLES_BRIDGE_NET1_NOMAC=y +CONFIG_EXAMPLES_BRIDGE_NET1_MACADDR=0x00e0deadbeef +CONFIG_EXAMPLES_BRIDGE_NET1_IPADDR=0x0a000002 +CONFIG_EXAMPLES_BRIDGE_NET1_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_BRIDGE_NET1_NETMASK=0xffffff00 +CONFIG_EXAMPLES_BRIDGE_NET1_IPHOST=0x0a000001 +CONFIG_EXAMPLES_BRIDGE_NET1_HOSTPORT=5472 +CONFIG_EXAMPLES_BRIDGE_NET1_STACKSIZE=2048 +CONFIG_EXAMPLES_BRIDGE_NET1_PRIORITY=100 + +# +# Network 2 configuration +# +CONFIG_EXAMPLES_BRIDGE_NET2_IFNAME="eth1" +CONFIG_EXAMPLES_BRIDGE_NET2_RECVPORT=5473 +CONFIG_EXAMPLES_BRIDGE_NET2_IOBUFIZE=1024 +# CONFIG_EXAMPLES_BRIDGE_NET2_DHCPC is not set +CONFIG_EXAMPLES_BRIDGE_NET2_NOMAC=y +CONFIG_EXAMPLES_BRIDGE_NET2_MACADDR=0x00e0f00dface +CONFIG_EXAMPLES_BRIDGE_NET2_IPADDR=0x0a000003 +CONFIG_EXAMPLES_BRIDGE_NET2_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_BRIDGE_NET2_NETMASK=0xffffff00 +CONFIG_EXAMPLES_BRIDGE_NET2_IPHOST=0x0a000001 +CONFIG_EXAMPLES_BRIDGE_NET2_HOSTPORT=5474 +CONFIG_EXAMPLES_BRIDGE_NET2_STACKSIZE=2048 +CONFIG_EXAMPLES_BRIDGE_NET2_PRIORITY=100 +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +CONFIG_SYSTEM_RAMTEST=y +# CONFIG_READLINE_HAVE_EXTMATCH is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d4-ek/bridge/setenv.sh b/configs/sama5d4-ek/bridge/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..6e79738d83ed659054f3857cb8fa938a07e92a48 --- /dev/null +++ b/configs/sama5d4-ek/bridge/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d4-ek/bridge/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d4-ek/dramboot/Make.defs b/configs/sama5d4-ek/dramboot/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f142b56bb93bbafe26fe11ae6c28d26d5615933b --- /dev/null +++ b/configs/sama5d4-ek/dramboot/Make.defs @@ -0,0 +1,145 @@ +############################################################################ +# configs/sama5d4-ek/dramboot/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) +ifeq ($(CONFIG_SAMA5D4EK_DRAM_BOOT),y) + LDSCRIPT = dramboot.ld +else + LDSCRIPT = uboot.ld +endif +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d4-ek/dramboot/defconfig b/configs/sama5d4-ek/dramboot/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..05daad298edc123ebafac7015033df52861e2239 --- /dev/null +++ b/configs/sama5d4-ek/dramboot/defconfig @@ -0,0 +1,883 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +CONFIG_ARMV7A_HAVE_L2CC=y +CONFIG_ARMV7A_HAVE_L2CC_PL310=y + +# +# L2 Cache Configuration +# +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# SAMA5 Configuration Options +# +CONFIG_SAMA5_HAVE_AESB=y +CONFIG_SAMA5_HAVE_ICM=y +# CONFIG_SAMA5_HAVE_RXLP is not set +CONFIG_SAMA5_HAVE_UART0=y +CONFIG_SAMA5_HAVE_UART1=y +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +CONFIG_SAMA5_HAVE_USART4=y +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +# CONFIG_SAMA5_HAVE_DMA is not set +CONFIG_SAMA5_HAVE_DDR32=y +CONFIG_SAMA5_HAVE_XDMA=y +CONFIG_SAMA5_HAVE_LCDC=y +# CONFIG_SAMA5_HAVE_GMAC is not set +# CONFIG_SAMA5_HAVE_EMACA is not set +CONFIG_SAMA5_HAVE_EMACB=y +CONFIG_SAMA5_HAVE_EMAC1=y +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +CONFIG_SAMA5_HAVE_SAIC=y +CONFIG_SAMA5_HAVE_SBM=y +CONFIG_SAMA5_HAVE_SFC=y +CONFIG_SAMA5_HAVE_SPI2=y +# CONFIG_SAMA5_HAVE_TC is not set +CONFIG_SAMA5_HAVE_TC1=y +CONFIG_SAMA5_HAVE_TC2=y +CONFIG_ARCH_HAVE_TRUSTZONE=y +CONFIG_SAMA5_HAVE_TWI3=y +CONFIG_SAMA5_HAVE_VDEC=y +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +# CONFIG_ARCH_CHIP_SAMA5D3 is not set +CONFIG_ARCH_CHIP_SAMA5D4=y +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D33 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +CONFIG_ARCH_CHIP_ATSAMA5D44=y + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_AESB is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +# CONFIG_SAMA5_RTC is not set +# CONFIG_SAMA5_ICM is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_SAIC is not set +# CONFIG_SAMA5_UART0 is not set +# CONFIG_SAMA5_UART1 is not set +# CONFIG_SAMA5_USART0 is not set +# CONFIG_SAMA5_USART1 is not set +# CONFIG_SAMA5_USART2 is not set +CONFIG_SAMA5_USART3=y +# CONFIG_SAMA5_USART4 is not set +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_TWI3 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SBM is not set +# CONFIG_SAMA5_SFC is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_SPI2 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_TC1 is not set +# CONFIG_SAMA5_TC2 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +# CONFIG_SAMA5_XDMAC0 is not set +# CONFIG_SAMA5_XDMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_EMACB is not set +# CONFIG_SAMA5_EMAC0 is not set +# CONFIG_SAMA5_EMAC1 is not set +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_SHA is not set +# CONFIG_SAMA5_TRNG is not set +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +CONFIG_SAMA5_MPDDRC=y +# CONFIG_SAMA5_VDEC is not set +# CONFIG_SAMA5_PIO_IRQ is not set + +# +# External Memory Configuration +# +CONFIG_SAMA5_DDRCS=y +CONFIG_SAMA5_DDRCS_SIZE=268435456 +# CONFIG_SAMA5_DDRCS_LPDDR1 is not set +CONFIG_SAMA5_DDRCS_LPDDR2=y +# CONFIG_SAMA5_EBICS0 is not set +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +CONFIG_SAMA5_BOOT_ISRAM=y +# CONFIG_SAMA5_BOOT_SDRAM is not set + +# +# Heap Configuration +# +CONFIG_SAMA5_DDRCS_HEAP=y +CONFIG_SAMA5_DDRCS_HEAP_OFFSET=0 +CONFIG_SAMA5_DDRCS_HEAP_SIZE=0 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=65775 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00200000 +CONFIG_RAM_VSTART=0x00200000 +CONFIG_RAM_SIZE=114688 +CONFIG_ARCH_HAVE_SDRAM=y +# CONFIG_BOOT_SDRAM_DATA is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D4_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d4-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +CONFIG_SAMA5D4_MB_REVC=y +# CONFIG_SAMA5D4_MB_REVE is not set +# CONFIG_SAMA5D4EK_384MHZ is not set +# CONFIG_SAMA5D4EK_396MHZ is not set +CONFIG_SAMA5D4EK_528MHZ=y +CONFIG_SAMA5D4EK_MT47H128M16RT=y +# CONFIG_SAMA5D4EK_MT47H64M16HR is not set +CONFIG_SAMA5D4EK_DRAM_MAIN=y +# CONFIG_SAMA5D4EK_DRAM_START is not set +# CONFIG_SAMA5D4EK_AT25_MAIN is not set +# CONFIG_SAMA5D4EK_SLOWCLOCK is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=31 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="dram_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +CONFIG_SYSTEM_HEX2BIN=y +# CONFIG_SYSTEM_HEX2BIN_DEBUG is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d4-ek/dramboot/setenv.sh b/configs/sama5d4-ek/dramboot/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..5134c0db472c4ece6c44967cb36f65342abb808a --- /dev/null +++ b/configs/sama5d4-ek/dramboot/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d4-ek/dramboot/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d4-ek/elf/Make.defs b/configs/sama5d4-ek/elf/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..9708ba3786a67e43f92d121a99073a323b3f660b --- /dev/null +++ b/configs/sama5d4-ek/elf/Make.defs @@ -0,0 +1,145 @@ +############################################################################ +# configs/sama5d4-ek/elf/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) +ifeq ($(CONFIG_SAMA5D4EK_DRAM_BOOT),y) + LDSCRIPT = dramboot.ld +else + LDSCRIPT = uboot.ld +endif +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d4-ek/elf/defconfig b/configs/sama5d4-ek/elf/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..3ac09f52df660f0f94ad25165889f8161ec19b41 --- /dev/null +++ b/configs/sama5d4-ek/elf/defconfig @@ -0,0 +1,936 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +CONFIG_EXPERIMENTAL=y +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_KERNEL is not set +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +CONFIG_ARMV7A_HAVE_L2CC=y +CONFIG_ARMV7A_HAVE_L2CC_PL310=y + +# +# L2 Cache Configuration +# +# CONFIG_ARMV7A_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# SAMA5 Configuration Options +# +CONFIG_SAMA5_HAVE_AESB=y +CONFIG_SAMA5_HAVE_ICM=y +# CONFIG_SAMA5_HAVE_RXLP is not set +CONFIG_SAMA5_HAVE_UART0=y +CONFIG_SAMA5_HAVE_UART1=y +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +CONFIG_SAMA5_HAVE_USART4=y +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +# CONFIG_SAMA5_HAVE_DMA is not set +CONFIG_SAMA5_HAVE_DDR32=y +CONFIG_SAMA5_HAVE_XDMA=y +CONFIG_SAMA5_HAVE_LCDC=y +# CONFIG_SAMA5_HAVE_GMAC is not set +# CONFIG_SAMA5_HAVE_EMACA is not set +CONFIG_SAMA5_HAVE_EMACB=y +CONFIG_SAMA5_HAVE_EMAC1=y +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +CONFIG_SAMA5_HAVE_SAIC=y +CONFIG_SAMA5_HAVE_SBM=y +CONFIG_SAMA5_HAVE_SFC=y +CONFIG_SAMA5_HAVE_SPI2=y +# CONFIG_SAMA5_HAVE_TC is not set +CONFIG_SAMA5_HAVE_TC1=y +CONFIG_SAMA5_HAVE_TC2=y +CONFIG_ARCH_HAVE_TRUSTZONE=y +CONFIG_SAMA5_HAVE_TWI3=y +CONFIG_SAMA5_HAVE_VDEC=y +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +# CONFIG_ARCH_CHIP_SAMA5D3 is not set +CONFIG_ARCH_CHIP_SAMA5D4=y +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D33 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +CONFIG_ARCH_CHIP_ATSAMA5D44=y + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_AESB is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +CONFIG_SAMA5_RTC=y +# CONFIG_SAMA5_ICM is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_SAIC is not set +# CONFIG_SAMA5_UART0 is not set +# CONFIG_SAMA5_UART1 is not set +# CONFIG_SAMA5_USART0 is not set +# CONFIG_SAMA5_USART1 is not set +# CONFIG_SAMA5_USART2 is not set +CONFIG_SAMA5_USART3=y +CONFIG_SAMA5_USART4=y +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_TWI3 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SBM is not set +# CONFIG_SAMA5_SFC is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_SPI2 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_TC1 is not set +# CONFIG_SAMA5_TC2 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +# CONFIG_SAMA5_XDMAC0 is not set +# CONFIG_SAMA5_XDMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_EMACB is not set +# CONFIG_SAMA5_EMAC0 is not set +# CONFIG_SAMA5_EMAC1 is not set +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_SHA is not set +CONFIG_SAMA5_TRNG=y +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +# CONFIG_SAMA5_MPDDRC is not set +# CONFIG_SAMA5_VDEC is not set +# CONFIG_SAMA5_PIO_IRQ is not set + +# +# External Memory Configuration +# +# CONFIG_SAMA5_EBICS0 is not set +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +CONFIG_SAMA5_BOOT_SDRAM=y + +# +# Heap Configuration +# +CONFIG_SAMA5_ISRAM_HEAP=y +CONFIG_SAMA5_DDRCS_RESERVE=y +CONFIG_SAMA5_DDRCS_HEAP_END=0x28000000 +CONFIG_SAMA5_DDRCS_PGHEAP=y +CONFIG_SAMA5_DDRCS_PGHEAP_OFFSET=0x08000000 +CONFIG_SAMA5_DDRCS_PGHEAP_SIZE=134217728 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +CONFIG_ARCH_HAVE_COHERENT_DCACHE=y +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +CONFIG_ARCH_ADDRENV=y +CONFIG_ARCH_TEXT_VBASE=0x80000000 +CONFIG_ARCH_DATA_VBASE=0x80100000 +CONFIG_ARCH_HEAP_VBASE=0x80200000 +CONFIG_ARCH_TEXT_NPAGES=256 +CONFIG_ARCH_DATA_NPAGES=256 +CONFIG_ARCH_HEAP_NPAGES=256 +CONFIG_ARCH_PGPOOL_MAPPING=y +CONFIG_ARCH_PGPOOL_PBASE=0x28000000 +CONFIG_ARCH_PGPOOL_VBASE=0x28000000 +CONFIG_ARCH_PGPOOL_SIZE=134217728 +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=65775 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_VSTART=0x20000000 +CONFIG_RAM_SIZE=268435456 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D4_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d4-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y + +# +# Board-Specific Options +# +CONFIG_SAMA5D4_MB_REVC=y +# CONFIG_SAMA5D4_MB_REVE is not set +# CONFIG_SAMA5D4EK_384MHZ is not set +# CONFIG_SAMA5D4EK_396MHZ is not set +CONFIG_SAMA5D4EK_528MHZ=y +CONFIG_SAMA5D4EK_DRAM_BOOT=y +# CONFIG_SAMA5D4EK_ROMFS_MOUNT is not set +# CONFIG_SAMA5D4EK_SLOWCLOCK is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_SPINLOCK is not set +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="elf_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +CONFIG_LIB_SYSCALL=y +CONFIG_SYS_RESERVED=1 +CONFIG_SYS_NNEST=2 + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +CONFIG_I2C_RESET=y +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +CONFIG_AUDIO_DEVICES=y +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +CONFIG_ARCH_HAVE_USART4=y +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_USART4_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_USART4_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set + +# +# USART4 Configuration +# +CONFIG_USART4_RXBUFSIZE=256 +CONFIG_USART4_TXBUFSIZE=256 +CONFIG_USART4_BAUD=115200 +CONFIG_USART4_BITS=8 +CONFIG_USART4_PARITY=0 +CONFIG_USART4_2STOP=0 +# CONFIG_USART4_IFLOWCONTROL is not set +# CONFIG_USART4_OFLOWCONTROL is not set +# CONFIG_USART4_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +CONFIG_GRAN=y +CONFIG_GRAN_SINGLE=y +# CONFIG_GRAN_INTR is not set +CONFIG_MM_PGALLOC=y +CONFIG_MM_PGSIZE=4096 + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# +# CONFIG_WIRELESS is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +CONFIG_ELF=y +CONFIG_ELF_ALIGN_LOG2=2 +CONFIG_ELF_STACKSIZE=2048 +CONFIG_ELF_BUFFERSIZE=128 +CONFIG_ELF_BUFFERINCR=32 +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +CONFIG_EXAMPLES_ELF=y +CONFIG_EXAMPLES_ELF_SYSCALL=y +# CONFIG_EXAMPLES_ELF_LIBC is not set +CONFIG_EXAMPLES_ELF_DEVMINOR=0 +CONFIG_EXAMPLES_ELF_DEVPATH="/dev/ram0" +CONFIG_EXAMPLES_ELF_CXXINITIALIZE=y +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d4-ek/elf/setenv.sh b/configs/sama5d4-ek/elf/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..8fb6aed56c181132a63aed71c64013b9e84ad573 --- /dev/null +++ b/configs/sama5d4-ek/elf/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d4-ek/elf/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d4-ek/include/.gitignore b/configs/sama5d4-ek/include/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..0558284d5110fc92af69839ff0d1bf1d9bb1e293 --- /dev/null +++ b/configs/sama5d4-ek/include/.gitignore @@ -0,0 +1 @@ +/boot_romfsimg.h \ No newline at end of file diff --git a/configs/sama5d4-ek/include/board.h b/configs/sama5d4-ek/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..4adea19bc875ba79cff77816eedd09b90f6dfc4b --- /dev/null +++ b/configs/sama5d4-ek/include/board.h @@ -0,0 +1,312 @@ +/************************************************************************************ + * configs/sama5d4-ek/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_H +#define __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + */ + +/* On-board crystal frequencies */ + +#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */ +#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */ + +#if defined(CONFIG_SAMA5_BOOT_SDRAM) +/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader. + * That bootloader had to have already configured the PLL and SDRAM for proper + * operation. + * + * In this case, we don not reconfigure the clocking. Rather, we need to query + * the register settings to determine the clock frequencies. We can only assume that + * the Main clock source is the on-board 12MHz crystal. + */ + +# include + +#elif defined(CONFIG_SAMA5D4EK_384MHZ) +/* OHCI Only. This is an alternative slower configuration that will produce a 48MHz + * USB clock with the required accuracy using only PLLA. When PPLA is used to clock + * OHCI, an additional requirement is the PLLACK be a multiple of 48MHz. This setup + * results in a CPU clock of 384MHz. + * + * This case is only interesting for experimentation. + */ + +# include + +#elif defined(CONFIG_SAMA5D4EK_528MHZ) +/* This is the configuration results in a CPU clock of 528MHz. + * + * In this configuration, UPLL is the source of the UHPHS clock (if enabled). + */ + +# include + +#else /* #elif defined(CONFIG_SAMA5D4EK_396MHZ) */ +/* This is the configuration provided in the Atmel example code. This setup results + * in a CPU clock of 396MHz. + * + * In this configuration, UPLL is the source of the UHPHS clock (if enabled). + */ + +# include + +#endif + +/* LED definitions ******************************************************************/ +/* There are 3 LEDs on the SAMA5D4-EK: + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D4 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PE28/NWAIT/RTS4/A19 1Wire_PE28 1-WIRE ROM, LCD, D8 (green) + * PE8/A8/TCLK3/PWML3 LED_USER_PE8 LED_USER (D10) + * PE9/A9/TIOA2 LED_POWER_PE9 LED_POWER (D9, Red) + * ------------------------------ ------------------- ------------------------- + * + * - D8: D8 is shared with other functions and cannot be used if the 1-Wire ROM + * is used. I am not sure of the LCD function, but the LED may not be available + * if the LCD is used either. We will avoid using D8 just for simplicity. + * - D10: Nothing special here. A low output illuminates. + * - D9: The Power ON LED. Connects to the via an IRLML2502 MOSFET. This LED will + * be on when power is applied but otherwise a low output value will turn it + * off. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_USER 0 +#define BOARD_POWER 1 +#define BOARD_NLEDS 2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_USER_BIT (1 << BOARD_BLUE) +#define BOARD_POWER_BIT (1 << BOARD_RED) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL Val Meaning LED state + * Blue Red + * ----------------- --- ----------------------- -------- -------- */ +#define LED_STARTED 0 /* NuttX has been started OFF OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON OFF */ +#define LED_INIRQ 2 /* In an interrupt No change */ +#define LED_SIGNAL 2 /* In a signal handler No change */ +#define LED_ASSERTION 2 /* An assertion failed No change */ +#define LED_PANIC 3 /* The system has crashed OFF Blinking */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* Thus if the D0 and D9 are statically on, NuttX has successfully booted and + * is, apparently, running normally. If the red D9 LED is flashing at + * approximately 2Hz, then a fatal error has been detected and the system + * has halted. + */ + +/* Button definitions ***************************************************************/ +/* A single button, PB_USER1 (PB2), is available on the SAMA5D4-EK: + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D4 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PE13/A13/TIOB1/PWML2 PB_USER1_PE13 PB_USER1 + * ------------------------------ ------------------- ------------------------- + * + * Closing JP2 will bring PE13 to ground so 1) PE13 should have a weak pull-up, + * and 2) when PB2 is pressed, a low value will be senses. + */ + +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 + +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* LCD Interface, Geometry and Timing ***********************************************/ +/* This configuration applies only to the TM7000 LCD/Touchscreen module. Other LCDs + * will require changes. + * + * NOTE: The TM7000 user manual claims that the hardware interface is 18-bit RGB666. + * If you select that, you will get a very pink display (because the upper, "red" + * bits floating high). By trial and error, the 24-bit select was found to produce + * the correct color output. + * + * NOTE: Timings come from the smaller SAMA5D3x-EK LCD and have not been optimized + * for this display. + */ + +#define BOARD_LCDC_OUTPUT_BPP 24 /* Output format to H/W is 24 bpp RGB888 */ +#define BOARD_LCDC_WIDTH 800 /* Display width (pixels) */ +#define BOARD_LCDC_HEIGHT 480 /* Display height (rows) */ +#define BOARD_LCDC_MCK_MUL2 1 /* Source clock is 2*Mck (vs Mck) */ +#define BOARD_LCDC_PIXCLK_INV 1 /* Invert pixel clock, use falling edge */ +#define BOARD_LCDC_GUARDTIME 9 /* Guard time (frames) */ +#define BOARD_LCDC_VSPW 2 /* Vertical pulse width (lines) */ +#define BOARD_LCDC_HSPW 128 /* Horizontal pulse width (LCDDOTCLK) */ +#define BOARD_LCDC_VFPW 37 /* Vertical front porch (lines) */ +#define BOARD_LCDC_VBPW 8 /* Vertical back porch (lines) */ +#define BOARD_LCDC_HFPW 168 /* Horizontal front porch (LCDDOTCLK) */ +#define BOARD_LCDC_HBPW 88 /* Horizontal back porch (LCDDOTCLK) */ + +/* Pixel clock rate in Hz (HS period * VS period * BOARD_LCDC_FRAMERATE). */ + +#define BOARD_LCDC_FRAMERATE 40 /* Frame rate in Hz */ +#define BOARD_LCDC_HSPERIOD \ + (BOARD_LCDC_HSPW + BOARD_LCDC_HBPW + BOARD_LCDC_WIDTH + BOARD_LCDC_HFPW) +#define BOARD_LCDC_VSPERIOD \ + (BOARD_LCDC_VSPW + BOARD_LCDC_VBPW + BOARD_LCDC_HEIGHT + BOARD_LCDC_VFPW) +#define BOARD_LCDC_PIXELCLOCK \ + (BOARD_LCDC_HSPERIOD * BOARD_LCDC_VSPERIOD * BOARD_LCDC_FRAMERATE) + +/* Backlight prescaler value and PWM output polarity */ + +#define BOARD_LCDC_PWMPS LCDC_LCDCFG6_PWMPS_DIV1 +#define BOARD_LCDC_PWMPOL LCDC_LCDCFG6_PWMPOL + +/* NAND *****************************************************************************/ + +/* Address for transferring command bytes to the nandflash, CLE A22*/ + +#define BOARD_EBICS3_NAND_CMDADDR 0x60400000 + +/* Address for transferring address bytes to the nandflash, ALE A21*/ + +#define BOARD_EBICS3_NAND_ADDRADDR 0x60200000 + +/* Address for transferring data bytes to the nandflash.*/ + +#define BOARD_EBICS3_NAND_DATAADDR 0x60000000 + +/* Pin disambiguation ***************************************************************/ +/* Alternative pin selections are provided with a numeric suffix like _1, _2, etc. + * Drivers, however, will use the pin selection without the numeric suffix. + * Additional definitions are required in this board.h file. For example, if we + * wanted the PCK0on PB26, then the following definition should appear in the + * board.h header file for that board: + * + * #define PIO_PMC_PCK0 PIO_PMC_PCK0_1 + * + * The PCK logic will then automatically configure PB26 as the PCK0 pin. + */ + +/* SSC0 TD is provided on PB28 */ + +#define PIO_SSC0_TD PIO_SSC0_TD_2 + +/* PCK2 is provides the MCLK to the WM8904 audio CODEC via PB10 */ + +#define PIO_PMC_PCK2 PIO_PMC_PCK2_1 + +/* PCK0 and PCK1 are not currently used, but the PCK logic wants these definitions + * anyway. The assignments here are arbitrary and will not be used (at least not + * until we implement ISI of HDMI). + * + * PIO_PMC_PCK0_1: PB26 is used by I2S with the WM8904 (AUDIO_RK0_PB26) + * PIO_PMC_PCK0_2: PD8 is the HDMI MCLK (HDMI_MCK_PD8) + * PIO_PMC_PCK0_3: PA24 is used for the LCD backlight (LCD_PWM_PA24) + * + * PIO_PMC_PCK1_1: PD31 goes to the expansion interface and is not used on-board + * (EXP_PD31). + * PIO_PMC_PCK1_2: PC24 is used for ISI data (ISI_D5) + * PIO_PMC_PCK1_3: PC4 is ISI_MCK_PC4, MCI0_CK_PC4, EXP_PC4 + */ + +#define PIO_PMC_PCK0 PIO_PMC_PCK0_2 +#define PIO_PMC_PCK1 PIO_PMC_PCK1_1 + +/************************************************************************************ + * Assembly Language Macros + ************************************************************************************/ + +#ifdef __ASSEMBLY__ + .macro config_sdram + .endm +#endif /* __ASSEMBLY__ */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAMA5 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_H */ diff --git a/configs/sama5d4-ek/include/board_384mhz.h b/configs/sama5d4-ek/include/board_384mhz.h new file mode 100644 index 0000000000000000000000000000000000000000..d38fa28a2464d2b86190a362520993fe52b2ebdf --- /dev/null +++ b/configs/sama5d4-ek/include/board_384mhz.h @@ -0,0 +1,223 @@ +/************************************************************************************ + * configs/sama5d4-ek/include/board_384mhz.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_384MHZ_H +#define __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_384MHZ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + * + * This is an alternative slower configuration that will produce a 48MHz USB clock + * with the required accuracy. When used with OHCI, an additional requirement is + * the PLLACK be a multiple of 48MHz. This setup results in a CPU clock of 384MHz. + * + * MAINOSC: Frequency = 12MHz (crystal) + * PLLA: PLL Multiplier = 64 to generate PLLACK = 768MHz + * Master Clock (MCK): Source = PLLACK/2, Prescalar = 1, MDIV = 3 to generate + * MCK = 128MHz + * CPU clock = 384MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Multipler = 64: PLLACK = 64 * 12MHz = 768MHz + */ + +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_OUT (0) +#define BOARD_CKGR_PLLAR_MUL (63 << PMC_CKGR_PLLAR_MUL_SHIFT) + +/* PMC master clock register settings. + * + * Master/Processor Clock Source Selection = PLLA + * Master/Processor Clock Prescaler = 1 + * PLLA Divider = 2 + * Master Clock Division (MDIV) = 3 + * + * NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3. + * + * Prescaler input = 768MHz / 2 = 384MHz + * Prescaler output = 384MHz / 1 = 384MHz + * Processor Clock (PCK) = 384MHz + * Master clock (MCK) = 396MHz / 3 = 128MHz + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 +#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV2 +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV3 + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* For OHCI Full-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in PMC_PCER + * register. + * 2) Select PLLACK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 3) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV value is calculated regarding the PLLACK + * value and USB Full-speed accuracy. + * 4) Enable the OHCI clocks, UHP bit in PMC_SCER register. + * + * "The USB Host controller requires 48 MHz and 12 MHz clocks for OHCI + * full-speed operations. These clocks must be generated by a PLL with a + * correct accuracy of ± 0.25% thanks to USBDIV field. + * + * "Thus the USB Host peripheral receives three clocks from the Power + * Management Controller (PMC): the Peripheral Clock (MCK domain), the + * UHP48M and the UHP12M (built-in UHP48M divided by four) used by the + * OHCI to interface with the bus USB signals (Recovered 12 MHz domain) + * in Full-speed operations" + * + * USB Clock = PLLACK / (USBDIV + 1) = 48MHz + * USBDIV = PLLACK / 48MHz - 1 + * = 15 + * + * The maximum value of USBDIV is 15 corresponding to a divisor of 16. + * REVISIT: However, using the divisor of (15+1) yields a frame rate + * of 500 frames per second. A divisor of (7+1) gives the correct 1MS + * frame rate. I cannot explain the factor of 2 difference. + */ + +# undef BOARD_USE_UPLL /* Use PLLA as source clock */ +# define BOARD_OHCI_INPUT PMC_USB_USBS_PLLA /* Input is PLLACK */ +# if 1 /* REVISIT */ +# define BOARD_OHCI_DIVIDER (7) /* Divided by 8 */ +# else +# define BOARD_OHCI_DIVIDER (15) /* Divided by 16 */ +# endif +#endif + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * + * Given: + * MCK = 128MHz + * ADCClock = 8MHz + * Then: + * PRESCAL = 7 + */ + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* Resulting frequencies */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */ +#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */ +#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */ +#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */ + +/* Clocking to certain peripherals may be MCK/2. + * + * REVISIT: I am not sure why this is. Perhaps because of H32MXDIV? + */ + +#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) +#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 128MHz, CLKDIV = 159, MCI_SPEED = 128MHz / (2*159 + 0 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (159 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 128MHz, CLKDIV = 2 w/CLOCKODD, MCI_SPEED = 128MHz /(2*2 + 1 + 2) = 18.3 MHz */ + +#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 128MHz, CLKDIV = 2, MCI_SPEED = 128MHz /(2*2 + 0 + 2) = 21.3 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + + #undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_384MHZ_H */ diff --git a/configs/sama5d4-ek/include/board_396mhz.h b/configs/sama5d4-ek/include/board_396mhz.h new file mode 100644 index 0000000000000000000000000000000000000000..9e92ce07a9cd7b17696e03c93787526a7f1bf206 --- /dev/null +++ b/configs/sama5d4-ek/include/board_396mhz.h @@ -0,0 +1,215 @@ +/************************************************************************************ + * configs/sama5d4-ek/include/board_396mhz.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_396MHZ_H +#define __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_396MHZ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + * + * This is the configuration provided in the Atmel example code. This results in a + * CPU clock of 396MHz: + * + * MAINOSC: Frequency = 12MHz (crystal) + * PLLA: PLL Multiplier = 66 to generate PLLACK = 792MHz + * Master Clock (MCK): Source = PLLACK/2, Prescalar = 1, MDIV = 3 to generate + * MCK = 132MHz + * CPU clock = 396MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Multipler = 66: PLLACK = 66 * 12MHz = 792MHz + */ + +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_OUT (0) +#define BOARD_CKGR_PLLAR_MUL (65 << PMC_CKGR_PLLAR_MUL_SHIFT) + +/* PMC master clock register settings. + * + * Master/Processor Clock Source Selection = PLLA + * Master/Processor Clock Prescaler = 1 + * PLLA Divider = 2 + * Master Clock Division (MDIV) = 3 + * + * NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3. + * + * Prescaler input = 792MHz / 2 = 396MHz + * Prescaler output = 396MHz / 1 = 396MHz + * Processor Clock (PCK) = 396MHz + * Master clock (MCK) = 396MHz / 3 = 132MHz + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 +#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV2 +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV3 + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * + * Given: + * MCK = 132MHz + * ADCClock = 8MHz + * Then: + * PRESCAL = 7.25 + * + * PRESCAL=7 and MCK=132MHz yields ADC clock of 8.25MHz + */ + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* Resulting frequencies */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */ +#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */ +#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */ +#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */ + +/* Clocking to certain peripherals may be MCK/2. + * + * REVISIT: I am not sure why this is. Perhaps because of H32MXDIV? + */ + +#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) +#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded + * High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL + * (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either + * the 12MHz internal RC oscillator on a an external 12MHz crystal. The + * Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier. + * + * For High-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in + * PMC_PCER register. + * 2) Write CKGR_PLLCOUNT field in PMC_UCKR register. + * 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register. + * 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register + * 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register. + * 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is + * selected. + * 8) Enable OHCI clocks, UHP bit in PMC_SCER register. + * + * Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI + * driver is initialized. + */ + +# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */ +# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */ +# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */ +# define BOARD_UPLL_OHCI_DIV (10) /* Divide by 10 */ +#endif + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 132MHz, CLKDIV = 164, MCI_SPEED = 132MHz / (2*164 + 0 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (164 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 132MHz, CLKDIV = 2 w/CLOCKODD, MCI_SPEED = 132MHz /(2*2 + 1 + 2) = 18.9 MHz */ + +#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 132MHz, CLKDIV = 2, MCI_SPEED = 132MHz /(2*2 + 0 + 2) = 22 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_396MHZ_H */ diff --git a/configs/sama5d4-ek/include/board_528mhz.h b/configs/sama5d4-ek/include/board_528mhz.h new file mode 100644 index 0000000000000000000000000000000000000000..d23cce539c88c7450830bfb9923e8260f74eb357 --- /dev/null +++ b/configs/sama5d4-ek/include/board_528mhz.h @@ -0,0 +1,214 @@ +/************************************************************************************ + * configs/sama5d4-ek/include/board_528mhz.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_528MHZ_H +#define __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_528MHZ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. These + * definitions will configure operational clocking. + * + * This is the configuration results in a CPU clock of 528MHz: + * + * MAINOSC: Frequency = 12MHz (crystal) + * PLLA: PLL Multiplier = 43+1 to generate PLLACK = 528MHz + * Master Clock (MCK): Source = PLLACK/1, Prescalar = 1, MDIV = 4 to generate + * MCK = 132MHz + * CPU clock = 528MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Multipler = 43+1: PLLACK = 44 * 12MHz = 528MHz + */ + +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_OUT (0) +#define BOARD_CKGR_PLLAR_MUL (43 << PMC_CKGR_PLLAR_MUL_SHIFT) + +/* PMC master clock register settings. + * + * Master/Processor Clock Source Selection = PLLA + * Master/Processor Clock Prescaler = 1 + * PLLA Divider = 1 + * Master Clock Division (MDIV) = 4 + * + * NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3. + * + * Prescaler input = 528MHz / 1 = 528MHz + * Prescaler output = 528MHz / 1 = 528MHz + * Processor Clock (PCK) = 528MHz + * Master clock (MCK) = 528MHz / 4 = 132MHz + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 +#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV1 +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV4 + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * + * Given: + * MCK = 132MHz + * ADCClock = 8MHz + * Then: + * PRESCAL = 7.25 + * + * PRESCAL=7 and MCK=132MHz yields ADC clock of 8.25MHz + */ + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* Resulting frequencies */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */ +#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */ +#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */ +#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */ + +/* Clocking to certain peripherals may be MCK/2. + * + * REVISIT: I am not sure why this is. Perhaps because of H32MXDIV? + */ + +#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) +#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded + * High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL + * (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either + * the 12MHz internal RC oscillator on a an external 12MHz crystal. The + * Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier. + * + * For High-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in + * PMC_PCER register. + * 2) Write CKGR_PLLCOUNT field in PMC_UCKR register. + * 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register. + * 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register + * 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register. + * 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is + * selected. + * 8) Enable OHCI clocks, UHP bit in PMC_SCER register. + * + * Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI + * driver is initialized. + */ + +# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */ +# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */ +# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */ +# define BOARD_UPLL_OHCI_DIV (10) /* Divide by 10 */ +#endif + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 132MHz, CLKDIV = 164, MCI_SPEED = 132MHz / (2*164 + 0 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV (164 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 132MHz, CLKDIV = 2 w/CLOCKODD, MCI_SPEED = 132MHz /(2*2 + 1 + 2) = 18.9 MHz */ + +#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 132MHz, CLKDIV = 2, MCI_SPEED = 132MHz /(2*2 + 0 + 2) = 22 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_528MHZ_H */ diff --git a/configs/sama5d4-ek/include/board_memorymap.h b/configs/sama5d4-ek/include/board_memorymap.h new file mode 100644 index 0000000000000000000000000000000000000000..b6f7dd5ba97fd39639eae41cb36315b07f6dcca7 --- /dev/null +++ b/configs/sama5d4-ek/include/board_memorymap.h @@ -0,0 +1,73 @@ +/************************************************************************************ + * configs/sama5d4-ek/include/board_memorymap.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_MEMORYMAP_H +#define __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_MEMORYMAP_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_MEMORYMAP_H */ diff --git a/configs/sama5d4-ek/include/board_sdram.h b/configs/sama5d4-ek/include/board_sdram.h new file mode 100644 index 0000000000000000000000000000000000000000..288e6a87d5ffc15f71631147d94f601ae702b312 --- /dev/null +++ b/configs/sama5d4-ek/include/board_sdram.h @@ -0,0 +1,176 @@ +/************************************************************************************ + * configs/sama5d4-ek/include/board_sdram.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_SDRAM_H +#define __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_SDRAM_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include "sam_pmc.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. When + * booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader. That + * bootloader had to have already configured the PLL and SDRAM for proper operation. + * + * In this case, we do not reconfigure the clocking. Rather, we need to query + * the register settings to determine the clock frequencies. We can only assume that + * the Main clock source is the on-board 12MHz crystal. + */ + +#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY +#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY)) +#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY)) +#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY)) +#define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY)) + +/* Clocking to certain peripherals may be MCK/2. + * + * REVISIT: I am not sure why this is. Perhaps because of H32MXDIV? + */ + +#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) +#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1) + +#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ + defined(CONFIG_SAMA5_UDPHS) + +/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded + * High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL + * (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either + * the 12MHz internal RC oscillator on a an external 12MHz crystal. The + * Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier. + * + * For High-speed operations, the user has to perform the following: + * + * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in + * PMC_PCER register. + * 2) Write CKGR_PLLCOUNT field in PMC_UCKR register. + * 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register. + * 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register + * 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register. + * 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB + * register. + * 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in + * PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is + * selected. + * 8) Enable OHCI clocks, UHP bit in PMC_SCER register. + * + * Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI + * driver is initialized. + */ + +# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */ +# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */ +# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */ +# define BOARD_UPLL_OHCI_DIV (10) /* Divide by 10 */ +#endif + +/* ADC Configuration + * + * ADCClock = MCK / ((PRESCAL+1) * 2) + * PRESCAL = (MCK / (2 * ADCClock) - 1) + */ + +#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */ +#define BOARD_ADCCLK_FREQUENCY \ + ((BOARD_PLLADIV2_FREQUENCY / (2 *BOARD_PLLADIV2_FREQUENCY)) - 1) + +#define BOARD_ADC_PRESCAL (7) +#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */ +#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */ +#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */ + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * CLKFULLDIV = 2*CLKDIV + CLOCKODD; + * MCI_SPEED = MCK / (CLKFULLDIV + 2) + * CLKFULLDIV = MCK / MCI_SPEED - 2 + * + * CLKDIV = CLKFULLDIV >> 1 + * CLOCKODD = CLKFULLDIV & 1 + * + * Where CLKDIV has a range of 0-255. + */ + +/* Initial clock: 400 KHz (target) */ + +#define HSMCI_INIT_CLKDIV sam_hsmci_clkdiv(400000) + +/* MMC transfer clock: 20 MHz (target) */ + +#define HSMCI_MMCXFR_CLKDIV sam_hsmci_clkdiv(20000000) + +/* SD transfer clock: 25 MHz (target) */ + +#define HSMCI_SDXFR_CLKDIV sam_hsmci_clkdiv(25000000) + +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D4_EK_INCLUDE_BOARD_SDRAM_H */ diff --git a/configs/sama5d4-ek/include/nsh_romfsimg.h b/configs/sama5d4-ek/include/nsh_romfsimg.h new file mode 100644 index 0000000000000000000000000000000000000000..8b78c03f72e882174ff6c8dab35f0f63144d1f3f --- /dev/null +++ b/configs/sama5d4-ek/include/nsh_romfsimg.h @@ -0,0 +1,89 @@ +unsigned char romfs_img[] = { + 0x2d, 0x72, 0x6f, 0x6d, 0x31, 0x66, 0x73, 0x2d, 0x00, 0x00, 0x02, 0x00, + 0xe7, 0x04, 0x63, 0xbd, 0x4e, 0x53, 0x48, 0x49, 0x6e, 0x69, 0x74, 0x56, + 0x6f, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x49, + 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0xd1, 0xff, 0xff, 0x97, + 0x2e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x20, + 0x00, 0x00, 0x00, 0x00, 0xd1, 0xd1, 0xff, 0x80, 0x2e, 0x2e, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, + 0x68, 0x2d, 0x96, 0x03, 0x69, 0x6e, 0x69, 0x74, 0x2e, 0x64, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, + 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0xd1, 0xff, 0xff, 0x00, + 0x2e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x20, + 0x00, 0x00, 0x00, 0x00, 0xd1, 0xd1, 0xff, 0x20, 0x2e, 0x2e, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x1f, + 0x8d, 0x9c, 0xab, 0xd7, 0x72, 0x63, 0x53, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x20, 0x4d, 0x6f, + 0x75, 0x6e, 0x74, 0x20, 0x74, 0x68, 0x65, 0x20, 0x70, 0x72, 0x6f, 0x63, + 0x66, 0x73, 0x20, 0x66, 0x69, 0x6c, 0x65, 0x20, 0x73, 0x79, 0x73, 0x74, + 0x65, 0x6d, 0x20, 0x61, 0x74, 0x20, 0x2f, 0x70, 0x72, 0x6f, 0x63, 0x0a, + 0x0a, 0x6d, 0x6f, 0x75, 0x6e, 0x74, 0x20, 0x2d, 0x74, 0x20, 0x70, 0x72, + 0x6f, 0x63, 0x66, 0x73, 0x20, 0x2f, 0x70, 0x72, 0x6f, 0x63, 0x0a, 0x65, + 0x63, 0x68, 0x6f, 0x20, 0x22, 0x72, 0x63, 0x53, 0x3a, 0x20, 0x4d, 0x6f, + 0x75, 0x6e, 0x74, 0x65, 0x64, 0x20, 0x2f, 0x70, 0x72, 0x6f, 0x63, 0x22, + 0x0a, 0x0a, 0x23, 0x20, 0x43, 0x72, 0x65, 0x61, 0x74, 0x65, 0x20, 0x61, + 0x20, 0x52, 0x41, 0x4d, 0x44, 0x49, 0x53, 0x4b, 0x20, 0x61, 0x74, 0x20, + 0x2f, 0x64, 0x65, 0x76, 0x2f, 0x72, 0x61, 0x6d, 0x31, 0x2c, 0x20, 0x73, + 0x69, 0x7a, 0x65, 0x20, 0x30, 0x2e, 0x35, 0x4d, 0x69, 0x42, 0x2c, 0x20, + 0x66, 0x6f, 0x72, 0x6d, 0x61, 0x74, 0x20, 0x69, 0x74, 0x20, 0x77, 0x69, + 0x74, 0x68, 0x20, 0x61, 0x20, 0x46, 0x41, 0x54, 0x0a, 0x23, 0x20, 0x66, + 0x69, 0x6c, 0x65, 0x20, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x20, 0x61, + 0x6e, 0x64, 0x20, 0x6d, 0x6f, 0x75, 0x6e, 0x74, 0x20, 0x69, 0x74, 0x20, + 0x61, 0x74, 0x20, 0x2f, 0x74, 0x6d, 0x70, 0x0a, 0x0a, 0x6d, 0x6b, 0x72, + 0x64, 0x20, 0x2d, 0x6d, 0x20, 0x31, 0x20, 0x2d, 0x73, 0x20, 0x35, 0x31, + 0x32, 0x20, 0x31, 0x30, 0x32, 0x34, 0x0a, 0x6d, 0x6b, 0x66, 0x61, 0x74, + 0x66, 0x73, 0x20, 0x2f, 0x64, 0x65, 0x76, 0x2f, 0x72, 0x61, 0x6d, 0x31, + 0x0a, 0x6d, 0x6f, 0x75, 0x6e, 0x74, 0x20, 0x2d, 0x74, 0x20, 0x76, 0x66, + 0x61, 0x74, 0x20, 0x2f, 0x64, 0x65, 0x76, 0x2f, 0x72, 0x61, 0x6d, 0x31, + 0x20, 0x2f, 0x74, 0x6d, 0x70, 0x0a, 0x65, 0x63, 0x68, 0x6f, 0x20, 0x22, + 0x72, 0x63, 0x53, 0x3a, 0x20, 0x4d, 0x6f, 0x75, 0x6e, 0x74, 0x65, 0x64, + 0x20, 0x2f, 0x74, 0x6d, 0x70, 0x22, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 +}; +unsigned int romfs_img_len = 1024; diff --git a/configs/sama5d4-ek/include/rcS.template b/configs/sama5d4-ek/include/rcS.template new file mode 100644 index 0000000000000000000000000000000000000000..077d99c3b40c01d1ed1d1f6962724d21f63c004f --- /dev/null +++ b/configs/sama5d4-ek/include/rcS.template @@ -0,0 +1,12 @@ +# Mount the procfs file system at /proc + +mount -t procfs /proc +echo "rcS: Mounted /proc" + +# Create a RAMDISK at /dev/ram1, size 0.5MiB, format it with a FAT +# file system and mount it at /tmp + +mkrd -m 1 -s 512 1024 +mkfatfs /dev/ram1 +mount -t vfat /dev/ram1 /tmp +echo "rcS: Mounted /tmp" diff --git a/configs/sama5d4-ek/ipv6/Make.defs b/configs/sama5d4-ek/ipv6/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..17e78d57bde746402c0f24d0f88497003e1c2181 --- /dev/null +++ b/configs/sama5d4-ek/ipv6/Make.defs @@ -0,0 +1,145 @@ +############################################################################ +# configs/sama5d4-ek/ipv6/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) +ifeq ($(CONFIG_SAMA5D4EK_DRAM_BOOT),y) + LDSCRIPT = dramboot.ld +else + LDSCRIPT = uboot.ld +endif +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d4-ek/ipv6/defconfig b/configs/sama5d4-ek/ipv6/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..e327a02d9ac5d46a4c461d7702352538ab4f3b0d --- /dev/null +++ b/configs/sama5d4-ek/ipv6/defconfig @@ -0,0 +1,1616 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +CONFIG_ARMV7A_HAVE_L2CC=y +CONFIG_ARMV7A_HAVE_L2CC_PL310=y + +# +# L2 Cache Configuration +# +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set +# CONFIG_USBHOST_BULK_DISABLE is not set +# CONFIG_USBHOST_INT_DISABLE is not set +CONFIG_USBHOST_ISOC_DISABLE=y + +# +# SAMA5 Configuration Options +# +CONFIG_SAMA5_HAVE_AESB=y +CONFIG_SAMA5_HAVE_ICM=y +# CONFIG_SAMA5_HAVE_RXLP is not set +CONFIG_SAMA5_HAVE_UART0=y +CONFIG_SAMA5_HAVE_UART1=y +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +CONFIG_SAMA5_HAVE_USART4=y +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +# CONFIG_SAMA5_HAVE_DMA is not set +CONFIG_SAMA5_HAVE_DDR32=y +CONFIG_SAMA5_HAVE_XDMA=y +CONFIG_SAMA5_HAVE_LCDC=y +# CONFIG_SAMA5_HAVE_GMAC is not set +# CONFIG_SAMA5_HAVE_EMACA is not set +CONFIG_SAMA5_HAVE_EMACB=y +CONFIG_SAMA5_HAVE_EMAC1=y +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +CONFIG_SAMA5_HAVE_SAIC=y +CONFIG_SAMA5_HAVE_SBM=y +CONFIG_SAMA5_HAVE_SFC=y +CONFIG_SAMA5_HAVE_SPI2=y +# CONFIG_SAMA5_HAVE_TC is not set +CONFIG_SAMA5_HAVE_TC1=y +CONFIG_SAMA5_HAVE_TC2=y +CONFIG_ARCH_HAVE_TRUSTZONE=y +CONFIG_SAMA5_HAVE_TWI3=y +CONFIG_SAMA5_HAVE_VDEC=y +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +# CONFIG_ARCH_CHIP_SAMA5D3 is not set +CONFIG_ARCH_CHIP_SAMA5D4=y +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D33 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +CONFIG_ARCH_CHIP_ATSAMA5D44=y + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_AESB is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +CONFIG_SAMA5_RTC=y +# CONFIG_SAMA5_ICM is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_SAIC is not set +# CONFIG_SAMA5_UART0 is not set +# CONFIG_SAMA5_UART1 is not set +# CONFIG_SAMA5_USART0 is not set +# CONFIG_SAMA5_USART1 is not set +# CONFIG_SAMA5_USART2 is not set +CONFIG_SAMA5_USART3=y +CONFIG_SAMA5_USART4=y +CONFIG_SAMA5_TWI0=y +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_TWI3 is not set +CONFIG_SAMA5_HSMCI0=y +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SBM is not set +# CONFIG_SAMA5_SFC is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_SPI2 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_TC1 is not set +# CONFIG_SAMA5_TC2 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +CONFIG_SAMA5_XDMAC0=y +# CONFIG_SAMA5_XDMAC1 is not set +CONFIG_SAMA5_UHPHS=y +# CONFIG_SAMA5_UDPHS is not set +CONFIG_SAMA5_EMACB=y +CONFIG_SAMA5_EMAC0=y +# CONFIG_SAMA5_EMAC1 is not set +CONFIG_SAMA5_LCDC=y +# CONFIG_SAMA5_ISI is not set +CONFIG_SAMA5_SSC0=y +# CONFIG_SAMA5_SSC1 is not set +# CONFIG_SAMA5_SHA is not set +CONFIG_SAMA5_TRNG=y +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +# CONFIG_SAMA5_MPDDRC is not set +# CONFIG_SAMA5_VDEC is not set +CONFIG_SAMA5_PIO_IRQ=y +# CONFIG_SAMA5_PIOA_IRQ is not set +# CONFIG_SAMA5_PIOB_IRQ is not set +# CONFIG_SAMA5_PIOC_IRQ is not set +# CONFIG_SAMA5_PIOD_IRQ is not set +CONFIG_SAMA5_PIOE_IRQ=y + +# +# LCDC Configuration +# +CONFIG_SAMA5_LCDC_BACKLIGHT=y +CONFIG_SAMA5_LCDC_DEFBACKLIGHT=0xc8 +CONFIG_SAMA5_LCDC_BACKCOLOR=0x7b5d +CONFIG_SAMA5_LCDC_FB_VBASE=0x2fa00000 +CONFIG_SAMA5_LCDC_FB_PBASE=0x2fa00000 +CONFIG_SAMA5_LCDC_FB_SIZE=6291456 + +# +# Base layer configuration +# +CONFIG_SAMA5_LCDC_BASE_ROT0=y +# CONFIG_SAMA5_LCDC_BASE_ROT90 is not set +# CONFIG_SAMA5_LCDC_BASE_ROT180 is not set +# CONFIG_SAMA5_LCDC_BASE_ROT270 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB444 is not set +# CONFIG_SAMA5_LCDC_BASE_ARGB4444 is not set +# CONFIG_SAMA5_LCDC_BASE_RGBA4444 is not set +CONFIG_SAMA5_LCDC_BASE_RGB565=y +# CONFIG_SAMA5_LCDC_BASE_TRGB1555 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB666 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB666P is not set +# CONFIG_SAMA5_LCDC_BASE_TRGB1666 is not set +# CONFIG_SAMA5_LCDC_BASE_TRGBP is not set +# CONFIG_SAMA5_LCDC_BASE_RGB888 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB888P is not set +# CONFIG_SAMA5_LCDC_BASE_TRGB1888 is not set +# CONFIG_SAMA5_LCDC_BASE_ARGB8888 is not set +# CONFIG_SAMA5_LCDC_BASE_RGBA8888 is not set + +# +# EMAC device driver options +# + +# +# EMAC0 device driver options +# +CONFIG_SAMA5_EMAC0_NRXBUFFERS=16 +CONFIG_SAMA5_EMAC0_NTXBUFFERS=8 +CONFIG_SAMA5_EMAC0_PHYADDR=1 +# CONFIG_SAMA5_EMAC0_PHYINIT is not set +# CONFIG_SAMA5_EMAC0_MII is not set +CONFIG_SAMA5_EMAC0_RMII=y +CONFIG_SAMA5_EMAC0_AUTONEG=y +CONFIG_SAMA5_EMAC0_PHYSR=30 +CONFIG_SAMA5_EMAC0_PHYSR_ALTCONFIG=y +CONFIG_SAMA5_EMAC0_PHYSR_ALTMODE=0x7 +CONFIG_SAMA5_EMAC0_PHYSR_10HD=0x1 +CONFIG_SAMA5_EMAC0_PHYSR_100HD=0x2 +CONFIG_SAMA5_EMAC0_PHYSR_10FD=0x5 +CONFIG_SAMA5_EMAC0_PHYSR_100FD=0x6 +# CONFIG_SAMA5_EMACB_PREALLOCATE is not set +# CONFIG_SAMA5_EMACB_NBC is not set +CONFIG_SAMA5_EMAC0_ISETH0=y + +# +# TWI device driver options +# +CONFIG_SAMA5_TWI0_FREQUENCY=100000 + +# +# SSC Configuration +# +CONFIG_SAMA5_SSC_MAXINFLIGHT=16 + +# +# SSC0 Configuration +# +CONFIG_SAMA5_SSC0_DATALEN=16 +CONFIG_SAMA5_SSC0_RX=y +CONFIG_SAMA5_SSC0_RX_RKINPUT=y +# CONFIG_SAMA5_SSC0_RX_TXCLK is not set +# CONFIG_SAMA5_SSC0_RX_MCKDIV is not set +CONFIG_SAMA5_SSC0_RX_FSLEN=1 +CONFIG_SAMA5_SSC0_RX_STTDLY=1 +CONFIG_SAMA5_SSC0_TX=y +# CONFIG_SAMA5_SSC0_TX_TKINPUT is not set +CONFIG_SAMA5_SSC0_TX_RXCLK=y +# CONFIG_SAMA5_SSC0_TX_MCKDIV is not set +CONFIG_SAMA5_SSC0_TX_TKOUTPUT_NONE=y +# CONFIG_SAMA5_SSC0_TX_TKOUTPUT_CONT is not set +# CONFIG_SAMA5_SSC0_TX_TKOUTPUT_XFR is not set +CONFIG_SAMA5_SSC0_TX_FSLEN=0 +CONFIG_SAMA5_SSC0_TX_STTDLY=1 +# CONFIG_SAMA5_SSC0_LOOPBACK is not set + +# +# HSMCI device driver options +# +CONFIG_SAMA5_HSMCI0_XDMAC0=y +# CONFIG_SAMA5_HSMCI_RDPROOF is not set +# CONFIG_SAMA5_HSMCI_WRPROOF is not set + +# +# USB High Speed Host Controller driver (HCD) options +# +CONFIG_SAMA5_OHCI=y +CONFIG_SAMA5_OHCI_NEDS=6 +CONFIG_SAMA5_OHCI_NTDS=9 +CONFIG_SAMA5_OHCI_TDBUFFERS=6 +CONFIG_SAMA5_OHCI_TDBUFSIZE=128 +CONFIG_SAMA5_EHCI=y +CONFIG_SAMA5_EHCI_NQHS=4 +CONFIG_SAMA5_EHCI_NQTDS=6 +CONFIG_SAMA5_EHCI_BUFSIZE=128 +CONFIG_SAMA5_EHCI_PREALLOCATE=y +# CONFIG_SAMA5_UHPHS_RHPORT1 is not set +CONFIG_SAMA5_UHPHS_RHPORT2=y +CONFIG_SAMA5_UHPHS_RHPORT3=y + +# +# External Memory Configuration +# +# CONFIG_SAMA5_EBICS0 is not set +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +CONFIG_SAMA5_BOOT_SDRAM=y + +# +# Heap Configuration +# +CONFIG_SAMA5_ISRAM_HEAP=y +CONFIG_SAMA5_DDRCS_RESERVE=y +CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=65775 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_VSTART=0x20000000 +CONFIG_RAM_SIZE=268435456 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D4_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d4-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +# CONFIG_SAMA5D4_MB_REVC is not set +CONFIG_SAMA5D4_MB_REVE=y +# CONFIG_SAMA5D4EK_384MHZ is not set +# CONFIG_SAMA5D4EK_396MHZ is not set +CONFIG_SAMA5D4EK_528MHZ=y +CONFIG_SAMA5D4EK_DRAM_BOOT=y +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT=y +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_FSTYPE="vfat" +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_BLKDEV="/dev/mmcsd0" +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_MOUNTPOINT="/mnt/sdcard" +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_DDELAY=1000 +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_UDELAY=2000 +# CONFIG_SAMA5D4EK_ROMFS_MOUNT is not set +CONFIG_SAMA5D4EK_USBHOST_STACKSIZE=1024 +CONFIG_SAMA5D4EK_USBHOST_PRIO=100 +CONFIG_SAMA5D4EK_MXT_I2CFREQUENCY=400000 +CONFIG_SAMA5D4EK_MXT_DEVMINOR=0 +# CONFIG_SAMA5D4EK_SLOWCLOCK is not set +CONFIG_SAMA5D4EK_WM8904_I2CFREQUENCY=400000 +CONFIG_SAMA5D4EK_WM8904_SRCMAIN=y +# CONFIG_SAMA5D4EK_WM8904_SRCSCK is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_TSCTEST=y +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +CONFIG_I2C_RESET=y +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +# CONFIG_SPI is not set +CONFIG_I2S=y + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +CONFIG_AUDIO_DEVICES=y +# CONFIG_AUDIO_I2SCHAR is not set +# CONFIG_VS1053 is not set +CONFIG_AUDIO_WM8904=y +CONFIG_WM8904_INITVOLUME=250 +CONFIG_WM8904_INFLIGHT=2 +CONFIG_WM8904_MSG_PRIO=1 +CONFIG_WM8904_BUFFER_SIZE=8192 +CONFIG_WM8904_NUM_BUFFERS=8 +CONFIG_WM8904_WORKER_STACKSIZE=1536 +# CONFIG_WM8904_REGDUMP is not set +# CONFIG_WM8904_CLKDEBUG is not set +# CONFIG_AUDIO_NULL is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +CONFIG_INPUT_MXT=y +CONFIG_MXT_THRESHX=5 +CONFIG_MXT_THRESHY=8 +CONFIG_MXT_NPOLLWAITERS=4 +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +CONFIG_ARCH_PHY_INTERRUPT=y +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +CONFIG_ETH0_PHY_KSZ8081=y +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +CONFIG_ARCH_HAVE_USART4=y +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_USART4_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_USART4_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set + +# +# USART4 Configuration +# +CONFIG_USART4_RXBUFSIZE=256 +CONFIG_USART4_TXBUFSIZE=256 +CONFIG_USART4_BAUD=115200 +CONFIG_USART4_BITS=8 +CONFIG_USART4_PARITY=0 +CONFIG_USART4_2STOP=0 +# CONFIG_USART4_IFLOWCONTROL is not set +# CONFIG_USART4_OFLOWCONTROL is not set +# CONFIG_USART4_DMA is not set +# CONFIG_USBDEV is not set +CONFIG_USBHOST=y +CONFIG_USBHOST_NPREALLOC=4 +CONFIG_USBHOST_HAVE_ASYNCH=y +# CONFIG_USBHOST_ASYNCH is not set +# CONFIG_USBHOST_HUB is not set +CONFIG_USBHOST_MSC=y +# CONFIG_USBHOST_CDCACM is not set +CONFIG_USBHOST_HIDKBD=y +CONFIG_HIDKBD_POLLUSEC=80000 +CONFIG_HIDKBD_DEFPRIO=50 +CONFIG_HIDKBD_STACKSIZE=1024 +CONFIG_HIDKBD_BUFSIZE=64 +CONFIG_HIDKBD_NPOLLWAITERS=2 +# CONFIG_HIDKBD_RAWSCANCODES is not set +# CONFIG_HIDKBD_ALLSCANCODES is not set +# CONFIG_HIDKBD_NODEBOUNCE is not set +# CONFIG_USBHOST_HIDMOUSE is not set +# CONFIG_USBHOST_RTL8187 is not set +# CONFIG_USBHOST_TRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +CONFIG_RAMLOG=y +CONFIG_RAMLOG_SYSLOG=y +# CONFIG_RAMLOG_CONSOLE is not set +CONFIG_RAMLOG_BUFSIZE=16384 +# CONFIG_RAMLOG_CRLF is not set +CONFIG_RAMLOG_NONBLOCKING=y +CONFIG_RAMLOG_NPOLLWAITERS=4 +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=562 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +# CONFIG_NET_IPv4 is not set +CONFIG_NET_IPv6=y +CONFIG_NET_IPv6_NCONF_ENTRIES=8 + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMPv6 Networking Support +# +CONFIG_NET_ICMPv6=y +CONFIG_NET_ICMPv6_PING=y +CONFIG_NET_ICMPv6_NEIGHBOR=y +CONFIG_ICMPv6_NEIGHBOR_MAXTRIES=5 +CONFIG_ICMPv6_NEIGHBOR_DELAYMSEC=20 +# CONFIG_NET_ICMPv6_AUTOCONF is not set +# CONFIG_NET_ICMPv6_ROUTER is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=36 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +CONFIG_FS_AUTOMOUNTER=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_NET is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_CHAR is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x7b5d +# CONFIG_NX_ANTIALIASING is not set +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +CONFIG_NXFONT_SERIF22X28B=y +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +CONFIG_AUDIO=y +# CONFIG_AUDIO_MULTI_SESSION is not set + +# +# Audio Buffer Configuration +# +# CONFIG_AUDIO_LARGE_BUFFERS is not set +CONFIG_AUDIO_NUM_BUFFERS=8 +CONFIG_AUDIO_BUFFER_NUMBYTES=8192 +# CONFIG_AUDIO_DRIVER_SPECIFIC_BUFFERS is not set + +# +# Supported Audio Formats +# +# CONFIG_AUDIO_FORMAT_AC3 is not set +# CONFIG_AUDIO_FORMAT_DTS is not set +CONFIG_AUDIO_FORMAT_PCM=y +# CONFIG_AUDIO_FORMAT_MP3 is not set +# CONFIG_AUDIO_FORMAT_MIDI is not set +# CONFIG_AUDIO_FORMAT_WMA is not set +# CONFIG_AUDIO_FORMAT_OGG_VORBIS is not set + +# +# Exclude Specific Audio Features +# +# CONFIG_AUDIO_EXCLUDE_VOLUME is not set +# CONFIG_AUDIO_EXCLUDE_BALANCE is not set +CONFIG_AUDIO_EXCLUDE_EQUALIZER=y +# CONFIG_AUDIO_EXCLUDE_TONE is not set +# CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME is not set +# CONFIG_AUDIO_EXCLUDE_STOP is not set +# CONFIG_AUDIO_EXCLUDE_FFORWARD is not set +CONFIG_AUDIO_EXCLUDE_REWIND=y +# CONFIG_AUDIO_CUSTOM_DEV_PATH is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +# CONFIG_NETDB_DNSCLIENT is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=0 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=0 +CONFIG_EXAMPLES_BUTTONS_NAME0="PB_USER" +CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=16 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NX_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +CONFIG_EXAMPLES_TOUCHSCREEN=y +CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0 +CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0" +# CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE is not set +CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=0 +CONFIG_NSH_ROMFSSECTSIZE=64 +# CONFIG_NSH_DEFAULTROMFS is not set +CONFIG_NSH_ARCHROMFS=y +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=1 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_USBKBD is not set +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT_THREAD=y +CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 +CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 + +# +# IP Address Configuration +# + +# +# Target IPv6 address +# +CONFIG_NSH_IPv6ADDR_1=0xfc00 +CONFIG_NSH_IPv6ADDR_2=0x0000 +CONFIG_NSH_IPv6ADDR_3=0x0000 +CONFIG_NSH_IPv6ADDR_4=0x0000 +CONFIG_NSH_IPv6ADDR_5=0x0000 +CONFIG_NSH_IPv6ADDR_6=0x0000 +CONFIG_NSH_IPv6ADDR_7=0x0000 +CONFIG_NSH_IPv6ADDR_8=0x0002 + +# +# Router IPv6 address +# +CONFIG_NSH_DRIPv6ADDR_1=0xfc00 +CONFIG_NSH_DRIPv6ADDR_2=0x0000 +CONFIG_NSH_DRIPv6ADDR_3=0x0000 +CONFIG_NSH_DRIPv6ADDR_4=0x0000 +CONFIG_NSH_DRIPv6ADDR_5=0x0000 +CONFIG_NSH_DRIPv6ADDR_6=0x0000 +CONFIG_NSH_DRIPv6ADDR_7=0x0000 +CONFIG_NSH_DRIPv6ADDR_8=0x0001 + +# +# IPv6 Network mask +# +CONFIG_NSH_IPv6NETMASK_1=0xffff +CONFIG_NSH_IPv6NETMASK_2=0xffff +CONFIG_NSH_IPv6NETMASK_3=0xffff +CONFIG_NSH_IPv6NETMASK_4=0xffff +CONFIG_NSH_IPv6NETMASK_5=0xffff +CONFIG_NSH_IPv6NETMASK_6=0xffff +CONFIG_NSH_IPv6NETMASK_7=0xffff +CONFIG_NSH_IPv6NETMASK_8=0xff80 +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# +# CONFIG_NXWIDGETS is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=0 +CONFIG_I2CTOOL_MAXBUS=0 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=100000 +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +CONFIG_SYSTEM_NXPLAYER=y +CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500 +CONFIG_NXPLAYER_COMMAND_LINE=y +CONFIG_NXPLAYER_INCLUDE_HELP=y +CONFIG_NXPLAYER_INCLUDE_DEVICE_SEARCH=y +CONFIG_NXPLAYER_INCLUDE_PREFERRED_DEVICE=y +CONFIG_NXPLAYER_FMT_FROM_EXT=y +# CONFIG_NXPLAYER_FMT_FROM_HEADER is not set +CONFIG_NXPLAYER_INCLUDE_MEDIADIR=y +CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/mnt/sdcard" +CONFIG_NXPLAYER_RECURSIVE_MEDIA_SEARCH=y +CONFIG_NXPLAYER_INCLUDE_SYSTEM_RESET=y +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d4-ek/ipv6/setenv.sh b/configs/sama5d4-ek/ipv6/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c8799c3199789ab65e407dcf15d997ae5d05807a --- /dev/null +++ b/configs/sama5d4-ek/ipv6/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d4-ek/ipv6/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d4-ek/knsh/Make.defs b/configs/sama5d4-ek/knsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..ece275b771152a2f1d764e56234a04256b98a2ee --- /dev/null +++ b/configs/sama5d4-ek/knsh/Make.defs @@ -0,0 +1,150 @@ +############################################################################ +# configs/sama5d4-ek/knsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) +ifeq ($(CONFIG_SAMA5D4EK_DRAM_BOOT),y) + LDSCRIPT = dramboot.ld +else + LDSCRIPT = uboot.ld +endif +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +ifneq ($(KERNEL),y) + ARCHCFLAGS += -fno-common + ARCHCXXFLAGS += -fno-common +endif + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d4-ek/knsh/defconfig b/configs/sama5d4-ek/knsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ce61a0458e29a0fadc428f4d46202347d7a30ad9 --- /dev/null +++ b/configs/sama5d4-ek/knsh/defconfig @@ -0,0 +1,1078 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +CONFIG_EXPERIMENTAL=y +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_FLAT is not set +CONFIG_BUILD_KERNEL=y + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +CONFIG_ARMV7A_HAVE_L2CC=y +CONFIG_ARMV7A_HAVE_L2CC_PL310=y + +# +# L2 Cache Configuration +# +# CONFIG_ARMV7A_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# SAMA5 Configuration Options +# +CONFIG_SAMA5_HAVE_AESB=y +CONFIG_SAMA5_HAVE_ICM=y +# CONFIG_SAMA5_HAVE_RXLP is not set +CONFIG_SAMA5_HAVE_UART0=y +CONFIG_SAMA5_HAVE_UART1=y +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +CONFIG_SAMA5_HAVE_USART4=y +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +# CONFIG_SAMA5_HAVE_DMA is not set +CONFIG_SAMA5_HAVE_DDR32=y +CONFIG_SAMA5_HAVE_XDMA=y +CONFIG_SAMA5_HAVE_LCDC=y +# CONFIG_SAMA5_HAVE_GMAC is not set +# CONFIG_SAMA5_HAVE_EMACA is not set +CONFIG_SAMA5_HAVE_EMACB=y +CONFIG_SAMA5_HAVE_EMAC1=y +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +CONFIG_SAMA5_HAVE_SAIC=y +CONFIG_SAMA5_HAVE_SBM=y +CONFIG_SAMA5_HAVE_SFC=y +CONFIG_SAMA5_HAVE_SPI2=y +# CONFIG_SAMA5_HAVE_TC is not set +CONFIG_SAMA5_HAVE_TC1=y +CONFIG_SAMA5_HAVE_TC2=y +CONFIG_ARCH_HAVE_TRUSTZONE=y +CONFIG_SAMA5_HAVE_TWI3=y +CONFIG_SAMA5_HAVE_VDEC=y +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +# CONFIG_ARCH_CHIP_SAMA5D3 is not set +CONFIG_ARCH_CHIP_SAMA5D4=y +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D33 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +CONFIG_ARCH_CHIP_ATSAMA5D44=y + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_AESB is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +CONFIG_SAMA5_RTC=y +# CONFIG_SAMA5_ICM is not set +# CONFIG_SAMA5_HSMC is not set +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_SAIC is not set +# CONFIG_SAMA5_UART0 is not set +# CONFIG_SAMA5_UART1 is not set +# CONFIG_SAMA5_USART0 is not set +# CONFIG_SAMA5_USART1 is not set +# CONFIG_SAMA5_USART2 is not set +CONFIG_SAMA5_USART3=y +CONFIG_SAMA5_USART4=y +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_TWI3 is not set +CONFIG_SAMA5_HSMCI0=y +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SBM is not set +# CONFIG_SAMA5_SFC is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_SPI2 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_TC1 is not set +# CONFIG_SAMA5_TC2 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +CONFIG_SAMA5_XDMAC0=y +# CONFIG_SAMA5_XDMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_EMACB is not set +# CONFIG_SAMA5_EMAC0 is not set +# CONFIG_SAMA5_EMAC1 is not set +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_SSC0 is not set +# CONFIG_SAMA5_SSC1 is not set +# CONFIG_SAMA5_SHA is not set +CONFIG_SAMA5_TRNG=y +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +# CONFIG_SAMA5_MPDDRC is not set +# CONFIG_SAMA5_VDEC is not set +CONFIG_SAMA5_PIO_IRQ=y +# CONFIG_SAMA5_PIOA_IRQ is not set +# CONFIG_SAMA5_PIOB_IRQ is not set +# CONFIG_SAMA5_PIOC_IRQ is not set +# CONFIG_SAMA5_PIOD_IRQ is not set +CONFIG_SAMA5_PIOE_IRQ=y + +# +# HSMCI device driver options +# +CONFIG_SAMA5_HSMCI0_XDMAC0=y +# CONFIG_SAMA5_HSMCI_RDPROOF is not set +# CONFIG_SAMA5_HSMCI_WRPROOF is not set + +# +# External Memory Configuration +# +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +CONFIG_SAMA5_BOOT_SDRAM=y + +# +# Heap Configuration +# +CONFIG_SAMA5_ISRAM_HEAP=y +CONFIG_SAMA5_DDRCS_RESERVE=y +CONFIG_SAMA5_DDRCS_HEAP_END=0x28000000 +CONFIG_SAMA5_DDRCS_PGHEAP=y +CONFIG_SAMA5_DDRCS_PGHEAP_OFFSET=0x08000000 +CONFIG_SAMA5_DDRCS_PGHEAP_SIZE=134217728 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +CONFIG_ARCH_HAVE_COHERENT_DCACHE=y +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +CONFIG_ARCH_ADDRENV=y +CONFIG_ARCH_TEXT_VBASE=0x80000000 +CONFIG_ARCH_DATA_VBASE=0x80100000 +CONFIG_ARCH_HEAP_VBASE=0x80200000 +CONFIG_ARCH_TEXT_NPAGES=256 +CONFIG_ARCH_DATA_NPAGES=256 +CONFIG_ARCH_HEAP_NPAGES=256 +# CONFIG_ARCH_STACK_DYNAMIC is not set +CONFIG_ARCH_KERNEL_STACK=y +CONFIG_ARCH_KERNEL_STACKSIZE=1568 +CONFIG_ARCH_PGPOOL_MAPPING=y +CONFIG_ARCH_PGPOOL_PBASE=0x28000000 +CONFIG_ARCH_PGPOOL_VBASE=0x28000000 +CONFIG_ARCH_PGPOOL_SIZE=134217728 +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=65775 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_VSTART=0x20000000 +CONFIG_RAM_SIZE=268435456 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D4_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d4-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_SAMA5D4_MB_REVC=y +# CONFIG_SAMA5D4_MB_REVE is not set +# CONFIG_SAMA5D4EK_384MHZ is not set +# CONFIG_SAMA5D4EK_396MHZ is not set +CONFIG_SAMA5D4EK_528MHZ=y +CONFIG_SAMA5D4EK_DRAM_BOOT=y +CONFIG_SAMA5D4EK_HSMCI0_MOUNT=y +CONFIG_SAMA5D4EK_HSMCI0_MOUNT_FSTYPE="vfat" +CONFIG_SAMA5D4EK_HSMCI0_MOUNT_BLKDEV="/dev/mmcsd0" +CONFIG_SAMA5D4EK_HSMCI0_MOUNT_MOUNTPOINT="/bin" +# CONFIG_SAMA5D4EK_ROMFS_MOUNT is not set +# CONFIG_SAMA5D4EK_SLOWCLOCK is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_SPINLOCK is not set +# CONFIG_INIT_NONE is not set +CONFIG_INIT_FILEPATH=y +CONFIG_USER_INITPATH="/bin/init" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +CONFIG_SCHED_HAVE_PARENT=y +# CONFIG_SCHED_CHILD_STATUS is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +CONFIG_BOARD_INITTHREAD=y +CONFIG_BOARD_INITTHREAD_STACKSIZE=2048 +CONFIG_BOARD_INITTHREAD_PRIORITY=240 +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=2 + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCHLD=4 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +CONFIG_LIB_SYSCALL=y +CONFIG_SYS_RESERVED=6 +CONFIG_SYS_NNEST=2 + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +CONFIG_ARCH_HAVE_USART4=y +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_USART4_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_USART4_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set + +# +# USART4 Configuration +# +CONFIG_USART4_RXBUFSIZE=256 +CONFIG_USART4_TXBUFSIZE=256 +CONFIG_USART4_BAUD=115200 +CONFIG_USART4_BITS=8 +CONFIG_USART4_PARITY=0 +CONFIG_USART4_2STOP=0 +# CONFIG_USART4_IFLOWCONTROL is not set +# CONFIG_USART4_OFLOWCONTROL is not set +# CONFIG_USART4_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_KMM is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_KERNEL_HEAP=y +CONFIG_MM_KERNEL_HEAPSIZE=8192 +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +CONFIG_GRAN=y +CONFIG_GRAN_SINGLE=y +# CONFIG_GRAN_INTR is not set +CONFIG_MM_PGALLOC=y +CONFIG_MM_PGSIZE=4096 +# CONFIG_MM_SHM is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# +# CONFIG_WIRELESS is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +CONFIG_ELF=y +CONFIG_ELF_ALIGN_LOG2=2 +CONFIG_ELF_STACKSIZE=2048 +CONFIG_ELF_BUFFERSIZE=128 +CONFIG_ELF_BUFFERINCR=32 +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +CONFIG_LIBC_EXECFUNCS=y +# CONFIG_EXECFUNCS_HAVE_SYMTAB is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_USRWORK is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +CONFIG_EXAMPLES_HELLO_PROGNAME="hello" +CONFIG_EXAMPLES_HELLO_PRIORITY=100 +CONFIG_EXAMPLES_HELLO_STACKSIZE=2048 +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_PROGNAME="init" +# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +# CONFIG_NSH_BUILTIN_APPS is not set +CONFIG_NSH_FILE_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_ROMFSETC is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d4-ek/knsh/defconfig.ROMFS b/configs/sama5d4-ek/knsh/defconfig.ROMFS new file mode 100644 index 0000000000000000000000000000000000000000..769bfdb403555618aa96c4247696691021bb72ee --- /dev/null +++ b/configs/sama5d4-ek/knsh/defconfig.ROMFS @@ -0,0 +1,997 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +CONFIG_EXPERIMENTAL=y +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_FLAT is not set +CONFIG_BUILD_KERNEL=y + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +CONFIG_ARMV7A_HAVE_L2CC=y +CONFIG_ARMV7A_HAVE_L2CC_PL310=y + +# +# L2 Cache Configuration +# +# CONFIG_ARMV7A_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set + +# +# SAMA5 Configuration Options +# +CONFIG_SAMA5_HAVE_AESB=y +CONFIG_SAMA5_HAVE_ICM=y +CONFIG_SAMA5_HAVE_UART0=y +CONFIG_SAMA5_HAVE_UART1=y +CONFIG_SAMA5_HAVE_USART4=y +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +# CONFIG_SAMA5_HAVE_DMA is not set +CONFIG_SAMA5_HAVE_DDR32=y +CONFIG_SAMA5_HAVE_XDMA=y +CONFIG_SAMA5_HAVE_LCDC=y +# CONFIG_SAMA5_HAVE_GMAC is not set +# CONFIG_SAMA5_HAVE_EMACA is not set +CONFIG_SAMA5_HAVE_EMACB=y +CONFIG_SAMA5_HAVE_EMAC1=y +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_SAIC=y +CONFIG_SAMA5_HAVE_SBM=y +CONFIG_SAMA5_HAVE_SFC=y +CONFIG_SAMA5_HAVE_SPI2=y +# CONFIG_SAMA5_HAVE_TC is not set +CONFIG_SAMA5_HAVE_TC1=y +CONFIG_SAMA5_HAVE_TC2=y +CONFIG_SAMA5_HAVE_TRUSTZONE=y +CONFIG_SAMA5_HAVE_TWI3=y +CONFIG_SAMA5_HAVE_VDEC=y +# CONFIG_ARCH_CHIP_SAMA5D3 is not set +CONFIG_ARCH_CHIP_SAMA5D4=y +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D33 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +CONFIG_ARCH_CHIP_ATSAMA5D44=y + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_AESB is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +CONFIG_SAMA5_RTC=y +# CONFIG_SAMA5_ICM is not set +# CONFIG_SAMA5_HSMC is not set +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_SAIC is not set +# CONFIG_SAMA5_UART0 is not set +# CONFIG_SAMA5_UART1 is not set +# CONFIG_SAMA5_USART0 is not set +# CONFIG_SAMA5_USART1 is not set +# CONFIG_SAMA5_USART2 is not set +CONFIG_SAMA5_USART3=y +CONFIG_SAMA5_USART4=y +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_TWI3 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SBM is not set +# CONFIG_SAMA5_SFC is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_SPI2 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_TC1 is not set +# CONFIG_SAMA5_TC2 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +# CONFIG_SAMA5_XDMAC0 is not set +# CONFIG_SAMA5_XDMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_EMACB is not set +# CONFIG_SAMA5_EMAC0 is not set +# CONFIG_SAMA5_EMAC1 is not set +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_SHA is not set +CONFIG_SAMA5_TRNG=y +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +# CONFIG_SAMA5_MPDDRC is not set +# CONFIG_SAMA5_VDEC is not set +# CONFIG_SAMA5_SECURE is not set +# CONFIG_SAMA5_PIO_IRQ is not set + +# +# External Memory Configuration +# +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +CONFIG_SAMA5_BOOT_SDRAM=y + +# +# Heap Configuration +# +CONFIG_SAMA5_ISRAM_HEAP=y +CONFIG_SAMA5_DDRCS_RESERVE=y +CONFIG_SAMA5_DDRCS_HEAP_END=0x28000000 +CONFIG_SAMA5_DDRCS_PGHEAP=y +CONFIG_SAMA5_DDRCS_PGHEAP_OFFSET=0x08000000 +CONFIG_SAMA5_DDRCS_PGHEAP_SIZE=134217728 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +CONFIG_ARCH_HAVE_COHERENT_DCACHE=y +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_USE_MMU=y +CONFIG_ARCH_ADDRENV=y +CONFIG_ARCH_TEXT_VBASE=0x80000000 +CONFIG_ARCH_DATA_VBASE=0x80100000 +CONFIG_ARCH_HEAP_VBASE=0x80200000 +CONFIG_ARCH_TEXT_NPAGES=256 +CONFIG_ARCH_DATA_NPAGES=256 +CONFIG_ARCH_HEAP_NPAGES=256 +# CONFIG_ARCH_STACK_DYNAMIC is not set +CONFIG_ARCH_KERNEL_STACK=y +CONFIG_ARCH_KERNEL_STACKSIZE=1568 +CONFIG_ARCH_PGPOOL_MAPPING=y +CONFIG_ARCH_PGPOOL_PBASE=0x28000000 +CONFIG_ARCH_PGPOOL_VBASE=0x28000000 +CONFIG_ARCH_PGPOOL_SIZE=134217728 +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=65775 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_VSTART=0x20000000 +CONFIG_RAM_SIZE=268435456 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D4_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d4-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_SAMA5D4_MB_REVC=y +# CONFIG_SAMA5D4_MB_REVE is not set +# CONFIG_SAMA5D4EK_384MHZ is not set +# CONFIG_SAMA5D4EK_396MHZ is not set +CONFIG_SAMA5D4EK_528MHZ=y +CONFIG_SAMA5D4EK_DRAM_BOOT=y +CONFIG_SAMA5D4EK_ROMFS_MOUNT=y +CONFIG_SAMA5D4EK_ROMFS_ROMDISK_MINOR=0 +CONFIG_SAMA5D4EK_ROMFS_ROMDISK_DEVNAME="/dev/ram0" +CONFIG_SAMA5D4EK_ROMFS_ROMDISK_SECTSIZE=512 +CONFIG_SAMA5D4EK_ROMFS_MOUNT_MOUNTPOINT="/bin" +# CONFIG_SAMA5D4EK_SLOWCLOCK is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_FILEPATH=y +CONFIG_USER_INITPATH="/bin/init" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +CONFIG_SCHED_HAVE_PARENT=y +# CONFIG_SCHED_CHILD_STATUS is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +CONFIG_BOARD_INITTHREAD=y +CONFIG_BOARD_INITTHREAD_STACKSIZE=2048 +CONFIG_BOARD_INITTHREAD_PRIORITY=240 +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=2 + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCHLD=4 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +CONFIG_LIB_SYSCALL=y +CONFIG_SYS_RESERVED=6 +CONFIG_SYS_NNEST=2 + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +CONFIG_ARCH_HAVE_USART4=y +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_USART4_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_USART4_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set + +# +# USART4 Configuration +# +CONFIG_USART4_RXBUFSIZE=256 +CONFIG_USART4_TXBUFSIZE=256 +CONFIG_USART4_BAUD=115200 +CONFIG_USART4_BITS=8 +CONFIG_USART4_PARITY=0 +CONFIG_USART4_2STOP=0 +# CONFIG_USART4_IFLOWCONTROL is not set +# CONFIG_USART4_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_KERNEL_HEAP=y +CONFIG_MM_KERNEL_HEAPSIZE=8192 +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +CONFIG_GRAN=y +CONFIG_GRAN_SINGLE=y +# CONFIG_GRAN_INTR is not set +CONFIG_MM_PGALLOC=y +CONFIG_MM_PGSIZE=4096 +# CONFIG_MM_SHM is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +CONFIG_ELF=y +CONFIG_ELF_ALIGN_LOG2=2 +CONFIG_ELF_STACKSIZE=2048 +CONFIG_ELF_BUFFERSIZE=128 +CONFIG_ELF_BUFFERINCR=32 +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +CONFIG_LIBC_EXECFUNCS=y +# CONFIG_EXECFUNCS_HAVE_SYMTAB is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +CONFIG_EXAMPLES_HELLO_PROGNAME="hello" +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_PROGNAME="init" +# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +# CONFIG_NSH_BUILTIN_APPS is not set +CONFIG_NSH_FILE_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_ROMFSETC is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d4-ek/knsh/setenv.sh b/configs/sama5d4-ek/knsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..cc959079d2617e5f14aad3bd09208a7f69abdd17 --- /dev/null +++ b/configs/sama5d4-ek/knsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d4-ek/knsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d4-ek/nsh/Make.defs b/configs/sama5d4-ek/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c94054d06e673412aee39c063ad55e5c331a10a9 --- /dev/null +++ b/configs/sama5d4-ek/nsh/Make.defs @@ -0,0 +1,145 @@ +############################################################################ +# configs/sama5d4-ek/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) +ifeq ($(CONFIG_SAMA5D4EK_DRAM_BOOT),y) + LDSCRIPT = dramboot.ld +else + LDSCRIPT = uboot.ld +endif +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d4-ek/nsh/defconfig b/configs/sama5d4-ek/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..479649266ef17c0e091fac21a8243559f657da73 --- /dev/null +++ b/configs/sama5d4-ek/nsh/defconfig @@ -0,0 +1,1617 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +CONFIG_ARMV7A_HAVE_L2CC=y +CONFIG_ARMV7A_HAVE_L2CC_PL310=y + +# +# L2 Cache Configuration +# +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set +# CONFIG_USBHOST_BULK_DISABLE is not set +# CONFIG_USBHOST_INT_DISABLE is not set +CONFIG_USBHOST_ISOC_DISABLE=y + +# +# SAMA5 Configuration Options +# +CONFIG_SAMA5_HAVE_AESB=y +CONFIG_SAMA5_HAVE_ICM=y +# CONFIG_SAMA5_HAVE_RXLP is not set +CONFIG_SAMA5_HAVE_UART0=y +CONFIG_SAMA5_HAVE_UART1=y +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +CONFIG_SAMA5_HAVE_USART4=y +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +# CONFIG_SAMA5_HAVE_DMA is not set +CONFIG_SAMA5_HAVE_DDR32=y +CONFIG_SAMA5_HAVE_XDMA=y +CONFIG_SAMA5_HAVE_LCDC=y +# CONFIG_SAMA5_HAVE_GMAC is not set +# CONFIG_SAMA5_HAVE_EMACA is not set +CONFIG_SAMA5_HAVE_EMACB=y +CONFIG_SAMA5_HAVE_EMAC1=y +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +CONFIG_SAMA5_HAVE_SAIC=y +CONFIG_SAMA5_HAVE_SBM=y +CONFIG_SAMA5_HAVE_SFC=y +CONFIG_SAMA5_HAVE_SPI2=y +# CONFIG_SAMA5_HAVE_TC is not set +CONFIG_SAMA5_HAVE_TC1=y +CONFIG_SAMA5_HAVE_TC2=y +CONFIG_ARCH_HAVE_TRUSTZONE=y +CONFIG_SAMA5_HAVE_TWI3=y +CONFIG_SAMA5_HAVE_VDEC=y +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +# CONFIG_ARCH_CHIP_SAMA5D3 is not set +CONFIG_ARCH_CHIP_SAMA5D4=y +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D33 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +CONFIG_ARCH_CHIP_ATSAMA5D44=y + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_AESB is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +CONFIG_SAMA5_RTC=y +# CONFIG_SAMA5_ICM is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_SAIC is not set +# CONFIG_SAMA5_UART0 is not set +# CONFIG_SAMA5_UART1 is not set +# CONFIG_SAMA5_USART0 is not set +# CONFIG_SAMA5_USART1 is not set +# CONFIG_SAMA5_USART2 is not set +CONFIG_SAMA5_USART3=y +CONFIG_SAMA5_USART4=y +CONFIG_SAMA5_TWI0=y +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_TWI3 is not set +CONFIG_SAMA5_HSMCI0=y +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SBM is not set +# CONFIG_SAMA5_SFC is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_SPI2 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_TC1 is not set +# CONFIG_SAMA5_TC2 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +CONFIG_SAMA5_XDMAC0=y +# CONFIG_SAMA5_XDMAC1 is not set +CONFIG_SAMA5_UHPHS=y +# CONFIG_SAMA5_UDPHS is not set +CONFIG_SAMA5_EMACB=y +CONFIG_SAMA5_EMAC0=y +# CONFIG_SAMA5_EMAC1 is not set +CONFIG_SAMA5_LCDC=y +# CONFIG_SAMA5_ISI is not set +CONFIG_SAMA5_SSC0=y +# CONFIG_SAMA5_SSC1 is not set +# CONFIG_SAMA5_SHA is not set +CONFIG_SAMA5_TRNG=y +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +# CONFIG_SAMA5_MPDDRC is not set +# CONFIG_SAMA5_VDEC is not set +CONFIG_SAMA5_PIO_IRQ=y +# CONFIG_SAMA5_PIOA_IRQ is not set +# CONFIG_SAMA5_PIOB_IRQ is not set +# CONFIG_SAMA5_PIOC_IRQ is not set +# CONFIG_SAMA5_PIOD_IRQ is not set +CONFIG_SAMA5_PIOE_IRQ=y + +# +# LCDC Configuration +# +CONFIG_SAMA5_LCDC_BACKLIGHT=y +CONFIG_SAMA5_LCDC_DEFBACKLIGHT=0xc8 +CONFIG_SAMA5_LCDC_BACKCOLOR=0x7b5d +CONFIG_SAMA5_LCDC_FB_VBASE=0x2fa00000 +CONFIG_SAMA5_LCDC_FB_PBASE=0x2fa00000 +CONFIG_SAMA5_LCDC_FB_SIZE=6291456 + +# +# Base layer configuration +# +CONFIG_SAMA5_LCDC_BASE_ROT0=y +# CONFIG_SAMA5_LCDC_BASE_ROT90 is not set +# CONFIG_SAMA5_LCDC_BASE_ROT180 is not set +# CONFIG_SAMA5_LCDC_BASE_ROT270 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB444 is not set +# CONFIG_SAMA5_LCDC_BASE_ARGB4444 is not set +# CONFIG_SAMA5_LCDC_BASE_RGBA4444 is not set +CONFIG_SAMA5_LCDC_BASE_RGB565=y +# CONFIG_SAMA5_LCDC_BASE_TRGB1555 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB666 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB666P is not set +# CONFIG_SAMA5_LCDC_BASE_TRGB1666 is not set +# CONFIG_SAMA5_LCDC_BASE_TRGBP is not set +# CONFIG_SAMA5_LCDC_BASE_RGB888 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB888P is not set +# CONFIG_SAMA5_LCDC_BASE_TRGB1888 is not set +# CONFIG_SAMA5_LCDC_BASE_ARGB8888 is not set +# CONFIG_SAMA5_LCDC_BASE_RGBA8888 is not set + +# +# EMAC device driver options +# + +# +# EMAC0 device driver options +# +CONFIG_SAMA5_EMAC0_NRXBUFFERS=16 +CONFIG_SAMA5_EMAC0_NTXBUFFERS=8 +CONFIG_SAMA5_EMAC0_PHYADDR=1 +# CONFIG_SAMA5_EMAC0_PHYINIT is not set +# CONFIG_SAMA5_EMAC0_MII is not set +CONFIG_SAMA5_EMAC0_RMII=y +CONFIG_SAMA5_EMAC0_AUTONEG=y +CONFIG_SAMA5_EMAC0_PHYSR=30 +CONFIG_SAMA5_EMAC0_PHYSR_ALTCONFIG=y +CONFIG_SAMA5_EMAC0_PHYSR_ALTMODE=0x7 +CONFIG_SAMA5_EMAC0_PHYSR_10HD=0x1 +CONFIG_SAMA5_EMAC0_PHYSR_100HD=0x2 +CONFIG_SAMA5_EMAC0_PHYSR_10FD=0x5 +CONFIG_SAMA5_EMAC0_PHYSR_100FD=0x6 +# CONFIG_SAMA5_EMACB_PREALLOCATE is not set +# CONFIG_SAMA5_EMACB_NBC is not set +CONFIG_SAMA5_EMAC0_ISETH0=y + +# +# TWI device driver options +# +CONFIG_SAMA5_TWI0_FREQUENCY=100000 + +# +# SSC Configuration +# +CONFIG_SAMA5_SSC_MAXINFLIGHT=16 + +# +# SSC0 Configuration +# +CONFIG_SAMA5_SSC0_DATALEN=16 +CONFIG_SAMA5_SSC0_RX=y +CONFIG_SAMA5_SSC0_RX_RKINPUT=y +# CONFIG_SAMA5_SSC0_RX_TXCLK is not set +# CONFIG_SAMA5_SSC0_RX_MCKDIV is not set +CONFIG_SAMA5_SSC0_RX_FSLEN=1 +CONFIG_SAMA5_SSC0_RX_STTDLY=1 +CONFIG_SAMA5_SSC0_TX=y +# CONFIG_SAMA5_SSC0_TX_TKINPUT is not set +CONFIG_SAMA5_SSC0_TX_RXCLK=y +# CONFIG_SAMA5_SSC0_TX_MCKDIV is not set +CONFIG_SAMA5_SSC0_TX_TKOUTPUT_NONE=y +# CONFIG_SAMA5_SSC0_TX_TKOUTPUT_CONT is not set +# CONFIG_SAMA5_SSC0_TX_TKOUTPUT_XFR is not set +CONFIG_SAMA5_SSC0_TX_FSLEN=0 +CONFIG_SAMA5_SSC0_TX_STTDLY=1 +# CONFIG_SAMA5_SSC0_LOOPBACK is not set + +# +# HSMCI device driver options +# +CONFIG_SAMA5_HSMCI0_XDMAC0=y +# CONFIG_SAMA5_HSMCI_RDPROOF is not set +# CONFIG_SAMA5_HSMCI_WRPROOF is not set + +# +# USB High Speed Host Controller driver (HCD) options +# +CONFIG_SAMA5_OHCI=y +CONFIG_SAMA5_OHCI_NEDS=6 +CONFIG_SAMA5_OHCI_NTDS=9 +CONFIG_SAMA5_OHCI_TDBUFFERS=6 +CONFIG_SAMA5_OHCI_TDBUFSIZE=128 +CONFIG_SAMA5_EHCI=y +CONFIG_SAMA5_EHCI_NQHS=4 +CONFIG_SAMA5_EHCI_NQTDS=6 +CONFIG_SAMA5_EHCI_BUFSIZE=128 +CONFIG_SAMA5_EHCI_PREALLOCATE=y +# CONFIG_SAMA5_UHPHS_RHPORT1 is not set +CONFIG_SAMA5_UHPHS_RHPORT2=y +CONFIG_SAMA5_UHPHS_RHPORT3=y + +# +# External Memory Configuration +# +# CONFIG_SAMA5_EBICS0 is not set +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +CONFIG_SAMA5_BOOT_SDRAM=y + +# +# Heap Configuration +# +CONFIG_SAMA5_ISRAM_HEAP=y +CONFIG_SAMA5_DDRCS_RESERVE=y +CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=65775 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_VSTART=0x20000000 +CONFIG_RAM_SIZE=268435456 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D4_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d4-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +# CONFIG_SAMA5D4_MB_REVC is not set +CONFIG_SAMA5D4_MB_REVE=y +# CONFIG_SAMA5D4EK_384MHZ is not set +# CONFIG_SAMA5D4EK_396MHZ is not set +CONFIG_SAMA5D4EK_528MHZ=y +CONFIG_SAMA5D4EK_DRAM_BOOT=y +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT=y +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_FSTYPE="vfat" +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_BLKDEV="/dev/mmcsd0" +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_MOUNTPOINT="/mnt/sdcard" +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_DDELAY=1000 +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_UDELAY=2000 +# CONFIG_SAMA5D4EK_ROMFS_MOUNT is not set +CONFIG_SAMA5D4EK_USBHOST_STACKSIZE=1024 +CONFIG_SAMA5D4EK_USBHOST_PRIO=100 +CONFIG_SAMA5D4EK_MXT_I2CFREQUENCY=400000 +CONFIG_SAMA5D4EK_MXT_DEVMINOR=0 +# CONFIG_SAMA5D4EK_SLOWCLOCK is not set +CONFIG_SAMA5D4EK_WM8904_I2CFREQUENCY=400000 +CONFIG_SAMA5D4EK_WM8904_SRCMAIN=y +# CONFIG_SAMA5D4EK_WM8904_SRCSCK is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_TSCTEST=y +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +CONFIG_I2C_RESET=y +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +# CONFIG_SPI is not set +CONFIG_I2S=y + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +CONFIG_AUDIO_DEVICES=y +# CONFIG_AUDIO_I2SCHAR is not set +# CONFIG_VS1053 is not set +CONFIG_AUDIO_WM8904=y +CONFIG_WM8904_INITVOLUME=250 +CONFIG_WM8904_INFLIGHT=2 +CONFIG_WM8904_MSG_PRIO=1 +CONFIG_WM8904_BUFFER_SIZE=8192 +CONFIG_WM8904_NUM_BUFFERS=8 +CONFIG_WM8904_WORKER_STACKSIZE=1536 +# CONFIG_WM8904_REGDUMP is not set +# CONFIG_WM8904_CLKDEBUG is not set +# CONFIG_AUDIO_NULL is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +CONFIG_INPUT_MXT=y +CONFIG_MXT_THRESHX=5 +CONFIG_MXT_THRESHY=8 +CONFIG_MXT_NPOLLWAITERS=4 +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +CONFIG_ARCH_PHY_INTERRUPT=y +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +CONFIG_ETH0_PHY_KSZ8081=y +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +CONFIG_ARCH_HAVE_USART4=y +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_USART4_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_USART4_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set + +# +# USART4 Configuration +# +CONFIG_USART4_RXBUFSIZE=256 +CONFIG_USART4_TXBUFSIZE=256 +CONFIG_USART4_BAUD=115200 +CONFIG_USART4_BITS=8 +CONFIG_USART4_PARITY=0 +CONFIG_USART4_2STOP=0 +# CONFIG_USART4_IFLOWCONTROL is not set +# CONFIG_USART4_OFLOWCONTROL is not set +# CONFIG_USART4_DMA is not set +# CONFIG_USBDEV is not set +CONFIG_USBHOST=y +CONFIG_USBHOST_NPREALLOC=4 +CONFIG_USBHOST_HAVE_ASYNCH=y +# CONFIG_USBHOST_ASYNCH is not set +# CONFIG_USBHOST_HUB is not set +CONFIG_USBHOST_MSC=y +# CONFIG_USBHOST_CDCACM is not set +CONFIG_USBHOST_HIDKBD=y +CONFIG_HIDKBD_POLLUSEC=80000 +CONFIG_HIDKBD_DEFPRIO=50 +CONFIG_HIDKBD_STACKSIZE=1024 +CONFIG_HIDKBD_BUFSIZE=64 +CONFIG_HIDKBD_NPOLLWAITERS=2 +# CONFIG_HIDKBD_RAWSCANCODES is not set +# CONFIG_HIDKBD_ALLSCANCODES is not set +# CONFIG_HIDKBD_NODEBOUNCE is not set +# CONFIG_USBHOST_HIDMOUSE is not set +# CONFIG_USBHOST_RTL8187 is not set +# CONFIG_USBHOST_TRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +CONFIG_RAMLOG=y +CONFIG_RAMLOG_SYSLOG=y +# CONFIG_RAMLOG_CONSOLE is not set +CONFIG_RAMLOG_BUFSIZE=16384 +# CONFIG_RAMLOG_CRLF is not set +CONFIG_RAMLOG_NONBLOCKING=y +CONFIG_RAMLOG_NPOLLWAITERS=4 +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=562 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +# CONFIG_NET_UDP_CHECKSUMS is not set +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=36 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="SAMA5D4-EK" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +CONFIG_FS_AUTOMOUNTER=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_NET is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_CHAR is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x7b5d +# CONFIG_NX_ANTIALIASING is not set +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +CONFIG_NXFONT_SERIF22X28B=y +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +CONFIG_AUDIO=y +# CONFIG_AUDIO_MULTI_SESSION is not set + +# +# Audio Buffer Configuration +# +# CONFIG_AUDIO_LARGE_BUFFERS is not set +CONFIG_AUDIO_NUM_BUFFERS=8 +CONFIG_AUDIO_BUFFER_NUMBYTES=8192 +# CONFIG_AUDIO_DRIVER_SPECIFIC_BUFFERS is not set + +# +# Supported Audio Formats +# +# CONFIG_AUDIO_FORMAT_AC3 is not set +# CONFIG_AUDIO_FORMAT_DTS is not set +CONFIG_AUDIO_FORMAT_PCM=y +# CONFIG_AUDIO_FORMAT_MP3 is not set +# CONFIG_AUDIO_FORMAT_MIDI is not set +# CONFIG_AUDIO_FORMAT_WMA is not set +# CONFIG_AUDIO_FORMAT_OGG_VORBIS is not set + +# +# Exclude Specific Audio Features +# +# CONFIG_AUDIO_EXCLUDE_VOLUME is not set +# CONFIG_AUDIO_EXCLUDE_BALANCE is not set +CONFIG_AUDIO_EXCLUDE_EQUALIZER=y +# CONFIG_AUDIO_EXCLUDE_TONE is not set +# CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME is not set +# CONFIG_AUDIO_EXCLUDE_STOP is not set +# CONFIG_AUDIO_EXCLUDE_FFORWARD is not set +CONFIG_AUDIO_EXCLUDE_REWIND=y +# CONFIG_AUDIO_CUSTOM_DEV_PATH is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=0 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=0 +CONFIG_EXAMPLES_BUTTONS_NAME0="PB_USER" +CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=16 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NX_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +CONFIG_EXAMPLES_TOUCHSCREEN=y +CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0 +CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0" +# CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE is not set +CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=0 +CONFIG_NSH_ROMFSSECTSIZE=64 +# CONFIG_NSH_DEFAULTROMFS is not set +CONFIG_NSH_ARCHROMFS=y +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=1 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBKBD is not set +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT_THREAD=y +CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 +CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# +# CONFIG_NXWIDGETS is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=0 +CONFIG_I2CTOOL_MAXBUS=0 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=100000 +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +CONFIG_SYSTEM_NXPLAYER=y +CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500 +CONFIG_NXPLAYER_COMMAND_LINE=y +CONFIG_NXPLAYER_INCLUDE_HELP=y +CONFIG_NXPLAYER_INCLUDE_DEVICE_SEARCH=y +CONFIG_NXPLAYER_INCLUDE_PREFERRED_DEVICE=y +CONFIG_NXPLAYER_FMT_FROM_EXT=y +# CONFIG_NXPLAYER_FMT_FROM_HEADER is not set +CONFIG_NXPLAYER_INCLUDE_MEDIADIR=y +CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/mnt/sdcard" +CONFIG_NXPLAYER_RECURSIVE_MEDIA_SEARCH=y +CONFIG_NXPLAYER_INCLUDE_SYSTEM_RESET=y +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d4-ek/nsh/setenv.sh b/configs/sama5d4-ek/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..20d23074daab7612e6abadab431a08c40820e2e6 --- /dev/null +++ b/configs/sama5d4-ek/nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d4-ek/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d4-ek/nxwm/Make.defs b/configs/sama5d4-ek/nxwm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..d839e3ded4fbd471379efac8e128dc2a0dc57fe0 --- /dev/null +++ b/configs/sama5d4-ek/nxwm/Make.defs @@ -0,0 +1,145 @@ +############################################################################ +# configs/sama5d4-ek/nxwm/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) +ifeq ($(CONFIG_SAMA5D4EK_DRAM_BOOT),y) + LDSCRIPT = dramboot.ld +else + LDSCRIPT = uboot.ld +endif +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d4-ek/nxwm/defconfig b/configs/sama5d4-ek/nxwm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b3bdbe8716722277cc9a4d77c8269552257a54db --- /dev/null +++ b/configs/sama5d4-ek/nxwm/defconfig @@ -0,0 +1,1804 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +CONFIG_ARMV7A_HAVE_L2CC=y +CONFIG_ARMV7A_HAVE_L2CC_PL310=y + +# +# L2 Cache Configuration +# +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set +# CONFIG_USBHOST_BULK_DISABLE is not set +# CONFIG_USBHOST_INT_DISABLE is not set +CONFIG_USBHOST_ISOC_DISABLE=y + +# +# SAMA5 Configuration Options +# +CONFIG_SAMA5_HAVE_AESB=y +CONFIG_SAMA5_HAVE_ICM=y +# CONFIG_SAMA5_HAVE_RXLP is not set +CONFIG_SAMA5_HAVE_UART0=y +CONFIG_SAMA5_HAVE_UART1=y +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +CONFIG_SAMA5_HAVE_USART4=y +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +# CONFIG_SAMA5_HAVE_DMA is not set +CONFIG_SAMA5_HAVE_DDR32=y +CONFIG_SAMA5_HAVE_XDMA=y +CONFIG_SAMA5_HAVE_LCDC=y +# CONFIG_SAMA5_HAVE_GMAC is not set +# CONFIG_SAMA5_HAVE_EMACA is not set +CONFIG_SAMA5_HAVE_EMACB=y +CONFIG_SAMA5_HAVE_EMAC1=y +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +CONFIG_SAMA5_HAVE_SAIC=y +CONFIG_SAMA5_HAVE_SBM=y +CONFIG_SAMA5_HAVE_SFC=y +CONFIG_SAMA5_HAVE_SPI2=y +# CONFIG_SAMA5_HAVE_TC is not set +CONFIG_SAMA5_HAVE_TC1=y +CONFIG_SAMA5_HAVE_TC2=y +CONFIG_ARCH_HAVE_TRUSTZONE=y +CONFIG_SAMA5_HAVE_TWI3=y +CONFIG_SAMA5_HAVE_VDEC=y +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +# CONFIG_ARCH_CHIP_SAMA5D3 is not set +CONFIG_ARCH_CHIP_SAMA5D4=y +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D33 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +CONFIG_ARCH_CHIP_ATSAMA5D44=y + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_AESB is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +CONFIG_SAMA5_RTC=y +# CONFIG_SAMA5_ICM is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_SAIC is not set +# CONFIG_SAMA5_UART0 is not set +# CONFIG_SAMA5_UART1 is not set +# CONFIG_SAMA5_USART0 is not set +# CONFIG_SAMA5_USART1 is not set +# CONFIG_SAMA5_USART2 is not set +CONFIG_SAMA5_USART3=y +CONFIG_SAMA5_USART4=y +CONFIG_SAMA5_TWI0=y +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_TWI3 is not set +CONFIG_SAMA5_HSMCI0=y +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SBM is not set +# CONFIG_SAMA5_SFC is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_SPI2 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_TC1 is not set +# CONFIG_SAMA5_TC2 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +CONFIG_SAMA5_XDMAC0=y +# CONFIG_SAMA5_XDMAC1 is not set +CONFIG_SAMA5_UHPHS=y +# CONFIG_SAMA5_UDPHS is not set +CONFIG_SAMA5_EMACB=y +CONFIG_SAMA5_EMAC0=y +# CONFIG_SAMA5_EMAC1 is not set +CONFIG_SAMA5_LCDC=y +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_SSC0 is not set +# CONFIG_SAMA5_SSC1 is not set +# CONFIG_SAMA5_SHA is not set +CONFIG_SAMA5_TRNG=y +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +# CONFIG_SAMA5_MPDDRC is not set +# CONFIG_SAMA5_VDEC is not set +CONFIG_SAMA5_PIO_IRQ=y +# CONFIG_SAMA5_PIOA_IRQ is not set +# CONFIG_SAMA5_PIOB_IRQ is not set +# CONFIG_SAMA5_PIOC_IRQ is not set +# CONFIG_SAMA5_PIOD_IRQ is not set +CONFIG_SAMA5_PIOE_IRQ=y + +# +# LCDC Configuration +# +CONFIG_SAMA5_LCDC_BACKLIGHT=y +CONFIG_SAMA5_LCDC_DEFBACKLIGHT=0xc8 +CONFIG_SAMA5_LCDC_BACKCOLOR=0x95fa +CONFIG_SAMA5_LCDC_FB_VBASE=0x2fa00000 +CONFIG_SAMA5_LCDC_FB_PBASE=0x2fa00000 +CONFIG_SAMA5_LCDC_FB_SIZE=6291456 + +# +# Base layer configuration +# +CONFIG_SAMA5_LCDC_BASE_ROT0=y +# CONFIG_SAMA5_LCDC_BASE_ROT90 is not set +# CONFIG_SAMA5_LCDC_BASE_ROT180 is not set +# CONFIG_SAMA5_LCDC_BASE_ROT270 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB444 is not set +# CONFIG_SAMA5_LCDC_BASE_ARGB4444 is not set +# CONFIG_SAMA5_LCDC_BASE_RGBA4444 is not set +CONFIG_SAMA5_LCDC_BASE_RGB565=y +# CONFIG_SAMA5_LCDC_BASE_TRGB1555 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB666 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB666P is not set +# CONFIG_SAMA5_LCDC_BASE_TRGB1666 is not set +# CONFIG_SAMA5_LCDC_BASE_TRGBP is not set +# CONFIG_SAMA5_LCDC_BASE_RGB888 is not set +# CONFIG_SAMA5_LCDC_BASE_RGB888P is not set +# CONFIG_SAMA5_LCDC_BASE_TRGB1888 is not set +# CONFIG_SAMA5_LCDC_BASE_ARGB8888 is not set +# CONFIG_SAMA5_LCDC_BASE_RGBA8888 is not set + +# +# EMAC device driver options +# + +# +# EMAC0 device driver options +# +CONFIG_SAMA5_EMAC0_NRXBUFFERS=16 +CONFIG_SAMA5_EMAC0_NTXBUFFERS=8 +CONFIG_SAMA5_EMAC0_PHYADDR=1 +# CONFIG_SAMA5_EMAC0_PHYINIT is not set +# CONFIG_SAMA5_EMAC0_MII is not set +CONFIG_SAMA5_EMAC0_RMII=y +CONFIG_SAMA5_EMAC0_AUTONEG=y +CONFIG_SAMA5_EMAC0_PHYSR=30 +CONFIG_SAMA5_EMAC0_PHYSR_ALTCONFIG=y +CONFIG_SAMA5_EMAC0_PHYSR_ALTMODE=0x7 +CONFIG_SAMA5_EMAC0_PHYSR_10HD=0x1 +CONFIG_SAMA5_EMAC0_PHYSR_100HD=0x2 +CONFIG_SAMA5_EMAC0_PHYSR_10FD=0x5 +CONFIG_SAMA5_EMAC0_PHYSR_100FD=0x6 +# CONFIG_SAMA5_EMACB_PREALLOCATE is not set +# CONFIG_SAMA5_EMACB_NBC is not set +CONFIG_SAMA5_EMAC0_ISETH0=y + +# +# TWI device driver options +# +CONFIG_SAMA5_TWI0_FREQUENCY=100000 + +# +# HSMCI device driver options +# +CONFIG_SAMA5_HSMCI0_XDMAC0=y +# CONFIG_SAMA5_HSMCI_RDPROOF is not set +# CONFIG_SAMA5_HSMCI_WRPROOF is not set + +# +# USB High Speed Host Controller driver (HCD) options +# +CONFIG_SAMA5_OHCI=y +CONFIG_SAMA5_OHCI_NEDS=6 +CONFIG_SAMA5_OHCI_NTDS=9 +CONFIG_SAMA5_OHCI_TDBUFFERS=6 +CONFIG_SAMA5_OHCI_TDBUFSIZE=128 +CONFIG_SAMA5_EHCI=y +CONFIG_SAMA5_EHCI_NQHS=4 +CONFIG_SAMA5_EHCI_NQTDS=6 +CONFIG_SAMA5_EHCI_BUFSIZE=128 +CONFIG_SAMA5_EHCI_PREALLOCATE=y +# CONFIG_SAMA5_UHPHS_RHPORT1 is not set +CONFIG_SAMA5_UHPHS_RHPORT2=y +CONFIG_SAMA5_UHPHS_RHPORT3=y + +# +# External Memory Configuration +# +# CONFIG_SAMA5_EBICS0 is not set +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +# CONFIG_SAMA5_BOOT_ISRAM is not set +CONFIG_SAMA5_BOOT_SDRAM=y + +# +# Heap Configuration +# +CONFIG_SAMA5_ISRAM_HEAP=y +CONFIG_SAMA5_DDRCS_RESERVE=y +CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=65775 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_VSTART=0x20000000 +CONFIG_RAM_SIZE=268435456 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D4_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d4-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_SAMA5D4_MB_REVC=y +# CONFIG_SAMA5D4_MB_REVE is not set +# CONFIG_SAMA5D4EK_384MHZ is not set +# CONFIG_SAMA5D4EK_396MHZ is not set +CONFIG_SAMA5D4EK_528MHZ=y +CONFIG_SAMA5D4EK_DRAM_BOOT=y +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT=y +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_FSTYPE="vfat" +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_BLKDEV="/dev/mmcsd0" +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_MOUNTPOINT="/mnt/sdcard" +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_DDELAY=1000 +CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_UDELAY=2000 +# CONFIG_SAMA5D4EK_ROMFS_MOUNT is not set +CONFIG_SAMA5D4EK_USBHOST_STACKSIZE=1024 +CONFIG_SAMA5D4EK_USBHOST_PRIO=100 +CONFIG_SAMA5D4EK_MXT_I2CFREQUENCY=400000 +CONFIG_SAMA5D4EK_MXT_DEVMINOR=0 +# CONFIG_SAMA5D4EK_SLOWCLOCK is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxwm_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +CONFIG_SCHED_HAVE_PARENT=y +# CONFIG_SCHED_CHILD_STATUS is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCHLD=4 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=48 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +CONFIG_I2C_RESET=y +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +CONFIG_AUDIO_DEVICES=y +# CONFIG_VS1053 is not set +# CONFIG_AUDIO_WM8904 is not set +CONFIG_AUDIO_NULL=y +CONFIG_AUDIO_NULL_MSG_PRIO=1 +CONFIG_AUDIO_NULL_BUFFER_SIZE=8192 +CONFIG_AUDIO_NULL_NUM_BUFFERS=4 +CONFIG_AUDIO_NULL_WORKER_STACKSIZE=768 +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +CONFIG_INPUT_MXT=y +CONFIG_MXT_THRESHX=5 +CONFIG_MXT_THRESHY=8 +CONFIG_MXT_NPOLLWAITERS=4 +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +CONFIG_ARCH_PHY_INTERRUPT=y +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +CONFIG_ETH0_PHY_KSZ8081=y +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +CONFIG_ARCH_HAVE_USART4=y +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_USART4_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_USART4_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set + +# +# USART4 Configuration +# +CONFIG_USART4_RXBUFSIZE=256 +CONFIG_USART4_TXBUFSIZE=256 +CONFIG_USART4_BAUD=115200 +CONFIG_USART4_BITS=8 +CONFIG_USART4_PARITY=0 +CONFIG_USART4_2STOP=0 +# CONFIG_USART4_IFLOWCONTROL is not set +# CONFIG_USART4_OFLOWCONTROL is not set +# CONFIG_USART4_DMA is not set +# CONFIG_USBDEV is not set +CONFIG_USBHOST=y +CONFIG_USBHOST_NPREALLOC=4 +CONFIG_USBHOST_HAVE_ASYNCH=y +# CONFIG_USBHOST_ASYNCH is not set +# CONFIG_USBHOST_HUB is not set +CONFIG_USBHOST_MSC=y +# CONFIG_USBHOST_CDCACM is not set +CONFIG_USBHOST_HIDKBD=y +CONFIG_HIDKBD_POLLUSEC=80000 +CONFIG_HIDKBD_DEFPRIO=50 +CONFIG_HIDKBD_STACKSIZE=1024 +CONFIG_HIDKBD_BUFSIZE=64 +CONFIG_HIDKBD_NPOLLWAITERS=2 +# CONFIG_HIDKBD_RAWSCANCODES is not set +# CONFIG_HIDKBD_ALLSCANCODES is not set +# CONFIG_HIDKBD_NODEBOUNCE is not set +# CONFIG_USBHOST_HIDMOUSE is not set +# CONFIG_USBHOST_RTL8187 is not set +# CONFIG_USBHOST_TRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +CONFIG_RAMLOG=y +CONFIG_RAMLOG_SYSLOG=y +# CONFIG_RAMLOG_CONSOLE is not set +CONFIG_RAMLOG_BUFSIZE=16384 +# CONFIG_RAMLOG_CRLF is not set +CONFIG_RAMLOG_NONBLOCKING=y +CONFIG_RAMLOG_NPOLLWAITERS=4 +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=562 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +# CONFIG_NET_UDP_CHECKSUMS is not set +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +CONFIG_NET_ARP_IPIN=y +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=36 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +CONFIG_FS_AUTOMOUNTER=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_NET is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_CHAR is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x95fa +# CONFIG_NX_ANTIALIASING is not set +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +# CONFIG_NX_XYINPUT_MOUSE is not set +CONFIG_NX_XYINPUT_TOUCHSCREEN=y +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +CONFIG_NXFONT_SANS28X37=y +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +CONFIG_NXFONT_SANS28X37B=y +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +CONFIG_NXTERM=y + +# +# NxTerm Output Text/Graphics Options +# +CONFIG_NXTERM_BPP=16 +CONFIG_NXTERM_CURSORCHAR=137 +CONFIG_NXTERM_MXCHARS=640 +CONFIG_NXTERM_CACHESIZE=32 +CONFIG_NXTERM_LINESEPARATION=0 +# CONFIG_NXTERM_NOWRAP is not set + +# +# NxTerm Input options +# +CONFIG_NXTERM_NXKBDIN=y +CONFIG_NXTERM_KBDBUFSIZE=16 +CONFIG_NXTERM_NPOLLWAITERS=4 + +# +# NX Multi-user only options +# +CONFIG_NX_MULTIUSER=y +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXSERVERMSGS=32 +CONFIG_NX_MXCLIENTMSGS=16 +# CONFIG_NX_NXSTART is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +CONFIG_AUDIO=y +# CONFIG_AUDIO_MULTI_SESSION is not set + +# +# Audio Buffer Configuration +# +# CONFIG_AUDIO_LARGE_BUFFERS is not set +CONFIG_AUDIO_NUM_BUFFERS=4 +CONFIG_AUDIO_BUFFER_NUMBYTES=8192 +# CONFIG_AUDIO_DRIVER_SPECIFIC_BUFFERS is not set + +# +# Supported Audio Formats +# +# CONFIG_AUDIO_FORMAT_AC3 is not set +# CONFIG_AUDIO_FORMAT_DTS is not set +CONFIG_AUDIO_FORMAT_PCM=y +# CONFIG_AUDIO_FORMAT_MP3 is not set +# CONFIG_AUDIO_FORMAT_MIDI is not set +# CONFIG_AUDIO_FORMAT_WMA is not set +# CONFIG_AUDIO_FORMAT_OGG_VORBIS is not set + +# +# Exclude Specific Audio Features +# +# CONFIG_AUDIO_EXCLUDE_VOLUME is not set +# CONFIG_AUDIO_EXCLUDE_BALANCE is not set +CONFIG_AUDIO_EXCLUDE_EQUALIZER=y +# CONFIG_AUDIO_EXCLUDE_TONE is not set +# CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME is not set +# CONFIG_AUDIO_EXCLUDE_STOP is not set +# CONFIG_AUDIO_EXCLUDE_FFORWARD is not set +CONFIG_AUDIO_EXCLUDE_REWIND=y +# CONFIG_AUDIO_CUSTOM_DEV_PATH is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=0 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=0 +CONFIG_EXAMPLES_BUTTONS_NAME0="PB_USER" +CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=0 +CONFIG_NSH_ROMFSSECTSIZE=64 +# CONFIG_NSH_DEFAULTROMFS is not set +CONFIG_NSH_ARCHROMFS=y +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=1 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBKBD is not set +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT_THREAD=y +CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 +CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# +CONFIG_NXWIDGETS=y + +# +# NX Server/Device Configuration +# +# CONFIG_NXWIDGETS_FLICKERFREE is not set +# CONFIG_NXWIDGETS_EXTERNINIT is not set +CONFIG_NXWIDGETS_VPLANE=0 +CONFIG_NXWIDGET_SERVERINIT=y +CONFIG_NXWIDGETS_SERVERPRIO=110 +CONFIG_NXWIDGETS_SERVERSTACK=1596 +CONFIG_NXWIDGETS_CLIENTPRIO=100 +CONFIG_NXWIDGETS_LISTENERPRIO=100 +CONFIG_NXWIDGETS_LISTENERSTACK=1596 +# CONFIG_NXWIDGET_EVENTWAIT is not set + +# +# NXWidget Configuration +# +CONFIG_NXWIDGETS_BPP=16 +CONFIG_NXWIDGETS_SIZEOFCHAR=1 + +# +# NXWidget Default Values +# +# CONFIG_NXWIDGETS_SYSTEM_CUSTOM_FONTID is not set +CONFIG_NXWIDGETS_TNXARRAY_INITIALSIZE=16 +CONFIG_NXWIDGETS_TNXARRAY_SIZEINCREMENT=8 +# CONFIG_NXWIDGETS_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_TEXTCOLORS is not set +CONFIG_NXWIDGETS_TRANSPARENT_COLOR=0x0 + +# +# Keypad behavior +# +CONFIG_NXWIDGETS_FIRST_REPEAT_TIME=500 +CONFIG_NXWIDGETS_CONTINUE_REPEAT_TIME=200 +CONFIG_NXWIDGETS_DOUBLECLICK_TIME=350 +CONFIG_NXWIDGETS_KBDBUFFER_SIZE=16 +CONFIG_NXWIDGETS_CURSORCONTROL_SIZE=4 +# CONFIG_NXWIDGET_MEMMONITOR is not set +CONFIG_NXWM=y + +# +# NxWM General Settings +# +CONFIG_NXWM_LARGE_ICONS=y +# CONFIG_NXWM_CUSTOM_FONTID is not set +CONFIG_NXWM_UNITTEST=y + +# +# Color configuration +# +# CONFIG_NXWM_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWM_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWM_CUSTOM_TEXTCOLORS is not set + +# +# Background Image +# +# CONFIG_NXWM_DISABLE_BACKGROUND_IMAGE is not set +CONFIG_NXWM_BACKGROUND_IMAGE="NXWidgets::g_nuttxBitmap320x320" + +# +# NxWM Taskbar Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_TASKBAR_VSPACING=8 +CONFIG_NXWM_TASKBAR_HSPACING=8 +# CONFIG_NXWM_TASKBAR_TOP is not set +# CONFIG_NXWM_TASKBAR_BOTTOM is not set +CONFIG_NXWM_TASKBAR_LEFT=y +# CONFIG_NXWM_TASKBAR_RIGHT is not set +# CONFIG_NXWM_CUSTOM_TASKBAR_WIDTH is not set +# CONFIG_NXWM_TASKBAR_ICONSCALE is not set +# CONFIG_NXWM_DISABLE_MINIMIZE is not set +# CONFIG_NXWM_TASKBAR_NO_BORDER is not set + +# +# NxWM Toolbar Configuration +# +# CONFIG_NXWM_CUSTOM_TOOLBAR_HEIGHT is not set +CONFIG_NXWM_TOOLBAR_CUSTOM_FONTID=y +CONFIG_NXWM_TOOLBAR_FONTID=6 + +# +# NxWM Application Window Configuration +# +# CONFIG_NXWM_CUSTOM_APPWINDOW_ICONS is not set + +# +# NxWM Start Window Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_STARTWINDOW_VSPACING=8 +CONFIG_NXWM_STARTWINDOW_HSPACING=8 +# CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set +CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm" +CONFIG_NXWM_STARTWINDOW_MXMSGS=32 +CONFIG_NXWM_STARTWINDOW_MXMPRIO=42 +CONFIG_NXWM_STARTWINDOW_PRIO=100 +CONFIG_NXWM_STARTWINDOW_STACKSIZE=2048 + +# +# NxTerm Window Settings +# +CONFIG_NXWM_NXTERM=y +CONFIG_NXWM_NXTERM_PRIO=100 +CONFIG_NXWM_NXTERM_STACKSIZE=1596 +# CONFIG_NXWM_NXTERM_CUSTOM_COLORS is not set +CONFIG_NXWM_NXTERM_CUSTOM_FONTID=y +CONFIG_NXWM_NXTERM_FONTID=3 +# CONFIG_NXWM_CUSTOM_NXTERM_ICON is not set + +# +# NxWM Touchscreen Configuration +# +CONFIG_NXWM_TOUCHSCREEN=y + +# +# Touchscreen Device Settings +# +CONFIG_NXWM_TOUCHSCREEN_DEVINIT=y +CONFIG_NXWM_TOUCHSCREEN_DEVNO=0 +CONFIG_NXWM_TOUCHSCREEN_DEVPATH="/dev/input0" +CONFIG_NXWM_TOUCHSCREEN_SIGNO=5 +CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=120 +CONFIG_NXWM_TOUCHSCREEN_LISTENERSTACK=1596 + +# +# NxWM Keyboard Configuration +# +CONFIG_NXWM_KEYBOARD=y + +# +# Keyboard Device Settings +# +CONFIG_NXWM_KEYBOARD_DEVPATH="/dev/kbda" +CONFIG_NXWM_KEYBOARD_USBHOST=y +CONFIG_NXWM_KEYBOARD_SIGNO=6 +CONFIG_NXWM_KEYBOARD_BUFSIZE=16 +CONFIG_NXWM_KEYBOARD_LISTENERPRIO=120 +CONFIG_NXWM_KEYBOARD_LISTENERSTACK=1024 + +# +# NxWM Calibration Display Settings +# +CONFIG_NXWM_CALIBRATION_MARGIN=80 +# CONFIG_NXWM_CALIBRATION_CUSTOM_COLORS is not set +CONFIG_NXWM_CALIBRATION_MESSAGES=y +CONFIG_NXWM_CALIBRATION_CUSTOM_FONTID=y +CONFIG_NXWM_CALIBRATION_FONTID=6 +CONFIG_NXWM_CALIBRATION_AVERAGE=y +CONFIG_NXWM_CALIBRATION_NSAMPLES=2 +# CONFIG_NXWM_CALIBRATION_DISCARD_MINMAX is not set +# CONFIG_NXWM_CALIBRATION_ANISOTROPIC is not set +# CONFIG_NXWM_CUSTOM_CALIBRATION_ICON is not set +CONFIG_NXWM_CALIBRATION_SIGNO=5 +CONFIG_NXWM_CALIBRATION_LISTENERPRIO=100 +CONFIG_NXWM_CALIBRATION_LISTENERSTACK=1024 + +# +# NxWM Hex Calculator Display Settings +# +# CONFIG_NXWM_HEXCALCULATOR_CUSTOM_COLORS is not set +# CONFIG_NXWM_CUSTOM_HEXCALCULATOR_ICON is not set +CONFIG_NXWM_HEXCALCULATOR_CUSTOM_FONTID=y +CONFIG_NXWM_HEXCALCULATOR_FONTID=6 + +# +# NxWM Media Player Display Settings +# +CONFIG_NXWM_MEDIAPLAYER=y + +# +# NxPlayer Integration +# +CONFIG_NXWM_MEDIAPLAYER_PREFERRED_DEVICE="pcm0" + +# +# Media File Configuration +# +CONFIG_NXWM_MEDIAPLAYER_MEDIAPATH="/mnt/sdcard" +# CONFIG_NXWM_MEDIAPLAYER_NOFILTER is not set +CONFIG_NXWM_MEDIAPLAYER_FILTER=y +# CONFIG_NXWM_MEDIAPLAYER_FILTER_AC3 is not set +# CONFIG_NXWM_MEDIAPLAYER_FILTER_DTS is not set +CONFIG_NXWM_MEDIAPLAYER_FILTER_WAV=y +# CONFIG_NXWM_MEDIAPLAYER_FILTER_PCM is not set +# CONFIG_NXWM_MEDIAPLAYER_FILTER_MP3 is not set +# CONFIG_NXWM_MEDIAPLAYER_FILTER_MIDI is not set +# CONFIG_NXWM_MEDIAPLAYER_FILTER_WMA is not set +# CONFIG_NXWM_MEDIAPLAYER_FILTER_OGGVORBIS is not set + +# +# General Look and Feel +# +CONFIG_NXWM_MEDIAPLAYER_XSPACING=12 +CONFIG_NXWM_MEDIAPLAYER_YSPACING=16 +# CONFIG_NXWM_MEDIAPLAYER_CUSTOM_COLORS is not set +# CONFIG_NXWM_MEDIAPLAYER_BORDERS is not set + +# +# Volume Control Configuration +# +CONFIG_NXWM_MEDIAPLAYER_VOLUMESTEP=5 +CONFIG_NXWM_MEDIAPLAYER_MINVOLUMEHEIGHT=6 + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=0 +CONFIG_I2CTOOL_MAXBUS=0 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=100000 +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +CONFIG_SYSTEM_NXPLAYER=y +CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500 +# CONFIG_NXPLAYER_COMMAND_LINE is not set +# CONFIG_NXPLAYER_INCLUDE_DEVICE_SEARCH is not set +CONFIG_NXPLAYER_INCLUDE_PREFERRED_DEVICE=y +CONFIG_NXPLAYER_FMT_FROM_EXT=y +# CONFIG_NXPLAYER_FMT_FROM_HEADER is not set +CONFIG_NXPLAYER_INCLUDE_MEDIADIR=y +CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/mnt/sdcard" +CONFIG_NXPLAYER_RECURSIVE_MEDIA_SEARCH=y +# CONFIG_NXPLAYER_INCLUDE_SYSTEM_RESET is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d4-ek/nxwm/setenv.sh b/configs/sama5d4-ek/nxwm/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..24da498910a78f3516f6c09c47083513c6000274 --- /dev/null +++ b/configs/sama5d4-ek/nxwm/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d4-ek/nxwm/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d4-ek/ramtest/Make.defs b/configs/sama5d4-ek/ramtest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..bc78ca4a8f3943c0bf45c5ba52f3ad4bfea0ccbe --- /dev/null +++ b/configs/sama5d4-ek/ramtest/Make.defs @@ -0,0 +1,145 @@ +############################################################################ +# configs/sama5d4-ek/ramtest/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y) + LDSCRIPT = isram.ld +endif + +ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y) +ifeq ($(CONFIG_SAMA5D4EK_DRAM_BOOT),y) + LDSCRIPT = dramboot.ld +else + LDSCRIPT = uboot.ld +endif +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/sama5d4-ek/ramtest/defconfig b/configs/sama5d4-ek/ramtest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..f9981f1e3e88c7c38a207299486b645bd367d5aa --- /dev/null +++ b/configs/sama5d4-ek/ramtest/defconfig @@ -0,0 +1,980 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +CONFIG_ARCH_CHIP_SAMA5=y +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +CONFIG_ARCH_CORTEXA5=y +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="sama5" +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +# CONFIG_ARMV7A_HAVE_GICv2 is not set +CONFIG_ARMV7A_HAVE_L2CC=y +CONFIG_ARMV7A_HAVE_L2CC_PL310=y + +# +# L2 Cache Configuration +# +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# SAMA5 Configuration Options +# +CONFIG_SAMA5_HAVE_AESB=y +CONFIG_SAMA5_HAVE_ICM=y +# CONFIG_SAMA5_HAVE_RXLP is not set +CONFIG_SAMA5_HAVE_UART0=y +CONFIG_SAMA5_HAVE_UART1=y +# CONFIG_SAMA5_HAVE_UART2 is not set +# CONFIG_SAMA5_HAVE_UART3 is not set +# CONFIG_SAMA5_HAVE_UART4 is not set +CONFIG_SAMA5_HAVE_USART0=y +CONFIG_SAMA5_HAVE_USART1=y +CONFIG_SAMA5_HAVE_USART2=y +CONFIG_SAMA5_HAVE_USART3=y +CONFIG_SAMA5_HAVE_USART4=y +# CONFIG_SAMA5_HAVE_FLEXCOM0 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM1 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM2 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM3 is not set +# CONFIG_SAMA5_HAVE_FLEXCOM4 is not set +# CONFIG_SAMA5_HAVE_CAN0 is not set +# CONFIG_SAMA5_HAVE_CAN1 is not set +# CONFIG_SAMA5_HAVE_DMA is not set +CONFIG_SAMA5_HAVE_DDR32=y +CONFIG_SAMA5_HAVE_XDMA=y +CONFIG_SAMA5_HAVE_LCDC=y +# CONFIG_SAMA5_HAVE_GMAC is not set +# CONFIG_SAMA5_HAVE_EMACA is not set +CONFIG_SAMA5_HAVE_EMACB=y +CONFIG_SAMA5_HAVE_EMAC1=y +# CONFIG_SAMA5_HAVE_HSMCI2 is not set +CONFIG_SAMA5_HAVE_PIOE=y +CONFIG_SAMA5_HAVE_SAIC=y +CONFIG_SAMA5_HAVE_SBM=y +CONFIG_SAMA5_HAVE_SFC=y +CONFIG_SAMA5_HAVE_SPI2=y +# CONFIG_SAMA5_HAVE_TC is not set +CONFIG_SAMA5_HAVE_TC1=y +CONFIG_SAMA5_HAVE_TC2=y +CONFIG_ARCH_HAVE_TRUSTZONE=y +CONFIG_SAMA5_HAVE_TWI3=y +CONFIG_SAMA5_HAVE_VDEC=y +# CONFIG_SAMA5_FLEXCOM is not set +# CONFIG_SAMA5_FLEXCOM_USART is not set +# CONFIG_SAMA5_FLEXCOM_SPI is not set +# CONFIG_SAMA5_FLEXCOM_TWI is not set +# CONFIG_ARCH_CHIP_SAMA5D2 is not set +# CONFIG_ARCH_CHIP_SAMA5D3 is not set +CONFIG_ARCH_CHIP_SAMA5D4=y +# CONFIG_ARCH_CHIP_ATSAMA5D21 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D22 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D23 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D24 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D26 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D27 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D28 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D31 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D33 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D34 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D35 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D36 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D41 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D42 is not set +# CONFIG_ARCH_CHIP_ATSAMA5D43 is not set +CONFIG_ARCH_CHIP_ATSAMA5D44=y + +# +# SAMA5 Peripheral Support +# +# CONFIG_SAMA5_AES is not set +# CONFIG_SAMA5_TDES is not set +# CONFIG_SAMA5_AESB is not set +# CONFIG_SAMA5_DBGU is not set +# CONFIG_SAMA5_PIT is not set +# CONFIG_SAMA5_WDT is not set +# CONFIG_SAMA5_RTC is not set +# CONFIG_SAMA5_ICM is not set +CONFIG_SAMA5_HSMC=y +# CONFIG_SAMA5_SMD is not set +# CONFIG_SAMA5_SAIC is not set +# CONFIG_SAMA5_UART0 is not set +# CONFIG_SAMA5_UART1 is not set +# CONFIG_SAMA5_USART0 is not set +# CONFIG_SAMA5_USART1 is not set +# CONFIG_SAMA5_USART2 is not set +CONFIG_SAMA5_USART3=y +# CONFIG_SAMA5_USART4 is not set +# CONFIG_SAMA5_TWI0 is not set +# CONFIG_SAMA5_TWI1 is not set +# CONFIG_SAMA5_TWI2 is not set +# CONFIG_SAMA5_TWI3 is not set +# CONFIG_SAMA5_HSMCI0 is not set +# CONFIG_SAMA5_HSMCI1 is not set +# CONFIG_SAMA5_SBM is not set +# CONFIG_SAMA5_SFC is not set +# CONFIG_SAMA5_SPI0 is not set +# CONFIG_SAMA5_SPI1 is not set +# CONFIG_SAMA5_SPI2 is not set +# CONFIG_SAMA5_TC0 is not set +# CONFIG_SAMA5_TC1 is not set +# CONFIG_SAMA5_TC2 is not set +# CONFIG_SAMA5_PWM is not set +# CONFIG_SAMA5_ADC is not set +# CONFIG_SAMA5_XDMAC0 is not set +# CONFIG_SAMA5_XDMAC1 is not set +# CONFIG_SAMA5_UHPHS is not set +# CONFIG_SAMA5_UDPHS is not set +# CONFIG_SAMA5_EMACB is not set +# CONFIG_SAMA5_EMAC0 is not set +# CONFIG_SAMA5_EMAC1 is not set +# CONFIG_SAMA5_LCDC is not set +# CONFIG_SAMA5_ISI is not set +# CONFIG_SAMA5_SHA is not set +# CONFIG_SAMA5_TRNG is not set +# CONFIG_SAMA5_ARM is not set +# CONFIG_SAMA5_FUSE is not set +CONFIG_SAMA5_MPDDRC=y +# CONFIG_SAMA5_VDEC is not set +# CONFIG_SAMA5_PIO_IRQ is not set + +# +# External Memory Configuration +# +CONFIG_SAMA5_DDRCS=y +CONFIG_SAMA5_DDRCS_SIZE=268435456 +# CONFIG_SAMA5_DDRCS_LPDDR1 is not set +CONFIG_SAMA5_DDRCS_LPDDR2=y +# CONFIG_SAMA5_EBICS0 is not set +# CONFIG_SAMA5_EBICS1 is not set +# CONFIG_SAMA5_EBICS2 is not set +# CONFIG_SAMA5_EBICS3 is not set +# CONFIG_SAMA5_HAVE_NAND is not set +# CONFIG_SAMA5_HAVE_PMECC is not set +CONFIG_SAMA5_BOOT_ISRAM=y +# CONFIG_SAMA5_BOOT_SDRAM is not set + +# +# Heap Configuration +# +CONFIG_SAMA5_DDRCS_HEAP=y +CONFIG_SAMA5_DDRCS_HEAP_OFFSET=0 +CONFIG_SAMA5_DDRCS_HEAP_SIZE=0 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +CONFIG_ARCH_NAND_HWECC=y +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=65775 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +CONFIG_BOOT_RUNFROMISRAM=y +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00200000 +CONFIG_RAM_VSTART=0x00200000 +CONFIG_RAM_SIZE=114688 +CONFIG_ARCH_HAVE_SDRAM=y +# CONFIG_BOOT_SDRAM_DATA is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMA5D4_EK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sama5d4-ek" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_SAMA5D4_MB_REVC=y +# CONFIG_SAMA5D4_MB_REVE is not set +# CONFIG_SAMA5D4EK_384MHZ is not set +# CONFIG_SAMA5D4EK_396MHZ is not set +CONFIG_SAMA5D4EK_528MHZ=y +CONFIG_SAMA5D4EK_MT47H128M16RT=y +# CONFIG_SAMA5D4EK_MT47H64M16HR is not set +# CONFIG_SAMA5D4EK_DRAM_MAIN is not set +# CONFIG_SAMA5D4EK_AT25_MAIN is not set +# CONFIG_SAMA5D4EK_SLOWCLOCK is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=31 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=1 +CONFIG_NSH_DISABLEBG=y +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +CONFIG_NSH_DISABLE_CAT=y +CONFIG_NSH_DISABLE_CD=y +CONFIG_NSH_DISABLE_CP=y +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +CONFIG_NSH_DISABLE_ECHO=y +CONFIG_NSH_DISABLE_EXEC=y +CONFIG_NSH_DISABLE_EXIT=y +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +CONFIG_NSH_DISABLE_HEXDUMP=y +CONFIG_NSH_DISABLE_IFCONFIG=y +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +CONFIG_NSH_DISABLE_KILL=y +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +CONFIG_NSH_DISABLE_LS=y +# CONFIG_NSH_DISABLE_MB is not set +CONFIG_NSH_DISABLE_MKDIR=y +CONFIG_NSH_DISABLE_MKFATFS=y +CONFIG_NSH_DISABLE_MKFIFO=y +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +CONFIG_NSH_DISABLE_MOUNT=y +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +CONFIG_NSH_DISABLE_PS=y +CONFIG_NSH_DISABLE_PUT=y +CONFIG_NSH_DISABLE_PWD=y +CONFIG_NSH_DISABLE_RM=y +CONFIG_NSH_DISABLE_RMDIR=y +CONFIG_NSH_DISABLE_SET=y +CONFIG_NSH_DISABLE_SH=y +CONFIG_NSH_DISABLE_SLEEP=y +# CONFIG_NSH_DISABLE_TIME is not set +CONFIG_NSH_DISABLE_TEST=y +CONFIG_NSH_DISABLE_UMOUNT=y +# CONFIG_NSH_DISABLE_UNAME is not set +CONFIG_NSH_DISABLE_UNSET=y +CONFIG_NSH_DISABLE_USLEEP=y +CONFIG_NSH_DISABLE_WGET=y +CONFIG_NSH_DISABLE_XD=y + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +CONFIG_SYSTEM_RAMTEST=y +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d4-ek/ramtest/setenv.sh b/configs/sama5d4-ek/ramtest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..9cab6f5a10065f2cd49783b1c5c7941b0a576af9 --- /dev/null +++ b/configs/sama5d4-ek/ramtest/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/sama5d4-ek/ramtest/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sama5d4-ek/scripts/dramboot.ld b/configs/sama5d4-ek/scripts/dramboot.ld new file mode 100644 index 0000000000000000000000000000000000000000..4ca01c6b88f1bf5cd40e307beca6db5d5e1a0332 --- /dev/null +++ b/configs/sama5d4-ek/scripts/dramboot.ld @@ -0,0 +1,123 @@ +/**************************************************************************** + * configs/sama5d4-ek/scripts/dramboot.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMA5D4 has 128 KB of ISRAM beginning at virtual address 0x0020:0000. + * This memory configuration, however, loads into the 256MB SDRAM on board + * the SAMA5D4-EK which lies at 0x2000:0000. + * + * Vectors in low memory are assumed and 16KB of ISRAM is reserved at the + * high end of ISRAM for the page table. + */ + +MEMORY +{ + isram (W!RX) : ORIGIN = 0x00200000, LENGTH = 128K - 16K + sdram (W!RX) : ORIGIN = 0x20000000, LENGTH = 256M +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _etext = ABSOLUTE(.); + } > sdram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > sdram + + .ARM.extab : { + *(.ARM.extab*) + } > sdram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > sdram + PROVIDE_HIDDEN (__exidx_end = .); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sdram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sdram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d4-ek/scripts/gnu-elf.ld b/configs/sama5d4-ek/scripts/gnu-elf.ld new file mode 100644 index 0000000000000000000000000000000000000000..6d402a750d7a727d11628679ad15d3ab96d3108e --- /dev/null +++ b/configs/sama5d4-ek/scripts/gnu-elf.ld @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/sama5d4-ek/scripts/gnu-elf.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +SECTIONS +{ + .text 0x00000000 : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + *(.ctors) /* Old ABI: Unallocated */ + *(.init_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .dtors : + { + _sdtors = . ; + *(.dtors) /* Old ABI: Unallocated */ + *(.fini_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = . ; + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d4-ek/scripts/isram.ld b/configs/sama5d4-ek/scripts/isram.ld new file mode 100644 index 0000000000000000000000000000000000000000..85bc4dfc4f019d978f9d5e07ab810ace09088fe9 --- /dev/null +++ b/configs/sama5d4-ek/scripts/isram.ld @@ -0,0 +1,120 @@ +/**************************************************************************** + * configs/sama5d4-ek/scripts/isram.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMA5D44 has 128 KB of ISRAM beginning at virtual address 0x0020:0000. + * + * Vectors in low memory are assumed and 16KB of ISRAM is reserved at the + * high end of ISRAM for the page table. + */ + +MEMORY +{ + isram (W!RX) : ORIGIN = 0x00200000, LENGTH = 128K - 16K +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _etext = ABSOLUTE(.); + } > isram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > isram + + .ARM.extab : { + *(.ARM.extab*) + } > isram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > isram + PROVIDE_HIDDEN (__exidx_end = .); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > isram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > isram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d4-ek/scripts/uboot.ld b/configs/sama5d4-ek/scripts/uboot.ld new file mode 100644 index 0000000000000000000000000000000000000000..530be22418e88602228d1670df0f55a3ff1f20a2 --- /dev/null +++ b/configs/sama5d4-ek/scripts/uboot.ld @@ -0,0 +1,124 @@ +/**************************************************************************** + * configs/sama5d4-ek/scripts/uboot.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMA5D4 has 128 KB of ISRAM beginning at virtual address 0x0020:0000. + * This memory configuration, however, loads into the 256MB SDRAM on board + * the SAMA5D4-EK which lies at 0x2000:0000. An offset 0x00008000 is + * reserved for used by the U-boot bootloader. + * + * Vectors in low memory are assumed and 16KB of ISRAM is reserved at the + * high end of ISRAM for the page table. + */ + +MEMORY +{ + isram (W!RX) : ORIGIN = 0x00200000, LENGTH = 128K - 16K + sdram (W!RX) : ORIGIN = 0x20008000, LENGTH = 256M - 32K +} + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(entry) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + _etext = ABSOLUTE(.); + } > sdram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > sdram + + .ARM.extab : { + *(.ARM.extab*) + } > sdram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > sdram + PROVIDE_HIDDEN (__exidx_end = .); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sdram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sdram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sama5d4-ek/src/Makefile b/configs/sama5d4-ek/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..6e13295ef2c2e7130169dab55fe597c15c9cecb7 --- /dev/null +++ b/configs/sama5d4-ek/src/Makefile @@ -0,0 +1,149 @@ +############################################################################ +# configs/sama5d4-ek/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c + +ifeq ($(CONFIG_SAMA5_SPI0),y) +CSRCS += sam_spi.c +else +ifeq ($(CONFIG_SAMA5_SPI1),y) +CSRCS += sam_spi.c +endif +endif + +ifeq ($(CONFIG_SAMA5_DDRCS),y) +CSRCS += sam_sdram.c +endif + +ifeq ($(CONFIG_SAMA5_EBICS3_NAND),y) +CSRCS += sam_nandflash.c +endif + +ifeq ($(CONFIG_SAMA5D4EK_DRAM_MAIN),y) +CSRCS += dram_main.c +endif + +ifeq ($(CONFIG_SAMA5D4EK_AT25_MAIN),y) +CSRCS += at25_main.c +endif + +ifeq ($(CONFIG_MTD_AT25),y) +ifeq ($(CONFIG_SAMA5_SPI0),y) +CSRCS += sam_at25.c +endif +endif + +ifeq ($(CONFIG_FS_AUTOMOUNTER),y) +CSRCS += sam_automount.c +endif + +ifeq ($(CONFIG_AUDIO_WM8904),y) +ifeq ($(CONFIG_SAMA5_TWI0),y) +ifeq ($(CONFIG_SAMA5_SSC0),y) +CSRCS += sam_wm8904.c +endif +endif +endif + +ifeq ($(CONFIG_SAMA5_TWI0),y) +CSRCS += sam_pmic.c +endif + +ifeq ($(CONFIG_AUDIO_NULL),y) +CSRCS += sam_audio_null.c +endif + +ifeq ($(CONFIG_SAMA5_HSMCI0),y) +CSRCS += sam_hsmci.c +else +ifeq ($(CONFIG_SAMA5_HSMCI1),y) +CSRCS += sam_hsmci.c +endif +endif + +ifeq ($(CONFIG_SAMA5_UHPHS),y) +CSRCS += sam_usb.c +else +ifeq ($(CONFIG_SAMA5_UDPHS),y) +CSRCS += sam_usb.c +endif +endif + +ifeq ($(CONFIG_SAMA5_EMACB),y) +CSRCS += sam_ethernet.c +endif + +ifeq ($(CONFIG_INPUT_MXT),y) +CSRCS += sam_maxtouch.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += sam_appinit.c sam_bringup.c +else +ifeq ($(CONFIG_BOARD_INITIALIZE),y) +CSRCS += sam_bringup.c +endif +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += sam_adc.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += sam_pwm.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += sam_usbmsc.c +endif + +ifeq ($(CONFIG_ARCH_FPU),y) +CSRCS += sam_ostest.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += sam_autoleds.c +else +CSRCS += sam_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += sam_buttons.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/sama5d4-ek/src/at25_main.c b/configs/sama5d4-ek/src/at25_main.c new file mode 100644 index 0000000000000000000000000000000000000000..078ee1725d10f762a35ac4d9a5e0ba4dd874286c --- /dev/null +++ b/configs/sama5d4-ek/src/at25_main.c @@ -0,0 +1,286 @@ +/**************************************************************************** + * configs/sama5d4-ek/src/at25_main.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "sama5d4-ek.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef HAVE_AT25 +# error The AT25 Serial FLASH is not available +#endif + +#ifndef CONFIG_SAMA5D4EK_AT25_BLOCKMOUNT +# error CONFIG_SAMA5D4EK_AT25_BLOCKMOUNT must be selected +#endif + +#ifndef CONFIG_SAMA5D4EK_AT25_CHARDEV +# error CONFIG_SAMA5D4EK_AT25_CHARDEV must be selected +#endif + +#ifdef CONFIG_BOOT_SDRAM_DATA +# error CONFIG_BOOT_SDRAM_DATA must NOT be selected +#endif + +#if !defined(CONFIG_SAMA5D4EK_AT25_PROGSIZE) || CONFIG_SAMA5D4EK_AT25_PROGSIZE < 128 +# error Large CONFIG_SAMA5D4EK_AT25_PROGSIZE must be selected +#endif + +#define DEVNAME_MAXSIZE 12 +#define IOBUFFER_SIZE 512 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static uint8_t g_iobuffer[IOBUFFER_SIZE]; +static char g_at25dev[DEVNAME_MAXSIZE]; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: at25_main + * + * Description: + * at25_main is a tiny program that runs in ISRAM. at25_main will + * configure DRAM and the AT25 serial FLASH, present a prompt, and load + * an Intel HEX file into the AT25 serial FLASH (after first buffering + * the binary data into memory). On re-boot, the program loaded into + * the AT25 FLASH should then execute. + * + * On entry: + * - SDRAM has already been initialized (we are using it for .bss!) + * - SPI0 chip select has already been configured. + * + ****************************************************************************/ + +int at25_main(int argc, char *argv) +{ + struct lib_rawinstream_s rawinstream; + struct lib_memsostream_s memoutstream; + const uint8_t *src; + ssize_t nwritten; + ssize_t nread; + ssize_t remaining; + size_t rdsize; + int fd; + int ret; + + /* Configure the AT25 as the a character device. */ + + ret = sam_at25_automount(AT25_MINOR); + if (ret < 0) + { + fprintf(stderr, "ERROR: Failed to mount AT25 FLASH: %d\n", ret); + return EXIT_FAILURE; + } + + /* Open the AT25 device for writing */ + + snprintf(g_at25dev, DEVNAME_MAXSIZE, "/dev/mtd%d", AT25_MINOR); + fd = open(g_at25dev, O_WRONLY); + if (fd < 0) + { + int errcode = errno; + fprintf(stderr, "ERROR: Failed to open %s: %d\n", g_at25dev, errcode); + return EXIT_FAILURE; + } + + /* Wrap stdin as an IN stream that can the HEX data over the serial port */ + + lib_rawinstream(&rawinstream, 0); + + /* Define a memory buffer of size CONFIG_SAMA5D4EK_AT25_PROGSIZE at the + * beginning of SDRAM. Wrap the memory buffer as a seek-able OUT stream in + * which we can buffer the binary data. + */ + + lib_memsostream(&memoutstream, (FAR char *)SAM_DDRCS_VSECTION, + CONFIG_SAMA5D4EK_AT25_PROGSIZE); + + /* We are ready to load the Intel HEX stream into DRAM. + * + * Hmm.. With no hardware handshake, there is a possibility of data loss + * to overrunning incoming data buffer. So far I have not seen this at + * 115200 8N1, but still it is a possibility. + */ + + printf("Send Intel HEX file now\n"); + fflush(stdout); + + ret = hex2bin(&rawinstream.public, &memoutstream.public, + (uint32_t)SAM_ISRAM_VSECTION, + (uint32_t)(SAM_ISRAM_VSECTION + CONFIG_SAMA5D4EK_AT25_PROGSIZE), + 0); + if (ret < 0) + { + /* We failed the load */ + + fprintf(stderr, "ERROR: Intel HEX file load failed: %d\n", ret); + close(fd); + return EXIT_FAILURE; + } + + /* Replace the vector at offset 0x14 with the size of the image to load + * into SRAM. The RomBOOT loader expects to find this size at that + * location. + */ + + *(uint32_t *)(SAM_DDRCS_VSECTION + 0x14) = memoutstream.public.nput; + + /* The HEX file load was successful, write the data to FLASH */ + + printf("Successfully loaded the Intel HEX file into memory...\n"); + printf(" Writing %d bytes to the AT25 Serial FLASH\n", + memoutstream.public.nput); + + remaining = memoutstream.public.nput; + src = (uint8_t *)SAM_DDRCS_VSECTION; + + do + { + nwritten = write(fd, src, memoutstream.public.nput); + if (nwritten <= 0) + { + int errcode = errno; + if (errno != EINTR) + { + fprintf(stderr, "ERROR: Write failed: %d\n", errcode); + close(fd); + return EXIT_FAILURE; + } + } + else + { + remaining -= nwritten; + src += nwritten; + } + } + while (remaining > 0); + + close(fd); + + /* Now verify that the image in memory and the image in FLASH are truly + * the same. + */ + + printf(" Verifying %d bytes in the AT25 Serial FLASH\n", + memoutstream.public.nput); + + /* Open the AT25 device for writing */ + + fd = open(g_at25dev, O_RDONLY); + if (fd < 0) + { + int errcode = errno; + fprintf(stderr, "ERROR: Failed to open %s: %d\n", g_at25dev, errcode); + return EXIT_FAILURE; + } + + remaining = memoutstream.public.nput; + src = (const uint8_t *)SAM_DDRCS_VSECTION; + + do + { + rdsize = remaining; + if (rdsize > IOBUFFER_SIZE) + { + rdsize = IOBUFFER_SIZE; + } + + nread = read(fd, g_iobuffer, rdsize); + if (nread <= 0) + { + int errcode = errno; + if (errno != EINTR) + { + fprintf(stderr, "ERROR: Read failed: %d\n", errcode); + close(fd); + return EXIT_FAILURE; + } + } + else + { + if (memcmp(g_iobuffer, src, nread) != 0) + { + fprintf(stderr, "ERROR: Verify failed at offset %d\n", + memoutstream.public.nput - remaining); + close(fd); + return EXIT_FAILURE; + } + + remaining -= nwritten; + src += nwritten; + } + } + while (remaining > 0); + + printf(" Successfully verified %d bytes in the AT25 Serial FLASH\n", + memoutstream.public.nput); + + close(fd); + return EXIT_SUCCESS; +} diff --git a/configs/sama5d4-ek/src/dram_main.c b/configs/sama5d4-ek/src/dram_main.c new file mode 100644 index 0000000000000000000000000000000000000000..a36b646646425620fcf3f285a979d428e514556e --- /dev/null +++ b/configs/sama5d4-ek/src/dram_main.c @@ -0,0 +1,180 @@ +/**************************************************************************** + * configs/sama5d4-ek/src/dram_main.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "up_arch.h" +#include "mmu.h" +#include "cache.h" + +#include "sama5d4-ek.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define DRAM_ENTRY ((dram_entry_t)SAM_DDRCS_VSECTION) + +#define DRAM_WAIT 1 +#define DRAM_NOWAIT 0 + +#ifdef CONFIG_SAMA5D4EK_DRAM_START +# define DRAM_BOOT_MODE DRAM_NOWAIT +#else +# define DRAM_BOOT_MODE DRAM_WAIT +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +typedef void (*dram_entry_t)(void); + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: dram_main + * + * Description: + * dram_main is a tiny program that runs in ISRAM. dram_main will + * configure DRAM, present a prompt, load an Intel HEX file into DRAM, + * and either start that program or wait for you to break in with the + * debugger. + * + ****************************************************************************/ + +int dram_main(int argc, char *argv) +{ + /* Here we have a in memory value we can change in the debugger + * to begin booting in NOR Flash + */ + + static volatile uint32_t wait = DRAM_BOOT_MODE; + int ret; + + /* Disable the PMC. This is necessary on the SAMA5D4-MB Rev C. board. On + * that board, the PMIC can lock up the I2C bus. The work around is + * awkward: + * + * 1. Open JP23 (disabling the WM8904 data line) + * 2. Execute DRAMBOOT. The WM8904 will be disabled while JP23 is open. + * 3. At the prompt to "Send the Intel HEX file now", close JP23, + * enabling the WM8904. + * 4. Send the NuttX file. When NuttX starts, the WM8904 is initialized, + * JP23 will be closed and the PMIC will be initialized. + */ + + sam_pmic_initialize(); + + /* DRAM was already initialized at boot time, so we are ready to load the + * Intel HEX stream into DRAM. + * + * Hmm.. With no hardware handshake, there is a possibility of data loss + * to overrunning incoming data buffer. So far I have not seen this at + * 115200 8N1, but still it is a possibility. + */ + + printf("Send Intel HEX file now\n"); + fflush(stdout); + + ret = hex2mem(0, /* Accept Intel HEX on stdin */ + (uint32_t)SAM_DDRCS_VSECTION, + (uint32_t)(SAM_DDRCS_VSECTION + CONFIG_SAMA5_DDRCS_SIZE), + 0); + if (ret < 0) + { + /* We failed the load */ + + printf("ERROR: Intel HEX file load failed: %d\n", ret); + fflush(stdout); + for(;;); + } + + /* No success indication.. The following cache/MMU operations will clobber + * any I/O that we attempt (Hmm.. unless, perhaps, if we delayed. But who + * wants a delay?). + */ + + /* Flush the entire data cache assure that everything is in memory before + * we disable caching. + */ + + arch_clean_dcache((uintptr_t)SAM_DDRCS_VSECTION, + (uintptr_t)(SAM_DDRCS_VSECTION + CONFIG_SAMA5_DDRCS_SIZE)); + + /* Interrupts must be disabled through the following. In this configuration, + * there should only be timer interrupts. Your NuttX configuration must use + * CONFIG_SERIAL_LOWCONSOLE=y or printf() will hang when the interrupts + * are disabled! + */ + + (void)up_irq_save(); + + /* Disable the caches and the MMU. Disabling the MMU should be safe here + * because there is a 1-to-1 identity mapping between the physical and + * virtual addressing. + */ + + cp15_disable_mmu(); + cp15_disable_caches(); + + /* Invalidate caches and TLBs */ + + cp15_invalidate_icache(); + cp15_invalidate_dcache_all(); + cp15_invalidate_tlbs(); + + /* Then jump into NOR flash */ + + while (wait) + { + } + + DRAM_ENTRY(); + + return 0; /* We should not get here in either case */ +} diff --git a/configs/sama5d4-ek/src/sam_adc.c b/configs/sama5d4-ek/src/sam_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..13346a91b90f2ce4d65e8d9f68494a9ad2d1c7f4 --- /dev/null +++ b/configs/sama5d4-ek/src/sam_adc.c @@ -0,0 +1,118 @@ +/************************************************************************************ + * configs/sama5d4-ek/src/sam_adc.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "sam_adc.h" +#include "sama5d4-ek.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ +#ifdef CONFIG_SAMA5_ADC + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + + adc = sam_adc_initialize(); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +#else + return -ENOSYS; +#endif +} + +#endif /* CONFIG_ADC */ diff --git a/configs/sama5d4-ek/src/sam_appinit.c b/configs/sama5d4-ek/src/sam_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..9632e33353f7f3ae80c0a23e712f92216d2c0c97 --- /dev/null +++ b/configs/sama5d4-ek/src/sam_appinit.c @@ -0,0 +1,75 @@ +/**************************************************************************** + * config/sama5d4-ek/src/sam_appinit.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "sama5d4-ek.h" + +#ifndef CONFIG_BUILD_KERNEL + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifndef CONFIG_BOARD_INITIALIZE + /* Perform board initialization */ + + return sam_bringup(); +#else + return OK; +#endif +} + +#endif /* CONFIG_BUILD_KERNEL */ diff --git a/configs/sama5d4-ek/src/sam_at25.c b/configs/sama5d4-ek/src/sam_at25.c new file mode 100644 index 0000000000000000000000000000000000000000..f2a4c4d1d83f8c139f8a4564d5dc8cfc8d119074 --- /dev/null +++ b/configs/sama5d4-ek/src/sam_at25.c @@ -0,0 +1,173 @@ +/**************************************************************************** + * config/sama5d4-ek/src/sam_at25.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "sam_spi.h" +#include "sama5d4-ek.h" + +#ifdef HAVE_AT25 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_at25_automount + * + * Description: + * Initialize and configure the AT25 serial FLASH + * + ****************************************************************************/ + +int sam_at25_automount(int minor) +{ + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; +#ifdef CONFIG_SAMA5D4EK_AT25_CHARDEV + char blockdev[18]; + char chardev[12]; +#endif + static bool initialized = false; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* No.. Get the SPI port driver */ + + spi = sam_spibus_initialize(AT25_PORT); + if (!spi) + { + fdbg("ERROR: Failed to initialize SPI port %d\n", AT25_PORT); + return -ENODEV; + } + + /* Now bind the SPI interface to the AT25 SPI FLASH driver */ + + mtd = at25_initialize(spi); + if (!mtd) + { + fdbg("ERROR: Failed to bind SPI port %d to the AT25 FLASH driver\n"); + return -ENODEV; + } + +#if defined(CONFIG_SAMA5D4EK_AT25_FTL) + /* And finally, use the FTL layer to wrap the MTD driver as a block + * driver. + */ + + ret = ftl_initialize(minor, mtd); + if (ret < 0) + { + fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + +#elif defined(CONFIG_SAMA5D4EK_AT25_CHARDEV) + /* Use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(minor, mtd); + if (ret < 0) + { + fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + + /* Use the minor number to create device paths */ + + snprintf(blockdev, 18, "/dev/mtdblock%d", minor); + snprintf(chardev, 12, "/dev/mtd%d", minor); + + /* Now create a character device on the block device */ + + ret = bchdev_register(blockdev, chardev, false); + if (ret < 0) + { + fdbg("ERROR: bchdev_register %s failed: %d\n", chardev, ret); + return ret; + } + +#elif defined(CONFIG_SAMA5D4EK_AT25_NXFFS) + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", ret); + return ret; + } + + /* Mount the file system at /mnt/at25 */ + + ret = mount(NULL, "/mnt/at25", "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } + +#endif + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* HAVE_AT25 */ diff --git a/configs/sama5d4-ek/src/sam_audio_null.c b/configs/sama5d4-ek/src/sam_audio_null.c new file mode 100644 index 0000000000000000000000000000000000000000..654fea6011efa0944e08796924cba7f016d5097e --- /dev/null +++ b/configs/sama5d4-ek/src/sam_audio_null.c @@ -0,0 +1,168 @@ +/************************************************************************************ + * configs/sama5d4-ek/src/sam_audio_null.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "sama5d4-ek.h" + +#ifdef HAVE_AUDIO_NULL + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_audio_null_initialize + * + * Description: + * Set up to use the NULL audio device for PCM unit-level testing. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int sam_audio_null_initialize(int minor) +{ + FAR struct audio_lowerhalf_s *nullaudio; + FAR struct audio_lowerhalf_s *pcm; + static bool initialized = false; + char devname[12]; + int ret; + + auddbg("minor %d\n", minor); + DEBUGASSERT(minor >= 0 && minor <= 25); + + /* Have we already initialized? Since we never uninitialize we must prevent + * multiple initializations. This is necessary, for example, when the + * touchscreen example is used as a built-in application in NSH and can be + * called numerous time. It will attempt to initialize each time. + */ + + if (!initialized) + { + /* Get a null audio interface + */ + + nullaudio = audio_null_initialize(); + if (!nullaudio) + { + auddbg("Failed to get the NULL audio interface\n"); + ret = -ENODEV; + goto errout; + } + + /* No we can embed the null audio interface into a PCM decoder + * instance so that we will have a PCM front end for the NULL + * audio driver. + */ + + pcm = pcm_decode_initialize(nullaudio); + if (!pcm) + { + auddbg("ERROR: Failed create the PCM decoder\n"); + ret = -ENODEV; + goto errout_with_nullaudio; + } + + /* Create a device name */ + + snprintf(devname, 12, "pcm%d", minor); + + /* Finally, we can register the PCM/NULL audio device. */ + + ret = audio_register(devname, pcm); + if (ret < 0) + { + auddbg("ERROR: Failed to register /dev/%s device: %d\n", devname, ret); + goto errout_with_pcm; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; + + /* Error exits. Unfortunately there is no mechanism in place now to + * recover resources from most errors on initialization failures. + */ + +errout_with_nullaudio: +errout_with_pcm: +errout: + return ret; +} + +#endif /* HAVE_AUDIO_NULL */ diff --git a/configs/sama5d4-ek/src/sam_autoleds.c b/configs/sama5d4-ek/src/sam_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..178000a3cc5514bf102053dcb49e9c9277cee2ee --- /dev/null +++ b/configs/sama5d4-ek/src/sam_autoleds.c @@ -0,0 +1,194 @@ +/**************************************************************************** + * configs/sama5d4-ek/src/sam_autoleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are 3 LEDs on the SAMA5D4-EK: + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D4 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PE28/NWAIT/RTS4/A19 1Wire_PE28 1-WIRE ROM, LCD, D8 (green) + * PE8/A8/TCLK3/PWML3 LED_USER_PE8 LED_USER (D10) + * PE9/A9/TIOA2 LED_POWER_PE9 LED_POWER (D9, Red) + * ------------------------------ ------------------- ------------------------- + * + * - D8: D8 is shared with other functions and cannot be used if the 1-Wire ROM + * is used. I am not sure of the LCD function, but the LED may not be available + * if the LCD is used either. We will avoid using D8 just for simplicity. + * - D10: Nothing special here. A low output illuminates. + * - D9: The Power ON LED. Connects to the via an IRLML2502 MOSFET. This LED will + * be on when power is applied but otherwise a low output value will turn it + * off. + * + * These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL Meaning LED state + * USER D10 POWER D9 + * ------------------- ----------------------- -------- -------- + * LED_STARTED NuttX has been started OFF ON + * LED_HEAPALLOCATE Heap has been allocated OFF ON + * LED_IRQSENABLED Interrupts enabled OFF ON + * LED_STACKCREATED Idle stack created ON ON + * LED_INIRQ In an interrupt No change + * LED_SIGNAL In a signal handler No change + * LED_ASSERTION An assertion failed No change + * LED_PANIC The system has crashed OFF Blinking + * LED_IDLE MCU is is sleep mode Not used + * + * Thus if the D0 and D9 are statically on, NuttX has successfully booted and + * is, apparently, running normally. If the red D9 LED is flashing at + * approximately 2Hz, then a fatal error has been detected and the system + * has halted. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_pio.h" +#include "sama5d4-ek.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED PIOs for output */ + + sam_configpio(PIO_LED_USER); + sam_configpio(PIO_LED_POWER); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + default: + case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED */ + break; /* Leave USER LED off */ + + case 1: /* LED_STACKCREATED */ + { + /* User LED is ON (Low illuminates) */ + + sam_piowrite(PIO_LED_USER, false); + } + break; + + case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ + break; /* Ignored */ + + case 3: /* LED_PANIC */ + { + /* Power LED is ON (High illuminates) */ + + sam_piowrite(PIO_LED_POWER, true); + } + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + default: + case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED, */ + case 1: /* LED_STACKCREATED */ + break; /* Will not happen */ + + case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ + break; /* Ignored */ + + case 3: /* LED_PANIC */ + { + /* Power LED is OFF (High illuminates) */ + + sam_piowrite(PIO_LED_POWER, false); + } + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/sama5d4-ek/src/sam_automount.c b/configs/sama5d4-ek/src/sam_automount.c new file mode 100644 index 0000000000000000000000000000000000000000..e4890687cba27883449264a164278d393ecfc7ad --- /dev/null +++ b/configs/sama5d4-ek/src/sam_automount.c @@ -0,0 +1,393 @@ +/************************************************************************************ + * configs/sama5d4-ek/src/sam_automount.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#if defined(CONFIG_FS_AUTOMOUNTER_DEBUG) && !defined(CONFIG_DEBUG_FS) +# define CONFIG_DEBUG_FS 1 +#endif + +#include + +#include +#include +#include + +#include "sama5d4-ek.h" + +#ifdef HAVE_AUTOMOUNTER + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef NULL +# define NULL (FAR void *)0 +#endif + +#ifndef OK +# define OK 0 +#endif + +/************************************************************************************ + * Private Types + ************************************************************************************/ +/* This structure represents the changeable state of the automounter */ + +struct sam_automount_state_s +{ + volatile automount_handler_t handler; /* Upper half handler */ + FAR void *arg; /* Handler argument */ + bool enable; /* Fake interrupt enable */ + bool pending; /* Set if there an event while disabled */ +}; + +/* This structure represents the static configuration of an automounter */ + +struct sam_automount_config_s +{ + /* This must be first thing in structure so that we can simply cast from struct + * automount_lower_s to struct sam_automount_config_s + */ + + struct automount_lower_s lower; /* Publicly visible part */ + uint8_t hsmci; /* HSMCI0_SLOTNO or HSMCI1_SLOTNO */ + FAR struct sam_automount_state_s *state; /* Changeable state */ +}; + +/************************************************************************************ + * Private Function Prototypes + ************************************************************************************/ + +static int sam_attach(FAR const struct automount_lower_s *lower, + automount_handler_t isr, FAR void *arg); +static void sam_enable(FAR const struct automount_lower_s *lower, bool enable); +static bool sam_inserted(FAR const struct automount_lower_s *lower); + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT +static struct sam_automount_state_s g_hsmci0state; +static const struct sam_automount_config_s g_hsmci0config = +{ + .lower = + { + .fstype = CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_FSTYPE, + .blockdev = CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_BLKDEV, + .mountpoint = CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_MOUNTPOINT, + .ddelay = MSEC2TICK(CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_DDELAY), + .udelay = MSEC2TICK(CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_UDELAY), + .attach = sam_attach, + .enable = sam_enable, + .inserted = sam_inserted + }, + .hsmci = HSMCI0_SLOTNO, + .state = &g_hsmci0state +}; +#endif + +#ifdef CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT +static struct sam_automount_state_s g_hsmci1state; +static const struct sam_automount_config_s g_hsmci1config = +{ + .lower = + { + .fstype = CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_FSTYPE, + .blockdev = CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_BLKDEV, + .mountpoint = CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_MOUNTPOINT, + .ddelay = MSEC2TICK(CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_DDELAY), + .udelay = MSEC2TICK(CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_UDELAY), + .attach = sam_attach, + .enable = sam_enable, + .inserted = sam_inserted + }, + .hsmci = HSMCI1_SLOTNO, + .state = &g_hsmci1state +}; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_attach + * + * Description: + * Attach a new HSMCI event handler + * + * Input Parameters: + * lower - An instance of the auto-mounter lower half state structure + * isr - The new event handler to be attach + * arg - Client data to be provided when the event handler is invoked. + * + * Returned Value: + * Always returns OK + * + ************************************************************************************/ + +static int sam_attach(FAR const struct automount_lower_s *lower, + automount_handler_t isr, FAR void *arg) +{ + FAR const struct sam_automount_config_s *config; + FAR struct sam_automount_state_s *state; + + /* Recover references to our structure */ + + config = (FAR struct sam_automount_config_s *)lower; + DEBUGASSERT(config && config->state); + + state = config->state; + + /* Save the new handler info (clearing the handler first to eliminate race + * conditions). + */ + + state->handler = NULL; + state->pending = false; + state->arg = arg; + state->handler = isr; + return OK; +} + +/************************************************************************************ + * Name: sam_enable + * + * Description: + * Enable card insertion/removal event detection + * + * Input Parameters: + * lower - An instance of the auto-mounter lower half state structure + * enable - True: enable event detection; False: disable + * + * Returned Value: + * None + * + ************************************************************************************/ + +static void sam_enable(FAR const struct automount_lower_s *lower, bool enable) +{ + FAR const struct sam_automount_config_s *config; + FAR struct sam_automount_state_s *state; + irqstate_t flags; + + /* Recover references to our structure */ + + config = (FAR struct sam_automount_config_s *)lower; + DEBUGASSERT(config && config->state); + + state = config->state; + + /* Save the fake enable setting */ + + flags = enter_critical_section(); + state->enable = enable; + + /* Did an interrupt occur while interrupts were disabled? */ + + if (enable && state->pending) + { + /* Yes.. perform the fake interrupt if the interrutp is attached */ + + if (state->handler) + { + bool inserted = sam_cardinserted(config->hsmci); + (void)state->handler(&config->lower, state->arg, inserted); + } + + state->pending = false; + } + + leave_critical_section(flags); +} + +/************************************************************************************ + * Name: sam_inserted + * + * Description: + * Check if a card is inserted into the slot. + * + * Input Parameters: + * lower - An instance of the auto-mounter lower half state structure + * + * Returned Value: + * True if the card is inserted; False otherwise + * + ************************************************************************************/ + +static bool sam_inserted(FAR const struct automount_lower_s *lower) +{ + FAR const struct sam_automount_config_s *config; + + config = (FAR struct sam_automount_config_s *)lower; + DEBUGASSERT(config && config->state); + + return sam_cardinserted(config->hsmci); +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_automount_initialize + * + * Description: + * Configure auto-mounters for each enable and so configured HSMCI + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ************************************************************************************/ + +void sam_automount_initialize(void) +{ + FAR void *handle; + + fvdbg("Initializing automounter(s)\n"); + +#ifdef CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT + /* Initialize the HSMCI0 auto-mounter */ + + handle = automount_initialize(&g_hsmci0config.lower); + if (!handle) + { + fdbg("ERROR: Failed to initialize auto-mounter for HSMCI0\n"); + } +#endif + +#ifdef CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT + /* Initialize the HSMCI1 auto-mounter */ + + handle = automount_initialize(&g_hsmci1config.lower); + if (!handle) + { + fdbg("ERROR: Failed to initialize auto-mounter for HSMCI1\n"); + } +#endif +} + +/************************************************************************************ + * Name: sam_automount_event + * + * Description: + * The HSMCI card detection logic has detected an insertion or removal event. It + * has already scheduled the MMC/SD block driver operations. Now we need to + * schedule the auto-mount event which will occur with a substantial delay to make + * sure that everything has settle down. + * + * Input Parameters: + * slotno - Identifies the HSMCI0 slot: HSMCI0_SLOTNO or HSMCI1_SLOTNO. There is a + * terminology problem here: Each HSMCI supports two slots, slot A and slot B. + * Only slot A is used. So this is not a really a slot, but an HSCMI peripheral + * number. + * inserted - True if the card is inserted in the slot. False otherwise. + * + * Returned Value: + * None + * + * Assumptions: + * Interrupts are disabled. + * + ************************************************************************************/ + +void sam_automount_event(int slotno, bool inserted) +{ + FAR const struct sam_automount_config_s *config; + FAR struct sam_automount_state_s *state; + +#ifdef CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT + /* Is this a change in the HSMCI0 insertion state? */ + + if (slotno == HSMCI0_SLOTNO) + { + /* Yes.. Select the HSMCI0 automounter */ + + config = &g_hsmci0config; + state = &g_hsmci0state; + } + else +#endif + +#ifdef CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT + /* Is this a change in the HSMCI1 insertion state? */ + + if (slotno == HSMCI1_SLOTNO) + { + /* Yes.. Select the HSMCI1 automounter */ + + config = &g_hsmci1config; + state = &g_hsmci1state; + } + else +#endif + { + fdbg("ERROR: Unsupported HSCMI%d\n", slotno); + return; + } + + /* Is the auto-mounter interrupt attached? */ + + if (state->handler) + { + /* Yes.. Have we been asked to hold off interrupts? */ + + if (!state->enable) + { + /* Yes.. just remember the there is a pending interrupt. We will + * deliver the interrupt when interrupts are "re-enabled." + */ + + state->pending = true; + } + else + { + /* No.. forward the event to the handler */ + + (void)state->handler(&config->lower, state->arg, inserted); + } + } +} + +#endif /* HAVE_AUTOMOUNTER */ diff --git a/configs/sama5d4-ek/src/sam_boot.c b/configs/sama5d4-ek/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..62eaf7916a02aa44d22ffc617c8af7f5ca22bc95 --- /dev/null +++ b/configs/sama5d4-ek/src/sam_boot.c @@ -0,0 +1,155 @@ +/************************************************************************************ + * configs/sama5d4-ek/src/sam_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "sam_sckc.h" +#include "sama5d4-ek.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAMA5 architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void) +{ +#ifdef CONFIG_SAMA5D4EK_SLOWCLOCK + /* Enable the external slow clock */ + + sam_sckc_enable(true); +#endif + + /* Configure SPI chip selects if 1) SPI is enable, and 2) the weak function + * sam_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1) || \ + defined(CONFIG_SAMA5_SPI2) + if (sam_spidev_initialize) + { + sam_spidev_initialize(); + } +#endif + +#if defined(CONFIG_SAMA5_DDRCS) && !defined(CONFIG_SAMA5_BOOT_SDRAM) + + /* Configure SDRAM if (1) SDRAM has been enalbled in the NuttX configuration and + * (2) if we are not currently running out of SDRAM. If we are now running out + * of SDRAM then we have to assume that some second level bootloader has properly + * configured SDRAM for our use. + */ + + sam_sdram_config(); + +#endif + + /* Initialize USB if the 1) the HS host or device controller is in the + * configuration and 2) the weak function sam_usbinitialize() has been brought + * into the build. Presumeably either CONFIG_USBDEV or CONFIG_USBHOST is also + * selected. + */ + +#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS) + if (sam_usbinitialize) + { + sam_usbinitialize(); + } +#endif + + /* Configure board resources to support networkingif the 1) networking is enabled, + * 2) the EMAC or GMAC module is enabled, and 2) the weak function + * sam_netinitialize() has been brought into the build. + */ + +#ifdef HAVE_NETWORK + if (sam_netinitialize) + { + sam_netinitialize(); + } +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform board initialization */ + + (void)sam_bringup(); +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/sama5d4-ek/src/sam_bringup.c b/configs/sama5d4-ek/src/sam_bringup.c new file mode 100644 index 0000000000000000000000000000000000000000..2c0ca5cc8da7386a91d83da6981041993fb4ec6e --- /dev/null +++ b/configs/sama5d4-ek/src/sam_bringup.c @@ -0,0 +1,352 @@ +/**************************************************************************** + * config/sama5d4-ek/src/sam_bringup.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#include +#include +#include + +#include "sam_twi.h" +#include "sama5d4-ek.h" + +#ifdef HAVE_ROMFS +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define NSECTORS(n) \ + (((n)+CONFIG_SAMA5D4EK_ROMFS_ROMDISK_SECTSIZE-1) / \ + CONFIG_SAMA5D4EK_ROMFS_ROMDISK_SECTSIZE) + +/* Debug ********************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +# define SYSLOG lldbg +#else +# define SYSLOG dbg +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_i2c_register + * + * Description: + * Register one I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void sam_i2c_register(int bus) +{ + FAR struct i2c_master_s *i2c; + int ret; + + i2c = sam_i2cbus_initialize(bus); + if (i2c == NULL) + { + dbg("ERROR: Failed to get I2C%d interface\n", bus); + } + else + { + ret = i2c_register(i2c, bus); + if (ret < 0) + { + dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); + sam_i2cbus_uninitialize(i2c); + } + } +} +#endif + +/**************************************************************************** + * Name: sam_i2ctool + * + * Description: + * Register I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void sam_i2ctool(void) +{ +#ifdef CONFIG_SAMA5_TWI0 + sam_i2c_register(0); +#endif +#ifdef CONFIG_SAMA5_TWI1 + sam_i2c_register(1); +#endif +#ifdef CONFIG_SAMA5_TWI2 + sam_i2c_register(2); +#endif +#ifdef CONFIG_SAMA5_TWI3 + sam_i2c_register(3); +#endif +} +#else +# define sam_i2ctool() +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int sam_bringup(void) +{ +#if defined(HAVE_NAND) || defined(HAVE_AT25) || defined(HAVE_HSMCI) || \ + defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR) || defined(HAVE_WM8904) || \ + defined(HAVE_AUTOMOUNTER) || defined(HAVE_ELF) || defined(HAVE_ROMFS) || \ + defined(CONFIG_FS_PROCFS) + int ret; +#endif + + /* Register I2C drivers on behalf of the I2C tool */ + + sam_i2ctool(); + +#ifdef HAVE_NAND + /* Initialize the NAND driver */ + + ret = sam_nand_automount(NAND_MINOR); + if (ret < 0) + { + SYSLOG("ERROR: sam_nand_automount failed: %d\n", ret); + } +#endif + +#ifdef HAVE_AT25 + /* Initialize the AT25 driver */ + + ret = sam_at25_automount(AT25_MINOR); + if (ret < 0) + { + SYSLOG("ERROR: sam_at25_automount failed: %d\n", ret); + } +#endif + +#ifdef HAVE_HSMCI +#ifdef CONFIG_SAMA5_HSMCI0 + /* Initialize the HSMCI0 driver */ + + ret = sam_hsmci_initialize(HSMCI0_SLOTNO, HSMCI0_MINOR); + if (ret < 0) + { + SYSLOG("ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n", + HSMCI0_SLOTNO, HSMCI0_MINOR, ret); + } + +#ifdef CONFIG_SAMA5D4EK_HSMCI0_MOUNT + else + { + /* REVISIT: A delay seems to be required here or the mount will fail. */ + /* Mount the volume on HSMCI0 */ + + ret = mount(CONFIG_SAMA5D4EK_HSMCI0_MOUNT_BLKDEV, + CONFIG_SAMA5D4EK_HSMCI0_MOUNT_MOUNTPOINT, + CONFIG_SAMA5D4EK_HSMCI0_MOUNT_FSTYPE, + 0, NULL); + + if (ret < 0) + { + SYSLOG("ERROR: Failed to mount %s: %d\n", + CONFIG_SAMA5D4EK_HSMCI0_MOUNT_MOUNTPOINT, errno); + } + } +#endif +#endif + +#ifdef CONFIG_SAMA5_HSMCI1 + /* Initialize the HSMCI1 driver */ + + ret = sam_hsmci_initialize(HSMCI1_SLOTNO, HSMCI1_MINOR); + if (ret < 0) + { + SYSLOG("ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n", + HSMCI1_SLOTNO, HSMCI1_MINOR, ret); + } + +#ifdef CONFIG_SAMA5D4EK_HSMCI1_MOUNT + else + { + /* REVISIT: A delay seems to be required here or the mount will fail. */ + /* Mount the volume on HSMCI1 */ + + ret = mount(CONFIG_SAMA5D4EK_HSMCI1_MOUNT_BLKDEV, + CONFIG_SAMA5D4EK_HSMCI1_MOUNT_MOUNTPOINT, + CONFIG_SAMA5D4EK_HSMCI1_MOUNT_FSTYPE, + 0, NULL); + + if (ret < 0) + { + SYSLOG("ERROR: Failed to mount %s: %d\n", + CONFIG_SAMA5D4EK_HSMCI1_MOUNT_MOUNTPOINT, errno); + } + } +#endif +#endif +#endif + +#ifdef HAVE_AUTOMOUNTER + /* Initialize the auto-mounter */ + + sam_automount_initialize(); +#endif + +#ifdef HAVE_ROMFS + /* Create a ROM disk for the /etc filesystem */ + + ret = romdisk_register(CONFIG_SAMA5D4EK_ROMFS_ROMDISK_MINOR, romfs_img, + NSECTORS(romfs_img_len), + CONFIG_SAMA5D4EK_ROMFS_ROMDISK_SECTSIZE); + if (ret < 0) + { + SYSLOG("ERROR: romdisk_register failed: %d\n", -ret); + } + else + { + /* Mount the file system */ + + ret = mount(CONFIG_SAMA5D4EK_ROMFS_ROMDISK_DEVNAME, + CONFIG_SAMA5D4EK_ROMFS_MOUNT_MOUNTPOINT, + "romfs", MS_RDONLY, NULL); + if (ret < 0) + { + SYSLOG("ERROR: mount(%s,%s,romfs) failed: %d\n", + CONFIG_SAMA5D4EK_ROMFS_ROMDISK_DEVNAME, + CONFIG_SAMA5D4EK_ROMFS_MOUNT_MOUNTPOINT, errno); + } + } +#endif + +#ifdef HAVE_USBHOST + /* Initialize USB host operation. sam_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + + ret = sam_usbhost_initialize(); + if (ret != OK) + { + SYSLOG("ERROR: Failed to initialize USB host: %d\n", ret); + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + SYSLOG("ERROR: Failed to start the USB monitor: %d\n", ret); + } +#endif + +#ifdef HAVE_WM8904 + /* Configure WM8904 audio */ + + ret = sam_wm8904_initialize(0); + if (ret != OK) + { + SYSLOG("ERROR: Failed to initialize WM8904 audio: %d\n", ret); + } +#endif + +#ifdef HAVE_AUDIO_NULL + /* Configure the NULL audio device */ + + ret = sam_audio_null_initialize(0); + if (ret != OK) + { + SYSLOG("ERROR: Failed to initialize the NULL audio device: %d\n", ret); + } +#endif + +#ifdef HAVE_ELF + /* Initialize the ELF binary loader */ + + SYSLOG("Initializing the ELF binary loader\n"); + ret = elf_initialize(); + if (ret < 0) + { + SYSLOG("ERROR: Initialization of the ELF loader failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = mount(NULL, SAMA5_PROCFS_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + SYSLOG("ERROR: Failed to mount procfs at %s: %d\n", + SAMA5_PROCFS_MOUNTPOINT, ret); + } +#endif + + /* If we got here then perhaps not all initialization was successful, but + * at least enough succeeded to bring-up NSH with perhaps reduced + * capabilities. + */ + + return OK; +} diff --git a/configs/sama5d4-ek/src/sam_buttons.c b/configs/sama5d4-ek/src/sam_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..52fc7af11b1979ff6ed908275736052995ed1ce4 --- /dev/null +++ b/configs/sama5d4-ek/src/sam_buttons.c @@ -0,0 +1,182 @@ +/**************************************************************************** + * configs/sama5d4-ek/src/sam_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* A single button, PB_USER1 (PB2), is available on the SAMA5D4-EK: + * + * ------------------------------ ------------------- ---------------------- + * SAMA5D4 PIO SIGNAL USAGE + * ------------------------------ ------------------- ---------------------- + * PE13/A13/TIOB1/PWML2 PB_USER1_PE13 PB_USER1 + * ------------------------------ ------------------- ---------------------- + * + * Closing JP2 will bring PE13 to ground so 1) PE13 should have a weak + * pull-up, and 2) when PB2 is pressed, a low value will be senses. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "sam_pio.h" +#include "sama5d4-ek.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_SAMA5_PIOE_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +static xcpt_t g_irquser1; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + (void)sam_configpio(PIO_BTN_USER); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return sam_pioread(PIO_BTN_USER) ? 0 : BUTTON_USER_BIT; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address is returned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_SAMA5_PIO_IRQ must be selected to enable the + * overall PIO IRQ feature and CONFIG_SAMA5_PIOE_IRQ must be enabled to + * select PIOs to support interrupts on PIOE. + * + ****************************************************************************/ + +#if defined(CONFIG_SAMA5_PIOE_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id == BUTTON_USER) + { + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = g_irquser1; + g_irquser1 = irqhandler; + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + /* Configure the interrupt */ + + sam_pioirq(PIO_BTN_USER); + (void)irq_attach(IRQ_BTN_USER, irqhandler); + sam_pioirqenable(IRQ_BTN_USER); + } + else + { + /* Disable and detach the interrupt */ + + sam_pioirqdisable(IRQ_BTN_USER); + (void)irq_detach(IRQ_BTN_USER); + } + + leave_critical_section(flags); + } + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/sama5d4-ek/src/sam_ethernet.c b/configs/sama5d4-ek/src/sam_ethernet.c new file mode 100644 index 0000000000000000000000000000000000000000..48edbbe5f8a576b110b017d975cf59dc0e3ab645 --- /dev/null +++ b/configs/sama5d4-ek/src/sam_ethernet.c @@ -0,0 +1,329 @@ +/************************************************************************************ + * configs/sama5d4-ek/src/sam_ethernet.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/* Force verbose debug on in this file only to support unit-level testing. */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# define CONFIG_DEBUG_VERBOSE 1 +# undef CONFIG_DEBUG_NET +# define CONFIG_DEBUG_NET 1 +#endif + +#include +#include +#include + +#include +#include + +#include "sam_pio.h" +#include "sam_ethernet.h" + +#include "sama5d4-ek.h" + +#ifdef HAVE_NETWORK + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_SAMA5_EMAC0 +# undef CONFIG_SAMA5_EMAC0_ISETH0 +#endif + +#ifdef CONFIG_SAMA5_EMAC0_ISETH0 +# define SAMA5_EMAC0_DEVNAME "eth0" +# define SAMA5_EMAC1_DEVNAME "eth1" +#else +# define SAMA5_EMAC0_DEVNAME "eth1" +# define SAMA5_EMAC1_DEVNAME "eth0" +#endif + +/* Debug ********************************************************************/ +/* Extra, in-depth debug output that is only available if + * CONFIG_NETDEV_PHY_DEBUG us defined. + */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# define phydbg dbg +# define phylldbg lldbg +#else +# define phydbg(x...) +# define phylldbg(x...) +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_SAMA5_PIOE_IRQ +#ifdef CONFIG_SAMA5_EMAC0 +static xcpt_t g_emac0_handler; +#endif +#ifdef CONFIG_SAMA5_EMAC1 +static xcpt_t g_emac1_handler; +#endif +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_emac0/1_phy_enable + ************************************************************************************/ + +#ifdef CONFIG_SAMA5_PIOE_IRQ +#ifdef CONFIG_SAMA5_EMAC0 +static void sam_emac0_phy_enable(bool enable) +{ + phydbg("IRQ%d: enable=%d\n", IRQ_INT_ETH0, enable); + if (enable) + { + sam_pioirqenable(IRQ_INT_ETH0); + } + else + { + sam_pioirqdisable(IRQ_INT_ETH0); + } +} + +#endif + +#ifdef CONFIG_SAMA5_EMAC1 +static void sam_emac1_phy_enable(bool enable) +{ + phydbg("IRQ%d: enable=%d\n", IRQ_INT_ETH1, enable); + if (enable) + { + sam_pioirqenable(IRQ_INT_ETH1); + } + else + { + sam_pioirqdisable(IRQ_INT_ETH1); + } +} +#endif +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +void weak_function sam_netinitialize(void) +{ +#ifdef CONFIG_SAMA5_EMAC0 + phydbg("Configuring %08x\n", PIO_INT_ETH0); + sam_configpio(PIO_INT_ETH0); +#endif + +#ifdef CONFIG_SAMA5_EMAC1 + phydbg("Configuring %08x\n", PIO_INT_ETH1); + sam_configpio(PIO_INT_ETH1); +#endif +} + +/**************************************************************************** + * Name: arch_phy_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a PHY interrupt occurs. This function both attaches + * the interrupt handler and enables the interrupt if 'handler' is non- + * NULL. If handler is NULL, then the interrupt is detached and disabled + * instead. + * + * The PHY interrupt is always disabled upon return. The caller must + * call back through the enable function point to control the state of + * the interrupt. + * + * This interrupt may or may not be available on a given platform depending + * on how the network hardware architecture is implemented. In a typical + * case, the PHY interrupt is provided to board-level logic as a GPIO + * interrupt (in which case this is a board-specific interface and really + * should be called board_phy_irq()); In other cases, the PHY interrupt + * may be cause by the chip's MAC logic (in which case arch_phy_irq()) is + * an appropriate name. Other other boards, there may be no PHY interrupts + * available at all. If client attachable PHY interrupts are available + * from the board or from the chip, then CONFIG_ARCH_PHY_INTERRUPT should + * be defined to indicate that fact. + * + * Typical usage: + * a. OS service logic (not application logic*) attaches to the PHY + * PHY interrupt and enables the PHY interrupt. + * b. When the PHY interrupt occurs: (1) the interrupt should be + * disabled and () work should be scheduled on the worker thread (or + * perhaps a dedicated application thread). + * c. That worker thread should use the SIOCGMIIPHY, SIOCGMIIREG, + * and SIOCSMIIREG ioctl calls** to communicate with the PHY, + * determine what network event took place (Link Up/Down?), and + * take the appropriate actions. + * d. It should then interact the the PHY to clear any pending + * interrupts, then re-enable the PHY interrupt. + * + * * This is an OS internal interface and should not be used from + * application space. Rather applications should use the SIOCMIISIG + * ioctl to receive a signal when a PHY event occurs. + * ** This interrupt is really of no use if the Ethernet MAC driver + * does not support these ioctl calls. + * + * Input Parameters: + * intf - Identifies the network interface. For example "eth0". Only + * useful on platforms that support multiple Ethernet interfaces + * and, hence, multiple PHYs and PHY interrupts. + * handler - The client interrupt handler to be invoked when the PHY + * asserts an interrupt. Must reside in OS space, but can + * signal tasks in user space. A value of NULL can be passed + * in order to detach and disable the PHY interrupt. + * enable - A function pointer that be unsed to enable or disable the + * PHY interrupt. + * + * Returned Value: + * The previous PHY interrupt handler address is returned. This allows you + * to temporarily replace an interrupt handler, then restore the original + * interrupt handler. NULL is returned if there is was not handler in + * place when the call was made. + * + ****************************************************************************/ + +#ifdef CONFIG_SAMA5_PIOE_IRQ +xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable) +{ + irqstate_t flags; + xcpt_t *phandler; + xcpt_t oldhandler; + pio_pinset_t pinset; + phy_enable_t enabler; + int irq; + + DEBUGASSERT(intf); + + nvdbg("%s: handler=%p\n", intf, handler); +#ifdef CONFIG_SAMA5_EMAC0 + phydbg("EMAC0: devname=%s\n", SAMA5_EMAC0_DEVNAME); +#endif +#ifdef CONFIG_SAMA5_EMAC1 + phydbg("EMAC1: devname=%s\n", SAMA5_EMAC1_DEVNAME); +#endif + +#ifdef CONFIG_SAMA5_EMAC0 + if (strcmp(intf, SAMA5_EMAC0_DEVNAME) == 0) + { + phydbg("Select EMAC0\n"); + phandler = &g_emac0_handler; + pinset = PIO_INT_ETH0; + irq = IRQ_INT_ETH0; + enabler = sam_emac0_phy_enable; + } + else +#endif +#ifdef CONFIG_SAMA5_EMAC1 + if (strcmp(intf, SAMA5_EMAC1_DEVNAME) == 0) + { + phydbg("Select EMAC1\n"); + phandler = &g_emac1_handler; + pinset = PIO_INT_ETH1; + irq = IRQ_INT_ETH1; + enabler = sam_emac1_phy_enable; + } + else +#endif + { + ndbg("Unsupported interface: %s\n", intf); + return NULL; + } + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old interrupt handler and save the new one */ + + oldhandler = *phandler; + *phandler = handler; + + /* Configure the interrupt */ + + if (handler) + { + phydbg("Configure pin: %08x\n", pinset); + sam_pioirq(pinset); + + phydbg("Attach IRQ%d\n", irq); + (void)irq_attach(irq, handler); + } + else + { + phydbg("Detach IRQ%d\n", irq); + (void)irq_detach(irq); + enabler = NULL; + } + + /* Return with the interrupt disabled in either case */ + + sam_pioirqdisable(irq); + + /* Return the enabling function pointer */ + + if (enable) + { + *enable = enabler; + } + + /* Return the old handler (so that it can be restored) */ + + leave_critical_section(flags); + return oldhandler; +} +#endif /* CONFIG_SAMA5_PIOE_IRQ */ + +#endif /* HAVE_NETWORK */ diff --git a/configs/sama5d4-ek/src/sam_hsmci.c b/configs/sama5d4-ek/src/sam_hsmci.c new file mode 100644 index 0000000000000000000000000000000000000000..fe74bcf5284196a2b3d3359799a1168c3d4919b6 --- /dev/null +++ b/configs/sama5d4-ek/src/sam_hsmci.c @@ -0,0 +1,394 @@ +/**************************************************************************** + * config/sama5d4-ek/src/sam_hsmci.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMA5D4-EK provides a two SD memory card slots: (1) a full size SD + * card slot (J10), and (2) a microSD memory card slot (J11). + * + * The full size SD card slot connects via HSMCI0. The card detect discrete + * is available on PE5 (pulled high). The write protect discrete is tied to + * ground and is not available to software. The slot supports 8-bit wide + * transfer mode, but the NuttX driver currently uses only the 4-bit wide + * transfer mode + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D4 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PC4/SPI0_NPCS1/MCI0_CK/PCK1 PC4 MCI0_CK, ISI_MCK, EXP + * PC5/D0/MCI0_CDA PC5 MCI0_CDA, NAND_IO0 + * PC6/D1/MCI0_DA0 PC6 MCI0_DA0, NAND_IO1 + * PC7/D2/MCI0_DA1 PC7 MCI0_DA1, NAND_IO2 + * PC8/D3/MCI0_DA2 PC8 MCI0_DA2, NAND_IO3 + * PC9/D4/MCI0_DA3 PC9 MCI0_DA3, NAND_IO4 + * PC10/D5/MCI0_DA4 PC10 MCI0_DA4, NAND_IO5 + * PC11/D6/MCI0_DA5 PC11 MCI0_DA5, NAND_IO6 + * PC12/D7/MCI0_DA6 PC12 MCI0_DA6, NAND_IO7 + * PC13/NRD/NANDOE/MCI0_DA7 PC13 MCI0_DA7, NAND_RE + * PE5/A5/CTS3 MCI0_CD_PE5 MCI0_CD + * ------------------------------ ------------------- ------------------------- + * + * The microSD connects vi HSMCI1. The card detect discrete is available on + * PE6 (pulled high): + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D4 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PE14/A14/TCLK1/PWMH3 MCI1_CD_PE14 MCI1_CD ??? + * PE15/A15/SCK3/TIOA0 MCI1_PWR_PE15 MCI1_PWR + * PE18/A18/TIOA5/MCI1_CK PE18 MCI1_CK, EXP + * PE19/A19/TIOB5/MCI1_CDA PE19 MCI1_CDA, EXP + * PE20/A20/TCLK5/MCI1_DA0 PE20 MCI1_DA0, EXP + * PE21/A23/TIOA4/MCI1_DA1 PE21 MCI1_DA1, EXP + * PE22/A24/TIOB4/MCI1_DA2 PE22 MCI1_DA2, EXP + * PE23/A25/TCLK4/MCI1_DA3 PE23 MCI1_DA3, EXP + * PE6/A6/TIOA3 MCI1_CD_PE6 MCI1_CD + * ------------------------------ ------------------- ------------------------- + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "sam_pio.h" +#include "sam_hsmci.h" + +#include "sama5d4-ek.h" + +#ifdef HAVE_HSMCI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ +/* This structure holds static information unique to one HSMCI peripheral */ + +struct sam_hsmci_state_s +{ + struct sdio_dev_s *hsmci; /* R/W device handle */ + pio_pinset_t cdcfg; /* Card detect PIO pin configuration */ + pio_pinset_t pwrcfg; /* Power PIO pin configuration */ + uint8_t irq; /* Interrupt number (same as pid) */ + uint8_t slotno; /* Slot number */ + bool cd; /* TRUE: card is inserted */ + xcpt_t handler; /* Interrupt handler */ +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* HSCMI device state */ + +#ifdef CONFIG_SAMA5_HSMCI0 +static int sam_hsmci0_cardetect(int irq, void *regs); + +static struct sam_hsmci_state_s g_hsmci0 = +{ + .cdcfg = PIO_MCI0_CD, + .irq = IRQ_MCI0_CD, + .slotno = 0, + .handler = sam_hsmci0_cardetect, +}; +#endif + +#ifdef CONFIG_SAMA5_HSMCI1 +static int sam_hsmci1_cardetect(int irq, void *regs); + +static struct sam_hsmci_state_s g_hsmci1 = +{ + .cdcfg = PIO_MCI1_CD, + .pwrcfg = IRQ_MCI1_PWR, + .irq = IRQ_MCI1_CD, + .slotno = 1, + .handler = sam_hsmci1_cardetect, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_cardinserted_internal + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_cardinserted_internal(struct sam_hsmci_state_s *state) +{ + bool inserted; + + /* Get the state of the PIO pin */ + + inserted = sam_pioread(state->cdcfg); + fllvdbg("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES"); + return !inserted; +} + +/**************************************************************************** + * Name: sam_hsmci_cardetect, sam_hsmci0_cardetect, and sam_hsmci1_cardetect + * + * Description: + * Card detect interrupt handlers + * + ****************************************************************************/ + +static int sam_hsmci_cardetect(struct sam_hsmci_state_s *state) +{ + /* Get the current card insertion state */ + + bool cd = sam_cardinserted_internal(state); + + /* Has the card detect state changed? */ + + if (cd != state->cd) + { + /* Yes... remember that new state and inform the HSMCI driver */ + + state->cd = cd; + + /* Report the new state to the SDIO driver */ + + sdio_mediachange(state->hsmci, cd); + } + + return OK; +} + +#ifdef CONFIG_SAMA5_HSMCI0 +static int sam_hsmci0_cardetect(int irq, void *regs) +{ + int ret; + + /* Handle the card detect interrupt. The interrupt level logic will + * kick of the driver-level operations to initialize the MMC/SD block + * device. + */ + + ret = sam_hsmci_cardetect(&g_hsmci0); + +#ifdef CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT + /* Let the automounter know about the insertion event */ + + sam_automount_event(HSMCI0_SLOTNO, sam_cardinserted(HSMCI0_SLOTNO)); +#endif + + return ret; +} +#endif + +#ifdef CONFIG_SAMA5_HSMCI1 +static int sam_hsmci1_cardetect(int irq, void *regs) +{ + int ret; + + /* Handle the card detect interrupt. The interrupt level logic will + * kick of the driver-level operations to initialize the MMC/SD block + * device. + */ + + ret = sam_hsmci_cardetect(&g_hsmci1); + +#ifdef CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT + /* Let the automounter know about the insertion event */ + + sam_automount_event(HSMCI1_SLOTNO, sam_cardinserted(HSMCI1_SLOTNO)); +#endif + + return ret; +} +#endif + +/**************************************************************************** + * Name: sam_hsmci_state + * + * Description: + * Initialize HSMCI PIOs. + * + ****************************************************************************/ + +static struct sam_hsmci_state_s *sam_hsmci_state(int slotno) +{ + struct sam_hsmci_state_s *state = NULL; + +#ifdef CONFIG_SAMA5_HSMCI0 +#ifdef CONFIG_SAMA5_HSMCI1 + if (slotno == 0) +#endif + { + state = &g_hsmci0; + } +#ifdef CONFIG_SAMA5_HSMCI1 + else +#endif +#endif + +#ifdef CONFIG_SAMA5_HSMCI1 + { + state = &g_hsmci1; + } +#endif + + return state; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_hsmci_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int sam_hsmci_initialize(int slotno, int minor) +{ + struct sam_hsmci_state_s *state; + int ret; + + /* Get the static HSMI description */ + + state = sam_hsmci_state(slotno); + if (!state) + { + fdbg("ERROR: No state for slotno %d\n", slotno); + return -EINVAL; + } + + /* Initialize card-detect, write-protect, and power enable PIOs */ + + sam_configpio(state->cdcfg); + sam_dumppio(state->cdcfg, "HSMCI Card Detect"); + + if (state->pwrcfg != 0) + { + sam_configpio(state->pwrcfg); + sam_dumppio(state->pwrcfg, "HSMCI Power"); + } + + /* Mount the SDIO-based MMC/SD block driver */ + /* First, get an instance of the SDIO interface */ + + state->hsmci = sdio_initialize(slotno); + if (!state->hsmci) + { + fdbg("ERROR: Failed to initialize SDIO slot %d\n", slotno); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(minor, state->hsmci); + if (ret != OK) + { + fdbg("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + /* Configure card detect interrupts */ + + sam_pioirq(state->cdcfg); + (void)irq_attach(state->irq, state->handler); + + /* Then inform the HSMCI driver if there is or is not a card in the slot. */ + + state->cd = sam_cardinserted_internal(state); + sdio_mediachange(state->hsmci, state->cd); + + /* Enable card detect interrupts */ + + sam_pioirqenable(state->irq); + return OK; +} + +/**************************************************************************** + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_cardinserted(int slotno) +{ + struct sam_hsmci_state_s *state; + + /* Get the HSMI description */ + + state = sam_hsmci_state(slotno); + if (!state) + { + fdbg("ERROR: No state for slotno %d\n", slotno); + return false; + } + + /* Return the state of the PIO pin */ + + return sam_cardinserted_internal(state); +} + +/**************************************************************************** + * Name: sam_writeprotected + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_writeprotected(int slotno) +{ + /* There are no write protect pins */ + + return false; +} + +#endif /* HAVE_HSMCI */ diff --git a/configs/sama5d4-ek/src/sam_maxtouch.c b/configs/sama5d4-ek/src/sam_maxtouch.c new file mode 100644 index 0000000000000000000000000000000000000000..391e7b0b80faa8d359594a6f4543a855647eb4a2 --- /dev/null +++ b/configs/sama5d4-ek/src/sam_maxtouch.c @@ -0,0 +1,316 @@ +/************************************************************************************ + * configs/sama5d4-ek/src/sam_maxtouch.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "up_arch.h" +#include "sam_pio.h" +#include "sam_twi.h" + +#include "sama5d4-ek.h" + +#ifdef HAVE_MAXTOUCH + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_SAMA5D4EK_MXT_I2CFREQUENCY +# define CONFIG_SAMA5D4EK_MXT_I2CFREQUENCY 500000 +#endif + +#ifndef CONFIG_SAMA5D4EK_MXT_DEVMINOR +# define CONFIG_SAMA5D4EK_MXT_DEVMINOR 0 +#endif + +/* The touchscreen communicates on TWI0, I2C address 0x4c */ + +#define MXT_TWI_BUS 0 +#define MXT_I2C_ADDRESS 0x4c + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct sama5d4ek_tscinfo_s +{ + /* Standard maXTouch interface */ + + struct mxt_lower_s lower; + + /* Extensions for the sama5d4ek board */ + + mxt_handler_t handler; + FAR void *arg; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/PIO access callbacks. These operations all hidden behind + * callbacks to isolate the maXTouch driver from differences in PIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the maXTouch interrupt handler to the PIO interrupt + * enable - Enable or disable the PIO interrupt + * clear - Acknowledge/clear any pending PIO interrupt + */ + +static int mxt_attach(FAR const struct mxt_lower_s *lower, mxt_handler_t isr, + FAR void *arg); +static void mxt_enable(FAR const struct mxt_lower_s *lower, bool enable); +static void mxt_clear(FAR const struct mxt_lower_s *lower); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the maXTouch + * driver. This structure provides information about the configuration + * of the maXTouch and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. + */ + +static struct sama5d4ek_tscinfo_s g_mxtinfo = +{ + .lower = + { + .address = MXT_I2C_ADDRESS, + .frequency = CONFIG_SAMA5D4EK_MXT_I2CFREQUENCY, + + .attach = mxt_attach, + .enable = mxt_enable, + .clear = mxt_clear, + }, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * IRQ/PIO access callbacks. These operations all hidden behind + * callbacks to isolate the maXTouch driver from differences in PIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the maXTouch interrupt handler to the PIO interrupt + * enable - Enable or disable the PIO interrupt + * clear - Acknowledge/clear any pending PIO interrupt + * + ****************************************************************************/ + +static int mxt_attach(FAR const struct mxt_lower_s *lower, mxt_handler_t isr, + FAR void *arg) +{ + if (isr) + { + /* Just save the address of the handler and its argument for now. The + * new handler will called via mxt_interrupt() when the interrupt occurs. + */ + + ivdbg("Attaching %p\n", isr); + g_mxtinfo.handler = isr; + g_mxtinfo.arg = arg; + } + else + { + ivdbg("Detaching %p\n", g_mxtinfo.handler); + mxt_enable(lower, false); + g_mxtinfo.handler = NULL; + g_mxtinfo.arg = NULL; + } + + return OK; +} + +static void mxt_enable(FAR const struct mxt_lower_s *lower, bool enable) +{ + /* Enable or disable interrupts */ + + if (enable && g_mxtinfo.handler) + { + sam_pioirqenable(IRQ_CHG_MXT); + } + else + { + sam_pioirqdisable(IRQ_CHG_MXT); + } +} + +static void mxt_clear(FAR const struct mxt_lower_s *lower) +{ + /* Does nothing */ +} + +static int mxt_interrupt(int irq, FAR void *context) +{ + /* Just forward the interrupt to the maXTouch driver */ + + if (g_mxtinfo.handler) + { + return g_mxtinfo.handler(&g_mxtinfo.lower, g_mxtinfo.arg); + } + + /* We got an interrupt with no handler. This should not + * happen. + */ + + sam_pioirqdisable(IRQ_CHG_MXT); + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * configure the touchscreen device. This function will register the driver + * as /dev/inputN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ + FAR struct i2c_master_s *i2c; + static bool initialized = false; + int ret; + + idbg("minor %d\n", minor); + DEBUGASSERT(minor == 0); + + /* Have we already initialized? Since we never uninitialize we must prevent + * multiple initializations. This is necessary, for example, when the + * touchscreen example is used as a built-in application in NSH and can be + * called numerous time. It will attempt to initialize each time. + */ + + if (!initialized) + { + /* Configure the maXTouch CHG interrupt pin */ + + (void)sam_configpio(PIO_CHG_MXT); + + /* Get an instance of the I2C interface for the touchscreen chip select */ + + i2c = sam_i2cbus_initialize(MXT_TWI_BUS); + if (!i2c) + { + idbg("Failed to initialize I2C%d\n", MXT_TWI_BUS); + return -ENODEV; + } + + /* Configure maXTouch CHG interrupts */ + + sam_pioirq(PIO_CHG_MXT); + (void)irq_attach(IRQ_CHG_MXT, mxt_interrupt); + + /* Initialize and register the I2C touchscreen device */ + + ret = mxt_register(i2c, &g_mxtinfo.lower, CONFIG_SAMA5D4EK_MXT_DEVMINOR); + if (ret < 0) + { + idbg("ERROR: Failed to register touchscreen device\n"); + irq_detach(IRQ_CHG_MXT); + /* sam_i2cbus_uninitialize(i2c); */ + return -ENODEV; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* No support for un-initializing the touchscreen maXTouch device. It will + * continue to run and process touch interrupts in the background. + */ +} + +#endif /* HAVE_MAXTOUCH */ diff --git a/configs/sama5d4-ek/src/sam_nandflash.c b/configs/sama5d4-ek/src/sam_nandflash.c new file mode 100644 index 0000000000000000000000000000000000000000..9044526b3bfcdd3ce05ee17ca69e3dd6777e9204 --- /dev/null +++ b/configs/sama5d4-ek/src/sam_nandflash.c @@ -0,0 +1,231 @@ +/**************************************************************************** + * configs/sama5d4-ek/src/sam_nandflash.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Most of this file derives from Atmel sample code for the SAMA5D4-EK + * board. That sample code has licensing that is compatible with the NuttX + * modified BSD license: + * + * Copyright (c) 2012, Atmel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor Atmel nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "sam_periphclks.h" +#include "sam_pio.h" +#include "sam_nand.h" +#include "chip/sam_hsmc.h" +#include "chip/sam_pinmap.h" + +#include "sama5d4-ek.h" + +#ifdef CONFIG_SAMA5_EBICS3_NAND + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_nandflash_config + * + * Description: + * If CONFIG_SAMA5_EBICS3_NAND is defined, then NAND FLASH support is + * enabled. This function provides the board-specific implementation of + * the logic to reprogram the SMC to support NAND FLASH on the specified + * CS. + * + * Input Parameters: + * cs - Chip select number (in the event that multiple NAND devices + * are connected on-board). + * + * Returned Values: + * OK if the HSMC was successfully configured for this CS. A negated + * errno value is returned on a failure. This would fail with -ENODEV, + * for example, if the board does not support NAND FLASH on the requested + * CS. + * + ****************************************************************************/ + +int board_nandflash_config(int cs) +{ + uint32_t regval; + + /* The Embest and Ronetix CM boards and one Hynix NAND HY27UF(08/16)2G2B + * Series NAND (MT29F2G08ABAEAWP). This part has a capacity of 256Mx8bit + * () with spare 8Mx8 bit capacity. The device contains 2048 blocks, composed + * by 64 x 2112 byte pages. The effective size is approximately 256MiB. + * + * NAND is available on CS3. + */ + + if (cs == HSMC_CS3) + { + /* Make sure that the SMC peripheral is enabled. */ + + sam_hsmc_enableclk(); + + /* Configure the SMC */ + + regval = HSMC_SETUP_NWE_SETUP(1) | HSMC_SETUP_NCS_WRSETUP(1) | + HSMC_SETUP_NRD_SETUP(2) | HSMC_SETUP_NCS_RDSETUP(1); + putreg32(regval, SAM_HSMC_SETUP(HSMC_CS3)); + + regval = HSMC_PULSE_NWE_PULSE(5) | HSMC_PULSE_NCS_WRPULSE(7) | + HSMC_PULSE_NRD_PULSE(5) | HSMC_PULSE_NCS_RDPULSE(7); + putreg32(regval, SAM_HSMC_PULSE(HSMC_CS3)); + + regval = HSMC_CYCLE_NWE_CYCLE(8) | HSMC_CYCLE_NRD_CYCLE(9); + putreg32(regval, SAM_HSMC_CYCLE(HSMC_CS3)); + + regval = HSMC_TIMINGS_TCLR(3) | HSMC_TIMINGS_TADL(10) | + HSMC_TIMINGS_TAR(3) | HSMC_TIMINGS_TRR(4) | + HSMC_TIMINGS_TWB(5) | HSMC_TIMINGS_RBNSEL(3) | + HSMC_TIMINGS_NFSEL; + putreg32(regval, SAM_HSMC_TIMINGS(HSMC_CS3)); + + regval = HSMC_MODE_READMODE | HSMC_MODE_WRITEMODE | + HSMC_MODE_BIT_8 | HSMC_MODE_TDFCYCLES(1); + putreg32(regval, SAM_HSMC_MODE(HSMC_CS3)); + + /* Configure NAND PIO pins + * + * NAND Interface: + * + * NCS3/NANDCE - Dedicated pin; no configuration needed + * NANDCLE - PE21 + * NANDALE - PE22 + * NRD/NANDOE - Dedicated pin; no configuration needed + * NWE/NANDWE - Dedicated pin; no configuration needed + * NANDRDY - Dedicated pin; no configuration needed + * M_EBI_D0-7 - Dedicated pins; no configuration needed + */ + + sam_configpio(PIO_HSMC_NANDALE); + sam_configpio(PIO_HSMC_NANDCLE); + + return OK; + } + + return -ENODEV; +} + +/**************************************************************************** + * Name: sam_nand_automount + * + * Description: + * Initialize and configure the NAND on CS3 + * + ****************************************************************************/ + +#ifdef HAVE_NAND +int sam_nand_automount(int minor) +{ + FAR struct mtd_dev_s *mtd; + static bool initialized = false; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Create and initialize an NAND MATD device */ + + mtd = sam_nand_initialize(HSMC_CS3); + if (!mtd) + { + fdbg("ERROR: Failed to create the NAND driver on CS%d\n", HSMC_CS3); + return -ENODEV; + } + +#if defined(CONFIG_SAMA5D4EK_NAND_FTL) + /* Use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(NAND_MINOR, mtd); + if (ret < 0) + { + fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + +#elif defined(CONFIG_SAMA5D4EK_NAND_NXFFS) + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", ret); + return ret; + } + + /* Mount the file system at /mnt/nand */ + + ret = mount(NULL, "/mnt/nand", "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} +#endif + +#endif /* CONFIG_SAMA5_EBICS3_NAND */ diff --git a/configs/sama5d4-ek/src/sam_ostest.c b/configs/sama5d4-ek/src/sam_ostest.c new file mode 100644 index 0000000000000000000000000000000000000000..712b10ae5029b7d93e2c99e5eb85d9885a697e2c --- /dev/null +++ b/configs/sama5d4-ek/src/sam_ostest.c @@ -0,0 +1,113 @@ +/************************************************************************************ + * configs/sama5d4-ek/src/sam_ostest.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "sama5d4-ek.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#undef HAVE_FPU +#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_EXAMPLES_OSTEST_FPUTESTDISABLE) && \ + defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && defined(CONFIG_SCHED_WAITPID) && \ + !defined(CONFIG_DISABLE_SIGNALS) +# define HAVE_FPU 1 +#endif + +#ifdef HAVE_FPU + +#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*FPU_CONTEXT_REGS) +# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size" +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static uint32_t g_saveregs[XCPTCONTEXT_REGS]; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ +/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return + * the current FPU registers. + */ + +void arch_getfpu(FAR uint32_t *fpusave) +{ + irqstate_t flags; + + /* Take a snapshot of the thread context right now */ + + flags = enter_critical_section(); + up_saveusercontext(g_saveregs); + + /* Return only the floating register values */ + + memcpy(fpusave, &g_saveregs[REG_S0], (4*FPU_CONTEXT_REGS)); + leave_critical_section(flags); +} + +/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function + * will compare them and return true if they are identical. + */ + +bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2) +{ + return memcmp(fpusave1, fpusave2, (4*FPU_CONTEXT_REGS)) == 0; +} + +#endif /* HAVE_FPU */ diff --git a/configs/sama5d4-ek/src/sam_pmic.c b/configs/sama5d4-ek/src/sam_pmic.c new file mode 100644 index 0000000000000000000000000000000000000000..0b6344dbf751ac9c50d3e3ccd23923411e819839 --- /dev/null +++ b/configs/sama5d4-ek/src/sam_pmic.c @@ -0,0 +1,109 @@ +/**************************************************************************** + * configs/sama5d4-ek/src/sam_pmic.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_twi.h" + +#include "sama5d4-ek.h" + +#ifdef HAVE_PMIC + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_pmic_initialize + * + * Description: + * Currently, this function only disables the PMIC. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void sam_pmic_initialize(void) +{ + FAR struct i2c_master_s *i2c; + struct i2c_config_s config; + uint8_t buffer[2]; + + /* Get an instance of the I2C interface for the PMIC */ + + i2c = sam_i2cbus_initialize(PMIC_TWI_BUS); + if (!i2c) + { + dbg("ERROR: Failed to initialize TWI%d\n", PMIC_TWI_BUS); + } + else + { + /* Setup up the I2C configuration */ + + config.frequency = PMIC_I2C_FREQUENCY; + config.address = PMIC_I2C_ADDRESS; + config.addrlen = 7; + + /* Send the disable sequence */ + + buffer[0] = 0x0b; + buffer[1] = 0xee; + (void)i2c_write(i2c, &config, buffer, 2); + + buffer[0] = 0x02; + buffer[1] = 0x0f; + (void)i2c_write(i2c, &config, buffer, 2); + + buffer[0] = 0x03; + buffer[1] = 0x0f; + (void)i2c_write(i2c, &config, buffer, 2); + } +} + +#endif /* HAVE_PMIC */ diff --git a/configs/sama5d4-ek/src/sam_pwm.c b/configs/sama5d4-ek/src/sam_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..e15e70c5a0d9a5496e00770f8303e14a40e14a4a --- /dev/null +++ b/configs/sama5d4-ek/src/sam_pwm.c @@ -0,0 +1,163 @@ +/************************************************************************************ + * configs/sama5d4-ek/src/sam_pwm.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include + +#include "sam_pwm.h" +#include "sama5d4-ek.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* PWM. There are no dedicated PWM output pins available to the user for PWM + * testing. Care must be taken because all PWM output pins conflict with some other + * usage of the pin by other devices: + * + * -----+---+---+----+-------------------- + * PWM PIN PER PIO CONFLICTS + * -----+---+---+----+-------------------- + * PWM0 FI B PC28 SPI1, ISI + * H B PB0 GMAC + * B PA20 LCDC, ISI + * L B PB1 GMAC + * B PA21 LCDC, ISI + * -----+---+---+----+-------------------- + * PWM1 FI B PC31 HDMI + * H B PB4 GMAC + * B PA22 LCDC, ISI + * L B PB5 GMAC + * B PE31 ISI, HDMI + * B PA23 LCDC, ISI + * -----+---+---+----+-------------------- + * PWM2 FI B PC29 UART0, ISI, HDMI + * H C PD5 HSMCI0 + * B PB8 GMAC + * L C PD6 HSMCI0 + * B PB9 GMAC + * -----+---+---+----+-------------------- + * PWM3 FI C PD16 SPI0, Audio + * H C PD7 HSMCI0 + * B PB12 GMAC + * L C PD8 HSMCI0 + * B PB13 GMAC + * -----+---+---+----+-------------------- + */ + +#ifndef CONFIG_SAMA5D4EK_CHANNEL +# if defined(CONFIG_SAMA5_PWM_CHAN0) +# warning Assuming PWM channel 0 +# define CONFIG_SAMA5D4EK_CHANNEL 0 +# elif defined(CONFIG_SAMA5_PWM_CHAN1) +# warning Assuming PWM channel 1 +# define CONFIG_SAMA5D4EK_CHANNEL 1 +# elif defined(CONFIG_SAMA5_PWM_CHAN2) +# warning Assuming PWM channel 2 +# define CONFIG_SAMA5D4EK_CHANNEL 2 +# elif defined(CONFIG_SAMA5_PWM_CHAN3) +# warning Assuming PWM channel 3 +# define CONFIG_SAMA5D4EK_CHANNEL 3 +# endif +#endif + +#if defined(CONFIG_PWM) && defined(CONFIG_SAMA5_PWM) + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All SAMA5 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call sam_pwminitialize() to get an instance of the PWM interface */ + + pwm = sam_pwminitialize(CONFIG_SAMA5D4EK_CHANNEL); + if (!pwm) + { + dbg("Failed to get the SAMA5 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/sama5d4-ek/src/sam_sdram.c b/configs/sama5d4-ek/src/sam_sdram.c new file mode 100644 index 0000000000000000000000000000000000000000..a868d670911155fa28931b15678dc63a44b7adbb --- /dev/null +++ b/configs/sama5d4-ek/src/sam_sdram.c @@ -0,0 +1,703 @@ +/**************************************************************************** + * configs/sama5d4-ek/src/sam_sdram.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Most of this file derives from Atmel sample code for the SAMA5D4x-EK + * board. That sample code has licensing that is compatible with the NuttX + * modified BSD license: + * + * Copyright (c) 2013, Atmel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor Atmel nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The DDR/SDR SDRAM Controller (DDRSDRC) is a multi-port memory controller. + * It comprises four slave AHB interfaces. All simultaneous accesses (four + * independent AHB ports) are interleaved to maximize memory bandwidth and + * minimize transaction latency due to SDRAM protocol. + * + * ------------------------------------------------------------------------- + * DDR2 Configuration + * + * The DDR2-SDRAM devices are initialized by the following sequence: + * + * * EBI Chip Select 1 is assigned to the DDR2SDR Controller, Enable DDR2 + * clock x2 in PMC. + * * Step 1: Program the memory device type + * * Step 2: + * - Program the features of DDR2-SDRAM device into the Configuration + * Register. + * - Program the features of DDR2-SDRAM device into the Timing Register + * HDDRSDRC2_T0PR. + * - Program the features of DDR2-SDRAM device into the Timing Register + * HDDRSDRC2_T1PR. + * - Program the features of DDR2-SDRAM device into the Timing Register + * HDDRSDRC2_T2PR. + * * Step 3: An NOP command is issued to the DDR2-SDRAM to enable clock. + * * Step 4: An NOP command is issued to the DDR2-SDRAM + * * Step 5: An all banks pre-charge command is issued to the DDR2-SDRAM. + * * Step 6: An Extended Mode Register set (EMRS2) cycle is issued to chose + * between commercial or high temperature operations. + * * Step 7: An Extended Mode Register set (EMRS3) cycle is issued to set + * all registers to 0. + * * Step 8: An Extended Mode Register set (EMRS1) cycle is issued to + * enable DLL. + * * Step 9: Program DLL field into the Configuration Register. + * * Step 10: A Mode Register set (MRS) cycle is issued to reset DLL. + * * Step 11: An all banks pre-charge command is issued to the DDR2-SDRAM. + * * Step 12: Two auto-refresh (CBR) cycles are provided. Program the + * auto refresh command (CBR) into the Mode Register. + * * Step 13: Program DLL field into the Configuration Register to + * low(Disable DLL reset). + * * Step 14: A Mode Register set (MRS) cycle is issued to program the + * parameters of the DDR2-SDRAM devices. + * * Step 15: Program OCD field into the Configuration Register to high (OCD + * calibration default). + * * Step 16: An Extended Mode Register set (EMRS1) cycle is issued to OCD + * default value. + * * Step 17: Program OCD field into the Configuration Register to low (OCD + * calibration mode exit). + * * Step 18: An Extended Mode Register set (EMRS1) cycle is issued to + * enable OCD exit. + * * Step 19,20: A mode Normal command is provided. Program the Normal mode + * into Mode Register. + * * Step 21: Write the refresh rate into the count field in the Refresh + * Timer register. The DDR2-SDRAM device requires a refresh every 15.625 + * or 7.81. + * + * ------------------------------------------------------------------------- + * SDRAM Configuration + * + * The SDR-SDRAM devices are initialized by the following sequence: + * + * * EBI Chip Select 1 is assigned to the DDR2SDR Controller, Enable DDR2 + * clock x2 in PMC. + * * Step 1. Program the memory device type into the Memory Device Register + * * Step 2. Program the features of the SDR-SDRAM device into the Timing + * Register and into the Configuration Register. + * * Step 3. For low-power SDRAM, temperature-compensated self refresh + * (TCSR), drive strength (DS) and partial array self refresh (PASR) must + * be set in the Low-power Register. + * * Step 4. A NOP command is issued to the SDR-SDRAM. Program NOP command + * into Mode Register, the application must set Mode to 1 in the Mode + * Register. Perform a write access to any SDR-SDRAM address to + * acknowledge this command. Now the clock which drives SDR-SDRAM device + * is enabled. + * * Step 5. An all banks pre-charge command is issued to the SDR-SDRAM. + * Program all banks pre-charge command into Mode Register, the application + * must set Mode to 2 in the Mode Register . Perform a write access to any + * SDRSDRAM address to acknowledge this command. + * * Step 6. Eight auto-refresh (CBR) cycles are provided. Program the auto + * refresh command (CBR) into Mode Register, the application must set Mode + * to 4 in the Mode Register. Once in the idle state, two AUTO REFRESH + * cycles must be performed. + * * Step 7. A Mode Register set (MRS) cycle is issued to program the + * parameters of the SDRSDRAM devices, in particular CAS latency and burst + * length. + * * Step 8. For low-power SDR-SDRAM initialization, an Extended Mode + * Register set (EMRS) cycle is issued to program the SDR-SDRAM parameters + * (TCSR, PASR, DS). The write address must be chosen so that BA[1] is set + * to 1 and BA[0] is set to 0 + * * Step 9. The application must go into Normal Mode, setting Mode to 0 in + * the Mode Register and perform a write access at any location in the + * SDRAM to acknowledge this command. + * * Step 10. Write the refresh rate into the count field in the DDRSDRC + * Refresh Timer register + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" + +#include "sam_periphclks.h" +#include "chip/sam_memorymap.h" +#include "chip/sam_pmc.h" +#include "chip/sam_sfr.h" +#include "chip/sam_matrix.h" +#include "chip/sam_mpddrc.h" + +#include "sama5d4-ek.h" + +/* This file requires: + * + * CONFIG_SAMA5_DDRCS -- DRAM support is enabled, and + * !CONFIG_SAMA5_BOOT_SDRAM - We did not boot into SRAM. + */ + +#if defined(CONFIG_SAMA5_DDRCS) && !defined(CONFIG_SAMA5_BOOT_SDRAM) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* SDRAM differences */ + +#if defined(CONFIG_SAMA5D4EK_MT47H128M16RT) + + /* Used for SDRAM command handshaking */ + +# define DDR2_BA0(r) (1 << ((r) + 26)) +# define DDR2_BA1(r) (1 << ((r) + 27)) + +#elif defined(CONFIG_SAMA5D4EK_MT47H64M16HR) + + /* Used for SDRAM command handshaking */ + +# define DDR2_BA0(r) (1 << ((r) + 25)) +# define DDR2_BA1(r) (1 << ((r) + 26)) + +#else +# error Unknown SDRAM type +#endif + +/* The delay loop in sam_sdram_delay requires 6 core cycles per iteration. + * + * At 384MHz: + * + * (6 cycles/iteration) / (0.384 cycles/nanosecond) = + * 15.6250 nanoseconds per iteration + * + * At 396MHz: + * + * (6 cycles/iteration) / (0.396 cycles/nanosecond) = + * 15.1515 nanoseconds per iteration + * + * At 528MHz: + * + * (6 cycles/iteration) / (0.528 cycles/nanosecond) = + * 11.3636 nanoseconds per iteration + */ + +#define LOOP_GUARD 100 +# define CYCLES_TO_COUNT(cycles) (((cycles) / 6) + LOOP_GUARD) + +#if defined(CONFIG_SAMA5D4EK_384MHZ) +# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 15625) + LOOP_GUARD) +# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 15625) + LOOP_GUARD) +#elif defined(CONFIG_SAMA5D4EK_528MHZ) +# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 11364) + LOOP_GUARD) +# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 11364) + LOOP_GUARD) +#else /* #elif defined(CONFIG_SAMA5D4EK_396MHZ) */ +# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 15152) + LOOP_GUARD) +# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 15152) + LOOP_GUARD) +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_sdram_delay + * + * Description: + * Precision delay function for SDRAM configuration. + * + * This delay loop requires 6 core cycles per iteration. The actual + * amount of time delayed will then vary with PCK. + * + ****************************************************************************/ + +static inline void sam_sdram_delay(unsigned int loops) +{ + volatile unsigned int i; + + for (i = 0; i < loops; i++) + { + asm("nop"); + } +} + +/**************************************************************************** + * Name: sam_sdram_delay + * + * Description: + * Precision delay function for SDRAM configuration. + * + * This delay loop requires 6 core cycles per iteration. The actual + * amount of time delayed will then vary with PCK. + * + ****************************************************************************/ + +static void sam_config_slaveddr(void) +{ + int ddrport; + + /* Disable write protection */ + + putreg32(MPDDRC_WPCR_WPKEY, SAM_MATRIX0_WPMR); + + /* Partition internal SRAM */ + + putreg32(0, SAM_MATRIX0_SSR(11)); + putreg32(5, SAM_MATRIX0_SRTSR(11)); + putreg32(4, SAM_MATRIX0_SASSR(11)); + + /* Partition external DDR. DDR port 0 not used from NWd */ + + for (ddrport = 1 ; ddrport < 8 ; ddrport++) + { + putreg32(0x00ffffff, SAM_MATRIX0_SSR(H64MX_DDR_SLAVE_PORT0 + ddrport)); + putreg32(0x0000000f, SAM_MATRIX0_SRTSR(H64MX_DDR_SLAVE_PORT0 + ddrport)); + putreg32(0x0000ffff, SAM_MATRIX0_SASSR(H64MX_DDR_SLAVE_PORT0 + ddrport)); + } +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_sdram_config + * + * Description: + * Configures DDR2 (MT47H128M16RT 128MB or, optionally, MT47H64M16HR) + * + * Per the SAMA5D3-EK User guide: "Two DDR2/SDRAM (MT47H64M16HR) used as + * main system memory (256 MByte). The board includes 2 Gbits of on-board soldered + * DDR2 (double data rate) SDRAM. The footprints can also host two DDR2 + * (MT47H128M16RT) from Micron® for a total of 512 MBytes of DDR2 memory. The + * memory bus is 32 bits wide and operates with a frequency of up to 166 MHz." + * + * From the Atmel Code Example: + * MT47H64M16HR : 8 Meg x 16 x 8 banks + * Refresh count: 8K + * Row address: A[12:0] (8K) + * Column address A[9:0] (1K) + * Bank address BA[2:0] a(24,25) (8) + * + * This logic was taken from Atmel sample code for the SAMA5D4-EK. + * + * Input Parameters: + * None + * + * Assumptions: + * The DDR memory regions is configured as strongly ordered memory. When + * we complete initialization of SDRAM and it is ready for use, we will + * make DRAM into normal memory. + * + ************************************************************************************/ + +void sam_sdram_config(void) +{ + volatile uint8_t *ddr = (uint8_t *)SAM_DDRCS_VSECTION; + uint32_t regval; + + /* Setup DDR partitions */ + + sam_config_slaveddr(); + + /* Enable x2 clocking to the MPDDRC */ + + sam_mpddrc_enableclk(); + + /* Enable DDR clocking */ + + regval = getreg32(SAM_PMC_SCER); + regval |= PMC_DDRCK; + putreg32(regval, SAM_PMC_SCER); + + /* Step 1: Program the memory device type + * + * DBW = 0 (32 bits bus wide) + * Memory Device = 6 = DDR2-SDRAM = 0x00000006 + */ + + putreg32(MPDDRC_MD_DDR2_SDRAM, SAM_MPDDRC_MD); + putreg32(MPDDRC_RD_DATA_PATH_SHIFT_SAMPLING_1CYCLE, + SAM_MPDDRC_RD_DATA_PATH); + + regval = MPDDRC_TPR0_TRAS(9) | /* 6 * 7.5 = 45 ns */ + MPDDRC_TPR0_TRCD(3) | /* 2 * 7.5 = 15 ns */ + MPDDRC_TPR0_TWR(3) | /* 3 * 7.5 = 22.5 ns */ + MPDDRC_TPR0_TRC(10) | /* 8 * 7.5 = 60 ns */ + MPDDRC_TPR0_TRP(3) | /* 2 * 7.5 = 15 ns */ + MPDDRC_TPR0_TRRD(2) | /* 2 * 7.5 = 15 ns */ + MPDDRC_TPR0_TWTR(2) | /* 2 clock cycle */ + MPDDRC_TPR0_TMRD(2); /* 2 clock cycles */ + putreg32(regval, SAM_MPDDRC_TPR0); + + regval = MPDDRC_TPR1_TRFC(31) | /* 18 * 7.5 = 135 ns (min 127.5 ns for 1Gb DDR) */ + MPDDRC_TPR1_TXSNR(33) | /* 20 * 7.5 > 142.5ns TXSNR: Exit self refresh delay to non read command */ + MPDDRC_TPR1_TXSRD(200) | /* min 200 clock cycles, TXSRD: Exit self refresh delay to Read command */ + MPDDRC_TPR1_TXP(2); /* 2 * 7.5 = 15 ns */ + putreg32(regval, SAM_MPDDRC_TPR1); + + regval = MPDDRC_TPR2_TXARD(7) | /* min 2 clock cycles */ + MPDDRC_TPR2_TXARDS(7) | /* min 7 clock cycles */ + MPDDRC_TPR2_TRPA(4) | /* min 18ns */ + MPDDRC_TPR2_TRTP(2) | /* 2 * 7.5 = 15 ns (min 7.5ns) */ + MPDDRC_TPR2_TFAW(9); + putreg32(regval, SAM_MPDDRC_TPR2); + + /* Clear the low power register */ + + putreg32(0, SAM_MPDDRC_LPR); + + regval = getreg32(SAM_MPDDRC_IO_CALIBR); + regval &= ~(MPDDRC_IO_CALIBR_RDIV_MASK | MPDDRC_IO_CALIBR_TZQIO_MASK); + regval |= (MPDDRC_IO_CALIBR_RZQ60_50 | MPDDRC_IO_CALIBR_TZQIO(5) | + MPDDRC_IO_CALIBR_EN_CALIB); + putreg32(regval, SAM_MPDDRC_IO_CALIBR); + + /* Step 2: Program the features of DDR2-SDRAM device into the Timing Register */ +#if defined(CONFIG_SAMA5D4EK_MT47H128M16RT) + + /* For MT47H128M16RT + * + * NC = 10 DDR column bits + * NR = 14 DDR row bits + * CAS = DDR2/LPDDR2 CAS Latency 4 + * DLL = Disable reset (0) + * DIC_DS = 0 + * DIS_DLL = Enable PLL (0) + * ZQ = Calibration command after initialization (0) + * OCD = OCD calibration mode exit, maintain setting (0) + * DQMS = Not shared (0) + * ENDRM = Disable read measure (0) + * NB = 8 banks + * NDQS = Not DQS disabled + * DECODE = Sequential decoding (0) + * UNAL = Unaliged access supported + */ + + regval = MPDDRC_CR_NC_10 | /* Number of Column Bits */ + MPDDRC_CR_NR_14 | /* Number of Row Bits */ + MPDDRC_CR_CAS_3 | /* CAS Latency */ + MPDDRC_CR_OCD_EXIT | /* Off-chip Driver */ + MPDDRC_CR_ZQ_INIT | + MPDDRC_CR_8BANKS | /* Number of Banks */ + MPDDRC_CR_NDQS | /* Not DQS */ + MPDDRC_CR_UNAL; /* Support Unaligned Access */ + +#elif defined(CONFIG_SAMA5D4EK_MT47H64M16HR) + /* For MT47H64M16HR + * + * NC = 10 DDR column bits + * NR = 13 DDR row bits + * CAS = DDR2/LPDDR2 CAS Latency 3 + * DLL = Disable reset (0) + * DIC_DS = 0 + * DIS_DLL = Enable PLL (0) + * ZQ = Calibration command after initialization (0) + * OCD = OCD calibration mode exit, maintain setting (0) + * DQMS = Not shared (0) + * ENDRM = Disable read measure (0) + * NB = 8 banks + * NDQS = Not DQS disabled + * DECODE = Sequential decoding (0) + * UNAL = Unaliged access supported + */ + + regval = MPDDRC_CR_NC_10 | /* Number of Column Bits */ + MPDDRC_CR_NR_13 | /* Number of Row Bits */ + MPDDRC_CR_CAS_3 | /* CAS Latency */ + MPDDRC_CR_OCD_EXIT | /* Off-chip Driver */ + MPDDRC_CR_ZQ_INIT | + MPDDRC_CR_8BANKS | /* Number of Banks */ + MPDDRC_CR_NDQS | /* Not DQS */ + MPDDRC_CR_UNAL; /* upport Unaligned Access */ + +#else +# error Unknwon SDRAM type +#endif + + putreg32(regval, SAM_MPDDRC_CR); + + /* DDRSDRC Low-power Register */ + + sam_sdram_delay(USEC_TO_COUNT(200)); + +#if 0 + regval = MPDDRC_LPR_LPCB_DISABLED | /* Low-power Feature is inhibited */ + MPDDRC_LPR_TIMEOUT_0CLKS | /* Activates low-power mode after the end of transfer */ + MPDDRC_LPR_APDE_FAST; /* Active Power Down Exit Time */ + putreg32(regval, SAM_MPDDRC_LPR); +#endif + + /* Step 3: An NOP command is issued to the DDR2-SDRAM. Program the NOP + * command into the Mode Register, the application must set MODE to 1 in + * the Mode Register. + */ + + putreg32(MPDDRC_MR_MODE_NOP, SAM_MPDDRC_MR); + + /* Perform a write access to any DDR2-SDRAM address to acknowledge this + * command. + */ + + *ddr = 0; + + /* Now clocks which drive DDR2-SDRAM device are enabled. + * + * A minimum pause of 200 usec is provided to precede any signal toggle. + * (6 core cycles per iteration, core is at 396MHz: min 13200 loops) + */ + + sam_sdram_delay(USEC_TO_COUNT(200)); + + /* Step 4: An NOP command is issued to the DDR2-SDRAM */ + + putreg32(MPDDRC_MR_MODE_NOP, SAM_MPDDRC_MR); + + /* Perform a write access to any DDR2-SDRAM address to acknowledge this + * command. + */ + + *ddr = 0; + + /* Now CKE is driven high.*/ + /* Wait 400 ns min */ + + sam_sdram_delay(NSEC_TO_COUNT(400)); + + /* Step 5: An all banks pre-charge command is issued to the DDR2-SDRAM. */ + + putreg32(MPDDRC_MR_MODE_PRCGALL, SAM_MPDDRC_MR); + + /* Perform a write access to any DDR2-SDRAM address to acknowledge this + * command. + */ + + *ddr = 0; + + /* Wait 400 ns min */ + + sam_sdram_delay(NSEC_TO_COUNT(400)); + + /* Step 6: An Extended Mode Register set (EMRS2) cycle is issued to chose + * between commercialor high temperature operations. + * + * The write address must be chosen so that BA[1] is set to 1 and BA[0] is + * set to 0. + */ + + putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA1(0))) = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 7: An Extended Mode Register set (EMRS3) cycle is issued to set + * all registers to 0. + * + * The write address must be chosen so that BA[1] is set to 1 and BA[0] is + * set to 1. + */ + + putreg32(MPDDRC_MR_MODE_LMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA1(0) + DDR2_BA0(0))) = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 8: An Extended Mode Register set (EMRS1) cycle is issued to + * enable DLL. + * + * The write address must be chosen so that BA[1] is set to 0 and BA[0] + * is set to 1. + */ + + putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA0(0))) = 0; + + /* An additional 200 cycles of clock are required for locking DLL */ + + sam_sdram_delay(10000 /* CYCLES_TO_COUNT(200) */); + + /* Step 9: Program DLL field into the Configuration Register.*/ + + regval = getreg32(SAM_MPDDRC_CR); + regval |= MPDDRC_CR_DLL; + putreg32(regval, SAM_MPDDRC_CR); + + /* Step 10: A Mode Register set (MRS) cycle is issued to reset DLL. + * + * The write address must be chosen so that BA[1:0] bits are set to 0. + */ + + putreg32(MPDDRC_MR_MODE_LMR, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 11: An all banks precharge command is issued to the DDR2-SDRAM. + * + * Perform a write access to any DDR2-SDRAM address to acknowledge this + * command + */ + + putreg32(MPDDRC_MR_MODE_PRCGALL, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 12: Two auto-refresh (CBR) cycles are provided. Program the auto + * refresh command (CBR) into the Mode Register. + * + * Perform a write access to any DDR2-SDRAM address to acknowledge this + * command. + */ + + putreg32(MPDDRC_MR_MODE_RFSH, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Configure 2nd CBR. + * + * Perform a write access to any DDR2-SDRAM address to acknowledge this + * command. + */ + + putreg32(MPDDRC_MR_MODE_RFSH, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 13: Program DLL field into the Configuration Register to low + * (Disable DLL reset). + */ + + regval = getreg32(SAM_MPDDRC_CR); + regval &= ~MPDDRC_CR_DLL; + putreg32(regval, SAM_MPDDRC_CR); + + /* Step 14: A Mode Register set (MRS) cycle is issued to program the + * parameters of the DDR2-SDRAM devices. + * + * The write address must be chosen so that BA[1:0] are set to 0. + */ + + putreg32(MPDDRC_MR_MODE_LMR, SAM_MPDDRC_MR); + *ddr = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 15: Program OCD field into the Configuration Register to high (OCD + * calibration default). + */ + + regval = getreg32(SAM_MPDDRC_CR); + regval |= MPDDRC_CR_OCD_DEFAULT; + putreg32(regval, SAM_MPDDRC_CR); + + /* Step 16: An Extended Mode Register set (EMRS1) cycle is issued to OCD + * default value. + * + * The write address must be chosen so that BA[1] is set to 0 and BA[0] is + * set to 1. + */ + + putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA0(0))) = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 17: Program OCD field into the Configuration Register to low (OCD + * calibration mode exit). + */ + + regval = getreg32(SAM_MPDDRC_CR); + regval &= ~MPDDRC_CR_OCD_MASK; + putreg32(regval, SAM_MPDDRC_CR); + + /* Step 18: An Extended Mode Register set (EMRS1) cycle is issued to + * enable OCD exit. + * + * The write address must be chosen so that BA[1] is set to 0 and BA[0] is + * set to 1. + */ + + putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR); + *((volatile uint8_t *)(ddr + DDR2_BA0(0))) = 0; + + /* Wait 2 cycles min */ + + sam_sdram_delay(100 /* CYCLES_TO_COUNT(2) */); + + /* Step 19,20: A mode Normal command is provided. Program the Normal mode + * into Mode Register. + */ + + putreg32(MPDDRC_MR_MODE_NORMAL, SAM_MPDDRC_MR); + *ddr = 0; + + /* Step 21: Write the refresh rate into the count field in the Refresh + * Timer register. The DDR2-SDRAM device requires a refresh every 15.625 + * usec or 7.81 usec. + * + * With a 100MHz frequency, the refresh timer count register must to be + * set with (15.625 /100 MHz) = 1562 i.e. 0x061A or (7.81 /100MHz) = 781 + * i.e. 0x030d. + * + * For MT47H64M16HR, The refresh period is 64ms (commercial), This equates + * to an average refresh rate of 7.8125usec (commercial), To ensure all + * rows of all banks are properly refreshed, 8192 REFRESH commands must be + * issued every 64ms (commercial) + * + * ((64 x 10(^-3))/8192) x133 x (10^6) + */ + + /* Set Refresh timer 7.8125 us */ + + putreg32(MPDDRC_RTR_COUNT(695), SAM_MPDDRC_RTR); + + /* OK now we are ready to work on the DDRSDR. + * + * Wait for end of calibration + */ + + sam_sdram_delay(500); +} + +#endif /* CONFIG_SAMA5_DDRCS && !CONFIG_SAMA5_BOOT_SDRAM */ diff --git a/configs/sama5d4-ek/src/sam_spi.c b/configs/sama5d4-ek/src/sam_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..a56c4775071fa51d4d63e923f88848a6ddaebb53 --- /dev/null +++ b/configs/sama5d4-ek/src/sam_spi.c @@ -0,0 +1,216 @@ +/************************************************************************************ + * configs/sama5d4-ek/src/sam_spi.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "sam_pio.h" +#include "sam_spi.h" +#include "sama5d4-ek.h" + +#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select PIO pins for the SAMA5D4-EK board. + * + ************************************************************************************/ + +void weak_function sam_spidev_initialize(void) +{ +#ifdef CONFIG_SAMA5_SPI0 +#ifdef CONFIG_MTD_AT25 + /* The AT25 serial FLASH connects using NPCS0 */ + + sam_configpio(PIO_AT25_NPCS0); +#endif +#endif + +#ifdef CONFIG_SAMA5_SPI1 +#endif +} + +/**************************************************************************** + * Name: sam_spi[0|1]select, sam_spi[0|1]status, and sam_spi[0|1]cmddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * include: + * + * o sam_spi[0|1]select is a functions tomanage the board-specific chip selects + * o sam_spi[0|1]status and sam_spi[0|1]cmddata: Implementations of the status + * and cmddata methods of the SPI interface defined by struct spi_ops_ + * (see include/nuttx/spi/spi.h). All other methods including + * sam_spibus_initialize()) are provided by common SAM3/4 logic. + * + * To use this common SPI logic on your board: + * + * 1. Provide logic in sam_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide sam_spi[0|1]select() and sam_spi[0|1]status() functions in your board- + * specific logic. These functions will perform chip selection and + * status operations using PIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * sam_spi[0|1]cmddata() functions in your board-specific logic. This + * function will perform cmd/data selection operations using PIOs in + * the way your board is configured. + * 3. Add a call to sam_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by sam_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spi[0|1]select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * PIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the PIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SAMA5_SPI0 +void sam_spi0select(enum spi_dev_e devid, bool selected) +{ +#ifdef CONFIG_MTD_AT25 + /* The AT25 serial FLASH connects using NPCS0 */ + + if (devid == SPIDEV_FLASH) + { + sam_piowrite(PIO_AT25_NPCS0, !selected); + } +#endif +} +#endif + +#ifdef CONFIG_SAMA5_SPI1 +void sam_spi1select(enum spi_dev_e devid, bool selected) +{ +} +#endif + +/**************************************************************************** + * Name: sam_spi[0|1]status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef CONFIG_SAMA5_SPI0 +uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_SAMA5_SPI0 +uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#endif /* CONFIG_SAMA5_SPI0 || CONFIG_SAMA5_SPI1 */ diff --git a/configs/sama5d4-ek/src/sam_usb.c b/configs/sama5d4-ek/src/sam_usb.c new file mode 100644 index 0000000000000000000000000000000000000000..c043e057a938b5854efce844bcd64caa897e47ac --- /dev/null +++ b/configs/sama5d4-ek/src/sam_usb.c @@ -0,0 +1,546 @@ +/************************************************************************************ + * configs/sama5d4-ek/src/sam_usb.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "up_arch.h" +#include "sam_pio.h" +#include "sam_usbhost.h" +#include "chip/sam_ohci.h" +#include "sama5d4-ek.h" + +#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_SAMA5D4EK_USBHOST_PRIO +# define CONFIG_SAMA5D4EK_USBHOST_PRIO 50 +#endif + +#ifndef CONFIG_SAMA5D4EK_USBHOST_STACKSIZE +# define CONFIG_SAMA5D4EK_USBHOST_STACKSIZE 1024 +#endif + +#ifdef HAVE_USBDEV +# undef CONFIG_SAMA5_UHPHS_RHPORT1 +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* Retained device driver handles */ + +#ifdef CONFIG_SAMA5_OHCI +static struct usbhost_connection_s *g_ohciconn; +#endif +#ifdef CONFIG_SAMA5_EHCI +static struct usbhost_connection_s *g_ehciconn; +#endif + +/* Overcurrent interrupt handler */ + +#if defined(HAVE_USBHOST) && defined(CONFIG_SAMA5_PIOD_IRQ) +static xcpt_t g_ochandler; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: usbhost_waiter + * + * Description: + * Wait for USB devices to be connected to either the OHCI or EHCI hub. + * + ************************************************************************************/ + +#if HAVE_USBHOST +#ifdef CONFIG_DEBUG_USB +static int usbhost_waiter(struct usbhost_connection_s *dev, const char *hcistr) +#else +static int usbhost_waiter(struct usbhost_connection_s *dev) +#endif +{ + struct usbhost_hubport_s *hport; + + uvdbg("Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(dev, &hport)); + uvdbg("%s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(dev, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/************************************************************************************ + * Name: ohci_waiter + * + * Description: + * Wait for USB devices to be connected to the OHCI hub. + * + ************************************************************************************/ + +#ifdef CONFIG_SAMA5_OHCI +static int ohci_waiter(int argc, char *argv[]) +{ +#ifdef CONFIG_DEBUG_USB + return usbhost_waiter(g_ohciconn, "OHCI"); +#else + return usbhost_waiter(g_ohciconn); +#endif +} +#endif + +/************************************************************************************ + * Name: ehci_waiter + * + * Description: + * Wait for USB devices to be connected to the EHCI hub. + * + ************************************************************************************/ + +#ifdef CONFIG_SAMA5_EHCI +static int ehci_waiter(int argc, char *argv[]) +{ +#ifdef CONFIG_DEBUG_USB + return usbhost_waiter(g_ehciconn, "EHCI"); +#else + return usbhost_waiter(g_ehciconn); +#endif +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_usbinitialize + * + * Description: + * Called from sam_usbinitialize very early in initialization to setup USB-related + * GPIO pins for the SAMA5D4-EK board. + * + * USB Ports + * The SAMA5D4 series-MB features three USB communication ports: + * + * 1. Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed with + * USB Device High Speed Micro AB connector, J20 + * + * 2. Port B Host High Speed (EHCI) and Full Speed (OHCI) standard type A + * connector, J19 upper port + * + * 3. Port C Host Full Speed (OHCI) only standard type A connector, J19 + * lower port + * + * The two USB host ports (only) are equipped with 500-mA high-side power + * switch for self-powered and bus-powered applications. + * + * The USB device port A (J6) features a VBUS insert detection function. + * + * Port A + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PE9 VBUS_SENSE VBus detection + * + * Note: No VBus power switch enable on port A. I think that this limits + * this port to a device port or as a host port for self-powered devices + * only. + * + * Port B + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PE4 EN5V_USBB VBus power enable (via MN3 power switch). To the A1 + * pin of J19 Dual USB A connector + * + * Port C + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PE3 EN5V_USBC VBus power enable (via MN3 power switch). To the B1 + * pin of J19 Dual USB A connector + * + * Both Ports B and C + * + * PIO Signal Name Function + * ---- ----------- ------------------------------------------------------- + * PE5 OVCUR_USB Combined over-current indication from port A and B + * + * That offers a lot of flexibility. However, here we enable the ports only + * as follows: + * + * Port A -- USB device + * Port B -- EHCI host + * Port C -- OHCI host + * + ************************************************************************************/ + +void weak_function sam_usbinitialize(void) +{ +#ifdef HAVE_USBDEV + /* Configure Port A to support the USB device function */ + + sam_configpio(PIO_USBA_VBUS_SENSE); /* VBUS sense */ + + /* TODO: Configure an interrupt on VBUS sense */ +#endif + +#ifdef HAVE_USBHOST +#ifdef CONFIG_SAMA5_UHPHS_RHPORT1 + /* Configure Port A to support the USB OHCI/EHCI function */ + + sam_configpio(PIO_USBA_VBUS_ENABLE); /* VBUS enable, initially OFF */ +#endif + +#ifdef CONFIG_SAMA5_UHPHS_RHPORT2 + /* Configure Port B to support the USB OHCI/EHCI function */ + + sam_configpio(PIO_USBB_VBUS_ENABLE); /* VBUS enable, initially OFF */ +#endif + +#ifdef CONFIG_SAMA5_UHPHS_RHPORT3 + /* Configure Port C to support the USB OHCI/EHCI function */ + + sam_configpio(PIO_USBC_VBUS_ENABLE); /* VBUS enable, initially OFF */ +#endif + +#ifdef HAVE_USBOVCUR + + /* Configure Port B/C VBUS over-current detection */ + + sam_configpio(PIO_USBBC_VBUS_OVERCURRENT); /* VBUS over-current */ +#endif +#endif /* HAVE_USBHOST */ +} + +/*********************************************************************************** + * Name: sam_usbhost_initialize + * + * Description: + * Called at application start-up time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +#if HAVE_USBHOST +int sam_usbhost_initialize(void) +{ + pid_t pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about + */ + +#ifdef CONFIG_USBHOST_HUB + /* Initialize USB hub support */ + + ret = usbhost_hub_initialize(); + if (ret < 0) + { + udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB host Mass Storage Class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_HIDKBD + /* Register the USB host HID keyboard class driver */ + + ret = usbhost_kbdinit(); + if (ret != OK) + { + udbg("ERROR: Failed to register the KBD class\n"); + } +#endif + + /* Then get an instance of the USB host interface. */ + +#ifdef CONFIG_SAMA5_OHCI + /* Get an instance of the USB OHCI interface */ + + g_ohciconn = sam_ohci_initialize(0); + if (!g_ohciconn) + { + udbg("ERROR: sam_ohci_initialize failed\n"); + return -ENODEV; + } + + /* Start a thread to handle device connection. */ + + pid = task_create("OHCI Monitor", CONFIG_SAMA5D4EK_USBHOST_PRIO, + CONFIG_SAMA5D4EK_USBHOST_STACKSIZE, + (main_t)ohci_waiter, (FAR char * const *)NULL); + if (pid < 0) + { + udbg("ERROR: Failed to create ohci_waiter task: %d\n", ret); + return -ENODEV; + } +#endif + +#ifdef CONFIG_SAMA5_EHCI + /* Get an instance of the USB EHCI interface */ + + g_ehciconn = sam_ehci_initialize(0); + if (!g_ehciconn) + { + udbg("ERROR: sam_ehci_initialize failed\n"); + return -ENODEV; + } + + /* Start a thread to handle device connection. */ + + pid = task_create("EHCI Monitor", CONFIG_SAMA5D4EK_USBHOST_PRIO, + CONFIG_SAMA5D4EK_USBHOST_STACKSIZE, + (main_t)ehci_waiter, (FAR char * const *)NULL); + if (pid < 0) + { + udbg("ERROR: Failed to create ehci_waiter task: %d\n", ret); + return -ENODEV; + } +#endif + + return OK; +} +#endif + +/*********************************************************************************** + * Name: sam_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be provided by + * each platform that implements the OHCI or EHCI host interface + * + * Input Parameters: + * rhport - Selects root hub port to be powered host interface. See SAM_RHPORT_* + * definitions above. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ***********************************************************************************/ + +#if HAVE_USBHOST +void sam_usbhost_vbusdrive(int rhport, bool enable) +{ + pio_pinset_t pinset = 0; + + uvdbg("RHPort%d: enable=%d\n", rhport+1, enable); + + /* Pick the PIO configuration associated with the selected root hub port */ + + switch (rhport) + { + case SAM_RHPORT1: +#ifndef CONFIG_SAMA5_UHPHS_RHPORT1 + udbg("ERROR: RHPort1 is not available in this configuration\n"); + return; +#else + pinset = PIO_USBA_VBUS_ENABLE; + break; +#endif + + case SAM_RHPORT2: +#ifndef CONFIG_SAMA5_UHPHS_RHPORT2 + udbg("ERROR: RHPort2 is not available in this configuration\n"); + return; +#else + pinset = PIO_USBB_VBUS_ENABLE; + break; +#endif + + case SAM_RHPORT3: +#ifndef CONFIG_SAMA5_UHPHS_RHPORT3 + udbg("ERROR: RHPort3 is not available in this configuration\n"); + return; +#else + pinset = PIO_USBC_VBUS_ENABLE; + break; +#endif + + default: + udbg("ERROR: RHPort%d is not supported\n", rhport+1); + return; + } + + /* Then enable or disable VBUS power */ + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ + + sam_piowrite(pinset, false); + } + else + { + /* Disable the Power Switch by driving the enable pin high */ + + sam_piowrite(pinset, true); + } +} +#endif + +/************************************************************************************ + * Name: sam_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an over-current condition is + * detected on port B or C. + * + * REVISIT: Since this is a common signal, we will need to come up with some way + * to inform both EHCI and OHCI drivers when this error occurs. + * + * Input Parameters: + * handler - New over-current interrupt handler + * + * Returned value: + * Old over-current interrupt handler + * + ************************************************************************************/ + +#if HAVE_USBHOST +xcpt_t sam_setup_overcurrent(xcpt_t handler) +{ +#if defined(CONFIG_SAMA5_PIOD_IRQ) && (defined(CONFIG_SAMA5_UHPHS_RHPORT2) || \ + defined(CONFIG_SAMA5_UHPHS_RHPORT3)) + + xcpt_t oldhandler; + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old interrupt handler and save the new one */ + + oldhandler = g_ochandler; + g_ochandler = handler; + + /* Configure the interrupt */ + + sam_pioirq(PIO_USBBC_VBUS_OVERCURRENT); + (void)irq_attach(IRQ_USBBC_VBUS_OVERCURRENT, handler); + sam_pioirqenable(IRQ_USBBC_VBUS_OVERCURRENT); + + /* Return the old handler (so that it can be restored) */ + + leave_critical_section(flags); + return oldhandler; + +#else + return NULL; + +#endif +} +#endif /* CONFIG_SAMA5_PIOD_IRQ ... */ + +/************************************************************************************ + * Name: sam_usbsuspend + * + * Description: + * Board logic must provide the sam_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} +#endif + +#endif /* CONFIG_SAMA5_UHPHS || CONFIG_SAMA5_UDPHS */ diff --git a/configs/sama5d4-ek/src/sam_usbmsc.c b/configs/sama5d4-ek/src/sam_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..9a712d1ce1c6a896e35d892c0671a416697b2a55 --- /dev/null +++ b/configs/sama5d4-ek/src/sam_usbmsc.c @@ -0,0 +1,108 @@ +/**************************************************************************** + * configs/sama5d4-ek/src/sam_usbmsc.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the SAM3U MMC/SD SDIO block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sama5d4-ek.h" + +#ifdef CONFIG_USBMSC + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef HAVE_AT25 +# error AT25 Serial FLASH not supported +#endif + +#ifndef CONFIG_SAMA5D4EK_AT25_FTL +# error AT25 FTL support required (CONFIG_SAMA5D4EK_AT25_FTL) +# undef HAVE_AT25 +#endif + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +#if CONFIG_SYSTEM_USBMSC_DEVMINOR1 != AT25_MINOR +# error Confusion in the assignment of minor device numbers +# undef HAVE_AT25 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* Initialize the AT25 MTD driver */ + +#ifdef HAVE_AT25 + int ret = sam_at25_automount(AT25_MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_at25_automount failed: %d\n", ret); + } + + return ret; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_USBMSC */ diff --git a/configs/sama5d4-ek/src/sam_userleds.c b/configs/sama5d4-ek/src/sam_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..ac7fae8d00efe0d6a5b8bca7affde14ca7289162 --- /dev/null +++ b/configs/sama5d4-ek/src/sam_userleds.c @@ -0,0 +1,150 @@ +/**************************************************************************** + * configs/sama5d4-ek/src/sam_userleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are 3 LEDs on the SAMA5D4-EK: + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D4 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PE28/NWAIT/RTS4/A19 1Wire_PE28 1-WIRE ROM, LCD, D8 (green) + * PE8/A8/TCLK3/PWML3 LED_USER_PE8 LED_USER (D10) + * PE9/A9/TIOA2 LED_POWER_PE9 LED_POWER (D9, Red) + * ------------------------------ ------------------- ------------------------- + * + * - D8: D8 is shared with other functions and cannot be used if the 1-Wire ROM + * is used. I am not sure of the LCD function, but the LED may not be available + * if the LCD is used either. We will avoid using D8 just for simplicity. + * - D10: Nothing special here. A low output illuminates. + * - D9: The Power ON LED. Connects to the via an IRLML2502 MOSFET. This LED will + * be on when power is applied but otherwise, I think it works like D10. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_pio.h" +#include "sama5d4-ek.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED PIOs for output */ + + sam_configpio(PIO_LED_USER); + sam_configpio(PIO_LED_POWER); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint32_t ledcfg; + + if (led == BOARD_BLUE) + { + /* Low illuminates */ + + ledcfg = PIO_LED_USER; + ledon = !ledon; + } + else if (led == BOARD_RED) + { + /* High illuminates */ + + ledcfg = PIO_LED_POWER; + } + else + { + return; + } + + sam_piowrite(ledcfg, ledon); +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + bool ledon; + + /* Low illuminates */ + + ledon = ((ledset & BOARD_BLUE_BIT) == 0); + sam_piowrite(PIO_LED_USER, ledon); + + /* High illuminates */ + + ledon = ((ledset & BOARD_RED_BIT) != 0); + sam_piowrite(PIO_LED_POWER, ledon); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/sama5d4-ek/src/sam_wm8904.c b/configs/sama5d4-ek/src/sam_wm8904.c new file mode 100644 index 0000000000000000000000000000000000000000..de0a2194d5f4f6ec368f0302594cc8137657a4c2 --- /dev/null +++ b/configs/sama5d4-ek/src/sam_wm8904.c @@ -0,0 +1,383 @@ +/************************************************************************************ + * configs/sama5d4-ek/src/sam_wm8904.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "sam_pio.h" +#include "sam_twi.h" +#include "sam_ssc.h" +#include "sam_pck.h" + +#include "sama5d4-ek.h" + +#ifdef HAVE_WM8904 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct sama5d4ek_mwinfo_s +{ + /* Standard MW8904 interface */ + + struct wm8904_lower_s lower; + + /* Extensions for the sama5d4ek board */ + + wm8904_handler_t handler; + FAR void *arg; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/PIO access callbacks. These operations all hidden behind + * callbacks to isolate the WM8904 driver from differences in PIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the WM8904 interrupt handler to the PIO interrupt + * enable - Enable or disable the PIO interrupt + */ + +static int wm8904_attach(FAR const struct wm8904_lower_s *lower, + wm8904_handler_t isr, FAR void *arg); +static bool wm8904_enable(FAR const struct wm8904_lower_s *lower, + bool enable); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the WM8904 + * driver. This structure provides information about the configuration + * of the WM8904 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. + */ + +static struct sama5d4ek_mwinfo_s g_wm8904info = +{ + .lower = + { + .address = WM8904_I2C_ADDRESS, + .frequency = CONFIG_SAMA5D4EK_WM8904_I2CFREQUENCY, +#ifdef CONFIG_SAMA5D4EK_WM8904_SRCSCK + .mclk = BOARD_SLOWCLK_FREQUENCY, +#else + .mclk = BOARD_MAINCK_FREQUENCY, +#endif + + .attach = wm8904_attach, + .enable = wm8904_enable, + }, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * IRQ/PIO access callbacks. These operations all hidden behind + * callbacks to isolate the WM8904 driver from differences in PIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the WM8904 interrupt handler to the PIO interrupt + * enable - Enable or disable the PIO interrupt + * clear - Acknowledge/clear any pending PIO interrupt + * + ****************************************************************************/ + +static int wm8904_attach(FAR const struct wm8904_lower_s *lower, + wm8904_handler_t isr, FAR void *arg) +{ + if (isr) + { + /* Just save the address of the handler and its argument for now. The + * new handler will called via wm8904_interrupt() when the interrupt occurs. + */ + + audvdbg("Attaching %p\n", isr); + g_wm8904info.handler = isr; + g_wm8904info.arg = arg; + } + else + { + audvdbg("Detaching %p\n", g_wm8904info.handler); + (void)wm8904_enable(lower, false); + g_wm8904info.handler = NULL; + g_wm8904info.arg = NULL; + } + + return OK; +} + +static bool wm8904_enable(FAR const struct wm8904_lower_s *lower, bool enable) +{ + static bool enabled; + irqstate_t flags; + bool ret; + + /* Has the interrupt state changed */ + + flags = enter_critical_section(); + if (enable != enabled) + { + /* Enable or disable interrupts */ + + if (enable && g_wm8904info.handler) + { + audvdbg("Enabling\n"); + sam_pioirqenable(IRQ_INT_WM8904); + enabled = true; + } + else + { + audvdbg("Disabling\n"); + sam_pioirqdisable(IRQ_INT_WM8904); + enabled = false; + } + } + + ret = enabled; + leave_critical_section(flags); + return ret; +} + +static int wm8904_interrupt(int irq, FAR void *context) +{ + /* Just forward the interrupt to the WM8904 driver */ + + audvdbg("handler %p\n", g_wm8904info.handler); + if (g_wm8904info.handler) + { + return g_wm8904info.handler(&g_wm8904info.lower, g_wm8904info.arg); + } + + /* We got an interrupt with no handler. This should not + * happen. + */ + + sam_pioirqdisable(IRQ_INT_WM8904); + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_wm8904_initialize + * + * Description: + * This function is called by platform-specific, setup logic to configure + * and register the WM8904 device. This function will register the driver + * as /dev/wm8904[x] where x is determined by the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int sam_wm8904_initialize(int minor) +{ + FAR struct audio_lowerhalf_s *wm8904; + FAR struct audio_lowerhalf_s *pcm; + FAR struct i2c_master_s *i2c; + FAR struct i2s_dev_s *i2s; + static bool initialized = false; + char devname[12]; + int ret; + + auddbg("minor %d\n", minor); + DEBUGASSERT(minor >= 0 && minor <= 25); + + /* Have we already initialized? Since we never uninitialize we must prevent + * multiple initializations. This is necessary, for example, when the + * touchscreen example is used as a built-in application in NSH and can be + * called numerous time. It will attempt to initialize each time. + */ + + if (!initialized) + { + /* Configure the WM8904 interrupt pin */ + + (void)sam_configpio(PIO_INT_WM8904); + + /* Get an instance of the I2C interface for the WM8904 chip select */ + + i2c = sam_i2cbus_initialize(WM8904_TWI_BUS); + if (!i2c) + { + auddbg("Failed to initialize TWI%d\n", WM8904_TWI_BUS); + ret = -ENODEV; + goto errout; + } + + /* Get an instance of the I2S interface for the WM8904 data channel */ + + i2s = sam_ssc_initialize(WM8904_SSC_BUS); + if (!i2s) + { + auddbg("Failed to initialize SSC%d\n", WM8904_SSC_BUS); + ret = -ENODEV; + goto errout_with_i2c; + } + + /* Configure the DAC master clock. This clock is provided by PCK2 (PB10) + * that is connected to the WM8904 MCLK. + */ + +#ifdef CONFIG_SAMA5D4EK_WM8904_SRCSCK + /* Drive the DAC with the slow clock (32.768 KHz). The slow clock was + * enabled in sam_boot.c if needed. + */ + + (void)sam_pck_configure(PCK2, PCKSRC_SCK, BOARD_SLOWCLK_FREQUENCY); +#else + /* Drive the DAC with the main clock (12 MHz) */ + + (void)sam_pck_configure(PCK2, PCKSRC_MAINCK, BOARD_MAINCK_FREQUENCY); +#endif + + /* Enable the DAC master clock */ + + sam_pck_enable(PCK2, true); + + /* Configure WM8904 interrupts */ + + sam_pioirq(PIO_INT_WM8904); + ret = irq_attach(IRQ_INT_WM8904, wm8904_interrupt); + if (ret < 0) + { + auddbg("ERROR: Failed to attach WM8904 interrupt: %d\n", ret); + goto errout_with_i2s; + } + + /* Now we can use these I2C and I2S interfaces to initialize the + * MW8904 which will return an audio interface. + */ + + wm8904 = wm8904_initialize(i2c, i2s, &g_wm8904info.lower); + if (!wm8904) + { + auddbg("Failed to initialize the WM8904\n"); + ret = -ENODEV; + goto errout_with_irq; + } + + /* No we can embed the WM8904/I2C/I2S conglomerate into a PCM decoder + * instance so that we will have a PCM front end for the the WM8904 + * driver. + */ + + pcm = pcm_decode_initialize(wm8904); + if (!pcm) + { + auddbg("ERROR: Failed create the PCM decoder\n"); + ret = -ENODEV; + goto errout_with_wm8904; + } + + /* Create a device name */ + + snprintf(devname, 12, "pcm%d", minor); + + /* Finally, we can register the PCM/WM8904/I2C/I2S audio device. + * + * Is anyone young enough to remember Rube Goldberg? + */ + + ret = audio_register(devname, pcm); + if (ret < 0) + { + auddbg("ERROR: Failed to register /dev/%s device: %d\n", devname, ret); + goto errout_with_pcm; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; + + /* Error exits. Unfortunately there is no mechanism in place now to + * recover resources from most errors on initialization failures. + */ + +errout_with_pcm: +errout_with_wm8904: +errout_with_irq: + irq_detach(IRQ_INT_WM8904); +errout_with_i2s: +errout_with_i2c: +errout: + return ret; +} + +#endif /* HAVE_WM8904 */ diff --git a/configs/sama5d4-ek/src/sama5d4-ek.h b/configs/sama5d4-ek/src/sama5d4-ek.h new file mode 100644 index 0000000000000000000000000000000000000000..de3dac7cb9daa06cbd5397af01edca79132cb164 --- /dev/null +++ b/configs/sama5d4-ek/src/sama5d4-ek.h @@ -0,0 +1,1150 @@ +/************************************************************************************ + * configs/sama5d4-ek/src/sama5d4-ek.h + * + * Copyright (C) 2014-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMA5D4_EK_SRC_SAMA5D4_EK_H +#define __CONFIGS_SAMA5D4_EK_SRC_SAMA5D4_EK_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include +#include + +#include +#include + +#include "chip/sam_pinmap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ************************************************************/ + +#define HAVE_HSMCI 1 +#define HAVE_AT25 1 +#define HAVE_NAND 1 +#define HAVE_AUTOMOUNTER 1 +#define HAVE_USBHOST 1 +#define HAVE_USBDEV 1 +#define HAVE_USBOVCUR 1 +#define HAVE_USBMONITOR 1 +#define HAVE_NETWORK 1 +#define HAVE_MAXTOUCH 1 +#define HAVE_WM8904 1 +#define HAVE_AUDIO_NULL 1 +#define HAVE_PMIC 1 +#define HAVE_ELF 1 +#define HAVE_ROMFS 1 +#define HAVE_I2CTOOL 1 + +/* HSMCI */ +/* Can't support MMC/SD if the card interface(s) are not enable */ + +#if !defined(CONFIG_SAMA5_HSMCI0) && !defined(CONFIG_SAMA5_HSMCI1) +# undef HAVE_HSMCI +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(HAVE_HSMCI) && defined(CONFIG_DISABLE_MOUNTPOINT) +# warning Mountpoints disabled. No MMC/SD support +# undef HAVE_HSMCI +#endif + +/* We need PIO interrupts on PIOE to support card detect interrupts */ + +#if defined(HAVE_HSMCI) && !defined(CONFIG_SAMA5_PIOE_IRQ) +# warning PIOE interrupts not enabled. No MMC/SD support. +# undef HAVE_HSMCI +#endif + +/* NAND FLASH */ +/* Can't support the NAND device if NAND flash is not configured on EBI CS3 */ + +#ifndef CONFIG_SAMA5_EBICS3_NAND +# undef HAVE_NAND +#endif + +/* Can't support NAND features if mountpoints are disabled or if we were not + * asked to mount the NAND part + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_SAMA5D4EK_NAND_BLOCKMOUNT) +# undef HAVE_NAND +#endif + +/* Can't support NAND if the MTD feature is not enabled */ + +#if !defined(CONFIG_MTD) || !defined(CONFIG_MTD_NAND) +# undef HAVE_NAND +#endif + +/* If we are going to mount the NAND, then they user must also have told + * us what to do with it by setting one of CONFIG_SAMA5D4EK_NAND_FTL or + * CONFIG_SAMA5D4EK_NAND_NXFFS. + */ + +#ifndef CONFIG_MTD +# undef CONFIG_SAMA5D4EK_NAND_NXFFS +# undef CONFIG_SAMA5D4EK_NAND_FTL +#endif + +#if !defined(CONFIG_FS_NXFFS) || !defined(CONFIG_NXFFS_NAND) +# undef CONFIG_SAMA5D4EK_NAND_NXFFS +#endif + +#if !defined(CONFIG_SAMA5D4EK_NAND_FTL) && !defined(CONFIG_SAMA5D4EK_NAND_NXFFS) +# undef HAVE_NAND +#endif + +#if defined(CONFIG_SAMA5D4EK_NAND_FTL) && defined(CONFIG_SAMA5D4EK_NAND_NXFFS) +# warning Both CONFIG_SAMA5D4EK_NAND_FTL and CONFIG_SAMA5D4EK_NAND_NXFFS are set +# warning Ignoring CONFIG_SAMA5D4EK_NAND_NXFFS +# undef CONFIG_SAMA5D4EK_NAND_NXFFS +#endif + +/* AT25 Serial FLASH */ +/* Can't support the AT25 device if it SPI0 or AT25 support are not enabled */ + +#if !defined(CONFIG_SAMA5_SPI0) || !defined(CONFIG_MTD_AT25) +# undef HAVE_AT25 +#endif + +/* Can't support AT25 features if mountpoints are disabled or if we were not + * asked to mount the AT25 part + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_SAMA5D4EK_AT25_BLOCKMOUNT) +# undef HAVE_AT25 +#endif + +/* If we are going to mount the AT25, then they user must also have told + * us what to do with it by setting one of these. + */ + +#ifndef CONFIG_FS_NXFFS +# undef CONFIG_SAMA5D4EK_AT25_NXFFS +#endif + +#if !defined(CONFIG_SAMA5D4EK_AT25_FTL) && !defined(CONFIG_SAMA5D4EK_AT25_CHARDEV) && \ + !defined(CONFIG_SAMA5D4EK_AT25_NXFFS) +# undef HAVE_AT25 +#endif + +#if defined(CONFIG_SAMA5D4EK_AT25_FTL) && defined(CONFIG_SAMA5D4EK_AT25_CHARDEV) +# warning Both CONFIG_SAMA5D4EK_AT25_CHARDEV and CONFIG_SAMA5D4EK_AT25_FTL are set +# warning Ignoring CONFIG_SAMA5D4EK_AT25_FTL +# undef CONFIG_SAMA5D4EK_AT25_FTL +#endif + +#if defined(CONFIG_SAMA5D4EK_AT25_FTL) && defined(CONFIG_SAMA5D4EK_AT25_NXFFS) +# warning Both CONFIG_SAMA5D4EK_AT25_FTL and CONFIG_SAMA5D4EK_AT25_NXFFS are set +# warning Ignoring CONFIG_SAMA5D4EK_AT25_NXFFS +# undef CONFIG_SAMA5D4EK_AT25_NXFFS +#endif + +#if defined(CONFIG_SAMA5D4EK_AT25_CHARDEV) && defined(CONFIG_SAMA5D4EK_AT25_NXFFS) +# warning Both CONFIG_SAMA5D4EK_AT25_CHARDEV and CONFIG_SAMA5D4EK_AT25_NXFFS are set +# warning Ignoring CONFIG_SAMA5D4EK_AT25_NXFFS +# undef CONFIG_SAMA5D4EK_AT25_NXFFS +#endif + +/* Assign minor device numbers. For example, if we also use MINOR number 0 + * for the AT25, it should appear as /dev/mtdblock0 + */ + +#define _NAND_MINOR 0 + +#ifdef HAVE_NAND +# define NAND_MINOR _NAND_MINOR +# define _AT25_MINOR (_NAND_MINOR+1) +#else +# define _AT25_MINOR _NAND_MINOR +#endif + +#ifdef HAVE_AT25 +# define AT25_MINOR _AT25_MINOR +#endif + +/* MMC/SD minor numbers: The NSH device minor extended is extended to support + * two devices. If CONFIG_NSH_MMCSDMINOR is zero, these will be: /dev/mmcsd0 + * and /dev/mmcsd1. + */ + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +#ifdef HAVE_HSMCI + +# define HSMCI0_SLOTNO 0 +# define HSMCI1_SLOTNO 1 + +# ifdef CONFIG_SAMA5_HSMCI0 +# define HSMCI0_MINOR CONFIG_NSH_MMCSDMINOR +# define HSMCI1_MINOR (CONFIG_NSH_MMCSDMINOR+1) +# else +# define HSMCI1_MINOR CONFIG_NSH_MMCSDMINOR +# endif +#else +#endif + +/* Automounter. Currently only works with HSMCI. */ + +#if !defined(CONFIG_FS_AUTOMOUNTER) || !defined(HAVE_HSMCI) +# undef HAVE_AUTOMOUNTER +#endif + +#ifndef CONFIG_SAMA5_HSMCI0 +# undef CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT +#endif + +#ifndef CONFIG_SAMA5_HSMCI1 +# undef CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT +#endif + +#if !defined(CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT) && \ + !defined(CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT) +# undef HAVE_AUTOMOUNTER +#endif + +#ifdef HAVE_AUTOMOUNTER +# ifdef CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT + /* HSMCI0 Automounter defaults */ + +# ifndef CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_FSTYPE +# define CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_FSTYPE "vfat" +# endif + +# ifndef CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_BLKDEV +# define CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_BLKDEV "/dev/mmcds0" +# endif + +# ifndef CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_MOUNTPOINT +# define CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_MOUNTPOINT "/mnt/sdcard0" +# endif + +# ifndef CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_DDELAY +# define CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_DDELAY 1000 +# endif + +# ifndef CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_UDELAY +# define CONFIG_SAMA5D4EK_HSMCI0_AUTOMOUNT_UDELAY 2000 +# endif +# endif + +# ifdef CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT + /* HSMCI1 Automounter defaults */ + +# ifndef CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_FSTYPE +# define CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_FSTYPE "vfat" +# endif + +# ifndef CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_BLKDEV +# define CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_BLKDEV "/dev/mmcds0" +# endif + +# ifndef CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_MOUNTPOINT +# define CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_MOUNTPOINT "/mnt/sdcard0" +# endif + +# ifndef CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_DDELAY +# define CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_DDELAY 1000 +# endif + +# ifndef CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_UDELAY +# define CONFIG_SAMA5D4EK_HSMCI1_AUTOMOUNT_UDELAY 2000 +# endif +# endif +#endif + +/* USB Host / USB Device */ +/* Either CONFIG_SAMA5_UHPHS or CONFIG_SAMA5_UDPHS must be defined, or there is + * no USB of any kind. + */ + +#if !defined(CONFIG_SAMA5_UHPHS) +# undef CONFIG_SAMA5_OHCI +# undef CONFIG_SAMA5_EHCI +#endif + +#if !defined(CONFIG_SAMA5_UDPHS) +# undef HAVE_USBDEV +#endif + +/* CONFIG_USBDEV and CONFIG_USBHOST must also be defined */ + +#if !defined(CONFIG_USBDEV) +# undef HAVE_USBDEV +#endif + +#if defined(CONFIG_USBHOST) +# if !defined(CONFIG_SAMA5_OHCI) && !defined(CONFIG_SAMA5_EHCI) +# warning CONFIG_USBHOST is defined, but neither CONFIG_SAMA5_OHCI nor CONFIG_SAMA5_EHCI are defined +# endif +#else +# undef CONFIG_SAMA5_OHCI +# undef CONFIG_SAMA5_EHCI +#endif + +#if !defined(CONFIG_SAMA5_OHCI) && !defined(CONFIG_SAMA5_EHCI) +# undef HAVE_USBHOST +#endif + +#if defined(HAVE_USBHOST) && !defined(CONFIG_SAMA5_UHPHS_RHPORT1) && \ + !defined(CONFIG_SAMA5_UHPHS_RHPORT2) && !defined(CONFIG_SAMA5_UHPHS_RHPORT3) +# undef HAVE_USBHOST +# warning No ports defined for USB host +#endif + +#ifndef HAVE_USBHOST +# undef CONFIG_SAMA5_UHPHS_RHPORT1 +# undef CONFIG_SAMA5_UHPHS_RHPORT2 +# undef CONFIG_SAMA5_UHPHS_RHPORT3 +#endif + +/* No overcurrent support if no USB host or no interrupts of PIOD */ + +#if !defined(HAVE_USBHOST) +# undef HAVE_USBOVCUR +#endif + +#if defined(HAVE_USBHOST) && !defined(CONFIG_SAMA5_PIOE_IRQ) +# undef HAVE_USBOVCUR +# warning CONFIG_SAMA5_PIOE_IRQ need for USB host overcurrent support +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#ifndef CONFIG_SYSTEM_USBMONITOR +# undef HAVE_USBMONITOR +#endif + +#ifndef HAVE_USBDEV +# undef CONFIG_USBDEV_TRACE +#endif + +#ifndef HAVE_USBHOST +# undef CONFIG_USBHOST_TRACE +#endif + +#if !defined(CONFIG_USBDEV_TRACE) && !defined(CONFIG_USBHOST_TRACE) +# undef HAVE_USBMONITOR +#endif + +/* Networking */ + +#if !defined(CONFIG_NET) || !defined(CONFIG_SAMA5_EMACB) +# undef HAVE_NETWORK +#endif + +/* maXTouch controller */ + +#ifndef CONFIG_INPUT_MXT +# undef HAVE_MAXTOUCH +#endif + +#ifdef HAVE_MAXTOUCH +# ifndef CONFIG_SAMA5_TWI0 +# warning CONFIG_SAMA5_TWI0 is required for touchscreen support +# undef HAVE_MAXTOUCH +# endif + +# ifndef CONFIG_SAMA5_PIOE_IRQ +# warning PIOE interrupts not enabled. No touchsreen support. +# undef HAVE_MAXTOUCH +# endif +#endif + +/* Audio */ +/* PCM/WM8904 driver */ + +#ifndef CONFIG_AUDIO_WM8904 +# undef HAVE_WM8904 +#endif + +#ifdef HAVE_WM8904 +# ifdef CONFIG_SAMA5D4_MB_REVC +# warning WM8904 should not be used with the Rev C. board +# endif + +# ifndef CONFIG_SAMA5_TWI0 +# warning CONFIG_SAMA5_TWI0 is required for audio support +# undef HAVE_WM8904 +# endif + +# ifndef CONFIG_SAMA5_SSC0 +# warning CONFIG_SAMA5_SSC0 is required for audio support +# undef HAVE_WM8904 +# endif + +# if !defined(CONFIG_SAMA5_PIOE_IRQ) +# warning CONFIG_SAMA5_PIOE_IRQ is required for audio support +# undef HAVE_WM8904 +# endif + +# ifndef CONFIG_AUDIO_FORMAT_PCM +# warning CONFIG_AUDIO_FORMAT_PCM is required for audio support +# undef HAVE_WM8904 +# endif + +# ifndef CONFIG_SAMA5D4EK_WM8904_I2CFREQUENCY +# warning Defaulting to maximum WM8904 I2C frequency +# define CONFIG_SAMA5D4EK_WM8904_I2CFREQUENCY 400000 +# endif + +# if CONFIG_SAMA5D4EK_WM8904_I2CFREQUENCY > 400000 +# warning WM8904 I2C frequency cannot exceed 400KHz +# undef CONFIG_SAMA5D4EK_WM8904_I2CFREQUENCY +# define CONFIG_SAMA5D4EK_WM8904_I2CFREQUENCY 400000 +# endif +#endif + +/* PCM/null driver */ + +#ifndef CONFIG_AUDIO_NULL +# undef HAVE_AUDIO_NULL +#endif + +#ifdef HAVE_WM8904 +# undef HAVE_AUDIO_NULL +#endif + +#ifdef HAVE_AUDIO_NULL +# ifndef CONFIG_AUDIO_FORMAT_PCM +# warning CONFIG_AUDIO_FORMAT_PCM is required for audio support +# undef HAVE_AUDIO_NULL +# endif +#endif + +/* PMIC */ + +#if !defined(CONFIG_SAMA5_TWI0) || !defined(CONFIG_SAMA5D4_MB_REVC) +# undef HAVE_PMIC +#endif + +#ifndef CONFIG_EXPERIMENTAL +# undef HAVE_PMIC /* REVISIT: Disable anyway because it does not yet work */ +#endif + +/* ELF */ + +#if defined(CONFIG_BINFMT_DISABLE) || !defined(CONFIG_ELF) +# undef HAVE_ELF +#endif + +/* ROMFS */ + +#ifndef CONFIG_FS_ROMFS +# undef HAVE_ROMFS +#endif + +#ifndef CONFIG_SAMA5D4EK_ROMFS_MOUNT +# undef HAVE_ROMFS +#endif + +/* Do we need to register I2C drivers on behalf of the I2C tool? */ + +#if !defined(CONFIG_SYSTEM_I2CTOOL) || !defined(CONFIG_I2C_DRIVER) +# undef HAVE_I2CTOOL +#endif + +/* procfs File System */ + +#ifdef CONFIG_FS_PROCFS +# ifdef CONFIG_NSH_PROC_MOUNTPOINT +# define SAMA5_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT +# else +# define SAMA5_PROCFS_MOUNTPOINT "/proc" +# endif +#endif + +/* LEDs *****************************************************************************/ +/* There are 3 LEDs on the SAMA5D4-EK: + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D4 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PE28/NWAIT/RTS4/A19 1Wire_PE28 1-WIRE ROM, LCD, D8 (green) + * PE8/A8/TCLK3/PWML3 LED_USER_PE8 LED_USER (D10) + * PE9/A9/TIOA2 LED_POWER_PE9 LED_POWER (D9, Red) + * ------------------------------ ------------------- ------------------------- + * + * - D8: D8 is shared with other functions and cannot be used if the 1-Wire ROM + * is used. I am not sure of the LCD function, but the LED may not be available + * if the LCD is used either. We will avoid using D8 just for simplicity. + * - D10: Nothing special here. A low output illuminates. + * - D9: The Power ON LED. Connects to the via an IRLML2502 MOSFET. This LED will + * be on when power is applied but otherwise; a low output value will turn it + * off. + */ + +#define PIO_LED_USER (PIO_OUTPUT | PIO_CFG_PULLUP | PIO_OUTPUT_SET | \ + PIO_PORT_PIOE | PIO_PIN8) +#define PIO_LED_POWER (PIO_OUTPUT | PIO_CFG_PULLUP | PIO_OUTPUT_CLEAR | \ + PIO_PORT_PIOE | PIO_PIN9) + +/* Buttons **************************************************************************/ +/* A single button, PB_USER1 (PB2), is available on the SAMA5D4-EK: + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D4 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PE13/A13/TIOB1/PWML2 PB_USER1_PE13 PB_USER1 + * ------------------------------ ------------------- ------------------------- + * + * Closing JP2 will bring PE13 to ground so 1) PE13 should have a weak pull-up, + * and 2) when PB2 is pressed, a low value will be senses. + */ + +#define PIO_BTN_USER (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOE | PIO_PIN13) +#define IRQ_BTN_USER SAM_IRQ_PE13 + +/* TM7000 LCD/Touchscreen ***********************************************************/ +/* The TM7000 LCD is available for the SAMA5D4-EK. See documentation + * available on the Precision Design Associates website: + * http://www.pdaatl.com/doc/tm7000.pdf + * + * The TM7000 features an touchscreen controol + * + * - 7 inch LCD at 800x480 18-bit RGB resolution and white backlight + * - Projected Capacitive Multi-Touch Controller based on the Atmel + * MXT768E maXTouch™ IC + * - 4 Capacitive “Navigation” Keys available via an Atmel AT42QT1070 + * QTouch™ Button Sensor IC + * - 200 bytes of non-volatile serial EEPROM + * + * Both the MXT768E and the AT42QT1070 are I2C devices with interrupting + * PIO pins: + * + * ------------------------ ----------------- + * SAMA5D4-EK TM7000 + * ------------------------ ----------------- + * J9 pin 5 LCD_PE24 J4 pin 5 ~CHG_mxt + * J9 pin 6 LCD_PE25 J4 pin 6 ~CHG_QT + * J9 pin 7 LCD_TWCK0_PA31 J4 pin 7 SCL_0 + * J9 pin 8 LCD_TWD0_PA30 J4 pin 8 SDA_0 + * ------------------------ ----------------- + * + * The schematic indicates the the MXT468E address is 0x4c/0x4d. + */ + +#define PIO_CHG_MXT (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_FALLING | PIO_PORT_PIOE | PIO_PIN24) +#define IRQ_CHG_MXT SAM_IRQ_PE24 + +#define PIO_CHG_QT (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_FALLING | PIO_PORT_PIOE | PIO_PIN25) +#define IRQ_CHG_QT SAM_IRQ_PE25 + +/* The touchscreen communicates on TWI0, I2C address 0x4c */ + +#define MXT_TWI_BUS 0 +#define MXT_I2C_ADDRESS 0x4c + +/* HSMCI Card Slots *****************************************************************/ +/* The SAMA5D4-EK provides a two SD memory card slots: (1) a full size SD + * card slot (J10), and (2) a microSD memory card slot (J11). + * + * The full size SD card slot connects via HSMCI0. The card detect discrete + * is available on PE5 (pulled high). The write protect discrete is tied to + * ground and is not available to software. The slot supports 8-bit wide + * transfer mode, but the NuttX driver currently uses only the 4-bit wide + * transfer mode + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D4 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PC4/SPI0_NPCS1/MCI0_CK/PCK1 PC4 MCI0_CK, ISI_MCK, EXP + * PC5/D0/MCI0_CDA PC5 MCI0_CDA, NAND_IO0 + * PC6/D1/MCI0_DA0 PC6 MCI0_DA0, NAND_IO1 + * PC7/D2/MCI0_DA1 PC7 MCI0_DA1, NAND_IO2 + * PC8/D3/MCI0_DA2 PC8 MCI0_DA2, NAND_IO3 + * PC9/D4/MCI0_DA3 PC9 MCI0_DA3, NAND_IO4 + * PC10/D5/MCI0_DA4 PC10 MCI0_DA4, NAND_IO5 + * PC11/D6/MCI0_DA5 PC11 MCI0_DA5, NAND_IO6 + * PC12/D7/MCI0_DA6 PC12 MCI0_DA6, NAND_IO7 + * PC13/NRD/NANDOE/MCI0_DA7 PC13 MCI0_DA7, NAND_RE + * PE5/A5/CTS3 MCI0_CD_PE5 MCI0_CD + * ------------------------------ ------------------- ------------------------- + */ + +#define PIO_MCI0_CD (PIO_INPUT | PIO_CFG_DEFAULT | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOE | PIO_PIN5) +#define IRQ_MCI0_CD SAM_IRQ_PE5 + +/* The microSD connects vi HSMCI1. The card detect discrete is available on + * PE6 (pulled high) NOTE that PE15 must be controlled to provide power + * to the HSMCI1 slot (the HSMCI0 slot is always powered). + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D4 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PE14/A14/TCLK1/PWMH3 MCI1_CD_PE14 MCI1_CD ??? + * PE15/A15/SCK3/TIOA0 MCI1_PWR_PE15 MCI1_PWR + * PE18/A18/TIOA5/MCI1_CK PE18 MCI1_CK, EXP + * PE19/A19/TIOB5/MCI1_CDA PE19 MCI1_CDA, EXP + * PE20/A20/TCLK5/MCI1_DA0 PE20 MCI1_DA0, EXP + * PE21/A23/TIOA4/MCI1_DA1 PE21 MCI1_DA1, EXP + * PE22/A24/TIOB4/MCI1_DA2 PE22 MCI1_DA2, EXP + * PE23/A25/TCLK4/MCI1_DA3 PE23 MCI1_DA3, EXP + * PE6/A6/TIOA3 MCI1_CD_PE6 MCI1_CD + * ------------------------------ ------------------- ------------------------- + */ + +#define PIO_MCI1_CD (PIO_INPUT | PIO_CFG_DEFAULT | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOE | PIO_PIN6) +#define IRQ_MCI1_CD SAM_IRQ_PE6 + +#define IRQ_MCI1_PWR (PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_SET | \ + PIO_PORT_PIOE | PIO_PIN15) + +/* USB Ports ************************************************************************/ +/* The SAMA5D4-EK features three USB communication ports: + * + * * Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed with + * USB Device High Speed Micro AB connector, J1 + * + * * Port B Host High Speed (EHCI) and Full Speed (OHCI) standard type A + * connector, J5 upper port + * + * * Port C Host Full Speed (OHCI) and Full Speed (OHCI) standard type A + * connector, J5 lower port + * + * The three USB host ports are equipped with 500-mA high-side power + * switch for self-powered and bus-powered applications. + * + * The USB device port A (J5) features a VBUS insert detection function. + * + * Port A + * ------ + * + * PIO Signal Name Function + * ---- -------------- ------------------------------------------------------- + * PE10 USBA_EN5V_PE10 VBus power enable (via MN2 power switch) to VBus pin of + * the OTG connector (host) + * PE31 USBA_VBUS_PE31 VBus sensing from the VBus pin of the OTG connector (device) + */ + +#ifdef CONFIG_SAMA5_UHPHS_RHPORT1 + #define PIO_USBA_VBUS_ENABLE \ + (PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_CLEAR | \ + PIO_PORT_PIOE | PIO_PIN10) +#endif + +#ifdef HAVE_USBDEV +# define PIO_USBA_VBUS_SENSE \ + (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOE | PIO_PIN31) +# define IRQ_USBA_VBUS_SENSE \ + SAM_IRQ_PE31 +#endif + +/* Port B + * ------ + * + * PIO Signal Name Function + * ---- -------------- ------------------------------------------------------- + * PE11 USBB_EN5V_PE11 VBus power enable (via MN4 power switch). To the A1 + * pin of J5 Dual USB A connector + */ + +#ifdef CONFIG_SAMA5_UHPHS_RHPORT2 +# define PIO_USBB_VBUS_ENABLE \ + (PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_CLEAR | \ + PIO_PORT_PIOE | PIO_PIN11) +#endif + +/* Port C + * ------ + * + * PIO Signal Name Function + * ---- -------------- ------------------------------------------------------- + * PE12 USBC_EN5V_PE12 VBus power enable (via MN4 power switch). To the B1 + * pin of J5 Dual USB A connector + */ + +#ifdef CONFIG_SAMA5_UHPHS_RHPORT3 +# define PIO_USBC_VBUS_ENABLE \ + (PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_CLEAR | \ + PIO_PORT_PIOE | PIO_PIN12) +#endif + +/* Both Ports B and C + * ------------------ + * + * PIO Signal Name Function + * ---- ------------- ------------------------------------------------------- + * PD9 USB_OVCUR_PD9 Combined over-current indication from port A and B + */ + +#ifdef HAVE_USBOVCUR +# define PIO_USBBC_VBUS_OVERCURRENT \ + (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_BOTHEDGES | PIO_PORT_PIOD | PIO_PIN9) +# define IRQ_USBBC_VBUS_OVERCURRENT \ + SAM_IRQ_PD9 +#endif + +/* Ethernet */ + +#ifdef CONFIG_SAMA5_EMACB +/* ETH0/1: Ethernet 10/100 (EMAC) Ports + * + * Networking support via the can be added to NSH by selecting the following + * configuration options. The SAMA5D44 supports two different 10/100Base-T + * Ethernet MAC peripherals. + * + * ------------------------------ ------------------- ------------------------- + * SAMA5D4 PIO SIGNAL USAGE + * ------------------------------ ------------------- ------------------------- + * PB0/G0_TXCK PB0 G0_TXCK, EXP + * PB1/G0_RXCK/SCK2/ISI_PCK ISI_PCK_PB1 ISI_PCK + * PB2/G0_TXEN PB2 G0_TXEN,EXP + * PB3/G0_TXER/CTS2/ISI_VSYNC ISI_VSYNC_PB3 ISI_VSYNC + * PB4/G0_CRS/RXD2/ISI_HSYNC ISI_HSYNC_PB4 ISI_HSYNC + * PB5/G0_COL/TXD2/PCK2 ISI_PWD_PB5 ISI_PWD + * PB6/G0_RXDV PB6 G0_RXDV, EXP + * PB7/G0_RXER PB7 G0_RXER, EXP + * PB8/G0_RX0 PB8 G0_RX0, EXP + * PB9/G0_RX1 PB9 G0_RX1, EXP + * PB10/G0_RX2/PCK2/PWML1 PB10 AUDIO_PCK2, EXP + * PB11/G0_RX3/RTS2/PWMH1 ISI_RST_PB11 ISI_RST + * PB12/G0_TX0 PB12 G0_TX0, EXP + * PB13/G0_TX1 PB13 G0_TX1, EXP + * PB14/G0_TX2/SPI2_NPCS1/PWMH0 ZIG_SPI2_NPCS1 ZIG_SPI2_NPCS1 + * PB15/G0_TX3/SPI2_NPCS2/PWML0 HDMI_RST_PB15 HDMI_RST + * PB16/G0_MDC PB16 G0_MDC, EXP + * PB17/G0_MDIO PB17 G0_MDIO, EXP + * PE1/A1/MCI0_DB0 G0_IRQ_PE1 G0_IRQ + * ------------------------------ ------------------- ------------------------- + * PA2/LCDDAT2/G1_TXCK PA LCDDAT2, G1_TXCK + * PA3/LCDDAT3/G1_RXCK PA3 LCDDAT3 + * PA4/LCDDAT4/G1_TXEN PA4 LCDDAT4, G1_TXEN + * PA5/LCDDAT5/G1_TXER PA5 LCDDAT5 + * PA6/LCDDAT6/G1_CRS PA6 LCDDAT6 + * PA9/LCDDAT9/G1_COL PA9 LCDDAT9 + * PA10/LCDDAT10/G1_RXDV PA10 LCDDAT10, G1_RXDV + * PA11/LCDDAT11/G1_RXER PA11 LCDDAT11, G1_RXER + * PA12/LCDDAT12/G1_RX0 PA12 LCDDAT12, G1_RX0 + * PA13/LCDDAT13/G1_RX1 PA13 LCDDAT13, G1_RX1 + * PA14/LCDDAT14/G1_TX0 PA14 LCDDAT14, G1_TX0 + * PA15/LCDDAT15/G1_TX1 PA15 LCDDAT15, G1_TX1 + * PA18/LCDDAT18/G1_RX2 PA18 LCDDAT18 + * PA19/LCDDAT19/G1_RX3 PA19 LCDDAT19 + * PA20/LCDDAT20/G1_TX2 PA20 LCDDAT20 + * PA21/LCDDAT21/G1_TX3 PA21 LCDDAT21 + * PA22/LCDDAT22/G1_MDC PA22 LCDDAT22, G1_MDC + * PA23/LCDDAT23/G1_MDIO PA23 LCDDAT23, G1_MDIO + * PE2/A2/MCI0_DB1 G1_IRQ_PE2 G1_IRQ + * ------------------------------ ------------------- ------------------------- + * + * EMAC2 connects (directly) to a KSZ8081RNB PHY (U10) and is available at + * the ETH0 connector. + * + * EMAC1 connects (indirectly) to another KSZ8081RNB PHY (U7) and is available + * at the ETH1 connector. The ETH1 signals go through a line driver that is + * enabled via LCD_ETH1_CONFIG when an LCD is detected: + * + * - LCD_ETH1_CONFIG = 0: LCD 5v disable + * - LCD_ETH1_CONFIG = 1 & LCD_DETECT# =0: LCD 5v enable. + * + * The sense of KSZ8081 interrupt is configurable but is, by default, active + * low. + */ + +#ifdef CONFIG_SAMA5_EMAC0 +# define PIO_INT_ETH0 (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_FALLING | PIO_PORT_PIOE | PIO_PIN1) +# define IRQ_INT_ETH0 SAM_IRQ_PE1 +#endif + +#ifdef CONFIG_SAMA5_EMAC1 +# define PIO_INT_ETH1 (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \ + PIO_INT_FALLING | PIO_PORT_PIOE | PIO_PIN2) +# define IRQ_INT_ETH1 SAM_IRQ_PE2 +#endif +#endif + +/* WM8904 Audio Codec ***************************************************************/ +/* SAMA5D4 Interface + * ---- ------------------ ---------------- ---------- ------------------------------ + * PIO USAGE BOARD SIGNAL WM8904 PIN NOTE + * ---- ------------------ ---------------- ---------- ------------------------------ + * PA30 TWD0 AUDIO_TWD0_PA30 SDA Pulled up, See J23 note below + * PA31 TWCK0 AUDIO_TWCK0_PA31 SCLK Pulled up + * PB10 AUDIO_PCK2/EXP AUDIO_PCK2_PB10 MCLK + * PB27 AUDIO/HDMI_TK0/EXP AUDIO_TK0_PB27 BCLK/GPIO4 TK0/RK0 are mutually exclusive + * PB26 AUDIO_RK0 AUDIO_RK0_PB26 " "/" " " "/" " " " " " " " + * PB30 AUDIO_RF/ZIG_TWCK2 AUDIO_RF0_PB30 LRCLK TF0/RF0 are mutually exclusive + * PB31 AUDIO/HDMI_TF0/EXP AUDIO_TF0_PB31 " " " "/" " " " " " " " + * PB29 AUDIO_RD0/ZIG_TWD2 AUDIO_RD0_PB29 ADCDAT + * PB28 AUDIO/HDMI_TD0/EXP AUDIO_TD0_PB28 ACDAT + * PE4 AUDIO_IRQ AUDIO_IRQ_PE4 IRQ/GPIO1 Audio interrupt + * ---- ------------------ ---------------- ---------- ------------------------------ + * Note that jumper J23 must be closed to connect AUDIO_TWD0_PA30 + */ + +/* Pin Disambiguation */ + +#define PIO_SSC0_TD PIO_SSC0_TD_2 + +/* Audio Interrupt. All interrupts are default, active high level. Pull down + * internally in the WM8904. So we want no pull-up/downs and we want to + * interrupt on the high level. + */ + +#define PIO_INT_WM8904 (PIO_INPUT | PIO_CFG_DEFAULT | PIO_CFG_DEGLITCH | \ + PIO_INT_HIGHLEVEL | PIO_PORT_PIOE | PIO_PIN4) +#define IRQ_INT_WM8904 SAM_IRQ_PE4 + +/* The MW8904 communicates on TWI0, I2C address 0x1a for control operations */ + +#define WM8904_TWI_BUS 0 +#define WM8904_I2C_ADDRESS 0x1a + +/* The MW8904 transfers data on SSC0 */ + +#define WM8904_SSC_BUS 0 + +/* SPI Chip Selects *****************************************************************/ +/* The SAMA5D4-EK includes an Atmel AT25DF321A, 32-megabit, 2.7-volt SPI serial + * FLASH on board. The connection is as follows: + * + * AT25DF321A SAMA5D4-EK SAMA5 + * ---------- --------------- -------------------------------- + * SI AT25_SPI0_SI PC1 PC1/SPI0_MOSI/PWML2/ISI_D9 + * SO AT25_SPI0_SO PC0 PC0/SPI0_MISO/PWMH2/ISI_D8 + * SCK AT25_SPI0_SPCK PC2 PC2/SPI0_SPCK/PWMH3/ISI_D10 + * /CS AT25_SPI0_NCPS0 PC3 PC3/SPI0_NPCS0/PWML3/ISI_D11 + * + * AT25_SPI0_NCPS0 goes to the AT25DF321A as via a NL17SZ126 if JP6 is closed + */ + +#define PIO_AT25_NPCS0 (PIO_OUTPUT | PIO_CFG_PULLUP | PIO_OUTPUT_SET | \ + PIO_PORT_PIOC | PIO_PIN3) +#define AT25_PORT SPI0_CS0 + +/* ACT8865 power management chip ****************************************************/ +/* The PMIC communicates on TWI0, I2C address 0x5b */ + +#define PMIC_TWI_BUS 0 +#define PMIC_I2C_ADDRESS 0x5b +#define PMIC_I2C_FREQUENCY 400000 /* 400KHz max */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select PIO pins for the SAMA5D4-EK board. + * + ************************************************************************************/ + +#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1) +void weak_function sam_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: sam_sdram_config + * + * Description: + * Configures DDR2 (MT47H128M16RT 128MB or, optionally, MT47H64M16HR) + * + * Per the SAMA5D4-EK User guide: "Two SDRAM/DDR2 used as main system memory. + * MT47H128M16 - 2 Gb - 16 Meg x 16 x 8 banks, the board provides up to 2 Gb on- + * board, soldered DDR2 SDRAM. The memory bus is 32 bits wide and operates with + * up to 166 MHz." + * + * From the Atmel Code Example: + * MT47H64M16HR : 8 Meg x 16 x 8 banks + * Refresh count: 8K + * Row address: A[12:0] (8K) + * Column address A[9:0] (1K) + * Bank address BA[2:0] a(24,25) (8) + * + * This logic was taken from Atmel sample code for the SAMA5D4-EK. + * + * Input Parameters: + * None + * + * Assumptions: + * The DDR memory regions is configured as strongly ordered memory. When we + * complete initialization of SDRAM and it is ready for use, we will make DRAM + * into normal memory. + * + ************************************************************************************/ + +#if defined(CONFIG_SAMA5_DDRCS) && !defined(CONFIG_SAMA5_BOOT_SDRAM) +void sam_sdram_config(void); +#else +# define sam_sdram_config() +#endif + +/**************************************************************************** + * Name: sam_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int sam_bringup(void); + +/**************************************************************************** + * Name: sam_nand_automount + * + * Description: + * Initialize and configure the NAND on CS3 + * + ****************************************************************************/ + +#ifdef HAVE_NAND +int sam_nand_automount(int minor); +#endif + +/**************************************************************************** + * Name: sam_at25_automount + * + * Description: + * Initialize and configure the AT25 serial FLASH + * + ****************************************************************************/ + +#ifdef HAVE_AT25 +int sam_at25_automount(int minor); +#endif + +/**************************************************************************** + * Name: sam_hsmci_initialize + * + * Description: + * Initialize and configure one HSMCI slot + * + ****************************************************************************/ + +#ifdef HAVE_HSMCI +int sam_hsmci_initialize(int slotno, int minor); +#endif + +/************************************************************************************ + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_cardinserted(int slotno); +#endif + +/************************************************************************************ + * Name: sam_automount_initialize + * + * Description: + * Configure auto-mounters for each enable and so configured HSMCI + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ************************************************************************************/ + +#ifdef HAVE_AUTOMOUNTER +void sam_automount_initialize(void); +#endif + +/************************************************************************************ + * Name: sam_automount_event + * + * Description: + * The HSMCI card detection logic has detected an insertion or removal event. It + * has already scheduled the MMC/SD block driver operations. Now we need to + * schedule the auto-mount event which will occur with a substantial delay to make + * sure that everything has settle down. + * + * Input Parameters: + * slotno - Identifies the HSMCI0 slot: HSMCI0 or HSMCI1_SLOTNO. There is a + * terminology problem here: Each HSMCI supports two slots, slot A and slot B. + * Only slot A is used. So this is not a really a slot, but an HSCMI peripheral + * number. + * inserted - True if the card is inserted in the slot. False otherwise. + * + * Returned Value: + * None + * + * Assumptions: + * Interrupts are disabled. + * + ************************************************************************************/ + +#ifdef HAVE_AUTOMOUNTER +void sam_automount_event(int slotno, bool inserted); +#endif + +/************************************************************************************ + * Name: sam_writeprotected + * + * Description: + * Check if the card in the MMCSD slot is write protected + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_writeprotected(int slotno); +#endif + +/************************************************************************************ + * Name: sam_usbinitialize + * + * Description: + * Called from sam_usbinitialize very early in inialization to setup USB-related + * PIO pins for the SAMA5D4-EK board. + * + ************************************************************************************/ + +#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS) +void weak_function sam_usbinitialize(void); +#endif + +/**************************************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. This function will + * start a thread that will monitor for device connection/disconnection events. + * + ****************************************************************************************************/ + +#ifdef HAVE_USBHOST +int sam_usbhost_initialize(void); +#endif + +/************************************************************************************ + * Name: sam_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +#ifdef HAVE_NETWORK +void weak_function sam_netinitialize(void); +#endif + +/**************************************************************************** + * Name: sam_wm8904_initialize + * + * Description: + * This function is called by platform-specific, setup logic to configure + * and register the WM8904 device. This function will register the driver + * as /dev/wm8904[x] where x is determined by the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef HAVE_WM8904 +int sam_wm8904_initialize(int minor); +#endif /* HAVE_WM8904 */ + +/**************************************************************************** + * Name: sam_audio_null_initialize + * + * Description: + * Set up to use the NULL audio device for PCM unit-level testing. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef HAVE_AUDIO_NULL +int sam_audio_null_initialize(int minor); +#endif /* HAVE_AUDIO_NULL */ + +/**************************************************************************** + * Name: sam_pmic_initialize + * + * Description: + * Currently, this function only disables the PMIC. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef HAVE_PMIC +void sam_pmic_initialize(void); +#else +# define sam_pmic_initialize() +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAMA5D4_EK_SRC_SAMA5D4_EK_H */ + diff --git a/configs/samd20-xplained/Kconfig b/configs/samd20-xplained/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..591aaa21a06f922b60aa5bbb1d70bb655a9d931d --- /dev/null +++ b/configs/samd20-xplained/Kconfig @@ -0,0 +1,82 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAMD20_XPLAINED + +menu "SAMD20 Xplained Pro Modules" + +config SAMD20_XPLAINED_IOMODULE + bool "I/O1 Module" + default n + ---help--- + The I/O 1 module is attached. This module provides an MMC/SD card + slot. + +if SAMD20_XPLAINED_IOMODULE + +choice + prompt "I/O1 Module Location" + default SAMD20_XPLAINED_IOMODULE_EXT1 + +config SAMD20_XPLAINED_IOMODULE_EXT1 + bool "EXT1" + +config SAMD20_XPLAINED_IOMODULE_EXT2 + bool "EXT2" + +endchoice +endif + +config SAMD20_XPLAINED_OLED1MODULE + bool "OLED1 Module" + default n + ---help--- + The OLED 1 module is attached. This module provides an OLED plus 3 + additional switches and 3 additional LEDs. + +if SAMD20_XPLAINED_OLED1MODULE + +choice + prompt "OLED1 Module Location" + default SAMD20_XPLAINED_OLED1MODULE_EXT1 + +config SAMD20_XPLAINED_OLED1MODULE_EXT1 + bool "EXT1" + +config SAMD20_XPLAINED_OLED1MODULE_EXT2 + bool "EXT2" + +endchoice +endif +endmenu + +if USART4_SERIAL_CONSOLE +choice + prompt "USART 4 Connection" + default SAMD20_XPLAINED_USART4_EXT3 + +config SAMD20_XPLAINED_USART4_EXT1 + bool "EXT1" + depends on !SAMD20_XPLAINED_OLED1MODULE_EXT1 && !SAMD20_XPLAINED_IOMODULE_EXT1 + ---help--- + Select this option if the serial console is on SERCOM4 connected via + EXT1. The RX will be on PB9 and TX signal will be on PB8. + +config SAMD20_XPLAINED_USART4_EXT2 + bool "EXT2" + depends on !SAMD20_XPLAINED_OLED1MODULE_EXT2 && !SAMD20_XPLAINED_IOMODULE_EXT2 + ---help--- + Select this option if the serial console is on SERCOM4 connected via + EXT2. The RX will be on PB13 and TX signal will be on PB12. + +config SAMD20_XPLAINED_USART4_EXT3 + bool "EXT3" + ---help--- + Select this option if the serial console is on SERCOM4 connect via + EXT3. The RX will be on PB11 and TX signal will be on PB10. + +endchoice +endif +endif diff --git a/configs/samd20-xplained/README.txt b/configs/samd20-xplained/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..f489d6b618757280f4a379736969cf7656e2ae80 --- /dev/null +++ b/configs/samd20-xplained/README.txt @@ -0,0 +1,893 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +Atmel SAMD20 Xplained Pro development board. This board features the +ATSAMD20J18A MCU. + +The SAMD20 Xplained Pro Starter Kit may be bundled with three modules: + +1) I/O1 - An MMC/SD card slot, PWM LED control, ADC light sensor, USART + loopback, TWI AT30TSE758 Temperature sensor. +2) OLED1 - An OLED plus 3 additional switches and 3 additional LEDs +3) PROTO1 - A prototyping board with logic on board (other than power-related + logic). + +Contents +======== + + - STATUS/ISSUES + - Modules + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - LEDs + - Serial Consoles + - Atmel Studio 6.1 + - SAMD20 Xplained Pro-specific Configuration Options + - Configurations + +STATUS/ISSUES +============= + + 1. The FLASH wait states is set to 2 (see include/board.h). According to + the data sheet, it should work at 1 but I sometimes see crashes when + the wait states are set to one (about half of the time) (2014-2-18). + + 2. Garbage appears on the display sometimes after a reset (maybe 20% of + the time) or after a power cycle (less after a power cycle). I don't + understand the cause of of this but most of this can be eliminated by + simply holding the the reset button longer and releasing it cleanly + (then it fails maybe 5-10% of the time, maybe because of button + chatter?) (2014-2-18). + + - The garbage is not random: It is always the same. + - This is not effected by BAUD rate. Curiously, the same garbage + appears at different BAUD settings implying that this may not even + be clock related??? + - The program seems to be running normally, just producing bad output. + + 3. SPI current hangs so not much progress has been made testing the I/O1 + module. The hang occurs because the SPI is waiting for SYNCBUSY to + be cleared after enabling the SPI. This even does not happen and so + causes the hang. + + Another note: Enabling the SPI on SERCOM0 also seems to interfere + with the USART output on SERCOM4. Both symptoms imply some clock- + related issue. + + The configuration suggests CONFIG_MMCSD_HAVECARDDETECT=y, but as of + this writing, there is no support for EIC pin interrupts. + + 4. OLED1 module is untested. These instructions were just lifted from + the SAM4L Xplained Pro README.txt file. + +Modules +======= + + The SAMD20 Xplained Pro Starter Kit is bundled with four modules: + + I/O1 + ---- + The primary function of this module is to provide SD card support, but + the full list of modules features include: + + - microSD card connector (SPI interface) + - PWM (LED control) + - ADC (light sensor) + - USART loopback + - TWI AT30TSE758 Temperature sensor with EEPROM + + SPI is available on two of the SAMD20 Xplained connectors, EXT1 and EXT2. + They mate with the I/O1 connector as indicated in this table. + + I/O1 CONNECTOR + ----------------- ---------------------- ---------------------- ------------------------------------ + I/O1 EXT1 EXT2 Other use of either pin + ----------------- ---------------------- ---------------------- ------------------------------------ + 1 ID 1 1 Communication line to ID chip on + extension board. + ----------------- ---------------------- ---------------------- ------------------------------------ + 2 GND 2 GND 2 GND + ----------------- ---------------------- ---------------------- ------------------------------------ + 3 LIGHTSENSOR 3 PB00 AIN[8] 3 PA10 AIN[18] + ----------------- ---------------------- ---------------------- ------------------------------------ + 4 LP_OUT 4 PB01 AIN[9] 4 PA11 AIN[19] + ----------------- ---------------------- ---------------------- ------------------------------------ + 5 GPIO1 5 PB06 GPIO 5 PA20 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 6 GPIO2 6 PB07 GPIO 6 PA21 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 7 LED 7 PB02 TC6/WO[0] 7 PA22 TC4/WO[0] + ----------------- ---------------------- ---------------------- ------------------------------------ + 8 LP_IN 8 PB03 TC6/WO[1] 8 PA23 TC4/WO[1] + ----------------- ---------------------- ---------------------- ------------------------------------ + 9 TEMP_ALERT 9 PB04 EXTINT[4] 9 PB14 EXTINT[14] + ----------------- ---------------------- ---------------------- ------------------------------------ + 10 microSD_DETECT 10 PB05 GPIO 10 PB15 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 11 TWI SDA 11 PA08 SERCOM2 PAD[0] 11 PA08 SERCOM2 PAD[0] EXT1, EXT2, EXT3 and EDBG + I²C SDA I²C SDA + ----------------- ---------------------- ---------------------- ------------------------------------ + 12 TWI SCL 12 PA09 SERCOM2 PAD[1] 12 PA09 SERCOM2 PAD[1] EXT2, EXT3 and EDBG + I²C SCL I²C SCL + ----------------- ---------------------- ---------------------- ------------------------------------ + 13 USART RX 13 PB09 SERCOM4 PAD[1] 13 PB13 SERCOM4 PAD[1] The SERCOM4 module is shared between + USART RX USART RX EXT1, 2 and 3 USART's, but uses + different pins + ----------------- ---------------------- ---------------------- ------------------------------------ + 14 USART TX 14 PB08 SERCOM4 PAD[0] 14 PB12 SERCOM4 PAD[0] The SERCOM4 module is shared between + USART TX USART TX EXT1, 2 and 3 USART's, but uses + different pins + ----------------- ---------------------- ---------------------- ------------------------------------ + 15 microSD_SS 15 PA05 SERCOM0 PAD[1] 15 PA17 SERCOM1 PAD[1] + SPI SS SPI SS + ----------------- ---------------------- ---------------------- ------------------------------------ + 16 SPI_MOSI 16 PA06 SERCOM0 PAD[2] 16 PA18 SERCOM1 PAD[2] + SPI MOSI SPI MOSI + ----------------- ---------------------- ---------------------- ------------------------------------ + 17 SPI_MISO 17 PA04 SERCOM0 PAD[0] 17 PA16 SERCOM1 PAD[0] + SPI MISO SPI MISO + ----------------- ---------------------- ---------------------- ------------------------------------ + 18 SPI_SCK 18 PA07 SERCOM0 PAD[3] 18 PA19 SERCOM1 PAD[3] + SPI SCK SPI SCK + ----------------- ---------------------- ---------------------- ------------------------------------ + 19 GND 19 GND GND + ----------------- ---------------------- ---------------------- ------------------------------------ + 20 VCC 20 VCC VCC + ----------------- ---------------------- ---------------------- ------------------------------------ + + The mapping between the I/O1 pins and the SD connector are shown in the + following table. + + SD Card Connection + ------------------ + I/O1 SD PIN Description + ---- ---- --- ------------------------------------------------- + D2 1 Data line 2 (not used) + 15 D3 2 Data line 3. Active low chip select, pulled high + 16 CMD 3 Command line, connected to SPI_MOSI. + 20 VDD 4 + 18 CLK 5 Clock line, connected to SPI_SCK. + 2/19 GND 6 + 17 D0 7 Data line 0, connected to SPI_MISO. + D1 8 Data line 1 (not used) + 10 SW_A 9 Card detect + 2/19 SW_B 10 GND + + Card Detect + ----------- + When a microSD card is put into the connector SW_A and SW_B are short- + circuited. SW_A is connected to the microSD_DETECT signal. To use this + as a card indicator remember to enable internal pullup in the target + device. + + GPIOs + ----- + So all that is required to connect the SD is configure the SPI + + --- ------------------ ---------------------- ------------------------------------- + PIN EXT1 EXT2 Description + --- ------------------ ---------------------- ------------------------------------- + 15 PA05 SERCOM0 PAD[1] 15 PA17 SERCOM1 PAD[1] Active low chip select OUTPUT, pulled + SPI SS SPI SS high on board. + --- ------------------ ---------------------- ------------------------------------- + 10 PB05 GPIO 10 PB15 GPIO Active low card detect INPUT, must + use internal pull-up. + --- ------------------ ---------------------- ------------------------------------- + + Configuration Options: + ---------------------- + CONFIG_SAMD20_XPLAINED_IOMODULE=y : Informs the system that the + I/O1 module is installed + CONFIG_SAMD20_XPLAINED_IOMODULE_EXT1=y : The module is installed in EXT1 + CONFIG_SAMD20_XPLAINED_IOMODULE_EXT2=y : The mdoule is installed in EXT2 + + See the set-up in the discussion of the nsh configuration below for other + required configuration options. + + NOTE: As of this writing, only the SD card slot is supported in the I/O1 + module. + + OLED1 + ----- + This module provides an OLED plus 3 additional switches and 3 additional + LEDs. + + OLED1 CONNECTOR + ----------------- ---------------------- ---------------------- ------------------------------------ + OLED1 EXT1 EXT2 Other use of either pin + ----------------- ---------------------- ---------------------- ------------------------------------ + 1 ID 1 1 Communication line to ID chip on + extension board. + ----------------- ---------------------- ---------------------- ------------------------------------ + 2 GND 2 GND 2 GND + ----------------- ---------------------- ---------------------- ------------------------------------ + 3 BUTTON2 3 PB00 AIN[8] 3 PA10 AIN[18] + ----------------- ---------------------- ---------------------- ------------------------------------ + 4 BUTTON3 4 PB01 AIN[9] 4 PA11 AIN[19] + ----------------- ---------------------- ---------------------- ------------------------------------ + 5 DATA_CMD_SEL 5 PB06 GPIO 5 PA20 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 6 LED3 6 PB07 GPIO 6 PA21 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 7 LED1 7 PB02 TC6/WO[0] 7 PA22 TC4/WO[0] + ----------------- ---------------------- ---------------------- ------------------------------------ + 8 LED2 8 PB03 TC6/WO[1] 8 PA23 TC4/WO[1] + ----------------- ---------------------- ---------------------- ------------------------------------ + 9 BUTTON1 9 PB04 EXTINT[4] 9 PB14 EXTINT[14] + ----------------- ---------------------- ---------------------- ------------------------------------ + 10 DISPLAY_RESET 10 PB05 GPIO 10 PB15 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 11 N/C 11 PA08 SERCOM2 PAD[0] 11 PA08 SERCOM2 PAD[0] EXT1, EXT2, EXT3 and EDBG + I²C SDA I²C SDA + ----------------- ---------------------- ---------------------- ------------------------------------ + 12 N/C 12 PA09 SERCOM2 PAD[1] 12 PA09 SERCOM2 PAD[1] EXT2, EXT3 and EDBG + I²C SCL I²C SCL + ----------------- ---------------------- ---------------------- ------------------------------------ + 13 N/C 13 PB09 SERCOM4 PAD[1] 13 PB13 SERCOM4 PAD[1] The SERCOM4 module is shared between + USART RX USART RX EXT1, 2 and 3 USART's, but uses + different pins + ----------------- ---------------------- ---------------------- ------------------------------------ + 14 N/C 14 PB08 SERCOM4 PAD[0] 14 PB12 SERCOM4 PAD[0] The SERCOM4 module is shared between + USART TX USART TX EXT1, 2 and 3 USART's, but uses + different pins + ----------------- ---------------------- ---------------------- ------------------------------------ + 15 DISPLAY_SS 15 PA05 SERCOM0 PAD[1] 15 PA17 SERCOM1 PAD[1] + SPI SS SPI SS + ----------------- ---------------------- ---------------------- ------------------------------------ + 16 SPI_MOSI 16 PA06 SERCOM0 PAD[2] 16 PA18 SERCOM1 PAD[2] + SPI MOSI SPI MOSI + ----------------- ---------------------- ---------------------- ------------------------------------ + 17 N/C 17 PA04 SERCOM0 PAD[0] 17 PA16 SERCOM1 PAD[0] + SPI MISO SPI MISO + ----------------- ---------------------- ---------------------- ------------------------------------ + 18 SPI_SCK 18 PA07 SERCOM0 PAD[3] 18 PA19 SERCOM1 PAD[3] + SPI SCK SPI SCK + ----------------- ---------------------- ---------------------- ------------------------------------ + 19 GND 19 GND GND + ----------------- ---------------------- ---------------------- ------------------------------------ + 20 VCC 20 VCC VCC + ----------------- ---------------------- ---------------------- ------------------------------------ + + Configuration Options: + ---------------------- + CONFIG_SAMD20_XPLAINED_OLED1MODULE=y : Informs the system that the + I/O1 module is installed + CONFIG_SAMD20_XPLAINED_OLED1MODULE_EXT1=y : The module is installed in EXT1 + CONFIG_SAMD20_XPLAINED_OLED1MODULE_EXT2=y : The mdoule is installed in EXT2 + + See the set-up in the discussion of the nsh configuration below for other + required configuration options. + + PROTO1 + ------ + A prototyping board with logic on board (other than power-related logic). + There is no built-in support for the PROTO1 module. + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +===================== + + + The NuttX make system can be configured to support the various different + toolchain options. All testing has been conducted using the NuttX buildroot + toolchain. To use alternative toolchain, you simply need to add change of + the following configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : Generic GCC ARM EABI toolchain for Windows + + You may also have to modify the PATH in the setenv.h file if your + make cannot find the tools. + + NOTE about Windows native toolchains + ------------------------------------ + + There are basically three kinds of GCC toolchains that can be used: + + 1. A Linux native toolchain in a Linux environment, + 2. The buildroot Cygwin tool chain built in the Cygwin environment, + 3. A Windows native toolchain. + + There are several limitations to using a Windows based toolchain (#3) in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' + utility but you might easily find some new path problems. If so, check + out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic + links are used in Nuttx (e.g., include/arch). The make system works + around these problems for the Windows tools by copying directories + instead of linking them. But this can also cause some confusion for + you: For example, you may edit a file in a "linked" directory and find + that your changes had no effect. That is because you are building the + copy of the file in the "fake" symbolic directory. If you use a + Windows toolchain, you should get in the habit of making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/sam34, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/sam34/sam_vectors.S. You may need to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M0 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M0 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh samd20-xplained/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm0-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M0 toolchain for Cygwin under Windows. + +LEDs +==== + + There is one yellow LED available on the SAM D20 Xplained Pro board that + can be turned on and off. The LED can be activated by driving the connected + PA14 I/O line to GND. + + When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + control the LED as follows: + + SYMBOL Meaning LED0 + ------------------- ----------------------- ------ + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt N/C + LED_SIGNAL In a signal handler N/C + LED_ASSERTION An assertion failed N/C + LED_PANIC The system has crashed FLASH + + Thus is LED is statically on, NuttX has successfully booted and is, + apparently, running normally. If LED is flashing at approximately + 2Hz, then a fatal error has been detected and the system has halted. + +Serial Consoles +=============== + + SERCOM4 + ------ + + SERCOM4 is available on connectors EXT1, EXT2, and EXT3, but using + different PORT pins: + + PIN EXT1 EXT2 EXT3 GPIO Function + ---- ---- ---- ---- ------------------ + 13 PB09 PB13 PB11 SERCOM4 / USART RX + 14 PB08 PB12 PB12 SERCOM4 / USART TX + 19 GND GND GND N/A + 20 VCC VCC VCC N/A + + There are options available in the NuttX configuration to select which + connector SERCOM4 is on: SAMD20_XPLAINED_USART4_EXTn, where n=1, 2, or 3. + + If you have a TTL to RS-232 converter then this is the most convenient + serial console to use (because you don't lose the console device each time + you lose the USB connection). It is the default in all of these + configurations. An option is to use the virtual COM port. + + Virtual COM Port + ---------------- + + The SAMD20 Xplained Pro contains an Embedded Debugger (EDBG) that can be + used to program and debug the ATSAMD20J18A using Serial Wire Debug (SWD). + The Embedded debugger also include a Virtual COM port interface over + SERCOM3. Virtual COM port connections: + + PA24 SERCOM3 / USART TXD + PA25 SERCOM3 / USART RXD + +Atmel Studio 6.1 +================ + + Loading Code into FLASH: + ----------------------- + + Tools menus: Tools -> Device Programming. + + Debugging the NuttX Object File + ------------------------------- + + 1) Rename object file from nutt to nuttx.elf. That is an extension that + will be recognized by the file menu. + + 2) File menu: File -> Open -> Open object file for debugging + + - Select nuttx.elf object file + - Select AT91SAMD20J18 + - Select files for symbols as desired + - Select debugger + + 3) Debug menu: Debug -> Start debugging and break + + - This will reload the nuttx.elf file into FLASH + +SAMD20 Xplained Pro-specific Configuration Options +================================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM0=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="samdl" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_SAMD + CONFIG_ARCH_CHIP_SAMD20 + CONFIG_ARCH_CHIP_ATSAMD20J18 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=samd20-xplained (for the SAMD20 Xplained Pro development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SAMD20_XPLAINED=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64KB) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_SAMDL_WDT - Watchdog Timer" + CONFIG_SAMDL_RTC - Real Time Counter" + CONFIG_SAMDL_NVMCTRL - Non-Volatile Memory Controller" + CONFIG_SAMDL_EVSYS - Event System" + CONFIG_SAMDL_SERCOM0 - Serial Communication Interface 0" + CONFIG_SAMDL_SERCOM1 - Serial Communication Interface 1" + CONFIG_SAMDL_SERCOM2 - Serial Communication Interface 2" + CONFIG_SAMDL_SERCOM3 - Serial Communication Interface 3" + CONFIG_SAMDL_SERCOM4 - Serial Communication Interface 4" + CONFIG_SAMDL_SERCOM5 - Serial Communication Interface 5" + CONFIG_SAMDL_TC0 - Timer/Counter 0" + CONFIG_SAMDL_TC1 - Timer/Counter 1" + CONFIG_SAMDL_TC2 - Timer/Counter 2" + CONFIG_SAMDL_TC3 - Timer/Counter 3" + CONFIG_SAMDL_TC4 - Timer/Counter 4" + CONFIG_SAMDL_TC5 - Timer/Counter 5" + CONFIG_SAMDL_TC6 - Timer/Counter 6" + CONFIG_SAMDL_TC7 - Timer/Counter 6" + CONFIG_SAMDL_ADC - Analog-to-Digital Converter" + CONFIG_SAMDL_AC - Analog Comparator" + CONFIG_SAMDL_DAC - Digital-to-Analog Converter" + CONFIG_SAMDL_PTC - Peripheral Touch Controller" + + Some subsystems can be configured to operate in different ways. The drivers + need to know how to configure the subsystem. + + CONFIG_SAMDL_SERCOM0_ISI2C, CONFIG_SAMDL_SERCOM0_ISSPI, or CONFIG_SAMDL_SERCOM0_ISUSART + CONFIG_SAMDL_SERCOM1_ISI2C, CONFIG_SAMDL_SERCOM1_ISSPI, or CONFIG_SAMDL_SERCOM1_ISUSART + CONFIG_SAMDL_SERCOM2_ISI2C, CONFIG_SAMDL_SERCOM2_ISSPI, or CONFIG_SAMDL_SERCOM2_ISUSART + CONFIG_SAMDL_SERCOM3_ISI2C, CONFIG_SAMDL_SERCOM3_ISSPI, or CONFIG_SAMDL_SERCOM3_ISUSART + CONFIG_SAMDL_SERCOM4_ISI2C, CONFIG_SAMDL_SERCOM4_ISSPI, or CONFIG_SAMDL_SERCOM4_ISUSART + CONFIG_SAMDL_SERCOM5_ISI2C, CONFIG_SAMDL_SERCOM5_ISSPI, or CONFIG_SAMDL_SERCOM5_ISUSART + + SAMD20 specific device driver settings + + CONFIG_USARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,..5) for the + console and ttys0 (default is the USART4). + CONFIG_USARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_USARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_USARTn_BAUD - The configure BAUD of the USART. Must be + CONFIG_USARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_USARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_USARTn_2STOP - Two stop bits + +Configurations +============== + + Each SAMD20 Xplained Pro configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh samd20-xplained/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that BUILDROOT_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTE: These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output of on SERCOM4 which is available on EXT1, EXT2, or EXT3 (see + the section "Serial Consoles" above). The virtual COM port could + be used, instead, by reconfiguring to use SERCOM3 instead of + SERCOM4: + + System Type -> SAMD/L Peripheral Support + CONFIG_SAMDL_SERCOM3=y : Enable one or both + CONFIG_SAMDL_SERCOM4=n + + Device Drivers -> Serial Driver Support -> Serial Console + CONFIG_USART4_SERIAL_CONSOLE=y : Select only one for the console + CONFIG_USART4_SERIAL_CONSOLE=n + + Device Drivers -> Serial Driver Support -> SERCOM3 Configuration + CONFIG_USART3_2STOP=0 + CONFIG_USART3_BAUD=115200 + CONFIG_USART3_BITS=8 + CONFIG_USART3_PARITY=0 + CONFIG_USART3_RXBUFSIZE=256 + CONFIG_USART3_TXBUFSIZE=256 + + Device Drivers -> Serial Driver Support -> SERCOM4 Configuration + CONFIG_USART4_2STOP=0 + CONFIG_USART4_BAUD=115200 + CONFIG_USART4_BITS=8 + CONFIG_USART4_PARITY=0 + CONFIG_USART4_RXBUFSIZE=256 + CONFIG_USART4_TXBUFSIZE=256 + + Board Selection -> USART4 Connection + CONFIG_SAMD20_XPLAINED_USART4_EXT1=n : Pick on if USART4 used + CONFIG_SAMD20_XPLAINED_USART4_EXT2=n + CONFIG_SAMD20_XPLAINED_USART4_EXT3=y + + 3. Unless otherwise stated, the configurations are setup for + Cygwin under Windows: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Windows Host + CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on windoes + + 4. These configurations use the CodeSourcery toolchain. But + that is easily reconfigured: + + System Type -> Toolchain: + CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYW=y + + Any re-configuration should be done before making NuttX or else the + subsequent 'make' will fail. If you have already attempted building + NuttX then you will have to 1) 'make distclean' to remove the old + configuration, 2) 'cd tools; ./configure.sh sam3u-ek/ksnh' to start + with a fresh configuration, and 3) perform the configuration changes + above. + + Also, make sure that your PATH variable has the new path to your + Atmel tools. Try 'which arm-none-eabi-gcc' to make sure that you + are selecting the right tool. setenv.sh is available for you to + use to set or PATH variable. The path in the that file may not, + however, be correct for your installation. + + See also the "NOTE about Windows native toolchains" in the section + called "GNU Toolchain Options" above. + +Configuration sub-directories +----------------------------- + + nsh: + This configuration directory will built the NuttShell. See NOTES above + and below: + + NOTES: + + 1. This configuration is set up to build on Windows using the Cygwin + environment using the CodeSourcery toolchain. This can be easily + changed as described above under "Configurations." + + 2. By default, this configuration provides a serial console on SERCOM4 + at 115200 8N1 via EXT3: + + PIN EXT3 GPIO Function + ---- ---- ------------------ + 13 PB11 SERCOM4 / USART RX + 14 PB12 SERCOM4 / USART TX + 19 GND N/A + 20 VCC N/A + + If you would prefer to use the EDBG serial COM port or would prefer + to use SERCOM4 on EXT1 or EXT2, you will need to reconfigure the + SERCOM as described under "Configurations". See also the section + entitled "Serial Consoles" above. + + 3. NOTE: If you get a compilation error like: + + libxx_new.cxx:74:40: error: 'operator new' takes type 'size_t' + ('unsigned int') as first parameter [-fper + + Sometimes NuttX and your toolchain will disagree on the underlying + type of size_t; sometimes it is an 'unsigned int' and sometimes it is + an 'unsigned long int'. If this error occurs, then you may need to + toggle the value of CONFIG_CXX_NEWLONG. + + 4. If the I/O1 module is connected to the SAMD20 Xplained Pro, then + support for the SD card slot can be enabled by making the following + changes to the configuration. These changes assume that the I/O1 + modules is connected in EXT1. Most of the modifications necessary + to work with the I/O1 in a different connector are obvious.. except + for the selection of SERCOM SPI support: + + EXT1: SPI is provided through SERCOM0 + EXT2: SPI is provided through SERCOM1 + EXT3: SPI is provided through SERCOM5 + + File Systems: + CONFIG_FS_FAT=y : Enable the FAT file system + CONFIG_FAT_LCNAMES=y : Enable upper/lower case 8.3 file names (Optional, see below) + CONFIG_FAT_LFN=y : Enable long file named (Optional, see below) + CONFIG_FAT_MAXFNAME=32 : Maximum supported file name length + + There are issues related to patents that Microsoft holds on FAT long + file name technologies. See the top level COPYING file for further + details. + + System Type -> Peripherals: + CONFIG_SAMDL_SERCOM0=y : Use SERCOM0 if the I/O is in EXT1 + CONFIG_SAMDL_SERCOM0_ISSPI=y : Configure SERCOM0 as an SPI master + + Device Drivers + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMCSD_NSLOTS=1 : Only one MMC/SD card slot + CONFIG_MMCSD_MULTIBLOCK_DISABLE=n : Should not need to disable multi-block transfers + CONFIG_MMCSD_MMCSUPPORT=n : May interfere with some SD cards + CONFIG_MMCSD_HAVECARDDETECT=y : I/O1 module as a card detect GPIO + CONFIG_MMCSD_SPI=y : Use the SPI interface to the MMC/SD card + CONFIG_MMCSD_SPICLOCK=20000000 : This is a guess for the optimal MMC/SD frequency + CONFIG_MMCSD_SPIMODE=0 : Mode 0 is required + + Board Selection -> Common Board Options + CONFIG_NSH_MMCSDSLOTNO=0 : Only one MMC/SD slot, slot 0 + CONFIG_NSH_MMCSDSPIPORTNO=0 : Use port=0 -> SERCOM0 if the I/O1 is in EXT1 + + Board Selection -> SAMD20 Xplained Pro Modules + CONFIG_SAMD20_XPLAINED_IOMODULE=y : I/O1 module is connected + CONFIG_SAMD20_XPLAINED_IOMODULE_EXT1=y : I/O1 modules is in EXT1 + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : Board has architecture-specific initialization + + NOTE: If you enable the I/O1 this configuration with SERCOM4 as the + console and with the I/O1 module in EXT1, you *must* remove USART + jumper. Otherwise, you have lookpack on SERCOM4 and NSH will *not* + behave very well (since its outgoing prompts also appear as incoming + commands). + + STATUS: As of 2013-6-18, this configuration appears completely + functional. Testing, however, has been very light. Example: + + NuttShell (NSH) NuttX-6.34 + nsh> mount -t vfat /dev/mmcsd0 /mnt/stuff + nsh> ls /mnt/stuff + /mnt/stuff: + nsh> echo "This is a test" >/mnt/stuff/atest.txt + nsh> ls /mnt/stuff + /mnt/stuff: + atest.txt + nsh> cat /mnt/stuff/atest.txt + This is a test + nsh> + + 5. If the OLED1 module is connected to the SAMD20 Xplained Pro, then + support for the OLED display can be enabled by making the following + changes to the configuration. These changes assume that the I/O1 + modules is connected in EXT1. Most of the modifications necessary + to work with the I/O1 in a different connector are obvious.. except + for the selection of SERCOM SPI support: + + EXT1: SPI is provided through SERCOM0 + EXT2: SPI is provided through SERCOM1 + EXT3: SPI is provided through SERCOM5 + + System Type -> Peripherals: + CONFIG_SAMDL_SERCOM1=y : Use SERCOM1 if the I/O is in EXT2 + CONFIG_SAMDL_SERCOM1_ISSPI=y : Configure SERCOM1 as an SPI master + + Device Drivers -> SPI + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + CONFIG_SPI_CMDDATA=y : CMD/DATA support is required + + Device Drivers -> LCDs + CONFIG_LCD=y : Enable LCD support + CONFIG_LCD_MAXCONTRAST=255 : Maximum contrast value + CONFIG_LCD_LANDSCAPE=y : Landscape orientation (see below*) + CONFIG_LCD_UG2832HSWEG04=y : Enable support for the OLED + CONFIG_LCD_SSD1306_SPIMODE=0 : SPI Mode 0 + CONFIG_LCD_SSD1306_SPIMODE=3500000 : Pick an SPI frequency + + Board Selection -> SAMD20 Xplained Pro Modules + CONFIG_SAMD20_XPLAINED_OLED1MODULE=y : OLED1 module is connected + CONFIG_SAMD20_XPLAINED_OLED1MODULE_EXT2=y : OLED1 modules is in EXT2 + + The NX graphics subsystem also needs to be configured: + + CONFIG_NX=y : Enable graphics support + CONFIG_NX_LCDDRIVER=y : Using an LCD driver + CONFIG_NX_NPLANES=1 : With a single color plane + CONFIG_NX_WRITEONLY=n : You can read from the LCD (see below**) + CONFIG_NX_DISABLE_2BPP=y : Disable all resolutions except 1BPP + CONFIG_NX_DISABLE_4BPP=y + CONFIG_NX_DISABLE_8BPP=y + CONFIG_NX_DISABLE_16BPP=y + CONFIG_NX_DISABLE_24BPP=y + CONFIG_NX_DISABLE_32BPP=y + CONFIG_NX_PACKEDMSFIRST=y : LSB packed first (shouldn't matter) + CONFIG_NXTK_BORDERWIDTH=2 : Use a small border + CONFIG_NXTK_DEFAULT_BORDERCOLORS=y : Default border colors + CONFIG_NXFONTS_CHARBITS=7 : 7-bit fonts + CONFIG_NXFONT_SANS17X23B=y : Pick a font (any that will fit) + + * This orientation will put the buttons "above" the LCD. The + reverse landscape configuration (CONFIG_LCD_RLANDSCAPE) will + "flip" the display so that the buttons are "below" the LCD. + + ** The hardware is write only, but the driver maintains a frame buffer + to support read and read-write-modiry operations on the LCD. + Reading from the frame buffer is, however, untested. + + Then, in order to use the OLED, you will need to build some kind of + graphics application or use one of the NuttX graphics examples. + Here, for example, is the setup for the graphic "Hello, World!" + example: + + CONFIG_EXAMPLES_NXHELLO=y : Enables the example + CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y : Use default colors (see below *) + CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y : Use the default font + CONFIG_EXAMPLES_NXHELLO_BPP=1 : One bit per pixel + CONFIG_EXAMPLES_NXHELLO_EXTERNINIT=y : Special initialization is required. + + * The OLED is monochrome so the only "colors" are blacka nd white. + The default "colors" will give you while text on a black background. + You can override the faults it you want black text on a while background. + + NOTE: One issue that I have seen with the NXHello example when + running as an NSH command is that it only works the first time. + So, after you run the 'nxhello' command one time, you will have to + reset the board before you run it again. + + This is clearly some issue with initializing, un-initializing, and + then re-initializing. If you want to fix this, patches are quite + welcome. diff --git a/configs/samd20-xplained/include/board.h b/configs/samd20-xplained/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..0ca6fab1e8381c9b0a97db1108b1cfb623d6f21a --- /dev/null +++ b/configs/samd20-xplained/include/board.h @@ -0,0 +1,572 @@ +/************************************************************************************ + * configs/samd20-xplained/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMD20_XPLAINED_INCLUDE_BOARD_H +#define __CONFIGS_SAMD20_XPLAINED_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# ifdef CONFIG_GPIO_IRQ +# include +# endif +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* Overview + * + * OSC8M Output = 8MHz + * `- GCLK1 Input = 8MHz Prescaler = 1 output = 8MHz + * `- DFLL Input = 8MHz Multiplier = 6 output = 48MHz + * `- GCLK0 Input = 48MHz Prescaler = 1 output = 48MHz + * `- PM Input = 48Mhz CPU divider = 1 CPU frequency = 48MHz + * APBA divider = 1 APBA frequency = 48MHz + * APBB divider = 1 APBB frequency = 48MHz + * APBC divider = 1 APBC frequency = 48MHz + * + * The SAMD20 Xplained Pro has one on-board crystal: + * + * XC101 32.768KHz XOSC32 + * + * REVISIT: Not currently used, may want to use as GCLK1 source with + * DFLL multiplier of ((48000000+16384)/32768) = 1465 which would yield + * a clock of 48,005,120 MHz. + */ + +/* XOSC Configuration -- Not available + * + * BOARD_XOSC_ENABLE - Boolean (defined / not defined) + * BOARD_XOSC_FREQUENCY - In Hz + * BOARD_XOSC_STARTUPTIME - See SYSCTRL_XOSC_STARTUP_* definitions + * BOARD_XOSC_ISCRYSTAL - Boolean (defined / not defined) + * BOARD_XOSC_AMPGC - Boolean (defined / not defined) + * BOARD_XOSC_ONDEMAND - Boolean (defined / not defined) + * BOARD_XOSC_RUNINSTANDBY - Boolean (defined / not defined) + */ + +#undef BOARD_XOSC_ENABLE +#define BOARD_XOSC_FREQUENCY 12000000UL +#define BOARD_XOSC_STARTUPTIME SYSCTRL_XOSC_STARTUP_1S +#define BOARD_XOSC_ISCRYSTAL 1 +#define BOARD_XOSC_AMPGC 1 +#define BOARD_XOSC_ONDEMAND 1 +#undef BOARD_XOSC_RUNINSTANDBY + +/* XOSC32 Configuration -- Not used + * + * BOARD_XOSC32K_ENABLE - Boolean (defined / not defined) + * BOARD_XOSC32K_FREQUENCY - In Hz + * BOARD_XOSC32K_STARTUPTIME - See SYSCTRL_XOSC32K_STARTUP_* definitions + * BOARD_XOSC32K_ISCRYSTAL - Boolean (defined / not defined) + * BOARD_XOSC32K_AAMPEN - Boolean (defined / not defined) + * BOARD_XOSC32K_EN1KHZ - Boolean (defined / not defined) + * BOARD_XOSC32K_EN32KHZ - Boolean (defined / not defined) + * BOARD_XOSC32K_ONDEMAND - Boolean (defined / not defined) + * BOARD_XOSC32K_RUNINSTANDBY - Boolean (defined / not defined) + */ + +#undef BOARD_XOSC32K_ENABLE +#define BOARD_XOSC32K_FREQUENCY 32768 /* 32.768KHz XTAL */ +#define BOARD_XOSC32K_STARTUPTIME SYSCTRL_XOSC32K_STARTUP_2S +#define BOARD_XOSC32K_ISCRYSTAL 1 +#define BOARD_XOSC32K_AAMPEN 1 +#undef BOARD_XOSC32K_EN1KHZ +#define BOARD_XOSC32K_EN32KHZ 1 +#define BOARD_XOSC32K_ONDEMAND 1 +#undef BOARD_XOSC32K_RUNINSTANDBY + +/* OSC32 Configuration -- not used + * + * BOARD_OSC32K_ENABLE - Boolean (defined / not defined) + * BOARD_OSC32K_FREQUENCY - In Hz + * BOARD_OSC32K_STARTUPTIME - See SYSCTRL_OSC32K_STARTUP_* definitions + * BOARD_OSC32K_EN1KHZ - Boolean (defined / not defined) + * BOARD_OSC32K_EN32KHZ - Boolean (defined / not defined) + * BOARD_OSC32K_ONDEMAND - Boolean (defined / not defined) + * BOARD_OSC32K_RUNINSTANDBY - Boolean (defined / not defined) + */ + +#undef BOARD_OSC32K_ENABLE +#define BOARD_OSC32K_FREQUENCY 32768 /* 32.768kHz internal oscillator */ +#define BOARD_OSC32K_STARTUPTIME SYSCTRL_OSC32K_STARTUP_4MS +#define BOARD_OSC32K_EN1KHZ 1 +#define BOARD_OSC32K_EN32KHZ 1 +#define BOARD_OSC32K_ONDEMAND 1 +#undef BOARD_OSC32K_RUNINSTANDBY + +/* OSC8M Configuration -- always enabled + * + * BOARD_OSC8M_PRESCALER - See SYSCTRL_OSC8M_PRESC_DIV* definitions + * BOARD_OSC8M_ONDEMAND - Boolean (defined / not defined) + * BOARD_OSC8M_RUNINSTANDBY - Boolean (defined / not defined) + */ + +#define BOARD_OSC8M_PRESCALER SYSCTRL_OSC8M_PRESC_DIV1 +#define BOARD_OSC8M_ONDEMAND 1 +#undef BOARD_OSC8M_RUNINSTANDBY + +#define BOARD_OSC8M_FREQUENCY 8000000 /* 8MHz high-accuracy internal oscillator */ + +/* OSCULP32K Configuration -- not used. */ + +#define BOARD_OSCULP32K_FREQUENCY 32000 /* 32kHz ultra-low-power internal oscillator */ + +/* Digital Frequency Locked Loop configuration. In closed-loop mode, the + * DFLL output frequency (Fdfll) is given by: + * + * Fdfll = DFLLmul * Frefclk + * = 6 * 8000000 = 48MHz + * + * Where the reference clock is Generic Clock Channel 0 output of GLCK1. + * GCLCK1 provides OSC8M, undivided. + * + * When operating in open-loop mode, the output frequency of the DFLL will + * be determined by the values written to the DFLL Coarse Value bit group + * and the DFLL Fine Value bit group in the DFLL Value register. + * + * BOARD_DFLL_OPENLOOP - Boolean (defined / not defined) + * BOARD_DFLL_TRACKAFTERFINELOCK - Boolean (defined / not defined) + * BOARD_DFLL_KEEPLOCKONWAKEUP - Boolean (defined / not defined) + * BOARD_DFLL_ENABLECHILLCYCLE - Boolean (defined / not defined) + * BOARD_DFLL_QUICKLOCK - Boolean (defined / not defined) + * BOARD_DFLL_ONDEMAND - Boolean (defined / not defined) + * BOARD_DFLL_COARSEVALUE - Value + * BOARD_DFLL_FINEVALUE - Value + * + * Open Loop mode only: + * BOARD_DFLL_COARSEVALUE - Value + * BOARD_DFLL_FINEVALUE - Value + * + * Closed loop mode only: + * BOARD_DFLL_GCLKGEN - GCLK index + * BOARD_DFLL_MULTIPLIER - Value + * BOARD_DFLL_MAXCOARSESTEP - Value + * BOARD_DFLL_MAXFINESTEP - Value + * + * BOARD_DFLL_FREQUENCY - The resulting frequency + */ + +#define BOARD_DFLL_ENABLE 1 +#undef BOARD_DFLL_OPENLOOP +#undef BOARD_DFLL_ONDEMAND +#undef BOARD_DFLL_RUNINSTANDBY + +/* DFLL open loop mode configuration */ + +#define BOARD_DFLL_COARSEVALUE (0x1f / 4) +#define BOARD_DFLL_FINEVALUE (0xff / 4) + +/* DFLL closed loop mode configuration */ + +#define BOARD_DFLL_SRCGCLKGEN 1 +#define BOARD_DFLL_MULTIPLIER 6 +#define BOARD_DFLL_QUICKLOCK 1 +#define BOARD_DFLL_TRACKAFTERFINELOCK 1 +#define BOARD_DFLL_KEEPLOCKONWAKEUP 1 +#define BOARD_DFLL_ENABLECHILLCYCLE 1 +#define BOARD_DFLL_MAXCOARSESTEP (0x1f / 4) +#define BOARD_DFLL_MAXFINESTEP (0xff / 4) + +#define BOARD_DFLL_FREQUENCY (48000000) + +/* GCLK Configuration + * + * Global enable/disable. + * + * BOARD_GCLK_ENABLE - Boolean (defined / not defined) + * + * For n=1-7: + * BOARD_GCLKn_ENABLE - Boolean (defined / not defined) + * + * For n=0-8: + * BOARD_GCLKn_RUN_IN_STANDBY - Boolean (defined / not defined) + * BOARD_GCLKn_CLOCK_SOURCE - See GCLK_GENCTRL_SRC_* definitions + * BOARD_GCLKn_PRESCALER - Value + * BOARD_GCLKn_OUTPUT_ENABLE - Boolean (defined / not defined) + */ + +#define BOARD_GCLK_ENABLE 1 + +/* GCLK generator 0 (Main Clock) - Source is the DFLL */ + +#undef BOARD_GCLK0_RUN_IN_STANDBY +#define BOARD_GCLK0_CLOCK_SOURCE GCLK_GENCTRL_SRC_DFLL48M +#define BOARD_GCLK0_PRESCALER 1 +#undef BOARD_GCLK0_OUTPUT_ENABLE +#define BOARD_GCLK0_FREQUENCY (BOARD_DFLL_FREQUENCY / BOARD_GCLK0_PRESCALER) + +/* Configure GCLK generator 1 - Drives the DFLL */ + +#define BOARD_GCLK1_ENABLE 1 +#undef BOARD_GCLK1_RUN_IN_STANDBY +#define BOARD_GCLK1_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC8M +#define BOARD_GCLK1_PRESCALER 1 +#undef BOARD_GCLK1_OUTPUT_ENABLE +#define BOARD_GCLK1_FREQUENCY (BOARD_OSC8M_FREQUENCY / BOARD_GCLK1_PRESCALER) + +/* Configure GCLK generator 2 (RTC) */ + +#undef BOARD_GCLK2_ENABLE +#undef BOARD_GCLK2_RUN_IN_STANDBY +#define BOARD_GCLK2_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC32K +#define BOARD_GCLK2_PRESCALER 32 +#undef BOARD_GCLK2_OUTPUT_ENABLE +#define BOARD_GCLK2_FREQUENCY (BOARD_OSC8M_FREQUENCY / BOARD_GCLK2_PRESCALER) + +/* Configure GCLK generator 3 */ + +#undef BOARD_GCLK3_ENABLE +#undef BOARD_GCLK3_RUN_IN_STANDBY +#define BOARD_GCLK3_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC8M +#define BOARD_GCLK3_PRESCALER 1 +#undef BOARD_GCLK3_OUTPUT_ENABLE +#define BOARD_GCLK3_FREQUENCY (BOARD_OSC8M_FREQUENCY / BOARD_GCLK3_PRESCALER) + +/* Configure GCLK generator 4 */ + +#undef BOARD_GCLK4_ENABLE +#undef BOARD_GCLK4_RUN_IN_STANDBY +#define BOARD_GCLK4_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC8M +#define BOARD_GCLK4_PRESCALER 1 +#undef BOARD_GCLK4_OUTPUT_ENABLE +#define BOARD_GCLK4_FREQUENCY (BOARD_OSC8M_FREQUENCY / BOARD_GCLK4_PRESCALER) + +/* Configure GCLK generator 5 */ + +#undef BOARD_GCLK5_ENABLE +#undef BOARD_GCLK5_RUN_IN_STANDBY +#define BOARD_GCLK5_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC8M +#define BOARD_GCLK5_PRESCALER 1 +#undef BOARD_GCLK5_OUTPUT_ENABLE +#define BOARD_GCLK5_FREQUENCY (BOARD_OSC8M_FREQUENCY / BOARD_GCLK5_PRESCALER) + +/* Configure GCLK generator 6 */ + +#undef BOARD_GCLK6_ENABLE +#undef BOARD_GCLK6_RUN_IN_STANDBY +#define BOARD_GCLK6_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC8M +#define BOARD_GCLK6_PRESCALER 1 +#undef BOARD_GCLK6_OUTPUT_ENABLE +#define BOARD_GCLK6_FREQUENCY (BOARD_OSC8M_FREQUENCY / BOARD_GCLK6_PRESCALER) + +/* Configure GCLK generator 7 */ + +#undef BOARD_GCLK7_ENABLE +#undef BOARD_GCLK7_RUN_IN_STANDBY +#define BOARD_GCLK7_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC8M +#define BOARD_GCLK7_PRESCALER 1 +#undef BOARD_GCLK7_OUTPUT_ENABLE +#define BOARD_GCLK7_FREQUENCY (BOARD_OSC8M_FREQUENCY / BOARD_GCLK7_PRESCALER) + +/* The source of the main clock is always GCLK_MAIN. Also called GCLKGEN[0], this is + * the clock feeding the Power Manager. The Power Manager, in turn, generates main + * clock which is divided down to produce the CPU, AHB, and APB clocks. + * + * The main clock is initially OSC8M divided by 8. + */ + +#define BOARD_GCLK_MAIN_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* Main clock dividers + * + * BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions + * BOARD_CPU_FRQUENCY - In Hz + * BOARD_CPU_FAILDECT - Boolean (defined / not defined) + * BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions + * BOARD_APBA_FRQUENCY - In Hz + * BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions + * BOARD_APBB_FRQUENCY - In Hz + * BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions + * BOARD_APBC_FRQUENCY - In Hz + */ + +#define BOARD_CPU_FAILDECT 1 +#define BOARD_CPU_DIVIDER PM_CPUSEL_CPUDIV_1 +#define BOARD_APBA_DIVIDER PM_APBASEL_APBADIV_1 +#define BOARD_APBB_DIVIDER PM_APBBSEL_APBBDIV_1 +#define BOARD_APBC_DIVIDER PM_APBCSEL_APBCDIV_1 + +/* Resulting frequencies */ + +#define BOARD_MCK_FREQUENCY (BOARD_GCLK_MAIN_FREQUENCY) +#define BOARD_CPU_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_PBA_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_PBB_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_PBC_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_PBD_FREQUENCY (BOARD_MCK_FREQUENCY) + +/* FLASH wait states + * + * Vdd Range Wait states Maximum Operating Frequency + * ------------- -------------- --------------------------- + * 1.62V to 2.7V 0 14 MHz + * 1 28 MHz + * 2 42 MHz + * 3 48 MHz + * 2.7V to 3.63V 0 24 MHz + * 1 48 MHz + */ + +#if 0 /* REVISIT -- should not be necessary */ +# define BOARD_FLASH_WAITSTATES 1 +#else +# define BOARD_FLASH_WAITSTATES 2 +#endif + +/* SERCOM definitions ***************************************************************/ +/* This is the source clock generator for the GCLK_SERCOM_SLOW clock that is common + * to all SERCOM modules. + */ + +#define BOARD_SERCOM05_SLOW_GCLKGEN 0 + +/* SERCOM0 SPI is available on EXT1 + * + * PIN PORT SERCOM FUNCTION + * --- ------------------ ----------- + * 15 PA5 SERCOM0 PAD1 SPI SS + * 16 PA6 SERCOM0 PAD2 SPI MOSI + * 17 PA4 SERCOM0 PAD0 SPI MISO + * 18 PA7 SERCOM0 PAD3 SPI SCK + */ + +#define BOARD_SERCOM0_GCLKGEN 0 +#define BOARD_SERCOM0_SLOW_GCLKGEN BOARD_SERCOM05_SLOW_GCLKGEN +#define BOARD_SERCOM0_MUXCONFIG (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0) +#define BOARD_SERCOM0_PINMAP_PAD0 PORT_SERCOM0_PAD0_2 /* SPI_MISO */ +#define BOARD_SERCOM0_PINMAP_PAD1 0 /* microSD_SS */ +#define BOARD_SERCOM0_PINMAP_PAD2 PORT_SERCOM0_PAD2_2 /* SPI_MOSI */ +#define BOARD_SERCOM0_PINMAP_PAD3 PORT_SERCOM0_PAD3_2 /* SPI_SCK */ + +#define BOARD_SERCOM0_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* SERCOM1 SPI is available on EXT2 + * + * PIN PORT SERCOM FUNCTION + * --- ------------------ ----------- + * 15 PA17 SERCOM1 PAD1 SPI SS + * 16 PA18 SERCOM1 PAD2 SPI MOSI + * 17 PA16 SERCOM1 PAD0 SPI MISO + * 18 PA19 SERCOM1 PAD3 SPI SCK + */ + +#define BOARD_SERCOM1_GCLKGEN 0 +#define BOARD_SERCOM1_SLOW_GCLKGEN BOARD_SERCOM05_SLOW_GCLKGEN +#define BOARD_SERCOM1_MUXCONFIG (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0) +#define BOARD_SERCOM1_PINMAP_PAD0 PORT_SERCOM1_PAD0_1 /* SPI_MISO */ +#define BOARD_SERCOM1_PINMAP_PAD1 0 /* microSD_SS */ +#define BOARD_SERCOM1_PINMAP_PAD2 PORT_SERCOM1_PAD2_1 /* SPI_MOSI */ +#define BOARD_SERCOM1_PINMAP_PAD3 PORT_SERCOM1_PAD3_1 /* SPI_SCK */ + +#define BOARD_SERCOM1_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* The SAMD20 Xplained Pro contains an Embedded Debugger (EDBG) that can be + * used to program and debug the ATSAMD20J18A using Serial Wire Debug (SWD). + * The Embedded debugger also include a Virtual COM port interface over + * SERCOM3. Virtual COM port connections: + * + * PA24 SERCOM3 / USART TXD + * PA25 SERCOM3 / USART RXD + */ + +#define BOARD_SERCOM3_GCLKGEN 0 +#define BOARD_SERCOM3_SLOW_GCLKGEN BOARD_SERCOM05_SLOW_GCLKGEN +#define BOARD_SERCOM3_MUXCONFIG (USART_CTRLA_RXPAD3 | USART_CTRLA_TXPAD2) +#define BOARD_SERCOM3_PINMAP_PAD0 0 +#define BOARD_SERCOM3_PINMAP_PAD1 0 +#define BOARD_SERCOM3_PINMAP_PAD2 PORT_SERCOM3_PAD2_1 /* USART TX */ +#define BOARD_SERCOM3_PINMAP_PAD3 PORT_SERCOM3_PAD3_1 /* USART RX */ + +#define BOARD_SERCOM3_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* The SERCOM4 USART is available on connectors EXT1, EXT2, and EXT3 + * + * PIN EXT1 EXT2 EXT3 GPIO Function + * ---- ---- ---- ---- ------------------ + * 13 PB09 PB13 PB11 SERCOM4 / USART RX + * 14 PB08 PB12 PB12 SERCOM4 / USART TX + * 19 GND GND GND N/A + * 20 VCC VCC VCC N/A + * + * If you have a TTL to RS-232 converter then this is the most convenient + * serial console to use (because you don't lose the console device each time + * you lose the USB connection). It is the default in all of the SAMD20 + * configurations. + */ + +#define BOARD_SERCOM4_GCLKGEN 0 +#define BOARD_SERCOM4_SLOW_GCLKGEN BOARD_SERCOM05_SLOW_GCLKGEN + +#if defined(CONFIG_SAMD20_XPLAINED_USART4_EXT1) +# define BOARD_SERCOM4_MUXCONFIG (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0) +# define BOARD_SERCOM4_PINMAP_PAD0 PORT_SERCOM4_PAD0_3 /* USART TX */ +# define BOARD_SERCOM4_PINMAP_PAD1 PORT_SERCOM4_PAD1_3 /* USART RX */ +# define BOARD_SERCOM4_PINMAP_PAD2 0 +# define BOARD_SERCOM4_PINMAP_PAD3 0 +#elif defined(CONFIG_SAMD20_XPLAINED_USART4_EXT2) +# define BOARD_SERCOM4_MUXCONFIG (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0) +# define BOARD_SERCOM4_PINMAP_PAD0 PORT_SERCOM4_PAD0_1 /* USART TX */ +# define BOARD_SERCOM4_PINMAP_PAD1 PORT_SERCOM4_PAD1_1 /* USART RX */ +# define BOARD_SERCOM4_PINMAP_PAD2 0 +# define BOARD_SERCOM4_PINMAP_PAD3 0 +#else /* if defined(CONFIG_SAMD20_XPLAINED_USART4_EXT3) */ +# define BOARD_SERCOM4_MUXCONFIG (USART_CTRLA_RXPAD3 | USART_CTRLA_TXPAD2) +# define BOARD_SERCOM4_PINMAP_PAD0 0 +# define BOARD_SERCOM4_PINMAP_PAD1 0 +# define BOARD_SERCOM4_PINMAP_PAD2 PORT_SERCOM4_PAD2_3 /* USART TX */ +# define BOARD_SERCOM4_PINMAP_PAD3 PORT_SERCOM4_PAD3_3 /* USART RX */ +#endif + +#define BOARD_SERCOM4_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* SERCOM5 SPI is available on EXT3 + * + * PIN PORT SERCOM FUNCTION + * --- ------------------ ----------- + * 15 PB17 SERCOM5 PAD1 SPI SS + * 16 PB22 SERCOM5 PAD2 SPI MOSI + * 17 PB16 SERCOM5 PAD0 SPI MISO + * 18 PB23 SERCOM5 PAD3 SPI SCK + */ + +#define BOARD_SERCOM5_GCLKGEN 0 +#define BOARD_SERCOM5_SLOW_GCLKGEN BOARD_SERCOM05_SLOW_GCLKGEN +#define BOARD_SERCOM5_MUXCONFIG (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0) +#define BOARD_SERCOM5_PINMAP_PAD0 PORT_SERCOM5_PAD0_1 /* SPI_MISO */ +#define BOARD_SERCOM5_PINMAP_PAD1 0 /* microSD_SS */ +#define BOARD_SERCOM5_PINMAP_PAD2 PORT_SERCOM5_PAD2_4 /* SPI_MOSI */ +#define BOARD_SERCOM5_PINMAP_PAD3 PORT_SERCOM5_PAD3_4 /* SPI_SCK */ + +#define BOARD_SERCOM5_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* LED definitions ******************************************************************/ +/* There are three LEDs on board the SAMD20 Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labelled STATUS near the SAMD20 USB + * connector. + * + * This LED is controlled by PC07 and the LED can be activated by driving the + * PA14 to GND. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_STATUS_LED 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_STATUS LED_BIT (1 << BOARD_STATUS_LED) + +/* When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control the LED as defined below. Thus if the LED is statically on, NuttX has + * successfully booted and is, apparently, running normally. If the LED is + * flashing at approximately 2Hz, then a fatal error has been detected and the + * system has halted. + */ + +#define LED_STARTED 0 /* STATUS LED=OFF */ +#define LED_HEAPALLOCATE 0 /* STATUS LED=OFF */ +#define LED_IRQSENABLED 0 /* STATUS LED=OFF */ +#define LED_STACKCREATED 1 /* STATUS LED=ON */ +#define LED_INIRQ 2 /* STATUS LED=no change */ +#define LED_SIGNAL 2 /* STATUS LED=no change */ +#define LED_ASSERTION 2 /* STATUS LED=no change */ +#define LED_PANIC 3 /* STATUS LED=flashing */ + +/* Button definitions ***************************************************************/ +/* Mechanical buttons: + * + * The SAMD20 Xplained Pro contains two mechanical buttons. One button is the + * RESET button connected to the SAMD20 reset line and the other is a generic user + * configurable button. When a button is pressed it will drive the I/O line to GND. + * + * PA15 SW0 + */ + +/* The SAMD20 Xplained Pro supports one button: */ + +#define BUTTON_SW0 0 +#define NUM_BUTTONS 1 + +#define BUTTON_SW0_BIT (1 << BUTTON_SW0) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAMD20_XPLAINED_INCLUDE_BOARD_H */ diff --git a/configs/samd20-xplained/nsh/Make.defs b/configs/samd20-xplained/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..22caeba81182e11117b96c812026b2e12edb9345 --- /dev/null +++ b/configs/samd20-xplained/nsh/Make.defs @@ -0,0 +1,123 @@ +############################################################################ +# configs/samd20-xplained/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv6-m/Toolchain.defs + +LDSCRIPT = flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) +endif diff --git a/configs/samd20-xplained/nsh/defconfig b/configs/samd20-xplained/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..e868b72f61183755c31ecebb5ad9e5cf1ee34154 --- /dev/null +++ b/configs/samd20-xplained/nsh/defconfig @@ -0,0 +1,904 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +CONFIG_ARCH_CHIP_SAMD=y +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +CONFIG_ARCH_CORTEXM0=y +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv6-m" +CONFIG_ARCH_CHIP="samdl" +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set + +# +# ARMV6M Configuration Options +# +# CONFIG_ARMV6M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV6M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIW is not set + +# +# Atmel SAMD/L Configuration Options +# +# CONFIG_ARCH_CHIP_SAMD20E14 is not set +# CONFIG_ARCH_CHIP_SAMD20E15 is not set +# CONFIG_ARCH_CHIP_SAMD20E16 is not set +# CONFIG_ARCH_CHIP_SAMD20E17 is not set +# CONFIG_ARCH_CHIP_SAMD20E18 is not set +# CONFIG_ARCH_CHIP_SAMD20G14 is not set +# CONFIG_ARCH_CHIP_SAMD20G15 is not set +# CONFIG_ARCH_CHIP_SAMD20G16 is not set +# CONFIG_ARCH_CHIP_SAMD20G17 is not set +# CONFIG_ARCH_CHIP_SAMD20G18 is not set +# CONFIG_ARCH_CHIP_SAMD20J14 is not set +# CONFIG_ARCH_CHIP_SAMD20J15 is not set +# CONFIG_ARCH_CHIP_SAMD20J16 is not set +# CONFIG_ARCH_CHIP_SAMD20J17 is not set +CONFIG_ARCH_CHIP_SAMD20J18=y +# CONFIG_ARCH_CHIP_SAMD21E15A is not set +# CONFIG_ARCH_CHIP_SAMD21E15B is not set +# CONFIG_ARCH_CHIP_SAMD21E16A is not set +# CONFIG_ARCH_CHIP_SAMD21E16B is not set +# CONFIG_ARCH_CHIP_SAMD21E17A is not set +# CONFIG_ARCH_CHIP_SAMD21E18A is not set +# CONFIG_ARCH_CHIP_SAMD21G15A is not set +# CONFIG_ARCH_CHIP_SAMD21G15B is not set +# CONFIG_ARCH_CHIP_SAMD21G16A is not set +# CONFIG_ARCH_CHIP_SAMD21G16B is not set +# CONFIG_ARCH_CHIP_SAMD21G17A is not set +# CONFIG_ARCH_CHIP_SAMD21G18A is not set +# CONFIG_ARCH_CHIP_SAMD21J15A is not set +# CONFIG_ARCH_CHIP_SAMD21J15B is not set +# CONFIG_ARCH_CHIP_SAMD21J16A is not set +# CONFIG_ARCH_CHIP_SAMD21J16B is not set +# CONFIG_ARCH_CHIP_SAMD21J17A is not set +# CONFIG_ARCH_CHIP_SAMD21J18A is not set +CONFIG_ARCH_FAMILY_SAMD20=y +# CONFIG_ARCH_FAMILY_SAMD20E is not set +# CONFIG_ARCH_FAMILY_SAMD20G is not set +CONFIG_ARCH_FAMILY_SAMD20J=y +# CONFIG_ARCH_FAMILY_SAMD21 is not set +# CONFIG_ARCH_FAMILY_SAMD21E is not set +# CONFIG_ARCH_FAMILY_SAMD21G is not set +# CONFIG_ARCH_FAMILY_SAMD21J is not set +# CONFIG_ARCH_FAMILY_SAML21 is not set +# CONFIG_ARCH_FAMILY_SAML21E is not set +# CONFIG_ARCH_FAMILY_SAML21G is not set +# CONFIG_ARCH_FAMILY_SAML21J is not set + +# +# SAMD/L Peripheral Support +# +# CONFIG_SAMDL_HAVE_DMAC is not set +CONFIG_SAMDL_HAVE_SERCOM4=y +CONFIG_SAMDL_HAVE_SERCOM5=y +CONFIG_SAMDL_HAVE_TC5=y +CONFIG_SAMDL_HAVE_TC2=y +CONFIG_SAMDL_HAVE_TC3=y +CONFIG_SAMDL_HAVE_TC6=y +CONFIG_SAMDL_HAVE_TC7=y +# CONFIG_SAMDL_AC is not set +# CONFIG_SAMDL_ADC is not set +# CONFIG_SAMDL_DAC is not set +# CONFIG_SAMDL_EVSYS is not set +# CONFIG_SAMDL_NVMCTRL is not set +# CONFIG_SAMDL_PTC is not set +# CONFIG_SAMDL_RTC is not set +# CONFIG_SAMDL_SERCOM0 is not set +# CONFIG_SAMDL_SERCOM1 is not set +# CONFIG_SAMDL_SERCOM2 is not set +CONFIG_SAMDL_SERCOM3=y +CONFIG_SAMDL_SERCOM4=y +# CONFIG_SAMDL_SERCOM5 is not set +# CONFIG_SAMDL_TC0 is not set +# CONFIG_SAMDL_TC1 is not set +# CONFIG_SAMDL_TC2 is not set +# CONFIG_SAMDL_TC3 is not set +# CONFIG_SAMDL_TC4 is not set +# CONFIG_SAMDL_TC5 is not set +# CONFIG_SAMDL_TC6 is not set +# CONFIG_SAMDL_TC7 is not set +# CONFIG_SAMDL_WDT is not set +# CONFIG_SAMDL_SERCOM3_ISI2C is not set +# CONFIG_SAMDL_SERCOM3_ISSPI is not set +CONFIG_SAMDL_SERCOM3_ISUSART=y +# CONFIG_SAMDL_SERCOM4_ISI2C is not set +# CONFIG_SAMDL_SERCOM4_ISSPI is not set +CONFIG_SAMDL_SERCOM4_ISUSART=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=3410 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMD20_XPLAINED=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="samd20-xplained" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# SAMD20 Xplained Pro Modules +# +# CONFIG_SAMD20_XPLAINED_IOMODULE is not set +# CONFIG_SAMD20_XPLAINED_OLED1MODULE is not set +# CONFIG_SAMD20_XPLAINED_USART4_EXT1 is not set +# CONFIG_SAMD20_XPLAINED_USART4_EXT2 is not set +CONFIG_SAMD20_XPLAINED_USART4_EXT3=y +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=12 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1536 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +CONFIG_ARCH_HAVE_USART4=y +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_USART4_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USART3_SERIAL_CONSOLE is not set +CONFIG_USART4_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=64 +CONFIG_USART3_TXBUFSIZE=64 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set + +# +# USART4 Configuration +# +CONFIG_USART4_RXBUFSIZE=64 +CONFIG_USART4_TXBUFSIZE=64 +CONFIG_USART4_BAUD=115200 +CONFIG_USART4_BITS=8 +CONFIG_USART4_PARITY=0 +CONFIG_USART4_2STOP=0 +# CONFIG_USART4_IFLOWCONTROL is not set +# CONFIG_USART4_OFLOWCONTROL is not set +# CONFIG_USART4_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +# CONFIG_NSH_DISABLE_DELROUTE is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/samd20-xplained/nsh/setenv.sh b/configs/samd20-xplained/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ef8ac510c8e8bdcd72f41b799a245780144ed5b7 --- /dev/null +++ b/configs/samd20-xplained/nsh/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/samd20-xplained/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/samd20-xplained/scripts/flash.ld b/configs/samd20-xplained/scripts/flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..849f6ff57266e810770d91ca4846cb1b78af4e36 --- /dev/null +++ b/configs/samd20-xplained/scripts/flash.ld @@ -0,0 +1,123 @@ +/**************************************************************************** + * configs/samd20-xplained/scripts/flash.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The ATSAMD20J18A has 256KB of FLASH beginning at address 0x0000:0000 and + * 32KB of SRAM beginning at address 0x2000:0000 + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } >flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } >flash + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > sram AT > flash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/samd20-xplained/src/.gitignore b/configs/samd20-xplained/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/samd20-xplained/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/samd20-xplained/src/Makefile b/configs/samd20-xplained/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..ea245faaac3c4ce228b29570b69f77ba5a2e1f29 --- /dev/null +++ b/configs/samd20-xplained/src/Makefile @@ -0,0 +1,69 @@ +############################################################################ +# configs/samd20-xplained/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c + +ifeq ($(CONFIG_SAMDL_SERCOM0),y) +CSRCS += sam_spi.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += sam_autoleds.c +else +CSRCS += sam_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += sam_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += sam_appinit.c +endif + +ifeq ($(CONFIG_SAMD20_XPLAINED_IOMODULE),y) +CSRCS += sam_mmcsd.c +endif + +ifeq ($(CONFIG_SAMD20_XPLAINED_OLED1MODULE),y) +ifeq ($(CONFIG_LCD_UG2832HSWEG04),y) +CSRCS += sam_ug2832hsweg04.c +endif +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/samd20-xplained/src/sam_appinit.c b/configs/samd20-xplained/src/sam_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..dd0ca0c9f308f82cba62ce09d93e5aab845a670b --- /dev/null +++ b/configs/samd20-xplained/src/sam_appinit.c @@ -0,0 +1,121 @@ +/**************************************************************************** + * config/samd20-xplained/src/sam_appinit.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "sam_config.h" +#include "samd20-xplained.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Some configuration checks */ + +#ifdef CONFIG_SAMD20_XPLAINED_IOMODULE_EXT1 +# ifndef SAMDL_HAVE_SPI0 +# error I/O1 module on EXT1 requires SERCOM SPI0 +# undef CONFIG_SAMD20_XPLAINED_IOMODULE +# endif +# define SPI_PORTNO 0 +#endif + +#ifdef CONFIG_SAMD20_XPLAINED_IOMODULE_EXT2 +# ifndef SAMDL_HAVE_SPI1 +# error I/O1 module on EXT2 requires SERCOM SPI1 +# undef CONFIG_SAMD20_XPLAINED_IOMODULE +# endif +# define SPI_PORTNO 1 +#endif + +#ifdef CONFIG_SAMD20_XPLAINED_IOMODULE +/* Support for the SD card slot on the I/O1 module */ +/* Verify NSH PORT and SLOT settings */ + +# define SAMDL_MMCSDSLOTNO 0 /* There is only one slot */ + +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != SAMDL_MMCSDSLOTNO +# error Only one MMC/SD slot: Slot 0 (CONFIG_NSH_MMCSDSLOTNO) +# endif + +# if defined(CONFIG_NSH_MMCSDSPIPORTNO) && CONFIG_NSH_MMCSDSPIPORTNO != SPI_PORTNO +# error CONFIG_NSH_MMCSDSPIPORTNO must have the same value as SPI_PORTNO +# endif + +/* Default MMC/SD minor number */ + +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(SAMDL_HAVE_SPI0) && defined(CONFIG_SAMD20_XPLAINED_IOMODULE) + /* Initialize the SPI-based MMC/SD slot */ + + { + int ret = sam_sdinitialize(SPI_PORTNO, CONFIG_NSH_MMCSDMINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize MMC/SD slot: %d\n", + ret); + return ret; + } + } +#endif + + return OK; +} diff --git a/configs/samd20-xplained/src/sam_autoleds.c b/configs/samd20-xplained/src/sam_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..7b88426aee7be6c99f855294848fe3804d8a9029 --- /dev/null +++ b/configs/samd20-xplained/src/sam_autoleds.c @@ -0,0 +1,178 @@ +/**************************************************************************** + * configs/samd20-xplained/src/sam_autoleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are three LEDs on board the SAMD20 Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labelled STATUS near the SAMD20 USB + * connector. + * + * This LED is controlled by PA14 and the LED can be activated by driving PA14 + * to GND. + * + * When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control the LED as follows: + * + * SYMBOL Meaning LED + * ------------------- ----------------------- ------ + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt** N/C + * LED_SIGNAL In a signal handler*** N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus if the LED is statically on, NuttX has successfully booted and is, + * apparently, running normally. If the LED is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_port.h" +#include "samd20-xplained.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + (void)sam_configport(PORT_STATUS_LED); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool ledstate = true; + + switch (led) + { + case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */ + /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */ + /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */ + break; /* Leave ledstate == true to turn OFF */ + + default: + case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */ + /* LED_SIGNAL: In a signal handler STATUS LED=N/C */ + /* LED_ASSERTION: An assertion failed STATUS LED=N/C */ + return; /* Return to leave STATUS LED unchanged */ + + case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */ + case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */ + ledstate = false; /* Set ledstate == false to turn ON */ + break; + } + + sam_portwrite(PORT_STATUS_LED, ledstate); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + /* These should not happen and are ignored */ + + default: + case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */ + /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */ + /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */ + case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */ + + /* These result in no-change */ + + case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */ + /* LED_SIGNAL: In a signal handler STATUS LED=N/C */ + /* LED_ASSERTION: An assertion failed STATUS LED=N/C */ + return; /* Return to leave STATUS LED unchanged */ + + /* Turn STATUS LED off set driving the output high */ + + case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */ + sam_portwrite(PORT_STATUS_LED, true); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/samd20-xplained/src/sam_boot.c b/configs/samd20-xplained/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..8ea3d0ba3ecee2bb9297f511432f7bac1c8f103e --- /dev/null +++ b/configs/samd20-xplained/src/sam_boot.c @@ -0,0 +1,89 @@ +/************************************************************************************ + * configs/samd20-xplained/src/sam_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "sam_config.h" +#include "samd20-xplained.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * sam_spidev_initialize() has been brought into the link. + */ + +#ifdef SAMDL_HAVE_SPI + if (sam_spidev_initialize) + { + sam_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/samd20-xplained/src/sam_buttons.c b/configs/samd20-xplained/src/sam_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..368014f2bce74bc9c74e9846ee4dd60ad904e3f1 --- /dev/null +++ b/configs/samd20-xplained/src/sam_buttons.c @@ -0,0 +1,160 @@ +/**************************************************************************** + * configs/samd20-xplained/src/sam_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "sam_port.h" +#include "samd20-xplained.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_PORTA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +static xcpt_t g_irqsw0; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state of + * all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + (void)sam_configport(PORT_SW0); +} + +/************************************************************************************ + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be called to collect + * the state of all buttons. board_buttons() returns an 8-bit bit set with each bit + * associated with a button. See the BUTTON* definitions above for the meaning of + * each bit in the returned value. + * + ************************************************************************************/ + +uint8_t board_buttons(void) +{ + return sam_portread(PORT_SW0) ? 0 : BUTTON_SW0_BIT; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address isreturned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_AVR32_PORTIRQ must be selected to enable the + * overall PORT IRQ feature and CONFIG_AVR32_PORTIRQSETA and/or + * CONFIG_AVR32_PORTIRQSETB must be enabled to select PORTs to support + * interrupts on. For button support, bits 2 and 3 must be set in + * CONFIG_AVR32_PORTIRQSETB (PB2 and PB3). + * + ****************************************************************************/ + +#if defined(CONFIG_PORTA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id == BUTTON_SW0) + { + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = *g_irqsw0; + *g_irqsw0 = irqhandler; + + /* Configure the interrupt */ + + sam_portirq(IRQ_SW0); + (void)irq_attach(IRQ_SW0, irqhandler); + sam_portirqenable(IRQ_SW0); + leave_critical_section(flags); + } + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/samd20-xplained/src/sam_mmcsd.c b/configs/samd20-xplained/src/sam_mmcsd.c new file mode 100644 index 0000000000000000000000000000000000000000..b183eda7426e8763c53b05e44d365dfbd5c82beb --- /dev/null +++ b/configs/samd20-xplained/src/sam_mmcsd.c @@ -0,0 +1,127 @@ +/**************************************************************************** + * config/samd20-xplained/src/sam_mmcsd.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_config.h" +#include "sam_spi.h" + +#include "samd20-xplained.h" + +#ifdef CONFIG_SAMD20_XPLAINED_IOMODULE + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# error Mountpoints are disabled (CONFIG_DISABLE_MOUNTPOINT=y) +#endif + +#ifndef SAMDL_HAVE_SPI0 +# error SERCOM0 SPI support is required +#endif + +#ifndef CONFIG_MMCSD +# error MMC/SD support is required (CONFIG_MMCSD) +#endif + +#define SAMDL_MMCSDSLOTNO 0 /* There is only one slot */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires + * - CONFIG_SAMD20_XPLAINED_IOMODULE=y, + * - CONFIG_DISABLE_MOUNTPOINT=n, + * - CONFIG_MMCSD=y, and + * - SAMDL_HAVE_SPI0=y (CONFIG_SAMDL_SERCOM0 && CONFIG_SAMDL_SERCOM0_ISSPI) + * + ****************************************************************************/ + +int sam_sdinitialize(int port, int minor) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI driver instance for the SD chip select */ + + fvdbg("Initializing SERCOM SPI%d\n", port); + + spi = sam_spibus_initialize(port); + if (!spi) + { + fdbg("Failed to initialize SPI%d\n", port); + return -ENODEV; + } + + fvdbg("Successfully initialized SPI%d\n", port); + + /* Bind the SPI device for the chip select to the slot */ + + fvdbg("Binding SPI%d to MMC/SD slot %d\n", port, SAMDL_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(minor, SAMDL_MMCSDSLOTNO, spi); + if (ret < 0) + { + fdbg("Failed to bind SPI%d to MMC/SD slot %d: %d\n", + port, SAMDL_MMCSDSLOTNO, ret); + return ret; + } + + fvdbg("Successfuly bound SPI%d to MMC/SD slot %d\n", + port, SAMDL_MMCSDSLOTNO); + + return OK; +} + +#endif /* CONFIG_SAMD20_XPLAINED_IOMODULE */ diff --git a/configs/samd20-xplained/src/sam_spi.c b/configs/samd20-xplained/src/sam_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..21a9f681fa3d3d4e3325b451803ba75a0a0f9022 --- /dev/null +++ b/configs/samd20-xplained/src/sam_spi.c @@ -0,0 +1,446 @@ +/**************************************************************************** + * configs/samd20-xplained/src/sam_spi.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_config.h" +#include "sam_port.h" +#include "sam_spi.h" + +#include "samd20-xplained.h" + +#ifdef SAMDL_HAVE_SPI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select PORT pins for the SAMD20 Xplained + * Pro board. + * + ****************************************************************************/ + +void weak_function sam_spidev_initialize(void) +{ + /* The I/O module containing the SD connector may or may not be installed. And, if + * it is installed, it may be in connector EXT1 or EXT2. + */ + +#ifdef CONFIG_SAMD20_XPLAINED_IOMODULE + /* TODO: enable interrupt on card detect */ + + sam_configport(PORT_SD_CD); /* Card detect input */ + sam_configport(PORT_SD_CS); /* Chip select output */ +#endif + +#ifdef CONFIG_SAMD20_XPLAINED_OLED1MODULE + sam_configport(PORT_OLED_DATA); /* Command/data */ + sam_configport(PORT_OLED_CS); /* Card detect input */ +#endif +} + +/**************************************************************************** + * Name: sam_spi[n]select, sam_spi[n]status, and sam_spi[n]cmddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * include: + * + * o sam_spi[n]select is a functions to manage the board-specific chip + * selects + * o sam_spi[n]status and sam_spi[n]cmddata: Implementations of the status + * and cmddata methods of the SPI interface defined by struct spi_ops_ + * (see include/nuttx/spi/spi.h). All other methods including + * sam_spibus_initialize()) are provided by common SAMD/L logic. + * + * Where [n] is the SERCOM number for the SPI module. + * + * To use this common SPI logic on your board: + * + * 1. Provide logic in sam_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide sam_spi[n]select() and sam_spi[n]status() functions in your + * board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * sam_spi[n]cmddata() functions in your board-specific logic. This + * function will perform cmd/data selection operations using GPIOs in + * the way your board is configured. + * 3. Add a call to sam_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by sam_spibus_initialize() may then be used to bind + * the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spi[n]select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * GPIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the GPIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * dev - SPI device info + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef SAMDL_HAVE_SPI0 +void sam_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +#ifdef CONFIG_SAMD20_XPLAINED_IOMODULE_EXT1 + /* Select/de-select the SD card */ + + if (devid == SPIDEV_MMCSD) + { + /* Active low */ + + sam_portwrite(PORT_SD_CS, !selected); + } +#endif + +#ifdef CONFIG_SAMD20_XPLAINED_OLED1MODULE_EXT1 + /* Select/de-select the OLED */ + + if (devid == SPIDEV_DISPLAY) + { + /* Active low */ + + sam_portwrite(PORT_OLED_CS, !selected); + } +#endif +} +#endif + +#ifdef SAMDL_HAVE_SPI1 +void sam_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +#ifdef CONFIG_SAMD20_XPLAINED_IOMODULE_EXT2 + /* Select/de-select the SD card */ + + if (devid == SPIDEV_MMCSD) + { + /* Active low */ + + sam_portwrite(PORT_SD_CS, !selected); + } +#endif + +#ifdef CONFIG_SAMD20_XPLAINED_OLED1MODULE_EXT2 + /* Select/de-select the OLED */ + + if (devid == SPIDEV_DISPLAY) + { + /* Active low */ + + sam_portwrite(PORT_OLED_CS, !selected); + } +#endif +} +#endif + +#ifdef SAMDL_HAVE_SPI2 +void sam_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +} +#endif + +#ifdef SAMDL_HAVE_SPI3 +void sam_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +} +#endif + +#ifdef SAMDL_HAVE_SPI4 +void sam_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +} +#endif + +#ifdef SAMDL_HAVE_SPI5 +void sam_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +} +#endif + +/**************************************************************************** + * Name: sam_spi[n]status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * dev - SPI device info + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef SAMDL_HAVE_SPI0 +uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + +#ifdef CONFIG_SAMD20_XPLAINED_IOMODULE_EXT1 + /* Check if an SD card is present in the microSD slot */ + + if (devid == SPIDEV_MMCSD) + { + /* Active low */ + + if (!sam_portread(PORT_SD_CD)) + { + ret |= SPI_STATUS_PRESENT; + } + } +#endif + + return ret; +} +#endif + +#ifdef SAMDL_HAVE_SPI1 +uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + +#ifdef CONFIG_SAMD20_XPLAINED_IOMODULE_EXT2 + /* Check if an SD card is present in the microSD slot */ + + if (devid == SPIDEV_MMCSD) + { + /* Active low */ + + if (!sam_portread(PORT_SD_CD)) + { + ret |= SPI_STATUS_PRESENT; + } + } +#endif + + return ret; +} +#endif + +#ifdef SAMDL_HAVE_SPI2 +uint8_t sam_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef SAMDL_HAVE_SPI3 +uint8_t sam_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef SAMDL_HAVE_SPI4 +uint8_t sam_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef SAMDL_HAVE_SPI5 +uint8_t sam_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + return ret; +} +#endif + +/**************************************************************************** + * Name: sam_spi[n]cmddata + * + * Description: + * Some SPI devices require an additional control to determine if the SPI + * data being sent is a command or is data. If CONFIG_SPI_CMDDATA then + * this function will be called to different be command and data transfers. + * + * This is often needed, for example, by LCD drivers. Some LCD hardware + * may be configured to use 9-bit data transfers with the 9th bit + * indicating command or data. That same hardware may be configurable, + * instead, to use 8-bit data but to require an additional, board- + * specific GPIO control to distinguish command and data. This function + * would be needed in that latter case. + * + * Input Parameters: + * dev - SPI device info + * devid - Identifies the (logical) device + * + * Returned Values: + * Zero on success; a negated errno on failure. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef SAMDL_HAVE_SPI0 +int sam_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#ifdef CONFIG_SAMD20_XPLAINED_OLED1MODULE_EXT1 + if (devid == SPIDEV_DISPLAY) + { + /* This is the Data/Command control pad which determines whether the + * data bits are data or a command. + * + * High: the inputs are treated as display data. + * Low: the inputs are transferred to the command registers. + */ + + (void)sam_portwrite(PORT_OLED_DATA, !cmd); + } +#endif + + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI1 +int sam_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#ifdef CONFIG_SAMD20_XPLAINED_OLED1MODULE_EXT2 + if (devid == SPIDEV_DISPLAY) + { + /* This is the Data/Command control pad which determines whether the + * data bits are data or a command. + * + * High: the inputs are treated as display data. + * Low: the inputs are transferred to the command registers. + */ + + (void)sam_portwrite(PORT_OLED_DATA, !cmd); + } +#endif + + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI2 +int sam_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI3 +int sam_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI4 +int sam_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI5 +int sam_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#endif /* CONFIG_SPI_CMDDATA */ +#endif /* SAMDL_HAVE_SPI */ diff --git a/configs/samd20-xplained/src/sam_ug2832hsweg04.c b/configs/samd20-xplained/src/sam_ug2832hsweg04.c new file mode 100644 index 0000000000000000000000000000000000000000..ee1f37d0f665fe9b5a276863dee038f0dc42c75a --- /dev/null +++ b/configs/samd20-xplained/src/sam_ug2832hsweg04.c @@ -0,0 +1,214 @@ +/**************************************************************************** + * config/samd20-xplained/src/sam_ug2832hsweg04.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* OLED1 Connector: + * + * OLED1 CONNECTOR + * ----------------- ---------------------- ---------------------- + * OLED1 EXT1 EXT2 + * ----------------- ---------------------- ---------------------- + * 1 ID 1 1 + * ----------------- ---------------------- ---------------------- + * 2 GND 2 GND 2 GND + * ----------------- ---------------------- ---------------------- + * 3 BUTTON2 3 PB00 AIN[8] 3 PA10 AIN[18] + * ----------------- ---------------------- ---------------------- + * 4 BUTTON3 4 PB01 AIN[9] 4 PA11 AIN[19] + * ----------------- ---------------------- ---------------------- + * 5 DATA_CMD_SEL 5 PB06 PORT 5 PA20 PORT + * ----------------- ---------------------- ---------------------- + * 6 LED3 6 PB07 PORT 6 PA21 PORT + * ----------------- ---------------------- ---------------------- + * 7 LED1 7 PB02 TC6/WO[0] 7 PA22 TC4/WO[0] + * ----------------- ---------------------- ---------------------- + * 8 LED2 8 PB03 TC6/WO[1] 8 PA23 TC4/WO[1] + * ----------------- ---------------------- ---------------------- + * 9 BUTTON1 9 PB04 EXTINT[4] 9 PB14 EXTINT[14] + * ----------------- ---------------------- ---------------------- + * 10 DISPLAY_RESET 10 PB05 PORT 10 PB15 PORT + * ----------------- ---------------------- ---------------------- + * 11 N/C 11 PA08 SERCOM2 PAD[0] 11 PA08 SERCOM2 PAD[0] + * I²C SDA I²C SDA + * ----------------- ---------------------- ---------------------- + * 12 N/C 12 PA09 SERCOM2 PAD[1] 12 PA09 SERCOM2 PAD[1] + * I²C SCL I²C SCL + * ----------------- ---------------------- ---------------------- + * 13 N/C 13 PB09 SERCOM4 PAD[1] 13 PB13 SERCOM4 PAD[1] + * USART RX USART RX + * ----------------- ---------------------- ---------------------- + * 14 N/C 14 PB08 SERCOM4 PAD[0] 14 PB12 SERCOM4 PAD[0] + * USART TX USART TX + * ----------------- ---------------------- ---------------------- + * 15 DISPLAY_SS 15 PA05 SERCOM0 PAD[1] 15 PA17 SERCOM1 PAD[1] + * SPI SS SPI SS + * ----------------- ---------------------- ---------------------- + * 16 SPI_MOSI 16 PA06 SERCOM0 PAD[2] 16 PA18 SERCOM1 PAD[2] + * SPI MOSI SPI MOSI + * ----------------- ---------------------- ---------------------- + * 17 N/C 17 PA04 SERCOM0 PAD[0] 17 PA16 SERCOM1 PAD[0] + * SPI MISO SPI MISO + * ----------------- ---------------------- ---------------------- + * 18 SPI_SCK 18 PA07 SERCOM0 PAD[3] 18 PA19 SERCOM1 PAD[3] + * SPI SCK SPI SCK + * ----------------- ---------------------- ---------------------- + * 19 GND 19 GND GND + * ----------------- ---------------------- ---------------------- + * 20 VCC 20 VCC VCC + * ----------------- ---------------------- ---------------------- + * + * OLED1 signals + * + * DATA_CMD_SEL - Data/command select. Used to choose whether the + * communication is data to the display memory or a command to the LCD + * controller. High = data, low = command + * DISPLAY_RESET - Reset signal to the OLED display, active low. Used during + * initialization of the display. + * DISPLAY_SS - SPI slave select signal, must be held low during SPI + * communication. + * SPI_MOSI - SPI master out, slave in signal. Used to write data to the + * display + * SPI_SCK SPI - clock signal, generated by the master. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include "sam_port.h" +#include "sam_spi.h" + +#include "samd20-xplained.h" + +#ifdef CONFIG_SAMD20_XPLAINED_OLED1MODULE + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* The pin configurations here require that SPI1 is selected */ + +#ifndef CONFIG_LCD_SSD1306 +# error "The OLED driver requires CONFIG_LCD_SSD1306 in the configuration" +#endif + +#ifndef CONFIG_LCD_UG2832HSWEG04 +# error "The OLED driver requires CONFIG_LCD_UG2832HSWEG04 in the configuration" +#endif + +#ifndef SAMDL_HAVE_SPI0 +# error "The OLED driver requires SAMDL_HAVE_SPI0 in the configuration" +#endif + +#ifndef CONFIG_SPI_CMDDATA +# error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration" +#endif + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) dbg(format, ##__VA_ARGS__) +# define lcdvdbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED PORTs. This initial configuration is RESET low, + * putting the OLED into reset state. + */ + + (void)sam_configport(PORT_OLED_RST); + + /* Wait a bit then release the OLED from the reset state */ + + up_mdelay(20); + sam_portwrite(PORT_OLED_RST, true); + + /* Get the SPI1 port interface */ + + spi = sam_spibus_initialize(OLED_CSNO); + if (!spi) + { + lcddbg("Failed to initialize SPI port 1\n"); + } + else + { + /* Bind the SPI port to the OLED */ + + dev = ssd1306_initialize(spi, devno); + if (!dev) + { + lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno); + } + else + { + lcdvdbg("Bound SPI port 1 to OLED %d\n", devno); + + /* And turn the OLED on */ + + (void)dev->setpower(dev, CONFIG_LCD_MAXPOWER); + return dev; + } + } + + return NULL; +} +#endif /* CONFIG_SAMD20_XPLAINED_OLED1MODULE */ diff --git a/configs/samd20-xplained/src/sam_userleds.c b/configs/samd20-xplained/src/sam_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..985ae1dbba9fbf27946d53e11111a360629c993b --- /dev/null +++ b/configs/samd20-xplained/src/sam_userleds.c @@ -0,0 +1,143 @@ +/**************************************************************************** + * configs/samd20-xplained/src/sam_userleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are three LEDs on board the SAMD20 Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labeled STATUS near the SAMD20 USB + * connector. + * + * This LED is controlled by PA14 and the LED can be activated by driving PA14 + * to GND. + * + * When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control the LED. Otherwise, the LED can be controlled from user applications + * using the logic in this file. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_port.h" +#include "samd20-xplained.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the + * board_userled_initialize() is available to initialize the LED from user + * application logic. + * + ****************************************************************************/ + +void board_userled_initialize(void) +{ + (void)sam_configport(PORT_STATUS_LED); +} + +/**************************************************************************** + * Name: board_userled + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled() is + * available to control the LED from user application logic. + * + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_STATUS_LED) + { + sam_portwrite(PORT_STATUS_LED, !ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled_all() is + * available to control the LED from user application logic. NOTE: since + * there is only a single LED on-board, this is function is not very useful. + * + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + board_userled(BOARD_STATUS_LED, (ledset & BOARD_STATUS_LED_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/samd20-xplained/src/samd20-xplained.h b/configs/samd20-xplained/src/samd20-xplained.h new file mode 100644 index 0000000000000000000000000000000000000000..79875c5a8a74813f0702bc17977135aefd64ebc7 --- /dev/null +++ b/configs/samd20-xplained/src/samd20-xplained.h @@ -0,0 +1,264 @@ +/************************************************************************************ + * configs/samd20-xplained/src/samd20-xplained.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMD20_XPLAINED_SRC_SAMD20_XPLAINED_H +#define __CONFIGS_SAMD20_XPLAINED_SRC_SAMD20_XPLAINED_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +#include +#include + +#include "sam_config.h" +#include "sam_pinmap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* LEDs: There are three LEDs on board the SAMD20 Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labelled STATIS near the SAMD20 USB + * connector. + * + * This LED is controlled by PA14 and the LED can be activated by driving PA14 + * to GND. + * + * When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control the LED as follows: + * + * SYMBOL Meaning LED + * ------------------- ----------------------- ------ + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt N/C + * LED_SIGNAL In a signal handler N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus if the LED is statically on, NuttX has successfully booted and is, + * apparently, running normally. If the LED is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +#define PORT_STATUS_LED (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTA | PORT_PIN14) + +/* Mechanical buttons: + * + * The SAMD20 Xplained Pro contains two mechanical buttons. One button is the + * RESET button connected to the SAMD20 reset line and the other is a generic user + * configurable button. When a button is pressed it will drive the I/O line to GND. + * + * PA15 SW0 + */ + +#define PORT_SW0 (PORT_INTERRUPT | PORT_PULL_UP | PORTA | PORT_PIN15) +#define IRQ_SW0 SAM_IRQ_PA15 + +/* I/O1 + * + * Support for the microSD card slot on the I/O1 module. The I/O1 requires + * SPI support and two PORTs. These the PORTs will vary if the I/O1 + * is installed on the EXT1 or EXT2 connector: + * + * --- ------------------ ---------------------- ------------------------------- + * PIN EXT1 EXT2 Description + * --- ------------------ ---------------------- ------------------------------- + * 15 PA05 SERCOM0 PAD[1] 15 PA17 SERCOM1 PAD[1] Active low chip select OUTPUT, + * SPI SS SPI SS pulled high on board. + * --- ------------------ ---------------------- ------------------------------- + * 10 PB05 PORT 10 PB15 PORT Active low card detect INPUT, + * must use internal pull-up. + * --- ------------------ ---------------------- ------------------------------- + */ + +#ifdef CONFIG_SAMD20_XPLAINED_IOMODULE + +# ifndef SAMDL_HAVE_SPI0 +# error SAMDL_HAVE_SPI0 is required to use the I/O1 module +# endif + +# if defined(CONFIG_SAMD20_XPLAINED_IOMODULE_EXT1) + +# if defined(CONFIG_SAMD20_XPLAINED_OLED1MODULE) && \ + defined(CONFIG_SAMD20_XPLAINED_OLED1MODULE_EXT1) +# error I/O1 and OLED1 modules cannot both reside in EXT1 +# endif + +# define PORT_SD_CD (PORT_INTERRUPT | PORT_INT_CHANGE | PORT_PULL_UP | \ + PORTB | PORT_PIN5) + +# define PORT_SD_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTA | PORT_PIN5) + +# elif defined(CONFIG_SAMD20_XPLAINED_IOMODULE_EXT2) + +# if defined(CONFIG_SAMD20_XPLAINED_OLED1MODULE) && \ + defined(CONFIG_SAMD20_XPLAINED_OLED1MODULE_EXT2) +# error I/O1 and OLED1 modules cannot both reside in EXT2 +# endif + +# define PORT_SD_CD (PORT_INTERRUPT | PORT_INT_CHANGE | PORT_PULL_UP | \ + PORTB | PORT_PIN15) + +# define PORT_SD_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTA | PORT_PIN17) + +# else +# error Which connector is the I/O1 module installed in? +# endif +#endif + +/* OLED1 + * + * Support for the microSD card slot on the I/O1 module. The I/O1 requires + * SPI support and three output PORTs. These the PORTs will vary if the OLED1 + * is installed on the EXT1 or EXT2 connector: + * + * + * PIN EXT1 EXT2 Description + * --- ------------------- -------------------- ------------------------------------- + * 5 PB06 PORT PA20 PORT DATA_CMD_SEL + * 10 PB05 PORT PB15 PORT DISPLAY_RESET. Active low. + * 15 PA05 SERCOM0 PAD[1] PA17 SERCOM1 PAD[1] DISPLAY_SS. Active low. + * SPI SS SPI SS + */ + +#ifdef CONFIG_SAMD20_XPLAINED_OLED1MODULE + +# ifndef SAMDL_HAVE_SPI0 +# error SAMDL_HAVE_SPI0 is required to use the OLED1 module +# endif + +# ifndef CONFIG_SPI_CMDDATA +# error CONFIG_SPI_CMDDATA is required to use the OLED1 module +# endif + +# ifndef CONFIG_LCD_SSD1306 +# error CONFIG_LCD_SSD1306 is required to use the OLED1 module +# endif + +# ifndef CONFIG_LCD_UG2832HSWEG04 +# error CONFIG_LCD_UG2832HSWEG04 is required to use the OLED1 module +# endif + +# if defined(CONFIG_SAMD20_XPLAINED_OLED1MODULE_EXT1) + +# if defined(CONFIG_SAMD20_XPLAINED_IOMODULE) && \ + defined(CONFIG_SAMD20_XPLAINED_IOMODULE_EXT1) +# error OLED1 and I/O1 modules cannot both reside in EXT1 +# endif + +# define PORT_OLED_DATA (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \ + PORTB | PORT_PIN6) +# define PORT_OLED_RST (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \ + PORTB | PORT_PIN5) +# define PORT_OLED_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTA | PORT_PIN5) + +# elif defined(CONFIG_SAMD20_XPLAINED_OLED1MODULE_EXT2) + +# if defined(CONFIG_SAMD20_XPLAINED_IOMODULE) && \ + defined(CONFIG_SAMD20_XPLAINED_IOMODULE_EXT2) +# error OLED1 and I/O1 modules cannot both reside in EXT2 +# endif + +# define PORT_OLED_DATA (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \ + PORTA | PORT_PIN20) +# define PORT_OLED_RST (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \ + PORTB | PORT_PIN15) +# define PORT_OLED_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTA | PORT_PIN17) + +# else +# error Which connector is the OLED1 module installed in? +# endif +#endif + +#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) +# define PORT_SD_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTB | PORT_PIN11) /* REVISIT */ +#endif + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select PORT pins for the SAM3U-EK board. + * + ************************************************************************************/ + +void weak_function sam_spidev_initialize(void); + +/************************************************************************************ + * Name: sam_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires CONFIG_SAMD20_XPLAINED_IOMODULE=y, + * CONFIG_DISABLE_MOUNTPOINT=n, CONFIG_MMCSD=y, and the appropriate SERCOM SPI + * port enabled. + * + ************************************************************************************/ + +#ifdef CONFIG_SAMD20_XPLAINED_IOMODULE +int sam_sdinitialize(int port, int minor); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAMD20_XPLAINED_SRC_SAMD20_XPLAINED_H */ + diff --git a/configs/samd21-xplained/Kconfig b/configs/samd21-xplained/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..a6ed51dd4fa0e888220b34c3501f295cfa87adaa --- /dev/null +++ b/configs/samd21-xplained/Kconfig @@ -0,0 +1,82 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAMD21_XPLAINED + +menu "SAMD21 Xplained Pro Modules" + +config SAMD21_XPLAINED_IOMODULE + bool "I/O1 Module" + default n + ---help--- + The I/O 1 module is attached. This module provides an MMC/SD card + slot. + +if SAMD21_XPLAINED_IOMODULE + +choice + prompt "I/O1 Module Location" + default SAMD21_XPLAINED_IOMODULE_EXT1 + +config SAMD21_XPLAINED_IOMODULE_EXT1 + bool "EXT1" + +config SAMD21_XPLAINED_IOMODULE_EXT2 + bool "EXT2" + +endchoice +endif + +config SAMD21_XPLAINED_OLED1MODULE + bool "OLED1 Module" + default n + ---help--- + The OLED 1 module is attached. This module provides an OLED plus 3 + additional switches and 3 additional LEDs. + +if SAMD21_XPLAINED_OLED1MODULE + +choice + prompt "OLED1 Module Location" + default SAMD21_XPLAINED_OLED1MODULE_EXT1 + +config SAMD21_XPLAINED_OLED1MODULE_EXT1 + bool "EXT1" + +config SAMD21_XPLAINED_OLED1MODULE_EXT2 + bool "EXT2" + +endchoice +endif +endmenu + +if USART4_SERIAL_CONSOLE +choice + prompt "USART 4 Connection" + default SAMD21_XPLAINED_USART4_EXT3 + +config SAMD21_XPLAINED_USART4_EXT1 + bool "EXT1" + depends on !SAMD21_XPLAINED_OLED1MODULE_EXT1 && !SAMD21_XPLAINED_IOMODULE_EXT1 + ---help--- + Select this option if the serial console is on SERCOM4 connected via + EXT1. The RX will be on PB9 and TX signal will be on PB8. + +config SAMD21_XPLAINED_USART4_EXT2 + bool "EXT2" + depends on !SAMD21_XPLAINED_OLED1MODULE_EXT2 && !SAMD21_XPLAINED_IOMODULE_EXT2 + ---help--- + Select this option if the serial console is on SERCOM4 connected via + EXT2. The RX will be on PB13 and TX signal will be on PB12. + +config SAMD21_XPLAINED_USART4_EXT3 + bool "EXT3" + ---help--- + Select this option if the serial console is on SERCOM4 connect via + EXT3. The RX will be on PB11 and TX signal will be on PB10. + +endchoice +endif +endif diff --git a/configs/samd21-xplained/README.txt b/configs/samd21-xplained/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..c000821cb35eb76302f1d01b8a3b8adfca3b0c0a --- /dev/null +++ b/configs/samd21-xplained/README.txt @@ -0,0 +1,755 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +Atmel SAMD21 Xplained Pro development board. This board features the +ATSAMD21J18A MCU. + +The SAMD21 Xplained Pro Starter Kit may be bundled with three modules: + +1) I/O1 - An MMC/SD card slot, PWM LED control, ADC light sensor, USART + loopback, TWI AT30TSE758 Temperature sensor. +2) OLED1 - An OLED plus 3 additional switches and 3 additional LEDs +3) PROTO1 - A prototyping board with logic on board (other than power-related + logic). + +Contents +======== + + - STATUS/ISSUES + - Modules + - LEDs + - Serial Consoles + - Atmel Studio 6.1 + - SAMD21 Xplained Pro-specific Configuration Options + - Configurations + +STATUS/ISSUES +============= + + 1. See configs/samd20-xplained/README.txt. This port derives from the + SAMD20 Xplained board board and all issues there should apply. + + 2. 2015-07-06: The basic NSH configuration is working properly, but + not at 115200 baud which is the default BAUD selection in the + configurations. It is necessary to drop the BAUD in the + configuration. + + I suspect that this is an issue on my board and due to running the + system on uncalibrated OSC8M. My bet is that the issue would not + exist on many boards or if OSC8M were calibrated or if a more precise + clock source were used (like XOSC32K). + + ... After more experimentation, I am not sure this conclusion is + correct or not. Perhaps the board just comes up with a bad clocking + configuration at times???? + +Modules +======= + + There are several I/O modules available that will work with the SAMD21 + Xplained Pro Starter Kit: + + 1) I/O1 - An MMC/SD card slot, PWM LED control, ADC light sensor, USART + loopback, TWI AT30TSE758 Temperature sensor. + 2) OLED1 - An OLED plus 3 additional switches and 3 additional LEDs + 3) PROTO1 - A prototyping board with logic on board (other than power- + related logic). + 4) And others. See http://www.atmel.com/products/microcontrollers/avr/xplained.aspx + + Some of these are discussed further below. + + I/O1 + ---- + The primary function of this module is to provide SD card support, but + the full list of modules features include: + + - microSD card connector (SPI interface) + - PWM (LED control) + - ADC (light sensor) + - USART loopback + - TWI AT30TSE758 Temperature sensor with EEPROM + + SPI is available on two of the SAMD21 Xplained connectors, EXT1 and EXT2. + They mate with the I/O1 connector as indicated in this table. + + I/O1 CONNECTOR + ----------------- ---------------------- ---------------------- ------------------------------------ + I/O1 EXT1 EXT2 Other use of either pin + ----------------- ---------------------- ---------------------- ------------------------------------ + 1 ID 1 1 Communication line to ID chip on + extension board. + ----------------- ---------------------- ---------------------- ------------------------------------ + 2 GND 2 GND 2 GND + ----------------- ---------------------- ---------------------- ------------------------------------ + 3 LIGHTSENSOR 3 PB00 AIN[8] 3 PA10 AIN[18] + ----------------- ---------------------- ---------------------- ------------------------------------ + 4 LP_OUT 4 PB01 AIN[9] 4 PA11 AIN[19] + ----------------- ---------------------- ---------------------- ------------------------------------ + 5 GPIO1 5 PB06 GPIO 5 PA20 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 6 GPIO2 6 PB07 GPIO 6 PA21 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 7 LED 7 PB02 TC6/WO[0] 7 PB12 TC4/WO[0] + ----------------- ---------------------- ---------------------- ------------------------------------ + 8 LP_IN 8 PB03 TC6/WO[1] 8 PB13 TC4/WO[1] + ----------------- ---------------------- ---------------------- ------------------------------------ + 9 TEMP_ALERT 9 PB04 EXTINT[4] 9 PB14 EXTINT[14] + ----------------- ---------------------- ---------------------- ------------------------------------ + 10 microSD_DETECT 10 PB05 GPIO 10 PB15 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 11 TWI SDA 11 PA08 SERCOM2 PAD[0] 11 PA08 SERCOM2 PAD[0] EXT1, EXT2, EXT3 and EDBG + I²C SDA I²C SDA + ----------------- ---------------------- ---------------------- ------------------------------------ + 12 TWI SCL 12 PA09 SERCOM2 PAD[1] 12 PA09 SERCOM2 PAD[1] EXT2, EXT3 and EDBG + I²C SCL I²C SCL + ----------------- ---------------------- ---------------------- ------------------------------------ + 13 USART RX 13 PB09 SERCOM4 PAD[1] 13 PB11 SERCOM4 PAD[1] EXT3 + USART RX USART RX + ----------------- ---------------------- ---------------------- ------------------------------------ + 14 USART TX 14 PB08 SERCOM4 PAD[0] 14 PB10 SERCOM4 PAD[0] EXT3 + USART TX USART TX + ----------------- ---------------------- ---------------------- ------------------------------------ + 15 microSD_SS 15 PA05 SERCOM0 PAD[1] 15 PA17 SERCOM1 PAD[1] + SPI SS SPI SS + ----------------- ---------------------- ---------------------- ------------------------------------ + 16 SPI_MOSI 16 PA06 SERCOM0 PAD[2] 16 PA18 SERCOM1 PAD[2] + SPI MOSI SPI MOSI + ----------------- ---------------------- ---------------------- ------------------------------------ + 17 SPI_MISO 17 PA04 SERCOM0 PAD[0] 17 PA16 SERCOM1 PAD[0] + SPI MISO SPI MISO + ----------------- ---------------------- ---------------------- ------------------------------------ + 18 SPI_SCK 18 PA07 SERCOM0 PAD[3] 18 PA19 SERCOM1 PAD[3] + SPI SCK SPI SCK + ----------------- ---------------------- ---------------------- ------------------------------------ + 19 GND 19 GND GND + ----------------- ---------------------- ---------------------- ------------------------------------ + 20 VCC 20 VCC VCC + ----------------- ---------------------- ---------------------- ------------------------------------ + + The mapping between the I/O1 pins and the SD connector are shown in the + following table. + + SD Card Connection + ------------------ + I/O1 SD PIN Description + ---- ---- --- ------------------------------------------------- + D2 1 Data line 2 (not used) + 15 D3 2 Data line 3. Active low chip select, pulled high + 16 CMD 3 Command line, connected to SPI_MOSI. + 20 VDD 4 + 18 CLK 5 Clock line, connected to SPI_SCK. + 2/19 GND 6 + 17 D0 7 Data line 0, connected to SPI_MISO. + D1 8 Data line 1 (not used) + 10 SW_A 9 Card detect + 2/19 SW_B 10 GND + + Card Detect + ----------- + When a microSD card is put into the connector SW_A and SW_B are short- + circuited. SW_A is connected to the microSD_DETECT signal. To use this + as a card indicator remember to enable internal pullup in the target + device. + + GPIOs + ----- + So all that is required to connect the SD is configure the SPI + + --- ------------------ ---------------------- ------------------------------------- + PIN EXT1 EXT2 Description + --- ------------------ ---------------------- ------------------------------------- + 15 PA05 SERCOM0 PAD[1] 15 PA17 SERCOM1 PAD[1] Active low chip select OUTPUT, pulled + SPI SS SPI SS high on board. + --- ------------------ ---------------------- ------------------------------------- + 10 PB05 GPIO 10 PB15 GPIO Active low card detect INPUT, must + use internal pull-up. + --- ------------------ ---------------------- ------------------------------------- + + Configuration Options: + ---------------------- + CONFIG_SAMD21_XPLAINED_IOMODULE=y : Informs the system that the + I/O1 module is installed + CONFIG_SAMD21_XPLAINED_IOMODULE_EXT1=y : The module is installed in EXT1 + CONFIG_SAMD21_XPLAINED_IOMODULE_EXT2=y : The mdoule is installed in EXT2 + + See the set-up in the discussion of the nsh configuration below for other + required configuration options. + + NOTE: As of this writing, only the SD card slot is supported in the I/O1 + module. + + OLED1 + ----- + This module provides an OLED plus 3 additional switches and 3 additional + LEDs. + + OLED1 CONNECTOR + ----------------- ---------------------- ---------------------- ------------------------------------ + OLED1 EXT1 EXT2 Other use of either pin + ----------------- ---------------------- ---------------------- ------------------------------------ + 1 ID 1 1 Communication line to ID chip on + extension board. + ----------------- ---------------------- ---------------------- ------------------------------------ + 2 GND 2 GND 2 GND + ----------------- ---------------------- ---------------------- ------------------------------------ + 3 BUTTON2 3 PB00 AIN[8] 3 PA10 AIN[18] + ----------------- ---------------------- ---------------------- ------------------------------------ + 4 BUTTON3 4 PB01 AIN[9] 4 PA11 AIN[19] + ----------------- ---------------------- ---------------------- ------------------------------------ + 5 DATA_CMD_SEL 5 PB06 GPIO 5 PA20 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 6 LED3 6 PB07 GPIO 6 PA21 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 7 LED1 7 PB02 TC6/WO[0] 7 PB12 TC4/WO[0] + ----------------- ---------------------- ---------------------- ------------------------------------ + 8 LED2 8 PB03 TC6/WO[1] 8 PB13 TC4/WO[1] + ----------------- ---------------------- ---------------------- ------------------------------------ + 9 BUTTON1 9 PB04 EXTINT[4] 9 PB14 EXTINT[14] + ----------------- ---------------------- ---------------------- ------------------------------------ + 10 DISPLAY_RESET 10 PB05 GPIO 10 PB15 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 11 N/C 11 PA08 SERCOM2 PAD[0] 11 PA08 SERCOM2 PAD[0] EXT1, EXT2, EXT3 and EDBG + I²C SDA I²C SDA + ----------------- ---------------------- ---------------------- ------------------------------------ + 12 N/C 12 PA09 SERCOM2 PAD[1] 12 PA09 SERCOM2 PAD[1] EXT2, EXT3 and EDBG + I²C SCL I²C SCL + ----------------- ---------------------- ---------------------- ------------------------------------ + 13 N/C 13 PB09 SERCOM4 PAD[1] 13 PB11 SERCOM4 PAD[1] EXT3 + USART RX USART RX + ----------------- ---------------------- ---------------------- ------------------------------------ + 14 N/C 14 PB08 SERCOM4 PAD[0] 14 PB10 SERCOM4 PAD[0] EXT3 + USART TX USART TX + ----------------- ---------------------- ---------------------- ------------------------------------ + 15 DISPLAY_SS 15 PA05 SERCOM0 PAD[1] 15 PA17 SERCOM1 PAD[1] + SPI SS SPI SS + ----------------- ---------------------- ---------------------- ------------------------------------ + 16 SPI_MOSI 16 PA06 SERCOM0 PAD[2] 16 PA18 SERCOM1 PAD[2] + SPI MOSI SPI MOSI + ----------------- ---------------------- ---------------------- ------------------------------------ + 17 N/C 17 PA04 SERCOM0 PAD[0] 17 PA16 SERCOM1 PAD[0] + SPI MISO SPI MISO + ----------------- ---------------------- ---------------------- ------------------------------------ + 18 SPI_SCK 18 PA07 SERCOM0 PAD[3] 18 PA19 SERCOM1 PAD[3] + SPI SCK SPI SCK + ----------------- ---------------------- ---------------------- ------------------------------------ + 19 GND 19 GND GND + ----------------- ---------------------- ---------------------- ------------------------------------ + 20 VCC 20 VCC VCC + ----------------- ---------------------- ---------------------- ------------------------------------ + + Configuration Options: + ---------------------- + CONFIG_SAMD21_XPLAINED_OLED1MODULE=y : Informs the system that the + I/O1 module is installed + CONFIG_SAMD21_XPLAINED_OLED1MODULE_EXT1=y : The module is installed in EXT1 + CONFIG_SAMD21_XPLAINED_OLED1MODULE_EXT2=y : The mdoule is installed in EXT2 + + See the set-up in the discussion of the nsh configuration below for other + required configuration options. + + PROTO1 + ------ + A prototyping board with logic on board (other than power-related logic). + There is no built-in support for the PROTO1 module. + +LEDs +==== + + There is one yellow LED available on the SAM D20 Xplained Pro board that + can be turned on and off. The LED can be activated by driving the connected + PB30 I/O line to GND. + + When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + control the LED as follows: + + SYMBOL Meaning LED0 + ------------------- ----------------------- ------ + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt N/C + LED_SIGNAL In a signal handler N/C + LED_ASSERTION An assertion failed N/C + LED_PANIC The system has crashed FLASH + + Thus is LED is statically on, NuttX has successfully booted and is, + apparently, running normally. If LED is flashing at approximately + 2Hz, then a fatal error has been detected and the system has halted. + +Serial Consoles +=============== + + SERCOM4 + ------ + + SERCOM4 is available on connectors EXT1, EXT2, and EXT3, but using + different PORT pins: + + PIN EXT1 EXT2 EXT3 GPIO Function + ---- ---- ---- ---- ------------------ + 13 PB09 PB10 PB10 SERCOM4 / USART RX + 14 PB08 PB11 PB11 SERCOM4 / USART TX + 19 GND GND GND N/A + 20 VCC VCC VCC N/A + + There are options available in the NuttX configuration to select which + connector SERCOM4 is on: SAMD21_XPLAINED_USART4_EXTn, where n=1, 2, or 3. + + If you have a TTL to RS-232 converter then this is the most convenient + serial console to use (because you don't lose the console device each time + you lose the USB connection). It is the default in all of these + configurations. An option is to use the virtual COM port. + + Virtual COM Port + ---------------- + + The SAMD21 Xplained Pro contains an Embedded Debugger (EDBG) that can be + used to program and debug the ATSAMD21J18A using Serial Wire Debug (SWD). + The Embedded debugger also include a Virtual COM port interface over + SERCOM3. Virtual COM port connections: + + PA22 SERCOM3 / USART TXD + PA23 SERCOM3 / USART RXD + +Atmel Studio 6.1 +================ + + Loading Code into FLASH: + ----------------------- + + Tools menus: Tools -> Device Programming. + + Debugging the NuttX Object File + ------------------------------- + + 1) Rename object file from nutt to nuttx.elf. That is an extension that + will be recognized by the file menu. + + 2) File menu: File -> Open -> Open object file for debugging + + - Select nuttx.elf object file + - Select AT91SAMD21J18 + - Select files for symbols as desired + - Select debugger + + 3) Debug menu: Debug -> Start debugging and break + + - This will reload the nuttx.elf file into FLASH + +SAMD21 Xplained Pro-specific Configuration Options +================================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM0=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="samdl" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_SAMD + CONFIG_ARCH_CHIP_SAMD21 + CONFIG_ARCH_CHIP_ATSAMD21J18 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=samd21-xplained (for the SAMD21 Xplained Pro development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SAMD21_XPLAINED=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64KB) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_SAMDL_AC - Analog Comparator + CONFIG_SAMDL_ADC - Analog-to-Digital Converter + CONFIG_SAMDL_DAC - Digital-to-Analog Converter + CONFIG_SAMDL_DMAC - Analog Comparator + CONFIG_SAMDL_EVSYS - Event System + CONFIG_SAMDL_NVMCTRL - Non-Volatile Memory Controller + CONFIG_SAMDL_PTC - Peripheral Touch Controller + CONFIG_SAMDL_RTC - Real Time Counter + CONFIG_SAMDL_SERCOM0 - Serial Communication Interface 0 + CONFIG_SAMDL_SERCOM1 - Serial Communication Interface 1 + CONFIG_SAMDL_SERCOM2 - Serial Communication Interface 2 + CONFIG_SAMDL_SERCOM3 - Serial Communication Interface 3 + CONFIG_SAMDL_SERCOM4 - Serial Communication Interface 4 + CONFIG_SAMDL_SERCOM5 - Serial Communication Interface 5 + CONFIG_SAMDL_TCC0 - Timer/Counter 0 for Control + CONFIG_SAMDL_TCC1 - Timer/Counter 1 for Control + CONFIG_SAMDL_TCC2 - Timer/Counter 2 for Control + CONFIG_SAMDL_TC3 - Timer/Counter 3 + CONFIG_SAMDL_TC4 - Timer/Counter 4 + CONFIG_SAMDL_TC5 - Timer/Counter 5 + CONFIG_SAMDL_TC6 - Timer/Counter 6 + CONFIG_SAMDL_TC7 - Timer/Counter 6 + CONFIG_SAMDL_USB - USB device or host + CONFIG_SAMDL_WDT - Watchdog Timer + + Some subsystems can be configured to operate in different ways. The drivers + need to know how to configure the subsystem. + + CONFIG_SAMDL_SERCOM0_ISI2C, CONFIG_SAMDL_SERCOM0_ISSPI, or CONFIG_SAMDL_SERCOM0_ISUSART + CONFIG_SAMDL_SERCOM1_ISI2C, CONFIG_SAMDL_SERCOM1_ISSPI, or CONFIG_SAMDL_SERCOM1_ISUSART + CONFIG_SAMDL_SERCOM2_ISI2C, CONFIG_SAMDL_SERCOM2_ISSPI, or CONFIG_SAMDL_SERCOM2_ISUSART + CONFIG_SAMDL_SERCOM3_ISI2C, CONFIG_SAMDL_SERCOM3_ISSPI, or CONFIG_SAMDL_SERCOM3_ISUSART + CONFIG_SAMDL_SERCOM4_ISI2C, CONFIG_SAMDL_SERCOM4_ISSPI, or CONFIG_SAMDL_SERCOM4_ISUSART + CONFIG_SAMDL_SERCOM5_ISI2C, CONFIG_SAMDL_SERCOM5_ISSPI, or CONFIG_SAMDL_SERCOM5_ISUSART + + SAMD21 specific device driver settings + + CONFIG_USARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,..5) for the + console and ttys0 (default is the USART4). + CONFIG_USARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_USARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_USARTn_BAUD - The configure BAUD of the USART. Must be + CONFIG_USARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_USARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_USARTn_2STOP - Two stop bits + +Configurations +============== + + Each SAMD21 Xplained Pro configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh samd21-xplained/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that BUILDROOT_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTE: These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output of on SERCOM4 which is available on EXT1, EXT2, or EXT3 (see + the section "Serial Consoles" above). The virtual COM port could + be used, instead, by reconfiguring to use SERCOM3 instead of + SERCOM4: + + System Type -> SAMD/L Peripheral Support + CONFIG_SAMDL_SERCOM3=y : Enable one or both + CONFIG_SAMDL_SERCOM4=n + + Device Drivers -> Serial Driver Support -> Serial Console + CONFIG_USART4_SERIAL_CONSOLE=y : Select only one for the console + CONFIG_USART4_SERIAL_CONSOLE=n + + Device Drivers -> Serial Driver Support -> SERCOM3 Configuration + CONFIG_USART3_2STOP=0 + CONFIG_USART3_BAUD=115200 + CONFIG_USART3_BITS=8 + CONFIG_USART3_PARITY=0 + CONFIG_USART3_RXBUFSIZE=256 + CONFIG_USART3_TXBUFSIZE=256 + + Device Drivers -> Serial Driver Support -> SERCOM4 Configuration + CONFIG_USART4_2STOP=0 + CONFIG_USART4_BAUD=115200 + CONFIG_USART4_BITS=8 + CONFIG_USART4_PARITY=0 + CONFIG_USART4_RXBUFSIZE=256 + CONFIG_USART4_TXBUFSIZE=256 + + Board Selection -> USART4 Connection + CONFIG_SAMD21_XPLAINED_USART4_EXT1=n : Pick on if USART4 used + CONFIG_SAMD21_XPLAINED_USART4_EXT2=n + CONFIG_SAMD21_XPLAINED_USART4_EXT3=y + + 3. Unless otherwise stated, the configurations are setup for + Cygwin under Windows: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Windows Host + CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on windoes + + 4. These configurations use the CodeSourcery toolchain. But + that is easily reconfigured: + + System Type -> Toolchain: + CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYW=y + + Any re-configuration should be done before making NuttX or else the + subsequent 'make' will fail. If you have already attempted building + NuttX then you will have to 1) 'make distclean' to remove the old + configuration, 2) 'cd tools; ./configure.sh sam3u-ek/ksnh' to start + with a fresh configuration, and 3) perform the configuration changes + above. + + Also, make sure that your PATH variable has the new path to your + Atmel tools. Try 'which arm-none-eabi-gcc' to make sure that you + are selecting the right tool. setenv.sh is available for you to + use to set or PATH variable. The path in the that file may not, + however, be correct for your installation. + + See also the "NOTE about Windows native toolchains" in the section + called "GNU Toolchain Options" above. + +Configuration sub-directories +----------------------------- + + nsh: + This configuration directory will built the NuttShell. See NOTES above + and below: + + NOTES: + + 1. This configuration is set up to build on Windows using the Cygwin + environment using the CodeSourcery toolchain. This can be easily + changed as described above under "Configurations." + + 2. By default, this configuration provides a serial console on SERCOM4 + at 115200 8N1 via EXT3: + + PIN EXT3 GPIO Function + ---- ---- ------------------ + 13 PB11 SERCOM4 / USART RX + 14 PB10 SERCOM4 / USART TX + 19 GND N/A + 20 VCC N/A + + If you would prefer to use the EDBG serial COM port or would prefer + to use SERCOM4 on EXT1 or EXT2, you will need to reconfigure the + SERCOM as described under "Configurations". See also the section + entitled "Serial Consoles" above. + + 3. NOTE: If you get a compilation error like: + + libxx_new.cxx:74:40: error: 'operator new' takes type 'size_t' + ('unsigned int') as first parameter [-fper + + Sometimes NuttX and your toolchain will disagree on the underlying + type of size_t; sometimes it is an 'unsigned int' and sometimes it is + an 'unsigned long int'. If this error occurs, then you may need to + toggle the value of CONFIG_CXX_NEWLONG. + + 4. If the I/O1 module is connected to the SAMD21 Xplained Pro, then + support for the SD card slot can be enabled by making the following + changes to the configuration. These changes assume that the I/O1 + modules is connected in EXT1. Most of the modifications necessary + to work with the I/O1 in a different connector are obvious.. except + for the selection of SERCOM SPI support: + + EXT1: SPI is provided through SERCOM0 + EXT2: SPI is provided through SERCOM1 + EXT3: SPI is provided through SERCOM5 + + File Systems: + CONFIG_FS_FAT=y : Enable the FAT file system + CONFIG_FAT_LCNAMES=y : Enable upper/lower case 8.3 file names (Optional, see below) + CONFIG_FAT_LFN=y : Enable long file named (Optional, see below) + CONFIG_FAT_MAXFNAME=32 : Maximum supported file name length + + There are issues related to patents that Microsoft holds on FAT long + file name technologies. See the top level COPYING file for further + details. + + System Type -> Peripherals: + CONFIG_SAMDL_SERCOM0=y : Use SERCOM0 if the I/O is in EXT1 + CONFIG_SAMDL_SERCOM0_ISSPI=y : Configure SERCOM0 as an SPI master + + Device Drivers + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMCSD_NSLOTS=1 : Only one MMC/SD card slot + CONFIG_MMCSD_MULTIBLOCK_DISABLE=n : Should not need to disable multi-block transfers + CONFIG_MMCSD_MMCSUPPORT=n : May interfere with some SD cards + CONFIG_MMCSD_HAVECARDDETECT=y : I/O1 module as a card detect GPIO + CONFIG_MMCSD_SPI=y : Use the SPI interface to the MMC/SD card + CONFIG_MMCSD_SPICLOCK=20000000 : This is a guess for the optimal MMC/SD frequency + CONFIG_MMCSD_SPIMODE=0 : Mode 0 is required + + Board Selection -> Common Board Options + CONFIG_NSH_MMCSDSLOTNO=0 : Only one MMC/SD slot, slot 0 + CONFIG_NSH_MMCSDSPIPORTNO=0 : Use port=0 -> SERCOM0 if the I/O1 is in EXT1 + + Board Selection -> SAMD21 Xplained Pro Modules + CONFIG_SAMD21_XPLAINED_IOMODULE=y : I/O1 module is connected + CONFIG_SAMD21_XPLAINED_IOMODULE_EXT1=y : I/O1 modules is in EXT1 + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : Board has architecture-specific initialization + + NOTE: If you enable the I/O1 this configuration with SERCOM4 as the + console and with the I/O1 module in EXT1, you *must* remove USART + jumper. Otherwise, you have lookpack on SERCOM4 and NSH will *not* + behave very well (since its outgoing prompts also appear as incoming + commands). + + STATUS: As of 2013-6-18, this configuration appears completely + functional. Testing, however, has been very light. Example: + + NuttShell (NSH) NuttX-6.34 + nsh> mount -t vfat /dev/mmcsd0 /mnt/stuff + nsh> ls /mnt/stuff + /mnt/stuff: + nsh> echo "This is a test" >/mnt/stuff/atest.txt + nsh> ls /mnt/stuff + /mnt/stuff: + atest.txt + nsh> cat /mnt/stuff/atest.txt + This is a test + nsh> + + 5. If the OLED1 module is connected to the SAMD21 Xplained Pro, then + support for the OLED display can be enabled by making the following + changes to the configuration. These changes assume that the I/O1 + modules is connected in EXT1. Most of the modifications necessary + to work with the I/O1 in a different connector are obvious.. except + for the selection of SERCOM SPI support: + + EXT1: SPI is provided through SERCOM0 + EXT2: SPI is provided through SERCOM1 + EXT3: SPI is provided through SERCOM5 + + System Type -> Peripherals: + CONFIG_SAMDL_SERCOM1=y : Use SERCOM1 if the I/O is in EXT2 + CONFIG_SAMDL_SERCOM1_ISSPI=y : Configure SERCOM1 as an SPI master + + Device Drivers -> SPI + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + CONFIG_SPI_CMDDATA=y : CMD/DATA support is required + + Device Drivers -> LCDs + CONFIG_LCD=y : Enable LCD support + CONFIG_LCD_MAXCONTRAST=255 : Maximum contrast value + CONFIG_LCD_LANDSCAPE=y : Landscape orientation (see below*) + CONFIG_LCD_UG2832HSWEG04=y : Enable support for the OLED + CONFIG_LCD_SSD1306_SPIMODE=0 : SPI Mode 0 + CONFIG_LCD_SSD1306_SPIMODE=3500000 : Pick an SPI frequency + + Board Selection -> SAMD21 Xplained Pro Modules + CONFIG_SAMD21_XPLAINED_OLED1MODULE=y : OLED1 module is connected + CONFIG_SAMD21_XPLAINED_OLED1MODULE_EXT2=y : OLED1 modules is in EXT2 + + The NX graphics subsystem also needs to be configured: + + CONFIG_NX=y : Enable graphics support + CONFIG_NX_LCDDRIVER=y : Using an LCD driver + CONFIG_NX_NPLANES=1 : With a single color plane + CONFIG_NX_WRITEONLY=n : You can read from the LCD (see below**) + CONFIG_NX_DISABLE_2BPP=y : Disable all resolutions except 1BPP + CONFIG_NX_DISABLE_4BPP=y + CONFIG_NX_DISABLE_8BPP=y + CONFIG_NX_DISABLE_16BPP=y + CONFIG_NX_DISABLE_24BPP=y + CONFIG_NX_DISABLE_32BPP=y + CONFIG_NX_PACKEDMSFIRST=y : LSB packed first (shouldn't matter) + CONFIG_NXTK_BORDERWIDTH=2 : Use a small border + CONFIG_NXTK_DEFAULT_BORDERCOLORS=y : Default border colors + CONFIG_NXFONTS_CHARBITS=7 : 7-bit fonts + CONFIG_NXFONT_SANS17X23B=y : Pick a font (any that will fit) + + * This orientation will put the buttons "above" the LCD. The + reverse landscape configuration (CONFIG_LCD_RLANDSCAPE) will + "flip" the display so that the buttons are "below" the LCD. + + ** The hardware is write only, but the driver maintains a frame buffer + to support read and read-write-modiry operations on the LCD. + Reading from the frame buffer is, however, untested. + + Then, in order to use the OLED, you will need to build some kind of + graphics application or use one of the NuttX graphics examples. + Here, for example, is the setup for the graphic "Hello, World!" + example: + + CONFIG_EXAMPLES_NXHELLO=y : Enables the example + CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y : Use default colors (see below *) + CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y : Use the default font + CONFIG_EXAMPLES_NXHELLO_BPP=1 : One bit per pixel + CONFIG_EXAMPLES_NXHELLO_EXTERNINIT=y : Special initialization is required. + + * The OLED is monochrome so the only "colors" are blacka nd white. + The default "colors" will give you while text on a black background. + You can override the faults it you want black text on a while background. + + NOTE: One issue that I have seen with the NXHello example when + running as an NSH command is that it only works the first time. + So, after you run the 'nxhello' command one time, you will have to + reset the board before you run it again. + + This is clearly some issue with initializing, un-initializing, and + then re-initializing. If you want to fix this, patches are quite + welcome. diff --git a/configs/samd21-xplained/include/board.h b/configs/samd21-xplained/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..7f68514e3d7b4ed52d6636d0f23b53d6a99c019b --- /dev/null +++ b/configs/samd21-xplained/include/board.h @@ -0,0 +1,572 @@ +/************************************************************************************ + * configs/samd21-xplained/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMD21_XPLAINED_INCLUDE_BOARD_H +#define __CONFIGS_SAMD21_XPLAINED_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# ifdef CONFIG_GPIO_IRQ +# include +# endif +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* Overview + * + * OSC8M Output = 8MHz + * `- GCLK1 Input = 8MHz Prescaler = 1 output = 8MHz + * `- DFLL Input = 8MHz Multiplier = 6 output = 48MHz + * `- GCLK0 Input = 48MHz Prescaler = 1 output = 48MHz + * `- PM Input = 48Mhz CPU divider = 1 CPU frequency = 48MHz + * APBA divider = 1 APBA frequency = 48MHz + * APBB divider = 1 APBB frequency = 48MHz + * APBC divider = 1 APBC frequency = 48MHz + * + * The SAMD21 Xplained Pro has one on-board crystal: + * + * XC101 32.768KHz XOSC32 + * + * REVISIT: Not currently used, may want to use as GCLK1 source with + * DFLL multiplier of ((48000000+16384)/32768) = 1465 which would yield + * a clock of 48,005,120 MHz. + */ + +/* XOSC Configuration -- Not available + * + * BOARD_XOSC_ENABLE - Boolean (defined / not defined) + * BOARD_XOSC_FREQUENCY - In Hz + * BOARD_XOSC_STARTUPTIME - See SYSCTRL_XOSC_STARTUP_* definitions + * BOARD_XOSC_ISCRYSTAL - Boolean (defined / not defined) + * BOARD_XOSC_AMPGC - Boolean (defined / not defined) + * BOARD_XOSC_ONDEMAND - Boolean (defined / not defined) + * BOARD_XOSC_RUNINSTANDBY - Boolean (defined / not defined) + */ + +#undef BOARD_XOSC_ENABLE +#define BOARD_XOSC_FREQUENCY 12000000UL +#define BOARD_XOSC_STARTUPTIME SYSCTRL_XOSC_STARTUP_1S +#define BOARD_XOSC_ISCRYSTAL 1 +#define BOARD_XOSC_AMPGC 1 +#define BOARD_XOSC_ONDEMAND 1 +#undef BOARD_XOSC_RUNINSTANDBY + +/* XOSC32 Configuration -- Not used + * + * BOARD_XOSC32K_ENABLE - Boolean (defined / not defined) + * BOARD_XOSC32K_FREQUENCY - In Hz + * BOARD_XOSC32K_STARTUPTIME - See SYSCTRL_XOSC32K_STARTUP_* definitions + * BOARD_XOSC32K_ISCRYSTAL - Boolean (defined / not defined) + * BOARD_XOSC32K_AAMPEN - Boolean (defined / not defined) + * BOARD_XOSC32K_EN1KHZ - Boolean (defined / not defined) + * BOARD_XOSC32K_EN32KHZ - Boolean (defined / not defined) + * BOARD_XOSC32K_ONDEMAND - Boolean (defined / not defined) + * BOARD_XOSC32K_RUNINSTANDBY - Boolean (defined / not defined) + */ + +#undef BOARD_XOSC32K_ENABLE +#define BOARD_XOSC32K_FREQUENCY 32768 /* 32.768KHz XTAL */ +#define BOARD_XOSC32K_STARTUPTIME SYSCTRL_XOSC32K_STARTUP_2S +#define BOARD_XOSC32K_ISCRYSTAL 1 +#define BOARD_XOSC32K_AAMPEN 1 +#undef BOARD_XOSC32K_EN1KHZ +#define BOARD_XOSC32K_EN32KHZ 1 +#define BOARD_XOSC32K_ONDEMAND 1 +#undef BOARD_XOSC32K_RUNINSTANDBY + +/* OSC32 Configuration -- not used + * + * BOARD_OSC32K_ENABLE - Boolean (defined / not defined) + * BOARD_OSC32K_FREQUENCY - In Hz + * BOARD_OSC32K_STARTUPTIME - See SYSCTRL_OSC32K_STARTUP_* definitions + * BOARD_OSC32K_EN1KHZ - Boolean (defined / not defined) + * BOARD_OSC32K_EN32KHZ - Boolean (defined / not defined) + * BOARD_OSC32K_ONDEMAND - Boolean (defined / not defined) + * BOARD_OSC32K_RUNINSTANDBY - Boolean (defined / not defined) + */ + +#undef BOARD_OSC32K_ENABLE +#define BOARD_OSC32K_FREQUENCY 32768 /* 32.768kHz internal oscillator */ +#define BOARD_OSC32K_STARTUPTIME SYSCTRL_OSC32K_STARTUP_4MS +#define BOARD_OSC32K_EN1KHZ 1 +#define BOARD_OSC32K_EN32KHZ 1 +#define BOARD_OSC32K_ONDEMAND 1 +#undef BOARD_OSC32K_RUNINSTANDBY + +/* OSC8M Configuration -- always enabled + * + * BOARD_OSC8M_PRESCALER - See SYSCTRL_OSC8M_PRESC_DIV* definitions + * BOARD_OSC8M_ONDEMAND - Boolean (defined / not defined) + * BOARD_OSC8M_RUNINSTANDBY - Boolean (defined / not defined) + */ + +#define BOARD_OSC8M_PRESCALER SYSCTRL_OSC8M_PRESC_DIV1 +#define BOARD_OSC8M_ONDEMAND 1 +#undef BOARD_OSC8M_RUNINSTANDBY + +#define BOARD_OSC8M_FREQUENCY 8000000 /* 8MHz high-accuracy internal oscillator */ + +/* OSCULP32K Configuration -- not used. */ + +#define BOARD_OSCULP32K_FREQUENCY 32000 /* 32kHz ultra-low-power internal oscillator */ + +/* Digital Frequency Locked Loop configuration. In closed-loop mode, the + * DFLL output frequency (Fdfll) is given by: + * + * Fdfll = DFLLmul * Frefclk + * = 6 * 8000000 = 48MHz + * + * Where the reference clock is Generic Clock Channel 0 output of GLCK1. + * GCLCK1 provides OSC8M, undivided. + * + * When operating in open-loop mode, the output frequency of the DFLL will + * be determined by the values written to the DFLL Coarse Value bit group + * and the DFLL Fine Value bit group in the DFLL Value register. + * + * BOARD_DFLL_OPENLOOP - Boolean (defined / not defined) + * BOARD_DFLL_TRACKAFTERFINELOCK - Boolean (defined / not defined) + * BOARD_DFLL_KEEPLOCKONWAKEUP - Boolean (defined / not defined) + * BOARD_DFLL_ENABLECHILLCYCLE - Boolean (defined / not defined) + * BOARD_DFLL_QUICKLOCK - Boolean (defined / not defined) + * BOARD_DFLL_ONDEMAND - Boolean (defined / not defined) + * BOARD_DFLL_COARSEVALUE - Value + * BOARD_DFLL_FINEVALUE - Value + * + * Open Loop mode only: + * BOARD_DFLL_COARSEVALUE - Value + * BOARD_DFLL_FINEVALUE - Value + * + * Closed loop mode only: + * BOARD_DFLL_GCLKGEN - GCLK index + * BOARD_DFLL_MULTIPLIER - Value + * BOARD_DFLL_MAXCOARSESTEP - Value + * BOARD_DFLL_MAXFINESTEP - Value + * + * BOARD_DFLL_FREQUENCY - The resulting frequency + */ + +#define BOARD_DFLL_ENABLE 1 +#undef BOARD_DFLL_OPENLOOP +#undef BOARD_DFLL_ONDEMAND +#undef BOARD_DFLL_RUNINSTANDBY + +/* DFLL open loop mode configuration */ + +#define BOARD_DFLL_COARSEVALUE (0x1f / 4) +#define BOARD_DFLL_FINEVALUE (0xff / 4) + +/* DFLL closed loop mode configuration */ + +#define BOARD_DFLL_SRCGCLKGEN 1 +#define BOARD_DFLL_MULTIPLIER 6 +#define BOARD_DFLL_QUICKLOCK 1 +#define BOARD_DFLL_TRACKAFTERFINELOCK 1 +#define BOARD_DFLL_KEEPLOCKONWAKEUP 1 +#define BOARD_DFLL_ENABLECHILLCYCLE 1 +#define BOARD_DFLL_MAXCOARSESTEP (0x1f / 4) +#define BOARD_DFLL_MAXFINESTEP (0xff / 4) + +#define BOARD_DFLL_FREQUENCY (48000000) + +/* GCLK Configuration + * + * Global enable/disable. + * + * BOARD_GCLK_ENABLE - Boolean (defined / not defined) + * + * For n=1-7: + * BOARD_GCLKn_ENABLE - Boolean (defined / not defined) + * + * For n=0-8: + * BOARD_GCLKn_RUN_IN_STANDBY - Boolean (defined / not defined) + * BOARD_GCLKn_CLOCK_SOURCE - See GCLK_GENCTRL_SRC_* definitions + * BOARD_GCLKn_PRESCALER - Value + * BOARD_GCLKn_OUTPUT_ENABLE - Boolean (defined / not defined) + */ + +#define BOARD_GCLK_ENABLE 1 + +/* GCLK generator 0 (Main Clock) - Source is the DFLL */ + +#undef BOARD_GCLK0_RUN_IN_STANDBY +#define BOARD_GCLK0_CLOCK_SOURCE GCLK_GENCTRL_SRC_DFLL48M +#define BOARD_GCLK0_PRESCALER 1 +#undef BOARD_GCLK0_OUTPUT_ENABLE +#define BOARD_GCLK0_FREQUENCY (BOARD_DFLL_FREQUENCY / BOARD_GCLK0_PRESCALER) + +/* Configure GCLK generator 1 - Drives the DFLL */ + +#define BOARD_GCLK1_ENABLE 1 +#undef BOARD_GCLK1_RUN_IN_STANDBY +#define BOARD_GCLK1_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC8M +#define BOARD_GCLK1_PRESCALER 1 +#undef BOARD_GCLK1_OUTPUT_ENABLE +#define BOARD_GCLK1_FREQUENCY (BOARD_OSC8M_FREQUENCY / BOARD_GCLK1_PRESCALER) + +/* Configure GCLK generator 2 (RTC) */ + +#undef BOARD_GCLK2_ENABLE +#undef BOARD_GCLK2_RUN_IN_STANDBY +#define BOARD_GCLK2_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC32K +#define BOARD_GCLK2_PRESCALER 32 +#undef BOARD_GCLK2_OUTPUT_ENABLE +#define BOARD_GCLK2_FREQUENCY (BOARD_OSC8M_FREQUENCY / BOARD_GCLK2_PRESCALER) + +/* Configure GCLK generator 3 */ + +#undef BOARD_GCLK3_ENABLE +#undef BOARD_GCLK3_RUN_IN_STANDBY +#define BOARD_GCLK3_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC8M +#define BOARD_GCLK3_PRESCALER 1 +#undef BOARD_GCLK3_OUTPUT_ENABLE +#define BOARD_GCLK3_FREQUENCY (BOARD_OSC8M_FREQUENCY / BOARD_GCLK3_PRESCALER) + +/* Configure GCLK generator 4 */ + +#undef BOARD_GCLK4_ENABLE +#undef BOARD_GCLK4_RUN_IN_STANDBY +#define BOARD_GCLK4_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC8M +#define BOARD_GCLK4_PRESCALER 1 +#undef BOARD_GCLK4_OUTPUT_ENABLE +#define BOARD_GCLK4_FREQUENCY (BOARD_OSC8M_FREQUENCY / BOARD_GCLK4_PRESCALER) + +/* Configure GCLK generator 5 */ + +#undef BOARD_GCLK5_ENABLE +#undef BOARD_GCLK5_RUN_IN_STANDBY +#define BOARD_GCLK5_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC8M +#define BOARD_GCLK5_PRESCALER 1 +#undef BOARD_GCLK5_OUTPUT_ENABLE +#define BOARD_GCLK5_FREQUENCY (BOARD_OSC8M_FREQUENCY / BOARD_GCLK5_PRESCALER) + +/* Configure GCLK generator 6 */ + +#undef BOARD_GCLK6_ENABLE +#undef BOARD_GCLK6_RUN_IN_STANDBY +#define BOARD_GCLK6_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC8M +#define BOARD_GCLK6_PRESCALER 1 +#undef BOARD_GCLK6_OUTPUT_ENABLE +#define BOARD_GCLK6_FREQUENCY (BOARD_OSC8M_FREQUENCY / BOARD_GCLK6_PRESCALER) + +/* Configure GCLK generator 7 */ + +#undef BOARD_GCLK7_ENABLE +#undef BOARD_GCLK7_RUN_IN_STANDBY +#define BOARD_GCLK7_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC8M +#define BOARD_GCLK7_PRESCALER 1 +#undef BOARD_GCLK7_OUTPUT_ENABLE +#define BOARD_GCLK7_FREQUENCY (BOARD_OSC8M_FREQUENCY / BOARD_GCLK7_PRESCALER) + +/* The source of the main clock is always GCLK_MAIN. Also called GCLKGEN[0], this is + * the clock feeding the Power Manager. The Power Manager, in turn, generates main + * clock which is divided down to produce the CPU, AHB, and APB clocks. + * + * The main clock is initially OSC8M divided by 8. + */ + +#define BOARD_GCLK_MAIN_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* Main clock dividers + * + * BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions + * BOARD_CPU_FRQUENCY - In Hz + * BOARD_CPU_FAILDECT - Boolean (defined / not defined) + * BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions + * BOARD_APBA_FRQUENCY - In Hz + * BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions + * BOARD_APBB_FRQUENCY - In Hz + * BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions + * BOARD_APBC_FRQUENCY - In Hz + */ + +#define BOARD_CPU_FAILDECT 1 +#define BOARD_CPU_DIVIDER PM_CPUSEL_CPUDIV_1 +#define BOARD_APBA_DIVIDER PM_APBASEL_APBADIV_1 +#define BOARD_APBB_DIVIDER PM_APBBSEL_APBBDIV_1 +#define BOARD_APBC_DIVIDER PM_APBCSEL_APBCDIV_1 + +/* Resulting frequencies */ + +#define BOARD_MCK_FREQUENCY (BOARD_GCLK_MAIN_FREQUENCY) +#define BOARD_CPU_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_PBA_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_PBB_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_PBC_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_PBD_FREQUENCY (BOARD_MCK_FREQUENCY) + +/* FLASH wait states + * + * Vdd Range Wait states Maximum Operating Frequency + * ------------- -------------- --------------------------- + * 1.62V to 2.7V 0 14 MHz + * 1 28 MHz + * 2 42 MHz + * 3 48 MHz + * 2.7V to 3.63V 0 24 MHz + * 1 48 MHz + */ + +#if 0 /* REVISIT -- should not be necessary */ +# define BOARD_FLASH_WAITSTATES 1 +#else +# define BOARD_FLASH_WAITSTATES 2 +#endif + +/* SERCOM definitions ***************************************************************/ +/* This is the source clock generator for the GCLK_SERCOM_SLOW clock that is common + * to all SERCOM modules. + */ + +#define BOARD_SERCOM05_SLOW_GCLKGEN 0 + +/* SERCOM0 SPI is available on EXT1 + * + * PIN PORT SERCOM FUNCTION + * --- ------------------ ----------- + * 15 PA5 SERCOM0 PAD1 SPI SS + * 16 PA6 SERCOM0 PAD2 SPI MOSI + * 17 PA4 SERCOM0 PAD0 SPI MISO + * 18 PA7 SERCOM0 PAD3 SPI SCK + */ + +#define BOARD_SERCOM0_GCLKGEN 0 +#define BOARD_SERCOM0_SLOW_GCLKGEN BOARD_SERCOM05_SLOW_GCLKGEN +#define BOARD_SERCOM0_MUXCONFIG (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0) +#define BOARD_SERCOM0_PINMAP_PAD0 PORT_SERCOM0_PAD0_2 /* SPI_MISO */ +#define BOARD_SERCOM0_PINMAP_PAD1 0 /* microSD_SS */ +#define BOARD_SERCOM0_PINMAP_PAD2 PORT_SERCOM0_PAD2_2 /* SPI_MOSI */ +#define BOARD_SERCOM0_PINMAP_PAD3 PORT_SERCOM0_PAD3_2 /* SPI_SCK */ + +#define BOARD_SERCOM0_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* SERCOM1 SPI is available on EXT2 + * + * PIN PORT SERCOM FUNCTION + * --- ------------------ ----------- + * 15 PA17 SERCOM1 PAD1 SPI SS + * 16 PA18 SERCOM1 PAD2 SPI MOSI + * 17 PA16 SERCOM1 PAD0 SPI MISO + * 18 PA19 SERCOM1 PAD3 SPI SCK + */ + +#define BOARD_SERCOM1_GCLKGEN 0 +#define BOARD_SERCOM1_SLOW_GCLKGEN BOARD_SERCOM05_SLOW_GCLKGEN +#define BOARD_SERCOM1_MUXCONFIG (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0) +#define BOARD_SERCOM1_PINMAP_PAD0 PORT_SERCOM1_PAD0_1 /* SPI_MISO */ +#define BOARD_SERCOM1_PINMAP_PAD1 0 /* microSD_SS */ +#define BOARD_SERCOM1_PINMAP_PAD2 PORT_SERCOM1_PAD2_1 /* SPI_MOSI */ +#define BOARD_SERCOM1_PINMAP_PAD3 PORT_SERCOM1_PAD3_1 /* SPI_SCK */ + +#define BOARD_SERCOM1_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* The SAMD21 Xplained Pro contains an Embedded Debugger (EDBG) that can be + * used to program and debug the ATSAMD21J18A using Serial Wire Debug (SWD). + * The Embedded debugger also include a Virtual COM port interface over + * SERCOM3. Virtual COM port connections: + * + * PA22 SERCOM3 PAD[0] / USART TXD + * PA23 SERCOM3 PAD[1] / USART RXD + */ + +#define BOARD_SERCOM3_GCLKGEN 0 +#define BOARD_SERCOM3_SLOW_GCLKGEN BOARD_SERCOM05_SLOW_GCLKGEN +#define BOARD_SERCOM3_MUXCONFIG (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0_1) +#define BOARD_SERCOM3_PINMAP_PAD0 PORT_SERCOM3_PAD0_1 /* USART TX */ +#define BOARD_SERCOM3_PINMAP_PAD1 PORT_SERCOM3_PAD1_1 /* USART RX */ +#define BOARD_SERCOM3_PINMAP_PAD2 0 +#define BOARD_SERCOM3_PINMAP_PAD3 0 + +#define BOARD_SERCOM3_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* The SERCOM4 USART is available on connectors EXT1, EXT2, and EXT3 + * + * PIN EXT1 EXT2 EXT3 GPIO Function + * ---- ---- ---- ---- ------------------ + * 13 PB09 PB10 PB10 SERCOM4 / USART RX + * 14 PB08 PB11 PB11 SERCOM4 / USART TX + * 19 GND GND GND N/A + * 20 VCC VCC VCC N/A + * + * If you have a TTL to RS-232 converter then this is the most convenient + * serial console to use (because you don't lose the console device each time + * you lose the USB connection). It is the default in all of the SAMD21 + * configurations. + */ + +#define BOARD_SERCOM4_GCLKGEN 0 +#define BOARD_SERCOM4_SLOW_GCLKGEN BOARD_SERCOM05_SLOW_GCLKGEN + +#if defined(CONFIG_SAMD21_XPLAINED_USART4_EXT1) +# define BOARD_SERCOM4_MUXCONFIG (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0) +# define BOARD_SERCOM4_PINMAP_PAD0 PORT_SERCOM4_PAD0_3 /* USART TX */ +# define BOARD_SERCOM4_PINMAP_PAD1 PORT_SERCOM4_PAD1_3 /* USART RX */ +# define BOARD_SERCOM4_PINMAP_PAD2 0 +# define BOARD_SERCOM4_PINMAP_PAD3 0 +#elif defined(CONFIG_SAMD21_XPLAINED_USART4_EXT2) +# define BOARD_SERCOM4_MUXCONFIG (USART_CTRLA_RXPAD3 | USART_CTRLA_TXPAD2) +# define BOARD_SERCOM4_PINMAP_PAD0 0 +# define BOARD_SERCOM4_PINMAP_PAD1 0 +# define BOARD_SERCOM4_PINMAP_PAD2 PORT_SERCOM4_PAD2_3 /* USART TX */ +# define BOARD_SERCOM4_PINMAP_PAD3 PORT_SERCOM4_PAD3_3 /* USART RX */ +#else /* if defined(CONFIG_SAMD21_XPLAINED_USART4_EXT3) */ +# define BOARD_SERCOM4_MUXCONFIG (USART_CTRLA_RXPAD3 | USART_CTRLA_TXPAD2) +# define BOARD_SERCOM4_PINMAP_PAD0 0 +# define BOARD_SERCOM4_PINMAP_PAD1 0 +# define BOARD_SERCOM4_PINMAP_PAD2 PORT_SERCOM4_PAD2_3 /* USART TX */ +# define BOARD_SERCOM4_PINMAP_PAD3 PORT_SERCOM4_PAD3_3 /* USART RX */ +#endif + +#define BOARD_SERCOM4_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* SERCOM5 SPI is available on EXT3 + * + * PIN PORT SERCOM FUNCTION + * --- ------------------ ----------- + * 15 PB17 SERCOM5 PAD1 SPI SS + * 16 PB22 SERCOM5 PAD2 SPI MOSI + * 17 PB16 SERCOM5 PAD0 SPI MISO + * 18 PB23 SERCOM5 PAD3 SPI SCK + */ + +#define BOARD_SERCOM5_GCLKGEN 0 +#define BOARD_SERCOM5_SLOW_GCLKGEN BOARD_SERCOM05_SLOW_GCLKGEN +#define BOARD_SERCOM5_MUXCONFIG (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0) +#define BOARD_SERCOM5_PINMAP_PAD0 PORT_SERCOM5_PAD0_1 /* SPI_MISO */ +#define BOARD_SERCOM5_PINMAP_PAD1 0 /* microSD_SS */ +#define BOARD_SERCOM5_PINMAP_PAD2 PORT_SERCOM5_PAD2_4 /* SPI_MOSI */ +#define BOARD_SERCOM5_PINMAP_PAD3 PORT_SERCOM5_PAD3_4 /* SPI_SCK */ + +#define BOARD_SERCOM5_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* LED definitions ******************************************************************/ +/* There are three LEDs on board the SAMD21 Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labelled STATUS near the SAMD21 USB + * connector. + * + * This LED is controlled by PC07 and the LED can be activated by driving the + * PB30 to GND. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_STATUS_LED 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_STATUS LED_BIT (1 << BOARD_STATUS_LED) + +/* When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control the LED as defined below. Thus if the LED is statically on, NuttX has + * successfully booted and is, apparently, running normally. If the LED is + * flashing at approximately 2Hz, then a fatal error has been detected and the + * system has halted. + */ + +#define LED_STARTED 0 /* STATUS LED=OFF */ +#define LED_HEAPALLOCATE 0 /* STATUS LED=OFF */ +#define LED_IRQSENABLED 0 /* STATUS LED=OFF */ +#define LED_STACKCREATED 1 /* STATUS LED=ON */ +#define LED_INIRQ 2 /* STATUS LED=no change */ +#define LED_SIGNAL 2 /* STATUS LED=no change */ +#define LED_ASSERTION 2 /* STATUS LED=no change */ +#define LED_PANIC 3 /* STATUS LED=flashing */ + +/* Button definitions ***************************************************************/ +/* Mechanical buttons: + * + * The SAMD21 Xplained Pro contains two mechanical buttons. One button is the + * RESET button connected to the SAMD21 reset line and the other is a generic user + * configurable button. When a button is pressed it will drive the I/O line to GND. + * + * PA15 SW0 + */ + +/* The SAMD21 Xplained Pro supports one button: */ + +#define BUTTON_SW0 0 +#define NUM_BUTTONS 1 + +#define BUTTON_SW0_BIT (1 << BUTTON_SW0) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAMD21_XPLAINED_INCLUDE_BOARD_H */ diff --git a/configs/samd21-xplained/nsh/Make.defs b/configs/samd21-xplained/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6f5255b34302352614da1ac65d5995d1cb3269f5 --- /dev/null +++ b/configs/samd21-xplained/nsh/Make.defs @@ -0,0 +1,123 @@ +############################################################################ +# configs/samd21-xplained/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv6-m/Toolchain.defs + +LDSCRIPT = flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) +endif diff --git a/configs/samd21-xplained/nsh/defconfig b/configs/samd21-xplained/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..70fb4c59cf81f3b896e0957625c2502636cefc22 --- /dev/null +++ b/configs/samd21-xplained/nsh/defconfig @@ -0,0 +1,902 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +CONFIG_ARCH_CHIP_SAMD=y +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +CONFIG_ARCH_CORTEXM0=y +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv6-m" +CONFIG_ARCH_CHIP="samdl" +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set + +# +# ARMV6M Configuration Options +# +# CONFIG_ARMV6M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV6M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIW is not set + +# +# Atmel SAMD/L Configuration Options +# +# CONFIG_ARCH_CHIP_SAMD20E14 is not set +# CONFIG_ARCH_CHIP_SAMD20E15 is not set +# CONFIG_ARCH_CHIP_SAMD20E16 is not set +# CONFIG_ARCH_CHIP_SAMD20E17 is not set +# CONFIG_ARCH_CHIP_SAMD20E18 is not set +# CONFIG_ARCH_CHIP_SAMD20G14 is not set +# CONFIG_ARCH_CHIP_SAMD20G15 is not set +# CONFIG_ARCH_CHIP_SAMD20G16 is not set +# CONFIG_ARCH_CHIP_SAMD20G17 is not set +# CONFIG_ARCH_CHIP_SAMD20G18 is not set +# CONFIG_ARCH_CHIP_SAMD20J14 is not set +# CONFIG_ARCH_CHIP_SAMD20J15 is not set +# CONFIG_ARCH_CHIP_SAMD20J16 is not set +# CONFIG_ARCH_CHIP_SAMD20J17 is not set +# CONFIG_ARCH_CHIP_SAMD20J18 is not set +# CONFIG_ARCH_CHIP_SAMD21E15A is not set +# CONFIG_ARCH_CHIP_SAMD21E15B is not set +# CONFIG_ARCH_CHIP_SAMD21E16A is not set +# CONFIG_ARCH_CHIP_SAMD21E16B is not set +# CONFIG_ARCH_CHIP_SAMD21E17A is not set +# CONFIG_ARCH_CHIP_SAMD21E18A is not set +# CONFIG_ARCH_CHIP_SAMD21G15A is not set +# CONFIG_ARCH_CHIP_SAMD21G15B is not set +# CONFIG_ARCH_CHIP_SAMD21G16A is not set +# CONFIG_ARCH_CHIP_SAMD21G16B is not set +# CONFIG_ARCH_CHIP_SAMD21G17A is not set +# CONFIG_ARCH_CHIP_SAMD21G18A is not set +# CONFIG_ARCH_CHIP_SAMD21J15A is not set +# CONFIG_ARCH_CHIP_SAMD21J15B is not set +# CONFIG_ARCH_CHIP_SAMD21J16A is not set +# CONFIG_ARCH_CHIP_SAMD21J16B is not set +# CONFIG_ARCH_CHIP_SAMD21J17A is not set +CONFIG_ARCH_CHIP_SAMD21J18A=y +# CONFIG_ARCH_FAMILY_SAMD20 is not set +# CONFIG_ARCH_FAMILY_SAMD20E is not set +# CONFIG_ARCH_FAMILY_SAMD20G is not set +# CONFIG_ARCH_FAMILY_SAMD20J is not set +CONFIG_ARCH_FAMILY_SAMD21=y +# CONFIG_ARCH_FAMILY_SAMD21E is not set +# CONFIG_ARCH_FAMILY_SAMD21G is not set +CONFIG_ARCH_FAMILY_SAMD21J=y +# CONFIG_ARCH_FAMILY_SAML21 is not set +# CONFIG_ARCH_FAMILY_SAML21E is not set +# CONFIG_ARCH_FAMILY_SAML21G is not set +# CONFIG_ARCH_FAMILY_SAML21J is not set + +# +# SAMD/L Peripheral Support +# +CONFIG_SAMDL_HAVE_DMAC=y +CONFIG_SAMDL_HAVE_SERCOM4=y +CONFIG_SAMDL_HAVE_SERCOM5=y +CONFIG_SAMDL_HAVE_TC5=y +CONFIG_SAMDL_HAVE_TC2=y +CONFIG_SAMDL_HAVE_TC3=y +# CONFIG_SAMDL_HAVE_TC6 is not set +# CONFIG_SAMDL_HAVE_TC7 is not set +# CONFIG_SAMDL_AC is not set +# CONFIG_SAMDL_ADC is not set +# CONFIG_SAMDL_DAC is not set +# CONFIG_SAMDL_EVSYS is not set +# CONFIG_SAMDL_NVMCTRL is not set +# CONFIG_SAMDL_PTC is not set +# CONFIG_SAMDL_RTC is not set +# CONFIG_SAMDL_SERCOM0 is not set +# CONFIG_SAMDL_SERCOM1 is not set +# CONFIG_SAMDL_SERCOM2 is not set +CONFIG_SAMDL_SERCOM3=y +CONFIG_SAMDL_SERCOM4=y +# CONFIG_SAMDL_SERCOM5 is not set +# CONFIG_SAMDL_TC0 is not set +# CONFIG_SAMDL_TC1 is not set +# CONFIG_SAMDL_TC2 is not set +# CONFIG_SAMDL_TC3 is not set +# CONFIG_SAMDL_TC4 is not set +# CONFIG_SAMDL_TC5 is not set +# CONFIG_SAMDL_WDT is not set +# CONFIG_SAMDL_SERCOM3_ISI2C is not set +# CONFIG_SAMDL_SERCOM3_ISSPI is not set +CONFIG_SAMDL_SERCOM3_ISUSART=y +# CONFIG_SAMDL_SERCOM4_ISI2C is not set +# CONFIG_SAMDL_SERCOM4_ISSPI is not set +CONFIG_SAMDL_SERCOM4_ISUSART=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=3410 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMD21_XPLAINED=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="samd21-xplained" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# SAMD21 Xplained Pro Modules +# +# CONFIG_SAMD21_XPLAINED_IOMODULE is not set +# CONFIG_SAMD21_XPLAINED_OLED1MODULE is not set +# CONFIG_SAMD21_XPLAINED_USART4_EXT1 is not set +# CONFIG_SAMD21_XPLAINED_USART4_EXT2 is not set +CONFIG_SAMD21_XPLAINED_USART4_EXT3=y +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2015 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=21 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1536 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +CONFIG_ARCH_HAVE_USART4=y +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_USART4_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USART3_SERIAL_CONSOLE is not set +CONFIG_USART4_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=64 +CONFIG_USART3_TXBUFSIZE=64 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set + +# +# USART4 Configuration +# +CONFIG_USART4_RXBUFSIZE=64 +CONFIG_USART4_TXBUFSIZE=64 +CONFIG_USART4_BAUD=115200 +CONFIG_USART4_BITS=8 +CONFIG_USART4_PARITY=0 +CONFIG_USART4_2STOP=0 +# CONFIG_USART4_IFLOWCONTROL is not set +# CONFIG_USART4_OFLOWCONTROL is not set +# CONFIG_USART4_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +# CONFIG_NSH_DISABLE_DELROUTE is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/samd21-xplained/nsh/setenv.sh b/configs/samd21-xplained/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..d7dacda8e0ebd3162f6c22a6c0e84c268842b90b --- /dev/null +++ b/configs/samd21-xplained/nsh/setenv.sh @@ -0,0 +1,84 @@ +#!/bin/bash +# configs/samd21-xplained/nsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/samd21-xplained/scripts/flash.ld b/configs/samd21-xplained/scripts/flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..4ac8f2bcce54cf9b556a7ec97bcc6e87681a8bcf --- /dev/null +++ b/configs/samd21-xplained/scripts/flash.ld @@ -0,0 +1,123 @@ +/**************************************************************************** + * configs/samd21-xplained/scripts/flash.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The ATSAMD21J18A has 256KB of FLASH beginning at address 0x0000:0000 and + * 32KB of SRAM beginning at address 0x2000:0000 + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } >flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } >flash + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > sram AT > flash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/samd21-xplained/src/.gitignore b/configs/samd21-xplained/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/samd21-xplained/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/samd21-xplained/src/Makefile b/configs/samd21-xplained/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..4753e08244e4619dfff752c8e63c82d1b4a4135b --- /dev/null +++ b/configs/samd21-xplained/src/Makefile @@ -0,0 +1,69 @@ +############################################################################ +# configs/samd21-xplained/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c + +ifeq ($(CONFIG_SAMDL_SERCOM0),y) +CSRCS += sam_spi.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += sam_autoleds.c +else +CSRCS += sam_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += sam_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += sam_appinit.c +endif + +ifeq ($(CONFIG_SAMD21_XPLAINED_IOMODULE),y) +CSRCS += sam_mmcsd.c +endif + +ifeq ($(CONFIG_SAMD21_XPLAINED_OLED1MODULE),y) +ifeq ($(CONFIG_LCD_UG2832HSWEG04),y) +CSRCS += sam_ug2832hsweg04.c +endif +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/samd21-xplained/src/sam_appinit.c b/configs/samd21-xplained/src/sam_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..e0bca0301074c6286d8a4be7b4081f05b9ca56bf --- /dev/null +++ b/configs/samd21-xplained/src/sam_appinit.c @@ -0,0 +1,121 @@ +/**************************************************************************** + * config/samd21-xplained/src/sam_appinit.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "sam_config.h" +#include "samd21-xplained.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Some configuration checks */ + +#ifdef CONFIG_SAMD21_XPLAINED_IOMODULE_EXT1 +# ifndef SAMDL_HAVE_SPI0 +# error I/O1 module on EXT1 requires SERCOM SPI0 +# undef CONFIG_SAMD21_XPLAINED_IOMODULE +# endif +# define SPI_PORTNO 0 +#endif + +#ifdef CONFIG_SAMD21_XPLAINED_IOMODULE_EXT2 +# ifndef SAMDL_HAVE_SPI1 +# error I/O1 module on EXT2 requires SERCOM SPI1 +# undef CONFIG_SAMD21_XPLAINED_IOMODULE +# endif +# define SPI_PORTNO 1 +#endif + +#ifdef CONFIG_SAMD21_XPLAINED_IOMODULE +/* Support for the SD card slot on the I/O1 module */ +/* Verify NSH PORT and SLOT settings */ + +# define SAMDL_MMCSDSLOTNO 0 /* There is only one slot */ + +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != SAMDL_MMCSDSLOTNO +# error Only one MMC/SD slot: Slot 0 (CONFIG_NSH_MMCSDSLOTNO) +# endif + +# if defined(CONFIG_NSH_MMCSDSPIPORTNO) && CONFIG_NSH_MMCSDSPIPORTNO != SPI_PORTNO +# error CONFIG_NSH_MMCSDSPIPORTNO must have the same value as SPI_PORTNO +# endif + +/* Default MMC/SD minor number */ + +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(SAMDL_HAVE_SPI0) && defined(CONFIG_SAMD21_XPLAINED_IOMODULE) + /* Initialize the SPI-based MMC/SD slot */ + + { + int ret = sam_sdinitialize(SPI_PORTNO, CONFIG_NSH_MMCSDMINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize MMC/SD slot: %d\n", + ret); + return ret; + } + } +#endif + + return OK; +} diff --git a/configs/samd21-xplained/src/sam_autoleds.c b/configs/samd21-xplained/src/sam_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..9a559df4192b50baecb2ed4d1f42a1085933044c --- /dev/null +++ b/configs/samd21-xplained/src/sam_autoleds.c @@ -0,0 +1,178 @@ +/**************************************************************************** + * configs/samd21-xplained/src/sam_autoleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are three LEDs on board the SAMD21 Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labelled STATUS near the SAMD21 USB + * connector. + * + * This LED is controlled by PB30 and the LED can be activated by driving PB30 + * to GND. + * + * When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control the LED as follows: + * + * SYMBOL Meaning LED + * ------------------- ----------------------- ------ + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt** N/C + * LED_SIGNAL In a signal handler*** N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus if the LED is statically on, NuttX has successfully booted and is, + * apparently, running normally. If the LED is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_port.h" +#include "samd21-xplained.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + (void)sam_configport(PORT_STATUS_LED); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool ledstate = true; + + switch (led) + { + case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */ + /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */ + /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */ + break; /* Leave ledstate == true to turn OFF */ + + default: + case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */ + /* LED_SIGNAL: In a signal handler STATUS LED=N/C */ + /* LED_ASSERTION: An assertion failed STATUS LED=N/C */ + return; /* Return to leave STATUS LED unchanged */ + + case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */ + case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */ + ledstate = false; /* Set ledstate == false to turn ON */ + break; + } + + sam_portwrite(PORT_STATUS_LED, ledstate); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + /* These should not happen and are ignored */ + + default: + case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */ + /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */ + /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */ + case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */ + + /* These result in no-change */ + + case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */ + /* LED_SIGNAL: In a signal handler STATUS LED=N/C */ + /* LED_ASSERTION: An assertion failed STATUS LED=N/C */ + return; /* Return to leave STATUS LED unchanged */ + + /* Turn STATUS LED off set driving the output high */ + + case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */ + sam_portwrite(PORT_STATUS_LED, true); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/samd21-xplained/src/sam_boot.c b/configs/samd21-xplained/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..71e69d376ed315068f66df5ebf4d0eb7be2c4c7c --- /dev/null +++ b/configs/samd21-xplained/src/sam_boot.c @@ -0,0 +1,89 @@ +/************************************************************************************ + * configs/samd21-xplained/src/sam_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "sam_config.h" +#include "samd21-xplained.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * sam_spidev_initialize() has been brought into the link. + */ + +#ifdef SAMDL_HAVE_SPI + if (sam_spidev_initialize) + { + sam_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/samd21-xplained/src/sam_buttons.c b/configs/samd21-xplained/src/sam_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..280475de6dea6a505253e02429b7ed2e5f888183 --- /dev/null +++ b/configs/samd21-xplained/src/sam_buttons.c @@ -0,0 +1,160 @@ +/**************************************************************************** + * configs/samd21-xplained/src/sam_buttons.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "sam_port.h" +#include "samd21-xplained.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_PORTA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +static xcpt_t g_irqsw0; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state of + * all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + (void)sam_configport(PORT_SW0); +} + +/************************************************************************************ + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be called to collect + * the state of all buttons. board_buttons() returns an 8-bit bit set with each bit + * associated with a button. See the BUTTON* definitions above for the meaning of + * each bit in the returned value. + * + ************************************************************************************/ + +uint8_t board_buttons(void) +{ + return sam_portread(PORT_SW0) ? 0 : BUTTON_SW0_BIT; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address isreturned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_AVR32_PORTIRQ must be selected to enable the + * overall PORT IRQ feature and CONFIG_AVR32_PORTIRQSETA and/or + * CONFIG_AVR32_PORTIRQSETB must be enabled to select PORTs to support + * interrupts on. For button support, bits 2 and 3 must be set in + * CONFIG_AVR32_PORTIRQSETB (PB2 and PB3). + * + ****************************************************************************/ + +#if defined(CONFIG_PORTA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id == BUTTON_SW0) + { + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = *g_irqsw0; + *g_irqsw0 = irqhandler; + + /* Configure the interrupt */ + + sam_portirq(IRQ_SW0); + (void)irq_attach(IRQ_SW0, irqhandler); + sam_portirqenable(IRQ_SW0); + leave_critical_section(flags); + } + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/samd21-xplained/src/sam_mmcsd.c b/configs/samd21-xplained/src/sam_mmcsd.c new file mode 100644 index 0000000000000000000000000000000000000000..f763f44c0a421a1039d1e40018457460b0428a7d --- /dev/null +++ b/configs/samd21-xplained/src/sam_mmcsd.c @@ -0,0 +1,127 @@ +/**************************************************************************** + * config/samd21-xplained/src/sam_mmcsd.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_config.h" +#include "sam_spi.h" + +#include "samd21-xplained.h" + +#ifdef CONFIG_SAMD21_XPLAINED_IOMODULE + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# error Mountpoints are disabled (CONFIG_DISABLE_MOUNTPOINT=y) +#endif + +#ifndef SAMDL_HAVE_SPI0 +# error SERCOM0 SPI support is required +#endif + +#ifndef CONFIG_MMCSD +# error MMC/SD support is required (CONFIG_MMCSD) +#endif + +#define SAMDL_MMCSDSLOTNO 0 /* There is only one slot */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires + * - CONFIG_SAMD21_XPLAINED_IOMODULE=y, + * - CONFIG_DISABLE_MOUNTPOINT=n, + * - CONFIG_MMCSD=y, and + * - SAMDL_HAVE_SPI0=y (CONFIG_SAMDL_SERCOM0 && CONFIG_SAMDL_SERCOM0_ISSPI) + * + ****************************************************************************/ + +int sam_sdinitialize(int port, int minor) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI driver instance for the SD chip select */ + + fvdbg("Initializing SERCOM SPI%d\n", port); + + spi = sam_spibus_initialize(port); + if (!spi) + { + fdbg("Failed to initialize SPI%d\n", port); + return -ENODEV; + } + + fvdbg("Successfully initialized SPI%d\n", port); + + /* Bind the SPI device for the chip select to the slot */ + + fvdbg("Binding SPI%d to MMC/SD slot %d\n", port, SAMDL_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(minor, SAMDL_MMCSDSLOTNO, spi); + if (ret < 0) + { + fdbg("Failed to bind SPI%d to MMC/SD slot %d: %d\n", + port, SAMDL_MMCSDSLOTNO, ret); + return ret; + } + + fvdbg("Successfuly bound SPI%d to MMC/SD slot %d\n", + port, SAMDL_MMCSDSLOTNO); + + return OK; +} + +#endif /* CONFIG_SAMD21_XPLAINED_IOMODULE */ diff --git a/configs/samd21-xplained/src/sam_spi.c b/configs/samd21-xplained/src/sam_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..6352367dcc403d1c42a435a13145f523a05c9168 --- /dev/null +++ b/configs/samd21-xplained/src/sam_spi.c @@ -0,0 +1,446 @@ +/**************************************************************************** + * configs/samd21-xplained/src/sam_spi.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_config.h" +#include "sam_port.h" +#include "sam_spi.h" + +#include "samd21-xplained.h" + +#ifdef SAMDL_HAVE_SPI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select PORT pins for the SAMD21 Xplained + * Pro board. + * + ****************************************************************************/ + +void weak_function sam_spidev_initialize(void) +{ + /* The I/O module containing the SD connector may or may not be installed. And, if + * it is installed, it may be in connector EXT1 or EXT2. + */ + +#ifdef CONFIG_SAMD21_XPLAINED_IOMODULE + /* TODO: enable interrupt on card detect */ + + sam_configport(PORT_SD_CD); /* Card detect input */ + sam_configport(PORT_SD_CS); /* Chip select output */ +#endif + +#ifdef CONFIG_SAMD21_XPLAINED_OLED1MODULE + sam_configport(PORT_OLED_DATA); /* Command/data */ + sam_configport(PORT_OLED_CS); /* Card detect input */ +#endif +} + +/**************************************************************************** + * Name: sam_spi[n]select, sam_spi[n]status, and sam_spi[n]cmddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * include: + * + * o sam_spi[n]select is a functions to manage the board-specific chip + * selects + * o sam_spi[n]status and sam_spi[n]cmddata: Implementations of the status + * and cmddata methods of the SPI interface defined by struct spi_ops_ + * (see include/nuttx/spi/spi.h). All other methods including + * sam_spibus_initialize()) are provided by common SAMD/L logic. + * + * Where [n] is the SERCOM number for the SPI module. + * + * To use this common SPI logic on your board: + * + * 1. Provide logic in sam_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide sam_spi[n]select() and sam_spi[n]status() functions in your + * board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * sam_spi[n]cmddata() functions in your board-specific logic. This + * function will perform cmd/data selection operations using GPIOs in + * the way your board is configured. + * 3. Add a call to sam_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by sam_spibus_initialize() may then be used to bind + * the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spi[n]select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * GPIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the GPIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * dev - SPI device info + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef SAMDL_HAVE_SPI0 +void sam_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +#ifdef CONFIG_SAMD21_XPLAINED_IOMODULE_EXT1 + /* Select/de-select the SD card */ + + if (devid == SPIDEV_MMCSD) + { + /* Active low */ + + sam_portwrite(PORT_SD_CS, !selected); + } +#endif + +#ifdef CONFIG_SAMD21_XPLAINED_OLED1MODULE_EXT1 + /* Select/de-select the OLED */ + + if (devid == SPIDEV_DISPLAY) + { + /* Active low */ + + sam_portwrite(PORT_OLED_CS, !selected); + } +#endif +} +#endif + +#ifdef SAMDL_HAVE_SPI1 +void sam_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +#ifdef CONFIG_SAMD21_XPLAINED_IOMODULE_EXT2 + /* Select/de-select the SD card */ + + if (devid == SPIDEV_MMCSD) + { + /* Active low */ + + sam_portwrite(PORT_SD_CS, !selected); + } +#endif + +#ifdef CONFIG_SAMD21_XPLAINED_OLED1MODULE_EXT2 + /* Select/de-select the OLED */ + + if (devid == SPIDEV_DISPLAY) + { + /* Active low */ + + sam_portwrite(PORT_OLED_CS, !selected); + } +#endif +} +#endif + +#ifdef SAMDL_HAVE_SPI2 +void sam_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +} +#endif + +#ifdef SAMDL_HAVE_SPI3 +void sam_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +} +#endif + +#ifdef SAMDL_HAVE_SPI4 +void sam_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +} +#endif + +#ifdef SAMDL_HAVE_SPI5 +void sam_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +} +#endif + +/**************************************************************************** + * Name: sam_spi[n]status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * dev - SPI device info + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef SAMDL_HAVE_SPI0 +uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + +#ifdef CONFIG_SAMD21_XPLAINED_IOMODULE_EXT1 + /* Check if an SD card is present in the microSD slot */ + + if (devid == SPIDEV_MMCSD) + { + /* Active low */ + + if (!sam_portread(PORT_SD_CD)) + { + ret |= SPI_STATUS_PRESENT; + } + } +#endif + + return ret; +} +#endif + +#ifdef SAMDL_HAVE_SPI1 +uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + +#ifdef CONFIG_SAMD21_XPLAINED_IOMODULE_EXT2 + /* Check if an SD card is present in the microSD slot */ + + if (devid == SPIDEV_MMCSD) + { + /* Active low */ + + if (!sam_portread(PORT_SD_CD)) + { + ret |= SPI_STATUS_PRESENT; + } + } +#endif + + return ret; +} +#endif + +#ifdef SAMDL_HAVE_SPI2 +uint8_t sam_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef SAMDL_HAVE_SPI3 +uint8_t sam_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef SAMDL_HAVE_SPI4 +uint8_t sam_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef SAMDL_HAVE_SPI5 +uint8_t sam_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + return ret; +} +#endif + +/**************************************************************************** + * Name: sam_spi[n]cmddata + * + * Description: + * Some SPI devices require an additional control to determine if the SPI + * data being sent is a command or is data. If CONFIG_SPI_CMDDATA then + * this function will be called to different be command and data transfers. + * + * This is often needed, for example, by LCD drivers. Some LCD hardware + * may be configured to use 9-bit data transfers with the 9th bit + * indicating command or data. That same hardware may be configurable, + * instead, to use 8-bit data but to require an additional, board- + * specific GPIO control to distinguish command and data. This function + * would be needed in that latter case. + * + * Input Parameters: + * dev - SPI device info + * devid - Identifies the (logical) device + * + * Returned Values: + * Zero on success; a negated errno on failure. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef SAMDL_HAVE_SPI0 +int sam_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#ifdef CONFIG_SAMD21_XPLAINED_OLED1MODULE_EXT1 + if (devid == SPIDEV_DISPLAY) + { + /* This is the Data/Command control pad which determines whether the + * data bits are data or a command. + * + * High: the inputs are treated as display data. + * Low: the inputs are transferred to the command registers. + */ + + (void)sam_portwrite(PORT_OLED_DATA, !cmd); + } +#endif + + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI1 +int sam_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#ifdef CONFIG_SAMD21_XPLAINED_OLED1MODULE_EXT2 + if (devid == SPIDEV_DISPLAY) + { + /* This is the Data/Command control pad which determines whether the + * data bits are data or a command. + * + * High: the inputs are treated as display data. + * Low: the inputs are transferred to the command registers. + */ + + (void)sam_portwrite(PORT_OLED_DATA, !cmd); + } +#endif + + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI2 +int sam_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI3 +int sam_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI4 +int sam_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI5 +int sam_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#endif /* CONFIG_SPI_CMDDATA */ +#endif /* SAMDL_HAVE_SPI */ diff --git a/configs/samd21-xplained/src/sam_ug2832hsweg04.c b/configs/samd21-xplained/src/sam_ug2832hsweg04.c new file mode 100644 index 0000000000000000000000000000000000000000..b5cfcf26e7ae0db58e27c7acf6526b5a316f417d --- /dev/null +++ b/configs/samd21-xplained/src/sam_ug2832hsweg04.c @@ -0,0 +1,214 @@ +/**************************************************************************** + * config/samd21-xplained/src/sam_ug2832hsweg04.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* OLED1 Connector: + * + * OLED1 CONNECTOR + * ----------------- ---------------------- ---------------------- + * OLED1 EXT1 EXT2 + * ----------------- ---------------------- ---------------------- + * 1 ID 1 1 + * ----------------- ---------------------- ---------------------- + * 2 GND 2 GND 2 GND + * ----------------- ---------------------- ---------------------- + * 3 BUTTON2 3 PB00 AIN[8] 3 PA10 AIN[18] + * ----------------- ---------------------- ---------------------- + * 4 BUTTON3 4 PB01 AIN[9] 4 PA11 AIN[19] + * ----------------- ---------------------- ---------------------- + * 5 DATA_CMD_SEL 5 PB06 PORT 5 PA20 PORT + * ----------------- ---------------------- ---------------------- + * 6 LED3 6 PB07 PORT 6 PA21 PORT + * ----------------- ---------------------- ---------------------- + * 7 LED1 7 PB02 TC6/WO[0] 7 PB12 TC4/WO[0] + * ----------------- ---------------------- ---------------------- + * 8 LED2 8 PB03 TC6/WO[1] 8 PB13 TC4/WO[1] + * ----------------- ---------------------- ---------------------- + * 9 BUTTON1 9 PB04 EXTINT[4] 9 PB14 EXTINT[14] + * ----------------- ---------------------- ---------------------- + * 10 DISPLAY_RESET 10 PB05 PORT 10 PB15 PORT + * ----------------- ---------------------- ---------------------- + * 11 N/C 11 PA08 SERCOM2 PAD[0] 11 PA08 SERCOM2 PAD[0] + * I²C SDA I²C SDA + * ----------------- ---------------------- ---------------------- + * 12 N/C 12 PA09 SERCOM2 PAD[1] 12 PA09 SERCOM2 PAD[1] + * I²C SCL I²C SCL + * ----------------- ---------------------- ---------------------- + * 13 N/C 13 PB09 SERCOM4 PAD[1] 13 PB11 SERCOM4 PAD[1] + * USART RX USART RX + * ----------------- ---------------------- ---------------------- + * 14 N/C 14 PB08 SERCOM4 PAD[0] 14 PB10 SERCOM4 PAD[0] + * USART TX USART TX + * ----------------- ---------------------- ---------------------- + * 15 DISPLAY_SS 15 PA05 SERCOM0 PAD[1] 15 PA17 SERCOM1 PAD[1] + * SPI SS SPI SS + * ----------------- ---------------------- ---------------------- + * 16 SPI_MOSI 16 PA06 SERCOM0 PAD[2] 16 PA18 SERCOM1 PAD[2] + * SPI MOSI SPI MOSI + * ----------------- ---------------------- ---------------------- + * 17 N/C 17 PA04 SERCOM0 PAD[0] 17 PA16 SERCOM1 PAD[0] + * SPI MISO SPI MISO + * ----------------- ---------------------- ---------------------- + * 18 SPI_SCK 18 PA07 SERCOM0 PAD[3] 18 PA19 SERCOM1 PAD[3] + * SPI SCK SPI SCK + * ----------------- ---------------------- ---------------------- + * 19 GND 19 GND GND + * ----------------- ---------------------- ---------------------- + * 20 VCC 20 VCC VCC + * ----------------- ---------------------- ---------------------- + * + * OLED1 signals + * + * DATA_CMD_SEL - Data/command select. Used to choose whether the + * communication is data to the display memory or a command to the LCD + * controller. High = data, low = command + * DISPLAY_RESET - Reset signal to the OLED display, active low. Used during + * initialization of the display. + * DISPLAY_SS - SPI slave select signal, must be held low during SPI + * communication. + * SPI_MOSI - SPI master out, slave in signal. Used to write data to the + * display + * SPI_SCK SPI - clock signal, generated by the master. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include "sam_port.h" +#include "sam_spi.h" + +#include "samd21-xplained.h" + +#ifdef CONFIG_SAMD21_XPLAINED_OLED1MODULE + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* The pin configurations here require that SPI1 is selected */ + +#ifndef CONFIG_LCD_SSD1306 +# error "The OLED driver requires CONFIG_LCD_SSD1306 in the configuration" +#endif + +#ifndef CONFIG_LCD_UG2832HSWEG04 +# error "The OLED driver requires CONFIG_LCD_UG2832HSWEG04 in the configuration" +#endif + +#ifndef SAMDL_HAVE_SPI0 +# error "The OLED driver requires SAMDL_HAVE_SPI0 in the configuration" +#endif + +#ifndef CONFIG_SPI_CMDDATA +# error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration" +#endif + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) dbg(format, ##__VA_ARGS__) +# define lcdvdbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED PORTs. This initial configuration is RESET low, + * putting the OLED into reset state. + */ + + (void)sam_configport(PORT_OLED_RST); + + /* Wait a bit then release the OLED from the reset state */ + + up_mdelay(20); + sam_portwrite(PORT_OLED_RST, true); + + /* Get the SPI1 port interface */ + + spi = sam_spibus_initialize(OLED_CSNO); + if (!spi) + { + lcddbg("Failed to initialize SPI port 1\n"); + } + else + { + /* Bind the SPI port to the OLED */ + + dev = ssd1306_initialize(spi, devno); + if (!dev) + { + lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno); + } + else + { + lcdvdbg("Bound SPI port 1 to OLED %d\n", devno); + + /* And turn the OLED on */ + + (void)dev->setpower(dev, CONFIG_LCD_MAXPOWER); + return dev; + } + } + + return NULL; +} +#endif /* CONFIG_SAMD21_XPLAINED_OLED1MODULE */ diff --git a/configs/samd21-xplained/src/sam_userleds.c b/configs/samd21-xplained/src/sam_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..7b7e87bf7c3d5b60b1d0fc77ea0d7c7554483c42 --- /dev/null +++ b/configs/samd21-xplained/src/sam_userleds.c @@ -0,0 +1,143 @@ +/**************************************************************************** + * configs/samd21-xplained/src/sam_userleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are three LEDs on board the SAMD21 Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labelled STATUS near the SAMD21 USB + * connector. + * + * This LED is controlled by PB30 and the LED can be activated by driving PB30 + * to GND. + * + * When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control the LED. Otherwise, the LED can be controlled from user applications + * using the logic in this file. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_port.h" +#include "samd21-xplained.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the + * board_userled_initialize() is available to initialize the LED from user + * application logic. + * + ****************************************************************************/ + +void board_userled_initialize(void) +{ + (void)sam_configport(PORT_STATUS_LED); +} + +/**************************************************************************** + * Name: board_userled + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled() is + * available to control the LED from user application logic. + * + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_STATUS_LED) + { + sam_portwrite(PORT_STATUS_LED, !ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled_all() is + * available to control the LED from user application logic. NOTE: since + * there is only a single LED on-board, this is function is not very useful. + * + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + board_userled(BOARD_STATUS_LED, (ledset & BOARD_STATUS_LED_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/samd21-xplained/src/samd21-xplained.h b/configs/samd21-xplained/src/samd21-xplained.h new file mode 100644 index 0000000000000000000000000000000000000000..671183e0711927a6c7921216f0f02e2f0a309719 --- /dev/null +++ b/configs/samd21-xplained/src/samd21-xplained.h @@ -0,0 +1,264 @@ +/************************************************************************************ + * configs/samd21-xplained/src/samd21-xplained.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMD21_XPLAINED_SRC_SAMD21_XPLAINED_H +#define __CONFIGS_SAMD21_XPLAINED_SRC_SAMD21_XPLAINED_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +#include +#include + +#include "sam_config.h" +#include "sam_pinmap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* LEDs: There are three LEDs on board the SAMD21 Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labelled STATIS near the SAMD21 USB + * connector. + * + * This LED is controlled by PB30 and the LED can be activated by driving PB30 + * to GND. + * + * When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control the LED as follows: + * + * SYMBOL Meaning LED + * ------------------- ----------------------- ------ + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt N/C + * LED_SIGNAL In a signal handler N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus if the LED is statically on, NuttX has successfully booted and is, + * apparently, running normally. If the LED is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +#define PORT_STATUS_LED (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTB | PORT_PIN30) + +/* Mechanical buttons: + * + * The SAMD21 Xplained Pro contains two mechanical buttons. One button is the + * RESET button connected to the SAMD21 reset line and the other is a generic user + * configurable button. When a button is pressed it will drive the I/O line to GND. + * + * PA15 SW0 + */ + +#define PORT_SW0 (PORT_INTERRUPT | PORT_PULL_UP | PORTA | PORT_PIN15) +#define IRQ_SW0 SAM_IRQ_PA15 + +/* I/O1 + * + * Support for the microSD card slot on the I/O1 module. The I/O1 requires + * SPI support and two PORTs. These the PORTs will vary if the I/O1 + * is installed on the EXT1 or EXT2 connector: + * + * --- ------------------ ---------------------- ------------------------------- + * PIN EXT1 EXT2 Description + * --- ------------------ ---------------------- ------------------------------- + * 15 PA05 SERCOM0 PAD[1] 15 PA17 SERCOM1 PAD[1] Active low chip select OUTPUT, + * SPI SS SPI SS pulled high on board. + * --- ------------------ ---------------------- ------------------------------- + * 10 PB05 PORT 10 PB15 PORT Active low card detect INPUT, + * must use internal pull-up. + * --- ------------------ ---------------------- ------------------------------- + */ + +#ifdef CONFIG_SAMD21_XPLAINED_IOMODULE + +# ifndef SAMDL_HAVE_SPI0 +# error SAMDL_HAVE_SPI0 is required to use the I/O1 module +# endif + +# if defined(CONFIG_SAMD21_XPLAINED_IOMODULE_EXT1) + +# if defined(CONFIG_SAMD21_XPLAINED_OLED1MODULE) && \ + defined(CONFIG_SAMD21_XPLAINED_OLED1MODULE_EXT1) +# error I/O1 and OLED1 modules cannot both reside in EXT1 +# endif + +# define PORT_SD_CD (PORT_INTERRUPT | PORT_INT_CHANGE | PORT_PULL_UP | \ + PORTB | PORT_PIN5) + +# define PORT_SD_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTA | PORT_PIN5) + +# elif defined(CONFIG_SAMD21_XPLAINED_IOMODULE_EXT2) + +# if defined(CONFIG_SAMD21_XPLAINED_OLED1MODULE) && \ + defined(CONFIG_SAMD21_XPLAINED_OLED1MODULE_EXT2) +# error I/O1 and OLED1 modules cannot both reside in EXT2 +# endif + +# define PORT_SD_CD (PORT_INTERRUPT | PORT_INT_CHANGE | PORT_PULL_UP | \ + PORTB | PORT_PIN15) + +# define PORT_SD_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTA | PORT_PIN17) + +# else +# error Which connector is the I/O1 module installed in? +# endif +#endif + +/* OLED1 + * + * Support for the microSD card slot on the I/O1 module. The I/O1 requires + * SPI support and three output PORTs. These the PORTs will vary if the OLED1 + * is installed on the EXT1 or EXT2 connector: + * + * + * PIN EXT1 EXT2 Description + * --- ------------------- -------------------- ------------------------------------- + * 5 PB06 PORT PA20 PORT DATA_CMD_SEL + * 10 PB05 PORT PB15 PORT DISPLAY_RESET. Active low. + * 15 PA05 SERCOM0 PAD[1] PA17 SERCOM1 PAD[1] DISPLAY_SS. Active low. + * SPI SS SPI SS + */ + +#ifdef CONFIG_SAMD21_XPLAINED_OLED1MODULE + +# ifndef SAMDL_HAVE_SPI0 +# error SAMDL_HAVE_SPI0 is required to use the OLED1 module +# endif + +# ifndef CONFIG_SPI_CMDDATA +# error CONFIG_SPI_CMDDATA is required to use the OLED1 module +# endif + +# ifndef CONFIG_LCD_SSD1306 +# error CONFIG_LCD_SSD1306 is required to use the OLED1 module +# endif + +# ifndef CONFIG_LCD_UG2832HSWEG04 +# error CONFIG_LCD_UG2832HSWEG04 is required to use the OLED1 module +# endif + +# if defined(CONFIG_SAMD21_XPLAINED_OLED1MODULE_EXT1) + +# if defined(CONFIG_SAMD21_XPLAINED_IOMODULE) && \ + defined(CONFIG_SAMD21_XPLAINED_IOMODULE_EXT1) +# error OLED1 and I/O1 modules cannot both reside in EXT1 +# endif + +# define PORT_OLED_DATA (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \ + PORTB | PORT_PIN6) +# define PORT_OLED_RST (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \ + PORTB | PORT_PIN5) +# define PORT_OLED_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTA | PORT_PIN5) + +# elif defined(CONFIG_SAMD21_XPLAINED_OLED1MODULE_EXT2) + +# if defined(CONFIG_SAMD21_XPLAINED_IOMODULE) && \ + defined(CONFIG_SAMD21_XPLAINED_IOMODULE_EXT2) +# error OLED1 and I/O1 modules cannot both reside in EXT2 +# endif + +# define PORT_OLED_DATA (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \ + PORTA | PORT_PIN20) +# define PORT_OLED_RST (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \ + PORTB | PORT_PIN15) +# define PORT_OLED_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTA | PORT_PIN17) + +# else +# error Which connector is the OLED1 module installed in? +# endif +#endif + +#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) +# define PORT_SD_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTB | PORT_PIN11) /* REVISIT */ +#endif + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select PORT pins for the SAM3U-EK board. + * + ************************************************************************************/ + +void weak_function sam_spidev_initialize(void); + +/************************************************************************************ + * Name: sam_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires CONFIG_SAMD21_XPLAINED_IOMODULE=y, + * CONFIG_DISABLE_MOUNTPOINT=n, CONFIG_MMCSD=y, and the appropriate SERCOM SPI + * port enabled. + * + ************************************************************************************/ + +#ifdef CONFIG_SAMD21_XPLAINED_IOMODULE +int sam_sdinitialize(int port, int minor); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAMD21_XPLAINED_SRC_SAMD21_XPLAINED_H */ + diff --git a/configs/same70-xplained/Kconfig b/configs/same70-xplained/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..95ffaaa0fff399d3d059e7be99c7d44c6db17038 --- /dev/null +++ b/configs/same70-xplained/Kconfig @@ -0,0 +1,37 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAME70_XPLAINED + +config SAME70XPLAINED_HSMCI0_AUTOMOUNT + bool "HSMCI0 automounter" + default n + depends on FS_AUTOMOUNTER && SAMA5_HSMCI0 + +if SAME70XPLAINED_HSMCI0_AUTOMOUNT + +config SAME70XPLAINED_HSMCI0_AUTOMOUNT_FSTYPE + string "HSMCI0 file system type" + default "vfat" + +config SAME70XPLAINED_HSMCI0_AUTOMOUNT_BLKDEV + string "HSMCI0 block device" + default "/dev/mmcsd0" + +config SAME70XPLAINED_HSMCI0_AUTOMOUNT_MOUNTPOINT + string "HSMCI0 mount point" + default "/mnt/sdcard0" + +config SAME70XPLAINED_HSMCI0_AUTOMOUNT_DDELAY + int "HSMCI0 debounce delay (milliseconds)" + default 1000 + +config SAME70XPLAINED_HSMCI0_AUTOMOUNT_UDELAY + int "HSMCI0 unmount retry delay (milliseconds)" + default 2000 + +endif # SAME70XPLAINED_HSMCI0_AUTOMOUNT + +endif # ARCH_BOARD_SAME70_XPLAINED diff --git a/configs/same70-xplained/README.txt b/configs/same70-xplained/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..9a0ed6fa8351a04b31410e83ebacc8b51b2c2355 --- /dev/null +++ b/configs/same70-xplained/README.txt @@ -0,0 +1,1496 @@ +README +====== + +This README file discusses the port of NuttX to the Atmel SAM E70 Xplained +Evaluation Kit (ATSAME70-XPLD). This board features the ATSAME70Q21 Cortex-M7 +microcontroller. + +Contents +======== + + - Status/Open Issues + - Serial Console + - SD card + - Automounter + - LEDs and Buttons + - AT24MAC402 Serial EEPROM + - Program FLASH Access + - Networking + - USBHS Device Controller Driver + - MCAN1 Loopback Test + - SPI Slave + - Tickless OS + - Debugging + - Using OpenOCD and GDB to flash via the EDBG chip + - Configurations + +Status/Open Issues +================== + +2015-11-30: The basic NSH configuration is function with serial console + via the EDBG VCOM and LED and buttons support. SDRAM and the HSMCI + SD card slot also appear to be fully functional. + +See also configs/samv71-xult/README.txt + +Serial Console +============== + +The SAME70-XPLD has no on-board RS-232 drivers so it will be necessary to +use either the VCOM or an external RS-232 driver. Here are some options. + + - Arduino Serial Shield: One option is to use an Arduino-compatible + serial shield. This will use the RXD and TXD signals available at pins + 0 an 1, respectively, of the Arduino "Digital Low" connector. On the + SAME70-XPLD board, this corresponds to UART3: + + ------ ------ ------- ------- -------- + Pin on SAME70 Arduino Arduino SAME70 + J503 PIO Name Pin Function + ------ ------ ------- ------- -------- + 1 PD28 D0/RX0 0 URXD3 + 2 PD30 D1/TX0 1 UTXD3 + ------ ------ ------- ------- -------- + + In this configuration, an external RS232 driver can also be used + instead of the shield. Simply connext as follows: + + --------- ----------- + Arduino RS-232 + Pin Label Connection + --------- ----------- + D0 (RXD) RX + D1 (TXD) TX + GND GND + 5VO Vcc + --------- ----------- + + - Arduino Communications. Additional UART/USART connections are available + on the Arduino Communications connection J505 and J507: + + --------- ---------- -------------------------------- + Connector SAME70 Pin Description + --------- ---------- -------------------------------- + J503 1 URXD3 PD28 Standard Arduino serial (D0/RXD) + J503 2 UTXD3 PD30 Standard Arduino serial (D1/TXD) + --------- ---------- -------------------------------- + J505 3 URXD4 PD18 Arduino D19 + J505 4 UTXD4 PD19 Arduino D18 + J505 5 RXD2 PD15 Arduino D17 + J505 6 TXD2 PD16 Arduino D16 + J505 7 RXD0 PB0 Arduino D15 + J505 8 TXD0 PB1 Arduino D14 + --------- ---------- -------------------------------- + J507 27 RXD1 PA21 Arduino D46 + J507 28 TXD1 PB4 Arduino D47 + --------- ---------- -------------------------------- + + - SAMV7-XULT EXTn connectors. USART pins are also available the EXTn + connectors. The following are labelled in the User Guide for USART + functionality: + + SAME70 Xplained Connectors + --------- ---------- -------------------------------- + Connector SAME70 Pin Description + --------- ---------- -------------------------------- + J401 13 RXD0 PB0 EXT1 UART_RX + J401 14 TXD0 PB1 EXT1 UART_7X + --------- ---------- -------------------------------- + J402 13 RXD1 PA21 EXT2 UART_RX + J402 14 TXD1 PB4 EXT2 UART_TX + --------- ---------- -------------------------------- + + - VCOM. The Virtual Com Port gateway is available on USART1: + + EDBG VCOM Interface + ---------------- --------- -------------------------- + EDBG Singal SAME70 + ---------------- --------- -------------------------- + EDBG_CDC_UART_RX TXD1 PB4 + EDBG_CDC_UART_TX RXD1 PA21 + ---------------- --------- -------------------------- + +Any of these options can be selected as the serial console by: + + 1. Enabling the UART/USART peripheral in the + "System Type -> Peripheral Selection" menu, then + 2. Configuring the peripheral in the "Drivers -> Serial Configuration" + menu. + +NOTE: If USART1 is used (TXD1, RXD1), then PB4 must be reconfigured in the +SUPC. Normally, PB4 is TDI. When it is reconfigured for use with USART1, +the capability to debug is lost! If you plan to debug you should most +certainly not use USART1. + +SD Card +======= + +Card Slot +--------- +The SAM E70 Xplained has one standard SD card connector that is connected to +the High Speed Multimedia Card Interface (HSMCI) of the SAM +E70. SD card connector: + + ------ ----------------- --------------------- + SAME70 SAME70 Shared functionality + Pin Function + ------ ----------------- --------------------- + PA30 MCDA0 (DAT0) + PA31 MCDA1 (DAT1) + PA26 MCDA2 (DAT2) + PA27 MCDA3 (DAT3) + PA25 MCCK (CLK) Shield + PA28 MCCDA (CMD) + PC16 Card Detect (C/D) Shield + ------ ----------------- --------------------- + +Configuration Settings +---------------------- +Enabling HSMCI support. The SAMV7-XULT provides a one, full-size SD memory +card slots. The full size SD card slot connects via HSMCI0. Support for +the SD slots can be enabled with the following settings: + + System Type->SAMV7 Peripheral Selection + CONFIG_SAMV7_HSMCI0=y : To enable HSMCI0 support + CONFIG_SAMV7_XDMAC=y : XDMAC is needed by HSMCI0/1 + + System Type + CONFIG_SAMV7_GPIO_IRQ=y : PIO interrupts needed + CONFIG_SAMV7_GPIOD_IRQ=y : Card detect pin is on PD18 + + Device Drivers -> MMC/SD Driver Support + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMSCD_NSLOTS=1 : One slot per driver instance + CONFIG_MMCSD_MULTIBLOCK_DISABLE=y : (REVISIT) + CONFIG_MMCSD_HAVECARDDETECT=y : Supports card-detect PIOs + CONFIG_MMCSD_MMCSUPPORT=n : Interferes with some SD cards + CONFIG_MMCSD_SPI=n : No SPI-based MMC/SD support + CONFIG_MMCSD_SDIO=y : SDIO-based MMC/SD support + CONFIG_SDIO_DMA=y : Use SDIO DMA + CONFIG_SDIO_BLOCKSETUP=y : Needs to know block sizes + + RTOS Features -> Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : Driver needs work queue support + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization, OR + CONFIG_BOARD_INITIALIZE=y + +Using the SD card +----------------- + +1) After booting, the HSCMI device will appear as /dev/mmcsd0. + +2) If you try mounting an SD card with nothing in the slot, the mount will + fail: + + nsh> mount -t vfat /dev/mmcsd0 /mnt/sd0 + nsh: mount: mount failed: 19 + + NSH can be configured to provide errors as strings instead of + numbers. But in this case, only the error number is reported. The + error numbers can be found in nuttx/include/errno.h: + + #define ENODEV 19 + #define ENODEV_STR "No such device" + + So the mount command is saying that there is no device or, more + correctly, that there is no card in the SD card slot. + +3) Inserted the SD card. Then the mount should succeed. + + nsh> mount -t vfat /dev/mmcsd0 /mnt/sd0 + nsh> ls /mnt/sd1 + /mnt/sd1: + atest.txt + nsh> cat /mnt/sd1/atest.txt + This is a test + + NOTE: See the next section entitled "Auto-Mounter" for another way + to mount your SD card. + +4) Before removing the card, you must umount the file system. This is + equivalent to "ejecting" or "safely removing" the card on Windows: It + flushes any cached data to an SD card and makes the SD card unavailable + to the applications. + + nsh> umount -t /mnt/sd0 + + It is now safe to remove the card. NuttX provides into callbacks + that can be used by an application to automatically unmount the + volume when it is removed. But those callbacks are not used in + these configurations. + +Auto-Mounter +============ + + NuttX implements an auto-mounter than can make working with SD cards + easier. With the auto-mounter, the file system will be automatically + mounted when the SD card is inserted into the HSMCI slot and automatically + unmounted when the SD card is removed. + + Here is a sample configuration for the auto-mounter: + + File System Configuration + CONFIG_FS_AUTOMOUNTER=y + + Board-Specific Options + CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT=y + CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_FSTYPE="vfat" + CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_BLKDEV="/dev/mmcsd0" + CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_MOUNTPOINT="/mnt/sdcard" + CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_DDELAY=1000 + CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_UDELAY=2000 + + WARNING: SD cards should never be removed without first unmounting + them. This is to avoid data and possible corruption of the file + system. Certainly this is the case if you are writing to the SD card + at the time of the removal. If you use the SD card for read-only access, + however, then I cannot think of any reason why removing the card without + mounting would be harmful. + +LEDs and Buttons +================ + +LEDs +---- +A single LED is available driven by PC8. + +This LED is not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/sam_autoleds.c. The LED is used to encode +OS-related events as follows: + + ------------------- ----------------------- ------ + SYMBOL Meaning LED + ------------------- ----------------------- ------ + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt N/C + LED_SIGNAL In a signal handler N/C + LED_ASSERTION An assertion failed N/C + LED_PANIC The system has crashed FLASH + +Thus if the LED is statically on, NuttX has successfully booted and is, +apparently, running normally. If the LED is flashing at approximately +2Hz, then a fatal error has been detected and the system has halted. + +Buttons +------- +SAM E70 Xplained contains two mechanical buttons. One button is the RESET +button connected to the SAM E70 reset line and the other, PA11, is a generic +user configurable button. When a button is pressed it will drive the I/O +line to GND. + +NOTE: There are no pull-up resistors connected to the generic user buttons +so it is necessary to enable the internal pull-up in the SAM E70 to use the +button. + +AT24MAC402 Serial EEPROM +======================== + +Ethernet MAC Address +-------------------- +The SAM E70 Xplained features one external AT24MAC402 serial EEPROM with an +EIA-48 MAC address connected to the SAM E70 through I2C. This device +contains a MAC address for use with the Ethernet interface. + +Connectivity: + + ------ -------- -------- + SAME70 SAME70 I2C + Pin Function Function + ------ -------- -------- + PA03 TWID0 SDA + PA04 TWICK0 SCL + ------ -------- -------- + +I2C address: + + The 7-bit addresses of the AT24 part are 0b1010AAA for the normal 2Kbit + memory and 0b1011aaa for the "extended memory" where aaa is the state of + the A0, A1, and A3 pins on the part. On the SAME70-XPLD board, these + are all pulled high so the full, 7-bit address is 0x5f. + +Configuration +------------- + + System Type -> SAMV7 Peripheral Support + CONFIG_SAMV7_TWIHS0=y : Used to access the EEPROM + CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + + Device drivers -> Memory Technology Devices + CONFIG_MTD_AT24XX=y : Enable the AT24 device driver + CONFIG_AT24XX_SIZE=2 : Normal EEPROM is 2Kbit (256b) + CONFIG_AT24XX_ADDR=0x57 : Normal EEPROM address */ + CONFIG_AT24XX_EXTENDED=y : Supports an extended memory region + CONFIG_AT24XX_EXTSIZE=160 : Extended address up to 0x9f + +MTD Configuration Data +---------------------- +The AT24 EEPROM can also be used to storage of up to 256 bytes of +configuration data: + + Device drivers -> Memory Technology Devices + +The configuration data device will appear at /dev/config. + +Networking +========== + +KSZ8081RNACA Connections +------------------------ + + ------ --------- --------- + SAME70 SAME70 Ethernet + Pin Function Functio + ------ --------- --------- + PD0 GTXCK REF_CLK + PD1 GTXEN TXEN + PD2 GTX0 TXD0 + PD3 GTX1 TXD1 + PD4 GRXDV CRS_DV + PD5 GRX0 RXD0 + PD6 GRX1 RXD1 + PD7 GRXER RXER + PD8 GMDC MDC + PD9 GMDIO MDIO + PA14 GPIO INTERRUPT + PC10 GPIO RESET + ------ --------- --------- + +Selecting the GMAC peripheral +----------------------------- + + System Type -> SAMV7 Peripheral Support + CONFIG_SAMV7_EMAC0=y : Enable the GMAC peripheral (aka, EMAC0) + CONFIG_SAMV7_TWIHS0=y : We will get the MAC address from the AT24 EEPROM + CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + + System Type -> EMAC device driver options + CONFIG_SAMV7_EMAC0_NRXBUFFERS=16 : Set aside some RS and TX buffers + CONFIG_SAMV7_EMAC0_NTXBUFFERS=8 + CONFIG_SAMV7_EMAC0_RMII=y : The RMII interfaces is used on the board + CONFIG_SAMV7_EMAC0_AUTONEG=y : Use autonegotiation + CONFIG_SAMV7_EMAC0_PHYADDR=1 : KSZ8061 PHY is at address 1 + CONFIG_SAMV7_EMAC0_PHYSR=30 : Address of PHY status register on KSZ8061 + CONFIG_SAMV7_EMAC0_PHYSR_ALTCONFIG=y : Needed for KSZ8061 + CONFIG_SAMV7_EMAC0_PHYSR_ALTMODE=0x7 : " " " " " " + CONFIG_SAMV7_EMAC0_PHYSR_10HD=0x1 : " " " " " " + CONFIG_SAMV7_EMAC0_PHYSR_100HD=0x2 : " " " " " " + CONFIG_SAMV7_EMAC0_PHYSR_10FD=0x5 : " " " " " " + CONFIG_SAMV7_EMAC0_PHYSR_100FD=0x6 : " " " " " " + + PHY selection. Later in the configuration steps, you will need to select + the KSZ8061 PHY for EMAC (See below) + + Networking Support + CONFIG_NET=y : Enable Neworking + CONFIG_NET_NOINTS=y : Use the work queue, not interrupts for processing + CONFIG_NET_SOCKOPTS=y : Enable socket operations + CONFIG_NET_ETH_MTU=562 : Maximum packet size (MTU) 1518 is more standard + CONFIG_NET_ETH_TCP_RECVWNDO=562 : Should be the same as CONFIG_NET_ETH_MTU + CONFIG_NET_ARP=y : ARP support should be enabled + CONFIG_NET_ARP_SEND=y : Use ARP to get peer address before sending + CONFIG_NET_TCP=y : Enable TCP/IP networking + CONFIG_NET_TCPBACKLOG=y : Support TCP/IP backlog + CONFIG_NET_TCP_READAHEAD=y : Enable TCP read-ahead buffering + CONFIG_NET_TCP_WRITE_BUFFERS=y : Enable TCP write buffering + CONFIG_NET_UDP=y : Enable UDP networking + CONFIG_NET_BROADCAST=y : Support UDP broadcase packets + CONFIG_NET_ICMP=y : Enable ICMP networking + CONFIG_NET_ICMP_PING=y : Needed for NSH ping command + : Defaults should be okay for other options + Device drivers -> Network Device/PHY Support + CONFIG_NETDEVICES=y : Enabled PHY selection + CONFIG_ETH0_PHY_KSZ8061=y : Select the KSZ8061 PHY used with EMAC0 + + Device drivers -> Memory Technology Devices + CONFIG_MTD_AT24XX=y : Enable the AT24 device driver + CONFIG_AT24XX_SIZE=2 : Normal EEPROM is 2Kbit (256b) + CONFIG_AT24XX_ADDR=0x57 : Normal EEPROM address */ + CONFIG_AT24XX_EXTENDED=y : Supports an extended memory region + CONFIG_AT24XX_EXTSIZE=160 : Extended address up to 0x9f + + RTOS Features ->Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : Work queue support is needed + CONFIG_SCHED_HPWORK=y + CONFIG_SCHED_HPWORKSTACKSIZE=2048 : Might need to be increased + + Application Configuration -> Network Utilities + CONFIG_NETDB_DNSCLIENT=y : Enable host address resolution + CONFIG_NETUTILS_TELNETD=y : Enable the Telnet daemon + CONFIG_NETUTILS_TFTPC=y : Enable TFTP data file transfers for get and put commands + CONFIG_NETUTILS_NETLIB=y : Network library support is needed + CONFIG_NETUTILS_WEBCLIENT=y : Needed for wget support + : Defaults should be okay for other options + Application Configuration -> NSH Library + CONFIG_NSH_TELNET=y : Enable NSH session via Telnet + CONFIG_NSH_IPADDR=0x0a000002 : Select an IP address + CONFIG_NSH_DRIPADDR=0x0a000001 : IP address of gateway/host PC + CONFIG_NSH_NETMASK=0xffffff00 : Netmask + CONFIG_NSH_NOMAC=n : We will get the IP address from EEPROM + : Defaults should be okay for other options + +Cache-Related Issues +-------------------- + +I- and D-Caches can be enabled but the D-Cache must be enabled in write- +through mode. This is to work around issues with the RX and TX descriptors +with are 8-bytes in size. But the D-Cache cache line size is 32-bytes. +That means that you cannot reload, clean or invalidate a descriptor without +also effecting three neighboring descriptors. Setting write through mode +eliminates the need for cleaning the D-Cache. If only reloading and +invalidating are done, then there is no problem. + +Using the network with NSH +-------------------------- + +So what can you do with this networking support? First you see that +NSH has several new network related commands: + + ifconfig, ifdown, ifup: Commands to help manage your network + get and put: TFTP file transfers + wget: HTML file transfers + ping: Check for access to peers on the network + Telnet console: You can access the NSH remotely via telnet. + +You can also enable other add on features like full FTP or a Web +Server or XML RPC and others. There are also other features that +you can enable like DHCP client (or server) or network name +resolution. + +By default, the IP address of the SAME70-XPLD will be 10.0.0.2 and +it will assume that your host is the gateway and has the IP address +10.0.0.1. + + nsh> ifconfig + eth0 HWaddr 00:e0:de:ad:be:ef at UP + IPaddr:10.0.0.2 DRaddr:10.0.0.1 Mask:255.255.255.0 + +You can use ping to test for connectivity to the host (Careful, +Window firewalls usually block ping-related ICMP traffic). On the +target side, you can: + + nsh> ping 10.0.0.1 + PING 10.0.0.1 56 bytes of data + 56 bytes from 10.0.0.1: icmp_seq=1 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=2 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=3 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=4 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=5 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=6 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=7 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=8 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=9 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=10 time=0 ms + 10 packets transmitted, 10 received, 0% packet loss, time 10100 ms + +NOTE: In this configuration is is normal to have packet loss > 0% +the first time you ping due to the default handling of the ARP +table. + +On the host side, you should also be able to ping the SAME70-XPLD: + + $ ping 10.0.0.2 + +You can also log into the NSH from the host PC like this: + + $ telnet 10.0.0.2 + Trying 10.0.0.2... + Connected to 10.0.0.2. + Escape character is '^]'. + sh_telnetmain: Session [3] Started + + NuttShell (NSH) NuttX-7.9 + nsh> help + help usage: help [-v] [] + + [ echo ifconfig mkdir mw sleep + ? exec ifdown mkfatfs ping test + cat exit ifup mkfifo ps umount + cp free kill mkrd put usleep + cmp get losetup mh rm wget + dd help ls mount rmdir xd + df hexdump mb mv sh + + Builtin Apps: + nsh> + +NOTE: If you enable this feature, you experience a delay on booting. +That is because the start-up logic waits for the network connection +to be established before starting NuttX. In a real application, you +would probably want to do the network bringup on a separate thread +so that access to the NSH prompt is not delayed. + +This delay will be especially long if the board is not connected to +a network. On the order of a minute! You will probably think that +NuttX has crashed! And then, when it finally does come up, the +network will not be available. + +Network Initialization Thread +----------------------------- +There is a configuration option enabled by CONFIG_NSH_NETINIT_THREAD +that will do the NSH network bring-up asynchronously in parallel on +a separate thread. This eliminates the (visible) networking delay +altogether. This networking initialization feature by itself has +some limitations: + + - If no network is connected, the network bring-up will fail and + the network initialization thread will simply exit. There are no + retries and no mechanism to know if the network initialization was + successful. + + - Furthermore, there is no support for detecting loss of the network + connection and recovery of networking when the connection is restored. + +Both of these shortcomings can be eliminated by enabling the network +monitor: + +Network Monitor +--------------- +By default the network initialization thread will bring-up the network +then exit, freeing all of the resources that it required. This is a +good behavior for systems with limited memory. + +If the CONFIG_NSH_NETINIT_MONITOR option is selected, however, then the +network initialization thread will persist forever; it will monitor the +network status. In the event that the network goes down (for example, if +a cable is removed), then the thread will monitor the link status and +attempt to bring the network back up. In this case the resources +required for network initialization are never released. + +Pre-requisites: + + - CONFIG_NSH_NETINIT_THREAD as described above. + + - CONFIG_NETDEV_PHY_IOCTL. Enable PHY IOCTL commands in the Ethernet + device driver. Special IOCTL commands must be provided by the Ethernet + driver to support certain PHY operations that will be needed for link + management. There operations are not complex and are implemented for + the Atmel SAMV7 family. + + - CONFIG_ARCH_PHY_INTERRUPT. This is not a user selectable option. + Rather, it is set when you select a board that supports PHY interrupts. + In most architectures, the PHY interrupt is not associated with the + Ethernet driver at all. Rather, the PHY interrupt is provided via some + board-specific GPIO and the board-specific logic must provide support + for that GPIO interrupt. To do this, the board logic must do two things: + (1) It must provide the function arch_phy_irq() as described and + prototyped in the nuttx/include/nuttx/arch.h, and (2) it must select + CONFIG_ARCH_PHY_INTERRUPT in the board configuration file to advertise + that it supports arch_phy_irq(). This logic can be found at + nuttx/configs/same70-xplained/src/sam_ethernet.c. + + - And a few other things: UDP support is required (CONFIG_NET_UDP) and + signals must not be disabled (CONFIG_DISABLE_SIGNALS). + +Given those prerequisites, the network monitor can be selected with these +additional settings. + + Networking Support -> Networking Device Support + CONFIG_NETDEV_PHY_IOCTL=y : Enable PHY ioctl support + + Application Configuration -> NSH Library -> Networking Configuration + CONFIG_NSH_NETINIT_THREAD : Enable the network initialization thread + CONFIG_NSH_NETINIT_MONITOR=y : Enable the network monitor + CONFIG_NSH_NETINIT_RETRYMSEC=2000 : Configure the network monitor as you like + CONFIG_NSH_NETINIT_SIGNO=18 + +USBHS Device Controller Driver +============================== +The USBHS device controller driver is enabled with he following configuration +settings: + + Device Drivers -> USB Device Driver Support + CONFIG_USBDEV=y : Enable USB device support + For full-speed/low-power mode: + CONFIG_USBDEV_DUALSPEED=n : Disable High speed support + For high-speed/normal mode: + CONFIG_USBDEV_DUALSPEED=y : Enable High speed support + CONFIG_USBDEV_DMA=y : Enable DMA methods + CONFIG_USBDEV_MAXPOWER=100 : Maximum power consumption + CONFIG_USBDEV_SELFPOWERED=y : Self-powered device + + System Type -> SAMV7 Peripheral Selection + CONFIG_SAMV7_USBDEVHS=y + + System Type -> SAMV7 USB High Sppeed Device Controller (DCD options + For full-speed/low-power mode: + CONFIG_SAMV7_USBDEVHS_LOWPOWER=y : Select low power mode + For high-speed/normal mode: + CONFIG_SAMV7_USBDEVHS_LOWPOWER=n : Don't select low power mode + CONFIG_SAMV7_USBHS_NDTDS=32 : Number of DMA transfer descriptors + CONFIG_SAMV7_USBHS_PREALLOCATE=y : Pre-allocate descriptors + +As discussed in the SAMV71-XULT README, this driver will not work correctly +if the write back data cache is enabled. You must have: + + CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y + +In order to be usable, you must all enabled some class driver(s) for the +USBHS device controller. Here, for example, is how to configure the CDC/ACM +serial device class: + + Device Drivers -> USB Device Driver Support + CONFIG_CDCACM=y : USB Modem (CDC ACM) support + CONFIG_CDCACM_EP0MAXPACKET=64 : Enpoint 0 packet size + CONFIG_CDCACM_EPINTIN=1 : Interrupt IN endpoint number + CONFIG_CDCACM_EPINTIN_FSSIZE=64 : Full speed packet size + CONFIG_CDCACM_EPINTIN_HSSIZE=64 : High speed packet size + CONFIG_CDCACM_EPBULKOUT=3 : Bulk OUT endpoint number + CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 : Full speed packet size + CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 : High speed packet size + CONFIG_CDCACM_EPBULKIN=2 : Bulk IN endpoint number + CONFIG_CDCACM_EPBULKIN_FSSIZE=64 : Full speed packet size + CONFIG_CDCACM_EPBULKIN_HSSIZE=512 : High speed packet size + CONFIG_CDCACM_NWRREQS=4 : Number of write requests + CONFIG_CDCACM_NRDREQS=8 : Number of read requests + CONFIG_CDCACM_BULKIN_REQLEN=96 : Size of write request buffer (for full speed) + CONFIG_CDCACM_BULKIN_REQLEN=768 : Size of write request buffer (for high speed) + CONFIG_CDCACM_RXBUFSIZE=257 : Serial read buffer size + CONFIG_CDCACM_TXBUFSIZE=193 : Serial transmit buffer size (for full speed) + CONFIG_CDCACM_TXBUFSIZE=769 : Serial transmit buffer size (for high speed) + CONFIG_CDCACM_VENDORID=0x0525 : Vendor ID + CONFIG_CDCACM_PRODUCTID=0xa4a7 : Product ID + CONFIG_CDCACM_VENDORSTR="NuttX" : Vendor string + CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" : Product string + + Device Drivers -> Serial Driver Support + CONFIG_SERIAL_REMOVABLE=y : Support for removable serial device + +The CDC/ACM application provides commands to connect and disconnect the +CDC/ACM serial device: + + CONFIG_SYSTEM_CDCACM=y : Enable connect/disconnect support + CONFIG_SYSTEM_CDCACM_DEVMINOR=0 : Use device /dev/ttyACM0 + CONFIG_CDCACM_RXBUFSIZE=??? : A large RX may be needed + +If you include this CDC/ACM application, then you can connect the CDC/ACM +serial device to the host by entering the command 'sercon' and you detach +the serial device with the command 'serdis'. If you do no use this +application, they you will have to write logic in your board initialization +code to initialize and attach the USB device. + +MCAN1 Loopback Test +=================== + + MCAN1 + ----- + SAM E70 Xplained has two MCAN modules that performs communication according + to ISO11898-1 (Bosch CAN specification 2.0 part A,B) and Bosch CAN FD + specification V1.0. MCAN1 is connected to an on-board ATA6561 CAN physical-layer + transceiver. + + ------- -------- -------- ------------- + SAM E70 FUNCTION ATA6561 SHARED + PIN FUNCTION FUNCTIONALITY + ------- -------- -------- ------------- + PC14 CANTX1 TXD Shield + PC12 CANRX1 RXD Shield + ------- -------- -------- ------------- + + Enabling MCAN1 + -------------- + These modifications may be applied to the same70-xplained/nsh configuration in order + to enable MCAN1: + + Device Drivers -> CAN Driver support + CONFIG_CAN=y # Enable the upper-half CAN driver + CONFIG_CAN_FIFOSIZE=8 + CONFIG_CAN_NPENDINGRTR=4 + + System Type -> SAMV7 Peripheral Selections + CONFIG_SAMV7_MCAN1=y # Enable MCAN1 as the lower-half + + System Type -> MCAN device driver options + CONFIG_SAMV7_MCAN_CLKSRC_MAIN=y # Use the MAIN clock as the source + CONFIG_SAMV7_MCAN_CLKSRC_PRESCALER=1 + + System Type ->MCAN device driver options -> MCAN1 device driver options + CONFIG_SAMV7_MCAN1_ISO11899_1=y # Loopback test only support ISO11899-1 + CONFIG_SAMV7_MCAN1_LOOPBACK=y # Needed for loopback test + CONFIG_SAMV7_MCAN1_BITRATE=500000 # Not critical for loopback test + CONFIG_SAMV7_MCAN1_PROPSEG=2 # Bit timing setup + CONFIG_SAMV7_MCAN1_PHASESEG1=11 # " " " " " " + CONFIG_SAMV7_MCAN1_PHASESEG2=11 # " " " " " " + CONFIG_SAMV7_MCAN1_FSJW=4 # " " " " " " + CONFIG_SAMV7_MCAN1_FBITRATE=2000000 # CAN_FD BTW mode is not used + CONFIG_SAMV7_MCAN1_FPROPSEG=2 # " " " " " " "" " " " " + CONFIG_SAMV7_MCAN1_FPHASESEG1=4 # " " " " " " "" " " " " + CONFIG_SAMV7_MCAN1_FPHASESEG2=4 # " " " " " " "" " " " " + CONFIG_SAMV7_MCAN1_FFSJW=2 # " " " " " " "" " " " " + CONFIG_SAMV7_MCAN1_NSTDFILTERS=0 # Filters are not used in the loopback test + CONFIG_SAMV7_MCAN1_NEXTFILTERS=0 # " " " " " " " " "" " " " " " " + CONFIG_SAMV7_MCAN1_RXFIFO0_32BYTES=y # Each RX FIFO0 element is 32 bytes + CONFIG_SAMV7_MCAN1_RXFIFO0_SIZE=8 # There are 8 queue elements + CONFIG_SAMV7_MCAN1_RXFIFO0_32BYTES=y # Each RX FIFO1 element is 32 bytes + CONFIG_SAMV7_MCAN1_RXFIFO0_SIZE=8 # There are 8 queue elements + CONFIG_SAMV7_MCAN1_RXBUFFER_32BYTES=y # Each RX BUFFER is 32 bytes + CONFIG_SAMV7_MCAN1_TXBUFFER_32BYTES=y # Each TX BUFFER is 32 bytes + CONFIG_SAMV7_MCAN1_TXFIFOQ_SIZE=8 # There are 8 queue elements + CONFIG_SAMV7_MCAN1_TXEVENTFIFO_SIZE=0 # The event FIFO is not used + + Board Selection + CONFIG_LIB_BOARDCTL=y # Needed for CAN initialization + CONFIG_BOARDCTL_CANINIT=y # Enabled CAN initialization + + Enabling the CAN Loopback Test + ------------------------------ + Application Configuration -> Examples -> CAN Example + CONFIG_EXAMPLES_CAN=y # Enables the CAN test + + Enabling CAN Debug Output + ------------------------- + Build Setup -> Debug Options + CONFIG_DEBUG=y # Enables general debug features + CONFIG_DEBUG_VERBOSE=y # Enables verbose output + CONFIG_DEBUG_CAN=y # Enables debug output from CAN + + CONFIG_STACK_COLORATION=y # Monitor stack usage + CONFIG_DEBUG_SYMBOLS=y # Needed only for use with a debugger + CONFIG_DEBUG_NOOPT=y # Disables optimization + + System Type -> MCAN device driver options + CONFIG_SAMV7_MCAN_REGDEBUG=y # Super low level register debug output + +SPI Slave +========= + + An interrutp driven SPI slave driver as added on 2015-08-09 but has not + been verified as of this writing. See discussion in include/nuttx/spi/slave.h + and below. + + I do not yet have a design that supports SPI slave DMA. And, under + certain, very limited conditions, I think it can be done. Those + certain conditions are: + + a) The master does not tie the chip select to ground. The master must + raise chip select at the end of the transfer. Then I do not need to + know the length of the transfer; I can cancel the DMA when the chip + is de-selected. + + b) The protocol includes a dummy read after sending the command. This + is very common in SPI device and should not be an issue if it is + specified. This dummy read time provides time to set up the DMA. + So the protocol would be: + + i) Master drops the chip select. + ii) Master sends the command which will indicate whether the master + is reading, writing, or exchanging data. The master discards + the garbage return value. + iii) Slave is interrupted when the command word is received. The + SPI device then decodes the command word and setups up the + subsequent DMA. + iv) Master sends a dummy word and discards the return value. + During the bit times to shift the dummy word, the slave has time + to set up the DMA. + v) Master then reads or writes (or exchanges) the data If the DMA + is in place, the transfer should continue normally. + vi) At the end of the data transfer the master raises the chip + select. + + c) There are limitations in the word time, i.e., the time between the + interrupt for each word shifted in from the master. + + The controller driver will get events after the receipt of each word in + ii), iv), and v). The time between each word will be: + + word-time = nbits * bit time + inter-word-gap + + So for an 8 bit interface at 20MHz, the words will be received from the + master a 8 * 50nsec = 400 nsec + inter-word-gap. That is the time + during which the dummy word would be shifted and during which we + receive the interrupt for the command word, interpret the command word, + and to set up the DMA for the remaining word transfer. I don't think + that is possible, at least not at 20 MHz. + + That is far too fast even for the interrupt driven solution that I have + in place now. It could not work at 20MHz. If we suppose that interrupt + processing is around 1 usec, then an 8 bit interface could not have bit + times more than 125 nsec or 8 KHz. Interrupt handling should be faster + than 1 usec, but not a lot faster. I have not benchmarked it. NuttX + also supports special, zero latency interrupts that could bring the + interrupt time down even more. + + Note that we would also have a little more processing time if you used + 16-bit SPI word size. + + Note also that the interrupt driven approach would have this same basic + performance limitation with the additional disadvantage that: + + a) The driver will receive two interrupts per word exchanged: + + i) One interrupt will be received when the word is shifted in from + the master (at the end of 8-bit times). This is a data received + interrupt. + + ii) And another interrupt when the next words moved to the shift-out + register, freeing up the transmit holding register. This is the + data sent interrupt. + + The ii) event should be very soon after the i) event. + + Without DMA, the only way to reduce the interrupt rate would be to add + interrupt-level polling to detect the when transmit holding register + is available. That is not really a good idea. + + b) It will hog all of the CPU for the duration of the transfer). + +Tickless OS +=========== + + Background + ---------- + By default, a NuttX configuration uses a periodic timer interrupt that + drives all system timing. The timer is provided by architecture-specific + code that calls into NuttX at a rate controlled by CONFIG_USEC_PER_TICK. + The default value of CONFIG_USEC_PER_TICK is 10000 microseconds which + corresponds to a timer interrupt rate of 100 Hz. + + An option is to configure NuttX to operation in a "tickless" mode. Some + limitations of default system timer are, in increasing order of + importance: + + - Overhead: Although the CPU usage of the system timer interrupt at 100Hz + is really very low, it is still mostly wasted processing time. One most + timer interrupts, there is really nothing that needs be done other than + incrementing the counter. + - Resolution: Resolution of all system timing is also determined by + CONFIG_USEC_PER_TICK. So nothing that be time with resolution finer than + 10 milliseconds be default. To increase this resolution, + CONFIG_USEC_PER_TICK an be reduced. However, then the system timer + interrupts use more of the CPU bandwidth processing useless interrupts. + - Power Usage: But the biggest issue is power usage. When the system is + IDLE, it enters a light, low-power mode (for ARMs, this mode is entered + with the wfi or wfe instructions for example). But each interrupt + awakens the system from this low power mode. Therefore, higher rates + of interrupts cause greater power consumption. + + The so-called Tickless OS provides one solution to issue. The basic + concept here is that the periodic, timer interrupt is eliminated and + replaced with a one-shot, interval timer. It becomes event driven + instead of polled: The default system timer is a polled design. On + each interrupt, the NuttX logic checks if it needs to do anything + and, if so, it does it. + + Using an interval timer, one can anticipate when the next interesting + OS event will occur, program the interval time and wait for it to fire. + When the interval time fires, then the scheduled activity is performed. + + Configuration + ------------- + The following configuration options will enable support for the Tickless + OS for the SAMV7 platforms using TC0 channels 0-3 (other timers or + timer channels could be used making the obvious substitutions): + + RTOS Features -> Clocks and Timers + CONFIG_SCHED_TICKLESS=y : Configures the RTOS in tickless mode + CONFIG_SCHED_TICKLESS_ALARM=n : (option not implemented) + CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP=y + + System Type -> SAMV7 Peripheral Support + CONFIG_SAMV7_TC0=y : Enable TC0 (TC channels 0-3 + + System Type -> Timer/counter Configuration + CONFIG_SAMV7_ONESHOT=y : Enables one-shot timer wrapper + CONFIG_SAMV7_FREERUN=y : Enabled free-running timer wrapper + CONFIG_SAMV7_TICKLESS_ONESHOT=0 : Selects TC0 channel 0 for the one-shot + CONFIG_SAMV7_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free- + : running timer + + The resolution of the clock is provided by the CONFIG_USEC_PER_TICK + setting in the configuration file. + + NOTE: In most cases, the slow clock will be used as the timer/counter + input. The SAME70-Xplained board has pads for a 32.768KHz crystal, + however, the boad ships with that position unpopulated. So, be default + this will probably end up using the slow RC oscillator which will give + you very bad timing. + + If you add a crystal to your board, you can select to use it with the + definition BOARD_HAVE_SLOWXTAL in the configs/same70-xplained/board.h + file. + + The slow clock has a resolution of about 30.518 microseconds. Ideally, + the value of CONFIG_USEC_PER_TICK should be the exact clock resolution. + Otherwise there will be cumulative timing inaccuracies. But a choice + choice of: + + CONFIG_USEC_PER_TICK=31 + + will have an error of 0.6% and will have inaccuracies that will + effect the time due to long term error build-up. + + Using the slow clock clock input, the Tickless support is functional, + however, there are inaccuracies in delays. For example, + + nsh> sleep 10 + + results in a delay of maybe 5.4 seconds. But the timing accuracy is + correct if all competing uses of the interval timer are disabled (mostly + from the high priority work queue). Therefore, I conclude that this + inaccuracy is due to the inaccuracies in the representation of the clock + rate. 30.518 usec cannot be represented accurately. Each timing + calculation results in a small error. When the interval timer is very + busy, long delays will be divided into many small pieces and each small + piece has a large error in the calculation. The cumulative error is the + cause of the problem. + + Solution: The same70-xplained/src/sam_boot.c file has additional logic + to enable the programmable clock PCK6 as a clock source for the + timer/counters if the Tickless mode is selected. The ideal frequency + would be: + + frequency = 1,000,000 / CONFIG_USEC_PER_TICK + + The main crystal is selected as the frequency source. The maximum + prescaler value is 256 so the minimum frequency is 46,875 Hz which + corresponds to a period of 21.3 microseconds. A value of + CONFIG_USEC_PER_TICK=20, or 50KHz, would give an exact solution with + a divider of 240. + + SAME70 Timer Usage + ------------------ + This current implementation uses two timers: A one-shot timer to + provide the timed events and a free running timer to provide the current + time. Since timers are a limited resource, that could be an issue on + some systems. + + We could do the job with a single timer if we were to keep the single + timer in a free-running at all times. The SAME70 timer/counters have + 16-bit counters with the capability to generate a compare interrupt when + the timer matches a compare value but also to continue counting without + stopping (giving another, different interrupt when the timer rolls over + from 0xffff to zero). So we could potentially just set the compare at + the number of ticks you want PLUS the current value of timer. Then you + could have both with a single timer: An interval timer and a free- + running counter with the same timer! In this case, you would want to + to set CONFIG_SCHED_TICKLESS_ALARM in the NuttX configuration. + + Patches are welcome! + +Debugging +========= + + The on-board EDBG appears to work only with Atmel Studio. You can however, + simply connect a SAM-ICE or J-Link to the JTAG/SWD connector on the board + and that works great. The only tricky thing is getting the correct + orientation of the JTAG connection. + + I have been using Atmel Studio to write code to flash then I use the Segger + J-Link GDB server to debug. I have been using the 'Device Programming' I + available under the Atmel Studio 'Tool' menu. I have to disconnect the + SAM-ICE while programming with the EDBG. I am sure that you could come up + with a GDB server-only solution if you wanted. + + I run GDB like this from the directory containing the NuttX ELF file: + + arm-none-eabi-gdb + (gdb) target remote localhost:2331 + (gdb) mon reset + (gdb) file nuttx + (gdb) ... start debugging ... + +Using OpenOCD and GDB to flash via the EDBG chip +================================================ + + Building OpenOCD under Cygwin: + + Refer to configs/olimex-lpc1766stk/README.txt + + Installing OpenOCD in Linux (but see note below): + + sudo apt-get install openocd + + NOTE: At the time of writing installing the above openocd package from + the distribution (Ubuntu 14.04) was not enough to get the latest openocd + version supporting the SAME70 Xplained. + + The code was obtained from the OpenOCD git repository, available at + https://github.com/ntfreak/openocd. + + git clone https://github.com/ntfreak/openocd.git + + Then follow the directions of the "Building OpenOCD" section of their README, + but be sure to configure including the CMSIS-DAP interface: + + ./bootstrap + ./configure --enable-cmsis-dap + make + sudo make install + + If your configure step fails, you might be missing some dependencies, i.e.: + + sudo apt-get install libhidapi-dev + + Helper Scripts. + + OpenOCD requires a configuration file. I keep the one I used last here: + + configs/same70-xplained/tools/atmel_same70_xplained.cfg + + However, the "correct" configuration script to use with OpenOCD may + change as the features of OpenOCD evolve. So you should at least + compare that atmel_same70_xplained.cfg file with configuration files in + /usr/share/openocd/scripts. As of this writing, the configuration + files of interest were: + + /usr/share/openocd/scripts/interface/cmsis-dap.cfg + /usr/share/openocd/scripts/board/atmel_same70_xplained.cfg + /usr/share/openocd/scripts/target/atsamv.cfg + + There is also a script on the tools/ directory that I use to start + the OpenOCD daemon on my system called oocd.sh. That script will + probably require some modifications to work in another environment: + + - Possibly the value of OPENOCD_PATH and TARGET_PATH + - It assumes that the correct script to use is the one at + configs/same70-xplained/tools/atmel_same70_xplained.cfg + + Starting OpenOCD + + Then you should be able to start the OpenOCD daemon like: + + configs/same70-xplained/tools/oocd.sh $PWD + + Connecting GDB + + Once the OpenOCD daemon has been started, you can connect to it via + GDB using the following GDB command: + + arm-nuttx-elf-gdb + (gdb) target remote localhost:3333 + + NOTE: The name of your GDB program may differ. For example, with the + CodeSourcery toolchain, the ARM GDB would be called arm-none-eabi-gdb. + + After starting GDB, you can load the NuttX ELF file: + + (gdb) symbol-file nuttx + (gdb) monitor reset + (gdb) monitor halt + (gdb) load nuttx + + NOTES: + 1. Loading the symbol-file is only useful if you have built NuttX to + include debug symbols (by setting CONFIG_DEBUG_SYMBOLS=y in the + .config file). + 2. The MCU must be halted prior to loading code using 'mon reset' + as described below. + + OpenOCD will support several special 'monitor' commands. These + GDB commands will send comments to the OpenOCD monitor. Here + are a couple that you will need to use: + + (gdb) monitor reset + (gdb) monitor halt + + NOTES: + 1. The MCU must be halted using 'mon halt' prior to loading code. + 2. Reset will restart the processor after loading code. + 3. The 'monitor' command can be abbreviated as just 'mon'. + +Configurations +============== + +Information Common to All Configurations +---------------------------------------- +Each SAME70-XPLD configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh same70-xplained/ + cd - + . ./setenv.sh + +Before sourcing the setenv.sh file above, you should examine it and perform +edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory +than holds your toolchain binaries. + +And then build NuttX by simply typing the following. At the conclusion of +the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make oldconfig + make + +The that is provided above as an argument to the tools/configure.sh +must be is one of the following. + +NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on USART1 (the EDBG VCOM) + + NOTE: When USART1 is used, the pin PB4 is reconfigured. Normally, PB4 + is TDI. When it is reconfigured for use with USART1, the capability to + debug is lost! If you plan to debug you should most certainly not use + USART1. UART3 might be a good option (the Arduino RXD/TXD): + + -CONFIG_SAMV7_USART1=y + -CONFIG_USART1_ISUART=y + -CONFIG_USART1_SERIAL_CONSOLE=y + -CONFIG_USART1_RXBUFSIZE=256 + -CONFIG_USART1_TXBUFSIZE=256 + -CONFIG_USART1_BAUD=115200 + -CONFIG_USART1_BITS=8 + -CONFIG_USART1_PARITY=0 + -CONFIG_USART1_2STOP=0 + + +CONFIG_SAMV7_UART3=y + +CONFIG_UART3_SERIAL_CONSOLE=y + +CONFIG_UART3_RXBUFSIZE=256 + +CONFIG_UART3_TXBUFSIZE=256 + +CONFIG_UART3_BAUD=115200 + +CONFIG_UART3_BITS=8 + +CONFIG_UART3_PARITY=0 + +CONFIG_UART3_2STOP=0 + + UART3 is not the default because (1) the placement of the RJ-45 connector + makes it difficult to install Arduino shield cards and (2) the Arduino + connectors are not populated on the board as it comes from the factory. + + 3. All of these configurations are set up to build under Windows using the + "GNU Tools for ARM Embedded Processors" that is maintained by ARM + (unless stated otherwise in the description of the configuration). + + https://launchpad.net/gcc-arm-embedded + + As of this writing (2015-03-11), full support is difficult to find + for the Cortex-M7, but is supported by at least this realeasse of + the ARM GNU tools: + + https://launchpadlibrarian.net/192228215/release.txt + + Current (2105-07-31) setenv.sh file are configured to use this + release: + + https://launchpadlibrarian.net/209776344/release.txt + + That toolchain selection can easily be reconfigured using + 'make menuconfig'. Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Window environment + CONFIG_WINDOWS_CYGWIN=y : Cywin under Windows + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU ARM EABI toolchain + + NOTE: As of this writing, there are issues with using this tool at + the -Os level of optimization. This has not been proven to be a + compiler issue (as least not one that might not be fixed with a + well placed volatile qualifier). However, in any event, it is + recommend that you use not more that -O2 optimization. + +Configuration sub-directories +----------------------------- + + netnsh: + + Configures the NuttShell (nsh) located at examples/nsh. There are two + very similar NSH configurations: + + - nsh. This configuration is focused on low level, command-line + driver testing. It has no network. + - netnsh. This configuration is focused on network testing and + has only limited command support. + + NOTES: + + 1. The serial console is configured by default for use with the EDBG VCOM + (USART1). You will need to reconfigure if you will to use a different + U[S]ART. See "Information Common to All Configurations" above. + + 2. Default stack sizes are large and should really be tuned to reduce + the RAM footprint: + + CONFIG_SCHED_HPWORKSTACKSIZE=2048 + CONFIG_IDLETHREAD_STACKSIZE=1024 + CONFIG_USERMAIN_STACKSIZE=2048 + CONFIG_PTHREAD_STACK_MIN=256 + CONFIG_PTHREAD_STACK_DEFAULT=2048 + CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 + CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 + CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 + CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 + + 3. NSH built-in applications are supported. There are, however, not + enabled built-in applications. + + Binary Formats: + CONFIG_BUILTIN=y : Enable support for built-in programs + + Application Configuration: + CONFIG_NSH_BUILTIN_APPS=y : Enable starting apps from NSH command line + + 4. The network initialization thread and the NSH network montior are + enabled in this configuration. As a result, networking initialization + is performed asynchronously with NSH bring-up. For more information, + see the paragraphs above entitled "Network Initialization Thread" and + "Network Monitor". + + 5. SDRAM is NOT enabled in this configuration. + + 6. TWI/I2C + + TWIHS0 is enabled in this configuration. The SAM E70 Xplained + supports one devices on the one on-board I2C device on the TWIHS0 bus: + The AT24MAC402 serial EEPROM described above. + Relevant configuration settings: + + CONFIG_SAMV7_TWIHS0=y + CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + + CONFIG_I2C=y + + 7. TWIHS0 is used to support 256 byte non-volatile storage. This EEPROM + holds the assigned MAC address which is necessary for networking. The + EEPROM is also available for storage of configuration data using the + MTD configuration as described above under the heading, "MTD + Configuration Data". + + 8. Support for HSMCI is built-in by default. The SAME70-XPLD provides + one full-size SD memory card slot. Refer to the section entitled + "SD card" for configuration-related information. + + See "Open Issues" above for issues related to HSMCI. + + The auto-mounter is not enabled. See the section above entitled + "Auto-Mounter". + + 9. Performance-related Configuration settings: + + CONFIG_ARMV7M_ICACHE=y : Instruction cache is enabled + CONFIG_ARMV7M_DCACHE=y : Data cache is enabled + CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y : Write through mode + CONFIG_ARCH_FPU=y : H/W floating point support is enabled + CONFIG_ARCH_DPFPU=y : 64-bit H/W floating point support is enabled + + # CONFIG_ARMV7M_ITCM is not set : Support not yet in place + # CONFIG_ARMV7M_DTCM is not set : Support not yet in place + + I- and D-Caches are enabled but the D-Cache must be enabled in write- + through mode. This is to work around issues with the RX and TX + descriptors with are 8-bytes in size. But the D-Cache cache line + size is 32-bytes. That means that you cannot reload, clean or + invalidate a descriptor without also effecting three neighboring + descriptors. Setting write through mode eliminates the need for + cleaning the D-Cache. If only reloading and invalidating are done, + then there is no problem. + + Stack sizes are also large to simplify the bring-up and should be + tuned for better memory usages. + + STATUS: + 2015-03-29: I- and D-caches are currently enabled, but as noted + above, the D-Cache must be enabled in write-through mode. Also -Os + optimization is not being used (-O2). If the cache is enabled in + Write-Back mode or if higher levels of optimization are enabled, then + there are failures when trying to ping the target from a host. + + nsh: + + Configures the NuttShell (nsh) located at examples/nsh. There are two + very similar NSH configurations: + + - nsh. This configuration is focused on low level, command-line + driver testing. It has no network. + - netnsh. This configuration is focused on network testing and + has only limited command support. + + NOTES: + + 1. The serial console is configured by default for use with the EDBG VCOM + (USART1). You will need to reconfigure if you will to use a different + U[S]ART. See "Information Common to All Configurations" above. + + 2. Default stack sizes are large and should really be tuned to reduce + the RAM footprint: + + CONFIG_ARCH_INTERRUPTSTACK=2048 + CONFIG_IDLETHREAD_STACKSIZE=1024 + CONFIG_USERMAIN_STACKSIZE=2048 + CONFIG_PTHREAD_STACK_DEFAULT=2048 + ... and others ... + + 3. NSH built-in applications are supported. + + Binary Formats: + CONFIG_BUILTIN=y : Enable support for built-in programs + + Application Configuration: + CONFIG_NSH_BUILTIN_APPS=y : Enable starting apps from NSH command line + + 4. SDRAM is enabled in this configuration. Here are the relevant + configuration settings: + + System Type + CONFIG_SAMV7_SDRAMC=y + CONFIG_SAMV7_SDRAMSIZE=2097152 + + SDRAM is not added to the heap in this configuration. To do that + you would need to set CONFIG_SAMV7_SDRAMHEAP=y and CONFIG_MM_REGIONS=2. + Instead, the SDRAM is set up so that is can be used with a destructive + RAM test enabled with this option: + + Application Configuration: + CONFIG_SYSTEM_RAMTEST=y + + The RAM test can be executed as follows: + + nsh> ramtest -w 70000000 2097152 + + NuttShell (NSH) NuttX-7.8 + nsh> ramtest -w 70000000 2097152 + RAMTest: Marching ones: 70000000 2097152 + RAMTest: Marching zeroes: 70000000 2097152 + RAMTest: Pattern test: 70000000 2097152 55555555 aaaaaaaa + RAMTest: Pattern test: 70000000 2097152 66666666 99999999 + RAMTest: Pattern test: 70000000 2097152 33333333 cccccccc + RAMTest: Address-in-address test: 70000000 2097152 + nsh> + + 5. The button test at apps/examples/buttons is included in the + configuration. This configuration illustrates (1) use of the buttons + on the evaluation board, and (2) the use of PIO interrupts. Example + usage: + + NuttShell (NSH) NuttX-7.8 + nsh> help + help usage: help [-v] [] + ... + Builtin Apps: + buttons + nsh> buttons 3 + maxbuttons: 3 + Attached handler at 4078f7 to button 0 [SW0], oldhandler:0 + Attached handler at 4078e9 to button 1 [SW1], oldhandler:0 + IRQ:125 Button 1:SW1 SET:00: + SW1 released + IRQ:125 Button 1:SW1 SET:02: + SW1 depressed + IRQ:125 Button 1:SW1 SET:00: + SW1 released + IRQ:90 Button 0:SW0 SET:01: + SW0 depressed + IRQ:90 Button 0:SW0 SET:00: + SW0 released + IRQ:125 Button 1:SW1 SET:02: + SW1 depressed + nsh> + + 6. TWI/I2C + + TWIHS0 is enabled in this configuration. The SAM E70 Xplained + supports one device on the one on-board I2C device on the TWIHS0 bus: + The AT24MAC402 serial EEPROM described above. + + In this configuration, the I2C tool at apps/system/i2ctool is + enabled. This tools supports interactive access to I2C devices on + the enabled TWIHS bus. Relevant configuration settings: + + CONFIG_SAMV7_TWIHS0=y + CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + + CONFIG_I2C=y + + CONFIG_SYSTEM_I2CTOOL=y + CONFIG_I2CTOOL_MINBUS=0 + CONFIG_I2CTOOL_MAXBUS=0 + CONFIG_I2CTOOL_MINADDR=0x03 + CONFIG_I2CTOOL_MAXADDR=0x77 + CONFIG_I2CTOOL_MAXREGADDR=0xff + CONFIG_I2CTOOL_DEFFREQ=400000 + + Example usage: + + nsh> i2c + Usage: i2c [arguments] + Where is one of: + + Show help : ? + List busses : bus + List devices : dev [OPTIONS] + Read register : get [OPTIONS] [] + Show help : help + Write register: set [OPTIONS] [] + Verify access : verf [OPTIONS] [] [] + + Where common "sticky" OPTIONS include: + [-a addr] is the I2C device address (hex). Default: 03 Current: 03 + [-b bus] is the I2C bus number (decimal). Default: 0 Current: 0 + [-r regaddr] is the I2C device register address (hex). Default: 00 Current: 00 + [-w width] is the data width (8 or 16 decimal). Default: 8 Current: 8 + [-s|n], send/don't send start between command and data. Default: -n Current: -n + [-i|j], Auto increment|don't increment regaddr on repititions. Default: NO Current: NO + [-f freq] I2C frequency. Default: 400000 Current: 400000 + + NOTES: + o An environment variable like $PATH may be used for any argument. + o Arguments are "sticky". For example, once the I2C address is + specified, that address will be re-used until it is changed. + + WARNING: + o The I2C dev command may have bad side effects on your I2C devices. + Use only at your own risk. + nsh> i2c bus + BUS EXISTS? + Bus 0: YES + nsh> i2c dev 3 77 + 0 1 2 3 4 5 6 7 8 9 a b c d e f + 00: -- -- -- -- -- -- -- -- -- -- -- -- -- + 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 20: -- -- -- -- -- -- -- -- 28 -- -- -- -- -- -- -- + 30: -- -- -- -- -- -- -- 37 -- -- -- -- -- -- -- -- + 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 50: -- -- -- -- -- -- -- 57 -- -- -- -- -- -- -- 5f + 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 70: -- -- -- -- -- -- -- -- + + Where 0x28 is the address of TWI interface to the EDBG and 0x57 and + 0x5f are the addresses of the AT24 EEPROM (I am not sure what the + other address, 0x37, is as this writing). + + 7. TWIHS0 is also used to support 256 byte non-volatile storage for + configuration data using the MTD configuration as described above + under the heading, "MTD Configuration Data". + + 8. Support for HSMCI is built-in by default. The SAME70-XPLD provides + one full-size SD memory card slot. Refer to the section entitled + "SD card" for configuration-related information. + + See "Open Issues" above for issues related to HSMCI. + + The auto-mounter is not enabled. See the section above entitled + "Auto-Mounter". + + 9. Performance-related Configuration settings: + + CONFIG_ARMV7M_ICACHE=y : Instruction cache is enabled + CONFIG_ARMV7M_DCACHE=y : Data cache is enabled + CONFIG_ARMV7M_DCACHE_WRITETHROUGH=n : Write back mode + CONFIG_ARCH_FPU=y : H/W floating point support is enabled + CONFIG_ARCH_DPFPU=y : 64-bit H/W floating point support is enabled + + # CONFIG_ARMV7M_ITCM is not set : Support not yet in place + # CONFIG_ARMV7M_DTCM is not set : Support not yet in place + + Stack sizes are also large to simplify the bring-up and should be + tuned for better memory usages. + + STATUS: + 2015-03-28: HSMCI TX DMA is disabled. There are some issues with the TX + DMA that need to be corrected. diff --git a/configs/same70-xplained/include/board.h b/configs/same70-xplained/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..2e5378b82c1371884284ee4ce6e0f287ef83e47c --- /dev/null +++ b/configs/same70-xplained/include/board.h @@ -0,0 +1,386 @@ +/************************************************************************************ + * configs/same70-xplained/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAME70_XPLAINED_INCLUDE_BOARD_H +#define __CONFIGS_SAME70_XPLAINED_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Clocking *************************************************************************/ +/* After power-on reset, the SAME70Q device is running out of the Master Clock using + * the Fast RC Oscillator running at 4 MHz. + * + * MAINOSC: Frequency = 12MHz (crystal) + * + * 300MHz Settings: + * PLLA: PLL Divider = 1, Multiplier = 20 to generate PLLACK = 240MHz + * Master Clock (MCK): Source = PLLACK, Prescalar = 1 to generate MCK = 120MHz + * CPU clock: 120MHz + * + * There can be two on-board crystals. However, the the 32.768 crystal is not + * populated on the stock SAME70. The fallback is to use th on-chip, slow RC + * oscillator which has a frequency of 22-42 KHz, nominally 32 KHz. + */ + +#undef BOARD_HAVE_SLOWXTAL /* Slow crystal not populated */ +#define BOARD_SLOWCLK_FREQUENCY (32000) /* 32 KHz RC oscillator (nominal) */ +#define BOARD_MAINOSC_FREQUENCY (12000000) /* 12 MHz main oscillator */ + +/* Main oscillator register settings. + * + * The main oscillator could be either the embedded 4/8/12 MHz fast RC oscillators + * or an external 3-20 MHz crystal or ceramic resonator. The external clock source + * is selected by default in sam_clockconfig.c. Here we need to specify the main + * oscillator start-up time. + * + * REVISIT... this is old information: + * The start up time should be should be: + * + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ +#define BOARD_CKGR_MOR_MOSCXTENBY (PMC_CKGR_MOR_MOSCXTEN) /* Crystal Oscillator Enable */ + +/* PLLA configuration. + * + * Divider = 1 + * Multiplier = 25 + * + * Yields: + * + * PLLACK = 25 * 12MHz / 1 = 300MHz + */ + +#define BOARD_CKGR_PLLAR_STMODE PMC_CKGR_PLLAR_STMODE_FAST +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_MUL PMC_CKGR_PLLAR_MUL(24) +#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS + +/* PMC master clock register settings. + * + * BOARD_PMC_MCKR_CSS - The source of main clock input. This may be one of: + * + * PMC_MCKR_CSS_SLOW Slow Clock + * PMC_MCKR_CSS_MAIN Main Clock + * PMC_MCKR_CSS_PLLA PLLA Clock + * PMC_MCKR_CSS_UPLL Divided UPLL Clock + * + * BOARD_PMC_MCKR_PRES - Source clock pre-scaler. May be one of: + * + * PMC_MCKR_PRES_DIV1 Selected clock + * PMC_MCKR_PRES_DIV2 Selected clock divided by 2 + * PMC_MCKR_PRES_DIV4 Selected clock divided by 4 + * PMC_MCKR_PRES_DIV8 Selected clock divided by 8 + * PMC_MCKR_PRES_DIV16 Selected clock divided by 16 + * PMC_MCKR_PRES_DIV32 Selected clock divided by 32 + * PMC_MCKR_PRES_DIV64 Selected clock divided by 64 + * PMC_MCKR_PRES_DIV3 Selected clock divided by 3 + * + * The prescaler determines (1) the CPU clock and (2) the input into the + * second divider that then generates the Master Clock (MCK). MCK is the + * source clock of the peripheral clocks. + * + * BOARD_PMC_MCKR_MDIV - MCK divider. May be one of: + * + * PMC_MCKR_MDIV_DIV1 Master Clock = Prescaler Output Clock / 1 + * PMC_MCKR_MDIV_DIV2 Master Clock = Prescaler Output Clock / 2 + * PMC_MCKR_MDIV_DIV4 Master Clock = Prescaler Output Clock / 4 + * PMC_MCKR_MDIV_DIV3 Master Clock = Prescaler Output Clock / 3 + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA /* Source = PLLA */ +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 /* Prescaler = /1 */ +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_DIV2 /* MCK divider = /2 */ + +/* USB clocking */ + +#define BOARD_PMC_MCKR_UPLLDIV2 0 /* UPLL clock not divided by 2 */ + +/* Resulting frequencies */ + +#define BOARD_PLLA_FREQUENCY (300000000) /* PLLACK: 25 * 12Mhz / 1 */ +#define BOARD_CPU_FREQUENCY (300000000) /* CPU: PLLACK / 1 */ +#define BOARD_MCK_FREQUENCY (150000000) /* MCK: PLLACK / 1 / 2 */ +#undef BOARD_UPLL_FREQUENCY /* To be provided */ + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 150MHz, CLKDIV = 186, MCI_SPEED = 150MHz / (2*186 + 1 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV ((186 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 150MHz, CLKDIV = 3 w/CLOCKODD, MCI_SPEED = 150MHz /(2*3 + 0 + 2) = 18.75 MHz */ + +#define HSMCI_MMCXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 150MHz, CLKDIV = 2, MCI_SPEED = 150MHz /(2*2 + 0 + 2) = 25 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/* FLASH wait states. + * + * Wait states Max frequency at 105 centigrade (STH conditions) + * + * VDDIO + * 1.62V 2.7V + * --- ------- ------- + * 0 26 MHz 30 MHz + * 1 52 MHz 62 MHz + * 2 78 MHz 93 MHz + * 3 104 MHz 124 MHz + * 4 131 MHz 150 MHz + * 5 150 MHz --- MHz + * + * Given: VDDIO=3.3V, VDDCORE=1.2V, MCK=150MHz + */ + +#define BOARD_FWS 4 + +/* LED definitions ******************************************************************/ +/* LEDs + * + * A single LED is available driven by PC8. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED0 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED0_BIT (1 << BOARD_LED0) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_autoleds.c. The LEDs are used to encode + * OS-related events as follows: + * + * ------------------- ---------------------------- ------ + * SYMBOL Meaning LED + * ------------------- ---------------------------- ------ */ + +#define LED_STARTED 0 /* NuttX has been started OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON */ +#define LED_INIRQ 2 /* In an interrupt N/C */ +#define LED_SIGNAL 2 /* In a signal handler N/C */ +#define LED_ASSERTION 2 /* An assertion failed N/C */ +#define LED_PANIC 3 /* The system has crashed FLASH */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* Thus is LED is statically on, NuttX has successfully booted and is, + * apparently, running normally. If LED is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +/* Button definitions ***************************************************************/ +/* Buttons + * + * SAM E70 Xplained contains two mechanical buttons. One button is the RESET + * button connected to the SAM E70 reset line and the other, PA11, is a generic + * user configurable button. When a button is pressed it will drive the I/O + * line to GND. + * + * NOTE: There are no pull-up resistors connected to the generic user buttons + * so it is necessary to enable the internal pull-up in the SAM E70 to use the + * button. + */ + +#define BUTTON_SW0 0 +#define NUM_BUTTONS 1 + +#define BUTTON_SW0_BIT (1 << BUTTON_SW0) + +/* PIO Disambiguation ***************************************************************/ +/* Serial Console + * + * The SAME70-XPLD has no on-board RS-232 drivers so it will be necessary to use + * either the VCOM or an external RS-232 driver. Here are some options. + * + * - Arduino Serial Shield: One option is to use an Arduino-compatible + * serial shield. This will use the RXD and TXD signals available at pins + * 0 an 1, respectively, of the Arduino "Digital Low" connector. On the + * SAME70-XPLD board, this corresponds to UART3: + * + * ------ ------ ------- ------- -------- + * Pin on SAME70 Arduino Arduino SAME70 + * J503 PIO Name Pin Function + * ------ ------ ------- ------- -------- + * 1 PD28 RX0 0 URXD3 + * 2 PD30 TX0 1 UTXD3 + * ------ ------ ------- ------- -------- + * + * There are alternative pin selections only for UART3 TXD: + */ + +#define GPIO_UART3_TXD GPIO_UART3_TXD_1 + + +/* - Arduino Communications. Additional UART/USART connections are available + * on the Arduino Communications connection J505: + * + * ------ ------ ------- ------- -------- + * Pin on SAME70 Arduino Arduino SAME70 + * J503 PIO Name Pin Function + * ------ ------ ------- ------- -------- + * 3 PD18 RX1 0 URXD4 + * 4 PD19 TX1 0 UTXD4 + * 5 PD15 RX2 0 RXD2 + * 6 PD16 TX2 0 TXD2 + * 7 PB0 RX3 0 RXD0 + * 8 PB1 TX3 1 TXD0 + * ------ ------ ------- ------- -------- + * + * There are alternative pin selections only for UART4 TXD: + */ + +#define GPIO_UART4_TXD GPIO_UART4_TXD_1 + +/* - SAMV7-XULT EXTn connectors. USART pins are also available the EXTn + * connectors. The following are labelled in the User Guide for USART + * functionality: + * + * ---- -------- ------ -------- + * EXT1 EXTI1 SAME70 SAME70 + * Pin Name PIO Function + * ---- -------- ------ -------- + * 13 USART_RX PB00 RXD0 + * 14 USART_TX PB01 TXD0 + * + * ---- -------- ------ -------- + * EXT2 EXTI2 SAME70 SAME70 + * Pin Name PIO Function + * ---- -------- ------ -------- + * 13 USART_RX PA21 RXD1 + * 14 USART_TX PB04 TXD1 + * + * There are no alternative pin selections for USART0 or USART1. + */ + +/* - VCOM. The Virtual Com Port gateway is available on USART1: + * + * ------ -------- + * SAME70 SAME70 + * PIO Function + * ------ -------- + * PB04 TXD1 + * PA21 RXD1 + * ------ -------- + * + * There are no alternative pin selections for USART1. + */ + +/* MCAN1 + * + * SAM E70 Xplained has two MCAN modules that performs communication according + * to ISO11898-1 (Bosch CAN specification 2.0 part A,B) and Bosch CAN FD + * specification V1.0. MCAN1 is connected to an on-board ATA6561 CAN physical-layer + * transceiver. + * + * ------- -------- -------- ------------- + * SAM E70 FUNCTION ATA6561 SHARED + * PIN FUNCTION FUNCTIONALITY + * ------- -------- -------- ------------- + * PC14 CANTX1 TXD Shield + * PC12 CANRX1 RXD Shield + * ------- -------- -------- ------------- + */ + +#define GPIO_MCAN1_TX GPIO_MCAN1_TX_2 +#define GPIO_MCAN1_RX GPIO_MCAN1_RX_2 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the SAM4e-EK board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * display is cleared by simply setting all GRAM memory to the specified color. + * + ************************************************************************************/ + +void sam_lcdclear(uint16_t color); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAME70_XPLAINED_INCLUDE_BOARD_H */ diff --git a/configs/same70-xplained/kernel/.gitignore b/configs/same70-xplained/kernel/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..7bacd5aee3e49e11d2753d091bd2c9b31c0b16b0 --- /dev/null +++ b/configs/same70-xplained/kernel/.gitignore @@ -0,0 +1,2 @@ +/nuttx_user.elf + diff --git a/configs/same70-xplained/kernel/Makefile b/configs/same70-xplained/kernel/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..a71e019eb0ef07d9700e46bb45a0d137dd9239ec --- /dev/null +++ b/configs/same70-xplained/kernel/Makefile @@ -0,0 +1,116 @@ +############################################################################ +# configs/samv7-xult/kernel/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +# This is the directory for the board-specific header files + +BOARD_INCLUDE = $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)include + +# The entry point name (if none is provided in the .config file) + +CONFIG_USER_ENTRYPOINT ?= user_start +ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT)) + +# Get the paths to the libraries and the links script path in format that +# is appropriate for the host OS + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done} + USER_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}" + USER_LDSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld}" +else + # Linux/Cygwin-native toolchain + USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS))) + USER_LDSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld + USER_LDSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld +endif + +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) +USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) +USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" + +# Source files + +CSRCS = sam_userspace.c +COBJS = $(CSRCS:.c=$(OBJEXT)) +OBJS = $(COBJS) + +# Targets: + +all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map +.PHONY: nuttx_user.elf depend clean distclean + +$(COBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +# Create the nuttx_user.elf file containing all of the user-mode code + +nuttx_user.elf: $(OBJS) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) + +$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf + @echo "LD: nuttx_user.elf" + $(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf +ifeq ($(CONFIG_INTELHEX_BINARY),y) + @echo "CP: nuttx_user.hex" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.hex +endif +ifeq ($(CONFIG_MOTOROLA_SREC),y) + @echo "CP: nuttx_user.srec" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.srec +endif +ifeq ($(CONFIG_RAW_BINARY),y) + @echo "CP: nuttx_user.bin" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.bin +endif + +$(TOPDIR)$(DELIM)User.map: nuttx_user.elf + @echo "MK: User.map" + $(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map + $(Q) $(CROSSDEV)size nuttx_user.elf + +.depend: + +depend: .depend + +clean: + $(call DELFILE, nuttx_user.elf) + $(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*") + $(call DELFILE, "$(TOPDIR)$(DELIM)User.map") + $(call CLEAN) + +distclean: clean diff --git a/configs/same70-xplained/kernel/sam_userspace.c b/configs/same70-xplained/kernel/sam_userspace.c new file mode 100644 index 0000000000000000000000000000000000000000..f4c7e40a73441e5c8fa570154c6289f652a62fcb --- /dev/null +++ b/configs/same70-xplained/kernel/sam_userspace.c @@ -0,0 +1,132 @@ +/**************************************************************************** + * configs/same70-xplained/kernel/sam_userspace.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_NUTTX_USERSPACE +# error "CONFIG_NUTTX_USERSPACE not defined" +#endif + +#if CONFIG_NUTTX_USERSPACE != 0x00500000 +# error "CONFIG_NUTTX_USERSPACE must be 0x00500000 to match user-space.ld" +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* These 'addresses' of these values are setup by the linker script. They are + * not actual uint32_t storage locations! They are only used meaningfully in the + * following way: + * + * - The linker script defines, for example, the symbol_sdata. + * - The declareion extern uint32_t _sdata; makes C happy. C will believe + * that the value _sdata is the address of a uint32_t variable _data (it is + * not!). + * - We can recoved the linker value then by simply taking the address of + * of _data. like: uint32_t *pdata = &_sdata; + */ + +extern uint32_t _stext; /* Start of .text */ +extern uint32_t _etext; /* End_1 of .text + .rodata */ +extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */ +extern uint32_t _sdata; /* Start of .data */ +extern uint32_t _edata; /* End+1 of .data */ +extern uint32_t _sbss; /* Start of .bss */ +extern uint32_t _ebss; /* End+1 of .bss */ + +/* This is the user space entry point */ + +int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); + +const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +{ + /* General memory map */ + + .us_entrypoint = (main_t)CONFIG_USER_ENTRYPOINT, + .us_textstart = (uintptr_t)&_stext, + .us_textend = (uintptr_t)&_etext, + .us_datasource = (uintptr_t)&_eronly, + .us_datastart = (uintptr_t)&_sdata, + .us_dataend = (uintptr_t)&_edata, + .us_bssstart = (uintptr_t)&_sbss, + .us_bssend = (uintptr_t)&_ebss, + + /* Memory manager heap structure */ + + .us_heap = &g_mmheap, + + /* Task/thread startup routines */ + + .task_startup = task_startup, +#ifndef CONFIG_DISABLE_PTHREAD + .pthread_startup = pthread_startup, +#endif + + /* Signal handler trampoline */ + +#ifndef CONFIG_DISABLE_SIGNALS + .signal_handler = up_signal_handler, +#endif + + /* User-space work queue support (declared in include/nuttx/wqueue.h) */ + +#ifdef CONFIG_LIB_USRWORK + .work_usrstart = work_usrstart, +#endif +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */ diff --git a/configs/same70-xplained/netnsh/Make.defs b/configs/same70-xplained/netnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f3e42f9a7aa324e4dab9eced2d49d52831039db4 --- /dev/null +++ b/configs/same70-xplained/netnsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/same70-xplained/netnsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_ARMV7M_DTCM),y) + LDSCRIPT = flash-dtcm.ld +else + LDSCRIPT = flash-sram.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/same70-xplained/netnsh/defconfig b/configs/same70-xplained/netnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..88af9ee4ad466be0506ac6383ecb8cf2ff94b999 --- /dev/null +++ b/configs/same70-xplained/netnsh/defconfig @@ -0,0 +1,1290 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +CONFIG_ARCH_CHIP_SAMV7=y +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="samv7" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +CONFIG_ARMV7M_LAZYFPU=y +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_DPFPU=y +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# SAMV7 Configuration Options +# +# CONFIG_ARCH_CHIP_SAME70Q19 is not set +# CONFIG_ARCH_CHIP_SAME70Q20 is not set +CONFIG_ARCH_CHIP_SAME70Q21=y +# CONFIG_ARCH_CHIP_SAME70N19 is not set +# CONFIG_ARCH_CHIP_SAME70N20 is not set +# CONFIG_ARCH_CHIP_SAME70N21 is not set +# CONFIG_ARCH_CHIP_SAME70J19 is not set +# CONFIG_ARCH_CHIP_SAME70J20 is not set +# CONFIG_ARCH_CHIP_SAME70J21 is not set +# CONFIG_ARCH_CHIP_SAMV71Q19 is not set +# CONFIG_ARCH_CHIP_SAMV71Q20 is not set +# CONFIG_ARCH_CHIP_SAMV71Q21 is not set +# CONFIG_ARCH_CHIP_SAMV71N19 is not set +# CONFIG_ARCH_CHIP_SAMV71N20 is not set +# CONFIG_ARCH_CHIP_SAMV71N21 is not set +# CONFIG_ARCH_CHIP_SAMV71J19 is not set +# CONFIG_ARCH_CHIP_SAMV71J20 is not set +# CONFIG_ARCH_CHIP_SAMV71J21 is not set +CONFIG_ARCH_CHIP_SAME70=y +CONFIG_ARCH_CHIP_SAME70Q=y +# CONFIG_ARCH_CHIP_SAME70N is not set +# CONFIG_ARCH_CHIP_SAME70J is not set +# CONFIG_ARCH_CHIP_SAMV71 is not set +# CONFIG_ARCH_CHIP_SAMV71Q is not set +# CONFIG_ARCH_CHIP_SAMV71N is not set +# CONFIG_ARCH_CHIP_SAMV71J is not set +# CONFIG_SAMV7_MCAN is not set +CONFIG_SAMV7_HAVE_MCAN1=y +CONFIG_SAMV7_HAVE_DAC1=y +CONFIG_SAMV7_HAVE_EBI=y +CONFIG_SAMV7_EMAC=y +CONFIG_SAMV7_HSMCI=y +CONFIG_SAMV7_HAVE_HSMCI0=y +# CONFIG_SAMV7_HAVE_ISI8 is not set +# CONFIG_SAMV7_HAVE_MEDIALB is not set +CONFIG_SAMV7_HAVE_SDRAMC=y +CONFIG_SAMV7_HAVE_SPI0=y +CONFIG_SAMV7_HAVE_SPI1=y +# CONFIG_SAMV7_QSPI_IS_SPI is not set +# CONFIG_SAMV7_SSC is not set +# CONFIG_SAMV7_HAVE_TC is not set +CONFIG_SAMV7_HAVE_TWIHS2=y +# CONFIG_SAMV7_HAVE_USBFS is not set +CONFIG_SAMV7_HAVE_USBHS=y +CONFIG_SAMV7_HAVE_USART0=y +CONFIG_SAMV7_HAVE_USART1=y +CONFIG_SAMV7_HAVE_USART2=y +# CONFIG_SAMV7_SPI is not set +# CONFIG_SAMV7_SPI_MASTER is not set +# CONFIG_SAMV7_SPI_SLAVE is not set + +# +# SAMV7 Peripheral Selection +# +# CONFIG_SAMV7_ACC is not set +# CONFIG_SAMV7_ADC is not set +# CONFIG_SAMV7_AFEC0 is not set +# CONFIG_SAMV7_AFEC1 is not set +# CONFIG_SAMV7_MCAN0 is not set +# CONFIG_SAMV7_MCAN1 is not set +# CONFIG_SAMV7_DAC0 is not set +# CONFIG_SAMV7_DAC1 is not set +# CONFIG_SAMV7_EBI is not set +CONFIG_SAMV7_EMAC0=y +CONFIG_SAMV7_XDMAC=y +CONFIG_SAMV7_HSMCI0=y +# CONFIG_SAMV7_ISI is not set +# CONFIG_SAMV7_PWM0 is not set +# CONFIG_SAMV7_PWM1 is not set +# CONFIG_SAMV7_QSPI is not set +# CONFIG_SAMV7_RTC is not set +# CONFIG_SAMV7_RTT is not set +# CONFIG_SAMV7_SDRAMC is not set +# CONFIG_SAMV7_SMC is not set +# CONFIG_SAMV7_SPI0 is not set +# CONFIG_SAMV7_SPI1 is not set +# CONFIG_SAMV7_SSC0 is not set +# CONFIG_SAMV7_TC0 is not set +# CONFIG_SAMV7_TC1 is not set +# CONFIG_SAMV7_TC2 is not set +# CONFIG_SAMV7_TC3 is not set +# CONFIG_SAMV7_TRNG is not set +CONFIG_SAMV7_TWIHS0=y +# CONFIG_SAMV7_TWIHS1 is not set +# CONFIG_SAMV7_TWIHS2 is not set +# CONFIG_SAMV7_UART0 is not set +# CONFIG_SAMV7_UART1 is not set +# CONFIG_SAMV7_UART2 is not set +# CONFIG_SAMV7_UART3 is not set +# CONFIG_SAMV7_UART4 is not set +# CONFIG_SAMV7_USBDEVHS is not set +# CONFIG_SAMV7_USBHOSTHS is not set +# CONFIG_SAMV7_USART0 is not set +CONFIG_SAMV7_USART1=y +# CONFIG_SAMV7_USART2 is not set +# CONFIG_SAMV7_WDT is not set +# CONFIG_SAMV7_RSWDT is not set +CONFIG_SAMV7_GPIO_IRQ=y +CONFIG_SAMV7_GPIOA_IRQ=y +# CONFIG_SAMV7_GPIOB_IRQ is not set +CONFIG_SAMV7_GPIOC_IRQ=y +# CONFIG_SAMV7_GPIOD_IRQ is not set +# CONFIG_SAMV7_GPIOE_IRQ is not set +# CONFIG_SAMV7_PROGMEM is not set + +# +# TWIHS device driver options +# +CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + +# +# HSMCI device driver options +# +# CONFIG_SAMV7_HSMCI_RDPROOF is not set +# CONFIG_SAMV7_HSMCI_WRPROOF is not set +# CONFIG_SAMV7_HSMCI_UNALIGNED is not set + +# +# EMAC device driver options +# +CONFIG_SAMV7_EMAC0_NRXBUFFERS=16 +CONFIG_SAMV7_EMAC0_NTXBUFFERS=8 +CONFIG_SAMV7_EMAC0_PHYADDR=1 +# CONFIG_SAMV7_EMAC0_PHYINIT is not set +# CONFIG_SAMV7_EMAC0_MII is not set +CONFIG_SAMV7_EMAC0_RMII=y +CONFIG_SAMV7_EMAC0_AUTONEG=y +CONFIG_SAMV7_EMAC0_PHYSR=30 +CONFIG_SAMV7_EMAC0_PHYSR_ALTCONFIG=y +CONFIG_SAMV7_EMAC0_PHYSR_ALTMODE=0x7 +CONFIG_SAMV7_EMAC0_PHYSR_10HD=0x1 +CONFIG_SAMV7_EMAC0_PHYSR_100HD=0x2 +CONFIG_SAMV7_EMAC0_PHYSR_10FD=0x5 +CONFIG_SAMV7_EMAC0_PHYSR_100FD=0x6 +CONFIG_SAMV7_EMAC0_ISETH0=y +# CONFIG_SAMV7_EMAC_PREALLOCATE is not set +# CONFIG_SAMV7_EMAC_NBC is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=51262 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20400000 +CONFIG_RAM_SIZE=393216 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAME70_XPLAINED=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="same70-xplained" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_MMCSD_SPI is not set +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +CONFIG_MTD_CONFIG=y +# CONFIG_MTD_CONFIG_RAM_CONSOLIDATE is not set +CONFIG_MTD_CONFIG_ERASEDVALUE=0xff + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +CONFIG_MTD_AT24XX=y +# CONFIG_AT24XX_MULTI is not set +CONFIG_AT24XX_SIZE=2 +CONFIG_AT24XX_ADDR=0x57 +CONFIG_AT24XX_EXTENDED=y +CONFIG_AT24XX_EXTSIZE=160 +CONFIG_AT24XX_FREQUENCY=100000 +CONFIG_MTD_AT25=y +CONFIG_AT25_SPIMODE=0 +CONFIG_AT25_SPIFREQUENCY=20000000 +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +CONFIG_NETDEV_STATISTICS=y +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +CONFIG_ARCH_PHY_INTERRUPT=y +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +CONFIG_ETH0_PHY_KSZ8081=y +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +CONFIG_NETDEV_PHY_IOCTL=y + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +# CONFIG_NET_UDP_CHECKSUMS is not set +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="SAME70-Xplained" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_NET is not set +# CONFIG_FS_PROCFS_EXCLUDE_MTD is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=0 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=0 +CONFIG_EXAMPLES_BUTTONS_NAME0="SW0" +CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT_THREAD=y +CONFIG_NSH_NETINIT_MONITOR=y +CONFIG_NSH_NETINIT_SIGNO=18 +CONFIG_NSH_NETINIT_RETRYMSEC=2000 +CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 +CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=0 +CONFIG_I2CTOOL_MAXBUS=0 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=400000 +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_MDIO is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/same70-xplained/netnsh/setenv.sh b/configs/same70-xplained/netnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3bb7d494df9112ea099c1c96b51e8cd962bbcfcc --- /dev/null +++ b/configs/same70-xplained/netnsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/samv7-xult/netnsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/same70-xplained/nsh/Make.defs b/configs/same70-xplained/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e607c4ace3cd3f7a10b9cfb626dc1851aa24733d --- /dev/null +++ b/configs/same70-xplained/nsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/same70-xplained/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_ARMV7M_DTCM),y) + LDSCRIPT = flash-dtcm.ld +else + LDSCRIPT = flash-sram.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/same70-xplained/nsh/defconfig b/configs/same70-xplained/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..4f668b0230e36ca1e76d35a2781b27d30111857a --- /dev/null +++ b/configs/same70-xplained/nsh/defconfig @@ -0,0 +1,1054 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +CONFIG_ARCH_CHIP_SAMV7=y +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="samv7" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +CONFIG_ARMV7M_LAZYFPU=y +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_DPFPU=y +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +# CONFIG_ARMV7M_DCACHE_WRITETHROUGH is not set +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# SAMV7 Configuration Options +# +# CONFIG_ARCH_CHIP_SAME70Q19 is not set +# CONFIG_ARCH_CHIP_SAME70Q20 is not set +CONFIG_ARCH_CHIP_SAME70Q21=y +# CONFIG_ARCH_CHIP_SAME70N19 is not set +# CONFIG_ARCH_CHIP_SAME70N20 is not set +# CONFIG_ARCH_CHIP_SAME70N21 is not set +# CONFIG_ARCH_CHIP_SAME70J19 is not set +# CONFIG_ARCH_CHIP_SAME70J20 is not set +# CONFIG_ARCH_CHIP_SAME70J21 is not set +# CONFIG_ARCH_CHIP_SAMV71Q19 is not set +# CONFIG_ARCH_CHIP_SAMV71Q20 is not set +# CONFIG_ARCH_CHIP_SAMV71Q21 is not set +# CONFIG_ARCH_CHIP_SAMV71N19 is not set +# CONFIG_ARCH_CHIP_SAMV71N20 is not set +# CONFIG_ARCH_CHIP_SAMV71N21 is not set +# CONFIG_ARCH_CHIP_SAMV71J19 is not set +# CONFIG_ARCH_CHIP_SAMV71J20 is not set +# CONFIG_ARCH_CHIP_SAMV71J21 is not set +CONFIG_ARCH_CHIP_SAME70=y +CONFIG_ARCH_CHIP_SAME70Q=y +# CONFIG_ARCH_CHIP_SAME70N is not set +# CONFIG_ARCH_CHIP_SAME70J is not set +# CONFIG_ARCH_CHIP_SAMV71 is not set +# CONFIG_ARCH_CHIP_SAMV71Q is not set +# CONFIG_ARCH_CHIP_SAMV71N is not set +# CONFIG_ARCH_CHIP_SAMV71J is not set +# CONFIG_SAMV7_MCAN is not set +CONFIG_SAMV7_HAVE_MCAN1=y +CONFIG_SAMV7_HAVE_DAC1=y +CONFIG_SAMV7_HAVE_EBI=y +# CONFIG_SAMV7_EMAC is not set +CONFIG_SAMV7_HSMCI=y +CONFIG_SAMV7_HAVE_HSMCI0=y +# CONFIG_SAMV7_HAVE_ISI8 is not set +# CONFIG_SAMV7_HAVE_MEDIALB is not set +CONFIG_SAMV7_HAVE_SDRAMC=y +CONFIG_SAMV7_HAVE_SPI0=y +CONFIG_SAMV7_HAVE_SPI1=y +# CONFIG_SAMV7_QSPI_IS_SPI is not set +# CONFIG_SAMV7_SSC is not set +# CONFIG_SAMV7_HAVE_TC is not set +CONFIG_SAMV7_HAVE_TWIHS2=y +# CONFIG_SAMV7_HAVE_USBFS is not set +CONFIG_SAMV7_HAVE_USBHS=y +CONFIG_SAMV7_HAVE_USART0=y +CONFIG_SAMV7_HAVE_USART1=y +CONFIG_SAMV7_HAVE_USART2=y +# CONFIG_SAMV7_SPI is not set +# CONFIG_SAMV7_SPI_MASTER is not set +# CONFIG_SAMV7_SPI_SLAVE is not set + +# +# SAMV7 Peripheral Selection +# +# CONFIG_SAMV7_ACC is not set +# CONFIG_SAMV7_ADC is not set +# CONFIG_SAMV7_AFEC0 is not set +# CONFIG_SAMV7_AFEC1 is not set +# CONFIG_SAMV7_MCAN0 is not set +# CONFIG_SAMV7_MCAN1 is not set +# CONFIG_SAMV7_DAC0 is not set +# CONFIG_SAMV7_DAC1 is not set +# CONFIG_SAMV7_EBI is not set +# CONFIG_SAMV7_EMAC0 is not set +CONFIG_SAMV7_XDMAC=y +CONFIG_SAMV7_HSMCI0=y +# CONFIG_SAMV7_ISI is not set +# CONFIG_SAMV7_PWM0 is not set +# CONFIG_SAMV7_PWM1 is not set +# CONFIG_SAMV7_QSPI is not set +# CONFIG_SAMV7_RTC is not set +# CONFIG_SAMV7_RTT is not set +CONFIG_SAMV7_SDRAMC=y +# CONFIG_SAMV7_SMC is not set +# CONFIG_SAMV7_SPI0 is not set +# CONFIG_SAMV7_SPI1 is not set +# CONFIG_SAMV7_SSC0 is not set +# CONFIG_SAMV7_TC0 is not set +# CONFIG_SAMV7_TC1 is not set +# CONFIG_SAMV7_TC2 is not set +# CONFIG_SAMV7_TC3 is not set +# CONFIG_SAMV7_TRNG is not set +CONFIG_SAMV7_TWIHS0=y +# CONFIG_SAMV7_TWIHS1 is not set +# CONFIG_SAMV7_TWIHS2 is not set +# CONFIG_SAMV7_UART0 is not set +# CONFIG_SAMV7_UART1 is not set +# CONFIG_SAMV7_UART2 is not set +# CONFIG_SAMV7_UART3 is not set +# CONFIG_SAMV7_UART4 is not set +# CONFIG_SAMV7_USBDEVHS is not set +# CONFIG_SAMV7_USBHOSTHS is not set +# CONFIG_SAMV7_USART0 is not set +CONFIG_SAMV7_USART1=y +# CONFIG_SAMV7_USART2 is not set +# CONFIG_SAMV7_WDT is not set +# CONFIG_SAMV7_RSWDT is not set +CONFIG_SAMV7_GPIO_IRQ=y +CONFIG_SAMV7_GPIOA_IRQ=y +# CONFIG_SAMV7_GPIOB_IRQ is not set +CONFIG_SAMV7_GPIOC_IRQ=y +# CONFIG_SAMV7_GPIOD_IRQ is not set +# CONFIG_SAMV7_GPIOE_IRQ is not set +# CONFIG_SAMV7_PROGMEM is not set + +# +# SDRAM Configuration +# +CONFIG_SAMV7_SDRAMSIZE=2097152 +# CONFIG_SAMV7_SDRAMHEAP is not set + +# +# TWIHS device driver options +# +CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + +# +# HSMCI device driver options +# +# CONFIG_SAMV7_HSMCI_RDPROOF is not set +# CONFIG_SAMV7_HSMCI_WRPROOF is not set +# CONFIG_SAMV7_HSMCI_UNALIGNED is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=51262 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20400000 +CONFIG_RAM_SIZE=393216 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAME70_XPLAINED=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="same70-xplained" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_MMCSD_SPI is not set +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +CONFIG_MTD_CONFIG=y +# CONFIG_MTD_CONFIG_RAM_CONSOLIDATE is not set +CONFIG_MTD_CONFIG_ERASEDVALUE=0xff + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +CONFIG_MTD_AT24XX=y +# CONFIG_AT24XX_MULTI is not set +CONFIG_AT24XX_SIZE=2 +CONFIG_AT24XX_ADDR=0x57 +CONFIG_AT24XX_EXTENDED=y +CONFIG_AT24XX_EXTSIZE=160 +CONFIG_AT24XX_FREQUENCY=100000 +CONFIG_MTD_AT25=y +CONFIG_AT25_SPIMODE=0 +CONFIG_AT25_SPIFREQUENCY=20000000 +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_MTD is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=0 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=0 +CONFIG_EXAMPLES_BUTTONS_NAME0="SW0" +CONFIG_EXAMPLES_BUTTONS_NAME1="Button 1" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=0 +CONFIG_I2CTOOL_MAXBUS=0 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=400000 +# CONFIG_SYSTEM_HEXED is not set +CONFIG_SYSTEM_RAMTEST=y +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/same70-xplained/nsh/setenv.sh b/configs/same70-xplained/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..45dc13b84f1318bea390428f1530acfbc6973271 --- /dev/null +++ b/configs/same70-xplained/nsh/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/samv7-xult/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The same70-xplained/tools directory +export TOOL_DIR="${WD}/configs/same70-xplained/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/same70-xplained/scripts/flash-dtcm.ld b/configs/same70-xplained/scripts/flash-dtcm.ld new file mode 100644 index 0000000000000000000000000000000000000000..28f618fe4149cddc31f7a9bf7e5b4c9bee842d7e --- /dev/null +++ b/configs/same70-xplained/scripts/flash-dtcm.ld @@ -0,0 +1,122 @@ +/**************************************************************************** + * configs/same70-xplained/scripts/flash-dtcm.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAME70Q21 has 2048Kb of FLASH beginning at address 0x0040:0000 and + * 384Kb of SRAM beginining at 0x2040:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0400:0000 address range (Assuming that ITCM is not enable). + * + * NOTE: that the DTCM address of 0x2000:0000 is used for SRAM. If DTCM is + * disabled, then the accesses will actually occur on the AHB bus. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00400000, LENGTH = 2048K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 384K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/same70-xplained/scripts/flash-sram.ld b/configs/same70-xplained/scripts/flash-sram.ld new file mode 100644 index 0000000000000000000000000000000000000000..e1dff4a10f7cb795a9fee7291edb598481f09ab7 --- /dev/null +++ b/configs/same70-xplained/scripts/flash-sram.ld @@ -0,0 +1,119 @@ +/**************************************************************************** + * configs/same70-xplained/scripts/flash-sram.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAME70Q21 has 2048Kb of FLASH beginning at address 0x0040:0000 and + * 384Kb of SRAM beginining at 0x2040:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0400:0000 address range (Assuming that ITCM is not enable). + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00400000, LENGTH = 2048K + sram (rwx) : ORIGIN = 0x20400000, LENGTH = 384K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/same70-xplained/scripts/gnu-elf.ld b/configs/same70-xplained/scripts/gnu-elf.ld new file mode 100644 index 0000000000000000000000000000000000000000..d811db5a692f6f81d7deec98504a9af0cfabc11b --- /dev/null +++ b/configs/same70-xplained/scripts/gnu-elf.ld @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/same70-xplained/scripts/gnu-elf.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +SECTIONS +{ + .text 0x00000000 : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + *(.ctors) /* Old ABI: Unallocated */ + *(.init_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .dtors : + { + _sdtors = . ; + *(.dtors) /* Old ABI: Unallocated */ + *(.fini_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = . ; + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/same70-xplained/scripts/kernel-space.ld b/configs/same70-xplained/scripts/kernel-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..8864c96b9ead2c54515993c49d30e2e24760ef97 --- /dev/null +++ b/configs/same70-xplained/scripts/kernel-space.ld @@ -0,0 +1,111 @@ +/**************************************************************************** + * configs/same70-xplained/scripts/kernel-space.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > kflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > kflash + + .ARM.extab : { + *(.ARM.extab*) + } > kflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > kflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > ksram AT > kflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > ksram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/same70-xplained/scripts/memory.ld b/configs/same70-xplained/scripts/memory.ld new file mode 100644 index 0000000000000000000000000000000000000000..65673b3d84a3817b0e6a688d11693d915e7e5049 --- /dev/null +++ b/configs/same70-xplained/scripts/memory.ld @@ -0,0 +1,84 @@ +/**************************************************************************** + * configs/same70-xplained/scripts/memory.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAME70Q21 has 2048Kb of FLASH beginning at address 0x0040:0000 and + * 384Kb of SRAM beginining at 0x2040:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0400:0000 address range. + * + * NOTE: that the DTCM address of 0x2000:0000 is used for SRAM. If DTCM is + * disabled, then the accesses will actually occur on the AHB bus. + * + * The user space partition will be spanned with a single region of size + * 2**n bytes. The alignment of the user-space region must be the same. + * As a consequence, as the user-space increases in size, the alignment + * requirement also increases. The sizes below give the largest possible + * user address spaces (but leave far too much for the OS). + * + * The solution to this wasted memory is to (1) use more than one region to + * span the user spaces, or (2) poke holes in a larger region to trim it + * to fit better. + * + * A detailed memory map for the 384KB SRAM region is as follows: + * + * 0x20000 0000: Kernel .data region. Typical size: 0.1KB + * ------- ---- Kernel .bss region. Typical size: 1.8KB + * 0x20000 0800: Kernel IDLE thread stack (approximate). Size is + * determined by CONFIG_IDLETHREAD_STACKSIZE and + * adjustments for alignment. Typical is 1KB. + * ------- ---- Padded to 4KB + * 0x20002 0000: User .data region. Size is variable. + * ------- ---- User .bss region Size is variable. + * 0x20000 2000: Beginning of kernel heap. Size determined by + * CONFIG_MM_KERNEL_HEAPSIZE. + * ------- ---- Beginning of user heap. Can vary with other settings. + * 0x20004 0000: End+1 of mappable internal SRAM + */ + +MEMORY +{ + /* 2048KiB of internal FLASH */ + + kflash (rx) : ORIGIN = 0x00400000, LENGTH = 1M + uflash (rx) : ORIGIN = 0x00500000, LENGTH = 1M + + /* 384Kb of internal SRAM */ + + ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K + usram (rwx) : ORIGIN = 0x20020000, LENGTH = 128K + xsram (rwx) : ORIGIN = 0x20040000, LENGTH = 128K +} diff --git a/configs/same70-xplained/scripts/user-space.ld b/configs/same70-xplained/scripts/user-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..bdb149ca83a8b2c80a4b8e271cef1ef8d0ef0f8d --- /dev/null +++ b/configs/same70-xplained/scripts/user-space.ld @@ -0,0 +1,126 @@ +/**************************************************************************** + * configs/same70-xplained/scripts/user-space.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +/* Make sure that the critical memory management functions are in user-space. + * the user heap memory manager will reside in user-space but be usable both + * by kernel- and user-space code + */ + +EXTERN(umm_initialize) +EXTERN(umm_addregion) +EXTERN(umm_trysemaphore) +EXTERN(umm_givesemaphore) + +EXTERN(malloc) +EXTERN(realloc) +EXTERN(zalloc) +EXTERN(free) + +OUTPUT_ARCH(arm) +SECTIONS +{ + .userspace : { + *(.userspace) + } > uflash + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > uflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > uflash + + .ARM.extab : { + *(.ARM.extab*) + } > uflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > uflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > usram AT > uflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > usram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/same70-xplained/src/Makefile b/configs/same70-xplained/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..4d883fccb75a6108e0fa8887769ee0b2de74303c --- /dev/null +++ b/configs/same70-xplained/src/Makefile @@ -0,0 +1,93 @@ +############################################################################ +# configs/same70-xplained/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c + +ifeq ($(CONFIG_SAMV7_SDRAMC),y) +CSRCS += sam_sdram.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += sam_appinit.c sam_bringup.c +else ifeq ($(CONFIG_BOARD_INITIALIZE),y) +CSRCS += sam_bringup.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += sam_autoleds.c +else +CSRCS += sam_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += sam_buttons.c +endif + +ifeq ($(CONFIG_SAMV7_HSMCI0),y) +CSRCS += sam_hsmci.c +endif + +ifeq ($(CONFIG_SAMV7_EMAC),y) +CSRCS += sam_ethernet.c +endif + +ifeq ($(CONFIG_SAMV7_USBDEVHS),y) +CSRCS += sam_usbdev.c +endif + +ifeq ($(CONFIG_SAMV7_SPI),y) +CSRCS += sam_spi.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += sam_usbmsc.c +endif + +ifeq ($(CONFIG_SAMV7_MCAN),y) +CSRCS += sam_mcan.c +endif + +ifeq ($(CONFIG_MTD_CONFIG),y) +ifeq ($(CONFIG_SAMV7_TWIHS0),y) +ifeq ($(CONFIG_MTD_AT24XX),y) +CSRCS += sam_at24config.c +endif +endif +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/same70-xplained/src/sam_appinit.c b/configs/same70-xplained/src/sam_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..d3d1447122866d49ae5e7b6f71bc48e8e82a92e2 --- /dev/null +++ b/configs/same70-xplained/src/sam_appinit.c @@ -0,0 +1,73 @@ +/**************************************************************************** + * config/same70-xplained/src/sam_appinit.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "same70-xplained.h" + +#if defined(CONFIG_LIB_BOARDCTL) && !defined(CONFIG_BUILD_KERNEL) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifndef CONFIG_BOARD_INITIALIZE + /* Perform board initialization */ + + return sam_bringup(); +#else + return OK; +#endif +} + +#endif /* CONFIG_LIB_BOARDCTL && !CONFIG_BUILD_KERNEL */ diff --git a/configs/same70-xplained/src/sam_at24config.c b/configs/same70-xplained/src/sam_at24config.c new file mode 100644 index 0000000000000000000000000000000000000000..aac1de3571d5651add08b32d1a2cc89b191d7903 --- /dev/null +++ b/configs/same70-xplained/src/sam_at24config.c @@ -0,0 +1,112 @@ +/************************************************************************************ + * configs/same70-xplained/src/sam_at24config.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "sam_twihs.h" +#include "same70-xplained.h" + +#ifdef HAVE_MTDCONFIG + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_at24config + * + * Description: + * Create an AT24xx-based MTD configuration device for storage device configuration + * information. + * + ************************************************************************************/ + +int sam_at24config(void) +{ + struct i2c_master_s *i2c; + struct mtd_dev_s *at24; + int ret; + + /* Get an instance of the TWI0 interface */ + + i2c = sam_i2cbus_initialize(0); + if (!i2c) + { + fdbg("ERROR: Failed to initialize TWI0\n"); + return -ENODEV; + } + + /* Initialize the AT24 driver */ + + at24 = at24c_initialize(i2c); + if (!at24) + { + fdbg("ERROR: Failed to initialize the AT24 driver\n"); + (void)sam_i2cbus_uninitialize(i2c); + return -ENODEV; + } + + /* Make sure that the AT24 is in normal memory access mode */ + + ret = at24->ioctl(at24, MTDIOC_EXTENDED, 0); + if (ret < 0) + { + fdbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret); + } + + /* Bind the instance of an MTD device to the /dev/config device. */ + + ret = mtdconfig_register(at24); + if (ret < 0) + { + fdbg("ERROR: Failed to bind AT24 driver to the MTD config device\n"); + (void)sam_i2cbus_uninitialize(i2c); + } + + return ret; +} + +#endif /* HAVE_MTDCONFIG */ diff --git a/configs/same70-xplained/src/sam_autoleds.c b/configs/same70-xplained/src/sam_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..8fda597e74128d0f8a17bcadf0a932a788fb5a0f --- /dev/null +++ b/configs/same70-xplained/src/sam_autoleds.c @@ -0,0 +1,143 @@ +/**************************************************************************** + * configs/same70-xplained/include/sam_autoleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* LEDs + * + * A single LED is available driven by PC8. + * + * These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_autoleds.c. The LEDs are used to encode + * OS-related events as follows: + * + * ------------------- ----------------------- ------ + * SYMBOL Meaning LED + * ------------------- ----------------------- ------ + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt N/C + * LED_SIGNAL In a signal handler N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus is LED is statically on, NuttX has successfully booted and is, + * apparently, running normally. If LED is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "same70-xplained.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED PIOs for output */ + + sam_configgpio(GPIO_LED0); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led == 1 || led == 3) + { + sam_gpiowrite(GPIO_LED0, false); /* Low illuminates */ + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == 3) + { + sam_gpiowrite(GPIO_LED0, true); /* High extinguishes */ + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/same70-xplained/src/sam_boot.c b/configs/same70-xplained/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..ba38da700529ae301dc173062f9de24e07d91ff8 --- /dev/null +++ b/configs/same70-xplained/src/sam_boot.c @@ -0,0 +1,159 @@ +/**************************************************************************** + * configs/same70-xplained/src/sam_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "sam_start.h" +#include "sam_pck.h" +#include "same70-xplained.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_boardinitialize + * + * Description: + * All SAMV7 architectures must provide the following entry point. This + * entry point is called early in the initialization -- after clocking and + * memory have been configured but before caches have been enabled and + * before any devices have been initialized. + * + ****************************************************************************/ + +void sam_boardinitialize(void) +{ +#ifdef CONFIG_SCHED_TICKLESS + uint32_t frequency; + uint32_t actual; + + /* If Tickless mode is selected then enabled PCK6 as a possible clock + * source for the timer/counters. The ideal frequency could be: + * + * frequency = 1,000,000 / CONFIG_USEC_PER_TICK + * + * The main crystal is selected as the frequency source. The maximum + * prescaler value is 256 so the minimum frequency is 46,875 Hz which + * corresponds to a period of 21.3 microseconds. A value of + * CONFIG_USEC_PER_TICK=20, or 50KHz, would give an exact solution with + * a divider of 240. + */ + + frequency = USEC_PER_SEC / CONFIG_USEC_PER_TICK; + DEBUGASSERT(frequency >= (BOARD_MAINOSC_FREQUENCY / 256)); + + actual = sam_pck_configure(PCK6, PCKSRC_MAINCK, frequency); + + /* We expect to achieve this frequency exactly */ + + DEBUGASSERT(actual == frequency); + UNUSED(actual); + + /* Enable PCK6 */ + + (void)sam_pck_enable(PCK6, true); +#endif + +#ifdef CONFIG_SAMV7_SDRAMC + /* Configure SDRAM if it has been enabled in the NuttX configuration. + * Here we assume, of course, that we are not running out SDRAM. + */ + + sam_sdram_config(); +#endif + +#ifdef CONFIG_SAMV7_SPI + /* Configure SPI chip selects if SPI has been enabled */ + + sam_spidev_initialize(); +#endif + +#ifdef HAVE_USB + /* Setup USB-related GPIO pins for the SAME70-XPLD board. */ + + sam_usbinitialize(); +#endif + +#ifdef HAVE_NETWORK + /* Configure board resources to support networking if the 1) networking is + * enabled, and 2) the EMAC module is enabled + */ + + sam_netinitialize(); +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intitialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform board initialization */ + + (void)sam_bringup(); +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/same70-xplained/src/sam_bringup.c b/configs/same70-xplained/src/sam_bringup.c new file mode 100644 index 0000000000000000000000000000000000000000..e5631b893080e6a3b83782ef3df367aa813b7ebb --- /dev/null +++ b/configs/same70-xplained/src/sam_bringup.c @@ -0,0 +1,347 @@ +/**************************************************************************** + * config/same70-xplained/src/sam_bringup.c + * + * Copyright (C) 2015, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#include +#include +#include +#include +#include + +#include "sam_twihs.h" +#include "same70-xplained.h" + +#ifdef HAVE_PROGMEM_CHARDEV +# include +# include "sam_progmem.h" +#endif + +#ifdef HAVE_ROMFS +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define NSECTORS(n) \ + (((n)+CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_SECTSIZE-1) / \ + CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_SECTSIZE) + +/* Debug ********************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +# define SYSLOG lldbg +#else +# define SYSLOG dbg +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_i2c_register + * + * Description: + * Register one I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void sam_i2c_register(int bus) +{ + FAR struct i2c_master_s *i2c; + int ret; + + i2c = sam_i2cbus_initialize(bus); + if (i2c == NULL) + { + dbg("ERROR: Failed to get I2C%d interface\n", bus); + } + else + { + ret = i2c_register(i2c, bus); + if (ret < 0) + { + dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); + sam_i2cbus_uninitialize(i2c); + } + } +} +#endif + +/**************************************************************************** + * Name: sam_i2ctool + * + * Description: + * Register I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void sam_i2ctool(void) +{ +#ifdef CONFIG_SAMV7_TWIHS0 + sam_i2c_register(0); +#endif +#ifdef CONFIG_SAMV7_TWIHS1 + sam_i2c_register(1); +#endif +#ifdef CONFIG_SAMV7_TWIHS2 + sam_i2c_register(2); +#endif +} +#else +# define sam_i2ctool() +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int sam_bringup(void) +{ +#ifdef HAVE_PROGMEM_CHARDEV + FAR struct mtd_dev_s *mtd; + char blockdev[18]; + char chardev[12]; +#endif + int ret; + + /* Register I2C drivers on behalf of the I2C tool */ + + sam_i2ctool(); + +#ifdef HAVE_MACADDR + /* Read the Ethernet MAC address from the AT24 FLASH and configure the + * Ethernet driver with that address. + */ + + ret = sam_emac0_setmac(); + if (ret < 0) + { + SYSLOG("ERROR: sam_emac0_setmac() failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = mount(NULL, SAME70_PROCFS_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + SYSLOG("ERROR: Failed to mount procfs at %s: %d\n", + SAME70_PROCFS_MOUNTPOINT, ret); + } +#endif + +#ifdef HAVE_MTDCONFIG + /* Create an AT24xx-based MTD configuration device for storage device + * configuration information. + */ + + ret = sam_at24config(); + if (ret < 0) + { + SYSLOG("ERROR: sam_at24config() failed: %d\n", ret); + } +#endif + +#ifdef HAVE_HSMCI + /* Initialize the HSMCI0 driver */ + + ret = sam_hsmci_initialize(HSMCI0_SLOTNO, HSMCI0_MINOR); + if (ret < 0) + { + SYSLOG("ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n", + HSMCI0_SLOTNO, HSMCI0_MINOR, ret); + } + +#ifdef CONFIG_SAME70XPLAINED_HSMCI0_MOUNT + else + { + /* REVISIT: A delay seems to be required here or the mount will fail. */ + /* Mount the volume on HSMCI0 */ + + ret = mount(CONFIG_SAME70XPLAINED_HSMCI0_MOUNT_BLKDEV, + CONFIG_SAME70XPLAINED_HSMCI0_MOUNT_MOUNTPOINT, + CONFIG_SAME70XPLAINED_HSMCI0_MOUNT_FSTYPE, + 0, NULL); + + if (ret < 0) + { + SYSLOG("ERROR: Failed to mount %s: %d\n", + CONFIG_SAME70XPLAINED_HSMCI0_MOUNT_MOUNTPOINT, errno); + } + } + +#endif /* CONFIG_SAME70XPLAINED_HSMCI0_MOUNT */ +#endif /* HAVE_HSMCI */ + +#ifdef HAVE_AUTOMOUNTER + /* Initialize the auto-mounter */ + + sam_automount_initialize(); +#endif + +#ifdef HAVE_ROMFS + /* Create a ROM disk for the /etc filesystem */ + + ret = romdisk_register(CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_MINOR, romfs_img, + NSECTORS(romfs_img_len), + CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_SECTSIZE); + if (ret < 0) + { + SYSLOG("ERROR: romdisk_register failed: %d\n", -ret); + } + else + { + /* Mount the file system */ + + ret = mount(CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_DEVNAME, + CONFIG_SAME70XPLAINED_ROMFS_MOUNT_MOUNTPOINT, + "romfs", MS_RDONLY, NULL); + if (ret < 0) + { + SYSLOG("ERROR: mount(%s,%s,romfs) failed: %d\n", + CONFIG_SAME70XPLAINED_ROMFS_ROMDISK_DEVNAME, + CONFIG_SAME70XPLAINED_ROMFS_MOUNT_MOUNTPOINT, errno); + } + } +#endif + +#ifdef HAVE_PROGMEM_CHARDEV + /* Initialize the SAME70 FLASH programming memory library */ + + sam_progmem_initialize(); + + /* Create an instance of the SAME70 FLASH program memory device driver */ + + mtd = progmem_initialize(); + if (!mtd) + { + SYSLOG("ERROR: progmem_initialize failed\n"); + } + + /* Use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(PROGMEM_MTD_MINOR, mtd); + if (ret < 0) + { + SYSLOG("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + + /* Use the minor number to create device paths */ + + snprintf(blockdev, 18, "/dev/mtdblock%d", PROGMEM_MTD_MINOR); + snprintf(chardev, 12, "/dev/mtd%d", PROGMEM_MTD_MINOR); + + /* Now create a character device on the block device */ + + ret = bchdev_register(blockdev, chardev, false); + if (ret < 0) + { + SYSLOG("ERROR: bchdev_register %s failed: %d\n", chardev, ret); + return ret; + } +#endif + +#ifdef HAVE_USBHOST + /* Initialize USB host operation. sam_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + + ret = sam_usbhost_initialize(); + if (ret != OK) + { + SYSLOG("ERROR: Failed to initialize USB host: %d\n", ret); + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + SYSLOG("ERROR: Failed to start the USB monitor: %d\n", ret); + } +#endif + +#ifdef HAVE_ELF + /* Initialize the ELF binary loader */ + + SYSLOG("Initializing the ELF binary loader\n"); + ret = elf_initialize(); + if (ret < 0) + { + SYSLOG("ERROR: Initialization of the ELF loader failed: %d\n", ret); + } +#endif + + /* If we got here then perhaps not all initialization was successful, but + * at least enough succeeded to bring-up NSH with perhaps reduced + * capabilities. + */ + + UNUSED(ret); + return OK; +} diff --git a/configs/same70-xplained/src/sam_buttons.c b/configs/same70-xplained/src/sam_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..d1154f70c895d4e939d309dce2b32735d1360488 --- /dev/null +++ b/configs/same70-xplained/src/sam_buttons.c @@ -0,0 +1,205 @@ +/**************************************************************************** + * configs/sam4e-ek/src/sam_buttons.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "sam_gpio.h" +#include "chip/sam_matrix.h" +#include "same70-xplained.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS + +#define HAVE_IRQBUTTONS 1 +#ifndef CONFIG_SAMV7_GPIOA_IRQ +# undef HAVE_IRQBUTTONS +#endif + +#ifdef CONFIG_SAMV7_GPIOA_IRQ +static xcpt_t g_irq_sw0; +#endif +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_irqx + * + * Description: + * This function implements the core of the board_button_irq() logic. + * + ****************************************************************************/ + +#ifdef HAVE_IRQBUTTONS +static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq, + xcpt_t irqhandler, xcpt_t *store) +{ + xcpt_t oldhandler; + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the following + * operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = *store; + *store = irqhandler; + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + /* Configure the interrupt */ + + sam_gpioirq(pinset); + (void)irq_attach(irq, irqhandler); + sam_gpioirqenable(irq); + } + else + { + /* Detach and disable the interrupt */ + + (void)irq_detach(irq); + sam_gpioirqdisable(irq); + } + + leave_critical_section(flags); + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + /* Configure button PIOs */ + + (void)sam_configgpio(GPIO_SW0); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return sam_gpioread(GPIO_SW0) ? 0 : BUTTON_SW0_BIT; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address is returned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the + * overall GPIO IRQ feature and CONFIG_AVR32_GPIOIRQSETA and/or + * CONFIG_AVR32_GPIOIRQSETB must be enabled to select GPIOs to support + * interrupts on. For button support, bits 2 and 3 must be set in + * CONFIG_AVR32_GPIOIRQSETB (PB2 and PB3). + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ +#ifdef HAVE_IRQBUTTONS + if (id == BUTTON_SW0) + { + return board_button_irqx(GPIO_SW0, IRQ_SW0, irqhandler, &g_irq_sw0); + } +#endif + + return NULL; + +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/same70-xplained/src/sam_ethernet.c b/configs/same70-xplained/src/sam_ethernet.c new file mode 100644 index 0000000000000000000000000000000000000000..f435028837bcd64f3da3c3e5cef1d461496d982d --- /dev/null +++ b/configs/same70-xplained/src/sam_ethernet.c @@ -0,0 +1,375 @@ +/************************************************************************************ + * configs/same70-xplained/src/sam_ethernet.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/* Force verbose debug on in this file only to support unit-level testing. */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# define CONFIG_DEBUG_VERBOSE 1 +# undef CONFIG_DEBUG_NET +# define CONFIG_DEBUG_NET 1 +#endif + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "sam_gpio.h" +#include "sam_twihs.h" +#include "sam_ethernet.h" + +#include "same70-xplained.h" + +#ifdef HAVE_NETWORK + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define SAMV7_EMAC0_DEVNAME "eth0" + +#define AT24XX_MACADDR_OFFSET 0x9a + +/* Debug ********************************************************************/ +/* Extra, in-depth debug output that is only available if + * CONFIG_NETDEV_PHY_DEBUG us defined. + */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# define phydbg dbg +# define phylldbg lldbg +#else +# define phydbg(x...) +# define phylldbg(x...) +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_SAMV7_GPIOA_IRQ +static xcpt_t g_emac0_handler; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_emac0_phy_enable + ************************************************************************************/ + +#ifdef CONFIG_SAMV7_GPIOA_IRQ +static void sam_emac0_phy_enable(bool enable) +{ + phydbg("IRQ%d: enable=%d\n", IRQ_EMAC0_INT, enable); + if (enable) + { + sam_gpioirqenable(IRQ_EMAC0_INT); + } + else + { + sam_gpioirqdisable(IRQ_EMAC0_INT); + } +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +void weak_function sam_netinitialize(void) +{ + /* Configure the PHY interrupt GPIO */ + + phydbg("Configuring %08x\n", GPIO_EMAC0_INT); + sam_configgpio(GPIO_EMAC0_INT); + + /* Configure PHY /RESET output */ + + sam_configgpio(GPIO_EMAC0_RESET); +} + +/************************************************************************************ + * Name: sam_emac0_setmac + * + * Description: + * Read the Ethernet MAC address from the AT24 FLASH and configure the Ethernet + * driver with that address. + * + ************************************************************************************/ + +#ifdef HAVE_MACADDR +int sam_emac0_setmac(void) +{ + struct i2c_master_s *i2c; + struct mtd_dev_s *at24; + uint8_t mac[6]; + ssize_t nread; + int ret; + + /* Get an instance of the TWI0 interface */ + + i2c = sam_i2cbus_initialize(0); + if (!i2c) + { + ndbg("ERROR: Failed to initialize TWI0\n"); + return -ENODEV; + } + + /* Initialize the AT24 driver */ + + at24 = at24c_initialize(i2c); + if (!at24) + { + ndbg("ERROR: Failed to initialize the AT24 driver\n"); + (void)sam_i2cbus_uninitialize(i2c); + return -ENODEV; + } + + /* Configure the AT24 to access the extended memory region */ + + ret = at24->ioctl(at24, MTDIOC_EXTENDED, 1); + if (ret < 0) + { + ndbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret); + (void)sam_i2cbus_uninitialize(i2c); + return ret; + } + + /* Read the MAC address */ + + nread = at24->read(at24, AT24XX_MACADDR_OFFSET, 6, mac); + if (nread < 6) + { + ndbg("ERROR: AT24 read(AT24XX_MACADDR_OFFSET) failed: ld\n", (long)nread); + (void)sam_i2cbus_uninitialize(i2c); + return (int)nread; + } + + /* Put the AT24 back in normal memory access mode */ + + ret = at24->ioctl(at24, MTDIOC_EXTENDED, 0); + if (ret < 0) + { + ndbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret); + } + + /* Release the I2C instance. + * REVISIT: Need an interface to release the AT24 instance too + */ + + ret = sam_i2cbus_uninitialize(i2c); + if (ret < 0) + { + ndbg("ERROR: Failed to release the I2C interface: %d\n", ret); + } + + nvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n", + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + + /* Now configure the EMAC driver to use this MAC address */ + + ret = sam_emac_setmacaddr(EMAC0_INTF, mac); + if (ret < 0) + { + ndbg("ERROR: Failed to set MAC address: %d\n", ret); + } + + return ret; +} +#else +# define sam_emac0_setmac() +#endif + +/**************************************************************************** + * Name: arch_phy_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a PHY interrupt occurs. This function both attaches + * the interrupt handler and enables the interrupt if 'handler' is non- + * NULL. If handler is NULL, then the interrupt is detached and disabled + * instead. + * + * The PHY interrupt is always disabled upon return. The caller must + * call back through the enable function point to control the state of + * the interrupt. + * + * This interrupt may or may not be available on a given platform depending + * on how the network hardware architecture is implemented. In a typical + * case, the PHY interrupt is provided to board-level logic as a GPIO + * interrupt (in which case this is a board-specific interface and really + * should be called board_phy_irq()); In other cases, the PHY interrupt + * may be cause by the chip's MAC logic (in which case arch_phy_irq()) is + * an appropriate name. Other other boards, there may be no PHY interrupts + * available at all. If client attachable PHY interrupts are available + * from the board or from the chip, then CONFIG_ARCH_PHY_INTERRUPT should + * be defined to indicate that fact. + * + * Typical usage: + * a. OS service logic (not application logic*) attaches to the PHY + * PHY interrupt and enables the PHY interrupt. + * b. When the PHY interrupt occurs: (1) the interrupt should be + * disabled and () work should be scheduled on the worker thread (or + * perhaps a dedicated application thread). + * c. That worker thread should use the SIOCGMIIPHY, SIOCGMIIREG, + * and SIOCSMIIREG ioctl calls** to communicate with the PHY, + * determine what network event took place (Link Up/Down?), and + * take the appropriate actions. + * d. It should then interact the the PHY to clear any pending + * interrupts, then re-enable the PHY interrupt. + * + * * This is an OS internal interface and should not be used from + * application space. Rather applications should use the SIOCMIISIG + * ioctl to receive a signal when a PHY event occurs. + * ** This interrupt is really of no use if the Ethernet MAC driver + * does not support these ioctl calls. + * + * Input Parameters: + * intf - Identifies the network interface. For example "eth0". Only + * useful on platforms that support multiple Ethernet interfaces + * and, hence, multiple PHYs and PHY interrupts. + * handler - The client interrupt handler to be invoked when the PHY + * asserts an interrupt. Must reside in OS space, but can + * signal tasks in user space. A value of NULL can be passed + * in order to detach and disable the PHY interrupt. + * enable - A function pointer that be unsed to enable or disable the + * PHY interrupt. + * + * Returned Value: + * The previous PHY interrupt handler address is returned. This allows you + * to temporarily replace an interrupt handler, then restore the original + * interrupt handler. NULL is returned if there is was not handler in + * place when the call was made. + * + ****************************************************************************/ + +#ifdef CONFIG_SAMV7_GPIOA_IRQ +xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable) +{ + irqstate_t flags; + xcpt_t *phandler; + xcpt_t oldhandler; + gpio_pinset_t pinset; + phy_enable_t enabler; + int irq; + + DEBUGASSERT(intf); + + nvdbg("%s: handler=%p\n", intf, handler); + phydbg("EMAC0: devname=%s\n", SAMV7_EMAC0_DEVNAME); + + if (strcmp(intf, SAMV7_EMAC0_DEVNAME) == 0) + { + phydbg("Select EMAC0\n"); + phandler = &g_emac0_handler; + pinset = GPIO_EMAC0_INT; + irq = IRQ_EMAC0_INT; + enabler = sam_emac0_phy_enable; + } + else + { + ndbg("Unsupported interface: %s\n", intf); + return NULL; + } + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old interrupt handler and save the new one */ + + oldhandler = *phandler; + *phandler = handler; + + /* Configure the interrupt */ + + if (handler) + { + phydbg("Configure pin: %08x\n", pinset); + sam_gpioirq(pinset); + + phydbg("Attach IRQ%d\n", irq); + (void)irq_attach(irq, handler); + } + else + { + phydbg("Detach IRQ%d\n", irq); + (void)irq_detach(irq); + enabler = NULL; + } + + /* Return with the interrupt disabled in either case */ + + sam_gpioirqdisable(irq); + + /* Return the enabling function pointer */ + + if (enable) + { + *enable = enabler; + } + + /* Return the old handler (so that it can be restored) */ + + leave_critical_section(flags); + return oldhandler; +} +#endif /* CONFIG_SAMV7_GPIOA_IRQ */ + +#endif /* HAVE_NETWORK */ diff --git a/configs/same70-xplained/src/sam_hsmci.c b/configs/same70-xplained/src/sam_hsmci.c new file mode 100644 index 0000000000000000000000000000000000000000..6c134309deed71f8905632e6293bed99c795c335 --- /dev/null +++ b/configs/same70-xplained/src/sam_hsmci.c @@ -0,0 +1,320 @@ +/**************************************************************************** + * config/same70-xplained/src/sam_hsmci.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAM E70 Xplained Ultraas one standard SD card connector that is + * connected to the High Speed Multimedia Card Interface (HSMCI) of the SAM + * E70. SD card connector: + * + * ------ ----------------- --------------------- + * SAME70 SAME70 Shared functionality + * Pin Function + * ------ ----------------- --------------------- + * PA30 MCDA0 (DAT0) + * PA31 MCDA1 (DAT1) + * PA26 MCDA2 (DAT2) + * PA27 MCDA3 (DAT3) Camera + * PA25 MCCK (CLK) Shield + * PA28 MCCDA (CMD) + * PC16 Card Detect (C/D) Shield + * ------ ----------------- --------------------- + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "sam_hsmci.h" + +#include "same70-xplained.h" + +#ifdef HAVE_HSMCI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ +/* This structure holds static information unique to one HSMCI peripheral */ + +struct sam_hsmci_state_s +{ + struct sdio_dev_s *hsmci; /* R/W device handle */ + gpio_pinset_t cdcfg; /* Card detect PIO pin configuration */ + gpio_pinset_t pwrcfg; /* Power PIO pin configuration */ + uint8_t irq; /* Interrupt number (same as pid) */ + uint8_t slotno; /* Slot number */ + bool cd; /* TRUE: card is inserted */ + xcpt_t handler; /* Interrupt handler */ +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* HSCMI device state */ + +#ifdef CONFIG_SAMV7_HSMCI0 +static int sam_hsmci0_cardetect(int irq, void *regs); + +static struct sam_hsmci_state_s g_hsmci0 = +{ + .cdcfg = GPIO_MCI0_CD, + .irq = IRQ_MCI0_CD, + .slotno = 0, + .handler = sam_hsmci0_cardetect, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_cardinserted_internal + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_cardinserted_internal(struct sam_hsmci_state_s *state) +{ + bool inserted; + + /* Get the state of the PIO pin */ + + inserted = sam_gpioread(state->cdcfg); + fllvdbg("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES"); + return !inserted; +} + +/**************************************************************************** + * Name: sam_hsmci_cardetect, sam_hsmci0_cardetect, and sam_hsmci1_cardetect + * + * Description: + * Card detect interrupt handlers + * + ****************************************************************************/ + +static int sam_hsmci_cardetect(struct sam_hsmci_state_s *state) +{ + /* Get the current card insertion state */ + + bool cd = sam_cardinserted_internal(state); + + /* Has the card detect state changed? */ + + if (cd != state->cd) + { + /* Yes... remember that new state and inform the HSMCI driver */ + + state->cd = cd; + + /* Report the new state to the SDIO driver */ + + sdio_mediachange(state->hsmci, cd); + } + + return OK; +} + +#ifdef CONFIG_SAMV7_HSMCI0 +static int sam_hsmci0_cardetect(int irq, void *regs) +{ + int ret; + + /* Handle the card detect interrupt. The interrupt level logic will + * kick of the driver-level operations to initialize the MMC/SD block + * device. + */ + + ret = sam_hsmci_cardetect(&g_hsmci0); + +#ifdef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT + /* Let the automounter know about the insertion event */ + + sam_automount_event(HSMCI0_SLOTNO, sam_cardinserted(HSMCI0_SLOTNO)); +#endif + + return ret; +} +#endif + +/**************************************************************************** + * Name: sam_hsmci_state + * + * Description: + * Initialize HSMCI PIOs. + * + ****************************************************************************/ + +static inline struct sam_hsmci_state_s *sam_hsmci_state(int slotno) +{ + struct sam_hsmci_state_s *state = NULL; + +#ifdef CONFIG_SAMV7_HSMCI0 + state = &g_hsmci0; +#endif + + return state; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_hsmci_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int sam_hsmci_initialize(int slotno, int minor) +{ + struct sam_hsmci_state_s *state; + int ret; + + /* Get the static HSMI description */ + + state = sam_hsmci_state(slotno); + if (!state) + { + fdbg("ERROR: No state for slotno %d\n", slotno); + return -EINVAL; + } + + /* Initialize card-detect, write-protect, and power enable PIOs */ + + sam_configgpio(state->cdcfg); + sam_dumpgpio(state->cdcfg, "HSMCI Card Detect"); + + if (state->pwrcfg != 0) + { + sam_configgpio(state->pwrcfg); + sam_dumpgpio(state->pwrcfg, "HSMCI Power"); + } + + /* Mount the SDIO-based MMC/SD block driver */ + /* First, get an instance of the SDIO interface */ + + state->hsmci = sdio_initialize(slotno); + if (!state->hsmci) + { + fdbg("ERROR: Failed to initialize SDIO slot %d\n", slotno); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(minor, state->hsmci); + if (ret != OK) + { + fdbg("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + /* Configure card detect interrupts */ + + sam_gpioirq(state->cdcfg); + (void)irq_attach(state->irq, state->handler); + + /* Then inform the HSMCI driver if there is or is not a card in the slot. */ + + state->cd = sam_cardinserted_internal(state); + sdio_mediachange(state->hsmci, state->cd); + + /* Enable card detect interrupts */ + + sam_gpioirqenable(state->irq); + return OK; +} + +/**************************************************************************** + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_cardinserted(int slotno) +{ + struct sam_hsmci_state_s *state; + + /* Get the HSMI description */ + + state = sam_hsmci_state(slotno); + if (!state) + { + fdbg("ERROR: No state for slotno %d\n", slotno); + return false; + } + + /* Return the state of the PIO pin */ + + return sam_cardinserted_internal(state); +} + +/**************************************************************************** + * Name: sam_writeprotected + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_writeprotected(int slotno) +{ + /* There are no write protect pins */ + + return false; +} + +#endif /* HAVE_HSMCI */ diff --git a/configs/same70-xplained/src/sam_mcan.c b/configs/same70-xplained/src/sam_mcan.c new file mode 100644 index 0000000000000000000000000000000000000000..d0430ed1ceef8845f169420d11df535b9d3858b5 --- /dev/null +++ b/configs/same70-xplained/src/sam_mcan.c @@ -0,0 +1,134 @@ +/************************************************************************************ + * configs/same70-xplainedk/src/sam_mcan.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_mcan.h" +#include "same70-xplained.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_SAMV7_MCAN0) || defined(CONFIG_SAMV7_MCAN1)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#if defined(CONFIG_SAMV7_MCAN0) && defined(CONFIG_SAMV7_MCAN1) +# warning "Both MCAN0 and MCAN1 are enabled. Assuming only CAN1." +# undef CONFIG_SAMV7_MCAN0 +#endif + +#ifdef CONFIG_SAMV7_MCAN0 +# define CAN_PORT 0 +#else +# define CAN_PORT 1 +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = sam_mcan_initialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && (CONFIG_SAMV7_MCAN0 || CONFIG_SAMV7_MCAN1) */ diff --git a/configs/same70-xplained/src/sam_sdram.c b/configs/same70-xplained/src/sam_sdram.c new file mode 100644 index 0000000000000000000000000000000000000000..e8a6e65a195560230712eea04a95c9e798b32d66 --- /dev/null +++ b/configs/same70-xplained/src/sam_sdram.c @@ -0,0 +1,314 @@ +/**************************************************************************** + * configs/same70-xplained/src/sam_sdram.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Most of this file derives from Atmel sample code for the SAME70-XPLD + * board. That sample code has licensing that is compatible with the NuttX + * modified BSD license: + * + * Copyright (c) 2012, Atmel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor Atmel nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" + +#include "sam_periphclks.h" +#include "chip/sam_memorymap.h" +#include "chip/sam_pinmap.h" +#include "chip/sam_pmc.h" +#include "chip/sam_matrix.h" +#include "chip/sam_sdramc.h" + +#include "same70-xplained.h" + +#ifdef CONFIG_SAMV7_SDRAMC + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define SDRAM_BA0 (1 << 20) +#define SDRAM_BA1 (1 << 21) + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_sdram_config + * + * Description: + * Configures the on-board SDRAM. SAME70 Xplained features one external + * IS42S16100E-7BLI, 512Kx16x2, 10ns, SDRAM. SDRAM0 is connected to chip + * select NCS1. + * + * Input Parameters: + * None + * + * Assumptions: + * This test runs early in initialization before I- and D-caches are + * enabled. + * + * NOTE: Since the delay loop is calibrate with caches in enabled, the + * calls to up_udelay() are wrong ty orders of magnitude. + * + ****************************************************************************/ + +void sam_sdram_config(void) +{ + volatile uint8_t *psdram = (uint8_t *)SAM_SDRAMCS_BASE; + uint32_t regval; + int i; + + /* Configure SDRAM pins */ + + sam_configgpio(GPIO_SMC_D0); + sam_configgpio(GPIO_SMC_D1); + sam_configgpio(GPIO_SMC_D2); + sam_configgpio(GPIO_SMC_D3); + sam_configgpio(GPIO_SMC_D4); + sam_configgpio(GPIO_SMC_D5); + sam_configgpio(GPIO_SMC_D6); + sam_configgpio(GPIO_SMC_D7); + sam_configgpio(GPIO_SMC_D8); + sam_configgpio(GPIO_SMC_D9); + sam_configgpio(GPIO_SMC_D10); + sam_configgpio(GPIO_SMC_D11); + sam_configgpio(GPIO_SMC_D12); + sam_configgpio(GPIO_SMC_D13); + sam_configgpio(GPIO_SMC_D14); + sam_configgpio(GPIO_SMC_D15); + + /* SAME70 SDRAM + * --------------- ----------- + * PC20 A2 A0 + * PC21 A3 A1 + * PC22 A4 A2 + * PC23 A5 A3 + * PC24 A6 A4 + * PC25 A7 A5 + * PC26 A8 A6 + * PC27 A9 A7 + * PC28 A10 A8 + * PC29 A11 A9 + * PD13 SDA10 A10 + * PA20 BA0 A11 + * PD17 CAS nCAS + * PD14 SDCKE CKE + * PD23 SDCK CLK + * PC15 SDCS nCS + * PC18 A0/NBS0 LDQM + * PD16 RAS nRAS + * PD15 NWR1/NBS1 UDQM + * PD29 SDWE nWE + */ + + sam_configgpio(GPIO_SMC_A2); /* PC20 A2 -> A0 */ + sam_configgpio(GPIO_SMC_A3); /* PC21 A3 -> A1 */ + sam_configgpio(GPIO_SMC_A4); /* PC22 A4 -> A2 */ + sam_configgpio(GPIO_SMC_A5); /* PC23 A5 -> A3 */ + sam_configgpio(GPIO_SMC_A6); /* PC24 A6 -> A4 */ + sam_configgpio(GPIO_SMC_A7); /* PC25 A7 -> A5 */ + sam_configgpio(GPIO_SMC_A8); /* PC26 A8 -> A6 */ + sam_configgpio(GPIO_SMC_A9); /* PC27 A9 -> A7 */ + sam_configgpio(GPIO_SMC_A10); /* PC28 A10 -> A8 */ + sam_configgpio(GPIO_SMC_A11); /* PC29 A11 -> A9 */ + sam_configgpio(GPIO_SDRAMC_A10_2); /* PD13 SDA10 -> A10 */ + sam_configgpio(GPIO_SDRAMC_BA0); /* PA20 BA0 -> A11 */ + + sam_configgpio(GPIO_SDRAMC_CKE); /* PD14 SDCKE -> CKE */ + sam_configgpio(GPIO_SDRAMC_CK); /* PD23 SDCK -> CLK */ + sam_configgpio(GPIO_SDRAMC_CS_1); /* PC15 SDCS -> nCS */ + sam_configgpio(GPIO_SDRAMC_RAS); /* PD16 RAS -> nRAS */ + sam_configgpio(GPIO_SDRAMC_CAS); /* PD17 CAS -> nCAS */ + sam_configgpio(GPIO_SDRAMC_WE); /* PD29 SDWE -> nWE */ + sam_configgpio(GPIO_SMC_NBS0); /* PC18 A0/NBS0 -> LDQM */ + sam_configgpio(GPIO_SMC_NBS1); /* PD15 NWR1/NBS1 -> UDQM */ + + /* Enable the SDRAMC peripheral */ + + sam_sdramc_enableclk(); + + regval = getreg32(SAM_MATRIX_CCFG_SMCNFCS); + regval |= MATRIX_CCFG_SMCNFCS_SDRAMEN; + putreg32(regval, SAM_MATRIX_CCFG_SMCNFCS); + + /* 1. SDRAM features must be set in the configuration register: + * asynchronous timings (TRC, TRAS, etc.), number of columns, rows, CAS + * latency, and the data bus width. + * + * SDRAMC_CR_NC_COL8 8 column bits + * SDRAMC_CR_NR_ROW11 1 row bits + * SDRAMC_CR_NB_BANK2 2 banks + * SDRAMC_CR_CAS_LATENCY3 3 cycle CAS latency + * SDRAMC_CR_DBW 16 bit + * SDRAMC_CR_TWR(4) 4 cycle write recovery delay + * SDRAMC_CR_TRCTRFC(11) 63 ns min + * SDRAMC_CR_TRP(5) 21 ns min Command period (PRE to ACT) + * SDRAMC_CR_TRCD(5) 21 ns min Active Command to read/Write Command delay time + * SDRAMC_CR_TRAS(8) 42 ns min Command period (ACT to PRE) + * SDRAMC_CR_TXSR(13) 70 ns min Exit self-refresh to active time + */ + + regval = SDRAMC_CR_NC_COL8 | /* 8 column bits */ + SDRAMC_CR_NR_ROW11 | /* 11 row bits */ + SDRAMC_CR_NB_BANK2 | /* 2 banks */ + SDRAMC_CR_CAS_LATENCY3 | /* 3 cycle CAS latency */ + SDRAMC_CR_DBW | /* 16 bit */ + SDRAMC_CR_TWR(4) | /* 4 cycle write recovery delay */ + SDRAMC_CR_TRCTRFC(11) | /* 63 ns min */ + SDRAMC_CR_TRP(5) | /* 21 ns min Command period (PRE to ACT) */ + SDRAMC_CR_TRCD(5) | /* 21 ns min Active Command to read/Write Command delay time */ + SDRAMC_CR_TRAS(8) | /* 42 ns min Command period (ACT to PRE) */ + SDRAMC_CR_TXSR(13); /* 70 ns min Exit self-refresh to active time */ + + putreg32(regval, SAM_SDRAMC_CR); + + /* 2. For mobile SDRAM, temperature-compensated self refresh (TCSR), drive + * strength (DS) and partial array self refresh (PASR) must be set in + * the Low Power Register. + */ + + putreg32(0, SAM_SDRAMC_LPR); + + /* 3. The SDRAM memory type must be set in the Memory Device Register.*/ + + putreg32(SDRAMC_MDR_SDRAM, SAM_SDRAMC_MDR); + + /* 4. A minimum pause of 200 usec is provided to precede any signal toggle.*/ + + up_udelay(200); + + /* 5. A NOP command is issued to the SDRAM devices. The application must + * set Mode to 1 in the Mode Register and perform a write access to any + * SDRAM address. + */ + + putreg32(SDRAMC_MR_MODE_NOP, SAM_SDRAMC_MR); + *psdram = 0; + up_udelay(200); + + /* 6. An All Banks Precharge command is issued to the SDRAM devices. The + * application must set Mode to 2 in the Mode Register and perform a + * write access to any SDRAM address. + */ + + putreg32(SDRAMC_MR_MODE_PRECHARGE, SAM_SDRAMC_MR); + *psdram = 0; + up_udelay(200); + + /* 7. Eight auto-refresh (CBR) cycles are provided. The application must + * set the Mode to 4 in the Mode Register and perform a write access to + * any SDRAM location eight times. + */ + + for (i = 0 ; i < 8; i++) + { + putreg32(SDRAMC_MR_MODE_AUTOREFRESH, SAM_SDRAMC_MR); + *psdram = 0; + } + + up_udelay(200); + + /* 8. A Mode Register set (MRS) cycle is issued to program the parameters + * of the SDRAM devices, in particular CAS latency and burst length. + * The application must set Mode to 3 in the Mode Register and perform + * a write access to the SDRAM. The write address must be chosen so + * that BA[1:0] are set to 0. For example, with a 16-bit 128 MB SDRAM + * (12 rows, 9 columns, 4 banks) bank address, the SDRAM write access + * should be done at the address 0x70000000. + */ + + putreg32(SDRAMC_MR_MODE_LOADMODE, SAM_SDRAMC_MR); + *psdram = 0; + up_udelay(200); + + /* 9. For mobile SDRAM initialization, an Extended Mode Register set + * (EMRS) cycle is issued to program the SDRAM parameters (TCSR, PASR, + * DS). The application must set Mode to 5 in the Mode Register and + * perform a write access to the SDRAM. The write address must be + * chosen so that BA[1] or BA[0] are set to 1. + * + * For example, with a 16-bit 128 MB SDRAM, (12 rows, 9 columns, 4 + * banks) bank address the SDRAM write access should be done at the + * address 0x70800000 or 0x70400000. + */ + + //putreg32(SDRAMC_MR_MODE_EXTLOADMODE, SDRAMC_MR_MODE_EXT_LOAD_MODEREG); + // *((uint8_t *)(psdram + SDRAM_BA0)) = 0; + + /* 10. The application must go into Normal Mode, setting Mode to 0 in the + * Mode Register and performing a write access at any location in the + * SDRAM. + */ + + putreg32(SDRAMC_MR_MODE_NORMAL, SAM_SDRAMC_MR); + *psdram = 0; + up_udelay(200); + + /* 11. Write the refresh rate into the count field in the SDRAMC Refresh + * Timer register. (Refresh rate = delay between refresh cycles). The + * SDRAM device requires a refresh every 15.625 usec or 7.81 usec. With + * a 100 MHz frequency, the Refresh Timer Counter Register must be set + * with the value 1562(15.625 usec x 100 MHz) or 781(7.81 usec x 100 + * MHz). + * + * For IS42S16100E, 2048 refresh cycle every 32ms, every 15.625 usec + */ + + regval = (32 * (BOARD_MCK_FREQUENCY / 1000)) / 2048 ; + putreg32(regval, SAM_SDRAMC_TR); + + regval = getreg32(SAM_SDRAMC_CFR1); + regval |= SDRAMC_CFR1_UNAL; + putreg32(regval, SAM_SDRAMC_CFR1); + + /* After initialization, the SDRAM devices are fully functional. */ +} + +#endif /* CONFIG_SAMV7_SDRAMC */ diff --git a/configs/same70-xplained/src/sam_spi.c b/configs/same70-xplained/src/sam_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..df0ba7b489acf495516273af60cf43ec4e8e7e47 --- /dev/null +++ b/configs/same70-xplained/src/sam_spi.c @@ -0,0 +1,209 @@ +/************************************************************************************ + * configs/same70-xplained/src/sam_spi.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "sam_gpio.h" +#include "sam_spi.h" +#include "same70-xplained.h" + +#ifdef CONFIG_SAMV7_SPI + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select PIO pins for the SAME70-XPLD board. + * + ************************************************************************************/ + +void sam_spidev_initialize(void) +{ +#ifdef CONFIG_SAMV7_SPI0_MASTER +#endif + +#ifdef CONFIG_SAMV7_SPI0_SLAVE +#endif + +#ifdef CONFIG_SAMV7_SPI1_MASTER +#endif + +#ifdef CONFIG_SAMV7_SPI1_SLAVE +#endif +} + +/**************************************************************************** + * Name: sam_spi[0|1]select, sam_spi[0|1]status, and sam_spi[0|1]cmddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * include: + * + * o sam_spi[0|1]select is a functions tomanage the board-specific chip selects + * o sam_spi[0|1]status and sam_spi[0|1]cmddata: Implementations of the status + * and cmddata methods of the SPI interface defined by struct spi_ops_ + * (see include/nuttx/spi/spi.h). All other methods including + * sam_spibus_initialize()) are provided by common SAM3/4 logic. + * + * To use this common SPI logic on your board: + * + * 1. Provide logic in sam_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide sam_spi[0|1]select() and sam_spi[0|1]status() functions in your board- + * specific logic. These functions will perform chip selection and + * status operations using PIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * sam_spi[0|1]cmddata() functions in your board-specific logic. This + * function will perform cmd/data selection operations using PIOs in + * the way your board is configured. + * 3. Add a call to sam_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by sam_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spi[0|1]select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * PIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the PIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SAMV7_SPI0_MASTER +void sam_spi0select(enum spi_dev_e devid, bool selected) +{ +} +#endif + +#ifdef CONFIG_SAMV7_SPI1_MASTER +void sam_spi1select(enum spi_dev_e devid, bool selected) +{ +} +#endif + +/**************************************************************************** + * Name: sam_spi[0|1]status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef CONFIG_SAMV7_SPI0_MASTER +uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_SAMV7_SPI1_MASTER +uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#endif /* CONFIG_SAMV7_SPI */ diff --git a/configs/same70-xplained/src/sam_usbdev.c b/configs/same70-xplained/src/sam_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..e75322a37d3580259d9e4ff884c7eb5599df02c9 --- /dev/null +++ b/configs/same70-xplained/src/sam_usbdev.c @@ -0,0 +1,98 @@ +/************************************************************************************ + * configs/same70-xplained/src/sam_usbdev.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "sam_gpio.h" +#include "same70-xplained.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_usbinitialize + * + * Description: + * Called from stm32_boardinitialize very early in initialization to setup USB- + * related GPIO pins for the SAME70-XPLD board. + * + ************************************************************************************/ + +void sam_usbinitialize(void) +{ + /* Initialize the VBUS enable signal to HI output in any event so that, by + * default, VBUS power is not provided at the USB connector. + */ + + sam_configgpio(GPIO_VBUSON); +} + +/************************************************************************************ + * Name: sam_usbsuspend + * + * Description: + * Board logic must provide the sam_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} diff --git a/configs/same70-xplained/src/sam_userleds.c b/configs/same70-xplained/src/sam_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..a805f0ea689d4443af971da9579ccf0f27ebfe33 --- /dev/null +++ b/configs/same70-xplained/src/sam_userleds.c @@ -0,0 +1,95 @@ +/**************************************************************************** + * configs/same70-xplained/src/sam_userleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_gpio.h" +#include "same70-xplained.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED PIOs for output */ + + sam_configgpio(GPIO_LED0); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_LED0) + { + sam_gpiowrite(GPIO_LED0, !ledon); /* Low illuminates */ + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + /* Low illuminates */ + + sam_gpiowrite(GPIO_LED0, (ledset & BOARD_LED0_BIT) == 0)); +} diff --git a/configs/same70-xplained/src/same70-xplained.h b/configs/same70-xplained/src/same70-xplained.h new file mode 100644 index 0000000000000000000000000000000000000000..db003b48ce53c203123339faa7dfdfb48f67ce78 --- /dev/null +++ b/configs/same70-xplained/src/same70-xplained.h @@ -0,0 +1,516 @@ +/************************************************************************************ + * configs/same70-xplained/src/same70-xplained.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAME70_XPLAINED_SRC_SAME70_XPLAINED_H +#define __CONFIGS_SAME70_XPLAINED_SRC_SAME70_XPLAINED_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#define HAVE_HSMCI 1 +#define HAVE_AUTOMOUNTER 1 +#define HAVE_USB 1 +#define HAVE_USBDEV 1 +#define HAVE_USBMONITOR 1 +#define HAVE_NETWORK 1 +#define HAVE_MACADDR 1 +#define HAVE_MTDCONFIG 1 +#define HAVE_PROGMEM_CHARDEV 1 +#define HAVE_I2CTOOL 1 + +/* HSMCI */ +/* Can't support MMC/SD if the card interface is not enabled */ + +#if !defined(CONFIG_SAMV7_HSMCI0) +# undef HAVE_HSMCI +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(HAVE_HSMCI) && defined(CONFIG_DISABLE_MOUNTPOINT) +# warning Mountpoints disabled. No MMC/SD support +# undef HAVE_HSMCI +#endif + +/* We need PIO interrupts on GPIOC to support card detect interrupts */ + +#if defined(HAVE_HSMCI) && !defined(CONFIG_SAMV7_GPIOC_IRQ) +# warning PIOC interrupts not enabled. No MMC/SD support. +# undef HAVE_HSMCI +#endif + +/* MMC/SD minor numbers */ + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDSLOTNO 0 +#endif + +#if CONFIG_NSH_MMCSDMINOR != 0 +# error SAME70 has only one MMC/SD slot (CONFIG_NSH_MMCSDMINOR) +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +#endif + +#define HSMCI0_SLOTNO CONFIG_NSH_MMCSDSLOTNO +#define HSMCI0_MINOR CONFIG_NSH_MMCSDMINOR + +/* Automounter. Currently only works with HSMCI. */ + +#if !defined(CONFIG_FS_AUTOMOUNTER) || !defined(HAVE_HSMCI) +# undef HAVE_AUTOMOUNTER +# undef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT +#endif + +#ifndef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT +# undef HAVE_AUTOMOUNTER +#endif + +#ifdef HAVE_AUTOMOUNTER +# ifdef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT + /* HSMCI0 Automounter defaults */ + +# ifndef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_FSTYPE +# define CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_FSTYPE "vfat" +# endif + +# ifndef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_BLKDEV +# define CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_BLKDEV "/dev/mmcds0" +# endif + +# ifndef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_MOUNTPOINT +# define CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_MOUNTPOINT "/mnt/sdcard0" +# endif + +# ifndef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_DDELAY +# define CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_DDELAY 1000 +# endif + +# ifndef CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_UDELAY +# define CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT_UDELAY 2000 +# endif +# endif /* CONFIG_SAME70XPLAINED_HSMCI0_AUTOMOUNT */ +#endif /* HAVE_AUTOMOUNTER */ + +/* USB Device */ +/* CONFIG_SAMV7_UDP and CONFIG_USBDEV must be defined, or there is no USB + * device. + */ + +#if !defined(CONFIG_SAMV7_UDP) || !defined(CONFIG_USBDEV) +# undef HAVE_USB +# undef HAVE_USBDEV +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#ifndef HAVE_USBDEV +# undef CONFIG_USBDEV_TRACE +#endif + +#if !defined(CONFIG_SYSTEM_USBMONITOR) || !defined(CONFIG_USBDEV_TRACE) +# undef HAVE_USBMONITOR +#endif + +/* Networking and AT24-based MTD config */ + +#if !defined(CONFIG_NET) || !defined(CONFIG_SAMV7_EMAC) +# undef HAVE_NETWORK +# undef HAVE_MACADDR +#endif + +#if !defined(CONFIG_SAMV7_TWIHS0) || !defined(CONFIG_MTD_AT24XX) +# undef HAVE_MACADDR +# undef HAVE_MTDCONFIG +#endif + +#if defined(CONFIG_NSH_NOMAC) || !defined(CONFIG_AT24XX_EXTENDED) +# undef HAVE_MACADDR +#endif + +#if !defined(CONFIG_MTD_CONFIG) +# undef HAVE_MTDCONFIG +#endif + +/* On-chip Programming Memory */ + +#if !defined(CONFIG_SAMV7_PROGMEM) || !defined(CONFIG_MTD_PROGMEM) +# undef HAVE_PROGMEM_CHARDEV +#endif + +/* This is the on-chip progmem memroy driver minor number */ + +#define PROGMEM_MTD_MINOR 0 + +/* Do we need to register I2C drivers on behalf of the I2C tool? */ + +#if !defined(CONFIG_SYSTEM_I2CTOOL) || !defined(CONFIG_I2C_DRIVER) +# undef HAVE_I2CTOOL +#endif + +/* procfs File System */ + +#ifdef CONFIG_FS_PROCFS +# ifdef CONFIG_NSH_PROC_MOUNTPOINT +# define SAME70_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT +# else +# define SAME70_PROCFS_MOUNTPOINT "/proc" +# endif +#endif + +/* SAME70-XPLD GPIO Pin Definitions *************************************************/ + +/* Ethernet MAC. + * + * KSZ8081RNACA Connections + * ------------------------ + * + * ------ --------- --------- + * SAME70 SAME70 Ethernet + * Pin Function Functio + * ------ --------- --------- + * PD0 GTXCK REF_CLK + * PD1 GTXEN TXEN + * PD2 GTX0 TXD0 + * PD3 GTX1 TXD1 + * PD4 GRXDV CRS_DV + * PD5 GRX0 RXD0 + * PD6 GRX1 RXD1 + * PD7 GRXER RXER + * PD8 GMDC MDC + * PD9 GMDIO MDIO + * PA14 GPIO INTERRUPT + * PC10 GPIO RESET + * ------ --------- --------- + */ + +#define GPIO_EMAC0_INT (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_FALLING | GPIO_PORT_PIOA | GPIO_PIN14) +#define GPIO_EMAC0_RESET (GPIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN10) + +#define IRQ_EMAC0_INT SAM_IRQ_PA14 + +/* LEDs + * + * A single LED is available driven by PC8. + */ + +#define GPIO_LED0 (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN8) + +/* Buttons + * + * SAM E70 Xplained contains two mechanical buttons. One button is the RESET + * button connected to the SAM E70 reset line and the other, PA11, is a generic + * user configurable button. When a button is pressed it will drive the I/O + * line to GND. + * + * NOTE: There are no pull-up resistors connected to the generic user buttons + * so it is necessary to enable the internal pull-up in the SAM E70 to use the + * button. + */ + +#define GPIO_SW0 (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOA | GPIO_PIN11) +#define IRQ_SW0 SAM_IRQ_PA11 + +/* HSMCI SD Card Detect + * + * The SAM E70 Xplained has one standard SD card connector that is connected + * to the High Speed Multimedia Card Interface (HSMCI) of the SAM E70. SD + * card connector: + * + * ------ ----------------- --------------------- + * SAME70 SAME70 Shared functionality + * Pin Function + * ------ ----------------- --------------------- + * PA30 MCDA0 (DAT0) + * PA31 MCDA1 (DAT1) + * PA26 MCDA2 (DAT2) + * PA27 MCDA3 (DAT3) Camera + * PA25 MCCK (CLK) Shield + * PA28 MCCDA (CMD) + * PC16 Card Detect (C/D) Shield + * ------ ----------------- --------------------- + */ + +#define GPIO_MCI0_CD (GPIO_INPUT | GPIO_CFG_DEFAULT | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOC | GPIO_PIN16) +#define IRQ_MCI0_CD SAM_IRQ_PC16 + +/* USB Host + * + * The SAM E70 Xplained has a Micro-USB connector for use with the SAM E70 USB + * module labeled as TARGET USB on the kit. In USB host mode VBUS voltage is + * provided by the kit and has to be enabled by setting the "VBUS Host Enable" + * pin (PC16) low. + */ + +#define GPIO_VBUSON (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN16) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_sdram_config + * + * Description: + * Configures the on-board SDRAM. SAME70 Xplained features one external + * IS42S16100E-7BLI, 512Kx16x2, 10ns, SDRAM. SDRAM0 is connected to chip select + * NCS1. + * + * Input Parameters: + * None + * + * Assumptions: + * The DDR memory regions is configured as strongly ordered memory. When we + * complete initialization of SDRAM and it is ready for use, we will make DRAM + * into normal memory. + * + ************************************************************************************/ + +#ifdef CONFIG_SAMV7_SDRAMC +void sam_sdram_config(void); +#else +# define sam_sdram_config(t) +#endif + +/************************************************************************************ + * Name: sam_bringup + * + * Description: + * Bring up board features + * + ************************************************************************************/ + +#if defined(CONFIG_LIB_BOARDCTL) || defined(CONFIG_BOARD_INITIALIZE) +int sam_bringup(void); +#endif + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the SAME70-XPLD board. + * + ************************************************************************************/ + +#ifdef CONFIG_SAMV7_SPI +void sam_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: sam_hsmci_initialize + * + * Description: + * Initialize HSMCI support + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +int sam_hsmci_initialize(int slot, int minor); +#else +# define sam_hsmci_initialize(s,m) (-ENOSYS) +#endif + +/************************************************************************************ + * Name: sam_usbinitialize + * + * Description: + * Called from stm32_boardinitialize very early in initialization to setup USB- + * related GPIO pins for the SAME70-XPLD board. + * + ************************************************************************************/ + +#ifdef HAVE_USB +void sam_usbinitialize(void); +#endif + +/************************************************************************************ + * Name: sam_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +#ifdef HAVE_NETWORK +void sam_netinitialize(void); +#endif + +/************************************************************************************ + * Name: sam_emac0_setmac + * + * Description: + * Read the Ethernet MAC address from the AT24 FLASH and configure the Ethernet + * driver with that address. + * + ************************************************************************************/ + +#ifdef HAVE_MACADDR +int sam_emac0_setmac(void); +#endif + +/************************************************************************************ + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_cardinserted(int slotno); +#else +# define sam_cardinserted(slotno) (false) +#endif + +/************************************************************************************ + * Name: sam_writeprotected + * + * Description: + * Check if the card in the MMCSD slot is write protected + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_writeprotected(int slotno); +#endif + +/************************************************************************************ + * Name: sam_automount_initialize + * + * Description: + * Configure auto-mounters for each enable and so configured HSMCI + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ************************************************************************************/ + +#ifdef HAVE_AUTOMOUNTER +void sam_automount_initialize(void); +#endif + +/************************************************************************************ + * Name: sam_automount_event + * + * Description: + * The HSMCI card detection logic has detected an insertion or removal event. It + * has already scheduled the MMC/SD block driver operations. Now we need to + * schedule the auto-mount event which will occur with a substantial delay to make + * sure that everything has settle down. + * + * Input Parameters: + * slotno - Identifies the HSMCI0 slot: HSMCI0 or HSMCI1_SLOTNO. There is a + * terminology problem here: Each HSMCI supports two slots, slot A and slot B. + * Only slot A is used. So this is not a really a slot, but an HSCMI peripheral + * number. + * inserted - True if the card is inserted in the slot. False otherwise. + * + * Returned Value: + * None + * + * Assumptions: + * Interrupts are disabled. + * + ************************************************************************************/ + +#ifdef HAVE_AUTOMOUNTER +void sam_automount_event(int slotno, bool inserted); +#endif + +/************************************************************************************ + * Name: sam_writeprotected + * + * Description: + * Check if the card in the MMCSD slot is write protected + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_writeprotected(int slotno); +#else +# define sam_writeprotected(slotno) (false) +#endif + +/************************************************************************************ + * Name: sam_at24config + * + * Description: + * Create an AT24xx-based MTD configuration device for storage device configuration + * information. + * + ************************************************************************************/ + +#ifdef HAVE_MTDCONFIG +int sam_at24config(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAME70_XPLAINED_SRC_SAME70_XPLAINED_H */ diff --git a/configs/same70-xplained/tools/atmel_same70_xplained.cfg b/configs/same70-xplained/tools/atmel_same70_xplained.cfg new file mode 100644 index 0000000000000000000000000000000000000000..068d6c2c37d891d23145c84bfe36161bd9336bca --- /dev/null +++ b/configs/same70-xplained/tools/atmel_same70_xplained.cfg @@ -0,0 +1,13 @@ +# +# Atmel SAME70 Xplained evaluation kit. +# http://www.atmel.com/tools/ATSAME70-XPLD.aspx +# +# Connect using the EDBG chip on the dev kit over USB + +source [find interface/cmsis-dap.cfg] + +set CHIPNAME atsame70q21 + +source [find target/atsamv.cfg] + +reset_config srst_only diff --git a/configs/same70-xplained/tools/oocd.sh b/configs/same70-xplained/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..a53ca146fd3ad61217c3a3f5a0ab60c14253cd9f --- /dev/null +++ b/configs/same70-xplained/tools/oocd.sh @@ -0,0 +1,57 @@ +#!/bin/sh +# +# See configs/atmel_same70_xplained.cfg/README.txt for information about +# this file. + +TOPDIR=$1 +USAGE="$0 [-d]" +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +# Assume that OpenOCD was installed and at /usr/local/bin. Uncomment +# the following to run directly from the build directory + +# OPENOCD_PATH="/home/OpenOCD/openocd/src" +# OPENOCD_PATH="/usr/bin" +OPENOCD_PATH="/usr/local/bin" + +# TARGET_PATH="/home/OpenOCD/openocd/tcl" +# TARGET_PATH="/usr/share/openocd/scripts" +TARGET_PATH="/usr/local/share/openocd/scripts" + +# Assume a Unix development environment. Uncomment to use a Windows +# like environment + +#OPENOCD_EXE=openocd.exe +OPENOCD_EXE=openocd + +OPENOCD_CFG="${TOPDIR}/configs/same70-xplained/tools/atmel_same70_xplained.cfg" +OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}" + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +if [ ! -d ${OPENOCD_PATH} ]; then + echo "OpenOCD path does not exist: ${OPENOCD_PATH}" + exit 1 +fi +if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then + echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f ${OPENOCD_CFG} ]; then + echo "OpenOCD config file does not exist: ${OPENOCD_CFG}" + exit 1 +fi + +echo "Starting OpenOCD" +cd ${OPENOCD_PATH} || { echo "Failed to CD to ${OPENOCD_PATH}"; exit 1; } +${OPENOCD_EXE} ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" diff --git a/configs/saml21-xplained/Kconfig b/configs/saml21-xplained/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..a567ae7851a54ecf9ae8a82b1e54eed7a7400bff --- /dev/null +++ b/configs/saml21-xplained/Kconfig @@ -0,0 +1,115 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAML21_XPLAINED + +menu "CPU Clock Configuration" + +choice + prompt "OSC16M Frequency" + default SAML21_XPLAINED_OSC16M_4MHZ + +config SAML21_XPLAINED_OSC16M_4MHZ + bool "4 MHz" + +config SAML21_XPLAINED_OSC16M_8MHZ + bool "8 MHz" + +config SAML21_XPLAINED_OSC16M_12MHZ + bool "12 MHz" + +config SAML21_XPLAINED_OSC16M_16MHZ + bool "16 MHz" + +endchoice # OSC16M Frequency + +config SAML21_XPLAINED_XOSC32K + bool "Enable XOSC32K" + default n + +config SAML21_XPLAINED_DFLL + bool "Use DFLL" + default n + +choice + prompt "DFLL Clock Source" + default SAML21_XPLAINED_DFLL_OSC16MSRC + depends on SAML21_XPLAINED_DFLL + +config SAML21_XPLAINED_DFLL_OSC16MSRC + bool "OSC16M" + +config SAML21_XPLAINED_DFLL_XOSC32KSRC + bool "XOSCK32K" + select SAML21_XPLAINED_XOSC32K + +endchoice # DFLL Clock Source + +choice + prompt "DFLL Operating Mode" + default SAML21_XPLAINED_DFLL_OPENLOOP + depends on SAML21_XPLAINED_DFLL + +config SAML21_XPLAINED_DFLL_OPENLOOP + bool "DFLL Open Loop Mode" + +config SAML21_XPLAINED_DFLL_CLOSEDLOOP + bool "DFLL Closed Loop Mode" + +config SAML21_XPLAINED_DFLL_RECOVERY + bool "DFLL USB Recovery Mode" + depends on EXPERIMENTAL + +endchoice # DLL Operating Mode +endmenu # CPU Clock Configuration + +menu "SAML21 Xplained Pro Modules" + +config SAML21_XPLAINED_IOMODULE + bool "I/O1 Module" + default n + ---help--- + The I/O 1 module is attached. This module provides an MMC/SD card + slot. + +if SAML21_XPLAINED_IOMODULE + +choice + prompt "I/O1 Module Location" + default SAML21_XPLAINED_IOMODULE_EXT1 + +config SAML21_XPLAINED_IOMODULE_EXT1 + bool "EXT1" + +config SAML21_XPLAINED_IOMODULE_EXT2 + bool "EXT2" + +endchoice +endif + +config SAML21_XPLAINED_OLED1MODULE + bool "OLED1 Module" + default n + ---help--- + The OLED 1 module is attached. This module provides an OLED plus 3 + additional switches and 3 additional LEDs. + +if SAML21_XPLAINED_OLED1MODULE + +choice + prompt "OLED1 Module Location" + default SAML21_XPLAINED_OLED1MODULE_EXT1 + +config SAML21_XPLAINED_OLED1MODULE_EXT1 + bool "EXT1" + +config SAML21_XPLAINED_OLED1MODULE_EXT2 + bool "EXT2" + +endchoice +endif +endmenu + +endif # ARCH_BOARD_SAML21_XPLAINED diff --git a/configs/saml21-xplained/README.txt b/configs/saml21-xplained/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..673b9e43b22ea701a5995d2e444453f7b9dc6c36 --- /dev/null +++ b/configs/saml21-xplained/README.txt @@ -0,0 +1,916 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +Atmel SAML21 Xplained Pro development board. This board features the +ATSAML21J18A MCU. + +Contents +======== + + - STATUS/ISSUES + - Modules + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - LEDs and Buttons + - Serial Consoles + - Atmel Studio 6.1 + - JTAG + - SAML21 Xplained Pro-specific Configuration Options + - Configurations + +STATUS/ISSUES +============= + + - Since this port is a leverage of the SAMD20 Xplained port, some of the + STATUS/ISSUES in the SAMD20 Xplained README.txt may apply here as well. + + - 2015-5-26: The basic port is running at 48MHz (using 32.768 XTAL input + and the digital frequency locked loop). The basic NuttShell (NSH) + configuration is working well with the serial console provided by + SERCOM4 as 115200 8N1. + + - 2015-6-14: Added a DMAC driver. There is no way to verify it at present + and, hence, depends upon CONFIG_EXPERIMENTAL=y + +Modules +======= + + There are several I/O modules available that will work with the SAML21 + Xplained Pro Starter Kit: + + 1) I/O1 - An MMC/SD card slot, PWM LED control, ADC light sensor, USART + loopback, TWI AT30TSE758 Temperature sensor. + 2) OLED1 - An OLED plus 3 additional switches and 3 additional LEDs + 3) PROTO1 - A prototyping board with logic on board (other than power- + related logic). + 4) And others. See http://www.atmel.com/products/microcontrollers/avr/xplained.aspx + + Some of these are discussed further below. + + I/O1 + ---- + The primary function of this module is to provide SD card support, but + the full list of modules features include: + + - microSD card connector (SPI interface) + - PWM (LED control) + - ADC (light sensor) + - USART loopback + - TWI AT30TSE758 Temperature sensor with EEPROM + + SPI is available on two of the SAML21 Xplained connectors, EXT1 and EXT2. + They mate with the I/O1 connector as indicated in this table. + + I/O1 CONNECTOR + ----------------- ---------------------- ---------------------- ------------------------------------ + I/O1 EXT1 EXT2 Other use of either pin + ----------------- ---------------------- ---------------------- ------------------------------------ + 1 ID 1 1 Communication line to ID chip on + extension board. + ----------------- ---------------------- ---------------------- ------------------------------------ + 2 GND 2 GND 2 GND + ----------------- ---------------------- ---------------------- ------------------------------------ + 3 LIGHTSENSOR 3 PB05 AIN[13] 3 PA10 AIN[18] + ----------------- ---------------------- ---------------------- ------------------------------------ + 4 LP_OUT 4 PA03 AIN[1] 4 PA11 AIN[19] + ----------------- ---------------------- ---------------------- ------------------------------------ + 5 GPIO1 5 PB06 GPIO 5 PA20 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 6 GPIO2 6 PB07 GPIO 6 PA21 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 7 LED 7 PA12 TCC2/WO[0] 7 PB12 TC4/WO[0] + ----------------- ---------------------- ---------------------- ------------------------------------ + 8 LP_IN 8 PA13 TCC2/WO[1] 8 PB13 TC4/WO[1] + ----------------- ---------------------- ---------------------- ------------------------------------ + 9 TEMP_ALERT 9 PB04 EXTINT[4] 9 PB14 EXTINT[14] + ----------------- ---------------------- ---------------------- ------------------------------------ + 10 microSD_DETECT 10 PA02 GPIO 10 PB15 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 11 TWI SDA 11 PA08 SERCOM2 PAD[0] 11 PA08 SERCOM2 PAD[0] EXT1, EXT2, EXT3 and EDBG + I²C SDA I²C SDA + ----------------- ---------------------- ---------------------- ------------------------------------ + 12 TWI SCL 12 PA09 SERCOM2 PAD[1] 12 PA09 SERCOM2 PAD[1] EXT2, EXT3 and EDBG + I²C SCL I²C SCL + ----------------- ---------------------- ---------------------- ------------------------------------ + 13 USART RX 13 PB09 SERCOM4 PAD[1] 13 PA19 SERCOM1 PAD[3] The SERCOM4 module is shared between + USART RX USART RX EXT1, 2 and 3 USART's, but uses + different pins + ----------------- ---------------------- ---------------------- ------------------------------------ + 14 USART TX 14 PB08 SERCOM4 PAD[0] 14 PA18 SERCOM1 PAD[2] The SERCOM4 module is shared between + USART TX USART TX EXT1, 2 and 3 USART's, but uses + different pins + ----------------- ---------------------- ---------------------- ------------------------------------ + 15 microSD_SS 15 PA05 SERCOM0 PAD[1] 15 PA17 GPIO + SPI SS + ----------------- ---------------------- ---------------------- ------------------------------------ + 16 SPI_MOSI 16 PA06 SERCOM0 PAD[2] 16 PB22 SERCOM5 PAD[2] + SPI MOSI SPI MOSI + ----------------- ---------------------- ---------------------- ------------------------------------ + 17 SPI_MISO 17 PA04 SERCOM0 PAD[0] 17 PB16 SERCOM5 PAD[0] + SPI MISO SPI MISO + ----------------- ---------------------- ---------------------- ------------------------------------ + 18 SPI_SCK 18 PA07 SERCOM0 PAD[3] 18 PB23 SERCOM5 PAD[3] + SPI SCK SPI SCK + ----------------- ---------------------- ---------------------- ------------------------------------ + 19 GND 19 GND GND + ----------------- ---------------------- ---------------------- ------------------------------------ + 20 VCC 20 VCC VCC + ----------------- ---------------------- ---------------------- ------------------------------------ + + The mapping between the I/O1 pins and the SD connector are shown in the + following table. + + SD Card Connection + ------------------ + I/O1 SD PIN Description + ---- ---- --- ------------------------------------------------- + D2 1 Data line 2 (not used) + 15 D3 2 Data line 3. Active low chip select, pulled high + 16 CMD 3 Command line, connected to SPI_MOSI. + 20 VDD 4 + 18 CLK 5 Clock line, connected to SPI_SCK. + 2/19 GND 6 + 17 D0 7 Data line 0, connected to SPI_MISO. + D1 8 Data line 1 (not used) + 10 SW_A 9 Card detect + 2/19 SW_B 10 GND + + Card Detect + ----------- + When a microSD card is put into the connector SW_A and SW_B are short- + circuited. SW_A is connected to the microSD_DETECT signal. To use this + as a card indicator remember to enable internal pullup in the target + device. + + GPIOs + ----- + So all that is required to connect the SD is configure the SPI + + --- ------------------ ---------------------- ------------------------------------- + PIN EXT1 EXT2 Description + --- ------------------ ---------------------- ------------------------------------- + 15 PA05 SERCOM0 PAD[1] 15 PA17 GPIO Active low chip select OUTPUT, pulled + SPI SS high on board. + --- ------------------ ---------------------- ------------------------------------- + 10 PA02 GPIO 10 PB15 GPIO Active low card detect INPUT, must + use internal pull-up. + --- ------------------ ---------------------- ------------------------------------- + + Configuration Options: + ---------------------- + CONFIG_SAML21_XPLAINED_IOMODULE=y : Informs the system that the + I/O1 module is installed + CONFIG_SAML21_XPLAINED_IOMODULE_EXT1=y : The module is installed in EXT1 + CONFIG_SAML21_XPLAINED_IOMODULE_EXT2=y : The mdoule is installed in EXT2 + + See the set-up in the discussion of the nsh configuration below for other + required configuration options. + + NOTE: As of this writing, only the SD card slot is supported in the I/O1 + module. + + OLED1 + ----- + This module provides an OLED plus 3 additional switches and 3 additional + LEDs. + + OLED1 CONNECTOR + ----------------- ---------------------- ---------------------- ------------------------------------ + OLED1 EXT1 EXT2 Other use of either pin + ----------------- ---------------------- ---------------------- ------------------------------------ + 1 ID 1 1 Communication line to ID chip on + extension board. + ----------------- ---------------------- ---------------------- ------------------------------------ + 2 GND 2 GND 2 GND + ----------------- ---------------------- ---------------------- ------------------------------------ + 3 BUTTON2 3 PB05 AIN[13] 3 PA10 AIN[18] + ----------------- ---------------------- ---------------------- ------------------------------------ + 4 BUTTON3 4 PA03 AIN[1] 4 PA11 AIN[19] + ----------------- ---------------------- ---------------------- ------------------------------------ + 5 DATA_CMD_SEL 5 PB06 GPIO 5 PA20 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 6 LED3 6 PB07 GPIO 6 PA21 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 7 LED1 7 PA12 TCC2/WO[0] 7 PB12 TC4/WO[0] + ----------------- ---------------------- ---------------------- ------------------------------------ + 8 LED2 8 PA13 TCC2/WO[1] 8 PB13 TC4/WO[1] + ----------------- ---------------------- ---------------------- ------------------------------------ + 9 BUTTON1 9 PB04 EXTINT[4] 9 PB14 EXTINT[14] + ----------------- ---------------------- ---------------------- ------------------------------------ + 10 DISPLAY_RESET 10 PA02 GPIO 10 PB15 GPIO + ----------------- ---------------------- ---------------------- ------------------------------------ + 11 N/C 11 PA08 SERCOM2 PAD[0] 11 PA08 SERCOM2 PAD[0] EXT1, EXT2, EXT3 and EDBG + I²C SDA I²C SDA + ----------------- ---------------------- ---------------------- ------------------------------------ + 12 N/C 12 PA09 SERCOM2 PAD[1] 12 PA09 SERCOM2 PAD[1] EXT2, EXT3 and EDBG + I²C SCL I²C SCL + ----------------- ---------------------- ---------------------- ------------------------------------ + 13 N/C 13 PB09 SERCOM4 PAD[1] 13 PA19 SERCOM1 PAD[3] The SERCOM4 module is shared between + USART RX USART RX EXT1, 2 and 3 USART's, but uses + different pins + ----------------- ---------------------- ---------------------- ------------------------------------ + 14 N/C 14 PB08 SERCOM4 PAD[0] 14 PA18 SERCOM1 PAD[2] The SERCOM4 module is shared between + USART TX USART TX EXT1, 2 and 3 USART's, but uses + different pins + ----------------- ---------------------- ---------------------- ------------------------------------ + 15 DISPLAY_SS 15 PA05 SERCOM0 PAD[1] 15 PA17 GPIO + SPI SS + ----------------- ---------------------- ---------------------- ------------------------------------ + 16 SPI_MOSI 16 PA06 SERCOM0 PAD[2] 16 PB22 SERCOM5 PAD[2] + SPI MOSI SPI MOSI + ----------------- ---------------------- ---------------------- ------------------------------------ + 17 N/C 17 PA04 SERCOM0 PAD[0] 17 PB16 SERCOM5 PAD[0] + SPI MISO SPI MISO + ----------------- ---------------------- ---------------------- ------------------------------------ + 18 SPI_SCK 18 PA07 SERCOM0 PAD[3] 18 PB23 SERCOM5 PAD[3] + SPI SCK SPI SCK + ----------------- ---------------------- ---------------------- ------------------------------------ + 19 GND 19 GND GND + ----------------- ---------------------- ---------------------- ------------------------------------ + 20 VCC 20 VCC VCC + ----------------- ---------------------- ---------------------- ------------------------------------ + + Configuration Options: + ---------------------- + CONFIG_SAML21_XPLAINED_OLED1MODULE=y : Informs the system that the + I/O1 module is installed + CONFIG_SAML21_XPLAINED_OLED1MODULE_EXT1=y : The module is installed in EXT1 + CONFIG_SAML21_XPLAINED_OLED1MODULE_EXT2=y : The mdoule is installed in EXT2 + + See the set-up in the discussion of the nsh configuration below for other + required configuration options. + + PROTO1 + ------ + A prototyping board with logic on board (other than power-related logic). + There is no built-in support for the PROTO1 module. + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +===================== + + The NuttX make system can be configured to support the various different + toolchain options. All testing has been conducted using the NuttX buildroot + toolchain. To use alternative toolchain, you simply need to add change of + the following configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : Generic GCC ARM EABI toolchain for Windows + + You may also have to modify the PATH in the setenv.h file if your + make cannot find the tools. + + NOTE about Windows native toolchains + ------------------------------------ + + There are basically three kinds of GCC toolchains that can be used: + + 1. A Linux native toolchain in a Linux environment, + 2. The buildroot Cygwin tool chain built in the Cygwin environment, + 3. A Windows native toolchain. + + There are several limitations to using a Windows based toolchain (#3) in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' + utility but you might easily find some new path problems. If so, check + out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic + links are used in Nuttx (e.g., include/arch). The make system works + around these problems for the Windows tools by copying directories + instead of linking them. But this can also cause some confusion for + you: For example, you may edit a file in a "linked" directory and find + that your changes had no effect. That is because you are building the + copy of the file in the "fake" symbolic directory. If you use a + Windows toolchain, you should get in the habit of making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/sam34, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/sam34/sam_vectors.S. You may need to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M0 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M0 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh saml21-xplained/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm0-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M0 toolchain for Cygwin under Windows. + +LEDs and Buttons +================ + + LED + --- + There is one yellow LED available on the SAML21 Xplained Pro board that + can be turned on and off. The LED can be activated by driving the connected + PB10 I/O line to GND. + + When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + control the LED as follows: + + SYMBOL Meaning LED0 + ------------------- ----------------------- ------ + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt N/C + LED_SIGNAL In a signal handler N/C + LED_ASSERTION An assertion failed N/C + LED_PANIC The system has crashed FLASH + + Thus is LED is statically on, NuttX has successfully booted and is, + apparently, running normally. If LED is flashing at approximately + 2Hz, then a fatal error has been detected and the system has halted. + + Button + ------ + SAM L21 Xplained Pro contains one mechanical button on PA02 that can be + controlled by software. When a button is pressed it will drive the I/O + line to GND. Note: There is no pull-up resistor connected to the generic + user button. Remember to enable the internal pull-up in the SAM L21 to + use the button. + + QTouch Button + ------------- + To be provided + +Serial Consoles +=============== + + SERCOM0 + ------- + SERCOM0 is dedicated for use with SPI at the EXT1 connector + + SERCOM1 + ------- + SERCOM1 is available as a USART on EXT2 and EXT3 + + PIN EXT1 EXT2 EXT3 GPIO Function + ---- ---- ---- ---- ------------------ + 13 --- PA19 PA19 SERCOM1 / USART RX + 14 --- PA18 PA18 SERCOM1 / USART TX + 19 GND GND GND N/A + 20 VCC VCC VCC N/A + + SERCOM2 + ------- + SERCOM0 is dedicated for use with I2C at the EXT1, EXT2, and EXT3 + connectors. + + SERCOM3 + ------- + SERCOM3 is not available on any EXT connector but is dedicated for + use with Virtual COM (see below). + + SERCOM4 + ------- + SERCOM1 is available as a USART on EXT1 + + PIN EXT1 EXT2 EXT3 GPIO Function + ---- ---- ---- ---- ------------------ + 13 PB09 --- --- SERCOM4 / USART RX + 14 PB08 --- --- SERCOM4 / USART TX + 19 GND GND GND N/A + 20 VCC VCC VCC N/A + + SERCOM5 + ------- + + SERCOM5 is dedicated for use with SPI at the EXT2 and EXT3 connectors + + Configuration + ------------- + There are options available in the NuttX configuration to select which + connector SERCOM4 is on: SAML21_XPLAINED_USART4_EXTn, where n=1, 2, or 3. + + If you have a TTL to RS-232 converter then this is the most convenient + serial console to use (because you don't lose the console device each time + you lose the USB connection). It is the default in all of these + configurations. An option is to use the virtual COM port. + + Virtual COM Port + ---------------- + + The SAML21 Xplained Pro contains an Embedded Debugger (EDBG) that can be + used to program and debug the ATSAML21J18A using Serial Wire Debug (SWD). + The Embedded debugger also include a Virtual COM port interface over + SERCOM3. Virtual COM port connections: + + PA22 SERCOM3 / USART TXD + PA23 SERCOM3 / USART RXD + +Atmel Studio 6.1 +================ + + NOTE: These instructions are old. The SAML21 requires Atmel Studio 6.2. + They may still prove useful to you, however. + + Loading Code into FLASH: + ----------------------- + + Tools menus: Tools -> Device Programming. + + Debugging the NuttX Object File + ------------------------------- + + 1) Rename object file from nutt to nuttx.elf. That is an extension that + will be recognized by the file menu. + + 2) File menu: File -> Open -> Open object file for debugging + + - Select nuttx.elf object file + - Select AT91SAML21J18 + - Select files for symbols as desired + - Select debugger + + 3) Debug menu: Debug -> Start debugging and break + + - This will reload the nuttx.elf file into FLASH + +JTAG +==== + + I did all of the debug of the SAML21 Xplained using a Segger J-Link + connected to the micro JTAG connector on board the SAML21 Xplained. + I used an Olimex ARM-JTAG 20-10 Adapter to connect the J-Link to + the SAML21 Xplained. + +SAML21 Xplained Pro-specific Configuration Options +================================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM0=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="samdl" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_SAML + CONFIG_ARCH_CHIP_SAML21 + CONFIG_ARCH_CHIP_ATSAML21J18 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD="saml21-xplained" (for the SAML21 Xplained Pro development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SAML21_XPLAINED=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64KB) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_SAMDL_AC - Analog Comparator + CONFIG_SAMDL_ADC - Analog-to-Digital Converter + CONFIG_SAMDL_DAC - Digital-to-Analog Converter + CONFIG_SAMDL_DMAC - Analog Comparator + CONFIG_SAMDL_EVSYS - Event System + CONFIG_SAMDL_NVMCTRL - Non-Volatile Memory Controller + CONFIG_SAMDL_PTC - Peripheral Touch Controller + CONFIG_SAMDL_RTC - Real Time Counter + CONFIG_SAMDL_SERCOM0 - Serial Communication Interface 0 + CONFIG_SAMDL_SERCOM1 - Serial Communication Interface 1 + CONFIG_SAMDL_SERCOM2 - Serial Communication Interface 2 + CONFIG_SAMDL_SERCOM3 - Serial Communication Interface 3 + CONFIG_SAMDL_SERCOM4 - Serial Communication Interface 4 + CONFIG_SAMDL_SERCOM5 - Serial Communication Interface 5 + CONFIG_SAMDL_TCC0 - Timer/Counter 0 for Control + CONFIG_SAMDL_TCC1 - Timer/Counter 1 for Control + CONFIG_SAMDL_TCC2 - Timer/Counter 2 for Control + CONFIG_SAMDL_TC3 - Timer/Counter 3 + CONFIG_SAMDL_TC4 - Timer/Counter 4 + CONFIG_SAMDL_TC5 - Timer/Counter 5 + CONFIG_SAMDL_TC6 - Timer/Counter 6 + CONFIG_SAMDL_TC7 - Timer/Counter 6 + CONFIG_SAMDL_USB - USB device or host + CONFIG_SAMDL_WDT - Watchdog Timer + + Some subsystems can be configured to operate in different ways. The drivers + need to know how to configure the subsystem. + + CONFIG_SAMDL_SERCOM0_ISI2C, CONFIG_SAMDL_SERCOM0_ISSPI, or CONFIG_SAMDL_SERCOM0_ISUSART + CONFIG_SAMDL_SERCOM1_ISI2C, CONFIG_SAMDL_SERCOM1_ISSPI, or CONFIG_SAMDL_SERCOM1_ISUSART + CONFIG_SAMDL_SERCOM2_ISI2C, CONFIG_SAMDL_SERCOM2_ISSPI, or CONFIG_SAMDL_SERCOM2_ISUSART + CONFIG_SAMDL_SERCOM3_ISI2C, CONFIG_SAMDL_SERCOM3_ISSPI, or CONFIG_SAMDL_SERCOM3_ISUSART + CONFIG_SAMDL_SERCOM4_ISI2C, CONFIG_SAMDL_SERCOM4_ISSPI, or CONFIG_SAMDL_SERCOM4_ISUSART + CONFIG_SAMDL_SERCOM5_ISI2C, CONFIG_SAMDL_SERCOM5_ISSPI, or CONFIG_SAMDL_SERCOM5_ISUSART + + SAML21 specific device driver settings + + CONFIG_USARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,..5) for the + console and ttys0 (default is the USART4). + CONFIG_USARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_USARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_USARTn_BAUD - The configure BAUD of the USART. Must be + CONFIG_USARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_USARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_USARTn_2STOP - Two stop bits + +Configurations +============== + + Each SAML21 Xplained Pro configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh saml21-xplained/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that BUILDROOT_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTE: These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output of on SERCOM4 which is available on EXT1 (see the section + "Serial Consoles" above). The SERCOM1 on EXT2 or EXT3 or the + virtual COM port on SERCOME could be used, instead, by + reconfiguring to use SERCOM1 or SERCOM3 instead of SERCOM4: + + System Type -> SAMD/L Peripheral Support + CONFIG_SAMDL_SERCOM1=y : Enable one or both + CONFIG_SAMDL_SERCOM3=y + CONFIG_SAMDL_SERCOM4=n + + Device Drivers -> Serial Driver Support -> Serial Console + CONFIG_USART1_SERIAL_CONSOLE=y : Select only one for the console + CONFIG_USART3_SERIAL_CONSOLE=y : Select only one for the console + CONFIG_USART4_SERIAL_CONSOLE=n + + Device Drivers -> Serial Driver Support -> SERCOMn Configuration + where n=1 or 3: + + CONFIG_USARTn_2STOP=0 + CONFIG_USARTn_BAUD=115200 + CONFIG_USARTn_BITS=8 + CONFIG_USARTn_PARITY=0 + CONFIG_USARTn_RXBUFSIZE=256 + CONFIG_USARTn_TXBUFSIZE=256 + + 3. Unless otherwise stated, the configurations are setup for + Cygwin under Windows: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Windows Host + CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on windoes + + 4. These configurations use the CodeSourcery toolchain. But + that is easily reconfigured: + + System Type -> Toolchain: + CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYW=y + + Any re-configuration should be done before making NuttX or else the + subsequent 'make' will fail. If you have already attempted building + NuttX then you will have to 1) 'make distclean' to remove the old + configuration, 2) 'cd tools; ./configure.sh sam3u-ek/ksnh' to start + with a fresh configuration, and 3) perform the configuration changes + above. + + Also, make sure that your PATH variable has the new path to your + Atmel tools. Try 'which arm-none-eabi-gcc' to make sure that you + are selecting the right tool. setenv.sh is available for you to + use to set or PATH variable. The path in the that file may not, + however, be correct for your installation. + + See also the "NOTE about Windows native toolchains" in the section + called "GNU Toolchain Options" above. + +Configuration sub-directories +----------------------------- + + nsh: + This configuration directory will built the NuttShell. See NOTES above + and below: + + NOTES: + + 1. This configuration is set up to build on Windows using the Cygwin + environment using the CodeSourcery toolchain. This can be easily + changed as described above under "Configurations." + + 2. By default, this configuration provides a serial console on SERCOM4 + at 115200 8N1 via EXT1: + + PIN EXT1 GPIO Function + ---- ---- ------------------ + 13 PB09 SERCOM4 / USART RX + 14 PB08 SERCOM4 / USART TX + 19 GND N/A + 20 VCC N/A + + If you would prefer to use the EDBG serial COM port or would prefer + to use SERCOM4 on EXT1 or EXT2, you will need to reconfigure the + SERCOM as described under "Configurations". See also the section + entitled "Serial Consoles" above. + + 3. NOTE: If you get a compilation error like: + + libxx_new.cxx:74:40: error: 'operator new' takes type 'size_t' + ('unsigned int') as first parameter [-fper + + Sometimes NuttX and your toolchain will disagree on the underlying + type of size_t; sometimes it is an 'unsigned int' and sometimes it is + an 'unsigned long int'. If this error occurs, then you may need to + toggle the value of CONFIG_CXX_NEWLONG. + + 4. WARNING: This info comes from the SAMD20 Xplained README. I have + not tried the I/O1 module on the SAML21! + + If the I/O1 module is connected to the SAML21 Xplained Pro, then + support for the SD card slot can be enabled by making the following + changes to the configuration. These changes assume that the I/O1 + modules is connected in EXT1. Most of the modifications necessary + to work with the I/O1 in a different connector are obvious.. except + for the selection of SERCOM SPI support: + + EXT1: SPI is provided through SERCOM0 + EXT2: SPI is provided through SERCOM1 + EXT3: SPI is provided through SERCOM5 + + File Systems: + CONFIG_FS_FAT=y : Enable the FAT file system + CONFIG_FAT_LCNAMES=y : Enable upper/lower case 8.3 file names (Optional, see below) + CONFIG_FAT_LFN=y : Enable long file named (Optional, see below) + CONFIG_FAT_MAXFNAME=32 : Maximum supported file name length + + There are issues related to patents that Microsoft holds on FAT long + file name technologies. See the top level COPYING file for further + details. + + System Type -> Peripherals: + CONFIG_SAMDL_SERCOM0=y : Use SERCOM0 if the I/O is in EXT1 + CONFIG_SAMDL_SERCOM0_ISSPI=y : Configure SERCOM0 as an SPI master + + Device Drivers + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMCSD_NSLOTS=1 : Only one MMC/SD card slot + CONFIG_MMCSD_MULTIBLOCK_DISABLE=n : Should not need to disable multi-block transfers + CONFIG_MMCSD_MMCSUPPORT=n : May interfere with some SD cards + CONFIG_MMCSD_HAVECARDDETECT=y : I/O1 module as a card detect GPIO + CONFIG_MMCSD_SPI=y : Use the SPI interface to the MMC/SD card + CONFIG_MMCSD_SPICLOCK=20000000 : This is a guess for the optimal MMC/SD frequency + CONFIG_MMCSD_SPIMODE=0 : Mode 0 is required + + Board Selection -> Common Board Options + CONFIG_NSH_MMCSDSLOTNO=0 : Only one MMC/SD slot, slot 0 + CONFIG_NSH_MMCSDSPIPORTNO=0 : Use port=0 -> SERCOM0 if the I/O1 is in EXT1 + + Board Selection -> SAML21 Xplained Pro Modules + CONFIG_SAML21_XPLAINED_IOMODULE=y : I/O1 module is connected + CONFIG_SAML21_XPLAINED_IOMODULE_EXT2=y : I/O1 modules is in EXT2 + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : Board has architecture-specific initialization + + NOTE: If you enable the I/O1 this configuration with SERCOM4 as the + console and with the I/O1 module in EXT1, you *must* remove USART + jumper. Otherwise, you have lookback on SERCOM4 and NSH will *not* + behave very well (since its outgoing prompts also appear as incoming + commands). + + STATUS: As of 2013-6-18, this configuration appears completely + functional. Testing, however, has been very light. Example: + + NuttShell (NSH) NuttX-6.34 + nsh> mount -t vfat /dev/mmcsd0 /mnt/stuff + nsh> ls /mnt/stuff + /mnt/stuff: + nsh> echo "This is a test" >/mnt/stuff/atest.txt + nsh> ls /mnt/stuff + /mnt/stuff: + atest.txt + nsh> cat /mnt/stuff/atest.txt + This is a test + nsh> + + 5. WARNING: This info comes from the SAMD20 Xplained README. I have + not tried the OLED1 module on the SAML21! + + 5. If the OLED1 module is connected to the SAML21 Xplained Pro, then + support for the OLED display can be enabled by making the following + changes to the configuration. These changes assume that the I/O1 + modules is connected in EXT1. Most of the modifications necessary + to work with the I/O1 in a different connector are obvious.. except + for the selection of SERCOM SPI support: + + EXT1: SPI is provided through SERCOM0 + EXT2: SPI is provided through SERCOM1 + EXT3: SPI is provided through SERCOM5 + + System Type -> Peripherals: + CONFIG_SAMDL_SERCOM1=y : Use SERCOM1 if the I/O is in EXT2 + CONFIG_SAMDL_SERCOM1_ISSPI=y : Configure SERCOM1 as an SPI master + + Device Drivers -> SPI + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + CONFIG_SPI_CMDDATA=y : CMD/DATA support is required + + Device Drivers -> LCDs + CONFIG_LCD=y : Enable LCD support + CONFIG_LCD_MAXCONTRAST=255 : Maximum contrast value + CONFIG_LCD_LANDSCAPE=y : Landscape orientation (see below*) + CONFIG_LCD_UG2832HSWEG04=y : Enable support for the OLED + CONFIG_LCD_SSD1306_SPIMODE=0 : SPI Mode 0 + CONFIG_LCD_SSD1306_SPIMODE=3500000 : Pick an SPI frequency + + Board Selection -> SAML21 Xplained Pro Modules + CONFIG_SAML21_XPLAINED_OLED1MODULE=y : OLED1 module is connected + CONFIG_SAML21_XPLAINED_OLED1MODULE_EXT2=y : OLED1 modules is in EXT2 + + The NX graphics subsystem also needs to be configured: + + CONFIG_NX=y : Enable graphics support + CONFIG_NX_LCDDRIVER=y : Using an LCD driver + CONFIG_NX_NPLANES=1 : With a single color plane + CONFIG_NX_WRITEONLY=n : You can read from the LCD (see below*) + CONFIG_NX_DISABLE_2BPP=y : Disable all resolutions except 1BPP + CONFIG_NX_DISABLE_4BPP=y + CONFIG_NX_DISABLE_8BPP=y + CONFIG_NX_DISABLE_16BPP=y + CONFIG_NX_DISABLE_24BPP=y + CONFIG_NX_DISABLE_32BPP=y + CONFIG_NX_PACKEDMSFIRST=y : LSB packed first (shouldn't matter) + CONFIG_NXTK_BORDERWIDTH=2 : Use a small border + CONFIG_NXTK_DEFAULT_BORDERCOLORS=y : Default border colors + CONFIG_NXFONTS_CHARBITS=7 : 7-bit fonts + CONFIG_NXFONT_SANS17X23B=y : Pick a font (any that will fit) + + * The hardware is write only, but the driver maintains a frame buffer + to support read and read-write-modiry operations on the LCD. + Reading from the frame buffer is, however, untested. + + Then, in order to use the OLED, you will need to build some kind of + graphics application or use one of the NuttX graphics examples. + Here, for example, is the setup for the graphic "Hello, World!" + example: + + CONFIG_EXAMPLES_NXHELLO=y : Enables the example + CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y : Use default colors (see below *) + CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y : Use the default font + CONFIG_EXAMPLES_NXHELLO_BPP=1 : One bit per pixel + CONFIG_EXAMPLES_NXHELLO_EXTERNINIT=y : Special initialization is required. + + * The OLED is monochrome so the only "colors" are black and white. + The default "colors" will give you while text on a black background. + You can override the faults it you want black text on a while background. + diff --git a/configs/saml21-xplained/include/board.h b/configs/saml21-xplained/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..7decc79f168c7c04ef07432f93a1ecb29341c1c4 --- /dev/null +++ b/configs/saml21-xplained/include/board.h @@ -0,0 +1,696 @@ +/************************************************************************************ + * configs/saml21-xplained/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAML21_XPLAINED_INCLUDE_BOARD_H +#define __CONFIGS_SAML21_XPLAINED_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# ifdef CONFIG_GPIO_IRQ +# include +# endif +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* Overview + * + * Since there is not high speed crystal, we will run from the OSC16M clock source. + * We will use its default, POR frequency of 4MHz to avoid an additional clock + * switch. + * + * OSC16M Output = 4MHz + * `- GCLK1 Input = 4MHz Prescaler = 1 output = 4MHz + * `- DFLL Input = 4MHz Multiplier = 12 output = 48MHz + * `- GCLK0 Input = 48MHz Prescaler = 1 output = 48MHz + * `- MCLK Input = 48Mhz CPU divider = 1 CPU frequency = 48MHz + * APBA divider = 1 APBA frequency = 48MHz + * APBB divider = 1 APBB frequency = 48MHz + * APBC divider = 1 APBC frequency = 48MHz + * APBD divider = 1 APBD frequency = 48MHz + * APBE divider = 1 APBE frequency = 48MHz + * + * The SAML21 Xplained Pro has one on-board crystal: + * + * XC101 32.768KHz XOSC32 + * + * REVISIT: Not currently used, may want to use as GCLK1 source with + * DFLL multiplier of ((48000000+16384)/32768) = 1465 which would yield + * a clock of 48,005,120 MHz. + */ + +/* XOSC Configuration -- Not available + * + * BOARD_XOSC_ENABLE - Boolean (defined / not defined) + * BOARD_XOSC_FREQUENCY - In Hz + * BOARD_XOSC_STARTUPTIME - See SYSCTRL_XOSC_STARTUP_* definitions + * BOARD_XOSC_ISCRYSTAL - Boolean (defined / not defined) + * BOARD_XOSC_AMPGC - Boolean (defined / not defined) + * BOARD_XOSC_ONDEMAND - Boolean (defined / not defined) + * BOARD_XOSC_RUNINSTANDBY - Boolean (defined / not defined) + */ + +#undef BOARD_XOSC_ENABLE +#define BOARD_XOSC_FREQUENCY 12000000UL +#define BOARD_XOSC_STARTUPTIME SYSCTRL_XOSC_STARTUP_1S +#define BOARD_XOSC_ISCRYSTAL 1 +#define BOARD_XOSC_AMPGC 1 +#define BOARD_XOSC_ONDEMAND 1 +#undef BOARD_XOSC_RUNINSTANDBY + +/* XOSC32 Configuration -- Not used + * + * BOARD_XOSC32K_ENABLE - Boolean (defined / not defined) + * BOARD_XOSC32K_FREQUENCY - In Hz + * BOARD_XOSC32K_STARTUPTIME - See SYSCTRL_XOSC32K_STARTUP_* definitions + * BOARD_XOSC32K_ISCRYSTAL - Boolean (defined / not defined) + * BOARD_XOSC32K_AAMPEN - Boolean (defined / not defined) + * BOARD_XOSC32K_EN1KHZ - Boolean (defined / not defined) + * BOARD_XOSC32K_EN32KHZ - Boolean (defined / not defined) + * BOARD_XOSC32K_ONDEMAND - Boolean (defined / not defined) + * BOARD_XOSC32K_RUNINSTANDBY - Boolean (defined / not defined) + * BOARD_XOSC32K_WRITELOCK - Boolean (defined / not defined) + */ + +#undef BOARD_XOSC32K_ENABLE +#ifdef CONFIG_SAML21_XPLAINED_XOSC32K +# define BOARD_XOSC32K_ENABLE 1 +# define BOARD_XOSC32K_FREQUENCY 32768 /* 32.768KHz XTAL */ +# define BOARD_XOSC32K_STARTUPTIME OSC32KCTRL_XOSC32K_STARTUP_100MS +# define BOARD_XOSC32K_ISCRYSTAL 1 +# undef BOARD_XOSC32K_EN1KHZ +# define BOARD_XOSC32K_EN32KHZ 1 +# define BOARD_XOSC32K_ONDEMAND 1 +# undef BOARD_XOSC32K_RUNINSTANDBY +# undef BOARD_XOSC32K_WRITELOCK +#endif + +/* OSC32 Configuration -- not used + * + * BOARD_OSC32K_ENABLE - Boolean (defined / not defined) + * BOARD_OSC32K_FREQUENCY - In Hz + * BOARD_OSC32K_STARTUPTIME - See SYSCTRL_OSC32K_STARTUP_* definitions + * BOARD_OSC32K_EN1KHZ - Boolean (defined / not defined) + * BOARD_OSC32K_EN32KHZ - Boolean (defined / not defined) + * BOARD_OSC32K_ONDEMAND - Boolean (defined / not defined) + * BOARD_OSC32K_RUNINSTANDBY - Boolean (defined / not defined) + * BOARD_OSC32K_WRITELOCK - Boolean (defined / not defined) + */ + +#undef BOARD_OSC32K_ENABLE +#define BOARD_OSC32K_FREQUENCY 32768 /* 32.768kHz internal oscillator */ +#define BOARD_OSC32K_STARTUPTIME SYSCTRL_OSC32K_STARTUP_4MS +#define BOARD_OSC32K_EN1KHZ 1 +#define BOARD_OSC32K_EN32KHZ 1 +#define BOARD_OSC32K_ONDEMAND 1 +#undef BOARD_OSC32K_RUNINSTANDBY +#undef BOARD_OSC32K_WRITELOCK + +/* OSC16M Configuration -- always enabled + * + * BOARD_OSC16M_FSEL - See OSCCTRL_OSC16MCTRL_FSEL_* definitions + * BOARD_OSC16M_ONDEMAND - Boolean (defined / not defined) + * BOARD_OSC16M_RUNINSTANDBY - Boolean (defined / not defined) + */ + + +#if defined(CONFIG_SAML21_XPLAINED_OSC16M_4MHZ) +# define BOARD_OSC16M_FSEL OSCCTRL_OSC16MCTRL_FSEL_4MHZ +# define BOARD_OSC16M_ONDEMAND 1 +# undef BOARD_OSC16M_RUNINSTANDBY +# define BOARD_OSC16M_FREQUENCY 4000000 /* 4MHz high-accuracy internal oscillator */ + +#elif defined(CONFIG_SAML21_XPLAINED_OSC16M_8MHZ) +# define BOARD_OSC16M_FSEL OSCCTRL_OSC16MCTRL_FSEL_8MHZ +# define BOARD_OSC16M_ONDEMAND 1 +# undef BOARD_OSC16M_RUNINSTANDBY +# define BOARD_OSC16M_FREQUENCY 8000000 /* 8MHz high-accuracy internal oscillator */ + +#elif defined(CONFIG_SAML21_XPLAINED_OSC16M_12MHZ) +# define BOARD_OSC16M_FSEL OSCCTRL_OSC16MCTRL_FSEL_12MHZ +# define BOARD_OSC16M_ONDEMAND 1 +# undef BOARD_OSC16M_RUNINSTANDBY +# define BOARD_OSC16M_FREQUENCY 12000000 /* 12MHz high-accuracy internal oscillator */ + +#elif defined(CONFIG_SAML21_XPLAINED_OSC16M_16MHZ) +# define BOARD_OSC16M_FSEL OSCCTRL_OSC16MCTRL_FSEL_16MHZ +# define BOARD_OSC16M_ONDEMAND 1 +# undef BOARD_OSC16M_RUNINSTANDBY +# define BOARD_OSC16M_FREQUENCY 16000000 /* 18MHz high-accuracy internal oscillator */ + +#else +# error OSC16M operating freqency not defined (CONFIG_SAML21_XPLAINED_OSC16M_*MHZ) +#endif + +/* OSCULP32K Configuration -- not used. */ + +#define BOARD_OSCULP32K_FREQUENCY 32000 /* 32kHz ultra-low-power internal oscillator */ + +/* Digital Frequency Locked Loop configuration. In closed-loop mode, the + * DFLL output frequency (Fdfll) is given by: + * + * Fdfll = DFLLmul * Frefclk + * = 12 * 4000000 = 48MHz + * + * Where the reference clock is Generic Clock Channel 0 output of GLCK1. + * GCLCK1 provides OSC16M, undivided. + * + * When operating in open-loop mode, the output frequency of the DFLL will + * be determined by the values written to the DFLL Coarse Value bit group + * and the DFLL Fine Value bit group in the DFLL Value register. + * + * BOARD_DFLL48M_CLOSEDLOOP - Boolean (defined / not defined) + * BOARD_DFLL48M_OPENLOOP - Boolean (defined / not defined) + * BOARD_DFLL48M_RECOVERY - Boolean (defined / not defined) + * BOARD_DFLL48M_TRACKAFTERFINELOCK - Boolean (defined / not defined) + * BOARD_DFLL48M_KEEPLOCKONWAKEUP - Boolean (defined / not defined) + * BOARD_DFLL48M_ENABLECHILLCYCLE - Boolean (defined / not defined) + * BOARD_DFLL48M_QUICKLOCK - Boolean (defined / not defined) + * BOARD_DFLL48M_RUNINSTDBY - Boolean (defined / not defined) + * BOARD_DFLL48M_ONDEMAND - Boolean (defined / not defined) + * BOARD_DFLL48M_COARSEVALUE - Value + * BOARD_DFLL48M_FINEVALUE - Value + * + * Open Loop mode only: + * BOARD_DFLL48M_COARSEVALUE - Value + * BOARD_DFLL48M_FINEVALUE - Value + * + * Closed loop mode only: + * BOARD_DFLL48M_REFCLK_CLKGEN - GCLK index in the range {0..8} + * BOARD_DFLL48M_MULTIPLIER - Value + * BOARD_DFLL48M_MAXCOARSESTEP - Value + * BOARD_DFLL48M_MAXFINESTEP - Value + * + * BOARD_DFLL48M_FREQUENCY - The resulting frequency + */ + +#undef BOARD_DFLL48M_ENABLE 1 /* Assume not using the DFLL48M */ +#undef BOARD_DFLL48M_CLOSEDLOOP +#undef BOARD_DFLL48M_OPENLOOP +#undef BOARD_DFLL48M_RECOVERY + +#ifdef CONFIG_SAML21_XPLAINED_DFLL +# define BOARD_DFLL48M_ENABLE 1 /* Using the DFLL48M */ + +/* DFLL mode of operation */ + +# if defined(CONFIG_SAML21_XPLAINED_DFLL_OPENLOOP) +# define BOARD_DFLL48M_OPENLOOP 1 /* In open loop mode */ +# elif defined(CONFIG_SAML21_XPLAINED_DFLL_CLOSEDLOOP) +# define BOARD_DFLL48M_CLOSEDLOOP 1 /* In closed loop mode */ +# elif defined(CONFIG_SAML21_XPLAINED_DFLL_RECOVERY) +# define BOARD_DFLL48M_RECOVERY 1 /* In USB recover mode */ +# else +# error DFLL mode not provided +# endif + +/* DFLL source clock selection */ + +# if defined(CONFIG_SAML21_XPLAINED_DFLL_OSC16MSRC) +# define BOARD_DFLL_SRC_FREQUENCY BOARD_OSC16M_FREQUENCY +# elif defined(CONFIG_SAML21_XPLAINED_DFLL_XOSC32KSRC) +# define BOARD_DFLL_SRC_FREQUENCY BOARD_XOSC32K_FREQUENCY +# else +# error DFLL clock source not provided +# endif + +/* Mode-independent options */ + +# undef BOARD_DFLL48M_RUNINSTDBY +# undef BOARD_DFLL48M_ONDEMAND + +/* DFLL open loop mode configuration */ + +# define BOARD_DFLL48M_COARSEVALUE (0x1f / 4) +# define BOARD_DFLL48M_FINEVALUE (0xff / 4) + +/* DFLL closed loop mode configuration */ + +# define BOARD_DFLL48M_REFCLK_CLKGEN 1 +# define BOARD_DFLL48M_MULTIPLIER (48000000 / BOARD_DFLL_SRC_FREQUENCY) +# define BOARD_DFLL48M_QUICKLOCK 1 +# define BOARD_DFLL48M_TRACKAFTERFINELOCK 1 +# define BOARD_DFLL48M_KEEPLOCKONWAKEUP 1 +# define BOARD_DFLL48M_ENABLECHILLCYCLE 1 +# define BOARD_DFLL48M_MAXCOARSESTEP (0x1f / 4) +# define BOARD_DFLL48M_MAXFINESTEP (0xff / 4) + +# ifdef CONFIG_SAML21_XPLAINED_DFLL_OPENLOOP +# define BOARD_DFLL48M_FREQUENCY (13720000) /* REVISIT: Needs to be measured */ +# else +# define BOARD_DFLL48M_FREQUENCY (BOARD_DFLL48M_MULTIPLIER * BOARD_DFLL_SRC_FREQUENCY) +# endif +#endif + +/* Fractional Digital Phase Locked Loop configuration. + * + * BOARD_FDPLL96M_ENABLE - Boolean (defined / not defined) + * BOARD_FDPLL96M_RUNINSTDBY - Boolean (defined / not defined) + * BOARD_FDPLL96M_ONDEMAND - Boolean (defined / not defined) + * BOARD_FDPLL96M_LBYPASS - Boolean (defined / not defined) + * BOARD_FDPLL96M_WUF - Boolean (defined / not defined) + * BOARD_FDPLL96M_LPEN - Boolean (defined / not defined) + * BOARD_FDPLL96M_FILTER - See OSCCTRL_DPLLCTRLB_FILTER_* definitions + * BOARD_FDPLL96M_REFCLK - See OSCCTRL_DPLLCTRLB_REFLCK_* definitions + * BOARD_FDPLL96M_REFCLK_CLKGEN - GCLK index in the range {0..8} + * BOARD_FDPLL96M_LOCKTIME_ENABLE - Boolean (defined / not defined) + * BOARD_FDPLL96M_LOCKTIME - See OSCCTRL_DPLLCTRLB_LTIME_* definitions + * BOARD_FDPLL96M_LOCKTIME_CLKGEN - GCLK index in the range {0..8} + * BOARD_FDPLL96M_REFDIV - Numeric value, 1 - 2047 + * BOARD_FDPLL96M_PRESCALER - See OSCCTRL_DPLLPRESC_* definitions + * BOARD_FDPLL96M_REFFREQ - Numeric value + * BOARD_FDPLL96M_FREQUENCY - Numeric value + */ + +#undef BOARD_FDPLL96M_ENABLE +#undef BOARD_FDPLL96M_RUNINSTDBY +#define BOARD_FDPLL96M_ONDEMAND 1 +#undef BOARD_FDPLL96M_LBYPASS +#undef BOARD_FDPLL96M_WUF +#undef BOARD_FDPLL96M_LPEN +#define BOARD_FDPLL96M_FILTER OSCCTRL_DPLLCTRLB_FILTER_DEFAULT +#define BOARD_FDPLL96M_REFCLK OSCCTRL_DPLLCTRLB_REFLCK_XOSCK32K +#define BOARD_FDPLL96M_REFCLK_CLKGEN 1 +#undef BOARD_FDPLL96M_LOCKTIME_ENABLE +#define BOARD_FDPLL96M_LOCKTIME OSCCTRL_DPLLCTRLB_LTIME_NONE +#define BOARD_FDPLL96M_LOCKTIME_CLKGEN 1 +#define BOARD_FDPLL96M_REFDIV 1 +#define BOARD_FDPLL96M_PRESCALER OSCCTRL_DPLLPRESC_DIV1 + +#define BOARD_FDPLL96M_REFFREQ 32768 +#define BOARD_FDPLL96M_FREQUENCY 48000000 + +/* GCLK Configuration + * + * Global enable/disable. + * + * BOARD_GCLK_ENABLE - *MUST* be defined + * + * For n=1-7: + * BOARD_GCLKn_ENABLE - Boolean (defined / not defined) + * + * For n=0-8: + * BOARD_GCLKn_RUN_IN_STANDBY - Boolean (defined / not defined) + * BOARD_GCLKn_CLOCK_SOURCE - See GCLK_GENCTRL_SRC_* definitions + * BOARD_GCLKn_PRESCALER - Value + * BOARD_GCLKn_OUTPUT_ENABLE - Boolean (defined / not defined) + */ + +#define BOARD_GCLK_ENABLE 1 + +/* GCLK generator 0 (Main Clock) - Source is the DFLL */ + +#ifdef CONFIG_SAML21_XPLAINED_DFLL +# undef BOARD_GCLK0_RUN_IN_STANDBY +# define BOARD_GCLK0_CLOCK_SOURCE GCLK_GENCTRL_SRC_DFLL48M +# define BOARD_GCLK0_PRESCALER 1 +# undef BOARD_GCLK0_OUTPUT_ENABLE +# define BOARD_GCLK0_FREQUENCY (BOARD_DFLL48M_FREQUENCY / BOARD_GCLK0_PRESCALER) +#else +# undef BOARD_GCLK0_RUN_IN_STANDBY +# define BOARD_GCLK0_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC16M +# define BOARD_GCLK0_PRESCALER 1 +# undef BOARD_GCLK0_OUTPUT_ENABLE +# define BOARD_GCLK0_FREQUENCY (BOARD_OSC16M_FREQUENCY / BOARD_GCLK0_PRESCALER) +#endif + +/* Configure GCLK generator 1 - Drives the DFLL */ + +#if defined(CONFIG_SAML21_XPLAINED_DFLL_OSC16MSRC) +# define BOARD_GCLK1_ENABLE 1 +# undef BOARD_GCLK1_RUN_IN_STANDBY +# define BOARD_GCLK1_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC16M +# define BOARD_GCLK1_PRESCALER 1 +# undef BOARD_GCLK1_OUTPUT_ENABLE +# define BOARD_GCLK1_FREQUENCY (BOARD_OSC16M_FREQUENCY / BOARD_GCLK1_PRESCALER) +#elif defined(CONFIG_SAML21_XPLAINED_DFLL_XOSC32KSRC) +# define BOARD_GCLK1_ENABLE 1 +# undef BOARD_GCLK1_RUN_IN_STANDBY +# define BOARD_GCLK1_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC32K +# define BOARD_GCLK1_PRESCALER 1 +# undef BOARD_GCLK1_OUTPUT_ENABLE +# define BOARD_GCLK1_FREQUENCY (BOARD_XOSC32K_FREQUENCY / BOARD_GCLK1_PRESCALER) +#else +# error DFLL clock source not provided +#endif + +/* Configure GCLK generator 2 (RTC) */ + +#undef BOARD_GCLK2_ENABLE +#undef BOARD_GCLK2_RUN_IN_STANDBY +#define BOARD_GCLK2_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC32K +#define BOARD_GCLK2_PRESCALER 32 +#undef BOARD_GCLK2_OUTPUT_ENABLE +#define BOARD_GCLK2_FREQUENCY (BOARD_OSC32K_FREQUENCY / BOARD_GCLK2_PRESCALER) + +/* Configure GCLK generator 3 */ + +#undef BOARD_GCLK3_ENABLE +#undef BOARD_GCLK3_RUN_IN_STANDBY +#define BOARD_GCLK3_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC16M +#define BOARD_GCLK3_PRESCALER 1 +#undef BOARD_GCLK3_OUTPUT_ENABLE +#define BOARD_GCLK3_FREQUENCY (BOARD_OSC16M_FREQUENCY / BOARD_GCLK3_PRESCALER) + +/* Configure GCLK generator 4 */ + +#undef BOARD_GCLK4_ENABLE +#undef BOARD_GCLK4_RUN_IN_STANDBY +#define BOARD_GCLK4_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC16M +#define BOARD_GCLK4_PRESCALER 1 +#undef BOARD_GCLK4_OUTPUT_ENABLE +#define BOARD_GCLK4_FREQUENCY (BOARD_OSC16M_FREQUENCY / BOARD_GCLK4_PRESCALER) + +/* Configure GCLK generator 5 */ + +#undef BOARD_GCLK5_ENABLE +#undef BOARD_GCLK5_RUN_IN_STANDBY +#define BOARD_GCLK5_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC16M +#define BOARD_GCLK5_PRESCALER 1 +#undef BOARD_GCLK5_OUTPUT_ENABLE +#define BOARD_GCLK5_FREQUENCY (BOARD_OSC16M_FREQUENCY / BOARD_GCLK5_PRESCALER) + +/* Configure GCLK generator 6 */ + +#undef BOARD_GCLK6_ENABLE +#undef BOARD_GCLK6_RUN_IN_STANDBY +#define BOARD_GCLK6_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC16M +#define BOARD_GCLK6_PRESCALER 1 +#undef BOARD_GCLK6_OUTPUT_ENABLE +#define BOARD_GCLK6_FREQUENCY (BOARD_OSC16M_FREQUENCY / BOARD_GCLK6_PRESCALER) + +/* Configure GCLK generator 7 */ + +#undef BOARD_GCLK7_ENABLE +#undef BOARD_GCLK7_RUN_IN_STANDBY +#define BOARD_GCLK7_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC16M +#define BOARD_GCLK7_PRESCALER 1 +#undef BOARD_GCLK7_OUTPUT_ENABLE +#define BOARD_GCLK7_FREQUENCY (BOARD_OSC16M_FREQUENCY / BOARD_GCLK7_PRESCALER) + +/* Configure GCLK generator 8 */ + +#undef BOARD_GCLK8_ENABLE +#undef BOARD_GCLK8_RUN_IN_STANDBY +#define BOARD_GCLK8_CLOCK_SOURCE GCLK_GENCTRL_SRC_OSC16M +#define BOARD_GCLK8_PRESCALER 1 +#undef BOARD_GCLK8_OUTPUT_ENABLE +#define BOARD_GCLK8_FREQUENCY (BOARD_OSC16M_FREQUENCY / BOARD_GCLK8_PRESCALER) + +/* The source of the main clock is always GCLK_MAIN. Also called GCLKGEN[0], this is + * the clock feeding the Power Manager. The Power Manager, in turn, generates main + * clock which is divided down to produce the CPU, AHB, and APB clocks. + * + * The main clock is initially OSC16M divided by 8. + */ + +#define BOARD_GCLK_MAIN_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* Main clock dividers + * + * BOARD_CPU_DIVIDER - See MCLK_CPUDIV_DIV* definitions + * BOARD_CPU_FRQUENCY - In Hz + * BOARD_CPU_FAILDECT - Boolean (defined / not defined) + * BOARD_LOWPOWER_DIVIDER - See MCLK_LPDIV_DIV_* definitions + * BOARD_LOWPOWER_FREQUENCY - In Hz + * BOARD_BACKUP_DIVIDER - See MCLK_BUPDIV_DIV_* definitions + * BOARD_BACKUP_FREQUENCY - In Hz + */ + +#undef BOARD_CPU_FAILDECT +#define BOARD_CPU_DIVIDER MCLK_CPUDIV_DIV1 +#define BOARD_LOWPOWER_DIVIDER MCLK_LPDIV_DIV1 +#define BOARD_BACKUP_DIVIDER MCLK_BUPDIV_DIV1 + +/* Resulting frequencies */ + +#define BOARD_MCK_FREQUENCY (BOARD_GCLK_MAIN_FREQUENCY) +#define BOARD_CPU_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_LOWPOWER_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_BACKUP_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_APBA_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_APBB_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_APBC_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_APBD_FREQUENCY (BOARD_MCK_FREQUENCY) +#define BOARD_APBE_FREQUENCY (BOARD_MCK_FREQUENCY) + +/* FLASH wait states + * + * REVISIT: These values come from the SAMD20 + * Vdd Range Wait states Maximum Operating Frequency + * ------------- -------------- --------------------------- + * 1.62V to 2.7V 0 14 MHz + * 1 28 MHz + * 2 42 MHz + * 3 48 MHz + * 2.7V to 3.63V 0 24 MHz + * 1 48 MHz + */ + +#if 0 +# define BOARD_FLASH_WAITSTATES 3 +#else +# define BOARD_FLASH_WAITSTATES 1 +#endif + +/* SERCOM definitions ***************************************************************/ +/* This is the source clock generator for the GCLK_SERCOM_SLOW clock that is common + * to SERCOM modules 0-4. It will generate clocking on the common SERCOM0-4 + * channel. + * + * SERCOM5 uses a different channel and will probably need to use a different GCLK + * generator. + */ + +#define BOARD_SERCOM04_SLOW_GCLKGEN 0 + +/* SERCOM0 SPI is available on EXT1 + * + * PIN PORT SERCOM FUNCTION + * --- ------------------ ----------- + * 15 PA5 SERCOM0 PAD1 SPI SS + * 16 PA6 SERCOM0 PAD2 SPI MOSI + * 17 PA4 SERCOM0 PAD0 SPI MISO + * 18 PA7 SERCOM0 PAD3 SPI SCK + */ + +#define BOARD_SERCOM0_GCLKGEN 0 +#define BOARD_SERCOM0_SLOW_GCLKGEN BOARD_SERCOM04_SLOW_GCLKGEN +#define BOARD_SERCOM0_MUXCONFIG (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0) +#define BOARD_SERCOM0_PINMAP_PAD0 PORT_SERCOM0_PAD0_2 /* SPI_MISO */ +#define BOARD_SERCOM0_PINMAP_PAD1 0 /* SPI_SS (not used) */ +#define BOARD_SERCOM0_PINMAP_PAD2 PORT_SERCOM0_PAD2_2 /* SPI_MOSI */ +#define BOARD_SERCOM0_PINMAP_PAD3 PORT_SERCOM0_PAD3_2 /* SPI_SCK */ + +#define BOARD_SERCOM0_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* SERCOM1 USART is available on EXT2 and EXT3 + * + * PIN EXT1 EXT2 EXT3 GPIO Function + * ---- ---- ---- ---- ------------------ + * 13 --- PA19 PA19 SERCOM1 / USART RX + * 14 --- PA18 PA18 SERCOM1 / USART TX + * 19 GND GND GND N/A + * 20 VCC VCC VCC N/A + */ + +#define BOARD_SERCOM1_GCLKGEN 0 +#define BOARD_SERCOM1_SLOW_GCLKGEN BOARD_SERCOM04_SLOW_GCLKGEN +#define BOARD_SERCOM1_MUXCONFIG (USART_CTRLA_TXPAD2 | USART_CTRLA_RXPAD3) +#define BOARD_SERCOM1_PINMAP_PAD0 0 /* (not used) */ +#define BOARD_SERCOM1_PINMAP_PAD1 0 /* (not used) */ +#define BOARD_SERCOM1_PINMAP_PAD2 PORT_SERCOM1_PAD2_1 /* USART_TX */ +#define BOARD_SERCOM1_PINMAP_PAD3 PORT_SERCOM1_PAD3_1 /* USART_RX */ + +#define BOARD_SERCOM1_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* The SAML21 Xplained Pro contains an Embedded Debugger (EDBG) that can be + * used to program and debug the ATSAML21J18A using Serial Wire Debug (SWD). + * The Embedded debugger also include a Virtual COM port interface over + * SERCOM3. Virtual COM port connections: + * + * PA22 SERCOM3 PAD[0] / USART TXD + * PA23 SERCOM3 PAD[1] / USART RXD + */ + +#define BOARD_SERCOM3_GCLKGEN 0 +#define BOARD_SERCOM3_SLOW_GCLKGEN BOARD_SERCOM04_SLOW_GCLKGEN +#define BOARD_SERCOM3_MUXCONFIG (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0_2) +#define BOARD_SERCOM3_PINMAP_PAD0 PORT_SERCOM3_PAD0_1 /* USART TX */ +#define BOARD_SERCOM3_PINMAP_PAD1 PORT_SERCOM3_PAD1_1 /* USART RX */ +#define BOARD_SERCOM3_PINMAP_PAD2 0 /* (not used) */ +#define BOARD_SERCOM3_PINMAP_PAD3 0 /* (not used) */ + +#define BOARD_SERCOM3_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* The SERCOM4 USART is available on EXT1 + * + * PIN EXT1 EXT2 EXT3 GPIO Function + * ---- ---- ---- ---- ------------------ + * 13 PB09 --- --- SERCOM4 PAD[1] / USART RX + * 14 PB08 --- --- SERCOM4 PAD[0] / USART TX + * 19 GND GND GND N/A + * 20 VCC VCC VCC N/A + */ + +#define BOARD_SERCOM4_GCLKGEN 0 +#define BOARD_SERCOM4_SLOW_GCLKGEN BOARD_SERCOM04_SLOW_GCLKGEN +#define BOARD_SERCOM4_MUXCONFIG (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0_2) +#define BOARD_SERCOM4_PINMAP_PAD0 PORT_SERCOM4_PAD0_3 /* USART TX */ +#define BOARD_SERCOM4_PINMAP_PAD1 PORT_SERCOM4_PAD1_3 /* USART RX */ +#define BOARD_SERCOM4_PINMAP_PAD2 0 +#define BOARD_SERCOM4_PINMAP_PAD3 0 + +#define BOARD_SERCOM4_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* SERCOM5 is dedicated for use with SPI at the EXT2 and EXT3 connectors + * + * PIN PORT SERCOM FUNCTION + * --- ------------------ ----------- + * 15 PB17 SERCOM5 PAD1 SPI SS + * 16 PB22 SERCOM5 PAD2 SPI MOSI + * 17 PB16 SERCOM5 PAD0 SPI MISO + * 18 PB23 SERCOM5 PAD3 SPI SCK + */ + +#define BOARD_SERCOM5_GCLKGEN 0 +#define BOARD_SERCOM5_SLOW_GCLKGEN ? +#define BOARD_SERCOM5_MUXCONFIG (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0) +#define BOARD_SERCOM5_PINMAP_PAD0 PORT_SERCOM5_PAD0_1 /* SPI_MISO */ +#define BOARD_SERCOM5_PINMAP_PAD1 0 /* SPI_SS (not used) */ +#define BOARD_SERCOM5_PINMAP_PAD2 PORT_SERCOM5_PAD2_4 /* SPI_MOSI */ +#define BOARD_SERCOM5_PINMAP_PAD3 PORT_SERCOM5_PAD3_4 /* SPI_SCK */ + +#define BOARD_SERCOM5_FREQUENCY BOARD_GCLK0_FREQUENCY + +/* LED definitions ******************************************************************/ +/* There are three LEDs on board the SAML21 Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labelled STATUS near the SAML21 USB + * connector. + * + * This LED is controlled by PC07 and the LED can be activated by driving the + * PB10 to GND. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_STATUS_LED 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_STATUS LED_BIT (1 << BOARD_STATUS_LED) + +/* When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control the LED as defined below. Thus if the LED is statically on, NuttX has + * successfully booted and is, apparently, running normally. If the LED is + * flashing at approximately 2Hz, then a fatal error has been detected and the + * system has halted. + */ + +#define LED_STARTED 0 /* STATUS LED=OFF */ +#define LED_HEAPALLOCATE 0 /* STATUS LED=OFF */ +#define LED_IRQSENABLED 0 /* STATUS LED=OFF */ +#define LED_STACKCREATED 1 /* STATUS LED=ON */ +#define LED_INIRQ 2 /* STATUS LED=no change */ +#define LED_SIGNAL 2 /* STATUS LED=no change */ +#define LED_ASSERTION 2 /* STATUS LED=no change */ +#define LED_PANIC 3 /* STATUS LED=flashing */ + +/* Button definitions ***************************************************************/ +/* Mechanical buttons: + * + * The SAML21 Xplained Pro contains two mechanical buttons. One button is the + * RESET button connected to the SAML21 reset line and the other is a generic user + * configurable button. When a button is pressed it will drive the I/O line to GND. + * + * PA02 SW0 + */ + +/* The SAML21 Xplained Pro supports one button: */ + +#define BUTTON_SW0 0 +#define NUM_BUTTONS 1 + +#define BUTTON_SW0_BIT (1 << BUTTON_SW0) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAML21_XPLAINED_INCLUDE_BOARD_H */ diff --git a/configs/saml21-xplained/nsh/Make.defs b/configs/saml21-xplained/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..25498abe9be188743948084b6904967b043092b7 --- /dev/null +++ b/configs/saml21-xplained/nsh/Make.defs @@ -0,0 +1,123 @@ +############################################################################ +# configs/saml21-xplained/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv6-m/Toolchain.defs + +LDSCRIPT = flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) +endif diff --git a/configs/saml21-xplained/nsh/defconfig b/configs/saml21-xplained/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..2baa5782c38d27ecea2871611c36501cda925f9b --- /dev/null +++ b/configs/saml21-xplained/nsh/defconfig @@ -0,0 +1,890 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +CONFIG_ARCH_CHIP_SAML=y +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +CONFIG_ARCH_CORTEXM0=y +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv6-m" +CONFIG_ARCH_CHIP="samdl" +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set + +# +# ARMV6M Configuration Options +# +# CONFIG_ARMV6M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV6M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIW is not set + +# +# Atmel SAMD/L Configuration Options +# +# CONFIG_ARCH_CHIP_SAML21E15 is not set +# CONFIG_ARCH_CHIP_SAML21E16 is not set +# CONFIG_ARCH_CHIP_SAML21E17 is not set +# CONFIG_ARCH_CHIP_SAML21E18 is not set +# CONFIG_ARCH_CHIP_SAML21G16 is not set +# CONFIG_ARCH_CHIP_SAML21G17 is not set +# CONFIG_ARCH_CHIP_SAML21G18 is not set +# CONFIG_ARCH_CHIP_SAML21J16 is not set +# CONFIG_ARCH_CHIP_SAML21J17 is not set +CONFIG_ARCH_CHIP_SAML21J18=y +# CONFIG_ARCH_FAMILY_SAMD20 is not set +# CONFIG_ARCH_FAMILY_SAMD20E is not set +# CONFIG_ARCH_FAMILY_SAMD20G is not set +# CONFIG_ARCH_FAMILY_SAMD20J is not set +# CONFIG_ARCH_FAMILY_SAMD21 is not set +# CONFIG_ARCH_FAMILY_SAMD21E is not set +# CONFIG_ARCH_FAMILY_SAMD21G is not set +# CONFIG_ARCH_FAMILY_SAMD21J is not set +CONFIG_ARCH_FAMILY_SAML21=y +# CONFIG_ARCH_FAMILY_SAML21E is not set +# CONFIG_ARCH_FAMILY_SAML21G is not set +CONFIG_ARCH_FAMILY_SAML21J=y + +# +# SAMD/L Peripheral Support +# +CONFIG_SAMDL_HAVE_DMAC=y +CONFIG_SAMDL_HAVE_SERCOM4=y +CONFIG_SAMDL_HAVE_SERCOM5=y +CONFIG_SAMDL_HAVE_TC5=y +CONFIG_SAMDL_HAVE_TC2=y +CONFIG_SAMDL_HAVE_TC3=y +# CONFIG_SAMDL_HAVE_TC6 is not set +# CONFIG_SAMDL_HAVE_TC7 is not set +# CONFIG_SAMDL_AC is not set +# CONFIG_SAMDL_ADC is not set +# CONFIG_SAMDL_DAC is not set +# CONFIG_SAMDL_EVSYS is not set +# CONFIG_SAMDL_NVMCTRL is not set +# CONFIG_SAMDL_PTC is not set +# CONFIG_SAMDL_RTC is not set +# CONFIG_SAMDL_SERCOM0 is not set +# CONFIG_SAMDL_SERCOM1 is not set +# CONFIG_SAMDL_SERCOM2 is not set +CONFIG_SAMDL_SERCOM3=y +CONFIG_SAMDL_SERCOM4=y +# CONFIG_SAMDL_SERCOM5 is not set +# CONFIG_SAMDL_TC0 is not set +# CONFIG_SAMDL_TC1 is not set +# CONFIG_SAMDL_TC2 is not set +# CONFIG_SAMDL_TC3 is not set +# CONFIG_SAMDL_TC4 is not set +# CONFIG_SAMDL_TC5 is not set +# CONFIG_SAMDL_WDT is not set +# CONFIG_SAMDL_SERCOM3_ISI2C is not set +# CONFIG_SAMDL_SERCOM3_ISSPI is not set +CONFIG_SAMDL_SERCOM3_ISUSART=y +# CONFIG_SAMDL_SERCOM4_ISI2C is not set +# CONFIG_SAMDL_SERCOM4_ISSPI is not set +CONFIG_SAMDL_SERCOM4_ISUSART=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4356 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAML21_XPLAINED=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="saml21-xplained" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# CPU Clock Configuration +# +CONFIG_SAML21_XPLAINED_OSC16M_4MHZ=y +# CONFIG_SAML21_XPLAINED_OSC16M_8MHZ is not set +# CONFIG_SAML21_XPLAINED_OSC16M_12MHZ is not set +# CONFIG_SAML21_XPLAINED_OSC16M_16MHZ is not set +CONFIG_SAML21_XPLAINED_XOSC32K=y +CONFIG_SAML21_XPLAINED_DFLL=y +# CONFIG_SAML21_XPLAINED_DFLL_OSC16MSRC is not set +CONFIG_SAML21_XPLAINED_DFLL_XOSC32KSRC=y +# CONFIG_SAML21_XPLAINED_DFLL_OPENLOOP is not set +CONFIG_SAML21_XPLAINED_DFLL_CLOSEDLOOP=y + +# +# SAML21 Xplained Pro Modules +# +# CONFIG_SAML21_XPLAINED_IOMODULE is not set +# CONFIG_SAML21_XPLAINED_OLED1MODULE is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=12 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1536 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +CONFIG_ARCH_HAVE_USART4=y +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_USART4_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USART3_SERIAL_CONSOLE is not set +CONFIG_USART4_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=64 +CONFIG_USART3_TXBUFSIZE=64 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set + +# +# USART4 Configuration +# +CONFIG_USART4_RXBUFSIZE=64 +CONFIG_USART4_TXBUFSIZE=64 +CONFIG_USART4_BAUD=115200 +CONFIG_USART4_BITS=8 +CONFIG_USART4_PARITY=0 +CONFIG_USART4_2STOP=0 +# CONFIG_USART4_IFLOWCONTROL is not set +# CONFIG_USART4_OFLOWCONTROL is not set +# CONFIG_USART4_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +# CONFIG_NSH_DISABLE_DELROUTE is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/saml21-xplained/nsh/setenv.sh b/configs/saml21-xplained/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..becbb993d73c8ae46b8f2dd79d79f3f734fad2a1 --- /dev/null +++ b/configs/saml21-xplained/nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/saml21-xplained/nsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/saml21-xplained/scripts/flash.ld b/configs/saml21-xplained/scripts/flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..e9b8f18bbc4e0524617bd02941ab3a6bcae34d6c --- /dev/null +++ b/configs/saml21-xplained/scripts/flash.ld @@ -0,0 +1,131 @@ +/**************************************************************************** + * configs/saml21-xplained/scripts/flash.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The ATSAML21J18A has 256KB of FLASH beginning at address 0x0000:0000 and + * 32KB of SRAM beginning at address 0x2000:0000. There is also 8KB low- + * power SRAM at 0x30000000 that may be used by the DMAC. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K + lpram (rw) : ORIGIN = 0x30000000, LENGTH = 8K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } >flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } >flash + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > sram AT > flash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + .lpram : { + _slpram = ABSOLUTE(.); + *(.lpram) + _elpram = ABSOLUTE(.); + } > lpram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/saml21-xplained/src/.gitignore b/configs/saml21-xplained/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/saml21-xplained/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/saml21-xplained/src/Makefile b/configs/saml21-xplained/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..c35bb2e9f6656be4f944f40a42c228f978a4902d --- /dev/null +++ b/configs/saml21-xplained/src/Makefile @@ -0,0 +1,69 @@ +############################################################################ +# configs/saml21-xplained/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c + +ifeq ($(CONFIG_SAMDL_SERCOM0),y) +CSRCS += sam_spi.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += sam_autoleds.c +else +CSRCS += sam_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += sam_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += sam_appinit.c +endif + +ifeq ($(CONFIG_SAML21_XPLAINED_IOMODULE),y) +CSRCS += sam_mmcsd.c +endif + +ifeq ($(CONFIG_SAML21_XPLAINED_OLED1MODULE),y) +ifeq ($(CONFIG_LCD_UG2832HSWEG04),y) +CSRCS += sam_ug2832hsweg04.c +endif +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/saml21-xplained/src/sam_appinit.c b/configs/saml21-xplained/src/sam_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..98d66e9213f97501c08f96e785e96377e22f912b --- /dev/null +++ b/configs/saml21-xplained/src/sam_appinit.c @@ -0,0 +1,121 @@ +/**************************************************************************** + * config/saml21-xplained/src/sam_appinit.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "sam_config.h" +#include "saml21-xplained.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Some configuration checks */ + +#ifdef CONFIG_SAML21_XPLAINED_IOMODULE_EXT1 +# ifndef SAMDL_HAVE_SPI0 +# error I/O1 module on EXT1 requires SERCOM SPI0 +# undef CONFIG_SAML21_XPLAINED_IOMODULE +# endif +# define SPI_PORTNO 0 +#endif + +#ifdef CONFIG_SAML21_XPLAINED_IOMODULE_EXT2 +# ifndef SAMDL_HAVE_SPI1 +# error I/O1 module on EXT2 requires SERCOM SPI1 +# undef CONFIG_SAML21_XPLAINED_IOMODULE +# endif +# define SPI_PORTNO 1 +#endif + +#ifdef CONFIG_SAML21_XPLAINED_IOMODULE +/* Support for the SD card slot on the I/O1 module */ +/* Verify NSH PORT and SLOT settings */ + +# define SAMDL_MMCSDSLOTNO 0 /* There is only one slot */ + +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != SAMDL_MMCSDSLOTNO +# error Only one MMC/SD slot: Slot 0 (CONFIG_NSH_MMCSDSLOTNO) +# endif + +# if defined(CONFIG_NSH_MMCSDSPIPORTNO) && CONFIG_NSH_MMCSDSPIPORTNO != SPI_PORTNO +# error CONFIG_NSH_MMCSDSPIPORTNO must have the same value as SPI_PORTNO +# endif + +/* Default MMC/SD minor number */ + +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(SAMDL_HAVE_SPI0) && defined(CONFIG_SAML21_XPLAINED_IOMODULE) + /* Initialize the SPI-based MMC/SD slot */ + + { + int ret = sam_sdinitialize(SPI_PORTNO, CONFIG_NSH_MMCSDMINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize MMC/SD slot: %d\n", + ret); + return ret; + } + } +#endif + + return OK; +} diff --git a/configs/saml21-xplained/src/sam_autoleds.c b/configs/saml21-xplained/src/sam_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..73716879c13dbeca549668893662a7c73bf28fa3 --- /dev/null +++ b/configs/saml21-xplained/src/sam_autoleds.c @@ -0,0 +1,178 @@ +/**************************************************************************** + * configs/saml21-xplained/src/sam_autoleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are three LEDs on board the SAML21 Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labelled STATUS near the SAML21 USB + * connector. + * + * This LED is controlled by PB10 and the LED can be activated by driving PB10 + * to GND. + * + * When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control the LED as follows: + * + * SYMBOL Meaning LED + * ------------------- ----------------------- ------ + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt** N/C + * LED_SIGNAL In a signal handler*** N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus if the LED is statically on, NuttX has successfully booted and is, + * apparently, running normally. If the LED is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_port.h" +#include "saml21-xplained.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + (void)sam_configport(PORT_STATUS_LED); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool ledstate = true; + + switch (led) + { + case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */ + /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */ + /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */ + break; /* Leave ledstate == true to turn OFF */ + + default: + case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */ + /* LED_SIGNAL: In a signal handler STATUS LED=N/C */ + /* LED_ASSERTION: An assertion failed STATUS LED=N/C */ + return; /* Return to leave STATUS LED unchanged */ + + case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */ + case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */ + ledstate = false; /* Set ledstate == false to turn ON */ + break; + } + + sam_portwrite(PORT_STATUS_LED, ledstate); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + /* These should not happen and are ignored */ + + default: + case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */ + /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */ + /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */ + case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */ + + /* These result in no-change */ + + case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */ + /* LED_SIGNAL: In a signal handler STATUS LED=N/C */ + /* LED_ASSERTION: An assertion failed STATUS LED=N/C */ + return; /* Return to leave STATUS LED unchanged */ + + /* Turn STATUS LED off set driving the output high */ + + case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */ + sam_portwrite(PORT_STATUS_LED, true); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/saml21-xplained/src/sam_boot.c b/configs/saml21-xplained/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..91832ea29a521145aed5aea73f082ddc35e13f4d --- /dev/null +++ b/configs/saml21-xplained/src/sam_boot.c @@ -0,0 +1,89 @@ +/************************************************************************************ + * configs/saml21-xplained/src/sam_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "sam_config.h" +#include "saml21-xplained.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_boardinitialize + * + * Description: + * All SAM3U architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void sam_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * sam_spidev_initialize() has been brought into the link. + */ + +#ifdef SAMDL_HAVE_SPI + if (sam_spidev_initialize) + { + sam_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/saml21-xplained/src/sam_buttons.c b/configs/saml21-xplained/src/sam_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..ea8994df6aa8ad5e41e6eb9be1e18c0c3a17e399 --- /dev/null +++ b/configs/saml21-xplained/src/sam_buttons.c @@ -0,0 +1,160 @@ +/**************************************************************************** + * configs/saml21-xplained/src/sam_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "sam_port.h" +#include "saml21-xplained.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_PORTA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +static xcpt_t g_irqsw0; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state of + * all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + (void)sam_configport(PORT_SW0); +} + +/************************************************************************************ + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be called to collect + * the state of all buttons. board_buttons() returns an 8-bit bit set with each bit + * associated with a button. See the BUTTON* definitions above for the meaning of + * each bit in the returned value. + * + ************************************************************************************/ + +uint8_t board_buttons(void) +{ + return sam_portread(PORT_SW0) ? 0 : BUTTON_SW0_BIT; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address isreturned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_AVR32_PORTIRQ must be selected to enable the + * overall PORT IRQ feature and CONFIG_AVR32_PORTIRQSETA and/or + * CONFIG_AVR32_PORTIRQSETB must be enabled to select PORTs to support + * interrupts on. For button support, bits 2 and 3 must be set in + * CONFIG_AVR32_PORTIRQSETB (PB2 and PB3). + * + ****************************************************************************/ + +#if defined(CONFIG_PORTA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS) +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id == BUTTON_SW0) + { + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = *g_irqsw0; + *g_irqsw0 = irqhandler; + + /* Configure the interrupt */ + + sam_portirq(IRQ_SW0); + (void)irq_attach(IRQ_SW0, irqhandler); + sam_portirqenable(IRQ_SW0); + leave_critical_section(flags); + } + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/saml21-xplained/src/sam_mmcsd.c b/configs/saml21-xplained/src/sam_mmcsd.c new file mode 100644 index 0000000000000000000000000000000000000000..a8ca098282fe1a9e2649fe1413b1a786831b3415 --- /dev/null +++ b/configs/saml21-xplained/src/sam_mmcsd.c @@ -0,0 +1,127 @@ +/**************************************************************************** + * config/saml21-xplained/src/sam_mmcsd.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_config.h" +#include "sam_spi.h" + +#include "saml21-xplained.h" + +#ifdef CONFIG_SAML21_XPLAINED_IOMODULE + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# error Mountpoints are disabled (CONFIG_DISABLE_MOUNTPOINT=y) +#endif + +#ifndef SAMDL_HAVE_SPI0 +# error SERCOM0 SPI support is required +#endif + +#ifndef CONFIG_MMCSD +# error MMC/SD support is required (CONFIG_MMCSD) +#endif + +#define SAMDL_MMCSDSLOTNO 0 /* There is only one slot */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires + * - CONFIG_SAML21_XPLAINED_IOMODULE=y, + * - CONFIG_DISABLE_MOUNTPOINT=n, + * - CONFIG_MMCSD=y, and + * - SAMDL_HAVE_SPI0=y (CONFIG_SAMDL_SERCOM0 && CONFIG_SAMDL_SERCOM0_ISSPI) + * + ****************************************************************************/ + +int sam_sdinitialize(int port, int minor) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI driver instance for the SD chip select */ + + fvdbg("Initializing SERCOM SPI%d\n", port); + + spi = sam_spibus_initialize(port); + if (!spi) + { + fdbg("Failed to initialize SPI%d\n", port); + return -ENODEV; + } + + fvdbg("Successfully initialized SPI%d\n", port); + + /* Bind the SPI device for the chip select to the slot */ + + fvdbg("Binding SPI%d to MMC/SD slot %d\n", port, SAMDL_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(minor, SAMDL_MMCSDSLOTNO, spi); + if (ret < 0) + { + fdbg("Failed to bind SPI%d to MMC/SD slot %d: %d\n", + port, SAMDL_MMCSDSLOTNO, ret); + return ret; + } + + fvdbg("Successfuly bound SPI%d to MMC/SD slot %d\n", + port, SAMDL_MMCSDSLOTNO); + + return OK; +} + +#endif /* CONFIG_SAML21_XPLAINED_IOMODULE */ diff --git a/configs/saml21-xplained/src/sam_spi.c b/configs/saml21-xplained/src/sam_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..00eea22563262fd42e1dfb2e10c2ef9b677a10c3 --- /dev/null +++ b/configs/saml21-xplained/src/sam_spi.c @@ -0,0 +1,446 @@ +/**************************************************************************** + * configs/saml21-xplained/src/sam_spi.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_config.h" +#include "sam_port.h" +#include "sam_spi.h" + +#include "saml21-xplained.h" + +#ifdef SAMDL_HAVE_SPI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select PORT pins for the SAML21 Xplained + * Pro board. + * + ****************************************************************************/ + +void weak_function sam_spidev_initialize(void) +{ + /* The I/O module containing the SD connector may or may not be installed. And, if + * it is installed, it may be in connector EXT1 or EXT2. + */ + +#ifdef CONFIG_SAML21_XPLAINED_IOMODULE + /* TODO: enable interrupt on card detect */ + + sam_configport(PORT_SD_CD); /* Card detect input */ + sam_configport(PORT_SD_CS); /* Chip select output */ +#endif + +#ifdef CONFIG_SAML21_XPLAINED_OLED1MODULE + sam_configport(PORT_OLED_DATA); /* Command/data */ + sam_configport(PORT_OLED_CS); /* Card detect input */ +#endif +} + +/**************************************************************************** + * Name: sam_spi[n]select, sam_spi[n]status, and sam_spi[n]cmddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * include: + * + * o sam_spi[n]select is a functions to manage the board-specific chip + * selects + * o sam_spi[n]status and sam_spi[n]cmddata: Implementations of the status + * and cmddata methods of the SPI interface defined by struct spi_ops_ + * (see include/nuttx/spi/spi.h). All other methods including + * sam_spibus_initialize()) are provided by common SAMD/L logic. + * + * Where [n] is the SERCOM number for the SPI module. + * + * To use this common SPI logic on your board: + * + * 1. Provide logic in sam_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide sam_spi[n]select() and sam_spi[n]status() functions in your + * board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * sam_spi[n]cmddata() functions in your board-specific logic. This + * function will perform cmd/data selection operations using GPIOs in + * the way your board is configured. + * 3. Add a call to sam_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by sam_spibus_initialize() may then be used to bind + * the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spi[n]select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * GPIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the GPIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * dev - SPI device info + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef SAMDL_HAVE_SPI0 +void sam_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +#ifdef CONFIG_SAML21_XPLAINED_IOMODULE_EXT1 + /* Select/de-select the SD card */ + + if (devid == SPIDEV_MMCSD) + { + /* Active low */ + + sam_portwrite(PORT_SD_CS, !selected); + } +#endif + +#ifdef CONFIG_SAML21_XPLAINED_OLED1MODULE_EXT1 + /* Select/de-select the OLED */ + + if (devid == SPIDEV_DISPLAY) + { + /* Active low */ + + sam_portwrite(PORT_OLED_CS, !selected); + } +#endif +} +#endif + +#ifdef SAMDL_HAVE_SPI1 +void sam_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +#ifdef CONFIG_SAML21_XPLAINED_IOMODULE_EXT2 + /* Select/de-select the SD card */ + + if (devid == SPIDEV_MMCSD) + { + /* Active low */ + + sam_portwrite(PORT_SD_CS, !selected); + } +#endif + +#ifdef CONFIG_SAML21_XPLAINED_OLED1MODULE_EXT2 + /* Select/de-select the OLED */ + + if (devid == SPIDEV_DISPLAY) + { + /* Active low */ + + sam_portwrite(PORT_OLED_CS, !selected); + } +#endif +} +#endif + +#ifdef SAMDL_HAVE_SPI2 +void sam_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +} +#endif + +#ifdef SAMDL_HAVE_SPI3 +void sam_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +} +#endif + +#ifdef SAMDL_HAVE_SPI4 +void sam_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +} +#endif + +#ifdef SAMDL_HAVE_SPI5 +void sam_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ +} +#endif + +/**************************************************************************** + * Name: sam_spi[n]status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * dev - SPI device info + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef SAMDL_HAVE_SPI0 +uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + +#ifdef CONFIG_SAML21_XPLAINED_IOMODULE_EXT1 + /* Check if an SD card is present in the microSD slot */ + + if (devid == SPIDEV_MMCSD) + { + /* Active low */ + + if (!sam_portread(PORT_SD_CD)) + { + ret |= SPI_STATUS_PRESENT; + } + } +#endif + + return ret; +} +#endif + +#ifdef SAMDL_HAVE_SPI1 +uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + +#ifdef CONFIG_SAML21_XPLAINED_IOMODULE_EXT2 + /* Check if an SD card is present in the microSD slot */ + + if (devid == SPIDEV_MMCSD) + { + /* Active low */ + + if (!sam_portread(PORT_SD_CD)) + { + ret |= SPI_STATUS_PRESENT; + } + } +#endif + + return ret; +} +#endif + +#ifdef SAMDL_HAVE_SPI2 +uint8_t sam_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef SAMDL_HAVE_SPI3 +uint8_t sam_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef SAMDL_HAVE_SPI4 +uint8_t sam_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef SAMDL_HAVE_SPI5 +uint8_t sam_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + return ret; +} +#endif + +/**************************************************************************** + * Name: sam_spi[n]cmddata + * + * Description: + * Some SPI devices require an additional control to determine if the SPI + * data being sent is a command or is data. If CONFIG_SPI_CMDDATA then + * this function will be called to different be command and data transfers. + * + * This is often needed, for example, by LCD drivers. Some LCD hardware + * may be configured to use 9-bit data transfers with the 9th bit + * indicating command or data. That same hardware may be configurable, + * instead, to use 8-bit data but to require an additional, board- + * specific GPIO control to distinguish command and data. This function + * would be needed in that latter case. + * + * Input Parameters: + * dev - SPI device info + * devid - Identifies the (logical) device + * + * Returned Values: + * Zero on success; a negated errno on failure. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef SAMDL_HAVE_SPI0 +int sam_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#ifdef CONFIG_SAML21_XPLAINED_OLED1MODULE_EXT1 + if (devid == SPIDEV_DISPLAY) + { + /* This is the Data/Command control pad which determines whether the + * data bits are data or a command. + * + * High: the inputs are treated as display data. + * Low: the inputs are transferred to the command registers. + */ + + (void)sam_portwrite(PORT_OLED_DATA, !cmd); + } +#endif + + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI1 +int sam_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#ifdef CONFIG_SAML21_XPLAINED_OLED1MODULE_EXT2 + if (devid == SPIDEV_DISPLAY) + { + /* This is the Data/Command control pad which determines whether the + * data bits are data or a command. + * + * High: the inputs are treated as display data. + * Low: the inputs are transferred to the command registers. + */ + + (void)sam_portwrite(PORT_OLED_DATA, !cmd); + } +#endif + + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI2 +int sam_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI3 +int sam_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI4 +int sam_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef SAMDL_HAVE_SPI5 +int sam_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#endif /* CONFIG_SPI_CMDDATA */ +#endif /* SAMDL_HAVE_SPI */ diff --git a/configs/saml21-xplained/src/sam_ug2832hsweg04.c b/configs/saml21-xplained/src/sam_ug2832hsweg04.c new file mode 100644 index 0000000000000000000000000000000000000000..3e67622d16a4015e897f57a751eb37b8e353b02a --- /dev/null +++ b/configs/saml21-xplained/src/sam_ug2832hsweg04.c @@ -0,0 +1,214 @@ +/**************************************************************************** + * config/saml21-xplained/src/sam_ug2832hsweg04.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* OLED1 Connector: + * + * OLED1 CONNECTOR + * ----------------- ---------------------- ---------------------- + * OLED1 EXT1 EXT2 + * ----------------- ---------------------- ---------------------- + * 1 ID 1 1 + * ----------------- ---------------------- ---------------------- + * 2 GND 2 GND 2 GND + * ----------------- ---------------------- ---------------------- + * 3 BUTTON2 3 PB00 AIN[8] 3 PA10 AIN[18] + * ----------------- ---------------------- ---------------------- + * 4 BUTTON3 4 PB01 AIN[9] 4 PA11 AIN[19] + * ----------------- ---------------------- ---------------------- + * 5 DATA_CMD_SEL 5 PB06 PORT 5 PA20 PORT + * ----------------- ---------------------- ---------------------- + * 6 LED3 6 PB07 PORT 6 PA21 PORT + * ----------------- ---------------------- ---------------------- + * 7 LED1 7 PB02 TC6/WO[0] 7 PA22 TC4/WO[0] + * ----------------- ---------------------- ---------------------- + * 8 LED2 8 PB03 TC6/WO[1] 8 PA23 TC4/WO[1] + * ----------------- ---------------------- ---------------------- + * 9 BUTTON1 9 PB04 EXTINT[4] 9 PB14 EXTINT[14] + * ----------------- ---------------------- ---------------------- + * 10 DISPLAY_RESET 10 PB05 PORT 10 PB15 PORT + * ----------------- ---------------------- ---------------------- + * 11 N/C 11 PA08 SERCOM2 PAD[0] 11 PA08 SERCOM2 PAD[0] + * I²C SDA I²C SDA + * ----------------- ---------------------- ---------------------- + * 12 N/C 12 PA09 SERCOM2 PAD[1] 12 PA09 SERCOM2 PAD[1] + * I²C SCL I²C SCL + * ----------------- ---------------------- ---------------------- + * 13 N/C 13 PB09 SERCOM4 PAD[1] 13 PB13 SERCOM4 PAD[1] + * USART RX USART RX + * ----------------- ---------------------- ---------------------- + * 14 N/C 14 PB08 SERCOM4 PAD[0] 14 PB12 SERCOM4 PAD[0] + * USART TX USART TX + * ----------------- ---------------------- ---------------------- + * 15 DISPLAY_SS 15 PA05 SERCOM0 PAD[1] 15 PA17 SERCOM1 PAD[1] + * SPI SS SPI SS + * ----------------- ---------------------- ---------------------- + * 16 SPI_MOSI 16 PA06 SERCOM0 PAD[2] 16 PA18 SERCOM1 PAD[2] + * SPI MOSI SPI MOSI + * ----------------- ---------------------- ---------------------- + * 17 N/C 17 PA04 SERCOM0 PAD[0] 17 PA16 SERCOM1 PAD[0] + * SPI MISO SPI MISO + * ----------------- ---------------------- ---------------------- + * 18 SPI_SCK 18 PA07 SERCOM0 PAD[3] 18 PA19 SERCOM1 PAD[3] + * SPI SCK SPI SCK + * ----------------- ---------------------- ---------------------- + * 19 GND 19 GND GND + * ----------------- ---------------------- ---------------------- + * 20 VCC 20 VCC VCC + * ----------------- ---------------------- ---------------------- + * + * OLED1 signals + * + * DATA_CMD_SEL - Data/command select. Used to choose whether the + * communication is data to the display memory or a command to the LCD + * controller. High = data, low = command + * DISPLAY_RESET - Reset signal to the OLED display, active low. Used during + * initialization of the display. + * DISPLAY_SS - SPI slave select signal, must be held low during SPI + * communication. + * SPI_MOSI - SPI master out, slave in signal. Used to write data to the + * display + * SPI_SCK SPI - clock signal, generated by the master. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include "sam_port.h" +#include "sam_spi.h" + +#include "saml21-xplained.h" + +#ifdef CONFIG_SAML21_XPLAINED_OLED1MODULE + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* The pin configurations here require that SPI1 is selected */ + +#ifndef CONFIG_LCD_SSD1306 +# error "The OLED driver requires CONFIG_LCD_SSD1306 in the configuration" +#endif + +#ifndef CONFIG_LCD_UG2832HSWEG04 +# error "The OLED driver requires CONFIG_LCD_UG2832HSWEG04 in the configuration" +#endif + +#ifndef SAMDL_HAVE_SPI0 +# error "The OLED driver requires SAMDL_HAVE_SPI0 in the configuration" +#endif + +#ifndef CONFIG_SPI_CMDDATA +# error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration" +#endif + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) dbg(format, ##__VA_ARGS__) +# define lcdvdbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED PORTs. This initial configuration is RESET low, + * putting the OLED into reset state. + */ + + (void)sam_configport(PORT_OLED_RST); + + /* Wait a bit then release the OLED from the reset state */ + + up_mdelay(20); + sam_portwrite(PORT_OLED_RST, true); + + /* Get the SPI1 port interface */ + + spi = sam_spibus_initialize(OLED_CSNO); + if (!spi) + { + lcddbg("Failed to initialize SPI port 1\n"); + } + else + { + /* Bind the SPI port to the OLED */ + + dev = ssd1306_initialize(spi, devno); + if (!dev) + { + lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno); + } + else + { + lcdvdbg("Bound SPI port 1 to OLED %d\n", devno); + + /* And turn the OLED on */ + + (void)dev->setpower(dev, CONFIG_LCD_MAXPOWER); + return dev; + } + } + + return NULL; +} +#endif /* CONFIG_SAML21_XPLAINED_OLED1MODULE */ diff --git a/configs/saml21-xplained/src/sam_userleds.c b/configs/saml21-xplained/src/sam_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..ab22a0408e5bba59438b42045c966283df8b8a27 --- /dev/null +++ b/configs/saml21-xplained/src/sam_userleds.c @@ -0,0 +1,143 @@ +/**************************************************************************** + * configs/saml21-xplained/src/sam_userleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* There are three LEDs on board the SAML21 Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labeled STATUS near the SAML21 USB + * connector. + * + * This LED is controlled by PB10 and the LED can be activated by driving PB10 + * to GND. + * + * When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control the LED. Otherwise, the LED can be controlled from user applications + * using the logic in this file. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_port.h" +#include "saml21-xplained.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the + * board_userled_initialize() is available to initialize the LED from user + * application logic. + * + ****************************************************************************/ + +void board_userled_initialize(void) +{ + (void)sam_configport(PORT_STATUS_LED); +} + +/**************************************************************************** + * Name: board_userled + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled() is + * available to control the LED from user application logic. + * + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_STATUS_LED) + { + sam_portwrite(PORT_STATUS_LED, !ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled_all() is + * available to control the LED from user application logic. NOTE: since + * there is only a single LED on-board, this is function is not very useful. + * + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + board_userled(BOARD_STATUS_LED, (ledset & BOARD_STATUS_LED_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/saml21-xplained/src/saml21-xplained.h b/configs/saml21-xplained/src/saml21-xplained.h new file mode 100644 index 0000000000000000000000000000000000000000..0786786a33f1269fbf10a8a0bab4c076e97aeddc --- /dev/null +++ b/configs/saml21-xplained/src/saml21-xplained.h @@ -0,0 +1,264 @@ +/************************************************************************************ + * configs/saml21-xplained/src/saml21-xplained.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAML21_XPLAINED_SRC_SAML21_XPLAINED_H +#define __CONFIGS_SAML21_XPLAINED_SRC_SAML21_XPLAINED_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +#include +#include + +#include "sam_config.h" +#include "sam_pinmap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* LEDs: There are three LEDs on board the SAML21 Xplained Pro board: The EDBG + * controls two of the LEDs, a power LED and a status LED. There is only + * one user controllable LED, a yellow LED labelled STATIS near the SAML21 USB + * connector. + * + * This LED is controlled by PB10 and the LED can be activated by driving PB10 + * to GND. + * + * When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control the LED as follows: + * + * SYMBOL Meaning LED + * ------------------- ----------------------- ------ + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt N/C + * LED_SIGNAL In a signal handler N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus if the LED is statically on, NuttX has successfully booted and is, + * apparently, running normally. If the LED is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +#define PORT_STATUS_LED (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTB | PORT_PIN10) + +/* Mechanical buttons: + * + * The SAML21 Xplained Pro contains two mechanical buttons. One button is the + * RESET button connected to the SAML21 reset line and the other is a generic user + * configurable button. When a button is pressed it will drive the I/O line to GND. + * + * PA02 SW0 + */ + +#define PORT_SW0 (PORT_INTERRUPT | PORT_PULL_UP | PORTA | PORT_PIN2) +#define IRQ_SW0 SAM_IRQ_PA2 + +/* I/O1 + * + * Support for the microSD card slot on the I/O1 module. The I/O1 requires + * SPI support and two PORTs. These the PORTs will vary if the I/O1 + * is installed on the EXT1 or EXT2 connector: + * + * --- ------------------ ---------------------- ------------------------------- + * PIN EXT1 EXT2 Description + * --- ------------------ ---------------------- ------------------------------- + * 15 PA05 SERCOM0 PAD[1] 15 PA17 GPIO] Active low chip select OUTPUT, + * SPI SS pulled high on board. + * 10 PA02 GPIO 10 PB15 GPIO Active low card detect INPUT, + * must use internal pull-up. + * --- ------------------ ---------------------- ------------------------------- + */ + +#ifdef CONFIG_SAML21_XPLAINED_IOMODULE + +# ifndef SAMDL_HAVE_SPI0 +# error SAMDL_HAVE_SPI0 is required to use the I/O1 module +# endif + +# if defined(CONFIG_SAML21_XPLAINED_IOMODULE_EXT1) + +# if defined(CONFIG_SAML21_XPLAINED_OLED1MODULE) && \ + defined(CONFIG_SAML21_XPLAINED_OLED1MODULE_EXT1) +# error I/O1 and OLED1 modules cannot both reside in EXT1 +# endif + +# define PORT_SD_CD (PORT_INTERRUPT | PORT_INT_CHANGE | PORT_PULL_UP | \ + PORTA | PORT_PIN2) + +# define PORT_SD_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTA | PORT_PIN5) + +# elif defined(CONFIG_SAML21_XPLAINED_IOMODULE_EXT2) + +# if defined(CONFIG_SAML21_XPLAINED_OLED1MODULE) && \ + defined(CONFIG_SAML21_XPLAINED_OLED1MODULE_EXT2) +# error I/O1 and OLED1 modules cannot both reside in EXT2 +# endif + +# define PORT_SD_CD (PORT_INTERRUPT | PORT_INT_CHANGE | PORT_PULL_UP | \ + PORTB | PORT_PIN15) + +# define PORT_SD_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTA | PORT_PIN17) + +# else +# error Which connector is the I/O1 module installed in? +# endif +#endif + +/* OLED1 + * + * Support for the microSD card slot on the I/O1 module. The I/O1 requires + * SPI support and three output PORTs. These the PORTs will vary if the OLED1 + * is installed on the EXT1 or EXT2 connector: + * + * + * --- ------------------- -------------------- ------------------------------------- + * PIN EXT1 EXT2 Description + * --- ------------------- -------------------- ------------------------------------- + * 5 PB06 PA02 PA20 PA02 DATA_CMD_SEL + * 10 PA02 PA02 PB15 PA02 DISPLAY_RESET. Active low. + * 15 PA05 SERCOM0 PAD[1] PA17 SERCOM1 PAD[1] DISPLAY_SS. Active low. + * SPI SS SPI SS + * --- ------------------- -------------------- ------------------------------------- + */ + +#ifdef CONFIG_SAML21_XPLAINED_OLED1MODULE + +# ifndef SAMDL_HAVE_SPI0 +# error SAMDL_HAVE_SPI0 is required to use the OLED1 module +# endif + +# ifndef CONFIG_SPI_CMDDATA +# error CONFIG_SPI_CMDDATA is required to use the OLED1 module +# endif + +# ifndef CONFIG_LCD_SSD1306 +# error CONFIG_LCD_SSD1306 is required to use the OLED1 module +# endif + +# ifndef CONFIG_LCD_UG2832HSWEG04 +# error CONFIG_LCD_UG2832HSWEG04 is required to use the OLED1 module +# endif + +# if defined(CONFIG_SAML21_XPLAINED_OLED1MODULE_EXT1) + +# if defined(CONFIG_SAML21_XPLAINED_IOMODULE) && \ + defined(CONFIG_SAML21_XPLAINED_IOMODULE_EXT1) +# error OLED1 and I/O1 modules cannot both reside in EXT1 +# endif + +# define PORT_OLED_DATA (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \ + PORTB | PORT_PIN6) +# define PORT_OLED_RST (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \ + PORTA | PORT_PIN2) +# define PORT_OLED_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTA | PORT_PIN5) + +# elif defined(CONFIG_SAML21_XPLAINED_OLED1MODULE_EXT2) + +# if defined(CONFIG_SAML21_XPLAINED_IOMODULE) && \ + defined(CONFIG_SAML21_XPLAINED_IOMODULE_EXT2) +# error OLED1 and I/O1 modules cannot both reside in EXT2 +# endif + +# define PORT_OLED_DATA (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \ + PORTA | PORT_PIN20) +# define PORT_OLED_RST (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \ + PORTB | PORT_PIN15) +# define PORT_OLED_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTA | PORT_PIN17) + +# else +# error Which connector is the OLED1 module installed in? +# endif +#endif + +#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) +# define PORT_SD_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \ + PORTB | PORT_PIN11) /* REVISIT */ +#endif + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select PORT pins for the SAM3U-EK board. + * + ************************************************************************************/ + +void weak_function sam_spidev_initialize(void); + +/************************************************************************************ + * Name: sam_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires CONFIG_SAML21_XPLAINED_IOMODULE=y, + * CONFIG_DISABLE_MOUNTPOINT=n, CONFIG_MMCSD=y, and the appropriate SERCOM SPI + * port enabled. + * + ************************************************************************************/ + +#ifdef CONFIG_SAML21_XPLAINED_IOMODULE +int sam_sdinitialize(int port, int minor); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAML21_XPLAINED_SRC_SAML21_XPLAINED_H */ diff --git a/configs/samv71-xult/Kconfig b/configs/samv71-xult/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..94432376663d9957e947a0dedf99f75e93cfc75b --- /dev/null +++ b/configs/samv71-xult/Kconfig @@ -0,0 +1,116 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SAMV71_XULT + +config SAMV71XULT_MXTXPLND + bool "MaXTouch Xplained connected" + default n + +if SAMV71XULT_MXTXPLND + +choice + prompt "MaXTouch Xplained connection" + default SAMV71XULT_MXTXPLND_EXT1 + +config SAMV71XULT_MXTXPLND_EXT1 + bool "Connected on EXT1 (2x10 pin)" + depends on EXPERIMENTAL + +config SAMV71XULT_MXTXPLND_EXT2 + bool "Connected on EXT2 (2x10 pin)" + depends on EXPERIMENTAL + +config SAMV71XULT_MXTXPLND_LCD + bool "Connected on LCD (50-pin)" + +endchoice # MaXTouch Xplained connection + +if INPUT_MXT + +config SAMV71XULT_MXT_SWAPXY + bool "Swap X/Y coordinates" + default n + ---help--- + If you are working in a landscape orientation, it should be + necessary to swap X/Y coordinates. But you will probably want + to do this in any portrait orientation. + +config SAMV71XULT_MXT_I2CFREQUENCY + int "maXTouch I2C frequency" + default 400000 + +config SAMV71XULT_MXT_DEVMINOR + int "/dev/input minor number" + default 0 + +endif # INPUT_MXT + +if LCD + +config SAMV71XULT_LCD_BGCOLOR + hex "Initial background color" + default 0x00 + +endif # LCD + +endif # SAMV71XULT_MXTXPLND + +config SAMV71XULT_HSMCI0_AUTOMOUNT + bool "HSMCI0 automounter" + default n + depends on FS_AUTOMOUNTER && SAMA5_HSMCI0 + +if SAMV71XULT_HSMCI0_AUTOMOUNT + +config SAMV71XULT_HSMCI0_AUTOMOUNT_FSTYPE + string "HSMCI0 file system type" + default "vfat" + +config SAMV71XULT_HSMCI0_AUTOMOUNT_BLKDEV + string "HSMCI0 block device" + default "/dev/mmcsd0" + +config SAMV71XULT_HSMCI0_AUTOMOUNT_MOUNTPOINT + string "HSMCI0 mount point" + default "/mnt/sdcard0" + +config SAMV71XULT_HSMCI0_AUTOMOUNT_DDELAY + int "HSMCI0 debounce delay (milliseconds)" + default 1000 + +config SAMV71XULT_HSMCI0_AUTOMOUNT_UDELAY + int "HSMCI0 unmount retry delay (milliseconds)" + default 2000 + +endif # SAMV71XULT_HSMCI0_AUTOMOUNT + +if AUDIO_WM8904 + +config SAMV71XULT_WM8904_I2CFREQUENCY + int "WM8904 I2C Frequency" + default 400000 + range 1 400000 + ---help--- + This option selects the I2C frequency to use when communicating with + the WM8904 device. The default, 400KHz, is the maximum supported by + the WM8904. If you have problems communicating with the WM8904, + then you might want to try lowering this rate. + +choice + prompt "WM8904 MCLK source" + default SAMV71XULT_WM8904_SRCMAIN + +config SAMV71XULT_WM8904_SRCMAIN + bool "Main Clock (12MHz)" + +config SAMV71XULT_WM8904_SRCSCK + bool "Slow XTAL (32.768KHz)" + select SAMV71XULT_SLOWCLOCK + +endchoice # WM8904 MCLK source +endif # AUDIO_WM8904 + +endif # ARCH_BOARD_SAMV71_XULT diff --git a/configs/samv71-xult/README.txt b/configs/samv71-xult/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..60d3b6c513116a90bb06948318870a81199e4b5e --- /dev/null +++ b/configs/samv71-xult/README.txt @@ -0,0 +1,2310 @@ +README +====== + +This README file discusses the port of NuttX to the Atmel SAM V71 Xplained +Ultra Evaluation Kit (SAMV71-XULT). This board features the ATSAMV71Q21 Cortex-M7 +microcontroller. + +Additional support of provided for the (optional) maXTouch Xplained Pro LCD. + +Contents +======== + + - Board Features + - Status/Open Issues + - Serial Console + - SD card + - Automounter + - LEDs and Buttons + - AT24MAC402 Serial EEPROM + - S25FL116K QuadSPI FLASH + - Program FLASH Access + - Networking + - USBHS Device Controller Driver + - Audio Interface + - maXTouch Xplained Pro + - MCAN1 Loopback Test + - SPI Slave + - Tickless OS + - Debugging + - Configurations + +Board Features +============== + + - ATSAMV71Q21 microcontroller: Cortex-M7, 300MHz, 2MiB FLASH, 384KiB SRAM, + I/D-caches + - One mechanical reset button + - One power switch button + - Two mechanical user pushbuttons + - Two yellow user LEDs + - Supercap backup + - 12.0 MHz crystal + - 32.768 kHz crystal + - 2 MB SDRAM + - 2 MB QSPI Flash + - IEEE 802.3az 10Base-T/100Base-TX Ethernet RMII PHY + - AT24MAC402 256KByte EEPROM with EUI-48 address + - WM8904 stereo audio codec + - ATA6561 CAN Transceiver + - SD Card connector with SDIO support + - Camera interface connector + - MediaLB connector + - Two Xplained Pro extension headers + - One Xplained Pro LCD header + - Coresight 20 connector for 4-bit ETM + - Arduino due compatible shield connectors + - External debugger connector + - USB interface, device and host mode + - Embedded Debugger with Data Gateway Interface and Virtual COM port (CDC) + - External power input (5-14V) or USB powered + +See the Atmel website for further information about this board: + + - http://www.atmel.com/tools/atsamv71-xult.aspx + +Status/Open Issues +================== + +I would characterize the general port as very mature and stable. However, +there are a number of issues, caveats, and unfinished drivers as detailed in +the following paragraphs. + +The BASIC nsh configuration is fully function (as described below under +"Configurations"). There is also a graphics configuration (mxtxplnd), a +a configuration for network testing (netnsh), a graphics demo (nxwm), and +a sample protected mode build (knsh). There are still open issues that need +to be resolved. General problems are listed below. But see the STATUS +section associated with each configuration for additional issues specific +to a particular configuration. + + 1. HSCMI. CONFIG_MMCSD_MULTIBLOCK_DISABLE=y is set to disable multi-block + transfers only because I have not yet had a chance to verify this. The + is very low priority to me but might be important to you if you are need + very high performance SD card accesses. + + 2. HSMCI TX DMA is currently disabled for the SAMV7. There is some + issue with the TX DMA setup. This is a bug that needs to be resolved. + + DMA is enabled by these settings in the file arch/arm/src/samv7/sam_hsmci.c: + + #undef HSCMI_NORXDMA /* Define to disable RX DMA */ + #define HSCMI_NOTXDMA 1 /* Define to disable TX DMA */ + + 3. There may also be some issues with removing and re-inserting SD cards + (of course with appropriate mounting and unmounting). I all not sure + of this and need to do more testing to characterize if the issue. + + 4. There is a port of the SAMA5D4-EK Ethernet driver to the SAMV71-XULT. + This driver appears to be 100% functional with the following caveats: + + - There is a compiler optimization issue. At -O2, there is odd + behavior on pings and ARP messages. But the behavior is OK with + optimization set to -O2. This may or may not be a compiler + optimization issue (it could also be a timing issue or a need + for some additional volatile qualifiers). + + Update: I have switch toolchains and no longer see this issue. This + is probably not a driver-related issue. + + - I- and D-Caches are enabled but the D-Cache must be enabled in + write-through mode. This is to work around issues with the RX and TX + descriptors with are 8-bytes in size. But the D-Cache cache line size + is 32-bytes. That means that you cannot reload, clean or invalidate a + descriptor without also effecting three neighboring descriptors. + Setting write through mode eliminates the need for cleaning the D-Cache. + If only reloading and invalidating are done, then there is no problem. + + 5. The USBHS device controller driver (DCD) is also fully functional. It + has only be tested with the CDC/ACM driver as described below. Like + the Ethernet driver: + + - This driver does not work reliably with the write back D-Cache. The + write-through D-Cache must be enabled. + + - As of this writing (2015-08-22), the USBHS only works in full speed + mode (aka, USBHS Low-Power mode). When configured in normal mode, + SETUP packets are no longer received or responded to; the firmware + only detects bus reset events. This is probably some issue with + 480MHZ high speed clock setup, but I have not yet found the issue. + + 6. The full port for audio support is code complete: WM8904 driver, + SSC/I2C driver, and CS2100-CP driver. But this code is untested. The + WM8904 interface was taken directly from the SAMA5D4-EK and may well + need modification due to differences with the physical WM8904 + interface. + + 7. An MCAN driver as added and verified on 2015-08-08 using the loopback + test at apps/examples/can. Like the Ethernet driver, the MCAN driver + does not work if the D-Cache is configured in write-back mode; write- + through mode is required. + + 8. An SPI slave driver as added on 2015-08-09 but has not been verified + as of this writing. See discussion in include/nuttx/spi/slave.h and + in the section entitle "SPI Slave" below. + + 9. A QSPI FLASH driver was added and verifed on 2015-11-10. This driver + operated in the memory mapped Serial Memory Mode (SMM). See the + "S25FL116K QuadSPI FLASH" section below for futher information. + + 10. On-chip FLASH support as added and verified on 2015-11-13. See the + "Program FLASH Access" section below for further information. + + 11. The knsh "protected mode" configuration was added on 2015-11-18. The + configuration has not been tested as of this writing. + +Serial Console +============== + +The SAMV71-XULT has no on-board RS-232 drivers so it will be necessary to +use either the VCOM or an external RS-232 driver. Here are some options. + + - Arduino Serial Shield: One option is to use an Arduino-compatible + serial shield. This will use the RXD and TXD signals available at pins + 0 an 1, respectively, of the Arduino "Digital Low" connector. On the + SAMV71-XULT board, this corresponds to UART3: + + ------ ------ ------- ------- -------- + Pin on SAMV71 Arduino Arduino SAMV71 + J503 PIO Name Pin Function + ------ ------ ------- ------- -------- + 1 PD28 RX0 0 URXD3 + 2 PD30 TX0 1 UTXD3 + ------ ------ ------- ------- -------- + + In this configuration, an external RS232 driver can also be used + instead of the shield. Simply connext as follows: + + --------- ----------- + Arduino RS-232 + Pin Label Connection + --------- ----------- + D0 (RXD) RX + D1 (TXD) TX + GND GND + 5VO Vcc + --------- ----------- + + - Arduino Communications. Additional UART/USART connections are available + on the Arduino Communications connection J505: + + ------ ------ ------- ------- -------- + Pin on SAMV71 Arduino Arduino SAMV71 + J503 PIO Name Pin Function + ------ ------ ------- ------- -------- + 3 PD18 RX1 0 URXD4 + 4 PD19 TX1 0 UTXD4 + 5 PD15 RX2 0 RXD2 + 6 PD16 TX2 0 TXD2 + 7 PB0 RX3 0 RXD0 + 8 PB1 TX3 1 TXD0 + ------ ------ ------- ------- -------- + + - SAMV7-XULT EXTn connectors. USART pins are also available the EXTn + connectors. The following are labelled in the User Guide for USART + functionality: + + ---- -------- ------ -------- + EXT1 EXTI1 SAMV71 SAMV71 + Pin Name PIO Function + ---- -------- ------ -------- + 13 USART_RX PB00 RXD0 + 14 USART_TX PB01 TXD0 + + ---- -------- ------ -------- + EXT2 EXTI2 SAMV71 SAMV71 + Pin Name PIO Function + ---- -------- ------ -------- + 13 USART_RX PA21 RXD1 + 14 USART_TX PB04 TXD1 + + - VCOM. The Virtual Com Port gateway is available on USART1: + + ------ -------- + SAMV71 SAMV71 + PIO Function + ------ -------- + PB04 TXD1 + PA21 RXD1 + ------ -------- + +Any of these options can be selected as the serial console by: + + 1. Enabling the UART/USART peripheral in the + "System Type -> Peripheral Selection" menu, then + 2. Configuring the peripheral in the "Drivers -> Serial Configuration" + menu. + +NOTE: If USART1 is used (TXD1, RXD1), then PB4 must be reconfigured in the +SUPC. Normally, PB4 is TDI. When it is reconfigured for use with USART1, +the capability to debug is lost! If you plan to debug you should most +certainly not use USART1. + +SD Card +======= + +Card Slot +--------- +The SAM V71 Xplained Ultra has one standard SD card connector which is +connected to the High Speed Multimedia Card Interface (HSMCI) of the SAM +V71. SD card connector: + + ------ ----------------- --------------------- + SAMV71 SAMV71 Shared functionality + Pin Function + ------ ----------------- --------------------- + PA30 MCDA0 (DAT0) + PA31 MCDA1 (DAT1) + PA26 MCDA2 (DAT2) + PA27 MCDA3 (DAT3) Camera + PA25 MCCK (CLK) Shield + PA28 MCCDA (CMD) + PD18 Card Detect (C/D) Shield + ------ ----------------- --------------------- + +Configuration Settings +---------------------- +Enabling HSMCI support. The SAMV7-XULT provides a one, full-size SD memory card slots. The full size SD card slot connects via HSMCI0. Support for the SD slots can be enabled with the following settings: + + System Type->SAMV7 Peripheral Selection + CONFIG_SAMV7_HSMCI0=y : To enable HSMCI0 support + CONFIG_SAMV7_XDMAC=y : XDMAC is needed by HSMCI0/1 + + System Type + CONFIG_SAMV7_GPIO_IRQ=y : PIO interrupts needed + CONFIG_SAMV7_GPIOD_IRQ=y : Card detect pin is on PD18 + + Device Drivers -> MMC/SD Driver Support + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMSCD_NSLOTS=1 : One slot per driver instance + CONFIG_MMCSD_MULTIBLOCK_DISABLE=y : (REVISIT) + CONFIG_MMCSD_HAVECARDDETECT=y : Supports card-detect PIOs + CONFIG_MMCSD_MMCSUPPORT=n : Interferes with some SD cards + CONFIG_MMCSD_SPI=n : No SPI-based MMC/SD support + CONFIG_MMCSD_SDIO=y : SDIO-based MMC/SD support + CONFIG_SDIO_DMA=y : Use SDIO DMA + CONFIG_SDIO_BLOCKSETUP=y : Needs to know block sizes + + RTOS Features -> Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : Driver needs work queue support + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization, OR + CONFIG_BOARD_INITIALIZE=y + +Using the SD card +----------------- + +1) After booting, the HSCMI device will appear as /dev/mmcsd0. + +2) If you try mounting an SD card with nothing in the slot, the mount will + fail: + + nsh> mount -t vfat /dev/mmcsd0 /mnt/sd0 + nsh: mount: mount failed: 19 + + NSH can be configured to provide errors as strings instead of + numbers. But in this case, only the error number is reported. The + error numbers can be found in nuttx/include/errno.h: + + #define ENODEV 19 + #define ENODEV_STR "No such device" + + So the mount command is saying that there is no device or, more + correctly, that there is no card in the SD card slot. + +3) Inserted the SD card. Then the mount should succeed. + + nsh> mount -t vfat /dev/mmcsd0 /mnt/sd0 + nsh> ls /mnt/sd1 + /mnt/sd1: + atest.txt + nsh> cat /mnt/sd1/atest.txt + This is a test + + NOTE: See the next section entitled "Auto-Mounter" for another way + to mount your SD card. + +4) Before removing the card, you must umount the file system. This is + equivalent to "ejecting" or "safely removing" the card on Windows: It + flushes any cached data to an SD card and makes the SD card unavailable + to the applications. + + nsh> umount -t /mnt/sd0 + + It is now safe to remove the card. NuttX provides into callbacks + that can be used by an application to automatically unmount the + volume when it is removed. But those callbacks are not used in + these configurations. + +Auto-Mounter +============ + + NuttX implements an auto-mounter than can make working with SD cards + easier. With the auto-mounter, the file system will be automatically + mounted when the SD card is inserted into the HSMCI slot and automatically + unmounted when the SD card is removed. + + Here is a sample configuration for the auto-mounter: + + File System Configuration + CONFIG_FS_AUTOMOUNTER=y + + Board-Specific Options + CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT=y + CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_FSTYPE="vfat" + CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_BLKDEV="/dev/mmcsd0" + CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_MOUNTPOINT="/mnt/sdcard" + CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_DDELAY=1000 + CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_UDELAY=2000 + + WARNING: SD cards should never be removed without first unmounting + them. This is to avoid data and possible corruption of the file + system. Certainly this is the case if you are writing to the SD card + at the time of the removal. If you use the SD card for read-only access, + however, then I cannot think of any reason why removing the card without + mounting would be harmful. + +LEDs and Buttons +================ + +LEDs +---- +There are two yellow LED available on the SAM V71 Xplained Ultra board that +can be turned on and off. The LEDs can be activated by driving the +connected I/O line to GND. + + ------ ----------- --------------------- + SAMV71 Function Shared functionality + PIO + ------ ----------- --------------------- + PA23 Yellow LED0 EDBG GPIO + PC09 Yellow LED1 LCD, and Shield + ------ ----------- --------------------- + +These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/sam_autoleds.c. The LEDs are used to encode +OS-related events as follows: + + ------------------- ----------------------- -------- -------- + SYMBOL Meaning LED state + LED0 LED1 + ------------------- ----------------------- -------- -------- + LED_STARTED NuttX has been started OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF + LED_IRQSENABLED Interrupts enabled OFF OFF + LED_STACKCREATED Idle stack created ON OFF + LED_INIRQ In an interrupt No change + LED_SIGNAL In a signal handler No change + LED_ASSERTION An assertion failed No change + LED_PANIC The system has crashed N/C Blinking + LED_IDLE MCU is is sleep mode Not used + ------------------- ----------------------- -------- -------- + +Thus if LED0 is statically on, NuttX has successfully booted and is, +apparently, running normally. If LED1 is flashing at approximately +2Hz, then a fatal error has been detected and the system has halted. + +NOTE: That LED0 is not used after completion of booting and may +be used by other board-specific logic. + +Buttons +------- +SAM V71 Xplained Ultra contains three mechanical buttons. One button is the +RESET button connected to the SAM V71 reset line and the others are generic +user configurable buttons. When a button is pressed it will drive the I/O +line to GND. + + ------ ----------- --------------------- + SAMV71 Function Shared functionality + PIO + ------ ----------- --------------------- + RESET RESET Trace, Shield, and EDBG + PA09 SW0 EDBG GPIO and Camera + PB12 SW1 EDBG SWD and Chip Erase + ------ ----------- --------------------- + +NOTES: + + - There are no pull-up resistors connected to the generic user buttons so + it is necessary to enable the internal pull-up in the SAM V71 to use the + button. + - PB12 is set up as a system flash ERASE pin when the firmware boots. To + use the SW1, PB12 has to be configured as a normal regular I/O pin in + the MATRIX module. For more information see the SAM V71 datasheet. + +AT24MAC402 Serial EEPROM +======================== + +Ethernet MAC Address +-------------------- +The SAM V71 Xplained Ultra features one external AT24MAC402 serial EEPROM +with a EIA-48 MAC address connected to the SAM V71 through I2C. This device +contains a MAC address for use with the Ethernet interface. + +Connectivity: + + ------ -------- -------- ------------------------------------------ + SAMV71 SAMV71 I2C Shared + Pin Function Function Functionality + ------ -------- -------- ------------------------------------------ + PA03 TWID0 SDA EXT1, EXT2, EDBG I2C, LCD, Camera, Audio, + MediaLB, and Shield + PA04 TWICK0 SCL EXT1, EXT2, EDBG I2C, LCD, Camera, Audio, + MediaLB, and Shield + ------ -------- -------- ------------------------------------------ + +I2C address: + + The 7-bit addresses of the AT24 part are 0b1010AAA for the normal 2Kbit + memory and 0b1011aaa for the "extended memory" where aaa is the state of + the A0, A1, and A3 pins on the part. On the SAMV71-XULT board, these + are all pulled high so the full, 7-bit address is 0x5f. + +Configuration +------------- + + System Type -> SAMV7 Peripheral Support + CONFIG_SAMV7_TWIHS0=y : Used to access the EEPROM + CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + + Device drivers -> Memory Technology Devices + CONFIG_MTD_AT24XX=y : Enable the AT24 device driver + CONFIG_AT24XX_SIZE=2 : Normal EEPROM is 2Kbit (256b) + CONFIG_AT24XX_ADDR=0x57 : Normal EEPROM address */ + CONFIG_AT24XX_EXTENDED=y : Supports an extended memory region + CONFIG_AT24XX_EXTSIZE=160 : Extended address up to 0x9f + +MTD Configuration Data +---------------------- +The AT24 EEPROM can also be used to storage of up to 256 bytes of +configuration data: + + Device drivers -> Memory Technology Devices + +The configuration data device will appear at /dev/config. + +S25FL116K QuadSPI FLASH +==================== + +A QSPI FLASH driver was added and verifed on 2015-11-07. This driver +operated in the memory mapped Serial Memory Mode (SMM). These +configuration options were enabled to test QSPI: + + CONFIG_SAMV7_QSPI=y + CONFIG_SAMV7_QSPI_DLYBCT=0 + CONFIG_SAMV7_QSPI_DLYBS=0 + CONFIG_SAMV7_QSPI_DMA=y + CONFIG_SAMV7_QSPI_DMATHRESHOLD=8 + +The MPU must be enabled to use QSPI: + + CONFIG_ARCH_USE_MPU=y + CONFIG_ARM_MPU=y + CONFIG_ARM_MPU_NREGIONS=16 + +And there options enable the driver for the on-board S25FL116K QuadSPI +FLASH: + + CONFIG_MTD_S25FL1=y + CONFIG_S25FL1_QSPIMODE=0 + CONFIG_S25FL1_QSPI_FREQUENCY=108000000 + +SmartFS +------- +The SmartFS file system is selected with the following settings. + + CONFIG_FS_SMARTFS=y + CONFIG_SMARTFS_ERASEDSTATE=0xff + CONFIG_SMARTFS_MAXNAMLEN=16 + + CONFIG_MTD_SMART=y + CONFIG_MTD_SMART_SECTOR_SIZE=512 + CONFIG_MTD_SMART_WEAR_LEVEL=y + +Upon boot, the on-board S25FL116k flash device will appears as: + + /dev/smart0 + +Before SmartFS can be used, it must be formatted. So this command +must be used one time the first time that the system boots: + + nsh> mksmartfs /dev/smart0 + +Then it can be mounted using the following NSH command: + + nsh> mount -t smartfs /dev/smart0 /mnt/qspi + +The first time that you boot the system, there will be a long delay +before the nsh> prompt. That long delay is SmartFS scanning the +large FLASH part. Likewise, the when you format the SmartFS, you +also expect a significant delay. + +A better application design would perform SmartFS initialization +asynchronously on a separate thread to avoid the delay at the user +interface. + +NXFFS +----- +The NXFFS file system is selected with the following settings. + + CONFIG_FS_NXFFS=y + CONFIG_NXFFS_ERASEDSTATE=0xff + CONFIG_NXFFS_MAXNAMLEN=255 + CONFIG_NXFFS_PACKTHRESHOLD=32 + CONFIG_NXFFS_PREALLOCATED=y + CONFIG_NXFFS_TAILTHRESHOLD=8192 + +The NXFFS file system is automatically mounted by logic src/sam_bringup.c when the system boots: + + nsh> mount + /mnt/s25fl1 type nxffs + nsh> echo "This is a test" >/mnt/s25fl1/atest.txt + nsh> ls /mnt/s25fl1 + /mnt/s25fl1: + atest.txt + nsh> cat /mnt/s25fl1/atest.txt + This is a test + +Character Driver +---------------- +If neither SmartFS nor NXFFS are defined, then the S25FL1 driver will be +wrapped as a character driver and available as /dev/mtd0. + +Program FLASH Access +==================== +An on-chip FLASH driver was added and verifed on 2015-11-13. These +configuration options were enabled to test the on-chip FLASH support: + + CONFIG_MTD_PROGMEM=y + CONFIG_SAMV7_PROGMEM=y + CONFIG_SAMV7_PROGMEM_NSECTORS=8 + +D-Cache must be configured in write-through mode: + + CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y + +The total FLASH on the SAMV71 is organized as 128KB/sector x 16 sectors += 2MB. The sectors are all uniform (except for sector zero which will +never be used by the driver). + +The configuration sets aside 8 sectors, or 8 * 128KB = 1MB of the FLASH +for programmable memory (CONFIG_SAMV7_PROGMEM_NSECTORS=8). The exact +number of sectors set aside is optional. + +NOTE: Ideally, one should also modify the linker script and reduce the size +of the available FLASH the amount set aside for program usage to avoid +difficult run-time problems. That would be 1MB in this configuration. I +did not do that only because I know that my test program is small. + +When the system boots, you can see the FLASH driver: + + NuttShell (NSH) NuttX-7.12 + nsh> ls /dev + /dev: + config + console + mmcsd0 + mtd1 + mtdblock1 + null + ttyS0 + +/dev/mtdblock1 is a block driver that can be used with any file system on +the FLASH; /dev/mtd1 is the corresponding character driver used by the +apps/examples/media test. + +Each of the uniform sectors is divided up into 256 512B "pages". This is +not really useful, however, because we can only erase a minimum of groups +of 16 pages or 8KB. In the code, I you will see that I refer to these +groups of 16 pages as "clusters." So the cluster is the smallest thing +that you can perform a read/write/modify operation on. + +Using 8 sectors yields 16 *8 = 128 clusters (aka blocks). You can see +this when the apps/examples/media test runs: + + nsh> media + MTD Geometry: + blocksize: 8192 + erasesize: 8192 + neraseblocks: 128 + Using: + blocksize: 8192 + nblocks: 128 + Write/Verify: Block 0 + Write/Verify: Block 1 + Write/Verify: Block 2 + Write/Verify: Block 3 + ... + Write/Verify: Block 127 + Re-read/Verify: Block 0 + Re-read/Verify: Block 1 + Re-read/Verify: Block 2 + Re-read/Verify: Block 3 + ... + Re-read/Verify: Block 127 + nsh> + +NOTE: The media test can be added to the NSH configuration with: + + CONFIG_EXAMPLES_MEDIA=y + CONFIG_EXAMPLES_MEDIA_BLOCKSIZE=8192 + CONFIG_EXAMPLES_MEDIA_DEVPATH="/dev/mtd1" + +Networking +========== + +KSZ8061RNBVA Connections +------------------------ + + ------ --------- --------- -------------------------- + SAMV71 SAMV71 Ethernet Shared functionality + Pin Function Function + ------ --------- --------- -------------------------- + PD00 GTXCK REF_CLK Shield + PD01 GTXEN TXEN + PD02 GTX0 TXD0 + PD03 GTX1 TXD1 + PD04 GRXDV CRS_DV Trace + PD05 GRX0 RXD0 Trace + PD06 GRX1 RXD1 Trace + PD07 GRXER RXER Trace + PD08 GMDC MDC Trace + PD09 GMDIO MDIO + PA19 GPIO INTERRUPT EXT1, Shield + PA29 GPIO SIGDET + PC10 GPIO RESET + ------ --------- --------- -------------------------- + +Selecting the GMAC peripheral +----------------------------- + + System Type -> SAMV7 Peripheral Support + CONFIG_SAMV7_EMAC0=y : Enable the GMAC peripheral (aka, EMAC0) + CONFIG_SAMV7_TWIHS0=y : We will get the MAC address from the AT24 EEPROM + CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + + System Type -> EMAC device driver options + CONFIG_SAMV7_EMAC0_NRXBUFFERS=16 : Set aside some RS and TX buffers + CONFIG_SAMV7_EMAC0_NTXBUFFERS=8 + CONFIG_SAMV7_EMAC0_RMII=y : The RMII interfaces is used on the board + CONFIG_SAMV7_EMAC0_AUTONEG=y : Use autonegotiation + CONFIG_SAMV7_EMAC0_PHYADDR=1 : KSZ8061 PHY is at address 1 + CONFIG_SAMV7_EMAC0_PHYSR=30 : Address of PHY status register on KSZ8061 + CONFIG_SAMV7_EMAC0_PHYSR_ALTCONFIG=y : Needed for KSZ8061 + CONFIG_SAMV7_EMAC0_PHYSR_ALTMODE=0x7 : " " " " " " + CONFIG_SAMV7_EMAC0_PHYSR_10HD=0x1 : " " " " " " + CONFIG_SAMV7_EMAC0_PHYSR_100HD=0x2 : " " " " " " + CONFIG_SAMV7_EMAC0_PHYSR_10FD=0x5 : " " " " " " + CONFIG_SAMV7_EMAC0_PHYSR_100FD=0x6 : " " " " " " + + PHY selection. Later in the configuration steps, you will need to select + the KSZ8061 PHY for EMAC (See below) + + Networking Support + CONFIG_NET=y : Enable Neworking + CONFIG_NET_NOINTS=y : Use the work queue, not interrupts for processing + CONFIG_NET_SOCKOPTS=y : Enable socket operations + CONFIG_NET_ETH_MTU=562 : Maximum packet size (MTU) 1518 is more standard + CONFIG_NET_ETH_TCP_RECVWNDO=562 : Should be the same as CONFIG_NET_ETH_MTU + CONFIG_NET_ARP=y : ARP support should be enabled + CONFIG_NET_ARP_SEND=y : Use ARP to get peer address before sending + CONFIG_NET_TCP=y : Enable TCP/IP networking + CONFIG_NET_TCPBACKLOG=y : Support TCP/IP backlog + CONFIG_NET_TCP_READAHEAD=y : Enable TCP read-ahead buffering + CONFIG_NET_TCP_WRITE_BUFFERS=y : Enable TCP write buffering + CONFIG_NET_UDP=y : Enable UDP networking + CONFIG_NET_BROADCAST=y : Support UDP broadcase packets + CONFIG_NET_ICMP=y : Enable ICMP networking + CONFIG_NET_ICMP_PING=y : Needed for NSH ping command + : Defaults should be okay for other options + Device drivers -> Network Device/PHY Support + CONFIG_NETDEVICES=y : Enabled PHY selection + CONFIG_ETH0_PHY_KSZ8061=y : Select the KSZ8061 PHY used with EMAC0 + + Device drivers -> Memory Technology Devices + CONFIG_MTD_AT24XX=y : Enable the AT24 device driver + CONFIG_AT24XX_SIZE=2 : Normal EEPROM is 2Kbit (256b) + CONFIG_AT24XX_ADDR=0x57 : Normal EEPROM address */ + CONFIG_AT24XX_EXTENDED=y : Supports an extended memory region + CONFIG_AT24XX_EXTSIZE=160 : Extended address up to 0x9f + + RTOS Features ->Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : Work queue support is needed + CONFIG_SCHED_HPWORK=y + CONFIG_SCHED_HPWORKSTACKSIZE=2048 : Might need to be increased + + Application Configuration -> Network Utilities + CONFIG_NETDB_DNSCLIENT=y : Enable host address resolution + CONFIG_NETUTILS_TELNETD=y : Enable the Telnet daemon + CONFIG_NETUTILS_TFTPC=y : Enable TFTP data file transfers for get and put commands + CONFIG_NETUTILS_NETLIB=y : Network library support is needed + CONFIG_NETUTILS_WEBCLIENT=y : Needed for wget support + : Defaults should be okay for other options + Application Configuration -> NSH Library + CONFIG_NSH_TELNET=y : Enable NSH session via Telnet + CONFIG_NSH_IPADDR=0x0a000002 : Select an IP address + CONFIG_NSH_DRIPADDR=0x0a000001 : IP address of gateway/host PC + CONFIG_NSH_NETMASK=0xffffff00 : Netmask + CONFIG_NSH_NOMAC=n : We will get the IP address from EEPROM + : Defaults should be okay for other options + +Cache-Related Issues +-------------------- + +I- and D-Caches can be enabled but the D-Cache must be enabled in write- +through mode. This is to work around issues with the RX and TX descriptors +with are 8-bytes in size. But the D-Cache cache line size is 32-bytes. +That means that you cannot reload, clean or invalidate a descriptor without +also effecting three neighboring descriptors. Setting write through mode +eliminates the need for cleaning the D-Cache. If only reloading and +invalidating are done, then there is no problem. + +Using the network with NSH +-------------------------- + +So what can you do with this networking support? First you see that +NSH has several new network related commands: + + ifconfig, ifdown, ifup: Commands to help manage your network + get and put: TFTP file transfers + wget: HTML file transfers + ping: Check for access to peers on the network + Telnet console: You can access the NSH remotely via telnet. + +You can also enable other add on features like full FTP or a Web +Server or XML RPC and others. There are also other features that +you can enable like DHCP client (or server) or network name +resolution. + +By default, the IP address of the SAMV71-XULT will be 10.0.0.2 and +it will assume that your host is the gateway and has the IP address +10.0.0.1. + + nsh> ifconfig + eth0 HWaddr 00:e0:de:ad:be:ef at UP + IPaddr:10.0.0.2 DRaddr:10.0.0.1 Mask:255.255.255.0 + +You can use ping to test for connectivity to the host (Careful, +Window firewalls usually block ping-related ICMP traffic). On the +target side, you can: + + nsh> ping 10.0.0.1 + PING 10.0.0.1 56 bytes of data + 56 bytes from 10.0.0.1: icmp_seq=1 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=2 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=3 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=4 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=5 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=6 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=7 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=8 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=9 time=0 ms + 56 bytes from 10.0.0.1: icmp_seq=10 time=0 ms + 10 packets transmitted, 10 received, 0% packet loss, time 10100 ms + +NOTE: In this configuration is is normal to have packet loss > 0% +the first time you ping due to the default handling of the ARP +table. + +On the host side, you should also be able to ping the SAMV71-XULT: + + $ ping 10.0.0.2 + +You can also log into the NSH from the host PC like this: + + $ telnet 10.0.0.2 + Trying 10.0.0.2... + Connected to 10.0.0.2. + Escape character is '^]'. + sh_telnetmain: Session [3] Started + + NuttShell (NSH) NuttX-7.9 + nsh> help + help usage: help [-v] [] + + [ echo ifconfig mkdir mw sleep + ? exec ifdown mkfatfs ping test + cat exit ifup mkfifo ps umount + cp free kill mkrd put usleep + cmp get losetup mh rm wget + dd help ls mount rmdir xd + df hexdump mb mv sh + + Builtin Apps: + nsh> + +NOTE: If you enable this feature, you experience a delay on booting. +That is because the start-up logic waits for the network connection +to be established before starting NuttX. In a real application, you +would probably want to do the network bringup on a separate thread +so that access to the NSH prompt is not delayed. + +This delay will be especially long if the board is not connected to +a network. On the order of a minute! You will probably think that +NuttX has crashed! And then, when it finally does come up, the +network will not be available. + +Network Initialization Thread +----------------------------- +There is a configuration option enabled by CONFIG_NSH_NETINIT_THREAD +that will do the NSH network bring-up asynchronously in parallel on +a separate thread. This eliminates the (visible) networking delay +altogether. This networking initialization feature by itself has +some limitations: + + - If no network is connected, the network bring-up will fail and + the network initialization thread will simply exit. There are no + retries and no mechanism to know if the network initialization was + successful. + + - Furthermore, there is no support for detecting loss of the network + connection and recovery of networking when the connection is restored. + +Both of these shortcomings can be eliminated by enabling the network +monitor: + +Network Monitor +--------------- +By default the network initialization thread will bring-up the network +then exit, freeing all of the resources that it required. This is a +good behavior for systems with limited memory. + +If the CONFIG_NSH_NETINIT_MONITOR option is selected, however, then the +network initialization thread will persist forever; it will monitor the +network status. In the event that the network goes down (for example, if +a cable is removed), then the thread will monitor the link status and +attempt to bring the network back up. In this case the resources +required for network initialization are never released. + +Pre-requisites: + + - CONFIG_NSH_NETINIT_THREAD as described above. + + - CONFIG_NETDEV_PHY_IOCTL. Enable PHY IOCTL commands in the Ethernet + device driver. Special IOCTL commands must be provided by the Ethernet + driver to support certain PHY operations that will be needed for link + management. There operations are not complex and are implemented for + the Atmel SAMV7 family. + + - CONFIG_ARCH_PHY_INTERRUPT. This is not a user selectable option. + Rather, it is set when you select a board that supports PHY interrupts. + In most architectures, the PHY interrupt is not associated with the + Ethernet driver at all. Rather, the PHY interrupt is provided via some + board-specific GPIO and the board-specific logic must provide support + for that GPIO interrupt. To do this, the board logic must do two things: + (1) It must provide the function arch_phy_irq() as described and + prototyped in the nuttx/include/nuttx/arch.h, and (2) it must select + CONFIG_ARCH_PHY_INTERRUPT in the board configuration file to advertise + that it supports arch_phy_irq(). This logic can be found at + nuttx/configs/samv71-xult/src/sam_ethernet.c. + + - And a few other things: UDP support is required (CONFIG_NET_UDP) and + signals must not be disabled (CONFIG_DISABLE_SIGNALS). + +Given those prerequisites, the network monitor can be selected with these +additional settings. + + Networking Support -> Networking Device Support + CONFIG_NETDEV_PHY_IOCTL=y : Enable PHY ioctl support + + Application Configuration -> NSH Library -> Networking Configuration + CONFIG_NSH_NETINIT_THREAD : Enable the network initialization thread + CONFIG_NSH_NETINIT_MONITOR=y : Enable the network monitor + CONFIG_NSH_NETINIT_RETRYMSEC=2000 : Configure the network monitor as you like + CONFIG_NSH_NETINIT_SIGNO=18 + +USBHS Device Controller Driver +============================== +The USBHS device controller driver is enabled with he following configuration +settings: + + Device Drivers -> USB Device Driver Support + CONFIG_USBDEV=y : Enable USB device support + For full-speed/low-power mode: + CONFIG_USBDEV_DUALSPEED=n : Disable High speed support + For high-speed/normal mode: + CONFIG_USBDEV_DUALSPEED=y : Enable High speed support + CONFIG_USBDEV_DMA=y : Enable DMA methods + CONFIG_USBDEV_MAXPOWER=100 : Maximum power consumption + CONFIG_USBDEV_SELFPOWERED=y : Self-powered device + + System Type -> SAMV7 Peripheral Selection + CONFIG_SAMV7_USBDEVHS=y + + System Type -> SAMV7 USB High Sppeed Device Controller (DCD options + For full-speed/low-power mode: + CONFIG_SAMV7_USBDEVHS_LOWPOWER=y : Select low power mode + For high-speed/normal mode: + CONFIG_SAMV7_USBDEVHS_LOWPOWER=n : Don't select low power mode + CONFIG_SAMV7_USBHS_NDTDS=32 : Number of DMA transfer descriptors + CONFIG_SAMV7_USBHS_PREALLOCATE=y : Pre-allocate descriptors + +As noted above, this driver will not work correctly if the write back +data cache is enabled. You must have: + + CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y + +In order to be usable, you must all enabled some class driver(s) for the +USBHS device controller. Here, for example, is how to configure the CDC/ACM +serial device class: + + Device Drivers -> USB Device Driver Support + CONFIG_CDCACM=y : USB Modem (CDC ACM) support + CONFIG_CDCACM_EP0MAXPACKET=64 : Enpoint 0 packet size + CONFIG_CDCACM_EPINTIN=1 : Interrupt IN endpoint number + CONFIG_CDCACM_EPINTIN_FSSIZE=64 : Full speed packet size + CONFIG_CDCACM_EPINTIN_HSSIZE=64 : High speed packet size + CONFIG_CDCACM_EPBULKOUT=3 : Bulk OUT endpoint number + CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 : Full speed packet size + CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 : High speed packet size + CONFIG_CDCACM_EPBULKIN=2 : Bulk IN endpoint number + CONFIG_CDCACM_EPBULKIN_FSSIZE=64 : Full speed packet size + CONFIG_CDCACM_EPBULKIN_HSSIZE=512 : High speed packet size + CONFIG_CDCACM_NWRREQS=4 : Number of write requests + CONFIG_CDCACM_NRDREQS=8 : Number of read requests + CONFIG_CDCACM_BULKIN_REQLEN=96 : Size of write request buffer (for full speed) + CONFIG_CDCACM_BULKIN_REQLEN=768 : Size of write request buffer (for high speed) + CONFIG_CDCACM_RXBUFSIZE=257 : Serial read buffer size + CONFIG_CDCACM_TXBUFSIZE=193 : Serial transmit buffer size (for full speed) + CONFIG_CDCACM_TXBUFSIZE=769 : Serial transmit buffer size (for high speed) + CONFIG_CDCACM_VENDORID=0x0525 : Vendor ID + CONFIG_CDCACM_PRODUCTID=0xa4a7 : Product ID + CONFIG_CDCACM_VENDORSTR="NuttX" : Vendor string + CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" : Product string + + Device Drivers -> Serial Driver Support + CONFIG_SERIAL_REMOVABLE=y : Support for removable serial device + +The CDC/ACM application provides commands to connect and disconnect the +CDC/ACM serial device: + + CONFIG_SYSTEM_CDCACM=y : Enable connect/disconnect support + CONFIG_SYSTEM_CDCACM_DEVMINOR=0 : Use device /dev/ttyACM0 + CONFIG_CDCACM_RXBUFSIZE=??? : A large RX may be needed + +If you include this CDC/ACM application, then you can connect the CDC/ACM +serial device to the host by entering the command 'sercon' and you detach +the serial device with the command 'serdis'. If you do no use this +application, they you will have to write logic in your board initialization +code to initialize and attach the USB device. + +Audio Interface +=============== + +WM8904 Audio Codec +------------------ + + SAMV71 Interface WM8904 Interface + ---- ------------ ------- ---------------------------------- + PIO Usage Pin Function + ---- ------------ ------- ---------------------------------- + PA3 TWD0 SDA I2C control interface, data line + PA4 TWCK0 SCLK I2C control interface, clock line + PA10 RD ADCDAT Digital audio output (microphone) + PB18 PCK2 MCLK Master clock + PB0 TF LRCLK Left/right data alignment clock + PB1 TK BCLK Bit clock, for synchronization + PD11 GPIO IRQ Audio interrupt + PD24 RF LRCLK Left/right data alignment clock + PD26 TD DACDAT Digital audio input (headphone) + ---- ------------ ------- ---------------------------------- + +CP2100-CP Fractional-N Clock Multiplier +-------------------------------------- + + SAMV71 Interface CP2100-CP Interface + ---- ------------ ------- ---------------------------------- + PIO Usage Pin Function + ---- ------------ ------- ---------------------------------- + PA3 TWD0 SDA I2C control interface, data line + PA4 TWCK0 SCLK I2C control interface, clock line + PD21 TIOA11 CLK_IN PLL input + - - XTI/XTO 12.0MHz crystal + PA22 RK CLK_OUT PLL output + - - AUX_OUT N/C + ---- ------------ ------- ---------------------------------- + +maXTouch Xplained Pro +===================== + +Testing has also been performed using the maXTouch Xplained Pro LCD +(ATMXT-XPRO). + + ************************************************************************** + * WARNING: * + * The maXTouch chip was not configured on all of the maXTouch Xplained * + * Pro boards that I have used (which is two). The maXTouch is * + * completely non-functional with no configuration in its NV memory! * + * * + * My understanding is that this configuration can be set on Linux * + * using the mxp-app program which is available on GitHub. There is an * + * (awkward) way to do this with NuttX too. In order to set the * + * maXTouch configuration with Nuttx you need to do these things: * + * * + * - Copy the function atmxt_config() from the file * + * configs/samv71-xult/src/atmxt_config.c into the file * + * drivers/input/mxt.c * + * - Add a call to atmxt_config() in drivers/input/mxt.c in the * + * function mxt_register() just before the touchscreen device is * + * registered (i.e, the call to register_driver()). * + * - Run the code one time. Your maXTouch is configured and should * + * now work. * + * - Don't forget to remove atmxt_config() from drivers/input/mxt.c and * + * restore driver as it was. * + * * + ************************************************************************** + + +maXTouch Xplained Pro Standard Extension Header +----------------------------------------------- +The LCD could be connected either via EXT1 or EXT2 using the 2x10 20-pin +cable and the maXTouch Xplained Pro standard extension header. Access would +then be performed in SPI mode. + +NOTE: There is currently no support for use of the LCD in SPI mode. See +the next paragraph where the LCD/EXT4 connection is discussion. + +NOTE the 3 switch mode selector on the back of the maXtouch. All switches +should be in the ON position to select 4-wire SPI mode. + + ---- -------- ---- ----------- ---- ----------- ------------------------------------------ + SAMV71-XULT maxTouch Xplained Pro + PIN FUNCTION EXT1 FUNC EXT2 FUNC Description + ---- -------- ---- ----------- ---- ----------- ------------------------------------------ + 1 ID - - - - Communication line to ID chip + 2 GND - - - - Ground + 3 N/C PC31 - PD30 - + 4 N/C PA19 - PC13 - + 5 GPIO PB3 GPIO PA6 GPIO Command/Data Select + 6 N/C PB2 - PD11 - + 7 PWM PA0 PWMC0_PWMH0 PC19 PWMC0_PMWH2 Backlight control + 8 N/C PC30 - PD26 - + 9 GPIO/IRQ PD28 GPIO PA2 GPIO IRQ from maXTouch controller + 10 GPIO PA5 GPIO PA24 GPIO RESET signal for maXTouch and LCD controller + 11 I2C SDA PA3 TWID0 PA3 TWID0 I2C Data line for maXTouch controller + 12 I2C SCL PA4 TWICK0 PA4 TWICK0 I2C Clock line for maXTouch controller + 13 N/C PB0 - PA21 - + 14 N/C PB1 - PB4 - + 15 CS PD25 GPIO PD27 GPIO CS line for LCD controller + 16 SPI MOSI PD21 SPI0_MOSI PD21 SPI0_MOSI SPI Data to LCD controller + 17 SPI MISO PD20 SPI0_MISO PD20 SPI0_MISO SPI Data from LCD controller + 18 SPI SCK PD22 SPI0_SPCK PD22 SPI0_SPCK SPI Clock line + 19 GND - - - - Ground + 20 VCC - - - - Target supply voltage + ---- -------- ---- ----------- ---- ----------- ------------------------------------------ + +NOTE: Use of EXT1 conflicts with the Arduino RXD pin (PD28). You cannot +put the maXTouch Xplained in EXT1 and also use the Arduino RXD/TXD pins +as your serial console. + +maXTouch Xplained Pro Xplained Pro LCD Connector +------------------------------------------------ +It is also possible to connect the LCD via the flat cable to the EXT4 LCD +connector. In this case, you would use the SMC/EBI to communicate with the +LCD. + +NOTE: (1) Only the parallel interface is supported by the SAMV71-XULT and (2) +the 3 switch mode selector on the back of the maXtouch. These switches should +be in the OFF-ON-OFF positions to select 16-bit color mode. + + ----------------- ------------- ----------------------------------------------------------- + LCD SAMV71 Description + Pin Function Pin Function + ---- ------------ ---- -------- ----------------------------------------------------------- + 1 ID - - Communication line to ID chip on extension board + 2 GND - GND Ground + 3 D0 PC0 D0 Data line + 4 D1 PC1 D1 Data line + 5 D2 PC2 D2 Data line + 6 D3 PC3 D3 Data line + 7 GND - GND Ground + 8 D4 PC4 D4 Data line + 9 D5 PC5 D5 Data line + 10 D6 PC6 D6 Data line + 11 D7 PC7 D7 Data line + 12 GND - GND Ground + 13 D8 PE0 D8 Data line + 14 D9 PE1 D9 Data line + 15 D10 PE2 D10 Data line + 16 D11 PE3 D11 Data line + 17 GND - GND Ground + 18 D12 PE4 D12 Data line + 19 D13 PE5 D13 Data line + 20 D14 PA15 D14 Data line + 21 D15 PA16 D15 Data line + 22 GND - GND Ground + 23 D16 - - Data line + 24 D17 - - Data line + 25 N/C - - + 26 N/C - - + 27 GND - GND Ground + 28 N/C - - + 29 N/C - - + 30 N/C - - + 31 N/C - - + 32 GND - GND Ground + 33 PCLK/ PC30 GPIO SMC: Pixel clock Display RAM select. + CMD_DATA_SEL SPI: One address line of the MCU for displays where it + is possible to select either the register or the + data interface + 34 VSYNC/CS PD19 NCS3 SMC: Vertical synchronization. + SPI: Chip select + 35 HSYNC/WE PC8 NWE SMC: Horizontal synchronization + SPI: Write enable signal + 36 DATA ENABLE/ PC11 NRD SMC: Data enable signal + RE SPI: Read enable signal + 37 SPI SCK - - SPI: Clock for SPI + 38 SPI MOSI - - SPI: Master out slave in line of SPI + 39 SPI MISO - - SPI: Master in slave out line of SPI + 40 SPI SS - - SPI: Slave select for SPI + 41 N/C - - + 42 TWI SDA PA3 TWD0 I2C data line (maXTouch®) + 43 TWI SCL PA4 TWCK0 I2C clock line (maXTouch) + 44 IRQ1 PD28 WKUP5 maXTouch interrupt line + 45 N/C PA2 WKUP2 + 46 PWM PC9 TIOB7 Backlight control + 47 RESET PC13 GPIO Reset for both display and maxTouch + 48 VCC - - 3.3V power supply for extension board + 49 VCC - - 3.3V power supply for extension board + 50 GND - - Ground + ---- ------------ ---- -------- ----------------------------------------------------------- + +NOTE: Use of LCD/EXT4 conflicts with the Arduino RXD pin (PD28). You cannot +put the maXTouch Xplained in LCD/EXT4 and also use the Arduino RXD/TXD pins +as your serial console. + +Connecting the flat cable. I was embarrassed to say that I did not know how +the connectors worked. Let me share this so that, perhaps, I can save you +the same embarrassment: + +- The maXTouch Xplained Pro has an Omron XF2M-5015-1A connector. There is a + black bar at back (toward the baord). Raise that bar and insert the cable + with the contacts away from the board. Lower that bar to lock the cable + in place. + +- The SAMV71-Xult has a TE Connectivity 5-1734839-0 FPC connector that works + differently. On each size of the connector are two small white tabs. Pull + these out and away from the board. Insert the ribbon with the contacts + toward the board. Lock the cable in place by pushing the tabs back in + place. + +MXT Configuration Options +------------------------- + + System Type -> SAMV7 Peripheral Support + CONFIG_SAMV7_TWIHS0=y : Needed by the MaXTouch controller + CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + + Board Selection -> + CONFIG_SAMV71XULT_MXTXPLND=y : MaXTouch Xplained is connected + CONFIG_SAMV71XULT_MXTXPLND_EXT1=y : Connected on EXT1, or + CONFIG_SAMV71XULT_MXTXPLND_EXT2=y : Connected on EXT2, or + CONFIG_SAMV71XULT_MXTXPLND_LCD=y : Connected on LCD + CONFIG_SAMV71XULT_MXT_DEVMINOR=0 : Register as /dev/input0 + CONFIG_SAMV71XULT_MXT_I2CFREQUENCY=400000 + + NOTE: When selecting EXT1 or EXT2, be conscious of possible pin conflicts. + EXT1, for example, will conflict with the use of the Arduino TXD and RXD + pins for the serial console + + Device Drivers -> Input Devices + CONFIG_INPUT=y : Enable support for human input devices + CONFIG_INPUT_MXT=y : Enable support for the maXTouch controller + + The following enables a small built-in application that can be used to + test the touchscreen: + + Application Configuration -> Examples -> Touchscreen example + CONFIG_EXAMPLES_TOUCHSCREEN=y : Enables the example + CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y : Have board-specific intialization + CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0" + CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0 + +ILI9488 Configuration Options +----------------------------- + + Currently only the parallel mode is supported. This means that the LCD can + only be used in connected in the LCD (EXT4) connection. + + System Type -> SAMV7 Peripheral Support + CONFIG_SAMV7_SMC=y : Needed by the ILI9466 driver controller + CONFIG_SAMV7_XDMAC=y : Needed by the ILI9466 driver + CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + + Board Selection -> + CONFIG_SAMV71XULT_MXTXPLND=y : MaXTouch Xplained is connected + CONFIG_SAMV71XULT_MXTXPLND_LCD=y : Must be connected on LCD + + NOTE: When selecting EXT1 or EXT2, be conscious of possible pin conflicts. + EXT1, for example, will conflict with the use of the Arduino TXD and RXD + pins for the serial console + + Device Drivers -> LCD drivers + CONFIG_LCD=y : Enable support for LCDs + + Graphics + CONFIG_NX=y : Enable Graphics supported + CONFIG_NX_LCDDRIVER=y : Enable LCD driver support + CONFIG_NX_DISABLE_*BPP=y : When * is {1,2,4,8,24, and 32} + CONFIG_NXFONTS_CHARBITS=7 + CONFIG_NXFONT_SANS23X27=y : One font must be enabled + + There are several graphics examples that can be enabled under apps/examples. + nxlines is one of these and can be enabled as follows. See + apps/examples/README.txt for information about configuring other graphics + examples. + + The following enables a small built-in application that can be used to + test the touchscreen: + + Application Configuration -> Examples -> NX lines example + CONFIG_EXAMPLES_NXLINES=y : Enables the nxlines example + CONFIG_EXAMPLES_NXLINES_VPLANE=0 + CONFIG_EXAMPLES_NXLINES_DEVNO=0 + +MCAN1 Loopback Test +=================== + + MCAN1 + ----- + SAM V71 Xplained Ultra has two MCAN modules that performs communication according + to ISO11898-1 (Bosch CAN specification 2.0 part A,B) and Bosch CAN FD + specification V1.0. MCAN1 is connected to an on-board ATA6561 CAN physical-layer + transceiver. + + ------- -------- -------- ------------- + SAM V71 FUNCTION ATA6561 SHARED + PIN FUNCTION FUNCTIONALITY + ------- -------- -------- ------------- + PC14 CANTX1 TXD Shield + PC12 CANRX1 RXD Shield + ------- -------- -------- ------------- + + Enabling MCAN1 + -------------- + These modifications may be applied to the samv71-xult/nsh configuration in order + to enable MCAN1: + + Device Drivers -> CAN Driver support + CONFIG_CAN=y # Enable the upper-half CAN driver + CONFIG_CAN_FIFOSIZE=8 + CONFIG_CAN_NPENDINGRTR=4 + + System Type -> SAMV7 Peripheral Selections + CONFIG_SAMV7_MCAN1=y # Enable MCAN1 as the lower-half + + System Type -> MCAN device driver options + CONFIG_SAMV7_MCAN_CLKSRC_MAIN=y # Use the MAIN clock as the source + CONFIG_SAMV7_MCAN_CLKSRC_PRESCALER=1 + + System Type ->MCAN device driver options -> MCAN1 device driver options + CONFIG_SAMV7_MCAN1_ISO11899_1=y # Loopback test only support ISO11899-1 + CONFIG_SAMV7_MCAN1_LOOPBACK=y # Needed for loopback test + CONFIG_SAMV7_MCAN1_BITRATE=500000 # Not critical for loopback test + CONFIG_SAMV7_MCAN1_PROPSEG=2 # Bit timing setup + CONFIG_SAMV7_MCAN1_PHASESEG1=11 # " " " " " " + CONFIG_SAMV7_MCAN1_PHASESEG2=11 # " " " " " " + CONFIG_SAMV7_MCAN1_FSJW=4 # " " " " " " + CONFIG_SAMV7_MCAN1_FBITRATE=2000000 # CAN_FD BTW mode is not used + CONFIG_SAMV7_MCAN1_FPROPSEG=2 # " " " " " " "" " " " " + CONFIG_SAMV7_MCAN1_FPHASESEG1=4 # " " " " " " "" " " " " + CONFIG_SAMV7_MCAN1_FPHASESEG2=4 # " " " " " " "" " " " " + CONFIG_SAMV7_MCAN1_FFSJW=2 # " " " " " " "" " " " " + CONFIG_SAMV7_MCAN1_NSTDFILTERS=0 # Filters are not used in the loopback test + CONFIG_SAMV7_MCAN1_NEXTFILTERS=0 # " " " " " " " " "" " " " " " " + CONFIG_SAMV7_MCAN1_RXFIFO0_32BYTES=y # Each RX FIFO0 element is 32 bytes + CONFIG_SAMV7_MCAN1_RXFIFO0_SIZE=8 # There are 8 queue elements + CONFIG_SAMV7_MCAN1_RXFIFO0_32BYTES=y # Each RX FIFO1 element is 32 bytes + CONFIG_SAMV7_MCAN1_RXFIFO0_SIZE=8 # There are 8 queue elements + CONFIG_SAMV7_MCAN1_RXBUFFER_32BYTES=y # Each RX BUFFER is 32 bytes + CONFIG_SAMV7_MCAN1_TXBUFFER_32BYTES=y # Each TX BUFFER is 32 bytes + CONFIG_SAMV7_MCAN1_TXFIFOQ_SIZE=8 # There are 8 queue elements + CONFIG_SAMV7_MCAN1_TXEVENTFIFO_SIZE=0 # The event FIFO is not used + + Board Selection + CONFIG_LIB_BOARDCTL=y # Needed for CAN initialization + CONFIG_BOARDCTL_CANINIT=y # Enabled CAN initialization + + Enabling the CAN Loopback Test + ------------------------------ + Application Configuration -> Examples -> CAN Example + CONFIG_EXAMPLES_CAN=y # Enables the CAN test + + Enabling CAN Debug Output + ------------------------- + Build Setup -> Debug Options + CONFIG_DEBUG=y # Enables general debug features + CONFIG_DEBUG_VERBOSE=y # Enables verbose output + CONFIG_DEBUG_CAN=y # Enables debug output from CAN + + CONFIG_STACK_COLORATION=y # Monitor stack usage + CONFIG_DEBUG_SYMBOLS=y # Needed only for use with a debugger + CONFIG_DEBUG_NOOPT=y # Disables optimization + + System Type -> MCAN device driver options + CONFIG_SAMV7_MCAN_REGDEBUG=y # Super low level register debug output + +SPI Slave +========= + + An interrutp driven SPI slave driver as added on 2015-08-09 but has not + been verified as of this writing. See discussion in include/nuttx/spi/slave.h + and below. + + I do not yet have a design that supports SPI slave DMA. And, under + certain, very limited conditions, I think it can be done. Those + certain conditions are: + + a) The master does not tie the chip select to ground. The master must + raise chip select at the end of the transfer. Then I do not need to + know the length of the transfer; I can cancel the DMA when the chip + is de-selected. + + b) The protocol includes a dummy read after sending the command. This + is very common in SPI device and should not be an issue if it is + specified. This dummy read time provides time to set up the DMA. + So the protocol would be: + + i) Master drops the chip select. + ii) Master sends the command which will indicate whether the master + is reading, writing, or exchanging data. The master discards + the garbage return value. + iii) Slave is interrupted when the command word is received. The + SPI device then decodes the command word and setups up the + subsequent DMA. + iv) Master sends a dummy word and discards the return value. + During the bit times to shift the dummy word, the slave has time + to set up the DMA. + v) Master then reads or writes (or exchanges) the data If the DMA + is in place, the transfer should continue normally. + vi) At the end of the data transfer the master raises the chip + select. + + c) There are limitations in the word time, i.e., the time between the + interrupt for each word shifted in from the master. + + The controller driver will get events after the receipt of each word in + ii), iv), and v). The time between each word will be: + + word-time = nbits * bit time + inter-word-gap + + So for an 8 bit interface at 20MHz, the words will be received from the + master a 8 * 50nsec = 400 nsec + inter-word-gap. That is the time + during which the dummy word would be shifted and during which we + receive the interrupt for the command word, interpret the command word, + and to set up the DMA for the remaining word transfer. I don't think + that is possible, at least not at 20 MHz. + + That is far too fast even for the interrupt driven solution that I have + in place now. It could not work at 20MHz. If we suppose that interrupt + processing is around 1 usec, then an 8 bit interface could not have bit + times more than 125 nsec or 8 KHz. Interrupt handling should be faster + than 1 usec, but not a lot faster. I have not benchmarked it. NuttX + also supports special, zero latency interrupts that could bring the + interrupt time down even more. + + Note that we would also have a little more processing time if you used + 16-bit SPI word size. + + Note also that the interrupt driven approach would have this same basic + performance limitation with the additional disadvantage that: + + a) The driver will receive two interrupts per word exchanged: + + i) One interrupt will be received when the word is shifted in from + the master (at the end of 8-bit times). This is a data received + interrupt. + + ii) And another interrupt when the next words moved to the shift-out + register, freeing up the transmit holding register. This is the + data sent interrupt. + + The ii) event should be very soon after the i) event. + + Without DMA, the only way to reduce the interrupt rate would be to add + interrupt-level polling to detect the when transmit holding register + is available. That is not really a good idea. + + b) It will hog all of the CPU for the duration of the transfer). + +Tickless OS +=========== + + Background + ---------- + By default, a NuttX configuration uses a periodic timer interrupt that + drives all system timing. The timer is provided by architecture-specific + code that calls into NuttX at a rate controlled by CONFIG_USEC_PER_TICK. + The default value of CONFIG_USEC_PER_TICK is 10000 microseconds which + corresponds to a timer interrupt rate of 100 Hz. + + An option is to configure NuttX to operation in a "tickless" mode. Some + limitations of default system timer are, in increasing order of + importance: + + - Overhead: Although the CPU usage of the system timer interrupt at 100Hz + is really very low, it is still mostly wasted processing time. One most + timer interrupts, there is really nothing that needs be done other than + incrementing the counter. + - Resolution: Resolution of all system timing is also determined by + CONFIG_USEC_PER_TICK. So nothing that be time with resolution finer than + 10 milliseconds be default. To increase this resolution, + CONFIG_USEC_PER_TICK an be reduced. However, then the system timer + interrupts use more of the CPU bandwidth processing useless interrupts. + - Power Usage: But the biggest issue is power usage. When the system is + IDLE, it enters a light, low-power mode (for ARMs, this mode is entered + with the wfi or wfe instructions for example). But each interrupt + awakens the system from this low power mode. Therefore, higher rates + of interrupts cause greater power consumption. + + The so-called Tickless OS provides one solution to issue. The basic + concept here is that the periodic, timer interrupt is eliminated and + replaced with a one-shot, interval timer. It becomes event driven + instead of polled: The default system timer is a polled design. On + each interrupt, the NuttX logic checks if it needs to do anything + and, if so, it does it. + + Using an interval timer, one can anticipate when the next interesting + OS event will occur, program the interval time and wait for it to fire. + When the interval time fires, then the scheduled activity is performed. + + Configuration + ------------- + The following configuration options will enable support for the Tickless + OS for the SAMV7 platforms using TC0 channels 0-1 (other timers or + timer channels could be used making the obvious substitutions): + + RTOS Features -> Clocks and Timers + CONFIG_SCHED_TICKLESS=y : Configures the RTOS in tickless mode + CONFIG_SCHED_TICKLESS_ALARM=n : (option not implemented) + CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP=y + + System Type -> SAMV7 Peripheral Support + CONFIG_SAMV7_TC0=y : Enable TC0 (TC channels 0-3 + + System Type -> Timer/counter Configuration + CONFIG_SAMV7_ONESHOT=y : Enables one-shot timer wrapper + CONFIG_SAMV7_FREERUN=y : Enabled free-running timer wrapper + CONFIG_SAMV7_TICKLESS_ONESHOT=0 : Selects TC0 channel 0 for the one-shot + CONFIG_SAMV7_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free- + : running timer + + The resolution of the clock is provided by the CONFIG_USEC_PER_TICK + setting in the configuration file. + + NOTE: In most cases, the slow clock will be used as the timer/counter + input. The 32.768KHz crystal is selected by the definition + BOARD_HAVE_SLOWXTAL in the configs/samv71-xult/board.h file. + + The slow clock has a resolution of about 30.518 microseconds. Ideally, + the value of CONFIG_USEC_PER_TICK should be the exact clock resolution. + Otherwise there will be cumulative timing inaccuracies. But a choice + choice of: + + CONFIG_USEC_PER_TICK=31 + + will have an error of 0.6% and will have inaccuracies that will + effect the time due to long term error build-up. + + Using the slow clock clock input, the Tickless support is functional, + however, there are inaccuracies in delays. For example, + + nsh> sleep 10 + + results in a delay of maybe 5.4 seconds. But the timing accuracy is + correct if all competing uses of the interval timer are disabled (mostly + from the high priority work queue). Therefore, I conclude that this + inaccuracy is due to the inaccuracies in the representation of the clock + rate. 30.518 usec cannot be represented accurately. Each timing + calculation results in a small error. When the interval timer is very + busy, long delays will be divided into many small pieces and each small + piece has a large error in the calculation. The cumulative error is the + cause of the problem. + + Solution: The samv71-xult/src/sam_boot.c file has additional logic + to enable the programmable clock PCK6 as a clock source for the + timer/counters if the Tickless mode is selected. The ideal frequency + would be: + + frequency = 1,000,000 / CONFIG_USEC_PER_TICK + + The main crystal is selected as the frequency source. The maximum + prescaler value is 256 so the minimum frequency is 46,875 Hz which + corresponds to a period of 21.3 microseconds. A value of + CONFIG_USEC_PER_TICK=20, or 50KHz, would give an exact solution with + a divider of 240. + + SAMV7 Timer Usage + ----------------- + This current implementation uses two timers: A one-shot timer to + provide the timed events and a free running timer to provide the current + time. Since timers are a limited resource, that could be an issue on + some systems. + + We could do the job with a single timer if we were to keep the single + timer in a free-running at all times. The SAMV7 timer/counters have + 16-bit counters with the capability to generate a compare interrupt when + the timer matches a compare value but also to continue counting without + stopping (giving another, different interrupt when the timer rolls over + from 0xffff to zero). So we could potentially just set the compare at + the number of ticks you want PLUS the current value of timer. Then you + could have both with a single timer: An interval timer and a free- + running counter with the same timer! In this case, you would want to + to set CONFIG_SCHED_TICKLESS_ALARM in the NuttX configuration. + + Patches are welcome! + +Debugging +========= + + The on-board EDBG appears to work only with Atmel Studio. You can however, + simply connect a SAM-ICE or J-Link to the JTAG/SWD connector on the board + and that works great. The only tricky thing is getting the correct + orientation of the JTAG connection. + + I have been using Atmel Studio to write code to flash then I use the Segger + J-Link GDB server to debug. I have been using the 'Device Programming' I + available under the Atmel Studio 'Tool' menu. I have to disconnect the + SAM-ICE while programming with the EDBG. I am sure that you could come up + with a GDB server-only solution if you wanted. + + I run GDB like this from the directory containing the NuttX ELF file: + + arm-none-eabi-gdb + (gdb) target remote localhost:2331 + (gdb) mon reset + (gdb) file nuttx + (gdb) ... start debugging ... + +Configurations +============== + +Information Common to All Configurations +---------------------------------------- +Each SAMV71-XULT configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh samv71-xult/ + cd - + . ./setenv.sh + +Before sourcing the setenv.sh file above, you should examine it and perform +edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory +than holds your toolchain binaries. + +And then build NuttX by simply typing the following. At the conclusion of +the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make oldconfig + make + +The that is provided above as an argument to the tools/configure.sh +must be is one of the following. + +NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on UART3 (i.e., for the Arduino serial shield). + + 3. All of these configurations are set up to build under Windows using the + "GNU Tools for ARM Embedded Processors" that is maintained by ARM + (unless stated otherwise in the description of the configuration). + + https://launchpad.net/gcc-arm-embedded + + As of this writing (2015-03-11), full support is difficult to find + for the Cortex-M7, but is supported by at least this realeasse of + the ARM GNU tools: + + https://launchpadlibrarian.net/192228215/release.txt + + Current (2105-07-31) setenv.sh file are configured to use this + release: + + https://launchpadlibrarian.net/209776344/release.txt + + That toolchain selection can easily be reconfigured using + 'make menuconfig'. Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Window environment + CONFIG_WINDOWS_CYGWIN=y : Cywin under Windows + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU ARM EABI toolchain + + NOTE: As of this writing, there are issues with using this tool at + the -Os level of optimization. This has not been proven to be a + compiler issue (as least not one that might not be fixed with a + well placed volatile qualifier). However, in any event, it is + recommend that you use not more that -O2 optimization. + +Configuration sub-directories +----------------------------- + + knsh: + + This is identical to the nsh configuration below except that NuttX + is built as a kernel-mode, monolithic module and the user applications + are built separately. There are four very similar NSH configurations: + + - knsh. This is a somewhat simplified version of the nsh configuration + that builds using the protected build mode (CONFIG_BUILD_PROTECTED=y). + - nsh. This configuration is focused on low level, command-line + driver testing. It has no network. + - netnsh. This configuration is focused on network testing and + has only limited command support. + - mxtxplnd. This configuration is identical to the nsh configuration + but assumes that you have a maXTouch Xplained Pro LCD attached + and includes extra tests for the touchscreen and LCD. + + It is recommends to use a special make command; not just 'make' but make + with the following two arguments: + + make pass1 pass2 + + In the normal case (just 'make'), make will attempt to build both user- + and kernel-mode blobs more or less interleaved. This actual works! + However, for me it is very confusing so I prefer the above make command: + Make the user-space binaries first (pass1), then make the kernel-space + binaries (pass2) + + NOTES: + + 1. At the end of the build, there will be several files in the top-level + NuttX build directory: + + PASS1: + nuttx_user.elf - The pass1 user-space ELF file + nuttx_user.hex - The pass1 Intel HEX format file (selected in defconfig) + User.map - Symbols in the user-space ELF file + + PASS2: + nuttx - The pass2 kernel-space ELF file + nuttx.hex - The pass2 Intel HEX file (selected in defconfig) + System.map - Symbols in the kernel-space ELF file + + The J-Link programmer will except files in .hex, .mot, .srec, and .bin + formats. + + 2. Combining .hex files. If you plan to use the .hex files with your + debugger or FLASH utility, then you may need to combine the two hex + files into a single .hex file. Here is how you can do that. + + a. The 'tail' of the nuttx.hex file should look something like this + (with my comments added): + + $ tail nuttx.hex + # 00, data records + ... + :10 9DC0 00 01000000000800006400020100001F0004 + :10 9DD0 00 3B005A0078009700B500D400F300110151 + :08 9DE0 00 30014E016D0100008D + # 05, Start Linear Address Record + :04 0000 05 0800 0419 D2 + # 01, End Of File record + :00 0000 01 FF + + Use an editor such as vi to remove the 05 and 01 records. + + b. The 'head' of the nuttx_user.hex file should look something like + this (again with my comments added): + + $ head nuttx_user.hex + # 04, Extended Linear Address Record + :02 0000 04 0801 F1 + # 00, data records + :10 8000 00 BD89 01084C800108C8110208D01102087E + :10 8010 00 0010 00201C1000201C1000203C16002026 + :10 8020 00 4D80 01085D80010869800108ED83010829 + ... + + Nothing needs to be done here. The nuttx_user.hex file should + be fine. + + c. Combine the edited nuttx.hex and un-edited nuttx_user.hex + file to produce a single combined hex file: + + $ cat nuttx.hex nuttx_user.hex >combined.hex + + Then use the combined.hex file with the to write the FLASH image. + If you do this a lot, you will probably want to invest a little time + to develop a tool to automate these steps. + + module: + + A simple stripped down configuration that was used for testing NuttX + OS modules. There are five + very similar NSH configurations: + + - knsh. This is a somewhat simplified version of the nsh configuration + that builds using the protected build mode (CONFIG_BUILD_PROTECTED=y). + - nsh. This configuration is focused on low level, command-line + driver testing. It has no network. + - netnsh. This configuration is focused on network testing and + has only limited command support. + - module. A simple stripped down configuration that was used for testing + NuttXOS modules. + - mxtxplnd. This configuration is identical to the nsh configuration + but assumes that you have a maXTouch Xplained Pro LCD attached + and includes extra tests for the touchscreen and LCD. + + mxtxplnd: + + Configures the NuttShell (nsh) located at examples/nsh. There are five + very similar NSH configurations: + + - knsh. This is a somewhat simplified version of the nsh configuration + that builds using the protected build mode (CONFIG_BUILD_PROTECTED=y). + - nsh. This configuration is focused on low level, command-line + driver testing. It has no network. + - netnsh. This configuration is focused on network testing and + has only limited command support. + - module. A simple stripped down configuration that was used for testing + NuttXOS modules. + - mxtxplnd. This configuration is identical to the nsh configuration + but assumes that you have a maXTouch Xplained Pro LCD attached + and includes extra tests for the touchscreen and LCD. + + NOTES: + + 1. See the notes associated with the nsh configuration below. Only + differences from that configuration will be addressed here. + + 2. Basic touchscreen/LCD configuration settings are discussed above in + the paragraph entitled, "maXTouch Xplained Pro". + + 3. Unlike the nsh configuration, this configuration has the serial console + setup to USART0 which is available on EXT1: + + ----------- --- ------- ----- + Connector PIO Arduino SAMV7 + ----------- --- ------- ----- + EXT1 pin 13 PB0 RX3 RXD0 + EXT1 pin 14 PB1 TX3 TXD0 + ----------- --- ------- ----- + + and also on the Arduino Communications connector (J505): + + ----------- --- ------- ----- + Connector PIO Arduino SAMV7 + ----------- --- ------- ----- + J505 pin 7 PB0 RX3 RXD0 + J505 pin 8 PB1 TX3 TXD0 + ----------- --- ------- ----- + + Use of either the EXT1 or the LCD/EXT4 connectors conflict with the + Arduino RXD pin (UART3, PD28). You cannot put the maXTouch Xplained + in EXT1 or LCD/EXT4 and also use the Arduino RXD/TXD pins as your + serial console. + + The LCD (EXT4) is configured by default because only the parallel LCD + interface is currently supported and that is only available on that + connector. + + If you plan to use EXT2 for some reason, you may re-configure the + serial console to use UART3, the standard Arduino RXD/TXD. You + would also, of course, have to disable the LCD. + + NOTE that the USART0 pins PB0 and PB1 conflict with SSC TF and TK + pins as connected to the WM8904 audio CODEC. So, unless yet a + different U[S]ART option is selected, Audio cannot be used with + this configuration. + + 4. SDRAM is NOT enabled in this configuration. + + 5. Support for the ILI8488 LCD is enabled. Only the parallel mode is + supported at present. As a consequence, the maXTouch Xplained Pro + must be connected at the LCD (EXT4) connector. This mode requires: + + CONFIG_SAMV71XULT_MXTXPLND_LCD=y : Must be connect in LCD (EXT4) + CONFIG_SAMV7_SMC=y : SMC/EBI support + CONFIG_SAMV7_XDMAC=y : XDMAC support + + 6. The appx/examples/nxlines is enabled as a built-in application. + This is a test that displays some simple graphis and can be + executed from the NSH command line like: + + nsh> nxlines + + 7. When the maXTouch Xplained is connected (in any position), a new I2C + address appears at address 0x4a: + + nsh> i2c dev 3 77 + 0 1 2 3 4 5 6 7 8 9 a b c d e f + 00: -- -- -- -- -- -- -- -- -- -- -- -- -- + 10: -- -- -- -- -- -- -- -- -- -- 1a -- -- -- -- -- + 20: -- -- -- -- -- -- -- -- 28 -- -- -- -- -- -- -- + 30: -- -- -- -- -- -- -- 37 -- -- -- -- -- -- -- -- + 40: -- -- -- -- -- -- -- -- -- -- 4a -- -- -- 4e -- + 50: -- -- -- -- -- -- -- 57 -- -- -- -- -- -- -- 5f + 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 70: -- -- -- -- -- -- -- -- + + This is the I2C address of the maXTouch touchscreen controller. + + (0x1a is the address of the WM8904 Audio CODEC, 0x28 is the + address of TWI interface to the EDBG, 0x4e is the address of the + CP2100CP programmable PLL, and 0x57 and 0x5f are the addresses of + the AT2 EEPROM. I am not sure what the other address, 0x37, is). + + 8. Support for the touchscreen test is enabled (see apps/examples/touchscreen), + however, the maXTouch is not yet working (see STATUS below). + + STATUS: + 2015-04-05: Partial support for the maXTouch Xplained Pro LCD is in + place. The ILI9488-based LCD is working well with a SMC DMA-based + interface. Very nice performance. + 2015-05-12: After some difficulties, the maXTouch touchscreen + controller is now fully functional as well. + + netnsh: + + Configures the NuttShell (nsh) located at examples/nsh. There are five + very similar NSH configurations: + + - knsh. This is a somewhat simplified version of the nsh configuration + that builds using the protected build mode (CONFIG_BUILD_PROTECTED=y). + - nsh. This configuration is focused on low level, command-line + driver testing. It has no network. + - netnsh. This configuration is focused on network testing and + has only limited command support. + - module. A simple stripped down configuration that was used for testing + NuttXOS modules. + - mxtxplnd. This configuration is identical to the nsh configuration + but assumes that you have a maXTouch Xplained Pro LCD attached + and includes extra tests for the touchscreen and LCD. + + NOTES: + + 1. The serial console is configured by default for use with and Arduino + serial shield (UART3). You will need to reconfigure if you will + to use a different U[S]ART. + + 2. Default stack sizes are large and should really be tuned to reduce + the RAM footprint: + + CONFIG_SCHED_HPWORKSTACKSIZE=2048 + CONFIG_IDLETHREAD_STACKSIZE=1024 + CONFIG_USERMAIN_STACKSIZE=2048 + CONFIG_PTHREAD_STACK_MIN=256 + CONFIG_PTHREAD_STACK_DEFAULT=2048 + CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 + CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 + CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 + CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 + + 3. NSH built-in applications are supported. There are, however, not + enabled built-in applications. + + Binary Formats: + CONFIG_BUILTIN=y : Enable support for built-in programs + + Application Configuration: + CONFIG_NSH_BUILTIN_APPS=y : Enable starting apps from NSH command line + + 4. The network initialization thread and the NSH network montior are + enabled in this configuration. As a result, networking initialization + is performed asynchronously with NSH bring-up. For more information, + see the paragraphs above entitled "Network Initialization Thread" and + "Network Monitor". + + 5. SDRAM is NOT enabled in this configuration. + + 6. TWI/I2C + + TWIHS0 is enabled in this configuration. The SAM V71 Xplained Ultra + supports two devices on the one on-board I2C device on the TWIHS0 bus: + (1) The AT24MAC402 serial EEPROM described above and (2) the Wolfson + WM8904 audio CODEC. This device contains a MAC address for use with + the Ethernet interface. + + Relevant configuration settings: + + CONFIG_SAMV7_TWIHS0=y + CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + + CONFIG_I2C=y + + 7. TWIHS0 is used to support 256 byte non-volatile storage. This EEPROM + holds the assigned MAC address which is necessary for networking. The + EEPROM is also available for storage of configuration data using the + MTD configuration as described above under the heading, "MTD + Configuration Data". + + 8. Support for HSMCI is built-in by default. The SAMV71-XULT provides + one full-size SD memory card slot. Refer to the section entitled + "SD card" for configuration-related information. + + See "Open Issues" above for issues related to HSMCI. + + The auto-mounter is not enabled. See the section above entitled + "Auto-Mounter". + + 9. Performance-related Configuration settings: + + CONFIG_ARMV7M_ICACHE=y : Instruction cache is enabled + CONFIG_ARMV7M_DCACHE=y : Data cache is enabled + CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y : Write through mode + CONFIG_ARCH_FPU=y : H/W floating point support is enabled + CONFIG_ARCH_DPFPU=y : 64-bit H/W floating point support is enabled + + # CONFIG_ARMV7M_ITCM is not set : Support not yet in place + # CONFIG_ARMV7M_DTCM is not set : Support not yet in place + + I- and D-Caches are enabled but the D-Cache must be enabled in write- + through mode. This is to work around issues with the RX and TX + descriptors with are 8-bytes in size. But the D-Cache cache line + size is 32-bytes. That means that you cannot reload, clean or + invalidate a descriptor without also effecting three neighboring + descriptors. Setting write through mode eliminates the need for + cleaning the D-Cache. If only reloading and invalidating are done, + then there is no problem. + + Stack sizes are also large to simplify the bring-up and should be + tuned for better memory usages. + + STATUS: + 2015-03-29: I- and D-caches are currently enabled, but as noted + above, the D-Cache must be enabled in write-through mode. Also -Os + optimization is not being used (-O2). If the cache is enabled in + Write-Back mode or if higher levels of optimization are enabled, then + there are failures when trying to ping the target from a host. + + nsh: + + Configures the NuttShell (nsh) located at examples/nsh. There are five + very similar NSH configurations: + + - knsh. This is a somewhat simplified version of the nsh configuration + that builds using the protected build mode (CONFIG_BUILD_PROTECTED=y). + - nsh. This configuration is focused on low level, command-line + driver testing. It has no network. + - netnsh. This configuration is focused on network testing and + has only limited command support. + - module. A simple stripped down configuration that was used for testing + NuttXOS modules. + - mxtxplnd. This configuration is identical to the nsh configuration + but assumes that you have a maXTouch Xplained Pro LCD attached + and includes extra tests for the touchscreen and LCD. + + NOTES: + + 1. The serial console is configured by default for use with and Arduino + serial shield (UART3). You will need to reconfigure if you will + to use a different U[S]ART. + + 2. Default stack sizes are large and should really be tuned to reduce + the RAM footprint: + + CONFIG_ARCH_INTERRUPTSTACK=2048 + CONFIG_IDLETHREAD_STACKSIZE=1024 + CONFIG_USERMAIN_STACKSIZE=2048 + CONFIG_PTHREAD_STACK_DEFAULT=2048 + ... and others ... + + 3. NSH built-in applications are supported. + + Binary Formats: + CONFIG_BUILTIN=y : Enable support for built-in programs + + Application Configuration: + CONFIG_NSH_BUILTIN_APPS=y : Enable starting apps from NSH command line + + 4. SDRAM is enabled in this configuration. Here are the relevant + configuration settings: + + System Type + CONFIG_SAMV7_SDRAMC=y + CONFIG_SAMV7_SDRAMSIZE=2097152 + + SDRAM is not added to the heap in this configuration. To do that + you would need to set CONFIG_SAMV7_SDRAMHEAP=y and CONFIG_MM_REGIONS=2. + Instead, the SDRAM is set up so that is can be used with a destructive + RAM test enabled with this option: + + Application Configuration: + CONFIG_SYSTEM_RAMTEST=y + + The RAM test can be executed as follows: + + nsh> ramtest -w 70000000 2097152 + + NuttShell (NSH) NuttX-7.8 + nsh> ramtest -w 70000000 2097152 + RAMTest: Marching ones: 70000000 2097152 + RAMTest: Marching zeroes: 70000000 2097152 + RAMTest: Pattern test: 70000000 2097152 55555555 aaaaaaaa + RAMTest: Pattern test: 70000000 2097152 66666666 99999999 + RAMTest: Pattern test: 70000000 2097152 33333333 cccccccc + RAMTest: Address-in-address test: 70000000 2097152 + nsh> + + 5. The button test at apps/examples/buttons is included in the + configuration. This configuration illustrates (1) use of the buttons + on the evaluation board, and (2) the use of PIO interrupts. Example + usage: + + NuttShell (NSH) NuttX-7.8 + nsh> help + help usage: help [-v] [] + ... + Builtin Apps: + buttons + nsh> buttons 3 + maxbuttons: 3 + Attached handler at 4078f7 to button 0 [SW0], oldhandler:0 + Attached handler at 4078e9 to button 1 [SW1], oldhandler:0 + IRQ:125 Button 1:SW1 SET:00: + SW1 released + IRQ:125 Button 1:SW1 SET:02: + SW1 depressed + IRQ:125 Button 1:SW1 SET:00: + SW1 released + IRQ:90 Button 0:SW0 SET:01: + SW0 depressed + IRQ:90 Button 0:SW0 SET:00: + SW0 released + IRQ:125 Button 1:SW1 SET:02: + SW1 depressed + nsh> + + 6. TWI/I2C + + TWIHS0 is enabled in this configuration. The SAM V71 Xplained Ultra + supports two devices on the one on-board I2C device on the TWIHS0 bus: + (1) The AT24MAC402 serial EEPROM described above and (2) the Wolfson + WM8904 audio CODEC. This device contains a MAC address for use with + the Ethernet interface. + + In this configuration, the I2C tool at apps/system/i2ctool is + enabled. This tools supports interactive access to I2C devices on + the enabled TWIHS bus. Relevant configuration settings: + + CONFIG_SAMV7_TWIHS0=y + CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + + CONFIG_I2C=y + + CONFIG_SYSTEM_I2CTOOL=y + CONFIG_I2CTOOL_MINBUS=0 + CONFIG_I2CTOOL_MAXBUS=0 + CONFIG_I2CTOOL_MINADDR=0x03 + CONFIG_I2CTOOL_MAXADDR=0x77 + CONFIG_I2CTOOL_MAXREGADDR=0xff + CONFIG_I2CTOOL_DEFFREQ=400000 + + Example usage: + + nsh> i2c + Usage: i2c [arguments] + Where is one of: + + Show help : ? + List busses : bus + List devices : dev [OPTIONS] + Read register : get [OPTIONS] [] + Show help : help + Write register: set [OPTIONS] [] + Verify access : verf [OPTIONS] [] [] + + Where common "sticky" OPTIONS include: + [-a addr] is the I2C device address (hex). Default: 03 Current: 03 + [-b bus] is the I2C bus number (decimal). Default: 0 Current: 0 + [-r regaddr] is the I2C device register address (hex). Default: 00 Current: 00 + [-w width] is the data width (8 or 16 decimal). Default: 8 Current: 8 + [-s|n], send/don't send start between command and data. Default: -n Current: -n + [-i|j], Auto increment|don't increment regaddr on repititions. Default: NO Current: NO + [-f freq] I2C frequency. Default: 400000 Current: 400000 + + NOTES: + o An environment variable like $PATH may be used for any argument. + o Arguments are "sticky". For example, once the I2C address is + specified, that address will be re-used until it is changed. + + WARNING: + o The I2C dev command may have bad side effects on your I2C devices. + Use only at your own risk. + nsh> i2c bus + BUS EXISTS? + Bus 0: YES + nsh> i2c dev 3 77 + 0 1 2 3 4 5 6 7 8 9 a b c d e f + 00: -- -- -- -- -- -- -- -- -- -- -- -- -- + 10: -- -- -- -- -- -- -- -- -- -- 1a -- -- -- -- -- + 20: -- -- -- -- -- -- -- -- 28 -- -- -- -- -- -- -- + 30: -- -- -- -- -- -- -- 37 -- -- -- -- -- -- -- -- + 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 4e -- + 50: -- -- -- -- -- -- -- 57 -- -- -- -- -- -- -- 5f + 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 70: -- -- -- -- -- -- -- -- + nsh> + + Where 0x1a is the address of the WM8904 Audio CODEC, 0x28 is the + address of TWI interface to the EDBG, 0x4e is the address of the + CP2100CP programmable PLL, and 0x57 and 0x5f are the addresses of + the AT2 EEPROM (I am not sure what the other address, 0x37, is + as this writing). + + 7. TWIHS0 is also used to support 256 byte non-volatile storage for + configuration data using the MTD configuration as described above + under the heading, "MTD Configuration Data". + + 8. Support for HSMCI is built-in by default. The SAMV71-XULT provides + one full-size SD memory card slot. Refer to the section entitled + "SD card" for configuration-related information. + + See "Open Issues" above for issues related to HSMCI. + + The auto-mounter is not enabled. See the section above entitled + "Auto-Mounter". + + 9. Performance-related Configuration settings: + + CONFIG_ARMV7M_ICACHE=y : Instruction cache is enabled + CONFIG_ARMV7M_DCACHE=y : Data cache is enabled + CONFIG_ARMV7M_DCACHE_WRITETHROUGH=n : Write back mode + CONFIG_ARCH_FPU=y : H/W floating point support is enabled + CONFIG_ARCH_DPFPU=y : 64-bit H/W floating point support is enabled + + # CONFIG_ARMV7M_ITCM is not set : Support not yet in place + # CONFIG_ARMV7M_DTCM is not set : Support not yet in place + + Stack sizes are also large to simplify the bring-up and should be + tuned for better memory usages. + + STATUS: + 2015-03-28: HSMCI TX DMA is disabled. There are some issues with the TX + DMA that need to be corrected. + + nxwm: + + This is a special configuration setup for the NxWM window manager + UnitTest. It provides an interactive windowing experience with the + maXTouch Xplained Pro LCD. + + NOTES: + + 1. The NxWM window manager is a tiny window manager tailored for use + with smaller LCDs. It supports a task, a start window, and + multiple application windows with toolbars. However, to make the + best use of the visible LCD space, only one application window is + visible at at time. + + The NxWM window manager can be found here: + + nuttx-git/NxWidgets/nxwm + + The NxWM unit test can be found at: + + nuttx-git/NxWidgets/UnitTests/nxwm + + Documentation for installing the NxWM unit test can be found here: + + nuttx-git/NxWidgets/UnitTests/README.txt + + 2. Here is the quick summary of the build steps. These steps assume + that you have the entire NuttX GIT in some directory ~/nuttx-git. + You may have these components installed elsewhere. In that case, you + will need to adjust all of the paths in the following accordingly: + + a. Install the nxwm configuration + + $ cd ~/nuttx-git/nuttx/tools + $ ./configure.sh samv71-xult/nxwm + + b. Make the build context (only) + + $ cd .. + $ . ./setenv.sh + $ make context + ... + + NOTE: the use of the setenv.sh file is optional. All that it will + do is to adjust your PATH variable so that the build system can find + your tools. If you use it, you will most likely need to modify the + script so that it has the correct path to your tool binaries + directory. + + c. Install the nxwm unit test + + $ cd ~/nuttx-git/NxWidgets + $ tools/install.sh ~/nuttx-git/apps nxwm + Creating symbolic link + - To ~/nuttx-git/NxWidgets/UnitTests/nxwm + - At ~/nuttx-git/apps/external + + d. Build the NxWidgets library + + $ cd ~/nuttx-git/NxWidgets/libnxwidgets + $ make TOPDIR=~/nuttx-git/nuttx + ... + + e. Build the NxWM library + + $ cd ~/nuttx-git/NxWidgets/nxwm + $ make TOPDIR=~/nuttx-git/nuttx + ... + + f. Built NuttX with the installed unit test as the application + + $ cd ~/nuttx-git/nuttx + $ make + + 3. Reading from the LCD is not currently functional. The following + settings are in the configuration that tell the system that this + is a read-only LCD: + + CONFIG_LCD_NOGETRUN=y + CONFIG_NX_WRITEONLY=y + + 4. Small Icons are selected and can be very difficult to touch. You + might want to enable larger icons with: + + CONFIG_NXWM_LARGE_ICONS=y + + STATUS: + 2015-05-13: + - The demo functions and produces displays but is not yet very stable. + + - I have two maXTouch Xplained Pro displays. One works well, the + other has some issues which I suspect are due to the ribbon cable + connector with fits too snugly on one side. + + Here are the symptoms of the LCD that does not work. I attribute + these problems with problems in the parallel interface due to a + bad connection: + + - The color is wrong; to reddish. This suggests some issue with color + format or pixel width + - Images are positioned correctly on the display, but all half the + horizontal width that they should be, again suggesting some problem + with the pixel with. + - Some images are simply truncated to half the correct size (such as + the touch circles in the calibration screen). + - Other images are horizontally compressed (such as the initial NX + logo on the background). + + - As mentioned above, reading fromthe LCD is not currently functional. + There are some special settings work work around this but the + bottom line is that transparent operations cannot yet be supported. + + - I am seeing some small artifacts with the font used in the HEX + calculator display. + + - Line spacing in the NxTerm window is too much. This is probably + a font-related issue too. + diff --git a/configs/samv71-xult/include/board.h b/configs/samv71-xult/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..e2226d764b8244f69796a57cbb0a7848fd24dffc --- /dev/null +++ b/configs/samv71-xult/include/board.h @@ -0,0 +1,568 @@ +/************************************************************************************ + * configs/samv71-xult/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMV71_XULT_INCLUDE_BOARD_H +#define __CONFIGS_SAMV71_XULT_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Clocking *************************************************************************/ +/* After power-on reset, the SAMV71Q device is running out of the Master Clock using + * the Fast RC Oscillator running at 4 MHz. + * + * MAINOSC: Frequency = 12MHz (crystal) + * + * 300MHz Settings: + * PLLA: PLL Divider = 1, Multiplier = 20 to generate PLLACK = 240MHz + * Master Clock (MCK): Source = PLLACK, Prescalar = 1 to generate MCK = 120MHz + * CPU clock: 120MHz + * + * There are two on-board crystals: + */ + +#define BOARD_HAVE_SLOWXTAL 1 /* Slow crystal is populated */ +#define BOARD_SLOWCLK_FREQUENCY (32768) /* 32.768 KHz slow crystal oscillator */ +#define BOARD_MAINOSC_FREQUENCY (12000000) /* 12 MHz main oscillator */ + +/* Main oscillator register settings. + * + * The main oscillator could be either the embedded 4/8/12 MHz fast RC oscillators + * or an external 3-20 MHz crystal or ceramic resonator. The external clock source + * is selected by default in sam_clockconfig.c. Here we need to specify the main + * oscillator start-up time. + * + * REVISIT... this is old information: + * The start up time should be should be: + * + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ +#define BOARD_CKGR_MOR_MOSCXTENBY (PMC_CKGR_MOR_MOSCXTEN) /* Crystal Oscillator Enable */ + + +/* PLLA configuration. + * + * Divider = 1 + * Multiplier = 25 + * + * Yields: + * + * PLLACK = 25 * 12MHz / 1 = 300MHz + */ + +#define BOARD_CKGR_PLLAR_STMODE PMC_CKGR_PLLAR_STMODE_FAST +#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT) +#define BOARD_CKGR_PLLAR_MUL PMC_CKGR_PLLAR_MUL(24) +#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS + +/* PMC master clock register settings. + * + * BOARD_PMC_MCKR_CSS - The source of main clock input. This may be one of: + * + * PMC_MCKR_CSS_SLOW Slow Clock + * PMC_MCKR_CSS_MAIN Main Clock + * PMC_MCKR_CSS_PLLA PLLA Clock + * PMC_MCKR_CSS_UPLL Divided UPLL Clock + * + * BOARD_PMC_MCKR_PRES - Source clock pre-scaler. May be one of: + * + * PMC_MCKR_PRES_DIV1 Selected clock + * PMC_MCKR_PRES_DIV2 Selected clock divided by 2 + * PMC_MCKR_PRES_DIV4 Selected clock divided by 4 + * PMC_MCKR_PRES_DIV8 Selected clock divided by 8 + * PMC_MCKR_PRES_DIV16 Selected clock divided by 16 + * PMC_MCKR_PRES_DIV32 Selected clock divided by 32 + * PMC_MCKR_PRES_DIV64 Selected clock divided by 64 + * PMC_MCKR_PRES_DIV3 Selected clock divided by 3 + * + * The prescaler determines (1) the CPU clock and (2) the input into the + * second divider that then generates the Master Clock (MCK). MCK is the + * source clock of the peripheral clocks. + * + * BOARD_PMC_MCKR_MDIV - MCK divider. May be one of: + * + * PMC_MCKR_MDIV_DIV1 Master Clock = Prescaler Output Clock / 1 + * PMC_MCKR_MDIV_DIV2 Master Clock = Prescaler Output Clock / 2 + * PMC_MCKR_MDIV_DIV4 Master Clock = Prescaler Output Clock / 4 + * PMC_MCKR_MDIV_DIV3 Master Clock = Prescaler Output Clock / 3 + */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA /* Source = PLLA */ +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 /* Prescaler = /1 */ +#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_DIV2 /* MCK divider = /2 */ + +/* USB clocking */ + +#define BOARD_PMC_MCKR_UPLLDIV2 0 /* UPLL clock not divided by 2 */ + +/* Resulting frequencies */ + +#define BOARD_PLLA_FREQUENCY (300000000) /* PLLACK: 25 * 12Mhz / 1 */ +#define BOARD_CPU_FREQUENCY (300000000) /* CPU: PLLACK / 1 */ +#define BOARD_MCK_FREQUENCY (150000000) /* MCK: PLLACK / 1 / 2 */ +#undef BOARD_UPLL_FREQUENCY /* To be provided */ + +/* HSMCI clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV) + CLOCKODD + 2). + * + * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2) + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 150MHz, CLKDIV = 186, MCI_SPEED = 150MHz / (2*186 + 1 + 2) = 400 KHz */ + +#define HSMCI_INIT_CLKDIV ((186 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD) + +/* MCK = 150MHz, CLKDIV = 3 w/CLOCKODD, MCI_SPEED = 150MHz /(2*3 + 0 + 2) = 18.75 MHz */ + +#define HSMCI_MMCXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) + +/* MCK = 150MHz, CLKDIV = 2, MCI_SPEED = 150MHz /(2*2 + 0 + 2) = 25 MHz */ + +#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT) +#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV + +/* FLASH wait states. + * + * Wait states Max frequency at 105 centigrade (STH conditions) + * + * VDDIO + * 1.62V 2.7V + * --- ------- ------- + * 0 26 MHz 30 MHz + * 1 52 MHz 62 MHz + * 2 78 MHz 93 MHz + * 3 104 MHz 124 MHz + * 4 131 MHz 150 MHz + * 5 150 MHz --- MHz + * + * Given: VDDIO=3.3V, VDDCORE=1.2V, MCK=150MHz + */ + +#define BOARD_FWS 4 + +/* LED definitions ******************************************************************/ +/* LEDs + * + * There are two yellow LED available on the SAM V71 Xplained Ultra board that + * can be turned on and off. The LEDs can be activated by driving the + * connected I/O line to GND. + * + * ------ ----------- --------------------- + * SAMV71 Function Shared functionality + * PIO + * ------ ----------- --------------------- + * PA23 Yellow LED0 EDBG GPIO + * PC09 Yellow LED1 LCD, and Shield + * ------ ----------- --------------------- + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED0 0 +#define BOARD_LED1 1 +#define BOARD_NLEDS 2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED0_BIT (1 << BOARD_LED0) +#define BOARD_LED1_BIT (1 << BOARD_LED1) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_autoleds.c. The LEDs are used to encode + * OS-related events as follows: + * + * SYMBOL Meaning LED state + * LED2 LED1 + * ------------------------ -------------------------- ------ ------ */ + +#define LED_STARTED 0 /* NuttX has been started OFF OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON OFF */ +#define LED_INIRQ 2 /* In an interrupt No change */ +#define LED_SIGNAL 2 /* In a signal handler No change */ +#define LED_ASSERTION 2 /* An assertion failed No change */ +#define LED_PANIC 3 /* The system has crashed N/C Blinking */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* Thus if LED0 is statically on, NuttX has successfully booted and is, + * apparently, running normally. If LED1 is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + * + * NOTE: That LED0 is not used after completion of booting and may + * be used by other board-specific logic. + */ + +/* Button definitions ***************************************************************/ +/* Buttons + * + * SAM V71 Xplained Ultra contains three mechanical buttons. One button is the + * RESET button connected to the SAM V71 reset line and the others are generic + * user configurable buttons. When a button is pressed it will drive the I/O + * line to GND. + * + * ------ ----------- --------------------- + * SAMV71 Function Shared functionality + * PIO + * ------ ----------- --------------------- + * RESET RESET Trace, Shield, and EDBG + * PA09 SW0 EDBG GPIO and Camera + * PB12 SW1 EDBG SWD and Chip Erase + * ------ ----------- --------------------- + * + * NOTES: + * + * - There are no pull-up resistors connected to the generic user buttons so + * it is necessary to enable the internal pull-up in the SAM V71 to use the + * button. + * - PB12 is set up as a system flash ERASE pin when the firmware boots. To + * use the SW1, PB12 has to be configured as a normal regular I/O pin in + * the MATRIX module. For more information see the SAM V71 datasheet. + */ + +#define BUTTON_SW0 0 +#define BUTTON_SW1 1 +#define NUM_BUTTONS 2 + +#define BUTTON_SW0_BIT (1 << BUTTON_SW0) +#define BUTTON_SW1_BIT (1 << BUTTON_SW1) + +/* PIO Disambiguation ***************************************************************/ +/* Serial Console + * + * The SAMV71-XULT has no on-board RS-232 drivers so it will be necessary to use + * either the VCOM or an external RS-232 driver. Here are some options. + * + * - Arduino Serial Shield: One option is to use an Arduino-compatible + * serial shield. This will use the RXD and TXD signals available at pins + * 0 an 1, respectively, of the Arduino "Digital Low" connector. On the + * SAMV71-XULT board, this corresponds to UART3: + * + * ------ ------ ------- ------- -------- + * Pin on SAMV71 Arduino Arduino SAMV71 + * J503 PIO Name Pin Function + * ------ ------ ------- ------- -------- + * 1 PD28 RX0 0 URXD3 + * 2 PD30 TX0 1 UTXD3 + * ------ ------ ------- ------- -------- + * + * There are alternative pin selections only for UART3 TXD: + */ + +#define GPIO_UART3_TXD GPIO_UART3_TXD_1 + + +/* - Arduino Communications. Additional UART/USART connections are available + * on the Arduino Communications connection J505: + * + * ------ ------ ------- ------- -------- + * Pin on SAMV71 Arduino Arduino SAMV71 + * J503 PIO Name Pin Function + * ------ ------ ------- ------- -------- + * 3 PD18 RX1 0 URXD4 + * 4 PD19 TX1 0 UTXD4 + * 5 PD15 RX2 0 RXD2 + * 6 PD16 TX2 0 TXD2 + * 7 PB0 RX3 0 RXD0 + * 8 PB1 TX3 1 TXD0 + * ------ ------ ------- ------- -------- + * + * There are alternative pin selections only for UART4 TXD: + */ + +#define GPIO_UART4_TXD GPIO_UART4_TXD_1 + +/* - SAMV7-XULT EXTn connectors. USART pins are also available the EXTn + * connectors. The following are labelled in the User Guide for USART + * functionality: + * + * ---- -------- ------ -------- + * EXT1 EXTI1 SAMV71 SAMV71 + * Pin Name PIO Function + * ---- -------- ------ -------- + * 13 USART_RX PB00 RXD0 + * 14 USART_TX PB01 TXD0 + * + * ---- -------- ------ -------- + * EXT2 EXTI2 SAMV71 SAMV71 + * Pin Name PIO Function + * ---- -------- ------ -------- + * 13 USART_RX PA21 RXD1 + * 14 USART_TX PB04 TXD1 + * + * There are no alternative pin selections for USART0 or USART1. + */ + +/* - VCOM. The Virtual Com Port gateway is available on USART1: + * + * ------ -------- + * SAMV71 SAMV71 + * PIO Function + * ------ -------- + * PB04 TXD1 + * PA21 RXD1 + * ------ -------- + * + * There are no alternative pin selections for USART1. + */ + +/* WM8904 Audio Codec + * + * SAMV71 Interface WM8904 Interface + * ---- ------------ ------- ---------------------------------- + * PIO Usage Pin Function + * ---- ------------ ------- ---------------------------------- + * PA3 TWD0 SDA I2C control interface, data line + * PA4 TWCK0 SCLK I2C control interface, clock line + * PA10 RD ADCDAT Digital audio output (microphone) + * PB18 PCK2 MCLK Master clock + * PB0 TF LRCLK Left/right data alignment clock + * PB1 TK BCLK Bit clock, for synchronization + * PD11 GPIO IRQ Audio interrupt + * PD24 RF LRCLK Left/right data alignment clock + * PD26 TD DACDAT Digital audio input (headphone) + * ---- ------------ ------- ---------------------------------- + * + * SSC + * + * Alternative pin selections are available only for SSC0 TD. + * On the SAMV71-XULT board, PD26 supports the I2S TD function + */ + +#define GPIO_SSC0_TD GPIO_SSC0_TD_1 + +/* maXTouch Xplained Pro Standard Extension Header ********************************** + * ----------------------------------------------- + * This LCD could be connected either via EXT1 or EXT2 using the 2x10 + * 20-pin cable and the maXTouch Xplained Pro standard extension + * header. Access is then performed in SPI mode. + * + * ---- -------- ---- ----------- ---- ----------- ---------------------------------- + * SAMV71-XULT maxTouch Xplained Pro + * PIN FUNCTION EXT1 FUNC EXT2 FUNC Description + * ---- -------- ---- ----------- ---- ----------- ---------------------------------- + * 1 ID - - - - Communication line to ID chip + * 2 GND - - - - Ground + * 3 N/C PC31 - PD30 - + * 4 N/C PA19 - PC13 - + * 5 GPIO PB3 GPIO PA6 GPIO Command/Data Select + * 6 N/C PB2 - PD11 - + * 7 PWM PA0 PWMC0_PWMH0 PC19 PWMC0_PMWH2 Backlight control + * 8 N/C PC30 - PD26 - + * 9 GPIO/IRQ PD28 GPIO PA2 GPIO IRQ from maXTouch controller + * 10 GPIO PA5 GPIO PA24 GPIO RESET signal + * 11 I2C SDA PA3 TWID0 PA3 TWID0 maXTouch I2C Data line + * 12 I2C SCL PA4 TWICK0 PA4 TWICK0 maXTouch I2C Clock line + * 13 N/C PB0 - PA21 - + * 14 N/C PB1 - PB4 - + * 15 CS PD25 GPIO PD27 GPIO CS line for LCD controller + * 16 SPI MOSI PD21 SPI0_MOSI PD21 SPI0_MOSI SPI Data to LCD controller + * 17 SPI MISO PD20 SPI0_MISO PD20 SPI0_MISO SPI Data from LCD controller + * 18 SPI SCK PD22 SPI0_SPCK PD22 SPI0_SPCK SPI Clock line + * 19 GND - - - - Ground + * 20 VCC - - - - Target supply voltage + * ---- -------- ---- ----------- ---- ----------- ---------------------------------- + * + * There are no alternatives for SPI0 and TWI0 pins. Only the PWM pins require any + * disambiguration. + */ + +#ifdef CONFIG_SAMV71XULT_MXTXPLND +# if defined(CONFIG_SAMV71XULT_MXTXPLND_EXT1) + +# define GPIO_PWMC0_H0 GPIO_PWMC0_H0_1 +# define GPIO_MXTXLND_PWM GPIO_PWMC0_H0_1 +# define GPIO_SPI0_NPCS1 GPIO_SPI0_NPCS1_2 + +# elif defined(CONFIG_SAMV71XULT_MXTXPLND_EXT2) + +# define GPIO_PWMC0_H2 GPIO_PWMC0_H2_5 +# define GPIO_MXTXLND_PWM GPIO_PWMC0_H2_5 + +/* maXTouch Xplained Pro Xplained Pro LCD Connector ********************************* + * + * Only the parallel is supported by this BSP (via SMC/EBI). The switch mode + * selector on the back of the maXtouch should be set in the OFF-ON-OFF + * positions to select 16-bit color mode. + * + * ----------------- ------------- ------------------------------------------------- + * LCD SAMV71 Description + * Pin Function Pin Function + * ---- ------------ ---- -------- ------------------------------------------------- + * 1 ID - - Chip ID communication line + * 2 GND - GND Ground + * 3 D0 PC0 D0 Data line + * 4 D1 PC1 D1 Data line + * 5 D2 PC2 D2 Data line + * 6 D3 PC3 D3 Data line + * 7 GND - GND Ground + * 8 D4 PC4 D4 Data line + * 9 D5 PC5 D5 Data line + * 10 D6 PC6 D6 Data line + * 11 D7 PC7 D7 Data line + * 12 GND - GND Ground + * 13 D8 PE0 D8 Data line + * 14 D9 PE1 D9 Data line + * 15 D10 PE2 D10 Data line + * 16 D11 PE3 D11 Data line + * 17 GND - GND Ground + * 18 D12 PE4 D12 Data line + * 19 D13 PE5 D13 Data line + * 20 D14 PA15 D14 Data line + * 21 D15 PA16 D15 Data line + * 22 GND - GND Ground + * 23 D16 - - Data line + * 24 D17 - - Data line + * 25 N/C - - + * 26 N/C - - + * 27 GND - GND Ground + * 28 N/C - - + * 29 N/C - - + * 30 N/C - - + * 31 N/C - - + * 32 GND - GND Ground + * 33 PCLK/ PC30 GPIO SMC: Pixel clock Display RAM select. + * CMD_DATA_SEL SPI: One address line of the MCU for displays where + * it is possible to select either the register + * or the data interface + * 34 VSYNC/CS PD19 NCS3 SMC: Vertical synchronization. + * SPI: Chip select + * 35 HSYNC/WE PC8 NWE SMC: Horizontal synchronization + * SPI: Write enable signal + * 36 DATA ENABLE/ PC11 NRD SMC: Data enable signal + * RE SPI: Read enable signal + * 37 SPI SCK - - SPI: Clock for SPI + * 38 SPI MOSI - - SPI: Master out slave in line of SPI + * 39 SPI MISO - - SPI: Master in slave out line of SPI + * 40 SPI SS - - SPI: Slave select for SPI + * 41 N/C - - + * 42 TWI SDA PA3 TWD0 I2C data line (maXTouch®) + * 43 TWI SCL PA4 TWCK0 I2C clock line (maXTouch) + * 44 IRQ1 PD28 WKUP5 maXTouch interrupt line + * 45 N/C PA2 WKUP2 + * 46 PWM PC9 TIOB7 Backlight control + * 47 RESET PC13 GPIO Reset for both display and maxTouch + * 48 VCC - - 3.3V power supply for extension board + * 49 VCC - - 3.3V power supply for extension board + * 50 GND - - Ground + * ---- ------------ ---- -------- -------------------------------------------------- + */ + +# elif defined(CONFIG_SAMV71XULT_MXTXPLND_LCD) + +# define GPIO_SMC_NCS3 GPIO_SMC_NCS3_2 + +# endif +#endif /* CONFIG_SAMV71XULT_MXTXPLND */ + +/* MCAN1 + * + * SAM V71 Xplained Ultra has two MCAN modules that performs communication according + * to ISO11898-1 (Bosch CAN specification 2.0 part A,B) and Bosch CAN FD + * specification V1.0. MCAN1 is connected to an on-board ATA6561 CAN physical-layer + * transceiver. + * + * ------- -------- -------- ------------- + * SAM V71 FUNCTION ATA6561 SHARED + * PIN FUNCTION FUNCTIONALITY + * ------- -------- -------- ------------- + * PC14 CANTX1 TXD Shield + * PC12 CANRX1 RXD Shield + * ------- -------- -------- ------------- + */ + +#define GPIO_MCAN1_TX GPIO_MCAN1_TX_2 +#define GPIO_MCAN1_RX GPIO_MCAN1_RX_2 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the SAM4e-EK board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * display is cleared by simply setting all GRAM memory to the specified color. + * + ************************************************************************************/ + +void sam_lcdclear(uint16_t color); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAMV71_XULT_INCLUDE_BOARD_H */ diff --git a/configs/samv71-xult/kernel/.gitignore b/configs/samv71-xult/kernel/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..7bacd5aee3e49e11d2753d091bd2c9b31c0b16b0 --- /dev/null +++ b/configs/samv71-xult/kernel/.gitignore @@ -0,0 +1,2 @@ +/nuttx_user.elf + diff --git a/configs/samv71-xult/kernel/Makefile b/configs/samv71-xult/kernel/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..a71e019eb0ef07d9700e46bb45a0d137dd9239ec --- /dev/null +++ b/configs/samv71-xult/kernel/Makefile @@ -0,0 +1,116 @@ +############################################################################ +# configs/samv7-xult/kernel/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +# This is the directory for the board-specific header files + +BOARD_INCLUDE = $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)include + +# The entry point name (if none is provided in the .config file) + +CONFIG_USER_ENTRYPOINT ?= user_start +ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT)) + +# Get the paths to the libraries and the links script path in format that +# is appropriate for the host OS + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done} + USER_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}" + USER_LDSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld}" +else + # Linux/Cygwin-native toolchain + USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS))) + USER_LDSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld + USER_LDSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld +endif + +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) +USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) +USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" + +# Source files + +CSRCS = sam_userspace.c +COBJS = $(CSRCS:.c=$(OBJEXT)) +OBJS = $(COBJS) + +# Targets: + +all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map +.PHONY: nuttx_user.elf depend clean distclean + +$(COBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +# Create the nuttx_user.elf file containing all of the user-mode code + +nuttx_user.elf: $(OBJS) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) + +$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf + @echo "LD: nuttx_user.elf" + $(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf +ifeq ($(CONFIG_INTELHEX_BINARY),y) + @echo "CP: nuttx_user.hex" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.hex +endif +ifeq ($(CONFIG_MOTOROLA_SREC),y) + @echo "CP: nuttx_user.srec" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.srec +endif +ifeq ($(CONFIG_RAW_BINARY),y) + @echo "CP: nuttx_user.bin" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.bin +endif + +$(TOPDIR)$(DELIM)User.map: nuttx_user.elf + @echo "MK: User.map" + $(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map + $(Q) $(CROSSDEV)size nuttx_user.elf + +.depend: + +depend: .depend + +clean: + $(call DELFILE, nuttx_user.elf) + $(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*") + $(call DELFILE, "$(TOPDIR)$(DELIM)User.map") + $(call CLEAN) + +distclean: clean diff --git a/configs/samv71-xult/kernel/sam_userspace.c b/configs/samv71-xult/kernel/sam_userspace.c new file mode 100644 index 0000000000000000000000000000000000000000..2de79a215dfb0c0262f1ec8ff7ddb18165386d93 --- /dev/null +++ b/configs/samv71-xult/kernel/sam_userspace.c @@ -0,0 +1,132 @@ +/**************************************************************************** + * configs/samv71-xult/kernel/sam_userspace.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_NUTTX_USERSPACE +# error "CONFIG_NUTTX_USERSPACE not defined" +#endif + +#if CONFIG_NUTTX_USERSPACE != 0x00500000 +# error "CONFIG_NUTTX_USERSPACE must be 0x00500000 to match user-space.ld" +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* These 'addresses' of these values are setup by the linker script. They are + * not actual uint32_t storage locations! They are only used meaningfully in the + * following way: + * + * - The linker script defines, for example, the symbol_sdata. + * - The declareion extern uint32_t _sdata; makes C happy. C will believe + * that the value _sdata is the address of a uint32_t variable _data (it is + * not!). + * - We can recoved the linker value then by simply taking the address of + * of _data. like: uint32_t *pdata = &_sdata; + */ + +extern uint32_t _stext; /* Start of .text */ +extern uint32_t _etext; /* End_1 of .text + .rodata */ +extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */ +extern uint32_t _sdata; /* Start of .data */ +extern uint32_t _edata; /* End+1 of .data */ +extern uint32_t _sbss; /* Start of .bss */ +extern uint32_t _ebss; /* End+1 of .bss */ + +/* This is the user space entry point */ + +int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); + +const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +{ + /* General memory map */ + + .us_entrypoint = (main_t)CONFIG_USER_ENTRYPOINT, + .us_textstart = (uintptr_t)&_stext, + .us_textend = (uintptr_t)&_etext, + .us_datasource = (uintptr_t)&_eronly, + .us_datastart = (uintptr_t)&_sdata, + .us_dataend = (uintptr_t)&_edata, + .us_bssstart = (uintptr_t)&_sbss, + .us_bssend = (uintptr_t)&_ebss, + + /* Memory manager heap structure */ + + .us_heap = &g_mmheap, + + /* Task/thread startup routines */ + + .task_startup = task_startup, +#ifndef CONFIG_DISABLE_PTHREAD + .pthread_startup = pthread_startup, +#endif + + /* Signal handler trampoline */ + +#ifndef CONFIG_DISABLE_SIGNALS + .signal_handler = up_signal_handler, +#endif + + /* User-space work queue support (declared in include/nuttx/wqueue.h) */ + +#ifdef CONFIG_LIB_USRWORK + .work_usrstart = work_usrstart, +#endif +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */ diff --git a/configs/samv71-xult/knsh/Make.defs b/configs/samv71-xult/knsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c5bbfe8f3367e7dc1971d8bf1a4e7ae82f46653d --- /dev/null +++ b/configs/samv71-xult/knsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/samv71-xult/knsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_ARMV7M_DTCM),y) + LDSCRIPT = flash-dtcm.ld +else + LDSCRIPT = flash-sram.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/samv71-xult/knsh/defconfig b/configs/samv71-xult/knsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..9237a360d3ab2e60264d7ac32e4f4d342791b586 --- /dev/null +++ b/configs/samv71-xult/knsh/defconfig @@ -0,0 +1,1043 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_FLAT is not set +CONFIG_BUILD_PROTECTED=y +CONFIG_BUILD_2PASS=y +CONFIG_PASS1_TARGET="all" +CONFIG_PASS1_BUILDIR="configs/samv71-xult/kernel" +CONFIG_PASS1_OBJECT="" +CONFIG_NUTTX_USERSPACE=0x00500000 + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +CONFIG_ARCH_CHIP_SAMV7=y +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="samv7" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +CONFIG_ARMV7M_LAZYFPU=y +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_DPFPU=y +CONFIG_ARM_HAVE_MPU_UNIFIED=y +CONFIG_ARM_MPU=y +CONFIG_ARM_MPU_NREGIONS=16 + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +# CONFIG_ARMV7M_DCACHE_WRITETHROUGH is not set +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# SAMV7 Configuration Options +# +# CONFIG_ARCH_CHIP_SAME70Q19 is not set +# CONFIG_ARCH_CHIP_SAME70Q20 is not set +# CONFIG_ARCH_CHIP_SAME70Q21 is not set +# CONFIG_ARCH_CHIP_SAME70N19 is not set +# CONFIG_ARCH_CHIP_SAME70N20 is not set +# CONFIG_ARCH_CHIP_SAME70N21 is not set +# CONFIG_ARCH_CHIP_SAME70J19 is not set +# CONFIG_ARCH_CHIP_SAME70J20 is not set +# CONFIG_ARCH_CHIP_SAME70J21 is not set +# CONFIG_ARCH_CHIP_SAMV71Q19 is not set +# CONFIG_ARCH_CHIP_SAMV71Q20 is not set +CONFIG_ARCH_CHIP_SAMV71Q21=y +# CONFIG_ARCH_CHIP_SAMV71N19 is not set +# CONFIG_ARCH_CHIP_SAMV71N20 is not set +# CONFIG_ARCH_CHIP_SAMV71N21 is not set +# CONFIG_ARCH_CHIP_SAMV71J19 is not set +# CONFIG_ARCH_CHIP_SAMV71J20 is not set +# CONFIG_ARCH_CHIP_SAMV71J21 is not set +# CONFIG_ARCH_CHIP_SAME70 is not set +# CONFIG_ARCH_CHIP_SAME70Q is not set +# CONFIG_ARCH_CHIP_SAME70N is not set +# CONFIG_ARCH_CHIP_SAME70J is not set +CONFIG_ARCH_CHIP_SAMV71=y +CONFIG_ARCH_CHIP_SAMV71Q=y +# CONFIG_ARCH_CHIP_SAMV71N is not set +# CONFIG_ARCH_CHIP_SAMV71J is not set +# CONFIG_SAMV7_MCAN is not set +CONFIG_SAMV7_HAVE_MCAN1=y +CONFIG_SAMV7_HAVE_DAC1=y +CONFIG_SAMV7_HAVE_EBI=y +# CONFIG_SAMV7_EMAC is not set +CONFIG_SAMV7_HSMCI=y +CONFIG_SAMV7_HAVE_HSMCI0=y +# CONFIG_SAMV7_HAVE_ISI8 is not set +CONFIG_SAMV7_HAVE_MEDIALB=y +CONFIG_SAMV7_HAVE_SDRAMC=y +CONFIG_SAMV7_HAVE_SPI0=y +CONFIG_SAMV7_HAVE_SPI1=y +# CONFIG_SAMV7_QSPI_IS_SPI is not set +# CONFIG_SAMV7_SSC is not set +# CONFIG_SAMV7_HAVE_TC is not set +CONFIG_SAMV7_HAVE_TWIHS2=y +# CONFIG_SAMV7_HAVE_USBFS is not set +CONFIG_SAMV7_HAVE_USBHS=y +CONFIG_SAMV7_HAVE_USART0=y +CONFIG_SAMV7_HAVE_USART1=y +CONFIG_SAMV7_HAVE_USART2=y +# CONFIG_SAMV7_SPI is not set +# CONFIG_SAMV7_SPI_MASTER is not set +# CONFIG_SAMV7_SPI_SLAVE is not set + +# +# SAMV7 Peripheral Selection +# +# CONFIG_SAMV7_ACC is not set +# CONFIG_SAMV7_ADC is not set +# CONFIG_SAMV7_AFEC0 is not set +# CONFIG_SAMV7_AFEC1 is not set +# CONFIG_SAMV7_MCAN0 is not set +# CONFIG_SAMV7_MCAN1 is not set +# CONFIG_SAMV7_DAC0 is not set +# CONFIG_SAMV7_DAC1 is not set +# CONFIG_SAMV7_EBI is not set +# CONFIG_SAMV7_EMAC0 is not set +CONFIG_SAMV7_XDMAC=y +CONFIG_SAMV7_HSMCI0=y +# CONFIG_SAMV7_ISI is not set +# CONFIG_SAMV7_MLB is not set +# CONFIG_SAMV7_PWM0 is not set +# CONFIG_SAMV7_PWM1 is not set +# CONFIG_SAMV7_QSPI is not set +# CONFIG_SAMV7_RTC is not set +# CONFIG_SAMV7_RTT is not set +CONFIG_SAMV7_SDRAMC=y +# CONFIG_SAMV7_SMC is not set +# CONFIG_SAMV7_SPI0 is not set +# CONFIG_SAMV7_SPI1 is not set +# CONFIG_SAMV7_SSC0 is not set +# CONFIG_SAMV7_TC0 is not set +# CONFIG_SAMV7_TC1 is not set +# CONFIG_SAMV7_TC2 is not set +# CONFIG_SAMV7_TC3 is not set +# CONFIG_SAMV7_TRNG is not set +CONFIG_SAMV7_TWIHS0=y +# CONFIG_SAMV7_TWIHS1 is not set +# CONFIG_SAMV7_TWIHS2 is not set +# CONFIG_SAMV7_UART0 is not set +# CONFIG_SAMV7_UART1 is not set +# CONFIG_SAMV7_UART2 is not set +CONFIG_SAMV7_UART3=y +# CONFIG_SAMV7_UART4 is not set +# CONFIG_SAMV7_USBDEVHS is not set +# CONFIG_SAMV7_USBHOSTHS is not set +# CONFIG_SAMV7_USART0 is not set +# CONFIG_SAMV7_USART1 is not set +# CONFIG_SAMV7_USART2 is not set +# CONFIG_SAMV7_WDT is not set +# CONFIG_SAMV7_RSWDT is not set +CONFIG_SAMV7_GPIO_IRQ=y +CONFIG_SAMV7_GPIOA_IRQ=y +CONFIG_SAMV7_GPIOB_IRQ=y +# CONFIG_SAMV7_GPIOC_IRQ is not set +CONFIG_SAMV7_GPIOD_IRQ=y +# CONFIG_SAMV7_GPIOE_IRQ is not set +# CONFIG_SAMV7_PROGMEM is not set + +# +# SDRAM Configuration +# +CONFIG_SAMV7_SDRAMSIZE=2097152 +# CONFIG_SAMV7_SDRAMHEAP is not set + +# +# TWIHS device driver options +# +CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + +# +# HSMCI device driver options +# +# CONFIG_SAMV7_HSMCI_RDPROOF is not set +# CONFIG_SAMV7_HSMCI_WRPROOF is not set +# CONFIG_SAMV7_HSMCI_UNALIGNED is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MPU=y +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=51262 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20400000 +CONFIG_RAM_SIZE=393216 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMV71_XULT=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="samv71-xult" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +# CONFIG_SAMV71XULT_MXTXPLND is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2015 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=18 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +CONFIG_LIB_SYSCALL=y +CONFIG_SYS_RESERVED=8 +CONFIG_SYS_NNEST=2 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_MMCSD_SPI is not set +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +CONFIG_MTD_CONFIG=y +# CONFIG_MTD_CONFIG_RAM_CONSOLIDATE is not set +CONFIG_MTD_CONFIG_ERASEDVALUE=0xff + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +CONFIG_MTD_AT24XX=y +# CONFIG_AT24XX_MULTI is not set +CONFIG_AT24XX_SIZE=2 +CONFIG_AT24XX_ADDR=0x57 +CONFIG_AT24XX_EXTENDED=y +CONFIG_AT24XX_EXTSIZE=160 +CONFIG_AT24XX_FREQUENCY=100000 +CONFIG_MTD_AT25=y +CONFIG_AT25_SPIMODE=0 +CONFIG_AT25_SPIFREQUENCY=20000000 +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +CONFIG_ARCH_HAVE_UART3=y +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART3 Configuration +# +CONFIG_UART3_RXBUFSIZE=256 +CONFIG_UART3_TXBUFSIZE=256 +CONFIG_UART3_BAUD=115200 +CONFIG_UART3_BITS=8 +CONFIG_UART3_PARITY=0 +CONFIG_UART3_2STOP=0 +# CONFIG_UART3_IFLOWCONTROL is not set +# CONFIG_UART3_OFLOWCONTROL is not set +# CONFIG_UART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_KMM is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_MTD is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_KERNEL_HEAP=y +CONFIG_MM_KERNEL_HEAPSIZE=8192 +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_USRWORK is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_DISABLE_DD=y +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKFATFS=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=0 +CONFIG_I2CTOOL_MAXBUS=0 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=400000 +# CONFIG_SYSTEM_HEXED is not set +CONFIG_SYSTEM_RAMTEST=y +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/samv71-xult/knsh/setenv.sh b/configs/samv71-xult/knsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..aab3d9b64c2819221b341dccf326327056021e5c --- /dev/null +++ b/configs/samv71-xult/knsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/samv7-xult/knsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/samv71-xult/module/Make.defs b/configs/samv71-xult/module/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..2900024e899d622cc29c53f1e3c70262dde9ebc0 --- /dev/null +++ b/configs/samv71-xult/module/Make.defs @@ -0,0 +1,130 @@ +############################################################################ +# configs/samv71-xult/module/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_ARMV7M_DTCM),y) + LDSCRIPT = flash-dtcm.ld +else + LDSCRIPT = flash-sram.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# Loadable module definitions + +CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs + +LDMODULEFLAGS = -r -e module_initialize +ifeq ($(WINTOOL),y) + LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/sched/module/gnu-elf.ld}" +else + LDMODULEFLAGS += -T $(TOPDIR)/sched/module/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/samv71-xult/module/defconfig b/configs/samv71-xult/module/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..96ce1959bb46c47d5db1a1cd018c3cbb02973647 --- /dev/null +++ b/configs/samv71-xult/module/defconfig @@ -0,0 +1,970 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +CONFIG_EXPERIMENTAL=y +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +CONFIG_ARCH_CHIP_SAMV7=y +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="samv7" +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +CONFIG_ARMV7M_LAZYFPU=y +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_DPFPU=y +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# SAMV7 Configuration Options +# +# CONFIG_ARCH_CHIP_SAME70Q19 is not set +# CONFIG_ARCH_CHIP_SAME70Q20 is not set +# CONFIG_ARCH_CHIP_SAME70Q21 is not set +# CONFIG_ARCH_CHIP_SAME70N19 is not set +# CONFIG_ARCH_CHIP_SAME70N20 is not set +# CONFIG_ARCH_CHIP_SAME70N21 is not set +# CONFIG_ARCH_CHIP_SAME70J19 is not set +# CONFIG_ARCH_CHIP_SAME70J20 is not set +# CONFIG_ARCH_CHIP_SAME70J21 is not set +# CONFIG_ARCH_CHIP_SAMV71Q19 is not set +# CONFIG_ARCH_CHIP_SAMV71Q20 is not set +CONFIG_ARCH_CHIP_SAMV71Q21=y +# CONFIG_ARCH_CHIP_SAMV71N19 is not set +# CONFIG_ARCH_CHIP_SAMV71N20 is not set +# CONFIG_ARCH_CHIP_SAMV71N21 is not set +# CONFIG_ARCH_CHIP_SAMV71J19 is not set +# CONFIG_ARCH_CHIP_SAMV71J20 is not set +# CONFIG_ARCH_CHIP_SAMV71J21 is not set +# CONFIG_ARCH_CHIP_SAME70 is not set +# CONFIG_ARCH_CHIP_SAME70Q is not set +# CONFIG_ARCH_CHIP_SAME70N is not set +# CONFIG_ARCH_CHIP_SAME70J is not set +CONFIG_ARCH_CHIP_SAMV71=y +CONFIG_ARCH_CHIP_SAMV71Q=y +# CONFIG_ARCH_CHIP_SAMV71N is not set +# CONFIG_ARCH_CHIP_SAMV71J is not set +# CONFIG_SAMV7_MCAN is not set +CONFIG_SAMV7_HAVE_MCAN1=y +CONFIG_SAMV7_HAVE_DAC1=y +CONFIG_SAMV7_HAVE_EBI=y +# CONFIG_SAMV7_EMAC is not set +# CONFIG_SAMV7_HSMCI is not set +CONFIG_SAMV7_HAVE_HSMCI0=y +# CONFIG_SAMV7_HAVE_ISI8 is not set +CONFIG_SAMV7_HAVE_MEDIALB=y +CONFIG_SAMV7_HAVE_SDRAMC=y +CONFIG_SAMV7_HAVE_SPI0=y +CONFIG_SAMV7_HAVE_SPI1=y +# CONFIG_SAMV7_QSPI_IS_SPI is not set +# CONFIG_SAMV7_SSC is not set +# CONFIG_SAMV7_HAVE_TC is not set +CONFIG_SAMV7_HAVE_TWIHS2=y +# CONFIG_SAMV7_HAVE_USBFS is not set +CONFIG_SAMV7_HAVE_USBHS=y +CONFIG_SAMV7_HAVE_USART0=y +CONFIG_SAMV7_HAVE_USART1=y +CONFIG_SAMV7_HAVE_USART2=y +# CONFIG_SAMV7_SPI is not set +# CONFIG_SAMV7_SPI_MASTER is not set +# CONFIG_SAMV7_SPI_SLAVE is not set + +# +# SAMV7 Peripheral Selection +# +# CONFIG_SAMV7_ACC is not set +# CONFIG_SAMV7_ADC is not set +# CONFIG_SAMV7_AFEC0 is not set +# CONFIG_SAMV7_AFEC1 is not set +# CONFIG_SAMV7_MCAN0 is not set +# CONFIG_SAMV7_MCAN1 is not set +# CONFIG_SAMV7_DAC0 is not set +# CONFIG_SAMV7_DAC1 is not set +# CONFIG_SAMV7_EBI is not set +# CONFIG_SAMV7_EMAC0 is not set +CONFIG_SAMV7_XDMAC=y +# CONFIG_SAMV7_HSMCI0 is not set +# CONFIG_SAMV7_ISI is not set +# CONFIG_SAMV7_MLB is not set +# CONFIG_SAMV7_PWM0 is not set +# CONFIG_SAMV7_PWM1 is not set +# CONFIG_SAMV7_QSPI is not set +# CONFIG_SAMV7_RTC is not set +# CONFIG_SAMV7_RTT is not set +# CONFIG_SAMV7_SDRAMC is not set +# CONFIG_SAMV7_SMC is not set +# CONFIG_SAMV7_SPI0 is not set +# CONFIG_SAMV7_SPI1 is not set +# CONFIG_SAMV7_SSC0 is not set +# CONFIG_SAMV7_TC0 is not set +# CONFIG_SAMV7_TC1 is not set +# CONFIG_SAMV7_TC2 is not set +# CONFIG_SAMV7_TC3 is not set +# CONFIG_SAMV7_TRNG is not set +# CONFIG_SAMV7_TWIHS0 is not set +# CONFIG_SAMV7_TWIHS1 is not set +# CONFIG_SAMV7_TWIHS2 is not set +# CONFIG_SAMV7_UART0 is not set +# CONFIG_SAMV7_UART1 is not set +# CONFIG_SAMV7_UART2 is not set +CONFIG_SAMV7_UART3=y +# CONFIG_SAMV7_UART4 is not set +# CONFIG_SAMV7_USBDEVHS is not set +# CONFIG_SAMV7_USBHOSTHS is not set +# CONFIG_SAMV7_USART0 is not set +# CONFIG_SAMV7_USART1 is not set +# CONFIG_SAMV7_USART2 is not set +# CONFIG_SAMV7_WDT is not set +# CONFIG_SAMV7_RSWDT is not set +CONFIG_SAMV7_GPIO_IRQ=y +CONFIG_SAMV7_GPIOA_IRQ=y +CONFIG_SAMV7_GPIOB_IRQ=y +# CONFIG_SAMV7_GPIOC_IRQ is not set +CONFIG_SAMV7_GPIOD_IRQ=y +# CONFIG_SAMV7_GPIOE_IRQ is not set +# CONFIG_SAMV7_PROGMEM is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +CONFIG_ARCH_HAVE_COHERENT_DCACHE=y +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=51262 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20400000 +CONFIG_RAM_SIZE=393216 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMV71_XULT=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="samv71-xult" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_SAMV71XULT_MXTXPLND is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_OS_SYMTAB=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_SPINLOCK is not set +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MODULE=y +CONFIG_MODULE_ALIGN_LOG2=2 +CONFIG_MODULE_BUFFERSIZE=128 +CONFIG_MODULE_BUFFERINCR=32 + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +CONFIG_ARCH_HAVE_UART3=y +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART3 Configuration +# +CONFIG_UART3_RXBUFSIZE=256 +CONFIG_UART3_TXBUFSIZE=256 +CONFIG_UART3_BAUD=115200 +CONFIG_UART3_BITS=8 +CONFIG_UART3_PARITY=0 +CONFIG_UART3_2STOP=0 +# CONFIG_UART3_IFLOWCONTROL is not set +# CONFIG_UART3_OFLOWCONTROL is not set +# CONFIG_UART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_MODULE is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# +# CONFIG_WIRELESS is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +CONFIG_EXAMPLES_MODULE=y +# CONFIG_EXAMPLES_MODULE_LIBC is not set +# CONFIG_EXAMPLES_MODULE_LIBGCC is not set +CONFIG_EXAMPLES_MODULE_DEVMINOR=0 +CONFIG_EXAMPLES_MODULE_DEVPATH="/dev/ram0" +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MODCMDS is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_ROMFSETC is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/samv71-xult/module/setenv.sh b/configs/samv71-xult/module/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..8fda2eca92046f3759d15c199cb44af6dc4561ca --- /dev/null +++ b/configs/samv71-xult/module/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/samv7-xult/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/samv71-xult/mxtxplnd/Make.defs b/configs/samv71-xult/mxtxplnd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e5463a1c116a8c91b0e0a96a2beb410af0627a05 --- /dev/null +++ b/configs/samv71-xult/mxtxplnd/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/samv71-xult/mxtxplnd/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_ARMV7M_DTCM),y) + LDSCRIPT = flash-dtcm.ld +else + LDSCRIPT = flash-sram.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/samv71-xult/mxtxplnd/defconfig b/configs/samv71-xult/mxtxplnd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..32751004cc5c65b0f94f166297b3d45c2ee66704 --- /dev/null +++ b/configs/samv71-xult/mxtxplnd/defconfig @@ -0,0 +1,1199 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +CONFIG_ARCH_CHIP_SAMV7=y +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="samv7" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +CONFIG_ARMV7M_LAZYFPU=y +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_DPFPU=y +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +# CONFIG_ARMV7M_DCACHE_WRITETHROUGH is not set +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# SAMV7 Configuration Options +# +# CONFIG_ARCH_CHIP_SAME70Q19 is not set +# CONFIG_ARCH_CHIP_SAME70Q20 is not set +# CONFIG_ARCH_CHIP_SAME70Q21 is not set +# CONFIG_ARCH_CHIP_SAME70N19 is not set +# CONFIG_ARCH_CHIP_SAME70N20 is not set +# CONFIG_ARCH_CHIP_SAME70N21 is not set +# CONFIG_ARCH_CHIP_SAME70J19 is not set +# CONFIG_ARCH_CHIP_SAME70J20 is not set +# CONFIG_ARCH_CHIP_SAME70J21 is not set +# CONFIG_ARCH_CHIP_SAMV71Q19 is not set +# CONFIG_ARCH_CHIP_SAMV71Q20 is not set +CONFIG_ARCH_CHIP_SAMV71Q21=y +# CONFIG_ARCH_CHIP_SAMV71N19 is not set +# CONFIG_ARCH_CHIP_SAMV71N20 is not set +# CONFIG_ARCH_CHIP_SAMV71N21 is not set +# CONFIG_ARCH_CHIP_SAMV71J19 is not set +# CONFIG_ARCH_CHIP_SAMV71J20 is not set +# CONFIG_ARCH_CHIP_SAMV71J21 is not set +# CONFIG_ARCH_CHIP_SAME70 is not set +# CONFIG_ARCH_CHIP_SAME70Q is not set +# CONFIG_ARCH_CHIP_SAME70N is not set +# CONFIG_ARCH_CHIP_SAME70J is not set +CONFIG_ARCH_CHIP_SAMV71=y +CONFIG_ARCH_CHIP_SAMV71Q=y +# CONFIG_ARCH_CHIP_SAMV71N is not set +# CONFIG_ARCH_CHIP_SAMV71J is not set +# CONFIG_SAMV7_MCAN is not set +CONFIG_SAMV7_HAVE_MCAN1=y +CONFIG_SAMV7_HAVE_DAC1=y +CONFIG_SAMV7_HAVE_EBI=y +# CONFIG_SAMV7_EMAC is not set +CONFIG_SAMV7_HSMCI=y +CONFIG_SAMV7_HAVE_HSMCI0=y +# CONFIG_SAMV7_HAVE_ISI8 is not set +CONFIG_SAMV7_HAVE_MEDIALB=y +CONFIG_SAMV7_HAVE_SDRAMC=y +CONFIG_SAMV7_HAVE_SPI0=y +CONFIG_SAMV7_HAVE_SPI1=y +# CONFIG_SAMV7_QSPI_IS_SPI is not set +# CONFIG_SAMV7_SSC is not set +# CONFIG_SAMV7_HAVE_TC is not set +CONFIG_SAMV7_HAVE_TWIHS2=y +# CONFIG_SAMV7_HAVE_USBFS is not set +CONFIG_SAMV7_HAVE_USBHS=y +CONFIG_SAMV7_HAVE_USART0=y +CONFIG_SAMV7_HAVE_USART1=y +CONFIG_SAMV7_HAVE_USART2=y +# CONFIG_SAMV7_SPI is not set +# CONFIG_SAMV7_SPI_MASTER is not set +# CONFIG_SAMV7_SPI_SLAVE is not set + +# +# SAMV7 Peripheral Selection +# +# CONFIG_SAMV7_ACC is not set +# CONFIG_SAMV7_ADC is not set +# CONFIG_SAMV7_AFEC0 is not set +# CONFIG_SAMV7_AFEC1 is not set +# CONFIG_SAMV7_MCAN0 is not set +# CONFIG_SAMV7_MCAN1 is not set +# CONFIG_SAMV7_DAC0 is not set +# CONFIG_SAMV7_DAC1 is not set +# CONFIG_SAMV7_EBI is not set +# CONFIG_SAMV7_EMAC0 is not set +CONFIG_SAMV7_XDMAC=y +CONFIG_SAMV7_HSMCI0=y +# CONFIG_SAMV7_ISI is not set +# CONFIG_SAMV7_MLB is not set +# CONFIG_SAMV7_PWM0 is not set +# CONFIG_SAMV7_PWM1 is not set +# CONFIG_SAMV7_QSPI is not set +# CONFIG_SAMV7_RTC is not set +# CONFIG_SAMV7_RTT is not set +# CONFIG_SAMV7_SDRAMC is not set +CONFIG_SAMV7_SMC=y +# CONFIG_SAMV7_SPI0 is not set +# CONFIG_SAMV7_SPI1 is not set +# CONFIG_SAMV7_SSC0 is not set +# CONFIG_SAMV7_TC0 is not set +# CONFIG_SAMV7_TC1 is not set +# CONFIG_SAMV7_TC2 is not set +# CONFIG_SAMV7_TC3 is not set +# CONFIG_SAMV7_TRNG is not set +CONFIG_SAMV7_TWIHS0=y +# CONFIG_SAMV7_TWIHS1 is not set +# CONFIG_SAMV7_TWIHS2 is not set +# CONFIG_SAMV7_UART0 is not set +# CONFIG_SAMV7_UART1 is not set +# CONFIG_SAMV7_UART2 is not set +# CONFIG_SAMV7_UART3 is not set +# CONFIG_SAMV7_UART4 is not set +# CONFIG_SAMV7_USBDEVHS is not set +# CONFIG_SAMV7_USBHOSTHS is not set +CONFIG_SAMV7_USART0=y +# CONFIG_SAMV7_USART1 is not set +# CONFIG_SAMV7_USART2 is not set +# CONFIG_SAMV7_WDT is not set +# CONFIG_SAMV7_RSWDT is not set +CONFIG_SAMV7_GPIO_IRQ=y +CONFIG_SAMV7_GPIOA_IRQ=y +CONFIG_SAMV7_GPIOB_IRQ=y +# CONFIG_SAMV7_GPIOC_IRQ is not set +CONFIG_SAMV7_GPIOD_IRQ=y +# CONFIG_SAMV7_GPIOE_IRQ is not set +# CONFIG_SAMV7_PROGMEM is not set + +# +# TWIHS device driver options +# +CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + +# +# HSMCI device driver options +# +# CONFIG_SAMV7_HSMCI_RDPROOF is not set +# CONFIG_SAMV7_HSMCI_WRPROOF is not set +# CONFIG_SAMV7_HSMCI_UNALIGNED is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=51262 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20400000 +CONFIG_RAM_SIZE=393216 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMV71_XULT=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="samv71-xult" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_SAMV71XULT_MXTXPLND=y +CONFIG_SAMV71XULT_MXTXPLND_LCD=y +# CONFIG_SAMV71XULT_MXT_SWAPXY is not set +CONFIG_SAMV71XULT_MXT_I2CFREQUENCY=400000 +CONFIG_SAMV71XULT_MXT_DEVMINOR=0 +CONFIG_SAMV71XULT_LCD_BGCOLOR=0x00 +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_TSCTEST=y +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +CONFIG_INPUT_MXT=y +CONFIG_MXT_THRESHX=5 +CONFIG_MXT_THRESHY=8 +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_MMCSD_SPI is not set +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +CONFIG_MTD_CONFIG=y +# CONFIG_MTD_CONFIG_RAM_CONSOLIDATE is not set +CONFIG_MTD_CONFIG_ERASEDVALUE=0xff + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +CONFIG_MTD_AT24XX=y +# CONFIG_AT24XX_MULTI is not set +CONFIG_AT24XX_SIZE=2 +CONFIG_AT24XX_ADDR=0x57 +CONFIG_AT24XX_EXTENDED=y +CONFIG_AT24XX_EXTSIZE=160 +CONFIG_AT24XX_FREQUENCY=100000 +CONFIG_MTD_AT25=y +CONFIG_AT25_SPIMODE=0 +CONFIG_AT25_SPIFREQUENCY=20000000 +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +CONFIG_ARCH_HAVE_USART0=y +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART0_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART0 Configuration +# +CONFIG_USART0_RXBUFSIZE=256 +CONFIG_USART0_TXBUFSIZE=256 +CONFIG_USART0_BAUD=115200 +CONFIG_USART0_BITS=8 +CONFIG_USART0_PARITY=0 +CONFIG_USART0_2STOP=0 +# CONFIG_USART0_IFLOWCONTROL is not set +# CONFIG_USART0_OFLOWCONTROL is not set +# CONFIG_USART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_MTD is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +CONFIG_NX_XYINPUT_NONE=y +# CONFIG_NX_XYINPUT_MOUSE is not set +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +# CONFIG_NX_KBD is not set + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=1 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=1 +CONFIG_EXAMPLES_BUTTONS_NAME0="SW0" +CONFIG_EXAMPLES_BUTTONS_NAME1="SW1" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +CONFIG_EXAMPLES_NXLINES=y +CONFIG_EXAMPLES_NXLINES_VPLANE=0 +CONFIG_EXAMPLES_NXLINES_DEVNO=0 +CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16 +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=16 +CONFIG_EXAMPLES_NXLINES_BPP=16 +# CONFIG_EXAMPLES_NXLINES_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +CONFIG_EXAMPLES_TOUCHSCREEN=y +CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0 +CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0" +# CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE is not set +CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=0 +CONFIG_I2CTOOL_MAXBUS=0 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=400000 +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/samv71-xult/mxtxplnd/setenv.sh b/configs/samv71-xult/mxtxplnd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c215192fa243ea9087c9de677ca168847f577e39 --- /dev/null +++ b/configs/samv71-xult/mxtxplnd/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/samv7-xult/mxtxplnd/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/samv71-xult/netnsh/Make.defs b/configs/samv71-xult/netnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..4a0f316c078de8dc7682c71a3f8e7ff88260dc08 --- /dev/null +++ b/configs/samv71-xult/netnsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/samv71-xult/netnsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_ARMV7M_DTCM),y) + LDSCRIPT = flash-dtcm.ld +else + LDSCRIPT = flash-sram.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/samv71-xult/netnsh/defconfig b/configs/samv71-xult/netnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..68b39a691a2d12c4791f75c6449a6b171b4994e4 --- /dev/null +++ b/configs/samv71-xult/netnsh/defconfig @@ -0,0 +1,1293 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_CUSTOMOPT=y +# CONFIG_DEBUG_FULLOPT is not set +CONFIG_DEBUG_OPTLEVEL="-O2" + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +CONFIG_ARCH_CHIP_SAMV7=y +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="samv7" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +CONFIG_ARMV7M_LAZYFPU=y +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_DPFPU=y +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# SAMV7 Configuration Options +# +# CONFIG_ARCH_CHIP_SAME70Q19 is not set +# CONFIG_ARCH_CHIP_SAME70Q20 is not set +# CONFIG_ARCH_CHIP_SAME70Q21 is not set +# CONFIG_ARCH_CHIP_SAME70N19 is not set +# CONFIG_ARCH_CHIP_SAME70N20 is not set +# CONFIG_ARCH_CHIP_SAME70N21 is not set +# CONFIG_ARCH_CHIP_SAME70J19 is not set +# CONFIG_ARCH_CHIP_SAME70J20 is not set +# CONFIG_ARCH_CHIP_SAME70J21 is not set +# CONFIG_ARCH_CHIP_SAMV71Q19 is not set +# CONFIG_ARCH_CHIP_SAMV71Q20 is not set +CONFIG_ARCH_CHIP_SAMV71Q21=y +# CONFIG_ARCH_CHIP_SAMV71N19 is not set +# CONFIG_ARCH_CHIP_SAMV71N20 is not set +# CONFIG_ARCH_CHIP_SAMV71N21 is not set +# CONFIG_ARCH_CHIP_SAMV71J19 is not set +# CONFIG_ARCH_CHIP_SAMV71J20 is not set +# CONFIG_ARCH_CHIP_SAMV71J21 is not set +# CONFIG_ARCH_CHIP_SAME70 is not set +# CONFIG_ARCH_CHIP_SAME70Q is not set +# CONFIG_ARCH_CHIP_SAME70N is not set +# CONFIG_ARCH_CHIP_SAME70J is not set +CONFIG_ARCH_CHIP_SAMV71=y +CONFIG_ARCH_CHIP_SAMV71Q=y +# CONFIG_ARCH_CHIP_SAMV71N is not set +# CONFIG_ARCH_CHIP_SAMV71J is not set +# CONFIG_SAMV7_MCAN is not set +CONFIG_SAMV7_HAVE_MCAN1=y +CONFIG_SAMV7_HAVE_DAC1=y +CONFIG_SAMV7_HAVE_EBI=y +CONFIG_SAMV7_EMAC=y +CONFIG_SAMV7_HSMCI=y +CONFIG_SAMV7_HAVE_HSMCI0=y +# CONFIG_SAMV7_HAVE_ISI8 is not set +CONFIG_SAMV7_HAVE_MEDIALB=y +CONFIG_SAMV7_HAVE_SDRAMC=y +CONFIG_SAMV7_HAVE_SPI0=y +CONFIG_SAMV7_HAVE_SPI1=y +# CONFIG_SAMV7_QSPI_IS_SPI is not set +# CONFIG_SAMV7_SSC is not set +# CONFIG_SAMV7_HAVE_TC is not set +CONFIG_SAMV7_HAVE_TWIHS2=y +# CONFIG_SAMV7_HAVE_USBFS is not set +CONFIG_SAMV7_HAVE_USBHS=y +CONFIG_SAMV7_HAVE_USART0=y +CONFIG_SAMV7_HAVE_USART1=y +CONFIG_SAMV7_HAVE_USART2=y +# CONFIG_SAMV7_SPI is not set +# CONFIG_SAMV7_SPI_MASTER is not set +# CONFIG_SAMV7_SPI_SLAVE is not set + +# +# SAMV7 Peripheral Selection +# +# CONFIG_SAMV7_ACC is not set +# CONFIG_SAMV7_ADC is not set +# CONFIG_SAMV7_AFEC0 is not set +# CONFIG_SAMV7_AFEC1 is not set +# CONFIG_SAMV7_MCAN0 is not set +# CONFIG_SAMV7_MCAN1 is not set +# CONFIG_SAMV7_DAC0 is not set +# CONFIG_SAMV7_DAC1 is not set +# CONFIG_SAMV7_EBI is not set +CONFIG_SAMV7_EMAC0=y +CONFIG_SAMV7_XDMAC=y +CONFIG_SAMV7_HSMCI0=y +# CONFIG_SAMV7_ISI is not set +# CONFIG_SAMV7_MLB is not set +# CONFIG_SAMV7_PWM0 is not set +# CONFIG_SAMV7_PWM1 is not set +# CONFIG_SAMV7_QSPI is not set +# CONFIG_SAMV7_RTC is not set +# CONFIG_SAMV7_RTT is not set +# CONFIG_SAMV7_SDRAMC is not set +# CONFIG_SAMV7_SMC is not set +# CONFIG_SAMV7_SPI0 is not set +# CONFIG_SAMV7_SPI1 is not set +# CONFIG_SAMV7_SSC0 is not set +# CONFIG_SAMV7_TC0 is not set +# CONFIG_SAMV7_TC1 is not set +# CONFIG_SAMV7_TC2 is not set +# CONFIG_SAMV7_TC3 is not set +# CONFIG_SAMV7_TRNG is not set +CONFIG_SAMV7_TWIHS0=y +# CONFIG_SAMV7_TWIHS1 is not set +# CONFIG_SAMV7_TWIHS2 is not set +# CONFIG_SAMV7_UART0 is not set +# CONFIG_SAMV7_UART1 is not set +# CONFIG_SAMV7_UART2 is not set +CONFIG_SAMV7_UART3=y +# CONFIG_SAMV7_UART4 is not set +# CONFIG_SAMV7_USBDEVHS is not set +# CONFIG_SAMV7_USBHOSTHS is not set +# CONFIG_SAMV7_USART0 is not set +# CONFIG_SAMV7_USART1 is not set +# CONFIG_SAMV7_USART2 is not set +# CONFIG_SAMV7_WDT is not set +# CONFIG_SAMV7_RSWDT is not set +CONFIG_SAMV7_GPIO_IRQ=y +CONFIG_SAMV7_GPIOA_IRQ=y +CONFIG_SAMV7_GPIOB_IRQ=y +# CONFIG_SAMV7_GPIOC_IRQ is not set +CONFIG_SAMV7_GPIOD_IRQ=y +# CONFIG_SAMV7_GPIOE_IRQ is not set +# CONFIG_SAMV7_PROGMEM is not set + +# +# TWIHS device driver options +# +CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + +# +# HSMCI device driver options +# +# CONFIG_SAMV7_HSMCI_RDPROOF is not set +# CONFIG_SAMV7_HSMCI_WRPROOF is not set +# CONFIG_SAMV7_HSMCI_UNALIGNED is not set + +# +# EMAC device driver options +# +CONFIG_SAMV7_EMAC0_NRXBUFFERS=16 +CONFIG_SAMV7_EMAC0_NTXBUFFERS=8 +CONFIG_SAMV7_EMAC0_PHYADDR=1 +# CONFIG_SAMV7_EMAC0_PHYINIT is not set +# CONFIG_SAMV7_EMAC0_MII is not set +CONFIG_SAMV7_EMAC0_RMII=y +CONFIG_SAMV7_EMAC0_AUTONEG=y +CONFIG_SAMV7_EMAC0_PHYSR=30 +CONFIG_SAMV7_EMAC0_PHYSR_ALTCONFIG=y +CONFIG_SAMV7_EMAC0_PHYSR_ALTMODE=0x7 +CONFIG_SAMV7_EMAC0_PHYSR_10HD=0x1 +CONFIG_SAMV7_EMAC0_PHYSR_100HD=0x2 +CONFIG_SAMV7_EMAC0_PHYSR_10FD=0x5 +CONFIG_SAMV7_EMAC0_PHYSR_100FD=0x6 +CONFIG_SAMV7_EMAC0_ISETH0=y +# CONFIG_SAMV7_EMAC_PREALLOCATE is not set +# CONFIG_SAMV7_EMAC_NBC is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=51262 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20400000 +CONFIG_RAM_SIZE=393216 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMV71_XULT=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="samv71-xult" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +# CONFIG_SAMV71XULT_MXTXPLND is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_MMCSD_SPI is not set +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +CONFIG_MTD_CONFIG=y +# CONFIG_MTD_CONFIG_RAM_CONSOLIDATE is not set +CONFIG_MTD_CONFIG_ERASEDVALUE=0xff + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +CONFIG_MTD_AT24XX=y +# CONFIG_AT24XX_MULTI is not set +CONFIG_AT24XX_SIZE=2 +CONFIG_AT24XX_ADDR=0x57 +CONFIG_AT24XX_EXTENDED=y +CONFIG_AT24XX_EXTSIZE=160 +CONFIG_AT24XX_FREQUENCY=100000 +CONFIG_MTD_AT25=y +CONFIG_AT25_SPIMODE=0 +CONFIG_AT25_SPIFREQUENCY=20000000 +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +CONFIG_NETDEV_STATISTICS=y +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +CONFIG_ARCH_PHY_INTERRUPT=y +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +CONFIG_ETH0_PHY_KSZ8061=y +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +CONFIG_ARCH_HAVE_UART3=y +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART3 Configuration +# +CONFIG_UART3_RXBUFSIZE=256 +CONFIG_UART3_TXBUFSIZE=256 +CONFIG_UART3_BAUD=115200 +CONFIG_UART3_BITS=8 +CONFIG_UART3_PARITY=0 +CONFIG_UART3_2STOP=0 +# CONFIG_UART3_IFLOWCONTROL is not set +# CONFIG_UART3_OFLOWCONTROL is not set +# CONFIG_UART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +CONFIG_NETDEV_PHY_IOCTL=y + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +# CONFIG_NET_UDP_CHECKSUMS is not set +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=36 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="SAMV71-XULT" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_NET is not set +# CONFIG_FS_PROCFS_EXCLUDE_MTD is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +# CONFIG_NETDB_DNSSERVER_NOADDR is not set +CONFIG_NETDB_DNSSERVER_IPv4=y +CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001 + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=1 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=1 +CONFIG_EXAMPLES_BUTTONS_NAME0="SW0" +CONFIG_EXAMPLES_BUTTONS_NAME1="SW1" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT_THREAD=y +CONFIG_NSH_NETINIT_MONITOR=y +CONFIG_NSH_NETINIT_SIGNO=18 +CONFIG_NSH_NETINIT_RETRYMSEC=2000 +CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 +CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=0 +CONFIG_I2CTOOL_MAXBUS=0 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=400000 +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_MDIO is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/samv71-xult/netnsh/setenv.sh b/configs/samv71-xult/netnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3bb7d494df9112ea099c1c96b51e8cd962bbcfcc --- /dev/null +++ b/configs/samv71-xult/netnsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/samv7-xult/netnsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/samv71-xult/nsh/Make.defs b/configs/samv71-xult/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..27f54d8e3f2194670b697ba0ded74fc02f09d2a7 --- /dev/null +++ b/configs/samv71-xult/nsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/samv71-xult/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_ARMV7M_DTCM),y) + LDSCRIPT = flash-dtcm.ld +else + LDSCRIPT = flash-sram.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/samv71-xult/nsh/defconfig b/configs/samv71-xult/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ee2472b2ce0585dd99a3c8bdf562af0f3c5f414f --- /dev/null +++ b/configs/samv71-xult/nsh/defconfig @@ -0,0 +1,1055 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +CONFIG_ARCH_CHIP_SAMV7=y +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="samv7" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +CONFIG_ARMV7M_LAZYFPU=y +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_DPFPU=y +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +# CONFIG_ARMV7M_DCACHE_WRITETHROUGH is not set +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# SAMV7 Configuration Options +# +# CONFIG_ARCH_CHIP_SAME70Q19 is not set +# CONFIG_ARCH_CHIP_SAME70Q20 is not set +# CONFIG_ARCH_CHIP_SAME70Q21 is not set +# CONFIG_ARCH_CHIP_SAME70N19 is not set +# CONFIG_ARCH_CHIP_SAME70N20 is not set +# CONFIG_ARCH_CHIP_SAME70N21 is not set +# CONFIG_ARCH_CHIP_SAME70J19 is not set +# CONFIG_ARCH_CHIP_SAME70J20 is not set +# CONFIG_ARCH_CHIP_SAME70J21 is not set +# CONFIG_ARCH_CHIP_SAMV71Q19 is not set +# CONFIG_ARCH_CHIP_SAMV71Q20 is not set +CONFIG_ARCH_CHIP_SAMV71Q21=y +# CONFIG_ARCH_CHIP_SAMV71N19 is not set +# CONFIG_ARCH_CHIP_SAMV71N20 is not set +# CONFIG_ARCH_CHIP_SAMV71N21 is not set +# CONFIG_ARCH_CHIP_SAMV71J19 is not set +# CONFIG_ARCH_CHIP_SAMV71J20 is not set +# CONFIG_ARCH_CHIP_SAMV71J21 is not set +# CONFIG_ARCH_CHIP_SAME70 is not set +# CONFIG_ARCH_CHIP_SAME70Q is not set +# CONFIG_ARCH_CHIP_SAME70N is not set +# CONFIG_ARCH_CHIP_SAME70J is not set +CONFIG_ARCH_CHIP_SAMV71=y +CONFIG_ARCH_CHIP_SAMV71Q=y +# CONFIG_ARCH_CHIP_SAMV71N is not set +# CONFIG_ARCH_CHIP_SAMV71J is not set +# CONFIG_SAMV7_MCAN is not set +CONFIG_SAMV7_HAVE_MCAN1=y +CONFIG_SAMV7_HAVE_DAC1=y +CONFIG_SAMV7_HAVE_EBI=y +# CONFIG_SAMV7_EMAC is not set +CONFIG_SAMV7_HSMCI=y +CONFIG_SAMV7_HAVE_HSMCI0=y +# CONFIG_SAMV7_HAVE_ISI8 is not set +CONFIG_SAMV7_HAVE_MEDIALB=y +CONFIG_SAMV7_HAVE_SDRAMC=y +CONFIG_SAMV7_HAVE_SPI0=y +CONFIG_SAMV7_HAVE_SPI1=y +# CONFIG_SAMV7_QSPI_IS_SPI is not set +# CONFIG_SAMV7_SSC is not set +# CONFIG_SAMV7_HAVE_TC is not set +CONFIG_SAMV7_HAVE_TWIHS2=y +# CONFIG_SAMV7_HAVE_USBFS is not set +CONFIG_SAMV7_HAVE_USBHS=y +CONFIG_SAMV7_HAVE_USART0=y +CONFIG_SAMV7_HAVE_USART1=y +CONFIG_SAMV7_HAVE_USART2=y +# CONFIG_SAMV7_SPI is not set +# CONFIG_SAMV7_SPI_MASTER is not set +# CONFIG_SAMV7_SPI_SLAVE is not set + +# +# SAMV7 Peripheral Selection +# +# CONFIG_SAMV7_ACC is not set +# CONFIG_SAMV7_ADC is not set +# CONFIG_SAMV7_AFEC0 is not set +# CONFIG_SAMV7_AFEC1 is not set +# CONFIG_SAMV7_MCAN0 is not set +# CONFIG_SAMV7_MCAN1 is not set +# CONFIG_SAMV7_DAC0 is not set +# CONFIG_SAMV7_DAC1 is not set +# CONFIG_SAMV7_EBI is not set +# CONFIG_SAMV7_EMAC0 is not set +CONFIG_SAMV7_XDMAC=y +CONFIG_SAMV7_HSMCI0=y +# CONFIG_SAMV7_ISI is not set +# CONFIG_SAMV7_MLB is not set +# CONFIG_SAMV7_PWM0 is not set +# CONFIG_SAMV7_PWM1 is not set +# CONFIG_SAMV7_QSPI is not set +# CONFIG_SAMV7_RTC is not set +# CONFIG_SAMV7_RTT is not set +CONFIG_SAMV7_SDRAMC=y +# CONFIG_SAMV7_SMC is not set +# CONFIG_SAMV7_SPI0 is not set +# CONFIG_SAMV7_SPI1 is not set +# CONFIG_SAMV7_SSC0 is not set +# CONFIG_SAMV7_TC0 is not set +# CONFIG_SAMV7_TC1 is not set +# CONFIG_SAMV7_TC2 is not set +# CONFIG_SAMV7_TC3 is not set +# CONFIG_SAMV7_TRNG is not set +CONFIG_SAMV7_TWIHS0=y +# CONFIG_SAMV7_TWIHS1 is not set +# CONFIG_SAMV7_TWIHS2 is not set +# CONFIG_SAMV7_UART0 is not set +# CONFIG_SAMV7_UART1 is not set +# CONFIG_SAMV7_UART2 is not set +CONFIG_SAMV7_UART3=y +# CONFIG_SAMV7_UART4 is not set +# CONFIG_SAMV7_USBDEVHS is not set +# CONFIG_SAMV7_USBHOSTHS is not set +# CONFIG_SAMV7_USART0 is not set +# CONFIG_SAMV7_USART1 is not set +# CONFIG_SAMV7_USART2 is not set +# CONFIG_SAMV7_WDT is not set +# CONFIG_SAMV7_RSWDT is not set +CONFIG_SAMV7_GPIO_IRQ=y +CONFIG_SAMV7_GPIOA_IRQ=y +CONFIG_SAMV7_GPIOB_IRQ=y +# CONFIG_SAMV7_GPIOC_IRQ is not set +CONFIG_SAMV7_GPIOD_IRQ=y +# CONFIG_SAMV7_GPIOE_IRQ is not set +# CONFIG_SAMV7_PROGMEM is not set + +# +# SDRAM Configuration +# +CONFIG_SAMV7_SDRAMSIZE=2097152 +# CONFIG_SAMV7_SDRAMHEAP is not set + +# +# TWIHS device driver options +# +CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + +# +# HSMCI device driver options +# +# CONFIG_SAMV7_HSMCI_RDPROOF is not set +# CONFIG_SAMV7_HSMCI_WRPROOF is not set +# CONFIG_SAMV7_HSMCI_UNALIGNED is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=51262 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20400000 +CONFIG_RAM_SIZE=393216 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMV71_XULT=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="samv71-xult" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +# CONFIG_SAMV71XULT_MXTXPLND is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_MMCSD_SPI is not set +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +CONFIG_MTD_CONFIG=y +# CONFIG_MTD_CONFIG_RAM_CONSOLIDATE is not set +CONFIG_MTD_CONFIG_ERASEDVALUE=0xff + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +CONFIG_MTD_AT24XX=y +# CONFIG_AT24XX_MULTI is not set +CONFIG_AT24XX_SIZE=2 +CONFIG_AT24XX_ADDR=0x57 +CONFIG_AT24XX_EXTENDED=y +CONFIG_AT24XX_EXTSIZE=160 +CONFIG_AT24XX_FREQUENCY=100000 +CONFIG_MTD_AT25=y +CONFIG_AT25_SPIMODE=0 +CONFIG_AT25_SPIFREQUENCY=20000000 +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +CONFIG_ARCH_HAVE_UART3=y +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART3 Configuration +# +CONFIG_UART3_RXBUFSIZE=256 +CONFIG_UART3_TXBUFSIZE=256 +CONFIG_UART3_BAUD=115200 +CONFIG_UART3_BITS=8 +CONFIG_UART3_PARITY=0 +CONFIG_UART3_2STOP=0 +# CONFIG_UART3_IFLOWCONTROL is not set +# CONFIG_UART3_OFLOWCONTROL is not set +# CONFIG_UART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_MTD is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=1 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=1 +CONFIG_EXAMPLES_BUTTONS_NAME0="SW0" +CONFIG_EXAMPLES_BUTTONS_NAME1="SW1" +CONFIG_EXAMPLES_BUTTONS_NAME2="Button 2" +CONFIG_EXAMPLES_BUTTONS_NAME3="Button 3" +CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=0 +CONFIG_I2CTOOL_MAXBUS=0 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=400000 +# CONFIG_SYSTEM_HEXED is not set +CONFIG_SYSTEM_RAMTEST=y +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/samv71-xult/nsh/setenv.sh b/configs/samv71-xult/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..8fda2eca92046f3759d15c199cb44af6dc4561ca --- /dev/null +++ b/configs/samv71-xult/nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/samv7-xult/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/samv71-xult/nxwm/Make.defs b/configs/samv71-xult/nxwm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..d4b883d507dd295a360dd4e2db5cd27ac33e71c6 --- /dev/null +++ b/configs/samv71-xult/nxwm/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/samv71-xult/nxwm/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_ARMV7M_DTCM),y) + LDSCRIPT = flash-dtcm.ld +else + LDSCRIPT = flash-sram.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/samv71-xult/nxwm/defconfig b/configs/samv71-xult/nxwm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..564779b651813680d2e67b3d62b4ee3b6b67cefb --- /dev/null +++ b/configs/samv71-xult/nxwm/defconfig @@ -0,0 +1,1378 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +CONFIG_ARCH_CHIP_SAMV7=y +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="samv7" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +CONFIG_ARMV7M_LAZYFPU=y +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_DPFPU=y +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +# CONFIG_ARMV7M_DCACHE_WRITETHROUGH is not set +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# SAMV7 Configuration Options +# +# CONFIG_ARCH_CHIP_SAME70Q19 is not set +# CONFIG_ARCH_CHIP_SAME70Q20 is not set +# CONFIG_ARCH_CHIP_SAME70Q21 is not set +# CONFIG_ARCH_CHIP_SAME70N19 is not set +# CONFIG_ARCH_CHIP_SAME70N20 is not set +# CONFIG_ARCH_CHIP_SAME70N21 is not set +# CONFIG_ARCH_CHIP_SAME70J19 is not set +# CONFIG_ARCH_CHIP_SAME70J20 is not set +# CONFIG_ARCH_CHIP_SAME70J21 is not set +# CONFIG_ARCH_CHIP_SAMV71Q19 is not set +# CONFIG_ARCH_CHIP_SAMV71Q20 is not set +CONFIG_ARCH_CHIP_SAMV71Q21=y +# CONFIG_ARCH_CHIP_SAMV71N19 is not set +# CONFIG_ARCH_CHIP_SAMV71N20 is not set +# CONFIG_ARCH_CHIP_SAMV71N21 is not set +# CONFIG_ARCH_CHIP_SAMV71J19 is not set +# CONFIG_ARCH_CHIP_SAMV71J20 is not set +# CONFIG_ARCH_CHIP_SAMV71J21 is not set +# CONFIG_ARCH_CHIP_SAME70 is not set +# CONFIG_ARCH_CHIP_SAME70Q is not set +# CONFIG_ARCH_CHIP_SAME70N is not set +# CONFIG_ARCH_CHIP_SAME70J is not set +CONFIG_ARCH_CHIP_SAMV71=y +CONFIG_ARCH_CHIP_SAMV71Q=y +# CONFIG_ARCH_CHIP_SAMV71N is not set +# CONFIG_ARCH_CHIP_SAMV71J is not set +# CONFIG_SAMV7_MCAN is not set +CONFIG_SAMV7_HAVE_MCAN1=y +CONFIG_SAMV7_HAVE_DAC1=y +CONFIG_SAMV7_HAVE_EBI=y +# CONFIG_SAMV7_EMAC is not set +CONFIG_SAMV7_HSMCI=y +CONFIG_SAMV7_HAVE_HSMCI0=y +# CONFIG_SAMV7_HAVE_ISI8 is not set +CONFIG_SAMV7_HAVE_MEDIALB=y +CONFIG_SAMV7_HAVE_SDRAMC=y +CONFIG_SAMV7_HAVE_SPI0=y +CONFIG_SAMV7_HAVE_SPI1=y +# CONFIG_SAMV7_QSPI_IS_SPI is not set +# CONFIG_SAMV7_SSC is not set +# CONFIG_SAMV7_HAVE_TC is not set +CONFIG_SAMV7_HAVE_TWIHS2=y +# CONFIG_SAMV7_HAVE_USBFS is not set +CONFIG_SAMV7_HAVE_USBHS=y +CONFIG_SAMV7_HAVE_USART0=y +CONFIG_SAMV7_HAVE_USART1=y +CONFIG_SAMV7_HAVE_USART2=y +# CONFIG_SAMV7_SPI is not set +# CONFIG_SAMV7_SPI_MASTER is not set +# CONFIG_SAMV7_SPI_SLAVE is not set + +# +# SAMV7 Peripheral Selection +# +# CONFIG_SAMV7_ACC is not set +# CONFIG_SAMV7_ADC is not set +# CONFIG_SAMV7_AFEC0 is not set +# CONFIG_SAMV7_AFEC1 is not set +# CONFIG_SAMV7_MCAN0 is not set +# CONFIG_SAMV7_MCAN1 is not set +# CONFIG_SAMV7_DAC0 is not set +# CONFIG_SAMV7_DAC1 is not set +# CONFIG_SAMV7_EBI is not set +# CONFIG_SAMV7_EMAC0 is not set +CONFIG_SAMV7_XDMAC=y +CONFIG_SAMV7_HSMCI0=y +# CONFIG_SAMV7_ISI is not set +# CONFIG_SAMV7_MLB is not set +# CONFIG_SAMV7_PWM0 is not set +# CONFIG_SAMV7_PWM1 is not set +# CONFIG_SAMV7_QSPI is not set +# CONFIG_SAMV7_RTC is not set +# CONFIG_SAMV7_RTT is not set +# CONFIG_SAMV7_SDRAMC is not set +CONFIG_SAMV7_SMC=y +# CONFIG_SAMV7_SPI0 is not set +# CONFIG_SAMV7_SPI1 is not set +# CONFIG_SAMV7_SSC0 is not set +# CONFIG_SAMV7_TC0 is not set +# CONFIG_SAMV7_TC1 is not set +# CONFIG_SAMV7_TC2 is not set +# CONFIG_SAMV7_TC3 is not set +# CONFIG_SAMV7_TRNG is not set +CONFIG_SAMV7_TWIHS0=y +# CONFIG_SAMV7_TWIHS1 is not set +# CONFIG_SAMV7_TWIHS2 is not set +# CONFIG_SAMV7_UART0 is not set +# CONFIG_SAMV7_UART1 is not set +# CONFIG_SAMV7_UART2 is not set +# CONFIG_SAMV7_UART3 is not set +# CONFIG_SAMV7_UART4 is not set +# CONFIG_SAMV7_USBDEVHS is not set +# CONFIG_SAMV7_USBHOSTHS is not set +CONFIG_SAMV7_USART0=y +# CONFIG_SAMV7_USART1 is not set +# CONFIG_SAMV7_USART2 is not set +# CONFIG_SAMV7_WDT is not set +# CONFIG_SAMV7_RSWDT is not set +CONFIG_SAMV7_GPIO_IRQ=y +CONFIG_SAMV7_GPIOA_IRQ=y +CONFIG_SAMV7_GPIOB_IRQ=y +# CONFIG_SAMV7_GPIOC_IRQ is not set +CONFIG_SAMV7_GPIOD_IRQ=y +# CONFIG_SAMV7_GPIOE_IRQ is not set +# CONFIG_SAMV7_PROGMEM is not set + +# +# TWIHS device driver options +# +CONFIG_SAMV7_TWIHS0_FREQUENCY=100000 + +# +# HSMCI device driver options +# +# CONFIG_SAMV7_HSMCI_RDPROOF is not set +# CONFIG_SAMV7_HSMCI_WRPROOF is not set +# CONFIG_SAMV7_HSMCI_UNALIGNED is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=51262 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20400000 +CONFIG_RAM_SIZE=393216 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SAMV71_XULT=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="samv71-xult" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_SAMV71XULT_MXTXPLND=y +CONFIG_SAMV71XULT_MXTXPLND_LCD=y +# CONFIG_SAMV71XULT_MXT_SWAPXY is not set +CONFIG_SAMV71XULT_MXT_I2CFREQUENCY=400000 +CONFIG_SAMV71XULT_MXT_DEVMINOR=0 +CONFIG_SAMV71XULT_LCD_BGCOLOR=0x95fa +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_TSCTEST=y +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=10 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxwm_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +CONFIG_SCHED_HAVE_PARENT=y +# CONFIG_SCHED_CHILD_STATUS is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCHLD=4 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=64 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1526 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +CONFIG_INPUT_MXT=y +CONFIG_MXT_THRESHX=5 +CONFIG_MXT_THRESHY=8 +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +CONFIG_LCD_NOGETRUN=y +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_MMCSD_SPI is not set +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_PREFLIGHT is not set +# CONFIG_SDIO_MUXBUS is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +CONFIG_MTD_CONFIG=y +# CONFIG_MTD_CONFIG_RAM_CONSOLIDATE is not set +CONFIG_MTD_CONFIG_ERASEDVALUE=0xff + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +CONFIG_MTD_AT24XX=y +# CONFIG_AT24XX_MULTI is not set +CONFIG_AT24XX_SIZE=2 +CONFIG_AT24XX_ADDR=0x57 +CONFIG_AT24XX_EXTENDED=y +CONFIG_AT24XX_EXTSIZE=160 +CONFIG_AT24XX_FREQUENCY=100000 +CONFIG_MTD_AT25=y +CONFIG_AT25_SPIMODE=0 +CONFIG_AT25_SPIFREQUENCY=20000000 +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +CONFIG_ARCH_HAVE_USART0=y +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART0_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART0 Configuration +# +CONFIG_USART0_RXBUFSIZE=256 +CONFIG_USART0_TXBUFSIZE=256 +CONFIG_USART0_BAUD=115200 +CONFIG_USART0_BITS=8 +CONFIG_USART0_PARITY=0 +CONFIG_USART0_2STOP=0 +# CONFIG_USART0_IFLOWCONTROL is not set +# CONFIG_USART0_OFLOWCONTROL is not set +# CONFIG_USART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x95fa +CONFIG_NX_WRITEONLY=y + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +# CONFIG_NX_XYINPUT_MOUSE is not set +CONFIG_NX_XYINPUT_TOUCHSCREEN=y +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +CONFIG_NXFONT_SANS22X29B=y +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +CONFIG_NXTERM=y + +# +# NxTerm Output Text/Graphics Options +# +CONFIG_NXTERM_BPP=16 +CONFIG_NXTERM_CURSORCHAR=137 +CONFIG_NXTERM_MXCHARS=396 +CONFIG_NXTERM_CACHESIZE=32 +CONFIG_NXTERM_LINESEPARATION=0 +# CONFIG_NXTERM_NOWRAP is not set + +# +# NxTerm Input options +# +CONFIG_NXTERM_NXKBDIN=y +CONFIG_NXTERM_KBDBUFSIZE=16 +CONFIG_NXTERM_NPOLLWAITERS=4 + +# +# NX Multi-user only options +# +CONFIG_NX_MULTIUSER=y +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXSERVERMSGS=32 +CONFIG_NX_MXCLIENTMSGS=16 +# CONFIG_NX_NXSTART is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# +CONFIG_NXWIDGETS=y + +# +# NX Server/Device Configuration +# +CONFIG_NXWIDGETS_FLICKERFREE=y +# CONFIG_NXWIDGETS_EXTERNINIT is not set +CONFIG_NXWIDGETS_DEVNO=0 +CONFIG_NXWIDGET_SERVERINIT=y +CONFIG_NXWIDGETS_SERVERPRIO=110 +CONFIG_NXWIDGETS_SERVERSTACK=2048 +CONFIG_NXWIDGETS_CLIENTPRIO=100 +CONFIG_NXWIDGETS_LISTENERPRIO=100 +CONFIG_NXWIDGETS_LISTENERSTACK=2048 +# CONFIG_NXWIDGET_EVENTWAIT is not set + +# +# NXWidget Configuration +# +CONFIG_NXWIDGETS_BPP=16 +CONFIG_NXWIDGETS_SIZEOFCHAR=1 + +# +# NXWidget Default Values +# +# CONFIG_NXWIDGETS_SYSTEM_CUSTOM_FONTID is not set +CONFIG_NXWIDGETS_TNXARRAY_INITIALSIZE=16 +CONFIG_NXWIDGETS_TNXARRAY_SIZEINCREMENT=8 +# CONFIG_NXWIDGETS_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_TEXTCOLORS is not set +CONFIG_NXWIDGETS_TRANSPARENT_COLOR=0x0 + +# +# Keypad behavior +# +CONFIG_NXWIDGETS_FIRST_REPEAT_TIME=500 +CONFIG_NXWIDGETS_CONTINUE_REPEAT_TIME=200 +CONFIG_NXWIDGETS_DOUBLECLICK_TIME=350 +CONFIG_NXWIDGETS_KBDBUFFER_SIZE=16 +CONFIG_NXWIDGETS_CURSORCONTROL_SIZE=4 +# CONFIG_NXWIDGET_MEMMONITOR is not set +CONFIG_NXWM=y + +# +# NxWM General Settings +# +# CONFIG_NXWM_LARGE_ICONS is not set +CONFIG_NXWM_CUSTOM_FONTID=y +CONFIG_NXWM_DEFAULT_FONTID=5 +CONFIG_NXWM_UNITTEST=y + +# +# Color configuration +# +# CONFIG_NXWM_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWM_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWM_CUSTOM_TEXTCOLORS is not set + +# +# Background Image +# +# CONFIG_NXWM_DISABLE_BACKGROUND_IMAGE is not set +CONFIG_NXWM_BACKGROUND_IMAGE="NXWidgets::g_nuttxBitmap160x160" + +# +# NxWM Taskbar Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_TASKBAR_VSPACING=4 +CONFIG_NXWM_TASKBAR_HSPACING=4 +# CONFIG_NXWM_TASKBAR_TOP is not set +# CONFIG_NXWM_TASKBAR_BOTTOM is not set +CONFIG_NXWM_TASKBAR_LEFT=y +# CONFIG_NXWM_TASKBAR_RIGHT is not set +# CONFIG_NXWM_CUSTOM_TASKBAR_WIDTH is not set +# CONFIG_NXWM_TASKBAR_ICONSCALE is not set +# CONFIG_NXWM_DISABLE_MINIMIZE is not set +# CONFIG_NXWM_TASKBAR_NO_BORDER is not set + +# +# NxWM Toolbar Configuration +# +# CONFIG_NXWM_CUSTOM_TOOLBAR_HEIGHT is not set +CONFIG_NXWM_TOOLBAR_CUSTOM_FONTID=y +CONFIG_NXWM_TOOLBAR_FONTID=5 + +# +# NxWM Application Window Configuration +# +# CONFIG_NXWM_CUSTOM_APPWINDOW_ICONS is not set + +# +# NxWM Start Window Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_STARTWINDOW_VSPACING=4 +CONFIG_NXWM_STARTWINDOW_HSPACING=4 +# CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set +CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm" +CONFIG_NXWM_STARTWINDOW_MXMSGS=32 +CONFIG_NXWM_STARTWINDOW_MXMPRIO=42 +CONFIG_NXWM_STARTWINDOW_PRIO=100 +CONFIG_NXWM_STARTWINDOW_STACKSIZE=2048 + +# +# NxTerm Window Settings +# +CONFIG_NXWM_NXTERM=y +CONFIG_NXWM_NXTERM_PRIO=100 +CONFIG_NXWM_NXTERM_STACKSIZE=2048 +# CONFIG_NXWM_NXTERM_CUSTOM_COLORS is not set +# CONFIG_NXWM_NXTERM_CUSTOM_FONTID is not set +# CONFIG_NXWM_CUSTOM_NXTERM_ICON is not set + +# +# NxWM Touchscreen Configuration +# +CONFIG_NXWM_TOUCHSCREEN=y + +# +# Touchscreen Device Settings +# +CONFIG_NXWM_TOUCHSCREEN_DEVINIT=y +CONFIG_NXWM_TOUCHSCREEN_DEVNO=0 +CONFIG_NXWM_TOUCHSCREEN_DEVPATH="/dev/input0" +CONFIG_NXWM_TOUCHSCREEN_SIGNO=5 +CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=120 +CONFIG_NXWM_TOUCHSCREEN_LISTENERSTACK=1536 + +# +# NxWM Keyboard Configuration +# +CONFIG_NXWM_KEYBOARD=y + +# +# Keyboard Device Settings +# +CONFIG_NXWM_KEYBOARD_DEVPATH="/dev/console" +# CONFIG_NXWM_KEYBOARD_USBHOST is not set +CONFIG_NXWM_KEYBOARD_SIGNO=6 +CONFIG_NXWM_KEYBOARD_BUFSIZE=16 +CONFIG_NXWM_KEYBOARD_LISTENERPRIO=120 +CONFIG_NXWM_KEYBOARD_LISTENERSTACK=2048 + +# +# NxWM Calibration Display Settings +# +CONFIG_NXWM_CALIBRATION_MARGIN=40 +# CONFIG_NXWM_CALIBRATION_CUSTOM_COLORS is not set +CONFIG_NXWM_CALIBRATION_MESSAGES=y +CONFIG_NXWM_CALIBRATION_CUSTOM_FONTID=y +CONFIG_NXWM_CALIBRATION_FONTID=5 +CONFIG_NXWM_CALIBRATION_AVERAGE=y +CONFIG_NXWM_CALIBRATION_NSAMPLES=2 +# CONFIG_NXWM_CALIBRATION_DISCARD_MINMAX is not set +# CONFIG_NXWM_CALIBRATION_ANISOTROPIC is not set +# CONFIG_NXWM_CUSTOM_CALIBRATION_ICON is not set +CONFIG_NXWM_CALIBRATION_SIGNO=5 +CONFIG_NXWM_CALIBRATION_LISTENERPRIO=100 +CONFIG_NXWM_CALIBRATION_LISTENERSTACK=2048 + +# +# NxWM Hex Calculator Display Settings +# +# CONFIG_NXWM_HEXCALCULATOR_CUSTOM_COLORS is not set +# CONFIG_NXWM_CUSTOM_HEXCALCULATOR_ICON is not set +CONFIG_NXWM_HEXCALCULATOR_CUSTOM_FONTID=y +CONFIG_NXWM_HEXCALCULATOR_FONTID=5 + +# +# NxWM Media Player Display Settings +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=0 +CONFIG_I2CTOOL_MAXBUS=0 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=400000 +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/samv71-xult/nxwm/setenv.sh b/configs/samv71-xult/nxwm/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..f260a338baba5cf94c22dcc8482787894c941ec0 --- /dev/null +++ b/configs/samv71-xult/nxwm/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/samv7-xult/nxwm/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/samv71-xult/scripts/flash-dtcm.ld b/configs/samv71-xult/scripts/flash-dtcm.ld new file mode 100644 index 0000000000000000000000000000000000000000..a999cbfa572185bde25f94e564038facec9e48fe --- /dev/null +++ b/configs/samv71-xult/scripts/flash-dtcm.ld @@ -0,0 +1,122 @@ +/**************************************************************************** + * configs/samv71-xult/scripts/flash-dtcm.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMV71Q21 has 2048Kb of FLASH beginning at address 0x0040:0000 and + * 384Kb of SRAM beginining at 0x2040:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0400:0000 address range (Assuming that ITCM is not enable). + * + * NOTE: that the DTCM address of 0x2000:0000 is used for SRAM. If DTCM is + * disabled, then the accesses will actually occur on the AHB bus. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00400000, LENGTH = 2048K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 384K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/samv71-xult/scripts/flash-sram.ld b/configs/samv71-xult/scripts/flash-sram.ld new file mode 100644 index 0000000000000000000000000000000000000000..a89924ced9fc5650c023d32a995ec02341ec92f1 --- /dev/null +++ b/configs/samv71-xult/scripts/flash-sram.ld @@ -0,0 +1,119 @@ +/**************************************************************************** + * configs/samv71-xult/scripts/flash-sram.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMV71Q21 has 2048Kb of FLASH beginning at address 0x0040:0000 and + * 384Kb of SRAM beginining at 0x2040:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0400:0000 address range (Assuming that ITCM is not enable). + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00400000, LENGTH = 2048K + sram (rwx) : ORIGIN = 0x20400000, LENGTH = 384K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/samv71-xult/scripts/gnu-elf.ld b/configs/samv71-xult/scripts/gnu-elf.ld new file mode 100644 index 0000000000000000000000000000000000000000..4694123c8c1f53a80de19cb46d1c09d0b5b55c0f --- /dev/null +++ b/configs/samv71-xult/scripts/gnu-elf.ld @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/samv71-xult/scripts/gnu-elf.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +SECTIONS +{ + .text 0x00000000 : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + *(.ctors) /* Old ABI: Unallocated */ + *(.init_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .dtors : + { + _sdtors = . ; + *(.dtors) /* Old ABI: Unallocated */ + *(.fini_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = . ; + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/samv71-xult/scripts/kernel-space.ld b/configs/samv71-xult/scripts/kernel-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..b24c585a68ae7c91ba0cbd0a5cc1290669e3e96f --- /dev/null +++ b/configs/samv71-xult/scripts/kernel-space.ld @@ -0,0 +1,111 @@ +/**************************************************************************** + * configs/samv71-xult/scripts/kernel-space.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > kflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > kflash + + .ARM.extab : { + *(.ARM.extab*) + } > kflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > kflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > ksram AT > kflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > ksram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/samv71-xult/scripts/memory.ld b/configs/samv71-xult/scripts/memory.ld new file mode 100644 index 0000000000000000000000000000000000000000..ba736a8ebfe9ed0a8b360c6ad0d29a2bf8c99c90 --- /dev/null +++ b/configs/samv71-xult/scripts/memory.ld @@ -0,0 +1,84 @@ +/**************************************************************************** + * configs/samv71-xult/scripts/memory.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAMV71Q21 has 2048Kb of FLASH beginning at address 0x0040:0000 and + * 384Kb of SRAM beginining at 0x2040:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0400:0000 address range. + * + * NOTE: that the DTCM address of 0x2000:0000 is used for SRAM. If DTCM is + * disabled, then the accesses will actually occur on the AHB bus. + * + * The user space partition will be spanned with a single region of size + * 2**n bytes. The alignment of the user-space region must be the same. + * As a consequence, as the user-space increases in size, the alignment + * requirement also increases. The sizes below give the largest possible + * user address spaces (but leave far too much for the OS). + * + * The solution to this wasted memory is to (1) use more than one region to + * span the user spaces, or (2) poke holes in a larger region to trim it + * to fit better. + * + * A detailed memory map for the 384KB SRAM region is as follows: + * + * 0x20000 0000: Kernel .data region. Typical size: 0.1KB + * ------- ---- Kernel .bss region. Typical size: 1.8KB + * 0x20000 0800: Kernel IDLE thread stack (approximate). Size is + * determined by CONFIG_IDLETHREAD_STACKSIZE and + * adjustments for alignment. Typical is 1KB. + * ------- ---- Padded to 4KB + * 0x20002 0000: User .data region. Size is variable. + * ------- ---- User .bss region Size is variable. + * 0x20000 2000: Beginning of kernel heap. Size determined by + * CONFIG_MM_KERNEL_HEAPSIZE. + * ------- ---- Beginning of user heap. Can vary with other settings. + * 0x20004 0000: End+1 of mappable internal SRAM + */ + +MEMORY +{ + /* 2048KiB of internal FLASH */ + + kflash (rx) : ORIGIN = 0x00400000, LENGTH = 1M + uflash (rx) : ORIGIN = 0x00500000, LENGTH = 1M + + /* 384Kb of internal SRAM */ + + ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K + usram (rwx) : ORIGIN = 0x20020000, LENGTH = 128K + xsram (rwx) : ORIGIN = 0x20040000, LENGTH = 128K +} diff --git a/configs/samv71-xult/scripts/user-space.ld b/configs/samv71-xult/scripts/user-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..3389e1e743bd7a3f193fe053c3582478f65b04db --- /dev/null +++ b/configs/samv71-xult/scripts/user-space.ld @@ -0,0 +1,126 @@ +/**************************************************************************** + * configs/samv71-xult/scripts/user-space.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +/* Make sure that the critical memory management functions are in user-space. + * the user heap memory manager will reside in user-space but be usable both + * by kernel- and user-space code + */ + +EXTERN(umm_initialize) +EXTERN(umm_addregion) +EXTERN(umm_trysemaphore) +EXTERN(umm_givesemaphore) + +EXTERN(malloc) +EXTERN(realloc) +EXTERN(zalloc) +EXTERN(free) + +OUTPUT_ARCH(arm) +SECTIONS +{ + .userspace : { + *(.userspace) + } > uflash + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > uflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > uflash + + .ARM.extab : { + *(.ARM.extab*) + } > uflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > uflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > usram AT > uflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > usram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/samv71-xult/src/Makefile b/configs/samv71-xult/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..790601ecda9a070d03df2530f18b02eb061b1a0e --- /dev/null +++ b/configs/samv71-xult/src/Makefile @@ -0,0 +1,118 @@ +############################################################################ +# configs/samv71-xult/src/Makefile +# +# Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = sam_boot.c + +ifeq ($(CONFIG_SAMV7_SDRAMC),y) +CSRCS += sam_sdram.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += sam_appinit.c sam_bringup.c +else ifeq ($(CONFIG_BOARD_INITIALIZE),y) +CSRCS += sam_bringup.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += sam_autoleds.c +else +CSRCS += sam_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += sam_buttons.c +endif + +ifeq ($(CONFIG_SAMV7_HSMCI0),y) +CSRCS += sam_hsmci.c +endif + +ifeq ($(CONFIG_SAMV7_EMAC),y) +CSRCS += sam_ethernet.c +endif + +ifeq ($(CONFIG_SAMV7_USBDEVHS),y) +CSRCS += sam_usbdev.c +endif + +ifeq ($(CONFIG_SAMV7_SPI),y) +CSRCS += sam_spi.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += sam_usbmsc.c +endif + +ifeq ($(CONFIG_USBDEV_COMPOSITE),y) +CSRCS += sam_composite.c +endif + +ifeq ($(CONFIG_SAMV7_MCAN),y) +CSRCS += sam_mcan.c +endif + +ifeq ($(CONFIG_AUDIO_WM8904),y) +ifeq ($(CONFIG_SAMV7_TWIHS0),y) +ifeq ($(CONFIG_SAMV7_SSC0),y) +CSRCS += sam_wm8904.c +endif +endif +endif + +ifeq ($(CONFIG_AUDIO_NULL),y) +CSRCS += sam_audio_null.c +endif + +ifeq ($(CONFIG_MTD_CONFIG),y) +ifeq ($(CONFIG_SAMV7_TWIHS0),y) +ifeq ($(CONFIG_MTD_AT24XX),y) +CSRCS += sam_at24config.c +endif +endif +endif + +ifeq ($(CONFIG_SAMV71XULT_MXTXPLND),y) +ifeq ($(CONFIG_LCD),y) +CSRCS += sam_ili9488.c +endif +ifeq ($(CONFIG_INPUT_MXT),y) +CSRCS += sam_maxtouch.c sam_atmxtconfig.c +endif +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/samv71-xult/src/atmxt-xpro.h b/configs/samv71-xult/src/atmxt-xpro.h new file mode 100644 index 0000000000000000000000000000000000000000..5e2e65b7e51bf5082385a622f49e3576e0038d16 --- /dev/null +++ b/configs/samv71-xult/src/atmxt-xpro.h @@ -0,0 +1,377 @@ +/************************************************************************************ + * configs/samv71-xult/src/atmxt-xpro.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_ATMXT_XPRO_SRC_ATMXT_XPRO_H +#define __CONFIGS_ATMXT_XPRO_SRC_ATMXT_XPRO_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#define HAVE_MAXTOUCH 1 +#define HAVE_ILI9488_SMC 1 +#undef HAVE_ILI9488_SPI /* Not yet suppported */ + +/* maXTouch and LCD only available if the maXTouch Xplained Pro is connected */ + +#ifndef CONFIG_SAMV71XULT_MXTXPLND +# undef HAVE_MAXTOUCH +# undef HAVE_ILI9488_SMC +# undef HAVE_ILI9488_SPI +#endif + +/* maXTouch is only available if the maXTouch driver is enabled */ + +#if defined(HAVE_MAXTOUCH) && !defined(CONFIG_INPUT_MXT) +# warning maXTouch support not enabled (CONFIG_INPUT_MXT) +# undef HAVE_MAXTOUCH +#endif + +/* The maXTouch interface requires TWIHS0 */ + +#if defined(HAVE_MAXTOUCH) && !defined(CONFIG_SAMV7_TWIHS0) +# warning maXTouch support requires TWIHS0 +# undef HAVE_MAXTOUCH +#endif + +/* Verify the maXTouch connector configuration */ + +#ifdef HAVE_MAXTOUCH +/* maXTouch Explained Pro connect on EXT1 */ + +# if defined(CONFIG_SAMV71XULT_MXTXPLND_EXT1) +# ifndef CONFIG_SAMV7_GPIOD_IRQ +# warning maXTouch on EXT1 requires CONFIG_SAMV7_GPIOD_IRQ +# undef HAVE_MAXTOUCH +# endif + +/* maXTouch Explained Pro connect on EXT2 */ + +# elif defined(CONFIG_SAMV71XULT_MXTXPLND_EXT2) +# ifndef CONFIG_SAMV7_GPIOA_IRQ +# warning maXTouch on EXT2 requires CONFIG_SAMV7_GPIOA_IRQ +# undef HAVE_MAXTOUCH +# endif + +/* maXTouch Explained Pro connect on LCD (EXT4) */ + +# elif defined(CONFIG_SAMV71XULT_MXTXPLND_LCD) +# ifndef CONFIG_SAMV7_GPIOD_IRQ +# warning maXTouch on EXT4 requires CONFIG_SAMV7_GPIOD_IRQ +# undef HAVE_MAXTOUCH +# endif + +# else +# warning maXTouch requires CONFIG_SAMV71XULT_MXTXPLND_EXT1 or EXT2 +# undef HAVE_MAXTOUCH +# endif +#endif + +/* ILI9488 LCD */ + +#ifdef HAVE_ILI9488_SMC +/* ILI9488 parallel mode requires use of LCD connector and SMC and DMA support */ + +# ifndef CONFIG_SAMV71XULT_MXTXPLND_LCD +# warning The ILI8488 LCD must be connected on LCD EXT4 (CONFIG_SAMV71XULT_MXTXPLND_LCD) +# undef HAVE_ILI9488_SMC +# endif + +/* ILI9488 parallel mode requires SMC/EBI and XDMAC support */ + +# ifndef CONFIG_SAMV7_SMC +# warning The ILI8488 LCD requires SMC support (CONFIG_SAMV7_SMC) +# undef HAVE_ILI9488_SMC +# endif + +# ifndef CONFIG_SAMV7_XDMAC +# warning The ILI8488 LCD requires DMA support (CONFIG_SAMV7_XDMAC) +# undef HAVE_ILI9488_SMC +# endif +#endif + +#ifdef HAVE_ILI9488_SPI +/* ILI9488 serial mode requires use of EXT1 or EXT2 connector */ + +# if !defined(CONFIG_SAMV71XULT_MXTXPLND_EXT1) && !defined(CONFIG_SAMV71XULT_MXTXPLND_EXT2) +# warning serial ILI9488 must be connected or EXT1 or EXT2 (CONFIG_SAMV71XULT_MXTXPLND_EXT1/2) +# undef HAVE_ILI9488_SPI +# endif + +/* ILI9488 serial mode requires SPI0 */ + +# ifndef CONFIG_SAMV7_SPI0 +# warning Serial ILI9488 requires SPI0 support +# undef HAVE_ILI9488_SPI +# endif +#endif + +/* SAMV71-XULT GPIO Pin Definitions *************************************************/ + +/* maXTouch Xplained Pro LCD + * + * maXTouch Xplained Pro Standard Extension Header + * ----------------------------------------------- + * This LCD could be connected either via EXT1 or EXT2 using the 2x10 + * 20-pin cable and the maXTouch Xplained Pro standard extension + * header. Access is then performed in SPI mode. + * + * ---- -------- ---- ----------- ---- ----------- ---------------------------------- + * SAMV71-XULT maxTouch Xplained Pro + * PIN FUNCTION EXT1 FUNC EXT2 FUNC Description + * ---- -------- ---- ----------- ---- ----------- ---------------------------------- + * 1 ID - - - - Communication line to ID chip + * 2 GND - - - - Ground + * 3 N/C PC31 - PD30 - + * 4 N/C PA19 - PC13 - + * 5 GPIO PB3 GPIO PA6 GPIO Command/Data Select + * 6 N/C PB2 - PD11 - + * 7 PWM PA0 PWMC0_PWMH0 PC19 PWMC0_PMWH2 Backlight control + * 8 N/C PC30 - PD26 - + * 9 GPIO/IRQ PD28 GPIO PA2 GPIO IRQ from maXTouch controller + * 10 GPIO PA5 GPIO PA24 GPIO RESET signal for maXTouch and LCD controller + * 11 I2C SDA PA3 TWID0 PA3 TWID0 I2C Data line for maXTouch controller + * 12 I2C SCL PA4 TWICK0 PA4 TWICK0 I2C Clock line for maXTouch controller + * 13 N/C PB0 - PA21 - + * 14 N/C PB1 - PB4 - + * 15 CS PD25 GPIO PD27 GPIO CS line for LCD controller + * 16 SPI MOSI PD21 SPI0_MOSI PD21 SPI0_MOSI SPI Data to LCD controller + * 17 SPI MISO PD20 SPI0_MISO PD20 SPI0_MISO SPI Data from LCD controller + * 18 SPI SCK PD22 SPI0_SPCK PD22 SPI0_SPCK SPI Clock line + * 19 GND - - - - Ground + * 20 VCC - - - - Target supply voltage + * ---- -------- ---- ----------- ---- ----------- ---------------------------------- + */ + +#ifdef CONFIG_SAMV71XULT_MXTXPLND +# if defined(CONFIG_SAMV71XULT_MXTXPLND_EXT1) +# define GPIO_ILI9488_RST (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOA | GPIO_PIN5) +# define GPIO_ILI9488_BLOFF (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOA | GPIO_PIN0) + +/* maXTouch definitions when connected via EXT1 */ + +# ifdef HAVE_MAXTOUCH +# define GPIO_MXT_CHG (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_FALLING | GPIO_PORT_PIOD | GPIO_PIN28) +# define IRQ_MXT_CHG SAM_IRQ_PD28 +# endif /* HAVE_MAXTOUCH */ + +/* ILI9488 serial mode definitions when connected via EXT1 */ + +# ifdef HAVE_ILI9488_SPI +# define GPIO_ILI9488_CDS (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOB | GPIO_PIN3) +# define GPIO_ILI9488_CS (PIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOD | GPIO_PIN25) +# define ILI9488_PORT SPI0_CS1 +# endif /* HAVE_ILI9488_SPI */ + +# elif defined(CONFIG_SAMV71XULT_MXTXPLND_EXT2) +/* General definitions when connected via EXT2 */ + +# define GPIO_ILI9488_RST (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOA | GPIO_PIN24) +# define GPIO_ILI9488_BLOFF (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOC | GPIO_PIN19) + +/* maXTouch definitions when connected via EXT2 */ + +# ifdef HAVE_MAXTOUCH +# define GPIO_MXT_CHG (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_FALLING | GPIO_PORT_PIOA | GPIO_PIN2) +# define IRQ_MXT_CHG SAM_IRQ_PA2 +# endif /* HAVE_MAXTOUCH */ + +/* ILI9488 serial mode definitions when connected via EXT2 */ + +# ifdef HAVE_ILI9488_SPI +# define GPIO_ILI9488_CDS (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOA | GPIO_PIN6) +# define GPIO_ILI9488_CS (PIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOD | GPIO_PIN27) +# define MXTXLPND_PORT SPI0_CS3 +# endif /* HAVE_ILI9488_SPI */ + +/* maXTouch Xplained Pro Xplained Pro LCD Connector *********************************/ +/* + * Only the parallel mode is supported by this BSP (via SMC/EBI). The switch mode + * selector on the back of the maXtouch should be set in the OFF-ON-OFF positions + * to select 16-bit color mode. + * + * ----------------- ------------- -------------------------------------------------- + * LCD SAMV71 Description + * Pin Function Pin Function + * ---- ------------ ---- -------- -------------------------------------------------- + * 1 ID - - Chip ID communication line + * 2 GND - GND Ground + * 3 D0 PC0 D0 Data line + * 4 D1 PC1 D1 Data line + * 5 D2 PC2 D2 Data line + * 6 D3 PC3 D3 Data line + * 7 GND - GND Ground + * 8 D4 PC4 D4 Data line + * 9 D5 PC5 D5 Data line + * 10 D6 PC6 D6 Data line + * 11 D7 PC7 D7 Data line + * 12 GND - GND Ground + * 13 D8 PE0 D8 Data line + * 14 D9 PE1 D9 Data line + * 15 D10 PE2 D10 Data line + * 16 D11 PE3 D11 Data line + * 17 GND - GND Ground + * 18 D12 PE4 D12 Data line + * 19 D13 PE5 D13 Data line + * 20 D14 PA15 D14 Data line + * 21 D15 PA16 D15 Data line + * 22 GND - GND Ground + * 23 D16 - - Data line + * 24 D17 - - Data line + * 25 N/C - - + * 26 N/C - - + * 27 GND - GND Ground + * 28 N/C - - + * 29 N/C - - + * 30 N/C - - + * 31 N/C - - + * 32 GND - GND Ground + * 33 PCLK/ PC30 GPIO SMC: Pixel clock Display RAM select. + * CMD_DATA_SEL SPI: One address line of the MCU for displays where it + * is possible to select either the register or the + * data interface + * 34 VSYNC/CS PD19 NCS3 SMC: Vertical synchronization. + * SPI: Chip select + * 35 HSYNC/WE PC8 NWE SMC: Horizontal synchronization + * SPI: Write enable signal + * 36 DATA ENABLE/ PC11 NRD SMC: Data enable signal + * RE SPI: Read enable signal + * 37 SPI SCK - - SPI: Clock for SPI + * 38 SPI MOSI - - SPI: Master out slave in line of SPI + * 39 SPI MISO - - SPI: Master in slave out line of SPI + * 40 SPI SS - - SPI: Slave select for SPI + * 41 N/C - - + * 42 TWI SDA PA3 TWD0 I2C data line (maXTouch®) + * 43 TWI SCL PA4 TWCK0 I2C clock line (maXTouch) + * 44 IRQ1 PD28 WKUP5 maXTouch interrupt line + * 45 N/C PA2 WKUP2 + * 46 PWM PC9 TIOB7 Backlight control + * 47 RESET PC13 GPIO Reset for both display and maxTouch + * 48 VCC - - 3.3V power supply for extension board + * 49 VCC - - 3.3V power supply for extension board + * 50 GND - - Ground + * ---- ------------ ---- -------- -------------------------------------------------- + */ + +# elif defined(CONFIG_SAMV71XULT_MXTXPLND_LCD) +/* General definitions when connected via LCD (EXT4) */ + +# define GPIO_ILI9488_RST (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN13) +# define GPIO_ILI9488_BLOFF (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOC | GPIO_PIN9) + +/* maXTouch definitions when connected via LCD (EXT4) */ + +# ifdef HAVE_MAXTOUCH +# define GPIO_MXT_CHG (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_FALLING | GPIO_PORT_PIOD | GPIO_PIN28) +# define IRQ_MXT_CHG SAM_IRQ_PD28 +# endif /* HAVE_MAXTOUCH */ + +/* ILI9488 parallel mode definitions when connected via LCD (EXT4) */ + +# define GPIO_ILI9488_CDS (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN30) + +# if 1 /* Until PWM support is available */ +# define GPIO_ILI9488_BKL (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOC | GPIO_PIN9) +# else +# define GPIO_ILI9488_BKL GPIO_TC7_TIOB +# endif +# endif /* CONFIG_SAMV71XULT_MXTXLND_xyz */ + +/* In all configurations, the touchscreen communicates on TWI0, I2C address 0x4a */ + +# ifdef HAVE_MAXTOUCH + +# define MXT_TWI_BUS 0 +# define MXT_I2C_ADDRESS 0x4a + +# endif /* HAVE_MAXTOUCH */ +#endif /* CONFIG_SAMV71XULT_MXTXPLND */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +struct atmxt_config_s +{ + uint16_t addr; + uint8_t id; + uint8_t nbytes; + FAR const uint8_t *bytes; +}; + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#ifdef HAVE_MAXTOUCH +/* List of configuration settings. Terminated with an entry with nbytes == 0 and + * bytes == NULL; + */ + +extern const struct atmxt_config_s g_atmxt_config[]; +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_ATMXT_XPRO_SRC_ATMXT_XPRO_H */ diff --git a/configs/samv71-xult/src/sam_appinit.c b/configs/samv71-xult/src/sam_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..451c97600d977fdac977db940d8f1dc9d53468d5 --- /dev/null +++ b/configs/samv71-xult/src/sam_appinit.c @@ -0,0 +1,73 @@ +/**************************************************************************** + * config/samv71-xult/src/sam_appinit.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "samv71-xult.h" + +#if defined(CONFIG_LIB_BOARDCTL) && !defined(CONFIG_BUILD_KERNEL) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifndef CONFIG_BOARD_INITIALIZE + /* Perform board initialization */ + + return sam_bringup(); +#else + return OK; +#endif +} + +#endif /* CONFIG_LIB_BOARDCTL && !CONFIG_BUILD_KERNEL */ diff --git a/configs/samv71-xult/src/sam_at24config.c b/configs/samv71-xult/src/sam_at24config.c new file mode 100644 index 0000000000000000000000000000000000000000..7191454e47288bcd0e3844d09f1f7538960f9624 --- /dev/null +++ b/configs/samv71-xult/src/sam_at24config.c @@ -0,0 +1,112 @@ +/************************************************************************************ + * configs/samv71-xult/src/sam_at24config.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "sam_twihs.h" +#include "samv71-xult.h" + +#ifdef HAVE_MTDCONFIG + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_at24config + * + * Description: + * Create an AT24xx-based MTD configuration device for storage device configuration + * information. + * + ************************************************************************************/ + +int sam_at24config(void) +{ + struct i2c_master_s *i2c; + struct mtd_dev_s *at24; + int ret; + + /* Get an instance of the TWI0 interface */ + + i2c = sam_i2cbus_initialize(0); + if (!i2c) + { + fdbg("ERROR: Failed to initialize TWI0\n"); + return -ENODEV; + } + + /* Initialize the AT24 driver */ + + at24 = at24c_initialize(i2c); + if (!at24) + { + fdbg("ERROR: Failed to initialize the AT24 driver\n"); + (void)sam_i2cbus_uninitialize(i2c); + return -ENODEV; + } + + /* Make sure that the AT24 is in normal memory access mode */ + + ret = at24->ioctl(at24, MTDIOC_EXTENDED, 0); + if (ret < 0) + { + fdbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret); + } + + /* Bind the instance of an MTD device to the /dev/config device. */ + + ret = mtdconfig_register(at24); + if (ret < 0) + { + fdbg("ERROR: Failed to bind AT24 driver to the MTD config device\n"); + (void)sam_i2cbus_uninitialize(i2c); + } + + return ret; +} + +#endif /* HAVE_MTDCONFIG */ diff --git a/configs/samv71-xult/src/sam_atmxtconfig.c b/configs/samv71-xult/src/sam_atmxtconfig.c new file mode 100644 index 0000000000000000000000000000000000000000..f0a1eaa9656e8773dacbe82890e5a69ac441da2b --- /dev/null +++ b/configs/samv71-xult/src/sam_atmxtconfig.c @@ -0,0 +1,256 @@ +/************************************************************************************ + * configs/samv71-xult/src/sam_atmxtconfig.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include "atmxt-xpro.h" + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifdef HAVE_MAXTOUCH +/* Configuration arrays referenced in g_atmxt_config[] */ + +static const uint8_t g_id26[0x08] = +{ + 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; + +static const uint8_t g_id07[0x04] = +{ + 0x20, 0x10, 0x4b, 0x82 +}; + +static const uint8_t g_id08[0x0a] = +{ + 0x0f, 0x00, 0x05, 0x0a, 0x4b, 0x00, 0x00, 0x00, + 0x32, 0x19 +}; + +static const uint8_t g_id09[0x24] = +{ + 0x8b, 0x00, 0x00, 0x0e, 0x08, 0x00, 0x80, 0x32, + 0x05, 0x02, 0x0a, 0x03, 0x03, 0x20, 0x04, 0x0f, + 0x0f, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x20, 0x30, + 0x64, 0x54, 0x9e, 0x30, 0xd4, 0x50, 0x00, 0x0a, + 0x00, 0x00, 0x02, 0x02 +}; + +static const uint8_t g_id0f[0x0b] = +{ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00 +}; + +static const uint8_t g_id12[0x02] = +{ + 0x00, 0x00 +}; + +static const uint8_t g_id19[0x0f] = +{ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x0a, 0x00, 0x00, 0x00, 0x00 +}; + +static const uint8_t g_id28[0x05] = +{ + 0x00, 0x00, 0x00, 0x00, 0x00 +}; + +static const uint8_t g_id2a[0x0a] = +{ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00 +}; + +static const uint8_t g_id2e[0x09] = +{ + 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x03, 0x00, + 0x00 +}; + +static const uint8_t g_id37[0x06] = +{ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; + +static const uint8_t g_id38[0x21] = +{ + 0x02, 0x00, 0x01, 0x18, 0x1e, 0x1e, 0x1e, 0x1e, + 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, + 0x1e, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00 +}; + +static const uint8_t g_id3e[0x36] = +{ + 0x01, 0x01, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x05, 0x0a, 0x0f, 0x16, 0x23, 0x05, 0x00, + 0x0a, 0x05, 0x05, 0x80, 0x19, 0x19, 0x34, 0x0c, + 0x64, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; + +static const uint8_t g_id41[0x14] = +{ + 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 +}; + +static const uint8_t g_id42[0x03] = +{ + 0x02, 0x14, 0x0f +}; + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/* List of configuration settings. Terminated with an entry with nbytes == 0 and + * bytes == NULL; + */ + +const struct atmxt_config_s g_atmxt_config[] = +{ + { + .addr = 0x0110, + .id = 0x26, + .nbytes = 0x08, + .bytes = g_id26 + }, + { + .addr = 0x0118, + .id = 0x07, + .nbytes = 0x04, + .bytes = g_id07 + }, + { + .addr = 0x011c, + .id = 0x08, + .nbytes = 0x0a, + .bytes = g_id08 + }, + { + .addr = 0x0126, + .id = 0x09, + .nbytes = 0x24, + .bytes = g_id09 + }, + { + .addr = 0x014a, + .id = 0x0f, + .nbytes = 0x0b, + .bytes = g_id0f + }, + { + .addr = 0x0155, + .id = 0x12, + .nbytes = 0x02, + .bytes = g_id12 + }, + { + .addr = 0x0157, + .id = 0x19, + .nbytes = 0x0f, + .bytes = g_id19 + }, + { + .addr = 0x0166, + .id = 0x28, + .nbytes = 0x05, + .bytes = g_id28 + }, + { + .addr = 0x016b, + .id = 0x2a, + .nbytes = 0x0a, + .bytes = g_id2a + }, + { + .addr = 0x0175, + .id = 0x2e, + .nbytes = 0x09, + .bytes = g_id2e + }, + { + .addr = 0x017e, + .id = 0x37, + .nbytes = 0x06, + .bytes = g_id37 + }, + { + .addr = 0x0184, + .id = 0x38, + .nbytes = 0x21, + .bytes = g_id38 + }, + { + .addr = 0x01a5, + .id = 0x3e, + .nbytes = 0x36, + .bytes = g_id3e + }, + { + .addr = 0x01db, + .id = 0x41, + .nbytes = 0x14, + .bytes = g_id41 + }, + { + .addr = 0x01ef, + .id = 0x42, + .nbytes = 0x03, + .bytes = g_id42 + }, + { + .addr = 0x0000, + .id = 0x00, + .nbytes = 0x00, + .bytes = (FAR uint8_t *)0 + } +}; + +#endif + diff --git a/configs/samv71-xult/src/sam_audio_null.c b/configs/samv71-xult/src/sam_audio_null.c new file mode 100644 index 0000000000000000000000000000000000000000..2dedb31eba353bae65a18f18fe83105481a3f808 --- /dev/null +++ b/configs/samv71-xult/src/sam_audio_null.c @@ -0,0 +1,168 @@ +/************************************************************************************ + * configs/samv71-xult/src/sam_audio_null.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "samv71-xult.h" + +#ifdef HAVE_AUDIO_NULL + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_audio_null_initialize + * + * Description: + * Set up to use the NULL audio device for PCM unit-level testing. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int sam_audio_null_initialize(int minor) +{ + FAR struct audio_lowerhalf_s *nullaudio; + FAR struct audio_lowerhalf_s *pcm; + static bool initialized = false; + char devname[12]; + int ret; + + auddbg("minor %d\n", minor); + DEBUGASSERT(minor >= 0 && minor <= 25); + + /* Have we already initialized? Since we never uninitialize we must prevent + * multiple initializations. This is necessary, for example, when the + * touchscreen example is used as a built-in application in NSH and can be + * called numerous time. It will attempt to initialize each time. + */ + + if (!initialized) + { + /* Get a null audio interface + */ + + nullaudio = audio_null_initialize(); + if (!nullaudio) + { + auddbg("Failed to get the NULL audio interface\n"); + ret = -ENODEV; + goto errout; + } + + /* No we can embed the null audio interface into a PCM decoder + * instance so that we will have a PCM front end for the NULL + * audio driver. + */ + + pcm = pcm_decode_initialize(nullaudio); + if (!pcm) + { + auddbg("ERROR: Failed create the PCM decoder\n"); + ret = -ENODEV; + goto errout_with_nullaudio; + } + + /* Create a device name */ + + snprintf(devname, 12, "pcm%d", minor); + + /* Finally, we can register the PCM/NULL audio device. */ + + ret = audio_register(devname, pcm); + if (ret < 0) + { + auddbg("ERROR: Failed to register /dev/%s device: %d\n", devname, ret); + goto errout_with_pcm; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; + + /* Error exits. Unfortunately there is no mechanism in place now to + * recover resources from most errors on initialization failures. + */ + +errout_with_nullaudio: +errout_with_pcm: +errout: + return ret; +} + +#endif /* HAVE_AUDIO_NULL */ diff --git a/configs/samv71-xult/src/sam_autoleds.c b/configs/samv71-xult/src/sam_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..1009489cf16c4635c66f0dbfbd61d1f7be3af4a0 --- /dev/null +++ b/configs/samv71-xult/src/sam_autoleds.c @@ -0,0 +1,173 @@ +/**************************************************************************** + * configs/samv71-xult/include/sam_autoleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* LEDs + * + * There are two yellow LED available on the SAM V71 Xplained Ultra board that + * can be turned on and off. The LEDs can be activated by driving the + * connected I/O line to GND. + * + * ------ ----------- --------------------- + * SAMV71 Function Shared functionality + * PIO + * ------ ----------- --------------------- + * PA23 Yellow LED0 EDBG GPIO + * PC09 Yellow LED1 LCD, and Shield + * ------ ----------- --------------------- + * + * These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_autoleds.c. The LEDs are used to encode + * OS-related events as follows: + * + * ------------------- ----------------------- -------- -------- + * SYMBOL Meaning LED state + * LED0 LED1 + * ------------------- ----------------------- -------- -------- + * LED_STARTED NuttX has been started OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF + * LED_IRQSENABLED Interrupts enabled OFF OFF + * LED_STACKCREATED Idle stack created ON OFF + * LED_INIRQ In an interrupt No change + * LED_SIGNAL In a signal handler No change + * LED_ASSERTION An assertion failed No change + * LED_PANIC The system has crashed N/C Blinking + * LED_IDLE MCU is is sleep mode Not used + * ------------------- ----------------------- -------- -------- + * + * Thus if LED0 is statically on, NuttX has successfully booted and is, + * apparently, running normally. If LED1 is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + * + * NOTE: That LED0 is not used after completion of booting and may + * be used by other board-specific logic. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "samv71-xult.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED PIOs for output */ + + sam_configgpio(GPIO_LED0); + sam_configgpio(GPIO_LED1); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED */ + break; + + case 1: /* LED_STACKCREATED */ + sam_gpiowrite(GPIO_LED0, false); /* Low illuminates */ + break; + + default: + case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ + return; + + case 3: /* LED_PANIC */ + sam_gpiowrite(GPIO_LED1, false); /* Low illuminates */ + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == 3) + { + sam_gpiowrite(GPIO_LED1, true); /* High extinguishes */ + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/samv71-xult/src/sam_boot.c b/configs/samv71-xult/src/sam_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..92f07ddc6e53ff94c6df1538f60df4f8cd0f7823 --- /dev/null +++ b/configs/samv71-xult/src/sam_boot.c @@ -0,0 +1,159 @@ +/**************************************************************************** + * configs/samv71-xult/src/sam_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "sam_start.h" +#include "sam_pck.h" +#include "samv71-xult.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_boardinitialize + * + * Description: + * All SAMV7 architectures must provide the following entry point. This + * entry point is called early in the initialization -- after clocking and + * memory have been configured but before caches have been enabled and + * before any devices have been initialized. + * + ****************************************************************************/ + +void sam_boardinitialize(void) +{ +#ifdef CONFIG_SCHED_TICKLESS + uint32_t frequency; + uint32_t actual; + + /* If Tickless mode is selected then enabled PCK6 as a possible clock + * source for the timer/counters. The ideal frequency could be: + * + * frequency = 1,000,000 / CONFIG_USEC_PER_TICK + * + * The main crystal is selected as the frequency source. The maximum + * prescaler value is 256 so the minimum frequency is 46,875 Hz which + * corresponds to a period of 21.3 microseconds. A value of + * CONFIG_USEC_PER_TICK=20, or 50KHz, would give an exact solution with + * a divider of 240. + */ + + frequency = USEC_PER_SEC / CONFIG_USEC_PER_TICK; + DEBUGASSERT(frequency >= (BOARD_MAINOSC_FREQUENCY / 256)); + + actual = sam_pck_configure(PCK6, PCKSRC_MAINCK, frequency); + + /* We expect to achieve this frequency exactly */ + + DEBUGASSERT(actual == frequency); + UNUSED(actual); + + /* Enable PCK6 */ + + (void)sam_pck_enable(PCK6, true); +#endif + +#ifdef CONFIG_SAMV7_SDRAMC + /* Configure SDRAM if it has been enabled in the NuttX configuration. + * Here we assume, of course, that we are not running out SDRAM. + */ + + sam_sdram_config(); +#endif + +#ifdef CONFIG_SAMV7_SPI + /* Configure SPI chip selects if SPI has been enabled */ + + sam_spidev_initialize(); +#endif + +#ifdef HAVE_USB + /* Setup USB-related GPIO pins for the SAMV71-XULT board. */ + + sam_usbinitialize(); +#endif + +#ifdef HAVE_NETWORK + /* Configure board resources to support networking if the 1) networking is + * enabled, and 2) the EMAC module is enabled + */ + + sam_netinitialize(); +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intitialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform board initialization */ + + (void)sam_bringup(); +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/samv71-xult/src/sam_bringup.c b/configs/samv71-xult/src/sam_bringup.c new file mode 100644 index 0000000000000000000000000000000000000000..dce34997e50e93ef603996678e373042d0766e42 --- /dev/null +++ b/configs/samv71-xult/src/sam_bringup.c @@ -0,0 +1,533 @@ +/**************************************************************************** + * config/samv71-xult/src/sam_bringup.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#include +#include +#include +#include +#include + +#include "sam_twihs.h" +#include "samv71-xult.h" + +#if defined(HAVE_S25FL1) || defined(HAVE_PROGMEM_CHARDEV) +# include +#endif + +#ifdef HAVE_S25FL1 +# include +# include "sam_qspi.h" +#endif + +#ifdef HAVE_LED_DRIVER +# include +#endif + +#ifdef HAVE_PROGMEM_CHARDEV +# include "sam_progmem.h" +#endif + +#if defined(HAVE_RTC_DSXXXX) || defined(HAVE_RTC_PCF85263) +# include +# include +#ifdef HAVE_RTC_DSXXXX +# include +#else +# include +#endif +# include "sam_twihs.h" +#endif + +#ifdef HAVE_ROMFS +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define NSECTORS(n) \ + (((n)+CONFIG_SAMV71XULT_ROMFS_ROMDISK_SECTSIZE-1) / \ + CONFIG_SAMV71XULT_ROMFS_ROMDISK_SECTSIZE) + +/* Debug ********************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +# define SYSLOG lldbg +#else +# define SYSLOG dbg +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_i2c_register + * + * Description: + * Register one I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void sam_i2c_register(int bus) +{ + FAR struct i2c_master_s *i2c; + int ret; + + i2c = sam_i2cbus_initialize(bus); + if (i2c == NULL) + { + dbg("ERROR: Failed to get I2C%d interface\n", bus); + } + else + { + ret = i2c_register(i2c, bus); + if (ret < 0) + { + dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); + sam_i2cbus_uninitialize(i2c); + } + } +} +#endif + +/**************************************************************************** + * Name: sam_i2ctool + * + * Description: + * Register I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void sam_i2ctool(void) +{ +#ifdef CONFIG_SAMV7_TWIHS0 + sam_i2c_register(0); +#endif +#ifdef CONFIG_SAMV7_TWIHS1 + sam_i2c_register(1); +#endif +#ifdef CONFIG_SAMV7_TWIHS2 + sam_i2c_register(2); +#endif +} +#else +# define sam_i2ctool() +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int sam_bringup(void) +{ +#ifdef HAVE_S25FL1 + FAR struct qspi_dev_s *qspi; +#endif +#if defined(HAVE_S25FL1) || defined(HAVE_PROGMEM_CHARDEV) + FAR struct mtd_dev_s *mtd; +#endif +#if defined(HAVE_RTC_DSXXXX) || defined(HAVE_RTC_PCF85263) + FAR struct i2c_master_s *i2c; +#endif +#if defined(HAVE_S25FL1_CHARDEV) || defined(HAVE_PROGMEM_CHARDEV) + char blockdev[18]; + char chardev[12]; +#endif + int ret; + + /* Register I2C drivers on behalf of the I2C tool */ + + sam_i2ctool(); + +#ifdef HAVE_LED_DRIVER + /* Register the LED driver */ + + ret = userled_lower_initialize(LED_DRIVER_PATH); + if (ret < 0) + { + SYSLOG("ERROR: userled_lower_initialize() failed: %d\n", ret); + } +#endif + +#if defined(HAVE_RTC_PCF85263) + /* Get an instance of the TWIHS0 I2C interface */ + + i2c = sam_i2cbus_initialize(PCF85263_TWI_BUS); + if (i2c == NULL) + { + SYSLOG("ERROR: sam_i2cbus_initialize(%d) failed\n", PCF85263_TWI_BUS); + } + else + { + /* Use the I2C interface to initialize the PCF2863 timer */ + + ret = pcf85263_rtc_initialize(i2c); + if (ret < 0) + { + SYSLOG("ERROR: pcf85263_rtc_initialize() failed: %d\n", ret); + } + else + { + /* Synchronize the system time to the RTC time */ + + clock_synchronize(); + } + } + +#elif defined(HAVE_RTC_DSXXXX) + /* Get an instance of the TWIHS0 I2C interface */ + + i2c = sam_i2cbus_initialize(DSXXXX_TWI_BUS); + if (i2c == NULL) + { + SYSLOG("ERROR: sam_i2cbus_initialize(%d) failed\n", DSXXXX_TWI_BUS); + } + else + { + /* Use the I2C interface to initialize the DSXXXX timer */ + + ret = dsxxxx_rtc_initialize(i2c); + if (ret < 0) + { + SYSLOG("ERROR: dsxxxx_rtc_initialize() failed: %d\n", ret); + } + else + { + /* Synchronize the system time to the RTC time */ + + clock_synchronize(); + } + } +#endif + +#ifdef HAVE_MACADDR + /* Read the Ethernet MAC address from the AT24 FLASH and configure the + * Ethernet driver with that address. + */ + + ret = sam_emac0_setmac(); + if (ret < 0) + { + SYSLOG("ERROR: sam_emac0_setmac() failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = mount(NULL, SAMV71_PROCFS_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + SYSLOG("ERROR: Failed to mount procfs at %s: %d\n", + SAMV71_PROCFS_MOUNTPOINT, ret); + } +#endif + +#ifdef HAVE_MTDCONFIG + /* Create an AT24xx-based MTD configuration device for storage device + * configuration information. + */ + + ret = sam_at24config(); + if (ret < 0) + { + SYSLOG("ERROR: sam_at24config() failed: %d\n", ret); + } +#endif + +#ifdef HAVE_HSMCI + /* Initialize the HSMCI0 driver */ + + ret = sam_hsmci_initialize(HSMCI0_SLOTNO, HSMCI0_MINOR); + if (ret < 0) + { + SYSLOG("ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n", + HSMCI0_SLOTNO, HSMCI0_MINOR, ret); + } + +#ifdef CONFIG_SAMV71XULT_HSMCI0_MOUNT + else + { + /* REVISIT: A delay seems to be required here or the mount will fail. */ + /* Mount the volume on HSMCI0 */ + + ret = mount(CONFIG_SAMV71XULT_HSMCI0_MOUNT_BLKDEV, + CONFIG_SAMV71XULT_HSMCI0_MOUNT_MOUNTPOINT, + CONFIG_SAMV71XULT_HSMCI0_MOUNT_FSTYPE, + 0, NULL); + + if (ret < 0) + { + SYSLOG("ERROR: Failed to mount %s: %d\n", + CONFIG_SAMV71XULT_HSMCI0_MOUNT_MOUNTPOINT, errno); + } + } + +#endif /* CONFIG_SAMV71XULT_HSMCI0_MOUNT */ +#endif /* HAVE_HSMCI */ + +#ifdef HAVE_AUTOMOUNTER + /* Initialize the auto-mounter */ + + sam_automount_initialize(); +#endif + +#ifdef HAVE_ROMFS + /* Create a ROM disk for the /etc filesystem */ + + ret = romdisk_register(CONFIG_SAMV71XULT_ROMFS_ROMDISK_MINOR, romfs_img, + NSECTORS(romfs_img_len), + CONFIG_SAMV71XULT_ROMFS_ROMDISK_SECTSIZE); + if (ret < 0) + { + SYSLOG("ERROR: romdisk_register failed: %d\n", -ret); + } + else + { + /* Mount the file system */ + + ret = mount(CONFIG_SAMV71XULT_ROMFS_ROMDISK_DEVNAME, + CONFIG_SAMV71XULT_ROMFS_MOUNT_MOUNTPOINT, + "romfs", MS_RDONLY, NULL); + if (ret < 0) + { + SYSLOG("ERROR: mount(%s,%s,romfs) failed: %d\n", + CONFIG_SAMV71XULT_ROMFS_ROMDISK_DEVNAME, + CONFIG_SAMV71XULT_ROMFS_MOUNT_MOUNTPOINT, errno); + } + } +#endif + +#ifdef HAVE_S25FL1 + /* Create an instance of the SAMV71 QSPI device driver */ + + qspi = sam_qspi_initialize(0); + if (!qspi) + { + SYSLOG("ERROR: sam_qspi_initialize failed\n"); + } + else + { + /* Use the QSPI device instance to initialize the + * S25FL1 device. + */ + + mtd = s25fl1_initialize(qspi, true); + if (!mtd) + { + SYSLOG("ERROR: s25fl1_initialize failed\n"); + } + +#ifdef HAVE_S25FL1_SMARTFS + /* Configure the device with no partition support */ + + ret = smart_initialize(S25FL1_SMART_MINOR, mtd, NULL); + if (ret != OK) + { + SYSLOG("ERROR: Failed to initialize SmartFS: %d\n", ret); + } + +#elif defined(HAVE_S25FL1_NXFFS) + /* Initialize to provide NXFFS on the S25FL1 MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + SYSLOG("ERROR: NXFFS initialization failed: %d\n", ret); + } + + /* Mount the file system at /mnt/s25fl1 */ + + ret = mount(NULL, "/mnt/s25fl1", "nxffs", 0, NULL); + if (ret < 0) + { + SYSLOG("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } + +#else /* if defined(HAVE_S25FL1_CHARDEV) */ + /* Use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(S25FL1_MTD_MINOR, mtd); + if (ret < 0) + { + SYSLOG("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + + /* Use the minor number to create device paths */ + + snprintf(blockdev, 18, "/dev/mtdblock%d", S25FL1_MTD_MINOR); + snprintf(chardev, 12, "/dev/mtd%d", S25FL1_MTD_MINOR); + + /* Now create a character device on the block device */ + + ret = bchdev_register(blockdev, chardev, false); + if (ret < 0) + { + SYSLOG("ERROR: bchdev_register %s failed: %d\n", chardev, ret); + return ret; + } +#endif + } +#endif + +#ifdef HAVE_PROGMEM_CHARDEV + /* Initialize the SAMV71 FLASH programming memory library */ + + sam_progmem_initialize(); + + /* Create an instance of the SAMV71 FLASH program memory device driver */ + + mtd = progmem_initialize(); + if (!mtd) + { + SYSLOG("ERROR: progmem_initialize failed\n"); + } + + /* Use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(PROGMEM_MTD_MINOR, mtd); + if (ret < 0) + { + SYSLOG("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + + /* Use the minor number to create device paths */ + + snprintf(blockdev, 18, "/dev/mtdblock%d", PROGMEM_MTD_MINOR); + snprintf(chardev, 12, "/dev/mtd%d", PROGMEM_MTD_MINOR); + + /* Now create a character device on the block device */ + + ret = bchdev_register(blockdev, chardev, false); + if (ret < 0) + { + SYSLOG("ERROR: bchdev_register %s failed: %d\n", chardev, ret); + return ret; + } +#endif + +#ifdef HAVE_USBHOST + /* Initialize USB host operation. sam_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + + ret = sam_usbhost_initialize(); + if (ret != OK) + { + SYSLOG("ERROR: Failed to initialize USB host: %d\n", ret); + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + SYSLOG("ERROR: Failed to start the USB monitor: %d\n", ret); + } +#endif + +#ifdef HAVE_WM8904 + /* Configure WM8904 audio */ + + ret = sam_wm8904_initialize(0); + if (ret != OK) + { + SYSLOG("ERROR: Failed to initialize WM8904 audio: %d\n", ret); + } +#endif + +#ifdef HAVE_AUDIO_NULL + /* Configure the NULL audio device */ + + ret = sam_audio_null_initialize(0); + if (ret != OK) + { + SYSLOG("ERROR: Failed to initialize the NULL audio device: %d\n", ret); + } +#endif + +#ifdef HAVE_ELF + /* Initialize the ELF binary loader */ + + SYSLOG("Initializing the ELF binary loader\n"); + ret = elf_initialize(); + if (ret < 0) + { + SYSLOG("ERROR: Initialization of the ELF loader failed: %d\n", ret); + } +#endif + + /* If we got here then perhaps not all initialization was successful, but + * at least enough succeeded to bring-up NSH with perhaps reduced + * capabilities. + */ + + UNUSED(ret); + return OK; +} diff --git a/configs/samv71-xult/src/sam_buttons.c b/configs/samv71-xult/src/sam_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..2a80362388018ee15bf1bdb40941f92c03637cd1 --- /dev/null +++ b/configs/samv71-xult/src/sam_buttons.c @@ -0,0 +1,239 @@ +/**************************************************************************** + * configs/sam4e-ek/src/sam_buttons.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "sam_gpio.h" +#include "chip/sam_matrix.h" +#include "samv71-xult.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS + +#define HAVE_IRQBUTTONS 1 +#if !defined(CONFIG_SAMV7_GPIOA_IRQ) && !defined(CONFIG_SAMV7_GPIOB_IRQ) +# undef HAVE_IRQBUTTONS +#endif + +#ifdef CONFIG_SAMV7_GPIOA_IRQ +static xcpt_t g_irq_sw0; +#endif +#ifdef CONFIG_SAMV7_GPIOB_IRQ +static xcpt_t g_irq_sw1; +#endif +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_irqx + * + * Description: + * This function implements the core of the board_button_irq() logic. + * + ****************************************************************************/ + +#ifdef HAVE_IRQBUTTONS +static xcpt_t board_button_irqx(gpio_pinset_t pinset, int irq, + xcpt_t irqhandler, xcpt_t *store) +{ + xcpt_t oldhandler; + irqstate_t flags; + + /* Disable interrupts until we are done. This guarantees that the following + * operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old button interrupt handler and save the new one */ + + oldhandler = *store; + *store = irqhandler; + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + /* Configure the interrupt */ + + sam_gpioirq(pinset); + (void)irq_attach(irq, irqhandler); + sam_gpioirqenable(irq); + } + else + { + /* Detach and disable the interrupt */ + + (void)irq_detach(irq); + sam_gpioirqdisable(irq); + } + + leave_critical_section(flags); + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + uint32_t regval; + + /* PB12 is set up as a system flash ERASE pin when the firmware boots. To + * use the SW1, PB12 has to be configured as a normal regular I/O pin in + * the MATRIX module. For more information see the SAM V71 datasheet. + */ + + regval = getreg32(SAM_MATRIX_CCFG_SYSIO); + regval |= MATRIX_CCFG_SYSIO_SYSIO12; + putreg32(regval, SAM_MATRIX_CCFG_SYSIO); + + /* Configure button PIOs */ + + (void)sam_configgpio(GPIO_SW0); + (void)sam_configgpio(GPIO_SW1); +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t retval; + + retval = sam_gpioread(GPIO_SW0) ? 0 : BUTTON_SW0_BIT; + retval |= sam_gpioread(GPIO_SW1) ? 0 : BUTTON_SW1_BIT; + + return retval; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address is returned (so that it may restored, if so desired). + * + * Configuration Notes: + * Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the + * overall GPIO IRQ feature and CONFIG_AVR32_GPIOIRQSETA and/or + * CONFIG_AVR32_GPIOIRQSETB must be enabled to select GPIOs to support + * interrupts on. For button support, bits 2 and 3 must be set in + * CONFIG_AVR32_GPIOIRQSETB (PB2 and PB3). + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ +#ifdef HAVE_IRQBUTTONS + + switch (id) + { +#ifdef CONFIG_SAMV7_GPIOA_IRQ + case BUTTON_SW0: + return board_button_irqx(GPIO_SW0, IRQ_SW0, irqhandler, &g_irq_sw0); +#endif + +#ifdef CONFIG_SAMV7_GPIOB_IRQ + case BUTTON_SW1: + return board_button_irqx(GPIO_SW1, IRQ_SW1, irqhandler, &g_irq_sw1); +#endif + + default: + return NULL; + } + +#else + + return NULL; + +#endif +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/samv71-xult/src/sam_composite.c b/configs/samv71-xult/src/sam_composite.c new file mode 100644 index 0000000000000000000000000000000000000000..81fdfbcc9006d4ea1dbd3633511d4761007f7647 --- /dev/null +++ b/configs/samv71-xult/src/sam_composite.c @@ -0,0 +1,66 @@ +/**************************************************************************** + * configs/samv71-xult/src/sam_composite.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +#include "samv71-xult.h" + +#ifdef CONFIG_USBDEV_COMPOSITE + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_composite_initialize + * + * Description: + * Perform architecture specific initialization of a composite USB device. + * + ****************************************************************************/ + +int board_composite_initialize(int port) +{ + return OK; +} + +#endif /* CONFIG_USBDEV_COMPOSITE */ diff --git a/configs/samv71-xult/src/sam_ethernet.c b/configs/samv71-xult/src/sam_ethernet.c new file mode 100644 index 0000000000000000000000000000000000000000..e6d36ad4cfbae1eef49f25d686bac0f7a7a07dc5 --- /dev/null +++ b/configs/samv71-xult/src/sam_ethernet.c @@ -0,0 +1,379 @@ +/************************************************************************************ + * configs/samv71-xult/src/sam_ethernet.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/* Force verbose debug on in this file only to support unit-level testing. */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# define CONFIG_DEBUG_VERBOSE 1 +# undef CONFIG_DEBUG_NET +# define CONFIG_DEBUG_NET 1 +#endif + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "sam_gpio.h" +#include "sam_twihs.h" +#include "sam_ethernet.h" + +#include "samv71-xult.h" + +#ifdef HAVE_NETWORK + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define SAMV7_EMAC0_DEVNAME "eth0" + +#define AT24XX_MACADDR_OFFSET 0x9a + +/* Debug ********************************************************************/ +/* Extra, in-depth debug output that is only available if + * CONFIG_NETDEV_PHY_DEBUG us defined. + */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# define phydbg dbg +# define phylldbg lldbg +#else +# define phydbg(x...) +# define phylldbg(x...) +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_SAMV7_GPIOA_IRQ +static xcpt_t g_emac0_handler; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_emac0_phy_enable + ************************************************************************************/ + +#ifdef CONFIG_SAMV7_GPIOA_IRQ +static void sam_emac0_phy_enable(bool enable) +{ + phydbg("IRQ%d: enable=%d\n", IRQ_EMAC0_INT, enable); + if (enable) + { + sam_gpioirqenable(IRQ_EMAC0_INT); + } + else + { + sam_gpioirqdisable(IRQ_EMAC0_INT); + } +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +void weak_function sam_netinitialize(void) +{ + /* Configure the PHY interrupt GPIO */ + + phydbg("Configuring %08x\n", GPIO_EMAC0_INT); + sam_configgpio(GPIO_EMAC0_INT); + + /* Configure the PHY SIGDET input */ + + sam_configgpio(GPIO_EMAC0_SIGDET); + + /* Configure PHY /RESET output */ + + sam_configgpio(GPIO_EMAC0_RESET); +} + +/************************************************************************************ + * Name: sam_emac0_setmac + * + * Description: + * Read the Ethernet MAC address from the AT24 FLASH and configure the Ethernet + * driver with that address. + * + ************************************************************************************/ + +#ifdef HAVE_MACADDR +int sam_emac0_setmac(void) +{ + struct i2c_master_s *i2c; + struct mtd_dev_s *at24; + uint8_t mac[6]; + ssize_t nread; + int ret; + + /* Get an instance of the TWI0 interface */ + + i2c = sam_i2cbus_initialize(0); + if (!i2c) + { + ndbg("ERROR: Failed to initialize TWI0\n"); + return -ENODEV; + } + + /* Initialize the AT24 driver */ + + at24 = at24c_initialize(i2c); + if (!at24) + { + ndbg("ERROR: Failed to initialize the AT24 driver\n"); + (void)sam_i2cbus_uninitialize(i2c); + return -ENODEV; + } + + /* Configure the AT24 to access the extended memory region */ + + ret = at24->ioctl(at24, MTDIOC_EXTENDED, 1); + if (ret < 0) + { + ndbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret); + (void)sam_i2cbus_uninitialize(i2c); + return ret; + } + + /* Read the MAC address */ + + nread = at24->read(at24, AT24XX_MACADDR_OFFSET, 6, mac); + if (nread < 6) + { + ndbg("ERROR: AT24 read(AT24XX_MACADDR_OFFSET) failed: ld\n", (long)nread); + (void)sam_i2cbus_uninitialize(i2c); + return (int)nread; + } + + /* Put the AT24 back in normal memory access mode */ + + ret = at24->ioctl(at24, MTDIOC_EXTENDED, 0); + if (ret < 0) + { + ndbg("ERROR: AT24 ioctl(MTDIOC_EXTENDED) failed: %d\n", ret); + } + + /* Release the I2C instance. + * REVISIT: Need an interface to release the AT24 instance too + */ + + ret = sam_i2cbus_uninitialize(i2c); + if (ret < 0) + { + ndbg("ERROR: Failed to release the I2C interface: %d\n", ret); + } + + nvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n", + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + + /* Now configure the EMAC driver to use this MAC address */ + + ret = sam_emac_setmacaddr(EMAC0_INTF, mac); + if (ret < 0) + { + ndbg("ERROR: Failed to set MAC address: %d\n", ret); + } + + return ret; +} +#else +# define sam_emac0_setmac() +#endif + +/**************************************************************************** + * Name: arch_phy_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a PHY interrupt occurs. This function both attaches + * the interrupt handler and enables the interrupt if 'handler' is non- + * NULL. If handler is NULL, then the interrupt is detached and disabled + * instead. + * + * The PHY interrupt is always disabled upon return. The caller must + * call back through the enable function point to control the state of + * the interrupt. + * + * This interrupt may or may not be available on a given platform depending + * on how the network hardware architecture is implemented. In a typical + * case, the PHY interrupt is provided to board-level logic as a GPIO + * interrupt (in which case this is a board-specific interface and really + * should be called board_phy_irq()); In other cases, the PHY interrupt + * may be cause by the chip's MAC logic (in which case arch_phy_irq()) is + * an appropriate name. Other other boards, there may be no PHY interrupts + * available at all. If client attachable PHY interrupts are available + * from the board or from the chip, then CONFIG_ARCH_PHY_INTERRUPT should + * be defined to indicate that fact. + * + * Typical usage: + * a. OS service logic (not application logic*) attaches to the PHY + * PHY interrupt and enables the PHY interrupt. + * b. When the PHY interrupt occurs: (1) the interrupt should be + * disabled and () work should be scheduled on the worker thread (or + * perhaps a dedicated application thread). + * c. That worker thread should use the SIOCGMIIPHY, SIOCGMIIREG, + * and SIOCSMIIREG ioctl calls** to communicate with the PHY, + * determine what network event took place (Link Up/Down?), and + * take the appropriate actions. + * d. It should then interact the the PHY to clear any pending + * interrupts, then re-enable the PHY interrupt. + * + * * This is an OS internal interface and should not be used from + * application space. Rather applications should use the SIOCMIISIG + * ioctl to receive a signal when a PHY event occurs. + * ** This interrupt is really of no use if the Ethernet MAC driver + * does not support these ioctl calls. + * + * Input Parameters: + * intf - Identifies the network interface. For example "eth0". Only + * useful on platforms that support multiple Ethernet interfaces + * and, hence, multiple PHYs and PHY interrupts. + * handler - The client interrupt handler to be invoked when the PHY + * asserts an interrupt. Must reside in OS space, but can + * signal tasks in user space. A value of NULL can be passed + * in order to detach and disable the PHY interrupt. + * enable - A function pointer that be unsed to enable or disable the + * PHY interrupt. + * + * Returned Value: + * The previous PHY interrupt handler address is returned. This allows you + * to temporarily replace an interrupt handler, then restore the original + * interrupt handler. NULL is returned if there is was not handler in + * place when the call was made. + * + ****************************************************************************/ + +#ifdef CONFIG_SAMV7_GPIOA_IRQ +xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable) +{ + irqstate_t flags; + xcpt_t *phandler; + xcpt_t oldhandler; + gpio_pinset_t pinset; + phy_enable_t enabler; + int irq; + + DEBUGASSERT(intf); + + nvdbg("%s: handler=%p\n", intf, handler); + phydbg("EMAC0: devname=%s\n", SAMV7_EMAC0_DEVNAME); + + if (strcmp(intf, SAMV7_EMAC0_DEVNAME) == 0) + { + phydbg("Select EMAC0\n"); + phandler = &g_emac0_handler; + pinset = GPIO_EMAC0_INT; + irq = IRQ_EMAC0_INT; + enabler = sam_emac0_phy_enable; + } + else + { + ndbg("Unsupported interface: %s\n", intf); + return NULL; + } + + /* Disable interrupts until we are done. This guarantees that the + * following operations are atomic. + */ + + flags = enter_critical_section(); + + /* Get the old interrupt handler and save the new one */ + + oldhandler = *phandler; + *phandler = handler; + + /* Configure the interrupt */ + + if (handler) + { + phydbg("Configure pin: %08x\n", pinset); + sam_gpioirq(pinset); + + phydbg("Attach IRQ%d\n", irq); + (void)irq_attach(irq, handler); + } + else + { + phydbg("Detach IRQ%d\n", irq); + (void)irq_detach(irq); + enabler = NULL; + } + + /* Return with the interrupt disabled in either case */ + + sam_gpioirqdisable(irq); + + /* Return the enabling function pointer */ + + if (enable) + { + *enable = enabler; + } + + /* Return the old handler (so that it can be restored) */ + + leave_critical_section(flags); + return oldhandler; +} +#endif /* CONFIG_SAMV7_GPIOA_IRQ */ + +#endif /* HAVE_NETWORK */ diff --git a/configs/samv71-xult/src/sam_hsmci.c b/configs/samv71-xult/src/sam_hsmci.c new file mode 100644 index 0000000000000000000000000000000000000000..f4e26ff016d4708a1485da96f2856dabd9901061 --- /dev/null +++ b/configs/samv71-xult/src/sam_hsmci.c @@ -0,0 +1,320 @@ +/**************************************************************************** + * config/samv71-xult/src/sam_hsmci.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The SAM V71 Xplained Ultra has one standard SD card connector which is + * connected to the High Speed Multimedia Card Interface (HSMCI) of the SAM + * V71. SD card connector: + * + * ------ ----------------- --------------------- + * SAMV71 SAMV71 Shared functionality + * Pin Function + * ------ ----------------- --------------------- + * PA30 MCDA0 (DAT0) + * PA31 MCDA1 (DAT1) + * PA26 MCDA2 (DAT2) + * PA27 MCDA3 (DAT3) Camera + * PA25 MCCK (CLK) Shield + * PA28 MCCDA (CMD) + * PD18 Card Detect (C/D) Shield + * ------ ----------------- --------------------- + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "sam_gpio.h" +#include "sam_hsmci.h" + +#include "samv71-xult.h" + +#ifdef HAVE_HSMCI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ +/* This structure holds static information unique to one HSMCI peripheral */ + +struct sam_hsmci_state_s +{ + struct sdio_dev_s *hsmci; /* R/W device handle */ + gpio_pinset_t cdcfg; /* Card detect PIO pin configuration */ + gpio_pinset_t pwrcfg; /* Power PIO pin configuration */ + uint8_t irq; /* Interrupt number (same as pid) */ + uint8_t slotno; /* Slot number */ + bool cd; /* TRUE: card is inserted */ + xcpt_t handler; /* Interrupt handler */ +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* HSCMI device state */ + +#ifdef CONFIG_SAMV7_HSMCI0 +static int sam_hsmci0_cardetect(int irq, void *regs); + +static struct sam_hsmci_state_s g_hsmci0 = +{ + .cdcfg = GPIO_MCI0_CD, + .irq = IRQ_MCI0_CD, + .slotno = 0, + .handler = sam_hsmci0_cardetect, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_cardinserted_internal + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_cardinserted_internal(struct sam_hsmci_state_s *state) +{ + bool inserted; + + /* Get the state of the PIO pin */ + + inserted = sam_gpioread(state->cdcfg); + fllvdbg("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES"); + return !inserted; +} + +/**************************************************************************** + * Name: sam_hsmci_cardetect, sam_hsmci0_cardetect, and sam_hsmci1_cardetect + * + * Description: + * Card detect interrupt handlers + * + ****************************************************************************/ + +static int sam_hsmci_cardetect(struct sam_hsmci_state_s *state) +{ + /* Get the current card insertion state */ + + bool cd = sam_cardinserted_internal(state); + + /* Has the card detect state changed? */ + + if (cd != state->cd) + { + /* Yes... remember that new state and inform the HSMCI driver */ + + state->cd = cd; + + /* Report the new state to the SDIO driver */ + + sdio_mediachange(state->hsmci, cd); + } + + return OK; +} + +#ifdef CONFIG_SAMV7_HSMCI0 +static int sam_hsmci0_cardetect(int irq, void *regs) +{ + int ret; + + /* Handle the card detect interrupt. The interrupt level logic will + * kick of the driver-level operations to initialize the MMC/SD block + * device. + */ + + ret = sam_hsmci_cardetect(&g_hsmci0); + +#ifdef CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT + /* Let the automounter know about the insertion event */ + + sam_automount_event(HSMCI0_SLOTNO, sam_cardinserted(HSMCI0_SLOTNO)); +#endif + + return ret; +} +#endif + +/**************************************************************************** + * Name: sam_hsmci_state + * + * Description: + * Initialize HSMCI PIOs. + * + ****************************************************************************/ + +static inline struct sam_hsmci_state_s *sam_hsmci_state(int slotno) +{ + struct sam_hsmci_state_s *state = NULL; + +#ifdef CONFIG_SAMV7_HSMCI0 + state = &g_hsmci0; +#endif + + return state; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_hsmci_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int sam_hsmci_initialize(int slotno, int minor) +{ + struct sam_hsmci_state_s *state; + int ret; + + /* Get the static HSMI description */ + + state = sam_hsmci_state(slotno); + if (!state) + { + fdbg("ERROR: No state for slotno %d\n", slotno); + return -EINVAL; + } + + /* Initialize card-detect, write-protect, and power enable PIOs */ + + sam_configgpio(state->cdcfg); + sam_dumpgpio(state->cdcfg, "HSMCI Card Detect"); + + if (state->pwrcfg != 0) + { + sam_configgpio(state->pwrcfg); + sam_dumpgpio(state->pwrcfg, "HSMCI Power"); + } + + /* Mount the SDIO-based MMC/SD block driver */ + /* First, get an instance of the SDIO interface */ + + state->hsmci = sdio_initialize(slotno); + if (!state->hsmci) + { + fdbg("ERROR: Failed to initialize SDIO slot %d\n", slotno); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(minor, state->hsmci); + if (ret != OK) + { + fdbg("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + /* Configure card detect interrupts */ + + sam_gpioirq(state->cdcfg); + (void)irq_attach(state->irq, state->handler); + + /* Then inform the HSMCI driver if there is or is not a card in the slot. */ + + state->cd = sam_cardinserted_internal(state); + sdio_mediachange(state->hsmci, state->cd); + + /* Enable card detect interrupts */ + + sam_gpioirqenable(state->irq); + return OK; +} + +/**************************************************************************** + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_cardinserted(int slotno) +{ + struct sam_hsmci_state_s *state; + + /* Get the HSMI description */ + + state = sam_hsmci_state(slotno); + if (!state) + { + fdbg("ERROR: No state for slotno %d\n", slotno); + return false; + } + + /* Return the state of the PIO pin */ + + return sam_cardinserted_internal(state); +} + +/**************************************************************************** + * Name: sam_writeprotected + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ****************************************************************************/ + +bool sam_writeprotected(int slotno) +{ + /* There are no write protect pins */ + + return false; +} + +#endif /* HAVE_HSMCI */ diff --git a/configs/samv71-xult/src/sam_ili9488.c b/configs/samv71-xult/src/sam_ili9488.c new file mode 100644 index 0000000000000000000000000000000000000000..61742b3fd634e5925f476c8bf219e508a07b6378 --- /dev/null +++ b/configs/samv71-xult/src/sam_ili9488.c @@ -0,0 +1,1723 @@ +/**************************************************************************** + * configs/samv71-xult/src/sam_ili9488.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * References: + * - This driver is a modification of the SAMA4E ILI9341 LCD driver. + * - Atmel ILI93241 Sample code for the SAM4E + * - Atmel ILI9488 Sample code for the SAMV71 + * + * Some the LCD and SMC initialization logic comes from Atmel sample code + * for the SAMV7. The Atmel sample code has two-clause BSD-like license + * which does not require this copyright statement, but here it is anyway: + * + * Copyright (c) 2014, Atmel Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX, Atmel, nor the names of contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* maXTouch Xplained Pro Xplained Pro LCD Connector ************************* + * + * Only the RGB is supported by this BSP (via SMC/EBI). The switch mode + * selector on the back of the maXtouch should be set in the OFF-ON-OFF + * positions to select 16-bit color mode. + * + * ----------------- ------------- ------------------------------------------ + * LCD SAMV71 Description + * Pin Function Pin Function + * ---- ------------ ---- -------- ------------------------------------------ + * 1 ID - - Chip ID communication line + * 2 GND - GND Ground + * 3 D0 PC0 D0 Data line + * 4 D1 PC1 D1 Data line + * 5 D2 PC2 D2 Data line + * 6 D3 PC3 D3 Data line + * 7 GND - GND Ground + * 8 D4 PC4 D4 Data line + * 9 D5 PC5 D5 Data line + * 10 D6 PC6 D6 Data line + * 11 D7 PC7 D7 Data line + * 12 GND - GND Ground + * 13 D8 PE0 D8 Data line + * 14 D9 PE1 D9 Data line + * 15 D10 PE2 D10 Data line + * 16 D11 PE3 D11 Data line + * 17 GND - GND Ground + * 18 D12 PE4 D12 Data line + * 19 D13 PE5 D13 Data line + * 20 D14 PA15 D14 Data line + * 21 D15 PA16 D15 Data line + * 22 GND - GND Ground + * 23 D16 - - Data line + * 24 D17 - - Data line + * 25 N/C - - + * 26 N/C - - + * 27 GND - GND Ground + * 28 N/C - - + * 29 N/C - - + * 30 N/C - - + * 31 N/C - - + * 32 GND - GND Ground + * 33 PCLK/ PC30 GPIO RGB: Pixel clock Display RAM select. + * CMD_DATA_SEL MCU: One address line of the MCU for displays where it + * is possible to select either the register or the + * data interface + * 34 VSYNC/CS PD19 NCS3 RGB: Vertical synchronization. + * MCU: Chip select + * 35 HSYNC/WE PC8 NWE RGB: Horizontal synchronization + * MCU: Write enable signal + * 36 DATA ENABLE/ PC11 NRD RGB: Data enable signal + * RE MCU: Read enable signal + * 37 SPI SCK - - MCU: Clock for SPI + * 38 SPI MOSI - - MCU: Master out slave in line of SPI + * 39 SPI MISO - - MCU: Master in slave out line of SPI + * 40 SPI SS - - MCU: Slave select for SPI + * 41 N/C - - + * 42 TWI SDA PA3 TWD0 I2C data line (maXTouch®) + * 43 TWI SCL PA4 TWCK0 I2C clock line (maXTouch) + * 44 IRQ1 PD28 WKUP5 maXTouch interrupt line + * 45 N/C PA2 WKUP2 + * 46 PWM PC9 TIOB7 Backlight control + * 47 RESET PC13 GPIO Reset for both display and maxTouch + * 48 VCC - - 3.3V power supply for extension board + * 49 VCC - - 3.3V power supply for extension board + * 50 GND - - Ground + * ---- ------------ ---- -------- ------------------------------------------ + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "cache.h" +#include "up_arch.h" +#include "sam_gpio.h" +#include "sam_periphclks.h" +#include "sam_xdmac.h" +#include "chip/sam_pmc.h" +#include "chip/sam_smc.h" +#include "chip/sam_pinmap.h" + +#include "samv71-xult.h" +#include "atmxt-xpro.h" + +#ifdef HAVE_ILI9488_SMC + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* SMC must be selected */ + +#if !defined(CONFIG_SAMV7_SMC) +# error "CONFIG_SAMV7_SMC is required" +#endif + +/* Check contrast selection */ + +#if !defined(CONFIG_LCD_MAXCONTRAST) +# define CONFIG_LCD_MAXCONTRAST 1 +#endif + +/* Check power setting */ + +#if !defined(CONFIG_LCD_MAXPOWER) +# define CONFIG_LCD_MAXPOWER 16 +#endif + +#if CONFIG_LCD_MAXPOWER > 255 +# error "CONFIG_LCD_MAXPOWER must be less than 256 to fit in uint8_t" +#endif + +/* Check orientation */ + +#if defined(CONFIG_LCD_LANDSCAPE) +# if defined(CONFIG_LCD_PORTRAIT) || defined(CONFIG_LCD_RPORTRAIT) || \ + defined(CONFIG_LCD_RLANDSCAPE) +# error "Cannot define both portrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_RLANDSCAPE) +# if defined(CONFIG_LCD_PORTRAIT) || defined(CONFIG_LCD_RPORTRAIT) +# error "Cannot define both rportrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_PORTRAIT) +# ifdef CONFIG_LCD_RPORTRAIT +# error "Cannot define both landscape and any other orientations" +# endif +#elif !defined(CONFIG_LCD_RPORTRAIT) +# define CONFIG_LCD_LANDSCAPE 1 +#endif + +/* Background color */ + +#if !defined(CONFIG_SAMV71XULT_LCD_BGCOLOR) +# define CONFIG_SAMV71XULT_LCD_BGCOLOR 0 +#endif + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +# undef CONFIG_LCD_REGDEBUG +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* Display/Color Properties **************************************************/ +/* Display Resolution */ + +#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) +# define SAM_XRES 480 +# define SAM_YRES 320 +#else +# define SAM_XRES 320 +# define SAM_YRES 480 +#endif + +/* Color depth and format */ + +#define SAM_BPP 16 +#define SAM_COLORFMT FB_FMT_RGB16_565 + +/* Color decoding macros */ + +#define RGB_RED(rgb) RGB16RED(rgb) +#define RGB_GREEN(rgb) RGB16GREEN(rgb) +#define RGB_BLUE(rgb) RGB16BLUE(rgb) +#define RGB_COLOR(r,g,b) RGBTO16(r,g,b) + +/* SAMV7-XULT LCD Hardware Definitions ***************************************/ +/* LCD /CS is NCS3 */ + +#define SAM_LCD_BASE ((uintptr_t)SAM_EXTCS3_BASE) +#define SAM_LCD_CS 3 + +/* Backlight */ + +#define BKL_LEVELS 16 +#define BKL_PULSE_DURATION 24 +#define BKL_ENABLE_DURATION (128*1024) +#define BKL_DISABLE_DURATION (128*1024) + +/* DMA */ + +#define DMA_FLAGS \ + DMACH_FLAG_PERIPHPID(0) | DMACH_FLAG_PERIPHAHB_AHB_IF1 | \ + DMACH_FLAG_PERIPHWIDTH_16BITS | DMACH_FLAG_PERIPHCHUNKSIZE_1 | \ + DMACH_FLAG_MEMPID(0) | DMACH_FLAG_MEMAHB_AHB_IF0 | \ + DMACH_FLAG_MEMWIDTH_16BITS | DMACH_FLAG_MEMINCREMENT | \ + DMACH_FLAG_MEMCHUNKSIZE_1 | DMACH_FLAG_MEMBURST_1 + +/* DMA timeout. The value is not critical; we just don't want the system to + * hang in the event that a DMA does not finish. This is set to + */ + +#define DMA_TIMEOUT_MS (800) +#define DMA_TIMEOUT_TICKS MSEC2TICK(DMA_TIMEOUT_MS) + +/* Buffer Alignment. + * + * If the data cache is enabled the a higher level of alignment is required. That is + * because the data will need to be invalidated and that cache invalidation will occur + * in multiples of full change lines. + */ + +#ifdef CONFIG_ARMV7M_DCACHE +/* Align to the cache line size which we assume is >= 8 */ + +# define LCD_ALIGN ARMV7M_DCACHE_LINESIZE +# define LCD_ALIGN_MASK (LCD_ALIGN-1) +# define LCD_ALIGN_UP(n) (((n) + LCD_ALIGN_MASK) & ~LCD_ALIGN_MASK) + +# define LCD_RUNBUFFER_BYTES LCD_ALIGN_UP(SAM_XRES * sizeof(uint16_t)) +# define LCD_RUNBUFFER_PIXELS (LCD_RUNBUFFER_BYTES / sizeof(uint16_t)) + +#else +/* Align to 2-byte boundaries */ + +# define LCD_ALIGN 2 +# define LCD_ALIGN_MASK 1 +# define LCD_ALIGN_UP(n) (((n) + 1) & ~1) + +# define LCD_RUNBUFFER_BYTES SAM_XRES * sizeof(uint16_t) +# define LCD_RUNBUFFER_PIXELS SAM_XRES +#endif + +/* Debug *********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +#ifdef CONFIG_DEBUG_DMA +# define SAMPLENDX_BEFORE_SETUP 0 +# define SAMPLENDX_AFTER_SETUP 1 +# define SAMPLENDX_DMA_CALLBACK 2 +# define SAMPLENDX_TIMEOUT 3 +# define DEBUG_NDMASAMPLES 4 +#endif + +/**************************************************************************** + * Private Type Definition + ****************************************************************************/ + +/* Type definition for the correct size of one pixel (from the application + * standpoint). + */ + +#ifdef CONFIG_SAMV71XULT_LCD_RGB565 +typedef uint16_t sam_color_t; +#else /* RGB888 or RGB32 (without ALPHA) */ +typedef uint32_t sam_color_t; +#endif + +/* This structure describes the LCD registers */ + +struct lcd_regs_s +{ + volatile uint16_t index; + volatile uint16_t value; +}; + +/* This structure describes the state of this driver */ + +struct sam_dev_s +{ + /* Publicly visible device structure */ + + struct lcd_dev_s dev; + + /* Allocated DMA channel */ + + DMA_HANDLE dmach; + WDOG_ID dmadog; /* For DMA timeout detection */ + volatile int result; /* Result of the DMA transfer */ + sem_t waitsem; /* Used to way for DMA completion */ + volatile bool dmabusy; /* True: DMA is in progress */ + volatile bool cmd; /* True: Command transfer */ + + /* Private LCD-specific information follows */ + + uint8_t power; /* Current power setting */ + bool output; /* True: Configured for output */ +#ifdef CONFIG_DEBUG_DMA + uint8_t smplset; + struct sam_dmaregs_s samples[DEBUG_NDMASAMPLES]; +#endif +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ +/* Low Level LCD access */ + +static int sam_sendcmd(FAR struct sam_dev_s *priv, uint16_t cmd); +static int sam_lcd_put(FAR struct sam_dev_s *priv, uint16_t cmd, + FAR const uint16_t *buffer, unsigned int buflen); +static int sam_lcd_get(FAR struct sam_dev_s *priv, uint8_t cmd, + FAR uint16_t *buffer, unsigned int buflen); +static int sam_lcd_getreg(FAR struct sam_dev_s *priv, uint8_t cmd, + FAR uint8_t *buffer, unsigned int nbytes); +static int sam_setwindow(FAR struct sam_dev_s *priv, sam_color_t row, + sam_color_t col, sam_color_t width, sam_color_t height); + +/* Backlight/power controls */ + +static void sam_disable_backlight(void); +static int sam_set_backlight(unsigned int power); +static int sam_poweroff(FAR struct sam_dev_s *priv); + +/* DMA Helpers */ + +#ifdef CONFIG_DMA_DEBUG +static void sam_lcd_sample(FAR struct sam_dev_s *priv, int index); +static void sam_lcd_sampleinit(FAR struct sam_dev_s *priv); +static void sam_lcd_dumpone(FAR struct sam_dev_s *priv, int index, + FAR const char *msg); +static void sam_lcd_dump(struct sam_dev_s *priv); +#else +# define sam_lcd_sample(priv, index) +# define sam_lcd_sampleinit(priv) +# define sam_lcd_dump(priv) +#endif + +static void sam_lcd_endwait(struct sam_dev_s *priv, int result); +static void sam_lcd_dmatimeout(int argc, uint32_t arg); +static int sam_lcd_dmawait(FAR struct sam_dev_s *priv, uint32_t timeout); +static void sam_lcd_dmacallback(DMA_HANDLE handle, void *arg, int result); +static int sam_lcd_txtransfer(FAR struct sam_dev_s *priv, + FAR const uint16_t *buffer, unsigned int buflen); +static int sam_lcd_rxtransfer(FAR struct sam_dev_s *priv, + FAR const uint16_t *buffer, unsigned int buflen); + +/* LCD Data Transfer Methods */ + +static int sam_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels); +static int sam_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels); + +/* LCD Configuration */ + +static int sam_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo); +static int sam_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo); + +/* LCD RGB Mapping */ + +#ifdef CONFIG_FB_CMAP +# error "RGB color mapping not supported by this driver" +#endif + +/* Cursor Controls */ + +#ifdef CONFIG_FB_HWCURSOR +# error "Cursor control not supported by this driver" +#endif + +/* LCD Specific Controls */ + +static int sam_getpower(FAR struct lcd_dev_s *dev); +static int sam_setpower(FAR struct lcd_dev_s *dev, int power); +static int sam_getcontrast(FAR struct lcd_dev_s *dev); +static int sam_setcontrast(FAR struct lcd_dev_s *dev, unsigned int contrast); + +/* Initialization */ + +static void sam_gpio_initialize(void); +static inline void sam_smc_initialize(void); +static inline int sam_lcd_initialize(void); + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* LCD GPIO configurations */ + +static const uint32_t g_lcdpin[] = +{ + GPIO_SMC_D0, GPIO_SMC_D1, GPIO_SMC_D2, GPIO_SMC_D3, /* D0-D3 */ + GPIO_SMC_D4, GPIO_SMC_D5, GPIO_SMC_D6, GPIO_SMC_D7, /* D4-D7 */ + GPIO_SMC_D8, GPIO_SMC_D9, GPIO_SMC_D10, GPIO_SMC_D11, /* D8-D11 */ + GPIO_SMC_D12, GPIO_SMC_D13, GPIO_SMC_D14, GPIO_SMC_D15, /* D12-15 */ + GPIO_SMC_NWE, GPIO_SMC_NRD, GPIO_SMC_NCS3, /* RD, WR, CS */ + GPIO_ILI9488_CDS, GPIO_ILI9488_RST, GPIO_ILI9488_BKL /* PIO outputs */ +}; +#define LCD_NPINS (sizeof(g_lcdpin) / sizeof(uint32_t)) + +/* This is working memory allocated by the LCD driver for each LCD device + * and for each color plane. This memory will hold one raster line of data. + * The size of the allocated run buffer must therefore be at least + * (bpp * xres / 8). Actual alignment of the buffer must conform to the + * bitwidth of the underlying pixel type. + * + * If there are multiple planes, they may share the same working buffer + * because different planes will not be operate on concurrently. However, + * if there are multiple LCD devices, they must each have unique run buffers. + */ + +static uint16_t g_runbuffer[LCD_RUNBUFFER_BYTES] __attribute__((aligned(LCD_ALIGN))); + +/* This structure describes the overall LCD video controller */ + +static const struct fb_videoinfo_s g_videoinfo = +{ + .fmt = SAM_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */ + .xres = SAM_XRES, /* Horizontal resolution in pixel columns */ + .yres = SAM_YRES, /* Vertical resolution in pixel rows */ + .nplanes = 1, /* Number of color planes supported */ +}; + +/* This is the standard, NuttX Plane information object */ + +static const struct lcd_planeinfo_s g_planeinfo = +{ + .putrun = sam_putrun, /* Put a run into LCD memory */ + .getrun = sam_getrun, /* Get a run from LCD memory */ + .buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ + .bpp = SAM_BPP, /* Bits-per-pixel */ +}; + +/* This is the ILI9488 LCD driver object */ + +static struct sam_dev_s g_lcddev = +{ + /* This is the contained standard, NuttX LCD driver object */ + + .dev = + { + /* LCD Configuration */ + + .getvideoinfo = sam_getvideoinfo, + .getplaneinfo = sam_getplaneinfo, + + /* LCD RGB Mapping -- Not supported */ + /* Cursor Controls -- Not supported */ + + /* LCD Specific Controls */ + + .getpower = sam_getpower, + .setpower = sam_setpower, + .getcontrast = sam_getcontrast, + .setcontrast = sam_setcontrast, + }, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_sendcmd + * + * Description: + * Send an ILI9488 command byte + * + ****************************************************************************/ + +static int sam_sendcmd(FAR struct sam_dev_s *priv, uint16_t cmd) +{ + volatile int i; + int ret; + + /* Set the CDS GPIO output low (command) */ + + sam_gpiowrite(GPIO_ILI9488_CDS, false); + + /* Send the command via TX DMA */ + + ret = sam_lcd_txtransfer(priv, &cmd, sizeof(uint16_t)); + if (ret < 0) + { + lcddbg("ERROR: Failed to send command %02x: %d\n", cmd, ret); + } + + /* Make sure that the CMD/DATA GPIO is reset for commands. I don't understand + * the delay loop... it comes from the SAMV7 sample code and is, apparently, a + * work-around for some issue. + */ + + for (i = 0; i < 15; i++); + + /* Set the CDS OUTPUT to high (data) */ + + sam_gpiowrite(GPIO_ILI9488_CDS, true); + return ret; +} + +/**************************************************************************** + * Name: sam_lcd_put + * + * Description: + * Write to a multi-byte ILI9488 register + * + ****************************************************************************/ + +static int sam_lcd_put(FAR struct sam_dev_s *priv, uint16_t cmd, + FAR const uint16_t *buffer, unsigned int buflen) +{ + int ret; + + /* Send the command */ + + ret = sam_sendcmd(priv, cmd); + if (ret < 0) + { + return ret; + } + + /* If the command was sent successfully, then send any accompanying data */ + + if (buflen > 0) + { + ret = sam_lcd_txtransfer(priv, buffer, buflen); + if (ret < 0) + { + lcddbg("ERROR: Failed to send command %02x data: %d\n", cmd, ret); + } + } + + return ret; +} + +/**************************************************************************** + * Name: sam_lcd_get + * + * Description: + * Send a command and read 16-bit data from the ILI9488 + * + ****************************************************************************/ + +static int sam_lcd_get(FAR struct sam_dev_s *priv, uint8_t cmd, + FAR uint16_t *buffer, unsigned int buflen) +{ + int ret; + + /* Send the command */ + + ret = sam_sendcmd(priv, cmd); + + /* If the command was sent successfully, then receive any accompanying data */ + + if (ret == OK && buflen > 0) + { + ret = sam_lcd_rxtransfer(priv, buffer, buflen); + } + + return ret; +} + +/**************************************************************************** + * Name: sam_lcd_getreg + * + * Description: + * Read from a multi-byte ILI9488 register + * + ****************************************************************************/ + +static int sam_lcd_getreg(FAR struct sam_dev_s *priv, uint8_t cmd, + FAR uint8_t *buffer, unsigned int nbytes) +{ + uint32_t tmp[4]; + int ret; + int i; + + DEBUGASSERT(nbytes <= 4); + + /* Read the request number of byes (as 16-bit values) plus a leading + * dummy read. + */ + + ret = sam_lcd_get(priv, cmd, (FAR uint16_t *)tmp, nbytes << 2); + if (ret == OK) + { + for (i = 0; i < nbytes; i++) + { + buffer[i] = tmp[i] & 0xff; + } + } + + return ret; +} + +/**************************************************************************** + * Name: sam_setwindow + * + * Description: + * Setup drawing window + * + ****************************************************************************/ + +static int sam_setwindow(FAR struct sam_dev_s *priv, sam_color_t row, + sam_color_t col, sam_color_t width, + sam_color_t height) +{ + uint16_t buffer[4]; + int ret; + + lcdvdbg("row=%d col=%d width=%d height=%d\n", row, col, width, height); + + /* Set Column Address Position */ + + buffer[0] = (col >> 8) & 0xff; + buffer[1] = col & 0xff; + buffer[2] = ((col + width - 1) >> 8) & 0xff; + buffer[3] = (col + width - 1) & 0xff; + ret = sam_lcd_put(priv, ILI9488_CMD_COLUMN_ADDRESS_SET, buffer, + 4 * sizeof(uint16_t)); + if (ret < 0) + { + return ret; + } + + ret = sam_sendcmd(priv, ILI9488_CMD_NOP); + if (ret < 0) + { + return ret; + } + + /* Set Page Address Position */ + + buffer[0] = (row >> 8) & 0xff; + buffer[1] = row & 0xff; + buffer[2] = ((row + height - 1) >> 8) & 0xff; + buffer[3] = (row + height - 1) & 0xff; + ret = sam_lcd_put(priv, ILI9488_CMD_PAGE_ADDRESS_SET, buffer, + 4 * sizeof(uint16_t)); + if (ret < 0) + { + return ret; + } + + return sam_sendcmd(priv, ILI9488_CMD_NOP); +} + +/**************************************************************************** + * Name: sam_dumprun + * + * Description: + * Dump the contexts of the run buffer: + * + * run - The buffer in containing the run read to be dumped + * npixels - The number of pixels to dump + * + ****************************************************************************/ + +#if 0 /* Sometimes useful */ +static void sam_dumprun(FAR const char *msg, FAR uint16_t *run, size_t npixels) +{ + int i, j; + + syslog(LOG_DEBUG, "\n%s:\n", msg); + for (i = 0; i < npixels; i += 16) + { + up_putc(' '); + syslog(LOG_DEBUG, " "); + for (j = 0; j < 16; j++) + { + syslog(LOG_DEBUG, " %04x", *run++); + } + + up_putc('\n'); + } +} +#endif + +/**************************************************************************** + * Name: sam_disable_backlight + * + * Description: + * Turn the backlight off. + * + ****************************************************************************/ + +static void sam_disable_backlight(void) +{ + /* PWM support is not yet available. Backlight is currently just configured as a + * GPIO output. + */ +#warning Missing logic + + sam_gpiowrite(GPIO_ILI9488_BKL, false); +} + +/**************************************************************************** + * Name: sam_set_backlight + * + * Description: + * The the backlight to the level associated with the specified power value. + * + ****************************************************************************/ + +static int sam_set_backlight(unsigned int power) +{ + lcdvdbg("power=%d\n", power); + + /* PWM support is not yet available. Backlight is currently just + * configured as a GPIO output. + */ +#warning Missing logic + + if (power > 0) + { + sam_gpiowrite(GPIO_ILI9488_BKL, true); + } + else + { + sam_gpiowrite(GPIO_ILI9488_BKL, false); + } + + return OK; +} + +/**************************************************************************** + * Name: sam_poweroff + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: + * full on). On backlit LCDs, this setting may correspond to the backlight + * setting. + * + ****************************************************************************/ + +static int sam_poweroff(FAR struct sam_dev_s *priv) +{ + int ret; + + lcdvdbg("OFF\n"); + + /* Turn the display off */ + + ret = sam_lcd_put(priv, ILI9488_CMD_DISPLAY_OFF, NULL, 0); + + /* Disable the backlight */ + + sam_disable_backlight(); + + /* Remember the power off state */ + + priv->power = 0; + return ret; +} + +/**************************************************************************** + * Name: sam_lcd_sample + * + * Description: + * Sample HSMCI/DMA registers + * + ****************************************************************************/ + +#ifdef CONFIG_DMA_DEBUG +static void sam_lcd_sample(struct sam_dev_s *priv, int index) +{ + /* On a multiple block transfer, only sample on the first block */ + + if ((priv->smplset & (1 << index)) == 0) + { + sam_dmasample(priv->dmach, &priv->samples[index]); + priv->smplset |= (1 << index); + } +} +#endif + +/**************************************************************************** + * Name: sam_lcd_sampleinit + * + * Description: + * Setup prior to collecting DMA samples + * + ****************************************************************************/ + +#ifdef CONFIG_DMA_DEBUG +static void sam_lcd_sampleinit(struct sam_dev_s *priv) +{ + priv->smplset = 0; + memset(priv->samples, 0xff, DEBUG_NDMASAMPLES * sizeof(struct sam_dmaregs_s)); +} +#endif + +/**************************************************************************** + * Name: sam_lcd_dumpone + * + * Description: + * Dump one transfer register sample + * + ****************************************************************************/ + +#ifdef CONFIG_DMA_DEBUG +static void sam_lcd_dumpone(struct sam_dev_s *priv, int index, + const char *msg) +{ + if ((priv->smplset & (1 << index)) != 0) + { + sam_dmadump(priv->dmach, &priv->samples[index], msg); + } + else + { + fdbg("%s: Not collected\n", msg); + } +} +#endif + +/**************************************************************************** + * Name: sam_lcd_dump + * + * Description: + * Dump all transfer-related, sampled register data + * + ****************************************************************************/ + +#ifdef CONFIG_DMA_DEBUG +static void sam_lcd_dump(struct sam_dev_s *priv) +{ + sam_lcd_dumpone(priv, SAMPLENDX_BEFORE_SETUP, "Before setup"); + sam_lcd_dumpone(priv, SAMPLENDX_AFTER_SETUP, "After setup"); + sam_lcd_dumpone(priv, SAMPLENDX_END_TRANSFER, "End of transfer"); + sam_lcd_dumpone(priv, SAMPLENDX_DMA_CALLBACK, "DMA Callback"); + sam_lcd_dumpone(priv, SAMPLENDX_TIMEOUT, "Timeout"); + priv->smplset = 0; +} +#endif + +/**************************************************************************** + * Name: sam_lcd_endwait + * + * Description: + * Wake up a waiting thread if the waited-for event has occurred. + * + * Input Parameters: + * priv - An instance of the HSMCI device interface + * wkupevent - The event that caused the wait to end + * + * Returned Value: + * None + * + * Assumptions: + * Always called from the interrupt level with interrupts disabled. + * + ****************************************************************************/ + +static void sam_lcd_endwait(struct sam_dev_s *priv, int result) +{ + /* Save the result and cancel the watchdog timeout */ + + (void)wd_cancel(priv->dmadog); + priv->result = result; + + /* Wake up the waiting thread */ + + sem_post(&priv->waitsem); +} + +/**************************************************************************** + * Name: sam_lcd_dmatimeout + * + * Description: + * The watchdog timeout setup when the DMA was startd. Indicates a DMA + * timeout failure. + * + * Input Parameters: + * argc - The number of arguments (should be 1) + * arg - The argument (state structure reference cast to uint32_t) + * + * Returned Value: + * None + * + * Assumptions: + * Always called from the interrupt level with interrupts disabled. + * + ****************************************************************************/ + +static void sam_lcd_dmatimeout(int argc, uint32_t arg) +{ + struct sam_dev_s *priv = (struct sam_dev_s *)arg; + + DEBUGASSERT(argc == 1 && priv != NULL); + sam_lcd_sample((struct sam_dev_s *)arg, SAMPLENDX_TIMEOUT); + + /* Make sure that any hung DMA is stopped. dmabusy == false is the cue + * so the DMA callback is ignored. + */ + + priv->dmabusy = false; + sam_dmastop(priv->dmach); + + /* The wake up the waiting client a timeout error */ + + sam_lcd_endwait(priv, -ETIMEDOUT); +} + +/**************************************************************************** + * Name: sam_lcd_dmawait + * + * Description: + * Wait for one either (1) the DMA to complete, or (2) a DMA timeout to + * occur. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * timeout - Maximum time in milliseconds to wait. Zero means immediate + * timeout with no wait. + * + * Returned Value: + * The result of the DMA transfer + * + ****************************************************************************/ + +static int sam_lcd_dmawait(FAR struct sam_dev_s *priv, uint32_t timeout) +{ + int ret; + + /* Started ... setup the timeout */ + + ret = wd_start(priv->dmadog, timeout, (wdentry_t)sam_lcd_dmatimeout, + 1, (uint32_t)priv); + if (ret < 0) + { + lcddbg("ERROR: wd_start failed: %d\n", errno); + } + + /* Loop until the event (or the timeout occurs). */ + + while (priv->result == -EBUSY) + { + /* Wait for an event in event set to occur. If this the event has + * already occurred, then the semaphore will already have been + * incremented and there will be no wait. + */ + + ret = sem_wait(&priv->waitsem); + + /* The only expected failure is EINTR */ + + DEBUGASSERT(ret == OK || errno == EINTR); + } + + /* Dump the collect DMA sample data */ + + sam_lcd_dump(priv); + return priv->result; +} + +/**************************************************************************** + * Name: sam_lcd_dmacallback + * + * Description: + * Called when HSMCI DMA completes + * + ****************************************************************************/ + +static void sam_lcd_dmacallback(DMA_HANDLE handle, void *arg, int result) +{ + struct sam_dev_s *priv = (struct sam_dev_s *)arg; + + /* Is DMA still active? We can get this callback when sam_dmastop() is + * called too. + */ + + if (priv->dmabusy) + { + /* Sample DMA registers */ + + priv->dmabusy = false; + sam_lcd_sample((struct sam_dev_s *)arg, SAMPLENDX_DMA_CALLBACK); + + /* Wake-up the waiting client */ + + sam_lcd_endwait(priv, result); + } +} + +/**************************************************************************** + * Name: sam_lcd_txtransfer + * + * Description: + * Perform a TX DMA transfer (memory-to-LCD) + * + ****************************************************************************/ + +static int sam_lcd_txtransfer(FAR struct sam_dev_s *priv, + FAR const uint16_t *buffer, unsigned int buflen) +{ + irqstate_t flags; + int ret; + + priv->dmabusy = true; + priv->result = -EBUSY; + + /* Set up to transfer to the LCD */ + + ret = sam_dmatxsetup(priv->dmach, (uint32_t)SAM_LCD_BASE, (uint32_t)buffer, buflen); + if (ret == OK) + { + flags = enter_critical_section(); + + /* The setup was successful, start the DMA */ + + ret = sam_dmastart(priv->dmach, sam_lcd_dmacallback, priv); + if (ret == OK) + { + /* Started ... Wait for the DMA (or timeout) to complete */ + + ret = sam_lcd_dmawait(priv, DMA_TIMEOUT_TICKS); + } + + leave_critical_section(flags); + } + + priv->dmabusy = false; + return ret; +} + +/**************************************************************************** + * Name: sam_lcd_rxtransfer + * + * Description: + * Perform a RX DMA transfer (LCD-to-memory) + * + ****************************************************************************/ + +static int sam_lcd_rxtransfer(FAR struct sam_dev_s *priv, + FAR const uint16_t *buffer, unsigned int buflen) +{ + irqstate_t flags; + int ret; + + priv->dmabusy = true; + priv->result = -EBUSY; + + /* Set up to transfer to the LCD */ + + ret = sam_dmarxsetup(priv->dmach, (uint32_t)SAM_LCD_BASE, (uint32_t)buffer, buflen); + if (ret == OK) + { + flags = enter_critical_section(); + + /* The setup was successful, start the DMA */ + + ret = sam_dmastart(priv->dmach, sam_lcd_dmacallback, priv); + if (ret == OK) + { + /* Started ... Wait for the DMA (or timeout) to complete */ + + ret = sam_lcd_dmawait(priv, DMA_TIMEOUT_TICKS); + } + + leave_critical_section(flags); + } + + priv->dmabusy = false; + return ret; +} + +/**************************************************************************** + * Name: sam_putrun + * + * Description: + * This method can be used to write a partial raster line to the LCD: + * + * row - Starting row to write to (range: 0 <= row < yres) + * col - Starting column to write to (range: 0 <= col <= xres-npixels) + * buffer - The buffer containing the run to be written to the LCD + * npixels - The number of pixels to write to the LCD + * (range: 0 < npixels <= xres-col) + * + ****************************************************************************/ + +static int sam_putrun(fb_coord_t row, fb_coord_t col, + FAR const uint8_t *buffer, size_t npixels) +{ + FAR struct sam_dev_s *priv = &g_lcddev; + int ret; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + /* Determine the refresh window area */ + + ret = sam_setwindow(priv, row, col, npixels, 1); + if (ret < 0) + { + lcddbg("ERROR: sam_setwindow failed: %d\n", ret); + return ret; + } + + /* Write the run into the LCD */ + + return sam_lcd_put(priv, ILI9488_CMD_MEMORY_WRITE, + (FAR const uint16_t *)buffer, + npixels * sizeof(uint16_t)); +} + +/**************************************************************************** + * Name: sam_getrun + * + * Description: + * This method can be used to read a partial raster line from the LCD: + * + * row - Starting row to read from (range: 0 <= row < yres) + * col - Starting column to read read (range: 0 <= col <= xres-npixels) + * buffer - The buffer in which to return the run read from the LCD + * npixels - The number of pixels to read from the LCD + * (range: 0 < npixels <= xres-col) + * + ****************************************************************************/ + +static int sam_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels) +{ + FAR struct sam_dev_s *priv = &g_lcddev; + int ret; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + /* Determine the refresh window area */ + + ret = sam_setwindow(priv, row, col, npixels, 1); + if (ret < 0) + { + lcddbg("ERROR: sam_setwindow failed: %d\n", ret); + return ret; + } + + /* Write the run into the LCD */ + + return sam_lcd_get(priv, ILI9488_CMD_MEMORY_READ, (FAR uint16_t *)buffer, + npixels * sizeof(uint16_t)); +} + +/**************************************************************************** + * Name: sam_getvideoinfo + * + * Description: + * Get information about the LCD video controller configuration. + * + ****************************************************************************/ + +static int sam_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo) +{ + DEBUGASSERT(dev && vinfo); + lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n", + g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, + g_videoinfo.nplanes); + + memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s)); + return OK; +} + +/**************************************************************************** + * Name: sam_getplaneinfo + * + * Description: + * Get information about the configuration of each LCD color plane. + * + ****************************************************************************/ + +static int sam_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo) +{ + DEBUGASSERT(dev && pinfo && planeno == 0); + lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp); + memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s)); + return OK; +} + +/**************************************************************************** + * Name: sam_getpower + * + * Description: + * Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full + * on). On backlit LCDs, this setting may correspond to the backlight + * setting. + * + ****************************************************************************/ + +static int sam_getpower(struct lcd_dev_s *dev) +{ + FAR struct sam_dev_s *priv = (FAR struct sam_dev_s *)dev; + + lcdvdbg("power: %d\n", 0); + return priv->power; +} + +/**************************************************************************** + * Name: sam_setpower + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full + * on). On backlit LCDs, this setting may correspond to the backlight + * setting. + * + ****************************************************************************/ + +static int sam_setpower(struct lcd_dev_s *dev, int power) +{ + FAR struct sam_dev_s *priv = (FAR struct sam_dev_s *)dev; + int ret; + + lcdvdbg("power: %d\n", power); + DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER); + + /* Set new power level */ + + if (power > 0) + { + /* If the display was off, then turn the display on */ + + if (priv->power == 0) + { + ret = sam_sendcmd(priv, ILI9488_CMD_PIXEL_OFF); + if (ret < 0) + { + return ret; + } + + ret = sam_sendcmd(priv, ILI9488_CMD_DISPLAY_ON); + if (ret < 0) + { + return ret; + } + + ret = sam_sendcmd(priv, ILI9488_CMD_NORMAL_DISP_MODE_ON); + if (ret < 0) + { + return ret; + } + } + + /* Set the backlight level */ + + ret = sam_set_backlight((unsigned int)power); + up_mdelay(50); + + /* Remember the power setting */ + + priv->power = power; + } + else + { + /* Turn the display off */ + + ret = sam_poweroff(priv); + } + + return ret; +} + +/**************************************************************************** + * Name: sam_getcontrast + * + * Description: + * Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST). + * + ****************************************************************************/ + +static int sam_getcontrast(struct lcd_dev_s *dev) +{ + lcdvdbg("Not implemented\n"); + return -ENOSYS; +} + +/**************************************************************************** + * Name: sam_setcontrast + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + ****************************************************************************/ + +static int sam_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) +{ + lcdvdbg("contrast: %d\n", contrast); + return -ENOSYS; +} + +/**************************************************************************** + * Name: sam_gpio_initialize + * + * Description: + * Configure LCD GPIO pins + * + ****************************************************************************/ + +static inline void sam_gpio_initialize(void) +{ + int i; + + /* Configure all LCD pins pins (backlight is initially off) */ + + for (i = 0; i < LCD_NPINS; i++) + { + sam_configgpio(g_lcdpin[i]); + } + + /* Backlight off */ + + sam_gpiowrite(GPIO_ILI9488_BKL, true); +} + +/**************************************************************************** + * Name: sam_smc_initialize + * + * Description: + * Configure LCD SMC interface + * + ****************************************************************************/ + +static inline void sam_smc_initialize(void) +{ + uintptr_t smcbase = SAM_SMCCS_BASE(SAM_LCD_CS); + uint32_t regval; + + /* Enable the SMC peripheral clock */ + + sam_smc_enableclk(); + + /* Configure SMC interface for the LCD on NCS3 */ + + regval = SMCCS_SETUP_NWESETUP(2) | SMCCS_SETUP_NCSWRSETUP(0) | + SMCCS_SETUP_NRDSETUP(0) | SMCCS_SETUP_NCSRDSETUP(0); + putreg32(regval, smcbase + SAM_SMCCS_SETUP_OFFSET); + + regval = SMCCS_PULSE_NWEPULSE(6) | SMCCS_PULSE_NCSWRPULSE(10) | + SMCCS_PULSE_NRDPULSE(10) | SMCCS_PULSE_NCSRDPULSE(10); + putreg32(regval, smcbase + SAM_SMCCS_PULSE_OFFSET); + + regval = SMCCS_CYCLE_NWECYCLE(10) | SMCCS_CYCLE_NRDCYCLE(10); + putreg32(regval, smcbase + SAM_SMCCS_CYCLE_OFFSET); + + regval = SMCCS_MODE_READMODE | SMCCS_MODE_WRITEMODE | SMCCS_EXNWMODE_DISABLED | + SMCCS_MODE_DBW_16BIT | SMCCS_MODE_TDFCYCLES(15); + putreg32(regval, smcbase + SAM_SMCCS_MODE_OFFSET); +} + +/**************************************************************************** + * Name: sam_lcd_initialize + * + * Description: + * Initialize the LCD panel + * + ****************************************************************************/ + +static inline int sam_lcd_initialize(void) +{ + FAR struct sam_dev_s *priv = &g_lcddev; + uint8_t buffer[4] = {0, 0, 0, 0}; + uint16_t id; + uint16_t param; + int ret; + + /* Reset the LCD and bring it out of sleep mode */ + + ret = sam_lcd_put(priv, ILI9488_CMD_SOFTWARE_RESET, ¶m, 0); + if (ret < 0) + { + return ret; + } + + up_mdelay(200); + + sam_lcd_put(priv, ILI9488_CMD_SLEEP_OUT, ¶m, 0); + if (ret < 0) + { + return ret; + } + + up_mdelay(200); + + /* Configure for tRGB and reverse the column order */ + + param = 0x48; + ret = sam_lcd_put(priv, ILI9488_CMD_MEMORY_ACCESS_CONTROL, ¶m, + sizeof(uint16_t)); + if (ret < 0) + { + return ret; + } + + up_mdelay(100); + + param = 0x04; + ret = sam_lcd_put(priv, ILI9488_CMD_CABC_CONTROL_9, ¶m, + sizeof(uint16_t)); + if (ret < 0) + { + return ret; + } + + /* Check the LCD ID */ + + ret = sam_lcd_getreg(priv, ILI9488_CMD_READ_ID4, buffer, 4); + if (ret < 0) + { + return ret; + } + + id = ((uint16_t)buffer[2] << 8) | ((uint16_t)buffer[3] & 0xff); + lcdvdbg("ID: %04x\n", id); + + if (id != ILI9488_DEVICE_CODE) + { + lcddbg("ERROR: Unsupported LCD ID: %04x (vs. %04x)\n", + id, ILI9488_DEVICE_CODE); + return -ENODEV; + } + + /* Set the RGB565 format */ + + param = 5; + ret = sam_lcd_put(priv, ILI9488_CMD_COLMOD_PIXEL_FORMAT_SET, ¶m, + sizeof(uint16_t)); + if (ret < 0) + { + return ret; + } + + ret = sam_lcd_put(priv, ILI9488_CMD_NORMAL_DISP_MODE_ON, ¶m, 0); + if (ret < 0) + { + return ret; + } + + ret = sam_lcd_put(priv, ILI9488_CMD_DISPLAY_ON, ¶m, 0); + if (ret < 0) + { + return ret; + } + + /* Landscape/portrait mode */ + +#if defined(CONFIG_LCD_LANDSCAPE) + param = 0xe8; +#elif defined(CONFIG_LCD_PORTRAIT) + param = 0x48; +#else +# error Unsupported LCD orientation +#endif + + ret = sam_lcd_put(priv, ILI9488_CMD_MEMORY_ACCESS_CONTROL, ¶m, + sizeof(uint16_t)); + if (ret < 0) + { + return ret; + } + + /* Disable the backlight */ + + sam_disable_backlight(); + + /* Reset the refresh window area */ + + return sam_setwindow(priv, 0, 0, SAM_XRES, SAM_YRES); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is + * fully initialized, display memory cleared, and the LCD ready to use, + * but with the power setting at 0 (full off). + * + ****************************************************************************/ + +int board_lcd_initialize(void) +{ + FAR struct sam_dev_s *priv = &g_lcddev; + int ret; + + lcdvdbg("Initializing\n"); + + /* Configure all LCD pins pins (backlight is initially off) */ + + sam_gpio_initialize(); + + /* Configure SMC interface for the LCD */ + + sam_smc_initialize(); + + /* Initialize the LCD state structure */ + + sem_init(&priv->waitsem, 0, 0); + + /* Allocate a DMA channel */ + + priv->dmach = sam_dmachannel(0, DMA_FLAGS); + if (!priv->dmach) + { + lcddbg("ERROR: Failed to allocate a DMA channel\n"); + ret = -EAGAIN; + goto errout_with_waitsem; + } + + /* Allocate a watchdog timer to catch DMA timeouts */ + + priv->dmadog = wd_create(); + if (!priv->dmadog) + { + lcddbg("ERROR: Failed to allocate a timer\n"); + ret = -EAGAIN; + goto errout_with_dmach; + } + + /* Identify and configure the LCD */ + + up_mdelay(50); + ret = sam_lcd_initialize(); + if (ret < 0) + { + lcddbg("ERROR: sam_lcd_initialize failed: %d\n", ret); + goto errout_with_dmadog; + } + + /* Clear the display (setting it to the color 0=black) */ + + sam_lcdclear(CONFIG_SAMV71XULT_LCD_BGCOLOR); + + /* Turn the display off */ + + ret = sam_poweroff(priv); + if (ret < 0) + { + lcddbg("ERROR: sam_poweroff failed: %d\n", ret); + goto errout_with_dmadog; + } + + return OK; + +errout_with_dmadog: + wd_delete(priv->dmadog); + priv->dmadog = NULL; + +errout_with_dmach: + sam_dmafree(priv->dmach); + priv->dmach = NULL; + +errout_with_waitsem: + sem_destroy(&priv->waitsem); + return ret; +} + +/**************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This + * allows support for multiple LCD devices. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return &g_lcddev.dev; +} + +/**************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Uninitialize the LCD support + * + ****************************************************************************/ + +void board_lcd_uninitialize(void) +{ + FAR struct sam_dev_s *priv = &g_lcddev; + + /* Free the DMA channel */ + + if (priv->dmach) + { + sam_dmafree(priv->dmach); + priv->dmach = NULL; + } + + /* Free other resources */ + + wd_delete(priv->dmadog); + priv->dmadog = NULL; + + sem_destroy(&priv->waitsem); + + /* Put the LCD in the lowest possible power state */ + + sam_poweroff(priv); +} + +/**************************************************************************** + * Name: sam_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the SAMV7-XULT board. + * Because of the various rotations, clearing the display in the normal + * way by writing a sequences of runs that covers the entire display can + * be very slow. + * + ****************************************************************************/ + +void sam_lcdclear(uint16_t color) +{ + FAR struct sam_dev_s *priv = &g_lcddev; + unsigned int row; + unsigned int col; + int ret; + + /* Create a full width run of the requested color */ + + for (col = 0; col < SAM_XRES; col++) + { + g_runbuffer[col] = color; + } + + /* Then write the run into the LCD for each line */ + + ret = sam_setwindow(priv, 0, 0, SAM_XRES, SAM_YRES); + if (ret < 0) + { + lcddbg("ERROR: sam_setwindow failed: %d\n", ret); + return; + } + + for (row = 0; row < SAM_YRES; row++) + { + ret = sam_putrun(row, 0, (FAR const uint8_t *)g_runbuffer, SAM_XRES); + if (ret < 0) + { + lcddbg("ERROR: sam_putrun failed on row %d: %d\n", row, ret); + return; + } + } +} + +#endif /* HAVE_ILI9488_SMC */ diff --git a/configs/samv71-xult/src/sam_maxtouch.c b/configs/samv71-xult/src/sam_maxtouch.c new file mode 100644 index 0000000000000000000000000000000000000000..e9512e98d31292fb9fc6389856bc323991ab09c9 --- /dev/null +++ b/configs/samv71-xult/src/sam_maxtouch.c @@ -0,0 +1,315 @@ +/************************************************************************************ + * configs/samv7-xult/src/sam_maxtouch.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "up_arch.h" +#include "sam_gpio.h" +#include "sam_twihs.h" + +#include "samv71-xult.h" +#include "atmxt-xpro.h" + +#ifdef HAVE_MAXTOUCH + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_SAMV71XULT_MXT_I2CFREQUENCY +# define CONFIG_SAMV71XULT_MXT_I2CFREQUENCY 500000 +#endif + +#ifndef CONFIG_SAMV71XULT_MXT_DEVMINOR +# define CONFIG_SAMV71XULT_MXT_DEVMINOR 0 +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct sama5d4ek_tscinfo_s +{ + /* Standard maXTouch interface */ + + struct mxt_lower_s lower; + + /* Extensions for the sama5d4ek board */ + + mxt_handler_t handler; + FAR void *arg; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/PIO access callbacks. These operations all hidden behind + * callbacks to isolate the maXTouch driver from differences in PIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the maXTouch interrupt handler to the PIO interrupt + * enable - Enable or disable the PIO interrupt + * clear - Acknowledge/clear any pending PIO interrupt + */ + +static int mxt_attach(FAR const struct mxt_lower_s *lower, mxt_handler_t isr, + FAR void *arg); +static void mxt_enable(FAR const struct mxt_lower_s *lower, bool enable); +static void mxt_clear(FAR const struct mxt_lower_s *lower); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the maXTouch + * driver. This structure provides information about the configuration + * of the maXTouch and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. + */ + +static struct sama5d4ek_tscinfo_s g_mxtinfo = +{ + .lower = + { + .address = MXT_I2C_ADDRESS, + .frequency = CONFIG_SAMV71XULT_MXT_I2CFREQUENCY, +#ifdef CONFIG_SAMV71XULT_MXT_SWAPXY + .swapxy = true; +#endif + + .attach = mxt_attach, + .enable = mxt_enable, + .clear = mxt_clear, + }, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * IRQ/PIO access callbacks. These operations all hidden behind + * callbacks to isolate the maXTouch driver from differences in PIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the maXTouch interrupt handler to the PIO interrupt + * enable - Enable or disable the PIO interrupt + * clear - Acknowledge/clear any pending PIO interrupt + * + ****************************************************************************/ + +static int mxt_attach(FAR const struct mxt_lower_s *lower, mxt_handler_t isr, + FAR void *arg) +{ + if (isr) + { + /* Just save the address of the handler and its argument for now. The + * new handler will called via mxt_interrupt() when the interrupt occurs. + */ + + ivdbg("Attaching %p\n", isr); + g_mxtinfo.handler = isr; + g_mxtinfo.arg = arg; + } + else + { + ivdbg("Detaching %p\n", g_mxtinfo.handler); + mxt_enable(lower, false); + g_mxtinfo.handler = NULL; + g_mxtinfo.arg = NULL; + } + + return OK; +} + +static void mxt_enable(FAR const struct mxt_lower_s *lower, bool enable) +{ + /* Enable or disable interrupts */ + + if (enable && g_mxtinfo.handler) + { + sam_gpioirqenable(IRQ_MXT_CHG); + } + else + { + sam_gpioirqdisable(IRQ_MXT_CHG); + } +} + +static void mxt_clear(FAR const struct mxt_lower_s *lower) +{ + /* Does nothing */ +} + +static int mxt_interrupt(int irq, FAR void *context) +{ + /* Just forward the interrupt to the maXTouch driver */ + + if (g_mxtinfo.handler) + { + return g_mxtinfo.handler(&g_mxtinfo.lower, g_mxtinfo.arg); + } + + /* We got an interrupt with no handler. This should not + * happen. + */ + + sam_gpioirqdisable(IRQ_MXT_CHG); + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * configure the touchscreen device. This function will register the driver + * as /dev/inputN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ + FAR struct i2c_master_s *i2c; + static bool initialized = false; + int ret; + + idbg("minor %d\n", minor); + DEBUGASSERT(minor == 0); + + /* Have we already initialized? Since we never uninitialize we must prevent + * multiple initializations. This is necessary, for example, when the + * touchscreen example is used as a built-in application in NSH and can be + * called numerous time. It will attempt to initialize each time. + */ + + if (!initialized) + { + /* Configure the maXTouch CHG interrupt pin */ + + (void)sam_configgpio(GPIO_MXT_CHG); + + /* Get an instance of the I2C interface for the touchscreen chip select */ + + i2c = sam_i2cbus_initialize(MXT_TWI_BUS); + if (!i2c) + { + idbg("Failed to initialize I2C%d\n", MXT_TWI_BUS); + return -ENODEV; + } + + /* Configure maXTouch CHG interrupts */ + + sam_gpioirq(GPIO_MXT_CHG); + (void)irq_attach(IRQ_MXT_CHG, mxt_interrupt); + + /* Initialize and register the I2C touchscreen device */ + + ret = mxt_register(i2c, &g_mxtinfo.lower, CONFIG_SAMV71XULT_MXT_DEVMINOR); + if (ret < 0) + { + idbg("ERROR: Failed to register touchscreen device\n"); + irq_detach(IRQ_MXT_CHG); + /* sam_i2cbus_uninitialize(i2c); */ + return -ENODEV; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* No support for un-initializing the touchscreen maXTouch device. It will + * continue to run and process touch interrupts in the background. + */ +} + +#endif /* HAVE_MAXTOUCH */ diff --git a/configs/samv71-xult/src/sam_mcan.c b/configs/samv71-xult/src/sam_mcan.c new file mode 100644 index 0000000000000000000000000000000000000000..dd4e8e7c3a609257ea8373d8a97619681f9840af --- /dev/null +++ b/configs/samv71-xult/src/sam_mcan.c @@ -0,0 +1,134 @@ +/************************************************************************************ + * configs/samv71-xultk/src/sam_mcan.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sam_mcan.h" +#include "samv71-xult.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_SAMV7_MCAN0) || defined(CONFIG_SAMV7_MCAN1)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#if defined(CONFIG_SAMV7_MCAN0) && defined(CONFIG_SAMV7_MCAN1) +# warning "Both MCAN0 and MCAN1 are enabled. Assuming only CAN1." +# undef CONFIG_SAMV7_MCAN0 +#endif + +#ifdef CONFIG_SAMV7_MCAN0 +# define CAN_PORT 0 +#else +# define CAN_PORT 1 +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = sam_mcan_initialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && (CONFIG_SAMV7_MCAN0 || CONFIG_SAMV7_MCAN1) */ diff --git a/configs/samv71-xult/src/sam_sdram.c b/configs/samv71-xult/src/sam_sdram.c new file mode 100644 index 0000000000000000000000000000000000000000..b43a306f88bb6f45f28ca982d637193495c6108d --- /dev/null +++ b/configs/samv71-xult/src/sam_sdram.c @@ -0,0 +1,314 @@ +/**************************************************************************** + * configs/samv71-xult/src/sam_sdram.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Most of this file derives from Atmel sample code for the SAMV71-XULT + * board. That sample code has licensing that is compatible with the NuttX + * modified BSD license: + * + * Copyright (c) 2012, Atmel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor Atmel nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" + +#include "sam_periphclks.h" +#include "chip/sam_memorymap.h" +#include "chip/sam_pinmap.h" +#include "chip/sam_pmc.h" +#include "chip/sam_matrix.h" +#include "chip/sam_sdramc.h" + +#include "samv71-xult.h" + +#ifdef CONFIG_SAMV7_SDRAMC + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define SDRAM_BA0 (1 << 20) +#define SDRAM_BA1 (1 << 21) + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_sdram_config + * + * Description: + * Configures the on-board SDRAM. SAMV71 Xplained Ultra features one + * external IS42S16100E-7BLI, 512Kx16x2, 10ns, SDRAM. SDRAM0 is connected + * to chip select NCS1. + * + * Input Parameters: + * None + * + * Assumptions: + * This test runs early in initialization before I- and D-caches are + * enabled. + * + * NOTE: Since the delay loop is calibrate with caches in enabled, the + * calls to up_udelay() are wrong ty orders of magnitude. + * + ****************************************************************************/ + +void sam_sdram_config(void) +{ + volatile uint8_t *psdram = (uint8_t *)SAM_SDRAMCS_BASE; + uint32_t regval; + int i; + + /* Configure SDRAM pins */ + + sam_configgpio(GPIO_SMC_D0); + sam_configgpio(GPIO_SMC_D1); + sam_configgpio(GPIO_SMC_D2); + sam_configgpio(GPIO_SMC_D3); + sam_configgpio(GPIO_SMC_D4); + sam_configgpio(GPIO_SMC_D5); + sam_configgpio(GPIO_SMC_D6); + sam_configgpio(GPIO_SMC_D7); + sam_configgpio(GPIO_SMC_D8); + sam_configgpio(GPIO_SMC_D9); + sam_configgpio(GPIO_SMC_D10); + sam_configgpio(GPIO_SMC_D11); + sam_configgpio(GPIO_SMC_D12); + sam_configgpio(GPIO_SMC_D13); + sam_configgpio(GPIO_SMC_D14); + sam_configgpio(GPIO_SMC_D15); + + /* SAMV71 SDRAM + * --------------- ----------- + * PC20 A2 A0 + * PC21 A3 A1 + * PC22 A4 A2 + * PC23 A5 A3 + * PC24 A6 A4 + * PC25 A7 A5 + * PC26 A8 A6 + * PC27 A9 A7 + * PC28 A10 A8 + * PC29 A11 A9 + * PD13 SDA10 A10 + * PA20 BA0 A11 + * PD17 CAS nCAS + * PD14 SDCKE CKE + * PD23 SDCK CLK + * PC15 SDCS nCS + * PC18 A0/NBS0 LDQM + * PD16 RAS nRAS + * PD15 NWR1/NBS1 UDQM + * PD29 SDWE nWE + */ + + sam_configgpio(GPIO_SMC_A2); /* PC20 A2 -> A0 */ + sam_configgpio(GPIO_SMC_A3); /* PC21 A3 -> A1 */ + sam_configgpio(GPIO_SMC_A4); /* PC22 A4 -> A2 */ + sam_configgpio(GPIO_SMC_A5); /* PC23 A5 -> A3 */ + sam_configgpio(GPIO_SMC_A6); /* PC24 A6 -> A4 */ + sam_configgpio(GPIO_SMC_A7); /* PC25 A7 -> A5 */ + sam_configgpio(GPIO_SMC_A8); /* PC26 A8 -> A6 */ + sam_configgpio(GPIO_SMC_A9); /* PC27 A9 -> A7 */ + sam_configgpio(GPIO_SMC_A10); /* PC28 A10 -> A8 */ + sam_configgpio(GPIO_SMC_A11); /* PC29 A11 -> A9 */ + sam_configgpio(GPIO_SDRAMC_A10_2); /* PD13 SDA10 -> A10 */ + sam_configgpio(GPIO_SDRAMC_BA0); /* PA20 BA0 -> A11 */ + + sam_configgpio(GPIO_SDRAMC_CKE); /* PD14 SDCKE -> CKE */ + sam_configgpio(GPIO_SDRAMC_CK); /* PD23 SDCK -> CLK */ + sam_configgpio(GPIO_SDRAMC_CS_1); /* PC15 SDCS -> nCS */ + sam_configgpio(GPIO_SDRAMC_RAS); /* PD16 RAS -> nRAS */ + sam_configgpio(GPIO_SDRAMC_CAS); /* PD17 CAS -> nCAS */ + sam_configgpio(GPIO_SDRAMC_WE); /* PD29 SDWE -> nWE */ + sam_configgpio(GPIO_SMC_NBS0); /* PC18 A0/NBS0 -> LDQM */ + sam_configgpio(GPIO_SMC_NBS1); /* PD15 NWR1/NBS1 -> UDQM */ + + /* Enable the SDRAMC peripheral */ + + sam_sdramc_enableclk(); + + regval = getreg32(SAM_MATRIX_CCFG_SMCNFCS); + regval |= MATRIX_CCFG_SMCNFCS_SDRAMEN; + putreg32(regval, SAM_MATRIX_CCFG_SMCNFCS); + + /* 1. SDRAM features must be set in the configuration register: + * asynchronous timings (TRC, TRAS, etc.), number of columns, rows, CAS + * latency, and the data bus width. + * + * SDRAMC_CR_NC_COL8 8 column bits + * SDRAMC_CR_NR_ROW11 1 row bits + * SDRAMC_CR_NB_BANK2 2 banks + * SDRAMC_CR_CAS_LATENCY3 3 cycle CAS latency + * SDRAMC_CR_DBW 16 bit + * SDRAMC_CR_TWR(4) 4 cycle write recovery delay + * SDRAMC_CR_TRCTRFC(11) 63 ns min + * SDRAMC_CR_TRP(5) 21 ns min Command period (PRE to ACT) + * SDRAMC_CR_TRCD(5) 21 ns min Active Command to read/Write Command delay time + * SDRAMC_CR_TRAS(8) 42 ns min Command period (ACT to PRE) + * SDRAMC_CR_TXSR(13) 70 ns min Exit self-refresh to active time + */ + + regval = SDRAMC_CR_NC_COL8 | /* 8 column bits */ + SDRAMC_CR_NR_ROW11 | /* 11 row bits */ + SDRAMC_CR_NB_BANK2 | /* 2 banks */ + SDRAMC_CR_CAS_LATENCY3 | /* 3 cycle CAS latency */ + SDRAMC_CR_DBW | /* 16 bit */ + SDRAMC_CR_TWR(4) | /* 4 cycle write recovery delay */ + SDRAMC_CR_TRCTRFC(11) | /* 63 ns min */ + SDRAMC_CR_TRP(5) | /* 21 ns min Command period (PRE to ACT) */ + SDRAMC_CR_TRCD(5) | /* 21 ns min Active Command to read/Write Command delay time */ + SDRAMC_CR_TRAS(8) | /* 42 ns min Command period (ACT to PRE) */ + SDRAMC_CR_TXSR(13); /* 70 ns min Exit self-refresh to active time */ + + putreg32(regval, SAM_SDRAMC_CR); + + /* 2. For mobile SDRAM, temperature-compensated self refresh (TCSR), drive + * strength (DS) and partial array self refresh (PASR) must be set in + * the Low Power Register. + */ + + putreg32(0, SAM_SDRAMC_LPR); + + /* 3. The SDRAM memory type must be set in the Memory Device Register.*/ + + putreg32(SDRAMC_MDR_SDRAM, SAM_SDRAMC_MDR); + + /* 4. A minimum pause of 200 usec is provided to precede any signal toggle.*/ + + up_udelay(200); + + /* 5. A NOP command is issued to the SDRAM devices. The application must + * set Mode to 1 in the Mode Register and perform a write access to any + * SDRAM address. + */ + + putreg32(SDRAMC_MR_MODE_NOP, SAM_SDRAMC_MR); + *psdram = 0; + up_udelay(200); + + /* 6. An All Banks Precharge command is issued to the SDRAM devices. The + * application must set Mode to 2 in the Mode Register and perform a + * write access to any SDRAM address. + */ + + putreg32(SDRAMC_MR_MODE_PRECHARGE, SAM_SDRAMC_MR); + *psdram = 0; + up_udelay(200); + + /* 7. Eight auto-refresh (CBR) cycles are provided. The application must + * set the Mode to 4 in the Mode Register and perform a write access to + * any SDRAM location eight times. + */ + + for (i = 0 ; i < 8; i++) + { + putreg32(SDRAMC_MR_MODE_AUTOREFRESH, SAM_SDRAMC_MR); + *psdram = 0; + } + + up_udelay(200); + + /* 8. A Mode Register set (MRS) cycle is issued to program the parameters + * of the SDRAM devices, in particular CAS latency and burst length. + * The application must set Mode to 3 in the Mode Register and perform + * a write access to the SDRAM. The write address must be chosen so + * that BA[1:0] are set to 0. For example, with a 16-bit 128 MB SDRAM + * (12 rows, 9 columns, 4 banks) bank address, the SDRAM write access + * should be done at the address 0x70000000. + */ + + putreg32(SDRAMC_MR_MODE_LOADMODE, SAM_SDRAMC_MR); + *psdram = 0; + up_udelay(200); + + /* 9. For mobile SDRAM initialization, an Extended Mode Register set + * (EMRS) cycle is issued to program the SDRAM parameters (TCSR, PASR, + * DS). The application must set Mode to 5 in the Mode Register and + * perform a write access to the SDRAM. The write address must be + * chosen so that BA[1] or BA[0] are set to 1. + * + * For example, with a 16-bit 128 MB SDRAM, (12 rows, 9 columns, 4 + * banks) bank address the SDRAM write access should be done at the + * address 0x70800000 or 0x70400000. + */ + + //putreg32(SDRAMC_MR_MODE_EXTLOADMODE, SDRAMC_MR_MODE_EXT_LOAD_MODEREG); + // *((uint8_t *)(psdram + SDRAM_BA0)) = 0; + + /* 10. The application must go into Normal Mode, setting Mode to 0 in the + * Mode Register and performing a write access at any location in the + * SDRAM. + */ + + putreg32(SDRAMC_MR_MODE_NORMAL, SAM_SDRAMC_MR); + *psdram = 0; + up_udelay(200); + + /* 11. Write the refresh rate into the count field in the SDRAMC Refresh + * Timer register. (Refresh rate = delay between refresh cycles). The + * SDRAM device requires a refresh every 15.625 usec or 7.81 usec. With + * a 100 MHz frequency, the Refresh Timer Counter Register must be set + * with the value 1562(15.625 usec x 100 MHz) or 781(7.81 usec x 100 + * MHz). + * + * For IS42S16100E, 2048 refresh cycle every 32ms, every 15.625 usec + */ + + regval = (32 * (BOARD_MCK_FREQUENCY / 1000)) / 2048 ; + putreg32(regval, SAM_SDRAMC_TR); + + regval = getreg32(SAM_SDRAMC_CFR1); + regval |= SDRAMC_CFR1_UNAL; + putreg32(regval, SAM_SDRAMC_CFR1); + + /* After initialization, the SDRAM devices are fully functional. */ +} + +#endif /* CONFIG_SAMV7_SDRAMC */ diff --git a/configs/samv71-xult/src/sam_spi.c b/configs/samv71-xult/src/sam_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..03dd5ead1e33b1cfb63a41ed39e6b13add93cdce --- /dev/null +++ b/configs/samv71-xult/src/sam_spi.c @@ -0,0 +1,209 @@ +/************************************************************************************ + * configs/samv71-xult/src/sam_spi.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "sam_gpio.h" +#include "sam_spi.h" +#include "samv71-xult.h" + +#ifdef CONFIG_SAMV7_SPI + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select PIO pins for the SAMV71-XULT board. + * + ************************************************************************************/ + +void sam_spidev_initialize(void) +{ +#ifdef CONFIG_SAMV7_SPI0_MASTER +#endif + +#ifdef CONFIG_SAMV7_SPI0_SLAVE +#endif + +#ifdef CONFIG_SAMV7_SPI1_MASTER +#endif + +#ifdef CONFIG_SAMV7_SPI1_SLAVE +#endif +} + +/**************************************************************************** + * Name: sam_spi[0|1]select, sam_spi[0|1]status, and sam_spi[0|1]cmddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * include: + * + * o sam_spi[0|1]select is a functions tomanage the board-specific chip selects + * o sam_spi[0|1]status and sam_spi[0|1]cmddata: Implementations of the status + * and cmddata methods of the SPI interface defined by struct spi_ops_ + * (see include/nuttx/spi/spi.h). All other methods including + * sam_spibus_initialize()) are provided by common SAM3/4 logic. + * + * To use this common SPI logic on your board: + * + * 1. Provide logic in sam_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide sam_spi[0|1]select() and sam_spi[0|1]status() functions in your board- + * specific logic. These functions will perform chip selection and + * status operations using PIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * sam_spi[0|1]cmddata() functions in your board-specific logic. This + * function will perform cmd/data selection operations using PIOs in + * the way your board is configured. + * 3. Add a call to sam_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by sam_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_spi[0|1]select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * PIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the PIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SAMV7_SPI0_MASTER +void sam_spi0select(enum spi_dev_e devid, bool selected) +{ +} +#endif + +#ifdef CONFIG_SAMV7_SPI1_MASTER +void sam_spi1select(enum spi_dev_e devid, bool selected) +{ +} +#endif + +/**************************************************************************** + * Name: sam_spi[0|1]status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef CONFIG_SAMV7_SPI0_MASTER +uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_SAMV7_SPI1_MASTER +uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#endif /* CONFIG_SAMV7_SPI */ diff --git a/configs/samv71-xult/src/sam_usbdev.c b/configs/samv71-xult/src/sam_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..1e8173790c8cad5fc7543a553154ad69f339dea7 --- /dev/null +++ b/configs/samv71-xult/src/sam_usbdev.c @@ -0,0 +1,98 @@ +/************************************************************************************ + * configs/samv71-xult/src/sam_usbdev.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "sam_gpio.h" +#include "samv71-xult.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_usbinitialize + * + * Description: + * Called from stm32_boardinitialize very early in initialization to setup USB- + * related GPIO pins for the SAMV71-XULT board. + * + ************************************************************************************/ + +void sam_usbinitialize(void) +{ + /* Initialize the VBUS enable signal to HI output in any event so that, by + * default, VBUS power is not provided at the USB connector. + */ + + sam_configgpio(GPIO_VBUSON); +} + +/************************************************************************************ + * Name: sam_usbsuspend + * + * Description: + * Board logic must provide the sam_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} diff --git a/configs/samv71-xult/src/sam_usbmsc.c b/configs/samv71-xult/src/sam_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..4e8258fa68eff784c8c68ed568774ef572909183 --- /dev/null +++ b/configs/samv71-xult/src/sam_usbmsc.c @@ -0,0 +1,67 @@ +/**************************************************************************** + * configs/samv71-xult/src/sam_usbmsc.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "nuttx/board.h" + +#include "samv71-xult.h" + +#if defined(CONFIG_USBMSC) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization of the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + return OK; +} + +#endif /* CONFIG_USBMSC && !CONFIG_USBMSC_COMPOSITE */ diff --git a/configs/samv71-xult/src/sam_userleds.c b/configs/samv71-xult/src/sam_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..a3f4bf8c55204e92da8a116b2c0a9e9ae6fc0bb0 --- /dev/null +++ b/configs/samv71-xult/src/sam_userleds.c @@ -0,0 +1,109 @@ +/**************************************************************************** + * configs/samv71-xult/src/sam_userleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "sam_gpio.h" +#include "samv71-xult.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED PIOs for output */ + + sam_configgpio(GPIO_LED0); + sam_configgpio(GPIO_LED1); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint32_t ledcfg; + + if (led == BOARD_LED0) + { + ledcfg = GPIO_LED0; + } + else if (led == BOARD_LED1) + { + ledcfg = GPIO_LED1; + } + else + { + return; + } + + sam_gpiowrite(ledcfg, !ledon); /* Low illuminates */ +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + /* Low illuminates */ + + sam_gpiowrite(GPIO_LED0, (ledset & BOARD_LED0_BIT) == 0); + sam_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0); +} diff --git a/configs/samv71-xult/src/sam_wm8904.c b/configs/samv71-xult/src/sam_wm8904.c new file mode 100644 index 0000000000000000000000000000000000000000..dff1f695194fffa6506e23cb66f726878dcad287 --- /dev/null +++ b/configs/samv71-xult/src/sam_wm8904.c @@ -0,0 +1,383 @@ +/************************************************************************************ + * configs/samv71-xult/src/sam_wm8904.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "sam_gpio.h" +#include "sam_twihs.h" +#include "sam_ssc.h" +#include "sam_pck.h" + +#include "samv71-xult.h" + +#ifdef HAVE_WM8904 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct samv71xult_mwinfo_s +{ + /* Standard MW8904 interface */ + + struct wm8904_lower_s lower; + + /* Extensions for the samv71xult board */ + + wm8904_handler_t handler; + FAR void *arg; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/PIO access callbacks. These operations all hidden behind + * callbacks to isolate the WM8904 driver from differences in PIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the WM8904 interrupt handler to the PIO interrupt + * enable - Enable or disable the PIO interrupt + */ + +static int wm8904_attach(FAR const struct wm8904_lower_s *lower, + wm8904_handler_t isr, FAR void *arg); +static bool wm8904_enable(FAR const struct wm8904_lower_s *lower, + bool enable); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the WM8904 + * driver. This structure provides information about the configuration + * of the WM8904 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. + */ + +static struct samv71xult_mwinfo_s g_wm8904info = +{ + .lower = + { + .address = WM8904_I2C_ADDRESS, + .frequency = CONFIG_SAMV7D4EK_WM8904_I2CFREQUENCY, +#ifdef CONFIG_SAMV7D4EK_WM8904_SRCSCK + .mclk = BOARD_SLOWCLK_FREQUENCY, +#else + .mclk = BOARD_MAINCK_FREQUENCY, +#endif + + .attach = wm8904_attach, + .enable = wm8904_enable, + }, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * IRQ/PIO access callbacks. These operations all hidden behind + * callbacks to isolate the WM8904 driver from differences in PIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the WM8904 interrupt handler to the PIO interrupt + * enable - Enable or disable the PIO interrupt + * clear - Acknowledge/clear any pending PIO interrupt + * + ****************************************************************************/ + +static int wm8904_attach(FAR const struct wm8904_lower_s *lower, + wm8904_handler_t isr, FAR void *arg) +{ + if (isr) + { + /* Just save the address of the handler and its argument for now. The + * new handler will called via wm8904_interrupt() when the interrupt occurs. + */ + + audvdbg("Attaching %p\n", isr); + g_wm8904info.handler = isr; + g_wm8904info.arg = arg; + } + else + { + audvdbg("Detaching %p\n", g_wm8904info.handler); + (void)wm8904_enable(lower, false); + g_wm8904info.handler = NULL; + g_wm8904info.arg = NULL; + } + + return OK; +} + +static bool wm8904_enable(FAR const struct wm8904_lower_s *lower, bool enable) +{ + static bool enabled; + irqstate_t flags; + bool ret; + + /* Has the interrupt state changed */ + + flags = enter_critical_section(); + if (enable != enabled) + { + /* Enable or disable interrupts */ + + if (enable && g_wm8904info.handler) + { + audvdbg("Enabling\n"); + sam_gpioirqenable(IRQ_INT_WM8904); + enabled = true; + } + else + { + audvdbg("Disabling\n"); + sam_gpioirqdisable(IRQ_INT_WM8904); + enabled = false; + } + } + + ret = enabled; + leave_critical_section(flags); + return ret; +} + +static int wm8904_interrupt(int irq, FAR void *context) +{ + /* Just forward the interrupt to the WM8904 driver */ + + audvdbg("handler %p\n", g_wm8904info.handler); + if (g_wm8904info.handler) + { + return g_wm8904info.handler(&g_wm8904info.lower, g_wm8904info.arg); + } + + /* We got an interrupt with no handler. This should not + * happen. + */ + + sam_gpioirqdisable(IRQ_INT_WM8904); + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_wm8904_initialize + * + * Description: + * This function is called by platform-specific, setup logic to configure + * and register the WM8904 device. This function will register the driver + * as /dev/wm8904[x] where x is determined by the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int sam_wm8904_initialize(int minor) +{ + FAR struct audio_lowerhalf_s *wm8904; + FAR struct audio_lowerhalf_s *pcm; + FAR struct i2c_master_s *i2c; + FAR struct i2s_dev_s *i2s; + static bool initialized = false; + char devname[12]; + int ret; + + auddbg("minor %d\n", minor); + DEBUGASSERT(minor >= 0 && minor <= 25); + + /* Have we already initialized? Since we never uninitialize we must prevent + * multiple initializations. This is necessary, for example, when the + * touchscreen example is used as a built-in application in NSH and can be + * called numerous time. It will attempt to initialize each time. + */ + + if (!initialized) + { + /* Configure the WM8904 interrupt pin */ + + (void)sam_configgpio(GPIO_INT_WM8904); + + /* Get an instance of the I2C interface for the WM8904 chip select */ + + i2c = sam_i2cbus_initialize(WM8904_TWI_BUS); + if (!i2c) + { + auddbg("Failed to initialize TWI%d\n", WM8904_TWI_BUS); + ret = -ENODEV; + goto errout; + } + + /* Get an instance of the I2S interface for the WM8904 data channel */ + + i2s = sam_ssc_initialize(WM8904_SSC_BUS); + if (!i2s) + { + auddbg("Failed to initialize SSC%d\n", WM8904_SSC_BUS); + ret = -ENODEV; + goto errout_with_i2c; + } + + /* Configure the DAC master clock. This clock is provided by PCK2 (PB10) + * that is connected to the WM8904 MCLK. + */ + +#ifdef CONFIG_SAMV7D4EK_WM8904_SRCSCK + /* Drive the DAC with the slow clock (32.768 KHz). The slow clock was + * enabled in sam_boot.c if needed. + */ + + (void)sam_pck_configure(PCK2, PCKSRC_SCK, BOARD_SLOWCLK_FREQUENCY); +#else + /* Drive the DAC with the main clock (12 MHz) */ + + (void)sam_pck_configure(PCK2, PCKSRC_MAINCK, BOARD_MAINCK_FREQUENCY); +#endif + + /* Enable the DAC master clock */ + + sam_pck_enable(PCK2, true); + + /* Configure WM8904 interrupts */ + + sam_gpioirq(GPIO_INT_WM8904); + ret = irq_attach(IRQ_INT_WM8904, wm8904_interrupt); + if (ret < 0) + { + auddbg("ERROR: Failed to attach WM8904 interrupt: %d\n", ret); + goto errout_with_i2s; + } + + /* Now we can use these I2C and I2S interfaces to initialize the + * MW8904 which will return an audio interface. + */ + + wm8904 = wm8904_initialize(i2c, i2s, &g_wm8904info.lower); + if (!wm8904) + { + auddbg("Failed to initialize the WM8904\n"); + ret = -ENODEV; + goto errout_with_irq; + } + + /* No we can embed the WM8904/I2C/I2S conglomerate into a PCM decoder + * instance so that we will have a PCM front end for the the WM8904 + * driver. + */ + + pcm = pcm_decode_initialize(wm8904); + if (!pcm) + { + auddbg("ERROR: Failed create the PCM decoder\n"); + ret = -ENODEV; + goto errout_with_wm8904; + } + + /* Create a device name */ + + snprintf(devname, 12, "pcm%d", minor); + + /* Finally, we can register the PCM/WM8904/I2C/I2S audio device. + * + * Is anyone young enough to remember Rube Goldberg? + */ + + ret = audio_register(devname, pcm); + if (ret < 0) + { + auddbg("ERROR: Failed to register /dev/%s device: %d\n", devname, ret); + goto errout_with_pcm; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; + + /* Error exits. Unfortunately there is no mechanism in place now to + * recover resources from most errors on initialization failures. + */ + +errout_with_pcm: +errout_with_wm8904: +errout_with_irq: + irq_detach(IRQ_INT_WM8904); +errout_with_i2s: +errout_with_i2c: +errout: + return ret; +} + +#endif /* HAVE_WM8904 */ diff --git a/configs/samv71-xult/src/samv71-xult.h b/configs/samv71-xult/src/samv71-xult.h new file mode 100644 index 0000000000000000000000000000000000000000..08394c5c8148c4ec2d81670387bccfdff19f4254 --- /dev/null +++ b/configs/samv71-xult/src/samv71-xult.h @@ -0,0 +1,792 @@ +/************************************************************************************ + * configs/samv71-xult/src/samv71-xult.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SAMV71_XULT_SRC_SAMV71_XULT_H +#define __CONFIGS_SAMV71_XULT_SRC_SAMV71_XULT_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#define HAVE_HSMCI 1 +#define HAVE_AUTOMOUNTER 1 +#define HAVE_USB 1 +#define HAVE_USBDEV 1 +#define HAVE_USBMONITOR 1 +#define HAVE_NETWORK 1 +#define HAVE_MACADDR 1 +#define HAVE_MTDCONFIG 1 +#define HAVE_S25FL1 1 +#define HAVE_S25FL1_NXFFS 1 +#define HAVE_S25FL1_SMARTFS 1 +#define HAVE_S25FL1_CHARDEV 1 +#define HAVE_PROGMEM_CHARDEV 1 +#define HAVE_WM8904 1 +#define HAVE_AUDIO_NULL 1 +#define HAVE_RTC_DSXXXX 1 +#define HAVE_RTC_PCF85263 1 +#define HAVE_I2CTOOL 1 +#define HAVE_LED_DRIVER 1 + +/* HSMCI */ +/* Can't support MMC/SD if the card interface is not enabled */ + +#if !defined(CONFIG_SAMV7_HSMCI0) +# undef HAVE_HSMCI +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(HAVE_HSMCI) && defined(CONFIG_DISABLE_MOUNTPOINT) +# warning Mountpoints disabled. No MMC/SD support +# undef HAVE_HSMCI +#endif + +/* We need PIO interrupts on GPIOD to support card detect interrupts */ + +#if defined(HAVE_HSMCI) && !defined(CONFIG_SAMV7_GPIOD_IRQ) +# warning PIOD interrupts not enabled. No MMC/SD support. +# undef HAVE_HSMCI +#endif + +/* MMC/SD minor numbers */ + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDSLOTNO 0 +#endif + +#if CONFIG_NSH_MMCSDMINOR != 0 +# error SAMV71 has only one MMC/SD slot (CONFIG_NSH_MMCSDMINOR) +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +#endif + +#define HSMCI0_SLOTNO CONFIG_NSH_MMCSDSLOTNO +#define HSMCI0_MINOR CONFIG_NSH_MMCSDMINOR + +/* Automounter. Currently only works with HSMCI. */ + +#if !defined(CONFIG_FS_AUTOMOUNTER) || !defined(HAVE_HSMCI) +# undef HAVE_AUTOMOUNTER +# undef CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT +#endif + +#ifndef CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT +# undef HAVE_AUTOMOUNTER +#endif + +#ifdef HAVE_AUTOMOUNTER +# ifdef CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT + /* HSMCI0 Automounter defaults */ + +# ifndef CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_FSTYPE +# define CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_FSTYPE "vfat" +# endif + +# ifndef CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_BLKDEV +# define CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_BLKDEV "/dev/mmcds0" +# endif + +# ifndef CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_MOUNTPOINT +# define CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_MOUNTPOINT "/mnt/sdcard0" +# endif + +# ifndef CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_DDELAY +# define CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_DDELAY 1000 +# endif + +# ifndef CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_UDELAY +# define CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT_UDELAY 2000 +# endif +# endif /* CONFIG_SAMV71XULT_HSMCI0_AUTOMOUNT */ +#endif /* HAVE_AUTOMOUNTER */ + +/* USB Device */ +/* CONFIG_SAMV7_UDP and CONFIG_USBDEV must be defined, or there is no USB + * device. + */ + +#if !defined(CONFIG_SAMV7_UDP) || !defined(CONFIG_USBDEV) +# undef HAVE_USB +# undef HAVE_USBDEV +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#ifndef HAVE_USBDEV +# undef CONFIG_USBDEV_TRACE +#endif + +#if !defined(CONFIG_SYSTEM_USBMONITOR) || !defined(CONFIG_USBDEV_TRACE) +# undef HAVE_USBMONITOR +#endif + +/* Networking and AT24-based MTD config */ + +#if !defined(CONFIG_NET) || !defined(CONFIG_SAMV7_EMAC) +# undef HAVE_NETWORK +# undef HAVE_MACADDR +#endif + +#if !defined(CONFIG_SAMV7_TWIHS0) || !defined(CONFIG_MTD_AT24XX) +# undef HAVE_MACADDR +# undef HAVE_MTDCONFIG +#endif + +#if defined(CONFIG_NSH_NOMAC) || !defined(CONFIG_AT24XX_EXTENDED) +# undef HAVE_MACADDR +#endif + +#if !defined(CONFIG_MTD_CONFIG) +# undef HAVE_MTDCONFIG +#endif + +/* procfs File System */ + +#ifdef CONFIG_FS_PROCFS +# ifdef CONFIG_NSH_PROC_MOUNTPOINT +# define SAMV71_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT +# else +# define SAMV71_PROCFS_MOUNTPOINT "/proc" +# endif +#endif + +/* S25FL1 QuadSPI FLASH */ + +#ifndef CONFIG_MTD_S25FL1 +# undef HAVE_S25FL1 +# undef HAVE_S25FL1_NXFFS +# undef HAVE_S25FL1_SMARTFS +# undef HAVE_S25FL1_CHARDEV +#endif + +#ifndef CONFIG_SAMV7_QSPI +# undef HAVE_S25FL1 +# undef HAVE_S25FL1_NXFFS +# undef HAVE_S25FL1_SMARTFS +# undef HAVE_S25FL1_CHARDEV +#endif + +#ifndef CONFIG_FS_NXFFS +# undef HAVE_S25FL1_NXFFS +#endif + +#if !defined(CONFIG_MTD_SMART) || !defined(CONFIG_FS_SMARTFS) +# undef HAVE_S25FL1_SMARTFS +#endif + +#if defined(HAVE_S25FL1_NXFFS) && defined(HAVE_S25FL1_SMARTFS) +# undef HAVE_S25FL1_NXFFS +#endif + +#if defined(HAVE_S25FL1_NXFFS) || defined(HAVE_S25FL1_SMARTFS) +# undef HAVE_S25FL1_CHARDEV +#endif + +/* On-chip Programming Memory */ + +#if !defined(CONFIG_SAMV7_PROGMEM) || !defined(CONFIG_MTD_PROGMEM) +# undef HAVE_PROGMEM_CHARDEV +#endif + +/* If both the S25FL1 FLASH and SmartFS, then this is the minor device + * number of the Smart block driver (/dev/smartN) + */ + +#define S25FL1_SMART_MINOR 0 + +/* If the S25FL1 FLASH is enabled but not SmartFS, then the S25FL will be + * wrapped as a character device. This is the minor number of both the + * block device (/dev/mtdblockN) and the character device (/dev/mtdN). + */ + +#define S25FL1_MTD_MINOR 0 + +/* This is the on-chip progmem memroy driver minor number */ + +#define PROGMEM_MTD_MINOR 1 + +/* Audio */ +/* PCM/WM8904 driver */ + +#ifndef CONFIG_AUDIO_WM8904 +# undef HAVE_WM8904 +#endif + +#ifdef HAVE_WM8904 +# ifndef CONFIG_SAMV7_TWIHS0 +# warning CONFIG_SAMV7_TWIHS0 is required for audio support +# undef HAVE_WM8904 +# endif + +# ifndef CONFIG_SAMV7_SSC0 +# warning CONFIG_SAMV7_SSC0 is required for audio support +# undef HAVE_WM8904 +# endif + +# if !defined(CONFIG_SAMV7_GPIOD_IRQ) +# warning CONFIG_SAMV7_GPIOD_IRQ is required for audio support +# undef HAVE_WM8904 +# endif + +# ifndef CONFIG_AUDIO_FORMAT_PCM +# warning CONFIG_AUDIO_FORMAT_PCM is required for audio support +# undef HAVE_WM8904 +# endif + +# ifndef CONFIG_SAMV71XULT_WM8904_I2CFREQUENCY +# warning Defaulting to maximum WM8904 I2C frequency +# define CONFIG_SAMV71XULT_WM8904_I2CFREQUENCY 400000 +# endif + +# if CONFIG_SAMV71XULT_WM8904_I2CFREQUENCY > 400000 +# warning WM8904 I2C frequency cannot exceed 400KHz +# undef CONFIG_SAMV71XULT_WM8904_I2CFREQUENCY +# define CONFIG_SAMV71XULT_WM8904_I2CFREQUENCY 400000 +# endif +#endif + +/* PCM/null driver */ + +#ifndef CONFIG_AUDIO_NULL +# undef HAVE_AUDIO_NULL +#endif + +#ifndef HAVE_WM8904 +# undef HAVE_AUDIO_NULL +#endif + +#ifdef HAVE_AUDIO_NULL +# ifndef CONFIG_AUDIO_FORMAT_PCM +# warning CONFIG_AUDIO_FORMAT_PCM is required for audio support +# undef HAVE_AUDIO_NULL +# endif +#endif + +/* DS3231/DS1307 RTC + * + * For testing purposes, I have connected Maximum Integrated DS1307 and NXP + * PCF85263 I2C RTC TWIHS0 (available on either EXT or EXT2 pins 11 and 12). + */ + +#ifndef CONFIG_RTC_DSXXXX +# undef HAVE_RTC_DSXXXX +#endif + +#ifndef CONFIG_RTC_PCF85263 +# undef HAVE_RTC_PCF85263 +#endif + +#ifndef CONFIG_SAMV7_TWIHS0 +# undef HAVE_RTC_DSXXXX +# undef HAVE_RTC_PCF85263 +#endif + +#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DATETIME) +# undef HAVE_RTC_DSXXXX +# undef HAVE_RTC_PCF85263 +#endif + +#if defined(HAVE_RTC_DSXXXX) && defined(HAVE_RTC_PCF85263) +# undef HAVE_RTC_DSXXXX +#endif + +#ifdef HAVE_RTC_DSXXXX +/* The DS3231/1307 RTC communicates on TWI0, I2C address 0x68 */ + +# define DSXXXX_TWI_BUS 0 +# define DSXXXX_I2C_ADDRESS 0x68 +#endif + +#ifdef HAVE_RTC_PCF85263 +/* The PCF85263 RTC communicates on TWI0, I2C address 0x51 */ + +# define PCF85263_TWI_BUS 0 +# define PCF85263_I2C_ADDRESS 0x51 +#endif + +/* Do we need to register I2C drivers on behalf of the I2C tool? */ + +#if !defined(CONFIG_SYSTEM_I2CTOOL) || !defined(CONFIG_I2C_DRIVER) +# undef HAVE_I2CTOOL +#endif + +/* Do we need to install the LED driver */ + +#if defined(CONFIG_ARCH_LEDS) || !defined(CONFIG_USERLED) || \ + !defined(CONFIG_USERLED_LOWER) +# undef HAVE_LED_DRIVER +#endif + +#ifdef HAVE_LED_DRIVER +# ifdef CONFIG_EXAMPLES_LEDS_DEVPATH +# define LED_DRIVER_PATH CONFIG_EXAMPLES_LEDS_DEVPATH +# else +# define LED_DRIVER_PATH "/dev/userleds" +# endif +#endif + +/* SAMV71-XULT GPIO Pin Definitions *************************************************/ + +/* Ethernet MAC. + * + * KSZ8061RNBVA Connections + * ------------------------ + * + * ------ --------- --------- -------------------------- + * SAMV71 SAMV71 Ethernet Shared functionality + * Pin Function Function + * ------ --------- --------- -------------------------- + * PD00 GTXCK REF_CLK Shield + * PD01 GTXEN TXEN + * PD02 GTX0 TXD0 + * PD03 GTX1 TXD1 + * PD04 GRXDV CRS_DV Trace + * PD05 GRX0 RXD0 Trace + * PD06 GRX1 RXD1 Trace + * PD07 GRXER RXER Trace + * PD08 GMDC MDC Trace + * PD09 GMDIO MDIO + * PA19 GPIO INTERRUPT EXT1, Shield + * PA29 GPIO SIGDET + * PC10 GPIO RESET + * ------ --------- --------- -------------------------- + */ + +#define GPIO_EMAC0_INT (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_FALLING | GPIO_PORT_PIOA | GPIO_PIN19) +#define GPIO_EMAC0_SIGDET (GPIO_INPUT | GPIO_CFG_DEFAULT | \ + GPIO_PORT_PIOA | GPIO_PIN29) +#define GPIO_EMAC0_RESET (GPIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN10) + +#define IRQ_EMAC0_INT SAM_IRQ_PA19 + +/* LEDs + * + * There are two yellow LED available on the SAM V71 Xplained Ultra board that + * can be turned on and off. The LEDs can be activated by driving the + * connected I/O line to GND. + * + * ------ ----------- --------------------- + * SAMV71 Function Shared functionality + * PIO + * ------ ----------- --------------------- + * PA23 Yellow LED0 EDBG GPIO + * PC09 Yellow LED1 LCD, and Shield + * ------ ----------- --------------------- + */ + +#define GPIO_LED0 (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOA | GPIO_PIN23) +#define GPIO_LED1 (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN9) + +/* Buttons + * + * SAM V71 Xplained Ultra contains three mechanical buttons. One button is the + * RESET button connected to the SAM V71 reset line and the others are generic + * user configurable buttons. When a button is pressed it will drive the I/O + * line to GND. + * + * ------ ----------- --------------------- + * SAMV71 Function Shared functionality + * PIO + * ------ ----------- --------------------- + * RESET RESET Trace, Shield, and EDBG + * PA09 SW0 EDBG GPIO and Camera + * PB12 SW1 EDBG SWD and Chip Erase + * ------ ----------- --------------------- + * + * NOTES: + * + * - There are no pull-up resistors connected to the generic user buttons so + * it is necessary to enable the internal pull-up in the SAM V71 to use the + * button. + * - PB12 is set up as a system flash ERASE pin when the firmware boots. To + * use the SW1, PB12 has to be configured as a normal regular I/O pin in + * the MATRIX module. For more information see the SAM V71 datasheet. + */ + +#define GPIO_SW0 (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOA | GPIO_PIN9) +#define GPIO_SW1 (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOB | GPIO_PIN12) + +#define IRQ_SW0 SAM_IRQ_PA9 +#define IRQ_SW1 SAM_IRQ_PB12 + +/* HSMCI SD Card Detect + * + * The SAM V71 Xplained Ultra has one standard SD card connector which is + * connected to the High Speed Multimedia Card Interface (HSMCI) of the SAM + * V71. SD card connector: + * + * ------ ----------------- --------------------- + * SAMV71 SAMV71 Shared functionality + * Pin Function + * ------ ----------------- --------------------- + * PA30 MCDA0 (DAT0) + * PA31 MCDA1 (DAT1) + * PA26 MCDA2 (DAT2) + * PA27 MCDA3 (DAT3) Camera + * PA25 MCCK (CLK) Shield + * PA28 MCCDA (CMD) + * PD18 Card Detect (C/D) Shield + * ------ ----------------- --------------------- + */ + +#define GPIO_MCI0_CD (GPIO_INPUT | GPIO_CFG_DEFAULT | GPIO_CFG_DEGLITCH | \ + GPIO_INT_BOTHEDGES | GPIO_PORT_PIOD | GPIO_PIN18) +#define IRQ_MCI0_CD SAM_IRQ_PD18 + +/* USB Host + * + * The SAM V71 Xplained Ultra has a Micro-USB connector for use with the SAM V71 + * USB module labeled as TARGET USB on the kit. In USB host mode VBUS voltage is + * provided by the kit and has to be enabled by setting the "VBUS Host Enable" + * pin (PC16) low. + */ + +#define GPIO_VBUSON (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN16) + +/* WM8904 Audio Codec ***************************************************************/ +/* SAMV71 Interface WM8904 Interface + * ---- ------------ ------- ---------------------------------- + * PIO Usage Pin Function + * ---- ------------ ------- ---------------------------------- + * PA3 TWD0 SDA I2C control interface, data line + * PA4 TWCK0 SCLK I2C control interface, clock line + * PA10 RD ADCDAT Digital audio output (microphone) + * PB18 PCK2 MCLK Master clock + * PB0 TF LRCLK Left/right data alignment clock + * PB1 TK BCLK Bit clock, for synchronization + * PD11 GPIO IRQ Audio interrupt + * PD24 RF LRCLK Left/right data alignment clock + * PD26 TD DACDAT Digital audio input (headphone) + * ---- ------------ ------- ---------------------------------- + */ + +/* Audio Interrupt. All interrupts are default, active high level. Pull down + * internally in the WM8904. So we want no pull-up/downs and we want to + * interrupt on the high level. + */ + +#define GPIO_INT_WM8904 (PIO_INPUT | PIO_CFG_DEFAULT | PIO_CFG_DEGLITCH | \ + PIO_INT_HIGHLEVEL | PIO_PORT_PIOD | PIO_PIN11) +#define IRQ_INT_WM8904 SAM_IRQ_PD11 + +/* The MW8904 communicates on TWI0, I2C address 0x1a for control operations */ + +#define WM8904_TWI_BUS 0 +#define WM8904_I2C_ADDRESS 0x1a + +/* The MW8904 transfers data on SSC0 */ + +#define WM8904_SSC_BUS 0 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_sdram_config + * + * Description: + * Configures the on-board SDRAM. SAMV71 Xplained Ultra features one external + * IS42S16100E-7BLI, 512Kx16x2, 10ns, SDRAM. SDRAM0 is connected to chip select + * NCS1. + * + * Input Parameters: + * None + * + * Assumptions: + * The DDR memory regions is configured as strongly ordered memory. When we + * complete initialization of SDRAM and it is ready for use, we will make DRAM + * into normal memory. + * + ************************************************************************************/ + +#ifdef CONFIG_SAMV7_SDRAMC +void sam_sdram_config(void); +#else +# define sam_sdram_config(t) +#endif + +/************************************************************************************ + * Name: sam_bringup + * + * Description: + * Bring up board features + * + ************************************************************************************/ + +#if defined(CONFIG_LIB_BOARDCTL) || defined(CONFIG_BOARD_INITIALIZE) +int sam_bringup(void); +#endif + +/************************************************************************************ + * Name: sam_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the SAMV71-XULT board. + * + ************************************************************************************/ + +#ifdef CONFIG_SAMV7_SPI +void sam_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: sam_hsmci_initialize + * + * Description: + * Initialize HSMCI support + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +int sam_hsmci_initialize(int slot, int minor); +#else +# define sam_hsmci_initialize(s,m) (-ENOSYS) +#endif + +/************************************************************************************ + * Name: sam_usbinitialize + * + * Description: + * Called from stm32_boardinitialize very early in initialization to setup USB- + * related GPIO pins for the SAMV71-XULT board. + * + ************************************************************************************/ + +#ifdef HAVE_USB +void sam_usbinitialize(void); +#endif + +/************************************************************************************ + * Name: sam_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +#ifdef HAVE_NETWORK +void sam_netinitialize(void); +#endif + +/************************************************************************************ + * Name: sam_emac0_setmac + * + * Description: + * Read the Ethernet MAC address from the AT24 FLASH and configure the Ethernet + * driver with that address. + * + ************************************************************************************/ + +#ifdef HAVE_MACADDR +int sam_emac0_setmac(void); +#endif + +/************************************************************************************ + * Name: sam_cardinserted + * + * Description: + * Check if a card is inserted into the selected HSMCI slot + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_cardinserted(int slotno); +#else +# define sam_cardinserted(slotno) (false) +#endif + +/************************************************************************************ + * Name: sam_writeprotected + * + * Description: + * Check if the card in the MMCSD slot is write protected + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_writeprotected(int slotno); +#endif + +/************************************************************************************ + * Name: sam_automount_initialize + * + * Description: + * Configure auto-mounters for each enable and so configured HSMCI + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ************************************************************************************/ + +#ifdef HAVE_AUTOMOUNTER +void sam_automount_initialize(void); +#endif + +/************************************************************************************ + * Name: sam_automount_event + * + * Description: + * The HSMCI card detection logic has detected an insertion or removal event. It + * has already scheduled the MMC/SD block driver operations. Now we need to + * schedule the auto-mount event which will occur with a substantial delay to make + * sure that everything has settle down. + * + * Input Parameters: + * slotno - Identifies the HSMCI0 slot: HSMCI0 or HSMCI1_SLOTNO. There is a + * terminology problem here: Each HSMCI supports two slots, slot A and slot B. + * Only slot A is used. So this is not a really a slot, but an HSCMI peripheral + * number. + * inserted - True if the card is inserted in the slot. False otherwise. + * + * Returned Value: + * None + * + * Assumptions: + * Interrupts are disabled. + * + ************************************************************************************/ + +#ifdef HAVE_AUTOMOUNTER +void sam_automount_event(int slotno, bool inserted); +#endif + +/************************************************************************************ + * Name: sam_writeprotected + * + * Description: + * Check if the card in the MMCSD slot is write protected + * + ************************************************************************************/ + +#ifdef HAVE_HSMCI +bool sam_writeprotected(int slotno); +#else +# define sam_writeprotected(slotno) (false) +#endif + +/************************************************************************************ + * Name: sam_at24config + * + * Description: + * Create an AT24xx-based MTD configuration device for storage device configuration + * information. + * + ************************************************************************************/ + +#ifdef HAVE_MTDCONFIG +int sam_at24config(void); +#endif + +/**************************************************************************** + * Name: sam_wm8904_initialize + * + * Description: + * This function is called by platform-specific, setup logic to configure + * and register the WM8904 device. This function will register the driver + * as /dev/wm8904[x] where x is determined by the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef HAVE_WM8904 +int sam_wm8904_initialize(int minor); +#endif /* HAVE_WM8904 */ + +/**************************************************************************** + * Name: sam_audio_null_initialize + * + * Description: + * Set up to use the NULL audio device for PCM unit-level testing. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef HAVE_AUDIO_NULL +int sam_audio_null_initialize(int minor); +#endif /* HAVE_AUDIO_NULL */ + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SAMV71_XULT_SRC_SAMV71_XULT_H */ diff --git a/configs/shenzhou/Kconfig b/configs/shenzhou/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..560ffea7e87ce635107772cfd602ba84d023ab41 --- /dev/null +++ b/configs/shenzhou/Kconfig @@ -0,0 +1,79 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SHENZHOU + +if LCD +menu "LCD Controller Selection" + +comment "Disable Unused LCD Controllers" + +config STM32_ILI1505_DISABLE + bool "Disable ILI1505" + default n + ---help--- + This may be defined to disable support for the ILI1505 LCD controller + You might want to eliminate unused LCD controll support in order to + reduce the FLASH footprint. + +config STM32_ILI9300_DISABLE + bool "Disable ILI9300" + default n + ---help--- + This may be defined to disable support for the ILI9300 LCD controller + You might want to eliminate unused LCD controll support in order to + reduce the FLASH footprint. + +config STM32_ILI9320_DISABLE + bool "Disable ILI9320" + default n + ---help--- + This may be defined to disable support for the ILI9320 LCD controller + You might want to eliminate unused LCD controll support in order to + reduce the FLASH footprint. + +config STM32_ILI9321_DISABLE + bool "Disable ILI9321" + default n + ---help--- + This may be defined to disable support for the ILI9321 LCD controller + You might want to eliminate unused LCD controll support in order to + reduce the FLASH footprint. + +config STM32_ILI9325_DISABLE + bool "Disable ILI9325" + default n + ---help--- + This may be defined to disable support for the ILI9325 LCD controller + You might want to eliminate unused LCD controll support in order to + reduce the FLASH footprint. + +config STM32_ILI9328_DISABLE + bool "Disable ILI9328" + default n + ---help--- + This may be defined to disable support for the ILI9328 LCD controller + You might want to eliminate unused LCD controll support in order to + reduce the FLASH footprint. + +config STM32_ILI9331_DISABLE + bool "Disable ILI9331" + default n + ---help--- + This may be defined to disable support for the ILI9331 LCD controller + You might want to eliminate unused LCD controll support in order to + reduce the FLASH footprint. + +config STM32_ILI9919_DISABLE + bool "Disable ILI9919" + default n + ---help--- + This may be defined to disable support for the ILI9919 LCD controller + You might want to eliminate unused LCD controll support in order to + reduce the FLASH footprint. + +endmenu +endif +endif diff --git a/configs/shenzhou/README.txt b/configs/shenzhou/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..f310f2f7b7175ca97c80b2c760d023f36f4a416d --- /dev/null +++ b/configs/shenzhou/README.txt @@ -0,0 +1,875 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the Shenzhou +IV development board from www.armjishu.com featuring the STMicro STM32F107VCT +MCU. As of this writing, there are five models of the Shenzhou board: + + 1. Shenzhou I (STM32F103RB) + 2. Shenzhou II (STM32F103VC) + 3. Shenzhou III (STM32F103ZE) + 4. Shenzhou IV (STM32F107VC) + 5. Shenzhou king ((STM32F103ZG, core board + IO expansion board)). + +Support is currently provided for the Shenzhou IV only. Features of the +Shenzhou IV board include: + + - STM32F107VCT + - 10/100M PHY (DM9161AEP) + - TFT LCD Connector + - USB OTG + - CAN (CAN1=2) + - USART connectos (USART1-2) + - RS-485 + - SD card slot + - Audio DAC (PCM1770) + - SPI Flash (W25X16) + - (4) LEDs (LED1-4) + - 2.4G Wireless (NRF24L01 SPI module) + - 315MHz Wireless (module) + - (4) Buttons (KEY1-4, USERKEY2, USERKEY, TEMPER, WAKEUP) + - VBUS/external +4V select + - 5V/3.3V power conversion + - Extension connector + - JTAG + +Contents +======== + + - STM32F107VCT Pin Usage + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI buildroot Toolchain + - NuttX OABI buildroot Toolchain + - NXFLAT Toolchain + - Shenzhou-specific Configuration Options + - LEDs + - Shenzhou-specific Configuration Options + - Configurations + +STM32F107VCT Pin Usage +====================== + +-- ---- -------------- ------------------------------------------------------------------- +PN NAME SIGNAL NOTES +-- ---- -------------- ------------------------------------------------------------------- +23 PA0 WAKEUP Connected to KEY4. Active low: Closing KEY4 pulls WAKEUP to ground. +24 PA1 MII_RX_CLK + RMII_REF_CLK +25 PA2 MII_MDIO +26 PA3 315M_VT +29 PA4 DAC_OUT1 To CON5(CN14) +30 PA5 DAC_OUT2 To CON5(CN14). JP10 + SPI1_SCK To the SD card, SPI FLASH +31 PA6 SPI1_MISO To the SD card, SPI FLASH +32 PA7 SPI1_MOSI To the SD card, SPI FLASH +67 PA8 MCO To DM9161AEP PHY +68 PA9 USB_VBUS MINI-USB-AB. JP3 + USART1_TX MAX3232 to CN5 +69 PA10 USB_ID MINI-USB-AB. JP5 + USART1_RX MAX3232 to CN5 +70 PA11 USB_DM MINI-USB-AB +71 PA12 USB_DP MINI-USB-AB +72 PA13 TMS/SWDIO +76 PA14 TCK/SWCLK +77 PA15 TDI + +-- ---- -------------- ------------------------------------------------------------------- +PN NAME SIGNAL NOTES +-- ---- -------------- ------------------------------------------------------------------- +35 PB0 ADC_IN1 To CON5(CN14) +36 PB1 ADC_IN2 To CON5(CN14) +37 PB2 DATA_LE To TFT LCD (CN13) + BOOT1 JP13 +89 PB3 TDO/SWO +90 PB4 TRST +91 PB5 CAN2_RX +92 PB6 CAN2_TX JP11 + I2C1_SCL +93 PB7 I2C1_SDA +95 PB8 USB_PWR Drives USB VBUS +96 PB9 F_CS To both the TFT LCD (CN13) and to the W25X16 SPI FLASH +47 PB10 USERKEY Connected to KEY2 +48 PB11 MII_TX_EN Ethernet PHY +51 PB12 I2S_WS Audio DAC + MII_TXD0 Ethernet PHY +52 PB13 I2S_CK Audio DAC + MII_TXD1 Ethernet PHY +53 PB14 SD_CD There is confusion here. Schematic is wrong LCD_WR is PB14. +54 PB15 I2S_DIN Audio DAC + +-- ---- -------------- ------------------------------------------------------------------- +PN NAME SIGNAL NOTES +-- ---- -------------- ------------------------------------------------------------------- +15 PC0 POTENTIO_METER +16 PC1 MII_MDC Ethernet PHY +17 PC2 WIRELESS_INT +18 PC3 WIRELESS_CE To the NRF24L01 2.4G wireless module +33 PC4 USERKEY2 Connected to KEY1 +34 PC5 TP_INT JP6. To TFT LCD (CN13) module + MII_INT Ethernet PHY +63 PC6 I2S_MCK Audio DAC. Active low: Pulled high +64 PC7 PCM1770_CS Audio DAC. Active low: Pulled high +65 PC8 LCD_CS TFT LCD (CN13). Active low: Pulled high +66 PC9 TP_CS TFT LCD (CN13). Active low: Pulled high +78 PC10 SPI3_SCK To TFT LCD (CN13), the NRF24L01 2.4G wireless module +79 PC11 SPI3_MISO To TFT LCD (CN13), the NRF24L01 2.4G wireless module +80 PC12 SPI3_MOSI To TFT LCD (CN13), the NRF24L01 2.4G wireless module +7 PC13 TAMPER Connected to KEY3 +8 PC14 OSC32_IN Y1 32.768Khz XTAL +9 PC15 OSC32_OUT Y1 32.768Khz XTAL + +-- ---- -------------- ------------------------------------------------------------------- +PN NAME SIGNAL NOTES +-- ---- -------------- ------------------------------------------------------------------- +81 PD0 CAN1_RX +82 PD1 CAN1_TX +83 PD2 LED1 Active low: Pulled high +84 PD3 LED2 Active low: Pulled high +85 PD4 LED3 Active low: Pulled high +86 PD5 485_TX Same as USART2_TX but goes to SP3485 + USART2_TX MAX3232 to CN6 +87 PD6 485_RX Save as USART2_RX but goes to SP3485 (see JP4) + USART2_RX MAX3232 to CN6 +88 PD7 LED4 Active low: Pulled high + 485_DIR SP3485 read enable (not) +55 PD8 MII_RX_DV Ethernet PHY + RMII_CRSDV Ethernet PHY +56 PD9 MII_RXD0 Ethernet PHY +57 PD10 MII_RXD1 Ethernet PHY +58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32) +59 PD12 WIRELESS_CS To the NRF24L01 2.4G wireless module +60 PD13 LCD_RS To TFT LCD (CN13) +61 PD14 LCD_WR To TFT LCD (CN13). Schematic is wrong LCD_WR is PB14. +62 PD15 LCD_RD To TFT LCD (CN13) + +-- ---- -------------- ------------------------------------------------------------------- +PN NAME SIGNAL NOTES +-- ---- -------------- ------------------------------------------------------------------- +97 PE0 DB00 To TFT LCD (CN13) +98 PE1 DB01 To TFT LCD (CN13) +1 PE2 DB02 To TFT LCD (CN13) +2 PE3 DB03 To TFT LCD (CN13) +3 PE4 DB04 To TFT LCD (CN13) +4 PE5 DB05 To TFT LCD (CN13) +5 PE6 DB06 To TFT LCD (CN13) +38 PE7 DB07 To TFT LCD (CN13) +39 PE8 DB08 To TFT LCD (CN13) +40 PE9 DB09 To TFT LCD (CN13) +41 PE10 DB10 To TFT LCD (CN13) +42 PE11 DB11 To TFT LCD (CN13) +43 PE12 DB12 To TFT LCD (CN13) +44 PE13 DB13 To TFT LCD (CN13) +45 PE14 DB14 To TFT LCD (CN13) +46 PE15 DB15 To TFT LCD (CN13) + +-- ---- -------------- ------------------------------------------------------------------- +PN NAME SIGNAL NOTES +-- ---- -------------- ------------------------------------------------------------------- +73 N/C + +12 OSC_IN Y2 25Mhz XTAL +13 OSC_OUT Y2 25Mhz XTAL + +94 BOOT0 JP15 (3.3V or GND) +14 RESET S5 +6 VBAT JP14 (3.3V or battery) + +49 VSS_1 GND +74 VSS_2 GND +99 VSS_3 GND +27 VSS_4 GND +10 VSS_5 GND +19 VSSA VSSA +20 VREF- VREF- + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment because the development tools that I used only work under Windows. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, or + 5. The NuttX buildroot Toolchain (see below). + + Most testing has been conducted using the CodeSourcery toolchain for Windows and + that is the default toolchain in most configurations. To use the Atollic, + devkitARM, Raisonance GNU, or NuttX buildroot toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcery (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI buildroot Toolchain +============================== + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh shenzhou/ + + cd .. + make context + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit nuttx/.config to select the buildroot toolchain as described above + and below: + + -CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y + +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y + + 9. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + -export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + + -#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +==== + +The Shenzhou board has four LEDs labeled LED1, LED2, LED3 and LED4 on the +board. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/up_leds.c. The LEDs are used to encode OS-related +events as follows: + + SYMBOL Meaning LED1* LED2 LED3 LED4**** + ------------------- ----------------------- ------- ------- ------- ------ + LED_STARTED NuttX has been started ON OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF + LED_IRQSENABLED Interrupts enabled ON ON OFF OFF + LED_STACKCREATED Idle stack created OFF OFF ON OFF + LED_INIRQ In an interrupt** ON N/C N/C OFF + LED_SIGNAL In a signal handler*** N/C ON N/C OFF + LED_ASSERTION An assertion failed ON ON N/C OFF + LED_PANIC The system has crashed N/C N/C N/C ON + LED_IDLE STM32 is is sleep mode (Optional, not used) + + * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot + and these LEDs will give you some indication of where the failure was + ** The normal state is LED1 ON and LED1 faintly glowing. This faint glow + is because of timer interrupts that result in the LED being illuminated + on a small proportion of the time. + *** LED2 may also flicker normally if signals are processed. +**** LED4 may not be available if RS-485 is also used. For RS-485, it will + then indicate the RS-485 direction. + +Shenzhou-specific Configuration Options +============================================ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32F107VC=y + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=shenzhou (for the Shenzhou development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SHENZHOU=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + AHB + --- + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + CONFIG_STM32_CRC + CONFIG_STM32_ETHMAC + CONFIG_STM32_OTGFS + CONFIG_STM32_IWDG + CONFIG_STM32_PWR -- Required for RTC + + APB1 (low speed) + ---------------- + CONFIG_STM32_BKP + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI3 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_CAN1 + CONFIG_STM32_CAN2 + CONFIG_STM32_DAC1 + CONFIG_STM32_DAC2 + CONFIG_STM32_WWDG + + APB2 (high speed) + ----------------- + CONFIG_STM32_TIM1 + CONFIG_STM32_SPI1 + CONFIG_STM32_USART1 + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + + Timer and I2C devices may need to the following to force power to be applied + unconditionally at power up. (Otherwise, the device is powered when it is + initialized). + + CONFIG_STM32_FORCEPOWER + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + JTAG Enable settings (by default JTAG-DP and SW-DP are disabled): + + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + + STM32107xxx specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + + CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board + CONFIG_STM32_MII - Support Ethernet MII interface + CONFIG_STM32_MII_MCO - Use MCO to clock the MII interface + CONFIG_STM32_RMII - Support Ethernet RMII interface + CONFIG_STM32_RMII_MCO - Use MCO to clock the RMII interface + CONFIG_STM32_AUTONEG - Use PHY autonegotion to determine speed and mode + CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this + may be defined to select full duplex mode. Default: half-duplex + CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this + may be defined to select 100 MBps speed. Default: 10 Mbps + CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is + defined. The PHY status register address may diff from PHY to PHY. This + configuration sets the address of the PHY status register. + CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides bit mask indicating 10 or 100MBps speed. + CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides the value of the speed bit(s) indicating 100MBps speed. + CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provide bit mask indicating full or half duplex modes. + CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides the value of the mode bits indicating full duplex mode. + CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported + but some hooks are indicated with this condition. + + Shenzhou CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + + Shenzhou LCD Hardware Configuration + + The LCD driver supports the following LCDs on the STM324xG_EVAL board: + + AM-240320L8TNQW00H (LCD_ILI9320 or LCD_ILI9321) OR + AM-240320D5TOQW01H (LCD_ILI9325) + + Configuration options. + + CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape" + support. Default is this 320x240 "landscape" orientation + For the Shenzhou board, the edge opposite from the row of buttons + is used as the top of the display in this orientation. + CONFIG_LCD_RLANDSCAPE - Define for 320x240 display "reverse + landscape" support. Default is this 320x240 "landscape" + orientation + For the Shenzhou board, the edge next to the row of buttons + is used as the top of the display in this orientation. + CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait" + orientation support. + CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse + portrait" orientation support. + CONFIG_LCD_RDSHIFT - When reading 16-bit gram data, there appears + to be a shift in the returned data. This value fixes the offset. + Default 5. + + The LCD driver dynamically selects the LCD based on the reported LCD + ID value. However, code size can be reduced by suppressing support for + individual LCDs using: + + CONFIG_STM32_ILI9320_DISABLE (includes ILI9321) + CONFIG_STM32_ILI9325_DISABLE + + STM32 USB OTG FS Host Driver Support + + Pre-requisites + + CONFIG_USBHOST - Enable USB host support + CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block + CONFIG_STM32_SYSCFG - Needed + CONFIG_SCHED_WORKQUEUE - Worker thread support is required + + Options: + + CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. + Default 128 (512 bytes) + CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO + in 32-bit words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit + words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128 + CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever + want to do that? + CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access + debug. Depends on CONFIG_DEBUG. + CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB + packets. Depends on CONFIG_DEBUG. + +Configurations +============== + +Each Shenzhou configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh shenzhou/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables both the serial and telnet NSH interfaces. + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_NSH_DHCPC=n : DHCP is disabled + CONFIG_NSH_IPADDR=0x0a000002 : Target IP address 10.0.0.2 + CONFIG_NSH_DRIPADDR=0x0a000001 : Host IP address 10.0.0.1 + + NOTES: + 1. This example assumes that a network is connected. During its + initialization, it will try to negotiate the link speed. If you have + no network connected when you reset the board, there will be a long + delay (maybe 30 seconds?) before anything happens. That is the timeout + before the networking finally gives up and decides that no network is + available. + + 2. Enabling the ADC example: + + The only internal signal for ADC testing is the potentiometer input: + + ADC1_IN10(PC0) Potentiometer + + External signals are also available on CON5 CN14: + + ADC_IN8 (PB0) CON5 CN14 Pin2 + ADC_IN9 (PB1) CON5 CN14 Pin1 + + The signal selection is hard-coded in configs/shenzhou/src/up_adc.c: The + potentiometer input (only) is selected. + + These selections will enable sampling the potentiometer input at 100Hz using + Timer 1: + + CONFIG_ANALOG=y : Enable analog device support + CONFIG_ADC=y : Enable generic ADC driver support + CONFIG_ADC_DMA=n : ADC DMA is not supported + CONFIG_STM32_ADC1=y : Enable ADC 1 + CONFIG_STM32_TIM1=y : Enable Timer 1 + CONFIG_STM32_TIM1_ADC=y : Use Timer 1 for ADC + CONFIG_STM32_TIM1_ADC1=y : Allocate Timer 1 to ADC 1 + CONFIG_STM32_ADC1_SAMPLE_FREQUENCY=100 : Set sampling frequency to 100Hz + CONFIG_STM32_ADC1_TIMTRIG=0 : Trigger on timer output 0 + CONFIG_STM32_FORCEPOWER=y : Apply power to TIM1 a boot up time + CONFIG_EXAMPLES_ADC=y : Enable the apps/examples/adc built-in + + nxwm + ---- + This is a special configuration setup for the NxWM window manager + UnitTest. The NxWM window manager can be found here: + + nuttx-code/NxWidgets/nxwm + + The NxWM unit test can be found at: + + nuttx-code/NxWidgets/UnitTests/nxwm + + NOTE: JP6 selects between the touchscreen interrupt and the MII + interrupt. It should be positioned 1-2 to enable the touchscreen + interrupt. + + Documentation for installing the NxWM unit test can be found here: + + nuttx-code/NxWidgets/UnitTests/README.txt + + Here is the quick summary of the build steps (Assuming that all of + the required packages are available in a directory ~/nuttx-code): + + 1. Intall the nxwm configuration + + $ cd ~/nuttx-code/tools + $ ./configure.sh shenzhou/nxwm + + 2. Make the build context (only) + + $ cd .. + $ . ./setenv.sh + $ make context + ... + + 3. Install the nxwm unit test + + $ cd ~/nuttx-code/NxWidgets + $ tools/install.sh ~/nuttx-code/apps nxwm + Creating symbolic link + - To ~/nuttx-code/NxWidgets/UnitTests/nxwm + - At ~/nuttx-code/apps/external + + 4. Build the NxWidgets library + + $ cd ~/nuttx-code/NxWidgets/libnxwidgets + $ make TOPDIR=~/nuttx-code + ... + + 5. Build the NxWM library + + $ cd ~/nuttx-code/NxWidgets/nxwm + $ make TOPDIR=~/nuttx-code + ... + + 6. Built NuttX with the installed unit test as the application + + $ cd ~/nuttx-code + $ make + + NOTE: Reading from the LCD is not currently supported by this + configuration. The hardware will support reading from the LCD + and drivers/lcd/ssd1289.c also supports reading from the LCD. + This limits some graphics capabilities. + + Reading from the LCD is not supported only because it has not + been test. If you get inspired to test this feature, you can + turn the LCD read functionality on by setting: + + -CONFIG_LCD_NOGETRUN=y + +# CONFIG_LCD_NOGETRUN is not set + + -CONFIG_NX_WRITEONLY=y + +# CONFIG_NX_WRITEONLY is not set + + thttpd + ------ + + This builds the THTTPD web server example using the THTTPD and + the apps/examples/thttpd application. + + NOTE: See note above with regard to the EABI/OABI buildroot + toolchains. This example can only be built using the older + OABI toolchain due to incompatibilities introduced in later + GCC releases. diff --git a/configs/shenzhou/include/board.h b/configs/shenzhou/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..c7b60a9ca3d3d5ff7c4045fbb5245bf2e7198fde --- /dev/null +++ b/configs/shenzhou/include/board.h @@ -0,0 +1,425 @@ +/************************************************************************************ + * configs/shenzhou/include/board.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SHENZHOU_INCLUDE_BOARD_H +#define __CONFIGS_SHENZHOU_INCLUDE_BOARD_H 1 + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* HSI - 8 MHz RC factory-trimmed + * LSI - 40 KHz RC (30-60KHz, uncalibrated) + * HSE - On-board crystal frequency is 25MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 25000000ul + +#define STM32_HSI_FREQUENCY 8000000ul +#define STM32_LSI_FREQUENCY 40000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* PLL ouput is 72MHz */ + +#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */ +#define STM32_PLL_PLL2MUL RCC_CFGR2_PLL2MULx8 /* 5MHz * 8 => 40MHz */ +#define STM32_PLL_PREDIV1 RCC_CFGR2_PREDIV1d5 /* 40MHz / 5 => 8MHz */ +#define STM32_PLL_PLLMUL RCC_CFGR_PLLMUL_CLKx9 /* 8MHz * 9 => 72Mhz */ +#define STM32_PLL_FREQUENCY (72000000) + +/* SYCLLK and HCLK are the PLL frequency */ + +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (72MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */ + +/* APB2 timers 1 and 8 will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* MCO output driven by PLL3. From above, we already have PLL3 input frequency as: + * + * STM32_PLL_PREDIV2 = 5, 25MHz / 5 => 5MHz + */ + +#if defined(CONFIG_STM32_MII_MCO) || defined(CONFIG_STM32_RMII_MCO) +# define BOARD_CFGR_MCO_SOURCE RCC_CFGR_PLL3CLK /* Source: PLL3 */ +# define STM32_PLL_PLL3MUL RCC_CFGR2_PLL3MULx10 /* MCO 5MHz * 10 = 50MHz */ +#endif + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_LED3 2 +#define BOARD_LED4 3 +#define BOARD_NLEDS 4 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) +#define BOARD_LED4_BIT (1 << BOARD_LED4) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the + * STM3240G-EVAL. The following definitions describe how NuttX controls the LEDs: + */ + +#define LED_STARTED 0 /* LED1 */ +#define LED_HEAPALLOCATE 1 /* LED2 */ +#define LED_IRQSENABLED 2 /* LED1 + LED2 */ +#define LED_STACKCREATED 3 /* LED3 */ +#define LED_INIRQ 4 /* LED1 + LED3 */ +#define LED_SIGNAL 5 /* LED2 + LED3 */ +#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */ +#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */ + +/* Button definitions ***************************************************************/ +/* The STM3240G-EVAL supports three buttons: */ + +#define BUTTON_KEY1 0 /* Name printed on board */ +#define BUTTON_KEY2 1 +#define BUTTON_KEY3 2 +#define BUTTON_KEY4 3 +#define NUM_BUTTONS 4 + +#define BUTTON_USERKEY2 BUTTON_KEY1 /* Names in schematic */ +#define BUTTON_USERKEY BUTTON_KEY2 +#define BUTTON_TAMPER BUTTON_KEY3 +#define BUTTON_WAKEUP BUTTON_KEY4 + +#define BUTTON_KEY1_BIT (1 << BUTTON_KEY1) +#define BUTTON_KEY2_BIT (1 << BUTTON_KEY2) +#define BUTTON_KEY3_BIT (1 << BUTTON_KEY3) +#define BUTTON_KEY4_BIT (1 << BUTTON_KEY4) + +#define BUTTON_USERKEY2_BIT BUTTON_KEY1_BIT +#define BUTTON_USERKEY_BIT BUTTON_KEY2_BIT +#define BUTTON_TAMPER_BIT BUTTON_KEY3_BIT +#define BUTTON_WAKEUP_BIT BUTTON_KEY4_BIT + +/* Relays */ + +#define NUM_RELAYS 2 + +/* Pin selections ******************************************************************/ +/* Ethernet + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 24 PA1 MII_RX_CLK Ethernet PHY NOTE: Despite the MII labeling of these + * RMII_REF_CLK Ethernet PHY signals, the DM916AEP is actually configured + * 25 PA2 MII_MDIO Ethernet PHY to work in RMII mode. + * 48 PB11 MII_TX_EN Ethernet PHY + * 51 PB12 MII_TXD0 Ethernet PHY + * 52 PB13 MII_TXD1 Ethernet PHY + * 16 PC1 MII_MDC Ethernet PHY + * 34 PC5 MII_INT Ethernet PHY + * 55 PD8 MII_RX_DV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * 55 PD8 RMII_CRSDV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * 56 PD9 MII_RXD0 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * 57 PD10 MII_RXD1 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * + * The board desdign can support a 50MHz external clock to drive the PHY + * (U9). However, on my board, U9 is not present. + * + * 67 PA8 MCO DM9161AEP + */ + +#ifdef CONFIG_STM32_ETHMAC +# ifndef CONFIG_STM32_ETH_REMAP +# error "STM32 Ethernet requires CONFIG_STM32_ETH_REMAP" +# endif +# ifndef CONFIG_STM32_RMII +# error "STM32 Ethernet requires CONFIG_STM32_RMII" +# endif +# ifndef CONFIG_STM32_RMII_MCO +# error "STM32 Ethernet requires CONFIG_STM32_RMII_MCO" +# endif +#endif + +/* USB + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 68 PA9 USB_VBUS MINI-USB-AB. JP3 + * 69 PA10 USB_ID MINI-USB-AB. JP5 + * 70 PA11 USB_DM MINI-USB-AB + * 71 PA12 USB_DP MINI-USB-AB + * 95 PB8 USB_PWR Drives USB VBUS + */ + +/* UARTS/USARTS + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 68 PA9 USART1_TX MAX3232 to CN5. Requires CONFIG_STM32_USART1_REMAP + * 69 PA10 USART1_RX MAX3232 to CN5. Requires CONFIG_STM32_USART1_REMAP + * 86 PD5 USART2_TX MAX3232 to CN6. Requires CONFIG_STM32_USART2_REMAP + * 87 PD6 USART2_RX MAX3232 to CN6. Requires CONFIG_STM32_USART2_REMAP + * 86 PD5 485_TX Same as USART2_TX but goes to SP3485 + * 87 PD6 485_RX Save as USART2_RX but goes to SP3485 (see JP4) + */ + +#if defined(CONFIG_STM32_USART1) && !defined(CONFIG_STM32_USART1_REMAP) +# error "CONFIG_STM32_USART1 requires CONFIG_STM32_USART1_REMAP" +#endif + +#if defined(CONFIG_STM32_USART2) && !defined(CONFIG_STM32_USART2_REMAP) +# error "CONFIG_STM32_USART2 requires CONFIG_STM32_USART2_REMAP" +#endif + +/* SPI + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 30 PA5 SPI1_SCK To the SD card, SPI FLASH. + * Requires !CONFIG_STM32_SPI1_REMAP + * 31 PA6 SPI1_MISO To the SD card, SPI FLASH. + * Requires !CONFIG_STM32_SPI1_REMAP + * 32 PA7 SPI1_MOSI To the SD card, SPI FLASH. + * Requires !CONFIG_STM32_SPI1_REMAP + * 78 PC10 SPI3_SCK To TFT LCD (CN13), the NRF24L01 2.4G wireless module. + * Requires CONFIG_STM32_SPI3_REMAP. + * 79 PC11 SPI3_MISO To TFT LCD (CN13), the NRF24L01 2.4G wireless module. + * Requires CONFIG_STM32_SPI3_REMAP. + * 80 PC12 SPI3_MOSI To TFT LCD (CN13), the NRF24L01 2.4G wireless module. + * Requires CONFIG_STM32_SPI3_REMAP. + */ + +#if defined(CONFIG_STM32_SPI1) && defined(CONFIG_STM32_SPI1_REMAP) +# error "CONFIG_STM32_SPI1 must not have CONFIG_STM32_SPI1_REMAP" +#endif + +#if defined(CONFIG_STM32_SPI3) && !defined(CONFIG_STM32_SPI3_REMAP) +# error "CONFIG_STM32_SPI3 requires CONFIG_STM32_SPI3_REMAP" +#endif + +/* DAC + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 29 PA4 DAC_OUT1 To CON5(CN14) + * 30 PA5 DAC_OUT2 To CON5(CN14). JP10 + */ + +/* ADC + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 35 PB0 ADC_IN1 GPIO_ADC12_IN8. To CON5(CN14) + * 36 PB1 ADC_IN2 GPIO_ADC12_IN9. To CON5(CN14) + * 15 PC0 POTENTIO_METER GPIO_ADC12_IN10 + */ + +/* CAN + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 91 PB5 CAN2_RX Requires CONFIG_STM32_CAN2_REMAP. + * 92 PB6 CAN2_TX Requires CONFIG_STM32_CAN2_REMAP. See also JP11 + * 81 PD0 CAN1_RX Requires CONFIG_STM32_CAN1_REMAP2. + * 82 PD1 CAN1_TX Requires CONFIG_STM32_CAN1_REMAP2. + */ + +#if defined(CONFIG_STM32_CAN1) && !defined(CONFIG_STM32_CAN1_REMAP2) +# error "CONFIG_STM32_CAN1 requires CONFIG_STM32_CAN1_REMAP2" +#endif + +#if defined(CONFIG_STM32_CAN2) && !defined(CONFIG_STM32_CAN2_REMAP) +# error "CONFIG_STM32_CAN2 requires CONFIG_STM32_CAN2_REMAP" +#endif + +/* I2C + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 92 PB6 I2C1_SCL Requires !CONFIG_STM32_I2C1_REMAP + * 93 PB7 I2C1_SDA + */ + +#if defined(CONFIG_STM32_I2C1) && defined(CONFIG_STM32_I2C1_REMAP) +# error "CONFIG_STM32_I2C1 must not have CONFIG_STM32_I2C1_REMAP" +#endif + +/* I2S + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 51 PB12 I2S_WS GPIO_I2S2_WS. Audio DAC + * 52 PB13 I2S_CK GPIO_I2S2_CK. Audio DAC + * 54 PB15 I2S_DIN ??? Audio DAC data in. + * 63 PC6 I2S_MCK GPIO_I2S2_MCK. Audio DAC. Active low: Pulled high + */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +/************************************************************************************ + * Name: stm32_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the Shenzhou board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * display is cleared by simply setting all GRAM memory to the specified color. + * + ************************************************************************************/ + +void stm32_lcdclear(uint16_t color); + +/************************************************************************************ + * Relay control functions + * + * Description: + * Non-standard functions for relay control from the Shenzhou board. + * + * NOTE: These must match the prototypes in include/nuttx/arch.h + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_RELAYS +void up_relaysinit(void); +void relays_setstat(int relays, bool stat); +bool relays_getstat(int relays); +void relays_setstats(uint32_t relays_stat); +uint32_t relays_getstats(void); +void relays_onoff(int relays, uint32_t mdelay); +void relays_onoffs(uint32_t relays_stat, uint32_t mdelay); +void relays_resetmode(int relays); +void relays_powermode(int relays); +void relays_resetmodes(uint32_t relays_stat); +void relays_powermodes(uint32_t relays_stat); +#endif + +/************************************************************************************ + * Chip ID functions + * + * Description: + * Non-standard functions to obtain chip ID information. + * + ************************************************************************************/ + +const char *stm32_getchipid(void); +const char *stm32_getchipid_string(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SHENZHOU_INCLUDE_BOARD_H */ diff --git a/configs/shenzhou/nsh/Make.defs b/configs/shenzhou/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c97f815e94b3359ca027fa790529bdf5c1badd6e --- /dev/null +++ b/configs/shenzhou/nsh/Make.defs @@ -0,0 +1,119 @@ +############################################################################ +# configs/shenzhou/nsh/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +# Pick the linker script + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-eabi-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/shenzhou/nsh/defconfig b/configs/shenzhou/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d0b0b741d7ac684c66560b52d0049743ea590fae --- /dev/null +++ b/configs/shenzhou/nsh/defconfig @@ -0,0 +1,1378 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +CONFIG_ARCH_CHIP_STM32F107VC=y +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +CONFIG_STM32_CONNECTIVITYLINE=y +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +CONFIG_STM32_HAVE_ETHMAC=y +# CONFIG_STM32_HAVE_I2C2 is not set +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +CONFIG_STM32_BKP=y +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_OTGFS is not set +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +CONFIG_STM32_ETH_REMAP=y +# CONFIG_STM32_SPI1_REMAP is not set +CONFIG_STM32_USART2_REMAP=y +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=0 +# CONFIG_STM32_PHYINIT is not set +# CONFIG_STM32_MII is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=17 +CONFIG_STM32_PHYSR_ALTCONFIG=y +CONFIG_STM32_PHYSR_ALTMODE=0xf000 +CONFIG_STM32_PHYSR_10HD=0x1000 +CONFIG_STM32_PHYSR_100HD=0x4000 +CONFIG_STM32_PHYSR_10FD=0x2000 +CONFIG_STM32_PHYSR_100FD=0x8000 +# CONFIG_STM32_ETH_PTP is not set +CONFIG_STM32_RMII=y +CONFIG_STM32_RMII_MCO=y +# CONFIG_STM32_RMII_EXTCLK is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_CLOUDCTRL is not set +# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set +CONFIG_ARCH_BOARD_SHENZHOU=y +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="shenzhou" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=1 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +# CONFIG_RTC_DATETIME is not set +# CONFIG_RTC_HIRES is not set +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +CONFIG_ETH0_PHY_DM9161=y +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +# CONFIG_HAVE_CXXINITIALIZE is not set +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/shenzhou/nsh/setenv.sh b/configs/shenzhou/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..79f9579706471595ba74ca73827a978e16d9eb4f --- /dev/null +++ b/configs/shenzhou/nsh/setenv.sh @@ -0,0 +1,78 @@ +#!/bin/bash +# configs/shenzhou/nsh/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the tools/ subdirectory +export TOOLS_DIR="${WD}/configs/shenzhou/tools" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:${TOOLS_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/shenzhou/nxwm/Make.defs b/configs/shenzhou/nxwm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..4419270766935e4a715262587790e9bcb2f7e1b9 --- /dev/null +++ b/configs/shenzhou/nxwm/Make.defs @@ -0,0 +1,119 @@ +############################################################################ +# configs/shenzhou/nxwm/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +# Pick the linker script + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-eabi-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/shenzhou/nxwm/defconfig b/configs/shenzhou/nxwm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..46709722a30d2d6ec25668c032dcc564ad1a51ed --- /dev/null +++ b/configs/shenzhou/nxwm/defconfig @@ -0,0 +1,1708 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +CONFIG_ARCH_CHIP_STM32F107VC=y +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +CONFIG_STM32_CONNECTIVITYLINE=y +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +CONFIG_STM32_HAVE_ETHMAC=y +# CONFIG_STM32_HAVE_I2C2 is not set +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +CONFIG_STM32_SPI3=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +CONFIG_STM32_ETH_REMAP=y +CONFIG_STM32_SPI3_REMAP=y +CONFIG_STM32_USART2_REMAP=y +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=0 +# CONFIG_STM32_PHYINIT is not set +# CONFIG_STM32_MII is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=17 +CONFIG_STM32_PHYSR_ALTCONFIG=y +CONFIG_STM32_PHYSR_ALTMODE=0xf000 +CONFIG_STM32_PHYSR_10HD=0x1000 +CONFIG_STM32_PHYSR_100HD=0x4000 +CONFIG_STM32_PHYSR_10FD=0x2000 +CONFIG_STM32_PHYSR_100FD=0x8000 +# CONFIG_STM32_ETH_PTP is not set +CONFIG_STM32_RMII=y +CONFIG_STM32_RMII_MCO=y +# CONFIG_STM32_RMII_EXTCLK is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_CLOUDCTRL is not set +# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set +CONFIG_ARCH_BOARD_SHENZHOU=y +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="shenzhou" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# LCD Controller Selection +# + +# +# Disable Unused LCD Controllers +# +# CONFIG_STM32_ILI1505_DISABLE is not set +# CONFIG_STM32_ILI9300_DISABLE is not set +# CONFIG_STM32_ILI9320_DISABLE is not set +# CONFIG_STM32_ILI9321_DISABLE is not set +# CONFIG_STM32_ILI9325_DISABLE is not set +# CONFIG_STM32_ILI9328_DISABLE is not set +# CONFIG_STM32_ILI9331_DISABLE is not set +# CONFIG_STM32_ILI9919_DISABLE is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=9 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxwm_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=12 +CONFIG_NFILE_STREAMS=12 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=48 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +CONFIG_INPUT_ADS7843E=y +# CONFIG_ADS7843E_MULTIPLE is not set +CONFIG_ADS7843E_SPIDEV=0 +CONFIG_ADS7843E_DEVMINOR=0 +CONFIG_ADS7843E_SPIMODE=0 +CONFIG_ADS7843E_FREQUENCY=100000 +CONFIG_ADS7843E_SWAPXY=y +CONFIG_ADS7843E_THRESHX=39 +CONFIG_ADS7843E_THRESHY=51 +# CONFIG_INPUT_MXT is not set +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +CONFIG_LCD_NOGETRUN=y +CONFIG_LCD_MAXCONTRAST=1 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +CONFIG_LCD_SSD1289=y +CONFIG_SSD1289_PROFILE1=y +# CONFIG_SSD1289_PROFILE2 is not set +# CONFIG_SSD1289_PROFILE3 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +CONFIG_ETH0_PHY_DM9161=y +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=16 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +CONFIG_NX_WRITEONLY=y + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +# CONFIG_NX_XYINPUT_MOUSE is not set +CONFIG_NX_XYINPUT_TOUCHSCREEN=y +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0x5cb7 +CONFIG_NXTK_BORDERCOLOR2=0x21c9 +CONFIG_NXTK_BORDERCOLOR3=0xffdf +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +CONFIG_NXFONT_SANS22X29B=y +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +CONFIG_NXTERM=y + +# +# NxTerm Output Text/Graphics Options +# +CONFIG_NXTERM_BPP=16 +CONFIG_NXTERM_CURSORCHAR=137 +CONFIG_NXTERM_MXCHARS=325 +CONFIG_NXTERM_CACHESIZE=32 +CONFIG_NXTERM_LINESEPARATION=0 +# CONFIG_NXTERM_NOWRAP is not set + +# +# NxTerm Input options +# +CONFIG_NXTERM_NXKBDIN=y +CONFIG_NXTERM_KBDBUFSIZE=16 +CONFIG_NXTERM_NPOLLWAITERS=4 + +# +# NX Multi-user only options +# +CONFIG_NX_MULTIUSER=y +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXSERVERMSGS=32 +CONFIG_NX_MXCLIENTMSGS=16 +# CONFIG_NX_NXSTART is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=1596 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=1596 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# +CONFIG_NXWIDGETS=y + +# +# NX Server/Device Configuration +# +CONFIG_NXWIDGETS_FLICKERFREE=y +# CONFIG_NXWIDGETS_EXTERNINIT is not set +CONFIG_NXWIDGETS_DEVNO=0 +CONFIG_NXWIDGET_SERVERINIT=y +CONFIG_NXWIDGETS_SERVERPRIO=110 +CONFIG_NXWIDGETS_SERVERSTACK=1596 +CONFIG_NXWIDGETS_CLIENTPRIO=100 +CONFIG_NXWIDGETS_LISTENERPRIO=100 +CONFIG_NXWIDGETS_LISTENERSTACK=1596 +# CONFIG_NXWIDGET_EVENTWAIT is not set + +# +# NXWidget Configuration +# +CONFIG_NXWIDGETS_BPP=16 +CONFIG_NXWIDGETS_SIZEOFCHAR=1 + +# +# NXWidget Default Values +# +# CONFIG_NXWIDGETS_SYSTEM_CUSTOM_FONTID is not set +CONFIG_NXWIDGETS_TNXARRAY_INITIALSIZE=16 +CONFIG_NXWIDGETS_TNXARRAY_SIZEINCREMENT=8 +# CONFIG_NXWIDGETS_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_TEXTCOLORS is not set +CONFIG_NXWIDGETS_TRANSPARENT_COLOR=0x0 + +# +# Keypad behavior +# +CONFIG_NXWIDGETS_FIRST_REPEAT_TIME=500 +CONFIG_NXWIDGETS_CONTINUE_REPEAT_TIME=200 +CONFIG_NXWIDGETS_DOUBLECLICK_TIME=350 +CONFIG_NXWIDGETS_KBDBUFFER_SIZE=16 +CONFIG_NXWIDGETS_CURSORCONTROL_SIZE=4 +# CONFIG_NXWIDGET_MEMMONITOR is not set +CONFIG_NXWM=y + +# +# NxWM General Settings +# +# CONFIG_NXWM_LARGE_ICONS is not set +# CONFIG_NXWM_CUSTOM_FONTID is not set +CONFIG_NXWM_UNITTEST=y + +# +# Color configuration +# +# CONFIG_NXWM_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWM_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWM_CUSTOM_TEXTCOLORS is not set + +# +# Background Image +# +# CONFIG_NXWM_DISABLE_BACKGROUND_IMAGE is not set +CONFIG_NXWM_BACKGROUND_IMAGE="" + +# +# NxWM Taskbar Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_TASKBAR_VSPACING=4 +CONFIG_NXWM_TASKBAR_HSPACING=2 +# CONFIG_NXWM_TASKBAR_TOP is not set +# CONFIG_NXWM_TASKBAR_BOTTOM is not set +CONFIG_NXWM_TASKBAR_LEFT=y +# CONFIG_NXWM_TASKBAR_RIGHT is not set +# CONFIG_NXWM_CUSTOM_TASKBAR_WIDTH is not set +# CONFIG_NXWM_TASKBAR_ICONSCALE is not set +# CONFIG_NXWM_DISABLE_MINIMIZE is not set +# CONFIG_NXWM_TASKBAR_NO_BORDER is not set + +# +# NxWM Toolbar Configuration +# +# CONFIG_NXWM_CUSTOM_TOOLBAR_HEIGHT is not set +# CONFIG_NXWM_TOOLBAR_CUSTOM_FONTID is not set + +# +# NxWM Application Window Configuration +# +# CONFIG_NXWM_CUSTOM_APPWINDOW_ICONS is not set + +# +# NxWM Start Window Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_STARTWINDOW_VSPACING=4 +CONFIG_NXWM_STARTWINDOW_HSPACING=4 +# CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set +CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm" +CONFIG_NXWM_STARTWINDOW_MXMSGS=32 +CONFIG_NXWM_STARTWINDOW_MXMPRIO=42 +CONFIG_NXWM_STARTWINDOW_PRIO=100 +CONFIG_NXWM_STARTWINDOW_STACKSIZE=1596 + +# +# NxTerm Window Settings +# +CONFIG_NXWM_NXTERM=y +CONFIG_NXWM_NXTERM_PRIO=100 +CONFIG_NXWM_NXTERM_STACKSIZE=1596 +# CONFIG_NXWM_NXTERM_CUSTOM_COLORS is not set +# CONFIG_NXWM_NXTERM_CUSTOM_FONTID is not set +# CONFIG_NXWM_CUSTOM_NXTERM_ICON is not set + +# +# NxWM Touchscreen Configuration +# +CONFIG_NXWM_TOUCHSCREEN=y + +# +# Touchscreen Device Settings +# +CONFIG_NXWM_TOUCHSCREEN_DEVINIT=y +CONFIG_NXWM_TOUCHSCREEN_DEVNO=0 +CONFIG_NXWM_TOUCHSCREEN_DEVPATH="/dev/input0" +CONFIG_NXWM_TOUCHSCREEN_SIGNO=5 +CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=100 +CONFIG_NXWM_TOUCHSCREEN_LISTENERSTACK=1596 + +# +# NxWM Keyboard Configuration +# +CONFIG_NXWM_KEYBOARD=y + +# +# Keyboard Device Settings +# +CONFIG_NXWM_KEYBOARD_DEVPATH="/dev/console" +# CONFIG_NXWM_KEYBOARD_USBHOST is not set +CONFIG_NXWM_KEYBOARD_SIGNO=6 +CONFIG_NXWM_KEYBOARD_BUFSIZE=16 +CONFIG_NXWM_KEYBOARD_LISTENERPRIO=100 +CONFIG_NXWM_KEYBOARD_LISTENERSTACK=1024 + +# +# NxWM Calibration Display Settings +# +CONFIG_NXWM_CALIBRATION_MARGIN=40 +# CONFIG_NXWM_CALIBRATION_CUSTOM_COLORS is not set +# CONFIG_NXWM_CALIBRATION_MESSAGES is not set +# CONFIG_NXWM_CALIBRATION_ANISOTROPIC is not set +# CONFIG_NXWM_CUSTOM_CALIBRATION_ICON is not set +CONFIG_NXWM_CALIBRATION_SIGNO=5 +CONFIG_NXWM_CALIBRATION_LISTENERPRIO=100 +CONFIG_NXWM_CALIBRATION_LISTENERSTACK=1024 + +# +# NxWM Hex Calculator Display Settings +# +# CONFIG_NXWM_HEXCALCULATOR_CUSTOM_COLORS is not set +# CONFIG_NXWM_CUSTOM_HEXCALCULATOR_ICON is not set +CONFIG_NXWM_HEXCALCULATOR_CUSTOM_FONTID=y +CONFIG_NXWM_HEXCALCULATOR_FONTID=5 + +# +# NxWM Media Player Display Settings +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/shenzhou/nxwm/setenv.sh b/configs/shenzhou/nxwm/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..01edb1d57eb89377478820302675c8641ef8f8f9 --- /dev/null +++ b/configs/shenzhou/nxwm/setenv.sh @@ -0,0 +1,78 @@ +#!/bin/bash +# configs/shenzhou/nxwm/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the tools/ subdirectory +export TOOLS_DIR="${WD}/configs/shenzhou/tools" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:${TOOLS_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/shenzhou/scripts/ld.script b/configs/shenzhou/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..1a23385f70db7df48f0231a3a650377e02049f5e --- /dev/null +++ b/configs/shenzhou/scripts/ld.script @@ -0,0 +1,115 @@ +/**************************************************************************** + * configs/shenzhou/scripts/ld.script + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F107VC has 256K of FLASH beginning at address 0x0800:0000 and + * 64K of SRAM beginning at address 0x2000:0000. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F107VC has 64Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/shenzhou/scripts/ld.script.dfu b/configs/shenzhou/scripts/ld.script.dfu new file mode 100644 index 0000000000000000000000000000000000000000..dcf57b9b0b30ac72c79e69d29b68b98ac4c9af3c --- /dev/null +++ b/configs/shenzhou/scripts/ld.script.dfu @@ -0,0 +1,117 @@ +/**************************************************************************** + * configs/shenzhou/scripts/ld.script.dfu + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F107VC has 256K of FLASH beginning at address 0x0800:0000 and + * 64K of SRAM beginning at address 0x2000:0000. Here we assume that the + * STMicro DFU bootloader is being used. In that case, the corrct load .text + * load address is 0x08003000 (leaving 208K). + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08003000, LENGTH = 208K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F107VC has 64Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/shenzhou/src/.gitignore b/configs/shenzhou/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/shenzhou/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/shenzhou/src/Makefile b/configs/shenzhou/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..15458ca938dcee475e8b102c8cef10c670f1fac7 --- /dev/null +++ b/configs/shenzhou/src/Makefile @@ -0,0 +1,99 @@ +############################################################################ +# configs/shenzhou/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c stm32_mmcsd.c stm32_chipid.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_ARCH_RELAYS),y) +CSRCS += stm32_relays.c +endif + +ifeq ($(CONFIG_STM32_OTGFS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_MTD_W25),y) +CSRCS += stm32_w25.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += stm32_usbmsc.c +endif + +ifeq ($(CONFIG_USBDEV_COMPOSITE),y) +CSRCS += stm32_composite.c +endif + +ifeq ($(CONFIG_CAN),y) +CSRCS += stm32_can.c +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += stm32_adc.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += stm32_watchdog.c +endif + +# NOTE: SSD1289 is not supported on the board + +ifeq ($(CONFIG_LCD_SSD1289),y) +CSRCS += stm32_ssd1289.c +else +CSRCS += stm32_ili93xx.c +endif + +ifeq ($(CONFIG_INPUT_ADS7843E),y) +CSRCS += stm32_touchscreen.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/shenzhou/src/shenzhou.h b/configs/shenzhou/src/shenzhou.h new file mode 100644 index 0000000000000000000000000000000000000000..c66f333361b97197fcfd5b98cf633026c167478b --- /dev/null +++ b/configs/shenzhou/src/shenzhou.h @@ -0,0 +1,475 @@ +/**************************************************************************************************** + * configs/shenzhou/src/shenzhou.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __CONFIGS_SHENZHOUL_SRC_SHENZHOU_H +#define __CONFIGS_SHENZHOUL_SRC_SHENZHOU_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include +#include + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ +/* Configuration ************************************************************************************/ +/* How many SPI modules does this chip support? */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 3 +# undef CONFIG_STM32_SPI3 +#endif + +/* Shenzhou GPIO Configuration **********************************************************************/ + +/* STM3240G-EVAL GPIOs ******************************************************************************/ +/* Ethernet + * + * -- ---- -------------- ---------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ---------------------------------------------------------- + * 24 PA1 MII_RX_CLK Ethernet PHY NOTE: Despite the MII labeling of these + * RMII_REF_CLK Ethernet PHY signals, the DM916AEP is actually configured + * 25 PA2 MII_MDIO Ethernet PHY to work in RMII mode. + * 48 PB11 MII_TX_EN Ethernet PHY + * 51 PB12 MII_TXD0 Ethernet PHY + * 52 PB13 MII_TXD1 Ethernet PHY + * 16 PC1 MII_MDC Ethernet PHY + * 34 PC5 MII_INT Ethernet PHY + * 55 PD8 MII_RX_DV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * 55 PD8 RMII_CRSDV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * 56 PD9 MII_RXD0 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * 57 PD10 MII_RXD1 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP + * + * The board desdign can support a 50MHz external clock to drive the PHY + * (U9). However, on my board, U9 is not present. + * + * 67 PA8 MCO DM9161AEP + */ + +#ifdef CONFIG_STM32_ETHMAC +# define GPIO_MII_INT (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN5) +#endif + +/* Wireless + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + * 26 PA3 315M_VT + * 17 PC2 WIRELESS_INT + * 18 PC3 WIRELESS_CE To the NRF24L01 2.4G wireless module + * 59 PD12 WIRELESS_CS To the NRF24L01 2.4G wireless module + */ + +#define GPIO_WIRELESS_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN12) + +/* Buttons + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + * 23 PA0 WAKEUP Connected to KEY4. Active low: Closing KEY4 pulls WAKEUP to ground. + * 47 PB10 USERKEY Connected to KEY2 + * 33 PC4 USERKEY2 Connected to KEY1 + * 7 PC13 TAMPER Connected to KEY3 + */ + +/* BUTTONS -- NOTE that all have EXTI interrupts configured */ + +#define MIN_IRQBUTTON BUTTON_KEY1 +#define MAX_IRQBUTTON BUTTON_KEY4 +#define NUM_IRQBUTTONS (BUTTON_KEY4 - BUTTON_KEY1 + 1) + +#define GPIO_BTN_WAKEUP (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0) +#define GPIO_BTN_USERKEY (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTB|GPIO_PIN10) +#define GPIO_BTN_USERKEY2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN4) +#define GPIO_BTN_TAMPER (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN13) + +/* LEDs + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + * 83 PD2 LED1 Active low: Pulled high + * 84 PD3 LED2 Active low: Pulled high + * 85 PD4 LED3 Active low: Pulled high + * 88 PD7 LED4 Active low: Pulled high + */ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN2) +#define GPIO_LED2 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN3) +#define GPIO_LED3 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN4) +#define GPIO_LED4 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN7) + +/* TFT LCD + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + * 37 PB2 DATA_LE To TFT LCD. (CN13, ping 28) + * 96 PB9 F_CS To both the TFT LCD (CN13, pin 30) and to the W25X16 SPI FLASH + * 34 PC5 TP_INT JP6. To TFT LCD (CN13) module (CN13, pin 26) + * 65 PC8 LCD_CS Active low: Pulled high (CN13, pin 19) + * 66 PC9 TP_CS Active low: Pulled high (CN13, pin 31) + * 78 PC10 SPI3_SCK To TFT LCD (CN13, pin 29) + * 79 PC11 SPI3_MISO To TFT LCD (CN13, pin 25) + * 80 PC12 SPI3_MOSI To TFT LCD (CN13, pin 27) + * 58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32) + * 60 PD13 LCD_RS To TFT LCD (CN13, pin 20) + * 61 PD14 LCD_WR To TFT LCD (CN13, pin 21). Schematic is wrong LCD_WR is PB14. + * 62 PD15 LCD_RD To TFT LCD (CN13, pin 22) + * 97 PE0 DB00 To TFT LCD (CN13, pin 3) + * 98 PE1 DB01 To TFT LCD (CN13, pin 4) + * 1 PE2 DB02 To TFT LCD (CN13, pin 5) + * 2 PE3 DB03 To TFT LCD (CN13, pin 6) + * 3 PE4 DB04 To TFT LCD (CN13, pin 7) + * 4 PE5 DB05 To TFT LCD (CN13, pin 8) + * 5 PE6 DB06 To TFT LCD (CN13, pin 9) + * 38 PE7 DB07 To TFT LCD (CN13, pin 10) + * 39 PE8 DB08 To TFT LCD (CN13, pin 11) + * 40 PE9 DB09 To TFT LCD (CN13, pin 12) + * 41 PE10 DB10 To TFT LCD (CN13, pin 13) + * 42 PE11 DB11 To TFT LCD (CN13, pin 16) + * 43 PE12 DB12 To TFT LCD (CN13, pin 15) + * 44 PE13 DB13 To TFT LCD (CN13, pin 16) + * 45 PE14 DB14 To TFT LCD (CN13, pin 17) + * 46 PE15 DB15 To TFT LCD (CN13, pin 18) + * + * NOTE: The backlight signl NC_BL (CN13, pin 24) is pulled high and not under + * software control + * + * On LCD module: + * -- -------------- ------------------------------------------------------------------- + * PN SIGNAL NOTES + * -- -------------- ------------------------------------------------------------------- + * 3 DB01 To LCD DB1 + * 4 DB00 To LCD DB0 + * 5 DB03 To LCD DB3 + * 6 DB02 To LCD DB2 + * 7 DB05 To LCD DB5 + * 8 DB04 To LCD DB4 + * 9 DB07 To LCD DB7 + * 10 DB06 To LCD DB6 + * 11 DB09 To LCD DB9 + * 12 DB08 To LCD DB8 + * 13 DB11 To LCD DB11 + * 14 DB10 To LCD DB10 + * 15 DB13 To LCD DB13 + * 16 DB12 To LCD DB12 + * 17 DB15 To LCD DB15 + * 18 DB14 To LCD DB14 + * 19 RS To LCD RS + * 20 /LCD_CS To LCD CS + * 21 /RD To LCD RD + * 22 /WR To LCD WR + * 23 BL_EN (Not referenced) + * 24 /RESET + * 25 /INT To Touch IC /INT + * 26 MISO To Touch IC DOUT; To AT45DB161B SO; To SD card DAT0 + * 27 LE To 74HC573 that controls LCD 8-bit/16-bit mode + * 28 MOSI To Touch IC DIN; To AT45DB161B SI; To SD card CMD + * 29 /DF_CS To AT45DB161B Data Flash /CS + * 30 SCLK To Touch IC DCLK; To AT45DB161B SCK; To SD card CLK + * 31 /SD_CS To SD card /CS + * 31 /TP_CS To Touch IC CS + */ + +/* TFT LCD GPIOs */ + +#define GPIO_LCD_D0OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN0) +#define GPIO_LCD_D1OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN1) +#define GPIO_LCD_D2OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN2) +#define GPIO_LCD_D3OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3) +#define GPIO_LCD_D4OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN4) +#define GPIO_LCD_D5OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN5) +#define GPIO_LCD_D6OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN6) +#define GPIO_LCD_D7OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN7) +#define GPIO_LCD_D8OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN8) +#define GPIO_LCD_D9OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN9) +#define GPIO_LCD_D10OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN10) +#define GPIO_LCD_D11OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN11) +#define GPIO_LCD_D12OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN12) +#define GPIO_LCD_D13OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN13) +#define GPIO_LCD_D14OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN14) +#define GPIO_LCD_D15OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN15) + +#define GPIO_LCD_D0IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN0) +#define GPIO_LCD_D1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN1) +#define GPIO_LCD_D2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN2) +#define GPIO_LCD_D3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN3) +#define GPIO_LCD_D4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN4) +#define GPIO_LCD_D5IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN5) +#define GPIO_LCD_D6IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN6) +#define GPIO_LCD_D7IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN7) +#define GPIO_LCD_D8IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN8) +#define GPIO_LCD_D9IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN9) +#define GPIO_LCD_D10IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN10) +#define GPIO_LCD_D11IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN11) +#define GPIO_LCD_D12IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN12) +#define GPIO_LCD_D13IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN13) +#define GPIO_LCD_D14IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN14) +#define GPIO_LCD_D15IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN15) + +#define GPIO_LCD_RS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN13) +#define GPIO_LCD_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN8) +#define GPIO_LCD_RD (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN15) +#define GPIO_LCD_WR (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN14) +#define GPIO_LCD_LE (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN2) + +/* Bit band addresses */ + +#define STM32_GPIOB_OFFSET (STM32_GPIOB_BASE - STM32_PERIPH_BASE) +#define STM32_GPIOC_OFFSET (STM32_GPIOC_BASE - STM32_PERIPH_BASE) +#define STM32_GPIOD_OFFSET (STM32_GPIOD_BASE - STM32_PERIPH_BASE) + +#define LCD_BIT_CLEAR(offs,pin) \ + (STM32_PERIPHBB_BASE + ((offs + STM32_GPIO_BRR_OFFSET) << 5) + ((pin) << 2)) +#define LCD_BIT_SET(offs,pin) \ + (STM32_PERIPHBB_BASE + ((offs + STM32_GPIO_BSRR_OFFSET) << 5) + ((pin) << 2)) +#define LCD_BIT_READ(offs,pin) \ + (STM32_PERIPHBB_BASE + ((offs + STM32_GPIO_ODR_OFFSET) << 5) + ((pin) << 2)) + +#define LCD_RS_CLEAR LCD_BIT_CLEAR(STM32_GPIOD_OFFSET, 13) /* GPIO_PORTD|GPIO_PIN13 */ +#define LCD_RS_SET LCD_BIT_SET(STM32_GPIOD_OFFSET, 13) +#define LCD_RS_READ LCD_BIT_READ(STM32_GPIOD_OFFSET, 13) +#define LCD_CS_CLEAR LCD_BIT_CLEAR(STM32_GPIOC_OFFSET, 8) /* GPIO_PORTC|GPIO_PIN8 */ +#define LCD_CS_SET LCD_BIT_SET(STM32_GPIOC_OFFSET, 8) +#define LCD_CS_READ LCD_BIT_READ(STM32_GPIOC_OFFSET, 8) +#define LCD_RD_CLEAR LCD_BIT_CLEAR(STM32_GPIOD_OFFSET, 15) /* GPIO_PORTD|GPIO_PIN15 */ +#define LCD_RD_SET LCD_BIT_SET(STM32_GPIOD_OFFSET, 15) +#define LCD_RD_READ LCD_BIT_READ(STM32_GPIOD_OFFSET, 15) +#define LCD_WR_CLEAR LCD_BIT_CLEAR(STM32_GPIOB_OFFSET, 14) /* GPIO_PORTB|GPIO_PIN14 */ +#define LCD_WR_SET LCD_BIT_SET(STM32_GPIOB_OFFSET, 14) +#define LCD_WR_READ LCD_BIT_READ(STM32_GPIOB_OFFSET, 14) +#define LCD_LE_CLEAR LCD_BIT_CLEAR(STM32_GPIOB_OFFSET, 2) /* GPIO_PORTB|GPIO_PIN2 */ +#define LCD_LE_SET LCD_BIT_SET(STM32_GPIOB_OFFSET, 2) +#define LCD_LE_READ LCD_BIT_READ(STM32_GPIOB_OFFSET, 2) + +#define LCD_CRL STM32_GPIOE_CRL +#define LCD_CRH STM32_GPIOE_CRH +#define LCD_INPUT 0x44444444 /* Floating input */ +#define LCD_OUTPUT 0x33333333 /* Push/pull output */ +#define LCD_ODR STM32_GPIOE_ODR +#define LCD_IDR STM32_GPIOE_IDR + +/* Touchscreen IC on the LCD module */ + +#define GPIO_TP_INT (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN5) +#define GPIO_TP_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN9) + +/* AT45DB161B Data Flash on the LCD module */ + +#define GPIO_LCDDF_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9) + +/* SD card on the LCD module */ + +#define GPIO_LCDSD_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN11) + +/* RS-485 + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + * 88 PD7 485_DIR SP3485 read enable (not) + */ + +/* To be provided */ + +/* USB + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + * 95 PB8 USB_PWR Drives USB VBUS + */ + +#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_SPEED_100MHz|\ + GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) + +/* Audio DAC + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + */ + +/* To be provided */ + +/* SPI FLASH + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + * 96 PB9 F_CS To both the TFT LCD (CN13) and to the W25X16 SPI FLASH + */ + +#define GPIO_FLASH_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9) + +/* SD Card + * + * -- ---- -------------- ------------------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ------------------------------------------------------------------- + * 53 PB14 SD_CD Active low: Pulled high. Schematic is wrong LCD_WR is PB14. + * 58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32) + */ + +#define GPIO_SD_CD (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTB|GPIO_PIN14) +#define GPIO_SD_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN11) + +/* Relays */ + +#define NUM_RELAYS 2 +#define GPIO_RELAYS_R00 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN0) +#define GPIO_RELAYS_R01 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN1) + +/**************************************************************************************************** + * Public Types + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +/**************************************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the STM3240G-EVAL board. + * + ****************************************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +/**************************************************************************************************** + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related GPIO pins for + * the STM3240G-EVAL board. + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_OTGFS +void weak_function stm32_usbinitialize(void); +#endif + +/**************************************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. This function will + * start a thread that will monitor for device connection/disconnection events. + * + ****************************************************************************************************/ + +#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST) +int stm32_usbhost_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires CONFIG_DISABLE_MOUNTPOINT=n + * and CONFIG_STM32_SPI1=y + * + ****************************************************************************/ + +int stm32_sdinitialize(int minor); + +/**************************************************************************** + * Name: stm32_w25initialize + * + * Description: + * Initialize and register the W25 FLASH file system. + * + ****************************************************************************/ + +#ifdef CONFIG_MTD_W25 +int stm32_w25initialize(int minor); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SHENZHOUL_SRC_SHENZHOU_H */ diff --git a/configs/shenzhou/src/stm32_adc.c b/configs/shenzhou/src/stm32_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..bd54100a09b9f9d67b1dc499f3c2728aac152533 --- /dev/null +++ b/configs/shenzhou/src/stm32_adc.c @@ -0,0 +1,173 @@ +/************************************************************************************ + * configs/shenzhou/src/stm32_adc.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32_pwm.h" +#include "shenzhou.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* Up to 3 ADC interfaces are supported */ + +#if STM32_NADC < 3 +# undef CONFIG_STM32_ADC3 +#endif + +#if STM32_NADC < 2 +# undef CONFIG_STM32_ADC2 +#endif + +#if STM32_NADC < 1 +# undef CONFIG_STM32_ADC1 +#endif + +#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3) +#ifndef CONFIG_STM32_ADC1 +# warning "Channel information only available for ADC1" +#endif + +/* The number of ADC channels in the conversion list */ + +#define ADC1_NCHANNELS 1 + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/* Identifying number of each ADC channel. The only internal signal for ADC testing + * is the potentiometer input: + * + * ADC1_IN10(PC0) Potentiometer + * + * External signals are also available on CON5 CN14: + * + * ADC_IN8 (PB0) CON5 CN14 Pin2 + * ADC_IN9 (PB1) CON5 CN14 Pin1 + */ + +#ifdef CONFIG_STM32_ADC1 +static const uint8_t g_chanlist[ADC1_NCHANNELS] = {10}; //{10, 8, 9}; + +/* Configurations of pins used by each ADC channel */ + +static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC12_IN10}; //{GPIO_ADC12_IN10, GPIO_ADC12_IN8, GPIO_ADC12_IN9}; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ +#ifdef CONFIG_STM32_ADC1 + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + int i; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Configure the pins as analog inputs for the selected channels */ + + for (i = 0; i < ADC1_NCHANNELS; i++) + { + stm32_configgpio(g_pinlist[i]); + } + + /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + + adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +#else + return -ENOSYS; +#endif +} + +#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */ +#endif /* CONFIG_ADC */ diff --git a/configs/shenzhou/src/stm32_appinit.c b/configs/shenzhou/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..4ef9ad82db21616660d297c26baf1c41a93c7b4f --- /dev/null +++ b/configs/shenzhou/src/stm32_appinit.c @@ -0,0 +1,193 @@ +/**************************************************************************** + * config/shenzhou/src/stm32_appinit.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#include "stm32.h" +#include "shenzhou.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Assume that we support everything until convinced otherwise */ + +#define HAVE_MMCSD 1 +#define HAVE_USBDEV 1 +#define HAVE_USBHOST 1 +#define HAVE_W25 1 + +/* Configuration ************************************************************/ +/* SPI1 connects to the SD CARD (and to the SPI FLASH) */ + +#define STM32_MMCSDSPIPORTNO 1 /* SPI1 */ +#define STM32_MMCSDSLOTNO 0 /* Only one slot */ + +#ifndef CONFIG_STM32_SPI1 +# undef HAVE_MMCSD +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# undef HAVE_MMCSD +#endif + +/* Default MMC/SD minor number */ + +#ifdef HAVE_MMCSD +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif + +/* Default MMC/SD SLOT number */ + +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != STM32_MMCSDSLOTNO +# error "Only one MMC/SD slot: Slot 0" +# endif + +/* Verify configured SPI port number */ + +# if defined(CONFIG_NSH_MMCSDSPIPORTNO) && CONFIG_NSH_MMCSDSPIPORTNO != STM32_MMCSDSPIPORTNO +# error "Only one MMC/SD port: SPI1" +# endif +#endif + +/* Can't support the W25 device if it SPI1 or W25 support is not enabled */ + +#if !defined(CONFIG_STM32_SPI1) || !defined(CONFIG_MTD_W25) +# undef HAVE_W25 +#endif + +/* Can't support W25 features if mountpoints are disabled */ + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# undef HAVE_W25 +#endif + +/* Default W25 minor number */ + +#if defined(HAVE_W25) && !defined(CONFIG_NSH_W25MINOR) +# define CONFIG_NSH_W25MINOR 0 +#endif + +/* Can't support USB host or device features if USB OTG FS is not enabled */ + +#ifndef CONFIG_STM32_OTGFS +# undef HAVE_USBDEV +# undef HAVE_USBHOST +#endif + +/* Can't support USB device is USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +#endif + +/* Can't support USB host is USB host is not enabled */ + +#ifndef CONFIG_USBHOST +# undef HAVE_USBHOST +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(HAVE_MMCSD) || defined(HAVE_USBHOST) || defined(HAVE_W25) + int ret; +#endif + + /* Initialize and register the W25 FLASH file system. */ + +#ifdef HAVE_W25 + ret = stm32_w25initialize(CONFIG_NSH_W25MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize W25 minor %d: %d\n", + CONFIG_NSH_W25MINOR, ret); + return ret; + } +#endif + + /* Initialize the SPI-based MMC/SD slot */ + +#ifdef HAVE_MMCSD + ret = stm32_sdinitialize(CONFIG_NSH_MMCSDMINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize MMC/SD slot %d: %d\n", + STM32_MMCSDSLOTNO, ret); + return ret; + } +#endif + + /* Initialize USB host operation. stm32_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + +#ifdef HAVE_USBHOST + ret = stm32_usbhost_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret); + return ret; + } +#endif + + return OK; +} diff --git a/configs/shenzhou/src/stm32_autoleds.c b/configs/shenzhou/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..ebc161f643b5579258c0f5d0d04210ab377016e7 --- /dev/null +++ b/configs/shenzhou/src/stm32_autoleds.c @@ -0,0 +1,407 @@ +/**************************************************************************** + * configs/shenzhou/src/stm32_autoleds.c + * + * Copyright (C) 2012-2013, 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "shenzhou.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* The following definitions map the encoded LED setting to GPIO settings */ + +#define SHENZHOU_LED1 (1 << 0) +#define SHENZHOU_LED2 (1 << 1) +#define SHENZHOU_LED3 (1 << 2) +#define SHENZHOU_LED4 (1 << 3) + +#define ON_SETBITS_SHIFT (0) +#define ON_CLRBITS_SHIFT (4) +#define OFF_SETBITS_SHIFT (8) +#define OFF_CLRBITS_SHIFT (12) + +#define ON_BITS(v) ((v) & 0xff) +#define OFF_BITS(v) (((v) >> 8) & 0x0ff) +#define SETBITS(b) ((b) & 0x0f) +#define CLRBITS(b) (((b) >> 4) & 0x0f) + +#define ON_SETBITS(v) (SETBITS(ON_BITS(v)) +#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v)) +#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v)) +#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v)) + +#define LED_STARTED_ON_SETBITS ((SHENZHOU_LED1) << ON_SETBITS_SHIFT) +#define LED_STARTED_ON_CLRBITS ((SHENZHOU_LED2|SHENZHOU_LED3|SHENZHOU_LED4) << ON_CLRBITS_SHIFT) +#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT) +#define LED_STARTED_OFF_CLRBITS ((SHENZHOU_LED1|SHENZHOU_LED2|SHENZHOU_LED3|SHENZHOU_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_HEAPALLOCATE_ON_SETBITS ((SHENZHOU_LED2) << ON_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_ON_CLRBITS ((SHENZHOU_LED1|SHENZHOU_LED3|SHENZHOU_LED4) << ON_CLRBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_SETBITS ((SHENZHOU_LED1) << OFF_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_CLRBITS ((SHENZHOU_LED2|SHENZHOU_LED3|SHENZHOU_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_IRQSENABLED_ON_SETBITS ((SHENZHOU_LED1|SHENZHOU_LED2) << ON_SETBITS_SHIFT) +#define LED_IRQSENABLED_ON_CLRBITS ((SHENZHOU_LED3|SHENZHOU_LED4) << ON_CLRBITS_SHIFT) +#define LED_IRQSENABLED_OFF_SETBITS ((SHENZHOU_LED2) << OFF_SETBITS_SHIFT) +#define LED_IRQSENABLED_OFF_CLRBITS ((SHENZHOU_LED1|SHENZHOU_LED3|SHENZHOU_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_STACKCREATED_ON_SETBITS ((SHENZHOU_LED3) << ON_SETBITS_SHIFT) +#define LED_STACKCREATED_ON_CLRBITS ((SHENZHOU_LED1|SHENZHOU_LED2|SHENZHOU_LED4) << ON_CLRBITS_SHIFT) +#define LED_STACKCREATED_OFF_SETBITS ((SHENZHOU_LED1|SHENZHOU_LED2) << OFF_SETBITS_SHIFT) +#define LED_STACKCREATED_OFF_CLRBITS ((SHENZHOU_LED3|SHENZHOU_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_INIRQ_ON_SETBITS ((SHENZHOU_LED1) << ON_SETBITS_SHIFT) +#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_INIRQ_OFF_CLRBITS ((SHENZHOU_LED1) << OFF_CLRBITS_SHIFT) + +#define LED_SIGNAL_ON_SETBITS ((SHENZHOU_LED2) << ON_SETBITS_SHIFT) +#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_SIGNAL_OFF_CLRBITS ((SHENZHOU_LED2) << OFF_CLRBITS_SHIFT) + +#define LED_ASSERTION_ON_SETBITS ((SHENZHOU_LED4) << ON_SETBITS_SHIFT) +#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_ASSERTION_OFF_CLRBITS ((SHENZHOU_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_PANIC_ON_SETBITS ((SHENZHOU_LED4) << ON_SETBITS_SHIFT) +#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_PANIC_OFF_CLRBITS ((SHENZHOU_LED4) << OFF_CLRBITS_SHIFT) + +/************************************************************************************** + * Private Function Protototypes + **************************************************************************************/ + +/* LED State Controls */ + +static inline void led_clrbits(unsigned int clrbits); +static inline void led_setbits(unsigned int setbits); +static void led_setonoff(unsigned int bits); + +/* LED Power Management */ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint16_t g_ledbits[8] = +{ + (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | + LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS), + + (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS | + LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS), + + (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS | + LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS), + + (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS | + LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS), + + (LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS | + LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS), + + (LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS | + LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS), + + (LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS | + LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS), + + (LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS | + LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS) +}; + +#ifdef CONFIG_PM +static struct pm_callback_s g_ledscb = +{ + .notify = led_pm_notify, + .prepare = led_pm_prepare, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_clrbits + * + * Description: + * Clear all LEDs to the bit encoded state + * + ****************************************************************************/ + +static inline void led_clrbits(unsigned int clrbits) +{ + /* All LEDs are pulled up and, hence, active low */ + + if ((clrbits & SHENZHOU_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, true); + } + + if ((clrbits & SHENZHOU_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, true); + } + + if ((clrbits & SHENZHOU_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, true); + } + + if ((clrbits & SHENZHOU_LED4) != 0) + { + stm32_gpiowrite(GPIO_LED4, true); + } +} + +/**************************************************************************** + * Name: led_setbits + * + * Description: + * Set all LEDs to the bit encoded state + * + ****************************************************************************/ + +static inline void led_setbits(unsigned int setbits) +{ + /* All LEDs are pulled up and, hence, active low */ + + if ((setbits & SHENZHOU_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, false); + } + + if ((setbits & SHENZHOU_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, false); + } + + if ((setbits & SHENZHOU_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, false); + } + + if ((setbits & SHENZHOU_LED4) != 0) + { + stm32_gpiowrite(GPIO_LED4, false); + } +} + +/**************************************************************************** + * Name: led_setonoff + * + * Description: + * Set/clear all LEDs to the bit encoded state + * + ****************************************************************************/ + +static void led_setonoff(unsigned int bits) +{ + led_clrbits(CLRBITS(bits)); + led_setbits(SETBITS(bits)); +} + +/**************************************************************************** + * Name: led_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + switch (pmstate) + { + case(PM_NORMAL): + { + /* Restore normal LEDs operation */ + + } + break; + + case(PM_IDLE): + { + /* Entering IDLE mode - Turn leds off */ + + } + break; + + case(PM_STANDBY): + { + /* Entering STANDBY mode - Logic for PM_STANDBY goes here */ + + } + break; + + case(PM_SLEEP): + { + /* Entering SLEEP mode - Logic for PM_SLEEP goes here */ + + } + break; + + default: + { + /* Should not get here */ + + } + break; + } +} +#endif + +/**************************************************************************** + * Name: led_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* No preparation to change power modes is required by the LEDs driver. + * We always accept the state change by returning OK. + */ + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_setonoff(ON_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_setonoff(OFF_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: up_ledpminitialize + ****************************************************************************/ + +#ifdef CONFIG_PM +void up_ledpminitialize(void) +{ + /* Register to receive power management callbacks */ + + int ret = pm_register(&g_ledscb); + if (ret != OK) + { + board_autoled_on(LED_ASSERTION); + } +} +#endif /* CONFIG_PM */ + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/shenzhou/src/stm32_boot.c b/configs/shenzhou/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..3f52669f7e245047cf3abedc18b7427ccfee1bce --- /dev/null +++ b/configs/shenzhou/src/stm32_boot.c @@ -0,0 +1,102 @@ +/************************************************************************************ + * configs/shenzhou/src/stm32_boot.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "shenzhou.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI3) + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB) + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/shenzhou/src/stm32_buttons.c b/configs/shenzhou/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..cf31d666e82560034991504804d55488085c27c7 --- /dev/null +++ b/configs/shenzhou/src/stm32_buttons.c @@ -0,0 +1,172 @@ +/**************************************************************************** + * configs/shenzhou/src/stm32_buttons.c + * + * Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "shenzhou.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each Shenzhou button. This array is indexed by + * the BUTTON_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_USERKEY2, GPIO_BTN_USERKEY, GPIO_BTN_TAMPER, GPIO_BTN_WAKEUP +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for some pins but NOT used in this file + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed for most keys. The exception + * is the WAKEUP button. + */ + + bool released = stm32_gpioread(g_buttons[i]); + if (i == BUTTON_WAKEUP) + { + released = !released; + } + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT and JOYSTICK_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/shenzhou/src/stm32_can.c b/configs/shenzhou/src/stm32_can.c new file mode 100644 index 0000000000000000000000000000000000000000..fa05af42fa288a65e789d68b54eba2fe9545a312 --- /dev/null +++ b/configs/shenzhou/src/stm32_can.c @@ -0,0 +1,133 @@ +/************************************************************************************ + * configs/shenzhou/src/stm32_can.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32.h" +#include "stm32_can.h" +#include "shenzhou.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* The STM32F107VC supports CAN1 and CAN2 */ + +#define CAN_PORT 1 + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = stm32_caninitialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && CONFIG_STM32_CAN1 */ diff --git a/configs/shenzhou/src/stm32_chipid.c b/configs/shenzhou/src/stm32_chipid.c new file mode 100644 index 0000000000000000000000000000000000000000..07d597f043d14e200de0cf421e969af865410c80 --- /dev/null +++ b/configs/shenzhou/src/stm32_chipid.c @@ -0,0 +1,91 @@ +/************************************************************************************ + * configs/shenzhou/src/stm32_chipid.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +const char *stm32_getchipid(void) +{ + static char cpuid[12]; + int i; + + for (i = 0; i < 12; i++) + { + cpuid[i] = getreg8(0x1ffff7e8+i); + } + + return cpuid; +} + +const char *stm32_getchipid_string(void) +{ + static char cpuid[27]; + int c; + int i; + + for (i = 0, c = 0; i < 12; i++) + { + sprintf(&cpuid[c], "%02X", getreg8(0x1ffff7e8+11-i)); + c += 2; + if (i % 4 == 3) + { + cpuid[c++] = '-'; + } + } + + cpuid[26] = '\0'; + return cpuid; +} diff --git a/configs/shenzhou/src/stm32_composite.c b/configs/shenzhou/src/stm32_composite.c new file mode 100644 index 0000000000000000000000000000000000000000..4b6c6250a01bb93b25bff8c6ed883675d269c8e1 --- /dev/null +++ b/configs/shenzhou/src/stm32_composite.c @@ -0,0 +1,85 @@ +/**************************************************************************** + * configs/shenzhou/src/stm32_composite.c + * + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the STM32 SPI-based MMC/SD block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "shenzhou.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* Device minor number */ + +#ifndef CONFIG_SYSTEM_COMPOSITE_DEVMINOR1 +# define CONFIG_SYSTEM_COMPOSITE_DEVMINOR1 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_composite_initialize + * + * Description: + * Perform architecture specific initialization of a composite USB device. + * + ****************************************************************************/ + +int board_composite_initialize(int port) +{ + /* If system/composite is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see + * stm32_appinit.c). In this case, there is nothing further to be done here. + * + * NOTE: CONFIG_NSH_BUILTIN_APPS is not a fool-proof indication that NSH + * was built. + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS + return sd_mount(CONFIG_SYSTEM_COMPOSITE_DEVMINOR1); +#else + return OK; +#endif /* CONFIG_NSH_BUILTIN_APPS */ +} diff --git a/configs/shenzhou/src/stm32_ili93xx.c b/configs/shenzhou/src/stm32_ili93xx.c new file mode 100644 index 0000000000000000000000000000000000000000..c9c33c0a203021a2d45715ee5e024c25b940afab --- /dev/null +++ b/configs/shenzhou/src/stm32_ili93xx.c @@ -0,0 +1,1989 @@ +/************************************************************************************ + * configs/shenzhou/src/stm32_ili93xx.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ +/* TFT LCD + * + * -- ---- -------------- ----------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ----------------------------------------------------------- + * 37 PB2 DATA_LE To TFT LCD (CN13, ping 28) + * 96 PB9 F_CS To both the TFT LCD (CN13, pin 30) and to the W25X16 SPI FLASH + * 34 PC5 TP_INT JP6. To TFT LCD (CN13) module (CN13, pin 26) + * 65 PC8 LCD_CS Active low: Pulled high (CN13, pin 19) + * 66 PC9 TP_CS Active low: Pulled high (CN13, pin 31) + * 78 PC10 SPI3_SCK To TFT LCD (CN13, pin 29) + * 79 PC11 SPI3_MISO To TFT LCD (CN13, pin 25) + * 80 PC12 SPI3_MOSI To TFT LCD (CN13, pin 27) + * 58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32) + * 60 PD13 LCD_RS To TFT LCD (CN13, pin 20) + * 61 PD14 LCD_WR To TFT LCD (CN13, pin 21). Schematic is wrong LCD_WR is PB14. + * 62 PD15 LCD_RD To TFT LCD (CN13, pin 22) + * 97 PE0 DB00 To TFT LCD (CN13, pin 3) + * 98 PE1 DB01 To TFT LCD (CN13, pin 4) + * 1 PE2 DB02 To TFT LCD (CN13, pin 5) + * 2 PE3 DB03 To TFT LCD (CN13, pin 6) + * 3 PE4 DB04 To TFT LCD (CN13, pin 7) + * 4 PE5 DB05 To TFT LCD (CN13, pin 8) + * 5 PE6 DB06 To TFT LCD (CN13, pin 9) + * 38 PE7 DB07 To TFT LCD (CN13, pin 10) + * 39 PE8 DB08 To TFT LCD (CN13, pin 11) + * 40 PE9 DB09 To TFT LCD (CN13, pin 12) + * 41 PE10 DB10 To TFT LCD (CN13, pin 13) + * 42 PE11 DB11 To TFT LCD (CN13, pin 16) + * 43 PE12 DB12 To TFT LCD (CN13, pin 15) + * 44 PE13 DB13 To TFT LCD (CN13, pin 16) + * 45 PE14 DB14 To TFT LCD (CN13, pin 17) + * 46 PE15 DB15 To TFT LCD (CN13, pin 18) + * + * NOTE: The backlight signal NC_BL (CN13, pin 24) is pulled high and not under + * software control + * + * On LCD module: + * -- -------------- ------------------------------------------------------------------- + * PN SIGNAL NOTES + * -- -------------- ------------------------------------------------------------------- + * 3 DB01 To LCD DB1 + * 4 DB00 To LCD DB0 + * 5 DB03 To LCD DB3 + * 6 DB02 To LCD DB2 + * 7 DB05 To LCD DB5 + * 8 DB04 To LCD DB4 + * 9 DB07 To LCD DB7 + * 10 DB06 To LCD DB6 + * 11 DB09 To LCD DB9 + * 12 DB08 To LCD DB8 + * 13 DB11 To LCD DB11 + * 14 DB10 To LCD DB10 + * 15 DB13 To LCD DB13 + * 16 DB12 To LCD DB12 + * 17 DB15 To LCD DB15 + * 18 DB14 To LCD DB14 + * 19 RS To LCD RS + * 20 /LCD_CS To LCD CS + * 21 /RD To LCD RD + * 22 /WR To LCD WR + * 23 BL_EN (Not referenced) + * 24 /RESET + * 25 /INT To Touch IC /INT + * 26 MISO To Touch IC DOUT; To AT45DB161B SO; To SD card DAT0 + * 27 LE To 74HC573 that controls LCD 8-bit/16-bit mode + * 28 MOSI To Touch IC DIN; To AT45DB161B SI; To SD card CMD + * 29 /DF_CS To AT45DB161B Data Flash /CS + * 30 SCLK To Touch IC DCLK; To AT45DB161B SCK; To SD card CLK + * 31 /SD_CS To SD card /CS + * 31 /TP_CS To Touch IC CS + */ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "stm32.h" +#include "shenzhou.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration **********************************************************************/ +/* CONFIG_STM32_ILI1505_DISABLE may be defined to disable the LCD_ILI1505 + * CONFIG_STM32_ILI9300_DISABLE may be defined to disable the LCD_ILI9300 + * CONFIG_STM32_ILI9320_DISABLE may be defined to disable the LCD_ILI9320 + * CONFIG_STM32_ILI9321_DISABLE may be defined to disable the LCD_ILI9321 + * CONFIG_STM32_ILI9325_DISABLE may be defined to disabled the LCD_ILI9325 + * CONFIG_STM32_ILI9328_DISABLE may be defined to disabled the LCD_ILI9328 + * CONFIG_STM32_ILI9331_DISABLE may be defined to disabled the LCD_ILI9331 + * CONFIG_STM32_ILI9919_DISABLE may be defined to disabled the LCD_ILI9919 + */ + +#undef HAVE_LCD +#if !defined(CONFIG_STM32_ILI1505_DISABLE) +# define HAVE_LCD 1 +#elif !defined(CONFIG_STM32_ILI9300_DISABLE) +# define HAVE_LCD 1 +#elif !defined(CONFIG_STM32_ILI9320_DISABLE) +# define HAVE_LCD 1 +#elif !defined(CONFIG_STM32_ILI9321_DISABLE) +# define HAVE_LCD 1 +#elif !defined(CONFIG_STM32_ILI9325_DISABLE) +# define HAVE_LCD 1 +#elif !defined(CONFIG_STM32_ILI9328_DISABLE) +# define HAVE_LCD 1 +#elif !defined(CONFIG_STM32_ILI9331_DISABLE) +# define HAVE_LCD 1 +#elif !defined(CONFIG_STM32_ILI9919_DISABLE) +# define HAVE_LCD 1 +#endif + +#ifdef HAVE_LCD + +/* Check contrast selection */ + +#if !defined(CONFIG_LCD_MAXCONTRAST) +# define CONFIG_LCD_MAXCONTRAST 1 +#endif + +/* Check power setting */ + +#if !defined(CONFIG_LCD_MAXPOWER) || CONFIG_LCD_MAXPOWER < 1 +# define CONFIG_LCD_MAXPOWER 1 +#endif + +#if CONFIG_LCD_MAXPOWER > 255 +# error "CONFIG_LCD_MAXPOWER must be less than 256 to fit in uint8_t" +#endif + +/* Check orientation */ + +#if defined(CONFIG_LCD_PORTRAIT) +# if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) || defined(CONFIG_LCD_RPORTRAIT) +# error "Cannot define both portrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_RPORTRAIT) +# if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) +# error "Cannot define both rportrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_LANDSCAPE) +# ifdef CONFIG_LCD_RLANDSCAPE +# error "Cannot define both landscape and any other orientations" +# endif +#elif !defined(CONFIG_LCD_RLANDSCAPE) +# define CONFIG_LCD_LANDSCAPE 1 +#endif + +#undef CONFIG_LCD_FASTCONFIG +#define CONFIG_LCD_FASTCONFIG 1 + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +# undef CONFIG_LCD_REGDEBUG +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* Display/Color Properties ***********************************************************/ +/* Display Resolution */ + +#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) +# define STM32_XRES 320 +# define STM32_YRES 240 +#else +# define STM32_XRES 240 +# define STM32_YRES 320 +#endif + +/* Color depth and format */ + +#define STM32_BPP 16 +#define STM32_COLORFMT FB_FMT_RGB16_565 + +/* Shenzhou LCD Hardware Definitions **************************************************/ +/* LCD /CS is CE4, Bank 3 of NOR/SRAM Bank 1~4 */ + +#define STM32_LCDBASE ((uintptr_t)(0x60000000 | 0x08000000)) +#define LCD ((struct lcd_regs_s *)STM32_LCDBASE) + +#define LCD_REG_0 0x00 +#define LCD_REG_1 0x01 +#define LCD_REG_2 0x02 +#define LCD_REG_3 0x03 +#define LCD_REG_4 0x04 +#define LCD_REG_5 0x05 +#define LCD_REG_6 0x06 +#define LCD_REG_7 0x07 +#define LCD_REG_8 0x08 +#define LCD_REG_9 0x09 +#define LCD_REG_10 0x0a +#define LCD_REG_11 0x0b +#define LCD_REG_12 0x0c +#define LCD_REG_13 0x0d +#define LCD_REG_14 0x0e +#define LCD_REG_15 0x0f +#define LCD_REG_16 0x10 +#define LCD_REG_17 0x11 +#define LCD_REG_18 0x12 +#define LCD_REG_19 0x13 +#define LCD_REG_20 0x14 +#define LCD_REG_21 0x15 +#define LCD_REG_22 0x16 +#define LCD_REG_23 0x17 +#define LCD_REG_24 0x18 +#define LCD_REG_25 0x19 +#define LCD_REG_26 0x1a +#define LCD_REG_27 0x1b +#define LCD_REG_28 0x1c +#define LCD_REG_29 0x1d +#define LCD_REG_30 0x1e +#define LCD_REG_31 0x1f +#define LCD_REG_32 0x20 +#define LCD_REG_33 0x21 +#define LCD_REG_34 0x22 +#define LCD_REG_36 0x24 +#define LCD_REG_37 0x25 +#define LCD_REG_38 0x26 +#define LCD_REG_39 0x27 +#define LCD_REG_40 0x28 +#define LCD_REG_41 0x29 +#define LCD_REG_42 0x2a +#define LCD_REG_43 0x2b +#define LCD_REG_45 0x2d +#define LCD_REG_48 0x30 +#define LCD_REG_49 0x31 +#define LCD_REG_50 0x32 +#define LCD_REG_51 0x33 +#define LCD_REG_52 0x34 +#define LCD_REG_53 0x35 +#define LCD_REG_54 0x36 +#define LCD_REG_55 0x37 +#define LCD_REG_56 0x38 +#define LCD_REG_57 0x39 +#define LCD_REG_58 0x3a +#define LCD_REG_59 0x3b +#define LCD_REG_60 0x3c +#define LCD_REG_61 0x3d +#define LCD_REG_62 0x3e +#define LCD_REG_63 0x3f +#define LCD_REG_64 0x40 +#define LCD_REG_65 0x41 +#define LCD_REG_66 0x42 +#define LCD_REG_67 0x43 +#define LCD_REG_68 0x44 +#define LCD_REG_69 0x45 +#define LCD_REG_70 0x46 +#define LCD_REG_71 0x47 +#define LCD_REG_72 0x48 +#define LCD_REG_73 0x49 +#define LCD_REG_74 0x4a +#define LCD_REG_75 0x4b +#define LCD_REG_76 0x4c +#define LCD_REG_77 0x4d +#define LCD_REG_78 0x4e +#define LCD_REG_79 0x4f +#define LCD_REG_80 0x50 +#define LCD_REG_81 0x51 +#define LCD_REG_82 0x52 +#define LCD_REG_83 0x53 +#define LCD_REG_96 0x60 +#define LCD_REG_97 0x61 +#define LCD_REG_106 0x6a +#define LCD_REG_118 0x76 +#define LCD_REG_128 0x80 +#define LCD_REG_129 0x81 +#define LCD_REG_130 0x82 +#define LCD_REG_131 0x83 +#define LCD_REG_132 0x84 +#define LCD_REG_133 0x85 +#define LCD_REG_134 0x86 +#define LCD_REG_135 0x87 +#define LCD_REG_136 0x88 +#define LCD_REG_137 0x89 +#define LCD_REG_139 0x8b +#define LCD_REG_140 0x8c +#define LCD_REG_141 0x8d +#define LCD_REG_143 0x8f +#define LCD_REG_144 0x90 +#define LCD_REG_145 0x91 +#define LCD_REG_146 0x92 +#define LCD_REG_147 0x93 +#define LCD_REG_148 0x94 +#define LCD_REG_149 0x95 +#define LCD_REG_150 0x96 +#define LCD_REG_151 0x97 +#define LCD_REG_152 0x98 +#define LCD_REG_153 0x99 +#define LCD_REG_154 0x9a +#define LCD_REG_157 0x9d +#define LCD_REG_164 0xa4 +#define LCD_REG_192 0xc0 +#define LCD_REG_193 0xc1 +#define LCD_REG_227 0xe3 +#define LCD_REG_229 0xe5 +#define LCD_REG_231 0xe7 +#define LCD_REG_239 0xef + +/* LCD IDs */ + +#define ILI1505_ID 0x1505 +#define ILI9300_ID 0x9300 +#define ILI9320_ID 0x9320 +#define ILI9321_ID 0x9321 +#define ILI9325_ID 0x9325 +#define ILI9328_ID 0x9328 +#define ILI9331_ID 0x9331 +#define ILI9919_ID 0x9919 + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/************************************************************************************ + * Private Type Definition + ************************************************************************************/ + +/* LCD type */ + +enum lcd_type_e +{ + LCD_TYPE_UNKNOWN = 0, + LCD_TYPE_ILI1505, + LCD_TYPE_ILI9300, + LCD_TYPE_ILI9320, + LCD_TYPE_ILI9321, + LCD_TYPE_ILI9325, + LCD_TYPE_ILI9328, + LCD_TYPE_ILI9331, + LCD_TYPE_ILI9919 +}; + +/* This structure describes the LCD registers */ + +struct lcd_regs_s +{ + volatile uint16_t address; + volatile uint16_t value; +}; + +/* This structure describes the state of this driver */ + +struct stm32_dev_s +{ + /* Publically visible device structure */ + + struct lcd_dev_s dev; + + /* Private LCD-specific information follows */ + + uint8_t type; /* LCD type. See enum lcd_type_e */ + uint8_t power; /* Current power setting */ + bool output; /* True: Configured for output */ +}; + +/************************************************************************************ + * Private Function Protototypes + ************************************************************************************/ +/* Low Level LCD access */ + +#ifdef CONFIG_LCD_REGDEBUG +static void stm32_lcdshow(FAR struct stm32_lower_s *priv, FAR const char *msg); +#else +# define stm32_lcdshow(p,m) +#endif + +static void stm32_writereg(FAR struct stm32_dev_s *priv, uint8_t regaddr, + uint16_t regval); +static uint16_t stm32_readreg(FAR struct stm32_dev_s *priv, uint8_t regaddr); +static void stm32_gramselect(FAR struct stm32_dev_s *priv); +static void stm32_writegram(FAR struct stm32_dev_s *priv, uint16_t rgbval); +static inline uint16_t stm32_readgram(FAR struct stm32_dev_s *priv); +static void stm32_readnosetup(FAR struct stm32_dev_s *priv, FAR uint16_t *accum); +static uint16_t stm32_readnoshift(FAR struct stm32_dev_s *priv, FAR uint16_t *accum); +static void stm32_setcursor(FAR struct stm32_dev_s *priv, uint16_t col, uint16_t row); + +/* LCD Data Transfer Methods */ + +static int stm32_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels); +static int stm32_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels); + +/* LCD Configuration */ + +static int stm32_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo); +static int stm32_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo); + +/* LCD RGB Mapping */ + +#ifdef CONFIG_FB_CMAP +# error "RGB color mapping not supported by this driver" +#endif + +/* Cursor Controls */ + +#ifdef CONFIG_FB_HWCURSOR +# error "Cursor control not supported by this driver" +#endif + +/* LCD Specific Controls */ + +static int stm32_getpower(struct lcd_dev_s *dev); +static int stm32_setpower(struct lcd_dev_s *dev, int power); +static int stm32_getcontrast(struct lcd_dev_s *dev); +static int stm32_setcontrast(struct lcd_dev_s *dev, unsigned int contrast); + +/* Initialization */ + +static void stm32_lcdinput(FAR struct stm32_dev_s *priv); +static void stm32_lcdoutput(FAR struct stm32_dev_s *priv); + +#if !defined(CONFIG_STM32_ILI9300_DISABLE) || !defined(CONFIG_STM32_ILI9320_DISABLE) || !defined(CONFIG_STM32_ILI9321_DISABLE) +static void stm32_lcd9300init(FAR struct stm32_dev_s *priv, enum lcd_type_e lcdtype); +#endif +#if !defined(CONFIG_STM32_ILI9325_DISABLE) || !defined(CONFIG_STM32_ILI9328_DISABLE) +static void stm32_lcd9325init(FAR struct stm32_dev_s *priv, enum lcd_type_e lcdtype); +#endif +#ifndef CONFIG_STM32_ILI9919_DISABLE +static inline void stm32_lcd9919init(FAR struct stm32_dev_s *priv); +#endif +#ifndef CONFIG_STM32_ILI1505_DISABLE +static inline void stm32_lcd1505init(FAR struct stm32_dev_s *priv); +#endif +static inline int stm32_lcdinitialize(FAR struct stm32_dev_s *priv); + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* LCD GPIO configurations */ + +#ifndef CONFIG_LCD_FASTCONFIG +static const uint32_t g_lcdout[16] = +{ + GPIO_LCD_D0OUT, GPIO_LCD_D1OUT, GPIO_LCD_D2OUT, GPIO_LCD_D3OUT, + GPIO_LCD_D4OUT, GPIO_LCD_D5OUT, GPIO_LCD_D6OUT, GPIO_LCD_D7OUT, + GPIO_LCD_D8OUT, GPIO_LCD_D9OUT, GPIO_LCD_D10OUT, GPIO_LCD_D11OUT, + GPIO_LCD_D12OUT, GPIO_LCD_D13OUT, GPIO_LCD_D14OUT, GPIO_LCD_D15OUT +}; + +static const uint32_t g_lcdin[16] = +{ + GPIO_LCD_D0IN, GPIO_LCD_D1IN, GPIO_LCD_D2IN, GPIO_LCD_D3IN, + GPIO_LCD_D4IN, GPIO_LCD_D5IN, GPIO_LCD_D6IN, GPIO_LCD_D7IN, + GPIO_LCD_D8IN, GPIO_LCD_D9IN, GPIO_LCD_D10IN, GPIO_LCD_D11IN, + GPIO_LCD_D12IN, GPIO_LCD_D13IN, GPIO_LCD_D14IN, GPIO_LCD_D15IN +}; +#endif + +static const uint32_t g_lcdctrl[] = +{ + GPIO_LCD_RS, GPIO_LCD_CS, GPIO_LCD_RD, GPIO_LCD_WR, + GPIO_LCD_LE, +}; +#define NLCD_CONFIG (sizeof(g_lcdctrl)/sizeof(uint32_t)) + +/* This is working memory allocated by the LCD driver for each LCD device + * and for each color plane. This memory will hold one raster line of data. + * The size of the allocated run buffer must therefore be at least + * (bpp * xres / 8). Actual alignment of the buffer must conform to the + * bitwidth of the underlying pixel type. + * + * If there are multiple planes, they may share the same working buffer + * because different planes will not be operate on concurrently. However, + * if there are multiple LCD devices, they must each have unique run buffers. + */ + +static uint16_t g_runbuffer[STM32_XRES]; + +/* This structure describes the overall LCD video controller */ + +static const struct fb_videoinfo_s g_videoinfo = +{ + .fmt = STM32_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */ + .xres = STM32_XRES, /* Horizontal resolution in pixel columns */ + .yres = STM32_YRES, /* Vertical resolution in pixel rows */ + .nplanes = 1, /* Number of color planes supported */ +}; + +/* This is the standard, NuttX Plane information object */ + +static const struct lcd_planeinfo_s g_planeinfo = +{ + .putrun = stm32_putrun, /* Put a run into LCD memory */ + .getrun = stm32_getrun, /* Get a run from LCD memory */ + .buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ + .bpp = STM32_BPP, /* Bits-per-pixel */ +}; + +/* This is the standard, NuttX LCD driver object */ + +static struct stm32_dev_s g_lcddev = +{ + .dev = + { + /* LCD Configuration */ + + .getvideoinfo = stm32_getvideoinfo, + .getplaneinfo = stm32_getplaneinfo, + + /* LCD RGB Mapping -- Not supported */ + /* Cursor Controls -- Not supported */ + + /* LCD Specific Controls */ + + .getpower = stm32_getpower, + .setpower = stm32_setpower, + .getcontrast = stm32_getcontrast, + .setcontrast = stm32_setcontrast, + }, +}; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_lcdshow + * + * Description: + * Show the state of the interface + * + ************************************************************************************/ + +#ifdef CONFIG_LCD_REGDEBUG +static void stm32_lcdshow(FAR struct stm32_lower_s *priv, FAR const char *msg) +{ + dbg("%s:\n", msg); + dbg(" CRTL RS: %d CS: %d RD: %d WR: %d LE: %d\n", + getreg32(LCD_RS_READ), getreg32(LCD_CS_READ), getreg32(LCD_RD_READ), + getreg32(LCD_WR_READ), getreg32(LCD_LE_READ)); + dbg(" DATA CR: %08x %08x\n", getreg32(LCD_CRL), getreg32(LCD_CRH)); + if (priv->output) + { + dbg(" OUTPUT: %08x\n", getreg32(LCD_ODR)); + } + else + { + dbg(" INPUT: %08x\n", getreg32(LCD_IDR)); + } +} +#endif + +/************************************************************************************ + * Name: stm32_writereg + * + * Description: + * Write to an LCD register + * + ************************************************************************************/ + +static void stm32_writereg(FAR struct stm32_dev_s *priv, uint8_t regaddr, uint16_t regval) +{ + /* Make sure that we are configured for output */ + + stm32_lcdoutput(priv); + + /* Write the 8-bit register index */ + + putreg32(1, LCD_CS_CLEAR); + putreg32(1, LCD_RS_CLEAR); + putreg32(1, LCD_WR_CLEAR); + putreg32((uint32_t)regaddr, LCD_ODR); + putreg32(1, LCD_WR_SET); + + /* Then write the 16-bit register value */ + + putreg32(1, LCD_RS_SET); + putreg32(1, LCD_WR_CLEAR); + putreg32((uint32_t)regval, LCD_ODR); + putreg32(1, LCD_WR_SET); + putreg32(1, LCD_CS_SET); +} + +/************************************************************************************ + * Name: stm32_readreg + * + * Description: + * Read from an LCD register + * + ************************************************************************************/ + +static uint16_t stm32_readreg(FAR struct stm32_dev_s *priv, uint8_t regaddr) +{ + uint16_t regval; + + /* Make sure that we are configured for output */ + + stm32_lcdoutput(priv); + + /* Write the 8-bit register index */ + + putreg32(1, LCD_CS_CLEAR); + putreg32(1, LCD_RS_CLEAR); + putreg32(1, LCD_WR_CLEAR); + putreg32((uint32_t)regaddr, LCD_ODR); + putreg32(1, LCD_WR_SET); + + /* Make sure that we are configure for input */ + + stm32_lcdinput(priv); + + /* Read the 16-bit register value */ + + putreg32(1, LCD_RS_SET); + putreg32(1, LCD_RD_CLEAR); + putreg32(1, LCD_RD_SET); + regval = (uint16_t)getreg32(LCD_IDR); + putreg32(1, LCD_CS_SET); + + return regval; +} + +/************************************************************************************ + * Name: stm32_gramselect + * + * Description: + * Setup to read or write multiple pixels to the GRAM memory + * + ************************************************************************************/ + +static void stm32_gramselect(FAR struct stm32_dev_s *priv) +{ + /* Make sure that we are configured for output */ + + stm32_lcdoutput(priv); + + /* Write the command */ + + putreg32(1, LCD_CS_CLEAR); + putreg32(1, LCD_RS_CLEAR); + putreg32(1, LCD_WR_CLEAR); + putreg32((uint32_t)LCD_REG_34, LCD_ODR); + putreg32(1, LCD_WR_SET); + putreg32(1, LCD_CS_SET); +} + +/************************************************************************************ + * Name: stm32_writegram + * + * Description: + * Write one pixel to the GRAM memory + * + ************************************************************************************/ + +static inline void stm32_writegram(FAR struct stm32_dev_s *priv, uint16_t rgbval) +{ + /* Make sure that we are configured for output */ + + stm32_lcdoutput(priv); + + /* Write the value (GRAM register already selected) */ + + putreg32(1, LCD_CS_CLEAR); + putreg32(1, LCD_RS_SET); + putreg32(1, LCD_WR_CLEAR); + putreg32((uint32_t)rgbval, LCD_ODR); + putreg32(1, LCD_WR_SET); + putreg32(1, LCD_CS_SET); +} + +/************************************************************************************ + * Name: stm32_readgram + * + * Description: + * Read one 16-bit pixel to the GRAM memory + * + ************************************************************************************/ + +static inline uint16_t stm32_readgram(FAR struct stm32_dev_s *priv) +{ + uint16_t regval; + + /* Make sure that we are configure for input */ + + stm32_lcdinput(priv); + + /* Read the 16-bit value */ + + putreg32(1, LCD_CS_CLEAR); + putreg32(1, LCD_RS_SET); + putreg32(1, LCD_RD_CLEAR); + putreg32(1, LCD_RD_SET); + regval = (uint16_t)getreg32(LCD_IDR); + putreg32(1, LCD_CS_SET); + + return regval; +} + +/************************************************************************************ + * Name: stm32_readnosetup + * + * Description: + * Prime the operation by reading one pixel from the GRAM memory if necessary for + * this LCD type. When reading 16-bit gram data, there may be some shifts in the + * returned data: + * + * - ILI932x: Discard first dummy read; no shift in the return data + * + ************************************************************************************/ + +static void stm32_readnosetup(FAR struct stm32_dev_s *priv, FAR uint16_t *accum) +{ + /* Read-ahead one pixel */ + + *accum = stm32_readgram(priv); +} + +/************************************************************************************ + * Name: stm32_readnoshift + * + * Description: + * Read one correctly aligned pixel from the GRAM memory. Possibly shifting the + * data and possibly swapping red and green components. + * + * - ILI932x: Unknown -- assuming colors are in the color order + * + ************************************************************************************/ + +static uint16_t stm32_readnoshift(FAR struct stm32_dev_s *priv, FAR uint16_t *accum) +{ + /* Read the value (GRAM register already selected) */ + + return stm32_readgram(priv); +} + +/************************************************************************************ + * Name: stm32_setcursor + * + * Description: + * Set the cursor position. In landscape mode, the "column" is actually the physical + * Y position and the "row" is the physical X position. + * + ************************************************************************************/ + +static void stm32_setcursor(FAR struct stm32_dev_s *priv, uint16_t col, uint16_t row) +{ + if (priv->type == LCD_TYPE_ILI9919) + { + stm32_writereg(priv, LCD_REG_78, col); /* GRAM horizontal address */ + stm32_writereg(priv, LCD_REG_79, row); /* GRAM vertical address */ + } + else + { + stm32_writereg(priv, LCD_REG_32, row); /* GRAM vertical address */ + stm32_writereg(priv, LCD_REG_33, col); /* GRAM horizontal address */ + } +} + +/************************************************************************************ + * Name: stm32_dumprun + * + * Description: + * Dump the contexts of the run buffer: + * + * run - The buffer in containing the run read to be dumped + * npixels - The number of pixels to dump + * + ************************************************************************************/ + +#if 0 /* Sometimes useful */ +static void stm32_dumprun(FAR const char *msg, FAR uint16_t *run, size_t npixels) +{ + int i, j; + + syslog(LOG_DEBUG, "\n%s:\n", msg); + for (i = 0; i < npixels; i += 16) + { + up_putc(' '); + syslog(LOG_DEBUG, " "); + for (j = 0; j < 16; j++) + { + syslog(LOG_DEBUG, " %04x", *run++); + } + + up_putc('\n'); + } +} +#endif + +/************************************************************************************ + * Name: stm32_putrun + * + * Description: + * This method can be used to write a partial raster line to the LCD: + * + * row - Starting row to write to (range: 0 <= row < yres) + * col - Starting column to write to (range: 0 <= col <= xres-npixels) + * buffer - The buffer containing the run to be written to the LCD + * npixels - The number of pixels to write to the LCD + * (range: 0 < npixels <= xres-col) + * + ************************************************************************************/ + +static int stm32_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels) +{ + FAR struct stm32_dev_s *priv = &g_lcddev; + FAR const uint16_t *src = (FAR const uint16_t*)buffer; + int i; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + /* Write the run to GRAM */ + +#ifdef CONFIG_LCD_LANDSCAPE + /* Convert coordinates */ + + /* Write the GRAM data, manually incrementing X */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm32_setcursor(priv, col, row); + stm32_gramselect(priv); + stm32_writegram(priv, *src++); + + /* Increment to next column */ + + col++; + } +#elif defined(CONFIG_LCD_RLANDSCAPE) + /* Convert coordinates */ + + col = (STM32_XRES-1) - col; + row = (STM32_YRES-1) - row; + + /* Set the cursor position */ + + stm32_setcursor(priv, col, row); + + /* Then write the GRAM data, auto-decrementing X */ + + stm32_gramselect(priv); + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position (auto-decrements to the next column) */ + + stm32_writegram(priv, *src++); + } +#elif defined(CONFIG_LCD_PORTRAIT) + /* Convert coordinates */ + + col = (STM32_XRES-1) - col; + + /* Then write the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm32_setcursor(priv, row, col); + stm32_gramselect(priv); + stm32_writegram(priv, *src++); + + /* Increment to next column */ + + col--; + } +#else /* CONFIG_LCD_RPORTRAIT */ + /* Convert coordinates */ + + row = (STM32_YRES-1) - row; + + /* Then write the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm32_setcursor(priv, row, col); + stm32_gramselect(priv); + stm32_writegram(priv, *src++); + + /* Decrement to next column */ + + col++; + } +#endif + return OK; +} + +/************************************************************************************ + * Name: stm32_getrun + * + * Description: + * This method can be used to read a partial raster line from the LCD: + * + * row - Starting row to read from (range: 0 <= row < yres) + * col - Starting column to read read (range: 0 <= col <= xres-npixels) + * buffer - The buffer in which to return the run read from the LCD + * npixels - The number of pixels to read from the LCD + * (range: 0 < npixels <= xres-col) + * + ************************************************************************************/ + +static int stm32_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels) +{ + FAR struct stm32_dev_s *priv = &g_lcddev; + FAR uint16_t *dest = (FAR uint16_t*)buffer; + void (*readsetup)(FAR struct stm32_dev_s *priv, FAR uint16_t *accum); + uint16_t (*readgram)(FAR struct stm32_dev_s *priv, FAR uint16_t *accum); + uint16_t accum; + int i; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + /* Configure according to the LCD type. Kind of silly with only one LCD type */ + + switch (priv->type) + { + case LCD_TYPE_ILI1505: + case LCD_TYPE_ILI9300: + case LCD_TYPE_ILI9320: + case LCD_TYPE_ILI9321: + case LCD_TYPE_ILI9325: + case LCD_TYPE_ILI9328: + case LCD_TYPE_ILI9331: + case LCD_TYPE_ILI9919: + readsetup = stm32_readnosetup; + readgram = stm32_readnoshift; + break; + + case LCD_TYPE_UNKNOWN: + default: /* Shouldn't happen */ + return -ENOSYS; + } + + /* Read the run from GRAM */ + +#ifdef CONFIG_LCD_LANDSCAPE + /* Convert coordinates */ + + for (i = 0; i < npixels; i++) + { + /* Read the next pixel from this position */ + + stm32_setcursor(priv, row, col); + stm32_gramselect(priv); + stm32_lcdinput(priv); + readsetup(priv, &accum); + *dest++ = readgram(priv, &accum); + + /* Increment to next column */ + + col++; + } +#elif defined(CONFIG_LCD_RLANDSCAPE) + /* Convert coordinates */ + + col = (STM32_XRES-1) - col; + row = (STM32_YRES-1) - row; + + /* Set the cursor position */ + + stm32_setcursor(priv, col, row); + + /* Then read the GRAM data, auto-decrementing Y */ + + stm32_gramselect(priv); + stm32_lcdinput(priv); + + /* Prime the pump for unaligned read data */ + + readsetup(priv, &accum); + + for (i = 0; i < npixels; i++) + { + /* Read the next pixel from this position (autoincrements to the next row) */ + + *dest++ = readgram(priv, &accum); + } +#elif defined(CONFIG_LCD_PORTRAIT) + /* Convert coordinates */ + + col = (STM32_XRES-1) - col; + + /* Then read the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Read the next pixel from this position */ + + stm32_setcursor(priv, row, col); + stm32_gramselect(priv); + stm32_lcdinput(priv); + readsetup(priv, &accum); + *dest++ = readgram(priv, &accum); + + /* Increment to next column */ + + col--; + } +#else /* CONFIG_LCD_RPORTRAIT */ + /* Convert coordinates */ + + row = (STM32_YRES-1) - row; + + /* Then write the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm32_setcursor(priv, row, col); + stm32_gramselect(priv); + stm32_lcdinput(priv); + readsetup(priv, &accum); + *dest++ = readgram(priv, &accum); + + /* Decrement to next column */ + + col++; + } +#endif + + return OK; +} + +/************************************************************************************ + * Name: stm32_getvideoinfo + * + * Description: + * Get information about the LCD video controller configuration. + * + ************************************************************************************/ + +static int stm32_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo) +{ + DEBUGASSERT(dev && vinfo); + lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n", + g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes); + memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s)); + return OK; +} + +/************************************************************************************ + * Name: stm32_getplaneinfo + * + * Description: + * Get information about the configuration of each LCD color plane. + * + ************************************************************************************/ + +static int stm32_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo) +{ + DEBUGASSERT(dev && pinfo && planeno == 0); + lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp); + memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s)); + return OK; +} + +/************************************************************************************ + * Name: stm32_getpower + * + * Description: + * Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + ************************************************************************************/ + +static int stm32_getpower(struct lcd_dev_s *dev) +{ + FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev; + + lcdvdbg("power: %d\n", 0); + return priv->power; +} + +/************************************************************************************ + * Name: stm32_poweroff + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + ************************************************************************************/ + +static int stm32_poweroff(FAR struct stm32_dev_s *priv) +{ + /* Turn the display off */ + + stm32_writereg(priv, LCD_REG_7, 0); + + /* Remember the power off state */ + + priv->power = 0; + return OK; +} + +/************************************************************************************ + * Name: stm32_setpower + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + ************************************************************************************/ + +static int stm32_setpower(struct lcd_dev_s *dev, int power) +{ + FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev; + + lcdvdbg("power: %d\n", power); + DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER); + + /* Set new power level */ + + if (power > 0) + { + /* Then turn the display on */ + +#ifndef CONFIG_STM32_ILI9300_DISABLE + if (priv->type == LCD_TYPE_ILI9300) + { + stm32_writereg(priv, LCD_REG_7, 0x0173); + } + else +#endif +#ifndef CONFIG_STM32_ILI9320_DISABLE + if (priv->type == LCD_TYPE_ILI9320) + { + stm32_writereg(priv, LCD_REG_7, 0x0173); + } + else +#endif +#ifndef CONFIG_STM32_ILI9321_DISABLE + if (priv->type == LCD_TYPE_ILI9321) + { + stm32_writereg(priv, LCD_REG_7, 0x0173); + } + else +#endif +#ifndef CONFIG_STM32_ILI9325_DISABLE + if (priv->type == LCD_TYPE_ILI9325) + { + stm32_writereg(priv, LCD_REG_7, 0x0133); + } + else +#endif +#ifndef CONFIG_STM32_ILI9328_DISABLE + if (priv->type == LCD_TYPE_ILI9328) + { + stm32_writereg(priv, LCD_REG_7, 0x0133); + } + else +#endif +#ifndef CONFIG_STM32_ILI9331_DISABLE + if (priv->type == LCD_TYPE_ILI9331) + { + stm32_writereg(priv, LCD_REG_7, 0x0021); + up_mdelay(50); + stm32_writereg(priv, LCD_REG_7, 0x0061); + up_mdelay(50); + stm32_writereg(priv, LCD_REG_7, 0x0133); /* 262K color and display ON */ + } + else +#endif +#ifndef CONFIG_STM32_ILI9919_DISABLE + if (priv->type == LCD_TYPE_ILI9919) + { + stm32_writereg(priv, LCD_REG_7, 0x0033); + } + else +#endif +#ifndef CONFIG_STM32_ILI1505_DISABLE + if (priv->type == LCD_TYPE_ILI1505) + { + stm32_writereg(priv, LCD_REG_7, 0x0021); + up_mdelay(20); + stm32_writereg(priv, LCD_REG_7, 0x0061); + up_mdelay(20); + stm32_writereg(priv, LCD_REG_7, 0x0173); + } + else +#endif + { + gdbg("Unsupported LCD: %d\n", priv->type); + } + + up_mdelay(50); + priv->power = power; + } + else + { + /* Turn the display off */ + + stm32_poweroff(priv); + } + + return OK; +} + +/************************************************************************************ + * Name: stm32_getcontrast + * + * Description: + * Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST). + * + ************************************************************************************/ + +static int stm32_getcontrast(struct lcd_dev_s *dev) +{ + lcdvdbg("Not implemented\n"); + return -ENOSYS; +} + +/************************************************************************************ + * Name: stm32_setcontrast + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + ************************************************************************************/ + +static int stm32_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) +{ + lcdvdbg("contrast: %d\n", contrast); + return -ENOSYS; +} + +/************************************************************************************ + * Name: stm32_lcdinput + * + * Description: + * Config data lines for input operations. + * + ************************************************************************************/ + +static void stm32_lcdinput(FAR struct stm32_dev_s *priv) +{ +#ifndef CONFIG_LCD_FASTCONFIG + int i; +#endif + + /* Check if we are already configured for input */ + + if (priv->output) + { + /* Configure GPIO data lines as inputs */ + +#ifdef CONFIG_LCD_FASTCONFIG + putreg32(LCD_INPUT, LCD_CRL); + putreg32(LCD_INPUT, LCD_CRH); +#else + for (i = 0; i < 16; i++) + { + stm32_configgpio(g_lcdin[i]); + } +#endif + /* No longer configured for output */ + + priv->output = false; + } +} + +/************************************************************************************ + * Name: stm32_lcdoutput + * + * Description: + * Config data lines for input operations. + * + ************************************************************************************/ + +static void stm32_lcdoutput(FAR struct stm32_dev_s *priv) +{ +#ifndef CONFIG_LCD_FASTCONFIG + int i; +#endif + + /* Check if we are already configured for output */ + + if (!priv->output) + { + /* Configure GPIO data lines as outputs */ + +#ifdef CONFIG_LCD_FASTCONFIG + putreg32(LCD_OUTPUT, LCD_CRL); + putreg32(LCD_OUTPUT, LCD_CRH); +#else + for (i = 0; i < 16; i++) + { + stm32_configgpio(g_lcdout[i]); + } +#endif + /* Now we are configured for output */ + + priv->output = true; + } +} + +/************************************************************************************ + * Name: stm32_lcd9300init + * + * Description: + * Initialize the ILI9300/9220/9321 LCD. + * + ************************************************************************************/ + +#if !defined(CONFIG_STM32_ILI9300_DISABLE) || !defined(CONFIG_STM32_ILI9320_DISABLE) || !defined(CONFIG_STM32_ILI9321_DISABLE) +static void stm32_lcd9300init(FAR struct stm32_dev_s *priv, enum lcd_type_e lcdtype) +{ + stm32_writereg(priv, LCD_REG_0, 0x0001); /* Start internal OSC */ + stm32_writereg(priv, LCD_REG_1, 0x0100); /* Driver Output Control */ + stm32_writereg(priv, LCD_REG_2, 0x0700); /* LCD Driver Waveform Control */ + stm32_writereg(priv, LCD_REG_3, 0x1018); /* Set GRAM write direction and BGR=1 (0x1030)*/ + + stm32_writereg(priv, LCD_REG_4, 0x0000); /* Scalling Control */ + stm32_writereg(priv, LCD_REG_8, 0x0202); /* Set the back porch and front porch (0x0207) */ + stm32_writereg(priv, LCD_REG_9, 0x0000); /* Set non-display area refresh cycle ISC[3:0] */ + stm32_writereg(priv, LCD_REG_10, 0x0000); /* Frame Cycle Control */ + stm32_writereg(priv, LCD_REG_12, (1<<0)); /* RGB interface setting (0x0000) */ + stm32_writereg(priv, LCD_REG_13, 0x0000); /* Frame Maker Position */ + stm32_writereg(priv, LCD_REG_15, 0x0000); /* RGB interface polarity */ + + up_mdelay(50); + stm32_writereg(priv, LCD_REG_7, 0x0101); /* Display Control */ + up_mdelay(50); + + /* Power On sequence */ + + stm32_writereg(priv, LCD_REG_16, (1<<12)|(0<<8)|(1<<7)|(1<<6)|(0<<4)); /* Power Control 1 (0x16b0) */ + stm32_writereg(priv, LCD_REG_17, 0x0007); /* Power Control 2 (0x0001) */ + stm32_writereg(priv, LCD_REG_18, (1<<8)|(1<<4)|(0<<0)); /* Power Control 3 (0x0138) */ + stm32_writereg(priv, LCD_REG_19, 0x0b00); /* VDV[4:0] for VCOM amplitude */ + stm32_writereg(priv, LCD_REG_41, 0x0000); /* VCM[4:0] for VCOMH */ + + stm32_writereg(priv, LCD_REG_43, (1<<14)|(1<<4)); + + stm32_writereg(priv, LCD_REG_80, 0); /* Set X Start */ + stm32_writereg(priv, LCD_REG_81, 239); /* Set X End */ + stm32_writereg(priv, LCD_REG_82, 0); /* Set Y Start */ + stm32_writereg(priv, LCD_REG_83, 319); /* Set Y End */ + + stm32_writereg(priv, LCD_REG_96, 0x2700); /* Driver Output Control */ + stm32_writereg(priv, LCD_REG_97, 0x0001); /* Driver Output Control */ + stm32_writereg(priv, LCD_REG_106, 0x0000); /* Vertical Srcoll Control */ + + stm32_writereg(priv, LCD_REG_128, 0x0000); /* Display Position? Partial Display 1 */ + stm32_writereg(priv, LCD_REG_129, 0x0000); /* RAM Address Start? Partial Display 1 */ + stm32_writereg(priv, LCD_REG_130, 0x0000); /* RAM Address End-Partial Display 1 */ + stm32_writereg(priv, LCD_REG_131, 0x0000); /* Display Position? Partial Display 2 */ + stm32_writereg(priv, LCD_REG_132, 0x0000); /* RAM Address Start? Partial Display 2 */ + stm32_writereg(priv, LCD_REG_133, 0x0000); /* RAM Address End? Partial Display 2 */ + + stm32_writereg(priv, LCD_REG_144, (0<<7)|(16<<0)); /* Frame Cycle Control (0x0013) */ + stm32_writereg(priv, LCD_REG_146, 0x0000); /* Panel Interface Control 2 */ + stm32_writereg(priv, LCD_REG_147, 0x0001); /* Panel Interface Control 3 */ + stm32_writereg(priv, LCD_REG_149, 0x0110); /* Frame Cycle Control */ + stm32_writereg(priv, LCD_REG_151, (0<<8)); + stm32_writereg(priv, LCD_REG_152, 0x0000); /* Frame Cycle Control */ + up_mdelay(50); + stm32_writereg(priv, LCD_REG_7, 0x0000); /* Display off */ +} +#endif + +/************************************************************************************ + * Name: stm32_lcd9331init + * + * Description: + * Initialize the ILI9331 LCD. + * + ************************************************************************************/ + +#ifndef CONFIG_STM32_ILI9331_DISABLE +static void stm32_lcd9331init(FAR struct stm32_dev_s *priv) +{ + stm32_writereg(priv, LCD_REG_231, 0x1014); + stm32_writereg(priv, LCD_REG_1, 0x0100); /* Set SS and SM bit */ + stm32_writereg(priv, LCD_REG_2, 0x0200); /* Set 1 line inversion */ + stm32_writereg(priv, LCD_REG_3, 0x1030); /* Set GRAM write direction and BGR=1 */ + stm32_writereg(priv, LCD_REG_8, 0x0202); /* Set the back porch and front porch */ + stm32_writereg(priv, LCD_REG_9, 0x0000); /* Set non-display area refresh cycle ISC[3:0] */ + stm32_writereg(priv, LCD_REG_10, 0x0000); /* FMARK function */ + stm32_writereg(priv, LCD_REG_12, 0x0000); /* RGB interface setting */ + stm32_writereg(priv, LCD_REG_13, 0x0000); /* Frame marker Position */ + stm32_writereg(priv, LCD_REG_15, 0x0000); /* RGB interface polarity */ + + /* Power On sequence */ + + stm32_writereg(priv, LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + stm32_writereg(priv, LCD_REG_17, 0x0007); /* DC1[2:0], DC0[2:0], VC[2:0] */ + stm32_writereg(priv, LCD_REG_18, 0x0000); /* VREG1OUT voltage */ + stm32_writereg(priv, LCD_REG_19, 0x0000); /* VDV[4:0] for VCOM amplitude */ + up_mdelay(200); /* Dis-charge capacitor power voltage */ + stm32_writereg(priv, LCD_REG_16, 0x1690); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + stm32_writereg(priv, LCD_REG_17, 0x0227); /* DC1[2:0], DC0[2:0], VC[2:0] */ + up_mdelay(50); + stm32_writereg(priv, LCD_REG_18, 0x000c); /* Internal reference voltage= Vci; */ + up_mdelay(50); + stm32_writereg(priv, LCD_REG_19, 0x0800); /* Set VDV[4:0] for VCOM amplitude */ + stm32_writereg(priv, LCD_REG_41, 0x0011); /* Set VCM[5:0] for VCOMH */ + stm32_writereg(priv, LCD_REG_43, 0x000b); /* Set Frame Rate */ + up_mdelay(50); + stm32_writereg(priv, LCD_REG_32, 0x0000); /* GRAM horizontal Address */ + stm32_writereg(priv, LCD_REG_33, 0x0000); /* GRAM Vertical Address */ + + /* Adjust the Gamma Curve */ + + stm32_writereg(priv, LCD_REG_48, 0x0000); + stm32_writereg(priv, LCD_REG_49, 0x0106); + stm32_writereg(priv, LCD_REG_50, 0x0000); + stm32_writereg(priv, LCD_REG_53, 0x0204); + stm32_writereg(priv, LCD_REG_54, 0x160a); + stm32_writereg(priv, LCD_REG_55, 0x0707); + stm32_writereg(priv, LCD_REG_56, 0x0106); + stm32_writereg(priv, LCD_REG_57, 0x0707); + stm32_writereg(priv, LCD_REG_60, 0x0402); + stm32_writereg(priv, LCD_REG_61, 0x0c0f); + + /* Set GRAM area */ + + stm32_writereg(priv, LCD_REG_80, 0x0000); /* Horizontal GRAM Start Address */ + stm32_writereg(priv, LCD_REG_81, 0x00ef); /* Horizontal GRAM End Address */ + stm32_writereg(priv, LCD_REG_82, 0x0000); /* Vertical GRAM Start Address */ + stm32_writereg(priv, LCD_REG_83, 0x013f); /* Vertical GRAM Start Address */ + stm32_writereg(priv, LCD_REG_96, 0x2700); /* Gate Scan Line */ + stm32_writereg(priv, LCD_REG_97, 0x0001); /* NDL,VLE, REV */ + stm32_writereg(priv, LCD_REG_106, 0x0000); /* set scrolling line */ + + /* Partial Display Control */ + + stm32_writereg(priv, LCD_REG_128, 0x0000); + stm32_writereg(priv, LCD_REG_129, 0x0000); + stm32_writereg(priv, LCD_REG_130, 0x0000); + stm32_writereg(priv, LCD_REG_131, 0x0000); + stm32_writereg(priv, LCD_REG_132, 0x0000); + stm32_writereg(priv, LCD_REG_133, 0x0000); + + /* Panel Control */ + + stm32_writereg(priv, LCD_REG_144, 0x0010); + stm32_writereg(priv, LCD_REG_146, 0x0600); + stm32_writereg(priv, LCD_REG_7, 0x0000); /* Display off */ +} +#endif + +/************************************************************************************ + * Name: stm32_lcd9325init + * + * Description: + * Initialize the ILI9325/9228 LCD. + * + ************************************************************************************/ + +#if !defined(CONFIG_STM32_ILI9325_DISABLE) || !defined(CONFIG_STM32_ILI9328_DISABLE) +static void stm32_lcd9325init(FAR struct stm32_dev_s *priv, enum lcd_type_e lcdtype) +{ + stm32_writereg(priv, LCD_REG_227, 0x3008); + stm32_writereg(priv, LCD_REG_231, 0x0012); + stm32_writereg(priv, LCD_REG_239, 0x1231); /* Set the internal vcore voltage */ +/*stm32_writereg(priv, LCD_REG_231, 0x0010); */ + stm32_writereg(priv, LCD_REG_0, 0x0001); /* Start internal osc */ + stm32_writereg(priv, LCD_REG_1, 0x0100); /* Set SS and SM bit */ + stm32_writereg(priv, LCD_REG_2, 0x0700); /* Power on sequence */ + stm32_writereg(priv, LCD_REG_3, (1<<12)|(1<<5)|(1<<4) ); /* 65K */ + stm32_writereg(priv, LCD_REG_4, 0x0000); /* Resize register */ + stm32_writereg(priv, LCD_REG_8, 0x0207); /* Set the back porch and front porch */ + stm32_writereg(priv, LCD_REG_9, 0x0000); /* Set non-display area refresh cycle ISC[3:0] */ + stm32_writereg(priv, LCD_REG_10, 0x0000); /* FMARK function */ + stm32_writereg(priv, LCD_REG_12, 0x0001); /* RGB interface setting */ + stm32_writereg(priv, LCD_REG_13, 0x0000); /* Frame marker Position (0x0f3c) */ + stm32_writereg(priv, LCD_REG_15, 0x0000); /* RGB interface polarity */ + + /* Power On sequence */ + + stm32_writereg(priv, LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + stm32_writereg(priv, LCD_REG_17, 0x0007); /* DC1[2:0], DC0[2:0], VC[2:0] */ + stm32_writereg(priv, LCD_REG_18, 0x0000); /* VREG1OUT voltage */ + stm32_writereg(priv, LCD_REG_19, 0x0000); /* VDV[4:0] for VCOM amplitude */ + up_mdelay(100); + stm32_writereg(priv, LCD_REG_16, 0x1590); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + stm32_writereg(priv, LCD_REG_17, 0x0227); /* DC1[2:0], DC0[2:0], VC[2:0] */ + up_mdelay(100); + stm32_writereg(priv, LCD_REG_18, 0x009c); /* VREG1OUT voltage */ + up_mdelay(100); + stm32_writereg(priv, LCD_REG_19, 0x1900); /* VDV[4:0] for VCOM amplitude */ + stm32_writereg(priv, LCD_REG_41, 0x0023); /* VCM[4:0] for VCOMH */ + stm32_writereg(priv, LCD_REG_43, 0x000e); + up_mdelay(100); + stm32_writereg(priv, LCD_REG_32, 0x0000); /* GRAM horizontal Address */ + stm32_writereg(priv, LCD_REG_33, 0x0000); /* GRAM Vertical Address */ + up_mdelay(100); + + /* Adjust the Gamma Curve */ + + stm32_writereg(priv, LCD_REG_48, 0x0007); + stm32_writereg(priv, LCD_REG_49, 0x0707); + stm32_writereg(priv, LCD_REG_50, 0x0006); + stm32_writereg(priv, LCD_REG_53, 0x0704); + stm32_writereg(priv, LCD_REG_54, 0x1f04); + stm32_writereg(priv, LCD_REG_55, 0x0004); + stm32_writereg(priv, LCD_REG_56, 0x0000); + stm32_writereg(priv, LCD_REG_57, 0x0706); + stm32_writereg(priv, LCD_REG_60, 0x0701); + stm32_writereg(priv, LCD_REG_61, 0x000f); + up_mdelay(100); + + /* Set GRAM area */ + + stm32_writereg(priv, LCD_REG_80, 0x0000); /* Horizontal GRAM Start Address */ + stm32_writereg(priv, LCD_REG_81, 0x00ef); /* Horizontal GRAM End Address */ + stm32_writereg(priv, LCD_REG_82, 0x0000); /* Vertical GRAM Start Address */ + stm32_writereg(priv, LCD_REG_83, 0x013f); /* Vertical GRAM End Address */ + stm32_writereg(priv, LCD_REG_96, 0xa700); /* Gate Scan Line */ + stm32_writereg(priv, LCD_REG_97, 0x0001); /* NDL, VLE, REV */ + stm32_writereg(priv, LCD_REG_106, 0x0000); /* Set scrolling line */ + + /* Partial Display Control */ + + stm32_writereg(priv, LCD_REG_128, 0x0000); + stm32_writereg(priv, LCD_REG_129, 0x0000); + stm32_writereg(priv, LCD_REG_130, 0x0000); + stm32_writereg(priv, LCD_REG_131, 0x0000); + stm32_writereg(priv, LCD_REG_132, 0x0000); + stm32_writereg(priv, LCD_REG_133, 0x0000); + + /* Panel Control */ + + stm32_writereg(priv, LCD_REG_144, 0x0010); + stm32_writereg(priv, LCD_REG_146, 0x0600); + + if (lcdtype == LCD_TYPE_ILI9328) + { + stm32_writereg(priv, LCD_REG_147, 0x0003); + stm32_writereg(priv, LCD_REG_149, 0x0110); + stm32_writereg(priv, LCD_REG_151, 0x0000); + stm32_writereg(priv, LCD_REG_152, 0x0000); + } + + stm32_writereg(priv, LCD_REG_7, 0x0000); /* Display off */ + stm32_writereg(priv, LCD_REG_32, 0x0000); /* GRAM horizontal Address */ + stm32_writereg(priv, LCD_REG_33, 0x0000); /* GRAM Vertical Address */ +} +#endif + +/************************************************************************************ + * Name: stm32_lcd9919init + * + * Description: + * Initialize the ILI9919 LCD. + * + ************************************************************************************/ + +#ifndef CONFIG_STM32_ILI9919_DISABLE +static inline void stm32_lcd9919init(FAR struct stm32_dev_s *priv) +{ + /* Power on reset, display off */ + + stm32_writereg(priv, LCD_REG_40, 0x0006); + stm32_writereg(priv, LCD_REG_0, 0x0001); /* Start internal OSC */ + stm32_writereg(priv, LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + stm32_writereg(priv, LCD_REG_1, 0x72ef); + stm32_writereg(priv, LCD_REG_2, 0x0600); /* Set 1 line inversion */ + stm32_writereg(priv, LCD_REG_3, 0x6a38); + stm32_writereg(priv, LCD_REG_17, 0x6874); /* DC1[2:0], DC0[2:0], VC[2:0] (0x0070) */ + + /* RAM write data mask */ + + stm32_writereg(priv, LCD_REG_15, 0x0000); /* RGB interface polarity */ + + stm32_writereg(priv, LCD_REG_11, 0x5308); + stm32_writereg(priv, LCD_REG_12, 0x0003); /* RGB interface setting */ + stm32_writereg(priv, LCD_REG_13, 0x000a); /* Frame marker Position */ + stm32_writereg(priv, LCD_REG_14, 0x2e00); /* 0x0030 */ + stm32_writereg(priv, LCD_REG_30, 0x00be); + stm32_writereg(priv, LCD_REG_37, 0x8000); + stm32_writereg(priv, LCD_REG_38, 0x7800); + stm32_writereg(priv, LCD_REG_39, 0x0078); + stm32_writereg(priv, LCD_REG_78, 0x0000); + stm32_writereg(priv, LCD_REG_79, 0x0000); + stm32_writereg(priv, LCD_REG_18, 0x08d9); /* VREG1OUT voltage */ + + /* Adjust the Gamma Curve */ + + stm32_writereg(priv, LCD_REG_48, 0x0000); /* 0x0007 */ + stm32_writereg(priv, LCD_REG_49, 0x0104); /* 0x0203 */ + stm32_writereg(priv, LCD_REG_50, 0x0100); /* 0x0001 */ + stm32_writereg(priv, LCD_REG_51, 0x0305); /* 0x0007 */ + stm32_writereg(priv, LCD_REG_52, 0x0505); /* 0x0007 */ + stm32_writereg(priv, LCD_REG_53, 0x0305); /* 0x0407 */ + stm32_writereg(priv, LCD_REG_54, 0x0707); /* 0x0407 */ + stm32_writereg(priv, LCD_REG_55, 0x0300); /* 0x0607 */ + stm32_writereg(priv, LCD_REG_58, 0x1200); /* 0x0106 */ + stm32_writereg(priv, LCD_REG_59, 0x0800); + + stm32_writereg(priv, LCD_REG_7, 0x0000); /* Display off */ +} +#endif + +/************************************************************************************ + * Name: stm32_lcd1505init + * + * Description: + * Initialize the ILI1505 LCD. + * + ************************************************************************************/ + +#ifndef CONFIG_STM32_ILI1505_DISABLE +static inline void stm32_lcd1505init(FAR struct stm32_dev_s *priv) +{ + stm32_writereg(priv, LCD_REG_7, 0x0000); + up_mdelay(5); + stm32_writereg(priv, LCD_REG_18, 0x011c); + stm32_writereg(priv, LCD_REG_164, 0x0001); /* NVM */ + stm32_writereg(priv, LCD_REG_8, 0x000f); + stm32_writereg(priv, LCD_REG_10, 0x0008); + stm32_writereg(priv, LCD_REG_13, 0x0008); + + /* Adjust the Gamma Curve */ + + stm32_writereg(priv, LCD_REG_48, 0x0707); + stm32_writereg(priv, LCD_REG_49, 0x0007); /* 0x0707 */ + stm32_writereg(priv, LCD_REG_50, 0x0603); + stm32_writereg(priv, LCD_REG_51, 0x0700); + stm32_writereg(priv, LCD_REG_52, 0x0202); + stm32_writereg(priv, LCD_REG_53, 0x0002); /* 0x0606 */ + stm32_writereg(priv, LCD_REG_54, 0x1f0f); + stm32_writereg(priv, LCD_REG_55, 0x0707); /* 0x0f0f, 0x0105 */ + stm32_writereg(priv, LCD_REG_56, 0x0000); + stm32_writereg(priv, LCD_REG_57, 0x0000); + stm32_writereg(priv, LCD_REG_58, 0x0707); + stm32_writereg(priv, LCD_REG_59, 0x0000); /* 0x0303 */ + stm32_writereg(priv, LCD_REG_60, 0x0007); /* 0x0707 */ + stm32_writereg(priv, LCD_REG_61, 0x0000); /* 0x1313, 0x1f08 */ + up_mdelay(5); + + stm32_writereg(priv, LCD_REG_7, 0x0001); + stm32_writereg(priv, LCD_REG_23, 0x0001); /* Power supply startup enable */ + up_mdelay(5); + + /* Power Control */ + + stm32_writereg(priv, LCD_REG_16, 0x17a0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + stm32_writereg(priv, LCD_REG_17, 0x0217); /* Reference voltage VC[2:0] Vciout = 1.00*Vcivl */ + stm32_writereg(priv, LCD_REG_18, 0x011e); /* Vreg1out = Vcilvl*1.80 (0x011c) */ + stm32_writereg(priv, LCD_REG_19, 0x0f00); /* VDV[4:0]-->VCOM Amplitude VcomL = VcomH - Vcom Ampl */ + stm32_writereg(priv, LCD_REG_42, 0x0000); + stm32_writereg(priv, LCD_REG_41, 0x000a); /* Vcomh = VCM1[4:0]*Vreg1out gate source voltage (0x001f) */ + stm32_writereg(priv, LCD_REG_18, 0x013e); /* Power supply on (0x013c) */ + + /* Coordinates Control */ + + stm32_writereg(priv, LCD_REG_80, 0x0000); /* Horizontal GRAM Start Address */ + stm32_writereg(priv, LCD_REG_81, 0x00ef); /* Horizontal GRAM End Address */ + stm32_writereg(priv, LCD_REG_82, 0x0000); /* Vertical GRAM Start Address */ + stm32_writereg(priv, LCD_REG_83, 0x013f); /* Vertical GRAM End Address */ + + /* Panel Image Control */ + + stm32_writereg(priv, LCD_REG_96, 0x2700); /* Gate Scan Line */ + stm32_writereg(priv, LCD_REG_97, 0x0001); /* NDL, VLE, REV */ + stm32_writereg(priv, LCD_REG_106, 0x0000); /* Set scrolling line */ + + /* Partial Image Control */ + + stm32_writereg(priv, LCD_REG_128, 0x0000); + stm32_writereg(priv, LCD_REG_129, 0x0000); + stm32_writereg(priv, LCD_REG_130, 0x0000); + stm32_writereg(priv, LCD_REG_131, 0x0000); + stm32_writereg(priv, LCD_REG_132, 0x0000); + stm32_writereg(priv, LCD_REG_133, 0x0000); + + /* Panel Interface Control */ + + stm32_writereg(priv, LCD_REG_144, 0x0013); + stm32_writereg(priv, LCD_REG_146, 0x0300); + stm32_writereg(priv, LCD_REG_147, 0x0005); + stm32_writereg(priv, LCD_REG_149, 0x0000); + stm32_writereg(priv, LCD_REG_151, 0x0000); + stm32_writereg(priv, LCD_REG_152, 0x0000); + + stm32_writereg(priv, LCD_REG_1, 0x0100); /* Set SS and SM bit */ + stm32_writereg(priv, LCD_REG_2, 0x0700); /* Set 1 line inversion */ + stm32_writereg(priv, LCD_REG_3, 0x1030); /* Set GRAM write direction and BGR=1 */ + stm32_writereg(priv, LCD_REG_4, 0x0000); /* Resize register */ + stm32_writereg(priv, LCD_REG_12, 0x0000); /* RGB interface setting */ + stm32_writereg(priv, LCD_REG_15, 0x0000); /* RGB interface polarity */ + stm32_writereg(priv, LCD_REG_32, 0x0000); /* GRAM horizontal Address */ + stm32_writereg(priv, LCD_REG_33, 0x0000); /* GRAM Vertical Address */ + stm32_writereg(priv, LCD_REG_7, 0x0000); /* Display off */ +} +#endif + +/************************************************************************************ + * Name: stm32_lcdinitialize + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + ************************************************************************************/ + +static inline int stm32_lcdinitialize(FAR struct stm32_dev_s *priv) +{ + uint16_t id; + int ret = OK; + + /* Check LCD ID */ + + stm32_writereg(priv, LCD_REG_0, 0x0001); /* Start internal oscillator */ + up_mdelay(50); + + id = stm32_readreg(priv, LCD_REG_0); /* Read the ID register */ + lcddbg("LCD ID: %04x\n", id); + + stm32_lcdoutput(priv); + up_mdelay(10); + + /* Initialize the LCD hardware */ + +#ifndef CONFIG_STM32_ILI9300_DISABLE + if (id == ILI9300_ID) + { + priv->type = LCD_TYPE_ILI9300; + stm32_lcd9300init(priv, LCD_TYPE_ILI9325); + } + else +#endif +#ifndef CONFIG_STM32_ILI9320_DISABLE + if (id == ILI9320_ID) + { + priv->type = LCD_TYPE_ILI9320; + stm32_lcd9300init(priv, LCD_TYPE_ILI9320); + } + else +#endif +#ifndef CONFIG_STM32_ILI9321_DISABLE + if (id == ILI9321_ID) + { + priv->type = LCD_TYPE_ILI9321; + stm32_lcd9300init(priv, LCD_TYPE_ILI9321); + } + else +#endif +#ifndef CONFIG_STM32_ILI9331_DISABLE + if (id == ILI9331_ID) + { + priv->type = LCD_TYPE_ILI9331; + stm32_lcd9331init(priv); + } + else +#endif +#ifndef CONFIG_STM32_ILI9325_DISABLE + if (id == ILI9325_ID) + { + priv->type = LCD_TYPE_ILI9325; + stm32_lcd9325init(priv, LCD_TYPE_ILI9325); + } + else +#endif +#ifndef CONFIG_STM32_ILI9328_DISABLE + if (id == ILI9328_ID) + { + priv->type = LCD_TYPE_ILI9328; + stm32_lcd9325init(priv, LCD_TYPE_ILI9328); + } + else +#endif +#ifndef CONFIG_STM32_ILI1505_DISABLE + if (id == 0x1505) + { + priv->type = LCD_TYPE_ILI1505; + stm32_lcd1505init(priv); + } + else +#endif +#ifndef CONFIG_STM32_ILI9919_DISABLE + if (id == 0x9919) + { + priv->type = LCD_TYPE_ILI9919; + stm32_lcd9919init(priv); + } + else +#endif + { + lcddbg("Unsupported LCD type\n"); + ret = -ENODEV; + } + + lcddbg("LCD type: %d\n", priv->type); + return ret; +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + ************************************************************************************/ + +int board_lcd_initialize(void) +{ + FAR struct stm32_dev_s *priv = &g_lcddev; + int ret; + int i; + + lcdvdbg("Initializing\n"); + + /* Configure GPIO pins. The initial state of priv->output is false, so + * we need to configure pins for output initially. + */ + + stm32_lcdoutput(priv); + + /* Configure control pins */ + + for (i = 0; i < NLCD_CONFIG; i++) + { + stm32_configgpio(g_lcdctrl[i]); + } + + /* Configure and enable LCD */ + + up_mdelay(50); + ret = stm32_lcdinitialize(priv); + if (ret == OK) + { + /* Clear the display (setting it to the color 0=black) */ + + stm32_lcdclear(0); + + /* Turn the display off */ + + stm32_poweroff(priv); + } + + return ret; +} + +/************************************************************************************ + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows support + * for multiple LCD devices. + * + ************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return &g_lcddev.dev; +} + +/************************************************************************************ + * Name: board_lcd_uninitialize + * + * Description: + * Unitialize the LCD support + * + ************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + FAR struct stm32_dev_s *priv = &g_lcddev; + + /* Put the LCD in the lowest possible power state */ + + stm32_poweroff(priv); + + /* Make sure that the LCD is not selected */ + + putreg32(1, LCD_CS_SET); +} + +/************************************************************************************ + * Name: stm32_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the Shenzhou board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * display is cleared by simply setting all GRAM memory to the specified color. + * + ************************************************************************************/ + +void stm32_lcdclear(uint16_t color) +{ + FAR struct stm32_dev_s *priv = &g_lcddev; + uint32_t i = 0; + + stm32_setcursor(priv, 0, 0); + stm32_gramselect(priv); + + /* Make sure that we are configured for output */ + + stm32_lcdoutput(priv); + + /* Write the selected color into the entire GRAM memory */ + + putreg32(1, LCD_CS_CLEAR); + putreg32(1, LCD_RS_SET); + for (i = 0; i < STM32_XRES * STM32_YRES; i++) + { + putreg32(1, LCD_WR_CLEAR); + putreg32((uint32_t)color, LCD_ODR); + putreg32(1, LCD_WR_SET); + } + + putreg32(1, LCD_CS_SET); +} + +#endif /* !HAVE_LCD */ diff --git a/configs/shenzhou/src/stm32_mmcsd.c b/configs/shenzhou/src/stm32_mmcsd.c new file mode 100644 index 0000000000000000000000000000000000000000..a585e31ad390568e46ec909a51e7c50fd68ff4e3 --- /dev/null +++ b/configs/shenzhou/src/stm32_mmcsd.c @@ -0,0 +1,127 @@ +/**************************************************************************** + * config/shenzhou/src/stm32_mmcsd.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "stm32_spi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* SPI1 connects to the SD CARD (and to the SPI FLASH) */ + +#define HAVE_MMCSD 1 /* Assume that we have SD support */ +#define STM32_MMCSDSPIPORTNO 1 /* Port is SPI1 */ +#define STM32_MMCSDSLOTNO 0 /* There is only one slot */ + +#ifndef CONFIG_STM32_SPI1 +# undef HAVE_MMCSD +#endif + +/* Can't support MMC/SD features if MMC/SD driver support is not selected */ + +#ifndef CONFIG_MMCSD +# undef HAVE_MMCSD +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# undef HAVE_MMCSD +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires CONFIG_DISABLE_MOUNTPOINT=n + * and CONFIG_STM32_SPI1=y + * + ****************************************************************************/ + +int stm32_sdinitialize(int minor) +{ +#ifdef HAVE_MMCSD + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + fvdbg("Initializing SPI port %d\n", STM32_MMCSDSPIPORTNO); + + spi = stm32_spibus_initialize(STM32_MMCSDSPIPORTNO); + if (!spi) + { + fdbg("Failed to initialize SPI port %d\n", STM32_MMCSDSPIPORTNO); + return -ENODEV; + } + + fvdbg("Successfully initialized SPI port %d\n", STM32_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + fvdbg("Binding SPI port %d to MMC/SD slot %d\n", + STM32_MMCSDSPIPORTNO, STM32_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(minor, STM32_MMCSDSLOTNO, spi); + if (ret < 0) + { + fdbg("Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + STM32_MMCSDSPIPORTNO, STM32_MMCSDSLOTNO, ret); + return ret; + } + + fvdbg("Successfuly bound SPI port %d to MMC/SD slot %d\n", + STM32_MMCSDSPIPORTNO, STM32_MMCSDSLOTNO); +#endif + return OK; +} + diff --git a/configs/shenzhou/src/stm32_relays.c b/configs/shenzhou/src/stm32_relays.c new file mode 100644 index 0000000000000000000000000000000000000000..a9acd03a562bffcdea66e0cd0bfa1c78d79bb3e8 --- /dev/null +++ b/configs/shenzhou/src/stm32_relays.c @@ -0,0 +1,287 @@ +/**************************************************************************** + * configs/shenzhou/src/stm32_relays.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Darcy Gong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "shenzhou.h" + +#ifdef CONFIG_ARCH_RELAYS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define RELAYS_MIN_RESET_TIME 5 +#define RELAYS_RESET_MTIME 5 +#define RELAYS_POWER_MTIME 50 + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static uint32_t g_relays_stat = 0; +static bool g_relays_init = false; + +static const uint16_t g_relays[NUM_RELAYS] = +{ + GPIO_RELAYS_R00 +#ifdef GPIO_RELAYS_R01 + , GPIO_RELAYS_R01 +#endif +#ifdef GPIO_RELAYS_R02 + , GPIO_RELAYS_R02 +#endif +#ifdef GPIO_RELAYS_R03 + , GPIO_RELAYS_R03 +#endif +#ifdef GPIO_RELAYS_R04 + , GPIO_RELAYS_R04 +#endif +#ifdef GPIO_RELAYS_R05 + , GPIO_RELAYS_R05 +#endif +#ifdef GPIO_RELAYS_R06 + , GPIO_RELAYS_R06 +#endif +#ifdef GPIO_RELAYS_R07 + , GPIO_RELAYS_R07 +#endif +#ifdef GPIO_RELAYS_R08 + , GPIO_RELAYS_R08 +#endif +#ifdef GPIO_RELAYS_R09 + , GPIO_RELAYS_R09 +#endif +#ifdef GPIO_RELAYS_R10 + , GPIO_RELAYS_R10 +#endif +#ifdef GPIO_RELAYS_R11 + , GPIO_RELAYS_R11 +#endif +#ifdef GPIO_RELAYS_R12 + , GPIO_RELAYS_R12 +#endif +#ifdef GPIO_RELAYS_R13 + , GPIO_RELAYS_R13 +#endif +#ifdef GPIO_RELAYS_R14 + , GPIO_RELAYS_R14 +#endif +#ifdef GPIO_RELAYS_R15 + , GPIO_RELAYS_R15 +#endif +#ifdef GPIO_RELAYS_R16 + , GPIO_RELAYS_R16 +#endif +#ifdef GPIO_RELAYS_R17 + , GPIO_RELAYS_R17 +#endif +#ifdef GPIO_RELAYS_R18 + , GPIO_RELAYS_R18 +#endif +#ifdef GPIO_RELAYS_R19 + , GPIO_RELAYS_R19 +#endif +#ifdef GPIO_RELAYS_R20 + , GPIO_RELAYS_R20 +#endif +#ifdef GPIO_RELAYS_R21 + , GPIO_RELAYS_R21 +#endif +#ifdef GPIO_RELAYS_R22 + , GPIO_RELAYS_R22 +#endif +#ifdef GPIO_RELAYS_R23 + , GPIO_RELAYS_R23 +#endif +#ifdef GPIO_RELAYS_R24 + , GPIO_RELAYS_R24 +#endif +#ifdef GPIO_RELAYS_R25 + , GPIO_RELAYS_R25 +#endif +#ifdef GPIO_RELAYS_R26 + , GPIO_RELAYS_R26 +#endif +#ifdef GPIO_RELAYS_R27 + , GPIO_RELAYS_R27 +#endif +#ifdef GPIO_RELAYS_R28 + , GPIO_RELAYS_R28 +#endif +#ifdef GPIO_RELAYS_R29 + , GPIO_RELAYS_R29 +#endif +#ifdef GPIO_RELAYS_R30 + , GPIO_RELAYS_R30 +#endif +#ifdef GPIO_RELAYS_R31 + , GPIO_RELAYS_R31 +#endif +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void up_relaysinit(void) +{ + int i; + + if (g_relays_init) + { + return; + } + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for some pins but NOT used in this file + */ + + for (i = 0; i < NUM_RELAYS; i++) + { + stm32_configgpio(g_relays[i]); + stm32_gpiowrite(g_relays[i], false); + } + + g_relays_init = true; +} + +void relays_setstat(int relays,bool stat) +{ + if ((unsigned)relays < NUM_RELAYS) + { + stm32_gpiowrite(g_relays[relays], stat); + if (!stat) + { + g_relays_stat &= ~(1 << relays); + } + else + { + g_relays_stat |= (1 << relays); + } + } +} + +bool relays_getstat(int relays) +{ + if ((unsigned)relays < NUM_RELAYS) + { + return (g_relays_stat & (1 << relays)) != 0; + } + + return false; +} + +void relays_setstats(uint32_t relays_stat) +{ + int i; + + for (i = 0; i < NUM_RELAYS; i++) + { + relays_setstat(i, (relays_stat & (1<0) + { + if (relays_getstat(relays)) + { + relays_setstat(relays, false); + usleep(RELAYS_MIN_RESET_TIME*1000*1000); + } + + relays_setstat(relays,true); + usleep(mdelay*100*1000); + relays_setstat(relays, false); + } + } +} + +void relays_onoffs(uint32_t relays_stat, uint32_t mdelay) +{ + int i; + + for (i = 0; i < NUM_RELAYS; i++) + { + relays_onoff(i, mdelay); + } +} + +void relays_resetmode(int relays) +{ + relays_onoff(relays, RELAYS_RESET_MTIME); +} + +void relays_powermode(int relays) +{ + relays_onoff(relays, RELAYS_POWER_MTIME); +} + +void relays_resetmodes(uint32_t relays_stat) +{ + relays_onoffs(relays_stat, RELAYS_RESET_MTIME); +} + +void relays_powermodes(uint32_t relays_stat) +{ + relays_onoffs(relays_stat, RELAYS_POWER_MTIME); +} + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/shenzhou/src/stm32_spi.c b/configs/shenzhou/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..48949d686a4caa6e020c6b8ea1ab8b45a60b79d1 --- /dev/null +++ b/configs/shenzhou/src/stm32_spi.c @@ -0,0 +1,222 @@ +/************************************************************************************ + * configs/shenzhou/src/stm32_spi.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "shenzhou.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_SPI +#endif + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Shenzhou board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ + /* NOTE: Clocking for SPI1 and/or SPI3 was already provided in stm32_rcc.c. + * Configurations of SPI pins is performed in stm32_spi.c. + * Here, we only initialize chip select pins unique to the board + * architecture. + */ + + /* SPI1 connects to the SD CARD and to the SPI FLASH */ + +#ifdef CONFIG_STM32_SPI1 + stm32_configgpio(GPIO_SD_CS); /* SD card chip select */ + stm32_configgpio(GPIO_SD_CD); /* SD card detect */ + stm32_configgpio(GPIO_FLASH_CS); /* FLASH chip select */ +#endif + + /* SPI3 connects to TFT LCD module and the RF24L01 2.4G wireless module */ + +#ifdef CONFIG_STM32_SPI3 + stm32_configgpio(GPIO_TP_CS); /* Touchscreen chip select */ + stm32_configgpio(GPIO_LCDDF_CS); /* Data flash chip select (on the LCD module) */ + stm32_configgpio(GPIO_LCDSD_CS); /* SD chip select (on the LCD module) */ + stm32_configgpio(GPIO_WIRELESS_CS); /* Wireless chip select */ +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + /* SPI1 connects to the SD CARD and to the SPI FLASH */ + + if (devid == SPIDEV_MMCSD) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_SD_CS, !selected); + } + else if (devid == SPIDEV_FLASH) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_FLASH_CS, !selected); + } +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + /* The card detect pin is pulled up so that we detect the presence of a card + * by see a low value on the input pin. + */ + + if (stm32_gpioread(GPIO_SD_CD)) + { + return 0; + } + + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + /* SPI3 connects to TFT LCD (for touchscreen and SD) and the RF24L01 2.4G + * wireless module. + */ + + if (devid == SPIDEV_TOUCHSCREEN) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_TP_CS, !selected); + } + else if (devid == SPIDEV_MMCSD) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_LCDDF_CS, !selected); + } + else if (devid == SPIDEV_FLASH) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_LCDSD_CS, !selected); + } + else if (devid == SPIDEV_WIRELESS) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_WIRELESS_CS, !selected); + } +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI3 */ diff --git a/configs/shenzhou/src/stm32_ssd1289.c b/configs/shenzhou/src/stm32_ssd1289.c new file mode 100644 index 0000000000000000000000000000000000000000..bddfa1c8b0a50e8320499f47267166aea1c680e4 --- /dev/null +++ b/configs/shenzhou/src/stm32_ssd1289.c @@ -0,0 +1,610 @@ +/************************************************************************************ + * configs/shenzhou/src/stm32_ssd1289.c + * + * This logic supports the connection of an SSD1289-based LCD to the Shenzhou IV + * board. + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "stm32.h" +#include "shenzhou.h" + +#ifdef CONFIG_LCD_SSD1289 + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +# undef CONFIG_LCD_REGDEBUG +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +#undef CONFIG_LCD_FASTCONFIG +#define CONFIG_LCD_FASTCONFIG 1 + +/* Shenzhou LCD Hardware Definitions ************************************************/ +/* Debug ****************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/************************************************************************************ + * Private Type Definition + ************************************************************************************/ + +/* This structure describes the state of this driver */ + +struct stm32_lower_s +{ + struct ssd1289_lcd_s dev; /* This is externally visible the driver state */ + FAR struct lcd_dev_s *drvr; /* The saved instance of the LCD driver */ + bool output; /* True: Configured for output */ +}; + +/************************************************************************************** + * Private Function Prototypes + **************************************************************************************/ +/* Helpers */ + +#ifdef CONFIG_LCD_REGDEBUG +static void stm32_lcdshow(FAR struct stm32_lower_s *priv, FAR const char *msg); +#else +# define stm32_lcdshow(p,m) +#endif + +static void stm32_wrdata(FAR struct stm32_lower_s *priv, uint16_t data); +#ifndef CONFIG_LCD_NOGETRUN +static inline uint16_t stm32_rddata(FAR struct stm32_lower_s *priv); +#endif + +/* Low Level LCD access */ + +static void stm32_select(FAR struct ssd1289_lcd_s *dev); +static void stm32_deselect(FAR struct ssd1289_lcd_s *dev); +static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index); +#ifndef CONFIG_LCD_NOGETRUN +static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev); +#endif +static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data); +static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power); + +/* Initialization */ + +static void stm32_lcdinput(FAR struct stm32_lower_s *priv); +static void stm32_lcdoutput(FAR struct stm32_lower_s *priv); + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* TFT LCD + * + * -- ---- -------------- ----------------------------------------------------------- + * PN NAME SIGNAL NOTES + * -- ---- -------------- ----------------------------------------------------------- + * 37 PB2 DATA_LE To TFT LCD (CN13, ping 28) + * 96 PB9 F_CS To both the TFT LCD (CN13, pin 30) and to the W25X16 SPI FLASH + * 34 PC5 TP_INT JP6. To TFT LCD (CN13) module (CN13, pin 26) + * 65 PC8 LCD_CS Active low: Pulled high (CN13, pin 19) + * 66 PC9 TP_CS Active low: Pulled high (CN13, pin 31) + * 78 PC10 SPI3_SCK To TFT LCD (CN13, pin 29) + * 79 PC11 SPI3_MISO To TFT LCD (CN13, pin 25) + * 80 PC12 SPI3_MOSI To TFT LCD (CN13, pin 27) + * 58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32) + * 60 PD13 LCD_RS To TFT LCD (CN13, pin 20) + * 61 PD14 LCD_WR To TFT LCD (CN13, pin 21). Schematic is wrong LCD_WR is PB14. + * 62 PD15 LCD_RD To TFT LCD (CN13, pin 22) + * 97 PE0 DB00 To TFT LCD (CN13, pin 3) + * 98 PE1 DB01 To TFT LCD (CN13, pin 4) + * 1 PE2 DB02 To TFT LCD (CN13, pin 5) + * 2 PE3 DB03 To TFT LCD (CN13, pin 6) + * 3 PE4 DB04 To TFT LCD (CN13, pin 7) + * 4 PE5 DB05 To TFT LCD (CN13, pin 8) + * 5 PE6 DB06 To TFT LCD (CN13, pin 9) + * 38 PE7 DB07 To TFT LCD (CN13, pin 10) + * 39 PE8 DB08 To TFT LCD (CN13, pin 11) + * 40 PE9 DB09 To TFT LCD (CN13, pin 12) + * 41 PE10 DB10 To TFT LCD (CN13, pin 13) + * 42 PE11 DB11 To TFT LCD (CN13, pin 16) + * 43 PE12 DB12 To TFT LCD (CN13, pin 15) + * 44 PE13 DB13 To TFT LCD (CN13, pin 16) + * 45 PE14 DB14 To TFT LCD (CN13, pin 17) + * 46 PE15 DB15 To TFT LCD (CN13, pin 18) + * + * NOTE: The backlight signl NC_BL (CN13, pin 24) is pulled high and not under + * software control + * + * On LCD module: + * -- -------------- ------------------------------------------------------------------- + * PN SIGNAL NOTES + * -- -------------- ------------------------------------------------------------------- + * 3 DB01 To LCD DB1 + * 4 DB00 To LCD DB0 + * 5 DB03 To LCD DB3 + * 6 DB02 To LCD DB2 + * 7 DB05 To LCD DB5 + * 8 DB04 To LCD DB4 + * 9 DB07 To LCD DB7 + * 10 DB06 To LCD DB6 + * 11 DB09 To LCD DB9 + * 12 DB08 To LCD DB8 + * 13 DB11 To LCD DB11 + * 14 DB10 To LCD DB10 + * 15 DB13 To LCD DB13 + * 16 DB12 To LCD DB12 + * 17 DB15 To LCD DB15 + * 18 DB14 To LCD DB14 + * 19 RS To LCD RS + * 20 /LCD_CS To LCD CS + * 21 /RD To LCD RD + * 22 /WR To LCD WR + * 23 BL_EN (Not referenced) + * 24 /RESET + * 25 /INT To Touch IC /INT + * 26 MISO To Touch IC DOUT; To AT45DB161B SO; To SD card DAT0 + * 27 LE To 74HC573 that controls LCD 8-bit/16-bit mode + * 28 MOSI To Touch IC DIN; To AT45DB161B SI; To SD card CMD + * 29 /DF_CS To AT45DB161B Data Flash /CS + * 30 SCLK To Touch IC DCLK; To AT45DB161B SCK; To SD card CLK + * 31 /SD_CS To SD card /CS + * 31 /TP_CS To Touch IC CS + */ + +/* LCD GPIO configurations */ + +#ifndef CONFIG_LCD_FASTCONFIG +static const uint32_t g_lcdout[16] = +{ + GPIO_LCD_D0OUT, GPIO_LCD_D1OUT, GPIO_LCD_D2OUT, GPIO_LCD_D3OUT, + GPIO_LCD_D4OUT, GPIO_LCD_D5OUT, GPIO_LCD_D6OUT, GPIO_LCD_D7OUT, + GPIO_LCD_D8OUT, GPIO_LCD_D9OUT, GPIO_LCD_D10OUT, GPIO_LCD_D11OUT, + GPIO_LCD_D12OUT, GPIO_LCD_D13OUT, GPIO_LCD_D14OUT, GPIO_LCD_D15OUT +}; + +static const uint32_t g_lcdin[16] = +{ + GPIO_LCD_D0IN, GPIO_LCD_D1IN, GPIO_LCD_D2IN, GPIO_LCD_D3IN, + GPIO_LCD_D4IN, GPIO_LCD_D5IN, GPIO_LCD_D6IN, GPIO_LCD_D7IN, + GPIO_LCD_D8IN, GPIO_LCD_D9IN, GPIO_LCD_D10IN, GPIO_LCD_D11IN, + GPIO_LCD_D12IN, GPIO_LCD_D13IN, GPIO_LCD_D14IN, GPIO_LCD_D15IN +}; +#endif + +static const uint32_t g_lcdconfig[] = +{ + GPIO_LCD_RS, GPIO_LCD_CS, GPIO_LCD_RD, GPIO_LCD_WR, + GPIO_LCD_LE, +}; +#define NLCD_CONFIG (sizeof(g_lcdconfig)/sizeof(uint32_t)) + +/* Driver state structure (only supports one LCD) */ + +static struct stm32_lower_s g_lcdlower = +{ + { + .select = stm32_select, + .deselect = stm32_deselect, + .index = stm32_index, +#ifndef CONFIG_LCD_NOGETRUN + .read = stm32_read, +#endif + .write = stm32_write, + .backlight = stm32_backlight + }, + .drvr = NULL, + .output = false +}; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_lcdshow + * + * Description: + * Show the state of the interface + * + ************************************************************************************/ + +#ifdef CONFIG_LCD_REGDEBUG +static void stm32_lcdshow(FAR struct stm32_lower_s *priv, FAR const char *msg) +{ + dbg("%s:\n", msg); + dbg(" CRTL RS: %d CS: %d RD: %d WR: %d LE: %d\n", + getreg32(LCD_RS_READ), getreg32(LCD_CS_READ), getreg32(LCD_RD_READ), + getreg32(LCD_WR_READ), getreg32(LCD_LE_READ)); + dbg(" DATA CR: %08x %08x\n", getreg32(LCD_CRL), getreg32(LCD_CRH)); + if (priv->output) + { + dbg(" OUTPUT: %08x\n", getreg32(LCD_ODR)); + } + else + { + dbg(" INPUT: %08x\n", getreg32(LCD_IDR)); + } +} +#endif + +/************************************************************************************ + * Name: stm32_wrdata + * + * Description: + * Latch data on D0-D15 and toggle the WR line. + * + ************************************************************************************/ + +static void stm32_wrdata(FAR struct stm32_lower_s *priv, uint16_t data) +{ + /* Make sure D0-D15 are configured as outputs */ + + stm32_lcdoutput(priv); + + /* Latch the 16-bit LCD data and toggle the WR line */ + + putreg32(1, LCD_WR_CLEAR); + putreg32((uint32_t)data, LCD_ODR); + + /* Total WR pulse with should be 50ns wide. */ + + putreg32(1, LCD_WR_SET); +} + +/************************************************************************************ + * Name: stm32_rddata + * + * Description: + * Latch data on D0-D15 and toggle the WR line. + * + ************************************************************************************/ + +#ifndef CONFIG_LCD_NOGETRUN +static inline uint16_t stm32_rddata(FAR struct stm32_lower_s *priv) +{ + uint16_t regval; + + /* Make sure D0-D15 are configured as inputs */ + + stm32_lcdinput(priv); + + /* Toggle the RD line to latch the 16-bit LCD data */ + + putreg32(1, LCD_RD_CLEAR); + + /* Data should appear 250ns after RD. Total RD pulse width should be 500nS */ + + __asm__ __volatile__(" nop\n nop\n nop\n nop\n"); + regval = (uint16_t)getreg32(LCD_IDR); + putreg32(1, LCD_RD_SET); + return regval; +} +#endif + +/************************************************************************************ + * Name: stm32_select + * + * Description: + * Select the LCD device + * + ************************************************************************************/ + +static void stm32_select(FAR struct ssd1289_lcd_s *dev) +{ + /* Select the LCD by setting the LCD_CS low */ + + putreg32(1, LCD_CS_CLEAR); +} + +/************************************************************************************ + * Name: stm32_deselect + * + * Description: + * De-select the LCD device + * + ************************************************************************************/ + +static void stm32_deselect(FAR struct ssd1289_lcd_s *dev) +{ + /* De-select the LCD by setting the LCD_CS high */ + + putreg32(1, LCD_CS_SET); +} + +/************************************************************************************ + * Name: stm32_index + * + * Description: + * Set the index register + * + ************************************************************************************/ + +static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index) +{ + FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)dev; + + /* Clear the RS signal to select the index address */ + + putreg32(1, LCD_RS_CLEAR); + + /* And write the index */ + + stm32_wrdata(priv, (uint16_t)index); +} + +/************************************************************************************ + * Name: stm32_read + * + * Description: + * Read LCD data (GRAM data or register contents) + * + ************************************************************************************/ + +#ifndef CONFIG_LCD_NOGETRUN +static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev) +{ + FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)dev; + + /* Set the RS signal to select the data address */ + + putreg32(1, LCD_RS_SET); + + /* Read and return the data */ + + return stm32_rddata(priv); +} +#endif + +/************************************************************************************ + * Name: stm32_write + * + * Description: + * Write LCD data (GRAM data or register contents) + * + ************************************************************************************/ + +static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data) +{ + FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)dev; + + /* Set the RS signal to select the data address */ + + putreg32(1, LCD_RS_SET); + + /* And write the data */ + + stm32_wrdata(priv, data); +} + +/************************************************************************************ + * Name: stm32_backlight + * + * Description: + * Write LCD data (GRAM data or register contents) + * + ************************************************************************************/ + +static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power) +{ + /* There is no software control over the backlight */ +} + +/************************************************************************************ + * Name: stm32_lcdinput + * + * Description: + * Config data lines for input operations. + * + ************************************************************************************/ + +static void stm32_lcdinput(FAR struct stm32_lower_s *priv) +{ +#ifndef CONFIG_LCD_FASTCONFIG + int i; +#endif + + /* Check if we are already configured for input */ + + if (priv->output) + { + /* Configure GPIO data lines as inputs */ + +#ifdef CONFIG_LCD_FASTCONFIG + putreg32(LCD_INPUT, LCD_CRL); + putreg32(LCD_INPUT, LCD_CRH); +#else + for (i = 0; i < 16; i++) + { + stm32_configgpio(g_lcdin[i]); + } +#endif + /* No longer configured for output */ + + priv->output = false; + } +} + +/************************************************************************************ + * Name: stm32_lcdoutput + * + * Description: + * Config data lines for output operations. + * + ************************************************************************************/ + +static void stm32_lcdoutput(FAR struct stm32_lower_s *priv) +{ +#ifndef CONFIG_LCD_FASTCONFIG + int i; +#endif + + /* Check if we are already configured for output */ + + if (!priv->output) + { + /* Configure GPIO data lines as outputs */ + +#ifdef CONFIG_LCD_FASTCONFIG + putreg32(LCD_OUTPUT, LCD_CRL); + putreg32(LCD_OUTPUT, LCD_CRH); +#else + for (i = 0; i < 16; i++) + { + stm32_configgpio(g_lcdout[i]); + } +#endif + /* Now we are configured for output */ + + priv->output = true; + } +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + ************************************************************************************/ + +int board_lcd_initialize(void) +{ + FAR struct stm32_lower_s *priv = &g_lcdlower; + int i; + + /* Only initialize the driver once */ + + if (!priv->drvr) + { + lcdvdbg("Initializing\n"); + + /* Configure GPIO pins */ + + stm32_lcdoutput(priv); + for (i = 0; i < NLCD_CONFIG; i++) + { + stm32_configgpio(g_lcdconfig[i]); + } + + /* Configure and enable the LCD */ + + priv->drvr = ssd1289_lcdinitialize(&priv->dev); + if (!priv->drvr) + { + lcddbg("ERROR: ssd1289_lcdinitialize failed\n"); + return -ENODEV; + } + } + + /* Turn the display off */ + + priv->drvr->setpower(priv->drvr, 0); + return OK; +} + +/************************************************************************************ + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows + * suport for multiple LCD devices. + * + ************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + FAR struct stm32_lower_s *priv = &g_lcdlower; + DEBUGASSERT(lcddev == 0); + return priv->drvr; +} + +/************************************************************************************ + * Name: board_lcd_uninitialize + * + * Description: + * Unitialize the LCD support + * + ************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + FAR struct stm32_lower_s *priv = &g_lcdlower; + + /* Turn the display off */ + + priv->drvr->setpower(priv->drvr, 0); +} + +#endif /* CONFIG_LCD_SSD1289 */ diff --git a/configs/shenzhou/src/stm32_touchscreen.c b/configs/shenzhou/src/stm32_touchscreen.c new file mode 100644 index 0000000000000000000000000000000000000000..abfe6ebdd7b2b459d1f724ed7ffe796a67f66a23 --- /dev/null +++ b/configs/shenzhou/src/stm32_touchscreen.c @@ -0,0 +1,305 @@ +/************************************************************************************ + * configs/shenzhou/src/stm32_touchscreen.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "stm32.h" +#include "shenzhou.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifdef CONFIG_INPUT_ADS7843E +#ifndef CONFIG_INPUT +# error "Touchscreen support requires CONFIG_INPUT" +#endif + +#ifndef CONFIG_STM32_SPI3 +# error "Touchscreen support requires CONFIG_STM32_SPI3" +#endif + +#ifndef CONFIG_ADS7843E_FREQUENCY +# define CONFIG_ADS7843E_FREQUENCY 500000 +#endif + +#ifndef CONFIG_ADS7843E_SPIDEV +# define CONFIG_ADS7843E_SPIDEV 3 +#endif + +#if CONFIG_ADS7843E_SPIDEV != 3 +# error "CONFIG_ADS7843E_SPIDEV must be three" +#endif + +#ifndef CONFIG_ADS7843E_DEVMINOR +# define CONFIG_ADS7843E_DEVMINOR 0 +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32_config_s +{ + struct ads7843e_config_s dev; + xcpt_t handler; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the ADS7843E driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the ADS7843E interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + */ + +static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr); +static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable); +static void tsc_clear(FAR struct ads7843e_config_s *state); +static bool tsc_busy(FAR struct ads7843e_config_s *state); +static bool tsc_pendown(FAR struct ads7843e_config_s *state); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the ADS7843E + * driver. This structure provides information about the configuration + * of the ADS7843E and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writable because, under certain circumstances, the driver + * may modify frequency or X plate resistance values. + */ + +static struct stm32_config_s g_tscinfo = +{ + { + .frequency = CONFIG_ADS7843E_FREQUENCY, + .attach = tsc_attach, + .enable = tsc_enable, + .clear = tsc_clear, + .busy = tsc_busy, + .pendown = tsc_pendown, + }, + .handler = NULL, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the ADS7843E driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the ADS7843E interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + */ + +static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t handler) +{ + FAR struct stm32_config_s *priv = (FAR struct stm32_config_s *)state; + + /* Just save the handler for use when the interrupt is enabled */ + + priv->handler = handler; + return OK; +} + +static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable) +{ + FAR struct stm32_config_s *priv = (FAR struct stm32_config_s *)state; + + /* The caller should not attempt to enable interrupts if the handler + * has not yet been 'attached' + */ + + DEBUGASSERT(priv->handler || !enable); + + /* Attach and enable, or detach and disable */ + + ivdbg("enable:%d\n", enable); + if (enable) + { + (void)stm32_gpiosetevent(GPIO_TP_INT, true, true, false, + priv->handler); + } + else + { + (void)stm32_gpiosetevent(GPIO_TP_INT, false, false, false, NULL); + } +} + +static void tsc_clear(FAR struct ads7843e_config_s *state) +{ + /* Does nothing */ +} + +static bool tsc_busy(FAR struct ads7843e_config_s *state) +{ + /* Hmmm... The ADS7843E BUSY pin is not brought out on the Shenzhou board. + * We will most certainly have to revisit this. There is this cryptic + * statement in the XPT2046 spec: "No DCLK delay required with dedicated + * serial port." + * + * The busy state is used by the ADS7843E driver to control the delay + * between sending the command, then reading the returned data. + */ + + return false; +} + +static bool tsc_pendown(FAR struct ads7843e_config_s *state) +{ + /* XPT2046 uses an an internal pullup resistor. The PENIRQ output goes low + * due to the current path through the touch screen to ground, which + * initiates an interrupt to the processor via TP_INT. + */ + + bool pendown = !stm32_gpioread(GPIO_TP_INT); + ivdbg("pendown:%d\n", pendown); + return pendown; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * configure the touchscreen device. This function will register the driver + * as /dev/inputN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ + FAR struct spi_dev_s *dev; + int ret; + + idbg("minor %d\n", minor); + DEBUGASSERT(minor == 0); + + /* Configure and enable the ADS7843E interrupt pin as an input. */ + + (void)stm32_configgpio(GPIO_TP_INT); + + /* Get an instance of the SPI interface */ + + dev = stm32_spibus_initialize(CONFIG_ADS7843E_SPIDEV); + if (!dev) + { + idbg("Failed to initialize SPI bus %d\n", CONFIG_ADS7843E_SPIDEV); + return -ENODEV; + } + + /* Initialize and register the SPI touschscreen device */ + + ret = ads7843e_register(dev, &g_tscinfo.dev, CONFIG_ADS7843E_DEVMINOR); + if (ret < 0) + { + idbg("Failed to initialize SPI bus %d\n", CONFIG_ADS7843E_SPIDEV); + /* up_spiuninitialize(dev); */ + return -ENODEV; + } + + return OK; +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* No support for un-initializing the touchscreen ADS7843E device yet */ +} + +#endif /* CONFIG_INPUT_ADS7843E */ + diff --git a/configs/shenzhou/src/stm32_usb.c b/configs/shenzhou/src/stm32_usb.c new file mode 100644 index 0000000000000000000000000000000000000000..80ed3c53dda69c69bbe5319b7b20582df93a5bca --- /dev/null +++ b/configs/shenzhou/src/stm32_usb.c @@ -0,0 +1,310 @@ +/************************************************************************************ + * configs/shenzhou/src/stm32_usb.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm32_otgfs.h" +#include "shenshou.h" + +#ifdef CONFIG_STM32_OTGFS + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST) +# define HAVE_USB 1 +#else +# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST" +# undef HAVE_USB +#endif + +#ifndef CONFIG_USBHOST_DEFPRIO +# define CONFIG_USBHOST_DEFPRIO 50 +#endif + +#ifndef CONFIG_USBHOST_STACKSIZE +# ifdef CONFIG_USBHOST_HUB +# define CONFIG_USBHOST_STACKSIZE 1536 +# else +# define CONFIG_USBHOST_STACKSIZE 1024 +# endif +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static struct usbhost_connection_s *g_usbconn; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: usbhost_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static int usbhost_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + uvdbg("Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + uvdbg("%s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the STM3240G-EVAL board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + /* The OTG FS has an internal soft pull-up. No GPIO configuration is required */ + + /* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */ + +#ifdef CONFIG_STM32_OTGFS + stm32_configgpio(GPIO_OTGFS_VBUS); + stm32_configgpio(GPIO_OTGFS_PWRON); + stm32_configgpio(GPIO_OTGFS_OVER); +#endif +} + +/*********************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +int stm32_usbhost_initialize(void) +{ + int pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + uvdbg("Register class drivers\n"); + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB mass storage class class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + + /* Then get an instance of the USB host interface */ + + uvdbg("Initialize USB host\n"); + g_usbconn = stm32_otgfshost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + uvdbg("Start usbhost_waiter\n"); + + pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO, + CONFIG_USBHOST_STACKSIZE, + (main_t)usbhost_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + + return -ENODEV; +} +#endif + +/*********************************************************************************** + * Name: stm32_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be provided be + * each platform that implements the STM32 OTG FS host interface + * + * "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump + * or, if 5 V are available on the application board, a basic power switch, must + * be added externally to drive the 5 V VBUS line. The external charge pump can + * be driven by any GPIO output. When the application decides to power on VBUS + * using the chosen GPIO, it must also set the port power bit in the host port + * control and status register (PPWR bit in OTG_FS_HPRT). + * + * "The application uses this field to control power to this port, and the core + * clears this bit on an overcurrent condition." + * + * Input Parameters: + * iface - For future growth to handle multiple USB host interface. Should be zero. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +void stm32_usbhost_vbusdrive(int iface, bool enable) +{ + DEBUGASSERT(iface == 0); + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, false); + } + else + { + /* Disable the Power Switch by driving the enable pin high */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, true); + } +} +#endif + +/************************************************************************************ + * Name: stm32_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent condition is + * detected. + * + * Input Parameter: + * handler - New overcurrent interrupt handler + * + * Returned value: + * Old overcurrent interrupt handler + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +xcpt_t stm32_setup_overcurrent(xcpt_t handler) +{ + return NULL; +} +#endif + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} +#endif + +#endif /* CONFIG_STM32_OTGFS */ + + + diff --git a/configs/shenzhou/src/stm32_usbmsc.c b/configs/shenzhou/src/stm32_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..3c9911c7236257e597ae1b9efc7e7029dd535cd2 --- /dev/null +++ b/configs/shenzhou/src/stm32_usbmsc.c @@ -0,0 +1,86 @@ +/**************************************************************************** + * configs/shenzhou/src/stm32_usbmsc.c + * + * Copyright (C) 2012, 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the STM32 SPI-based MMC/SD block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "stm32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* If system/usbmsc is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see + * stm32_appinit.c). In this case, there is nothing further to be done here. + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS + return stm32_sdinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1); +#else + return OK; +#endif +} diff --git a/configs/shenzhou/src/stm32_userleds.c b/configs/shenzhou/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..e96fb9afda5bbe116378dc89dac9bc3e39f8da71 --- /dev/null +++ b/configs/shenzhou/src/stm32_userleds.c @@ -0,0 +1,124 @@ +/**************************************************************************** + * configs/shenzhou/src/stm32_userleds.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "shenzhou.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* This array maps an LED number to GPIO pin configuration */ + +static uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4 +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + stm32_gpiowrite(g_ledcfg[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0); + stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0); + stm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) == 0); + stm32_gpiowrite(GPIO_LED4, (ledset & BOARD_LED4_BIT) == 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/shenzhou/src/stm32_w25.c b/configs/shenzhou/src/stm32_w25.c new file mode 100644 index 0000000000000000000000000000000000000000..fe27c8a1d7bd954a53c5d02665eafbbc83fc5b7d --- /dev/null +++ b/configs/shenzhou/src/stm32_w25.c @@ -0,0 +1,154 @@ +/**************************************************************************** + * config/shenzhou/src/stm32_w25.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#ifdef CONFIG_STM32_SPI1 +# include +# include +# include + +# include "stm32_spi.h" +#endif + +#include "shenzhou.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ +/* Can't support the W25 device if it SPI1 or W25 support is not enabled */ + +#define HAVE_W25 1 +#if !defined(CONFIG_STM32_SPI1) || !defined(CONFIG_MTD_W25) +# undef HAVE_W25 +#endif + +/* Can't support W25 features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef HAVE_W25 +#endif + +/* Can't support both FAT and NXFFS */ + +#if defined(CONFIG_FS_FAT) && defined(CONFIG_FS_NXFFS) +# warning "Can't support both FAT and NXFFS -- using FAT" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_w25initialize + * + * Description: + * Initialize and register the W25 FLASH file system. + * + ****************************************************************************/ + +int stm32_w25initialize(int minor) +{ +#ifdef HAVE_W25 + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; +#ifdef CONFIG_FS_NXFFS + char devname[12]; +#endif + int ret; + + /* Get the SPI port */ + + spi = stm32_spibus_initialize(1); + if (!spi) + { + fdbg("ERROR: Failed to initialize SPI port 2\n"); + return -ENODEV; + } + + /* Now bind the SPI interface to the W25 SPI FLASH driver */ + + mtd = w25_initialize(spi); + if (!mtd) + { + fdbg("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n"); + return -ENODEV; + } + +#ifndef CONFIG_FS_NXFFS + /* And finally, use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(minor, mtd); + if (ret < 0) + { + fdbg("ERROR: Initialize the FTL layer\n"); + return ret; + } +#else + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", -ret); + return ret; + } + + /* Mount the file system at /mnt/w25 */ + + snprintf(devname, 12, "/mnt/w25%c", 'a' + minor); + ret = mount(NULL, devname, "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif +#endif + return OK; +} diff --git a/configs/shenzhou/src/stm32_watchdog.c b/configs/shenzhou/src/stm32_watchdog.c new file mode 100644 index 0000000000000000000000000000000000000000..ba14425cf4a278ba4c0b54d39ce7ac34ddba70c4 --- /dev/null +++ b/configs/shenzhou/src/stm32_watchdog.c @@ -0,0 +1,135 @@ +/************************************************************************************ + * configs/shenzhou/src/stm32_watchdog.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Wathdog hardware should be enabled */ + +#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG) +# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_STM32_WDG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0" +# endif +#endif + +/* Use the un-calibrated LSI frequency if we have nothing better */ + +#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ) +# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecuture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ + /* Initialize tha register the watchdog timer device */ + +#if defined(CONFIG_STM32_WWDG) + stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH); + return OK; +#elif defined(CONFIG_STM32_IWDG) + stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ); + return OK; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/shenzhou/thttpd/Make.defs b/configs/shenzhou/thttpd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..85999c8278293358388f8cb67ee44501b5e901af --- /dev/null +++ b/configs/shenzhou/thttpd/Make.defs @@ -0,0 +1,122 @@ +############################################################################ +# configs/shenzhou/thttpd/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +# Pick the linker script + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-eabi-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/shenzhou/thttpd/defconfig b/configs/shenzhou/thttpd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..6eab31a470fe64963cd5cfbb00c9fcfaa750c327 --- /dev/null +++ b/configs/shenzhou/thttpd/defconfig @@ -0,0 +1,1478 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_HEAP is not set +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_RTC is not set +# CONFIG_DEBUG_SPI is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set +# CONFIG_DEBUG_HARDFAULT is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +CONFIG_ARCH_CHIP_STM32F107VC=y +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +CONFIG_STM32_CONNECTIVITYLINE=y +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +CONFIG_STM32_HAVE_ETHMAC=y +# CONFIG_STM32_HAVE_I2C2 is not set +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +CONFIG_STM32_BKP=y +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_OTGFS is not set +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +CONFIG_STM32_ETH_REMAP=y +# CONFIG_STM32_SPI1_REMAP is not set +CONFIG_STM32_USART2_REMAP=y +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +# CONFIG_STM32_MII is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=17 +CONFIG_STM32_PHYSR_ALTCONFIG=y +CONFIG_STM32_PHYSR_ALTMODE=0xf000 +CONFIG_STM32_PHYSR_10HD=0x1000 +CONFIG_STM32_PHYSR_100HD=0x4000 +CONFIG_STM32_PHYSR_10FD=0x2000 +CONFIG_STM32_PHYSR_100FD=0x8000 +# CONFIG_STM32_ETH_PTP is not set +CONFIG_STM32_RMII=y +CONFIG_STM32_RMII_MCO=y +# CONFIG_STM32_RMII_EXTCLK is not set +# CONFIG_STM32_ETHMAC_REGDEBUG is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_CLOUDCTRL is not set +# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set +CONFIG_ARCH_BOARD_SHENZHOU=y +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="shenzhou" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="thttp_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +# CONFIG_RTC_DATETIME is not set +# CONFIG_RTC_HIRES is not set +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +CONFIG_MTD_W25=y +CONFIG_W25_SPIMODE=0 +CONFIG_W25_SPIFREQUENCY=20000000 +# CONFIG_W25_READONLY is not set +# CONFIG_W25_SECTOR512 is not set +# CONFIG_W25_SLOWREAD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set +# CONFIG_NET_DUMPPACKET is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +CONFIG_ETH0_PHY_DM9161=y +# CONFIG_NETDEV_PHY_DEBUG is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=768 +CONFIG_NET_ETH_TCP_RECVWNDO=742 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set +# CONFIG_NET_ARP_DUMP is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_IOB_DEBUG is not set +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +CONFIG_FS_NXFFS=y +# CONFIG_NXFFS_SCAN_VOLUME is not set +CONFIG_NXFFS_PREALLOCATED=y +CONFIG_NXFFS_ERASEDSTATE=0xff +CONFIG_NXFFS_PACKTHRESHOLD=32 +CONFIG_NXFFS_MAXNAMLEN=255 +CONFIG_NXFFS_TAILTHRESHOLD=8192 +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +CONFIG_NXFLAT=y +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +CONFIG_PIC=y +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +# CONFIG_HAVE_CXXINITIALIZE is not set +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +CONFIG_EXAMPLES_THTTPD=y +CONFIG_EXAMPLES_THTTPD_NOMAC=y +CONFIG_EXAMPLES_THTTPD_DRIPADDR=0xc0a80001 +CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_THTTPD=y +CONFIG_THTTPD_PORT=80 +CONFIG_THTTPD_IPADDR=0xc0a80032 +CONFIG_THTTPD_SERVER_ADDRESS="http://www.nuttx.org" +CONFIG_THTTPD_SERVER_SOFTWARE="thttpd/2.25b 29dec2003-NuttX" +CONFIG_THTTPD_NXFLAT=y +CONFIG_THTTPD_PATH="/mnt/www" +CONFIG_THTTPD_CGI_PATH="/mnt/www/cgi-bin" +CONFIG_THTTPD_CGI_PATTERN="/mnt/www/cgi-bin/*" +CONFIG_THTTPD_CGI_PRIORITY=50 +CONFIG_THTTPD_CGI_STACKSIZE=1024 +CONFIG_THTTPD_CGI_BYTECOUNT=20000 +CONFIG_THTTPD_CGI_TIMELIMIT=0 +CONFIG_THTTPD_CHARSET="iso-8859-1" +CONFIG_THTTPD_IOBUFFERSIZE=1024 +CONFIG_THTTPD_MINSTRSIZE=64 +CONFIG_THTTPD_REALLOCINCR=64 +CONFIG_THTTPD_MAXREALLOC=4096 +CONFIG_THTTPD_CGIINBUFFERSIZ=512 +CONFIG_THTTPD_CGIOUTBUFFERSIZE=512 +CONFIG_THTTPD_INDEX_NAMES="\"index.html\", \"index.htm\", \"index.cgi\"" +# CONFIG_THTTPD_USE_AUTH_FILE is not set +CONFIG_THTTPD_LISTEN_BACKLOG=8 +CONFIG_THTTPD_LINGER_MSEC=500 +CONFIG_THTTPD_OCCASIONAL_MSEC=120 +CONFIG_THTTPD_IDLE_READ_LIMIT_SEC=300 +CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300 +# CONFIG_THTTPD_USE_TILDE_MAP1 is not set +# CONFIG_THTTPD_USE_TILDE_MAP2 is not set +CONFIG_THTTPD_TILDE_MAP_NONE=y +# CONFIG_THTTPD_GENERATE_INDICES is not set +# CONFIG_THTTPD_USE_URLPATTERN is not set +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_ROMFSETC is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set +# CONFIG_NSH_NETINIT_DEBUG is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0xc0a80032 +CONFIG_NSH_DRIPADDR=0xc0a80001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/shenzhou/thttpd/setenv.sh b/configs/shenzhou/thttpd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..8cc31a4e0195650d2e044f2d25e002addba93e04 --- /dev/null +++ b/configs/shenzhou/thttpd/setenv.sh @@ -0,0 +1,78 @@ +#!/bin/bash +# configs/shenzhou/thttpd/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the tools/ subdirectory +export TOOLS_DIR="${WD}/configs/shenzhou/tools" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:${TOOLS_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/shenzhou/tools/olimex-arm-usb-ocd.cfg b/configs/shenzhou/tools/olimex-arm-usb-ocd.cfg new file mode 100644 index 0000000000000000000000000000000000000000..d9ff2e51540cccc9d18e881f07bc2f0cce30375e --- /dev/null +++ b/configs/shenzhou/tools/olimex-arm-usb-ocd.cfg @@ -0,0 +1,11 @@ +# +# Olimex ARM-USB-OCD +# +# http://www.olimex.com/dev/arm-usb-ocd.html +# + +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG" +ft2232_layout "olimex-jtag" +ft2232_vid_pid 0x15BA 0x0003 + diff --git a/configs/shenzhou/tools/oocd.sh b/configs/shenzhou/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..259156e319d484e8e5fe2984dff527ae529a84b9 --- /dev/null +++ b/configs/shenzhou/tools/oocd.sh @@ -0,0 +1,92 @@ +#!/bin/sh + +# Get command line parameters + +USAGE="USAGE: $0 [-dh] " +ADVICE="Try '$0 -h' for more information" + +unset DEBUG + +while [ ! -z "$1" ]; do + case $1 in + -d ) + set -x + DEBUG=-d3 + ;; + -h ) + echo "$0 is a tool for generation of proper version files for the NuttX build" + echo "" + echo $USAGE + echo "" + echo "Where:" + echo " -d" + echo " Enable script debug" + echo " -h" + echo " show this help message and exit" + echo " Use the OpenOCD 0.4.0" + echo " " + echo " The full path to the top-level NuttX directory" + exit 0 + ;; + * ) + break; + ;; + esac + shift +done + +TOPDIR=$1 +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + echo $ADVICE + exit 1 +fi + +# This script *probably* only works with the following versions of OpenOCD: + +# Local search directory and configurations + +OPENOCD_SEARCHDIR="${TOPDIR}/configs/shenzhou/tools" +OPENOCD_WSEARCHDIR="`cygpath -w ${OPENOCD_SEARCHDIR}`" + +OPENOCD_PATH="/cygdrive/c/Program Files (x86)/OpenOCD/0.4.0/bin" +OPENOCD_EXE=openocd.exe +OPENOCD_INTERFACE="olimex-arm-usb-ocd.cfg" + + +OPENOCD_TARGET="stm32.cfg" +OPENOCD_ARGS="${DEBUG} -s ${OPENOCD_WSEARCHDIR} -f ${OPENOCD_INTERFACE} -f ${OPENOCD_TARGET}" + +echo "Trying OpenOCD 0.4.0 path: ${OPENOCD_PATH}/${OPENOCD_EXE}" + +# Verify that everything is what it claims it is and is located where it claims it is. + +if [ ! -x "${OPENOCD_PATH}/${OPENOCD_EXE}" ]; then + echo "OpenOCD executable does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f "${OPENOCD_SEARCHDIR}/${OPENOCD_TARGET}" ]; then + echo "OpenOCD target config file does not exist: ${OPENOCD_SEARCHDIR}/${OPENOCD_TARGET}" + exit 1 +fi +if [ ! -f "${OPENOCD_SEARCHDIR}/${OPENOCD_INTERFACE}" ]; then + echo "OpenOCD interface config file does not exist: ${OPENOCD_SEARCHDIR}/${OPENOCD_INTERFACE}" + exit 1 +fi + +# Enable debug if so requested + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +# Okay... do it! + +echo "Starting OpenOCD" +"${OPENOCD_PATH}/${OPENOCD_EXE}" ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" + diff --git a/configs/shenzhou/tools/stm32.cfg b/configs/shenzhou/tools/stm32.cfg new file mode 100644 index 0000000000000000000000000000000000000000..463a85cfd2ba9f8503007f96fbdd5248f957752a --- /dev/null +++ b/configs/shenzhou/tools/stm32.cfg @@ -0,0 +1,69 @@ +# script for stm32 + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME stm32 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +# Work-area is a space in RAM used for flash programming +# By default use 16kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x4000 +} + +# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz +jtag_khz 1000 + +jtag_nsrst_delay 100 +jtag_ntrst_delay 100 + +#jtag scan chain +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + # See STM Document RM0008 + # Section 26.6.3 + set _CPUTAPID 0x3ba00477 +} +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +if { [info exists BSTAPID ] } { + # FIXME this never gets used to override defaults... + set _BSTAPID $BSTAPID +} else { + # See STM Document RM0008 + # Section 29.6.2 + # Low density devices, Rev A + set _BSTAPID1 0x06412041 + # Medium density devices, Rev A + set _BSTAPID2 0x06410041 + # Medium density devices, Rev B and Rev Z + set _BSTAPID3 0x16410041 + # High density devices, Rev A + set _BSTAPID4 0x06414041 + # Connectivity line devices, Rev A and Rev Z + set _BSTAPID5 0x06418041 +} +jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \ + -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \ + -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME + +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME + +# For more information about the configuration files, take a look at: +# openocd.texi diff --git a/configs/shenzhou/tools/usb-driver.txt b/configs/shenzhou/tools/usb-driver.txt new file mode 100644 index 0000000000000000000000000000000000000000..83d7598a5569e5b386da7281f201cfa2f6441ed7 --- /dev/null +++ b/configs/shenzhou/tools/usb-driver.txt @@ -0,0 +1,25 @@ +https://www.olimex.com/dev/pdf/ARM/JTAG/Repair%20Procedure%20for%20OpenOcd-Rev.%20G%20drivers.pdf + +Repair procedure for ARM-USB-OCD drivers + +1. Uninstalling ARM-USB-OCD drivers +------------------------------------- +1.1. Connect your programmer/debugger to your computer, open Device Manager + and uninstall the drivers for ARM-USB-OCD. +1.2. After you have uninstalled ARM-USB-TINY driver from Device Manager, + disconnect the programmer from your computer. +1.3. Now you should download FTClean.exe from here: + http://www.ftdichip.com/Support/Utilities/FTClean.zip. +1.4. After download is complete extract the "*.zip" file, open folder FTClean, + and run FTClean.exe +1.5. Ror VID (Hex) select "Other". And after that fill the first box with 15ba + and "PID (Hex)" with 0004. +1.6. Press "Clean System" button. Make sure that all FTDI devices are + disconnected. (My require administrator privileges). + +2. Re-installing the ARM-USB-OCD driver +--------------------------------------- +2.1 Connect the programmer/debugger to the computer. +2.2 When prompted, browse to the C:\gccfd\DRIVERS\ARM-USB-OCD-DRIVER + directory and install. (A different driver is required for OpenOCD + 0.4.0. That driver is available from the olimex.com web site). diff --git a/configs/sim/Kconfig b/configs/sim/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..76ac06d756be1df0ff91eb0a34c3a918528d517a --- /dev/null +++ b/configs/sim/Kconfig @@ -0,0 +1,13 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SIM + +config EXAMPLES_TOUCHSCREEN_BGCOLOR + hex "Background color for apps/examples/touchscreen" + default 0x007b68ee + depends on EXAMPLES_TOUCHSCREEN + +endif diff --git a/configs/sim/README.txt b/configs/sim/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..2b0ce395f4e131ddff2dfbd7c524bbd634334d01 --- /dev/null +++ b/configs/sim/README.txt @@ -0,0 +1,966 @@ +README +^^^^^^ + +Contents +^^^^^^^^ + o Overview + - Description + - Fake Interrupts + - Timing Fidelity + o Debugging + o Issues + - 64-bit Issues + - Compiler differences + - Stack Size Issues + - Networking Issues + - X11 Issues + - Cygwin64 Issues + - SMP + o BASIC + o Configurations + +Overview +^^^^^^^^ + +Description +----------- +This README file describes the contents of the build configurations available +for the NuttX "sim" target. The sim target is a NuttX port that runs as a +user-space program under Linux or Cygwin. It is a very "low fidelity" embedded +system simulation: This environment does not support any kind of asynchronous +events -- there are nothing like interrupts in this context. Therefore, there +can be no pre-empting events. + +Fake Interrupts +--------------- +In order to get timed behavior, the system timer "interrupt handler" is called +from the sim target's IDLE loop. The IDLE runs whenever there is no other task +running. So, for example, if a task calls sleep(), then that task will suspend +wanting for the time to elapse. If nothing else is available to run, then the +IDLE loop runs and the timer increments, eventually re-awakening the sleeping task. + +Context switching is based on logic similar to setjmp() and longjmp(). + +The sim target is used primarily as a development and test platform for new +RTOS features. It is also of academic interest. But it has no real-world +application that I know of. + +Timing Fidelity +--------------- +NOTE: In order to facility fast testing, the sim target's IDLE loop, by default, +calls the system "interrupt handler" as fast as possible. As a result, there +really are no noticeable delays when a task sleeps. However, the task really does +sleep -- but the time scale is wrong. If you want behavior that is closer to +normal timing, then you can define CONFIG_SIM_WALLTIME=y in your configuration +file. This configuration setting will cause the sim target's IDLE loop to delay +on each call so that the system "timer interrupt" is called at a rate approximately +correct for the system timer tick rate. With this definition in the configuration, +sleep() behavior is more or less normal. + +Debugging +^^^^^^^^^ +One of the best reasons to use the simulation is that is supports great, Linux- +based debugging. Here are the steps that I following to use the Linux ddd +graphical front-end to GDB: + +1. Modify the top-level configuration file. Enable debug symbols by defining + the following. + + cd + CONFIG_DEBUG_SYMBOLS=y + +2. Re-build: + + cd + make clean + make + +3. Then start the debugging: + + ddd nuttx & + gdb> b user_start + gdb> r + +NOTE: This above steps work fine on both Linux and Cygwin. On Cygwin, you +will need to start the Cywin-X server before running ddd. + +Issues +^^^^^^ + +64-Bit Issues +------------- +As mentioned above, context switching is based on logic like setjmp() and +longjmp(). This context switching is available for 32-bit and 64-bit +targets. You must, however, set the correct target in the configuration +before you build: CONFIG_HOST_X86_64 or CONFIG_HOST_X86 for 64- and 32-bit +targets, respectively. On a 64-bit machine, you can also force the 32-bit +build with CONFIG_SIM_M32=y (which does not seem to be supported by more +contemporary x86_64 compilers). + +There are other 64-bit issues as well. For example, addresses are retained in +32-bit unsigned integer types in a few places. On a 64-bit machine, the 32-bit +address storage may corrupt 64-bit addressing. NOTE: This is really a bug -- +addresses should not be retained in uint32_t types but rather in uintptr_t types +to avoid issues just like this. + +Compiler differences +-------------------- + +operator new: + + Problem: "'operator new' takes size_t ('...') as first parameter" + Workaround: Add -fpermissive to the compilation flags + +Stack Size Issues +----------------- +When you run the NuttX simulation, it uses stacks allocated by NuttX from the +NuttX heap. The memory management model is exactly the same in the simulation +as it is real, target system. This is good because this produces a higher +fidelity simulation. + +However, when the simulation calls into Linux/Cygwin libraries, it will still +use these small simulation stacks. This happens, for example, when you call +into the system to get and put characters to the console window or when you +make x11 calls into the system. The programming model within those libraries +will assume a Linux/Cygwin environment where the stack size grows dynamically +and not the small, limited stacks of a deeply embedded system. + +As a consequence, those system libraries may allocate large data structures +on the stack and overflow the small NuttX stacks. X11, in particular, +requires large stacks. If you are using X11 in the simulation, make sure +that you set aside a "lot" of stack for the X11 system calls (maybe 8 or 16Kb). +The stack size for the thread that begins with user start is controlled +by the configuration setting CONFIG_USERMAIN_STACKSIZE; you may need to +increase this value to larger number to survive the X11 system calls. + +If you are running X11 applications as NSH add-on programs, then the stack +size of the add-on program is controlled in another way. Here are the +steps for increasing the stack size in that case: + + cd ../apps/builtin # Go to the builtin apps directory + vi builtin_list.h # Edit this file and increase the stack size of the add-on + rm .built *.o # This will force the builtin apps logic to rebuild + +Networking Issues +----------------- +I never did get networking to work on the sim target. It tries to use the tap device +(/dev/net/tun) to emulate an Ethernet NIC, but I never got it correctly integrated +with the NuttX networking (I probably should try using raw sockets instead). + +Update: Max Holtzberg reports to me that the tap device actually does work properly, +but not in an NSH configuration because of stdio operations freeze the simulation. + +REVISIT: This may not long be an issue even with NSH because of the recent redesign +of how the stdio devices are handled in the simulation (they should no longer freeze +the simulation). + +X11 Issues +---------- +There is an X11-based framebuffer driver that you can use exercise the NuttX graphics +subsystem on the simulator (see the sim/nx11 configuration below). This may require a +lot of tinkering to get working, depending upon where your X11 installation stores +libraries and header files and how it names libraries. + +For example, on UBuntu 9.09, I had to do the following to get a clean build: + + cd /usr/lib/ + sudo ln -s libXext.so.6.4.0 libXext.so + +(I also get a segmentation fault at the conclusion of the NX test -- that will need +to get looked into as well). + +The X11 examples builds on Cygwin, but does not run. The last time I tried it, +XOpenDisplay() aborted the program. UPDATE: This was caused by the small stack +size and can be fixed by increasing the size of the NuttX stack that calls into +X11. See the discussion "Stack Size Issues" above. + +Cygwin64 Issues +--------------- +There are some additional issues using the simulator with Cygwin64. Below is the +summary of the changes that I had to make to get the simulator working in that +environment: + + CONFIG_HOST_X86_64=y + CONFIG_SIM_M32=n + Need to select X64_64. Cygwin64 tools do not seem to support any option + to build a 32-bit target. + + CONFIG_SIM_CYGWIN_DECORATED=n + Older versions of Cygwin toolsdecorated C symbol names by adding an + underscore to the beginning of the symbol name. Newer versions of + Cygwin do not seem to do this. Deselecting CONFIG_SIM_CYGWIN_DECORATED + will select the symbols without the leading underscore as needed by + the Cygwin64 toolchain. + + How do you know if you need this option? You could look at the generated + symbol tables to see if there are underscore characters at the beginning + of the symbol names. Or, if you need this option, the simulation will not + run: It will crash early, probably in some function due to the failure to + allocate memory. + + In this case, when I tried to run nutt.exe from the command line, it + exited silently. Running with GDB I get following (before hitting a + breakpoint at main()): + + (gdb) r + Starting program: /cygdrive/c/Users/Gregory/Documents/projects/nuttx/master/nuttx/nuttx.exe + [New Thread 6512.0xda8] + [New Thread 6512.0x998] + 1 [main] nuttx 6512 C:\Users\Gregory\Documents\projects\nuttx\master\nuttx\nuttx.exe: *** fatal error - Internal error: Out of memory for new path buf. + 736 [main] nuttx 6512 cygwin_exception::open_stackdumpfile: Dumping stack trace to nuttx.exe.stackdump + [Thread 6512.0x998 exited with code 256] + [Inferior 1 (process 6512) exited with code 0400] + + CONFIG_SIM_X8664_SYSTEMV=n + CONFIG_SIM_X8664_MICROSOFT=y + Selet Microsoft x64 calling convention. + + The Microsoft x64 calling convention is followed on Microsoft Windows and + pre-boot UEFI (for long mode on x86-64). It uses registers RCX, RDX, R8, + R9 for the first four integer or pointer arguments (in that order), and + XMM0, XMM1, XMM2, XMM3 are used for floating point arguments. Additional + arguments are pushed onto the stack (right to left). Integer return + values (similar to x86) are returned in RAX if 64 bits or less. Floating + point return values are returned in XMM0. Parameters less than 64 bits + long are not zero extended; the high bits are not zeroed. + +SMP +--- + The configuration has basic support SMP testing. The simulation supports + the emulation of multiple CPUs by creating multiple pthreads, each run a + copy of the simulation in the same process address space. + + At present, the SMP simulation is not fully functional: It does operate + on the simulated CPU threads for a few context switches then fails during + a setjmp() operation. I suspect that this is not an issue with the NuttX + SMP logic but more likely some chaos in the pthread controls. I have seen + similar such strange behavior other times that I have tried to use + setjmp/longmp from a signal handler! Like when I tried to implement + simulated interrupts using signals. + + Apparently, if longjmp is invoked from the context of a signal handler, + the result is undefined: http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1318.htm + + You can enable SMP for ostest configuration by enabling: + + -# CONFIG_EXPERIMENTAL is not set + +CONFIG_EXPERIMENTAL=y + + +CONFIG_SPINLOCK=y + +CONFIG_SMP=y + +CONFIG_SMP_NCPUS=2 + +CONFIG_SMP_IDLETHREAD_STACKSIZE=2048 + + You also must enable near-realtime-performance otherwise even long + timeouts will expire before a CPU thread even has a chance to execute. + + -# CONFIG_SIM_WALLTIME is not set + +CONFIG_SIM_WALLTIME=y + + And you can enable some additional debug output with: + + -# CONFIG_DEBUG_SCHED is not set + +CONFIG_DEBUG_SCHED=y + + -# CONFIG_SCHED_INSTRUMENTATION is not set + +CONFIG_SCHED_INSTRUMENTATION=y + + The SMP configuration will run with: + + CONFIG_SMP_NCPUS=1 + + In this case there is, of course, no muli-CPU processing, but this does + verify the correctness of some the basic SMP logic. + + The NSH configuration can also be forced to run SMP, but suffers from + the same quirky behavior. I can be made reliable if you modify + arch/sim/src/up_idle.c so that the IDLE loop only runs for CPU0. + Otherwise, often simuart_post() will be called from CPU1 and it will + try to restart NSH on CPU0 and, again, the same quirkiness occurs. + + But for example, this command: + + nsh> sleep 1 & + + will execute the sleep command on CPU1 which has worked every time + that I have tried it (which is not too many times). + +BASIC +^^^^^ + + I have used the sim/nsh configuration to test Michael Haardt's BASIC interpreter + that you can find at apps/interpreters/bas. + + Bas is an interpreter for the classic dialect of the programming language + BASIC. It is pretty compatible to typical BASIC interpreters of the 1980s, + unlike some other UNIX BASIC interpreters, that implement a different + syntax, breaking compatibility to existing programs. Bas offers many ANSI + BASIC statements for structured programming, such as procedures, local + variables and various loop types. Further there are matrix operations, + automatic LIST indentation and many statements and functions found in + specific classic dialects. Line numbers are not required. + + There is also a test suite for the interpreter that can be found at + apps/examples/bastest. + + Configuration + ------------- + Below are the recommended configuration changes to use BAS with the + stm32f4discovery/nsh configuration: + + Dependencies: + CONFIG_LIBC_EXECFUNCS=y : exec*() functions are required + CONFIG_LIBM=y : Some floating point library is required + CONFIG_LIBC_FLOATINGPOINT=y : Floating point printing support is required + CONFIG_LIBC_TMPDIR="/tmp" : Writeable temporary files needed for some commands + + Enable the BASIC interpreter. Other default options should be okay: + CONFIG_INTERPRETERS_BAS=y : Enables the interpreter + CONFIG_INTERPRETER_BAS_VT100=y + + The BASIC test suite can be included: + CONFIG_FS_ROMFS=y : ROMFS support is needed + CONFIG_EXAMPLES_BASTEST=y : Enables the BASIC test setup + CONFIG_EXAMPLES_BASTEST_DEVMINOR=6 + CONFIG_EXAMPLES_BASTEST_DEVPATH="/dev/ram6" + + Usage + ----- + This setup will initialize the BASIC test (optional): This will mount + a ROMFS file system at /mnt/romfs that contains the BASIC test files: + + nsh> bastest + Registering romdisk at /dev/ram6 + Mounting ROMFS filesystem at target=/mnt/romfs with source=/dev/ram6 + nsh> + + The interactive interpreter is started like: + + nsh> bas + bas 2.4 + Copyright 1999-2014 Michael Haardt. + This is free software with ABSOLUTELY NO WARRANTY. + > + + Ctrl-D exits the interpreter. + + The test programs can be ran like this: + + nsh> bastest + Registering romdisk at /dev/ram0 + Mounting ROMFS filesystem at target=/mnt/romfs with source=/dev/ram0 + nsh> bas /mnt/romfs/test01.bas + 1 + hello + 0.0002 + 0.0000020 + 0.0000002 + + nsh> + + Or you can load a test into memory and execute it interactively: + + nsh> bas + bas 2.4 + Copyright 1999-2014 Michael Haardt. + This is free software with ABSOLUTELY NO WARRANTY. + > load "/mnt/romfs/test01.bas" + > run + 1 + hello + 0.0002 + 0.0000020 + 0.0000002 + > + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Information +-------------------------------- + + 1. Each configuration is maintained in a sub-directory and can be selected + as follow: + + cd /tools + ./configure.sh sim/ + cd - + . ./setenv.sh + + If this is a Windows native build, then configure.bat should be used + instead of configure.sh: + + configure.bat sim\ + + Where is one of the following sub-directories. + + 2. All configurations uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. Before building, make sure that the configuration is correct for you host platform: + + a. Linux, 32-bit CPU + + CONFIG_HOST_LINUX=y + CONFIG_HOST_WINDOWS=n + CONFIG_HOST_X86=y + CONFIG_HOST_X86_64=n + + b. Linux, 64-bit CPU, 32-bit build + + CONFIG_HOST_LINUX=y + CONFIG_HOST_WINDOWS=n + CONFIG_HOST_X86=n + CONFIG_HOST_X86_64=y + CONFIG_SIM_X8664_MICROSOFT=n + CONFIG_SIM_X8664_SYSTEMV=y + CONFIG_SIM_M32=y + + c. Linux, 64-bit CPU, 64-bit build + + CONFIG_HOST_LINUX=y + CONFIG_HOST_WINDOWS=n + CONFIG_HOST_X86=n + CONFIG_HOST_X86_64=y + CONFIG_SIM_X8664_MICROSOFT=n + CONFIG_SIM_X8664_SYSTEMV=y + CONFIG_SIM_M32=n + + d. Cygwin, 32-bit + + CONFIG_HOST_LINUX=n + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_HOST_X86=y + CONFIG_HOST_X86_64=n + + e. Cygwin64, 64-bit, 32-bit build + + I don't believe this configuration is supported by Cygwin64 + + f. Cygwin64, 64-bit, 64-bit build + + CONFIG_HOST_LINUX=n + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_HOST_X86=n + CONFIG_HOST_X86_64=y + CONFIG_SIM_X8664_MICROSOFT=y + CONFIG_SIM_X8664_SYSTEMV=n + CONFIG_SIM_M32=n + +Configuration Sub-Directories +----------------------------- + +configdata + + A unit test for the MTD configuration data driver. + +cxxtest + + + The C++ standard libary test at apps/examples/cxxtest configuration. This + test is used to verify the uClibc++ port to NuttX. + + NOTES + ----- + 1. Before you can use this example, you must first install the uClibc++ + C++ library. This is located outside of the NuttX source tree in the + NuttX uClibc++ GIT repository. See the README.txt file there for + instructions on how to install uClibc++ + + 2. At present (2012/11/02), exceptions are disabled in this example + CONFIG_UCLIBCXX_EXCEPTION=n). It is probably not necessary to + disable exceptions. + + 3. Unfortunately, this example will not run now. + + The reason that the example will not run on the simulator has + to do with when static constructors are enabled: In the simulator + it will attempt to execute the static constructors before main() + starts. BUT... NuttX is not initialized and this results in a crash. + + To really use this example, I will have to think of some way to + postpone running C++ static initializers until NuttX has been + initialized. + +mount + + Configures to use apps/examples/mount. + +mtdpart + + This is the apps/examples/mtdpart test using a MTD RAM driver to + simulate the FLASH part. + +mtdrwb + + This is the apps/examples/mtdrwb test using a MTD RAM driver to + simulate the FLASH part. + +nettest + + Configures to use apps/examples/nettest. This configuration + enables networking using the network TAP device. + + NOTES: + + 1. The NuttX network is not, however, functional on the Linux TAP + device yet. + + UPDATE: The TAP device does apparently work according to a NuttX + user (provided that it is not used with NSH: NSH waits on readline() + for console input. When it calls readline(), the whole system blocks + waiting from input from the host OS). My failure to get the TAP + device working appears to have been a cockpit error. + + 2. As of NuttX-5.18, when built on Windows, this test does not try + to use the TAP device (which is not available on Cygwin anyway), + but inside will try to use the Cygwin WPCAP library. Only the + most preliminary testing has been performed with the Cygwin WPCAP + library, however. + + NOTE that the IP address is hard-coded in arch/sim/src/up_wpcap.c. + You will either need to edit your configuration files to use 10.0.0.1 + on the "target" (CONFIG_EXAMPLES_NETTEST_*) or edit up_wpcap.c to + select the IP address that you want to use. + +nsh + + Configures to use the NuttShell at apps/examples/nsh. + + NOTES: + + 1. This version has one builtin function: This configuration: + apps/examples/hello. + + 2. This version has password protection enable. Here is the login: + + USERNAME: admin + PASSWORD: Adminstrator + + The encrypted password is retained in /etc/passwd. I am sure that + you will find this annoying. You can disable the password protection + by de-selecting CONFIG_NSH_CONSOLE_LOGIN=y. + + 3. This configuration has BINFS enabled so that the builtin applications + can be made visible in the file system. Because of that, the + build in applications do not work as other examples. + + For example trying to execute the hello builtin application will + fail: + + nsh> hello + nsh: hello: command not found + nsh> + + Unless you first mount the BINFS file system: + + nsh> mount -t binfs /bin + nsh> ls /bin + /bin: + hello + nsh> echo $PATH + /bin + nsh> hello + Hello, World!! + nsh> + + Notice that the executable 'hello' is found using the value in the PATH + variable (which was preset to "/bin"). If the PATH variable were not set + then you would have to use /bin/hello on the command line. + +nsh2 + + This is another example that configures to use the NuttShell at apps/examples/nsh. + Like nsh, this version uses NSH built-in functions: The nx, nxhello, and + nxlines examples are included as built-in functions. + + NOTES: + + 1. X11 Configuration + + This configuration uses an X11-based framebuffer driver. Of course, this + configuration can only be used in environments that support X11! (And it + may not even be usable in all of those environments without some "tweaking" + See discussion below under the nx11 configuration). + +nx + + Configures to use apps/examples/nx. + + NOTES: + + 1. Special Framebuffer Configuration + + Special simulated framebuffer configuration options: + + CONFIG_SIM_FBHEIGHT - Height of the framebuffer in pixels + CONFIG_SIM_FBWIDTH - Width of the framebuffer in pixels. + CONFIG_SIM_FBBPP - Pixel depth in bits + + 2. No Display! + + This version has NO DISPLAY and is only useful for debugging NX + internals in environments where X11 is not supported. There is + and additonal configuration that may be added to include an X11- + based simulated framebuffer driver: + + CONFIG_SIM_X11FB - Use X11 window for framebuffer + + See the "nx11" configuration below for more information. + + 3. Multi- and Single-User Modes + + The default is the single-user NX implementation. To select + the multi-user NX implementation: + + CONFG_NX_MULTIUSER=y + CONFIG_DISABLE_MQUEUE=n + +nx11 + + Configures to use apps/examples/nx. This configuration is similar + to the nx configuration except that it adds support for an X11- + based framebuffer driver. Of course, this configuration can only + be used in environments that support X11! (And it may not even + be usable in all of those environments without some "tweaking"). + + 1. Special Framebuffer Configuration + + This configuration uses the same special simulated framebuffer + configuration options as the nx configuration: + + CONFIG_SIM_X11FB - Use X11 window for framebuffer + CONFIG_SIM_FBHEIGHT - Height of the framebuffer in pixels + CONFIG_SIM_FBWIDTH - Width of the framebuffer in pixels. + CONFIG_SIM_FBBPP - Pixel depth in bits + + 2. X11 Configuration + + But now, since CONFIG_SIM_X11FB is also selected the following + definitions are needed + + CONFIG_SIM_FBBPP (must match the resolution of the display). + CONFIG_FB_CMAP=y + + My system has 24-bit color, but packed into 32-bit words so + the correct setting of CONFIG_SIM_FBBPP is 32. + + For whatever value of CONFIG_SIM_FBBPP is selected, the + corresponding CONFIG_NX_DISABLE_*BPP setting must not be + disabled. + + 3. Touchscreen Support + + A X11 mouse-based touchscreen simulation can also be enabled + by setting: + + CONFIG_INPUT=y + CONFIG_SIM_TOUCHSCREEN=y + + Then you must also have some application logic that will call + board_tsc_setup(0) to register the touchscreen driver. See + also configuration "touchscreen" + + NOTES: + + a. If you do not have the call to sim_tcinitialize(0), the build + will mysteriously fail claiming that is can't find up_tcenter() + and up_tcleave(). That is a consequence of the crazy way that + the simulation is built and can only be eliminated by calling + up_simtouchscreen(0) from your application. + + b. You must first up_fbinitialize() before calling up_simtouchscreen() + or you will get a crash. + + c. Call sim_tcunininitializee() when you are finished with the + simulated touchscreen. + + d. Enable CONFIG_DEBUG_INPUT=y for touchscreen debug output. + + 4. X11 Build Issues + + To get the system to compile under various X11 installations + you may have to modify a few things. For example, in order + to find libXext, I had to make the following change under + Ubuntu 9.09: + + cd /usr/lib/ + sudo ln -s libXext.so.6.4.0 libXext.so + + 5. Multi- and Single-User Modes + + The default is the single-user NX implementation. To select + the multi-user NX implementation: + + CONFG_NX_MULTIUSER=y + CONFIG_DISABLE_MQUEUE=n + + 6. apps/examples/nxterm + + This configuration is also set up to use the apps/examples/nxterm + test instead of apps/examples/nx. To enable this configuration, + First, select Multi-User mode as described above. Then add the + following definitions to the defconfig file: + + -CONFIG_NXTERM=n + +CONFIG_NXTERM=y + + -CONFIG_NX_MULTIUSER=n + +CONFIG_NX_MULTIUSER=y + + -CONFIG_EXAMPLES_NX=y + +CONFIG_EXAMPLES_NX=n + + -CONFIG_EXAMPLES_NXTERM=n + +CONFIG_EXAMPLES_NXTERM=y + + See apps/examples/README.txt for further details. + +nxffs + + This is the apps/examples/nxffs test using a MTD RAM driver to + simulate the FLASH part. + +nxlines + + This is the apps/examples/nxlines test. + +nxwm + + This is a special configuration setup for the NxWM window manager + UnitTest. The NxWM window manager can be found here: + + nuttx-code/NxWidgets/nxwm + + The NxWM unit test can be found at: + + nuttx-code/NxWidgets/UnitTests/nxwm + + Documentation for installing the NxWM unit test can be found here: + + nuttx-code/NxWidgets/UnitTests/READEM.txt + + NOTES + + 1. There is an issue with running this example under the + simulation. In the default configuration, this example will + run the NxTerm example which waits on readline() for console + input. When it calls readline(), the whole system blocks + waiting from input from the host OS. So, in order to get + this example to run, you must comment out the readline call in + apps/nshlib/nsh_consolemain.c like: + + Index: nsh_consolemain.c + =================================================================== + --- nsh_consolemain.c (revision 4681) + +++ nsh_consolemain.c (working copy) + @@ -117,7 +117,8 @@ + /* Execute the startup script */ + + #ifdef CONFIG_NSH_ROMFSETC + - (void)nsh_script(&pstate->cn_vtbl, "init", NSH_INITPATH); + +// REMOVE ME + +// (void)nsh_script(&pstate->cn_vtbl, "init", NSH_INITPATH); + #endif + + /* Then enter the command line parsing loop */ + @@ -130,7 +131,8 @@ + fflush(pstate->cn_outstream); + + /* Get the next line of input */ + - + +sleep(2); // REMOVE ME + +#if 0 // REMOVE ME + ret = readline(pstate->cn_line, CONFIG_NSH_LINELEN, + INSTREAM(pstate), OUTSTREAM(pstate)); + if (ret > 0) + @@ -153,6 +155,7 @@ + "readline", NSH_ERRNO_OF(-ret)); + nsh_exit(&pstate->cn_vtbl, 1); + } + +#endif // REMOVE ME + } + + /* Clean up */ + + UPDATE: I recently implemented a good UART simulation to driver + the serial console. So I do not believe that problem exists and + I think that the above workaround should no longer be necessary. + However, I will leave the above text in place until I get then + oppotunity to verify that the new UART simulation fixes the problem. + +ostest + + The "standard" NuttX apps/examples/ostest configuration. + +pashello + + Configures to use apps/examples/pashello. + +touchscreen + + This configuration uses the simple touchscreen test at + apps/examples/touchscreen. This test will create an empty X11 window + and will print the touchscreen output as it is received from the + simulated touchscreen driver. + + Since this example uses the simulated frame buffer driver, the + most of the configuration settings discussed for the "nx11" + configuration also apply here. See that discussion above. + + See apps/examples/README.txt for further information about build + requirements and configuration settings. + +traveler + + Configures to build the Traveler first person, 3-D ray casting game at + apps/graphics/traveler. This configuration derives fromthe nx11 + configuration and many of the comments there appear here as well. + This configuration defpends on X11 and, of course, can only be used in + environments that support X11! (And it may not even be usable in all of + those environments without some "tweaking"). + + 1. Special Framebuffer Configuration + + This configuration uses the same special simulated framebuffer + configuration options as the nx configuration: + + CONFIG_SIM_X11FB - Use X11 window for framebuffer + CONFIG_SIM_FBHEIGHT - Height of the framebuffer in pixels + CONFIG_SIM_FBWIDTH - Width of the framebuffer in pixels. + CONFIG_SIM_FBBPP - Pixel depth in bits + + 2. X11 Configuration + + But now, since CONFIG_SIM_X11FB is also selected the following + definitions are needed + + CONFIG_SIM_FBBPP (must match the resolution of the display). + CONFIG_FB_CMAP=y + + My system has 24-bit color, but packed into 32-bit words so + the correct setting of CONFIG_SIM_FBBPP is 32. + + 3. X11 Build Issues + + To get the system to compile under various X11 installations + you may have to modify a few things. For example, in order + to find libXext, I had to make the following change under + Ubuntu 9.09: + + cd /usr/lib/ + sudo ln -s libXext.so.6.4.0 libXext.so + +udgram + + This is the same as the nsh configuration except that it includes + two addition build in applications: server and client. These + applications are provided by the test at apps/examples/udgram. + This configuration enables local, Unix domain sockets and supports + the test of the datagram sockets. + + To use the test: + + nsh> mount -t binfs /bin + nsh> server & + nsh> client + +unionfs + + This is a version of NSH dedicated to performing the simple test + of the Union File System at apps/exmaples/uniofs. The command + 'unionfs' will mount the Union File System at /mnt/unionfs. You + can than compare what you see at /mnt/unionfs with the content + of the ROMFS file systems at apps/examples/unionfs/atestdir and + btestdir. + + Here is some sample output from the test: + + NuttShell (NSH) + nsh> unionfs + Mounting ROMFS file system 1 at target=/mnt/a with source=/dev/ram4 + Mounting ROMFS file system 2 at target=/mnt/b with source=/dev/ram5 + nsh> ls /mnt/unionfs + /mnt/unionfs: + . + afile.txt + offset/ + + When unionfs was created, file system was joined with and offset called + offset". Therefore, all of the file system 2 root contents will appear + to reside under a directory called offset/ (although there is no + directory called offset/ on file system 2). Fie system 1 on the other + hand does have an actual directory called offset/. If we list the + contents of the offset/ directory in the unified file system, we see + he merged content of the file system 1 offset/ directory and the file + system 2 root directory: + + nsh> cat /mnt/unionfs/afile.txt + This is a file in the root directory on file system 1 + + nsh> ls /mnt/unionfs/offset + /mnt/unionfs/offset: + afile.txt + . + adir/ + bfile.txt + bdir/ + nsh> cat /mnt/unionfs/offset/afile.txt + This is a file in the offset/ directory on file system 1 + + nsh> cat /mnt/unionfs/offset/bfile.txt + This is another file in the root directory on file system 2 + + The directory offset/adir exists on file system 1 and the directory\ + adir/ exists on file system 2. You can see that these also overlap: + + nsh> ls /mnt/unionfs/offset/adir + /mnt/unionfs/offset/adir: + .. + asubdir/ + adirfile.txt + bsubdir/ + bdirfile.txt + . + + The unified directory listing is showing files from both file systems in + their respective offset adir/ subdirectories. The file adirfile.txt + exists in both file system 1 and file system 2 but the version if file + system 2 is occluded by the version in file system 1. The only way + that you can which are looking at is by cat'ing the file: + + nsh> cat /mnt/unionfs/offset/adir/adirfile.txt + This is a file in directory offset/adir on file system 1 + + The file on file system 1 has correctly occluded the file with the same + name on file system 2. bdirfile.txt, however, only exists on file + system 2, so it is not occluded: + + nsh> cat /mnt/unionfs/offset/adir/bdirfile.txt + This is another file in directory adir on file system 2 + + You can see the files in the two file systems before they were unified at + apps/examples/unionfs/atestdir and btestdir. + +ustream + + This is the same as the nsh configuration except that it includes + two addition built in applications: server and client. These + applications are provided by the test at apps/examples/ustream. + This configuration enables local, Unix domain sockets and supports + the test of the stream sockets. + + To use the test: + + nsh> mount -t binfs /bin + nsh> server & + nsh> client + diff --git a/configs/sim/bas/Make.defs b/configs/sim/bas/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..984c46f9d70a34deac82cdee06cbddfd0f4d0762 --- /dev/null +++ b/configs/sim/bas/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/bas/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/bas/defconfig b/configs/sim/bas/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..940018a8ad4bd29e0681918adb876b627310e31d --- /dev/null +++ b/configs/sim/bas/defconfig @@ -0,0 +1,733 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +CONFIG_SIM_WALLTIME=y +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=0 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +CONFIG_BOOT_RUNFROMEXTSRAM=y +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_POWEROFF is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_APP_SYMTAB is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +CONFIG_SCHED_HAVE_PARENT=y +# CONFIG_SCHED_CHILD_STATUS is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCHLD=4 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +CONFIG_BINFMT_EXEPATH=y +CONFIG_PATH_INITIAL="/bin" +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +CONFIG_LIBC_EXECFUNCS=y +CONFIG_EXECFUNCS_HAVE_SYMTAB=y +CONFIG_EXECFUNCS_SYMTAB="g_symtab" +CONFIG_EXECFUNCS_NSYMBOLS=0 +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BASTEST is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +CONFIG_INTERPRETERS_BAS=y +CONFIG_INTERPRETER_BAS_VERSION="2.4" +CONFIG_INTERPRETER_BAS_PRIORITY=100 +CONFIG_INTERPRETER_BAS_STACKSIZE=4096 +CONFIG_INTERPRETER_BAS_VT100=y +# CONFIG_INTERPRETER_BAS_USE_LR0 is not set +# CONFIG_INTERPRETER_BAS_USE_SELECT is not set +# CONFIG_INTERPRETER_BAS_HAVE_FTRUNCATE is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILE_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=1 +CONFIG_NSH_ROMFSSECTSIZE=64 +CONFIG_NSH_DEFAULTROMFS=y +# CONFIG_NSH_ARCHROMFS is not set +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=2 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_SYMTAB is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/bas/setenv.sh b/configs/sim/bas/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..fea05ff5c3f4448b9a2a18bff72585144974bf31 --- /dev/null +++ b/configs/sim/bas/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# configs/sim/bas/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/configdata/Make.defs b/configs/sim/configdata/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..d516d172e6c6734582ce95f6552b7fe5589b088f --- /dev/null +++ b/configs/sim/configdata/Make.defs @@ -0,0 +1,124 @@ +############################################################################ +# configs/sim/configdata/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/configdata/defconfig b/configs/sim/configdata/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d03050535df9a66128410e80200a54ceb94a2544 --- /dev/null +++ b/configs/sim/configdata/defconfig @@ -0,0 +1,637 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=4 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="configdata_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Work Queue Support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +CONFIG_MTD_BYTE_WRITE=y +# CONFIG_MTD_PROGMEM is not set +CONFIG_MTD_CONFIG=y +# CONFIG_MTD_CONFIG_RAM_CONSOLIDATE is not set +CONFIG_MTD_CONFIG_ERASEDVALUE=0xff + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +CONFIG_RAMMTD=y +CONFIG_RAMMTD_BLOCKSIZE=256 +CONFIG_RAMMTD_ERASESIZE=4096 +CONFIG_RAMMTD_ERASESTATE=0xff +CONFIG_RAMMTD_FLASHSIM=y +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +CONFIG_FS_NXFFS=y +# CONFIG_NXFFS_SCAN_VOLUME is not set +CONFIG_NXFFS_PREALLOCATED=y +CONFIG_NXFFS_ERASEDSTATE=0xff +CONFIG_NXFFS_PACKTHRESHOLD=32 +CONFIG_NXFFS_MAXNAMLEN=255 +CONFIG_NXFFS_TAILTHRESHOLD=8192 +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=3 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_CONFIGDATA=y +# CONFIG_EXAMPLES_CONFIGDATA_ARCHINIT is not set +CONFIG_EXAMPLES_CONFIGDATA_NEBLOCKS=4 +CONFIG_EXAMPLES_CONFIGDATA_NLOOPS=10000 +# CONFIG_EXAMPLES_CONFIGDATA_VERBOSE is not set +CONFIG_EXAMPLES_CONFIGDATA_SILENT=y +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +CONFIG_EXAMPLES_NXFFS=y +# CONFIG_EXAMPLES_NXFFS_ARCHINIT is not set +CONFIG_EXAMPLES_NXFFS_NEBLOCKS=32 +CONFIG_EXAMPLES_NXFFS_MAXNAME=128 +CONFIG_EXAMPLES_NXFFS_MAXFILE=8192 +CONFIG_EXAMPLES_NXFFS_MAXIO=347 +CONFIG_EXAMPLES_NXFFS_MAXOPEN=512 +CONFIG_EXAMPLES_NXFFS_MOUNTPT="/mnt/nxffs" +CONFIG_EXAMPLES_NXFFS_NLOOPS=100 +# CONFIG_EXAMPLES_NXFFS_VERBOSE is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +CONFIG_PLATFORM_CONFIGDATA=y + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/configdata/setenv.sh b/configs/sim/configdata/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..7d099b071a71c2f8a77ea7686785e71a6bc9d288 --- /dev/null +++ b/configs/sim/configdata/setenv.sh @@ -0,0 +1,55 @@ +#!/bin/bash +# confisgs/sim/configdata/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# Add the path to the toolchain to the PATH variable + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/cxxtest/Make.defs b/configs/sim/cxxtest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..93eed54eb59b3c7b3e2a60057a271a0d847d0c1e --- /dev/null +++ b/configs/sim/cxxtest/Make.defs @@ -0,0 +1,135 @@ +############################################################################ +# configs/sim/cxxtest/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ifeq ($(CONFIG_UCLIBCXX_EXCEPTION),y) + ARCHCPUFLAGSXX = -fno-builtin +else + ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions +endif +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx -isystem $(TOPDIR)/include/uClibc++ +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +LIBSUPXX = ${shell $(CC) $(CXXFLAGS) --print-file-name=libsupc++.a} +EXTRA_LIBPATHS = -L "${shell dirname "$(LIBSUPXX)"}" +EXTRA_LIBS = -lsupc++ + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/cxxtest/defconfig b/configs/sim/cxxtest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..67bad24948cb9f5283d337d431b70b8bb35d787f --- /dev/null +++ b/configs/sim/cxxtest/defconfig @@ -0,0 +1,612 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +CONFIG_ARCH_FLOAT_H=y +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_VERBOSE=y + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=100 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00000000 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="cxxtest_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +CONFIG_MUTEX_TYPES=y +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=4 + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +# CONFIG_HAVE_CXXINITIALIZE is not set +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +CONFIG_UCLIBCXX=y +# CONFIG_UCLIBCXX_EXCEPTION is not set +CONFIG_UCLIBCXX_IOSTREAM_BUFSIZE=32 +CONFIG_UCLIBCXX_HAVE_LIBSUPCXX=y + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +CONFIG_EXAMPLES_CXXTEST=y +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/cxxtest/setenv.sh b/configs/sim/cxxtest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c35ba6501fa09544a900a77c03bc7f5048cd614b --- /dev/null +++ b/configs/sim/cxxtest/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# configs/sim/cxxtext/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/include/.gitignore b/configs/sim/include/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..0561ac18486ae72895d799653404300d9d86a13a --- /dev/null +++ b/configs/sim/include/.gitignore @@ -0,0 +1,2 @@ +/etc +/romfs_img diff --git a/configs/sim/include/README.txt b/configs/sim/include/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..b8403f7fc6eff08344b5b4c52b36524a6117979a --- /dev/null +++ b/configs/sim/include/README.txt @@ -0,0 +1,112 @@ +README +====== + + Overview + -------- + This directory contains logic to support a custom ROMFS start-up script. + This startup script is used by by the NSH when it starts provided that + CONFIG_NSH_ARCHROMFS=y. The script provides a ROMFS volue that will be + mounted at /etc and will look like this at run-time: + + NuttShell (NSH) NuttX-7.13 + This is the message of the day + nsh> ls -Rl /etc + /etc: + dr-xr-xr-x 0 . + dr-xr-xr-x 0 init.d/ + -r--r--r-- 39 passwd + /etc/init.d: + dr-xr-xr-x 0 .. + -r--r--r-- 110 rcS + nsh> + + /etc/init.d/rcS is the start-up script; /etc/passwd is a the password + file. It supports a single user: + + USERNAME: admin + PASSWORD: Adminstrator + + The encrypted passwords in the provided passwd file are only value if the + TEA key is set to: 012345678 9abcdef0 012345678 9abcdef0. Changes to either + the key or the password word will require regeneration of the nsh_romfimg.h + header file. + + Updating the ROMFS File System + ------------------------------ + The content on the nsh_romfsimg.h header file is generated from a sample + directory structure. That directory structure is contained in the binary + file etc.tar.gz and can be modified per the following steps: + + 1. Unpack the directory structure: + + tar zxf etc.tar.gz + + 2. Make modifications as desired. + + 3. Create the new ROMFS image. + + genromfs -f romfs_img -d etc -V SimEtcVol + + 4. Convert the ROMFS image to a C header file + + xxd -i romfs_img >nsh_romfsimg.h + + 5. Edit nsh_romfsimg.h, mark both data definitions as 'const' so that + that will be stored in FLASH. + + 6. Re-package the modified /etc directory + + tar cvf etc.tar etc + gzip etc.tar + + See the sim/nsh configuration for an example of the use of this file + system. + + Replacing the Password File + --------------------------- + The sim/nsh configuration can also be used to create a new password file. + First, make these configuration changes: + + 1. Disable logins + + - CONFIG_NSH_CONSOLE_LOGIN=y + + # CONFIG_NSH_CONSOLE_LOGIN is not set + # CONFIG_NSH_TELNET_LOGIN is not set + + 2. Move the password file to a write-able file system: + + - CONFIG_FSUTILS_PASSWD_PATH="/etc/passwd" + + CONFIG_FSUTILS_PASSWD_PATH="/tmp/passwd" + + 3. make the password file modifiable + + - CONFIG_FSUTILS_PASSWD_READONLY=y + # CONFIG_FSUTILS_PASSWD_READONLY is not set + + Now rebuild the simulation. No login should be required to enter the + shell and you should find the 'useradd', 'userdel', and 'passwd' commands + available in the help summary, provided that they are enabled. Make + certain that the 'useradd' command is not disabled: + + # CONFIG_NSH_DISABLE_USERADD is not set + + Use the NSH 'useradd' command to add new uses with new user passwords like: + + nsh> useradd + + Do this as many times as you would like. Each time that you do this a new + entry with an encrypted password will be added to the passwd file at + /tmp/passwd. You can see the passwd file like: + + nsh> cat /tmp/passwd + + When you are finished, you can simply copy the /tmp/passwd content from the + 'cat' command and paste it into an editor. Make sure to remove any + carriage returns that may have ended up on the file if you are using + Windows. + + Then recreate the nsh_romfsimg.h file as described above. In step 2, + simply replace the old /etc/passwd file with the one in your editor. + When you are finished, the new passwd file will be in the ROMFS file + system at the path /etc/passwd. When you restore the original NSH + sim configuration, these are the passwords that will be used. diff --git a/configs/sim/include/board.h b/configs/sim/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..46da8398895ec87cba64594c90c95f361ae441f3 --- /dev/null +++ b/configs/sim/include/board.h @@ -0,0 +1,3 @@ +/**************************************************************************** + * configs/sim/include/board.h + ****************************************************************************/ diff --git a/configs/sim/include/etc.tar.gz b/configs/sim/include/etc.tar.gz new file mode 100644 index 0000000000000000000000000000000000000000..0e598a66d45abba4c51d17575cd337a1f15639e0 Binary files /dev/null and b/configs/sim/include/etc.tar.gz differ diff --git a/configs/sim/include/nsh_romfsimg.h b/configs/sim/include/nsh_romfsimg.h new file mode 100644 index 0000000000000000000000000000000000000000..23895b27b4577bb983ce43136f3aa676e5d75ead --- /dev/null +++ b/configs/sim/include/nsh_romfsimg.h @@ -0,0 +1,92 @@ +const unsigned char romfs_img[] = +{ + 0x2d, 0x72, 0x6f, 0x6d, 0x31, 0x66, 0x73, 0x2d, 0x00, 0x00, 0x01, 0x90, + 0xf3, 0x09, 0x03, 0xc1, 0x53, 0x69, 0x6d, 0x45, 0x74, 0x63, 0x56, 0x6f, + 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x49, + 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0xd1, 0xff, 0xff, 0x97, + 0x2e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x20, + 0x00, 0x00, 0x00, 0x00, 0xd1, 0xd1, 0xff, 0x80, 0x2e, 0x2e, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x01, 0x59, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, + 0x68, 0x2d, 0x94, 0xb3, 0x69, 0x6e, 0x69, 0x74, 0x2e, 0x64, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, + 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0xd1, 0xff, 0xff, 0x00, + 0x2e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x20, + 0x00, 0x00, 0x00, 0x00, 0xd1, 0xd1, 0xff, 0x20, 0x2e, 0x2e, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6e, + 0x8d, 0x9c, 0xac, 0x88, 0x72, 0x63, 0x53, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x20, 0x43, 0x72, + 0x65, 0x61, 0x74, 0x65, 0x20, 0x61, 0x20, 0x52, 0x41, 0x4d, 0x44, 0x49, + 0x53, 0x4b, 0x20, 0x61, 0x6e, 0x64, 0x20, 0x6d, 0x6f, 0x75, 0x6e, 0x74, + 0x20, 0x69, 0x74, 0x20, 0x61, 0x74, 0x20, 0x2f, 0x74, 0x6d, 0x70, 0x0a, + 0x0a, 0x6d, 0x6b, 0x72, 0x64, 0x20, 0x2d, 0x6d, 0x20, 0x32, 0x20, 0x2d, + 0x73, 0x20, 0x35, 0x31, 0x32, 0x20, 0x31, 0x30, 0x32, 0x34, 0x0a, 0x6d, + 0x6b, 0x66, 0x61, 0x74, 0x66, 0x73, 0x20, 0x2f, 0x64, 0x65, 0x76, 0x2f, + 0x72, 0x61, 0x6d, 0x32, 0x0a, 0x6d, 0x6f, 0x75, 0x6e, 0x74, 0x20, 0x2d, + 0x74, 0x20, 0x76, 0x66, 0x61, 0x74, 0x20, 0x2f, 0x64, 0x65, 0x76, 0x2f, + 0x72, 0x61, 0x6d, 0x32, 0x20, 0x2f, 0x74, 0x6d, 0x70, 0x0a, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1d, + 0x18, 0x3a, 0x8c, 0x6e, 0x70, 0x61, 0x73, 0x73, 0x77, 0x64, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x61, 0x64, 0x6d, 0x69, + 0x6e, 0x20, 0x38, 0x54, 0x76, 0x2b, 0x48, 0x62, 0x6d, 0x72, 0x33, 0x70, + 0x4c, 0x64, 0x64, 0x53, 0x6a, 0x74, 0x7a, 0x4c, 0x30, 0x6b, 0x77, 0x43, + 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 +}; + +const unsigned int romfs_img_len = 1024; + diff --git a/configs/sim/mount/Make.defs b/configs/sim/mount/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..59561182693e3776535d7f9c8a96f521a1297517 --- /dev/null +++ b/configs/sim/mount/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/mount/Make.defs +# +# Copyright (C) 2008, 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/mount/defconfig b/configs/sim/mount/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..3465d1daed50ceb5f3a9d414aeff37ed9f8f9d85 --- /dev/null +++ b/configs/sim/mount/defconfig @@ -0,0 +1,610 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_VERBOSE=y + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="mount_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +CONFIG_EXAMPLES_MOUNT=y +CONFIG_EXAMPLES_MOUNT_BLOCKDEVICE=y +CONFIG_EXAMPLES_MOUNT_DEVNAME="/dev/ram0" +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/mount/setenv.sh b/configs/sim/mount/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..318e1628e5ab56034e9fdff588af0d337ea1a0de --- /dev/null +++ b/configs/sim/mount/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# sim/setenv.sh +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/mtdpart/Make.defs b/configs/sim/mtdpart/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c5dd5f30d3802dcf6f0eac8607c20feda206116e --- /dev/null +++ b/configs/sim/mtdpart/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/mtdpart/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/mtdpart/defconfig b/configs/sim/mtdpart/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d8c84e8a95cbf3f2b5386fa67c65baa1f778f81e --- /dev/null +++ b/configs/sim/mtdpart/defconfig @@ -0,0 +1,619 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +CONFIG_DEBUG_FS=y +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +CONFIG_SIM_M32=y +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=4 +CONFIG_START_DAY=29 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="mtdpart_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Work Queue Support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +CONFIG_MTD_PARTITION=y +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +CONFIG_RAMMTD=y +CONFIG_RAMMTD_BLOCKSIZE=512 +CONFIG_RAMMTD_ERASESIZE=4096 +CONFIG_RAMMTD_ERASESTATE=0xff +CONFIG_RAMMTD_FLASHSIM=y +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=3 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_MTDPART=y +# CONFIG_EXAMPLES_MTDPART_ARCHINIT is not set +CONFIG_EXAMPLES_MTDPART_NEBLOCKS=32 +CONFIG_EXAMPLES_MTDPART_NPARTITIONS=3 +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/mtdpart/setenv.sh b/configs/sim/mtdpart/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..2f5c6f40b0e85233f0f7f8092c0bd427f24fc078 --- /dev/null +++ b/configs/sim/mtdpart/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# confisgs/sim/mtdpart/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/mtdrwb/Make.defs b/configs/sim/mtdrwb/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f06e62656c0bb153fcf80539f71955d7509b8be3 --- /dev/null +++ b/configs/sim/mtdrwb/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/mtdrwb/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/mtdrwb/defconfig b/configs/sim/mtdrwb/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..f4b004092935eb45af8193ea04f04594e5831cdd --- /dev/null +++ b/configs/sim/mtdrwb/defconfig @@ -0,0 +1,651 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +CONFIG_DEBUG_FS=y +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +CONFIG_SIM_M32=y +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=4 +CONFIG_START_DAY=29 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="mtdrwb_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +CONFIG_DRVR_WRITEBUFFER=y +CONFIG_DRVR_WRDELAY=350 +CONFIG_DRVR_READAHEAD=y +CONFIG_DRVR_READBYTES=y +# CONFIG_DRVR_REMOVABLE is not set +CONFIG_DRVR_INVALIDATE=y +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +CONFIG_MTD_PARTITION=y +# CONFIG_FTL_WRITEBUFFER is not set +# CONFIG_FTL_READAHEAD is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +CONFIG_MTD_WRBUFFER=y +CONFIG_MTD_NWRBLOCKS=4 +CONFIG_MTD_READAHEAD=y +CONFIG_MTD_NRDBLOCKS=4 +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +CONFIG_RAMMTD=y +CONFIG_RAMMTD_BLOCKSIZE=512 +CONFIG_RAMMTD_ERASESIZE=4096 +CONFIG_RAMMTD_ERASESTATE=0xff +CONFIG_RAMMTD_FLASHSIM=y +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=3 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MTDPART is not set +CONFIG_EXAMPLES_MTDRWB=y +# CONFIG_EXAMPLES_MTDRWB_ARCHINIT is not set +CONFIG_EXAMPLES_MTDRWB_ERASESIZE=4096 +CONFIG_EXAMPLES_MTDRWB_NEBLOCKS=32 +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/mtdrwb/setenv.sh b/configs/sim/mtdrwb/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..7b00da1bc77873a75457a4def1db22cc9b4c43a0 --- /dev/null +++ b/configs/sim/mtdrwb/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# confisgs/sim/mtdrwb/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/nettest/Make.defs b/configs/sim/nettest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..8632791cacfc9bb8e9644f50340bdfc5b0f69751 --- /dev/null +++ b/configs/sim/nettest/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/Make.defs +# +# Copyright (C) 2007-2008, 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/nettest/defconfig b/configs/sim/nettest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..80ce9f678f751a5e042d9d85a0d206b425684e00 --- /dev/null +++ b/configs/sim/nettest/defconfig @@ -0,0 +1,710 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=8 +CONFIG_START_DAY=16 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nettest_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_NETDEVICES is not set +# CONFIG_NET_SLIP is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_NETTEST=y +# CONFIG_EXAMPLES_NETTEST_SERVER is not set +# CONFIG_EXAMPLES_NETTEST_PERFORMANCE is not set +CONFIG_EXAMPLES_NETTEST_IPv4=y +CONFIG_EXAMPLES_NETTEST_INIT=y +# CONFIG_EXAMPLES_NETTEST_NOMAC is not set + +# +# IPv4 addresses +# +CONFIG_EXAMPLES_NETTEST_IPADDR=0xc0a80080 +CONFIG_EXAMPLES_NETTEST_DRIPADDR=0xc0a80001 +CONFIG_EXAMPLES_NETTEST_NETMASK=0xffffff00 +CONFIG_EXAMPLES_NETTEST_CLIENTIP=0xc0a8006a +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/nettest/setenv.sh b/configs/sim/nettest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..273e418ee12b8b6209634e7a347835ba26d958b0 --- /dev/null +++ b/configs/sim/nettest/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# sim/setenv.sh +# +# Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/nsh/Make.defs b/configs/sim/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..78ac4ec40167d3c02fee9d44073d2c4e8a2aed9f --- /dev/null +++ b/configs/sim/nsh/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/nsh/Make.defs +# +# Copyright (C) 2008, 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/nsh/defconfig b/configs/sim/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..5d8fe8b2179024ebfa52f7c9da2838765a50d553 --- /dev/null +++ b/configs/sim/nsh/defconfig @@ -0,0 +1,762 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +CONFIG_SIM_WALLTIME=y +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=0 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +CONFIG_BOOT_RUNFROMEXTSRAM=y +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_POWEROFF=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_APP_SYMTAB is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +CONFIG_SCHED_HAVE_PARENT=y +# CONFIG_SCHED_CHILD_STATUS is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCHLD=4 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_DEV_LOOP=y + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_BINFS=y +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +CONFIG_BINFMT_EXEPATH=y +CONFIG_PATH_INITIAL="/bin" +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +CONFIG_LIBC_EXECFUNCS=y +CONFIG_EXECFUNCS_HAVE_SYMTAB=y +CONFIG_EXECFUNCS_SYMTAB="g_symtab" +CONFIG_EXECFUNCS_NSYMBOLS=0 +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=2048 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_TIME_EXTENDED=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +CONFIG_EXAMPLES_HELLO_PRIORITY=100 +CONFIG_EXAMPLES_HELLO_STACKSIZE=8192 +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +CONFIG_FSUTILS_PASSWD=y +CONFIG_FSUTILS_PASSWD_PATH="/etc/passwd" +CONFIG_FSUTILS_PASSWD_READONLY=y +CONFIG_FSUTILS_PASSWD_IOBUFFER_SIZE=512 +CONFIG_FSUTILS_PASSWD_KEY1=0x12345678 +CONFIG_FSUTILS_PASSWD_KEY2=0x9abcdef0 +CONFIG_FSUTILS_PASSWD_KEY3=0x12345678 +CONFIG_FSUTILS_PASSWD_KEY4=0x9abcdef0 + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_MOTD=y +# CONFIG_NSH_PLATFORM_MOTD is not set +CONFIG_NSH_MOTD_STRING="MOTD: username=admin password=Administrator" + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILE_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_POWEROFF is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +CONFIG_NSH_DISABLE_SHUTDOWN=y +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=1 +CONFIG_NSH_ROMFSSECTSIZE=64 +# CONFIG_NSH_DEFAULTROMFS is not set +CONFIG_NSH_ARCHROMFS=y +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=2 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_LOGIN=y +CONFIG_NSH_CONSOLE_LOGIN=y +# CONFIG_NSH_LOGIN_FIXED is not set +# CONFIG_NSH_LOGIN_PLATFORM is not set +CONFIG_NSH_LOGIN_PASSWD=y +CONFIG_NSH_LOGIN_FAILDELAY=0 +CONFIG_NSH_LOGIN_FAILCOUNT=3 + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_READLINE_MAX_BUILTINS=64 +CONFIG_READLINE_MAX_EXTCMDS=64 +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_SYMTAB is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/nsh/setenv.sh b/configs/sim/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c629c5a1ec18fffcc59939deb48afcdd1aca22ce --- /dev/null +++ b/configs/sim/nsh/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# sim/nsh/setenv.sh +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/nsh2/Make.defs b/configs/sim/nsh2/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..9f3da86f0b817afc0a2cf1157ce0071f3e439bfb --- /dev/null +++ b/configs/sim/nsh2/Make.defs @@ -0,0 +1,129 @@ +############################################################################ +# configs/sim/nsh2/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHDEFINESXX = -DCONFIG_WCHAR_BUILTIN +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINESXX) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/nsh2/defconfig b/configs/sim/nsh2/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..f30165ec1d39e938095fb0cdd460cf20413f4a9b --- /dev/null +++ b/configs/sim/nsh2/defconfig @@ -0,0 +1,856 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +CONFIG_SIM_FRAMEBUFFER=y +CONFIG_SIM_X11FB=y +# CONFIG_SIM_X11NOSHM is not set +CONFIG_SIM_FBHEIGHT=240 +CONFIG_SIM_FBWIDTH=480 +CONFIG_SIM_FBBPP=32 +CONFIG_SIM_TOUCHSCREEN=y +# CONFIG_SIM_AJOYSTICK is not set +# CONFIG_SIM_NOINPUT is not set +# CONFIG_SIM_TCNWAITERS is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_EXAMPLES_TOUCHSCREEN_BGCOLOR=0x007b68ee +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_POWEROFF is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_TSCTEST=y +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +# CONFIG_INPUT_MXT is not set +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_ANTIALIASING is not set +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +# CONFIG_NX_DISABLE_32BPP is not set +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +CONFIG_NXFONT_SANS28X37B=y +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +# CONFIG_HAVE_CXXINITIALIZE is not set +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=32 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NX_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +CONFIG_EXAMPLES_NXHELLO=y +CONFIG_EXAMPLES_NXHELLO_VPLANE=0 +CONFIG_EXAMPLES_NXHELLO_DEVNO=0 +CONFIG_EXAMPLES_NXHELLO_BPP=32 + +# +# Example Color Configuration +# +CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y + +# +# Example Font Configuration +# +# CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT is not set +CONFIG_EXAMPLES_NXHELLO_FONTID=6 +# CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +CONFIG_EXAMPLES_NXLINES=y +CONFIG_EXAMPLES_NXLINES_VPLANE=0 +CONFIG_EXAMPLES_NXLINES_DEVNO=0 +CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16 +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4 +CONFIG_EXAMPLES_NXLINES_BPP=32 +# CONFIG_EXAMPLES_NXLINES_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +CONFIG_EXAMPLES_TOUCHSCREEN=y +CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0 +CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0" +# CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE is not set +CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=1 +CONFIG_NSH_ROMFSSECTSIZE=64 +CONFIG_NSH_DEFAULTROMFS=y +# CONFIG_NSH_ARCHROMFS is not set +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=2 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# +# CONFIG_NXWIDGETS is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/nsh2/setenv.sh b/configs/sim/nsh2/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..78204f6ebd71a7a013c4664adf7280e8bd168275 --- /dev/null +++ b/configs/sim/nsh2/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# sim/nsh2/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/nx/Make.defs b/configs/sim/nx/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..bb509e3b1534a649bd9741fc8e008708a045845a --- /dev/null +++ b/configs/sim/nx/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/nx/Make.defs +# +# Copyright (C) 2008, 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/nx/defconfig b/configs/sim/nx/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..a59b295ec7fac40a73ec0db223adf4d2c8457bb6 --- /dev/null +++ b/configs/sim/nx/defconfig @@ -0,0 +1,684 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_VERBOSE=y + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +CONFIG_DEBUG_GRAPHICS=y +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +CONFIG_SIM_FRAMEBUFFER=y +# CONFIG_SIM_X11FB is not set +CONFIG_SIM_FBHEIGHT=240 +CONFIG_SIM_FBWIDTH=480 +CONFIG_SIM_FBBPP=8 +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=28 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nx_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=16 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +# CONFIG_NX_DISABLE_8BPP is not set +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=8 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/nx/setenv.sh b/configs/sim/nx/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..764d2a8be7238820e4106c9878e6cec02a98497b --- /dev/null +++ b/configs/sim/nx/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# sim/nx/setenv.sh +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/nx11/Make.defs b/configs/sim/nx11/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..dc93fc14ced51645a53c8dae8d99aaf60e05c40a --- /dev/null +++ b/configs/sim/nx11/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/nx11/Make.defs +# +# Copyright (C) 2008, 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/nx11/defconfig b/configs/sim/nx11/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..31cbedd10859a2f578c09824a3104eb5eee5431b --- /dev/null +++ b/configs/sim/nx11/defconfig @@ -0,0 +1,686 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_VERBOSE=y + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +CONFIG_DEBUG_GRAPHICS=y +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +CONFIG_SIM_FRAMEBUFFER=y +CONFIG_SIM_X11FB=y +# CONFIG_SIM_X11NOSHM is not set +CONFIG_SIM_FBHEIGHT=240 +CONFIG_SIM_FBWIDTH=480 +CONFIG_SIM_FBBPP=32 +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=28 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nx_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=16 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=16384 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_ANTIALIASING is not set +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +# CONFIG_NX_DISABLE_32BPP is not set +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=32 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/nx11/setenv.sh b/configs/sim/nx11/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..a9371a9d230a76b364e134eb64b8687d4985e600 --- /dev/null +++ b/configs/sim/nx11/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# sim/nx11/setenv.sh +# +# Copyright (C) 2008, 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/nxffs/Make.defs b/configs/sim/nxffs/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6ce3fda3651ebc3b56a478f75fd63ac0417ec0a9 --- /dev/null +++ b/configs/sim/nxffs/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/nxffs/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/nxffs/defconfig b/configs/sim/nxffs/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..878f5a9b76005c9b8358cbd3a075444ffe03be74 --- /dev/null +++ b/configs/sim/nxffs/defconfig @@ -0,0 +1,608 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=4 +CONFIG_START_DAY=29 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxffs_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Work Queue Support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +CONFIG_RAMMTD=y +CONFIG_RAMMTD_BLOCKSIZE=512 +CONFIG_RAMMTD_ERASESIZE=4096 +CONFIG_RAMMTD_ERASESTATE=0xff +CONFIG_RAMMTD_FLASHSIM=y +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +CONFIG_FS_NXFFS=y +CONFIG_NXFFS_SCAN_VOLUME=y +CONFIG_NXFFS_REFORMAT_THRESH=20 +CONFIG_NXFFS_PREALLOCATED=y +CONFIG_NXFFS_ERASEDSTATE=0xff +CONFIG_NXFFS_PACKTHRESHOLD=32 +CONFIG_NXFFS_MAXNAMLEN=255 +CONFIG_NXFFS_TAILTHRESHOLD=8192 +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=3 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +CONFIG_EXAMPLES_NXFFS=y +# CONFIG_EXAMPLES_NXFFS_ARCHINIT is not set +CONFIG_EXAMPLES_NXFFS_NEBLOCKS=32 +CONFIG_EXAMPLES_NXFFS_MAXNAME=128 +CONFIG_EXAMPLES_NXFFS_MAXFILE=8192 +CONFIG_EXAMPLES_NXFFS_MAXIO=347 +CONFIG_EXAMPLES_NXFFS_MAXOPEN=512 +CONFIG_EXAMPLES_NXFFS_MOUNTPT="/mnt/nxffs" +CONFIG_EXAMPLES_NXFFS_NLOOPS=100 +# CONFIG_EXAMPLES_NXFFS_VERBOSE is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/nxffs/setenv.sh b/configs/sim/nxffs/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3aa03bc9887e89db686b843698e0fb6650acecaa --- /dev/null +++ b/configs/sim/nxffs/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# confisgs/sim/nxffs/setenv.sh +# +# Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/nxlines/Make.defs b/configs/sim/nxlines/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f164762ec520233e310ba5866a7fe48508d6773b --- /dev/null +++ b/configs/sim/nxlines/Make.defs @@ -0,0 +1,124 @@ +############################################################################ +# configs/sim/nxlines/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/nxlines/defconfig b/configs/sim/nxlines/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..9b878efec1b00c0d8c3971f8fde20e9e7d5fbcb7 --- /dev/null +++ b/configs/sim/nxlines/defconfig @@ -0,0 +1,828 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +# CONFIG_SIM_CYGWIN_DECORATED is not set +# CONFIG_SIM_X8664_SYSTEMV is not set +CONFIG_SIM_X8664_MICROSOFT=y +# CONFIG_SIM_WALLTIME is not set +CONFIG_SIM_FRAMEBUFFER=y +CONFIG_SIM_X11FB=y +# CONFIG_SIM_X11NOSHM is not set +CONFIG_SIM_FBHEIGHT=240 +CONFIG_SIM_FBWIDTH=480 +CONFIG_SIM_FBBPP=32 +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=0 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_POWEROFF is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxlines_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=16 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=48 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=8192 +CONFIG_USERMAIN_STACKSIZE=16384 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_PROCFS=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_ANTIALIASING is not set +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +# CONFIG_NX_DISABLE_32BPP is not set +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0x005a96bd +CONFIG_NXTK_BORDERCOLOR2=0x00233a49 +CONFIG_NXTK_BORDERCOLOR3=0x00f8f8f8 +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +CONFIG_NXFONT_SANS28X37B=y +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +# CONFIG_HAVE_CXXINITIALIZE is not set +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +CONFIG_EXAMPLES_NXLINES=y +CONFIG_EXAMPLES_NXLINES_VPLANE=0 +CONFIG_EXAMPLES_NXLINES_DEVNO=0 +# CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x00006400 +CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16 +CONFIG_EXAMPLES_NXLINES_LINECOLOR=0x00ffff00 +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=16 +CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0x00ffff00 +CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0x00f5f5dc +CONFIG_EXAMPLES_NXLINES_BPP=32 +# CONFIG_EXAMPLES_NXLINES_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=1 +CONFIG_NSH_ROMFSSECTSIZE=64 +CONFIG_NSH_DEFAULTROMFS=y +# CONFIG_NSH_ARCHROMFS is not set +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=2 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# +# CONFIG_NXWIDGETS is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/nxlines/setenv.sh b/configs/sim/nxlines/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..0722cbc2ee9edfb388d4571ee8a30177085e62b6 --- /dev/null +++ b/configs/sim/nxlines/setenv.sh @@ -0,0 +1,53 @@ +#!/bin/bash +# sim/nxlines/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/nxwm/Make.defs b/configs/sim/nxwm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..7aa008b27f0eeb55ccec0d4b8e88169d8a84a965 --- /dev/null +++ b/configs/sim/nxwm/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/nxwm/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/nxwm/defconfig b/configs/sim/nxwm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..5629cecde1dd90d4a7372ec8b265fa657d4b0fae --- /dev/null +++ b/configs/sim/nxwm/defconfig @@ -0,0 +1,984 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +CONFIG_SIM_FRAMEBUFFER=y +CONFIG_SIM_X11FB=y +# CONFIG_SIM_X11NOSHM is not set +CONFIG_SIM_FBHEIGHT=240 +CONFIG_SIM_FBWIDTH=480 +CONFIG_SIM_FBBPP=32 +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_POWEROFF is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxwm_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=16 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=48 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=8192 +CONFIG_USERMAIN_STACKSIZE=8192 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_PROCFS=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_ANTIALIASING is not set +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +# CONFIG_NX_DISABLE_32BPP is not set +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +CONFIG_NX_XYINPUT_NONE=y +# CONFIG_NX_XYINPUT_MOUSE is not set +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +CONFIG_NXFONT_SANS28X37B=y +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +CONFIG_NXTERM=y + +# +# NxTerm Output Text/Graphics Options +# +CONFIG_NXTERM_BPP=32 +CONFIG_NXTERM_CURSORCHAR=137 +CONFIG_NXTERM_MXCHARS=256 +CONFIG_NXTERM_CACHESIZE=16 +CONFIG_NXTERM_LINESEPARATION=0 +# CONFIG_NXTERM_NOWRAP is not set + +# +# NxTerm Input options +# +# CONFIG_NXTERM_NXKBDIN is not set +CONFIG_NXTERM_KBDBUFSIZE=16 +CONFIG_NXTERM_NPOLLWAITERS=4 + +# +# NX Multi-user only options +# +CONFIG_NX_MULTIUSER=y +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXSERVERMSGS=32 +CONFIG_NX_MXCLIENTMSGS=16 +# CONFIG_NX_NXSTART is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +# CONFIG_HAVE_CXXINITIALIZE is not set +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=1 +CONFIG_NSH_ROMFSSECTSIZE=64 +CONFIG_NSH_DEFAULTROMFS=y +# CONFIG_NSH_ARCHROMFS is not set +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=2 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# +CONFIG_NXWIDGETS=y + +# +# NX Server/Device Configuration +# +# CONFIG_NXWIDGETS_FLICKERFREE is not set +# CONFIG_NXWIDGETS_EXTERNINIT is not set +CONFIG_NXWIDGETS_VPLANE=0 +CONFIG_NXWIDGET_SERVERINIT=y +CONFIG_NXWIDGETS_SERVERPRIO=110 +CONFIG_NXWIDGETS_SERVERSTACK=16384 +CONFIG_NXWIDGETS_CLIENTPRIO=100 +CONFIG_NXWIDGETS_LISTENERPRIO=100 +CONFIG_NXWIDGETS_LISTENERSTACK=8192 +# CONFIG_NXWIDGET_EVENTWAIT is not set + +# +# NXWidget Configuration +# +CONFIG_NXWIDGETS_BPP=32 +CONFIG_NXWIDGETS_SIZEOFCHAR=1 + +# +# NXWidget Default Values +# +# CONFIG_NXWIDGETS_SYSTEM_CUSTOM_FONTID is not set +CONFIG_NXWIDGETS_TNXARRAY_INITIALSIZE=16 +CONFIG_NXWIDGETS_TNXARRAY_SIZEINCREMENT=8 +# CONFIG_NXWIDGETS_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWIDGETS_CUSTOM_TEXTCOLORS is not set +CONFIG_NXWIDGETS_TRANSPARENT_COLOR=0x0 + +# +# Keypad behavior +# +CONFIG_NXWIDGETS_FIRST_REPEAT_TIME=500 +CONFIG_NXWIDGETS_CONTINUE_REPEAT_TIME=200 +CONFIG_NXWIDGETS_DOUBLECLICK_TIME=350 +CONFIG_NXWIDGETS_KBDBUFFER_SIZE=16 +CONFIG_NXWIDGETS_CURSORCONTROL_SIZE=4 +# CONFIG_NXWIDGET_MEMMONITOR is not set +CONFIG_NXWM=y + +# +# NxWM General Settings +# +# CONFIG_NXWM_LARGE_ICONS is not set +# CONFIG_NXWM_CUSTOM_FONTID is not set +CONFIG_NXWM_UNITTEST=y + +# +# Color configuration +# +# CONFIG_NXWM_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWM_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWM_CUSTOM_TEXTCOLORS is not set + +# +# Background Image +# +# CONFIG_NXWM_DISABLE_BACKGROUND_IMAGE is not set +CONFIG_NXWM_BACKGROUND_IMAGE="" + +# +# NxWM Taskbar Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_TASKBAR_VSPACING=2 +CONFIG_NXWM_TASKBAR_HSPACING=2 +# CONFIG_NXWM_TASKBAR_TOP is not set +# CONFIG_NXWM_TASKBAR_BOTTOM is not set +CONFIG_NXWM_TASKBAR_LEFT=y +# CONFIG_NXWM_TASKBAR_RIGHT is not set +# CONFIG_NXWM_CUSTOM_TASKBAR_WIDTH is not set +# CONFIG_NXWM_TASKBAR_ICONSCALE is not set +# CONFIG_NXWM_DISABLE_MINIMIZE is not set +# CONFIG_NXWM_TASKBAR_NO_BORDER is not set + +# +# NxWM Toolbar Configuration +# +# CONFIG_NXWM_CUSTOM_TOOLBAR_HEIGHT is not set +# CONFIG_NXWM_TOOLBAR_CUSTOM_FONTID is not set + +# +# NxWM Application Window Configuration +# +# CONFIG_NXWM_CUSTOM_APPWINDOW_ICONS is not set + +# +# NxWM Start Window Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_STARTWINDOW_VSPACING=4 +CONFIG_NXWM_STARTWINDOW_HSPACING=4 +# CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set +CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm" +CONFIG_NXWM_STARTWINDOW_MXMSGS=32 +CONFIG_NXWM_STARTWINDOW_MXMPRIO=42 +CONFIG_NXWM_STARTWINDOW_PRIO=100 +CONFIG_NXWM_STARTWINDOW_STACKSIZE=2048 + +# +# NxTerm Window Settings +# +CONFIG_NXWM_NXTERM=y +CONFIG_NXWM_NXTERM_PRIO=100 +CONFIG_NXWM_NXTERM_STACKSIZE=8192 +# CONFIG_NXWM_NXTERM_CUSTOM_COLORS is not set +# CONFIG_NXWM_NXTERM_CUSTOM_FONTID is not set +# CONFIG_NXWM_CUSTOM_NXTERM_ICON is not set + +# +# NxWM Touchscreen Configuration +# +# CONFIG_NXWM_TOUCHSCREEN is not set + +# +# NxWM Keyboard Configuration +# +# CONFIG_NXWM_KEYBOARD is not set + +# +# NxWM Calibration Display Settings +# +CONFIG_NXWM_CALIBRATION_MARGIN=40 +# CONFIG_NXWM_CALIBRATION_CUSTOM_COLORS is not set +# CONFIG_NXWM_CALIBRATION_MESSAGES is not set +# CONFIG_NXWM_CALIBRATION_ANISOTROPIC is not set +# CONFIG_NXWM_CUSTOM_CALIBRATION_ICON is not set +CONFIG_NXWM_CALIBRATION_SIGNO=5 +CONFIG_NXWM_CALIBRATION_LISTENERPRIO=100 +CONFIG_NXWM_CALIBRATION_LISTENERSTACK=2048 + +# +# NxWM Hex Calculator Display Settings +# +# CONFIG_NXWM_HEXCALCULATOR_CUSTOM_COLORS is not set +# CONFIG_NXWM_CUSTOM_HEXCALCULATOR_ICON is not set +# CONFIG_NXWM_HEXCALCULATOR_CUSTOM_FONTID is not set + +# +# NxWM Media Player Display Settings +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/nxwm/setenv.sh b/configs/sim/nxwm/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..a3e949cda9bb90a6bf61a9bb27d4442d1c4b2881 --- /dev/null +++ b/configs/sim/nxwm/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# sim/nxwm/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/ostest/Make.defs b/configs/sim/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..a49679c244aea85eb505049394ffcd54f57b8bd7 --- /dev/null +++ b/configs/sim/ostest/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/ostest/Make.defs +# +# Copyright (C) 2007-2008, 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/ostest/defconfig b/configs/sim/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..142326ee31ff15986b6f4729083c08b005c6d050 --- /dev/null +++ b/configs/sim/ostest/defconfig @@ -0,0 +1,620 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_VERBOSE=y + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_MULTICPU=y +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=100 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00000000 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +CONFIG_SCHED_HAVE_PARENT=y +# CONFIG_SCHED_CHILD_STATUS is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +CONFIG_MUTEX_TYPES=y +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCHLD=4 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +CONFIG_FS_NAMED_SEMAPHORES=y +CONFIG_FS_NAMED_SEMPATH="/var/lock" +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=100 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=8192 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +CONFIG_EXAMPLES_OSTEST_WAITRESULT=y +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/ostest/setenv.sh b/configs/sim/ostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..f13d73ee4278f83d0b0aa4ad8be2a1be36c3b379 --- /dev/null +++ b/configs/sim/ostest/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# configs/sim/ostest/setenv.sh +# +# Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/pashello/Make.defs b/configs/sim/pashello/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..b1ef6cd990bdb3e8926435a4b6870aeb997ecc9c --- /dev/null +++ b/configs/sim/pashello/Make.defs @@ -0,0 +1,130 @@ +############################################################################ +# configs/sim/pashello/Make.defs +# +# Copyright (C) 2007-2008, 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + +EXTRA_LIBS = -lm + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/pashello/defconfig b/configs/sim/pashello/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..70e3e55df052f1a901056b254a0eac8c54ad9d6a --- /dev/null +++ b/configs/sim/pashello/defconfig @@ -0,0 +1,589 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="pashello_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +CONFIG_EXAMPLES_PASHELLO=y +CONFIG_EXAMPLES_PASHELLO_VARSTACKSIZE=1024 +CONFIG_EXAMPLES_PASHELLO_STRSTACKSIZE=128 +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +CONFIG_INTERPRETERS_PCODE=y +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +CONFIG_SYSTEM_PRUN=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/pashello/setenv.sh b/configs/sim/pashello/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..273e418ee12b8b6209634e7a347835ba26d958b0 --- /dev/null +++ b/configs/sim/pashello/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# sim/setenv.sh +# +# Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/scripts/gnu-elf.ld b/configs/sim/scripts/gnu-elf.ld new file mode 100644 index 0000000000000000000000000000000000000000..f3cba363a2598c4398ceaa14912bedc0538e54db --- /dev/null +++ b/configs/sim/scripts/gnu-elf.ld @@ -0,0 +1,133 @@ +/**************************************************************************** + * configs/sim/scripts/gnu-elf.ld + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_FORMAT(elf32-i386) +OUTPUT_ARCH(i386) +TARGET(elf32-i386) +ENTRY(main) +SECTIONS +{ + .text 0x00000000 : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + *(.ctors) /* Old ABI: Unallocated */ + *(.init_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .dtors : + { + _sdtors = . ; + *(.dtors) /* Old ABI: Unallocated */ + *(.fini_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = . ; + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/sim/src/.gitignore b/configs/sim/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/sim/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/sim/src/Makefile b/configs/sim/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..9f45e7e93bf00c22dfc590b460c71c76cdf7441f --- /dev/null +++ b/configs/sim/src/Makefile @@ -0,0 +1,67 @@ +############################################################################ +# configs/sim/src/Makefile +# +# Copyright (C) 2007, 2008, 2011-2012, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = + +ifeq ($(CONFIG_BOARD_INITIALIZE),y) + CSRCS += sim_boot.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) + CSRCS += sim_appinit.c +endif + +ifeq ($(CONFIG_BOARD_INITIALIZE),y) + CSRCS += sim_bringup.c +ifeq ($(CONFIG_SYSTEM_ZONEINFO_ROMFS),y) + CSRCS += sim_zoneinfo.c +endif +else ifeq ($(CONFIG_LIB_BOARDCTL),y) + CSRCS += sim_bringup.c +ifeq ($(CONFIG_SYSTEM_ZONEINFO_ROMFS),y) + CSRCS += sim_zoneinfo.c +endif +endif + +ifeq ($(CONFIG_SIM_X11FB),y) +ifeq ($(CONFIG_SIM_TOUCHSCREEN),y) + CSRCS += sim_touchscreen.c +endif +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/sim/src/sim.h b/configs/sim/src/sim.h new file mode 100644 index 0000000000000000000000000000000000000000..355d085022ead524dba01c36624d1d1dd2a785af --- /dev/null +++ b/configs/sim/src/sim.h @@ -0,0 +1,114 @@ +/**************************************************************************** + * config/sim/src/sim.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_SIM_SRC_SIM_H +#define __CONFIGS_SIM_SRC_SIM_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* procfs File System */ + +#ifdef CONFIG_FS_PROCFS +# ifdef CONFIG_NSH_PROC_MOUNTPOINT +# define SIM_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT +# else +# define SIM_PROCFS_MOUNTPOINT "/proc" +# endif +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: sim_bringup + * + * Description: + * Bring up simulated board features + * + ****************************************************************************/ + +int sim_bringup(void); + +/**************************************************************************** + * Name: sim_zoneinfo + * + * Description: + * Mount the TZ database. The apps/system/zoneinfo directory contains + * logic to create a version of the TZ/Olson database. + * This database is required if localtime() support is selected via + * CONFIG_LIBC_LOCALTIME. This logic in that directory does the following: + * + * - It downloads the current TZ database from the IANA website + * - It downloads the current timezone tools from the same location + * - It builds the tools and constructs the binary TZ database + * - It will then, optionally, build a ROMFS filesystem image containing + * the data base. + * + * The ROMFS filesystem image can that be mounted during the boot-up sequence + * so that it is available for the localtime logic. There are two steps to + * doing this: + * + * - First, a ROM disk device must be created. This is done by calling + * the function romdisk_register() as described in + * nuttx/include/nuttx/fs/ramdisk.h. This is an OS level operation + * and must be done in the board-level logic before your appliction + * starts. + * + * romdisk_register() will create a block driver at /dev/ramN where N + * is the device minor number that was provdied to romdisk_regsiter. + * + * - The second step is to mount the file system. This step can be + * performed either in your board configuration logic or by your + * application using the mount() interface described in + * nuttx/include/sys/mount.h. + * + * These steps, however, must be done very early in initialization, + * before there is any need for time-related services. + * + ****************************************************************************/ + +#ifdef CONFIG_SYSTEM_ZONEINFO_ROMFS +int sim_zoneinfo(int minor); +#endif + +#endif /* __CONFIGS_SIM_SRC_SIM_H */ \ No newline at end of file diff --git a/configs/sim/src/sim_appinit.c b/configs/sim/src/sim_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..eecf0415cf61cc5a1852536c2b36119b201642dc --- /dev/null +++ b/configs/sim/src/sim_appinit.c @@ -0,0 +1,68 @@ +/**************************************************************************** + * configs/sim/src/sim_appinit.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "sim.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + ****************************************************************************/ + +#ifdef CONFIG_LIB_BOARDCTL +int board_app_initialize(void) +{ +#ifndef CONFIG_BOARD_INITIALIZE + sim_bringup(); +#endif + + return 0; +} +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/configs/sim/src/sim_boot.c b/configs/sim/src/sim_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..826ca47f90df52c1bb3b26b74d04462b55af5c77 --- /dev/null +++ b/configs/sim/src/sim_boot.c @@ -0,0 +1,83 @@ +/**************************************************************************** + * config/sim/src/sim_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "sim.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + sim_bringup(); +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/sim/src/sim_bringup.c b/configs/sim/src/sim_bringup.c new file mode 100644 index 0000000000000000000000000000000000000000..c22cd8138163e893b5f11ed7965e64e833be999d --- /dev/null +++ b/configs/sim/src/sim_bringup.c @@ -0,0 +1,116 @@ +/**************************************************************************** + * configs/sim/src/sam_bringup.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include + +#include + +#include "up_internal.h" +#include "sim.h" + +#ifdef CONFIG_GRAPHICS_TRAVELER_ROMFSDEMO +int trv_mount_world(int minor, FAR const char *mountpoint); +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Debug ********************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +# define SYSLOG lldbg +#else +# define SYSLOG dbg +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_bringup + * + * Description: + * Bring up simulated board features + * + ****************************************************************************/ + +int sim_bringup(void) +{ +#ifdef CONFIG_FS_PROCFS + int ret; +#endif + +#ifdef CONFIG_SYSTEM_ZONEINFO_ROMFS + /* Mount the TZ database */ + + (void)sim_zoneinfo(3); +#endif + +#ifdef CONFIG_AJOYSTICK + /* Initialize the simulated analog joystick input device */ + + sim_ajoy_initialize(); +#endif + +#ifdef CONFIG_GRAPHICS_TRAVELER_ROMFSDEMO + /* Special initialization for the Traveler game simulation */ + + (void)trv_mount_world(0, CONFIG_GRAPHICS_TRAVELER_DEFPATH); +#endif + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = mount(NULL, SIM_PROCFS_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + SYSLOG("ERROR: Failed to mount procfs at %s: %d\n", + SIM_PROCFS_MOUNTPOINT, ret); + } +#endif + + return OK; +} diff --git a/configs/sim/src/sim_touchscreen.c b/configs/sim/src/sim_touchscreen.c new file mode 100644 index 0000000000000000000000000000000000000000..57ec36c1ae57b1bf1ecd589b604e46044059d210 --- /dev/null +++ b/configs/sim/src/sim_touchscreen.c @@ -0,0 +1,183 @@ +/**************************************************************************** + * config/sim/src/sim_touchscreen.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* Pick a background color */ + +#ifndef CONFIG_EXAMPLES_TOUCHSCREEN_BGCOLOR +# define CONFIG_EXAMPLES_TOUCHSCREEN_BGCOLOR 0x007b68ee +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct sim_touchscreen_s +{ + NXHANDLE hnx; +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct sim_touchscreen_s g_simtc; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup() + * + * Description: + * Perform architecuture-specific initialization of the touchscreen + * hardware. This interface must be provided by all configurations + * using apps/examples/touchscreen + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ + FAR NX_DRIVERTYPE *dev; + nxgl_mxpixel_t color; + int ret; + + /* Initialize the simulated frame buffer device. We need to create an + * X11 window to support the mouse-driven touchscreen simulation. + */ + + ivdbg("Initializing framebuffer\n"); + ret = up_fbinitialize(); + if (ret < 0) + { + idbg("up_fbinitialize failed: %d\n", -ret); + goto errout; + } + + dev = up_fbgetvplane(0); + if (!dev) + { + idbg("up_fbgetvplane 0 failed\n"); + ret = -ENODEV; + goto errout_with_fb; + } + + /* Then open NX */ + + ivdbg("Open NX\n"); + g_simtc.hnx = nx_open(dev); + if (!g_simtc.hnx) + { + ret = -errno; + idbg("nx_open failed: %d\n", ret); + goto errout_with_fb; + } + + /* Set the background to the configured background color */ + + ivdbg("Set background color=%d\n", CONFIG_EXAMPLES_TOUCHSCREEN_BGCOLOR); + + color = CONFIG_EXAMPLES_TOUCHSCREEN_BGCOLOR; + ret = nx_setbgcolor(g_simtc.hnx, &color); + if (ret < 0) + { + idbg("nx_setbgcolor failed: %d\n", ret); + goto errout_with_nx; + } + + /* Finally, initialize the touchscreen simulation on the X window */ + + ret = board_tsc_setup(minor); + if (ret < 0) + { + idbg("board_tsc_setup failed: %d\n", ret); + goto errout_with_nx; + } + return OK; + +errout_with_nx: + nx_close(g_simtc.hnx); + goto errout; +errout_with_fb: + fb_uninitialize(); +errout: + return ret; +} + +/**************************************************************************** + * Name: board_tsc_teardown() + * + * Description: + * Perform architecuture-specific un-initialization of the touchscreen + * hardware. This interface must be provided by all configurations + * using apps/examples/touchscreen + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* Shut down the touchscreen driver */ + + sim_tcuninitialize(); + + /* Close NX */ + + nx_close(g_simtc.hnx); +} diff --git a/configs/sim/src/sim_zoneinfo.c b/configs/sim/src/sim_zoneinfo.c new file mode 100644 index 0000000000000000000000000000000000000000..1e3840917c321a4bdaafdbf0d3d3a47fce126627 --- /dev/null +++ b/configs/sim/src/sim_zoneinfo.c @@ -0,0 +1,153 @@ +/**************************************************************************** + * config/sim/src/sim_zoneinfo.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#ifdef CONFIG_SYSTEM_ZONEINFO_ROMFS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef CONFIG_LIBC_TZDIR +# errror CONFIG_LIBC_TZDIR is not defined +#endif + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# error "Mountpoint support is disabled" +#endif + +#if CONFIG_NFILE_DESCRIPTORS < 4 +# error "Not enough file descriptors" +#endif + +#ifndef CONFIG_FS_ROMFS +# error "ROMFS support not enabled" +#endif + +#define SECTORSIZE 64 +#define NSECTORS(b) (((b)+SECTORSIZE-1)/SECTORSIZE) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sim_zoneinfo + * + * Description: + * Mount the TZ database. The apps/system/zoneinfo directory contains + * logic to create a version of the TZ/Olson database. + * This database is required if localtime() support is selected via + * CONFIG_LIBC_LOCALTIME. This logic in that directory does the following: + * + * - It downloads the current TZ database from the IANA website + * - It downloads the current timezone tools from the same location + * - It builds the tools and constructs the binary TZ database + * - It will then, optionally, build a ROMFS filesystem image containing + * the data base. + * + * The ROMFS filesystem image can that be mounted during the boot-up sequence + * so that it is available for the localtime logic. There are two steps to + * doing this: + * + * - First, a ROM disk device must be created. This is done by calling + * the function romdisk_register() as described in + * nuttx/include/nuttx/fs/ramdisk.h. This is an OS level operation + * and must be done in the board-level logic before your appliction + * starts. + * + * romdisk_register() will create a block driver at /dev/ramN where N + * is the device minor number that was provdied to romdisk_regsiter. + * + * - The second step is to mount the file system. This step can be + * performed either in your board configuration logic or by your + * application using the mount() interface described in + * nuttx/include/sys/mount.h. + * + * These steps, however, must be done very early in initialization, + * before there is any need for time-related services. + * + ****************************************************************************/ + +int sim_zoneinfo(int minor) +{ + char devname[32]; + int ret; + + /* Create a RAM disk for the test */ + + ret = romdisk_register(minor, romfs_zoneinfo_img, + NSECTORS(romfs_zoneinfo_img_len), SECTORSIZE); + if (ret < 0) + { + printf("ERROR: Failed to create RAM disk\n"); + return ret; + } + + /* Use the minor number to create a name for the ROM disk block device */ + + snprintf(devname, 32, "/dev/ram%d", minor); + + /* Mount the ROMFS file system */ + + printf("Mounting ROMFS filesystem at target=%s with source=%s\n", + CONFIG_LIBC_TZDIR, devname); + + ret = mount(devname, CONFIG_LIBC_TZDIR, "romfs", MS_RDONLY, NULL); + if (ret < 0) + { + printf("ERROR: Mount failed: %d\n", errno); + return ret; + } + + printf("TZ database mounted at %s\n", CONFIG_LIBC_TZDIR); + return OK; +} + +#endif /* CONFIG_SYSTEM_ZONEINFO_ROMFS */ + diff --git a/configs/sim/touchscreen/Make.defs b/configs/sim/touchscreen/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..dcbfb0137710614a8fb8df13a0c07b0f7e9358c1 --- /dev/null +++ b/configs/sim/touchscreen/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/touchscreen/Make.defs +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/touchscreen/defconfig b/configs/sim/touchscreen/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..7baca3000ab87f6958132995fe4727f133737c43 --- /dev/null +++ b/configs/sim/touchscreen/defconfig @@ -0,0 +1,706 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_VERBOSE=y + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_INPUT is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +CONFIG_SIM_FRAMEBUFFER=y +CONFIG_SIM_X11FB=y +# CONFIG_SIM_X11NOSHM is not set +CONFIG_SIM_FBHEIGHT=320 +CONFIG_SIM_FBWIDTH=240 +CONFIG_SIM_FBBPP=32 +CONFIG_SIM_TOUCHSCREEN=y +# CONFIG_SIM_AJOYSTICK is not set +# CONFIG_SIM_NOINPUT is not set +# CONFIG_SIM_TCNWAITERS is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +CONFIG_EXAMPLES_TOUCHSCREEN_BGCOLOR=0x007b68ee +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_POWEROFF is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_TSCTEST=y +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=28 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="tc_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=16 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +# CONFIG_INPUT_MXT is not set +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_ANTIALIASING is not set +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +# CONFIG_NX_DISABLE_32BPP is not set +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +CONFIG_EXAMPLES_TOUCHSCREEN=y +CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0 +CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0" +CONFIG_EXAMPLES_TOUCHSCREEN_NSAMPLES=25 +# CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE is not set +CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/touchscreen/setenv.sh b/configs/sim/touchscreen/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..4cc3bba57690761980bacc19d59a36d07978c046 --- /dev/null +++ b/configs/sim/touchscreen/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# sim/touchscreen/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/traveler/Make.defs b/configs/sim/traveler/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..df548aee9e7303bed69b51f12b29a28653bed95a --- /dev/null +++ b/configs/sim/traveler/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/traveler/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/traveler/defconfig b/configs/sim/traveler/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..f001ac56491793854b7611b209ff2a1dca7d0952 --- /dev/null +++ b/configs/sim/traveler/defconfig @@ -0,0 +1,652 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +CONFIG_EXPERIMENTAL=y +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_VERBOSE=y + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +CONFIG_DEBUG_GRAPHICS=y +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_INPUT is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +# CONFIG_SIM_WALLTIME is not set +CONFIG_SIM_FRAMEBUFFER=y +CONFIG_SIM_X11FB=y +# CONFIG_SIM_X11NOSHM is not set +CONFIG_SIM_FBHEIGHT=400 +CONFIG_SIM_FBWIDTH=640 +CONFIG_SIM_FBBPP=32 +# CONFIG_SIM_TOUCHSCREEN is not set +CONFIG_SIM_AJOYSTICK=y +# CONFIG_SIM_NOINPUT is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5000 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=28 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="traveler_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=16 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=16384 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +# CONFIG_INPUT_MXT is not set +# CONFIG_INPUT_STMPE811 is not set +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +CONFIG_AJOYSTICK=y +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_AJOYSTICK is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +CONFIG_GRAPHICS_TRAVELER=y + +# +# Traveler game +# + +# +# Color configuration +# +# CONFIG_GRAPHICS_TRAVELER_RGB16_565 is not set +CONFIG_GRAPHICS_TRAVELER_RGB32_888=y +CONFIG_GRAPHICS_TRAVELER_DEFPATH="/mnt/world" +CONFIG_GRAPHICS_TRAVELER_LIMITFPS=y +CONFIG_GRAPHICS_TRAVELER_MAXFPS=30 +CONFIG_GRAPHICS_TRAVELER_PALRANGES=y + +# +# Input device selection +# +CONFIG_GRAPHICS_TRAVELER_JOYSTICK=y +CONFIG_GRAPHICS_TRAVELER_AJOYSTICK=y +CONFIG_GRAPHICS_TRAVELER_JOYSTICK_SIGNO=13 +CONFIG_GRAPHICS_TRAVELER_JOYDEV="/dev/ajoy0" + +# +# Debug options +# +CONFIG_GRAPHICS_TRAVELER_ROMFSDEMO=y +# CONFIG_GRAPHICS_TRAVELER_PERFMON is not set +CONFIG_GRAPHICS_TRAVELER_DEBUG_LEVEL=0 + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_FSUTILS_INIFILE=y +CONFIG_FSUTILS_INIFILE_MAXLINE=256 +CONFIG_FSUTILS_INIFILE_DEBUGLEVEL=0 +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/traveler/setenv.sh b/configs/sim/traveler/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..aaa54bd58cf3aa0ff89a0d2f1f5aa82458c926f6 --- /dev/null +++ b/configs/sim/traveler/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# sim/traveler/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/udgram/Make.defs b/configs/sim/udgram/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..d538b9b3efae9c2f2439ade1c19e19cf30e1bb36 --- /dev/null +++ b/configs/sim/udgram/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/udgram/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/udgram/defconfig b/configs/sim/udgram/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..bf678170a08cee23507b7c61e685ff08f15fc875 --- /dev/null +++ b/configs/sim/udgram/defconfig @@ -0,0 +1,829 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +CONFIG_SIM_WALLTIME=y +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=0 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +CONFIG_BOOT_RUNFROMEXTSRAM=y +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_POWEROFF is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_APP_SYMTAB is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +CONFIG_SCHED_HAVE_PARENT=y +# CONFIG_SCHED_CHILD_STATUS is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCHLD=4 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_NETDEVICES is not set +# CONFIG_NET_SLIP is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +# CONFIG_NET_ETHERNET is not set +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +# CONFIG_NET_IPv4 is not set +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +# CONFIG_NET_SOCKOPTS is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +CONFIG_NET_LOCAL=y +# CONFIG_NET_LOCAL_STREAM is not set +CONFIG_NET_LOCAL_DGRAM=y + +# +# TCP/IP Networking +# +# CONFIG_NET_TCP is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# + +# +# Network I/O Buffer Support +# +# CONFIG_NET_IOB is not set +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_BINFS=y +CONFIG_FS_PROCFS=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_NET is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +CONFIG_BINFMT_EXEPATH=y +CONFIG_PATH_INITIAL="/bin" +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +CONFIG_LIBC_EXECFUNCS=y +CONFIG_EXECFUNCS_HAVE_SYMTAB=y +CONFIG_EXECFUNCS_SYMTAB="g_symtab" +CONFIG_EXECFUNCS_NSYMBOLS=0 +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +CONFIG_EXAMPLES_UDGRAM=y +CONFIG_EXAMPLES_UDGRAM_ADDR="/dev/fifo" +CONFIG_EXAMPLES_UDGRAM_SERVER_APPNAME="server" +CONFIG_EXAMPLES_UDGRAM_SERVER_STACKSIZE=4096 +CONFIG_EXAMPLES_UDGRAM_SERVER_PRIORITY=100 +CONFIG_EXAMPLES_UDGRAM_CLIENT_APPNAME="client" +CONFIG_EXAMPLES_UDGRAM_CLIENT_STACKSIZE=4096 +CONFIG_EXAMPLES_UDGRAM_CLIENT_PRIORITY=100 +# CONFIG_EXAMPLES_USTREAM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_NETLIB=y + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILE_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=1 +CONFIG_NSH_ROMFSSECTSIZE=64 +CONFIG_NSH_DEFAULTROMFS=y +# CONFIG_NSH_ARCHROMFS is not set +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=2 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_SYMTAB is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/udgram/setenv.sh b/configs/sim/udgram/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ac823792035da4a6e924e1a4c79ceba4f898f67c --- /dev/null +++ b/configs/sim/udgram/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# sim/udgram/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/unionfs/Make.defs b/configs/sim/unionfs/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..42334c65cf4f3a664dbf9c9efef5659cc8269dec --- /dev/null +++ b/configs/sim/unionfs/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/unionfs/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/unionfs/defconfig b/configs/sim/unionfs/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ca5af52a6319077e7c7a13288ee5693cf1ee16d7 --- /dev/null +++ b/configs/sim/unionfs/defconfig @@ -0,0 +1,731 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +CONFIG_SIM_WALLTIME=y +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=0 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +CONFIG_BOOT_RUNFROMEXTSRAM=y +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_POWEROFF is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_APP_SYMTAB is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +CONFIG_SCHED_HAVE_PARENT=y +# CONFIG_SCHED_CHILD_STATUS is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCHLD=4 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +CONFIG_FS_UNIONFS=y +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +CONFIG_BINFMT_EXEPATH=y +CONFIG_PATH_INITIAL="/bin" +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +CONFIG_LIBC_EXECFUNCS=y +CONFIG_EXECFUNCS_HAVE_SYMTAB=y +CONFIG_EXECFUNCS_SYMTAB="g_symtab" +CONFIG_EXECFUNCS_NSYMBOLS=0 +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +CONFIG_EXAMPLES_UNIONFS=y +CONFIG_EXAMPLES_UNIONFS_MOUNTPT="/mnt/unionfs" +CONFIG_EXAMPLES_UNIONFS_RAMDEVNO_A=4 +CONFIG_EXAMPLES_UNIONFS_RAMDEVNO_B=5 +CONFIG_EXAMPLES_UNIONFS_SECTORSIZE=64 +CONFIG_EXAMPLES_UNIONFS_TMPA="/mnt/a" +CONFIG_EXAMPLES_UNIONFS_TMPB="/mnt/b" +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILE_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=1 +CONFIG_NSH_ROMFSSECTSIZE=64 +CONFIG_NSH_DEFAULTROMFS=y +# CONFIG_NSH_ARCHROMFS is not set +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=2 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_SYMTAB is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/unionfs/setenv.sh b/configs/sim/unionfs/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..8ef7388a6b44966dcc3143b3f148b26af15f521f --- /dev/null +++ b/configs/sim/unionfs/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# sim/unionfs/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/sim/ustream/Make.defs b/configs/sim/ustream/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..cf9073789484ccdbc61d4ada564f84dccc730324 --- /dev/null +++ b/configs/sim/ustream/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/ustream/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/ustream/defconfig b/configs/sim/ustream/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..31a861a5acea53d197152963fe12b30494bcb4ff --- /dev/null +++ b/configs/sim/ustream/defconfig @@ -0,0 +1,824 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +CONFIG_SIM_WALLTIME=y +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=0 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +CONFIG_BOOT_RUNFROMEXTSRAM=y +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_POWEROFF is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_APP_SYMTAB is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +CONFIG_SCHED_HAVE_PARENT=y +# CONFIG_SCHED_CHILD_STATUS is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCHLD=4 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_NETDEVICES is not set +# CONFIG_NET_SLIP is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +# CONFIG_NET_ETHERNET is not set +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +# CONFIG_NET_IPv4 is not set +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +# CONFIG_NET_SOCKOPTS is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +CONFIG_NET_LOCAL=y +CONFIG_NET_LOCAL_STREAM=y +# CONFIG_NET_LOCAL_DGRAM is not set + +# +# TCP/IP Networking +# +# CONFIG_NET_TCP is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# + +# +# Network I/O Buffer Support +# +# CONFIG_NET_IOB is not set +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_BINFS=y +CONFIG_FS_PROCFS=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_NET is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +CONFIG_BINFMT_EXEPATH=y +CONFIG_PATH_INITIAL="/bin" +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +CONFIG_LIBC_EXECFUNCS=y +CONFIG_EXECFUNCS_HAVE_SYMTAB=y +CONFIG_EXECFUNCS_SYMTAB="g_symtab" +CONFIG_EXECFUNCS_NSYMBOLS=0 +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_UDGRAM is not set +CONFIG_EXAMPLES_USTREAM=y +CONFIG_EXAMPLES_USTREAM_ADDR="/dev/fifo" +# CONFIG_EXAMPLES_USTREAM_USE_POLL is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_NETLIB=y + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILE_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=1 +CONFIG_NSH_ROMFSSECTSIZE=64 +CONFIG_NSH_DEFAULTROMFS=y +# CONFIG_NSH_ARCHROMFS is not set +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=2 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_SYMTAB is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/ustream/setenv.sh b/configs/sim/ustream/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..acede5c7ff3451151d2bd1d8d3120cd20f3a1662 --- /dev/null +++ b/configs/sim/ustream/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# sim/ustream/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/skp16c26/Kconfig b/configs/skp16c26/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..94a66e760d8ef26ca2a8208b9cbd1a8489a80f00 --- /dev/null +++ b/configs/skp16c26/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SKP16C26 +endif diff --git a/configs/skp16c26/README.txt b/configs/skp16c26/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..864c01faf8a05b1002773bb284f15e91221c41d8 --- /dev/null +++ b/configs/skp16c26/README.txt @@ -0,0 +1,112 @@ +configs/skp16c26/README.txt +^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +1. The buildroot package can be used to build an M16C toolchain. The toolchain + buildroot can be downloaded from buildroot in the NuttX GIT. Insructions + for building the toolchain are provided below. + + However, the target cannot be built because the GNU m16c-nuttx-elf-ld link fails with + the following message: + + m32c-nuttx-elf-ld: BFD (GNU Binutils) 2.19 assertion fail /home/Owner/projects/nuttx/buildroot/toolchain_build_m32c/binutils-2.19/bfd/elf32-m32c.c:482 + + Where the reference line is: + + /* If the symbol is out of range for a 16-bit address, + we must have allocated a plt entry. */ + BFD_ASSERT (*plt_offset != (bfd_vma) -1); + + No workaround is known at this time. This is a show stopper for M16C. + +2. A supported version of the M16C toolchain is available here: + + http://www.kpitgnutools.com/index.php + + This download is free but requires registration. Unfortunately, this v0901 of + this toolchain shows the same behavior: + + c:\Hew3\Tools\KPIT Cummins\GNUM16CM32C-ELF\v0901\m32c-elf\bin\m32c-elf-ld.exe: BFD (GNU Binutils) 2.19-GNUM16CM32C_v0901 assertion fail /home/kpit/fsfsrc/binutils-2.19/bfd/elf32-m32c.c:482 + +It is possible that this error messasge my be telling me -- a very roundabout way -- +that I have exceeded the FLASH region, but I think that unlikely (it is difficult +to know if the link does not complete gracefully). + +BUILDING THE R8C/M16C/M32C GNU TOOLCHAIN USING BUILDROOT +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +NOTE: See the toolchain issues above -- you may not want to waste your time. + +1. CD to the correct directory. + + Change to the directory just above the NuttX installation. If is + where NuttX is installed, then cd to /.. + +2. Get and Install the buildroot Module + + a. Using a release tarball: + + cd /.. + Download the appropriate buildroot package. + unpack the buildroot package + rename the directory to buildroot + + b. Using GIT + + Check out the buildroot module. GIT checkout instructions: + + git clone hhttps://patacongo@bitbucket.org/nuttx/buildroot.git buildroot + + Make the archive directory: + + mkdir archive + + The /../buildroot is where the toolchain is built; + The /../archive directory is where toolchain sources will be downloaded. + +3. Make sure that NuttX is configured + + cd /tools + ./configure.sh + +4. Configure and Make the buildroot + + cd buildroot + cp configs/m32c-defconfig-4.2.4 .config + make oldconfig + make + + This will download the large source packages for the toolchain and build the toolchain. + The resulting binaries will be under buildroot/build_m32c. There will also be a + large build directory called toolchain_build_m32c; this directory can be removed once + the build completes successfully. + +Cygwin GCC BUILD NOTES +^^^^^^^^^^^^^^^^^^^^^^ + On Cygwin, the buildroot 'make' command will fail with an error like: + + "... + build/genchecksum cc1-dummy > cc1-checksum.c + opening cc1-dummy: No such file or directory + ..." + + This is caused because on Cygwin, host executables will be generated with the extension .exe + and, apparently, the make variable "exeext" is set incorrectly. A work around after the + above occurs is: + + cd toolchain_build_m32c/gcc-4.2.4-initial/gcc # Go to the directory where error occurred + mv cc1-dummy.exe cc1-dummy # Rename the executable without .exe + rm cc1-checksum.c # Get rid of the bad generated file + + Then resume the buildroot make: + + cd - # Back to the buildroot make directory + make # Restart the build + + GCC is built twice. First a initial, "bootstap" GCC is produced in + toolchain_build_m32c/gcc-4.2.4-initial, then the final GCC is produced in + toolchain_build_m32c/gcc-4.2.4-final. The above error will occur twice: Once for + the intial GCC build (see above) and once for the final GCC build. For the final GCC + build, the workaround is the same except that the directory will be + toolchain_build_m32c/gcc-4.2.4-final/gcc. + + diff --git a/configs/skp16c26/include/board.h b/configs/skp16c26/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..483dfcf4cf01c80aad959f9bf147193f7577688c --- /dev/null +++ b/configs/skp16c26/include/board.h @@ -0,0 +1,134 @@ +/************************************************************************************ + * configs/skp16c26/include/board.h + * arch/board/board.h + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SKP16C26_INCLUDE_BOARD_H +#define __CONFIGS_SKP16C26_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* User configuration checks ********************************************************/ + +/* According to SKP16C26 documention, "SIO/UART1 pins are used for communication + * between the SKP16C26 board kernel and KD30 Debugger through the ICD. Do not + * connect these pins to any other circuit, as UART1 cannot be used in the user + * program. For details, please see ICD (RTA-FoUSB-MON) User Manual on Target M16C + * ROM Monitor Resources or related ICD application notes." + * + * However, the schematic appears to show that SIO/UART2 is actual connection. + * To be safe, we will error out on either selection: + */ + +#if defined(CONFIG_M16C_UART1) || defined(CONFIG_M16C_UART2) +# error "UART1/2 should not be used on SKP16C26" +#endif + +/* Hardware defintitions ************************************************************/ + +/* Xin Freq */ + +#define M16C_XIN_FREQ 20000000 /* 20MHz */ + +/* Interrupt Priority Levels ********************************************************/ + +/* IPL settings */ + +#define M16C_DEFAULT_IPL 0 /* Default M16C Interrupt priority level */ +#undef M16C_INTERRUPT_IPL /* Default interrupt IPL to enabled nested interrupts */ + +/* Define any of the following to specify interrupt priorities. A default + * value of 5 will be used for any unspecified values + */ + +#undef M16C_INT3_PRIO /* INT3 interrupt priority */ +#undef M16C_INT5_PRIO /* INT5 interrupt priority */ +#undef M16C_INT4_PRIO /* INT4 interrupt priority */ +#undef M16C_BCN_PRIO /* Bus collision detection interrupt priority */ +#undef M16C_DM0_PRIO /* DMA0 interrupt priority */ +#undef M16C_DM1_PRIO /* DMA1 interrupt priority */ +#undef M16C_KUP_PRIO /* Key input interrupt priority */ +#undef M16C_AD_PRIO /* A-D conversion interrupt priority */ +#undef M16C_S2T_PRIO /* UART2 transmit interrupt priority */ +#undef M16C_S2R_PRIO /* UART2 receive interrupt priority */ +#undef M16C_S0T_PRIO /* UART0 transmit interrupt priority */ +#undef M16C_S0R_PRIO /* UART0 receive interrupt priority */ +#undef M16C_S1T_PRIO /* UART1 transmit interrupt priority */ +#undef M16C_S1R_PRIO /* UART1 receive interrupt priority */ +#define M16C_TA0_PRIO 5 /* Timer A0 interrupt priority */ +#undef M16C_TA1_PRIO /* Timer A1 interrupt priority */ +#undef M16C_TA2_PRIO /* Timer A2 interrupt priority */ +#undef M16C_TA3_PRIO /* Timer A3 interrupt priority */ +#undef M16C_TA4_PRIO /* Timer A4 interrupt priority */ +#undef M16C_TB0_PRIO /* Timer B0 interrupt priority */ +#undef M16C_TB1_PRIO /* Timer B1 interrupt priority */ +#undef M16C_TB2_PRIO /* Timer B2 interrupt priority */ +#undef M16C_INT0_PRIO /* INT0 interrupt priority */ +#undef M16C_INT1_PRIO /* INT1 interrupt priority */ + +/* LED definitions **********************************************************/ + + /* GREEN YELLOW RED */ +#define LED_STARTED 0 /* OFF OFF OFF */ +#define LED_HEAPALLOCATE 1 /* ON OFF OFF */ +#define LED_IRQSENABLED 2 /* OFF ON OFF */ +#define LED_STACKCREATED 3 /* ON ON OFF */ +#define LED_INIRQ 4 /* ON OFF ON */ +#define LED_SIGNAL 5 /* OFF ON ON */ +#define LED_ASSERTION 6 /* ON ON ON */ +#define LED_PANIC 7 /* NC** NC** ON* */ + +/* *=FLASHING **=if INIRQ, SIGNAL, or ASSERTION will be flashing */ + +/* BUTTON definitions **************************************************************/ + +#define SW1_PRESSED 0x01 /* Bit 0: 1=SW1 pressed */ +#define SW2_PRESSED 0x02 /* Bit 1: 1=SW2 pressed */ +#define SW3_PRESSED 0x04 /* Bit 2: 1=SW3 pressed */ + +/************************************************************************************ + * Inline Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#endif + +#endif /* __CONFIGS_SKP16C26_INCLUDE_BOARD_H */ diff --git a/configs/skp16c26/ostest/Make.defs b/configs/skp16c26/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..81b6f4b075b7055ee63f20756236289d49e4faea --- /dev/null +++ b/configs/skp16c26/ostest/Make.defs @@ -0,0 +1,86 @@ +############################################################################ +# configs/skp16c26/ostest/Make.defs +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +CROSSDEV = m32c-nuttx-elf- +CC = $(CROSSDEV)gcc +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -Os -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=m16c -fno-builtin +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/skp16c26/ostest/defconfig b/configs/skp16c26/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..da7c48a09d5d04c61c711d83cf15251039e82e88 --- /dev/null +++ b/configs/skp16c26/ostest/defconfig @@ -0,0 +1,585 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +CONFIG_MOTOROLA_SREC=y +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +CONFIG_ARCH_SH=y +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sh" +CONFIG_ARCH_CHIP="m16c" +# CONFIG_ARCH_CHIP_SH7032 is not set +CONFIG_ARCH_CHIP_M30262F8=y +CONFIG_ARCH_M16C=y +# CONFIG_M16C_UART0 is not set +# CONFIG_M16C_UART1 is not set +# CONFIG_M16C_UART2 is not set + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +CONFIG_ARCH_STACKDUMP=y +CONFIG_ENDIAN_BIG=y +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16945 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=128 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x00400 +CONFIG_RAM_SIZE=2048 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SKP16C26=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="skp16c26" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=20 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=8 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=256 +CONFIG_USERMAIN_STACKSIZE=256 +CONFIG_PTHREAD_STACK_MIN=64 +CONFIG_PTHREAD_STACK_DEFAULT=256 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +CONFIG_LCD_CONSOLE=y +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set + +# +# USART Configuration +# +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set +CONFIG_NX_LCDDRIVER=y + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=8192 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/skp16c26/ostest/ld.script b/configs/skp16c26/ostest/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..8ae1a8697d632eb6a293edd328fadaad21b72034 --- /dev/null +++ b/configs/skp16c26/ostest/ld.script @@ -0,0 +1,139 @@ +/**************************************************************************** + * configs/skp16c26/ostest/ld.script + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_ARCH(m32c) +ENTRY(_stext) +SECTIONS +{ + /* "Far" flash memory begins at address 0xf0000 for the M20262F8 part and + * ends at address 0xfffff (all parts). The program entry point is + * the first address in flash + */ + + . = 0xf0000; + .text : { + _stext = ABSOLUTE(.); + *(.text) + *(.fixup) + *(.gnu.warning) + *(.rodata) + *(.glue_7) + *(.glue_7t) + *(.got) /* Global offset table */ + _etext = ABSOLUTE(.); + } + + _enronly = ABSOLUTE(.); /* End of read-only values */ + /* .ndata will be relocated */ + /* from this address */ + + /* The "variable" vector table will be fixed at the following address */ + + . = 0xffd00; + .varvect : { + _svarvect = ABSOLUTE(.); + *(.varvect) + _evarvect = ABSOLUTE(.); + } + + /* Followed by the special page/fixed vector table. */ + + . = 0xffe00; + .specpg : { + _sspecpg = ABSOLUTE(.); + *(.specpg) + _especpg = ABSOLUTE(.); + } + + . = 0xfffdc; + .fixvect : { + _sfixvect = ABSOLUTE(.); + *(.fixvect) + _efixvect = ABSOLUTE(.); + } + + /* Internal "near" RAM begins at address 0x00400 (all parts) and ends at + * address 0x00bff (M20262F6 and M20262F8 parts). With the RAM + * region, used is .data followed by .bss. The remainder of RAM + * carved up by the start-up code into stacks and heaps. + */ + + . = 0x00400; + + .ndata : { + _sndata = ABSOLUTE(.); + *(.data) + CONSTRUCTORS + _endata = ABSOLUTE(.); + } + + .nbss : { /* BSS */ + _snbss = ABSOLUTE(.); + *(.bss) + *(COMMON) + _enbss = ABSOLUTE(.); + } + + /* "Far" RAM begins at 0x10000. The SKP16C26 has no far RAM */ + + . = 0x10000; + + .fdata : { + _sfdata = ABSOLUTE(.); + *(.fdata) + CONSTRUCTORS + _efdata = ABSOLUTE(.); + } + + .fbss : { /* BSS */ + _sfbss = ABSOLUTE(.); + *(.fbss) + *(COMMON) + _efbss = ABSOLUTE(.); + } + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/skp16c26/ostest/setenv.sh b/configs/skp16c26/ostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..a74258fb840a81229847409fbd98644c449a8808 --- /dev/null +++ b/configs/skp16c26/ostest/setenv.sh @@ -0,0 +1,46 @@ +#!/bin/bash +# configs/skp16c26/ostest/setenv.sh +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +WD=`pwd` +export BUILDROOT_BIN=${WD}/../buildroot/build_m32c/staging_dir/bin +export PATH=${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/skp16c26/src/.gitignore b/configs/skp16c26/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/skp16c26/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/skp16c26/src/Makefile b/configs/skp16c26/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..8b4f1312c696b35accef90eaa4c5edc5f1be9964 --- /dev/null +++ b/configs/skp16c26/src/Makefile @@ -0,0 +1,76 @@ +############################################################################ +# configs/skp16c26/src/Makefile +# +# Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +CFLAGS += -I$(TOPDIR)/sched + +ASRCS = +AOBJS = $(ASRCS:.S=$(OBJEXT)) +CSRCS = m16c_leds.c m16c_buttons.c m16c_lcd.c m16c_lcdconsole.c +COBJS = $(CSRCS:.c=$(OBJEXT)) + +SRCS = $(ASRCS) $(CSRCS) +OBJS = $(AOBJS) $(COBJS) + +ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src +CFLAGS += -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common + +all: libboard$(LIBEXT) + +$(AOBJS): %$(OBJEXT): %.S + $(call ASSEMBLE, $<, $@) + +$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +libboard$(LIBEXT): $(OBJS) + $(call ARCHIVE, $@, $(OBJS)) + +.depend: Makefile $(SRCS) + $(Q) $(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep + $(Q) touch $@ + +depend: .depend + +clean: + $(call DELFILE, libboard$(LIBEXT)) + $(call CLEAN) + +distclean: clean + $(call DELFILE, Make.dep) + $(call DELFILE, .depend) + +-include Make.dep diff --git a/configs/skp16c26/src/m16c_buttons.c b/configs/skp16c26/src/m16c_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..4841fefe82c09159b1ab2b3a035663616c4f0ffd --- /dev/null +++ b/configs/skp16c26/src/m16c_buttons.c @@ -0,0 +1,114 @@ +/**************************************************************************** + * configs/skp16c26/src/m16c_buttons.c + * + * Copyright (C) 2009, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* The SKP62C26 has 3 buttons control by bits 1, 2, and 3 in port 8. */ + +#define SW1_BIT (1 << 3) /* Bit 3, port 8 */ +#define SW2_BIT (1 << 2) /* Bit 2, port 8 */ +#define SW3_BIT (1 << 1) /* Bit 1, port 8 */ + +#define SW_PRESSED(p,b) (((p) & (b)) == 0) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_BUTTONS +void board_button_initialize(void) +{ + uint8_t regval; + + regval = getreg8(M16C_PD8); + regval |= (SW1_BIT | SW2_BIT | SW3_BIT); + putreg8(regval, M16C_PD8); +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t swset = 0; + uint8_t regval = getreg8(M16C_P8); + + if (SW_PRESSED(regval, SW1_BIT)) + { + swset |= SW1_PRESSED; + } + + if (SW_PRESSED(regval, SW2_BIT)) + { + swset |= SW2_PRESSED; + } + + if (SW_PRESSED(regval, SW3_BIT)) + { + swset |= SW3_PRESSED; + } + + return swset; +} +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/skp16c26/src/m16c_lcd.c b/configs/skp16c26/src/m16c_lcd.c new file mode 100644 index 0000000000000000000000000000000000000000..fdbf97606f57e333f7f086b32cb23205316257dd --- /dev/null +++ b/configs/skp16c26/src/m16c_lcd.c @@ -0,0 +1,283 @@ +/************************************************************************************ + * configs/scp16c26/src/m16c_lcd.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "chip.h" + +#ifdef CONFIG_LCD + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* LCD dimensions *******************************************************************/ + +#define LCD_NLINES 2 /* Two lines */ +#define LCD_NCHARS 8 /* Eight characters per line */ + +/* LCD commands *********************************************************************/ + +#define LCD_CLEAR 0x01 /* Clear LCD display and home cursor */ +#define CURSOR_MODE_DEC 0x04 /* Cursor auto decrement after R/W */ +#define CURSOR_MODE_INC 0x06 /* Cursor auto increment after R/W */ +#define LCD_CURSOR_ON 0x0e /* Display ON with Cursor */ +#define LCD_CURSOR_OFF 0x0c /* Display ON with Cursor off */ +#define LCD_CURSOR_BLINK 0x0d /* Display on with blinking cursor */ +#define LCD_CURSOR_LEFT 0x10 /* Move Cursor Left One Position */ +#define LCD_CURSOR_RIGHT 0x14 /* Move Cursor Right One Position */ +#define FUNCTION_SET 0x28 /* Setup, 4 bits,2 lines, 5X7 */ +#define LCD_CGRAM 0x40 /* Map characters to CG RAM */ +#define LCD_POS_L1(p) (0x80 | p) /* Move cursor to line 1, character p+1 */ +#define LCD_POS_L2(p) (0xc0 | p) /* Move cursor to line 2, character p+1 */ +#define LCD_HOME_L1 0x80 /* Move cursor to line 1 */ +#define LCD_HOME_L2 0xc0 /* Move cursor to line 2 */ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static uint8_t g_nchars; /* Number of characters in lines 2 */ +static uint8_t g_line[LCD_NCHARS]; /* The content of lines 2 */ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: up_lcddelay + ************************************************************************************/ + +static void up_lcddelay(uint16_t count) +{ + uint32_t counter = (uint16_t)count << 8; + while (counter--) + { + asm("\tnop\n\tnop\n\tnop\n" : :); /* 3 NOPs */ + } +} + +/************************************************************************************ + * Name: up_setrs + ************************************************************************************/ + +static inline void up_setrs(bool data) +{ + /* Set/clear bit 1 of port 6 */ + + register uint8_t regval = getreg8(M16C_P6); + if (data) + { + regval |= (1 << 0); /* High = data */ + } + else + { + regval &= ~(1 << 0); /* Low = control */ + } + + putreg8(regval, M16C_P6); +} + +/************************************************************************************ + * Name: up_seten + ************************************************************************************/ + +static inline void up_seten(void) +{ + /* Set bit 1 of port 6 */ + + register uint8_t regval = getreg8(M16C_P6); + regval |= (1 << 1); + putreg8(regval, M16C_P6); +} + +/************************************************************************************ + * Name: up_clren + ************************************************************************************/ + +static inline void up_clren(void) +{ + /* Clear bit 1 of port 6 */ + + register uint8_t regval = getreg8(M16C_P6); + regval &= ~(1 << 1); + putreg8(regval, M16C_P6); +} + +/************************************************************************************ + * Name: up_enpluse + ************************************************************************************/ + +static inline void up_enpulse(bool data) +{ + up_seten(); /* EN enable chip (HIGH) */ + up_lcddelay(0); /* Short delay */ + up_clren(); /* Latch data by setting EN low */ + up_lcddelay(0); /* Short delay for data writes */ + if (!data) up_lcddelay(0); /* Longer delay for control writes */ +} + +/************************************************************************************ + * Name: up_lcdwrite + ************************************************************************************/ + +void up_lcdwrite(bool data, uint8_t ch) +{ + up_setrs(data); /* Set RS appropriately */ + + /* Write upper nibble first. Only the lower 4 bits of P9 are valid. The upper four + * bits are reserved and must be zero. + */ + + putreg8(ch >> 4, M16C_P9); + up_enpulse(data); + + /* Write lower nibble second */ + + putreg8(ch & 0x0f, M16C_P9); + up_enpulse(data); +} + +/************************************************************************************ + * Name: up_scroll + ************************************************************************************/ + +static void up_scroll(void) +{ + int i; + + /* Clear the display and position the cursor at the beginning of line 1 */ + + up_lcdwrite(false, LCD_CLEAR); + up_lcdwrite(false, LCD_HOME_L1); + + /* Copy line 2 to line 1 */ + + for (i = 0; i < g_nchars; i++) + { + up_lcdwrite(true, g_line[i]); + } + + /* Position the cursor at the beginning of line 2 */ + + up_lcdwrite(false, LCD_HOME_L2); + g_nchars = 0; +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: up_lcdinit + ************************************************************************************/ + +void up_lcdinit(void) +{ + uint8_t regval; + + /* Enable writing to PD9 by selecting bit 2 in the protection register */ + + regval = getreg8(M16C_PRCR); + regval |= (1 << 2); + putreg8(regval, M16C_PRCR); + + /* We can't read PD9, so we can't OR the values in */ + + putreg8(0x0f, M16C_PD9); + + /* Set EN (port 6 bit 1) and Set RS (port 6 bit 0) as outputs */ + + regval = getreg8(M16C_P6); + regval |= (1 << 1) | (1 << 0); + putreg8(regval, M16C_P6); + + regval = getreg8(M16C_PD6); + regval |= (1 << 1) | (1 << 0); + putreg8(regval, M16C_PD6); + + /* Set EN low */ + + up_clren(); + + /* Write the reset sequence */ + + up_lcdwrite(false, 0x33); + up_lcddelay(20); + up_lcdwrite(false, 0x32); + up_lcddelay(20); + up_lcdwrite(false, FUNCTION_SET); /* reset sequence */ + up_lcdwrite(false, FUNCTION_SET); + up_lcdwrite(false, LCD_CURSOR_OFF); + up_lcdwrite(false, LCD_CLEAR); + up_lcdwrite(false, LCD_HOME_L1); +} + +/************************************************************************************ + * Name: up_lcdputc + ************************************************************************************/ + +void up_lcdputc(char ch) +{ + /* Check for new line */ + + if (ch == '\n') + { + up_scroll(); + } + + /* Should we wrap to truncate at the end of line??? Let's truncate. In either + * case, let's ignore all other non-printable characters. + */ + + else if (g_nchars < LCD_NCHARS && isprint(ch)) + { + up_lcdwrite(true, ch); + g_line[g_nchars] = ch; + g_nchars++; + } +} + +#endif /* CONFIG_LCD */ diff --git a/configs/skp16c26/src/m16c_lcdconsole.c b/configs/skp16c26/src/m16c_lcdconsole.c new file mode 100644 index 0000000000000000000000000000000000000000..3c3f98634e84ea10baee4ca9b6449324b40e0c26 --- /dev/null +++ b/configs/skp16c26/src/m16c_lcdconsole.c @@ -0,0 +1,141 @@ +/************************************************************************************ + * configs/scp16c26/src/m16c_lcdconsole.c + * + * Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include "up_internal.h" +#include "skp16c26.h" + +/* Only use the LCD as a console if there are is no serial console */ + +#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_M16C_UART0) +# define HAVE_SERIALCONSOLE 1 +#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_M16C_UART1) +# define HAVE_SERIALCONSOLE 1 +#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_M16C_UART2) +# define HAVE_SERIALCONSOLE 1 +#else +# undef HAVE_SERIALCONSOLE +#endif + +#if !defined(HAVE_SERIALCONSOLE) && defined(CONFIG_LCD) && defined(CONFIG_LCD_CONSOLE) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: up_earlyconsoleinit + * + * Description: + * Performs the low level UART initialization early in debug so that the serial + * console will be available during bootup. This must be called before + * up_consoleinit. + * + ************************************************************************************/ + +#ifdef USE_EARLYSERIALINIT +# warning "You probably need to define CONFIG_ARCH_LOWCONSOLE" +void up_earlyconsoleinit(void) +{ + /* There is probably a problem if we are here */ +} +#endif + +/************************************************************************************ + * Name: up_consoleinit + * + * Description: + * Register serial console and serial ports. This assumes that + * up_earlyconsoleinit was called previously. + * + ************************************************************************************/ + +#if USE_SERIALDRIVER +# warning "You probably need to define CONFIG_ARCH_LOWCONSOLE" +void up_consoleinit(void) +{ + /* There is probably a problem if we are here */ + + lowconsole_init(); +} +#endif + +/************************************************************************************ + * Name: up_lowputc + * + * Description: + * Output one character on the console + * + ************************************************************************************/ + +void up_lowputc(char ch) +{ + up_lcdputc(ch); +} + +/************************************************************************************ + * Name: up_putc + * + * Description: + * Output one character on the console + * + ************************************************************************************/ + +int up_putc(int ch) +{ + up_lcdputc(ch); + return ch; +} + +#endif /* !HAVE_SERIALCONSOLE && CONFIG_LCD && CONFIG_LCD_CONSOLE */ diff --git a/configs/skp16c26/src/m16c_leds.c b/configs/skp16c26/src/m16c_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..fd969b31416dcd9f3382ee72814be1486b3071ba --- /dev/null +++ b/configs/skp16c26/src/m16c_leds.c @@ -0,0 +1,250 @@ +/************************************************************************************ + * configs/scp16c26/src/m16c_leds.c + * + * Copyright (C) 2009, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "chip.h" + +#ifdef CONFIG_ARCH_LEDS + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* The SKP62C26 has 3 LEDs control by bits 0 and 2 in port 7 and bit 0 in port 8. */ + +#define GREEN_LED (1 << 2) /* Bit 2, port 7 */ +#define YELLOW_LED (1 << 4) /* Bit 4, port 7 */ +#define RED_LED (1 << 0) /* Bit 0, port 8 */ + +#define GREEN_LED_ON 0 +#define GREEN_LED_OFF GREEN_LED +#define GREEN_LED_MASK GREEN_LED +#define GREEN_LED_PORT M16C_P7 + +#define YELLOW_LED_ON 0 +#define YELLOW_LED_OFF YELLOW_LED +#define YELLOW_LED_MASK YELLOW_LED +#define YELLOW_LED_PORT M16C_P7 + +#define GREENYELLOW_LED_MASK (GREEN_LED_MASK|YELLOW_LED_MASK) +#define GREENYELLOW_LED_PORT M16C_P7 +#define GREENYELLOW_DIR_PORT M16C_PD7 + +#define RED_LED_ON 0 +#define RED_LED_OFF RED_LED +#define RED_LED_MASK RED_LED +#define RED_LED_PORT M16C_P8 +#define RED_DIR_PORT M16C_PD8 + +/************************************************************************************ + * Private Types + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static const uint8_t g_ledstate[7] = +{ + (GREEN_LED_OFF | YELLOW_LED_OFF | RED_LED_OFF), /* LED_STARTED */ + (GREEN_LED_ON | YELLOW_LED_OFF | RED_LED_OFF), /* LED_HEAPALLOCATE */ + (GREEN_LED_OFF | YELLOW_LED_ON | RED_LED_OFF), /* LED_IRQSENABLED */ + (GREEN_LED_ON | YELLOW_LED_ON | RED_LED_OFF), /* LED_STACKCREATED */ + + (GREEN_LED_ON | YELLOW_LED_OFF | RED_LED_ON ), /* LED_INIRQ */ + (GREEN_LED_OFF | YELLOW_LED_ON | RED_LED_ON ), /* LED_SIGNAL */ + (GREEN_LED_ON | YELLOW_LED_ON | RED_LED_ON ) /* LED_ASSERTION */ +}; + +static uint8_t g_prevled[3]; +static uint8_t g_nestlevel; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: m16c_setleds + ************************************************************************************/ + +static void m16c_setleds(uint8_t gybits, uint8_t rbit) +{ + uint8_t regval; + + regval = getreg8(GREENYELLOW_LED_PORT); + regval &= ~GREENYELLOW_LED_MASK; + regval |= gybits; + putreg8(regval, GREENYELLOW_LED_PORT); + + regval = getreg8(RED_LED_PORT); + regval &= ~RED_LED_MASK; + regval |= rbit; + putreg8(regval, RED_LED_PORT); +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_autoled_initialize + ************************************************************************************/ + +void board_autoled_initialize(void) +{ + register uint8_t regval; + + /* Make sure that the LEDs are in the OFF state */ + + regval = getreg8(GREENYELLOW_LED_PORT); + regval |= (GREEN_LED_OFF |YELLOW_LED_OFF); + putreg8(regval, GREENYELLOW_LED_PORT); + + regval = getreg8(RED_LED_PORT); + regval |= RED_LED_OFF; + putreg8(regval, RED_LED_PORT); + + /* Set the direction to output */ + + regval = getreg8(GREENYELLOW_DIR_PORT); + regval |= (GREEN_LED |YELLOW_LED); + putreg8(regval, GREENYELLOW_DIR_PORT); + + regval = getreg8(RED_DIR_PORT); + regval |= RED_LED; + putreg8(regval, RED_DIR_PORT); +} + +/************************************************************************************ + * Name: board_autoled_on + ************************************************************************************/ + +void board_autoled_on(int led) +{ + uint8_t ledset; + + /* If this is the ASSERTION led, preserve the Y&G bits from the last setting and + * set the RED LED on. + */ + + if (led == LED_ASSERTION) + { + ledset = g_ledstate[g_prevled[g_nestlevel]]; + m16c_setleds(ledset & GREENYELLOW_LED_MASK, RED_LED_ON); + } + else if (led < LED_ASSERTION) + { + /* Otherwise, just show the LEDs corresponding to this state */ + + ledset = g_ledstate[led]; + m16c_setleds(ledset & GREENYELLOW_LED_MASK, ledset & RED_LED_MASK); + + /* If this was a nested states (INIRQ, SIGNAL, or ASSERTION) then + * stack up the previous value. + */ + + if (led > LED_STACKCREATED) + { + g_nestlevel++; + } + g_prevled[g_nestlevel] = led; + } +} + +/************************************************************************************ + * Name: board_autoled_off + ************************************************************************************/ + +void board_autoled_off(int led) +{ + uint8_t ledset; + + /* If this is the ASSERTION led then what we do depends on the previous state */ + + if (led == LED_ASSERTION) + { + /* If the previous state was one of the nested states (INIRQ, SIGNAL, or ASSERTION), + * then turn the green and yellow LEDs all off. That way we can distinguish + * that case from the simple cases. + */ + + if (g_nestlevel > 0) + { + ledset = 0; + } + else + { + ledset = g_ledstate[g_prevled[0]]; + } + + m16c_setleds(ledset & GREENYELLOW_LED_MASK, RED_LED_OFF); + } + else if (led > 0 && led < LED_ASSERTION) + { + /* If this was one of the nested states, then we want to back to the LED setting + * before entering that nested statel. + */ + + if (g_nestlevel > 0) + { + g_nestlevel--; + led = g_prevled[g_nestlevel]; + } + else if (led > LED_STACKCREATED) + { + /* This shouldn't happen */ + + led--; + } + + ledset = g_ledstate[led]; + m16c_setleds(ledset & GREENYELLOW_LED_MASK, ledset & RED_LED_MASK); + g_prevled[g_nestlevel]= led; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/skp16c26/src/skp16c26.h b/configs/skp16c26/src/skp16c26.h new file mode 100644 index 0000000000000000000000000000000000000000..20fbaf23c0bbd1e83342ebab83189bd34b33d0ca --- /dev/null +++ b/configs/skp16c26/src/skp16c26.h @@ -0,0 +1,63 @@ +/************************************************************************************ + * configs/skp16c26/src/scp16c26.h + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SKP16C26_SRC_SKP16C26_H +#define __CONFIGS_SKP16C26_SRC_SKP16C26_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Inline Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#endif + +#endif /* __CONFIGS_SKP16C26_SRC_SKP16C26_H */ diff --git a/configs/spark/Kconfig b/configs/spark/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..cb73361c18ea52cd51962f44019e979d2d361c36 --- /dev/null +++ b/configs/spark/Kconfig @@ -0,0 +1,48 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SPARK + +config SPARK_FLASH + bool "MTD driver for onboard 2M FLASH" + default y + select MTD + select MTD_SST25 + select FS_FAT + select STM32_SPI2 + select MTD_BYTE_WRITE + ---help--- + Configures an MTD device for use with the onboard flash + +config SPARK_FLASH_SPI + int "Flash SPI bus number" + default 2 + depends on SPARK_FLASH + ---help--- + Selects the SPI bus number identying that SPI interface that + connects the Flash to the MCU. + +config SPARK_FLASH_MINOR + int "Minor number for the FLASH /dev/fat entry" + default 0 + depends on SPARK_FLASH + ---help--- + Sets the minor number for the FLASH MTD /dev entry + +config SPARK_FLASH_PART + bool "Enable partition support on FLASH" + default n + depends on SPARK_FLASH + ---help--- + Enables creation of partitions on the FLASH + +config SPARK_FLASH_PART_LIST + string "Flash partition size list" + default "512,1536" + depends on SPARK_FLASH_PART + ---help--- + Comma separated list of partition sizes in KB + +endif diff --git a/configs/spark/README.txt b/configs/spark/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..c870066b9a6f160a64a350c15754f6f78390830d --- /dev/null +++ b/configs/spark/README.txt @@ -0,0 +1,613 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the Spark Core board from Spark Devices (http://www.spark.io). This board features the STM32103CBT6 MCU from STMicro. + + + Microprocessor: 32-bit ARM Cortex M3 at 72MHz STM32F103CBT6 + Memory: 120 KB Flash and 20 KB SRAM, 2M serial Flash + I/O Pins Out: 37, 17 On the Connector + Network: TI CC3000 Wifi Module + ADCs: 9 (at 12-bit resolution) + Peripherals: 4 timers, 2 I2Cs, 2 SPI ports, 3 USARTs, 2 led's one Blue and one RGB. + Other: Sleep, stop, and standby modes; serial wire debug and JTAG interfaces + + During the development of the SparkCore, the hardware was in limited supply + As a work around David Sidrane created a SparkCore Big board + (http://nscdg.com/spark/sparkBB.png) that will interface with a maple mini + (http://leaflabs.com/docs/hardware/maple-mini.html), and a CC3000BOOST + (https://estore.ti.com/CC3000BOOST-CC3000-BoosterPack-P4258.aspx) + + It breaks out the Tx, Rx to connect to a FTDI TTL-232RG-VREG3V3-WE for the console and + wires in the spark LEDs and serial flash to the same I/O as the sparkcore. It has a Jlink + compatible Jtag connector on it. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - Hardware + - Core Pin out + - LEDs + - Buttons + - USARTS and Serial Consoles + - DFU and JTAG + - Spark -specific Configuration Options + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, or + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the CodeSourcery toolchain for Linux. + To use the Atollic, devkitARM, Raisonance GNU, or NuttX buildroot toolchain, + you simply need to add one of the following configuration options to your + .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=n : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=n : NuttX buildroot under Linux or Cygwin (default) + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Using Sourcery CodeBench from http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/overview + Download and install the latest version (as of this writting it was + sourceryg++-2013.05-64-arm-none-eabi) + + Import the project from git. + File->import->Git-URI, then import a Exiting code as a Makefile progject + from the working directory the git clone was done to. + + Select the Sourcery CodeBench for ARM EABI. N.B. You must do one command line + build, before the make will work in CodeBench. + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh stm32_tiny/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +DFU and JTAG +============ + + Enbling Support for the DFU Bootloader + -------------------------------------- + The linker files in these projects can be configured to indicate that you + will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU) + loader or via some JTAG emulator. You can specify the DFU bootloader by + adding the following line: + + CONFIG_STM32_DFU=y + + to your .config file. Most of the configurations in this directory are set + up to use the DFU loader. + + If CONFIG_STM32_DFU is defined, the code will not be positioned at the beginning + of FLASH (0x08000000) but will be offset to 0x08005000. This offset is needed + to make space for the DFU loader and 0x08005000 is where the DFU loader expects + to find new applications at boot time. If you need to change that origin for some + other bootloader, you will need to edit the file(s) ld.script.dfu for the + configuration. + + For Linux or Mac: + ---------------- + + While on Linux or Mac, we can use dfu-util to upload nuttx binary. + + 1. Make sure we have installed dfu-util. (From yum, apt-get or build from source.) + 2. Start the DFU loader (bootloader) on the Spark board. You do this by + resetting the board while holding the "Key" button. Windows should + recognize that the DFU loader has been installed. + 3. Flash the nuttx.bin to the board use dfu-util. Here's an example: + + $ dfu-util -a1 -d 1eaf:0003 -D nuttx.bin -R + + For anything not clear, we can refer to LeafLabs official document: + + http://leaflabs.com/docs/unix-toolchain.html + + For Windows: + ----------- + + The DFU SE PC-based software is available from the STMicro website, + http://www.st.com. General usage instructions: + + 1. Convert the NuttX Intel Hex file (nuttx.hex) into a special DFU + file (nuttx.dfu)... see below for details. + 2. Connect the M3 Wildfire board to your computer using a USB + cable. + 3. Start the DFU loader on the M3 Wildfire board. You do this by + resetting the board while holding the "Key" button. Windows should + recognize that the DFU loader has been installed. + 3. Run the DFU SE program to load nuttx.dfu into FLASH. + + What if the DFU loader is not in FLASH? The loader code is available + inside of the Demo dirctory of the USBLib ZIP file that can be downloaded + from the STMicro Website. You can build it using RIDE (or other toolchains); + you will need a JTAG emulator to burn it into FLASH the first time. + + In order to use STMicro's built-in DFU loader, you will have to get + the NuttX binary into a special format with a .dfu extension. The + DFU SE PC_based software installation includes a file "DFU File Manager" + conversion program that a file in Intel Hex format to the special DFU + format. When you successfully build NuttX, you will find a file called + nutt.hex in the top-level directory. That is the file that you should + provide to the DFU File Manager. You will end up with a file called + nuttx.dfu that you can use with the STMicro DFU SE program. + + Enabling JTAG + ------------- + If you are not using the DFU, then you will probably also need to enable + JTAG support. By default, all JTAG support is disabled but there NuttX + configuration options to enable JTAG in various different ways. + + These configurations effect the setting of the SWJ_CFG[2:0] bits in the AFIO + MAPR register. These bits are used to configure the SWJ and trace alternate function I/Os. + The SWJ (SerialWire JTAG) supports JTAG or SWD access to the Cortex debug port. + The default state in this port is for all JTAG support to be disable. + + CONFIG_STM32_JTAG_FULL_ENABLE - sets SWJ_CFG[2:0] to 000 which enables full + SWJ (JTAG-DP + SW-DP) + + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - sets SWJ_CFG[2:0] to 001 which enable + full SWJ (JTAG-DP + SW-DP) but without JNTRST. + + CONFIG_STM32_JTAG_SW_ENABLE - sets SWJ_CFG[2:0] to 010 which would set JTAG-DP + disabled and SW-DP enabled + + The default setting (none of the above defined) is SWJ_CFG[2:0] set to 100 + which disable JTAG-DP and SW-DP. + +Hardware +======== + + The Spark comprises a STM32F103CB 72 Mhz, 128 Flash, 20K Ram, with 37 IO Pins, and + a TI CC3000 Wifi Module. It has a 2MB serial flash, onboad regulation and 2 led's + one Blue and one RGB. + + During the development of the SparkCore, the hardware was in limited supply + As a work around david_s5 created a SparkCore Big board (http://nscdg.com/spark/sparkBB.png) + that will interface with a maple mini (http://leaflabs.com/docs/hardware/maple-mini.html), + and a CC3000BOOST (https://estore.ti.com/CC3000BOOST-CC3000-BoosterPack-P4258.aspx) + + It breaks out the Tx, Rx to connect to a FTDI TTL-232RG-VREG3V3-WE for the console and + wires in the spark LEDs and serial flash to the same I/O as the sparkcore. It has a Jlink + compatible Jtag connector on it. + +Core Pin out +============ + + There are 24 pis on the Spark Core module. + + Spark Spark Function STM32F103CBT6 + Name Pin # Pin # + -------- ------ ------------------------------------------------ --------------- + RAW JP1-1 Input Power N/A + GND JP1-2 GND + TX JP1-3 PA[02] USART2_TX/ADC12_IN2/TIM2_CH3 12 + RX JP1-4 PA[03] USART2_RX/ADC12_IN3/TIM2_CH4 13 + A7 JP1-5 PB[01] ADC12_IN9/TIM3_CH4 19 + A6 JP1-6 PB[00] ADC12_IN8/TIM3_CH3 18 + A5 JP1-7 PA[07] SPI1_MOSI/ADC12_IN7/TIM3_CH2 17 + A4 JP1-8 PA[06] SPI1_MISO/ADC12_IN6/TIM3_CH1 16 + A3 JP1-9 PA[05] SPI1_SCK/ADC12_IN5 15 + A2 JP1-10 PA[04] SPI1_NSS/USART2_CK/ADC12_IN4 14 + A1 JP1-11 PA[01] USART2_RTS/ADC12_IN1/TIM2_CH2 11 + A0 JP1-12 PA[00] WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR 10 + + +3V3 JP2-1 V3.3 Out of Core NA + RST JP2-2 NRST 7 + VDDA JP2-3 ADC Voltage 9 + GND JP2-4 GND + D7 JP2-5 PA[13] JTMS/SWDIO 34 Common with Blue LED LED_USR + D6 JP2-6 PA[14] JTCK/SWCLK 37 + D5 JP2-7 PA[15] JTDI 38 + D4 JP2-8 PB[03] JTDO 39 + D3 JP2-9 PB[04] NJTRST 40 + D2 JP2-10 PB[05] I2C1_SMBA 41 + D1 JP2-11 PB[06] I2C1_SCL/TIM4_CH1 42 + D0 JP2-12 PB[07] I2C1_SDA/TIM4_CH2 43 + +Core Internal IO +================ + + Spark Function STM32F103CBT6 + Name Pin # + -------- ------------------------------------------------ --------------- + BTN PB[02] BOOT1 20 + LED1,D7 PA[13] JTMS/SWDIO 34 + LED2 PA[08] USART1_CK/TIM1_CH1/MCO 29 + LED3 PA[09] USART1_TX/TIM1_CH2 30 + LED4 PA[10] USART1_RX/TIM1_CH3 31 + MEM_CS PB[09] TIM4_CH4 46 SST25VF016B Chip Select + SPI_CLK PB[13] SPI2_SCK/USART3_CTS/TIM1_CH1N 26 + SPI_MISO PB[14] SPI2_MISO/USART3_RTS/TIM1_CH2N 27 + SPI_MOSI PB[15] SPI2_MOSI/TIM1_CH3N 28 + USB_DISC PB[10] I2C2_SCL/USART3_TX 21 + WIFI_CS PB[12] SPI2_NSS/I2C2_SMBA/USART3_CK/TIM1_BKIN 25 CC3000 Chip Select + WIFI_EN PB[08] TIM4_CH3 45 CC3000 Module enable + WIFI_INT PB[11] I2C2_SDA/USART3_RX 22 CC3000 Host interface SPI interrupt + +Buttons and LEDs +================ + + Buttons + ------- + The Spark has two mechanical buttons. One button is the RESET button + connected to the STM32F103CB's reset line via /RST and the other is a + generic user configurable button labeled BTN and connected to GPIO + PB2/BOOT1. Since on the Spark, BOOT0 is tied to GND it is a moot point + that BTN signal is connected to the BOOT1 signal. When a button is + pressed it will drive the I/O line to GND. + + LEDs + ---- + There are 4 user-controllable LEDs in two packages on board the Spark board: + + Sigal Location Color GPIO Active + ------- ------------ ----------- ----- ----------- + LED1 LED_USR Blue LED PA13 High Common With D7 + LED2 LED_RGB Red LED PA8 Low + LED3 LED_RGB Blue LED PA9 Low + LED4 LED_RGB Green LED PA10 Low + + LED1 is connected to ground and can be illuminated by driving the PA13 + output high, it shares the Sparks D7 output. The LED2,LED3 and LED4 + are pulled high and can be illuminated by driving the corresponding GPIO output + to low. + + The RGB LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/up_leds.c. The LEDs are used to encode OS-related + events as follows: + + SYMBOL Meaning LED2 LED3 LED4 + red blue green Color + ------------------- ----------------------- ------- ------- ------ --------- + LED_STARTED NuttX has been started ON OFF OFF Red + LED_HEAPALLOCATE Heap has been allocated OFF ON OFF Blue + LED_IRQSENABLED Interrupts enabled ON OFF ON Orange + LED_STACKCREATED Idle stack created OFF OFF ON Green + LED_INIRQ In an interrupt** ON N/C N/C Orange Glow + LED_SIGNAL In a signal handler*** N/C ON N/C Blue Glow + LED_ASSERTION An assertion failed ON ON ON White + LED_PANIC The system has crashed ON N/C N/C Red Flashing + LED_IDLE STM32 is is sleep mode (Optional, not used) + + * If LED2, LED3, LED4 are statically on, then NuttX probably failed to boot + and these LEDs will give you some indication of where the failure was + ** The normal state is LED4 ON and LED2 faintly glowing. This faint glow + is because of timer interrupts that result in the LED being illuminated + on a small proportion of the time. + *** LED3 may also flicker normally if signals are processed. + +Serial Consoles +=============== + + USART2 + ----- + If you have a 3.3 V TTL to RS-232 convertor then this is the most convenient + serial console to use. UART2 is the default in all of these + configurations. + + USART2 RX PA3 JP1 pin 4 + USART2 TX PA2 JP1 pin 3 + GND JP1 pin 2 + V3.3 JP2 pin 1 + + Virtual COM Port + ---------------- + Yet another option is to use UART0 and the USB virtual COM port. This + option may be more convenient for long term development, but was + painful to use during board bring-up. + +Spark -specific Configuration Options +============== + WIP + +Configurations +============== + + Composite: The composite is a super set of all the functions in nsh, + usbserial, usbmsc. (usbnsh has not been rung out). + + Build it with + + make distclean;cd tools;./configure.sh spark/composite;cd .. + + then run make menuconfig if you wish to customize things. + + N.B. Memory is tight, both Flash and RAM are taxed. If you enable + debugging you will need to add -Os following the line -g in the line: + + ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g + + in the top level Make.degs or the code will not fit. + + Stack space has been hand optimized using the stack coloring by enabling + "Stack coloration" (CONFIG_STACK_COLORATION) in Build Setup-> Debug + Options. I have selected values that have 8-16 bytes of headroom with + network debugging on. If you enable more debugging and get a hard fault + or any weirdness like commands hanging. Then the Idle, main or Interrupt + stack my be too small. Stop the target and have a look a memory for a + blown stack: No DEADBEEF at the lowest address of a given stack. + + Given the RAM memory constraints it is not possible to be running the + network and USB CDC/ACM and MSC at the same time. But on the bright + side, you can export the FLASH memory to the PC. Write files on the + Flash. Reboot and mount the FAT FS and run network code that will have + access the files. + + You can use the scripts/cdc-acm.inf file to install the windows + composite device. + + SPI2 is enabled and support is included for the FAT file system on the + 16Mbit (2M) SST25 device and control of the CC3000 on the spark core. + + When the system boots, you should have a dev/mtdblock0 that can be + mounted using the command: + + mount -t vfat /dev/mtdblock0 /mnt/p0 + + or /dev/mtdblock0 can be exported as MSC on the USB interface along with + a Virtual serial port as a CDC/ACM interface. + + Use the command conn* and disconn to manage the USB interface. + + N.B. *If /dev/mtdblock0 is mounted then You must unmount it prior to + exporting it via the conn command. Bad things will happen if not. + + Network control is facilitated by running the c3b (cc3000basic) application. + + Run c3b from the nsh prompt. + + +-------------------------------------------+ + | Nuttx CC3000 Demo Program | + +-------------------------------------------+ + + 01 - Initialize the CC3000 + 02 - Show RX & TX buffer sizes, & free RAM + 03 - Start Smart Config + 04 - Manually connect to AP + 05 - Manually add connection profile + 06 - List access points + 07 - Show CC3000 information + 08 - Telnet + + Type 01-07 to select above option: + + Select 01. Then use 03 and the TI Smart config application running on an + IOS or Android device to configure join your network. + + Use 07 to see the IP address of the device. + + (On the next reboot running c3b 01 the CC3000 will automaticaly rejoin the + network after the 01 give it a few seconds and enter 07 or 08) + + Use 08 to start Telnet. Then you can connect to the device using the + address listed in command 07. + + qq will exit the c3b with the telnet deamon running (if started) + + Slow.... You will be thinking 300 bps. This is because of packet sizes and + how the select thread runs in the telnet session. Telnet is not the best + showcase for the CC3000, but simply a proof of network connectivity. + + http POST and GET should be more efficient. diff --git a/configs/spark/composite/Make.defs b/configs/spark/composite/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..5fd6bfd19e823835fa05dd7c46d8c50666f1c3f9 --- /dev/null +++ b/configs/spark/composite/Make.defs @@ -0,0 +1,115 @@ +############################################################################ +# configs/spark/composite/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/spark/composite/defconfig b/configs/spark/composite/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..eb394d185733970c978912676cab358ae6c2d7cd --- /dev/null +++ b/configs/spark/composite/defconfig @@ -0,0 +1,1278 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +CONFIG_ARCH_CHIP_STM32F103CB=y +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +CONFIG_STM32_CRC=y +CONFIG_STM32_DMA1=y +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI2=y +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_USART2_RXDMA is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ARCH_USBDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=340 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MAPLE is not set +CONFIG_ARCH_BOARD_SPARK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="spark" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_SPARK_FLASH=y +CONFIG_SPARK_FLASH_SPI=2 +CONFIG_SPARK_FLASH_MINOR=0 +# CONFIG_SPARK_FLASH_PART is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=2 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=2 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=7 +CONFIG_MAX_TASKS=12 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=5 +CONFIG_NFILE_STREAMS=5 +CONFIG_NAME_MAX=8 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=1 +CONFIG_MQ_MAXMSGSIZE=8 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=280 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=340 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +CONFIG_ANALOG=y +# CONFIG_ADC is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +CONFIG_MTD_PARTITION=y +# CONFIG_MTD_SECT512 is not set +CONFIG_MTD_BYTE_WRITE=y +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +CONFIG_MTD_SST25=y +CONFIG_SST25_SPIMODE=0 +CONFIG_SST25_SPIFREQUENCY=80000000 +# CONFIG_SST25_READONLY is not set +CONFIG_SST25_SECTOR512=y +# CONFIG_SST25_SLOWWRITE is not set +# CONFIG_SST25_SLOWREAD is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=32 +CONFIG_USART2_TXBUFSIZE=32 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +CONFIG_USBDEV_TRACE=y +CONFIG_USBDEV_TRACE_NRECORDS=32 +CONFIG_USBDEV_TRACE_STRINGS=y +# CONFIG_USBDEV_TRACE_INITIALIDSET is not set + +# +# USB Device Class Driver Options +# +CONFIG_USBDEV_COMPOSITE=y +CONFIG_COMPOSITE_IAD=y +CONFIG_COMPOSITE_EP0MAXPACKET=64 +CONFIG_COMPOSITE_VENDORID=0x03eb +CONFIG_COMPOSITE_VENDORSTR="NuttX" +CONFIG_COMPOSITE_PRODUCTID=0x2022 +CONFIG_COMPOSITE_PRODUCTSTR="Composite Device" +CONFIG_COMPOSITE_SERIALSTR="12345" +CONFIG_COMPOSITE_CONFIGSTR="system/composite" +CONFIG_COMPOSITE_VERSIONNO=0x1010 +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +CONFIG_CDCACM_COMPOSITE=y +CONFIG_CDCACM_IFNOBASE=0 +CONFIG_CDCACM_STRBASE=4 +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=64 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=64 +CONFIG_CDCACM_NWRREQS=2 +CONFIG_CDCACM_NRDREQS=2 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=96 +CONFIG_CDCACM_TXBUFSIZE=96 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +CONFIG_USBMSC=y +CONFIG_USBMSC_COMPOSITE=y +CONFIG_USBMSC_IFNOBASE=2 +CONFIG_USBMSC_STRBASE=4 +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=4 +CONFIG_USBMSC_EPBULKIN=5 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=64 +CONFIG_USBMSC_BULKOUTREQLEN=64 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="Mass Storage" +CONFIG_USBMSC_VERSIONNO=0x399 +# CONFIG_USBMSC_REMOVABLE is not set +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=340 +# CONFIG_USBHOST is not set +CONFIG_DRIVERS_WIRELESS=y +# CONFIG_WL_CC1101 is not set +CONFIG_WL_CC3000=y +# CONFIG_CC3000_MULTIPLE is not set +CONFIG_CC3000_SPIDEV=2 +CONFIG_CC3000_DEVMINOR=0 +CONFIG_CC3000_SPI_MODE=1 +CONFIG_CC3000_SPI_FREQUENCY=16000000 +CONFIG_CC3000_WORKER_STACKSIZE=240 +CONFIG_CC3000_SELECT_STACKSIZE=390 +CONFIG_CC3000_UNSOLICED_STACKSIZE=264 +# CONFIG_CC3000_PROBES is not set +# CONFIG_WL_NRF24L01 is not set +# CONFIG_WL_PN532 is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +CONFIG_CRYPTO=y +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ALGTEST is not set +# CONFIG_CRYPTO_CRYPTODEV is not set +CONFIG_CRYPTO_SW_AES=y + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +CONFIG_FS_NAMED_SEMAPHORES=y +CONFIG_FS_NAMED_SEMPATH="/var/lock" +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +CONFIG_FS_FATTIME=y +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=2 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=768 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=768 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=0 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=768 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +CONFIG_EXAMPLES_CC3000BASIC=y +# CONFIG_EXAMPLES_CC3000_MEM_CHECK is not set +# CONFIG_EXAMPLES_CC3000_STACK_CHECK is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MTDPART is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +# CONFIG_NSH_DISABLE_DELROUTE is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=0 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=128 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set + +# +# USB Device Trace Support +# +# CONFIG_NSH_USBDEV_TRACE is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +CONFIG_SYSTEM_COMPOSITE=y +CONFIG_SYSTEM_COMPOSITE_NLUNS=1 +CONFIG_SYSTEM_COMPOSITE_DEVMINOR1=0 +CONFIG_SYSTEM_COMPOSITE_DEVPATH1="/dev/mtdblock0" +CONFIG_SYSTEM_COMPOSITE_DEVMINOR2=1 +CONFIG_SYSTEM_COMPOSITE_DEVPATH2="/dev/mtdblock1" +CONFIG_SYSTEM_COMPOSITE_DEVMINOR3=2 +CONFIG_SYSTEM_COMPOSITE_DEVPATH3="/dev/mmcsd2" +CONFIG_SYSTEM_COMPOSITE_TTYUSB=0 +CONFIG_SYSTEM_COMPOSITE_SERDEV="/dev/ttyACM0" +CONFIG_SYSTEM_COMPOSITE_BUFSIZE=256 +# CONFIG_SYSTEM_COMPOSITE_TRACEINIT is not set +# CONFIG_SYSTEM_COMPOSITE_TRACECLASS is not set +# CONFIG_SYSTEM_COMPOSITE_TRACETRANSFERS is not set +# CONFIG_SYSTEM_COMPOSITE_TRACECONTROLLER is not set +# CONFIG_SYSTEM_COMPOSITE_TRACEINTERRUPTS is not set +# CONFIG_SYSTEM_COMPOSITE_DEBUGMM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_SYSTEM_USBMONITOR is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/spark/composite/setenv.sh b/configs/spark/composite/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..cda83fd1a94e9aafae163b9f71df0e73ee961d6d --- /dev/null +++ b/configs/spark/composite/setenv.sh @@ -0,0 +1,67 @@ +#!/bin/bash +# configs/spark/composite/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/spark/include/board.h b/configs/spark/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..197f53ebb84c9a033809536c9708d87cf9e6d242 --- /dev/null +++ b/configs/spark/include/board.h @@ -0,0 +1,247 @@ +/************************************************************************************ + * configs/spark/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SPARK_INCLUDE_BOARD_H +#define __CONFIGS_SPARK_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +#include + +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* On-board crystal frequency is 8MHz (HSE) */ + +#define STM32_BOARD_XTAL 8000000ul + +/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */ + +#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC +#define STM32_CFGR_PLLXTPRE 0 +#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx9 +#define STM32_PLL_FREQUENCY (9*STM32_BOARD_XTAL) + +/* Use the PLL and set the SYSCLK source to be the PLL */ + +#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL +#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY + +/* AHB clock (HCLK) is SYSCLK (72MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (72MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY + +/* APB2 timers 1 and 8 will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* USB divider -- Divide PLL clock by 1.5 */ + +#define STM32_CFGR_USBPRE 0 + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY + +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz + */ + +#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_SDXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 /* Tied to LED_USR */ +#define BOARD_LED2 1 /* Tied to LED_RGB RED */ +#define BOARD_LED3 2 /* Tied to LED_RGB BLUE */ +#define BOARD_LED4 3 /* Tied to LED_RGB GREEN */ +#define BOARD_NLEDS 4 + +#define BOARD_USR_LED_BLUE BOARD_LED1 +#define BOARD_RGB_LED_RED BOARD_LED3 +#define BOARD_RGB_LED_GREEN BOARD_LED4 +#define BOARD_RGB_LED_BLUE BOARD_LED2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_USR_LED_BIT (1 << BOARD_USR_LED_BLUE) +#define BOARD_RED_LED_BIT (1 << BOARD_RGB_LED_RED) +#define BOARD_BLUE_LED_BIT (1 << BOARD_RGB_LED_BLUE) +#define BOARD_GREEN_LED_BIT (1 << BOARD_RGB_LED_GREEN) + +#define LED_ACTIVE_LOW (BOARD_RED_LED_BIT|BOARD_BLUE_LED_BIT|BOARD_GREEN_LED_BIT) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the + * spark. The following definitions describe how NuttX controls the LEDs: + */ + + /* LED1 LED2 LED3 LED4 */ + /* blue red blue green Color */ +#define LED_STARTED 0 /* ------ ------ ------ ------ --------- */ +#define LED_HEAPALLOCATE 1 /* OFF ON OFF OFF Red */ +#define LED_IRQSENABLED 2 /* OFF OFF ON OFF Blue */ +#define LED_STACKCREATED 3 /* OFF ON OFF ON Orange */ +#define LED_INIRQ 4 /* N/C OFF OFF ON Green */ +#define LED_SIGNAL 5 /* N/C ON N/C N/C Red Glow */ +#define LED_ASSERTION 6 /* N/C N/C ON N/C Blue Glow */ +#define LED_PANIC 7 /* N/C ON ON ON White */ +#define LED_NUM_CODES 8 + +/* Button definitions ***************************************************************/ +/* The Spark supports two buttons; only one button is controllable by software: + * + * BTN: user and wake-up button connected to the I/O PB2/BOOT1 of the STM32F103CB. + * N.B. Since BOOT0 is tied to GND it is a moot point that BTN signal is connected + * to the BOOT1 signal. + * RESET: This pushbutton connected to NRST is used to RESET the STM32F103CB. + */ + +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 + +#define BUTTON_USER_BIT (1 << BUTTON_USER) +#define BUTTON_ACTIVE_LOW (BUTTON_USER_BIT) + + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SPARK_INCLUDE_BOARD_H */ diff --git a/configs/spark/nsh/Make.defs b/configs/spark/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..ba4d14904b043eb37c045c0aa8e5af57378c6a9e --- /dev/null +++ b/configs/spark/nsh/Make.defs @@ -0,0 +1,116 @@ +############################################################################ +# configs/spark/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/spark/nsh/defconfig b/configs/spark/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..a0a949c9b75666717773798ca645359ca9b29214 --- /dev/null +++ b/configs/spark/nsh/defconfig @@ -0,0 +1,1263 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +CONFIG_ARCH_CHIP_STM32F103CB=y +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +CONFIG_STM32_CRC=y +CONFIG_STM32_DMA1=y +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI2=y +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_USART2_RXDMA is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ARCH_USBDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=156 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MAPLE is not set +CONFIG_ARCH_BOARD_SPARK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="spark" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_SPARK_FLASH=y +CONFIG_SPARK_FLASH_SPI=2 +CONFIG_SPARK_FLASH_MINOR=0 +# CONFIG_SPARK_FLASH_PART is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=2 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=2 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=7 +CONFIG_MAX_TASKS=12 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=5 +CONFIG_NFILE_STREAMS=5 +CONFIG_NAME_MAX=8 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=1 +CONFIG_MQ_MAXMSGSIZE=8 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=300 +CONFIG_USERMAIN_STACKSIZE=880 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=464 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +CONFIG_ANALOG=y +# CONFIG_ADC is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +CONFIG_MTD_PARTITION=y +# CONFIG_MTD_SECT512 is not set +CONFIG_MTD_BYTE_WRITE=y +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +CONFIG_MTD_SST25=y +CONFIG_SST25_SPIMODE=0 +CONFIG_SST25_SPIFREQUENCY=80000000 +# CONFIG_SST25_READONLY is not set +CONFIG_SST25_SECTOR512=y +# CONFIG_SST25_SLOWWRITE is not set +# CONFIG_SST25_SLOWREAD is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=32 +CONFIG_USART2_TXBUFSIZE=32 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +CONFIG_USBDEV_TRACE=y +CONFIG_USBDEV_TRACE_NRECORDS=32 +# CONFIG_USBDEV_TRACE_STRINGS is not set +# CONFIG_USBDEV_TRACE_INITIALIDSET is not set + +# +# USB Device Class Driver Options +# +CONFIG_USBDEV_COMPOSITE=y +CONFIG_COMPOSITE_IAD=y +CONFIG_COMPOSITE_EP0MAXPACKET=64 +CONFIG_COMPOSITE_VENDORID=0x03eb +CONFIG_COMPOSITE_VENDORSTR="NuttX" +CONFIG_COMPOSITE_PRODUCTID=0x0000 +CONFIG_COMPOSITE_PRODUCTSTR="Composite device" +CONFIG_COMPOSITE_SERIALSTR="001" +CONFIG_COMPOSITE_CONFIGSTR="NuttX COMPOSITE config" +CONFIG_COMPOSITE_VERSIONNO=0x1010 +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +CONFIG_CDCACM_COMPOSITE=y +CONFIG_CDCACM_IFNOBASE=0 +CONFIG_CDCACM_STRBASE=4 +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=100 +CONFIG_CDCACM_RXBUFSIZE=100 +CONFIG_CDCACM_TXBUFSIZE=80 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +CONFIG_USBMSC=y +CONFIG_USBMSC_COMPOSITE=y +CONFIG_USBMSC_IFNOBASE=2 +CONFIG_USBMSC_STRBASE=4 +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=2 +CONFIG_USBMSC_EPBULKIN=3 +CONFIG_USBMSC_NWRREQS=4 +CONFIG_USBMSC_NRDREQS=4 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=256 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="Mass Storage" +CONFIG_USBMSC_VERSIONNO=0x399 +# CONFIG_USBMSC_REMOVABLE is not set +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=464 +# CONFIG_USBHOST is not set +CONFIG_DRIVERS_WIRELESS=y +# CONFIG_WL_CC1101 is not set +CONFIG_WL_CC3000=y +# CONFIG_CC3000_MULTIPLE is not set +CONFIG_CC3000_SPIDEV=2 +CONFIG_CC3000_DEVMINOR=0 +CONFIG_CC3000_SPI_MODE=1 +CONFIG_CC3000_SPI_FREQUENCY=16000000 +CONFIG_CC3000_WORKER_STACKSIZE=240 +CONFIG_CC3000_SELECT_STACKSIZE=368 +CONFIG_CC3000_UNSOLICED_STACKSIZE=264 +# CONFIG_CC3000_PROBES is not set +# CONFIG_WL_NRF24L01 is not set +# CONFIG_WL_PN532 is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +CONFIG_CRYPTO=y +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ALGTEST is not set +# CONFIG_CRYPTO_CRYPTODEV is not set +CONFIG_CRYPTO_SW_AES=y + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +CONFIG_FS_NAMED_SEMAPHORES=y +CONFIG_FS_NAMED_SEMPATH="/var/lock" +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +CONFIG_FS_FATTIME=y +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=2 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=0 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +CONFIG_EXAMPLES_CC3000BASIC=y +# CONFIG_EXAMPLES_CC3000_MEM_CHECK is not set +# CONFIG_EXAMPLES_CC3000_STACK_CHECK is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MTDPART is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=40 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +# CONFIG_NSH_DISABLE_DELROUTE is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=0 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=128 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +CONFIG_NSH_DISABLE_ITEF=y +CONFIG_NSH_DISABLE_LOOPS=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set + +# +# USB Device Trace Support +# +# CONFIG_NSH_USBDEV_TRACE is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_COMPOSITE is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_SYSTEM_USBMONITOR is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/spark/nsh/setenv.sh b/configs/spark/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..66aa9427f56dbb1c490065d4a6d0d24e75a1063e --- /dev/null +++ b/configs/spark/nsh/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/spark/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. + +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the Spark tools directory + +export TOOL_BIN="${WD}/configs/spark/tools" + +# Update the PATH variable + +export PATH="${BUILDROOT_BIN}:${TOOL_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/spark/scripts/cdc-acm.inf b/configs/spark/scripts/cdc-acm.inf new file mode 100644 index 0000000000000000000000000000000000000000..f348b810b5ccc9524f75b23503abd4ebde516c78 --- /dev/null +++ b/configs/spark/scripts/cdc-acm.inf @@ -0,0 +1,108 @@ +; Windows USB CDC ACM Setup File + +; Based on : https://www.kernel.org/doc/Documentation/usb/linux-cdc-acm.inf +; Based on INF template which was: +; Copyright (c) 2000 Microsoft Corporation +; Copyright (c) 2007 Microchip Technology Inc. +; likely to be covered by the MLPL as found at: +; . +; For use only on Windows operating systems. + +[Version] +Signature="$Windows NT$" +Class=Ports +ClassGuid={4D36E978-E325-11CE-BFC1-08002BE10318} +Provider=%Linux% +DriverVer=11/15/2007,5.1.2600.0 + +[Manufacturer] +%Linux%=DeviceList, NTamd64 + +[DestinationDirs] +DefaultDestDir=12 + + +;------------------------------------------------------------------------------ +; Windows 2000/XP/Vista-32bit Sections +;------------------------------------------------------------------------------ + +[DriverInstall.nt] +include=mdmcpq.inf +CopyFiles=DriverCopyFiles.nt +AddReg=DriverInstall.nt.AddReg + +[DriverCopyFiles.nt] +usbser.sys,,,0x20 + +[DriverInstall.nt.AddReg] +HKR,,DevLoader,,*ntkern +HKR,,NTMPDriver,,USBSER.sys +HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" + +[DriverInstall.nt.Services] +AddService=usbser, 0x00000002, DriverService.nt + +[DriverService.nt] +DisplayName=%SERVICE% +ServiceType=1 +StartType=3 +ErrorControl=1 +ServiceBinary=%12%\USBSER.sys + +;------------------------------------------------------------------------------ +; Vista-64bit Sections +;------------------------------------------------------------------------------ + +[DriverInstall.NTamd64] +include=mdmcpq.inf +CopyFiles=DriverCopyFiles.NTamd64 +AddReg=DriverInstall.NTamd64.AddReg + +[DriverCopyFiles.NTamd64] +USBSER.sys,,,0x20 + +[DriverInstall.NTamd64.AddReg] +HKR,,DevLoader,,*ntkern +HKR,,NTMPDriver,,USBSER.sys +HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" + +[DriverInstall.NTamd64.Services] +AddService=usbser, 0x00000002, DriverService.NTamd64 + +[DriverService.NTamd64] +DisplayName=%SERVICE% +ServiceType=1 +StartType=3 +ErrorControl=1 +ServiceBinary=%12%\USBSER.sys + + +;------------------------------------------------------------------------------ +; Vendor and Product ID Definitions +;------------------------------------------------------------------------------ +; When developing your USB device, the VID and PID used in the PC side +; application program and the firmware on the microcontroller must match. +; Modify the below line to use your VID and PID. Use the format as shown +; below. +; Note: One INF file can be used for multiple devices with different +; VID and PIDs. For each supported device, append +; ",USB\VID_xxxx&PID_yyyy" to the end of the line. +;------------------------------------------------------------------------------ +[SourceDisksFiles] +[SourceDisksNames] +[DeviceList] +%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_03EB&PID_2022&MI_00 + +[DeviceList.NTamd64] +%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_03EB&PID_2022&MI_00 + + +;------------------------------------------------------------------------------ +; String Definitions +;------------------------------------------------------------------------------ +;Modify these strings to customize your device +;------------------------------------------------------------------------------ +[Strings] +Linux = "Nutts Developer Community" +DESCRIPTION = "Nuttx CDC/ACM" +SERVICE = "Nuttx CDC/ACM Driver" diff --git a/configs/spark/scripts/ld.script b/configs/spark/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..1ae9912a2ceaab5475fa4989cb7ae99b0cafdb9c --- /dev/null +++ b/configs/spark/scripts/ld.script @@ -0,0 +1,119 @@ +/**************************************************************************** + * configs/spark/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F103xB has 128Kb of FLASH beginning at address 0x0800:0000 and + * 20Kb of SRAM beginning at address 0x2000:0000. When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F103VCT6 has 48Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/spark/scripts/ld.script.dfu b/configs/spark/scripts/ld.script.dfu new file mode 100644 index 0000000000000000000000000000000000000000..48f7e7d2917eb7f9785ad93cb54b84e3421183c3 --- /dev/null +++ b/configs/spark/scripts/ld.script.dfu @@ -0,0 +1,119 @@ +/**************************************************************************** + * configs/spark/scripts/ld.script.dfu + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F103xB has 128Kb of FLASH beginning at address 0x0800:0000 and + * 20Kb of SRAM beginning at address 0x2000:0000. Here we assume that the + * spark's DFU bootloader is being used. In that case, the correct + * load .text load address is 0x0800:5000 (leaving 108Kb). + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08005000, LENGTH = 108K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F103VCT6 has 48Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/spark/src/Makefile b/configs/spark/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..5a375120db3b52064517ac3bd5799afda20392fc --- /dev/null +++ b/configs/spark/src/Makefile @@ -0,0 +1,80 @@ +############################################################################ +# configs/spark/src/Makefile +# +# Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Librae +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_USBDEV),y) +CSRCS += stm32_usbdev.c +endif + +ifeq ($(CONFIG_BOARDCTL_USBDEVCTRL),y) +CSRCS += stm32_usbmsc.c +endif + +ifeq ($(CONFIG_USBDEV_COMPOSITE),y) +CSRCS += stm32_composite.c +endif + +ifeq ($(CONFIG_WL_CC3000),y) +CSRCS += stm32_wireless.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += stm32_watchdog.c +endif + +ifeq ($(CONFIG_CC3000_PROBES),) +CSRCS += stm32_io.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/spark/src/spark.h b/configs/spark/src/spark.h new file mode 100644 index 0000000000000000000000000000000000000000..4eb5ed6a840f4a2d57c2c771d3f46c1690150d3e --- /dev/null +++ b/configs/spark/src/spark.h @@ -0,0 +1,269 @@ +/************************************************************************************ + * configs/spark/src/spark.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Laurent Latil + * Librae + * David_s5 + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_SPARK_SRC_SPARK_H +#define __CONFIGS_SPARK_SRC_SPARK_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* During the development of the SparkCore, the hardware was in limited supply + * As a work around david_s5 created a SparkCore Big board (http://nscdg.com/spark/sparkBB.png) + * that will interface with a maple mini (http://leaflabs.com/docs/hardware/maple-mini.html), + * and a CC3000BOOST (https://estore.ti.com/CC3000BOOST-CC3000-BoosterPack-P4258.aspx) + * + * It breaks out the Tx, Rx to connect to a FTDI TTL-232RG-VREG3V3-WE for the console and + * wires in the spark LEDs and serial flash to the same I/O as the sparkcore. It has a Jlink + * compatible Jtag connector on it. + * + * + * Board GPIO Usage: + * + * GPIO Function MPU Core Core Maple Maple + * Pin # Name Pin # Name Pin # + * ----- -------------------------------- -------------------------------------------------------- + * PA[00] WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR 10 A0 JP1-12 J1-8 + * PA[01] USART2_RTS/ADC12_IN1/TIM2_CH2 11 A1 JP1-11 J1-9 + * PA[02] USART2_TX/ADC12_IN2/TIM2_CH3 12 TX JP1-3 J1-10 + * PA[03] USART2_RX/ADC12_IN3/TIM2_CH4 13 RX JP1-4 J1-11 + * PA[04] SPI1_NSS/USART2_CK/ADC12_IN4 14 A2 JP1-10 J1-12 + * PA[05] SPI1_SCK/ADC12_IN5 15 A3 JP1-9 J1-13 + * PA[06] SPI1_MISO/ADC12_IN6/TIM3_CH1 16 A4 JP1-8 J1-14 + * PA[07] SPI1_MOSI/ADC12_IN7/TIM3_CH2 17 A5 JP1-7 J1-15 + * PA[08] USART1_CK/TIM1_CH1/MCO 29 LED2 J2-5 + * PA[09] USART1_TX/TIM1_CH2 30 LED3 J2-6 + * PA[10] USART1_RX/TIM1_CH3 31 LED4 J2-7 + * PA[11] USART1_CTS/CAN_RX/TIM1_CH4/USBDM 32 USBM USBDM J2-8 + * PA[12] USART1_RTS/CAN_TX/TIM1_ETR/USBDP 33 USBP USBDP J2-9 + * PA[13] JTMS/SWDIO 34 D7,LED1 JP2-5 J2-10 + * PA[14] JTCK/SWCLK 37 D6 JP2-6 J2-11 + * PA[15] JTDI 38 D5 JP2-7 J2-12 + * + * PB[00] ADC12_IN8/TIM3_CH3 18 A6 JP1-6 J1-16 + * PB[01] ADC12_IN9/TIM3_CH4 19 A7 JP1-5 R1-LED + * PB[02] BOOT1 20 BTN BTN J1-17 + * PB[03] JTDO 39 D4 JP2-8 J2-13 + * PB[04] NJTRST 40 D3 JP2-9 J2-14 + * PB[05] I2C1_SMBA 41 D2 JP2-10 J2-15 + * PB[06] I2C1_SCL/TIM4_CH1 42 D1 JP2-11 J2-16 + * PB[07] I2C1_SDA/TIM4_CH2 43 D0 JP2-12 J2-17 + * PB[08] TIM4_CH3 45 WIFI_EN BOOT0 J2-18 + * PB[09] TIM4_CH4 46 MEM_CS DISC + * PB[10] I2C2_SCL/USART3_TX 21 USB_DISC J1-18 + * PB[11] I2C2_SDA/USART3_RX 22 WIFI_INT J1-19 + * PB[12] SPI2_NSS/I2C2_SMBA/USART3_CK/TIM1_BKIN 25 WIFI_CS J2-1 + * PB[13] SPI2_SCK/USART3_CTS/TIM1_CH1N 26 SPI_CLK J2-2 + * PB[14] SPI2_MISO/USART3_RTS/TIM1_CH2N 27 SPI_MISO J2-3 + * PB[15] SPI2_MOSI/TIM1_CH3N 28 SPI_MOSI J2-4 + * + * PC[13] TAMPER-RTC 2 N.C. J1-4 + * PC[14] OSC32_IN 3 OSC32_IN Y1 N.C. + * PC[15] OSC32_OUT 4 OSC32_OUT Y1 N.C. + * + * PD[00] OSC_IN 5 OSC_IN Y2 8MHZ OSC 8MHZ OSC + * PD[01] OSC_OUT 6 OSC_OUT Y2 8MHZ OSC 8MHZ OSC + * + * Spark Core pin Mapping + * + * GPIO ADC Timer I2C UART SPI JTAG Other 5V? STM Pin# Core HW Core SW + * PA0 CH0 2_CH1_ETR 2_CTS 10 A0 10 + * PA1 CH1 2_CH2 2_RTS 11 A1 11 + * PA2 CH2 2_CH3 2_TX 12 TX 19 + * PA3 CH3 2_CH4 2_RX 13 RX 18 + * PA4 CH4 2_CK 1_NSS 14 A2 12 + * PA5 CH5 1_SCK 15 A3 13 + * PA6 CH6 3_CH1 1_MISO 16 A4 14 + * PA7 CH7 3_CH2 1_MOSI 17 A5 15 + * PA8 1_CH1 1_CK MCO Yes 29 LED2 + * PA9 1_CH2 1_TX Yes 30 LED3 + * PA10 1_CH3 1_RX Yes 31 LED4 + * PA11 1_CH4 1_CTS USB- Yes 32 USBM + * PA12 1_ETR 1_RTS USB+ Yes 33 USBP + * PA13 JTMS Yes 34 D7 7 + * PA14 JTCK Yes 37 D6 6 + * PA15 JTDI Yes 38 D5 5 + * + * PB0 CH8 3_CH3 18 A6 16 + * PB1 CH9 3_CH4 19 A7 17 + * PB2 BOOT1 Yes 20 BTN + * PB3 JTDO Yes 39 D4 4 + * PB4 NJTRST Yes 40 D3 3 + * PB5 1_SMBA 41 D2 2 + * PB6 4_CH1 1_SCL Yes 42 D1 1 + * PB7 4_CH2 1_SDA Yes 43 D0 0 + * PB8 4_CH3 Yes 45 WIFI_EN + * PB9 4_CH4 Yes 46 MEM_CS + * PB10 2_SCL 3_TX Yes 21 USB_DISC + * PB11 2_SDA 3_RX Yes 22 WIFI_INT + * PB12 1_BKIN 2_SMBA 3_CK 2_NSS Yes 25 WIFI_CS + * PB13 3_CTS 2_SCK Yes 26 SPI_SCK + * PB14 3_RTS 2_MISO Yes 27 SPI_MISO + * PB15 2_MOSI Yes 28 SPI_MOSI + * + * PC13 2 + * PC14 RTC Oscillator 3 OSC32IN + * PC15 RTC Oscillator 4 OSC32OUT + * + * PD0 Oscillator <= 5 OSC + * PD1 Oscillator => 6 OSC + */ + +/* How many SPI modules does this chip support? The LM3S6918 supports 2 SPI + * modules (others may support more -- in such case, the following must be + * expanded). + */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +#endif + +/* LEDs *****************************************************************************/ +/* + * GPIO Function MPU Core Core Maple Maple + * Pin # Name Pin # Name Pin # + * ----- -------------------------------- -------------------------------------------------------- + * + * PA[08] USART1_CK/TIM1_CH1/MCO 29 LED2 J2-5 + * PA[09] USART1_TX/TIM1_CH2 30 LED3 J2-6 + * PA[10] USART1_RX/TIM1_CH3 31 LED4 J2-7 + * PA[13] JTMS/SWDIO 34 D7,LED1 JP2-5 J2-10 + */ + +#define GPIO_LED1 (GPIO_PORTA | GPIO_PIN13 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) +#define GPIO_LED_USR GPIO_LED1 +#define GPIO_LED2 (GPIO_PORTA | GPIO_PIN8 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) +#define GPIO_LED3 (GPIO_PORTA | GPIO_PIN9 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) +#define GPIO_LED4 (GPIO_PORTA | GPIO_PIN10 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) + +#define GPIO_USB_PULLUP (GPIO_PORTB | GPIO_PIN10 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) + +/* BUTTON ***************************************************************************/ +/* + * GPIO Function MPU Core Core Maple Maple + * Pin # Name Pin # Name Pin # + * ----- -------------------------------- -------------------------------------------------------- + * PB[02] BOOT1 20 BTN BTN J1-17 + */ +#define IRQBUTTON BUTTON_USER + +#define GPIO_BTN (GPIO_PORTB | GPIO_PIN2 | GPIO_INPUT | GPIO_CNF_INPULLUP | GPIO_EXTI) + + +/* MEMORYs **************************************************************************/ +/* + * GPIO Function MPU Core Core Maple Maple + * Pin # Name Pin # Name Pin # + * ----- -------------------------------- -------------------------------------------------------- + * PB[09] TIM4_CH4 46 MEM_CS DISC +*/ + +#define GPIO_MEM_CS (GPIO_PORTB | GPIO_PIN9 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) + +/* CCS3000 **************************************************************************/ +/* + * GPIO Function MPU Core Core Maple Maple + * Pin # Name Pin # Name Pin # + * ----- -------------------------------- -------------------------------------------------------- + * PB[08] TIM4_CH3 45 WIFI_EN BOOT0 J2-18 + * PB[11] I2C2_SDA/USART3_RX 22 WIFI_INT J1-19 + * PB[12] SPI2_NSS/I2C2_SMBA/USART3_CK/TIM1_BKIN 25 WIFI_CS J2-1 +*/ + +#define GPIO_WIFI_EN (GPIO_PORTB | GPIO_PIN8 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) +#define GPIO_WIFI_CS (GPIO_PORTB | GPIO_PIN12 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) + +#define GPIO_WIFI_INT (GPIO_PORTB | GPIO_PIN11 | GPIO_INPUT | GPIO_CNF_INPULLUP | GPIO_EXTI) + +#if defined(CONFIG_CC3000_PROBES) +#define GPIO_D0 (GPIO_PORTB | GPIO_PIN7 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) +#define GPIO_D1 (GPIO_PORTB | GPIO_PIN6 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) +#else +#define GPIO_D0 (GPIO_PORTB | GPIO_PIN7 | GPIO_INPUT | GPIO_CNF_INPULLUP | GPIO_EXTI) +#define GPIO_D1 (GPIO_PORTB | GPIO_PIN6 | GPIO_INPUT | GPIO_CNF_INPULLUP | GPIO_EXTI) +#define GPIO_D2 (GPIO_PORTB | GPIO_PIN5 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) +#define GPIO_A0 (GPIO_PORTA | GPIO_PIN0 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) +#define GPIO_A1 (GPIO_PORTA | GPIO_PIN1 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz) +#define GPIO_A2 (GPIO_PORTA | GPIO_PIN4 | GPIO_INPUT | GPIO_CNF_INPULLUP ) +#define GPIO_A3 (GPIO_PORTA | GPIO_PIN5 | GPIO_INPUT | GPIO_CNF_INPULLUP ) +#endif +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins. + * + ************************************************************************************/ + +void stm32_spidev_initialize(void); + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins. + * + ************************************************************************************/ + +void stm32_usbinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SPARK_SRC_SPARK_H */ diff --git a/configs/spark/src/stm32_appinit.c b/configs/spark/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..9b2d965a31ce5d8576d14921555e78f6767cfb6d --- /dev/null +++ b/configs/spark/src/stm32_appinit.c @@ -0,0 +1,301 @@ +/**************************************************************************** + * config/spark/src/stm32_appinit.c + * + * Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * David_s5 + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#ifdef CONFIG_MTD_SST25 +# include +# include +# include +#endif + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#ifdef CONFIG_USBDEV +# include "stm32_usbdev.h" +#endif + +#include "stm32.h" +#include "spark.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* Can't support the SST25 device if it SPI2 or SST25 support is not enabled */ + +#define HAVE_SST25 1 +#if !defined(CONFIG_STM32_SPI2) || !defined(CONFIG_MTD_SST25) +# undef HAVE_SST25 +#endif + +/* Can't support SST25 features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef HAVE_SST25 +#endif + +#ifndef CONFIG_SPARK_FLASH_MOUNT_POINT +# define CONFIG_SPARK_FLASH_MOUNT_POINT "/mnt/p%d" +#endif + +/* Use minor device number 0 is not is provided */ + +#ifndef CONFIG_SPARK_FLASH_MINOR +# define CONFIG_SPARK_FLASH_MINOR 0 +#endif + +/* Can't support both FAT and NXFFS */ + +#if defined(CONFIG_FS_FAT) && defined(CONFIG_FS_NXFFS) +# warning "Can't support both FAT and NXFFS -- using FAT" +#endif + +#define HAVE_USBDEV 1 +#define HAVE_USBMONITOR 1 + +/* Can't support USB device is USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +# undef HAVE_USBMONITOR +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR) +# undef HAVE_USBMONITOR +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static bool g_app_initialzed; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + /* Check if already initialized */ + + if (g_app_initialzed) + { + return OK; + } + +#ifdef HAVE_SST25 + { + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; + int ret; + + /* Configure SPI-based devices */ + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", + CONFIG_SPARK_FLASH_SPI); + + spi = stm32_spibus_initialize(CONFIG_SPARK_FLASH_SPI); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + CONFIG_SPARK_FLASH_SPI); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + CONFIG_SPARK_FLASH_SPI); + + /* Now bind the SPI interface to the SST25 SPI FLASH driver */ + + syslog(LOG_INFO, "Bind SPI to the SPI flash driver\n"); + + mtd = sst25_initialize(spi); + if (!mtd) + { + syslog(LOG_ERR, "ERROR: Failed to bind SPI port %d to the SPI FLASH driver\n", + CONFIG_SPARK_FLASH_SPI); + } + else + { + syslog(LOG_INFO, "Successfully bound SPI port %d to the SPI FLASH driver\n", + CONFIG_SPARK_FLASH_SPI); + } + +#ifndef CONFIG_SPARK_FLASH_PART + + /* Use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(CONFIG_SPARK_FLASH_MINOR, mtd); + if (ret < 0) + { + fdbg("ERROR: Initialize the FTL layer\n"); + return ret; + } + +#ifdef CONFIG_SPARK_MOUNT_FLASH + { + char partname[16]; + char mntpoint[16]; + + /* mount -t vfat /dev/mtdblock0 /mnt/p0 */ + + snprintf(partname, sizeof(partname), "/dev/mtdblock%d", + CONFIG_SPARK_FLASH_MINOR); + snprintf(mntpoint, sizeof(mntpoint)-1, CONFIG_SPARK_FLASH_MOUNT_POINT, + CONFIG_SPARK_FLASH_MINOR); + + /* Mount the file system at /mnt/pn */ + + ret = mount(partname, mntpoint, "vfat", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the FAT volume: %d\n", errno); + return ret; + } + } +#endif +#else + { + int partno; + int partsize; + int partoffset; + const char *partstring = CONFIG_SPARK_FLASH_PART_LIST; + const char *ptr; + FAR struct mtd_dev_s *mtd_part; + char partname[16]; + char mntpoint[16]; + + /* Now create a partition on the FLASH device */ + + partno = CONFIG_SPARK_FLASH_MINOR; + ptr = partstring; + partoffset = 0; + while (*ptr != '\0') + { + /* Get the partition size */ + + partsize = atoi(ptr); + mtd_part = mtd_partition(mtd, partoffset, (partsize >> 2) * 16); + partoffset += (partsize >> 2) * 16; + + /* Use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(partno, mtd_part); + if (ret < 0) + { + fdbg("ERROR: Initialize the FTL layer\n"); + return ret; + } + + snprintf(partname,sizeof(partname), "/dev/mtdblock%d", partno); + snprintf(mntpoint,sizeof(mntpoint)-1, CONFIG_SPARK_FLASH_MOUNT_POINT, + partno); + + /* Mount the file system at /mnt/pn */ + + ret = mount(partname, mntpoint, "vfat", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the FAT volume: %d\n", errno); + return ret; + } + + /* Update the pointer to point to the next size in the list */ + + while ((*ptr >= '0') && (*ptr <= '9')) + { + ptr++; + } + + if (*ptr == ',') + { + ptr++; + } + + /* Increment the part number */ + + partno++; + } + } +#endif /* CONFIG_SPARK_FLASH_PART */ + } +#endif /* HAVE_SST25 */ + +#ifdef HAVE_USBMONITOR + { + int ret; + + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret); + } + } +#endif + + g_app_initialzed = true; + return OK; +} diff --git a/configs/spark/src/stm32_autoleds.c b/configs/spark/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..e195ae1b940b81078e53fabb3d0b22bf797d3868 --- /dev/null +++ b/configs/spark/src/stm32_autoleds.c @@ -0,0 +1,299 @@ +/**************************************************************************** + * configs/spark/src/stm32_autoleds.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "spark.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* The following definitions map the encoded LED setting to bit sets used to + * manipulate the LEDs. All terms are in true logic, the led polarity is dealt + * with in the phy_xxx operations + */ + +#define ON_SETBITS_SHIFT (0) +#define ON_CLRBITS_SHIFT (4) +#define OFF_SETBITS_SHIFT (8) +#define OFF_CLRBITS_SHIFT (12) + +#define ON_BITS(v) ((v) & 0xff) +#define OFF_BITS(v) (((v) >> 8) & 0x0ff) +#define SETBITS(b) ((b) & 0x0f) +#define CLRBITS(b) (((b) >> 4) & 0x0f) + +#define ON_SETBITS(v) (SETBITS(ON_BITS(v)) +#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v)) +#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v)) +#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v)) + +#define LED_STARTED_ON_SETBITS ((BOARD_RED_LED_BIT) << ON_SETBITS_SHIFT) +#define LED_STARTED_ON_CLRBITS ((BOARD_GREEN_LED_BIT|BOARD_BLUE_LED_BIT|BOARD_USR_LED_BIT) << ON_CLRBITS_SHIFT) +#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT) +#define LED_STARTED_OFF_CLRBITS ((BOARD_RED_LED_BIT|BOARD_GREEN_LED_BIT|BOARD_BLUE_LED_BIT|BOARD_USR_LED_BIT) << OFF_CLRBITS_SHIFT) + +#define LED_HEAPALLOCATE_ON_SETBITS ((BOARD_BLUE_LED_BIT) << ON_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_ON_CLRBITS ((BOARD_RED_LED_BIT|BOARD_GREEN_LED_BIT|BOARD_USR_LED_BIT) << ON_CLRBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_SETBITS ((BOARD_RED_LED_BIT) << OFF_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_CLRBITS ((BOARD_GREEN_LED_BIT|BOARD_BLUE_LED_BIT|BOARD_USR_LED_BIT) << OFF_CLRBITS_SHIFT) + +#define LED_IRQSENABLED_ON_SETBITS ((BOARD_RED_LED_BIT|BOARD_GREEN_LED_BIT) << ON_SETBITS_SHIFT) +#define LED_IRQSENABLED_ON_CLRBITS ((BOARD_BLUE_LED_BIT|BOARD_USR_LED_BIT) << ON_CLRBITS_SHIFT) +#define LED_IRQSENABLED_OFF_SETBITS ((BOARD_BLUE_LED_BIT) << OFF_SETBITS_SHIFT) +#define LED_IRQSENABLED_OFF_CLRBITS ((BOARD_RED_LED_BIT|BOARD_GREEN_LED_BIT|BOARD_USR_LED_BIT) << OFF_CLRBITS_SHIFT) + +#define LED_STACKCREATED_ON_SETBITS ((BOARD_GREEN_LED_BIT) << ON_SETBITS_SHIFT) +#define LED_STACKCREATED_ON_CLRBITS ((BOARD_RED_LED_BIT|BOARD_BLUE_LED_BIT|BOARD_USR_LED_BIT) << ON_CLRBITS_SHIFT) +#define LED_STACKCREATED_OFF_SETBITS ((BOARD_RED_LED_BIT|BOARD_GREEN_LED_BIT) << OFF_SETBITS_SHIFT) +#define LED_STACKCREATED_OFF_CLRBITS ((BOARD_BLUE_LED_BIT|BOARD_USR_LED_BIT) << OFF_CLRBITS_SHIFT) + +#define LED_INIRQ_ON_SETBITS ((BOARD_RED_LED_BIT) << ON_SETBITS_SHIFT) +#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_INIRQ_OFF_CLRBITS ((BOARD_RED_LED_BIT) << OFF_CLRBITS_SHIFT) + +#define LED_SIGNAL_ON_SETBITS ((BOARD_BLUE_LED_BIT) << ON_SETBITS_SHIFT) +#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_SIGNAL_OFF_CLRBITS ((BOARD_BLUE_LED_BIT) << OFF_CLRBITS_SHIFT) + +#define LED_ASSERTION_ON_SETBITS ((BOARD_RED_LED_BIT|BOARD_GREEN_LED_BIT|BOARD_BLUE_LED_BIT) << ON_SETBITS_SHIFT) +#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_ASSERTION_OFF_CLRBITS ((BOARD_RED_LED_BIT|BOARD_GREEN_LED_BIT|BOARD_BLUE_LED_BIT) << OFF_CLRBITS_SHIFT) + +#define LED_PANIC_ON_SETBITS ((BOARD_RED_LED_BIT) << ON_SETBITS_SHIFT) +#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_PANIC_OFF_CLRBITS ((BOARD_RED_LED_BIT) << OFF_CLRBITS_SHIFT) + +/************************************************************************************** + * Private Function Prototypes + **************************************************************************************/ + +/* LED State Controls */ + +static inline void phy_led_on(unsigned int on_bitset); +static inline void phy_led_off(unsigned int off_bitset); +static void led_setonoff(unsigned int bitset); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint16_t g_ledbits[LED_NUM_CODES] = +{ + (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | + LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS), + + (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS | + LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS), + + (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS | + LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS), + + (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS | + LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS), + + (LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS | + LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS), + + (LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS | + LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS), + + (LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS | + LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS), + + (LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS | + LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS) +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: phy_led_on + * + * Description: + * Performs the physical IO to turn On LEDs to the bit encoded state + * + ****************************************************************************/ + +static inline void phy_led_on(unsigned int on_bitset) +{ + /* All RGB LEDs are pulled up and, hence, active low */ + + if ((on_bitset & BOARD_RED_LED_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED2, false); + } + + if ((on_bitset & BOARD_GREEN_LED_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED4, false); + } + + if ((on_bitset & BOARD_BLUE_LED_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED3, false); + } + + /* USR LED is pulled down and, hence, active high */ + + if ((on_bitset & BOARD_USR_LED_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED1, true); + } +} + +/**************************************************************************** + * Name: phy_led_off + * + * Description: + * Performs the physical IO to turn Off LEDs to the bit encoded state + * + ****************************************************************************/ + +static inline void phy_led_off(unsigned int off_bitset) +{ + /* All RGB LEDs are pulled up and, hence, active low */ + + if ((off_bitset & BOARD_RED_LED_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED2, true); + } + + if ((off_bitset & BOARD_GREEN_LED_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED4, true); + } + + if ((off_bitset & BOARD_BLUE_LED_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED3, true); + } + + /* USR LED is pulled down and, hence, active high */ + + if ((off_bitset & BOARD_USR_LED_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED1, false); + } +} + +/**************************************************************************** + * Name: led_setonoff + * + * Description: + * Set/clear all LEDs to the bit encoded state + * + ****************************************************************************/ + +static void led_setonoff(unsigned int bits) +{ + phy_led_off(CLRBITS(bits)); + phy_led_on(SETBITS(bits)); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_setonoff(ON_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_setonoff(OFF_BITS(g_ledbits[led])); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/spark/src/stm32_boot.c b/configs/spark/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..763538bebdf8348777431d2f5ab15ec969d258cf --- /dev/null +++ b/configs/spark/src/stm32_boot.c @@ -0,0 +1,138 @@ +/************************************************************************************ + * configs/spark/src/stm32_boot.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "spark.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + +#ifdef CONFIG_ARCH_BUTTONS + board_button_initialize(); +#endif + + /* Configure SPI chip selects if 1) SP2 is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + stm32_spidev_initialize(); +#endif + + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB) + stm32_usbinitialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + board_app_initialize(); +#endif + + /* CC3000 wireless initialization + * Avoid Double registration if CONFIG_EXAMPLES_CC3000BASIC is defined + */ + +#if defined(CONFIG_WL_CC3000) && !defined(CONFIG_EXAMPLES_CC3000BASIC) + wireless_archinitialize(0); +#endif +} +#endif + diff --git a/configs/spark/src/stm32_buttons.c b/configs/spark/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..4f4224146ed3fdbcdea786b8628a5d4c7e95ccf4 --- /dev/null +++ b/configs/spark/src/stm32_buttons.c @@ -0,0 +1,136 @@ +/**************************************************************************** + * configs/spark/src/stm32_buttons.c + * + * Copyright (C) 2011-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "spark.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + stm32_configgpio(GPIO_BTN); +} + +/**************************************************************************** + * Name: board_buttons + * + * N.B The return state in true logic, the button polarity is dealt here in + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return stm32_gpioread(GPIO_BTN)==0 ? BUTTON_USER_BIT : 0; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id == BUTTON_USER) + { + oldhandler = stm32_gpiosetevent(GPIO_BTN, true, true, true, irqhandler); + } + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/spark/src/stm32_composite.c b/configs/spark/src/stm32_composite.c new file mode 100644 index 0000000000000000000000000000000000000000..2720de1af4f5a0b29da616011066c50f94bac04e --- /dev/null +++ b/configs/spark/src/stm32_composite.c @@ -0,0 +1,302 @@ +/**************************************************************************** + * config/spark/src/stm32_composite.c + * + * Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * David_s5 + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#ifdef CONFIG_MTD_SST25 +# include +# include +# include +#endif + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#ifdef CONFIG_USBDEV +# include "stm32_usbdev.h" +#endif + +#include "stm32.h" +#include "spark.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* Can't support the SST25 device if it SPI2 or SST25 support is not enabled */ + +#define HAVE_SST25 1 +#if !defined(CONFIG_STM32_SPI2) || !defined(CONFIG_MTD_SST25) +# undef HAVE_SST25 +#endif + +/* Can't support SST25 features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef HAVE_SST25 +#endif + +#ifndef CONFIG_SPARK_FLASH_MOUNT_POINT +# define CONFIG_SPARK_FLASH_MOUNT_POINT "/mnt/p%d" +#endif + +/* Use minor device number 0 is not is provided */ + +#ifndef CONFIG_SPARK_FLASH_MINOR +# define CONFIG_SPARK_FLASH_MINOR 0 +#endif + +/* Can't support both FAT and NXFFS */ + +#if defined(CONFIG_FS_FAT) && defined(CONFIG_FS_NXFFS) +# warning "Can't support both FAT and NXFFS -- using FAT" +#endif + +#define HAVE_USBDEV 1 +#define HAVE_USBMONITOR 1 + +/* Can't support USB device is USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +# undef HAVE_USBMONITOR +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR) +# undef HAVE_USBMONITOR +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_composite_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +#ifndef CONFIG_NSH_BUILTIN_APPS +static int stm32_composite_initialize(void) +{ +#ifdef HAVE_SST25 + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; + int ret; + + /* Configure SPI-based devices */ + + /* Get the SPI port */ + + fvdbg("Initializing SPI port %d\n", CONFIG_SPARK_FLASH_SPI); + + spi = stm32_spibus_initialize(CONFIG_SPARK_FLASH_SPI); + if (!spi) + { + fdbg("ERROR: Failed to initialize SPI port %d\n", + CONFIG_SPARK_FLASH_SPI); + return -ENODEV; + } + + fvdbg("Successfully initialized SPI port %d\n", CONFIG_SPARK_FLASH_SPI); + + /* Now bind the SPI interface to the SST25 SPI FLASH driver */ + + fvdbg("Bind SPI to the SPI flash driver\n"); + mtd = sst25_initialize(spi); + if (!mtd) + { + fdbg("ERROR: Failed to bind SPI port %d to the SPI FLASH driver\n", + CONFIG_SPARK_FLASH_SPI); + } + else + { + fvdbg("Successfully bound SPI port %d to the SPI FLASH driver\n", + CONFIG_SPARK_FLASH_SPI); + } + +#ifndef CONFIG_SPARK_FLASH_PART + + /* Use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(CONFIG_SPARK_FLASH_MINOR, mtd); + if (ret < 0) + { + fdbg("ERROR: Initialize the FTL layer\n"); + return ret; + } + +#ifdef CONFIG_SPARK_MOUNT_FLASH + char partname[16]; + char mntpoint[16]; + + /* mount -t vfat /dev/mtdblock0 /mnt/p0 */ + + snprintf(partname, sizeof(partname), "/dev/mtdblock%d", + CONFIG_SPARK_FLASH_MINOR); + snprintf(mntpoint, sizeof(mntpoint)-1, CONFIG_SPARK_FLASH_MOUNT_POINT, + CONFIG_SPARK_FLASH_MINOR); + + /* Mount the file system at /mnt/pn */ + + ret = mount(partname, mntpoint, "vfat", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the FAT volume: %d\n", errno); + return ret; + } + +#endif +#else + { + int partno; + int partsize; + int partoffset; + const char *partstring = CONFIG_SPARK_FLASH_PART_LIST; + const char *ptr; + FAR struct mtd_dev_s *mtd_part; + char partname[16]; + char mntpoint[16]; + + /* Now create a partition on the FLASH device */ + + partno = CONFIG_SPARK_FLASH_MINOR; + ptr = partstring; + partoffset = 0; + while (*ptr != '\0') + { + /* Get the partition size */ + + partsize = atoi(ptr); + mtd_part = mtd_partition(mtd, partoffset, (partsize >> 2) * 16); + partoffset += (partsize >> 2) * 16; + + /* Use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(partno, mtd_part); + if (ret < 0) + { + fdbg("ERROR: Initialize the FTL layer\n"); + return ret; + } + + snprintf(partname,sizeof(partname), "/dev/mtdblock%d", partno); + snprintf(mntpoint,sizeof(mntpoint)-1, CONFIG_SPARK_FLASH_MOUNT_POINT, + partno); + + /* Mount the file system at /mnt/pn */ + + ret = mount(partname, mntpoint, "vfat", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the FAT volume: %d\n", errno); + return ret; + } + + /* Update the pointer to point to the next size in the list */ + + while ((*ptr >= '0') && (*ptr <= '9')) + { + ptr++; + } + + if (*ptr == ',') + { + ptr++; + } + + /* Increment the part number */ + + partno++; + } + } +#endif /* CONFIG_SPARK_FLASH_PART */ + +#endif /* HAVE_SST25 */ + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + fdbg("ERROR: Failed to start USB monitor: %d\n", ret); + } +#endif + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_composite_initialize + * + * Description: + * Perform architecture specific initialization of a composite USB device. + * + ****************************************************************************/ + +int board_composite_initialize(int port) +{ +#ifdef CONFIG_NSH_BUILTIN_APPS + return OK; +#else + return stm32_composite_initialize(); +#endif +} diff --git a/configs/spark/src/stm32_io.c b/configs/spark/src/stm32_io.c new file mode 100644 index 0000000000000000000000000000000000000000..404cd4143ae0b3bf6b8b2cc02638ca276dc9b260 --- /dev/null +++ b/configs/spark/src/stm32_io.c @@ -0,0 +1,195 @@ +/**************************************************************************** + * configs/spark/src/stm32_io.c + * + * Copyright (C) 2011-2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include "chip/stm32_tim.h" + +#include "spark.h" + +#ifndef CONFIG_CC3000_PROBES + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_leds + * + * Description: + * + ****************************************************************************/ + +void up_leds(int r, int g ,int b, int freqs) +{ + long fosc = 72000000; + long prescale = 2048; + long p1s = fosc/prescale; + long p0p5s = p1s/2; + long p; + + static struct stm32_tim_dev_s *tim1 = 0; + + if (tim1 == 0) + { + tim1 = stm32_tim_init(1); + STM32_TIM_SETMODE(tim1, STM32_TIM_MODE_UP); + STM32_TIM_SETCLOCK(tim1, p1s-8); + STM32_TIM_SETPERIOD(tim1, p1s); + STM32_TIM_SETCOMPARE(tim1, 1, 0); + STM32_TIM_SETCOMPARE(tim1, 2, 0); + STM32_TIM_SETCOMPARE(tim1, 3, 0); + STM32_TIM_SETCHANNEL(tim1, 1, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG); + STM32_TIM_SETCHANNEL(tim1, 2, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG); + STM32_TIM_SETCHANNEL(tim1, 3, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG); + } + + p = freqs == 0 ? p1s : p1s / freqs; + STM32_TIM_SETPERIOD(tim1, p); + + p = freqs == 0 ? p1s + 1 : p0p5s / freqs; + + STM32_TIM_SETCOMPARE(tim1, 2, (r * p) / 255); + STM32_TIM_SETCOMPARE(tim1, 1, (b * p) / 255); + STM32_TIM_SETCOMPARE(tim1, 3, (g * p) / 255); +} + +/**************************************************************************** + * Name: up_ioinit + * + * Description: + * + ****************************************************************************/ + +void up_ioinit(void) +{ + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + up_leds(0,0,0,0); + stm32_configgpio(GPIO_A0); /* Probes */ + stm32_configgpio(GPIO_A1); /* Probes */ + stm32_configgpio(GPIO_A2); /* Smart Config */ + stm32_configgpio(GPIO_A3); /* not used */ + stm32_configgpio(GPIO_D0); /* Sw 1 */ + stm32_configgpio(GPIO_D1); /* Sw 2 */ + stm32_configgpio(GPIO_D2); /* Activate */ +} + +/**************************************************************************** + * Name: up_read_inputs + * + * N.B The return state in true logic, the button polarity is dealt here in + * + ****************************************************************************/ + +uint8_t up_read_inputs(void) +{ + uint8_t bits = 0; + bits |= stm32_gpioread(GPIO_D0) == 0 ? 1 : 0; + bits |= stm32_gpioread(GPIO_D1) == 0 ? 2 : 0; + bits |= stm32_gpioread(GPIO_A2) == 0 ? 4 : 0; + bits |= stm32_gpioread(GPIO_A3) == 0 ? 8 : 0; + return bits; +} + +/**************************************************************************** + * Name: up_write_outputs + * + * N.B The return state in true logic, the button polarity is dealt here in + * + ****************************************************************************/ + +void up_write_outputs(int id, bool bits) +{ + if (id == 2) + { + stm32_gpiowrite(GPIO_D2, bits); + } + else if (id == 0) + { + stm32_gpiowrite(GPIO_A0, bits); + } + else if (id == 1) + { + stm32_gpiowrite(GPIO_A1, bits); + } +} + +/**************************************************************************** + * Name: up_irqio + * + * Description: + * + ****************************************************************************/ + +xcpt_t up_irqio(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id == 0) + { + oldhandler = stm32_gpiosetevent(GPIO_D0, true, true, true, irqhandler); + } + else if (id == 1) + { + oldhandler = stm32_gpiosetevent(GPIO_D1, true, true, true, irqhandler); + } + + return oldhandler; +} +#endif /* CONFIG_CC3000_PROBES */ diff --git a/configs/spark/src/stm32_spi.c b/configs/spark/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..0dd71f1c16742d4381ed70a28bb161442bcd753d --- /dev/null +++ b/configs/spark/src/stm32_spi.c @@ -0,0 +1,245 @@ +/************************************************************************************ + * configs/spark/src/stm32_spi.c + * + * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Modifications: + * + * - 10/8/2013: David Sidrane + * - Modified to support SPI2 on the Spark Core. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "spark.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Spark board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ +#ifdef CONFIG_STM32_SPI2 + + /* Setup CS, EN & IRQ line IOs */ + +#ifdef CONFIG_WL_CC3000 + stm32_configgpio(GPIO_WIFI_CS); + stm32_configgpio(GPIO_WIFI_EN); + stm32_configgpio(GPIO_WIFI_INT); +#endif + +#ifdef CONFIG_MTD_SST25 + stm32_configgpio(GPIO_MEM_CS); /* FLASH chip select */ +#endif + +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +#if defined(CONFIG_MTD_SST25) + + if (devid == SPIDEV_FLASH) + { + stm32_gpiowrite(GPIO_MEM_CS, !selected); + } +#if defined(CONFIG_WL_CC3000) + else +#endif +#endif + +#if defined(CONFIG_WL_CC3000) + if (devid == SPIDEV_WIRELESS) + { + stm32_gpiowrite(GPIO_WIFI_CS, !selected); + } +#endif +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) + + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif +#endif /* CONFIG_SPI_CMDDATA */ + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/spark/src/stm32_usbdev.c b/configs/spark/src/stm32_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..87af0a3bc787256d21aacafa0f874868ff14ccaf --- /dev/null +++ b/configs/spark/src/stm32_usbdev.c @@ -0,0 +1,117 @@ +/************************************************************************************ + * configs/spark/src/stm32_usbdev.c + * + * Copyright (C) 2009-2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Librae + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "spark.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + ulldbg("called\n"); + + /* USB Soft Connect Pullup */ + + stm32_configgpio(GPIO_USB_PULLUP); +} + +/************************************************************************************ + * Name: stm32_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB software + * connect and disconnect), then the board software must provide stm32_pullup. + * See include/nuttx/usb/usbdev.h for additional description of this method. + * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be + * NULL. + * + ************************************************************************************/ + +int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); + stm32_gpiowrite(GPIO_USB_PULLUP, !enable); + return OK; +} + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} diff --git a/configs/spark/src/stm32_usbmsc.c b/configs/spark/src/stm32_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..23c4cc9533ed5a7bdb428b634c865b6c0338d454 --- /dev/null +++ b/configs/spark/src/stm32_usbmsc.c @@ -0,0 +1,68 @@ +/**************************************************************************** + * configs/spark/src/stm32_usbmsc.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "nuttx/board.h" + +#include "spark.h" + +#if defined(CONFIG_USBMSC) && defined(CONFIG_BOARDCTL_USBDEVCTRL) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + return board_app_initialize(); +} + +#endif /* CONFIG_USBMSC && CONFIG_BOARDCTL_USBDEVCTRL */ diff --git a/configs/spark/src/stm32_userleds.c b/configs/spark/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..41641fd7f131704b32acb4882cccbf2af9b6d5ea --- /dev/null +++ b/configs/spark/src/stm32_userleds.c @@ -0,0 +1,151 @@ +/**************************************************************************** + * configs/spark/src/stm32_userleds.c + * + * Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "spark.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* This array maps an LED number to GPIO pin configuration */ + +static uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4 +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + bool active_low = (LED_ACTIVE_LOW & (1 << ledon)) != 0; + stm32_gpiowrite(g_ledcfg[led], active_low ? !ledon : ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + * Description: + * This function will be called to set the state of the Leds on the board + * + * Paramaters: + * ledset: is a bit set of 1s for the LEDs to effect + * led_states_set: a bit set of 1 for on 0 for off + * N.B. The led_states_set terms are in true logic, the led polarity is + * dealt herein + * + ****************************************************************************/ + +void board_userled_all(uint8_t ledset, uint8_t led_states_set) +{ + led_states_set ^= LED_ACTIVE_LOW; + if ((ledset & BOARD_USR_LED_BIT) == 0) + { + stm32_gpiowrite(GPIO_LED1, (led_states_set & BOARD_USR_LED_BIT) == 0); + } + + if ((ledset & BOARD_RED_LED_BIT) == 0) + { + stm32_gpiowrite(GPIO_LED2, (led_states_set & BOARD_RED_LED_BIT) == 0); + } + + if ((ledset & BOARD_BLUE_LED_BIT) == 0) + { + stm32_gpiowrite(GPIO_LED3, (led_states_set & BOARD_BLUE_LED_BIT) == 0); + } + + if ((ledset & BOARD_GREEN_LED_BIT) == 0) + { + stm32_gpiowrite(GPIO_LED4, (led_states_set & BOARD_GREEN_LED_BIT) == 0); + } +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/spark/src/stm32_watchdog.c b/configs/spark/src/stm32_watchdog.c new file mode 100644 index 0000000000000000000000000000000000000000..1c41b1ddc7623b76624762ba1e9b180c1d2e9f73 --- /dev/null +++ b/configs/spark/src/stm32_watchdog.c @@ -0,0 +1,137 @@ +/************************************************************************************ + * configs/spark/src/stm32_watchdog.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Wathdog hardware should be enabled */ + +#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG) +# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_STM32_WDG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0" +# endif +#endif + +/* Use the un-calibrated LSI frequency if we have nothing better */ + +#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ) +# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecuture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ + /* Initialize and register the watchdog timer device */ + +#if defined(CONFIG_STM32_WWDG) + stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH); + return OK; + +#elif defined(CONFIG_STM32_IWDG) + stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ); + return OK; + +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/spark/src/stm32_wireless.c b/configs/spark/src/stm32_wireless.c new file mode 100644 index 0000000000000000000000000000000000000000..912670b9167bc12b4be49a82c9c302bb92c8564e --- /dev/null +++ b/configs/spark/src/stm32_wireless.c @@ -0,0 +1,362 @@ +/************************************************************************************ + * configs/spark/src/stm32_wireless.c + * + * Copyright (C) 2009, 2013 Gregory Nutt. All rights reserved. + * Author: Laurent Latil + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "stm32.h" +#include "spark.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifdef CONFIG_WL_CC3000 +#ifndef CONFIG_DRIVERS_WIRELESS +# error "Wireless support requires CONFIG_DRIVERS_WIRELESS" +#endif + +#ifndef CONFIG_STM32_SPI2 +# error "CC3000 Wireless support requires CONFIG_STM32_SPI2" +#endif + +#ifndef CC3000_SPI_FREQUENCY +# define CC3000_SPI_FREQUENCY 16000000 +#endif + +#ifndef CC3000_SPIDEV +# define CC3000_SPIDEV 2 +#endif + +#if CC3000_SPIDEV != 2 +# error "CC3000_SPIDEV must be 2" +#endif + +#ifndef CC3000_DEVMINOR +# define CC3000_DEVMINOR 0 +#endif + +#ifndef CONFIG_CC3000_RX_BUFFER_SIZE +#define CONFIG_CC3000_RX_BUFFER_SIZE 132 +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32_config_s +{ + struct cc3000_config_s dev; + xcpt_t handler; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind callbacks + * to isolate the CC3000 driver from differences in GPIO interrupt handling + * by varying boards and MCUs. If possible, interrupts should be configured + * on falling edges to detect the Ready Condition At T2: The normal master + * SPI write sequence is SPI_CS low, followed by SPI_IRQ low CC3000 to host, + * indicating that the CC3000 core module is ready to accept data. T2 + * duration is approximately 7 ms. + * + * irq_attach - Attach the CC3000 interrupt handler to the GPIO interrupt + * irq_enable - Enable or disable the GPIO interrupt + * clear_irq - Acknowledge/clear any pending GPIO interrupt + * power_enable - Enable or disable Module enable. + * chip_chip_select - The Chip Select + * wl_read_irq - Return the state of the interrupt GPIO input + */ + +static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler); +static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable); +static void wl_clear_irq(FAR struct cc3000_config_s *state); +static void wl_select(FAR struct cc3000_config_s *state, bool enable); +static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable); +static bool wl_read_irq(FAR struct cc3000_config_s *state); +#ifdef CONFIG_CC3000_PROBES +static bool probe(FAR struct cc3000_config_s *state,int n, bool s); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the CC3000 + * driver. This structure provides information about the configuration + * of the CC3000 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writable because, under certain circumstances, the driver + * may modify frequency or X plate resistance values. + */ + +static struct stm32_config_s g_cc3000_info = +{ + .dev.spi_frequency = CONFIG_CC3000_SPI_FREQUENCY, + .dev.spi_mode = CONFIG_CC3000_SPI_MODE, + .dev.max_rx_size = 0, + .dev.irq_attach = wl_attach_irq, + .dev.irq_enable = wl_enable_irq, + .dev.irq_clear = wl_clear_irq, + .dev.power_enable = wl_enable_power, + .dev.chip_chip_select = wl_select, + .dev.irq_read = wl_read_irq, +#ifdef CONFIG_CC3000_PROBES + .dev.probe = probe, /* This is used for debugging */ +#endif + .handler = NULL, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the CC3000 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the CC3000 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + */ + +static int wl_attach_irq(FAR struct cc3000_config_s *state, xcpt_t handler) +{ + FAR struct stm32_config_s *priv = (FAR struct stm32_config_s *)state; + + /* Just save the handler for use when the interrupt is enabled */ + + priv->handler = handler; + return OK; +} + +static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable) +{ + FAR struct stm32_config_s *priv = (FAR struct stm32_config_s *)state; + + /* The caller should not attempt to enable interrupts if the handler + * has not yet been 'attached' + */ + + DEBUGASSERT(priv->handler || !enable); + + /* Attach and enable, or detach and disable */ + + ivdbg("enable:%d\n", enable); + if (enable) + { + (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, true, false, priv->handler); + } + else + { + (void)stm32_gpiosetevent(GPIO_WIFI_INT, false, false, false, NULL); + } +} + +static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable) +{ + ivdbg("enable:%d\n", enable); + + /* Active high enable */ + + stm32_gpiowrite(GPIO_WIFI_EN, enable); +} + +static void wl_select(FAR struct cc3000_config_s *state, bool enable) +{ + ivdbg("enable:%d\n", enable); + + /* Active high enable */ + + stm32_gpiowrite(GPIO_WIFI_CS, enable); +} + +static void wl_clear_irq(FAR struct cc3000_config_s *state) +{ + /* Does nothing */ +} + +static bool wl_read_irq(FAR struct cc3000_config_s *state) +{ + /* Active low*/ + + return stm32_gpioread(GPIO_WIFI_INT) ? false : true; +} + +#ifdef CONFIG_CC3000_PROBES +static bool probe(FAR struct cc3000_config_s *state,int n, bool s) +{ + if (n == 0) + { + stm32_gpiowrite(GPIO_D0, s); + } + + if (n == 1) + { + stm32_gpiowrite(GPIO_D1, s); + } + + return true; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arch_wlinitialize + * + * Description: + * Each board that supports a wireless device must provide this function. + * This function is called by application-specific, setup logic to + * configure the wireless device. This function will register the driver + * as /dev/wirelessN where N is the minor device number. + * + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int wireless_archinitialize(size_t max_rx_size) +{ + FAR struct spi_dev_s *spi; + + /* Init SPI bus */ + + idbg("minor %d\n", minor); + DEBUGASSERT(CONFIG_CC3000_DEVMINOR == 0); + +#ifdef CONFIG_CC3000_PROBES + stm32_configgpio(GPIO_D0); + stm32_configgpio(GPIO_D1); + stm32_gpiowrite(GPIO_D0, 1); + stm32_gpiowrite(GPIO_D1, 1); +#endif + + /* Get an instance of the SPI interface */ + + spi = stm32_spibus_initialize(CONFIG_CC3000_SPIDEV); + if (!spi) + { + idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV); + return -ENODEV; + } + + /* Initialize and register the SPI CC3000 device */ + g_cc3000_info.dev.max_rx_size = max_rx_size ? max_rx_size : CONFIG_CC3000_RX_BUFFER_SIZE; + int ret = cc3000_register(spi, &g_cc3000_info.dev, CONFIG_CC3000_DEVMINOR); + if (ret < 0) + { + idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV); + return -ENODEV; + } + + return OK; +} + +/**************************************************************************** + * Name: C3000_wlan_init + * + * Description: + * Initialize wlan driver + * + * Warning: This function must be called before ANY other wlan driver + * function + * + * Input Parmeters: + * sWlanCB Asynchronous events callback. + * 0 no event call back. + * - Call back parameters: + * 1) event_type: HCI_EVNT_WLAN_UNSOL_CONNECT connect event, + * HCI_EVNT_WLAN_UNSOL_DISCONNECT disconnect event, + * HCI_EVNT_WLAN_ASYNC_SIMPLE_CONFIG_DONE config done, + * HCI_EVNT_WLAN_UNSOL_DHCP dhcp report, + * HCI_EVNT_WLAN_ASYNC_PING_REPORT ping report OR + * HCI_EVNT_WLAN_KEEPALIVE keepalive. + * 2) data: pointer to extra data that received by the event + * (NULL no data). + * 3) length: data length. + * - Events with extra data: + * HCI_EVNT_WLAN_UNSOL_DHCP: 4 bytes IP, 4 bytes Mask, + * 4 bytes default gateway, 4 bytes DHCP server and 4 bytes + * for DNS server. + * HCI_EVNT_WLAN_ASYNC_PING_REPORT: 4 bytes Packets sent, + * 4 bytes Packets received, 4 bytes Min round time, + * 4 bytes Max round time and 4 bytes for Avg round time. + * + * sFWPatches 0 no patch or pointer to FW patches + * sDriverPatches 0 no patch or pointer to driver patches + * sBootLoaderPatches 0 no patch or pointer to bootloader patches + * + * Returned Value: + * None + * + ****************************************************************************/ + +void cc3000_wlan_init(size_t max_tx_len, + tWlanCB sWlanCB, + tFWPatches sFWPatches, tDriverPatches + sDriverPatches, tBootLoaderPatches sBootLoaderPatches) +{ + wlan_init(max_tx_len, sWlanCB, sFWPatches, sDriverPatches, sBootLoaderPatches); +} + +#endif /* CONFIG_WL_CC3000 */ diff --git a/configs/spark/tools/dfu.sh b/configs/spark/tools/dfu.sh new file mode 100644 index 0000000000000000000000000000000000000000..4ca7e0eb1ea7a5bbaa3f1ec7caade733c65e4fef --- /dev/null +++ b/configs/spark/tools/dfu.sh @@ -0,0 +1,3 @@ +#!/bin/bash + +dfu-util -a1 -d 1eaf:0003 -D nuttx.bin -R diff --git a/configs/spark/tools/env.sh b/configs/spark/tools/env.sh new file mode 100644 index 0000000000000000000000000000000000000000..1d90665286a8f1946582f74625cbf4b7c3df79de --- /dev/null +++ b/configs/spark/tools/env.sh @@ -0,0 +1,5 @@ +#!/bin/bash + +cd tools +./configure.sh spark/$1 +cd - > /dev/null diff --git a/configs/spark/usbmsc/Make.defs b/configs/spark/usbmsc/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..423f70ada7139885d506489b338f42859da997e0 --- /dev/null +++ b/configs/spark/usbmsc/Make.defs @@ -0,0 +1,115 @@ +############################################################################ +# configs/spark/usbmsc/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/spark/usbmsc/defconfig b/configs/spark/usbmsc/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..eba276536d4c53c37fe138927eb17a7952673903 --- /dev/null +++ b/configs/spark/usbmsc/defconfig @@ -0,0 +1,1235 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +CONFIG_ARCH_CHIP_STM32F103CB=y +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +CONFIG_STM32_CRC=y +CONFIG_STM32_DMA1=y +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI2=y +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_USART2_RXDMA is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ARCH_USBDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=234 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MAPLE is not set +CONFIG_ARCH_BOARD_SPARK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="spark" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_SPARK_FLASH=y +CONFIG_SPARK_FLASH_SPI=2 +CONFIG_SPARK_FLASH_MINOR=0 +# CONFIG_SPARK_FLASH_PART is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=2 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=2 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=7 +CONFIG_MAX_TASKS=12 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=5 +CONFIG_NFILE_STREAMS=5 +CONFIG_NAME_MAX=8 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=1 +CONFIG_MQ_MAXMSGSIZE=8 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=280 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=340 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +CONFIG_ANALOG=y +# CONFIG_ADC is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +CONFIG_MTD_PARTITION=y +# CONFIG_MTD_SECT512 is not set +CONFIG_MTD_BYTE_WRITE=y +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +CONFIG_MTD_SST25=y +CONFIG_SST25_SPIMODE=0 +CONFIG_SST25_SPIFREQUENCY=80000000 +# CONFIG_SST25_READONLY is not set +CONFIG_SST25_SECTOR512=y +# CONFIG_SST25_SLOWWRITE is not set +# CONFIG_SST25_SLOWREAD is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=32 +CONFIG_USART2_TXBUFSIZE=32 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +CONFIG_USBDEV_TRACE=y +CONFIG_USBDEV_TRACE_NRECORDS=32 +CONFIG_USBDEV_TRACE_STRINGS=y +# CONFIG_USBDEV_TRACE_INITIALIDSET is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +CONFIG_USBMSC=y +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=2 +CONFIG_USBMSC_EPBULKIN=3 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=64 +CONFIG_USBMSC_BULKOUTREQLEN=64 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="Mass Storage" +CONFIG_USBMSC_VERSIONNO=0x399 +# CONFIG_USBMSC_REMOVABLE is not set +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=340 +# CONFIG_USBHOST is not set +CONFIG_DRIVERS_WIRELESS=y +# CONFIG_WL_CC1101 is not set +CONFIG_WL_CC3000=y +# CONFIG_CC3000_MULTIPLE is not set +CONFIG_CC3000_SPIDEV=2 +CONFIG_CC3000_DEVMINOR=0 +CONFIG_CC3000_SPI_MODE=1 +CONFIG_CC3000_SPI_FREQUENCY=16000000 +CONFIG_CC3000_WORKER_STACKSIZE=240 +CONFIG_CC3000_SELECT_STACKSIZE=390 +CONFIG_CC3000_UNSOLICED_STACKSIZE=264 +# CONFIG_CC3000_PROBES is not set +# CONFIG_WL_NRF24L01 is not set +# CONFIG_WL_PN532 is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +CONFIG_CRYPTO=y +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ALGTEST is not set +# CONFIG_CRYPTO_CRYPTODEV is not set +CONFIG_CRYPTO_SW_AES=y + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +CONFIG_FS_NAMED_SEMAPHORES=y +CONFIG_FS_NAMED_SEMPATH="/var/lock" +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +CONFIG_FS_FATTIME=y +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=2 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=768 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=768 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=0 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=768 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +CONFIG_EXAMPLES_CC3000BASIC=y +# CONFIG_EXAMPLES_CC3000_MEM_CHECK is not set +# CONFIG_EXAMPLES_CC3000_STACK_CHECK is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MTDPART is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +# CONFIG_NSH_DISABLE_DELROUTE is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=0 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=128 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +CONFIG_NSH_DISABLE_ITEF=y +CONFIG_NSH_DISABLE_LOOPS=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set + +# +# USB Device Trace Support +# +# CONFIG_NSH_USBDEV_TRACE is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +CONFIG_SYSTEM_USBMSC=y +CONFIG_SYSTEM_USBMSC_NLUNS=1 +CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mtdblock0" +CONFIG_SYSTEM_USBMSC_DEVMINOR2=1 +CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_USBMSC_DEVMINOR3=2 +CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" +# CONFIG_SYSTEM_USBMSC_DEBUGMM is not set +CONFIG_SYSTEM_USBMSC_CMD_STACKSIZE=768 +CONFIG_SYSTEM_USBMSC_CMD_PRIORITY=100 +# CONFIG_SYSTEM_USBMONITOR is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/spark/usbmsc/setenv.sh b/configs/spark/usbmsc/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ce036735e46184b30fa9a710d1ee72e4ba1a33c7 --- /dev/null +++ b/configs/spark/usbmsc/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/spark/usbmsc/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. + +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the Spark tools directory + +export TOOL_BIN="${WD}/configs/spark/tools" + +# Update the PATH variable + +export PATH="${BUILDROOT_BIN}:${TOOL_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/spark/usbnsh/Make.defs b/configs/spark/usbnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..8820947ef8f3f037a12cccad2b637aef02e0eb92 --- /dev/null +++ b/configs/spark/usbnsh/Make.defs @@ -0,0 +1,116 @@ +############################################################################ +# configs/maple/usbnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/spark/usbnsh/defconfig b/configs/spark/usbnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..30e873009d5f7defb178c514151050a22e549d84 --- /dev/null +++ b/configs/spark/usbnsh/defconfig @@ -0,0 +1,1201 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +CONFIG_ARCH_CHIP_STM32F103CB=y +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +CONFIG_STM32_CRC=y +CONFIG_STM32_DMA1=y +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI2=y +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_USART2_RXDMA is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ARCH_USBDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=512 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MAPLE is not set +CONFIG_ARCH_BOARD_SPARK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="spark" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_SPARK_FLASH=y +CONFIG_SPARK_FLASH_SPI=2 +CONFIG_SPARK_FLASH_MINOR=0 +# CONFIG_SPARK_FLASH_PART is not set +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=23 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=6 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=8 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=800 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +CONFIG_MTD_BYTE_WRITE=y +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +CONFIG_MTD_SST25=y +CONFIG_SST25_SPIMODE=0 +CONFIG_SST25_SPIFREQUENCY=20000000 +# CONFIG_SST25_READONLY is not set +# CONFIG_SST25_SECTOR512 is not set +# CONFIG_SST25_SLOWWRITE is not set +# CONFIG_SST25_SLOWREAD is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +CONFIG_USBDEV_TRACE=y +CONFIG_USBDEV_TRACE_NRECORDS=32 +# CONFIG_USBDEV_TRACE_STRINGS is not set +# CONFIG_USBDEV_TRACE_INITIALIDSET is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +CONFIG_FS_AUTOMOUNTER=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=2 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +CONFIG_NSH_DISABLE_ITEF=y +CONFIG_NSH_DISABLE_LOOPS=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_USBCONSOLE=y +CONFIG_NSH_USBCONDEV="/dev/ttyACM0" +CONFIG_USBDEV_MINOR=0 + +# +# USB Device Trace Support +# +# CONFIG_NSH_USBDEV_TRACE is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_USBMONITOR is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/spark/usbnsh/setenv.sh b/configs/spark/usbnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..993cd659c46f00621feacfa2b1293f9879ac7bef --- /dev/null +++ b/configs/spark/usbnsh/setenv.sh @@ -0,0 +1,63 @@ +#!/bin/bash +# configs/spark/usbnsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. + +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the path to the Spark tools directory + +export TOOL_BIN="${WD}/configs/spark/tools" + +# Update the PATH variable + +export PATH="${BUILDROOT_BIN}:${TOOL_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/spark/usbserial/Make.defs b/configs/spark/usbserial/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..317945bc3a0719e29e81d1fe58af6ce40e498323 --- /dev/null +++ b/configs/spark/usbserial/Make.defs @@ -0,0 +1,116 @@ +############################################################################ +# configs/spark/usbserial/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/spark/usbserial/defconfig b/configs/spark/usbserial/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..cfa672320f6a40c69b007aafa06188b542281c10 --- /dev/null +++ b/configs/spark/usbserial/defconfig @@ -0,0 +1,1134 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +CONFIG_ARCH_CHIP_STM32F103CB=y +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +CONFIG_STM32_CRC=y +CONFIG_STM32_DMA1=y +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI2=y +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_USART2_RXDMA is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ARCH_USBDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=512 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MAPLE is not set +CONFIG_ARCH_BOARD_SPARK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="spark" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y + +# +# Board-Specific Options +# +CONFIG_SPARK_FLASH=y +CONFIG_SPARK_FLASH_SPI=2 +CONFIG_SPARK_FLASH_MINOR=0 +# CONFIG_SPARK_FLASH_PART is not set +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=2 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=2 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="usbserial_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=7 +CONFIG_MAX_TASKS=12 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=5 +CONFIG_NFILE_STREAMS=5 +CONFIG_NAME_MAX=8 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=1 +CONFIG_MQ_MAXMSGSIZE=8 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=340 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +CONFIG_ANALOG=y +# CONFIG_ADC is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +CONFIG_MTD_PARTITION=y +# CONFIG_MTD_SECT512 is not set +CONFIG_MTD_BYTE_WRITE=y +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +CONFIG_MTD_SST25=y +CONFIG_SST25_SPIMODE=0 +CONFIG_SST25_SPIFREQUENCY=80000000 +# CONFIG_SST25_READONLY is not set +CONFIG_SST25_SECTOR512=y +# CONFIG_SST25_SLOWWRITE is not set +# CONFIG_SST25_SLOWREAD is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=32 +CONFIG_USART2_TXBUFSIZE=32 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +CONFIG_USBDEV_TRACE=y +CONFIG_USBDEV_TRACE_NRECORDS=32 +CONFIG_USBDEV_TRACE_STRINGS=y +# CONFIG_USBDEV_TRACE_INITIALIDSET is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=64 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=64 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=40 +CONFIG_CDCACM_TXBUFSIZE=40 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +CONFIG_DRIVERS_WIRELESS=y +# CONFIG_WL_CC1101 is not set +CONFIG_WL_CC3000=y +# CONFIG_CC3000_MULTIPLE is not set +CONFIG_CC3000_SPIDEV=2 +CONFIG_CC3000_DEVMINOR=0 +CONFIG_CC3000_SPI_MODE=1 +CONFIG_CC3000_SPI_FREQUENCY=16000000 +CONFIG_CC3000_WORKER_STACKSIZE=240 +CONFIG_CC3000_SELECT_STACKSIZE=390 +CONFIG_CC3000_UNSOLICED_STACKSIZE=264 +CONFIG_CC3000_PROBES=y +# CONFIG_WL_NRF24L01 is not set +# CONFIG_WL_PN532 is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +CONFIG_CRYPTO=y +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ALGTEST is not set +# CONFIG_CRYPTO_CRYPTODEV is not set +CONFIG_CRYPTO_SW_AES=y + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +CONFIG_FS_NAMED_SEMAPHORES=y +CONFIG_FS_NAMED_SEMPATH="/var/lock" +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +CONFIG_FS_FATTIME=y +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=2 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=768 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=768 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=0 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=768 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +CONFIG_EXAMPLES_CC3000BASIC=y +# CONFIG_EXAMPLES_CC3000_MEM_CHECK is not set +# CONFIG_EXAMPLES_CC3000_STACK_CHECK is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MTDPART is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +CONFIG_EXAMPLES_USBSERIAL=y +CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512 +CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=y +CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=y +CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=y +CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=y +CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=y +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_USBMONITOR is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/spark/usbserial/setenv.sh b/configs/spark/usbserial/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ba280ce1ff7fad1a3b494cd2e3d824dd0ae2c787 --- /dev/null +++ b/configs/spark/usbserial/setenv.sh @@ -0,0 +1,67 @@ +#!/bin/bash +# configs/spark/usbserial/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3210e-eval/Kconfig b/configs/stm3210e-eval/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..b5666cd7577404bb693dce4ba1529084cb56571e --- /dev/null +++ b/configs/stm3210e-eval/Kconfig @@ -0,0 +1,148 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_STM3210E_EVAL +comment "STM3210E-EVAL LCD Hardware Configuration" + +config STM3210E_LCD + bool "Select support for the STM3210E-EVAL LCD" + default n + depends on STM32_FSMC + select LCD + ---help--- + Enable support for the LCD on the STM3210E-EVAL board. See additional, + LCD-common settings in the drivers/lcd Kconfig file. + +config STM3210E_LCD_BACKLIGHT + bool "LCD backlight support" + depends on STM3210E_LCD + default n + ---help--- + Define to support a backlight. + +config STM3210E_LCD_PWM + bool "LCD backlight PWM control" + default n + depends on STM3210E_LCD_BACKLIGHT && STM32_TIM1 + ---help--- + If STM32_TIM1 is also defined, then an adjustable backlight will be + provided using timer 1 to generate various pulse widthes. The + granularity of the settings is determined by LCD_MAXPOWER. If STM3210E_LCD_PWM + (or STM32_TIM1) is not defined, then a simple on/off backlight is + provided. + +config STM3210E_LCD_RDSHIFT + int "LCD data shift" + default 5 + depends on STM3210E_LCD + ---help--- + When reading 16-bit gram data, there appears to be a shift in the returned + data. This value fixes the offset. Default 5. + +config STM3210E_AM240320_DISABLE + bool "Disable AM240320 support" + default n + depends on STM3210E_LCD + ---help--- + The LCD driver dynamically selects the LCD based on the reported LCD + ID value. However, code size can be reduced by suppressing support for + individual LCDs using this option + +config STM3210E_SPFD5408B_DISABLE + bool "Disable SPFD5408B support" + default n + depends on STM3210E_LCD + ---help--- + The LCD driver dynamically selects the LCD based on the reported LCD + ID value. However, code size can be reduced by suppressing support for + individual LCDs using this option + +config STM3210E_R61580_DISABLE + bool "Disable R61580 support" + default n + depends on STM3210E_LCD + ---help--- + The LCD driver dynamically selects the LCD based on the reported LCD + ID value. However, code size can be reduced by suppressing support for + individual LCDs using this option + +endif + +config PM_BUTTONS + bool "PM Button support" + default n + depends on PM && ARCH_IRQBUTTONS + ---help--- + Enable PM button EXTI interrupts to support PM testing + +config PM_BUTTONS_MIN + int "Minimum button number" + default 0 + depends on PM_BUTTONS + ---help--- + The lowest button code to use for PM testing (see board.h) + +config PM_BUTTONS_MAX + int "Maximum button number" + default 7 + depends on PM_BUTTONS + ---help--- + The highest button code to use for PM testing (see board.h) + +config PM_IRQBUTTONS_MIN + int "Minimum interrupting button number" + default 0 + depends on PM_BUTTONS + ---help--- + The lowest interrupting button code to use for PM testing (see board.h) + +config PM_IRQBUTTONS_MAX + int "Maximum interrupting button number" + default 7 + depends on PM_BUTTONS + ---help--- + The highest interrupting button code to use for PM testing (see board.h) + +config PM_BUTTON_ACTIVITY + int "Button PM activity weight" + default 10 + depends on PM_BUTTONS + ---help--- + The activity weight to report to the power management subsystem when a button is pressed. + +config PM_ALARM_SEC + int "PM_STANDBY delay (seconds)" + default 15 + depends on PM && RTC_ALARM + ---help--- + Number of seconds to wait in PM_STANDBY before going to PM_STANDBY mode. + +config PM_ALARM_NSEC + int "PM_STANDBY delay (nanoseconds)" + default 0 + depends on PM && RTC_ALARM + ---help--- + Number of additional nanoseconds to wait in PM_STANDBY before going to PM_STANDBY mode. + +config PM_SLEEP_WAKEUP + bool "PM_SLEEP wake-up alarm" + default n + depends on PM && RTC_ALARM + ---help--- + Wake-up of PM_SLEEP mode after a delay and resume normal operation. + +config PM_SLEEP_WAKEUP_SEC + int "PM_SLEEP delay (seconds)" + default 10 + depends on PM && RTC_ALARM + ---help--- + Number of seconds to wait in PM_SLEEP before going to PM_STANDBY mode. + +config PM_SLEEP_WAKEUP_NSEC + int "PM_SLEEP delay (nanoseconds)" + default 0 + depends on PM && RTC_ALARM + ---help--- + Number of additional nanoseconds to wait in PM_SLEEP before going to PM_STANDBY mode. diff --git a/configs/stm3210e-eval/README.txt b/configs/stm3210e-eval/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..a83f40875303205cf55ef56bb2f1396847a18f8f --- /dev/null +++ b/configs/stm3210e-eval/README.txt @@ -0,0 +1,1126 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +STMicro STM3210E-EVAL development board. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - DFU and JTAG + - OpenOCD + - LEDs + - Temperature Sensor + - RTC + - FSMC SRAM + - STM3210E-EVAL-specific Configuration Options + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +===================== + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. Raisonance GNU toolchain, or + 4. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery, devkitARM or Raisonance GNU toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. You may have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by an IDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh stm3210e-eval/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +DFU and JTAG +============ + + Enbling Support for the DFU Bootloader + -------------------------------------- + The linker files in these projects can be configured to indicate that you + will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU) + loader or via some JTAG emulator. You can specify the DFU bootloader by + adding the following line: + + CONFIG_STM32_DFU=y + + to your .config file. Most of the configurations in this directory are set + up to use the DFU loader. + + If CONFIG_STM32_DFU is defined, the code will not be positioned at the beginning + of FLASH (0x08000000) but will be offset to 0x08003000. This offset is needed + to make space for the DFU loader and 0x08003000 is where the DFU loader expects + to find new applications at boot time. If you need to change that origin for some + other bootloader, you will need to edit the file(s) ld.script.dfu for the + configuration. + + The DFU SE PC-based software is available from the STMicro website, + http://www.st.com. General usage instructions: + + 1. Convert the NuttX Intel Hex file (nuttx.hex) into a special DFU + file (nuttx.dfu)... see below for details. + 2. Connect the STM3210E-EVAL board to your computer using a USB + cable. + 3. Start the DFU loader on the STM3210E-EVAL board. You do this by + resetting the board while holding the "Key" button. Windows should + recognize that the DFU loader has been installed. + 3. Run the DFU SE program to load nuttx.dfu into FLASH. + + What if the DFU loader is not in FLASH? The loader code is available + inside of the Demo dirctory of the USBLib ZIP file that can be downloaded + from the STMicro Website. You can build it using RIDE (or other toolchains); + you will need a JTAG emulator to burn it into FLASH the first time. + + In order to use STMicro's built-in DFU loader, you will have to get + the NuttX binary into a special format with a .dfu extension. The + DFU SE PC_based software installation includes a file "DFU File Manager" + conversion program that a file in Intel Hex format to the special DFU + format. When you successfully build NuttX, you will find a file called + nutt.hex in the top-level directory. That is the file that you should + provide to the DFU File Manager. You will end up with a file called + nuttx.dfu that you can use with the STMicro DFU SE program. + + Enabling JTAG + ------------- + If you are not using the DFU, then you will probably also need to enable + JTAG support. By default, all JTAG support is disabled but there NuttX + configuration options to enable JTAG in various different ways. + + These configurations effect the setting of the SWJ_CFG[2:0] bits in the AFIO + MAPR register. These bits are used to configure the SWJ and trace alternate function I/Os. The SWJ (SerialWire JTAG) supports JTAG or SWD access to the + Cortex debug port. The default state in this port is for all JTAG support + to be disable. + + CONFIG_STM32_JTAG_FULL_ENABLE - sets SWJ_CFG[2:0] to 000 which enables full + SWJ (JTAG-DP + SW-DP) + + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - sets SWJ_CFG[2:0] to 001 which enable + full SWJ (JTAG-DP + SW-DP) but without JNTRST. + + CONFIG_STM32_JTAG_SW_ENABLE - sets SWJ_CFG[2:0] to 010 which would set JTAG-DP + disabled and SW-DP enabled + + The default setting (none of the above defined) is SWJ_CFG[2:0] set to 100 + which disable JTAG-DP and SW-DP. + +OpenOCD +======= + +I have also used OpenOCD with the STM3210E-EVAL. In this case, I used +the Olimex USB ARM OCD. See the script in configs/stm3210e-eval/tools/oocd.sh +for more information. Using the script: + +1) Start the OpenOCD GDB server + + cd + configs/stm3210e-eval/tools/oocd.sh $PWD + +2) Load Nuttx + + cd + arm-none-eabi-gdb nuttx + gdb> target remote localhost:3333 + gdb> mon reset + gdb> mon halt + gdb> load nuttx + +3) Running NuttX + + gdb> mon reset + gdb> c + +LEDs +==== + +The STM3210E-EVAL board has four LEDs labeled LD1, LD2, LD3 and LD4 on the +board.. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/up_leds.c. The LEDs are used to encode OS-related +events as follows: + + SYMBOL Meaning LED1* LED2 LED3 LED4 + ---------------- ----------------------- ----- ----- ----- ----- + LED_STARTED NuttX has been started ON OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF + LED_IRQSENABLED Interrupts enabled ON ON OFF OFF + LED_STACKCREATED Idle stack created OFF OFF ON OFF + LED_INIRQ In an interrupt** ON N/C N/C OFF + LED_SIGNAL In a signal handler*** N/C ON N/C OFF + LED_ASSERTION An assertion failed ON ON N/C OFF + LED_PANIC The system has crashed N/C N/C N/C ON + LED_IDLE STM32 is is sleep mode (Optional, not used) + + * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot + and these LEDs will give you some indication of where the failure was + ** The normal state is LED3 ON and LED1 faintly glowing. This faint glow + is because of timer interrupts that result in the LED being illuminated + on a small proportion of the time. +*** LED2 may also flicker normally if signals are processed. + +Temperature Sensor +================== + + LM-75 Temperature Sensor Driver + ------------------------------- + Support for the on-board LM-75 temperature sensor is available. This + support has been verified, but has not been included in any of the + available the configurations. To set up the temperature sensor, add the + following to the NuttX configuration file + + Drivers -> Sensors + CONFIG_LM75=y + CONFIG_I2C_LM75=y + + Then you can implement logic like the following to use the temperature + sensor: + + #include + #include + + ret = stm32_lm75initialize("/dev/temp"); /* Register the temperature sensor */ + fd = open("/dev/temp", O_RDONLY); /* Open the temperature sensor device */ + ret = ioctl(fd, SNIOC_FAHRENHEIT, 0); /* Select Fahrenheit */ + bytesread = read(fd, buffer, 8*sizeof(b16_t)); /* Read temperature samples */ + + More complex temperature sensor operations are also available. See the + IOCTL commands enumerated in include/nuttx/sensors/lm75.h. Also read the + escriptions of the stm32_lm75initialize() and stm32_lm75attach() + interfaces in the arch/board/board.h file (sames as + configs/stm3210e-eval/include/board.h). + + NSH Command Line Application + ---------------------------- + There is a tiny NSH command line application at examples/system/lm75 that + will read the current temperature from an LM75 compatible temperature sensor + and print the temperature on stdout in either units of degrees Fahrenheit or + Centigrade. This tiny command line application is enabled with the following + configuration options: + + Library + CONFIG_LIBM=y + CONFIG_LIBC_FLOATINGPOINT=y + + Applications -> NSH Library + CONFIG_NSH_ARCHINIT=y + + Applications -> System Add-Ons + CONFIG_SYSTEM_LM75=y + CONFIG_SYSTEM_LM75_DEVNAME="/dev/temp" + CONFIG_SYSTEM_LM75_FAHRENHEIT=y (or CENTIGRADE) + CONFIG_SYSTEM_LM75_STACKSIZE=1024 + CONFIG_SYSTEM_LM75_PRIORITY=100 + +RTC +=== + + The STM32 RTC may configured using the following settings. + + CONFIG_RTC - Enables general support for a hardware RTC. Specific + architectures may require other specific settings. + CONFIG_RTC_HIRES - The typical RTC keeps time to resolution of 1 + second, usually supporting a 32-bit time_t value. In this case, + the RTC is used to "seed" the normal NuttX timer and the + NuttX timer provides for higher resoution time. If CONFIG_RTC_HIRES + is enabled in the NuttX configuration, then the RTC provides higher + resolution time and completely replaces the system timer for purpose of + date and time. + CONFIG_RTC_FREQUENCY - If CONFIG_RTC_HIRES is defined, then the + frequency of the high resolution RTC must be provided. If CONFIG_RTC_HIRES + is not defined, CONFIG_RTC_FREQUENCY is assumed to be one. + CONFIG_RTC_ALARM - Enable if the RTC hardware supports setting of an alarm. + A callback function will be executed when the alarm goes off + + In hi-res mode, the STM32 RTC operates only at 16384Hz. Overflow interrupts + are handled when the 32-bit RTC counter overflows every 3 days and 43 minutes. + A BKP register is incremented on each overflow interrupt creating, effectively, + a 48-bit RTC counter. + + In the lo-res mode, the RTC operates at 1Hz. Overflow interrupts are not handled + (because the next overflow is not expected until the year 2106. + + WARNING: Overflow interrupts are lost whenever the STM32 is powered down. The + overflow interrupt may be lost even if the STM32 is powered down only momentarily. + Therefore hi-res solution is only useful in systems where the power is always on. + +FSMC SRAM +========= + +The 8-Mbit SRAM is connected to the STM32 at PG10 which will be FSMC_NE3, Bank1 +SRAM3. This memory will appear at address 0x68000000. + +The on-board SRAM can be configured by setting + + CONFIG_STM32_FSMC=y : Enables the FSMC + CONFIG_STM32_FSMC_SRAM=y : Enable external SRAM support + CONFIG_HEAP2_BASE=0x68000000 : SRAM will be located at 0x680000000 + CONFIG_HEAP2_SIZE=1048576 : The size of the SRAM is 1Mbyte + CONFIG_MM_REGIONS=2 : There will be two memory regions + : in the heap + +STM3210E-EVAL-specific Configuration Options +============================================ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32F103ZE + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=stm3210e_eval (for the STM3210E-EVAL development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_STM3210E_EVAL=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + AHB + --- + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + CONFIG_STM32_CRC + CONFIG_STM32_FSMC + CONFIG_STM32_SDIO + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_WWDG + CONFIG_STM32_IWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI4 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_USB + CONFIG_STM32_CAN1 + CONFIG_STM32_BKP + CONFIG_STM32_PWR + CONFIG_STM32_DAC1 + CONFIG_STM32_DAC2 + CONFIG_STM32_USB + + APB2 + ---- + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + CONFIG_STM32_TIM1 + CONFIG_STM32_SPI1 + CONFIG_STM32_TIM8 + CONFIG_STM32_USART1 + CONFIG_STM32_ADC3 + + Timer and I2C devices may need to the following to force power to be applied + unconditionally at power up. (Otherwise, the device is powered when it is + initialized). + + CONFIG_STM32_FORCEPOWER + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,8 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,8 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,8, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,8 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,8, m=1,..,2 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + Alternate pin mappings. The STM3210E-EVAL board requires only CAN1 remapping + On the STM3210E-EVAL board pin PB9 is wired as TX and pin PB8 is wired as RX. + Which then makes the proper connection through the CAN transiver SN65HVD230 + out to the CAN D-type 9-pn male connector where pin 2 is CANL and pin 7 is CANH. + + CONFIG_STM32_TIM1_FULL_REMAP + CONFIG_STM32_TIM1_PARTIAL_REMAP + CONFIG_STM32_TIM2_FULL_REMAP + CONFIG_STM32_TIM2_PARTIAL_REMAP_1 + CONFIG_STM32_TIM2_PARTIAL_REMAP_2 + CONFIG_STM32_TIM3_FULL_REMAP + CONFIG_STM32_TIM3_PARTIAL_REMAP + CONFIG_STM32_TIM4_REMAP + CONFIG_STM32_USART1_REMAP + CONFIG_STM32_USART2_REMAP + CONFIG_STM32_USART3_FULL_REMAP + CONFIG_STM32_USART3_PARTIAL_REMAP + CONFIG_STM32_SPI1_REMAP + CONFIG_STM32_SPI3_REMAP + CONFIG_STM32_I2C1_REMAP + CONFIG_STM32_CAN1_REMAP1 + CONFIG_STM32_CAN1_REMAP2 + CONFIG_STM32_CAN2_REMAP + + JTAG Enable settings (by default JTAG-DP and SW-DP are disabled): + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + + STM32F103Z specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + + CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO + and CONFIG_STM32_DMA2. + CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. + Default: Medium + CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: + 4-bit transfer mode. + + STM3210E-EVAL CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + + STM3210E-EVAL LCD Hardware Configuration + + CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape" + support. Default is this 320x240 "landscape" orientation + (this setting is informative only... not used). + CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait" + orientation support. In this orientation, the STM3210E-EVAL's + LCD ribbon cable is at the bottom of the display. Default is + 320x240 "landscape" orientation. + CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse + portrait" orientation support. In this orientation, the + STM3210E-EVAL's LCD ribbon cable is at the top of the display. + Default is 320x240 "landscape" orientation. + CONFIG_STM3210E_LCD_BACKLIGHT - Define to support a backlight. + CONFIG_STM3210E_LCD_PWM - If CONFIG_STM32_TIM1 is also defined, then an + adjustable backlight will be provided using timer 1 to generate + various pulse widthes. The granularity of the settings is + determined by CONFIG_LCD_MAXPOWER. If CONFIG_STM3210E_LCD_PWM (or + CONFIG_STM32_TIM1) is not defined, then a simple on/off backlight + is provided. + CONFIG_STM3210E_LCD_RDSHIFT - When reading 16-bit gram data, there appears + to be a shift in the returned data. This value fixes the offset. + Default 5. + + The LCD driver dynamically selects the LCD based on the reported LCD + ID value. However, code size can be reduced by suppressing support for + individual LCDs using: + + CONFIG_STM3210E_AM240320_DISABLE + CONFIG_STM3210E_SPFD5408B_DISABLE + CONFIG_STM3210E_R61580_DISABLE + +Configurations +============== + +Each STM3210E-EVAL configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh stm3210e-eval/ + cd - + . ./setenv.sh + +Where is one of the following: + + buttons: + -------- + + Uses apps/examples/buttons to exercise STM3210E-EVAL buttons and + button interrupts. + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + + composite + --------- + + This configuration exercises a composite USB interface consisting + of a CDC/ACM device and a USB mass storage device. This configuration + uses apps/system/composite. + + nsh and nsh2: + ------------ + Configure the NuttShell (nsh) located at examples/nsh. + + Differences between the two NSH configurations: + + =========== ======================= ================================ + nsh nsh2 + =========== ======================= ================================ + Platform Windows with Cygwin (2) Windows with Cygwin (2) + ----------- ----------------------- -------------------------------- + Toolchain: NuttX buildroot (1) Codesourcery for Windows (1) + ----------- ----------------------- -------------------------------- + Loader: DfuSe DfuSe + ----------- ----------------------- -------------------------------- + Serial Debug output: USART1 Debug output: USART1 + Console: NSH output: USART1 NSH output: USART1 (3) + ----------- ----------------------- -------------------------------- + I2C No I2C1 + ----------- ----------------------- -------------------------------- + microSD Yes Yes + Support + ----------- ----------------------- -------------------------------- + FAT FS CONFIG_FAT_LCNAMES=y CONFIG_FAT_LCNAMES=y + Config CONFIG_FAT_LFN=n CONFIG_FAT_LFN=y (4) + ----------- ----------------------- -------------------------------- + Support for No Yes + Built-in + Apps + ----------- ----------------------- -------------------------------- + Built-in None apps/examples/nx + Apps apps/examples/nxhello + apps/system/usbmsc (5) + apps/system/i2c + =========== ======================= ================================ + + (1) You will probably need to modify nsh/setenv.sh or nsh2/setenv.sh + to set up the correct PATH variable for whichever toolchain you + may use. + (2) Since DfuSe is assumed, this configuration may only work under + Cygwin without modification. + (3) When any other device other than /dev/console is used for a user + interface, (1) linefeeds (\n) will not be expanded to carriage return + / linefeeds \r\n). You will need to configure your terminal program + to account for this. And (2) input is not automatically echoed so + you will have to turn local echo on. + (4) Microsoft holds several patents related to the design of + long file names in the FAT file system. Please refer to the + details in the top-level COPYING file. Please do not use FAT + long file name unless you are familiar with these patent issues. + (5) When built as an NSH add-on command (CONFIG_NSH_BUILTIN_APPS=y), + Caution should be used to assure that the SD drive is not in use when + the USB storage device is configured. Specifically, the SD driver + should be unmounted like: + + nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard # Card is mounted in NSH + ... + nsh> umount /mnd/sdcard # Unmount before connecting USB!!! + nsh> msconn # Connect the USB storage device + ... + nsh> msdis # Disconnect USB storate device + nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard # Restore the mount + + Failure to do this could result in corruption of the SD card format. + + 1. Both configurations use the mconf-based configuration tool. To + change these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. The nsh2 contains support for some built-in applications that can be + enabled by make some additional minor changes: + + a. examples/can. The CAN test example can be enabled by changing the + following settings in nsh2/defconfig: + + CONFIG_CAN=y : Enable CAN "upper-half" driver support + CONFIG_STM32_CAN1=y : Enable STM32 CAN1 "lower-half" driver support + + The default CAN settings may need to change in your board board + configuration: + + CONFIG_CAN_EXTID=y : Support extended IDs + CONFIG_CAN1_BAUD=250000 : Bit rate: 250 KHz + CONFIG_CAN_TSEG1=12 : 80% sample point + CONFIG_CAN_TSEG2=3 + nx: + --- + An example using the NuttX graphics system (NX). This example + focuses on general window controls, movement, mouse and keyboard + input. + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_LCD_RPORTRAIT=y : 240x320 reverse portrait + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. If you configured the multi-used NX server (which is disabled + by default), then you would also need: + + CONFIG_EXAMPLES_NX_CLIENTPRIO=80 + CONFIG_EXAMPLES_NX_NOTIFYSIGNO=4 + CONFIG_EXAMPLES_NX_SERVERPRIO=120 + CONFIG_EXAMPLES_NX_STACKSIZE=2048 + + 3. This example provides a framework for a number of other standalone + graphics tests. + + a. apps/examples/nxlines: The NXLINES graphic example illustrates + drawing of fat lines in various orientations. You can modify + this configuration so to support the NXLINES example by making + the following modifications to the NuttX configuration file: + + Provide the new start-up entry point: + + CONFIG_USER_ENTRYPOINT="nxlines_main" + + Disable apps/examples/nx: + + CONFIG_EXAMPLES_NX=n + + Enable and configure apps/nxlines/nxlines: + + CONFIG_EXAMPLES_NXLINES=y + CONFIG_EXAMPLES_NXLINES_VPLANE=0 + CONFIG_EXAMPLES_NXLINES_DEVNO=0 + CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS=n + CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x0320 + CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16 + CONFIG_EXAMPLES_NXLINES_LINECOLOR=0xffe0 + CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4 + CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xffe0 + CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0xf7bb + CONFIG_EXAMPLES_NXLINES_BPP=16 + CONFIG_EXAMPLES_NXLINES_EXTERNINIT=n + + b. apps/examples/nxtext: Another example using the NuttX graphics + system (NX). This example focuses on placing text on the + background while pop-up windows occur. Text should continue to + update normally with or without the popup windows present. + + You can modify this configuration so to support the NXLINES + example by making the following modifications to the NuttX + configuration file: + + Provide the new start-up entry point: + + CONFIG_USER_ENTRYPOINT="nxtext_main" + + Disable apps/examples/nx: + + CONFIG_EXAMPLES_NX=n + + Enable an NX font: + + CONFIG_NXFONT_SERIF22X28B=y + + Enable and configure apps/nxlines/nxtext: + + CONFIG_EXAMPLES_NXTEXT=y + CONFIG_EXAMPLES_NXTEXT_VPLANE=0 + CONFIG_EXAMPLES_NXTEXT_DEVNO=0 + CONFIG_EXAMPLES_NXTEXT_BPP=16 + CONFIG_EXAMPLES_NXTEXT_BMCACHE=512 + CONFIG_EXAMPLES_NXTEXT_GLCACHE=16 + CONFIG_EXAMPLES_NXTEXT_DEFAULT_COLORS=n + CONFIG_EXAMPLES_NXTEXT_BGCOLOR=0x0011 + CONFIG_EXAMPLES_NXTEXT_BGFONTCOLOR=0xffdf + CONFIG_EXAMPLES_NXTEXT_PUCOLOR=0xfd20 + CONFIG_EXAMPLES_NXTEXT_PUFONTCOLOR=0x001f + CONFIG_EXAMPLES_NXTEXT_DEFAULT_FONT=n + CONFIG_EXAMPLES_NXTEXT_BGFONTID=11 + CONFIG_EXAMPLES_NXTEXT_PUFONTID=1 + CONFIG_EXAMPLES_NXTEXT_EXTERNINIT=n + + If you configured the multi-used NX server (which is disabled + by default), then you would also need: + + CONFIG_EXAMPLES_NXTEXT_STACKSIZE=2048 + CONFIG_EXAMPLES_NXTEXT_CLIENTPRIO=80 + CONFIG_EXAMPLES_NXTEXT_SERVERPRIO=120 + CONFIG_EXAMPLES_NXTEXT_NOTIFYSIGNO=4 + + c. Others could be similar configured: apps/examples/nxhello, + nximage, ... + + 4. The nsh configuration was used to verify the discrete joystick + (DJoystick driver). If you would like to duplicate this test, below + are the configuration changes needed to setup the DJoystick driver + (see nuttx/drivers/input/djoystick.c) and the DJoystick test (see + apps/examples/djoystick): + + Pre-requisites: + + CONFIG_DISABLE_POLL=n # Don't disable poll() + CONFIG_BUILTIN=y # Enable support for built-in applications + CONFIG_NSH_BUILTIN_APPS=y # Enable NSH built-in applications + + Enable the DJoystick driver: + + CONFIG_INPUT=y # Enable input driver support + CONFIG_DJOYSTICK=y # Enable the joystick drivers + # (default parmeters should be okay) + Enable the DJoystick Example: + + CONFIG_EXAMPLES_DJOYSTICK=y # Enable the DJoystick example + CONFIG_EXAMPLES_DJOYSTICK_DEVNAME="/dev/djoy0" + CONFIG_EXAMPLES_DJOYSTICK_SIGNO=13 + + When running the configuration, you should see the built-in + application 'djoy'. Just typo 'djoy' at the NSH command prompt. + The test will simply should the joystick position and will exect when + the joystick select indication is received (when the joystick button + is push downward). + + nxterm: + ---------- + This is yet another NSH configuration. This NSH configuration differs + from the other, however, in that it uses the NxTerm driver to host + the NSH shell. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Some of the differences in this configuration include these settings + in the defconfig file: + + These select NX Multi-User mode: + + CONFG_NX_MULTIUSER=y + CONFIG_DISABLE_MQUEUE=n + + The following definition in the defconfig file to enables the NxTerm + driver: + + CONFIG_NXTERM=y + + And this selects apps/examples/nxterm instead of apps/examples/nsh: + + CONFIG_EXAMPLES_NXTERM=y + + Other configuration settings of interest: + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_CYGWIN=y : with Cygwin + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin + CONFIG_LCD_LANDSCAPE=y : 320x240 landscape + + pm: + -- + This is a configuration that is used to test STM32 power management, i.e., + to test that the board can go into lower and lower states of power usage + as a result of inactivity. This configuration is based on the nsh2 + configuration with modifications for testing power management. This + configuration should provide some guideline for power management in your + STM32 application. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default configuration is Cygwin under windows using the CodeSourcery + toolchain: + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_CYGWIN=y : Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + + 3. CONFIG_ARCH_CUSTOM_PMINIT and CONFIG_ARCH_IDLE_CUSTOM are necessary + parts of the PM configuration: + + CONFIG_ARCH_CUSTOM_PMINIT=y + + CONFIG_ARCH_CUSTOM_PMINIT moves the PM initialization from + arch/arm/src/stm32/stm32_pminitialiaze.c to configs/stm3210-eval/src/stm32_pm.c. + This allows us to support board-specific PM initialization. + + CONFIG_ARCH_IDLE_CUSTOM=y + + The bulk of the PM activities occur in the IDLE loop. The IDLE loop + is special because it is what runs when there is no other task running. + Therefore when the IDLE executes, we can be assure that nothing else + is going on; this is the ideal condition for doing reduced power + management. + + The configuration CONFIG_ARCH_IDLE_CUSTOM allows us to "steal" the + normal STM32 IDLE loop (of arch/arm/src/stm32/stm32_idle.c) and replace + this with our own custom IDLE loop (at configs/stm3210-eval/src/up_idle.c). + + 4. Here are some additional things to note in the configuration: + + CONFIG_PM_BUTTONS=y + + CONFIG_PM_BUTTONS enables button support for PM testing. Buttons can + drive EXTI interrupts and EXTI interrupts can be used to wakeup for + certain reduced power modes (STOP mode). The use of the buttons here + is for PM testing purposes only; buttons would normally be part the + application code and CONFIG_PM_BUTTONS would not be defined. + + CONFIG_RTC_ALARM=y + + The RTC alarm is used to wake up from STOP mode and to transition to + STANDBY mode. This used of the RTC alarm could conflict with other + uses of the RTC alarm in your application. + + usbserial: + --------- + This configuration directory exercises the USB serial class + driver at examples/usbserial. See examples/README.txt for + more information. + + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin + + USB debug output can be enabled as by changing the following + settings in the configuration file: + + -CONFIG_DEBUG=n + -CONFIG_DEBUG_VERBOSE=n + -CONFIG_DEBUG_USB=n + +CONFIG_DEBUG=y + +CONFIG_DEBUG_VERBOSE=y + +CONFIG_DEBUG_USB=y + + -CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=n + -CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=n + -CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=n + -CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=n + -CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=n + +CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=y + +CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=y + +CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=y + +CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=y + +CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=y + + By default, the usbserial example uses the Prolific PL2303 + serial/USB converter emulation. The example can be modified + to use the CDC/ACM serial class by making the following changes + to the configuration file: + + -CONFIG_PL2303=y + +CONFIG_PL2303=n + + -CONFIG_CDCACM=n + +CONFIG_CDCACM=y + + The example can also be converted to use the alternative + USB serial example at apps/examples/usbterm by changing the + following: + + -CONFIG_EXAMPLES_USBSERIAL=y + +CONFIG_EXAMPLES_USBSERIAL=n + + -CONFIG_EXAMPLES_USBTERM=n + +CONFIG_EXAMPLES_USBTERM=y + + usbmsc: + ------- + This configuration directory exercises the USB mass storage + class driver at system/usbmsc. See examples/README.txt for + more information. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Build environment (can be easily reconfigured): + + CONFIG_HOST_LINUX=y : Linux (or Cygwin) + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin diff --git a/configs/stm3210e-eval/buttons/Make.defs b/configs/stm3210e-eval/buttons/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e460dc236ea54cff003b0759b7cb90af42de9263 --- /dev/null +++ b/configs/stm3210e-eval/buttons/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/stm3210e-eval/buttons/Make.defs +# +# Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3210e-eval/buttons/defconfig b/configs/stm3210e-eval/buttons/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..77af75773e5c8950f0568d8c3c34b9bafd5d0948 --- /dev/null +++ b/configs/stm3210e-eval/buttons/defconfig @@ -0,0 +1,1008 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +CONFIG_ARCH_CHIP_STM32F103ZE=y +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3210E_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3210e-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y + +# +# Board-Specific Options +# + +# +# STM3210E-EVAL LCD Hardware Configuration +# +# CONFIG_STM3210E_LCD is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=7 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="buttons_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=6 +CONFIG_NFILE_STREAMS=6 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=7 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=2 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=7 +CONFIG_EXAMPLES_BUTTONS_NAME0="WAKEUP" +CONFIG_EXAMPLES_BUTTONS_NAME1="TAMPER" +CONFIG_EXAMPLES_BUTTONS_NAME2="KEY" +CONFIG_EXAMPLES_BUTTONS_NAME3="SELECT" +CONFIG_EXAMPLES_BUTTONS_NAME4="DOWN" +CONFIG_EXAMPLES_BUTTONS_NAME5="LEFT" +CONFIG_EXAMPLES_BUTTONS_NAME6="RIGHT" +CONFIG_EXAMPLES_BUTTONS_NAME7="UP" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3210e-eval/buttons/setenv.sh b/configs/stm3210e-eval/buttons/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..2bdf5367426a09a0164591203cc9bb7cd50197f1 --- /dev/null +++ b/configs/stm3210e-eval/buttons/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/stm3210e-eval/buttons/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3210e-eval/composite/Make.defs b/configs/stm3210e-eval/composite/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..599b5d021a8afe0de7d3d26a1dd10b532d328322 --- /dev/null +++ b/configs/stm3210e-eval/composite/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/stm3210e-eval/composite/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3210e-eval/composite/defconfig b/configs/stm3210e-eval/composite/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..fcd3a3edff5c7515c42a599855ff71922bc58b5f --- /dev/null +++ b/configs/stm3210e-eval/composite/defconfig @@ -0,0 +1,1170 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +CONFIG_ARCH_CHIP_STM32F103ZE=y +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +CONFIG_STM32_SDIO=y +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SDIO Configuration +# +CONFIG_SDIO_DMAPRIO=0x00001000 +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3210E_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3210e-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# + +# +# STM3210E-EVAL LCD Hardware Configuration +# +# CONFIG_STM3210E_LCD is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="conn_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_ARCH_HAVE_SDIO=y +CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y +CONFIG_MMCSD_SDIO=y +CONFIG_SDIO_PREFLIGHT=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_SDIO_BLOCKSETUP is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +CONFIG_USBDEV_COMPOSITE=y +CONFIG_COMPOSITE_IAD=y +CONFIG_COMPOSITE_EP0MAXPACKET=64 +CONFIG_COMPOSITE_VENDORID=0x03eb +CONFIG_COMPOSITE_VENDORSTR="NuttX" +CONFIG_COMPOSITE_PRODUCTID=0x2022 +CONFIG_COMPOSITE_PRODUCTSTR="Composite Device" +CONFIG_COMPOSITE_SERIALSTR="12345" +CONFIG_COMPOSITE_CONFIGSTR="system/composite" +CONFIG_COMPOSITE_VERSIONNO=0x1010 +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +CONFIG_CDCACM_COMPOSITE=y +CONFIG_CDCACM_IFNOBASE=0 +CONFIG_CDCACM_STRBASE=4 +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +CONFIG_USBMSC=y +CONFIG_USBMSC_COMPOSITE=y +CONFIG_USBMSC_IFNOBASE=2 +CONFIG_USBMSC_STRBASE=4 +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=4 +CONFIG_USBMSC_EPBULKIN=5 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=256 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" +CONFIG_USBMSC_VERSIONNO=0x0399 +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=2048 +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +CONFIG_SYSTEM_COMPOSITE=y +CONFIG_SYSTEM_COMPOSITE_NLUNS=1 +CONFIG_SYSTEM_COMPOSITE_DEVMINOR1=0 +CONFIG_SYSTEM_COMPOSITE_DEVPATH1="/dev/mmcsd0" +CONFIG_SYSTEM_COMPOSITE_DEVMINOR2=1 +CONFIG_SYSTEM_COMPOSITE_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_COMPOSITE_DEVMINOR3=2 +CONFIG_SYSTEM_COMPOSITE_DEVPATH3="/dev/mmcsd2" +CONFIG_SYSTEM_COMPOSITE_TTYUSB=0 +CONFIG_SYSTEM_COMPOSITE_SERDEV="/dev/ttyACM0" +CONFIG_SYSTEM_COMPOSITE_BUFSIZE=256 +# CONFIG_SYSTEM_COMPOSITE_DEBUGMM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3210e-eval/composite/setenv.sh b/configs/stm3210e-eval/composite/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..742f508ddede378efca789da80642f5e26dff438 --- /dev/null +++ b/configs/stm3210e-eval/composite/setenv.sh @@ -0,0 +1,67 @@ +#!/bin/bash +# configs/stm3210e-eval/composite/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3210e-eval/include/board.h b/configs/stm3210e-eval/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..462d07ca538fac38da175313e1d2a870d94b2b69 --- /dev/null +++ b/configs/stm3210e-eval/include/board.h @@ -0,0 +1,303 @@ +/************************************************************************************ + * configs/stm3210e-eval/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* On-board crystal frequency is 8MHz (HSE) */ + +#define STM32_BOARD_XTAL 8000000ul + +/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */ + +#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC +#define STM32_CFGR_PLLXTPRE 0 +#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx9 +#define STM32_PLL_FREQUENCY (9*STM32_BOARD_XTAL) + +/* Use the PLL and set the SYSCLK source to be the PLL */ + +#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL +#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY + +/* AHB clock (HCLK) is SYSCLK (72MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (72MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */ + +/* APB2 timers 1 and 8 will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* USB divider -- Divide PLL clock by 1.5 */ + +#define STM32_CFGR_USBPRE 0 + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY + +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz + */ + +#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_SDXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* SRAM definitions *****************************************************************/ +/* The 8 Mbit SRAM is provided on the PT3 board using the FSMC_NE3 chip select. */ + +/* This is the Bank1 SRAM3 address: */ + +#define BOARD_SRAM_BASE 0x68000000 /* Bank2 SRAM3 base address */ +#define BOARD_SRAM_SIZE (1*1024*1024) /* 8-Mbit = 1-Mbyte */ + +/* LED definitions ******************************************************************/ + +/* The STM3210E-EVAL board has 4 LEDs that we will encode as: */ + +#define LED_STARTED 0 /* LED1 */ +#define LED_HEAPALLOCATE 1 /* LED2 */ +#define LED_IRQSENABLED 2 /* LED1 + LED2 */ +#define LED_STACKCREATED 3 /* LED3 */ +#define LED_INIRQ 4 /* LED1 + LED3 */ +#define LED_SIGNAL 5 /* LED2 + LED3 */ +#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */ +#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */ + +/* The STM3210E-EVAL supports several buttons + * + * Reset -- Connected to NRST + * Wakeup -- Connected to PA.0 + * Tamper -- Connected to PC.13 + * Key -- Connected to PG.8 + * + * And a Joystick + * + * Joystick center -- Connected to PG.7 + * Joystick down -- Connected to PD.3 + * Joystick left -- Connected to PG.14 + * Joystick right -- Connected to PG.13 + * Joystick up -- Connected to PG.15 + * + * The Joystick is treated like the other buttons unless CONFIG_DJOYSTICK + * is defined, then it is assumed that they should be used by the discrete + * joystick driver. + */ + +#define BUTTON_WAKEUP 0 +#define BUTTON_TAMPER 1 +#define BUTTON_KEY 2 + +#ifdef CONFIG_DJOYSTICK +# define NUM_BUTTONS 3 +#else +# define JOYSTICK_SEL 3 +# define JOYSTICK_DOWN 4 +# define JOYSTICK_LEFT 5 +# define JOYSTICK_RIGHT 6 +# define JOYSTICK_UP 7 + +# define NUM_BUTTONS 8 +#endif + +#define BUTTON_WAKEUP_BIT (1 << BUTTON_WAKEUP) +#define BUTTON_TAMPER_BIT (1 << BUTTON_TAMPER) +#define BUTTON_KEY_BIT (1 << BUTTON_KEY) + +#ifdef CONFIG_DJOYSTICK +# define JOYSTICK_SEL_BIT (1 << JOYSTICK_SEL) +# define JOYSTICK_DOWN_BIT (1 << JOYSTICK_DOWN) +# define JOYSTICK_LEFT_BIT (1 << JOYSTICK_LEFT) +# define JOYSTICK_RIGHT_BIT (1 << JOYSTICK_RIGHT) +# define JOYSTICK_UP_BIT (1 << JOYSTICK_UP) +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +/************************************************************************************ + * Name: stm3210e_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the STM3210E-EVAL board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * dispaly is cleared by simply setting all GRAM memory to the specified color. + * + ************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm3210e_lcdclear(uint16_t color); +#endif + +/************************************************************************************ + * Name: stm32_lm75initialize + * + * Description: + * Initialize and register the LM-75 Temperature Sensor driver. + * + * Input parameters: + * devpath - The full path to the driver to register. E.g., "/dev/temp0" + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ************************************************************************************/ + +#if defined(CONFIG_I2C) && defined(CONFIG_I2C_LM75) && defined(CONFIG_STM32_I2C1) +int stm32_lm75initialize(FAR const char *devpath); +#endif + +/************************************************************************************ + * Name: stm32_lm75attach + * + * Description: + * Attach the LM-75 interrupt handler + * + * Input parameters: + * irqhandler - the LM-75 interrupt handler + * + * Returned Value: + * The previous LM-75 interrupt handler + * + ************************************************************************************/ + +#if defined(CONFIG_I2C) && defined(CONFIG_I2C_LM75) && defined(CONFIG_STM32_I2C1) +xcpt_t stm32_lm75attach(xcpt_t irqhandler); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/stm3210e-eval/nsh/Make.defs b/configs/stm3210e-eval/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..34750c07481a23a1aca2c77e025fff626841a7d4 --- /dev/null +++ b/configs/stm3210e-eval/nsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/stm3210e-eval/nsh/Make.defs +# +# Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3210e-eval/nsh/defconfig b/configs/stm3210e-eval/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c97a503b7a57aeac08c0a53e7cb7e7230bc329a6 --- /dev/null +++ b/configs/stm3210e-eval/nsh/defconfig @@ -0,0 +1,1208 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +CONFIG_ARCH_CHIP_STM32F103ZE=y +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +CONFIG_STM32_SDIO=y +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SDIO Configuration +# +CONFIG_SDIO_DMAPRIO=0x00001000 +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3210E_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3210e-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# + +# +# STM3210E-EVAL LCD Hardware Configuration +# +# CONFIG_STM3210E_LCD is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_USBDEVCTRL is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=9 +CONFIG_START_DAY=21 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_ARCH_HAVE_SDIO=y +CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y +CONFIG_MMCSD_SDIO=y +CONFIG_SDIO_PREFLIGHT=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_SDIO_BLOCKSETUP is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3210e-eval/nsh/setenv.sh b/configs/stm3210e-eval/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..6fa000ee1f54e2b15ed601d304bb40232fb5c21a --- /dev/null +++ b/configs/stm3210e-eval/nsh/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm3210e-eval/dfu/setenv.sh +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3210e-eval/nsh2/Make.defs b/configs/stm3210e-eval/nsh2/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..7ee439bba42fad3ee2c9658a2c5bd70561139048 --- /dev/null +++ b/configs/stm3210e-eval/nsh2/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/stm3210e-eval/nsh2/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3210e-eval/nsh2/defconfig b/configs/stm3210e-eval/nsh2/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..41120894428ba481c70a1df1ee0daf74425fb06d --- /dev/null +++ b/configs/stm3210e-eval/nsh2/defconfig @@ -0,0 +1,1427 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +CONFIG_ARCH_CHIP_STM32F103ZE=y +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_FSMC=y +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +CONFIG_STM32_SDIO=y +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_I2C1_REMAP is not set +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# I2C Configuration +# +CONFIG_STM32_I2C_ALT=y +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set + +# +# SDIO Configuration +# +CONFIG_SDIO_DMAPRIO=0x00001000 +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3210E_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3210e-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# + +# +# STM3210E-EVAL LCD Hardware Configuration +# +CONFIG_STM3210E_LCD=y +# CONFIG_STM3210E_LCD_BACKLIGHT is not set +CONFIG_STM3210E_LCD_RDSHIFT=5 +# CONFIG_STM3210E_AM240320_DISABLE is not set +# CONFIG_STM3210E_SPFD5408B_DISABLE is not set +CONFIG_STM3210E_R61580_DISABLE=y +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=5 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_POLLED=y +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +CONFIG_LCD_NOGETRUN=y +CONFIG_LCD_MAXCONTRAST=1 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +# CONFIG_LCD_LANDSCAPE is not set +# CONFIG_LCD_PORTRAIT is not set +CONFIG_LCD_RPORTRAIT=y +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_ARCH_HAVE_SDIO=y +CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y +CONFIG_MMCSD_SDIO=y +CONFIG_SDIO_PREFLIGHT=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_SDIO_BLOCKSETUP is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +CONFIG_USBMSC=y +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=2 +CONFIG_USBMSC_EPBULKIN=5 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=256 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" +CONFIG_USBMSC_VERSIONNO=0x0399 +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=2048 +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0xd69a +CONFIG_NXTK_BORDERCOLOR2=0xad55 +CONFIG_NXTK_BORDERCOLOR3=0x0 +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +CONFIG_NXFONT_SANS28X37B=y +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +# CONFIG_EXAMPLES_NX_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NX_BGCOLOR=0x0011 +CONFIG_EXAMPLES_NX_COLOR1=0xaedc +CONFIG_EXAMPLES_NX_COLOR2=0xe7ff +CONFIG_EXAMPLES_NX_TBCOLOR=0xd69a +CONFIG_EXAMPLES_NX_FONTCOLOR=0x0000 +# CONFIG_EXAMPLES_NX_DEFAULT_FONT is not set +CONFIG_EXAMPLES_NX_FONTID=0 +CONFIG_EXAMPLES_NX_BPP=16 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NX_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +CONFIG_EXAMPLES_NXHELLO=y +CONFIG_EXAMPLES_NXHELLO_VPLANE=0 +CONFIG_EXAMPLES_NXHELLO_DEVNO=0 +CONFIG_EXAMPLES_NXHELLO_BPP=16 + +# +# Example Color Configuration +# +# CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NXHELLO_BGCOLOR=0x0011 +CONFIG_EXAMPLES_NXHELLO_FONTCOLOR=0xffdf + +# +# Example Font Configuration +# +# CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT is not set +CONFIG_EXAMPLES_NXHELLO_FONTID=6 +# CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=1 +CONFIG_I2CTOOL_MAXBUS=2 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=100000 +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +CONFIG_SYSTEM_USBMSC=y +CONFIG_SYSTEM_USBMSC_NLUNS=1 +CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mmcsd0" +CONFIG_SYSTEM_USBMSC_DEVMINOR2=1 +CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_USBMSC_DEVMINOR3=2 +CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" +# CONFIG_SYSTEM_USBMSC_DEBUGMM is not set +CONFIG_SYSTEM_USBMSC_CMD_STACKSIZE=768 +CONFIG_SYSTEM_USBMSC_CMD_PRIORITY=100 +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3210e-eval/nsh2/setenv.sh b/configs/stm3210e-eval/nsh2/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..e90b81c767a847f957f76a4cddbb78cfe3202446 --- /dev/null +++ b/configs/stm3210e-eval/nsh2/setenv.sh @@ -0,0 +1,67 @@ +#!/bin/bash +# configs/stm3210e-eval/nsh2/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3210e-eval/nx/Make.defs b/configs/stm3210e-eval/nx/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..2cea907920bde922968adc7474394244c3906869 --- /dev/null +++ b/configs/stm3210e-eval/nx/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/stm3210e-eval/nx/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3210e-eval/nx/defconfig b/configs/stm3210e-eval/nx/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..4adf156d8059a0426296c6cf07a62676f6b0dc72 --- /dev/null +++ b/configs/stm3210e-eval/nx/defconfig @@ -0,0 +1,1188 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +CONFIG_ARCH_CHIP_STM32F103ZE=y +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_FSMC=y +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_I2C1_REMAP is not set +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# I2C Configuration +# +CONFIG_STM32_I2C_ALT=y +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3210E_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3210e-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# + +# +# STM3210E-EVAL LCD Hardware Configuration +# +CONFIG_STM3210E_LCD=y +# CONFIG_STM3210E_LCD_BACKLIGHT is not set +CONFIG_STM3210E_LCD_RDSHIFT=5 +# CONFIG_STM3210E_AM240320_DISABLE is not set +# CONFIG_STM3210E_SPFD5408B_DISABLE is not set +CONFIG_STM3210E_R61580_DISABLE=y +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=5 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nx_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=12 +CONFIG_NFILE_STREAMS=12 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +CONFIG_LCD_NOGETRUN=y +CONFIG_LCD_MAXCONTRAST=1 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +# CONFIG_LCD_LANDSCAPE is not set +# CONFIG_LCD_PORTRAIT is not set +CONFIG_LCD_RPORTRAIT=y +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0xad55 +CONFIG_NXTK_BORDERCOLOR2=0x6b4d +CONFIG_NXTK_BORDERCOLOR3=0xdedb +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +# CONFIG_EXAMPLES_NX_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NX_BGCOLOR=0x0011 +CONFIG_EXAMPLES_NX_COLOR1=0xaedc +CONFIG_EXAMPLES_NX_COLOR2=0xe7ff +CONFIG_EXAMPLES_NX_TBCOLOR=0xd69a +CONFIG_EXAMPLES_NX_FONTCOLOR=0x0000 +# CONFIG_EXAMPLES_NX_DEFAULT_FONT is not set +CONFIG_EXAMPLES_NX_FONTID=0 +CONFIG_EXAMPLES_NX_BPP=16 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3210e-eval/nx/setenv.sh b/configs/stm3210e-eval/nx/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..bc83a0b334e4c96acfb6b024ab4be72cf6b3c49d --- /dev/null +++ b/configs/stm3210e-eval/nx/setenv.sh @@ -0,0 +1,62 @@ +#!/bin/bash +# configs/stm3210e-eval/nx/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3210e-eval/nxterm/Make.defs b/configs/stm3210e-eval/nxterm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..ef8c9bc3802080cb9f26676d464a4ad990752f07 --- /dev/null +++ b/configs/stm3210e-eval/nxterm/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/stm3210e-eval/nxterm/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3210e-eval/nxterm/defconfig b/configs/stm3210e-eval/nxterm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..3bb2e0e17588d48e52d6bfaec4bf568f729d60be --- /dev/null +++ b/configs/stm3210e-eval/nxterm/defconfig @@ -0,0 +1,1283 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +CONFIG_ARCH_CHIP_STM32F103ZE=y +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3210E_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3210e-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# STM3210E-EVAL LCD Hardware Configuration +# +CONFIG_STM3210E_LCD=y +# CONFIG_STM3210E_LCD_BACKLIGHT is not set +CONFIG_STM3210E_LCD_RDSHIFT=5 +# CONFIG_STM3210E_AM240320_DISABLE is not set +# CONFIG_STM3210E_SPFD5408B_DISABLE is not set +CONFIG_STM3210E_R61580_DISABLE=y +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=29 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxterm_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=12 +CONFIG_NFILE_STREAMS=12 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=8 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +CONFIG_LCD_NOGETRUN=y +CONFIG_LCD_MAXCONTRAST=1 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0xad55 +CONFIG_NXTK_BORDERCOLOR2=0x6b4d +CONFIG_NXTK_BORDERCOLOR3=0xdedb +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +CONFIG_NXTERM=y + +# +# NxTerm Output Text/Graphics Options +# +CONFIG_NXTERM_BPP=16 +CONFIG_NXTERM_CURSORCHAR=137 +CONFIG_NXTERM_MXCHARS=256 +CONFIG_NXTERM_CACHESIZE=32 +CONFIG_NXTERM_LINESEPARATION=0 +# CONFIG_NXTERM_NOWRAP is not set + +# +# NxTerm Input options +# +# CONFIG_NXTERM_NXKBDIN is not set +CONFIG_NXTERM_KBDBUFSIZE=16 +CONFIG_NXTERM_NPOLLWAITERS=4 + +# +# NX Multi-user only options +# +CONFIG_NX_MULTIUSER=y +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXSERVERMSGS=32 +CONFIG_NX_MXCLIENTMSGS=16 +# CONFIG_NX_NXSTART is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +CONFIG_EXAMPLES_NXTERM=y +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3210e-eval/nxterm/setenv.sh b/configs/stm3210e-eval/nxterm/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..a5e76a5113d7cc29a969893dc390447a6492af09 --- /dev/null +++ b/configs/stm3210e-eval/nxterm/setenv.sh @@ -0,0 +1,62 @@ +#!/bin/bash +# configs/stm3210e-eval/nxterm/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3210e-eval/pm/Make.defs b/configs/stm3210e-eval/pm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..a4da9f3a8a761286dafb1785d6e2bcf64664663c --- /dev/null +++ b/configs/stm3210e-eval/pm/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/stm3210e-eval/pm/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3210e-eval/pm/defconfig b/configs/stm3210e-eval/pm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..af1908d6354757296e144e40876f495b42950dfe --- /dev/null +++ b/configs/stm3210e-eval/pm/defconfig @@ -0,0 +1,1335 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +CONFIG_ARCH_CHIP_STM32F103ZE=y +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +CONFIG_STM32_BKP=y +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_TIM1=y +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +CONFIG_STM32_TIM1_NO_REMAP=y +# CONFIG_STM32_TIM1_FULL_REMAP is not set +# CONFIG_STM32_TIM1_PARTIAL_REMAP is not set +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM1_PWM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +CONFIG_ARCH_IDLE_CUSTOM=y +CONFIG_ARCH_CUSTOM_PMINIT=y +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3210E_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3210e-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_PM_ALARM_SEC=15 +CONFIG_PM_ALARM_NSEC=0 +# CONFIG_PM_SLEEP_WAKEUP is not set +CONFIG_PM_SLEEP_WAKEUP_SEC=10 +CONFIG_PM_SLEEP_WAKEUP_NSEC=0 + +# +# STM3210E-EVAL LCD Hardware Configuration +# +CONFIG_STM3210E_LCD=y +CONFIG_STM3210E_LCD_BACKLIGHT=y +CONFIG_STM3210E_LCD_PWM=y +CONFIG_STM3210E_LCD_RDSHIFT=5 +# CONFIG_STM3210E_AM240320_DISABLE is not set +# CONFIG_STM3210E_SPFD5408B_DISABLE is not set +CONFIG_STM3210E_R61580_DISABLE=y +CONFIG_PM_BUTTONS=y +CONFIG_PM_BUTTONS_MIN=0 +CONFIG_PM_BUTTONS_MAX=7 +CONFIG_PM_IRQBUTTONS_MIN=0 +CONFIG_PM_IRQBUTTONS_MAX=7 +CONFIG_PM_BUTTON_ACTIVITY=10 +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +# CONFIG_RTC_DATETIME is not set +CONFIG_RTC_HIRES=y +CONFIG_RTC_FREQUENCY=16384 +CONFIG_RTC_ALARM=y +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +CONFIG_LCD_NOGETRUN=y +CONFIG_LCD_MAXCONTRAST=100 +CONFIG_LCD_MAXPOWER=100 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +# CONFIG_LCD_LANDSCAPE is not set +# CONFIG_LCD_PORTRAIT is not set +CONFIG_LCD_RPORTRAIT=y +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +CONFIG_PM=y +CONFIG_PM_SLICEMS=100 +CONFIG_PM_NDOMAINS=1 +CONFIG_PM_MEMORY=2 +CONFIG_PM_COEFN=1 +CONFIG_PM_COEF1=1 +CONFIG_PM_COEF2=1 +CONFIG_PM_COEF3=1 +CONFIG_PM_COEF4=1 +CONFIG_PM_COEF5=1 +CONFIG_PM_IDLEENTER_THRESH=1 +CONFIG_PM_IDLEEXIT_THRESH=2 +CONFIG_PM_IDLEENTER_COUNT=30 +CONFIG_PM_STANDBYENTER_THRESH=1 +CONFIG_PM_STANDBYEXIT_THRESH=2 +CONFIG_PM_STANDBYENTER_COUNT=50 +CONFIG_PM_SLEEPENTER_THRESH=1 +CONFIG_PM_SLEEPEXIT_THRESH=2 +CONFIG_PM_SLEEPENTER_COUNT=70 +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +# CONFIG_NX_XYINPUT_MOUSE is not set +CONFIG_NX_XYINPUT_TOUCHSCREEN=y +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0xad55 +CONFIG_NXTK_BORDERCOLOR2=0x6b4d +CONFIG_NXTK_BORDERCOLOR3=0xdedb +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +CONFIG_NXFONT_SANS28X37B=y +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +# CONFIG_EXAMPLES_NX_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NX_BGCOLOR=0x0011 +CONFIG_EXAMPLES_NX_COLOR1=0xaedc +CONFIG_EXAMPLES_NX_COLOR2=0xe7ff +CONFIG_EXAMPLES_NX_TBCOLOR=0xd69a +CONFIG_EXAMPLES_NX_FONTCOLOR=0x0000 +# CONFIG_EXAMPLES_NX_DEFAULT_FONT is not set +CONFIG_EXAMPLES_NX_FONTID=0 +CONFIG_EXAMPLES_NX_BPP=16 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NX_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +CONFIG_EXAMPLES_NXHELLO=y +CONFIG_EXAMPLES_NXHELLO_VPLANE=0 +CONFIG_EXAMPLES_NXHELLO_DEVNO=0 +CONFIG_EXAMPLES_NXHELLO_BPP=16 + +# +# Example Color Configuration +# +# CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NXHELLO_BGCOLOR=0x0011 +CONFIG_EXAMPLES_NXHELLO_FONTCOLOR=0xffdf + +# +# Example Font Configuration +# +# CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT is not set +CONFIG_EXAMPLES_NXHELLO_FONTID=6 +# CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3210e-eval/pm/setenv.sh b/configs/stm3210e-eval/pm/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..dacfc958638abd3548c500eb7aee8a3ac7020577 --- /dev/null +++ b/configs/stm3210e-eval/pm/setenv.sh @@ -0,0 +1,67 @@ +#!/bin/bash +# configs/stm3210e-eval/pm/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3210e-eval/scripts/ld.script b/configs/stm3210e-eval/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..0f0e017aa8259a080228d5048f07f9a53408d386 --- /dev/null +++ b/configs/stm3210e-eval/scripts/ld.script @@ -0,0 +1,118 @@ +/**************************************************************************** + * configs/stm3210e-eval/scripts/ld.script + * + * Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F103ZET6 has 512Kb of FLASH beginning at address 0x0800:0000 and + * 64Kb of SRAM beginning at address 0x2000:0000. When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F103Z has 64Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm3210e-eval/scripts/ld.script.dfu b/configs/stm3210e-eval/scripts/ld.script.dfu new file mode 100644 index 0000000000000000000000000000000000000000..8669a0f0210a23f5f6d99e96213b22484bfc1a7a --- /dev/null +++ b/configs/stm3210e-eval/scripts/ld.script.dfu @@ -0,0 +1,117 @@ +/**************************************************************************** + * configs/stm3210e-eval/scripts/ld.script.dfu + * + * Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F103ZET6 has 512Kb of FLASH beginning at address 0x0800:0000 and + * 64Kb of SRAM beginning at address 0x2000:0000. Here we assume that the + * STM3210E-EVAL's DFU bootloader is being used. In that case, the corrct + * load .text load address is 0x08003000 (leaving 464Kb). + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08003000, LENGTH = 464K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F103Z has 64Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm3210e-eval/src/.gitignore b/configs/stm3210e-eval/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/stm3210e-eval/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/stm3210e-eval/src/Makefile b/configs/stm3210e-eval/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..301f0eed9d0bcfd9196d57cf15708a6d414b4f7f --- /dev/null +++ b/configs/stm3210e-eval/src/Makefile @@ -0,0 +1,95 @@ +############################################################################ +# configs/stm3210e-eval/src/Makefile +# +# Copyright (C) 2009-2010, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_leds.c stm32_spi.c stm32_usbdev.c + +ifeq ($(CONFIG_STM32_FSMC),y) +CSRCS += stm32_lcd.c stm32_extcontext.c stm32_extmem.c stm32_selectnor.c +CSRCS += stm32_deselectnor.c stm32_selectsram.c stm32_deselectsram.c +CSRCS += stm32_selectlcd.c stm32_deselectlcd.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += stm32_adc.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += stm32_usbmsc.c +endif + +ifeq ($(CONFIG_USBDEV_COMPOSITE),y) +CSRCS += stm32_composite.c +endif + +ifeq ($(CONFIG_I2C_LM75),y) +CSRCS += stm32_lm75.c +endif + +ifeq ($(CONFIG_CAN),y) +CSRCS += stm32_can.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += stm32_watchdog.c +endif + +ifeq ($(CONFIG_ARCH_CUSTOM_PMINIT),y) +CSRCS += stm32_pm.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c + +ifeq ($(CONFIG_PM_BUTTONS),y) +CSRCS += stm32_pmbuttons.c +endif +endif + +ifeq ($(CONFIG_DJOYSTICK),y) +CSRCS += stm32_djoystick.c +endif + +ifeq ($(CONFIG_ARCH_IDLE_CUSTOM),y) +CSRCS += stm32_idle.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm3210e-eval/src/stm3210e-eval.h b/configs/stm3210e-eval/src/stm3210e-eval.h new file mode 100644 index 0000000000000000000000000000000000000000..aa129bf9ce7ca5a65409a0093a725371fd50131b --- /dev/null +++ b/configs/stm3210e-eval/src/stm3210e-eval.h @@ -0,0 +1,346 @@ +/************************************************************************************ + * configs/stm3210e_eval/src/stm3210e-eval.h + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_STM3210E_EVAL_SRC_STM3210E_EVAL_H +#define __CONFIGS_STM3210E_EVAL_SRC_STM3210E_EVAL_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* How many SPI modules does this chip support? Most support 2 SPI modules (others + * may support more -- in such case, the following must be expanded). + */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +#endif + +/* There is only CAN1 on the STM3210E-EVAL board */ + +#if defined(CONFIG_STM32_CAN2) +# warning "The STM3210E-EVAL only supports CAN1" +#endif + +/* Do we need to register I2C drivers on behalf of the I2C tool? */ + +#define HAVE_I2CTOOL 1 +#if !defined(CONFIG_SYSTEM_I2CTOOL) || !defined(CONFIG_I2C_DRIVER) +# undef HAVE_I2CTOOL +#endif + +/* STM3210E-EVAL GPIOs **************************************************************/ +/* LEDs */ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN6) +#define GPIO_LED2 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN7) +#define GPIO_LED3 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN8) +#define GPIO_LED4 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN9) + +/* BUTTONS -- NOTE that some have EXTI interrupts configured */ + +#ifdef CONFIG_DJOYSTICK +# define MIN_IRQBUTTON BUTTON_KEY +# define MAX_IRQBUTTON BUTTON_KEY +# define NUM_IRQBUTTONS (1) +#else +# define MIN_IRQBUTTON BUTTON_KEY +# define MAX_IRQBUTTON JOYSTICK_UP +# define NUM_IRQBUTTONS (JOYSTICK_UP - BUTTON_KEY + 1) +#endif + +#define GPIO_BTN_WAKEUP (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_PORTA|GPIO_PIN0) +#define GPIO_BTN_TAMPER (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_PORTC|GPIO_PIN13) +#define GPIO_BTN_KEY (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_EXTI|GPIO_PORTG|GPIO_PIN8) + +#define GPIO_JOY_SEL (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_EXTI|GPIO_PORTG|GPIO_PIN7) +#define GPIO_JOY_DOWN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_EXTI|GPIO_PORTD|GPIO_PIN3) +#define GPIO_JOY_LEFT (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_EXTI|GPIO_PORTG|GPIO_PIN14) +#define GPIO_JOY_RIGHT (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_EXTI|GPIO_PORTG|GPIO_PIN13) +#define GPIO_JOY_UP (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ + GPIO_EXTI|GPIO_PORTG|GPIO_PIN15) + +/* SPI FLASH chip select: PA.4 */ + +#define GPIO_FLASH_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN2) + +/* Backlight control: PA.8 + * + * If CONFIG_LCD_TIM1 (and CONFIG_STM32_TIM1) is defined, PA.8 will be + * configured as CH1OUT for variable backlight control. Otherwise, the + * following definition will be used to support a discrete backlight control. + */ + +#define GPIO_LCD_BACKLIGHT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN8) + +/* USB Soft Connect Pullup: PB.14 */ + +#define GPIO_USB_PULLUP (GPIO_OUTPUT|GPIO_CNF_OUTOD|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN14) + +/* LM-75 Temperature Sensor: PB.5 */ + +#define GPIO_LM75_OSINT (GPIO_INPUT|GPIO_CNF_INPULLUP|GPIO_MODE_10MHz|\ + GPIO_EXTI|GPIO_PORTB|GPIO_PIN5) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/* GPIO settings that will be altered when external memory is selected */ + +struct extmem_save_s +{ + uint32_t gpiod_crl; + uint32_t gpiod_crh; + uint32_t gpioe_crl; + uint32_t gpioe_crh; + uint32_t gpiof_crl; + uint32_t gpiof_crh; + uint32_t gpiog_crl; + uint32_t gpiog_crh; +}; + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/* GPIO configurations common to SRAM and NOR Flash */ + +#define NCOMMON_CONFIG 37 +extern const uint16_t g_commonconfig[NCOMMON_CONFIG]; + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the STM3210E-EVAL board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the STM3210E-EVAL board. + * + ************************************************************************************/ + +void weak_function stm32_usbinitialize(void); + +/************************************************************************************ + * Name: stm32_extcontextsave + * + * Description: + * Save current GPIOs that will used by external memory configurations + * + ************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_extcontextsave(struct extmem_save_s *save); + +/************************************************************************************ + * Name: stm32_extcontextrestore + * + * Description: + * Restore GPIOs that were used by external memory configurations + * + ************************************************************************************/ + +void stm32_extcontextrestore(struct extmem_save_s *restore); + +/************************************************************************************ + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for NOR or SRAM + * + ************************************************************************************/ + +void stm32_extmemgpios(const uint16_t *gpios, int ngpios); + +/************************************************************************************ + * Name: stm32_enablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +void stm32_enablefsmc(void); + +/************************************************************************************ + * Name: stm32_disablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +void stm32_disablefsmc(void); + +/************************************************************************************ + * Name: stm32_selectnor + * + * Description: + * Initialize to access NOR flash + * + ************************************************************************************/ + +void stm32_selectnor(void); + +/************************************************************************************ + * Name: stm32_deselectnor + * + * Description: + * Disable NOR FLASH + * + ************************************************************************************/ + +void stm32_deselectnor(void); + +/************************************************************************************ + * Name: stm32_selectsram + * + * Description: + * Initialize to access external SRAM + * + ************************************************************************************/ + +void stm32_selectsram(void); + +/************************************************************************************ + * Name: stm32_deselectsram + * + * Description: + * Disable external SRAM + * + ************************************************************************************/ + +void stm32_deselectsram(void); + +/************************************************************************************ + * Name: stm32_selectlcd + * + * Description: + * Initialize to the LCD + * + ************************************************************************************/ + +void stm32_selectlcd(void); + +/************************************************************************************ + * Name: stm32_deselectlcd + * + * Description: + * Disable the LCD + * + ************************************************************************************/ + +void stm32_deselectlcd(void); + +#endif /* CONFIG_STM32_FSMC */ + +/************************************************************************************ + * Name: stm32_ledpminitialize + * + * Description: + * Register the LEDs to receive power management event callbacks + * + ************************************************************************************/ + +#if defined(CONFIG_PM) && defined(CONFIG_ARCH_LEDS) +void stm32_ledpminitialize(void); +#endif + +/************************************************************************************ + * Name: stm32_pmbuttons + * + * Description: + * Configure all the buttons of the STM3210e-eval board as EXTI, so any button is + * able to wakeup the MCU from the PM_STANDBY mode + * + ************************************************************************************/ + +#if defined(CONFIG_PM) && defined(CONFIG_ARCH_IDLE_CUSTOM) && defined(CONFIG_PM_BUTTONS) +void stm32_pmbuttons(void); +#endif + +/**************************************************************************** + * Name: stm32_djoy_initialization + * + * Description: + * Initialize and register the discrete joystick driver + * + ****************************************************************************/ + +#ifdef CONFIG_DJOYSTICK +int stm32_djoy_initialization(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_STM3210E_EVAL_SRC_STM3210E_EVAL_H */ diff --git a/configs/stm3210e-eval/src/stm32_adc.c b/configs/stm3210e-eval/src/stm32_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..a3beeab10f796ed3b92a4031ed7a0d9bc58b93fd --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_adc.c @@ -0,0 +1,164 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_adc.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32_pwm.h" +#include "stm3210e-eval.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* Up to 3 ADC interfaces are supported */ + +#if STM32_NADC < 3 +# undef CONFIG_STM32_ADC3 +#endif + +#if STM32_NADC < 2 +# undef CONFIG_STM32_ADC2 +#endif + +#if STM32_NADC < 1 +# undef CONFIG_STM32_ADC1 +#endif + +#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3) +#ifndef CONFIG_STM32_ADC1 +# warning "Channel information only available for ADC1" +#endif + +/* The number of ADC channels in the conversion list */ + +#define ADC1_NCHANNELS 1 + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/* Identifying number of each ADC channel: Variable Resistor */ + +#ifdef CONFIG_STM32_ADC1 +static const uint8_t g_chanlist[ADC1_NCHANNELS] = {14}; + +/* Configurations of pins used byte each ADC channels */ + +static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN14}; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ +#ifdef CONFIG_STM32_ADC1 + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + int i; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Configure the pins as analog inputs for the selected channels */ + + for (i = 0; i < ADC1_NCHANNELS; i++) + { + stm32_configgpio(g_pinlist[i]); + } + + /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + + adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +#else + return -ENOSYS; +#endif +} + +#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */ +#endif /* CONFIG_ADC */ diff --git a/configs/stm3210e-eval/src/stm32_appinit.c b/configs/stm3210e-eval/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..abc4e5881d05782db6d37aa98f31dbd85c10b4d6 --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_appinit.c @@ -0,0 +1,286 @@ +/**************************************************************************** + * config/stm3210e_eval/src/stm32_appinit.c + * + * Copyright (C) 2009, 2011, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#ifdef CONFIG_STM32_SPI1 +# include +# include +#endif + +#ifdef CONFIG_STM32_SDIO +# include +# include +#endif + +#include "stm32.h" +#include "stm32_i2c.h" +#include "stm3210e-eval.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* For now, don't build in any SPI1 support -- NSH is not using it */ + +#undef CONFIG_STM32_SPI1 + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_STM3210E_EVAL +# define NSH_HAVEUSBDEV 1 +# define NSH_HAVEMMCSD 1 +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0 +# error "Only one MMC/SD slot" +# undef CONFIG_NSH_MMCSDSLOTNO +# endif +# ifndef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#else + /* Add configuration for new STM32 boards here */ +# error "Unrecognized STM32 board" +# undef NSH_HAVEUSBDEV +# undef NSH_HAVEMMCSD +#endif + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support + * is not enabled. + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SDIO) +# undef NSH_HAVEMMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_i2c_register + * + * Description: + * Register one I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void stm32_i2c_register(int bus) +{ + FAR struct i2c_master_s *i2c; + int ret; + + i2c = stm32_i2cbus_initialize(bus); + if (i2c == NULL) + { + dbg("ERROR: Failed to get I2C%d interface\n", bus); + } + else + { + ret = i2c_register(i2c, bus); + if (ret < 0) + { + dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); + stm32_i2cbus_uninitialize(i2c); + } + } +} +#endif + +/**************************************************************************** + * Name: stm32_i2ctool + * + * Description: + * Register I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void stm32_i2ctool(void) +{ +#ifdef CONFIG_STM32_I2C1 + stm32_i2c_register(1); +#endif +#ifdef CONFIG_STM32_I2C2 + stm32_i2c_register(2); +#endif +#ifdef CONFIG_STM32_I2C3 + stm32_i2c_register(3); +#endif +} +#else +# define stm32_i2ctool() +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef CONFIG_STM32_SPI1 + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; +#endif +#ifdef NSH_HAVEMMCSD + FAR struct sdio_dev_s *sdio; +#endif +#if defined(NSH_HAVEMMCSD) || defined(CONFIG_DJOYSTICK) + int ret; +#endif + + /* Register I2C drivers on behalf of the I2C tool */ + + stm32_i2ctool(); + + /* Configure SPI-based devices */ + +#ifdef CONFIG_STM32_SPI1 + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port 1\n"); + spi = stm32_spibus_initialize(1); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port 0\n"); + return -ENODEV; + } + syslog(LOG_INFO, "Successfully initialized SPI port 0\n"); + + /* Now bind the SPI interface to the M25P64/128 SPI FLASH driver */ + + syslog(LOG_INFO, "Bind SPI to the SPI flash driver\n"); + + mtd = m25p_initialize(spi); + if (!mtd) + { + syslog(LOG_ERR, "ERROR: Failed to bind SPI port 0 to the SPI FLASH driver\n"); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully bound SPI port 0 to the SPI FLASH driver\n"); +#warning "Now what are we going to do with this SPI FLASH driver?" +#endif + + /* Create the SPI FLASH MTD instance */ + /* The M25Pxx is not a give media to implement a file system.. + * its block sizes are too large + */ + + /* Mount the SDIO-based MMC/SD block driver */ + +#ifdef NSH_HAVEMMCSD + /* First, get an instance of the SDIO interface */ + + syslog(LOG_INFO, "Initializing SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + + sdio = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!sdio) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + syslog(LOG_INFO, "Bind SDIO to the MMC/SD driver, minor=%d\n", + CONFIG_NSH_MMCSDMINOR); + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdio); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SDIO to the MMC/SD driver\n"); + + /* Then let's guess and say that there is a card in the slot. I need to check to + * see if the STM3210E-EVAL board supports a GPIO to detect if there is a card in + * the slot. + */ + + sdio_mediachange(sdio, true); +#endif + +#ifdef CONFIG_DJOYSTICK + /* Initialize and register the joystick driver */ + + ret = stm32_djoy_initialization(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to register the joystick driver: %d\n", ret); + return ret; + } + + syslog(LOG_INFO, "Successfully registered the joystick driver\n"); +#endif + + return OK; +} diff --git a/configs/stm3210e-eval/src/stm32_boot.c b/configs/stm3210e-eval/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..1f2a1a7dc01eee9e53036ae4a26a32d700fda8ce --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_boot.c @@ -0,0 +1,108 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_boot.c + * + * Copyright (C) 2009, 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "stm3210e-eval.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* If the FSMC and FSMC_SRAM are selected, then enable SRAM access */ + +#if defined(CONFIG_STM32_FSMC) && defined(CONFIG_STM32_FSMC_SRAM) + stm32_selectsram(); +#endif + + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB) + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/stm3210e-eval/src/stm32_buttons.c b/configs/stm3210e-eval/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..526309f01785ac885254e116071d281310c0724c --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_buttons.c @@ -0,0 +1,178 @@ +/**************************************************************************** + * configs/stm3210e-eval/src/stm32_buttons.c + * + * Copyright (C) 2009, 2011, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "stm3210e-eval.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each STM3210E-EVAL button. This array is indexed by + * the BUTTON_* and JOYSTICK_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_WAKEUP, GPIO_BTN_TAMPER, GPIO_BTN_KEY, + + /* The Joystick is treated like the other buttons unless CONFIG_DJOYSTICK + * is defined, then it is assumed that they should be used by the discrete + * joystick driver. + */ + +#ifndef CONFIG_DJOYSTICK + GPIO_JOY_SEL, GPIO_JOY_DOWN, GPIO_JOY_LEFT, GPIO_JOY_RIGHT, GPIO_JOY_UP +#endif +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for some pins but NOT used in this file + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed for most keys. The exception + * is the WAKEUP button. + */ + + bool released = stm32_gpioread(g_buttons[i]); + if (i == BUTTON_WAKEUP) + { + released = !released; + } + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT and JOYSTICK_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/stm3210e-eval/src/stm32_can.c b/configs/stm3210e-eval/src/stm32_can.c new file mode 100644 index 0000000000000000000000000000000000000000..2efb493ca1c62b7c1d1a93dcfce6e37a3da2e07b --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_can.c @@ -0,0 +1,133 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_can.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32.h" +#include "stm32_can.h" +#include "stm3210e-eval.h" + +#if defined(CONFIG_CAN) && defined(CONFIG_STM32_CAN1) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* The STM32F103ZE supports only CAN1 */ + +#define CAN_PORT 1 + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = stm32_caninitialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && CONFIG_STM32_CAN1 */ diff --git a/configs/stm3210e-eval/src/stm32_composite.c b/configs/stm3210e-eval/src/stm32_composite.c new file mode 100644 index 0000000000000000000000000000000000000000..d38a3f6a5203303b393a7d8efb6ff06717fb55b1 --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_composite.c @@ -0,0 +1,145 @@ +/**************************************************************************** + * configs/stm3210e-eval/src/stm32_composite.c + * + * Copyright (C) 2009, 2011, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the STM32 MMC/SD SDIO block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "stm32.h" + +/* There is nothing to do here if SDIO support is not selected. */ + +#if defined(CONFIG_STM32_SDIO) && defined(CONFIG_USBDEV_COMPOSITE) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_COMPOSITE_DEVMINOR1 +# define CONFIG_SYSTEM_COMPOSITE_DEVMINOR1 0 +#endif + +/* SLOT number(s) could depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_STM3210E_EVAL +# undef STM32_MMCSDSLOTNO +# define STM32_MMCSDSLOTNO 0 +#else + /* Add configuration for new STM32 boards here */ +# error "Unrecognized STM32 board" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_composite_initialize + * + * Description: + * Perform architecture specific initialization of a composite USB device. + * + ****************************************************************************/ + +int board_composite_initialize(int port) +{ + /* If system/composite is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see + * stm32_appinit.c). In this case, there is nothing further to be done here. + * + * NOTE: CONFIG_NSH_BUILTIN_APPS is not a fool-proof indication that NSH + * was built. + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS + FAR struct sdio_dev_s *sdio; + int ret; + + /* First, get an instance of the SDIO interface */ + + syslog(LOG_INFO, "Initializing SDIO slot %d\n", STM32_MMCSDSLOTNO); + + sdio = sdio_initialize(STM32_MMCSDSLOTNO); + if (!sdio) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + STM32_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + syslog(LOG_INFO, "Bind SDIO to the MMC/SD driver, minor=%d\n", + CONFIG_SYSTEM_COMPOSITE_DEVMINOR1); + + ret = mmcsd_slotinitialize(CONFIG_SYSTEM_COMPOSITE_DEVMINOR1, sdio); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", + ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SDIO to the MMC/SD driver\n"); + + /* Then let's guess and say that there is a card in the slot. I need to check to + * see if the STM3210E-EVAL board supports a GPIO to detect if there is a card in + * the slot. + */ + + sdio_mediachange(sdio, true); + +#endif /* CONFIG_NSH_BUILTIN_APPS */ + + return OK; +} + +#endif /* CONFIG_STM32_SDIO && CONFIG_USBDEV_COMPOSITE */ diff --git a/configs/stm3210e-eval/src/stm32_deselectlcd.c b/configs/stm3210e-eval/src/stm32_deselectlcd.c new file mode 100644 index 0000000000000000000000000000000000000000..b9c155e3db7a4c1c3da99bbb0fb3ffa233b5d004 --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_deselectlcd.c @@ -0,0 +1,96 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_deselectlcd.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include "up_arch.h" +#include "stm32_fsmc.h" +#include "stm3210e-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_deselectlcd + * + * Description: + * Disable the LCD + * + ************************************************************************************/ + +void stm32_deselectlcd(void) +{ + /* Restore registers to their power up settings */ + + putreg32(0xffffffff, STM32_FSMC_BCR4); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32(0x0fffffff, STM32_FSMC_BTR4); + + /* Disable AHB clocking to the FSMC */ + + stm32_disablefsmc(); +} + +#endif /* CONFIG_STM32_FSMC */ + + + diff --git a/configs/stm3210e-eval/src/stm32_deselectnor.c b/configs/stm3210e-eval/src/stm32_deselectnor.c new file mode 100644 index 0000000000000000000000000000000000000000..a46fb9bde2f7d35b843033731b4add2cdb6bf25c --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_deselectnor.c @@ -0,0 +1,94 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_deselectnor.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include "up_arch.h" +#include "stm32_fsmc.h" +#include "stm3210e-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_deselectnor + * + * Description: + * Disable NOR FLASH + * + ************************************************************************************/ + +void stm32_deselectnor(void) +{ + /* Restore registers to their power up settings */ + + putreg32(0x000030d2, STM32_FSMC_BCR2); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32(0x0fffffff, STM32_FSMC_BTR2); + + /* Disable AHB clocking to the FSMC */ + + stm32_disablefsmc(); +} + +#endif /* CONFIG_STM32_FSMC */ + diff --git a/configs/stm3210e-eval/src/stm32_deselectsram.c b/configs/stm3210e-eval/src/stm32_deselectsram.c new file mode 100644 index 0000000000000000000000000000000000000000..a57cab1f6ac550395043ae1044631850f611646d --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_deselectsram.c @@ -0,0 +1,96 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_deselectsram.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include "up_arch.h" +#include "stm32_fsmc.h" +#include "stm3210e-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_deselectsram + * + * Description: + * Disable NOR FLASH + * + ************************************************************************************/ + +void stm32_deselectsram(void) +{ + /* Restore registers to their power up settings */ + + putreg32(0x000030d2, STM32_FSMC_BCR3); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32(0x0fffffff, STM32_FSMC_BTR3); + + /* Disable AHB clocking to the FSMC */ + + stm32_disablefsmc(); +} + +#endif /* CONFIG_STM32_FSMC */ + + + diff --git a/configs/stm3210e-eval/src/stm32_djoystick.c b/configs/stm3210e-eval/src/stm32_djoystick.c new file mode 100644 index 0000000000000000000000000000000000000000..a8d9001f7e9eaf6d83694ae4dcd945652fd15781 --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_djoystick.c @@ -0,0 +1,306 @@ +/**************************************************************************** + * configs/stm3210e-eval/src/stm32_djoystick.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm3210e-eval.h" + +#ifdef CONFIG_DJOYSTICK + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Number of Joystick discretes */ + +#define DJOY_NGPIOS 5 + +/* Bitset of supported Joystick discretes */ + +#define DJOY_SUPPORTED (DJOY_UP_BIT | DJOY_DOWN_BIT | DJOY_LEFT_BIT | \ + DJOY_RIGHT_BIT | DJOY_BUTTON_SELECT_BIT) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static djoy_buttonset_t djoy_supported(FAR const struct djoy_lowerhalf_s *lower); +static djoy_buttonset_t djoy_sample(FAR const struct djoy_lowerhalf_s *lower); +static void djoy_enable(FAR const struct djoy_lowerhalf_s *lower, + djoy_buttonset_t press, djoy_buttonset_t release, + djoy_interrupt_t handler, FAR void *arg); + +static void djoy_disable(void); +static int djoy_interrupt(int irq, FAR void *context); + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each STM3210E-EVAL joystick "button." Index using + * DJOY_* definitions in include/nuttx/input/djoystick.h. + */ + +static const uint16_t g_joygpio[DJOY_NGPIOS] = +{ + GPIO_JOY_UP, GPIO_JOY_DOWN, GPIO_JOY_LEFT, GPIO_JOY_RIGHT, GPIO_JOY_SEL +}; + +/* Current interrupt handler and argument */ + +static djoy_interrupt_t g_djoyhandler; +static FAR void *g_djoyarg; + +/* This is the discrete joystick lower half driver interface */ + +static const struct djoy_lowerhalf_s g_djoylower = +{ + .dl_supported = djoy_supported, + .dl_sample = djoy_sample, + .dl_enable = djoy_enable, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: djoy_supported + * + * Description: + * Return the set of buttons supported on the discrete joystick device + * + ****************************************************************************/ + +static djoy_buttonset_t djoy_supported(FAR const struct djoy_lowerhalf_s *lower) +{ + ivdbg("Supported: %02x\n", DJOY_SUPPORTED); + return (djoy_buttonset_t)DJOY_SUPPORTED; +} + +/**************************************************************************** + * Name: djoy_sample + * + * Description: + * Return the current state of all discrete joystick buttons + * + ****************************************************************************/ + +static djoy_buttonset_t djoy_sample(FAR const struct djoy_lowerhalf_s *lower) +{ + djoy_buttonset_t ret = 0; + int i; + + /* Read each joystick GPIO value */ + + for (i = 0; i < DJOY_NGPIOS; i++) + { + bool released = stm32_gpioread(g_joygpio[i]); + if (!released) + { + ret |= (1 << i); + } + } + + ivdbg("Retuning: %02x\n", DJOY_SUPPORTED); + return ret; +} + +/**************************************************************************** + * Name: djoy_enable + * + * Description: + * Enable interrupts on the selected set of joystick buttons. And empty + * set will disable all interrupts. + * + ****************************************************************************/ + +static void djoy_enable(FAR const struct djoy_lowerhalf_s *lower, + djoy_buttonset_t press, djoy_buttonset_t release, + djoy_interrupt_t handler, FAR void *arg) +{ + irqstate_t flags; + djoy_buttonset_t either = press | release; + djoy_buttonset_t bit; + bool rising; + bool falling; + int i; + + /* Start with all interrupts disabled */ + + flags = enter_critical_section(); + djoy_disable(); + + illvdbg("press: %02x release: %02x handler: %p arg: %p\n", + press, release, handler, arg); + + /* If no events are indicated or if no handler is provided, then this + * must really be a request to disable interrupts. + */ + + if (either && handler) + { + /* Save the new the handler and argument */ + + g_djoyhandler = handler; + g_djoyarg = arg; + + /* Check each GPIO. */ + + for (i = 0; i < DJOY_NGPIOS; i++) + { + /* Enable interrupts on each pin that has either a press or + * release event associated with it. + */ + + bit = (1 << i); + if ((either & bit) != 0) + { + /* Active low so a press corresponds to a falling edge and + * a release corresponds to a rising edge. + */ + + falling = ((press & bit) != 0); + rising = ((release & bit) != 0); + + illvdbg("GPIO %d: rising: %d falling: %d\n", + i, rising, falling); + + (void)stm32_gpiosetevent(g_joygpio[i], rising, falling, + true, djoy_interrupt); + } + } + } + + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: djoy_disable + * + * Description: + * Disable all joystick interrupts + * + ****************************************************************************/ + +static void djoy_disable(void) +{ + irqstate_t flags; + int i; + + /* Disable each joystick interrupt */ + + flags = enter_critical_section(); + for (i = 0; i < DJOY_NGPIOS; i++) + { + (void)stm32_gpiosetevent(g_joygpio[i], false, false, false, NULL); + } + + leave_critical_section(flags); + + /* Nullify the handler and argument */ + + g_djoyhandler = NULL; + g_djoyarg = NULL; +} + +/**************************************************************************** + * Name: djoy_interrupt + * + * Description: + * Discrete joystick interrupt handler + * + ****************************************************************************/ + +static int djoy_interrupt(int irq, FAR void *context) +{ + DEBUGASSERT(g_djoyhandler); + if (g_djoyhandler) + { + g_djoyhandler(&g_djoylower, g_djoyarg); + } + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_djoy_initialization + * + * Description: + * Initialize and register the discrete joystick driver + * + ****************************************************************************/ + +int stm32_djoy_initialization(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE: This is unnecessary for + * interrupting pins since it will also be done by stm32_gpiosetevent(). + */ + + for (i = 0; i < DJOY_NGPIOS; i++) + { + stm32_configgpio(g_joygpio[i]); + } + + /* Make sure that all interrupts are disabled */ + + djoy_disable(); + + /* Register the joystick device as /dev/djoy0 */ + + return djoy_register("/dev/djoy0", &g_djoylower); +} + +#endif /* CONFIG_DJOYSTICK */ diff --git a/configs/stm3210e-eval/src/stm32_extcontext.c b/configs/stm3210e-eval/src/stm32_extcontext.c new file mode 100644 index 0000000000000000000000000000000000000000..9f2155402b1c31d8e158c175daac17280b57bbad --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_extcontext.c @@ -0,0 +1,116 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_extcontext.c + * + * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm3210e-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_extcontextsave + * + * Description: + * Save current GPIOs that will used by external memory configurations + * + ************************************************************************************/ + +void stm32_extcontextsave(struct extmem_save_s *save) +{ + DEBUGASSERT(save != NULL); + save->gpiod_crl = getreg32(STM32_GPIOE_CRL); + save->gpiod_crh = getreg32(STM32_GPIOE_CRH); + save->gpioe_crl = getreg32(STM32_GPIOD_CRL); + save->gpioe_crh = getreg32(STM32_GPIOD_CRH); + save->gpiof_crl = getreg32(STM32_GPIOF_CRL); + save->gpiof_crh = getreg32(STM32_GPIOF_CRH); + save->gpiog_crl = getreg32(STM32_GPIOG_CRL); + save->gpiog_crh = getreg32(STM32_GPIOG_CRH); +} + +/************************************************************************************ + * Name: stm32_extcontextrestore + * + * Description: + * Restore GPIOs that were used by external memory configurations + * + ************************************************************************************/ + +void stm32_extcontextrestore(struct extmem_save_s *restore) +{ + DEBUGASSERT(restore != NULL); + putreg32(restore->gpiod_crl, STM32_GPIOE_CRL); + putreg32(restore->gpiod_crh, STM32_GPIOE_CRH); + putreg32(restore->gpioe_crl, STM32_GPIOD_CRL); + putreg32(restore->gpioe_crh, STM32_GPIOD_CRH); + putreg32(restore->gpiof_crl, STM32_GPIOF_CRL); + putreg32(restore->gpiof_crh, STM32_GPIOF_CRH); + putreg32(restore->gpiog_crl, STM32_GPIOG_CRL); + putreg32(restore->gpiog_crh, STM32_GPIOG_CRH); +} + +#endif /* CONFIG_STM32_FSMC */ + + diff --git a/configs/stm3210e-eval/src/stm32_extmem.c b/configs/stm3210e-eval/src/stm32_extmem.c new file mode 100644 index 0000000000000000000000000000000000000000..27602797b3e1778d995ce0b779c025148968071b --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_extmem.c @@ -0,0 +1,190 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_extmem.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32_fsmc.h" +#include "stm32_gpio.h" +#include "stm32.h" +#include "stm3210e-eval.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_STM32_FSMC +# warning "FSMC is not enabled" +#endif + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/* 512Kx16 SRAM is connected to bank2 of the FSMC interface and both 8- and 16-bit + * accesses are allowed by BLN0 and BLN1 connected to BLE and BHE of SRAM, + * respectively. + * + * Pin Usage (per schematic) + * + * FLASH SRAM NAND LCD + * D[0..15] [0..15] [0..15] [0..7] [0..15] + * A[0..23] [0..22] [0..18] [16,17] [0] + * FSMC_NBL0 PE0 OUT ~BLE --- --- --- + * FSMC_NBL1 PE1 OUT ~BHE --- --- --- + * FSMC_NE2 PG9 OUT --- ~E --- --- + * FSMC_NE3 PG10 OUT ~CE --- --- --- + * FSMC_NE4 PG12 OUT --- --- --- ~CS + * FSMC_NWE PD5 OUT ~WE ~W ~W ~WR/SCL + * FSMC_NOE PD4 OUT ~OE ~G ~R ~RD + * FSMC_NWAIT PD6 IN --- R~B --- --- + * FSMC_INT2 PG6* IN --- --- R~B --- + * + * *JP7 will switch to PD6 + */ + +/* It would be much more efficient to brute force these all into the + * the appropriate registers. Just a little tricky. + */ + +/* GPIO configurations common to SRAM and NOR Flash */ + +const uint16_t g_commonconfig[NCOMMON_CONFIG] = +{ + /* A0... A18 */ + + GPIO_NPS_A0, GPIO_NPS_A1, GPIO_NPS_A2, GPIO_NPS_A3, + GPIO_NPS_A4, GPIO_NPS_A5, GPIO_NPS_A6, GPIO_NPS_A7, + GPIO_NPS_A8, GPIO_NPS_A9, GPIO_NPS_A10, GPIO_NPS_A11, + GPIO_NPS_A12, GPIO_NPS_A13, GPIO_NPS_A14, GPIO_NPS_A15, + GPIO_NPS_A16, GPIO_NPS_A17, GPIO_NPS_A18, + + /* D0... D15 */ + + GPIO_NPS_D0, GPIO_NPS_D1, GPIO_NPS_D2, GPIO_NPS_D3, + GPIO_NPS_D4, GPIO_NPS_D5, GPIO_NPS_D6, GPIO_NPS_D7, + GPIO_NPS_D8, GPIO_NPS_D9, GPIO_NPS_D10, GPIO_NPS_D11, + GPIO_NPS_D12, GPIO_NPS_D13, GPIO_NPS_D14, GPIO_NPS_D15, + + /* NOE, NWE */ + + GPIO_NPS_NOE, GPIO_NPS_NWE +}; + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for NOR or SRAM + * + ************************************************************************************/ + +void stm32_extmemgpios(const uint16_t *gpios, int ngpios) +{ + int i; + + /* Configure GPIOs */ + + for (i = 0; i < ngpios; i++) + { + stm32_configgpio(gpios[i]); + } +} + +/************************************************************************************ + * Name: stm32_enablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +void stm32_enablefsmc(void) +{ + uint32_t regval; + + /* Enable AHB clocking to the FSMC */ + + regval = getreg32( STM32_RCC_AHBENR); + regval |= RCC_AHBENR_FSMCEN; + putreg32(regval, STM32_RCC_AHBENR); +} + +/************************************************************************************ + * Name: stm32_disablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +void stm32_disablefsmc(void) +{ + uint32_t regval; + + /* Enable AHB clocking to the FSMC */ + + regval = getreg32( STM32_RCC_AHBENR); + regval &= ~RCC_AHBENR_FSMCEN; + putreg32(regval, STM32_RCC_AHBENR); +} diff --git a/configs/stm3210e-eval/src/stm32_idle.c b/configs/stm3210e-eval/src/stm32_idle.c new file mode 100644 index 0000000000000000000000000000000000000000..aba327a64c94d245591c20f5cd8a2d0f9f9e7c20 --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_idle.c @@ -0,0 +1,449 @@ +/**************************************************************************** + * configs/stm3210e-eval/src/stm32_idle.c + * + * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include + +#include +#include + +#include "up_internal.h" +#include "stm32_pm.h" +#include "stm32_rcc.h" +#include "stm32_exti.h" +#include "stm32_rtc.h" + +#include "stm3210e-eval.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* Does the board support an IDLE LED to indicate that the board is in the + * IDLE state? + */ + +#if defined(CONFIG_ARCH_LEDS) && defined(LED_IDLE) +# define BEGIN_IDLE() board_autoled_on(LED_IDLE) +# define END_IDLE() board_autoled_off(LED_IDLE) +#else +# define BEGIN_IDLE() +# define END_IDLE() +#endif + +/* Values for the RTC Alarm to wake up from the PM_STANDBY mode + * (which corresponds to STM32 stop mode). If this alarm expires, + * the logic in this file will wakeup from PM_STANDBY mode and + * transition to PM_SLEEP mode (STM32 standby mode). + */ + +#ifndef CONFIG_PM_ALARM_SEC +# define CONFIG_PM_ALARM_SEC 15 +#endif + +#ifndef CONFIG_PM_ALARM_NSEC +# define CONFIG_PM_ALARM_NSEC 0 +#endif + +/* Values for the RTC Alarm to reset from the PM_SLEEP mode (STM32 + * standby mode). If CONFIG_PM_SLEEP_WAKEUP is defined in the + * configuration, then the logic in this file will program the RTC + * alarm to wakeup the processor after an a delay. + * + * This feature might be useful, for example, in a system that needs to + * use minimal power but awake up to perform some task at periodic + * intervals. + */ + +#ifdef CONFIG_PM_SLEEP_WAKEUP + +# ifndef CONFIG_RTC_ALARM +# error "CONFIG_RTC_ALARM should be enabled to use CONFIG_PM_SLEEP_WAKEUP" +# endif + + /* If CONFIG_PM_SLEEP_WAKEUP is defined, then CONFIG_PM_SLEEP_WAKEUP_SEC + * and CONFIG_PM_SLEEP_WAKEUP_NSEC define the delay until the STM32 + * awakens from PM_SLEEP mode. + */ + +# ifndef CONFIG_PM_SLEEP_WAKEUP_SEC +# define CONFIG_PM_SLEEP_WAKEUP_SEC 10 +# endif + +# ifndef CONFIG_PM_SLEEP_WAKEUP_NSEC +# define CONFIG_PM_SLEEP_WAKEUP_NSEC 0 +# endif +#endif + +#define PM_IDLE_DOMAIN 0 /* Revisit */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_PM) && defined(CONFIG_RTC_ALARM) +static volatile bool g_alarmwakeup; /* Wakeup Alarm indicator */ +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_alarmcb + * + * Description: + * RTC alarm callback + * + ****************************************************************************/ + +#if defined(CONFIG_PM) && defined(CONFIG_RTC_ALARM) +static void stm32_alarmcb(void) +{ + /* Note that we were awaken by an alarm */ + + g_alarmwakeup = true; +} +#endif + +/**************************************************************************** + * Name: stm32_alarm_exti + * + * Description: + * RTC alarm EXTI interrupt service routine + * + ****************************************************************************/ + +#if defined(CONFIG_PM) && defined(CONFIG_RTC_ALARM) +static int stm32_alarm_exti(int irq, FAR void *context) +{ + stm32_alarmcb(); + return OK; +} +#endif + +/**************************************************************************** + * Name: stm32_exti_cancel + * + * Description: + * Disable the ALARM EXTI interrupt + * + ****************************************************************************/ + +#if defined(CONFIG_PM) && defined(CONFIG_RTC_ALARM) +static void stm32_exti_cancel(void) +{ + (void)stm32_exti_alarm(false, false, false, NULL); +} +#endif + +/**************************************************************************** + * Name: stm32_rtc_alarm + * + * Description: + * Set the alarm + * + ****************************************************************************/ + +#if defined(CONFIG_PM) && defined(CONFIG_RTC_ALARM) +static int stm32_rtc_alarm(time_t tv_sec, time_t tv_nsec, bool exti) +{ + struct timespec alarmtime; + int ret; + + /* Configure to receive RTC Alarm EXTI interrupt */ + + if (exti) + { + /* TODO: Make sure that that is no pending EXTI interrupt */ + + (void)stm32_exti_alarm(true, true, true, stm32_alarm_exti); + } + + /* Configure the RTC alarm to Auto Wake the system */ + + (void)up_rtc_gettime(&alarmtime); + + alarmtime.tv_sec += tv_sec; + alarmtime.tv_nsec += tv_nsec; + + /* The tv_nsec value must not exceed 1,000,000,000. That + * would be an invalid time. + */ + + if (alarmtime.tv_nsec >= NSEC_PER_SEC) + { + /* Carry to the seconds */ + + alarmtime.tv_sec++; + alarmtime.tv_nsec -= NSEC_PER_SEC; + } + + /* Set the alarm */ + + g_alarmwakeup = false; + ret = stm32_rtc_setalarm(&alarmtime, stm32_alarmcb); + if (ret < 0) + { + lldbg("Warning: The alarm is already set\n"); + } + + return ret; +} +#endif + +/**************************************************************************** + * Name: stm32_idlepm + * + * Description: + * Perform IDLE state power management. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void stm32_idlepm(void) +{ + static enum pm_state_e oldstate = PM_NORMAL; + enum pm_state_e newstate; + int ret; + + /* The following is logic that is done after the wake-up from PM_STANDBY + * state. It decides whether to go back to the PM_NORMAL or to the deeper + * power-saving mode PM_SLEEP: If the alarm expired with no "normal" + * wake-up event, then PM_SLEEP is entered. + * + * Logically, this code belongs at the end of the PM_STANDBY case below, + * does not work in the position for some unkown reason. + */ + + if (oldstate == PM_STANDBY) + { + /* Were we awakened by the alarm? */ + +#ifdef CONFIG_RTC_ALARM + if (g_alarmwakeup) + { + /* Yes.. Go to SLEEP mode */ + + newstate = PM_SLEEP; + } + else +#endif + { + /* Resume normal operation */ + + newstate = PM_NORMAL; + } + } + else + { + /* Let the PM system decide, which power saving level can be obtained */ + + newstate = pm_checkstate(PM_IDLE_DOMAIN); + } + + /* Check for state changes */ + + if (newstate != oldstate) + { + llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate); + + sched_lock(); + + /* Force the global state change */ + + ret = pm_changestate(PM_IDLE_DOMAIN, newstate); + if (ret < 0) + { + /* The new state change failed, revert to the preceding state */ + + (void)pm_changestate(PM_IDLE_DOMAIN, oldstate); + + /* No state change... */ + + goto errout; + } + + /* Then perform board-specific, state-dependent logic here */ + + switch (newstate) + { + case PM_NORMAL: + { + /* If we just awakened from PM_STANDBY mode, then reconfigure + * clocking. + */ + + if (oldstate == PM_STANDBY) + { + /* Re-enable clocking */ + + stm32_clockenable(); + + /* The system timer was disabled while in PM_STANDBY or + * PM_SLEEP modes. But the RTC has still be running: Reset + * the system time the current RTC time. + */ + +#ifdef CONFIG_RTC + clock_synchronize(); +#endif + } + } + break; + + case PM_IDLE: + { + } + break; + + case PM_STANDBY: + { + /* Set the alarm as an EXTI Line */ + +#ifdef CONFIG_RTC_ALARM + stm32_rtc_alarm(CONFIG_PM_ALARM_SEC, CONFIG_PM_ALARM_NSEC, true); +#endif + /* Wait 10ms */ + + up_mdelay(10); + + /* Enter the STM32 stop mode */ + + (void)stm32_pmstop(false); + + /* We have been re-awakened by some even: A button press? + * An alarm? Cancel any pending alarm and resume the normal + * operation. + */ + +#ifdef CONFIG_RTC_ALARM + stm32_exti_cancel(); + ret = stm32_rtc_cancelalarm(); + if (ret < 0) + { + lldbg("Warning: Cancel alarm failed\n"); + } +#endif + /* Note: See the additional PM_STANDBY related logic at the + * beginning of this function. That logic is executed after + * this point. + */ + } + break; + + case PM_SLEEP: + { + /* We should not return from standby mode. The only way out + * of standby is via the reset path. + */ + + /* Configure the RTC alarm to Auto Reset the system */ + +#ifdef CONFIG_PM_SLEEP_WAKEUP + stm32_rtc_alarm(CONFIG_PM_SLEEP_WAKEUP_SEC, CONFIG_PM_SLEEP_WAKEUP_NSEC, false); +#endif + /* Wait 10ms */ + + up_mdelay(10); + + /* Enter the STM32 standby mode */ + + (void)stm32_pmstandby(); + } + break; + + default: + break; + } + + /* Save the new state */ + + oldstate = newstate; + +errout: + sched_unlock(); + } +} +#else +# define stm32_idlepm() +#endif /* CONFIG_PM */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_idle + * + * Description: + * up_idle() is the logic that will be executed when their is no other + * ready-to-run task. This is processor idle time and will continue until + * some interrupt occurs to cause a context switch from the idle task. + * + * Processing in this state may be processor-specific. e.g., this is where + * power management operations might be performed. + * + ****************************************************************************/ + +void up_idle(void) +{ +#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS) + /* If the system is idle and there are no timer interrupts, then process + * "fake" timer interrupts. Hopefully, something will wake up. + */ + + sched_process_timer(); +#else + + /* Perform IDLE mode power management */ + + BEGIN_IDLE(); + stm32_idlepm(); + END_IDLE(); +#endif +} diff --git a/configs/stm3210e-eval/src/stm32_lcd.c b/configs/stm3210e-eval/src/stm32_lcd.c new file mode 100644 index 0000000000000000000000000000000000000000..ed7ca1f2d8ff0de91ee5809cbe4f53e4964ee911 --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_lcd.c @@ -0,0 +1,1871 @@ +/************************************************************************************** + * configs/stm3210e-eval/src/stm32_lcd.c + * + * Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * With power management enhancements by: + * + * Author: Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************/ +/* This driver supports the following LCDs: + * + * 1. Ampire AM-240320LTNQW00H + * 2. Orise Tech SPFD5408B + * 3. RenesasSP R61580 + * + * The driver dynamically selects the LCD based on the reported LCD ID value. However, + * code size can be reduced by suppressing support for individual LCDs using: + * + * CONFIG_STM3210E_AM240320_DISABLE + * CONFIG_STM3210E_SPFD5408B_DISABLE + * CONFIG_STM3210E_R61580_DISABLE + * + * Omitting the above (or setting them to "n") enables support for the LCD. Setting + * any of the above to "y" will disable support for the corresponding LCD. + */ + +/************************************************************************************** + * Included Files + **************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm3210e-eval.h" + +/************************************************************************************** + * Pre-processor Definitions + **************************************************************************************/ +/* Configuration **********************************************************************/ +/* Check contrast selection */ + +#if !defined(CONFIG_LCD_MAXCONTRAST) +# define CONFIG_LCD_MAXCONTRAST 1 +#endif + +/* Backlight */ + +#ifndef CONFIG_STM3210E_LCD_BACKLIGHT +# undef CONFIG_STM3210E_LCD_PWM +#endif + +#if defined(CONFIG_STM3210E_LCD_BACKLIGHT) && defined(CONFIG_STM3210E_LCD_PWM) +# if !defined(CONFIG_STM32_TIM1) +# warning "CONFIG_STM3210E_LCD_PWM requires CONFIG_STM32_TIM1" +# undef CONFIG_STM3210E_LCD_PWM +# endif +# if defined(CONFIG_STM32_TIM1_FULL_REMAP) +# warning "PA8 cannot be configured as TIM1 CH1 with full remap" +# undef CONFIG_STM3210E_LCD_PWM +# endif +#endif + +#if defined(CONFIG_STM3210E_LCD_BACKLIGHT) && defined(CONFIG_STM3210E_LCD_PWM) +# if CONFIG_LCD_MAXPOWER < 2 +# warning "A larger value of CONFIG_LCD_MAXPOWER is recommended" +# endif +#endif + +/* Check power setting */ + +#if !defined(CONFIG_LCD_MAXPOWER) || CONFIG_LCD_MAXPOWER < 1 +# undef CONFIG_LCD_MAXPOWER +# if defined(CONFIG_STM3210E_LCD_BACKLIGHT) && defined(CONFIG_STM3210E_LCD_PWM) +# define CONFIG_LCD_MAXPOWER 100 +# else +# define CONFIG_LCD_MAXPOWER 1 +# endif +#endif + +#if CONFIG_LCD_MAXPOWER > 255 +# error "CONFIG_LCD_MAXPOWER must be less than 256 to fit in uint8_t" +#endif + +/* PWM Frequency */ + +#ifndef CONFIG_STM3210E_LCD_PWMFREQUENCY +# define CONFIG_STM3210E_LCD_PWMFREQUENCY 100 +#endif + +/* Check orientation */ + +#if defined(CONFIG_LCD_PORTRAIT) +# if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RPORTRAIT) +# error "Cannot define both portrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_RPORTRAIT) +# if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_PORTRAIT) +# error "Cannot define both rportrait and any other orientations" +# endif +#elif !defined(CONFIG_LCD_LANDSCAPE) +# define CONFIG_LCD_LANDSCAPE 1 +#endif + +/* When reading 16-bit gram data, there may some shifts in the returned data + * and/or there may be some colors in the incorrect posisions: + * + * - SPFD5408B: There appears to be a 5-bit shift in the returned data. + * Red and green appear to be swapped on read-back as well + * - R61580: There is a 16-bit (1 pixel) shift in the returned data. + * - AM240320: Unknown -- assume colors are correct for now. + */ + +#define SPFD5408B_RDSHIFT 5 + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* Display/Color Properties ***********************************************************/ +/* Display Resolution */ + +#ifdef CONFIG_LCD_LANDSCAPE +# define STM3210E_XRES 320 +# define STM3210E_YRES 240 +#else +# define STM3210E_XRES 240 +# define STM3210E_YRES 320 +#endif + +/* Color depth and format */ + +#define STM3210E_BPP 16 +#define STM3210E_COLORFMT FB_FMT_RGB16_565 + +/* STM3210E-EVAL LCD Hardware Definitions *********************************************/ +/* LCD /CS is CE4, Bank 4 of NOR/SRAM Bank 1~4 */ + +#define STM3210E_LCDBASE ((uint32_t)(0x60000000 | 0x0c000000)) +#define LCD ((struct lcd_regs_s *) STM3210E_LCDBASE) + +#define LCD_REG_0 0x00 +#define LCD_REG_1 0x01 +#define LCD_REG_2 0x02 +#define LCD_REG_3 0x03 +#define LCD_REG_4 0x04 +#define LCD_REG_5 0x05 +#define LCD_REG_6 0x06 +#define LCD_REG_7 0x07 +#define LCD_REG_8 0x08 +#define LCD_REG_9 0x09 +#define LCD_REG_10 0x0a +#define LCD_REG_12 0x0c +#define LCD_REG_13 0x0d +#define LCD_REG_14 0x0e +#define LCD_REG_15 0x0f +#define LCD_REG_16 0x10 +#define LCD_REG_17 0x11 +#define LCD_REG_18 0x12 +#define LCD_REG_19 0x13 +#define LCD_REG_20 0x14 +#define LCD_REG_21 0x15 +#define LCD_REG_22 0x16 +#define LCD_REG_23 0x17 +#define LCD_REG_24 0x18 +#define LCD_REG_25 0x19 +#define LCD_REG_26 0x1a +#define LCD_REG_27 0x1b +#define LCD_REG_28 0x1c +#define LCD_REG_29 0x1d +#define LCD_REG_30 0x1e +#define LCD_REG_31 0x1f +#define LCD_REG_32 0x20 +#define LCD_REG_33 0x21 +#define LCD_REG_34 0x22 +#define LCD_REG_36 0x24 +#define LCD_REG_37 0x25 +#define LCD_REG_40 0x28 +#define LCD_REG_41 0x29 +#define LCD_REG_43 0x2b +#define LCD_REG_45 0x2d +#define LCD_REG_48 0x30 +#define LCD_REG_49 0x31 +#define LCD_REG_50 0x32 +#define LCD_REG_51 0x33 +#define LCD_REG_52 0x34 +#define LCD_REG_53 0x35 +#define LCD_REG_54 0x36 +#define LCD_REG_55 0x37 +#define LCD_REG_56 0x38 +#define LCD_REG_57 0x39 +#define LCD_REG_58 0x3a +#define LCD_REG_59 0x3b +#define LCD_REG_60 0x3c +#define LCD_REG_61 0x3d +#define LCD_REG_62 0x3e +#define LCD_REG_63 0x3f +#define LCD_REG_64 0x40 +#define LCD_REG_65 0x41 +#define LCD_REG_66 0x42 +#define LCD_REG_67 0x43 +#define LCD_REG_68 0x44 +#define LCD_REG_69 0x45 +#define LCD_REG_70 0x46 +#define LCD_REG_71 0x47 +#define LCD_REG_72 0x48 +#define LCD_REG_73 0x49 +#define LCD_REG_74 0x4a +#define LCD_REG_75 0x4b +#define LCD_REG_76 0x4c +#define LCD_REG_77 0x4d +#define LCD_REG_78 0x4e +#define LCD_REG_79 0x4f +#define LCD_REG_80 0x50 +#define LCD_REG_81 0x51 +#define LCD_REG_82 0x52 +#define LCD_REG_83 0x53 +#define LCD_REG_96 0x60 +#define LCD_REG_97 0x61 +#define LCD_REG_106 0x6a +#define LCD_REG_118 0x76 +#define LCD_REG_128 0x80 +#define LCD_REG_129 0x81 +#define LCD_REG_130 0x82 +#define LCD_REG_131 0x83 +#define LCD_REG_132 0x84 +#define LCD_REG_133 0x85 +#define LCD_REG_134 0x86 +#define LCD_REG_135 0x87 +#define LCD_REG_136 0x88 +#define LCD_REG_137 0x89 +#define LCD_REG_139 0x8b +#define LCD_REG_140 0x8c +#define LCD_REG_141 0x8d +#define LCD_REG_143 0x8f +#define LCD_REG_144 0x90 +#define LCD_REG_145 0x91 +#define LCD_REG_146 0x92 +#define LCD_REG_147 0x93 +#define LCD_REG_148 0x94 +#define LCD_REG_149 0x95 +#define LCD_REG_150 0x96 +#define LCD_REG_151 0x97 +#define LCD_REG_152 0x98 +#define LCD_REG_153 0x99 +#define LCD_REG_154 0x9a +#define LCD_REG_157 0x9d +#define LCD_REG_164 0xa4 +#define LCD_REG_192 0xc0 +#define LCD_REG_193 0xc1 +#define LCD_REG_229 0xe5 + +/* LCD IDs */ + +#define SPFD5408B_ID 0x5408 +#define R61580_ID 0x1580 + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +#endif + +/************************************************************************************** + * Private Type Definition + **************************************************************************************/ + +/* LCD type */ + +enum lcd_type_e +{ + LCD_TYPE_UNKNOWN = 0, + LCD_TYPE_SPFD5408B, + LCD_TYPE_R61580, + LCD_TYPE_AM240320 +}; + +/* This structure describes the LCD registers */ + +struct lcd_regs_s +{ + volatile uint16_t address; + volatile uint16_t value; +}; + +/* This structure describes the state of this driver */ + +struct stm3210e_dev_s +{ + /* Publically visible device structure */ + + struct lcd_dev_s dev; + +#if defined(CONFIG_STM3210E_LCD_BACKLIGHT) && defined(CONFIG_STM3210E_LCD_PWM) + uint32_t reload; +#endif + + /* Private LCD-specific information follows */ + + uint8_t type; /* LCD type. See enum lcd_type_e */ + uint8_t power; /* Current power setting */ +}; + +/************************************************************************************** + * Private Function Protototypes + **************************************************************************************/ +/* Low Level LCD access */ + +static void stm3210e_writereg(uint8_t regaddr, uint16_t regval); +static uint16_t stm3210e_readreg(uint8_t regaddr); +static inline void stm3210e_gramselect(void); +static inline void stm3210e_writegram(uint16_t rgbval); +static void stm3210e_readsetup(FAR uint16_t *accum); +#ifndef CONFIG_STM3210E_AM240320_DISABLE +static void stm3210e_readnosetup(FAR uint16_t *accum); +#endif +static uint16_t stm3210e_readshift(FAR uint16_t *accum); +static uint16_t stm3210e_readnoshift(FAR uint16_t *accum); +static void stm3210e_setcursor(uint16_t col, uint16_t row); + +/* LCD Data Transfer Methods */ + +static int stm3210e_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels); +static int stm3210e_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels); + +/* LCD Configuration */ + +static int stm3210e_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo); +static int stm3210e_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo); + +/* LCD RGB Mapping */ + +#ifdef CONFIG_FB_CMAP +# error "RGB color mapping not supported by this driver" +#endif + +/* Cursor Controls */ + +#ifdef CONFIG_FB_HWCURSOR +# error "Cursor control not supported by this driver" +#endif + +/* LCD Specific Controls */ + +static int stm3210e_getpower(struct lcd_dev_s *dev); +static int stm3210e_setpower(struct lcd_dev_s *dev, int power); +static int stm3210e_getcontrast(struct lcd_dev_s *dev); +static int stm3210e_setcontrast(struct lcd_dev_s *dev, unsigned int contrast); + +/* LCD Power Management */ + +#ifdef CONFIG_PM +static void stm3210e_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +static int stm3210e_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + +/* Initialization */ + +static inline void stm3210e_lcdinitialize(void); +#ifdef CONFIG_STM3210E_LCD_BACKLIGHT +static void stm3210e_backlight(void); +#else +# define stm3210e_backlight() +#endif + +/************************************************************************************** + * Private Data + **************************************************************************************/ + +/* This is working memory allocated by the LCD driver for each LCD device + * and for each color plane. This memory will hold one raster line of data. + * The size of the allocated run buffer must therefore be at least + * (bpp * xres / 8). Actual alignment of the buffer must conform to the + * bitwidth of the underlying pixel type. + * + * If there are multiple planes, they may share the same working buffer + * because different planes will not be operate on concurrently. However, + * if there are multiple LCD devices, they must each have unique run buffers. + */ + +static uint16_t g_runbuffer[STM3210E_XRES]; + +/* This structure describes the overall LCD video controller */ + +static const struct fb_videoinfo_s g_videoinfo = +{ + .fmt = STM3210E_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */ + .xres = STM3210E_XRES, /* Horizontal resolution in pixel columns */ + .yres = STM3210E_YRES, /* Vertical resolution in pixel rows */ + .nplanes = 1, /* Number of color planes supported */ +}; + +/* This is the standard, NuttX Plane information object */ + +static const struct lcd_planeinfo_s g_planeinfo = +{ + .putrun = stm3210e_putrun, /* Put a run into LCD memory */ + .getrun = stm3210e_getrun, /* Get a run from LCD memory */ + .buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ + .bpp = STM3210E_BPP, /* Bits-per-pixel */ +}; + +/* This is the standard, NuttX LCD driver object */ + +static struct stm3210e_dev_s g_lcddev = +{ + .dev = + { + /* LCD Configuration */ + + .getvideoinfo = stm3210e_getvideoinfo, + .getplaneinfo = stm3210e_getplaneinfo, + + /* LCD RGB Mapping -- Not supported */ + /* Cursor Controls -- Not supported */ + + /* LCD Specific Controls */ + + .getpower = stm3210e_getpower, + .setpower = stm3210e_setpower, + .getcontrast = stm3210e_getcontrast, + .setcontrast = stm3210e_setcontrast, + }, +}; + +#ifdef CONFIG_PM +static struct pm_callback_s g_lcdcb = +{ + .notify = stm3210e_pm_notify, + .prepare = stm3210e_pm_prepare, +}; +#endif + + +/************************************************************************************** + * Private Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: stm3210e_writereg + * + * Description: + * Write to an LCD register + * + **************************************************************************************/ + +static void stm3210e_writereg(uint8_t regaddr, uint16_t regval) +{ + /* Write the register address then write the register value */ + + LCD->address = regaddr; + LCD->value = regval; +} + +/************************************************************************************** + * Name: stm3210e_readreg + * + * Description: + * Read from an LCD register + * + **************************************************************************************/ + +static uint16_t stm3210e_readreg(uint8_t regaddr) +{ + /* Write the register address then read the register value */ + + LCD->address = regaddr; + return LCD->value; +} + +/************************************************************************************** + * Name: stm3210e_gramselect + * + * Description: + * Setup to read or write multiple pixels to the GRAM memory + * + **************************************************************************************/ + +static inline void stm3210e_gramselect(void) +{ + LCD->address = LCD_REG_34; +} + +/************************************************************************************** + * Name: stm3210e_writegram + * + * Description: + * Write one pixel to the GRAM memory + * + **************************************************************************************/ + +static inline void stm3210e_writegram(uint16_t rgbval) +{ + /* Write the value (GRAM register already selected) */ + + LCD->value = rgbval; +} + +/************************************************************************************** + * Name: stm3210e_readsetup / stm3210e_readnosetup + * + * Description: + * Prime the operation by reading one pixel from the GRAM memory if necessary for + * this LCD type. When reading 16-bit gram data, there may be some shifts in the + * returned data: + * + * - SPFD5408B: There appears to be a 5-bit shift in the returned data. + * - R61580: There is a 16-bit (1 pixel) shift in the returned data. + * - AM240320: Unknown -- assuming no shift in the return data + * + **************************************************************************************/ + +/* Used for SPFD5408B and R61580 */ + +#if !defined(CONFIG_STM3210E_SPFD5408B_DISABLE) || !defined(CONFIG_STM3210E_R61580_DISABLE) +static void stm3210e_readsetup(FAR uint16_t *accum) +{ + /* Read-ahead one pixel */ + + *accum = LCD->value; +} +#endif + +/* Used only for AM240320 */ + +#ifndef CONFIG_STM3210E_AM240320_DISABLE +static void stm3210e_readnosetup(FAR uint16_t *accum) +{ +} +#endif + +/************************************************************************************** + * Name: stm3210e_readshift / stm3210e_readnoshift + * + * Description: + * Read one correctly aligned pixel from the GRAM memory. Possibly shifting the + * data and possibly swapping red and green components. + * + * - SPFD5408B: There appears to be a 5-bit shift in the returned data. + * Red and green appear to be swapped on read-back as well + * - R61580: There is a 16-bit (1 pixel) shift in the returned data. + * All colors in the normal order + * - AM240320: Unknown -- assuming colors are in the color order + * + **************************************************************************************/ + +/* This version is used only for the SPFD5408B. It shifts the data by 5-bits and swaps + * red and green + */ + +#ifndef CONFIG_STM3210E_SPFD5408B_DISABLE +static uint16_t stm3210e_readshift(FAR uint16_t *accum) +{ + uint16_t red; + uint16_t green; + uint16_t blue; + + /* Read the value (GRAM register already selected) */ + + uint16_t next = LCD->value; + + /* Return previous bits 0-10 as bits 6-15 and next data bits 11-15 as bits 0-5 + * + * xxxx xPPP PPPP PPPP + * NNNN Nxxx xxxx xxxx + * + * Assuming that SPFD5408B_RDSHIFT == 5 + */ + + uint16_t value = *accum << SPFD5408B_RDSHIFT | next >> (16-SPFD5408B_RDSHIFT); + + /* Save the value for the next time we are called */ + + *accum = next; + + /* Tear the RGB655 apart. Swap read and green */ + + red = (value << (11-5)) & 0xf800; /* Move bits 5-9 to 11-15 */ + green = (value >> (10-5)) & 0x07e0; /* Move bits 10-15 to bits 5-10 */ + blue = value & 0x001f; /* Blue is in the right place */ + + /* And put the RGB565 back together */ + + value = red | green | blue; + + /* This is wierd... If blue is zero, then red+green values are off by 0x20. + * Except that both 0x0000 and 0x0020 can map to 0x0000. Need to revisit + * this!!!!!!!!!!! I might be misinterpreting some of the data that I have. + */ + +#if 0 /* REVISIT */ + if (value != 0 && blue == 0) + { + value += 0x20; + } +#endif + + return value; +} +#endif + +/* This version is used for the R61580 and for the AM240320. It neither shifts nor + * swaps colors. + */ + +#if !defined(CONFIG_STM3210E_R61580_DISABLE) || !defined(CONFIG_STM3210E_AM240320_DISABLE) +static uint16_t stm3210e_readnoshift(FAR uint16_t *accum) +{ + /* Read the value (GRAM register already selected) */ + + return LCD->value; +} +#endif + +/************************************************************************************** + * Name: stm3210e_setcursor + * + * Description: + * Set the cursor position. In landscape mode, the "column" is actually the physical + * Y position and the "row" is the physical X position. + * + **************************************************************************************/ + +static void stm3210e_setcursor(uint16_t col, uint16_t row) +{ + stm3210e_writereg(LCD_REG_32, row); /* GRAM horizontal address */ + stm3210e_writereg(LCD_REG_33, col); /* GRAM vertical address */ +} + +/************************************************************************************** + * Name: stm3210e_dumprun + * + * Description: + * Dump the contexts of the run buffer: + * + * run - The buffer in containing the run read to be dumped + * npixels - The number of pixels to dump + * + **************************************************************************************/ + +#if 0 /* Sometimes useful */ +static void stm3210e_dumprun(FAR const char *msg, FAR uint16_t *run, size_t npixels) +{ + int i, j; + + syslog(LOG_DEBUG, "\n%s:\n", msg); + for (i = 0; i < npixels; i += 16) + { + up_putc(' '); + syslog(LOG_DEBUG, " "); + for (j = 0; j < 16; j++) + { + syslog(LOG_DEBUG, " %04x", *run++); + } + + up_putc('\n'); + } +} +#endif + +/************************************************************************************** + * Name: stm3210e_putrun + * + * Description: + * This method can be used to write a partial raster line to the LCD: + * + * row - Starting row to write to (range: 0 <= row < yres) + * col - Starting column to write to (range: 0 <= col <= xres-npixels) + * buffer - The buffer containing the run to be written to the LCD + * npixels - The number of pixels to write to the LCD + * (range: 0 < npixels <= xres-col) + * + **************************************************************************************/ + +static int stm3210e_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels) +{ + FAR const uint16_t *src = (FAR const uint16_t*)buffer; + int i; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcddbg("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + /* Write the run to GRAM. */ + +#ifdef CONFIG_LCD_LANDSCAPE + /* Convert coordinates -- Which edge of the display is the "top?" Here the edge + * with the simplest conversion is used. + */ + + col = (STM3210E_XRES-1) - col; + + /* Set the cursor position */ + + stm3210e_setcursor(col, row); + + /* Then write the GRAM data, auto-decrementing X */ + + stm3210e_gramselect(); + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position (auto-decrements to the next column) */ + + stm3210e_writegram(*src++); + } +#elif defined(CONFIG_LCD_PORTRAIT) + /* Convert coordinates. (Swap row and column. This is done implicitly). */ + + /* Then write the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm3210e_setcursor(row, col); + stm3210e_gramselect(); + stm3210e_writegram(*src++); + + /* Increment to next column */ + + col++; + } +#else /* CONFIG_LCD_RPORTRAIT */ + /* Convert coordinates. (Swap row and column. This is done implicitly). + * Which edge of the display is the "top"? + */ + + col = (STM3210E_XRES-1) - col; + row = (STM3210E_YRES-1) - row; + + /* Then write the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm3210e_setcursor(row, col); + stm3210e_gramselect(); + stm3210e_writegram(*src++); + + /* Decrement to next column */ + + col--; + } +#endif + return OK; +} + +/************************************************************************************** + * Name: stm3210e_getrun + * + * Description: + * This method can be used to read a partial raster line from the LCD: + * + * row - Starting row to read from (range: 0 <= row < yres) + * col - Starting column to read read (range: 0 <= col <= xres-npixels) + * buffer - The buffer in which to return the run read from the LCD + * npixels - The number of pixels to read from the LCD + * (range: 0 < npixels <= xres-col) + * + **************************************************************************************/ + +static int stm3210e_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels) +{ + FAR uint16_t *dest = (FAR uint16_t*)buffer; + void (*readsetup)(FAR uint16_t *accum); + uint16_t (*readgram)(FAR uint16_t *accum); + uint16_t accum; + int i; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcddbg("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + /* Configure according to the LCD type */ + + switch (g_lcddev.type) + { +#ifndef CONFIG_STM3210E_SPFD5408B_DISABLE + case LCD_TYPE_SPFD5408B: + readsetup = stm3210e_readsetup; + readgram = stm3210e_readshift; + break; +#endif + +#ifndef CONFIG_STM3210E_R61580_DISABLE + case LCD_TYPE_R61580: + readsetup = stm3210e_readsetup; + readgram = stm3210e_readnoshift; + break; +#endif + +#ifndef CONFIG_STM3210E_AM240320_DISABLE + case LCD_TYPE_AM240320: + readsetup = stm3210e_readnosetup; + readgram = stm3210e_readnoshift; + break; +#endif + + default: /* Shouldn't happen */ + return -ENOSYS; + } + + /* Read the run from GRAM. */ + +#ifdef CONFIG_LCD_LANDSCAPE + /* Convert coordinates -- Which edge of the display is the "top?" Here the edge + * with the simplest conversion is used. + */ + + col = (STM3210E_XRES-1) - col; + + /* Set the cursor position */ + + stm3210e_setcursor(col, row); + + /* Then read the GRAM data, auto-decrementing Y */ + + stm3210e_gramselect(); + + /* Prime the pump for unaligned read data */ + + readsetup(&accum); + + for (i = 0; i < npixels; i++) + { + /* Read the next pixel from this position (autoincrements to the next row) */ + + *dest++ = readgram(&accum); + } +#elif defined(CONFIG_LCD_PORTRAIT) + /* Convert coordinates (Swap row and column. This is done implicitly). */ + + /* Then read the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Read the next pixel from this position */ + + stm3210e_setcursor(row, col); + stm3210e_gramselect(); + readsetup(&accum); + *dest++ = readgram(&accum); + + /* Increment to next column */ + + col++; + } +#else /* CONFIG_LCD_RPORTRAIT */ + /* Convert coordinates. (Swap row and column. This is done implicitly). + * Whic edge of the display is the "top"? + */ + + col = (STM3210E_XRES-1) - col; + row = (STM3210E_YRES-1) - row; + + /* Then write the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm3210e_setcursor(row, col); + stm3210e_gramselect(); + readsetup(&accum); + *dest++ = readgram(&accum); + + /* Decrement to next column */ + + col--; + } +#endif + + return OK; +} + +/************************************************************************************** + * Name: stm3210e_getvideoinfo + * + * Description: + * Get information about the LCD video controller configuration. + * + **************************************************************************************/ + +static int stm3210e_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo) +{ + DEBUGASSERT(dev && vinfo); + gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n", + g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes); + memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s)); + return OK; +} + +/************************************************************************************** + * Name: stm3210e_getplaneinfo + * + * Description: + * Get information about the configuration of each LCD color plane. + * + **************************************************************************************/ + +static int stm3210e_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo) +{ + DEBUGASSERT(dev && pinfo && planeno == 0); + gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp); + memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s)); + return OK; +} + +/************************************************************************************** + * Name: stm3210e_getpower + * + * Description: + * Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + **************************************************************************************/ + +static int stm3210e_getpower(struct lcd_dev_s *dev) +{ + gvdbg("power: %d\n", 0); + return g_lcddev.power; +} + +/************************************************************************************** + * Name: stm3210e_poweroff + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + **************************************************************************************/ + +static int stm3210e_poweroff(void) +{ + /* Turn the display off */ + + stm3210e_writereg(LCD_REG_7, 0); + + /* Disable timer 1 clocking */ + +#if defined(CONFIG_STM3210E_LCD_BACKLIGHT) +# if defined(CONFIG_STM3210E_LCD_PWM) + modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM1EN, 0); +#endif + + /* Configure the PA8 pin as an output */ + + stm32_configgpio(GPIO_LCD_BACKLIGHT); + + /* Turn the backlight off */ + + stm32_gpiowrite(GPIO_LCD_BACKLIGHT, false); +#endif + + /* Remember the power off state */ + + g_lcddev.power = 0; + return OK; +} + +/************************************************************************************** + * Name: stm3210e_setpower + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + **************************************************************************************/ + +static int stm3210e_setpower(struct lcd_dev_s *dev, int power) +{ + gvdbg("power: %d\n", power); + DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER); + + /* Set new power level */ + + if (power > 0) + { +#if defined(CONFIG_STM3210E_LCD_BACKLIGHT) && defined(CONFIG_STM3210E_LCD_PWM) + uint32_t frac; + uint32_t duty; + + /* If we are coming up from the power off state, then re-configure the timer */ + + if (g_lcddev.power == 0) + { + stm3210e_backlight(); + } + + /* Make sure that the power value is within range */ + + if (power > CONFIG_LCD_MAXPOWER) + { + power = CONFIG_LCD_MAXPOWER; + } + + /* Caclulate the new backlight duty. It is a faction of the timer1 + * period based on the ration of the current power setting to the + * maximum power setting. + */ + + frac = (power << 16) / CONFIG_LCD_MAXPOWER; + duty = (g_lcddev.reload * frac) >> 16; + if (duty > 0) + { + duty--; + } + + putreg16((uint16_t)duty, STM32_TIM1_CCR1); +#else + /* Turn the backlight on */ + + stm32_gpiowrite(GPIO_LCD_BACKLIGHT, true); +#endif + /* Then turn the display on */ + +#ifndef CONFIG_STM3210E_AM240320_DISABLE +# if !defined (CONFIG_STM3210E_SPFD5408B_DISABLE) || !defined(CONFIG_STM3210E_R61580_DISABLE) + stm3210e_writereg(LCD_REG_7, g_lcddev.type == LCD_TYPE_AM240320 ? 0x0173 : 0x0112); +# else + stm3210e_writereg(LCD_REG_7, 0x0173); +# endif +#else + stm3210e_writereg(LCD_REG_7, 0x0112); +#endif + g_lcddev.power = power; + } + else + { + /* Turn the display off */ + + stm3210e_poweroff(); + } + + return OK; +} + +/************************************************************************************** + * Name: stm3210e_getcontrast + * + * Description: + * Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static int stm3210e_getcontrast(struct lcd_dev_s *dev) +{ + gvdbg("Not implemented\n"); + return -ENOSYS; +} + +/************************************************************************************** + * Name: stm3210e_setcontrast + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static int stm3210e_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) +{ + gvdbg("contrast: %d\n", contrast); + return -ENOSYS; +} + +/**************************************************************************** + * Name: stm3210e_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + * Input Parameters: + * + * cb - Returned to the driver. The driver version of the callback + * strucure may include additional, driver-specific state data at + * the end of the structure. + * + * pmstate - Identifies the new PM state + * + * Returned Value: + * None - The driver already agreed to transition to the low power + * consumption state when when it returned OK to the prepare() call. + * + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void stm3210e_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ +#ifdef CONFIG_STM3210E_LCD_PWM + uint32_t frac; + uint32_t duty; +#endif + + switch (pmstate) + { + case(PM_NORMAL): + { + /* Restore normal LCD operation */ + +#ifdef CONFIG_STM3210E_LCD_PWM + frac = (g_lcddev.power << 16) / CONFIG_LCD_MAXPOWER; + duty = (g_lcddev.reload * frac) >> 16; + if (duty > 0) + { + duty--; + } + + putreg16((uint16_t)duty, STM32_TIM1_CCR1); +#endif + } + break; + + case(PM_IDLE): + { + /* Entering IDLE mode - Reduce LCD light */ + +#ifdef CONFIG_STM3210E_LCD_PWM + frac = (g_lcddev.power << 16) / CONFIG_LCD_MAXPOWER; + duty = (g_lcddev.reload * frac) >> 16; + if (duty > 0) + { + duty--; + } + + /* Reduce the LCD backlight to 50% of the MAXPOWER */ + + duty >>= 1; + putreg16((uint16_t)duty, STM32_TIM1_CCR1); +#endif + } + break; + + case(PM_STANDBY): + { + /* Entering STANDBY mode - Turn display backlight off */ + +#ifdef CONFIG_STM3210E_LCD_PWM + putreg16(0, STM32_TIM1_CCR1); +#endif + } + break; + + case(PM_SLEEP): + { + /* Entering SLEEP mode - Turn off LCD */ + + if (g_lcddev.type == LCD_TYPE_AM240320) + { + /* Display off sequence */ + + stm3210e_writereg(LCD_REG_0, 0xa0); /* White display mode setting */ + up_mdelay(10); /* Wait for 2 frame scan */ + stm3210e_writereg(LCD_REG_59, 0x00); /* Gate scan stop */ + + /* Power off sequence */ + + stm3210e_writereg(LCD_REG_30, 0x09); /* VCOM stop */ + stm3210e_writereg(LCD_REG_27, 0x0e); /* VS/VDH turn off */ + stm3210e_writereg(LCD_REG_24, 0xc0); /* CP1, CP2, CP3 turn off */ + up_mdelay(10); /* wait 10 ms */ + + stm3210e_writereg(LCD_REG_24, 0x00); /* VR1 / VR2 off*/ + stm3210e_writereg(LCD_REG_28, 0x30); /* Step up circuit operating current stop */ + up_mdelay(10); + + stm3210e_poweroff(); + stm3210e_writereg(LCD_REG_0, 0xa0); /* White display mode setting */ + up_mdelay(10); /* Wait for 2 frame scan */ + + stm3210e_writereg(LCD_REG_59, 0x00); /* Gate scan stop */ + } + else + { + (void)stm3210e_poweroff(); + } + } + break; + + default: + { + /* Should not get here */ + + } + break; + } +} +#endif + +/**************************************************************************** + * Name: stm3210e_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + * Input Parameters: + * + * cb - Returned to the driver. The driver version of the callback + * strucure may include additional, driver-specific state data at + * the end of the structure. + * + * pmstate - Identifies the new PM state + * + * Returned Value: + * Zero - (OK) means the event was successfully processed and that the + * driver is prepared for the PM state change. + * + * Non-zero - means that the driver is not prepared to perform the tasks + * needed achieve this power setting and will cause the state + * change to be aborted. NOTE: The prepare() method will also + * be called when reverting from lower back to higher power + * consumption modes (say because another driver refused a + * lower power state change). Drivers are not permitted to + * return non-zero values when reverting back to higher power + * consumption modes! + * + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int stm3210e_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* No preparation to change power modes is required by the LCD driver. We always + * accept the state change by returning OK. + */ + + return OK; +} +#endif + +/************************************************************************************** + * Name: stm3210e_lcdinitialize + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static inline void stm3210e_lcdinitialize(void) +{ + uint16_t id; + + /* Check if the LCD is Orise Tech SPFD5408B Controller (or the compatible RenesasSP + * R61580). + */ + + id = stm3210e_readreg(LCD_REG_0); + lcddbg("LCD ID: %04x\n", id); + + /* Check if the ID is for the SPFD5408B */ + +#if !defined(CONFIG_STM3210E_SPFD5408B_DISABLE) + if (id == SPFD5408B_ID) + { + /* Set the LCD type for the SPFD5408B */ + + g_lcddev.type = LCD_TYPE_SPFD5408B; + lcddbg("LCD type: %d\n", g_lcddev.type); + + /* Start Initial Sequence */ + + stm3210e_writereg(LCD_REG_1, 0x0100); /* Set SS bit */ + stm3210e_writereg(LCD_REG_2, 0x0700); /* Set 1 line inversion */ + stm3210e_writereg(LCD_REG_3, 0x1030); /* Set GRAM write direction and BGR=1. */ + stm3210e_writereg(LCD_REG_4, 0x0000); /* Resize register */ + stm3210e_writereg(LCD_REG_8, 0x0202); /* Set the back porch and front porch */ + stm3210e_writereg(LCD_REG_9, 0x0000); /* Set non-display area refresh cycle ISC[3:0] */ + stm3210e_writereg(LCD_REG_10, 0x0000); /* FMARK function */ + stm3210e_writereg(LCD_REG_12, 0x0000); /* RGB 18-bit System interface setting */ + stm3210e_writereg(LCD_REG_13, 0x0000); /* Frame marker Position */ + stm3210e_writereg(LCD_REG_15, 0x0000); /* RGB interface polarity, no impact */ + + /* Power On sequence */ + + stm3210e_writereg(LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + stm3210e_writereg(LCD_REG_17, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ + stm3210e_writereg(LCD_REG_18, 0x0000); /* VREG1OUT voltage */ + stm3210e_writereg(LCD_REG_19, 0x0000); /* VDV[4:0] for VCOM amplitude */ + up_mdelay(200); /* Dis-charge capacitor power voltage (200ms) */ + + stm3210e_writereg(LCD_REG_17, 0x0007); /* DC1[2:0], DC0[2:0], VC[2:0] */ + up_mdelay(50); + + stm3210e_writereg(LCD_REG_16, 0x12B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + up_mdelay(50); + + stm3210e_writereg(LCD_REG_18, 0x01bd); /* External reference voltage= Vci */ + up_mdelay(50); + + stm3210e_writereg(LCD_REG_19, 0x1400); /* VDV[4:0] for VCOM amplitude */ + stm3210e_writereg(LCD_REG_41, 0x000e); /* VCM[4:0] for VCOMH */ + up_mdelay(50); + + stm3210e_writereg(LCD_REG_32, 0x0000); /* GRAM horizontal Address */ + stm3210e_writereg(LCD_REG_33, 0x013f); /* GRAM Vertical Address */ + + /* Adjust the Gamma Curve (SPFD5408B)*/ + + stm3210e_writereg(LCD_REG_48, 0x0b0d); + stm3210e_writereg(LCD_REG_49, 0x1923); + stm3210e_writereg(LCD_REG_50, 0x1c26); + stm3210e_writereg(LCD_REG_51, 0x261c); + stm3210e_writereg(LCD_REG_52, 0x2419); + stm3210e_writereg(LCD_REG_53, 0x0d0b); + stm3210e_writereg(LCD_REG_54, 0x1006); + stm3210e_writereg(LCD_REG_55, 0x0610); + stm3210e_writereg(LCD_REG_56, 0x0706); + stm3210e_writereg(LCD_REG_57, 0x0304); + stm3210e_writereg(LCD_REG_58, 0x0e05); + stm3210e_writereg(LCD_REG_59, 0x0e01); + stm3210e_writereg(LCD_REG_60, 0x010e); + stm3210e_writereg(LCD_REG_61, 0x050e); + stm3210e_writereg(LCD_REG_62, 0x0403); + stm3210e_writereg(LCD_REG_63, 0x0607); + + /* Set GRAM area */ + + stm3210e_writereg(LCD_REG_80, 0x0000); /* Horizontal GRAM Start Address */ + stm3210e_writereg(LCD_REG_81, 0x00ef); /* Horizontal GRAM End Address */ + stm3210e_writereg(LCD_REG_82, 0x0000); /* Vertical GRAM Start Address */ + stm3210e_writereg(LCD_REG_83, 0x013f); /* Vertical GRAM End Address */ + stm3210e_writereg(LCD_REG_96, 0xa700); /* Gate Scan Line */ + stm3210e_writereg(LCD_REG_97, 0x0001); /* NDL, VLE, REV */ + stm3210e_writereg(LCD_REG_106, 0x0000); /* set scrolling line */ + + /* Partial Display Control */ + + stm3210e_writereg(LCD_REG_128, 0x0000); + stm3210e_writereg(LCD_REG_129, 0x0000); + stm3210e_writereg(LCD_REG_130, 0x0000); + stm3210e_writereg(LCD_REG_131, 0x0000); + stm3210e_writereg(LCD_REG_132, 0x0000); + stm3210e_writereg(LCD_REG_133, 0x0000); + + /* Panel Control */ + + stm3210e_writereg(LCD_REG_144, 0x0010); + stm3210e_writereg(LCD_REG_146, 0x0000); + stm3210e_writereg(LCD_REG_147, 0x0003); + stm3210e_writereg(LCD_REG_149, 0x0110); + stm3210e_writereg(LCD_REG_151, 0x0000); + stm3210e_writereg(LCD_REG_152, 0x0000); + + /* Set GRAM write direction and BGR=1 + * I/D=01 (Horizontal : increment, Vertical : decrement) + * AM=1 (address is updated in vertical writing direction) + */ + + stm3210e_writereg(LCD_REG_3, 0x1018); + stm3210e_writereg(LCD_REG_7, 0); /* Display OFF */ + } + else +#endif + + /* Check if the ID is for the almost compatible R61580 */ + +#if !defined(CONFIG_STM3210E_R61580_DISABLE) + if (id == R61580_ID) + { + /* Set the LCD type for the R61580 */ + + g_lcddev.type = LCD_TYPE_R61580; + lcddbg("LCD type: %d\n", g_lcddev.type); + + /* Start Initial Sequence */ + + stm3210e_writereg(LCD_REG_0, 0x0000); + stm3210e_writereg(LCD_REG_0, 0x0000); + up_mdelay(100); + stm3210e_writereg(LCD_REG_0, 0x0000); + stm3210e_writereg(LCD_REG_0, 0x0000); + stm3210e_writereg(LCD_REG_0, 0x0000); + stm3210e_writereg(LCD_REG_0, 0x0000); + stm3210e_writereg(LCD_REG_164, 0x0001); + up_mdelay(100); + stm3210e_writereg(LCD_REG_96, 0xa700); + stm3210e_writereg(LCD_REG_8, 0x0808); + + /* Gamma Setting */ + + stm3210e_writereg(LCD_REG_48, 0x0203); + stm3210e_writereg(LCD_REG_49, 0x080f); + stm3210e_writereg(LCD_REG_50, 0x0401); + stm3210e_writereg(LCD_REG_51, 0x050b); + stm3210e_writereg(LCD_REG_52, 0x3330); + stm3210e_writereg(LCD_REG_53, 0x0b05); + stm3210e_writereg(LCD_REG_54, 0x0005); + stm3210e_writereg(LCD_REG_55, 0x0f08); + stm3210e_writereg(LCD_REG_56, 0x0302); + stm3210e_writereg(LCD_REG_57, 0x3033); + + /* Power Setting */ + + stm3210e_writereg(LCD_REG_144, 0x0018); /* 80Hz */ + stm3210e_writereg(LCD_REG_16, 0x0530); /* BT, AP */ + stm3210e_writereg(LCD_REG_17, 0x0237); /* DC1,DC0,VC */ + stm3210e_writereg(LCD_REG_18, 0x01bf); + stm3210e_writereg(LCD_REG_19, 0x1000); /* VCOM */ + up_mdelay(200); + + stm3210e_writereg(LCD_REG_1, 0x0100); /* Set SS bit */ + stm3210e_writereg(LCD_REG_2, 0x0200); + stm3210e_writereg(LCD_REG_3, 0x1030); /* Set GRAM write direction and BGR=1. */ + stm3210e_writereg(LCD_REG_9, 0x0001); + stm3210e_writereg(LCD_REG_10, 0x0008); + stm3210e_writereg(LCD_REG_12, 0x0000); /* RGB 18-bit System interface setting */ + stm3210e_writereg(LCD_REG_13, 0xd000); + stm3210e_writereg(LCD_REG_14, 0x0030); + stm3210e_writereg(LCD_REG_15, 0x0000); /* RGB interface polarity, no impact */ + stm3210e_writereg(LCD_REG_32, 0x0000); /* H Start */ + stm3210e_writereg(LCD_REG_33, 0x0000); /* V Start */ + stm3210e_writereg(LCD_REG_41, 0x002e); + stm3210e_writereg(LCD_REG_80, 0x0000); /* Horizontal GRAM Start Address */ + stm3210e_writereg(LCD_REG_81, 0x00ef); /* Horizontal GRAM End Address */ + stm3210e_writereg(LCD_REG_82, 0x0000); /* Vertical GRAM Start Address */ + stm3210e_writereg(LCD_REG_83, 0x013f); /* Vertical GRAM End Address */ + stm3210e_writereg(LCD_REG_97, 0x0001); /* NDL, VLE, REV */ + stm3210e_writereg(LCD_REG_106, 0x0000); /* set scrolling line */ + stm3210e_writereg(LCD_REG_128, 0x0000); + stm3210e_writereg(LCD_REG_129, 0x0000); + stm3210e_writereg(LCD_REG_130, 0x005f); + stm3210e_writereg(LCD_REG_147, 0x0701); + + stm3210e_writereg(LCD_REG_7, 0x0000); /* Display OFF */ + } + else +#endif + { +#ifndef CONFIG_STM3210E_AM240320_DISABLE + /* Set the LCD type for the AM240320 */ + + g_lcddev.type = LCD_TYPE_AM240320; + lcddbg("LCD type: %d\n", g_lcddev.type); + + /* Start Initial Sequence */ + + stm3210e_writereg(LCD_REG_229, 0x8000); /* Set the internal vcore voltage */ + stm3210e_writereg(LCD_REG_0, 0x0001); /* Start internal OSC. */ + stm3210e_writereg(LCD_REG_1, 0x0100); /* Set SS and SM bit */ + stm3210e_writereg(LCD_REG_2, 0x0700); /* Set 1 line inversion */ + stm3210e_writereg(LCD_REG_3, 0x1030); /* Set GRAM write direction and BGR=1. */ + stm3210e_writereg(LCD_REG_4, 0x0000); /* Resize register */ + stm3210e_writereg(LCD_REG_8, 0x0202); /* Set the back porch and front porch */ + stm3210e_writereg(LCD_REG_9, 0x0000); /* Set non-display area refresh cycle ISC[3:0] */ + stm3210e_writereg(LCD_REG_10, 0x0000); /* FMARK function */ + stm3210e_writereg(LCD_REG_12, 0x0000); /* RGB interface setting */ + stm3210e_writereg(LCD_REG_13, 0x0000); /* Frame marker Position */ + stm3210e_writereg(LCD_REG_15, 0x0000); /* RGB interface polarity */ + + /* Power On sequence */ + + stm3210e_writereg(LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + stm3210e_writereg(LCD_REG_17, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ + stm3210e_writereg(LCD_REG_18, 0x0000); /* VREG1OUT voltage */ + stm3210e_writereg(LCD_REG_19, 0x0000); /* VDV[4:0] for VCOM amplitude */ + up_mdelay(200); /* Dis-charge capacitor power voltage (200ms) */ + + stm3210e_writereg(LCD_REG_16, 0x17b0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + stm3210e_writereg(LCD_REG_17, 0x0137); /* DC1[2:0], DC0[2:0], VC[2:0] */ + up_mdelay(50); + + stm3210e_writereg(LCD_REG_18, 0x0139); /* VREG1OUT voltage */ + up_mdelay(50); + + stm3210e_writereg(LCD_REG_19, 0x1d00); /* VDV[4:0] for VCOM amplitude */ + stm3210e_writereg(LCD_REG_41, 0x0013); /* VCM[4:0] for VCOMH */ + up_mdelay(50); + + stm3210e_writereg(LCD_REG_32, 0x0000); /* GRAM horizontal Address */ + stm3210e_writereg(LCD_REG_33, 0x0000); /* GRAM Vertical Address */ + + /* Adjust the Gamma Curve */ + + stm3210e_writereg(LCD_REG_48, 0x0006); + stm3210e_writereg(LCD_REG_49, 0x0101); + stm3210e_writereg(LCD_REG_50, 0x0003); + stm3210e_writereg(LCD_REG_53, 0x0106); + stm3210e_writereg(LCD_REG_54, 0x0b02); + stm3210e_writereg(LCD_REG_55, 0x0302); + stm3210e_writereg(LCD_REG_56, 0x0707); + stm3210e_writereg(LCD_REG_57, 0x0007); + stm3210e_writereg(LCD_REG_60, 0x0600); + stm3210e_writereg(LCD_REG_61, 0x020b); + + /* Set GRAM area */ + + stm3210e_writereg(LCD_REG_80, 0x0000); /* Horizontal GRAM Start Address */ + stm3210e_writereg(LCD_REG_81, 0x00ef); /* Horizontal GRAM End Address */ + stm3210e_writereg(LCD_REG_82, 0x0000); /* Vertical GRAM Start Address */ + stm3210e_writereg(LCD_REG_83, 0x013f); /* Vertical GRAM End Address */ + stm3210e_writereg(LCD_REG_96, 0x2700); /* Gate Scan Line */ + stm3210e_writereg(LCD_REG_97, 0x0001); /* NDL,VLE, REV */ + stm3210e_writereg(LCD_REG_106, 0x0000); /* Set scrolling line */ + + /* Partial Display Control */ + + stm3210e_writereg(LCD_REG_128, 0x0000); + stm3210e_writereg(LCD_REG_129, 0x0000); + stm3210e_writereg(LCD_REG_130, 0x0000); + stm3210e_writereg(LCD_REG_131, 0x0000); + stm3210e_writereg(LCD_REG_132, 0x0000); + stm3210e_writereg(LCD_REG_133, 0x0000); + + /* Panel Control */ + + stm3210e_writereg(LCD_REG_144, 0x0010); + stm3210e_writereg(LCD_REG_146, 0x0000); + stm3210e_writereg(LCD_REG_147, 0x0003); + stm3210e_writereg(LCD_REG_149, 0x0110); + stm3210e_writereg(LCD_REG_151, 0x0000); + stm3210e_writereg(LCD_REG_152, 0x0000); + + /* Set GRAM write direction and BGR = 1 + * + * I/D=01 (Horizontal : increment, Vertical : decrement) + * AM=1 (address is updated in vertical writing direction) + */ + + stm3210e_writereg(LCD_REG_3, 0x1018); + stm3210e_writereg(LCD_REG_7, 0); /* Display off */ +#else + lcddbg("Unsupported LCD type\n"); +#endif + } +} + +/************************************************************************************** + * Name: stm3210e_backlight + * + * Description: + * The LCD backlight is driven from PA8 which must be configured as TIM1 + * CH1. TIM1 must then be configured to output a clock on PA8; the duty + * of the clock determineds the backlight level. + * + **************************************************************************************/ + +#ifdef CONFIG_STM3210E_LCD_BACKLIGHT +static void stm3210e_backlight(void) +{ +#ifdef CONFIG_STM3210E_LCD_PWM + uint32_t prescaler; + uint32_t reload; + uint32_t timclk; + uint16_t bdtr; + uint16_t ccmr; + uint16_t ccer; + uint16_t cr2; + + /* Calculate the TIM1 prescaler value */ + + prescaler = (STM32_PCLK2_FREQUENCY / CONFIG_STM3210E_LCD_PWMFREQUENCY + 65534) / 65535; + if (prescaler < 1) + { + prescaler = 1; + } + else if (prescaler > 65536) + { + prescaler = 65536; + } + + /* Calculate the TIM1 reload value */ + + timclk = STM32_PCLK2_FREQUENCY / prescaler; + reload = timclk / CONFIG_STM3210E_LCD_PWMFREQUENCY; + + if (reload < 1) + { + reload = 1; + } + else if (reload > 65535) + { + reload = 65535; + } + + g_lcddev.reload = reload; + + /* Configure PA8 as TIM1 CH1 output */ + + stm32_configgpio(GPIO_TIM1_CH1OUT); + + /* Enabled timer 1 clocking */ + + modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN); + + /* Reset timer 1 */ + + modifyreg32(STM32_RCC_APB2RSTR, 0, RCC_APB2RSTR_TIM1RST); + modifyreg32(STM32_RCC_APB2RSTR, RCC_APB2RSTR_TIM1RST, 0); + + /* Reset the Counter Mode and set the clock division */ + + putreg16(0, STM32_TIM1_CR1); + + /* Set the Autoreload value */ + + putreg16(reload-1, STM32_TIM1_ARR); + + /* Set the Prescaler value */ + + putreg16(prescaler-1, STM32_TIM1_PSC); + + /* Generate an update event to reload the Prescaler value immediatly */ + + putreg16(ATIM_EGR_UG, STM32_TIM1_EGR); + + /* Reset the Repetition Counter value */ + + putreg16(0, STM32_TIM1_RCR); + + /* Set the main output enable (MOE) bit and clear the OSSI and OSSR + * bits in the BDTR register. + */ + + bdtr = getreg16(STM32_TIM1_BDTR); + bdtr &= ~(ATIM_BDTR_OSSI | ATIM_BDTR_OSSR); + bdtr |= ATIM_BDTR_MOE; + putreg16(bdtr, STM32_TIM1_BDTR); + + /* Disable the Channel 1 */ + + ccer = getreg16(STM32_TIM1_CCER); + ccer &= ~ATIM_CCER_CC1E; + putreg16(ccer, STM32_TIM1_CCER); + + /* Get the TIM1 CR2 register value */ + + cr2 = getreg16(STM32_TIM1_CR2); + + /* Select the Output Compare Mode Bits */ + + ccmr = getreg16(STM32_TIM1_CCMR1); + ccmr &= ATIM_CCMR1_OC1M_MASK; + ccmr |= (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR1_OC1M_SHIFT); + ccmr |= (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR1_CC1S_SHIFT); + + /* Set the power to the minimum value */ + + g_lcddev.power = 0; + putreg16(0, STM32_TIM1_CCR1); + + /* Select the output polarity level == LOW and enable */ + + ccer |= (ATIM_CCER_CC1E ); + + /* Reset the Output N Polarity level */ + + ccer &= ~(ATIM_CCER_CC1NP|ATIM_CCER_CC1NE); + + /* Reset the Ouput Compare and Output Compare N IDLE State */ + + cr2 &= ~(ATIM_CR2_OIS1|ATIM_CR2_OIS1N); + + /* Write the timer configuration */ + + putreg16(cr2, STM32_TIM1_CR2); + putreg16(ccmr, STM32_TIM1_CCMR1); + putreg16(ccer, STM32_TIM1_CCER); + + /* Set the auto preload enable bit */ + + modifyreg16(STM32_TIM1_CR1, 0, ATIM_CR1_ARPE); + + /* Enable Backlight Timer */ + + ccer |= ATIM_CR1_CEN; + putreg16(ccer, STM32_TIM1_CR1); + + /* Dump timer1 registers */ + + lcddbg("APB2ENR: %08x\n", getreg32(STM32_RCC_APB2ENR)); + lcddbg("CR1: %04x\n", getreg32(STM32_TIM1_CR1)); + lcddbg("CR2: %04x\n", getreg32(STM32_TIM1_CR2)); + lcddbg("SMCR: %04x\n", getreg32(STM32_TIM1_SMCR)); + lcddbg("DIER: %04x\n", getreg32(STM32_TIM1_DIER)); + lcddbg("SR: %04x\n", getreg32(STM32_TIM1_SR)); + lcddbg("BDTR: %04x\n", getreg32(STM32_TIM1_BDTR)); + lcddbg("CCMR1: %04x\n", getreg32(STM32_TIM1_CCMR1)); + lcddbg("CCMR2: %04x\n", getreg32(STM32_TIM1_CCMR2)); + lcddbg("CCER: %04x\n", getreg32(STM32_TIM1_CCER)); + lcddbg("CNT: %04x\n", getreg32(STM32_TIM1_CNT)); + lcddbg("PSC: %04x\n", getreg32(STM32_TIM1_PSC)); + lcddbg("ARR: %04x\n", getreg32(STM32_TIM1_ARR)); + lcddbg("RCR: %04x\n", getreg32(STM32_TIM1_RCR)); + lcddbg("CCR1: %04x\n", getreg32(STM32_TIM1_CCR1)); + lcddbg("CCR2: %04x\n", getreg32(STM32_TIM1_CCR2)); + lcddbg("CCR3: %04x\n", getreg32(STM32_TIM1_CCR3)); + lcddbg("CCR4: %04x\n", getreg32(STM32_TIM1_CCR4)); + lcddbg("DMAR: %04x\n", getreg32(STM32_TIM1_DMAR)); +#endif +} +#endif + +/************************************************************************************** + * Public Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + **************************************************************************************/ + +int board_lcd_initialize(void) +{ +#ifdef CONFIG_PM + int ret; +#endif + + gvdbg("Initializing\n"); + + /* Register to receive power management callbacks */ + +#ifdef CONFIG_PM + ret = pm_register(&g_lcdcb); + if (ret != OK) + { + lcddbg("ERROR: pm_register failed: %d\n", ret); + } +#endif + + /* Configure GPIO pins and configure the FSMC to support the LCD */ + + stm32_selectlcd(); + + /* Configure and enable LCD */ + + up_mdelay(50); + stm3210e_lcdinitialize(); + + /* Clear the display (setting it to the color 0=black) */ + + stm3210e_lcdclear(0); + + /* Turn the backlight off */ + + stm3210e_poweroff(); + return OK; +} + +/************************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows support + * for multiple LCD devices. + * + **************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return &g_lcddev.dev; +} + +/************************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Unitialize the LCD support + * + **************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + stm3210e_poweroff(); + stm32_deselectlcd(); +} + +/************************************************************************************** + * Name: stm3210e_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the STM3210E-EVAL board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * dispaly is cleared by simply setting all GRAM memory to the specified color. + * + **************************************************************************************/ + +void stm3210e_lcdclear(uint16_t color) +{ + uint32_t i = 0; + + stm3210e_setcursor(0, STM3210E_XRES-1); + stm3210e_gramselect(); + for (i = 0; i < STM3210E_XRES * STM3210E_YRES; i++) + { + LCD->value = color; + } +} + diff --git a/configs/stm3210e-eval/src/stm32_leds.c b/configs/stm3210e-eval/src/stm32_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..66679b48a3247658d0fd35bf57afd54b780f2509 --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_leds.c @@ -0,0 +1,403 @@ +/**************************************************************************** + * configs/stm3210e_eval/src/stm32_leds.c + * + * Copyright (C) 2009-2013, 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "stm3210e-eval.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* The following definitions map the encoded LED setting to GPIO settings */ + +#define STM3210E_LED1 (1 << 0) +#define STM3210E_LED2 (1 << 1) +#define STM3210E_LED3 (1 << 2) +#define STM3210E_LED4 (1 << 3) + +#define ON_SETBITS_SHIFT (0) +#define ON_CLRBITS_SHIFT (4) +#define OFF_SETBITS_SHIFT (8) +#define OFF_CLRBITS_SHIFT (12) + +#define ON_BITS(v) ((v) & 0xff) +#define OFF_BITS(v) (((v) >> 8) & 0x0ff) +#define SETBITS(b) ((b) & 0x0f) +#define CLRBITS(b) (((b) >> 4) & 0x0f) + +#define ON_SETBITS(v) (SETBITS(ON_BITS(v)) +#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v)) +#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v)) +#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v)) + +#define LED_STARTED_ON_SETBITS ((STM3210E_LED1) << ON_SETBITS_SHIFT) +#define LED_STARTED_ON_CLRBITS ((STM3210E_LED2|STM3210E_LED3|STM3210E_LED4) << ON_CLRBITS_SHIFT) +#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT) +#define LED_STARTED_OFF_CLRBITS ((STM3210E_LED1|STM3210E_LED2|STM3210E_LED3|STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_HEAPALLOCATE_ON_SETBITS ((STM3210E_LED2) << ON_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_ON_CLRBITS ((STM3210E_LED1|STM3210E_LED3|STM3210E_LED4) << ON_CLRBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_SETBITS ((STM3210E_LED1) << OFF_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_CLRBITS ((STM3210E_LED2|STM3210E_LED3|STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_IRQSENABLED_ON_SETBITS ((STM3210E_LED1|STM3210E_LED2) << ON_SETBITS_SHIFT) +#define LED_IRQSENABLED_ON_CLRBITS ((STM3210E_LED3|STM3210E_LED4) << ON_CLRBITS_SHIFT) +#define LED_IRQSENABLED_OFF_SETBITS ((STM3210E_LED2) << OFF_SETBITS_SHIFT) +#define LED_IRQSENABLED_OFF_CLRBITS ((STM3210E_LED1|STM3210E_LED3|STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_STACKCREATED_ON_SETBITS ((STM3210E_LED3) << ON_SETBITS_SHIFT) +#define LED_STACKCREATED_ON_CLRBITS ((STM3210E_LED1|STM3210E_LED2|STM3210E_LED4) << ON_CLRBITS_SHIFT) +#define LED_STACKCREATED_OFF_SETBITS ((STM3210E_LED1|STM3210E_LED2) << OFF_SETBITS_SHIFT) +#define LED_STACKCREATED_OFF_CLRBITS ((STM3210E_LED3|STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_INIRQ_ON_SETBITS ((STM3210E_LED1) << ON_SETBITS_SHIFT) +#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_INIRQ_OFF_CLRBITS ((STM3210E_LED1) << OFF_CLRBITS_SHIFT) + +#define LED_SIGNAL_ON_SETBITS ((STM3210E_LED2) << ON_SETBITS_SHIFT) +#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_SIGNAL_OFF_CLRBITS ((STM3210E_LED2) << OFF_CLRBITS_SHIFT) + +#define LED_ASSERTION_ON_SETBITS ((STM3210E_LED4) << ON_SETBITS_SHIFT) +#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_ASSERTION_OFF_CLRBITS ((STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_PANIC_ON_SETBITS ((STM3210E_LED4) << ON_SETBITS_SHIFT) +#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_PANIC_OFF_CLRBITS ((STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +/************************************************************************************** + * Private Function Protototypes + **************************************************************************************/ + +/* LED State Controls */ + +static inline void led_clrbits(unsigned int clrbits); +static inline void led_setbits(unsigned int setbits); +static void led_setonoff(unsigned int bits); + +/* LED Power Management */ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint16_t g_ledbits[8] = +{ + (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | + LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS), + + (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS | + LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS), + + (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS | + LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS), + + (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS | + LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS), + + (LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS | + LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS), + + (LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS | + LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS), + + (LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS | + LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS), + + (LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS | + LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS) +}; + +#ifdef CONFIG_PM +static struct pm_callback_s g_ledscb = +{ + .notify = led_pm_notify, + .prepare = led_pm_prepare, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_clrbits + * + * Description: + * Clear all LEDs to the bit encoded state + * + ****************************************************************************/ + +static inline void led_clrbits(unsigned int clrbits) +{ + if ((clrbits & STM3210E_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, false); + } + + if ((clrbits & STM3210E_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, false); + } + + if ((clrbits & STM3210E_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, false); + } + + if ((clrbits & STM3210E_LED4) != 0) + { + stm32_gpiowrite(GPIO_LED4, false); + } +} + +/**************************************************************************** + * Name: led_setbits + * + * Description: + * Set all LEDs to the bit encoded state + * + ****************************************************************************/ + +static inline void led_setbits(unsigned int setbits) +{ + if ((setbits & STM3210E_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, true); + } + + if ((setbits & STM3210E_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, true); + } + + if ((setbits & STM3210E_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, true); + } + + if ((setbits & STM3210E_LED4) != 0) + { + stm32_gpiowrite(GPIO_LED4, true); + } +} + +/**************************************************************************** + * Name: led_setonoff + * + * Description: + * Set/clear all LEDs to the bit encoded state + * + ****************************************************************************/ + +static void led_setonoff(unsigned int bits) +{ + led_clrbits(CLRBITS(bits)); + led_setbits(SETBITS(bits)); +} + +/**************************************************************************** + * Name: led_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + switch (pmstate) + { + case(PM_NORMAL): + { + /* Restore normal LEDs operation */ + + } + break; + + case(PM_IDLE): + { + /* Entering IDLE mode - Turn leds off */ + + } + break; + + case(PM_STANDBY): + { + /* Entering STANDBY mode - Logic for PM_STANDBY goes here */ + + } + break; + + case(PM_SLEEP): + { + /* Entering SLEEP mode - Logic for PM_SLEEP goes here */ + + } + break; + + default: + { + /* Should not get here */ + + } + break; + } +} +#endif + +/**************************************************************************** + * Name: led_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* No preparation to change power modes is required by the LEDs driver. + * We always accept the state change by returning OK. + */ + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_setonoff(ON_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_setonoff(OFF_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: stm32_ledpminitialize + ****************************************************************************/ + +#ifdef CONFIG_PM +void stm32_ledpminitialize(void) +{ + /* Register to receive power management callbacks */ + + int ret = pm_register(&g_ledscb); + if (ret != OK) + { + board_autoled_on(LED_ASSERTION); + } +} +#endif /* CONFIG_PM */ + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/stm3210e-eval/src/stm32_lm75.c b/configs/stm3210e-eval/src/stm32_lm75.c new file mode 100644 index 0000000000000000000000000000000000000000..ba0591fb87c450072d7827f79b9ecb8e8e8f8fbc --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_lm75.c @@ -0,0 +1,120 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_lm75.c + * + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "stm32.h" +#include "stm32_i2c.h" +#include "stm3210e-eval.h" + +#if defined(CONFIG_I2C) && defined(CONFIG_I2C_LM75) && defined(CONFIG_STM32_I2C1) + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_lm75initialize + * + * Description: + * Initialize and register the LM-75 Temperature Sensor driver. + * + * Input parameters: + * devpath - The full path to the driver to register. E.g., "/dev/temp0" + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ************************************************************************************/ + +int stm32_lm75initialize(FAR const char *devpath) +{ + FAR struct i2c_master_s *i2c; + int ret; + + /* Configure PB.5 as Input pull-up. This pin can be used as a temperature + * sensor interrupt (not fully implemented). + */ + + stm32_configgpio(GPIO_LM75_OSINT); + + /* Get an instance of the I2C1 interface */ + + i2c = stm32_i2cbus_initialize(1); + if (!i2c) + { + return -ENODEV; + } + + /* Then register the temperature sensor */ + + ret = lm75_register(devpath, i2c, 0x48); + if (ret < 0) + { + (void)stm32_i2cbus_uninitialize(i2c); + } + + return ret; +} + +/************************************************************************************ + * Name: stm32_lm75attach + * + * Description: + * Attach the LM-75 interrupt handler + * + * Input parameters: + * irqhandler - the LM-75 interrupt handler + * + * Returned Value: + * The previous LM-75 interrupt handler + * + ************************************************************************************/ + +xcpt_t stm32_lm75attach(xcpt_t irqhandler) +{ + return stm32_gpiosetevent(GPIO_LM75_OSINT, true, true, true, irqhandler); +} + +#endif /* CONFIG_I2C && CONFIG_I2C_LM75 && CONFIG_STM32_I2C1 */ diff --git a/configs/stm3210e-eval/src/stm32_pm.c b/configs/stm3210e-eval/src/stm32_pm.c new file mode 100644 index 0000000000000000000000000000000000000000..1da3078a9c2b698c7c5f8cc66bb117e2f84ae48e --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_pm.c @@ -0,0 +1,106 @@ +/**************************************************************************** + * configs/stm3210e-eval/src/stm32_pm.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "up_internal.h" +#include "stm32_pm.h" +#include "stm3210e-eval.h" + +#ifdef CONFIG_PM + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_pminitialize + * + * Description: + * This function is called by MCU-specific logic at power-on reset in + * order to provide one-time initialization the power management subystem. + * This function must be called *very* early in the initializeation sequence + * *before* any other device drivers are initialized (since they may + * attempt to register with the power management subsystem). + * + * Input parameters: + * None. + * + * Returned value: + * None. + * + ****************************************************************************/ + +void up_pminitialize(void) +{ + /* Then initialize the NuttX power management subsystem proper */ + + pm_initialize(); + +#if defined(CONFIG_ARCH_IDLE_CUSTOM) && defined(CONFIG_PM_BUTTONS) + /* Initialize the buttons to wake up the system from low power modes */ + + stm32_pmbuttons(); +#endif + + /* Initialize the LED PM */ + + stm32_ledpminitialize(); +} + +#endif /* CONFIG_PM */ diff --git a/configs/stm3210e-eval/src/stm32_pmbuttons.c b/configs/stm3210e-eval/src/stm32_pmbuttons.c new file mode 100644 index 0000000000000000000000000000000000000000..49be1db7e223cb8c4a2d243fe4d9207836f4a50e --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_pmbuttons.c @@ -0,0 +1,329 @@ +/**************************************************************************** + * configs/stm3210e-eval/src/stm32_pmbuttons.c + * + * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "nvic.h" +#include "stm32_pwr.h" +#include "stm32_pm.h" +#include "stm3210e-eval.h" + +#if defined(CONFIG_PM) && defined(CONFIG_ARCH_IDLE_CUSTOM) && defined(CONFIG_PM_BUTTONS) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_ARCH_BUTTONS +# error "CONFIG_ARCH_BUTTONS is not defined in the configuration" +#endif + +#define BUTTON_MIN 0 +#ifdef CONFIG_DJOYSTICK +# define BUTTON_MAX 2 +#else +# define BUTTON_MAX 7 +#endif + +#ifndef CONFIG_PM_BUTTONS_MIN +# define CONFIG_PM_BUTTONS_MIN BUTTON_MIN +#endif +#ifndef CONFIG_PM_BUTTONS_MAX +# define CONFIG_PM_BUTTONS_MAX BUTTON_MAX +#endif + +#if CONFIG_PM_BUTTONS_MIN > CONFIG_PM_BUTTONS_MAX +# error "CONFIG_PM_BUTTONS_MIN > CONFIG_PM_BUTTONS_MAX" +#endif + +#if CONFIG_PM_BUTTONS_MAX > BUTTON_MAX +# error "CONFIG_PM_BUTTONS_MAX > BUTTON_MAX" +#endif + +#ifndef CONFIG_ARCH_IRQBUTTONS +# warning "CONFIG_ARCH_IRQBUTTONS is not defined in the configuration" +#endif + +#ifndef CONFIG_PM_IRQBUTTONS_MIN +# define CONFIG_PM_IRQBUTTONS_MIN CONFIG_PM_BUTTONS_MIN +#endif + +#ifndef CONFIG_PM_IRQBUTTONS_MAX +# define CONFIG_PM_IRQBUTTONS_MAX CONFIG_PM_BUTTONS_MAX +#endif + +#if CONFIG_PM_IRQBUTTONS_MIN > CONFIG_PM_IRQBUTTONS_MAX +# error "CONFIG_PM_IRQBUTTONS_MIN > CONFIG_PM_IRQBUTTONS_MAX" +#endif + +#if CONFIG_PM_IRQBUTTONS_MAX > 7 +# error "CONFIG_PM_IRQBUTTONS_MAX > 7" +#endif + +#ifndef CONFIG_PM_BUTTON_ACTIVITY +# define CONFIG_PM_BUTTON_ACTIVITY 10 +#endif + +#define PM_IDLE_DOMAIN 0 /* Revisit */ + +/* Miscellaneous Definitions ************************************************/ + +#ifndef MIN +# define MIN(a,b) (a < b ? a : b) +#endif +#ifndef MAX +# define MAX(a,b) (a > b ? a : b) +#endif + +#define MIN_BUTTON MIN(CONFIG_PM_BUTTONS_MIN, CONFIG_PM_IRQBUTTONS_MIN) +#define MAX_BUTTON MAX(CONFIG_PM_BUTTONS_MAX, CONFIG_PM_IRQBUTTONS_MAX) + +#define NUM_PMBUTTONS (MAX_BUTTON - MIN_BUTTON + 1) +#define BUTTON_INDEX(b) ((b)-MIN_BUTTON) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +static void button_handler(int id, int irq); + +#if MIN_BUTTON < 1 +static int button0_handler(int irq, FAR void *context); +#endif +#if MIN_BUTTON < 2 && MAX_BUTTON > 0 +static int button1_handler(int irq, FAR void *context); +#endif +#if MIN_BUTTON < 3 && MAX_BUTTON > 1 +static int button2_handler(int irq, FAR void *context); +#endif +#if MIN_BUTTON < 4 && MAX_BUTTON > 2 +static int button3_handler(int irq, FAR void *context); +#endif +#if MIN_BUTTON < 5 && MAX_BUTTON > 3 +static int button4_handler(int irq, FAR void *context); +#endif +#if MIN_BUTTON < 6 && MAX_BUTTON > 4 +static int button5_handler(int irq, FAR void *context); +#endif +#if MIN_BUTTON < 7 && MAX_BUTTON > 5 +static int button6_handler(int irq, FAR void *context); +#endif +#if MAX_BUTTON > 6 +static int button7_handler(int irq, FAR void *context); +#endif +#endif /* CONFIG_ARCH_IRQBUTTONS */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Button interrupt handlers */ + +#ifdef CONFIG_ARCH_IRQBUTTONS +static const xcpt_t g_buttonhandlers[NUM_PMBUTTONS] = +{ +#if MIN_BUTTON < 1 + button0_handler, +#endif +#if MIN_BUTTON < 2 && MAX_BUTTON > 0 + button1_handler, +#endif +#if MIN_BUTTON < 3 && MAX_BUTTON > 1 + button2_handler, +#endif +#if MIN_BUTTON < 4 && MAX_BUTTON > 2 + button3_handler, +#endif +#if MIN_BUTTON < 5 && MAX_BUTTON > 3 + button4_handler, +#endif +#if MIN_BUTTON < 6 && MAX_BUTTON > 4 + button5_handler, +#endif +#if MIN_BUTTON < 7 && MAX_BUTTON > 5 + button6_handler, +#endif +#if MAX_BUTTON > 6 + button7_handler, +#endif +}; +#endif /* CONFIG_ARCH_IRQBUTTONS */ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: button_handler + * + * Description: + * Handle a button wake-up interrupt + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +static void button_handler(int id, int irq) +{ + /* At this point the MCU should have already awakened. The state + * change will be handled in the IDLE loop when the system is re-awakened + * The button interrupt handler should be totally ignorant of the PM + * activities and should report button activity as if nothing + * special happened. + */ + + pm_activity(PM_IDLE_DOMAIN, CONFIG_PM_BUTTON_ACTIVITY); +} + +#if MIN_BUTTON < 1 +static int button0_handler(int irq, FAR void *context) +{ + button_handler(0, irq); + return OK; +} +#endif + +#if MIN_BUTTON < 2 && MAX_BUTTON > 0 +static int button1_handler(int irq, FAR void *context) +{ + button_handler(1, irq); + return OK; +} +#endif + +#if MIN_BUTTON < 3 && MAX_BUTTON > 1 +static int button2_handler(int irq, FAR void *context) +{ + button_handler(2, irq); + return OK; +} +#endif + +#if MIN_BUTTON < 4 && MAX_BUTTON > 2 +static int button3_handler(int irq, FAR void *context) +{ + button_handler(3, irq); + return OK; +} +#endif + +#if MIN_BUTTON < 5 && MAX_BUTTON > 3 +static int button4_handler(int irq, FAR void *context) +{ + button_handler(4, irq); + return OK; +} +#endif + +#if MIN_BUTTON < 6 && MAX_BUTTON > 4 +static int button5_handler(int irq, FAR void *context) +{ + button_handler(5, irq); + return OK; +} +#endif + +#if MIN_BUTTON < 7 && MAX_BUTTON > 5 +static int button6_handler(int irq, FAR void *context) +{ + button_handler(6, irq); + return OK; +} +#endif + +#if MAX_BUTTON > 6 +static int button7_handler(int irq, FAR void *context) +{ + button_handler(7, irq); + return OK; +} +#endif +#endif /* CONFIG_ARCH_IRQBUTTONS */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_pmbuttons + * + * Description: + * Configure all the buttons of the STM3210e-eval board as EXTI, + * so any button is able to wakeup the MCU from the PM_STANDBY mode + * + ****************************************************************************/ + +void stm32_pmbuttons(void) +{ + /* Initialize the button GPIOs */ + + board_button_initialize(); + +#ifdef CONFIG_ARCH_IRQBUTTONS + int i; + for (i = CONFIG_PM_IRQBUTTONS_MIN; i <= CONFIG_PM_IRQBUTTONS_MAX; i++) + { + xcpt_t oldhandler = board_button_irq(i, g_buttonhandlers[BUTTON_INDEX(i)]); + + if (oldhandler != NULL) + { + lowsyslog(LOG_WARNING, "WARNING: oldhandler:%p is not NULL! " + "Button events may be lost or aliased!\n", + oldhandler); + } + } +#endif +} + +#endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_IDLE_CUSTOM) && defined(CONFIG_PM_BUTTONS) */ diff --git a/configs/stm3210e-eval/src/stm32_selectlcd.c b/configs/stm3210e-eval/src/stm32_selectlcd.c new file mode 100644 index 0000000000000000000000000000000000000000..cead59ae5712d9944ee9f393fece6735f2b351e1 --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_selectlcd.c @@ -0,0 +1,145 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_selectlcd.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32.h" +#include "stm3210e-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/* 512Kx16 SRAM is connected to bank2 of the FSMC interface and both 8- and 16-bit + * accesses are allowed by BLN0 and BLN1 connected to BLE and BHE of SRAM, + * respectively. + * + * Pin Usage (per schematic) + * FLASH SRAM NAND LCD + * D[0..15] [0..15] [0..15] [0..7] [0..15] + * A[0..23] [0..22] [0..18] [16,17] [0] + * FSMC_NBL0 PE0 OUT ~BLE --- --- --- + * FSMC_NBL1 PE1 OUT ~BHE --- --- --- + * FSMC_NE2 PG9 OUT --- ~E --- --- + * FSMC_NE3 PG10 OUT ~CE --- --- --- + * FSMC_NE4 PG12 OUT --- --- --- ~CS + * FSMC_NWE PD5 OUT ~WE ~W ~W ~WR/SCL + * FSMC_NOE PD4 OUT ~OE ~G ~R ~RD + * FSMC_NWAIT PD6 IN --- R~B --- --- + * FSMC_INT2 PG6* IN --- --- R~B --- + * + * *JP7 will switch to PD6 + */ + +/* GPIO configurations unique to the LCD */ + +static const uint16_t g_lcdconfig[] = +{ + /* NE4 */ + + GPIO_NPS_NE4 +}; +#define NLCD_CONFIG (sizeof(g_lcdconfig)/sizeof(uint16_t)) + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_selectlcd + * + * Description: + * Initialize to the LCD + * + ************************************************************************************/ + +void stm32_selectlcd(void) +{ + /* Configure new GPIO state */ + + stm32_extmemgpios(g_commonconfig, NCOMMON_CONFIG); + stm32_extmemgpios(g_lcdconfig, NLCD_CONFIG); + + /* Enable AHB clocking to the FSMC */ + + stm32_enablefsmc(); + + /* Bank4 NOR/SRAM control register configuration */ + + putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR4); + + /* Bank4 NOR/SRAM timing register configuration */ + + putreg32(FSMC_BTR_ADDSET(1)|FSMC_BTR_ADDHLD(0)|FSMC_BTR_DATAST(2)|FSMC_BTR_BUSTURN(0)| + FSMC_BTR_CLKDIV(0)|FSMC_BTR_DATLAT(0)|FSMC_BTR_ACCMODA, STM32_FSMC_BTR4); + + putreg32(0xffffffff, STM32_FSMC_BWTR4); + + /* Enable the bank by setting the MBKEN bit */ + + putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR4); +} + +#endif /* CONFIG_STM32_FSMC */ + + diff --git a/configs/stm3210e-eval/src/stm32_selectnor.c b/configs/stm3210e-eval/src/stm32_selectnor.c new file mode 100644 index 0000000000000000000000000000000000000000..3d16203c0738e23b0be2b216c19517a48106bd2d --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_selectnor.c @@ -0,0 +1,139 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_selectnor.c + * + * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32.h" +#include "stm3210e-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/* Pin Usage (per schematic) + * + * FLASH SRAM NAND LCD + * D[0..15] [0..15] [0..15] [0..7] [0..15] + * A[0..23] [0..22] [0..18] [16,17] [0] + * FSMC_NBL0 PE0 OUT ~BLE --- --- --- + * FSMC_NBL1 PE1 OUT ~BHE --- --- --- + * FSMC_NE2 PG9 OUT --- ~E --- --- + * FSMC_NE3 PG10 OUT ~CE --- --- --- + * FSMC_NE4 PG12 OUT --- --- --- ~CS + * FSMC_NWE PD5 OUT ~WE ~W ~W ~WR/SCL + * FSMC_NOE PD4 OUT ~OE ~G ~R ~RD + * FSMC_NWAIT PD6 IN --- R~B --- --- + * FSMC_INT2 PG6* IN --- --- R~B --- + * + * *JP7 will switch to PD6 + */ + +/* GPIO configurations unique to NOR Flash */ + +static const uint16_t g_norconfig[] = +{ + /* A19... A22 */ + + GPIO_NPS_A19, GPIO_NPS_A20, GPIO_NPS_A21, GPIO_NPS_A22, + + /* NE2 */ + + GPIO_NPS_NE2 +}; +#define NNOR_CONFIG (sizeof(g_norconfig)/sizeof(uint16_t)) + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_selectnor + * + * Description: + * Initialize to access NOR flash + * + ************************************************************************************/ + +void stm32_selectnor(void) +{ + /* Configure new GPIO state */ + + stm32_extmemgpios(g_commonconfig, NCOMMON_CONFIG); + stm32_extmemgpios(g_norconfig, NNOR_CONFIG); + + /* Enable AHB clocking to the FSMC */ + + stm32_enablefsmc(); + + /* Bank1 NOR/SRAM control register configuration */ + + putreg32(FSMC_BCR_NOR|FSMC_BCR_FACCEN|FSMC_BCR_MWID16|FSMC_BCR_WREN, STM32_FSMC_BCR2); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32(FSMC_BTR_ADDSET(3)|FSMC_BTR_ADDHLD(1)|FSMC_BTR_DATAST(6)|FSMC_BTR_BUSTURN(1)| + FSMC_BTR_CLKDIV(1)|FSMC_BTR_DATLAT(2)|FSMC_BTR_ACCMODB, STM32_FSMC_BTR2); + + putreg32(0x0fffffff, STM32_FSMC_BWTR2); + + /* Enable the bank */ + + putreg32(FSMC_BCR_MBKEN|FSMC_BCR_NOR|FSMC_BCR_FACCEN|FSMC_BCR_MWID16|FSMC_BCR_WREN, STM32_FSMC_BCR2); +} +#endif /* CONFIG_STM32_FSMC */ diff --git a/configs/stm3210e-eval/src/stm32_selectsram.c b/configs/stm3210e-eval/src/stm32_selectsram.c new file mode 100644 index 0000000000000000000000000000000000000000..305f29e8eb146dea96987349792742bcb4722e28 --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_selectsram.c @@ -0,0 +1,145 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_selectsram.c + * + * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32.h" +#include "stm3210e-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/* 512Kx16 SRAM is connected to bank2 of the FSMC interface and both 8- and 16-bit + * accesses are allowed by BLN0 and BLN1 connected to BLE and BHE of SRAM, + * respectively. + * + * Pin Usage (per schematic) + * FLASH SRAM NAND LCD + * D[0..15] [0..15] [0..15] [0..7] [0..15] + * A[0..23] [0..22] [0..18] [16,17] [0] + * FSMC_NBL0 PE0 OUT ~BLE --- --- --- + * FSMC_NBL1 PE1 OUT ~BHE --- --- --- + * FSMC_NE2 PG9 OUT --- ~E --- --- + * FSMC_NE3 PG10 OUT ~CE --- --- --- + * FSMC_NE4 PG12 OUT --- --- --- ~CS + * FSMC_NWE PD5 OUT ~WE ~W ~W ~WR/SCL + * FSMC_NOE PD4 OUT ~OE ~G ~R ~RD + * FSMC_NWAIT PD6 IN --- R~B --- --- + * FSMC_INT2 PG6* IN --- --- R~B --- + * + * *JP7 will switch to PD6 + */ + +/* GPIO configurations unique to SRAM */ + +static const uint16_t g_sramconfig[] = +{ + /* NE3, NBL0, NBL1, */ + + GPIO_NPS_NE3, GPIO_NPS_NBL0, GPIO_NPS_NBL1 +}; +#define NSRAM_CONFIG (sizeof(g_sramconfig)/sizeof(uint16_t)) + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_selectsram + * + * Description: + * Initialize to access external SRAM + * + ************************************************************************************/ + +void stm32_selectsram(void) +{ + /* Configure new GPIO state */ + + stm32_extmemgpios(g_commonconfig, NCOMMON_CONFIG); + stm32_extmemgpios(g_sramconfig, NSRAM_CONFIG); + + /* Enable AHB clocking to the FSMC */ + + stm32_enablefsmc(); + + /* Bank1 NOR/SRAM control register configuration */ + + putreg32(FSMC_BCR_MWID16|FSMC_BCR_WREN, STM32_FSMC_BCR3); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32(FSMC_BTR_ADDSET(1)|FSMC_BTR_ADDHLD(1)|FSMC_BTR_DATAST(3)|FSMC_BTR_BUSTURN(1)| + FSMC_BTR_CLKDIV(1)|FSMC_BTR_DATLAT(2)|FSMC_BTR_ACCMODA, STM32_FSMC_BTR3); + + putreg32(0xffffffff, STM32_FSMC_BWTR3); + + /* Enable the bank */ + + putreg32(FSMC_BCR_MBKEN|FSMC_BCR_MWID16|FSMC_BCR_WREN, STM32_FSMC_BCR3); +} + +#endif /* CONFIG_STM32_FSMC */ + + diff --git a/configs/stm3210e-eval/src/stm32_spi.c b/configs/stm3210e-eval/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..b64df8d679a8c02330021f862ac7d9cca711ed31 --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_spi.c @@ -0,0 +1,177 @@ +/************************************************************************************ + * configs/stm3210e_eval/src/stm32_spi.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "stm3210e-eval.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the STM3210E-EVAL board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ + /* NOTE: Clocking for SPI1 and/or SPI2 was already provided in stm32_rcc.c. + * Configurations of SPI pins is performed in stm32_spi.c. + * Here, we only initialize chip select pins unique to the board + * architecture. + */ + +#ifdef CONFIG_STM32_SPI1 + /* Configure the SPI-based FLASH CS GPIO */ + + stm32_configgpio(GPIO_FLASH_CS); +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + if (devid == SPIDEV_FLASH) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_FLASH_CS, !selected); + } +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/stm3210e-eval/src/stm32_usbdev.c b/configs/stm3210e-eval/src/stm32_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..9864798835c786a5c775acafd23a08c8ce4674e4 --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_usbdev.c @@ -0,0 +1,115 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_usbdev.c + * + * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm3210e-eval.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the STM3210E-EVAL board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + /* USB Soft Connect Pullup: PB.14 */ + + stm32_configgpio(GPIO_USB_PULLUP); +} + +/************************************************************************************ + * Name: stm32_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB software + * connect and disconnect), then the board software must provide stm32_pullup. + * See include/nuttx/usb/usbdev.h for additional description of this method. + * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be + * NULL. + * + ************************************************************************************/ + +int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); + stm32_gpiowrite(GPIO_USB_PULLUP, !enable); + return OK; +} + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} + diff --git a/configs/stm3210e-eval/src/stm32_usbmsc.c b/configs/stm3210e-eval/src/stm32_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..f9e65878aacf59b8d6dc8a7a7be172488721c154 --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_usbmsc.c @@ -0,0 +1,142 @@ +/**************************************************************************** + * configs/stm3210e-eval/src/stm32_usbmsc.c + * + * Copyright (C) 2009, 2011, 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the STM32 MMC/SD SDIO block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "stm32.h" + +/* There is nothing to do here if SDIO support is not selected. */ + +#ifdef CONFIG_STM32_SDIO + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/* SLOT number(s) could depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_STM3210E_EVAL +# undef STM32_MMCSDSLOTNO +# define STM32_MMCSDSLOTNO 0 +#else + /* Add configuration for new STM32 boards here */ +# error "Unrecognized STM32 board" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* If system/usbmsc is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see stm32_appinit.c). + * In this case, there is nothing further to be done here. + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS + FAR struct sdio_dev_s *sdio; + int ret; + + /* First, get an instance of the SDIO interface */ + + syslog(LOG_INFO, "Initializing SDIO slot %d\n", STM32_MMCSDSLOTNO); + + sdio = sdio_initialize(STM32_MMCSDSLOTNO); + if (!sdio) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + STM32_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + syslog(LOG_INFO, "Bind SDIO to the MMC/SD driver, minor=%d\n", + CONFIG_SYSTEM_USBMSC_DEVMINOR1); + + ret = mmcsd_slotinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1, sdio); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", + ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SDIO to the MMC/SD driver\n"); + + /* Then let's guess and say that there is a card in the slot. I need to check to + * see if the STM3210E-EVAL board supports a GPIO to detect if there is a card in + * the slot. + */ + + sdio_mediachange(sdio, true); + +#endif /* CONFIG_NSH_BUILTIN_APPS */ + + return OK; +} + +#endif /* CONFIG_STM32_SDIO */ diff --git a/configs/stm3210e-eval/src/stm32_watchdog.c b/configs/stm3210e-eval/src/stm32_watchdog.c new file mode 100644 index 0000000000000000000000000000000000000000..61b65e59c8c382c28f11c0a05efa2633e7c374d7 --- /dev/null +++ b/configs/stm3210e-eval/src/stm32_watchdog.c @@ -0,0 +1,135 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_watchdog.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Wathdog hardware should be enabled */ + +#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG) +# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_STM32_WDG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0" +# endif +#endif + +/* Use the un-calibrated LSI frequency if we have nothing better */ + +#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ) +# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecuture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ + /* Initialize tha register the watchdog timer device */ + +#if defined(CONFIG_STM32_WWDG) + stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH); + return OK; +#elif defined(CONFIG_STM32_IWDG) + stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ); + return OK; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/stm3210e-eval/tools/olimex-arm-usb-ocd.cfg b/configs/stm3210e-eval/tools/olimex-arm-usb-ocd.cfg new file mode 100644 index 0000000000000000000000000000000000000000..9752dd418742000e2b9a7d5bd10761d5c2f0ccf5 --- /dev/null +++ b/configs/stm3210e-eval/tools/olimex-arm-usb-ocd.cfg @@ -0,0 +1,13 @@ +# +# Olimex ARM-USB-OCD +# +# http://www.olimex.com/dev/arm-usb-ocd.html +# + +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG" +ft2232_layout olimex-jtag +ft2232_vid_pid 0x15ba 0x0003 + +#jtag_khz 600 + diff --git a/configs/stm3210e-eval/tools/oocd.sh b/configs/stm3210e-eval/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..d2cd6ae274a106e4b85d806dfe67f76ee9d2e63b --- /dev/null +++ b/configs/stm3210e-eval/tools/oocd.sh @@ -0,0 +1,90 @@ +#!/bin/sh + +# Get command line parameters + +USAGE="USAGE: $0 [-dh] " +ADVICE="Try '$0 -h' for more information" + + +while [ ! -z "$1" ]; do + case $1 in + -d ) + set -x + ;; + -h ) + echo "$0 is a tool for generation of proper version files for the NuttX build" + echo "" + echo $USAGE + echo "" + echo "Where:" + echo " -d" + echo " Enable script debug" + echo " -h" + echo " show this help message and exit" + echo " Use the OpenOCD 0.4.0" + echo " " + echo " The full path to the top-level NuttX directory" + exit 0 + ;; + * ) + break; + ;; + esac + shift +done + +TOPDIR=$1 +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + echo $ADVICE + exit 1 +fi + +# This script *probably* only works with the following versions of OpenOCD: + +# Local search directory and configurations + +OPENOCD_SEARCHDIR="${TOPDIR}/configs/stm3210e-eval/tools" +OPENOCD_WSEARCHDIR="`cygpath -w ${OPENOCD_SEARCHDIR}`" + +OPENOCD_PATH="/cygdrive/c/Program Files (x86)/OpenOCD/0.4.0/bin" +OPENOCD_EXE=openocd.exe +OPENOCD_INTERFACE="olimex-arm-usb-ocd.cfg" + + +OPENOCD_TARGET="stm32.cfg" +OPENOCD_ARGS="-s ${OPENOCD_WSEARCHDIR} -f ${OPENOCD_INTERFACE} -f ${OPENOCD_TARGET}" + +echo "Trying OpenOCD 0.4.0 path: ${OPENOCD_PATH}/${OPENOCD_EXE}" + +# Verify that everything is what it claims it is and is located where it claims it is. + +if [ ! -x "${OPENOCD_PATH}/${OPENOCD_EXE}" ]; then + echo "OpenOCD executable does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f "${OPENOCD_SEARCHDIR}/${OPENOCD_TARGET}" ]; then + echo "OpenOCD target config file does not exist: ${OPENOCD_SEARCHDIR}/${OPENOCD_TARGET}" + exit 1 +fi +if [ ! -f "${OPENOCD_SEARCHDIR}/${OPENOCD_INTERFACE}" ]; then + echo "OpenOCD interface config file does not exist: ${OPENOCD_SEARCHDIR}/${OPENOCD_INTERFACE}" + exit 1 +fi + +# Enable debug if so requested + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +# Okay... do it! + +echo "Starting OpenOCD" +"${OPENOCD_PATH}/${OPENOCD_EXE}" ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" + diff --git a/configs/stm3210e-eval/tools/stm32.cfg b/configs/stm3210e-eval/tools/stm32.cfg new file mode 100644 index 0000000000000000000000000000000000000000..463a85cfd2ba9f8503007f96fbdd5248f957752a --- /dev/null +++ b/configs/stm3210e-eval/tools/stm32.cfg @@ -0,0 +1,69 @@ +# script for stm32 + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME stm32 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +# Work-area is a space in RAM used for flash programming +# By default use 16kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x4000 +} + +# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz +jtag_khz 1000 + +jtag_nsrst_delay 100 +jtag_ntrst_delay 100 + +#jtag scan chain +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + # See STM Document RM0008 + # Section 26.6.3 + set _CPUTAPID 0x3ba00477 +} +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +if { [info exists BSTAPID ] } { + # FIXME this never gets used to override defaults... + set _BSTAPID $BSTAPID +} else { + # See STM Document RM0008 + # Section 29.6.2 + # Low density devices, Rev A + set _BSTAPID1 0x06412041 + # Medium density devices, Rev A + set _BSTAPID2 0x06410041 + # Medium density devices, Rev B and Rev Z + set _BSTAPID3 0x16410041 + # High density devices, Rev A + set _BSTAPID4 0x06414041 + # Connectivity line devices, Rev A and Rev Z + set _BSTAPID5 0x06418041 +} +jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \ + -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \ + -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME + +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME + +# For more information about the configuration files, take a look at: +# openocd.texi diff --git a/configs/stm3210e-eval/tools/usb-driver.txt b/configs/stm3210e-eval/tools/usb-driver.txt new file mode 100644 index 0000000000000000000000000000000000000000..83d7598a5569e5b386da7281f201cfa2f6441ed7 --- /dev/null +++ b/configs/stm3210e-eval/tools/usb-driver.txt @@ -0,0 +1,25 @@ +https://www.olimex.com/dev/pdf/ARM/JTAG/Repair%20Procedure%20for%20OpenOcd-Rev.%20G%20drivers.pdf + +Repair procedure for ARM-USB-OCD drivers + +1. Uninstalling ARM-USB-OCD drivers +------------------------------------- +1.1. Connect your programmer/debugger to your computer, open Device Manager + and uninstall the drivers for ARM-USB-OCD. +1.2. After you have uninstalled ARM-USB-TINY driver from Device Manager, + disconnect the programmer from your computer. +1.3. Now you should download FTClean.exe from here: + http://www.ftdichip.com/Support/Utilities/FTClean.zip. +1.4. After download is complete extract the "*.zip" file, open folder FTClean, + and run FTClean.exe +1.5. Ror VID (Hex) select "Other". And after that fill the first box with 15ba + and "PID (Hex)" with 0004. +1.6. Press "Clean System" button. Make sure that all FTDI devices are + disconnected. (My require administrator privileges). + +2. Re-installing the ARM-USB-OCD driver +--------------------------------------- +2.1 Connect the programmer/debugger to the computer. +2.2 When prompted, browse to the C:\gccfd\DRIVERS\ARM-USB-OCD-DRIVER + directory and install. (A different driver is required for OpenOCD + 0.4.0. That driver is available from the olimex.com web site). diff --git a/configs/stm3210e-eval/usbmsc/Make.defs b/configs/stm3210e-eval/usbmsc/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..2f4e87a1988775db8331d4320dcb795fa0db6317 --- /dev/null +++ b/configs/stm3210e-eval/usbmsc/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/stm3210e-eval/usbmsc/Make.defs +# +# Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3210e-eval/usbmsc/defconfig b/configs/stm3210e-eval/usbmsc/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..78ad7a1b5f27bc81fb442e3d60911c42d0e6fcab --- /dev/null +++ b/configs/stm3210e-eval/usbmsc/defconfig @@ -0,0 +1,1095 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +CONFIG_ARCH_CHIP_STM32F103ZE=y +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +CONFIG_STM32_SDIO=y +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SDIO Configuration +# +CONFIG_SDIO_DMAPRIO=0x00001000 +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3210E_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3210e-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# + +# +# STM3210E-EVAL LCD Hardware Configuration +# +# CONFIG_STM3210E_LCD is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="msconn_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_ARCH_HAVE_SDIO=y +CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y +CONFIG_MMCSD_SDIO=y +CONFIG_SDIO_PREFLIGHT=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_SDIO_BLOCKSETUP is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +CONFIG_USBMSC=y +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=2 +CONFIG_USBMSC_EPBULKIN=5 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=256 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" +CONFIG_USBMSC_VERSIONNO=0x0399 +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=2048 +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +CONFIG_SYSTEM_USBMSC=y +CONFIG_SYSTEM_USBMSC_NLUNS=1 +CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mmcsd0" +CONFIG_SYSTEM_USBMSC_DEVMINOR2=1 +CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_USBMSC_DEVMINOR3=2 +CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" +# CONFIG_SYSTEM_USBMSC_DEBUGMM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3210e-eval/usbmsc/setenv.sh b/configs/stm3210e-eval/usbmsc/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ee33a8d21dec2ddc8c4d49b54b4e4d8c9054a2ea --- /dev/null +++ b/configs/stm3210e-eval/usbmsc/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/stm3210e-eval/dfu/setenv.sh +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3210e-eval/usbserial/Make.defs b/configs/stm3210e-eval/usbserial/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..5c49c1a196760636bfc7f95794a17354829f0cff --- /dev/null +++ b/configs/stm3210e-eval/usbserial/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/stm3210e-eval/usbserial/Make.defs +# +# Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = ld.script.dfu +else + LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3210e-eval/usbserial/defconfig b/configs/stm3210e-eval/usbserial/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b20ad0966ca5ecc1955757f04d5eb7d919527d67 --- /dev/null +++ b/configs/stm3210e-eval/usbserial/defconfig @@ -0,0 +1,1050 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +CONFIG_ARCH_CHIP_STM32F103ZE=y +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3210E_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3210e-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# + +# +# STM3210E-EVAL LCD Hardware Configuration +# +# CONFIG_STM3210E_LCD is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=23 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="usbserial_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +CONFIG_PL2303=y +# CONFIG_PL2303_CONSOLE is not set +CONFIG_PL2303_EPINTIN=1 +CONFIG_PL2303_EPBULKOUT=2 +CONFIG_PL2303_EPBULKIN=3 +CONFIG_PL2303_EP0MAXPACKET=64 +CONFIG_PL2303_NWRREQS=4 +CONFIG_PL2303_NRDREQS=4 +CONFIG_PL2303_BULKIN_REQLEN=96 +CONFIG_PL2303_RXBUFSIZE=512 +CONFIG_PL2303_TXBUFSIZE=512 +CONFIG_PL2303_VENDORID=0x067b +CONFIG_PL2303_PRODUCTID=0x2303 +CONFIG_PL2303_VENDORSTR="Nuttx" +CONFIG_PL2303_PRODUCTSTR="USBdev Serial" +# CONFIG_CDCACM is not set +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +CONFIG_EXAMPLES_USBSERIAL=y +CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512 +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3210e-eval/usbserial/setenv.sh b/configs/stm3210e-eval/usbserial/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..046a7f5acfaf449155d6b236adc6f408d8285748 --- /dev/null +++ b/configs/stm3210e-eval/usbserial/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/stm3210e-eval/ostest/setenv.sh +# +# Copyright (C) 2009 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3220g-eval/Kconfig b/configs/stm3220g-eval/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..be0b0993e33ad6bc64a4431aa12fccc0afb5f58a --- /dev/null +++ b/configs/stm3220g-eval/Kconfig @@ -0,0 +1,42 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_STM3220G_EVAL + +config STM3220G_LCD + bool "Select support for the STM3210E-EVAL LCD" + default y + depends on LCD && STM32_FSMC + ---help--- + Enable support for the LCD on the STM3220G-EVAL board. See additional, + LCD-common settings in the drivers/lcd Kconfig file. + +config LCD_RDSHIFT + int "LCD data shift" + default 5 + depends on STM3220G_LCD + ---help--- + When reading 16-bit gram data, there appears to be a shift in the returned + data. This value fixes the offset. Default 5. + +config STM32_ILI9320_DISABLE + bool "Disable LCD_ILI9320 (and LCD_ILI9321) support" + default n + depends on STM3220G_LCD + ---help--- + The LCD driver dynamically selects the LCD based on the reported LCD + ID value. However, code size can be reduced by suppressing support for + individual LCDs using this option. + +config STM32_ILI9325_DISABLE + bool "Disable LCD_ILI9325 support" + default n + depends on STM3220G_LCD + ---help--- + The LCD driver dynamically selects the LCD based on the reported LCD + ID value. However, code size can be reduced by suppressing support for + individual LCDs using this option + +endif diff --git a/configs/stm3220g-eval/README.txt b/configs/stm3220g-eval/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..d1d9b8f34c90c6b29fa9627894eacad8539d4e4a --- /dev/null +++ b/configs/stm3220g-eval/README.txt @@ -0,0 +1,1161 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +STMicro STM3220G-EVAL development board. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - STM3220G-EVAL-specific Configuration Options + - LEDs + - Ethernet + - PWM + - CAN + - FSMC SRAM + - I/O Expanders + - STM3220G-EVAL-specific Configuration Options + - Configurations + +Development Environment +======================= + + Linux, OS X or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment because the Raisonance R-Link emulatator and some RIDE7 development tools + were used and those tools works only under Windows. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, + 5. The NuttX buildroot Toolchain (see below), or + 6. Any generic arm-none-eabi GNU toolchain. + + Most testing has been conducted using the CodeSourcery toolchain for Windows and + that is the default toolchain in most configurations. To use the Atollic + devkitARM, Raisonance GNU, or NuttX buildroot toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL : Generic arm-none-eabi toolchain + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + The toolchain may also be set using the kconfig-mconf utility (make menuconfig) + or by passing CONFIG_ARMV7M_TOOLCHAIN= to make, where is one + of CODESOURCERYW, CODESOURCERYL, ATOLLOC, DEVKITARM, RAISONANCE, BUILDROOT or + GNU_EABI as described above. + + NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + + Generic arm-none-eabi GNU Toolchain + ----------------------------------- + There are a number of toolchain projects providing support for the Cortex-M + class processors, including: + + GCC ARM Embedded + https://launchpad.net/gcc-arm-embedded + + Thumb2 Newlib Toolchain + https://github.com/EliasOenal/TNT + + Summon ARM Toolchain + https://github.com/esden/summon-arm-toolchain + + Yagarto + http://www.yagarto.de + + Others exist for various Linux distributions, MacPorts, etc. Any version + based on GCC 4.6.3 or later should work. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh stm3220g-eval/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +Ethernet +======== + +The Ethernet driver is configured to use the MII interface: + + Board Jumper Settings: + + Jumper Description + JP8 To enable MII, JP8 should not be fitted. + JP6 2-3: Enable MII interface mode + JP5 2-3: Provide 25 MHz clock for MII or 50 MHz clock for RMII by MCO at PA8 + SB1 Not used with MII + +LEDs +==== + +The STM3220G-EVAL board has four LEDs labeled LD1, LD2, LD3 and LD4 on the +board.. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/up_leds.c. The LEDs are used to encode OS-related\ +events as follows: + + SYMBOL Meaning LED1* LED2 LED3 LED4 + ------------------- ----------------------- ------- ------- ------- ------ + LED_STARTED NuttX has been started ON OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF + LED_IRQSENABLED Interrupts enabled ON ON OFF OFF + LED_STACKCREATED Idle stack created OFF OFF ON OFF + LED_INIRQ In an interrupt** ON N/C N/C OFF + LED_SIGNAL In a signal handler*** N/C ON N/C OFF + LED_ASSERTION An assertion failed ON ON N/C OFF + LED_PANIC The system has crashed N/C N/C N/C ON + LED_IDLE STM32 is is sleep mode (Optional, not used) + + * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot + and these LEDs will give you some indication of where the failure was + ** The normal state is LED3 ON and LED1 faintly glowing. This faint glow + is because of timer interrupts that result in the LED being illuminated + on a small proportion of the time. +*** LED2 may also flicker normally if signals are processed. + +PWM +=== + +The STM3220G-Eval has no real on-board PWM devices, but the board can be +configured to output a pulse train using timer output pins. The following +pins have been use to generate PWM output (see board.h for some other +candidates): + +TIM4 CH2. Pin PD13 is used by the FSMC (FSMC_A18) and is also connected +to the Motor Control Connector (CN5) just for this purpose. If FSMC is +not enabled, then FSMC_A18 will not be used (and will be tri-stated from +the LCD). + + CONFIGURATION: + + CONFIG_STM32_TIM4=y + CONFIG_PWM=n + CONFIG_PWM_PULSECOUNT=n + CONFIG_STM32_TIM4_PWM=y + CONFIG_STM32_TIM4_CHANNEL=2 + + ACCESS: + + Daughterboard Extension Connector, CN3, pin 32 + Ground is available on CN3, pin1 + + NOTE: TIM4 hardware will not support pulse counting. + +TIM8 CH4: Pin PC9 is used by the microSD card (MicroSDCard_D1) and I2S +(I2S_CKIN) but can be completely disconnected from both by opening JP16. + + CONFIGURATION: + + CONFIG_STM32_TIM8=y + CONFIG_PWM=n + CONFIG_PWM_PULSECOUNT=y + CONFIG_STM32_TIM8_PWM=y + CONFIG_STM32_TIM8_CHANNEL=4 + + ACCESS: + + Daughterboard Extension Connector, CN3, pin 17 + Ground is available on CN3, pin1 + +CAN +=== + +Connector 10 (CN10) is DB-9 male connector that can be used with CAN1 or CAN2. + + JP10 connects CAN1_RX or CAN2_RX to the CAN transceiver + JP3 connects CAN1_TX or CAN2_TX to the CAN transceiver + +CAN signals are then available on CN10 pins: + + CN10 Pin 7 = CANH + CN10 Pin 2 = CANL + +Mapping to STM32 GPIO pins: + + PD0 = FSMC_D2 & CAN1_RX + PD1 = FSMC_D3 & CAN1_TX + PB13 = ULPI_D6 & CAN2_TX + PB5 = ULPI_D7 & CAN2_RX + +Configuration Options: + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + + CONFIG_STM32_CAN1 - Enable support for CAN1 + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_STM32_CAN2 - Enable support for CAN2 + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + +FSMC SRAM +========= + +On-board SRAM +------------- + +A 16 Mbit SRAM is connected to the STM32F407IGH6 FSMC bus which shares the same +I/Os with the CAN1 bus. Jumper settings: + + JP1: Connect PE4 to SRAM as A20 + JP2: onnect PE3 to SRAM as A19 + +JP3 and JP10 must not be fitted for SRAM and LCD application. JP3 and JP10 +select CAN1 or CAN2 if fitted; neither if not fitted. + +The on-board SRAM can be configured by setting + + CONFIG_STM32_FSMC=y + CONFIG_STM32_FSMC_SRAM=y + CONFIG_HEAP2_BASE=0x64000000 + CONFIG_HEAP2_SIZE=2097152 + CONFIG_MM_REGIONS=2 + +Configuration Options +--------------------- + +Internal SRAM is available in all members of the STM32 family. In addition +to internal SRAM, SRAM may also be available through the FSMC. In order to +use FSMC SRAM, the following additional things need to be present in the +NuttX configuration file: + + CONFIG_STM32_FSMC=y : Enables the FSMC + CONFIG_STM32_FSMC_SRAM=y : Indicates that SRAM is available via the + FSMC (as opposed to an LCD or FLASH). + CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC + address space + CONFIG_HEAP2_SIZE : The size of the SRAM in the FSMC + address space + CONFIG_MM_REGIONS : Must be set to a large enough value to + include the FSMC SRAM + +SRAM Configurations +------------------- +There are 2 possible SRAM configurations: + + Configuration 1. System SRAM (only) + CONFIG_MM_REGIONS == 1 + Configuration 2. System SRAM and FSMC SRAM + CONFIG_MM_REGIONS == 2 + CONFIG_STM32_FSMC_SRAM defined + +I/O Expanders +============= + +The STM3220G-EVAL has two STMPE811QTR I/O expanders on board both connected to +the STM32 via I2C1. They share a common interrupt line: PI2. + +STMPE811 U24, I2C address 0x41 (7-bit) +------ ---- ---------------- -------------------------------------------- +STPE11 PIN BOARD SIGNAL BOARD CONNECTION +------ ---- ---------------- -------------------------------------------- + Y- TouchScreen_Y- LCD Connector XL + X- TouchScreen_X- LCD Connector XR + Y+ TouchScreen_Y+ LCD Connector XD + X+ TouchScreen_X+ LCD Connector XU + IN3 EXP_IO9 + IN2 EXP_IO10 + IN1 EXP_IO11 + IN0 EXP_IO12 + +STMPE811 U29, I2C address 0x44 (7-bit) +------ ---- ---------------- -------------------------------------------- +STPE11 PIN BOARD SIGNAL BOARD CONNECTION +------ ---- ---------------- -------------------------------------------- + Y- EXP_IO1 + X- EXP_IO2 + Y+ EXP_IO3 + X+ EXP_IO4 + IN3 EXP_IO5 + IN2 EXP_IO6 + IN1 EXP_IO7 + IN0 EXP_IO8 + +STM3220G-EVAL-specific Configuration Options +============================================ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32F207IG=y + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=stm3220g_eval (for the STM3220G-EVAL development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_STM3220G_EVAL=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + In addition to internal SRAM, SRAM may also be available through the FSMC. + In order to use FSMC SRAM, the following additional things need to be + present in the NuttX configuration file: + + CONFIG_STM32_FSMC_SRAM - Indicates that SRAM is available via the + FSMC (as opposed to an LCD or FLASH). + + CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space (hex) + + CONFIG_HEAP2_SIZE - The size of the SRAM in the FSMC address space (decimal) + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + AHB1 + ---- + CONFIG_STM32_CRC + CONFIG_STM32_BKPSRAM + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + CONFIG_STM32_ETHMAC + CONFIG_STM32_OTGHS + + AHB2 + ---- + CONFIG_STM32_DCMI + CONFIG_STM32_CRYP + CONFIG_STM32_HASH + CONFIG_STM32_RNG + CONFIG_STM32_OTGFS + + AHB3 + ---- + CONFIG_STM32_FSMC + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_TIM12 + CONFIG_STM32_TIM13 + CONFIG_STM32_TIM14 + CONFIG_STM32_WWDG + CONFIG_STM32_IWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI3 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_I2C3 + CONFIG_STM32_CAN1 + CONFIG_STM32_CAN2 + CONFIG_STM32_DAC1 + CONFIG_STM32_DAC2 + CONFIG_STM32_PWR -- Required for RTC + + APB2 + ---- + CONFIG_STM32_TIM1 + CONFIG_STM32_TIM8 + CONFIG_STM32_USART1 + CONFIG_STM32_USART6 + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + CONFIG_STM32_ADC3 + CONFIG_STM32_SDIO + CONFIG_STM32_SPI1 + CONFIG_STM32_SYSCFG + CONFIG_STM32_TIM9 + CONFIG_STM32_TIM10 + CONFIG_STM32_TIM11 + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + JTAG Enable settings (by default JTAG-DP and SW-DP are disabled): + + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + + STM3220xxx specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + + CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO + and CONFIG_STM32_DMA2. + CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. + Default: Medium + CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: + 4-bit transfer mode. + + CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board + CONFIG_STM32_MII - Support Ethernet MII interface + CONFIG_STM32_MII_MCO1 - Use MCO1 to clock the MII interface + CONFIG_STM32_MII_MCO2 - Use MCO2 to clock the MII interface + CONFIG_STM32_RMII - Support Ethernet RMII interface + CONFIG_STM32_AUTONEG - Use PHY autonegotion to determine speed and mode + CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this + may be defined to select full duplex mode. Default: half-duplex + CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this + may be defined to select 100 MBps speed. Default: 10 Mbps + CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is + defined. The PHY status register address may diff from PHY to PHY. This + configuration sets the address of the PHY status register. + CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides bit mask indicating 10 or 100MBps speed. + CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides the value of the speed bit(s) indicating 100MBps speed. + CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provide bit mask indicating full or half duplex modes. + CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides the value of the mode bits indicating full duplex mode. + CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported + but some hooks are indicated with this condition. + + STM3220G-EVAL CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + + STM3220G-EVAL LCD Hardware Configuration + + STM32 USB OTG FS Host Driver Support + + Pre-requisites + + CONFIG_USBHOST - Enable general USB host support + CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block + CONFIG_STM32_SYSCFG - Needed + + Options: + + CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. + Default 128 (512 bytes) + CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO + in 32-bit words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit + words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128 + CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever + want to do that? + CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access + debug. Depends on CONFIG_DEBUG. + CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB + packets. Depends on CONFIG_DEBUG. + +Configurations +============== + +Each STM3220G-EVAL configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh stm3220g-eval/ + cd - + . ./setenv.sh + +Where is one of the following: + + dhcpd: + ----- + + This builds the DCHP server using the apps/examples/dhcpd application + (for execution from FLASH.) See apps/examples/README.txt for information + about the dhcpd example. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. The server address is 10.0.0.1 and it serves IP addresses in the range + 10.0.0.2 through 10.0.0.17 (all of which, of course, are configurable). + + 3. Default build environment (also easily reconfigured): + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y + + nettest: + ------- + + This configuration directory may be used to verify networking performance + using the STM32's Ethernet controller. It uses apps/examples/nettest to excercise the + TCP/IP network. + + CONFIG_EXAMPLES_NETTEST_SERVER=n : Target is configured as the client + CONFIG_EXAMPLES_NETTEST_PERFORMANCE=y : Only network performance is verified. + CONFIG_EXAMPLES_NETTEST_IPADDR=(10<<24|0<<16|0<<8|2) : Target side is IP: 10.0.0.2 + CONFIG_EXAMPLES_NETTEST_DRIPADDR=(10<<24|0<<16|0<<8|1) : Host side is IP: 10.0.0.1 + CONFIG_EXAMPLES_NETTEST_CLIENTIP=(10<<24|0<<16|0<<8|1) : Server address used by which ever is client. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default build environment: + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_CYGWIN=y : Under Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + + Than can, of course, be easily changes by reconfiguring per Note 1. + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables both the serial and telnet NSH interfaces. + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_NSH_DHCPC=n : DHCP is disabled + CONFIG_NSH_IPADDR=(192<<24|168<<16|13<<8|161) : Target IP address 192.168.8.161 + CONFIG_NSH_DRIPADDR=(192<<24|168<<16|13<<8|1) : Host IP address 192.168.8.1 + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. This example assumes that a network is connected. During its + initialization, it will try to negotiate the link speed. If you have + no network connected when you reset the board, there will be a long + delay (maybe 30 seconds?) before anything happens. That is the timeout + before the networking finally gives up and decides that no network is + available. + + 3. This example supports the ADC test (apps/examples/adc) but this must + be manually enabled by selecting: + + CONFIG_ADC=y : Enable the generic ADC infrastructure + CONFIG_STM32_ADC3=y : Enable ADC3 + CONFIG_STM32_TIM1=y : Enable Timer 1 + CONFIG_STM32_TIM1_ADC=y : Indicate that timer 1 will be used to trigger an ADC + CONFIG_STM32_TIM1_ADC3=y : Assign timer 1 to drive ADC3 sampling + CONFIG_STM32_ADC3_SAMPLE_FREQUENCY=100 : Select a sampling frequency + + See also apps/examples/README.txt + + General debug for analog devices (ADC/DAC): + + CONFIG_DEBUG_ANALOG + + 4. This example supports the PWM test (apps/examples/pwm) but this must + be manually enabled by selecting eeither + + CONFIG_PWM=y : Enable the generic PWM infrastructure + CONFIG_PWM_PULSECOUNT=n : Disable to support for TIM1/8 pulse counts + CONFIG_STM32_TIM4=y : Enable TIM4 + CONFIG_STM32_TIM4_PWM=y : Use TIM4 to generate PWM output + CONFIG_STM32_TIM4_CHANNEL=2 : Select output on TIM4, channel 2 + + If CONFIG_STM32_FSMC is disabled, output will appear on CN3, pin 32. + Ground is available on CN3, pin1. + + Or.. + + CONFIG_PWM=y : Enable the generic PWM infrastructure + CONFIG_PWM_PULSECOUNT=y : Enable to support for TIM1/8 pulse counts + CONFIG_STM32_TIM8=y : Enable TIM8 + CONFIG_STM32_TIM8_PWM=y : Use TIM8 to generate PWM output + CONFIG_STM32_TIM8_CHANNEL=4 : Select output on TIM8, channel 4 + + If CONFIG_STM32_FSMC is disabled, output will appear on CN3, pin 17 + Ground is available on CN23 pin1. + + See also include/board.h and apps/examples/README.txt + + Special PWM-only debug options: + + CONFIG_DEBUG_PWM + + 5. This example supports the CAN loopback test (apps/examples/can) but this + must be manually enabled by selecting: + + CONFIG_CAN=y : Enable the generic CAN infrastructure + CONFIG_CAN_EXTID=y or n : Enable to support extended ID frames + CONFIG_STM32_CAN1=y : Enable CAN1 + CONFIG_CAN_LOOPBACK=y : Enable CAN loopback mode + + See also apps/examples/README.txt + + Special CAN-only debug options: + + CONFIG_DEBUG_CAN + CONFIG_CAN_REGDEBUG + + 6. This example can support an FTP client. In order to build in FTP client + support simply reconfigure NuttX, adding: + + CONFIG_NETUTILS_FTPC=y + CONFIG_EXAMPLES_FTPC=y + + 7. This example can support an FTP server. In order to build in FTP server + support simply add the following lines in the NuttX configuration file: + + CONFIG_NETUTILS_FTPD=y + CONFIG_EXAMPLES_FTPD=y + + And enable poll() support in the NuttX configuration file: + + CONFIG_DISABLE_POLL=n + + 8. This example supports the watchdog timer test (apps/examples/watchdog) + but this must be manually enabled by selecting: + + CONFIG_WATCHDOG=y : Enables watchdog timer driver support + CONFIG_STM32_WWDG=y : Enables the WWDG timer facility, OR + CONFIG_STM32_IWDG=y : Enables the IWDG timer facility (but not both) + + The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result, + has a maximum timeout value of 49 milliseconds. For WWDG watchdog, you + should also add the fillowing to the configuration file: + + CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20 + CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49 + + The IWDG timer has a range of about 35 seconds and should not be an issue. + + 9. Adding LCD and graphics support: + + Enable the application configurations that you want to use. As examples: + + CONFIG_EXAMPLES_NX=y : Pick one or more + CONFIG_EXAMPLES_NXHELLO=y : + CONFIG_EXAMPLES_NXIMAGE=y : + CONFIG_EXAMPLES_NXLINES=y : + + defconfig (nuttx/.config): + + CONFIG_STM32_FSMC=y : FSMC support is required for the LCD + CONFIG_NX=y : Enable graphics suppport + CONFIG_MM_REGIONS=2 : When FSMC is enabled, so is the on-board SRAM memory region + + 10. USB OTG FS Device or Host Support + + CONFIG_USBDEV : Enable USB device support, OR + CONFIG_USBHOST : Enable USB host support (but not both) + + CONFIG_STM32_OTGFS : Enable the STM32 USB OTG FS block + CONFIG_STM32_SYSCFG : Needed for all USB OTF FS support + + CONFIG_SCHED_WORKQUEUE : Worker thread support is required for the mass + storage class (both host and device). + CONFIG_NSH_ARCHINIT : Architecture specific USB initialization + is needed + + 11. This configuration requires that jumper JP22 be set to enable RS-232 operation. + + nsh2: + ----- + + This is an alternative NSH configuration. One limitation of the STM3220G-EVAL + board is that you cannot have both a UART-based NSH console and SDIO support. + The nsh2 differs from the nsh configuration in the following ways: + + -CONFIG_STM32_USART3=y : USART3 is disabled + +CONFIG_STM32_USART3=n + + -CONFIG_STM32_SDIO=n : SDIO is enabled + +CONFIG_STM32_SDIO=y + + Logically, these are the only differences: This configuration has SDIO (and + the SD card) enabled and the serial console disabled. There is ONLY a + Telnet console!. + + There are some special settings to make life with only a Telnet + + CONFIG_SYSLOG=y - Enables the System Logging feature. + CONFIG_RAMLOG=y - Enable the RAM-based logging feature. + CONFIG_RAMLOG_CONSOLE=y - Use the RAM logger as the default console. + This means that any console output from non-Telnet threads will + go into the circular buffer in RAM. + CONFIG_RAMLOG_SYSLOG - This enables the RAM-based logger as the + system logger. This means that (1) in addition to the console + output from other tasks, ALL of the debug output will also to + to the circular buffer in RAM, and (2) NSH will now support a + command called 'dmesg' that can be used to dump the RAM log. + + There are a few other configuration differences as necessary to support + this different device configuration. Just the do the 'diff' if you are + curious. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. See the notes for the nsh configuration. Most also apply to the nsh2 + configuration. + + 3. RS-232 is disabled, but Telnet is still available for use as a console. + Since RS-232 and SDIO use the same pins (one controlled by JP22), RS232 + and SDIO cannot be used concurrently. + + 4. This configuration requires that jumper JP22 be set to enable SDIO + operation. To enable MicroSD Card, which shares same I/Os with RS-232, + JP22 is not fitted. + + 5. In order to use SDIO without overruns, DMA must be used. + + 6. Another SDIO/DMA issue. This one is probably a software bug. This is + the bug as stated in the TODO list: + + "If you use a large I/O buffer to access the file system, then the + MMCSD driver will perform multiple block SD transfers. With DMA + ON, this seems to result in CRC errors detected by the hardware + during the transfer. Workaround: CONFIG_MMCSD_MULTIBLOCK_DISABLE=y" + + For this reason, CONFIG_MMCSD_MULTIBLOCK_DISABLE=y appears in the defconfig + file. + + 7. Another DMA-related concern. I see this statement in the reference + manual: "The burst configuration has to be selected in order to respect + the AHB protocol, where bursts must not cross the 1 KB address boundary + because the minimum address space that can be allocated to a single slave + is 1 KB. This means that the 1 KB address boundary should not be crossed + by a burst block transfer, otherwise an AHB error would be generated, + that is not reported by the DMA registers." + + There is nothing in the DMA driver to prevent this now. + + nxwm + ---- + This is a special configuration setup for the NxWM window manager + UnitTest. The NxWM window manager can be found here: + + nuttx-code/NxWidgets/nxwm + + The NxWM unit test can be found at: + + nuttx-code/NxWidgets/UnitTests/nxwm + + Documentation for installing the NxWM unit test can be found here: + + nuttx-code/NxWidgets/UnitTests/README.txt + + Here is the quick summary of the build steps (Assuming that all of + the required packages are available in a directory ~/nuttx-code): + + 1. Install the nxwm configuration + + $ cd ~/nuttx-code/nuttx/tools + $ ./configure.sh stm3220g-eval/nxwm + + 2. Make the build context (only) + + $ cd .. + $ . ./setenv.sh + $ make context + ... + + 3. Install the nxwm unit test + + $ cd ~/nuttx-code/NxWidgets + $ tools/install.sh ~/nuttx-code/apps nxwm + Creating symbolic link + - To ~/nuttx-code/NxWidgets/UnitTests/nxwm + - At ~/nuttx-code/apps/external + + 4. Build the NxWidgets library + + $ cd ~/nuttx-code/NxWidgets/libnxwidgets + $ make TOPDIR=~/nuttx-code/nuttx + ... + + 5. Build the NxWM library + + $ cd ~/nuttx-code/NxWidgets/nxwm + $ make TOPDIR=~/nuttx-code/nuttx + ... + + 6. Built NuttX with the installed unit test as the application + + $ cd ~/nuttx-code/nuttx + $ make + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. This configuration is currently set up to build under Cygwin on + a Windows machine using the CodeSourcery Windows toolchain. + That configuration can be easy changed as described in Note 1. + + telnetd: + -------- + + A simple test of the Telnet daemon(see apps/netutils/README.txt, + apps/examples/README.txt, and apps/examples/telnetd). This is + the same daemon that is used in the nsh configuration so if you + use NSH, then you don't care about this. This test is good for + testing the Telnet daemon only because it works in a simpler + environment than does the nsh configuration. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. Default build environment (easily reconfigured): + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y diff --git a/configs/stm3220g-eval/dhcpd/Make.defs b/configs/stm3220g-eval/dhcpd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6f84793960f3e6b5911d5969f50d4a058ae15615 --- /dev/null +++ b/configs/stm3220g-eval/dhcpd/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3220g-eval/dhcpd/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3220g-eval/dhcpd/defconfig b/configs/stm3220g-eval/dhcpd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..2817808c5e9e239498e158050c6967ba63bbdb9b --- /dev/null +++ b/configs/stm3220g-eval/dhcpd/defconfig @@ -0,0 +1,1181 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +CONFIG_ARCH_CHIP_STM32F207IG=y +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +CONFIG_STM32_STM32F20XX=y +# CONFIG_STM32_STM32F205 is not set +CONFIG_STM32_STM32F207=y +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=10926 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3220G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3220g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=13 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="dhcpd_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +# CONFIG_NET_TCP is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=8 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +# CONFIG_STDIO_LINEBUFFER is not set +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_DNSCLIENT is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +CONFIG_EXAMPLES_DHCPD=y +CONFIG_EXAMPLES_DHCPD_NOMAC=y +CONFIG_EXAMPLES_DHCPD_IPADDR=0x0a000001 +CONFIG_EXAMPLES_DHCPD_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +CONFIG_NETUTILS_DHCPD=y +# CONFIG_NETUTILS_DHCPD_IGNOREBROADCAST is not set +CONFIG_NETUTILS_DHCPD_INTERFACE="eth0" +CONFIG_NETUTILS_DHCPD_LEASETIME=864000 +CONFIG_NETUTILS_DHCPD_MINLEASETIME=86400 +CONFIG_NETUTILS_DHCPD_MAXLEASETIME=2592000 +CONFIG_NETUTILS_DHCPD_MAXLEASES=6 +CONFIG_NETUTILS_DHCPD_STARTIP=0x0a000002 +CONFIG_NETUTILS_DHCPD_ROUTERIP=0x0a000001 +CONFIG_NETUTILS_DHCPD_NETMASK=0xffffff00 +CONFIG_NETUTILS_DHCPD_DNSIP=0x08080808 +CONFIG_NETUTILS_DHCPD_OFFERTIME=3600 +CONFIG_NETUTILS_DHCPD_DECLINETIME=3600 +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3220g-eval/dhcpd/setenv.sh b/configs/stm3220g-eval/dhcpd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..931d4d1cade79f3c533a324c05e1af9d392fe539 --- /dev/null +++ b/configs/stm3220g-eval/dhcpd/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/stm3220g-eval/dhcpd/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3220g-eval/include/board.h b/configs/stm3220g-eval/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..d8dad32f74fe36ee01024f0ca22059cf655dad66 --- /dev/null +++ b/configs/stm3220g-eval/include/board.h @@ -0,0 +1,490 @@ +/************************************************************************************ + * configs/stm3220g-eval/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_STM3220G_EVAL_INCLUDE_BOARD_H +#define __CONFIGS_STM3220G_EVAL_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* Four clock sources are available on STM3220G-EVAL evaluation board for + * STM32F207IGH6 and RTC embedded: + * + * X1, 25 MHz crystal for ethernet PHY with socket. It can be removed when clock is + * provided by MCO pin of the MCU + * X2, 26 MHz crystal for USB OTG HS PHY + * X3, 32 kHz crystal for embedded RTC + * X4, 25 MHz crystal with socket for STM32F207IGH6 microcontroller (It can be removed + * from socket when internal RC clock is used.) + * + * This is the "standard" configuration as set up by arch/arm/src/stm32f40xx_rcc.c: + * System Clock source : PLL (HSE) + * SYSCLK(Hz) : 120000000 Determined by PLL configuration + * HCLK(Hz) : 120000000 (STM32_RCC_CFGR_HPRE) + * AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE) + * APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1) + * APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2) + * HSE Frequency(Hz) : 25000000 (STM32_BOARD_XTAL) + * PLLM : 25 (STM32_PLLCFG_PLLM) + * PLLN : 240 (STM32_PLLCFG_PLLN) + * PLLP : 2 (STM32_PLLCFG_PLLP) + * PLLQ : 5 (STM32_PLLCFG_PLLQ) + * Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK + * Flash Latency(WS) : 5 + * Prefetch Buffer : OFF + * Instruction cache : ON + * Data cache : ON + * Require 48MHz for USB OTG FS, : Enabled + * SDIO and RNG clock + */ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC + * HSE - On-board crystal frequency is 25MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 25000000ul + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* Main PLL Configuration. + * + * PLL source is HSE + * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN + * = (25,000,000 / 25) * 240 + * = 240,000,000 + * SYSCLK = PLL_VCO / PLLP + * = 240,000,000 / 2 = 120,000,000 + * USB OTG FS, SDIO and RNG Clock + * = PLL_VCO / PLLQ + * = 240,000,000 / 5 = 48,000,000 + * = 48,000,000 + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(240) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(5) + +#define STM32_SYSCLK_FREQUENCY 120000000ul + +/* AHB clock (HCLK) is SYSCLK (120MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/4 (30MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) + +/* Timers driven from APB1 will be twice PCLK1 (60Mhz)*/ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 (60MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 (120Mhz)*/ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY + +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz + */ + +#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)= 16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)= 12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* Ethernet *************************************************************************/ +/* We need to provide clocking to the MII PHY via MCO1 (PA8) */ + +#if defined(CONFIG_NET) && defined(CONFIG_STM32_ETHMAC) + +# if !defined(CONFIG_STM32_MII) +# warning "CONFIG_STM32_MII required for Ethernet" +# elif !defined(CONFIG_STM32_MII_MCO1) +# warning "CONFIG_STM32_MII_MCO1 required for Ethernet MII" +# else + + /* Output HSE clock (25MHz) on MCO1 pin (PA8) to clock the PHY */ + +# define BOARD_CFGR_MC01_SOURCE RCC_CFGR_MCO1_HSE +# define BOARD_CFGR_MC01_DIVIDER RCC_CFGR_MCO1PRE_NONE + +# endif +#endif + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_LED3 2 +#define BOARD_LED4 3 +#define BOARD_NLEDS 4 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) +#define BOARD_LED4_BIT (1 << BOARD_LED4) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the + * STM3220G-EVAL. The following definitions describe how NuttX controls the LEDs: + */ + +#define LED_STARTED 0 /* LED1 */ +#define LED_HEAPALLOCATE 1 /* LED2 */ +#define LED_IRQSENABLED 2 /* LED1 + LED2 */ +#define LED_STACKCREATED 3 /* LED3 */ +#define LED_INIRQ 4 /* LED1 + LED3 */ +#define LED_SIGNAL 5 /* LED2 + LED3 */ +#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */ +#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */ + +/* Button definitions ***************************************************************/ +/* The STM3220G-EVAL supports three buttons: */ + +#define BUTTON_WAKEUP 0 +#define BUTTON_TAMPER 1 +#define BUTTON_USER 2 + +#define NUM_BUTTONS 3 + +#define BUTTON_WAKEUP_BIT (1 << BUTTON_WAKEUP) +#define BUTTON_TAMPER_BIT (1 << BUTTON_TAMPER) +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* Alternate function pin selections ************************************************/ + +/* UART3: + * + * - PC11 is MicroSDCard_D3 & RS232/IrDA_RX (JP22 open) + * - PC10 is MicroSDCard_D2 & RSS232/IrDA_TX + */ + +#ifdef CONFIG_STM32_USART3 +# define GPIO_USART3_RX GPIO_USART3_RX_2 +# define GPIO_USART3_TX GPIO_USART3_TX_2 +#endif + +/* Ethernet: + * + * - PA2 is ETH_MDIO + * - PC1 is ETH_MDC + * - PB5 is ETH_PPS_OUT + * - PH2 is ETH_MII_CRS + * - PH3 is ETH_MII_COL + * - PI10 is ETH_MII_RX_ER + * - PH6 is ETH_MII_RXD2 + * - PH7 is ETH_MII_RXD3 + * - PC3 is ETH_MII_TX_CLK + * - PC2 is ETH_MII_TXD2 + * - PB8 is ETH_MII_TXD3 + * - PA1 is ETH_MII_RX_CLK/ETH_RMII_REF_CLK + * - PA7 is ETH_MII_RX_DV/ETH_RMII_CRS_DV + * - PC4 is ETH_MII_RXD0/ETH_RMII_RXD0 + * - PC5 is ETH_MII_RXD1/ETH_RMII_RXD1 + * - PG11 is ETH_MII_TX_EN/ETH_RMII_TX_EN + * - PG13 is ETH_MII_TXD0/ETH_RMII_TXD0 + * - PG14 is ETH_MII_TXD1/ETH_RMII_TXD1 + */ + +#define GPIO_ETH_PPS_OUT GPIO_ETH_PPS_OUT_1 +#define GPIO_ETH_MII_CRS GPIO_ETH_MII_CRS_2 +#define GPIO_ETH_MII_COL GPIO_ETH_MII_COL_2 +#define GPIO_ETH_MII_RX_ER GPIO_ETH_MII_RX_ER_2 +#define GPIO_ETH_MII_RXD2 GPIO_ETH_MII_RXD2_2 +#define GPIO_ETH_MII_RXD3 GPIO_ETH_MII_RXD3_2 +#define GPIO_ETH_MII_TXD3 GPIO_ETH_MII_TXD3_1 +#define GPIO_ETH_MII_TX_EN GPIO_ETH_MII_TX_EN_2 +#define GPIO_ETH_MII_TXD0 GPIO_ETH_MII_TXD0_2 +#define GPIO_ETH_MII_TXD1 GPIO_ETH_MII_TXD1_2 +#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2 +#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 +#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2 + +/* PWM + * + * The STM3220G-Eval has no real on-board PWM devices, but the board can be + * configured to output a pulse train using the following: + * + * If FSMC is not used: + * TIM4 CH2OUT: PD13 FSMC_A18 / MC_TIM4_CH2OUT + * Daughterboard Extension Connector, CN3, pin 32 + * Motor Control Connector CN15, pin 33 -- not available unless you bridge SB14. + * + * TIM1 CH1OUT: PE9 FSMC_D6 + * Daughterboard Extension Connector, CN2, pin 24 + * + * TIM1_CH2OUT: PE11 FSMC_D8 + * Daughterboard Extension Connector, CN2, pin 26 + * + * TIM1_CH3OUT: PE13 FSMC_D10 + * Daughterboard Extension Connector, CN2, pin 28 + * + * TIM1_CH4OUT: PE14 FSMC_D11 + * Daughterboard Extension Connector, CN2, pin 29 + * + * If OTG FS is not used + * + * TIM1_CH3OUT: PA10 OTG_FS_ID + * Daughterboard Extension Connector, CN3, pin 14 + * + * TIM1_CH4OUT: PA11 OTG_FS_DM + * Daughterboard Extension Connector, CN3, pin 11 + * + * If DMCI is not used + * + * TIM8 CH1OUT: PI5 DCMI_VSYNC & MC + * Daughterboard Extension Connector, CN4, pin 4 + * + * TIM8_CH2OUT: PI6 DCMI_D6 & MC + * Daughterboard Extension Connector, CN4, pin 3 + * + * TIM8_CH3OUT: PI7 DCMI_D7 & MC + * Daughterboard Extension Connector, CN4, pin 2 + * + * If SDIO is not used + * + * TIM8_CH3OUT: PC8 MicroSDCard_D0 & MC + * Daughterboard Extension Connector, CN3, pin 18 + * + * TIM8_CH4OUT: PC9 MicroSDCard_D1 & I2S_CKIN (Need JP16 open) + * Daughterboard Extension Connector, CN3, pin 17 + * + * Others + * + * TIM8 CH1OUT: PC6 I2S_MCK & Smartcard_IO (JP21 open) + */ + +#if !defined(CONFIG_STM32_FSMC) +# define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2 +# define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2 +# define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_2 +# define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_2 +# define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_2 +#elif !defined(CONFIG_STM32_OTGFS) +# define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1 +# define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_1 +#endif + +#if !defined(CONFIG_STM32_DCMI) +# define GPIO_TIM8_CH1OUT GPIO_TIM8_CH1OUT_2 +# define GPIO_TIM8_CH2OUT GPIO_TIM8_CH2OUT_2 +# define GPIO_TIM8_CH3OUT GPIO_TIM8_CH3OUT_2 +#else +# define GPIO_TIM8_CH1OUT GPIO_TIM8_CH1OUT_1 +# if !defined(CONFIG_STM32_SDIO) +# define GPIO_TIM8_CH3OUT GPIO_TIM8_CH3OUT_1 +# endif +#endif + +#if !defined(CONFIG_STM32_SDIO) +# define GPIO_TIM8_CH4OUT GPIO_TIM8_CH4OUT_1 +#endif + +/* CAN + * + * Connector 10 (CN10) is DB-9 male connector that can be used with CAN1 or CAN2. + * + * JP10 connects CAN1_RX or CAN2_RX to the CAN transceiver + * JP3 connects CAN1_TX or CAN2_TX to the CAN transceiver + * + * CAN signals are then available on CN10 pins: + * + * CN10 Pin 7 = CANH + * CN10 Pin 2 = CANL + * + * Mapping to STM32 GPIO pins: + * + * PD0 = FSMC_D2 & CAN1_RX + * PD1 = FSMC_D3 & CAN1_TX + * PB13 = ULPI_D6 & CAN2_TX + * PB5 = ULPI_D7 & CAN2_RX + */ + +#define GPIO_CAN1_RX GPIO_CAN1_RX_3 +#define GPIO_CAN1_TX GPIO_CAN1_TX_3 + +#define GPIO_CAN2_RX GPIO_CAN2_RX_2 +#define GPIO_CAN2_TX GPIO_CAN2_TX_1 + +/* I2C. Only I2C1 is available on the STM3220G-EVAL. I2C1_SCL and I2C1_SDA are + * available on the following pins: + * + * - PB6 is I2C1_SCL + * - PB9 is I2C1_SDA + */ + +#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 +#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2 + +/* DMA Channl/Stream Selections *****************************************************/ +/* Stream selections are arbitrary for now but might become important in the future + * is we set aside more DMA channels/streams. + * + * SDIO DMA + * DMAMAP_SDIO_1 = Channel 4, Stream 3 + * DMAMAP_SDIO_2 = Channel 4, Stream 6 + */ + +#define DMAMAP_SDIO DMAMAP_SDIO_1 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +/************************************************************************************ + * Name: stm3220g_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the STM3210E-EVAL board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * dispaly is cleared by simply setting all GRAM memory to the specified color. + * + ************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm3220g_lcdclear(uint16_t color); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_STM3220G_EVAL_INCLUDE_BOARD_H */ diff --git a/configs/stm3220g-eval/nettest/Make.defs b/configs/stm3220g-eval/nettest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..525d5e47738968cc5c1b607202498f5a2e4613a1 --- /dev/null +++ b/configs/stm3220g-eval/nettest/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3220g-eval/nettest/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3220g-eval/nettest/defconfig b/configs/stm3220g-eval/nettest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..0e4dc1d9843ba9cd174a0c8fd354905307ca003b --- /dev/null +++ b/configs/stm3220g-eval/nettest/defconfig @@ -0,0 +1,1179 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +CONFIG_ARCH_CHIP_STM32F207IG=y +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +CONFIG_STM32_STM32F20XX=y +# CONFIG_STM32_STM32F205 is not set +CONFIG_STM32_STM32F207=y +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=10926 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3220G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3220g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nettest_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_NETTEST=y +# CONFIG_EXAMPLES_NETTEST_SERVER is not set +CONFIG_EXAMPLES_NETTEST_PERFORMANCE=y +CONFIG_EXAMPLES_NETTEST_IPv4=y +CONFIG_EXAMPLES_NETTEST_INIT=y +CONFIG_EXAMPLES_NETTEST_NOMAC=y + +# +# IPv4 addresses +# +CONFIG_EXAMPLES_NETTEST_IPADDR=0x0a000002 +CONFIG_EXAMPLES_NETTEST_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_NETTEST_NETMASK=0xffffff00 +CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3220g-eval/nettest/setenv.sh b/configs/stm3220g-eval/nettest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..a870dec990c2a834d2e3063e9edd13c0a8f26e92 --- /dev/null +++ b/configs/stm3220g-eval/nettest/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/stm3220g-eval/nettest/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3220g-eval/nsh/Make.defs b/configs/stm3220g-eval/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..a55be90f7bc6f336013469001f9ec6be55582d27 --- /dev/null +++ b/configs/stm3220g-eval/nsh/Make.defs @@ -0,0 +1,124 @@ +############################################################################ +# configs/stm3220g-eval/nsh/Make.defs +# +# Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/stm3220g-eval/nsh/defconfig b/configs/stm3220g-eval/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..8dcfe1f1b7b08404fc1e6a1bea4a87c09f26a657 --- /dev/null +++ b/configs/stm3220g-eval/nsh/defconfig @@ -0,0 +1,1406 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +CONFIG_ARCH_CHIP_STM32F207IG=y +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +CONFIG_STM32_STM32F20XX=y +# CONFIG_STM32_STM32F205 is not set +CONFIG_STM32_STM32F207=y +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# I2C Configuration +# +# CONFIG_STM32_I2C_ALT is not set +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_MAGIC_REG=0 +CONFIG_RTC_MAGIC=0xfacefeee +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=10926 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3220G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3220g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_POLLED=y +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +# CONFIG_NETDB_DNSSERVER_NOADDR is not set +CONFIG_NETDB_DNSSERVER_IPv4=y +CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001 + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3220g-eval/nsh/setenv.sh b/configs/stm3220g-eval/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..489322177a8c787ac0ff4ec5e63a0908161272dc --- /dev/null +++ b/configs/stm3220g-eval/nsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/stm3220g-eval/nsh/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3220g-eval/nsh2/Make.defs b/configs/stm3220g-eval/nsh2/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..1872665fcf4cdcd5ab28f48c5f95024d2cd5bf34 --- /dev/null +++ b/configs/stm3220g-eval/nsh2/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3220g-eval/nsh2/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3220g-eval/nsh2/defconfig b/configs/stm3220g-eval/nsh2/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..f3c606bc6c16c28b14c29997b66cdac8398af3e1 --- /dev/null +++ b/configs/stm3220g-eval/nsh2/defconfig @@ -0,0 +1,1439 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +CONFIG_ARCH_CHIP_STM32F207IG=y +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +CONFIG_STM32_STM32F20XX=y +# CONFIG_STM32_STM32F205 is not set +CONFIG_STM32_STM32F207=y +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +CONFIG_STM32_SDIO=y +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set + +# +# I2C Configuration +# +# CONFIG_STM32_I2C_ALT is not set +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set + +# +# SDIO Configuration +# +CONFIG_SDIO_DMAPRIO=0x00010000 +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_MAGIC_REG=0 +CONFIG_RTC_MAGIC=0xfacefeee +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=10926 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3220G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3220g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_POLLED=y +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_ARCH_HAVE_SDIO=y +CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y +CONFIG_MMCSD_SDIO=y +CONFIG_SDIO_PREFLIGHT=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_SDIO_BLOCKSETUP is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +CONFIG_RAMLOG=y +CONFIG_RAMLOG_SYSLOG=y +CONFIG_RAMLOG_BUFSIZE=1024 +# CONFIG_RAMLOG_CRLF is not set +CONFIG_RAMLOG_NONBLOCKING=y +CONFIG_RAMLOG_NPOLLWAITERS=4 + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_CHAR is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +# CONFIG_NSH_CONSOLE is not set +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=1 +CONFIG_I2CTOOL_MAXBUS=3 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=100000 +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3220g-eval/nsh2/setenv.sh b/configs/stm3220g-eval/nsh2/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..1e2f87b403ffb2e735fd6e4318c46c36194e1e23 --- /dev/null +++ b/configs/stm3220g-eval/nsh2/setenv.sh @@ -0,0 +1,74 @@ +#!/bin/bash +# configs/stm3220g-eval/nsh2/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3220g-eval/nxwm/Make.defs b/configs/stm3220g-eval/nxwm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..0a94be44478a4bcb3c0ee3b4d14954400d53d653 --- /dev/null +++ b/configs/stm3220g-eval/nxwm/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3220g-eval/nxwm/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3220g-eval/nxwm/defconfig b/configs/stm3220g-eval/nxwm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..90a124b33c90019e194a3e24afbd8f06e3196a05 --- /dev/null +++ b/configs/stm3220g-eval/nxwm/defconfig @@ -0,0 +1,1736 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +CONFIG_ARCH_CHIP_STM32F207IG=y +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +CONFIG_STM32_STM32F20XX=y +# CONFIG_STM32_STM32F205 is not set +CONFIG_STM32_STM32F207=y +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +CONFIG_STM32_FSMC=y +# CONFIG_STM32_HASH is not set +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# I2C Configuration +# +# CONFIG_STM32_I2C_ALT is not set +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_MAGIC_REG=0 +CONFIG_RTC_MAGIC=0xfacefeee +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=10926 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3220G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3220g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +# CONFIG_STM32_ILI9320_DISABLE is not set +# CONFIG_STM32_ILI9325_DISABLE is not set +CONFIG_STM3220G_LCD=y +CONFIG_LCD_RDSHIFT=5 +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxwm_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=12 +CONFIG_NFILE_STREAMS=12 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=48 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_POLLED=y +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +# CONFIG_INPUT_MXT is not set +CONFIG_INPUT_STMPE811=y +# CONFIG_STMPE811_SPI is not set +CONFIG_STMPE811_I2C=y +CONFIG_STMPE811_ACTIVELOW=y +CONFIG_STMPE811_EDGE=y +CONFIG_STMPE811_MULTIPLE=y +# CONFIG_STMPE811_TSC_DISABLE is not set +# CONFIG_STMPE811_SWAPXY is not set +CONFIG_STMPE811_THRESHX=39 +CONFIG_STMPE811_THRESHY=51 +CONFIG_STMPE811_ADC_DISABLE=y +CONFIG_STMPE811_GPIO_DISABLE=y +CONFIG_STMPE811_TEMP_DISABLE=y +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +CONFIG_LCD_NOGETRUN=y +CONFIG_LCD_MAXCONTRAST=1 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +CONFIG_NX_WRITEONLY=y + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +# CONFIG_NX_XYINPUT_MOUSE is not set +CONFIG_NX_XYINPUT_TOUCHSCREEN=y +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0x5cb7 +CONFIG_NXTK_BORDERCOLOR2=0x21c9 +CONFIG_NXTK_BORDERCOLOR3=0xffdf +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +CONFIG_NXFONT_SANS22X29B=y +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +CONFIG_NXTERM=y + +# +# NxTerm Output Text/Graphics Options +# +CONFIG_NXTERM_BPP=16 +CONFIG_NXTERM_CURSORCHAR=137 +CONFIG_NXTERM_MXCHARS=325 +CONFIG_NXTERM_CACHESIZE=32 +CONFIG_NXTERM_LINESEPARATION=0 +# CONFIG_NXTERM_NOWRAP is not set + +# +# NxTerm Input options +# +CONFIG_NXTERM_NXKBDIN=y +CONFIG_NXTERM_KBDBUFSIZE=16 +CONFIG_NXTERM_NPOLLWAITERS=4 + +# +# NX Multi-user only options +# +CONFIG_NX_MULTIUSER=y +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXSERVERMSGS=32 +CONFIG_NX_MXCLIENTMSGS=16 +# CONFIG_NX_NXSTART is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +# CONFIG_NETDB_DNSCLIENT is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# +CONFIG_NXWIDGETS=y + +# +# NX Server/Device Configuration +# +CONFIG_NXWIDGETS_FLICKERFREE=y +CONFIG_NXWIDGETS_DEVNO=0 +CONFIG_NXWIDGET_SERVERINIT=y +CONFIG_NXWIDGETS_SERVERPRIO=110 +CONFIG_NXWIDGETS_SERVERSTACK=2048 +CONFIG_NXWIDGETS_CLIENTPRIO=100 +CONFIG_NXWIDGETS_LISTENERPRIO=100 +CONFIG_NXWIDGETS_LISTENERSTACK=2048 +# CONFIG_NXWIDGET_EVENTWAIT is not set + +# +# NXWidget Configuration +# +CONFIG_NXWIDGETS_BPP=16 +CONFIG_NXWIDGETS_SIZEOFCHAR=1 + +# +# NXWidget Default Values +# +# CONFIG_NXWIDGETS_SYSTEM_CUSTOM_FONTID is not set +CONFIG_NXWIDGETS_TNXARRAY_INITIALSIZE=16 +CONFIG_NXWIDGETS_TNXARRAY_SIZEINCREMENT=8 +CONFIG_NXWIDGETS_CUSTOM_FILLCOLORS=y +CONFIG_NXWIDGETS_DEFAULT_BACKGROUNDCOLOR=0x9dfb +CONFIG_NXWIDGETS_DEFAULT_SELECTEDBACKGROUNDCOLOR=0xd73e +CONFIG_NXWIDGETS_DEFAULT_HIGHLIGHTCOLOR=0xc618 +CONFIG_NXWIDGETS_CUSTOM_EDGECOLORS=y +CONFIG_NXWIDGETS_DEFAULT_SHINEEDGECOLOR=0xffdf +CONFIG_NXWIDGETS_DEFAULT_SHADOWEDGECOLOR=0x21e9 +# CONFIG_NXWIDGETS_CUSTOM_TEXTCOLORS is not set +CONFIG_NXWIDGETS_TRANSPARENT_COLOR=0x0 + +# +# Keypad behavior +# +CONFIG_NXWIDGETS_FIRST_REPEAT_TIME=500 +CONFIG_NXWIDGETS_CONTINUE_REPEAT_TIME=200 +CONFIG_NXWIDGETS_DOUBLECLICK_TIME=350 +CONFIG_NXWIDGETS_KBDBUFFER_SIZE=16 +CONFIG_NXWIDGETS_CURSORCONTROL_SIZE=4 +# CONFIG_NXWIDGET_MEMMONITOR is not set +CONFIG_NXWM=y + +# +# NxWM General Settings +# +# CONFIG_NXWM_LARGE_ICONS is not set +# CONFIG_NXWM_CUSTOM_FONTID is not set +CONFIG_NXWM_UNITTEST=y + +# +# Color configuration +# +# CONFIG_NXWM_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWM_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWM_CUSTOM_TEXTCOLORS is not set + +# +# Background Image +# +# CONFIG_NXWM_DISABLE_BACKGROUND_IMAGE is not set +CONFIG_NXWM_BACKGROUND_IMAGE="" + +# +# NxWM Taskbar Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_TASKBAR_VSPACING=4 +CONFIG_NXWM_TASKBAR_HSPACING=2 +# CONFIG_NXWM_TASKBAR_TOP is not set +# CONFIG_NXWM_TASKBAR_BOTTOM is not set +CONFIG_NXWM_TASKBAR_LEFT=y +# CONFIG_NXWM_TASKBAR_RIGHT is not set +# CONFIG_NXWM_CUSTOM_TASKBAR_WIDTH is not set +# CONFIG_NXWM_TASKBAR_ICONSCALE is not set +# CONFIG_NXWM_DISABLE_MINIMIZE is not set +# CONFIG_NXWM_TASKBAR_NO_BORDER is not set + +# +# NxWM Toolbar Configuration +# +# CONFIG_NXWM_CUSTOM_TOOLBAR_HEIGHT is not set +# CONFIG_NXWM_TOOLBAR_CUSTOM_FONTID is not set + +# +# NxWM Application Window Configuration +# +# CONFIG_NXWM_CUSTOM_APPWINDOW_ICONS is not set + +# +# NxWM Start Window Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_STARTWINDOW_VSPACING=4 +CONFIG_NXWM_STARTWINDOW_HSPACING=4 +# CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set +CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm" +CONFIG_NXWM_STARTWINDOW_MXMSGS=32 +CONFIG_NXWM_STARTWINDOW_MXMPRIO=42 +CONFIG_NXWM_STARTWINDOW_PRIO=100 +CONFIG_NXWM_STARTWINDOW_STACKSIZE=2048 + +# +# NxTerm Window Settings +# +CONFIG_NXWM_NXTERM=y +CONFIG_NXWM_NXTERM_PRIO=100 +CONFIG_NXWM_NXTERM_STACKSIZE=2048 +# CONFIG_NXWM_NXTERM_CUSTOM_COLORS is not set +# CONFIG_NXWM_NXTERM_CUSTOM_FONTID is not set +# CONFIG_NXWM_CUSTOM_NXTERM_ICON is not set + +# +# NxWM Touchscreen Configuration +# +CONFIG_NXWM_TOUCHSCREEN=y + +# +# Touchscreen Device Settings +# +CONFIG_NXWM_TOUCHSCREEN_DEVINIT=y +CONFIG_NXWM_TOUCHSCREEN_DEVNO=0 +CONFIG_NXWM_TOUCHSCREEN_DEVPATH="/dev/input0" +CONFIG_NXWM_TOUCHSCREEN_SIGNO=5 +CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=100 +CONFIG_NXWM_TOUCHSCREEN_LISTENERSTACK=1024 + +# +# NxWM Keyboard Configuration +# +CONFIG_NXWM_KEYBOARD=y + +# +# Keyboard Device Settings +# +CONFIG_NXWM_KEYBOARD_DEVPATH="/dev/console" +# CONFIG_NXWM_KEYBOARD_USBHOST is not set +CONFIG_NXWM_KEYBOARD_SIGNO=6 +CONFIG_NXWM_KEYBOARD_BUFSIZE=16 +CONFIG_NXWM_KEYBOARD_LISTENERPRIO=100 +CONFIG_NXWM_KEYBOARD_LISTENERSTACK=2048 + +# +# NxWM Calibration Display Settings +# +CONFIG_NXWM_CALIBRATION_MARGIN=40 +# CONFIG_NXWM_CALIBRATION_CUSTOM_COLORS is not set +# CONFIG_NXWM_CALIBRATION_MESSAGES is not set +# CONFIG_NXWM_CALIBRATION_ANISOTROPIC is not set +# CONFIG_NXWM_CUSTOM_CALIBRATION_ICON is not set +CONFIG_NXWM_CALIBRATION_SIGNO=5 +CONFIG_NXWM_CALIBRATION_LISTENERPRIO=100 +CONFIG_NXWM_CALIBRATION_LISTENERSTACK=2048 + +# +# NxWM Hex Calculator Display Settings +# +# CONFIG_NXWM_HEXCALCULATOR_CUSTOM_COLORS is not set +# CONFIG_NXWM_CUSTOM_HEXCALCULATOR_ICON is not set +CONFIG_NXWM_HEXCALCULATOR_CUSTOM_FONTID=y +CONFIG_NXWM_HEXCALCULATOR_FONTID=5 + +# +# NxWM Media Player Display Settings +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3220g-eval/nxwm/setenv.sh b/configs/stm3220g-eval/nxwm/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..913968e2a517b260f0d824ff1c0f9b1f32ed6272 --- /dev/null +++ b/configs/stm3220g-eval/nxwm/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/stm3220g-eval/nxwm/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3220g-eval/scripts/ld.script b/configs/stm3220g-eval/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..1b880916667ec5d80a2bcafae206033062b4e50b --- /dev/null +++ b/configs/stm3220g-eval/scripts/ld.script @@ -0,0 +1,121 @@ +/**************************************************************************** + * configs/stm3220g-eval/scripts/ld.script + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F207IGH6U has 1024Kb of FLASH beginning at address 0x0800:0000 and + * 128Kb of SRAM. SRAM is split up into two blocks: + * + * 1) 112Kb of SRAM beginning at address 0x2000:0000 + * 2) 16Kb of SRAM beginning at address 0x2001:c000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm3220g-eval/src/.gitignore b/configs/stm3220g-eval/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/stm3220g-eval/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/stm3220g-eval/src/Makefile b/configs/stm3220g-eval/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..fe48b22317fa9b7263561ada8cce085ec7270636 --- /dev/null +++ b/configs/stm3220g-eval/src/Makefile @@ -0,0 +1,83 @@ +############################################################################ +# configs/stm3220g-eval/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_STM32_OTGFS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_STM32_FSMC),y) +CSRCS += stm32_lcd.c stm32_selectlcd.c stm32_deselectlcd.c stm32_selectsram.c stm32_deselectsram.c stm32_extmem.c +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += stm32_adc.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += stm32_pwm.c +endif + +ifeq ($(CONFIG_CAN),y) +CSRCS += stm32_can.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += stm32_watchdog.c +endif + +ifeq ($(CONFIG_INPUT_STMPE811),y) +CSRCS += stm32_stmpe811.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm3220g-eval/src/stm3220g-eval.h b/configs/stm3220g-eval/src/stm3220g-eval.h new file mode 100644 index 0000000000000000000000000000000000000000..d00b0e8eaeae444b0599b946e12090d0c1af0f28 --- /dev/null +++ b/configs/stm3220g-eval/src/stm3220g-eval.h @@ -0,0 +1,380 @@ +/**************************************************************************************************** + * configs/stm3220g_eval/src/stm3220g.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __CONFIGS_STM3220G_EVAL_SRC_STM3220G_H +#define __CONFIGS_STM3220G_EVAL_SRC_STM3220G_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include +#include + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ +/* Configuration ************************************************************************************/ +/* How many SPI modules does this chip support? */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 3 +# undef CONFIG_STM32_SPI3 +#endif + +/* You can use either CAN1 or CAN2, but you can't use both because they share the same transceiver */ + +#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2) +# warning "The STM3250G-EVAL will only support one of CAN1 and CAN2" +#endif + +/* You can't use CAN1 with FSMC: + * + * PD0 = FSMC_D2 & CAN1_RX + * PD1 = FSMC_D3 & CAN1_TX + */ + +#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_FSMC) +# warning "The STM3250G-EVAL will only support one of CAN1 and FSMC" +#endif + +/* The USB OTG HS ULPI bus is shared with CAN2 bus: + * + * PB13 = ULPI_D6 & CAN2_TX + * PB5 = ULPI_D7 & CAN2_RX + */ + +#if defined(CONFIG_STM32_CAN2) && defined(CONFIG_STM32_OTGHS) +# warning "The STM3250G-EVAL will only support one of CAN2 and USB OTG HS" +#endif + +/* Do we need to register I2C drivers on behalf of the I2C tool? */ + +#define HAVE_I2CTOOL 1 +#if !defined(CONFIG_SYSTEM_I2CTOOL) || !defined(CONFIG_I2C_DRIVER) +# undef HAVE_I2CTOOL +#endif + +/* STM3220G-EVAL GPIOs ******************************************************************************/ +/* LEDs */ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTG|GPIO_PIN6) +#define GPIO_LED2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTG|GPIO_PIN8) +#define GPIO_LED3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTI|GPIO_PIN9) +#define GPIO_LED4 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN7) + +/* BUTTONS -- NOTE that all have EXTI interrupts configured */ + +#define MIN_IRQBUTTON BUTTON_WAKEUP +#define MAX_IRQBUTTON BUTTON_USER +#define NUM_IRQBUTTONS (BUTTON_USER - BUTTON_WAKEUP + 1) + +#define GPIO_BTN_WAKEUP (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0) +#define GPIO_BTN_TAMPER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN13) +#define GPIO_BTN_USER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTG|GPIO_PIN15) + +/* PWM + * + * The STM3220G-Eval has no real on-board PWM devices, but the board can be + * configured to output a pulse train using TIM4, TIM1, or TIM8 (see board.h). + * Let's figure out which the user has configured. + */ + +#ifdef CONFIG_PWM +# if defined(CONFIG_STM32_TIM1_PWM) +# define STM3220G_EVAL_PWMTIMER 1 +# elif defined(CONFIG_STM32_TIM4_PWM) +# define STM3220G_EVAL_PWMTIMER 4 +# elif defined(CONFIG_STM32_TIM8_PWM) +# define STM3220G_EVAL_PWMTIMER 8 +# endif +#endif + +/* USB OTG FS + * + * PA9 VBUS_FS + * PH5 OTG_FS_PowerSwitchOn + * PF11 OTG_FS_Overcurrent + */ + +#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9) +#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_OUTPUT_SET|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN5) + +#ifdef CONFIG_USBHOST +# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN11) +#else +# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN11) +#endif + +/* The STM3220G-EVAL has two STMPE811QTR I/O expanders on board both connected + * to the STM32 via I2C1. They share a common interrupt line: PI2. + * + * STMPE811 U24, I2C address 0x41 (7-bit) + * ------ ---- ---------------- -------------------------------------------- + * STPE11 PIN BOARD SIGNAL BOARD CONNECTION + * ------ ---- ---------------- -------------------------------------------- + * Y- TouchScreen_Y- LCD Connector XL + * X- TouchScreen_X- LCD Connector XR + * Y+ TouchScreen_Y+ LCD Connector XD + * X+ TouchScreen_X+ LCD Connector XU + * IN3 EXP_IO9 + * IN2 EXP_IO10 + * IN1 EXP_IO11 + * IN0 EXP_IO12 + * + * STMPE811 U29, I2C address 0x44 (7-bit) + * ------ ---- ---------------- -------------------------------------------- + * STPE11 PIN BOARD SIGNAL BOARD CONNECTION + * ------ ---- ---------------- -------------------------------------------- + * Y- EXP_IO1 + * X- EXP_IO2 + * Y+ EXP_IO3 + * X+ EXP_IO4 + * IN3 EXP_IO5 + * IN2 EXP_IO6 + * IN1 EXP_IO7 + * IN0 EXP_IO8 + */ + +#define STMPE811_ADDR1 0x41 +#define STMPE811_ADDR2 0x44 + +#define GPIO_IO_EXPANDER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTI|GPIO_PIN2) + +/* GPIO settings that will be altered when external memory is selected: + * + * ----- ------- -------- ------------ ------- ------------ -------- ----------- -------- ------------- + * PB7: FSMC NL PD0-1: FSMC D2-D3 PE0: FSMC NBL0 PF0-5: FSMC A0-A5 PG0-5: FSMC A10-A15 + * PD3: FSMC CLK PE1: FSMC BLN1 PF6: FSMC NIORD PG6-7: FSMC INT2-3 + * PD4: FSMC NOE PE2: FSMC A23 PF7: FSMC NREG PG9: FSMC NCE3 + * PD5: FSMC NWE PE3-6: FSMC A19-A22 PF8: FSMC NIOWR PG9-10: FSMC NE2-3 + * PD6: FSMC NWAIT PE7-15: FSMC D4-D12 PF9: FSMC CD PG10: FSMC NCE4 (1) + * PD7: FSMC NE1 PF10: FSMC INTR PG11: FSMC NCE4 (2) + * PD7: FSMC NCE2 PF12-15: FSMC A6-A9 PG12: FSMC NE4 + * PD8-10: FSMC D13-D15 PG13-14: FSMC A24-A25 + * PD11-13: FSMC_A16-A18 + * PD14-15: FSMC D0-D1 + */ + +/**************************************************************************************************** + * Public Types + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +/**************************************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the STM3220G-EVAL board. + * + ****************************************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +/**************************************************************************************************** + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related GPIO pins for + * the STM3220G-EVAL board. + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_OTGFS +void weak_function stm32_usbinitialize(void); +#endif + +/**************************************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. This function will + * start a thread that will monitor for device connection/disconnection events. + * + ****************************************************************************************************/ + +#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST) +int stm32_usbhost_initialize(void); +#endif + +/**************************************************************************************************** + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for external memory usage + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_extmemgpios(const uint32_t *gpios, int ngpios); +#endif + +/**************************************************************************************************** + * Name: stm32_extmemaddr + * + * Description: + * Initialize adress line GPIOs for external memory access + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_extmemaddr(int naddrs); +#endif + +/**************************************************************************************************** + * Name: stm32_extmemdata + * + * Description: + * Initialize data line GPIOs for external memory access + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_extmemdata(int ndata); +#endif + +/************************************************************************************ + * Name: stm32_enablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_enablefsmc(void); +#endif + +/************************************************************************************ + * Name: stm32_disablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_disablefsmc(void); +#endif + +/************************************************************************************ + * Name: stm32_selectsram + * + * Description: + * Initialize to access external SRAM. SRAM will be visible at the FSMC Bank + * NOR/SRAM2 base address (0x64000000) + * + * General transaction rules. The requested AHB transaction data size can be 8-, + * 16- or 32-bit wide whereas the SRAM has a fixed 16-bit data width. Some simple + * transaction rules must be followed: + * + * Case 1: AHB transaction width and SRAM data width are equal + * There is no issue in this case. + * Case 2: AHB transaction size is greater than the memory size + * In this case, the FSMC splits the AHB transaction into smaller consecutive + * memory accesses in order to meet the external data width. + * Case 3: AHB transaction size is smaller than the memory size. + * SRAM supports the byte select feature. + * a) FSMC allows write transactions accessing the right data through its + * byte lanes (NBL[1:0]) + * b) Read transactions are allowed (the controller reads the entire memory + * word and uses the needed byte only). The NBL[1:0] are always kept low + * during read transactions. + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_selectsram(void); +#endif + +/************************************************************************************ + * Name: stm32_deselectsram + * + * Description: + * Disable SRAM + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_deselectsram(void); +#endif + +/************************************************************************************ + * Name: stm32_selectlcd + * + * Description: + * Initialize to the LCD + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_selectlcd(void); +#endif + +/************************************************************************************ + * Name: stm32_deselectlcd + * + * Description: + * Disable the LCD + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_deselectlcd(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_STM3220G_EVAL_SRC_STM3220G_H */ + diff --git a/configs/stm3220g-eval/src/stm32_adc.c b/configs/stm3220g-eval/src/stm32_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..f79ca23c535f6046635765c0b7b65401b19f6f57 --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_adc.c @@ -0,0 +1,168 @@ +/************************************************************************************ + * configs/stm3220g-eval/src/stm32_adc.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32_pwm.h" +#include "stm3220g-eval.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Configuration ************************************************************/ +/* Up to 3 ADC interfaces are supported */ + +#if STM32_NADC < 3 +# undef CONFIG_STM32_ADC3 +#endif + +#if STM32_NADC < 2 +# undef CONFIG_STM32_ADC2 +#endif + +#if STM32_NADC < 1 +# undef CONFIG_STM32_ADC1 +#endif + +#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3) +#ifndef CONFIG_STM32_ADC3 +# warning "Channel information only available for ADC3" +#endif + +/* The number of ADC channels in the conversion list */ + +#define ADC3_NCHANNELS 1 + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* The STM3220G-EVAL has a 10 Kohm potentiometer RV1 connected to PF9 of + * STM32F207IGH6 on the board: TIM14_CH1/FSMC_CD/ADC3_IN7 + */ + +/* Identifying number of each ADC channel: Variable Resistor. */ + +#ifdef CONFIG_STM32_ADC3 +static const uint8_t g_chanlist[ADC3_NCHANNELS] = {7}; + +/* Configurations of pins used byte each ADC channels */ + +static const uint32_t g_pinlist[ADC3_NCHANNELS] = {GPIO_ADC3_IN7}; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ +#ifdef CONFIG_STM32_ADC3 + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + int i; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Configure the pins as analog inputs for the selected channels */ + + for (i = 0; i < ADC3_NCHANNELS; i++) + { + stm32_configgpio(g_pinlist[i]); + } + + /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + + adc = stm32_adcinitialize(3, g_chanlist, ADC3_NCHANNELS); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +#else + return -ENOSYS; +#endif +} + +#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */ +#endif /* CONFIG_ADC */ diff --git a/configs/stm3220g-eval/src/stm32_appinit.c b/configs/stm3220g-eval/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..54311e8fe82eb47aa0daae1155ecebff2315a6f6 --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_appinit.c @@ -0,0 +1,281 @@ +/**************************************************************************** + * config/stm3220g_eval/src/stm32_appinit.c + * + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#ifdef CONFIG_STM32_SPI1 +# include +# include +#endif + +#ifdef CONFIG_STM32_SDIO +# include +# include +#endif + +#ifdef CONFIG_STM32_OTGFS +# include "stm32_usbhost.h" +#endif + +#include "stm32.h" +#include "stm32_i2c.h" +#include "stm3220g-eval.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* For now, don't build in any SPI1 support -- NSH is not using it */ + +#undef CONFIG_STM32_SPI1 + +/* MMCSD PORT and SLOT number probably depend on the board configuration */ + +#define HAVE_USBDEV 1 +#define HAVE_MMCSD 1 +#define HAVE_USBHOST 1 + +#if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0 +# error "Only one MMC/SD slot" +# undef CONFIG_NSH_MMCSDSLOTNO +#endif + +#ifndef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +#endif + +/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support + * is not enabled. + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SDIO) +# undef HAVE_MMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/* Can't support USB host or device features if USB OTG FS is not enabled */ + +#ifndef CONFIG_STM32_OTGFS +# undef HAVE_USBDEV +# undef HAVE_USBHOST +#endif + +/* Can't support USB device is USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +#endif + +/* Can't support USB host is USB host is not enabled */ + +#ifndef CONFIG_USBHOST +# undef HAVE_USBHOST +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_i2c_register + * + * Description: + * Register one I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void stm32_i2c_register(int bus) +{ + FAR struct i2c_master_s *i2c; + int ret; + + i2c = stm32_i2cbus_initialize(bus); + if (i2c == NULL) + { + dbg("ERROR: Failed to get I2C%d interface\n", bus); + } + else + { + ret = i2c_register(i2c, bus); + if (ret < 0) + { + dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); + stm32_i2cbus_uninitialize(i2c); + } + } +} +#endif + +/**************************************************************************** + * Name: stm32_i2ctool + * + * Description: + * Register I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void stm32_i2ctool(void) +{ +#ifdef CONFIG_STM32_I2C1 + stm32_i2c_register(1); +#endif +#ifdef CONFIG_STM32_I2C2 + stm32_i2c_register(2); +#endif +#ifdef CONFIG_STM32_I2C3 + stm32_i2c_register(3); +#endif +} +#else +# define stm32_i2ctool() +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef CONFIG_STM32_SPI1 + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; +#endif +#ifdef HAVE_MMCSD + FAR struct sdio_dev_s *sdio; +#endif +#if defined(HAVE_MMCSD) || defined (HAVE_USBHOST) + int ret; +#endif + + /* Register I2C drivers on behalf of the I2C tool */ + + stm32_i2ctool(); + + /* Configure SPI-based devices */ + +#ifdef CONFIG_STM32_SPI1 + /* Get the SPI port */ + + spi = stm32_spibus_initialize(1); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port 0\n"); + return -ENODEV; + } + + /* Now bind the SPI interface to the M25P64/128 SPI FLASH driver */ + + mtd = m25p_initialize(spi); + if (!mtd) + { + syslog(LOG_ERR, "ERROR: Failed to bind SPI port 0 to the SPI FLASH driver\n"); + return -ENODEV; + } + +#warning "Now what are we going to do with this SPI FLASH driver?" +#endif + + /* Mount the SDIO-based MMC/SD block driver */ + +#ifdef HAVE_MMCSD + /* First, get an instance of the SDIO interface */ + + sdio = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!sdio) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdio); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + /* Then let's guess and say that there is a card in the slot. I need to check to + * see if the STM3220G-EVAL board supports a GPIO to detect if there is a card in + * the slot. + */ + + sdio_mediachange(sdio, true); +#endif + + /* Initialize USB host operation. stm32_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + +#ifdef HAVE_USBHOST + ret = stm32_usbhost_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret); + return ret; + } +#endif + + return OK; +} diff --git a/configs/stm3220g-eval/src/stm32_autoleds.c b/configs/stm3220g-eval/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..e2d5a67aa1a09634f7762a1e29f0dae1e81f50dd --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_autoleds.c @@ -0,0 +1,258 @@ +/**************************************************************************** + * configs/stm3220g_eval/src/stm32_autoleds.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "stm3220g-eval.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* The following definitions map the encoded LED setting to GPIO settings */ + +#define STM3210E_LED1 (1 << 0) +#define STM3210E_LED2 (1 << 1) +#define STM3210E_LED3 (1 << 2) +#define STM3210E_LED4 (1 << 3) + +#define ON_SETBITS_SHIFT (0) +#define ON_CLRBITS_SHIFT (4) +#define OFF_SETBITS_SHIFT (8) +#define OFF_CLRBITS_SHIFT (12) + +#define ON_BITS(v) ((v) & 0xff) +#define OFF_BITS(v) (((v) >> 8) & 0x0ff) +#define SETBITS(b) ((b) & 0x0f) +#define CLRBITS(b) (((b) >> 4) & 0x0f) + +#define ON_SETBITS(v) (SETBITS(ON_BITS(v)) +#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v)) +#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v)) +#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v)) + +#define LED_STARTED_ON_SETBITS ((STM3210E_LED1) << ON_SETBITS_SHIFT) +#define LED_STARTED_ON_CLRBITS ((STM3210E_LED2|STM3210E_LED3|STM3210E_LED4) << ON_CLRBITS_SHIFT) +#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT) +#define LED_STARTED_OFF_CLRBITS ((STM3210E_LED1|STM3210E_LED2|STM3210E_LED3|STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_HEAPALLOCATE_ON_SETBITS ((STM3210E_LED2) << ON_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_ON_CLRBITS ((STM3210E_LED1|STM3210E_LED3|STM3210E_LED4) << ON_CLRBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_SETBITS ((STM3210E_LED1) << OFF_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_CLRBITS ((STM3210E_LED2|STM3210E_LED3|STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_IRQSENABLED_ON_SETBITS ((STM3210E_LED1|STM3210E_LED2) << ON_SETBITS_SHIFT) +#define LED_IRQSENABLED_ON_CLRBITS ((STM3210E_LED3|STM3210E_LED4) << ON_CLRBITS_SHIFT) +#define LED_IRQSENABLED_OFF_SETBITS ((STM3210E_LED2) << OFF_SETBITS_SHIFT) +#define LED_IRQSENABLED_OFF_CLRBITS ((STM3210E_LED1|STM3210E_LED3|STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_STACKCREATED_ON_SETBITS ((STM3210E_LED3) << ON_SETBITS_SHIFT) +#define LED_STACKCREATED_ON_CLRBITS ((STM3210E_LED1|STM3210E_LED2|STM3210E_LED4) << ON_CLRBITS_SHIFT) +#define LED_STACKCREATED_OFF_SETBITS ((STM3210E_LED1|STM3210E_LED2) << OFF_SETBITS_SHIFT) +#define LED_STACKCREATED_OFF_CLRBITS ((STM3210E_LED3|STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_INIRQ_ON_SETBITS ((STM3210E_LED1) << ON_SETBITS_SHIFT) +#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_INIRQ_OFF_CLRBITS ((STM3210E_LED1) << OFF_CLRBITS_SHIFT) + +#define LED_SIGNAL_ON_SETBITS ((STM3210E_LED2) << ON_SETBITS_SHIFT) +#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_SIGNAL_OFF_CLRBITS ((STM3210E_LED2) << OFF_CLRBITS_SHIFT) + +#define LED_ASSERTION_ON_SETBITS ((STM3210E_LED4) << ON_SETBITS_SHIFT) +#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_ASSERTION_OFF_CLRBITS ((STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_PANIC_ON_SETBITS ((STM3210E_LED4) << ON_SETBITS_SHIFT) +#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_PANIC_OFF_CLRBITS ((STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint16_t g_ledbits[8] = +{ + (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | + LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS), + + (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS | + LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS), + + (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS | + LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS), + + (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS | + LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS), + + (LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS | + LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS), + + (LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS | + LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS), + + (LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS | + LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS), + + (LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS | + LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS) +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static inline void led_clrbits(unsigned int clrbits) +{ + if ((clrbits & STM3210E_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, false); + } + + if ((clrbits & STM3210E_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, false); + } + + if ((clrbits & STM3210E_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, false); + } + + if ((clrbits & STM3210E_LED4) != 0) + { + stm32_gpiowrite(GPIO_LED4, false); + } +} + +static inline void led_setbits(unsigned int setbits) +{ + if ((setbits & STM3210E_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, true); + } + + if ((setbits & STM3210E_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, true); + } + + if ((setbits & STM3210E_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, true); + } + + if ((setbits & STM3210E_LED4) != 0) + { + stm32_gpiowrite(GPIO_LED4, true); + } +} + +static void led_setonoff(unsigned int bits) +{ + led_clrbits(CLRBITS(bits)); + led_setbits(SETBITS(bits)); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_setonoff(ON_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_setonoff(OFF_BITS(g_ledbits[led])); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/stm3220g-eval/src/stm32_boot.c b/configs/stm3220g-eval/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..841f2778aa1bb423e5c4d4652b7790f26aa71d9a --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_boot.c @@ -0,0 +1,108 @@ +/************************************************************************************ + * configs/stm3220g-eval/src/stm32_boot.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "stm3220g-eval.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + + /* If the FSMC is enabled, then enable SRAM access */ + +#ifdef CONFIG_STM32_FSMC + stm32_selectsram(); +#endif + + /* Initialize USB if the 1) OTG FS controller is in the configuration and 2) + * the weak function stm32_usbinitialize() has been brought into the build. + * Presumeably either CONFIG_USBDEV or CONFIG_USBHOST is also selected. + */ + +#ifdef CONFIG_STM32_OTGFS + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/stm3220g-eval/src/stm32_buttons.c b/configs/stm3220g-eval/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..85db973fa5595bae04cdc6ca34dc78f745e0fd7c --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_buttons.c @@ -0,0 +1,173 @@ +/**************************************************************************** + * configs/stm3220g-eval/src/stm32_buttons.c + * + * Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "stm3220g-eval.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* Pin configuration for each STM3210E-EVAL button. This array is indexed by + * the BUTTON_* and JOYSTICK_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_WAKEUP, GPIO_BTN_TAMPER, GPIO_BTN_USER +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed for most keys. The exception + * is the WAKEUP button. + */ + + bool released = stm32_gpioread(g_buttons[i]); + if (i == BUTTON_WAKEUP) + { + released = !released; + } + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/stm3220g-eval/src/stm32_can.c b/configs/stm3220g-eval/src/stm32_can.c new file mode 100644 index 0000000000000000000000000000000000000000..1c9b4fda7712d4b5f7b2fbf2daa3a48abba7d5cd --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_can.c @@ -0,0 +1,141 @@ +/************************************************************************************ + * configs/stm3220g-eval/src/stm32_can.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32.h" +#include "stm32_can.h" +#include "stm3220g-eval.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2) +# warning "Both CAN1 and CAN2 are enabled. Assuming only CAN1." +# undef CONFIG_STM32_CAN2 +#endif + +#ifdef CONFIG_STM32_CAN1 +# define CAN_PORT 1 +#else +# define CAN_PORT 2 +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = stm32_caninitialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && (CONFIG_STM32_CAN1 || CONFIG_STM32_CAN2) */ diff --git a/configs/stm3220g-eval/src/stm32_deselectlcd.c b/configs/stm3220g-eval/src/stm32_deselectlcd.c new file mode 100644 index 0000000000000000000000000000000000000000..56d86cf242b3a23280d3f5e0198464c2cf8b44e8 --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_deselectlcd.c @@ -0,0 +1,97 @@ +/************************************************************************************ + * configs/stm3220g-eval/src/stm32_deselectlcd.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include "up_arch.h" +#include "stm32_fsmc.h" +#include "stm3220g-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_deselectlcd + * + * Description: + * Disable the LCD + * + ************************************************************************************/ + +void stm32_deselectlcd(void) +{ + /* Restore registers to their power up settings */ + + putreg32(0xffffffff, STM32_FSMC_BCR4); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32(0x0fffffff, STM32_FSMC_BTR4); + + /* Disable AHB clocking to the FSMC */ + + stm32_disablefsmc(); +} + +#endif /* CONFIG_STM32_FSMC */ + + + diff --git a/configs/stm3220g-eval/src/stm32_deselectsram.c b/configs/stm3220g-eval/src/stm32_deselectsram.c new file mode 100644 index 0000000000000000000000000000000000000000..de5027f2c2545fb052ab3797fc29b6a6d4e25893 --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_deselectsram.c @@ -0,0 +1,96 @@ +/************************************************************************************ + * configs/stm3220g-eval/src/stm32_deselectsram.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include "up_arch.h" +#include "stm32_fsmc.h" +#include "stm3220g-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_deselectsram + * + * Description: + * Disable SRAM + * + ************************************************************************************/ + +void stm32_deselectsram(void) +{ + /* Restore registers to their power up settings */ + + putreg32(FSMC_BCR_RSTVALUE, STM32_FSMC_BCR2); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32(FSMC_BTR_RSTVALUE, STM32_FSMC_BTR2); + + /* Disable AHB clocking to the FSMC */ + + stm32_disablefsmc(); +} + +#endif /* CONFIG_STM32_FSMC */ + + + diff --git a/configs/stm3220g-eval/src/stm32_extmem.c b/configs/stm3220g-eval/src/stm32_extmem.c new file mode 100644 index 0000000000000000000000000000000000000000..f6dd8a5a19e3bcdfb80508cca8851850a257f91b --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_extmem.c @@ -0,0 +1,187 @@ +/************************************************************************************ + * configs/stm3220g-eval/src/stm32_extmem.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32_fsmc.h" +#include "stm32_gpio.h" +#include "stm32.h" +#include "stm3220g-eval.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_STM32_FSMC +# warning "FSMC is not enabled" +#endif + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +#define STM32_FSMC_NADDRCONFIGS 26 +#define STM32_FSMC_NDATACONFIGS 16 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/* GPIO configurations common to most external memories */ + +static const uint32_t g_addressconfig[STM32_FSMC_NADDRCONFIGS] = +{ + GPIO_FSMC_A0, GPIO_FSMC_A1 , GPIO_FSMC_A2, GPIO_FSMC_A3, GPIO_FSMC_A4 , GPIO_FSMC_A5, + GPIO_FSMC_A6, GPIO_FSMC_A7, GPIO_FSMC_A8, GPIO_FSMC_A9, GPIO_FSMC_A10, GPIO_FSMC_A11, + GPIO_FSMC_A12, GPIO_FSMC_A13, GPIO_FSMC_A14, GPIO_FSMC_A15, GPIO_FSMC_A16, GPIO_FSMC_A17, + GPIO_FSMC_A18, GPIO_FSMC_A19, GPIO_FSMC_A20, GPIO_FSMC_A21, GPIO_FSMC_A22, GPIO_FSMC_A23, + GPIO_FSMC_A24, GPIO_FSMC_A25 +}; + +static const uint32_t g_dataconfig[STM32_FSMC_NDATACONFIGS] = +{ + GPIO_FSMC_D0, GPIO_FSMC_D1 , GPIO_FSMC_D2, GPIO_FSMC_D3, GPIO_FSMC_D4 , GPIO_FSMC_D5, + GPIO_FSMC_D6, GPIO_FSMC_D7, GPIO_FSMC_D8, GPIO_FSMC_D9, GPIO_FSMC_D10, GPIO_FSMC_D11, + GPIO_FSMC_D12, GPIO_FSMC_D13, GPIO_FSMC_D14, GPIO_FSMC_D15 +}; + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for external memory usage + * + ************************************************************************************/ + +void stm32_extmemgpios(const uint32_t *gpios, int ngpios) +{ + int i; + + /* Configure GPIOs */ + + for (i = 0; i < ngpios; i++) + { + stm32_configgpio(gpios[i]); + } +} + +/************************************************************************************ + * Name: stm32_extmemaddr + * + * Description: + * Initialize adress line GPIOs for external memory access + * + ************************************************************************************/ + +void stm32_extmemaddr(int naddrs) +{ + stm32_extmemgpios(g_addressconfig, naddrs); +} + +/************************************************************************************ + * Name: stm32_extmemdata + * + * Description: + * Initialize data line GPIOs for external memory access + * + ************************************************************************************/ + +void stm32_extmemdata(int ndata) +{ + stm32_extmemgpios(g_dataconfig, ndata); +} + +/************************************************************************************ + * Name: stm32_enablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +void stm32_enablefsmc(void) +{ + uint32_t regval; + + /* Enable AHB clocking to the FSMC */ + + regval = getreg32( STM32_RCC_AHB3ENR); + regval |= RCC_AHB3ENR_FSMCEN; + putreg32(regval, STM32_RCC_AHB3ENR); +} + +/************************************************************************************ + * Name: stm32_disablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +void stm32_disablefsmc(void) +{ + uint32_t regval; + + /* Disable AHB clocking to the FSMC */ + + regval = getreg32(STM32_RCC_AHB3ENR); + regval &= ~RCC_AHB3ENR_FSMCEN; + putreg32(regval, STM32_RCC_AHB3ENR); +} diff --git a/configs/stm3220g-eval/src/stm32_lcd.c b/configs/stm3220g-eval/src/stm32_lcd.c new file mode 100644 index 0000000000000000000000000000000000000000..43ef81fe3eff10cb337fa979efba95e8018c6c6f --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_lcd.c @@ -0,0 +1,1210 @@ +/************************************************************************************** + * configs/stm3220g-eval/src/stm32_lcd.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************/ +/* This driver supports the following LCDs on the STM324xG_EVAL board: + * + * AM-240320L8TNQW00H (LCD_ILI9320 or LCD_ILI9321) OR + * AM-240320D5TOQW01H (LCD_ILI9325) + */ + +/************************************************************************************** + * Included Files + **************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm3220g-eval.h" + +#if !defined(CONFIG_STM32_ILI9320_DISABLE) || !defined(CONFIG_STM32_ILI9325_DISABLE) + +/************************************************************************************** + * Pre-processor Definitions + **************************************************************************************/ +/* Configuration **********************************************************************/ +/* CONFIG_STM32_ILI9320_DISABLE may be defined to disabled the AM-240320L8TNQW00H + * (LCD_ILI9320 or LCD_ILI9321) + * CONFIG_STM32_ILI9325_DISABLE may be defined to disabled the AM-240320D5TOQW01H + * (LCD_ILI9325) + */ + +/* Check contrast selection */ + +#if !defined(CONFIG_LCD_MAXCONTRAST) +# define CONFIG_LCD_MAXCONTRAST 1 +#endif + +/* Check power setting */ + +#if !defined(CONFIG_LCD_MAXPOWER) || CONFIG_LCD_MAXPOWER < 1 +# define CONFIG_LCD_MAXPOWER 1 +#endif + +#if CONFIG_LCD_MAXPOWER > 255 +# error "CONFIG_LCD_MAXPOWER must be less than 256 to fit in uint8_t" +#endif + +/* Check orientation */ + +#if defined(CONFIG_LCD_PORTRAIT) +# if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) || defined(CONFIG_LCD_RPORTRAIT) +# error "Cannot define both portrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_RPORTRAIT) +# if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) +# error "Cannot define both rportrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_LANDSCAPE) +# ifdef CONFIG_LCD_RLANDSCAPE +# error "Cannot define both landscape and any other orientations" +# endif +#elif !defined(CONFIG_LCD_RLANDSCAPE) +# define CONFIG_LCD_LANDSCAPE 1 +#endif + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* Display/Color Properties ***********************************************************/ +/* Display Resolution */ + +#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) +# define STM3220G_XRES 320 +# define STM3220G_YRES 240 +#else +# define STM3220G_XRES 240 +# define STM3220G_YRES 320 +#endif + +/* Color depth and format */ + +#define STM3220G_BPP 16 +#define STM3220G_COLORFMT FB_FMT_RGB16_565 + +/* STM3220G-EVAL LCD Hardware Definitions *********************************************/ +/* LCD /CS is CE4, Bank 3 of NOR/SRAM Bank 1~4 */ + +#define STM3220G_LCDBASE ((uintptr_t)(0x60000000 | 0x08000000)) +#define LCD ((struct lcd_regs_s *)STM3220G_LCDBASE) + +#define LCD_REG_0 0x00 +#define LCD_REG_1 0x01 +#define LCD_REG_2 0x02 +#define LCD_REG_3 0x03 +#define LCD_REG_4 0x04 +#define LCD_REG_5 0x05 +#define LCD_REG_6 0x06 +#define LCD_REG_7 0x07 +#define LCD_REG_8 0x08 +#define LCD_REG_9 0x09 +#define LCD_REG_10 0x0a +#define LCD_REG_12 0x0c +#define LCD_REG_13 0x0d +#define LCD_REG_14 0x0e +#define LCD_REG_15 0x0f +#define LCD_REG_16 0x10 +#define LCD_REG_17 0x11 +#define LCD_REG_18 0x12 +#define LCD_REG_19 0x13 +#define LCD_REG_20 0x14 +#define LCD_REG_21 0x15 +#define LCD_REG_22 0x16 +#define LCD_REG_23 0x17 +#define LCD_REG_24 0x18 +#define LCD_REG_25 0x19 +#define LCD_REG_26 0x1a +#define LCD_REG_27 0x1b +#define LCD_REG_28 0x1c +#define LCD_REG_29 0x1d +#define LCD_REG_30 0x1e +#define LCD_REG_31 0x1f +#define LCD_REG_32 0x20 +#define LCD_REG_33 0x21 +#define LCD_REG_34 0x22 +#define LCD_REG_36 0x24 +#define LCD_REG_37 0x25 +#define LCD_REG_40 0x28 +#define LCD_REG_41 0x29 +#define LCD_REG_43 0x2b +#define LCD_REG_45 0x2d +#define LCD_REG_48 0x30 +#define LCD_REG_49 0x31 +#define LCD_REG_50 0x32 +#define LCD_REG_51 0x33 +#define LCD_REG_52 0x34 +#define LCD_REG_53 0x35 +#define LCD_REG_54 0x36 +#define LCD_REG_55 0x37 +#define LCD_REG_56 0x38 +#define LCD_REG_57 0x39 +#define LCD_REG_58 0x3a +#define LCD_REG_59 0x3b +#define LCD_REG_60 0x3c +#define LCD_REG_61 0x3d +#define LCD_REG_62 0x3e +#define LCD_REG_63 0x3f +#define LCD_REG_64 0x40 +#define LCD_REG_65 0x41 +#define LCD_REG_66 0x42 +#define LCD_REG_67 0x43 +#define LCD_REG_68 0x44 +#define LCD_REG_69 0x45 +#define LCD_REG_70 0x46 +#define LCD_REG_71 0x47 +#define LCD_REG_72 0x48 +#define LCD_REG_73 0x49 +#define LCD_REG_74 0x4a +#define LCD_REG_75 0x4b +#define LCD_REG_76 0x4c +#define LCD_REG_77 0x4d +#define LCD_REG_78 0x4e +#define LCD_REG_79 0x4f +#define LCD_REG_80 0x50 +#define LCD_REG_81 0x51 +#define LCD_REG_82 0x52 +#define LCD_REG_83 0x53 +#define LCD_REG_96 0x60 +#define LCD_REG_97 0x61 +#define LCD_REG_106 0x6a +#define LCD_REG_118 0x76 +#define LCD_REG_128 0x80 +#define LCD_REG_129 0x81 +#define LCD_REG_130 0x82 +#define LCD_REG_131 0x83 +#define LCD_REG_132 0x84 +#define LCD_REG_133 0x85 +#define LCD_REG_134 0x86 +#define LCD_REG_135 0x87 +#define LCD_REG_136 0x88 +#define LCD_REG_137 0x89 +#define LCD_REG_139 0x8b +#define LCD_REG_140 0x8c +#define LCD_REG_141 0x8d +#define LCD_REG_143 0x8f +#define LCD_REG_144 0x90 +#define LCD_REG_145 0x91 +#define LCD_REG_146 0x92 +#define LCD_REG_147 0x93 +#define LCD_REG_148 0x94 +#define LCD_REG_149 0x95 +#define LCD_REG_150 0x96 +#define LCD_REG_151 0x97 +#define LCD_REG_152 0x98 +#define LCD_REG_153 0x99 +#define LCD_REG_154 0x9a +#define LCD_REG_157 0x9d +#define LCD_REG_164 0xa4 +#define LCD_REG_192 0xc0 +#define LCD_REG_193 0xc1 +#define LCD_REG_229 0xe5 + +/* LCD IDs */ + +#define ILI9320_ID 0x9320 +#define ILI9321_ID 0x9321 +#define ILI9325_ID 0x9325 + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/************************************************************************************** + * Private Type Definition + **************************************************************************************/ + +/* LCD type */ + +enum lcd_type_e +{ + LCD_TYPE_UNKNOWN = 0, + LCD_TYPE_ILI9320, + LCD_TYPE_ILI9325 +}; + +/* This structure describes the LCD registers */ + +struct lcd_regs_s +{ + volatile uint16_t address; + volatile uint16_t value; +}; + +/* This structure describes the state of this driver */ + +struct stm3220g_dev_s +{ + /* Publically visible device structure */ + + struct lcd_dev_s dev; + + /* Private LCD-specific information follows */ + + uint8_t type; /* LCD type. See enum lcd_type_e */ + uint8_t power; /* Current power setting */ +}; + +/************************************************************************************** + * Private Function Protototypes + **************************************************************************************/ +/* Low Level LCD access */ + +static void stm3220g_writereg(uint8_t regaddr, uint16_t regval); +static uint16_t stm3220g_readreg(uint8_t regaddr); +static inline void stm3220g_gramselect(void); +static inline void stm3220g_writegram(uint16_t rgbval); +static void stm3220g_readnosetup(FAR uint16_t *accum); +static uint16_t stm3220g_readnoshift(FAR uint16_t *accum); +static void stm3220g_setcursor(uint16_t col, uint16_t row); + +/* LCD Data Transfer Methods */ + +static int stm3220g_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels); +static int stm3220g_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels); + +/* LCD Configuration */ + +static int stm3220g_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo); +static int stm3220g_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo); + +/* LCD RGB Mapping */ + +#ifdef CONFIG_FB_CMAP +# error "RGB color mapping not supported by this driver" +#endif + +/* Cursor Controls */ + +#ifdef CONFIG_FB_HWCURSOR +# error "Cursor control not supported by this driver" +#endif + +/* LCD Specific Controls */ + +static int stm3220g_getpower(struct lcd_dev_s *dev); +static int stm3220g_setpower(struct lcd_dev_s *dev, int power); +static int stm3220g_getcontrast(struct lcd_dev_s *dev); +static int stm3220g_setcontrast(struct lcd_dev_s *dev, unsigned int contrast); + +/* Initialization */ + +static inline void stm3220g_lcdinitialize(void); + +/************************************************************************************** + * Private Data + **************************************************************************************/ + +/* This is working memory allocated by the LCD driver for each LCD device + * and for each color plane. This memory will hold one raster line of data. + * The size of the allocated run buffer must therefore be at least + * (bpp * xres / 8). Actual alignment of the buffer must conform to the + * bitwidth of the underlying pixel type. + * + * If there are multiple planes, they may share the same working buffer + * because different planes will not be operate on concurrently. However, + * if there are multiple LCD devices, they must each have unique run buffers. + */ + +static uint16_t g_runbuffer[STM3220G_XRES]; + +/* This structure describes the overall LCD video controller */ + +static const struct fb_videoinfo_s g_videoinfo = +{ + .fmt = STM3220G_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */ + .xres = STM3220G_XRES, /* Horizontal resolution in pixel columns */ + .yres = STM3220G_YRES, /* Vertical resolution in pixel rows */ + .nplanes = 1, /* Number of color planes supported */ +}; + +/* This is the standard, NuttX Plane information object */ + +static const struct lcd_planeinfo_s g_planeinfo = +{ + .putrun = stm3220g_putrun, /* Put a run into LCD memory */ + .getrun = stm3220g_getrun, /* Get a run from LCD memory */ + .buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ + .bpp = STM3220G_BPP, /* Bits-per-pixel */ +}; + +/* This is the standard, NuttX LCD driver object */ + +static struct stm3220g_dev_s g_lcddev = +{ + .dev = + { + /* LCD Configuration */ + + .getvideoinfo = stm3220g_getvideoinfo, + .getplaneinfo = stm3220g_getplaneinfo, + + /* LCD RGB Mapping -- Not supported */ + /* Cursor Controls -- Not supported */ + + /* LCD Specific Controls */ + + .getpower = stm3220g_getpower, + .setpower = stm3220g_setpower, + .getcontrast = stm3220g_getcontrast, + .setcontrast = stm3220g_setcontrast, + }, +}; + +/************************************************************************************** + * Private Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: stm3220g_writereg + * + * Description: + * Write to an LCD register + * + **************************************************************************************/ + +static void stm3220g_writereg(uint8_t regaddr, uint16_t regval) +{ + /* Write the register address then write the register value */ + + LCD->address = regaddr; + LCD->value = regval; +} + +/************************************************************************************** + * Name: stm3220g_readreg + * + * Description: + * Read from an LCD register + * + **************************************************************************************/ + +static uint16_t stm3220g_readreg(uint8_t regaddr) +{ + /* Write the register address then read the register value */ + + LCD->address = regaddr; + return LCD->value; +} + +/************************************************************************************** + * Name: stm3220g_gramselect + * + * Description: + * Setup to read or write multiple pixels to the GRAM memory + * + **************************************************************************************/ + +static inline void stm3220g_gramselect(void) +{ + LCD->address = LCD_REG_34; +} + +/************************************************************************************** + * Name: stm3220g_writegram + * + * Description: + * Write one pixel to the GRAM memory + * + **************************************************************************************/ + +static inline void stm3220g_writegram(uint16_t rgbval) +{ + /* Write the value (GRAM register already selected) */ + + LCD->value = rgbval; +} + +/************************************************************************************** + * Name: stm3220g_readnosetup + * + * Description: + * Prime the operation by reading one pixel from the GRAM memory if necessary for + * this LCD type. When reading 16-bit gram data, there may be some shifts in the + * returned data: + * + * - ILI932x: Discard first dummy read; no shift in the return data + * + **************************************************************************************/ + +static void stm3220g_readnosetup(FAR uint16_t *accum) +{ + /* Read-ahead one pixel */ + + *accum = LCD->value; +} + +/************************************************************************************** + * Name: stm3220g_readnoshift + * + * Description: + * Read one correctly aligned pixel from the GRAM memory. Possibly shifting the + * data and possibly swapping red and green components. + * + * - ILI932x: Unknown -- assuming colors are in the color order + * + **************************************************************************************/ + +static uint16_t stm3220g_readnoshift(FAR uint16_t *accum) +{ + /* Read the value (GRAM register already selected) */ + + return LCD->value; +} + +/************************************************************************************** + * Name: stm3220g_setcursor + * + * Description: + * Set the cursor position. In landscape mode, the "column" is actually the physical + * Y position and the "row" is the physical X position. + * + **************************************************************************************/ + +static void stm3220g_setcursor(uint16_t col, uint16_t row) +{ + stm3220g_writereg(LCD_REG_32, row); /* GRAM horizontal address */ + stm3220g_writereg(LCD_REG_33, col); /* GRAM vertical address */ +} + +/************************************************************************************** + * Name: stm3220g_dumprun + * + * Description: + * Dump the contexts of the run buffer: + * + * run - The buffer in containing the run read to be dumped + * npixels - The number of pixels to dump + * + **************************************************************************************/ + +#if 0 /* Sometimes useful */ +static void stm3220g_dumprun(FAR const char *msg, FAR uint16_t *run, size_t npixels) +{ + int i, j; + + syslog(LOG_DEBUG, "\n%s:\n", msg); + for (i = 0; i < npixels; i += 16) + { + up_putc(' '); + syslog(LOG_DEBUG, " "); + for (j = 0; j < 16; j++) + { + syslog(LOG_DEBUG, " %04x", *run++); + } + + up_putc('\n'); + } +} +#endif + +/************************************************************************************** + * Name: stm3220g_putrun + * + * Description: + * This method can be used to write a partial raster line to the LCD: + * + * row - Starting row to write to (range: 0 <= row < yres) + * col - Starting column to write to (range: 0 <= col <= xres-npixels) + * buffer - The buffer containing the run to be written to the LCD + * npixels - The number of pixels to write to the LCD + * (range: 0 < npixels <= xres-col) + * + **************************************************************************************/ + +static int stm3220g_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels) +{ + FAR const uint16_t *src = (FAR const uint16_t*)buffer; + int i; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + /* Write the run to GRAM. */ + +#ifdef CONFIG_LCD_LANDSCAPE + /* Convert coordinates -- Here the edge away from the row of buttons on + * the STM3220G-EVAL is used as the top. + */ + + /* Write the GRAM data, manually incrementing X */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm3220g_setcursor(col, row); + stm3220g_gramselect(); + stm3220g_writegram(*src++); + + /* Increment to next column */ + + col++; + } +#elif defined(CONFIG_LCD_RLANDSCAPE) + /* Convert coordinates -- Here the edge next to the row of buttons on + * the STM3220G-EVAL is used as the top. + */ + + col = (STM3220G_XRES-1) - col; + row = (STM3220G_YRES-1) - row; + + /* Set the cursor position */ + + stm3220g_setcursor(col, row); + + /* Then write the GRAM data, auto-decrementing X */ + + stm3220g_gramselect(); + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position (auto-decrements to the next column) */ + + stm3220g_writegram(*src++); + } +#elif defined(CONFIG_LCD_PORTRAIT) + /* Convert coordinates. In this configuration, the top of the display is to the left + * of the buttons (if the board is held so that the buttons are at the botton of the + * board). + */ + + col = (STM3220G_XRES-1) - col; + + /* Then write the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm3220g_setcursor(row, col); + stm3220g_gramselect(); + stm3220g_writegram(*src++); + + /* Increment to next column */ + + col--; + } +#else /* CONFIG_LCD_RPORTRAIT */ + /* Convert coordinates. In this configuration, the top of the display is to the right + * of the buttons (if the board is held so that the buttons are at the botton of the + * board). + */ + + row = (STM3220G_YRES-1) - row; + + /* Then write the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm3220g_setcursor(row, col); + stm3220g_gramselect(); + stm3220g_writegram(*src++); + + /* Decrement to next column */ + + col++; + } +#endif + return OK; +} + +/************************************************************************************** + * Name: stm3220g_getrun + * + * Description: + * This method can be used to read a partial raster line from the LCD: + * + * row - Starting row to read from (range: 0 <= row < yres) + * col - Starting column to read read (range: 0 <= col <= xres-npixels) + * buffer - The buffer in which to return the run read from the LCD + * npixels - The number of pixels to read from the LCD + * (range: 0 < npixels <= xres-col) + * + **************************************************************************************/ + +static int stm3220g_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels) +{ + FAR uint16_t *dest = (FAR uint16_t*)buffer; + void (*readsetup)(FAR uint16_t *accum); + uint16_t (*readgram)(FAR uint16_t *accum); + uint16_t accum; + int i; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + /* Configure according to the LCD type. Kind of silly with only one LCD type. */ + + switch (g_lcddev.type) + { + case LCD_TYPE_ILI9320: + case LCD_TYPE_ILI9325: + readsetup = stm3220g_readnosetup; + readgram = stm3220g_readnoshift; + break; + + default: /* Shouldn't happen */ + return -ENOSYS; + } + + /* Read the run from GRAM. */ + +#ifdef CONFIG_LCD_LANDSCAPE + /* Convert coordinates -- Here the edge away from the row of buttons on + * the STM3220G-EVAL is used as the top. + */ + + for (i = 0; i < npixels; i++) + { + /* Read the next pixel from this position */ + + stm3220g_setcursor(row, col); + stm3220g_gramselect(); + readsetup(&accum); + *dest++ = readgram(&accum); + + /* Increment to next column */ + + col++; + } +#elif defined(CONFIG_LCD_RLANDSCAPE) + /* Convert coordinates -- Here the edge next to the row of buttons on + * the STM3220G-EVAL is used as the top. + */ + + col = (STM3220G_XRES-1) - col; + row = (STM3220G_YRES-1) - row; + + /* Set the cursor position */ + + stm3220g_setcursor(col, row); + + /* Then read the GRAM data, auto-decrementing Y */ + + stm3220g_gramselect(); + + /* Prime the pump for unaligned read data */ + + readsetup(&accum); + + for (i = 0; i < npixels; i++) + { + /* Read the next pixel from this position (autoincrements to the next row) */ + + *dest++ = readgram(&accum); + } +#elif defined(CONFIG_LCD_PORTRAIT) + /* Convert coordinates. In this configuration, the top of the display is to the left + * of the buttons (if the board is held so that the buttons are at the botton of the + * board). + */ + + col = (STM3220G_XRES-1) - col; + + /* Then read the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Read the next pixel from this position */ + + stm3220g_setcursor(row, col); + stm3220g_gramselect(); + readsetup(&accum); + *dest++ = readgram(&accum); + + /* Increment to next column */ + + col--; + } +#else /* CONFIG_LCD_RPORTRAIT */ + /* Convert coordinates. In this configuration, the top of the display is to the right + * of the buttons (if the board is held so that the buttons are at the botton of the + * board). + */ + + row = (STM3220G_YRES-1) - row; + + /* Then write the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm3220g_setcursor(row, col); + stm3220g_gramselect(); + readsetup(&accum); + *dest++ = readgram(&accum); + + /* Decrement to next column */ + + col++; + } +#endif + + return OK; +} + +/************************************************************************************** + * Name: stm3220g_getvideoinfo + * + * Description: + * Get information about the LCD video controller configuration. + * + **************************************************************************************/ + +static int stm3220g_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo) +{ + DEBUGASSERT(dev && vinfo); + lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n", + g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes); + memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s)); + return OK; +} + +/************************************************************************************** + * Name: stm3220g_getplaneinfo + * + * Description: + * Get information about the configuration of each LCD color plane. + * + **************************************************************************************/ + +static int stm3220g_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo) +{ + DEBUGASSERT(dev && pinfo && planeno == 0); + lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp); + memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s)); + return OK; +} + +/************************************************************************************** + * Name: stm3220g_getpower + * + * Description: + * Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + **************************************************************************************/ + +static int stm3220g_getpower(struct lcd_dev_s *dev) +{ + lcdvdbg("power: %d\n", 0); + return g_lcddev.power; +} + +/************************************************************************************** + * Name: stm3220g_poweroff + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + **************************************************************************************/ + +static int stm3220g_poweroff(void) +{ + /* Turn the display off */ + + stm3220g_writereg(LCD_REG_7, 0); + + /* Remember the power off state */ + + g_lcddev.power = 0; + return OK; +} + +/************************************************************************************** + * Name: stm3220g_setpower + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + **************************************************************************************/ + +static int stm3220g_setpower(struct lcd_dev_s *dev, int power) +{ + lcdvdbg("power: %d\n", power); + DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER); + + /* Set new power level */ + + if (power > 0) + { + /* Then turn the display on */ + +#if !defined(CONFIG_STM32_ILI9320_DISABLE) || !defined(CONFIG_STM32_ILI9325_DISABLE) + stm3220g_writereg(LCD_REG_7, 0x0173); +#endif + g_lcddev.power = power; + } + else + { + /* Turn the display off */ + + stm3220g_poweroff(); + } + + return OK; +} + +/************************************************************************************** + * Name: stm3220g_getcontrast + * + * Description: + * Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static int stm3220g_getcontrast(struct lcd_dev_s *dev) +{ + lcdvdbg("Not implemented\n"); + return -ENOSYS; +} + +/************************************************************************************** + * Name: stm3220g_setcontrast + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static int stm3220g_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) +{ + lcdvdbg("contrast: %d\n", contrast); + return -ENOSYS; +} + +/************************************************************************************** + * Name: stm3220g_lcdinitialize + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static inline void stm3220g_lcdinitialize(void) +{ + uint16_t id; + + /* Check LCD ID */ + + id = stm3220g_readreg(LCD_REG_0); + lcddbg("LCD ID: %04x\n", id); + + /* Check if the ID is for the STM32_ILI9320 (or ILI9321) or STM32_ILI9325 */ + +#if !defined(CONFIG_STM32_ILI9320_DISABLE) && !defined(CONFIG_STM32_ILI9325_DISABLE) + if (id == ILI9320_ID || id == ILI9321_ID || id == ILI9325_ID) +#elif !defined(CONFIG_STM32_ILI9320_DISABLE) && defined(CONFIG_STM32_ILI9325_DISABLE) + if (id == ILI9320_ID || id == ILI9321_ID) +#else /* if defined(CONFIG_STM32_ILI9320_DISABLE) && !defined(CONFIG_STM32_ILI9325_DISABLE)) */ + if (id == ILI9325_ID) +#endif + { + /* Save the LCD type (not actually used at for anything important) */ + +#if !defined(CONFIG_STM32_ILI9320_DISABLE) +# if !defined(CONFIG_STM32_ILI9325_DISABLE) + if (id == ILI9325_ID) + { + g_lcddev.type = LCD_TYPE_ILI9325; + } + else +# endif + { + g_lcddev.type = LCD_TYPE_ILI9320; + stm3220g_writereg(LCD_REG_229, 0x8000); /* Set the internal vcore voltage */ + } +#else /* if !defined(CONFIG_STM32_ILI9325_DISABLE) */ + g_lcddev.type = LCD_TYPE_ILI9325; +#endif + lcddbg("LCD type: %d\n", g_lcddev.type); + + /* Start Initial Sequence */ + + stm3220g_writereg(LCD_REG_0, 0x0001); /* Start internal OSC. */ + stm3220g_writereg(LCD_REG_1, 0x0100); /* Set SS and SM bit */ + stm3220g_writereg(LCD_REG_2, 0x0700); /* Set 1 line inversion */ + stm3220g_writereg(LCD_REG_3, 0x1030); /* Set GRAM write direction and BGR=1. */ + //stm3220g_writereg(LCD_REG_3, 0x1018); /* Set GRAM write direction and BGR=1. */ + stm3220g_writereg(LCD_REG_4, 0x0000); /* Resize register */ + stm3220g_writereg(LCD_REG_8, 0x0202); /* Set the back porch and front porch */ + stm3220g_writereg(LCD_REG_9, 0x0000); /* Set non-display area refresh cycle ISC[3:0] */ + stm3220g_writereg(LCD_REG_10, 0x0000); /* FMARK function */ + stm3220g_writereg(LCD_REG_12, 0x0000); /* RGB interface setting */ + stm3220g_writereg(LCD_REG_13, 0x0000); /* Frame marker Position */ + stm3220g_writereg(LCD_REG_15, 0x0000); /* RGB interface polarity */ + + /* Power On sequence */ + + stm3220g_writereg(LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + stm3220g_writereg(LCD_REG_17, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ + stm3220g_writereg(LCD_REG_18, 0x0000); /* VREG1OUT voltage */ + stm3220g_writereg(LCD_REG_19, 0x0000); /* VDV[4:0] for VCOM amplitude */ + up_mdelay(200); /* Dis-charge capacitor power voltage (200ms) */ + + stm3220g_writereg(LCD_REG_16, 0x17b0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + stm3220g_writereg(LCD_REG_17, 0x0137); /* DC1[2:0], DC0[2:0], VC[2:0] */ + up_mdelay(50); + + stm3220g_writereg(LCD_REG_18, 0x0139); /* VREG1OUT voltage */ + up_mdelay(50); + + stm3220g_writereg(LCD_REG_19, 0x1d00); /* VDV[4:0] for VCOM amplitude */ + stm3220g_writereg(LCD_REG_41, 0x0013); /* VCM[4:0] for VCOMH */ + up_mdelay(50); + + stm3220g_writereg(LCD_REG_32, 0x0000); /* GRAM horizontal Address */ + stm3220g_writereg(LCD_REG_33, 0x0000); /* GRAM Vertical Address */ + + /* Adjust the Gamma Curve (ILI9320/1) */ + +#if !defined(CONFIG_STM32_ILI9320_DISABLE) +# if !defined(CONFIG_STM32_ILI9325_DISABLE) + if (g_lcddev.type == LCD_TYPE_ILI9320) +# endif + { + stm3220g_writereg(LCD_REG_48, 0x0006); + stm3220g_writereg(LCD_REG_49, 0x0101); + stm3220g_writereg(LCD_REG_50, 0x0003); + stm3220g_writereg(LCD_REG_53, 0x0106); + stm3220g_writereg(LCD_REG_54, 0x0b02); + stm3220g_writereg(LCD_REG_55, 0x0302); + stm3220g_writereg(LCD_REG_56, 0x0707); + stm3220g_writereg(LCD_REG_57, 0x0007); + stm3220g_writereg(LCD_REG_60, 0x0600); + stm3220g_writereg(LCD_REG_61, 0x020b); + } +#endif + /* Adjust the Gamma Curve (ILI9325) */ + +#if !defined(CONFIG_STM32_ILI9325_DISABLE) +# if !defined(CONFIG_STM32_ILI9320_DISABLE) + else +# endif + { + stm3220g_writereg(LCD_REG_48, 0x0007); + stm3220g_writereg(LCD_REG_49, 0x0302); + stm3220g_writereg(LCD_REG_50, 0x0105); + stm3220g_writereg(LCD_REG_53, 0x0206); + stm3220g_writereg(LCD_REG_54, 0x0808); + stm3220g_writereg(LCD_REG_55, 0x0206); + stm3220g_writereg(LCD_REG_56, 0x0504); + stm3220g_writereg(LCD_REG_57, 0x0007); + stm3220g_writereg(LCD_REG_60, 0x0105); + stm3220g_writereg(LCD_REG_61, 0x0808); + } +#endif + + /* Set GRAM area */ + + stm3220g_writereg(LCD_REG_80, 0x0000); /* Horizontal GRAM Start Address */ + stm3220g_writereg(LCD_REG_81, 0x00ef); /* Horizontal GRAM End Address */ + stm3220g_writereg(LCD_REG_82, 0x0000); /* Vertical GRAM Start Address */ + stm3220g_writereg(LCD_REG_83, 0x013f); /* Vertical GRAM End Address */ + stm3220g_writereg(LCD_REG_96, 0x2700); /* Gate Scan Line */ + //stm3220g_writereg(LCD_REG_96, 0xa700); /* Gate Scan Line(GS=1, scan direction is G320~G1) */ + stm3220g_writereg(LCD_REG_97, 0x0001); /* NDL,VLE, REV */ + stm3220g_writereg(LCD_REG_106, 0x0000); /* Set scrolling line */ + + /* Partial Display Control */ + + stm3220g_writereg(LCD_REG_128, 0x0000); + stm3220g_writereg(LCD_REG_129, 0x0000); + stm3220g_writereg(LCD_REG_130, 0x0000); + stm3220g_writereg(LCD_REG_131, 0x0000); + stm3220g_writereg(LCD_REG_132, 0x0000); + stm3220g_writereg(LCD_REG_133, 0x0000); + + /* Panel Control */ + + stm3220g_writereg(LCD_REG_144, 0x0010); + stm3220g_writereg(LCD_REG_146, 0x0000); + stm3220g_writereg(LCD_REG_147, 0x0003); + stm3220g_writereg(LCD_REG_149, 0x0110); + stm3220g_writereg(LCD_REG_151, 0x0000); + stm3220g_writereg(LCD_REG_152, 0x0000); + + /* Set GRAM write direction and BGR = 1 + * + * I/D=01 (Horizontal : increment, Vertical : decrement) + * AM=1 (address is updated in vertical writing direction) + */ + + stm3220g_writereg(LCD_REG_3, 0x1018); + stm3220g_writereg(LCD_REG_7, 0); /* Display off */ + } + else + { + lcddbg("Unsupported LCD type\n"); + } +} + +/************************************************************************************** + * Public Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + **************************************************************************************/ + +int board_lcd_initialize(void) +{ + lcdvdbg("Initializing\n"); + + /* Configure GPIO pins and configure the FSMC to support the LCD */ + + stm32_selectlcd(); + + /* Configure and enable LCD */ + + up_mdelay(50); + stm3220g_lcdinitialize(); + + /* Clear the display (setting it to the color 0=black) */ + + stm3220g_lcdclear(0); + + /* Turn the display off */ + + stm3220g_poweroff(); + return OK; +} + +/************************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows support + * for multiple LCD devices. + * + **************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return &g_lcddev.dev; +} + +/************************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Unitialize the LCD support + * + **************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + stm3220g_poweroff(); + stm32_deselectlcd(); +} + +/************************************************************************************** + * Name: stm3220g_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the stm3220g-EVAL board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * display is cleared by simply setting all GRAM memory to the specified color. + * + **************************************************************************************/ + +void stm3220g_lcdclear(uint16_t color) +{ + uint32_t i = 0; + + stm3220g_setcursor(0, STM3220G_XRES-1); + stm3220g_gramselect(); + for (i = 0; i < STM3220G_XRES * STM3220G_YRES; i++) + { + LCD->value = color; + } +} + +#endif /* !CONFIG_STM32_ILI9320_DISABLE || !CONFIG_STM32_ILI9325_DISABLE */ diff --git a/configs/stm3220g-eval/src/stm32_pwm.c b/configs/stm3220g-eval/src/stm32_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..9c0467138a924d7b327e76dc367d99f328aba8bc --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_pwm.c @@ -0,0 +1,121 @@ +/************************************************************************************ + * configs/stm3220g-eval/src/stm32_pwm.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "stm32_pwm.h" +#include "stm3220g-eval.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* PWM + * + * The STM3220G-Eval has no real on-board PWM devices, but the board can be + * configured to output a pulse train using variously unused pins on the board for + * PWM output (see board.h for details of pins). + */ + +#ifdef CONFIG_PWM + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + pwm = stm32_pwminitialize(STM3220G_EVAL_PWMTIMER); + if (!pwm) + { + dbg("Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/stm3220g-eval/src/stm32_selectlcd.c b/configs/stm3220g-eval/src/stm32_selectlcd.c new file mode 100644 index 0000000000000000000000000000000000000000..8c5193994dca01a272016e703f0000897741bb4d --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_selectlcd.c @@ -0,0 +1,168 @@ +/************************************************************************************ + * configs/stm3220g-eval/src/stm32_selectlcd.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32.h" +#include "stm3220g-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +/* SRAM pin definitions */ + +#define LCD_NADDRLINES 1 +#define LCD_NDATALINES 16 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/* Pin Usage (per schematic) + * SRAM LCD + * D[0..15] [0..15] [0..15] + * A[0..25] [0..22] [0] RS + * FSMC_NBL0 PE0 OUT --- --- + * FSMC_NBL1 PE1 OUT --- --- + * FSMC_NE2 PG9 OUT --- --- + * FSMC_NE3 PG10 OUT --- ~CS + * FSMC_NE4 PG12 OUT --- --- + * FSMC_NWE PD5 OUT --- ~WR/SCL + * FSMC_NOE PD4 OUT --- ~RD + * FSMC_NWAIT PD6 IN --- --- + * FSMC_INT2 PG6* IN --- --- + * FSMC_INT3 + * FSMC_INTR + * FSMC_CD + * FSMC_CLK + * FSMC_NCE2 + * FSMC_NCE3 + * FSMC_NCE4_1 + * FSMC_NCE4_2 + * FSMC_NIORD + * FSMC_NIOWR + * FSMC_NL + * FSMC_NREG + */ + +/* GPIO configurations unique to the LCD */ + +static const uint32_t g_lcdconfig[] = +{ + /* NOE, NWE, and NE3 */ + + GPIO_FSMC_NOE, GPIO_FSMC_NWE, GPIO_FSMC_NE3 +}; +#define NLCD_CONFIG (sizeof(g_lcdconfig)/sizeof(uint32_t)) + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_selectlcd + * + * Description: + * Initialize to the LCD + * + ************************************************************************************/ + +void stm32_selectlcd(void) +{ + /* Configure new GPIO pins */ + + stm32_extmemaddr(LCD_NADDRLINES); /* Common address lines: A0 */ + stm32_extmemdata(LCD_NDATALINES); /* Common data lines: D0-D15 */ + stm32_extmemgpios(g_lcdconfig, NLCD_CONFIG); /* LCD-specific control lines */ + + /* Enable AHB clocking to the FSMC */ + + stm32_enablefsmc(); + + /* Color LCD configuration (LCD configured as follow): + * + * - Data/Address MUX = Disable "FSMC_BCR_MUXEN" just not enable it. + * - Extended Mode = Disable "FSMC_BCR_EXTMOD" + * - Memory Type = SRAM "FSMC_BCR_SRAM" + * - Data Width = 16bit "FSMC_BCR_MWID16" + * - Write Operation = Enable "FSMC_BCR_WREN" + * - Asynchronous Wait = Disable + */ + + /* Bank3 NOR/SRAM control register configuration */ + + putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR3); + + /* Bank3 NOR/SRAM timing register configuration */ + + putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) | FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) | + FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | FSMC_BTR_ACCMODA, STM32_FSMC_BTR3); + + putreg32(0xffffffff, STM32_FSMC_BWTR3); + + /* Enable the bank by setting the MBKEN bit */ + + putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR3); +} + +#endif /* CONFIG_STM32_FSMC */ + + diff --git a/configs/stm3220g-eval/src/stm32_selectsram.c b/configs/stm3220g-eval/src/stm32_selectsram.c new file mode 100644 index 0000000000000000000000000000000000000000..1cdcffa1b39050d044b7383c97696edb58817311 --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_selectsram.c @@ -0,0 +1,193 @@ +/************************************************************************************ + * configs/stm3220g-eval/src/stm32_selectsram.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32.h" +#include "stm3220g-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +/* SRAM Timing */ + +#define SRAM_ADDRESS_SETUP_TIME 3 +#define SRAM_ADDRESS_HOLD_TIME 0 +#define SRAM_DATA_SETUP_TIME 6 +#define SRAM_BUS_TURNAROUND_DURATION 1 +#define SRAM_CLK_DIVISION 0 +#define SRAM_DATA_LATENCY 0 + +/* SRAM pin definitions */ + +#define SRAM_NADDRLINES 21 +#define SRAM_NDATALINES 16 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* GPIOs Configuration ************************************************************** + * PD0 <-> FSMC_D2 PE0 <-> FSMC_NBL0 PF0 <-> FSMC_A0 PG0 <-> FSMC_A10 + * PD1 <-> FSMC_D3 PE1 <-> FSMC_NBL1 PF1 <-> FSMC_A1 PG1 <-> FSMC_A11 + * PD4 <-> FSMC_NOE PE3 <-> FSMC_A19 PF2 <-> FSMC_A2 PG2 <-> FSMC_A12 + * PD5 <-> FSMC_NWE PE4 <-> FSMC_A20 PF3 <-> FSMC_A3 PG3 <-> FSMC_A13 + * PD8 <-> FSMC_D13 PE7 <-> FSMC_D4 PF4 <-> FSMC_A4 PG4 <-> FSMC_A14 + * PD9 <-> FSMC_D14 PE8 <-> FSMC_D5 PF5 <-> FSMC_A5 PG5 <-> FSMC_A15 + * PD10 <-> FSMC_D15 PE9 <-> FSMC_D6 PF12 <-> FSMC_A6 PG9 <-> FSMC_NE2 + * PD11 <-> FSMC_A16 PE10 <-> FSMC_D7 PF13 <-> FSMC_A7 + * PD12 <-> FSMC_A17 PE11 <-> FSMC_D8 PF14 <-> FSMC_A8 + * PD13 <-> FSMC_A18 PE12 <-> FSMC_D9 PF15 <-> FSMC_A9 + * PD14 <-> FSMC_D0 PE13 <-> FSMC_D10 + * PD15 <-> FSMC_D1 PE14 <-> FSMC_D11 + * PE15 <-> FSMC_D12 + */ + +/* GPIO configurations unique to SRAM */ + +static const uint32_t g_sramconfig[] = +{ + /* NE3, NBL0, NBL1, */ + + GPIO_FSMC_NOE, GPIO_FSMC_NWE, GPIO_FSMC_NBL0, GPIO_FSMC_NBL1, GPIO_FSMC_NE2 +}; +#define NSRAM_CONFIG (sizeof(g_sramconfig)/sizeof(uint32_t)) + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_selectsram + * + * Description: + * Initialize to access external SRAM. SRAM will be visible at the FSMC Bank + * NOR/SRAM2 base address (0x64000000) + * + * General transaction rules. The requested AHB transaction data size can be 8-, + * 16- or 32-bit wide whereas the SRAM has a fixed 16-bit data width. Some simple + * transaction rules must be followed: + * + * Case 1: AHB transaction width and SRAM data width are equal + * There is no issue in this case. + * Case 2: AHB transaction size is greater than the memory size + * In this case, the FSMC splits the AHB transaction into smaller consecutive + * memory accesses in order to meet the external data width. + * Case 3: AHB transaction size is smaller than the memory size. + * SRAM supports the byte select feature. + * a) FSMC allows write transactions accessing the right data through its + * byte lanes (NBL[1:0]) + * b) Read transactions are allowed (the controller reads the entire memory + * word and uses the needed byte only). The NBL[1:0] are always kept low + * during read transactions. + * + ************************************************************************************/ + +void stm32_selectsram(void) +{ + /* Configure new GPIO pins */ + + stm32_extmemaddr(SRAM_NADDRLINES); /* Common address lines: A0-A20 */ + stm32_extmemdata(SRAM_NDATALINES); /* Common data lines: D0-D15 */ + stm32_extmemgpios(g_sramconfig, NSRAM_CONFIG); /* SRAM-specific control lines */ + + /* Enable AHB clocking to the FSMC */ + + stm32_enablefsmc(); + + /* Bank1 NOR/SRAM control register configuration + * + * Bank enable : Not yet + * Data address mux : Disabled + * Memory Type : PSRAM + * Data bus width : 16-bits + * Flash access : Disabled + * Burst access mode : Disabled + * Polarity : Low + * Wrapped burst mode : Disabled + * Write timing : Before state + * Write enable : Yes + * Wait signal : Disabled + * Extended mode : Disabled + * Asynchronous wait : Disabled + * Write burst : Disabled + */ + + putreg32((FSMC_BCR_PSRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN), STM32_FSMC_BCR2); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32((FSMC_BTR_ADDSET(SRAM_ADDRESS_SETUP_TIME) | FSMC_BTR_ADDHLD(SRAM_ADDRESS_HOLD_TIME) | + FSMC_BTR_DATAST(SRAM_DATA_SETUP_TIME) | FSMC_BTR_BUSTURN(SRAM_BUS_TURNAROUND_DURATION) | + FSMC_BTR_CLKDIV(SRAM_CLK_DIVISION) | FSMC_BTR_DATLAT(SRAM_DATA_LATENCY) | + FSMC_BTR_ACCMODA), + STM32_FSMC_BTR2); + + /* Bank1 NOR/SRAM timing register for write configuration, if extended mode is used */ + + putreg32(0xffffffff, STM32_FSMC_BWTR2); /* Extended mode not used */ + + /* Enable the bank */ + + putreg32((FSMC_BCR_MBKEN | FSMC_BCR_PSRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN), STM32_FSMC_BCR2); +} + +#endif /* CONFIG_STM32_FSMC */ + + diff --git a/configs/stm3220g-eval/src/stm32_spi.c b/configs/stm3220g-eval/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..5f6332c7fcaf7987987326946bae5093d295c381 --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_spi.c @@ -0,0 +1,160 @@ +/************************************************************************************ + * configs/stm3220g_eval/src/stm32_spi.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "stm3220g-eval.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the STM3220G-EVAL board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ +#warning "Missing logic" +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/stm3220g-eval/src/stm32_stmpe811.c b/configs/stm3220g-eval/src/stm32_stmpe811.c new file mode 100644 index 0000000000000000000000000000000000000000..c3fcf6de4b05833bab1ff8c4079867e242c2032b --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_stmpe811.c @@ -0,0 +1,353 @@ +/************************************************************************************ + * configs/stm3220g-eval/src/stm32_stmpe811.c + * + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "stm32.h" +#include "stm3220g-eval.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifdef CONFIG_INPUT_STMPE811 +#ifndef CONFIG_INPUT +# error "STMPE811 support requires CONFIG_INPUT" +#endif + +#ifndef CONFIG_STM32_I2C1 +# error "STMPE811 support requires CONFIG_STM32_I2C1" +#endif + +#ifndef CONFIG_STMPE811_I2C +# error "Only the STMPE811 I2C interface is supported" +#endif + +#ifdef CONFIG_STMPE811_SPI +# error "Only the STMPE811 SPI interface is supported" +#endif + +#ifndef CONFIG_STMPE811_FREQUENCY +# define CONFIG_STMPE811_FREQUENCY 100000 +#endif + +#ifndef CONFIG_STMPE811_I2CDEV +# define CONFIG_STMPE811_I2CDEV 1 +#endif + +#if CONFIG_STMPE811_I2CDEV != 1 +# error "CONFIG_STMPE811_I2CDEV must be one" +#endif + +#ifndef CONFIG_STMPE811_DEVMINOR +# define CONFIG_STMPE811_DEVMINOR 0 +#endif + +/* Board definitions ********************************************************/ +/* The STM3220G-EVAL has two STMPE811QTR I/O expanders on board both connected + * to the STM32 via I2C1. They share a common interrupt line: PI2. + * + * STMPE811 U24, I2C address 0x41 (7-bit) + * ------ ---- ---------------- -------------------------------------------- + * STPE11 PIN BOARD SIGNAL BOARD CONNECTION + * ------ ---- ---------------- -------------------------------------------- + * Y- TouchScreen_Y- LCD Connector XL + * X- TouchScreen_X- LCD Connector XR + * Y+ TouchScreen_Y+ LCD Connector XD + * X+ TouchScreen_X+ LCD Connector XU + * IN3 EXP_IO9 + * IN2 EXP_IO10 + * IN1 EXP_IO11 + * IN0 EXP_IO12 + * + * STMPE811 U29, I2C address 0x44 (7-bit) + * ------ ---- ---------------- -------------------------------------------- + * STPE11 PIN BOARD SIGNAL BOARD CONNECTION + * ------ ---- ---------------- -------------------------------------------- + * Y- EXP_IO1 + * X- EXP_IO2 + * Y+ EXP_IO3 + * X+ EXP_IO4 + * IN3 EXP_IO5 + * IN2 EXP_IO6 + * IN1 EXP_IO7 + * IN0 EXP_IO8 + */ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32_stmpe811config_s +{ + /* Configuration structure as seen by the STMPE811 driver */ + + struct stmpe811_config_s config; + + /* Additional private definitions only known to this driver */ + + STMPE811_HANDLE handle; /* The STMPE811 driver handle */ + xcpt_t handler; /* The STMPE811 interrupt handler */ +}; + +/**************************************************************************** + * Static Function Prototypes + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind callbacks + * to isolate the STMPE811 driver from differences in GPIO + * interrupt handling by varying boards and MCUs.* so that contact and loss-of-contact events can be detected. + * + * attach - Attach the STMPE811 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + */ + +static int stmpe811_attach(FAR struct stmpe811_config_s *state, xcpt_t isr); +static void stmpe811_enable(FAR struct stmpe811_config_s *state, bool enable); +static void stmpe811_clear(FAR struct stmpe811_config_s *state); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the STMPE811 + * driver. This structure provides information about the configuration + * of the STMPE811 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writable because, under certain circumstances, the driver + * may modify frequency or X plate resistance values. + */ + +#ifndef CONFIG_STMPE811_TSC_DISABLE +static struct stm32_stmpe811config_s g_stmpe811config = +{ + .config = + { +#ifdef CONFIG_STMPE811_I2C + .address = STMPE811_ADDR1, +#endif + .frequency = CONFIG_STMPE811_FREQUENCY, + +#ifdef CONFIG_STMPE811_MULTIPLE + .irq = STM32_IRQ_EXTI2, +#endif + .ctrl1 = (ADC_CTRL1_SAMPLE_TIME_80 | ADC_CTRL1_MOD_12B), + .ctrl2 = ADC_CTRL2_ADC_FREQ_3p25, + + .attach = stmpe811_attach, + .enable = stmpe811_enable, + .clear = stmpe811_clear, + }, + .handler = NULL, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the STMPE811 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. + * + * attach - Attach the STMPE811 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + */ + +static int stmpe811_attach(FAR struct stmpe811_config_s *state, xcpt_t isr) +{ + FAR struct stm32_stmpe811config_s *priv = (FAR struct stm32_stmpe811config_s *)state; + + ivdbg("Saving handler %p\n", isr); + DEBUGASSERT(priv); + + /* Just save the handler. We will use it when EXTI interruptsare enabled */ + + priv->handler = isr; + return OK; +} + +static void stmpe811_enable(FAR struct stmpe811_config_s *state, bool enable) +{ + FAR struct stm32_stmpe811config_s *priv = (FAR struct stm32_stmpe811config_s *)state; + irqstate_t flags; + + /* Attach and enable, or detach and disable. Enabling and disabling GPIO + * interrupts is a multi-step process so the safest thing is to keep + * interrupts disabled during the reconfiguration. + */ + + flags = enter_critical_section(); + if (enable) + { + /* Configure the EXTI interrupt using the SAVED handler */ + + (void)stm32_gpiosetevent(GPIO_IO_EXPANDER, true, true, true, priv->handler); + } + else + { + /* Configure the EXTI interrupt with a NULL handler to disable it */ + + (void)stm32_gpiosetevent(GPIO_IO_EXPANDER, false, false, false, NULL); + } + leave_critical_section(flags); +} + +static void stmpe811_clear(FAR struct stmpe811_config_s *state) +{ + /* Does nothing */ +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * configure the touchscreen device. This function will register the driver + * as /dev/inputN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ +#ifndef CONFIG_STMPE811_TSC_DISABLE + FAR struct i2c_master_s *dev; + int ret; + + idbg("minor %d\n", minor); + DEBUGASSERT(minor == 0); + + /* Check if we are already initialized */ + + if (!g_stmpe811config.handle) + { + ivdbg("Initializing\n"); + + /* Configure the STMPE811 interrupt pin as an input */ + + (void)stm32_configgpio(GPIO_IO_EXPANDER); + + /* Get an instance of the I2C interface */ + + dev = stm32_i2cbus_initialize(CONFIG_STMPE811_I2CDEV); + if (!dev) + { + idbg("Failed to initialize I2C bus %d\n", CONFIG_STMPE811_I2CDEV); + return -ENODEV; + } + + /* Instantiate the STMPE811 driver */ + + g_stmpe811config.handle = + stmpe811_instantiate(dev, (FAR struct stmpe811_config_s *)&g_stmpe811config); + if (!g_stmpe811config.handle) + { + idbg("Failed to instantiate the STMPE811 driver\n"); + return -ENODEV; + } + + /* Initialize and register the I2C touchscreen device */ + + ret = stmpe811_register(g_stmpe811config.handle, CONFIG_STMPE811_DEVMINOR); + if (ret < 0) + { + idbg("Failed to register STMPE driver: %d\n", ret); + /* stm32_i2cbus_uninitialize(dev); */ + return -ENODEV; + } + } + + return OK; +#else + return -ENOSYS; +#endif +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* No support for un-initializing the touchscreen STMPE811 device yet */ +} + +#endif /* CONFIG_INPUT_STMPE811 */ + diff --git a/configs/stm3220g-eval/src/stm32_usb.c b/configs/stm3220g-eval/src/stm32_usb.c new file mode 100644 index 0000000000000000000000000000000000000000..3d0e183b6118a8a1e5ac9d042918273c13a1d505 --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_usb.c @@ -0,0 +1,308 @@ +/************************************************************************************ + * configs/stm3220g-eval/src/stm32_usb.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm32_otgfs.h" +#include "stm3220g-eval.h" + +#ifdef CONFIG_STM32_OTGFS + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST) +# define HAVE_USB 1 +#else +# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST" +# undef HAVE_USB +#endif + +#ifndef CONFIG_USBHOST_DEFPRIO +# define CONFIG_USBHOST_DEFPRIO 50 +#endif + +#ifndef CONFIG_USBHOST_STACKSIZE +# ifdef CONFIG_USBHOST_HUB +# define CONFIG_USBHOST_STACKSIZE 1536 +# else +# define CONFIG_USBHOST_STACKSIZE 1024 +# endif +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static struct usbhost_connection_s *g_usbconn; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: usbhost_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static int usbhost_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + uvdbg("Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + uvdbg("%s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the STM3220G-EVAL board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ +#ifdef HAVE_USB + /* The OTG FS has an internal soft pull-up. No GPIO configuration is required */ + + /* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */ + + stm32_configgpio(GPIO_OTGFS_VBUS); + stm32_configgpio(GPIO_OTGFS_PWRON); + stm32_configgpio(GPIO_OTGFS_OVER); +#endif +} + +/*********************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +int stm32_usbhost_initialize(void) +{ + int pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + uvdbg("Register class drivers\n"); + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB mass storage class class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + + /* Then get an instance of the USB host interface */ + + uvdbg("Initialize USB host\n"); + g_usbconn = stm32_otgfshost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + uvdbg("Start usbhost_waiter\n"); + + pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO, + CONFIG_USBHOST_STACKSIZE, + (main_t)usbhost_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + + return -ENODEV; +} +#endif + +/*********************************************************************************** + * Name: stm32_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be provided be + * each platform that implements the STM32 OTG FS host interface + * + * "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump + * or, if 5 V are available on the application board, a basic power switch, must + * be added externally to drive the 5 V VBUS line. The external charge pump can + * be driven by any GPIO output. When the application decides to power on VBUS + * using the chosen GPIO, it must also set the port power bit in the host port + * control and status register (PPWR bit in OTG_FS_HPRT). + * + * "The application uses this field to control power to this port, and the core + * clears this bit on an overcurrent condition." + * + * Input Parameters: + * iface - For future growth to handle multiple USB host interface. Should be zero. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +void stm32_usbhost_vbusdrive(int iface, bool enable) +{ + DEBUGASSERT(iface == 0); + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, false); + } + else + { + /* Disable the Power Switch by driving the enable pin high */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, true); + } +} +#endif + +/************************************************************************************ + * Name: stm32_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent condition is + * detected. + * + * Input Parameter: + * handler - New overcurrent interrupt handler + * + * Returned value: + * Old overcurrent interrupt handler + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +xcpt_t stm32_setup_overcurrent(xcpt_t handler) +{ + return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler); +} +#endif + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} +#endif + +#endif /* CONFIG_STM32_OTGFS */ + diff --git a/configs/stm3220g-eval/src/stm32_userleds.c b/configs/stm3220g-eval/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..182e3b17529d08b4c8e16ade0ec1885d91b9cf2b --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_userleds.c @@ -0,0 +1,124 @@ +/**************************************************************************** + * configs/stm3220g_eval/src/stm32_leds.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "stm3220g-eval.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* This array maps an LED number to GPIO pin configuration */ + +static uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4 +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + stm32_gpiowrite(g_ledcfg[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0); + stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0); + stm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) == 0); + stm32_gpiowrite(GPIO_LED4, (ledset & BOARD_LED4_BIT) == 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/stm3220g-eval/src/stm32_watchdog.c b/configs/stm3220g-eval/src/stm32_watchdog.c new file mode 100644 index 0000000000000000000000000000000000000000..a00a4b91a54f63da42c632a968a9142b88f5b3e6 --- /dev/null +++ b/configs/stm3220g-eval/src/stm32_watchdog.c @@ -0,0 +1,135 @@ +/************************************************************************************ + * configs/stm3220g-eval/src/stm32_watchdog.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Wathdog hardware should be enabled */ + +#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG) +# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_STM32_WDG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0" +# endif +#endif + +/* Use the un-calibrated LSI frequency if we have nothing better */ + +#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ) +# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecuture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ + /* Initialize tha register the watchdog timer device */ + +#if defined(CONFIG_STM32_WWDG) + stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH); + return OK; +#elif defined(CONFIG_STM32_IWDG) + stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ); + return OK; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/stm3220g-eval/telnetd/Make.defs b/configs/stm3220g-eval/telnetd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..34b07b3accab6ff73da81e19fc9f0c0b22da7db7 --- /dev/null +++ b/configs/stm3220g-eval/telnetd/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3220g-eval/telnetd/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3220g-eval/telnetd/defconfig b/configs/stm3220g-eval/telnetd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..813c57655daa86f269953d0d698b4e637fadc0ec --- /dev/null +++ b/configs/stm3220g-eval/telnetd/defconfig @@ -0,0 +1,1176 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +CONFIG_ARCH_CHIP_STM32F207IG=y +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +CONFIG_STM32_STM32F20XX=y +# CONFIG_STM32_STM32F205 is not set +CONFIG_STM32_STM32F207=y +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=10926 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3220G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3220g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="telnetd_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +CONFIG_EXAMPLES_TELNETD=y +CONFIG_EXAMPLES_TELNETD_NOMAC=y +CONFIG_EXAMPLES_TELNETD_IPADDR=0x0a000002 +CONFIG_EXAMPLES_TELNETD_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_TELNETD_NETMASK=0xffffff00 +CONFIG_EXAMPLES_TELNETD_DAEMONPRIO=128 +CONFIG_EXAMPLES_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_EXAMPLES_TELNETD_CLIENTPRIO=128 +CONFIG_EXAMPLES_TELNETD_CLIENTSTACKSIZE=2048 +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3220g-eval/telnetd/setenv.sh b/configs/stm3220g-eval/telnetd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..d96f6fa63fd396d1b398195e2639a8e5a105afe2 --- /dev/null +++ b/configs/stm3220g-eval/telnetd/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/stm3220g-eval/telnetd/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3220g-eval/tools/olimex-arm-usb-ocd.cfg b/configs/stm3220g-eval/tools/olimex-arm-usb-ocd.cfg new file mode 100644 index 0000000000000000000000000000000000000000..9752dd418742000e2b9a7d5bd10761d5c2f0ccf5 --- /dev/null +++ b/configs/stm3220g-eval/tools/olimex-arm-usb-ocd.cfg @@ -0,0 +1,13 @@ +# +# Olimex ARM-USB-OCD +# +# http://www.olimex.com/dev/arm-usb-ocd.html +# + +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG" +ft2232_layout olimex-jtag +ft2232_vid_pid 0x15ba 0x0003 + +#jtag_khz 600 + diff --git a/configs/stm3220g-eval/tools/oocd.sh b/configs/stm3220g-eval/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..d2cd6ae274a106e4b85d806dfe67f76ee9d2e63b --- /dev/null +++ b/configs/stm3220g-eval/tools/oocd.sh @@ -0,0 +1,90 @@ +#!/bin/sh + +# Get command line parameters + +USAGE="USAGE: $0 [-dh] " +ADVICE="Try '$0 -h' for more information" + + +while [ ! -z "$1" ]; do + case $1 in + -d ) + set -x + ;; + -h ) + echo "$0 is a tool for generation of proper version files for the NuttX build" + echo "" + echo $USAGE + echo "" + echo "Where:" + echo " -d" + echo " Enable script debug" + echo " -h" + echo " show this help message and exit" + echo " Use the OpenOCD 0.4.0" + echo " " + echo " The full path to the top-level NuttX directory" + exit 0 + ;; + * ) + break; + ;; + esac + shift +done + +TOPDIR=$1 +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + echo $ADVICE + exit 1 +fi + +# This script *probably* only works with the following versions of OpenOCD: + +# Local search directory and configurations + +OPENOCD_SEARCHDIR="${TOPDIR}/configs/stm3210e-eval/tools" +OPENOCD_WSEARCHDIR="`cygpath -w ${OPENOCD_SEARCHDIR}`" + +OPENOCD_PATH="/cygdrive/c/Program Files (x86)/OpenOCD/0.4.0/bin" +OPENOCD_EXE=openocd.exe +OPENOCD_INTERFACE="olimex-arm-usb-ocd.cfg" + + +OPENOCD_TARGET="stm32.cfg" +OPENOCD_ARGS="-s ${OPENOCD_WSEARCHDIR} -f ${OPENOCD_INTERFACE} -f ${OPENOCD_TARGET}" + +echo "Trying OpenOCD 0.4.0 path: ${OPENOCD_PATH}/${OPENOCD_EXE}" + +# Verify that everything is what it claims it is and is located where it claims it is. + +if [ ! -x "${OPENOCD_PATH}/${OPENOCD_EXE}" ]; then + echo "OpenOCD executable does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f "${OPENOCD_SEARCHDIR}/${OPENOCD_TARGET}" ]; then + echo "OpenOCD target config file does not exist: ${OPENOCD_SEARCHDIR}/${OPENOCD_TARGET}" + exit 1 +fi +if [ ! -f "${OPENOCD_SEARCHDIR}/${OPENOCD_INTERFACE}" ]; then + echo "OpenOCD interface config file does not exist: ${OPENOCD_SEARCHDIR}/${OPENOCD_INTERFACE}" + exit 1 +fi + +# Enable debug if so requested + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +# Okay... do it! + +echo "Starting OpenOCD" +"${OPENOCD_PATH}/${OPENOCD_EXE}" ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" + diff --git a/configs/stm3220g-eval/tools/stm32.cfg b/configs/stm3220g-eval/tools/stm32.cfg new file mode 100644 index 0000000000000000000000000000000000000000..463a85cfd2ba9f8503007f96fbdd5248f957752a --- /dev/null +++ b/configs/stm3220g-eval/tools/stm32.cfg @@ -0,0 +1,69 @@ +# script for stm32 + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME stm32 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +# Work-area is a space in RAM used for flash programming +# By default use 16kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x4000 +} + +# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz +jtag_khz 1000 + +jtag_nsrst_delay 100 +jtag_ntrst_delay 100 + +#jtag scan chain +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + # See STM Document RM0008 + # Section 26.6.3 + set _CPUTAPID 0x3ba00477 +} +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +if { [info exists BSTAPID ] } { + # FIXME this never gets used to override defaults... + set _BSTAPID $BSTAPID +} else { + # See STM Document RM0008 + # Section 29.6.2 + # Low density devices, Rev A + set _BSTAPID1 0x06412041 + # Medium density devices, Rev A + set _BSTAPID2 0x06410041 + # Medium density devices, Rev B and Rev Z + set _BSTAPID3 0x16410041 + # High density devices, Rev A + set _BSTAPID4 0x06414041 + # Connectivity line devices, Rev A and Rev Z + set _BSTAPID5 0x06418041 +} +jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \ + -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \ + -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME + +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME + +# For more information about the configuration files, take a look at: +# openocd.texi diff --git a/configs/stm3220g-eval/tools/usb-driver.txt b/configs/stm3220g-eval/tools/usb-driver.txt new file mode 100644 index 0000000000000000000000000000000000000000..83d7598a5569e5b386da7281f201cfa2f6441ed7 --- /dev/null +++ b/configs/stm3220g-eval/tools/usb-driver.txt @@ -0,0 +1,25 @@ +https://www.olimex.com/dev/pdf/ARM/JTAG/Repair%20Procedure%20for%20OpenOcd-Rev.%20G%20drivers.pdf + +Repair procedure for ARM-USB-OCD drivers + +1. Uninstalling ARM-USB-OCD drivers +------------------------------------- +1.1. Connect your programmer/debugger to your computer, open Device Manager + and uninstall the drivers for ARM-USB-OCD. +1.2. After you have uninstalled ARM-USB-TINY driver from Device Manager, + disconnect the programmer from your computer. +1.3. Now you should download FTClean.exe from here: + http://www.ftdichip.com/Support/Utilities/FTClean.zip. +1.4. After download is complete extract the "*.zip" file, open folder FTClean, + and run FTClean.exe +1.5. Ror VID (Hex) select "Other". And after that fill the first box with 15ba + and "PID (Hex)" with 0004. +1.6. Press "Clean System" button. Make sure that all FTDI devices are + disconnected. (My require administrator privileges). + +2. Re-installing the ARM-USB-OCD driver +--------------------------------------- +2.1 Connect the programmer/debugger to the computer. +2.2 When prompted, browse to the C:\gccfd\DRIVERS\ARM-USB-OCD-DRIVER + directory and install. (A different driver is required for OpenOCD + 0.4.0. That driver is available from the olimex.com web site). diff --git a/configs/stm3240g-eval/Kconfig b/configs/stm3240g-eval/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..2316635c06a702f097dd77894fe948a3bfcd8a50 --- /dev/null +++ b/configs/stm3240g-eval/Kconfig @@ -0,0 +1,75 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_STM3240G_EVAL + +config STM3240G_LCD + bool "Support STM3240G-EVAL LCD" + default y + depends on LCD && STM32_FSMC + ---help--- + Enable support for the LCD on the STM3240G-EVAL board. See additional, + LCD-common settings in the drivers/lcd Kconfig file. + +if STM3240G_LCD + +config STM3240G_LCD_RDSHIFT + int "LCD data shift" + default 5 + ---help--- + When reading 16-bit gram data, there appears to be a shift in the returned + data. This value fixes the offset. Default 5. + +config STM3240G_ILI9320_DISABLE + bool "Disable LCD_ILI9320 (and LCD_ILI9321) support" + default n + ---help--- + The LCD driver dynamically selects the LCD based on the reported LCD + ID value. However, code size can be reduced by suppressing support for + individual LCDs using this option. + +config STM3240G_ILI9325_DISABLE + bool "Disable LCD_ILI9325 support" + default n + ---help--- + The LCD driver dynamically selects the LCD based on the reported LCD + ID value. However, code size can be reduced by suppressing support for + individual LCDs using this option + +endif # STM3240G_LCD + +if BOARD_INITIALIZE + +config STM3240G_BOARDINIT_PRIO + int "Board initialization thread priority" + default 196 + ---help--- + If BOARD_INITIALIZE initialize is defined, then the function + board_initialize() will be called to perform board-specific + initialization. board_initialize() runs on the IDLE thread. + Depending on the features that are enabled, this board + initialization logic may need to start a kernel thread that has + more capability than the IDLE thread. This setting then provides + the priority of the board initialization thread. + + NOTE: STM3240G_BOARDINIT_PRIO should have a relatively high + priority to assure that board level initialization completes + before the application requires the initialized board services. + Default: 196 + +config STM3240G_BOARDINIT_STACK + int "Board initialization thread Size" + default 2048 + ---help--- + If BOARD_INITIALIZE initialize is defined, then the function + board_initialize() will be called to perform board-specific + initialization. board_initialize() runs on the IDLE thread. + Depending on the features that are enabled, this board + initialization logic may need to start a kernel thread that has + more capability than the IDLE thread. This setting then provides + the size of the stack to use with the initialization kernel thread. + +endif # BOARD_INITIALIZE +endif # ARCH_BOARD_STM3240G_EVAL diff --git a/configs/stm3240g-eval/README.txt b/configs/stm3240g-eval/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..e6dfe3cf53bd26fe95e31cef83bc6b2fa89ba657 --- /dev/null +++ b/configs/stm3240g-eval/README.txt @@ -0,0 +1,1533 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +STMicro STM32140G-EVAL development board. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - STM3240G-EVAL-specific Configuration Options + - LEDs + - Ethernet + - PWM + - CAN + - FPU + - FSMC SRAM + - I/O Expanders + - STM3240G-EVAL-specific Configuration Options + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment because the Raisonance R-Link emulatator and some RIDE7 development tools + were used and those tools works only under Windows. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, or + 5. The NuttX buildroot Toolchain (see below). + + Most testing has been conducted using the CodeSourcery toolchain for Windows and + that is the default toolchain in most configurations (FPU-related testing has + been performed with the Atollic toolchain for windows. To use the Atollic, + devkitARM, Raisonance GNU, or NuttX buildroot toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcery (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include paths: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh stm3240g-eval/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +Ethernet +======== + +The Ethernet driver is configured to use the MII interface: + + Board Jumper Settings: + + Jumper Description + JP8 To enable MII, JP8 should not be fitted. + JP6 2-3: Enable MII interface mode + JP5 2-3: Provide 25 MHz clock for MII or 50 MHz clock for RMII by MCO at PA8 + SB1 Not used with MII + +LEDs +==== + +The STM3240G-EVAL board has four LEDs labeled LD1, LD2, LD3 and LD4 on the +board.. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/up_leds.c. The LEDs are used to encode OS-related\ +events as follows: + + SYMBOL Meaning LED1* LED2 LED3 LED4 + ------------------- ----------------------- ------- ------- ------- ------ + LED_STARTED NuttX has been started ON OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF + LED_IRQSENABLED Interrupts enabled ON ON OFF OFF + LED_STACKCREATED Idle stack created OFF OFF ON OFF + LED_INIRQ In an interrupt** ON N/C N/C OFF + LED_SIGNAL In a signal handler*** N/C ON N/C OFF + LED_ASSERTION An assertion failed ON ON N/C OFF + LED_PANIC The system has crashed N/C N/C N/C ON + LED_IDLE STM32 is is sleep mode (Optional, not used) + + * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot + and these LEDs will give you some indication of where the failure was + ** The normal state is LED3 ON and LED1 faintly glowing. This faint glow + is because of timer interrupts that result in the LED being illuminated + on a small proportion of the time. +*** LED2 may also flicker normally if signals are processed. + +PWM +=== + +The STM3240G-Eval has no real on-board PWM devices, but the board can be +configured to output a pulse train using timer output pins. The following +pins have been use to generate PWM output (see board.h for some other +candidates): + +TIM4 CH2. Pin PD13 is used by the FSMC (FSMC_A18) and is also connected +to the Motor Control Connector (CN5) just for this purpose. If FSMC is +not enabled, then FSMC_A18 will not be used (and will be tri-stated from +the LCD). + + CONFIGURATION: + + CONFIG_STM32_TIM4=y + CONFIG_PWM=n + CONFIG_PWM_PULSECOUNT=n + CONFIG_STM32_TIM4_PWM=y + CONFIG_STM32_TIM4_CHANNEL=2 + + ACCESS: + + Daughter board Extension Connector, CN3, pin 32 + Ground is available on CN3, pin1 + + NOTE: TIM4 hardware will not support pulse counting. + +TIM8 CH4: Pin PC9 is used by the microSD card (MicroSDCard_D1) and I2S +(I2S_CKIN) but can be completely disconnected from both by opening JP16. + + CONFIGURATION: + + CONFIG_STM32_TIM8=y + CONFIG_PWM=n + CONFIG_PWM_PULSECOUNT=y + CONFIG_STM32_TIM8_PWM=y + CONFIG_STM32_TIM8_CHANNEL=4 + + ACCESS: + + Daughterboard Extension Connector, CN3, pin 17 + Ground is available on CN3, pin1 + +CAN +=== + +Connector 10 (CN10) is DB-9 male connector that can be used with CAN1 or CAN2. + + JP10 connects CAN1_RX or CAN2_RX to the CAN transceiver + JP3 connects CAN1_TX or CAN2_TX to the CAN transceiver + +CAN signals are then available on CN10 pins: + + CN10 Pin 7 = CANH + CN10 Pin 2 = CANL + +Mapping to STM32 GPIO pins: + + PD0 = FSMC_D2 & CAN1_RX + PD1 = FSMC_D3 & CAN1_TX + PB13 = ULPI_D6 & CAN2_TX + PB5 = ULPI_D7 & CAN2_RX + +Configuration Options: + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + + CONFIG_STM32_CAN1 - Enable support for CAN1 + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_STM32_CAN2 - Enable support for CAN2 + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + +FPU +=== + +FPU Configuration Options +------------------------- + +There are two version of the FPU support built into the STM32 port. + +1. Lazy Floating Point Register Save. + + This is an untested implementation that saves and restores FPU registers + only on context switches. This means: (1) floating point registers are + not stored on each context switch and, hence, possibly better interrupt + performance. But, (2) since floating point registers are not saved, + you cannot use floating point operations within interrupt handlers. + + This logic can be enabled by simply adding the following to your .config + file: + + CONFIG_ARCH_FPU=y + +2. Non-Lazy Floating Point Register Save + + Mike Smith has contributed an extensive re-write of the ARMv7-M exception + handling logic. This includes verified support for the FPU. These changes + have not yet been incorporated into the mainline and are still considered + experimental. These FPU logic can be enabled with: + + CONFIG_ARCH_FPU=y + CONFIG_ARMV7M_CMNVECTOR=y + + You will probably also changes to the scripts/ld.script in if this option is selected. + This should work: + + -ENTRY(_stext) + +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ + +EXTERN(_vectors) /* Force the vectors to be included in the output */ + +CFLAGS +------ + +Only recent GCC toolchains have built-in support for the Cortex-M4 FPU. You will see +the following lines in each Make.defs file: + + ifeq ($(CONFIG_ARCH_FPU),y) + ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard + else + ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + endif + +Configuration Changes +--------------------- + +Below are all of the configuration changes that I had to make to configs/stm3240g-eval/nsh2 +in order to successfully build NuttX using the Atollic toolchain WITH FPU support: + + -CONFIG_ARCH_FPU=n : Enable FPU support + +CONFIG_ARCH_FPU=y + + -CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : Disable the CodeSourcery toolchain + +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n + + -CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=n : Enable the Atollic toolchain + +CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : + + -CONFIG_INTELHEX_BINARY=y : Suppress generation FLASH download formats + +CONFIG_INTELHEX_BINARY=n : (Only necessary with the "Lite" version) + + -CONFIG_HAVE_CXX=y : Suppress generation of C++ code + +CONFIG_HAVE_CXX=n : (Only necessary with the "Lite" version) + +See the section above on Toolchains, NOTE 2, for explanations for some of +the configuration settings. Some of the usual settings are just not supported +by the "Lite" version of the Atollic toolchain. + +FSMC SRAM +========= + +On-board SRAM +------------- + +A 16 Mbit SRAM is connected to the STM32F407IGH6 FSMC bus which shares the same +I/Os with the CAN1 bus. Jumper settings: + + JP1: Connect PE4 to SRAM as A20 + JP2: onnect PE3 to SRAM as A19 + +JP3 and JP10 must not be fitted for SRAM and LCD application. JP3 and JP10 +select CAN1 or CAN2 if fitted; neither if not fitted. + +The on-board SRAM can be configured by setting + + CONFIG_STM32_FSMC=y + CONFIG_STM32_FSMC_SRAM=y + CONFIG_HEAP2_BASE=0x64000000 + CONFIG_HEAP2_SIZE=2097152 + CONFIG_MM_REGIONS=2 (or =3, see below) + +Configuration Options +--------------------- +Internal SRAM is available in all members of the STM32 family. The F4 family +also contains internal CCM SRAM. This SRAM is different because it cannot +be used for DMA. So if DMA needed, then the following should be defined +to exclude CCM SRAM from the heap: + + CONFIG_STM32_CCMEXCLUDE : Exclude CCM SRAM from the HEAP + +In addition to internal SRAM, SRAM may also be available through the FSMC. +In order to use FSMC SRAM, the following additional things need to be +present in the NuttX configuration file: + + CONFIG_STM32_FSMC=y : Enables the FSMC + CONFIG_STM32_FSMC_SRAM=y : Indicates that SRAM is available via the + FSMC (as opposed to an LCD or FLASH). + CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC + address space + CONFIG_HEAP2_SIZE : The size of the SRAM in the FSMC + address space + CONFIG_MM_REGIONS : Must be set to a large enough value to + include the FSMC SRAM + +SRAM Configurations +------------------- +There are 4 possible SRAM configurations: + + Configuration 1. System SRAM (only) + CONFIG_MM_REGIONS == 1 + CONFIG_STM32_FSMC_SRAM NOT defined + CONFIG_STM32_CCMEXCLUDE defined + Configuration 2. System SRAM and CCM SRAM + CONFIG_MM_REGIONS == 2 + CONFIG_STM32_FSMC_SRAM NOT defined + CONFIG_STM32_CCMEXCLUDE NOT defined + Configuration 3. System SRAM and FSMC SRAM + CONFIG_MM_REGIONS == 2 + CONFIG_STM32_FSMC_SRAM defined + CONFIG_STM32_CCMEXCLUDE defined + Configuration 4. System SRAM, CCM SRAM, and FSMC SRAM + CONFIG_MM_REGIONS == 3 + CONFIG_STM32_FSMC_SRAM defined + CONFIG_STM32_CCMEXCLUDE NOT defined +I/O Expanders +============= + +The STM3240G-EVAL has two STMPE811QTR I/O expanders on board both connected to +the STM32 via I2C1. They share a common interrupt line: PI2. + +STMPE811 U24, I2C address 0x41 (7-bit) +------ ---- ---------------- -------------------------------------------- +STPE11 PIN BOARD SIGNAL BOARD CONNECTION +------ ---- ---------------- -------------------------------------------- + Y- TouchScreen_Y- LCD Connector XL + X- TouchScreen_X- LCD Connector XR + Y+ TouchScreen_Y+ LCD Connector XD + X+ TouchScreen_X+ LCD Connector XU + IN3 EXP_IO9 + IN2 EXP_IO10 + IN1 EXP_IO11 + IN0 EXP_IO12 + +STMPE811 U29, I2C address 0x44 (7-bit) +------ ---- ---------------- -------------------------------------------- +STPE11 PIN BOARD SIGNAL BOARD CONNECTION +------ ---- ---------------- -------------------------------------------- + Y- EXP_IO1 + X- EXP_IO2 + Y+ EXP_IO3 + X+ EXP_IO4 + IN3 EXP_IO5 + IN2 EXP_IO6 + IN1 EXP_IO7 + IN0 EXP_IO8 + +STM3240G-EVAL-specific Configuration Options +============================================ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32F407IG=y + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=stm3240g_eval (for the STM3240G-EVAL development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_STM3240G_EVAL=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP + + In addition to internal SRAM, SRAM may also be available through the FSMC. + In order to use FSMC SRAM, the following additional things need to be + present in the NuttX configuration file: + + CONFIG_STM32_FSMC_SRAM - Indicates that SRAM is available via the + FSMC (as opposed to an LCD or FLASH). + + CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space (hex) + + CONFIG_HEAP2_END - The size of the SRAM in the FSMC address space (decimal) + + CONFIG_ARCH_FPU - The STM3240xxx supports a floating point unit (FPU) + + CONFIG_ARCH_FPU=y + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibrate + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + AHB1 + ---- + CONFIG_STM32_CRC + CONFIG_STM32_BKPSRAM + CONFIG_STM32_CCMDATARAM + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + CONFIG_STM32_ETHMAC + CONFIG_STM32_OTGHS + + AHB2 + ---- + CONFIG_STM32_DCMI + CONFIG_STM32_CRYP + CONFIG_STM32_HASH + CONFIG_STM32_RNG + CONFIG_STM32_OTGFS + + AHB3 + ---- + CONFIG_STM32_FSMC + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_TIM12 + CONFIG_STM32_TIM13 + CONFIG_STM32_TIM14 + CONFIG_STM32_WWDG + CONFIG_STM32_IWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI3 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_I2C3 + CONFIG_STM32_CAN1 + CONFIG_STM32_CAN2 + CONFIG_STM32_DAC1 + CONFIG_STM32_DAC2 + CONFIG_STM32_PWR -- Required for RTC + + APB2 + ---- + CONFIG_STM32_TIM1 + CONFIG_STM32_TIM8 + CONFIG_STM32_USART1 + CONFIG_STM32_USART6 + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + CONFIG_STM32_ADC3 + CONFIG_STM32_SDIO + CONFIG_STM32_SPI1 + CONFIG_STM32_SYSCFG + CONFIG_STM32_TIM9 + CONFIG_STM32_TIM10 + CONFIG_STM32_TIM11 + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + JTAG Enable settings (by default JTAG-DP and SW-DP are disabled): + + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + + STM3240xxx specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + + CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO + and CONFIG_STM32_DMA2. + CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. + Default: Medium + CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: + 4-bit transfer mode. + + CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board + CONFIG_STM32_MII - Support Ethernet MII interface + CONFIG_STM32_MII_MCO1 - Use MCO1 to clock the MII interface + CONFIG_STM32_MII_MCO2 - Use MCO2 to clock the MII interface + CONFIG_STM32_RMII - Support Ethernet RMII interface + CONFIG_STM32_AUTONEG - Use PHY autonegotiation to determine speed and mode + CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this + may be defined to select full duplex mode. Default: half-duplex + CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this + may be defined to select 100 MBps speed. Default: 10 Mbps + CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is + defined. The PHY status register address may diff from PHY to PHY. This + configuration sets the address of the PHY status register. + CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides bit mask indicating 10 or 100MBps speed. + CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides the value of the speed bit(s) indicating 100MBps speed. + CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provide bit mask indicating full or half duplex modes. + CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is + defined. This provides the value of the mode bits indicating full duplex mode. + CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported + but some hooks are indicated with this condition. + + STM3240G-EVAL CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + + STM3240G-EVAL LCD Hardware Configuration + + The LCD driver supports the following LCDs on the STM324xG_EVAL board: + + AM-240320L8TNQW00H (LCD_ILI9320 or LCD_ILI9321) OR + AM-240320D5TOQW01H (LCD_ILI9325) + + Configuration options. + + CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape" + support. Default is this 320x240 "landscape" orientation + For the STM3240G-EVAL board, the edge opposite from the row of buttons + is used as the top of the display in this orientation. + CONFIG_LCD_RLANDSCAPE - Define for 320x240 display "reverse + landscape" support. Default is this 320x240 "landscape" + orientation + For the STM3240G-EVAL board, the edge next to the row of buttons + is used as the top of the display in this orientation. + CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait" + orientation support. In this orientation, the STM3210E-EVAL's + LCD ribbon cable is at the bottom of the display. Default is + 320x240 "landscape" orientation. + In this orientation, the top of the display is to the left + of the buttons (if the board is held so that the buttons are at the + botton of the board). + CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse + portrait" orientation support. In this orientation, the + STM3210E-EVAL's LCD ribbon cable is at the top of the display. + Default is 320x240 "landscape" orientation. + In this orientation, the top of the display is to the right + of the buttons (if the board is held so that the buttons are at the + botton of the board). + CONFIG_STM3240G_LCD_RDSHIFT - When reading 16-bit gram data, there appears + to be a shift in the returned data. This value fixes the offset. + Default 5. + + The LCD driver dynamically selects the LCD based on the reported LCD + ID value. However, code size can be reduced by suppressing support for + individual LCDs using: + + CONFIG_STM3240G_ILI9320_DISABLE (includes ILI9321) + CONFIG_STM3240G_ILI9325_DISABLE + + STM32 USB OTG FS Host Driver Support + + Pre-requisites + + CONFIG_USBHOST - Enable USB host support + CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block + CONFIG_STM32_SYSCFG - Needed + CONFIG_SCHED_WORKQUEUE - Worker thread support is required + + Options: + + CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. + Default 128 (512 bytes) + CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO + in 32-bit words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit + words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128 + CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever + want to do that? + CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access + debug. Depends on CONFIG_DEBUG. + CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB + packets. Depends on CONFIG_DEBUG. + +Configurations +============== + +Each STM3240G-EVAL configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh stm3240g-eval/ + cd - + . ./setenv.sh + +Where is one of the following: + + dhcpd: + ----- + + This builds the DCHP server using the apps/examples/dhcpd application + (for execution from FLASH.) See apps/examples/README.txt for information + about the dhcpd example. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. The server address is 10.0.0.1 and it serves IP addresses in the range + 10.0.0.2 through 10.0.0.17 (all of which, of course, are configurable). + + 3. Default build environment (also easily reconfigured): + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y + + discover: + -------- + This configuration exercises netutils/discover utility using + apps/exmaples/discover. This example initializes and starts the UDP + discover daemon. This daemon is useful for discovering devices in + local networks, especially with DHCP configured devices. It listens + for UDP broadcasts which also can include a device class so that + groups of devices can be discovered. It is also possible to address all + classes with a kind of broadcast discover. + + Configuration settings that you may need to change for your + environment: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y - CodeSourcery for Linux + CONFIG_EXAMPLES_DISCOVER_DHCPC=y - DHCP Client + CONFIG_EXAMPLES_DISCOVER_IPADDR - (not defined) + CONFIG_EXAMPLES_DISCOVER_DRIPADDR - Router IP address + + NOTE: This configuration uses to the kconfig-mconf configuration tool to + control the configuration. See the section entitled "NuttX Configuration + Tool" in the top-level README.txt file. + + knxwm: + ----- + [WARNING: This is a work in progress]. + + This is identical to the nxwm configuration below except that NuttX + is built as a kernel-mode, monolithic module and the user applications + are built separately. Is is recommended to use a special make command; + not just 'make' but make with the following two arguments: + + make pass1 pass2 + + In the normal case (just 'make'), make will attempt to build both user- + and kernel-mode blobs more or less interleaved. This actual works! + However, for me it is very confusing so I prefer the above make command: + Make the user-space binaries first (pass1), then make the kernel-space + binaries (pass2) + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. This is the default platform/toolchain in the configuration: + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX EABI buildroot toolchain + CONFIG_CXX_NEWLONG=y : size_t is long (maybe?) + + This is easily changed by modifying the configuration. + + NOTE: When I used a recent CodeSourcery toolchain, then toolchain + generated an illegal blx to an even address when calling into one + of the EABI math libraries. I don't know why this happened or if + the probably is repeatable with other CodeSourcery versions. You + can try for yourself setting: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_CXX_NEWLONG=n : size_t is unsigned int (maybe?) + + 3. In addition to the protected mode build, this NxWM configuration + differences from the nxwm configuration in that: + + a. Networking is disabled. There are issues with some of the network- + related NSH commands and with Telnet in the protected build (see the + top-level TODO file). Without these NSH commands, there is no use + for networking in this configuration. + + b. The NxTerm windows are disabled. There are also issues with the + NxTerm build now (see the top-level TODO file). + + c. The initialization sequence is quite different: NX and the + touchscreen are initialized in kernel mode by logic in this src/ + directory before the NxWM application is started. + + 4. At the end of the build, there will be several files in the top-level + NuttX build directory: + + PASS1: + nuttx_user.elf - The pass1 user-space ELF file + nuttx_user.hex - The pass1 Intel HEX format file (selected in defconfig) + User.map - Symbols in the user-space ELF file + + PASS2: + nuttx - The pass2 kernel-space ELF file + nuttx.hex - The pass2 Intel HEX file (selected in defconfig) + System.map - Symbols in the kernel-space ELF file + + 5. Combining .hex files. If you plan to use the STM32 ST-Link Utility to + load the .hex files into FLASH, then you need to combine the two hex + files into a single .hex file. Here is how you can do that. + + a. The 'tail' of the nuttx.hex file should look something like this + (with my comments added): + + $ tail nuttx.hex + # 00, data records + ... + :10 9DC0 00 01000000000800006400020100001F0004 + :10 9DD0 00 3B005A0078009700B500D400F300110151 + :08 9DE0 00 30014E016D0100008D + # 05, Start Linear Address Record + :04 0000 05 0800 0419 D2 + # 01, End Of File record + :00 0000 01 FF + + Use an editor such as vi to remove the 05 and 01 records. + + b. The 'head' of the nuttx_user.hex file should look something like + this (again with my comments added): + + $ head nuttx_user.hex + # 04, Extended Linear Address Record + :02 0000 04 0801 F1 + # 00, data records + :10 8000 00 BD89 01084C800108C8110208D01102087E + :10 8010 00 0010 00201C1000201C1000203C16002026 + :10 8020 00 4D80 01085D80010869800108ED83010829 + ... + + Nothing needs to be done here. The nuttx_user.hex file should + be fine. + + c. Combine the edited nuttx.hex and un-edited nuttx_user.hex + file to produce a single combined hex file: + + $ cat nuttx.hex nuttx_user.hex >combined.hex + + Then use the combined.hex file with the STM32 ST-Link tool. If + you do this a lot, you will probably want to invest a little time + to develop a tool to automate these steps. + + STATUS: + 2014-10-11: This worked at one time, but today I am getting a + failure inside of the GCC library. This occurred with the + computations at the end of touchscreen calibration. The + NuttX code seems to be working correctly, but there is some + problem with how the GCC integer math is hooked in??? I did + not dig into this very deeply. + + nettest: + ------- + + This configuration directory may be used to verify networking performance + using the STM32's Ethernet controller. It uses apps/examples/nettest to exercise the + TCP/IP network. + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_EXAMPLES_NETTEST_SERVER=n : Target is configured as the client + CONFIG_EXAMPLES_NETTEST_PERFORMANCE=y : Only network performance is verified. + CONFIG_EXAMPLES_NETTEST_IPADDR=(10<<24|0<<16|0<<8|2) : Target side is IP: 10.0.0.2 + CONFIG_EXAMPLES_NETTEST_DRIPADDR=(10<<24|0<<16|0<<8|1) : Host side is IP: 10.0.0.1 + CONFIG_EXAMPLES_NETTEST_CLIENTIP=(10<<24|0<<16|0<<8|1) : Server address used by which ever is client. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables both the serial and telnet NSH interfaces. + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_NSH_DHCPC=n : DHCP is disabled + CONFIG_NSH_IPADDR=(10<<24|0<<16|0<<8|2) : Target IP address 10.0.0.2 + CONFIG_NSH_DRIPADDR=(10<<24|0<<16|0<<8|1) : Host IP address 10.0.0.1 + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. This example assumes that a network is connected. During its + initialization, it will try to negotiate the link speed. If you have + no network connected when you reset the board, there will be a long + delay (maybe 30 seconds?) before anything happens. That is the timeout + before the networking finally gives up and decides that no network is + available. + + 3. This example supports the ADC test (apps/examples/adc) but this must + be manually enabled by selecting: + + CONFIG_ADC=y : Enable the generic ADC infrastructure + CONFIG_STM32_ADC3=y : Enable ADC3 + CONFIG_STM32_TIM1=y : Enable Timer 1 + CONFIG_STM32_TIM1_ADC=y : Indicate that timer 1 will be used to trigger an ADC + CONFIG_STM32_TIM1_ADC3=y : Assign timer 1 to drive ADC3 sampling + CONFIG_STM32_ADC3_SAMPLE_FREQUENCY=100 : Select a sampling frequency + + See also apps/examples/README.txt + + General debug for analog devices (ADC/DAC): + + CONFIG_DEBUG_ANALOG + + 4. This example supports the PWM test (apps/examples/pwm) but this must + be manually enabled by selecting eeither + + CONFIG_PWM=y : Enable the generic PWM infrastructure + CONFIG_PWM_PULSECOUNT=n : Disable to support for TIM1/8 pulse counts + CONFIG_STM32_TIM4=y : Enable TIM4 + CONFIG_STM32_TIM4_PWM=y : Use TIM4 to generate PWM output + CONFIG_STM32_TIM4_CHANNEL=2 : Select output on TIM4, channel 2 + + If CONFIG_STM32_FSMC is disabled, output will appear on CN3, pin 32. + Ground is available on CN3, pin1. + + Or.. + + CONFIG_PWM=y : Enable the generic PWM infrastructure + CONFIG_PWM_PULSECOUNT=y : Enable to support for TIM1/8 pulse counts + CONFIG_STM32_TIM8=y : Enable TIM8 + CONFIG_STM32_TIM8_PWM=y : Use TIM8 to generate PWM output + CONFIG_STM32_TIM8_CHANNEL=4 : Select output on TIM8, channel 4 + + If CONFIG_STM32_FSMC is disabled, output will appear on CN3, pin 17 + Ground is available on CN23 pin1. + + See also include/board.h and apps/examples/README.txt + + Special PWM-only debug options: + + CONFIG_DEBUG_PWM + + 5. This example supports the CAN loopback test (apps/examples/can) but this + must be manually enabled by selecting: + + CONFIG_CAN=y : Enable the generic CAN infrastructure + CONFIG_CAN_EXTID=y or n : Enable to support extended ID frames + CONFIG_STM32_CAN1=y : Enable CAN1 + CONFIG_CAN_LOOPBACK=y : Enable CAN loopback mode + + See also apps/examples/README.txt + + Special CAN-only debug options: + + CONFIG_DEBUG_CAN + CONFIG_CAN_REGDEBUG + + 6. This example can support an FTP client. In order to build in FTP client + support simply uncomment the following lines in the defconfig file (before + configuring) or in the .config file (after configuring): + + CONFIG_NETUTILS_FTPC=y + CONFIG_EXAMPLES_FTPC=y + + 7. This example can support an FTP server. In order to build in FTP server + support simply add the following lines in the defconfig file (before + configuring) or in the .config file (after configuring): + + CONFIG_NETUTILS_FTPD=y + CONFIG_EXAMPLES_FTPD=y + + And enable poll() support in the NuttX configuration file: + + CONFIG_DISABLE_POLL=n + + 8. This example supports the watchdog timer test (apps/examples/watchdog) + but this must be manually enabled by selecting: + + CONFIG_WATCHDOG=y : Enables watchdog timer driver support + CONFIG_STM32_WWDG=y : Enables the WWDG timer facility, OR + CONFIG_STM32_IWDG=y : Enables the IWDG timer facility (but not both) + + The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result, + has a maximum timeout value of 49 milliseconds. For WWDG watchdog, you + should also add the fillowing to the configuration file: + + CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20 + CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49 + + The IWDG timer has a range of about 35 seconds and should not be an issue. + + 9. Adding LCD and graphics support: + + defconfig (nuttx/.config): + + CONFIG_EXAMPLES_nx=y : Pick one or more + CONFIG_EXAMPLES_nxhello=y : + CONFIG_EXAMPLES_nximage : + CONFIG_EXAMPLES_nxlines : + + CONFIG_STM32_FSMC=y : FSMC support is required for the LCD + CONFIG_NX=y : Enable graphics suppport + CONFIG_MM_REGIONS=3 : When FSMC is enabled, so is the on-board SRAM memory region + + 10. USB OTG FS Device or Host Support + + CONFIG_USBDEV : Enable USB device support, OR + CONFIG_USBHOST : Enable USB host support + CONFIG_STM32_OTGFS : Enable the STM32 USB OTG FS block + CONFIG_STM32_SYSCFG : Needed + CONFIG_SCHED_WORKQUEUE : Worker thread support is required + + 11. USB OTG FS Host Support. The following changes will enable support for + a USB host on the STM32F4Discovery, including support for a mass storage + class driver: + + CONFIG_USBDEV=n : Make sure tht USB device support is disabled + CONFIG_USBHOST=y : Enable USB host support + CONFIG_STM32_OTGFS=y : Enable the STM32 USB OTG FS block + CONFIG_STM32_SYSCFG=y : Needed for all USB OTF FS support + CONFIG_SCHED_WORKQUEUE=y : Worker thread support is required for the mass + storage class driver. + CONFIG_NSH_ARCHINIT=y : Architecture specific USB initialization + is needed for NSH + CONFIG_FS_FAT=y : Needed by the USB host mass storage class. + + With those changes, you can use NSH with a FLASH pen driver as shown + belong. Here NSH is started with nothing in the USB host slot: + + NuttShell (NSH) NuttX-x.yy + nsh> ls /dev + /dev: + console + null + ttyS0 + + After inserting the FLASH drive, the /dev/sda appears and can be + mounted like this: + + nsh> ls /dev + /dev: + console + null + sda + ttyS0 + nsh> mount -t vfat /dev/sda /mnt/stuff + nsh> ls /mnt/stuff + /mnt/stuff: + -rw-rw-rw- 16236 filea.c + + And files on the FLASH can be manipulated to standard interfaces: + + nsh> echo "This is a test" >/mnt/stuff/atest.txt + nsh> ls /mnt/stuff + /mnt/stuff: + -rw-rw-rw- 16236 filea.c + -rw-rw-rw- 16 atest.txt + nsh> cat /mnt/stuff/atest.txt + This is a test + nsh> cp /mnt/stuff/filea.c fileb.c + nsh> ls /mnt/stuff + /mnt/stuff: + -rw-rw-rw- 16236 filea.c + -rw-rw-rw- 16 atest.txt + -rw-rw-rw- 16236 fileb.c + + To prevent data loss, don't forget to un-mount the FLASH drive + before removing it: + + nsh> umount /mnt/stuff + + 12. By default, this configuration supports /dev/random using the STM32's + RNG hardware. This can be disabled as follows: + + -CONFIG_STM32_RNG=y + +CONFIG_STM32_RNG=n + + -CONFIG_DEV_RANDOM=y + +CONFIG_DEV_RANDOM=n + + 13. This configuration requires that jumper JP22 be set to enable RS-232 + operation. + + nsh2: + ----- + + This is an alternative NSH configuration. One limitation of the STM3240G-EVAL + board is that you cannot have both a UART-based NSH console and SDIO support. + The nsh2 differs from the nsh configuration in the following ways: + + -CONFIG_STM32_USART3=y : USART3 is disabled + +CONFIG_STM32_USART3=n + + -CONFIG_STM32_SDIO=n : SDIO is enabled + +CONFIG_STM32_SDIO=y + + Logically, these are the only differences: This configuration has SDIO (and + the SD card) enabled and the serial console disabled. There is ONLY a + Telnet console!. + + There are some special settings to make life with only a Telnet + + CONFIG_SYSLOG=y - Enables the System Logging feature. + CONFIG_RAMLOG=y - Enable the RAM-based logging feature. + CONFIG_RAMLOG_CONSOLE=y - Use the RAM logger as the default console. + This means that any console output from non-Telnet threads will + go into the circular buffer in RAM. + CONFIG_RAMLOG_SYSLOG - This enables the RAM-based logger as the + system logger. This means that (1) in addition to the console + output from other tasks, ALL of the debug output will also to + to the circular buffer in RAM, and (2) NSH will now support a + command called 'dmesg' that can be used to dump the RAM log. + + There are a few other configuration differences as necessary to support + this different device configuration. Just the do the 'diff' if you are + curious. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. See the notes for the nsh configuration. Most also apply to the nsh2 + configuration. Like the nsh configuration, this configuration can + be modified to support a variety of additional tests. + + 3. RS-232 is disabled, but Telnet is still available for use as a console. + Since RS-232 and SDIO use the same pins (one controlled by JP22), RS232 + and SDIO cannot be used concurrently. + + 4. This configuration requires that jumper JP22 be set to enable SDIO + operation. To enable MicroSD Card, which shares same I/Os with RS-232, + JP22 is not fitted. + + 5. In order to use SDIO without overruns, DMA must be used. The STM32 F4 + has 192Kb of SRAM in two banks: 112Kb of "system" SRAM located at + 0x2000:0000 and 64Kb of "CCM" SRAM located at 0x1000:0000. It appears + that you cannot perform DMA from CCM SRAM. The work around that I have now + is simply to omit the 64Kb of CCM SRAM from the heap so that all memory is + allocated from System SRAM. This is done by setting: + + CONFIG_MM_REGIONS=1 + + Then DMA works fine. The downside is, of course, is that we lose 64Kb + of precious SRAM. + + 6. Another SDIO/DMA issue. This one is probably a software bug. This is + the bug as stated in the TODO list: + + "If you use a large I/O buffer to access the file system, then the + MMCSD driver will perform multiple block SD transfers. With DMA + ON, this seems to result in CRC errors detected by the hardware + during the transfer. Workaround: CONFIG_MMCSD_MULTIBLOCK_DISABLE=y" + + For this reason, CONFIG_MMCSD_MULTIBLOCK_DISABLE=y appears in the defconfig + file. + + 7. Another DMA-related concern. I see this statement in the reference + manual: "The burst configuration has to be selected in order to respect + the AHB protocol, where bursts must not cross the 1 KB address boundary + because the minimum address space that can be allocated to a single slave + is 1 KB. This means that the 1 KB address boundary should not be crossed + by a burst block transfer, otherwise an AHB error would be generated, + that is not reported by the DMA registers." + + There is nothing in the DMA driver to prevent this now. + + nxterm: + ---------- + This is yet another NSH configuration. This NSH configuration differs + from the others, however, in that it uses the NxTerm driver to host + the NSH shell. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Some of the differences in this configuration and the normal nsh + configuration include these settings in the defconfig file: + + These select NX Multi-User mode: + + CONFG_NX_MULTIUSER=y + CONFIG_DISABLE_MQUEUE=n + + The following definition in the defconfig file to enables the NxTerm + driver: + + CONFIG_NXTERM=y + + And this selects examples/nxterm instead of examples/nsh: + + CONFIG_EXAMPLES_NXTERM=y + + LCD Orientation: + + CONFIG_LCD_LANDSCAPE=y : 320x240 landscape + + 3. Default build environment (also easily reconfigured): + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_CYGWIN=y : With Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + + nxwm + ---- + This is a special configuration setup for the NxWM window manager + UnitTest. The NxWM window manager can be found here: + + nuttx-code/NxWidgets/nxwm + + The NxWM unit test can be found at: + + nuttx-code/NxWidgets/UnitTests/nxwm + + Documentation for installing the NxWM unit test can be found here: + + nuttx-code/NxWidgets/UnitTests/README.txt + + Here is the quick summary of the build steps (Assuming that all of + the required packages are available in a directory ~/nuttx-code): + + 1. Install the nxwm configuration + + $ cd ~/nuttx-code/nuttx/tools + $ ./configure.sh stm3240g-eval/nxwm + + 2. Make the build context (only) + + $ cd .. + $ . ./setenv.sh + $ make context + ... + + 3. Install the nxwm unit test + + $ cd ~/nuttx-code/NxWidgets + $ tools/install.sh ~/nuttx-code/apps nxwm + Creating symbolic link + - To ~/nuttx-code/NxWidgets/UnitTests/nxwm + - At ~/nuttx-code/apps/external + + 4. Build the NxWidgets library + + $ cd ~/nuttx-code/NxWidgets/libnxwidgets + $ make TOPDIR=~/nuttx-code/nuttx + ... + + 5. Build the NxWM library + + $ cd ~/nuttx-code/NxWidgets/nxwm + $ make TOPDIR=~/nuttx-code/nuttx + ... + + 6. Built NuttX with the installed unit test as the application + + $ cd ~/nuttx-code/nuttx + $ make + + telnetd: + -------- + + A simple test of the Telnet daemon(see apps/netutils/README.txt, + apps/examples/README.txt, and apps/examples/telnetd). This is + the same daemon that is used in the nsh configuration so if you + use NSH, then you don't care about this. This test is good for + testing the Telnet daemon only because it works in a simpler + environment than does the nsh configuration. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default build environment (easily reconfigured): + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y + + xmlrpc + ------ + + An example configuration for the Embeddable Lightweight XML-RPC + Server at apps/examples/xmlrpc. See http://www.drdobbs.com/web-development/\ + an-embeddable-lightweight-xml-rpc-server/184405364 for more info. + Contributed by Max Holtzberg. diff --git a/configs/stm3240g-eval/dhcpd/Make.defs b/configs/stm3240g-eval/dhcpd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..df5aa899ba15eadfd2cffdd1e5d063ef994ee4bb --- /dev/null +++ b/configs/stm3240g-eval/dhcpd/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3240g-eval/dhcpd/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3240g-eval/dhcpd/defconfig b/configs/stm3240g-eval/dhcpd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..dc62ffb0f30ee1de2a9dd57bae8b2f9bc9b0a5e3 --- /dev/null +++ b/configs/stm3240g-eval/dhcpd/defconfig @@ -0,0 +1,1191 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +CONFIG_ARCH_CHIP_STM32F407IG=y +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3240G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3240g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=13 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="dhcpd_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +# CONFIG_NET_TCP is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=8 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +# CONFIG_STDIO_LINEBUFFER is not set +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_DNSCLIENT is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +CONFIG_EXAMPLES_DHCPD=y +CONFIG_EXAMPLES_DHCPD_NOMAC=y +CONFIG_EXAMPLES_DHCPD_IPADDR=0x0a000001 +CONFIG_EXAMPLES_DHCPD_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +CONFIG_NETUTILS_DHCPD=y +# CONFIG_NETUTILS_DHCPD_IGNOREBROADCAST is not set +CONFIG_NETUTILS_DHCPD_INTERFACE="eth0" +CONFIG_NETUTILS_DHCPD_LEASETIME=864000 +CONFIG_NETUTILS_DHCPD_MINLEASETIME=86400 +CONFIG_NETUTILS_DHCPD_MAXLEASETIME=2592000 +CONFIG_NETUTILS_DHCPD_MAXLEASES=6 +CONFIG_NETUTILS_DHCPD_STARTIP=0x0a000002 +CONFIG_NETUTILS_DHCPD_ROUTERIP=0x0a000001 +CONFIG_NETUTILS_DHCPD_NETMASK=0xffffff00 +CONFIG_NETUTILS_DHCPD_DNSIP=0x08080808 +CONFIG_NETUTILS_DHCPD_OFFERTIME=3600 +CONFIG_NETUTILS_DHCPD_DECLINETIME=3600 +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/dhcpd/setenv.sh b/configs/stm3240g-eval/dhcpd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ebf0963f1f694fdd222663ddfb2ed463ff00cee0 --- /dev/null +++ b/configs/stm3240g-eval/dhcpd/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm3240g-eval/dhcpd/setenv.sh +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3240g-eval/discover/Make.defs b/configs/stm3240g-eval/discover/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..7265cae8abb32d505f3476f281f2a3f17b5630e5 --- /dev/null +++ b/configs/stm3240g-eval/discover/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3240g-eval/discover/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3240g-eval/discover/defconfig b/configs/stm3240g-eval/discover/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c6758e8b190774e5fc6b1ab47848653184ecd29e --- /dev/null +++ b/configs/stm3240g-eval/discover/defconfig @@ -0,0 +1,1258 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +CONFIG_ARCH_CHIP_STM32F407IG=y +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# I2C Configuration +# +# CONFIG_STM32_I2C_ALT is not set +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3240G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3240g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="discover_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_POLLED=y +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=650 +CONFIG_NET_ETH_TCP_RECVWNDO=624 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +CONFIG_NET_ARP_IPIN=y +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +# CONFIG_NETDB_DNSSERVER_NOADDR is not set +CONFIG_NETDB_DNSSERVER_IPv4=y +CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001 + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +CONFIG_EXAMPLES_DISCOVER=y +CONFIG_EXAMPLES_DISCOVER_DHCPC=y +CONFIG_EXAMPLES_DISCOVER_NOMAC=y +CONFIG_EXAMPLES_DISCOVER_DRIPADDR=0xc0a80201 +CONFIG_EXAMPLES_DISCOVER_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +CONFIG_NETUTILS_DHCPC=y +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +CONFIG_NETUTILS_DISCOVER=y +CONFIG_DISCOVER_STACK_SIZE=1024 +CONFIG_DISCOVER_PRIORITY=50 +CONFIG_DISCOVER_PORT=96 +CONFIG_DISCOVER_INTERFACE="eth0" +CONFIG_DISCOVER_DEVICE_CLASS=0xff +CONFIG_DISCOVER_DESCR="STM3240G-EVAL" +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/discover/setenv.sh b/configs/stm3240g-eval/discover/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..71bb2e32c1577b8edf3bac998e55255398c8a6df --- /dev/null +++ b/configs/stm3240g-eval/discover/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm3240g-eval/discover/setenv.sh +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3240g-eval/include/board.h b/configs/stm3240g-eval/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..d693bdacf652c155c6789c2c79939072610c945b --- /dev/null +++ b/configs/stm3240g-eval/include/board.h @@ -0,0 +1,509 @@ +/************************************************************************************ + * configs/stm3240g-eval/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* Four clock sources are available on STM3240G-EVAL evaluation board for + * STM32F407IGH6 and RTC embedded: + * + * X1, 25 MHz crystal for Ethernet PHY with socket. It can be removed when clock is + * provided by MCO pin of the MCU + * X2, 26 MHz crystal for USB OTG HS PHY + * X3, 32 kHz crystal for embedded RTC + * X4, 25 MHz crystal with socket for STM32F407IGH6 microcontroller (It can be removed + * from socket when internal RC clock is used.) + * + * This is the "standard" configuration as set up by arch/arm/src/stm32f40xx_rcc.c: + * System Clock source : PLL (HSE) + * SYSCLK(Hz) : 168000000 Determined by PLL configuration + * HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE) + * AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE) + * APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1) + * APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2) + * HSE Frequency(Hz) : 25000000 (STM32_BOARD_XTAL) + * PLLM : 25 (STM32_PLLCFG_PLLM) + * PLLN : 336 (STM32_PLLCFG_PLLN) + * PLLP : 2 (STM32_PLLCFG_PLLP) + * PLLQ : 7 (STM32_PLLCFG_PLLQ) + * Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK + * Flash Latency(WS) : 5 + * Prefetch Buffer : OFF + * Instruction cache : ON + * Data cache : ON + * Require 48MHz for USB OTG FS, : Enabled + * SDIO and RNG clock + */ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC + * HSE - On-board crystal frequency is 25MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 25000000ul + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* Main PLL Configuration. + * + * PLL source is HSE + * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN + * = (25,000,000 / 25) * 336 + * = 336,000,000 + * SYSCLK = PLL_VCO / PLLP + * = 336,000,000 / 2 = 168,000,000 + * USB OTG FS, SDIO and RNG Clock + * = PLL_VCO / PLLQ + * = 48,000,000 + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7) + +#define STM32_SYSCLK_FREQUENCY 168000000ul + +/* AHB clock (HCLK) is SYSCLK (168MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) + +/* Timers driven from APB1 will be twice PCLK1 */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 */ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY + +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz + */ + +#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* Ethernet *************************************************************************/ +/* We need to provide clocking to the MII PHY via MCO1 (PA8) */ + +#if defined(CONFIG_NET) && defined(CONFIG_STM32_ETHMAC) + +# if !defined(CONFIG_STM32_MII) +# warning "CONFIG_STM32_MII required for Ethernet" +# elif !defined(CONFIG_STM32_MII_MCO1) +# warning "CONFIG_STM32_MII_MCO1 required for Ethernet MII" +# else + + /* Output HSE clock (25MHz) on MCO1 pin (PA8) to clock the PHY */ + +# define BOARD_CFGR_MC01_SOURCE RCC_CFGR_MCO1_HSE +# define BOARD_CFGR_MC01_DIVIDER RCC_CFGR_MCO1PRE_NONE + +# endif +#endif + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_LED3 2 +#define BOARD_LED4 3 +#define BOARD_NLEDS 4 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) +#define BOARD_LED4_BIT (1 << BOARD_LED4) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the + * STM3240G-EVAL. The following definitions describe how NuttX controls the LEDs: + */ + +#define LED_STARTED 0 /* LED1 */ +#define LED_HEAPALLOCATE 1 /* LED2 */ +#define LED_IRQSENABLED 2 /* LED1 + LED2 */ +#define LED_STACKCREATED 3 /* LED3 */ +#define LED_INIRQ 4 /* LED1 + LED3 */ +#define LED_SIGNAL 5 /* LED2 + LED3 */ +#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */ +#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */ + +/* Button definitions ***************************************************************/ +/* The STM3240G-EVAL supports three buttons: */ + +#define BUTTON_WAKEUP 0 +#define BUTTON_TAMPER 1 +#define BUTTON_USER 2 + +#define NUM_BUTTONS 3 + +#define BUTTON_WAKEUP_BIT (1 << BUTTON_WAKEUP) +#define BUTTON_TAMPER_BIT (1 << BUTTON_TAMPER) +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* SRAM definitions *****************************************************************/ +/* The 16 Mbit SRAM is connected to the STM32F407IGH6 FSMC bus which shares the same + * I/Os with the CAN1 bus. Jumper settings: + * + * JP1: Connect PE4 to SRAM as A20 + * JP2: onnect PE3 to SRAM as A19 + * + * JP3 and JP10 must not be fitted for SRAM and LCD application. JP3 and JP10 + * select CAN1 or CAN2 if fitted; neither if not fitted. + */ + +#if defined(CONFIG_STM32_FSMC) && defined(CONFIG_STM32_FSMC_SRAM) +# if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2) +# error "The STM3240G-EVAL cannot support both CAN and FSMC SRAM" +# endif +#endif + +/* This is the Bank1 SRAM2 address: */ + +#define BOARD_SRAM_BASE 0x64000000 +#define BOARD_SRAM_SIZE (2*1024*1024) + +/* Alternate function pin selections ************************************************/ + +/* UART3: + * + * - PC11 is MicroSDCard_D3 & RS232/IrDA_RX (JP22 open) + * - PC10 is MicroSDCard_D2 & RSS232/IrDA_TX + */ + +#define GPIO_USART3_RX GPIO_USART3_RX_2 +#define GPIO_USART3_TX GPIO_USART3_TX_2 + +/* Ethernet: + * + * - PA2 is ETH_MDIO + * - PC1 is ETH_MDC + * - PB5 is ETH_PPS_OUT + * - PH2 is ETH_MII_CRS + * - PH3 is ETH_MII_COL + * - PI10 is ETH_MII_RX_ER + * - PH6 is ETH_MII_RXD2 + * - PH7 is ETH_MII_RXD3 + * - PC3 is ETH_MII_TX_CLK + * - PC2 is ETH_MII_TXD2 + * - PB8 is ETH_MII_TXD3 + * - PA1 is ETH_MII_RX_CLK/ETH_RMII_REF_CLK + * - PA7 is ETH_MII_RX_DV/ETH_RMII_CRS_DV + * - PC4 is ETH_MII_RXD0/ETH_RMII_RXD0 + * - PC5 is ETH_MII_RXD1/ETH_RMII_RXD1 + * - PG11 is ETH_MII_TX_EN/ETH_RMII_TX_EN + * - PG13 is ETH_MII_TXD0/ETH_RMII_TXD0 + * - PG14 is ETH_MII_TXD1/ETH_RMII_TXD1 + */ + +#define GPIO_ETH_PPS_OUT GPIO_ETH_PPS_OUT_1 +#define GPIO_ETH_MII_CRS GPIO_ETH_MII_CRS_2 +#define GPIO_ETH_MII_COL GPIO_ETH_MII_COL_2 +#define GPIO_ETH_MII_RX_ER GPIO_ETH_MII_RX_ER_2 +#define GPIO_ETH_MII_RXD2 GPIO_ETH_MII_RXD2_2 +#define GPIO_ETH_MII_RXD3 GPIO_ETH_MII_RXD3_2 +#define GPIO_ETH_MII_TXD3 GPIO_ETH_MII_TXD3_1 +#define GPIO_ETH_MII_TX_EN GPIO_ETH_MII_TX_EN_2 +#define GPIO_ETH_MII_TXD0 GPIO_ETH_MII_TXD0_2 +#define GPIO_ETH_MII_TXD1 GPIO_ETH_MII_TXD1_2 +#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2 +#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 +#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2 + +/* PWM + * + * The STM3240G-Eval has no real on-board PWM devices, but the board can be + * configured to output a pulse train using the following: + * + * If FSMC is not used: + * TIM4 CH2OUT: PD13 FSMC_A18 / MC_TIM4_CH2OUT + * Daughterboard Extension Connector, CN3, pin 32 + * Motor Control Connector CN15, pin 33 -- not available unless you bridge SB14. + * + * TIM1 CH1OUT: PE9 FSMC_D6 + * Daughterboard Extension Connector, CN2, pin 24 + * + * TIM1_CH2OUT: PE11 FSMC_D8 + * Daughterboard Extension Connector, CN2, pin 26 + * + * TIM1_CH3OUT: PE13 FSMC_D10 + * Daughterboard Extension Connector, CN2, pin 28 + * + * TIM1_CH4OUT: PE14 FSMC_D11 + * Daughterboard Extension Connector, CN2, pin 29 + * + * If OTG FS is not used + * + * TIM1_CH3OUT: PA10 OTG_FS_ID + * Daughterboard Extension Connector, CN3, pin 14 + * + * TIM1_CH4OUT: PA11 OTG_FS_DM + * Daughterboard Extension Connector, CN3, pin 11 + * + * If DMCI is not used + * + * TIM8 CH1OUT: PI5 DCMI_VSYNC & MC + * Daughterboard Extension Connector, CN4, pin 4 + * + * TIM8_CH2OUT: PI6 DCMI_D6 & MC + * Daughterboard Extension Connector, CN4, pin 3 + * + * TIM8_CH3OUT: PI7 DCMI_D7 & MC + * Daughterboard Extension Connector, CN4, pin 2 + * + * If SDIO is not used + * + * TIM8_CH3OUT: PC8 MicroSDCard_D0 & MC + * Daughterboard Extension Connector, CN3, pin 18 + * + * TIM8_CH4OUT: PC9 MicroSDCard_D1 & I2S_CKIN (Need JP16 open) + * Daughterboard Extension Connector, CN3, pin 17 + * + * Others + * + * TIM8 CH1OUT: PC6 I2S_MCK & Smartcard_IO (JP21 open) + */ + +#if !defined(CONFIG_STM32_FSMC) +# define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2 +# define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2 +# define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_2 +# define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_2 +# define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_2 +#elif !defined(CONFIG_STM32_OTGFS) +# define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1 +# define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_1 +#endif + +#if !defined(CONFIG_STM32_DCMI) +# define GPIO_TIM8_CH1OUT GPIO_TIM8_CH1OUT_2 +# define GPIO_TIM8_CH2OUT GPIO_TIM8_CH2OUT_2 +# define GPIO_TIM8_CH3OUT GPIO_TIM8_CH3OUT_2 +#else +# define GPIO_TIM8_CH1OUT GPIO_TIM8_CH1OUT_1 +# if !defined(CONFIG_STM32_SDIO) +# define GPIO_TIM8_CH3OUT GPIO_TIM8_CH3OUT_1 +# endif +#endif + +#if !defined(CONFIG_STM32_SDIO) +# define GPIO_TIM8_CH4OUT GPIO_TIM8_CH4OUT_1 +#endif + +/* CAN + * + * Connector 10 (CN10) is DB-9 male connector that can be used with CAN1 or CAN2. + * + * JP10 connects CAN1_RX or CAN2_RX to the CAN transceiver + * JP3 connects CAN1_TX or CAN2_TX to the CAN transceiver + * + * CAN signals are then available on CN10 pins: + * + * CN10 Pin 7 = CANH + * CN10 Pin 2 = CANL + * + * Mapping to STM32 GPIO pins: + * + * PD0 = FSMC_D2 & CAN1_RX + * PD1 = FSMC_D3 & CAN1_TX + * PB13 = ULPI_D6 & CAN2_TX + * PB5 = ULPI_D7 & CAN2_RX + */ + +#define GPIO_CAN1_RX GPIO_CAN1_RX_3 +#define GPIO_CAN1_TX GPIO_CAN1_TX_3 + +#define GPIO_CAN2_RX GPIO_CAN2_RX_2 +#define GPIO_CAN2_TX GPIO_CAN2_TX_1 + +/* I2C. Only I2C1 is available on the STM3240G-EVAL. I2C1_SCL and I2C1_SDA are + * available on the following pins: + * + * - PB6 is I2C1_SCL + * - PB9 is I2C1_SDA + */ + +#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 +#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2 + +/* DMA Channl/Stream Selections *****************************************************/ +/* Stream selections are arbitrary for now but might become important in the future + * if we set aside more DMA channels/streams. + * + * SDIO DMA + * DMAMAP_SDIO_1 = Channel 4, Stream 3 + * DMAMAP_SDIO_2 = Channel 4, Stream 6 + */ + +#define DMAMAP_SDIO DMAMAP_SDIO_1 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +/************************************************************************************ + * Name: stm3240g_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the STM3210E-EVAL board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * dispaly is cleared by simply setting all GRAM memory to the specified color. + * + ************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm3240g_lcdclear(uint16_t color); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/stm3240g-eval/kernel/.gitignore b/configs/stm3240g-eval/kernel/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..7bacd5aee3e49e11d2753d091bd2c9b31c0b16b0 --- /dev/null +++ b/configs/stm3240g-eval/kernel/.gitignore @@ -0,0 +1,2 @@ +/nuttx_user.elf + diff --git a/configs/stm3240g-eval/kernel/Makefile b/configs/stm3240g-eval/kernel/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..c9e723c1289e1a9a4cd7d154e66e53a06f8ad1a6 --- /dev/null +++ b/configs/stm3240g-eval/kernel/Makefile @@ -0,0 +1,122 @@ +############################################################################ +# configs/stm3240g-eval/kernel/Makefile +# +# Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +# This is the directory for the board-specific header files + +BOARD_INCLUDE = $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)include + +# The entry point name (if none is provided in the .config file) + +CONFIG_USER_ENTRYPOINT ?= user_start +ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT)) + +# Get the paths to the libraries and the links script path in format that +# is appropriate for the host OS + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done} + USER_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}" + USER_LDSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld}" + USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}" + USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}" + USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}" +else + # Linux/Cygwin-native toolchain + USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS))) + USER_LDSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld + USER_LDSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld + USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex" + USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec" + USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" +endif + +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) +USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) +USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" + +# Source files + +CSRCS = stm32_userspace.c +COBJS = $(CSRCS:.c=$(OBJEXT)) +OBJS = $(COBJS) + +# Targets: + +all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map +.PHONY: nuttx_user.elf depend clean distclean + +$(COBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +# Create the nuttx_user.elf file containing all of the user-mode code + +nuttx_user.elf: $(OBJS) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) + +$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf + @echo "LD: nuttx_user.elf" + $(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf +ifeq ($(CONFIG_INTELHEX_BINARY),y) + @echo "CP: nuttx_user.hex" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE) +endif +ifeq ($(CONFIG_MOTOROLA_SREC),y) + @echo "CP: nuttx_user.srec" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE) +endif +ifeq ($(CONFIG_RAW_BINARY),y) + @echo "CP: nuttx_user.bin" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE) +endif + +$(TOPDIR)$(DELIM)User.map: nuttx_user.elf + @echo "MK: User.map" + $(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map + $(Q) $(CROSSDEV)size nuttx_user.elf + +.depend: + +depend: .depend + +clean: + $(call DELFILE, nuttx_user.elf) + $(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*") + $(call DELFILE, "$(TOPDIR)$(DELIM)User.map") + $(call CLEAN) + +distclean: clean diff --git a/configs/stm3240g-eval/kernel/stm32_userspace.c b/configs/stm3240g-eval/kernel/stm32_userspace.c new file mode 100644 index 0000000000000000000000000000000000000000..faca2fb74e09bff3f0ab5b5327c00682be636ffd --- /dev/null +++ b/configs/stm3240g-eval/kernel/stm32_userspace.c @@ -0,0 +1,132 @@ +/**************************************************************************** + * configs/stm3240g-eval/kernel/stm32_userspace.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_NUTTX_USERSPACE +# error "CONFIG_NUTTX_USERSPACE not defined" +#endif + +#if CONFIG_NUTTX_USERSPACE != 0x08040000 +# error "CONFIG_NUTTX_USERSPACE must be 0x08040000 to match memory.ld" +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* These 'addresses' of these values are setup by the linker script. They are + * not actual uint32_t storage locations! They are only used meaningfully in the + * following way: + * + * - The linker script defines, for example, the symbol_sdata. + * - The declareion extern uint32_t _sdata; makes C happy. C will believe + * that the value _sdata is the address of a uint32_t variable _data (it is + * not!). + * - We can recoved the linker value then by simply taking the address of + * of _data. like: uint32_t *pdata = &_sdata; + */ + +extern uint32_t _stext; /* Start of .text */ +extern uint32_t _etext; /* End_1 of .text + .rodata */ +extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */ +extern uint32_t _sdata; /* Start of .data */ +extern uint32_t _edata; /* End+1 of .data */ +extern uint32_t _sbss; /* Start of .bss */ +extern uint32_t _ebss; /* End+1 of .bss */ + +/* This is the user space entry point */ + +int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); + +const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +{ + /* General memory map */ + + .us_entrypoint = (main_t)CONFIG_USER_ENTRYPOINT, + .us_textstart = (uintptr_t)&_stext, + .us_textend = (uintptr_t)&_etext, + .us_datasource = (uintptr_t)&_eronly, + .us_datastart = (uintptr_t)&_sdata, + .us_dataend = (uintptr_t)&_edata, + .us_bssstart = (uintptr_t)&_sbss, + .us_bssend = (uintptr_t)&_ebss, + + /* Memory manager heap structure */ + + .us_heap = &g_mmheap, + + /* Task/thread startup routines */ + + .task_startup = task_startup, +#ifndef CONFIG_DISABLE_PTHREAD + .pthread_startup = pthread_startup, +#endif + + /* Signal handler trampoline */ + +#ifndef CONFIG_DISABLE_SIGNALS + .signal_handler = up_signal_handler, +#endif + + /* User-space work queue support (declared in include/nuttx/wqueue.h) */ + +#ifdef CONFIG_LIB_USRWORK + .work_usrstart = work_usrstart, +#endif +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */ diff --git a/configs/stm3240g-eval/knxwm/Make.defs b/configs/stm3240g-eval/knxwm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c138b17cf740023c1d52281c26d74ad6de164691 --- /dev/null +++ b/configs/stm3240g-eval/knxwm/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3240g-eval/knxwm/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}" + ARCHSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)kernel-space.ld}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld + ARCHSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)kernel-space.ld +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3240g-eval/knxwm/defconfig b/configs/stm3240g-eval/knxwm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..35a346cf75cc79c68088d03f3c1db94289758305 --- /dev/null +++ b/configs/stm3240g-eval/knxwm/defconfig @@ -0,0 +1,1418 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_FLAT is not set +CONFIG_BUILD_PROTECTED=y +CONFIG_BUILD_2PASS=y +CONFIG_PASS1_TARGET="all" +CONFIG_PASS1_BUILDIR="configs/stm3240g-eval/kernel" +CONFIG_PASS1_OBJECT="" +CONFIG_NUTTX_USERSPACE=0x08040000 + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +CONFIG_ARM_MPU=y +CONFIG_ARM_MPU_NREGIONS=8 + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +CONFIG_ARCH_CHIP_STM32F407IG=y +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_HASH is not set +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# I2C Configuration +# +# CONFIG_STM32_I2C_ALT is not set +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_MAGIC_REG=0 +CONFIG_RTC_MAGIC=0xfacefeee +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +CONFIG_ARCH_USE_MPU=y +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3240G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3240g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +CONFIG_STM3240G_LCD=y +CONFIG_STM3240G_LCD_RDSHIFT=5 +# CONFIG_STM3240G_ILI9320_DISABLE is not set +# CONFIG_STM3240G_ILI9325_DISABLE is not set +CONFIG_STM3240G_BOARDINIT_PRIO=196 +CONFIG_STM3240G_BOARDINIT_STACK=2048 +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxwm_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=12 +CONFIG_NFILE_STREAMS=12 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=48 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +CONFIG_LIB_SYSCALL=y +CONFIG_SYS_RESERVED=8 +CONFIG_SYS_NNEST=2 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_POLLED=y +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +CONFIG_RTC_NALARMS=2 +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +# CONFIG_INPUT_MXT is not set +CONFIG_INPUT_STMPE811=y +# CONFIG_STMPE811_SPI is not set +CONFIG_STMPE811_I2C=y +CONFIG_STMPE811_ACTIVELOW=y +CONFIG_STMPE811_EDGE=y +CONFIG_STMPE811_MULTIPLE=y +# CONFIG_STMPE811_TSC_DISABLE is not set +# CONFIG_STMPE811_SWAPXY is not set +CONFIG_STMPE811_THRESHX=39 +CONFIG_STMPE811_THRESHY=51 +CONFIG_STMPE811_ADC_DISABLE=y +CONFIG_STMPE811_GPIO_DISABLE=y +CONFIG_STMPE811_TEMP_DISABLE=y +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +CONFIG_LCD_NOGETRUN=y +CONFIG_LCD_MAXCONTRAST=1 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +# CONFIG_NX_XYINPUT_MOUSE is not set +CONFIG_NX_XYINPUT_TOUCHSCREEN=y +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0x5cb7 +CONFIG_NXTK_BORDERCOLOR2=0x21c9 +CONFIG_NXTK_BORDERCOLOR3=0xffdf +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +CONFIG_NXFONT_SANS22X29B=y +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +CONFIG_NX_MULTIUSER=y +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXSERVERMSGS=32 +CONFIG_NX_MXCLIENTMSGS=16 +CONFIG_NX_NXSTART=y +# CONFIG_NXSTART_EXTERNINIT is not set +CONFIG_NXSTART_SERVERPRIO=110 +CONFIG_NXSTART_SERVERSTACK=1596 +CONFIG_NXSTART_DEVNO=0 + +# +# Memory Management +# +CONFIG_MM_KERNEL_HEAP=y +CONFIG_MM_KERNEL_HEAPSIZE=8192 +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +CONFIG_LIB_USRWORK=y +CONFIG_LIB_USRWORKPRIORITY=100 +CONFIG_LIB_USRWORKPERIOD=100000 +CONFIG_LIB_USRWORKSTACKSIZE=2048 +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_CXX_NEWLONG=y + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# +CONFIG_NXWIDGETS=y + +# +# NX Server/Device Configuration +# +CONFIG_NXWIDGETS_FLICKERFREE=y +CONFIG_NXWIDGETS_DEVNO=0 +CONFIG_NXWIDGETS_CLIENTPRIO=100 +CONFIG_NXWIDGETS_LISTENERPRIO=100 +CONFIG_NXWIDGETS_LISTENERSTACK=2048 +# CONFIG_NXWIDGET_EVENTWAIT is not set + +# +# NXWidget Configuration +# +CONFIG_NXWIDGETS_BPP=16 +CONFIG_NXWIDGETS_SIZEOFCHAR=1 + +# +# NXWidget Default Values +# +# CONFIG_NXWIDGETS_SYSTEM_CUSTOM_FONTID is not set +CONFIG_NXWIDGETS_TNXARRAY_INITIALSIZE=16 +CONFIG_NXWIDGETS_TNXARRAY_SIZEINCREMENT=8 +CONFIG_NXWIDGETS_CUSTOM_FILLCOLORS=y +CONFIG_NXWIDGETS_DEFAULT_BACKGROUNDCOLOR=0x9dfb +CONFIG_NXWIDGETS_DEFAULT_SELECTEDBACKGROUNDCOLOR=0xd73e +CONFIG_NXWIDGETS_DEFAULT_HIGHLIGHTCOLOR=0xc618 +CONFIG_NXWIDGETS_CUSTOM_EDGECOLORS=y +CONFIG_NXWIDGETS_DEFAULT_SHINEEDGECOLOR=0xffdf +CONFIG_NXWIDGETS_DEFAULT_SHADOWEDGECOLOR=0x21e9 +# CONFIG_NXWIDGETS_CUSTOM_TEXTCOLORS is not set +CONFIG_NXWIDGETS_TRANSPARENT_COLOR=0x0 + +# +# Keypad behavior +# +CONFIG_NXWIDGETS_FIRST_REPEAT_TIME=500 +CONFIG_NXWIDGETS_CONTINUE_REPEAT_TIME=200 +CONFIG_NXWIDGETS_DOUBLECLICK_TIME=350 +CONFIG_NXWIDGETS_KBDBUFFER_SIZE=16 +CONFIG_NXWIDGETS_CURSORCONTROL_SIZE=4 +# CONFIG_NXWIDGET_MEMMONITOR is not set +CONFIG_NXWM=y + +# +# NxWM General Settings +# +# CONFIG_NXWM_LARGE_ICONS is not set +# CONFIG_NXWM_CUSTOM_FONTID is not set +CONFIG_NXWM_UNITTEST=y + +# +# Color configuration +# +# CONFIG_NXWM_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWM_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWM_CUSTOM_TEXTCOLORS is not set + +# +# Background Image +# +# CONFIG_NXWM_DISABLE_BACKGROUND_IMAGE is not set +CONFIG_NXWM_BACKGROUND_IMAGE="NXWidgets::g_nuttxBitmap160x160" + +# +# NxWM Taskbar Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_TASKBAR_VSPACING=4 +CONFIG_NXWM_TASKBAR_HSPACING=2 +# CONFIG_NXWM_TASKBAR_TOP is not set +# CONFIG_NXWM_TASKBAR_BOTTOM is not set +CONFIG_NXWM_TASKBAR_LEFT=y +# CONFIG_NXWM_TASKBAR_RIGHT is not set +# CONFIG_NXWM_CUSTOM_TASKBAR_WIDTH is not set +# CONFIG_NXWM_TASKBAR_ICONSCALE is not set +# CONFIG_NXWM_DISABLE_MINIMIZE is not set +# CONFIG_NXWM_TASKBAR_NO_BORDER is not set + +# +# NxWM Toolbar Configuration +# +# CONFIG_NXWM_CUSTOM_TOOLBAR_HEIGHT is not set +# CONFIG_NXWM_TOOLBAR_CUSTOM_FONTID is not set + +# +# NxWM Application Window Configuration +# +# CONFIG_NXWM_CUSTOM_APPWINDOW_ICONS is not set + +# +# NxWM Start Window Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_STARTWINDOW_VSPACING=4 +CONFIG_NXWM_STARTWINDOW_HSPACING=4 +# CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set +CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm" +CONFIG_NXWM_STARTWINDOW_MXMSGS=32 +CONFIG_NXWM_STARTWINDOW_MXMPRIO=42 +CONFIG_NXWM_STARTWINDOW_PRIO=100 +CONFIG_NXWM_STARTWINDOW_STACKSIZE=2048 + +# +# NxTerm Window Settings +# +# CONFIG_NXWM_NXTERM is not set + +# +# NxWM Touchscreen Configuration +# +CONFIG_NXWM_TOUCHSCREEN=y + +# +# Touchscreen Device Settings +# +CONFIG_NXWM_TOUCHSCREEN_DEVNO=0 +CONFIG_NXWM_TOUCHSCREEN_DEVPATH="/dev/input0" +CONFIG_NXWM_TOUCHSCREEN_SIGNO=5 +CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=120 +CONFIG_NXWM_TOUCHSCREEN_LISTENERSTACK=1024 + +# +# NxWM Keyboard Configuration +# +CONFIG_NXWM_KEYBOARD=y + +# +# Keyboard Device Settings +# +CONFIG_NXWM_KEYBOARD_DEVPATH="/dev/console" +# CONFIG_NXWM_KEYBOARD_USBHOST is not set +CONFIG_NXWM_KEYBOARD_SIGNO=6 +CONFIG_NXWM_KEYBOARD_BUFSIZE=16 +CONFIG_NXWM_KEYBOARD_LISTENERPRIO=120 +CONFIG_NXWM_KEYBOARD_LISTENERSTACK=2048 + +# +# NxWM Calibration Display Settings +# +CONFIG_NXWM_CALIBRATION_MARGIN=40 +# CONFIG_NXWM_CALIBRATION_CUSTOM_COLORS is not set +# CONFIG_NXWM_CALIBRATION_MESSAGES is not set +# CONFIG_NXWM_CALIBRATION_ANISOTROPIC is not set +# CONFIG_NXWM_CUSTOM_CALIBRATION_ICON is not set +CONFIG_NXWM_CALIBRATION_SIGNO=5 +CONFIG_NXWM_CALIBRATION_LISTENERPRIO=100 +CONFIG_NXWM_CALIBRATION_LISTENERSTACK=2048 + +# +# NxWM Hex Calculator Display Settings +# +# CONFIG_NXWM_HEXCALCULATOR_CUSTOM_COLORS is not set +# CONFIG_NXWM_CUSTOM_HEXCALCULATOR_ICON is not set +CONFIG_NXWM_HEXCALCULATOR_CUSTOM_FONTID=y +CONFIG_NXWM_HEXCALCULATOR_FONTID=5 + +# +# NxWM Media Player Display Settings +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/knxwm/setenv.sh b/configs/stm3240g-eval/knxwm/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ce7c852735b2560735505a6ab80e20bbafc8f727 --- /dev/null +++ b/configs/stm3240g-eval/knxwm/setenv.sh @@ -0,0 +1,72 @@ +#!/bin/bash +# configs/stm3240g-eval/knxwm/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3240g-eval/nettest/Make.defs b/configs/stm3240g-eval/nettest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..3f2604c8b9d6c2478c340dca7066d8cf89bd77dc --- /dev/null +++ b/configs/stm3240g-eval/nettest/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3240g-eval/nettest/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3240g-eval/nettest/defconfig b/configs/stm3240g-eval/nettest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..a0a47bc9ea0489f59732d5cff739c0858c088207 --- /dev/null +++ b/configs/stm3240g-eval/nettest/defconfig @@ -0,0 +1,1189 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +CONFIG_ARCH_CHIP_STM32F407IG=y +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3240G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3240g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nettest_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_NETTEST=y +# CONFIG_EXAMPLES_NETTEST_SERVER is not set +CONFIG_EXAMPLES_NETTEST_PERFORMANCE=y +CONFIG_EXAMPLES_NETTEST_IPv4=y +CONFIG_EXAMPLES_NETTEST_INIT=y +CONFIG_EXAMPLES_NETTEST_NOMAC=y + +# +# IPv4 addresses +# +CONFIG_EXAMPLES_NETTEST_IPADDR=0x0a000002 +CONFIG_EXAMPLES_NETTEST_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_NETTEST_NETMASK=0xffffff00 +CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/nettest/setenv.sh b/configs/stm3240g-eval/nettest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3d0270f2826de4c7b550de0d10f1a6c61b1762ff --- /dev/null +++ b/configs/stm3240g-eval/nettest/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm3240g-eval/nettest/setenv.sh +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3240g-eval/nsh/Make.defs b/configs/stm3240g-eval/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..3d371f1764dfdb86ddbba6e6dbe3351778d03e55 --- /dev/null +++ b/configs/stm3240g-eval/nsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3240g-eval/nsh/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3240g-eval/nsh/defconfig b/configs/stm3240g-eval/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..0abef4de7e928fe3e8478f9794f94455392bfaf6 --- /dev/null +++ b/configs/stm3240g-eval/nsh/defconfig @@ -0,0 +1,1412 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +CONFIG_ARCH_CHIP_STM32F407IG=y +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +CONFIG_STM32_RNG=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# I2C Configuration +# +# CONFIG_STM32_I2C_ALT is not set +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_MAGIC_REG=0 +CONFIG_RTC_MAGIC=0xfacefeee +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3240G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3240g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_POLLED=y +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +CONFIG_RTC_NALARMS=2 +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=1 +CONFIG_I2CTOOL_MAXBUS=3 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=100000 +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/nsh/setenv.sh b/configs/stm3240g-eval/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c6233ddd8f800a2b7e777ece32558e7cae55f676 --- /dev/null +++ b/configs/stm3240g-eval/nsh/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm3240g-eval/nsh/setenv.sh +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3240g-eval/nsh2/Make.defs b/configs/stm3240g-eval/nsh2/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..01fd1a369df0c2638ea6aed6b41682bbd45131ab --- /dev/null +++ b/configs/stm3240g-eval/nsh2/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3240g-eval/nsh2/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3240g-eval/nsh2/defconfig b/configs/stm3240g-eval/nsh2/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b38f5dd43b22a3e2e0d769077fc31daa4547606d --- /dev/null +++ b/configs/stm3240g-eval/nsh2/defconfig @@ -0,0 +1,1451 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +CONFIG_ARCH_CHIP_STM32F407IG=y +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +CONFIG_STM32_SDIO=y +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +CONFIG_STM32_CCMEXCLUDE=y +# CONFIG_STM32_DMACAPABLE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set + +# +# I2C Configuration +# +# CONFIG_STM32_I2C_ALT is not set +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set + +# +# SDIO Configuration +# +CONFIG_SDIO_DMAPRIO=0x00010000 +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_MAGIC_REG=0 +CONFIG_RTC_MAGIC=0xfacefeee +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3240G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3240g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_POLLED=y +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +CONFIG_RTC_NALARMS=2 +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_ARCH_HAVE_SDIO=y +CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y +CONFIG_MMCSD_SDIO=y +CONFIG_SDIO_PREFLIGHT=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_SDIO_BLOCKSETUP is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +CONFIG_RAMLOG=y +CONFIG_RAMLOG_SYSLOG=y +CONFIG_RAMLOG_BUFSIZE=1024 +# CONFIG_RAMLOG_CRLF is not set +CONFIG_RAMLOG_NONBLOCKING=y +CONFIG_RAMLOG_NPOLLWAITERS=4 + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_CHAR is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +# CONFIG_NSH_CONSOLE is not set +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=1 +CONFIG_I2CTOOL_MAXBUS=3 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=100000 +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/nsh2/setenv.sh b/configs/stm3240g-eval/nsh2/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..2fe27a60d272c6580dbaa4d4059d2fdbd480ed99 --- /dev/null +++ b/configs/stm3240g-eval/nsh2/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm3240g-eval/nsh/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3240g-eval/nxterm/Make.defs b/configs/stm3240g-eval/nxterm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..6c7e72d33c34d5422e12669cd06e9fde55229d04 --- /dev/null +++ b/configs/stm3240g-eval/nxterm/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3240g-eval/nxterm/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3240g-eval/nxterm/defconfig b/configs/stm3240g-eval/nxterm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b7f8ec8a405609dc2dcb1b9aa52ae9072d47f215 --- /dev/null +++ b/configs/stm3240g-eval/nxterm/defconfig @@ -0,0 +1,1546 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +CONFIG_ARCH_CHIP_STM32F407IG=y +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +CONFIG_STM32_FSMC=y +# CONFIG_STM32_HASH is not set +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +CONFIG_STM32_FSMC_SRAM=y +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# I2C Configuration +# +# CONFIG_STM32_I2C_ALT is not set +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_MAGIC_REG=0 +CONFIG_RTC_MAGIC=0xfacefeee +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3240G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3240g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_STM3240G_LCD=y +CONFIG_STM3240G_LCD_RDSHIFT=5 +# CONFIG_STM3240G_ILI9320_DISABLE is not set +# CONFIG_STM3240G_ILI9325_DISABLE is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxterm_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=12 +CONFIG_NFILE_STREAMS=12 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=8 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_POLLED=y +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +CONFIG_RTC_NALARMS=2 +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +CONFIG_LCD_NOGETRUN=y +CONFIG_LCD_MAXCONTRAST=1 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0xad55 +CONFIG_NXTK_BORDERCOLOR2=0x6b4d +CONFIG_NXTK_BORDERCOLOR3=0xdedb +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +CONFIG_NXTERM=y + +# +# NxTerm Output Text/Graphics Options +# +CONFIG_NXTERM_BPP=16 +CONFIG_NXTERM_CURSORCHAR=137 +CONFIG_NXTERM_MXCHARS=256 +CONFIG_NXTERM_CACHESIZE=32 +CONFIG_NXTERM_LINESEPARATION=0 +# CONFIG_NXTERM_NOWRAP is not set + +# +# NxTerm Input options +# +# CONFIG_NXTERM_NXKBDIN is not set +CONFIG_NXTERM_KBDBUFSIZE=16 +CONFIG_NXTERM_NPOLLWAITERS=4 + +# +# NX Multi-user only options +# +CONFIG_NX_MULTIUSER=y +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXSERVERMSGS=32 +CONFIG_NX_MXCLIENTMSGS=16 +# CONFIG_NX_NXSTART is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=3 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x64000000 +CONFIG_HEAP2_SIZE=2097152 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +CONFIG_LIBC_NETDB=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +CONFIG_EXAMPLES_NXTERM=y +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# +# CONFIG_NXWIDGETS is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=1 +CONFIG_I2CTOOL_MAXBUS=3 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=100000 +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/nxterm/setenv.sh b/configs/stm3240g-eval/nxterm/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..1b9eb92208663ff7e407fbf55c8c1ed592d3421a --- /dev/null +++ b/configs/stm3240g-eval/nxterm/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm3240g-eval/nxterm/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3240g-eval/nxwm/Make.defs b/configs/stm3240g-eval/nxwm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..adc137c72ff04db87c3e2043b358d3d542fba60d --- /dev/null +++ b/configs/stm3240g-eval/nxwm/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3240g-eval/nxwm/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3240g-eval/nxwm/defconfig b/configs/stm3240g-eval/nxwm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b29baa006b52e89e0fe6adb859c38d02bb2030d1 --- /dev/null +++ b/configs/stm3240g-eval/nxwm/defconfig @@ -0,0 +1,1748 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +CONFIG_ARCH_CHIP_STM32F407IG=y +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +CONFIG_STM32_FSMC=y +# CONFIG_STM32_HASH is not set +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# I2C Configuration +# +# CONFIG_STM32_I2C_ALT is not set +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_MAGIC_REG=0 +CONFIG_RTC_MAGIC=0xfacefeee +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3240G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3240g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_STM3240G_LCD=y +CONFIG_STM3240G_LCD_RDSHIFT=5 +# CONFIG_STM3240G_ILI9320_DISABLE is not set +# CONFIG_STM3240G_ILI9325_DISABLE is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxwm_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=12 +CONFIG_NFILE_STREAMS=12 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=48 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_POLLED=y +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +CONFIG_RTC_NALARMS=2 +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +CONFIG_INPUT=y +# CONFIG_MOUSE is not set +# CONFIG_INPUT_MAX11802 is not set +# CONFIG_INPUT_TSC2007 is not set +# CONFIG_INPUT_ADS7843E is not set +# CONFIG_INPUT_MXT is not set +CONFIG_INPUT_STMPE811=y +# CONFIG_STMPE811_SPI is not set +CONFIG_STMPE811_I2C=y +CONFIG_STMPE811_ACTIVELOW=y +CONFIG_STMPE811_EDGE=y +CONFIG_STMPE811_MULTIPLE=y +# CONFIG_STMPE811_TSC_DISABLE is not set +# CONFIG_STMPE811_SWAPXY is not set +CONFIG_STMPE811_THRESHX=39 +CONFIG_STMPE811_THRESHY=51 +CONFIG_STMPE811_ADC_DISABLE=y +CONFIG_STMPE811_GPIO_DISABLE=y +CONFIG_STMPE811_TEMP_DISABLE=y +# CONFIG_BUTTONS is not set +# CONFIG_DJOYSTICK is not set +# CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +CONFIG_LCD_NOGETRUN=y +CONFIG_LCD_MAXCONTRAST=1 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +CONFIG_ETH0_PHY_NONE=y +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +# CONFIG_NX_XYINPUT_MOUSE is not set +CONFIG_NX_XYINPUT_TOUCHSCREEN=y +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0x5cb7 +CONFIG_NXTK_BORDERCOLOR2=0x21c9 +CONFIG_NXTK_BORDERCOLOR3=0xffdf +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +CONFIG_NXFONT_SANS22X29B=y +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +CONFIG_NXTERM=y + +# +# NxTerm Output Text/Graphics Options +# +CONFIG_NXTERM_BPP=16 +CONFIG_NXTERM_CURSORCHAR=137 +CONFIG_NXTERM_MXCHARS=325 +CONFIG_NXTERM_CACHESIZE=32 +CONFIG_NXTERM_LINESEPARATION=0 +# CONFIG_NXTERM_NOWRAP is not set + +# +# NxTerm Input options +# +CONFIG_NXTERM_NXKBDIN=y +CONFIG_NXTERM_KBDBUFSIZE=16 +CONFIG_NXTERM_NPOLLWAITERS=4 + +# +# NX Multi-user only options +# +CONFIG_NX_MULTIUSER=y +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXSERVERMSGS=32 +CONFIG_NX_MXCLIENTMSGS=16 +# CONFIG_NX_NXSTART is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# +CONFIG_NXWIDGETS=y + +# +# NX Server/Device Configuration +# +CONFIG_NXWIDGETS_FLICKERFREE=y +CONFIG_NXWIDGETS_DEVNO=0 +CONFIG_NXWIDGET_SERVERINIT=y +CONFIG_NXWIDGETS_SERVERPRIO=110 +CONFIG_NXWIDGETS_SERVERSTACK=2048 +CONFIG_NXWIDGETS_CLIENTPRIO=100 +CONFIG_NXWIDGETS_LISTENERPRIO=100 +CONFIG_NXWIDGETS_LISTENERSTACK=2048 +# CONFIG_NXWIDGET_EVENTWAIT is not set + +# +# NXWidget Configuration +# +CONFIG_NXWIDGETS_BPP=16 +CONFIG_NXWIDGETS_SIZEOFCHAR=1 + +# +# NXWidget Default Values +# +# CONFIG_NXWIDGETS_SYSTEM_CUSTOM_FONTID is not set +CONFIG_NXWIDGETS_TNXARRAY_INITIALSIZE=16 +CONFIG_NXWIDGETS_TNXARRAY_SIZEINCREMENT=8 +CONFIG_NXWIDGETS_CUSTOM_FILLCOLORS=y +CONFIG_NXWIDGETS_DEFAULT_BACKGROUNDCOLOR=0x9dfb +CONFIG_NXWIDGETS_DEFAULT_SELECTEDBACKGROUNDCOLOR=0xd73e +CONFIG_NXWIDGETS_DEFAULT_HIGHLIGHTCOLOR=0xc618 +CONFIG_NXWIDGETS_CUSTOM_EDGECOLORS=y +CONFIG_NXWIDGETS_DEFAULT_SHINEEDGECOLOR=0xffdf +CONFIG_NXWIDGETS_DEFAULT_SHADOWEDGECOLOR=0x21e9 +# CONFIG_NXWIDGETS_CUSTOM_TEXTCOLORS is not set +CONFIG_NXWIDGETS_TRANSPARENT_COLOR=0x0 + +# +# Keypad behavior +# +CONFIG_NXWIDGETS_FIRST_REPEAT_TIME=500 +CONFIG_NXWIDGETS_CONTINUE_REPEAT_TIME=200 +CONFIG_NXWIDGETS_DOUBLECLICK_TIME=350 +CONFIG_NXWIDGETS_KBDBUFFER_SIZE=16 +CONFIG_NXWIDGETS_CURSORCONTROL_SIZE=4 +# CONFIG_NXWIDGET_MEMMONITOR is not set +CONFIG_NXWM=y + +# +# NxWM General Settings +# +# CONFIG_NXWM_LARGE_ICONS is not set +# CONFIG_NXWM_CUSTOM_FONTID is not set +CONFIG_NXWM_UNITTEST=y + +# +# Color configuration +# +# CONFIG_NXWM_CUSTOM_FILLCOLORS is not set +# CONFIG_NXWM_CUSTOM_EDGECOLORS is not set +# CONFIG_NXWM_CUSTOM_TEXTCOLORS is not set + +# +# Background Image +# +# CONFIG_NXWM_DISABLE_BACKGROUND_IMAGE is not set +CONFIG_NXWM_BACKGROUND_IMAGE="NXWidgets::g_nuttxBitmap160x160" + +# +# NxWM Taskbar Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_TASKBAR_VSPACING=4 +CONFIG_NXWM_TASKBAR_HSPACING=2 +# CONFIG_NXWM_TASKBAR_TOP is not set +# CONFIG_NXWM_TASKBAR_BOTTOM is not set +CONFIG_NXWM_TASKBAR_LEFT=y +# CONFIG_NXWM_TASKBAR_RIGHT is not set +# CONFIG_NXWM_CUSTOM_TASKBAR_WIDTH is not set +# CONFIG_NXWM_TASKBAR_ICONSCALE is not set +# CONFIG_NXWM_DISABLE_MINIMIZE is not set +# CONFIG_NXWM_TASKBAR_NO_BORDER is not set + +# +# NxWM Toolbar Configuration +# +# CONFIG_NXWM_CUSTOM_TOOLBAR_HEIGHT is not set +# CONFIG_NXWM_TOOLBAR_CUSTOM_FONTID is not set + +# +# NxWM Application Window Configuration +# +# CONFIG_NXWM_CUSTOM_APPWINDOW_ICONS is not set + +# +# NxWM Start Window Configuration +# + +# +# Horizontal and vertical spacing of icons in the task bar +# +CONFIG_NXWM_STARTWINDOW_VSPACING=4 +CONFIG_NXWM_STARTWINDOW_HSPACING=4 +# CONFIG_NXWM_CUSTOM_STARTWINDOW_ICON is not set +CONFIG_NXWM_STARTWINDOW_MQNAME="/dev/nxwm" +CONFIG_NXWM_STARTWINDOW_MXMSGS=32 +CONFIG_NXWM_STARTWINDOW_MXMPRIO=42 +CONFIG_NXWM_STARTWINDOW_PRIO=100 +CONFIG_NXWM_STARTWINDOW_STACKSIZE=2048 + +# +# NxTerm Window Settings +# +CONFIG_NXWM_NXTERM=y +CONFIG_NXWM_NXTERM_PRIO=100 +CONFIG_NXWM_NXTERM_STACKSIZE=2048 +# CONFIG_NXWM_NXTERM_CUSTOM_COLORS is not set +# CONFIG_NXWM_NXTERM_CUSTOM_FONTID is not set +# CONFIG_NXWM_CUSTOM_NXTERM_ICON is not set + +# +# NxWM Touchscreen Configuration +# +CONFIG_NXWM_TOUCHSCREEN=y + +# +# Touchscreen Device Settings +# +CONFIG_NXWM_TOUCHSCREEN_DEVINIT=y +CONFIG_NXWM_TOUCHSCREEN_DEVNO=0 +CONFIG_NXWM_TOUCHSCREEN_DEVPATH="/dev/input0" +CONFIG_NXWM_TOUCHSCREEN_SIGNO=5 +CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=120 +CONFIG_NXWM_TOUCHSCREEN_LISTENERSTACK=1024 + +# +# NxWM Keyboard Configuration +# +CONFIG_NXWM_KEYBOARD=y + +# +# Keyboard Device Settings +# +CONFIG_NXWM_KEYBOARD_DEVPATH="/dev/console" +# CONFIG_NXWM_KEYBOARD_USBHOST is not set +CONFIG_NXWM_KEYBOARD_SIGNO=6 +CONFIG_NXWM_KEYBOARD_BUFSIZE=16 +CONFIG_NXWM_KEYBOARD_LISTENERPRIO=120 +CONFIG_NXWM_KEYBOARD_LISTENERSTACK=2048 + +# +# NxWM Calibration Display Settings +# +CONFIG_NXWM_CALIBRATION_MARGIN=40 +# CONFIG_NXWM_CALIBRATION_CUSTOM_COLORS is not set +# CONFIG_NXWM_CALIBRATION_MESSAGES is not set +# CONFIG_NXWM_CALIBRATION_ANISOTROPIC is not set +# CONFIG_NXWM_CUSTOM_CALIBRATION_ICON is not set +CONFIG_NXWM_CALIBRATION_SIGNO=5 +CONFIG_NXWM_CALIBRATION_LISTENERPRIO=100 +CONFIG_NXWM_CALIBRATION_LISTENERSTACK=2048 + +# +# NxWM Hex Calculator Display Settings +# +# CONFIG_NXWM_HEXCALCULATOR_CUSTOM_COLORS is not set +# CONFIG_NXWM_CUSTOM_HEXCALCULATOR_ICON is not set +CONFIG_NXWM_HEXCALCULATOR_CUSTOM_FONTID=y +CONFIG_NXWM_HEXCALCULATOR_FONTID=5 + +# +# NxWM Media Player Display Settings +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/nxwm/setenv.sh b/configs/stm3240g-eval/nxwm/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..db6e1e5d98e2f4098a37b068de308c9a0c1d7688 --- /dev/null +++ b/configs/stm3240g-eval/nxwm/setenv.sh @@ -0,0 +1,72 @@ +#!/bin/bash +# configs/stm3240g-eval/nxwm/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3240g-eval/scripts/kernel-space.ld b/configs/stm3240g-eval/scripts/kernel-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..12acb943d92e011a60644cd093666ad81dcb1830 --- /dev/null +++ b/configs/stm3240g-eval/scripts/kernel-space.ld @@ -0,0 +1,109 @@ +/**************************************************************************** + * configs/stm3240g-eval/scripts/kernel-space.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > kflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > kflash + + .ARM.extab : { + *(.ARM.extab*) + } > kflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > kflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > ksram AT > kflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > ksram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm3240g-eval/scripts/ld.script b/configs/stm3240g-eval/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..2e3de10a63502b616cf0ab1eff13dadb23289432 --- /dev/null +++ b/configs/stm3240g-eval/scripts/ld.script @@ -0,0 +1,122 @@ +/**************************************************************************** + * configs/stm3240g-eval/scripts/ld.script + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F407VG has 1024Kb of FLASH beginning at address 0x0800:0000 and + * 192Kb of SRAM. SRAM is split up into three blocks: + * + * 1) 112Kb of SRAM beginning at address 0x2000:0000 + * 2) 16Kb of SRAM beginning at address 0x2001:c000 + * 3) 64Kb of CCM SRAM beginning at address 0x1000:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm3240g-eval/scripts/memory.ld b/configs/stm3240g-eval/scripts/memory.ld new file mode 100644 index 0000000000000000000000000000000000000000..a1b347ccb4f02ba3caccdab1961402f90a64acfd --- /dev/null +++ b/configs/stm3240g-eval/scripts/memory.ld @@ -0,0 +1,100 @@ +/**************************************************************************** + * configs/stm3240-eval/scripts/memory.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F407VG has 1024Kb of FLASH beginning at address 0x0800:0000 and + * 192Kb of SRAM. SRAM is split up into three blocks: + * + * 1) 112KB of SRAM beginning at address 0x2000:0000 + * 2) 16KB of SRAM beginning at address 0x2001:c000 + * 3) 64KB of CCM SRAM beginning at address 0x1000:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + * + * For MPU support, the kernel-mode NuttX section is assumed to be 256Kb of + * FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which + * should fit into 64KB and, of course, can be optimized as needed (See + * also configs/stm3240g-eval/scripts/kernel-space.ld). Allowing the + * additional does permit addition debug instrumentation to be added to the + * kernel space without overflowing the partition. + * + * Alignment of the user space FLASH partition is also a critical factor: + * The user space FLASH partition will be spanned with a single region of + * size 2**n bytes. The alignment of the user-space region must be the same. + * As a consequence, as the user-space increases in size, the alignmment + * requirement also increases. + * + * This alignment requirement means that the largest user space FLASH region + * you can have will be 512KB at it would have to be positioned at + * 0x08800000. If you change this address, don't forget to change the + * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify + * the check in kernel/userspace.c. + * + * For the same reasons, the maximum size of the SRAM mapping is limited to + * 4KB. Both of these alignment limitations could be reduced by using + * multiple regions to map the FLASH/SDRAM range or perhaps with some + * clever use of subregions. + * + * A detailed memory map for the 112KB SRAM region is as follows: + * + * 0x20000 0000: Kernel .data region. Typical size: 0.1KB + * ------- ---- Kernel .bss region. Typical size: 1.8KB + * 0x20000 0800: Kernel IDLE thread stack (approximate). Size is + * determined by CONFIG_IDLETHREAD_STACKSIZE and + * adjustments for alignment. Typical is 1KB. + * ------- ---- Padded to 4KB + * 0x20000 1000: User .data region. Size is variable. + * ------- ---- User .bss region Size is variable. + * 0x20000 2000: Beginning of kernel heap. Size determined by + * CONFIG_MM_KERNEL_HEAPSIZE. + * ------- ---- Beginning of user heap. Can vary with other settings. + * 0x20001 c000: End+1 of CPU RAM + */ + +MEMORY +{ + /* 1024Kb FLASH */ + + kflash (rx) : ORIGIN = 0x08000000, LENGTH = 256K + uflash (rx) : ORIGIN = 0x08040000, LENGTH = 256K + xflash (rx) : ORIGIN = 0x08080000, LENGTH = 512K + + /* 112Kb of contiguous SRAM */ + + ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 4K + usram (rwx) : ORIGIN = 0x20001000, LENGTH = 4K + xsram (rwx) : ORIGIN = 0x20002000, LENGTH = 104K +} diff --git a/configs/stm3240g-eval/scripts/user-space.ld b/configs/stm3240g-eval/scripts/user-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..b602a071c638072d649134089374c7ba923317d7 --- /dev/null +++ b/configs/stm3240g-eval/scripts/user-space.ld @@ -0,0 +1,111 @@ +/**************************************************************************** + * configs/stm3240g-eval/scripts/user-space.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +SECTIONS +{ + .userspace : { + *(.userspace) + } > uflash + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > uflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > uflash + + .ARM.extab : { + *(.ARM.extab*) + } > uflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > uflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > usram AT > uflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > usram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm3240g-eval/src/.gitignore b/configs/stm3240g-eval/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/stm3240g-eval/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/stm3240g-eval/src/Makefile b/configs/stm3240g-eval/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..8035987fb364fa7c1b462093953df6867823e178 --- /dev/null +++ b/configs/stm3240g-eval/src/Makefile @@ -0,0 +1,92 @@ +############################################################################ +# configs/stm3240g-eval/src/Makefile +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_STM32_OTGFS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_STM32_FSMC),y) +CSRCS += stm32_lcd.c stm32_selectlcd.c stm32_deselectlcd.c +CSRCS += stm32_selectsram.c stm32_deselectsram.c stm32_extmem.c +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += stm32_adc.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += stm32_pwm.c +endif + +ifeq ($(CONFIG_CAN),y) +CSRCS += stm32_can.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_ARCH_FPU),y) +CSRCS += stm32_ostest.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += stm32_watchdog.c +endif + +ifeq ($(CONFIG_INPUT_STMPE811),y) +CSRCS += stm32_stmpe811.c +endif + +ifeq ($(CONFIG_QENCODER),y) +CSRCS += stm32_qencoder.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm3240g-eval/src/stm3240g-eval.h b/configs/stm3240g-eval/src/stm3240g-eval.h new file mode 100644 index 0000000000000000000000000000000000000000..696d29e6a5e9e63bace133082626be1bcd3bd1c1 --- /dev/null +++ b/configs/stm3240g-eval/src/stm3240g-eval.h @@ -0,0 +1,392 @@ +/**************************************************************************************************** + * configs/stm3240g_eval/src/stm3240g_eval.h + * + * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __CONFIGS_STM3240G_EVAL_SRC_STM3240G_EVAL_H +#define __CONFIGS_STM3240G_EVAL_SRC_STM3240G_EVAL_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include +#include +#include + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ +/* Configuration ************************************************************************************/ +/* How many SPI modules does this chip support? */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 3 +# undef CONFIG_STM32_SPI3 +#endif + +/* You can use either CAN1 or CAN2, but you can't use both because they share the same transceiver */ + +#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2) +# warning "The STM3250G-EVAL will only support one of CAN1 and CAN2" +#endif + +/* You can't use CAN1 with FSMC: + * + * PD0 = FSMC_D2 & CAN1_RX + * PD1 = FSMC_D3 & CAN1_TX + */ + +#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_FSMC) +# warning "The STM3250G-EVAL will only support one of CAN1 and FSMC" +#endif + +/* The USB OTG HS ULPI bus is shared with CAN2 bus: + * + * PB13 = ULPI_D6 & CAN2_TX + * PB5 = ULPI_D7 & CAN2_RX + */ + +#if defined(CONFIG_STM32_CAN2) && defined(CONFIG_STM32_OTGHS) +# warning "The STM3250G-EVAL will only support one of CAN2 and USB OTG HS" +#endif + +/* Do we need to register I2C drivers on behalf of the I2C tool? */ + +#define HAVE_I2CTOOL 1 +#if !defined(CONFIG_SYSTEM_I2CTOOL) || !defined(CONFIG_I2C_DRIVER) +# undef HAVE_I2CTOOL +#endif + +/* STM3240G-EVAL GPIOs ******************************************************************************/ +/* LEDs */ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTG|GPIO_PIN6) +#define GPIO_LED2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTG|GPIO_PIN8) +#define GPIO_LED3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTI|GPIO_PIN9) +#define GPIO_LED4 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN7) + +/* BUTTONS -- NOTE that all have EXTI interrupts configured */ + +#define MIN_IRQBUTTON BUTTON_WAKEUP +#define MAX_IRQBUTTON BUTTON_USER +#define NUM_IRQBUTTONS (BUTTON_USER - BUTTON_WAKEUP + 1) + +#define GPIO_BTN_WAKEUP (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0) +#define GPIO_BTN_TAMPER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN13) +#define GPIO_BTN_USER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTG|GPIO_PIN15) + +/* PWM + * + * The STM3240G-Eval has no real on-board PWM devices, but the board can be + * configured to output a pulse train using TIM4, TIM1, or TIM8 (see board.h). + * Let's figure out which the user has configured. + */ + +#ifdef CONFIG_PWM +# if defined(CONFIG_STM32_TIM1_PWM) +# define STM3240G_EVAL_PWMTIMER 1 +# elif defined(CONFIG_STM32_TIM4_PWM) +# define STM3240G_EVAL_PWMTIMER 4 +# elif defined(CONFIG_STM32_TIM8_PWM) +# define STM3240G_EVAL_PWMTIMER 8 +# endif +#endif + +/* USB OTG FS + * + * PA9 VBUS_FS + * PH5 OTG_FS_PowerSwitchOn + * PF11 OTG_FS_Overcurrent + */ + +#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9) +#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN5) + +#ifdef CONFIG_USBHOST +# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN11) +#else +# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN11) +#endif + +/* The STM3240G-EVAL has two STMPE811QTR I/O expanders on board both connected + * to the STM32 via I2C1. They share a common interrupt line: PI2. + * + * STMPE811 U24, I2C address 0x41 (7-bit) + * ------ ---- ---------------- -------------------------------------------- + * STPE11 PIN BOARD SIGNAL BOARD CONNECTION + * ------ ---- ---------------- -------------------------------------------- + * Y- TouchScreen_Y- LCD Connector XL + * X- TouchScreen_X- LCD Connector XR + * Y+ TouchScreen_Y+ LCD Connector XD + * X+ TouchScreen_X+ LCD Connector XU + * IN3 EXP_IO9 + * IN2 EXP_IO10 + * IN1 EXP_IO11 + * IN0 EXP_IO12 + * + * STMPE811 U29, I2C address 0x44 (7-bit) + * ------ ---- ---------------- -------------------------------------------- + * STPE11 PIN BOARD SIGNAL BOARD CONNECTION + * ------ ---- ---------------- -------------------------------------------- + * Y- EXP_IO1 + * X- EXP_IO2 + * Y+ EXP_IO3 + * X+ EXP_IO4 + * IN3 EXP_IO5 + * IN2 EXP_IO6 + * IN1 EXP_IO7 + * IN0 EXP_IO8 + */ + +#define STMPE811_ADDR1 0x41 +#define STMPE811_ADDR2 0x44 + +#define GPIO_IO_EXPANDER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTI|GPIO_PIN2) + +/* GPIO settings that will be altered when external memory is selected: + * + * ----- ------- -------- ------------ ------- ------------ -------- ----------- -------- ------------- + * PB7: FSMC NL PD0-1: FSMC D2-D3 PE0: FSMC NBL0 PF0-5: FSMC A0-A5 PG0-5: FSMC A10-A15 + * PD3: FSMC CLK PE1: FSMC BLN1 PF6: FSMC NIORD PG6-7: FSMC INT2-3 + * PD4: FSMC NOE PE2: FSMC A23 PF7: FSMC NREG PG9: FSMC NCE3 + * PD5: FSMC NWE PE3-6: FSMC A19-A22 PF8: FSMC NIOWR PG9-10: FSMC NE2-3 + * PD6: FSMC NWAIT PE7-15: FSMC D4-D12 PF9: FSMC CD PG10: FSMC NCE4 (1) + * PD7: FSMC NE1 PF10: FSMC INTR PG11: FSMC NCE4 (2) + * PD7: FSMC NCE2 PF12-15: FSMC A6-A9 PG12: FSMC NE4 + * PD8-10: FSMC D13-D15 PG13-14: FSMC A24-A25 + * PD11-13: FSMC_A16-A18 + * PD14-15: FSMC D0-D1 + */ + +/**************************************************************************************************** + * Public Types + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +/**************************************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the STM3240G-EVAL board. + * + ****************************************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +/**************************************************************************************************** + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related GPIO pins for + * the STM3240G-EVAL board. + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_OTGFS +void weak_function stm32_usbinitialize(void); +#endif + +/**************************************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. This function will + * start a thread that will monitor for device connection/disconnection events. + * + ****************************************************************************************************/ + +#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST) +int stm32_usbhost_initialize(void); +#endif + +/**************************************************************************************************** + * Name: stm32_led_initialize + * + * Description: + * Initialize LEDs + * + ****************************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void stm32_led_initialize(void); +#endif + +/**************************************************************************************************** + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for external memory usage + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_extmemgpios(const uint32_t *gpios, int ngpios); +#endif + +/**************************************************************************************************** + * Name: stm32_extmemaddr + * + * Description: + * Initialize adress line GPIOs for external memory access + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_extmemaddr(int naddrs); +#endif + +/**************************************************************************************************** + * Name: stm32_extmemdata + * + * Description: + * Initialize data line GPIOs for external memory access + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_extmemdata(int ndata); +#endif + +/**************************************************************************************************** + * Name: stm32_enablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_enablefsmc(void); +#endif + +/**************************************************************************************************** + * Name: stm32_disablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_disablefsmc(void); +#endif + +/**************************************************************************************************** + * Name: stm32_selectsram + * + * Description: + * Initialize to access external SRAM. SRAM will be visible at the FSMC Bank + * NOR/SRAM2 base address (0x64000000) + * + * General transaction rules. The requested AHB transaction data size can be 8-, + * 16- or 32-bit wide whereas the SRAM has a fixed 16-bit data width. Some simple + * transaction rules must be followed: + * + * Case 1: AHB transaction width and SRAM data width are equal + * There is no issue in this case. + * Case 2: AHB transaction size is greater than the memory size + * In this case, the FSMC splits the AHB transaction into smaller consecutive + * memory accesses in order to meet the external data width. + * Case 3: AHB transaction size is smaller than the memory size. + * SRAM supports the byte select feature. + * a) FSMC allows write transactions accessing the right data through its + * byte lanes (NBL[1:0]) + * b) Read transactions are allowed (the controller reads the entire memory + * word and uses the needed byte only). The NBL[1:0] are always kept low + * during read transactions. + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_selectsram(void); +#endif + +/**************************************************************************************************** + * Name: stm32_deselectsram + * + * Description: + * Disable SRAM + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_deselectsram(void); +#endif + +/**************************************************************************************************** + * Name: stm32_selectlcd + * + * Description: + * Initialize to the LCD + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_selectlcd(void); +#endif + +/**************************************************************************************************** + * Name: stm32_deselectlcd + * + * Description: + * Disable the LCD + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_deselectlcd(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_STM3240G_EVAL_SRC_STM3240G_EVAL_H */ diff --git a/configs/stm3240g-eval/src/stm32_adc.c b/configs/stm3240g-eval/src/stm32_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..da37355e506d150501c1a268fbc4296811f696b2 --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_adc.c @@ -0,0 +1,168 @@ +/************************************************************************************ + * configs/stm3240g-eval/src/stm32_adc.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32_pwm.h" +#include "stm3240g-eval.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Configuration ************************************************************/ +/* Up to 3 ADC interfaces are supported */ + +#if STM32_NADC < 3 +# undef CONFIG_STM32_ADC3 +#endif + +#if STM32_NADC < 2 +# undef CONFIG_STM32_ADC2 +#endif + +#if STM32_NADC < 1 +# undef CONFIG_STM32_ADC1 +#endif + +#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3) +#ifndef CONFIG_STM32_ADC3 +# warning "Channel information only available for ADC3" +#endif + +/* The number of ADC channels in the conversion list */ + +#define ADC3_NCHANNELS 1 + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* The STM3240G-EVAL has a 10 Kohm potentiometer RV1 connected to PF9 of + * STM32F407IGH6 on the board: TIM14_CH1/FSMC_CD/ADC3_IN7 + */ + +/* Identifying number of each ADC channel: Variable Resistor. */ + +#ifdef CONFIG_STM32_ADC3 +static const uint8_t g_chanlist[ADC3_NCHANNELS] = {7}; + +/* Configurations of pins used byte each ADC channels */ + +static const uint32_t g_pinlist[ADC3_NCHANNELS] = {GPIO_ADC3_IN7}; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ +#ifdef CONFIG_STM32_ADC3 + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + int i; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Configure the pins as analog inputs for the selected channels */ + + for (i = 0; i < ADC3_NCHANNELS; i++) + { + stm32_configgpio(g_pinlist[i]); + } + + /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + + adc = stm32_adcinitialize(3, g_chanlist, ADC3_NCHANNELS); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +#else + return -ENOSYS; +#endif +} + +#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */ +#endif /* CONFIG_ADC */ diff --git a/configs/stm3240g-eval/src/stm32_appinit.c b/configs/stm3240g-eval/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..fd1615112738940729157ede3bdbfa9e0b857aab --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_appinit.c @@ -0,0 +1,325 @@ +/**************************************************************************** + * config/stm3240g_eval/src/stm32_appinit.c + * + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#ifdef CONFIG_STM32_SPI1 +# include +# include +#endif + +#ifdef CONFIG_STM32_SDIO +# include +# include +#endif + +#ifdef CONFIG_STM32_OTGFS +# include "stm32_usbhost.h" +#endif + +#ifdef CONFIG_RTC_DRIVER +# include +# include "stm32_rtc.h" +#endif + +#include "stm32.h" +#include "stm32_i2c.h" +#include "stm3240g-eval.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* For now, don't build in any SPI1 support -- NSH is not using it */ + +#undef CONFIG_STM32_SPI1 + +/* Assume that we support everything until convinced otherwise */ + +#define HAVE_MMCSD 1 +#define HAVE_USBDEV 1 +#define HAVE_USBHOST 1 +#define HAVE_RTC_DRIVER 1 + +/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support + * is not enabled. + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SDIO) +# undef HAVE_MMCSD +#endif + +/* Default MMC/SD minor number */ + +#ifdef HAVE_MMCSD +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif + +/* Default MMC/SD SLOT number */ + +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0 +# error "Only one MMC/SD slot" +# undef CONFIG_NSH_MMCSDSLOTNO +# endif + +# ifndef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#endif + +/* Can't support USB host or device features if USB OTG FS is not enabled */ + +#ifndef CONFIG_STM32_OTGFS +# undef HAVE_USBDEV +# undef HAVE_USBHOST +#endif + +/* Can't support USB device is USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +#endif + +/* Can't support USB host is USB host is not enabled */ + +#ifndef CONFIG_USBHOST +# undef HAVE_USBHOST +#endif + +/* Check if we can support the RTC driver */ + +#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER) +# undef HAVE_RTC_DRIVER +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_i2c_register + * + * Description: + * Register one I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void stm32_i2c_register(int bus) +{ + FAR struct i2c_master_s *i2c; + int ret; + + i2c = stm32_i2cbus_initialize(bus); + if (i2c == NULL) + { + dbg("ERROR: Failed to get I2C%d interface\n", bus); + } + else + { + ret = i2c_register(i2c, bus); + if (ret < 0) + { + dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); + stm32_i2cbus_uninitialize(i2c); + } + } +} +#endif + +/**************************************************************************** + * Name: stm32_i2ctool + * + * Description: + * Register I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void stm32_i2ctool(void) +{ +#ifdef CONFIG_STM32_I2C1 + stm32_i2c_register(1); +#endif +#ifdef CONFIG_STM32_I2C2 + stm32_i2c_register(2); +#endif +#ifdef CONFIG_STM32_I2C3 + stm32_i2c_register(3); +#endif +} +#else +# define stm32_i2ctool() +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef HAVE_RTC_DRIVER + FAR struct rtc_lowerhalf_s *lower; +#endif +#ifdef CONFIG_STM32_SPI1 + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; +#endif +#ifdef HAVE_MMCSD + FAR struct sdio_dev_s *sdio; +#endif +#if defined(HAVE_MMCSD) || defined(HAVE_USBHOST) || defined(HAVE_RTC_DRIVER) + int ret; +#endif + + /* Register I2C drivers on behalf of the I2C tool */ + + stm32_i2ctool(); + +#ifdef HAVE_RTC_DRIVER + /* Instantiate the STM32 lower-half RTC driver */ + + lower = stm32_rtc_lowerhalf(); + if (!lower) + { + sdbg("ERROR: Failed to instantiate the RTC lower-half driver\n"); + return -ENOMEM; + } + else + { + /* Bind the lower half driver and register the combined RTC driver + * as /dev/rtc0 + */ + + ret = rtc_initialize(0, lower); + if (ret < 0) + { + sdbg("ERROR: Failed to bind/register the RTC driver: %d\n", ret); + return ret; + } + } +#endif + + /* Configure SPI-based devices */ + +#ifdef CONFIG_STM32_SPI1 + /* Get the SPI port */ + + spi = stm32_spibus_initialize(1); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port 0\n"); + return -ENODEV; + } + + /* Now bind the SPI interface to the M25P64/128 SPI FLASH driver */ + + mtd = m25p_initialize(spi); + if (!mtd) + { + syslog(LOG_ERR, "ERROR: Failed to bind SPI port 0 to the SPI FLASH driver\n"); + return -ENODEV; + } +#warning "Now what are we going to do with this SPI FLASH driver?" +#endif + + /* Mount the SDIO-based MMC/SD block driver */ + +#ifdef HAVE_MMCSD + /* First, get an instance of the SDIO interface */ + + sdio = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!sdio) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdio); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + /* Then let's guess and say that there is a card in the slot. I need to check to + * see if the STM3240G-EVAL board supports a GPIO to detect if there is a card in + * the slot. + */ + + sdio_mediachange(sdio, true); +#endif + +#ifdef HAVE_USBHOST + /* Initialize USB host operation. stm32_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + + ret = stm32_usbhost_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret); + return ret; + } +#endif + + return OK; +} diff --git a/configs/stm3240g-eval/src/stm32_autoleds.c b/configs/stm3240g-eval/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..410e944795424e391bf1ead37fc1daf7f2a5cea6 --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_autoleds.c @@ -0,0 +1,258 @@ +/**************************************************************************** + * configs/stm3240g_eval/src/stm32_autoleds.c + * + * Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "stm3240g-eval.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* The following definitions map the encoded LED setting to GPIO settings */ + +#define STM3210E_LED1 (1 << 0) +#define STM3210E_LED2 (1 << 1) +#define STM3210E_LED3 (1 << 2) +#define STM3210E_LED4 (1 << 3) + +#define ON_SETBITS_SHIFT (0) +#define ON_CLRBITS_SHIFT (4) +#define OFF_SETBITS_SHIFT (8) +#define OFF_CLRBITS_SHIFT (12) + +#define ON_BITS(v) ((v) & 0xff) +#define OFF_BITS(v) (((v) >> 8) & 0x0ff) +#define SETBITS(b) ((b) & 0x0f) +#define CLRBITS(b) (((b) >> 4) & 0x0f) + +#define ON_SETBITS(v) (SETBITS(ON_BITS(v)) +#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v)) +#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v)) +#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v)) + +#define LED_STARTED_ON_SETBITS ((STM3210E_LED1) << ON_SETBITS_SHIFT) +#define LED_STARTED_ON_CLRBITS ((STM3210E_LED2|STM3210E_LED3|STM3210E_LED4) << ON_CLRBITS_SHIFT) +#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT) +#define LED_STARTED_OFF_CLRBITS ((STM3210E_LED1|STM3210E_LED2|STM3210E_LED3|STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_HEAPALLOCATE_ON_SETBITS ((STM3210E_LED2) << ON_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_ON_CLRBITS ((STM3210E_LED1|STM3210E_LED3|STM3210E_LED4) << ON_CLRBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_SETBITS ((STM3210E_LED1) << OFF_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_CLRBITS ((STM3210E_LED2|STM3210E_LED3|STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_IRQSENABLED_ON_SETBITS ((STM3210E_LED1|STM3210E_LED2) << ON_SETBITS_SHIFT) +#define LED_IRQSENABLED_ON_CLRBITS ((STM3210E_LED3|STM3210E_LED4) << ON_CLRBITS_SHIFT) +#define LED_IRQSENABLED_OFF_SETBITS ((STM3210E_LED2) << OFF_SETBITS_SHIFT) +#define LED_IRQSENABLED_OFF_CLRBITS ((STM3210E_LED1|STM3210E_LED3|STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_STACKCREATED_ON_SETBITS ((STM3210E_LED3) << ON_SETBITS_SHIFT) +#define LED_STACKCREATED_ON_CLRBITS ((STM3210E_LED1|STM3210E_LED2|STM3210E_LED4) << ON_CLRBITS_SHIFT) +#define LED_STACKCREATED_OFF_SETBITS ((STM3210E_LED1|STM3210E_LED2) << OFF_SETBITS_SHIFT) +#define LED_STACKCREATED_OFF_CLRBITS ((STM3210E_LED3|STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_INIRQ_ON_SETBITS ((STM3210E_LED1) << ON_SETBITS_SHIFT) +#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_INIRQ_OFF_CLRBITS ((STM3210E_LED1) << OFF_CLRBITS_SHIFT) + +#define LED_SIGNAL_ON_SETBITS ((STM3210E_LED2) << ON_SETBITS_SHIFT) +#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_SIGNAL_OFF_CLRBITS ((STM3210E_LED2) << OFF_CLRBITS_SHIFT) + +#define LED_ASSERTION_ON_SETBITS ((STM3210E_LED4) << ON_SETBITS_SHIFT) +#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_ASSERTION_OFF_CLRBITS ((STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_PANIC_ON_SETBITS ((STM3210E_LED4) << ON_SETBITS_SHIFT) +#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_PANIC_OFF_CLRBITS ((STM3210E_LED4) << OFF_CLRBITS_SHIFT) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint16_t g_ledbits[8] = +{ + (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | + LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS), + + (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS | + LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS), + + (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS | + LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS), + + (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS | + LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS), + + (LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS | + LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS), + + (LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS | + LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS), + + (LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS | + LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS), + + (LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS | + LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS) +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static inline void led_clrbits(unsigned int clrbits) +{ + if ((clrbits & STM3210E_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, false); + } + + if ((clrbits & STM3210E_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, false); + } + + if ((clrbits & STM3210E_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, false); + } + + if ((clrbits & STM3210E_LED4) != 0) + { + stm32_gpiowrite(GPIO_LED4, false); + } +} + +static inline void led_setbits(unsigned int setbits) +{ + if ((setbits & STM3210E_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, true); + } + + if ((setbits & STM3210E_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, true); + } + + if ((setbits & STM3210E_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, true); + } + + if ((setbits & STM3210E_LED4) != 0) + { + stm32_gpiowrite(GPIO_LED4, true); + } +} + +static void led_setonoff(unsigned int bits) +{ + led_clrbits(CLRBITS(bits)); + led_setbits(SETBITS(bits)); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_led_initialize + ****************************************************************************/ + +void stm32_led_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_setonoff(ON_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_setonoff(OFF_BITS(g_ledbits[led])); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/stm3240g-eval/src/stm32_boot.c b/configs/stm3240g-eval/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..47322b69cd57023b8e379cada67331b7d4dbab8b --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_boot.c @@ -0,0 +1,275 @@ +/************************************************************************************ + * configs/stm3240g-eval/src/stm32_boot.c + * + * Copyright (C) 2011-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "stm3240g-eval.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* Should we initialize the NX server? This is done for NxWidgets (CONFIG_NXWIDGETS=y) + * if nx_start() is available (CONFIG_NX_NXSTART=y) and if the NxWidget::CNxServer + * class expects the RTOS to do the NX initialization (CONFIG_NXWIDGET_SERVERINIT=n). + * This combination of settings is normally only used in the kernel build mode + * (CONFIG_BUILD_PROTECTED) when NxWidgets is unable to initialize NX from user-space. + */ + +#undef HAVE_NXSTART + +#if !defined(CONFIG_NX_MULTIUSER) +# undef CONFIG_NX_START +#endif + +#if defined(CONFIG_NXWIDGETS) +# if defined(CONFIG_NX_NXSTART) +# if !defined(CONFIG_NXWIDGET_SERVERINIT) +# define HAVE_NXSTART +# include +# endif +# else +# if !defined(CONFIG_NXWIDGET_SERVERINIT) && defined(CONFIG_BUILD_PROTECTED) +# error CONFIG_NX_NXSTART=y is needed +# endif +# endif +#endif + +/* Should we initialize the touchscreen for the NxWM (CONFIG_NXWM=y)? This + * is done if we have a touchscreen (CONFIG_INPUT_STMPE811=y), NxWM uses the + * touchscreen (CONFIG_NXWM_TOUCHSCREEN=y), and if we were asked to + * initialize the touchscreen for NxWM (NXWM_TOUCHSCREEN_DEVINIT=n). This + * combination of settings is normally only used in the kernel build mode + * (CONFIG_BUILD_PROTECTED) when NxWidgets is unable to initialize NX from + * user-space. + */ + +#undef HAVE_TCINIT + +#if defined(CONFIG_NXWM_TOUCHSCREEN) +# if !defined(CONFIG_NXWM_TOUCHSCREEN_DEVNO) +# error CONFIG_NXWM_TOUCHSCREEN_DEVNO is not defined +# elif defined(CONFIG_INPUT_STMPE811) +# if !defined(CONFIG_NXWM_TOUCHSCREEN_DEVINIT) +# define HAVE_TCINIT +# include +# endif +# else +# if !defined(CONFIG_NXWM_TOUCHSCREEN_DEVINIT) && defined(CONFIG_BUILD_PROTECTED) +# error CONFIG_INPUT_STMPE811=y is needed +# endif +# endif +#endif + +/* Check if we will need to support the initialization kernel thread */ + +#undef HAVE_INITTHREAD + +#ifdef CONFIG_BOARD_INITIALIZE +# if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) +# define HAVE_INITTHREAD 1 +# elif defined(HAVE_NXSTART) +# define HAVE_INITTHREAD 1 +# elif defined(HAVE_TCINIT) +# define HAVE_INITTHREAD 1 +# endif +#endif + +#ifdef HAVE_INITTHREAD +# include +# include +# include +# ifndef CONFIG_STM3240G_BOARDINIT_PRIO +# define CONFIG_STM3240G_BOARDINIT_PRIO 196 +# endif +# ifndef CONFIG_STM3240G_BOARDINIT_STACK +# define CONFIG_STM3240G_BOARDINIT_STACK 2048 +# endif +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_initthread + * + * Description: + * Board initialization kernel thread. This thread exists to support + * initialization when CONFIG_BOARD_INITIALIZE is defined. It is started by + * board_initialize() which runs on the IDLE thread. + * + * This function thread exists because some initialization steps may require + * waiting for events. Such waiting is not possible on the IDLE thread. + * + * Input Parameters: + * Standard task start-up parameters (none of which are used) + * + * Returned Value: + * Always returns EXIT_SUCCESS. + * + ************************************************************************************/ + +#ifdef HAVE_INITTHREAD +static int board_initthread(int argc, char *argv[]) +{ + int ret; + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + + ret = board_app_initialize(); + if (ret < 0) + { + gdbg("ERROR: board_app_initialize failed: %d\n", ret); + } +#endif + +#ifdef HAVE_NXSTART + /* Initialize the NX server */ + + ret = nx_start(); + if (ret < 0) + { + gdbg("ERROR: nx_start failed: %d\n", ret); + } +#endif + +#ifdef HAVE_TCINIT + /* Initialize the touchscreen */ + + ret = board_tsc_setup(CONFIG_NXWM_TOUCHSCREEN_DEVNO); + if (ret < 0) + { + gdbg("ERROR: board_tsc_setup failed: %d\n", ret); + } +#endif + + return EXIT_SUCCESS; +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + +#ifdef CONFIG_STM32_FSMC + /* If the FSMC is enabled, then enable SRAM access */ + + stm32_selectsram(); +#endif + +#ifdef CONFIG_STM32_OTGFS + /* Initialize USB if the 1) OTG FS controller is in the configuration and 2) + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * the weak function stm32_usbinitialize() has been brought into the build. + * Presumeably either CONFIG_USBDEV or CONFIG_USBHOST is also selected. + */ + + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + stm32_led_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_initialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ +#ifdef HAVE_INITTHREAD + pid_t server; + + /* Start the board initialization kernel thread */ + + server = kernel_thread("Board Init", CONFIG_STM3240G_BOARDINIT_PRIO, + CONFIG_STM3240G_BOARDINIT_STACK, board_initthread, + NULL); + ASSERT(server > 0); +#endif +} +#endif diff --git a/configs/stm3240g-eval/src/stm32_buttons.c b/configs/stm3240g-eval/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..e3e761b217bae6462be68f84446677f918e84088 --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_buttons.c @@ -0,0 +1,173 @@ +/**************************************************************************** + * configs/stm3240g-eval/src/stm32_buttons.c + * + * Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "stm3240g-eval.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* Pin configuration for each STM3210E-EVAL button. This array is indexed by + * the BUTTON_* and JOYSTICK_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_WAKEUP, GPIO_BTN_TAMPER, GPIO_BTN_USER +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed for most keys. The exception + * is the WAKEUP button. + */ + + bool released = stm32_gpioread(g_buttons[i]); + if (i == BUTTON_WAKEUP) + { + released = !released; + } + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/stm3240g-eval/src/stm32_can.c b/configs/stm3240g-eval/src/stm32_can.c new file mode 100644 index 0000000000000000000000000000000000000000..40a29e50d8044fadeb7060d6edcfe4d777507f00 --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_can.c @@ -0,0 +1,141 @@ +/************************************************************************************ + * configs/stm3240g-eval/src/stm32_can.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32.h" +#include "stm32_can.h" +#include "stm3240g-eval.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2) +# warning "Both CAN1 and CAN2 are enabled. Assuming only CAN1." +# undef CONFIG_STM32_CAN2 +#endif + +#ifdef CONFIG_STM32_CAN1 +# define CAN_PORT 1 +#else +# define CAN_PORT 2 +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = stm32_caninitialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && (CONFIG_STM32_CAN1 || CONFIG_STM32_CAN2) */ diff --git a/configs/stm3240g-eval/src/stm32_deselectlcd.c b/configs/stm3240g-eval/src/stm32_deselectlcd.c new file mode 100644 index 0000000000000000000000000000000000000000..76a6108ae17ac757652e4094211c8a1366f38d5a --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_deselectlcd.c @@ -0,0 +1,97 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_deselectlcd.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include "up_arch.h" +#include "stm32_fsmc.h" +#include "stm3240g-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_deselectlcd + * + * Description: + * Disable the LCD + * + ************************************************************************************/ + +void stm32_deselectlcd(void) +{ + /* Restore registers to their power up settings */ + + putreg32(0xffffffff, STM32_FSMC_BCR4); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32(0x0fffffff, STM32_FSMC_BTR4); + + /* Disable AHB clocking to the FSMC */ + + stm32_disablefsmc(); +} + +#endif /* CONFIG_STM32_FSMC */ + + + diff --git a/configs/stm3240g-eval/src/stm32_deselectsram.c b/configs/stm3240g-eval/src/stm32_deselectsram.c new file mode 100644 index 0000000000000000000000000000000000000000..bf38b924c1572a83d956289d318cfd0ca38f8bfd --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_deselectsram.c @@ -0,0 +1,96 @@ +/************************************************************************************ + * configs/stm3240g-eval/src/stm32_deselectsram.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include "up_arch.h" +#include "stm32_fsmc.h" +#include "stm3240g-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_deselectsram + * + * Description: + * Disable SRAM + * + ************************************************************************************/ + +void stm32_deselectsram(void) +{ + /* Restore registers to their power up settings */ + + putreg32(FSMC_BCR_RSTVALUE, STM32_FSMC_BCR2); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32(FSMC_BTR_RSTVALUE, STM32_FSMC_BTR2); + + /* Disable AHB clocking to the FSMC */ + + stm32_disablefsmc(); +} + +#endif /* CONFIG_STM32_FSMC */ + + + diff --git a/configs/stm3240g-eval/src/stm32_extmem.c b/configs/stm3240g-eval/src/stm32_extmem.c new file mode 100644 index 0000000000000000000000000000000000000000..42b7a1e156a04d2a697cb0c493e4effe5e3dc1bc --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_extmem.c @@ -0,0 +1,187 @@ +/************************************************************************************ + * configs/stm3240g-eval/src/stm32_extmem.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32_fsmc.h" +#include "stm32_gpio.h" +#include "stm32.h" +#include "stm3240g-eval.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_STM32_FSMC +# warning "FSMC is not enabled" +#endif + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +#define STM32_FSMC_NADDRCONFIGS 26 +#define STM32_FSMC_NDATACONFIGS 16 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/* GPIO configurations common to most external memories */ + +static const uint32_t g_addressconfig[STM32_FSMC_NADDRCONFIGS] = +{ + GPIO_FSMC_A0, GPIO_FSMC_A1 , GPIO_FSMC_A2, GPIO_FSMC_A3, GPIO_FSMC_A4 , GPIO_FSMC_A5, + GPIO_FSMC_A6, GPIO_FSMC_A7, GPIO_FSMC_A8, GPIO_FSMC_A9, GPIO_FSMC_A10, GPIO_FSMC_A11, + GPIO_FSMC_A12, GPIO_FSMC_A13, GPIO_FSMC_A14, GPIO_FSMC_A15, GPIO_FSMC_A16, GPIO_FSMC_A17, + GPIO_FSMC_A18, GPIO_FSMC_A19, GPIO_FSMC_A20, GPIO_FSMC_A21, GPIO_FSMC_A22, GPIO_FSMC_A23, + GPIO_FSMC_A24, GPIO_FSMC_A25 +}; + +static const uint32_t g_dataconfig[STM32_FSMC_NDATACONFIGS] = +{ + GPIO_FSMC_D0, GPIO_FSMC_D1 , GPIO_FSMC_D2, GPIO_FSMC_D3, GPIO_FSMC_D4 , GPIO_FSMC_D5, + GPIO_FSMC_D6, GPIO_FSMC_D7, GPIO_FSMC_D8, GPIO_FSMC_D9, GPIO_FSMC_D10, GPIO_FSMC_D11, + GPIO_FSMC_D12, GPIO_FSMC_D13, GPIO_FSMC_D14, GPIO_FSMC_D15 +}; + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for external memory usage + * + ************************************************************************************/ + +void stm32_extmemgpios(const uint32_t *gpios, int ngpios) +{ + int i; + + /* Configure GPIOs */ + + for (i = 0; i < ngpios; i++) + { + stm32_configgpio(gpios[i]); + } +} + +/************************************************************************************ + * Name: stm32_extmemaddr + * + * Description: + * Initialize adress line GPIOs for external memory access + * + ************************************************************************************/ + +void stm32_extmemaddr(int naddrs) +{ + stm32_extmemgpios(g_addressconfig, naddrs); +} + +/************************************************************************************ + * Name: stm32_extmemdata + * + * Description: + * Initialize data line GPIOs for external memory access + * + ************************************************************************************/ + +void stm32_extmemdata(int ndata) +{ + stm32_extmemgpios(g_dataconfig, ndata); +} + +/************************************************************************************ + * Name: stm32_enablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +void stm32_enablefsmc(void) +{ + uint32_t regval; + + /* Enable AHB clocking to the FSMC */ + + regval = getreg32( STM32_RCC_AHB3ENR); + regval |= RCC_AHB3ENR_FSMCEN; + putreg32(regval, STM32_RCC_AHB3ENR); +} + +/************************************************************************************ + * Name: stm32_disablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +void stm32_disablefsmc(void) +{ + uint32_t regval; + + /* Disable AHB clocking to the FSMC */ + + regval = getreg32(STM32_RCC_AHB3ENR); + regval &= ~RCC_AHB3ENR_FSMCEN; + putreg32(regval, STM32_RCC_AHB3ENR); +} diff --git a/configs/stm3240g-eval/src/stm32_lcd.c b/configs/stm3240g-eval/src/stm32_lcd.c new file mode 100644 index 0000000000000000000000000000000000000000..c358ffd1eb21fb19a546fcd178f605c117f8595d --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_lcd.c @@ -0,0 +1,1209 @@ +/************************************************************************************** + * configs/stm3240g-eval/src/stm32_lcd.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************/ +/* This driver supports the following LCDs on the STM324xG_EVAL board: + * + * AM-240320L8TNQW00H (LCD_ILI9320 or LCD_ILI9321) OR + * AM-240320D5TOQW01H (LCD_ILI9325) + */ + +/************************************************************************************** + * Included Files + **************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm3240g-eval.h" + +#if !defined(CONFIG_STM3240G_ILI9320_DISABLE) || !defined(CONFIG_STM3240G_ILI9325_DISABLE) + +/************************************************************************************** + * Pre-processor Definitions + **************************************************************************************/ +/* Configuration **********************************************************************/ +/* CONFIG_STM3240G_ILI9320_DISABLE may be defined to disabled the AM-240320L8TNQW00H + * (LCD_ILI9320 or LCD_ILI9321) + * CONFIG_STM3240G_ILI9325_DISABLE may be defined to disabled the AM-240320D5TOQW01H + * (LCD_ILI9325) + */ + +/* Check contrast selection */ + +#if !defined(CONFIG_LCD_MAXCONTRAST) +# define CONFIG_LCD_MAXCONTRAST 1 +#endif + +/* Check power setting */ + +#if !defined(CONFIG_LCD_MAXPOWER) || CONFIG_LCD_MAXPOWER < 1 +# define CONFIG_LCD_MAXPOWER 1 +#endif + +#if CONFIG_LCD_MAXPOWER > 255 +# error "CONFIG_LCD_MAXPOWER must be less than 256 to fit in uint8_t" +#endif + +/* Check orientation */ + +#if defined(CONFIG_LCD_PORTRAIT) +# if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) || defined(CONFIG_LCD_RPORTRAIT) +# error "Cannot define both portrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_RPORTRAIT) +# if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) +# error "Cannot define both rportrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_LANDSCAPE) +# ifdef CONFIG_LCD_RLANDSCAPE +# error "Cannot define both landscape and any other orientations" +# endif +#elif !defined(CONFIG_LCD_RLANDSCAPE) +# define CONFIG_LCD_LANDSCAPE 1 +#endif + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* Display/Color Properties ***********************************************************/ +/* Display Resolution */ + +#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) +# define STM3240G_XRES 320 +# define STM3240G_YRES 240 +#else +# define STM3240G_XRES 240 +# define STM3240G_YRES 320 +#endif + +/* Color depth and format */ + +#define STM3240G_BPP 16 +#define STM3240G_COLORFMT FB_FMT_RGB16_565 + +/* STM3240G-EVAL LCD Hardware Definitions *********************************************/ +/* LCD /CS is CE4, Bank 3 of NOR/SRAM Bank 1~4 */ + +#define STM3240G_LCDBASE ((uintptr_t)(0x60000000 | 0x08000000)) +#define LCD ((struct lcd_regs_s *)STM3240G_LCDBASE) + +#define LCD_REG_0 0x00 +#define LCD_REG_1 0x01 +#define LCD_REG_2 0x02 +#define LCD_REG_3 0x03 +#define LCD_REG_4 0x04 +#define LCD_REG_5 0x05 +#define LCD_REG_6 0x06 +#define LCD_REG_7 0x07 +#define LCD_REG_8 0x08 +#define LCD_REG_9 0x09 +#define LCD_REG_10 0x0a +#define LCD_REG_12 0x0c +#define LCD_REG_13 0x0d +#define LCD_REG_14 0x0e +#define LCD_REG_15 0x0f +#define LCD_REG_16 0x10 +#define LCD_REG_17 0x11 +#define LCD_REG_18 0x12 +#define LCD_REG_19 0x13 +#define LCD_REG_20 0x14 +#define LCD_REG_21 0x15 +#define LCD_REG_22 0x16 +#define LCD_REG_23 0x17 +#define LCD_REG_24 0x18 +#define LCD_REG_25 0x19 +#define LCD_REG_26 0x1a +#define LCD_REG_27 0x1b +#define LCD_REG_28 0x1c +#define LCD_REG_29 0x1d +#define LCD_REG_30 0x1e +#define LCD_REG_31 0x1f +#define LCD_REG_32 0x20 +#define LCD_REG_33 0x21 +#define LCD_REG_34 0x22 +#define LCD_REG_36 0x24 +#define LCD_REG_37 0x25 +#define LCD_REG_40 0x28 +#define LCD_REG_41 0x29 +#define LCD_REG_43 0x2b +#define LCD_REG_45 0x2d +#define LCD_REG_48 0x30 +#define LCD_REG_49 0x31 +#define LCD_REG_50 0x32 +#define LCD_REG_51 0x33 +#define LCD_REG_52 0x34 +#define LCD_REG_53 0x35 +#define LCD_REG_54 0x36 +#define LCD_REG_55 0x37 +#define LCD_REG_56 0x38 +#define LCD_REG_57 0x39 +#define LCD_REG_58 0x3a +#define LCD_REG_59 0x3b +#define LCD_REG_60 0x3c +#define LCD_REG_61 0x3d +#define LCD_REG_62 0x3e +#define LCD_REG_63 0x3f +#define LCD_REG_64 0x40 +#define LCD_REG_65 0x41 +#define LCD_REG_66 0x42 +#define LCD_REG_67 0x43 +#define LCD_REG_68 0x44 +#define LCD_REG_69 0x45 +#define LCD_REG_70 0x46 +#define LCD_REG_71 0x47 +#define LCD_REG_72 0x48 +#define LCD_REG_73 0x49 +#define LCD_REG_74 0x4a +#define LCD_REG_75 0x4b +#define LCD_REG_76 0x4c +#define LCD_REG_77 0x4d +#define LCD_REG_78 0x4e +#define LCD_REG_79 0x4f +#define LCD_REG_80 0x50 +#define LCD_REG_81 0x51 +#define LCD_REG_82 0x52 +#define LCD_REG_83 0x53 +#define LCD_REG_96 0x60 +#define LCD_REG_97 0x61 +#define LCD_REG_106 0x6a +#define LCD_REG_118 0x76 +#define LCD_REG_128 0x80 +#define LCD_REG_129 0x81 +#define LCD_REG_130 0x82 +#define LCD_REG_131 0x83 +#define LCD_REG_132 0x84 +#define LCD_REG_133 0x85 +#define LCD_REG_134 0x86 +#define LCD_REG_135 0x87 +#define LCD_REG_136 0x88 +#define LCD_REG_137 0x89 +#define LCD_REG_139 0x8b +#define LCD_REG_140 0x8c +#define LCD_REG_141 0x8d +#define LCD_REG_143 0x8f +#define LCD_REG_144 0x90 +#define LCD_REG_145 0x91 +#define LCD_REG_146 0x92 +#define LCD_REG_147 0x93 +#define LCD_REG_148 0x94 +#define LCD_REG_149 0x95 +#define LCD_REG_150 0x96 +#define LCD_REG_151 0x97 +#define LCD_REG_152 0x98 +#define LCD_REG_153 0x99 +#define LCD_REG_154 0x9a +#define LCD_REG_157 0x9d +#define LCD_REG_164 0xa4 +#define LCD_REG_192 0xc0 +#define LCD_REG_193 0xc1 +#define LCD_REG_229 0xe5 + +/* LCD IDs */ + +#define ILI9320_ID 0x9320 +#define ILI9321_ID 0x9321 +#define ILI9325_ID 0x9325 + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/************************************************************************************** + * Private Type Definition + **************************************************************************************/ + +/* LCD type */ + +enum lcd_type_e +{ + LCD_TYPE_UNKNOWN = 0, + LCD_TYPE_ILI9320, + LCD_TYPE_ILI9325 +}; + +/* This structure describes the LCD registers */ + +struct lcd_regs_s +{ + volatile uint16_t address; + volatile uint16_t value; +}; + +/* This structure describes the state of this driver */ + +struct stm3240g_dev_s +{ + /* Publically visible device structure */ + + struct lcd_dev_s dev; + + /* Private LCD-specific information follows */ + + uint8_t type; /* LCD type. See enum lcd_type_e */ + uint8_t power; /* Current power setting */ +}; + +/************************************************************************************** + * Private Function Protototypes + **************************************************************************************/ +/* Low Level LCD access */ + +static void stm3240g_writereg(uint8_t regaddr, uint16_t regval); +static uint16_t stm3240g_readreg(uint8_t regaddr); +static inline void stm3240g_gramselect(void); +static inline void stm3240g_writegram(uint16_t rgbval); +static void stm3240g_readnosetup(FAR uint16_t *accum); +static uint16_t stm3240g_readnoshift(FAR uint16_t *accum); +static void stm3240g_setcursor(uint16_t col, uint16_t row); + +/* LCD Data Transfer Methods */ + +static int stm3240g_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels); +static int stm3240g_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels); + +/* LCD Configuration */ + +static int stm3240g_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo); +static int stm3240g_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo); + +/* LCD RGB Mapping */ + +#ifdef CONFIG_FB_CMAP +# error "RGB color mapping not supported by this driver" +#endif + +/* Cursor Controls */ + +#ifdef CONFIG_FB_HWCURSOR +# error "Cursor control not supported by this driver" +#endif + +/* LCD Specific Controls */ + +static int stm3240g_getpower(struct lcd_dev_s *dev); +static int stm3240g_setpower(struct lcd_dev_s *dev, int power); +static int stm3240g_getcontrast(struct lcd_dev_s *dev); +static int stm3240g_setcontrast(struct lcd_dev_s *dev, unsigned int contrast); + +/* Initialization */ + +static inline void stm3240g_lcdinitialize(void); + +/************************************************************************************** + * Private Data + **************************************************************************************/ + +/* This is working memory allocated by the LCD driver for each LCD device + * and for each color plane. This memory will hold one raster line of data. + * The size of the allocated run buffer must therefore be at least + * (bpp * xres / 8). Actual alignment of the buffer must conform to the + * bitwidth of the underlying pixel type. + * + * If there are multiple planes, they may share the same working buffer + * because different planes will not be operate on concurrently. However, + * if there are multiple LCD devices, they must each have unique run buffers. + */ + +static uint16_t g_runbuffer[STM3240G_XRES]; + +/* This structure describes the overall LCD video controller */ + +static const struct fb_videoinfo_s g_videoinfo = +{ + .fmt = STM3240G_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */ + .xres = STM3240G_XRES, /* Horizontal resolution in pixel columns */ + .yres = STM3240G_YRES, /* Vertical resolution in pixel rows */ + .nplanes = 1, /* Number of color planes supported */ +}; + +/* This is the standard, NuttX Plane information object */ + +static const struct lcd_planeinfo_s g_planeinfo = +{ + .putrun = stm3240g_putrun, /* Put a run into LCD memory */ + .getrun = stm3240g_getrun, /* Get a run from LCD memory */ + .buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ + .bpp = STM3240G_BPP, /* Bits-per-pixel */ +}; + +/* This is the standard, NuttX LCD driver object */ + +static struct stm3240g_dev_s g_lcddev = +{ + .dev = + { + /* LCD Configuration */ + + .getvideoinfo = stm3240g_getvideoinfo, + .getplaneinfo = stm3240g_getplaneinfo, + + /* LCD RGB Mapping -- Not supported */ + /* Cursor Controls -- Not supported */ + + /* LCD Specific Controls */ + + .getpower = stm3240g_getpower, + .setpower = stm3240g_setpower, + .getcontrast = stm3240g_getcontrast, + .setcontrast = stm3240g_setcontrast, + }, +}; + +/************************************************************************************** + * Private Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: stm3240g_writereg + * + * Description: + * Write to an LCD register + * + **************************************************************************************/ + +static void stm3240g_writereg(uint8_t regaddr, uint16_t regval) +{ + /* Write the register address then write the register value */ + + LCD->address = regaddr; + LCD->value = regval; +} + +/************************************************************************************** + * Name: stm3240g_readreg + * + * Description: + * Read from an LCD register + * + **************************************************************************************/ + +static uint16_t stm3240g_readreg(uint8_t regaddr) +{ + /* Write the register address then read the register value */ + + LCD->address = regaddr; + return LCD->value; +} + +/************************************************************************************** + * Name: stm3240g_gramselect + * + * Description: + * Setup to read or write multiple pixels to the GRAM memory + * + **************************************************************************************/ + +static inline void stm3240g_gramselect(void) +{ + LCD->address = LCD_REG_34; +} + +/************************************************************************************** + * Name: stm3240g_writegram + * + * Description: + * Write one pixel to the GRAM memory + * + **************************************************************************************/ + +static inline void stm3240g_writegram(uint16_t rgbval) +{ + /* Write the value (GRAM register already selected) */ + + LCD->value = rgbval; +} + +/************************************************************************************** + * Name: stm3240g_readnosetup + * + * Description: + * Prime the operation by reading one pixel from the GRAM memory if necessary for + * this LCD type. When reading 16-bit gram data, there may be some shifts in the + * returned data: + * + * - ILI932x: Discard first dummy read; no shift in the return data + * + **************************************************************************************/ + +static void stm3240g_readnosetup(FAR uint16_t *accum) +{ + /* Read-ahead one pixel */ + + *accum = LCD->value; +} + +/************************************************************************************** + * Name: stm3240g_readnoshift + * + * Description: + * Read one correctly aligned pixel from the GRAM memory. Possibly shifting the + * data and possibly swapping red and green components. + * + * - ILI932x: Unknown -- assuming colors are in the color order + * + **************************************************************************************/ + +static uint16_t stm3240g_readnoshift(FAR uint16_t *accum) +{ + /* Read the value (GRAM register already selected) */ + + return LCD->value; +} + +/************************************************************************************** + * Name: stm3240g_setcursor + * + * Description: + * Set the cursor position. In landscape mode, the "column" is actually the physical + * Y position and the "row" is the physical X position. + * + **************************************************************************************/ + +static void stm3240g_setcursor(uint16_t col, uint16_t row) +{ + stm3240g_writereg(LCD_REG_32, row); /* GRAM horizontal address */ + stm3240g_writereg(LCD_REG_33, col); /* GRAM vertical address */ +} + +/************************************************************************************** + * Name: stm3240g_dumprun + * + * Description: + * Dump the contexts of the run buffer: + * + * run - The buffer in containing the run read to be dumped + * npixels - The number of pixels to dump + * + **************************************************************************************/ + +#if 0 /* Sometimes useful */ +static void stm3240g_dumprun(FAR const char *msg, FAR uint16_t *run, size_t npixels) +{ + int i, j; + + syslog(LOG_DEBUG, "\n%s:\n", msg); + for (i = 0; i < npixels; i += 16) + { + up_putc(' '); + syslog(LOG_DEBUG, " "); + for (j = 0; j < 16; j++) + { + syslog(LOG_DEBUG, " %04x", *run++); + } + up_putc('\n'); + } +} +#endif + +/************************************************************************************** + * Name: stm3240g_putrun + * + * Description: + * This method can be used to write a partial raster line to the LCD: + * + * row - Starting row to write to (range: 0 <= row < yres) + * col - Starting column to write to (range: 0 <= col <= xres-npixels) + * buffer - The buffer containing the run to be written to the LCD + * npixels - The number of pixels to write to the LCD + * (range: 0 < npixels <= xres-col) + * + **************************************************************************************/ + +static int stm3240g_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, + size_t npixels) +{ + FAR const uint16_t *src = (FAR const uint16_t*)buffer; + int i; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + /* Write the run to GRAM. */ + +#ifdef CONFIG_LCD_LANDSCAPE + /* Convert coordinates -- Here the edge away from the row of buttons on + * the STM3240G-EVAL is used as the top. + */ + + /* Write the GRAM data, manually incrementing X */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm3240g_setcursor(col, row); + stm3240g_gramselect(); + stm3240g_writegram(*src++); + + /* Increment to next column */ + + col++; + } +#elif defined(CONFIG_LCD_RLANDSCAPE) + /* Convert coordinates -- Here the edge next to the row of buttons on + * the STM3240G-EVAL is used as the top. + */ + + col = (STM3240G_XRES-1) - col; + row = (STM3240G_YRES-1) - row; + + /* Set the cursor position */ + + stm3240g_setcursor(col, row); + + /* Then write the GRAM data, auto-decrementing X */ + + stm3240g_gramselect(); + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position (auto-decrements to the next column) */ + + stm3240g_writegram(*src++); + } +#elif defined(CONFIG_LCD_PORTRAIT) + /* Convert coordinates. In this configuration, the top of the display is to the left + * of the buttons (if the board is held so that the buttons are at the botton of the + * board). + */ + + col = (STM3240G_XRES-1) - col; + + /* Then write the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm3240g_setcursor(row, col); + stm3240g_gramselect(); + stm3240g_writegram(*src++); + + /* Increment to next column */ + + col--; + } +#else /* CONFIG_LCD_RPORTRAIT */ + /* Convert coordinates. In this configuration, the top of the display is to the right + * of the buttons (if the board is held so that the buttons are at the botton of the + * board). + */ + + row = (STM3240G_YRES-1) - row; + + /* Then write the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm3240g_setcursor(row, col); + stm3240g_gramselect(); + stm3240g_writegram(*src++); + + /* Decrement to next column */ + + col++; + } +#endif + return OK; +} + +/************************************************************************************** + * Name: stm3240g_getrun + * + * Description: + * This method can be used to read a partial raster line from the LCD: + * + * row - Starting row to read from (range: 0 <= row < yres) + * col - Starting column to read read (range: 0 <= col <= xres-npixels) + * buffer - The buffer in which to return the run read from the LCD + * npixels - The number of pixels to read from the LCD + * (range: 0 < npixels <= xres-col) + * + **************************************************************************************/ + +static int stm3240g_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels) +{ + FAR uint16_t *dest = (FAR uint16_t*)buffer; + void (*readsetup)(FAR uint16_t *accum); + uint16_t (*readgram)(FAR uint16_t *accum); + uint16_t accum; + int i; + + /* Buffer must be provided and aligned to a 16-bit address boundary */ + + lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + /* Configure according to the LCD type. Kind of silly with only one LCD type. */ + + switch (g_lcddev.type) + { + case LCD_TYPE_ILI9320: + case LCD_TYPE_ILI9325: + readsetup = stm3240g_readnosetup; + readgram = stm3240g_readnoshift; + break; + + default: /* Shouldn't happen */ + return -ENOSYS; + } + + /* Read the run from GRAM. */ + +#ifdef CONFIG_LCD_LANDSCAPE + /* Convert coordinates -- Here the edge away from the row of buttons on + * the STM3240G-EVAL is used as the top. + */ + + for (i = 0; i < npixels; i++) + { + /* Read the next pixel from this position */ + + stm3240g_setcursor(row, col); + stm3240g_gramselect(); + readsetup(&accum); + *dest++ = readgram(&accum); + + /* Increment to next column */ + + col++; + } +#elif defined(CONFIG_LCD_RLANDSCAPE) + /* Convert coordinates -- Here the edge next to the row of buttons on + * the STM3240G-EVAL is used as the top. + */ + + col = (STM3240G_XRES-1) - col; + row = (STM3240G_YRES-1) - row; + + /* Set the cursor position */ + + stm3240g_setcursor(col, row); + + /* Then read the GRAM data, auto-decrementing Y */ + + stm3240g_gramselect(); + + /* Prime the pump for unaligned read data */ + + readsetup(&accum); + + for (i = 0; i < npixels; i++) + { + /* Read the next pixel from this position (autoincrements to the next row) */ + + *dest++ = readgram(&accum); + } +#elif defined(CONFIG_LCD_PORTRAIT) + /* Convert coordinates. In this configuration, the top of the display is to the left + * of the buttons (if the board is held so that the buttons are at the botton of the + * board). + */ + + col = (STM3240G_XRES-1) - col; + + /* Then read the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Read the next pixel from this position */ + + stm3240g_setcursor(row, col); + stm3240g_gramselect(); + readsetup(&accum); + *dest++ = readgram(&accum); + + /* Increment to next column */ + + col--; + } +#else /* CONFIG_LCD_RPORTRAIT */ + /* Convert coordinates. In this configuration, the top of the display is to the right + * of the buttons (if the board is held so that the buttons are at the botton of the + * board). + */ + + row = (STM3240G_YRES-1) - row; + + /* Then write the GRAM data, manually incrementing Y (which is col) */ + + for (i = 0; i < npixels; i++) + { + /* Write the next pixel to this position */ + + stm3240g_setcursor(row, col); + stm3240g_gramselect(); + readsetup(&accum); + *dest++ = readgram(&accum); + + /* Decrement to next column */ + + col++; + } +#endif + + return OK; +} + +/************************************************************************************** + * Name: stm3240g_getvideoinfo + * + * Description: + * Get information about the LCD video controller configuration. + * + **************************************************************************************/ + +static int stm3240g_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo) +{ + DEBUGASSERT(dev && vinfo); + lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n", + g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes); + memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s)); + return OK; +} + +/************************************************************************************** + * Name: stm3240g_getplaneinfo + * + * Description: + * Get information about the configuration of each LCD color plane. + * + **************************************************************************************/ + +static int stm3240g_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo) +{ + DEBUGASSERT(dev && pinfo && planeno == 0); + lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp); + memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s)); + return OK; +} + +/************************************************************************************** + * Name: stm3240g_getpower + * + * Description: + * Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + **************************************************************************************/ + +static int stm3240g_getpower(struct lcd_dev_s *dev) +{ + lcdvdbg("power: %d\n", 0); + return g_lcddev.power; +} + +/************************************************************************************** + * Name: stm3240g_poweroff + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + **************************************************************************************/ + +static int stm3240g_poweroff(void) +{ + /* Turn the display off */ + + stm3240g_writereg(LCD_REG_7, 0); + + /* Remember the power off state */ + + g_lcddev.power = 0; + return OK; +} + +/************************************************************************************** + * Name: stm3240g_setpower + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On + * backlit LCDs, this setting may correspond to the backlight setting. + * + **************************************************************************************/ + +static int stm3240g_setpower(struct lcd_dev_s *dev, int power) +{ + lcdvdbg("power: %d\n", power); + DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER); + + /* Set new power level */ + + if (power > 0) + { + /* Then turn the display on */ + +#if !defined(CONFIG_STM3240G_ILI9320_DISABLE) || !defined(CONFIG_STM3240G_ILI9325_DISABLE) + stm3240g_writereg(LCD_REG_7, 0x0173); +#endif + g_lcddev.power = power; + } + else + { + /* Turn the display off */ + + stm3240g_poweroff(); + } + + return OK; +} + +/************************************************************************************** + * Name: stm3240g_getcontrast + * + * Description: + * Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static int stm3240g_getcontrast(struct lcd_dev_s *dev) +{ + lcdvdbg("Not implemented\n"); + return -ENOSYS; +} + +/************************************************************************************** + * Name: stm3240g_setcontrast + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static int stm3240g_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) +{ + lcdvdbg("contrast: %d\n", contrast); + return -ENOSYS; +} + +/************************************************************************************** + * Name: stm3240g_lcdinitialize + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + **************************************************************************************/ + +static inline void stm3240g_lcdinitialize(void) +{ + uint16_t id; + + /* Check LCD ID */ + + id = stm3240g_readreg(LCD_REG_0); + lcddbg("LCD ID: %04x\n", id); + + /* Check if the ID is for the STM32_ILI9320 (or ILI9321) or STM32_ILI9325 */ + +#if !defined(CONFIG_STM3240G_ILI9320_DISABLE) && !defined(CONFIG_STM3240G_ILI9325_DISABLE) + if (id == ILI9320_ID || id == ILI9321_ID || id == ILI9325_ID) +#elif !defined(CONFIG_STM3240G_ILI9320_DISABLE) && defined(CONFIG_STM3240G_ILI9325_DISABLE) + if (id == ILI9320_ID || id == ILI9321_ID) +#else /* if defined(CONFIG_STM3240G_ILI9320_DISABLE) && !defined(CONFIG_STM3240G_ILI9325_DISABLE)) */ + if (id == ILI9325_ID) +#endif + { + /* Save the LCD type (not actually used at for anything important) */ + +#if !defined(CONFIG_STM3240G_ILI9320_DISABLE) +# if !defined(CONFIG_STM3240G_ILI9325_DISABLE) + if (id == ILI9325_ID) + { + g_lcddev.type = LCD_TYPE_ILI9325; + } + else +# endif + { + g_lcddev.type = LCD_TYPE_ILI9320; + stm3240g_writereg(LCD_REG_229, 0x8000); /* Set the internal vcore voltage */ + } +#else /* if !defined(CONFIG_STM3240G_ILI9325_DISABLE) */ + g_lcddev.type = LCD_TYPE_ILI9325; +#endif + lcddbg("LCD type: %d\n", g_lcddev.type); + + /* Start Initial Sequence */ + + stm3240g_writereg(LCD_REG_0, 0x0001); /* Start internal OSC. */ + stm3240g_writereg(LCD_REG_1, 0x0100); /* Set SS and SM bit */ + stm3240g_writereg(LCD_REG_2, 0x0700); /* Set 1 line inversion */ + stm3240g_writereg(LCD_REG_3, 0x1030); /* Set GRAM write direction and BGR=1. */ + //stm3240g_writereg(LCD_REG_3, 0x1018); /* Set GRAM write direction and BGR=1. */ + stm3240g_writereg(LCD_REG_4, 0x0000); /* Resize register */ + stm3240g_writereg(LCD_REG_8, 0x0202); /* Set the back porch and front porch */ + stm3240g_writereg(LCD_REG_9, 0x0000); /* Set non-display area refresh cycle ISC[3:0] */ + stm3240g_writereg(LCD_REG_10, 0x0000); /* FMARK function */ + stm3240g_writereg(LCD_REG_12, 0x0000); /* RGB interface setting */ + stm3240g_writereg(LCD_REG_13, 0x0000); /* Frame marker Position */ + stm3240g_writereg(LCD_REG_15, 0x0000); /* RGB interface polarity */ + + /* Power On sequence */ + + stm3240g_writereg(LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + stm3240g_writereg(LCD_REG_17, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ + stm3240g_writereg(LCD_REG_18, 0x0000); /* VREG1OUT voltage */ + stm3240g_writereg(LCD_REG_19, 0x0000); /* VDV[4:0] for VCOM amplitude */ + up_mdelay(200); /* Dis-charge capacitor power voltage (200ms) */ + + stm3240g_writereg(LCD_REG_16, 0x17b0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + stm3240g_writereg(LCD_REG_17, 0x0137); /* DC1[2:0], DC0[2:0], VC[2:0] */ + up_mdelay(50); + + stm3240g_writereg(LCD_REG_18, 0x0139); /* VREG1OUT voltage */ + up_mdelay(50); + + stm3240g_writereg(LCD_REG_19, 0x1d00); /* VDV[4:0] for VCOM amplitude */ + stm3240g_writereg(LCD_REG_41, 0x0013); /* VCM[4:0] for VCOMH */ + up_mdelay(50); + + stm3240g_writereg(LCD_REG_32, 0x0000); /* GRAM horizontal Address */ + stm3240g_writereg(LCD_REG_33, 0x0000); /* GRAM Vertical Address */ + + /* Adjust the Gamma Curve (ILI9320/1) */ + +#if !defined(CONFIG_STM3240G_ILI9320_DISABLE) +# if !defined(CONFIG_STM3240G_ILI9325_DISABLE) + if (g_lcddev.type == LCD_TYPE_ILI9320) +# endif + { + stm3240g_writereg(LCD_REG_48, 0x0006); + stm3240g_writereg(LCD_REG_49, 0x0101); + stm3240g_writereg(LCD_REG_50, 0x0003); + stm3240g_writereg(LCD_REG_53, 0x0106); + stm3240g_writereg(LCD_REG_54, 0x0b02); + stm3240g_writereg(LCD_REG_55, 0x0302); + stm3240g_writereg(LCD_REG_56, 0x0707); + stm3240g_writereg(LCD_REG_57, 0x0007); + stm3240g_writereg(LCD_REG_60, 0x0600); + stm3240g_writereg(LCD_REG_61, 0x020b); + } +#endif + /* Adjust the Gamma Curve (ILI9325) */ + +#if !defined(CONFIG_STM3240G_ILI9325_DISABLE) +# if !defined(CONFIG_STM3240G_ILI9320_DISABLE) + else +# endif + { + stm3240g_writereg(LCD_REG_48, 0x0007); + stm3240g_writereg(LCD_REG_49, 0x0302); + stm3240g_writereg(LCD_REG_50, 0x0105); + stm3240g_writereg(LCD_REG_53, 0x0206); + stm3240g_writereg(LCD_REG_54, 0x0808); + stm3240g_writereg(LCD_REG_55, 0x0206); + stm3240g_writereg(LCD_REG_56, 0x0504); + stm3240g_writereg(LCD_REG_57, 0x0007); + stm3240g_writereg(LCD_REG_60, 0x0105); + stm3240g_writereg(LCD_REG_61, 0x0808); + } +#endif + + /* Set GRAM area */ + + stm3240g_writereg(LCD_REG_80, 0x0000); /* Horizontal GRAM Start Address */ + stm3240g_writereg(LCD_REG_81, 0x00ef); /* Horizontal GRAM End Address */ + stm3240g_writereg(LCD_REG_82, 0x0000); /* Vertical GRAM Start Address */ + stm3240g_writereg(LCD_REG_83, 0x013f); /* Vertical GRAM End Address */ + stm3240g_writereg(LCD_REG_96, 0x2700); /* Gate Scan Line */ + //stm3240g_writereg(LCD_REG_96, 0xa700); /* Gate Scan Line(GS=1, scan direction is G320~G1) */ + stm3240g_writereg(LCD_REG_97, 0x0001); /* NDL,VLE, REV */ + stm3240g_writereg(LCD_REG_106, 0x0000); /* Set scrolling line */ + + /* Partial Display Control */ + + stm3240g_writereg(LCD_REG_128, 0x0000); + stm3240g_writereg(LCD_REG_129, 0x0000); + stm3240g_writereg(LCD_REG_130, 0x0000); + stm3240g_writereg(LCD_REG_131, 0x0000); + stm3240g_writereg(LCD_REG_132, 0x0000); + stm3240g_writereg(LCD_REG_133, 0x0000); + + /* Panel Control */ + + stm3240g_writereg(LCD_REG_144, 0x0010); + stm3240g_writereg(LCD_REG_146, 0x0000); + stm3240g_writereg(LCD_REG_147, 0x0003); + stm3240g_writereg(LCD_REG_149, 0x0110); + stm3240g_writereg(LCD_REG_151, 0x0000); + stm3240g_writereg(LCD_REG_152, 0x0000); + + /* Set GRAM write direction and BGR = 1 + * + * I/D=01 (Horizontal : increment, Vertical : decrement) + * AM=1 (address is updated in vertical writing direction) + */ + + stm3240g_writereg(LCD_REG_3, 0x1018); + stm3240g_writereg(LCD_REG_7, 0); /* Display off */ + } + else + { + lcddbg("Unsupported LCD type\n"); + } +} + +/************************************************************************************** + * Public Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + **************************************************************************************/ + +int board_lcd_initialize(void) +{ + lcdvdbg("Initializing\n"); + + /* Configure GPIO pins and configure the FSMC to support the LCD */ + + stm32_selectlcd(); + + /* Configure and enable LCD */ + + up_mdelay(50); + stm3240g_lcdinitialize(); + + /* Clear the display (setting it to the color 0=black) */ + + stm3240g_lcdclear(0); + + /* Turn the display off */ + + stm3240g_poweroff(); + return OK; +} + +/************************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows support + * for multiple LCD devices. + * + **************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return &g_lcddev.dev; +} + +/************************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Unitialize the LCD support + * + **************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + stm3240g_poweroff(); + stm32_deselectlcd(); +} + +/************************************************************************************** + * Name: stm3240g_lcdclear + * + * Description: + * This is a non-standard LCD interface just for the stm3240g-EVAL board. Because + * of the various rotations, clearing the display in the normal way by writing a + * sequences of runs that covers the entire display can be very slow. Here the + * display is cleared by simply setting all GRAM memory to the specified color. + * + **************************************************************************************/ + +void stm3240g_lcdclear(uint16_t color) +{ + uint32_t i = 0; + + stm3240g_setcursor(0, STM3240G_XRES-1); + stm3240g_gramselect(); + for (i = 0; i < STM3240G_XRES * STM3240G_YRES; i++) + { + LCD->value = color; + } +} + +#endif /* !CONFIG_STM3240G_ILI9320_DISABLE || !CONFIG_STM3240G_ILI9325_DISABLE */ diff --git a/configs/stm3240g-eval/src/stm32_ostest.c b/configs/stm3240g-eval/src/stm32_ostest.c new file mode 100644 index 0000000000000000000000000000000000000000..45601e8ac7a38cfd441c6cc78fcce56f64eb7a53 --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_ostest.c @@ -0,0 +1,113 @@ +/************************************************************************************ + * configs/stm3240g-eval/src/stm32_ostest.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "stm3240g-eval.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#undef HAVE_FPU +#if defined(CONFIG_ARCH_FPU) && defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && \ + defined(CONFIG_SCHED_WAITPID) && !defined(CONFIG_DISABLE_SIGNALS) && \ + !defined(CONFIG_ARMV7M_CMNVECTOR) +# define HAVE_FPU 1 +#endif + +#ifdef HAVE_FPU + +#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*SW_FPU_REGS) +# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size" +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static uint32_t g_saveregs[XCPTCONTEXT_REGS]; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ +/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return + * the current FPU registers. + */ + +void arch_getfpu(FAR uint32_t *fpusave) +{ + irqstate_t flags; + + /* Take a snapshot of the thread context right now */ + + flags = enter_critical_section(); + up_saveusercontext(g_saveregs); + + /* Return only the floating register values */ + + memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS)); + leave_critical_section(flags); +} + +/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function + * will compare them and return true if they are identical. + */ + +bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2) +{ + return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0; +} + +#endif /* HAVE_FPU */ diff --git a/configs/stm3240g-eval/src/stm32_pwm.c b/configs/stm3240g-eval/src/stm32_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..c10853a1b9a66548c57147954fe5b7b90df018b7 --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_pwm.c @@ -0,0 +1,121 @@ +/************************************************************************************ + * configs/stm3240g-eval/src/stm32_pwm.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "stm32_pwm.h" +#include "stm3240g-eval.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* PWM + * + * The STM3240G-Eval has no real on-board PWM devices, but the board can be + * configured to output a pulse train using variously unused pins on the board for + * PWM output (see board.h for details of pins). + */ + +#ifdef CONFIG_PWM + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + pwm = stm32_pwminitialize(STM3240G_EVAL_PWMTIMER); + if (!pwm) + { + dbg("Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/stm3240g-eval/src/stm32_selectlcd.c b/configs/stm3240g-eval/src/stm32_selectlcd.c new file mode 100644 index 0000000000000000000000000000000000000000..d418a5fadb4adc7b5b53bcd0eaacd824d218b05a --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_selectlcd.c @@ -0,0 +1,168 @@ +/************************************************************************************ + * configs/stm3210e-eval/src/stm32_selectlcd.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32.h" +#include "stm3240g-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +/* SRAM pin definitions */ + +#define LCD_NADDRLINES 1 +#define LCD_NDATALINES 16 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/* Pin Usage (per schematic) + * SRAM LCD + * D[0..15] [0..15] [0..15] + * A[0..25] [0..22] [0] RS + * FSMC_NBL0 PE0 OUT --- --- + * FSMC_NBL1 PE1 OUT --- --- + * FSMC_NE2 PG9 OUT --- --- + * FSMC_NE3 PG10 OUT --- ~CS + * FSMC_NE4 PG12 OUT --- --- + * FSMC_NWE PD5 OUT --- ~WR/SCL + * FSMC_NOE PD4 OUT --- ~RD + * FSMC_NWAIT PD6 IN --- --- + * FSMC_INT2 PG6* IN --- --- + * FSMC_INT3 + * FSMC_INTR + * FSMC_CD + * FSMC_CLK + * FSMC_NCE2 + * FSMC_NCE3 + * FSMC_NCE4_1 + * FSMC_NCE4_2 + * FSMC_NIORD + * FSMC_NIOWR + * FSMC_NL + * FSMC_NREG + */ + +/* GPIO configurations unique to the LCD */ + +static const uint32_t g_lcdconfig[] = +{ + /* NOE, NWE, and NE3 */ + + GPIO_FSMC_NOE, GPIO_FSMC_NWE, GPIO_FSMC_NE3 +}; +#define NLCD_CONFIG (sizeof(g_lcdconfig)/sizeof(uint32_t)) + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_selectlcd + * + * Description: + * Initialize to the LCD + * + ************************************************************************************/ + +void stm32_selectlcd(void) +{ + /* Configure new GPIO pins */ + + stm32_extmemaddr(LCD_NADDRLINES); /* Common address lines: A0 */ + stm32_extmemdata(LCD_NDATALINES); /* Common data lines: D0-D15 */ + stm32_extmemgpios(g_lcdconfig, NLCD_CONFIG); /* LCD-specific control lines */ + + /* Enable AHB clocking to the FSMC */ + + stm32_enablefsmc(); + + /* Color LCD configuration (LCD configured as follow): + * + * - Data/Address MUX = Disable "FSMC_BCR_MUXEN" just not enable it. + * - Extended Mode = Disable "FSMC_BCR_EXTMOD" + * - Memory Type = SRAM "FSMC_BCR_SRAM" + * - Data Width = 16bit "FSMC_BCR_MWID16" + * - Write Operation = Enable "FSMC_BCR_WREN" + * - Asynchronous Wait = Disable + */ + + /* Bank3 NOR/SRAM control register configuration */ + + putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR3); + + /* Bank3 NOR/SRAM timing register configuration */ + + putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) | FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) | + FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | FSMC_BTR_ACCMODA, STM32_FSMC_BTR3); + + putreg32(0xffffffff, STM32_FSMC_BWTR3); + + /* Enable the bank by setting the MBKEN bit */ + + putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR3); +} + +#endif /* CONFIG_STM32_FSMC */ + + diff --git a/configs/stm3240g-eval/src/stm32_selectsram.c b/configs/stm3240g-eval/src/stm32_selectsram.c new file mode 100644 index 0000000000000000000000000000000000000000..fcbef4d9c816b30ea22b966470dbb01014b39e0c --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_selectsram.c @@ -0,0 +1,193 @@ +/************************************************************************************ + * configs/stm3240g-eval/src/stm32_selectsram.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32.h" +#include "stm3240g-eval.h" + +#ifdef CONFIG_STM32_FSMC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +/* SRAM Timing */ + +#define SRAM_ADDRESS_SETUP_TIME 3 +#define SRAM_ADDRESS_HOLD_TIME 0 +#define SRAM_DATA_SETUP_TIME 6 +#define SRAM_BUS_TURNAROUND_DURATION 1 +#define SRAM_CLK_DIVISION 0 +#define SRAM_DATA_LATENCY 0 + +/* SRAM pin definitions */ + +#define SRAM_NADDRLINES 21 +#define SRAM_NDATALINES 16 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ +/* GPIOs Configuration ************************************************************** + * PD0 <-> FSMC_D2 PE0 <-> FSMC_NBL0 PF0 <-> FSMC_A0 PG0 <-> FSMC_A10 + * PD1 <-> FSMC_D3 PE1 <-> FSMC_NBL1 PF1 <-> FSMC_A1 PG1 <-> FSMC_A11 + * PD4 <-> FSMC_NOE PE3 <-> FSMC_A19 PF2 <-> FSMC_A2 PG2 <-> FSMC_A12 + * PD5 <-> FSMC_NWE PE4 <-> FSMC_A20 PF3 <-> FSMC_A3 PG3 <-> FSMC_A13 + * PD8 <-> FSMC_D13 PE7 <-> FSMC_D4 PF4 <-> FSMC_A4 PG4 <-> FSMC_A14 + * PD9 <-> FSMC_D14 PE8 <-> FSMC_D5 PF5 <-> FSMC_A5 PG5 <-> FSMC_A15 + * PD10 <-> FSMC_D15 PE9 <-> FSMC_D6 PF12 <-> FSMC_A6 PG9 <-> FSMC_NE2 + * PD11 <-> FSMC_A16 PE10 <-> FSMC_D7 PF13 <-> FSMC_A7 + * PD12 <-> FSMC_A17 PE11 <-> FSMC_D8 PF14 <-> FSMC_A8 + * PD13 <-> FSMC_A18 PE12 <-> FSMC_D9 PF15 <-> FSMC_A9 + * PD14 <-> FSMC_D0 PE13 <-> FSMC_D10 + * PD15 <-> FSMC_D1 PE14 <-> FSMC_D11 + * PE15 <-> FSMC_D12 + */ + +/* GPIO configurations unique to SRAM */ + +static const uint32_t g_sramconfig[] = +{ + /* NE3, NBL0, NBL1, */ + + GPIO_FSMC_NOE, GPIO_FSMC_NWE, GPIO_FSMC_NBL0, GPIO_FSMC_NBL1, GPIO_FSMC_NE2 +}; +#define NSRAM_CONFIG (sizeof(g_sramconfig)/sizeof(uint32_t)) + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_selectsram + * + * Description: + * Initialize to access external SRAM. SRAM will be visible at the FSMC Bank + * NOR/SRAM2 base address (0x64000000) + * + * General transaction rules. The requested AHB transaction data size can be 8-, + * 16- or 32-bit wide whereas the SRAM has a fixed 16-bit data width. Some simple + * transaction rules must be followed: + * + * Case 1: AHB transaction width and SRAM data width are equal + * There is no issue in this case. + * Case 2: AHB transaction size is greater than the memory size + * In this case, the FSMC splits the AHB transaction into smaller consecutive + * memory accesses in order to meet the external data width. + * Case 3: AHB transaction size is smaller than the memory size. + * SRAM supports the byte select feature. + * a) FSMC allows write transactions accessing the right data through its + * byte lanes (NBL[1:0]) + * b) Read transactions are allowed (the controller reads the entire memory + * word and uses the needed byte only). The NBL[1:0] are always kept low + * during read transactions. + * + ************************************************************************************/ + +void stm32_selectsram(void) +{ + /* Configure new GPIO pins */ + + stm32_extmemaddr(SRAM_NADDRLINES); /* Common address lines: A0-A20 */ + stm32_extmemdata(SRAM_NDATALINES); /* Common data lines: D0-D15 */ + stm32_extmemgpios(g_sramconfig, NSRAM_CONFIG); /* SRAM-specific control lines */ + + /* Enable AHB clocking to the FSMC */ + + stm32_enablefsmc(); + + /* Bank1 NOR/SRAM control register configuration + * + * Bank enable : Not yet + * Data address mux : Disabled + * Memory Type : PSRAM + * Data bus width : 16-bits + * Flash access : Disabled + * Burst access mode : Disabled + * Polarity : Low + * Wrapped burst mode : Disabled + * Write timing : Before state + * Write enable : Yes + * Wait signal : Disabled + * Extended mode : Disabled + * Asynchronous wait : Disabled + * Write burst : Disabled + */ + + putreg32((FSMC_BCR_PSRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN), STM32_FSMC_BCR2); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32((FSMC_BTR_ADDSET(SRAM_ADDRESS_SETUP_TIME) | FSMC_BTR_ADDHLD(SRAM_ADDRESS_HOLD_TIME) | + FSMC_BTR_DATAST(SRAM_DATA_SETUP_TIME) | FSMC_BTR_BUSTURN(SRAM_BUS_TURNAROUND_DURATION) | + FSMC_BTR_CLKDIV(SRAM_CLK_DIVISION) | FSMC_BTR_DATLAT(SRAM_DATA_LATENCY) | + FSMC_BTR_ACCMODA), + STM32_FSMC_BTR2); + + /* Bank1 NOR/SRAM timing register for write configuration, if extended mode is used */ + + putreg32(0xffffffff, STM32_FSMC_BWTR2); /* Extended mode not used */ + + /* Enable the bank */ + + putreg32((FSMC_BCR_MBKEN | FSMC_BCR_PSRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN), STM32_FSMC_BCR2); +} + +#endif /* CONFIG_STM32_FSMC */ + + diff --git a/configs/stm3240g-eval/src/stm32_spi.c b/configs/stm3240g-eval/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..5e247d8c35783ce3ba12efc220d59a5bd611894d --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_spi.c @@ -0,0 +1,160 @@ +/************************************************************************************ + * configs/stm3240g_eval/src/stm32_spi.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "stm3240g-eval.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the STM3240G-EVAL board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ +#warning "Missing logic" +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/stm3240g-eval/src/stm32_stmpe811.c b/configs/stm3240g-eval/src/stm32_stmpe811.c new file mode 100644 index 0000000000000000000000000000000000000000..30b06c12505ef926e8948cd94fcf4c097bb96b10 --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_stmpe811.c @@ -0,0 +1,353 @@ +/************************************************************************************ + * configs/stm3240g-eval/src/stm32_stmpe811.c + * + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "stm32.h" +#include "stm3240g-eval.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifdef CONFIG_INPUT_STMPE811 +#ifndef CONFIG_INPUT +# error "STMPE811 support requires CONFIG_INPUT" +#endif + +#ifndef CONFIG_STM32_I2C1 +# error "STMPE811 support requires CONFIG_STM32_I2C1" +#endif + +#ifndef CONFIG_STMPE811_I2C +# error "Only the STMPE811 I2C interface is supported" +#endif + +#ifdef CONFIG_STMPE811_SPI +# error "Only the STMPE811 SPI interface is supported" +#endif + +#ifndef CONFIG_STMPE811_FREQUENCY +# define CONFIG_STMPE811_FREQUENCY 100000 +#endif + +#ifndef CONFIG_STMPE811_I2CDEV +# define CONFIG_STMPE811_I2CDEV 1 +#endif + +#if CONFIG_STMPE811_I2CDEV != 1 +# error "CONFIG_STMPE811_I2CDEV must be one" +#endif + +#ifndef CONFIG_STMPE811_DEVMINOR +# define CONFIG_STMPE811_DEVMINOR 0 +#endif + +/* Board definitions ********************************************************/ +/* The STM3240G-EVAL has two STMPE811QTR I/O expanders on board both connected + * to the STM32 via I2C1. They share a common interrupt line: PI2. + * + * STMPE811 U24, I2C address 0x41 (7-bit) + * ------ ---- ---------------- -------------------------------------------- + * STPE11 PIN BOARD SIGNAL BOARD CONNECTION + * ------ ---- ---------------- -------------------------------------------- + * Y- TouchScreen_Y- LCD Connector XL + * X- TouchScreen_X- LCD Connector XR + * Y+ TouchScreen_Y+ LCD Connector XD + * X+ TouchScreen_X+ LCD Connector XU + * IN3 EXP_IO9 + * IN2 EXP_IO10 + * IN1 EXP_IO11 + * IN0 EXP_IO12 + * + * STMPE811 U29, I2C address 0x44 (7-bit) + * ------ ---- ---------------- -------------------------------------------- + * STPE11 PIN BOARD SIGNAL BOARD CONNECTION + * ------ ---- ---------------- -------------------------------------------- + * Y- EXP_IO1 + * X- EXP_IO2 + * Y+ EXP_IO3 + * X+ EXP_IO4 + * IN3 EXP_IO5 + * IN2 EXP_IO6 + * IN1 EXP_IO7 + * IN0 EXP_IO8 + */ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32_stmpe811config_s +{ + /* Configuration structure as seen by the STMPE811 driver */ + + struct stmpe811_config_s config; + + /* Additional private definitions only known to this driver */ + + STMPE811_HANDLE handle; /* The STMPE811 driver handle */ + xcpt_t handler; /* The STMPE811 interrupt handler */ +}; + +/**************************************************************************** + * Static Function Prototypes + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind callbacks + * to isolate the STMPE811 driver from differences in GPIO + * interrupt handling by varying boards and MCUs.* so that contact and loss-of-contact events can be detected. + * + * attach - Attach the STMPE811 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + */ + +static int stmpe811_attach(FAR struct stmpe811_config_s *state, xcpt_t isr); +static void stmpe811_enable(FAR struct stmpe811_config_s *state, bool enable); +static void stmpe811_clear(FAR struct stmpe811_config_s *state); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the STMPE811 + * driver. This structure provides information about the configuration + * of the STMPE811 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writable because, under certain circumstances, the driver + * may modify frequency or X plate resistance values. + */ + +#ifndef CONFIG_STMPE811_TSC_DISABLE +static struct stm32_stmpe811config_s g_stmpe811config = +{ + .config = + { +#ifdef CONFIG_STMPE811_I2C + .address = STMPE811_ADDR1, +#endif + .frequency = CONFIG_STMPE811_FREQUENCY, + +#ifdef CONFIG_STMPE811_MULTIPLE + .irq = STM32_IRQ_EXTI2, +#endif + .ctrl1 = (ADC_CTRL1_SAMPLE_TIME_80 | ADC_CTRL1_MOD_12B), + .ctrl2 = ADC_CTRL2_ADC_FREQ_3p25, + + .attach = stmpe811_attach, + .enable = stmpe811_enable, + .clear = stmpe811_clear, + }, + .handler = NULL, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the STMPE811 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. + * + * attach - Attach the STMPE811 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + */ + +static int stmpe811_attach(FAR struct stmpe811_config_s *state, xcpt_t isr) +{ + FAR struct stm32_stmpe811config_s *priv = (FAR struct stm32_stmpe811config_s *)state; + + ivdbg("Saving handler %p\n", isr); + DEBUGASSERT(priv); + + /* Just save the handler. We will use it when EXTI interruptsare enabled */ + + priv->handler = isr; + return OK; +} + +static void stmpe811_enable(FAR struct stmpe811_config_s *state, bool enable) +{ + FAR struct stm32_stmpe811config_s *priv = (FAR struct stm32_stmpe811config_s *)state; + irqstate_t flags; + + /* Attach and enable, or detach and disable. Enabling and disabling GPIO + * interrupts is a multi-step process so the safest thing is to keep + * interrupts disabled during the reconfiguration. + */ + + flags = enter_critical_section(); + if (enable) + { + /* Configure the EXTI interrupt using the SAVED handler */ + + (void)stm32_gpiosetevent(GPIO_IO_EXPANDER, true, true, true, priv->handler); + } + else + { + /* Configure the EXTI interrupt with a NULL handler to disable it */ + + (void)stm32_gpiosetevent(GPIO_IO_EXPANDER, false, false, false, NULL); + } + leave_critical_section(flags); +} + +static void stmpe811_clear(FAR struct stmpe811_config_s *state) +{ + /* Does nothing */ +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * configure the touchscreen device. This function will register the driver + * as /dev/inputN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ +#ifndef CONFIG_STMPE811_TSC_DISABLE + FAR struct i2c_master_s *dev; + int ret; + + idbg("minor %d\n", minor); + DEBUGASSERT(minor == 0); + + /* Check if we are already initialized */ + + if (!g_stmpe811config.handle) + { + ivdbg("Initializing\n"); + + /* Configure the STMPE811 interrupt pin as an input */ + + (void)stm32_configgpio(GPIO_IO_EXPANDER); + + /* Get an instance of the I2C interface */ + + dev = stm32_i2cbus_initialize(CONFIG_STMPE811_I2CDEV); + if (!dev) + { + idbg("Failed to initialize I2C bus %d\n", CONFIG_STMPE811_I2CDEV); + return -ENODEV; + } + + /* Instantiate the STMPE811 driver */ + + g_stmpe811config.handle = + stmpe811_instantiate(dev, (FAR struct stmpe811_config_s *)&g_stmpe811config); + if (!g_stmpe811config.handle) + { + idbg("Failed to instantiate the STMPE811 driver\n"); + return -ENODEV; + } + + /* Initialize and register the I2C touchscreen device */ + + ret = stmpe811_register(g_stmpe811config.handle, CONFIG_STMPE811_DEVMINOR); + if (ret < 0) + { + idbg("Failed to register STMPE driver: %d\n", ret); + /* stm32_i2cbus_uninitialize(dev); */ + return -ENODEV; + } + } + + return OK; +#else + return -ENOSYS; +#endif +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* No support for un-initializing the touchscreen STMPE811 device yet */ +} + +#endif /* CONFIG_INPUT_STMPE811 */ + diff --git a/configs/stm3240g-eval/src/stm32_usb.c b/configs/stm3240g-eval/src/stm32_usb.c new file mode 100644 index 0000000000000000000000000000000000000000..449c80af8ebbc3cb59c8d2e35a8861f8eecc8cbd --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_usb.c @@ -0,0 +1,310 @@ +/************************************************************************************ + * configs/stm3240g-eval/src/stm32_usbdev.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm32_otgfs.h" +#include "stm3240g-eval.h" + +#ifdef CONFIG_STM32_OTGFS + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST) +# define HAVE_USB 1 +#else +# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST" +# undef HAVE_USB +#endif + +#ifndef CONFIG_USBHOST_DEFPRIO +# define CONFIG_USBHOST_DEFPRIO 50 +#endif + +#ifndef CONFIG_USBHOST_STACKSIZE +# ifdef CONFIG_USBHOST_HUB +# define CONFIG_USBHOST_STACKSIZE 1536 +# else +# define CONFIG_USBHOST_STACKSIZE 1024 +# endif +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static struct usbhost_connection_s *g_usbconn; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: usbhost_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static int usbhost_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + uvdbg("Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + uvdbg("%s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the STM3240G-EVAL board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + /* The OTG FS has an internal soft pull-up. No GPIO configuration is required */ + + /* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */ + +#ifdef CONFIG_STM32_OTGFS + stm32_configgpio(GPIO_OTGFS_VBUS); + stm32_configgpio(GPIO_OTGFS_PWRON); + stm32_configgpio(GPIO_OTGFS_OVER); +#endif +} + +/*********************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +int stm32_usbhost_initialize(void) +{ + int pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + uvdbg("Register class drivers\n"); + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB mass storage class class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + + /* Then get an instance of the USB host interface */ + + uvdbg("Initialize USB host\n"); + g_usbconn = stm32_otgfshost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + uvdbg("Start usbhost_waiter\n"); + + pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO, + CONFIG_USBHOST_STACKSIZE, + (main_t)usbhost_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + + return -ENODEV; +} +#endif + +/*********************************************************************************** + * Name: stm32_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be provided be + * each platform that implements the STM32 OTG FS host interface + * + * "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump + * or, if 5 V are available on the application board, a basic power switch, must + * be added externally to drive the 5 V VBUS line. The external charge pump can + * be driven by any GPIO output. When the application decides to power on VBUS + * using the chosen GPIO, it must also set the port power bit in the host port + * control and status register (PPWR bit in OTG_FS_HPRT). + * + * "The application uses this field to control power to this port, and the core + * clears this bit on an overcurrent condition." + * + * Input Parameters: + * iface - For future growth to handle multiple USB host interface. Should be zero. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +void stm32_usbhost_vbusdrive(int iface, bool enable) +{ + DEBUGASSERT(iface == 0); + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, false); + } + else + { + /* Disable the Power Switch by driving the enable pin high */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, true); + } +} +#endif + +/************************************************************************************ + * Name: stm32_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent condition is + * detected. + * + * Input Parameter: + * handler - New overcurrent interrupt handler + * + * Returned value: + * Old overcurrent interrupt handler + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +xcpt_t stm32_setup_overcurrent(xcpt_t handler) +{ + return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler); +} +#endif + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} +#endif + +#endif /* CONFIG_STM32_OTGFS */ + + + diff --git a/configs/stm3240g-eval/src/stm32_userleds.c b/configs/stm3240g-eval/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..eadca33b22794aae072525dabe53259ad61cfe87 --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_userleds.c @@ -0,0 +1,124 @@ +/**************************************************************************** + * configs/stm3240g_eval/src/stm32_userleds.c + * + * Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "stm3240g-eval.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* This array maps an LED number to GPIO pin configuration */ + +static uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4 +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + stm32_gpiowrite(g_ledcfg[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0); + stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0); + stm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) == 0); + stm32_gpiowrite(GPIO_LED4, (ledset & BOARD_LED4_BIT) == 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/stm3240g-eval/src/stm32_watchdog.c b/configs/stm3240g-eval/src/stm32_watchdog.c new file mode 100644 index 0000000000000000000000000000000000000000..d778f195d8c8b7d90c00014fef4e3a5f13e80bec --- /dev/null +++ b/configs/stm3240g-eval/src/stm32_watchdog.c @@ -0,0 +1,135 @@ +/************************************************************************************ + * configs/stm3240g-eval/src/stm32_watchdog.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Wathdog hardware should be enabled */ + +#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG) +# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_STM32_WDG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0" +# endif +#endif + +/* Use the un-calibrated LSI frequency if we have nothing better */ + +#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ) +# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecuture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ + /* Initialize tha register the watchdog timer device */ + +#if defined(CONFIG_STM32_WWDG) + stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH); + return OK; +#elif defined(CONFIG_STM32_IWDG) + stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ); + return OK; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/stm3240g-eval/telnetd/Make.defs b/configs/stm3240g-eval/telnetd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..34a6989ef177b84bb812f8ca2de6bbe386175532 --- /dev/null +++ b/configs/stm3240g-eval/telnetd/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3240g-eval/telnetd/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3240g-eval/telnetd/defconfig b/configs/stm3240g-eval/telnetd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..56cd01cf5db0ce704c92528b35e8c51228d2403c --- /dev/null +++ b/configs/stm3240g-eval/telnetd/defconfig @@ -0,0 +1,1186 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +CONFIG_ARCH_CHIP_STM32F407IG=y +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3240G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3240g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="telnetd_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +CONFIG_EXAMPLES_TELNETD=y +CONFIG_EXAMPLES_TELNETD_NOMAC=y +CONFIG_EXAMPLES_TELNETD_IPADDR=0x0a000002 +CONFIG_EXAMPLES_TELNETD_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_TELNETD_NETMASK=0xffffff00 +CONFIG_EXAMPLES_TELNETD_DAEMONPRIO=128 +CONFIG_EXAMPLES_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_EXAMPLES_TELNETD_CLIENTPRIO=128 +CONFIG_EXAMPLES_TELNETD_CLIENTSTACKSIZE=2048 +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/telnetd/setenv.sh b/configs/stm3240g-eval/telnetd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..7da487bd534b9185fbd24a176799b91e75594f2f --- /dev/null +++ b/configs/stm3240g-eval/telnetd/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm3240g-eval/telnetd/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3240g-eval/webserver/Make.defs b/configs/stm3240g-eval/webserver/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..bf77efb4e8bd406b1a30441cd87ccf9cce284500 --- /dev/null +++ b/configs/stm3240g-eval/webserver/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3240g-eval/webserver/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3240g-eval/webserver/defconfig b/configs/stm3240g-eval/webserver/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..2e3767b6f1f483ecfb3ddfe7ad7cf546d070eb72 --- /dev/null +++ b/configs/stm3240g-eval/webserver/defconfig @@ -0,0 +1,1431 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +CONFIG_ARCH_CHIP_STM32F407IG=y +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +CONFIG_STM32_CCMEXCLUDE=y +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# I2C Configuration +# +# CONFIG_STM32_I2C_ALT is not set +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_MAGIC_REG=0 +CONFIG_RTC_MAGIC=0xfacefeee +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3240G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3240g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="webserver_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_POLLED=y +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +CONFIG_RTC_NALARMS=2 +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +# CONFIG_MTD_PARTITION is not set +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_BYTE_WRITE is not set +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_SMART is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +CONFIG_ETH0_PHY_NONE=y +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +# CONFIG_NETDB_DNSCLIENT is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_NETTEST=y +# CONFIG_EXAMPLES_NETTEST_SERVER is not set +# CONFIG_EXAMPLES_NETTEST_PERFORMANCE is not set +CONFIG_EXAMPLES_NETTEST_IPv4=y +CONFIG_EXAMPLES_NETTEST_INIT=y +CONFIG_EXAMPLES_NETTEST_NOMAC=y + +# +# IPv4 addresses +# +CONFIG_EXAMPLES_NETTEST_IPADDR=0x0a000002 +CONFIG_EXAMPLES_NETTEST_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_NETTEST_NETMASK=0xffffff00 +CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +CONFIG_EXAMPLES_WEBSERVER=y +CONFIG_EXAMPLES_WEBSERVER_IPADDR=0x0a000002 +CONFIG_EXAMPLES_WEBSERVER_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_WEBSERVER_NETMASK=0xffffff00 +CONFIG_EXAMPLES_WEBSERVER_NOMAC=y +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +# CONFIG_NETUTILS_TFTPC is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +CONFIG_NETUTILS_WEBSERVER=y +# CONFIG_NETUTILS_HTTPD_SINGLECONNECT is not set +# CONFIG_NETUTILS_HTTPD_SCRIPT_DISABLE is not set +CONFIG_NETUTILS_HTTPD_MAXPATH=64 +# CONFIG_NETUTILS_HTTPD_CGIPATH is not set +CONFIG_NETUTILS_HTTPD_ERRPATH="" +# CONFIG_NETUTILS_HTTPD_SERVERHEADER_DISABLE is not set +CONFIG_NETUTILS_HTTPD_TIMEOUT=0 +CONFIG_NETUTILS_HTTPD_CLASSIC=y +# CONFIG_NETUTILS_HTTPD_MMAP is not set +# CONFIG_NETUTILS_HTTPD_SENDFILE is not set +CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/webserver/setenv.sh b/configs/stm3240g-eval/webserver/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..779605964e209ddbff4dd107daaa8e35192b40fe --- /dev/null +++ b/configs/stm3240g-eval/webserver/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm3240g-eval/webserver/setenv.sh +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm3240g-eval/xmlrpc/Make.defs b/configs/stm3240g-eval/xmlrpc/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f196d3b4f3a8c065abe250dd986640fc33e54c77 --- /dev/null +++ b/configs/stm3240g-eval/xmlrpc/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm3240g-eval/xmlrpc/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm3240g-eval/xmlrpc/defconfig b/configs/stm3240g-eval/xmlrpc/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..f5cbd7e159a66af8941dabeee2bd7bf101df6c4f --- /dev/null +++ b/configs/stm3240g-eval/xmlrpc/defconfig @@ -0,0 +1,1253 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +CONFIG_ARCH_CHIP_STM32F407IG=y +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_I2C=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART3_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# I2C Configuration +# +# CONFIG_STM32_I2C_ALT is not set +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=500 +CONFIG_STM32_I2CTIMEOTICKS=500 +# CONFIG_STM32_I2C_DUTY16_9 is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +CONFIG_STM32_MII_MCO1=y +# CONFIG_STM32_MII_MCO2 is not set +# CONFIG_STM32_MII_EXTCLK is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=196608 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM3240G_EVAL=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm3240g-eval" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="xmlrpc_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_POLLED=y +# CONFIG_I2C_RESET is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +CONFIG_ARCH_HAVE_USART3=y +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART3_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=128 +CONFIG_USART3_TXBUFSIZE=128 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=650 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +CONFIG_NET_ARP_IPIN=y +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +# CONFIG_NETDB_DNSSERVER_NOADDR is not set +CONFIG_NETDB_DNSSERVER_IPv4=y +CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001 + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set +CONFIG_EXAMPLES_XMLRPC=y +CONFIG_EXAMPLES_XMLRPC_BUFFERSIZE=1024 +CONFIG_EXAMPLES_XMLRPC_DHCPC=y +CONFIG_EXAMPLES_XMLRPC_NOMAC=y +CONFIG_EXAMPLES_XMLRPC_DRIPADDR=0x0a000001 +CONFIG_EXAMPLES_XMLRPC_NETMASK=0xffffff00 + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +CONFIG_NETUTILS_DHCPC=y +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +CONFIG_NETUTILS_XMLRPC=y +CONFIG_XMLRPC_STRINGSIZE=64 +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/xmlrpc/setenv.sh b/configs/stm3240g-eval/xmlrpc/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..b73264106b28a4d2a30146115451214c121ffa20 --- /dev/null +++ b/configs/stm3240g-eval/xmlrpc/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm3240g-eval/xmlrpc/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32_tiny/Kconfig b/configs/stm32_tiny/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..e9f38478f417ed05ff84d2ec686792c9f3dc619f --- /dev/null +++ b/configs/stm32_tiny/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_STM32_TINY +endif diff --git a/configs/stm32_tiny/README.txt b/configs/stm32_tiny/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..1909b9dac8b4afed3679e5aee51dfb0321cbab7c --- /dev/null +++ b/configs/stm32_tiny/README.txt @@ -0,0 +1,700 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +STM32 Tiny development board. + +This board is available from several vendors on the net, and may +be sold under different names. It is based on a STM32 F103C8T6 MCU, and +is (always ?) bundled with a nRF24L01 wireless communication module. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - LEDs + - PWM + - UARTs + - Timer Inputs/Outputs + - STM32 Tiny -specific Configuration Options + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, or + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the CodeSourcery toolchain for Windows. To use + the Atollic, devkitARM, Raisonance GNU, or NuttX buildroot toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh stm32_tiny/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +==== + +The STM32Tiny board has only one software controllable LED. +This LED can be used by the board port when CONFIG_ARCH_LEDS option is +enabled. + +If enabled the LED is simply turned on when the board boots +succesfully, and is blinking on panic / assertion failed. + +PWM +=== + +The STM32 Tiny has no real on-board PWM devices, but the board can be +configured to output a pulse train using TIM3 CH2 on the GPIO line B.5 +(connected to the LED). +Please note that the CONFIG_STM32_TIM3_PARTIAL_REMAP option must be enabled +in this case. + +UARTs +===== + +UART/USART PINS +--------------- + +USART1 + RX PA10 + TX PA9 +USART2 + CK PA4 + CTS PA0* + RTS PA1 + RX PA3 + TX PA2 +USART3 + CK PB12* + CTS PB13* + RTS PB14* + RX PB11 + TX PB10 + +* theses IO lines are intended to be used by the wireless module on the board. + + +Default USART/UART Configuration +-------------------------------- + +USART1 (RX & TX only) is available through the RS-232 port on the board. A MAX232 chip converts +voltage to RS-232 level. This serial port can be used to flash a firmware using the boot loader +integrated in the MCU. + + +Timer Inputs/Outputs +==================== + +TIM1 + CH1 PA8 + CH2 PA9* + CH3 PA10* + CH4 PA11* +TIM2 + CH1 PA0*, PA15, PA5 + CH2 PA1, PB3 + CH3 PA2, PB10* + CH4 PA3, PB11 +TIM3 + CH1 PA6, PB4 + CH2 PA7, PB5* + CH3 PB0 + CH4 PB1* +TIM4 + CH1 PB6* + CH2 PB7 + CH3 PB8 + CH4 PB9* + + * Indicates pins that have other on-board functions and should be used only + with care (See board datasheet). + + +STM32 Tiny - specific Configuration Options +=============================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32F103C8=y + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=stm32_tiny + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_STM32_TINY=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=20480 (20Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + AHB + --- + CONFIG_STM32_CRC + CONFIG_STM32_BKPSRAM + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_WWDG + CONFIG_STM32_IWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_CAN1 + CONFIG_STM32_PWR -- Required for RTC + + APB2 + ---- + CONFIG_STM32_TIM1 + CONFIG_STM32_USART1 + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + CONFIG_STM32_SPI1 + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation or ADC conversion. + Note that ADC require two definitions: Not only do you have + to assign the timer (n) for used by the ADC, but then you also have to + configure which ADC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + JTAG Enable settings (by default only SW-DP is enabled): + + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + + STM32Tiny specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) + for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + STM32Tiny CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + + STM32Tiny SPI Configuration + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + +Configurations +============== + +Each STM32Tiny configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh STM32Tiny/ + cd - + . ./setenv.sh + +If this is a Windows native build, then configure.bat should be used +instead of configure.sh: + + configure.bat STM32Tiny\ + +Where is one of the following: + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. This + configuration enables a console on UART1. Support for + builtin applications is enabled, but in the base configuration no + builtin applications are selected (see NOTES below). + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + 3. This example supports the PWM test (apps/examples/pwm) but this must + be manually enabled by selecting: + + CONFIG_PWM=y : Enable the generic PWM infrastructure + CONFIG_STM32_TIM3=y : Enable TIM3 + CONFIG_STM32_TIM3_PWM=y : Use TIM3 to generate PWM output + CONFIG_STM32_TIM3_PARTIAL_REMAP=y : Required to have the port B5 as timer PWM output (channel 2) + CONFIG_STM32_TIM3_CHANNEL=2 + + See also apps/examples/README.txt + + Note that the only supported board configuration uses the board LED as PWM output. + + Special PWM-only debug options: + + CONFIG_DEBUG_PWM + + 7. USB Support (CDC/ACM device) + + CONFIG_STM32_OTGFS=y : STM32 OTG FS support + CONFIG_USBDEV=y : USB device support must be enabled + CONFIG_CDCACM=y : The CDC/ACM driver must be built + CONFIG_NSH_BUILTIN_APPS=y : NSH built-in application support must be enabled + CONFIG_NSH_ARCHINIT=y : To perform USB initialization + + 8. Using the USB console. + + The STM32Tiny NSH configuration can be set up to use a USB CDC/ACM + (or PL2303) USB console. The normal way that you would configure the + the USB console would be to change the .config file like this: + + CONFIG_STM32_OTGFS=y : STM32 OTG FS support + CONFIG_USART2_SERIAL_CONSOLE=n : Disable the USART2 console + CONFIG_DEV_CONSOLE=n : Inhibit use of /dev/console by other logic + CONFIG_USBDEV=y : USB device support must be enabled + CONFIG_CDCACM=y : The CDC/ACM driver must be built + CONFIG_CDCACM_CONSOLE=y : Enable the CDC/ACM USB console. + + NOTE: When you first start the USB console, you have hit ENTER a few + times before NSH starts. The logic does this to prevent sending USB data + before there is anything on the host side listening for USB serial input. + + 9. Here is an alternative USB console configuration. The following + configuration will also create a NSH USB console but this version + will use /dev/console. Instead, it will use the normal /dev/ttyACM0 + USB serial device for the console: + + CONFIG_STM32_OTGFS=y : STM32 OTG FS support + CONFIG_USART2_SERIAL_CONSOLE=y : Keep the USART2 console + CONFIG_DEV_CONSOLE=y : /dev/console exists (but NSH won't use it) + CONFIG_USBDEV=y : USB device support must be enabled + CONFIG_CDCACM=y : The CDC/ACM driver must be built + CONFIG_CDCACM_CONSOLE=n : Don't use the CDC/ACM USB console. + CONFIG_NSH_USBCONSOLE=y : Instead use some other USB device for the console + + The particular USB device that is used is: + + CONFIG_NSH_USBCONDEV="/dev/ttyACM0" + + The advantage of this configuration is only that it is easier to + bet working. This alternative does has some side effects: + + - When any other device other than /dev/console is used for a user + interface, linefeeds (\n) will not be expanded to carriage return / + linefeeds (\r\n). You will need to set your terminal program to account + for this. + + - /dev/console still exists and still refers to the serial port. So + you can still use certain kinds of debug output (see include/debug.h, all + of the interfaces based on lowsyslog will work in this configuration). + + - But don't enable USB debug output! Since USB is console is used for + USB debug output and you are using a USB console, there will be + infinite loops and deadlocks: Debug output generates USB debug + output which generatates USB debug output, etc. If you want USB + debug output, you should consider enabling USB trace + (CONFIG_USBDEV_TRACE) and perhaps the USB monitor (CONFIG_SYSTEM_USBMONITOR). + + See the usbnsh configuration below for more information on configuring + USB trace output and the USB monitor. + + usbnsh: + ------- + + This is another NSH example. If differs from other 'nsh' configurations + in that this configurations uses a USB serial device for console I/O. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + 3. This configuration does have UART2 output enabled and set up as + the system logging device: + + CONFIG_SYSLOG=y : Enable output to syslog, not console + CONFIG_SYSLOG_CHAR=y : Use a character device for system logging + CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0 + + However, there is nothing to generate SYLOG output in the default + configuration so nothing should appear on UART2 unless you enable + some debug output or enable the USB monitor. + + 4. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB + device will save encoded trace output in in-memory buffer; if the + USB monitor is enabled, that trace buffer will be periodically + emptied and dumped to the system loggin device (UART2 in this + configuraion): + + CONFIG_USBDEV_TRACE=y : Enable USB trace feature + CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory + CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH + CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor + CONFIG_SYSTEM_USBMONITOR=y : Enable the USB monitor daemon + CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size + CONFIG_SYSTEM_USBMONITOR_PRIORITY=50 : USB monitor daemon priority + CONFIG_SYSTEM_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds + + CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y : Enable TRACE output + CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y + CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y + CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y + CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y + + 5. By default, this project assumes that you are *NOT* using the DFU + bootloader. + + Using the Prolifics PL2303 Emulation + ------------------------------------ + You could also use the non-standard PL2303 serial device instead of + the standard CDC/ACM serial device by changing: + + CONFIG_CDCACM=y : Disable the CDC/ACM serial device class + CONFIG_CDCACM_CONSOLE=y : The CDC/ACM serial device is NOT the console + CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled + CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console diff --git a/configs/stm32_tiny/include/board.h b/configs/stm32_tiny/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..d393437c50ca0655c5f8aa865f8e2262dec622ef --- /dev/null +++ b/configs/stm32_tiny/include/board.h @@ -0,0 +1,194 @@ +/************************************************************************************ + * configs/stm32_tiny/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* On-board crystal frequency is 8MHz (HSE) */ + +#define STM32_BOARD_XTAL 8000000ul + +/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */ + +#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC +#define STM32_CFGR_PLLXTPRE 0 +#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx9 +#define STM32_PLL_FREQUENCY (9*STM32_BOARD_XTAL) + +/* Use the PLL and set the SYSCLK source to be the PLL */ + +#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL +#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY + +/* AHB clock (HCLK) is SYSCLK (72MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (72MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY + +/* APB2 timers 1 and 8 will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* USB divider -- Divide PLL clock by 1.5 */ + +#define STM32_CFGR_USBPRE 0 + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY + +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz + */ + +#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz + * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_SDXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* LED definitions ******************************************************************/ + +/* The board has only one controllable LED */ +#define LED_STARTED 0 /* No LEDs */ +#define LED_HEAPALLOCATE 1 /* LED1 on */ +#define LED_IRQSENABLED 2 /* LED2 on */ +#define LED_STACKCREATED 3 /* LED1 on */ +#define LED_INIRQ 4 /* LED1 off */ +#define LED_SIGNAL 5 /* LED2 on */ +#define LED_ASSERTION 6 /* LED1 + LED2 */ +#define LED_PANIC 7 /* LED1 / LED2 blinking */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +EXTERN void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/stm32_tiny/nsh/Make.defs b/configs/stm32_tiny/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..61f1d54b581a594da77d1a700ad86ee13599253a --- /dev/null +++ b/configs/stm32_tiny/nsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32_tiny/nsh/Make.defs +# +# Copyright (C) 2011, 2012-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32_tiny/nsh/defconfig b/configs/stm32_tiny/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d5e94e12524c6e41c7f37038aaba66fc3f98a9cb --- /dev/null +++ b/configs/stm32_tiny/nsh/defconfig @@ -0,0 +1,1109 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +CONFIG_SERIAL_TERMIOS=y + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +CONFIG_ARCH_CHIP_STM32F103C8=y +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI2=y +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32_TINY=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32_tiny" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=5 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +CONFIG_DRIVERS_WIRELESS=y +# CONFIG_WL_CC1101 is not set +# CONFIG_WL_CC3000 is not set +CONFIG_WL_NRF24L01=y +CONFIG_WL_NRF24L01_DFLT_ADDR_WIDTH=5 +CONFIG_WL_NRF24L01_CHECK_PARAMS=y +CONFIG_WL_NRF24L01_RXSUPPORT=y +CONFIG_WL_NRF24L01_RXFIFO_LEN=128 +# CONFIG_WL_PN532 is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_NRF24L01TERM=y +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +CONFIG_NSH_DISABLEBG=y +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +CONFIG_NSH_DISABLE_ITEF=y +CONFIG_NSH_DISABLE_LOOPS=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32_tiny/nsh/setenv.sh b/configs/stm32_tiny/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..2edc70b732d8447ea9374b358383ca8bde2c8240 --- /dev/null +++ b/configs/stm32_tiny/nsh/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/stm32_tiny/nsh/setenv.sh +# +# Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32_tiny/scripts/ld.script b/configs/stm32_tiny/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..c4ab5ea33d4aef5b1016f32cbe8b18d978164ea5 --- /dev/null +++ b/configs/stm32_tiny/scripts/ld.script @@ -0,0 +1,119 @@ +/**************************************************************************** + * configs/stm32_tiny/scripts/ld.script + * + * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F103C8T6 has 64Kb of FLASH beginning at address 0x0800:0000 and + * 20Kb of SRAM beginning at address 0x2000:0000. When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 64K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32F103C8T6 has 20Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32_tiny/src/.gitignore b/configs/stm32_tiny/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/stm32_tiny/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/stm32_tiny/src/Makefile b/configs/stm32_tiny/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..a29dd097b2dd05bb5890ccb8a93348c74455c1ee --- /dev/null +++ b/configs/stm32_tiny/src/Makefile @@ -0,0 +1,58 @@ +############################################################################ +# configs/stm32_tiny/src/Makefile +# +# Copyright (C) 2009-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Laurent Latil +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_leds.c stm32_spi.c stm32_usbdev.c + +ifeq ($(CONFIG_PWM),y) +CSRCS += stm32_pwm.c +endif + +ifeq ($(CONFIG_WL_NRF24L01),y) +CSRCS += stm32_wireless.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += stm32_watchdog.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32_tiny/src/stm32_appinit.c b/configs/stm32_tiny/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..2f117d2c2e72e8f7689a099f8869601fa5cf7b39 --- /dev/null +++ b/configs/stm32_tiny/src/stm32_appinit.c @@ -0,0 +1,76 @@ +/**************************************************************************** + * config/stm32_tiny/src/stm32_appinit.c + * + * Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#include "stm32.h" +#include "stm32_tiny.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(CONFIG_WL_NRF24L01) + syslog(LOG_INFO, "Register the nRF24L01 module"); + stm32_wlinitialize(); +#endif + + return OK; +} diff --git a/configs/stm32_tiny/src/stm32_boot.c b/configs/stm32_tiny/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..898b8590fb15a9823c4d6bfcc3357921e4356232 --- /dev/null +++ b/configs/stm32_tiny/src/stm32_boot.c @@ -0,0 +1,97 @@ +/************************************************************************************ + * configs/stm32_tiny/src/stm32_boot.c + * + * Copyright (C) 2009, 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "stm32_tiny.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) + stm32_spidev_initialize(); +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB) + stm32_usbinitialize(); +#endif +} diff --git a/configs/stm32_tiny/src/stm32_leds.c b/configs/stm32_tiny/src/stm32_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..b39f6b97ee9ee2b33d3a3ef77c2ec41440a5ea80 --- /dev/null +++ b/configs/stm32_tiny/src/stm32_leds.c @@ -0,0 +1,136 @@ +/**************************************************************************** + * configs/stm32_tiny/src/stm32_leds.c + * + * Copyright (C) 2009, 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "stm32_tiny.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static inline void set_led(bool v) +{ + ledvdbg("Turn LED %s\n", v? "on":"off"); + stm32_gpiowrite(GPIO_LED, v); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + /* Configure LED GPIO for output */ + stm32_configgpio(GPIO_LED); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + ledvdbg("board_autoled_on(%d)\n",led); + switch (led) + { + case LED_STARTED: + case LED_HEAPALLOCATE: + /* As the board provides only one soft controllable LED, we simply turn it on when the board boots */ + set_led(true); + break; + case LED_PANIC: + /* For panic state, the LED is blinking */ + set_led(true); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + case LED_PANIC: + /* For panic state, the LED is blinking */ + set_led(false); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/stm32_tiny/src/stm32_pwm.c b/configs/stm32_tiny/src/stm32_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..715d8d3a700928de513c0deb395f14c5bbc1b738 --- /dev/null +++ b/configs/stm32_tiny/src/stm32_pwm.c @@ -0,0 +1,119 @@ +/************************************************************************************ + * configs/stm32_tiny/src/stm32_pwm.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "stm32_pwm.h" +#include "stm32_tiny.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* PWM + * + * The STM32 Tiny board provides a LED on GPIO line B5. + */ + +#ifdef CONFIG_PWM + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + pwm = stm32_pwminitialize(STM32TINY_PWMTIMER); + if (!pwm) + { + adbg("Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/stm32_tiny/src/stm32_spi.c b/configs/stm32_tiny/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..0af605950843d06dd9da1215cb047a918ef3a26e --- /dev/null +++ b/configs/stm32_tiny/src/stm32_spi.c @@ -0,0 +1,186 @@ +/************************************************************************************ + * configs/stm32_tiny/src/stm32_spi.c + * + * Copyright (C) 2009, 2011-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "stm32_tiny.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_SPI +#endif + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the HY-MiniSTM32 board. + * + ************************************************************************************/ + +void stm32_spidev_initialize(void) +{ + /* NOTE: Clocking for SPI1 and/or SPI2 was already provided in stm32_rcc.c. + * Configurations of SPI pins is performed in stm32_spi.c. + * Here, we only initialize chip select pins unique to the board + * architecture. + */ + +#ifdef CONFIG_STM32_SPI2 +# ifdef CONFIG_WL_NRF24L01 + /* Configure the SPI-based NRF24L01 chip select GPIO */ + spivdbg("Configure GPIO for SPI2/CS\n"); + stm32_configgpio(GPIO_NRF24L01_CS); +# endif +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2select and stm32_spi1/2status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + switch(devid) + { +#ifdef CONFIG_WL_NRF24L01 + case SPIDEV_WIRELESS: + spivdbg("nRF24L01 device %s\n", selected ? "asserted" : "de-asserted"); + + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_NRF24L01_CS, !selected); + break; +#endif + default: + break; + } +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t status = 0; + switch(devid) + { +#ifdef CONFIG_WL_NRF24L01 + case SPIDEV_WIRELESS: + status |= SPI_STATUS_PRESENT; + break; +#endif + default: + break; + } + return status; +} + +#endif + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/stm32_tiny/src/stm32_tiny.h b/configs/stm32_tiny/src/stm32_tiny.h new file mode 100644 index 0000000000000000000000000000000000000000..daadcf2605c8551eb294680862a8969a8b8d0ecc --- /dev/null +++ b/configs/stm32_tiny/src/stm32_tiny.h @@ -0,0 +1,148 @@ +/************************************************************************************ + * configs/stm32_tiny/src/stm32_tiny.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_STM32_TINY_H +#define __CONFIGS_STM32_TINY_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* How many SPI modules does this chip support? The LM3S6918 supports 2 SPI + * modules (others may support more -- in such case, the following must be + * expanded). + */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +#endif + +/* GPIOs **************************************************************/ +/* LEDs */ + +#define GPIO_LED (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN5) + +/* USB Soft Connect Pullup: PC.13 */ + +#define GPIO_USB_PULLUP (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13) + +/* NRF24L01 chip select: PB.12 */ + +#define GPIO_NRF24L01_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN12) + +/* NRF24L01 chip enable: PB.1 */ + +#define GPIO_NRF24L01_CE (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN1) + +/* NRF24L01 IRQ line: PA.0 */ + +#define GPIO_NRF24L01_IRQ (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTA|GPIO_PIN0) + +/* PWM + * + * Let's use the LED. It is connected to PB.5, which can be used as PWM output of channel 2 of timer 3 + * (STM32_TIM3_PARTIAL_REMAP must be enabled) + */ + +#ifdef CONFIG_PWM +# if defined(CONFIG_STM32_TIM3_PWM) && defined(CONFIG_STM32_TIM3_PARTIAL_REMAP) && CONFIG_STM32_TIM3_CHANNEL == 2 +# define STM32TINY_PWMTIMER 3 +# else +# error To use the PWM device, the timer 3 partial remap must be enabled, and the PWM device must be configured on timer 3 / channel 2 +# endif +#endif + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Hy-Mini STM32v board. + * + ************************************************************************************/ + +extern void stm32_spidev_initialize(void); + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the Hy-Mini STM32v board. + * + ************************************************************************************/ + +extern void stm32_usbinitialize(void); + +/************************************************************************************ + * Name: stm32_wlinitialize + * + * Description: + * Called to configure wireless module (nRF24L01). + * + ************************************************************************************/ + +extern void stm32_wlinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_HYMINI_STM32V_H */ + diff --git a/configs/stm32_tiny/src/stm32_usbdev.c b/configs/stm32_tiny/src/stm32_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..80e3671e3bfd0e345608a41b7d86ac5435894f63 --- /dev/null +++ b/configs/stm32_tiny/src/stm32_usbdev.c @@ -0,0 +1,117 @@ +/************************************************************************************ + * configs/stm32_tiny/src/stm32_usbdev.c + * + * Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm32_tiny.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the Hy-Mini STM32v board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + ulldbg("called\n"); + + /* USB Soft Connect Pullup */ + stm32_configgpio(GPIO_USB_PULLUP); +} + +/************************************************************************************ + * Name: stm32_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB software + * connect and disconnect), then the board software must provide stm32_pullup. + * See include/nuttx/usb/usbdev.h for additional description of this method. + * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be + * NULL. + * + ************************************************************************************/ + +int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); + stm32_gpiowrite(GPIO_USB_PULLUP, !enable); + return OK; +} + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} + diff --git a/configs/stm32_tiny/src/stm32_watchdog.c b/configs/stm32_tiny/src/stm32_watchdog.c new file mode 100644 index 0000000000000000000000000000000000000000..a2ae5963f3b64ff488d4650ebbee12b989f17ef0 --- /dev/null +++ b/configs/stm32_tiny/src/stm32_watchdog.c @@ -0,0 +1,135 @@ +/************************************************************************************ + * configs/stm_tiny/src/stm32_watchdog.c + * + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Wathdog hardware should be enabled */ + +#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG) +# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_STM32_WDG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0" +# endif +#endif + +/* Use the un-calibrated LSI frequency if we have nothing better */ + +#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ) +# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecuture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ + /* Initialize tha register the watchdog timer device */ + +#if defined(CONFIG_STM32_WWDG) + stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH); + return OK; +#elif defined(CONFIG_STM32_IWDG) + stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ); + return OK; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/stm32_tiny/src/stm32_wireless.c b/configs/stm32_tiny/src/stm32_wireless.c new file mode 100644 index 0000000000000000000000000000000000000000..5a8b6b0da95d98ed65145534bdedf42faa679bf5 --- /dev/null +++ b/configs/stm32_tiny/src/stm32_wireless.c @@ -0,0 +1,128 @@ +/************************************************************************************ + * configs/stm32_tiny/src/stm32_wireless.c + * + * Copyright (C) 2009, 2013 Gregory Nutt. All rights reserved. + * Author: Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "stm32_tiny.h" + +/************************************************************************************ + * Private Function Prototypes + ************************************************************************************/ + +static int stm32tiny_wl_irq_attach(xcpt_t isr); + +static void stm32tiny_wl_chip_enable(bool enable); + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static FAR struct nrf24l01_config_s nrf_cfg = +{ + .irqattach = stm32tiny_wl_irq_attach, + .chipenable = stm32tiny_wl_chip_enable, +}; + +static xcpt_t g_isr; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +static int stm32tiny_wl_irq_attach(xcpt_t isr) +{ + vdbg("Attach IRQ\n"); + g_isr = isr; + stm32_gpiosetevent(GPIO_NRF24L01_IRQ, false, true, false, g_isr); + return OK; +} + +static void stm32tiny_wl_chip_enable(bool enable) +{ + vdbg("CE:%d\n", enable); + stm32_gpiowrite(GPIO_NRF24L01_CE, enable); +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +void stm32_wlinitialize(void) +{ +# ifndef CONFIG_STM32_SPI2 +# error "STM32_SPI2 is required to support nRF24L01 module on this board" +# endif + + int result; + FAR struct spi_dev_s *spidev; + + /* Setup CE & IRQ line IOs */ + + stm32_configgpio(GPIO_NRF24L01_CE); + stm32_configgpio(GPIO_NRF24L01_IRQ); + + /* Init SPI bus */ + + spidev = stm32_spibus_initialize(2); + if (!spidev) + { + dbg("Failed to initialize SPI bus\n"); + return; + } + + result = nrf24l01_register(spidev, &nrf_cfg); + if (result != OK) + { + dbg("Failed to register initialize SPI bus\n"); + return; + } +} + diff --git a/configs/stm32_tiny/usbnsh/Make.defs b/configs/stm32_tiny/usbnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..0c87213a5972c41fe32cd63d693760c3e9633f4d --- /dev/null +++ b/configs/stm32_tiny/usbnsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32_tiny/usbnsh/Make.defs +# +# Copyright (C) 2011, 2012-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32_tiny/usbnsh/defconfig b/configs/stm32_tiny/usbnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..f839062025a8e5d5c49232905a36982e052eec5a --- /dev/null +++ b/configs/stm32_tiny/usbnsh/defconfig @@ -0,0 +1,1124 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +CONFIG_ARCH_CHIP_STM32F103C8=y +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ARCH_USBDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32_TINY=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32_tiny" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=5 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=6 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +CONFIG_USBDEV_TRACE=y +CONFIG_USBDEV_TRACE_NRECORDS=32 +# CONFIG_USBDEV_TRACE_STRINGS is not set +# CONFIG_USBDEV_TRACE_INITIALIDSET is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +CONFIG_NSH_DISABLE_ITEF=y +CONFIG_NSH_DISABLE_LOOPS=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set + +# +# USB Device Trace Support +# +# CONFIG_NSH_USBDEV_TRACE is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_USBMONITOR is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32_tiny/usbnsh/setenv.sh b/configs/stm32_tiny/usbnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..1fdbb9687ee05c5bf2dbc0b70055e9376f2d3ab2 --- /dev/null +++ b/configs/stm32_tiny/usbnsh/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/stm32_tiny/usbnsh/setenv.sh +# +# Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin" +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f3discovery/Kconfig b/configs/stm32f3discovery/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..de0d2da5f804e52caef006e5cd5f5693dae789c8 --- /dev/null +++ b/configs/stm32f3discovery/Kconfig @@ -0,0 +1,57 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_STM32F3_DISCOVERY + +config PM_BUTTONS + bool "PM Button support" + default n + depends on PM && ARCH_IRQBUTTONS + ---help--- + Enable PM button EXTI interrupts to support PM testing + +config PM_BUTTON_ACTIVITY + int "Button PM activity weight" + default 10 + depends on PM_BUTTONS + ---help--- + The activity weight to report to the power management subsystem when a button is pressed. + +config PM_ALARM_SEC + int "PM_STANDBY delay (seconds)" + default 15 + depends on PM && RTC_ALARM + ---help--- + Number of seconds to wait in PM_STANDBY before going to PM_STANDBY mode. + +config PM_ALARM_NSEC + int "PM_STANDBY delay (nanoseconds)" + default 0 + depends on PM && RTC_ALARM + ---help--- + Number of additional nanoseconds to wait in PM_STANDBY before going to PM_STANDBY mode. + +config PM_SLEEP_WAKEUP + bool "PM_SLEEP wake-up alarm" + default n + depends on PM && RTC_ALARM + ---help--- + Wake-up of PM_SLEEP mode after a delay and resume normal operation. + +config PM_SLEEP_WAKEUP_SEC + int "PM_SLEEP delay (seconds)" + default 10 + depends on PM && RTC_ALARM + ---help--- + Number of seconds to wait in PM_SLEEP before going to PM_STANDBY mode. + +config PM_SLEEP_WAKEUP_NSEC + int "PM_SLEEP delay (nanoseconds)" + default 0 + depends on PM && RTC_ALARM + ---help--- + Number of additional nanoseconds to wait in PM_SLEEP before going to PM_STANDBY mode. + +endif diff --git a/configs/stm32f3discovery/README.txt b/configs/stm32f3discovery/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..4c5a16c803e92b2de4a37286e7d786f0014ce057 --- /dev/null +++ b/configs/stm32f3discovery/README.txt @@ -0,0 +1,841 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +STMicro STM32F3Discovery development board. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - LEDs + - Serial Console + - FPU + - Debugging + - STM32F3Discovery-specific Configuration Options + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, or + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the CodeSourcery toolchain for Windows. To use + the Atollic, devkitARM, Raisonance GNU, or NuttX buildroot toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh STM32F3Discovery/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +==== + +The STM32F3Discovery board has ten LEDs. Two of these are controlled by +logic on the board and are not available for software control: + +LD1 PWR: red LED indicates that the board is powered. +LD2 COM: LD2 default status is red. LD2 turns to green to indicate that + communications are in progress between the PC and the ST-LINK/V2. + +And eight can be controlled by software: + +User LD3: red LED is a user LED connected to the I/O PE9 of the + STM32F303VCT6. +User LD4: blue LED is a user LED connected to the I/O PE8 of the + STM32F303VCT6. +User LD5: orange LED is a user LED connected to the I/O PE10 of the + STM32F303VCT6. +User LD6: green LED is a user LED connected to the I/O PE15 of the + STM32F303VCT6. +User LD7: green LED is a user LED connected to the I/O PE11 of the + STM32F303VCT6. +User LD8: orange LED is a user LED connected to the I/O PE14 of the + STM32F303VCT6. +User LD9: blue LED is a user LED connected to the I/O PE12 of the + STM32F303VCT6. +User LD10: red LED is a user LED connected to the I/O PE13 of the + STM32F303VCT6. + +These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/up_leds.c. The LEDs are used to encode OS-related +events as follows: + + SYMBOL Meaning LED state + Initially all LEDs are OFF + ------------------- ----------------------- ------------- ------------ + LED_STARTED NuttX has been started LD3 ON + LED_HEAPALLOCATE Heap has been allocated LD4 ON + LED_IRQSENABLED Interrupts enabled LD4 ON + LED_STACKCREATED Idle stack created LD6 ON + LED_INIRQ In an interrupt LD7 should glow + LED_SIGNAL In a signal handler LD8 might glow + LED_ASSERTION An assertion failed LD9 ON while handling the assertion + LED_PANIC The system has crashed LD10 Blinking at 2Hz + LED_IDLE STM32 is is sleep mode (Optional, not used) + +Serial Console +============== + +The STM32F3Discovery has no on-board RS-232 driver, however USART2 is +configuration as the serial console in all configurations that use a serial +console. + +There are many options for USART2 RX and TX pins. They configured to use +PA2 (TX) and PA3 (RX) for connection to an external serial device because of +the following settings in the include/board.h file: + + #define GPIO_USART2_RX GPIO_USART2_RX_2 + #define GPIO_USART2_TX GPIO_USART2_TX_2 + +This can be found on the board at: + + TX, PA2, Connector P1, pin 14 + RX, PA3, Connector P1, pin 11 + +FPU +=== + +FPU Configuration Options +------------------------- + +There are two version of the FPU support built into the STM32 port. + +1. Lazy Floating Point Register Save. + + This is an untested implementation that saves and restores FPU registers + only on context switches. This means: (1) floating point registers are + not stored on each context switch and, hence, possibly better interrupt + performance. But, (2) since floating point registers are not saved, + you cannot use floating point operations within interrupt handlers. + + This logic can be enabled by simply adding the following to your .config + file: + + CONFIG_ARCH_FPU=y + +2. Non-Lazy Floating Point Register Save + + Mike Smith has contributed an extensive re-write of the ARMv7-M exception + handling logic. This includes verified support for the FPU. These changes + have not yet been incorporated into the mainline and are still considered + experimental. These FPU logic can be enabled with: + + CONFIG_ARCH_FPU=y + CONFIG_ARMV7M_CMNVECTOR=y + + You will probably also changes to the ld.script in if this option is selected. + This should work: + + -ENTRY(_stext) + +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ + +EXTERN(_vectors) /* Force the vectors to be included in the output */ + +CFLAGS +------ + +Only recent GCC toolchains have built-in support for the Cortex-M4 FPU. You will see +the following lines in each Make.defs file: + + ifeq ($(CONFIG_ARCH_FPU),y) + ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard + else + ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + endif + +Configuration Changes +--------------------- + +Below are all of the configuration changes that I had to make to configs/stm3240g-eval/nsh2 +in order to successfully build NuttX using the Atollic toolchain WITH FPU support: + + -CONFIG_ARCH_FPU=n : Enable FPU support + +CONFIG_ARCH_FPU=y + + -CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : Disable the CodeSourcery toolchain + +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n + + -CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=n : Enable the Atollic toolchain + +CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : + + -CONFIG_INTELHEX_BINARY=y : Suppress generation FLASH download formats + +CONFIG_INTELHEX_BINARY=n : (Only necessary with the "Lite" version) + + -CONFIG_HAVE_CXX=y : Suppress generation of C++ code + +CONFIG_HAVE_CXX=n : (Only necessary with the "Lite" version) + +See the section above on Toolchains, NOTE 2, for explanations for some of +the configuration settings. Some of the usual settings are just not supported +by the "Lite" version of the Atollic toolchain. + +Debugging +========= + +STM32 ST-LINK Utility +--------------------- +For simply writing to FLASH, I use the STM32 ST-LINK Utility. At least +version 2.4.0 is required (older versions do not recognize the STM32 F3 +device). This utility is available from free from the STMicro website. + +Debugging +--------- +If you are going to use a debugger, you should make sure that the following +settings are selection in your configuration file: + + CONFIG_DEBUG_SYMBOLS=y : Enable debug symbols in the build + CONFIG_ARMV7M_USEBASEPRI=y : Use the BASEPRI register to disable interrupts + +OpenOCD +------- +I am told that OpenOCD will work with the ST-Link, but I have never tried +it. + +https://github.com/texane/stlink +-------------------------------- +This is an open source server for the ST-Link that I have never used. + +It is also possible to use an external debugger such as the Segger JLink +(EDU or commercial models) provided: + +1) The CN4 jumpers are removed to disconnect the on-board STLinkV2 from + the STM32F3. + +2) The appropriate (20 pin connector to flying wire) adapter is used to connect + the debugger to the required pins on the expansion headers (see below). + + Note that the 1x6 header on the STLinkV2 side of the board labeled "SWD" + is for the STLink micro (STM32F1) and is not connected to the STM32F3. + +3) OpenOCD version 0.9.0 or later is used. Earlier versions support either + JTAG only or are buggy for SWD. + +The signals used with external (SWD) debugging are: + + VREF (3V) + GROUND (GND) + SWCLK (PA14) + SWIO (PA13) + SWO (PB3) + RESET (NRST) + +Atollic GDB Server +------------------ +You can use the Atollic IDE, but I have never done that either. + +STM32F3Discovery-specific Configuration Options +=============================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32F303VC=y + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=STM32F3Discovery (for the STM32F3Discovery development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_STM32F3_DISCOVERY=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP + + CONFIG_ARCH_FPU - The STM32F3Discovery supports a floating point unit (FPU) + + CONFIG_ARCH_FPU=y + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + AHB1 + ---- + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + CONFIG_STM32_CRC + CONFIG_STM32_TSC + + AHB2 + ---- + (GPIOs are always enabled) + + AHB3 + ---- + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + CONFIG_STM32_ADC3 + CONFIG_STM32_ADC4 + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_WWDG + CONFIG_STM32_IWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI3 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_USB + CONFIG_STM32_CAN1 + CONFIG_STM32_PWR -- Required for RTC + CONFIG_STM32_DAC1 + + APB2 + ---- + CONFIG_STM32_SYSCFG + CONFIG_STM32_TIM1 + CONFIG_STM32_SPI1 + CONFIG_STM32_TIM8 + CONFIG_STM32_USART1 + CONFIG_STM32_TIM15 + CONFIG_STM32_TIM16 + CONFIG_STM32_TIM17 + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + JTAG Enable settings (by default only SW-DP is enabled): + + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + + STM32F3Discovery specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + STM32F3Discovery CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + + STM32F3Discovery SPI Configuration + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + +Configurations +============== + +Each STM32F3Discovery configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh STM32F3Discovery/ + cd - + . ./setenv.sh + +If this is a Windows native build, then configure.bat should be used +instead of configure.sh: + + configure.bat STM32F3Discovery\ + +Where is one of the following: + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables the serial interfaces on USART2. Support for + builtin applications is enabled, but in the base configuration no + builtin applications are selected (see NOTES below). + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + 3. This configuration includes USB Support (CDC/ACM device) + + CONFIG_STM32_USB=y : STM32 USB device support + CONFIG_USBDEV=y : USB device support must be enabled + CONFIG_CDCACM=y : The CDC/ACM driver must be built + CONFIG_NSH_BUILTIN_APPS=y : NSH built-in application support must be enabled + CONFIG_NSH_ARCHINIT=y : To perform USB initialization + + The CDC/ACM example is included as two NSH "built-in" commands.\ + + CONFIG_SYSTEM_CDCACM=y : Enable apps/system/cdcacm + + The two commands are: + + sercon : Connect the serial device a create /dev/ttyACM0 + serdis : Disconnect the serial device. + + NOTE: The serial connections/disconnections do not work as advertised. + This is because the STM32F3Discovery board does not provide circuitry for + control of the "soft connect" USB pullup. As a result, the host PC + does not know the USB has been logically connected or disconnected. You + have to follow these steps to use USB: + + 1) Start NSH with USB disconnected + 2) enter to 'sercon' command to start the CDC/ACM device, then + 3) Connect the USB device to the host. + + and to close the connection: + + 4) Disconnect the USB device from the host + 5) Enter the 'serdis' command + + 4. This example can support the watchdog timer test (apps/examples/watchdog) + but this must be enabled by selecting: + + CONFIG_EXAMPLES_WATCHDOG=y : Enable the apps/examples/watchdog + CONFIG_WATCHDOG=y : Enables watchdog timer driver support + CONFIG_STM32_WWDG=y : Enables the WWDG timer facility, OR + CONFIG_STM32_IWDG=y : Enables the IWDG timer facility (but not both) + + The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result, + has a maximum timeout value of 49 milliseconds. for WWDG watchdog, you + should also add the fillowing to the configuration file: + + CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20 + CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49 + + The IWDG timer has a range of about 35 seconds and should not be an issue. + + usbnsh: + ------- + + This is another NSH example. If differs from other 'nsh' configurations + in that this configurations uses a USB serial device for console I/O. + Such a configuration is useful on the stm32f3discovery which has no + builtin RS-232 drivers. + + Status: As of this writing, this configuration has not ran properly. + There appears to be some kind of driver-related issue. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + Build Setup: + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + + System Type: + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + 3. This configuration does have USART2 output enabled and set up as + the system logging device: + + Device Drivers -> System Logging Device Options: + CONFIG_SYSLOG=y : Enable output to syslog, not console + CONFIG_SYSLOG_CHAR=y : Use a character device for system logging + CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : USART2 will be /dev/ttyS0 + + However, there is nothing to generate SYLOG output in the default + configuration so nothing should appear on USART2 unless you enable + some debug output or enable the USB monitor. + + NOTE: Using the SYSLOG to get debug output has limitations. Among + those are that you cannot get debug output from interrupt handlers. + So, in particularly, debug output is not a useful way to debug the + USB device controller driver. Instead, use the USB monitor with + USB debug off and USB trance on (see below). + + 4. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB + device will save encoded trace output in in-memory buffer; if the + USB monitor is enabled, that trace buffer will be periodically + emptied and dumped to the system loggin device (USART2 in this + configuraion): + + Device Drivers -> "USB Device Driver Support: + CONFIG_USBDEV_TRACE=y : Enable USB trace feature + CONFIG_USBDEV_TRACE_NRECORDS=256 : Buffer 128 records in memory + + Application Configuration -> NSH LIbrary: + CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH + CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor + + Application Configuration -> System NSH Add-Ons: + CONFIG_SYSTEM_USBMONITOR=y : Enable the USB monitor daemon + CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size + CONFIG_SYSTEM_USBMONITOR_PRIORITY=50 : USB monitor daemon priority + CONFIG_SYSTEM_USBMONITOR_INTERVAL=1 : Dump trace data every second + CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y : Enable TRACE output + CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y + CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y + CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y + CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y + + NOTE: USB debug output also be enabled in this case. Both will appear + on the serial SYSLOG output. However, the debug output will be + asynchronous with the trace output and, hence, difficult to interpret. + + 5. The STM32F3Discovery board does not provide circuitry for control of + the "soft connect" USB pullup. As a result, the host PC does not know + the USB has been logically connected or disconnected. You have to + follow these steps to use USB: + + 1) Start NSH with USB disconnected, then + 2) Connect the USB device to the host. + + 6. Using the Prolifics PL2303 Emulation + + You could also use the non-standard PL2303 serial device instead of + the standard CDC/ACM serial device by changing: + + Drivers->USB Device Driver Support + CONFIG_CDCACM=n : Disable the CDC/ACM serial device class + CONFIG_CDCACM_CONSOLE=n : The CDC/ACM serial device is NOT the console + CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled + CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console diff --git a/configs/stm32f3discovery/include/board.h b/configs/stm32f3discovery/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..e1fd1ed2a3dafc28e9acca9ac36a2e1e362e8de6 --- /dev/null +++ b/configs/stm32f3discovery/include/board.h @@ -0,0 +1,330 @@ +/************************************************************************************ + * configs/stm32f3discovery/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIG_STM32F3DISCOVERY_INCLUDE_BOARD_H +#define __CONFIG_STM32F3DISCOVERY_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +#include "stm32_rcc.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* HSI - Internal 8 MHz RC Oscillator + * LSI - 32 KHz RC + * HSE - On-board crystal frequency is 8MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 8000000ul /* X1 on board */ + +#define STM32_HSI_FREQUENCY 8000000ul +#define STM32_LSI_FREQUENCY 40000 /* Between 30kHz and 60kHz */ +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 /* X2 on board */ + +/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */ + +#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC +#define STM32_CFGR_PLLXTPRE 0 +#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx9 +#define STM32_PLL_FREQUENCY (9*STM32_BOARD_XTAL) + +/* Use the PLL and set the SYSCLK source to be the PLL */ + +#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL +#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY + +/* AHB clock (HCLK) is SYSCLK (72MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (72MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */ + +/* APB2 timers 1 and 8 will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) + +#define STM32_APB1_TIM15_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB1_TIM16_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB1_TIM17_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* APB1 timers 2-4 will be twice PCLK1 (REVISIT) */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* USB divider -- Divide PLL clock by 1.5 */ + +#define STM32_CFGR_USBPRE 0 + +/* Timers driven from APB1 will be twice PCLK1 */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 */ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* LED definitions ******************************************************************/ +/* The STM32F3Discovery board has ten LEDs. Two of these are controlled by logic on + * the board and are not available for software control: + * + * LD1 PWR: red LED indicates that the board is powered. + * LD2 COM: LD2 default status is red. LD2 turns to green to indicate that + * communications are in progress between the PC and the ST-LINK/V2. + * + * And eight can be controlled by software: + * + * User LD3: red LED is a user LED connected to the I/O PE9 of the STM32F303VCT6. + * User LD4: blue LED is a user LED connected to the I/O PE8 of the STM32F303VCT6. + * User LD5: orange LED is a user LED connected to the I/O PE10 of the STM32F303VCT6. + * User LD6: green LED is a user LED connected to the I/O PE15 of the STM32F303VCT6. + * User LD7: green LED is a user LED connected to the I/O PE11 of the STM32F303VCT6. + * User LD8: orange LED is a user LED connected to the I/O PE14 of the STM32F303VCT6. + * User LD9: blue LED is a user LED connected to the I/O PE12 of the STM32F303VCT6. + * User LD10: red LED is a user LED connected to the I/O PE13 of the STM32F303VCT6. + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 /* User LD3 */ +#define BOARD_LED2 1 /* User LD4 */ +#define BOARD_LED3 2 /* User LD5 */ +#define BOARD_LED4 3 /* User LD6 */ +#define BOARD_LED5 4 /* User LD7 */ +#define BOARD_LED6 5 /* User LD8 */ +#define BOARD_LED7 6 /* User LD9 */ +#define BOARD_LED8 7 /* User LD10 */ +#define BOARD_NLEDS 8 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) +#define BOARD_LED4_BIT (1 << BOARD_LED4) +#define BOARD_LED5_BIT (1 << BOARD_LED5) +#define BOARD_LED6_BIT (1 << BOARD_LED6) +#define BOARD_LED7_BIT (1 << BOARD_LED7) +#define BOARD_LED8_BIT (1 << BOARD_LED8) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 8 LEDs on board the + * stm32f3discovery. The following definitions describe how NuttX controls the LEDs: + * + * SYMBOL Meaning LED state + * Initially all LEDs are OFF + * ------------------- ----------------------- ------------- ------------ + * LED_STARTED NuttX has been started LD3 ON + * LED_HEAPALLOCATE Heap has been allocated LD4 ON + * LED_IRQSENABLED Interrupts enabled LD4 ON + * LED_STACKCREATED Idle stack created LD6 ON + * LED_INIRQ In an interrupt LD7 should glow + * LED_SIGNAL In a signal handler LD8 might glow + * LED_ASSERTION An assertion failed LD9 ON while handling the assertion + * LED_PANIC The system has crashed LD10 Blinking at 2Hz + * LED_IDLE STM32 is is sleep mode (Optional, not used) + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/* Button definitions ***************************************************************/ +/* The STM32F3Discovery supports two buttons; only one button is controllable by + * software: + * + * B1 USER: user and wake-up button connected to the I/O PA0 of the STM32F303VCT6. + * B2 RESET: pushbutton connected to NRST is used to RESET the STM32F303VCT6. + */ + +#define BUTTON_USER 0 + +#define NUM_BUTTONS 1 + +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* Alternate function pin selections ************************************************/ + +/* USART + * + * USART1: Hardwired to embedded STLinkV2 hardware debugger + * RX (PC5) + * TX (PC4) + * + * USART2: Connect to an external UART<->RS232 transceiver for use as console. + * RX (PA3) + * TX (PA2) + */ + +#define GPIO_USART2_RX GPIO_USART2_RX_2 +#define GPIO_USART2_TX GPIO_USART2_TX_2 + +/* SPI + * + * SPI1: Hardwired to ST L3GD20 MEMS device + * MISO (PA6) + * MSOI (PA7) + * SCK (PA5) + */ + +#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 +#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 +#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 + +/* I2C + * + * I2C1: Accessible via expansion headers + * SCL (PA15) + * SDA (PA14) + * SMBA (PB5) + * + * I2C2: Accessible via expansion headers + * SCL (PA9) + * SDA (PA10) + * SMBA (PB12) + */ + +#ifdef CONFIG_STM32_I2C1 +#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 +#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1 +#endif + +#ifdef CONFIG_STM32_I2C2 +#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1 +#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1 +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIG_STM32F3DISCOVERY_INCLUDE_BOARD_H */ diff --git a/configs/stm32f3discovery/nsh/Make.defs b/configs/stm32f3discovery/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..02c4d7cfb3e6c7da70fa6d9b0d06e9531e8f9a21 --- /dev/null +++ b/configs/stm32f3discovery/nsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f3discovery/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f3discovery/nsh/defconfig b/configs/stm32f3discovery/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..cb828eb2346c2c285612a2dec2cb22823f60f432 --- /dev/null +++ b/configs/stm32f3discovery/nsh/defconfig @@ -0,0 +1,1152 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +CONFIG_ARCH_CHIP_STM32F303VC=y +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +CONFIG_STM32_STM32F30XX=y +# CONFIG_STM32_STM32F302 is not set +CONFIG_STM32_STM32F303=y +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +CONFIG_STM32_HAVE_TIM15=y +CONFIG_STM32_HAVE_TIM16=y +CONFIG_STM32_HAVE_TIM17=y +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM15 is not set +# CONFIG_STM32_TIM16 is not set +# CONFIG_STM32_TIM17 is not set +# CONFIG_STM32_TSC is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# +# CONFIG_STM32_USB_ITRMP is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=6522 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=40960 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F3_DISCOVERY=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f3discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +CONFIG_SYSTEM_CDCACM=y +CONFIG_SYSTEM_CDCACM_DEVMINOR=0 +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f3discovery/nsh/setenv.sh b/configs/stm32f3discovery/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3612c96e85e28bec1dcfaf39a0f43474fc4084d6 --- /dev/null +++ b/configs/stm32f3discovery/nsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/stm32f3discovery/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f3discovery/scripts/gnu-elf.ld b/configs/stm32f3discovery/scripts/gnu-elf.ld new file mode 100644 index 0000000000000000000000000000000000000000..54e483a12aa5a96ddfdcfbe719e399e6e87a05a4 --- /dev/null +++ b/configs/stm32f3discovery/scripts/gnu-elf.ld @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/stm32f3discovery/scripts/gnu-elf.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +SECTIONS +{ + .text 0x00000000 : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + *(.ctors) /* Old ABI: Unallocated */ + *(.init_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .dtors : + { + _sdtors = . ; + *(.dtors) /* Old ABI: Unallocated */ + *(.fini_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = . ; + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32f3discovery/scripts/ld.script b/configs/stm32f3discovery/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..29830c5ef904e6e81227557662f9475b9fcd19bc --- /dev/null +++ b/configs/stm32f3discovery/scripts/ld.script @@ -0,0 +1,117 @@ +/**************************************************************************** + * configs/stm32f3discovery/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F303VCT has 256Kb of FLASH beginning at address 0x0800:0000 and + * 40Kb of SRAM. + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 40K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32f3discovery/src/.gitignore b/configs/stm32f3discovery/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/stm32f3discovery/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/stm32f3discovery/src/Makefile b/configs/stm32f3discovery/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..cac567aa4cd974eae2791e89253b58694b1d0bd5 --- /dev/null +++ b/configs/stm32f3discovery/src/Makefile @@ -0,0 +1,71 @@ +############################################################################ +# configs/stm32f3discovery/src/Makefile +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_STM32_USB),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += stm32_pwm.c +endif + +ifeq ($(CONFIG_QENCODER),y) +CSRCS += stm32_qencoder.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += stm32_watchdog.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32f3discovery/src/stm32_appinit.c b/configs/stm32f3discovery/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..445dfbc2c4d7a9eb6b15365b0cb5e782b79f876a --- /dev/null +++ b/configs/stm32f3discovery/src/stm32_appinit.c @@ -0,0 +1,114 @@ +/**************************************************************************** + * config/stm32f3discovery/src/stm32_appinit.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#include "stm32.h" +#include "stm32f3discovery.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#define HAVE_USBDEV 1 +#define HAVE_USBMONITOR 1 + +/* Can't support USB device features if the STM32 USB peripheral is not + * enabled. + */ + +#ifndef CONFIG_STM32_USB +# undef HAVE_USBDEV +# undef HAVE_USBMONITOR +#endif + +/* Can't support USB device is USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +# undef HAVE_USBMONITOR +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR) +# undef HAVE_USBMONITOR +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef HAVE_USBMONITOR + int ret; + + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret); + } +#endif + + return OK; +} diff --git a/configs/stm32f3discovery/src/stm32_autoleds.c b/configs/stm32f3discovery/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..d55a5835ce35c3d9e2bde3bc2dc499a6ded6f2c4 --- /dev/null +++ b/configs/stm32f3discovery/src/stm32_autoleds.c @@ -0,0 +1,137 @@ +/**************************************************************************** + * configs/stm32f3discovery/src/stm32_autoleds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "stm32.h" +#include "stm32f3discovery.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* This array maps an LED number to GPIO pin configuration */ + +static const uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4, + GPIO_LED5, GPIO_LED6, GPIO_LED7, GPIO_LED8 +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_onoff + ****************************************************************************/ + +void board_autoled_onoff(int led, bool state) +{ + if ((unsigned)led < BOARD_NLEDS) + { + stm32_gpiowrite(g_ledcfg[led], state); + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + int i; + + /* Configure LED1-8 GPIOs for output */ + + for (i = 0; i < BOARD_NLEDS; i++) + { + stm32_configgpio(g_ledcfg[i]); + } +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + board_autoled_onoff(led, true); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + board_autoled_onoff(led, false); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/stm32f3discovery/src/stm32_boot.c b/configs/stm32f3discovery/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..cc66383cfaa16b1c33b3e7dd17f0eaa8e432a801 --- /dev/null +++ b/configs/stm32f3discovery/src/stm32_boot.c @@ -0,0 +1,102 @@ +/************************************************************************************ + * configs/stm32f3discovery/src/stm32_boot.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "stm32f3discovery.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + + /* Initialize USB if the 1) USB device controller is in the configuration and 2) + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. Presumeably either CONFIG_USBDEV is also selected. + */ + +#ifdef CONFIG_STM32_USB + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/stm32f3discovery/src/stm32_buttons.c b/configs/stm32f3discovery/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..db0d6418313ad16ffa7cbf75c5c6b1e18c3391ba --- /dev/null +++ b/configs/stm32f3discovery/src/stm32_buttons.c @@ -0,0 +1,169 @@ +/**************************************************************************** + * configs/stm32f3discovery/src/stm32_buttons.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "stm32f3discovery.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* Pin configuration for each STM32F3Discovery button. This array is indexed by + * the BUTTON_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_USER +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed. + */ + + bool released = stm32_gpioread(g_buttons[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/stm32f3discovery/src/stm32_pwm.c b/configs/stm32f3discovery/src/stm32_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..7b1dd6830a9f190344f32c5ffc3818533bc1c052 --- /dev/null +++ b/configs/stm32f3discovery/src/stm32_pwm.c @@ -0,0 +1,143 @@ +/************************************************************************************ + * configs/stm32f3discovery/src/stm32_pwm.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "stm32_pwm.h" +#include "stm32f3discovery.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* PWM + * + * The stm32f3discovery has no real on-board PWM devices, but the board can be configured to output + * a pulse train using TIM4 CH2. This pin is used by FSMC is connect to CN5 just for this + * purpose: + * + * PD13 FSMC_A18 / MC_TIM4_CH2OUT pin 33 (EnB) + * + * FSMC must be disabled in this case! + */ + +#define HAVE_PWM 1 + +#ifndef CONFIG_PWM +# undef HAVE_PWM +#endif + +#ifndef CONFIG_STM32_TIM4 +# undef HAVE_PWM +#endif + +#ifndef CONFIG_STM32_TIM4_PWM +# undef HAVE_PWM +#endif + +#if CONFIG_STM32_TIM4_CHANNEL != STM32F3DISCOVERY_PWMCHANNEL +# undef HAVE_PWM +#endif + +#ifdef HAVE_PWM + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + pwm = stm32_pwminitialize(STM32F3DISCOVERY_PWMTIMER); + if (!pwm) + { + dbg("Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* HAVE_PWM */ diff --git a/configs/stm32f3discovery/src/stm32_qencoder.c b/configs/stm32f3discovery/src/stm32_qencoder.c new file mode 100644 index 0000000000000000000000000000000000000000..88a45c0722853b9c112e405f37696ed835b8a2fa --- /dev/null +++ b/configs/stm32f3discovery/src/stm32_qencoder.c @@ -0,0 +1,162 @@ +/************************************************************************************ + * configs/stm32f3discovery/src/stm32_qencoder.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "stm32_qencoder.h" +#include "stm32f3discovery.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Check if we have a timer configured for quadrature encoder -- assume YES. */ + +#define HAVE_QENCODER 1 + +/* If TIMn is not enabled (via CONFIG_STM32_TIMn), then the configuration cannot + * specify TIMn as a quadrature encoder (via CONFIG_STM32_TIMn_QE). + */ + +#ifndef CONFIG_STM32_TIM1 +# undef CONFIG_STM32_TIM1_QE +#endif +#ifndef CONFIG_STM32_TIM2 +# undef CONFIG_STM32_TIM2_QE +#endif +#ifndef CONFIG_STM32_TIM3 +# undef CONFIG_STM32_TIM3_QE +#endif +#ifndef CONFIG_STM32_TIM4 +# undef CONFIG_STM32_TIM4_QE +#endif +#ifndef CONFIG_STM32_TIM5 +# undef CONFIG_STM32_TIM5_QE +#endif +#ifndef CONFIG_STM32_TIM8 +# undef CONFIG_STM32_TIM8_QE +#endif + +/* If the upper-half quadrature encoder driver is not enabled, then we cannot + * support the quadrature encoder. + */ + +#ifndef CONFIG_QENCODER +# undef HAVE_QENCODER +#endif + +/* Which Timer should we use, TIMID={1,2,3,4,5,8}. If multiple timers are + * configured as quadrature encoders, this logic will arbitrarily select + * the lowest numbered timer. + * + * At least one TIMn, n={1,2,3,4,5,8}, must be both enabled and configured + * as a quadrature encoder in order to support the lower half quadrature + * encoder driver. The above check assures that if CONFIG_STM32_TIMn_QE + * is defined, then the correspdonding TIMn is also enabled. + */ + +#if defined CONFIG_STM32_TIM1_QE +# define TIMID 1 +#elif defined CONFIG_STM32_TIM2_QE +# define TIMID 2 +#elif defined CONFIG_STM32_TIM3_QE +# define TIMID 3 +#elif defined CONFIG_STM32_TIM4_QE +# define TIMID 4 +#elif defined CONFIG_STM32_TIM5_QE +# define TIMID 5 +#elif defined CONFIG_STM32_TIM8_QE +# define TIMID 8 +#else +# undef HAVE_QENCODER +#endif + +#ifdef HAVE_QENCODER + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: qe_devinit + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/qencoder. + * + ************************************************************************************/ + +int qe_devinit(void) +{ + static bool initialized = false; + int ret; + + /* Check if we are already initialized */ + + if (!initialized) + { + /* Initialize a quadrature encoder interface. */ + + snvdbg("Initializing the quadrature encoder using TIM%d\n", TIMID); + ret = stm32_qeinitialize("/dev/qe0", TIMID); + if (ret < 0) + { + sndbg("stm32_qeinitialize failed: %d\n", ret); + return ret; + } + + initialized = true; + } + + return OK; +} + +#endif /* HAVE_QENCODER */ diff --git a/configs/stm32f3discovery/src/stm32_spi.c b/configs/stm32f3discovery/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..6c8b28869eb6c658e8fa7346ecaeb9408a437db5 --- /dev/null +++ b/configs/stm32f3discovery/src/stm32_spi.c @@ -0,0 +1,213 @@ +/************************************************************************************ + * configs/stm32f3discovery/src/stm32_spi.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "stm32f3discovery.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32f3discovery board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ +#ifdef CONFIG_STM32_SPI1 + (void)stm32_configgpio(GPIO_MEMS_CS); /* MEMS chip select */ + (void)stm32_configgpio(GPIO_MEMS_INT1); /* MEMS interrupts */ + (void)stm32_configgpio(GPIO_MEMS_INT2); +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + stm32_gpiowrite(GPIO_MEMS_CS, !selected); +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif +#endif /* CONFIG_SPI_CMDDATA */ + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/stm32f3discovery/src/stm32_usb.c b/configs/stm32f3discovery/src/stm32_usb.c new file mode 100644 index 0000000000000000000000000000000000000000..bdeef5886d5b71d642fa5bcc0af22e39b36d8393 --- /dev/null +++ b/configs/stm32f3discovery/src/stm32_usb.c @@ -0,0 +1,130 @@ +/************************************************************************************ + * configs/stm32f3discovery/src/stm32_usb.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm32f3discovery.h" + +#ifdef CONFIG_STM32_USB + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +# define HAVE_USB 1 +#else +# warning "CONFIG_STM32_USB is enabled but CONFIG_USBDEV is not" +# undef HAVE_USB +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the STM32F3Discovery board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + /* Does the STM32 F3 hava an external soft pull-up? */ +} + +/************************************************************************************ + * Name: stm32_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB software + * connect and disconnect), then the board software must provide stm32_pullup. + * See include/nuttx/usb/usbdev.h for additional description of this method. + * + ************************************************************************************/ + +int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); + return OK; +} + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} + +#endif /* CONFIG_STM32_USB */ + + + diff --git a/configs/stm32f3discovery/src/stm32_userleds.c b/configs/stm32f3discovery/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..8c5d8065a95ec383a43bb8659962203c1f742600 --- /dev/null +++ b/configs/stm32f3discovery/src/stm32_userleds.c @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/stm32f3discovery/src/stm32_userleds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "stm32.h" +#include "stm32f3discovery.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* This array maps an LED number to GPIO pin configuration */ + +static const uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4, + GPIO_LED5, GPIO_LED6, GPIO_LED7, GPIO_LED8 +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + int i; + + /* Configure LED1-8 GPIOs for output */ + + for (i = 0; i < BOARD_NLEDS; i++) + { + stm32_configgpio(g_ledcfg[i]); + } +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + stm32_gpiowrite(g_ledcfg[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + int i; + + /* Configure LED1-8 GPIOs for output */ + + for (i = 0; i < BOARD_NLEDS; i++) + { + stm32_gpiowrite(g_ledcfg[i], (ledset & (1 << i)) != 0); + } +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/stm32f3discovery/src/stm32_watchdog.c b/configs/stm32f3discovery/src/stm32_watchdog.c new file mode 100644 index 0000000000000000000000000000000000000000..42d6ed334361c1f2ae0d0d4595482dd4655fb201 --- /dev/null +++ b/configs/stm32f3discovery/src/stm32_watchdog.c @@ -0,0 +1,135 @@ +/************************************************************************************ + * configs/stm32f3discovery/src/stm32_watchdog.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Wathdog hardware should be enabled */ + +#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG) +# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_STM32_WDG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0" +# endif +#endif + +/* Use the un-calibrated LSI frequency if we have nothing better */ + +#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ) +# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecuture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ + /* Initialize tha register the watchdog timer device */ + +#if defined(CONFIG_STM32_WWDG) + stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH); + return OK; +#elif defined(CONFIG_STM32_IWDG) + stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ); + return OK; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/stm32f3discovery/src/stm32f3discovery.h b/configs/stm32f3discovery/src/stm32f3discovery.h new file mode 100644 index 0000000000000000000000000000000000000000..eb35061c01c811ab6eccf27c44237ae83da70384 --- /dev/null +++ b/configs/stm32f3discovery/src/stm32f3discovery.h @@ -0,0 +1,167 @@ +/**************************************************************************************************** + * configs/stm32f3discovery/src/stm32f3discovery.h + * arch/arm/src/board/stm32f3discovery.n + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __CONFIGS_STM32F3DISCOVERY_SRC_STM32F3DISCOVERY_H +#define __CONFIGS_STM32F3DISCOVERY_SRC_STM32F3DISCOVERY_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include +#include + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ +/* Configuration ************************************************************************************/ +/* How many SPI modules does this chip support? */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 3 +# undef CONFIG_STM32_SPI3 +#endif + +/* STM32F3Discovery GPIOs **************************************************************************/ +/* The STM32F3Discovery board has ten LEDs. Two of these are controlled by logic on + * the board and are not available for software control: + * + * LD1 PWR: red LED indicates that the board is powered. + * LD2 COM: LD2 default status is red. LD2 turns to green to indicate that + * communications are in progress between the PC and the ST-LINK/V2. + * + * And eight can be controlled by software: + * + * User LD3: red LED is a user LED connected to the I/O PE9 of the STM32F303VCT6. + * User LD4: blue LED is a user LED connected to the I/O PE8 of the STM32F303VCT6. + * User LD5: orange LED is a user LED connected to the I/O PE10 of the STM32F303VCT6. + * User LD6: green LED is a user LED connected to the I/O PE15 of the STM32F303VCT6. + * User LD7: green LED is a user LED connected to the I/O PE11 of the STM32F303VCT6. + * User LD8: orange LED is a user LED connected to the I/O PE14 of the STM32F303VCT6. + * User LD9: blue LED is a user LED connected to the I/O PE12 of the STM32F303VCT6. + * User LD10: red LED is a user LED connected to the I/O PE13 of the STM32F303VCT6. + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN9) +#define GPIO_LED2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN8) +#define GPIO_LED3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN10) +#define GPIO_LED4 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN15) +#define GPIO_LED5 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN11) +#define GPIO_LED6 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN14) +#define GPIO_LED7 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN12) +#define GPIO_LED8 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN13) + +/* Button definitions ***************************************************************/ +/* The STM32F3Discovery supports two buttons; only one button is controllable by + * software: + * + * B1 USER: user and wake-up button connected to the I/O PA0 of the STM32F303VCT6. + * B2 RESET: pushbutton connected to NRST is used to RESET the STM32F303VCT6. + * + * NOTE that EXTI interrupts are configured + */ + +#define MIN_IRQBUTTON BUTTON_USER +#define MAX_IRQBUTTON BUTTON_USER +#define NUM_IRQBUTTONS 1 + +#define GPIO_BTN_USER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0) + +/* SPI - There is a ST MEMS L3GD20 device on SPI1 using these pins: */ + +#define GPIO_MEMS_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3) +#define GPIO_MEMS_INT1 (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTE|GPIO_PIN0) +#define GPIO_MEMS_INT2 (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTE|GPIO_PIN1) + +/**************************************************************************************************** + * Public Types + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +/**************************************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32f3discovery board. + * + ****************************************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +/**************************************************************************************************** + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the STM32F3Discovery board. + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_USB +void weak_function stm32_usbinitialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_STM32F3DISCOVERY_SRC_STM32F3DISCOVERY_H */ + diff --git a/configs/stm32f3discovery/usbnsh/Make.defs b/configs/stm32f3discovery/usbnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..2c82f6ebcef8e3ba42e6dc765be70de4596ee463 --- /dev/null +++ b/configs/stm32f3discovery/usbnsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f3discovery/usbnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f3discovery/usbnsh/defconfig b/configs/stm32f3discovery/usbnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c1c75193436aa34366b3ace8a586f7711f6b6332 --- /dev/null +++ b/configs/stm32f3discovery/usbnsh/defconfig @@ -0,0 +1,1177 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +CONFIG_ARCH_CHIP_STM32F303VC=y +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +CONFIG_STM32_STM32F30XX=y +# CONFIG_STM32_STM32F302 is not set +CONFIG_STM32_STM32F303=y +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +CONFIG_STM32_HAVE_TIM15=y +CONFIG_STM32_HAVE_TIM16=y +CONFIG_STM32_HAVE_TIM17=y +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SDIO is not set +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM15 is not set +# CONFIG_STM32_TIM16 is not set +# CONFIG_STM32_TIM17 is not set +# CONFIG_STM32_TSC is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USB=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# +# CONFIG_STM32_USB_ITRMP is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=6522 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=40960 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F3_DISCOVERY=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f3discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_CHAR=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f3discovery/usbnsh/setenv.sh b/configs/stm32f3discovery/usbnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..d1e4ab41af2aef60d6d941a1d5c3c82507ab39b9 --- /dev/null +++ b/configs/stm32f3discovery/usbnsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/stm32f3discovery/usbnsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f429i-disco/Kconfig b/configs/stm32f429i-disco/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..e798358984f31b1c6cab60717d115335fd487226 --- /dev/null +++ b/configs/stm32f429i-disco/Kconfig @@ -0,0 +1,240 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_STM32F429I_DISCO + +config STM32F429I_DISCO_FLASH + bool "MTD driver for external 8Mbyte SST25 FLASH on SPI4" + default n + select MTD + select MTD_SST25XX + select MTD_SMART + select FS_SMARTFS + select STM32_SPI4 + select MTD_BYTE_WRITE + ---help--- + Configures an MTD device for use with the onboard flash + +config STM32F429I_DISCO_FLASH_MINOR + int "Minor number for the FLASH /dev/smart entry" + default 0 + depends on STM32F429I_DISCO_FLASH + ---help--- + Sets the minor number for the FLASH MTD /dev entry + +config STM32F429I_DISCO_FLASH_PART + bool "Enable partition support on FLASH" + default n + depends on STM32F429I_DISCO_FLASH + ---help--- + Enables creation of partitions on the FLASH + +config STM32F429I_DISCO_FLASH_CONFIG_PART + bool "Create application config data partition on FLASH" + default y + depends on STM32F429I_DISCO_FLASH_PART + depends on PLATFORM_CONFIGDATA + ---help--- + Enables creation of a /dev/config partition on the FLASH + +config STM32F429I_DISCO_FLASH_CONFIG_PART_NUMBER + int "Index number of config partition (in list below)" + default 0 + depends on STM32F429I_DISCO_FLASH_CONFIG_PART + ---help--- + Specifies the index number of the config data partition + from the partition list. + +config STM32F429I_DISCO_FLASH_PART_LIST + string "Flash partition size list" + default "4,8188" + depends on STM32F429I_DISCO_FLASH_PART + ---help--- + Comma separated list of partition sizes in KB. + +config STM32F429I_DISCO_FLASH_PART_NAMES + string "Flash partition name list" + default "config,rfs" + depends on STM32F429I_DISCO_FLASH_PART + depends on MTD_PARTITION_NAMES + ---help--- + Comma separated list of partition names. + +config STM32F429I_DISCO_RAMMTD + bool "MTD driver for SMARTFS RAM disk" + default n + select MTD + select RAMMTD + ---help--- + Configures an MTD based RAM device for use with SMARTFS. + +config STM32F429I_DISCO_RAMMTD_MINOR + int "Minor number for RAM /dev/smart entry" + default 1 + depends on STM32F429I_DISCO_RAMMTD + ---help--- + Sets the minor number for the RAM MTD /dev entry + +config STM32F429I_DISCO_RAMMTD_SIZE + int "Size in KB of the RAM device to create" + default 32 + depends on STM32F429I_DISCO_RAMMTD + ---help--- + Sets the size of static RAM allocation for the SMART RAM device + +config STM32F429IDISCO_USBHOST_STACKSIZE + int "USB host waiter stack size" + default 1024 + depends on USBHOST + +config STM32F429IDISCO_USBHOST_PRIO + int "USB host waiter task priority" + default 100 + depends on USBHOST + +config PM_BUTTONS + bool "PM Button support" + default n + depends on PM && ARCH_IRQBUTTONS + ---help--- + Enable PM button EXTI interrupts to support PM testing + +config PM_BUTTON_ACTIVITY + int "Button PM activity weight" + default 10 + depends on PM_BUTTONS + ---help--- + The activity weight to report to the power management subsystem when a button is pressed. + +config PM_ALARM_SEC + int "PM_STANDBY delay (seconds)" + default 15 + depends on PM && RTC_ALARM + ---help--- + Number of seconds to wait in PM_STANDBY before going to PM_STANDBY mode. + +config PM_ALARM_NSEC + int "PM_STANDBY delay (nanoseconds)" + default 0 + depends on PM && RTC_ALARM + ---help--- + Number of additional nanoseconds to wait in PM_STANDBY before going to PM_STANDBY mode. + +config PM_SLEEP_WAKEUP + bool "PM_SLEEP wake-up alarm" + default n + depends on PM && RTC_ALARM + ---help--- + Wake-up of PM_SLEEP mode after a delay and resume normal operation. + +config PM_SLEEP_WAKEUP_SEC + int "PM_SLEEP delay (seconds)" + default 10 + depends on PM && RTC_ALARM + ---help--- + Number of seconds to wait in PM_SLEEP before going to PM_STANDBY mode. + +config PM_SLEEP_WAKEUP_NSEC + int "PM_SLEEP delay (nanoseconds)" + default 0 + depends on PM && RTC_ALARM + ---help--- + Number of additional nanoseconds to wait in PM_SLEEP before going to PM_STANDBY mode. + +menuconfig STM32F429I_DISCO_ILI9341 + bool "LCD driver for ILI9341 Liquid Crystal Display Controller" + default n + ---help--- + Enables support for a connected display based on ili9341 LCD Single Chip + Driver. This sub driver supports only communication with the display driver + connected via 4-wire serial (spi) mcu interface. + +if STM32F429I_DISCO_ILI9341 + +choice + prompt "LCD Interface Type" + default STM32F429I_DISCO_ILI9341_NONE if !LCD_ILI9341 && !STM32_LTDC + default STM32F429I_DISCO_ILI9341_LCDIFACE if LCD_ILI9341 && !STM32_LTDC + default STM32F429I_DISCO_ILI9341_FBIFACE if STM32_LTDC + +config STM32F429I_DISCO_ILI9341_NONE + bool "No LCD interface" + +config STM32F429I_DISCO_ILI9341_LCDIFACE + bool "Enable support for nuttx LCD interface" + depends on LCD_ILI9341 + ---help--- + Enable lcd driver support for the nuttx lcd interface. + +config STM32F429I_DISCO_ILI9341_FBIFACE + bool "Enable support for nuttx framebuffer interface" + depends on STM32_LTDC + ---help--- + Enable lcd driver support for the nuttx framebuffer interface to displaying + data via ltdc controller of the stm32f429i mcu. + +endchoice # LCD Interface Type + +if STM32F429I_DISCO_ILI9341_LCDIFACE + +config STM32F429I_DISCO_ILI9341_LCDDEVICE + int "LCD interface" + default 0 + range 0 1 + depends on STM32F429I_DISCO_ILI9341_LCDIFACE + ---help--- + Define the lcd interface which should be used. This must be + corresponding to the configured ili9341 LCD device in the driver + section. + +config STM32F429I_DISCO_ILI9341_SPIFREQUENCY + int "SPI frequency" + default 12000000 + ---help--- + Define the bus frequency of the SPI device. + +config STM32F429I_DISCO_ILI9341_SPIBITS16 + bool "Enable 16 bit pixel read/write" + default n + ---help--- + This enables faster 16-bit SPI mode for transmitting or receiving pixel data + to or from the display gram. But uses default 8-bit SPI mode for all other + display operations. + +endif # STM32F429I_DISCO_ILI9341_LCDIFACE + +if STM32F429I_DISCO_ILI9341_FBIFACE + +choice + prompt "LCD Orientation" + default STM32F429I_DISCO_ILI9341_FBIFACE_PORTRAIT + ---help--- + Configure display orientation. + +config STM32F429I_DISCO_ILI9341_FBIFACE_LANDSCAPE + bool "Landscape orientation" + ---help--- + Define for "landscape" orientation support. + +config STM32F429I_DISCO_ILI9341_FBIFACE_PORTRAIT + bool "Portrait orientation" + ---help--- + Define for "portrait" orientation support. + +config STM32F429I_DISCO_ILI9341_FBIFACE_RLANDSCAPE + bool "Reverse landscape orientation" + ---help--- + Define for "reverse landscape" orientation support. + +config STM32F429I_DISCO_ILI9341_FBIFACE_RORTRAIT + bool "Reverse portrait display" + ---help--- + Define for "reverse portrait" orientation support. + +endchoice + +endif # STM32F429I_DISCO_ILI9341_FBIFACE +endif # STM32F429I_DISCO_ILI9341 +endif # ARCH_BOARD_STM32F429I_DISCO diff --git a/configs/stm32f429i-disco/README.txt b/configs/stm32f429i-disco/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..1a1960a0d24b1f7f7c1a3cfad878a7b3d4760531 --- /dev/null +++ b/configs/stm32f429i-disco/README.txt @@ -0,0 +1,912 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +STMicro STM32F429I-DISCO development board featuring the STM32F429ZIT6 +MCU. The STM32F429ZIT6 is a 180MHz Cortex-M4 operation with 2Mbit Flash +memory and 256kbytes. The board features: + + - On-board ST-LINK/V2 for programming and debugging, + - On-board 64 Mbits (8 Mbytes) External SDRAM (1 Mbit x 16-bit x 4-bank) + - LIS302DL, ST MEMS motion sensor, 3-axis digital output accelerometer, + - TFT 2.4" LCD, 262K color RGB, 240 x 320 pixels + - Touchscreen controller + - Two user LEDs and two push-buttons, + - USB OTG FS with micro-AB connector, and + - Easy access to most MCU pins. + +NOTE: Includes basic NSH command support with full 8MByte SDRAM + the + internal 256K. Unsupported are the LCD and USB interfaces. + + The board pin configuration to support on-board SDRAM and LCD + prevents use of the OTG FS module which is normally used for USB + NSH sessions. Instead, the board routes the OTG HS pins to the + USB OTG connector. + + The NSH configuration / testing that has been done so far was + performed by connecting an external RS-232 line driver to pins + PA9 (TX) and PA10 (RX) and configuring UART1 as the NSH console. + +Refer to the http://www.st.com website for further information about this +board (search keyword: 429i-disco) + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - LEDs + - UARTs + - Timer Inputs/Outputs + - FPU + - FSMC SRAM + - STM32F429I-DISCO-specific Configuration Options + - Configurations + +Development Environment +======================= + + The Development environments for the STM32F429I-DISCO board are identical + to the environments for other STM32F boards. For full details on the + environment options and setup, see the README.txt file in the + config/stm32f4discovery directory. + +LEDs +==== + +The STM32F429I-DISCO board has two user LEDs; green, and red on the board +board. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/up_leds.c. The LEDs are used to encode OS-related +events as follows: + + SYMBOL Meaning LED1* LED2 + green red + ------------------- ----------------------- ------- ------- + LED_STARTED NuttX has been started ON OFF + LED_HEAPALLOCATE Heap has been allocated OFF ON + LED_IRQSENABLED Interrupts enabled ON ON + LED_STACKCREATED Idle stack created OFF ON + LED_INIRQ In an interrupt** ON ON + LED_SIGNAL In a signal handler N/C ON + LED_ASSERTION An assertion failed ON ON + LED_PANIC The system has crashed ON BLINK + LED_IDLE STM32 is is sleep mode (Optional, not used) + + * In normal mode, LED1 will be on and LED2 might flicker a bit as IRQs + and SIGNALS are processed. + * If LED1 is on and LED2 is blinking, then NuttX probably failed to boot + or is in a PANIC condition. + +UARTs +===== + +On the STM32F429I-DISCO board, because of pin mappings to support the +onboard SDRAM and LCD, the only UARTs that has both RX and TX pins +avilalbe are USART1 and UART5. Other USARTS could be used for RX or TX +only, or they could be used for full-duplex if the other pin functions +aren't being used (i.e. LCD or SDRAM). + +UART/USART PINS +--------------- + +USART1 + CK PA8 + CTS PA11* + RTS PA12* + RX PA10*, PB7* + TX PA9*, PB6* +USART2 + CK PA4*, PD7 + CTS PA0*, PD3 + RTS PA1, PD4* + RX PA3, PD6 + TX PA2, PD5* +USART3 + CK PB12, PC12*, PD10 + CTS PB13, PD11 + RTS PB14, PD12* + RX PB11, PC11, PD9 + TX PB10*, PC10*, PD8 +UART4 + RX PA1, PC11 + TX PA0*, PC10* +UART5 + RX PD2 + TX PC12* +USART6 + CK PC8, PG7* + CTS PG13*, PG15* + RTS PG12*, PG8* + RX PC7*, PG9* + TX PC6, PG14* +UART7 + RX PE7*,PF6* + TX PE8*,PF7* + + * Indicates pins that have other on-board functions and should be used only + with care (See table 6 in the STM32F429I-DISCO User Guide for a list of free + I/O pins on the board). + +Default USART/UART Configuration +-------------------------------- + +USART1 is enabled in all configurations (see */defconfig). RX and TX are +configured on pins PA3 and PA2, respectively (see include/board.h). + +Timer Inputs/Outputs +==================== + +TIM1 + CH1 PA8, PE9 + CH2 PA9*, PE11 + CH3 PA10*, PE13 + CH4 PA11*, PE14 +TIM2 + CH1 PA0*, PA15, PA5* + CH2 PA1, PB3* + CH3 PA2, PB10* + CH4 PA3, PB11 +TIM3 + CH1 PA6*, PB4, PC6 + CH2 PA7*, PB5, PC7* + CH3 PB0, PC8 + CH4 PB1, PC9 +TIM4 + CH1 PB6*, PD12* + CH2 PB7, PD13* + CH3 PB8, PD14* + CH4 PB9*, PD15* +TIM5 + CH1 PA0*, PH10** + CH2 PA1, PH11** + CH3 PA2, PH12** + CH4 PA3, PI0 +TIM8 + CH1 PC6, PI5 + CH2 PC7*, PI6 + CH3 PC8, PI7 + CH4 PC9, PI2 +TIM9 + CH1 PA2, PE5 + CH2 PA3, PE6 +TIM10 + CH1 PB8, PF6 +TIM11 + CH1 PB9*, PF7 +TIM12 + CH1 PH6**, PB14 + CH2 PC15, PH9** +TIM13 + CH1 PA6*, PF8 +TIM14 + CH1 PA7*, PF9 + + * Indicates pins that have other on-board functions and should be used only + with care (See table 5 in the STM32F429I-DISCO User Guide). The rest are + free I/O pins. +** Port H pins are not supported by the MCU + +FPU +=== + +FPU Configuration Options +------------------------- + +There are two version of the FPU support built into the STM32 port. + +1. Lazy Floating Point Register Save. + + This is an untested implementation that saves and restores FPU registers + only on context switches. This means: (1) floating point registers are + not stored on each context switch and, hence, possibly better interrupt + performance. But, (2) since floating point registers are not saved, + you cannot use floating point operations within interrupt handlers. + + This logic can be enabled by simply adding the following to your .config + file: + + CONFIG_ARCH_FPU=y + +2. Non-Lazy Floating Point Register Save + + Mike Smith has contributed an extensive re-write of the ARMv7-M exception + handling logic. This includes verified support for the FPU. These changes + have not yet been incorporated into the mainline and are still considered + experimental. These FPU logic can be enabled with: + + CONFIG_ARCH_FPU=y + CONFIG_ARMV7M_CMNVECTOR=y + + You will probably also changes to the ld.script in if this option is selected. + This should work: + + -ENTRY(_stext) + +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ + +EXTERN(_vectors) /* Force the vectors to be included in the output */ + +CFLAGS +------ + +Only recent GCC toolchains have built-in support for the Cortex-M4 FPU. You will see +the following lines in each Make.defs file: + + ifeq ($(CONFIG_ARCH_FPU),y) + ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard + else + ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + endif + +Configuration Changes +--------------------- + +Below are all of the configuration changes that I had to make to configs/stm3240g-eval/nsh2 +in order to successfully build NuttX using the Atollic toolchain WITH FPU support: + + -CONFIG_ARCH_FPU=n : Enable FPU support + +CONFIG_ARCH_FPU=y + + -CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : Disable the CodeSourcery toolchain + +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n + + -CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=n : Enable the Atollic toolchain + +CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : + + -CONFIG_INTELHEX_BINARY=y : Suppress generation FLASH download formats + +CONFIG_INTELHEX_BINARY=n : (Only necessary with the "Lite" version) + + -CONFIG_HAVE_CXX=y : Suppress generation of C++ code + +CONFIG_HAVE_CXX=n : (Only necessary with the "Lite" version) + +See the section above on Toolchains, NOTE 2, for explanations for some of +the configuration settings. Some of the usual settings are just not supported +by the "Lite" version of the Atollic toolchain. + +FMC SDRAM +========= + +On-board SDRAM +-------------- +The STM32F429I-DISCO has 8 MBytes on-board SDRAM connected to the MCU's +SDRAM Bank 2 connections (Bank 6 of the FSMC). This means the 8 MBytes +(when enabled) is mapped to address 0xD0000000-0xD07FFFFF. The port for +the STM32F429I-DISCO board includes support for using the onboard 8M SDRAM. + +Configuration Options +--------------------- +Internal SRAM is available in all members of the STM32 family. The F4 family +also contains internal CCM SRAM. This SRAM is different because it cannot +be used for DMA. So if DMA needed, then the following should be defined +to exclude CCM SRAM from the heap: + + CONFIG_STM32_CCMEXCLUDE : Exclude CCM SRAM from the HEAP + +In addition to internal SRAM, SRAM may also be available through the FSMC. +In order to use FSMC SRAM, the following additional things need to be +present in the NuttX configuration file: + + CONFIG_STM32_FSMC=y : Enables the FSMC and the 8MByte SDRAM + CONFIG_STM32_FSMC_SRAM=y : Indicates that SRAM is available via the + FSMC (as opposed to an LCD or FLASH). + CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC + address space. This should be 0xD0000000. + CONFIG_HEAP2_SIZE : The size of the SRAM in the FSMC + address space. This should be 8388608. + CONFIG_MM_REGIONS : Must be set to a large enough value to + include the FSMC SDRAM (1, 2 or 3 depending + if the CCM RAM and/or FSCM SDRAM are enabled). + +SRAM Configurations +-------------------- +There are 4 possible SRAM configurations: + + Configuration 1. System SRAM (only) + CONFIG_MM_REGIONS == 1 + CONFIG_STM32_FSMC_SRAM NOT defined + CONFIG_STM32_CCMEXCLUDE defined + Configuration 2. System SRAM and CCM SRAM + CONFIG_MM_REGIONS == 2 + CONFIG_STM32_FSMC_SRAM NOT defined + CONFIG_STM32_CCMEXCLUDE NOT defined + Configuration 3. System SRAM and FSMC SRAM + CONFIG_MM_REGIONS == 2 + CONFIG_STM32_FSMC_SRAM defined + CONFIG_STM32_CCMEXCLUDE defined + Configuration 4. System SRAM, CCM SRAM, and FSMC SRAM + CONFIG_MM_REGIONS == 3 + CONFIG_STM32_FSMC_SRAM defined + CONFIG_STM32_CCMEXCLUDE NOT defined + +STM32F429I-DISCO-specific Configuration Options +=============================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32F407VG=y + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=STM32F429I-DISCO (for the STM32F429I-DISCO development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP + + In addition to internal SRAM, SRAM may also be available through the FSMC. + In order to use FSMC SRAM, the following additional things need to be + present in the NuttX configuration file: + + CONFIG_STM32_FSMC_SRAM - Indicates that SRAM is available via the + FSMC (as opposed to an LCD or FLASH). + + CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space (hex) + + CONFIG_HEAP2_SIZE - The size of the SRAM in the FSMC address space (decimal) + + CONFIG_ARCH_FPU - The STM32F429I-DISCO supports a floating point unit (FPU) + + CONFIG_ARCH_FPU=y + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + AHB1 + ---- + CONFIG_STM32_CRC + CONFIG_STM32_BKPSRAM + CONFIG_STM32_CCMDATARAM + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + CONFIG_STM32_ETHMAC + CONFIG_STM32_OTGHS + + AHB2 + ---- + CONFIG_STM32_DCMI + CONFIG_STM32_CRYP + CONFIG_STM32_HASH + CONFIG_STM32_RNG + CONFIG_STM32_OTGFS + + AHB3 + ---- + CONFIG_STM32_FSMC + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_TIM12 + CONFIG_STM32_TIM13 + CONFIG_STM32_TIM14 + CONFIG_STM32_WWDG + CONFIG_STM32_IWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI3 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_I2C3 + CONFIG_STM32_CAN1 + CONFIG_STM32_CAN2 + CONFIG_STM32_DAC1 + CONFIG_STM32_DAC2 + CONFIG_STM32_PWR -- Required for RTC + + APB2 + ---- + CONFIG_STM32_TIM1 + CONFIG_STM32_TIM8 + CONFIG_STM32_USART1 + CONFIG_STM32_USART6 + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + CONFIG_STM32_ADC3 + CONFIG_STM32_SDIO + CONFIG_STM32_SPI1 + CONFIG_STM32_SYSCFG + CONFIG_STM32_TIM9 + CONFIG_STM32_TIM10 + CONFIG_STM32_TIM11 + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + JTAG Enable settings (by default only SW-DP is enabled): + + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + + STM32F429I-DISCO specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + STM32F429I-DISCO CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + + STM32F429I-DISCO SPI Configuration + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + + STM32F429I-DISCO DMA Configuration + + CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO + and CONFIG_STM32_DMA2. + CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. + Default: Medium + CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: + 4-bit transfer mode. + + STM32 USB OTG FS Host Driver Support + + Pre-requisites + + CONFIG_USBDEV - Enable USB device support + CONFIG_USBHOST - Enable USB host support + CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block + CONFIG_STM32_SYSCFG - Needed + CONFIG_SCHED_WORKQUEUE - Worker thread support is required + + Options: + + CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. + Default 128 (512 bytes) + CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO + in 32-bit words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit + words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128 + CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever + want to do that? + CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access + debug. Depends on CONFIG_DEBUG. + CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB + packets. Depends on CONFIG_DEBUG. + +Configurations +============== + +Each STM32F429I-DISCO configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh STM32F429I-DISCO/ + cd - + . ./setenv.sh + +If this is a Windows native build, then configure.bat should be used +instead of configure.sh: + + configure.bat STM32F429I-DISCO\ + +Where is one of the following: + + ltdc: + ---- + STM32F429I-DISCO LTDC Framebuffer demo example. See + configs/stm32f429i-disco/ltdc/README.txt for additional information. + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables the serial interfaces on UART2. Support for + builtin applications is enabled, but in the base configuration no + builtin applications are selected (see NOTES below). + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + 3. This example supports the PWM test (apps/examples/pwm) but this must + be manually enabled by selecting: + + CONFIG_PWM=y : Enable the generic PWM infrastructure + CONFIG_STM32_TIM4=y : Enable TIM4 + CONFIG_STM32_TIM4_PWM=y : Use TIM4 to generate PWM output + + See also apps/examples/README.txt + + Special PWM-only debug options: + + CONFIG_DEBUG_PWM + + 5. This example supports the Quadrature Encode test (apps/examples/qencoder) + but this must be manually enabled by selecting: + + CONFIG_EXAMPLES_QENCODER=y : Enable the apps/examples/qencoder + CONFIG_SENSORS=y : Enable support for sensors + CONFIG_QENCODER=y : Enable the generic Quadrature Encoder infrastructure + CONFIG_STM32_TIM8=y : Enable TIM8 + CONFIG_STM32_TIM2=n : (Or optionally TIM2) + CONFIG_STM32_TIM8_QE=y : Use TIM8 as the quadrature encoder + CONFIG_STM32_TIM2_QE=y : (Or optionally TIM2) + + See also apps/examples/README.txt. Special debug options: + + CONFIG_DEBUG_SENSORS + + 6. This example supports the watchdog timer test (apps/examples/watchdog) + but this must be manually enabled by selecting: + + CONFIG_EXAMPLES_WATCHDOG=y : Enable the apps/examples/watchdog + CONFIG_WATCHDOG=y : Enables watchdog timer driver support + CONFIG_STM32_WWDG=y : Enables the WWDG timer facility, OR + CONFIG_STM32_IWDG=y : Enables the IWDG timer facility (but not both) + + The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result, + has a maximum timeout value of 49 milliseconds. for WWDG watchdog, you + should also add the fillowing to the configuration file: + + CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20 + CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49 + + The IWDG timer has a range of about 35 seconds and should not be an issue. + + 7. USB Support (CDC/ACM device) + + CONFIG_STM32_OTGFS=y : STM32 OTG FS support + CONFIG_USBDEV=y : USB device support must be enabled + CONFIG_CDCACM=y : The CDC/ACM driver must be built + CONFIG_NSH_BUILTIN_APPS=y : NSH built-in application support must be enabled + CONFIG_NSH_ARCHINIT=y : To perform USB initialization + + 8. Using the USB console. + + The STM32F429I-DISCO NSH configuration can be set up to use a USB CDC/ACM + (or PL2303) USB console. The normal way that you would configure the + the USB console would be to change the .config file like this: + + CONFIG_STM32_OTGFS=y : STM32 OTG FS support + CONFIG_USART2_SERIAL_CONSOLE=n : Disable the USART2 console + CONFIG_DEV_CONSOLE=n : Inhibit use of /dev/console by other logic + CONFIG_USBDEV=y : USB device support must be enabled + CONFIG_CDCACM=y : The CDC/ACM driver must be built + CONFIG_CDCACM_CONSOLE=y : Enable the CDC/ACM USB console. + + NOTE: When you first start the USB console, you have hit ENTER a few + times before NSH starts. The logic does this to prevent sending USB data + before there is anything on the host side listening for USB serial input. + + 9. Here is an alternative USB console configuration. The following + configuration will also create a NSH USB console but this version + will use /dev/console. Instead, it will use the normal /dev/ttyACM0 + USB serial device for the console: + + CONFIG_STM32_OTGFS=y : STM32 OTG FS support + CONFIG_USART2_SERIAL_CONSOLE=y : Keep the USART2 console + CONFIG_DEV_CONSOLE=y : /dev/console exists (but NSH won't use it) + CONFIG_USBDEV=y : USB device support must be enabled + CONFIG_CDCACM=y : The CDC/ACM driver must be built + CONFIG_CDCACM_CONSOLE=n : Don't use the CDC/ACM USB console. + CONFIG_NSH_USBCONSOLE=y : Instead use some other USB device for the console + + The particular USB device that is used is: + + CONFIG_NSH_USBCONDEV="/dev/ttyACM0" + + The advantage of this configuration is only that it is easier to + bet working. This alternative does has some side effects: + + - When any other device other than /dev/console is used for a user + interface, linefeeds (\n) will not be expanded to carriage return / + linefeeds (\r\n). You will need to set your terminal program to account + for this. + + - /dev/console still exists and still refers to the serial port. So + you can still use certain kinds of debug output (see include/debug.h, all + of the interfaces based on lowsyslog will work in this configuration). + + - But don't enable USB debug output! Since USB is console is used for + USB debug output and you are using a USB console, there will be + infinite loops and deadlocks: Debug output generates USB debug + output which generatates USB debug output, etc. If you want USB + debug output, you should consider enabling USB trace + (CONFIG_USBDEV_TRACE) and perhaps the USB monitor (CONFIG_SYSTEM_USBMONITOR). + + See the usbnsh configuration below for more information on configuring + USB trace output and the USB monitor. + + 10. USB OTG FS Host Support. The following changes will enable support for + a USB host on the STM32F429I-DISCO, including support for a mass storage + class driver: + + Device Drivers -> + CONFIG_USBDEV=n : Make sure tht USB device support is disabled + CONFIG_USBHOST=y : Enable USB host support + CONFIG_USBHOST_ISOC_DISABLE=y + + Device Drivers -> USB Host Driver Support + CONFIG_USBHOST_MSC=y : Enable the mass storage class + + System Type -> STM32 Peripheral Support + CONFIG_STM32_OTGHS=y : Enable the STM32 USB OTG FH block (FS mode) + CONFIG_STM32_SYSCFG=y : Needed for all USB OTF HS support + + RTOS Features -> Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : High priority worker thread support is required + CONFIG_SCHED_HPWORK=y : for the mass storage class driver. + + File Systems -> + CONFIG_FS_FAT=y : Needed by the USB host mass storage class. + + Board Selection -> + CONFIG_LIB_BOARDCTL=y : Needed for CONFIG_NSH_ARCHINIT + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : Architecture specific USB initialization + : is needed for NSH + + With those changes, you can use NSH with a FLASH pen driver as shown + belong. Here NSH is started with nothing in the USB host slot: + + NuttShell (NSH) NuttX-x.yy + nsh> ls /dev + /dev: + console + null + ttyS0 + + After inserting the FLASH drive, the /dev/sda appears and can be + mounted like this: + + nsh> ls /dev + /dev: + console + null + sda + ttyS0 + nsh> mount -t vfat /dev/sda /mnt/stuff + nsh> ls /mnt/stuff + /mnt/stuff: + -rw-rw-rw- 16236 filea.c + + And files on the FLASH can be manipulated to standard interfaces: + + nsh> echo "This is a test" >/mnt/stuff/atest.txt + nsh> ls /mnt/stuff + /mnt/stuff: + -rw-rw-rw- 16236 filea.c + -rw-rw-rw- 16 atest.txt + nsh> cat /mnt/stuff/atest.txt + This is a test + nsh> cp /mnt/stuff/filea.c fileb.c + nsh> ls /mnt/stuff + /mnt/stuff: + -rw-rw-rw- 16236 filea.c + -rw-rw-rw- 16 atest.txt + -rw-rw-rw- 16236 fileb.c + + To prevent data loss, don't forget to un-mount the FLASH drive + before removing it: + + nsh> umount /mnt/stuff + + 11. I used this configuration to test the USB hub class. I did this + testing with the following changes to the configuration (in addition + to those listed above for base USB host/mass storage class support): + + Drivers -> USB Host Driver Support + CONFIG_USBHOST_HUB=y : Enable the hub class + CONFIG_USBHOST_ASYNCH=y : Asynchonous I/O supported needed for hubs + + Board Selection -> + CONFIG_STM32F429IDISCO_USBHOST_STACKSIZE=2048 (bigger than it needs to be) + + RTOS Features -> Work Queue Support + CONFIG_SCHED_LPWORK=y : Low priority queue support is needed + CONFIG_SCHED_LPNTHREADS=1 + CONFIG_SCHED_LPWORKSTACKSIZE=1024 + + NOTES: + + 1. It is necessary to perform work on the low-priority work queue + (vs. the high priority work queue) because deferred hub-related + work requires some delays and waiting that is not appropriate on + the high priority work queue. + + 2. Stack usage make increase when USB hub support is enabled because + the nesting depth of certain USB host class logic can increase. + + STATUS: + 2015-04-30 + Appears to be fully functional. + + extflash: + --------- + + This is another NSH example. If differs from other 'nsh' configurations + in that this configuration defines an external 8 MByte SPI FLASH (the + SST25VF064C part from Silicon Storage Technology, Inc.) which must be + be connected to the Discovery board's SPI4 pins on the expansion pins. + Additionally, this demo uses UART1 for the console + + NOTES: + + 1. This configuration assumes an SST25VF064C 8Mbyte SPI FLASH is + connected to SPI4 on the following Discovery board Pins: + + SCK: Port PE2 Board Connector P1, Pin 15 + MOSI: Port PE6 Board Connector P1, Pin 11 + MISO: Port PE5 Board Connector P1, Pin 14 + CS: Port PE4 Board Connector P1, Pin 13 + + 2. This configuration does have UART1 output enabled and set up as + the system logging device. To use this UART, you must add an + external RS-232 line driver to the UART1 pins of the DISCO board + on PA9 and PA10 of connector P1. + + usbnsh: + ------ + + This is another NSH example. If differs from other 'nsh' configurations + in that this configurations uses a USB serial device for console I/O. + Such a configuration is useful on the stm32f429i-disco which has no + builtin RS-232 drivers. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. This configuration does have UART1 output enabled and set up as + the system logging device. To use this UART, you must add an + external RS-232 line driver to the UART1 pins of the DISCO board + on PA9 and PA10 of connector P1. + + usbmsc: + ------ + + This is an example of enabling the FS OTG port on the DISCO board for + mass storage use. It provides an NSH session on UART1 to allow + accessing the connected USB mass storage device. Such a configuration + is useful on the stm32f429i-disco which has no onboard SD card or mass + storage solution. + + NOTES: + + 1. This configuration uses UART1 as the system console. To use this + UART, you must add an external RS-232 line driver to the UART1 pins + of the DISCO board on PA9 and PA10 of connector P1. + + 2. The mass storage device will appear as /dev/sda and supports FAT + formatted "thumb" flash drives with: + + nsh> mount -t vfat /dev/sda /mount_name diff --git a/configs/stm32f429i-disco/extflash/Make.defs b/configs/stm32f429i-disco/extflash/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c8cd4116d694a4115ce7cb32a1015d2111c27460 --- /dev/null +++ b/configs/stm32f429i-disco/extflash/Make.defs @@ -0,0 +1,112 @@ +############################################################################ +# configs/stm32f429i-disco/usbnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f429i-disco/extflash/defconfig b/configs/stm32f429i-disco/extflash/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..15e6f97c7bac63101b1d362bc883eaa02fd7a063 --- /dev/null +++ b/configs/stm32f429i-disco/extflash/defconfig @@ -0,0 +1,1237 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +CONFIG_ARCH_CHIP_STM32F429Z=y +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +CONFIG_STM32_STM32F429=y +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +CONFIG_STM32_HAVE_LTDC=y +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +CONFIG_STM32_HAVE_UART7=y +CONFIG_STM32_HAVE_UART8=y +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +CONFIG_STM32_HAVE_SPI4=y +CONFIG_STM32_HAVE_SPI5=y +CONFIG_STM32_HAVE_SPI6=y +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_LTDC is not set +# CONFIG_STM32_DMA2D is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +CONFIG_STM32_RNG=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SPI4=y +CONFIG_STM32_SPI5=y +# CONFIG_STM32_SPI6 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_UART7 is not set +# CONFIG_STM32_UART8 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +CONFIG_STM32_FSMC_SRAM=y +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F429I_DISCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f429i-disco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_STM32F429I_DISCO_FLASH=y +CONFIG_STM32F429I_DISCO_FLASH_MINOR=0 +CONFIG_STM32F429I_DISCO_FLASH_PART=y +CONFIG_STM32F429I_DISCO_FLASH_CONFIG_PART=y +CONFIG_STM32F429I_DISCO_FLASH_CONFIG_PART_NUMBER=0 +CONFIG_STM32F429I_DISCO_FLASH_PART_LIST="4,8188" +CONFIG_STM32F429I_DISCO_FLASH_PART_NAMES="config,rfs" +CONFIG_STM32F429I_DISCO_RAMMTD=y +CONFIG_STM32F429I_DISCO_RAMMTD_MINOR=1 +CONFIG_STM32F429I_DISCO_RAMMTD_SIZE=256 +# CONFIG_STM32F429I_DISCO_ILI9341 is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +CONFIG_MTD_PARTITION=y +# CONFIG_MTD_SECT512 is not set +CONFIG_MTD_PARTITION_NAMES=y +CONFIG_MTD_BYTE_WRITE=y +# CONFIG_MTD_PROGMEM is not set +CONFIG_MTD_CONFIG=y +CONFIG_MTD_CONFIG_RAM_CONSOLIDATE=y +CONFIG_MTD_CONFIG_ERASEDVALUE=0xff + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +CONFIG_RAMMTD=y +CONFIG_RAMMTD_BLOCKSIZE=512 +CONFIG_RAMMTD_ERASESIZE=4096 +CONFIG_RAMMTD_ERASESTATE=0xff +# CONFIG_RAMMTD_FLASHSIM is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_S25FL1 is not set +CONFIG_MTD_SMART=y +# CONFIG_SMART_DEV_LOOP is not set +CONFIG_MTD_SMART_SECTOR_SIZE=512 +CONFIG_MTD_SMART_WEAR_LEVEL=y +# CONFIG_MTD_SMART_CONVERT_WEAR_FORMAT is not set +# CONFIG_MTD_SMART_ENABLE_CRC is not set +# CONFIG_MTD_SMART_MINIMIZE_RAM is not set +# CONFIG_MTD_SMART_SECTOR_ERASE_DEBUG is not set +# CONFIG_MTD_SMART_ALLOC_DEBUG is not set +# CONFIG_MTD_RAMTRON is not set +# CONFIG_MTD_SST25 is not set +CONFIG_MTD_SST25XX=y +CONFIG_SST25XX_SPIMODE=0 +CONFIG_SST25XX_SPIFREQUENCY=20000000 +CONFIG_SST25XX_MANUFACTURER=0xBF +CONFIG_SST25XX_MEMORY_TYPE=0x25 +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +CONFIG_FS_SMARTFS=y +CONFIG_SMARTFS_ERASEDSTATE=0xff +CONFIG_SMARTFS_MAXNAMLEN=16 +CONFIG_SMARTFS_MULTI_ROOT_DIRS=y +# CONFIG_SMARTFS_ALIGNED_ACCESS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_MTD is not set +# CONFIG_FS_PROCFS_EXCLUDE_PARTITIONS is not set +# CONFIG_FS_PROCFS_EXCLUDE_SMARTFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=3 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0xD0000000 +CONFIG_HEAP2_SIZE=8388608 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MTDPART is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_FLASH_TEST is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +CONFIG_FSUTILS_MKSMARTFS=y +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LOSMART is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MKSMARTFS is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +CONFIG_PLATFORM_CONFIGDATA=y + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +CONFIG_SYSTEM_FLASH_ERASEALL=y +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f429i-disco/extflash/setenv.sh b/configs/stm32f429i-disco/extflash/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..7d116b560c0a4eb7cec4290c0a74727d6ea705ad --- /dev/null +++ b/configs/stm32f429i-disco/extflash/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/stm32f429i-disco/usbnsh/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f429i-disco/include/board.h b/configs/stm32f429i-disco/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..adcd72adde2ef4094c4429cd3c066c91d8a1226b --- /dev/null +++ b/configs/stm32f429i-disco/include/board.h @@ -0,0 +1,465 @@ +/************************************************************************************ + * configs/stm32f429i-disco/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIG_STM32F429I_DISCO_INCLUDE_BOARD_H +#define __CONFIG_STM32F429I_DISCO_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The STM32F4 Discovery board features a single 8MHz crystal. Space is provided + * for a 32kHz RTC backup crystal, but it is not stuffed. + * + * This is the canonical configuration: + * System Clock source : PLL (HSE) + * SYSCLK(Hz) : 180000000 Determined by PLL configuration + * HCLK(Hz) : 180000000 (STM32_RCC_CFGR_HPRE) + * AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE) + * APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1) + * APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2) + * HSE Frequency(Hz) : 8000000 (STM32_BOARD_XTAL) + * PLLM : 8 (STM32_PLLCFG_PLLM) + * PLLN : 336 (STM32_PLLCFG_PLLN) + * PLLP : 2 (STM32_PLLCFG_PLLP) + * PLLQ : 7 (STM32_PLLCFG_PLLQ) + * Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK + * Flash Latency(WS) : 5 + * Prefetch Buffer : OFF + * Instruction cache : ON + * Data cache : ON + * Require 48MHz for USB OTG FS, : Enabled + * SDIO and RNG clock + */ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC + * HSE - On-board crystal frequency is 8MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 8000000ul + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* Main PLL Configuration. + * + * PLL source is HSE + * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN + * = (8,000,000 / 8) * 336 + * = 336,000,000 + * SYSCLK = PLL_VCO / PLLP + * = 336,000,000 / 2 = 168,000,000 + * USB OTG FS, SDIO and RNG Clock + * = PLL_VCO / PLLQ + * = 48,000,000 + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7) + +#define STM32_SYSCLK_FREQUENCY 168000000ul + +/* AHB clock (HCLK) is SYSCLK (168MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) + +/* Timers driven from APB1 will be twice PCLK1 */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 */ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_NLEDS 2 + +#define BOARD_LED_GREEN BOARD_LED1 +#define BOARD_LED_ORANGE BOARD_LED2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the + * stm32f429i-disco. The following definitions describe how NuttX controls the LEDs: + */ + +#define LED_STARTED 0 /* LED1 */ +#define LED_HEAPALLOCATE 1 /* LED2 */ +#define LED_IRQSENABLED 2 /* LED1 + LED2 */ +#define LED_STACKCREATED 3 /* LED3 */ +#define LED_INIRQ 4 /* LED1 + LED3 */ +#define LED_SIGNAL 5 /* LED2 + LED3 */ +#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */ +#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */ + +/* Button definitions ***************************************************************/ +/* The STM32F4 Discovery supports one button: */ + +#define BUTTON_USER 0 + +#define NUM_BUTTONS 1 + +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* Alternate function pin selections ************************************************/ + +/* UART2: + * + * The STM32F4 Discovery has no on-board serial devices, but the console is + * brought out to PA2 (TX) and PA3 (RX) for connection to an external serial device. + * (See the README.txt file for other options) + */ + +#define GPIO_USART1_RX GPIO_USART1_RX_1 +#define GPIO_USART1_TX GPIO_USART1_TX_1 + +/* PWM + * + * The STM32F4 Discovery has no real on-board PWM devices, but the board can be + * configured to output a pulse train using TIM4 CH2 on PD13. + */ + +#define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2 + +/* SPI - There is a MEMS device on SPI5 using these pins: */ + +#define GPIO_SPI5_MISO GPIO_SPI5_MISO_1 +#define GPIO_SPI5_MOSI GPIO_SPI5_MOSI_1 +#define GPIO_SPI5_SCK GPIO_SPI5_SCK_1 + +/* SPI - External SPI flash may be connected on SPI4: */ + +#define GPIO_SPI4_MISO GPIO_SPI4_MISO_1 +#define GPIO_SPI4_MOSI GPIO_SPI4_MOSI_1 +#define GPIO_SPI4_SCK GPIO_SPI4_SCK_1 + +/* FSMC - SDRAM */ + +#define GPIO_FSMC_SDCKE1 GPIO_FSMC_SDCKE1_1 +#define GPIO_FSMC_SDNE1 GPIO_FSMC_SDNE1_1 +#define GPIO_FSMC_SDNWE GPIO_FSMC_SDNWE_1 + +/* Timer Inputs/Outputs (see the README.txt file for options) */ + +#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_2 +#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1 + +#define GPIO_TIM8_CH1IN GPIO_TIM8_CH1IN_1 +#define GPIO_TIM8_CH2IN GPIO_TIM8_CH2IN_1 + +#ifdef CONFIG_STM32_LTDC +# ifdef CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE + +/* LCD + * + * The STM32F429I-DISCO board contains an onboard TFT LCD connected to the + * LTDC interface of the uC. The LCD is 240x320 pixels. Define the parameters + * of the LCD and the interface here. + */ + +/* Panel configuration + * + * LCD Panel is Saef Technology Limited (SF-TC240T-9229A2-T) with integrated + * Ilitek ILI9341 LCD Single Chip Driver (240RGBx320) + * + * PLLSAI settings + * PLLSAIN : 192 + * PLLSAIR : 4 + * PLLSAIQ : 7 + * PLLSAIDIVR : 8 + * + * Timings + * Horicontal Front Porch : 10 (STM32_LTDC_HFP) + * Horicontal Back Porch : 20 (STM32_LTDC_HBP) + * Vertical Front Porch : 4 (STM32_LTDC_VFP) + * Vertical Back Porch : 2 (STM32_LTDC_VBP) + * + * Horicontal Sync : 10 (STM32_LTDC_HSYNC) + * Vertical Sync : 4 (STM32_LTDC_VSYNC) + * + * Active Width : 240 (STM32_LTDC_ACTIVEW) + * Active Height : 320 (STM32_LTDC_ACTIVEH) + */ + +/* LTDC PLL configuration + * + * PLLSAI_VCO = STM32_HSE_FREQUENCY / PLLM + * = 8000000ul / 8 + * = 1,000,000 + * + * PLL LCD clock output + * = PLLSAI_VCO * PLLSAIN / PLLSAIR / PLLSAIDIVR + * = 1,000,000 * 192 / 4 /8 + * = 6,000,000 + */ + +/* Defined panel settings */ + +#if defined(CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE_LANDSCAPE) || \ + defined(CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE_RLANDSCAPE) +# define BOARD_LTDC_WIDTH 320 +# define BOARD_LTDC_HEIGHT 240 +#else +# define BOARD_LTDC_WIDTH 240 +# define BOARD_LTDC_HEIGHT 320 +#endif + +#define BOARD_LTDC_OUTPUT_BPP 16 +#define BOARD_LTDC_HFP 10 +#define BOARD_LTDC_HBP 20 +#define BOARD_LTDC_VFP 4 +#define BOARD_LTDC_VBP 2 +#define BOARD_LTDC_HSYNC 10 +#define BOARD_LTDC_VSYNC 2 + +#define BOARD_LTDC_PLLSAIN 192 +#define BOARD_LTDC_PLLSAIR 4 +#define BOARD_LTDC_PLLSAIQ 7 + +/* Division factor for LCD clock */ + +#define STM32_RCC_DCKCFGR_PLLSAIDIVR RCC_DCKCFGR_PLLSAIDIVR_DIV8 + +/* Pixel Clock Polarity */ +#define BOARD_LTDC_GCR_PCPOL 0 /* !LTDC_GCR_PCPOL */ +/* Data Enable Polarity */ +#define BOARD_LTDC_GCR_DEPOL 0 /* !LTDC_GCR_DEPOL */ +/* Vertical Sync Polarity */ +#define BOARD_LTDC_GCR_VSPOL 0 /* !LTDC_GCR_VSPOL */ +/* Horicontal Sync Polarity */ +#define BOARD_LTDC_GCR_HSPOL 0 /* !LTDC_GCR_HSPOL */ + +/* GPIO pinset */ + +#define GPIO_LTDC_PINS 18 /* 18-bit display */ + +#define GPIO_LTDC_R2 GPIO_LTDC_R2_1 +#define GPIO_LTDC_R3 GPIO_LTDC_R3_1 +#define GPIO_LTDC_R4 GPIO_LTDC_R4_1 +#define GPIO_LTDC_R5 GPIO_LTDC_R5_1 +#define GPIO_LTDC_R6 GPIO_LTDC_R6_1 +#define GPIO_LTDC_R7 GPIO_LTDC_R7_1 + +#define GPIO_LTDC_G2 GPIO_LTDC_G2_1 +#define GPIO_LTDC_G3 GPIO_LTDC_G3_1 +#define GPIO_LTDC_G4 GPIO_LTDC_G4_1 +#define GPIO_LTDC_G5 GPIO_LTDC_G5_1 +#define GPIO_LTDC_G6 GPIO_LTDC_G6_1 +#define GPIO_LTDC_G7 GPIO_LTDC_G7_1 + +#define GPIO_LTDC_B2 GPIO_LTDC_B2_1 +#define GPIO_LTDC_B3 GPIO_LTDC_B3_1 +#define GPIO_LTDC_B4 GPIO_LTDC_B4_1 +#define GPIO_LTDC_B5 GPIO_LTDC_B5_1 +#define GPIO_LTDC_B6 GPIO_LTDC_B6_1 +#define GPIO_LTDC_B7 GPIO_LTDC_B7_1 + +#define GPIO_LTDC_VSYNC GPIO_LTDC_VSYNC_1 +#define GPIO_LTDC_HSYNC GPIO_LTDC_HSYNC_1 +#define GPIO_LTDC_DE GPIO_LTDC_DE_1 +#define GPIO_LTDC_CLK GPIO_LTDC_CLK_1 + +#else +/* Custom LCD display configuration */ + +# define BOARD_LTDC_WIDTH ??? +# define BOARD_LTDC_HEIGHT ??? + +#define BOARD_LTDC_HFP ??? +#define BOARD_LTDC_HBP ??? +#define BOARD_LTDC_VFP ??? +#define BOARD_LTDC_VBP ??? +#define BOARD_LTDC_HSYNC ??? +#define BOARD_LTDC_VSYNC ??? + +#define BOARD_LTDC_PLLSAIN ??? +#define BOARD_LTDC_PLLSAIR ??? +#define BOARD_LTDC_PLLSAIQ ??? + +/* Division factor for LCD clock */ + +#define STM32_RCC_DCKCFGR_PLLSAIDIVR ??? + +/* Pixel Clock Polarity */ +#define BOARD_LTDC_GCR_PCPOL ??? +/* Data Enable Polarity */ +#define BOARD_LTDC_GCR_DEPOL ??? +/* Vertical Sync Polarity */ +#define BOARD_LTDC_GCR_VSPOL ??? +/* Horicontal Sync Polarity */ +#define BOARD_LTDC_GCR_HSPOL ??? + +/* GPIO pinset */ + +#define GPIO_LTDC_PINS ??? + +#define GPIO_LTDC_R2 ??? +#define GPIO_LTDC_R3 ??? +#define GPIO_LTDC_R4 ??? +#define GPIO_LTDC_R5 ??? +#define GPIO_LTDC_R6 ??? +#define GPIO_LTDC_R7 ??? + +#define GPIO_LTDC_G2 ??? +#define GPIO_LTDC_G3 ??? +#define GPIO_LTDC_G4 ??? +#define GPIO_LTDC_G5 ??? +#define GPIO_LTDC_G6 ??? +#define GPIO_LTDC_G7 ??? + +#define GPIO_LTDC_B2 ??? +#define GPIO_LTDC_B3 ??? +#define GPIO_LTDC_B4 ??? +#define GPIO_LTDC_B5 ??? +#define GPIO_LTDC_B6 ??? +#define GPIO_LTDC_B7 ??? + +#define GPIO_LTDC_VSYNC ??? +#define GPIO_LTDC_HSYNC ??? +#define GPIO_LTDC_DE ??? +#define GPIO_LTDC_CLK ??? + +#endif /* Custom LCD display */ + +/* Configure PLLSAI */ + +#define STM32_RCC_PLLSAICFGR_PLLSAIN RCC_PLLSAICFGR_PLLSAIN(BOARD_LTDC_PLLSAIN) +#define STM32_RCC_PLLSAICFGR_PLLSAIR RCC_PLLSAICFGR_PLLSAIR(BOARD_LTDC_PLLSAIR) +#define STM32_RCC_PLLSAICFGR_PLLSAIQ RCC_PLLSAICFGR_PLLSAIQ(BOARD_LTDC_PLLSAIQ) + +#endif /* CONFIG_STM32_LTDC */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIG_STM32F429I_DISCO_INCLUDE_BOARD_H */ diff --git a/configs/stm32f429i-disco/lcd/Make.defs b/configs/stm32f429i-disco/lcd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..fc3f4112f1335af8d7008ab161cfbb48d0691c98 --- /dev/null +++ b/configs/stm32f429i-disco/lcd/Make.defs @@ -0,0 +1,112 @@ +############################################################################ +# configs/stm32f429i-disco/lcd/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/stm32f429i-disco/lcd/defconfig b/configs/stm32f429i-disco/lcd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..01f3b48574e3ff5541656eec482ce9afc154dd7d --- /dev/null +++ b/configs/stm32f429i-disco/lcd/defconfig @@ -0,0 +1,1291 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_CUSTOMOPT=y +# CONFIG_DEBUG_FULLOPT is not set +CONFIG_DEBUG_OPTLEVEL="-O2" + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +CONFIG_ARCH_CHIP_STM32F429Z=y +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +CONFIG_STM32_STM32F429=y +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +CONFIG_STM32_HAVE_LTDC=y +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +CONFIG_STM32_HAVE_UART7=y +CONFIG_STM32_HAVE_UART8=y +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +CONFIG_STM32_HAVE_SPI4=y +CONFIG_STM32_HAVE_SPI5=y +CONFIG_STM32_HAVE_SPI6=y +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_LTDC is not set +# CONFIG_STM32_DMA2D is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_SPI4 is not set +# CONFIG_STM32_SPI5 is not set +# CONFIG_STM32_SPI6 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_UART7 is not set +# CONFIG_STM32_UART8 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +CONFIG_STM32_FSMC_SRAM=y +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F429I_DISCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f429i-disco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_STM32F429I_DISCO_FLASH is not set +# CONFIG_STM32F429I_DISCO_RAMMTD is not set +CONFIG_STM32F429I_DISCO_ILI9341=y +# CONFIG_STM32F429I_DISCO_ILI9341_NONE is not set +CONFIG_STM32F429I_DISCO_ILI9341_LCDIFACE=y +CONFIG_STM32F429I_DISCO_ILI9341_LCDDEVICE=0 +CONFIG_STM32F429I_DISCO_ILI9341_SPIFREQUENCY=20000000 +CONFIG_STM32F429I_DISCO_ILI9341_SPIBITS16=y +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=64 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +CONFIG_LCD_ILI9341=y +CONFIG_LCD_ILI9341_NINTERFACES=1 +CONFIG_LCD_ILI9341_IFACE0=y +CONFIG_LCD_ILI9341_IFACE0_LANDSCAPE=y +# CONFIG_LCD_ILI9341_IFACE0_PORTRAIT is not set +# CONFIG_LCD_ILI9341_IFACE0_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341_IFACE0_RPORTRAIT is not set +CONFIG_LCD_ILI9341_IFACE0_RGB565=y +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +CONFIG_NX_XYINPUT_NONE=y +# CONFIG_NX_XYINPUT_MOUSE is not set +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +# CONFIG_NX_KBD is not set + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +CONFIG_NXFONT_MONO5X8=y +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +CONFIG_NX_MULTIUSER=y +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXSERVERMSGS=32 +CONFIG_NX_MXCLIENTMSGS=16 +# CONFIG_NX_NXSTART is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=3 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0xD0000000 +CONFIG_HEAP2_SIZE=8388608 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +CONFIG_EXAMPLES_LCDRW=y +CONFIG_EXAMPLES_LDCRW_DEVNO=0 +CONFIG_EXAMPLES_LDCRW_XRES=320 +CONFIG_EXAMPLES_LDCRW_YRES=240 +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=16 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 + +# +# Multi-User Configuration Options +# +CONFIG_EXAMPLES_NX_STACKSIZE=2048 +CONFIG_EXAMPLES_NX_CLIENTPRIO=100 +CONFIG_EXAMPLES_NX_SERVERPRIO=120 +CONFIG_EXAMPLES_NX_LISTENERPRIO=80 +CONFIG_EXAMPLES_NX_NOTIFYSIGNO=4 +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# +# CONFIG_NXWIDGETS is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f429i-disco/lcd/setenv.sh b/configs/stm32f429i-disco/lcd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..8ead5e80acffddbf465b2c0ff4028056fac92034 --- /dev/null +++ b/configs/stm32f429i-disco/lcd/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/stm32f429i-disco/lcd/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f429i-disco/ltdc/Make.defs b/configs/stm32f429i-disco/ltdc/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c98f7c48a4f7f68758f865056fc2ca56dc29f850 --- /dev/null +++ b/configs/stm32f429i-disco/ltdc/Make.defs @@ -0,0 +1,112 @@ +############################################################################ +# configs/stm32f429i-disco/ltdc/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/stm32f429i-disco/ltdc/README.txt b/configs/stm32f429i-disco/ltdc/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..4e07cea392567dd81072b29b84f13aaa363989b9 --- /dev/null +++ b/configs/stm32f429i-disco/ltdc/README.txt @@ -0,0 +1,70 @@ +README.txt +========== + +STM32F429I-DISCO LTDC Framebuffer demo example + +Configure and build +----------------------------------------------- +cd tools +./configure -a stm32f429i-disco/ltdc +cd .. +make + +Note! +In the current implementation the DMA2D driver only supports clut pixel format +if the LTDC driver it does. Otherwise it will not be compatible with the nx +framework. If CONFIG_FB_CMAP is configured, nx expects that any pixel format +supports color lookup tables. This is also the case for non CLUT formats e.g. +FB_FMT_RGB16_565. This may result in wrong color representation by nx if the +pixel format is unequal to FB_FMT_RGB8. + +On the other hand layers with CLUT pixel format are not supported by the DMA2D +controller, in the case they will be used as destination layer for the following +operations: +- blit +- blend +- fillarea + +To enable clut support in both LTDC and DMA2D driver the following +configurations are valid: + +1. +- Enable LTDC_INTERFACE and LAYER1/LAYER2 +- Layer1 FB_FMT_RGB8 +- Layer2 any non clut format + +But Layer2 can only be used as destination layer for dma2d operations above. +This configuration is not compatibly to nx because LAYER2 will be referenced +by up_fbgetvplane and is an invalid CLUT pixel format. + +2. +- Enable LTDC_INTERFACE and LAYER1/LAYER2 +- Layer2 FB_FMT_RGB8 +- Layer1 any non clut format + +But Layer1 can only be used as destination layer for dma2d operations above. +This configuration should be compatibly to nx because LAYER2 will be referenced +by up_fbgetvplane and is an valid CLUT pixel format. + +All other non clut configuration work fine. + +If using the DMA2D controller without the LTDC controller e.g. camera interface +than enable CONFIG_FB_CMAP and optional CONFIG_FB_TRANSPARENCY in your board +specific configuration. + + +Loading +----------------------------------------------- +st-flash write nuttx.bin 0x8000000 + +Executing +----------------------------------------------- +The ltdc is initialized during boot up. +Interaction with NSH is via the serial console at 115200 8N1 baud. +From the nsh comandline execute one (or both) of the examples: +- nx (default nx example) +- ltdc (trivial ltdc interface test) + +Note! The ltdc example ends in an infinite loop. To get control of the nsh +start this example in the background with 'ltdc &'. + diff --git a/configs/stm32f429i-disco/ltdc/defconfig b/configs/stm32f429i-disco/ltdc/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ca7bc393514a2a619f5587ec1c0bdf0ea615c88a --- /dev/null +++ b/configs/stm32f429i-disco/ltdc/defconfig @@ -0,0 +1,1330 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_HEAP is not set +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_SPI is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_CUSTOMOPT=y +# CONFIG_DEBUG_FULLOPT is not set +CONFIG_DEBUG_OPTLEVEL="-O2" + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set +# CONFIG_DEBUG_HARDFAULT is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +CONFIG_ARCH_CHIP_STM32F429Z=y +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +CONFIG_STM32_STM32F429=y +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +CONFIG_STM32_HAVE_LTDC=y +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +CONFIG_STM32_HAVE_UART7=y +CONFIG_STM32_HAVE_UART8=y +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +CONFIG_STM32_HAVE_SPI4=y +CONFIG_STM32_HAVE_SPI5=y +CONFIG_STM32_HAVE_SPI6=y +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +CONFIG_STM32_LTDC=y +CONFIG_STM32_DMA2D=y +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_SPI4 is not set +CONFIG_STM32_SPI5=y +# CONFIG_STM32_SPI6 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_UART7 is not set +# CONFIG_STM32_UART8 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +CONFIG_STM32_CCMEXCLUDE=y +CONFIG_STM32_CCM_PROCFS=y +CONFIG_STM32_FSMC_SRAM=y +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# LTDC Configuration +# +CONFIG_STM32_LTDC_INTERFACE=y +CONFIG_STM32_LTDC_BACKLIGHT=y +CONFIG_STM32_LTDC_DEFBACKLIGHT=0xf0 +CONFIG_STM32_LTDC_BACKCOLOR=0x0 +# CONFIG_STM32_LTDC_DITHER is not set +CONFIG_STM32_LTDC_FB_BASE=0xD07B5000 +CONFIG_STM32_LTDC_FB_SIZE=307200 +# CONFIG_STM32_LTDC_L1_L8 is not set +# CONFIG_STM32_LTDC_L1_AL44 is not set +# CONFIG_STM32_LTDC_L1_AL88 is not set +CONFIG_STM32_LTDC_L1_RGB565=y +# CONFIG_STM32_LTDC_L1_ARGB4444 is not set +# CONFIG_STM32_LTDC_L1_ARGB1555 is not set +# CONFIG_STM32_LTDC_L1_RGB888 is not set +# CONFIG_STM32_LTDC_L1_ARGB8888 is not set +CONFIG_STM32_LTDC_L2=y +# CONFIG_STM32_LTDC_L2_L8 is not set +# CONFIG_STM32_LTDC_L2_AL44 is not set +# CONFIG_STM32_LTDC_L2_AL88 is not set +CONFIG_STM32_LTDC_L2_RGB565=y +# CONFIG_STM32_LTDC_L2_ARGB4444 is not set +# CONFIG_STM32_LTDC_L2_ARGB1555 is not set +# CONFIG_STM32_LTDC_L2_RGB888 is not set +# CONFIG_STM32_LTDC_L2_ARGB8888 is not set + +# +# DMA2D Configuration +# +CONFIG_STM32_DMA2D_NLAYERS=4 + +# +# Supported pixel format +# +CONFIG_STM32_DMA2D_RGB565=y +# CONFIG_STM32_DMA2D_ARGB4444 is not set +# CONFIG_STM32_DMA2D_ARGB1555 is not set +# CONFIG_STM32_DMA2D_RGB888 is not set +# CONFIG_STM32_DMA2D_ARGB8888 is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F429I_DISCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f429i-disco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_STM32F429I_DISCO_FLASH is not set +# CONFIG_STM32F429I_DISCO_RAMMTD is not set +CONFIG_STM32F429I_DISCO_ILI9341=y +# CONFIG_STM32F429I_DISCO_ILI9341_NONE is not set +CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE=y +# CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE_LANDSCAPE is not set +CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE_PORTRAIT=y +# CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE_RLANDSCAPE is not set +# CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE_RORTRAIT is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +CONFIG_SPI_CMDDATA=y +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_ANTIALIASING is not set +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +CONFIG_NX_XYINPUT_NONE=y +# CONFIG_NX_XYINPUT_MOUSE is not set +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +# CONFIG_NX_KBD is not set + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +CONFIG_NXFONT_MONO5X8=y +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0xD0000000 +CONFIG_HEAP2_SIZE=8081408 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +CONFIG_EXAMPLES_LTDC=y +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +CONFIG_EXAMPLES_NX=y +CONFIG_EXAMPLES_NX_VPLANE=0 +CONFIG_EXAMPLES_NX_DEVNO=0 +CONFIG_EXAMPLES_NX_DEFAULT_COLORS=y +CONFIG_EXAMPLES_NX_DEFAULT_FONT=y +CONFIG_EXAMPLES_NX_BPP=16 +# CONFIG_EXAMPLES_NX_RAWWINDOWS is not set +CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# +# CONFIG_NXWIDGETS is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f429i-disco/ltdc/setenv.sh b/configs/stm32f429i-disco/ltdc/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..6e88fbb729ebeecd34a7a9b6d9a5312d0508214e --- /dev/null +++ b/configs/stm32f429i-disco/ltdc/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/stm32f429i-disco/ltdc/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f429i-disco/nsh/Make.defs b/configs/stm32f429i-disco/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..a2b4778579c017623565c36b8a89e0b85f3d362d --- /dev/null +++ b/configs/stm32f429i-disco/nsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f429i-disco/usbnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f429i-disco/nsh/defconfig b/configs/stm32f429i-disco/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..db6f5e0e56b1f1390db0d5959e22e467e1811f05 --- /dev/null +++ b/configs/stm32f429i-disco/nsh/defconfig @@ -0,0 +1,1139 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +CONFIG_ARCH_CHIP_STM32F429Z=y +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +CONFIG_STM32_STM32F429=y +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +CONFIG_STM32_HAVE_LTDC=y +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +CONFIG_STM32_HAVE_UART7=y +CONFIG_STM32_HAVE_UART8=y +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +CONFIG_STM32_HAVE_SPI4=y +CONFIG_STM32_HAVE_SPI5=y +CONFIG_STM32_HAVE_SPI6=y +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_LTDC is not set +# CONFIG_STM32_DMA2D is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_SPI4 is not set +# CONFIG_STM32_SPI5 is not set +# CONFIG_STM32_SPI6 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_UART7 is not set +# CONFIG_STM32_UART8 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +CONFIG_STM32_FSMC_SRAM=y +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F429I_DISCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f429i-disco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_STM32F429I_DISCO_FLASH is not set +# CONFIG_STM32F429I_DISCO_RAMMTD is not set +# CONFIG_STM32F429I_DISCO_ILI9341 is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=3 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0xD0000000 +CONFIG_HEAP2_SIZE=8388608 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f429i-disco/nsh/setenv.sh b/configs/stm32f429i-disco/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..7d116b560c0a4eb7cec4290c0a74727d6ea705ad --- /dev/null +++ b/configs/stm32f429i-disco/nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/stm32f429i-disco/usbnsh/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f429i-disco/scripts/gnu-elf.ld b/configs/stm32f429i-disco/scripts/gnu-elf.ld new file mode 100644 index 0000000000000000000000000000000000000000..d7ac25dce8f5213dc44e930a83c9fd240f310dee --- /dev/null +++ b/configs/stm32f429i-disco/scripts/gnu-elf.ld @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/stm32f429i-disco/scripts/gnu-elf.ld + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +SECTIONS +{ + .text 0x00000000 : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + *(.ctors) /* Old ABI: Unallocated */ + *(.init_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .dtors : + { + _sdtors = . ; + *(.dtors) /* Old ABI: Unallocated */ + *(.fini_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = . ; + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32f429i-disco/scripts/kernel-space.ld b/configs/stm32f429i-disco/scripts/kernel-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..343eb181e67e5a85f4e8e117c32819f5e5ed7a9f --- /dev/null +++ b/configs/stm32f429i-disco/scripts/kernel-space.ld @@ -0,0 +1,109 @@ +/**************************************************************************** + * configs/stm32f429i-disco/scripts/kernel-space.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > kflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > kflash + + .ARM.extab : { + *(.ARM.extab*) + } > kflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > kflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > ksram AT > kflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > ksram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32f429i-disco/scripts/ld.script b/configs/stm32f429i-disco/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..f9fee5ee097641b366406ff4b2b99df4af7388c4 --- /dev/null +++ b/configs/stm32f429i-disco/scripts/ld.script @@ -0,0 +1,125 @@ +/**************************************************************************** + * configs/stm32f429i-disco/scripts/ld.script + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Modified 11/4/2013 for STM32F429 support + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F429ZIT6 has 2048Kb of FLASH beginning at address 0x0800:0000 and + * 256Kb of SRAM. SRAM is split up into four blocks: + * + * 1) 112Kb of SRAM beginning at address 0x2000:0000 + * 2) 16Kb of SRAM beginning at address 0x2001:c000 + * 3) 64Kb of SRAM beginning at address 0x2002:0000 + * 4) 64Kb of CCM SRAM beginning at address 0x1000:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32f429i-disco/scripts/memory.ld b/configs/stm32f429i-disco/scripts/memory.ld new file mode 100644 index 0000000000000000000000000000000000000000..df11b9e3d603837eeffd8882251f9908ec969bd9 --- /dev/null +++ b/configs/stm32f429i-disco/scripts/memory.ld @@ -0,0 +1,101 @@ +/**************************************************************************** + * configs/stm32f429i-disco/scripts/memory.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F429ZIT has 2048Kb of FLASH beginning at address 0x0800:0000 and + * 256Kb of SRAM. SRAM is split up into four blocks: + * + * 1) 112KB of SRAM beginning at address 0x2000:0000 + * 2) 16KB of SRAM beginning at address 0x2001:c000 + * 3) 64KB of SRAM beginning at address 0x2002:0000 + * 4) 64KB of CCM SRAM beginning at address 0x1000:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + * + * For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of + * FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which + * should fit into 64KB and, of course, can be optimized as needed (See + * also configs/stm32f429i-disco/scripts/kernel-space.ld). Allowing the + * additional does permit addition debug instrumentation to be added to the + * kernel space without overflowing the partition. + * + * Alignment of the user space FLASH partition is also a critical factor: + * The user space FLASH partition will be spanned with a single region of + * size 2**n bytes. The alignment of the user-space region must be the same. + * As a consequence, as the user-space increases in size, the alignmment + * requirement also increases. + * + * This alignment requirement means that the largest user space FLASH region + * you can have will be 512KB at it would have to be positioned at + * 0x08800000. If you change this address, don't forget to change the + * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify + * the check in kernel/userspace.c. + * + * For the same reasons, the maximum size of the SRAM mapping is limited to + * 4KB. Both of these alignment limitations could be reduced by using + * multiple regions to map the FLASH/SDRAM range or perhaps with some + * clever use of subregions. + * + * A detailed memory map for the 112KB SRAM region is as follows: + * + * 0x20000 0000: Kernel .data region. Typical size: 0.1KB + * ------- ---- Kernel .bss region. Typical size: 1.8KB + * 0x20000 0800: Kernel IDLE thread stack (approximate). Size is + * determined by CONFIG_IDLETHREAD_STACKSIZE and + * adjustments for alignment. Typical is 1KB. + * ------- ---- Padded to 4KB + * 0x20000 1000: User .data region. Size is variable. + * ------- ---- User .bss region Size is variable. + * 0x20000 2000: Beginning of kernel heap. Size determined by + * CONFIG_MM_KERNEL_HEAPSIZE. + * ------- ---- Beginning of user heap. Can vary with other settings. + * 0x20001 c000: End+1 of CPU RAM + */ + +MEMORY +{ + /* 1024Kb FLASH */ + + kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K + uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K + xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K + + /* 112Kb of contiguous SRAM */ + + ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 4K + usram (rwx) : ORIGIN = 0x20001000, LENGTH = 4K + xsram (rwx) : ORIGIN = 0x20002000, LENGTH = 104K +} diff --git a/configs/stm32f429i-disco/scripts/user-space.ld b/configs/stm32f429i-disco/scripts/user-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..684bf9fa7afb08d84ee19211596183f722de68fa --- /dev/null +++ b/configs/stm32f429i-disco/scripts/user-space.ld @@ -0,0 +1,126 @@ +/**************************************************************************** + * configs/stm32f429i-disco/scripts/user-space.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +/* Make sure that the critical memory management functions are in user-space. + * the user heap memory manager will reside in user-space but be usable both + * by kernel- and user-space code + */ + +EXTERN(umm_initialize) +EXTERN(umm_addregion) +EXTERN(umm_trysemaphore) +EXTERN(umm_givesemaphore) + +EXTERN(malloc) +EXTERN(realloc) +EXTERN(zalloc) +EXTERN(free) + +OUTPUT_ARCH(arm) +SECTIONS +{ + .userspace : { + *(.userspace) + } > uflash + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > uflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > uflash + + .ARM.extab : { + *(.ARM.extab*) + } > uflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > uflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > usram AT > uflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > usram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32f429i-disco/src/.gitignore b/configs/stm32f429i-disco/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/stm32f429i-disco/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/stm32f429i-disco/src/Makefile b/configs/stm32f429i-disco/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..aec191fdc2bb3f5aa63361c22c552664136f3434 --- /dev/null +++ b/configs/stm32f429i-disco/src/Makefile @@ -0,0 +1,82 @@ +############################################################################ +# configs/stm32f429i-disco/src/Makefile +# +# Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_NSH_LIBRARY),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_ARCH_IDLE_CUSTOM),y) +CSRCS += stm32_idle.c +endif + +ifeq ($(CONFIG_STM32_FSMC),y) +CSRCS += stm32_extmem.c +endif + +ifeq ($(CONFIG_STM32_OTGHS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_STM32F429I_DISCO_ILI9341),y) +CSRCS += stm32_ili93414ws.c +endif + +ifeq ($(and \ + $(CONFIG_STM32F429I_DISCO_ILI9341_LCDIFACE), \ + $(CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE), \ + $(CONFIG_STM32_LTDC)),) +CSRCS += stm32_lcd.c +endif + +ifeq ($(CONFIG_ARCH_FPU),y) +CSRCS += stm32_ostest.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32f429i-disco/src/stm32_appinit.c b/configs/stm32f429i-disco/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..719ebc031abd208fe2b01235fef96d6c578b0c6c --- /dev/null +++ b/configs/stm32f429i-disco/src/stm32_appinit.c @@ -0,0 +1,365 @@ +/**************************************************************************** + * config/stm32f429i-disco/src/stm32_appinit.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#ifdef CONFIG_STM32_SPI4 +# include +#endif + +#ifdef CONFIG_MTD_SST25XX +# include +#endif + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#ifndef CONFIG_STM32F429I_DISCO_FLASH_MINOR +#define CONFIG_STM32F429I_DISCO_FLASH_MINOR 0 +#endif + +#ifdef CONFIG_STM32F429I_DISCO_FLASH_CONFIG_PART +#ifdef CONFIG_PLATFORM_CONFIGDATA +# include +#endif +#endif + +#ifdef CONFIG_STM32_OTGHS +# include "stm32_usbhost.h" +#endif + +#include "stm32.h" +#include "stm32f429i-disco.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#define HAVE_USBDEV 1 +#define HAVE_USBHOST 1 +#define HAVE_USBMONITOR 1 + +/* Can't support USB host or device features if USB OTG HS is not enabled */ + +#ifndef CONFIG_STM32_OTGHS +# undef HAVE_USBDEV +# undef HAVE_USBHOST +# undef HAVE_USBMONITOR +#endif + +/* Can't support USB device monitor if USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +# undef HAVE_USBMONITOR +#endif + +/* Can't support USB host is USB host is not enabled */ + +#ifndef CONFIG_USBHOST +# undef HAVE_USBHOST +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR) +# undef HAVE_USBMONITOR +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + * CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + * CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, && + * CONFIG_LIB_BOARDCTL=n : + * Called from board_initialize(). + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#if defined(CONFIG_STM32_SPI4) + FAR struct spi_dev_s *spi; + FAR struct mtd_dev_s *mtd; + FAR struct mtd_geometry_s geo; +#endif + +#if defined(CONFIG_MTD_PARTITION_NAMES) + FAR const char *partname = CONFIG_STM32F429I_DISCO_FLASH_PART_NAMES; +#endif + +#if defined(CONFIG_MTD) && defined(CONFIG_MTD_SST25XX) + int ret; +#elif defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR) + int ret; +#endif + + /* Configure SPI-based devices */ + +#ifdef CONFIG_STM32_SPI4 + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port 4\n"); + + spi = stm32_spibus_initialize(4); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port 4\n"); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port 4\n"); + + /* Now bind the SPI interface to the SST25F064 SPI FLASH driver. This + * is a FLASH device that has been added external to the board (i.e. + * the board does not ship from STM with any on-board FLASH. + */ + +#if defined(CONFIG_MTD) && defined(CONFIG_MTD_SST25XX) + syslog(LOG_INFO, "Bind SPI to the SPI flash driver\n"); + + mtd = sst25xx_initialize(spi); + if (!mtd) + { + syslog(LOG_ERR, "ERROR: Failed to bind SPI port 4 to the SPI FLASH driver\n"); + } + else + { + syslog(LOG_INFO, "Successfully bound SPI port 4 to the SPI FLASH driver\n"); + + /* Get the geometry of the FLASH device */ + + ret = mtd->ioctl(mtd, MTDIOC_GEOMETRY, (unsigned long)((uintptr_t)&geo)); + if (ret < 0) + { + fdbg("ERROR: mtd->ioctl failed: %d\n", ret); + return ret; + } + +#ifdef CONFIG_STM32F429I_DISCO_FLASH_PART + { + int partno; + int partsize; + int partoffset; + int partszbytes; + int erasesize; + const char *partstring = CONFIG_STM32F429I_DISCO_FLASH_PART_LIST; + const char *ptr; + FAR struct mtd_dev_s *mtd_part; + char partref[4]; + + /* Now create a partition on the FLASH device */ + + partno = 0; + ptr = partstring; + partoffset = 0; + + /* Get the Flash erase size */ + + erasesize = geo.erasesize; + + while (*ptr != '\0') + { + /* Get the partition size */ + + partsize = atoi(ptr); + partszbytes = (partsize << 10); /* partsize is defined in KB */ + + /* Check if partition size is bigger then erase block */ + + if (partszbytes < erasesize) + { + fdbg("ERROR: Partition size is lesser than erasesize!\n"); + return -1; + } + + /* Check if partition size is multiple of erase block */ + + if ((partszbytes % erasesize) != 0) + { + fdbg("ERROR: Partition size is not multiple of erasesize!\n"); + return -1; + } + + mtd_part = mtd_partition(mtd, partoffset, partszbytes / erasesize); + partoffset += partszbytes / erasesize; + +#ifdef CONFIG_STM32F429I_DISCO_FLASH_CONFIG_PART + /* Test if this is the config partition */ + + if (CONFIG_STM32F429I_DISCO_FLASH_CONFIG_PART_NUMBER == partno) + { + /* Register the partition as the config device */ + + mtdconfig_register(mtd_part); + } + else +#endif + { + /* Now initialize a SMART Flash block device and bind it + * to the MTD device. + */ + +#if defined(CONFIG_MTD_SMART) && defined(CONFIG_FS_SMARTFS) + sprintf(partref, "p%d", partno); + smart_initialize(CONFIG_STM32F429I_DISCO_FLASH_MINOR, mtd_part, partref); +#endif + } + +#if defined(CONFIG_MTD_PARTITION_NAMES) + /* Set the partition name */ + + if (mtd_part == NULL) + { + dbg("Error: failed to create partition %s\n", partname); + return -1; + } + + mtd_setpartitionname(mtd_part, partname); + + /* Now skip to next name. We don't need to split the string here + * because the MTD partition logic will only display names up to + * the comma, thus allowing us to use a single static name + * in the code. + */ + + while (*partname != ',' && *partname != '\0') + { + /* Skip to next ',' */ + + partname++; + } + + if (*partname == ',') + { + partname++; + } +#endif + + /* Update the pointer to point to the next size in the list */ + + while ((*ptr >= '0') && (*ptr <= '9')) + { + ptr++; + } + + if (*ptr == ',') + { + ptr++; + } + + /* Increment the part number */ + + partno++; + } + } +#else /* CONFIG_STM32F429I_DISCO_FLASH_PART */ + + /* Configure the device with no partition support */ + + smart_initialize(CONFIG_STM32F429I_DISCO_FLASH_MINOR, mtd, NULL); + +#endif /* CONFIG_STM32F429I_DISCO_FLASH_PART */ + } + +#endif /* CONFIG_MTD */ +#endif /* CONFIG_STM32_SPI4 */ + + /* Create a RAM MTD device if configured */ + +#if defined(CONFIG_RAMMTD) && defined(CONFIG_STM32F429I_DISCO_RAMMTD) + { + uint8_t *start = (uint8_t *) kmm_malloc(CONFIG_STM32F429I_DISCO_RAMMTD_SIZE * 1024); + mtd = rammtd_initialize(start, CONFIG_STM32F429I_DISCO_RAMMTD_SIZE * 1024); + mtd->ioctl(mtd, MTDIOC_BULKERASE, 0); + + /* Now initialize a SMART Flash block device and bind it to the MTD device */ + +#if defined(CONFIG_MTD_SMART) && defined(CONFIG_FS_SMARTFS) + smart_initialize(CONFIG_STM32F429I_DISCO_RAMMTD_MINOR, mtd, NULL); +#endif + } + +#endif /* CONFIG_RAMMTD && CONFIG_STM32F429I_DISCO_RAMMTD */ + +#ifdef HAVE_USBHOST + /* Initialize USB host operation. stm32_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + + ret = stm32_usbhost_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret); + } +#endif + + return OK; +} diff --git a/configs/stm32f429i-disco/src/stm32_autoleds.c b/configs/stm32f429i-disco/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..ce9d5bcb4029f19e3d2c22b2f828a1544c53c759 --- /dev/null +++ b/configs/stm32f429i-disco/src/stm32_autoleds.c @@ -0,0 +1,236 @@ +/**************************************************************************** + * configs/stm32f429i-disco/src/stm32_autoleds.c + * + * Copyright (C) 2011-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "stm32f429i-disco.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* The following definitions map the encoded LED setting to GPIO settings */ + +#define STM32F4_LED1 (1 << 0) +#define STM32F4_LED2 (1 << 1) + +#define ON_SETBITS_SHIFT (0) +#define ON_CLRBITS_SHIFT (4) +#define OFF_SETBITS_SHIFT (8) +#define OFF_CLRBITS_SHIFT (12) + +#define ON_BITS(v) ((v) & 0xff) +#define OFF_BITS(v) (((v) >> 8) & 0x0ff) +#define SETBITS(b) ((b) & 0x0f) +#define CLRBITS(b) (((b) >> 4) & 0x0f) + +#define ON_SETBITS(v) (SETBITS(ON_BITS(v)) +#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v)) +#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v)) +#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v)) + +#define LED_STARTED_ON_SETBITS ((STM32F4_LED1) << ON_SETBITS_SHIFT) +#define LED_STARTED_ON_CLRBITS ((STM32F4_LED2) << ON_CLRBITS_SHIFT) +#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT) +#define LED_STARTED_OFF_CLRBITS ((STM32F4_LED1|STM32F4_LED2) << OFF_CLRBITS_SHIFT) + +#define LED_HEAPALLOCATE_ON_SETBITS ((STM32F4_LED2) << ON_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_ON_CLRBITS ((STM32F4_LED1) << ON_CLRBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_SETBITS ((STM32F4_LED1) << OFF_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_CLRBITS ((STM32F4_LED2) << OFF_CLRBITS_SHIFT) + +#define LED_IRQSENABLED_ON_SETBITS ((STM32F4_LED1|STM32F4_LED2) << ON_SETBITS_SHIFT) +#define LED_IRQSENABLED_ON_CLRBITS ((STM32F4_LED2) << ON_CLRBITS_SHIFT) +#define LED_IRQSENABLED_OFF_SETBITS ((STM32F4_LED2) << OFF_SETBITS_SHIFT) +#define LED_IRQSENABLED_OFF_CLRBITS ((STM32F4_LED1) << OFF_CLRBITS_SHIFT) + +#define LED_STACKCREATED_ON_SETBITS ((STM32F4_LED1) << ON_SETBITS_SHIFT) +#define LED_STACKCREATED_ON_CLRBITS ((STM32F4_LED1|STM32F4_LED2) << ON_CLRBITS_SHIFT) +#define LED_STACKCREATED_OFF_SETBITS ((STM32F4_LED1|STM32F4_LED2) << OFF_SETBITS_SHIFT) +#define LED_STACKCREATED_OFF_CLRBITS ((STM32F4_LED1|STM32F4_LED2) << OFF_CLRBITS_SHIFT) + +#define LED_INIRQ_ON_SETBITS ((STM32F4_LED2) << ON_SETBITS_SHIFT) +#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_INIRQ_OFF_CLRBITS ((STM32F4_LED2) << OFF_CLRBITS_SHIFT) + +#define LED_SIGNAL_ON_SETBITS ((STM32F4_LED2) << ON_SETBITS_SHIFT) +#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_SIGNAL_OFF_CLRBITS ((STM32F4_LED2) << OFF_CLRBITS_SHIFT) + +#define LED_ASSERTION_ON_SETBITS ((STM32F4_LED2) << ON_SETBITS_SHIFT) +#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_ASSERTION_OFF_CLRBITS ((STM32F4_LED2) << OFF_CLRBITS_SHIFT) + +#define LED_PANIC_ON_SETBITS ((STM32F4_LED2) << ON_SETBITS_SHIFT) +#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_PANIC_OFF_CLRBITS ((STM32F4_LED2) << OFF_CLRBITS_SHIFT) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint16_t g_ledbits[8] = +{ + (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | + LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS), + + (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS | + LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS), + + (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS | + LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS), + + (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS | + LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS), + + (LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS | + LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS), + + (LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS | + LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS), + + (LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS | + LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS), + + (LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS | + LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS) +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static inline void led_clrbits(unsigned int clrbits) +{ + if ((clrbits & STM32F4_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, false); + } + + if ((clrbits & STM32F4_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, false); + } + +} + +static inline void led_setbits(unsigned int setbits) +{ + if ((setbits & STM32F4_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, true); + } + + if ((setbits & STM32F4_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, true); + } + +} + +static void led_setonoff(unsigned int bits) +{ + led_clrbits(CLRBITS(bits)); + led_setbits(SETBITS(bits)); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_setonoff(ON_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_setonoff(OFF_BITS(g_ledbits[led])); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/stm32f429i-disco/src/stm32_boot.c b/configs/stm32f429i-disco/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..2cf12677bcd116ace0500491dbded091552ec565 --- /dev/null +++ b/configs/stm32f429i-disco/src/stm32_boot.c @@ -0,0 +1,155 @@ +/************************************************************************************ + * configs/stm32f429i-disco/src/stm32_boot.c + * + * Copyright (C) 2011-2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "stm32f429i-disco.h" +#include "stm32_ccm.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || \ + defined(CONFIG_STM32_SPI3) || defined(CONFIG_STM32_SPI4) || \ + defined(CONFIG_STM32_SPI5) + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + +#ifdef CONFIG_STM32_OTGHS + /* Initialize USB if the 1) OTG HS controller is in the configuration and 2) + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. Presumably either CONFIG_USBDEV or CONFIG_USBHOST is also + * selected. + */ + + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif + +#ifdef CONFIG_STM32_FSMC + stm32_enablefsmc(); +#endif + +#ifdef HAVE_CCM_HEAP + /* Initialize CCM allocator */ + + ccm_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_initialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ +#ifdef CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE + /* Initialize the framebuffer driver */ + + up_fbinitialize(); +#endif + +#ifdef CONFIG_STM32F429I_DISCO_ILI9341_LCDIFACE + /* Initialize the SPI-based LCD early */ + + board_lcd_initialize(); +#endif + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + + (void)board_app_initialize(); +#endif +} +#endif diff --git a/configs/stm32f429i-disco/src/stm32_buttons.c b/configs/stm32f429i-disco/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..6dbe3cba7a9b53205b7de2a1ad9027eb3e49af11 --- /dev/null +++ b/configs/stm32f429i-disco/src/stm32_buttons.c @@ -0,0 +1,168 @@ +/**************************************************************************** + * configs/stm32f429i-disco/src/stm32_buttons.c + * + * Copyright (C) 2011-2012, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "stm32f429i-disco.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* Pin configuration for each STM32F4 Discovery button. This array is indexed by + * the BUTTON_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_USER +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed. + */ + + bool released = stm32_gpioread(g_buttons[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/stm32f429i-disco/src/stm32_extmem.c b/configs/stm32f429i-disco/src/stm32_extmem.c new file mode 100644 index 0000000000000000000000000000000000000000..135f68e4e37eb767189fef87983e51d68e1b47aa --- /dev/null +++ b/configs/stm32f429i-disco/src/stm32_extmem.c @@ -0,0 +1,262 @@ +/************************************************************************************ + * configs/stm32f429i-disco/src/stm32_extmem.c + * + * Copyright (C) 2013 Ken Pettit. All rights reserved. + * Author: Ken Pettit + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32_fsmc.h" +#include "stm32_gpio.h" +#include "stm32.h" +#include "stm32f429i-disco.h" + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_STM32_FSMC +# warning "FSMC is not enabled" +#endif + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +#define STM32_FSMC_NADDRCONFIGS 22 +#define STM32_FSMC_NDATACONFIGS 16 + +#define STM32_SDRAM_CLKEN FSMC_SDRAM_MODE_CMD_CLK_ENABLE | FSMC_SDRAM_CMD_BANK_2 +#define STM32_SDRAM_PALL FSMC_SDRAM_MODE_CMD_PALL | FSMC_SDRAM_CMD_BANK_2 +#define STM32_SDRAM_REFRESH FSMC_SDRAM_MODE_CMD_AUTO_REFRESH | FSMC_SDRAM_CMD_BANK_2 |\ + (3 << FSMC_SDRAM_AUTO_REFRESH_SHIFT) +#define STM32_SDRAM_MODEREG FSMC_SDRAM_MODE_CMD_LOAD_MODE | FSMC_SDRAM_CMD_BANK_2 |\ + FSMC_SDRAM_MODEREG_BURST_LENGTH_2 | \ + FSMC_SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL |\ + FSMC_SDRAM_MODEREG_CAS_LATENCY_3 |\ + FSMC_SDRAM_MODEREG_WRITEBURST_MODE_SINGLE + + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/* GPIO configurations common to most external memories */ + +static const uint32_t g_addressconfig[STM32_FSMC_NADDRCONFIGS] = +{ + GPIO_FSMC_A0, GPIO_FSMC_A1 , GPIO_FSMC_A2, GPIO_FSMC_A3, GPIO_FSMC_A4 , GPIO_FSMC_A5, + GPIO_FSMC_A6, GPIO_FSMC_A7, GPIO_FSMC_A8, GPIO_FSMC_A9, GPIO_FSMC_A10, GPIO_FSMC_A11, + + GPIO_FSMC_SDCKE1, GPIO_FSMC_SDNE1, GPIO_FSMC_SDNWE, GPIO_FSMC_NBL0, + GPIO_FSMC_SDNRAS, GPIO_FSMC_NBL1, GPIO_FSMC_BA0, GPIO_FSMC_BA1, + GPIO_FSMC_SDCLK, GPIO_FSMC_SDNCAS +}; + +static const uint32_t g_dataconfig[STM32_FSMC_NDATACONFIGS] = +{ + GPIO_FSMC_D0, GPIO_FSMC_D1 , GPIO_FSMC_D2, GPIO_FSMC_D3, GPIO_FSMC_D4 , GPIO_FSMC_D5, + GPIO_FSMC_D6, GPIO_FSMC_D7, GPIO_FSMC_D8, GPIO_FSMC_D9, GPIO_FSMC_D10, GPIO_FSMC_D11, + GPIO_FSMC_D12, GPIO_FSMC_D13, GPIO_FSMC_D14, GPIO_FSMC_D15 +}; + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for external memory usage + * + ************************************************************************************/ + +static void stm32_extmemgpios(const uint32_t *gpios, int ngpios) +{ + int i; + + /* Configure GPIOs */ + + for (i = 0; i < ngpios; i++) + { + stm32_configgpio(gpios[i]); + } +} + +/************************************************************************************ + * Name: stm32_sdramcommand + * + * Description: + * Initialize data line GPIOs for external memory access + * + ************************************************************************************/ + +static void stm32_sdramcommand(uint32_t command) +{ + uint32_t regval; + volatile uint32_t timeout = 0xFFFF; + + regval = getreg32( STM32_FSMC_SDSR ) & 0x00000020; + while ((regval != 0) && timeout-- > 0) + { + regval = getreg32( STM32_FSMC_SDSR ) & 0x00000020; + } + putreg32(command, STM32_FSMC_SDCMR); + timeout = 0xFFFF; + regval = getreg32( STM32_FSMC_SDSR ) & 0x00000020; + while ((regval != 0) && timeout-- > 0) + { + regval = getreg32( STM32_FSMC_SDSR ) & 0x00000020; + } +} + +/************************************************************************************ + * Name: stm32_enablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +void stm32_enablefsmc(void) +{ + uint32_t regval; + volatile int count; + + /* Enable GPIOs as FSMC / memory pins */ + + stm32_extmemgpios(g_addressconfig, STM32_FSMC_NADDRCONFIGS); + stm32_extmemgpios(g_dataconfig, STM32_FSMC_NDATACONFIGS); + + /* Enable AHB clocking to the FSMC */ + + regval = getreg32( STM32_RCC_AHB3ENR); + regval |= RCC_AHB3ENR_FSMCEN; + putreg32(regval, STM32_RCC_AHB3ENR); + + /* Configure and enable the SDRAM bank1 + * + * FMC clock = 180MHz/2 = 90MHz + * 90MHz = 11,11 ns + * All timings from the datasheet for Speedgrade -7 (=7ns) + */ + + putreg32(FSMC_SDRAM_CR_RPIPE_1 | + FSMC_SDRAM_CR_SDCLK_2X | + FSMC_SDRAM_CR_CASLAT_3 | + FSMC_SDRAM_CR_BANKS_4 | + FSMC_SDRAM_CR_WIDTH_16 | + FSMC_SDRAM_CR_ROWBITS_12 | + FSMC_SDRAM_CR_COLBITS_8, + STM32_FSMC_SDCR1); + + putreg32(FSMC_SDRAM_CR_RPIPE_1 | + FSMC_SDRAM_CR_SDCLK_2X | + FSMC_SDRAM_CR_CASLAT_3 | + FSMC_SDRAM_CR_BANKS_4 | + FSMC_SDRAM_CR_WIDTH_16 | + FSMC_SDRAM_CR_ROWBITS_12 | + FSMC_SDRAM_CR_COLBITS_8, + STM32_FSMC_SDCR2); + + putreg32((2 << FSMC_SDRAM_TR_TRCD_SHIFT) | /* tRCD min = 15ns */ + (2 << FSMC_SDRAM_TR_TRP_SHIFT) | /* tRP min = 15ns */ + (2 << FSMC_SDRAM_TR_TWR_SHIFT) | /* tWR = 2CLK */ + (7 << FSMC_SDRAM_TR_TRC_SHIFT) | /* tRC min = 63ns */ + (4 << FSMC_SDRAM_TR_TRAS_SHIFT) | /* tRAS min = 42ns */ + (7 << FSMC_SDRAM_TR_TXSR_SHIFT) | /* tXSR min = 70ns */ + (2 << FSMC_SDRAM_TR_TMRD_SHIFT), /* tMRD = 2CLK */ + STM32_FSMC_SDTR2); + + /* SDRAM Initialization sequence */ + + stm32_sdramcommand(STM32_SDRAM_CLKEN); /* Clock enable command */ + for (count = 0; count < 10000; count++) ; /* Delay */ + stm32_sdramcommand(STM32_SDRAM_PALL); /* Precharge ALL command */ + stm32_sdramcommand(STM32_SDRAM_REFRESH); /* Auto refresh command */ + stm32_sdramcommand(STM32_SDRAM_MODEREG); /* Mode Register program */ + + /* Set refresh count + * + * FMC_CLK = 90MHz + * Refresh_Rate = 7.81us + * Counter = (FMC_CLK * Refresh_Rate) - 20 + */ + + putreg32(683 << 1, STM32_FSMC_SDRTR); + + /* Disable write protection */ + +// regval = getreg32(STM32_FSMC_SDCR2); +// putreg32(regval & 0xFFFFFDFF, STM32_FSMC_SDCR2); +} + +/************************************************************************************ + * Name: stm32_disablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +void stm32_disablefsmc(void) +{ + uint32_t regval; + + /* Disable AHB clocking to the FSMC */ + + regval = getreg32(STM32_RCC_AHB3ENR); + regval &= ~RCC_AHB3ENR_FSMCEN; + putreg32(regval, STM32_RCC_AHB3ENR); +} diff --git a/configs/stm32f429i-disco/src/stm32_idle.c b/configs/stm32f429i-disco/src/stm32_idle.c new file mode 100644 index 0000000000000000000000000000000000000000..1654e0fed23bafe0e1c120010c87be306456b3ee --- /dev/null +++ b/configs/stm32f429i-disco/src/stm32_idle.c @@ -0,0 +1,279 @@ +/**************************************************************************** + * configs/stm32f429i-disco/src/stm32_idle.c + * + * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +#include +#include +#include +#include + +#include + +#include "up_internal.h" +#include "stm32_pm.h" +#include "stm32_rcc.h" +#include "stm32_exti.h" + +#include "stm32f429i-disco.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* Does the board support an IDLE LED to indicate that the board is in the + * IDLE state? + */ + +#if defined(CONFIG_ARCH_LEDS) && defined(LED_IDLE) +# define BEGIN_IDLE() board_autoled_on(LED_IDLE) +# define END_IDLE() board_autoled_off(LED_IDLE) +#else +# define BEGIN_IDLE() +# define END_IDLE() +#endif + +/* Values for the RTC Alarm to wake up from the PM_STANDBY mode */ + +#ifndef CONFIG_PM_ALARM_SEC +# define CONFIG_PM_ALARM_SEC 3 +#endif + +#ifndef CONFIG_PM_ALARM_NSEC +# define CONFIG_PM_ALARM_NSEC 0 +#endif + +#define PM_IDLE_DOMAIN 0 /* Revisit */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if defined(CONFIG_PM) && defined(CONFIG_RTC_ALARM) +static void stm32_alarmcb(void); +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_idlepm + * + * Description: + * Perform IDLE state power management. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void stm32_idlepm(void) +{ +#ifdef CONFIG_RTC_ALARM + struct timespec alarmtime; +#endif + static enum pm_state_e oldstate = PM_NORMAL; + enum pm_state_e newstate; + irqstate_t flags; + int ret; + + /* Decide, which power saving level can be obtained */ + + newstate = pm_checkstate(PM_IDLE_DOMAIN); + + /* Check for state changes */ + + if (newstate != oldstate) + { + lldbg("newstate= %d oldstate=%d\n", newstate, oldstate); + + flags = enter_critical_section(); + + /* Force the global state change */ + + ret = pm_changestate(PM_IDLE_DOMAIN, newstate); + if (ret < 0) + { + /* The new state change failed, revert to the preceding state */ + + (void)pm_changestate(PM_IDLE_DOMAIN, oldstate); + + /* No state change... */ + + goto errout; + } + + /* Then perform board-specific, state-dependent logic here */ + + switch (newstate) + { + case PM_NORMAL: + { + } + break; + + case PM_IDLE: + { + } + break; + + case PM_STANDBY: + { +#ifdef CONFIG_RTC_ALARM + /* Disable RTC Alarm interrupt */ + +#warning "missing logic" + + /* Configure the RTC alarm to Auto Wake the system */ + +#warning "missing logic" + + /* The tv_nsec value must not exceed 1,000,000,000. That + * would be an invalid time. + */ + +#warning "missing logic" + + /* Set the alarm */ + +#warning "missing logic" +#endif + /* Call the STM32 stop mode */ + + stm32_pmstop(true); + + /* We have been re-awakened by some even: A button press? + * An alarm? Cancel any pending alarm and resume the normal + * operation. + */ + +#ifdef CONFIG_RTC_ALARM +#warning "missing logic" +#endif + /* Resume normal operation */ + + pm_changestate(PM_IDLE_DOMAIN, PM_NORMAL); + newstate = PM_NORMAL; + } + break; + + case PM_SLEEP: + { + /* We should not return from standby mode. The only way out + * of standby is via the reset path. + */ + + (void)stm32_pmstandby(); + } + break; + + default: + break; + } + + /* Save the new state */ + + oldstate = newstate; + +errout: + leave_critical_section(flags); + } +} +#else +# define stm32_idlepm() +#endif + +/************************************************************************************ + * Name: stm32_alarmcb + * + * Description: + * RTC alarm service routine + * + ************************************************************************************/ + +#if defined(CONFIG_PM) && defined(CONFIG_RTC_ALARM) +static void stm32_alarmcb(void) +{ + /* This alarm occurs because there wasn't any EXTI interrupt during the + * PM_STANDBY period. So just go to sleep. + */ + + pm_changestate(PM_IDLE_DOMAIN, PM_SLEEP); +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_idle + * + * Description: + * up_idle() is the logic that will be executed when their is no other + * ready-to-run task. This is processor idle time and will continue until + * some interrupt occurs to cause a context switch from the idle task. + * + * Processing in this state may be processor-specific. e.g., this is where + * power management operations might be performed. + * + ****************************************************************************/ + +void up_idle(void) +{ +#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS) + /* If the system is idle and there are no timer interrupts, then process + * "fake" timer interrupts. Hopefully, something will wake up. + */ + + sched_process_timer(); +#else + + /* Perform IDLE mode power management */ + + BEGIN_IDLE(); + stm32_idlepm(); + END_IDLE(); +#endif +} + diff --git a/configs/stm32f429i-disco/src/stm32_ili93414ws.c b/configs/stm32f429i-disco/src/stm32_ili93414ws.c new file mode 100644 index 0000000000000000000000000000000000000000..aea55ea8d63208061dea6f9d77a8142d45e804c5 --- /dev/null +++ b/configs/stm32f429i-disco/src/stm32_ili93414ws.c @@ -0,0 +1,1242 @@ +/**************************************************************************** + * configs/stm32f429i-disco/src/stm32_ili93414ws.c + * + * Driver for the ILI9341 Single Chip LCD driver connected + * via 4 wire serial (spi) mcu interface + * + * Copyright (C) 2014 Marco Krahl. All rights reserved. + * Author: Marco Krahl + * + * References: ILI9341_DS_V1.10.pdf (Rev: 1.10), "a-Si TFT LCD Single Chip + * Driver 240RGBx320 Resolution and 262K color", ILI TECHNOLOGY + * CORP., http://www.ilitek.com. + * ILI TECHNOLOGY CORP., http://www.ilitek.com. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior writen permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "stm32f429i-disco.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Display is connected at spi5 device */ + +#define ILI93414WS_SPI_DEVICE 5 + +/* spi frequency based on arch/arm/src/stm32/stm32_spi.c */ + +#if CONFIG_STM32F429I_DISCO_ILI9341_SPIFREQUENCY >= \ + (STM32_PCLK1_FREQUENCY >> 1) +# define ILI93414WS_SPI_BR SPI_CR1_FPCLCKd2 /* 000: fPCLK/2 */ +# define ILI93414WS_BAUD_DIVISOR 2 +#elif CONFIG_STM32F429I_DISCO_ILI9341_SPIFREQUENCY >= \ + (STM32_PCLK1_FREQUENCY >> 2) +# define ILI93414WS_SPI_BR SPI_CR1_FPCLCKd4 /* 001: fPCLK/4 */ +# define ILI93414WS_BAUD_DIVISOR 4 +#elif CONFIG_STM32F429I_DISCO_ILI9341_SPIFREQUENCY >= \ + (STM32_PCLK1_FREQUENCY >> 3) +# define ILI93414WS_SPI_BR SPI_CR1_FPCLCKd8 /* 010: fPCLK/8 */ +# define ILI93414WS_BAUD_DIVISOR 8 +#elif CONFIG_STM32F429I_DISCO_ILI9341_SPIFREQUENCY >= \ + (STM32_PCLK1_FREQUENCY >> 4) +# define ILI93414WS_SPI_BR SPI_CR1_FPCLCKd16 /* 011: fPCLK/16 */ +# define ILI93414WS_BAUD_DIVISOR 16 +#elif CONFIG_STM32F429I_DISCO_ILI9341_SPIFREQUENCY >= \ + (STM32_PCLK1_FREQUENCY >> 5) +# define ILI93414WS_SPI_BR SPI_CR1_FPCLCKd32 /* 100: fPCLK/32 */ +# define ILI93414WS_BAUD_DIVISOR 32 +#elif CONFIG_STM32F429I_DISCO_ILI9341_SPIFREQUENCY >= \ + (STM32_PCLK1_FREQUENCY >> 6) +# define ILI93414WS_SPI_BR SPI_CR1_FPCLCKd64 /* 101: fPCLK/64 */ +# define ILI93414WS_BAUD_DIVISOR 64 +#elif CONFIG_STM32F429I_DISCO_ILI9341_SPIFREQUENCY >= \ + (STM32_PCLK1_FREQUENCY >> 7) +# define ILI93414WS_SPI_BR SPI_CR1_FPCLCKd128 /* 110: fPCLK/128 */ +# define ILI93414WS_BAUD_DIVISOR 128 +#else +# define ILI93414WS_SPI_BR SPI_CR1_FPCLCKd256 /* 111: fPCLK/256 */ +# define ILI93414WS_BAUD_DIVISOR 256 +#endif + +/* + * Permitted clock delay for a pixel transmission from the LCD gram. + * Calculated by cpu clock / (spi clock / baud divisor) + */ + +#define ILI93414WS_RECV_CLK (STM32_SYSCLK_FREQUENCY / \ + (STM32_PCLK1_FREQUENCY / \ + ILI93414WS_BAUD_DIVISOR)) + +/* Definition of the spi mcu register */ + +#define ILI93414WS_SPI_BASE STM32_SPI5_BASE +#define ILI93414WS_SPI_CR1 (ILI93414WS_SPI_BASE + STM32_SPI_CR1_OFFSET) +#define ILI93414WS_SPI_CR2 (ILI93414WS_SPI_BASE + STM32_SPI_CR2_OFFSET) +#define ILI93414WS_SPI_SR (ILI93414WS_SPI_BASE + STM32_SPI_SR_OFFSET) +#define ILI93414WS_SPI_DR (ILI93414WS_SPI_BASE + STM32_SPI_DR_OFFSET) + +/* Activates the usage of the spi interface structure if several active devices + * connected on the SPI5 bus, e.g. LCD Display, MEMS. This will perform locking + * of the spi bus by SPI_LOCK at each selection of the SPI5 device. + */ + +#ifdef CONFIG_STM32_SPI5 +# define ILI93414WS_SPI +#endif + +/* Debug option */ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Private Type Definition + ****************************************************************************/ + +struct ili93414ws_lcd_s +{ + /* Publically visible device structure */ + + struct ili9341_lcd_s dev; + +#ifdef ILI93414WS_SPI + /* Reference to spi device structure */ + + FAR struct spi_dev_s *spi; + + /* Backup cr1 register at selection */ + + uint16_t cr1; + + /* Backup cr2 register at selection */ + + uint16_t cr2; +#endif + +#ifndef CONFIG_STM32F429I_DISCO_ILI9341_SPIBITS16 + /* + * Marks current display operation mode (gram or command/parameter) + * If 16-bit spi mode is enabled for pixel data operation, the flag is not + * neccessary. The pixel data operation mode can then be recognized by the + * DFF flag in the cr1 register. + */ + + uint8_t gmode; +#endif +}; + + +/**************************************************************************** + * Private Function Protototypes + ****************************************************************************/ + +/* Low-level spi transfer */ + +static void stm32_ili93414ws_modifyreg( + uint32_t reg, uint16_t setbits, uint16_t clrbits); +static inline void stm32_ili93414ws_modifycr1( + uint16_t setbits, uint16_t clrbits); +static inline void stm32_ili93414ws_modifycr2( + uint16_t setbits, uint16_t clrbits); +static void stm32_ili93414ws_spisendmode(void); +static void stm32_ili93414ws_spirecvmode(void); +static void stm32_ili93414ws_spienable(void); +static void stm32_ili93414ws_spidisable(void); + +static inline void stm32_ili93414ws_set8bitmode( + FAR struct ili93414ws_lcd_s *dev); +static inline void stm32_ili93414ws_set16bitmode( + FAR struct ili93414ws_lcd_s *dev); + +/* Command and data transmission control */ + +static void stm32_ili93414ws_sndword(uint16_t wd); +static int stm32_ili93414ws_sendblock(FAR struct ili93414ws_lcd_s *lcd, + const uint16_t *wd, uint16_t nwords); +static uint16_t stm32_ili93414ws_recvword(void); +static int stm32_ili93414ws_recvblock(FAR struct ili93414ws_lcd_s *lcd, + uint16_t *wd, uint16_t nwords); +static inline void stm32_ili93414ws_cmddata( + FAR struct ili9341_lcd_s *lcd, bool cmd); + +/* Initializing / Configuration */ + +static void stm32_ili93414ws_spiconfig(FAR struct ili9341_lcd_s *lcd); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +struct ili93414ws_lcd_s g_lcddev; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_ili93414ws_modifyreg + * + * Description: + * Clear and set bits in the CR register (based on + * arch/arm/src/stm32/stm32_spi.c). + * + * Input Parameters: + * reg - register to set + * clrbits - The bits to clear + * setbits - The bits to set + * + * Returned Value: + * + ****************************************************************************/ + +static void stm32_ili93414ws_modifyreg( + uint32_t reg, uint16_t setbits, uint16_t clrbits) +{ + uint16_t regval; + regval = getreg16(reg); + regval &= ~clrbits; + regval |= setbits; + putreg16(regval, reg); +} + + +/**************************************************************************** + * Name: stm32_ili93414ws_modifycr1 + * + * Description: + * Clear and set bits in the CR1 register. + * + * Input Parameters: + * clrbits - The bits to clear + * setbits - The bits to set + * + * Returned Value: + * + ****************************************************************************/ + +static inline void stm32_ili93414ws_modifycr1(uint16_t setbits, uint16_t clrbits) +{ + stm32_ili93414ws_modifyreg(ILI93414WS_SPI_CR1, setbits, clrbits); +} + +/**************************************************************************** + * Name: stm32_ili93414ws_modifycr2 + * + * Description: + * Clear and set bits in the CR2 register. + * + * Input Parameters: + * clrbits - The bits to clear + * setbits - The bits to set + * + * Returned Value: + * + ****************************************************************************/ + +static inline void stm32_ili93414ws_modifycr2(uint16_t setbits, uint16_t clrbits) +{ + stm32_ili93414ws_modifyreg(ILI93414WS_SPI_CR2, setbits, clrbits); +} + + +/**************************************************************************** + * Name: stm32_ili93414ws_spirecvmode + * + * Description: + * Sets the spi device to the bidirectional receive mode + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +static void stm32_ili93414ws_spirecvmode(void) +{ + /* Set to bidirectional rxonly mode */ + + stm32_ili93414ws_modifycr1(0, SPI_CR1_BIDIOE); + + /* Disable spi */ + + stm32_ili93414ws_spidisable(); + + /* + * Clear the rx buffer if received data exist e.g. from previous + * broken transfer. + */ + + (void)getreg16(ILI93414WS_SPI_DR); +} + + +/**************************************************************************** + * Name: stm32_ili93414ws_spisendmode + * + * Description: + * Sets the spi device to the bidirectional transmit mode + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +static void stm32_ili93414ws_spisendmode(void) +{ + /* Set to bidirectional transmit mode */ + + stm32_ili93414ws_modifycr1(SPI_CR1_BIDIOE, 0); + + /* enable spi */ + + stm32_ili93414ws_spienable(); +} + + +/**************************************************************************** + * Name: stm32_ili93414ws_spienable + * + * Description: + * Enable the spi device + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +static void stm32_ili93414ws_spienable(void) +{ + uint16_t regval; + + regval = getreg16(ILI93414WS_SPI_CR1); + regval |= SPI_CR1_SPE; + putreg16(regval, ILI93414WS_SPI_CR1); +} + + +/**************************************************************************** + * Name: stm32_ili93414ws_spidisable + * + * Description: + * Disable the spi device + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +static void stm32_ili93414ws_spidisable(void) +{ + uint16_t regval; + + regval = getreg16(ILI93414WS_SPI_CR1); + regval &= ~SPI_CR1_SPE; + putreg16(regval, ILI93414WS_SPI_CR1); +} + + +/**************************************************************************** + * Name: stm32_ili93414ws_sndword + * + * Description: + * Send a word to the lcd driver. + * + * Input Parameters: + * wd - word to send + * + * Returned Value: + * + ****************************************************************************/ + +static void stm32_ili93414ws_sndword(uint16_t wd) +{ + /* Send the word */ + + putreg16(wd, ILI93414WS_SPI_DR); + + /* Wait until the transmit buffer is empty */ + + while ((getreg16(ILI93414WS_SPI_SR) & SPI_SR_TXE) == 0); +} + +/**************************************************************************** + * Name: stm32_ili93414ws_sendblock + * + * Description: + * Send a number of words to the lcd driver. + * + * Input Parameters: + * spi - Reference to the private device structure + * wd - Reference to the words to send + * nwords - number of words to send + * + * Returned Value: + * On success - OK + * + ****************************************************************************/ + +static int stm32_ili93414ws_sendblock(FAR struct ili93414ws_lcd_s *lcd, + const uint16_t *wd, uint16_t nwords) +{ + /* Set to bidirectional transmit mode and enable spi */ + + stm32_ili93414ws_spisendmode(); + + /* Check if 16-bit spi mode is configured for transmit */ +#ifdef CONFIG_STM32F429I_DISCO_ILI9341_SPIBITS16 + if ((getreg16(ILI93414WS_SPI_CR1) & SPI_CR1_DFF) != 0) + { + /* 16-bit spi mode */ + + const uint16_t *src = wd; + uint16_t word; + + while (nwords-- > 0) + { + word = *src++; + stm32_ili93414ws_sndword(word); + } + } +#else + /* + * 8-bit spi mode is enabled for pixel data operations. + * Each pixel must be transmitted by two write operations. + */ + if (lcd->gmode == 16) + { + /* 8-bit spi mode */ + + const uint16_t *src = wd; + uint16_t word; + + while (nwords-- > 0) + { + word = *src++; + stm32_ili93414ws_sndword((word >> 8)); + stm32_ili93414ws_sndword((word & 0xff)); + } + } +#endif + else + { + /* 8-bit spi mode */ + + const uint8_t *src = (const uint8_t*)wd; + uint8_t word; + + while (nwords-- > 0) + { + word = *src++; + stm32_ili93414ws_sndword((uint16_t)word); + } + + } + + /* + * Wait until transmit is not busy after the last word is transmitted, marked + * by the BSY flag in the cr1 register. This is neccessary if entering in halt + * mode or disable the spi periphery. + */ + + while ((getreg16(ILI93414WS_SPI_SR) & SPI_SR_BSY) != 0); + + /* Disable spi */ + + stm32_ili93414ws_spidisable(); + + return OK; +} + + +/**************************************************************************** + * Name: stm32_ili93414ws_recvword + * + * Description: + * Receive a word from the lcd driver. + * + * Input Parameters: + * + * Returned Value: + * On success - The received word from the LCD Single Chip Driver. + * On error - 0 (If timeout during receiving) + * + ****************************************************************************/ + +static uint16_t stm32_ili93414ws_recvword(void) +{ + volatile uint8_t n; + uint16_t regval; + irqstate_t flags; + + /* + * Disable interrupts during time critical spi sequence. + * In bidrectional receive mode the data transfer can only be stopped by + * disabling the spi device. This is here done by disabling the spi device + * immediately after enabling it. If the pixel data stream is interrupted + * during receiving, a synchronized transfer can not ensure. Especially on + * higher frequency it can happen that the interrupted driver isn't fast + * enough to stop transmitting by disabling the spi device. So pixels lost but + * not recognized by the driver. This results in a big lock because the driver + * wants to receive missing pixel data. + * The critical section here ensures that the spi device is disabled fast + * enough during a pixel is transmitted. + */ + + flags = enter_critical_section(); + + /* Backup the content of the current cr1 register only 1 times */ + + regval = getreg16(ILI93414WS_SPI_CR1); + + /* + * Enable spi device followed by disable the spi device. + * + * Ensure that the spi is disabled within 8 or 16 spi clock cycles depending + * on the configured spi bit mode. This is neccessary to prevent that the next + * data word is transmitted by the slave before the RX buffer is cleared. + * Otherwise the RX buffer will be overwritten. + * + * Physically the spi clock is disabled after the current 8/16 clock cycles + * are completed. + */ + + regval |= SPI_CR1_SPE; + putreg16(regval, ILI93414WS_SPI_CR1); + + /* Disable spi device */ + + regval &= ~SPI_CR1_SPE; + putreg16(regval, ILI93414WS_SPI_CR1); + + /* The spi device is in disabled state so it is safe to enable interrupts */ + + leave_critical_section(flags); + + /* + * Waits until the RX buffer is filled with the received data word signalized + * by the spi hardware through the RXNE flag. + * A busy loop is preferred against interrupt driven receiving method here + * because this happend fairly often. Also we have to ensure to avoid a big + * lock if the lcd driver doesn't send data anymore. + * A latency of CPU clock / SPI clock * 16 SPI clocks should be enough here. + */ + + for (n = 0; n < ILI93414WS_RECV_CLK * 16; n++) + { + if ((getreg16(ILI93414WS_SPI_SR) & SPI_SR_RXNE) != 0) + { + /* Receive the data word from the RX buffer */ + + return getreg16(ILI93414WS_SPI_DR); + } + } + + dbg("Timeout during receiving pixel word\n"); + + return 0; +} + + +/**************************************************************************** + * Name: stm32_ili93414ws_recvblock + * + * Description: + * Receive a number of words from to the lcd driver. + * Note: The first received word is the dummy word and discarded! + * + * Input Parameters: + * spi - Reference to the private device structure + * wd - Reference to where the words receive + * nwords - number of words to receive + * + * Returned Value: + * OK - On Success + * + ****************************************************************************/ + +static int stm32_ili93414ws_recvblock(FAR struct ili93414ws_lcd_s *lcd, + uint16_t *wd, uint16_t nwords) +{ + /* + * ili9341 uses a 18-bit pixel format packed in a 24-bit stream per pixel. + * The following format is transmitted: RRRRRR00 GGGGGG00 BBBBBB00 + * Convert it to: RRRRRGGG GGGBBBBB + */ + + /* Set to bidirectional transmit mode and disable spi */ + + stm32_ili93414ws_spirecvmode(); + + /* Check if 16-bit spi mode is configured for receive */ + +#ifdef CONFIG_STM32F429I_DISCO_ILI9341_SPIBITS16 + /* Two contiguous pixel must be received by three read operations. */ + + if ((getreg16(ILI93414WS_SPI_CR1) & SPI_CR1_DFF) != 0) + { + /* 16-bit mode */ + + uint16_t *dest = wd; + uint16_t w1; + uint16_t w2; + + /* Receive first pixel */ + + if (nwords) + { + /* Discard the first 8 bit dummy */ + + /* 00000000 RRRRRR00 */ + w1 = stm32_ili93414ws_recvword(); + + /* GGGGGG00 BBBBBB00 */ + w2 = stm32_ili93414ws_recvword(); + + *dest++ = (((w1 << 8) & 0xf800) | + ((w2 >> 2) & 0x7e0) | + ((w2 >> 3) & 0x1f)); + + --nwords; + } + + /* + * Receive + * if nwords even and greater than 2: pixel 2 to n-1 + * if nwords odd and greater than 2: pixel 2 to n + */ + + while (nwords--) + { + /* RRRRRR00 GGGGGG00 */ + w1 = stm32_ili93414ws_recvword(); + + /* BBBBBB00 RRRRRR00 */ + w2 = stm32_ili93414ws_recvword(); + + *dest++ = ((w1 & 0xf800) | ((w1 << 3) & 0x7e0) | (w2 >> 11)); + + if (!nwords) + { + break; + } + + /* GGGGGG00 BBBBBB00 */ + w1 = stm32_ili93414ws_recvword(); + + *dest++ = (((w1 >> 5) & 0x7e0) | + ((w1 >> 3) & 0x1f) | + ((w2 << 8) & 0xf800)); + + --nwords; + } + } +#else + /* + * 8-bit spi mode is enabled for pixel data operations. + * Each pixel must be received by three read operations. + */ + if (lcd->gmode == 16) + { + /* 8-bit spi mode but 16-bit mode is done by two 8-bit transmits */ + uint16_t *dest = wd; + + /* Dummy read to discard the first 8 bit. */ + (void)stm32_ili93414ws_recvword(); + + while (nwords--) + { + uint8_t r, g, b; + r = (uint8_t)(stm32_ili93414ws_recvword() >> 3); + g = (uint8_t)(stm32_ili93414ws_recvword() >> 2); + b = (uint8_t)(stm32_ili93414ws_recvword() >> 3); + *dest++ = ((r << 11) | (g << 5) | b); + } + } +#endif + else + { + /* 8-bit mode */ + + uint8_t *dest = (uint8_t*)wd; + + while (nwords--) + { + *dest++ = (uint8_t)stm32_ili93414ws_recvword(); + } + } + + /* Disable spi device is done by recvword */ + + return OK; +} + + +/**************************************************************************** + * Name: stm32_ili93414ws_set8bitmode + * + * Description: + * Set spi device to 8-bit data format + * + * Input Parameters: + * dev - Reference to the private driver structure + * + * Returned Value: + * + ****************************************************************************/ + +static inline void stm32_ili93414ws_set8bitmode( + FAR struct ili93414ws_lcd_s *dev) +{ + stm32_ili93414ws_modifycr1(0, SPI_CR1_DFF); +#ifndef CONFIG_STM32F429I_DISCO_ILI9341_SPIBITS16 + dev->gmode = 8; +#endif +} + + +#ifdef CONFIG_STM32F429I_DISCO_ILI9341_SPIBITS16 +/**************************************************************************** + * Name: stm32_ili93414ws_set16bitmode + * + * Description: + * Set spi device to 16-bit data format. + * + * Input Parameters: + * dev - Reference to the private driver structure + * + * Returned Value: + * + ****************************************************************************/ + +static inline void stm32_ili93414ws_set16bitmode( + FAR struct ili93414ws_lcd_s *dev) +{ + stm32_ili93414ws_modifycr1(SPI_CR1_DFF, 0); +} +#else + +static inline void stm32_ili93414ws_set16bitmode( + FAR struct ili93414ws_lcd_s *dev) +{ + dev->gmode = 16; +} +#endif + + +/**************************************************************************** + * Name: stm32_ili93414ws_spiconfig + * + * Description: + * Disable spi device and configure to bidirectional mode. + * + * Input Parameters: + * lcd - Reference to the private driver structure + * + * Returned Value: + * + ****************************************************************************/ + +static void stm32_ili93414ws_spiconfig(FAR struct ili9341_lcd_s *lcd) +{ + FAR struct ili93414ws_lcd_s *priv = (FAR struct ili93414ws_lcd_s *)lcd; + irqstate_t flags; + + uint16_t clrbitscr1 = SPI_CR1_CPHA|SPI_CR1_CPOL|SPI_CR1_BR_MASK| + SPI_CR1_CRCEN|SPI_CR1_LSBFIRST|SPI_CR1_RXONLY| + SPI_CR1_DFF; + + uint16_t setbitscr1 = SPI_CR1_BIDIOE|SPI_CR1_BIDIMODE|SPI_CR1_MSTR| + SPI_CR1_SSI|SPI_CR1_SSM|ILI93414WS_SPI_BR; + + uint16_t clrbitscr2 = SPI_CR2_TXEIE|SPI_CR2_RXNEIE|SPI_CR2_ERRIE| + SPI_CR2_FRF|SPI_CR2_SSOE; + + uint16_t setbitscr2 = 0; + + + flags = enter_critical_section(); + + /* Disable spi */ + + stm32_ili93414ws_spidisable(); + + /* Set to default 8-bit transfer mode */ + + stm32_ili93414ws_set8bitmode(priv); + +#ifdef ILI93414WS_SPI + /* Backup cr1 and cr2 register to be sure they will be usable + * by default spi interface. Disable spi device here is neccessary at the time + * restoring the register during deselection. + */ + + priv->cr2 = getreg16(ILI93414WS_SPI_CR2); + priv->cr1 = getreg16(ILI93414WS_SPI_CR1); +#endif + + /* + * Set spi device to bidirectional half duplex + * Configure to master with 8-bit data format and SPIDEV_MODE0 + */ + + stm32_ili93414ws_modifycr1(setbitscr1, clrbitscr1); + + /* Disable dma, set to motorola spi. */ + + stm32_ili93414ws_modifycr2(setbitscr2, clrbitscr2); + + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: stm32_ili93414ws_cmddata + * + * Description: + * Select command or data transfer mode + * + * Input Parameters: + * lcd - Reference to the private driver structure + * cmd - Refers to command or parameter + * + * Returned Value: + * + ****************************************************************************/ + +#ifdef ILI93414WS_SPI +static inline void stm32_ili93414ws_cmddata( + FAR struct ili9341_lcd_s *lcd, bool cmd) +{ + FAR struct ili93414ws_lcd_s *priv = (FAR struct ili93414ws_lcd_s *)lcd; + + SPI_CMDDATA(priv->spi, SPIDEV_DISPLAY, cmd); +} +#else +static inline void stm32_ili93414ws_cmddata( + FAR struct ili9341_lcd_s *lcd, bool cmd) +{ + (void)stm32_gpiowrite(GPIO_LCD_DC, !cmd); +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_ili93414ws_backlight + * + * Description: + * Set the backlight level of the connected display. + * + * Input Parameters: + * spi - Reference to the public driver structure + * level - backligth level + * + * Returned Value: + * OK - On Success + * + ****************************************************************************/ + +static int stm32_ili93414ws_backlight(FAR struct ili9341_lcd_s *lcd, int level) +{ + return OK; +} + + +/**************************************************************************** + * Name: stm32_ili93414ws_select + * + * Description: + * Select the SPI, locking and re-configuring if necessary + * + * Input Parameters: + * spi - Reference to the public driver structure + * + * Returned Value: + * + ****************************************************************************/ + +#ifdef ILI93414WS_SPI +static void stm32_ili93414ws_select(FAR struct ili9341_lcd_s *lcd) +{ + FAR struct ili93414ws_lcd_s *priv = (FAR struct ili93414ws_lcd_s *)lcd; + + /* + * Select ili9341 (locking the SPI bus in case there are multiple + * devices competing for the SPI bus + */ + + SPI_LOCK(priv->spi, true); + SPI_SELECT(priv->spi, SPIDEV_DISPLAY, true); + + /* Configure spi and disable */ + + stm32_ili93414ws_spiconfig(lcd); +} +#else +static void stm32_ili93414ws_select(FAR struct ili9341_lcd_s *lcd) +{ + /* we own the spi bus, so just select the chip */ + + (void)stm32_gpiowrite(GPIO_CS_LCD, false); + + /* Disable spi */ + + stm32_ili93414ws_spidisable(); +} +#endif + +/**************************************************************************** + * Name: stm32_ili93414ws_deselect + * + * Description: + * De-select the SPI + * + * Input Parameters: + * spi - Reference to the public driver structure + * + * Returned Value: + * + ****************************************************************************/ + +#ifdef ILI93414WS_SPI +static void stm32_ili93414ws_deselect(FAR struct ili9341_lcd_s *lcd) +{ + irqstate_t flags; + FAR struct ili93414ws_lcd_s *priv = (FAR struct ili93414ws_lcd_s *)lcd; + + flags = enter_critical_section(); + + /* + * Restore cr1 and cr2 register to be sure they will be usable + * by default spi interface structure. (This is an important workarround as + * long as half duplex mode is not supported by the spi interface in + * arch/arm/src/stm32/stm32_spi.c). + */ + + putreg16(priv->cr2, ILI93414WS_SPI_CR2); + putreg16(priv->cr1, ILI93414WS_SPI_CR1); + + /* + * Enable spi device is default for initialized spi ports (see + * arch/arm/src/stm32/stm32_spi.c). + */ + + stm32_ili93414ws_spienable(); + + leave_critical_section(flags); + + /* de-select ili9341 and relinquish the spi bus. */ + + SPI_SELECT(priv->spi, SPIDEV_DISPLAY, false); + SPI_LOCK(priv->spi, false); +} +#else +static void stm32_ili93414ws_deselect(FAR struct ili9341_lcd_s *lcd) +{ + (void)stm32_gpiowrite(GPIO_CS_LCD, true); +} +#endif + + +/**************************************************************************** + * Name: stm32_ili93414ws_sndcmd + * + * Description: + * Send a command to the lcd driver. + * + * Input Parameters: + * lcd - Reference to the ili9341_lcd_s driver structure + * cmd - command to send + * + * Returned Value: + * On success - OK + * + ****************************************************************************/ + +static int stm32_ili93414ws_sendcmd( + FAR struct ili9341_lcd_s *lcd, const uint8_t cmd) +{ + int ret; + const uint16_t bw = (const uint16_t)cmd; + FAR struct ili93414ws_lcd_s *priv = (FAR struct ili93414ws_lcd_s *)lcd; + + /* Set to 8-bit mode in disabled state, spi device is in disabled state */ + + stm32_ili93414ws_set8bitmode(priv); + + lcdvdbg("cmd=%04x\n", bw); + stm32_ili93414ws_cmddata(lcd, true); + ret = stm32_ili93414ws_sendblock(priv, &bw, 1); + stm32_ili93414ws_cmddata(lcd, false); + + return ret; +} + + +/**************************************************************************** + * Name: stm32_ili93414ws_sendparam + * + * Description: + * Send a parameter to the lcd driver. + * + * Input Parameters: + * lcd - Reference to the ili9341_lcd_s driver structure + * param - parameter to send + * + * Returned Value: + * OK - On Success + * + ****************************************************************************/ + +static int stm32_ili93414ws_sendparam(FAR struct ili9341_lcd_s *lcd, + const uint8_t param) +{ + FAR struct ili93414ws_lcd_s *priv = (FAR struct ili93414ws_lcd_s *)lcd; + const uint16_t bw = (const uint16_t)param; + + /* Set to 8-bit mode in disabled state, spi device is in disabled state */ + + stm32_ili93414ws_set8bitmode(priv); + + lcdvdbg("param=%04x\n", bw); + return stm32_ili93414ws_sendblock(priv, &bw, 1); +} + + +/**************************************************************************** + * Name: stm32_ili93414ws_sendgram + * + * Description: + * Send a number of pixel words to the lcd driver gram. + * + * Input Parameters: + * lcd - Reference to the ili9341_lcd_s driver structure + * wd - Reference to the words to send + * nwords - number of words to send + * + * Returned Value: + * OK - On Success + * + ****************************************************************************/ + +static int stm32_ili93414ws_sendgram(FAR struct ili9341_lcd_s *lcd, + const uint16_t *wd, uint32_t nwords) +{ + FAR struct ili93414ws_lcd_s *priv = (FAR struct ili93414ws_lcd_s *)lcd; + + lcdvdbg("wd=%p, nwords=%d\n", wd, nwords); + + /* Set to 16-bit mode transfer mode, spi device is in disabled state */ + + stm32_ili93414ws_set16bitmode(priv); + + return stm32_ili93414ws_sendblock(priv, wd, nwords); +}; + + +/**************************************************************************** + * Name: stm32_ili93414ws_recvparam + * + * Description: + * Receive a parameter from the lcd driver. + * + * Input Parameters: + * lcd - Reference to the ili9341_lcd_s driver structure + * param - Reference to where parameter receive + * + * Returned Value: + * OK - On Success + * + ****************************************************************************/ + +static int stm32_ili93414ws_recvparam(FAR struct ili9341_lcd_s *lcd, + uint8_t *param) +{ + FAR struct ili93414ws_lcd_s *priv = (FAR struct ili93414ws_lcd_s *)lcd; + +#ifdef CONFIG_STM32F429I_DISCO_ILI9341_SPIBITS16 + /* Set to 8-bit mode in disabled state, spi device is in disabled state. */ + + stm32_ili93414ws_set8bitmode(priv); +#endif + + lcdvdbg("param=%04x\n", param); + return stm32_ili93414ws_recvblock(priv, (uint16_t*)param, 1); +} + + +/**************************************************************************** + * Name: stm32_ili93414ws_recvgram + * + * Description: + * Receive pixel words from the lcd driver gram. + * + * Input Parameters: + * lcd - Reference to the public driver structure + * wd - Reference to where the pixel words receive + * nwords - number of pixel words to receive + * + * Returned Value: + * OK - On Success + * + ****************************************************************************/ + +static int stm32_ili93414ws_recvgram(FAR struct ili9341_lcd_s *lcd, + uint16_t *wd, uint32_t nwords) +{ + FAR struct ili93414ws_lcd_s *priv = (FAR struct ili93414ws_lcd_s *)lcd; + + lcdvdbg("wd=%p, nwords=%d\n", wd, nwords); + + /* Set to 16-bit mode in disabled state */ + + stm32_ili93414ws_set16bitmode(priv); + + return stm32_ili93414ws_recvblock(priv, wd, nwords); +}; + + +/**************************************************************************** + * Name: stm32_ili93414ws_initialize + * + * Description: + * Initialize the device structure to control the LCD Single chip driver. + * + * Input Parameters: + * + * Returned Value: + * On success, this function returns a reference to the LCD control object + * for the specified ILI9341 LCD Single chip driver connected as 4 wire serial + * (spi). NULL is returned on any failure. + * + ****************************************************************************/ + +#ifdef ILI93414WS_SPI +FAR struct ili9341_lcd_s *stm32_ili93414ws_initialize(void) +{ + FAR struct spi_dev_s *spi; + FAR struct ili93414ws_lcd_s *priv = &g_lcddev; + + lcddbg("initialize ili9341 4-wire serial subdriver\n"); + + lcdvdbg("initialize spi device: %d\n", ILI93414WS_SPI_DEVICE); + spi = stm32_spi5initialize(); + + if (spi) + { + /* Initialize structure */ + + priv->dev.select = stm32_ili93414ws_select; + priv->dev.deselect = stm32_ili93414ws_deselect; + priv->dev.sendcmd = stm32_ili93414ws_sendcmd; + priv->dev.sendparam = stm32_ili93414ws_sendparam; + priv->dev.recvparam = stm32_ili93414ws_recvparam; + priv->dev.sendgram = stm32_ili93414ws_sendgram; + priv->dev.recvgram = stm32_ili93414ws_recvgram; + priv->dev.backlight = stm32_ili93414ws_backlight; + priv->spi = spi; + + return &priv->dev; + } + + return NULL; +} + +#else + +FAR struct ili9341_lcd_s *stm32_ili93414ws_initialize(void) +{ + uint32_t regval; + FAR struct ili93414ws_lcd_s *priv = &g_lcddev; + + lcddbg("initialize ili9341 4-wire serial subdriver\n"); + + /* Enable spi bus */ + + regval= getreg32(STM32_RCC_APB2ENR); + regval |= RCC_APB2ENR_SPI5EN; + putreg32(regval, STM32_RCC_APB2ENR); + + /* Configure gpios */ + + (void)stm32_configgpio(GPIO_CS_LCD); /* LCD chip select */ + (void)stm32_configgpio(GPIO_LCD_DC); /* LCD Data/Command select */ + (void)stm32_configgpio(GPIO_LCD_ENABLE); /* LCD enable select */ + (void)stm32_configgpio(GPIO_SPI5_SCK); /* SPI clock */ + (void)stm32_configgpio(GPIO_SPI5_MOSI); /* SPI MOSI */ + + /* Initialize structure */ + + priv->dev.select = stm32_ili93414ws_select; + priv->dev.deselect = stm32_ili93414ws_deselect; + priv->dev.sendcmd = stm32_ili93414ws_sendcmd; + priv->dev.sendparam = stm32_ili93414ws_sendparam; + priv->dev.recvparam = stm32_ili93414ws_recvparam; + priv->dev.sendgram = stm32_ili93414ws_sendgram; + priv->dev.recvgram = stm32_ili93414ws_recvgram; + priv->dev.backlight = stm32_ili93414ws_backlight; + + + /* Configure to bidirectional transfer mode */ + + lcdvdbg("Configure spi device %d to bidirectional transfer mode\n", + ILI93414WS_SPI_DEVICE); + + stm32_ili93414ws_spiconfig(&priv->dev); + + return &priv->dev; +} +#endif diff --git a/configs/stm32f429i-disco/src/stm32_lcd.c b/configs/stm32f429i-disco/src/stm32_lcd.c new file mode 100644 index 0000000000000000000000000000000000000000..884ce0e31b1efe3bb91d4c8c9ae135cdad1503d5 --- /dev/null +++ b/configs/stm32f429i-disco/src/stm32_lcd.c @@ -0,0 +1,600 @@ +/************************************************************************************ + * configs/stm32f429i-disco/src/stm32_lcd.c + * + * Copyright (C) 2014-2015 Marco Krahl. All rights reserved. + * Author: Marco Krahl + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "stm32f429i-disco.h" +#include "stm32_ltdc.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +#ifdef CONFIG_STM32F429I_DISCO_ILI9341_LCDDEVICE +# define ILI9341_LCD_DEVICE CONFIG_STM32F429I_DISCO_ILI9341_LCDDEVICE +#else +# define ILI9341_LCD_DEVICE 0 +#endif + +#ifdef CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE + +/* Display settings */ + +/* Pixel Format Set (COLMOD) + * + * Note! RGB interface settings (DPI) is unimportant for the MCU interface + * mode but set the register to the defined state equal to the MCU interface + * pixel format. + * + * 16 Bit MCU: 01100101 / h65 + * + * DPI: 6 (RGB18-666 RGB interface) + * DBI: 5 (RGB16-565 MCU interface, not used set to default) + */ + +#define STM32_ILI9341_PIXSET_PARAM (ILI9341_PIXEL_FORMAT_SET_DPI(6) | \ + ILI9341_PIXEL_FORMAT_SET_DBI(5)) + +/* DE Mode RCM = 2, Sync Mode RCM = 3 + * Interface Mode Controle + * + * EPL: 0 High enable for RGB interface + * DPL: 1 data fetched at the falling time + * HSPL: 0 Low level sync clock + * VSPL: 0 Low level sync clock + * RCM: 2 (DE Mode) + * ByPass_Mode: 1 (Memory) + */ + +#define STM32_ILI9341_IFMODE_PARAM ((!ILI9341_INTERFACE_CONTROL_EPL) | \ + ILI9341_INTERFACE_CONTROL_DPL | \ + (!ILI9341_INTERFACE_CONTROL_HSPL) | \ + (!ILI9341_INTERFACE_CONTROL_VSPL) | \ + ILI9341_INTERFACE_CONTROL_RCM(2) | \ + ILI9341_INTERFACE_CONTROL_BPASS) + +/* Interface control (IFCTL) + * + * Parameter 1: 0x0001 + * MY_EOR: 0 + * MX_EOR: 0 + * MV_EOR: 0 + * BGR_EOR: 0 + * WEMODE: 1 Reset column and page if data transfer exceeds + */ + +#define STM32_ILI9341_IFCTL_PARAM1 (ILI9341_INTERFACE_CONTROL_WEMODE | \ + !ILI9341_INTERFACE_CONTROL_BGREOR | \ + !ILI9341_INTERFACE_CONTROL_MVEOR | \ + !ILI9341_INTERFACE_CONTROL_MXEOR | \ + !ILI9341_INTERFACE_CONTROL_MYEOR) + +/* Parameter 2: 0x0000 + * + * EPF: 0 65k color format for RGB interface + * MDT: 0 Display data transfer mode + * + */ +#define STM32_ILI9341_IFCTL_PARAM2 (ILI9341_INTERFACE_CONTROL_MDT(0) | \ + ILI9341_INTERFACE_CONTROL_EPF(0)) + +/* Parameter 3: 0x0000/0x0020 + * + * ENDIAN: 0 Big endian + * DM: 1 RGB Interface Mode + * RM: 1 RGB interface + * RIM: 0 18-bit 1 transfer/pixel RGB interface mode + * + */ +#define STM32_ILI9341_IFCTL_PARAM3 ((!ILI9341_INTERFACE_CONTROL_RIM) | \ + ILI9341_INTERFACE_CONTROL_RM | \ + ILI9341_INTERFACE_CONTROL_DM(1) | \ + (!ILI9341_INTERFACE_CONTROL_ENDIAN)) + +/* Memory access control (MADCTL) */ + +/* + * Landscape: 00100000 / 00101000 / h28 + * + * MY: 0 + * MX: 0 + * MV: 1 + * ML: 0 + * BGR: 0/1 Depending on endian mode of the mcu? + * MH: 0 + */ + +#define ILI9341_MADCTL_LANDSCAPE_MY 0 +#define ILI9341_MADCTL_LANDSCAPE_MX 0 +#define ILI9341_MADCTL_LANDSCAPE_MV ILI9341_MEMORY_ACCESS_CONTROL_MV +#define ILI9341_MADCTL_LANDSCAPE_ML 0 +#ifdef CONFIG_BIG_ENDIAN +# define ILI9341_MADCTL_LANDSCAPE_BGR 0 +#else +# define ILI9341_MADCTL_LANDSCAPE_BGR ILI9341_MEMORY_ACCESS_CONTROL_BGR +#endif +#define ILI9341_MADCTL_LANDSCAPE_MH 0 + +#define ILI9341_MADCTL_LANDSCAPE_PARAM1 (ILI9341_MADCTL_LANDSCAPE_MY | \ + ILI9341_MADCTL_LANDSCAPE_MX | \ + ILI9341_MADCTL_LANDSCAPE_MV | \ + ILI9341_MADCTL_LANDSCAPE_ML | \ + ILI9341_MADCTL_LANDSCAPE_BGR | \ + ILI9341_MADCTL_LANDSCAPE_MH) + +/* + * Portrait: 00000000 / 00001000 / h08 + * + * MY: 0 + * MX: 0 + * MV: 0 + * ML: 0 + * BGR: 0/1 Depending on endian mode of the mcu? + * MH: 0 + */ + +#define ILI9341_MADCTL_PORTRAIT_MY 0 +#define ILI9341_MADCTL_PORTRAIT_MX ILI9341_MEMORY_ACCESS_CONTROL_MX +#define ILI9341_MADCTL_PORTRAIT_MV 0 +#define ILI9341_MADCTL_PORTRAIT_ML 0 +#ifdef CONFIG_BIG_ENDIAN +# define ILI9341_MADCTL_PORTRAIT_BGR 0 +#else +# define ILI9341_MADCTL_PORTRAIT_BGR ILI9341_MEMORY_ACCESS_CONTROL_BGR +#endif +#define ILI9341_MADCTL_PORTRAIT_MH 0 + +#define ILI9341_MADCTL_PORTRAIT_PARAM1 (ILI9341_MADCTL_PORTRAIT_MY | \ + ILI9341_MADCTL_PORTRAIT_MX | \ + ILI9341_MADCTL_PORTRAIT_MV | \ + ILI9341_MADCTL_PORTRAIT_ML | \ + ILI9341_MADCTL_PORTRAIT_BGR | \ + ILI9341_MADCTL_PORTRAIT_MH) + +/* + * RLandscape: 01100000 / 01101000 / h68 + * + * MY: 0 + * MX: 1 + * MV: 1 + * ML: 0 + * BGR: 0/1 Depending on endian mode of the mcu? + * MH: 0 + */ + +#define ILI9341_MADCTL_RLANDSCAPE_MY 0 +#define ILI9341_MADCTL_RLANDSCAPE_MX ILI9341_MEMORY_ACCESS_CONTROL_MX +#define ILI9341_MADCTL_RLANDSCAPE_MV ILI9341_MEMORY_ACCESS_CONTROL_MV +#define ILI9341_MADCTL_RLANDSCAPE_ML 0 +#ifdef CONFIG_BIG_ENDIAN +# define ILI9341_MADCTL_RLANDSCAPE_BGR 0 +#else +# define ILI9341_MADCTL_RLANDSCAPE_BGR ILI9341_MEMORY_ACCESS_CONTROL_BGR +#endif +#define ILI9341_MADCTL_RLANDSCAPE_MH 0 + +#define ILI9341_MADCTL_RLANDSCAPE_PARAM1 \ + (ILI9341_MADCTL_RLANDSCAPE_MY | \ + ILI9341_MADCTL_RLANDSCAPE_MX | \ + ILI9341_MADCTL_RLANDSCAPE_MV | \ + ILI9341_MADCTL_RLANDSCAPE_ML | \ + ILI9341_MADCTL_RLANDSCAPE_BGR | \ + ILI9341_MADCTL_RLANDSCAPE_MH) + +/* + * RPortrait: 11000000 / 11001000 / hc8 + * + * MY: 1 + * MX: 1 + * MV: 0 + * ML: 0 + * BGR: 0/1 Depending on endian mode of the mcu? + * MH: 0 + * + */ + +#define ILI9341_MADCTL_RPORTRAIT_MY ILI9341_MEMORY_ACCESS_CONTROL_MY +#define ILI9341_MADCTL_RPORTRAIT_MX 0 +#define ILI9341_MADCTL_RPORTRAIT_MV 0 +#define ILI9341_MADCTL_RPORTRAIT_ML 0 +#ifdef CONFIG_BIG_ENDIAN +# define ILI9341_MADCTL_RPORTRAIT_BGR 0 +#else +# define ILI9341_MADCTL_RPORTRAIT_BGR ILI9341_MEMORY_ACCESS_CONTROL_BGR +#endif +#define ILI9341_MADCTL_RPORTRAIT_MH 0 + +#define ILI9341_MADCTL_RPORTRAIT_PARAM1 (ILI9341_MADCTL_RPORTRAIT_MY | \ + ILI9341_MADCTL_RPORTRAIT_MX | \ + ILI9341_MADCTL_RPORTRAIT_MV | \ + ILI9341_MADCTL_RPORTRAIT_ML | \ + ILI9341_MADCTL_RPORTRAIT_BGR | \ + ILI9341_MADCTL_RPORTRAIT_MH) + + +/* Set the display orientation */ + +#if defined(CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE_LANDSCAPE) +# define STM32_ILI9341_MADCTL_PARAM ILI9341_MADCTL_LANDSCAPE_PARAM1 +# warning "ILI9341 doesn't support full landscape with RGB interface" +#elif defined(CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE_PORTRAIT) +# define STM32_ILI9341_MADCTL_PARAM ILI9341_MADCTL_PORTRAIT_PARAM1 +#elif defined(CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE_RLANDSCAPE) +# define STM32_ILI9341_MADCTL_PARAM ILI9341_MADCTL_RLANDSCAPE_PARAM1 +# warning "ILI9341 doesn't support full landscape with RGB interface" +#elif defined(CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE_RPORTRAIT) +# define STM32_ILI9341_MADCTL_PARAM ILI9341_MADCTL_RPORTRAIT_PARAM1 +#else +# error "display orientation not defined" +#endif + +#define ILI9341_XRES BOARD_LTDC_WIDTH +#define ILI9341_YRES BOARD_LTDC_HEIGHT +#endif /* CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE */ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_STM32F429I_DISCO_ILI9341_LCDIFACE +FAR struct lcd_dev_s *g_lcd = NULL; +#endif + +#ifdef CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE +FAR struct ili9341_lcd_s *g_ltdc = NULL; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +#ifdef CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE +/************************************************************************************ + * Name: stm32_ili9341_initialize + * + * Description: + * Initialize the ili9341 LCD controller to the RGB interface mode. + * + ************************************************************************************/ + +static int stm32_ili9341_initialize(void) +{ + FAR struct ili9341_lcd_s *lcd = g_ltdc; + + lcd = stm32_ili93414ws_initialize(); + + if (lcd == NULL) + { + return ENODEV; + } + + /* Select spi device */ + + dbg("Initialize ili9341 lcd driver\n"); + lcd->select(lcd); + +#ifdef CONFIG_DEBUG_LCD + /* Read display identification */ + + lcd->sendcmd(lcd, ILI9341_READ_ID1); + lcd->recvparam(lcd, ¶m); + dbg("ili9341 LCD driver: LCD modules manufacturer ID: %d\n", param); + lcd->sendcmd(lcd, ILI9341_READ_ID2); + lcd->recvparam(lcd, ¶m); + dbg("ili9341 LCD driver: LCD modules driver version ID: %d\n", param); + lcd->sendcmd(lcd, ILI9341_READ_ID3); + lcd->recvparam(lcd, ¶m); + dbg("ili9341 LCD driver: LCD modules driver ID: %d\n", param); +#endif + + /* Reset the lcd display to the default state */ + + vdbg("ili9341 LCD driver: Software Reset\n"); + lcd->sendcmd(lcd, ILI9341_SOFTWARE_RESET); + up_mdelay(5); + + vdbg("ili9341 LCD driver: set Memory Access Control %08x\n", + STM32_ILI9341_MADCTL_PARAM); + lcd->sendcmd(lcd, ILI9341_MEMORY_ACCESS_CONTROL); + lcd->sendparam(lcd, STM32_ILI9341_MADCTL_PARAM); + + /* Pixel Format */ + + vdbg("ili9341 LCD driver: Set Pixel Format: %02x\n", + STM32_ILI9341_PIXSET_PARAM); + lcd->sendcmd(lcd, ILI9341_PIXEL_FORMAT_SET); + lcd->sendparam(lcd, STM32_ILI9341_PIXSET_PARAM); + + /* Select column */ + + vdbg("ili9341 LCD driver: Set Column Address\n"); + lcd->sendcmd(lcd, ILI9341_COLUMN_ADDRESS_SET); + lcd->sendparam(lcd, 0); + lcd->sendparam(lcd, 0); + lcd->sendparam(lcd, (ILI9341_XRES >> 8)); + lcd->sendparam(lcd, (ILI9341_XRES & 0xff)); + + /* Select page */ + + vdbg("ili9341 LCD driver: Set Page Address\n"); + lcd->sendcmd(lcd, ILI9341_PAGE_ADDRESS_SET); + lcd->sendparam(lcd, 0); + lcd->sendparam(lcd, 0); + lcd->sendparam(lcd, (ILI9341_YRES >> 8)); + lcd->sendparam(lcd, (ILI9341_YRES & 0xff)); + + /* RGB Interface signal control */ + + vdbg("ili9341 LCD driver: Set RGB Interface signal control: %02x\n", + STM32_ILI9341_IFMODE_PARAM); + lcd->sendcmd(lcd, ILI9341_RGB_SIGNAL_CONTROL); + lcd->sendparam(lcd, STM32_ILI9341_IFMODE_PARAM); + + /* Interface control */ + + vdbg("ili9341 LCD driver: Set Interface control: %d:%d:%d\n", + STM32_ILI9341_IFCTL_PARAM1, + STM32_ILI9341_IFCTL_PARAM2, + STM32_ILI9341_IFCTL_PARAM3); + + lcd->sendcmd(lcd, ILI9341_INTERFACE_CONTROL); + lcd->sendparam(lcd, STM32_ILI9341_IFCTL_PARAM1); + lcd->sendparam(lcd, STM32_ILI9341_IFCTL_PARAM2); + lcd->sendparam(lcd, STM32_ILI9341_IFCTL_PARAM3); + + /* Sleep out set to the end */ + + vdbg("ili9341 LCD driver: Sleep Out\n"); + lcd->sendcmd(lcd, ILI9341_SLEEP_OUT); + up_mdelay(5); /* 120? */ + + /* Display on */ + + vdbg("ili9341 LCD driver: Display On\n"); + lcd->sendcmd(lcd, ILI9341_DISPLAY_ON); + + /* Deselect spi device */ + + lcd->deselect(lcd); + + return OK; +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#ifdef CONFIG_STM32F429I_DISCO_ILI9341_LCDIFACE +/************************************************************************************ + * Name: board_lcd_uninitialize + * + * Description: + * Unitialize the LCD Device. + * + * Parameter: + * + * Return: + * + ************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* Set display off */ + + g_lcd->setpower(g_lcd, 0); + + g_lcd = NULL; +} + + +/************************************************************************************ + * Name: board_lcd_getdev + * + * Description: + * Return a reference to the LCD object for the specified LCD Device. + * This allows support for multiple LCD devices. + * + * Parameter: + * lcddev - Number of the LDC Device. + * + * Return: + * Reference to the LCD object if exist otherwise NULL + * + ************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + if (lcddev == ILI9341_LCD_DEVICE) + { + return g_lcd; + } + + return NULL; +} + + +/************************************************************************************ + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is + * fully initialized, display memory cleared, and the LCD ready to use, but + * with the power setting at 0 (full off). + * + * Parameter: + * + * Return: + * On success - Ok + * On error - Error Code + * + ************************************************************************************/ + +int board_lcd_initialize(void) +{ + /* check if always initialized */ + + if (!g_lcd) + { + /* Initialize the sub driver structure */ + + FAR struct ili9341_lcd_s *dev = stm32_ili93414ws_initialize(); + + /* Initialize public lcd driver structure */ + + if (dev) + { + /* + * Get a reference to valid lcd driver structure to avoid repeated + * initialization of the LCD Device. Also enables uninitializing of + * the LCD Device. + */ + + g_lcd = ili9341_initialize(dev, ILI9341_LCD_DEVICE); + if (g_lcd) + { + return OK; + } + } + + return -errno; + } + + return OK; +} +#endif /* CONFIG_STM32F429I_DISCO_ILI9341_LCDIFACE */ + +#ifdef CONFIG_STM32_LTDC +/************************************************************************************ + * Name: up_fbinitialize + * + * Description: + * The generic method to initialize the framebuffer device + * + * Return: + * OK - On succes + * + ************************************************************************************/ + +int up_fbinitialize(void) +{ +#ifdef CONFIG_STM32F429I_DISCO_ILI9341_FBIFACE + int ret; + + /* Initialize the ili9341 LCD controller */ + + ret = stm32_ili9341_initialize(); + + if (ret == OK) + { + ret = stm32_ltdcinitialize(); + } + + return ret; + +#else + /* Custom LCD display with RGB interface */ + + return stm32_ltdcinitialize(); +#endif +} + +/************************************************************************************ + * Name: up_fbgetvplane + * + * Description: + * The generic method to get the videoplane. + * + * Paramater: + * vplane - Number othe video plane + * + * Return: + * Reference to the fb_vtable_s on success otherwise NULL. + * + ************************************************************************************/ + +FAR struct fb_vtable_s *up_fbgetvplane(int vplane) +{ + return stm32_ltdcgetvplane(vplane); +} + +/************************************************************************************ + * Name: up_uninitialize + * + * Description: + * The generic method to uninitialize the framebuffer device + * + ************************************************************************************/ + +void fb_uninitialize(void) +{ + stm32_ltdcuninitialize(); +} + +/************************************************************************************ + * Name: up_ltdcgetlayer + * + * Description: + * The application function name to get a reference to the hardware layer of + * the ltdc device. + * + * Parameter: + * lid - The specific layer identifier + * + ************************************************************************************/ + +#ifdef CONFIG_STM32_LTDC_INTERFACE +FAR struct ltdc_layer_s *up_ltdcgetlayer(int lid) +{ + return stm32_ltdcgetlayer(lid); +} +#endif + +#endif /* CONFIG_STM32_LTDC */ diff --git a/configs/stm32f429i-disco/src/stm32_ostest.c b/configs/stm32f429i-disco/src/stm32_ostest.c new file mode 100644 index 0000000000000000000000000000000000000000..3237cb93932f52ce857657ba577030a430ec71fb --- /dev/null +++ b/configs/stm32f429i-disco/src/stm32_ostest.c @@ -0,0 +1,113 @@ +/************************************************************************************ + * configs/stm32f429i-disco/src/stm32_ostest.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "stm32f429i-disco.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#undef HAVE_FPU +#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_EXAMPLES_OSTEST_FPUTESTDISABLE) && \ + defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && defined(CONFIG_SCHED_WAITPID) && \ + !defined(CONFIG_DISABLE_SIGNALS) +# define HAVE_FPU 1 +#endif + +#ifdef HAVE_FPU + +#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*SW_FPU_REGS) +# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size" +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static uint32_t g_saveregs[XCPTCONTEXT_REGS]; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ +/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return + * the current FPU registers. + */ + +void arch_getfpu(FAR uint32_t *fpusave) +{ + irqstate_t flags; + + /* Take a snapshot of the thread context right now */ + + flags = enter_critical_section(); + up_saveusercontext(g_saveregs); + + /* Return only the floating register values */ + + memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS)); + leave_critical_section(flags); +} + +/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function + * will compare them and return true if they are identical. + */ + +bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2) +{ + return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0; +} + +#endif /* HAVE_FPU */ diff --git a/configs/stm32f429i-disco/src/stm32_spi.c b/configs/stm32f429i-disco/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..5021da510898fc1046f674e36308cff17836210f --- /dev/null +++ b/configs/stm32f429i-disco/src/stm32_spi.c @@ -0,0 +1,326 @@ +/************************************************************************************ + * configs/stm32f429i-disco/src/stm32_spi.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Marco Krahl + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "stm32f429i-disco.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) ||\ + defined(CONFIG_STM32_SPI4) || defined(CONFIG_STM32_SPI5) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_STM32_SPI5 +FAR struct spi_dev_s *g_spidev5 = NULL; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32f429i-disco board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ +#ifdef CONFIG_STM32_SPI5 + (void)stm32_configgpio(GPIO_CS_MEMS); /* MEMS chip select */ + (void)stm32_configgpio(GPIO_CS_LCD); /* LCD chip select */ + (void)stm32_configgpio(GPIO_LCD_DC); /* LCD Data/Command select */ + (void)stm32_configgpio(GPIO_LCD_ENABLE); /* LCD enable select */ +#endif +#if defined(CONFIG_STM32_SPI4) && defined(CONFIG_MTD_SST25XX) + (void)stm32_configgpio(GPIO_CS_SST25); /* SST25 FLASH chip select */ +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3/4/5select and stm32_spi1/2/3/4/5status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI4 +void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ +#if defined(CONFIG_MTD_SST25XX) + if (devid == SPIDEV_FLASH) + { + stm32_gpiowrite(GPIO_CS_SST25, !selected); + } +#endif +} + +uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI5 +void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +#if defined(CONFIG_STM32F429I_DISCO_ILI9341) + if (devid == SPIDEV_DISPLAY) + { + stm32_gpiowrite(GPIO_CS_LCD, !selected); + } + else +#endif + + { + stm32_gpiowrite(GPIO_CS_MEMS, !selected); + } +} + +uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI4 +int stm32_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI5 +int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#if defined(CONFIG_STM32F429I_DISCO_ILI9341) + if (devid == SPIDEV_DISPLAY) + { + /* This is the Data/Command control pad which determines whether the + * data bits are data or a command. + */ + + (void)stm32_gpiowrite(GPIO_LCD_DC, !cmd); + + return OK; + } +#endif + + return -ENODEV; +} +#endif + +#endif /* CONFIG_SPI_CMDDATA */ + +/**************************************************************************** + * Name: stm32_spi5initialize + * + * Description: + * Initialize the selected SPI port. + * As long as the method stm32_spibus_initialize recognized the initialized state of + * the spi device by the spi enable flag of the cr1 register, it isn't safe to + * disable the spi device outside of the nuttx spi interface structure. But + * this has to be done as long as the nuttx spi interface doesn't support + * bidirectional data transfer for multiple devices share one spi bus. This + * wrapper does nothing else than store the initialized state of the spi + * device after the first initializing and should be used by each driver who + * shares the spi5 bus. + * + * Input Parameter: + * + * Returned Value: + * Valid SPI device structure reference on success; a NULL on failure + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI5 +FAR struct spi_dev_s *stm32_spi5initialize(void) +{ + if (!g_spidev5) + { + g_spidev5 = stm32_spibus_initialize(5); + } + + return g_spidev5; +} +#endif +#endif /* CONFIG_STM32_SPI1 || ... CONFIG_STM32_SPI5 */ diff --git a/configs/stm32f429i-disco/src/stm32_usb.c b/configs/stm32f429i-disco/src/stm32_usb.c new file mode 100644 index 0000000000000000000000000000000000000000..291c025730d54a89c4a5f0fbb284429bea1117bb --- /dev/null +++ b/configs/stm32f429i-disco/src/stm32_usb.c @@ -0,0 +1,313 @@ +/************************************************************************************ + * configs/stm32f429i-disco/src/stm32_usbdev.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm32_otghs.h" +#include "stm32f429i-disco.h" + +#ifdef CONFIG_STM32_OTGHS + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST) +# define HAVE_USB 1 +#else +# warning "CONFIG_STM32_OTGHS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST" +# undef HAVE_USB +#endif + +#ifndef CONFIG_STM32F429IDISCO_USBHOST_PRIO +# define CONFIG_STM32F429IDISCO_USBHOST_PRIO 100 +#endif + +#ifndef CONFIG_STM32F429IDISCO_USBHOST_STACKSIZE +# define CONFIG_STM32F429IDISCO_USBHOST_STACKSIZE 1024 +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static struct usbhost_connection_s *g_usbconn; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: usbhost_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static int usbhost_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + uvdbg("Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + uvdbg("%s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the STM32F4Discovery board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + /* The OTG HS has an internal soft pull-up. No GPIO configuration is required */ + + /* Configure the OTG HS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */ + +#ifdef CONFIG_STM32_OTGHS + stm32_configgpio(GPIO_OTGHS_VBUS); + stm32_configgpio(GPIO_OTGHS_PWRON); + stm32_configgpio(GPIO_OTGHS_OVER); +#endif +} + +/*********************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +int stm32_usbhost_initialize(void) +{ + int pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + uvdbg("Register class drivers\n"); + +#ifdef CONFIG_USBHOST_HUB + /* Initialize USB hub class support */ + + ret = usbhost_hub_initialize(); + if (ret < 0) + { + udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB mass storage class class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + + /* Then get an instance of the USB host interface */ + + uvdbg("Initialize USB host\n"); + g_usbconn = stm32_otghshost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + uvdbg("Start usbhost_waiter\n"); + + pid = task_create("usbhost", CONFIG_STM32F429IDISCO_USBHOST_PRIO, + CONFIG_STM32F429IDISCO_USBHOST_STACKSIZE, + (main_t)usbhost_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + + return -ENODEV; +} +#endif + +/*********************************************************************************** + * Name: stm32_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be provided be + * each platform that implements the STM32 OTG HS host interface + * + * "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump + * or, if 5 V are available on the application board, a basic power switch, must + * be added externally to drive the 5 V VBUS line. The external charge pump can + * be driven by any GPIO output. When the application decides to power on VBUS + * using the chosen GPIO, it must also set the port power bit in the host port + * control and status register (PPWR bit in OTG_HS_HPRT). + * + * "The application uses this field to control power to this port, and the core + * clears this bit on an overcurrent condition." + * + * Input Parameters: + * iface - For future growth to handle multiple USB host interface. Should be zero. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +void stm32_usbhost_vbusdrive(int iface, bool enable) +{ + DEBUGASSERT(iface == 0); + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ + + stm32_gpiowrite(GPIO_OTGHS_PWRON, false); + } + else + { + /* Disable the Power Switch by driving the enable pin high */ + + stm32_gpiowrite(GPIO_OTGHS_PWRON, true); + } +} +#endif + +/************************************************************************************ + * Name: stm32_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent condition is + * detected. + * + * Input Parameters: + * handler - New overcurrent interrupt handler + * + * Returned Value: + * Old overcurrent interrupt handler + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +xcpt_t stm32_setup_overcurrent(xcpt_t handler) +{ + return stm32_gpiosetevent(GPIO_OTGHS_OVER, true, true, true, handler); +} +#endif + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} +#endif + +#endif /* CONFIG_STM32_OTGHS */ diff --git a/configs/stm32f429i-disco/src/stm32_userleds.c b/configs/stm32f429i-disco/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..682ccfd5f979450d55076310fc72c33c2701198b --- /dev/null +++ b/configs/stm32f429i-disco/src/stm32_userleds.c @@ -0,0 +1,245 @@ +/**************************************************************************** + * configs/stm32f429i-disco/src/stm32_userleds.c + * + * Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "stm32f429i-disco.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* This array maps an LED number to GPIO pin configuration */ + +static uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED1, GPIO_LED2 +}; + +/**************************************************************************** + * Private Function Protototypes + ****************************************************************************/ + +/* LED Power Management */ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_PM +static struct pm_callback_s g_ledscb = +{ + .notify = led_pm_notify, + .prepare = led_pm_prepare, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + switch (pmstate) + { + case(PM_NORMAL): + { + /* Restore normal LEDs operation */ + + } + break; + + case(PM_IDLE): + { + /* Entering IDLE mode - Turn leds off */ + + } + break; + + case(PM_STANDBY): + { + /* Entering STANDBY mode - Logic for PM_STANDBY goes here */ + + } + break; + + case(PM_SLEEP): + { + /* Entering SLEEP mode - Logic for PM_SLEEP goes here */ + + } + break; + + default: + { + /* Should not get here */ + + } + break; + } +} +#endif + +/**************************************************************************** + * Name: led_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* No preparation to change power modes is required by the LEDs driver. + * We always accept the state change by returning OK. + */ + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + stm32_gpiowrite(g_ledcfg[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0); + stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0); +} + +/**************************************************************************** + * Name: stm32_ledpminitialize + ****************************************************************************/ + +#ifdef CONFIG_PM +void stm32_ledpminitialize(void) +{ + /* Register to receive power management callbacks */ + + int ret = pm_register(&g_ledscb); + if (ret != OK) + { + board_autoled_on(LED_ASSERTION); + } +} +#endif /* CONFIG_PM */ + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/stm32f429i-disco/src/stm32f429i-disco.h b/configs/stm32f429i-disco/src/stm32f429i-disco.h new file mode 100644 index 0000000000000000000000000000000000000000..789929facd7c14ae14e7c175874d925b5076763a --- /dev/null +++ b/configs/stm32f429i-disco/src/stm32f429i-disco.h @@ -0,0 +1,270 @@ +/**************************************************************************************************** + * configs/stm32f429i-disco/src/stm32f429i-disco.h + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Marco Krahl + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __CONFIGS_STM32F429I_DISCO_SRC_STM32F429I_DISCO__H +#define __CONFIGS_STM32F429I_DISCO_SRC_STM32F429I_DISCO__H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include +#include + +#ifdef CONFIG_STM32F429I_DISCO_ILI9341 +#include +#endif + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ +/* Configuration ************************************************************************************/ +/* How many SPI modules does this chip support? */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 3 +# undef CONFIG_STM32_SPI3 +#endif + +/* STM32F429 Discovery GPIOs **************************************************************************/ +/* LEDs */ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTG|GPIO_PIN13) +#define GPIO_LED2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTG|GPIO_PIN14) + +/* BUTTONS -- NOTE that all have EXTI interrupts configured */ + +#define MIN_IRQBUTTON BUTTON_USER +#define MAX_IRQBUTTON BUTTON_USER +#define NUM_IRQBUTTONS 1 + +#define GPIO_BTN_USER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0) + +/* PWM + * + * The STM32F429 Discovery has no real on-board PWM devices, but the board can be + * configured to output a pulse train using TIM4 CH2 on PD13. + */ + +#define STM32F429I_DISCO_PWMTIMER 4 +#define STM32F429I_DISCO_PWMCHANNEL 2 + +/* SPI chip selects */ + +#define GPIO_CS_MEMS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN1) +#define GPIO_CS_LCD (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN2) +#define GPIO_LCD_DC (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN13) +#define GPIO_LCD_ENABLE (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN10) +#define GPIO_CS_SST25 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN4) + +/* USB OTG HS + * + * PA9 OTG_HS_VBUS VBUS sensing (also connected to the green LED) + * PC0 OTG_HS_PowerSwitchOn + * PD5 OTG_HS_Overcurrent + */ + +#define GPIO_OTGHS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN13) +#define GPIO_OTGHS_PWRON (GPIO_OUTPUT|GPIO_OUTPUT_SET|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN4) + +#ifdef CONFIG_USBHOST +# define GPIO_OTGHS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN5) + +#else +# define GPIO_OTGHS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN5) +#endif + +/**************************************************************************************************** + * Public Types + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +/**************************************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32f429i-disco board. + * + ****************************************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +/**************************************************************************************************** + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the STM32F429Discovery board. + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_OTGHS +void weak_function stm32_usbinitialize(void); +#endif + +/**************************************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. This function will + * start a thread that will monitor for device connection/disconnection events. + * + ****************************************************************************************************/ + +#if defined(CONFIG_STM32_OTGHS) && defined(CONFIG_USBHOST) +int stm32_usbhost_initialize(void); +#endif + +/**************************************************************************************************** + * Name: stm32_enablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_enablefsmc(void); +#endif + +/**************************************************************************************************** + * Name: stm32_disablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ****************************************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_disablefsmc(void); +#endif + +/**************************************************************************************************** + * Name: stm32_ledpminitialize + * + * Description: + * Enable logic to use the LEDs on the STM32F429Discovery to support power management testing + * + ****************************************************************************************************/ + +#ifdef CONFIG_PM +void stm32_ledpminitialize(void); +#endif + +/**************************************************************************************************** + * Name: stm32_pmbuttons + * + * Description: + * Configure the user button of the STM32F429I-DISCO board as EXTI, + * so it is able to wakeup the MCU from the PM_STANDBY mode + * + ****************************************************************************************************/ + +#if defined(CONFIG_PM) && defined(CONFIG_ARCH_IDLE_CUSTOM) && defined(CONFIG_PM_BUTTONS) +void stm32_pmbuttons(void); +#endif + +#ifdef CONFIG_STM32F429I_DISCO_ILI9341 +/**************************************************************************** + * Name: stm32_ili93414ws_initialize + * + * Description: + * Initialize the device structure to control the LCD Single chip driver. + * + * Input Parameters: + * + * Returned Value: + * On success, this function returns a reference to the LCD control object + * for the specified ILI9341 LCD Single chip driver connected as 4 wire serial + * (spi). NULL is returned on any failure. + * + ****************************************************************************/ + +FAR struct ili9341_lcd_s *stm32_ili93414ws_initialize(void); +#endif + +#ifdef CONFIG_STM32_SPI5 +/**************************************************************************** + * Name: stm32_spi5initialize + * + * Description: + * Initialize the selected SPI port. + * As long as the method stm32_spibus_initialize() recognized the + * initialized state of the spi device by the spi enable flag of the cr1 + * register, it isn't safe to disable the spi device outside of the nuttx + * spi interface structure. But this has to be done as long as the nuttx + * spi interface doesn't support bidirectional data transfer for multiple + * devices share one spi bus. This wrapper does nothing else than store the + * initialized state of the spi device after the first initializing and + * should be used by each driver who shares the spi5 bus. + * + * Input Parameter: + * None + * + * Returned Value: + * Valid SPI device structure reference on succcess; a NULL on failure + * + ****************************************************************************/ + +FAR struct spi_dev_s *stm32_spi5initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_STM32F429I_DISCO_SRC_STM32F429I_DISCO_H */ + diff --git a/configs/stm32f429i-disco/usbmsc/Make.defs b/configs/stm32f429i-disco/usbmsc/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c8cd4116d694a4115ce7cb32a1015d2111c27460 --- /dev/null +++ b/configs/stm32f429i-disco/usbmsc/Make.defs @@ -0,0 +1,112 @@ +############################################################################ +# configs/stm32f429i-disco/usbnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f429i-disco/usbmsc/defconfig b/configs/stm32f429i-disco/usbmsc/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..a750b9bd063d1e2e82c442b221204f59f21a4b06 --- /dev/null +++ b/configs/stm32f429i-disco/usbmsc/defconfig @@ -0,0 +1,1185 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USBHOST_BULK_DISABLE is not set +# CONFIG_USBHOST_INT_DISABLE is not set +# CONFIG_USBHOST_ISOC_DISABLE is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +CONFIG_ARCH_CHIP_STM32F429Z=y +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +CONFIG_STM32_STM32F429=y +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +CONFIG_STM32_HAVE_LTDC=y +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +CONFIG_STM32_HAVE_UART7=y +CONFIG_STM32_HAVE_UART8=y +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +CONFIG_STM32_HAVE_SPI4=y +CONFIG_STM32_HAVE_SPI5=y +CONFIG_STM32_HAVE_SPI6=y +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_LTDC is not set +# CONFIG_STM32_DMA2D is not set +# CONFIG_STM32_OTGFS is not set +CONFIG_STM32_OTGHS=y +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_SPI4 is not set +# CONFIG_STM32_SPI5 is not set +# CONFIG_STM32_SPI6 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_UART7 is not set +# CONFIG_STM32_UART8 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +CONFIG_STM32_FSMC_SRAM=y +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# +CONFIG_STM32_OTGHS_RXFIFO_SIZE=128 +CONFIG_STM32_OTGHS_NPTXFIFO_SIZE=96 +CONFIG_STM32_OTGHS_PTXFIFO_SIZE=128 +CONFIG_STM32_OTGHS_DESCSIZE=128 +# CONFIG_STM32_OTGHS_SOFINTR is not set + +# +# USB Host Debug Configuration +# +# CONFIG_STM32_USBHOST_REGDEBUG is not set +# CONFIG_STM32_USBHOST_PKTDUMP is not set + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F429I_DISCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f429i-disco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_STM32F429I_DISCO_FLASH is not set +# CONFIG_STM32F429I_DISCO_RAMMTD is not set +CONFIG_STM32F429IDISCO_USBHOST_STACKSIZE=1024 +CONFIG_STM32F429IDISCO_USBHOST_PRIO=100 +# CONFIG_STM32F429I_DISCO_ILI9341 is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +CONFIG_USBHOST=y +CONFIG_USBHOST_NPREALLOC=4 +CONFIG_USBHOST_HAVE_ASYNCH=y +# CONFIG_USBHOST_ASYNCH is not set +# CONFIG_USBHOST_HUB is not set +CONFIG_USBHOST_MSC=y +# CONFIG_USBHOST_CDCACM is not set +# CONFIG_USBHOST_HIDKBD is not set +# CONFIG_USBHOST_HIDMOUSE is not set +# CONFIG_USBHOST_TRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=3 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0xD0000000 +CONFIG_HEAP2_SIZE=8388608 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f429i-disco/usbmsc/setenv.sh b/configs/stm32f429i-disco/usbmsc/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..7d116b560c0a4eb7cec4290c0a74727d6ea705ad --- /dev/null +++ b/configs/stm32f429i-disco/usbmsc/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/stm32f429i-disco/usbnsh/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f429i-disco/usbnsh/Make.defs b/configs/stm32f429i-disco/usbnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c8cd4116d694a4115ce7cb32a1015d2111c27460 --- /dev/null +++ b/configs/stm32f429i-disco/usbnsh/Make.defs @@ -0,0 +1,112 @@ +############################################################################ +# configs/stm32f429i-disco/usbnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f429i-disco/usbnsh/defconfig b/configs/stm32f429i-disco/usbnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..021da9ecf46dfd8fe64d9223c5a5ff5a93ab353a --- /dev/null +++ b/configs/stm32f429i-disco/usbnsh/defconfig @@ -0,0 +1,1203 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +CONFIG_ARCH_CHIP_STM32F429Z=y +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +CONFIG_STM32_STM32F429=y +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +CONFIG_STM32_HAVE_LTDC=y +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +CONFIG_STM32_HAVE_UART7=y +CONFIG_STM32_HAVE_UART8=y +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +CONFIG_STM32_HAVE_SPI4=y +CONFIG_STM32_HAVE_SPI5=y +CONFIG_STM32_HAVE_SPI6=y +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_LTDC is not set +# CONFIG_STM32_DMA2D is not set +# CONFIG_STM32_OTGFS is not set +CONFIG_STM32_OTGHS=y +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_SPI4 is not set +# CONFIG_STM32_SPI5 is not set +# CONFIG_STM32_SPI6 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_UART7 is not set +# CONFIG_STM32_UART8 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +CONFIG_STM32_FLASH_PREFETCH=y +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +CONFIG_STM32_FSMC_SRAM=y +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F429I_DISCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f429i-disco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_STM32F429I_DISCO_FLASH is not set +# CONFIG_STM32F429I_DISCO_RAMMTD is not set +# CONFIG_STM32F429I_DISCO_ILI9341 is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_DEV_LOOP=y + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +CONFIG_RAMDISK=y +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_USART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=3 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0xD0000000 +CONFIG_HEAP2_SIZE=8388608 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIBC_STRERROR=y +# CONFIG_LIBC_STRERROR_SHORT is not set +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 +# CONFIG_NSH_STRERROR is not set + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +CONFIG_SYSTEM_RAMTEST=y +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f429i-disco/usbnsh/setenv.sh b/configs/stm32f429i-disco/usbnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..7d116b560c0a4eb7cec4290c0a74727d6ea705ad --- /dev/null +++ b/configs/stm32f429i-disco/usbnsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/stm32f429i-disco/usbnsh/setenv.sh +# +# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f4discovery/Kconfig b/configs/stm32f4discovery/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..3c84095efce3569d7168682b35d1970db9720e6d --- /dev/null +++ b/configs/stm32f4discovery/Kconfig @@ -0,0 +1,78 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_STM32F4_DISCOVERY + +config STM32F4DISBB + bool "STM32F4DIS-BB base board" + default n + ---help--- + Select if you are using the STM32F4DIS-BB base board with the + STM32F4Discovery. + +config STM32F4DISCO_USBHOST_STACKSIZE + int "USB host waiter stack size" + default 1024 + depends on USBHOST + +config STM32F4DISCO_USBHOST_PRIO + int "USB host waiter task priority" + default 100 + depends on USBHOST + +config PM_BUTTONS + bool "PM button support" + default n + depends on PM && ARCH_IRQBUTTONS + ---help--- + Enable PM button EXTI interrupts to support PM testing + +config PM_BUTTON_ACTIVITY + int "Button PM activity weight" + default 10 + depends on PM_BUTTONS + ---help--- + The activity weight to report to the power management subsystem when + a button is pressed. + +config PM_ALARM_SEC + int "PM_STANDBY delay (seconds)" + default 15 + depends on PM && RTC_ALARM + ---help--- + Number of seconds to wait in PM_STANDBY before going to PM_STANDBY + mode. + +config PM_ALARM_NSEC + int "PM_STANDBY delay (nanoseconds)" + default 0 + depends on PM && RTC_ALARM + ---help--- + Number of additional nanoseconds to wait in PM_STANDBY before going + to PM_STANDBY mode. + +config PM_SLEEP_WAKEUP + bool "PM_SLEEP wake-up alarm" + default n + depends on PM && RTC_ALARM + ---help--- + Wake-up of PM_SLEEP mode after a delay and resume normal operation. + +config PM_SLEEP_WAKEUP_SEC + int "PM_SLEEP delay (seconds)" + default 10 + depends on PM && RTC_ALARM + ---help--- + Number of seconds to wait in PM_SLEEP before going to PM_STANDBY mode. + +config PM_SLEEP_WAKEUP_NSEC + int "PM_SLEEP delay (nanoseconds)" + default 0 + depends on PM && RTC_ALARM + ---help--- + Number of additional nanoseconds to wait in PM_SLEEP before going to + PM_STANDBY mode. + +endif diff --git a/configs/stm32f4discovery/README.txt b/configs/stm32f4discovery/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..a5ce946ad7619c828c6a1b03372cb80a0ea53480 --- /dev/null +++ b/configs/stm32f4discovery/README.txt @@ -0,0 +1,2066 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +STMicro STM32F4Discovery development board featuring the STM32F407VGT6 +MCU. The STM32F407VGT6 is a 168MHz Cortex-M4 operation with 1Mbit Flash +memory and 128kbytes. The board features: + + - On-board ST-LINK/V2 for programming and debugging, + - LIS302DL, ST MEMS motion sensor, 3-axis digital output accelerometer, + - MP45DT02, ST MEMS audio sensor, omni-directional digital microphone, + - CS43L22, audio DAC with integrated class D speaker driver, + - Four LEDs and two push-buttons, + - USB OTG FS with micro-AB connector, and + - Easy access to most MCU pins. + +Refer to http://www.st.com/internet/evalboard/product/252419.jsp for +further information about this board. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - LEDs + - RGB LED Driver + - PWM + - UARTs + - Timer Inputs/Outputs + - FPU + - STM32F4DIS-BB + - FSMC SRAM + - SSD1289 + - UG-2864AMBAG01 / UG-2864HSWEG01 + - STM32F4Discovery-specific Configuration Options + - BASIC + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, or + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the CodeSourcery toolchain for Windows. To use + the Atollic, devkitARM, Raisonance GNU, or NuttX buildroot toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh STM32F4Discovery/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toolchain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +==== + +The STM32F4Discovery board has four LEDs; green, orange, red and blue on the +board. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/up_leds.c. The LEDs are used to encode OS-related +events as follows: + + SYMBOL Meaning LED1* LED2 LED3 LED4 + green orange red blue + ------------------- ----------------------- ------- ------- ------- ------ + LED_STARTED NuttX has been started ON OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF + LED_IRQSENABLED Interrupts enabled ON ON OFF OFF + LED_STACKCREATED Idle stack created OFF OFF ON OFF + LED_INIRQ In an interrupt** ON N/C N/C OFF + LED_SIGNAL In a signal handler*** N/C ON N/C OFF + LED_ASSERTION An assertion failed ON ON N/C OFF + LED_PANIC The system has crashed N/C N/C N/C ON + LED_IDLE STM32 is is sleep mode (Optional, not used) + + * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot + and these LEDs will give you some indication of where the failure was + ** The normal state is LED3 ON and LED1 faintly glowing. This faint glow + is because of timer interrupts that result in the LED being illuminated + on a small proportion of the time. +*** LED2 may also flicker normally if signals are processed. + +RGB LED Driver +============== + +Alan Carvalho de Assis has used the STM32F4-Discovery to drive an RGB LED +using PWM output. The external RGB connected this way: + + R = TIM1 CH1 on PE9 + G = TIM2 CH2 on PA1 + B = TIM3 CH3 on PB0 + +The RGB LED driver that uses PWM to control the red, green, and blue color +components can be enabled with the following configuratin settings: + + +CONFIG_RGBLED=y + + +CONFIG_PWM + + +CONFIG_STM32_TIM1 + +CONFIG_STM32_TIM2 + +CONFIG_STM32_TIM3 + +CONFIG_STM32_TIM1_PWM=y + +CONFIG_STM32_TIM1_MODE=0 + +CONFIG_STM32_TIM1_CHANNEL=1 + +CONFIG_STM32_TIM1_CHMODE=0 + +CONFIG_STM32_TIM2_PWM=y + +CONFIG_STM32_TIM2_MODE=0 + +CONFIG_STM32_TIM2_CHANNEL=2 + +CONFIG_STM32_TIM2_CHMODE=0 + +CONFIG_STM32_TIM3_PWM=y + +CONFIG_STM32_TIM3_MODE=0 + +CONFIG_STM32_TIM3_CHANNEL=3 + +CONFIG_STM32_TIM3_CHMODE=0 + +PWM +=== + +The STM32F4Discovery has no real on-board PWM devices, but the board can be +configured to output a pulse train using TIM4 CH2 on PD3. This pin is +available next to the audio jack. + +UARTs +===== + +UART/USART PINS +--------------- + +USART1 + CK PA8 + CTS PA11* + RTS PA12* + RX PA10*, PB7 + TX PA9*, PB6* +USART2 + CK PA4*, PD7 + CTS PA0*, PD3 + RTS PA1, PD4* + RX PA3, PD6 + TX PA2, PD5* +USART3 + CK PB12, PC12*, PD10 + CTS PB13, PD11 + RTS PB14, PD12* + RX PB11, PC11, PD9 + TX PB10*, PC10*, PD8 +UART4 + RX PA1, PC11 + TX PA0*, PC10* +UART5 + RX PD2 + TX PC12* +USART6 + CK PC8, PG7** + CTS PG13**, PG15** + RTS PG12**, PG8** + RX PC7*, PG9** + TX PC6, PG14** + + * Indicates pins that have other on-board functions and should be used only + with care (See table 5 in the STM32F4Discovery User Guide). The rest are + free I/O pins. +** Port G pins are not supported by the MCU + +Default USART/UART Configuration +-------------------------------- + +USART2 is enabled in most configurations (see */defconfig). RX and TX are +configured on pins PA3 and PA2, respectively (see include/board.h). + +These pins selections, however, conflict with Ethernet pin usage on the +STM32F4DIS-BB base board. The STM32F4DIS-BB base board provides RS-232 +drivers and a DB9 connector for USART6. USART6 is the preferred serial +console for use with the STM32F4DIS-BB. + +Timer Inputs/Outputs +==================== + +TIM1 + CH1 PA8, PE9 + CH2 PA9*, PE11 + CH3 PA10*, PE13 + CH4 PA11*, PE14 +TIM2 + CH1 PA0*, PA15, PA5* + CH2 PA1, PB3* + CH3 PA2, PB10* + CH4 PA3, PB11 +TIM3 + CH1 PA6*, PB4, PC6 + CH2 PA7*, PB5, PC7* + CH3 PB0, PC8 + CH4 PB1, PC9 +TIM4 + CH1 PB6*, PD12* + CH2 PB7, PD13* + CH3 PB8, PD14* + CH4 PB9*, PD15* +TIM5 + CH1 PA0*, PH10** + CH2 PA1, PH11** + CH3 PA2, PH12** + CH4 PA3, PI0 +TIM8 + CH1 PC6, PI5 + CH2 PC7*, PI6 + CH3 PC8, PI7 + CH4 PC9, PI2 +TIM9 + CH1 PA2, PE5 + CH2 PA3, PE6 +TIM10 + CH1 PB8, PF6 +TIM11 + CH1 PB9*, PF7 +TIM12 + CH1 PH6**, PB14 + CH2 PC15, PH9** +TIM13 + CH1 PA6*, PF8 +TIM14 + CH1 PA7*, PF9 + + * Indicates pins that have other on-board functions and should be used only + with care (See table 5 in the STM32F4Discovery User Guide). The rest are + free I/O pins. +** Port H pins are not supported by the MCU + +Quadrature Encode Timer Inputs +------------------------------ + +If enabled (by setting CONFIG_QENCODER=y), then quadrature encoder will +use either TIM2 or TIM8 (see nsh/defconfig). If TIM2 is selected, the input +pins PA15 and PA1 for CH1 and CH2, respectively). If TIM8 is selected, then +PC6 and PI5 will be used for CH1 and CH2 (see include board.h for pin +definitions). + +FPU +=== + +FPU Configuration Options +------------------------- + +There are two version of the FPU support built into the STM32 port. + +1. Lazy Floating Point Register Save. + + This is an untested implementation that saves and restores FPU registers + only on context switches. This means: (1) floating point registers are + not stored on each context switch and, hence, possibly better interrupt + performance. But, (2) since floating point registers are not saved, + you cannot use floating point operations within interrupt handlers. + + This logic can be enabled by simply adding the following to your .config + file: + + CONFIG_ARCH_FPU=y + +2. Non-Lazy Floating Point Register Save + + Mike Smith has contributed an extensive re-write of the ARMv7-M exception + handling logic. This includes verified support for the FPU. These changes + have not yet been incorporated into the mainline and are still considered + experimental. These FPU logic can be enabled with: + + CONFIG_ARCH_FPU=y + CONFIG_ARMV7M_CMNVECTOR=y + + You will probably also changes to the ld.script in if this option is selected. + This should work: + + -ENTRY(_stext) + +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ + +EXTERN(_vectors) /* Force the vectors to be included in the output */ + +CFLAGS +------ + +Only recent GCC toolchains have built-in support for the Cortex-M4 FPU. You will see +the following lines in each Make.defs file: + + ifeq ($(CONFIG_ARCH_FPU),y) + ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard + else + ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + endif + +Configuration Changes +--------------------- + +Below are all of the configuration changes that I had to make to configs/stm3240g-eval/nsh2 +in order to successfully build NuttX using the Atollic toolchain WITH FPU support: + + -CONFIG_ARCH_FPU=n : Enable FPU support + +CONFIG_ARCH_FPU=y + + -CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : Disable the CodeSourcery toolchain + +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n + + -CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=n : Enable the Atollic toolchain + +CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : + + -CONFIG_INTELHEX_BINARY=y : Suppress generation FLASH download formats + +CONFIG_INTELHEX_BINARY=n : (Only necessary with the "Lite" version) + + -CONFIG_HAVE_CXX=y : Suppress generation of C++ code + +CONFIG_HAVE_CXX=n : (Only necessary with the "Lite" version) + +See the section above on Toolchains, NOTE 2, for explanations for some of +the configuration settings. Some of the usual settings are just not supported +by the "Lite" version of the Atollic toolchain. + +STM32F4DIS-BB +============= + +On-board PIO usage: + + ---------- ------------- ------------------------------ + PIO SIGNAL FUNCTION + ---------- ------------- ------------------------------ + PB11 TXEN LAN8720 + PB12 TXD0 + PB13 TXD1 + PC4 RXD0/MODE0 + PC5 RXD1/MODE1 + PA7 RXDR/PHYAD0 + PA2 MDIO + PC1 MDC + PA1 NINT/REFCLK0 + PE2 NRST + ---------- ------------- ------------------------------ + PC6 D2 DCMI + PC7 D3 + PE0 D4 + PE1 D5 + PE4 D6 + PB6 D7 + PE5 D8 + PE6 D9 + PA6 PCLK + PA4 HS + PB7 VS + PD6 PWR_EN + PD12 RST + PB9 SDA + PB8 SCL + ---------- ------------- ------------------------------ + USART6_TX T1IN SP3232EEY-L + USART6_RX T2OUT + ---------- ------------- ------------------------------ + PB15 NCD MicroSD + PC9 DAT1 + PC8 DAT0 + PC12 CLK + PD2 CMD + PC11 CD/DAT3 + PC10 DAT2 + ---------- ------------- ------------------------------ + +FSMC SRAM +========= + +On-board SRAM +------------- +The STM32F4Discovery has no on-board SRAM. The information here is only for +reference in case you choose to add some. + +Configuration Options +--------------------- +Internal SRAM is available in all members of the STM32 family. The F4 family +also contains internal CCM SRAM. This SRAM is different because it cannot +be used for DMA. So if DMA needed, then the following should be defined +to exclude CCM SRAM from the heap: + + CONFIG_STM32_CCMEXCLUDE : Exclude CCM SRAM from the HEAP + +In addition to internal SRAM, SRAM may also be available through the FSMC. +In order to use FSMC SRAM, the following additional things need to be +present in the NuttX configuration file: + + CONFIG_STM32_FSMC=y : Enables the FSMC + CONFIG_STM32_FSMC_SRAM=y : Indicates that SRAM is available via the + FSMC (as opposed to an LCD or FLASH). + CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC + address space + CONFIG_HEAP2_SIZE : The size of the SRAM in the FSMC + address space + CONFIG_MM_REGIONS : Must be set to a large enough value to + include the FSMC SRAM + +SRAM Configurations +------------------- +There are 4 possible SRAM configurations: + + Configuration 1. System SRAM (only) + CONFIG_MM_REGIONS == 1 + CONFIG_STM32_FSMC_SRAM NOT defined + CONFIG_STM32_CCMEXCLUDE defined + Configuration 2. System SRAM and CCM SRAM + CONFIG_MM_REGIONS == 2 + CONFIG_STM32_FSMC_SRAM NOT defined + CONFIG_STM32_CCMEXCLUDE NOT defined + Configuration 3. System SRAM and FSMC SRAM + CONFIG_MM_REGIONS == 2 + CONFIG_STM32_FSMC_SRAM defined + CONFIG_STM32_CCMEXCLUDE defined + Configuration 4. System SRAM, CCM SRAM, and FSMC SRAM + CONFIG_MM_REGIONS == 3 + CONFIG_STM32_FSMC_SRAM defined + CONFIG_STM32_CCMEXCLUDE NOT defined + +SSD1289 +======= + +I purchased an LCD display on eBay from China. The LCD is 320x240 RGB565 and +is based on an SSD1289 LCD controller and an XPT2046 touch IC. The pin out +from the 2x16 connect on the LCD is labelled as follows: + +LCD CONNECTOR: SSD1289 MPU INTERFACE PINS: + + +------+------+ DEN I Display enable pin +1 | GND | 3V3 | 2 VSYNC I Frame synchronization signal + +------+------+ HSYNC I Line synchronization signal +3 | D1 | D0 | 4 DOTCLK I Dot clock and OSC source + +------+------+ DC I Data or command +5 | D3 | D2 | 6 E (~RD) I Enable/Read strobe + +------+------+ R (~WR) I Read/Write strobe +7 | D5 | D4 | 8 D0-D17 IO For parallel mode, 8/9/16/18 bit interface + +------+------+ WSYNC O RAM write synchronizatin output +9 | D7 | D6 | 10 ~RES I System reset + +------+------+ ~CS I Chip select of serial interface +11 | D9 | D8 | 12 SCK I Clock of serial interface + +------+------+ SDI I Data input in serial mode +13 | D11 | D10 | 14 SDO O Data output in serial moce + +------+------+ +15 | D13 | D12 | 16 + +------+------+ +17 | D15 | D14 | 18 + +------+------+ +19 | RS | CS | 20 + +------+------+ +21 | RD | WR | 22 NOTES: + +------+------+ +23 |BL_CNT|RESET | 24 BL_CNT is the PWM backlight level control. + +------+------+ +25 |TP_RQ |TP_S0 | 26 These pins are for the touch panel: TP_REQ + +------+------+ TP_S0, TP_SI, TP_SCX, and TP_CS +27 | NC |TP_SI | 28 + +------+------+ +29 | NC |TP_SCX| 30 + +------+------+ +31 | NC |TP_CS | 32 + +------+------+ + +MAPPING TO STM32 F4: + + ---------------- -------------- ---------------------------------- + STM32 FUNCTION LCD PIN STM32F4Discovery PIN + ---------------- -------------- ---------------------------------- + FSMC_D0 D0 pin 4 PD14 P1 pin 46 Conflict (Note 1) + FSMC_D1 D1 pin 3 PD15 P1 pin 47 Conflict (Note 2) + FSMC_D2 D2 pin 6 PD0 P2 pin 36 Free I/O + FSMC_D3 D3 pin 5 PD1 P2 pin 33 Free I/O + FSMC_D4 D4 pin 8 PE7 P1 pin 25 Free I/O + FSMC_D5 D5 pin 7 PE8 P1 pin 26 Free I/O + FSMC_D6 D6 pin 10 PE9 P1 pin 27 Free I/O + FSMC_D7 D7 pin 9 PE10 P1 pin 28 Free I/O + FSMC_D8 D8 pin 12 PE11 P1 pin 29 Free I/O + FSMC_D9 D9 pin 11 PE12 P1 pin 30 Free I/O + FSMC_D10 D10 pin 14 PE13 P1 pin 31 Free I/O + FSMC_D11 D11 pin 13 PE14 P1 pin 32 Free I/O + FSMC_D12 D12 pin 16 PE15 P1 pin 33 Free I/O + FSMC_D13 D13 pin 15 PD8 P1 pin 40 Free I/O + FSMC_D14 D14 pin 18 PD9 P1 pin 41 Free I/O + FSMC_D15 D15 pin 17 PD10 P1 pin 42 Free I/O + FSMC_A16 RS pin 19 PD11 P1 pin 27 Free I/O + FSMC_NE1 ~CS pin 10 PD7 P2 pin 27 Free I/O + FSMC_NWE ~WR pin 22 PD5 P2 pin 29 Conflict (Note 3) + FSMC_NOE ~RD pin 21 PD4 P2 pin 32 Conflict (Note 4) + PC6 RESET pin 24 PC6 P2 pin 47 Free I/O + Timer ouput BL_CNT pin 23 (to be determined) + ---------------- -------------- ---------------------------------- + + 1 Used for the RED LED + 2 Used for the BLUE LED + 3 Used for the RED LED and for OTG FS Overcurrent. It may be okay to use + for the parallel interface if PC0 is held high (or floating). PC0 enables + the STMPS2141STR IC power switch that drives the OTG FS host VBUS. + 4 Also the reset pin for the CS43L22 audio Codec. + +NOTE: The configuration to test this LCD configuration is available at +configs/stm32f4discovery/nxlines. As of this writing, I have not seen the +LCD working so I probably have some things wrong. + +I might need to use a bit-banging interface. Below is the pin configuration +of a similar LCD to support a (write-only), bit banging interface: + + LCD PIN BOARD CONNECTION + LEDA 5V + VCC 5V + RD 3.3V + GND GND + DB0-7 Port C pins configured as outputs + DB8-15 Port A pins configured as outputs + RS Pin configured as output + WR Pin configured as output + CS Pin configured as output + RSET Pin configured as output + +The following summarize the bit banging operations: + + /* Rese the LCD */ + void Reset(void) + { + Set RSET output + delay + Clear RSET output + delay + Set RSET output + } + + /* Write 16-bits of whatever */ + void Write16(uint8_t ms, uint8_t ls) + { + Set port A to ms + Set port B to ls + + Clear WR pin + Set WR pin + } + + /* Set the index register to an LCD register address */ + void Index(uint8_t address) + { + Clear RS + Write16(0, address); + } + + /* Write data to the LCD register or GRAM memory */ + void WriteData(uin16_t data) + { + Set RS + Write16(data >> 8, data & 0xff); + } + + /* Write to a register */ + void WriteRegister(uint8_t address, uint16_t data) + { + Index(address); + WriteData(data); + } + +UG-2864AMBAG01 / UG-2864HSWEG01 +=============================== + +I purchased an OLED display on eBay. The OLED is 128x64 monochrome and +is based on an UG-2864AMBAG01 OLED controller. The OLED can run in either +parallel or SPI mode. I am using SPI mode. In SPI mode, the OLED is +write only so the driver keeps a 128*64/8 = 1KB framebuffer to remember +the display contents: + +Here is how I have the OLED connected. But you can change this with the +settings in include/board.h and src/stm324fdiscovery.h. Connector +pinout for the UG-2864AMBAG01 is specific to the theO.net display board +that I am using: + + --------------------------+---------------------------------------------- + Connector CON10 J1: | STM32F4Discovery + --------------+-----------+---------------------------------------------- + CON10 J1: | CON20 J2: | P1/P2: + --------------+-----------+---------------------------------------------- + 1 3v3 | 3,4 3v3 | P2 3V + 3 /RESET | 8 /RESET | P2 PB6 (Arbitrary selection) + 5 /CS | 7 /CS | P2 PB7 (Arbitrary selection) + 7 A0 | 9 A0 | P2 PB8 (Arbitrary selection) + 9 LED+ (N/C) | ----- | ----- + 2 5V Vcc | 1,2 Vcc | P2 5V + 4 DI | 18 D1/SI | P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1 (1)) + 6 SCLK | 19 D0/SCL | P1 PA5 (GPIO_SPI1_SCK == GPIO_SPI1_SCK_1 (1)) + 8 LED- (N/C) | ----- | ------ + 10 GND | 20 GND | P2 GND + --------------+-----------+---------------------------------------------- + (1) Required because of on-board MEMS + ------------------------------------------------------------------------- + +Darcy Gong recently added support for the UG-2864HSWEG01 OLED which is also +an option with this configuration. I have little technical information about +the UG-2864HSWEG01 interface (see configs/stm32f4discovery/src/up_ug2864hsweg01.c). + +STM32F4Discovery-specific Configuration Options +=============================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32F407VG=y + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=STM32F4Discovery (for the STM32F4Discovery development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP + + In addition to internal SRAM, SRAM may also be available through the FSMC. + In order to use FSMC SRAM, the following additional things need to be + present in the NuttX configuration file: + + CONFIG_STM32_FSMC_SRAM - Indicates that SRAM is available via the + FSMC (as opposed to an LCD or FLASH). + + CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space (hex) + + CONFIG_HEAP2_SIZE - The size of the SRAM in the FSMC address space (decimal) + + CONFIG_ARCH_FPU - The STM32F4Discovery supports a floating point unit (FPU) + + CONFIG_ARCH_FPU=y + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibrate + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + AHB1 + ---- + CONFIG_STM32_CRC + CONFIG_STM32_BKPSRAM + CONFIG_STM32_CCMDATARAM + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + CONFIG_STM32_ETHMAC + CONFIG_STM32_OTGHS + + AHB2 + ---- + CONFIG_STM32_DCMI + CONFIG_STM32_CRYP + CONFIG_STM32_HASH + CONFIG_STM32_RNG + CONFIG_STM32_OTGFS + + AHB3 + ---- + CONFIG_STM32_FSMC + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_TIM12 + CONFIG_STM32_TIM13 + CONFIG_STM32_TIM14 + CONFIG_STM32_WWDG + CONFIG_STM32_IWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI3 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_I2C3 + CONFIG_STM32_CAN1 + CONFIG_STM32_CAN2 + CONFIG_STM32_DAC1 + CONFIG_STM32_DAC2 + CONFIG_STM32_PWR -- Required for RTC + + APB2 + ---- + CONFIG_STM32_TIM1 + CONFIG_STM32_TIM8 + CONFIG_STM32_USART1 + CONFIG_STM32_USART6 + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + CONFIG_STM32_ADC3 + CONFIG_STM32_SDIO + CONFIG_STM32_SPI1 + CONFIG_STM32_SYSCFG + CONFIG_STM32_TIM9 + CONFIG_STM32_TIM10 + CONFIG_STM32_TIM11 + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + JTAG Enable settings (by default only SW-DP is enabled): + + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + + STM32F4Discovery specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + STM32F4Discovery CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + + STM32F4Discovery SPI Configuration + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + + STM32F4Discovery DMA Configuration + + CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO + and CONFIG_STM32_DMA2. + CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. + Default: Medium + CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: + 4-bit transfer mode. + + STM32 USB OTG FS Host Driver Support + + Pre-requisites + + CONFIG_USBDEV - Enable USB device support + CONFIG_USBHOST - Enable USB host support + CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block + CONFIG_STM32_SYSCFG - Needed + CONFIG_SCHED_WORKQUEUE - Worker thread support is required + + Options: + + CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. + Default 128 (512 bytes) + CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO + in 32-bit words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit + words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128 + CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever + want to do that? + CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access + debug. Depends on CONFIG_DEBUG. + CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB + packets. Depends on CONFIG_DEBUG. + +BASIC +===== + I have used the stm32f4discovery/nsh configuration to test Michael Haardt's + BASIC interpreter that you can find at apps/interpreters/bas. + + Bas is an interpreter for the classic dialect of the programming language + BASIC. It is pretty compatible to typical BASIC interpreters of the 1980s, + unlike some other UNIX BASIC interpreters, that implement a different + syntax, breaking compatibility to existing programs. Bas offers many ANSI + BASIC statements for structured programming, such as procedures, local + variables and various loop types. Further there are matrix operations, + automatic LIST indentation and many statements and functions found in + specific classic dialects. Line numbers are not required. + + There is also a test suite for the interpreter that can be found at + apps/examples/bastest. + + Configuration + ------------- + Below are the recommended configuration changes to use BAS with the + stm32f4discovery/nsh configuration: + + Dependencies: + CONFIG_LIBC_EXECFUNCS=y : exec*() functions are required + CONFIG_LIBM=y : Some floating point library is required + CONFIG_LIBC_FLOATINGPOINT=y : Floating point printing support is required + CONFIG_LIBC_TMPDIR="/tmp" : Writable temporary files needed for some commands + CONFIG_FS_FAT=y : With FAT you create a RAMDISK at /tmp + CONFIG_FAT_LFN=y : FAT is difficult to use with long file names + + Enable the BASIC interpreter. Other default options should be okay: + CONFIG_INTERPRETERS_BAS=y : Enables the interpreter + CONFIG_INTERPRETER_BAS_VT100=y + + The BASIC test suite can be included: + CONFIG_FS_ROMFS=y : ROMFS support is needed + CONFIG_EXAMPLES_BASTEST=y : Enables the BASIC test setup + CONFIG_EXAMPLES_BASTEST_DEVMINOR=0 + CONFIG_EXAMPLES_BASTEST_DEVPATH="/dev/ram0" + + Usage + ----- + This setup will initialize the BASIC test (optional): This will mount + a ROMFS file system at /mnt/romfs that contains the BASIC test files: + + nsh> bastest + Registering romdisk at /dev/ram0 + Mounting ROMFS filesystem at target=/mnt/romfs with source=/dev/ram0 + nsh> + + These steps will create and mount a RAMDISK at /tmp (required only for a + few BASIC commands). This will create a RAMDISK device at /dev/ram1 with + size = 512 * 64 = 32KiB and mount it at /tmp: + + nsh> mkrd -m 1 -s 512 64 + nsh> mkfatfs /dev/ram1 + nsh> mount -t vfat /dev/ram1 /tmp + nsh> + + The interactive interpreter is started like: + + nsh> bas + bas 2.4 + Copyright 1999-2014 Michael Haardt. + This is free software with ABSOLUTELY NO WARRANTY. + > + + Ctrl-D exits the interpreter. + + The test programs can be ran like this: + + nsh> bastest + Registering romdisk at /dev/ram0 + Mounting ROMFS filesystem at target=/mnt/romfs with source=/dev/ram0 + nsh> bas /mnt/romfs/test01.bas + 1 + hello + 0.0002 + 0.0000020 + 0.0000002 + + nsh> + + Or you can load a test into memory and execute it interactively: + + nsh> bas + bas 2.4 + Copyright 1999-2014 Michael Haardt. + This is free software with ABSOLUTELY NO WARRANTY. + > load "/mnt/romfs/test01.bas" + > run + 1 + hello + 0.0002 + 0.0000020 + 0.0000002 + > + +Configurations +============== + +Each STM32F4Discovery configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh STM32F4Discovery/ + cd - + . ./setenv.sh + +If this is a Windows native build, then configure.bat should be used +instead of configure.sh: + + configure.bat STM32F4Discovery\ + +Where is one of the following: + + cxxtest: + ------- + + The C++ standard libary test at apps/examples/cxxtest configuration. This + test is used to verify the uClibc++ port to NuttX. This configuration may + be selected as follows: + + cd /tools + ./configure.sh sim/cxxtest + + NOTES: + + 1. Before you can use this example, you must first install the uClibc++ + C++ library. This is located outside of the NuttX source tree in the + NuttX uClibc++ GIT repository. See the README.txt file there for + instructions on how to install uClibc++ + + 2. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. Ideally, you should build with a toolchain based on GLIBC or + uClibc++. It you use a toolchain based on newlib, you may see + an error like the following: + + .../lib/libsupc++.a(vterminate.o): In function `__gnu_cxx::__verbose_terminate_handler()': + vterminate.cc:(....): undefined reference to `_impure_ptr' + + Here is a quick'n'dirty fix: + + 1. Get the directory where you can find libsupc++: + + arm-none-eabi-gcc -mcpu=cortex-m4 -mthumb -print-file-name=libsupc++.a + + 2. Go to that directory and save a copy of vterminate.o (in case you + want to restore it later: + + cd + arm-none-eabi-ar.exe -x libsupc++.a vterminate.o + + 3. Then remove vterminate.o from the library. At build time, the + uClibc++ package will provide a usable replacement vterminate.o. + + Steps 2 and 3 will require root privileges on most systems (not Cygwin). + + Now NuttX should link with no problem. If you want to restore the + vterminate.o that you removed from libsupc++, you can do that with: + + arm-none-eabi-ar.exe rcs libsupc++.a vterminate.o + + 4. Exceptions are enabled and workking (CONFIG_UCLIBCXX_EXCEPTION=y) + + elf: + --- + + This configuration uses apps/examples/elf in order to test the ELF + loader. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default platform/toolchain: + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + + 3. By default, this project assumes that you are *NOT* using the DFU + bootloader. + + 4. It appears that you cannot execute from CCM RAM. This is why the + following definition appears in the defconfig file: + + CONFIG_STM32_CCMEXCLUDE=y + + 5. This configuration requires that you have the genromfs tool installed + on your system and that you have the full path to the installed genromfs + executable in PATH variable (see apps/examples/README.txt) + + 6. This configuration can be extended to use the hello++4 example and to + build uClibc with the following additions to to the configuration file + (from Leo aloe3132): + + CONFIG_C99_BOOL8=y + CONFIG_HAVE_CXXINITIALIZE=y + + CONFIG_UCLIBCXX=y + CONFIG_UCLIBCXX_EXCEPTION=y + CONFIG_UCLIBCXX_HAVE_LIBSUPCXX=y + CONFIG_UCLIBCXX_IOSTREAM_BUFSIZE=32 + + CONFIG_EXAMPLES_ELF_CXXINITIALIZE=y + CONFIG_EXAMPLES_ELF_UCLIBCXX=y + + 4. The network initialization thread is enabled in this configuration. + As a result, networking initialization is performed asynchronously with + NSH bring-up. + + The network monitor is not enabled in this configuration, however, so + the firmware will not know when the network is disconnected or + reconnected. The NSH Network Monitor cannot be used with the + STM32F4DIS-BB base board because the LAN8720 is configured in REF_CLK + OUT mode. In that mode, the PHY interrupt is not supported. The NINT + pin serves as REFLCK0 in that case. + + ipv6: + ---- + This is another version of the NuttShell configuration for the + STM32F4-Discovery with the STM32F4DIS-BB base board. It is very similar + to the netnsh configuration except that it has IPv6 enabled and IPv4 + disabled. Several network utilities that are not yet available under + IPv6 are disabled. + + NOTES: + + 1. As of 2015-02-05, this configuration was identical to the netnsh + configuration other than using IPv6. So all of the notes above + regarding the netnsh configuration apply. + + a. Telnet does not work with IPv6. + b. The network initialization thread was enabed in the netnsh + configuration on 2015-09-28, but not in the ipv6 configuration. + + 2. This configuration can be modified to that both IPv4 and IPv6 + are support. Here is a summary of the additional configuration + settings required to support both IPv4 and IPv6: + + CONFIG_NET_IPv4=y + CONFIG_NET_ARP=y + CONFIG_NET_ARP_SEND=y (optional) + CONFIG_NET_ICMP=y + CONFIG_NET_ICMP_PING=y + + CONFIG_NETDB_DNSCLIENT=y + CONFIG_NETUTILS_TELNETD=y + + CONFIG_NSH_IPADDR=0x0a000002 + CONFIG_NSH_DRIPADDR=0x0a000001 + CONFIG_NSH_NETMASK=0xffffff00 + CONFIG_NSH_TELNET=y + + Then from NSH, you have both ping and ping6 commands: + + nsh> ping 10.0.0.1 + nsh> ping6 fc00::1 + + And from the host you can do similar: + + ping 10.0.0.2 + ping6 fc00::2 (Linux) + ping -6 fc00::2 (Windows cmd) + + and Telnet again works from the host: + + telent 10.0.0.2 + + 3. I have used this configuration to serve up IP address prefixes + in a local network with these modifications to the configuration: + + +CONFIG_NET_ICMPv6_ROUTER=y + +CONFIG_NET_ICMPv6_PREFLEN=64 + +CONFIG_NET_ICMPv6_PREFIX_1=0xfc00 + +CONFIG_NET_ICMPv6_PREFIX_2=0x0000 + +CONFIG_NET_ICMPv6_PREFIX_3=0x0000 + +CONFIG_NET_ICMPv6_PREFIX_4=0x0000 + +CONFIG_NET_ICMPv6_PREFIX_5=0x0000 + +CONFIG_NET_ICMPv6_PREFIX_6=0x0000 + +CONFIG_NET_ICMPv6_PREFIX_7=0x0000 + +CONFIG_NET_ICMPv6_PREFIX_8=0x0000 + + +CONFIG_NSH_IPv6NETMASK_5=0x0000 + -CONFIG_NSH_IPv6NETMASK_5=0xffff + + +CONFIG_NSH_IPv6NETMASK_6=0x0000 + -CONFIG_NSH_IPv6NETMASK_6=0xffff + + +CONFIG_NSH_IPv6NETMASK_7=0x0000 + -CONFIG_NSH_IPv6NETMASK_7=0xffff + + +CONFIG_NSH_IPv6NETMASK_8=0x0000 + -CONFIG_NSH_IPv6NETMASK_8=0xff80 + + kostest: + ------- + This is identical to the ostest configuration below except that NuttX + is built as a kernel-mode, monolithic module and the user applications + are built separately. Is is recommended to use a special make command; + not just 'make' but make with the following two arguments: + + make pass1 pass2 + + In the normal case (just 'make'), make will attempt to build both user- + and kernel-mode blobs more or less interleaved. This actual works! + However, for me it is very confusing so I prefer the above make command: + Make the user-space binaries first (pass1), then make the kernel-space + binaries (pass2) + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. This is the default platform/toolchain in the configuration: + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + + This is easily changed by modifying the configuration. + + 3. At the end of the build, there will be several files in the top-level + NuttX build directory: + + PASS1: + nuttx_user.elf - The pass1 user-space ELF file + nuttx_user.hex - The pass1 Intel HEX format file (selected in defconfig) + User.map - Symbols in the user-space ELF file + + PASS2: + nuttx - The pass2 kernel-space ELF file + nuttx.hex - The pass2 Intel HEX file (selected in defconfig) + System.map - Symbols in the kernel-space ELF file + + 4. Combining .hex files. If you plan to use the STM32 ST-Link Utility to + load the .hex files into FLASH, then you need to combine the two hex + files into a single .hex file. Here is how you can do that. + + a. The 'tail' of the nuttx.hex file should look something like this + (with my comments added): + + $ tail nuttx.hex + # 00, data records + ... + :10 9DC0 00 01000000000800006400020100001F0004 + :10 9DD0 00 3B005A0078009700B500D400F300110151 + :08 9DE0 00 30014E016D0100008D + # 05, Start Linear Address Record + :04 0000 05 0800 0419 D2 + # 01, End Of File record + :00 0000 01 FF + + Use an editor such as vi to remove the 05 and 01 records. + + b. The 'head' of the nuttx_user.hex file should look something like + this (again with my comments added): + + $ head nuttx_user.hex + # 04, Extended Linear Address Record + :02 0000 04 0801 F1 + # 00, data records + :10 8000 00 BD89 01084C800108C8110208D01102087E + :10 8010 00 0010 00201C1000201C1000203C16002026 + :10 8020 00 4D80 01085D80010869800108ED83010829 + ... + + Nothing needs to be done here. The nuttx_user.hex file should + be fine. + + c. Combine the edited nuttx.hex and un-edited nuttx_user.hex + file to produce a single combined hex file: + + $ cat nuttx.hex nuttx_user.hex >combined.hex + + Then use the combined.hex file with the STM32 ST-Link tool. If + you do this a lot, you will probably want to invest a little time + to develop a tool to automate these steps. + + netnsh: + ------ + This is a special version of the NuttShell (nsh) configuration that is + tailored to work with the STM32F4DIS-BB base board. This version + derives from nsh configuration so all of the notes apply there except as + noted below. + + NOTES: + + 1. This example uses USART6 for the serial console. The STM32F4DIS-BB + provides RS-232 drivers for USART6 and allows access via the DB9 + connector on the base board. USART6 is, therefore, the more + convenient UART to use for the serial console. + + 2. Networking is enabled. The STM32F4DIS-BB has an SMC LAN2870 PHY + and RJ5 network connector. Support is enabled for ICMP, TCP/IP, + UDP, and ARP. + + 3. SD card support is enabled. The STM32F4DIS-BB has an on-board + microSD slot that should be automatically registered as the block + device /dev/mmcsd0 when an SD card is present. The SD card can + then be mounted by the NSH command: + + nsh> mount -t /dev/mmcsd0 /mnt/sdcard + + 4. CCM memory is not included in the heap in this configuration. That + is because the SD card uses DMA and if DMA memory is allocated from + the CCM memory, the DMA will failure. This is an STM32 hardware + limitation. + + If you want to get the CCM memory back in the heap, then you can + + a) Disable microSD support (and DMAC2 which is then no longer + needed). If you reduce the clocking by a huge amount, it might + be possible to use microSD without DMA. This, however, may + not be possible. + b) Develop a strategy to manage CCM memory and DMA memory. Look + at this discussion on the NuttX Wiki: + http://www.nuttx.org/doku.php?id=wiki:howtos:stm32-ccm-alloc + + To put the CCM memory back into the heap you would need to change + the following in the NuttX configuration: + + CONFIG_STM32_CCMEXCLUDE=n : Don't exclude CCM memory from the heap + CONFIG_MM_REGIONS=2 : With CCM, there will be two memory regions + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables the serial interfaces on UART2. Support for + builtin applications is enabled, but in the base configuration no + builtin applications are selected (see NOTES below). + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + 3. To use this configuration with the STM32F4DIS-BB baseboard you + should: + + - Select the STM32F4DIS-BB baseboard in the board configuration + menu + - Disable UART2 and select USART6 in the STM32 peripheral selection + menu + - Select USART6 as the serial console at 115200 8N1 in the + Drivers menus + + 4. This example supports the PWM test (apps/examples/pwm) but this must + be manually enabled by selecting: + + CONFIG_PWM=y : Enable the generic PWM infrastructure + CONFIG_STM32_TIM4=y : Enable TIM4 + CONFIG_STM32_TIM4_PWM=y : Use TIM4 to generate PWM output + + See also apps/examples/README.txt + + Special PWM-only debug options: + + CONFIG_DEBUG_PWM + + 5. This example supports the Quadrature Encode test (apps/examples/qencoder) + but this must be manually enabled by selecting: + + CONFIG_EXAMPLES_QENCODER=y : Enable the apps/examples/qencoder + CONFIG_SENSORS=y : Enable support for sensors + CONFIG_QENCODER=y : Enable the generic Quadrature Encoder infrastructure + CONFIG_STM32_TIM8=y : Enable TIM8 + CONFIG_STM32_TIM2=n : (Or optionally TIM2) + CONFIG_STM32_TIM8_QE=y : Use TIM8 as the quadrature encoder + CONFIG_STM32_TIM2_QE=y : (Or optionally TIM2) + + See also apps/examples/README.tx. Special debug options: + + CONFIG_DEBUG_SENSORS + + 6. This example supports the watchdog timer test (apps/examples/watchdog) + but this must be manually enabled by selecting: + + CONFIG_EXAMPLES_WATCHDOG=y : Enable the apps/examples/watchdog + CONFIG_WATCHDOG=y : Enables watchdog timer driver support + CONFIG_STM32_WWDG=y : Enables the WWDG timer facility, OR + CONFIG_STM32_IWDG=y : Enables the IWDG timer facility (but not both) + + The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result, + has a maximum timeout value of 49 milliseconds. for WWDG watchdog, you + should also add the fillowing to the configuration file: + + CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20 + CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49 + + The IWDG timer has a range of about 35 seconds and should not be an issue. + + 7. USB Support (CDC/ACM device) + + CONFIG_STM32_OTGFS=y : STM32 OTG FS support + CONFIG_USBDEV=y : USB device support must be enabled + CONFIG_CDCACM=y : The CDC/ACM driver must be built + CONFIG_NSH_BUILTIN_APPS=y : NSH built-in application support must be enabled + CONFIG_NSH_ARCHINIT=y : To perform USB initialization + + 8. Using the USB console. + + The STM32F4Discovery NSH configuration can be set up to use a USB CDC/ACM + (or PL2303) USB console. The normal way that you would configure the + the USB console would be to change the .config file like this: + + CONFIG_STM32_OTGFS=y : STM32 OTG FS support + CONFIG_USART2_SERIAL_CONSOLE=n : Disable the USART2 console + CONFIG_DEV_CONSOLE=n : Inhibit use of /dev/console by other logic + CONFIG_USBDEV=y : USB device support must be enabled + CONFIG_CDCACM=y : The CDC/ACM driver must be built + CONFIG_CDCACM_CONSOLE=y : Enable the CDC/ACM USB console. + + NOTE: When you first start the USB console, you have hit ENTER a few + times before NSH starts. The logic does this to prevent sending USB data + before there is anything on the host side listening for USB serial input. + + 9. Here is an alternative USB console configuration. The following + configuration will also create a NSH USB console but this version + will use /dev/console. Instead, it will use the normal /dev/ttyACM0 + USB serial device for the console: + + CONFIG_STM32_OTGFS=y : STM32 OTG FS support + CONFIG_USART2_SERIAL_CONSOLE=y : Keep the USART2 console + CONFIG_DEV_CONSOLE=y : /dev/console exists (but NSH won't use it) + CONFIG_USBDEV=y : USB device support must be enabled + CONFIG_CDCACM=y : The CDC/ACM driver must be built + CONFIG_CDCACM_CONSOLE=n : Don't use the CDC/ACM USB console. + CONFIG_NSH_USBCONSOLE=y : Instead use some other USB device for the console + + The particular USB device that is used is: + + CONFIG_NSH_USBCONDEV="/dev/ttyACM0" + + The advantage of this configuration is only that it is easier to + bet working. This alternative does has some side effects: + + - When any other device other than /dev/console is used for a user + interface, linefeeds (\n) will not be expanded to carriage return / + linefeeds (\r\n). You will need to set your terminal program to account + for this. + + - /dev/console still exists and still refers to the serial port. So + you can still use certain kinds of debug output (see include/debug.h, all + of the interfaces based on lowsyslog will work in this configuration). + + - But don't enable USB debug output! Since USB is console is used for + USB debug output and you are using a USB console, there will be + infinite loops and deadlocks: Debug output generates USB debug + output which generatates USB debug output, etc. If you want USB + debug output, you should consider enabling USB trace + (CONFIG_USBDEV_TRACE) and perhaps the USB monitor (CONFIG_SYSTEM_USBMONITOR). + + See the usbnsh configuration below for more information on configuring + USB trace output and the USB monitor. + + 10. USB OTG FS Host Support. The following changes will enable support for + a USB host on the STM32F4Discovery, including support for a mass storage + class driver: + + Device Drivers -> + CONFIG_USBDEV=n : Make sure tht USB device support is disabled + CONFIG_USBHOST=y : Enable USB host support + CONFIG_USBHOST_ISOC_DISABLE=y + + Device Drivers -> USB Host Driver Support + CONFIG_USBHOST_MSC=y : Enable the mass storage class + + System Type -> STM32 Peripheral Support + CONFIG_STM32_OTGFS=y : Enable the STM32 USB OTG FS block + CONFIG_STM32_SYSCFG=y : Needed for all USB OTF FS support + + RTOS Features -> Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : High priority worker thread support is required + CONFIG_SCHED_HPWORK=y : for the mass storage class driver. + + File Systems -> + CONFIG_FS_FAT=y : Needed by the USB host mass storage class. + + Board Selection -> + CONFIG_LIB_BOARDCTL=y : Needed for CONFIG_NSH_ARCHINIT + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : Architecture specific USB initialization + : is needed for NSH + + With those changes, you can use NSH with a FLASH pen driver as shown + belong. Here NSH is started with nothing in the USB host slot: + + NuttShell (NSH) NuttX-x.yy + nsh> ls /dev + /dev: + console + null + ttyS0 + + After inserting the FLASH drive, the /dev/sda appears and can be + mounted like this: + + nsh> ls /dev + /dev: + console + null + sda + ttyS0 + nsh> mount -t vfat /dev/sda /mnt/stuff + nsh> ls /mnt/stuff + /mnt/stuff: + -rw-rw-rw- 16236 filea.c + + And files on the FLASH can be manipulated to standard interfaces: + + nsh> echo "This is a test" >/mnt/stuff/atest.txt + nsh> ls /mnt/stuff + /mnt/stuff: + -rw-rw-rw- 16236 filea.c + -rw-rw-rw- 16 atest.txt + nsh> cat /mnt/stuff/atest.txt + This is a test + nsh> cp /mnt/stuff/filea.c fileb.c + nsh> ls /mnt/stuff + /mnt/stuff: + -rw-rw-rw- 16236 filea.c + -rw-rw-rw- 16 atest.txt + -rw-rw-rw- 16236 fileb.c + + To prevent data loss, don't forget to un-mount the FLASH drive + before removing it: + + nsh> umount /mnt/stuff + + 11. I used this configuration to test the USB hub class. I did this + testing with the following changes to the configuration (in addition + to those listed above for base USB host/mass storage class support): + + Drivers -> USB Host Driver Support + CONFIG_USBHOST_HUB=y : Enable the hub class + CONFIG_USBHOST_ASYNCH=y : Asynchonous I/O supported needed for hubs + + System Type -> USB host configuration + To be determined + + Board Selection -> + CONFIG_STM32F4DISCO_USBHOST_STACKSIZE=2048 (bigger than it needs to be) + + RTOS Features -> Work Queue Support + CONFIG_SCHED_LPWORK=y : Low priority queue support is needed + CONFIG_SCHED_LPNTHREADS=1 + CONFIG_SCHED_LPWORKSTACKSIZE=1024 + + NOTES: + + 1. It is necessary to perform work on the low-priority work queue + (vs. the high priority work queue) because deferred hub-related + work requires some delays and waiting that is not appropriate on + the high priority work queue. + + 2. Stack usage make increase when USB hub support is enabled because + the nesting depth of certain USB host class logic can increase. + + STATUS: + 2015-04-30 + Appears to be fully functional. + + nxlines: + ------ + An example using the NuttX graphics system (NX). This example focuses on + placing lines on the background in various orientations. + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_LCD_LANDSCAPE=y : 320x240 landscape orientation + + The STM32F4Discovery board does not have any graphics capability. This + configuration assumes that you have connected an SD1289-based LCD as + described above under "SSD1289". NOTE: At present, it has not been + proven that the STM32F4Discovery can actually drive an LCD. There are + some issues with how some of the dedicated FSMC pins are used on the + boards. This configuration may not be useful and may only serve as + an illustration of how to build for th SSD1289 LCD. + + NOTES: + + 1. As of this writing, I have not seen the LCD work! + + 2. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. This configured can be re-configured to use either the + UG-2864AMBAG01 or UG-2864HSWEG01 0.96 inch OLEDs by adding + or changing the following items in the configuration (using + 'make menuconfig'): + + +CONFIG_SPI_CMDDATA=y + + -CONFIG_LCD_MAXCONTRAST=1 + -CONFIG_LCD_MAXPOWER=255 + +CONFIG_LCD_MAXCONTRAST=255 + +CONFIG_LCD_MAXPOWER=1 + + -CONFIG_LCD_SSD1289=y + -CONFIG_SSD1289_PROFILE1=y + +CONFIG_LCD_UG2864AMBAG01=y : For the UG-2964AMBAG01 + +CONFIG_UG2864AMBAG01_SPIMODE=3 + +CONFIG_UG2864AMBAG01_FREQUENCY=3500000 + +CONFIG_UG2864AMBAG01_NINTERFACES=1 + + -CONFIG_NX_DISABLE_1BPP=y + +CONFIG_NX_DISABLE_16BPP=y + + -CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x0320 + -CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16 + -CONFIG_EXAMPLES_NXLINES_LINECOLOR=0xffe0 + -CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4 + -CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xffe0 + -CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0xf7bb + -CONFIG_EXAMPLES_NXLINES_BPP=16 + +CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x00 + +CONFIG_EXAMPLES_NXLINES_LINEWIDTH=4 + +CONFIG_EXAMPLES_NXLINES_LINECOLOR=0x01 + +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=2 + +CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0x01 + +CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0x00 + +CONFIG_EXAMPLES_NXLINES_BPP=1 + +CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y + + There are some issues with with the presentation... some tuning of the + configuration could fix that. Lower resolution displays are also more + subject to the "fat, flat line bug" that I need to fix someday. See + http://www.nuttx.org/doku.php?id=wiki:graphics:nxgraphics for a description + of the fat, flat line bug. + + pm: + -- + This is a configuration that is used to test STM32 power management, i.e., + to test that the board can go into lower and lower states of power usage + as a result of inactivity. This configuration is based on the nsh2 + configuration with modifications for testing power management. This + configuration should provide some guidelines for power management in your + STM32 application. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default configuration is Cygwin under windows using the CodeSourcery + toolchain: + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_CYGWIN=y : Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + + 3. CONFIG_ARCH_CUSTOM_PMINIT and CONFIG_ARCH_IDLE_CUSTOM are necessary + parts of the PM configuration: + + CONFIG_ARCH_CUSTOM_PMINIT=y + + CONFIG_ARCH_CUSTOM_PMINIT moves the PM initialization from + arch/arm/src/stm32/stm32_pminitialiaze.c to configs/stm3210-eval/src/stm32_pm.c. + This allows us to support board-specific PM initialization. + + CONFIG_ARCH_IDLE_CUSTOM=y + + The bulk of the PM activities occur in the IDLE loop. The IDLE loop + is special because it is what runs when there is no other task running. + Therefore when the IDLE executes, we can be assure that nothing else + is going on; this is the ideal condition for doing reduced power + management. + + The configuration CONFIG_ARCH_IDLE_CUSTOM allows us to "steal" the + normal STM32 IDLE loop (of arch/arm/src/stm32/stm32_idle.c) and replace + this with our own custom IDLE loop (at configs/stm3210-eval/src/up_idle.c). + + 4. Here are some additional things to note in the configuration: + + CONFIG_PM_BUTTONS=y + + CONFIG_PM_BUTTONS enables button support for PM testing. Buttons can + drive EXTI interrupts and EXTI interrupts can be used to wakeup for + certain reduced power modes (STOP mode). The use of the buttons here + is for PM testing purposes only; buttons would normally be part the + application code and CONFIG_PM_BUTTONS would not be defined. + + CONFIG_RTC_ALARM=y + + The RTC alarm is used to wake up from STOP mode and to transition to + STANDBY mode. This used of the RTC alarm could conflict with other + uses of the RTC alarm in your application. + + posix_spawn: + ------------ + This configuration directory, performs a simple test os the posix_spawn + interface using apps/examples/posix_spawn. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default toolchain: + + CONFIG_HOST_WINDOWS=y : Builds under windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin and + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : The native Windows CodeSourcery toolchain + + 3. By default, this project assumes that you are *NOT* using the DFU + bootloader. + + rgbled: + ------- + + Alan Carvalho de Assis has used the STM32F4-Discovery to drive an RGB LED + using PWM output. The external RGB connected this way: + + R = TIM1 CH1 on PE9 + G = TIM2 CH2 on PA1 + B = TIM3 CH3 on PB0 + + as described about in the section "RGB LED Driver". + + This configuration uses the example at apps/examples/rgbled to drive the + external RGB LED> + + usbnsh: + ------- + + This is another NSH example. If differs from other 'nsh' configurations + in that this configurations uses a USB serial device for console I/O. + Such a configuration is useful on the stm32f4discovery which has no + builtin RS-232 drivers. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + 3. This configuration does have UART2 output enabled and set up as + the system logging device: + + CONFIG_SYSLOG=y : Enable output to syslog, not console + CONFIG_SYSLOG_CHAR=y : Use a character device for system logging + CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0 + + However, there is nothing to generate SYLOG output in the default + configuration so nothing should appear on UART2 unless you enable + some debug output or enable the USB monitor. + + NOTE: Using the SYSLOG to get debug output has limitations. Among + those are that you cannot get debug output from interrupt handlers. + So, in particularly, debug output is not a useful way to debug the + USB device controller driver. Instead, use the USB monitor with + USB debug off and USB trace on (see below). + + 4. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB + device will save encoded trace output in in-memory buffer; if the + USB monitor is enabled, that trace buffer will be periodically + emptied and dumped to the system logging device (UART2 in this + configuration): + + CONFIG_USBDEV_TRACE=y : Enable USB trace feature + CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory + CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH + CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor + CONFIG_SYSTEM_USBMONITOR=y : Enable the USB monitor daemon + CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size + CONFIG_SYSTEM_USBMONITOR_PRIORITY=50 : USB monitor daemon priority + CONFIG_SYSTEM_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds + + CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y : Enable TRACE output + CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y + CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y + CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y + CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y + + 5. By default, this project assumes that you are *NOT* using the DFU + bootloader. + + Using the Prolifics PL2303 Emulation + ------------------------------------ + You could also use the non-standard PL2303 serial device instead of + the standard CDC/ACM serial device by changing: + + CONFIG_CDCACM=n : Disable the CDC/ACM serial device class + CONFIG_CDCACM_CONSOLE=n : The CDC/ACM serial device is NOT the console + CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled + CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console + + winbuild: + -------- + + This is a version of the apps/example/ostest, but configure to build natively + in the Windows CMD shell. + + NOTES: + + 1. The beginnings of a Windows native build are in place but still not full + usable as of this writing. The windows native build logic is currently + separate and must be started by: + + make -f Makefile.win + + This build: + + - Uses all Windows style paths + - Uses primarily Windows batch commands from cmd.exe, with + - A few extensions from GNUWin32 (or MSYS is you prefer) + + In this build, you cannot use a Cygwin or MSYS shell. Rather the build must + be performed in a Windows console. Here is a better shell than than the + standard issue, CMD.exe shell: ConEmu which can be downloaded from: + http://code.google.com/p/conemu-maximus5/ + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_NATIVE=y : Native Windows environment + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + + Build Tools. The build still relies on some Unix-like commands. I use + the GNUWin32 tools that can be downloaded from http://gnuwin32.sourceforge.net/. + The MSYS tools are probably also a option but are likely lower performance + since they are based on Cygwin 1.3. + + Host Compiler: I use the MingGW compiler which can be downloaded from + http://www.mingw.org/. If you are using GNUWin32, then it is recommended + the you not install the optional MSYS components as there may be conflicts. diff --git a/configs/stm32f4discovery/cxxtest/Make.defs b/configs/stm32f4discovery/cxxtest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c31bef20e3563bbf9d1f3fde6aef747f3553c674 --- /dev/null +++ b/configs/stm32f4discovery/cxxtest/Make.defs @@ -0,0 +1,121 @@ +############################################################################ +# configs/stm32f4discovery/cxxtest/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +LDSCRIPT = ld.script +LIBSUPXX = ${shell $(CC) $(CXXFLAGS) --print-file-name=libsupc++.a} +EXTRA_LIBPATHS = -L "${shell dirname "$(LIBSUPXX)"}" +EXTRA_LIBS = -lsupc++ + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" \ + -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" \ + -isystem "${shell cygpath -w $(TOPDIR)/include/uClibc++}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include \ + -isystem $(TOPDIR)/include/cxx -isystem $(TOPDIR)/include/uClibc++ + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ifeq ($(CONFIG_UCLIBCXX_EXCEPTION),y) + ARCHCPUFLAGSXX = -fno-builtin +else + ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions +endif +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/stm32f4discovery/cxxtest/defconfig b/configs/stm32f4discovery/cxxtest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..98e5442adce1d188c514dc01224eac5a8b1a6c9f --- /dev/null +++ b/configs/stm32f4discovery/cxxtest/defconfig @@ -0,0 +1,1024 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +CONFIG_ARCH_FLOAT_H=y +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f4discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_STM32F4DISBB is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=2 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="cxxtest_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=4 + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +CONFIG_C99_BOOL8=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +CONFIG_UCLIBCXX=y +CONFIG_UCLIBCXX_EXCEPTION=y +CONFIG_UCLIBCXX_IOSTREAM_BUFSIZE=32 +CONFIG_UCLIBCXX_HAVE_LIBSUPCXX=y + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +CONFIG_EXAMPLES_CXXTEST=y +CONFIG_EXAMPLES_CXXTEST_CXXINITIALIZE=y +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/cxxtest/setenv.sh b/configs/stm32f4discovery/cxxtest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3428bcf4e6895e29ce470361bbefde162fa092d1 --- /dev/null +++ b/configs/stm32f4discovery/cxxtest/setenv.sh @@ -0,0 +1,81 @@ +#!/bin/bash +# configs/stm32f4discovery/cxxtest/setenv.sh +# +# Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f4discovery/elf/Make.defs b/configs/stm32f4discovery/elf/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..77d0869652f02faf899b95d964eb375da6bb62bb --- /dev/null +++ b/configs/stm32f4discovery/elf/Make.defs @@ -0,0 +1,132 @@ +############################################################################ +# configs/stm32f4discovery/elf/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +# File extensions + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +# Linker flags + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +# Host tools + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f4discovery/elf/defconfig b/configs/stm32f4discovery/elf/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..673675f373d1ab6d896426a3b2ef5a4f9bbed3e1 --- /dev/null +++ b/configs/stm32f4discovery/elf/defconfig @@ -0,0 +1,1044 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_TARGET2_PREL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +CONFIG_STM32_CCMEXCLUDE=y +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f4discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_STM32F4DISBB is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="elf_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_SCHED_STARTHOOK=y +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +CONFIG_BINFMT_EXEPATH=y +CONFIG_PATH_INITIAL="/mnt/romfs" +# CONFIG_NXFLAT is not set +CONFIG_ELF=y +CONFIG_ELF_ALIGN_LOG2=2 +CONFIG_ELF_STACKSIZE=2048 +CONFIG_ELF_BUFFERSIZE=128 +CONFIG_ELF_BUFFERINCR=32 +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_BINFMT_CONSTRUCTORS=y +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +# CONFIG_HAVE_CXXINITIALIZE is not set +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +CONFIG_EXAMPLES_ELF=y +# CONFIG_EXAMPLES_ELF_LIBC is not set +CONFIG_EXAMPLES_ELF_DEVMINOR=0 +CONFIG_EXAMPLES_ELF_DEVPATH="/dev/ram0" +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/elf/setenv.sh b/configs/stm32f4discovery/elf/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..40e5d91455f5218805c468e9fbd72bf7c199744b --- /dev/null +++ b/configs/stm32f4discovery/elf/setenv.sh @@ -0,0 +1,84 @@ +#!/bin/bash +# configs/stm32f4discovery/elf/setenv.sh +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This the Cygwin path to the location where I built genromfs. If you use +# the buildroot toolchain, then genromfs can probably be found in TOOLCHAIN_DIR +export GENROMFS_PATH="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${GENROMFS_PATH}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f4discovery/include/board.h b/configs/stm32f4discovery/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..2ab3c99132fd1bebfb3a3704b8b78465aad49fc4 --- /dev/null +++ b/configs/stm32f4discovery/include/board.h @@ -0,0 +1,387 @@ +/************************************************************************************ + * configs/stm32f4discovery/include/board.h + * + * Copyright (C) 2012, 2014-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIG_STM32F4DISCOVERY_INCLUDE_BOARD_H +#define __CONFIG_STM32F4DISCOVERY_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# include +#endif + +#ifdef __KERNEL__ +# include "stm32_rcc.h" +# include "stm32_sdio.h" +# include "stm32.h" +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The STM32F4 Discovery board features a single 8MHz crystal. Space is provided + * for a 32kHz RTC backup crystal, but it is not stuffed. + * + * This is the canonical configuration: + * System Clock source : PLL (HSE) + * SYSCLK(Hz) : 168000000 Determined by PLL configuration + * HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE) + * AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE) + * APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1) + * APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2) + * HSE Frequency(Hz) : 8000000 (STM32_BOARD_XTAL) + * PLLM : 8 (STM32_PLLCFG_PLLM) + * PLLN : 336 (STM32_PLLCFG_PLLN) + * PLLP : 2 (STM32_PLLCFG_PLLP) + * PLLQ : 7 (STM32_PLLCFG_PLLQ) + * Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK + * Flash Latency(WS) : 5 + * Prefetch Buffer : OFF + * Instruction cache : ON + * Data cache : ON + * Require 48MHz for USB OTG FS, : Enabled + * SDIO and RNG clock + */ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC + * HSE - On-board crystal frequency is 8MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 8000000ul + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* Main PLL Configuration. + * + * PLL source is HSE + * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN + * = (8,000,000 / 8) * 336 + * = 336,000,000 + * SYSCLK = PLL_VCO / PLLP + * = 336,000,000 / 2 = 168,000,000 + * USB OTG FS, SDIO and RNG Clock + * = PLL_VCO / PLLQ + * = 48,000,000 + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7) + +#define STM32_SYSCLK_FREQUENCY 168000000ul + +/* AHB clock (HCLK) is SYSCLK (168MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) + +/* Timers driven from APB1 will be twice PCLK1 */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 */ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz + */ + +#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_LED3 2 +#define BOARD_LED4 3 +#define BOARD_NLEDS 4 + +#define BOARD_LED_GREEN BOARD_LED1 +#define BOARD_LED_ORANGE BOARD_LED2 +#define BOARD_LED_RED BOARD_LED3 +#define BOARD_LED_BLUE BOARD_LED4 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) +#define BOARD_LED4_BIT (1 << BOARD_LED4) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the + * stm32f4discovery. The following definitions describe how NuttX controls the LEDs: + */ + +#define LED_STARTED 0 /* LED1 */ +#define LED_HEAPALLOCATE 1 /* LED2 */ +#define LED_IRQSENABLED 2 /* LED1 + LED2 */ +#define LED_STACKCREATED 3 /* LED3 */ +#define LED_INIRQ 4 /* LED1 + LED3 */ +#define LED_SIGNAL 5 /* LED2 + LED3 */ +#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */ +#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */ + +/* Button definitions ***************************************************************/ +/* The STM32F4 Discovery supports one button: */ + +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* Alternate function pin selections ************************************************/ +/* CAN */ + +#ifndef CONFIG_STM32_FSMC +# define GPIO_CAN1_RX GPIO_CAN1_RX_3 +# define GPIO_CAN1_TX GPIO_CAN1_TX_3 +#endif + +#ifndef CONFIG_STM32_ETHMAC +# define GPIO_CAN2_RX GPIO_CAN2_RX_1 +# define GPIO_CAN2_TX GPIO_CAN2_TX_1 +#endif + +/* UART2: + * + * The STM32F4 Discovery has no on-board serial devices, but the console is + * brought out to PA2 (TX) and PA3 (RX) for connection to an external serial + * device. (See the README.txt file for other options) + * + * These pins selections, however, conflict with pin usage on the STM32F4DIS-BB. + */ + +#ifndef CONFIG_STM32F4DISBB +# define GPIO_USART2_RX GPIO_USART2_RX_1 +# define GPIO_USART2_TX GPIO_USART2_TX_1 +#endif + +/* UART6: + * + * The STM32F4DIS-BB base board provides RS-232 drivers and a DB9 connector + * for USART6. This is the preferred serial console for use with the STM32F4DIS-BB. + */ + +#define GPIO_USART6_RX GPIO_USART6_RX_1 +#define GPIO_USART6_TX GPIO_USART6_TX_1 + +/* PWM + * + * The STM32F4 Discovery has no real on-board PWM devices, but the board can be + * configured to output a pulse train using TIM4 CH2 on PD13. + */ + +#define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2 + +/* RGB LED + * + * R = TIM1 CH1 on PE9 | G = TIM2 CH2 on PA1 | B = TIM3 CH3 on PB0 + */ + +#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2 +#define GPIO_TIM2_CH2OUT GPIO_TIM2_CH2OUT_1 +#define GPIO_TIM3_CH3OUT GPIO_TIM3_CH3OUT_1 + +/* SPI - There is a MEMS device on SPI1 using these pins: */ + +#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 +#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 +#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 + +/* SPI2 - Test MAX31855 on SPI2 PB10 = SCK, PB14 = MISO */ + +#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1 +#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 +#define GPIO_SPI2_SCK GPIO_SPI2_SCK_1 + +/* I2C config to use with Nunchuk PB7 (SDA) and PB8 (SCL) */ + +#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2 +#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1 + +/* Timer Inputs/Outputs (see the README.txt file for options) */ + +#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_2 +#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1 + +#define GPIO_TIM8_CH1IN GPIO_TIM8_CH1IN_1 +#define GPIO_TIM8_CH2IN GPIO_TIM8_CH2IN_1 + +/* Ethernet *************************************************************************/ + +#if defined(CONFIG_STM32F4DISBB) && defined(CONFIG_STM32_ETHMAC) + /* RMII interface to the LAN8720 PHY */ + +# ifndef CONFIG_STM32_RMII +# error CONFIG_STM32_RMII must be defined +# endif + + /* Clocking is provided by an external 25Mhz XTAL */ + +# ifndef CONFIG_STM32_RMII_EXTCLK +# error CONFIG_STM32_RMII_EXTCLK must be defined +# endif + + /* Pin disambiguation */ + +# define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_1 +# define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_1 +# define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_1 +# define GPIO_ETH_PPS_OUT GPIO_ETH_PPS_OUT_1 + +#endif + +/* DMA Channl/Stream Selections *****************************************************/ +/* Stream selections are arbitrary for now but might become important in the future + * if we set aside more DMA channels/streams. + * + * SDIO DMA + * DMAMAP_SDIO_1 = Channel 4, Stream 3 + * DMAMAP_SDIO_2 = Channel 4, Stream 6 + */ + +#define DMAMAP_SDIO DMAMAP_SDIO_1 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIG_STM32F4DISCOVERY_INCLUDE_BOARD_H */ diff --git a/configs/stm32f4discovery/ipv6/Make.defs b/configs/stm32f4discovery/ipv6/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..59e8e4a50aa2b4f4d50669393184503314ceaa0c --- /dev/null +++ b/configs/stm32f4discovery/ipv6/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f4discovery/ipv6/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f4discovery/ipv6/defconfig b/configs/stm32f4discovery/ipv6/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..cb9ccd09092a6a23e183689c85222148eed16ef1 --- /dev/null +++ b/configs/stm32f4discovery/ipv6/defconfig @@ -0,0 +1,1439 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +CONFIG_STM32_SDIO=y +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USART6=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +CONFIG_STM32_CCMEXCLUDE=y +CONFIG_STM32_DMACAPABLE=y +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART6_RS485 is not set +# CONFIG_USART6_RXDMA is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set + +# +# SDIO Configuration +# +CONFIG_SDIO_DMAPRIO=0x00010000 +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=0 +# CONFIG_STM32_PHYINIT is not set +# CONFIG_STM32_MII is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=31 +CONFIG_STM32_PHYSR_ALTCONFIG=y +CONFIG_STM32_PHYSR_ALTMODE=0x001c +CONFIG_STM32_PHYSR_10HD=0x0004 +CONFIG_STM32_PHYSR_100HD=0x0008 +CONFIG_STM32_PHYSR_10FD=0x0014 +CONFIG_STM32_PHYSR_100FD=0x0018 +# CONFIG_STM32_ETH_PTP is not set +CONFIG_STM32_RMII=y +# CONFIG_STM32_RMII_MCO1 is not set +# CONFIG_STM32_RMII_MCO2 is not set +CONFIG_STM32_RMII_EXTCLK=y + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f4discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_STM32F4DISBB=y +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=9 +CONFIG_START_DAY=13 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_MMCSD_SPI is not set +CONFIG_ARCH_HAVE_SDIO=y +CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y +CONFIG_MMCSD_SDIO=y +CONFIG_SDIO_PREFLIGHT=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_SDIO_BLOCKSETUP is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +CONFIG_ETH0_PHY_LAN8720=y +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +CONFIG_ARCH_HAVE_USART6=y +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART6_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART6_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART6 Configuration +# +CONFIG_USART6_RXBUFSIZE=64 +CONFIG_USART6_TXBUFSIZE=64 +CONFIG_USART6_BAUD=115200 +CONFIG_USART6_BITS=8 +CONFIG_USART6_PARITY=0 +CONFIG_USART6_2STOP=0 +# CONFIG_USART6_IFLOWCONTROL is not set +# CONFIG_USART6_OFLOWCONTROL is not set +# CONFIG_USART6_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +# CONFIG_NET_IPv4 is not set +CONFIG_NET_IPv6=y +CONFIG_NET_IPv6_NCONF_ENTRIES=8 + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_SOLINGER=y + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMPv6 Networking Support +# +CONFIG_NET_ICMPv6=y +CONFIG_NET_ICMPv6_PING=y +CONFIG_NET_ICMPv6_NEIGHBOR=y +CONFIG_ICMPv6_NEIGHBOR_MAXTRIES=5 +CONFIG_ICMPv6_NEIGHBOR_DELAYMSEC=20 +# CONFIG_NET_ICMPv6_AUTOCONF is not set +# CONFIG_NET_ICMPv6_ROUTER is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=36 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="STM32F4-Discovery" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_NET is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +# CONFIG_NETDB_DNSCLIENT is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# Target IPv6 address +# +CONFIG_NSH_IPv6ADDR_1=0xfc00 +CONFIG_NSH_IPv6ADDR_2=0x0000 +CONFIG_NSH_IPv6ADDR_3=0x0000 +CONFIG_NSH_IPv6ADDR_4=0x0000 +CONFIG_NSH_IPv6ADDR_5=0x0000 +CONFIG_NSH_IPv6ADDR_6=0x0000 +CONFIG_NSH_IPv6ADDR_7=0x0000 +CONFIG_NSH_IPv6ADDR_8=0x0002 + +# +# Router IPv6 address +# +CONFIG_NSH_DRIPv6ADDR_1=0xfc00 +CONFIG_NSH_DRIPv6ADDR_2=0x0000 +CONFIG_NSH_DRIPv6ADDR_3=0x0000 +CONFIG_NSH_DRIPv6ADDR_4=0x0000 +CONFIG_NSH_DRIPv6ADDR_5=0x0000 +CONFIG_NSH_DRIPv6ADDR_6=0x0000 +CONFIG_NSH_DRIPv6ADDR_7=0x0000 +CONFIG_NSH_DRIPv6ADDR_8=0x0001 + +# +# IPv6 Network mask +# +CONFIG_NSH_IPv6NETMASK_1=0xffff +CONFIG_NSH_IPv6NETMASK_2=0xffff +CONFIG_NSH_IPv6NETMASK_3=0xffff +CONFIG_NSH_IPv6NETMASK_4=0xffff +CONFIG_NSH_IPv6NETMASK_5=0xffff +CONFIG_NSH_IPv6NETMASK_6=0xffff +CONFIG_NSH_IPv6NETMASK_7=0xffff +CONFIG_NSH_IPv6NETMASK_8=0xff80 +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/ipv6/setenv.sh b/configs/stm32f4discovery/ipv6/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..28b9db6ca34db508abbe62cd2888f2f62f31eed0 --- /dev/null +++ b/configs/stm32f4discovery/ipv6/setenv.sh @@ -0,0 +1,81 @@ +#!/bin/bash +# configs/stm32f4discovery/ipv6/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f4discovery/kernel/.gitignore b/configs/stm32f4discovery/kernel/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..7bacd5aee3e49e11d2753d091bd2c9b31c0b16b0 --- /dev/null +++ b/configs/stm32f4discovery/kernel/.gitignore @@ -0,0 +1,2 @@ +/nuttx_user.elf + diff --git a/configs/stm32f4discovery/kernel/Makefile b/configs/stm32f4discovery/kernel/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..b8b92451b8757fb0bf29edd0f35f31f419ddba2b --- /dev/null +++ b/configs/stm32f4discovery/kernel/Makefile @@ -0,0 +1,122 @@ +############################################################################ +# configs/stm32f4discovery/kernel/Makefile +# +# Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +# This is the directory for the board-specific header files + +BOARD_INCLUDE = $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)include + +# The entry point name (if none is provided in the .config file) + +CONFIG_USER_ENTRYPOINT ?= user_start +ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT)) + +# Get the paths to the libraries and the links script path in format that +# is appropriate for the host OS + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done} + USER_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}" + USER_LDSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld}" + USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}" + USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}" + USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}" +else + # Linux/Cygwin-native toolchain + USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS))) + USER_LDSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld + USER_LDSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld + USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex" + USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec" + USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" +endif + +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) +USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) +USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" + +# Source files + +CSRCS = stm32_userspace.c +COBJS = $(CSRCS:.c=$(OBJEXT)) +OBJS = $(COBJS) + +# Targets: + +all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map +.PHONY: nuttx_user.elf depend clean distclean + +$(COBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +# Create the nuttx_user.elf file containing all of the user-mode code + +nuttx_user.elf: $(OBJS) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) + +$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf + @echo "LD: nuttx_user.elf" + $(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf +ifeq ($(CONFIG_INTELHEX_BINARY),y) + @echo "CP: nuttx_user.hex" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE) +endif +ifeq ($(CONFIG_MOTOROLA_SREC),y) + @echo "CP: nuttx_user.srec" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE) +endif +ifeq ($(CONFIG_RAW_BINARY),y) + @echo "CP: nuttx_user.bin" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE) +endif + +$(TOPDIR)$(DELIM)User.map: nuttx_user.elf + @echo "MK: User.map" + $(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map + $(Q) $(CROSSDEV)size nuttx_user.elf + +.depend: + +depend: .depend + +clean: + $(call DELFILE, nuttx_user.elf) + $(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*") + $(call DELFILE, "$(TOPDIR)$(DELIM)User.map") + $(call CLEAN) + +distclean: clean diff --git a/configs/stm32f4discovery/kernel/stm32_userspace.c b/configs/stm32f4discovery/kernel/stm32_userspace.c new file mode 100644 index 0000000000000000000000000000000000000000..1dac94c6fce15d00d57b18c6a56d2f2d3f781c39 --- /dev/null +++ b/configs/stm32f4discovery/kernel/stm32_userspace.c @@ -0,0 +1,133 @@ +/**************************************************************************** + * configs/stm32f4discovery/kernel/stm32_userspace.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_NUTTX_USERSPACE +# error "CONFIG_NUTTX_USERSPACE not defined" +#endif + +#if CONFIG_NUTTX_USERSPACE != 0x08020000 +# error "CONFIG_NUTTX_USERSPACE must be 0x08020000 to match memory.ld" +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* These 'addresses' of these values are setup by the linker script. They are + * not actual uint32_t storage locations! They are only used meaningfully in the + * following way: + * + * - The linker script defines, for example, the symbol_sdata. + * - The declaration extern uint32_t _sdata; makes C happy. C will believe + * that the value _sdata is the address of a uint32_t variable _data (it is + * not!). + * - We can recover the linker value then by simply taking the address of + * of _data. like: uint32_t *pdata = &_sdata; + */ + +extern uint32_t _stext; /* Start of .text */ +extern uint32_t _etext; /* End_1 of .text + .rodata */ +extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */ +extern uint32_t _sdata; /* Start of .data */ +extern uint32_t _edata; /* End+1 of .data */ +extern uint32_t _sbss; /* Start of .bss */ +extern uint32_t _ebss; /* End+1 of .bss */ + +/* This is the user space entry point */ + +int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); + +const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +{ + /* General memory map */ + + .us_entrypoint = (main_t)CONFIG_USER_ENTRYPOINT, + .us_textstart = (uintptr_t)&_stext, + .us_textend = (uintptr_t)&_etext, + .us_datasource = (uintptr_t)&_eronly, + .us_datastart = (uintptr_t)&_sdata, + .us_dataend = (uintptr_t)&_edata, + .us_bssstart = (uintptr_t)&_sbss, + .us_bssend = (uintptr_t)&_ebss, + + /* Memory manager heap structure */ + + .us_heap = &g_mmheap, + + /* Task/thread startup routines */ + + .task_startup = task_startup, +#ifndef CONFIG_DISABLE_PTHREAD + .pthread_startup = pthread_startup, +#endif + + /* Signal handler trampoline */ + +#ifndef CONFIG_DISABLE_SIGNALS + .signal_handler = up_signal_handler, +#endif + + /* User-space work queue support (declared in include/nuttx/wqueue.h) */ + +#ifdef CONFIG_LIB_USRWORK + .work_usrstart = work_usrstart, +#endif +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */ diff --git a/configs/stm32f4discovery/kostest/Make.defs b/configs/stm32f4discovery/kostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..cdc6b370b8e0843cd9166139735e570dc3143367 --- /dev/null +++ b/configs/stm32f4discovery/kostest/Make.defs @@ -0,0 +1,124 @@ +############################################################################ +# configs/stm32f4discovery/kostest/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-m$(DELIM)Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}" + ARCHSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)kernel-space.ld}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld + ARCHSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)kernel-space.ld +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/stm32f4discovery/kostest/defconfig b/configs/stm32f4discovery/kostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b4f0d966edfd66abd29209b5ed2259a145740905 --- /dev/null +++ b/configs/stm32f4discovery/kostest/defconfig @@ -0,0 +1,1025 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_FLAT is not set +CONFIG_BUILD_PROTECTED=y +CONFIG_BUILD_2PASS=y +CONFIG_PASS1_TARGET="all" +CONFIG_PASS1_BUILDIR="configs/stm32f4discovery/kernel" +CONFIG_PASS1_OBJECT="" +CONFIG_NUTTX_USERSPACE=0x08020000 + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +CONFIG_ARM_MPU=y +CONFIG_ARM_MPU_NREGIONS=8 + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +CONFIG_ARCH_USE_MPU=y +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f4discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_STM32F4DISBB is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=22 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +CONFIG_LIB_SYSCALL=y +CONFIG_SYS_RESERVED=8 +CONFIG_SYS_NNEST=2 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_KERNEL_HEAP=y +CONFIG_MM_KERNEL_HEAPSIZE=8192 +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_USRWORK is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=2048 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +CONFIG_EXAMPLES_OSTEST_WAITRESULT=y +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/kostest/setenv.sh b/configs/stm32f4discovery/kostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..6571513b650d5df6205b333edbab0578bd5c94c6 --- /dev/null +++ b/configs/stm32f4discovery/kostest/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/stm32f4discovery/kostest/setenv.sh +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f4discovery/netnsh/Make.defs b/configs/stm32f4discovery/netnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..d229b8e7603ced04d056c71b60cede70c6c12c36 --- /dev/null +++ b/configs/stm32f4discovery/netnsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f4discovery/netnsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f4discovery/netnsh/defconfig b/configs/stm32f4discovery/netnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..13c5d36b55693d8920bfab8ebdc0167ef0cc682d --- /dev/null +++ b/configs/stm32f4discovery/netnsh/defconfig @@ -0,0 +1,1450 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_SDIO_DMA=y +# CONFIG_SDIO_WIDTH_D1_ONLY is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +CONFIG_STM32_DMA2=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +CONFIG_STM32_SDIO=y +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +CONFIG_STM32_USART6=y +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +CONFIG_STM32_CCMEXCLUDE=y +CONFIG_STM32_DMACAPABLE=y +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART6_RS485 is not set +# CONFIG_USART6_RXDMA is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set + +# +# SDIO Configuration +# +CONFIG_SDIO_DMAPRIO=0x00010000 +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=0 +# CONFIG_STM32_PHYINIT is not set +# CONFIG_STM32_MII is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=31 +CONFIG_STM32_PHYSR_ALTCONFIG=y +CONFIG_STM32_PHYSR_ALTMODE=0x001c +CONFIG_STM32_PHYSR_10HD=0x0004 +CONFIG_STM32_PHYSR_100HD=0x0008 +CONFIG_STM32_PHYSR_10FD=0x0014 +CONFIG_STM32_PHYSR_100FD=0x0018 +# CONFIG_STM32_ETH_PTP is not set +CONFIG_STM32_RMII=y +# CONFIG_STM32_RMII_MCO1 is not set +# CONFIG_STM32_RMII_MCO2 is not set +CONFIG_STM32_RMII_EXTCLK=y + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f4discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_STM32F4DISBB=y +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_RESET=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=9 +CONFIG_START_DAY=13 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +# CONFIG_MMCSD_SPI is not set +CONFIG_ARCH_HAVE_SDIO=y +CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y +CONFIG_MMCSD_SDIO=y +CONFIG_SDIO_PREFLIGHT=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_SDIO_BLOCKSETUP is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +CONFIG_ETH0_PHY_LAN8720=y +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +CONFIG_ARCH_HAVE_USART6=y +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART6_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART6_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART6 Configuration +# +CONFIG_USART6_RXBUFSIZE=64 +CONFIG_USART6_TXBUFSIZE=64 +CONFIG_USART6_BAUD=115200 +CONFIG_USART6_BITS=8 +CONFIG_USART6_PARITY=0 +CONFIG_USART6_2STOP=0 +# CONFIG_USART6_IFLOWCONTROL is not set +# CONFIG_USART6_OFLOWCONTROL is not set +# CONFIG_USART6_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +CONFIG_NETDEV_PHY_IOCTL=y + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_SOLINGER=y + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=36 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="STM32F4-Discovery" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_NET is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_REBOOT is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +CONFIG_NSH_DISABLE_SHUTDOWN=y +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT_THREAD=y +CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 +CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_MDIO is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/netnsh/setenv.sh b/configs/stm32f4discovery/netnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..51a6d2a9615d55bf4c2acf28df85293d37582286 --- /dev/null +++ b/configs/stm32f4discovery/netnsh/setenv.sh @@ -0,0 +1,81 @@ +#!/bin/bash +# configs/stm32f4discovery/netnsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f4discovery/nsh/Make.defs b/configs/stm32f4discovery/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..bf06630d058d44a91a9c4d678597554eb7afd89f --- /dev/null +++ b/configs/stm32f4discovery/nsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f4discovery/nsh/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f4discovery/nsh/defconfig b/configs/stm32f4discovery/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..a7a485a6d482b3d20dcaf29c5c550b21adbda75f --- /dev/null +++ b/configs/stm32f4discovery/nsh/defconfig @@ -0,0 +1,1158 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +CONFIG_STM32_OTGFS=y +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f4discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_STM32F4DISBB is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/nsh/setenv.sh b/configs/stm32f4discovery/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..d67e6fdc7df5d7baae84ec95846aff8859a19cde --- /dev/null +++ b/configs/stm32f4discovery/nsh/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/stm32f4discovery/nsh/setenv.sh +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f4discovery/nxlines/Make.defs b/configs/stm32f4discovery/nxlines/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..5b6ee054c44cbfc813a09507fb0866048c0a2edc --- /dev/null +++ b/configs/stm32f4discovery/nxlines/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f4discovery/nxlines/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f4discovery/nxlines/defconfig b/configs/stm32f4discovery/nxlines/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..32ee8e04f231987e65d4130429c72cc2fd8ddbdd --- /dev/null +++ b/configs/stm32f4discovery/nxlines/defconfig @@ -0,0 +1,1290 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +CONFIG_STM32_FSMC=y +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_FSMC_SRAM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f4discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_STM32F4DISBB is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxlines_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=1 +CONFIG_LCD_MAXPOWER=255 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +# CONFIG_LCD_UG2864AMBAG01 is not set +CONFIG_LCD_SSD1289=y +CONFIG_SSD1289_PROFILE1=y +# CONFIG_SSD1289_PROFILE2 is not set +# CONFIG_SSD1289_PROFILE3 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +CONFIG_NX_DISABLE_1BPP=y +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +# CONFIG_NX_DISABLE_16BPP is not set +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +# CONFIG_NX_PACKEDMSFIRST is not set + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0x5cb7 +CONFIG_NXTK_BORDERCOLOR2=0x21c9 +CONFIG_NXTK_BORDERCOLOR3=0xffdf +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +CONFIG_NXFONT_SANS22X29B=y +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +CONFIG_EXAMPLES_NXLINES=y +CONFIG_EXAMPLES_NXLINES_VPLANE=0 +CONFIG_EXAMPLES_NXLINES_DEVNO=0 +# CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x0320 +CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16 +CONFIG_EXAMPLES_NXLINES_LINECOLOR=0xffe0 +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4 +CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xffe0 +CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0xf7bb +CONFIG_EXAMPLES_NXLINES_BPP=16 +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# +# CONFIG_NXWIDGETS is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/nxlines/setenv.sh b/configs/stm32f4discovery/nxlines/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..5c15732e96bd723707ddd529b58514acb2e932f0 --- /dev/null +++ b/configs/stm32f4discovery/nxlines/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/stm32f4discovery/nxlines/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f4discovery/pm/Make.defs b/configs/stm32f4discovery/pm/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..61081de08a27b1c7c1d660eda371f9e2ff19173f --- /dev/null +++ b/configs/stm32f4discovery/pm/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f4discovery/pm/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f4discovery/pm/defconfig b/configs/stm32f4discovery/pm/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..2d646c898628f1d34d56fd2175b2e813a04b0b93 --- /dev/null +++ b/configs/stm32f4discovery/pm/defconfig @@ -0,0 +1,1165 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +CONFIG_STM32_OTGFS=y +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +CONFIG_STM32_TIM1=y +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_PWM is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_MAGIC_REG=0 +CONFIG_RTC_MAGIC=0xfacefeee +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +CONFIG_ARCH_IDLE_CUSTOM=y +CONFIG_ARCH_CUSTOM_PMINIT=y +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f4discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +# CONFIG_ARCH_LEDS is not set +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_PM_ALARM_SEC=15 +CONFIG_PM_ALARM_NSEC=0 +# CONFIG_PM_SLEEP_WAKEUP is not set +CONFIG_PM_SLEEP_WAKEUP_SEC=10 +CONFIG_PM_SLEEP_WAKEUP_NSEC=0 +CONFIG_PM_BUTTONS=y +CONFIG_PM_BUTTON_ACTIVITY=10 +# CONFIG_STM32F4DISBB is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +CONFIG_RTC_ALARM=y +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +CONFIG_PM=y +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LEDS is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/pm/setenv.sh b/configs/stm32f4discovery/pm/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..815d58bf7d6e258a1a7113339c9ec6f87d1fc39d --- /dev/null +++ b/configs/stm32f4discovery/pm/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/stm32f4discovery/pm/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f4discovery/posix_spawn/Make.defs b/configs/stm32f4discovery/posix_spawn/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..1d45cdd8d94a60cd8016d56f03046f267e8c60f0 --- /dev/null +++ b/configs/stm32f4discovery/posix_spawn/Make.defs @@ -0,0 +1,132 @@ +############################################################################ +# configs/stm32f4discovery/posix_spawn/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +# File extensions + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +# Linker flags + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +# Host tools + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f4discovery/posix_spawn/defconfig b/configs/stm32f4discovery/posix_spawn/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..dc2c60aacb7ce12249c8f8c02fb2bde6a70c9109 --- /dev/null +++ b/configs/stm32f4discovery/posix_spawn/defconfig @@ -0,0 +1,1046 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_TARGET2_PREL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +CONFIG_STM32_CCMEXCLUDE=y +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f4discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_STM32F4DISBB is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="spawn_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_SCHED_STARTHOOK=y +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +CONFIG_BINFMT_EXEPATH=y +CONFIG_PATH_INITIAL="/mnt/romfs" +# CONFIG_NXFLAT is not set +CONFIG_ELF=y +CONFIG_ELF_ALIGN_LOG2=2 +CONFIG_ELF_STACKSIZE=2048 +CONFIG_ELF_BUFFERSIZE=128 +CONFIG_ELF_BUFFERINCR=32 +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_BINFMT_CONSTRUCTORS=y +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +CONFIG_LIBC_EXECFUNCS=y +CONFIG_EXECFUNCS_HAVE_SYMTAB=y +CONFIG_EXECFUNCS_SYMTAB="exports" +CONFIG_EXECFUNCS_NSYMBOLS=10 +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +# CONFIG_HAVE_CXXINITIALIZE is not set +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +CONFIG_EXAMPLES_POSIXSPAWN=y +CONFIG_EXAMPLES_POSIXSPAWN_DEVMINOR=0 +CONFIG_EXAMPLES_POSIXSPAWN_DEVPATH="/dev/ram0" +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/posix_spawn/setenv.sh b/configs/stm32f4discovery/posix_spawn/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..5253e558232158974ba17ae509cab2954ffe3d82 --- /dev/null +++ b/configs/stm32f4discovery/posix_spawn/setenv.sh @@ -0,0 +1,84 @@ +#!/bin/bash +# configs/stm32f4discovery/posix_spawn/setenv.sh +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This the Cygwin path to the location where I built genromfs. If you use +# the buildroot toolchain, then genromfs can probably be found in TOOLCHAIN_DIR +export GENROMFS_PATH="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${GENROMFS_PATH}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f4discovery/rgbled/Make.defs b/configs/stm32f4discovery/rgbled/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..bf06630d058d44a91a9c4d678597554eb7afd89f --- /dev/null +++ b/configs/stm32f4discovery/rgbled/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f4discovery/nsh/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f4discovery/rgbled/defconfig b/configs/stm32f4discovery/rgbled/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..91e1e9dd0f549b863a602aa2130ae364bec0fcbc --- /dev/null +++ b/configs/stm32f4discovery/rgbled/defconfig @@ -0,0 +1,1196 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_HEAP is not set +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_PWM is not set +# CONFIG_DEBUG_SPI is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set +# CONFIG_DEBUG_HARDFAULT is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +CONFIG_STM32_OTGFS=y +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +CONFIG_STM32_TIM1=y +CONFIG_STM32_TIM2=y +CONFIG_STM32_TIM3=y +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +CONFIG_STM32_TIM1_PWM=y +CONFIG_STM32_TIM1_MODE=0 +CONFIG_STM32_TIM1_CHANNEL=1 +CONFIG_STM32_TIM1_CHMODE=0 +CONFIG_STM32_TIM2_PWM=y +CONFIG_STM32_TIM2_MODE=0 +CONFIG_STM32_TIM2_CHANNEL=2 +CONFIG_STM32_TIM2_CHMODE=0 +CONFIG_STM32_TIM3_PWM=y +CONFIG_STM32_TIM3_MODE=0 +CONFIG_STM32_TIM3_CHANNEL=3 +CONFIG_STM32_TIM3_CHMODE=0 +# CONFIG_STM32_PWM_MULTICHAN is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f4discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_STM32F4DISBB is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="rgbled_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +CONFIG_ARCH_HAVE_PWM_PULSECOUNT=y +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +CONFIG_PWM=y +# CONFIG_PWM_PULSECOUNT is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +CONFIG_RGBLED=y +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +CONFIG_EXAMPLES_RGBLED=y +CONFIG_EXAMPLES_RGBLED_DEVNAME="/dev/rgbled0" +CONFIG_EXAMPLES_RGBLED_PRIORITY=100 +CONFIG_EXAMPLES_RGBLED_STACKSIZE=2048 +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/rgbled/setenv.sh b/configs/stm32f4discovery/rgbled/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..d67e6fdc7df5d7baae84ec95846aff8859a19cde --- /dev/null +++ b/configs/stm32f4discovery/rgbled/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/stm32f4discovery/nsh/setenv.sh +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f4discovery/scripts/gnu-elf.ld b/configs/stm32f4discovery/scripts/gnu-elf.ld new file mode 100644 index 0000000000000000000000000000000000000000..2e9357ec495b92e610648e15c71dc8f4bfbbe50f --- /dev/null +++ b/configs/stm32f4discovery/scripts/gnu-elf.ld @@ -0,0 +1,139 @@ +/**************************************************************************** + * configs/stm32f4discovery/scripts/gnu-elf.ld + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +SECTIONS +{ + .text 0x00000000 : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .ARM.extab : + { + *(.ARM.extab*) + } + + .ARM.exidx : + { + *(.ARM.exidx*) + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + *(.ctors) /* Old ABI: Unallocated */ + *(.init_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .dtors : + { + _sdtors = . ; + *(.dtors) /* Old ABI: Unallocated */ + *(.fini_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = . ; + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32f4discovery/scripts/kernel-space.ld b/configs/stm32f4discovery/scripts/kernel-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..3feb651e6e6dd6bd16721519d4d65680d3697e13 --- /dev/null +++ b/configs/stm32f4discovery/scripts/kernel-space.ld @@ -0,0 +1,109 @@ +/**************************************************************************** + * configs/stm32f4discovery/scripts/kernel-space.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > kflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > kflash + + .ARM.extab : { + *(.ARM.extab*) + } > kflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > kflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > ksram AT > kflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > ksram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32f4discovery/scripts/ld.script b/configs/stm32f4discovery/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..edc4a709106a405d8b598307126035281c8fad82 --- /dev/null +++ b/configs/stm32f4discovery/scripts/ld.script @@ -0,0 +1,122 @@ +/**************************************************************************** + * configs/stm32f4discovery/scripts/ld.script + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F407VG has 1024Kb of FLASH beginning at address 0x0800:0000 and + * 192Kb of SRAM. SRAM is split up into three blocks: + * + * 1) 112Kb of SRAM beginning at address 0x2000:0000 + * 2) 16Kb of SRAM beginning at address 0x2001:c000 + * 3) 64Kb of CCM SRAM beginning at address 0x1000:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32f4discovery/scripts/memory.ld b/configs/stm32f4discovery/scripts/memory.ld new file mode 100644 index 0000000000000000000000000000000000000000..3a7480d87148cdc3a38a4ca5faf2e1eb002c278e --- /dev/null +++ b/configs/stm32f4discovery/scripts/memory.ld @@ -0,0 +1,100 @@ +/**************************************************************************** + * configs/stm32f4discovery/scripts/memory.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F407VG has 1024Kb of FLASH beginning at address 0x0800:0000 and + * 192Kb of SRAM. SRAM is split up into three blocks: + * + * 1) 112KB of SRAM beginning at address 0x2000:0000 + * 2) 16KB of SRAM beginning at address 0x2001:c000 + * 3) 64KB of CCM SRAM beginning at address 0x1000:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + * + * For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of + * FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which + * should fit into 64KB and, of course, can be optimized as needed (See + * also configs/stm32f4discovery/scripts/kernel-space.ld). Allowing the + * additional does permit addition debug instrumentation to be added to the + * kernel space without overflowing the partition. + * + * Alignment of the user space FLASH partition is also a critical factor: + * The user space FLASH partition will be spanned with a single region of + * size 2**n bytes. The alignment of the user-space region must be the same. + * As a consequence, as the user-space increases in size, the alignmment + * requirement also increases. + * + * This alignment requirement means that the largest user space FLASH region + * you can have will be 512KB at it would have to be positioned at + * 0x08800000. If you change this address, don't forget to change the + * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify + * the check in kernel/userspace.c. + * + * For the same reasons, the maximum size of the SRAM mapping is limited to + * 4KB. Both of these alignment limitations could be reduced by using + * multiple regions to map the FLASH/SDRAM range or perhaps with some + * clever use of subregions. + * + * A detailed memory map for the 112KB SRAM region is as follows: + * + * 0x20000 0000: Kernel .data region. Typical size: 0.1KB + * ------- ---- Kernel .bss region. Typical size: 1.8KB + * 0x20000 0800: Kernel IDLE thread stack (approximate). Size is + * determined by CONFIG_IDLETHREAD_STACKSIZE and + * adjustments for alignment. Typical is 1KB. + * ------- ---- Padded to 4KB + * 0x20000 1000: User .data region. Size is variable. + * ------- ---- User .bss region Size is variable. + * 0x20000 2000: Beginning of kernel heap. Size determined by + * CONFIG_MM_KERNEL_HEAPSIZE. + * ------- ---- Beginning of user heap. Can vary with other settings. + * 0x20001 c000: End+1 of CPU RAM + */ + +MEMORY +{ + /* 1024Kb FLASH */ + + kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K + uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K + xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K + + /* 112Kb of contiguous SRAM */ + + ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 4K + usram (rwx) : ORIGIN = 0x20001000, LENGTH = 4K + xsram (rwx) : ORIGIN = 0x20002000, LENGTH = 104K +} diff --git a/configs/stm32f4discovery/scripts/user-space.ld b/configs/stm32f4discovery/scripts/user-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..4002d8bbccf1ad99b983e805c8fb9d8c5ed6dbd4 --- /dev/null +++ b/configs/stm32f4discovery/scripts/user-space.ld @@ -0,0 +1,111 @@ +/**************************************************************************** + * configs/stm32f4discovery/scripts/user-space.ld + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +SECTIONS +{ + .userspace : { + *(.userspace) + } > uflash + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > uflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > uflash + + .ARM.extab : { + *(.ARM.extab*) + } > uflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > uflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > usram AT > uflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > usram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32f4discovery/src/.gitignore b/configs/stm32f4discovery/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/stm32f4discovery/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/stm32f4discovery/src/Makefile b/configs/stm32f4discovery/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..7e3b47a826b9565aedaefed8b3139d8f3e681f63 --- /dev/null +++ b/configs/stm32f4discovery/src/Makefile @@ -0,0 +1,143 @@ +############################################################################ +# configs/stm32f4discovery/src/Makefile +# +# Copyright (C) 2011-2013, 2015-2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_bringup.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_STM32_OTGFS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_BMP180),y) +CSRCS += stm32_bmp180.c +endif + +ifeq ($(CONFIG_MAX31855),y) +CSRCS += stm32_max31855.c +endif + +ifeq ($(CONFIG_MAX6675),y) +CSRCS += stm32_max6675.c +endif + +ifeq ($(CONFIG_PCA9635PW),y) +CSRCS += stm32_pca9635.c +endif + +ifeq ($(CONFIG_STM32_SDIO),y) +CSRCS += stm32_sdio.c +endif + +ifeq ($(CONFIG_STM32_ETHMAC),y) +CSRCS += stm32_ethernet.c +endif + +ifeq ($(CONFIG_RGBLED),y) +CSRCS += stm32_rgbled.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += stm32_pwm.c +endif + +ifeq ($(CONFIG_QENCODER),y) +CSRCS += stm32_qencoder.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += stm32_watchdog.c +endif + +ifeq ($(CONFIG_NSH_LIBRARY),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_ARCH_CUSTOM_PMINIT),y) +CSRCS += stm32_pm.c +endif + +ifeq ($(CONFIG_PM_BUTTONS),y) +CSRCS += stm32_pmbuttons.c +endif + +ifeq ($(CONFIG_ZEROCROSS),y) +CSRCS += stm32_zerocross.c +endif + +ifeq ($(CONFIG_ARCH_IDLE_CUSTOM),y) +CSRCS += stm32_idle.c +endif + +ifeq ($(CONFIG_STM32_FSMC),y) +CSRCS += stm32_extmem.c + +ifeq ($(CONFIG_LCD_SSD1289),y) +CSRCS += stm32_ssd1289.c +endif +endif + +ifeq ($(CONFIG_LCD_SSD1351),y) +CSRCS += stm32_ssd1351.c +endif + +ifeq ($(CONFIG_LCD_UG2864AMBAG01),y) +CSRCS += stm32_ug2864ambag01.c +endif + +ifeq ($(CONFIG_LCD_UG2864HSWEG01),y) +CSRCS += stm32_ug2864hsweg01.c +endif + +ifeq ($(CONFIG_TIMER),y) +CSRCS += stm32_timer.c +endif + +ifeq ($(CONFIG_BOARDCTL_UNIQUEID),y) +CSRCS += stm32_uid.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32f4discovery/src/stm32_appinit.c b/configs/stm32f4discovery/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..4ce0e55bdb0eca93c66a187c7460ff86d980a9c4 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_appinit.c @@ -0,0 +1,82 @@ +/**************************************************************************** + * config/stm32f4discovery/src/stm32_appinit.c + * + * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "stm32f4discovery.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef OK +# define OK 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture-specific initialization (if this was not already + * done by board_initialize(); + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef CONFIG_BMP180 + stm32_bmp180initialize("/dev/press0"); +#endif + +#ifdef CONFIG_BOARD_INITIALIZE + /* Board initialization already performed by board_initialize() */ + + return OK; +#else + /* Perform board-specific initialization */ + + return stm32_bringup(); +#endif +} diff --git a/configs/stm32f4discovery/src/stm32_autoleds.c b/configs/stm32f4discovery/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..f4dd057b6688dce2a42b15dbe9d0135fa1e33c43 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_autoleds.c @@ -0,0 +1,258 @@ +/**************************************************************************** + * configs/stm32f4discovery/src/stm32_autoleds.c + * + * Copyright (C) 2011-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "stm32f4discovery.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* The following definitions map the encoded LED setting to GPIO settings */ + +#define STM32F4_LED1 (1 << 0) +#define STM32F4_LED2 (1 << 1) +#define STM32F4_LED3 (1 << 2) +#define STM32F4_LED4 (1 << 3) + +#define ON_SETBITS_SHIFT (0) +#define ON_CLRBITS_SHIFT (4) +#define OFF_SETBITS_SHIFT (8) +#define OFF_CLRBITS_SHIFT (12) + +#define ON_BITS(v) ((v) & 0xff) +#define OFF_BITS(v) (((v) >> 8) & 0x0ff) +#define SETBITS(b) ((b) & 0x0f) +#define CLRBITS(b) (((b) >> 4) & 0x0f) + +#define ON_SETBITS(v) (SETBITS(ON_BITS(v)) +#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v)) +#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v)) +#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v)) + +#define LED_STARTED_ON_SETBITS ((STM32F4_LED1) << ON_SETBITS_SHIFT) +#define LED_STARTED_ON_CLRBITS ((STM32F4_LED2|STM32F4_LED3|STM32F4_LED4) << ON_CLRBITS_SHIFT) +#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT) +#define LED_STARTED_OFF_CLRBITS ((STM32F4_LED1|STM32F4_LED2|STM32F4_LED3|STM32F4_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_HEAPALLOCATE_ON_SETBITS ((STM32F4_LED2) << ON_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_ON_CLRBITS ((STM32F4_LED1|STM32F4_LED3|STM32F4_LED4) << ON_CLRBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_SETBITS ((STM32F4_LED1) << OFF_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_CLRBITS ((STM32F4_LED2|STM32F4_LED3|STM32F4_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_IRQSENABLED_ON_SETBITS ((STM32F4_LED1|STM32F4_LED2) << ON_SETBITS_SHIFT) +#define LED_IRQSENABLED_ON_CLRBITS ((STM32F4_LED3|STM32F4_LED4) << ON_CLRBITS_SHIFT) +#define LED_IRQSENABLED_OFF_SETBITS ((STM32F4_LED2) << OFF_SETBITS_SHIFT) +#define LED_IRQSENABLED_OFF_CLRBITS ((STM32F4_LED1|STM32F4_LED3|STM32F4_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_STACKCREATED_ON_SETBITS ((STM32F4_LED3) << ON_SETBITS_SHIFT) +#define LED_STACKCREATED_ON_CLRBITS ((STM32F4_LED1|STM32F4_LED2|STM32F4_LED4) << ON_CLRBITS_SHIFT) +#define LED_STACKCREATED_OFF_SETBITS ((STM32F4_LED1|STM32F4_LED2) << OFF_SETBITS_SHIFT) +#define LED_STACKCREATED_OFF_CLRBITS ((STM32F4_LED3|STM32F4_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_INIRQ_ON_SETBITS ((STM32F4_LED1) << ON_SETBITS_SHIFT) +#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_INIRQ_OFF_CLRBITS ((STM32F4_LED1) << OFF_CLRBITS_SHIFT) + +#define LED_SIGNAL_ON_SETBITS ((STM32F4_LED2) << ON_SETBITS_SHIFT) +#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_SIGNAL_OFF_CLRBITS ((STM32F4_LED2) << OFF_CLRBITS_SHIFT) + +#define LED_ASSERTION_ON_SETBITS ((STM32F4_LED4) << ON_SETBITS_SHIFT) +#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_ASSERTION_OFF_CLRBITS ((STM32F4_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_PANIC_ON_SETBITS ((STM32F4_LED4) << ON_SETBITS_SHIFT) +#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_PANIC_OFF_CLRBITS ((STM32F4_LED4) << OFF_CLRBITS_SHIFT) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint16_t g_ledbits[8] = +{ + (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | + LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS), + + (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS | + LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS), + + (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS | + LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS), + + (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS | + LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS), + + (LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS | + LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS), + + (LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS | + LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS), + + (LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS | + LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS), + + (LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS | + LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS) +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static inline void led_clrbits(unsigned int clrbits) +{ + if ((clrbits & STM32F4_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, false); + } + + if ((clrbits & STM32F4_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, false); + } + + if ((clrbits & STM32F4_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, false); + } + + if ((clrbits & STM32F4_LED4) != 0) + { + stm32_gpiowrite(GPIO_LED4, false); + } +} + +static inline void led_setbits(unsigned int setbits) +{ + if ((setbits & STM32F4_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, true); + } + + if ((setbits & STM32F4_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, true); + } + + if ((setbits & STM32F4_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, true); + } + + if ((setbits & STM32F4_LED4) != 0) + { + stm32_gpiowrite(GPIO_LED4, true); + } +} + +static void led_setonoff(unsigned int bits) +{ + led_clrbits(CLRBITS(bits)); + led_setbits(SETBITS(bits)); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_setonoff(ON_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_setonoff(OFF_BITS(g_ledbits[led])); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/stm32f4discovery/src/stm32_bmp180.c b/configs/stm32f4discovery/src/stm32_bmp180.c new file mode 100644 index 0000000000000000000000000000000000000000..5f6aa85ac459b5843d6bcdbe60ea3c60a7faa1eb --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_bmp180.c @@ -0,0 +1,105 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_bmp180.c + * + * Copyright (C) 2015 Alan Carvalho de Assis. All rights reserved. + * Author: Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32.h" +#include "stm32_i2c.h" +#include "stm32f4discovery.h" + +#if defined(CONFIG_I2C) && defined(CONFIG_BMP180) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define MPL115A_I2C_PORTNO 1 /* On I2C1 */ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_bmp180initialize + * + * Description: + * Initialize and register the MPL115A Pressure Sensor driver. + * + * Input parameters: + * devpath - The full path to the driver to register. E.g., "/dev/press0" + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ************************************************************************************/ + +int stm32_bmp180initialize(FAR const char *devpath) +{ + FAR struct i2c_master_s *i2c; + int ret; + + sndbg("Initializing BMP180!\n"); + + /* Initialize I2C */ + + i2c = stm32_i2cbus_initialize(BMP180_I2C_PORTNO); + + if (!i2c) + { + return -ENODEV; + } + + /* Then register the barometer sensor */ + + ret = bmp180_register(devpath, i2c); + if (ret < 0) + { + sndbg("Error registering BM180\n"); + } + + return ret; +} + +#endif /* CONFIG_I2C && CONFIG_MPL115A && CONFIG_STM32_I2C1 */ diff --git a/configs/stm32f4discovery/src/stm32_boot.c b/configs/stm32f4discovery/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..888317b1ceeb5a7ee45872114651934482361b40 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_boot.c @@ -0,0 +1,143 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_boot.c + * + * Copyright (C) 2011-2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "stm32f4discovery.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + +#ifdef CONFIG_STM32_OTGFS + /* Initialize USB if the 1) OTG FS controller is in the configuration and 2) + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. Presumably either CONFIG_USBDEV or CONFIG_USBHOST is also + * selected. + */ + + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif + +#ifdef HAVE_NETMONITOR + /* Configure board resources to support networking. */ + + if (stm32_netinitialize) + { + stm32_netinitialize(); + } +#endif + +#ifdef CONFIG_CANUTILS_UAVCAN + (void)stm32_configgpio(GPIO_CAN1_RX); + (void)stm32_configgpio(GPIO_CAN1_TX); +# if CONFIG_UAVCAN_STM32_NUM_IFACES > 1 + (void)stm32_configgpio(GPIO_CAN2_RX); + (void)stm32_configgpio(GPIO_CAN2_TX); +# endif +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_initialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform board-specific initialization */ + + (void)stm32_bringup(); +} +#endif diff --git a/configs/stm32f4discovery/src/stm32_bringup.c b/configs/stm32f4discovery/src/stm32_bringup.c new file mode 100644 index 0000000000000000000000000000000000000000..856307b5c818994a2c0941cc981cf290670f01a1 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_bringup.c @@ -0,0 +1,212 @@ +/**************************************************************************** + * config/stm32f4discovery/src/stm32_bringup.c + * + * Copyright (C) 2012, 2014-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#include + +#include "stm32.h" + +#ifdef CONFIG_STM32_OTGFS +# include "stm32_usbhost.h" +#endif + +#include "stm32f4discovery.h" + +/* Conditional logic in stm32f4discover.h will determine if certain features + * are supported. Tests for these features need to be made after including + * stm32f4discovery.h. + */ + +#ifdef HAVE_RTC_DRIVER +# include +# include "stm32_rtc.h" +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_bringup + * + * Description: + * Perform architecture-specific initialization + * + * CONFIG_BOARD_INITIALIZE=y : + * Called from board_initialize(). + * + * CONFIG_BOARD_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + ****************************************************************************/ + +int stm32_bringup(void) +{ +#ifdef HAVE_RTC_DRIVER + FAR struct rtc_lowerhalf_s *lower; +#endif + int ret = OK; + +#ifdef CONFIG_ZEROCROSS + /* Configure the zero-crossing driver */ + + stm32_zerocross_initialize(); +#endif + +#ifdef CONFIG_RGBLED + /* Configure the RGB LED driver */ + + stm32_rgbled_setup(); +#endif + +#if defined(CONFIG_PCA9635PW) + /* Initialize the PCA9635 chip */ + + ret = stm32_pca9635_initialize(); + if (ret < 0) + { + sdbg("ERROR: stm32_pca9635_initialize failed: %d\n", ret); + } +#endif + +#ifdef HAVE_SDIO + /* Initialize the SDIO block driver */ + + ret = stm32_sdio_initialize(); + if (ret != OK) + { + fdbg("ERROR: Failed to initialize MMC/SD driver: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_USBHOST + /* Initialize USB host operation. stm32_usbhost_initialize() starts a thread + * will monitor for USB connection and disconnection events. + */ + + ret = stm32_usbhost_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to initialize USB host: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + if (ret != OK) + { + udbg("ERROR: Failed to start USB monitor: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_RTC_DRIVER + /* Instantiate the STM32 lower-half RTC driver */ + + lower = stm32_rtc_lowerhalf(); + if (!lower) + { + sdbg("ERROR: Failed to instantiate the RTC lower-half driver\n"); + return -ENOMEM; + } + else + { + /* Bind the lower half driver and register the combined RTC driver + * as /dev/rtc0 + */ + + ret = rtc_initialize(0, lower); + if (ret < 0) + { + sdbg("ERROR: Failed to bind/register the RTC driver: %d\n", ret); + return ret; + } + } +#endif + +#ifdef HAVE_ELF + /* Initialize the ELF binary loader */ + + ret = elf_initialize(); + if (ret < 0) + { + sdbg("ERROR: Initialization of the ELF loader failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_MAX31855 + ret = stm32_max31855initialize("/dev/temp0"); +#endif + +#ifdef CONFIG_MAX6675 + ret = stm32_max6675initialize("/dev/temp0"); +#endif + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + sdbg("ERROR: Failed to mount procfs at %s: %d\n", + STM32_PROCFS_MOUNTPOINT, ret); + } +#endif + + return ret; +} diff --git a/configs/stm32f4discovery/src/stm32_buttons.c b/configs/stm32f4discovery/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..b068e03dad2b85595628ad91c4e6c24a7e54b9cc --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_buttons.c @@ -0,0 +1,168 @@ +/**************************************************************************** + * configs/stm32f4discovery/src/stm32_buttons.c + * + * Copyright (C) 2011-2012, 2014=2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "stm32f4discovery.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* Pin configuration for each STM32F4 Discovery button. This array is indexed by + * the BUTTON_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_USER +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed. + */ + + bool released = stm32_gpioread(g_buttons[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/stm32f4discovery/src/stm32_ethernet.c b/configs/stm32f4discovery/src/stm32_ethernet.c new file mode 100644 index 0000000000000000000000000000000000000000..1d0d97d48ff2ac1a110cd71a3453c85e22088283 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_ethernet.c @@ -0,0 +1,250 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_ethernet.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/* Force verbose debug on in this file only to support unit-level testing. */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# define CONFIG_DEBUG_VERBOSE 1 +# undef CONFIG_DEBUG_NET +# define CONFIG_DEBUG_NET 1 +#endif + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm32_eth.h" + +#include "stm32f4discovery.h" + +#if defined(CONFIG_STM32F4DISBB) && defined(CONFIG_STM32_ETHMAC) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define STM32_ETHMAC_DEVNAME "eth0" + +#define AT24XX_MACADDR_OFFSET 0x9a + +/* Debug ********************************************************************/ +/* Extra, in-depth debug output that is only available if + * CONFIG_NETDEV_PHY_DEBUG us defined. + */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# define phydbg dbg +# define phylldbg lldbg +#else +# define phydbg(x...) +# define phylldbg(x...) +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef HAVE_NETMONITOR +static xcpt_t g_ethmac_handler; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_emac0_phy_enable + ************************************************************************************/ + +#ifdef HAVE_NETMONITOR +static void stm32_emac0_phy_enable(bool enable) +{ + phydbg("enable=%d\n", enable); + if (enable && g_ethmac_handler != NULL) + { + /* Attach and enable GPIO interrupt (and event) on the falling edge */ + + (void)stm32_gpiosetevent(GPIO_EMAC_NINT, false, true, true, g_ethmac_handler); + } + else + { + /* Detach and disable GPIO interrupt */ + + (void)stm32_gpiosetevent(GPIO_EMAC_NINT, false, false, false, NULL); + } +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +void weak_function stm32_netinitialize(void) +{ +#ifdef HAVE_NETMONITOR + /* Configure the PHY interrupt GPIO */ + + phydbg("Configuring %08x\n", GPIO_EMAC_NINT); + stm32_configgpio(GPIO_EMAC_NINT); +#endif + + /* Configure PHY /RESET output */ + + stm32_configgpio(GPIO_EMAC_NRST); +} + +/**************************************************************************** + * Name: arch_phy_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a PHY interrupt occurs. This function both attaches + * the interrupt handler and enables the interrupt if 'handler' is non- + * NULL. If handler is NULL, then the interrupt is detached and disabled + * instead. + * + * The PHY interrupt is always disabled upon return. The caller must + * call back through the enable function point to control the state of + * the interrupt. + * + * This interrupt may or may not be available on a given platform depending + * on how the network hardware architecture is implemented. In a typical + * case, the PHY interrupt is provided to board-level logic as a GPIO + * interrupt (in which case this is a board-specific interface and really + * should be called board_phy_irq()); In other cases, the PHY interrupt + * may be cause by the chip's MAC logic (in which case arch_phy_irq()) is + * an appropriate name. Other other boards, there may be no PHY interrupts + * available at all. If client attachable PHY interrupts are available + * from the board or from the chip, then CONFIG_ARCH_PHY_INTERRUPT should + * be defined to indicate that fact. + * + * Typical usage: + * a. OS service logic (not application logic*) attaches to the PHY + * PHY interrupt and enables the PHY interrupt. + * b. When the PHY interrupt occurs: (1) the interrupt should be + * disabled and () work should be scheduled on the worker thread (or + * perhaps a dedicated application thread). + * c. That worker thread should use the SIOCGMIIPHY, SIOCGMIIREG, + * and SIOCSMIIREG ioctl calls** to communicate with the PHY, + * determine what network event took place (Link Up/Down?), and + * take the appropriate actions. + * d. It should then interact the the PHY to clear any pending + * interrupts, then re-enable the PHY interrupt. + * + * * This is an OS internal interface and should not be used from + * application space. Rather applications should use the SIOCMIISIG + * ioctl to receive a signal when a PHY event occurs. + * ** This interrupt is really of no use if the Ethernet MAC driver + * does not support these ioctl calls. + * + * Input Parameters: + * intf - Identifies the network interface. For example "eth0". Only + * useful on platforms that support multiple Ethernet interfaces + * and, hence, multiple PHYs and PHY interrupts. + * handler - The client interrupt handler to be invoked when the PHY + * asserts an interrupt. Must reside in OS space, but can + * signal tasks in user space. A value of NULL can be passed + * in order to detach and disable the PHY interrupt. + * enable - A function pointer that be unsed to enable or disable the + * PHY interrupt. + * + * Returned Value: + * The previous PHY interrupt handler address is returned. This allows you + * to temporarily replace an interrupt handler, then restore the original + * interrupt handler. NULL is returned if there is was not handler in + * place when the call was made. + * + ****************************************************************************/ + +#ifdef HAVE_NETMONITOR +xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable) +{ + phy_enable_t enabler; + xcpt_t oldhandler; + irqstate_t flags; + + nvdbg("%s: handler=%p\n", intf, handler); + phydbg("ETHMAC: devname=%s\n", STM32_ETHMAC_DEVNAME); + + DEBUGASSERT(intf); + + flags = enter_critical_section(); + oldhandler = g_ethmac_handler; + + if (strcmp(intf, STM32_ETHMAC_DEVNAME) == 0) + { + phydbg("Select ETHMAC\n"); + g_ethmac_handler = handler; + enabler = stm32_emac0_phy_enable; + } + else + { + ndbg("Unsupported interface: %s\n", intf); + enabler = NULL; + } + + if (enable) + { + *enable = enabler; + } + + leave_critical_section(flags); + return oldhandler; +} +#endif + +#endif /* CONFIG_STM32F4DISBB && CONFIG_STM32_ETHMAC */ diff --git a/configs/stm32f4discovery/src/stm32_extmem.c b/configs/stm32f4discovery/src/stm32_extmem.c new file mode 100644 index 0000000000000000000000000000000000000000..3717317fd5fbcdc96b03a38dae10fdf59f4e4c6d --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_extmem.c @@ -0,0 +1,187 @@ +/************************************************************************************ + * configs/stm32f4disovery/src/stm32_extmem.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32_fsmc.h" +#include "stm32_gpio.h" +#include "stm32.h" +#include "stm32f4discovery.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef CONFIG_STM32_FSMC +# warning "FSMC is not enabled" +#endif + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +#define STM32_FSMC_NADDRCONFIGS 26 +#define STM32_FSMC_NDATACONFIGS 16 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/* GPIO configurations common to most external memories */ + +static const uint32_t g_addressconfig[STM32_FSMC_NADDRCONFIGS] = +{ + GPIO_FSMC_A0, GPIO_FSMC_A1 , GPIO_FSMC_A2, GPIO_FSMC_A3, GPIO_FSMC_A4 , GPIO_FSMC_A5, + GPIO_FSMC_A6, GPIO_FSMC_A7, GPIO_FSMC_A8, GPIO_FSMC_A9, GPIO_FSMC_A10, GPIO_FSMC_A11, + GPIO_FSMC_A12, GPIO_FSMC_A13, GPIO_FSMC_A14, GPIO_FSMC_A15, GPIO_FSMC_A16, GPIO_FSMC_A17, + GPIO_FSMC_A18, GPIO_FSMC_A19, GPIO_FSMC_A20, GPIO_FSMC_A21, GPIO_FSMC_A22, GPIO_FSMC_A23, + GPIO_FSMC_A24, GPIO_FSMC_A25 +}; + +static const uint32_t g_dataconfig[STM32_FSMC_NDATACONFIGS] = +{ + GPIO_FSMC_D0, GPIO_FSMC_D1 , GPIO_FSMC_D2, GPIO_FSMC_D3, GPIO_FSMC_D4 , GPIO_FSMC_D5, + GPIO_FSMC_D6, GPIO_FSMC_D7, GPIO_FSMC_D8, GPIO_FSMC_D9, GPIO_FSMC_D10, GPIO_FSMC_D11, + GPIO_FSMC_D12, GPIO_FSMC_D13, GPIO_FSMC_D14, GPIO_FSMC_D15 +}; + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for external memory usage + * + ************************************************************************************/ + +void stm32_extmemgpios(const uint32_t *gpios, int ngpios) +{ + int i; + + /* Configure GPIOs */ + + for (i = 0; i < ngpios; i++) + { + stm32_configgpio(gpios[i]); + } +} + +/************************************************************************************ + * Name: stm32_extmemaddr + * + * Description: + * Initialize adress line GPIOs for external memory access + * + ************************************************************************************/ + +void stm32_extmemaddr(int naddrs) +{ + stm32_extmemgpios(g_addressconfig, naddrs); +} + +/************************************************************************************ + * Name: stm32_extmemdata + * + * Description: + * Initialize data line GPIOs for external memory access + * + ************************************************************************************/ + +void stm32_extmemdata(int ndata) +{ + stm32_extmemgpios(g_dataconfig, ndata); +} + +/************************************************************************************ + * Name: stm32_enablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +void stm32_enablefsmc(void) +{ + uint32_t regval; + + /* Enable AHB clocking to the FSMC */ + + regval = getreg32( STM32_RCC_AHB3ENR); + regval |= RCC_AHB3ENR_FSMCEN; + putreg32(regval, STM32_RCC_AHB3ENR); +} + +/************************************************************************************ + * Name: stm32_disablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +void stm32_disablefsmc(void) +{ + uint32_t regval; + + /* Disable AHB clocking to the FSMC */ + + regval = getreg32(STM32_RCC_AHB3ENR); + regval &= ~RCC_AHB3ENR_FSMCEN; + putreg32(regval, STM32_RCC_AHB3ENR); +} diff --git a/configs/stm32f4discovery/src/stm32_idle.c b/configs/stm32f4discovery/src/stm32_idle.c new file mode 100644 index 0000000000000000000000000000000000000000..0e0ead83608934aafa3a3a06d77e9ee43e331617 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_idle.c @@ -0,0 +1,276 @@ +/**************************************************************************** + * configs/stm32f4discovery/src/stm32_idle.c + * + * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +#include +#include +#include +#include + +#include + +#include "up_internal.h" +#include "stm32_pm.h" +#include "stm32_rcc.h" +#include "stm32_exti.h" + +#include "stm32f4discovery.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* Does the board support an IDLE LED to indicate that the board is in the + * IDLE state? + */ + +#if defined(CONFIG_ARCH_LEDS) && defined(LED_IDLE) +# define BEGIN_IDLE() board_autoled_on(LED_IDLE) +# define END_IDLE() board_autoled_off(LED_IDLE) +#else +# define BEGIN_IDLE() +# define END_IDLE() +#endif + +/* Values for the RTC Alarm to wake up from the PM_STANDBY mode */ + +#ifndef CONFIG_PM_ALARM_SEC +# define CONFIG_PM_ALARM_SEC 3 +#endif + +#ifndef CONFIG_PM_ALARM_NSEC +# define CONFIG_PM_ALARM_NSEC 0 +#endif + +#define PM_IDLE_DOMAIN 0 /* Revisit */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if 0 /* Not used */ +static void up_alarmcb(void); +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_idlepm + * + * Description: + * Perform IDLE state power management. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void stm32_idlepm(void) +{ + static enum pm_state_e oldstate = PM_NORMAL; + enum pm_state_e newstate; + irqstate_t flags; + int ret; + + /* Decide, which power saving level can be obtained */ + + newstate = pm_checkstate(PM_IDLE_DOMAIN); + + /* Check for state changes */ + + if (newstate != oldstate) + { + lldbg("newstate= %d oldstate=%d\n", newstate, oldstate); + + flags = enter_critical_section(); + + /* Force the global state change */ + + ret = pm_changestate(PM_IDLE_DOMAIN, newstate); + if (ret < 0) + { + /* The new state change failed, revert to the preceding state */ + + (void)pm_changestate(PM_IDLE_DOMAIN, oldstate); + + /* No state change... */ + + goto errout; + } + + /* Then perform board-specific, state-dependent logic here */ + + switch (newstate) + { + case PM_NORMAL: + { + } + break; + + case PM_IDLE: + { + } + break; + + case PM_STANDBY: + { +#ifdef CONFIG_RTC_ALARM + /* Disable RTC Alarm interrupt */ + +#warning "missing logic" + + /* Configure the RTC alarm to Auto Wake the system */ + +#warning "missing logic" + + /* The tv_nsec value must not exceed 1,000,000,000. That + * would be an invalid time. + */ + +#warning "missing logic" + + /* Set the alarm */ + +#warning "missing logic" +#endif + /* Call the STM32 stop mode */ + + stm32_pmstop(true); + + /* We have been re-awakened by some even: A button press? + * An alarm? Cancel any pending alarm and resume the normal + * operation. + */ + +#ifdef CONFIG_RTC_ALARM +#warning "missing logic" +#endif + /* Resume normal operation */ + + pm_changestate(PM_IDLE_DOMAIN, PM_NORMAL); + newstate = PM_NORMAL; + } + break; + + case PM_SLEEP: + { + /* We should not return from standby mode. The only way out + * of standby is via the reset path. + */ + + (void)stm32_pmstandby(); + } + break; + + default: + break; + } + + /* Save the new state */ + + oldstate = newstate; + +errout: + leave_critical_section(flags); + } +} +#else +# define stm32_idlepm() +#endif + +/************************************************************************************ + * Name: up_alarmcb + * + * Description: + * RTC alarm service routine + * + ************************************************************************************/ + +#if 0 /* Not used */ +static void up_alarmcb(void) +{ + /* This alarm occurs because there wasn't any EXTI interrupt during the + * PM_STANDBY period. So just go to sleep. + */ + + pm_changestate(PM_IDLE_DOMAIN, PM_SLEEP); +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_idle + * + * Description: + * up_idle() is the logic that will be executed when their is no other + * ready-to-run task. This is processor idle time and will continue until + * some interrupt occurs to cause a context switch from the idle task. + * + * Processing in this state may be processor-specific. e.g., this is where + * power management operations might be performed. + * + ****************************************************************************/ + +void up_idle(void) +{ +#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS) + /* If the system is idle and there are no timer interrupts, then process + * "fake" timer interrupts. Hopefully, something will wake up. + */ + + sched_process_timer(); +#else + + /* Perform IDLE mode power management */ + + BEGIN_IDLE(); + stm32_idlepm(); + END_IDLE(); +#endif +} + diff --git a/configs/stm32f4discovery/src/stm32_max31855.c b/configs/stm32f4discovery/src/stm32_max31855.c new file mode 100644 index 0000000000000000000000000000000000000000..4422b5e7b3e998eae3c11a778565328d754f36f0 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_max31855.c @@ -0,0 +1,101 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_max31855.c + * + * Copyright (C) 2015 Alan Carvalho de Assis. All rights reserved. + * Author: Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32.h" +#include "stm32_spi.h" +#include "stm32f4discovery.h" + +#if defined(CONFIG_SPI) && defined(CONFIG_MAX31855) && defined(CONFIG_STM32_SPI2) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define MAX31855_SPI_PORTNO 2 /* On SPI2 */ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_max31855initialize + * + * Description: + * Initialize and register the MAX31855 Temperature Sensor driver. + * + * Input parameters: + * devpath - The full path to the driver to register. E.g., "/dev/temp0" + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ************************************************************************************/ + +int stm32_max31855initialize(FAR const char *devpath) +{ + FAR struct spi_dev_s *spi; + int ret; + + spi = stm32_spibus_initialize(MAX31855_SPI_PORTNO); + + if (!spi) + { + return -ENODEV; + } + + /* Then register the barometer sensor */ + + ret = max31855_register(devpath, spi); + if (ret < 0) + { + sndbg("Error registering MAX31855\n"); + } + + return ret; +} + +#endif /* CONFIG_SPI && CONFIG_MAX31855 */ diff --git a/configs/stm32f4discovery/src/stm32_max6675.c b/configs/stm32f4discovery/src/stm32_max6675.c new file mode 100644 index 0000000000000000000000000000000000000000..6f356aaaf8258cc22f1df31e11c5848d28237642 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_max6675.c @@ -0,0 +1,101 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_max6675.c + * + * Copyright (C) 2015 Alan Carvalho de Assis. All rights reserved. + * Author: Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32.h" +#include "stm32_spi.h" +#include "stm32f4discovery.h" + +#if defined(CONFIG_SPI) && defined(CONFIG_MAX6675) && defined(CONFIG_STM32_SPI2) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define MAX6675_SPI_PORTNO 2 /* On SPI2 */ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_max6675initialize + * + * Description: + * Initialize and register the MAX6675 Temperature Sensor driver. + * + * Input parameters: + * devpath - The full path to the driver to register. E.g., "/dev/temp0" + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ************************************************************************************/ + +int stm32_max6675initialize(FAR const char *devpath) +{ + FAR struct spi_dev_s *spi; + int ret; + + spi = stm32_spibus_initialize(MAX6675_SPI_PORTNO); + + if (!spi) + { + return -ENODEV; + } + + /* Then register the barometer sensor */ + + ret = max6675_register(devpath, spi); + if (ret < 0) + { + sndbg("Error registering MAX6675\n"); + } + + return ret; +} + +#endif /* CONFIG_SPI && CONFIG_MAX6675 */ diff --git a/configs/stm32f4discovery/src/stm32_pca9635.c b/configs/stm32f4discovery/src/stm32_pca9635.c new file mode 100644 index 0000000000000000000000000000000000000000..7fcae301d14f551c34a949522e2772a776266a2d --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_pca9635.c @@ -0,0 +1,103 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_pca9635.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include + +#include "stm32_gpio.h" +#include "stm32_i2c.h" +#include "stm32f4discovery.h" + +#ifdef CONFIG_PCA9635PW + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_pca9635_initialize + * + * Description: + * This function is called by board initialization logic to configure the + * LED PWM chip. This function will register the driver as /dev/leddrv0. + * + * Input Parameters: + * None + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int stm32_pca9635_initialize(void) +{ + + FAR struct i2c_master_s *i2c; + int ret; + + /* Get the I2C driver that interfaces with the pca9635 (PCA9635_I2CBUS)*/ + + i2c = stm32_i2cbus_initialize(PCA9635_I2CBUS); + if (!i2c) + { + dbg("ERROR: Failed to initialize I2C%d\n", PCA9635_I2CBUS); + return -1; + } + + ret = pca9635pw_register("/dev/leddrv0", i2c, PCA9635_I2CADDR); + if (ret < 0) + { + sndbg("Failed to register PCA9635 driver: %d\n", ret); + return ret; + } + + return OK; +} + +#endif /* CONFIG_PCA9635PW */ diff --git a/configs/stm32f4discovery/src/stm32_pm.c b/configs/stm32f4discovery/src/stm32_pm.c new file mode 100644 index 0000000000000000000000000000000000000000..c012e397c30d10197f86e9fa44f7f1fe83ac923d --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_pm.c @@ -0,0 +1,107 @@ +/**************************************************************************** + * configs/stm32f4discovery/src/stm32_pm.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "up_internal.h" +#include "stm32_pm.h" +#include "stm32f4discovery.h" + +#ifdef CONFIG_PM + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_pminitialize + * + * Description: + * This function is called by MCU-specific logic at power-on reset in + * order to provide one-time initialization the power management subystem. + * This function must be called *very* early in the initializeation sequence + * *before* any other device drivers are initialized (since they may + * attempt to register with the power management subsystem). + * + * Input parameters: + * None. + * + * Returned value: + * None. + * + ****************************************************************************/ + +void up_pminitialize(void) +{ + /* Then initialize the NuttX power management subsystem proper */ + + pm_initialize(); + +#if defined(CONFIG_ARCH_IDLE_CUSTOM) && defined(CONFIG_PM_BUTTONS) + /* Initialize the buttons to wake up the system from low power modes */ + + stm32_pm_buttons(); +#endif + + /* Initialize the LED PM */ + + stm32_led_pminitialize(); +} + +#endif /* CONFIG_PM */ diff --git a/configs/stm32f4discovery/src/stm32_pmbuttons.c b/configs/stm32f4discovery/src/stm32_pmbuttons.c new file mode 100644 index 0000000000000000000000000000000000000000..0ca71c9dcdef6902c35bebaf0f46767f92c36153 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_pmbuttons.c @@ -0,0 +1,152 @@ +/**************************************************************************** + * configs/stm32f4discovery/src/stm32_pm_buttons.c + * + * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "nvic.h" +#include "stm32_pwr.h" +#include "stm32_pm.h" +#include "stm32f4discovery.h" + +#if defined(CONFIG_PM) && defined(CONFIG_ARCH_IDLE_CUSTOM) && defined(CONFIG_PM_BUTTONS) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_ARCH_BUTTONS +# error "CONFIG_ARCH_BUTTONS is not defined in the configuration" +#endif + +#ifndef CONFIG_ARCH_IRQBUTTONS +# warning "CONFIG_ARCH_IRQBUTTONS is not defined in the configuration" +#endif + +#ifndef CONFIG_PM_BUTTON_ACTIVITY +# define CONFIG_PM_BUTTON_ACTIVITY 10 +#endif + +#define PM_IDLE_DOMAIN 0 /* Revisit */ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +static int button_handler(int irq, FAR void *context); +#endif /* CONFIG_ARCH_IRQBUTTONS */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: button_handler + * + * Description: + * Handle a button wake-up interrupt + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +static int button_handler(int irq, FAR void *context) +{ + /* At this point the MCU should have already awakened. The state + * change will be handled in the IDLE loop when the system is re-awakened + * The button interrupt handler should be totally ignorant of the PM + * activities and should report button activity as if nothing + * special happened. + */ + + pm_activity(PM_IDLE_DOMAIN, CONFIG_PM_BUTTON_ACTIVITY); + return OK; +} +#endif /* CONFIG_ARCH_IRQBUTTONS */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_pm_buttons + * + * Description: + * Configure the user button of the STM32f4discovery board as EXTI, + * so it is able to wakeup the MCU from the PM_STANDBY mode + * + ****************************************************************************/ + +void stm32_pm_buttons(void) +{ + /* Initialize the button GPIOs */ + + board_button_initialize(); + +#ifdef CONFIG_ARCH_IRQBUTTONS + xcpt_t oldhandler = board_button_irq(0, button_handler); + + if (oldhandler != NULL) + { + lowsyslog(LOG_WARNING, "WARNING: oldhandler:%p is not NULL! " + "Button events may be lost or aliased!\n", + oldhandler); + } +#endif +} + +#endif /* CONFIG_PM && CONFIG_ARCH_IDLE_CUSTOM && CONFIG_PM_BUTTONS)*/ diff --git a/configs/stm32f4discovery/src/stm32_pwm.c b/configs/stm32f4discovery/src/stm32_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..b4a7eeba08d70c7fd09bc1652e427dd0ec62608b --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_pwm.c @@ -0,0 +1,141 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_pwm.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "stm32_pwm.h" +#include "stm32f4discovery.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* PWM + * + * The stm32f4discovery has no real on-board PWM devices, but the board can be configured to output + * a pulse train using TIM4 CH2. This pin is used by FSMC is connect to CN5 just for this + * purpose: + * + * PD13 FSMC_A18 / MC_TIM4_CH2OUT pin 33 (EnB) + * + * FSMC must be disabled in this case! + */ + +#define HAVE_PWM 1 + +#ifndef CONFIG_PWM +# undef HAVE_PWM +#endif + +#ifndef CONFIG_STM32_TIM4 +# undef HAVE_PWM +#endif + +#ifndef CONFIG_STM32_TIM4_PWM +# undef HAVE_PWM +#endif + +#if CONFIG_STM32_TIM4_CHANNEL != STM32F4DISCOVERY_PWMCHANNEL +# undef HAVE_PWM +#endif + +#ifdef HAVE_PWM + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + pwm = stm32_pwminitialize(STM32F4DISCOVERY_PWMTIMER); + if (!pwm) + { + adbg("Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* HAVE_PWM */ diff --git a/configs/stm32f4discovery/src/stm32_qencoder.c b/configs/stm32f4discovery/src/stm32_qencoder.c new file mode 100644 index 0000000000000000000000000000000000000000..823c846cf7361ef8c6817ed325791afa4aec1a25 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_qencoder.c @@ -0,0 +1,162 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_qencoder.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "stm32_qencoder.h" +#include "stm32f4discovery.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Check if we have a timer configured for quadrature encoder -- assume YES. */ + +#define HAVE_QENCODER 1 + +/* If TIMn is not enabled (via CONFIG_STM32_TIMn), then the configuration cannot + * specify TIMn as a quadrature encoder (via CONFIG_STM32_TIMn_QE). + */ + +#ifndef CONFIG_STM32_TIM1 +# undef CONFIG_STM32_TIM1_QE +#endif +#ifndef CONFIG_STM32_TIM2 +# undef CONFIG_STM32_TIM2_QE +#endif +#ifndef CONFIG_STM32_TIM3 +# undef CONFIG_STM32_TIM3_QE +#endif +#ifndef CONFIG_STM32_TIM4 +# undef CONFIG_STM32_TIM4_QE +#endif +#ifndef CONFIG_STM32_TIM5 +# undef CONFIG_STM32_TIM5_QE +#endif +#ifndef CONFIG_STM32_TIM8 +# undef CONFIG_STM32_TIM8_QE +#endif + +/* If the upper-half quadrature encoder driver is not enabled, then we cannot + * support the quadrature encoder. + */ + +#ifndef CONFIG_QENCODER +# undef HAVE_QENCODER +#endif + +/* Which Timer should we use, TIMID={1,2,3,4,5,8}. If multiple timers are + * configured as quadrature encoders, this logic will arbitrarily select + * the lowest numbered timer. + * + * At least one TIMn, n={1,2,3,4,5,8}, must be both enabled and configured + * as a quadrature encoder in order to support the lower half quadrature + * encoder driver. The above check assures that if CONFIG_STM32_TIMn_QE + * is defined, then the correspdonding TIMn is also enabled. + */ + +#if defined CONFIG_STM32_TIM1_QE +# define TIMID 1 +#elif defined CONFIG_STM32_TIM2_QE +# define TIMID 2 +#elif defined CONFIG_STM32_TIM3_QE +# define TIMID 3 +#elif defined CONFIG_STM32_TIM4_QE +# define TIMID 4 +#elif defined CONFIG_STM32_TIM5_QE +# define TIMID 5 +#elif defined CONFIG_STM32_TIM8_QE +# define TIMID 8 +#else +# undef HAVE_QENCODER +#endif + +#ifdef HAVE_QENCODER + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: qe_devinit + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/qencoder. + * + ************************************************************************************/ + +int qe_devinit(void) +{ + static bool initialized = false; + int ret; + + /* Check if we are already initialized */ + + if (!initialized) + { + /* Initialize a quadrature encoder interface. */ + + snvdbg("Initializing the quadrature encoder using TIM%d\n", TIMID); + ret = stm32_qeinitialize("/dev/qe0", TIMID); + if (ret < 0) + { + sndbg("stm32_qeinitialize failed: %d\n", ret); + return ret; + } + + initialized = true; + } + + return OK; +} + +#endif /* HAVE_QENCODER */ diff --git a/configs/stm32f4discovery/src/stm32_rgbled.c b/configs/stm32f4discovery/src/stm32_rgbled.c new file mode 100644 index 0000000000000000000000000000000000000000..8391f445589c1bef827d9be5ef980baae1853e2f --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_rgbled.c @@ -0,0 +1,183 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_rgbled.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "stm32_pwm.h" +#include "stm32f4discovery.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#define HAVE_RGBLED 1 + +#ifndef CONFIG_PWM +# undef HAVE_RGBLED +#endif + +#ifndef CONFIG_STM32_TIM1 +# undef HAVE_RGBLED +#endif + +#ifndef CONFIG_STM32_TIM2 +# undef HAVE_RGBLED +#endif + +#ifndef CONFIG_STM32_TIM3 +# undef HAVE_RGBLED +#endif + +#ifndef CONFIG_STM32_TIM1_PWM +# undef HAVE_RGBLED +#endif + +#ifndef CONFIG_STM32_TIM2_PWM +# undef HAVE_RGBLED +#endif + +#ifndef CONFIG_STM32_TIM3_PWM +# undef HAVE_RGBLED +#endif + +#ifdef HAVE_RGBLED + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int stm32_rgbled_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *ledr; + struct pwm_lowerhalf_s *ledg; + struct pwm_lowerhalf_s *ledb; + struct pwm_info_s info; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + ledr = stm32_pwminitialize(1); + if (!ledr) + { + dbg("Failed to get the STM32 PWM lower half to LEDR\n"); + return -ENODEV; + } + + /* Define frequency and duty cycle */ + + info.frequency = 100; + info.duty = 0; + + /* Initialize LED R */ + + ledr->ops->setup(ledr); + ledr->ops->start(ledr, &info); + + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + ledg = stm32_pwminitialize(2); + if (!ledg) + { + dbg("Failed to get the STM32 PWM lower half to LEDG\n"); + return -ENODEV; + } + + /* Initialize LED G */ + + ledg->ops->setup(ledg); + ledg->ops->start(ledg, &info); + + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + ledb = stm32_pwminitialize(3); + if (!ledb) + { + dbg("Failed to get the STM32 PWM lower half to LEDB\n"); + return -ENODEV; + } + + /* Initialize LED B */ + + ledb->ops->setup(ledb); + ledb->ops->start(ledb, &info); + + /* Register the RGB LED diver at "/dev/rgbled0" */ + + ret = rgbled_register("/dev/rgbled0", ledr, ledg, ledb); + if (ret < 0) + { + dbg("rgbled_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#else +# error "HAVE_RGBLED is undefined" +#endif /* HAVE_RGBLED */ diff --git a/configs/stm32f4discovery/src/stm32_sdio.c b/configs/stm32f4discovery/src/stm32_sdio.c new file mode 100644 index 0000000000000000000000000000000000000000..7d28442cf3b17a7b94598524752c498950d1ac97 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_sdio.c @@ -0,0 +1,175 @@ +/**************************************************************************** + * config/stm32f4discovery/src/stm32_sdio.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "stm32.h" +#include "stm32f4discovery.h" + +#ifdef HAVE_SDIO + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Card detections requires card support and a card detection GPIO */ + +#define HAVE_NCD 1 +#if !defined(HAVE_SDIO) || !defined(GPIO_SDIO_NCD) +# undef HAVE_NCD +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static FAR struct sdio_dev_s *g_sdio_dev; +#ifdef HAVE_NCD +static bool g_sd_inserted = 0xff; /* Impossible value */ +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_ncd_interrupt + * + * Description: + * Card detect interrupt handler. + * + ****************************************************************************/ + +#ifdef HAVE_NCD +static int stm32_ncd_interrupt(int irq, FAR void *context) +{ + bool present; + + present = !stm32_gpioread(GPIO_SDIO_NCD); + if (present != g_sd_inserted) + { + sdio_mediachange(g_sdio_dev, present); + g_sd_inserted = present; + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_sdio_initialize + * + * Description: + * Initialize SDIO-based MMC/SD card support + * + ****************************************************************************/ + +int stm32_sdio_initialize(void) +{ + int ret; + +#ifdef HAVE_NCD + /* Card detect */ + + bool cd_status; + + /* Configure the card detect GPIO */ + + stm32_configgpio(GPIO_SDIO_NCD); + + /* Register an interrupt handler for the card detect pin */ + + stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true, stm32_ncd_interrupt); +#endif + + /* Mount the SDIO-based MMC/SD block driver */ + /* First, get an instance of the SDIO interface */ + + fvdbg("Initializing SDIO slot %d\n", SDIO_SLOTNO); + + g_sdio_dev = sdio_initialize(SDIO_SLOTNO); + if (!g_sdio_dev) + { + fdbg("Failed to initialize SDIO slot %d\n", SDIO_SLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + fvdbg("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR); + + ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev); + if (ret != OK) + { + fdbg("Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + fvdbg("Successfully bound SDIO to the MMC/SD driver\n"); + +#ifdef HAVE_NCD + /* Use SD card detect pin to check if a card is g_sd_inserted */ + + cd_status = !stm32_gpioread(GPIO_SDIO_NCD); + fvdbg("Card detect : %d\n", cd_status); + + sdio_mediachange(g_sdio_dev, cd_status); +#else + /* Assume that the SD card is inserted. What choice do we have? */ + + sdio_mediachange(g_sdio_dev, true); +#endif + + return OK; +} + +#endif /* HAVE_SDIO */ diff --git a/configs/stm32f4discovery/src/stm32_spi.c b/configs/stm32f4discovery/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..f057b874d4e4aa828143acaf9499c2054d61cd84 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_spi.c @@ -0,0 +1,273 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_spi.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" + +#include "stm32f4discovery.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32f4discovery board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ +#ifdef CONFIG_STM32_SPI1 + (void)stm32_configgpio(GPIO_CS_MEMS); /* MEMS chip select */ +#endif +#if defined(CONFIG_STM32_SPI2) && defined(CONFIG_MAX31855) + (void)stm32_configgpio(GPIO_MAX31855_CS); /* MAX31855 chip select */ +#endif +#if defined(CONFIG_STM32_SPI2) && defined(CONFIG_MAX6675) + (void)stm32_configgpio(GPIO_MAX6675_CS); /* MAX6675 chip select */ +#endif +#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) || \ + defined(CONFIG_LCD_SSD1351) + (void)stm32_configgpio(GPIO_OLED_CS); /* OLED chip select */ +# if defined(CONFIG_LCD_UG2864AMBAG01) + (void)stm32_configgpio(GPIO_OLED_A0); /* OLED Command/Data */ +# endif +# if defined(CONFIG_LCD_UG2864HSWEG01) || defined(CONFIG_LCD_SSD1351) + (void)stm32_configgpio(GPIO_OLED_DC); /* OLED Command/Data */ +# endif +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) || \ + defined(CONFIG_LCD_SSD1351) + if (devid == SPIDEV_DISPLAY) + { + stm32_gpiowrite(GPIO_OLED_CS, !selected); + } + else +#endif + { + stm32_gpiowrite(GPIO_CS_MEMS, !selected); + } +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +#if defined(CONFIG_MAX31855) + if (devid == SPIDEV_TEMPERATURE) + { + stm32_gpiowrite(GPIO_MAX31855_CS, !selected); + } +#endif +#if defined(CONFIG_MAX6675) + if (devid == SPIDEV_TEMPERATURE) + { + stm32_gpiowrite(GPIO_MAX6675_CS, !selected); + } +#endif +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) || \ + defined(CONFIG_LCD_SSD1351) + if (devid == SPIDEV_DISPLAY) + { + /* "This is the Data/Command control pad which determines whether the + * data bits are data or a command. + * + * A0 = "H": the inputs at D0 to D7 are treated as display data. + * A0 = "L": the inputs at D0 to D7 are transferred to the command + * registers." + */ + +# if defined(CONFIG_LCD_UG2864AMBAG01) + (void)stm32_gpiowrite(GPIO_OLED_A0, !cmd); +# endif +# if defined(CONFIG_LCD_UG2864HSWEG01) || defined(CONFIG_LCD_SSD1351) + (void)stm32_gpiowrite(GPIO_OLED_DC, !cmd); +# endif + return OK; + } +#endif + + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif +#endif /* CONFIG_SPI_CMDDATA */ + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/stm32f4discovery/src/stm32_ssd1289.c b/configs/stm32f4discovery/src/stm32_ssd1289.c new file mode 100644 index 0000000000000000000000000000000000000000..588b9ee82bc2e7b03f4f31f61ef85cb4d4a962e6 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_ssd1289.c @@ -0,0 +1,425 @@ +/************************************************************************************** + * configs/stm32fdiscover/src/stm32_ssd1289.c + * + * This logic supports the connection of an SSD1289-based LCD to the STM32F4Discovery + * board. + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************************/ + +/************************************************************************************** + * Included Files + **************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm32f4discovery.h" + +#ifdef CONFIG_LCD_SSD1289 + +/************************************************************************************** + * Pre-processor Definitions + **************************************************************************************/ +/* Configuration **********************************************************************/ + +#ifndef CONFIG_STM32_FSMC +# error "CONFIG_STM32_FSMC is required to use the LCD" +#endif + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* STM32F4Discovery LCD Hardware Definitions ******************************************/ +/* LCD /CS is CE1 == NOR/SRAM Bank 1 + * + * Bank 1 = 0x60000000 | 0x00000000 + * Bank 2 = 0x60000000 | 0x04000000 + * Bank 3 = 0x60000000 | 0x08000000 + * Bank 4 = 0x60000000 | 0x0c000000 + * + * FSMC address bit 16 is used to distinguish command and data. FSMC address bits + * 0-24 correspond to ARM address bits 1-25. + */ + +#define STM32_LCDBASE ((uintptr_t)(0x60000000 | 0x00000000)) +#define LCD_INDEX (STM32_LCDBASE) +#define LCD_DATA (STM32_LCDBASE + 0x00020000) + +/* SRAM pin definitions */ + +#define LCD_NADDRLINES 1 /* A16 */ +#define LCD_NDATALINES 16 /* D0-15 */ + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/************************************************************************************** + * Private Type Definition + **************************************************************************************/ + +/************************************************************************************** + * Private Function Protototypes + **************************************************************************************/ +/* Low Level LCD access */ + +static void stm32_select(FAR struct ssd1289_lcd_s *dev); +static void stm32_deselect(FAR struct ssd1289_lcd_s *dev); +static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index); +#ifndef CONFIG_SSD1289_WRONLY +static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev); +#endif +static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data); +static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power); + +/************************************************************************************** + * Private Data + **************************************************************************************/ +/* LCD pin mapping (see configs/stm324discovery/README.txt + * MAPPING TO STM32 F4: + * + * ---------------- ------------- ---------------------------------- + * STM32 FUNCTION LCD PIN STM32F4Discovery PIN + * ---------------- ------------- ---------------------------------- + * FSMC_D0 D0 pin 4 PD14 P1 pin 46 Conflict (Note 1) + * FSMC_D1 D1 pin 3 PD15 P1 pin 47 Conflict (Note 2) + * FSMC_D2 D2 pin 6 PD0 P2 pin 36 Free I/O + * FSMC_D3 D3 pin 5 PD1 P2 pin 33 Free I/O + * FSMC_D4 D4 pin 8 PE7 P1 pin 25 Free I/O + * FSMC_D5 D5 pin 7 PE8 P1 pin 26 Free I/O + * FSMC_D6 D6 pin 10 PE9 P1 pin 27 Free I/O + * FSMC_D7 D7 pin 9 PE10 P1 pin 28 Free I/O + * FSMC_D8 D8 pin 12 PE11 P1 pin 29 Free I/O + * FSMC_D9 D9 pin 11 PE12 P1 pin 30 Free I/O + * FSMC_D10 D10 pin 14 PE13 P1 pin 31 Free I/O + * FSMC_D11 D11 pin 13 PE14 P1 pin 32 Free I/O + * FSMC_D12 D12 pin 16 PE15 P1 pin 33 Free I/O + * FSMC_D13 D13 pin 15 PD8 P1 pin 40 Free I/O + * FSMC_D14 D14 pin 18 PD9 P1 pin 41 Free I/O + * FSMC_D15 D15 pin 17 PD10 P1 pin 42 Free I/O + * FSMC_A16 RS pin 19 PD11 P1 pin 27 Free I/O + * FSMC_NE1 ~CS pin 10 PD7 P2 pin 27 Free I/O + * FSMC_NWE ~WR pin 22 PD5 P2 pin 29 Conflict (Note 3) + * FSMC_NOE ~RD pin 21 PD4 P2 pin 32 Conflict (Note 4) + * PC6 RESET pin 24 PC6 P2 pin 47 Free I/O + * ---------------- ------------- ---------------------------------- + * + * 1 Used for the RED LED + * 2 Used for the BLUE LED + * 3 Used for the RED LED and for OTG FS Overcurrent. It may be okay to use + * for the parallel interface if PC0 is held high (or floating). PC0 enables + * the STMPS2141STR IC power switch that drives the OTG FS host VBUS. + * 4 Also the reset pin for the CS43L22 audio Codec. + */ + +#define GPIO_LCD_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN6) + +/* GPIO configurations unique to the LCD */ + +static const uint32_t g_lcdconfig[] = +{ + /* PC6(RESET), FSMC_A16, FSMC_NOE, FSMC_NWE, and FSMC_NE1 */ + + GPIO_LCD_RESET, GPIO_FSMC_A16, GPIO_FSMC_NOE, GPIO_FSMC_NWE, GPIO_FSMC_NE1 +}; +#define NLCD_CONFIG (sizeof(g_lcdconfig)/sizeof(uint32_t)) + +/* This is the driver state structure (there is no retained state information) */ + +static struct ssd1289_lcd_s g_ssd1289 = +{ + .select = stm32_select, + .deselect = stm32_deselect, + .index = stm32_index, +#ifndef CONFIG_SSD1289_WRONLY + .read = stm32_read, +#endif + .write = stm32_write, + .backlight = stm32_backlight +}; + +/* The saved instance of the LCD driver */ + +static FAR struct lcd_dev_s *g_ssd1289drvr; + +/************************************************************************************** + * Private Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: stm32_select + * + * Description: + * Select the LCD device + * + **************************************************************************************/ + +static void stm32_select(FAR struct ssd1289_lcd_s *dev) +{ + /* Does not apply to this hardware */ +} + +/************************************************************************************** + * Name: stm32_deselect + * + * Description: + * De-select the LCD device + * + **************************************************************************************/ + +static void stm32_deselect(FAR struct ssd1289_lcd_s *dev) +{ + /* Does not apply to this hardware */ +} + +/************************************************************************************** + * Name: stm32_deselect + * + * Description: + * Set the index register + * + **************************************************************************************/ + +static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index) +{ + putreg16((uint16_t)index, LCD_INDEX); +} + +/************************************************************************************** + * Name: stm32_read + * + * Description: + * Read LCD data (GRAM data or register contents) + * + **************************************************************************************/ + +#ifndef CONFIG_SSD1289_WRONLY +static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev) +{ + return getreg16(LCD_DATA); +} +#endif + +/************************************************************************************** + * Name: stm32_write + * + * Description: + * Write LCD data (GRAM data or register contents) + * + **************************************************************************************/ + +static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data) +{ + putreg16((uint16_t)data, LCD_DATA); +} + +/************************************************************************************** + * Name: stm32_write + * + * Description: + * Write LCD data (GRAM data or register contents) + * + **************************************************************************************/ + +static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power) +{ +#warning "Missing logic" +} + +/************************************************************************************ + * Name: stm32_selectlcd + * + * Description: + * Initialize to the LCD + * + ************************************************************************************/ + +void stm32_selectlcd(void) +{ + /* Configure GPIO pins */ + + stm32_extmemdata(LCD_NDATALINES); /* Common data lines: D0-D15 */ + stm32_extmemgpios(g_lcdconfig, NLCD_CONFIG); /* LCD-specific control lines */ + + /* Enable AHB clocking to the FSMC */ + + stm32_enablefsmc(); + + /* Color LCD configuration (LCD configured as follow): + * + * - Data/Address MUX = Disable "FSMC_BCR_MUXEN" just not enable it. + * - Extended Mode = Disable "FSMC_BCR_EXTMOD" + * - Memory Type = SRAM "FSMC_BCR_SRAM" + * - Data Width = 16bit "FSMC_BCR_MWID16" + * - Write Operation = Enable "FSMC_BCR_WREN" + * - Asynchronous Wait = Disable + */ + + /* Bank1 NOR/SRAM control register configuration */ + + putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) | FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) | + FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | FSMC_BTR_ACCMODA, STM32_FSMC_BTR1); + + putreg32(0xffffffff, STM32_FSMC_BWTR1); + + /* Enable the bank by setting the MBKEN bit */ + + putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1); +} + +/************************************************************************************** + * Public Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + **************************************************************************************/ + +int board_lcd_initialize(void) +{ + /* Only initialize the driver once */ + + if (!g_ssd1289drvr) + { + lcdvdbg("Initializing\n"); + + /* Configure GPIO pins and configure the FSMC to support the LCD */ + + stm32_selectlcd(); + + /* Reset the LCD (active low) */ + + stm32_gpiowrite(GPIO_LCD_RESET, false); + up_mdelay(5); + stm32_gpiowrite(GPIO_LCD_RESET, true); + + /* Configure and enable the LCD */ + + up_mdelay(50); + g_ssd1289drvr = ssd1289_lcdinitialize(&g_ssd1289); + if (!g_ssd1289drvr) + { + lcddbg("ERROR: ssd1289_lcdinitialize failed\n"); + return -ENODEV; + } + } + + /* Clear the display (setting it to the color 0=black) */ + +#if 0 /* Already done in the driver */ + ssd1289_clear(g_ssd1289drvr, 0); +#endif + + /* Turn the display off */ + + g_ssd1289drvr->setpower(g_ssd1289drvr, 0); + return OK; +} + +/************************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows support + * for multiple LCD devices. + * + **************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return g_ssd1289drvr; +} + +/************************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Unitialize the LCD support + * + **************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* Turn the display off */ + + g_ssd1289drvr->setpower(g_ssd1289drvr, 0); +} + +#endif /* CONFIG_LCD_SSD1289 */ + + diff --git a/configs/stm32f4discovery/src/stm32_ssd1351.c b/configs/stm32f4discovery/src/stm32_ssd1351.c new file mode 100644 index 0000000000000000000000000000000000000000..26e77e8ee05c9826c9915d12fe9816e50d2adea4 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_ssd1351.c @@ -0,0 +1,142 @@ +/**************************************************************************** + * configs/stm32f4discovery/src/stm32_ssd1351.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm32_spi.h" + +#include "stm32f4discovery.h" + +#ifdef CONFIG_LCD_SSD1351 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ +/* The pin configurations here require that SPI1 is selected */ + +#ifndef CONFIG_STM32_SPI1 +# error "The OLED driver requires CONFIG_STM32_SPI1 in the configuration" +#endif + +#ifndef CONFIG_SSD1351_SPI4WIRE +# error "The configuration requires the SPI 4-wire interface" +#endif + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) dbg(format, ##__VA_ARGS__) +# define lcdvdbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED GPIOs. This initial configuration is RESET low, + * putting the OLED into reset state. + */ + + (void)stm32_configgpio(GPIO_OLED_RESET); + + /* Wait a bit then release the OLED from the reset state */ + + up_mdelay(20); + stm32_gpiowrite(GPIO_OLED_RESET, true); + + /* Get the SPI1 port interface */ + + spi = stm32_spibus_initialize(1); + if (spi == NULL) + { + lcddbg("Failed to initialize SPI port 1\n"); + } + else + { + /* Bind the SPI port to the OLED */ + + dev = ssd1351_initialize(spi, devno); + if (dev == NULL) + { + lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno); + } + else + { + lcdvdbg("Bound SPI port 1 to OLED %d\n", devno); + + /* And turn the OLED on */ + + (void)dev->setpower(dev, LCD_FULL_ON); + return dev; + } + } + + return NULL; +} + +#endif /* CONFIG_LCD_SSD1351 */ diff --git a/configs/stm32f4discovery/src/stm32_timer.c b/configs/stm32f4discovery/src/stm32_timer.c new file mode 100644 index 0000000000000000000000000000000000000000..326f2f25c09a2b73c2310a173c6e930d7c15a900 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_timer.c @@ -0,0 +1,81 @@ +/**************************************************************************** + * config/stm32f4discovery/src/stm32_timer.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * With modifications from Calvin Maguranis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +#include "stm32_tim.h" +#include "stm32f4discovery.h" + +#ifdef CONFIG_TIMER + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_timer_driver_setup + * + * Description: + * Configure the timer driver. + * + * Input Parameters: + * devpath - The full path to the timer device. This should be of the form /dev/timer0 + * timer - The timer's number. + * + * Returned Values: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int stm32_timer_driver_setup(FAR const char *devpath, int timer) +{ + return stm32_timer_initialize(devpath, timer); +} + +#endif diff --git a/configs/stm32f4discovery/src/stm32_ug2864ambag01.c b/configs/stm32f4discovery/src/stm32_ug2864ambag01.c new file mode 100644 index 0000000000000000000000000000000000000000..24e5c840341518a37918d7395c738644d6296b29 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_ug2864ambag01.c @@ -0,0 +1,163 @@ +/**************************************************************************** + * config/stm32f4discovery/src/stm32_ug2864ambag01.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm32_spi.h" + +#include "stm32f4discovery.h" + +#ifdef CONFIG_LCD_UG2864AMBAG01 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* The pin configurations here require that SPI1 is selected */ + +#ifndef CONFIG_STM32_SPI1 +# error "The OLED driver requires CONFIG_STM32_SPI1 in the configuration" +#endif + +#ifndef CONFIG_SPI_CMDDATA +# error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration" +#endif + +/* Pin Configuration ********************************************************/ +/* UG-2864AMBAG01 OLED Display (SPI 4-wire): + * + * --------------------------+---------------------------------------------- + * Connector CON10 J1: | STM32F4Discovery + * --------------+-----------+---------------------------------------------- + * CON10 J1: | CON20 J2: | P1/P2: + * --------------+-----------+---------------------------------------------- + * 1 3v3 | 3,4 3v3 | P2 3V + * 3 /RESET | 8 /RESET | P2 PB6 (Arbitrary selection) + * 5 /CS | 7 /CS | P2 PB7 (Arbitrary selection)(2) + * 7 A0 | 9 A0 | P2 PB8 (Arbitrary selection)(2) + * 9 LED+ (N/C) | ----- | ----- + * 2 5V Vcc | 1,2 Vcc | P2 5V + * 4 DI | 18 D1/SI | P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1 (1)) + * 6 SCLK | 19 D0/SCL | P1 PA5 (GPIO_SPI1_SCK == GPIO_SPI1_SCK_1 (2)) + * 8 LED- (N/C) | ----- | ------ + * 10 GND | 20 GND | P2 GND + * --------------+-----------+---------------------------------------------- + * (1) Required because of on-board MEMS + * (2) Note that the OLED CS and A0 are managed in the stm32_spi.c file. + * ------------------------------------------------------------------------- + */ + +/* Definitions in stm32f4discovery.h */ + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) dbg(format, ##__VA_ARGS__) +# define lcdvdbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED GPIOs. This initial configuration is RESET low, + * putting the OLED into reset state. + */ + + (void)stm32_configgpio(GPIO_OLED_RESET); + + /* Wait a bit then release the OLED from the reset state */ + + up_mdelay(20); + stm32_gpiowrite(GPIO_OLED_RESET, true); + + /* Get the SPI1 port interface */ + + spi = stm32_spibus_initialize(1); + if (!spi) + { + lcddbg("Failed to initialize SPI port 1\n"); + } + else + { + /* Bind the SPI port to the OLED */ + + dev = ug2864ambag01_initialize(spi, devno); + if (!dev) + { + lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno); + } + else + { + lcdvdbg("Bound SPI port 1 to OLED %d\n", devno); + + /* And turn the OLED on */ + + (void)dev->setpower(dev, CONFIG_LCD_MAXPOWER); + return dev; + } + } + + return NULL; +} +#endif /* CONFIG_LCD_UG2864AMBAG01 */ diff --git a/configs/stm32f4discovery/src/stm32_ug2864hsweg01.c b/configs/stm32f4discovery/src/stm32_ug2864hsweg01.c new file mode 100644 index 0000000000000000000000000000000000000000..78c24bc368316c88014cef0396a58a776161023a --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_ug2864hsweg01.c @@ -0,0 +1,163 @@ +/**************************************************************************** + * config/stm32f4discovery/src/stm32_ug2864hsweg01.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm32_spi.h" + +#include "stm32f4discovery.h" + +#ifdef CONFIG_LCD_UG2864HSWEG01 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* The pin configurations here require that SPI1 is selected */ + +#ifndef CONFIG_STM32_SPI1 +# error "The OLED driver requires CONFIG_STM32_SPI1 in the configuration" +#endif + +#ifndef CONFIG_SPI_CMDDATA +# error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration" +#endif + +/* Pin Configuration ********************************************************/ +/* UG-2864HSWEG01 OLED Display (SPI 4-wire): + * + * --------------------------+---------------------------------------------- + * Connector CON10 J1: | STM32F4Discovery + * --------------+-----------+---------------------------------------------- + * CON10 J1: | CON20 J2: | P1/P2: + * --------------+-----------+---------------------------------------------- + * 1 3v3 | 3,4 3v3 | P2 3V + * 3 /RESET | 8 /RESET | P2 PB6 (Arbitrary selection) + * 5 /CS | 7 /CS | P2 PB7 (Arbitrary selection)(2) + * 7 D/C | 9 D/C | P2 PB8 (Arbitrary selection)(2) + * 9 LED+ (N/C) | ----- | ----- + * 2 5V Vcc | 1,2 Vcc | P2 5V + * 4 DI | 18 D1/SI | P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1 (1)) + * 6 SCLK | 19 D0/SCL | P1 PA5 (GPIO_SPI1_SCK == GPIO_SPI1_SCK_1 (2)) + * 8 LED- (N/C) | ----- | ------ + * 10 GND | 20 GND | P2 GND + * --------------+-----------+---------------------------------------------- + * (1) Required because of on-board MEMS + * (2) Note that the OLED CS and D/C are managed in the stm32_spi.c file. + * ------------------------------------------------------------------------- + */ + +/* Definitions in stm32f4discovery.h */ + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) dbg(format, ##__VA_ARGS__) +# define lcdvdbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED GPIOs. This initial configuration is RESET low, + * putting the OLED into reset state. + */ + + (void)stm32_configgpio(GPIO_OLED_RESET); + + /* Wait a bit then release the OLED from the reset state */ + + up_mdelay(20); + stm32_gpiowrite(GPIO_OLED_RESET, true); + + /* Get the SPI1 port interface */ + + spi = stm32_spibus_initialize(1); + if (!spi) + { + lcddbg("Failed to initialize SPI port 1\n"); + } + else + { + /* Bind the SPI port to the OLED */ + + dev = ssd1306_initialize(spi, devno); + if (!dev) + { + lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno); + } + else + { + lcdvdbg("Bound SPI port 1 to OLED %d\n", devno); + + /* And turn the OLED on */ + + (void)dev->setpower(dev, CONFIG_LCD_MAXPOWER); + return dev; + } + } + + return NULL; +} +#endif /* CONFIG_LCD_UG2864AMBAG01 */ diff --git a/configs/stm32f4discovery/src/stm32_uid.c b/configs/stm32f4discovery/src/stm32_uid.c new file mode 100644 index 0000000000000000000000000000000000000000..a3947a6c38587bf1027e2ac5509da8373cc5b7e3 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_uid.c @@ -0,0 +1,70 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_uid.c + * + * Copyright (C) 2015 Marawan Ragab. All rights reserved. + * Author: Marawan Ragab + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include "stm32_uid.h" + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifndef OK +# define OK 0 +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#if defined(CONFIG_BOARDCTL_UNIQUEID) +int board_uniqueid(uint8_t *uniqueid) +{ + if (uniqueid == 0) + { + return -EINVAL; + } + + stm32_get_uniqueid(uniqueid); + return OK; +} +#endif diff --git a/configs/stm32f4discovery/src/stm32_usb.c b/configs/stm32f4discovery/src/stm32_usb.c new file mode 100644 index 0000000000000000000000000000000000000000..24f35f726a1d247e70610507b637645c33e649a3 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_usb.c @@ -0,0 +1,336 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_usb.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "stm32.h" +#include "stm32_otgfs.h" +#include "stm32f4discovery.h" + +#ifdef CONFIG_STM32_OTGFS + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST) +# define HAVE_USB 1 +#else +# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST" +# undef HAVE_USB +#endif + +#ifndef CONFIG_STM32F4DISCO_USBHOST_PRIO +# define CONFIG_STM32F4DISCO_USBHOST_PRIO 100 +#endif + +#ifndef CONFIG_STM32F4DISCO_USBHOST_STACKSIZE +# define CONFIG_STM32F4DISCO_USBHOST_STACKSIZE 1024 +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static struct usbhost_connection_s *g_usbconn; +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: usbhost_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +static int usbhost_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + uvdbg("Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + uvdbg("%s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the STM32F4Discovery board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ + /* The OTG FS has an internal soft pull-up. No GPIO configuration is required */ + + /* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */ + +#ifdef CONFIG_STM32_OTGFS + stm32_configgpio(GPIO_OTGFS_VBUS); + stm32_configgpio(GPIO_OTGFS_PWRON); + stm32_configgpio(GPIO_OTGFS_OVER); +#endif +} + +/*********************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +int stm32_usbhost_initialize(void) +{ + int pid; +#if defined(CONFIG_USBHOST_HUB) || defined(CONFIG_USBHOST_MSC) || \ + defined(CONFIG_USBHOST_HIDKBD) || defined(CONFIG_USBHOST_HIDMOUSE) + int ret; +#endif + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + uvdbg("Register class drivers\n"); + +#ifdef CONFIG_USBHOST_HUB + /* Initialize USB hub class support */ + + ret = usbhost_hub_initialize(); + if (ret < 0) + { + udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB mass storage class class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_HIDKBD + /* Initialize the HID keyboard class */ + + ret = usbhost_kbdinit(); + if (ret != OK) + { + udbg("Failed to register the HID keyboard class\n"); + } +#endif + +#ifdef CONFIG_USBHOST_HIDMOUSE + /* Initialize the HID mouse class */ + + ret = usbhost_mouse_init(); + if (ret != OK) + { + udbg("Failed to register the HID mouse class\n"); + } +#endif + + /* Then get an instance of the USB host interface */ + + uvdbg("Initialize USB host\n"); + g_usbconn = stm32_otgfshost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + uvdbg("Start usbhost_waiter\n"); + + pid = task_create("usbhost", CONFIG_STM32F4DISCO_USBHOST_PRIO, + CONFIG_STM32F4DISCO_USBHOST_STACKSIZE, + (main_t)usbhost_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + + return -ENODEV; +} +#endif + +/*********************************************************************************** + * Name: stm32_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be provided be + * each platform that implements the STM32 OTG FS host interface + * + * "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump + * or, if 5 V are available on the application board, a basic power switch, must + * be added externally to drive the 5 V VBUS line. The external charge pump can + * be driven by any GPIO output. When the application decides to power on VBUS + * using the chosen GPIO, it must also set the port power bit in the host port + * control and status register (PPWR bit in OTG_FS_HPRT). + * + * "The application uses this field to control power to this port, and the core + * clears this bit on an overcurrent condition." + * + * Input Parameters: + * iface - For future growth to handle multiple USB host interface. Should be zero. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ***********************************************************************************/ + +#ifdef CONFIG_USBHOST +void stm32_usbhost_vbusdrive(int iface, bool enable) +{ + DEBUGASSERT(iface == 0); + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, false); + } + else + { + /* Disable the Power Switch by driving the enable pin high */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, true); + } +} +#endif + +/************************************************************************************ + * Name: stm32_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent condition is + * detected. + * + * Input Parameter: + * handler - New overcurrent interrupt handler + * + * Returned value: + * Old overcurrent interrupt handler + * + ************************************************************************************/ + +#ifdef CONFIG_USBHOST +xcpt_t stm32_setup_overcurrent(xcpt_t handler) +{ + return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler); +} +#endif + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} +#endif + +#endif /* CONFIG_STM32_OTGFS */ diff --git a/configs/stm32f4discovery/src/stm32_userleds.c b/configs/stm32f4discovery/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..1401ca2bb4cbe2a52b03c45852ee02ecdf038ed5 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_userleds.c @@ -0,0 +1,250 @@ +/**************************************************************************** + * configs/stm32f4discovery/src/stm32_userleds.c + * + * Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "stm32f4discovery.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* This array maps an LED number to GPIO pin configuration */ + +static uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4 +}; + +/**************************************************************************** + * Private Function Protototypes + ****************************************************************************/ + +/* LED Power Management */ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_PM +static struct pm_callback_s g_ledscb = +{ + .notify = led_pm_notify, + .prepare = led_pm_prepare, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + switch (pmstate) + { + case(PM_NORMAL): + { + /* Restore normal LEDs operation */ + + } + break; + + case(PM_IDLE): + { + /* Entering IDLE mode - Turn leds off */ + + } + break; + + case(PM_STANDBY): + { + /* Entering STANDBY mode - Logic for PM_STANDBY goes here */ + + } + break; + + case(PM_SLEEP): + { + /* Entering SLEEP mode - Logic for PM_SLEEP goes here */ + + } + break; + + default: + { + /* Should not get here */ + + } + break; + } +} +#endif + +/**************************************************************************** + * Name: led_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* No preparation to change power modes is required by the LEDs driver. + * We always accept the state change by returning OK. + */ + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + stm32_gpiowrite(g_ledcfg[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0); + stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0); + stm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) == 0); + stm32_gpiowrite(GPIO_LED4, (ledset & BOARD_LED4_BIT) == 0); +} + +/**************************************************************************** + * Name: stm32_led_pminitialize + ****************************************************************************/ + +#ifdef CONFIG_PM +void stm32_led_pminitialize(void) +{ + /* Register to receive power management callbacks */ + + int ret = pm_register(&g_ledscb); + if (ret != OK) + { + board_autoled_on(LED_ASSERTION); + } +} +#endif /* CONFIG_PM */ + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/stm32f4discovery/src/stm32_watchdog.c b/configs/stm32f4discovery/src/stm32_watchdog.c new file mode 100644 index 0000000000000000000000000000000000000000..b238bc5d43be425b8fb2bfca672d0ad3eafdf49f --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_watchdog.c @@ -0,0 +1,135 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_watchdog.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Wathdog hardware should be enabled */ + +#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG) +# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_STM32_WDG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0" +# endif +#endif + +/* Use the un-calibrated LSI frequency if we have nothing better */ + +#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ) +# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecuture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ + /* Initialize tha register the watchdog timer device */ + +#if defined(CONFIG_STM32_WWDG) + stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH); + return OK; +#elif defined(CONFIG_STM32_IWDG) + stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ); + return OK; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/stm32f4discovery/src/stm32_zerocross.c b/configs/stm32f4discovery/src/stm32_zerocross.c new file mode 100644 index 0000000000000000000000000000000000000000..23154764487a0ab5b482610c9b504e52252f2902 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_zerocross.c @@ -0,0 +1,205 @@ +/**************************************************************************** + * configs/stm32f4discovery/src/stm32_zerocross.c + * + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm32f4discovery.h" + +#ifdef CONFIG_ZEROCROSS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void zcross_enable(FAR const struct zc_lowerhalf_s *lower, + zc_interrupt_t handler, FAR void *arg); + +static void zcross_disable(void); +static int zcross_interrupt(int irq, FAR void *context); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Current interrupt handler and argument */ + +static zc_interrupt_t g_zcrosshandler; +static FAR void *g_zcrossarg; + +/* This is the zero cross lower half driver interface */ + +static const struct zc_lowerhalf_s g_zcrosslower = +{ + .zc_enable = zcross_enable, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: zcross_enable + * + * Description: + * Enable interrupts on the selected zero cross pin. And empty + * set will disable all interrupts. + * + ****************************************************************************/ + +static void zcross_enable(FAR const struct zc_lowerhalf_s *lower, + zc_interrupt_t handler, FAR void *arg) +{ + irqstate_t flags; + bool rising = false; + bool falling = true; + int i; + + /* Start with all interrupts disabled */ + + flags = enter_critical_section(); + zcross_disable(); + + snllvdbg("handler: %p arg: %p\n", handler, arg); + + if (handler) + { + g_zcrosshandler = handler; + g_zcrossarg = arg; + } + + (void)stm32_gpiosetevent(GPIO_ZEROCROSS, rising, falling, + true, zcross_interrupt); + + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: zcross_disable + * + * Description: + * Disable all joystick interrupts + * + ****************************************************************************/ + +static void zcross_disable(void) +{ + irqstate_t flags; + int i; + + /* Disable zero cross pin interrupt */ + + flags = enter_critical_section(); + + (void)stm32_gpiosetevent(GPIO_ZEROCROSS, false, false, false, NULL); + + leave_critical_section(flags); + + /* Nullify the handler and argument */ + + g_zcrosshandler = NULL; + g_zcrossarg = NULL; +} + +/**************************************************************************** + * Name: zcross_interrupt + * + * Description: + * Zero Cross interrupt handler + * + ****************************************************************************/ + +static int zcross_interrupt(int irq, FAR void *context) +{ + DEBUGASSERT(g_zcrosshandler); + if (g_zcrosshandler) + { + g_zcrosshandler(&g_zcrosslower, g_zcrossarg); + } + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_zerocross_initialize + * + * Description: + * Initialize and register the zero cross driver + * + ****************************************************************************/ + +int stm32_zerocross_initialize(void) +{ + int i; + + /* Configure the GPIO pin as input. NOTE: This is unnecessary for + * interrupting pins since it will also be done by stm32_gpiosetevent(). + */ + + stm32_configgpio(GPIO_ZEROCROSS); + + /* Make sure that all interrupts are disabled */ + + zcross_disable(); + + /* Register the zero cross device as /dev/zc0 */ + + return zc_register("/dev/zc0", &g_zcrosslower); +} + +#endif /* CONFIG_ZEROCROSS */ diff --git a/configs/stm32f4discovery/src/stm32f4discovery.h b/configs/stm32f4discovery/src/stm32f4discovery.h new file mode 100644 index 0000000000000000000000000000000000000000..ffbb25ee53880a3c5ec347aa8650e6a7bf260405 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32f4discovery.h @@ -0,0 +1,626 @@ +/**************************************************************************** + * configs/stm32f4discovery/src/stm32f4discovery.h + * + * Copyright (C) 2011-2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_STM32F4DISCOVERY_SRC_STM32F4DISCOVERY_H +#define __CONFIGS_STM32F4DISCOVERY_SRC_STM32F4DISCOVERY_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration *************************************************************/ +/* How many SPI modules does this chip support? */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 3 +# undef CONFIG_STM32_SPI3 +#endif + +#define PCA9635_I2CBUS 1 +#define PCA9635_I2CADDR 0x40 + +/* Assume that we have everything */ + +#define HAVE_USBDEV 1 +#define HAVE_USBHOST 1 +#define HAVE_USBMONITOR 1 +#define HAVE_SDIO 1 +#define HAVE_RTC_DRIVER 1 +#define HAVE_ELF 1 +#define HAVE_NETMONITOR 1 + +/* Can't support USB host or device features if USB OTG FS is not enabled */ + +#ifndef CONFIG_STM32_OTGFS +# undef HAVE_USBDEV +# undef HAVE_USBHOST +# undef HAVE_USBMONITOR +#endif + +/* Can't support USB device monitor if USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +# undef HAVE_USBMONITOR +#endif + +/* Can't support USB host is USB host is not enabled */ + +#ifndef CONFIG_USBHOST +# undef HAVE_USBHOST +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR) +# undef HAVE_USBMONITOR +#endif + +/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support + * is not enabled. + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SDIO) +# undef HAVE_SDIO +#endif + +#undef SDIO_MINOR /* Any minor number, default 0 */ +#define SDIO_SLOTNO 0 /* Only one slot */ + +#ifdef HAVE_SDIO + +# if !defined(CONFIG_NSH_MMCSDSLOTNO) +# define CONFIG_NSH_MMCSDSLOTNO SDIO_SLOTNO +# elif CONFIG_NSH_MMCSDSLOTNO != 0 +# warning "Only one MMC/SD slot, slot 0" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO SDIO_SLOTNO +# endif + +# if defined(CONFIG_NSH_MMCSDMINOR) +# define SDIO_MINOR CONFIG_NSH_MMCSDMINOR +# else +# define SDIO_MINOR 0 +# endif + + /* SD card bringup does not work if performed on the IDLE thread because it + * will cause waiting. Use either: + * + * CONFIG_LIB_BOARDCTL=y, OR + * CONFIG_BOARD_INITIALIZE=y && CONFIG_BOARD_INITTHREAD=y + */ + +# if defined(CONFIG_BOARD_INITIALIZE) && !defined(CONFIG_BOARD_INITTHREAD) +# warning "SDIO initialization cannot be perfomed on the IDLE thread" +# undef HAVE_SDIO +# endif +#endif + +/* Check if we can support the RTC driver */ + +#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER) +# undef HAVE_RTC_DRIVER +#endif + +/* ELF */ + +#if defined(CONFIG_BINFMT_DISABLE) || !defined(CONFIG_ELF) +# undef HAVE_ELF +#endif + +/* NSH Network monitor */ + +#if !defined(CONFIG_NET) || !defined(CONFIG_STM32_EMACMAC) +# undef HAVE_NETMONITOR +#endif + +#if !defined(CONFIG_NSH_NETINIT_THREAD) || !defined(CONFIG_ARCH_PHY_INTERRUPT) || \ + !defined(CONFIG_NETDEV_PHY_IOCTL) || !defined(CONFIG_NET_UDP) || \ + defined(CONFIG_DISABLE_SIGNALS) +# undef HAVE_NETMONITOR +#endif + +/* The NSH Network Monitor cannot be used with the STM32F4DIS-BB base board. + * That is because the LAN8720 is configured in REF_CLK OUT mode. In that + * mode, the PHY interrupt is not supported. The NINT pin serves instead as + * REFLCK0. + */ + +#ifdef CONFIG_STM32F4DISBB +# undef HAVE_NETMONITOR +#endif + +/* procfs File System */ + +#ifdef CONFIG_FS_PROCFS +# ifdef CONFIG_NSH_PROC_MOUNTPOINT +# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT +# else +# define STM32_PROCFS_MOUNTPOINT "/proc" +# endif +#endif + +/* STM32F4 Discovery GPIOs **************************************************/ +/* LEDs */ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN12) +#define GPIO_LED2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN13) +#define GPIO_LED3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN14) +#define GPIO_LED4 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN15) + +/* BUTTONS -- NOTE that all have EXTI interrupts configured */ + +#define MIN_IRQBUTTON BUTTON_USER +#define MAX_IRQBUTTON BUTTON_USER +#define NUM_IRQBUTTONS 1 + +#define GPIO_BTN_USER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0) + +/* ZERO CROSS pin definiton */ + +#define GPIO_ZEROCROSS (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTD|GPIO_PIN0) + +/* PWM + * + * The STM32F4 Discovery has no real on-board PWM devices, but the board can be + * configured to output a pulse train using TIM4 CH2 on PD13. + */ + +#define STM32F4DISCOVERY_PWMTIMER 4 +#define STM32F4DISCOVERY_PWMCHANNEL 2 + +/* SPI chip selects */ + +#define GPIO_CS_MEMS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3) + +#define GPIO_MAX31855_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN8) + +#define GPIO_MAX6675_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN8) + +/* USB OTG FS + * + * PA9 OTG_FS_VBUS VBUS sensing (also connected to the green LED) + * PC0 OTG_FS_PowerSwitchOn + * PD5 OTG_FS_Overcurrent + */ + +#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\ + GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9) +#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\ + GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN0) + +#ifdef CONFIG_USBHOST +# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|\ + GPIO_SPEED_100MHz|GPIO_PUSHPULL|\ + GPIO_PORTD|GPIO_PIN5) + +#else +# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\ + GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN5) +#endif + +/* UG-2864AMBAG01 or UG-2864HSWEG01 OLED Display (SPI 4-wire): + * + * --------------------------+---------------------------------------------- + * Connector CON10 J1: | STM32F4Discovery + * --------------+-----------+---------------------------------------------- + * CON10 J1: | CON20 J2: | P1/P2: + * --------------+-----------+---------------------------------------------- + * 1 3v3 | 3,4 3v3 | P2 3V + * 3 /RESET | 8 /RESET | P2 PB6 (Arbitrary selection) + * 5 /CS | 7 /CS | P2 PB7 (Arbitrary selection) + * 7 A0|D/C | 9 A0|D/C | P2 PB8 (Arbitrary selection) + * 9 LED+ (N/C) | ----- | ----- + * 2 5V Vcc | 1,2 Vcc | P2 5V + * 4 DI | 18 D1/SI | P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1 (1)) + * 6 SCLK | 19 D0/SCL | P1 PA5 (GPIO_SPI1_SCK == GPIO_SPI1_SCK_1 (1)) + * 8 LED- (N/C) | ----- | ------ + * 10 GND | 20 GND | P2 GND + * --------------+-----------+---------------------------------------------- + * (1) Required because of on-board MEMS + * ------------------------------------------------------------------------- + */ + +#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) || \ + defined(CONFIG_LCD_SSD1351) +# define GPIO_OLED_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN6) +# define GPIO_OLED_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN7) +# define GPIO_OLED_A0 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN8) +# define GPIO_OLED_DC GPIO_OLED_A0 +#endif + +/* STM32F4DIS-BB MicroSD + * + * ---------- ------------- ------------------------------ + * PIO SIGNAL Comments + * ---------- ------------- ------------------------------ + * PB15 NCD Pulled up externally + * PC9 DAT1 Configured by driver + * PC8 DAT0 " " "" " " + * PC12 CLK " " "" " " + * PD2 CMD " " "" " " + * PC11 CD/DAT3 " " "" " " + * PC10 DAT2 " " "" " " + * ---------- ------------- ------------------------------ + */ + +#if defined(CONFIG_STM32F4DISBB) && defined(CONFIG_STM32_SDIO) +# define GPIO_SDIO_NCD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|\ + GPIO_PORTB|GPIO_PIN15) +#endif + +/* STM32F4DIS-BB LAN8720 + * + * ---------- ------------- ------------------------------ + * PIO SIGNAL Comments + * ---------- ------------- ------------------------------ + * PB11 TXEN Configured by driver + * PB12 TXD0 " " "" " " + * PB13 TXD1 " " "" " " + * PC4 RXD0/MODE0 " " "" " " + * PC5 RXD1/MODE1 " " "" " " + * PA7 CRS_DIV/MODE2 " " "" " " + * PA2 MDIO " " "" " " + * PC1 MDC " " "" " " + * PA1 NINT/REFCLK0 " " "" " " + * PE2 DAT2 " " "" " " + * ---------- ------------- ------------------------------ + */ + +#if defined(CONFIG_STM32F4DISBB) && defined(CONFIG_STM32_ETHMAC) +# define GPIO_EMAC_NINT (GPIO_INPUT|GPIO_PULLUP|GPIO_EXTI|\ + GPIO_PORTA|GPIO_PIN1) +# define GPIO_EMAC_NRST (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN2) +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32f4discovery + * board. + * + ****************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +/**************************************************************************** + * Name: stm32_bmp180initialize + * + * Description: + * Called to configure an I2C and to register BMP180 for the stm32f4discovery + * board. + * + ****************************************************************************/ + +#ifdef CONFIG_BMP180 +int stm32_bmp180initialize(FAR const char *devpath); +#endif + +/**************************************************************************** + * Name: stm32_bringup + * + * Description: + * Perform architecture-specific initialization + * + * CONFIG_BOARD_INITIALIZE=y : + * Called from board_initialize(). + * + * CONFIG_BOARD_INITIALIZE=y && CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + ****************************************************************************/ + +int stm32_bringup(void); + +/**************************************************************************** + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in initialization to setup + * USB-related GPIO pins for the STM32F4Discovery board. + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_OTGFS +void weak_function stm32_usbinitialize(void); +#endif + +/**************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host + * functionality. This function will start a thread that will monitor for + * device connection/disconnection events. + * + ****************************************************************************/ + +#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST) +int stm32_usbhost_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for external memory usage + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_extmemgpios(const uint32_t *gpios, int ngpios); +#endif + +/**************************************************************************** + * Name: stm32_extmemaddr + * + * Description: + * Initialize adress line GPIOs for external memory access + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_extmemaddr(int naddrs); +#endif + +/**************************************************************************** + * Name: stm32_extmemdata + * + * Description: + * Initialize data line GPIOs for external memory access + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_extmemdata(int ndata); +#endif + +/**************************************************************************** + * Name: stm32_enablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_enablefsmc(void); +#endif + +/**************************************************************************** + * Name: stm32_disablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_disablefsmc(void); +#endif + +/**************************************************************************** + * Name: stm32_led_pminitialize + * + * Description: + * Enable logic to use the LEDs on the STM32F4Discovery to support power + * management testing + * + ****************************************************************************/ + +#ifdef CONFIG_PM +void stm32_led_pminitialize(void); +#endif + +/**************************************************************************** + * Name: stm32_pm_buttons + * + * Description: + * Configure the user button of the STM32f4discovery board as EXTI, + * so it is able to wakeup the MCU from the PM_STANDBY mode + * + ****************************************************************************/ + +#if defined(CONFIG_PM) && defined(CONFIG_ARCH_IDLE_CUSTOM) && defined(CONFIG_PM_BUTTONS) +void stm32_pm_buttons(void); +#endif + +/**************************************************************************** + * Name: stm32_bringup + * + * Description: + * Perform architecture-specific initialization + * + * CONFIG_BOARD_INITIALIZE=y : + * Called from board_initialize(). + * + * CONFIG_BOARD_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + ****************************************************************************/ + +int stm32_bringup(void); + +/**************************************************************************** + * Name: stm32_sdio_initialize + * + * Description: + * Initialize SDIO-based MMC/SD card support + * + ****************************************************************************/ + +#if !defined(CONFIG_DISABLE_MOUNTPOINT) && defined(CONFIG_STM32_SDIO) +int stm32_sdio_initialize(void); +#endif + +/************************************************************************************ + * Name: stm32_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ************************************************************************************/ + +#ifdef HAVE_NETMONITOR +void weak_function stm32_netinitialize(void); +#endif + +/**************************************************************************** + * Name: stm32_zerocross_initialize + * + * Description: + * Initialize and register the zero cross driver + * + ****************************************************************************/ + +#ifdef CONFIG_ZEROCROSS +int stm32_zerocross_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_max6675initialize + * + * Description: + * Initialize and register the max6675 driver + * + ****************************************************************************/ + +#ifdef CONFIG_MAX6675 +int stm32_max6675initialize(FAR const char *devpath); +#endif + +/**************************************************************************** + * Name: stm32_pca9635_initialize + * + * Description: + * This function is called by board initialization logic to configure the + * LED PWM chip. This function will register the driver as /dev/leddrv0. + * + * Input Parameters: + * None + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef CONFIG_PCA9635PW +int stm32_pca9635_initialize(void); +#endif + +/**************************************************************************** + * Name stm32_rgbled_setup + * + * Description: + * This function is called by board initialization logic to configure the + * RGB LED driver. This function will register the driver as /dev/rgbled0. + * + * Input Parameters: + * None + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef CONFIG_RGBLED +int stm32_rgbled_setup(void); +#endif + +/**************************************************************************** + * Name: stm32_timer_driver_setup + * + * Description: + * Configure the timer driver. + * + * Input Parameters: + * devpath - The full path to the timer device. This should be of the + * form /dev/timer0 + * timer - The timer's number. + * + * Returned Values: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_TIMER +int stm32_timer_driver_setup(FAR const char *devpath, int timer); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_STM32F4DISCOVERY_SRC_STM32F4DISCOVERY_H */ diff --git a/configs/stm32f4discovery/uavcan/Make.defs b/configs/stm32f4discovery/uavcan/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e911bdd2d531defbd345df99450ea71926b533ab --- /dev/null +++ b/configs/stm32f4discovery/uavcan/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f4discovery/uavcan/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f4discovery/uavcan/defconfig b/configs/stm32f4discovery/uavcan/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..abdde2ee94934aa496e86483a91fcbabfc915a15 --- /dev/null +++ b/configs/stm32f4discovery/uavcan/defconfig @@ -0,0 +1,1002 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f4discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set + +# +# Board-Specific Options +# +# CONFIG_STM32F4DISBB is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="uavcan_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +# CONFIG_SERIAL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +CONFIG_RAMLOG=y +CONFIG_RAMLOG_SYSLOG=y +CONFIG_RAMLOG_BUFSIZE=1024 +# CONFIG_RAMLOG_CRLF is not set +CONFIG_RAMLOG_NONBLOCKING=y +CONFIG_RAMLOG_NPOLLWAITERS=4 + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_CHAR is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +CONFIG_C99_BOOL8=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# +CONFIG_CANUTILS_UAVCAN=y +CONFIG_UAVCAN_LIBUAVCAN_URL="https://github.com/UAVCAN/libuavcan/archive" +CONFIG_UAVCAN_LIBUAVCAN_VERSION="531433a3261ff1568e824c240d0f1c6ecef73be1" +CONFIG_UAVCAN_DSDL_URL="https://github.com/UAVCAN/dsdl/archive" +CONFIG_UAVCAN_DSDL_VERSION="9804a3e6972825586be252ce08dd899f44994b14" +CONFIG_UAVCAN_PYUAVCAN_URL="https://github.com/UAVCAN/pyuavcan/archive" +CONFIG_UAVCAN_PYUAVCAN_VERSION="4e2798ec3da8e8493b769da514f3b96eea5773e2" +CONFIG_UAVCAN_STM32_NUM_IFACES=1 +# CONFIG_UAVCAN_STM32_TIM2 is not set +# CONFIG_UAVCAN_STM32_TIM3 is not set +# CONFIG_UAVCAN_STM32_TIM4 is not set +# CONFIG_UAVCAN_STM32_TIM5 is not set +CONFIG_UAVCAN_STM32_TIM6=y +# CONFIG_UAVCAN_STM32_TIM7 is not set +CONFIG_UAVCAN_CPP03=y +# CONFIG_UAVCAN_CPP11 is not set +# CONFIG_UAVCAN_DEBUG is not set +# CONFIG_UAVCAN_EXCEPTIONS is not set +# CONFIG_UAVCAN_TINY is not set +# CONFIG_UAVCAN_NO_GLOBAL_DATA_TYPE_REGISTRY is not set +# CONFIG_UAVCAN_IMPLEMENT_PLACEMENT_NEW is not set +# CONFIG_UAVCAN_USE_EXTERNAL_SNPRINTF is not set +# CONFIG_UAVCAN_USE_EXTERNAL_FLOAT16_CONVERSION is not set +# CONFIG_UAVCAN_NO_ASSERTIONS is not set +CONFIG_UAVCAN_MEM_POOL_BLOCK_SIZE=0 +CONFIG_UAVCAN_FLOAT_COMPARISON_EPSILON_MULT=0 +CONFIG_UAVCAN_MAX_CAN_ACCEPTANCE_FILTERS=0 +CONFIG_UAVCAN_MAX_NETWORK_SIZE_HINT=0 +CONFIG_UAVCAN_RX_QUEUE_CAPACITY=0 +CONFIG_UAVCAN_BIT_RATE=0 +CONFIG_UAVCAN_INIT_RETRIES=0 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +CONFIG_EXAMPLES_UAVCAN=y +CONFIG_EXAMPLES_UAVCAN_NODE_MEM_POOL_SIZE=4096 +CONFIG_EXAMPLES_UAVCAN_NODE_ID=1 +CONFIG_EXAMPLES_UAVCAN_NODE_NAME="org.nuttx.apps.examples.uavcan" +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/usbnsh/Make.defs b/configs/stm32f4discovery/usbnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..4ba2909b7a794a72195f3a712ab868d25c1adc4e --- /dev/null +++ b/configs/stm32f4discovery/usbnsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f4discovery/usbnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f4discovery/usbnsh/defconfig b/configs/stm32f4discovery/usbnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b5ce28b6894987bb7903e957f620bdb771c2afa6 --- /dev/null +++ b/configs/stm32f4discovery/usbnsh/defconfig @@ -0,0 +1,1209 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +CONFIG_STM32_OTGFS=y +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f4discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_STM32F4DISBB is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=27 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_CHAR=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/usbnsh/setenv.sh b/configs/stm32f4discovery/usbnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..602a6adaaeb20b7e2c234e2271502853425f650f --- /dev/null +++ b/configs/stm32f4discovery/usbnsh/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/stm32f4discovery/usbnsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f4discovery/winbuild/Make.defs b/configs/stm32f4discovery/winbuild/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..cfc4261cbf55ce3787632d7e00811b22d193ec5d --- /dev/null +++ b/configs/stm32f4discovery/winbuild/Make.defs @@ -0,0 +1,103 @@ +############################################################################ +# configs/stm32f4discovery/winbuild/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}\.config +include ${TOPDIR}\tools\Config.mk +include ${TOPDIR}\arch\arm\src\armv7-m\Toolchain.defs + +LDSCRIPT = ld.script + +ARCHINCLUDES = -I. -isystem $(TOPDIR)\include +ARCHXXINCLUDES = -I. -isystem $(TOPDIR)\include -isystem $(TOPDIR)\include\cxx +ARCHSCRIPT = -T$(TOPDIR)\configs\$(CONFIG_ARCH_BOARD)\scripts\$(LDSCRIPT) + +CC = $(CROSSDEV)gcc.exe +CXX = $(CROSSDEV)g++.exe +CPP = $(CROSSDEV)gcc.exe -E +LD = $(CROSSDEV)ld.exe +AR = $(ARCROSSDEV)ar.exe rcs +NM = $(ARCROSSDEV)nm.exe +OBJCOPY = $(CROSSDEV)objcopy.exe +OBJDUMP = $(CROSSDEV)objdump.exe + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)\binfmt\libnxflat\gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +LDFLAGS += -nostartfiles -nodefaultlibs +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = mingw32-gcc.exe +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +HOSTEXEEXT = .exe + +# Windows-native host tools + +MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative + diff --git a/configs/stm32f4discovery/winbuild/defconfig b/configs/stm32f4discovery/winbuild/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..9fd11d2f18ac8d71074d826103209a6e286fb567 --- /dev/null +++ b/configs/stm32f4discovery/winbuild/defconfig @@ -0,0 +1,946 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +CONFIG_WINDOWS_NATIVE=y +# CONFIG_WINDOWS_CYGWIN is not set +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set +# CONFIG_WINDOWS_MKLINK is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="..apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f4discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_STM32F4DISBB is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=9 +CONFIG_START_DAY=21 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=2048 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/winbuild/setenv.bat b/configs/stm32f4discovery/winbuild/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..22fa1e599bb5932646356a924c833a06b8d6b021 --- /dev/null +++ b/configs/stm32f4discovery/winbuild/setenv.bat @@ -0,0 +1,50 @@ +@echo off + +rem configs/stm32f4discovery/winbuild/setenv.bat +rem +rem Copyright (C) 2012 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the CodeSourcey toolchain. See +rem http://www.mentor.com/embedded-software/codesourcery + +set PATH=C:\Program Files (x86)\CodeSourcery\Sourcery G++ Lite\bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% diff --git a/configs/stm32f746g-disco/Kconfig b/configs/stm32f746g-disco/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..7181f50f48b27f0d74f127ddd4294099b112ec92 --- /dev/null +++ b/configs/stm32f746g-disco/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_STM32F746G_DISCO + +endif # ARCH_BOARD_STM32F746G_DISCO diff --git a/configs/stm32f746g-disco/README.txt b/configs/stm32f746g-disco/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..eff9a8035361f392e30f98023752ecbfaf3bff30 --- /dev/null +++ b/configs/stm32f746g-disco/README.txt @@ -0,0 +1,673 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6 +MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash +memory and 300Kb SRAM. The board features: + + - On-board ST-LINK/V2 for programming and debugging, + - Mbed-enabled (mbed.org) + - 4.3-inch 480x272 color LCD-TFT with capacitive touch screen + - Camera connector + - SAI audio codec + - Audio line in and line out jack + - Stereo speaker outputs + - Two ST MEMS microphones + - SPDIF RCA input connector + - Two pushbuttons (user and reset) + - 128-Mbit Quad-SPI Flash memory + - 128-Mbit SDRAM (64 Mbits accessible) + - Connector for microSD card + - RF-EEPROM daughterboard connector + - USB OTG HS with Micro-AB connectors + - USB OTG FS with Micro-AB connectors + - Ethernet connector compliant with IEEE-802.3-2002 + +Refer to the http://www.st.com website for further information about this +board (search keyword: stm32f746g-disco) + +Contents +======== + + - STATUS + - Development Environment + - LEDs and Buttons + - Serial Console + - Porting STM32 F4 Drivers + - FPU + - STM32F746G-DISCO-specific Configuration Options + - Configurations + +STATUS +====== + + 2015-07-19: The basic NSH configuration is functional using a serial + console on USART6 and RS-232 shield. Very few other drivers are in + place yet. + + 2015-07-20: STM32 F7 Ethernet appears to be functional, but has had + only light testing. + + 2015-07-21: Added a protected build version of the NSH configuration + (called knsh). That configuration is close: It boots, but I get + a hard fault each time I do the NSH "help" command. Everything else + works fine. I am thinking this is a corrupted binary; I am thinking + that there is a bad pointer in the command table. But this is hard + to prove but possible because the steps to produce and load the + binary are awkward. + +Development Environment +======================= + + The Development environments for the STM32F746G-DISCO board are identical + to the environments for other STM32F boards. For full details on the + environment options and setup, see the README.txt file in the + config/stm32f746g-disco directory. + +LEDs and Buttons +================ + + LEDs + ---- + The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located + near the reset button, that can be controlled by software (LD2 is a power + indicator, LD3-6 indicate USB status, LD7 is controlled by the ST-Link). + + LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino + interface. One end of LD1 is grounded so a high output on PI1 will + illuminate the LED. + + This LED is not used by the board port unless CONFIG_ARCH_LEDS is defined. + In that case, the usage by the board port is defined in include/board.h + and src/stm32_leds.c. The LEDs are used to encode OS-related events as + follows: + + SYMBOL Meaning LD1 + ------------------- ----------------------- ------ + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt N/C + LED_SIGNAL In a signal handler N/C + LED_ASSERTION An assertion failed N/C + LED_PANIC The system has crashed FLASH + + Thus is LD1 is statically on, NuttX has successfully booted and is, + apparently, running normally. If LD1 is flashing at approximately + 2Hz, then a fatal error has been detected and the system has halted. + + Buttons + ------- + Pushbutton B1, labelled "User", is connected to GPIO PI11. A high + value will be sensed when the button is depressed. + +Serial Console +============== + + These configurations assume that you are using a standard Arduio RS-232 + shield with the serial interface with RX on pin D0 and TX on pin D1: + + -------- --------------- + STM32F7 + ARDUIONO FUNCTION GPIO + -- ----- --------- ----- + DO RX USART6_RX PC7 + D1 TX USART6_TX PC6 + -- ----- --------- ----- + +Porting STM32 F4 Drivers +======================== + + The STM32F746 is very similar to the STM32 F429 and many of the drivers + in the stm32/ directory could be ported here: ADC, BBSRAM, CAN, DAC, + DMA2D, FLASH, I2C, IWDG, LSE, LSI, LTDC, OTGFS, OTGHS, PM, Quadrature + Encoder, RNG, RTCC, SDMMC (was SDIO), Timer/counters, and WWDG. + + Many of these drivers would be ported very simply; many ports would just + be a matter of copying files and some seach-and-replacement. Like: + + 1. Compare the two register definitions files; make sure that the STM32 + F4 peripheral is identical (or nearly identical) to the F7 + peripheral. If so then, + 2. Copy the register definition file from the stm32/chip directory to + the stm32f7/chip directory, making name changes as appropriate and + updating the driver for any minor register differences. + 3. Copy the corresponding C file (and possibly a matching .h file) from + the stm32/ directory to the stm32f7/ directory again with naming + changes and changes for any register differences. + 4. Update the Make.defs file to include the new C file in the build. + + For other files, particularly those that use DMA, the port will be + significantly more complex. That is because the STM32F7 has a D-Cache + and, as a result, we need to exercise much more care to maintain cache + coherency. There is a Wiki page discussing the issues of porting + drivers from the stm32/ to the stm32f7/ directories here: + http://www.nuttx.org/doku.php?id=wiki:howtos:port-drivers_stm32f7 + +FPU +=== + +FPU Configuration Options +------------------------- + +There are two version of the FPU support built into the STM32 port. + +1. Lazy Floating Point Register Save. + + This is an implementation that saves and restores FPU registers only on + context switches. This means: (1) floating point registers are not + stored on each context switch and, hence, possibly better interrupt + performance. But, (2) since floating point registers are not saved, + you cannot use floating point operations within interrupt handlers. + + This logic can be enabled by simply adding the following to your .config + file: + + CONFIG_ARCH_FPU=y + CONFIG_ARMV7M_CMNVECTOR=y + CONFIG_ARMV7M_LAZYFPU=y + +2. Non-Lazy Floating Point Register Save + + Mike Smith has contributed an extensive re-write of the ARMv7-M exception + handling logic. This includes verified support for the FPU. These changes + have not yet been incorporated into the mainline and are still considered + experimental. These FPU logic can be enabled with: + + CONFIG_ARCH_FPU=y + CONFIG_ARMV7M_CMNVECTOR=y + + You will probably also changes to the ld.script in if this option is selected. + This should work: + + -ENTRY(_stext) + +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ + +EXTERN(_vectors) /* Force the vectors to be included in the output */ + +STM32F746G-DISCO-specific Configuration Options +=============================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM7=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32f7 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32F746=y + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs/ subdirectory and, + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=stm32f746g-disco (for the STM32F746G-DISCO development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_STM32F746G_DISCO=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - should not be defined. + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed SRAM (SRAM1) + + CONFIG_RAM_START=0x20010000 + CONFIG_RAM_SIZE=245760 + + This configurations use only SRAM1 for data storage. The heap includes + the remainder of SRAM1. If CONFIG_MM_REGIONS=2, then SRAM2 will be + included in the heap. + + DTCM SRAM is never included in the heap because it cannot be used for + DMA. A DTCM allocator is available, however, so that DTCM can be + managed with dtcm_malloc(), dtcm_free(), etc. + + In order to use FSMC SRAM, the following additional things need to be + present in the NuttX configuration file: + + CONFIG_STM32F7_FSMC_SRAM - Indicates that SRAM is available via the + FSMC (as opposed to an LCD or FLASH). + + CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space (hex) + + CONFIG_HEAP2_SIZE - The size of the SRAM in the FSMC address space (decimal) + + CONFIG_ARCH_FPU - The STM32F746G-DISCO supports a floating point unit (FPU) + + CONFIG_ARCH_FPU=y + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibrate + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + APB1 + ---- + CONFIG_STM32F7_TIM2 TIM2 + CONFIG_STM32F7_TIM3 TIM3 + CONFIG_STM32F7_TIM4 TIM4 + CONFIG_STM32F7_TIM5 TIM5 + CONFIG_STM32F7_TIM6 TIM6 + CONFIG_STM32F7_TIM7 TIM7 + CONFIG_STM32F7_TIM12 TIM12 + CONFIG_STM32F7_TIM13 TIM13 + CONFIG_STM32F7_TIM14 TIM14 + CONFIG_STM32F7_LPTIM1 LPTIM1 + CONFIG_STM32F7_RTC RTC + CONFIG_STM32F7_BKP BKP Registers + CONFIG_STM32F7_WWDG WWDG + CONFIG_STM32F7_IWDG IWDG + CONFIG_STM32F7_SPI2 SPI2 + CONFIG_STM32F7_I2S2 I2S2 + CONFIG_STM32F7_SPI3 SPI3 + CONFIG_STM32F7_I2S3 I2S3 + CONFIG_STM32F7_SPDIFRX SPDIFRX + CONFIG_STM32F7_USART2 USART2 + CONFIG_STM32F7_USART3 USART3 + CONFIG_STM32F7_UART4 UART4 + CONFIG_STM32F7_UART5 UART5 + CONFIG_STM32F7_I2C1 I2C1 + CONFIG_STM32F7_I2C2 I2C2 + CONFIG_STM32F7_I2C3 I2C3 + CONFIG_STM32F7_I2C4 I2C4 + CONFIG_STM32F7_CAN1 CAN1 + CONFIG_STM32F7_CAN2 CAN2 + CONFIG_STM32F7_HDMICEC HDMI-CEC + CONFIG_STM32F7_PWR PWR + CONFIG_STM32F7_DAC DAC + CONFIG_STM32F7_UART7 UART7 + CONFIG_STM32F7_UART8 UART8 + + APB2 + ---- + CONFIG_STM32F7_TIM1 TIM1 + CONFIG_STM32F7_TIM8 TIM8 + CONFIG_STM32F7_USART1 USART1 + CONFIG_STM32F7_USART6 USART6 + CONFIG_STM32F7_ADC ADC1 - ADC2 - ADC3 + CONFIG_STM32F7_SDMMC1 SDMMC1 + CONFIG_STM32F7_SPI1 SPI1 + CONFIG_STM32F7_SPI4 SPI4 + CONFIG_STM32F7_SYSCFG SYSCFG + CONFIG_STM32F7_EXTI EXTI + CONFIG_STM32F7_TIM9 TIM9 + CONFIG_STM32F7_TIM10 TIM10 + CONFIG_STM32F7_TIM11 TIM11 + CONFIG_STM32F7_SPI5 SPI5 + CONFIG_STM32F7_SPI6 SPI6 + CONFIG_STM32F7_SAI1 SAI1 + CONFIG_STM32F7_SAI2 SAI2 + CONFIG_STM32F7_LTDC LCD-TFT + + AHB1 + ---- + CONFIG_STM32F7_CRC CRC + CONFIG_STM32F7_BKPSRAM BKPSRAM + CONFIG_STM32F7_DMA1 DMA1 + CONFIG_STM32F7_DMA2 DMA2 + CONFIG_STM32F7_ETHMAC Ethernet MAC + CONFIG_STM32F7_DMA2D Chrom-ART (DMA2D) + CONFIG_STM32F7_USBOTGHS USB OTG HS + + AHB2 + ---- + CONFIG_STM32F7_USBOTGFS USB OTG FS + CONFIG_STM32F7_DCMI DCMI + CONFIG_STM32F7_CRYP CRYP + CONFIG_STM32F7_HASH HASH + CONFIG_STM32F7_RNG RNG + + AHB3 + ---- + + CONFIG_STM32F7_FSMC FSMC control registers + CONFIG_STM32F7_QUADSPI QuadSPI Control + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32F7_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32F7_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32F7_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32F7_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32F7_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32F7_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32F7_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + STM32F746G-DISCO specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + STM32F746G-DISCO CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32F7_CAN1 or + CONFIG_STM32F7_CAN2 must also be defined) + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32F7_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32F7_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + + STM32F746G-DISCO SPI Configuration + + CONFIG_STM32F7_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32F7_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32F7_SPI_INTERRUPT. + + STM32F746G-DISCO DMA Configuration + + CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32F7_SDIO + and CONFIG_STM32F7_DMA2. + CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. + Default: Medium + CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: + 4-bit transfer mode. + + STM32 USB OTG FS Host Driver Support + + Pre-requisites + + CONFIG_USBDEV - Enable USB device support + CONFIG_USBHOST - Enable USB host support + CONFIG_STM32F7_OTGFS - Enable the STM32 USB OTG FS block + CONFIG_STM32F7_SYSCFG - Needed + CONFIG_SCHED_WORKQUEUE - Worker thread support is required + + Options: + + CONFIG_STM32F7_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. + Default 128 (512 bytes) + CONFIG_STM32F7_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO + in 32-bit words. Default 96 (384 bytes) + CONFIG_STM32F7_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit + words. Default 96 (384 bytes) + CONFIG_STM32F7_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128 + CONFIG_STM32F7_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever + want to do that? + CONFIG_STM32F7_USBHOST_REGDEBUG - Enable very low-level register access + debug. Depends on CONFIG_DEBUG. + CONFIG_STM32F7_USBHOST_PKTDUMP - Dump all incoming and outgoing USB + packets. Depends on CONFIG_DEBUG. + +Configurations +============== + + Common Configuration Information + -------------------------------- + Each STM32F746G-DISCO configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh stm32f746g-disco/ + cd - + . ./setenv.sh + + If this is a Windows native build, then configure.bat should be used + instead of configure.sh: + + configure.bat STM32F746G-DISCO\ + + Where is one of the sub-directories listed below. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, these configurations use the USART6 for the serial + console. Pins are configured to that RX/TX are available at + pins D0 and D1 of the Arduion connectors. This should be compatible + with most RS-232 shields. + + 3. All of these configurations are set up to build under Windows using the + "GNU Tools for ARM Embedded Processors" that is maintained by ARM + (unless stated otherwise in the description of the configuration). + + https://launchpad.net/gcc-arm-embedded + + As of this writing (2015-03-11), full support is difficult to find + for the Cortex-M7, but is supported by at least this realeasse of + the ARM GNU tools: + + https://launchpadlibrarian.net/192228215/release.txt + + Current (2105-07-31) setenv.sh file are configured to use this + release: + + https://launchpadlibrarian.net/209776344/release.txt + + That toolchain selection can easily be reconfigured using + 'make menuconfig'. Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Window environment + CONFIG_WINDOWS_CYGWIN=y : Cywin under Windows + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU ARM EABI toolchain + + NOTE: As of this writing, there are issues with using this tool at + the -Os level of optimization. This has not been proven to be a + compiler issue (as least not one that might not be fixed with a + well placed volatile qualifier). However, in any event, it is + recommend that you use not more that -O2 optimization. + +Configuration Directories +------------------------- + + kostest: + ------- + This is identical to the nsh configuration below except that NuttX is + built as a kernel-mode, monolithic module and the user applications are + built separately. Is is recommended to use a special make command; + not just 'make' but make with the following two arguments: + + make pass1 pass2 + + In the normal case (just 'make'), make will attempt to build both user- + and kernel-mode blobs more or less interleaved. This actual works! + However, for me it is very confusing so I prefer the above make command: + Make the user-space binaries first (pass1), then make the kernel-space + binaries (pass2) + + NOTES: + + 1. At the end of the build, there will be several files in the top-level + NuttX build directory: + + PASS1: + nuttx_user.elf - The pass1 user-space ELF file + nuttx_user.hex - The pass1 Intel HEX format file (selected in defconfig) + User.map - Symbols in the user-space ELF file + + PASS2: + nuttx - The pass2 kernel-space ELF file + nuttx.hex - The pass2 Intel HEX file (selected in defconfig) + System.map - Symbols in the kernel-space ELF file + + 2. Combining .hex files. If you plan to use the STM32 ST-Link Utility to + load the .hex files into FLASH, then you need to combine the two hex + files into a single .hex file. Here is how you can do that. + + a. The 'tail' of the nuttx.hex file should look something like this + (with my comments added): + + $ tail nuttx.hex + # 00, data records + ... + :10 9DC0 00 01000000000800006400020100001F0004 + :10 9DD0 00 3B005A0078009700B500D400F300110151 + :08 9DE0 00 30014E016D0100008D + # 05, Start Linear Address Record + :04 0000 05 0800 0419 D2 + # 01, End Of File record + :00 0000 01 FF + + Use an editor such as vi to remove the 05 and 01 records. + + b. The 'head' of the nuttx_user.hex file should look something like + this (again with my comments added): + + $ head nuttx_user.hex + # 04, Extended Linear Address Record + :02 0000 04 0801 F1 + # 00, data records + :10 8000 00 BD89 01084C800108C8110208D01102087E + :10 8010 00 0010 00201C1000201C1000203C16002026 + :10 8020 00 4D80 01085D80010869800108ED83010829 + ... + + Nothing needs to be done here. The nuttx_user.hex file should + be fine. + + c. Combine the edited nuttx.hex and un-edited nuttx_user.hex + file to produce a single combined hex file: + + $ cat nuttx.hex nuttx_user.hex >combined.hex + + Then use the combined.hex file with the STM32 ST-Link tool. The + mbed interface does not seem to except .hex files, but you can + also convert the .hex file to binary with this command: + + arm-none-eabi-objcopy.exe -I ihex -O binary combined.hex combined.bin + + If you do this a lot, you will probably want to invest a little time + to develop a tool to automate these steps. + + netnsh: + ------ + This is a NetShell (NSH) very similar to the nsh configuration described + below. It differs in that it has networking enabled. + + NOTES: + + 1. Both IPv4 and IPv6 protocoals are enabled. Fixed IP addresses are + used. The default configurationi target has these IP address: + + IPv4: 10.0.0.2 + IPv6: fc00::2 + + These are, of course, easily changes by reconfiguring via 'make + menuconfig' + + 2. UDP, TCIP/IP, ARP, ICMP, and ICMPv6 are also enabled. + + 3. NSH offers several network oriented commands such as: ipconfig, + ifup, ifdown, ping, and ping6. + + 4. Telnet sessions are supported. You can start a Telnet session from + any host on the network using a command like: + + $ telnet 10.0.0.2 + Trying 10.0.0.2... + Connected to 10.0.0.2. + Escape character is '^]'. + + NuttShell (NSH) NuttX-7.10 + nsh> help + help usage: help [-v] [] + + [ dd hexdump mb ping6 sleep + ? echo ifconfig mkdir ps test + break exec ifdown mkfifo pwd true + cat exit ifup mh rm uname + cd false kill mv rmdir unset + cp free losetup mw set usleep + cmp help ls ping sh xd + + Builtin Apps: + nsh> + + Under either Linux or Cygwin + + 5. The PHY address is either 0 or 1, depending on the state of the + LAN8720 RXER/PHYAD0 when the hardware is reset. That connects to the + STM32 F7 via PG2. PG2 is not controlled but appears to result in a + PHY address of 0. + + nsh: + --- + Configures the NuttShell (NSH) located at apps/examples/nsh. The + Configuration enables the serial interfaces on UART6. Support for + builtin applications is enabled, but in the base configuration no + builtin applications are selected. diff --git a/configs/stm32f746g-disco/include/board.h b/configs/stm32f746g-disco/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..6e9da62de0b5bdd63f9a5a506beaaf240b21105c --- /dev/null +++ b/configs/stm32f746g-disco/include/board.h @@ -0,0 +1,356 @@ +/************************************************************************************ + * configs/stm32f746g-disco/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIG_STM32F746G_DISCO_INCLUDE_BOARD_H +#define __CONFIG_STM32F746G_DISCO_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +#include "stm32_rcc.h" +#ifdef CONFIG_STM32F7_SDMMC1 +# include "stm32_sdmmc.h" +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The STM32F7 Discovery board provides the following clock sources: + * + * X1: 24 MHz oscillator for USB OTG HS PHY and camera module (daughter board) + * X2: 25 MHz oscillator for STM32F746NGH6 microcontroller and Ethernet PHY. + * X3: 32.768 KHz crystal for STM32F746NGH6 embedded RTC + * + * So we have these clock source available within the STM32 + * + * HSI: 16 MHz RC factory-trimmed + * LSI: 32 KHz RC + * HSE: On-board crystal frequency is 25MHz + * LSE: 32.768 kHz + */ + +#define STM32_BOARD_XTAL 25000000ul + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* Main PLL Configuration. + * + * PLL source is HSE = 25,000,000 + * + * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN + * Subject to: + * + * 2 <= PLLM <= 63 + * 192 <= PLLN <= 432 + * 192 MHz <= PLL_VCO <= 432MHz + * + * SYSCLK = PLL_VCO / PLLP + * Subject to + * + * PLLP = {2, 4, 6, 8} + * SYSCLK <= 216 MHz + * + * USB OTG FS, SDMMC and RNG Clock = PLL_VCO / PLLQ + * Subject to + * The USB OTG FS requires a 48 MHz clock to work correctly. The SDMMC + * and the random number generator need a frequency lower than or equal + * to 48 MHz to work correctly. + * + * 2 <= PLLQ <= 15 + */ + +#if defined(CONFIG_STM32F7_USBOTHFS) +/* Highest SYSCLK with USB OTG FS clock = 48 MHz + * + * PLL_VCO = (25,000,000 / 25) * 384 = 384 MHz + * SYSCLK = 384 MHz / 2 = 192 MHz + * USB OTG FS, SDMMC and RNG Clock = 384 MHz / 8 = 48MHz + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(384) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(8) + +#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 25) * 384) +#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) +#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 8) + +#elif defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_RNG) +/* Highest SYSCLK with USB OTG FS clock <= 48MHz + * + * PLL_VCO = (25,000,000 / 25) * 432 = 432 MHz + * SYSCLK = 432 MHz / 2 = 216 MHz + * USB OTG FS, SDMMC and RNG Clock = 432 MHz / 10 = 43.2 MHz + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(432) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(10) + +#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 25) * 432) +#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) +#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 10) + +#else +/* Highest SYSCLK + * + * PLL_VCO = (25,000,000 / 25) * 432 = 432 MHz + * SYSCLK = 432 MHz / 2 = 216 MHz + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(432) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(10) + +#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 25) * 432) +#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) +#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 10) +#endif + +/* Several prescalers allow the configuration of the two AHB buses, the + * high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum + * frequency of the two AHB buses is 216 MHz while the maximum frequency of + * the high-speed APB domains is 108 MHz. The maximum allowed frequency of + * the low-speed APB domain is 54 MHz. + */ + +/* AHB clock (HCLK) is SYSCLK (216 MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) + +/* Timers driven from APB1 will be twice PCLK1 */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 (108MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 */ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) + +/* FLASH wait states + * + * --------- ---------- ----------- + * VDD MAX SYSCLK WAIT STATES + * --------- ---------- ----------- + * 1.7-2.1 V 180 MHz 8 + * 2.1-2.4 V 216 MHz 9 + * 2.4-2.7 V 216 MHz 8 + * 2.7-3.6 V 216 MHz 7 + * --------- ---------- ----------- + */ + +#define BOARD_FLASH_WAITSTATES 7 + +/* LED definitions ******************************************************************/ +/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the + * reset button, that can be controlled by software (LD2 is a power indicator, LD3-6 + * indicate USB status, LD7 is controlled by the ST-Link). + * + * LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface. + * One end of LD1 is grounded so a high output on PI1 will illuminate the LED. + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way. + * The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_NLEDS 1 + +#define BOARD_LD1 BOARD_LED1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) + +/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in + * include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL Meaning LD1 + * ------------------- ----------------------- ------ + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt N/C + * LED_SIGNAL In a signal handler N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus is LD1 is statically on, NuttX has successfully booted and is, + * apparently, running normally. If LD1 is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +#define LED_STARTED 0 /* LD1=OFF */ +#define LED_HEAPALLOCATE 0 /* LD1=OFF */ +#define LED_IRQSENABLED 0 /* LD1=OFF */ +#define LED_STACKCREATED 1 /* LD1=ON */ +#define LED_INIRQ 2 /* LD1=no change */ +#define LED_SIGNAL 2 /* LD1=no change */ +#define LED_ASSERTION 2 /* LD1=no change */ +#define LED_PANIC 3 /* LD1=flashing */ + +/* Button definitions ***************************************************************/ +/* The STM32F7 Discovery supports one button: Pushbutton B1, labelled "User", is + * connected to GPIO PI11. A high value will be sensed when the button is depressed. + */ + +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* Alternate function pin selections ************************************************/ + +/* USART6: + * + * These configurations assume that you are using a standard Arduio RS-232 shield + * with the serial interface with RX on pin D0 and TX on pin D1: + * + * -------- --------------- + * STM32F7 + * ARDUIONO FUNCTION GPIO + * -- ----- --------- ----- + * DO RX USART6_RX PC7 + * D1 TX USART6_TX PC6 + * -- ----- --------- ----- + */ + +#define GPIO_USART6_RX GPIO_USART6_RX_1 +#define GPIO_USART6_TX GPIO_USART6_TX_1 + +/* The STM32 F7 connects to a SMSC LAN8742A PHY using these pins: + * + * STM32 F7 BOARD LAN8742A + * GPIO SIGNAL PIN NAME + * -------- ------------ ------------- + * PG11 RMII_TX_EN TXEN + * PG13 RMII_TXD0 TXD0 + * PG14 RMII_TXD1 TXD1 + * PC4 RMII_RXD0 RXD0/MODE0 + * PC5 RMII_RXD1 RXD1/MODE1 + * PG2 RMII_RXER RXER/PHYAD0 -- Not used + * PA7 RMII_CRS_DV CRS_DV/MODE2 + * PC1 RMII_MDC MDC + * PA2 RMII_MDIO MDIO + * N/A NRST nRST + * PA1 RMII_REF_CLK nINT/REFCLK0 + * N/A OSC_25M XTAL1/CLKIN + * + * The PHY address is either 0 or 1, depending on the state of PG2 on reset. + * PG2 is not controlled but appears to result in a PHY address of 0. + */ + +#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2 +#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 +#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2 + +/************************************************************************************ + * Public Data + ************************************************************************************/ +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIG_STM32F746G_DISCO_INCLUDE_BOARD_H */ diff --git a/configs/stm32f746g-disco/kernel/.gitignore b/configs/stm32f746g-disco/kernel/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..7bacd5aee3e49e11d2753d091bd2c9b31c0b16b0 --- /dev/null +++ b/configs/stm32f746g-disco/kernel/.gitignore @@ -0,0 +1,2 @@ +/nuttx_user.elf + diff --git a/configs/stm32f746g-disco/kernel/Makefile b/configs/stm32f746g-disco/kernel/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..cb0233b86f0c6ece5ab782a93188399a414cb536 --- /dev/null +++ b/configs/stm32f746g-disco/kernel/Makefile @@ -0,0 +1,122 @@ +############################################################################ +# configs/stm32f746g-disco/kernel/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +# This is the directory for the board-specific header files + +BOARD_INCLUDE = $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)include + +# The entry point name (if none is provided in the .config file) + +CONFIG_USER_ENTRYPOINT ?= user_start +ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT)) + +# Get the paths to the libraries and the links script path in format that +# is appropriate for the host OS + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done} + USER_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}" + USER_LDSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld}" + USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}" + USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}" + USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}" +else + # Linux/Cygwin-native toolchain + USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS))) + USER_LDSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld + USER_LDSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld + USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex" + USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec" + USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" +endif + +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) +USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) +USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" + +# Source files + +CSRCS = stm32_userspace.c +COBJS = $(CSRCS:.c=$(OBJEXT)) +OBJS = $(COBJS) + +# Targets: + +all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map +.PHONY: nuttx_user.elf depend clean distclean + +$(COBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +# Create the nuttx_user.elf file containing all of the user-mode code + +nuttx_user.elf: $(OBJS) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) + +$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf + @echo "LD: nuttx_user.elf" + $(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf +ifeq ($(CONFIG_INTELHEX_BINARY),y) + @echo "CP: nuttx_user.hex" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE) +endif +ifeq ($(CONFIG_MOTOROLA_SREC),y) + @echo "CP: nuttx_user.srec" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE) +endif +ifeq ($(CONFIG_RAW_BINARY),y) + @echo "CP: nuttx_user.bin" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE) +endif + +$(TOPDIR)$(DELIM)User.map: nuttx_user.elf + @echo "MK: User.map" + $(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map + $(Q) $(CROSSDEV)size nuttx_user.elf + +.depend: + +depend: .depend + +clean: + $(call DELFILE, nuttx_user.elf) + $(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*") + $(call DELFILE, "$(TOPDIR)$(DELIM)User.map") + $(call CLEAN) + +distclean: clean diff --git a/configs/stm32f746g-disco/kernel/stm32_userspace.c b/configs/stm32f746g-disco/kernel/stm32_userspace.c new file mode 100644 index 0000000000000000000000000000000000000000..427a763e4ab79c432aa8df5dd55d52c3b5c6f15e --- /dev/null +++ b/configs/stm32f746g-disco/kernel/stm32_userspace.c @@ -0,0 +1,133 @@ +/**************************************************************************** + * configs/stm32f746g-disco/kernel/stm32_userspace.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_NUTTX_USERSPACE +# error "CONFIG_NUTTX_USERSPACE not defined" +#endif + +#if CONFIG_NUTTX_USERSPACE != 0x08020000 +# error "CONFIG_NUTTX_USERSPACE must be 0x08020000 to match memory.ld" +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* These 'addresses' of these values are setup by the linker script. They are + * not actual uint32_t storage locations! They are only used meaningfully in the + * following way: + * + * - The linker script defines, for example, the symbol_sdata. + * - The declaration extern uint32_t _sdata; makes C happy. C will believe + * that the value _sdata is the address of a uint32_t variable _data (it is + * not!). + * - We can recover the linker value then by simply taking the address of + * of _data. like: uint32_t *pdata = &_sdata; + */ + +extern uint32_t _stext; /* Start of .text */ +extern uint32_t _etext; /* End_1 of .text + .rodata */ +extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */ +extern uint32_t _sdata; /* Start of .data */ +extern uint32_t _edata; /* End+1 of .data */ +extern uint32_t _sbss; /* Start of .bss */ +extern uint32_t _ebss; /* End+1 of .bss */ + +/* This is the user space entry point */ + +int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); + +const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +{ + /* General memory map */ + + .us_entrypoint = (main_t)CONFIG_USER_ENTRYPOINT, + .us_textstart = (uintptr_t)&_stext, + .us_textend = (uintptr_t)&_etext, + .us_datasource = (uintptr_t)&_eronly, + .us_datastart = (uintptr_t)&_sdata, + .us_dataend = (uintptr_t)&_edata, + .us_bssstart = (uintptr_t)&_sbss, + .us_bssend = (uintptr_t)&_ebss, + + /* Memory manager heap structure */ + + .us_heap = &g_mmheap, + + /* Task/thread startup routines */ + + .task_startup = task_startup, +#ifndef CONFIG_DISABLE_PTHREAD + .pthread_startup = pthread_startup, +#endif + + /* Signal handler trampoline */ + +#ifndef CONFIG_DISABLE_SIGNALS + .signal_handler = up_signal_handler, +#endif + + /* User-space work queue support (declared in include/nuttx/wqueue.h) */ + +#ifdef CONFIG_LIB_USRWORK + .work_usrstart = work_usrstart, +#endif +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */ diff --git a/configs/stm32f746g-disco/knsh/Make.defs b/configs/stm32f746g-disco/knsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c3735a3848f514c22cd4427d222f6b7bf6907816 --- /dev/null +++ b/configs/stm32f746g-disco/knsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f746g-disco/knsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f746g-disco/knsh/defconfig b/configs/stm32f746g-disco/knsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..94ee604860a3e8c7c0eb97d96f958216d2aae4b9 --- /dev/null +++ b/configs/stm32f746g-disco/knsh/defconfig @@ -0,0 +1,910 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_FLAT is not set +CONFIG_BUILD_PROTECTED=y +CONFIG_BUILD_2PASS=y +CONFIG_PASS1_TARGET="all" +CONFIG_PASS1_BUILDIR="configs/stm32f746g-disco/kernel" +CONFIG_PASS1_OBJECT="" +CONFIG_NUTTX_USERSPACE=0x08020000 + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +CONFIG_ARCH_CHIP_STM32F7=y +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32f7" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +CONFIG_ARM_MPU=y +CONFIG_ARM_MPU_NREGIONS=16 + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +CONFIG_ARMV7M_DTCM=y +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 F7 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32F745 is not set +CONFIG_ARCH_CHIP_STM32F746=y +# CONFIG_ARCH_CHIP_STM32F756 is not set +CONFIG_STM32F7_STM32F74XX=y +# CONFIG_STM32F7_STM32F75XX is not set +# CONFIG_STM32F7_FLASH_512KB is not set +CONFIG_STM32F7_FLASH_1024KB=y + +# +# STM32 Peripheral Support +# +CONFIG_STM32F7_HAVE_LTDC=y +# CONFIG_STM32F7_ADC is not set +# CONFIG_STM32F7_CAN is not set +# CONFIG_STM32F7_DAC is not set +# CONFIG_STM32F7_DMA is not set +# CONFIG_STM32F7_I2C is not set +# CONFIG_STM32F7_SAI is not set +# CONFIG_STM32F7_SPI is not set +CONFIG_STM32F7_USART=y +# CONFIG_STM32F7_ADC1 is not set +# CONFIG_STM32F7_ADC2 is not set +# CONFIG_STM32F7_ADC3 is not set +# CONFIG_STM32F7_BKPSRAM is not set +# CONFIG_STM32F7_CAN1 is not set +# CONFIG_STM32F7_CAN2 is not set +# CONFIG_STM32F7_CEC is not set +# CONFIG_STM32F7_CRC is not set +# CONFIG_STM32F7_CRYP is not set +# CONFIG_STM32F7_DMA1 is not set +# CONFIG_STM32F7_DMA2 is not set +# CONFIG_STM32F7_DAC1 is not set +# CONFIG_STM32F7_DAC2 is not set +# CONFIG_STM32F7_DCMI is not set +# CONFIG_STM32F7_ETHMAC is not set +# CONFIG_STM32F7_FSMC is not set +# CONFIG_STM32F7_I2C1 is not set +# CONFIG_STM32F7_I2C2 is not set +# CONFIG_STM32F7_I2C3 is not set +# CONFIG_STM32F7_LPTIM1 is not set +# CONFIG_STM32F7_LTDC is not set +# CONFIG_STM32F7_DMA2D is not set +# CONFIG_STM32F7_OTGFS is not set +# CONFIG_STM32F7_OTGHS is not set +# CONFIG_STM32F7_QUADSPI is not set +# CONFIG_STM32F7_SAI1 is not set +# CONFIG_STM32F7_RNG is not set +# CONFIG_STM32F7_SAI2 is not set +# CONFIG_STM32F7_SDMMC1 is not set +# CONFIG_STM32F7_SPDIFRX is not set +# CONFIG_STM32F7_SPI1 is not set +# CONFIG_STM32F7_SPI2 is not set +# CONFIG_STM32F7_SPI3 is not set +# CONFIG_STM32F7_SPI4 is not set +# CONFIG_STM32F7_SPI5 is not set +# CONFIG_STM32F7_SPI6 is not set +# CONFIG_STM32F7_TIM1 is not set +# CONFIG_STM32F7_TIM2 is not set +# CONFIG_STM32F7_TIM3 is not set +# CONFIG_STM32F7_TIM4 is not set +# CONFIG_STM32F7_TIM5 is not set +# CONFIG_STM32F7_TIM6 is not set +# CONFIG_STM32F7_TIM7 is not set +# CONFIG_STM32F7_TIM8 is not set +# CONFIG_STM32F7_TIM9 is not set +# CONFIG_STM32F7_TIM10 is not set +# CONFIG_STM32F7_TIM11 is not set +# CONFIG_STM32F7_TIM12 is not set +# CONFIG_STM32F7_TIM13 is not set +# CONFIG_STM32F7_TIM14 is not set +# CONFIG_STM32F7_TIM15 is not set +# CONFIG_STM32F7_USART1 is not set +# CONFIG_STM32F7_USART2 is not set +# CONFIG_STM32F7_USART3 is not set +# CONFIG_STM32F7_UART4 is not set +# CONFIG_STM32F7_UART5 is not set +CONFIG_STM32F7_USART6=y +# CONFIG_STM32F7_UART7 is not set +# CONFIG_STM32F7_UART8 is not set +# CONFIG_STM32F7_IWDG is not set +# CONFIG_STM32F7_WWDG is not set +# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MPU=y +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=43103 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20010000 +CONFIG_RAM_SIZE=245760 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F746G_DISCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f746g-disco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +CONFIG_LIB_SYSCALL=y +CONFIG_SYS_RESERVED=8 +CONFIG_SYS_NNEST=2 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +CONFIG_ARCH_HAVE_USART6=y +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART6_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART6_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART6 Configuration +# +CONFIG_USART6_RXBUFSIZE=256 +CONFIG_USART6_TXBUFSIZE=256 +CONFIG_USART6_BAUD=115200 +CONFIG_USART6_BITS=8 +CONFIG_USART6_PARITY=0 +CONFIG_USART6_2STOP=0 +# CONFIG_USART6_IFLOWCONTROL is not set +# CONFIG_USART6_OFLOWCONTROL is not set +# CONFIG_USART6_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_KERNEL_HEAP=y +CONFIG_MM_KERNEL_HEAPSIZE=8192 +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_USRWORK is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +CONFIG_NSH_DISABLE_PS=y +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f746g-disco/knsh/setenv.sh b/configs/stm32f746g-disco/knsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..38d86c72e5a26662d63f67444c46a2615d7286d7 --- /dev/null +++ b/configs/stm32f746g-disco/knsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/stm32f746g-disco/knsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f746g-disco/netnsh/Make.defs b/configs/stm32f746g-disco/netnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..7a2cc395ab70087de0e1633ca17a0f39f3a822b4 --- /dev/null +++ b/configs/stm32f746g-disco/netnsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f746g-disco/netnsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f746g-disco/netnsh/defconfig b/configs/stm32f746g-disco/netnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..3d0180bd2ce2859f14bf3f38c6f714ef1542d39e --- /dev/null +++ b/configs/stm32f746g-disco/netnsh/defconfig @@ -0,0 +1,1185 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +CONFIG_ARCH_CHIP_STM32F7=y +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32f7" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +CONFIG_ARMV7M_DTCM=y +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 F7 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32F745 is not set +CONFIG_ARCH_CHIP_STM32F746=y +# CONFIG_ARCH_CHIP_STM32F756 is not set +CONFIG_STM32F7_STM32F74XX=y +# CONFIG_STM32F7_STM32F75XX is not set +# CONFIG_STM32F7_FLASH_512KB is not set +CONFIG_STM32F7_FLASH_1024KB=y + +# +# STM32 Peripheral Support +# +CONFIG_STM32F7_HAVE_LTDC=y +# CONFIG_STM32F7_ADC is not set +# CONFIG_STM32F7_CAN is not set +# CONFIG_STM32F7_DAC is not set +# CONFIG_STM32F7_DMA is not set +# CONFIG_STM32F7_I2C is not set +# CONFIG_STM32F7_SAI is not set +# CONFIG_STM32F7_SPI is not set +CONFIG_STM32F7_USART=y +# CONFIG_STM32F7_ADC1 is not set +# CONFIG_STM32F7_ADC2 is not set +# CONFIG_STM32F7_ADC3 is not set +# CONFIG_STM32F7_BKPSRAM is not set +# CONFIG_STM32F7_CAN1 is not set +# CONFIG_STM32F7_CAN2 is not set +# CONFIG_STM32F7_CEC is not set +# CONFIG_STM32F7_CRC is not set +# CONFIG_STM32F7_CRYP is not set +# CONFIG_STM32F7_DMA1 is not set +# CONFIG_STM32F7_DMA2 is not set +# CONFIG_STM32F7_DAC1 is not set +# CONFIG_STM32F7_DAC2 is not set +# CONFIG_STM32F7_DCMI is not set +CONFIG_STM32F7_ETHMAC=y +# CONFIG_STM32F7_FSMC is not set +# CONFIG_STM32F7_I2C1 is not set +# CONFIG_STM32F7_I2C2 is not set +# CONFIG_STM32F7_I2C3 is not set +# CONFIG_STM32F7_LPTIM1 is not set +# CONFIG_STM32F7_LTDC is not set +# CONFIG_STM32F7_DMA2D is not set +# CONFIG_STM32F7_OTGFS is not set +# CONFIG_STM32F7_OTGHS is not set +# CONFIG_STM32F7_QUADSPI is not set +# CONFIG_STM32F7_SAI1 is not set +# CONFIG_STM32F7_RNG is not set +# CONFIG_STM32F7_SAI2 is not set +# CONFIG_STM32F7_SDMMC1 is not set +# CONFIG_STM32F7_SPDIFRX is not set +# CONFIG_STM32F7_SPI1 is not set +# CONFIG_STM32F7_SPI2 is not set +# CONFIG_STM32F7_SPI3 is not set +# CONFIG_STM32F7_SPI4 is not set +# CONFIG_STM32F7_SPI5 is not set +# CONFIG_STM32F7_SPI6 is not set +# CONFIG_STM32F7_TIM1 is not set +# CONFIG_STM32F7_TIM2 is not set +# CONFIG_STM32F7_TIM3 is not set +# CONFIG_STM32F7_TIM4 is not set +# CONFIG_STM32F7_TIM5 is not set +# CONFIG_STM32F7_TIM6 is not set +# CONFIG_STM32F7_TIM7 is not set +# CONFIG_STM32F7_TIM8 is not set +# CONFIG_STM32F7_TIM9 is not set +# CONFIG_STM32F7_TIM10 is not set +# CONFIG_STM32F7_TIM11 is not set +# CONFIG_STM32F7_TIM12 is not set +# CONFIG_STM32F7_TIM13 is not set +# CONFIG_STM32F7_TIM14 is not set +# CONFIG_STM32F7_TIM15 is not set +# CONFIG_STM32F7_USART1 is not set +# CONFIG_STM32F7_USART2 is not set +# CONFIG_STM32F7_USART3 is not set +# CONFIG_STM32F7_UART4 is not set +# CONFIG_STM32F7_UART5 is not set +CONFIG_STM32F7_USART6=y +# CONFIG_STM32F7_UART7 is not set +# CONFIG_STM32F7_UART8 is not set +# CONFIG_STM32F7_IWDG is not set +# CONFIG_STM32F7_WWDG is not set +# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32F7_PHYADDR=0 +# CONFIG_STM32F7_PHYINIT is not set +# CONFIG_STM32F7_MII is not set +CONFIG_STM32F7_AUTONEG=y +CONFIG_STM32F7_PHYSR=31 +CONFIG_STM32F7_PHYSR_ALTCONFIG=y +CONFIG_STM32F7_PHYSR_ALTMODE=0x001c +CONFIG_STM32F7_PHYSR_10HD=0x0004 +CONFIG_STM32F7_PHYSR_100HD=0x0008 +CONFIG_STM32F7_PHYSR_10FD=0x0014 +CONFIG_STM32F7_PHYSR_100FD=0x0018 +# CONFIG_STM32F7_ETH_PTP is not set +CONFIG_STM32F7_RMII=y +# CONFIG_STM32F7_RMII_MCO1 is not set +# CONFIG_STM32F7_RMII_MCO2 is not set +CONFIG_STM32F7_RMII_EXTCLK=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=43103 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20010000 +CONFIG_RAM_SIZE=245760 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F746G_DISCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f746g-disco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +CONFIG_ETH0_PHY_LAN8742A=y +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +CONFIG_ARCH_HAVE_USART6=y +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART6_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART6_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART6 Configuration +# +CONFIG_USART6_RXBUFSIZE=256 +CONFIG_USART6_TXBUFSIZE=256 +CONFIG_USART6_BAUD=115200 +CONFIG_USART6_BITS=8 +CONFIG_USART6_PARITY=0 +CONFIG_USART6_2STOP=0 +# CONFIG_USART6_IFLOWCONTROL is not set +# CONFIG_USART6_OFLOWCONTROL is not set +# CONFIG_USART6_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=1294 +CONFIG_NET_ETH_TCP_RECVWNDO=1220 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +CONFIG_NET_IPv6=y +CONFIG_NET_IPv6_NCONF_ENTRIES=8 + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +# CONFIG_NET_TCP_READAHEAD is not set +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# ICMPv6 Networking Support +# +CONFIG_NET_ICMPv6=y +CONFIG_NET_ICMPv6_PING=y +CONFIG_NET_ICMPv6_NEIGHBOR=y +CONFIG_ICMPv6_NEIGHBOR_MAXTRIES=5 +CONFIG_ICMPv6_NEIGHBOR_DELAYMSEC=20 +# CONFIG_NET_ICMPv6_AUTOCONF is not set +# CONFIG_NET_ICMPv6_ROUTER is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +CONFIG_NET_ARP_IPIN=y +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="STM32F746G-DISCO" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_DNSCLIENT is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +# CONFIG_NETUTILS_TFTPC is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 + +# +# Target IPv6 address +# +CONFIG_NSH_IPv6ADDR_1=0xfc00 +CONFIG_NSH_IPv6ADDR_2=0x0000 +CONFIG_NSH_IPv6ADDR_3=0x0000 +CONFIG_NSH_IPv6ADDR_4=0x0000 +CONFIG_NSH_IPv6ADDR_5=0x0000 +CONFIG_NSH_IPv6ADDR_6=0x0000 +CONFIG_NSH_IPv6ADDR_7=0x0000 +CONFIG_NSH_IPv6ADDR_8=0x0002 + +# +# Router IPv6 address +# +CONFIG_NSH_DRIPv6ADDR_1=0xfc00 +CONFIG_NSH_DRIPv6ADDR_2=0x0000 +CONFIG_NSH_DRIPv6ADDR_3=0x0000 +CONFIG_NSH_DRIPv6ADDR_4=0x0000 +CONFIG_NSH_DRIPv6ADDR_5=0x0000 +CONFIG_NSH_DRIPv6ADDR_6=0x0000 +CONFIG_NSH_DRIPv6ADDR_7=0x0000 +CONFIG_NSH_DRIPv6ADDR_8=0x0001 + +# +# IPv6 Network mask +# +CONFIG_NSH_IPv6NETMASK_1=0xffff +CONFIG_NSH_IPv6NETMASK_2=0xffff +CONFIG_NSH_IPv6NETMASK_3=0xffff +CONFIG_NSH_IPv6NETMASK_4=0xffff +CONFIG_NSH_IPv6NETMASK_5=0xffff +CONFIG_NSH_IPv6NETMASK_6=0xffff +CONFIG_NSH_IPv6NETMASK_7=0xffff +CONFIG_NSH_IPv6NETMASK_8=0x0000 +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f746g-disco/netnsh/setenv.sh b/configs/stm32f746g-disco/netnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..427dcdd32c0f8dc93392bc4aabadbfeb964cca8e --- /dev/null +++ b/configs/stm32f746g-disco/netnsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/stm32f746g-disco/netnsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f746g-disco/nsh/Make.defs b/configs/stm32f746g-disco/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..608dd2a00bb922675fbc0f67ee995f13df01bbb8 --- /dev/null +++ b/configs/stm32f746g-disco/nsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f746g-disco/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f746g-disco/nsh/defconfig b/configs/stm32f746g-disco/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b73ab07398d0371bd7fb006ae71737b621401a59 --- /dev/null +++ b/configs/stm32f746g-disco/nsh/defconfig @@ -0,0 +1,909 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +CONFIG_ARCH_CHIP_STM32F7=y +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32f7" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_FPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +CONFIG_ARMV7M_DTCM=y +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 F7 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32F745 is not set +CONFIG_ARCH_CHIP_STM32F746=y +# CONFIG_ARCH_CHIP_STM32F756 is not set +CONFIG_STM32F7_STM32F74XX=y +# CONFIG_STM32F7_STM32F75XX is not set +# CONFIG_STM32F7_FLASH_512KB is not set +CONFIG_STM32F7_FLASH_1024KB=y + +# +# STM32 Peripheral Support +# +CONFIG_STM32F7_HAVE_LTDC=y +# CONFIG_STM32F7_ADC is not set +# CONFIG_STM32F7_CAN is not set +# CONFIG_STM32F7_DAC is not set +# CONFIG_STM32F7_DMA is not set +# CONFIG_STM32F7_I2C is not set +# CONFIG_STM32F7_SAI is not set +# CONFIG_STM32F7_SPI is not set +CONFIG_STM32F7_USART=y +# CONFIG_STM32F7_ADC1 is not set +# CONFIG_STM32F7_ADC2 is not set +# CONFIG_STM32F7_ADC3 is not set +# CONFIG_STM32F7_BKPSRAM is not set +# CONFIG_STM32F7_CAN1 is not set +# CONFIG_STM32F7_CAN2 is not set +# CONFIG_STM32F7_CEC is not set +# CONFIG_STM32F7_CRC is not set +# CONFIG_STM32F7_CRYP is not set +# CONFIG_STM32F7_DMA1 is not set +# CONFIG_STM32F7_DMA2 is not set +# CONFIG_STM32F7_DAC1 is not set +# CONFIG_STM32F7_DAC2 is not set +# CONFIG_STM32F7_DCMI is not set +# CONFIG_STM32F7_ETHMAC is not set +# CONFIG_STM32F7_FSMC is not set +# CONFIG_STM32F7_I2C1 is not set +# CONFIG_STM32F7_I2C2 is not set +# CONFIG_STM32F7_I2C3 is not set +# CONFIG_STM32F7_LPTIM1 is not set +# CONFIG_STM32F7_LTDC is not set +# CONFIG_STM32F7_DMA2D is not set +# CONFIG_STM32F7_OTGFS is not set +# CONFIG_STM32F7_OTGHS is not set +# CONFIG_STM32F7_QUADSPI is not set +# CONFIG_STM32F7_SAI1 is not set +# CONFIG_STM32F7_RNG is not set +# CONFIG_STM32F7_SAI2 is not set +# CONFIG_STM32F7_SDMMC1 is not set +# CONFIG_STM32F7_SPDIFRX is not set +# CONFIG_STM32F7_SPI1 is not set +# CONFIG_STM32F7_SPI2 is not set +# CONFIG_STM32F7_SPI3 is not set +# CONFIG_STM32F7_SPI4 is not set +# CONFIG_STM32F7_SPI5 is not set +# CONFIG_STM32F7_SPI6 is not set +# CONFIG_STM32F7_TIM1 is not set +# CONFIG_STM32F7_TIM2 is not set +# CONFIG_STM32F7_TIM3 is not set +# CONFIG_STM32F7_TIM4 is not set +# CONFIG_STM32F7_TIM5 is not set +# CONFIG_STM32F7_TIM6 is not set +# CONFIG_STM32F7_TIM7 is not set +# CONFIG_STM32F7_TIM8 is not set +# CONFIG_STM32F7_TIM9 is not set +# CONFIG_STM32F7_TIM10 is not set +# CONFIG_STM32F7_TIM11 is not set +# CONFIG_STM32F7_TIM12 is not set +# CONFIG_STM32F7_TIM13 is not set +# CONFIG_STM32F7_TIM14 is not set +# CONFIG_STM32F7_TIM15 is not set +# CONFIG_STM32F7_USART1 is not set +# CONFIG_STM32F7_USART2 is not set +# CONFIG_STM32F7_USART3 is not set +# CONFIG_STM32F7_UART4 is not set +# CONFIG_STM32F7_UART5 is not set +CONFIG_STM32F7_USART6=y +# CONFIG_STM32F7_UART7 is not set +# CONFIG_STM32F7_UART8 is not set +# CONFIG_STM32F7_IWDG is not set +# CONFIG_STM32F7_WWDG is not set +# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=43103 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20010000 +CONFIG_RAM_SIZE=245760 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F746G_DISCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f746g-disco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +CONFIG_ARCH_HAVE_USART6=y +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART6_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART6_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART6 Configuration +# +CONFIG_USART6_RXBUFSIZE=256 +CONFIG_USART6_TXBUFSIZE=256 +CONFIG_USART6_BAUD=115200 +CONFIG_USART6_BITS=8 +CONFIG_USART6_PARITY=0 +CONFIG_USART6_2STOP=0 +# CONFIG_USART6_IFLOWCONTROL is not set +# CONFIG_USART6_OFLOWCONTROL is not set +# CONFIG_USART6_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f746g-disco/nsh/setenv.sh b/configs/stm32f746g-disco/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..e0e03726ac69a81a48e869b90ffdbec5f94f36a1 --- /dev/null +++ b/configs/stm32f746g-disco/nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/stm32f746g-disco/nsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f746g-disco/scripts/flash.ld b/configs/stm32f746g-disco/scripts/flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..eeae4e2768a5487017d357544cd4ff36650f449b --- /dev/null +++ b/configs/stm32f746g-disco/scripts/flash.ld @@ -0,0 +1,147 @@ +/**************************************************************************** + * configs/stm32f746g-disco/scripts/flash.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Modified 11/4/2013 for STM32F429 support + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F746NGH6 has 1024Kb of main FLASH memory. This FLASH memory can + * be accessed from either the AXIM interface at address 0x0800:0000 or from + * the ITCM interface at address 0x0020:0000. + * + * Additional information, including the option bytes, is available at at + * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM). + * + * In the STM32F746NGH6, two different boot spaces can be selected through + * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and + * BOOT_ADD1 option bytes: + * + * 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0]. + * ST programmed value: Flash on ITCM at 0x0020:0000 + * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. + * ST programmed value: System bootloader at 0x0010:0000 + * + * NuttX does not modify these option byes. On the unmodified STM32F746G + * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot + * to address 0x0020:0000 in ITCM FLASH. + * + * The STM32F746NGH6 also has 320Kb of data SRAM (in addition to ITCM SRAM). + * SRAM is split up into three blocks: + * + * 1) 64Kb of DTCM SRM beginning at address 0x2000:0000 + * 2) 240Kb of SRAM1 beginning at address 0x2001:0000 + * 3) 16Kb of SRAM2 beginning at address 0x2004:c000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + */ + +MEMORY +{ + itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 1024K + flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 64K + sram1 (rwx) : ORIGIN = 0x20010000, LENGTH = 240K + sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram1 AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram1 + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32f746g-disco/scripts/kernel-space.ld b/configs/stm32f746g-disco/scripts/kernel-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..c9f48d5c4baed0e75ed807c473107e0b1f4591a0 --- /dev/null +++ b/configs/stm32f746g-disco/scripts/kernel-space.ld @@ -0,0 +1,109 @@ +/**************************************************************************** + * configs/stm32f746g-disco/scripts/kernel-space.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > kflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > kflash + + .ARM.extab : { + *(.ARM.extab*) + } > kflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > kflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > ksram AT > kflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > ksram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32f746g-disco/scripts/memory.ld b/configs/stm32f746g-disco/scripts/memory.ld new file mode 100644 index 0000000000000000000000000000000000000000..bc9379ac056a876a02da273059102b6b342ca70f --- /dev/null +++ b/configs/stm32f746g-disco/scripts/memory.ld @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/stm32f746g-disco/scripts/memory.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F746NGH6 has 1024Kb of main FLASH memory. This FLASH memory can + * be accessed from either the AXIM interface at address 0x0800:0000 or from + * the ITCM interface at address 0x0020:0000. + * + * Additional information, including the option bytes, is available at at + * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM). + * + * In the STM32F746NGH6, two different boot spaces can be selected through + * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and + * BOOT_ADD1 option bytes: + * + * 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0]. + * ST programmed value: Flash on ITCM at 0x0020:0000 + * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. + * ST programmed value: System bootloader at 0x0010:0000 + * + * NuttX does not modify these option byes. On the unmodified STM32F746G + * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot + * to address 0x0020:0000 in ITCM FLASH. + * + * The STM32F746NGH6 also has 320Kb of data SRAM (in addition to ITCM SRAM). + * SRAM is split up into three blocks: + * + * 1) 64Kb of DTCM SRM beginning at address 0x2000:0000 + * 2) 240Kb of SRAM1 beginning at address 0x2001:0000 + * 3) 16Kb of SRAM2 beginning at address 0x2004:c000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + * + * For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of + * FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which + * should fit into 64KB and, of course, can be optimized as needed (See + * also configs/stm32f746g-disco/scripts/kernel-space.ld). Allowing the + * additional does permit addition debug instrumentation to be added to the + * kernel space without overflowing the partition. + * + * Alignment of the user space FLASH partition is also a critical factor: + * The user space FLASH partition will be spanned with a single region of + * size 2**n bytes. The alignment of the user-space region must be the same. + * As a consequence, as the user-space increases in size, the alignment + * requirement also increases. + * + * This alignment requirement means that the largest user space FLASH region + * you can have will be 512KB at it would have to be positioned at + * 0x08800000. If you change this address, don't forget to change the + * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify + * the check in kernel/userspace.c. + * + * For the same reasons, the maximum size of the SRAM mapping is limited to + * 4KB. Both of these alignment limitations could be reduced by using + * multiple regions to map the FLASH/SDRAM range or perhaps with some + * clever use of subregions. + * + * A detailed memory map for the 112KB SRAM region is as follows: + * + * 0x20001 0000: Kernel .data region. Typical size: 0.1KB + * ------- ---- Kernel .bss region. Typical size: 1.8KB + * 0x20001 0800: Kernel IDLE thread stack (approximate). Size is + * determined by CONFIG_IDLETHREAD_STACKSIZE and + * adjustments for alignment. Typical is 1KB. + * ------- ---- Padded to 4KB + * 0x20001 1000: User .data region. Size is variable. + * ------- ---- User .bss region Size is variable. + * 0x20001 2000: Beginning of kernel heap. Size determined by + * CONFIG_MM_KERNEL_HEAPSIZE. + * ------- ---- Beginning of user heap. Can vary with other settings. + * 0x20004 c000: End+1 of SRAM1 + */ + +MEMORY +{ + /* ITCM boot address */ + + itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 1024K + + /* 1024KB FLASH */ + + kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K + uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K + xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K + + /* 240KB of contiguous SRAM1 */ + + ksram (rwx) : ORIGIN = 0x20010000, LENGTH = 4K + usram (rwx) : ORIGIN = 0x20011000, LENGTH = 4K + xsram (rwx) : ORIGIN = 0x20012000, LENGTH = 240K - 8K + + /* DTCM SRAM */ + + dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 64K + sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K +} diff --git a/configs/stm32f746g-disco/scripts/user-space.ld b/configs/stm32f746g-disco/scripts/user-space.ld new file mode 100644 index 0000000000000000000000000000000000000000..3017c2661761add63faa96714a97741c301f073f --- /dev/null +++ b/configs/stm32f746g-disco/scripts/user-space.ld @@ -0,0 +1,111 @@ +/**************************************************************************** + * configs/stm32f746g-disco/scripts/user-space.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +SECTIONS +{ + .userspace : { + *(.userspace) + } > uflash + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > uflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > uflash + + .ARM.extab : { + *(.ARM.extab*) + } > uflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > uflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > usram AT > uflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > usram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32f746g-disco/src/.gitignore b/configs/stm32f746g-disco/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/stm32f746g-disco/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/stm32f746g-disco/src/Makefile b/configs/stm32f746g-disco/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..39e6a7f178f50745908176074c3276191525d1af --- /dev/null +++ b/configs/stm32f746g-disco/src/Makefile @@ -0,0 +1,63 @@ +############################################################################ +# configs/stm32f746g-disco/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinitialize.c +endif + +ifeq ($(CONFIG_ARCH_FPU),y) +CSRCS += stm32_ostest.c +endif + +ifeq ($(CONFIG_SPORADIC_INSTRUMENTATION),y) +CSRCS += stm32_sporadic.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32f746g-disco/src/stm32_appinitialize.c b/configs/stm32f746g-disco/src/stm32_appinitialize.c new file mode 100644 index 0000000000000000000000000000000000000000..aa2818899abe7cb1a428e0751b26715fe79f6e57 --- /dev/null +++ b/configs/stm32f746g-disco/src/stm32_appinitialize.c @@ -0,0 +1,87 @@ +/**************************************************************************** + * config/stm32f746g-disco/src/stm32_appinitilaize.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "stm32_ccm.h" +#include "stm32f746g-disco.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef CONFIG_FS_PROCFS + int ret; + +#ifdef CONFIG_STM32_CCM_PROCFS + /* Register the CCM procfs entry. This must be done before the procfs is + * mounted. + */ + + (void)ccm_procfs_register(); +#endif + + /* Mount the procfs file system */ + + ret = mount(NULL, SAMV71_PROCFS_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + SYSLOG("ERROR: Failed to mount procfs at %s: %d\n", + SAMV71_PROCFS_MOUNTPOINT, ret); + } +#endif + + return OK; +} diff --git a/configs/stm32f746g-disco/src/stm32_autoleds.c b/configs/stm32f746g-disco/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..47a1d45bbabc681be3f06634e9d3297f1e64dd63 --- /dev/null +++ b/configs/stm32f746g-disco/src/stm32_autoleds.c @@ -0,0 +1,144 @@ +/**************************************************************************** + * configs/stm32f746g-disco/src/stm32_autoleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "stm32_gpio.h" +#include "stm32f746g-disco.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure the LD1 GPIO for output. Initial state is OFF */ + + stm32_configgpio(GPIO_LD1); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool ledstate = false; + + switch (led) + { + case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */ + /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */ + /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */ + break; /* Leave ledstate == true to turn OFF */ + + default: + case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */ + /* LED_SIGNAL: In a signal handler STATUS LED=N/C */ + /* LED_ASSERTION: An assertion failed STATUS LED=N/C */ + return; /* Return to leave STATUS LED unchanged */ + + case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */ + case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */ + ledstate = true; /* Set ledstate == false to turn ON */ + break; + } + + stm32_gpiowrite(GPIO_LD1, ledstate); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + /* These should not happen and are ignored */ + + default: + case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */ + /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */ + /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */ + case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */ + + /* These result in no-change */ + + case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */ + /* LED_SIGNAL: In a signal handler STATUS LED=N/C */ + /* LED_ASSERTION: An assertion failed STATUS LED=N/C */ + return; /* Return to leave STATUS LED unchanged */ + + /* Turn STATUS LED off set driving the output high */ + + case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */ + stm32_gpiowrite(GPIO_LD1, false); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/stm32f746g-disco/src/stm32_boot.c b/configs/stm32f746g-disco/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..381925dee1f7efb6af0c2611fca1de72469606c3 --- /dev/null +++ b/configs/stm32f746g-disco/src/stm32_boot.c @@ -0,0 +1,127 @@ +/************************************************************************************ + * configs/stm32f746g-disco/src/stm32_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "stm32f746g-disco.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ +#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \ + defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \ + defined(CONFIG_STM32F7_SPI5) + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + +#ifdef CONFIG_SPORADIC_INSTRUMENTATION + /* This configuration has been used for evaluating the NuttX sporadic scheduler. + * The following caqll initializes the sporadic scheduler monitor. + */ + + arch_sporadic_initialize(); +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} + +/************************************************************************************ + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional initialization call + * will be performed in the boot-up sequence to a function called + * board_initialize(). board_initialize() will be called immediately after + * up_initialize() is called and just before the initial application is started. + * This additional initialization phase may be used, for example, to initialize + * board-specific device drivers. + * + ************************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + + (void)board_app_initialize(); +#endif +} +#endif diff --git a/configs/stm32f746g-disco/src/stm32_buttons.c b/configs/stm32f746g-disco/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..8578c0794ed4b4b8e575bd33f746828fbcf333cd --- /dev/null +++ b/configs/stm32f746g-disco/src/stm32_buttons.c @@ -0,0 +1,112 @@ +/**************************************************************************** + * configs/stm32f746g-disco/src/stm32_buttons.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "stm32_gpio.h" +#include "stm32f746g-disco.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + stm32_configgpio(GPIO_BTN_USER); +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return stm32_gpioread(GPIO_BTN_USER) ? 1 : 0; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ +#warning Missing logic +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/stm32f746g-disco/src/stm32_ostest.c b/configs/stm32f746g-disco/src/stm32_ostest.c new file mode 100644 index 0000000000000000000000000000000000000000..793e48f4dd11e143f6e6496b175f2708ceddb8ba --- /dev/null +++ b/configs/stm32f746g-disco/src/stm32_ostest.c @@ -0,0 +1,113 @@ +/************************************************************************************ + * configs/stm32f746g-disco/src/stm32_ostest.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "stm32f746g-disco.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#undef HAVE_FPU +#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_EXAMPLES_OSTEST_FPUTESTDISABLE) && \ + defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && defined(CONFIG_SCHED_WAITPID) && \ + !defined(CONFIG_DISABLE_SIGNALS) +# define HAVE_FPU 1 +#endif + +#ifdef HAVE_FPU + +#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*SW_FPU_REGS) +# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size" +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static uint32_t g_saveregs[XCPTCONTEXT_REGS]; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ +/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return + * the current FPU registers. + */ + +void arch_getfpu(FAR uint32_t *fpusave) +{ + irqstate_t flags; + + /* Take a snapshot of the thread context right now */ + + flags = enter_critical_section(); + up_saveusercontext(g_saveregs); + + /* Return only the floating register values */ + + memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS)); + leave_critical_section(flags); +} + +/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function + * will compare them and return true if they are identical. + */ + +bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2) +{ + return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0; +} + +#endif /* HAVE_FPU */ diff --git a/configs/stm32f746g-disco/src/stm32_spi.c b/configs/stm32f746g-disco/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..38f62be076b286563b301c8843d2594b6206c3ed --- /dev/null +++ b/configs/stm32f746g-disco/src/stm32_spi.c @@ -0,0 +1,246 @@ +/************************************************************************************ + * configs/stm32f746g-disco/src/stm32_spi.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32_spi.h" + +#include "stm32f746g-disco.h" + +#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \ + defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \ + defined(CONFIG_STM32F7_SPI5) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32f746g-disco board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ +} + +/**************************************************************************** + * Name: stm32_spi1/2/3/4/5select and stm32_spi1/2/3/4/5status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32F7_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32F7_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32F7_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32F7_SPI4 +void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32F7_SPI5 +void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32F7_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32F7_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32F7_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32F7_SPI4 +int stm32_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32F7_SPI5 +int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#endif /* CONFIG_SPI_CMDDATA */ +#endif /* CONFIG_STM32F7_SPI1 || ... CONFIG_STM32F7_SPI5 */ diff --git a/configs/stm32f746g-disco/src/stm32_sporadic.c b/configs/stm32f746g-disco/src/stm32_sporadic.c new file mode 100644 index 0000000000000000000000000000000000000000..b5d360a3e09e7a2df9edeedb8a500d63f0292f68 --- /dev/null +++ b/configs/stm32f746g-disco/src/stm32_sporadic.c @@ -0,0 +1,93 @@ +/**************************************************************************** + * configs/stm32f746g-disco/src/stm32_sporadic.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "stm32_gpio.h" +#include "stm32f746g-disco.h" + +#ifdef CONFIG_SPORADIC_INSTRUMENTATION + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arch_sporadic_* + * + * Description: + * This configuration has been used for evaluating the NuttX sporadic + * scheduler. This only makes sense when uses with the sporadic test + * which is a part of apps/examples/ostest. If would make generate + * meaningful output in its current state if there were multiple sporadic + * threads + * + ****************************************************************************/ + +void arch_sporadic_initialize(void) +{ + stm32_configgpio(GPIO_SCHED_HIGHPRI); + stm32_configgpio(GPIO_SCHED_RUNNING); +} + +void arch_sporadic_start(FAR struct tcb_s *tcb) +{ + stm32_gpiowrite(GPIO_SCHED_HIGHPRI, true); +} + +void arch_sporadic_lowpriority(FAR struct tcb_s *tcb) +{ + stm32_gpiowrite(GPIO_SCHED_HIGHPRI, false); +} + +void arch_sporadic_suspend(FAR struct tcb_s *tcb) +{ + stm32_gpiowrite(GPIO_SCHED_RUNNING, false); +} + +void arch_sporadic_resume(FAR struct tcb_s *tcb) +{ + stm32_gpiowrite(GPIO_SCHED_RUNNING, true); +} + +#endif /* CONFIG_SPORADIC_INSTRUMENTATION */ \ No newline at end of file diff --git a/configs/stm32f746g-disco/src/stm32_userleds.c b/configs/stm32f746g-disco/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..f4d90b146b7a5c1d0a2d3b32ca94aed2afae5a21 --- /dev/null +++ b/configs/stm32f746g-disco/src/stm32_userleds.c @@ -0,0 +1,120 @@ +/**************************************************************************** + * configs/stm32f746g-disco/src/stm32_userleds.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "stm32_gpio.h" +#include "stm32f746g-disco.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the + * board_userled_initialize() is available to initialize the LED from user + * application logic. + * + ****************************************************************************/ + +void board_userled_initialize(void) +{ + stm32_configgpio(GPIO_LD1); +} + +/**************************************************************************** + * Name: board_userled + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled() is + * available to control the LED from user application logic. + * + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_STATUS_LED) + { + stm32_gpiowrite(GPIO_LD1, !ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled_all() is + * available to control the LED from user application logic. NOTE: since + * there is only a single LED on-board, this is function is not very useful. + * + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LD1, (ledset & BOARD_STATUS_LED_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/stm32f746g-disco/src/stm32f746g-disco.h b/configs/stm32f746g-disco/src/stm32f746g-disco.h new file mode 100644 index 0000000000000000000000000000000000000000..434700743bb4088adaf21c4c52ff6a1e6fab27c9 --- /dev/null +++ b/configs/stm32f746g-disco/src/stm32f746g-disco.h @@ -0,0 +1,127 @@ +/**************************************************************************************************** + * configs/stm32f746g-disco/src/stm32f746g-disco.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __CONFIGS_STM32F746G_DISCO_SRC_STM32F746G_DISCO__H +#define __CONFIGS_STM32F746G_DISCO_SRC_STM32F746G_DISCO__H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include +#include + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ +/* procfs File System */ + +#ifdef CONFIG_FS_PROCFS +# ifdef CONFIG_NSH_PROC_MOUNTPOINT +# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT +# else +# define STM32_PROCFS_MOUNTPOINT "/proc" +# endif +#endif + +/* STM32F736G Discovery GPIOs ***********************************************************************/ +/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the reset button, that + * can be controlled by software (LD2 is a power indicator, LD3-6 indicate USB status, LD7 is + * controlled by the ST-Link). + * + * LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface. One end of LD1 is + * grounded so a high output on PI1 will illuminate the LED. + */ + +#define GPIO_LD1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTI | GPIO_PIN1) + +/* Pushbutton B1, labelled "User", is connected to GPIO PI11. A high value will be sensed when the + * button is depressed. Note that the EXTI interrupt is configured. + */ + +#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTI | GPIO_PIN11) + +/* Sporadic scheduler instrumentation. This configuration has been used for evaluating the NuttX + * sporadic scheduler. In this evaluation, two GPIO outputs are used. One indicating the priority + * (high or low) of the sporadic thread and one indicating where the thread is running or not. + * + * There is nothing special about the pin selections: + * + * Arduino D2 PG6 - Indicates priority + * Arduino D4 PG7 - Indicates that the thread is running + */ + +#define GPIO_SCHED_HIGHPRI (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTG | GPIO_PIN6) +#define GPIO_SCHED_RUNNING (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTG | GPIO_PIN7) + +/**************************************************************************************************** + * Public data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +/**************************************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32f746g-disco board. + * + ****************************************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +/**************************************************************************************************** + * Name: arch_sporadic_initialize + * + * Description: + * This configuration has been used for evaluating the NuttX sporadic scheduler. + * + ****************************************************************************************************/ + +#ifdef CONFIG_SPORADIC_INSTRUMENTATION +void arch_sporadic_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_STM32F746G_DISCO_SRC_STM32F746G_DISCO_H */ + diff --git a/configs/stm32l476vg-disco/Kconfig b/configs/stm32l476vg-disco/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..a207e491dd009cc505e4e84901b57097e2b2179c --- /dev/null +++ b/configs/stm32l476vg-disco/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_STM32L476VG_DISCO + +endif # ARCH_BOARD_STM32L476VG_DISCO diff --git a/configs/stm32l476vg-disco/README.txt b/configs/stm32l476vg-disco/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..f6f0479ad54d1da7cc83c99b588ef46270cc1cde --- /dev/null +++ b/configs/stm32l476vg-disco/README.txt @@ -0,0 +1,611 @@ +XXX all this needs review and update +README +====== + +This README discusses issues unique to NuttX configurations for the ST +STM32L476VG Discovery board from ST Micro. See + + http://www.st.com/stm32l476g-disco + +STM32L476VG: + + Microprocessor: 32-bit ARM Cortex M4 at 80MHz STM32F476VGT6 + Memory: 1024 KB Flash and 96+32 KB SRAM + ADC: 3x12-bit, 2.4 MSPS A/D converter: up to 24 channels + DMA: 16-stream DMA controllers with FIFOs and burst support + Timers: Up to 11 timers: up to eight 16-bit, two 32-bit timers, two + watchdog timers, and a SysTick timer + GPIO: Up to 51 I/O ports with interrupt capability + I2C: Up to 3 x I2C interfaces + USARTs: Up to 3 USARTs, 2 UARTs, 1 LPUART + SPIs: Up to 3 SPIs + SAIs: Up to 2 dual-channel audio interfaces + CAN interface + SDIO interface + QSPI interface + USB: USB 2.0 full-speed device/host/OTG controller with on-chip PHY + CRC calculation unit + RTC + +Board features: + + Peripherals: 2 led, 1 d-pad joystick, 2 x LED, LCD, USC OTG FS, SAI stereo + Digital Microphone, MEMS Accelerometer, Magnetometer, + Gyroscope, 128 Mbit QSPI Flash, current ammeter + Debug: Serial wire debug and JTAG interfaces + + Uses a STM32F103 to provide a ST-Link for programming, debug similar to the + OpenOcd FTDI function - USB to JTAG front-end. + + See http://mbed.org/platforms/ST-Nucleo-L476RG for more + information about these boards. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NXFLAT Toolchain + - Hardware + - Button + - LED + - USARTs and Serial Consoles + - LQFP64 + - mbed + - Shields + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, or + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the CodeSourcery toolchain for Linux. + To use the Atollic, devkitARM, Raisonance GNU, or NuttX buildroot toolchain, + you simply need to add one of the following configuration options to your + .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=n : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=n : NuttX buildroot under Linux or Cygwin (default) + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: There are several limitations to using a Windows based toolchain in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + V=1 make clean_context all 2>&1 |tee mout + + An alias in your .bashrc file might make that less painful. + + 3. Dependencies are not made when using Windows versions of the GCC. This is + because the dependencies are generated using Windows pathes which do not + work with the Cygwin make. + + MKDEP = $(TOPDIR)/tools/mknulldeps.sh + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Using Sourcery CodeBench from http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/overview + Download and install the latest version (as of this writting it was + sourceryg++-2013.05-64-arm-none-eabi) + + Import the project from git. + File->import->Git-URI, then import a Exiting code as a Makefile progject + from the working directory the git clone was done to. + + Select the Sourcery CodeBench for ARM EABI. N.B. You must do one command line + build, before the make will work in CodeBench. + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + $ (cd tools; ./configure.sh nucleo-f4x1re/f401-nsh) + $ make qconfig + $ V=1 make context all 2>&1 | tee mout + + Use the f411-nsh configuration if you have the Nucleo-F411RE board. + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toolchain; instead use the GCC 4.3.3 EABI toolchain. + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +mbed +==== + + The Nucleo-F401RE includes boot loader from mbed: + + https://mbed.org/platforms/ST-Nucleo-F401RE/ + https://mbed.org/handbook/Homepage + + Using the mbed loader: + + 1. Connect the Nucleo-F4x1RE to the host PC using the USB connector. + 2. A new file system will appear called NUCLEO; open it with Windows + Explorer (assuming that you are using Windows). + 3. Drag and drop nuttx.bin into the MBED window. This will load the + nuttx.bin binary into the Nucleo-F4x1RE. The NUCLEO window will + close then re-open and the Nucleo-F4x1RE will be running the new code. + +Hardware +======== + + GPIO + ---- + SERIAL_TX=PA_2 USER_BUTTON=PC_13 + SERIAL_RX=PA_3 LED1 =PA_5 + + A0=PA_0 USART2RX D0=PA_3 D8 =PA_9 + A1=PA_1 USART2TX D1=PA_2 D9 =PC_7 + A2=PA_4 D2=PA_10 WIFI_CS=D10=PB_6 SPI_CS + A3=PB_0 WIFI_INT=D3=PB_3 D11=PA_7 SPI_MOSI + A4=PC_1 SDCS=D4=PB_5 D12=PA_6 SPI_MISO + A5=PC_0 WIFI_EN=D5=PB_4 LED1=D13=PA_5 SPI_SCK + LED2=D6=PB_10 I2C1_SDA=D14=PB_9 Probe + D7=PA_8 I2C1_SCL=D15=PB_8 Probe + + From: https://mbed.org/platforms/ST-Nucleo-F401RE/ + + Buttons + ------- + B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32 + microcontroller. + + LEDs + ---- + The Nucleo F401RE and Nucleo F411RE provide a single user LED, LD2. LD2 + is the green LED connected to Arduino signal D13 corresponding to MCU I/O + PA5 (pin 21) or PB13 (pin 34) depending on the STM32target. + + - When the I/O is HIGH value, the LED is on. + - When the I/O is LOW, the LED is off. + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + events as follows when the red LED (PE24) is available: + + SYMBOL Meaning LD2 + ------------------- ----------------------- ----------- + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt No change + LED_SIGNAL In a signal handler No change + LED_ASSERTION An assertion failed No change + LED_PANIC The system has crashed Blinking + LED_IDLE MCU is is sleep mode Not used + + Thus if LD2, NuttX has successfully booted and is, apparently, running + normally. If LD2 is flashing at approximately 2Hz, then a fatal error + has been detected and the system has halted. + +Serial Consoles +=============== + + USART1 + ------ + Pins and Connectors: + + RXD: PA11 CN10 pin 14 + PB7 CN7 pin 21 + TXD: PA10 CN9 pin 3, CN10 pin 33 + PB6 CN5 pin 3, CN10 pin 17 + + NOTE: You may need to edit the include/board.h to select different USART1 + pin selections. + + TTL to RS-232 converter connection: + + Nucleo CN10 STM32F4x1RE + ----------- ------------ + Pin 21 PA9 USART1_RX *Warning you make need to reverse RX/TX on + Pin 33 PA10 USART1_TX some RS-232 converters + Pin 20 GND + Pin 8 U5V + + To configure USART1 as the console: + + CONFIG_STM32_USART1=y + CONFIG_USART1_ISUART=y + CONFIG_USART1_SERIAL_CONSOLE=y + CONFIG_USART1_RXBUFSIZE=256 + CONFIG_USART1_TXBUFSIZE=256 + CONFIG_USART1_BAUD=115200 + CONFIG_USART1_BITS=8 + CONFIG_USART1_PARITY=0 + CONFIG_USART1_2STOP=0 + + USART2 + ----- + Pins and Connectors: + + RXD: PA3 CN9 pin 1 (See SB13, 14, 62, 63). CN10 pin 37 + PD6 + TXD: PA2 CN9 pin 2(See SB13, 14, 62, 63). CN10 pin 35 + PD5 + + UART2 is the default in all of these configurations. + + TTL to RS-232 converter connection: + + Nucleo CN9 STM32F4x1RE + ----------- ------------ + Pin 1 PA3 USART2_RX *Warning you make need to reverse RX/TX on + Pin 2 PA2 USART2_TX some RS-232 converters + + Solder Bridges. This configuration requires: + + - SB62 and SB63 Closed: PA2 and PA3 on STM32 MCU are connected to D1 and D0 + (pin 7 and pin 8) on Arduino connector CN9 and ST Morpho connector CN10 + as USART signals. Thus SB13 and SB14 should be OFF. + + - SB13 and SB14 Open: PA2 and PA3 on STM32F103C8T6 (ST-LINK MCU) are + disconnected to PA3 and PA2 on STM32 MCU. + + To configure USART2 as the console: + + CONFIG_STM32_USART2=y + CONFIG_USART2_ISUART=y + CONFIG_USART2_SERIAL_CONSOLE=y + CONFIG_USART2_RXBUFSIZE=256 + CONFIG_USART2_TXBUFSIZE=256 + CONFIG_USART2_BAUD=115200 + CONFIG_USART2_BITS=8 + CONFIG_USART2_PARITY=0 + CONFIG_USART2_2STOP=0 + + USART6 + ------ + Pins and Connectors: + + RXD: PC7 CN5 pin2, CN10 pin 19 + PA12 CN10, pin 12 + TXD: PC6 CN10, pin 4 + PA11 CN10, pin 14 + + To configure USART6 as the console: + + CONFIG_STM32_USART6=y + CONFIG_USART6_ISUART=y + CONFIG_USART6_SERIAL_CONSOLE=y + CONFIG_USART6_RXBUFSIZE=256 + CONFIG_USART6_TXBUFSIZE=256 + CONFIG_USART6_BAUD=115200 + CONFIG_USART6_BITS=8 + CONFIG_USART6_PARITY=0 + CONFIG_USART6_2STOP=0 + + Virtual COM Port + ---------------- + Yet another option is to use UART2 and the USB virtual COM port. This + option may be more convenient for long term development, but is painful + to use during board bring-up. + + Solder Bridges. This configuration requires: + + - SB62 and SB63 Open: PA2 and PA3 on STM32 MCU are disconnected to D1 + and D0 (pin 7 and pin 8) on Arduino connector CN9 and ST Morpho + connector CN10. + + - SB13 and SB14 Closed: PA2 and PA3 on STM32F103C8T6 (ST-LINK MCU) are + connected to PA3 and PA2 on STM32 MCU to have USART communication + between them. Thus SB61, SB62 and SB63 should be OFF. + + Configuring USART2 is the same as given above. + + Question: What BAUD should be configure to interface with the Virtual + COM port? 115200 8N1? + + Default + ------- + As shipped, SB62 and SB63 are open and SB13 and SB14 closed, so the + virtual COM port is enabled. + +Shields +======= + + RS-232 from Cutedigi.com + ------------------------ + Supports a single RS-232 connected via + + Nucleo CN9 STM32F4x1RE Cutedigi + ----------- ------------ -------- + Pin 1 PA3 USART2_RX RXD + Pin 2 PA2 USART2_TX TXD + + Support for this shield is enabled by selecting USART2 and configuring + SB13, 14, 62, and 63 as described above under "Serial Consoles" + + Itead Joystick Shield + --------------------- + See http://imall.iteadstudio.com/im120417014.html for more information + about this joystick. + + Itead Joystick Connection: + + --------- ----------------- --------------------------------- + ARDUINO ITEAD NUCLEO-F4x1 + PIN NAME SIGNAL SIGNAL + --------- ----------------- --------------------------------- + D3 Button E Output PB3 + D4 Button D Output PB5 + D5 Button C Output PB4 + D6 Button B Output PB10 + D7 Button A Output PA8 + D8 Button F Output PA9 + D9 Button G Output PC7 + A0 Joystick Y Output PA0 ADC1_0 + A1 Joystick X Output PA1 ADC1_1 + --------- ----------------- --------------------------------- + + All buttons are pulled on the shield. A sensed low value indicates + when the button is pressed. + + NOTE: Button F cannot be used with the default USART1 configuration + because PA9 is configured for USART1_RX by default. Use select + different USART1 pins in the board.h file or select a different + USART or select CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS which will + eliminate all but buttons A, B, and C. + + Itead Joystick Signal interpretation: + + --------- ----------------------- --------------------------- + BUTTON TYPE NUTTX ALIAS + --------- ----------------------- --------------------------- + Button A Large button A JUMP/BUTTON 3 + Button B Large button B FIRE/BUTTON 2 + Button C Joystick select button SELECT/BUTTON 1 + Button D Tiny Button D BUTTON 6 + Button E Tiny Button E BUTTON 7 + Button F Large Button F BUTTON 4 + Button G Large Button G BUTTON 5 + --------- ----------------------- --------------------------- + + Itead Joystick configuration settings: + + System Type -> STM32 Peripheral Support + CONFIG_STM32_ADC1=y : Enable ADC1 driver support + + Drivers + CONFIG_ANALOG=y : Should be automatically selected + CONFIG_ADC=y : Should be automatically selected + CONFIG_INPUT=y : Select input device support + CONFIG_AJOYSTICK=y : Select analog joystick support + + There is nothing in the configuration that currently uses the joystick. + For testing, you can add the following configuration options to enable the + analog joystick example at apps/examples/ajoystick: + + CONFIG_NSH_ARCHINIT=y + CONFIG_EXAMPLES_AJOYSTICK=y + CONFIG_EXAMPLES_AJOYSTICK_DEVNAME="/dev/ajoy0" + CONFIG_EXAMPLES_AJOYSTICK_SIGNO=13 + + STATUS: + 2014-12-04: + - Without ADC DMA support, it is not possible to sample both X and Y + with a single ADC. Right now, only one axis is being converted. + - There is conflicts with some of the Arduino data pins and the + default USART1 configuration. I am currently running with USART1 + but with CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS to eliminate the + conflict. + - Current showstopper: I appear to be getting infinite interrupts as + soon as joystick button interrupts are enabled. + +Configurations +============== + + f401-nsh: + --------- + Configures the NuttShell (nsh) located at apps/examples/nsh for the + Nucleo-F401RE board. The Configuration enables the serial interfaces + on UART2. Support for builtin applications is enabled, but in the base + configuration no builtin applications are selected (see NOTES below). + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Linux. That can easily be reconfigured, of course. + + CONFIG_HOST_LINUX=y : Builds under Linux + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery for Linux + + 3. Although the default console is USART2 (which would correspond to + the Virtual COM port) I have done all testing with the console + device configured for USART1 (see instruction above under "Serial + Consoles). I have been using a TTL-to-RS-232 converter connected + as shown below: + + Nucleo CN10 STM32F4x1RE + ----------- ------------ + Pin 21 PA9 USART1_RX *Warning you make need to reverse RX/TX on + Pin 33 PA10 USART1_TX some RS-232 converters + Pin 20 GND + Pin 8 U5V + + f411-nsh + -------- + This configuration is the same as the f401-nsh configuration, except + that it is configured to support the Nucleo-F411RE. diff --git a/configs/stm32l476vg-disco/include/board.h b/configs/stm32l476vg-disco/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..1c4d5fa33488212394e919f5ab8524b4fda2151d --- /dev/null +++ b/configs/stm32l476vg-disco/include/board.h @@ -0,0 +1,310 @@ +/************************************************************************************ + * configs/stm32l476vg-disco/include/board.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_STM32L476VG_DISCO_INCLUDE_BOARD_H +#define __CONFIGS_STM32L476VG_DISCO_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +#include + +/* DMA Channel/Stream Selections ****************************************************/ +/* Stream selections are arbitrary for now but might become important in the future + * is we set aside more DMA channels/streams. + */ + +/* Values defined in arch/arm/src/stm32l4/chip/stm32l4x6xx_dma.h */ + +/* XXX are these used on disco? */ + +#if 0 + +#define DMACHAN_SDMMC DMACHAN_SDMMC_1 /* 2 choices * / + +#define DMACHAN_SPI1_RX DMACHAN_SPI1_RX_1 /* 2 choices * / +#define DMACHAN_SPI1_TX DMACHAN_SPI1_TX_1 /* 2 choices * / + +/* UART RX DMA configurations */ + +#define DMACHAN_USART1_RX DMACHAN_USART1_RX_2 + +#endif + +/* Alternate function pin selections ************************************************/ + +/* USART1: + * RXD: PB7 + * TXD: PA6 + * + * these pins are shared with the I2C1, which is used for some onboard + * devices, so I am disabling USART1, however I'm leaving the declarations + * here for documentation for anyone who might want to use it instead of + * those onboard devices. + */ + +#if 0 +#define GPIO_USART1_RX GPIO_USART1_RX_2 / * PB7 * / +#define GPIO_USART1_TX GPIO_USART1_TX_2 / * PB6 * / +#endif + +/* USART2: Connected to STLink Debug via PD5, PD6 + * RXD: PD6 + * TXD: PD5 + */ + +#define GPIO_USART2_RX GPIO_USART2_RX_2 /* PD6 */ +#define GPIO_USART2_TX GPIO_USART2_TX_2 /* PD5 */ + +/* I2C + * + * The optional _GPIO configurations allow the I2C driver to manually + * reset the bus to clear stuck slaves. They match the pin configuration, + * but are normally-high GPIOs. + * + * I2C1 connects to devices on the Discovery board, including the + * CS43L22 (addr 0x94) stereo DAC and amplifier. It shares the + * pins with USART1, so that port is disabled so we can access the + * onboard device. + * + */ + +#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 +#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1 +#define GPIO_I2C1_SCL_GPIO \ + (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN6) +#define GPIO_I2C1_SDA_GPIO \ + (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN7) + +/* + * XXX Is I2C2 used on Disco? + */ + +#if 0 + +#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1 +#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1 +#define GPIO_I2C2_SCL_GPIO \ + (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10) +#define GPIO_I2C2_SDA_GPIO \ + (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11) + +#endif + +/* SPI + */ + +/* + * XXX is SPI1 used on Disco? + */ + +#if 0 + +#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 +#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 +#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 + +#endif + + +/* SPI2 is used for several peripherals on the Discovery board, including + * L3GD20 - 3 axis Gyroscope + * LSM303CTR - eCompass, comprising an accelerometer and magnetometer + */ + +#define GPIO_SPI2_MISO GPIO_SPI2_MISO_3 +#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_3 +#define GPIO_SPI2_SCK GPIO_SPI2_SCK_3 + +/* PD7; gyroscope CS */ + +#define GPIO_SPI_CS_GYRO_OFF \ + (GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \ + GPIO_PORTD | GPIO_PIN7) +#define GPIO_SPI_CS_GYRO \ + (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \ + GPIO_OUTPUT_SET | GPIO_PORTD | GPIO_PIN7) + +/* PE0; accelerometer CS */ + +#define GPIO_SPI_CS_ACCEL_OFF \ + (GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \ + GPIO_PORTE | GPIO_PIN0) +#define GPIO_SPI_CS_ACCEL \ + (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \ + GPIO_OUTPUT_SET | GPIO_PORTE | GPIO_PIN0) + +/* PC0; magnetometer CS */ + +#define GPIO_SPI_CS_MAGNETO_OFF \ + (GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \ + GPIO_PORTC | GPIO_PIN0) +#define GPIO_SPI_CS_MAGNETO \ + (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \ + GPIO_OUTPUT_SET | GPIO_PORTC | GPIO_PIN0) + +/* XXX these will need to be set up when these get implemented: + * PD2 gyro INT1 + * PB8 gyro INT2/DRDY + * + * PE1 accel INT + * PC2 magneto DRDY + * PC1 magneto INT + */ + +/* LEDs + * + * The STM32L476VG-DISCO board provides two user LEDs, LD4 (red) and LD5 (green). + * + * PB2 is LD4 (red) + * PE8 is LD5 (green) + * - When the I/O is HIGH value, the LED is on. + * - When the I/O is LOW, the LED is off. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED_RED 0 +#define BOARD_LED_GRN 1 +#define BOARD_NLEDS 2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_RED_BIT (1 << BOARD_LED_RED) +#define BOARD_LED_GRN_BIT (1 << BOARD_LED_GRN) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/stm32_autoleds.c. The LEDs are used to encode + * OS-related events as follows when the red and green LEDs are available: + * + * SYMBOL Meaning BOARD_LED_GRN BOARD_LED_RED + * ------------------- ----------------------- ----------- ------------ + * LED_STARTED NuttX has been started + * LED_HEAPALLOCATE Heap has been allocated + * LED_IRQSENABLED Interrupts enabled + * LED_STACKCREATED Idle stack created + * LED_INIRQ In an interrupt + * LED_SIGNAL In a signal handler + * LED_ASSERTION An assertion failed + * LED_PANIC The system has crashed Blinking + * LED_IDLE MCU is is sleep mode ON + * + * Thus if BOARD_LED_GRN, NuttX has successfully booted and is, apparently, running + * normally. If BOARD_LED_RED is flashing at approximately 2Hz, then a fatal error + * has been detected and the system has halted. + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 +#define LED_IDLE 8 + +/* Buttons + * + * There is a 4 way d-pad 'joystick' with center button + * connected to PA0,1,5,2,3 + * C L D R U + */ + +#define BUTTON_CENTER 0 +#define BUTTON_LEFT 1 +#define BUTTON_DOWN 2 +#define BUTTON_RIGHT 3 +#define BUTTON_UP 4 +#define NUM_BUTTONS 5 + +#define BUTTON_CENTER_BIT (1 << BUTTON_CENTER) +#define BUTTON_LEFT_BIT (1 << BUTTON_LEFT) +#define BUTTON_DOWN_BIT (1 << BUTTON_DOWN) +#define BUTTON_TIGHT_BIT (1 << BUTTON_RIGHT) +#define BUTTON_UP_BIT (1 << BUTTON_UP) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32l4_boardinitialize + * + * Description: + * All STM32L4 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32l4_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_STM32L476VG_DISCO_INCLUDE_BOARD_H */ diff --git a/configs/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h b/configs/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h new file mode 100644 index 0000000000000000000000000000000000000000..ef7871c8f27b9fde1648a8784fe889736d92d002 --- /dev/null +++ b/configs/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h @@ -0,0 +1,204 @@ +/************************************************************************************ + * configs/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_STM32L476VG_DISCO_INCLUDE_STM32L476VG_DISCO_CLOCKING_H +#define __CONFIGS_STM32L476VG_DISCO_INCLUDE_STM32L476VG_DISCO_CLOCKING_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* The stm32l476vg-disco supports both HSE and LSE crystals (X2 and X3). However, as + * shipped, the HSE X2 crystal is not populated. Therefore the stm32l476vg-disco + * will need to run off the 16MHz HSI clock, or the 32khz-synced MSI. + */ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC + * MSI - variable up to 48 MHz, synchronized to LSE + * HSE - not installed + * LSE - 32.768 kHz installed + */ + +#define STM32L4_HSI_FREQUENCY 16000000ul +#define STM32L4_LSI_FREQUENCY 32000 +#define STM32L4_LSE_FREQUENCY 32768 + +/* XXX review the STM32L4_BOARD_USEHSI usage, it has too much influence in + * stm32l4x6xx_rcc.c. I suspect it is fine for it to turn on and off that + * ocillator, but really that's all it should do (e.g. it also controls + * input of teh PLLs. Also, it should be fine/desireable to support things + * like turning on both HSI and MSI, because they plausibly can both be + * used at the same time; currently those choices HSE/HSI16/MSI are + * mutually exclusive. + */ + +#define STM32L4_BOARD_USEHSI 1 + +/* prescaler common to all PLL inputs; will be 1 (XXX source is implicitly + as per comment above HSI) */ + +#define STM32L4_PLLCFG_PLLM RCC_PLLCFG_PLLM(1) + +/* 'main' PLL config; we use this to generate our system clock via the R + * output. We set it up as 16 MHz / 1 * 10 / 2 = 80 MHz + * + * XXX NOTE: currently the main PLL is implicitly turned on and is implicitly + * the system clock; this should be configurable since not all applications may + * want things done this way. + */ + +#define STM32L4_PLLCFG_PLLN RCC_PLLCFG_PLLN(10) +#define STM32L4_PLLCFG_PLLP 0 +#undef STM32L4_PLLCFG_PLLP_ENABLED +#define STM32L4_PLLCFG_PLLQ RCC_PLLCFG_PLLQ_2 +#define STM32L4_PLLCFG_PLLQ_ENABLED +#define STM32L4_PLLCFG_PLLR RCC_PLLCFG_PLLR_2 +#define STM32L4_PLLCFG_PLLR_ENABLED + +/* 'SAIPLL1' is used to generate the 48 MHz clock, since we can't + * do that with the main PLL's N value. We set N = 13, and enable + * the Q output (ultimately for CLK48) with /4. So, + * 16 MHz / 1 * 12 / 4 = 48 MHz + * + * XXX NOTE: currently the SAIPLL /must/ be explicitly selected in the + * menuconfig, or else all this is a moot point, and the various 48 MHz + * peripherals will not work (RNG at present). I would suggest removing + * that option from Kconfig altogether, and simply making it an option + * that is selected via a #define here, like all these other params. + */ + +#define STM32L4_PLLSAI1CFG_PLLN RCC_PLLSAI1CFG_PLLN(12) +#define STM32L4_PLLSAI1CFG_PLLP 0 +#undef STM32L4_PLLSAI1CFG_PLLP_ENABLED +#define STM32L4_PLLSAI1CFG_PLLQ RCC_PLLSAI1CFG_PLLQ_4 +#define STM32L4_PLLSAI1CFG_PLLQ_ENABLED +#define STM32L4_PLLSAI1CFG_PLLR 0 +#undef STM32L4_PLLSAI1CFG_PLLR_ENABLED + +/* 'SAIPLL2' is not used in this application */ + +#define STM32L4_PLLSAI2CFG_PLLN RCC_PLLSAI2CFG_PLLN(8) +#define STM32L4_PLLSAI2CFG_PLLP 0 +#undef STM32L4_PLLSAI2CFG_PLLP_ENABLED +#define STM32L4_PLLSAI2CFG_PLLR 0 +#undef STM32L4_PLLSAI2CFG_PLLR_ENABLED + +#define STM32L4_SYSCLK_FREQUENCY 80000000ul + +/* CLK48 will come from PLLSAI1 (implicitly Q) */ + +#define STM32L4_USE_CLK48 1 +#define STM32L4_CLK48_SEL RCC_CCIPR_CLK48SEL_PLLSAI1 + +/* enable the LSE oscillator, used automatically trim the MSI, and for RTC */ + +#define STM32L4_USE_LSE 1 + +/* AHB clock (HCLK) is SYSCLK (80MHz) */ + +#define STM32L4_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32L4_HCLK_FREQUENCY STM32L4_SYSCLK_FREQUENCY +#define STM32L4_BOARD_HCLK STM32L4_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/1 (80MHz) */ + +#define STM32L4_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK /* PCLK1 = HCLK / 1 */ +#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY/1) + +/* Timers driven from APB1 will be twice PCLK1 */ +/* REVISIT : this can be configured */ + +#define STM32L4_APB1_TIM2_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM3_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM4_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM5_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM6_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM7_CLKIN (2*STM32L4_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK (80MHz) */ + +#define STM32L4_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK / 1 */ +#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY/1) + +/* Timers driven from APB2 will be twice PCLK2 */ +/* REVISIT : this can be configured */ + +#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY) +#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ +/* REVISIT : this can be configured */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_STM32L476VG_DISCO_INCLUDE_STM32L476VG_DISCO_CLOCKING_H */ diff --git a/configs/stm32l476vg-disco/nsh/Make.defs b/configs/stm32l476vg-disco/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..eac292a8bd5133ddaacadd13a72609970c68e649 --- /dev/null +++ b/configs/stm32l476vg-disco/nsh/Make.defs @@ -0,0 +1,112 @@ +############################################################################ +# configs/stm32l476vg-disco/nsh/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: dev@ziggurat29.com +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mknulldeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32l476vg-disco/nsh/defconfig b/configs/stm32l476vg-disco/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..56aef70f512381bec11e599e247cb624997e7c3d --- /dev/null +++ b/configs/stm32l476vg-disco/nsh/defconfig @@ -0,0 +1,988 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_DEBUG_VERBOSE=y + +# +# Subsystem Debug Options +# +CONFIG_DEBUG_BINFMT=y +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_GRAPHICS=y +CONFIG_DEBUG_LIB=y +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_HEAP is not set +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +CONFIG_DEBUG_LEDS=y +CONFIG_DEBUG_ANALOG=y +CONFIG_DEBUG_GPIO=y +# CONFIG_DEBUG_RTC is not set +CONFIG_DEBUG_SPI=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +CONFIG_ARCH_CHIP_STM32L4=y +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32l4" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set +# CONFIG_DEBUG_HARDFAULT is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set + +# +# STM32L4 Configuration Options +# +CONFIG_ARCH_CHIP_STM32L476RG=y +# CONFIG_ARCH_CHIP_STM32L476RE is not set +# CONFIG_ARCH_CHIP_STM32L486 is not set +CONFIG_STM32L4_STM32L476XX=y +# CONFIG_STM32L4_STM32L486XX is not set +# CONFIG_STM32L4_FLASH_256KB is not set +# CONFIG_STM32L4_FLASH_512KB is not set +CONFIG_STM32L4_FLASH_1024KB=y + +# +# STM32L4 Peripheral Support +# +# CONFIG_STM32L4_HAVE_LTDC is not set +# CONFIG_STM32L4_ADC is not set +# CONFIG_STM32L4_CAN is not set +# CONFIG_STM32L4_DAC is not set +# CONFIG_STM32L4_DMA is not set +# CONFIG_STM32L4_I2C is not set +# CONFIG_STM32L4_SAI is not set +# CONFIG_STM32L4_SPI is not set +CONFIG_STM32L4_USART=y +# CONFIG_STM32L4_LPTIM is not set + +# +# AHB1 Peripherals +# +# CONFIG_STM32L4_DMA1 is not set +# CONFIG_STM32L4_DMA2 is not set +# CONFIG_STM32L4_CRC is not set +# CONFIG_STM32L4_TSC is not set + +# +# AHB2 Peripherals +# +# CONFIG_STM32L4_OTGFS is not set +# CONFIG_STM32L4_ADC1 is not set +# CONFIG_STM32L4_ADC2 is not set +# CONFIG_STM32L4_ADC3 is not set +# CONFIG_STM32L4_AES is not set +CONFIG_STM32L4_RNG=y + +# +# AHB3 Peripherals +# +# CONFIG_STM32L4_FMC is not set +# CONFIG_STM32L4_QUADSPI is not set + +# +# APB1 Peripherals +# +CONFIG_STM32L4_PWR=y +# CONFIG_STM32L4_TIM2 is not set +# CONFIG_STM32L4_TIM3 is not set +# CONFIG_STM32L4_TIM4 is not set +# CONFIG_STM32L4_TIM5 is not set +# CONFIG_STM32L4_TIM6 is not set +# CONFIG_STM32L4_TIM7 is not set +# CONFIG_STM32L4_LCD is not set +# CONFIG_STM32L4_SPI2 is not set +# CONFIG_STM32L4_SPI3 is not set +# CONFIG_STM32L4_USART1 is not set +CONFIG_STM32L4_USART2=y +# CONFIG_STM32L4_USART3 is not set +# CONFIG_STM32L4_UART4 is not set +# CONFIG_STM32L4_UART5 is not set +# CONFIG_STM32L4_I2C1 is not set +# CONFIG_STM32L4_I2C2 is not set +# CONFIG_STM32L4_I2C3 is not set +# CONFIG_STM32L4_CAN1 is not set +# CONFIG_STM32L4_DAC1 is not set +# CONFIG_STM32L4_DAC2 is not set +# CONFIG_STM32L4_OPAMP is not set +# CONFIG_STM32L4_LPTIM1 is not set +# CONFIG_STM32L4_LPUART1 is not set +# CONFIG_STM32L4_SWPMI is not set +# CONFIG_STM32L4_LPTIM2 is not set + +# +# APB2 Peripherals +# +CONFIG_STM32L4_SYSCFG=y +CONFIG_STM32L4_FIREWALL=y +# CONFIG_STM32L4_SDMMC1 is not set +# CONFIG_STM32L4_TIM1 is not set +# CONFIG_STM32L4_SPI1 is not set +# CONFIG_STM32L4_TIM8 is not set +# CONFIG_STM32L4_TIM15 is not set +# CONFIG_STM32L4_TIM16 is not set +# CONFIG_STM32L4_TIM17 is not set +# CONFIG_STM32L4_SAI1 is not set +# CONFIG_STM32L4_SAI2 is not set +# CONFIG_STM32L4_DFSDM is not set + +# +# Other Peripherals +# +# CONFIG_STM32L4_BKPSRAM is not set +# CONFIG_STM32L4_IWDG is not set +# CONFIG_STM32L4_WWDG is not set +CONFIG_STM32L4_FLASH_PREFETCH=y +CONFIG_STM32L4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG is not set +CONFIG_STM32L4_RTC_LSECLOCK=y +# CONFIG_STM32L4_RTC_LSICLOCK is not set +# CONFIG_STM32L4_RTC_HSECLOCK is not set +CONFIG_STM32L4_SAI1PLL=y +# CONFIG_STM32L4_SAI2PLL is not set + +# +# U[S]ART Configuration +# +# CONFIG_STM32L4_FLOWCONTROL_BROKEN is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8499 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=98304 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_NUCLEO_L476RG is not set +CONFIG_ARCH_BOARD_STM32L476VG_DISCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32l476vg-disco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +# CONFIG_RTC_ALARM is not set +CONFIG_RTC_DRIVER=y +CONFIG_RTC_IOCTL=y +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=4 +CONFIG_EXAMPLES_IRQBUTTONS_MIN=0 +CONFIG_EXAMPLES_IRQBUTTONS_MAX=4 +CONFIG_EXAMPLES_BUTTONS_NAME0="Center" +CONFIG_EXAMPLES_BUTTONS_NAME1="Left" +CONFIG_EXAMPLES_BUTTONS_NAME2="Down" +CONFIG_EXAMPLES_BUTTONS_NAME3="Right" +CONFIG_EXAMPLES_BUTTONS_NAME4="Up" +CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" +CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" +CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=8192 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +CONFIG_EXAMPLES_OSTEST_WAITRESULT=y +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +CONFIG_EXAMPLES_RANDOM=y +CONFIG_EXAMPLES_MAXSAMPLES=64 +CONFIG_EXAMPLES_NSAMPLES=8 +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32l476vg-disco/nsh/setenv.sh b/configs/stm32l476vg-disco/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..d94f2f90663f60af91c172fd962410dceccfc264 --- /dev/null +++ b/configs/stm32l476vg-disco/nsh/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/stm32l476vg-disco/nsh/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32l476vg-disco/scripts/ld.script b/configs/stm32l476vg-disco/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..b412f80076aea50290bf713a99945468fb4924b1 --- /dev/null +++ b/configs/stm32l476vg-disco/scripts/ld.script @@ -0,0 +1,125 @@ +/**************************************************************************** + * configs/stm32l476vg-disco/scripts/l476rg.ld + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Sebastien Lorquet + * dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32L476VG has 1024Kb of FLASH beginning at address 0x0800:0000, + * 96Kb of SRAM beginning at address 0x2000:0000, and 32Kb of SRAM2 beginning + * at address 0x1000:0000. The SRAM2 has special properties (e.g. parity + * check, separate power domain for retention in low power modes, write + * protection). Alas, it is non-contiguous with main SRAM. + * When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 96K + sram2 (rwx) : ORIGIN = 0x10000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32L476RG has 96Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32l476vg-disco/src/Makefile b/configs/stm32l476vg-disco/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..64e8fa360c543bc034fae541f09237b1d564ebca --- /dev/null +++ b/configs/stm32l476vg-disco/src/Makefile @@ -0,0 +1,70 @@ +############################################################################ +# configs/nucleo-l476rg/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: dev@ziggurat29.com +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG),y) +CSRCS += stm32_clockconfig.c +endif + +ifeq ($(CONFIG_STM32_OTGFS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_ADC),y) +#CSRCS += stm32_adc.c +ifeq ($(CONFIG_AJOYSTICK),y) +#CSRCS += stm32_ajoystick.c +endif +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32l476vg-disco/src/stm32_appinit.c b/configs/stm32l476vg-disco/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..1b9056b75d41f37dfacb565b4c2e1bbe5b0bdb75 --- /dev/null +++ b/configs/stm32l476vg-disco/src/stm32_appinit.c @@ -0,0 +1,77 @@ +/**************************************************************************** + * configs/stm32l476vg-disco/src/stm32_appinit.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include +#include + +#include + +#include "stm32l476vg-disco.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + /* Configure CPU load estimation */ + +#ifdef CONFIG_SCHED_INSTRUMENTATION + cpuload_initialize_once(); +#endif + + return OK; +} diff --git a/configs/stm32l476vg-disco/src/stm32_autoleds.c b/configs/stm32l476vg-disco/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..22ee6771760bc545dadefed4c15ccdd20a00f248 --- /dev/null +++ b/configs/stm32l476vg-disco/src/stm32_autoleds.c @@ -0,0 +1,194 @@ +/**************************************************************************** + * configs/stm32l476vg-disco/src/stm32_autoleds.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32l4.h" +#include "stm32l476vg-disco.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LD4,5 GPIO for output */ + + stm32l4_configgpio(GPIO_LED_RED); + stm32l4_configgpio(GPIO_LED_GRN); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + /* 0: LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED + * + * Since the LEDs were initially all OFF and since this state only + * occurs one time, nothing need be done. + */ + + default: + case LED_STARTED: + case LED_HEAPALLOCATE: + case LED_IRQSENABLED: + break; + + /* 1: LED_STACKCREATED + * + * This case will also occur only once. + */ + + case LED_STACKCREATED: + break; + + /* 2: LED_INIRQ, LED_SIGNAL, LED_ASSERTION + * + * This case will occur many times. + */ + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + stm32l4_gpiowrite(GPIO_LED_RED, true); + break; + + /* 3: LED_PANIC: GPIO_LED_GRN=OFF RX=ON + * + * This case will also occur many times. + */ + + case LED_PANIC: + stm32l4_gpiowrite(GPIO_LED_GRN, false); + stm32l4_gpiowrite(GPIO_LED_RED, true); + break; + + case LED_IDLE: + stm32l4_gpiowrite(GPIO_LED_GRN, true); + stm32l4_gpiowrite(GPIO_LED_RED, false); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + /* 0: LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED: + * 1: LED_STACKCREATED: + * + * These cases should never happen. + */ + + default: + case LED_STARTED: + case LED_HEAPALLOCATE: + case LED_IRQSENABLED: + case LED_STACKCREATED: + break; + + /* 2: LED_INIRQ, LED_SIGNAL, LED_ASSERTION: + * + * This case will occur many times. + */ + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + stm32l4_gpiowrite(GPIO_LED_RED, false); + break; + + /* 3: LED_PANIC: GPIO_LED_GRN=OFF RX=OFF + * + * This case will also occur many times. + */ + + case LED_PANIC: + stm32l4_gpiowrite(GPIO_LED_GRN, false); + stm32l4_gpiowrite(GPIO_LED_RED, false); + break; + + case LED_IDLE: + stm32l4_gpiowrite(GPIO_LED_GRN, false); + stm32l4_gpiowrite(GPIO_LED_RED, false); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/stm32l476vg-disco/src/stm32_boot.c b/configs/stm32l476vg-disco/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..588618338046c21746c8dc040ca78c03879a53dc --- /dev/null +++ b/configs/stm32l476vg-disco/src/stm32_boot.c @@ -0,0 +1,119 @@ +/************************************************************************************ + * configs/stm32l476vg-disco/src/stm32_boot.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include + +#include "up_arch.h" +#include "stm32l476vg-disco.h" + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32l4_boardinitialize + * + * Description: + * All STM32L4 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32l4_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + + /* Configure SPI chip selects if 1) SP2 is not disabled, and 2) the weak function + * stm32_spiinitialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + stm32l4_spiinitialize(); +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB) + stm32l4_usbinitialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_NSH_ARCHINIT) + board_app_initialize(); +#endif +} +#endif diff --git a/configs/stm32l476vg-disco/src/stm32_buttons.c b/configs/stm32l476vg-disco/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..6a49927e80217458ebe1bc7077c7cfb7e334d39b --- /dev/null +++ b/configs/stm32l476vg-disco/src/stm32_buttons.c @@ -0,0 +1,342 @@ +/**************************************************************************** + * configs/stm32l476vg-disco/src/stm32_buttons.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include "stm32l476vg-disco.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef CONFIG_PM_BUTTON_ACTIVITY +# define CONFIG_PM_BUTTON_ACTIVITY 10 +#endif + +#define PM_IDLE_DOMAIN 0 /* Revisit */ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* Button Power Management */ + +#ifdef CONFIG_PM +static void button_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +static int button_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Pin configuration for each STM32L476 Discovery button. This array is + * indexed by the BUTTON_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_CENTER, + GPIO_BTN_LEFT, + GPIO_BTN_DOWN, + GPIO_BTN_RIGHT, + GPIO_BTN_UP +}; + +#ifdef CONFIG_PM +static struct pm_callback_s g_buttonscb = +{ + .notify = button_pm_notify, + .prepare = button_pm_prepare, +}; +#ifndef CONFIG_PM_BUTTON_ACTIVITY +#define CONFIG_PM_BUTTON_ACTIVITY 10 +#endif +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: button_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void button_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + switch (pmstate) + { + case(PM_NORMAL): + { + /* Restore normal buttons operation */ + //XXX turn on any GPIO + } + break; + + case(PM_IDLE): + { + /* Entering IDLE mode - buttons */ + //XXX turn on any GPIO + } + break; + + case(PM_STANDBY): + { + /* Entering STANDBY mode - Logic for PM_STANDBY goes here */ + //XXX turn off any GPIO + } + break; + + case(PM_SLEEP): + { + /* Entering SLEEP mode - Logic for PM_SLEEP goes here */ + //XXX turn off any GPIO + } + break; + + default: + { + /* Should not get here */ + + } + break; + } +} +#endif + +/**************************************************************************** + * Name: button_handler + * + * Description: + * Handle a button wake-up interrupt + * + ****************************************************************************/ +/* XXX it's not completely clear to me if this is appropriate; on the one + * hand, it seems to make sense that this would be the module to have the ISR + * for the buttons. On the other hand, it will conflict with things done in + * the buttons example, which registers it's own ISR, and warns if it sees + * one already there. I don't know if 'buttons' is overstepping it's bounds + * in the interst of providing a compact example, (like the I2C app directly + * talking to the bus), or if really that should be an expected thing to do. + */ + +#if 0 +#ifdef CONFIG_ARCH_IRQBUTTONS +static int button_handler(int irq, FAR void *context) +{ +#ifdef CONFIG_PM + /* At this point the MCU should have already awakened. The state + * change will be handled in the IDLE loop when the system is re-awakened + * The button interrupt handler should be totally ignorant of the PM + * activities and should report button activity as if nothing + * special happened. + */ + + pm_activity(PM_IDLE_DOMAIN, CONFIG_PM_BUTTON_ACTIVITY); +#endif + return OK; +} +#endif /* CONFIG_ARCH_IRQBUTTONS */ +#endif + +/**************************************************************************** + * Name: button_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int button_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* No preparation to change power modes is required by the Buttons driver. + * We always accept the state change by returning OK. + */ + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32l4_configgpio(g_buttons[i]); + + /* It's not clear if this is correct; I think so, but then there are + * conflicts with the 'buttons' sample app. + */ + +#if 0 +#ifdef CONFIG_ARCH_IRQBUTTONS + xcpt_t oldhandler = board_button_irq(i, button_handler); + if (oldhandler != NULL) + { + lowsyslog(LOG_WARNING, "WARNING: oldhandler:%p is not NULL! " + "Button events may be lost or aliased!\n", + oldhandler); + } +#endif +#endif + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A HIGH value means that the key is pressed. */ + + bool pressed = stm32l4_gpioread(g_buttons[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (pressed) + { + ret |= (1 << i); + } + } + +#ifdef CONFIG_PM + /* if the user pressed any buttons, notify power management system we are + * active + */ + + if (0 != ret) + { + pm_activity(PM_IDLE_DOMAIN, CONFIG_PM_BUTTON_ACTIVITY); + } +#endif + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32l4_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/stm32l476vg-disco/src/stm32_clockconfig.c b/configs/stm32l476vg-disco/src/stm32_clockconfig.c new file mode 100644 index 0000000000000000000000000000000000000000..5af2a5c763d3f677b865f8efc4767873bc40eb13 --- /dev/null +++ b/configs/stm32l476vg-disco/src/stm32_clockconfig.c @@ -0,0 +1,239 @@ +/************************************************************************************ + * configs/stm32l476vg-disco/src/stm32_clockconfig.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "stm32l476vg-disco.h" + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_board_clockconfig + * + * Description: + * I provided this module when I was doing some debugging of a problem I had with + * clocking (it was helpful to do A/B tests). I'm leaving it here in the config + * partially because I expect to have similar problems again as I develop more of + * the various peripheral support, but also because it may become necessary in the + * end for certain project configurations which have specialized clock configurations + * that aren't appropriate to expose in the 'arch' default code. + * + ************************************************************************************/ + +#if defined(CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG) +void stm32l4_board_clockconfig(void) +{ + uint32_t regval; + + /* Enable Internal High-Speed Clock (HSI) */ + + regval = getreg32(STM32L4_RCC_CR); + regval |= RCC_CR_HSION; /* Enable HSI */ + putreg32(regval, STM32L4_RCC_CR); + + /* Wait until the HSI is ready */ + + while ((getreg32(STM32L4_RCC_CR) & RCC_CR_HSIRDY) == 0) + { + } + + /* Set the HCLK source/divider */ + + regval = getreg32(STM32L4_RCC_CFGR); + regval &= ~RCC_CFGR_HPRE_MASK; + regval |= STM32L4_RCC_CFGR_HPRE; + putreg32(regval, STM32L4_RCC_CFGR); + + /* Set the PCLK2 divider */ + + regval = getreg32(STM32L4_RCC_CFGR); + regval &= ~RCC_CFGR_PPRE2_MASK; + regval |= STM32L4_RCC_CFGR_PPRE2; + putreg32(regval, STM32L4_RCC_CFGR); + + /* Set the PCLK1 divider */ + + regval = getreg32(STM32L4_RCC_CFGR); + regval &= ~RCC_CFGR_PPRE1_MASK; + regval |= STM32L4_RCC_CFGR_PPRE1; + putreg32(regval, STM32L4_RCC_CFGR); + + /* Set the PLL source and main divider */ + + regval = getreg32(STM32L4_RCC_PLLCFG); + + /* Configure Main PLL */ + /* Set the PLL dividers and multipliers to configure the main PLL */ + + regval = (STM32L4_PLLCFG_PLLM | STM32L4_PLLCFG_PLLN | STM32L4_PLLCFG_PLLP + | STM32L4_PLLCFG_PLLQ | STM32L4_PLLCFG_PLLR); + regval |= RCC_PLLCFG_PLLQEN; + regval |= RCC_PLLCFG_PLLREN; + + /* XXX The choice of clock source to PLL (all three) is independent + * of the sys clock source choice, review the STM32L4_BOARD_USEHSI + * name; probably split it into two, one for PLL source and one + * for sys clock source. + */ + + regval |= RCC_PLLCFG_PLLSRC_HSI; + putreg32(regval, STM32L4_RCC_PLLCFG); + + /* Enable the main PLL */ + + regval = getreg32(STM32L4_RCC_CR); + regval |= RCC_CR_PLLON; + putreg32(regval, STM32L4_RCC_CR); + + /* Wait until the PLL is ready */ + + while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLRDY) == 0) + { + } + + /* Configure SAI1 PLL */ + + regval = getreg32(STM32L4_RCC_PLLSAI1CFG); + + /* Set the PLL dividers and multipliers to configure the SAI1 PLL */ + + regval = (STM32L4_PLLSAI1CFG_PLLN | STM32L4_PLLSAI1CFG_PLLP | + STM32L4_PLLSAI1CFG_PLLQ | STM32L4_PLLSAI1CFG_PLLR); + regval |= RCC_PLLSAI1CFG_PLLQEN; + putreg32(regval, STM32L4_RCC_PLLSAI1CFG); + + /* Enable the SAI1 PLL */ + + regval = getreg32(STM32L4_RCC_CR); + regval |= RCC_CR_PLLSAI1ON; + putreg32(regval, STM32L4_RCC_CR); + + /* Wait until the PLL is ready */ + + while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI1RDY) == 0) + { + } + + /* Configure SAI2 PLL */ + + regval = getreg32(STM32L4_RCC_PLLSAI2CFG); + + /* Enable the SAI2 PLL */ + /* Set the PLL dividers and multipliers to configure the SAI2 PLL */ + + regval = (STM32L4_PLLSAI2CFG_PLLN | STM32L4_PLLSAI2CFG_PLLP | + STM32L4_PLLSAI2CFG_PLLR); + putreg32(regval, STM32L4_RCC_PLLSAI2CFG); + + /* Enable the SAI1 PLL */ + + regval = getreg32(STM32L4_RCC_CR); + regval |= RCC_CR_PLLSAI2ON; + putreg32(regval, STM32L4_RCC_CR); + + /* Wait until the PLL is ready */ + + while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI2RDY) == 0) + { + } + + /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ + +#ifdef CONFIG_STM32L4_FLASH_PREFETCH + regval = (FLASH_ACR_LATENCY_4 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | + FLASH_ACR_PRFTEN); +#else + regval = (FLASH_ACR_LATENCY_4 | FLASH_ACR_ICEN | FLASH_ACR_DCEN); +#endif + putreg32(regval, STM32L4_FLASH_ACR); + + /* Select the main PLL as system clock source */ + + regval = getreg32(STM32L4_RCC_CFGR); + regval &= ~RCC_CFGR_SW_MASK; + regval |= RCC_CFGR_SW_PLL; + putreg32(regval, STM32L4_RCC_CFGR); + + /* Wait until the PLL source is used as the system clock source */ + + while ((getreg32(STM32L4_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL) + { + } + +#if defined(CONFIG_STM32L4_IWDG) || defined(CONFIG_RTC_LSICLOCK) + + /* Low speed internal clock source LSI */ + + stm32l4_rcc_enablelsi(); +#endif + +#if defined(STM32L4_USE_LSE) + + /* Low speed external clock source LSE + * + * TODO: There is another case where the LSE needs to + * be enabled: if the MCO1 pin selects LSE as source. + */ + + stm32l4_pwr_enableclk(true); + stm32l4_rcc_enablelse(); +#endif + + /* XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source + * and then we can also do away with STM32L4_USE_CLK48, and give better + * warning messages + * + * XXX sanity if our STM32L4_CLK48_SEL is YYY then we need to have already + * enabled ZZZ + */ + + regval = getreg32(STM32L4_RCC_CCIPR); + regval &= RCC_CCIPR_CLK48SEL_MASK; + regval |= STM32L4_CLK48_SEL; + putreg32(regval, STM32L4_RCC_CCIPR); +} +#endif diff --git a/configs/stm32l476vg-disco/src/stm32_spi.c b/configs/stm32l476vg-disco/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..c37d3a7a7c6460f06069b981af7cb06565dcaaba --- /dev/null +++ b/configs/stm32l476vg-disco/src/stm32_spi.c @@ -0,0 +1,271 @@ +/**************************************************************************** + * configs/stm32l476vg-disco/src/stm32_spi.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include "stm32l476vg-disco.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_SPI +# undef CONFIG_DEBUG_VERBOSE +#endif + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ +/* Global driver instances */ + +#ifdef CONFIG_STM32_SPI1 +xxx +struct spi_dev_s *g_spi1; +#endif +#ifdef CONFIG_STM32_SPI2 +yyy +struct spi_dev_s *g_spi2; +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spiinitialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Nucleo-F401RE and + * Nucleo-F411RE boards. + * + ************************************************************************************/ + +void weak_function stm32_spiinitialize(void) +{ +#ifdef CONFIG_STM32_SPI1 + /* Configure SPI-based devices */ + + g_spi1 = up_spiinitialize(1); + if (!g_spi1) + { + spidbg("[boot] FAILED to initialize SPI port 1\n"); + } + +#ifdef CONFIG_WL_CC3000 + stm32_configgpio(GPIO_SPI_CS_WIFI); +#endif + +#ifdef HAVE_MMCSD + stm32_configgpio(GPIO_SPI_CS_SD_CARD); +#endif +#endif + +#ifdef CONFIG_STM32_SPI2 + /* Configure SPI-based devices */ + + g_spi2 = up_spiinitialize(2); + + /* Setup CS, EN & IRQ line IOs */ + +#ifdef CONFIG_WL_CC3000 + stm32_configgpio(GPIO_WIFI_CS); + stm32_configgpio(GPIO_WIFI_EN); + stm32_configgpio(GPIO_WIFI_INT); +#endif +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including up_spiinitialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to up_spiinitialize() in your low level application + * initialization logic + * 4. The handle returned by up_spiinitialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +#ifdef CONFIG_WL_CC3000 + if (devid == SPIDEV_WIRELESS) + { + stm32_gpiowrite(GPIO_SPI_CS_WIFI, !selected); + } + else +#endif +#ifdef HAVE_MMCSD + if (devid == SPIDEV_MMCSD) + { + stm32_gpiowrite(GPIO_SPI_CS_SD_CARD, !selected); + } +#endif +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +#ifdef CONFIG_WL_CC3000 + if (devid == SPIDEV_WIRELESS) + { + stm32_gpiowrite(GPIO_WIFI_CS, !selected); + } +#endif +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) + + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif +#endif /* CONFIG_SPI_CMDDATA */ + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 || CONFIG_STM32_SPI3 */ diff --git a/configs/stm32l476vg-disco/src/stm32_userleds.c b/configs/stm32l476vg-disco/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..5e5c56d5f2c4451348c9728c5db98290ce46e0a4 --- /dev/null +++ b/configs/stm32l476vg-disco/src/stm32_userleds.c @@ -0,0 +1,245 @@ +/**************************************************************************** + * configs/stm32l476vg-disco/src/stm32_userleds.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32l4.h" +#include "stm32l476vg-disco.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* LED Power Management */ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_PM +static struct pm_callback_s g_ledscb = +{ + .notify = led_pm_notify, + .prepare = led_pm_prepare, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + switch (pmstate) + { + case(PM_NORMAL): + { + /* Restore normal LEDs operation */ + + //stm32l4_gpiowrite(GPIO_LED_RED, (ledset & BOARD_LED_RED_BIT) != 0); + //stm32l4_gpiowrite(GPIO_LED_GRN, (ledset & BOARD_LED_GRN_BIT) != 0); + } + break; + + case(PM_IDLE): + { + /* Entering IDLE mode - Turn leds off */ + + stm32l4_gpiowrite(GPIO_LED_RED, 0); + stm32l4_gpiowrite(GPIO_LED_GRN, 0); + } + break; + + case(PM_STANDBY): + { + /* Entering STANDBY mode - Logic for PM_STANDBY goes here */ + + stm32l4_gpiowrite(GPIO_LED_RED, 0); + stm32l4_gpiowrite(GPIO_LED_GRN, 0); + } + break; + + case(PM_SLEEP): + { + /* Entering SLEEP mode - Logic for PM_SLEEP goes here */ + + stm32l4_gpiowrite(GPIO_LED_RED, 0); + stm32l4_gpiowrite(GPIO_LED_GRN, 0); + } + break; + + default: + { + /* Should not get here */ + } + break; + } +} +#endif + +/**************************************************************************** + * Name: led_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* No preparation to change power modes is required by the LEDs driver. + * We always accept the state change by returning OK. + */ + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LD4,5 GPIO for output */ + + stm32l4_configgpio(GPIO_LED_RED); + stm32l4_configgpio(GPIO_LED_GRN); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + switch (led) + { + case BOARD_LED_RED: + stm32l4_gpiowrite(GPIO_LED_RED, ldeon); + break; + + case BOARD_LED_GRN: + stm32l4_gpiowrite(GPIO_LED_GRN, ldeon); + break; + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32l4_gpiowrite(GPIO_LED_RED, (ledset & BOARD_LED_RED_BIT) != 0); + stm32l4_gpiowrite(GPIO_LED_GRN, (ledset & BOARD_LED_GRN_BIT) != 0); +} + +/**************************************************************************** + * Name: stm32_led_pminitialize + ****************************************************************************/ + +#ifdef CONFIG_PM +void stm32_led_pminitialize(void) +{ + /* Register to receive power management callbacks */ + + int ret = pm_register(&g_ledscb); + DEBUGASSERT(ret == OK); + UNUSED(ret); +} +#endif /* CONFIG_PM */ + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/stm32l476vg-disco/src/stm32l476vg-disco.h b/configs/stm32l476vg-disco/src/stm32l476vg-disco.h new file mode 100644 index 0000000000000000000000000000000000000000..ba184d19e62cea894989db7e273c9a2baf6e4a39 --- /dev/null +++ b/configs/stm32l476vg-disco/src/stm32l476vg-disco.h @@ -0,0 +1,164 @@ +/************************************************************************************ + * configs/stm32l476vg-disco/src/stm32l476vg-disco.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Frank Bennett + * Gregory Nutt + * Sebastien Lorquet + * dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_STM32L476VG_DISCO_SRC_STM32L476VG_DISCO_H +#define __CONFIGS_STM32L476VG_DISCO_SRC_STM32L476VG_DISCO_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +/* LED. + * LD4: the red LED on PB2 + * LD5: the green LED on PE8 + * + * - When the I/O is HIGH value, the LED is on. + * - When the I/O is LOW, the LED is off. + */ + +#define GPIO_LED_RED \ + (GPIO_PORTB | GPIO_PIN2 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PUSHPULL | \ + GPIO_PULLUP | GPIO_SPEED_50MHz) + +#define GPIO_LED_GRN \ + (GPIO_PORTE | GPIO_PIN8 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PUSHPULL | \ + GPIO_PULLUP | GPIO_SPEED_50MHz) + +/* Buttons + * + * There is a 4 way d-pad 'joystick' with center button + * connected to PA0,1,5,2,3 + * C L D R U + */ + +#define MIN_IRQBUTTON BUTTON_CENTER +#define MAX_IRQBUTTON BUTTON_UP +#define NUM_IRQBUTTONS 5 + +#define GPIO_BTN_CENTER \ + (GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTA | GPIO_PIN0) +#define GPIO_BTN_LEFT \ + (GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTA | GPIO_PIN1) +#define GPIO_BTN_DOWN \ + (GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTA | GPIO_PIN5) +#define GPIO_BTN_RIGHT \ + (GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTA | GPIO_PIN2) +#define GPIO_BTN_UP \ + (GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTA | GPIO_PIN3) + +/* SPI1 off */ +/* XXX is this used on disco? */ + +#define GPIO_SPI1_MOSI_OFF (GPIO_INPUT | GPIO_PULLDOWN | \ + GPIO_PORTE | GPIO_PIN15) +#define GPIO_SPI1_MISO_OFF (GPIO_INPUT | GPIO_PULLDOWN | \ + GPIO_PORTE | GPIO_PIN14) +#define GPIO_SPI1_SCK_OFF (GPIO_INPUT | GPIO_PULLDOWN | \ + GPIO_PORTE | GPIO_PIN13) +#define GPIO_SPI1_NSS_OFF (GPIO_INPUT | GPIO_PULLDOWN | \ + GPIO_PORTE | GPIO_PIN12) + +/* Devices on the onboard I2C bus. + * + * Note that these are unshifted addresses. + */ + +/* XXX IS this 'unshifted'? */ + +#define NUCLEO_I2C_OBDEV_CS43L22 0x94 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/* Global driver instances */ + +#ifdef CONFIG_STM32_SPI1 +extern struct spi_dev_s *g_spi1; +#endif +#ifdef CONFIG_STM32_SPI2 +extern struct spi_dev_s *g_spi2; +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spiinitialize + * + * Description: + * Called to configure SPI chip select GPIO pins. + * + ************************************************************************************/ + +void stm32_spiinitialize(void); + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins. + * + ************************************************************************************/ + +void stm32_usbinitialize(void); + +/************************************************************************************ + * Name: board_adc_initialize + * + * Description: + * Initialize and register the ADC driver(s) + * + ************************************************************************************/ + +#ifdef CONFIG_ADC +int board_adc_initialize(void); +#endif + +#endif /* __CONFIGS_STM32L476VG_DISCO_SRC_STM32L476VG_DISCO_H */ diff --git a/configs/stm32ldiscovery/Kconfig b/configs/stm32ldiscovery/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..2d37b4e88db9311339e2de0c913660cb34069d2a --- /dev/null +++ b/configs/stm32ldiscovery/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_STM32FL_DISCOVERY +endif diff --git a/configs/stm32ldiscovery/README.txt b/configs/stm32ldiscovery/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..532fbe198cd43f5fe93c5db49ff5428bd41492be --- /dev/null +++ b/configs/stm32ldiscovery/README.txt @@ -0,0 +1,823 @@ +README +====== + + This README discusses issues unique to NuttX configurations for the + STMicro STM32L-Discovery development board. The STM32L-Discovery board + is based on the STM32L152RBT6 MCU (128KB FLASH and 16KB of SRAM). + + The STM32L-Discovery and 32L152CDISCOVERY kits are functionally + equivalent. The difference is the internal Flash memory size (STM32L152RBT6 + with 128 Kbytes or STM32L152RCT6 with 256 Kbytes). + + Both boards feature: + + - An ST-LINK/V2 embedded debug tool interface, + - LCD (24 segments, 4 commons), + - LEDs, + - Pushbuttons, + - A linear touch sensor, and + - Four touchkeys. + +Contents +======== + + - Status + - GPIO Pin Usage + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - LEDs + - Serial Console + - Debugging + - STM32L-Discovery-specific Configuration Options + - Configurations + +Status +====== + + The basic port is complete. A NuttShell (NSH) configuration exists for the + STM32L-Discovery board. A driver has been developed for the segment LCD on + board the STM32L-Discovery. In the NSH configuration discription below, + there is information about how the basic NSH extension can be extended to + use apps/examples/slcd to exercise the segment LCD. + + * The following subsystem have header files, drivers and have been + exercised: PWR, RCC, GPIO, SYSCFG, LCD, USART. + + * The following subsystenms have header files and ported drivers, but are + untested: DMA + + * The following subystems have counterparts with other STM32 parts, but + have not been ported or verified: ADC, DAC, TIM2-15, TIM9-11, RTC, + IWDG, WWDG, I2C, SPI, DBG. These may be close to functional depending + upon how close the IP is on the STM32L15X. + + This might include also USB, FSMC, and SDIO. + + * The following subsystems are unique to the STM32L and have not been + developed: COMP, TSIO, RI, OPAMP + + * The STM32L15X does support USB, however, USB is not available on the + STM32L-Discovery board. + + * These subystems are available on other STM32L15x/16x parts, but not on + the part used in the STM32L-Discovery board: CRC, AES, FSMC, SDIO + +GPIO Pin Usage +============== + + ----- --------------------- -------------------------------- ---------------- + GPIO ALTERNATE FUNCTION BOARD FUNCTION P1/P2 + ----- --------------------- -------------------------------- ---------------- + PA0 WKUP1/USART2_CTS/ Push button (PA0), WAKE UP (Iuu) P1, pin 15 + ADC_IN0/TIM2_CH1_ETR + /COMP1_INP + PA1 USART2_RTS/ADC_IN1/ LCD SEG0 P1, pin 16 + TIM2_CH2/LCD_SEG0/ + COMP1_INP + PA2 USART2_TX/ADC_IN2/ LCD SEG1 P1, pin 17 + TIM2_CH3/TIM9_CH1/ + LCD_SEG1/COMP1_INP + PA3 USART2_RX/ADC_IN3/ LCD SEG2 P1, pin 18 + TIM2_CH4/TIM9_CH2/ + LCD_SEG2/COMP1_INP + PA4 SPI1_NSS/USART2_CK/ Measurement (Iuu) P1, pin 19 + ADC_IN4/DAC_OUT1/ + COMP1_INP + PA5 SPI1_SCK/ADC_IN5/ --- P1, pin 20 + DAC_OUT2/ + TIM2_CH1_ETR/COMP1_ + INP + PA6 SPI1_MISO/ADC_IN6/ Linear Touch Sensor (PA6) --- + TIM3_CH1/TIM1_BKIN/ + LCD_SEG3/TIM10_CH1/ + COMP1_INP + PA7 SPI1_MOSI/ADC_IN7/ Linear Touch Sensor (PA7) --- + TIM3_CH2/TIM1_CH1N + /LCD_SEG4/TIM11_CH1/ + PA8 USART1_CK/MCO/ LCD glass COM0 P2, pin 23 + LCD_COM0 + PA9 USART1_TX/LCD_COM1 LCD glass COM1 P2, pin 22 + PA10 USART1_RX/LCD_COM2 LCD glass COM2 P2, pin 21 + PA11 USART1_CTS/USBDM/ --- P2, pin 20 + SPI1_MISO + PA12 USART1_RTS/USBDP/ --- P2, pin 19 + SPI1_MOSI + JTDI TIM2_CH1_ETR/PA15/ LCD_SEG12 P2, pin 16 + SPI1_NSS/LCD_SEG17 + ----- --------------------- -------------------------------- ---------------- + PB0 ADC_IN8/TIM3_CH3/ Linear Touch Sensor (PB0) --- + LCD_SEG5/COMP1_INP/ + VREF_OUT + PB1 ADC_IN9/TIM3_CH4/ Linear Touch Sensor (PB1) --- + LCD_SEG6/COMP1_INP/ + VREF_OUT + PB2/ --- --- P1, pin 21 + BOOT1 + JTDO TIM2_CH2/PB3/TRACES LCD_SEG3, SWO P2, pin 11 + WO/SPI1_SCK/COMP2_I + NM/LCD_SEG7 + JNTRST TIM3_CH1/PB4/SPI1_MIS SEG4 P2, pin 10 + O/COMP2_INP/LCD_SEG8 + PB5 I2C1_SMBAl/TIM3_CH2/ LCD SEG5 P2, pin 9 + SPI1_MOSI/COMP2_INP/ + LCD_SEG9 + PB6 I2C1_SCL/TIM4_CH1/ LED Blue P2, pin 8 + USART1_TX/LCD_SEG8 + PB7 I2C1_SDA/TIM4_CH2/ LED Green P2, pin 7 + USART1_RX/PVD_IN + PB8 TIM4_CH3/I2C1_SCL/ LCD SEG13 P2, pin 4 + LCD_SEG16/TIM10_CH1 + PB9 TIM4_CH4/I2C1_SDA/ LCD glass COM3 P2, pin 3 + LCD_COM3/TIM11_CH1 + PB10 I2C2_SCL/USART3_TX/ LCD SEG6 P1, pin 22 + TIM2_CH3/LCD_SEG10 + PB11 I2C2_SDA/USART3_RX/ LCD SEG7 P1, pin 23 + TIM2_CH4/LCD_SEG11 + PB12 SPI2_NSS/I2C2_SMBA/ LCD SEG8 P1, pin 24 + USART3_CK/LCD_SEG12 + 2/ADC_IN18/COMP1_INP + / TIM10_CH1 + PB13 SPI2_SCK/USART3_CTS/ LCD SEG9 P1, pin 25 + LCD_SEG13/ADC_IN19/ + COMP1_INP/TIM9_CH1 + PB14 SPI2_MISO/USART3_RT LCD SEG10 P1, pin 26 + S/LCD_SEG14/ADC_IN20 + / COMP1_INP/TIM9_CH2 + PB15 SPI2_MOSI/TIM1_CH3N/ LCD SEG11 P1, pin 27 + LCD_SEG15/ADC_IN21/ + COMP1_INP/TIM11_CH1/ + RTC_50_60Hz + ----- --------------------- -------------------------------- ---------------- + PC0 ADC_IN10/LCD_SEG18/ LCD SEG14 P1, pin 11 + COMP1_INP + PC1 ADC_IN11/LCD_SEG19/ LCD SEG15 P1, pin 12 + COMP1_INP + PC2 ADC_IN12/LCD_SEG20/ LCD SEG16 P1, pin 13 + COMP1_INP + PC3 ADC_IN13/LCD_SEG21/ LCD SEG17 P1, pin 14 + COMP1_INP + PC4 ADC_IN14/LCD_SEG22/ Linear Touch Sensor (PC4) --- + COMP1_INP + PC5 ADC_IN15/LCD_SEG23/ Linear Touch Sensor (PC5) --- + COMP1_INP + PC6 TIM3_CH1/LCD_SEG24 LCD SEG18 P2, pin 27 + PC7 TIM3_CH2/LCD_SEG25 LCD SEG19 P2, pin 26 + PC8 TIM3_CH3/LCD_SEG26 LCD SEG20 P2, pin 25 + PC9 TIM3_CH4/LCD_SEG27 LCD SEG21 P2, pin 24 + PC10 USART3_TX/LCD_SEG28 LCD SEG22 P2, pin 15 + /LCD_SEG40/LCD_COM4 + PC11 USART3_RX/LCD_SEG2 LCD SEG23 P2, pin 14 + 9/LCD_SEG41/ + LCD_COM5 + PC12 USART3_CK/LCD_SEG3 --- P2, pin 13 + 0/LCD_SEG42/ + LCD_COM6 + PC13 RTC_AF1/WKUP2 2 CNT_ IDD CNT_EN P1, pin 4 + EN 4 + PC14 OSC32_IN 3 OSC32_IN OSC32_IN P1, pin 5 + PC15 OSC32_OUT 4 OSC32_OUT OSC32_OUT P1, pin 6 + ----- --------------------- -------------------------------- ---------------- + PD2 TIM3_ETR/LCD_SEG31/ --- P2, pin 12 + LCD_SEG43/LCD_COM7 + ----- --------------------- -------------------------------- ---------------- + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, or + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the CodeSourcery toolchain for Windows. To use + the Atollic, devkitARM, Raisonance GNU, or NuttX buildroot toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh stm32ldiscovery/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +==== + + The STM32L-Discovery board has four LEDs. Two of these are controlled by + logic on the board and are not available for software control: + + LD1 COM: LD2 default status is red. LD2 turns to green to indicate + that communications are in progress between the PC and the + ST-LINK/V2. + LD2 PWR: Red LED indicates that the board is powered. + + And two LEDs can be controlled by software: + + User LD3: Green LED is a user LED connected to the I/O PB7 of the + STM32L152 MCU. + User LD4: Blue LED is a user LED connected to the I/O PB6 of the + STM32L152 MCU. + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/up_leds.c. The LEDs are used to encode OS-related + events as follows: + + SYMBOL Meaning LED state + LED3 LED4 + ------------------- ----------------------- -------- -------- + LED_STARTED NuttX has been started OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF + LED_IRQSENABLED Interrupts enabled OFF OFF + LED_STACKCREATED Idle stack created ON OFF + LED_INIRQ In an interrupt No change + LED_SIGNAL In a signal handler No change + LED_ASSERTION An assertion failed No change + LED_PANIC The system has crashed OFF Blinking + LED_IDLE STM32 is is sleep mode Not used + +Serial Console +============== + + The STM32L-Discovery has no on-board RS-232 driver. Further, there are no + USART pins that do not conflict with the on board resources, in particular, + the LCD: Most USART pins are available if the LCD is enabled; USART2 may + be used if either the LCD or the on-board LEDs are disabled. + + PA9 USART1_TX LCD glass COM1 P2, pin 22 + PA10 USART1_RX LCD glass COM2 P2, pin 21 + PB6 USART1_TX LED Blue P2, pin 8 + PB7 USART1_RX LED Green P2, pin 7 + + PA2 USART2_TX LCD SEG1 P1, pin 17 + PA3 USART2_RX LCD SEG2 P1, pin 18 + + PB10 USART3_TX LCD SEG6 P1, pin 22 + PB11 USART3_RX LCD SEG7 P1, pin 23 + PC10 USART3_TX LCD SEG22 P2, pin 15 + PC11 USART3_RX LCD SEG23 P2, pin 14 + + NOTES: + + - GND and (external) 5V are available on both P1 and P2. Note: These + signals may be at lower voltage levels and, hence, may not properly + drive an external RS-232 transceiver. + + - The crystal X3 is not installed on the STM32L3-Discovery. As a result, + the HSE clock is not available and the less accurate HSI must be used. + This may limit the accuracy of the computed baud, especially at higher + BAUD. The HSI is supposedly calibrated in the factory to within 1% at + room temperatures so perhaps this not a issue. + + - According to the STM32L-Discovery User Manual, the LCD should be removed + from its socket if you use any of the LCD pins for any other purpose. + + I have had no problems using the USART1 with PA9 and PA10 with a 3.3-5V + RS-232 transceiver module at 57600 baud. I have not tried higher baud + rates. + + - There is no support for a USB serial connector on the STM32L-Discovery + board. The STM32L152 does support USB, but the USB pins are "free I/O" + on the board and no USB connector is provided. So the use of a USB + console is not option. If you need console output, you will need to + disable either LCD (and use any USART) or the LEDs (and use USART1) + +Debugging +========= + + STM32 ST-LINK Utility + --------------------- + For simply writing to FLASH, I use the STM32 ST-LINK Utility. At least + version 2.4.0 is required (older versions do not recognize the STM32 F3 + device). This utility is available from free from the STMicro website. + + Debugging + --------- + If you are going to use a debugger, you should make sure that the following + settings are selection in your configuration file: + + CONFIG_DEBUG_SYMBOLS=y : Enable debug symbols in the build + CONFIG_ARMV7M_USEBASEPRI=y : Use the BASEPRI register to disable interrupts + + OpenOCD + ------- + I am told that OpenOCD will work with the ST-Link, but I have never tried + it. + + https://github.com/texane/stlink + -------------------------------- + This is an open source server for the ST-Link that I have never used. + + Atollic GDB Server + ------------------ + You can use the Atollic IDE, but I have never done that either. + +STM32L-Discovery-specific Configuration Options +=============================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32L152RB=y + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=stm32fldiscovery (for the STM32L-Discovery development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_STM32FLDISCOVERY=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=16384 (16Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP + + CONFIG_ARCH_FPU - The STM32L-Discovery does not support a floating point unit (FPU) + + CONFIG_ARCH_FPU=n + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibrate + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + AHB + ---- + (GPIOs are always enabled) + CONFIG_STM32_FLITF + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + + APB2 + ---- + CONFIG_STM32_SYSCFG + CONFIG_STM32_TIM9 + CONFIG_STM32_TIM10 + CONFIG_STM32_TIM11 + CONFIG_STM32_ADC1 + CONFIG_STM32_SPI1 + CONFIG_STM32_USART1 + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_LCD + CONFIG_STM32_WWDG + CONFIG_STM32_IWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI3 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_USB + CONFIG_STM32_PWR -- Required for RTC + CONFIG_STM32_DAC1 + CONFIG_STM32_COMP + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + JTAG Enable settings (by default only SW-DP is enabled): + + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + + STM32L-Discovery specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + STM32L-Discovery CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an + dump of all CAN registers. + + STM32L-Discovery SPI Configuration + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + +Configurations +============== + + Each STM32L-Discovery configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh STM32L-Discovery/ + cd - + . ./setenv.sh + + If this is a Windows native build, then configure.bat should be used + instead of configure.sh: + + configure.bat STM32L-Discovery\ + + Where is one of the following sub-directories. + + NOTE: These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + +Configuration sub-directories +----------------------------- + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. + + NOTES: + + 1. The serial console is on UART1 and NuttX LED support is enabled. + Therefore, you will need an external RS232 driver or TTL serial-to- + USB converter. The UART1 TX and RX pins should be available on + PA9 and PA10, respectively. + + The serial console is configured for 57600 8N1 by default. + + 2. Support for NSH built-in applications is *not* enabled. + + 3. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + Build Setup: + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + + System Type: + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + 4. To enable SLCD support: + + Board Selection: + CONFIG_ARCH_LEDS=n : Disable board LED support + + Library Routines: + CONFIG_LIB_SLCDCODEC=y : Enable the SLCD CODEC + + System Type -> STM32 Peripheral Support: + CONFIG_STM32_LCD=y : Enable the Segment LCD + + When the LCD is enabled and the LEDs are disabled, the USART1 + serial console will automatically move to PB6 and PB7 (you will get + a compilation error if you forget to disable the LEDs). + + SIGNAL FUNCTION LED CONNECTION + ------ ---------- ---------- ----------- + PB6 USART1_TX LED Blue P2, pin 8 + PB7 USART1_RX LED Green P2, pin 7 + + To enable apps/examples/slcd to test the SLCD: + + Binary Formats: + CONFIG_BINFMT_DISABLE=n : Don't disable binary support + CONFIG_BUILTIN=y : Enable support for built-in binaries + + Application Configuration -> NSH Library: + CONFIG_NSH_BUILTIN_APPS=y : Enable builtin apps in NSH + CONFIG_NSH_ARCHINIT=y : Needed to initialize the SLCD + + Application Configuration -> Examples: + CONFIG_EXAMPLES_SLCD=y : Enable apps/examples/slcd + + To enable LCD debug output: + + Device Drivers: + CONFIG_LCD=y : (Needed to enable LCD debug) + + Build Setup -> Debug Options: + CONFIG_DEBUG=y : Enable debug features + CONFIG_DEBUG_VERBOSE=y : Enable LCD debug + + NOTE: At this point in time, testing of the SLCD is very limited because + there is not much in apps/examples/slcd. Certainly there are more bugs + to be found. There are also many segment-encoded glyphs in stm32_lcd.c + But there is a basically functional driver with a working test setup + that can be extended if you want a fully functional SLCD driver. diff --git a/configs/stm32ldiscovery/include/board.h b/configs/stm32ldiscovery/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..acb33b45ec8c8cd893716bb6dcb40a325837f38b --- /dev/null +++ b/configs/stm32ldiscovery/include/board.h @@ -0,0 +1,328 @@ +/************************************************************************************ + * configs/stm32ldiscovery/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIG_STM32LDISCOVERY_INCLUDE_BOARD_H +#define __CONFIG_STM32LDISCOVERY_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +#include "stm32_rcc.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* Four different clock sources can be used to drive the system clock (SYSCLK): + * + * - HSI high-speed internal oscillator clock + * Generated from an internal 16 MHz RC oscillator + * - HSE high-speed external oscillator clock + * Normally driven by an external crystal (X3). However, this crystal is not fitted + * on the STM32L-Discovery board. + * - PLL clock + * - MSI multispeed internal oscillator clock + * The MSI clock signal is generated from an internal RC oscillator. Seven frequency + * ranges are available: 65.536 kHz, 131.072 kHz, 262.144 kHz, 524.288 kHz, 1.048 MHz, + * 2.097 MHz (default value) and 4.194 MHz. + * + * The devices have the following two secondary clock sources + * - LSI low-speed internal RC clock + * Drives the watchdog and RTC. Approximately 37KHz + * - LSE low-speed external oscillator clock + * Driven by 32.768KHz crystal (X2) on the OSC32_IN and OSC32_OUT pins. + */ + +#define STM32_BOARD_XTAL 8000000ul /* X3 on board (not fitted)*/ + +#define STM32_HSI_FREQUENCY 16000000ul /* Approximately 16MHz */ +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_MSI_FREQUENCY 2097000 /* Default is approximately 2.097Mhz */ +#define STM32_LSI_FREQUENCY 37000 /* Approximately 37KHz */ +#define STM32_LSE_FREQUENCY 32768 /* X2 on board */ + +/* PLL Configuration + * + * - PLL source is HSI -> 16MHz input (nominal) + * - PLL multipler is 6 -> 96MHz PLL VCO clock output (for USB) + * - PLL output divider 3 -> 32MHz divided down PLL VCO clock output + * + * Resulting SYSCLK frequency is 16MHz x 6 / 3 = 32MHz + * + * USB/SDIO: + * If the USB or SDIO interface is used in the application, the PLL VCO + * clock (defined by STM32_CFGR_PLLMUL) must be programmed to output a 96 + * MHz frequency. This is required to provide a 48 MHz clock to the USB or + * SDIO (SDIOCLK or USBCLK = PLLVCO/2). + * SYSCLK + * The system clock is derived from the PLL VCO divided by the output division factor. + * Limitations: + * 96 MHz as PLLVCO when the product is in range 1 (1.8V), + * 48 MHz as PLLVCO when the product is in range 2 (1.5V), + * 24 MHz when the product is in range 3 (1.2V). + * Output division to avoid exceeding 32 MHz as SYSCLK. + * The minimum input clock frequency for PLL is 2 MHz (when using HSE as PLL source). + */ + +#define STM32_CFGR_PLLSRC 0 /* Source is 16MHz HSI */ +#ifdef CONFIG_STM32_USB +# define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx6 /* PLLMUL = 6 */ +# define STM32_CFGR_PLLDIV RCC_CFGR_PLLDIV_3 /* PLLDIV = 3 */ +# define STM32_PLL_FREQUENCY (6*STM32_HSI_FREQUENCY) /* PLL VCO Frequency is 96MHz */ +#else +# define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx4 /* PLLMUL = 4 */ +# define STM32_CFGR_PLLDIV RCC_CFGR_PLLDIV_2 /* PLLDIV = 2 */ +# define STM32_PLL_FREQUENCY (4*STM32_HSI_FREQUENCY) /* PLL VCO Frequency is 64MHz */ +#endif + +/* Use the PLL and set the SYSCLK source to be the divided down PLL VCO output + * frequency (STM32_PLL_FREQUENCY divided by the PLLDIV value). + */ + +#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL /* Use the PLL as the SYSCLK */ +#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL +#ifdef CONFIG_STM32_USB +# define STM32_SYSCLK_FREQUENCY (STM32_PLL_FREQUENCY/3) /* SYSCLK frequence is 96MHz/PLLDIV = 32MHz */ +#else +# define STM32_SYSCLK_FREQUENCY (STM32_PLL_FREQUENCY/2) /* SYSCLK frequence is 64MHz/PLLDIV = 32MHz */ +#endif + +/* AHB clock (HCLK) is SYSCLK (32MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (32MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB2 timers 9, 10, and 11 will receive PCLK2. */ + +#define STM32_APB2_TIM9_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK (32MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY) + +/* APB1 timers 2-7 will receive PCLK1 */ + +#define STM32_APB1_TIM2_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* LED definitions ******************************************************************/ +/* The STM32L-Discovery board has four LEDs. Two of these are controlled by + * logic on the board and are not available for software control: + * + * LD1 COM: LD2 default status is red. LD2 turns to green to indicate that + * communications are in progress between the PC and the ST-LINK/V2. + * LD2 PWR: Red LED indicates that the board is powered. + * + * And two LEDs can be controlled by software: + * + * User LD3: Green LED is a user LED connected to the I/O PB7 of the STM32L152 + * MCU. + * User LD4: Blue LED is a user LED connected to the I/O PB6 of the STM32L152 + * MCU. + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any + * way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 /* User LD3 */ +#define BOARD_LED2 1 /* User LD4 */ +#define BOARD_NLEDS 2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 8 LEDs on board the + * STM32L-Discovery. The following definitions describe how NuttX controls the LEDs: + * + * SYMBOL Meaning LED state + * LED1 LED2 + * ------------------- ----------------------- -------- -------- + * LED_STARTED NuttX has been started OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF + * LED_IRQSENABLED Interrupts enabled OFF OFF + * LED_STACKCREATED Idle stack created ON OFF + * LED_INIRQ In an interrupt No change + * LED_SIGNAL In a signal handler No change + * LED_ASSERTION An assertion failed No change + * LED_PANIC The system has crashed OFF Blinking + * LED_IDLE STM32 is is sleep mode Not used + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 0 +#define LED_IRQSENABLED 0 +#define LED_STACKCREATED 1 +#define LED_INIRQ 2 +#define LED_SIGNAL 2 +#define LED_ASSERTION 2 +#define LED_PANIC 3 + +/* Button definitions ***************************************************************/ +/* The STM32L-Discovery supports two buttons; only one button is controllable by + * software: + * + * B1 USER: user and wake-up button connected to the I/O PA0 of the STM32L152RBT6. + * B2 RESET: pushbutton connected to NRST is used to RESET the STM32L152RBT6. + */ + +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 + +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* Alternate Pin Functions **********************************************************/ +/* The STM32L-Discovery has no on-board RS-232 driver. Further, there are no USART + * pins that do not conflict with the on board resources, in particular, the LCD: + * Most USART pins are available if the LCD is enabled; USART2 may be used if either + * the LCD or the on-board LEDs are disabled. + * + * PA9 USART1_TX LCD glass COM1 P2, pin 22 + * PA10 USART1_RX LCD glass COM2 P2, pin 21 + * PB6 USART1_TX LED Blue P2, pin 8 + * PB7 USART1_RX LED Green P2, pin 7 + * + * PA2 USART2_TX LCD SEG1 P1, pin 17 + * PA3 USART2_RX LCD SEG2 P1, pin 18 + * + * PB10 USART3_TX LCD SEG6 P1, pin 22 + * PB11 USART3_RX LCD SEG7 P1, pin 23 + * PC10 USART3_TX LCD SEG22 P2, pin 15 + * PC11 USART3_RX LCD SEG23 P2, pin 14 + */ + +#if !defined(CONFIG_STM32_LCD) +/* Select PA9 and PA10 if the LCD is not enabled */ + +# define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */ +# define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */ + +/* This there are no other options for USART1 on this part */ + +# define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */ +# define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */ + +/* Arbirtrarily select PB10 and PB11 */ + +# define GPIO_USART3_RX GPIO_USART3_RX_1 /* PB11 */ +# define GPIO_USART3_TX GPIO_USART3_TX_1 /* PB10 */ + +#elif !defined(CONFIG_ARCH_LEDS) + +/* Select PB6 and PB7 if the LEDs are not enabled */ + +# define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */ +# define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */ + +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +/**************************************************************************** + * Name: stm32_slcd_initialize + * + * Description: + * Initialize the STM32L-Discovery LCD hardware and register the character + * driver as /dev/slcd. + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_LCD +int stm32_slcd_initialize(void); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIG_STM32LDISCOVERY_INCLUDE_BOARD_H */ diff --git a/configs/stm32ldiscovery/nsh/Make.defs b/configs/stm32ldiscovery/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..fc936f8f9da0a439c6a0a65be5c64e0ba3c489fa --- /dev/null +++ b/configs/stm32ldiscovery/nsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32l1discovery/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32ldiscovery/nsh/defconfig b/configs/stm32ldiscovery/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..68f9a4cb725cf03b6f9aa0a9767d15a8c53c97cb --- /dev/null +++ b/configs/stm32ldiscovery/nsh/defconfig @@ -0,0 +1,1056 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +CONFIG_ARCH_CHIP_STM32L152RB=y +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +CONFIG_STM32_STM32L15XX=y +CONFIG_STM32_ENERGYLITE=y +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +# CONFIG_STM32_HAVE_UART4 is not set +# CONFIG_STM32_HAVE_UART5 is not set +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +# CONFIG_STM32_HAVE_TIM1 is not set +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +# CONFIG_STM32_HAVE_TIM5 is not set +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +# CONFIG_STM32_HAVE_TIM8 is not set +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +# CONFIG_STM32_HAVE_CAN1 is not set +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_COMP is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_LCD is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +CONFIG_STM32_HAVE_RTC_SUBSECONDS=y + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=2796 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=16384 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32L_DISCOVERY=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32ldiscovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=5 +CONFIG_START_DAY=19 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=6 +CONFIG_NFILE_STREAMS=6 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1536 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=64 +CONFIG_USART1_TXBUFSIZE=64 +CONFIG_USART1_BAUD=57600 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +CONFIG_BINFMT_DISABLE=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_DISABLE_SEMICOLON=y +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +CONFIG_NSH_DISABLE_CD=y +CONFIG_NSH_DISABLE_CP=y +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +CONFIG_NSH_DISABLE_MKDIR=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +CONFIG_NSH_DISABLE_MOUNT=y +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +CONFIG_NSH_DISABLE_RM=y +CONFIG_NSH_DISABLE_RMDIR=y +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_UMOUNT=y +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=64 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32ldiscovery/nsh/setenv.sh b/configs/stm32ldiscovery/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..523dbd4455402e2cecc1f78b10520d067f227a9e --- /dev/null +++ b/configs/stm32ldiscovery/nsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/stm32l1discovery/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32ldiscovery/scripts/gnu-elf.ld b/configs/stm32ldiscovery/scripts/gnu-elf.ld new file mode 100644 index 0000000000000000000000000000000000000000..54e483a12aa5a96ddfdcfbe719e399e6e87a05a4 --- /dev/null +++ b/configs/stm32ldiscovery/scripts/gnu-elf.ld @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/stm32f3discovery/scripts/gnu-elf.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +SECTIONS +{ + .text 0x00000000 : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + *(.ctors) /* Old ABI: Unallocated */ + *(.init_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .dtors : + { + _sdtors = . ; + *(.dtors) /* Old ABI: Unallocated */ + *(.fini_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + _ebss = . ; + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32ldiscovery/scripts/ld.script b/configs/stm32ldiscovery/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..80d6fe42da16d10ee29cc4146b513e5332f413a2 --- /dev/null +++ b/configs/stm32ldiscovery/scripts/ld.script @@ -0,0 +1,117 @@ +/**************************************************************************** + * configs/stm32fldiscovery/scripts/ld.script + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32L152RBT6 has 128KB of FLASH beginning at address 0x0800:0000 and + * 16Kb of SRAM at address 0x20000000. + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 16K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32ldiscovery/src/.gitignore b/configs/stm32ldiscovery/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/stm32ldiscovery/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/stm32ldiscovery/src/Makefile b/configs/stm32ldiscovery/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..7e17afc3d6bb74bc0edf0175ab97ff6f3d363028 --- /dev/null +++ b/configs/stm32ldiscovery/src/Makefile @@ -0,0 +1,71 @@ +############################################################################ +# configs/stm32ldiscovery/src/Makefile +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_STM32_LCD),y) +CSRCS += stm32_lcd.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += stm32_pwm.c +endif + +ifeq ($(CONFIG_QENCODER),y) +CSRCS += stm32_qencoder.c +endif + +ifeq ($(CONFIG_WATCHDOG),y) +CSRCS += stm32_watchdog.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32ldiscovery/src/stm32_appinit.c b/configs/stm32ldiscovery/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..6141247b0e8a60d5d209910aba6e41e47217eb73 --- /dev/null +++ b/configs/stm32ldiscovery/src/stm32_appinit.c @@ -0,0 +1,75 @@ +/**************************************************************************** + * config/stm32ldiscovery/src/stm32_appinit.c + * arch/arm/src/board/stm32_appinit.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "stm32ldiscovery.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef CONFIG_STM32_LCD + /* Initialize the SLCD and register the SLCD device as /dev/slcd */ + + return stm32_slcd_initialize(); +#else + return OK; +#endif +} diff --git a/configs/stm32ldiscovery/src/stm32_autoleds.c b/configs/stm32ldiscovery/src/stm32_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..073391b938be01fc0c05b61a8de145a74ceca16b --- /dev/null +++ b/configs/stm32ldiscovery/src/stm32_autoleds.c @@ -0,0 +1,156 @@ +/**************************************************************************** + * configs/stm32ldiscovery/src/stm32_autoleds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "stm32.h" +#include "stm32ldiscovery.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 2 LEDs on + * board the STM32L-Discovery. The following definitions describe how NuttX + * controls the LEDs: + * + * SYMBOL Meaning LED state + * LED1 LED2 + * ------------------- ----------------------- -------- -------- + * LED_STARTED NuttX has been started OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF + * LED_IRQSENABLED Interrupts enabled OFF OFF + * LED_STACKCREATED Idle stack created ON OFF + * LED_INIRQ In an interrupt No change + * LED_SIGNAL In a signal handler No change + * LED_ASSERTION An assertion failed No change + * LED_PANIC The system has crashed OFF Blinking + * LED_IDLE STM32 is is sleep mode Not used + */ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED1-2 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool led1on = false; + bool led2on = false; + + switch (led) + { + case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED */ + break; + + case 1: /* LED_STACKCREATED */ + led1on = true; + break; + + default: + case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ + return; + + case 3: /* LED_PANIC */ + led2on = true; + break; + } + + stm32_gpiowrite(GPIO_LED1, led1on); + stm32_gpiowrite(GPIO_LED2, led2on); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led != 2) + { + stm32_gpiowrite(GPIO_LED1, false); + stm32_gpiowrite(GPIO_LED2, false); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/stm32ldiscovery/src/stm32_boot.c b/configs/stm32ldiscovery/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..375d9de3297a2726976a9a99f70057891d3ea43b --- /dev/null +++ b/configs/stm32ldiscovery/src/stm32_boot.c @@ -0,0 +1,90 @@ +/************************************************************************************ + * configs/stm32ldiscovery/src/up_boot.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "stm32ldiscovery.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/stm32ldiscovery/src/stm32_buttons.c b/configs/stm32ldiscovery/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..5427ac751b116eac504de5cbb62476f3efcd8940 --- /dev/null +++ b/configs/stm32ldiscovery/src/stm32_buttons.c @@ -0,0 +1,169 @@ +/**************************************************************************** + * configs/stm32ldiscovery/src/board_buttons.c + * + * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "stm32ldiscovery.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* Pin configuration for each STM32F3Discovery button. This array is indexed by + * the BUTTON_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_USER +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed. + */ + + bool released = stm32_gpioread(g_buttons[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/stm32ldiscovery/src/stm32_lcd.c b/configs/stm32ldiscovery/src/stm32_lcd.c new file mode 100644 index 0000000000000000000000000000000000000000..3c249a76d91e4eb9356a8bf8fd05c09179b24ebf --- /dev/null +++ b/configs/stm32ldiscovery/src/stm32_lcd.c @@ -0,0 +1,1606 @@ +/**************************************************************************** + * configs/stm32ldiscovery/src/stm32_lcd.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * References: + * - Based on the NuttX LCD1602 driver. + * - "STM32L100xx, STM32L151xx, STM32L152xx and STM32L162xx advanced ARM-based + * 32-bit MCUs", STMicroelectronics, RM0038 + * - "STM32L1 discovery kits: STM32L-DISCOVERY and 32L152CDISCOVERY," + * STMicroelectronics, UM1079 + * - STM32L-Discovery Firmware Pack V1.0.2 (for character encoding) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include "stm32_gpio.h" +#include "stm32_rcc.h" +#include "chip/stm32_lcd.h" + +#include "stm32ldiscovery.h" + +#ifdef CONFIG_STM32_LCD + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug + * must also be enabled. + */ + +#ifndef CONFIG_LIB_SLCDCODEC +# error "This SLCD driver requires CONFIG_LIB_SLCDCODEC" +#endif + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* The ever-present MIN/MAX macros ******************************************/ + +#ifndef MIN +# define MIN(a,b) (a < b ? a : b) +#endif + +#ifndef MAX +# define MAX(a,b) (a > b ? a : b) +#endif + +/* LCD **********************************************************************/ +/* LCD. The STM32L152RBT6 supports either a 4x32 or 8x28. The STM32L- + * Discovery has an LCD 24 segments, 4 commons. See stm32ldiscovery.h for + * the pin mapping. + */ + +/* Macro to convert an LCD register offset and bit number into a bit-band + * address: + */ + +#define SLCD_OFFSET (STM32_LCD_BASE - STM32_PERIPH_BASE) +#define SLCD_BBADDR(o,b) (STM32_PERIPHBB_BASE + ((SLCD_OFFSET + (o)) << 5) + ((b) << 2)) + +/* Some useful bit-band addresses */ + +#define SLCD_CR_LCDEN_BB SLCD_BBADDR(STM32_LCD_CR_OFFSET,0) +#define SLCD_SR_UDR_BB SLCD_BBADDR(STM32_LCD_SR_OFFSET,2) + +/* LCD characteristics */ + +#define SLCD_NROWS 1 +#define SLCD_NCHARS 6 +#define SLCD_MAXCONTRAST 7 + +/* An ASCII character may need to be decorated with a colon or decimal point */ + +#define SLCD_DP 0x01 +#define SLCD_COLON 0x02 +#define SLCD_NBARS 4 + +/* Macros used for set/reset the LCD bar */ + +#define SLCD_BAR0_ON g_slcdstate.bar[1] |= 8 +#define SLCD_BAR0_OFF g_slcdstate.bar[1] &= ~8 +#define SLCD_BAR1_ON g_slcdstate.bar[0] |= 8 +#define SLCD_BAR1_OFF g_slcdstate.bar[0] &= ~8 +#define SLCD_BAR2_ON g_slcdstate.bar[1] |= 2 +#define SLCD_BAR2_OFF g_slcdstate.bar[1] &= ~2 +#define SLCD_BAR3_ON g_slcdstate.bar[0] |= 2 +#define SLCD_BAR3_OFF g_slcdstate.bar[0] &= ~2 + +/* These definitions support the logic of slcd_writemem() + * + * ---------- ----- ----- ----- ----- ------- ------ ------ ------ ------ ------- ------- ----------------------------- + * LCD SIGNAL COM3 COM2 COM1 COM0 RAM BIT CHAR 1 CHAR 2 CHAR 3 CHAR 4 CHAR 5 CHAR 6 MASKS + * 3210 3210 3210 3210 32 10 32 10 + * ---------- ----- ----- ----- ----- ------- ------ ------ ------ ------ -- --- -- --- ----------------------------- + * LCD SEG0 1N 1P 1D 1E Bit 0 1 0 0 0 0 0 0 0 CHAR 1: 0xcffffffc + * LCD SEG1 1DP 1COL 1C 1M Bit 1 1 0 0 0 0 0 0 0 CHAR 1: 0xcffffffc + * LCD SEG2 2N 2P 2D 2E Bit 2 0 1 0 0 0 0 0 0 CHAR 2: 0xf3ffff7b + * LCD SEG3 2DP 2COL 2C 2M Bit 7 0 1 0 0 0 0 0 0 CHAR 2: 0xf3ffff7b + * LCD SEG4 3N 3P 3D 3E Bit 8 0 0 1 0 0 0 0 0 CHAR 3: 0xfcfffcff + * LCD SEG5 3DP 3COL 3C 3M Bit 9 0 0 1 0 0 0 0 0 CHAR 3: 0xfcfffcff + * LCD SEG6 4N 4P 4D 4E Bit 10 0 0 0 1 0 0 0 0 CHAR 4: 0xffcff3ff + * LCD SEG7 4DP 4COL 4C 4M Bit 11 0 0 0 1 0 0 0 0 CHAR 4: 0xffcff3ff + * LCD SEG8 5N 5P 5D 5E Bit 12 0 0 0 0 1 1 0 0 CHAR 5: 0xfff3cfff/0xfff3efff + * LCD SEG9 BAR2 BAR3 5C 5M Bit 13 0 0 0 0 0 1 0 0 CHAR 5: 0xfff3cfff/0xfff3efff + * LCD SEG10 6N 6P 6D 6E Bit 14 0 0 0 0 0 0 1 1 CHAR 6: 0xfffc3fff/0xfffcbfff + * LCD SEG11 BAR0 BAR1 6C 6M Bit 15 0 0 0 0 0 0 0 1 CHAR 6: 0xfffc3fff/0xfffcbfff + * LCD SEG12 6J 6K 6A 6B Bit 16 0 0 0 0 0 0 1 1 CHAR 6: 0xfffc3fff/0xfffcbfff + * LCD SEG13 6H 6Q 6F 6G Bit 17 0 0 0 0 0 0 1 1 CHAR 6: 0xfffc3fff/0xfffcbfff + * LCD SEG14 5J 5K 5A 5B Bit 18 0 0 0 0 1 1 0 0 CHAR 5: 0xfff3cfff/0xfff3efff + * LCD SEG15 5H 5Q 5F 5G Bit 19 0 0 0 0 1 1 0 0 CHAR 5: 0xfff3cfff/0xfff3efff + * LCD SEG16 4J 4K 4A 4B Bit 20 0 0 0 1 0 0 0 0 CHAR 4: 0xffcff3ff + * LCD SEG17 4H 4Q 4F 4G Bit 21 0 0 0 1 0 0 0 0 CHAR 4: 0xffcff3ff + * LCD SEG18 3J 3K 3A 3B Bit 24 0 0 1 0 0 0 0 0 CHAR 3: 0xfcfffcff + * LCD SEG19 3H 3Q 3F 3G Bit 25 0 0 1 0 0 0 0 0 CHAR 3: 0xfcfffcff + * LCD SEG20 2J 2K 2A 2B Bit 26 0 1 0 0 0 0 0 0 CHAR 2: 0xf3ffff7b + * LCD SEG21 2H 2Q 2F 2G Bit 27 0 1 0 0 0 0 0 0 CHAR 2: 0xf3ffff7b + * LCD SEG22 1J 1K 1A 1B Bit 28 1 0 0 0 0 0 0 0 CHAR 1: 0xcffffffc + * LCD SEG23 1H 1Q 1F 1G Bit 29 1 0 0 0 0 0 0 0 CHAR 1: 0xcffffffc + * ---------- ----- ----- ----- ----- ------- ------ ------ ------ ------ ------- ------- ----------------------------- + */ + +/* SLCD_CHAR1_MASK COM0-3 0xcffffffc ..11 .... .... .... .... .... .... ..11 */ + +#define SLCD_CHAR1_MASK0 0xcffffffc +#define SLCD_CHAR1_MASK1 SLCD_CHAR1_MASK0 +#define SLCD_CHAR1_MASK2 SLCD_CHAR1_MASK0 +#define SLCD_CHAR1_MASK3 SLCD_CHAR1_MASK0 +#define SLCD_CHAR1_UPDATE0(s) (((uint32_t)(s) & 0x0c) << 26) | \ + ((uint32_t)(s) & 0x03) +#define SLCD_CHAR1_UPDATE1(s) SLCD_CHAR1_UPDATE0(s) +#define SLCD_CHAR1_UPDATE2(s) SLCD_CHAR1_UPDATE0(s) +#define SLCD_CHAR1_UPDATE3(s) SLCD_CHAR1_UPDATE0(s) + +/* SLCD_CHAR2_MASK COM0-3 0xf3ffff03 .... 22.. .... .... .... .... 2... .2.. */ + +#define SLCD_CHAR2_MASK0 0xf3ffff7b +#define SLCD_CHAR2_MASK1 SLCD_CHAR2_MASK0 +#define SLCD_CHAR2_MASK2 SLCD_CHAR2_MASK0 +#define SLCD_CHAR2_MASK3 SLCD_CHAR2_MASK0 +#define SLCD_CHAR2_UPDATE0(s) (((uint32_t)(s) & 0x0c) << 24) | \ + (((uint32_t)(s) & 0x02) << 6) | \ + (((uint32_t)(s) & 0x01) << 2) +#define SLCD_CHAR2_UPDATE1(s) SLCD_CHAR2_UPDATE0(s) +#define SLCD_CHAR2_UPDATE2(s) SLCD_CHAR2_UPDATE0(s) +#define SLCD_CHAR2_UPDATE3(s) SLCD_CHAR2_UPDATE0(s) + +/* SLCD_CHAR3_MASK COM0-3 0xfcfffcff .... ..33 .... .... .... ..33 .... .... */ + +#define SLCD_CHAR3_MASK0 0xfcfffcff +#define SLCD_CHAR3_MASK1 SLCD_CHAR3_MASK0 +#define SLCD_CHAR3_MASK2 SLCD_CHAR3_MASK0 +#define SLCD_CHAR3_MASK3 SLCD_CHAR3_MASK0 +#define SLCD_CHAR3_UPDATE0(s) (((uint32_t)(s) & 0x0c) << 22) | \ + (((uint32_t)(s) & 0x03) << 8) +#define SLCD_CHAR3_UPDATE1(s) SLCD_CHAR3_UPDATE0(s) +#define SLCD_CHAR3_UPDATE2(s) SLCD_CHAR3_UPDATE0(s) +#define SLCD_CHAR3_UPDATE3(s) SLCD_CHAR3_UPDATE0(s) + +/* SLCD_CHAR4_MASK COM0-3 0xffcff3ff .... .... ..44 .... .... 44.. .... .... */ + +#define SLCD_CHAR4_MASK0 0xffcff3ff +#define SLCD_CHAR4_MASK1 SLCD_CHAR4_MASK0 +#define SLCD_CHAR4_MASK2 SLCD_CHAR4_MASK0 +#define SLCD_CHAR4_MASK3 SLCD_CHAR4_MASK0 +#define SLCD_CHAR4_UPDATE0(s) (((uint32_t)(s) & 0x0c) << 18) | \ + (((uint32_t)(s) & 0x03) << 10) +#define SLCD_CHAR4_UPDATE1(s) SLCD_CHAR4_UPDATE0(s) +#define SLCD_CHAR4_UPDATE2(s) SLCD_CHAR4_UPDATE0(s) +#define SLCD_CHAR4_UPDATE3(s) SLCD_CHAR4_UPDATE0(s) + +/* SLCD_CHAR5_MASK COM0-1 0xfff3cfff .... .... .... 55.. ..55 .... .... .... + * COM2-3 0xfff3efff .... .... .... 55.. ...5 .... .... .... + */ + +#define SLCD_CHAR5_MASK0 0xfff3cfff +#define SLCD_CHAR5_MASK1 SLCD_CHAR5_MASK0 +#define SLCD_CHAR5_MASK2 0xfff3efff +#define SLCD_CHAR5_MASK3 SLCD_CHAR5_MASK2 +#define SLCD_CHAR5_UPDATE0(s) (((uint32_t)(s) & 0x0c) << 16) | \ + (((uint32_t)(s) & 0x03) << 12) +#define SLCD_CHAR5_UPDATE1(s) SLCD_CHAR5_UPDATE0(s) +#define SLCD_CHAR5_UPDATE2(s) (((uint32_t)(s) & 0x0c) << 16) | \ + (((uint32_t)(s) & 0x01) << 12) +#define SLCD_CHAR5_UPDATE3(s) SLCD_CHAR5_UPDATE2(s) + +/* SLCD_CHAR6_MASK COM0-1 0xfffc3fff .... .... .... ..66 66.. .... .... .... + * COM2-3 0xfffc3fff .... .... .... ..66 .6.. .... .... .... + */ + +#define SLCD_CHAR6_MASK0 0xfffc3fff +#define SLCD_CHAR6_MASK1 SLCD_CHAR6_MASK0 +#define SLCD_CHAR6_MASK2 0xfffcbfff +#define SLCD_CHAR6_MASK3 SLCD_CHAR6_MASK2 +#define SLCD_CHAR6_UPDATE0(s) (((uint32_t)(s) & 0x04) << 15) | \ + (((uint32_t)(s) & 0x08) << 13) | \ + (((uint32_t)(s) & 0x03) << 14) +#define SLCD_CHAR6_UPDATE1(s) SLCD_CHAR6_UPDATE0(s) +#define SLCD_CHAR6_UPDATE2(s) (((uint32_t)(s) & 0x04) << 15) | \ + (((uint32_t)(s) & 0x08) << 13) | \ + (((uint32_t)(s) & 0x03) << 14) +#define SLCD_CHAR6_UPDATE3(s) SLCD_CHAR6_UPDATE2(s) + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Private Type Definition + ****************************************************************************/ + +/* SLCD incoming stream structure */ + +struct slcd_instream_s +{ + struct lib_instream_s stream; + FAR const char *buffer; + ssize_t nbytes; +}; + +/* Global SLCD state */ + +struct stm32_slcdstate_s +{ + bool initialized; /* True: Completed initialization sequence */ + uint8_t curpos; /* The current cursor position */ + uint8_t buffer[SLCD_NCHARS]; /* SLCD ASCII content */ + uint8_t options[SLCD_NCHARS]; /* With colon or decimal point decoration */ + uint8_t bar[2]; /* Controls the bars on the far right of the SLCD */ +}; + +/**************************************************************************** + * Private Function Protototypes + ****************************************************************************/ +/* Debug */ + +#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE) +static void slcd_dumpstate(FAR const char *msg); +static void slcd_dumpslcd(FAR const char *msg); +#else +# define slcd_dumpstate(msg) +# define slcd_dumpslcd(msg) +#endif + +/* Internal utilities */ + +static void slcd_clear(void); +static int slcd_getstream(FAR struct lib_instream_s *instream); +static uint8_t slcd_getcontrast(void); +static int slcd_setcontrast(uint8_t contrast); +static void slcd_writebar(void); +static inline uint16_t slcd_mapch(uint8_t ch); +static inline void slcd_writemem(uint16_t segset, int curpos); +static void slcd_writech(uint8_t ch, uint8_t curpos, uint8_t options); +static void slcd_appendch(uint8_t ch, uint8_t options); +static void slcd_action(enum slcdcode_e code, uint8_t count); + +/* Character driver methods */ + +static ssize_t slcd_read(FAR struct file *, FAR char *, size_t); +static ssize_t slcd_write(FAR struct file *, FAR const char *, size_t); +static int slcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg); +#ifndef CONFIG_DISABLE_POLL +static int slcd_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* This is the driver state structure (there is no retained state information) */ + +static const struct file_operations g_slcdops = +{ + 0, /* open */ + 0, /* close */ + slcd_read, /* read */ + slcd_write, /* write */ + 0, /* seek */ + slcd_ioctl /* ioctl */ +#ifndef CONFIG_DISABLE_POLL + , slcd_poll /* poll */ +#endif +}; + +/* LCD state data */ + +static struct stm32_slcdstate_s g_slcdstate; + +/* LCD Mapping + * + * A + * --------- _ + * |\ |J /| |_| COL + * F| H | K |B + * | \ | / | _ + * --G-- --M-+ |_| COL + * | /| \ | + * E| Q | N |C + * | / |P \| _ + * --------- |_| DP + * D + * + * LCD character 16-bit-encoding: + * { E , D , P , N, M , C , COL , DP, B , A , K , J, G , F , Q , H } + */ + +#warning "Encodings for all punctuation are incomplete" + +/* Space and ASCII punctuation: 0x20-0x2f */ + +static const uint16_t g_slcdpunct1[ASCII_0 - ASCII_SPACE] = +{ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* ! " # $ % & ' */ + 0x0000, 0x0000, 0xa0dd, 0x0000, 0x0000, 0xa000, 0x0000, 0x00c0 /* () * + , - . / */ +}; + +/* ASCII numerals 0-9: 0x30-0x39 */ + +static const uint16_t g_slcdnummap[ASCII_COLON - ASCII_0] = +{ + 0x5f00, 0x4200, 0xf500, 0x6700, 0xea00, 0xaf00, 0xbf00, 0x4600, /* 0-7 */ + 0xff00, 0xef00 /* 8-9 */ +}; + +/* ASCII punctuation: 0x3a-0x40 */ + +static const uint16_t g_slcdpunct2[ASCII_A - ASCII_COLON] = +{ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 /* : ; < = > ? @ */ +}; + +/* Upper case letters A-Z: 0x41-0x5a. Also lower case letters a-z: 0x61-0x7a */ + +static const uint16_t g_slcdalphamap[ASCII_LBRACKET - ASCII_A] = +{ + 0xfe00, 0x6714, 0x1d00, 0x4714, 0x9d00, 0x9c00, 0x3f00, 0xfa00, /* A-H */ + 0x0014, 0x5300, 0x9841, 0x1900, 0x5a48, 0x5a09, 0x5f00, 0xfc00, /* I-P */ + 0x5f01, 0xfc01, 0xaf00, 0x0414, 0x5b00, 0x18c0, 0x5a81, 0x00c9, /* Q-X */ + 0x0058, 0x05c0 /* y-Z */ +}; + +/* ASCII punctuation: 0x5b-0x60 */ + +static const uint16_t g_slcdpunct3[ASCII_a - ASCII_LBRACKET] = +{ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 /* [ \ ] ^ _ */ +}; + +/* ASCII punctuation: 0x7b-0x7e */ + +static const uint16_t g_slcdpunct4[ASCII_DEL - ASCII_LBRACE]= +{ + 0x0000, 0x0000, 0x0000, 0x0000 /* { | } ~ */ +}; + +/* All GPIOs that need to be configured for the STM32L-Discovery LCD */ + +static uint32_t g_slcdgpio[BOARD_SLCD_NGPIOS] = +{ + BOARD_SLCD_COM0, BOARD_SLCD_COM1, BOARD_SLCD_COM2, BOARD_SLCD_COM3, + + BOARD_SLCD_SEG0, BOARD_SLCD_SEG1, BOARD_SLCD_SEG2, BOARD_SLCD_SEG3, + BOARD_SLCD_SEG4, BOARD_SLCD_SEG5, BOARD_SLCD_SEG6, BOARD_SLCD_SEG7, + BOARD_SLCD_SEG8, BOARD_SLCD_SEG9, BOARD_SLCD_SEG10, BOARD_SLCD_SEG11, + BOARD_SLCD_SEG12, BOARD_SLCD_SEG13, BOARD_SLCD_SEG14, BOARD_SLCD_SEG15, + BOARD_SLCD_SEG16, BOARD_SLCD_SEG17, BOARD_SLCD_SEG18, BOARD_SLCD_SEG19, + BOARD_SLCD_SEG20, BOARD_SLCD_SEG21, BOARD_SLCD_SEG22, BOARD_SLCD_SEG23 +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: slcd_dumpstate + ****************************************************************************/ + +#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE) +static void slcd_dumpstate(FAR const char *msg) +{ + lcdvdbg("%s:\n", msg); + lcdvdbg(" curpos: %d\n", + g_slcdstate.curpos); + lcdvdbg(" Display: [%c%c%c%c%c%c]\n", + g_slcdstate.buffer[0], g_slcdstate.buffer[1], g_slcdstate.buffer[2], + g_slcdstate.buffer[3], g_slcdstate.buffer[4], g_slcdstate.buffer[5]); + lcdvdbg(" Options: [%d%d%d%d%d%d]\n", + g_slcdstate.options[0], g_slcdstate.options[1], g_slcdstate.options[2], + g_slcdstate.options[3], g_slcdstate.options[4], g_slcdstate.options[5]); + lcdvdbg(" Bar: %02x %02x\n", + g_slcdstate.bar[0], g_slcdstate.bar[1]); +} +#endif + +/**************************************************************************** + * Name: slcd_dumpslcd + ****************************************************************************/ + +#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE) +static void slcd_dumpslcd(FAR const char *msg) +{ + lcdvdbg("%s:\n", msg); + lcdvdbg(" CR: %08x FCR: %08x SR: %08x CLR: %08x\n", + getreg32(STM32_LCD_CR), getreg32(STM32_LCD_FCR), + getreg32(STM32_LCD_SR), getreg32(STM32_LCD_CLR)); + lcdvdbg(" RAM0L: %08x RAM1L: %08x RAM2L: %08x RAM3L: %08x\n", + getreg32(STM32_LCD_RAM0L), getreg32(STM32_LCD_RAM1L), + getreg32(STM32_LCD_RAM2L), getreg32(STM32_LCD_RAM3L)); +} +#endif + +/**************************************************************************** + * Name: slcd_clear + ****************************************************************************/ + +static void slcd_clear(void) +{ + uint32_t regaddr; + + lvdbg("Clearing\n"); + + /* Make sure that any previous transfer is complete. The firmware sets + * the UDR each it modifies the LCD_RAM. The UDR bit stays set until the + * end of the update. During this time the LCD_RAM is write protected. + */ + + while ((getreg32(STM32_LCD_SR) & LCD_SR_UDR) != 0); + + /* Write all zerios in to the LCD RAM */ + + for (regaddr = STM32_LCD_RAML(0); regaddr <= STM32_LCD_RAMH(7); regaddr++) + { + putreg32(0, regaddr); + } + + /* Set all buffered data to undecorated spaces and home the cursor */ + + memset(g_slcdstate.buffer, ' ', SLCD_NCHARS); + memset(g_slcdstate.options, 0, SLCD_NCHARS); + g_slcdstate.curpos = 0; + + /* Set the UDR bit to transfer the updated data to the second level + * buffer. + */ + + putreg32(1, SLCD_SR_UDR_BB); +} + +/**************************************************************************** + * Name: slcd_getstream + * + * Description: + * Get one character from the keyboard. + * + ****************************************************************************/ + +static int slcd_getstream(FAR struct lib_instream_s *instream) +{ + FAR struct slcd_instream_s *slcdstream = (FAR struct slcd_instream_s *)instream; + + DEBUGASSERT(slcdstream && slcdstream->buffer); + if (slcdstream->nbytes > 0) + { + slcdstream->nbytes--; + slcdstream->stream.nget++; + return (int)*slcdstream->buffer++; + } + + return EOF; +} + +/**************************************************************************** + * Name: slcd_getcontrast + ****************************************************************************/ + +static uint8_t slcd_getcontrast(void) +{ + return (getreg32(STM32_LCD_FCR) & LCD_FCR_CC_MASK) >> LCD_FCR_CC_SHIFT; +} + +/**************************************************************************** + * Name: slcd_setcontrast + ****************************************************************************/ + +static int slcd_setcontrast(uint8_t contrast) +{ + uint32_t regval; + int ret = OK; + + /* Make sure that the contrast setting is within range */ + + if (contrast > 7) + { + contrast = 7; + ret = -ERANGE; + } + + regval = getreg32(STM32_LCD_FCR); + regval &= !LCD_FCR_CC_MASK; + regval |= contrast << LCD_FCR_CC_SHIFT; + putreg32(regval, STM32_LCD_FCR); + + lcdvdbg("contrast: %d FCR: %08x\n", + getreg32(STM32_LCD_FCR), contrast); + + return ret; +} + +/**************************************************************************** + * Name: slcd_writebar + ****************************************************************************/ + +static void slcd_writebar(void) +{ + uint32_t regval; + + lcdvdbg("bar: %02x %02x\n", g_slcdstate.bar[0], g_slcdstate.bar[1]); + slcd_dumpslcd("BEFORE WRITE"); + + /* Make sure that any previous transfer is complete. The firmware sets + * the UDR each it modifies the LCD_RAM. The UDR bit stays set until the + * end of the update. During this time the LCD_RAM is write protected. + */ + + while ((getreg32(STM32_LCD_SR) & LCD_SR_UDR) != 0); + + /* Update the BAR */ + + regval = getreg32(STM32_LCD_RAM2L); + regval &= 0xffff5fff; + regval |= (uint32_t)(g_slcdstate.bar[0] << 12); + putreg32(regval, STM32_LCD_RAM2L); + + regval = getreg32(STM32_LCD_RAM3L); + regval &= 0xffff5fff; + regval |= (uint32_t)(g_slcdstate.bar[1] << 12); + putreg32(regval, STM32_LCD_RAM3L); + + /* Set the UDR bit to transfer the updated data to the second level + * buffer. + */ + + putreg32(1, SLCD_SR_UDR_BB); + slcd_dumpslcd("AFTER WRITE"); +} + +/**************************************************************************** + * Name: slcd_mapch + ****************************************************************************/ + +static inline uint16_t slcd_mapch(uint8_t ch) +{ + /* ASCII control characters, the forward delete character, period, colon, + * and all 8-bit ASCII character have already been handled prior to this + * function. + */ + + /* Return spaces all control characters (this should not happen) */ + + if (ch < ASCII_SPACE) + { + return 0x0000; + } + + /* Handle space and the first block of puncutation */ + + if (ch < ASCII_0) + { + return g_slcdpunct1[(int)ch - ASCII_SPACE]; + } + + /* Handle numbers */ + + else if (ch < ASCII_COLON) + { + return g_slcdnummap[(int)ch - ASCII_0]; + } + + /* Handle the next block of puncutation */ + + else if (ch < ASCII_A) + { + return g_slcdpunct2[(int)ch - ASCII_COLON]; + } + + /* Handle upper case letters */ + + else if (ch < ASCII_LBRACKET) + { + return g_slcdalphamap[(int)ch - ASCII_A]; + } + + /* Handle the next block of puncutation */ + + else if (ch < ASCII_a) + { + return g_slcdpunct3[(int)ch - ASCII_LBRACKET]; + } + + /* Handle lower case letters (by mapping them to upper case */ + + else if (ch < ASCII_LBRACE) + { + return g_slcdalphamap[(int)ch - ASCII_a]; + } + + /* Handle the final block of puncutation */ + + else if (ch < ASCII_DEL) + { + return g_slcdpunct4[(int)ch - ASCII_LBRACE]; + } + + /* Ignore 8-bit ASCII and DEL (this should not happen) */ + + return 0x0000; +} + +/**************************************************************************** + * Name: slcd_writemem + ****************************************************************************/ + +static inline void slcd_writemem(uint16_t segset, int curpos) +{ + uint8_t segments[4]; + uint32_t ram0; + uint32_t ram1; + uint32_t ram2; + uint32_t ram3; + int i; + int j; + + lcdvdbg("segset: %04x curpos: %d\n", segset, curpos); + slcd_dumpslcd("BEFORE WRITE"); + + /* Isolate the least significant bits + * + * LCD character 16-bit-encoding: + * { E , D , P , N, M , C , COL , DP, B , A , K , J, G , F , Q , H } + * + * segments[0] = { E , D , P , N } + * segments[1] = { M , C , COL , DP } + * segments[2] = { B , A , K , J } + * segments[3] = { G , F , Q , H } + */ + + for (i = 12, j = 0; j < 4; i -= 4, j++) + { + segments[j] = (segset >> i) & 0x0f; + } + + lcdvdbg("segments: %02x %02x %02x %02x\n", + segments[0], segments[1], segments[2], segments[3]); + + /* Make sure that any previous transfer is complete. The firmware sets + * the UDR each it modifies the LCD_RAM. The UDR bit stays set until the + * end of the update. During this time the LCD_RAM is write protected. + */ + + while ((getreg32(STM32_LCD_SR) & LCD_SR_UDR) != 0); + + /* Now update the SLCD memory for the character at this cursor position by + * decoding the bit-mapped value + */ + + ram0 = getreg32(STM32_LCD_RAM0L); + ram1 = getreg32(STM32_LCD_RAM1L); + ram2 = getreg32(STM32_LCD_RAM2L); + ram3 = getreg32(STM32_LCD_RAM3L); + + switch (curpos) + { + case 0: + ram0 &= SLCD_CHAR1_MASK0; + ram0 |= SLCD_CHAR1_UPDATE0(segments[0]); + + ram1 &= SLCD_CHAR1_MASK1; + ram1 |= SLCD_CHAR1_UPDATE1(segments[1]); + + ram2 &= SLCD_CHAR1_MASK2; + ram2 |= SLCD_CHAR1_UPDATE2(segments[2]); + + ram3 &= SLCD_CHAR1_MASK3; + ram3 |= SLCD_CHAR1_UPDATE3(segments[3]); + break; + + case 1: + ram0 &= SLCD_CHAR2_MASK0; + ram0 |= SLCD_CHAR2_UPDATE0(segments[0]); + + ram1 &= SLCD_CHAR2_MASK1; + ram1 |= SLCD_CHAR2_UPDATE1(segments[1]); + + ram2 &= SLCD_CHAR2_MASK2; + ram2 |= SLCD_CHAR2_UPDATE2(segments[2]); + + ram3 &= SLCD_CHAR2_MASK3; + ram3 |= SLCD_CHAR2_UPDATE3(segments[3]); + break; + + case 2: + ram0 &= SLCD_CHAR3_MASK0; + ram0 |= SLCD_CHAR3_UPDATE0(segments[0]); + + ram1 &= SLCD_CHAR3_MASK1; + ram1 |= SLCD_CHAR3_UPDATE1(segments[1]); + + ram2 &= SLCD_CHAR3_MASK2; + ram2 |= SLCD_CHAR3_UPDATE2(segments[2]); + + ram3 &= SLCD_CHAR3_MASK3; + ram3 |= SLCD_CHAR3_UPDATE3(segments[3]); + break; + + case 3: + ram0 &= SLCD_CHAR4_MASK0; + ram0 |= SLCD_CHAR4_UPDATE0(segments[0]); + + ram1 &= SLCD_CHAR4_MASK1; + ram1 |= SLCD_CHAR4_UPDATE1(segments[1]); + + ram2 &= SLCD_CHAR4_MASK2; + ram2 |= SLCD_CHAR4_UPDATE2(segments[2]); + + ram3 &= SLCD_CHAR4_MASK3; + ram3 |= SLCD_CHAR4_UPDATE3(segments[3]); + break; + + case 4: + ram0 &= SLCD_CHAR5_MASK0; + ram0 |= SLCD_CHAR5_UPDATE0(segments[0]); + + ram1 &= SLCD_CHAR5_MASK1; + ram1 |= SLCD_CHAR5_UPDATE1(segments[1]); + + ram2 &= SLCD_CHAR5_MASK2; + ram2 |= SLCD_CHAR5_UPDATE2(segments[2]); + + ram3 &= SLCD_CHAR5_MASK3; + ram3 |= SLCD_CHAR5_UPDATE3(segments[3]); + break; + + case 5: + ram0 &= SLCD_CHAR6_MASK0; + ram0 |= SLCD_CHAR6_UPDATE0(segments[0]); + + ram1 &= SLCD_CHAR6_MASK1; + ram1 |= SLCD_CHAR6_UPDATE1(segments[1]); + + ram2 &= SLCD_CHAR6_MASK2; + ram2 |= SLCD_CHAR6_UPDATE2(segments[2]); + + ram3 &= SLCD_CHAR6_MASK3; + ram3 |= SLCD_CHAR6_UPDATE3(segments[3]); + break; + + default: + return; + } + + putreg32(ram0, STM32_LCD_RAM0L); + putreg32(ram1, STM32_LCD_RAM1L); + putreg32(ram2, STM32_LCD_RAM2L); + putreg32(ram3, STM32_LCD_RAM3L); + + /* Set the UDR bit to transfer the updated data to the second level + * buffer. + */ + + putreg32(1, SLCD_SR_UDR_BB); + slcd_dumpslcd("AFTER WRITE"); +} + +/**************************************************************************** + * Name: slcd_writech + ****************************************************************************/ + +static void slcd_writech(uint8_t ch, uint8_t curpos, uint8_t options) +{ + uint16_t segset; + + /* Map the character code to a 16-bit encoded value */ + + segset = slcd_mapch(ch); + + /* Check if the character should be decorated with a decimal point or colon */ + + if ((options & SLCD_DP) != 0) + { + segset |= 0x0002; + } + else if ((options & SLCD_COLON) != 0) + { + segset |= 0x0020; + } + + lcdvdbg("ch: [%c] options: %02x segset: %04x\n", ch, options, segset); + + /* Decode the value and write it to the SLCD segment memory */ + + slcd_writemem(segset, curpos); + + /* Save these values in the state structure */ + + g_slcdstate.buffer[curpos] = ch; + g_slcdstate.options[curpos] = options; + + slcd_dumpstate("AFTER WRITE"); +} + +/**************************************************************************** + * Name: slcd_appendch + ****************************************************************************/ + +static void slcd_appendch(uint8_t ch, uint8_t options) +{ + lcdvdbg("ch: [%c] options: %02x\n", ch, options); + + /* Write the character at the current cursor position */ + + slcd_writech(ch, g_slcdstate.curpos, options); + if (g_slcdstate.curpos < (SLCD_NCHARS - 1)) + { + g_slcdstate.curpos++; + } + + slcd_dumpstate("AFTER APPEND"); +} + +/**************************************************************************** + * Name: slcd_action + ****************************************************************************/ + +static void slcd_action(enum slcdcode_e code, uint8_t count) +{ + lcdvdbg("Action: %d count: %d\n", code, count); + slcd_dumpstate("BEFORE ACTION"); + + switch (code) + { + /* Erasure */ + + case SLCDCODE_BACKDEL: /* Backspace (backward delete) N characters */ + { + int tmp; + + /* If we are at the home position or if the count is zero, then ignore the action */ + + if (g_slcdstate.curpos < 1 || count < 1) + { + break; + } + + /* Otherwise, BACKDEL is like moving the cursor back N characters then doing a + * forward deletion. Decrement the cursor position and fall through. + */ + + tmp = (int)g_slcdstate.curpos - count; + if (tmp < 0) + { + tmp = 0; + count = g_slcdstate.curpos; + } + + /* Save the updated cursor positions */ + + g_slcdstate.curpos = tmp; + } + + case SLCDCODE_FWDDEL: /* DELete (forward delete) N characters moving text */ + if (count > 0) + { + int nchars; + int nmove; + int i; + + /* How many characters are to the right of the cursor position + * (including the one at the cursor position)? Then get the + * number of characters to move. + */ + + nchars = SLCD_NCHARS - g_slcdstate.curpos; + nmove = MIN(nchars, count) - 1; + + /* Move all characters after the current cursor position left by 'nmove' characters */ + + for (i = g_slcdstate.curpos + nmove; i < SLCD_NCHARS - 1; i++) + { + slcd_writech(g_slcdstate.buffer[i-nmove], i, g_slcdstate.options[i-nmove]); + } + + /* Erase the last 'nmove' characters on the display */ + + for (i = SLCD_NCHARS - nmove; i < SLCD_NCHARS; i++) + { + slcd_writech(' ', i, 0); + } + } + break; + + case SLCDCODE_ERASE: /* Erase N characters from the cursor position */ + if (count > 0) + { + int last; + int i; + + /* Get the last position to clear and make sure that the last + * position is on the SLCD. + */ + + last = g_slcdstate.curpos + count - 1; + if (last >= SLCD_NCHARS) + { + last = SLCD_NCHARS - 1; + } + + /* Erase N characters after the current cursor position left by one */ + + for (i = g_slcdstate.curpos; i < last; i++) + { + slcd_writech(' ', i, 0); + } + } + break; + + case SLCDCODE_CLEAR: /* Home the cursor and erase the entire display */ + { + /* This is like HOME followed by ERASEEOL. Home the cursor and + * fall through. + */ + + g_slcdstate.curpos = 0; + } + + case SLCDCODE_ERASEEOL: /* Erase from the cursor position to the end of line */ + { + int i; + + /* Erase characters after the current cursor position to the end of the line */ + + for (i = g_slcdstate.curpos; i < SLCD_NCHARS; i++) + { + slcd_writech(' ', i, 0); + } + } + break; + + /* Cursor movement */ + + case SLCDCODE_HOME: /* Cursor home */ + { + g_slcdstate.curpos = 0; + } + break; + + case SLCDCODE_END: /* Cursor end */ + { + g_slcdstate.curpos = SLCD_NCHARS - 1; + } + break; + + case SLCDCODE_LEFT: /* Cursor left by N characters */ + { + int tmp = (int)g_slcdstate.curpos - count; + + /* Don't permit movement past the beginning of the SLCD */ + + if (tmp < 0) + { + tmp = 0; + } + + /* Save the new cursor position */ + + g_slcdstate.curpos = (uint8_t)tmp; + } + break; + + case SLCDCODE_RIGHT: /* Cursor right by N characters */ + { + int tmp = (int)g_slcdstate.curpos + count; + + /* Don't permit movement past the end of the SLCD */ + + if (tmp >= SLCD_NCHARS) + { + tmp = SLCD_NCHARS - 1; + } + + /* Save the new cursor position */ + + g_slcdstate.curpos = (uint8_t)tmp; + } + break; + + case SLCDCODE_UP: /* Cursor up by N lines */ + case SLCDCODE_DOWN: /* Cursor down by N lines */ + case SLCDCODE_PAGEUP: /* Cursor up by N pages */ + case SLCDCODE_PAGEDOWN: /* Cursor down by N pages */ + break; /* Not supportable on this SLCD */ + + /* Blinking */ + + case SLCDCODE_BLINKSTART: /* Start blinking with current cursor position */ + case SLCDCODE_BLINKEND: /* End blinking after the current cursor position */ + case SLCDCODE_BLINKOFF: /* Turn blinking off */ + break; /* Not implemented */ + + /* These are actually unreportable errors */ + + default: + case SLCDCODE_NORMAL: /* Not a special keycode */ + break; + } + + slcd_dumpstate("AFTER ACTION"); +} + +/**************************************************************************** + * Name: slcd_read + ****************************************************************************/ + +static ssize_t slcd_read(FAR struct file *filep, FAR char *buffer, size_t len) +{ + int ret = 0; + int i; + + /* Try to read the entire display. Notice that the seek offset + * (filep->f_pos) is ignored. It probably should be taken into account + * and also updated after each read and write. + */ + + for (i = 0; i < SLCD_NCHARS && ret < len; i++) + { + /* Return the character */ + + *buffer++ = g_slcdstate.buffer[i]; + ret++; + + /* Check if the character is decorated with a folling period or colon */ + + if (ret < len && g_slcdstate.buffer[i] != 0) + { + if ((g_slcdstate.buffer[i] & SLCD_DP) != 0) + { + *buffer++ = '.'; + ret++; + } + else if ((g_slcdstate.buffer[i] & SLCD_COLON) != 0) + { + *buffer++ = ':'; + ret++; + } + } + } + + slcd_dumpstate("READ"); + return ret; +} + +/**************************************************************************** + * Name: slcd_write + ****************************************************************************/ + +static ssize_t slcd_write(FAR struct file *filep, + FAR const char *buffer, size_t len) +{ + struct slcd_instream_s instream; + struct slcdstate_s state; + enum slcdret_e result; + uint8_t ch; + uint8_t count; + uint8_t prev = ' '; + bool valid = false; + + /* Initialize the stream for use with the SLCD CODEC */ + + instream.stream.get = slcd_getstream; + instream.stream.nget = 0; + instream.buffer = buffer; + instream.nbytes = len; + + /* Prime the pump. This is messy, but necessary to handle decoration on a + * character based on any following period or colon. + */ + + memset(&state, 0, sizeof(struct slcdstate_s)); + result = slcd_decode(&instream.stream, &state, &prev, &count); + + lcdvdbg("slcd_decode returned result=%d char=%d count=%d\n", + result, prev, count); + + switch (result) + { + case SLCDRET_CHAR: + valid = true; + break; + + case SLCDRET_SPEC: + { + slcd_action((enum slcdcode_e)prev, count); + prev = ' '; + } + break; + + case SLCDRET_EOF: + return 0; + } + + /* Now decode and process every byte in the input buffer */ + + while ((result = slcd_decode(&instream.stream, &state, &ch, &count)) != SLCDRET_EOF) + { + lcdvdbg("slcd_decode returned result=%d char=%d count=%d\n", + result, ch, count); + + if (result == SLCDRET_CHAR) /* A normal character was returned */ + { + /* Check for ASCII control characters */ + + if (ch < ASCII_SPACE) + { + /* All are ignored except for backspace and carriage return */ + + if (ch == ASCII_BS) + { + /* If there is a pending character, then output it now before + * performing the action. + */ + + if (valid) + { + slcd_appendch(prev, 0); + prev = ' '; + valid = false; + } + + /* Then perform the backward deletion */ + + slcd_action(SLCDCODE_BACKDEL, 1); + } + else if (ch == ASCII_CR) + { + /* If there is a pending character, then output it now before + * performing the action. + */ + + if (valid) + { + slcd_appendch(prev, 0); + prev = ' '; + valid = false; + } + + /* Then perform the carriage return */ + + slcd_action(SLCDCODE_HOME, 0); + } + } + + /* Handle characters decoreated with a period or a colon */ + + else if (ch == '.') + { + /* Write the previous character with the decimal point appended */ + + slcd_appendch(prev, SLCD_DP); + prev = ' '; + valid = false; + } + else if (ch == ':') + { + /* Write the previous character with the colon appended */ + + slcd_appendch(prev, SLCD_COLON); + prev = ' '; + valid = false; + } + + /* Handle ASCII_DEL */ + + else if (ch == ASCII_DEL) + { + /* If there is a pending character, then output it now before + * performing the action. + */ + + if (valid) + { + slcd_appendch(prev, 0); + prev = ' '; + valid = false; + } + + /* Then perform the foward deletion */ + + slcd_action(SLCDCODE_FWDDEL, 1); + } + + /* The rest of the 7-bit ASCII characters are fair game */ + + else if (ch < 128) + { + /* Write the previous character if it valid */ + + if (valid) + { + slcd_appendch(prev, 0); + } + + /* There is now a valid output character */ + + prev = ch; + valid = true; + } + } + else /* (result == SLCDRET_SPEC) */ /* A special SLCD action was returned */ + { + /* If there is a pending character, then output it now before + * performing the action. + */ + + if (valid) + { + slcd_appendch(prev, 0); + prev = ' '; + valid = false; + } + + /* Then perform the action */ + + slcd_action((enum slcdcode_e)ch, count); + } + } + + /* Handle any unfinished output */ + + if (valid) + { + slcd_appendch(prev, 0); + } + + /* Assume that the entire input buffer was processed */ + + return (ssize_t)len; +} + +/**************************************************************************** + * Name: slcd_poll + ****************************************************************************/ + +static int slcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + switch (cmd) + { + + /* SLCDIOC_GETATTRIBUTES: Get the attributes of the SLCD + * + * argument: Pointer to struct slcd_attributes_s in which values will be + * returned + */ + + case SLCDIOC_GETATTRIBUTES: + { + FAR struct slcd_attributes_s *attr = (FAR struct slcd_attributes_s *)((uintptr_t)arg); + + lcdvdbg("SLCDIOC_GETATTRIBUTES:\n"); + + if (!attr) + { + return -EINVAL; + } + + attr->nrows = SLCD_NROWS; + attr->ncolumns = SLCD_NCHARS; + attr->nbars = SLCD_NBARS; + attr->maxcontrast = SLCD_MAXCONTRAST; + attr->maxbrightness = 0; + } + break; + + /* SLCDIOC_CURPOS: Get the SLCD cursor positioni (rows x characters) + * + * argument: Pointer to struct slcd_curpos_s in which values will be + * returned + */ + + case SLCDIOC_CURPOS: + { + FAR struct slcd_curpos_s *curpos = (FAR struct slcd_curpos_s *)((uintptr_t)arg); + + lcdvdbg("SLCDIOC_CURPOS: row=0 column=%d\n", g_slcdstate.curpos); + + if (!curpos) + { + return -EINVAL; + } + + curpos->row = 0; + curpos->column = g_slcdstate.curpos; + } + break; + + /* SLCDIOC_SETBAR: Set bars on a bar display + * + * argument: 32-bit bitset, with each bit corresponding to one bar. + */ + + case SLCDIOC_SETBAR: + { + lcdvdbg("SLCDIOC_SETBAR: arg=0x%02lx\n", arg); + + /* Format the bar */ + + g_slcdstate.bar[0] = 0; + g_slcdstate.bar[1] = 0; + + if ((arg & 1) != 0) + { + SLCD_BAR0_ON; + } + + if ((arg & 2) != 0) + { + SLCD_BAR1_ON; + } + + if ((arg & 4) != 0) + { + SLCD_BAR2_ON; + } + + if ((arg & 8) != 0) + { + SLCD_BAR3_ON; + } + + /* Write the bar to SLCD memory */ + + slcd_writebar(); + } + break; + + /* SLCDIOC_GETCONTRAST: Get the current contrast setting + * + * argument: Pointer type int that will receive the current contrast + * setting + */ + + case SLCDIOC_GETCONTRAST: + { + FAR int *contrast = (FAR int *)((uintptr_t)arg); + if (!contrast) + { + return -EINVAL; + } + + *contrast = (int)slcd_getcontrast(); + lcdvdbg("SLCDIOC_GETCONTRAST: contrast=%d\n", *contrast); + } + break; + + /* SLCDIOC_SETCONTRAST: Set the contrast to a new value + * + * argument: The new contrast value + */ + + case SLCDIOC_SETCONTRAST: + { + lcdvdbg("SLCDIOC_SETCONTRAST: arg=%ld\n", arg); + + if (arg > SLCD_MAXCONTRAST) + { + return -ERANGE; + } + + return slcd_setcontrast((uint8_t)arg); + } + break; + + case SLCDIOC_GETBRIGHTNESS: /* Get the current brightness setting */ + case SLCDIOC_SETBRIGHTNESS: /* Set the brightness to a new value */ + default: + return -ENOTTY; + } + + return OK; +} + +/**************************************************************************** + * Name: slcd_poll + ****************************************************************************/ + +#ifndef CONFIG_DISABLE_POLL +static int slcd_poll(FAR struct file *filep, FAR struct pollfd *fds, + bool setup) +{ + if (setup) + { + /* Data is always avaialble to be read / Data can always be written */ + + fds->revents |= (fds->events & (POLLIN|POLLOUT)); + if (fds->revents != 0) + { + sem_post(fds->sem); + } + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_slcd_initialize + * + * Description: + * Initialize the STM32L-Discovery LCD hardware and register the character + * driver as /dev/slcd. + * + ****************************************************************************/ + +int stm32_slcd_initialize(void) +{ + uint32_t regval; + int ret = OK; + int i; + + /* Only initialize the driver once. */ + + if (!g_slcdstate.initialized) + { + lcdvdbg("Initializing\n"); + + /* Configure LCD GPIO pins */ + + for (i = 0; i < BOARD_SLCD_NGPIOS; i++) + { + stm32_configgpio(g_slcdgpio[i]); + } + + /* Enable the External Low-Speed (LSE) oscillator and select it as the + * LCD clock source. + * + * NOTE: LCD clocking should already be enabled in the RCC APB1ENR register. + */ + + stm32_rcc_enablelse(); + + lcdvdbg("APB1ENR: %08x CSR: %08x\n", + getreg32(STM32_RCC_APB1ENR), getreg32(STM32_RCC_CSR)); + + /* Set the LCD prescaler and divider values */ + + regval = getreg32(STM32_LCD_FCR); + regval &= ~(LCD_FCR_DIV_MASK | LCD_FCR_PS_MASK); + regval |= (LCD_FCR_PS_DIV1 | LCD_FCR_DIV(31)); + putreg32(regval, STM32_LCD_FCR); + + /* Wait for the FCRSF flag to be set */ + + lcdvdbg("Wait for FCRSF, FSR: %08x SR: %08x\n", + getreg32(STM32_LCD_FCR), getreg32(STM32_LCD_SR)); + + while ((getreg32(STM32_LCD_SR) & LCD_SR_FCRSF) == 0); + + /* Set the duty (1/4), bias (1/3), and the internal voltage source (VSEL=0) */ + + regval = getreg32(STM32_LCD_CR); + regval &= ~(LCD_CR_BIAS_MASK | LCD_CR_DUTY_MASK | LCD_CR_VSEL); + regval |= (LCD_CR_DUTY_1TO4 | LCD_CR_BIAS_1TO3); + putreg32(regval, STM32_LCD_CR); + + /* SEG[31:28] are multiplexed with SEG[43:40] */ + + regval |= LCD_CR_MUX_SEG; + putreg32(regval, STM32_LCD_CR); + + /* Set the contrast to the mean value */ + + regval = getreg32(STM32_LCD_FCR); + regval &= ~LCD_FCR_CC_MASK; + regval |= LCD_FCR_CC_VLCD(4); + putreg32(regval, STM32_LCD_FCR); + + /* No dead time */ + + regval &= ~LCD_FCR_DEAD_MASK; + putreg32(regval, STM32_LCD_FCR); + + /* Set the pulse-on duration to 4/ck_ps */ + + regval &= ~LCD_FCR_PON_MASK; + regval |= LCD_FCR_PON(4); + putreg32(regval, STM32_LCD_FCR); + + /* Wait Until the LCD FCR register is synchronized */ + + lcdvdbg("Wait for FCRSF, FSR: %08x SR: %08x\n", + getreg32(STM32_LCD_FCR), getreg32(STM32_LCD_SR)); + + while ((getreg32(STM32_LCD_SR) & LCD_SR_FCRSF) == 0); + + /* Enable LCD peripheral */ + + putreg32(1, SLCD_CR_LCDEN_BB); + + /* Wait Until the LCD is enabled and the LCD booster is ready */ + + lcdvdbg("Wait for LCD_SR_ENS and LCD_SR_RDY, CR: %08x SR: %08x\n", + getreg32(STM32_LCD_CR), getreg32(STM32_LCD_SR)); + + while ((getreg32(STM32_LCD_SR) & (LCD_SR_ENS | LCD_SR_RDY)) != (LCD_SR_ENS | LCD_SR_RDY)); + + /* Disable blinking */ + + regval = getreg32(STM32_LCD_FCR); + regval &= ~(LCD_FCR_BLINKF_MASK | LCD_FCR_BLINK_MASK); + regval |= (LCD_FCR_BLINK_DISABLE | LCD_FCR_BLINKF_DIV32); + putreg32(regval, STM32_LCD_FCR); + + slcd_dumpslcd("AFTER INITIALIZATION"); + + /* Register the LCD device driver */ + + ret = register_driver("/dev/slcd", &g_slcdops, 0644, &g_slcdstate); + g_slcdstate.initialized = true; + + /* Then clear the display */ + + slcd_clear(); + slcd_dumpstate("AFTER INITIALIZATION"); + } + + return ret; +} + +#endif /* CONFIG_STM32_LCD */ diff --git a/configs/stm32ldiscovery/src/stm32_pwm.c b/configs/stm32ldiscovery/src/stm32_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..60eeb9bfcb7a35bcc481bce411a17fb7864fb276 --- /dev/null +++ b/configs/stm32ldiscovery/src/stm32_pwm.c @@ -0,0 +1,144 @@ +/************************************************************************************ + * configs/stm32ldiscovery/src/up_pwm.c + * arch/arm/src/board/up_pwm.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "stm32_pwm.h" +#include "stm32ldiscovery.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* PWM + * + * The stm32ldiscovery has no real on-board PWM devices, but the board can be configured to output + * a pulse train using TIM4 CH2. This pin is used by FSMC is connect to CN5 just for this + * purpose: + * + * PD13 FSMC_A18 / MC_TIM4_CH2OUT pin 33 (EnB) + * + * FSMC must be disabled in this case! + */ + +#define HAVE_PWM 1 + +#ifndef CONFIG_PWM +# undef HAVE_PWM +#endif + +#ifndef CONFIG_STM32_TIM4 +# undef HAVE_PWM +#endif + +#ifndef CONFIG_STM32_TIM4_PWM +# undef HAVE_PWM +#endif + +#if CONFIG_STM32_TIM4_CHANNEL != STM32F3DISCOVERY_PWMCHANNEL +# undef HAVE_PWM +#endif + +#ifdef HAVE_PWM + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + pwm = stm32_pwminitialize(STM32F3DISCOVERY_PWMTIMER); + if (!pwm) + { + dbg("Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* HAVE_PWM */ diff --git a/configs/stm32ldiscovery/src/stm32_qencoder.c b/configs/stm32ldiscovery/src/stm32_qencoder.c new file mode 100644 index 0000000000000000000000000000000000000000..e765750692aa51cd9bd9a24d29ea4bc023160005 --- /dev/null +++ b/configs/stm32ldiscovery/src/stm32_qencoder.c @@ -0,0 +1,163 @@ +/************************************************************************************ + * configs/stm32ldiscovery/src/up_qencoder.c + * arch/arm/src/board/up_qencoder.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "stm32_qencoder.h" +#include "stm32ldiscovery.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Check if we have a timer configured for quadrature encoder -- assume YES. */ + +#define HAVE_QENCODER 1 + +/* If TIMn is not enabled (via CONFIG_STM32_TIMn), then the configuration cannot + * specify TIMn as a quadrature encoder (via CONFIG_STM32_TIMn_QE). + */ + +#ifndef CONFIG_STM32_TIM1 +# undef CONFIG_STM32_TIM1_QE +#endif +#ifndef CONFIG_STM32_TIM2 +# undef CONFIG_STM32_TIM2_QE +#endif +#ifndef CONFIG_STM32_TIM3 +# undef CONFIG_STM32_TIM3_QE +#endif +#ifndef CONFIG_STM32_TIM4 +# undef CONFIG_STM32_TIM4_QE +#endif +#ifndef CONFIG_STM32_TIM5 +# undef CONFIG_STM32_TIM5_QE +#endif +#ifndef CONFIG_STM32_TIM8 +# undef CONFIG_STM32_TIM8_QE +#endif + +/* If the upper-half quadrature encoder driver is not enabled, then we cannot + * support the quadrature encoder. + */ + +#ifndef CONFIG_QENCODER +# undef HAVE_QENCODER +#endif + +/* Which Timer should we use, TIMID={1,2,3,4,5,8}. If multiple timers are + * configured as quadrature encoders, this logic will arbitrarily select + * the lowest numbered timer. + * + * At least one TIMn, n={1,2,3,4,5,8}, must be both enabled and configured + * as a quadrature encoder in order to support the lower half quadrature + * encoder driver. The above check assures that if CONFIG_STM32_TIMn_QE + * is defined, then the correspdonding TIMn is also enabled. + */ + +#if defined CONFIG_STM32_TIM1_QE +# define TIMID 1 +#elif defined CONFIG_STM32_TIM2_QE +# define TIMID 2 +#elif defined CONFIG_STM32_TIM3_QE +# define TIMID 3 +#elif defined CONFIG_STM32_TIM4_QE +# define TIMID 4 +#elif defined CONFIG_STM32_TIM5_QE +# define TIMID 5 +#elif defined CONFIG_STM32_TIM8_QE +# define TIMID 8 +#else +# undef HAVE_QENCODER +#endif + +#ifdef HAVE_QENCODER + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: qe_devinit + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/qencoder. + * + ************************************************************************************/ + +int qe_devinit(void) +{ + static bool initialized = false; + int ret; + + /* Check if we are already initialized */ + + if (!initialized) + { + /* Initialize a quadrature encoder interface. */ + + snvdbg("Initializing the quadrature encoder using TIM%d\n", TIMID); + ret = stm32_qeinitialize("/dev/qe0", TIMID); + if (ret < 0) + { + sndbg("stm32_qeinitialize failed: %d\n", ret); + return ret; + } + + initialized = true; + } + + return OK; +} + +#endif /* HAVE_QENCODER */ diff --git a/configs/stm32ldiscovery/src/stm32_spi.c b/configs/stm32ldiscovery/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..b56ed221fb7f891d482ee28431081c315b98d1db --- /dev/null +++ b/configs/stm32ldiscovery/src/stm32_spi.c @@ -0,0 +1,214 @@ +/************************************************************************************ + * configs/stm32ldiscovery/src/up_spi.c + * arch/arm/src/board/up_spi.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "stm32ldiscovery.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32ldiscovery board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ +#ifdef CONFIG_STM32_SPI1 + (void)stm32_configgpio(GPIO_MEMS_CS); /* MEMS chip select */ + (void)stm32_configgpio(GPIO_MEMS_INT1); /* MEMS interrupts */ + (void)stm32_configgpio(GPIO_MEMS_INT2); +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + stm32_gpiowrite(GPIO_MEMS_CS, !selected); +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif +#endif /* CONFIG_SPI_CMDDATA */ + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/stm32ldiscovery/src/stm32_userleds.c b/configs/stm32ldiscovery/src/stm32_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..4686eb97c7cb93696357e27950876b30ae90b024 --- /dev/null +++ b/configs/stm32ldiscovery/src/stm32_userleds.c @@ -0,0 +1,125 @@ +/**************************************************************************** + * configs/stm32ldiscovery/src/stm32_userleds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "stm32.h" +#include "stm32ldiscovery.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED1-2 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint32_t ledcfg; + + if (led == BOARD_LED1) + { + ledcfg = GPIO_LED1; + } + else if (led == BOARD_LED2) + { + ledcfg = GPIO_LED2; + } + else + { + return; + } + + stm32_gpiowrite(ledcfg, ledon); +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + bool ledon; + + ledon = ((ledset & BOARD_LED1_BIT) != 0); + stm32_gpiowrite(GPIO_LED1, ledon); + + ledon = ((ledset & BOARD_LED2_BIT) != 0); + stm32_gpiowrite(GPIO_LED2, ledon); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/stm32ldiscovery/src/stm32_watchdog.c b/configs/stm32ldiscovery/src/stm32_watchdog.c new file mode 100644 index 0000000000000000000000000000000000000000..9f6c832209267b9d847667748add0781ee867bf4 --- /dev/null +++ b/configs/stm32ldiscovery/src/stm32_watchdog.c @@ -0,0 +1,136 @@ +/************************************************************************************ + * configs/stm32ldiscovery/src/up_watchdog.c + * arch/arm/src/board/up_watchdog.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* Wathdog hardware should be enabled */ + +#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG) +# warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined" +#endif + +/* Select the path to the registered watchdog timer device */ + +#ifndef CONFIG_STM32_WDG_DEVPATH +# ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH +# else +# define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0" +# endif +#endif + +/* Use the un-calibrated LSI frequency if we have nothing better */ + +#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ) +# define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY +#endif + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog timer */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_WATCHDOG +#endif + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wdgdbg dbg +# define wdglldbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define wdgvdbg vdbg +# define wdgllvdbg llvdbg +# else +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +# endif +#else +# define wdgdbg(x...) +# define wdglldbg(x...) +# define wdgvdbg(x...) +# define wdgllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: up_wdginitialize() + * + * Description: + * Perform architecuture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int up_wdginitialize(void) +{ + /* Initialize tha register the watchdog timer device */ + +#if defined(CONFIG_STM32_WWDG) + stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH); + return OK; +#elif defined(CONFIG_STM32_IWDG) + stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ); + return OK; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_WATCHDOG */ diff --git a/configs/stm32ldiscovery/src/stm32ldiscovery.h b/configs/stm32ldiscovery/src/stm32ldiscovery.h new file mode 100644 index 0000000000000000000000000000000000000000..1bd424f37623126fee2f8b147cd365d89ec5d1c9 --- /dev/null +++ b/configs/stm32ldiscovery/src/stm32ldiscovery.h @@ -0,0 +1,248 @@ +/**************************************************************************************************** + * configs/stm32ldiscovery/src/stm32ldiscovery.h + * arch/arm/src/board/stm32ldiscovery.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __CONFIGS_STM32F3DISCOVERY_SRC_STM32F3DISCOVERY_H +#define __CONFIGS_STM32F3DISCOVERY_SRC_STM32F3DISCOVERY_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include +#include + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ +/* Configuration ************************************************************************************/ +/* How many SPI modules does this chip support? */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 3 +# undef CONFIG_STM32_SPI3 +#endif + +/* STM32L-Discovery GPIOs ***************************************************************************/ +/* The STM32L-Discovery board has four LEDs. Two of these are controlled by logic on the board and + * are not available for software control: + * + * LD1 COM: LD2 default status is red. LD2 turns to green to indicate that communications are in + * progress between the PC and the ST-LINK/V2. + * LD2 PWR: Red LED indicates that the board is powered. + * + * And two LEDs can be controlled by software: + * + * User LD3: Green LED is a user LED connected to the I/O PB7 of the STM32L152 MCU. + * User LD4: Blue LED is a user LED connected to the I/O PB6 of the STM32L152 MCU. + * + * The other side of the LED connects to ground so high value will illuminate the LED. + */ + +#define GPIO_LED1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_10MHz | \ + GPIO_OUTPUT_CLEAR | GPIO_PORTB | GPIO_PIN7) +#define GPIO_LED2 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_10MHz | \ + GPIO_OUTPUT_CLEAR | GPIO_PORTB | GPIO_PIN6) + +/* Button definitions *******************************************************************************/ +/* The STM32L-Discovery supports two buttons; only one button is controllable by software: + * + * B1 USER: user and wake-up button connected to the I/O PA0 of the STM32F303VCT6. + * B2 RESET: pushbutton connected to NRST is used to RESET the STM32F303VCT6. + * + * NOTE that EXTI interrupts are configured + */ + +#define MIN_IRQBUTTON BUTTON_USER +#define MAX_IRQBUTTON BUTTON_USER +#define NUM_IRQBUTTONS 1 + +#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTA | GPIO_PIN0) + +/* LCD definitions **********************************************************************************/ +/* LCD. The STM32L152RBT6 supports either a 4x32 or 8x28. The STM32L-Discovery + * has an LCD 24 segments, 4 commons. On that board, LCD pins are mapped as + * follows: + * + * The 24 segments are represented by the letters A, B, C, D, E, F, G, H, J, + * K, M, N, P, Q, COL (colon), and DP (decimal point) + * + * A + * --------- _ + * |\ |J /| |_| COL + * F| H | K |B + * | \ | / | _ + * --G-- --M-+ |_| COL + * | /| \ | + * E| Q | N |C + * | / |P \| _ + * --------- |_| DP + * D + * + * Plus BAR0-3. The following is of each segment of each of the 6 characters 4 x 24: + * + * ---- ----- ----- ----- ----- --------------- + * GPIO COM3 COM2 COM1 COM0 SIGNAL NAME + * ---- ----- ----- ----- ----- --------------- + * PA1 1N 1P 1D 1E LCD SEG0 + * PA2 1DP 1COL 1C 1M LCD SEG1 + * PA3 2N 2P 2D 2E LCD SEG2 + * PB3 2DP 2COL 2C 2M LCD SEG3 + * PB4 3N 3P 3D 3E LCD SEG4 + * PB5 3DP 3COL 3C 3M LCD SEG5 + * PB10 4N 4P 4D 4E LCD SEG6 + * PB11 4DP 4COL 4C 4M LCD SEG7 + * PB12 5N 5P 5D 5E LCD SEG8 + * PB13 BAR2 BAR3 5C 5M LCD SEG9 + * PB14 6N 6P 6D 6E LCD SEG10 + * PB15 BAR0 BAR1 6C 6M LCD SEG11 + * PB9 COM3 LCD glass COM3 + * PA10 COM2 LCD glass COM2 + * PA9 COM1 LCD glass COM1 + * PA8 COM0 LCD glass COM0 + * PA15 6J 6K 6A 6B LCD SEG12 + * PB8 6H 6Q 6F 6G LCD SEG13 + * PC0 5J 5K 5A 5B LCD SEG14 + * PC1 5H 5Q 5F 5G LCD SEG15 + * PC2 4J 4K 4A 4B LCD SEG16 + * PC3 4H 4Q 4F 4G LCD SEG17 + * PC6 3J 3K 3A 3B LCD SEG18 + * PC7 3H 3Q 3F 3G LCD SEG19 + * PC8 2J 2K 2A 2B LCD SEG20 + * PC9 2H 2Q 2F 2G LCD SEG21 + * PC10 1J 1K 1A 1B LCD SEG22 + * PC11 1H 1Q 1F 1G LCD SEG23 + * ---- ----- ----- ----- ----- --------------- + * + * ----- --------------------- ---------------- + * GPIO ALTERNATE FUNCTION BOARD SIGNAL + * ----- --------------------- ---------------- + * PA8 LCD_COM0 LCD glass COM0 + * PA9 LCD_COM1 LCD glass COM1 + * PA10 LCD_COM2 LCD glass COM2 + * PB9 LCD_COM3 LCD glass COM3 + * PA1 LCD_SEG0 LCD SEG0 + * PA2 LCD_SEG1 LCD SEG1 + * PA3 LCD_SEG2 LCD SEG2 + * PB3 LCD_SEG7 LCD_SEG3 + * PB4 LCD_SEG8 LCD_SEG4 + * PB5 LCD_SEG9 LCD SEG5 + * PB10 LCD_SEG10 LCD SEG6 + * PB11 LCD_SEG11 LCD SEG7 + * PB12 LCD_SEG12 LCD SEG8 + * PB13 LCD_SEG13 LCD SEG9 + * PB14 LCD_SEG14 LCD SEG10 + * PB15 LCD_SEG15 LCD SEG11 + * PA15 LCD_SEG12 LCD SEG12 + * PB8 LCD_SEG16 LCD SEG13 + * PC0 LCD_SEG18 LCD SEG14 + * PC1 LCD_SEG19 LCD SEG15 + * PC2 LCD_SEG20 LCD SEG16 + * PC3 LCD_SEG21 LCD SEG17 + * PC6 LCD_SEG24 LCD SEG18 + * PC7 LCD_SEG25 LCD SEG19 + * PC8 LCD_SEG26 LCD SEG20 + * PC9 LCD_SEG27 LCD SEG21 + * PC10 LCD_SEG40 LCD SEG22 + * PC11 LCD_SEG41 LCD SEG23 + */ + +#define BOARD_SLCD_COM0 GPIO_LCD_COM0 /* PA8 */ +#define BOARD_SLCD_COM1 GPIO_LCD_COM1 /* PA9 */ +#define BOARD_SLCD_COM2 GPIO_LCD_COM2 /* PA10 */ +#define BOARD_SLCD_COM3 GPIO_LCD_COM3 /* PB9 */ +#define BOARD_SLCD_SEG0 GPIO_LCD_SEG0 /* PA1 */ +#define BOARD_SLCD_SEG1 GPIO_LCD_SEG1 /* PA2 */ +#define BOARD_SLCD_SEG2 GPIO_LCD_SEG2 /* PA3 */ +#define BOARD_SLCD_SEG3 GPIO_LCD_SEG7 /* PB3 */ +#define BOARD_SLCD_SEG4 GPIO_LCD_SEG8 /* PB4 */ +#define BOARD_SLCD_SEG5 GPIO_LCD_SEG9 /* PB5 */ +#define BOARD_SLCD_SEG6 GPIO_LCD_SEG10 /* PB10 */ +#define BOARD_SLCD_SEG7 GPIO_LCD_SEG11 /* PB11 */ +#define BOARD_SLCD_SEG8 GPIO_LCD_SEG12 /* PB12 */ +#define BOARD_SLCD_SEG9 GPIO_LCD_SEG13 /* PB13 */ +#define BOARD_SLCD_SEG10 GPIO_LCD_SEG14 /* PB14 */ +#define BOARD_SLCD_SEG11 GPIO_LCD_SEG15 /* PB15 */ +#define BOARD_SLCD_SEG12 GPIO_LCD_SEG17 /* PA15 */ +#define BOARD_SLCD_SEG13 GPIO_LCD_SEG16 /* PB8 */ +#define BOARD_SLCD_SEG14 GPIO_LCD_SEG18 /* PC0 */ +#define BOARD_SLCD_SEG15 GPIO_LCD_SEG19 /* PC1 */ +#define BOARD_SLCD_SEG16 GPIO_LCD_SEG20 /* PC2 */ +#define BOARD_SLCD_SEG17 GPIO_LCD_SEG21 /* PC3 */ +#define BOARD_SLCD_SEG18 GPIO_LCD_SEG24 /* PC6 */ +#define BOARD_SLCD_SEG19 GPIO_LCD_SEG25 /* PC7 */ +#define BOARD_SLCD_SEG20 GPIO_LCD_SEG26 /* PC8 */ +#define BOARD_SLCD_SEG21 GPIO_LCD_SEG27 /* PC9 */ +#define BOARD_SLCD_SEG22 GPIO_LCD_SEG40 /* PC10 */ +#define BOARD_SLCD_SEG23 GPIO_LCD_SEG41 /* PC11 */ + +#define BOARD_SLCD_NCOM 4 +#define BOARD_SLCD_NSEG 24 +#define BOARD_SLCD_NGPIOS 28 + +/**************************************************************************************************** + * Public Types + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +/**************************************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32ldiscovery board. + * + ****************************************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_STM32F3DISCOVERY_SRC_STM32F3DISCOVERY_H */ + diff --git a/configs/stm32vldiscovery/Kconfig b/configs/stm32vldiscovery/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..68d3a72d69daac4728e6b5fddbf1d259c399d7a7 --- /dev/null +++ b/configs/stm32vldiscovery/Kconfig @@ -0,0 +1,11 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_STM32VL_DISCOVERY + +comment "STM32VL-Discovery Hardware Configuration" + +endif + diff --git a/configs/stm32vldiscovery/README.txt b/configs/stm32vldiscovery/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..28986df04dd6477098057794f4e9304c6f9e7f54 --- /dev/null +++ b/configs/stm32vldiscovery/README.txt @@ -0,0 +1,461 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the STMicro +STM32VLDiscovery (Value Line Discovery) board. + +Contents +======== + + - Development Environment + - GNU Toolchain Options + - IDEs + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - LEDs + - UARTs + - "STMicro STM32F100RC generic" specific Configuration Options + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + +GNU Toolchain Options +===================== + + Toolchain Configurations + ------------------------ + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The Atollic Toolchain, + 3. The devkitARM GNU toolchain, + 4. Raisonance GNU toolchain, or + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the CodeSourcery toolchain for Windows. To use + the Atollic, devkitARM, Raisonance GNU, or NuttX buildroot toolchain, you simply need to + add one of the following configuration options to your .config (or defconfig) + file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.sh file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/stm32, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX + one time from the Cygwin command line in order to obtain the pre-built + startup object needed by RIDE. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh stm32vldiscovery/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +==== + +It is asumed that STMicro STM32F100RC generic board board has one LED on PA0. +You should configure the port and pin number in +configs/stm32vldiscovery/src/stm32vldiscovery.h. This LED is not used by +the board port unless CONFIG_ARCH_LEDS is defined. In that case, the usage by +the board port is defined in include/board.h and src/up_leds.c. The LED is used +to encode OS-related events as follows: + + SYMBOL Meaning LED1* + green + ------------------- ----------------------- ------- + LED_STARTED NuttX has been started ON + LED_HEAPALLOCATE Heap has been allocated ON + LED_IRQSENABLED Interrupts enabled ON + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt ON + LED_SIGNAL In a signal handler ON + LED_ASSERTION An assertion failed OFF + LED_PANIC The system has crashed OFF + +So basically if the LED is off it means that there is a problem. + +UART +==== + +Default USART/UART Configuration +-------------------------------- + +USART1 is enabled in all configurations (see */defconfig). RX and TX are +configured on pins PA10 and PA9, respectively. Then connect the RX pin of +your USB/Serial adapter to TX pin (PA9) and the TX pin of your adapter to +RX pin (PA10) of your board besides, of course, the GND pin. + +"STMicro STM32F100RC generic" specific Configuration Options +============================================================ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32F100RB=y + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=stm32vldiscovery + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_STM32VL_DISCOVERY=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=24576 (24kB) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LED to show state. Unique to boards that have LED(s) + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_CALIBRATION - when used togeter with CONFIG_DEBUG enables some + build in instrumentation that cause a 100 second delay during boot-up. + This 100 second delay serves no purpose other than it allows you to + calibratre CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to + measure the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + AHB + ---- + CONFIG_STM32_CRC + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_TIM12 + CONFIG_STM32_TIM13 + CONFIG_STM32_TIM14 + CONFIG_STM32_RTC + CONFIG_STM32_WWDG + CONFIG_STM32_IWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI3 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_PWR -- Required for RTC + CONFIG_STM32_BKP -- Required for RTC + CONFIG_STM32_DAC1 + CONFIG_STM32_DAC2 + CONFIG_STM32_CEC + + APB2 + ---- + CONFIG_STM32_ADC1 + CONFIG_STM32_TIM1 + CONFIG_STM32_SPI1 + CONFIG_STM32_USART1 + CONFIG_STM32_TIM15 + CONFIG_STM32_TIM16 + CONFIG_STM32_TIM17 + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,17 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,17 + CONFIG_STM32_TIMn_ADC1 Reserve timer n to trigger ADCm, n=1,..,17 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,17 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,17, m=1,..,2 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + JTAG Enable settings (by default full SWJ is enabled): + + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + + STMicro STM32F100RC generic specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + +Configurations +============== + +Each STMicro STM32F100RC generic configuration is maintained in a sub-directory +and can be selected as follow: + + cd tools + ./configure.sh stm32vldiscovery/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables only the serial NSH interfaces. + + Default toolchain: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux / Mac OS X diff --git a/configs/stm32vldiscovery/include/board.h b/configs/stm32vldiscovery/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..efbb3f3e8cd9f1fbc8ae7f74052b30f42aac1b27 --- /dev/null +++ b/configs/stm32vldiscovery/include/board.h @@ -0,0 +1,177 @@ +/************************************************************************************ + * configs/stm32vldiscovery/include/board.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Freddie Chopin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIG_STM32VLDISCOVERY_INCLUDE_BOARD_H +#define __CONFIG_STM32VLDISCOVERY_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif +#include "stm32_rcc.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* On-board crystal frequency is 8MHz (HSE) */ + +#define STM32_BOARD_XTAL 8000000ul + +/* PLL source is HSE / 1, PLL multiplier is 3: PLL output frequency is 8MHz (XTAL) x 3 = 24MHz */ + +#define STM32_CFGR2_PREDIV1 RCC_CFGR2_PREDIV1d1 +#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC +#define STM32_CFGR_PLLXTPRE 0 +#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx3 +#define STM32_PLL_FREQUENCY (3 * STM32_BOARD_XTAL) + +/* Use the PLL and set the SYSCLK source to be the PLL */ + +#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL +#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY + +/* AHB clock (HCLK) is SYSCLK (24MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY + +/* APB2 clock (PCLK2) is HCLK (24MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY + +/* APB2 timers (1, 15-17) will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN STM32_PCLK2_FREQUENCY +#define STM32_APB2_TIM15_CLKIN STM32_PCLK2_FREQUENCY +#define STM32_APB2_TIM16_CLKIN STM32_PCLK2_FREQUENCY +#define STM32_APB2_TIM17_CLKIN STM32_PCLK2_FREQUENCY + +/* APB1 clock (PCLK1) is HCLK (24MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK +#define STM32_PCLK1_FREQUENCY STM32_HCLK_FREQUENCY + +/* APB1 timers (2-7, 12-14) will receive PCLK1. */ + +#define STM32_APB1_TIM2_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_APB1_TIM3_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_APB1_TIM4_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_APB1_TIM5_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_APB1_TIM6_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_APB1_TIM7_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_APB1_TIM12_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_APB1_TIM13_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_APB1_TIM14_CLKIN STM32_PCLK1_FREQUENCY + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,15-17 are on APB2, others on APB1 */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY + +/* LED definitions ******************************************************************/ + +/* It is assumed that a generic board has 1 LED. Thus only two different states + * can be shown. Statuses defined as "1" will light the LED, the ones defined as + * "0" will turn the LED off. */ + +#define LED_STARTED 1 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 1 +#define LED_STACKCREATED 1 +#define LED_INIRQ 1 +#define LED_SIGNAL 1 +#define LED_ASSERTION 0 +#define LED_PANIC 0 + +/* Button definitions ***************************************************************/ + +/* It is assumed that a generic board has 1 button. */ + +#define BUTTON_0 0 + +#define NUM_BUTTONS 1 + +#define BUTTON_0_BIT (1 << BUTTON_0) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIG_STM32VLDISCOVERY_INCLUDE_BOARD_H */ diff --git a/configs/stm32vldiscovery/nsh/Make.defs b/configs/stm32vldiscovery/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..3f02d1771a7509cfce1c6e6c91bcbf5f12919140 --- /dev/null +++ b/configs/stm32vldiscovery/nsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32vldiscovery/nsh/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Freddie Chopin +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS = -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS = -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32vldiscovery/nsh/defconfig b/configs/stm32vldiscovery/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..5e0c83b09fb3482469302624daebd48c7a274384 --- /dev/null +++ b/configs/stm32vldiscovery/nsh/defconfig @@ -0,0 +1,1112 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +CONFIG_ARCH_CHIP_STM32F100RB=y +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +CONFIG_STM32_VALUELINE=y +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +# CONFIG_STM32_HAVE_TIM8 is not set +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +CONFIG_STM32_HAVE_TIM15=y +CONFIG_STM32_HAVE_TIM16=y +CONFIG_STM32_HAVE_TIM17=y +CONFIG_STM32_HAVE_ADC2=y +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +# CONFIG_STM32_HAVE_CAN1 is not set +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +# CONFIG_STM32_HAVE_SPI2 is not set +# CONFIG_STM32_HAVE_SPI3 is not set +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +CONFIG_STM32_BKP=y +# CONFIG_STM32_CEC is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_TIM15 is not set +# CONFIG_STM32_TIM16 is not set +# CONFIG_STM32_TIM17 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +CONFIG_RTC_LSECLOCK=y +# CONFIG_RTC_LSICLOCK is not set +# CONFIG_RTC_HSECLOCK is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=2398 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=8192 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32VL_DISCOVERY=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32vldiscovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# STM32VL-Discovery Hardware Configuration +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +CONFIG_RTC=y +# CONFIG_RTC_DATETIME is not set +# CONFIG_RTC_HIRES is not set +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=128 +CONFIG_USART1_TXBUFSIZE=128 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +CONFIG_NSH_DISABLE_HEXDUMP=y +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +CONFIG_NSH_DISABLE_ITEF=y +CONFIG_NSH_DISABLE_LOOPS=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32vldiscovery/nsh/setenv.sh b/configs/stm32vldiscovery/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..4b3abe66f617b07f7454e2569324d78e4c3f8cb0 --- /dev/null +++ b/configs/stm32vldiscovery/nsh/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/stm32vldiscovery/nsh/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Freddie Chopin +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32vldiscovery/scripts/ld.script b/configs/stm32vldiscovery/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..db5f91d09e33d1b00a634c56a818e395272fed35 --- /dev/null +++ b/configs/stm32vldiscovery/scripts/ld.script @@ -0,0 +1,118 @@ +/**************************************************************************** + * configs/stm32vldiscovery/scripts/ld.script + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Freddie Chopin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F100RC has 256kB of FLASH beginning at address 0x08000000 and 24kB + * of SRAM beginning at address 0x20000000. When booting from FLASH, FLASH + * memory is aliased to address 0x00000000 where the code expects to begin + * execution by jumping to the entry point in the 0x08000000 address range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 24K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32vldiscovery/src/.gitignore b/configs/stm32vldiscovery/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/stm32vldiscovery/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/stm32vldiscovery/src/Makefile b/configs/stm32vldiscovery/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..c8ef054cf95545c3ddfec389e71952e815583779 --- /dev/null +++ b/configs/stm32vldiscovery/src/Makefile @@ -0,0 +1,42 @@ +############################################################################ +# configs/stm32vldiscovery/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Freddie Chopin +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_leds.c stm32_buttons.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32vldiscovery/src/stm32_boot.c b/configs/stm32vldiscovery/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..04ca85b2a06a9026dd1edc1b05e0925477853e94 --- /dev/null +++ b/configs/stm32vldiscovery/src/stm32_boot.c @@ -0,0 +1,71 @@ +/************************************************************************************ + * configs/stm32vldiscovery/src/stm32_boot.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Freddie Chopin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "stm32vldiscovery.h" + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + stm32_led_initialize(); +#endif +} diff --git a/configs/stm32vldiscovery/src/stm32_buttons.c b/configs/stm32vldiscovery/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..87442c115e1e7bdb53ca78df5bcda9a68706f88c --- /dev/null +++ b/configs/stm32vldiscovery/src/stm32_buttons.c @@ -0,0 +1,120 @@ +/**************************************************************************** + * configs/stm32vldiscovery/src/stm32_buttons.c + * + * Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Freddie Chopin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "stm32vldiscovery.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + stm32_configgpio(GPIO_BTN_0); /* Configure the GPIO pins as inputs. */ +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + + ret = (stm32_gpioread(g_buttons[i]) == false ? 1 : 0); + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT and JOYSTICK_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id == 0) + oldhandler = stm32_gpiosetevent(GPIO_BTN_0, true, true, true, irqhandler); + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/stm32vldiscovery/src/stm32_leds.c b/configs/stm32vldiscovery/src/stm32_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..62cc0a20db0714b9c6d2536d4ff0f7af188e3186 --- /dev/null +++ b/configs/stm32vldiscovery/src/stm32_leds.c @@ -0,0 +1,111 @@ +/**************************************************************************** + * configs/stm32vldiscovery/src/stm32_leds.c + * + * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Freddie Chopin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "stm32.h" +#include "stm32vldiscovery.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_led_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void stm32_led_initialize(void) +{ + stm32_configgpio(GPIO_LED1); /* Configure LED1 GPIO for output */ +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led == 1) + { + stm32_gpiowrite(GPIO_LED1, true); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == 0) + { + stm32_gpiowrite(GPIO_LED1, false); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/stm32vldiscovery/src/stm32vldiscovery.h b/configs/stm32vldiscovery/src/stm32vldiscovery.h new file mode 100644 index 0000000000000000000000000000000000000000..43c444be8a6771400bd2141140df2854dcad52de --- /dev/null +++ b/configs/stm32vldiscovery/src/stm32vldiscovery.h @@ -0,0 +1,66 @@ +/**************************************************************************** + * configs/stm32vldiscovery/src/stm32vldiscovery.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Freddie Chopin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_STM32VL_DISCOVERY_SRC_STM32VLDISCOVERY_H +#define __CONFIGS_STM32VL_DISCOVERY_SRC_STM32VLDISCOVERY_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* LED - assume it is on PC8 */ + +#define GPIO_LED1 (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz | \ + GPIO_OUTPUT_CLEAR | GPIO_PORTC | GPIO_PIN8) + +/* BUTTON - assume it is on PA0 */ + +#define MIN_IRQBUTTON BUTTON_0 +#define MAX_IRQBUTTON BUTTON_0 +#define NUM_IRQBUTTONS 1 + +#define GPIO_BTN_0 (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT | \ + GPIO_PORTA | GPIO_PIN0) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void stm32_led_initialize(void); +#endif + +#endif /* __CONFIGS_STM32VL_DISCOVERY_SRC_STM32VLDISCOVERY_H */ diff --git a/configs/sure-pic32mx/Kconfig b/configs/sure-pic32mx/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..c6ae0e09458b190b0180375e75a283d7235a1bdc --- /dev/null +++ b/configs/sure-pic32mx/Kconfig @@ -0,0 +1,40 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_SUREPIC32MX + +choice + prompt "Select Sure PIC32MX Board" + default ARCH_DBDP11215 + +config ARCH_DBDP11215 + bool "DB_DP11215 PIC32 Storage Demo Board" + select ARCH_HAVE_LEDS + ---help--- + DB_DP11215 PIC32 Storage Demo Board + + - PIC32MX44F512H + - SD card slot + - RS-2323 Interface + - USB (MINI-B) + - 2x16 LCD display + - Three tactile switches + - Four user LEDs + +config ARCH_DBDP11212 + bool "DB-DP11212 PIC32 General Purpose Demo Board" + ---help--- + DB-DP11212 PIC32 General Purpose Demo Board + + - PIC32MX44F512H + - LM75A temperature sensor and temperature resistor (NTC-SMD thermistor) + - SPI FLASH: AT25DF041A + - USB (MINI-B) + - 2x16 LCD display + - 4 digit, 8 segment LED display + - Three tactile switches + +endchoice +endif diff --git a/configs/sure-pic32mx/README.txt b/configs/sure-pic32mx/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..8ce44ce3c73e3bf01945fcb1f5b07aeb36dbe008 --- /dev/null +++ b/configs/sure-pic32mx/README.txt @@ -0,0 +1,939 @@ +configs/pic32mx README +===================== + +This README file discusses the port of NuttX to the "Advanced USB Storage +Demo Board," Model DB-DP11215, from Sure Electronics +(http://www.sureelectronics.net/). This board features the MicroChip +PIC32MX440F512H. See also http://www.sureelectronics.net/goods.php?id=1168 +for further information about the Sure DB-DP11215 board. + +DB_DP11215 PIC32 Storage Demo Board + + - PIC32MX44F512H + - SD card slot + - RS-2323 Interface + - USB (MINI-B) + - 2x16 LCD display + - Three tactile switches + - Four user LEDs + +Also available (but not yet supported). + +DB-DP11212 PIC32 General Purpose Demo Board + + - PIC32MX44F512H + - LM75A temperature sensor and temperature resistor (NTC-SMD thermistor) + - SPI FLASH: AT25DF041A + - USB (MINI-B) + - 2x16 LCD display + - 4 digit, 8 segment LED display + - Three tactile switches + - Four user LEDs + +NOTE: I see that Sure Electronics shows both of these boards at end-of-Life +(EOL). So I assume that these boards will no longer be generally available. +This work should still be useful, however, for other PIC32MX4-based boards +(2012-5-27). + +Contents +======== + + PIC32MX440F512H Pin Out + Toolchains + Loading NuttX with PICkit2 + LCD1602 + PIC32MX Configuration Options + Configurations + +PIC32MX440F512H Pin Out +======================= + + DB_DP11215 PIC32 Storage Demo Board + ----------------------------------- + PIC32MX440F512H 64-Pin QFN (USB) Pin Out as used on the DB_DP11215 PIC32 Storage + Demo Board. + + LEFT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) + PIN NAME SIGNAL NOTES + ---- ----------------------------- -------------- ------------------------------- + 1 PMD5/RE5 PMPD5 Display, JP1-12, DB4 + 2 PMD6/RE6 PMPD6 Display, JP1-13, DB6 + 3 PMD7/RE7 PMPD7 Display, JP1-14, DB7 + 4 SCK2/PMA5/CN8/RG6 SCK SD connector SCK, FLASH (U1) SCK* + 5 SDI2/PMA4/CN9/RG7 SDI SD connector DO, FLASH (U1) SO* + 6 SDO2/PMA3/CN10/RG8 SDO SD connector DI, FLASH (U1) SI* + 7 MCLR\ PIC_MCLR Pulled high, J7-1, ICSP + 8 SS2/PMA2/CN11/RG9 UTIL_CS FLASH (U1) CS* + 9 Vss Grounded + 10 Vdd +3.3V --- + 11 AN5/C1IN+/Vbuson/CN7/RB5 Vbuson/AN5/RB5 To USB VBUS circuitry + 12 AN4/C1IN-/CN6/RB4 SW_OK SW3, Pull high, low means SW3 closed + 13 AN3/C2IN+/CN5/RB3 SW_UP SW1, Pull high, low means SW1 closed + 14 AN2/C2IN-/CN4/RB2 SW_Down SW2, Pull high, low means SW2 closed + 15 PGEC1/AN1/Vref-/CVref-/CN3/ ADC_SENSE_SWITCHED_+VBUS To USB VBUS circuitry + RB1 + 16 PGED1/AN0/VREF+/CVREF+/PMA6/ N/C Not connected + CN2/RB0 + + *FLASH (U1, SOIC) not populated + + BOTTOM SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) + PIN NAME SIGNAL NOTES + ---- ----------------------------- -------------- ------------------------------- + 17 PGEC2/AN6/OCFA/RB6 PIC_PGC2 J7-5, ICSP + 18 PGED2/AN7/RB7 PIC_PGD2 J7-4, ICSP + 19 AVdd +3.3V --- + 20 AVss Grounded + 21 AN8/U2CTS/C1OUT/RB8 N/C Not connected + 22 AN9/C2OUT/PMA7/RB9 N/C Not connected + 23 TMS/AN10/CVREFOUT/PMA13/RB10 UTIL_WP FLASH (U1) WP* + 24 TDO/AN11/PMA12/RB11 SD_CS SD connector CS + 25 Vss Grounded + 26 Vdd +3.3V --- + 27 TCK/AN12/PMA11/RB12 SD_CD SD connector CD + 28 TDI/AN13/PMA10/RB13 SD_WD SD connector WD + 29 AN14/U2RTS/PMALH/PMA1/RB14 N/C Not connected + 30 AN15/OCFB/PMALL/PMA0/CN12/ PMPA0 Display, JP1-4, RS + RB15 + 31 SDA2/U2RX/PMA9/CN17/RF4 RXD2_MCU J5 DB9 via RS232 driver + 32 SCL2/U2TX/PMA8/CN18/RF5 TXD2_MCU J5 DB9 via RS232 driver + + *FLASH (U1, SOIC) not populated + + RIGHT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) + PIN NAME SIGNAL NOTES + ---- ----------------------------- -------------- ------------------------------- + 48 SOSCO/T1CK/CN0/RC14 SOSCO 32.768KHz XTAL (Y1) + 47 SOSCI/CN1/RC13 SOSCI 32.768KHz XTAL (Y1) + 46 OC1/INT0/RD0 PWM1 Used to control backlight level (K) + 45 IC4/PMCS1/PMA14/INT4/RD11 PMPCS1 Display, JP1-6, E + 44 SCL1/IC3/PMCS2/PMA15/INT3/ USB_OPT USB PHY + RD10 + 43 U1CTS/SDA1/IC2/INT2/RD9 USB_OPTEN USB PHY + 42 RTCC/IC1/INT1/RD8 N/C Not connected + 41 Vss Grounded + 40 OSC2/CLKO/RC15 OSC2 20MHz XTAL (Y2) + 39 OSC1/CLKI/RC12 OSC1 20MHz XTAL (Y2) + 38 Vdd +3.3V --- + 37 D+/RG2 APPS_D+ USB connectors via PHY + 36 D-/RG3 APPS_D- USB connectors via PHY + 35 Vusb +3.3V --- + 34 Vbus VBUS_DEVICE_MODE Display, USB Mini-B, USB Type A, JP1-1, +5V + 33 USBID/RF3 N/C Not connected + + TOP SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) + PIN NAME SIGNAL NOTES + ---- ----------------------------- -------------- ------------------------------- + 64 PMPD4/RE4 PMPD4 Display, JP1-11, DB4 + 63 PMPD3/RE3 PMPD3 Display, JP1-10, DB3 + 62 PMPD2/RE2 PMPD2 Display, JP1-9, DB2 + 61 PMPD1/RE1 PMPD1 Display, JP1-8, DB1 + 60 PMPD0/RE0 PMPD0 Display, JP1-7, DB0 + 59 RF1 RF1 Low illuminates LED/R/ERR + 58 RF0 RF0 Low illuminates LED/Y/flash + 57 ENVREG ENVREG Pulled high + 56 Vcap/Vddcore VDDCORE Capactors to ground + 55 CN16/RD7 RD7 Low illuminates LED/Y/USB + 54 CN15/RD6 RD6 Low illuminates LED/Y/SD + 53 PMRD/CN14/RD5 PMPRD Display, JP1-5, R/W + 52 OC5/IC5/PMWR/CN13/RD4 N/C Not connected + 51 U1TX/OC4/RD3 CP2102_RXD J6-3, UART1 (also CP2102*) + 50 U1RX/OC3/RD2 CP2102_TXD J6-2, UART1 (also CP2102*) + 49 U1RTS/OC2/RD1 PWM2 Used to control backlight level (Vo) + + *USB-to-UART bridge (U1, CP2102) not populated + + DB-DP11212 PIC32 General Purpose Demo Board + ------------------------------------------- + PIC32MX440F512H 64-Pin QFN (USB) Pin Out as used on the DB-DP11212 PIC32 General + Purpose Demo Board + + LEFT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) + PIN NAME SIGNAL NOTES + ---- ----------------------------- -------------- ------------------------------- + 1 PMD5/RE5 PMPD5 Display, JP1-12, DB5 + 2 PMD6/RE6 PMPD6 Display, JP1-13, DB6 + 3 PMD7/RE7 PMPD7 Display, JP1-14, DB7 + 4 SCK2/PMA5/CN8/RG6 SCK FLASH (U4) SCK* + 5 SDI2/PMA4/CN9/RG7 SDI FLASH (U4) SO* + 6 SDO2/PMA3/CN10/RG8 SDO FLASH (U4) SI* + 7 MCLR\ PIC_MCLR Pulled high, J2-1, ICSP + 8 SS2/PMA2/CN11/RG9 N/C Not connected + 9 Vss Grounded + 10 Vdd +3.3V --- + 11 Vbuson/AN5/CN7/RB5 RB5 LCD SEG5 (F), U5-10 + 12 AN4/CN6/RB4 RB4 LCD SEG4 (E), U5-1 + 13 AN3/CN5/RB3 RB3 LCD SEG3 (D), U5-2 + 14 AN2/CN4/RB2 RB2 LCD SEG2 (C), U5-4 + 15 PGEC1/AN1/Vref-/CN3/RB1 RB1 LCD SEG1 (B), U5-7 + 16 PGED1/AN0/VREF+/CVREF+/PMA6/ RB0 LCD SEG0 (A), U5-11 + CN2/RB0 + + *FLASH (U4, SOIC) not populated + + BOTTOM SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) + PIN NAME SIGNAL NOTES + ---- ----------------------------- -------------- ------------------------------- + 17 PGEC2/AN6/OCFA/RB6 PIC_PGC2 J2-5, ICSP + 18 PGED2/AN7/RB7 PIC_PGD2 J2-4, ICSP + 19 AVdd +3.3V --- + 20 AVss Grounded + 21 AN8/U2CTS/RB8 RB8 LCD SEG6 (G), U5-5 + 22 AN9/PMA7/RB9 RB9 LCD SEG7 (DP), U5-3 + 23 TMS/AN10/PMA13/RB10 UTIL_WP FLASH (U4) WP* + 24 TDO/AN11/PMA12/RB11 UTIL_CS FLASH (U4) CS* + 25 Vss Grounded + 26 Vdd +3.3V --- + 27 TCK/AN12/PMA11/RB12 N/C Not connected + 28 TDI/AN13/PMA10/RB13 N/C Not connected + 29 AN14/U2RTS/PMA1/RB14 temp_AD temp_AD + 30 AN15/PMA0/CN12/RB15 PMPA0 Display, JP1-4, RS + 31 SDA2/U2RX/PMA9/CN17/RF4 SDA LM75/SO, U3-1, SDA + 32 SCL2/U2TX/PMA8/CN18/RF5 SCL LM75/SO, U3-2, SCL + + *FLASH (U4, SOIC) not populated + + RIGHT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) + PIN NAME SIGNAL NOTES + ---- ----------------------------- -------------- ------------------------------- + 48 SOSCO/T1CK/CN0/RC14 SOSCO 32.768KHz XTAL (Y1) + 47 SOSCI/CN1/RC13 SOSCI 32.768KHz XTAL (Y1) + 46 OC1/INT0/RD0 RD0 LCD DIG1, U5-12 + 45 IC4/PMCS1/PMA14/RD11 PMCS1 Display, JP1-6, E + 44 SCL1/PMCS2/PMA15 RD10 LCD DIG2, U5-9 + 43 SDA1/RD9 RD9 LCD DIG3, U5-8 + 42 RTCC/RD8 RD8 LCD DIG4, U5-6 + 41 Vss Grounded + 40 OSC2/CLKO/RC15 OSC2 20MHz XTAL (Y2) + 39 OSC1/CLKI/RC12 OSC1 20MHz XTAL (Y2) + 38 Vdd +3.3V --- + 37 D+ MCU_D+ USB connectors via PHY + 36 D- MCU_D- USB connectors via PHY + 35 Vusb +3.3V --- + 34 Vbus +5V_DUSB Display, USB Mini-B, USB Type A, JP1-1, +5V + 33 USBID/RF3 N/C Not connected + + TOP SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) + PIN NAME SIGNAL NOTES + ---- ----------------------------- -------------- ------------------------------- + 64 PMPD4/RD4 PMPD4 Display, JP1-11, DB4 + 63 PMPD3/RD3 PMPD3 Display, JP1-10, DB3 + 62 PMPD2/RD2 PMPD2 Display, JP1-9, DB2 + 61 PMPD1/RD1 PMPD1 Display, JP1-8, DB1 + 60 PMPD0/RE0 PMPD0 Display, JP1-7, DB0 + 59 RF1 Key3 SW3-1 + 58 RF0 Key2 SW2-1 + 57 ENVREG ENVREG Pulled high + 56 Vcap/Vddcore VDDCORE Capacitors to ground + 55 CN16/RD7 N/C Not connected + 54 CN15/RD6 Key5 SW5-1 + 53 PMRD/CN14/RD5 PMPRD --- + 52 OC5/PMWR/CN13/RD4 PWM2 Used to control backlight level (Vo) + 51 U1TX/OC4/RD3 N/C Not connected + 50 U1RX/OC3/RD2 N/C Not connected + 49 OC2/RD1 PWM1 Used to control backlight level (K) + +Toolchains +========== + + MPLAB/C32 + --------- + + I am using the free, "Lite" version of the PIC32MX toolchain available + for download from the microchip.com web site. I am using the Windows + version. The MicroChip toolchain is the only toolchain currently + supported in these configurations, but it should be a simple matter to + adapt to other toolchains by modifying the Make.defs file include in + each configuration. + + C32 Toolchain Options: + + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW - MicroChip full toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL - MicroChip full toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE - MicroChip "Lite" toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_LITE - MicroChip "Lite" toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_PINGUINOL - Pinquino toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_PINGUINOW - Pinquino toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPOPENL - Microchip open toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_GNU_ELF - General mips-elf toolchain for Linux + + NOTE: The "Lite" versions of the toolchain does not support C++. Also + certain optimization levels are not supported by the "Lite" toolchain. + + MicrochipOpen + ------------- + + An alternative, build-it-yourself toolchain is available here: + http://sourceforge.net/projects/microchipopen/ . These tools were + last updated circa 2010. NOTE: C++ support still not available + in this toolchain. + + Building MicrochipOpen (on Linux) + + 1) Get the build script from this location: + + http://microchipopen.svn.sourceforge.net/viewvc/microchipopen/ccompiler4pic32/buildscripts/trunk/ + + 2) Build the code using the build script, for example: + + ./build.sh -b v105_freeze + + This will check out the selected branch and build the tools. + + 3) Binaries will then be available in a subdirectory with a name something like + pic32-v105-freeze-20120622/install-image/bin (depending on the current data + and the branch that you selected. + + Note that the tools will have the prefix, mypic32- so, for example, the + compiler will be called mypic32-gcc. + + Penguino mips-elf Toolchain + --------------------------- + + Another option is the mips-elf toolchain used with the Penguino project. This + is a relatively current mips-elf GCC and should provide free C++ support as + well. This toolchain can be downloded from the Penguino website: + http://wiki.pinguino.cc/index.php/Main_Page#Download . There is some general + information about using the Penguino mips-elf toolchain in this thread: + https://groups.yahoo.com/neo/groups/nuttx/conversations/messages/1821 + + See also configs/mirtoo/README.txt. There is an experimental (untested) + configuration for the Mirtoo platform in that directory. + + MPLAB/C32 vs MPLABX/X32 + ----------------------- + + It appears that Microchip is phasing out the MPLAB/C32 toolchain and replacing + it with MPLABX and XC32. At present, the XC32 toolchain is *not* compatible + with the NuttX build scripts. Here are some of the issues that I see when trying + to build with XC32: + + 1) Make.def changes: You have to change the tool prefix: + + CROSSDEV=xc32- + + 2) debug.ld/release.ld: The like expect some things that are not present in + the current linker scripts (or are expected with different names). Here + are some partial fixes: + + Rename: kseg0_progmem to kseg0_program_mem + Rename: kseg1_datamem to kseg1_data_mem + + Even then, there are more warnings from the linker and some undefined symbols + for non-NuttX code that resides in the unused Microchip libraries. See this + email thread at https://groups.yahoo.com/neo/groups/nuttx/conversations/messages/1458 for more + information. You will have to solve at least this undefined symbol problem if + you want to used the XC32 toolchain. + + Windows Native Toolchains + ------------------------- + + NOTE: There are several limitations to using a Windows based toolchain in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + +Loading NuttX with PICkit2 +========================== + + NOTE: You need a PICKit3 if you plan to use the MPLAB debugger! The PICKit2 + can, however, still be used to load programs. Instructions for the PICKit3 + are similar. + + Intel Hex Forma Files: + ---------------------- + + When NuttX is built it will produce two files in the top-level NuttX + directory: + + 1) nuttx - This is an ELF file, and + 2) nuttx.hex - This is an Intel Hex format file. This is controlled by + the setting CONFIG_INTELHEX_BINARY in the .config file. + + The PICkit tool wants an Intel Hex format file to burn into FLASH. However, + there is a problem with the generated nutt.hex: The tool expects the nuttx.hex + file to contain physical addresses. But the nuttx.hex file generated from the + top-level make will have address in the KSEG0 and KSEG1 regions. + + tools/pic32mx/mkpichex: + ---------------------- + + There is a simple tool in the NuttX tools/pic32mx directory that can be + used to solve both issues with the nuttx.hex file. But, first, you must + build the tool: + + cd tools/pic32mx + make + + Now you will have an excecutable file call mkpichex (or mkpichex.exe on + Cygwin). This program will take the nutt.hex file as an input, it will + convert all of the KSEG0 and KSEG1 addresses to physical address, and + it will write the modified file, replacing the original nuttx.hex. + + To use this file, you need to do the following things: + + . ./setenv.sh # Source setenv.sh. Among other this, this script + # will add the NuttX tools/pic32mx directory to your + # PATH variable + make # Build nuttx and nuttx.hex + mkpichex $PWD # Convert addresses in nuttx.hex. $PWD is the path + # to the top-level build directory. It is the only + # required input to mkpichex. + +LCD1602 +======= + + The on-board LCD is a 2x16 segment LCD and appears to be compatible with + the LCD1602 and is like an LCD1602 LCD here. + + LCD pin mapping (see configs/pcblogic-pic32mx/README.txt) + + --------------------- ---------- ---------------------------------- + PIC32 Sure JP1 Sure Signal Description + PIN SIGNAL NAME PIN NAME(s) + --------------------- ---------- ---------------------------------- + 34 Vbus 1. +5V +5V VBUS device mode + To GND via capacitor + 2. GND GND + 49 RD1 3. Vo Transistor circuit driven by PWM2 + 44 PMA0/AN15/RB15 4. RS PMA0, Selects registers + 53 PMRD/RD5 5. RW PMRD/PMWR, Selects read or write + 45 PMPCS1/RD11 6. E Starts data read/write + 60 PMD0/RE0 7. DB0 PMD0 + 61 PMD1/RE1 8. DB1 PMD1 + 62 PMD2/RE2 9. DB2 PMD2 + 63 PMD3/RE3 10. DB3 PMD3 + 64 PMD4/RE4 11. DB4 PMD4 + 1 PMD5/RE5 12. DB5 PMD5 + 2 PMD6/RE6 13. DB6 PMD6 + 3 PMD7/RE7 14. DB7 PMD7 + 15. A +5V_DUSB + 46 INT0/RD0 16. K Transistor circuit driven by PWM1 + --------------------- ---------- ---------------------------------- + + Vbus power also requires Vbuson/AN5/RB5 + +PIC32MX Configuration Options +============================= + + General Architecture Settings: + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=mips + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_MIPS=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_MIPS32=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=pic32mx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_PIC32MX440F512H=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=sure-pic32mx + + CONFIG_ARCH_DBDP11215 Distinguishes the DB_DP11215 PIC32 Storage + Demo Board + + CONFIG_ARCH_DBDP11212 Distingustes the DB-DP11212 PIC32 General + Purpose Demo Board + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_SUREPIC32MX=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0xa0000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + PIC32MX Configuration + + CONFIG_PIC32MX_MVEC - Select muli- vs. single-vectored interrupts + + Individual subsystems can be enabled: + + CONFIG_PIC32MX_WDT - Watchdog timer + CONFIG_PIC32MX_T2 - Timer 2 (Timer 1 is the system time and always enabled) + CONFIG_PIC32MX_T3 - Timer 3 + CONFIG_PIC32MX_T4 - Timer 4 + CONFIG_PIC32MX_T5 - Timer 5 + CONFIG_PIC32MX_IC1 - Input Capture 1 + CONFIG_PIC32MX_IC2 - Input Capture 2 + CONFIG_PIC32MX_IC3 - Input Capture 3 + CONFIG_PIC32MX_IC4 - Input Capture 4 + CONFIG_PIC32MX_IC5 - Input Capture 5 + CONFIG_PIC32MX_OC1 - Output Compare 1 + CONFIG_PIC32MX_OC2 - Output Compare 2 + CONFIG_PIC32MX_OC3 - Output Compare 3 + CONFIG_PIC32MX_OC4 - Output Compare 4 + CONFIG_PIC32MX_OC5 - Output Compare 5 + CONFIG_PIC32MX_I2C1 - I2C 1 + CONFIG_PIC32MX_I2C2 - I2C 2 + CONFIG_PIC32MX_SPI2 - SPI 2 + CONFIG_PIC32MX_UART1 - UART 1 + CONFIG_PIC32MX_UART2 - UART 2 + CONFIG_PIC32MX_ADC - ADC 1 + CONFIG_PIC32MX_PMP - Parallel Master Port + CONFIG_PIC32MX_CM1 - Comparator 1 + CONFIG_PIC32MX_CM2 - Comparator 2 + CONFIG_PIC32MX_RTCC - Real-Time Clock and Calendar + CONFIG_PIC32MX_DMA - DMA + CONFIG_PIC32MX_FLASH - FLASH + CONFIG_PIC32MX_USBDEV - USB device + CONFIG_PIC32MX_USBHOST - USB host + + PIC32MX Configuration Settings + DEVCFG0: + CONFIG_PIC32MX_DEBUGGER - Background Debugger Enable. Default 3 (disabled). The + value 2 enables. + CONFIG_PIC32MX_ICESEL - In-Circuit Emulator/Debugger Communication Channel Select + Default 1 (PG2) + CONFIG_PIC32MX_PROGFLASHWP - Program FLASH write protect. Default 0xff (disabled) + CONFIG_PIC32MX_BOOTFLASHWP - Default 1 (disabled) + CONFIG_PIC32MX_CODEWP - Default 1 (disabled) + DEVCFG1: (All settings determined by selections in board.h) + DEVCFG2: (All settings determined by selections in board.h) + DEVCFG3: + CONFIG_PIC32MX_USBIDO - USB USBID Selection. Default 1 if USB enabled + (USBID pin is controlled by the USB module), but 0 (GPIO) otherwise. + CONFIG_PIC32MX_VBUSIO - USB VBUSON Selection (Default 1 if USB enabled + (VBUSON pin is controlled by the USB module, but 0 (GPIO) otherwise. + CONFIG_PIC32MX_WDENABLE - Enabled watchdog on power up. Default 0 (watchdog + can be enabled later by software). + + The priority of interrupts may be specified. The value ranage of + priority is 4-31. The default (16) will be used if these any of these + are undefined. + + CONFIG_PIC32MX_CTPRIO - Core Timer Interrupt + CONFIG_PIC32MX_CS0PRIO - Core Software Interrupt 0 + CONFIG_PIC32MX_CS1PRIO - Core Software Interrupt 1 + CONFIG_PIC32MX_INT0PRIO - External Interrupt 0 + CONFIG_PIC32MX_INT1PRIO - External Interrupt 1 + CONFIG_PIC32MX_INT2PRIO - External Interrupt 2 + CONFIG_PIC32MX_INT3PRIO - External Interrupt 3 + CONFIG_PIC32MX_INT4PRIO - External Interrupt 4 + CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor + CONFIG_PIC32MX_T1PRIO - Timer 1 (System timer) priority + CONFIG_PIC32MX_T2PRIO - Timer 2 priority + CONFIG_PIC32MX_T3PRIO - Timer 3 priority + CONFIG_PIC32MX_T4PRIO - Timer 4 priority + CONFIG_PIC32MX_T5PRIO - Timer 5 priority + CONFIG_PIC32MX_IC1PRIO - Input Capture 1 + CONFIG_PIC32MX_IC2PRIO - Input Capture 2 + CONFIG_PIC32MX_IC3PRIO - Input Capture 3 + CONFIG_PIC32MX_IC4PRIO - Input Capture 4 + CONFIG_PIC32MX_IC5PRIO - Input Capture 5 + CONFIG_PIC32MX_OC1PRIO - Output Compare 1 + CONFIG_PIC32MX_OC2PRIO - Output Compare 2 + CONFIG_PIC32MX_OC3PRIO - Output Compare 3 + CONFIG_PIC32MX_OC4PRIO - Output Compare 4 + CONFIG_PIC32MX_OC5PRIO - Output Compare 5 + CONFIG_PIC32MX_I2C1PRIO - I2C 1 + CONFIG_PIC32MX_I2C2PRIO - I2C 2 + CONFIG_PIC32MX_SPI2PRIO - SPI 2 + CONFIG_PIC32MX_UART1PRIO - UART 1 + CONFIG_PIC32MX_UART2PRIO - UART 2 + CONFIG_PIC32MX_CN - Input Change Interrupt + CONFIG_PIC32MX_ADCPRIO - ADC1 Convert Done + CONFIG_PIC32MX_PMPPRIO - Parallel Master Port + CONFIG_PIC32MX_CM1PRIO - Comparator 1 + CONFIG_PIC32MX_CM2PRIO - Comparator 2 + CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor + CONFIG_PIC32MX_RTCCPRIO - Real-Time Clock and Calendar + CONFIG_PIC32MX_DMA0PRIO - DMA Channel 0 + CONFIG_PIC32MX_DMA1PRIO - DMA Channel 1 + CONFIG_PIC32MX_DMA2PRIO - DMA Channel 2 + CONFIG_PIC32MX_DMA3PRIO - DMA Channel 3 + CONFIG_PIC32MX_FCEPRIO - Flash Control Event + CONFIG_PIC32MX_USBPRIO - USB + + PIC32MXx specific device driver settings. NOTE: For the Sure board, + UART2 is brought out to the DB9 connector and serves as the serial + console. + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + PIC32MXx USB Device Configuration + + PIC32MXx USB Host Configuration (the PIC32MX does not support USB Host) + +Configurations +============== + + Each PIC32MX configuration is maintained in a sub-directory and can be + selected as follow: + + cd tools + ./configure.sh sure-pic32mx/ + cd - + . ./setenv.sh + + Where is one of the following sub-directories. + + NOTE: These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + +Configuration sub-directories +----------------------------- + +Where is one of the following: + + nsh: + ==== + Description. + ------------ + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables only the serial NSH interface. + + Notes. + ----- + 1. By default, this configuration uses an older Microchip C32 toolchain + for Windows (the newer ones seem to be incompatible) and builds under + Cygwin (or probably MSYS). That can easily be reconfigured, of course. + + Build Setup: + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + + System Type: + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE=y : Older C32 toolchain + + 2. USB Configuations. + + Several USB device configurations can be enabled and included + as NSH built-in built in functions. All require the following + basic setup in your .config to enable USB device support: + + Drivers: + CONFIG_USBDEV=y : Enable basic USB device support + + System Type -> PIC32MX Peripheral Support: + CONFIG_PIC32MX_USBDEV=y : Enable PIC32 USB device support + + examples/usbterm - This option can be enabled by adding the following + to the NuttX configuration file: + + Application Configuration->Examples: + CONFIG_EXAMPLES_USBTERM=y : Selects /apps/examples/usbterm + + And by enabling one of the USB serial devices: + + Drivers->USB Device Driver Support + CONFIG_PL2303=y : Enable the Prolifics PL2303 emulation + CONFIG_CDCACM=y : or the CDC/ACM serial driver (not both) + + system/cdcacm - The system/cdcacm program can be included as an + function by dding the following to the NuttX configuration file: + + Application Configuration->Examples: + CONFIG_SYSTEM_CDCACM=y : Select apps/system/cdcacm + + and defining the following in your .config file: + + Drivers->USB Device Driver Support + CONFIG_CDCACM=y : Enable the CDCACM device + + system/usbmsc - To enable the USB mass storage class (MSC)device, + you would need to add the following to the NuttX configuration file. + However, this device cannot work until support for the SD card is + also incorporated. + + Drivers->USB Device Driver Support + CONFIG_USBMSC=y : Enables the USB MSC class + + Application Configuration->Examples: + CONFIG_SYSTEM_USBMSC=y : Enhables apps/system/usbmsc + + 3. SD Card Support. + + Support for the on-board, SPI-based SD card is available but is + not yet functional (at least at the time of this writing). SD + card support can be enabled for testing by simply enabling SPI2 + support in the configuration file: + + System Type -> PIC32MX Peripheral Support: + CONFIG_PIC32MX_SPI2=y : Enable SPI2 + + Drivers: + CONFIG_MMCSD=y : MMC/SD support + CONFIG_MMCSD_SPI=y : SPI-based MMC/SD support + + File Systems: + CONFIG_FS_FAT=y : FAT file system + : Other FAT options + + Debug output for testing the SD card can be enabled using: + + Build Setup: + CONFIG_DEBUG=y : Enable debug features + CONFIG_DEBUG_VERBOSE=y : Enable verbose debug output + CONFIG_DEBUG_FS=y : Enable file system debug + CONFIG_DEBUG_SPI=y : Enable SPI debug + + 4. To enable LCD1602 support: + + Device Drivers ->LCD Driver Support: + CONFIG_LCD=y : Enable LCD menus + CONFIG_LCD_LCD1602=y : Select LCD1602 + CONFIG_LCD_MAXCONTRAST=255 : (Or any large-ish value that you prefer) + CONFIG_LCD_MAXPOWER=255 : (Or any large-ish value that you prefer) + + Library Routines: + CONFIG_LIB_SLCDCODEC=y : Enable the SLCD CODEC + + NOTE that is is not necessary to select the PMP peripheral; this LCD + driver is a bit-bang driver that just happens to use the PMP pins as + GPIOS. + + To enable apps/examples/slcd to test the LCD: + + Application Configuration -> NSH Library: + CONFIG_NSH_ARCHINIT=y : Needed to initialize the SLCD + + Application Configuration -> Examples: + CONFIG_EXAMPLES_SLCD=y : Enable apps/examples/slcd use /dev/lcd1602 + CONFIG_EXAMPLES_SLCD_DEVNAME="/dev/lcd1602" + + To enable LCD debug output: + + Build Setup -> Debug Options: + CONFIG_DEBUG=y : Enable debug features + CONFIG_DEBUG_VERBOSE=y : Enable verbose debug output + CONFIG_DEBUG_LCD=y : Enable LCD debug output + + NOTES: + 2013-05-27: The LCD1602 has been verified on the DB-DP11212 using + this configuration. It has not been used with the usbnsh configuration + or with the DB-11112 board. It looks to me like the connection to the + LCD1602 is identical on the DB-11112 and so I would expect that to work. + + At this point in time, testing of the SLCD is very limited because + there is not much in apps/examples/slcd. Basically driver with a working + test setup and ready to be tested and debugged. + + usbnsh: + ======= + Description. + ------------ + This is another NSH example. If differs from the 'nsh' configuration + above in that this configurations uses a USB serial device for console + I/O. This configuration was created to support the "DB-DP11212 PIC32 + General Purpose Demo Board" which has no easily accessible serial port. + However, as of this writing, the configuration has set for the + "DB_DP11215 PIC32 Storage Demo Board" and has only be testing on that + board. + + Notes. + ----- + 1. By default, this configuration uses an older Microchip C32 toolchain + for Windows (the newer ones seem to be incompatible) and builds under + Cygwin (or probably MSYS). That can easily be reconfigured, of course. + + Build Setup: + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + + System Type: + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE=y : Older C32 toolchain + + 2. Comparison to nsh + + Below summarizes the key configuration differences between the 'nsh' + and the 'upnsh' configurations: + + CONFIG_USBDEV=y : NuttX USB device support is enabled + CONFIG_PIC32MX_USBDEV=y : The PIC32MX USB device driver is built + CONFIG_DEV_CONSOLE=n : /dev/console does not exist on power up + CONFIG_UART1_SERIAL_CONSOLE=n : There is no serial console + CONFIG_UART2_SERIAL_CONSOLE=n : + CONFIG_CDCACM=y : The CDC/ACM serial device class is enabled + CONFIG_CDCACM_CONSOLE=y : The CDC/ACM serial device is the console + + 3. Using the Prolifics PL2303 Emulation + + You could also use the non-standard PL2303 serial device instead of + the standard CDC/ACM serial device by changing: + + Drivers->USB Device Driver Support + CONFIG_CDCACM=n : Disable the CDC/ACM serial device class + CONFIG_CDCACM_CONSOLE=n : The CDC/ACM serial device is NOT the console + CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled + CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console + + Why would you want to use a non-standard USB serial driver? You might + to use the PL2303 driver with a Windows host because it should + automatically install the PL2303 driver (you might have to go through + some effort to get Windows to recognize the CDC/ACM device). + + 4. Since this configuration is current set for the "DB_DP11215 PIC32 + Storage Demo Board," UART2 is available and is configured to used as + the SYSLOG device. That means that all debug output will be directed + out UART2. Debug output is not enabled by default, however, so these + settings do nothing until you enable debug ouput. + + Device Drivers -> System Logging Device Options: + CONFIG_SYSLOG=y : Configure SYSLOG output + CONFIG_SYSLOG_CHAR=y + CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" + + System Type -> PIC32MX Peripheral Support: + CONFIG_PIC32MX_UART2=y : Enable UART2 + + Device Drivers -> Serial Driver Support: + CONFIG_UART2_2STOP=0 : UART2 configuration + CONFIG_UART2_BAUD=115200 + CONFIG_UART2_BITS=8 + CONFIG_UART2_PARITY=0 + CONFIG_UART2_RXBUFSIZE=64 + CONFIG_UART2_TXBUFSIZE=64 + + NOTE: Using the SYSLOG to get debug output has limitations. Among + those are that you cannot get debug output from interrupt handlers. + So, in particularly, debug output is not a useful way to debug the + USB device controller driver. Instead, use the USB monitor with + USB debug off and USB trance on (see below). + + 5. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB + device will save encoded trace output in in-memory buffer; if the + USB monitor is enabled, that trace buffer will be periodically + emptied and dumped to the system logging device (UART2 in this + configuration): + + Device Drivers -> "USB Device Driver Support: + CONFIG_USBDEV_TRACE=y : Enable USB trace feature + CONFIG_USBDEV_TRACE_NRECORDS=256 : Buffer 256 records in memory + + Application Configuration -> NSH LIbrary: + CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH + CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor + + Application Configuration -> System NSH Add-Ons: + CONFIG_SYSTEM_USBMONITOR=y : Enable the USB monitor daemon + CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size + CONFIG_SYSTEM_USBMONITOR_PRIORITY=50 : USB monitor daemon priority + CONFIG_SYSTEM_USBMONITOR_INTERVAL=1 : Dump trace data every second + CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y : Enable TRACE output + CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y + CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y + CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y + CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y + + NOTE: USB debug output also be enabled in this case. Both will appear + on the serial SYSLOG output. However, the debug output will be + asynchronous with the trace output and, hence, difficult to interpret. + + 6. If you want to try this configuration on the DB-DP11212 PIC32 General + Purpose Demo Board", here are the changes that you should make: + + Board Configuration: + CONFIG_ARCH_DBDP11215=n : Disable the DB-DP11215 + CONFIG_ARCH_DBDP11212=y : Enable the DB-DP11212 + CONFIG_ARCH_LEDS=n : The DB-DP11212 has no LEDs + + System Type -> PIC32MX Peripheral Support: + CONFIG_PIC32MX_UART2=n : Disable UART2 + + The SYSLOG output on UART2 cannot by used. You have two choices, + first, you can simply disable the SYSLOG device. Then 1) debug + output will come the USB console, and 2) all debug output prior + to connecting the USB console will be lost: + + Device Drivers -> System Logging Device Options: + CONFIG_SYSLOG=n : Disable SYSLOG output + + The second options is to configure a RAM SYLOG device. This is + a circular buffer that accumulated debug output in memory. The + contents of the circular buffer can be dumped from the NSH command + line using the 'dmesg' command. + + Device Drivers -> System Logging Device Options: + CONFIG_SYSLOG=y : Enables the System Logging feature. + CONFIG_RAMLOG=y : Enable the RAM-based logging feature. + CONFIG_RAMLOG_CONSOLE=n : (there is no default console device) + CONFIG_RAMLOG_SYSLOG=y : This enables the RAM-based logger as the + system logger. + + Logging is currently can be set up to use any amount of memory (here 8KB): + + CONFIG_RAMLOG_BUFSIZE=8192 + + STATUS: + 2013-7-4: This configuration was last verified. + + 7. See the notes for the nsh configuration. Most also apply to the usbnsh + configuration as well. diff --git a/configs/sure-pic32mx/include/board.h b/configs/sure-pic32mx/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..9c533460049cb54206ceb6b4e18dee7df6d5c539 --- /dev/null +++ b/configs/sure-pic32mx/include/board.h @@ -0,0 +1,178 @@ +/**************************************************************************** + * configs/sure-pic32mx/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_SURE_PIC32MX_INCLUDE_BOARD_H +#define __CONFIGS_SURE_PIC32MX_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Clocking *****************************************************************/ +/* Crystal frequencies */ + +#define BOARD_POSC_FREQ 20000000 /* Primary OSC XTAL frequency (20MHz) */ +#define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */ + +/* Oscillator modes */ + +#define BOARD_FNOSC_POSCPLL 1 /* Use primary oscillator w/PLL */ +#define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */ + +/* PLL configuration and resulting CPU clock. + * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV + */ + +#define BOARD_PLL_INPUT BOARD_POSC_FREQ +#define BOARD_PLL_IDIV 5 /* PLL input divider */ +#define BOARD_PLL_MULT 15 /* PLL multiplier */ +#define BOARD_PLL_ODIV 1 /* PLL output divider */ + +#define BOARD_CPU_CLOCK 60000000 /* CPU clock (60MHz = (20MHz / 5) * 15 / 1) */ + +/* USB PLL configuration. + * USB_CLOCK = ((POSC_XTAL / IDIV) * 24) / 2 + */ + +#define BOARD_UPLL_IDIV 5 /* USB PLL divider */ +#define BOARD_USB_CLOCK 48000000 /* USB clock ((20MHz / 5) * 24) / 2 */ + +/* Peripheral clock is *not* divided down from CPU clock. + * PBCLOCK = CPU_CLOCK / PBDIV + */ + +#define BOARD_PBDIV 1 /* Peripheral clock divisor (PBDIV) */ +#define BOARD_PBCLOCK 60000000 /* Peripheral clock (PBCLK = 60MHz/1) */ + +/* Watchdog pre-scaler (re-visit) */ + +#define BOARD_WD_ENABLE 0 /* Watchdog is disabled */ +#define BOARD_WD_PRESCALER 8 /* Watchdog pre-scaler */ + +/* Timer 1 is a type A timer and is used as system clock. It can be clocked + * with either the SOSC or the PBCLOCK. We will use the PBCLOCK because it + * is much more accurate. + */ + +#undef BOARD_TIMER1_SOSC + +/* LED definitions **********************************************************/ +/* The Sure DB_DP11215 PIC32 Storage Demo Board board has five LEDs. One + * (D4, lablel "Power") is not controllable by software. Four are + * controllable by software: + * + * D7 "USB" Yellow RD7 Low illuminates + * D8 "SD" Yellow RD6 Low illuminates + * D9 "Flash" Yellow RF0 Low illuminates + * D10 "Error" Red RF1 Low illuminates + */ + /* ON OFF */ + /* USB SD FLASH ERROR USB SD FLASH ERROR */ +#define LED_STARTED 0 /* OFF OFF OFF OFF --- --- --- --- */ +#define LED_HEAPALLOCATE 1 /* ON OFF N/C N/C --- --- --- --- */ +#define LED_IRQSENABLED 2 /* OFF ON N/C N/C --- --- --- --- */ +#define LED_STACKCREATED 3 /* ON ON N/C N/C --- --- --- --- */ +#define LED_INIRQ 4 /* N/C N/C ON N/C N/C N/C OFF N/C */ +#define LED_SIGNAL 4 /* N/C N/C ON N/C N/C N/C OFF N/C */ +#define LED_ASSERTION 4 /* N/C N/C ON N/C N/C N/C OFF N/C */ +#define LED_PANIC 5 /* N/C N/C N/C ON N/C N/C N/C OFF */ +#define LED_NVALUES 6 + +/* The Sure DB-DP11212 PIC32 General Purpose Demo Board does not have any user + * controllable LEDs, but does does have a segment LED display. That display is + * however, obscured by the larger segment display attached to the board and, so, + * is not supported. + */ + +/* For distinguishing individual LEDs */ + +#define LED_USB 0 +#define LED_SD 1 +#define LED_FLASH 2 +#define LED_ERROR 3 + +/* Button Definitions *******************************************************/ +/* The Sure PIC32MX board has three buttons. + * + * SW1 (SW_UP, left arrow) RB3 Pulled high, Grounded/low when depressed + * SW2 (SW_DOWN, down/right arrow) RB2 Pulled high, Grounded/low when depressed + * SW3 (SW_OK, right arrow) RB4 Pulled high, Grounded/low when depressed + */ + +#define BUTTON_SW1 0 +#define BUTTON_SW2 1 +#define BUTTON_SW3 2 +#define NUM_BUTTONS 3 + +#define BUTTON_SW1_BIT (1 << BUTTON_SW1) +#define BUTTON_SW2_BIT (1 << BUTTON_SW2) +#define BUTTON_SW3_BIT (1 << BUTTON_SW3) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SURE_PIC32MX_INCLUDE_BOARD_H */ diff --git a/configs/sure-pic32mx/nsh/Make.defs b/configs/sure-pic32mx/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..430f95a8f08708a058dcdf5bdbbea7e791d8d40a --- /dev/null +++ b/configs/sure-pic32mx/nsh/Make.defs @@ -0,0 +1,100 @@ +############################################################################ +# configs/sure-pic32mx/nsh/Make.defs +# +# Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/mips/src/mips32/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/sure-pic32mx/nsh/defconfig b/configs/sure-pic32mx/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..5db19ac5c00a58aedf1132870883be34bbb358fb --- /dev/null +++ b/configs/sure-pic32mx/nsh/defconfig @@ -0,0 +1,862 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +CONFIG_ARCH_MIPS=y +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="mips" +CONFIG_ARCH_FAMILY="mips32" +CONFIG_ARCH_CHIP="pic32mx" +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_CHIP_PIC32MX=y +# CONFIG_ARCH_CHIP_PIC32MZ is not set +CONFIG_ARCH_MIPS32=y +CONFIG_ARCH_MIPS_24KC=y +# CONFIG_ARCH_MIPS_M14K is not set +# CONFIG_ARCH_HAVE_MICROMIPS is not set + +# +# MIPS32 Configuration Options +# +# CONFIG_MIPS32_TOOLCHAIN_GNU_ELF is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_XC32 is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW is not set +CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE=y +# CONFIG_MIPS32_TOOLCHAIN_PINGUINOW is not set +# CONFIG_MIPS32_FRAMEPOINTER is not set + +# +# PIC32MX Configuration Options +# +# CONFIG_ARCH_CHIP_PIC32MX110F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX320F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX420F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX440F256H is not set +CONFIG_ARCH_CHIP_PIC32MX440F512H=y +# CONFIG_ARCH_CHIP_PIC32MX460F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX460F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX1 is not set +# CONFIG_ARCH_CHIP_PIC32MX2 is not set +# CONFIG_ARCH_CHIP_PIC32MX3 is not set +CONFIG_ARCH_CHIP_PIC32MX4=y +# CONFIG_ARCH_CHIP_PIC32MX5 is not set +# CONFIG_ARCH_CHIP_PIC32MX6 is not set +# CONFIG_ARCH_CHIP_PIC32MX7 is not set +# CONFIG_PIC32MX_MVEC is not set +# CONFIG_PIC32MX_SPI is not set +CONFIG_PIC32MX_T1=y + +# +# PIC32MX Peripheral Support +# +# CONFIG_PIC32MX_WDT is not set +# CONFIG_PIC32MX_T2 is not set +# CONFIG_PIC32MX_T3 is not set +# CONFIG_PIC32MX_T4 is not set +# CONFIG_PIC32MX_T5 is not set +# CONFIG_PIC32MX_IC1 is not set +# CONFIG_PIC32MX_IC2 is not set +# CONFIG_PIC32MX_IC3 is not set +# CONFIG_PIC32MX_IC4 is not set +# CONFIG_PIC32MX_IC5 is not set +# CONFIG_PIC32MX_OC1 is not set +# CONFIG_PIC32MX_OC2 is not set +# CONFIG_PIC32MX_OC3 is not set +# CONFIG_PIC32MX_OC4 is not set +# CONFIG_PIC32MX_OC5 is not set +# CONFIG_PIC32MX_I2C1 is not set +# CONFIG_PIC32MX_I2C2 is not set +# CONFIG_PIC32MX_I2C3 is not set +# CONFIG_PIC32MX_I2C4 is not set +# CONFIG_PIC32MX_I2C5 is not set +# CONFIG_PIC32MX_SPI1 is not set +# CONFIG_PIC32MX_SPI2 is not set +# CONFIG_PIC32MX_SPI3 is not set +# CONFIG_PIC32MX_SPI4 is not set +# CONFIG_PIC32MX_UART1 is not set +CONFIG_PIC32MX_UART2=y +# CONFIG_PIC32MX_UART3 is not set +# CONFIG_PIC32MX_UART4 is not set +# CONFIG_PIC32MX_UART5 is not set +# CONFIG_PIC32MX_UART6 is not set +# CONFIG_PIC32MX_ADC is not set +# CONFIG_PIC32MX_PMP is not set +# CONFIG_PIC32MX_CM1 is not set +# CONFIG_PIC32MX_CM2 is not set +# CONFIG_PIC32MX_CM3 is not set +# CONFIG_PIC32MX_RTCC is not set +# CONFIG_PIC32MX_DMA is not set +# CONFIG_PIC32MX_FLASH is not set +# CONFIG_PIC32MX_USBDEV is not set +# CONFIG_PIC32MX_USBHOST is not set +# CONFIG_PIC32MX_CAN1 is not set +# CONFIG_PIC32MX_CAN2 is not set +# CONFIG_PIC32MX_ETHERNET is not set +# CONFIG_PIC32MX_CTMU is not set + +# +# PIC32MX Peripheral Interrupt Priorities +# +CONFIG_PIC32MX_CTPRIO=16 +CONFIG_PIC32MX_CS0PRIO=16 +CONFIG_PIC32MX_CS1PRIO=16 +CONFIG_PIC32MX_INT0PRIO=16 +CONFIG_PIC32MX_INT1PRIO=16 +CONFIG_PIC32MX_INT2PRIO=16 +CONFIG_PIC32MX_INT3PRIO=16 +CONFIG_PIC32MX_INT4PRIO=16 +CONFIG_PIC32MX_T1PRIO=16 +CONFIG_PIC32MX_UART2PRIO=16 + +# +# Device Configuration 0 (DEVCFG0) +# +CONFIG_PIC32MX_DEBUGGER=2 +CONFIG_PIC32MX_ICESEL=1 +CONFIG_PIC32MX_PROGFLASHWP=0xff +CONFIG_PIC32MX_BOOTFLASHWP=1 +CONFIG_PIC32MX_CODEWP=1 + +# +# Device Configuration 1 (DEVCFG1) +# + +# +# Device Configuration 3 (DEVCFG3) +# +CONFIG_PIC32MX_USBIDO=0 +CONFIG_PIC32MX_VBUSIO=0 +# CONFIG_PIC32MX_WDENABLE is not set +CONFIG_PIC32MX_FETHIO=1 +CONFIG_PIC32MX_FMIIEN=1 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +CONFIG_ARCH_VECNOTIRQ=y +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5580 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0xa0000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SUREPIC32MX=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sure-pic32mx" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_ARCH_DBDP11215=y +# CONFIG_ARCH_DBDP11212 is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=22 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +CONFIG_ARCH_HAVE_UART2=y +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART2 Configuration +# +CONFIG_UART2_RXBUFSIZE=64 +CONFIG_UART2_TXBUFSIZE=64 +CONFIG_UART2_BAUD=115200 +CONFIG_UART2_BITS=8 +CONFIG_UART2_PARITY=0 +CONFIG_UART2_2STOP=0 +# CONFIG_UART2_IFLOWCONTROL is not set +# CONFIG_UART2_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sure-pic32mx/nsh/setenv.sh b/configs/sure-pic32mx/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..bba683609427b925d291151dd3942b5bd33590d3 --- /dev/null +++ b/configs/sure-pic32mx/nsh/setenv.sh @@ -0,0 +1,61 @@ +#!/bin/bash +# configs/sure-pic32mx/nsh/setenv.sh +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +# This is the Cygwin path to the location where I installed the MicroChip +# PIC32MX toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install a different version of if you install +# the Linux PIC32MX toolchain as well +export TOOLCHAIN_BIN="/cygdrive/c/MicroChip/mplabc32/v1.12/bin" + +# This is the path to the toosl subdirectory +export PIC32TOOL_DIR="${WD}/tools/pic32mx" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${PIC32TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/sure-pic32mx/scripts/ld.script b/configs/sure-pic32mx/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..0975477cce3eae57af97664bc55ff0dbcbf2335f --- /dev/null +++ b/configs/sure-pic32mx/scripts/ld.script @@ -0,0 +1,317 @@ +/**************************************************************************** + * configs/sure-pic32mx/nsh/ld.script + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MX440F512H has 512Kb of program FLASH at physical address + * 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 512K + + /* The PIC32MX440F512H has 12Kb of boot FLASH at physical address + * 0x1fc00000. The initial reset vector is in KSEG1, but all other + * accesses are in KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 8192-1168 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16 + + /* The PIC32MX440F512H has 32Kb of data memory at physical address + * 0x00000000. Since the PIC32MX has no data cache, this memory is + * always accessed through KSEG1. + * + * When used with MPLAB, we need to set aside 512 bytes of memory + * for use by MPLAB. + */ + + kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(pic32mx) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/sure-pic32mx/src/.gitignore b/configs/sure-pic32mx/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/sure-pic32mx/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/sure-pic32mx/src/Makefile b/configs/sure-pic32mx/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..8b3061a41778ae41ebc59bb035365a34bbca8fd3 --- /dev/null +++ b/configs/sure-pic32mx/src/Makefile @@ -0,0 +1,69 @@ +############################################################################ +# configs/sure-pic32mx/src/Makefile +# +# Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = pic32mx_boot.c pic32mx_spi.c + +# Only the DB_DP11215 PIC32 Storage Demo Board board has user controllable +# LEDs + +ifeq ($(CONFIG_ARCH_DBDP11215),y) +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += pic32mx_autoleds.c +endif +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += pic32mx_buttons.c +endif + +ifeq ($(CONFIG_PIC32MX_USBDEV),y) +CSRCS += pic32mx_usbdev.c +ifeq ($(CONFIG_EXAMPLES_USBTERM_DEVINIT),y) +CSRCS += pic32mx_usbterm.c +endif +endif + +ifeq ($(CONFIG_LCD_LCD1602),y) +CSRCS += pic32mx_lcd1602.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += pic32mx_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/sure-pic32mx/src/pic32mx_appinit.c b/configs/sure-pic32mx/src/pic32mx_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..6992300bd010591133462d14664c52e680412da1 --- /dev/null +++ b/configs/sure-pic32mx/src/pic32mx_appinit.c @@ -0,0 +1,406 @@ +/**************************************************************************** + * config/sure-pic32mx/src/pic32mx_appinit.c + * + * Copyright (C) 2011-2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + +#include "pic32mx.h" +#include "sure-pic32mx.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#define NSH_HAVE_MMCSD 1 +#define NSH_HAVE_USBHOST 1 +#define NSH_HAVE_USBMONITOR 1 + +/* Can't support MMC/SD if SPI2 is not enabled */ + +#ifndef CONFIG_PIC32MX_SPI2 +# undef NSH_HAVE_MMCSD +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef NSH_HAVE_MMCSD +#endif + +/* MMC/SD configuration */ + +#ifdef NSH_HAVE_MMCSD +# ifdef CONFIG_NSH_ARCHINIT +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 2 +# warning "The Sure PIC32MX MMC/SD is on SPI2" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 2 +# endif +# if !defined(CONFIG_NSH_MMCSDSLOTNO) || CONFIG_NSH_MMCSDSLOTNO != 0 +# error "The Sure PIC32MX MMC/SD has only one slot (0)" +# warning CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +# ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif +# else +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 2 +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# undef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +# endif +#endif + +/* USB Host */ + +#ifdef CONFIG_USBHOST +# ifndef CONFIG_PIC32MX_USBHOST +# warning "CONFIG_PIC32MX_USBHOST is not selected" +# undef CONFIG_USBHOST +# endif +#endif + +#ifdef CONFIG_PIC32MX_USBHOST +# ifndef CONFIG_USBHOST +# warning "CONFIG_USBHOST is not selected" +# undef CONFIG_PIC32MX_USBHOST +# endif +#endif + +#if !defined(CONFIG_USBHOST) || !defined(CONFIG_PIC32MX_USBHOST) +# undef NSH_HAVE_USBHOST +#endif + +#ifdef NSH_HAVE_USBHOST +# ifndef CONFIG_USBHOST_DEFPRIO +# define CONFIG_USBHOST_DEFPRIO 50 +# endif +# ifndef CONFIG_USBHOST_STACKSIZE +# ifdef CONFIG_USBHOST_HUB +# define CONFIG_USBHOST_STACKSIZE 1536 +# else +# define CONFIG_USBHOST_STACKSIZE 1024 +# endif +# endif +#endif + +/* USB Monitor */ + +/* Can't support USB device monitor if USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVE_USBMONITOR +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR) +# undef NSH_HAVE_USBMONITOR +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef NSH_HAVE_USBHOST +static struct usbhost_connection_s *g_usbconn; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nsh_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ****************************************************************************/ + +#ifdef NSH_HAVE_USBHOST +static int nsh_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + syslog(LOG_INFO, "nsh_waiter: Running\n"); + for (;;) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + syslog(LOG_INFO, "nsh_waiter: %s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + (void)CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/**************************************************************************** + * Name: nsh_sdinitialize + * + * Description: + * Initialize SPI-based microSD. + * + ****************************************************************************/ + +#ifdef NSH_HAVE_MMCSD +static int nsh_sdinitialize(void) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + spi = pic32mx_spibus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + ret = -ENODEV; + goto errout; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + /* The SPI should be in 8-bit (default) and mode2: CKP=1, CKE=0. + * The MMC/SD driver will control the SPI frequency. WARNING: + * this is not the right way to do this... this should be done + * the MMC/SD driver: Other device on SPI1 may need other mode + * settings. + */ + + SPI_SETMODE(spi, SPIDEV_MODE2); + + /* Bind the SPI port to the slot */ + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, + CONFIG_NSH_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, + CONFIG_NSH_MMCSDSLOTNO, ret); + goto errout; + } + + syslog(LOG_INFO, "Successfully bound SPI port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, + CONFIG_NSH_MMCSDSLOTNO); + return OK; + +errout: + return ret; +} +#else +# define nsh_sdinitialize() (OK) +#endif + +/**************************************************************************** + * Name: nsh_usbhostinitialize + * + * Description: + * Initialize USB Host + * + ****************************************************************************/ + +#ifdef NSH_HAVE_USBHOST +static int nsh_usbhostinitialize(void) +{ + int pid; + int ret; + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + syslog(LOG_INFO, "Register class drivers\n"); + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB mass storage class class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + + /* Then get an instance of the USB host interface */ + + syslog(LOG_INFO, "Initialize USB host\n"); + + g_usbconn = pic32_usbhost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + syslog(LOG_INFO, "Start nsh_waiter\n"); + + pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO, + CONFIG_USBHOST_STACKSIZE, + (main_t)nsh_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + return -ENODEV; +} +#else +# define nsh_usbhostinitialize() (OK) +#endif + +/**************************************************************************** + * Name: nsh_usbdevinitialize + * + * Description: + * Initialize SPI-based microSD. + * + ****************************************************************************/ + +#ifdef CONFIG_USBDEV +static int nsh_usbdevinitialize(void) +{ + /* The Sure board has no way to know when the USB is connected. So we + * will fake it and tell the USB driver that the USB is connected now. + */ + + pic32mx_usbattach(); + return OK; +} +#else +# define nsh_usbdevinitialize() (OK) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + int ret; + + /* Initialize the LCD1602 and register the device as /dev/lcd1602 */ + +#ifdef CONFIG_LCD_LCD1602 + ret = up_lcd1602_initialize(); + if (ret == OK) +#endif + { + /* Initialize SPI-based microSD */ + + ret = nsh_sdinitialize(); + } + + if (ret == OK) + { + /* Initialize USB host */ + + ret = nsh_usbhostinitialize(); + } + + if (ret == OK) + { + /* Initialize USB device */ + + ret = nsh_usbdevinitialize(); + } + +#ifdef NSH_HAVE_USBMONITOR + if (ret == OK) + { + /* Start the USB Monitor */ + + ret = usbmonitor_start(0, NULL); + } +#endif + + return ret; +} diff --git a/configs/sure-pic32mx/src/pic32mx_autoleds.c b/configs/sure-pic32mx/src/pic32mx_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..46cf61993e9beedaa1edbd106fa8419e04a54f84 --- /dev/null +++ b/configs/sure-pic32mx/src/pic32mx_autoleds.c @@ -0,0 +1,213 @@ +/**************************************************************************** + * configs/sure-pic32mx/src/pic32mx_leds.c + * + * Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "pic32mx.h" +#include "pic32mx-ioport.h" +#include "sure-pic32mx.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED Configuration ********************************************************/ +/* The Sure PIC32MX board has five LEDs. One (D4, lablel "Power") is not + * controllable by software. Four are controllable by software: + * + * D7 "USB" Yellow RD7 Low illuminates + * D8 "SD" Yellow RD6 Low illuminates + * D9 "Flash" Yellow RF0 Low illuminates + * D10 "Error" Red RF1 Low illuminates + * + * ON OFF + * USB SD FLASH ERROR USB SD FLASH ERROR + * LED_STARTED 0 OFF OFF OFF OFF --- --- --- --- + * LED_HEAPALLOCATE 1 ON OFF N/C N/C --- --- --- --- + * LED_IRQSENABLED 2 OFF ON N/C N/C --- --- --- --- + * LED_STACKCREATED 3 ON ON N/C N/C --- --- --- --- + * LED_INIRQ 4 N/C N/C ON N/C N/C N/C OFF N/C + * LED_SIGNAL 4 N/C N/C ON N/C N/C N/C OFF N/C + * LED_ASSERTION 4 N/C N/C ON N/C N/C N/C OFF N/C + * LED_PANIC 5 N/C N/C N/C ON N/C N/C N/C OFF + */ + +/* LED Management Definitions ***********************************************/ + +#define LED_OFF 0 +#define LED_ON 1 +#define LED_NC 2 + +/* Debug ********************************************************************/ + +#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_LEDS) +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# undef CONFIG_DEBUG_LEDS +# undef CONFIG_DEBUG_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private types + ****************************************************************************/ + +struct led_setting_s +{ + uint8_t usb : 2; + uint8_t sd : 2; + uint8_t flash : 2; + uint8_t error : 2; +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct led_setting_s g_ledonvalues[LED_NVALUES] = +{ + {LED_OFF, LED_OFF, LED_OFF, LED_OFF}, + {LED_ON, LED_OFF, LED_NC, LED_NC}, + {LED_OFF, LED_ON, LED_NC, LED_NC}, + {LED_ON, LED_ON, LED_NC, LED_NC}, + {LED_NC, LED_NC, LED_ON, LED_NC}, + {LED_NC, LED_NC, LED_NC, LED_ON}, +}; + +static const struct led_setting_s g_ledoffvalues[LED_NVALUES] = +{ + {LED_NC, LED_NC, LED_NC, LED_NC}, + {LED_NC, LED_NC, LED_NC, LED_NC}, + {LED_NC, LED_NC, LED_NC, LED_NC}, + {LED_NC, LED_NC, LED_NC, LED_NC}, + {LED_NC, LED_NC, LED_OFF, LED_NC}, + {LED_NC, LED_NC, LED_NC, LED_OFF} +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pic32mx_setleds + ****************************************************************************/ + +static void pic32mx_setleds(FAR const struct led_setting_s *setting) +{ + if (setting->usb != LED_NC) + { + pic32mx_gpiowrite(GPIO_USB_LED, setting->usb != LED_ON); + } + + if (setting->sd != LED_NC) + { + pic32mx_gpiowrite(GPIO_SD_LED, setting->sd != LED_ON); + } + + if (setting->flash != LED_NC) + { + pic32mx_gpiowrite(GPIO_FLASH_LED, setting->flash != LED_ON); + } + + if (setting->error != LED_NC) + { + pic32mx_gpiowrite(GPIO_ERROR_LED, setting->error != LED_ON); + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pic32mx_led_initialize + ****************************************************************************/ + +void pic32mx_led_initialize(void) +{ + /* Configure output pins */ + + pic32mx_configgpio(GPIO_USB_LED); + pic32mx_configgpio(GPIO_SD_LED); + pic32mx_configgpio(GPIO_FLASH_LED); + pic32mx_configgpio(GPIO_ERROR_LED); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led < LED_NVALUES) + { + pic32mx_setleds(&g_ledonvalues[led]); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led < LED_NVALUES) + { + pic32mx_setleds(&g_ledoffvalues[led]); + } +} +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/sure-pic32mx/src/pic32mx_boot.c b/configs/sure-pic32mx/src/pic32mx_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..969d86378976a8f30bc6b849cbd25b6a3a74665a --- /dev/null +++ b/configs/sure-pic32mx/src/pic32mx_boot.c @@ -0,0 +1,101 @@ +/************************************************************************************ + * configs/sure-pic32mx/src/pic32mx_boot.c + * + * Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "pic32mx.h" +#include "sure-pic32mx.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_boardinitialize + * + * Description: + * All PIC32MX architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void pic32mx_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) at least one SPI is enabled, and 2) the weak + * function pic32mx_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_PIC32MX_SPI2) + if (pic32mx_spidev_initialize) + { + pic32mx_spidev_initialize(); + } +#endif + + /* Configure the mini-B PHY on the Sure PIC32MX board for the USB device */ + +#if defined(CONFIG_PIC32MX_USBDEV) + if (pic32mx_usbdevinitialize) + { + pic32mx_usbdevinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + pic32mx_led_initialize(); +#endif +} diff --git a/configs/sure-pic32mx/src/pic32mx_buttons.c b/configs/sure-pic32mx/src/pic32mx_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..62e0330c410713711895d2fa9b634c0043232ada --- /dev/null +++ b/configs/sure-pic32mx/src/pic32mx_buttons.c @@ -0,0 +1,226 @@ +/**************************************************************************** + * configs/sure-pic32mx/src/pic32mx_buttons.c + * + * Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "pic32mx.h" +#include "pic32mx-ioport.h" +#include "pic32mx-adc.h" +#include "sure-pic32mx.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* The Sure DB_DP11215 PIC32 Storage Demo Board has three buttons. + * + * SW1 (SW_UP, left arrow) RB3 Pulled high, Grounded/low when depressed + * SW2 (SW_DOWN, down/right arrow) RB2 Pulled high, Grounded/low when depressed + * SW3 (SW_OK, right arrow) RB4 Pulled high, Grounded/low when depressed + * + * The Sure DB-DP11212 PIC32 General Purpose Demo Board also has three buttons, + * but these are connected differently: + * + * SW2-1 RF0 Pulled high, Grounded/low when depressed + * SW3-1 RF1 Pulled high, Grounded/low when depressed + * SW5-1 RD6 Pulled high, Grounded/low when depressed + * + * Internal pull-ups are not required since the LEDs are pull-up externally. + * Change notification interrupts are not *automatically* enabled. Change + * notification will be enabled when pic32mx_gpioattach() is called. + */ + +#ifdef CONFIG_ARCH_DBDP11215 +# define GPIO_SW1 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN3) +# define GPIO_SW2 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN2) +# define GPIO_SW3 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN4) +#else /* CONFIG_ARCH_DBDP11212 */ +# define GPIO_SW1 (GPIO_INPUT|GPIO_INT|GPIO_PORTF|GPIO_PIN0) +# define GPIO_SW2 (GPIO_INPUT|GPIO_INT|GPIO_PORTF|GPIO_PIN1) +# define GPIO_SW3 (GPIO_INPUT|GPIO_INT|GPIO_PORTD|GPIO_PIN6) +#endif + +/* Change notification numbers: + * RB3 -> CN5 + * RB2 -> CN2 + * RB4 -> CN6 + */ + +#define CN_SW1 5 +#define CN_SW2 2 +#define CN_SW3 6 + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Pin configuration for each button */ + +static const uint16_t g_buttonset[NUM_BUTTONS] = +{ + GPIO_SW1 GPIO_SW2, GPIO_SW3 +} + +/* Change notification number for each button */ + +#ifdef CONFIG_ARCH_IRQBUTTONS +static const uint8_t g_buttoncn[NUM_BUTTONS] = +{ + CN_SW1, CN_SW2, CN_SW3 +} +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure input pins */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + pic32mx_configgpio(g_buttonset[i]); + } + + /* Change AN2/AN3/AN4 to digital */ + + putreg32(0xffff, PIC32MX_ADC_CFG); +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int id; + + /* Configure input pins */ + + for (id = 0; id < NUM_BUTTONS; id++) + { + if (pic32mx_gpioread(g_buttonset[id])) + { + ret |= (1 << id); + } + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT and JOYSTICK_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + * Interrupts are automatically enabled when the button handler is attached and + * automatically disabled when the button handler is detached. + * + * When an interrupt occurs, it is due to a change on the GPIO input pin + * associated with the button. In that case, all attached change + * notification handlers will be called. Each handler must maintain state + * and determine if the unlying GPIO button input value changed. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id < NUM_BUTTONS) + { + pic32mx_gpioirqdisable(g_buttoncn[id]); + oldhandler = pic32mx_gpioattach(g_buttonset[id], g_buttoncn[id], irqhandler); + if (irqhandler != NULL) + { + pic32mx_gpioirqenable(g_buttoncn[id]); + } + } + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/sure-pic32mx/src/pic32mx_lcd1602.c b/configs/sure-pic32mx/src/pic32mx_lcd1602.c new file mode 100644 index 0000000000000000000000000000000000000000..8911d8dd841fb5d2d8f07f52f4614ef41d4089d7 --- /dev/null +++ b/configs/sure-pic32mx/src/pic32mx_lcd1602.c @@ -0,0 +1,1157 @@ +/**************************************************************************** + * configs/sure-pic32mx/src/pic32mx_lcd1602.c + * + * This logic supports the connection of an LCD1602 LCD to the PCB Logic + * PIC32MX board. The LCD1602 is based on the Hitachi HD44780U LCD + * controller + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* LCD pin mapping (see configs/sure-pic32mx/README.txt) + * + * --------------------- ---------- ---------------------------------- + * PIC32 Sure JP1 Sure Signal Description + * PIN SIGNAL NAME PIN NAME(s) + * --------------------- ---------- ---------------------------------- + * 34 Vbus 1. +5V +5V VBUS device mode + * To GND via capacitor + * 2. GND GND + * 49 RD1 3. Vo Transistor circuit driven by PWM2 + * 44 PMA0/AN15/RB15 4. RS PMA0, Selects registers + * 53 PMRD/RD5 5. RW PMRD/PMWR, Selects read or write + * 45 PMPCS1/RD11 6. E Starts data read/write + * 60 PMD0/RE0 7. DB0 PMD0 + * 61 PMD1/RE1 8. DB1 PMD1 + * 62 PMD2/RE2 9. DB2 PMD2 + * 63 PMD3/RE3 10. DB3 PMD3 + * 64 PMD4/RE4 11. DB4 PMD4 + * 1 PMD5/RE5 12. DB5 PMD5 + * 2 PMD6/RE6 13. DB6 PMD6 + * 3 PMD7/RE7 14. DB7 PMD7 + * 15. A +5V_DUSB + * 46 INT0/RD0 16. K Transistor circuit driven by PWM1 + * --------------------- ---------- ---------------------------------- + * + * Vbus power also requires Vbuson/AN5/RB5 + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include "pic32mx-ioport.h" +#include "pic32mx-int.h" +#include "pic32mx.h" +#include "sure-pic32mx.h" + +#ifdef CONFIG_LCD_LCD1602 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_LCD_MAXCONTRAST +# define CONFIG_LCD_MAXCONTRAST 100 +#endif + +#ifndef CONFIG_LCD_MAXPOWER +# define CONFIG_LCD_MAXPOWER 100 +#endif + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* The ever-present MIN/MAX macros ******************************************/ + +#ifndef MIN +# define MIN(a,b) (a < b ? a : b) +#endif + +#ifndef MAX +# define MAX(a,b) (a > b ? a : b) +#endif + +/* LCD **********************************************************************/ + +#define LCD_NROWS 2 +#define LCD_NCOLUMNS 16 +#define LCD_NCHARS (LCD_NROWS * LCD_NCOLUMNS) + +#define NOP __asm__ __volatile__ ("nop"); + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Private Type Definition + ****************************************************************************/ + +/* SLCD incoming stream structure */ + +struct lcd_instream_s +{ + struct lib_instream_s stream; + FAR const char *buffer; + ssize_t nbytes; +}; + +/* Global LCD state */ + +struct lcd1602_2 +{ + bool initialized; /* True: Completed initialization sequence */ + uint8_t currow; /* Current row */ + uint8_t curcol; /* Current column */ + uint8_t brightness; /* Current brightness */ +}; + +/**************************************************************************** + * Private Function Protototypes + ****************************************************************************/ +/* Debug */ + +#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE) +static void lcd_dumpstate(FAR const char *msg); +static void lcd_dumpstream(FAR const char *msg, + FAR const struct lcd_instream_s *stream); +#else +# define lcd_dumpstate(msg) +# define lcd_dumpstream(msg, stream) +#endif + +/* Internal functions */ + +static int lcd_getstream(FAR struct lib_instream_s *instream); +static void lcd_brightness(uint8_t brightness); +static void lcd_shortdelay(int delay); +static void lcd_wrcommand(uint8_t cmd); +static void lcd_wrdata(uint8_t data); +static uint8_t lcd_rddata(void); +static uint8_t lcd_readstatus(void); +static void lcd_waitbusy(void); +static uint8_t lcd_readch(uint8_t row, uint8_t column); +static void lcd_writech(uint8_t ch, uint8_t row, uint8_t column); +static void lcd_appendch(uint8_t ch); +static void lcd_action(enum slcdcode_e code, uint8_t count); + +/* Character driver operations */ + +static ssize_t lcd_read(FAR struct file *, FAR char *, size_t); +static ssize_t lcd_write(FAR struct file *, FAR const char *, size_t); +static int lcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg); +#ifndef CONFIG_DISABLE_POLL +static int lcd_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Character driver operations */ + +static const struct file_operations g_lcdops = +{ + 0, /* open */ + 0, /* close */ + lcd_read, /* read */ + lcd_write, /* write */ + 0, /* seek */ + lcd_ioctl /* ioctl */ +#ifndef CONFIG_DISABLE_POLL + , lcd_poll /* poll */ +#endif +}; + +/* This is the driver state structure */ + +static struct lcd1602_2 g_lcd1602; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lcd_dumpstate + ****************************************************************************/ + +#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE) +static void lcd_dumpstate(FAR const char *msg) +{ + uint8_t buffer[LCD_NCOLUMNS]; + uint8_t ch; + int row; + int column; + + lcdvdbg("%s:\n", msg); + lcdvdbg(" currow: %d curcol: %d\n", + g_lcd1602.currow, g_lcd1602.curcol); + + for (row = 0, column = 0; row < LCD_NROWS; ) + { + ch = lcd_readch(row, column); + buffer[column] = isprint(ch) ? ch : '.'; + if (++column >= LCD_NCOLUMNS) + { + lcdvdbg(" [%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c]\n", + buffer[0], buffer[1], buffer[2], buffer[3], + buffer[4], buffer[5], buffer[6], buffer[7], + buffer[8], buffer[9], buffer[10], buffer[11], + buffer[12], buffer[13], buffer[14], buffer[15]); + + column = 0; + row++; + } + } +} +#endif + +/**************************************************************************** + * Name: lcd_dumpstate + ****************************************************************************/ + +#if defined(CONFIG_DEBUG_LCD) && defined(CONFIG_DEBUG_VERBOSE) +static void lcd_dumpstream(FAR const char *msg, + FAR const struct lcd_instream_s *stream) +{ + lcdvdbg("%s:\n", msg); + lcdvdbg(" nget: %d nbytes: %d\n", + stream->stream.nget, stream->nbytes); + lib_dumpbuffer("STREAM", stream->buffer, stream->nbytes); +} +#endif + +/**************************************************************************** + * Name: lcd_getstream + * + * Description: + * Get one character from the keyboard. + * + ****************************************************************************/ + +static int lcd_getstream(FAR struct lib_instream_s *instream) +{ + FAR struct lcd_instream_s *lcdstream = (FAR struct lcd_instream_s *)instream; + + DEBUGASSERT(lcdstream && lcdstream->buffer); + if (lcdstream->nbytes > 0) + { + lcdstream->nbytes--; + lcdstream->stream.nget++; + return (int)*lcdstream->buffer++; + } + + return EOF; +} + +/**************************************************************************** + * Name: lcd_brightness + * + * Description: + * Enable for disable LCD lighting. + * + ****************************************************************************/ + +static void lcd_brightness(uint8_t brightness) +{ + /* The LIGHT and COMP pins are label PWM1 and PWM2 and so are obviously + * intended to support modulated outputs. However, here for simplicity, + * they are just treated as on/off discretes outputs. + */ + + if (brightness > 0) + { + /* Turn the LCD light on */ + + pic32mx_gpiowrite(GPIO_LCD_LIGHT, true); + NOP;NOP;NOP; + pic32mx_gpiowrite(GPIO_LCD_COMP, true); + NOP;NOP; + pic32mx_gpiowrite(GPIO_LCD_PWR, true); + } + else + { + /* Turn the LCD light off */ + + pic32mx_gpiowrite(GPIO_LCD_PWR, false); + pic32mx_gpiowrite(GPIO_LCD_COMP, false); + pic32mx_gpiowrite(GPIO_LCD_LIGHT, false); + } + + g_lcd1602.brightness = brightness; +} + +/**************************************************************************** + * Name: lcd_shortdelay + * + * Description: + * Small delays are needed to make some of the LCD operations work. + * + ****************************************************************************/ + +static void lcd_shortdelay(int delay) +{ + volatile int loop; + + /* On a 32MHz MCU, this should amount to about 300NS per loop */ + + while (delay-- > 0) + { + for (loop = 0; loop < 1; loop++) + { + NOP; + } + } +} + +/**************************************************************************** + * Name: lcd_wrcommand + * + * Description: + * Configure to write an LCD command + * + ****************************************************************************/ + +static void lcd_wrcommand(uint8_t cmd) +{ + /* Make sure that the LCD is available */ + + lcd_waitbusy(); + + /* Select DB0-15 as outputs (only DB-0-7 are actually used) */ + + putreg16(0, PIC32MX_IOPORTE_TRIS); + + /* Set up to write the commond */ + + pic32mx_gpiowrite(GPIO_LCD_RS, false); /* Select command */ + pic32mx_gpiowrite(GPIO_LCD_RW, false); /* Select write */ + lcd_shortdelay(2); + + pic32mx_gpiowrite(GPIO_LCD_E, true); /* Enable transfer */ + lcd_shortdelay(1); + + /* Write the command to the LCD */ + + putreg16(cmd, PIC32MX_IOPORTE_PORT); + lcd_shortdelay(1); + pic32mx_gpiowrite(GPIO_LCD_E, false); +} + +/**************************************************************************** + * Name: lcd_wrdata + * + * Description: + * Configure to read or write LCD data + * + ****************************************************************************/ + +static void lcd_wrdata(uint8_t data) +{ + /* Make sure that the LCD is available */ + + lcd_waitbusy(); + + /* Select DB0-15 as outputs (only DB-0-7 are actually used) */ + + putreg16(0, PIC32MX_IOPORTE_TRIS); + + /* Set up to write the data */ + + pic32mx_gpiowrite(GPIO_LCD_RS, true); /* Select data */ + pic32mx_gpiowrite(GPIO_LCD_RW, false); /* Select write */ + lcd_shortdelay(2); + + pic32mx_gpiowrite(GPIO_LCD_E, true); /* Enable transfer */ + lcd_shortdelay(1); + + /* Write the data to the LCD */ + + putreg16(data, PIC32MX_IOPORTE_PORT); /* Write the data */ + lcd_shortdelay(1); + pic32mx_gpiowrite(GPIO_LCD_E, false); +} + +/**************************************************************************** + * Name: lcd_rddata + * + * Description: + * Configure to read or write LCD data + * + ****************************************************************************/ + +static uint8_t lcd_rddata(void) +{ + /* Make sure that the LCD is available */ + + lcd_waitbusy(); + + /* Setup to read data */ + + pic32mx_gpiowrite(GPIO_LCD_RS, true); /* Select data */ + pic32mx_gpiowrite(GPIO_LCD_RW, true); /* Select read */ + lcd_shortdelay(2); + + pic32mx_gpiowrite(GPIO_LCD_E, true); /* Enable transfer */ + lcd_shortdelay(1); + + putreg16(0xff, PIC32MX_IOPORTE_TRISSET); /* Set DB0-7 as inputs */ + pic32mx_gpiowrite(GPIO_LCD_E, false); /* Disable transfer */ + + /* Read the data from the LCD */ + + return (uint8_t)getreg16(PIC32MX_IOPORTE_PORT); +} + +/**************************************************************************** + * Name: lcd_readstatus + * + * Description: + * Read the DDRAM address and busy bit. + * + ****************************************************************************/ + +static uint8_t lcd_readstatus(void) +{ + uint8_t status; + + /* Set up to read BUSY/AD information */ + + putreg16(0xff, PIC32MX_IOPORTE_TRISSET); /* Set DB0-7 as inputs */ + pic32mx_gpiowrite(GPIO_LCD_RS, false); /* Select command */ + pic32mx_gpiowrite(GPIO_LCD_RW, true); /* Select read */ + lcd_shortdelay(2); + + pic32mx_gpiowrite(GPIO_LCD_E, true); /* Enable transfer */ + lcd_shortdelay(1); + + /* Read the status from the LCD */ + + status = (uint8_t)getreg16(PIC32MX_IOPORTE_PORT); + lcd_shortdelay(1); + pic32mx_gpiowrite(GPIO_LCD_E, false); + + return status; +} + +/**************************************************************************** + * Name: lcd_waitbusy + * + * Description: + * Check LCD status and wait until the BUSY flag is no long set. + * + ****************************************************************************/ + +static void lcd_waitbusy(void) +{ + while ((lcd_readstatus() & HD4478OU_BF) != 0); +} + +/**************************************************************************** + * Name: lcd_readch + ****************************************************************************/ + +static uint8_t lcd_readch(uint8_t row, uint8_t column) +{ + uint8_t addr; + + /* Set the cursor position. Internally, the HD44780U supports a display + * size of up to 2x40 addressed as follows: + * + * Column 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ... 39 + * Row 0 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f ... 27 + * Ro1 1 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f ... 67 + */ + + addr = column; + if (row > 0) + { + addr |= HD4478OU_DDRAM_ROW1; + } + + lcd_wrcommand(HD4478OU_DDRAM_AD(addr)); + + /* And write the character here */ + + return lcd_rddata(); +} + +/**************************************************************************** + * Name: lcd_writech + ****************************************************************************/ + +static void lcd_writech(uint8_t ch, uint8_t row, uint8_t column) +{ + uint8_t addr; + + /* Set the cursor position. Internally, the HD44780U supports a display + * size of up to 2x40 addressed as follows: + * + * Column 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ... 39 + * Row 0 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f ... 27 + * Ro1 1 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f ... 67 + */ + + addr = column; + if (row > 0) + { + addr |= HD4478OU_DDRAM_ROW1; + } + + lcd_wrcommand(HD4478OU_DDRAM_AD(addr)); + + /* And write the character here */ + + lcd_wrdata(ch); +} + +/**************************************************************************** + * Name: lcd_appendch + ****************************************************************************/ + +static void lcd_appendch(uint8_t ch) +{ + if (g_lcd1602.curcol < LCD_NCOLUMNS) + { + lcd_writech(ch, g_lcd1602.currow, g_lcd1602.curcol); + g_lcd1602.curcol++; + } +} + +/**************************************************************************** + * Name: lcd_action + ****************************************************************************/ + +static void lcd_action(enum slcdcode_e code, uint8_t count) +{ + lcdvdbg("Action: %d count: %d\n", code, count); + lcd_dumpstate("BEFORE ACTION"); + + switch (code) + { + /* Erasure */ + + case SLCDCODE_BACKDEL: /* Backspace (backward delete) N characters */ + { + int tmp; + + /* If we are at the home position or if the count is zero, then ignore the action */ + + if (g_lcd1602.curcol < 1 || count < 1) + { + break; + } + + /* Otherwise, BACKDEL is like moving the cursor back N characters then doing a + * forward deletion. Decrement the cursor position and fall through. + */ + + tmp = (int)g_lcd1602.curcol - count; + if (tmp < 0) + { + tmp = 0; + count = g_lcd1602.curcol; + } + + /* Save the updated cursor positions */ + + g_lcd1602.curcol = tmp; + } + + case SLCDCODE_FWDDEL: /* DELete (forward delete) N characters moving text */ + if (count > 0) + { + int nchars; + int nmove; + int i; + + /* How many characters are to the right of the cursor position + * (including the one at the cursor position)? Then get the + * number of characters to move. + */ + + nchars = LCD_NCOLUMNS - g_lcd1602.curcol; + nmove = MIN(nchars, count) - 1; + + /* Move all characters after the current cursor position left by 'nmove' characters */ + + for (i = g_lcd1602.curcol + nmove; i < LCD_NCOLUMNS - 1; i++) + { + uint8_t ch = lcd_readch(g_lcd1602.currow, i); + lcd_writech(ch, g_lcd1602.currow, i - nmove); + } + + /* Erase the last 'nmove' characters on the display */ + + for (i = LCD_NCOLUMNS - nmove; i < LCD_NCOLUMNS; i++) + { + lcd_writech(' ', i, 0); + } + } + break; + + case SLCDCODE_ERASE: /* Erase N characters from the cursor position */ + if (count > 0) + { + int last; + int i; + + /* Get the last position to clear and make sure that the last + * position is on the SLCD. + */ + + last = g_lcd1602.curcol + count - 1; + if (last >= LCD_NCOLUMNS) + { + last = LCD_NCOLUMNS - 1; + } + + /* Erase N characters after the current cursor position left by one */ + + for (i = g_lcd1602.curcol; i < last; i++) + { + lcd_writech(' ', g_lcd1602.currow, i); + } + } + break; + + case SLCDCODE_CLEAR: /* Home the cursor and erase the entire display */ + { + /* Clear the display */ + + lcd_wrcommand(HD4478OU_CLEAR); + + /* And home the cursor */ + + g_lcd1602.currow = 0; + g_lcd1602.curcol = 0; + } + break; + + case SLCDCODE_ERASEEOL: /* Erase from the cursor position to the end of line */ + { + int i; + + /* Erase characters after the current cursor position to the end of the line */ + + for (i = g_lcd1602.curcol; i < LCD_NCOLUMNS; i++) + { + lcd_writech(' ', g_lcd1602.currow, i); + } + } + break; + + /* Cursor movement */ + + case SLCDCODE_HOME: /* Cursor home */ + { + g_lcd1602.currow = 0; + g_lcd1602.curcol = 0; + } + break; + + case SLCDCODE_END: /* Cursor end */ + { + g_lcd1602.curcol = LCD_NCOLUMNS - 1; + } + break; + + case SLCDCODE_LEFT: /* Cursor left by N characters */ + { + int tmp = (int)g_lcd1602.curcol - count; + + /* Don't permit movement past the beginning of the SLCD */ + + if (tmp < 0) + { + tmp = 0; + } + + /* Save the new cursor position */ + + g_lcd1602.curcol = (uint8_t)tmp; + } + break; + + case SLCDCODE_RIGHT: /* Cursor right by N characters */ + { + int tmp = (int)g_lcd1602.curcol + count; + + /* Don't permit movement past the end of the SLCD */ + + if (tmp >= LCD_NCOLUMNS) + { + tmp = LCD_NCOLUMNS - 1; + } + + /* Save the new cursor position */ + + g_lcd1602.curcol = (uint8_t)tmp; + } + break; + + case SLCDCODE_UP: /* Cursor up by N lines */ + { + int tmp = (int)g_lcd1602.currow - count; + + /* Don't permit movement past the top of the SLCD */ + + if (tmp < 0) + { + tmp = 0; + } + + /* Save the new cursor position */ + + g_lcd1602.currow = (uint8_t)tmp; + } + break; + + case SLCDCODE_DOWN: /* Cursor down by N lines */ + { + int tmp = (int)g_lcd1602.currow + count; + + /* Don't permit movement past the bottom of the SLCD */ + + if (tmp >= LCD_NROWS) + { + tmp = LCD_NROWS - 1; + } + + /* Save the new cursor position */ + + g_lcd1602.currow = (uint8_t)tmp; + } + break; + + case SLCDCODE_PAGEUP: /* Cursor up by N pages */ + case SLCDCODE_PAGEDOWN: /* Cursor down by N pages */ + break; /* Not supportable on this SLCD */ + + /* Blinking */ + + case SLCDCODE_BLINKSTART: /* Start blinking with current cursor position */ + case SLCDCODE_BLINKEND: /* End blinking after the current cursor position */ + case SLCDCODE_BLINKOFF: /* Turn blinking off */ + break; /* Not implemented */ + + /* These are actually unreportable errors */ + + default: + case SLCDCODE_NORMAL: /* Not a special keycode */ + break; + } + + lcd_dumpstate("AFTER ACTION"); +} + +/**************************************************************************** + * Name: lcd_read + ****************************************************************************/ + +static ssize_t lcd_read(FAR struct file *filep, FAR char *buffer, size_t len) +{ + uint8_t row; + uint8_t column; + int nread; + + /* Try to read the entire display. Notice that the seek offset + * (filep->f_pos) is ignored. It probably should be taken into account + * and also updated after each read and write. + */ + + row = 0; + column = 0; + + for (nread = 0; nread < len; nread++) + { + *buffer++ = lcd_readch(row, column); + if (++column >= LCD_NCOLUMNS) + { + column = 0; + if (++row >= LCD_NROWS) + { + break; + } + } + } + + return nread; +} + +/**************************************************************************** + * Name: lcd_write + ****************************************************************************/ + +static ssize_t lcd_write(FAR struct file *filep, FAR const char *buffer, + size_t len) +{ + struct lcd_instream_s instream; + struct slcdstate_s state; + enum slcdret_e result; + uint8_t ch; + uint8_t count; + + /* Initialize the stream for use with the SLCD CODEC */ + + instream.stream.get = lcd_getstream; + instream.stream.nget = 0; + instream.buffer = buffer; + instream.nbytes = len; + + lcd_dumpstream("BEFORE WRITE", &instream); + + /* Now decode and process every byte in the input buffer */ + + memset(&state, 0, sizeof(struct slcdstate_s)); + while ((result = slcd_decode(&instream.stream, &state, &ch, &count)) != SLCDRET_EOF) + { + lcdvdbg("slcd_decode returned result=%d char=%d count=%d\n", + result, ch, count); + + if (result == SLCDRET_CHAR) /* A normal character was returned */ + { + /* Check for ASCII control characters */ + + if (ch < ASCII_SPACE) + { + /* All are ignored except for backspace and carriage return */ + + if (ch == ASCII_BS) + { + /* Perform the backward deletion */ + + lcd_action(SLCDCODE_BACKDEL, 1); + } + else if (ch == ASCII_CR) + { + /* Perform the carriage return */ + + g_lcd1602.curcol = 0; + lcd_action(SLCDCODE_DOWN, 1); + } + } + + /* Handle ASCII_DEL */ + + else if (ch == ASCII_DEL) + { + /* Perform the forward deletion */ + + lcd_action(SLCDCODE_FWDDEL, 1); + } + + /* The rest of the 7-bit ASCII characters are fair game */ + + else if (ch < 128) + { + /* Write the character if it valid */ + + lcd_appendch(ch); + } + } + else /* (result == SLCDRET_SPEC) */ /* A special SLCD action was returned */ + { + /* Then Perform the action */ + + lcd_action((enum slcdcode_e)ch, count); + } + } + + /* Assume that the entire input buffer was processed */ + + lcd_dumpstream("AFTER WRITE", &instream); + return (ssize_t)len; +} + +/**************************************************************************** + * Name: lcd_ioctl + ****************************************************************************/ + +static int lcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + switch (cmd) + { + + /* SLCDIOC_GETATTRIBUTES: Get the attributes of the SLCD + * + * argument: Pointer to struct slcd_attributes_s in which values will be + * returned + */ + + case SLCDIOC_GETATTRIBUTES: + { + FAR struct slcd_attributes_s *attr = (FAR struct slcd_attributes_s *)((uintptr_t)arg); + + lcdvdbg("SLCDIOC_GETATTRIBUTES:\n"); + + if (!attr) + { + return -EINVAL; + } + + attr->nrows = LCD_NROWS; + attr->ncolumns = LCD_NCOLUMNS; + attr->nbars = 0; + attr->maxcontrast = CONFIG_LCD_MAXCONTRAST; + attr->maxbrightness = CONFIG_LCD_MAXPOWER; + } + break; + + /* SLCDIOC_CURPOS: Get the SLCD cursor positioni (rows x characters) + * + * argument: Pointer to struct slcd_curpos_s in which values will be + * returned + */ + + + case SLCDIOC_CURPOS: + { + FAR struct slcd_curpos_s *curpos = (FAR struct slcd_curpos_s *)((uintptr_t)arg); + + lcdvdbg("SLCDIOC_CURPOS: row=%d column=%d\n", g_lcd1602.currow, g_lcd1602.curcol); + + if (!curpos) + { + return -EINVAL; + } + + curpos->row = g_lcd1602.currow; + curpos->column = g_lcd1602.curcol; + } + break; + + /* SLCDIOC_GETBRIGHTNESS: Get the current brightness setting + * + * argument: Pointer type int that will receive the current brightness + * setting + */ + + case SLCDIOC_GETBRIGHTNESS: + { + FAR int *brightness = (FAR int *)((uintptr_t)arg); + if (!brightness) + { + return -EINVAL; + } + + *brightness = (int)g_lcd1602.brightness; + lcdvdbg("SLCDIOC_GETCONTRAST: brightness=%d\n", *brightness); + } + break; + + /* SLCDIOC_SETBRIGHTNESS: Set the brightness to a new value + * + * argument: The new brightness value + */ + + case SLCDIOC_SETBRIGHTNESS: + { + lcdvdbg("SLCDIOC_SETCONTRAST: arg=%ld\n", arg); + + if (arg > CONFIG_LCD_MAXPOWER) + { + return -ERANGE; + } + + lcd_brightness((uint8_t)arg); + } + break; + + case SLCDIOC_SETBAR: /* SLCDIOC_SETBAR: Set bars on a bar display */ + case SLCDIOC_GETCONTRAST: /* SLCDIOC_GETCONTRAST: Get the current contrast setting */ + case SLCDIOC_SETCONTRAST: /* SLCDIOC_SETCONTRAST: Set the contrast to a new value */ + default: + return -ENOTTY; + } + + return OK; +} + +/**************************************************************************** + * Name: lcd_poll + ****************************************************************************/ + +#ifndef CONFIG_DISABLE_POLL +static int lcd_poll(FAR struct file *filep, FAR struct pollfd *fds, + bool setup) +{ + if (setup) + { + /* Data is always avaialble to be read */ + + fds->revents |= (fds->events & (POLLIN|POLLOUT)); + if (fds->revents != 0) + { + sem_post(fds->sem); + } + } + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_lcd1602_initialize + * + * Description: + * Initialize the LCD1602 hardware and register the character driver as + * /dev/lcd1602. Prototype is in include/nuttx/lcd/hd4478ou.h. + * + ****************************************************************************/ + +int up_lcd1602_initialize(void) +{ + int ret = OK; + + /* Only initialize the driver once. */ + + if (!g_lcd1602.initialized) + { + lcdvdbg("Initializing\n"); + + /* Configure GPIO pins */ + + putreg16(0, PIC32MX_IOPORTE_TRIS); /* Set DB0-15 as outputs */ + pic32mx_configgpio(GPIO_LCD_RS); /* RS: Selects commnand or data */ + pic32mx_configgpio(GPIO_LCD_RW); /* RW: Selects read or write */ + pic32mx_configgpio(GPIO_LCD_E); /* E: Starts transfer */ + + /* Configure LCD power in the OFF state */ + + pic32mx_configgpio(GPIO_LCD_LIGHT); /* K */ + pic32mx_configgpio(GPIO_LCD_COMP); /* Vo */ + pic32mx_configgpio(GPIO_LCD_PWR); /* Vbuson/AN5/RB5 controls +5V USB */ + g_lcd1602.brightness = 0; /* Remember tht the light is off */ + + /* A small delay is necessary between when GPIO_LCD_E was set up as an + * output with initial value of 0 and this operation. That delay should + * be well covered by the intervening GPIO configurations. + */ + + pic32mx_gpiowrite(GPIO_LCD_E, true); /* Enable transfer */ + + /* Configure and enable the LCD */ + /* Delay for 4.1MS or more */ + + up_mdelay(5); + + /* Select the 8-bit interface. BF cannot be checked before this command. + * This needs to be done a few times with some magic delays. + * + * Function set: 5x7 Style | N=2R | DL=8D + */ + + lcd_wrcommand(HD4478OU_FUNC | HD4478OU_FUNC_F5x7 | HD4478OU_FUNC_N1 | HD4478OU_FUNC_DL8D); + up_udelay(100); /* Delay more than 100uS */ + + lcd_wrcommand(HD4478OU_FUNC | HD4478OU_FUNC_F5x7 | HD4478OU_FUNC_N1 | HD4478OU_FUNC_DL8D); + up_udelay(40); /* Delay more than 40uS */ + lcd_wrcommand(HD4478OU_FUNC | HD4478OU_FUNC_F5x7 | HD4478OU_FUNC_N1 | HD4478OU_FUNC_DL8D); + lcd_waitbusy(); + + lcd_wrcommand(HD4478OU_FUNC | HD4478OU_FUNC_F5x7 | HD4478OU_FUNC_N1 | HD4478OU_FUNC_DL8D); + lcd_waitbusy(); + + /* Display ON, cursor OFF, blink OFF */ + + lcd_wrcommand(HD4478OU_DISPLAY | HD4478OU_DISPLAY_ON); + lcd_waitbusy(); + + /* Clear the display and home the cursor */ + + lcd_wrcommand(HD4478OU_CLEAR); /* Clear display */ + lcd_waitbusy(); + + lcd_wrcommand(HD4478OU_RETURN); /* Return home: AC=0 */ + lcd_waitbusy(); + + /* Entry Mode Set: + * + * - Increment address by one, + * - Shift cursor to right (display is not shifted) + */ + + lcd_wrcommand(HD4478OU_INPUT | HD4478OU_INPUT_INCR); + + /* Register the LCD device driver */ + + ret = register_driver("/dev/lcd1602", &g_lcdops, 0644, &g_lcd1602); + g_lcd1602.initialized = true; + } + + return ret; +} + +#endif /* CONFIG_LCD_LCD1602 */ diff --git a/configs/sure-pic32mx/src/pic32mx_spi.c b/configs/sure-pic32mx/src/pic32mx_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..dc7cd4334b29a5ef09d4b3ced511cbabf4924f0a --- /dev/null +++ b/configs/sure-pic32mx/src/pic32mx_spi.c @@ -0,0 +1,270 @@ +/************************************************************************************ + * configs/sure-pic32mx/src/pic32mx_spi.c + * + * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "pic32mx.h" +#include "sure-pic32mx.h" + +#if defined(CONFIG_PIC32MX_SPI2) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifdef CONFIG_ARCH_DBDP11215 + +/* The Sure DB_DP11215 PIC32 Storage Demo Board has an SD slot connected on SPI2: + * + * SCK2/PMA5/CN8/RG6 SCK SD connector SCK, FLASH (U1) SCK* + * SDI2/PMA4/CN9/RG7 SDI SD connector DO, FLASH (U1) SO* + * SDO2/PMA3/CN10/RG8 SDO SD connector DI, FLASH (U1) SI* + * + * Chip Select. Pulled up on-board + * TDO/AN11/PMA12/RB11 SD_CS SD connector CS + * + * Status inputs. All pulled up on-board + * + * TCK/AN12/PMA11/RB12 SD_CD SD connector CD + * TDI/AN13/PMA10/RB13 SD_WD SD connector WD + */ + +# define PIC32_HAVE_SD 1 + +# define GPIO_SD_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTB|GPIO_PIN11) +# define GPIO_SD_CD (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN12) +# define GPIO_SD_WD (GPIO_INPUT|GPIO_PORTB|GPIO_PIN13) + +/* The Sure DB_DP11215 PIC32 Storage Demo Board has pads an SOIC (Flash or + * EEPROM) connected on SPI2, however, U4 is not populated on my board. + * + * + * TMS/AN10/CVREFOUT/PMA13/RB10 UTIL_WP FLASH (U1) WP + * SS2/PMA2/CN11/RG9 UTIL_CS FLASH (U1) CS + */ + +# undef PIC32_HAVE_SOIC + +# define GPIO_SOIC_WP (GPIO_INPUT|GPIO_PORTB|GPIO_PIN10) +# define GPIO_SOIC_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTG|GPIO_PIN0) + +/* Change notification numbers -- Not available for SD_CD. */ + +#endif + +#ifdef CONFIG_ARCH_DBDP11212 + +/* The Sure DB-DP11212 PIC32 General Purpose Demo Board does not have an + * SD slot. + */ + +# undef PIC32_HAVE_SD + +/* The Sure DB-DP11212 PIC32 General Purpose Demo Board has an SOIC (Flash or + * EEPROM) connected on SPI2: + * + * TMS/AN10/PMA13/RB10 UTIL_WP FLASH (U4) WP + * TDO/AN11/PMA12/RB11 UTIL_CS FLASH (U4) CS + */ + +# define PIC32_HAVE_SOIC 1 + +# define GPIO_SOIC_WP (GPIO_INPUT|GPIO_PORTB|GPIO_PIN10) +# define GPIO_SOIC_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTB|GPIO_PIN11) +#endif + +/* The following enable debug output from this file. + * + * CONFIG_DEBUG_SPI && CONFIG_DEBUG - Define to enable basic SPI debug + * CONFIG_DEBUG_VERBOSE - Define to enable verbose SPI debug + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_SPI +# undef CONFIG_DEBUG_VERBOSE +#endif + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Sure PIC32MX board. + * + ************************************************************************************/ + +void weak_function pic32mx_spidev_initialize(void) +{ + /* Configure the SPI2 chip select (CS) GPIO output, and the card detect (CD) and + * write protect (WP) inputs. + */ + +#ifdef PIC32_HAVE_SD + pic32mx_configgpio(GPIO_SD_CS); + pic32mx_configgpio(GPIO_SD_CD); + pic32mx_configgpio(GPIO_SD_WD); +#endif + +#ifdef PIC32_HAVE_SOIC + pic32mx_configgpio(GPIO_SOIC_WP); + pic32mx_configgpio(GPIO_SOIC_CS); +#endif +} + +/************************************************************************************ + * Name: pic32mx_spi2select and pic32mx_spi2status + * + * Description: + * The external functions, pic32mx_spi2select and pic32mx_spi2status + * must be provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including pic32mx_spibus_initialize()) + * are provided by common PIC32MX logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in pic32mx_boardinitialize() to configure SPI/SPI chip select + * pins. + * 2. Provide pic32mx_spi2select() and pic32mx_spi2status() functions + * in your board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 3. Add a calls to pic32mx_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by pic32mx_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +#ifdef CONFIG_PIC32MX_SPI2 +void pic32mx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spivdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + /* The SD card chip select is pulled high and active low */ + +#ifdef PIC32_HAVE_SD + if (devid == SPIDEV_MMCSD) + { + pic32mx_gpiowrite(GPIO_SD_CS, !selected); + } +#endif + +#ifdef PIC32_HAVE_SOIC + if (devid == SPIDEV_FLASH) + { + pic32mx_gpiowrite(GPIO_SOIC_CS, !selected); + } +#endif +} + +uint8_t pic32mx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + + /* Card detect is pull up on-board. If a low value is sensed then the + * card must be present. + */ + +#ifdef PIC32_HAVE_SD + if (devid == SPIDEV_MMCSD) + { + if (!pic32mx_gpioread(GPIO_SD_CD)) + { + ret = SPI_STATUS_PRESENT; + + /* It seems that a high value indicates the card is write + * protected. + */ + + if (pic32mx_gpioread(GPIO_SD_WD)) + { + ret |= SPI_STATUS_WRPROTECTED; + } + } + } +#endif + +#ifdef PIC32_HAVE_SOIC + if (devid == SPIDEV_FLASH) + { + ret = SPI_STATUS_PRESENT; + + /* Write protect is indicated with a low value. */ + + if (pic32mx_gpioread(GPIO_SOIC_WP)) + { + ret |= SPI_STATUS_WRPROTECTED; + } + } +#endif + + spivdbg("Returning %d\n", ret); + return ret; +} +#endif +#endif /* CONFIG_PIC32MX_SPI2 */ diff --git a/configs/sure-pic32mx/src/pic32mx_usbdev.c b/configs/sure-pic32mx/src/pic32mx_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..57bc9a84d90e9e0676ac7a22962994daf9340a90 --- /dev/null +++ b/configs/sure-pic32mx/src/pic32mx_usbdev.c @@ -0,0 +1,174 @@ +/************************************************************************************ + * configs/sure-pic32mx/src/pic32mx_usbdev.c + * + * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * References: + * - Sample code and schematics provided with the Sure Electronics PIC32 board. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include + +#include "pic32mx.h" +#include "sure-pic32mx.h" + +#if defined(CONFIG_PIC32MX_USBDEV) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* The Sure DB_DP11215 PIC32 Storage Demo Board has a CP2102 PHY that is shared + * between the USB and the UART-to-USB logic. That PHY must be programmed during + * boot up for USB functionality (since the UART-to-USB is not populated). + * + * PIN NAME SIGNAL NOTES + * ---- ------------------------------- -------------- ------------------------------ + * 11 AN5/C1IN+/Vbuson/CN7/RB5 Vbuson/AN5/RB5 To USB VBUS circuitry + * 43 U1CTS/SDA1/IC2/INT2/RD9 USB_OPTEN USB PHY + * 44 SCL1/IC3/PMCS2/PMA15/INT3/RD10 USB_OPT USB PHY + */ + +#ifdef CONFIG_ARCH_DBDP11215 +# define GPIO_USB_VBUSON (GPIO_INPUT|GPIO_PORTB|GPIO_PIN5) +# define GPIO_USB_OPTEN (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTD|GPIO_PIN9) +# define GPIO_USB_OPT (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTD|GPIO_PIN10) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_usbdevinitialize + * + * Description: + * Called to configure the mini-B PHY on the Sure PIC32MX board for the USB device + * + ************************************************************************************/ + +void weak_function pic32mx_usbdevinitialize(void) +{ + /* Connect the PHY to the USB mini-B port. Order and timing matter! */ + +#ifdef CONFIG_ARCH_DBDP11215 + pic32mx_configgpio(GPIO_USB_OPTEN); + pic32mx_configgpio(GPIO_USB_OPT); +#endif + + /* Notes from the Sure Electronics sample code: + * + * "The USB specifications require that USB peripheral devices must never source + * current onto the Vbus pin. Additionally, USB peripherals should not source + * current on D+ or D- when the host/hub is not actively powering the Vbus line. + * When designing a self powered (as opposed to bus powered) USB peripheral + * device, the firmware should make sure not to turn on the USB module and D+ + * or D- pull up resistor unless Vbus is actively powered. Therefore, the + * firmware needs some means to detect when Vbus is being powered by the host. + * A 5V tolerant I/O pin can be connected to Vbus (through a resistor), and + * can be used to detect when Vbus is high (host actively powering), or low + * (host is shut down or otherwise not supplying power). The USB firmware + * can then periodically poll this I/O pin to know when it is okay to turn on + * the USB module/D+/D- pull up resistor. When designing a purely bus powered + * peripheral device, it is not possible to source current on D+ or D- when the + * host is not actively providing power on Vbus. Therefore, implementing this + * bus sense feature is optional. ..." + */ + +#ifdef CONFIG_USBHOST + //pic32mx_configgpio(GPIO_USB_VBUSON); +#endif + + /* "If the host PC sends a GetStatus (device) request, the firmware must respond + * and let the host know if the USB peripheral device is currently bus powered + * or self powered. See chapter 9 in the official USB specifications for details + * regarding this request. If the peripheral device is capable of being both + * self and bus powered, it should not return a hard coded value for this request. + * Instead, firmware should check if it is currently self or bus powered, and + * respond accordingly. If the hardware has been configured like demonstrated + * on the PICDEM FS USB Demo Board, an I/O pin can be polled to determine the + * currently selected power source. ..." + */ + +#ifdef CONFIG_USB_PWRSENSE + //pic32mx_configgpio(GPIO_USB_PWRSENSE); +#endif +} + +/************************************************************************************ + * Name: pic32mx_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB + * software connect and disconnect), then the board software must provide + * stm32_pullup. See include/nuttx/usb/usbdev.h for additional description + * of this method. Alternatively, if no pull-up GPIO the following EXTERN + * can be redefined to be NULL. + * + ************************************************************************************/ + +int pic32mx_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + /* The Sure PIC32MX does not have a USB pull-up */ + + return OK; +} + +/************************************************************************************ + * Name: pic32mx_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver + * is used. This function is called whenever the USB enters or leaves + * suspend mode. This is an opportunity for the board logic to shutdown + * clocks, power, etc. while the USB is suspended. + * + ************************************************************************************/ + +void pic32mx_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + /* Do nothing */ +} + +#endif /* CONFIG_PIC32MX_USBDEV */ diff --git a/configs/sure-pic32mx/src/pic32mx_usbterm.c b/configs/sure-pic32mx/src/pic32mx_usbterm.c new file mode 100644 index 0000000000000000000000000000000000000000..649ae495a159635d45ba72d03add3ef92fc93153 --- /dev/null +++ b/configs/sure-pic32mx/src/pic32mx_usbterm.c @@ -0,0 +1,107 @@ +/************************************************************************************ + * configs/sure-pic32mx/src/pic32mx_usbterm.c + * + * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * References: + * - Sample code and schematics provided with the Sure Electronics PIC32 board. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include + +#include "pic32mx.h" +#include "sure-pic32mx.h" + +#if defined(CONFIG_PIC32MX_USBDEV) && defined(CONFIG_EXAMPLES_USBTERM_DEVINIT) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/**************************************************************************** + * Name: + * + * Description: + * If CONFIG_EXAMPLES_USBTERM_DEVINIT is defined, then the example will + * call this user provided function as part of its initialization. + * + ****************************************************************************/ + +int usbterm_devinit(void) +{ + /* The Sure board has no way to know when the USB is connected. So we + * will fake it and tell the USB driver that the USB is connected now. + * + * If examples/usbterm is built as an NSH built-in application, then + * pic32mx_usbattach() will be called in board_app_initialize(). + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS + pic32mx_usbattach(); +#endif + return OK; +} + +/**************************************************************************** + * Name: + * + * Description: + * If CONFIG_EXAMPLES_USBTERM_DEVINIT is defined, then the example will + * call this user provided function as part of its termination sequence. + * + ****************************************************************************/ + +void usbterm_devuninit(void) +{ + /* Tell the USB driver that the USB is no longer connected */ + + pic32mx_usbdetach(); +} + +#endif /* CONFIG_PIC32MX_USBDEV && CONFIG_EXAMPLES_USBTERM_DEVINIT */ diff --git a/configs/sure-pic32mx/src/sure-pic32mx.h b/configs/sure-pic32mx/src/sure-pic32mx.h new file mode 100644 index 0000000000000000000000000000000000000000..452f4427cde8cb3431e180dadfa37a105434c38b --- /dev/null +++ b/configs/sure-pic32mx/src/sure-pic32mx.h @@ -0,0 +1,173 @@ +/**************************************************************************** + * configs/sure-pic32mx/src/sure-pic32mx.h + * + * Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_SURE_PIC32MX_SRC_SURE_PIC32MXL_H +#define __CONFIGS_SURE_PIC32MX_SRC_SURE_PIC32MXL_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* GPIO Pin Configurations **************************************************/ +/* The Sure PIC32MX board has five LEDs. One (D4, lablel "Power") is not + * controllable by software. Four are controllable by software: + * + * D7 "USB" Yellow RD7 Low illuminates + * D8 "SD" Yellow RD6 Low illuminates + * D9 "Flash" Yellow RF0 Low illuminates + * D10 "Error" Red RF1 Low illuminates + * + */ + +#define GPIO_USB_LED (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTD | GPIO_PIN7) +#define GPIO_SD_LED (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTD | GPIO_PIN6) +#define GPIO_FLASH_LED (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTF | GPIO_PIN0) +#define GPIO_ERROR_LED (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTF | GPIO_PIN1) + + /* LCD pin mapping (see configs/sure-pic32mx/README.txt) + * + * --------------------- ---------- ---------------------------------- + * PIC32 Sure JP1 Sure Signal Description + * PIN SIGNAL NAME PIN NAME(s) + * --------------------- ---------- ---------------------------------- + * 34 Vbus 1. +5V +5V VBUS device mode + * To GND via capacitor + * 2. GND GND + * 49 RD1 3. Vo Transistor circuit driven by PWM2 + * 44 PMA0/AN15/RB15 4. RS PMA0, Selects registers + * 53 PMRD/RD5 5. RW PMRD/PMWR, Selects read or write + * 45 PMPCS1/RD11 6. E Starts data read/write + * 60 PMD0/RE0 7. DB0 PMD0 + * 61 PMD1/RE1 8. DB1 PMD1 + * 62 PMD2/RE2 9. DB2 PMD2 + * 63 PMD3/RE3 10. DB3 PMD3 + * 64 PMD4/RE4 11. DB4 PMD4 + * 1 PMD5/RE5 12. DB5 PMD5 + * 2 PMD6/RE6 13. DB6 PMD6 + * 3 PMD7/RE7 14. DB7 PMD7 + * 15. A +5V_DUSB + * 46 INT0/RD0 16. K Transistor circuit driven by PWM1 + * --------------------- ---------- ---------------------------------- + * + * Vbus power also requires Vbuson/AN5/RB5 + */ + +#define GPIO_LCD_RS (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTB | GPIO_PIN15) +#define GPIO_LCD_RW (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTD | GPIO_PIN5) +#define GPIO_LCD_E (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTD | GPIO_PIN11) + +/* This pin drives the +5V needed by the LCD */ + +#define GPIO_LCD_PWR (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTB | GPIO_PIN5) + +/* These pins are label PWM1 and PWM2 and so are obviously intended to + * support modulated outputs. However, here for simplicity, they are + * just treated as on/off discretes outputs. + */ + +#define GPIO_LCD_LIGHT (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTD | GPIO_PIN0) +#define GPIO_LCD_COMP (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTD | GPIO_PIN1) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Name: pic32mx_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Sure PIC32MX Logic board. + * + ************************************************************************************/ + +#if defined(CONFIG_PIC32MX_SPI2) +void weak_function pic32mx_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: pic32mx_usbdevinitialize + * + * Description: + * Called to configure the mini-B PHY on the Sure PIC32MX board for the USB device + * + ************************************************************************************/ + +#if defined(CONFIG_PIC32MX_USBDEV) +void weak_function pic32mx_usbdevinitialize(void); +#endif + +/************************************************************************************ + * Name: pic32mx_led_initialize + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void pic32mx_led_initialize(void); +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_SURE_PIC32MX_SRC_SURE_PIC32MXL_H */ diff --git a/configs/sure-pic32mx/usbnsh/Make.defs b/configs/sure-pic32mx/usbnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..9eaf383f2df2358d1783fc431d9ae1094f4580d1 --- /dev/null +++ b/configs/sure-pic32mx/usbnsh/Make.defs @@ -0,0 +1,100 @@ +############################################################################ +# configs/sure-pic32mx/usbnsh/Make.defs +# +# Copyright (C) 2012, 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/mips/src/mips32/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/sure-pic32mx/usbnsh/defconfig b/configs/sure-pic32mx/usbnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..66d0bb5e3b85b25f5b656a4e6fdf6992c83089d0 --- /dev/null +++ b/configs/sure-pic32mx/usbnsh/defconfig @@ -0,0 +1,907 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +CONFIG_ARCH_MIPS=y +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="mips" +CONFIG_ARCH_FAMILY="mips32" +CONFIG_ARCH_CHIP="pic32mx" +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_CHIP_PIC32MX=y +# CONFIG_ARCH_CHIP_PIC32MZ is not set +CONFIG_ARCH_MIPS32=y +CONFIG_ARCH_MIPS_24KC=y +# CONFIG_ARCH_MIPS_M14K is not set +# CONFIG_ARCH_HAVE_MICROMIPS is not set + +# +# MIPS32 Configuration Options +# +# CONFIG_MIPS32_TOOLCHAIN_GNU_ELF is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_XC32 is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW is not set +CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE=y +# CONFIG_MIPS32_TOOLCHAIN_PINGUINOW is not set +# CONFIG_MIPS32_FRAMEPOINTER is not set + +# +# PIC32MX Configuration Options +# +# CONFIG_ARCH_CHIP_PIC32MX110F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX320F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX420F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX440F256H is not set +CONFIG_ARCH_CHIP_PIC32MX440F512H=y +# CONFIG_ARCH_CHIP_PIC32MX460F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX460F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX1 is not set +# CONFIG_ARCH_CHIP_PIC32MX2 is not set +# CONFIG_ARCH_CHIP_PIC32MX3 is not set +CONFIG_ARCH_CHIP_PIC32MX4=y +# CONFIG_ARCH_CHIP_PIC32MX5 is not set +# CONFIG_ARCH_CHIP_PIC32MX6 is not set +# CONFIG_ARCH_CHIP_PIC32MX7 is not set +# CONFIG_PIC32MX_MVEC is not set +# CONFIG_PIC32MX_SPI is not set +CONFIG_PIC32MX_T1=y + +# +# PIC32MX Peripheral Support +# +# CONFIG_PIC32MX_WDT is not set +# CONFIG_PIC32MX_T2 is not set +# CONFIG_PIC32MX_T3 is not set +# CONFIG_PIC32MX_T4 is not set +# CONFIG_PIC32MX_T5 is not set +# CONFIG_PIC32MX_IC1 is not set +# CONFIG_PIC32MX_IC2 is not set +# CONFIG_PIC32MX_IC3 is not set +# CONFIG_PIC32MX_IC4 is not set +# CONFIG_PIC32MX_IC5 is not set +# CONFIG_PIC32MX_OC1 is not set +# CONFIG_PIC32MX_OC2 is not set +# CONFIG_PIC32MX_OC3 is not set +# CONFIG_PIC32MX_OC4 is not set +# CONFIG_PIC32MX_OC5 is not set +# CONFIG_PIC32MX_I2C1 is not set +# CONFIG_PIC32MX_I2C2 is not set +# CONFIG_PIC32MX_I2C3 is not set +# CONFIG_PIC32MX_I2C4 is not set +# CONFIG_PIC32MX_I2C5 is not set +# CONFIG_PIC32MX_SPI1 is not set +# CONFIG_PIC32MX_SPI2 is not set +# CONFIG_PIC32MX_SPI3 is not set +# CONFIG_PIC32MX_SPI4 is not set +# CONFIG_PIC32MX_UART1 is not set +CONFIG_PIC32MX_UART2=y +# CONFIG_PIC32MX_UART3 is not set +# CONFIG_PIC32MX_UART4 is not set +# CONFIG_PIC32MX_UART5 is not set +# CONFIG_PIC32MX_UART6 is not set +# CONFIG_PIC32MX_ADC is not set +# CONFIG_PIC32MX_PMP is not set +# CONFIG_PIC32MX_CM1 is not set +# CONFIG_PIC32MX_CM2 is not set +# CONFIG_PIC32MX_CM3 is not set +# CONFIG_PIC32MX_RTCC is not set +# CONFIG_PIC32MX_DMA is not set +# CONFIG_PIC32MX_FLASH is not set +CONFIG_PIC32MX_USBDEV=y +# CONFIG_PIC32MX_USBHOST is not set +# CONFIG_PIC32MX_CAN1 is not set +# CONFIG_PIC32MX_CAN2 is not set +# CONFIG_PIC32MX_ETHERNET is not set +# CONFIG_PIC32MX_CTMU is not set + +# +# PIC32MX Peripheral Interrupt Priorities +# +CONFIG_PIC32MX_CTPRIO=16 +CONFIG_PIC32MX_CS0PRIO=16 +CONFIG_PIC32MX_CS1PRIO=16 +CONFIG_PIC32MX_INT0PRIO=16 +CONFIG_PIC32MX_INT1PRIO=16 +CONFIG_PIC32MX_INT2PRIO=16 +CONFIG_PIC32MX_INT3PRIO=16 +CONFIG_PIC32MX_INT4PRIO=16 +CONFIG_PIC32MX_T1PRIO=16 +CONFIG_PIC32MX_UART2PRIO=16 +CONFIG_PIC32MX_USBPRIO=16 + +# +# Device Configuration 0 (DEVCFG0) +# +CONFIG_PIC32MX_DEBUGGER=2 +CONFIG_PIC32MX_ICESEL=1 +CONFIG_PIC32MX_PROGFLASHWP=0xff +CONFIG_PIC32MX_BOOTFLASHWP=1 +CONFIG_PIC32MX_CODEWP=1 + +# +# Device Configuration 1 (DEVCFG1) +# + +# +# Device Configuration 3 (DEVCFG3) +# +CONFIG_PIC32MX_USBIDO=0 +CONFIG_PIC32MX_VBUSIO=0 +# CONFIG_PIC32MX_WDENABLE is not set +CONFIG_PIC32MX_FETHIO=1 +CONFIG_PIC32MX_FMIIEN=1 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +CONFIG_ARCH_VECNOTIRQ=y +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5580 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0xa0000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SUREPIC32MX=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sure-pic32mx" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_ARCH_DBDP11215=y +# CONFIG_ARCH_DBDP11212 is not set +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +CONFIG_ARCH_HAVE_UART2=y +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_UART2_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# UART2 Configuration +# +CONFIG_UART2_RXBUFSIZE=64 +CONFIG_UART2_TXBUFSIZE=64 +CONFIG_UART2_BAUD=115200 +CONFIG_UART2_BITS=8 +CONFIG_UART2_PARITY=0 +CONFIG_UART2_2STOP=0 +# CONFIG_UART2_IFLOWCONTROL is not set +# CONFIG_UART2_OFLOWCONTROL is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_CHAR=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sure-pic32mx/usbnsh/setenv.sh b/configs/sure-pic32mx/usbnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..62074cdb35731b0e21b6f24b05e77cde3f897904 --- /dev/null +++ b/configs/sure-pic32mx/usbnsh/setenv.sh @@ -0,0 +1,61 @@ +#!/bin/bash +# configs/sure-pic32mx/usbnsh/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +# This is the Cygwin path to the location where I installed the MicroChip +# PIC32MX toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install a different version of if you install +# the Linux PIC32MX toolchain as well +export TOOLCHAIN_BIN="/cygdrive/c/MicroChip/mplabc32/v1.12/bin" + +# This is the path to the toosl subdirectory +export PIC32TOOL_DIR="${WD}/tools/pic32mx" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${PIC32TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/teensy-2.0/Kconfig b/configs/teensy-2.0/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..03fe9950b439894fa65becb4f01338cbc00aa9df --- /dev/null +++ b/configs/teensy-2.0/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_TEENSY_20 +endif diff --git a/configs/teensy-2.0/README.txt b/configs/teensy-2.0/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..b409268a65217616edabeca6e8c15c4551ca191e --- /dev/null +++ b/configs/teensy-2.0/README.txt @@ -0,0 +1,581 @@ +README +^^^^^ + +This is the README file for the port of NuttX to the PJRC Teensy++ 2.0 board. +This board is developed by http://pjrc.com/teensy/. The Teensy++ 2.0 is based +on an Atmel AT90USB1286 MCU. + +Contents +^^^^^^^^ + + o Teensy++ 2.0 Features + o Pin Usage + o Halfkey Bootloader + o Serial Console + o SD Connection + o Toolchains + o Windows Native Toolchains + o NuttX buildroot Toolchain + o avr-libc + o Teensy++ Configuration Options + o Configurations + +Teensy++ 2.0 Features +^^^^^^^^^^^^^^^^^^^^^ + + o Based on the 64-pin USB AVR Microcontroller AT90USB1286. + o USB Full Speed (12Mbit/s) + o USB Device Mode + o 120kbof available FLASH memory for programs. + o 8 kbytes SRAM and 4 kbytes of EEPROM + o USB powered + o 16MHz crystal + o 48 General Purpose IO Pins + +Pin Usage +^^^^^^^^^ + + AT90USB1286 TQFP64 + -- ------------------------ --------------------------------------------- + PIN SIGNAL BOARD CONNECTION + -- ------------------------ --------------------------------------------- + (left) + 1 (INT.6/AIN.0) PE6 Pad E6 + 2 (INT.7/AIN.1/UVcon) PE7 Pad E7 + 3 UVcc (Voltage circutry) + 4 D- USB DP + 5 D+ USB DM + 6 UGnd GND + 7 UCap GND (via cap) + 8 VBus USB VBUS + 9 (IUID) PE3 N/C + 10 (SS/PCINT0) PB0 Pad B0 + 11 (PCINT1/SCLK) PB1 Pad B1 + 12 (PDI/PCINT2/MOSI) PB2 Pad B2 + 13 (PDO/PCINT3/MISO) PB3 Pad B3 + 14 (PCINT4/OC.2A) PB4 Pad B4 + 15 (PCINT5/OC.1A) PB5 Pad B5 + 16 (PCINT6/OC.1B) PB6 Pad B6 + (bottom) + 17 (PCINT7/OC.0A/OC.1C) PB7 Pad B7 + 18 (INT4/TOSC1) PE4 Pad E4 + 19 (INT.5/TOSC2) PE5 Pad E5 + 20 RESET Switch pulls to ground + 21 VCC VCC + 22 GND GND + 23 XTAL2 XTAL (16MHz) + 24 XTAL1 XTAL (16MHz) + 25 (OC0B/SCL/INT0) PD0 Pad D0 + 26 (OC2B/SDA/INT1) PD1 Pad D1 + 27 (RXD1/INT2) PD2 Pad D2 + 28 (TXD1/INT3) PD3 Pad D3 + 29 (ICP1) PD4 Pad D4 + 30 (XCK1) PD5 Pad D5 + 31 (T1) PD6 Pad D6, LED + 32 (T0) PD7 Pad D7 + (right) + 48 PA3 (AD3) Pad A3 + 47 PA4 (AD4) Pad A4 + 46 PA5 (AD5) Pad A5 + 45 PA6 (AD6) Pad A6 + 44 PA7 (AD7) Pad A7 + 43 PE2 (ALE/HWB) Pad ALE (Pulled down) + 42 PC7 (A15/IC.3/CLKO) Pad C7 + 41 PC6 (A14/OC.3A) Pad C6 + 40 PC5 (A13/OC.3B) Pad C5 + 39 PC4 (A12/OC.3C) Pad C4 + 38 PC3 (A11/T.3) Pad C3 + 37 PC2 (A10) Pad C2 + 36 PC1 (A9) Pad C1 + 35 PC0 (A8) Pad C0 + 34 PE1 (RD) Pad E1 + 33 PE0 (WR) Pad E0 + (top) + 64 AVCC VCC + 63 GND GND + 62 AREF Pad Ref (Capacitor to ground) + 61 PF0 (ADC0) Pad F0 + 60 PF1 (ADC1) Pad F1 + 59 PF2 (ADC2) Pad F2 + 58 PF3 (ADC3) Pad F3 + 57 PF4 (ADC4/TCK) Pad F4 + 56 PF5 (ADC5/TMS) Pad F5 + 55 PF6 (ADC6/TDO) Pad F6 + 54 PF7 (ADC7/TDI) Pad F7 + 53 GND GND + 52 VCC VCC + 51 PA0 (AD0) Pad A0 + 50 PA1 (AD1) Pad A1 + 49 PA2 (AD2) Pad A2 + +Halfkey Bootloader +^^^^^^^^^^^^^^^^^^ + +o Download the Teensy application from http://pjrc.com/teensy/loader.html +o Instructions are available for your OS at that places as well. + +Summary: + +1. Start Teensy +2. Press button on the Teensy board +3. Select a HEX file (File menu) +4. Select "program" (Operations menu) +5. Reboot (Operations menu). + +Serial Console +^^^^^^^^^^^^^^ + + A serial console is supported on an external MAX232/MAX3232 Connected + on PD2 and PD3: + + Port D, Bit 2: RXD1, Receive Data (Data input pin for the USART1). When + the USART1 receiver is enabled this pin is configured as an input + regardless of the value of DDD2. When the USART forces this pin to + be an input, the pull-up can still be controlled by the PORTD2 bit. + Port D, Bit 3: TXD1, Transmit Data (Data output pin for the USART1). + When the USART1 Transmitter is enabled, this pin is configured as + an output regardless of the value of DDD3. + + AT90USB90128/64 TQFP64 + -- ------------------------ --------------------------------------------- + PIN SIGNAL BOARD CONNECTION + -- ------------------------ --------------------------------------------- + 27 (RXD1/INT2) PD2 Pad D2 + 28 (TXD1/INT3) PD3 Pad D3 + + Plus power and ground. There are numerous ground points and both USB 5V + and Vcc are available. + +SD Connection +^^^^^^^^^^^^^ + +I have the SD-ADP SD/MMC Card Adaptor from www.gravitech.com +(http://www.gravitech.us/sdcaad.html). Features: + + o On-board 3.3V regulator + o Connect directly to 3.3V or 5.0V microcontroller + o Card detect LED + o Includes 11-pin male header + o Board dimension: 2.0”x1.3” + +SD-ADP Pinout / SD Connection + + -- ---- ----------- ------------------------------------------------------- + J2 NAME SD CARD DESCRIPTION + -- ---- ----------- ------------------------------------------------------- + 1 VIN (reguator) Input power to the SD card (3.3V to 6.0V) + 2 GND 3,6,12,13 Common (Connects to the housing of the SD socket) + 3 3V3 4 3.3V Output voltage from the on-board 3.3V regulator (250mA) + 4 NC 9 NC Connect to pin 9 on the SD card (not used in SPI mode) + 5 CS 1 DAT3/CS Chip select * + 6 DI 2 CMD/DI Serial input data * + 7 SCK 5 SCK Serial clock * + 8 DO 7 DAT0/DO Serial output data + 9 IRQ 8 DAT1/IRQ Interrupt request, connect to pin 8 on the SD card (not used in SPI mode) + 10 CD 10 CD Card detect (active low) + 11 WP 11 WP Write protect + -- ---- ----------- ------------------------------------------------------- + + * Via a 74LCX245 level translator / buff + +Teensy SPI Connection + + -- ---- -- ------------------------- ------- + J2 NAME PIN NAME PAD + -- ---- -- ------------------------- ------- + 1 VIN -- Connected to USB +5V + 2 GND -- Connected to USB GND + 3 3V3 -- Not used --- + 4 NC -- Not used + 5 CS 10 (SS/PCINT0) PB0 Pad B0 + 6 DI 12 (PDI/PCINT2/MOSI) PB2 Pad B2 + 7 SCK 11 (PCINT1/SCLK) PB1 Pad B1 + 8 DO 13 (PDO/PCINT3/MISO) PB3 Pad B3 + 9 IRQ -- Not used --- + 10 CD 14 (PCINT4/OC.2A) PB4 Pad B4 + 11 WP 15 (PCINT5/OC.1A) PB5 Pad B5 + -- ---- -- ------------------------- ------- + +Toolchains +^^^^^^^^^^ + +There are several toolchain options. However, testing has been performed +using *only* the NuttX buildroot toolchain described below. Therefore, +the NuttX buildroot toolchain is the recommended choice. + +The toolchain may be selected using the kconfig-mconf tool (via 'make menuconfig'), +by editing the existing configuration file (defconfig), or by overriding +the toolchain on the make commandline with CONFIG_AVR_TOOLCHAIN=. + +The valid values for are BUILDROOT, CROSSPACK, LINUXGCC and WINAVR. + +Buildroot: + + There is a DIY buildroot version for the AVR boards here: + http://bitbucket.org/nuttx/buildroot/downloads/. See the + following section for details on building this toolchain. + + It is assumed in some places that buildroot toolchain is available + at ../buildroot/build_avr. Edit the setenv.sh file if + this is not the case. + + After configuring NuttX, make sure that CONFIG_AVR_BUILDROOT_TOOLCHAIN=y is set in your + .config file. + +WinAVR: + + For Cygwin development environment on Windows machines, you can use + WinAVR: http://sourceforge.net/projects/winavr/files/ + + It is assumed in some places that WinAVR is installed at C:/WinAVR. Edit the + setenv.sh file if this is not the case. + + After configuring NuttX, make sure that CONFIG_AVR_WINAVR_TOOLCHAIN=y is set in your + .config file. + + WARNING: There is an incompatible version of cygwin.dll in the WinAVR/bin + directory! Make sure that the path to the correct cygwin.dll file precedes + the path to the WinAVR binaries! + +Atmel Studio + + Another option is to use the AVR toolchain provided within the Atmel Studio + installation. Look in the Atmel/Studio directories and Program Files (x86) + to find the tools in a subdirectory like toolchain/avr8/avr8-gnu-toolchain/bin. + +Linux: + + For Linux, there are widely available avr-gcc packages. On Ubuntu, use: + sudo apt-get install gcc-avr gdb-avr avr-libc + + After configuring NuttX, make sure that CONFIG_AVR_LINUXGCC_TOOLCHAIN=y is set in your + .config file. + +Mac OS X: + + For Mac OS X, the CrossPack for AVR toolchain is available from: + + http://www.obdev.at/products/crosspack/index.html + + This toolchain is functionally equivalent to the Linux GCC toolchain. + +Windows Native Toolchains +^^^^^^^^^^^^^^^^^^^^^^^^^ + + The WinAVR toolchain is a Windows native toolchain. There are several + limitations to using a Windows native toolchain in a Cygwin environment. + The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' + utility but you might easily find some new path problems. If so, check + out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic + links are used in Nuttx (e.g., include/arch). The make system works + around these problems for the Windows tools by copying directories + instead of linking them. But this can also cause some confusion for + you: For example, you may edit a file in a "linked" directory and find + that your changes had no effect. That is because you are building the + copy of the file in the "fake" symbolic directory. If you use a + Windows toolchain, you should get in the habit of making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + An additional issue with the WinAVR toolchain, in particular, is that it + contains an incompatible version of the Cygwin DLL in its bin/ directory. + You must take care that the correct Cygwin DLL is used. + +NuttX buildroot Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^ + + If NuttX buildroot toolchain source tarball cne can be downloaded from the + NuttX Bitbucket download site (https://bitbucket.org/nuttx/nuttx/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh Teensy++/ + + NOTE: you also must copy avr-libc header files into the NuttX include + directory with command perhaps like: + + cp -a /cygdrive/c/WinAVR/include/avr include/. + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/avr-defconfig-4.5.2 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you + are building a toolchain for Cygwin under Windows. + +avr-libc +^^^^^^^^ + +Header Files + + In any case, header files from avr-libc are required: http://www.nongnu.org/avr-libc/. + A snapshot of avr-lib is included in the WinAVR installation. For Linux + development platforms, avr-libc package is readily available (and would + be installed in the apt-get command shown above). But if you are using + the NuttX buildroot configuration on Cygwin, then you will have to build + get avr-libc from binaries. + +Header File Installation + + The NuttX build will required that the AVR header files be available via + the NuttX include directory. This can be accomplished by either copying + the avr-libc header files into the NuttX include directory: + + cp -a /include/avr /include/. + + Or simply using a symbolic link: + + ln -s /include/avr /include/. + +Build Notes: + + It may not necessary to have a built version of avr-lib; only header files + are required. Bu if you choose to use the optimized libraru functions of + the flowing point library, then you may have to build avr-lib from sources. + Below are instructions for building avr-lib from fresh sources: + + 1. Download the avr-libc package from: + + http://savannah.nongnu.org/projects/avr-libc/ + + I am using avr-lib-1.7.1.tar.bz2 + + 2. Upack the tarball and cd into the + + tar jxf avr-lib-1.7.1.tar.bz2 + cd avr-lib-1.7.1 + + 3. Configure avr-lib. Assuming that WinAVR is installed at the following + location: + + export PATH=/cygdrive/c/WinAVR/bin:$PATH + ./configure --build=`./config.guess` --host=avr + + This takes a *long* time. + + 4. Make avr-lib. + + make + + This also takes a long time because it generates variants for nearly + all AVR chips. + + 5. Install avr-lib. + + make install + +Teensy++ Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=avr + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_AVR=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CHIP_AT90USB=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=at90usb + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip. + + CONFIG_ARCH_CHIP_AT90USB1286=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=teensy-2.0 + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_TEENSY_20=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM. One of: + + CONFIG_RAM_SIZE=(8*1024) - (8Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x800100 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_AVR_INT0=n + CONFIG_AVR_INT1=n + CONFIG_AVR_INT2=n + CONFIG_AVR_INT3=n + CONFIG_AVR_INT4=n + CONFIG_AVR_INT5=n + CONFIG_AVR_INT6=n + CONFIG_AVR_INT7=n + CONFIG_AVR_USBHOST=n + CONFIG_AVR_USBDEV=n + CONFIG_AVR_WDT=n + CONFIG_AVR_TIMER0=n + CONFIG_AVR_TIMER1=n + CONFIG_AVR_TIMER2=n + CONFIG_AVR_TIMER3=n + CONFIG_AVR_SPI=n + CONFIG_AVR_USART1=y + CONFIG_AVR_ANACOMP=n + CONFIG_AVR_ADC=n + CONFIG_AVR_TWI=n + + If the watchdog is enabled, this specifies the initial timeout. Default + is maximum supported value. + + CONFIG_WDTO_15MS + CONFIG_WDTO_30MS + CONFIG_WDTO_60MS + CONFIG_WDTO_120MS + CONFIG_WDTO_1250MS + CONFIG_WDTO_500MS + CONFIG_WDTO_1S + CONFIG_WDTO_2S + CONFIG_WDTO_4S + CONFIG_WDTO_8S + + AT90USB specific device driver settings + + CONFIG_USARTn_SERIAL_CONSOLE - selects the USARTn for the + console and ttys0 (default is no serial console). + CONFIG_USARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_USARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_USARTn_BAUD - The configure BAUD of the USART. Must be + CONFIG_USARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_USARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_USARTn_2STOP - Two stop bits + + AT90USB specific USB device configuration + + CONFIG_USB_DISABLE_PADREGULATOR + CONFIG_USB_LOWSPEED + CONFIG_USB_NOISYVBUS + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. Each Teensy++ configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh teensy-2.0/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + NOTE: You must also copy avr-libc header files, perhaps like: + + cp -a /cygdrive/c/WinAVR/include/avr include/. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume the NuttX Buildroot toolchain + under Cygwin with Windows. This is easily reconfigured: + + CONFIG_HOST_WINDOWS=y + CONFIG_WINDOWS_CYGWIN=y + CONFIG_AVR_BUILDROOT_TOOLCHAIN=y + +Configuration Sub-Directories +----------------------------- + + hello: + The simple apps/examples/hello "Hello, World!" example. + + nsh: + This is a reduce NuttShell (NSH) configuration using apps/example/nsh. + The serial console is provided on USART1 and can be accessed via + an external RS-232 driver as described above under "Serial Console". + + ostest: + This configuration directory, performs a simple OS test using + apps/examples/ostest. NOTE: The OS test is quite large. In order + to get it to fit within AVR memory constraints, it will probably be + necessary to disable some OS features. + + usbmsc: + This configuration directory exercises the USB mass storage + class driver at apps/system/usbmsc. See apps/examples/README.txt + for more information. + + NOTE: THIS CONFIGURATION HAS NOT YET BEEN DEBUGGED AND DOES NOT + WORK!!! ISSUES: (1) THE SPI DRIVER IS UNTESTED, (2) THE USB DRIVER + IS UNTESTED, AND (3) THE RAM USAGE MIGHT BE EXCESSIVE. + + Update 7/11: (1) The SPI/SD driver has been verified, however, (2) I + believe that the current teensy-2.0/usbmsc configuration uses too + much SRAM for the system to behave sanely. A lower memory footprint + version of the mass storage driver will be required before this can + be debugged. + diff --git a/configs/teensy-2.0/hello/Make.defs b/configs/teensy-2.0/hello/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..24cf2831919fa9c726f4bd40a5456012c3903847 --- /dev/null +++ b/configs/teensy-2.0/hello/Make.defs @@ -0,0 +1,101 @@ +############################################################################ +# configs/teensy-2.0/hello/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/avr/src/avr/Toolchain.defs + +LDSCRIPT = flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = $(ARCHINCLUDES) "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem "$(TOPDIR)/include" + ARCHXXINCLUDES = $(ARCHINCLUDES) -isystem "$(TOPDIR)/include/cxx" + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/teensy-2.0/hello/defconfig b/configs/teensy-2.0/hello/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..a1c37c8e317315bd3e3e98f00221eb8b6dc83fd1 --- /dev/null +++ b/configs/teensy-2.0/hello/defconfig @@ -0,0 +1,596 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +CONFIG_ARCH_AVR=y +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="avr" +CONFIG_ARCH_FAMILY="avr" +CONFIG_ARCH_CHIP="at90usb" +# CONFIG_ARCH_CHIP_ATMEGA is not set +CONFIG_ARCH_CHIP_AT90USB=y +# CONFIG_ARCH_CHIP_AT32UC3 is not set +CONFIG_ARCH_FAMILY_AVR=y +# CONFIG_ARCH_FAMILY_AVR32 is not set + +# +# AVR Configuration Options +# +# CONFIG_AVR_WINAVR_TOOLCHAIN is not set +# CONFIG_AVR_ATMEL_AVR_TOOLCHAIN is not set +CONFIG_AVR_BUILDROOT_TOOLCHAIN=y + +# +# AT90USB Configuration Options +# +# CONFIG_ARCH_CHIP_AT90USB646 is not set +# CONFIG_ARCH_CHIP_AT90USB647 is not set +CONFIG_ARCH_CHIP_AT90USB1286=y +# CONFIG_ARCH_CHIP_AT90USB1287 is not set + +# +# AT90USB Peripheral Selections +# +# CONFIG_AVR_SPI is not set +CONFIG_AVR_USART1=y +# CONFIG_AVR_USBDEV is not set +# CONFIG_AVR_WDT is not set +# CONFIG_AVR_GPIOIRQ is not set + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=864 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x800100 +CONFIG_RAM_SIZE=8192 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MICROPENDOUS3 is not set +CONFIG_ARCH_BOARD_TEENSY_20=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="teensy-2.0" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=16 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="hello_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=4 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=4 +CONFIG_NFILE_STREAMS=4 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_MODULE is not set + +# +# Work queue support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=512 +CONFIG_USERMAIN_STACKSIZE=512 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=38400 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +CONFIG_EXAMPLES_HELLO_PRIORITY=100 +CONFIG_EXAMPLES_HELLO_STACKSIZE=2048 +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/teensy-2.0/hello/setenv.sh b/configs/teensy-2.0/hello/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..6719b21010f4ff7c51898141d28893366674de0b --- /dev/null +++ b/configs/teensy-2.0/hello/setenv.sh @@ -0,0 +1,68 @@ +#!/bin/bash +# configs/teensy-2.0/hello/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel +# Studio AVR toolchain. +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/as-7/7.0/toolchain/avr8/avr8-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the WinAVR +# toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install the Linux AVR toolchain as well +#export TOOLCHAIN_BIN="/cygdrive/c/WinAVR/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_avr/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/teensy-2.0/include/board.h b/configs/teensy-2.0/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..5d53612eae18d198d4d1500538b3da3fa074d514 --- /dev/null +++ b/configs/teensy-2.0/include/board.h @@ -0,0 +1,99 @@ +/**************************************************************************** + * configs/teensy-2.0/include/board.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_TEENSY_20_INCLUDE_BOARD_H +#define __CONFIGS_TEENSY_20_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Clocking *****************************************************************/ +/* Assume default CLKDIV8 fuse setting is overridden to CLKDIV1 */ + +#define BOARD_XTAL_FREQ 16000000 /* 16MHz crystal */ +#define BOARD_CPU_CLOCK BOARD_XTAL_FREQ /* F_CPU = 16MHz */ + +/* LED definitions **********************************************************/ +/* The Teensy++ 2.0 has a single on-board LEDs connected to PortD, Pin 6 */ + /* ON OFF */ +#define LED_STARTED 0 /* OFF ON (never happens) */ +#define LED_HEAPALLOCATE 0 /* OFF ON (never happens) */ +#define LED_IRQSENABLED 0 /* OFF ON (never happens) */ +#define LED_STACKCREATED 1 /* ON ON (never happens) */ +#define LED_INIRQ 2 /* OFF NC (momentary) */ +#define LED_SIGNAL 2 /* OFF NC (momentary) */ +#define LED_ASSERTION 2 /* OFF NC (momentary) */ +#define LED_PANIC 0 /* OFF ON (1Hz flashing) */ + +/* Button definitions *******************************************************/ +/* SW1 = Connects to AT90USBxx RESET pin and is not available to software */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_TEENSY_20_INCLUDE_BOARD_H */ diff --git a/configs/teensy-2.0/nsh/Make.defs b/configs/teensy-2.0/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..726fc73f85b8b96d3948e365d27d81b2df3267d3 --- /dev/null +++ b/configs/teensy-2.0/nsh/Make.defs @@ -0,0 +1,101 @@ +############################################################################ +# configs/teensy-2.0/nsh/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/avr/src/avr/Toolchain.defs + +LDSCRIPT = flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = $(ARCHINCLUDES) "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem "$(TOPDIR)/include" + ARCHXXINCLUDES = $(ARCHINCLUDES) -isystem "$(TOPDIR)/include/cxx" + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/teensy-2.0/nsh/defconfig b/configs/teensy-2.0/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..0257552769d820237d229b6c586cd8173a6ba1ac --- /dev/null +++ b/configs/teensy-2.0/nsh/defconfig @@ -0,0 +1,694 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +CONFIG_ARCH_AVR=y +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="avr" +CONFIG_ARCH_FAMILY="avr" +CONFIG_ARCH_CHIP="at90usb" +# CONFIG_ARCH_CHIP_ATMEGA is not set +CONFIG_ARCH_CHIP_AT90USB=y +# CONFIG_ARCH_CHIP_AT32UC3 is not set +CONFIG_ARCH_FAMILY_AVR=y +# CONFIG_ARCH_FAMILY_AVR32 is not set + +# +# AVR Configuration Options +# +# CONFIG_AVR_WINAVR_TOOLCHAIN is not set +# CONFIG_AVR_ATMEL_AVR_TOOLCHAIN is not set +CONFIG_AVR_BUILDROOT_TOOLCHAIN=y + +# +# AT90USB Configuration Options +# +# CONFIG_ARCH_CHIP_AT90USB646 is not set +# CONFIG_ARCH_CHIP_AT90USB647 is not set +CONFIG_ARCH_CHIP_AT90USB1286=y +# CONFIG_ARCH_CHIP_AT90USB1287 is not set + +# +# AT90USB Peripheral Selections +# +# CONFIG_AVR_SPI is not set +CONFIG_AVR_USART1=y +# CONFIG_AVR_USBDEV is not set +# CONFIG_AVR_WDT is not set +# CONFIG_AVR_GPIOIRQ is not set + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=864 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x800100 +CONFIG_RAM_SIZE=8192 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MICROPENDOUS3 is not set +CONFIG_ARCH_BOARD_TEENSY_20=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="teensy-2.0" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2010 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=17 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=6 +CONFIG_NFILE_STREAMS=6 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=512 +CONFIG_USERMAIN_STACKSIZE=512 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=512 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=38400 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_DISABLE_SEMICOLON=y +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +CONFIG_NSH_DISABLE_EXEC=y +CONFIG_NSH_DISABLE_EXIT=y +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +CONFIG_NSH_DISABLE_HEXDUMP=y +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKFIFO=y +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +CONFIG_NSH_DISABLE_XD=y + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/teensy-2.0/nsh/setenv.sh b/configs/teensy-2.0/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..b14f17bbd107235f097618942b1d06bd34f0b412 --- /dev/null +++ b/configs/teensy-2.0/nsh/setenv.sh @@ -0,0 +1,68 @@ +#!/bin/bash +# configs/teensy-2.0/nsh/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel +# Studio AVR toolchain. +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/as-7/7.0/toolchain/avr8/avr8-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the WinAVR +# toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install the Linux AVR toolchain as well +#export TOOLCHAIN_BIN="/cygdrive/c/WinAVR/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_avr/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/teensy-2.0/scripts/flash.ld b/configs/teensy-2.0/scripts/flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..c6d5cac3e8c6d084c5ecce3a88fb4fbdd8f33f46 --- /dev/null +++ b/configs/teensy-2.0/scripts/flash.ld @@ -0,0 +1,212 @@ +/************************************************************************************ + * configs/teensy-2.0/scripts/flash.ld + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/* Memory Regions *******************************************************************/ +/* ------------ ------ ------+------- -- ------ -- ------ --- ------ ----+------- --- + * FLASH | REGISTERS I/O EXT I/O ISRAM | EEPROM + * | REGISTERS REGISTERS | + * ------------ ------ ------+------- -- ------ -- ------ --- ------ ----+------- --- + * AT90USB1286 0x0000 128Kb | 0x0000 32 0x0020 64 0x0060 160 0x0100 8Kb | 0x0000 4Kb + * ------------ ------ ------+------- -- ------ -- ------ --- ------ ----+------- --- + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0, LENGTH = 128K + sram (rw!x) : ORIGIN = 0x800100, LENGTH = 8K + eeprom (rw!x) : ORIGIN = 0x810000, LENGTH = 4K +} + +OUTPUT_FORMAT("elf32-avr","elf32-avr","elf32-avr") +OUTPUT_ARCH(avr:5) +ENTRY(__start) + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + + .rel.text : + { + *(.rel.text) + *(.rel.text.*) + *(.rel.gnu.linkonce.t*) + } + + .rela.text : + { + *(.rela.text) + *(.rela.text.*) + *(.rela.gnu.linkonce.t*) + } + + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + + .rel.rodata : + { + *(.rel.rodata) + *(.rel.rodata.*) + *(.rel.gnu.linkonce.r*) + } + + .rela.rodata : + { + *(.rela.rodata) + *(.rela.rodata.*) + *(.rela.gnu.linkonce.r*) + } + + .rel.data : + { + *(.rel.data) + *(.rel.data.*) + *(.rel.gnu.linkonce.d*) + } + + .rela.data : + { + *(.rela.data) + *(.rela.data.*) + *(.rela.gnu.linkonce.d*) + } + + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + + .text : + { + _stext = . ; + *(.vectors) + *(.init) + *(.handlers) + *(.progmem .progmem.*) + *(.text) + *(.text.*) + _etext = . ; + } > flash + + _eronly = ABSOLUTE(.); + + .data : + { + _sdata = ABSOLUTE(.); + *(.rodata .rodata.*) + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : + { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Global data not cleared after reset. */ + + .noinit : + { + _snoinit = ABSOLUTE(.); + *(.noinit*) + _enoinit = ABSOLUTE(.); + } > sram + + .eeprom : + { + _seeprom = ABSOLUTE(.); + *(.eeprom*) + _eeeprom = ABSOLUTE(.); + } > eeprom + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } +} diff --git a/configs/teensy-2.0/src/.gitignore b/configs/teensy-2.0/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/teensy-2.0/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/teensy-2.0/src/Makefile b/configs/teensy-2.0/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..48e413ceda33a3eaccfe1650f50a6b81e27d8b8c --- /dev/null +++ b/configs/teensy-2.0/src/Makefile @@ -0,0 +1,51 @@ +############################################################################ +# configs/teensy-2.0/src/Makefile +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = at90usb_boot.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += at90usb_leds.c +endif +ifeq ($(CONFIG_USBMSC),y) +CSRCS += at90usb_usbmsc.c +endif +ifeq ($(CONFIG_AVR_SPI),y) +CSRCS += at90usb_spi.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/teensy-2.0/src/at90usb_boot.c b/configs/teensy-2.0/src/at90usb_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..ad3379a42f09fe3c94bef387b1a2435d78122ae2 --- /dev/null +++ b/configs/teensy-2.0/src/at90usb_boot.c @@ -0,0 +1,92 @@ +/************************************************************************************ + * configs/teensy-2.0/src/at90usb_boot.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "at90usb.h" +#include "teensy-20.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: at90usb_boardinitialize + * + * Description: + * All AT90USB architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void at90usb_boardinitialize(void) +{ + /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak + * function at90usb_spidev_initialize() has been brought into the link. + */ + +#ifdef CONFIG_AVR_SPI + if (at90usb_spidev_initialize) + { + at90usb_spidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + at90usb_led_initialize(); +#endif +} diff --git a/configs/teensy-2.0/src/at90usb_leds.c b/configs/teensy-2.0/src/at90usb_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..9cd4821f42f518b134d7061cfc449a8b728dffbb --- /dev/null +++ b/configs/teensy-2.0/src/at90usb_leds.c @@ -0,0 +1,191 @@ +/**************************************************************************** + * configs/teensy-2.0/src/at90usb_leds.c + * + * Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "at90usb.h" +#include "teensy-20.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static bool g_ncoff; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: at90usb_led_initialize + ****************************************************************************/ + +void at90usb_led_initialize(void) +{ + /* The Teensy's single LED is on Port D, Pin 6. Configur this pin as an + * output and turn it OFF. The "other" side of the LED is onnected to + * ground through a resistor. Therefore, a logic value of 0 should turn + * the LED off. + */ + + DDRD |= (1 << 6); + PORTD &= ~(1 << 6); + g_ncoff = true; +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + /* ON OFF + * LED_STARTED 0 OFF ON (never happens) + * LED_HEAPALLOCATE 0 OFF ON (never happens) + * LED_IRQSENABLED 0 OFF ON (never happens) + * LED_STACKCREATED 1 ON ON (never happens) + * LED_INIRQ 2 OFF NC (momentary) + * LED_SIGNAL 2 OFF NC (momentary) + * LED_ASSERTION 2 OFF NC (momentary) + * LED_PANIC 0 OFF ON (1Hz flashing) + */ + + switch (led) + { + case 0: + /* The steady state is OFF */ + + g_ncoff = true; + + case 2: + /* Turn the LED off */ + + PORTD &= ~(1 << 6); + break; + + case 1: + /* The steady state is ON */ + + PORTD |= (1 << 6); + g_ncoff = false; + break; + + default: + return; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + /* ON OFF + * LED_STARTED 0 OFF ON (never happens) + * LED_HEAPALLOCATE 0 OFF ON (never happens) + * LED_IRQSENABLED 0 OFF ON (never happens) + * LED_STACKCREATED 1 ON ON (never happens) + * LED_INIRQ 2 OFF NC (momentary) + * LED_SIGNAL 2 OFF NC (momentary) + * LED_ASSERTION 2 OFF NC (momentary) + * LED_PANIC 0 OFF ON (1Hz flashing) + */ + + switch (led) + { + case 2: + /* If the "no-change" state is OFF, then turn the LED off */ + + if (g_ncoff) + { + PORTD &= ~(1 << 6); + break; + } + + /* Otherwise, fall through to turn the LED ON */ + + case 0: + case 1: + /* Turn the LED on */ + + PORTD |= (1 << 6); + break; + + default: + return; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/teensy-2.0/src/at90usb_spi.c b/configs/teensy-2.0/src/at90usb_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..77422d601e0a6485171a4b7e5bae86e004f130e5 --- /dev/null +++ b/configs/teensy-2.0/src/at90usb_spi.c @@ -0,0 +1,201 @@ +/************************************************************************************ + * configs/teensy-2.0/src/at90usb_spi.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "at90usb.h" +#include "teensy-20.h" + +#ifdef CONFIG_AVR_SPI + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Teensy SPI Connection + * + * -- ---- -- ------------------------- ------- + * J2 NAME PIN NAME PAD + * -- ---- -- ------------------------- ------- + * 1 VIN -- Connected to USB +RV + * 2 GND -- Connected to USB GND + * 3 3V3 -- Not used --- + * 4 NC -- Not used + * 5 CS 10 (SS/PCINT0) PB0 Pad B0 + * 6 DI 12 (PDI/PCINT2/MOSI) PB2 Pad B2 + * 7 SCK 11 (PCINT1/SCLK) PB1 Pad B1 + * 8 DO 13 (PDO/PCINT3/MISO) PB3 Pad B3 + * 9 IRQ -- Not used --- + * 10 CD 14 (PCINT4/OC.2A) PB4 Pad B4 + * 11 WP 15 (PCINT5/OC.1A) PB5 Pad B5 + * -- ---- -- ------------------------- ------- + */ + +#define TEENSY_CS (1 << 0) +#define TEENSY_CD (1 << 4) +#define TEENSY_WP (1 << 5) + +/* The following enable debug output from this file (needs CONFIG_DEBUG too). + * + * CONFIG_SPI_DEBUG - Define to enable basic SSP debug + * CONFIG_SPI_VERBOSE - Define to enable verbose SSP debug + */ + +#ifdef CONFIG_SPI_DEBUG +# define sspdbg lldbg +# ifdef CONFIG_SPI_VERBOSE +# define sspvdbg lldbg +# else +# define sspvdbg(x...) +# endif +#else +# undef CONFIG_SPI_VERBOSE +# define sspdbg(x...) +# define sspvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: at90usb_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the LPC1766-STK. + * + ************************************************************************************/ + +void weak_function at90usb_spidev_initialize(void) +{ + /* The Teensy board has no dedicated SPI devices so we assume that SS is used + * for chip select: + * + * "When the SPI is configured as a Master (MSTR in SPCR is set), the user + * can determine the direction of the SS pin. If SS is configured as an + * output, the pin is a general output pin which does not affect the SPI + * system. ... + * + * "If SS is configured as an input, it must be held high to ensure Master + * SPI operation. If the SS pin is driven low by peripheral circuitry when + * the SPI is configured as a Master with the SS pin defined as an input, + * the SPI system interprets this as another master selecting the SPI ... + */ + + DDRB |= TEENSY_CS; /* B0 is an output */ + PORTB |= TEENSY_CS; /* Low de-selects */ + DDRB &= ~(TEENSY_CD | TEENSY_WP); /* B4 and B5 are inputs */ + PORTB |= (TEENSY_CD | TEENSY_WP); /* Pull high */ +} + +/************************************************************************************ + * Name: avr_spiselect and avr_spistatus + * + * Description: + * The external functions, avr_spiselect and avr_spistatus must be provided by + * board-specific logic. They are implementations of the select and status methods + * of the SPI interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All + * other methods (including avr_spibus_initialize()) are provided by common AVR logic. + * To use this common SPI logic on your board: + * + * 1. Provide logic in avr_spidev_initialize() to configure SPI chip select pins. + * 2. Provide avr_spiselect() and avr_spistatus() functions in your board-specific + * logic. These functions will perform chip selection and status operations + * in the way your board is configured. + * 3. Add a calls to at90usb_spidev_initialize() in your low level application + * initialization logic + * 4. The handle returned by avr_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling mmcsd_spislotinitialize(), + * for example, will bind the SPI driver to the SPI MMC/SD driver). + * + ************************************************************************************/ + +void avr_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + /* Assert/de-assert the CS pin to the card */ + + if (selected) + { + PORTB &= ~TEENSY_CS; + } + else + { + PORTB |= TEENSY_CS; + } +} + +uint8_t avr_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + uint8_t ret = 0; + uint8_t regval = PINB; + + /* Both the CD and WP pins are pull high by the AT90USB and will be + * grounded it a card is inserted or write protected. + */ + + if ((regval & TEENSY_CD) == 0) + { + ret |= SPI_STATUS_PRESENT; + } + + if ((regval & TEENSY_WP) == 0) + { + ret |= SPI_STATUS_WRPROTECTED; + } + + sspdbg("Returning %02x\n", ret); + return ret; +} + +#endif /* CONFIG_AVR_SPI */ diff --git a/configs/teensy-2.0/src/at90usb_usbmsc.c b/configs/teensy-2.0/src/at90usb_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..d519c5d429cb57e02b1c28ee39ebb5820938c4f2 --- /dev/null +++ b/configs/teensy-2.0/src/at90usb_usbmsc.c @@ -0,0 +1,118 @@ +/**************************************************************************** + * configs/teens-2.0/src/at90usb_usbmsc.c + * + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the AVR MMC/SD SPI block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "at90usb.h" +#include "teensy-20.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_TEENSY_20 +# undef AVR_MMCSDSPIPORTNO +# define AVR_MMCSDSPIPORTNO 0 +# undef AVR_MMCSDSLOTNO +# define AVR_MMCSDSLOTNO 0 +#else + /* Add configuration for new AVR boards here */ +# error "Unrecognized AVR board" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port\n"); + + spi = avr_spibus_initialize(AVR_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: avr_spibus_initialize failed\n"); + return -ENODEV; + } + + /* Bind the SPI port to the slot */ + + syslog(LOG_INFO, "Binding SPI port to MMC/SD slot\n"); + + ret = mmcsd_spislotinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1, AVR_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: mmcsd_spislotinitialize failed: %d\n", ret); + return ret; + } + + return OK; +} diff --git a/configs/teensy-2.0/src/teensy-20.h b/configs/teensy-2.0/src/teensy-20.h new file mode 100644 index 0000000000000000000000000000000000000000..ad1f2530bb68859112b2f6f675fc66e79ba89325 --- /dev/null +++ b/configs/teensy-2.0/src/teensy-20.h @@ -0,0 +1,102 @@ +/**************************************************************************** + * configs/teensy-2.0/src/teensy-20.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_TEENSY_20_SRC_TEENSY_H +#define __CONFIGS_TEENSY_20_SRC_TEENSY_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Name: at90usb_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Teensy++ 2.0 board. + * + ************************************************************************************/ + +#ifdef CONFIG_AVR_SPI +void weak_function at90usb_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: at90usb_led_initialize + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void at90usb_led_initialize(void); +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_TEENSY_20_SRC_TEENSY_H */ diff --git a/configs/teensy-2.0/usbmsc/Make.defs b/configs/teensy-2.0/usbmsc/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..785aa0a9c623e24b7d816720d18d5c76acfeecb9 --- /dev/null +++ b/configs/teensy-2.0/usbmsc/Make.defs @@ -0,0 +1,101 @@ +############################################################################ +# configs/teensy-2.0/usbmsc/Make.defs +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/avr/src/avr/Toolchain.defs + +LDSCRIPT = flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = $(ARCHINCLUDES) "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem "$(TOPDIR)/include" + ARCHXXINCLUDES = $(ARCHINCLUDES) -isystem "$(TOPDIR)/include/cxx" + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/teensy-2.0/usbmsc/defconfig b/configs/teensy-2.0/usbmsc/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b4ec32ec9acfb473e71fe666b4d6776c22b9ad81 --- /dev/null +++ b/configs/teensy-2.0/usbmsc/defconfig @@ -0,0 +1,682 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +CONFIG_ARCH_AVR=y +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="avr" +CONFIG_ARCH_FAMILY="avr" +CONFIG_ARCH_CHIP="at90usb" +# CONFIG_ARCH_CHIP_ATMEGA is not set +CONFIG_ARCH_CHIP_AT90USB=y +# CONFIG_ARCH_CHIP_AT32UC3 is not set +CONFIG_ARCH_FAMILY_AVR=y +# CONFIG_ARCH_FAMILY_AVR32 is not set + +# +# AVR Configuration Options +# +# CONFIG_AVR_WINAVR_TOOLCHAIN is not set +# CONFIG_AVR_ATMEL_AVR_TOOLCHAIN is not set +CONFIG_AVR_BUILDROOT_TOOLCHAIN=y + +# +# AT90USB Configuration Options +# +# CONFIG_ARCH_CHIP_AT90USB646 is not set +# CONFIG_ARCH_CHIP_AT90USB647 is not set +CONFIG_ARCH_CHIP_AT90USB1286=y +# CONFIG_ARCH_CHIP_AT90USB1287 is not set + +# +# AT90USB Peripheral Selections +# +CONFIG_AVR_SPI=y +CONFIG_AVR_USART1=y +CONFIG_AVR_USBDEV=y +# CONFIG_AVR_WDT is not set +# CONFIG_AVR_GPIOIRQ is not set + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=864 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x800100 +CONFIG_RAM_SIZE=8192 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MICROPENDOUS3 is not set +CONFIG_ARCH_BOARD_TEENSY_20=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="teensy-2.0" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_USBDEVCTRL=y + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=2 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=6 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="msconn_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=6 +CONFIG_NFILE_STREAMS=6 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=512 +CONFIG_USERMAIN_STACKSIZE=512 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=512 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=38400 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +# CONFIG_CDCACM is not set +CONFIG_USBMSC=y +CONFIG_USBMSC_EP0MAXPACKET=8 +CONFIG_USBMSC_EPBULKOUT=1 +CONFIG_USBMSC_EPBULKIN=2 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_NRDREQS=2 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=64 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" +CONFIG_USBMSC_VERSIONNO=0x0399 +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USBMSC_SCSI_PRIO=128 +CONFIG_USBMSC_SCSI_STACKSIZE=512 +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +CONFIG_SYSTEM_USBMSC=y +CONFIG_SYSTEM_USBMSC_NLUNS=1 +CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mmcsd0" +CONFIG_SYSTEM_USBMSC_DEVMINOR2=1 +CONFIG_SYSTEM_USBMSC_DEVPATH2="/dev/mmcsd1" +CONFIG_SYSTEM_USBMSC_DEVMINOR3=2 +CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" +# CONFIG_SYSTEM_USBMSC_DEBUGMM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/teensy-2.0/usbmsc/setenv.sh b/configs/teensy-2.0/usbmsc/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..a19eb9c1ee5d731478c6d97b958140a762cf5914 --- /dev/null +++ b/configs/teensy-2.0/usbmsc/setenv.sh @@ -0,0 +1,68 @@ +#!/bin/bash +# configs/teensy-2.0/usbmsc/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel +# Studio AVR toolchain. +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/as-7/7.0/toolchain/avr8/avr8-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the WinAVR +# toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install the Linux AVR toolchain as well +#export TOOLCHAIN_BIN="/cygdrive/c/WinAVR/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_avr/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/teensy-3.x/Kconfig b/configs/teensy-3.x/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..eefa7e2afd2b9f0dca445433c363c08a1ae0351b --- /dev/null +++ b/configs/teensy-3.x/Kconfig @@ -0,0 +1,12 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_TEENSY_3X + +config TEENSY_3X_OVERCLOCK + bool "Overclock" + default n + +endif diff --git a/configs/teensy-3.x/README.txt b/configs/teensy-3.x/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..a43a0c08339937e18a9a5748bdffb0e306f5f8c1 --- /dev/null +++ b/configs/teensy-3.x/README.txt @@ -0,0 +1,322 @@ +README +====== + + This is a README file for the port of NuttX to the Teensy-3.1 from PJRC + (https://www.pjrc.com/). The Teensy-3.1 features the Freescale + MK20DX256VLH7 chip (now NXP). The MK20DX256VLH7 is a 64-pin Cortex-M4 + running at 72MHz. It has 256KiB of program FLASH memory and 64KiB of + SRAM. For more information about the Teensy 3.1, see + + https://www.pjrc.com/teensy/teensy31.html + https://www.pjrc.com/store/teensy31.html + + This board configuration can also be used with the older Teensy-3.0. The + Teensy-3.0 has the same schematic (although some pins are not used on the + Teensy-3.0). The primary difference is that the Teensy 3.0 has a + MK20DX128VLH5 with slightly less capability. There are many difference + between the MK20DX256VLH7 and the MK20DX128VLH5 but the basic differences + that effect how you configure NuttX are: + + --------------- -------------- -------------- --------------------------- + Feature Teensy 3.0 Teensy 3.1 Teensy 3.0 CONFIGURATION + --------------- -------------- -------------- --------------------------- + Processor + Core MK20DX128VLH5 MK20DX256VLH7 CONFIG_ARCH_CHIP_MK20DX128VLH5=y + Rated Speed 48 MHz 72 MHz See Note 1 + Overclockable 96 MHz 96 MHz CONFIG_TEENSY_3X_OVERCLOCK=y + Flash Memory 128 KB 256 KB See Note 1 + SRAM 16 KB 64 KB CONFIG_RAM_SIZE=16384 and + see Note 2 + --------------- -------------- -------------- --------------------------- + + NOTES: + 1. Settings in configs/teensy-3.x/include/board.h will automatically + select the correct clocking based on CONFIG_ARCH_CHIP_MK20DX128VLH5=y. + 2. The linker script at configs/teensy-3.x/scripts/mk30dx128vlh5.ld will + automatically be selected when CONFIG_ARCH_CHIP_MK20DX128VLH5=y. It + will use the correct FLASH and SRAM sizes. + + The initial Teensy-3.1 port is largely the effort of Jakob Odersky. + https://github.com/jodersky/nuttx/tree/teensy31-7.6 and + https://github.com/jodersky/px4-nuttx + +Contents +======== + + o STATUS + o Pin Configuration + o Serial Console + o LEDs + o Using the Halfkey Loader + o Debugging + o Teensy-3.1 Configuration settings + o Configurations + +STATUS +====== + + 2015-06-11: + After some extended tinkering with the PLL setup, the Teensy-3.1 is + fully functional using the basic NSH configuration. + 2015-06-12: + Fix LED (need high drive strength). Calibrate delay loop. + +Pin Configuration +================= + + Nearly all pins are available to the user. The few port pins used on + board are listed below: + + ----- -------------------------------------- + P0RT BOARD USAGE + ----- -------------------------------------- + PTA0 MINI54TAN / Bootloader + PTA1 MINI54TAN / Bootloader + PTA2 MINI54TAN / Bootloader + PTA3 MINI54TAN / Bootloader + PTA18 16MHz XTAL (XTAL32 is not populated). + PTA19 16MHz XTAL + PTB1 MINI54TAN / Bootloader + PTB2 MINI54TAN / Bootloader + PTC5 LED + ----- -------------------------------------- + +Serial Console +============== + + The K20 has three UARTs with pin availability as follows: + + --------- ------ ----------- ------------------------- + UART PORT BOARD PJRC PINOUT DESCRIPTION + FUNCTION LABEL + --------- ------ ----------- ------------------------- + UART0_RX PTA1 (See above) MINI54TAN / Bootloader + PTB16 Pin 0 RX1 / Touch + PTD6 Pin 21 / A7 RX1 / CS / PWM + UART0_TX PTA2 (See above) MINI54TAN / Bootloader + PTB17 Pin 1 TX1 / Touch + PTD7 Pin 5 TX1 / PWM + --------- ------ ----------- ------------------------- + UART1_RX PTC3 Pin 9 RX2 / CS / PWM + PTE1 Pad 26 (Pad on back of board) + UART1_TX PTC4 Pin 10 TX2 / CS / PWM + PTE0 Pad 31 (Pad on back of board) + --------- ------ ----------- ------------------------- + UART2_RX PTD2 Pin 7 RX3 / DOUT + UART2_TX PTD3 Pin 8 TX3 / DIN + --------- ------ ----------- ------------------------- + + The default serial console is UART0 on pins 0 (RX) and 1 (TX). + +LEDs +==== + + A single LED is available driven by PTC5. The LED is grounded + so bringing PTC5 high will illuminate the LED. + + When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + control the LED as follows: + + SYMBOL Meaning LED + ------------------- ----------------------- ------ + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt N/C + LED_SIGNAL In a signal handler N/C + LED_ASSERTION An assertion failed N/C + LED_PANIC The system has crashed FLASH + + Thus is LED is statically on, NuttX has successfully booted and is, + apparently, running normally. If LED is flashing at approximately + 2Hz, then a fatal error has been detected and the system has halted. + +Using the Halfkey Loader +======================== + + See https://www.pjrc.com/teensy/first_use.html + https://www.pjrc.com/teensy/loader_cli.html + +Debugging +========= + + And, at this point, I don't know how to debug the board. There is no + way to connect a JTAG SWD debuggger, at least not without cutting leads + to the the MINI54TAN device: + + See: http://mcuoneclipse.com/2014/08/09/hacking-the-teensy-v3-1-for-swd-debugging/ + +Teensy-3.1 Configuration settings +================================= + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="kinetis" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_MK20DX256VLH7=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD="teensy-3.x" + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_TEENSY_3X=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00008000 (32Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibrate + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + To be provided + +Configurations +============== + + Common Configuration Information + -------------------------------- + Each Teensy-3.x configurations are maintained in sub-directories and + can be selected as follow: + + cd tools + ./configure.sh teensy-3.x/ + cd - + make oldconfig + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and + perform edits as necessary so that TOOLCHAIN_BIN is the correct path to + the directory than holds your toolchain binaries. + + If this is a Windows native build, then configure.bat should be used + instead of configure.sh: + + configure.bat teensy-3.x\ + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, + nuttx. + + make oldconfig + make + + The that is provided above as an argument to the + tools/configure.sh must be is one of the directories listed below. + +NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on [To be provided]. + + 3. All of these configurations are set up to build under Windows using the + "GNU Tools for ARM Embedded Processors" that is maintained by ARM + (unless stated otherwise in the description of the configuration). + + https://launchpad.net/gcc-arm-embedded + + As of this writing (2015-03-11), full support is difficult to find + for the Cortex-M&, but is supported by at least this realeasse of + the ARM GNU tools: + + https://launchpadlibrarian.net/192228215/release.txt + + That toolchain selection can easily be reconfigured using + 'make menuconfig'. Here are the relevant current settings: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Window environment + CONFIG_WINDOWS_CYGWIN=y : Cywin under Windows + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU ARM EABI toolchain + + NOTE: As of this writing, there are issues with using this tool at + the -Os level of optimization. This has not been proven to be a + compiler issue (as least not one that might not be fixed with a + well placed volatile qualifier). However, in any event, it is + recommend that you use not more that -O2 optimization. + + Configuration sub-directories + ----------------------------- + + nsh: + + Configures the NuttShell (nsh) located at apps/examples/nsh. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + Support + for builtin applications is enabled, but in the base configuration + no builtin applications are selected (see NOTES below). \ No newline at end of file diff --git a/configs/teensy-3.x/include/board.h b/configs/teensy-3.x/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..5fc8db18e7e0e70ea43acd333b488b6f312b28ad --- /dev/null +++ b/configs/teensy-3.x/include/board.h @@ -0,0 +1,241 @@ +/************************************************************************************ + * configs/teensy-3.x/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_TEENSY_3X_INCLUDE_BOARD_H +#define __CONFIGS_TEENSY_3X_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The teensy-3.1 has a 16MHz crystal on board */ + +#undef BOARD_EXTCLOCK /* Crystal */ +#define BOARD_EXTAL_FREQ 16000000 /* 16MHz crystal frequency (REFCLK) */ +#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator (not populated) */ + +/* PLL Configuration. NOTE: Only even frequency crystals are supported that will + * produce a 2MHz reference clock to the PLL. The rated speed for the MK20DX256VLH7 + * is 72MHz and 50MHz for the MK20DX128VLH5, but according to the PJRC website, + * both can be overclocked at 96MHz + * + * MK20DX128VLH5 Rated Frequency 50MHz + * + * PLL Input frequency: PLLIN = REFCLK/PRDIV = 16MHz/8 = 2MHz + * PLL Output frequency: PLLOUT = PLLIN*VDIV = 2Mhz*25 = 50MHz + * MCG Frequency: PLLOUT = 48MHz + * + * MK20DX256VLH7 Rated Frequency 72MHz + * + * PLL Input frequency: PLLIN = REFCLK/PRDIV = 16MHz/8 = 2MHz + * PLL Output frequency: PLLOUT = PLLIN*VDIV = 2Mhz*36 = 72MHz + * MCG Frequency: PLLOUT = 72MHz + * + * Board can be overclocked at 96MHz (per PJRC.com) + * PLL Input frequency: PLLIN = REFCLK/PRDIV = 16MHz/8 = 2MHz + * PLL Output frequency: PLLOUT = PLLIN*VDIV = Mhz*48 = 96MHz + * MCG Frequency: PLLOUT = 96MHz + */ + +#if defined(CONFIG_TEENSY_3X_OVERCLOCK) +/* PLL Configuration */ + +# define BOARD_PRDIV 8 /* PLL External Reference Divider */ +# define BOARD_VDIV 48 /* PLL VCO Divider (frequency multiplier) */ + +/* SIM CLKDIV1 dividers */ + +# define BOARD_OUTDIV1 1 /* Core = MCG, 96MHz */ +# define BOARD_OUTDIV2 2 /* Bus = MCG/2, 48MHz */ +# define BOARD_OUTDIV3 2 /* FlexBus = MCG/2, 48MHz */ +# define BOARD_OUTDIV4 4 /* Flash clock = MCG/4, 24MHz */ + +#elif defined(CONFIG_ARCH_CHIP_MK20DX256VLH7) + +/* PLL Configuration */ + +# define BOARD_PRDIV 8 /* PLL External Reference Divider */ +# define BOARD_VDIV 36 /* PLL VCO Divider (frequency multiplier) */ + +/* SIM CLKDIV1 dividers */ + +# define BOARD_OUTDIV1 1 /* Core = MCG, 72MHz */ +# define BOARD_OUTDIV2 2 /* Bus = MCG/2, 36MHz */ +# define BOARD_OUTDIV3 2 /* FlexBus = MCG/2, 36MHz */ +# define BOARD_OUTDIV4 3 /* Flash clock = MCG/3, 72MHz */ + +#elif defined(CONFIG_ARCH_CHIP_MK20DX128VLH5) +/* PLL Configuration */ + +# define BOARD_PRDIV 8 /* PLL External Reference Divider */ +# define BOARD_VDIV 25 /* PLL VCO Divider (frequency multiplier) */ + +/* SIM CLKDIV1 dividers */ + +# define BOARD_OUTDIV1 1 /* Core = MCG, 50MHz */ +# define BOARD_OUTDIV2 1 /* Bus = MCG/1, 50MHz */ +# define BOARD_OUTDIV3 1 /* FlexBus = MCG/1, 20MHz */ +# define BOARD_OUTDIV4 2 /* Flash clock = MCG/2, 25MHz */ +#endif + +#define BOARD_PLLIN_FREQ (BOARD_EXTAL_FREQ / BOARD_PRDIV) +#define BOARD_PLLOUT_FREQ (BOARD_PLLIN_FREQ * BOARD_VDIV) +#define BOARD_MCG_FREQ BOARD_PLLOUT_FREQ + +#define BOARD_CORECLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV1) +#define BOARD_BUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV2) +#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3) +#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4) + +/* LED definitions ******************************************************************/ +/* A single LED is available driven by PTC5. The LED is grounded so bringing PTC5 + * high will illuminate the LED. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_BIT (1 << BOARD_LED) + +/* When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will + * control the LED as defined below. Thus if the LED is statically on, NuttX has + * successfully booted and is, apparently, running normally. If the LED is + * flashing at approximately 2Hz, then a fatal error has been detected and the + * system has halted. + */ + +#define LED_STARTED 0 /* STATUS LED=OFF */ +#define LED_HEAPALLOCATE 0 /* STATUS LED=OFF */ +#define LED_IRQSENABLED 0 /* STATUS LED=OFF */ +#define LED_STACKCREATED 1 /* STATUS LED=ON */ +#define LED_INIRQ 2 /* STATUS LED=no change */ +#define LED_SIGNAL 2 /* STATUS LED=no change */ +#define LED_ASSERTION 2 /* STATUS LED=no change */ +#define LED_PANIC 3 /* STATUS LED=flashing */ + +/* Button definitions ***************************************************************/ +/* The teensy-3.1 board has no standard GPIO contact buttons */ + +/* Alternative pin resolution *******************************************************/ +/* The K20 has three UARTs with pin availability as follows: + * + * --------- ------ ----------- ------------------------- + * UART PORT BOARD PJRC PINOUT DESCRIPTION + * FUNCTION LABEL + * --------- ------ ----------- ------------------------- + * UART0_RX PTA1 (See above) MINI54TAN / Bootloader + * PTB16 Pin 0 RX1 / Touch + * PTD6 Pin 21 / A7 RX1 / CS / PWM + * UART0_TX PTA2 (See above) MINI54TAN / Bootloader + * PTB17 Pin 1 TX1 / Touch + * PTD7 Pin 5 TX1 / PWM + * --------- ------ ----------- ------------------------- + * UART1_RX PTC3 Pin 9 RX2 / CS / PWM + * PTE1 Pad 26 (Pad on back of board) + * UART1_TX PTC4 Pin 10 TX2 / CS / PWM + * PTE0 Pad 31 (Pad on back of board) + * --------- ------ ----------- ------------------------- + * UART2_RX PTD2 Pin 7 RX3 / DOUT + * UART2_TX PTD3 Pin 8 TX3 / DIN + * --------- ------ ----------- ------------------------- + * + * The default serial console is UART0 on pins 0 (RX) and 1 (TX). + */ + +#ifdef CONFIG_KINETIS_UART0 +# define PIN_UART0_RX PIN_UART0_RX_2 +# define PIN_UART0_TX PIN_UART0_TX_2 +#endif + +#ifdef CONFIG_KINETIS_UART1 +# define PIN_UART0_RX PIN_UART1_RX_1 +# define PIN_UART0_TX PIN_UART1_TX_1 +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void kinetis_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_TEENSY_3X_INCLUDE_BOARD_H */ diff --git a/configs/teensy-3.x/nsh/Make.defs b/configs/teensy-3.x/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..597d2e8cf3e94730bcddf53bf9a1053ef7497e42 --- /dev/null +++ b/configs/teensy-3.x/nsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/teensy-3.1/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_ARCH_CHIP_MK20DX256VLH7),y) + LDSCRIPT = mk20dx256vlh7.ld +else ifeq ($(CONFIG_ARCH_CHIP_MK20DX128VLH5),y) + LDSCRIPT = mk20dx128vlh5.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/teensy-3.x/nsh/defconfig b/configs/teensy-3.x/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c66150a460b5a23c4a9d65b236ab9cd268d622c8 --- /dev/null +++ b/configs/teensy-3.x/nsh/defconfig @@ -0,0 +1,818 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +CONFIG_ARCH_CHIP_KINETIS=y +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="kinetis" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Kinetis Configuration Options +# +# CONFIG_ARCH_CHIP_MK20DN32VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DX32VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DN64VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DX64VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DN128VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DX128VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DX64VLH7 is not set +# CONFIG_ARCH_CHIP_MK20DX128VLH7 is not set +CONFIG_ARCH_CHIP_MK20DX256VLH7=y +# CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40N512VMD100 is not set +# CONFIG_ARCH_CHIP_MK40X128VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40X128VMD100 is not set +# CONFIG_ARCH_CHIP_MK40X256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40X256VMD100 is not set +# CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60N256VMD100 is not set +# CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60N512VMD100 is not set +# CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60X256VMD100 is not set +CONFIG_ARCH_FAMILY_K20=y +# CONFIG_ARCH_FAMILY_K40 is not set +# CONFIG_ARCH_FAMILY_K60 is not set + +# +# Kinetis Peripheral Support +# +# CONFIG_KINETIS_TRACE is not set +# CONFIG_KINETIS_FLEXBUS is not set +CONFIG_KINETIS_UART0=y +# CONFIG_KINETIS_UART1 is not set +# CONFIG_KINETIS_UART2 is not set +# CONFIG_KINETIS_UART3 is not set +# CONFIG_KINETIS_UART4 is not set +# CONFIG_KINETIS_UART5 is not set +# CONFIG_KINETIS_FLEXCAN0 is not set +# CONFIG_KINETIS_FLEXCAN1 is not set +# CONFIG_KINETIS_SPI0 is not set +# CONFIG_KINETIS_SPI1 is not set +# CONFIG_KINETIS_SPI2 is not set +# CONFIG_KINETIS_I2C0 is not set +# CONFIG_KINETIS_I2C1 is not set +# CONFIG_KINETIS_I2S is not set +# CONFIG_KINETIS_DAC0 is not set +# CONFIG_KINETIS_DAC1 is not set +# CONFIG_KINETIS_ADC0 is not set +# CONFIG_KINETIS_ADC1 is not set +# CONFIG_KINETIS_CMP is not set +# CONFIG_KINETIS_VREF is not set +# CONFIG_KINETIS_SDHC is not set +# CONFIG_KINETIS_FTM0 is not set +# CONFIG_KINETIS_FTM1 is not set +# CONFIG_KINETIS_FTM2 is not set +# CONFIG_KINETIS_LPTIMER is not set +# CONFIG_KINETIS_RTC is not set +# CONFIG_KINETIS_EWM is not set +# CONFIG_KINETIS_CMT is not set +# CONFIG_KINETIS_USBOTG is not set +# CONFIG_KINETIS_USBDCD is not set +# CONFIG_KINETIS_LLWU is not set +# CONFIG_KINETIS_TSI is not set +# CONFIG_KINETIS_FTFL is not set +# CONFIG_KINETIS_DMA is not set +# CONFIG_KINETIS_CRC is not set +# CONFIG_KINETIS_PDB is not set +# CONFIG_KINETIS_PIT is not set + +# +# Kinetis GPIO Interrupt Configuration +# +# CONFIG_GPIO_IRQ is not set + +# +# Kinetis UART Configuration +# +CONFIG_KINETIS_UARTFIFOS=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=6024 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x1fff8000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_TEENSY_3X=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="teensy-3.x" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_TEENSY_3X_OVERCLOCK is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/teensy-3.x/nsh/setenv.sh b/configs/teensy-3.x/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..e96a2ff3458a09086c8a1b1a1ea2249a1776125e --- /dev/null +++ b/configs/teensy-3.x/nsh/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/teensy-3.1/nsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/teensy-3.x/scripts/mk20dx128vlh5.ld b/configs/teensy-3.x/scripts/mk20dx128vlh5.ld new file mode 100644 index 0000000000000000000000000000000000000000..067b9c97654ea264a35fe1ed9f19c705787385d5 --- /dev/null +++ b/configs/teensy-3.x/scripts/mk20dx128vlh5.ld @@ -0,0 +1,142 @@ +/**************************************************************************** + * configs/teensy-3.x/scripts/mk20dx128vlh5.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The _MK20DX128VLH5 has 128Kb of FLASH beginning at address 0x0000:0000 and + * 16Kb of SRAM beginning at address 0x1c00:0000 (SRAM_L) and 0x2000:000 + * bitband region (SRAM_U). + * + * NOTE: that the first part of the K20 FLASH region is reserved for + * interrupt vectflash and, following that, is a region from 0x0000:0400 + * to 0x0000:040f that is reserved for the FLASH control fields (FCF). + * + * NOTE: The on-chip RAM is split evenly among SRAM_L and SRAM_U. The RAM is + * also implemented such that the SRAM_L and SRAM_U ranges form a + * contiguous block in the memory map. + */ + +MEMORY +{ + vectflash (rx) : ORIGIN = 0x00000000, LENGTH = 1K + cfmprotect (rx) : ORIGIN = 0x00000400, LENGTH = 16 + progflash (rx) : ORIGIN = 0x00000800, LENGTH = 128K - 2K + datasram (rwx) : ORIGIN = 0x1fffe000, LENGTH = 16K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +EXTERN(__flashconfigbytes) +SECTIONS +{ + .vectors : { + _svectors = ABSOLUTE(.); + *(.vectors) + _evectors = ABSOLUTE(.); + } > vectflash + + .cfmprotect : { + KEEP(*(.cfmconfig)) + } > cfmprotect + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progflash + + .ARM.extab : { + *(.ARM.extab*) + } > progflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progflash + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datasram AT > progflash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > datasram AT > progflash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datasram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/teensy-3.x/scripts/mk20dx256vlh7.ld b/configs/teensy-3.x/scripts/mk20dx256vlh7.ld new file mode 100644 index 0000000000000000000000000000000000000000..d909052ea3cb0891c08111d65639140e7debaca1 --- /dev/null +++ b/configs/teensy-3.x/scripts/mk20dx256vlh7.ld @@ -0,0 +1,142 @@ +/**************************************************************************** + * configs/teensy-3.x/scripts/mk20dx256vlh7.ld + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The MK20DX256VLH7 has 256Kb of FLASH beginning at address 0x0000:0000 and + * 64Kb of SRAM beginning at address 0x1c00:0000 (SRAM_L) and 0x2000:000 + * bitband region (SRAM_U). + * + * NOTE: that the first part of the K20 FLASH region is reserved for + * interrupt vectflash and, following that, is a region from 0x0000:0400 + * to 0x0000:040f that is reserved for the FLASH control fields (FCF). + * + * NOTE: The on-chip RAM is split evenly among SRAM_L and SRAM_U. The RAM is + * also implemented such that the SRAM_L and SRAM_U ranges form a + * contiguous block in the memory map. + */ + +MEMORY +{ + vectflash (rx) : ORIGIN = 0x00000000, LENGTH = 1K + cfmprotect (rx) : ORIGIN = 0x00000400, LENGTH = 16 + progflash (rx) : ORIGIN = 0x00000800, LENGTH = 256K - 2K + datasram (rwx) : ORIGIN = 0x1fff8000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +EXTERN(__flashconfigbytes) +SECTIONS +{ + .vectors : { + _svectors = ABSOLUTE(.); + *(.vectors) + _evectors = ABSOLUTE(.); + } > vectflash + + .cfmprotect : { + KEEP(*(.cfmconfig)) + } > cfmprotect + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progflash + + .ARM.extab : { + *(.ARM.extab*) + } > progflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progflash + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datasram AT > progflash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > datasram AT > progflash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datasram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/teensy-3.x/src/.gitignore b/configs/teensy-3.x/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/teensy-3.x/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/teensy-3.x/src/Makefile b/configs/teensy-3.x/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..ad839632dda729d1d17d702388c6d66d1329004a --- /dev/null +++ b/configs/teensy-3.x/src/Makefile @@ -0,0 +1,51 @@ +############################################################################ +# configs/teensy-3.x/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = k20_boot.c k20_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += k20_autoleds.c +else +CSRCS += k20_userleds.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += k20_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/teensy-3.x/src/k20_appinit.c b/configs/teensy-3.x/src/k20_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..d5cf13fe61938b053b3f223d9335401eeac677d7 --- /dev/null +++ b/configs/teensy-3.x/src/k20_appinit.c @@ -0,0 +1,78 @@ +/**************************************************************************** + * config/teensy-3.x/src/k20_appinit.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "teensy-3x.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + return OK; +} diff --git a/configs/teensy-3.x/src/k20_autoleds.c b/configs/teensy-3.x/src/k20_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..67ce3776a3003f55e3e3080d0d0b0b9b9a544970 --- /dev/null +++ b/configs/teensy-3.x/src/k20_autoleds.c @@ -0,0 +1,104 @@ +/**************************************************************************** + * configs/teensy-3.x/src/k20_autoleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "kinetis.h" +#include "teensy-3x.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + * + * Description: + * Initialize LED GPIOs so that LEDs can be controlled. + * + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + kinetis_pinconfig(GPIO_LED); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led != 2) + { + kinetis_gpiowrite(GPIO_LED, (led != 0)); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led != 2) + { + kinetis_gpiowrite(GPIO_LED, false); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/teensy-3.x/src/k20_boot.c b/configs/teensy-3.x/src/k20_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..6bd0282ddf48f564bea65e49406116aec7aed455 --- /dev/null +++ b/configs/teensy-3.x/src/k20_boot.c @@ -0,0 +1,90 @@ +/************************************************************************************ + * configs/teensy-3.x/src/k20_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "teensy-3x.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_boardinitialize + * + * Description: + * All Kinetis architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void kinetis_boardinitialize(void) +{ +#if defined(CONFIG_KINETIS_SPI1) || defined(CONFIG_KINETIS_SPI2) + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * kinetis_spidev_initialize() has been brought into the link. + */ + + if (kinetis_spidev_initialize) + { + kinetis_spidev_initialize(); + } +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} diff --git a/configs/teensy-3.x/src/k20_spi.c b/configs/teensy-3.x/src/k20_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..edd63b41354632c0bd3b41709dfa4e6996839c4f --- /dev/null +++ b/configs/teensy-3.x/src/k20_spi.c @@ -0,0 +1,163 @@ +/************************************************************************************ + * configs/teensy-3.x/src/k20_spi.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "kinetis.h" +#include "teensy-3x.h" + +#if defined(CONFIG_KINETIS_SPI1) || defined(CONFIG_KINETIS_SPI2) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef CONFIG_DEBUG_SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the KwikStik-K40 board. + * + ************************************************************************************/ + +void weak_function kinetis_spidev_initialize(void) +{ +# warning "Missing logic" +} + +/************************************************************************************ + * Name: kinetis_spi1/2/3select and kinetis_spi1/2/3status + * + * Description: + * The external functions, kinetis_spi1/2/3select and kinetis_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including kinetis_spibus_initialize()) + * are provided by common Kinetis logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in kinetis_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide kinetis_spi1/2/3select() and kinetis_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to kinetis_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by kinetis_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +#ifdef CONFIG_KINETIS_SPI1 +void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +# warning "Missing logic" +} + +uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ +# warning "Missing logic" + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_KINETIS_SPI2 +void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +# warning "Missing logic" +} + +uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ +# warning "Missing logic" + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_KINETIS_SPI3 +void kinetis_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +# warning "Missing logic" +} + +uint8_t kinetis_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ +# warning "Missing logic" + return SPI_STATUS_PRESENT; +} +#endif + +#endif /* CONFIG_KINETIS_SPI1 || CONFIG_KINETIS_SPI2 */ diff --git a/configs/teensy-3.x/src/k20_userleds.c b/configs/teensy-3.x/src/k20_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..2143d11c9df10792e2cf52a104c9cf3acdb1c14d --- /dev/null +++ b/configs/teensy-3.x/src/k20_userleds.c @@ -0,0 +1,84 @@ +/**************************************************************************** + * configs/teensy-3.x/src/kinetis_userleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "kinetis.h" +#include "teensy-3x.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + kinetis_pinconfig(GPIO_LED); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_LED) + { + kinetis_gpiowrite(GPIO_LED, ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + kinetis_gpiowrite(GPIO_LED, (ledset & BOARD_LED_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/teensy-3.x/src/teensy-3x.h b/configs/teensy-3.x/src/teensy-3x.h new file mode 100644 index 0000000000000000000000000000000000000000..0e0b16b25994f2df95923de5a73094567369f3ed --- /dev/null +++ b/configs/teensy-3.x/src/teensy-3x.h @@ -0,0 +1,107 @@ +/************************************************************************************ + * configs/teensy-3.x/src/teensy-3x.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_TEENSY_3X_SRC_TEENSY_3X_H +#define __CONFIGS_TEENSY_3X_SRC_TEENSY_3X_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* How many SPI modules does this chip support? The LM3S6918 supports 2 SPI + * modules (others may support more -- in such case, the following must be + * expanded). + */ + +#if KINETIS_NSPI < 1 +# undef CONFIG_KINETIS_SPI1 +# undef CONFIG_KINETIS_SPI2 +#elif KINETIS_NSPI < 2 +# undef CONFIG_KINETIS_SPI2 +#endif + +/* Teensy 3.1 GPIOs *****************************************************************/ +/* A single LED is available driven by PTC5. The LED is grounded so bringing PTC5 + * high will illuminate the LED. + */ + +#define GPIO_LED (GPIO_HIGHDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTC | PIN5) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the KwikStik-K40 board. + * + ************************************************************************************/ + +extern void weak_function kinetis_spidev_initialize(void); + +/************************************************************************************ + * Name: kinetis_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the KwikStik-K40 board. + * + ************************************************************************************/ + +extern void weak_function kinetis_usbinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_TEENSY_3X_SRC_TEENSY_3X_H */ + diff --git a/configs/teensy-lc/Kconfig b/configs/teensy-lc/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..2679d39b0980f1b854665abeff39d29819661be0 --- /dev/null +++ b/configs/teensy-lc/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_TEENSY_LC +endif diff --git a/configs/teensy-lc/README.txt b/configs/teensy-lc/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..94c8890a50059af31e8bff1a30d2ca9bd3272dd2 --- /dev/null +++ b/configs/teensy-lc/README.txt @@ -0,0 +1,34 @@ +Teensy LC README +================ + + This is the README file for NuttX on the PJRC Teensy LC. The Teensy LC + is a DIP style breakout board for the MKL25Z64 and comes with a USB + based bootloader. Contributed by Michael Hope. + +Development Environment +======================= + + All testing was done with the GNU ARM Embedded 4.9 toolchain on + Linux. See https://launchpad.net/gcc-arm-embedded to download. + + Once you've configured and built NuttX, flash the resulting + nuttx.hex file to the board using the Teensy Loader Application. + +LEDs +==== + + The Teensy LC has a single LED. If CONFIG_ARCH_LEDS is defined, then + NuttX will update the LED as the board boots. The summary is: + + * LED off: board booting + * LED on: initial stack created + * LED flashing: panic. + + See `include/board.h` for details. + +Serial Console +============== + + The serial console is mapped to UART0 and appears on pins 0 (RX) and + 1 (TX). Consider using a 3.3 V USB to serial adapter such as the + Sparkfun #9717 FTDI cable. diff --git a/configs/teensy-lc/include/board.h b/configs/teensy-lc/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..a1a9173b7e9c29eaed2c96c6c4c216f6b9ef2acf --- /dev/null +++ b/configs/teensy-lc/include/board.h @@ -0,0 +1,177 @@ +/************************************************************************************ + * configs/teensy-lc/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The board has a 16MHz crystal. */ + +#undef BOARD_EXTCLOCK /* Crystal */ +#define BOARD_XTAL_FREQ 16000000 /* 16 MHz crystal frequency (REFCLK) */ + +/* PLL Configuration. + * + * PLL Input frequency: PLLIN = REFCLK / PRDIV0 = 16MHz / 4 = 4 MHz + * PLL Output frequency: PLLOUT = PLLIN * VDIV0 = 4Mhz * 24 = 96 MHz + * MCGPLLCLK Frequency: MCGPLLCLK = 96MHz + */ + +#define BOARD_PRDIV0 4 /* PLL External Reference Divider */ +#define BOARD_VDIV0 24 /* PLL VCO Divider (frequency multiplier) */ + +#define BOARD_PLLIN_FREQ (BOARD_XTAL_FREQ / BOARD_PRDIV0) +#define BOARD_PLLOUT_FREQ (BOARD_PLLIN_FREQ * BOARD_VDIV0) +#define BOARD_MCGPLLCLK_FREQ BOARD_PLLOUT_FREQ + +/* MCGOUTCLK: MCG output of either IRC, MCGFLLCLK, MCGPLLCLK, or MCG's external + * reference clock that sources the core, system, bus, and flash clock. + * + * MCGOUTCLK = MCGPLLCLK = 96MHz + */ + +#define BOARD_MCGOUTCLK_FREQ BOARD_MCGPLLCLK_FREQ + +/* SIM CLKDIV1 dividers. + * + * Core/system clock + * MCGOUTCLK divided by OUTDIV1, clocks the ARM Cortex-M0+ core + * + * Bus clock + * System clock divided by OUTDIV4, clocks the bus slaves and peripherals. + */ + +#define BOARD_OUTDIV1 2 /* Core/system = MCGOUTCLK / 2 = 48 MHz */ +#define BOARD_OUTDIV4 2 /* Bus clock = System clock / 2 = 24 MHz */ + +#define BOARD_CORECLK_FREQ (BOARD_MCGOUTCLK_FREQ / BOARD_OUTDIV1) +#define BOARD_BUSCLK_FREQ (BOARD_CORECLK_FREQ / BOARD_OUTDIV4) + +/* PWM Configuration */ +/* TPM0 Channels */ + +#define GPIO_TPM0_CH0OUT PIN_TPM0_CH0_2 // Pin 22: PTC1 +#define GPIO_TPM0_CH1OUT PIN_TPM0_CH1_2 // Pin 23: PTC2 +#define GPIO_TPM0_CH2OUT PIN_TPM0_CH2_2 // Pin 9: PTC3 +#define GPIO_TPM0_CH3OUT PIN_TPM0_CH3_1 // Pin 10: PTC4 +#define GPIO_TPM0_CH4OUT PIN_TPM0_CH4_2 // Pin 6: PTD4 +#define GPIO_TPM0_CH5OUT PIN_TPM0_CH5_3 // Pin 20: PTD5 + +/* TPM1 Channels */ + +#define GPIO_TPM1_CH0OUT PIN_TPM1_CH0_2 // Pin 16: PTB0 +#define GPIO_TPM1_CH1OUT PIN_TPM1_CH1_2 // Pin 17: PTB1 + +/* TPM2 Channels */ + +#define GPIO_TPM2_CH0OUT PIN_TPM2_CH0_1 // Pin 3: PTA1 +#define GPIO_TPM2_CH1OUT PIN_TPM2_CH1_1 // Pin 4: PTA2 + +/* LED definitions ******************************************************************/ +/* The Teensy LC has a single LED. */ +#define LED_STARTED 0 /* LED off */ +#define LED_HEAPALLOCATE 0 /* LED off */ +#define LED_IRQSENABLED 0 /* LED off */ +#define LED_STACKCREATED 1 /* LED on */ +#define LED_INIRQ 2 /* LED no change */ +#define LED_SIGNAL 2 /* LED no change */ +#define LED_ASSERTION 2 /* LED no change */ +#define LED_PANIC 3 /* LED flashing */ + +/* SPI0 Pinout + * =========== + * + */ + +/* Note that the Teensy maps SCK0 to pin 13 which conflicts with the + * LED. Use pin 14 instead. */ +#define PIN_SPI0_SCK (PIN_SPI0_SCK_3 | PIN_ALT2_PULLUP) // Pin 14: PTD1 +#define PIN_SPI0_MISO (PIN_SPI0_MISO_4 | PIN_ALT2_PULLUP) // Pin 12: PTC7 +#define PIN_SPI0_MOSI (PIN_SPI0_MOSI_3 | PIN_ALT2_PULLUP) // Pin 11: PTC6 + +#define PIN_SPI1_SCK (PIN_SPI1_SCK_2 | PIN_ALT2_PULLUP) // Pin 20: PTD5 +#define PIN_SPI1_MISO (PIN_SPI1_MISO_2 | PIN_ALT2_PULLUP) // Pin 1: PTB17 +#define PIN_SPI1_MOSI (PIN_SPI0_MOSI_1 | PIN_ALT2_PULLUP) // Pin 0: PTB16 + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: kl_boardinitialize + * + * Description: + * All Kinetis L architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void kl_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/teensy-lc/nsh/Make.defs b/configs/teensy-lc/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f70645f9e8fad2842f60911b6ed9b3e2f9d8f64e --- /dev/null +++ b/configs/teensy-lc/nsh/Make.defs @@ -0,0 +1,124 @@ +############################################################################ +# configs/teensy-lc/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv6-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) +endif + diff --git a/configs/teensy-lc/nsh/defconfig b/configs/teensy-lc/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..07296c553f41c00c4dd8b033b314d18f10b028e1 --- /dev/null +++ b/configs/teensy-lc/nsh/defconfig @@ -0,0 +1,806 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_VERBOSE=y + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_PWM is not set +# CONFIG_DEBUG_SPI is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_CUSTOMOPT=y +# CONFIG_DEBUG_FULLOPT is not set +CONFIG_DEBUG_OPTLEVEL="-Os" + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +CONFIG_ARCH_CHIP_KL=y +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +CONFIG_ARCH_CORTEXM0=y +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv6-m" +CONFIG_ARCH_CHIP="kl" +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set + +# +# ARMV6M Configuration Options +# +# CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_GPIO_IRQ is not set + +# +# Kinetis Configuration Options +# +CONFIG_ARCH_CHIP_MKL25Z64=y +# CONFIG_ARCH_CHIP_MKL25Z128 is not set +# CONFIG_ARCH_CHIP_MKL26Z128 is not set +CONFIG_ARCH_FAMILY_KL2X=y + +# +# Kinetis Peripheral Support +# +# CONFIG_KL_TRACE is not set +# CONFIG_KL_FLEXBUS is not set +CONFIG_KL_UART0=y +# CONFIG_KL_UART1 is not set +# CONFIG_KL_UART2 is not set +# CONFIG_KL_FLEXCAN0 is not set +# CONFIG_KL_FLEXCAN1 is not set +CONFIG_KL_SPI0=y +CONFIG_KL_SPI1=y +# CONFIG_KL_SPI2 is not set +CONFIG_KL_I2C0=y +CONFIG_KL_I2C1=y +# CONFIG_KL_I2S is not set +# CONFIG_KL_DAC0 is not set +# CONFIG_KL_DAC1 is not set +# CONFIG_KL_ADC0 is not set +# CONFIG_KL_ADC1 is not set +# CONFIG_KL_CMP is not set +# CONFIG_KL_VREF is not set +CONFIG_KL_TPM0=y +CONFIG_KL_TPM1=y +CONFIG_KL_TPM2=y +# CONFIG_KL_LPTIMER is not set +# CONFIG_KL_RTC is not set +# CONFIG_KL_EWM is not set +# CONFIG_KL_CMT is not set +# CONFIG_KL_USBOTG is not set +# CONFIG_KL_USBDCD is not set +# CONFIG_KL_LLWU is not set +# CONFIG_KL_TSI is not set +# CONFIG_KL_FTFL is not set +# CONFIG_KL_DMA is not set +# CONFIG_KL_CRC is not set +# CONFIG_KL_PDB is not set +# CONFIG_KL_PIT is not set +CONFIG_KL_SYSTICK_CORECLK=y +# CONFIG_KL_SYSTICK_CORECLK_DIV16 is not set +CONFIG_KL_TPM0_PWM=y +CONFIG_KL_TPM0_CHANNEL=0 +CONFIG_KL_TPM1_PWM=y +CONFIG_KL_TPM1_CHANNEL=0 +CONFIG_KL_TPM2_PWM=y +CONFIG_KL_TPM2_CHANNEL=0 + +# +# Kinetis GPIO Interrupt Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=2988 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x1FFFF800 +CONFIG_RAM_SIZE=8192 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_TEENSY_LC=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="teensy-lc" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2015 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=6 +CONFIG_NFILE_STREAMS=6 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1536 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +CONFIG_PWM=y +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +CONFIG_C99_BOOL8=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PWM is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +CONFIG_NSH_DISABLE_CD=y +CONFIG_NSH_DISABLE_CP=y +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +CONFIG_NSH_DISABLE_MKDIR=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +CONFIG_NSH_DISABLE_MOUNT=y +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +CONFIG_NSH_DISABLE_RM=y +CONFIG_NSH_DISABLE_RMDIR=y +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_UMOUNT=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=64 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +CONFIG_SYSTEM_STACKMONITOR=y +CONFIG_SYSTEM_STACKMONITOR_STACKSIZE=2048 +CONFIG_SYSTEM_STACKMONITOR_PRIORITY=50 +CONFIG_SYSTEM_STACKMONITOR_INTERVAL=2 +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/teensy-lc/nsh/setenv.sh b/configs/teensy-lc/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..3bba390239abb4813ab0ab2ee5a4288a26d2103e --- /dev/null +++ b/configs/teensy-lc/nsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/teensy-lc/nsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/teensy-lc/scripts/ld.script b/configs/teensy-lc/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..e13e64540eae4404a8086774ece2ad182d9e3f9a --- /dev/null +++ b/configs/teensy-lc/scripts/ld.script @@ -0,0 +1,134 @@ +/**************************************************************************** + * configs/teensy-lc/scripts/ld.script + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The Teensy LC has 64kB of flash and 8 kB of RAM. 2 kB of flash is */ +/* reserved for the bootloader. + */ + +MEMORY +{ + vectflash (rx) : ORIGIN = 0x00000000, LENGTH = 0x00c0 + cfmprotect (rx) : ORIGIN = 0x00000400, LENGTH = 0x10 + progflash (rx) : ORIGIN = 0x00000410, LENGTH = 64K - 2K - 0x410 + datasram (rwx) : ORIGIN = 0x1ffff800, LENGTH = 8K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +EXTERN(_cfmconfig) +ENTRY(_stext) +SECTIONS +{ + .vectors : { + _svectors = ABSOLUTE(.); + *(.vectors) + _evectors = ABSOLUTE(.); + } > vectflash + + .cfmprotect : { + *(.cfmconfig) + } > cfmprotect + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progflash + + .ARM.extab : { + *(.ARM.extab*) + } > progflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progflash + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datasram AT > progflash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > datasram AT > progflash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datasram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/teensy-lc/src/.gitignore b/configs/teensy-lc/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/teensy-lc/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/teensy-lc/src/Makefile b/configs/teensy-lc/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..2c45c57561d8285827d09cfa3fb84a4c2c130dd8 --- /dev/null +++ b/configs/teensy-lc/src/Makefile @@ -0,0 +1,61 @@ +############################################################################ +# configs/teensy-lc/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = kl_boardinitialize.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += kl_appinit.c +endif + +ifeq ($(CONFIG_KL_SPI0),y) +CSRCS += kl_spi.c +else +ifeq ($(CONFIG_KL_SPI1),y) +CSRCS += kl_spi.c +endif +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += kl_led.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += kl_pwm.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/teensy-lc/src/kl_appinit.c b/configs/teensy-lc/src/kl_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..8d96c28e763bc0c8dc4b98b1c1f712298afe3dfe --- /dev/null +++ b/configs/teensy-lc/src/kl_appinit.c @@ -0,0 +1,73 @@ +/**************************************************************************** + * config/teensy-lc/src/kl_appinit.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#ifdef CONFIG_LIB_BOARDCTL + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + return OK; +} + +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/configs/teensy-lc/src/kl_boardinitialize.c b/configs/teensy-lc/src/kl_boardinitialize.c new file mode 100644 index 0000000000000000000000000000000000000000..c99ef36673149869a186cee5541c5549aac19ff8 --- /dev/null +++ b/configs/teensy-lc/src/kl_boardinitialize.c @@ -0,0 +1,142 @@ +/************************************************************************************ + * configs/teensy-lc/src/up_boot.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include +#include "chip.h" +#include "kl_gpio.h" +#include "chip/kl_pinmux.h" + +#include "up_arch.h" +#include "teensy-lc.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kl_boardinitialize + * + * Description: + * All K25Z architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void kl_boardinitialize(void) +{ +#if defined(CONFIG_KL_UART0) + /* Remap UART0 to the standard pins. */ + + kl_configgpio(PIN_PORTA | PIN2); + kl_configgpio(PIN_PORTA | PIN1); + kl_configgpio(PIN_UART0_RX_3); + kl_configgpio(PIN_UART0_TX_3); +#endif + + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * kl_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1) + if (kl_spidev_initialize) + { + kl_spidev_initialize(); + } +#endif + + /* Initialize USB if the 1) USB device controller is in the configuration + * and 2) disabled, and 3) the weak function kl_usbinitialize() has been + * brought into the build. Presumably either CONFIG_USBHOST or + * CONFIG_USBDEV is also selected. + */ + +#ifdef CONFIG_KL_USBOTG + if (kl_usbinitialize) + { + kl_usbinitialize(); + } +#endif + + /* Configure on-board LED if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + kl_led_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intitialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + (void)board_app_initialize(); +#endif +} +#endif diff --git a/configs/teensy-lc/src/kl_led.c b/configs/teensy-lc/src/kl_led.c new file mode 100644 index 0000000000000000000000000000000000000000..fbc967208de0a2df1f8aeaa6019da7b67b556338 --- /dev/null +++ b/configs/teensy-lc/src/kl_led.c @@ -0,0 +1,124 @@ +/**************************************************************************** + * configs/teensy-lc/src/kl_led.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "kl_gpio.h" +#include "teensy-lc.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: kl_led_initialize + * + * Description: + * Initialize the on-board LED + * + ****************************************************************************/ + +void kl_led_initialize(void) +{ + kl_configgpio(GPIO_LED); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led != 0) + { + kl_gpiowrite(GPIO_LED, true); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == 3) + { + kl_gpiowrite(GPIO_LED, false); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/teensy-lc/src/kl_pwm.c b/configs/teensy-lc/src/kl_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..94c84397bea37db296afb5a161f3f50fae990774 --- /dev/null +++ b/configs/teensy-lc/src/kl_pwm.c @@ -0,0 +1,122 @@ +/************************************************************************************ + * configs/teensy-lc/src/kl_pwm.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "kl_pwm.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ +/* PWM + * + * The Kinetis Freedom board provides a LED on GPIO. + */ + +#ifdef CONFIG_PWM + +extern struct pwm_lowerhalf_s *kl_pwminitialize(int timer); + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All Kinetis KL architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call kl_pwminitialize() to get an instance of the PWM interface */ + + pwm = kl_pwminitialize(0); + if (!pwm) + { + adbg("Failed to get the KL25 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/teensy-lc/src/kl_spi.c b/configs/teensy-lc/src/kl_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..4227fea056a948691fd26ff4c4e1746bc1c4ad9f --- /dev/null +++ b/configs/teensy-lc/src/kl_spi.c @@ -0,0 +1,233 @@ +/**************************************************************************** + * configs/teensy-lc/src/kl_spi.c + * + * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "kl_gpio.h" +#include "kl_spi.h" +#include "teensy-lc.h" + +#if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: kl_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the FRDM-KL25Z board. + * + ****************************************************************************/ + +void weak_function kl_spidev_initialize(void) +{ + /* Configure SPI0 chip selects */ + +#ifdef CONFIG_KL_SPI0 +#endif + + /* Configure SPI1 chip selects */ + +#ifdef CONFIG_KL_SPI1 +#endif +} + +/**************************************************************************** + * Name: kl_spi[n]select, kl_spi[n]status, and kl_spi[n]cmddata + * + * Description: + * These external functions must be provided by board-specific logic. They + * are implementations of the select, status, and cmddata methods of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All + * other methods including kl_spibus_initialize()) are provided by common + * Kinetis logic. To use this common SPI logic on your board: + * + * 1. Provide logic in kl_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide kl_spi[n]select() and kl_spi[n]status() functions + * in your board-specific logic. These functions will perform chip + * selection and status operations using GPIOs in the way your board + * is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * kl_spi[n]cmddata() functions in your board-specific logic. These + * functions will perform cmd/data selection operations using GPIOs in + * the way your board is configured. + * 3. Add a call to kl_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by kl_spibus_initialize() may then be used to bind + * the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ +/**************************************************************************** + * Name: kl_spi[n]select + * + * Description: + * PIO chip select pins may be programmed by the board specific logic in + * one of two different ways. First, the pins may be programmed as SPI + * peripherals. In that case, the pins are completely controlled by the + * SPI driver. This method still needs to be provided, but it may be only + * a stub. + * + * An alternative way to program the PIO chip select pins is as a normal + * GPIO output. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the GPIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + * + * Input Parameters: + * devid - Identifies the (logical) device + * selected - TRUE:Select the device, FALSE:De-select the device + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_KL_SPI0 +void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ + spivdbg("devid: %d CS: %s\n", + (int)devid, selected ? "assert" : "de-assert"); +} +#endif + +#ifdef CONFIG_KL_SPI1 +void kl_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) +{ + spivdbg("devid: %d CS: %s\n", + (int)devid, selected ? "assert" : "de-assert"); +} +#endif + +/**************************************************************************** + * Name: kl_spi[n]status + * + * Description: + * Return status information associated with the SPI device. + * + * Input Parameters: + * devid - Identifies the (logical) device + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef CONFIG_KL_SPI0 +uint8_t kl_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_KL_SPI1 +uint8_t kl_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: kl_spi[n]cmddata + * + * Description: + * Some SPI interfaces, particularly with LCDs, and an auxiliary 9th data + * input that determines where the other 8 data bits represent command or + * data. These interfaces control that CMD/DATA GPIO output + * + * Input Parameters: + * devid - Identifies the (logical) device + * cmd - Determines where command or data should be selected. + * + * Returned Values: + * Bit-encoded SPI status (see include/nuttx/spi/spi.h. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_KL_SPI0 +int kl_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return 0; +} +#endif + +#ifdef CONFIG_KL_SPI1 +int kl_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return 0; +} +#endif +#endif + +#endif /* CONFIG_KL_SPI */ diff --git a/configs/teensy-lc/src/teensy-lc.h b/configs/teensy-lc/src/teensy-lc.h new file mode 100644 index 0000000000000000000000000000000000000000..048fcaeab431fb0a4d966d30740be2afcf903bf9 --- /dev/null +++ b/configs/teensy-lc/src/teensy-lc.h @@ -0,0 +1,96 @@ +/**************************************************************************** + * configs/teensy-lc/src/teensy-lc.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_TEENSY_LC_SRC_TEENSY_LC_H +#define __CONFIGS_TEENSY_LC_SRC_TEENSY_LC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#define GPIO_LED (GPIO_OUTPUT | GPIO_OUTPUT_ONE | PIN_PORTC | PIN5) + +/* Button definitions *******************************************************/ + +/* Chip selects *************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: kl_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Freedom KL25Z board. + * + ****************************************************************************/ + +void weak_function kl_spidev_initialize(void); + +/**************************************************************************** + * Name: kl_led_initialize + * + * Description: + * Initialize the on-board LED + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void kl_led_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_TEENSY_LC_SRC_TEENSY_LC_H */ + diff --git a/configs/tm4c123g-launchpad/Kconfig b/configs/tm4c123g-launchpad/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..7a135ff15b86c944c91bad49dc6a63c88d12f114 --- /dev/null +++ b/configs/tm4c123g-launchpad/Kconfig @@ -0,0 +1,46 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_TM4C123G_LAUNCHPAD + +config TM4C123G_LAUNCHPAD_AT24_BLOCKMOUNT + bool "AT24 Serial EEPROM auto-mount" + default n + depends on NSH_ARCHINIT && TIVA_I2C0 && MTD_AT24XX + ---help--- + Automatically initialize the AT24 SPI EEPROM driver when NSH starts. + + The Serial EEPROM was mounted on an external adaptor board and + connected to the LaunchPad thusly: + + - VCC -- VCC + - GND -- GND + - PB2 -- SCL + - PB3 -- SDA + +choice + prompt "AT24 serial EPPROM configuration" + default TM4C123G_LAUNCHPAD_AT24_FTL + depends on TM4C123G_LAUNCHPAD_AT24_BLOCKMOUNT + +config TM4C123G_LAUNCHPAD_AT24_FTL + bool "Create AT24 block driver" + ---help--- + Create the MTD driver for the AT24 and "wrap" the AT24 as a standard + block driver that could then, for example, be mounted using FAT or + any other file system. Any file system may be used, but there will + be no wear-leveling. + +config TM4C123G_LAUNCHPAD_AT24_NXFFS + bool "Create AT24 NXFFS file system" + depends on FS_NXFFS + ---help--- + Create the MTD driver for the AT24 and mount the AT24 device as + a wear-leveling, NuttX FLASH file system (NXFFS). The downside of + NXFFS is that it can be very slow. + +endchoice # AT24 serial EPPROM configuration + +endif diff --git a/configs/tm4c123g-launchpad/README.txt b/configs/tm4c123g-launchpad/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..e4554002cf70e4c6d3cb370b77ec865869a58936 --- /dev/null +++ b/configs/tm4c123g-launchpad/README.txt @@ -0,0 +1,794 @@ +README +====== + +README for NuttX port to the Tiva TM4C123G LaunchPad. The Tiva TM4C123G +LaunchPad Evaluation Board is a low-cost evaluation platform for ARM® +Cortex™-M4F-based microcontrollers from Texas Instruments. + +Contents +======== + + On-Board GPIO Usage + Development Environment + GNU Toolchain Options + IDEs + NuttX EABI "buildroot" Toolchain + NuttX OABI "buildroot" Toolchain + NXFLAT Toolchain + LEDs + Serial Console + USB Device Controller Functions + AT24 Serial EEPROM + I2C Tool + Using OpenOCD and GDB with an FT2232 JTAG emulator + TM4C123G LaunchPad Configuration Options + Configurations + +On-Board GPIO Usage +=================== + +PIN SIGNAL(S) LanchPad Function +--- ---------------------------------------- --------------------------------------- + 17 PA0/U0RX DEBUG/VCOM, Virtual COM port receive + 18 PA1/U0TX DEBUG/VCOM, Virtual COM port transmit + 19 PA2/SSIOCLK GPIO, J2 pin 10 + 20 PA3/SSIOFSS GPIO, J2 pin 9 + 21 PA4/SSIORX GPIO, J2 pin 8 + 22 PA5/SSIOTX GPIO, J1 pin 8 + 23 PA6/I2CLSCL GPIO, J1 pin 9 + 24 PA7/I2CLSDA GPIO, J1 pin 10 + + 45 PB0/T2CCP0/U1Rx GPIO, J1 pin 3 + 46 PB1/T2CCP1/U1Tx GPIO, J1 pin 4 + 47 PB2/I2C0SCL/T3CCP0 GPIO, J2 pin 2 + 48 PB3/I2C0SDA/T3CCP1 GPIO, J4 pin 3 + 58 PB4/AIN10/CAN0Rx/SSI2CLK/T1CCP0 GPIO, J1 pin 7 + 57 PB5/AIN11/CAN0Tx/SSI2FSS/T1CCP1 GPIO, J1 pin 2 + 01 PB6/SSI2RX/T0CCP0 Connects to PD0 via resistor, GPIO, J2 pin 7 + 04 PB7/SSI2TX/T0CCP1 Connects to PD1 via resistor, GPIO, J2 pin 6 + + 52 PC0/SWCLK/T4CCP0/TCK DEBUG/VCOM + 51 PC1/SWDIO/T4CCP1/TMS DEBUG/VCOM + 50 PC2/T5CCP0/TDI DEBUG/VCOM + 49 PC3/SWO/T5CCP1/TDO DEBUG/VCOM + 16 PC4/C1-/U1RTS/U1RX/U4RX/WT0CCP0 GPIO, J4 pin 4 + 15 PC5/C1+/U1CTS/U1TX/U4TX/WT0CCP1 GPIO, J4 pin 5 + 14 PC6/C0+/U3RX/WT1CCP0 GPIO, J4 pin 6 + 13 PC7/C0-/U3TX/WT1CCP1 GPIO, J4 pin 7 + + 61 PD0/AIN7/I2C3SCL/SSI1CLK/SSI3CLKWT2CCP0 Connects to PB6 via resistor, GPIO, J3 pin 3 + 62 PD1/AIN6/I2C3SDA/SSI1Fss/SSI3Fss/WT2CCP1 Connects to PB7 via resistor, GPIO, J3 Pin 4 + 63 PD2/AIN5/SSI1RX/SSI3RX/WT3CCP0 GPIO, J3 pin 5 + 64 PD3/AIN4/SSI1TX/SSI3TX/WT3CCP1 GPIO, J3 pin 6 + 43 PD4/U6RX/USB0DM/WT4CCP0 USB_DM + 44 PD5/U6TX/USB0DP/WT4CCP1 USB_DP + 53 PD6/U2RX/WT5CCP0 GPIO, J4 pin 8 + 10 PD7/NMI/U2TX/WT5CCP1 +USB_VBUS, GPIO, J4 pin 9 + Used for VBUS detection when + configured as a self-powered USB + Device + + 09 PE0/AIN3/U7RX GPIO, J2 pin 3 + 08 PE1/AIN2/U7TX GPIO, J3 pin 7 + 07 PE2/AIN1 GPIO, J3 pin 8 + 06 PE3/AIN0 GPIO, J3 pin 9 + 59 PE4/AIN9/CAN0RX/I2C2SCL/U5RX GPIO, J1 pin 5 + 60 PE5/AIN8/CAN0TX/I2C2SDA/U5TX GPIO, J1 pin 6 + + 28 PF0/C0O/CAN0RX/NMI/SSI1RX/T0CCP0/U1RTS USR_SW2 (Low when pressed), GPIO, J2 pin 4 + 29 PF1/C1O/SSI1TX/T0CCP1/TRD1/U1CTS LED_R, GPIO, J3 pin 10 + 30 PF2/SSI1CLK/T1CCP0/TRD0 LED_B, GPIO, J4 pin 1 + 31 PF3/CAN0TX/SSI1FSS/T1CCP1/TRCLK LED_G, GPIO, J4 pin 2 + 05 PF4/T2CCP0 USR_SW1 (Low when pressed), GPIO, J4 pin 10 + +AT24 Serial EEPROM +================== + + AT24 Connections + ---------------- + + A AT24C512 Serial EEPPROM was used for tested I2C. There are no I2C + devices on-board the Launchpad, but an external serial EEPROM module + module was used. + + The Serial EEPROM was mounted on an external adaptor board and connected + to the LaunchPad thusly: + + - VCC J1 pin 1 3.3V + J3 pin 1 5.0V + - GND J2 pin 1 GND + J3 pin 2 GND + - PB2 J2 pin 2 SCL + - PB3 J4 pin 3 SDA + + Configuration Settings + ---------------------- + + The following configuration settings were used: + + System Type -> Tiva/Stellaris Peripheral Support + CONFIG_TIVA_I2C0=y : Enable I2C + + System Type -> I2C device driver options + TIVA_I2C_FREQUENCY=100000 : Select an I2C frequency + + Device Drivers -> I2C Driver Support + CONFIG_I2C=y : Enable I2C support + + Device Drivers -> Memory Technology Device (MTD) Support + CONFIG_MTD=y : Enable MTD support + CONFIG_MTD_AT24XX=y : Enable the AT24 driver + CONFIG_AT24XX_SIZE=512 : Specifies the AT 24C512 part + CONFIG_AT24XX_ADDR=0x53 : AT24 I2C address + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + File systems + CONFIG_NXFFS=y : Enables the NXFFS file system + CONFIG_NXFFS_PREALLOCATED=y : Required + : Other defaults are probably OK + + Board Selection + CONFIG_TM4C123G_LAUNCHPAD_AT24_BLOCKMOUNT=y : Mounts AT24 for NSH + CONFIG_TM4C123G_LAUNCHPAD_AT24_NXFFS=y : Mount the AT24 using NXFFS + + You can then format the AT24 EEPROM for a FAT file system and mount the + file system at /mnt/at24 using these NSH commands: + + nsh> mkfatfs /dev/mtdblock0 + nsh> mount -t vfat /dev/mtdblock0 /mnt/at24 + + Then you an use the FLASH as a normal FAT file system: + + nsh> echo "This is a test" >/mnt/at24/atest.txt + nsh> ls -l /mnt/at24 + /mnt/at24: + -rw-rw-rw- 16 atest.txt + nsh> cat /mnt/at24/atest.txt + This is a test + + STATUS: + 2014-12-12: I was unsuccessful getting my AT24 module to work on the TM4C123G + LaunchPad. I was unable to successuflly communication with the AT24 via + I2C. I did verify I2C using the I2C tool and other I2C devices and I now + belive that my AT24 module is not fully functional. + +I2C Tool +======== + + I2C Tool. NuttX supports an I2C tool at apps/system/i2c that can be used + to peek and poke I2C devices. That tool can be enabled by setting the + following: + + System Type -> TIVA Peripheral Support + CONFIG_TIVA_I2C0=y : Enable I2C0 + CONFIG_TIVA_I2C1=y : Enable I2C1 + CONFIG_TIVA_I2C2=y : Enable I2C2 + ... + + System Type -> I2C device driver options + CONFIG_TIVA_I2C0_FREQUENCY=100000 : Select an I2C0 frequency + CONFIG_TIVA_I2C1_FREQUENCY=100000 : Select an I2C1 frequency + CONFIG_TIVA_I2C2_FREQUENCY=100000 : Select an I2C2 frequency + ... + + Device Drivers -> I2C Driver Support + CONFIG_I2C=y : Enable I2C support + + Application Configuration -> NSH Library + CONFIG_SYSTEM_I2CTOOL=y : Enable the I2C tool + CONFIG_I2CTOOL_MINBUS=0 : I2C0 has the minimum bus number 0 + CONFIG_I2CTOOL_MAXBUS=2 : I2C2 has the maximum bus number 2 + CONFIG_I2CTOOL_DEFFREQ=100000 : Pick a consistent frequency + + The I2C tool has extensive help that can be accessed as follows: + + nsh> i2c help + Usage: i2c [arguments] + Where is one of: + + Show help : ? + List busses : bus + List devices : dev [OPTIONS] + Read register : get [OPTIONS] [] + Show help : help + Write register: set [OPTIONS] [] + Verify access : verf [OPTIONS] [] [] + + Where common "sticky" OPTIONS include: + [-a addr] is the I2C device address (hex). Default: 03 Current: 03 + [-b bus] is the I2C bus number (decimal). Default: 0 Current: 0 + [-r regaddr] is the I2C device register address (hex). Default: 00 Current: 00 + [-w width] is the data width (8 or 16 decimal). Default: 8 Current: 8 + [-s|n], send/don't send start between command and data. Default: -n Current: -n + [-i|j], Auto increment|don't increment regaddr on repititions. Default: NO Current: NO + [-f freq] I2C frequency. Default: 100000 Current: 100000 + + NOTES: + o Arguments are "sticky". For example, once the I2C address is + specified, that address will be re-used until it is changed. + + WARNING: + o The I2C dev command may have bad side effects on your I2C devices. + Use only at your own risk. + + As an example, the I2C dev command can be used to list all devices + responding on I2C0 (the default) like this: + + nsh> i2c dev 0x03 0x77 + 0 1 2 3 4 5 6 7 8 9 a b c d e f + 00: -- -- -- -- -- -- -- -- -- -- -- -- -- + 10: -- -- -- -- -- -- -- -- -- -- 1a -- -- -- -- -- + 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 30: -- -- -- -- -- -- -- -- -- 39 -- -- -- 3d -- -- + 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 60: 60 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- + 70: -- -- -- -- -- -- -- -- + nsh> + + NOTE: This is output from a different board and shows I2C + devices responding at addresses 0x1a, 0x39, 0x3d, and 0x60. + +Using OpenOCD and GDB with an FT2232 JTAG emulator +================================================== + + Building OpenOCD under Cygwin: + + Refer to configs/olimex-lpc1766stk/README.txt + + Installing OpenOCD in Linux: + + sudo apt-get install openocd + + As of this writing, there is no support for the tm4c123g in the package + above. You will have to build openocd from its source (as of this writing + the latest commit was b9b4bd1a6410ff1b2885d9c2abe16a4ae7cb885f): + + git clone http://git.code.sf.net/p/openocd/code openocd + cd openocd + + Then, add the patches provided by http://openocd.zylin.com/922: + + git fetch http://openocd.zylin.com/openocd refs/changes/22/922/14 && git checkout FETCH_HEAD + ./bootstrap + ./configure --enable-maintainer-mode --enable-ti-icdi + make + sudo make install + + For additional help, see http://processors.wiki.ti.com/index.php/Tiva_Launchpad_with_OpenOCD_and_Linux + + Helper Scripts. + + I have been using the on-board In-Circuit Debug Interface (ICDI) interface. + OpenOCD requires a configuration file. I keep the one I used last here: + + configs/tm4c123g-launchpad/tools/tm4c123g-launchpad.cfg + + However, the "correct" configuration script to use with OpenOCD may + change as the features of OpenOCD evolve. So you should at least + compare that tm4c123g-launchpad.cfg file with configuration files in + /usr/share/openocd/scripts. As of this writing, the configuration + files of interest were: + + /usr/local/share/openocd/scripts/board/ek-tm4c123gxl.cfg + /usr/local/share/openocd/scripts/interface/ti-icdi.cfg + /usr/local/share/openocd/scripts/target/stellaris_icdi.cfg + + There is also a script on the tools/ directory that I use to start + the OpenOCD daemon on my system called oocd.sh. That script will + probably require some modifications to work in another environment: + + - Possibly the value of OPENOCD_PATH and TARGET_PATH + - It assumes that the correct script to use is the one at + configs/tm4c123g-launchpad/tools/tm4c123g-launchpad.cfg + + Starting OpenOCD + + If you are in the top-level NuttX build directlory then you should + be able to start the OpenOCD daemon like: + + oocd.sh $PWD + + The relative path to the oocd.sh script is configs/tm4c123g-launchpad/tools, + but that should have been added to your PATH variable when you sourced + the setenv.sh script. + + Note that OpenOCD needs to be run with administrator privileges in + some environments (sudo). + + Connecting GDB + + Once the OpenOCD daemon has been started, you can connect to it via + GDB using the following GDB command: + + arm-nuttx-elf-gdb + (gdb) target remote localhost:3333 + + NOTE: The name of your GDB program may differ. For example, with the + CodeSourcery toolchain, the ARM GDB would be called arm-none-eabi-gdb. + + After starting GDB, you can load the NuttX ELF file: + + (gdb) symbol-file nuttx + (gdb) monitor reset + (gdb) monitor halt + (gdb) load nuttx + + NOTES: + 1. Loading the symbol-file is only useful if you have built NuttX to + include debug symbols (by setting CONFIG_DEBUG_SYMBOLS=y in the + .config file). + 2. The MCU must be halted prior to loading code using 'mon reset' + as described below. + + OpenOCD will support several special 'monitor' commands. These + GDB commands will send comments to the OpenOCD monitor. Here + are a couple that you will need to use: + + (gdb) monitor reset + (gdb) monitor halt + + NOTES: + 1. The MCU must be halted using 'mon halt' prior to loading code. + 2. Reset will restart the processor after loading code. + 3. The 'monitor' command can be abbreviated as just 'mon'. + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +===================== + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The NuttX buildroot Toolchain (default, see below), + 2. The CodeSourcery GNU toolchain, + 3. The devkitARM GNU toolchain, + 4. The Atollic toolchain, or + 5. The Code Red toolchain + + All testing has been conducted using the Buildroot toolchain for Cygwin/Linux. + To use a different toolchain, you simply need to add one of the following + configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows or Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : The Atollic toolchain under Windows or Cygwin + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : The Code Red toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y : The Code Red toolchain under Linux + + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : If you use an older, OABI buildroot toolchain + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Code Red (for Windows) + toolchains are Windows native toolchains. The CodeSourcey (for Linux) and NuttX + buildroot toolchains are Cygwin and/or Linux native toolchains. There are several + limitations to using a Windows based toolchain in a Cygwin environment. The three + biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include paths: You will need include/, arch/arm/src/tiva, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/tiva/tiva_vectors.S. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh tm4c123g-launchpad/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh tm4c123g-launchpad/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +==== + The TM4C123G has a single RGB LED. If CONFIG_ARCH_LEDS is defined, then + support for the LaunchPad LEDs will be included in the build. See: + + - configs/tm4c123g-launchpad/include/board.h - Defines LED constants, types and + prototypes the LED interface functions. + + - configs/tm4c123g-launchpad/src/tm4c123g-launchpad.h - GPIO settings for the LEDs. + + - configs/tm4c123g-launchpad/src/up_leds.c - LED control logic. + + OFF: + - OFF means that the OS is still initializing. Initialization is very fast so + if you see this at all, it probably means that the system is hanging up + somewhere in the initialization phases. + + GREEN or GREEN-ish + - This means that the OS completed initialization. + + Bluish: + - Whenever and interrupt or signal handler is entered, the BLUE LED is + illuminated and extinguished when the interrupt or signal handler exits. + This will add a BLUE-ish tinge to the LED. + + Redish: + - If a recovered assertion occurs, the RED component will be illuminated + briefly while the assertion is handled. You will probably never see this. + + Flashing RED: + - In the event of a fatal crash, the BLUE and GREEN components will be + extinguished and the RED component will FLASH at a 2Hz rate. + +Serial Console +============== + + By default, all configurations use UART0 which connects to the USB VCOM + on the DEBUG port on the TM4C123G LaunchPad: + + UART0 RX - PA.0 + UART0 TX - PA.1 + + However, if you use an external RS232 driver, then other options are + available. UART1 has option pin settings and flow control capabilities + that are not available with the other UARTS:: + + UART1 RX - PB.0 or PC.4 (Need disambiguation in board.h) + UART1 TX - PB.1 or PC.5 (" " " " "" " ") + + UART1_RTS - PF.0 or PC.4 + UART1_CTS - PF.1 or PC.5 + + NOTE: board.h currently selects PB.0, PB.1, PF.0 and PF.1 for UART1, but + that can be changed by editting board.h + + UART2-5, 7 are also available, UART2 is not recommended because it shares + some pin usage with USB device mode. UART6 is not available because its + only RX/TX pin options are dedicated to USB support. + + UART2 RX - PD.6 + UART2 TX - PD.7 (Also used for USB VBUS detection) + + UART3 RX - PC.6 + UART3 TX - PC.7 + + UART4 RX - PC.4 + UART4 TX - PC.5 + + UART5 RX - PE.4 + UART5 TX - PE.5 + + UART6 RX - PD.4, Not available. Dedicated for USB_DM + UART6 TX - PD.5, Not available. Dedicated for USB_DP + + UART7 RX - PE.0 + UART7 TX - PE.1 + +USB Device Controller Functions +=============================== + + Device Overview + + An FT2232 device from Future Technology Devices International Ltd manages + USB-to-serial conversion. The FT2232 is factory configured by Luminary + Micro to implement a JTAG/SWD port (synchronous serial) on channel A and + a Virtual COM Port (VCP) on channel B. This feature allows two simultaneous + communications links between the host computer and the target device using + a single USB cable. Separate Windows drivers for each function are provided + on the Documentation and Software CD. + + Debugging with JTAG/SWD + + The FT2232 USB device performs JTAG/SWD serial operations under the control + of the debugger or the Luminary Flash Programmer. It also operate as an + In-Circuit Debugger Interface (ICDI), allowing debugging of any external + target board. Debugging modes: + + MODE DEBUG FUNCTION USE SELECTED BY + 1 Internal ICDI Debug on-board TM4C123G Default Mode + microcontroller over USB + interface. + 2 ICDI out to JTAG/SWD The EVB is used as a USB Connecting to an external + header to SWD/JTAG interface to target and starting debug + an external target. software. The red Debug Out + LED will be ON. + 3 In from JTAG/SWD For users who prefer an Connecting an external + header external debug interface debugger to the JTAG/SWD + (ULINK, JLINK, etc.) with header. + the EVB. + + Virtual COM Port + + The Virtual COM Port (VCP) allows Windows applications (such as HyperTerminal) + to communicate with UART0 on the TM4C123G over USB. Once the FT2232 VCP + driver is installed, Windows assigns a COM port number to the VCP channel. + +TM4C123G LaunchPad Configuration Options +======================================================= + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP="tiva" + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_TM4C123GH6PMI + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=tm4c123g-launchpad (for the TM4C123G LaunchPad) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_TM4C123G_LAUNCHPAD + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00008000 (32Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + There are configurations for disabling support for interrupts GPIO ports. + Only GPIOP and GPIOQ pins can be used as interrupting sources on the + TM4C129x. Additional interrupt support can be disabled if desired to + reduce memory footprint. + + CONFIG_TIVA_GPIOP_IRQS=y + CONFIG_TIVA_GPIOQ_IRQS=y + + TM4C123G specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + CONFIG_TIVA_SSI0 - Select to enable support for SSI0 + CONFIG_TIVA_SSI1 - Select to enable support for SSI1 + CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support. + Poll-waiting is recommended if the interrupt rate would be to + high in the interrupt driven case. + CONFIG_SSI_TXLIMIT - Write this many words to the Tx FIFO before + emptying the Rx FIFO. If the SPI frequency is high and this + value is large, then larger values of this setting may cause + Rx FIFO overrun errors. Default: half of the Tx FIFO size (4). + + CONFIG_TIVA_ETHERNET - This must be set (along with CONFIG_NET) + to build the Tiva Ethernet driver + CONFIG_TIVA_ETHLEDS - Enable to use Ethernet LEDs on the board. + CONFIG_TIVA_BOARDMAC - If the board-specific logic can provide + a MAC address (via tiva_ethernetmac()), then this should be selected. + CONFIG_TIVA_ETHHDUPLEX - Set to force half duplex operation + CONFIG_TIVA_ETHNOAUTOCRC - Set to suppress auto-CRC generation + CONFIG_TIVA_ETHNOPAD - Set to suppress Tx padding + CONFIG_TIVA_MULTICAST - Set to enable multicast frames + CONFIG_TIVA_PROMISCUOUS - Set to enable promiscuous mode + CONFIG_TIVA_BADCRC - Set to enable bad CRC rejection. + CONFIG_TIVA_DUMPPACKET - Dump each packet received/sent to the console. + +Configurations +============== + +Each TM4C123G LaunchPad configuration is maintained in a +sub-directory and can be selected as follow: + + cd tools + ./configure.sh tm4c123g-launchpad/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + configuration enables the serial VCOM interfaces on UART0. Support for + builtin applications is enabled, but in the base configuration no + builtin applications are selected. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too). + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot (arm-nuttx-elf-gcc) + CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary diff --git a/configs/tm4c123g-launchpad/include/board.h b/configs/tm4c123g-launchpad/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..e74db2d27bbd41ccf13e1ec8d19fb517e10f280d --- /dev/null +++ b/configs/tm4c123g-launchpad/include/board.h @@ -0,0 +1,206 @@ +/************************************************************************************ + * configs/tm4c123g-launchpad/include/board.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_TMC4C123G_LAUNCHPAD_INCLUDE_BOARD_H +#define __CONFIGS_TMC4C123G_LAUNCHPAD_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* RCC settings. Crystals on-board the TMC4C123G LaunchPad include: + * + * 16MHz connected to OSC0/1 (pins 40/41) + * 32.768kHz connected to XOSC0/1 (pins 34/36) + */ + +#define SYSCON_RCC_XTAL SYSCON_RCC_XTAL16000KHZ /* On-board crystal is 16 MHz */ +#define XTAL_FREQUENCY 16000000 + +/* Oscillator source is the main oscillator */ + +#define SYSCON_RCC_OSCSRC SYSCON_RCC_OSCSRC_MOSC +#define SYSCON_RCC2_OSCSRC SYSCON_RCC2_OSCSRC2_MOSC +#define OSCSRC_FREQUENCY XTAL_FREQUENCY + +/* Use system divider = 4; this corresponds to a system clock frequency + * of (400 / 1) / 5 = 80MHz (Using RCC2 and DIV400). + */ + +#define TIVA_SYSDIV 5 +#define SYSCLK_FREQUENCY 80000000 /* 80MHz */ + +/* Other RCC settings: + * + * - Main and internal oscillators enabled. + * - PLL and sys dividers not bypassed + * - PLL not powered down + * - No auto-clock gating reset + */ + +#define TIVA_RCC_VALUE (SYSCON_RCC_OSCSRC | SYSCON_RCC_XTAL | \ + SYSCON_RCC_USESYSDIV | SYSCON_RCC_SYSDIV(TIVA_SYSDIV)) + +/* RCC2 settings + * + * - PLL and sys dividers not bypassed. + * - PLL not powered down + * - Not using RCC2 + * + * When SYSCON_RCC2_DIV400 is not selected, SYSDIV2 is the divisor-1. + * When SYSCON_RCC2_DIV400 is selected, SYSDIV2 is the divisor-1)/2, plus + * the LSB: + * + * SYSDIV2 SYSDIV2LSB DIVISOR + * 0 N/A 2 + * 1 0 3 + * " 1 4 + * 2 0 5 + * " 1 6 + * etc. + */ + +#if (TIVA_SYSDIV & 1) == 0 +# define TIVA_RCC2_VALUE (SYSCON_RCC2_OSCSRC | SYSCON_RCC2_SYSDIV2LSB | \ + SYSCON_RCC2_SYSDIV_DIV400(TIVA_SYSDIV) | \ + SYSCON_RCC2_DIV400 | SYSCON_RCC2_USERCC2) +#else +# define TIVA_RCC2_VALUE (SYSCON_RCC2_OSCSRC | SYSCON_RCC2_SYSDIV_DIV400(TIVA_SYSDIV) | \ + SYSCON_RCC2_DIV400 | SYSCON_RCC2_USERCC2) +#endif + +/* LED definitions ******************************************************************/ +/* The TMC4C123G LaunchPad has a single RGB LED. There is only one visible LED which + * will vary in color. But, from the standpoint of the firmware, this appears as + * three LEDs: + * + * BOARD_LED_R -- Connected to PF1 + * BOARD_LED_G -- Connected to PF3 + * BOARD_LED_B -- Connected to PF2 + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED_R 0 +#define BOARD_LED_G 1 +#define BOARD_LED_B 2 +#define BOARD_NLEDS 3 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) + +/* If CONFIG_ARCH_LEDS is defined, then automated support for the LaunchPad LEDs + * will be included in the build: + * + * OFF: + * - OFF means that the OS is still initializing. Initialization is very fast so + * if you see this at all, it probably means that the system is hanging up + * somewhere in the initialization phases. + * + * GREEN or GREEN-ish + * - This means that the OS completed initialization. + * + * Bluish: + * - Whenever and interrupt or signal handler is entered, the BLUE LED is + * illuminated and extinguished when the interrupt or signal handler exits. + * This will add a BLUE-ish tinge to the LED. + * + * Redish: + * - If a recovered assertion occurs, the RED component will be illuminated + * briefly while the assertion is handled. You will probably never see this. + * + * Flashing RED: + * - In the event of a fatal crash, the BLUE and GREEN components will be + * extinguished and the RED component will FLASH at a 2Hz rate. + */ + /* RED GREEN BLUE */ +#define LED_STARTED 0 /* OFF OFF OFF */ +#define LED_HEAPALLOCATE 0 /* OFF OFF OFF */ +#define LED_IRQSENABLED 0 /* OFF OFF OFF */ +#define LED_STACKCREATED 1 /* OFF ON OFF */ +#define LED_INIRQ 2 /* NC NC ON (momentary) */ +#define LED_SIGNAL 2 /* NC NC ON (momentary) */ +#define LED_ASSERTION 3 /* ON NC NC (momentary) */ +#define LED_PANIC 4 /* ON OFF OFF (flashing 2Hz) */ + +/* LED definitions ******************************************************************/ +/* The TMC4C123G LaunchPad has a two buttons: + * + * BOARD_SW1 -- Connected to PF4 + * BOARD_SW2 -- Connected to PF0 + */ + +#define BUTTON_SW1 0 +#define BUTTON_SW2 1 +#define NUM_BUTTONS 2 + +#define BUTTON_SW1_BIT (1 << BUTTON_SW1) +#define BUTTON_SW2_BIT (1 << BUTTON_SW2) + +/* Pin Multiplexing Disambiguation **************************************************/ + +#define GPIO_UART1_CTS GPIO_UART1_CTS_1 +#define GPIO_UART1_RTS GPIO_UART1_RTS_1 +#define GPIO_UART1_RX GPIO_UART1_RX_1 +#define GPIO_UART1_TX GPIO_UART1_TX_1 + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Tiva architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_TMC4C123G_LAUNCHPAD_INCLUDE_BOARD_H */ diff --git a/configs/tm4c123g-launchpad/nsh/Make.defs b/configs/tm4c123g-launchpad/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c297559d64fbd9f5ee35dac0827049f5edabb4c7 --- /dev/null +++ b/configs/tm4c123g-launchpad/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/tm4c123g-launchpad/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/tm4c123g-launchpad/nsh/defconfig b/configs/tm4c123g-launchpad/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ec7ec4fb4829153da2661897378a25c6d4f67833 --- /dev/null +++ b/configs/tm4c123g-launchpad/nsh/defconfig @@ -0,0 +1,942 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +CONFIG_ARCH_CHIP_TIVA=y +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_TM4C123GH6ZRB is not set +CONFIG_ARCH_CHIP_TM4C123GH6PMI=y +# CONFIG_ARCH_CHIP_TM4C1294NC is not set +# CONFIG_ARCH_CHIP_TM4C129XNC is not set +# CONFIG_ARCH_CHIP_CC3200 is not set +CONFIG_ARCH_CHIP_TM4C123=y +CONFIG_ARCH_CHIP_TM4C=y +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +CONFIG_TIVA_HAVE_ADC0=y +CONFIG_TIVA_HAVE_ADC1=y +# CONFIG_TIVA_I2C is not set +CONFIG_TIVA_HAVE_I2C1=y +CONFIG_TIVA_HAVE_I2C2=y +CONFIG_TIVA_HAVE_I2C3=y +# CONFIG_TIVA_HAVE_I2C4 is not set +# CONFIG_TIVA_HAVE_I2C5 is not set +# CONFIG_TIVA_HAVE_I2C6 is not set +# CONFIG_TIVA_HAVE_I2C7 is not set +# CONFIG_TIVA_HAVE_I2C8 is not set +# CONFIG_TIVA_HAVE_I2C9 is not set +CONFIG_TIVA_HAVE_UART3=y +CONFIG_TIVA_HAVE_UART4=y +CONFIG_TIVA_HAVE_UART5=y +CONFIG_TIVA_HAVE_UART6=y +CONFIG_TIVA_HAVE_UART7=y +CONFIG_TIVA_HAVE_SSI0=y +CONFIG_TIVA_HAVE_SSI1=y +CONFIG_TIVA_HAVE_SSI2=y +CONFIG_TIVA_HAVE_SSI3=y +# CONFIG_TIVA_HAVE_ETHERNET is not set +CONFIG_TIVA_SSI=y +# CONFIG_TIVA_TIMER is not set +CONFIG_TIVA_HAVE_TIMER0=y +CONFIG_TIVA_HAVE_TIMER1=y +CONFIG_TIVA_HAVE_TIMER2=y +CONFIG_TIVA_HAVE_TIMER3=y +CONFIG_TIVA_HAVE_TIMER4=y +CONFIG_TIVA_HAVE_TIMER5=y +# CONFIG_TIVA_HAVE_TIMER6 is not set +# CONFIG_TIVA_HAVE_TIMER7 is not set +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_ADC1 is not set +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +# CONFIG_TIVA_I2C2 is not set +# CONFIG_TIVA_I2C3 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_UART3 is not set +# CONFIG_TIVA_UART4 is not set +# CONFIG_TIVA_UART5 is not set +# CONFIG_TIVA_UART6 is not set +# CONFIG_TIVA_UART7 is not set +CONFIG_TIVA_SSI0=y +# CONFIG_TIVA_SSI1 is not set +# CONFIG_TIVA_SSI2 is not set +# CONFIG_TIVA_SSI3 is not set +# CONFIG_TIVA_TIMER0 is not set +# CONFIG_TIVA_TIMER1 is not set +# CONFIG_TIVA_TIMER2 is not set +# CONFIG_TIVA_TIMER3 is not set +# CONFIG_TIVA_TIMER4 is not set +# CONFIG_TIVA_TIMER5 is not set +# CONFIG_TIVA_ETHERNET is not set +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +CONFIG_TIVA_GPIO_IRQS=y +CONFIG_TIVA_HAVE_GPIOA_IRQS=y +CONFIG_TIVA_HAVE_GPIOB_IRQS=y +CONFIG_TIVA_HAVE_GPIOC_IRQS=y +CONFIG_TIVA_HAVE_GPIOD_IRQS=y +CONFIG_TIVA_HAVE_GPIOE_IRQS=y +CONFIG_TIVA_HAVE_GPIOF_IRQS=y +# CONFIG_TIVA_HAVE_GPIOG_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOH_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +CONFIG_TIVA_HAVE_GPIOP_IRQS=y +# CONFIG_TIVA_HAVE_GPIOQ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +CONFIG_TIVA_GPIOA_IRQS=y +CONFIG_TIVA_GPIOB_IRQS=y +CONFIG_TIVA_GPIOC_IRQS=y +CONFIG_TIVA_GPIOD_IRQS=y +CONFIG_TIVA_GPIOE_IRQS=y +CONFIG_TIVA_GPIOF_IRQS=y +CONFIG_TIVA_GPIOP_IRQS=y + +# +# Tiva/Stellaris SSI Configuration +# +CONFIG_SSI_POLLWAIT=y +CONFIG_SSI_TXLIMIT=4 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=4531 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_TM4C123G_LAUNCHPAD=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="tm4c123g-launchpad" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=24 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +CONFIG_LIB_BOARDCTL=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# CU Minimal Terminal +# +# CONFIG_SYSTEM_CUTERM is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# Temperature +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/tm4c123g-launchpad/nsh/setenv.sh b/configs/tm4c123g-launchpad/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..9c63cd8cc0c4ec7c7d2fe0b66cbbd2b1c34c0869 --- /dev/null +++ b/configs/tm4c123g-launchpad/nsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/tm4c123g-launchpad/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The tm4c123g-launchpad/tools directory +export TOOL_DIR="${WD}/configs/tm4c123g-launchpad/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/tm4c123g-launchpad/scripts/ld.script b/configs/tm4c123g-launchpad/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..4c5d85562812711a76aadec46d6e861124190fde --- /dev/null +++ b/configs/tm4c123g-launchpad/scripts/ld.script @@ -0,0 +1,115 @@ +/**************************************************************************** + * configs/tm4c123g-launchpad/scripts/ld.script + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The TM4C123GH6ZRB has 256Kb of FLASH beginning at address 0x0000:0000 and + * 32Kb of SRAM beginning at 0x2000:0000. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/tm4c123g-launchpad/src/.gitignore b/configs/tm4c123g-launchpad/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/tm4c123g-launchpad/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/tm4c123g-launchpad/src/Makefile b/configs/tm4c123g-launchpad/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..90986647772c0210f1a2d4727e5488ddac40793e --- /dev/null +++ b/configs/tm4c123g-launchpad/src/Makefile @@ -0,0 +1,67 @@ +############################################################################ +# configs/tm4c123g-launchpad/src/Makefile +# +# Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = tm4c_boot.c tm4c_bringup.c tm4c_ssi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += tm4c_autoleds.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += tm4c_appinit.c +endif + +ifeq ($(CONFIG_TIVA_TIMER),y) +CSRCS += tm4c_timer.c +endif + +ifeq ($(CONFIG_TIVA_ADC),y) +CSRCS += tm4c_adc.c +endif + +ifeq ($(CONFIG_MTD_AT24XX),y) +ifeq ($(CONFIG_TIVA_I2C0),y) +CSRCS += tm4c_at24.c +endif +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += tm4c_buttons.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/tm4c123g-launchpad/src/tm4c123g-launchpad.h b/configs/tm4c123g-launchpad/src/tm4c123g-launchpad.h new file mode 100644 index 0000000000000000000000000000000000000000..abb2193f3a090b3b4ce93499f5ab34e59cdc0f2d --- /dev/null +++ b/configs/tm4c123g-launchpad/src/tm4c123g-launchpad.h @@ -0,0 +1,253 @@ +/************************************************************************************ + * configs/tm4c123g-launchpad/src/tm4c123g-launchpad.h + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_TM4C123G_LAUNCHPAD_TM4C123G_LAUNCHPAD_H +#define __CONFIGS_TM4C123G_LAUNCHPAD_TM4C123G_LAUNCHPAD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include "chip.h" +#include "tiva_gpio.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#define HAVE_AT24 1 + +/* How many SSI modules does this chip support? */ + +#if TIVA_NSSI < 1 +# undef CONFIG_TIVA_SSI0 +# undef CONFIG_TIVA_SSI1 +#elif TIVA_NSSI < 2 +# undef CONFIG_TIVA_SSI1 +#endif + +/* AT24 Serial EEPROM + * + * A AT24C512 Serial EEPPROM was used for tested I2C. There are no I2C + * devices on-board the Launchpad, but an external serial EEPROM module + * module was used. + * + * The Serial EEPROM was mounted on an external adaptor board and connected + * to the LaunchPad thusly: + * + * - VCC -- VCC + * - GND -- GND + * - PB2 -- SCL + * - PB3 -- SDA + */ + +#define AT24_BUS 0 +#define AT24_MINOR 0 + +#if !defined(CONFIG_MTD_AT24XX) || !defined(CONFIG_TIVA_I2C0) +# undef HAVE_AT24 +#endif + +/* Can't support AT25 features if mountpoints are disabled or if we were not + * asked to mount the AT25 part + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || \ + !defined(CONFIG_TM4C123G_LAUNCHPAD_AT24_BLOCKMOUNT) +# undef HAVE_AT24 +#endif + +/* If we are going to mount the AT25, then they user must also have told + * us what to do with it by setting one of these. + */ + +#ifndef CONFIG_FS_NXFFS +# undef CONFIG_TM4C123G_LAUNCHPAD_AT24_NXFFS +#endif + +#if !defined(CONFIG_TM4C123G_LAUNCHPAD_AT24_FTL) && \ + !defined(CONFIG_TM4C123G_LAUNCHPAD_AT24_NXFFS) +# undef HAVE_AT24 +#endif + +#if defined(CONFIG_TM4C123G_LAUNCHPAD_AT24_FTL) && \ + defined(CONFIG_TM4C123G_LAUNCHPAD_AT24_NXFFS) +# warning Both CONFIG_TM4C123G_LAUNCHPAD_AT24_FTL and CONFIG_TM4C123G_LAUNCHPAD_AT24_NXFFS are set +# warning Ignoring CONFIG_TM4C123G_LAUNCHPAD_AT24_NXFFS +# undef CONFIG_TM4C123G_LAUNCHPAD_AT24_NXFFS +#endif + +/* TM4C123G LaunchPad ***************************************************************/ +/* The TM4C123G LaunchPad has a single RGB LED. There is only one visible LED which + * will vary in color. But, from the standpoint of the firmware, this appears as + * three LEDs: + * + * BOARD_LED_R -- Connected to PF1 + * BOARD_LED_G -- Connected to PF3 + * BOARD_LED_B -- Connected to PF2 + * + * If CONFIG_ARCH_LEDS is defined, then automated support for the LaunchPad LEDs + * will be included in the build: + * + * OFF: + * - OFF means that the OS is still initializing. Initialization is very fast so + * if you see this at all, it probably means that the system is hanging up + * somewhere in the initialization phases. + * + * GREEN or GREEN-ish + * - This means that the OS completed initialization. + * + * Bluish: + * - Whenever and interrupt or signal handler is entered, the BLUE LED is + * illuminated and extinguished when the interrupt or signal handler exits. + * This will add a BLUE-ish tinge to the LED. + * + * Redish: + * - If a recovered assertion occurs, the RED component will be illuminated + * briefly while the assertion is handled. You will probably never see this. + * + * Flashing RED: + * - In the event of a fatal crash, the BLUE and GREEN components will be + * extinguished and the RED component will FLASH at a 2Hz rate. + * + * RED GREEN BLUE + * LED_STARTED 0 OFF OFF OFF + * LED_HEAPALLOCATE 0 OFF OFF OFF + * LED_IRQSENABLED 0 OFF OFF OFF + * LED_STACKCREATED 1 OFF ON OFF + * LED_INIRQ 2 NC NC ON (momentary) + * LED_SIGNAL 2 NC NC ON (momentary) + * LED_ASSERTION 3 ON NC NC (momentary) + * LED_PANIC 3 ON OFF OFF (flashing 2Hz) + */ + +#define GPIO_LED_R (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTF | GPIO_PIN_1) +#define GPIO_LED_G (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTF | GPIO_PIN_3) +#define GPIO_LED_B (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTF | GPIO_PIN_2) + +/* The TM4C123G LaunchPad has a two buttons: + * + * BOARD_SW1 -- Connected to PF0 + * BOARD_SW2 -- Connected to PF4 + */ + +#define GPIO_SW1 (GPIO_FUNC_INTERRUPT | GPIO_INT_BOTHEDGES | \ + GPIO_STRENGTH_2MA | GPIO_PADTYPE_STDWPU | \ + GPIO_PORTF | GPIO_PIN_4) +#define GPIO_SW2 (GPIO_FUNC_INTERRUPT | GPIO_INT_BOTHEDGES | \ + GPIO_STRENGTH_2MA | GPIO_PADTYPE_STDWPU | \ + GPIO_PORTF | GPIO_PIN_0) + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: tm4c_ssidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the TM4C123G LaunchPad. + * + ************************************************************************************/ + +void weak_function tm4c_ssidev_initialize(void); + +/**************************************************************************** + * Name: tm4c_led_initialize + * + * Description: + * Called to initialize the on-board LEDs. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void tm4c_led_initialize(void); +#endif + +/**************************************************************************** + * Name: tm4c_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int tm4c_bringup(void); + +/**************************************************************************** + * Name: tm4c_at24_automount + * + * Description: + * Initialize and configure the AT24 serial EEPROM + * + ****************************************************************************/ + +#ifdef HAVE_AT24 +int tm4c_at24_automount(int minor); +#endif + +/**************************************************************************** + * Name: tiva_timer_initialize + * + * Description: + * Configure the timer driver + * + ****************************************************************************/ + +#ifdef CONFIG_TIVA_TIMER +int tiva_timer_initialize(void); +#endif + +/************************************************************************************ + * Name: board_adc_initialize + * + * Description: + * Initialize and register the ADC driver + * + ************************************************************************************/ + +#ifdef CONFIG_TIVA_ADC +int board_adc_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_TM4C123G_LAUNCHPAD_TM4C123G_LAUNCHPAD_H */ diff --git a/configs/tm4c123g-launchpad/src/tm4c_adc.c b/configs/tm4c123g-launchpad/src/tm4c_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..c4494b5579cf0437ebb45f9e366a9ff624ba1681 --- /dev/null +++ b/configs/tm4c123g-launchpad/src/tm4c_adc.c @@ -0,0 +1,194 @@ +/************************************************************************************ + * configs/tm4c123g-launchpad/tm4c_adc.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "tiva_adc.h" +#include "tiva_timer.h" +#include "tm4c123g-launchpad.h" +#include "chip/tiva_pinmap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_initialize + * + * Description: + * Initialize and register the ADC driver. + * + ************************************************************************************/ + +#ifdef CONFIG_TIVA_ADC +int board_adc_initialize(void) +{ +# if defined (CONFIG_TIVA_ADC) && defined (CONFIG_ADC) + static bool initialized = false; + int ret; + uint8_t srate = 0; + + struct tiva_adc_sse_cfg_s sse_cfg0; + struct tiva_adc_cfg_s adc_cfg; + struct tiva_adc_step_cfg_s step_cfg[] = + { + {0, 0, 0, 0, (TIVA_ADC_FLAG_TS | TIVA_ADC_FLAG_IE | TIVA_ADC_FLAG_END), 0}, + }; + + sse_cfg0.priority = 0; +# ifdef CONFIG_EXAMPLES_ADC_SWTRIG + sse_cfg0.trigger = TIVA_ADC_TRIG_SW; +# else + sse_cfg0.trigger = TIVA_ADC_TRIG_ALWAYS; +# endif + + adc_cfg.adc = 0; + adc_cfg.sse[0] = true; + adc_cfg.sse[1] = false; + adc_cfg.sse[2] = false; + adc_cfg.sse[3] = false; + adc_cfg.ssecfg[0] = sse_cfg0; + adc_cfg.steps = 1; + adc_cfg.stepcfg = step_cfg; + +# ifdef CONFIG_EXAMPLES_ADC_SWTRIG + srate = TIVA_ADC_SAMPLE_RATE_FASTEST; +# else + srate = TIVA_ADC_SAMPLE_RATE_SLOWEST; +# endif + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call tiva_adc_initialize to configure an instance of the ADC + * interface and register it to the character level driver. + */ + + ret = tiva_adc_initialize(CONFIG_EXAMPLES_ADC_DEVPATH, &adc_cfg, + TIVA_ADC_CLOCK_MAX, srate); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to register /dev/adc0" + " to character driver: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + return OK; +} +#endif /* CONFIG_ADC */ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All Tiva architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +#ifdef CONFIG_EXAMPLES_ADC +int board_adc_setup(void) +{ +#ifdef CONFIG_TIVA_ADC + return board_adc_initialize(); +#else + return -ENOSYS; +#endif +} +#endif /* CONFIG_EXAMPLES_ADC */ + +#if defined (CONFIG_TIVA_ADC) && defined (CONFIG_TIVA_TIMER) + +/* Tiva timer interface does not currently support user configuration */ + +#if 0 +/************************************************************************************ + * Name: adc_timer_init + * + * Description: + * Initialize timer specifically for ADC use. + * + ************************************************************************************/ + +TIMER_HANDLE adc_timer_init(void) +{ + struct tiva_gptm32config_s adctimer = + { + .cmn = + { + .gptm = 0; + .mode = TIMER32_MODE_PERIODIC; + .alternate = false; + }; + .config = + { + .flags = TIMER_FLAG_ADCTIMEOUT; + .handler = NULL; + .u.periodic = TIVA_TIME_MS_TO_TICKS(100); // in clock ticks + }; + }; + + return tiva_gptm_configure((const struct tiva_gptmconfig_s *)&adctimer); +} + +#endif +#endif /* defined (CONFIG_TIVA_ADC) && defined (CONFIG_TIVA_TIMER) */ diff --git a/configs/tm4c123g-launchpad/src/tm4c_appinit.c b/configs/tm4c123g-launchpad/src/tm4c_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..0763742bf1a3e6d487210d80109cf955c6d4a471 --- /dev/null +++ b/configs/tm4c123g-launchpad/src/tm4c_appinit.c @@ -0,0 +1,73 @@ +/**************************************************************************** + * config/tm4c123g-launchpad/src/tm4c_appinit.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "tm4c123g-launchpad.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + /* If CONFIG_BOARD_INITIALIZE is selected then board initialization was + * already performed in board_initialize. + */ + +#ifndef CONFIG_BOARD_INITIALIZE + return tm4c_bringup(); +#else + return OK; +#endif +} diff --git a/configs/tm4c123g-launchpad/src/tm4c_at24.c b/configs/tm4c123g-launchpad/src/tm4c_at24.c new file mode 100644 index 0000000000000000000000000000000000000000..a6e97591f33e8279461b6a693fe6769be95babfb --- /dev/null +++ b/configs/tm4c123g-launchpad/src/tm4c_at24.c @@ -0,0 +1,157 @@ +/**************************************************************************** + * config/sama5d3x-ek/src/tm4c_at24.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* AT24 Serial EEPROM + * + * A AT24C512 Serial EEPPROM was used for tested I2C. There are no I2C + * devices on-board the Launchpad, but an external serial EEPROM module + * module was used. + * + * The Serial EEPROM was mounted on an external adaptor board and connected + * to the LaunchPad thusly: + * + * - VCC -- VCC + * - GND -- GND + * - PB2 -- SCL + * - PB3 -- SDA + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "tiva_i2c.h" +#include "tm4c123g-launchpad.h" + +#ifdef HAVE_AT24 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tm4c_at24_automount + * + * Description: + * Initialize and configure the AT24 serial EEPROM + * + ****************************************************************************/ + +int tm4c_at24_automount(int minor) +{ + FAR struct i2c_master_s *i2c; + FAR struct mtd_dev_s *mtd; + static bool initialized = false; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* No.. Get the I2C bus driver */ + + i2c = tiva_i2cbus_initialize(AT24_BUS); + if (!i2c) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI%d\n", AT24_BUS); + return -ENODEV; + } + + /* Now bind the I2C interface to the AT24 I2C EEPROM driver */ + + mtd = at24c_initialize(i2c); + if (!mtd) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SPI%d to the AT24 EEPROM driver\n", + AT24_BUS); + return -ENODEV; + } + +#if defined(CONFIG_TM4C123G_LAUNCHPAD_AT24_FTL) + /* And finally, use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(AT24_MINOR, mtd); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + +#elif defined(CONFIG_TM4C123G_LAUNCHPAD_AT24_NXFFS) + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: NXFFS initialization failed: %d\n", ret); + return ret; + } + + /* Mount the file system at /mnt/at24 */ + + ret = mount(NULL, "/mnt/at24", "nxffs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* HAVE_AT24 */ diff --git a/configs/tm4c123g-launchpad/src/tm4c_autoleds.c b/configs/tm4c123g-launchpad/src/tm4c_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..01c6c9a71a11b69a4e256ab884c8c7fb2665f89f --- /dev/null +++ b/configs/tm4c123g-launchpad/src/tm4c_autoleds.c @@ -0,0 +1,224 @@ +/**************************************************************************** + * configs/tm4c123g-launchpad/src/tm4c_leds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" +#include "tiva_gpio.h" +#include "tm4c123g-launchpad.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* The TM4C123G LaunchPad has a single RGB LED. There is only one visible LED + * which will vary in color. But, from the standpoint of the firmware, this + * appears as three LEDs: + * + * BOARD_LED_R -- Connected to PF1 + * BOARD_LED_G -- Connected to PF3 + * BOARD_LED_B -- Connected to PF2 + * + * If CONFIG_ARCH_LEDS is defined, then automated support for the LaunchPad LEDs + * will be included in the build: + * + * OFF: + * - OFF means that the OS is still initializing. Initialization is very fast so + * if you see this at all, it probably means that the system is hanging up + * somewhere in the initialization phases. + * + * GREEN or GREEN-ish + * - This means that the OS completed initialization. + * + * Bluish: + * - Whenever and interrupt or signal handler is entered, the BLUE LED is + * illuminated and extinguished when the interrupt or signal handler exits. + * This will add a BLUE-ish tinge to the LED. + * + * Redish: + * - If a recovered assertion occurs, the RED component will be illuminated + * briefly while the assertion is handled. You will probably never see this. + * + * Flashing RED: + * - In the event of a fatal crash, the BLUE and GREEN components will be + * extinguished and the RED component will FLASH at a 2Hz rate. + * + * RED GREEN BLUE + * LED_STARTED 0 OFF OFF OFF + * LED_HEAPALLOCATE 0 OFF OFF OFF + * LED_IRQSENABLED 0 OFF OFF OFF + * LED_STACKCREATED 1 OFF ON OFF + * LED_INIRQ 2 NC NC ON (momentary) + * LED_SIGNAL 2 NC NC ON (momentary) + * LED_ASSERTION 3 ON NC NC (momentary) + * LED_PANIC 4 ON OFF OFF (flashing 2Hz) + */ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef CONFIG_DEBUG_LEDS +# define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m) +#else +# define led_dumpgpio(m) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tm4c_led_initialize + * + * Description: + * Called to initialize the on-board LEDs. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void tm4c_led_initialize(void) +{ + leddbg("Initializing\n"); + + /* Configure Port E, Bit 1 as an output, initial value=OFF */ + + led_dumpgpio("tm4c_led_initialize before tiva_configgpio()"); + tiva_configgpio(GPIO_LED_R); + tiva_configgpio(GPIO_LED_G); + tiva_configgpio(GPIO_LED_B); + led_dumpgpio("tm4c_led_initialize after tiva_configgpio()"); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + /* All components stay off until the file initialization step */ + + default: + case 0: + break; + + /* The GREEN component is illuminated at the final initialization step */ + + case 1: + tiva_gpiowrite(GPIO_LED_G, false); + break; + + /* These will illuminate the BLUE component with on effect no RED and GREEN */ + + case 2: + tiva_gpiowrite(GPIO_LED_B, false); + break; + + /* This will turn off RED and GREEN and turn RED on */ + + case 4: + tiva_gpiowrite(GPIO_LED_G, true); + tiva_gpiowrite(GPIO_LED_B, true); + + /* This will illuminate the RED component with no effect on RED and GREEN */ + + case 3: + tiva_gpiowrite(GPIO_LED_R, false); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + /* These should not happen and are ignored */ + + default: + case 0: + case 1: + break; + + /* These will extinguish the BLUE component with no effect on RED and GREEN */ + + case 2: + tiva_gpiowrite(GPIO_LED_B, true); + break; + + /* These will extinguish the RED component with on effect on RED and GREEN */ + + case 3: + case 4: + tiva_gpiowrite(GPIO_LED_R, true); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/tm4c123g-launchpad/src/tm4c_boot.c b/configs/tm4c123g-launchpad/src/tm4c_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..7dc1d38f77cbfd04246a09c5a894755c1740bc18 --- /dev/null +++ b/configs/tm4c123g-launchpad/src/tm4c_boot.c @@ -0,0 +1,115 @@ +/************************************************************************************ + * configs/tm4c123g-launchpad/src/tm4c_boot.c + * + * Copyright (C) 2014, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "tm4c123g-launchpad.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Tiva architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SSI is not disabled, and 2) the weak function + * tm4c_ssidev_initialize() has been brought into the link. + */ + + /* The TM4C123G LaunchPad microSD CS and OLED are on SSI0 */ + +#if defined(CONFIG_TIVA_SSI0) || defined(CONFIG_TIVA_SSI1) + if (tm4c_ssidev_initialize) + { + tm4c_ssidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + tm4c_led_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform board initialization */ + + (void)tm4c_bringup(); +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/tm4c123g-launchpad/src/tm4c_bringup.c b/configs/tm4c123g-launchpad/src/tm4c_bringup.c new file mode 100644 index 0000000000000000000000000000000000000000..c277fbb710909145213fea817af2da37e1f51bc1 --- /dev/null +++ b/configs/tm4c123g-launchpad/src/tm4c_bringup.c @@ -0,0 +1,89 @@ +/**************************************************************************** + * config/tm4c123g-launchpad/src/tm4c_bringup.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "tm4c123g-launchpad.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tm4c_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int tm4c_bringup(void) +{ + int ret = OK; + +#ifdef HAVE_AT24 + /* Initialize the AT24 driver */ + + ret = tm4c_at24_automount(AT24_MINOR); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: tm4c_at24_automount failed: %d\n", ret); + return ret; + } +#endif /* HAVE_AT24 */ + +#ifdef CONFIG_TIVA_TIMER + /* Initialize the timer driver */ + + ret = tiva_timer_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: tiva_timer_initialize failed: %d\n", ret); + return ret; + } +#endif /* CONFIG_TIVA_TIMER */ + + return ret; +} diff --git a/configs/tm4c123g-launchpad/src/tm4c_buttons.c b/configs/tm4c123g-launchpad/src/tm4c_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..57c285ea60b74d9685fca0ec828b07a2469de36d --- /dev/null +++ b/configs/tm4c123g-launchpad/src/tm4c_buttons.c @@ -0,0 +1,190 @@ +/**************************************************************************** + * config/tm4c123g-launchpad/src/tm4c_buttons.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Bradley Noyes + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include "tiva_gpio.h" +#include "tm4c123g-launchpad.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state of + * all buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + /* Unlock GPIOF from NMI to use it w/ buttons see Register 19 of GPIOs + * and see table 10-10 in datasheet for pins with special considerations. + */ + + tiva_gpio_lockport(GPIO_SW2, false); + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for some pins but NOT used in this file + */ + + tiva_configgpio(GPIO_SW1); + tiva_configgpio(GPIO_SW2); + + /* These pins need to be set to logic high (3.3V) so that the buttons + * can pull them to logic low (0V) + */ + + tiva_gpiowrite(GPIO_SW1, true); + tiva_gpiowrite(GPIO_SW2, true); + + /* Configure GPIO interrupts */ + +#ifdef CONFIG_ARCH_IRQBUTTONS + (void)tiva_gpioirqinitialize(); +#endif +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the BUTTON* + * definitions above for the meaning of each bit in the returned value. + * + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + + /* Check that state of each key. A LOW value means that the key is + * pressed. + */ + + if (!tiva_gpioread(GPIO_SW1)) + { + ret |= BUTTON_SW1_BIT; + } + + if (!tiva_gpioread(GPIO_SW2)) + { + ret |= BUTTON_SW2_BIT; + } + + return ret; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is one + * of the BUTTON* definitions provided above. The previous interrupt + * handler address is returned (so that it may restored, if so desired). + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + uint32_t pinset= 0; + + /* Determine which switch to set the irq handler for */ + + switch (id) + { + case BUTTON_SW1: + pinset = GPIO_SW1; + break; + + case BUTTON_SW2: + pinset = GPIO_SW2; + break; + + default: + return NULL; + } + + /* Are we attaching or detaching? */ + + if (irqhandler != NULL) + { + oldhandler = tiva_gpioirqattach(pinset, irqhandler); + } + else + { + oldhandler = tiva_gpioirqdetach(pinset); + } + + /* Return the old button handler (so that it can be restored) */ + + return oldhandler; +} +#endif + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/tm4c123g-launchpad/src/tm4c_ssi.c b/configs/tm4c123g-launchpad/src/tm4c_ssi.c new file mode 100644 index 0000000000000000000000000000000000000000..e1127a01f5ad318a5cc25b2e2f507fd13f59ef6e --- /dev/null +++ b/configs/tm4c123g-launchpad/src/tm4c_ssi.c @@ -0,0 +1,132 @@ +/************************************************************************************ + * configs/tm4c123g-launchpad/src/tm4c_ssi.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "tiva_gpio.h" +#include "tm4c123g-launchpad.h" + +/* The TM4C123G LaunchPad microSD CS is on SSI0 */ + +#if defined(CONFIG_TIVA_SSI0) || defined(CONFIG_TIVA_SSI1) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* CONFIG_DEBUG_SPI enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifdef CONFIG_DEBUG_SPI +# define ssidbg lldbg +#else +# define ssidbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE) +# define ssivdbg lldbg +# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m) +#else +# define ssivdbg(x...) +# define ssi_dumpgpio(m) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tm4c_ssidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the TM4C123G LaunchPad. + * + ************************************************************************************/ + +void weak_function tm4c_ssidev_initialize(void) +{ +} + +/**************************************************************************** + * The external functions, tiva_ssiselect and tiva_ssistatus must be provided + * by board-specific logic. The are implementations of the select and status + * methods SPI interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * All othermethods (including tiva_ssibus_initialize()) are provided by common + * logic. To use this common SPI logic on your board: + * + * 1. Provide tiva_ssiselect() and tiva_ssistatus() functions in your + * board-specific logic. This function will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 2. Add a call to tiva_ssibus_initialize() in your low level initialization + * logic + * 3. The handle returned by tiva_ssibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssi_dumpgpio("tiva_ssiselect() Entry"); + ssi_dumpgpio("tiva_ssiselect() Exit"); +} + +uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + ssidbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} + +#endif /* CONFIG_TIVA_SSI0 || CONFIG_TIVA_SSI1 */ diff --git a/configs/tm4c123g-launchpad/src/tm4c_timer.c b/configs/tm4c123g-launchpad/src/tm4c_timer.c new file mode 100644 index 0000000000000000000000000000000000000000..8bc01c6edac0b082ab33903ab2cef93fc5b64f30 --- /dev/null +++ b/configs/tm4c123g-launchpad/src/tm4c_timer.c @@ -0,0 +1,103 @@ +/**************************************************************************** + * config/tm4c123g-launchpad/src/tm4c_timer.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * With modifications from Calvin Maguranis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "tiva_timer.h" +#include "tm4c123g-launchpad.h" + +#ifdef CONFIG_TIVA_TIMER + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_TIVA_TIMER32_PERIODIC +# error CONFIG_TIVA_TIMER32_PERIODIC is not defined +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tiva_timer_initialize + * + * Description: + * Configure the timer driver for the timer example application. + * + ****************************************************************************/ + +int tiva_timer_initialize(void) +{ + static bool initialized = false; + int ret = OK; + + /* Check if we have already initialized */ + + if (!initialized) + { + struct tiva_gptm32config_s timer_config; + timer_config.cmn.gptm = 0; + timer_config.cmn.mode = TIMER32_MODE_PERIODIC; + timer_config.cmn.alternate = false; + + timer_config.config.flags = TIMER_FLAG_COUNTUP; + timer_config.config.handler = 0; + timer_config.config.arg = 0; + + ret = tiva_timer_initialize(CONFIG_EXAMPLE_TIMER_DEVNAME, &timer_config); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to register timer driver: %d\n", ret); + } + + /* now we are initialized */ + + initialized = true; + } + + return ret; +} +#endif /* CONFIG_TIVA_TIMER */ diff --git a/configs/tm4c123g-launchpad/tools/oocd.sh b/configs/tm4c123g-launchpad/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..aa97bafb3ae6f3b4e3b730801d6e73b4249bd01d --- /dev/null +++ b/configs/tm4c123g-launchpad/tools/oocd.sh @@ -0,0 +1,58 @@ +#!/bin/sh +# +# See configs/tm4c123g-launchpad/README.txt for information about +# this file. + +TOPDIR=$1 +USAGE="$0 [-d]" +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +# Assume that OpenOCD was installed and at /usr/local/bin. Uncomment +# the following to run directly from the build directory + +# OPENOCD_PATH="/home/OpenOCD/openocd/src" +OPENOCD_PATH="/usr/bin" +# OPENOCD_PATH="/usr/local/bin" + +# TARGET_PATH="/home/OpenOCD/openocd/tcl" +TARGET_PATH="/usr/share/openocd/scripts" +# TARGET_PATH="/usr/local/share/openocd/scripts" + +# Assume a Unix development environment. Uncomment to use a Windows +# like environment + +# OPENOCD_EXE=openocd.exe +OPENOCD_EXE=openocd + +OPENOCD_CFG="${TOPDIR}/configs/tm4c123g-launchpad/tools/tm4c123g-launchpad.cfg" +OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}" + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +if [ ! -d ${OPENOCD_PATH} ]; then + echo "OpenOCD path does not exist: ${OPENOCD_PATH}" + exit 1 +fi +if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then + echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f ${OPENOCD_CFG} ]; then + echo "OpenOCD config file does not exist: ${OPENOCD_CFG}" + exit 1 +fi + +echo "Starting OpenOCD" +cd ${OPENOCD_PATH} || { echo "Failed to CD to ${OPENOCD_PATH}"; exit 1; } +${OPENOCD_EXE} ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" + diff --git a/configs/tm4c123g-launchpad/tools/tm4c123g-launchpad.cfg b/configs/tm4c123g-launchpad/tools/tm4c123g-launchpad.cfg new file mode 100644 index 0000000000000000000000000000000000000000..62fe9812b58932770cf615341f519de740244224 --- /dev/null +++ b/configs/tm4c123g-launchpad/tools/tm4c123g-launchpad.cfg @@ -0,0 +1,12 @@ +# +# TI Tiva C Series ek-tm4c123gxl Launchpad Evaluation Kit +# +# http://www.ti.com/tool/ek-tm4c123gxl +# + +source [find interface/ti-icdi.cfg] + +set WORKAREASIZE 0x8000 +set CHIPNAME tm4c123gh6pm +source [find target/stellaris_icdi.cfg] + diff --git a/configs/tm4c1294-launchpad/Kconfig b/configs/tm4c1294-launchpad/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..ec8c2464faa8f80d57554abb99bd324f64c62f92 --- /dev/null +++ b/configs/tm4c1294-launchpad/Kconfig @@ -0,0 +1,75 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_TM4C1294_LAUNCHPAD +if TIMER && TIVA_TIMER32_PERIODIC + +config TM4C1294_LAUNCHPAD_TIMER + bool + default n + +choice + prompt "Timer driver selection" + default TM4C1294_LAUNCHPAD_TIMER_NONE + +config TM4C1294_LAUNCHPAD_TIMER_NONE + bool "None" + +config TM4C1294_LAUNCHPAD_TIMER0 + bool "Timer 0" + depends on TIVA_TIMER0 + select TM4C1294_LAUNCHPAD_TIMER + +config TM4C1294_LAUNCHPAD_TIMER1 + bool "Timer 1" + depends on TIVA_TIMER1 + select TM4C1294_LAUNCHPAD_TIMER + +config TM4C1294_LAUNCHPAD_TIMER2 + bool "Timer 2" + depends on TIVA_TIMER2 + select TM4C1294_LAUNCHPAD_TIMER + +config TM4C1294_LAUNCHPAD_TIMER3 + bool "Timer 3" + depends on TIVA_TIMER3 + select TM4C1294_LAUNCHPAD_TIMER + +config TM4C1294_LAUNCHPAD_TIMER4 + bool "Timer 4" + depends on TIVA_TIMER4 + select TM4C1294_LAUNCHPAD_TIMER + +config TM4C1294_LAUNCHPAD_TIMER5 + bool "Timer 5" + depends on TIVA_TIMER5 + select TM4C1294_LAUNCHPAD_TIMER + +config TM4C1294_LAUNCHPAD_TIMER6 + bool "Timer 6" + depends on TIVA_TIMER6 + select TM4C1294_LAUNCHPAD_TIMER + +config TM4C1294_LAUNCHPAD_TIMER7 + bool "Timer 7" + depends on TIVA_TIMER7 + select TM4C1294_LAUNCHPAD_TIMER + +endchoice # Timer driver selection + +if TM4C1294_LAUNCHPAD_TIMER + +config TM4C1294_LAUNCHPAD_TIMER_DEVNAME + string "Timer device name" + default "/dev/timer0" + +config TM4C1294_LAUNCHPAD_TIMER_ALTCLK + bool "Use alternate clock source" + default n + depends on EXPERIMENTAL + +endif # TM4C1294_LAUNCHPAD_TIMER +endif # TIVA_TIMER32_PERIODIC +endif # ARCH_BOARD_TM4C1294_LAUNCHPAD diff --git a/configs/tm4c1294-launchpad/README.txt b/configs/tm4c1294-launchpad/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..b670121adea29a03cb532e178e05c91019b837d1 --- /dev/null +++ b/configs/tm4c1294-launchpad/README.txt @@ -0,0 +1,182 @@ +README +====== + + This is the README file for a port of NuttX to the TM4C1294 Connected Launchpad + (more correctly, the EK-TM4C1294XL). For more information about this board, + see http://www.ti.com/tool/ek-tm4c1294xl + +DK-TM4C129X +=========== + + This board configuration derives from the DK-T4C129X. Refer to the README + file at nuttx/configs/dk-tm4c129x for additional information that may be + relevant to this board as well. + +Serial Console +============== + + These configurations use UART0 for the serial console. UART0 is connected + to the on-board TM4C123G-based debugger and is forwarded through the ICDI + virtual UART. + +Configurations +============== + +Each EK-TM4C1294XL configuration is maintained in a +sub-directory and can be selected as follow: + + cd tools + ./configure.sh tm4c1294-launchpad/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + configuration enables the serial ICDI vitual UART on UART0. Support for + builtin applications is enabled, but in the base configuration no + builtin applications are selected. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration uses the CodeSourcery toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too). + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot (arm-nuttx-elf-gcc) + CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary + + 3. Default stack sizes are large and should really be tuned to reduce + the RAM footprint: + + CONFIG_SCHED_HPWORKSTACKSIZE=2048 + CONFIG_IDLETHREAD_STACKSIZE=1024 + CONFIG_USERMAIN_STACKSIZE=2048 + CONFIG_PTHREAD_STACK_DEFAULT=2048 + CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 + CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 + CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 + CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 + + 4. This configuration has the network enabled by default. See the + paragraph "Using the network with NSH" in the DK-TM4C129X README). + + Networking can easily be disabled or reconfigured (See see the + network related configuration settings in the section entitled + "Networking" in the DK-TM4C129X README). + + By default, this configuration assumes a 10.0.0.xx network. It + uses a fixed IP address of 10.0.0.2 and assumes that the host is + at 10.0.0.1 and that the host provides the default router. The + network mask is 255.255.255.0. These address can be changed by + modifying the settings in the configuration. DHCPC can be enabled + be modifying this default configuration (See the "Networking" + section in the DK-TM4C129X README). + + The network initialization thread is enabled in this example. NSH + will create a separate thread when it starts to initialize the + network. This eliminates start-up delays to bring the network. This + feature may be disabled by reverting the configuration as described + under "Network Initialization Thread" in the DK-TM4C129X README. + + The persistent network monitor thread is also available in this + configuration. The network monitor will monitor changes in the + link status and gracefully take the network down when the link is + lost (for example, if the cable is disconnected) and bring the + network back up when the link becomes available again (for example, + if the cable is reconnected). See the paragraph "Network Monitor" + in the DK-TM4C129X README for additional information. + + ipv6: + ---- + This is another version of the NuttShell configuration. It is very + similar to the nsh configuration except that it has IPv6 enabled and + IPv4 disabled. Several network utilities that are not yet available + under IPv6 are disabled. + + NOTES: + + 1. As of 2015-02-12, this configuration was identical to the nsh + configuration other than using IPv6. So all of the notes above + regarding the nsh configuration apply. + + Telnet does not work with IPv6. + + 2. This configuration can be modified to that both IPv4 and IPv6 + are support. Here is a summary of the additional configuration + settings requird to support both IPv4 and IPv6: + + CONFIG_NET_IPv4=y + CONFIG_NET_ARP=y + CONFIG_NET_ARP_SEND=y (optional) + CONFIG_NET_ICMP=y + CONFIG_NET_ICMP_PING=y + + CONFIG_NETDB_DNSCLIENT=y + CONFIG_NETUTILS_TELNETD=y + + CONFIG_NSH_IPADDR=0x0a000002 + CONFIG_NSH_DRIPADDR=0x0a000001 + CONFIG_NSH_NETMASK=0xffffff00 + CONFIG_NSH_TELNET=y + + Then from NSH, you have both ping and ping6 commands: + + nsh> ping 10.0.0.1 + nsh> ping6 fc00::1 + + And from the host you can do similar: + + ping 10.0.0.2 + ping6 fc00::2 (Linux) + ping -6 fc00::2 (Windows cmd) + + and Telnet again works from the host: + + telnet 10.0.0.2 + + 3. You can enable IPv6 autonomous address configuration with the + following changes to the configuration: + + + CONFIG_NET_ICMPv6_AUTOCONF=y + + CONFIG_ICMPv6_AUTOCONF_DELAYMSEC=100 + + CONFIG_ICMPv6_AUTOCONF_MAXTRIES=5 + + - CONFIG_NSH_DRIPv6ADDR_1=0xfc00 + - CONFIG_NSH_DRIPv6ADDR_2=0x0000 + - CONFIG_NSH_DRIPv6ADDR_3=0x0000 + - CONFIG_NSH_DRIPv6ADDR_4=0x0000 + - CONFIG_NSH_DRIPv6ADDR_5=0x0000 + - CONFIG_NSH_DRIPv6ADDR_6=0x0000 + - CONFIG_NSH_DRIPv6ADDR_7=0x0000 + - CONFIG_NSH_DRIPv6ADDR_8=0x0001 + + - CONFIG_NSH_IPv6ADDR_1=0xfc00 + - CONFIG_NSH_IPv6ADDR_2=0x0000 + - CONFIG_NSH_IPv6ADDR_3=0x0000 + - CONFIG_NSH_IPv6ADDR_4=0x0000 + - CONFIG_NSH_IPv6ADDR_5=0x0000 + - CONFIG_NSH_IPv6ADDR_6=0x0000 + - CONFIG_NSH_IPv6ADDR_7=0x0000 + - CONFIG_NSH_IPv6ADDR_8=0x0002 + - CONFIG_NSH_IPv6NETMASK_1=0xffff + - CONFIG_NSH_IPv6NETMASK_2=0xffff + - CONFIG_NSH_IPv6NETMASK_3=0xffff + - CONFIG_NSH_IPv6NETMASK_4=0xffff + - CONFIG_NSH_IPv6NETMASK_5=0xffff + - CONFIG_NSH_IPv6NETMASK_6=0xffff + - CONFIG_NSH_IPv6NETMASK_7=0xffff + - CONFIG_NSH_IPv6NETMASK_8=0xff80 diff --git a/configs/tm4c1294-launchpad/include/board.h b/configs/tm4c1294-launchpad/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..99b018a2217e92735bbd8d1a3eb7f4c638446d64 --- /dev/null +++ b/configs/tm4c1294-launchpad/include/board.h @@ -0,0 +1,210 @@ +/************************************************************************************ + * configs/tm4c1294-launchpad/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_TM4C1294_LAUNCHPAD_INCLUDE_BOARD_H +#define __CONFIGS_TM4C1294_LAUNCHPAD_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* Crystals on-board the EK-TM4C1294XL include: + * + * 1. 25.0MHz (Y2) is connected to OSC0/1 pins and is used as the run mode input to + * the PLL. + * 2. 32.768kHz (Y3) connected to XOSC0/1 and clocks the hibernation module. + */ + +#define SYSCON_RCC_XTAL SYSCON_RCC_XTAL16000KHZ /* On-board crystal is 25 MHz */ +#define XTAL_FREQUENCY 25000000 + +/* Frequencies of other clock sources */ + +#define PIOSC_FREQUENCY 16000000 /* Precision internal oscillator */ +#define RTCOSC_FREQUENCY 32768 /* Hibernation module RTC oscillator */ +#define LFIOSC_FREQUENCY 33000 /* Low frequency internal oscillator */ + +/* The PLL generates Fvco according to the following formulae. The input clock to + * the PLL may be either the external crystal (Fxtal) or PIOSC (Fpiosc). This + * logic supports only the external crystal as the PLL source clock. + * + * Fin = Fxtal / (Q + 1 )(N + 1) -OR- Fpiosc / (Q + 1)(N + 1) + * Mdiv = Mint + (MFrac / 1024) + * Fvco = Fin * Mdiv + * + * Where the register fields Q and N actually hold (Q-1) and (N-1). The following + * setup then generates Fvco = 480MHz: + * + * Fin = 25 MHz / 1 / 5 = 5 MHz + * Mdiv = 96 + * Fvco = 480 + */ + +#define BOARD_PLL_MINT 96 /* Integer part of PLL M value */ +#define BOARD_PLL_MFRAC 0 /* Fractional part of PLL M value */ +#define BOARD_PLL_N 5 /* PLL N value */ +#define BOARD_PLL_Q 1 /* PLL Q value */ + +#define BOARD_FVCO_FREQUENCY 480000000 /* Resulting Fvco */ + +/* When the PLL is active, the system clock frequency (SysClk) is calculated using + * the following equation: + * + * SysClk = Fvco/ (sysdiv + 1) + * + * The following setup generates Sysclk = 120MHz: + */ + +#define BOARD_PLL_SYSDIV 4 /* Sysclk = Fvco / 4 = 120MHz */ +#define SYSCLK_FREQUENCY 120000000 /* Resulting SysClk frequency */ + +/* Alternate Clock (ALTCLK) + * + * The ALTCLK provides a clock source of numerous frequencies to the general-purpose + * timer, SSI, and UART modules. The default source for the ALTCLK is the Precision + * Internal Oscillator (PIOSC). The Hibernation Real-time Clock (RTCOSC) and Low + * Frequency Internal Oscillator (LFIOSC) are alternatives. If the RTCOSC Output is + * selected, the clock source must also be enabled in the Hibernation module. + */ + +#define BOARD_ALTCLKCFG SYSCON_ALTCLKCFG_ALTCLK_PIOSC +#define ALTCLK_FREQUENCY PIOSC_FREQUENCY + +/* LED definitions ******************************************************************/ +/* The EK-TM4C1294XL has 5 green LEDs. + * LED D0 is lit when 3.3V power supply is available . + * LEDs D1 and D2 are general purpose LEDs. + * LEDs D3 and D4 can be used for Ethernet link and activity. + * + * --- ------------ + * Pin Pin Function + * --- ------------ + * PN1 green LED D1 + * PN0 green LED D2 + * PF4 green LED D3 + * PF0 green LED D4 + * --- ------------ + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED_D1 0 +#define BOARD_LED_D2 1 +#define BOARD_LED_D3 2 +#define BOARD_LED_D4 3 +#define BOARD_NLEDS 4 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_D1_BIT (1 << BOARD_LED_D1) +#define BOARD_LED_D2_BIT (1 << BOARD_LED_D2) +#define BOARD_LED_D3_BIT (1 << BOARD_LED_D3) +#define BOARD_LED_D4_BIT (1 << BOARD_LED_D4) + +/* If CONFIG_ARCH_LEDS is defined, then automated support for the EK-TM4C1294XL LED + * will be included in the build: + */ + /* LED1 LED2 LED3 LED4 */ +#define LED_STARTED 1 /* ON OFF NC NC */ +#define LED_HEAPALLOCATE 0 /* NC NC NC NC */ +#define LED_IRQSENABLED 0 /* NC NC NC NC */ +#define LED_STACKCREATED 2 /* ON ON NC NC */ +#define LED_INIRQ 0 /* NC NC NC NC */ +#define LED_SIGNAL 0 /* NC NC NC NC */ +#define LED_ASSERTION 0 /* NC NC NC NC */ +#define LED_PANIC 3 /* OFF ON NC NC (flashing 2Hz) */ + +/* Button definitions ***************************************************************/ +/* There are four push buttons on the board. Two of them are user controllable. + * The others are RESET and WAKE + * + * --- ------------ + * Pin Pin Function + * --- ------------ + * PJ0 USR_SW1 + * PJ1 USR_SW2 + * --- ------------ + */ + +#define BUTTON_SW1 0 +#define BUTTON_SW2 1 +#define NUM_BUTTONS 2 + +#define BUTTON_SW1_BIT (1 << BUTTON_SW1) +#define BUTTON_SW2_BIT (1 << BUTTON_SW2) + +/* Pin Multiplexing Disambiguation **************************************************/ +/* Ethernet LEDs + * + * PF0/PF4/PF1 are used for Ethernet LEDs. + * PF0/EN0LED0/LED4 Ethernet link OK + * PF4/EN0LED1/LED3 Ethernet TX/RX activity + * PF1/EN0LED2 Ethernet 100-base TX + */ + +#define GPIO_EN0_LED0 GPIO_EN0_LED0_1 +#define GPIO_EN0_LED1 GPIO_EN0_LED1_1 +#define GPIO_EN0_LED2 GPIO_EN0_LED2_1 + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Tiva architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_TM4C1294_LAUNCHPAD_INCLUDE_BOARD_H */ diff --git a/configs/tm4c1294-launchpad/ipv6/Make.defs b/configs/tm4c1294-launchpad/ipv6/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..13fa06838c28b7940d16281f39b0a81e9869d97c --- /dev/null +++ b/configs/tm4c1294-launchpad/ipv6/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/tm4c1294-launchpad/ipv6/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/tm4c1294-launchpad/ipv6/defconfig b/configs/tm4c1294-launchpad/ipv6/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..faedcc29feaebe4cdc44796971991f4d48bd4f19 --- /dev/null +++ b/configs/tm4c1294-launchpad/ipv6/defconfig @@ -0,0 +1,1146 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +CONFIG_ARCH_CHIP_TIVA=y +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_FPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_TM4C123GH6ZRB is not set +# CONFIG_ARCH_CHIP_TM4C123GH6PMI is not set +CONFIG_ARCH_CHIP_TM4C1294NC=y +# CONFIG_ARCH_CHIP_TM4C129XNC is not set +# CONFIG_ARCH_CHIP_CC3200 is not set +CONFIG_ARCH_CHIP_TM4C129=y +CONFIG_ARCH_CHIP_TM4C=y +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +CONFIG_TIVA_HAVE_ADC0=y +CONFIG_TIVA_HAVE_ADC1=y +CONFIG_TIVA_I2C=y +CONFIG_TIVA_HAVE_I2C1=y +CONFIG_TIVA_HAVE_I2C2=y +CONFIG_TIVA_HAVE_I2C3=y +CONFIG_TIVA_HAVE_I2C4=y +CONFIG_TIVA_HAVE_I2C5=y +CONFIG_TIVA_HAVE_I2C6=y +CONFIG_TIVA_HAVE_I2C7=y +CONFIG_TIVA_HAVE_I2C8=y +CONFIG_TIVA_HAVE_I2C9=y +CONFIG_TIVA_HAVE_UART3=y +CONFIG_TIVA_HAVE_UART4=y +CONFIG_TIVA_HAVE_UART5=y +CONFIG_TIVA_HAVE_UART6=y +CONFIG_TIVA_HAVE_UART7=y +CONFIG_TIVA_HAVE_SSI0=y +CONFIG_TIVA_HAVE_SSI1=y +CONFIG_TIVA_HAVE_SSI2=y +CONFIG_TIVA_HAVE_SSI3=y +CONFIG_TIVA_HAVE_ETHERNET=y +# CONFIG_TIVA_SSI is not set +# CONFIG_TIVA_TIMER is not set +CONFIG_TIVA_HAVE_TIMER0=y +CONFIG_TIVA_HAVE_TIMER1=y +CONFIG_TIVA_HAVE_TIMER2=y +CONFIG_TIVA_HAVE_TIMER3=y +CONFIG_TIVA_HAVE_TIMER4=y +CONFIG_TIVA_HAVE_TIMER5=y +CONFIG_TIVA_HAVE_TIMER6=y +CONFIG_TIVA_HAVE_TIMER7=y +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_ADC1 is not set +# CONFIG_TIVA_I2C0 is not set +# CONFIG_TIVA_I2C1 is not set +# CONFIG_TIVA_I2C2 is not set +# CONFIG_TIVA_I2C3 is not set +# CONFIG_TIVA_I2C4 is not set +# CONFIG_TIVA_I2C5 is not set +CONFIG_TIVA_I2C6=y +# CONFIG_TIVA_I2C7 is not set +# CONFIG_TIVA_I2C8 is not set +# CONFIG_TIVA_I2C9 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_UART3 is not set +# CONFIG_TIVA_UART4 is not set +# CONFIG_TIVA_UART5 is not set +# CONFIG_TIVA_UART6 is not set +# CONFIG_TIVA_UART7 is not set +# CONFIG_TIVA_SSI0 is not set +# CONFIG_TIVA_SSI1 is not set +# CONFIG_TIVA_SSI2 is not set +# CONFIG_TIVA_SSI3 is not set +# CONFIG_TIVA_TIMER0 is not set +# CONFIG_TIVA_TIMER1 is not set +# CONFIG_TIVA_TIMER2 is not set +# CONFIG_TIVA_TIMER3 is not set +# CONFIG_TIVA_TIMER4 is not set +# CONFIG_TIVA_TIMER5 is not set +# CONFIG_TIVA_TIMER6 is not set +# CONFIG_TIVA_TIMER7 is not set +CONFIG_TIVA_ETHERNET=y +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +# CONFIG_TIVA_GPIO_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOA_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOB_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOC_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOD_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOE_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOF_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOG_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOH_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +CONFIG_TIVA_HAVE_GPIOP_IRQS=y +CONFIG_TIVA_HAVE_GPIOQ_IRQS=y +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +# CONFIG_TIVA_GPIOP_IRQS is not set +# CONFIG_TIVA_GPIOQ_IRQS is not set + +# +# I2C Configuration +# +# CONFIG_TIVA_I2C_DYNTIMEO is not set +CONFIG_TIVA_I2C_TIMEOSEC=0 +CONFIG_TIVA_I2C_TIMEOMS=500 +CONFIG_TIVA_I2C_TIMEOTICKS=500 + +# +# Tiva Ethernet Configuration +# +CONFIG_TIVA_PHY_INTERNAL=y +CONFIG_TIVA_AUTONEG=y +CONFIG_TIVA_PHY_INTERRUPTS=y +CONFIG_TIVA_EMAC_NRXDESC=8 +CONFIG_TIVA_EMAC_NTXDESC=4 +# CONFIG_TIVA_EMAC_ENHANCEDDESC is not set +CONFIG_TIVA_BOARDMAC=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=11401 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=262144 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_TM4C1294_LAUNCHPAD=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="tm4c1294-launchpad" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=24 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set +CONFIG_ARCH_PHY_INTERRUPT=y +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y + +# +# Network Device Operations +# +CONFIG_NETDEV_PHY_IOCTL=y + +# +# Internet Protocol Selection +# +# CONFIG_NET_IPv4 is not set +CONFIG_NET_IPv6=y +CONFIG_NET_IPv6_NCONF_ENTRIES=8 + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_SOLINGER=y + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMPv6 Networking Support +# +CONFIG_NET_ICMPv6=y +CONFIG_NET_ICMPv6_PING=y +# CONFIG_NET_ICMPv6_NEIGHBOR is not set +# CONFIG_NET_ICMPv6_AUTOCONF is not set +# CONFIG_NET_ICMPv6_ROUTER is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=36 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +CONFIG_LIB_BOARDCTL=y + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT_THREAD=y +CONFIG_NSH_NETINIT_MONITOR=y +CONFIG_NSH_NETINIT_SIGNO=18 +CONFIG_NSH_NETINIT_RETRYMSEC=2000 +CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 +CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 + +# +# IP Address Configuration +# + +# +# Target IPv6 address +# +CONFIG_NSH_IPv6ADDR_1=0xfc00 +CONFIG_NSH_IPv6ADDR_2=0x0000 +CONFIG_NSH_IPv6ADDR_3=0x0000 +CONFIG_NSH_IPv6ADDR_4=0x0000 +CONFIG_NSH_IPv6ADDR_5=0x0000 +CONFIG_NSH_IPv6ADDR_6=0x0000 +CONFIG_NSH_IPv6ADDR_7=0x0000 +CONFIG_NSH_IPv6ADDR_8=0x0002 + +# +# Router IPv6 address +# +CONFIG_NSH_DRIPv6ADDR_1=0xfc00 +CONFIG_NSH_DRIPv6ADDR_2=0x0000 +CONFIG_NSH_DRIPv6ADDR_3=0x0000 +CONFIG_NSH_DRIPv6ADDR_4=0x0000 +CONFIG_NSH_DRIPv6ADDR_5=0x0000 +CONFIG_NSH_DRIPv6ADDR_6=0x0000 +CONFIG_NSH_DRIPv6ADDR_7=0x0000 +CONFIG_NSH_DRIPv6ADDR_8=0x0001 + +# +# IPv6 Network mask +# +CONFIG_NSH_IPv6NETMASK_1=0xffff +CONFIG_NSH_IPv6NETMASK_2=0xffff +CONFIG_NSH_IPv6NETMASK_3=0xffff +CONFIG_NSH_IPv6NETMASK_4=0x0000 +CONFIG_NSH_IPv6NETMASK_5=0xffff +CONFIG_NSH_IPv6NETMASK_6=0xffff +CONFIG_NSH_IPv6NETMASK_7=0xffff +CONFIG_NSH_IPv6NETMASK_8=0xff80 +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# CU Minimal Terminal +# +# CONFIG_SYSTEM_CUTERM is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=6 +CONFIG_I2CTOOL_MAXBUS=6 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=400000 + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# +# CONFIG_SYSTEM_MDIO is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# Temperature +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/tm4c1294-launchpad/ipv6/setenv.sh b/configs/tm4c1294-launchpad/ipv6/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..286ff59eaaef8707f4ee79619c328baa5638f620 --- /dev/null +++ b/configs/tm4c1294-launchpad/ipv6/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/tm4c1294-launchpad/ipv6/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The tm4c1294-launchpad/tools directory +export TOOL_DIR="${WD}/configs/tm4c1294-launchpad/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/tm4c1294-launchpad/nsh/Make.defs b/configs/tm4c1294-launchpad/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..bb91d3bb86c0e3390c3ba03cf541d15920a5152f --- /dev/null +++ b/configs/tm4c1294-launchpad/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/tm4c1294-launchpad/nsh/Make.defs +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/tm4c1294-launchpad/nsh/defconfig b/configs/tm4c1294-launchpad/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..afd503223fcf9f64d98efccfc601fad0f56ef4c7 --- /dev/null +++ b/configs/tm4c1294-launchpad/nsh/defconfig @@ -0,0 +1,1096 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +CONFIG_ARCH_CHIP_TIVA=y +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Tiva/Stellaris Configuration Options +# +# CONFIG_ARCH_CHIP_TM4C123GH6ZRB is not set +# CONFIG_ARCH_CHIP_TM4C123GH6PMI is not set +CONFIG_ARCH_CHIP_TM4C1294NC=y +# CONFIG_ARCH_CHIP_TM4C129XNC is not set +# CONFIG_ARCH_CHIP_CC3200 is not set +CONFIG_ARCH_CHIP_TM4C129=y +CONFIG_ARCH_CHIP_TM4C=y +# CONFIG_TIVA_BOARD_EARLYINIT is not set + +# +# Tiva/Stellaris Peripheral Support +# +# CONFIG_TIVA_ADC is not set +CONFIG_TIVA_HAVE_ADC0=y +CONFIG_TIVA_HAVE_ADC1=y +CONFIG_TIVA_I2C=y +CONFIG_TIVA_HAVE_I2C1=y +CONFIG_TIVA_HAVE_I2C2=y +CONFIG_TIVA_HAVE_I2C3=y +CONFIG_TIVA_HAVE_I2C4=y +CONFIG_TIVA_HAVE_I2C5=y +CONFIG_TIVA_HAVE_I2C6=y +CONFIG_TIVA_HAVE_I2C7=y +CONFIG_TIVA_HAVE_I2C8=y +CONFIG_TIVA_HAVE_I2C9=y +CONFIG_TIVA_HAVE_UART3=y +CONFIG_TIVA_HAVE_UART4=y +CONFIG_TIVA_HAVE_UART5=y +CONFIG_TIVA_HAVE_UART6=y +CONFIG_TIVA_HAVE_UART7=y +CONFIG_TIVA_HAVE_SSI0=y +CONFIG_TIVA_HAVE_SSI1=y +CONFIG_TIVA_HAVE_SSI2=y +CONFIG_TIVA_HAVE_SSI3=y +CONFIG_TIVA_HAVE_ETHERNET=y +# CONFIG_TIVA_SSI is not set +# CONFIG_TIVA_TIMER is not set +CONFIG_TIVA_HAVE_TIMER0=y +CONFIG_TIVA_HAVE_TIMER1=y +CONFIG_TIVA_HAVE_TIMER2=y +CONFIG_TIVA_HAVE_TIMER3=y +CONFIG_TIVA_HAVE_TIMER4=y +CONFIG_TIVA_HAVE_TIMER5=y +CONFIG_TIVA_HAVE_TIMER6=y +CONFIG_TIVA_HAVE_TIMER7=y +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_ADC1 is not set +CONFIG_TIVA_I2C0=y +# CONFIG_TIVA_I2C1 is not set +# CONFIG_TIVA_I2C2 is not set +# CONFIG_TIVA_I2C3 is not set +# CONFIG_TIVA_I2C4 is not set +# CONFIG_TIVA_I2C5 is not set +# CONFIG_TIVA_I2C6 is not set +# CONFIG_TIVA_I2C7 is not set +# CONFIG_TIVA_I2C8 is not set +# CONFIG_TIVA_I2C9 is not set +CONFIG_TIVA_UART0=y +# CONFIG_TIVA_UART1 is not set +# CONFIG_TIVA_UART2 is not set +# CONFIG_TIVA_UART3 is not set +# CONFIG_TIVA_UART4 is not set +# CONFIG_TIVA_UART5 is not set +# CONFIG_TIVA_UART6 is not set +# CONFIG_TIVA_UART7 is not set +# CONFIG_TIVA_SSI0 is not set +# CONFIG_TIVA_SSI1 is not set +# CONFIG_TIVA_SSI2 is not set +# CONFIG_TIVA_SSI3 is not set +# CONFIG_TIVA_TIMER0 is not set +# CONFIG_TIVA_TIMER1 is not set +# CONFIG_TIVA_TIMER2 is not set +# CONFIG_TIVA_TIMER3 is not set +# CONFIG_TIVA_TIMER4 is not set +# CONFIG_TIVA_TIMER5 is not set +# CONFIG_TIVA_TIMER6 is not set +# CONFIG_TIVA_TIMER7 is not set +CONFIG_TIVA_ETHERNET=y +# CONFIG_TIVA_FLASH is not set + +# +# Enable GPIO Interrupts +# +# CONFIG_TIVA_GPIO_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOA_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOB_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOC_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOD_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOE_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOF_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOG_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOH_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOJ_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOK_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOL_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOM_IRQS is not set +# CONFIG_TIVA_HAVE_GPION_IRQS is not set +CONFIG_TIVA_HAVE_GPIOP_IRQS=y +CONFIG_TIVA_HAVE_GPIOQ_IRQS=y +# CONFIG_TIVA_HAVE_GPIOR_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOS_IRQS is not set +# CONFIG_TIVA_HAVE_GPIOT_IRQS is not set +# CONFIG_TIVA_GPIOP_IRQS is not set +# CONFIG_TIVA_GPIOQ_IRQS is not set + +# +# I2C Configuration +# +# CONFIG_TIVA_I2C_DYNTIMEO is not set +CONFIG_TIVA_I2C_TIMEOSEC=0 +CONFIG_TIVA_I2C_TIMEOMS=500 +CONFIG_TIVA_I2C_TIMEOTICKS=500 + +# +# Ethernet Configuration +# +CONFIG_TIVA_PHY_INTERNAL=y +CONFIG_TIVA_AUTONEG=y +CONFIG_TIVA_PHY_INTERRUPTS=y +CONFIG_TIVA_EMAC_NRXDESC=8 +CONFIG_TIVA_EMAC_NTXDESC=4 +# CONFIG_TIVA_EMAC_ENHANCEDDESC is not set +CONFIG_TIVA_BOARDMAC=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=11401 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=262144 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_TM4C1294_LAUNCHPAD=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="tm4c1294-launchpad" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2015 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +# CONFIG_I2C_TRACE is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set +CONFIG_ARCH_PHY_INTERRUPT=y +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +# CONFIG_ARCH_HAVE_PHY is not set +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +CONFIG_NETDEV_PHY_IOCTL=y + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_SOLINGER=y + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +# CONFIG_NET_UDP_CHECKSUMS is not set +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +CONFIG_NET_ARP_IPIN=y +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=36 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT_THREAD=y +CONFIG_NSH_NETINIT_MONITOR=y +CONFIG_NSH_NETINIT_SIGNO=18 +CONFIG_NSH_NETINIT_RETRYMSEC=2000 +CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 +CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +# CONFIG_NSH_NOMAC is not set +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_I2CTOOL_MINBUS=6 +CONFIG_I2CTOOL_MAXBUS=6 +CONFIG_I2CTOOL_MINADDR=0x03 +CONFIG_I2CTOOL_MAXADDR=0x77 +CONFIG_I2CTOOL_MAXREGADDR=0xff +CONFIG_I2CTOOL_DEFFREQ=400000 +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_MDIO is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/tm4c1294-launchpad/nsh/setenv.sh b/configs/tm4c1294-launchpad/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..91a85fca7d155e804a6a1f8f9acc58f445fd965f --- /dev/null +++ b/configs/tm4c1294-launchpad/nsh/setenv.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# configs/tm4c1294-launchpad/nsh/setenv.sh +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The tm4c1294-launchpad/tools directory +export TOOL_DIR="${WD}/configs/tm4c1294-launchpad/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/tm4c1294-launchpad/scripts/ld.script b/configs/tm4c1294-launchpad/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..c47cb099a8d08af8c3acdaf0cca20f0835340654 --- /dev/null +++ b/configs/tm4c1294-launchpad/scripts/ld.script @@ -0,0 +1,115 @@ +/**************************************************************************** + * configs/tm4c1294-launchpad/scripts/ld.script + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The TM4C1294NCPDT has 1024Kib of FLASH beginning at address 0x0000:0000 and + * 256Kib of SRAM beginning at 0x2000:0000. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 1M + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 256K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/tm4c1294-launchpad/src/.gitignore b/configs/tm4c1294-launchpad/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/tm4c1294-launchpad/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/tm4c1294-launchpad/src/Makefile b/configs/tm4c1294-launchpad/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..35532e4824c70c9690b4b4e2af404823ed05066a --- /dev/null +++ b/configs/tm4c1294-launchpad/src/Makefile @@ -0,0 +1,63 @@ +############################################################################ +# configs/tm4c1294-launchpad/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = tm4c_boot.c tm4c_bringup.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += tm4c_autoleds.c +else +CSRCS += tm4c_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += tm4c_buttons.c +endif + +ifeq ($(CONFIG_TIVA_ETHERNET),y) +CSRCS += tm4c_ethernet.c +endif + +ifeq ($(CONFIG_DK_TM4C129X_TIMER),y) +CSRCS += tm4c_timer.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += tm4c_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/tm4c1294-launchpad/src/tm4c1294-launchpad.h b/configs/tm4c1294-launchpad/src/tm4c1294-launchpad.h new file mode 100644 index 0000000000000000000000000000000000000000..f18fa39eb1c40955996c2d69f1934275573c39c9 --- /dev/null +++ b/configs/tm4c1294-launchpad/src/tm4c1294-launchpad.h @@ -0,0 +1,181 @@ +/************************************************************************************ + * configs/tm4c1294-launchpad/src/ek-tm4c1294xl.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_TM4C1294_LAUNCHPAD_TM4C1294_LAUNCHPAD_H +#define __CONFIGS_TM4C1294_LAUNCHPAD_TM4C1294_LAUNCHPAD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include "chip.h" +#include "tiva_gpio.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +/* How many SSI modules does this chip support? */ + +#if TIVA_NSSI < 1 +# undef CONFIG_TIVA_SSI0 +# undef CONFIG_TIVA_SSI0 +#elif TIVA_NSSI < 2 +# undef CONFIG_TIVA_SSI0 +#endif + +/* Do we need to register I2C drivers on behalf of the I2C tool? */ + +#define HAVE_I2CTOOL 1 +#if !defined(CONFIG_SYSTEM_I2CTOOL) || !defined(CONFIG_I2C_DRIVER) +# undef HAVE_I2CTOOL +#endif + +/* LED definitions ******************************************************************/ +/* The EK-TM4C1294XL has a four green LEDs. + * + * --- ------------ + * Pin Pin Function + * --- ------------ + * PN1 Green LED D1 + * PN0 Green LED D2 + * PF4 Green LED D3 + * PF0 Green LED D4 + * --- ------------ + * + * A high output illuminates the LED. + */ + +#define GPIO_LED_D1 (GPIO_FUNC_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTN | GPIO_PIN_1) +#define GPIO_LED_D2 (GPIO_FUNC_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTN | GPIO_PIN_0) +#define GPIO_LED_D3 (GPIO_FUNC_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTF | GPIO_PIN_4) +#define GPIO_LED_D4 (GPIO_FUNC_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTF | GPIO_PIN_0) + +/* Button definitions ***************************************************************/ +/* There are four push buttons on the board. Two of them are user controllable. + * The others are RESET and WAKE + * + * --- ------------ + * Pin Pin Function + * --- ------------ + * PJ0 USR_SW1 + * PJ1 USR_SW2 + * --- ------------ + */ +#define GPIO_SW1 (GPIO_FUNC_INPUT | GPIO_PORTJ | GPIO_PIN_0) +#define GPIO_SW2 (GPIO_FUNC_INPUT | GPIO_PORTJ | GPIO_PIN_1) + +/* SPI Chip selects ****************************************************************/ +/* SSI0: PA3 is used for SSI0 chip select to the second booster pack (No pull- +* ups) + * SSI3: PH4 selects the SD card and PQ1 selects the on-board SPI flash. Both + * pulled up on board. + */ + +#define GPIO_BSTR2_CS (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STDWPU | GPIO_STRENGTH_4MA | \ + GPIO_VALUE_ONE | GPIO_PORTA | GPIO_PIN_3) +#define GPIO_FLASH_CS (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STD | GPIO_STRENGTH_4MA | \ + GPIO_VALUE_ONE | GPIO_PORTH | GPIO_PIN_4) +#define GPIO_SD_CS (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STD | GPIO_STRENGTH_4MA | \ + GPIO_VALUE_ONE | GPIO_PORTH | GPIO_PIN_4) + +/* I2C *****************************************************************************/ +/* I2C3: PG4-5 are provide to the BoostPack 1 interface + * I2C7: PA4-5 are provide to the BoostPack 2 interface + * I2C6: PB6-7 are used for I2C to the connector. + */ + +/* Speaker outputs *****************************************************************/ +/* PB2/PD4 are used for the speaker output */ + +/* Touchscreen *********************************************************************/ +/* PE7/PP7/PT2-3 are used for the touch screen */ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Name: tm4c_ssidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the EK-TM4C1294XL. + * + ************************************************************************************/ + +void weak_function tm4c_ssidev_initialize(void); + +/**************************************************************************** + * Name: tm4c_led_initialize + * + * Description: + * Called to initialize the on-board LEDs. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void tm4c_led_initialize(void); +#endif + +/**************************************************************************** + * Name: tm4c_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int tm4c_bringup(void); + +/**************************************************************************** + * Name: tiva_timer_initialize + * + * Description: + * Configure the timer driver + * + ****************************************************************************/ + +#ifdef CONFIG_TM4C1294_LAUNCHPAD_TIMER +int tiva_timer_initialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_TM4C1294_LAUNCHPAD_TM4C1294_LAUNCHPAD_H */ diff --git a/configs/tm4c1294-launchpad/src/tm4c_appinit.c b/configs/tm4c1294-launchpad/src/tm4c_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..c360d7f00cbc433f894559a7bbb42e9bf37ae65f --- /dev/null +++ b/configs/tm4c1294-launchpad/src/tm4c_appinit.c @@ -0,0 +1,73 @@ +/**************************************************************************** + * config/tm4c1294-launchpad/src/tm4c_appinit.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "tm4c1294-launchpad.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + /* If CONFIG_BOARD_INITIALIZE is selected then board initialization was + * already performed in board_initialize. + */ + +#ifndef CONFIG_BOARD_INITIALIZE + return tm4c_bringup(); +#else + return OK; +#endif +} diff --git a/configs/tm4c1294-launchpad/src/tm4c_autoleds.c b/configs/tm4c1294-launchpad/src/tm4c_autoleds.c new file mode 100644 index 0000000000000000000000000000000000000000..6f81c1b4dc11a86bb1ff2457a4c146d2d931583b --- /dev/null +++ b/configs/tm4c1294-launchpad/src/tm4c_autoleds.c @@ -0,0 +1,154 @@ +/**************************************************************************** + * configs/tm4c1294-launchpad/src/tm4c_autoleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "tiva_gpio.h" +#include "tm4c1294-launchpad.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tm4c_led_initialize + * + * Description: + * Called to initialize the on-board LEDs. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void tm4c_led_initialize(void) +{ + /* Configure LED PIOs for output */ + tiva_configgpio(GPIO_LED_D1); + tiva_configgpio(GPIO_LED_D2); + tiva_configgpio(GPIO_LED_D3); + tiva_configgpio(GPIO_LED_D4); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ +/* --------------- ------- ----- ----- ----- ----- ---------- + * STATE VALUE LED1 LED2 LED3 LED4 + * --------------- ------- ----- ----- ----- ----- ---------- + * LED_STARTED 1 ON OFF NC NC + * LED_HEAPALLOCATE 0 NC NC NC NC + * LED_IRQSENABLED 0 NC NC NC NC + * LED_STACKCREATED 2 ON ON NC NC + * LED_INIRQ 0 NC NC NC NC + * LED_SIGNAL 0 NC NC NC NC + * LED_ASSERTION 0 NC NC NC NC + * LED_PANIC 3 OFF ON NC NC (flashing 2Hz) + * --------------- ------- ----- ----- ----- --------------- + * + * A high output illuminates the LED. + */ + + switch (led) + { + default: + case 0: /* No change */ + break; + + case 1: /* LED1=OFF, LED2=OFF, LED3=NC, LED4=NC */ + tiva_gpiowrite(GPIO_LED_D1, true); + tiva_gpiowrite(GPIO_LED_D2, false); + break; + + case 2: /* LED1=ON, LED2=ON, LED3=NC, LED4=NC */ + tiva_gpiowrite(GPIO_LED_D1, true); + tiva_gpiowrite(GPIO_LED_D2, true); + break; + + case 3: /* LED1=OFF, LED2=ON, LED3=NC, LED4=NC */ + tiva_gpiowrite(GPIO_LED_D1, false); + tiva_gpiowrite(GPIO_LED_D2, true); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ +/* --------------- ------- ----- ----- ----- ----- ---------- + * STATE VALUE LED1 LED2 LED3 LED4 + * --------------- ------- ----- ----- ----- ----- ---------- + * LED_STARTED 1 ON OFF NC NC + * LED_HEAPALLOCATE 0 NC NC NC NC + * LED_IRQSENABLED 0 NC NC NC NC + * LED_STACKCREATED 2 ON ON NC NC + * LED_INIRQ 0 NC NC NC NC + * LED_SIGNAL 0 NC NC NC NC + * LED_ASSERTION 0 NC NC NC NC + * LED_PANIC 3 ON OFF NC NC (flashing 2Hz) + * --------------- ------- ----- ----- ----- --------------- + * + * A high output illuminates the LED. + */ + + switch (led) + { + case 0: /* No change */ + case 1: /* Will not happen */ + case 2: /* Will not happen */ + default: + break; + + case 3: /* LED1=ON, LED2=OFF, LED3=NC, LED4=NC */ + tiva_gpiowrite(GPIO_LED_D1, true); + tiva_gpiowrite(GPIO_LED_D2, false); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/tm4c1294-launchpad/src/tm4c_boot.c b/configs/tm4c1294-launchpad/src/tm4c_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..c2d00fb468a3da0cbba136559e93b7d72568e444 --- /dev/null +++ b/configs/tm4c1294-launchpad/src/tm4c_boot.c @@ -0,0 +1,115 @@ +/************************************************************************************ + * configs/tm4c1294xl/src/tm4c_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "tm4c1294-launchpad.h" +#include "up_arch.h" +#include "up_internal.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_boardinitialize + * + * Description: + * All Tiva architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void tiva_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SSI is not disabled, and 2) the weak function + * tm4c_ssidev_initialize() has been brought into the link. + */ + + /* The DK-TM4C129X microSD CS and OLED are on SSI0 */ + +#if defined(CONFIG_TIVA_SSI0) || defined(CONFIG_TIVA_SSI1) + if (tm4c_ssidev_initialize) + { + tm4c_ssidev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + tm4c_led_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform board initialization */ + + (void)tm4c_bringup(); +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/tm4c1294-launchpad/src/tm4c_bringup.c b/configs/tm4c1294-launchpad/src/tm4c_bringup.c new file mode 100644 index 0000000000000000000000000000000000000000..da1778d0fda0ebaf3f98ce4cb26236160ba43b37 --- /dev/null +++ b/configs/tm4c1294-launchpad/src/tm4c_bringup.c @@ -0,0 +1,172 @@ +/**************************************************************************** + * config/tm4c1294-launchpad/src/tm4c_bringup.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "tiva_i2c.h" +#include "tm4c1294-launchpad.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef CONFIG_DK_TM4C129X_TIMER +# define HAVE_TIMER +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tm4c_i2c_register + * + * Description: + * Register one I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void tm4c_i2c_register(int bus) +{ + FAR struct i2c_master_s *i2c; + int ret; + + i2c = tiva_i2cbus_initialize(bus); + if (i2c == NULL) + { + dbg("ERROR: Failed to get I2C%d interface\n", bus); + } + else + { + ret = i2c_register(i2c, bus); + if (ret < 0) + { + dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); + tiva_i2cbus_uninitialize(i2c); + } + } +} +#endif + +/**************************************************************************** + * Name: tm4c_i2ctool + * + * Description: + * Register I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#ifdef HAVE_I2CTOOL +static void tm4c_i2ctool(void) +{ +#ifdef CONFIG_TIVA_I2C0 + tm4c_i2c_register(0); +#endif +#ifdef CONFIG_TIVA_I2C1 + tm4c_i2c_register(1); +#endif +#ifdef CONFIG_TIVA_I2C2 + tm4c_i2c_register(2); +#endif +#ifdef CONFIG_TIVA_I2C3 + tm4c_i2c_register(3); +#endif +#ifdef CONFIG_TIVA_I2C4 + tm4c_i2c_register(4); +#endif +#ifdef CONFIG_TIVA_I2C5 + tm4c_i2c_register(5); +#endif +#ifdef CONFIG_TIVA_I2C6 + tm4c_i2c_register(6); +#endif +#ifdef CONFIG_TIVA_I2C7 + tm4c_i2c_register(7); +#endif +#ifdef CONFIG_TIVA_I2C8 + tm4c_i2c_register(8); +#endif +#ifdef CONFIG_TIVA_I2C9 + tm4c_i2c_register(9); +#endif +} +#else +# define tm4c_i2ctool() +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tm4c_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int tm4c_bringup(void) +{ +#ifdef HAVE_TIMER + int ret; +#endif + + /* Register I2C drivers on behalf of the I2C tool */ + + tm4c_i2ctool(); + +#ifdef HAVE_TIMER + /* Initialize the timer driver */ + + ret = tiva_timer_initialize(); + if (ret < 0) + { + dbg("ERROR: Failed to initialize timer driver: %d\n", ret); + } +#endif + + return OK; +} diff --git a/configs/tm4c1294-launchpad/src/tm4c_buttons.c b/configs/tm4c1294-launchpad/src/tm4c_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..17d83c81f36a1f7fddce42a3e417e152247d0ccb --- /dev/null +++ b/configs/tm4c1294-launchpad/src/tm4c_buttons.c @@ -0,0 +1,128 @@ +/**************************************************************************** + * configs/tm4c1294-launchpad/src/tm4c_buttons.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include +#include + +#include "tm4c1294-launchpad.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each STM3210E-EVAL button. This array is indexed by + * the BUTTON_* and JOYSTICK_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_SW1, GPIO_SW2 +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + tiva_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed. */ + + bool released = tiva_gpioread(g_buttons[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/tm4c1294-launchpad/src/tm4c_ethernet.c b/configs/tm4c1294-launchpad/src/tm4c_ethernet.c new file mode 100644 index 0000000000000000000000000000000000000000..f668660342a18969aad1f40d62dcd0b8e777583b --- /dev/null +++ b/configs/tm4c1294-launchpad/src/tm4c_ethernet.c @@ -0,0 +1,99 @@ +/************************************************************************************ + * configs/tm4c1294-launchpad/src/tm4c_ethernet.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "chip/tiva_flash.h" +#include "tiva_ethernet.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: tiva_ethernetmac + * + * Description: + * For the Ethernet Eval Kits, the MAC address will be stored in the non-volatile + * USER0 and USER1 registers. If CONFIG_TIVA_BOARDMAC is defined, this function + * will obtain the MAC address from these registers. + * + ************************************************************************************/ + +#ifdef CONFIG_TIVA_BOARDMAC +void tiva_ethernetmac(struct ether_addr *ethaddr) +{ + uint32_t user0; + uint32_t user1; + + /* Get the current value of the user registers */ + + user0 = getreg32(TIVA_FLASH_USERREG0); + user1 = getreg32(TIVA_FLASH_USERREG1); + + nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff); + DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff); + + /* Re-format that MAC address the way that uIP expects to see it */ + + ethaddr->ether_addr_octet[0] = ((user0 >> 0) & 0xff); + ethaddr->ether_addr_octet[1] = ((user0 >> 8) & 0xff); + ethaddr->ether_addr_octet[2] = ((user0 >> 16) & 0xff); + ethaddr->ether_addr_octet[3] = ((user1 >> 0) & 0xff); + ethaddr->ether_addr_octet[4] = ((user1 >> 8) & 0xff); + ethaddr->ether_addr_octet[5] = ((user1 >> 16) & 0xff); +} +#endif diff --git a/configs/tm4c1294-launchpad/src/tm4c_timer.c b/configs/tm4c1294-launchpad/src/tm4c_timer.c new file mode 100644 index 0000000000000000000000000000000000000000..94f6ab0bb433520f812a4fdad6d3d0f32a9a6e9e --- /dev/null +++ b/configs/tm4c1294-launchpad/src/tm4c_timer.c @@ -0,0 +1,117 @@ +/**************************************************************************** + * config/tm4c1294-launchpad/src/tm4c_timer.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include "tiva_timer.h" +#include "tm4c1294-launchpad.h" + +#ifdef CONFIG_TM4C1294_LAUNCHPAD_TIMER + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_TIMER +# error CONFIG_TIMER is not defined +#endif + +#ifndef CONFIG_TIVA_TIMER32_PERIODIC +# error CONFIG_TIVA_TIMER32_PERIODIC is not defined +#endif + +#if defined(CONFIG_DK_TM4CTM4C1294_LAUNCHPADX_TIMER0) +# define GPTM 0 +#elif defined(CONFIG_TM4C1294_LAUNCHPAD_TIMER1) +# define GPTM 1 +#elif defined(CONFIG_TM4C1294_LAUNCHPAD_TIMER2) +# define GPTM 2 +#elif defined(CONFIG_TM4C1294_LAUNCHPAD_TIMER3) +# define GPTM 3 +#elif defined(CONFIG_TM4C1294_LAUNCHPAD_TIMER4) +# define GPTM 4 +#elif defined(CONFIG_TM4C1294_LAUNCHPAD_TIMER5) +# define GPTM 5 +#elif defined(CONFIG_TM4C1294_LAUNCHPAD_TIMER6) +# define GPTM 6 +#elif defined(CONFIG_TM4C1294_LAUNCHPAD_TIMER7) +# define GPTM 7 +#else +# error No CONFIG_TM4C1294_LAUNCHPAD_TIMERn definition +#endif + +#ifndef CONFIG_TM4C1294_LAUNCHPAD_TIMER_DEVNAME +# define CONFIG_TM4C1294_LAUNCHPAD_TIMER_DEVNAME "/dev/timer0" +#endif + +#undef CONFIG_TM4C1294_LAUNCHPAD_TIMER_ALTCLK +#define ALTCLK false + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tiva_timer_initialize + * + * Description: + * Configure the timer driver + * + ****************************************************************************/ + +int tiva_timer_initialize(void) +{ + int ret; + + timvdbg("Registering TIMER%d at %s\n", + GPTM, CONFIG_TM4C1294_LAUNCHPAD_TIMER_DEVNAME); + + ret = tiva_timer_register(CONFIG_TM4C1294_LAUNCHPAD_TIMER_DEVNAME, + GPTM, ALTCLK); + if (ret < 0) + { + timdbg("ERROR: Failed to register timer driver: %d\n", ret); + } + + return ret; +} + +#endif /* CONFIG_TM4C1294_LAUNCHPAD_TIMER */ diff --git a/configs/tm4c1294-launchpad/src/tm4c_userleds.c b/configs/tm4c1294-launchpad/src/tm4c_userleds.c new file mode 100644 index 0000000000000000000000000000000000000000..d73ab5a13f7b5740bd4d6d50ca7fdf0e6fc3379b --- /dev/null +++ b/configs/tm4c1294-launchpad/src/tm4c_userleds.c @@ -0,0 +1,153 @@ +/**************************************************************************** + * configs/tm4c1294-launchpad/src/tm4c_userleds.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* The EK-TM4C1294XL has a four green LEDs. + * + * --- ------------ + * Pin Pin Function + * --- ------------ + * PN1 Green LED D1 + * PN0 Green LED D2 + * PF4 Green LED D3 + * PF0 Green LED D4 + * --- ------------ + * + * A high output illuminates the LED. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "tiva_gpio.h" +#include "tm4c1294-launchpad.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED PIOs for output */ + + tiva_configgpio(GPIO_LED_D1); + tiva_configgpio(GPIO_LED_D2); + tiva_configgpio(GPIO_LED_D3); + tiva_configgpio(GPIO_LED_D4); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint32_t ledcfg; + + if (led == BOARD_LED_D1) + { + ledcfg = GPIO_LED_D1; + } + else if (led == BOARD_LED_D2) + { + ledcfg = GPIO_LED_D2; + } + else if (led == BOARD_LED_D3) + { + ledcfg = GPIO_LED_D3; + } + else if (led == BOARD_LED_D4) + { + ledcfg = GPIO_LED_D4; + } + else + { + return; + } + + tiva_gpiowrite(ledcfg, ledon); +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + bool ledon; + + ledon = ((ledset & BOARD_LED_D1_BIT) != 0); + tiva_gpiowrite(GPIO_LED_D1, ledon); + + ledon = ((ledset & BOARD_LED_D2_BIT) != 0); + tiva_gpiowrite(GPIO_LED_D2, ledon); + + ledon = ((ledset & BOARD_LED_D3_BIT) != 0); + tiva_gpiowrite(GPIO_LED_D3, ledon); + + ledon = ((ledset & BOARD_LED_D4_BIT) != 0); + tiva_gpiowrite(GPIO_LED_D4, ledon); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/configs/tm4c1294-launchpad/tools/ek-tm4c1294xl.cfg b/configs/tm4c1294-launchpad/tools/ek-tm4c1294xl.cfg new file mode 100644 index 0000000000000000000000000000000000000000..76362aa4b92c49d77bd1f7be570ec7248e15fae2 --- /dev/null +++ b/configs/tm4c1294-launchpad/tools/ek-tm4c1294xl.cfg @@ -0,0 +1,12 @@ +# +# TI Tiva C Series ek-tm4c1294xl Launchpad Evaluation Kit +# +# http://www.ti.com/tool/ek-tm4c1294xl +# + +source [find interface/ti-icdi.cfg] +transport select hla_jtag + +set WORKAREASIZE 0x40000 +set CHIPNAME tm4c1294ncpdt +source [find target/stellaris.cfg] diff --git a/configs/tm4c1294-launchpad/tools/oocd.sh b/configs/tm4c1294-launchpad/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..e0f6361cadb24955012bf6a4c16cdf1d00fc4c5b --- /dev/null +++ b/configs/tm4c1294-launchpad/tools/oocd.sh @@ -0,0 +1,57 @@ +#!/bin/sh +# +# See configs/tm4c1294-launchpad/README.txt for information about +# this file. + +TOPDIR=$1 +USAGE="$0 [-d]" +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +# Assume that OpenOCD was installed and at /usr/local/bin. Uncomment +# the following to run directly from the build directory + +# OPENOCD_PATH="/home/OpenOCD/openocd/src" +OPENOCD_PATH="/usr/bin" +# OPENOCD_PATH="/usr/local/bin" + +# TARGET_PATH="/home/OpenOCD/openocd/tcl" +TARGET_PATH="/usr/share/openocd/scripts" +# TARGET_PATH="/usr/local/share/openocd/scripts" + +# Assume a Unix development environment. Uncomment to use a Windows +# like environment + +# OPENOCD_EXE=openocd.exe +OPENOCD_EXE=openocd + +OPENOCD_CFG="${TOPDIR}/configs/tm4c1294-launchpad/tools/ek-tm4c1294xl.cfg" +OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}" + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +if [ ! -d ${OPENOCD_PATH} ]; thenf + echo "OpenOCD path does not exist: ${OPENOCD_PATH}" + exit 1 +fi +if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then + echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f ${OPENOCD_CFG} ]; then + echo "OpenOCD config file does not exist: ${OPENOCD_CFG}" + exit 1 +fi + +echo "Starting OpenOCD" +cd ${OPENOCD_PATH} || { echo "Failed to CD to ${OPENOCD_PATH}"; exit 1; } +${OPENOCD_EXE} ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" diff --git a/configs/twr-k60n512/Kconfig b/configs/twr-k60n512/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..0636ec5e3403c8b3386e5f43a0c4a3b00fd6340b --- /dev/null +++ b/configs/twr-k60n512/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_TWR_K60N512 +endif diff --git a/configs/twr-k60n512/README.txt b/configs/twr-k60n512/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..e3c827f9875156acc923f1b232f48e8e5a544df3 --- /dev/null +++ b/configs/twr-k60n512/README.txt @@ -0,0 +1,695 @@ +README.txt +========== + +This is the README file for the port of NuttX to the Freescale Kinetis +TWR-K60N512. Refer to the Freescale web site for further information +about this part: +http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=TWR-K60N512-KIT + +The TWR-K60N51 includes with the FreeScale Tower System which provides (among +other things) a simple UART connection. + +Contents +======== + + o Kinetis TWR-K60N512 Features + o Kinetis TWR-K60N512 Pin Configuration + - On-Board Connections + - Connections via the General Purpose Tower Plug-in (TWRPI) Socket + - Connections via the Tower Primary Connector Side A + - Connections via the Tower Primary Connector Side B + - TWR-SER Serial Board Connection + o LEDs + o Development Environment + o GNU Toolchain Options + o IDEs + o NuttX EABI "buildroot" Toolchain + o NuttX OABI "buildroot" Toolchain + o NXFLAT Toolchain + +Kinetis TWR-K60N512 Features: +============================= + + o K60N512 in 144 MAPBGA, K60N512VMD100 + o Capacitive Touch Pads + o Integrated, Open-Source JTAG + o SD Card Slot + o MMA7660 3-axis accelerometer + o Tower Plug-In (TWRPI) Socket for expansion (sensors, etc.) + o Touch TWRPI Socket adds support for various capacitive touch boards + (e.g. keypads, rotary dials, sliders, etc.) + o Tower connectivity for access to USB, Ethernet, RS232/RS485, CAN, SPI, + I²C, Flexbus, etc. + o Plus: Potentiometer, 4 LEDs, 2 pushbuttons, infrared port + +Kinetis TWR-K60N512 Pin Configuration +===================================== + +On-Board Connections +-------------------- ------------------------- -------- ------------------- +FEATURE CONNECTION PORT/PIN PIN FUNCTION +-------------------- ------------------------- -------- ------------------- +OSJTAG USB-to-serial OSJTAG Bridge RX Data PTE9 UART5_RX +Bridge OSJTAG Bridge TX Data PTE8 UART5_TX +SD Card Slot SD Clock PTE2 SDHC0_DCLK + SD Command PTE3 SDHC0_CMD + SD Data0 PTE1 SDHC0_D0 + SD Data1 PTE0 SDHC0_D1 + SD Data2 PTE5 SDHC0_D2 + SD Data3 PTE4 SDHC0_D3 + SD Card Detect PTE28 PTE28 + SD Write Protect PTE27 PTE27 +Infrared Port IR Transmit PTD7 CMT_IRO + IR Receive PTC6 CMP0_IN0 +Pushbuttons SW1 (IRQ0) PTA19 PTA19 + SW2 (IRQ1) PTE26 PTE26 + SW3 (RESET) RESET_b RESET_b +Touch Pads E1 / Touch PTA4 TSI0_CH5 + E2 / Touch PTB3 TSI0_CH8 + E3 / Touch PTB2 TSI0_CH7 + E4 / Touch PTB16 TSI0_CH9 +LEDs E1 / Orange LED PTA11 PTA11 + E2 / Yellow LED PTA28 PTA28 + E3 / Green LED PTA29 PTA29 + E4 / Blue LED PTA10 PTA10 +Potentiometer Potentiometer (R71) ? ADC1_DM1 +Accelerometer I2C SDA PTD9 I2C0_SDA + I2C SCL PTD8 I2C0_SCL + IRQ PTD10 PTD10 +Touch Pad / Segment Electrode 0 (J3 Pin 3) PTB0 TSI0_CH0 +LCD TWRPI Socket Electrode 1 (J3 Pin 5) PTB1 TSI0_CH6 + Electrode 2 (J3 Pin 7) PTB2 TSI0_CH7 + Electrode 3 (J3 Pin 8) PTB3 TSI0_CH8 + Electrode 4 (J3 Pin 9) PTC0 TSI0_CH13 + Electrode 5 (J3 Pin 10) PTC1 TSI0_CH14 + Electrode 6 (J3 Pin 11) PTC2 TSI0_CH15 + Electrode 7 (J3 Pin 12) PTA4 TSI0_CH5 + Electrode 8 (J3 Pin 13) PTB16 TSI0_CH9 + Electrode 9 (J3 Pin 14) PTB17 TSI0_CH10 + Electrode 10 (J3 Pin 15) PTB18 TSI0_CH11 + Electrode 11 (J3 Pin 16) PTB19 TSI0_CH12 + TWRPI ID0 (J3 Pin 17) ? ADC1_DP1 + TWRPI ID1 (J3 Pin 18) ? ADC1_SE16 + +Connections via the General Purpose Tower Plug-in (TWRPI) Socket +-------------------- ------------------------- -------- ------------------- +FEATURE CONNECTION PORT/PIN PIN FUNCTION +-------------------- ------------------------- -------- ------------------- +General Purpose TWRPI AN0 (J4 Pin 8) ? ADC0_DP0/ADC1_DP3 +TWRPI Socket TWRPI AN1 (J4 Pin 9) ? ADC0_DM0/ADC1_DM3 + TWRPI AN2 (J4 Pin 12) ? ADC1_DP0/ADC0_DP3 + TWRPI ID0 (J4 Pin 17) ? ADC0_DP1 + TWRPI ID1 (J4 Pin 18) ? ADC0_DM1 + TWRPI I2C SCL (J5 Pin 3) PTD8 I2C0_SCL + TWRPI I2C SDA (J5 Pin 4) PTD9 I2C0_SDA + TWRPI SPI MISO (J5 Pin 9) PTD14 SPI2_SIN + TWRPI SPI MOSI (J5 Pin 10) PTD13 SPI2_SOUT + TWRPI SPI SS (J5 Pin 11) PTD15 SPI2_PCS0 + TWRPI SPI CLK (J5 Pin 12) PTD12 SPI2_SCK + TWRPI GPIO0 (J5 Pin 15) PTD10 PTD10 + TWRPI GPIO1 (J5 Pin 16) PTB8 PTB8 + TWRPI GPIO2 (J5 Pin 17) PTB9 PTB9 + TWRPI GPIO3 (J5 Pin 18) PTA19 PTA19 + TWRPI GPIO4 (J5 Pin 19) PTE26 PTE26 + +The TWR-K60N512 features two expansion card-edge connectors that interface +to the Primary and Secondary Elevator boards in a Tower system. The Primary +Connector (comprised of sides A and B) is utilized by the TWR-K60N512 while +the Secondary Connector (comprised of sides C and D) only makes connections +to the GND pins. + +Connections via the Tower Primary Connector Side A +--- -------------------- -------------------------------- +PIN NAME USAGE +--- -------------------- -------------------------------- +A7 SCL0 PTD8 +A8 SDA0 PTD9 +A9 GPIO9 / CTS1 PTC19 +A10 GPIO8 / SDHC_D2 PTE5 +A11 GPIO7 / SD_WP_DET PTE27 +A13 ETH_MDC PTB1 +A14 ETH_MDIO PTB0 +A16 ETH_RXDV PTA14 +A19 ETH_RXD1 PTA12 +A20 ETH_RXD0 PTA13 +A21 SSI_MCLK PTE6 +A22 SSI_BCLK PTE12 +A23 SSI_FS PTE11 +A24 SSI_RXD PTE7 +A25 SSI_TXD PTE10 +A27 AN3 PGA0_DP/ADC0_DP0/ADC1_DP3 +A28 AN2 PGA0_DM/ADC0_DM0/ADC1_DM3 +A29 AN1 PGA1_DP/ADC1_DP0/ADC0_DP3 +A30 AN0 PGA1_DM/ADC1_DM0/ADC0_DM3 +A33 TMR1 PTA9 +A34 TMR0 PTA8 +A35 GPIO6 PTB9 +A37 PWM3 PTA6 +A38 PWM2 PTC3 +A39 PWM1 PTC2 +A40 PWM0 PTC1 +A41 RXD0 PTE25 +A42 TXD0 PTE24 +A43 RXD1 PTC16 +A44 TXD1 PTC17 +A64 CLKOUT0 PTC3 +A66 EBI_AD14 PTC0 +A67 EBI_AD13 PTC1 +A68 EBI_AD12 PTC2 +A69 EBI_AD11 PTC4 +A70 EBI_AD10 PTC5 +A71 EBI_AD9 PTC6 +A71 EBI_R/W_b PTC11 +A72 EBI_AD8 PTC7 +A73 EBI_AD7 PTC8 +A74 EBI_AD6 PTC9 +A75 EBI_AD5 PTC10 +A76 EBI_AD4 PTD2 +A77 EBI_AD3 PTD3 +A78 EBI_AD2 PTD4 +A79 EBI_AD1 PTD5 +A80 EBI_AD0 PTD6 + +Connections via the Tower Primary Connector Side B +--- -------------------- -------------------------------- +PIN NAME USAGE +--- -------------------- -------------------------------- +B7 SDHC_CLK / SPI1_CLK PTE2 +B9 SDHC_D3 / SPI1_CS0_b PTE4 +B10 SDHC_CMD / SPI1_MOSI PTE1 +B11 SDHC_D0 / SPI1_MISO PTE3 +B13 ETH_RXER PTA5 +B15 ETH_TXEN PTA15 +B19 ETH_TXD1 PTA17 +B20 ETH_TXD0 PTA16 +B21 GPIO1 / RTS1 PTC18 +B22 GPIO2 / SDHC_D1 PTE0 +B23 GPIO3 PTE28 +B24 CLKIN0 PTA18 +B25 CLKOUT1 PTE26 +B27 AN7 PTB7 +B28 AN6 PTB6 +B29 AN5 PTB5 +B30 AN4 PTB4 +B34 TMR2 PTD6 +B35 GPIO4 PTB8 +B37 PWM7 PTA2 +B38 PWM6 PTA1 +B39 PWM5 PTD5 +B40 PWM4 PTA7 +B41 CANRX0 PTE25 +B42 CANTX0 PTE24 +B44 SPI0_MISO PTD14 +B45 SPI0_MOSI PTD13 +B46 SPI0_CS0_b PTD11 +B47 SPI0_CS1_b PTD15 +B48 SPI0_CLK PTD12 +B50 SCL1 PTD8 +B51 SDA1 PTD9 +B52 GPIO5 / SD_CARD_DET PTE28 +B55 IRQ_H PTA24 +B56 IRQ_G PTA24 +B57 IRQ_F PTA25 +B58 IRQ_E PTA25 +B59 IRQ_D PTA26 +B60 IRQ_C PTA26 +B61 IRQ_B PTA27 +B62 IRQ_A PTA27 +B63 EBI_ALE / EBI_CS1_b PTD0 +B64 EBI_CS0_b PTD1 +B66 EBI_AD15 PTB18 +B67 EBI_AD16 PTB17 +B68 EBI_AD17 PTB16 +B69 EBI_AD18 PTB11 +B70 EBI_AD19 PTB10 +B72 EBI_OE_b PTB19 +B73 EBI_D7 PTB20 +B74 EBI_D6 PTB21 +B75 EBI_D5 PTB22 +B76 EBI_D4 PTB23 +B77 EBI_D3 PTC12 +B78 EBI_D2 PTC13 +B79 EBI_D1 PTC14 +B80 EBI_D0 PTC15 + +TWR-SER Serial Board Connection +=============================== + +The serial board connects into the tower and then maps to the tower pins to +yet other functions (see TWR-SER.pdf). + +For the serial port, the following jumpers are required: + + J15: 1-2 (default) + J17: 1-2 (default) + J18: 1-2 (default) + J19: 1-2 (default) + +The two connections map as follows: + + A41 RXD0 - Not connected + A42 TXD0 - Not connected + A43 RXD1 - ELE_RXD (connects indirectory to DB-9 connector J8) + A44 TXD1 - ELE_TXD (connects indirectory to DB-9 connector J8) + +Finally, we can conclude that: + + UART4 (PTE24/25) is not connected, and + UART3 (PTC16/17) is associated with the DB9 connector + +NOTE: UART5 is associated with OSJTAG bridge and may also be usable. + +LEDs +==== + +The TWR-K60N100 board has four LEDs labeled D2..D4 on the board. Usage of +these LEDs is defined in include/board.h and src/up_leds.c. They are encoded +as follows: + + SYMBOL Meaning LED1* LED2 LED3 LED4 + ------------------- ----------------------- ------- ------- ------- ------ + LED_STARTED NuttX has been started ON OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF + LED_IRQSENABLED Interrupts enabled ON ON OFF OFF + LED_STACKCREATED Idle stack created OFF OFF ON OFF + LED_INIRQ In an interrupt** ON N/C N/C OFF + LED_SIGNAL In a signal handler*** N/C ON N/C OFF + LED_ASSERTION An assertion failed ON ON N/C OFF + LED_PANIC The system has crashed N/C N/C N/C ON + LED_IDLE STM32 is is sleep mode (Optional, not used) + + * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot + and these LEDs will give you some indication of where the failure was + ** The normal state is LED3 ON and LED1 faintly glowing. This faint glow + is because of timer interrupts that result in the LED being illuminated + on a small proportion of the time. +*** LED2 may also flicker normally if signals are processed. + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +===================== + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the CodeSourcery Windows toolchain. To + use the devkitARM or the NuttX GNU toolchain, you simply need to change the + the following configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows) and devkitARM toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/k40, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/kinetis/k40_vectors.S. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M4 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M4 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + NOTE: The NuttX toolchain may not include optimizations for Cortex-M4 (ARMv7E-M). + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh twr-k60n512/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M4 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +TWR-K60N512-specific Configuration Options +========================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This sould + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=k40 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_MK60N512VMD100 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=twr-k60n512 (for the TWR-K60N512 development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_TWR_K60N512=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_KINETIS_TRACE -- Enable trace clocking on power up. + CONFIG_KINETIS_FLEXBUS -- Enable flexbus clocking on power up. + CONFIG_KINETIS_UART0 -- Support UART0 + CONFIG_KINETIS_UART1 -- Support UART1 + CONFIG_KINETIS_UART2 -- Support UART2 + CONFIG_KINETIS_UART3 -- Support UART3 + CONFIG_KINETIS_UART4 -- Support UART4 + CONFIG_KINETIS_UART5 -- Support UART5 + CONFIG_KINETIS_ENET -- Support Ethernet (K60 only) + CONFIG_KINETIS_RNGB -- Support the random number generator(K60 only) + CONFIG_KINETIS_FLEXCAN0 -- Support FlexCAN0 + CONFIG_KINETIS_FLEXCAN1 -- Support FlexCAN1 + CONFIG_KINETIS_SPI0 -- Support SPI0 + CONFIG_KINETIS_SPI1 -- Support SPI1 + CONFIG_KINETIS_SPI2 -- Support SPI2 + CONFIG_KINETIS_I2C0 -- Support I2C0 + CONFIG_KINETIS_I2C1 -- Support I2C1 + CONFIG_KINETIS_I2S -- Support I2S + CONFIG_KINETIS_DAC0 -- Support DAC0 + CONFIG_KINETIS_DAC1 -- Support DAC1 + CONFIG_KINETIS_ADC0 -- Support ADC0 + CONFIG_KINETIS_ADC1 -- Support ADC1 + CONFIG_KINETIS_CMP -- Support CMP + CONFIG_KINETIS_VREF -- Support VREF + CONFIG_KINETIS_SDHC -- Support SD host controller + CONFIG_KINETIS_FTM0 -- Support FlexTimer 0 + CONFIG_KINETIS_FTM1 -- Support FlexTimer 1 + CONFIG_KINETIS_FTM2 -- Support FlexTimer 2 + CONFIG_KINETIS_LPTIMER -- Support the low power timer + CONFIG_KINETIS_RTC -- Support RTC + CONFIG_KINETIS_SLCD -- Support the segment LCD (K60 only) + CONFIG_KINETIS_EWM -- Support the external watchdog + CONFIG_KINETIS_CMT -- Support Carrier Modulator Transmitter + CONFIG_KINETIS_USBOTG -- Support USB OTG (see also CONFIG_USBHOST and CONFIG_USBDEV) + CONFIG_KINETIS_USBDCD -- Support the USB Device Charger Detection module + CONFIG_KINETIS_LLWU -- Support the Low Leakage Wake-Up Unit + CONFIG_KINETIS_TSI -- Support the touch screeen interface + CONFIG_KINETIS_FTFL -- Support FLASH + CONFIG_KINETIS_DMA -- Support DMA + CONFIG_KINETIS_CRC -- Support CRC + CONFIG_KINETIS_PDB -- Support the Programmable Delay Block + CONFIG_KINETIS_PIT -- Support Programmable Interval Timers + CONFIG_ARM_MPU -- Support the MPU + + Kinetis interrupt priorities (Default is the mid priority). These should + not be set because they can cause unhandled, nested interrupts. All + interrupts need to be at the default priority in the current design. + + CONFIG_KINETIS_UART0PRIO + CONFIG_KINETIS_UART1PRIO + CONFIG_KINETIS_UART2PRIO + CONFIG_KINETIS_UART3PRIO + CONFIG_KINETIS_UART4PRIO + CONFIG_KINETIS_UART5PRIO + + CONFIG_KINETIS_EMACTMR_PRIO + CONFIG_KINETIS_EMACTX_PRIO + CONFIG_KINETIS_EMACRX_PRIO + CONFIG_KINETIS_EMACMISC_PRIO + + CONFIG_KINETIS_SDHC_PRIO + + PIN Interrupt Support + + CONFIG_GPIO_IRQ -- Enable pin interrupt support. Also needs + one or more of the following: + CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts + CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts + CONFIG_KINETIS_PORTCINTS -- Support 32 Port C interrupts + CONFIG_KINETIS_PORTDINTS -- Support 32 Port D interrupts + CONFIG_KINETIS_PORTEINTS -- Support 32 Port E interrupts + + Kinetis K60 specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn (n=0..5) for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. + CONFIG_UARTn_BITS - The number of bits. Must be either 8 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + + Kenetis ethernet controller settings + + CONFIG_ENET_NRXBUFFERS - Number of RX buffers. The size of one + buffer is determined by CONFIG_NET_ETH_MTU. Default: 6 + CONFIG_ENET_NTXBUFFERS - Number of TX buffers. The size of one + buffer is determined by CONFIG_NET_ETH_MTU. Default: 2 + CONFIG_ENET_USEMII - Use MII mode. Default: RMII mode. + CONFIG_ENET_PHYADDR - PHY address + +Configurations +============== + +Each TWR-K60N512 configuration is maintained in a sub-directory and +can be selected as follow: + + cd tools + ./configure.sh twr-k60n512/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables both the serial and telnet NSH interfaces. + Support for the board's SPI-based MicroSD card is included + (but not passing tests as of this writing). + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default platform/toolchain: + + CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too). + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot (arm-nuttx-elf-gcc) + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : The older OABI version + CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary + + 3. An SDHC driver is under work and can be enabled in the NSH configuration + for further testing be setting the following configuration values as + follows: + + CONFIG_KINETIS_SDHC=y : Enable the SDHC driver + + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMCSD_SDIO=y : Use the SDIO-based MMC/SD driver + CONFIG_MMCSD_NSLOTS=1 : One MMC/SD slot + + CONFIG_FAT=y : Eable FAT file system + CONFIG_FAT_LCNAMES=y : FAT lower case name support + CONFIG_FAT_LFN=y : FAT long file name support + CONFIG_FAT_MAXFNAME=32 : Maximum lenght of a long file name + + CONFIG_GPIO_IRQ=y : Enable GPIO interrupts + CONFIG_KINETIS_PORTEINTS=y : Enable PortE GPIO interrupts + + CONFIG_SCHED_WORKQUEUE=y : Enable the NuttX workqueue + + CONFIG_NSH_ARCHINIT=y : Provide NSH initializeation logic diff --git a/configs/twr-k60n512/include/board.h b/configs/twr-k60n512/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..92c6dce940483dc7cae38c3dc4c62fd94efa2563 --- /dev/null +++ b/configs/twr-k60n512/include/board.h @@ -0,0 +1,407 @@ +/************************************************************************************ + * configs/twr-k60n512/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The K60 tower board uses a 50MHz external clock */ + +#define BOARD_EXTCLOCK 1 /* External clock */ +#define BOARD_EXTAL_FREQ 50000000 /* 50MHz Oscillator */ +#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator */ + +/* PLL Configuration. Either the external clock or crystal frequency is used to + * select the PRDIV value. Only reference clock frequencies are supported that will + * produce a 2MHz reference clock to the PLL. + * + * PLL Input frequency: PLLIN = REFCLK/PRDIV = 50MHz/25 = 2MHz + * PLL Output frequency: PLLOUT = PLLIN*VDIV = 2Mhz*48 = 96MHz + * MCG Frequency: PLLOUT = 96MHz + */ + +#define BOARD_PRDIV 25 /* PLL External Reference Divider */ +#define BOARD_VDIV 48 /* PLL VCO Divider (frequency multiplier) */ + +#define BOARD_PLLIN_FREQ (BOARD_EXTAL_FREQ / BOARD_PRDIV) +#define BOARD_PLLOUT_FREQ (BOARD_PLLIN_FREQ * BOARD_VDIV) +#define BOARD_MCG_FREQ BOARD_PLLOUT_FREQ + +/* SIM CLKDIV1 dividers */ + +#define BOARD_OUTDIV1 1 /* Core = MCG, 96MHz */ +#define BOARD_OUTDIV2 2 /* Bus = MCG/2, 48MHz */ +#define BOARD_OUTDIV3 2 /* FlexBus = MCG/2, 48MHz */ +#define BOARD_OUTDIV4 4 /* Flash clock = MCG/4, 24MHz */ + +#define BOARD_CORECLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV1) +#define BOARD_BUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV2) +#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3) +#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4) + +/* SDHC clocking ********************************************************************/ + +/* SDCLK configurations corresponding to various modes of operation. Formula is: + * + * SDCLK frequency = (base clock) / (prescaler * divisor) + * + * The SDHC module is always configure configured so that the core clock is the base + * clock. + */ + +/* Identification mode: 400KHz = 96MHz / ( 16 * 15) */ + +#define BOARD_SDHC_IDMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16 +#define BOARD_SDHC_IDMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15) + +/* MMC normal mode: 16MHz = 96MHz / (2 * 3) */ + +#define BOARD_SDHC_MMCMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +#define BOARD_SDHC_MMCMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) + +/* SD normal mode (1-bit): 16MHz = 96MHz / (2 * 3) */ + +#define BOARD_SDHC_SD1MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +#define BOARD_SDHC_SD1MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) + +/* SD normal mode (4-bit): 24MHz = 96MHz / (2 * 2) (with DMA) + * SD normal mode (4-bit): 16MHz = 96MHz / (2 * 3) (no DMA) + */ + +#ifdef CONFIG_SDIO_DMA +# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(2) +#else +//# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2 +//# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) +# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16 +# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15) +#endif + +/* LED definitions ******************************************************************/ +/* The TWR-K60N512 has four LEDs: + * + * 1. E1 / Orange LED PTA11 + * 2. E2 / Yellow LED PTA28 + * 3. E3 / Green LED PTA29 + * 4 E4 / Blue LED PTA10 + * + * The 4 LEDs are encoded as follows: + */ + +#define LED_STARTED 0 /* LED1 */ +#define LED_HEAPALLOCATE 1 /* LED2 */ +#define LED_IRQSENABLED 2 /* LED1 + LED2 */ +#define LED_STACKCREATED 3 /* LED3 */ +#define LED_INIRQ 4 /* LED1 + LED3 */ +#define LED_SIGNAL 5 /* LED2 + LED3 */ +#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */ +#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */ + +/* Button definitions ***************************************************************/ +/* The TWR-K60N512 has user buttons (plus a reset button): + * + * 1. SW1 (IRQ0) PTA19 + * 2. SW2 (IRQ1) PTE26 + */ + +#define BUTTON_SW1 0 +#define BUTTON_SW2 1 + +#define BUTTON_SW1_BIT (1 << BUTTON_WAKEUP) +#define BUTTON_SW2_BIT (1 << BUTTON_TAMPER) + +/* Alternative pin resolution *******************************************************/ +/* If there are alternative configurations for various pins in the + * kinetis_k60pinmux.h header file, those alternative pins will be labeled with a + * suffix like _1, _2, etc. The logic in this file must select the correct pin + * configuration for the board by defining a pin configuration (with no suffix) that + * maps to the correct alternative. + */ + +/* On-Board Connections + * -------------------- ------------------------- -------- ------------------- + * FEATURE CONNECTION PORT/PIN PIN FUNCTION + * -------------------- ------------------------- -------- ------------------- + * OSJTAG USB-to-serial OSJTAG Bridge RX Data PTE9 UART5_RX + * Bridge OSJTAG Bridge TX Data PTE8 UART5_TX + * SD Card Slot SD Clock PTE2 SDHC0_DCLK + * SD Command PTE3 SDHC0_CMD + * SD Data0 PTE1 SDHC0_D0 + * SD Data1 PTE0 SDHC0_D1 + * SD Data2 PTE5 SDHC0_D2 + * SD Data3 PTE4 SDHC0_D3 + * SD Card Detect PTE28 PTE28 + * SD Write Protect PTE27 PTE27 + * Infrared Port IR Transmit PTD7 CMT_IRO + * IR Receive PTC6 CMP0_IN0 + * Pushbuttons SW1 (IRQ0) PTA19 PTA19 + * SW2 (IRQ1) PTE26 PTE26 + * SW3 (RESET) RESET_b RESET_b + * Touch Pads E1 / Touch PTA4 TSI0_CH5 + * E2 / Touch PTB3 TSI0_CH8 + * E3 / Touch PTB2 TSI0_CH7 + * E4 / Touch PTB16 TSI0_CH9 + * LEDs E1 / Orange LED PTA11 PTA11 + * E2 / Yellow LED PTA28 PTA28 + * E3 / Green LED PTA29 PTA29 + * E4 / Blue LED PTA10 PTA10 + * Potentiometer Potentiometer (R71) ? ADC1_DM1 + * Accelerometer I2C SDA PTD9 I2C0_SDA + * I2C SCL PTD8 I2C0_SCL + * IRQ PTD10 PTD10 + * Touch Pad / Segment Electrode 0 (J3 Pin 3) PTB0 TSI0_CH0 + * LCD TWRPI Socket Electrode 1 (J3 Pin 5) PTB1 TSI0_CH6 + * Electrode 2 (J3 Pin 7) PTB2 TSI0_CH7 + * Electrode 3 (J3 Pin 8) PTB3 TSI0_CH8 + * Electrode 4 (J3 Pin 9) PTC0 TSI0_CH13 + * Electrode 5 (J3 Pin 10) PTC1 TSI0_CH14 + * Electrode 6 (J3 Pin 11) PTC2 TSI0_CH15 + * Electrode 7 (J3 Pin 12) PTA4 TSI0_CH5 + * Electrode 8 (J3 Pin 13) PTB16 TSI0_CH9 + * Electrode 9 (J3 Pin 14) PTB17 TSI0_CH10 + * Electrode 10 (J3 Pin 15) PTB18 TSI0_CH11 + * Electrode 11 (J3 Pin 16) PTB19 TSI0_CH12 + * TWRPI ID0 (J3 Pin 17) ? ADC1_DP1 + * TWRPI ID1 (J3 Pin 18) ? ADC1_SE16 + */ + +#define PIN_UART5_RX PIN_UART5_RX_2 +#define PIN_UART5_TX PIN_UART5_TX_2 +#define PIN_I2C0_SDA PIN_I2C0_SDA_3 +#define PIN_I2C0_SCL PIN_I2C0_SCL_3 + +/* Connections via the General Purpose Tower Plug-in (TWRPI) Socket + * -------------------- ------------------------- -------- ------------------- + * FEATURE CONNECTION PORT/PIN PIN FUNCTION + * -------------------- ------------------------- -------- ------------------- + * General Purpose TWRPI AN0 (J4 Pin 8) ? ADC0_DP0/ADC1_DP3 + * TWRPI Socket TWRPI AN1 (J4 Pin 9) ? ADC0_DM0/ADC1_DM3 + * TWRPI AN2 (J4 Pin 12) ? ADC1_DP0/ADC0_DP3 + * TWRPI ID0 (J4 Pin 17) ? ADC0_DP1 + * TWRPI ID1 (J4 Pin 18) ? ADC0_DM1 + * TWRPI I2C SCL (J5 Pin 3) PTD8 I2C0_SCL + * TWRPI I2C SDA (J5 Pin 4) PTD9 I2C0_SDA + * TWRPI SPI MISO (J5 Pin 9) PTD14 SPI2_SIN + * TWRPI SPI MOSI (J5 Pin 10) PTD13 SPI2_SOUT + * TWRPI SPI SS (J5 Pin 11) PTD15 SPI2_PCS0 + * TWRPI SPI CLK (J5 Pin 12) PTD12 SPI2_SCK + * TWRPI GPIO0 (J5 Pin 15) PTD10 PTD10 + * TWRPI GPIO1 (J5 Pin 16) PTB8 PTB8 + * TWRPI GPIO2 (J5 Pin 17) PTB9 PTB9 + * TWRPI GPIO3 (J5 Pin 18) PTA19 PTA19 + * TWRPI GPIO4 (J5 Pin 19) PTE26 PTE26 + */ + +#define PIN_SPI2_SIN PIN_SPI2_SIN_2 +#define PIN_SPI2_SOUT PIN_SPI2_SOUT_2 +#define PIN_SPI2_SCK PIN_SPI2_SCK_2 + +/* Connections via the Tower Primary Connector Side A + * --- -------------------- -------------------------------- + * PIN NAME USAGE + * --- -------------------- -------------------------------- + * A7 SCL0 PTD8 + * A8 SDA0 PTD9 + * A9 GPIO9 / CTS1 PTC19 + * A10 GPIO8 / SDHC_D2 PTE5 + * A11 GPIO7 / SD_WP_DET PTE27 + * A13 ETH_MDC PTB1 + * A14 ETH_MDIO PTB0 + * A16 ETH_RXDV PTA14 + * A19 ETH_RXD1 PTA12 + * A20 ETH_RXD0 PTA13 + * A21 SSI_MCLK PTE6 + * A22 SSI_BCLK PTE12 + * A23 SSI_FS PTE11 + * A24 SSI_RXD PTE7 + * A25 SSI_TXD PTE10 + * A27 AN3 PGA0_DP/ADC0_DP0/ADC1_DP3 + * A28 AN2 PGA0_DM/ADC0_DM0/ADC1_DM3 + * A29 AN1 PGA1_DP/ADC1_DP0/ADC0_DP3 + * A30 AN0 PGA1_DM/ADC1_DM0/ADC0_DM3 + * A33 TMR1 PTA9 + * A34 TMR0 PTA8 + * A35 GPIO6 PTB9 + * A37 PWM3 PTA6 + * A38 PWM2 PTC3 + * A39 PWM1 PTC2 + * A40 PWM0 PTC1 + * A41 RXD0 PTE25 + * A42 TXD0 PTE24 + * A43 RXD1 PTC16 + * A44 TXD1 PTC17 + * A64 CLKOUT0 PTC3 + * A66 EBI_AD14 PTC0 + * A67 EBI_AD13 PTC1 + * A68 EBI_AD12 PTC2 + * A69 EBI_AD11 PTC4 + * A70 EBI_AD10 PTC5 + * A71 EBI_AD9 PTC6 + * A71 EBI_R/W_b PTC11 + * A72 EBI_AD8 PTC7 + * A73 EBI_AD7 PTC8 + * A74 EBI_AD6 PTC9 + * A75 EBI_AD5 PTC10 + * A76 EBI_AD4 PTD2 + * A77 EBI_AD3 PTD3 + * A78 EBI_AD2 PTD4 + * A79 EBI_AD1 PTD5 + * A80 EBI_AD0 PTD6 + */ + +/* PTE 26/27 */ + +#define PIN_UART3_RX PIN_UART3_RX_2 +#define PIN_UART3_TX PIN_UART3_TX_2 + +/* PTE 24/25 */ + +#define PIN_UART4_RX PIN_UART4_RX_2 +#define PIN_UART4_TX PIN_UART4_TX_2 + +/* Connections via the Tower Primary Connector Side B + * --- -------------------- -------------------------------- + * PIN NAME USAGE + * --- -------------------- -------------------------------- + * B7 SDHC_CLK / SPI1_CLK PTE2 + * B9 SDHC_D3 / SPI1_CS0_b PTE4 + * B10 SDHC_CMD / SPI1_MOSI PTE1 + * B11 SDHC_D0 / SPI1_MISO PTE3 + * B13 ETH_RXER PTA5 + * B15 ETH_TXEN PTA15 + * B19 ETH_TXD1 PTA17 + * B20 ETH_TXD0 PTA16 + * B21 GPIO1 / RTS1 PTC18 + * B22 GPIO2 / SDHC_D1 PTE0 + * B23 GPIO3 PTE28 + * B24 CLKIN0 PTA18 + * B25 CLKOUT1 PTE26 + * B27 AN7 PTB7 + * B28 AN6 PTB6 + * B29 AN5 PTB5 + * B30 AN4 PTB4 + * B34 TMR2 PTD6 + * B35 GPIO4 PTB8 + * B37 PWM7 PTA2 + * B38 PWM6 PTA1 + * B39 PWM5 PTD5 + * B40 PWM4 PTA7 + * B41 CANRX0 PTE25 + * B42 CANTX0 PTE24 + * B44 SPI0_MISO PTD14 + * B45 SPI0_MOSI PTD13 + * B46 SPI0_CS0_b PTD11 + * B47 SPI0_CS1_b PTD15 + * B48 SPI0_CLK PTD12 + * B50 SCL1 PTD8 + * B51 SDA1 PTD9 + * B52 GPIO5 / SD_CARD_DET PTE28 + * B55 IRQ_H PTA24 + * B56 IRQ_G PTA24 + * B57 IRQ_F PTA25 + * B58 IRQ_E PTA25 + * B59 IRQ_D PTA26 + * B60 IRQ_C PTA26 + * B61 IRQ_B PTA27 + * B62 IRQ_A PTA27 + * B63 EBI_ALE / EBI_CS1_b PTD0 + * B64 EBI_CS0_b PTD1 + * B66 EBI_AD15 PTB18 + * B67 EBI_AD16 PTB17 + * B68 EBI_AD17 PTB16 + * B69 EBI_AD18 PTB11 + * B70 EBI_AD19 PTB10 + * B72 EBI_OE_b PTB19 + * B73 EBI_D7 PTB20 + * B74 EBI_D6 PTB21 + * B75 EBI_D5 PTB22 + * B76 EBI_D4 PTB23 + * B77 EBI_D3 PTC12 + * B78 EBI_D2 PTC13 + * B79 EBI_D1 PTC14 + * B80 EBI_D0 PTC15 + */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: kinetis_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +EXTERN void kinetis_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/twr-k60n512/nsh/Make.defs b/configs/twr-k60n512/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e002cca1a053466b45471b88570eb6b02389cb6d --- /dev/null +++ b/configs/twr-k60n512/nsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/twr-k60n512/nsh/Make.defs +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/twr-k60n512/nsh/defconfig b/configs/twr-k60n512/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..a4110d0ccfa2312d9a177512da4eea6bca5d4fa0 --- /dev/null +++ b/configs/twr-k60n512/nsh/defconfig @@ -0,0 +1,807 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +CONFIG_ARCH_CHIP_KINETIS=y +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="kinetis" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Kinetis Configuration Options +# +# CONFIG_ARCH_CHIP_MK20DX256VLH7 is not set +# CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40N512VMD100 is not set +# CONFIG_ARCH_CHIP_MK40X128VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40X128VMD100 is not set +# CONFIG_ARCH_CHIP_MK40X256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40X256VMD100 is not set +# CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60N256VMD100 is not set +# CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set +CONFIG_ARCH_CHIP_MK60N512VMD100=y +# CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60X256VMD100 is not set +# CONFIG_ARCH_FAMILY_K20 is not set +# CONFIG_ARCH_FAMILY_K40 is not set +CONFIG_ARCH_FAMILY_K60=y + +# +# Kinetis Peripheral Support +# +# CONFIG_KINETIS_TRACE is not set +# CONFIG_KINETIS_FLEXBUS is not set +# CONFIG_KINETIS_UART0 is not set +# CONFIG_KINETIS_UART1 is not set +# CONFIG_KINETIS_UART2 is not set +CONFIG_KINETIS_UART3=y +# CONFIG_KINETIS_UART4 is not set +# CONFIG_KINETIS_UART5 is not set +# CONFIG_KINETIS_ENET is not set +# CONFIG_KINETIS_RNGB is not set +# CONFIG_KINETIS_FLEXCAN0 is not set +# CONFIG_KINETIS_FLEXCAN1 is not set +# CONFIG_KINETIS_SPI0 is not set +# CONFIG_KINETIS_SPI1 is not set +# CONFIG_KINETIS_SPI2 is not set +# CONFIG_KINETIS_I2C0 is not set +# CONFIG_KINETIS_I2C1 is not set +# CONFIG_KINETIS_I2S is not set +# CONFIG_KINETIS_DAC0 is not set +# CONFIG_KINETIS_DAC1 is not set +# CONFIG_KINETIS_ADC0 is not set +# CONFIG_KINETIS_ADC1 is not set +# CONFIG_KINETIS_CMP is not set +# CONFIG_KINETIS_VREF is not set +# CONFIG_KINETIS_SDHC is not set +# CONFIG_KINETIS_FTM0 is not set +# CONFIG_KINETIS_FTM1 is not set +# CONFIG_KINETIS_FTM2 is not set +# CONFIG_KINETIS_LPTIMER is not set +# CONFIG_KINETIS_RTC is not set +# CONFIG_KINETIS_EWM is not set +# CONFIG_KINETIS_CMT is not set +# CONFIG_KINETIS_USBOTG is not set +# CONFIG_KINETIS_USBDCD is not set +# CONFIG_KINETIS_LLWU is not set +# CONFIG_KINETIS_TSI is not set +# CONFIG_KINETIS_FTFL is not set +# CONFIG_KINETIS_DMA is not set +# CONFIG_KINETIS_CRC is not set +# CONFIG_KINETIS_PDB is not set +# CONFIG_KINETIS_PIT is not set + +# +# Kinetis GPIO Interrupt Configuration +# +# CONFIG_GPIO_IRQ is not set + +# +# Kinetis UART Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=9535 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x1fff0000 +CONFIG_RAM_SIZE=131072 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_TWR_K60N512=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="twr-k60n512" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=25 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +CONFIG_ARCH_HAVE_UART3=y +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART3 Configuration +# +CONFIG_UART3_RXBUFSIZE=256 +CONFIG_UART3_TXBUFSIZE=256 +CONFIG_UART3_BAUD=115200 +CONFIG_UART3_BITS=8 +CONFIG_UART3_PARITY=0 +CONFIG_UART3_2STOP=0 +# CONFIG_UART3_IFLOWCONTROL is not set +# CONFIG_UART3_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/twr-k60n512/nsh/setenv.sh b/configs/twr-k60n512/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..b2dde26fc2bfbc79b5d27a02a2652ee5e78975a6 --- /dev/null +++ b/configs/twr-k60n512/nsh/setenv.sh @@ -0,0 +1,61 @@ +#!/bin/bash +# configs/twr-k60n512/nsh/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/twr-k60n512/scripts/ld.script b/configs/twr-k60n512/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..9f4f9427feeb13211912440c44146302195a57b8 --- /dev/null +++ b/configs/twr-k60n512/scripts/ld.script @@ -0,0 +1,142 @@ +/**************************************************************************** + * configs/twr-k60n512/scripts/ld.script + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The K60N512VMD100 has 512Kb of FLASH beginning at address 0x0000:0000 and + * 128Kb of SRAM beginning at address 0x1800:0000 (SRAM_L) and 0x2000:000 + * (SRAM_U). + * + * NOTE: that the first part of the K40 FLASH region is reserved for + * interrupt vectflash and, following that, is a region from 0x0000:0400 + * to 0x0000:040f that is reserved for the FLASH control fields (FCF). + * + * NOTE: The on-chip RAM is split evenly among SRAM_L and SRAM_U. The RAM is + * also implemented such that the SRAM_L and SRAM_U ranges form a + * contiguous block in the memory map. + */ + +MEMORY +{ + vectflash (rx) : ORIGIN = 0x00000000, LENGTH = 1K + cfmprotect (rx) : ORIGIN = 0x00000400, LENGTH = 16 + progflash (rx) : ORIGIN = 0x00000800, LENGTH = 512K - 2K + datasram (rwx) : ORIGIN = 0x1fff0000, LENGTH = 128K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +EXTERN(__flashconfigbytes) +SECTIONS +{ + .vectors : { + _svectors = ABSOLUTE(.); + *(.vectors) + _evectors = ABSOLUTE(.); + } > vectflash + + .cfmprotect : { + KEEP(*(.cfmconfig)) + } > cfmprotect + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progflash + + .ARM.extab : { + *(.ARM.extab*) + } > progflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progflash + __exidx_end = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datasram AT > progflash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > datasram AT > progflash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datasram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/twr-k60n512/src/.gitignore b/configs/twr-k60n512/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/twr-k60n512/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/twr-k60n512/src/Makefile b/configs/twr-k60n512/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..07e278d63b5ab57ed18f22f324be2eefe9b34ef7 --- /dev/null +++ b/configs/twr-k60n512/src/Makefile @@ -0,0 +1,61 @@ +############################################################################ +# configs/twr-k60n512/src/Makefile +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = k60_boot.c k60_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += k60_leds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += k60_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += k60_appinit.c +endif + +ifeq ($(CONFIG_USBDEV),y) +CSRCS += k60_usbdev.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += k60_usbmsc.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/twr-k60n512/src/k60_appinit.c b/configs/twr-k60n512/src/k60_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..6c6795c2ad8e9540a76b75d2cf7634ed498079f9 --- /dev/null +++ b/configs/twr-k60n512/src/k60_appinit.c @@ -0,0 +1,253 @@ +/**************************************************************************** + * config/twr-k60n512/src/k60_appinit.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_KINETIS_SDHC +# include +# include +#endif + +#include "kinetis.h" +#include "twr-k60n512.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_TWR_K60N512 +# define NSH_HAVEUSBDEV 1 +# define NSH_HAVEMMCSD 1 +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0 +# error "Only one MMC/SD slot, slot 0" +# undef CONFIG_NSH_MMCSDSLOTNO +# endif +# ifndef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#else + /* Add configuration for new Kinetis boards here */ +# error "Unrecognized Kinetis board" +# undef NSH_HAVEUSBDEV +# undef NSH_HAVEMMCSD +#endif + +/* Can't support USB features if USB is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled or if SDHC support + * is not enabled. + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_KINETIS_SDHC) +# undef NSH_HAVEMMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/* We expect to receive GPIO interrupts for card insertion events */ + +#ifndef CONFIG_GPIO_IRQ +# error "CONFIG_GPIO_IRQ required for card detect interrupt" +#endif + +#ifndef CONFIG_KINETIS_PORTEINTS +# error "CONFIG_KINETIS_PORTEINTS required for card detect interrupt" +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure encapsulates the global variable used in this file and + * reduces the probability of name collistions. + */ + +#ifdef NSH_HAVEMMCSD +struct kinetis_nsh_s +{ + FAR struct sdio_dev_s *sdhc; /* SDIO driver handle */ + bool inserted; /* True: card is inserted */ +}; +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef NSH_HAVEMMCSD +static struct kinetis_nsh_s g_nsh; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: kinetis_mediachange + ****************************************************************************/ + +#ifdef NSH_HAVEMMCSD +static void kinetis_mediachange(void) +{ + bool inserted; + + /* Get the current value of the card detect pin. This pin is pulled up on + * board. So low means that a card is present. + */ + + inserted = !kinetis_gpioread(GPIO_SD_CARDDETECT); + + /* Has the pin changed state? */ + + if (inserted != g_nsh.inserted) + { + /* Yes.. perform the appropriate action (this might need some debounce). */ + + g_nsh.inserted = inserted; + sdhc_mediachange(g_nsh.sdhc, inserted); + + /* If the card has been inserted, then check if it is write protected + * as well. The pin is pulled up, but apparently logic high means + * write protected. + */ + + if (inserted) + { + sdhc_wrprotect(g_nsh.sdhc, kinetis_gpioread(GPIO_SD_WRPROTECT)); + } + } +} +#endif + +/**************************************************************************** + * Name: kinetis_cdinterrupt + ****************************************************************************/ + +#ifdef NSH_HAVEMMCSD +static int kinetis_cdinterrupt(int irq, FAR void *context) +{ + /* All of the work is done by kinetis_mediachange() */ + + kinetis_mediachange(); + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef NSH_HAVEMMCSD + int ret; + + /* Configure GPIO pins */ + + /* Attached the card detect interrupt (but don't enable it yet) */ + + kinetis_pinconfig(GPIO_SD_CARDDETECT); + kinetis_pinirqattach(GPIO_SD_CARDDETECT, kinetis_cdinterrupt); + + /* Configure the write protect GPIO */ + + kinetis_pinconfig(GPIO_SD_WRPROTECT); + + /* Mount the SDHC-based MMC/SD block driver */ + /* First, get an instance of the SDHC interface */ + + syslog(LOG_INFO, "Initializing SDHC slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + + g_nsh.sdhc = sdhc_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!g_nsh.sdhc) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SDHC slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDHC interface to the MMC/SD driver */ + + syslog(LOG_INFO, "Bind SDHC to the MMC/SD driver, minor=%d\n", + CONFIG_NSH_MMCSDMINOR); + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, g_nsh.sdhc); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: Failed to bind SDHC to the MMC/SD driver: %d\n", ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SDHC to the MMC/SD driver\n"); + + /* Handle the initial card state */ + + kinetis_mediachange(); + + /* Enable CD interrupts to handle subsequent media changes */ + + kinetis_pinirqenable(GPIO_SD_CARDDETECT); +#endif + return OK; +} diff --git a/configs/twr-k60n512/src/k60_boot.c b/configs/twr-k60n512/src/k60_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..e9c814123b32af2c8b20ad8a541410de385dafba --- /dev/null +++ b/configs/twr-k60n512/src/k60_boot.c @@ -0,0 +1,102 @@ +/************************************************************************************ + * configs/twr-k60n512/src/k60_boot.c + * + * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "twr-k60n512.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_boardinitialize + * + * Description: + * All Kinetis architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void kinetis_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * kinetis_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_KINETIS_SPI1) || defined(CONFIG_KINETIS_SPI2) + if (kinetis_spidev_initialize) + { + kinetis_spidev_initialize(); + } +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function kinetis_usbinitialize() has been brought + * into the build. + */ + +#if defined(CONFIG_USBDEV) && defined(CONFIG_KINETIS_USB) + if (kinetis_usbinitialize) + { + kinetis_usbinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/twr-k60n512/src/k60_buttons.c b/configs/twr-k60n512/src/k60_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..0cda432483819ab5049ec0f3f83101eeb31b1689 --- /dev/null +++ b/configs/twr-k60n512/src/k60_buttons.c @@ -0,0 +1,171 @@ +/**************************************************************************** + * configs/twr-k60n512/src/k60_buttons.c + * + * Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "twr-k60n512.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* The TWR-K60N512 has user buttons (plus a reset button): + * + * 1. SW1 (IRQ0) PTA19 + * 2. SW2 (IRQ1) PTE26 + */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + /* Configure the two buttons as inputs */ + + kinetis_pinconfig(GPIO_SW1); + kinetis_pinconfig(GPIO_SW2); +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + + if (kinetis_gpioread(GPIO_SW1)) + { + ret |= BUTTON_SW1_BIT; + } + + if (kinetis_gpioread(GPIO_SW2)) + { + ret |= BUTTON_SW2_BIT; + } + + return ret +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT and JOYSTICK_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler; + uint32_t pinset; + + /* Map the button id to the GPIO bit set. */ + + if (id == BUTTON_SW1) + { + pinset = GPIO_SW1; + } + else if (id == BUTTON_SW2) + { + pinset = GPIO_SW2; + } + else + { + return NULL; + } + + /* The button has already been configured as an interrupting input (by + * board_button_initialize() above). + * + * Attach the new button handler. + */ + + oldhandler = knetis_pinirqattach(pinset, irqhandler); + + /* Then make sure that interrupts are enabled on the pin */ + + kinetis_pindmaenable(pinset); + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/twr-k60n512/src/k60_leds.c b/configs/twr-k60n512/src/k60_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..76238c548ab7443aeea9a65ef99f804f525568d8 --- /dev/null +++ b/configs/twr-k60n512/src/k60_leds.c @@ -0,0 +1,262 @@ +/**************************************************************************** + * configs/twr-k60n512/src/k60_leds.c + * + * Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "kinetis.h" +#include "twr-k60n512.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* The TWR-K60N512 has four LEDs: + * + * 1. E1 / Orange LED PTA11 + * 2. E2 / Yellow LED PTA28 + * 3. E3 / Green LED PTA29 + * 4 E4 / Blue LED PTA10 + */ + +/* The following definitions map the encoded LED setting to GPIO settings */ + +#define K60_LED1 (1 << 0) +#define K60_LED2 (1 << 1) +#define K60_LED3 (1 << 2) +#define K60_LED4 (1 << 3) + +#define ON_SETBITS_SHIFT (0) +#define ON_CLRBITS_SHIFT (4) +#define OFF_SETBITS_SHIFT (8) +#define OFF_CLRBITS_SHIFT (12) + +#define ON_BITS(v) ((v) & 0xff) +#define OFF_BITS(v) (((v) >> 8) & 0x0ff) +#define SETBITS(b) ((b) & 0x0f) +#define CLRBITS(b) (((b) >> 4) & 0x0f) + +#define ON_SETBITS(v) (SETBITS(ON_BITS(v)) +#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v)) +#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v)) +#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v)) + +#define LED_STARTED_ON_SETBITS ((K60_LED1) << ON_SETBITS_SHIFT) +#define LED_STARTED_ON_CLRBITS ((K60_LED2|K60_LED3|K60_LED4) << ON_CLRBITS_SHIFT) +#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT) +#define LED_STARTED_OFF_CLRBITS ((K60_LED1|K60_LED2|K60_LED3|K60_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_HEAPALLOCATE_ON_SETBITS ((K60_LED2) << ON_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_ON_CLRBITS ((K60_LED1|K60_LED3|K60_LED4) << ON_CLRBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_SETBITS ((K60_LED1) << OFF_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_CLRBITS ((K60_LED2|K60_LED3|K60_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_IRQSENABLED_ON_SETBITS ((K60_LED1|K60_LED2) << ON_SETBITS_SHIFT) +#define LED_IRQSENABLED_ON_CLRBITS ((K60_LED3|K60_LED4) << ON_CLRBITS_SHIFT) +#define LED_IRQSENABLED_OFF_SETBITS ((K60_LED2) << OFF_SETBITS_SHIFT) +#define LED_IRQSENABLED_OFF_CLRBITS ((K60_LED1|K60_LED3|K60_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_STACKCREATED_ON_SETBITS ((K60_LED3) << ON_SETBITS_SHIFT) +#define LED_STACKCREATED_ON_CLRBITS ((K60_LED1|K60_LED2|K60_LED4) << ON_CLRBITS_SHIFT) +#define LED_STACKCREATED_OFF_SETBITS ((K60_LED1|K60_LED2) << OFF_SETBITS_SHIFT) +#define LED_STACKCREATED_OFF_CLRBITS ((K60_LED3|K60_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_INIRQ_ON_SETBITS ((K60_LED1) << ON_SETBITS_SHIFT) +#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_INIRQ_OFF_CLRBITS ((K60_LED1) << OFF_CLRBITS_SHIFT) + +#define LED_SIGNAL_ON_SETBITS ((K60_LED2) << ON_SETBITS_SHIFT) +#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_SIGNAL_OFF_CLRBITS ((K60_LED2) << OFF_CLRBITS_SHIFT) + +#define LED_ASSERTION_ON_SETBITS ((K60_LED4) << ON_SETBITS_SHIFT) +#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_ASSERTION_OFF_CLRBITS ((K60_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_PANIC_ON_SETBITS ((K60_LED4) << ON_SETBITS_SHIFT) +#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_PANIC_OFF_CLRBITS ((K60_LED4) << OFF_CLRBITS_SHIFT) + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint16_t g_ledbits[8] = +{ + (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | + LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS), + + (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS | + LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS), + + (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS | + LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS), + + (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS | + LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS), + + (LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS | + LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS), + + (LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS | + LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS), + + (LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS | + LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS), + + (LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS | + LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS) +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static inline void led_clrbits(unsigned int clrbits) +{ + if ((clrbits & K60_LED1) != 0) + { + kinetis_gpiowrite(GPIO_LED1, false); + } + + if ((clrbits & K60_LED2) != 0) + { + kinetis_gpiowrite(GPIO_LED2, false); + } + + if ((clrbits & K60_LED3) != 0) + { + kinetis_gpiowrite(GPIO_LED3, false); + } + + if ((clrbits & K60_LED4) != 0) + { + kinetis_gpiowrite(GPIO_LED4, false); + } +} + +static inline void led_setbits(unsigned int setbits) +{ + if ((setbits & K60_LED1) != 0) + { + kinetis_gpiowrite(GPIO_LED1, true); + } + + if ((setbits & K60_LED2) != 0) + { + kinetis_gpiowrite(GPIO_LED2, true); + } + + if ((setbits & K60_LED3) != 0) + { + kinetis_gpiowrite(GPIO_LED3, true); + } + + if ((setbits & K60_LED4) != 0) + { + kinetis_gpiowrite(GPIO_LED4, true); + } +} + +static void led_setonoff(unsigned int bits) +{ + led_clrbits(CLRBITS(bits)); + led_setbits(SETBITS(bits)); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + * + * Description: + * Initialize LED GPIOs so that LEDs can be controlled. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + kinetis_pinconfig(GPIO_LED1); + kinetis_pinconfig(GPIO_LED2); + kinetis_pinconfig(GPIO_LED3); + kinetis_pinconfig(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_setonoff(ON_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_setonoff(OFF_BITS(g_ledbits[led])); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/twr-k60n512/src/k60_spi.c b/configs/twr-k60n512/src/k60_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..8aa48e369bcb423213da1e9e0d4e006caca27268 --- /dev/null +++ b/configs/twr-k60n512/src/k60_spi.c @@ -0,0 +1,163 @@ +/************************************************************************************ + * configs/twr-k60n512/src/k60_spi.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "kinetis.h" +#include "twr-k60n512.h" + +#if defined(CONFIG_KINETIS_SPI1) || defined(CONFIG_KINETIS_SPI2) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef CONFIG_DEBUG_SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the TWR-K60N512 board. + * + ************************************************************************************/ + +void weak_function kinetis_spidev_initialize(void) +{ +# warning "Missing logic" +} + +/**************************************************************************** + * Name: kinetis_spi1/2/3select and kinetis_spi1/2/3status + * + * Description: + * The external functions, kinetis_spi1/2/3select and kinetis_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including kinetis_spibus_initialize()) + * are provided by common Kinetis logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in kinetis_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide kinetis_spi1/2/3select() and kinetis_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to kinetis_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by kinetis_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_KINETIS_SPI1 +void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +# warning "Missing logic" +} + +uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ +# warning "Missing logic" + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_KINETIS_SPI2 +void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +# warning "Missing logic" +} + +uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ +# warning "Missing logic" + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_KINETIS_SPI3 +void kinetis_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +# warning "Missing logic" +} + +uint8_t kinetis_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ +# warning "Missing logic" + return SPI_STATUS_PRESENT; +} +#endif + +#endif /* CONFIG_KINETIS_SPI1 || CONFIG_KINETIS_SPI2 */ diff --git a/configs/twr-k60n512/src/k60_usbdev.c b/configs/twr-k60n512/src/k60_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..b542834768f1c1e65182562664931dfd1eba009a --- /dev/null +++ b/configs/twr-k60n512/src/k60_usbdev.c @@ -0,0 +1,114 @@ +/************************************************************************************ + * configs/twr-k60n512/src/k60_usbdev.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "kinetis.h" +#include "twr-k60n512.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the TWR_K60N512 board. + * + ************************************************************************************/ + +void kinetis_usbinitialize(void) +{ +# warning "Missing logic" +} + +/************************************************************************************ + * Name: kinetis_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB software + * connect and disconnect), then the board software must provide kinetis_pullup. + * See include/nuttx/usb/usbdev.h for additional description of this method. + * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be + * NULL. + * + ************************************************************************************/ + +int kinetis_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); +# warning "Missing logic" + return OK; +} + +/************************************************************************************ + * Name: kinetis_usbsuspend + * + * Description: + * Board logic must provide the kinetis_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void kinetis_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +#warning "Missing logic" +} + diff --git a/configs/twr-k60n512/src/k60_usbmsc.c b/configs/twr-k60n512/src/k60_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..c180faae744e4632b5bcbd97a2da3b25bf4d830a --- /dev/null +++ b/configs/twr-k60n512/src/k60_usbmsc.c @@ -0,0 +1,99 @@ +/**************************************************************************** + * configs/twr-k60n512/src/k60_usbmsc.c + * + * Copyright (C) 2011, 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the Kinetis MMC/SD block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "kinetis.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/* SLOT number(s) could depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_TWR_K60N512 +# undef KINETIS_MMCSDSLOTNO +# define KINETIS_MMCSDSLOTNO 0 +#else + /* Add configuration for new Kinetis boards here */ +# error "Unrecognized Kinetis board" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* If system/usbmsc is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see k60_appinit.c). + * In this case, there is nothing further to be done here. + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS +# warning "Missing logic" +#endif /* CONFIG_NSH_BUILTIN_APPS */ + + return OK; +} diff --git a/configs/twr-k60n512/src/twr-k60n512.h b/configs/twr-k60n512/src/twr-k60n512.h new file mode 100644 index 0000000000000000000000000000000000000000..0cf1ea1432f166fc31528b62cc1c303b9c009f52 --- /dev/null +++ b/configs/twr-k60n512/src/twr-k60n512.h @@ -0,0 +1,296 @@ +/************************************************************************************ + * configs/twr-k60n512/src/twr-k60n512.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_TWR_K60N512_SRC_TWRK60_H +#define __CONFIGS_TWR_K60N512_SRC_TWRK60_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* How many SPI modules does this chip support? The LM3S6918 supports 2 SPI + * modules (others may support more -- in such case, the following must be + * expanded). + */ + +#if KINETIS_NSPI < 1 +# undef CONFIG_KINETIS_SPI1 +# undef CONFIG_KINETIS_SPI2 +#elif KINETIS_NSPI < 2 +# undef CONFIG_KINETIS_SPI2 +#endif + +/* TWR-K60N512 GPIOs ****************************************************************/ +/* On-Board Connections + * -------------------- ------------------------- -------- ------------------- + * FEATURE CONNECTION PORT/PIN PIN FUNCTION + * -------------------- ------------------------- -------- ------------------- + * OSJTAG USB-to-serial OSJTAG Bridge RX Data PTE9 UART5_RX + * Bridge OSJTAG Bridge TX Data PTE8 UART5_TX + * SD Card Slot SD Clock PTE2 SDHC0_DCLK + * SD Command PTE3 SDHC0_CMD + * SD Data0 PTE1 SDHC0_D0 + * SD Data1 PTE0 SDHC0_D1 + * SD Data2 PTE5 SDHC0_D2 + * SD Data3 PTE4 SDHC0_D3 + * SD Card Detect PTE28 PTE28 + * SD Write Protect PTE27 PTE27 + * Infrared Port IR Transmit PTD7 CMT_IRO + * IR Receive PTC6 CMP0_IN0 + * Pushbuttons SW1 (IRQ0) PTA19 PTA19 + * SW2 (IRQ1) PTE26 PTE26 + * SW3 (RESET) RESET_b RESET_b + * Touch Pads E1 / Touch PTA4 TSI0_CH5 + * E2 / Touch PTB3 TSI0_CH8 + * E3 / Touch PTB2 TSI0_CH7 + * E4 / Touch PTB16 TSI0_CH9 + * LEDs E1 / Orange LED PTA11 PTA11 + * E2 / Yellow LED PTA28 PTA28 + * E3 / Green LED PTA29 PTA29 + * E4 / Blue LED PTA10 PTA10 + * Potentiometer Potentiometer (R71) ? ADC1_DM1 + * Accelerometer I2C SDA PTD9 I2C0_SDA + * I2C SCL PTD8 I2C0_SCL + * IRQ PTD10 PTD10 + * Touch Pad / Segment Electrode 0 (J3 Pin 3) PTB0 TSI0_CH0 + * LCD TWRPI Socket Electrode 1 (J3 Pin 5) PTB1 TSI0_CH6 + * Electrode 2 (J3 Pin 7) PTB2 TSI0_CH7 + * Electrode 3 (J3 Pin 8) PTB3 TSI0_CH8 + * Electrode 4 (J3 Pin 9) PTC0 TSI0_CH13 + * Electrode 5 (J3 Pin 10) PTC1 TSI0_CH14 + * Electrode 6 (J3 Pin 11) PTC2 TSI0_CH15 + * Electrode 7 (J3 Pin 12) PTA4 TSI0_CH5 + * Electrode 8 (J3 Pin 13) PTB16 TSI0_CH9 + * Electrode 9 (J3 Pin 14) PTB17 TSI0_CH10 + * Electrode 10 (J3 Pin 15) PTB18 TSI0_CH11 + * Electrode 11 (J3 Pin 16) PTB19 TSI0_CH12 + * TWRPI ID0 (J3 Pin 17) ? ADC1_DP1 + * TWRPI ID1 (J3 Pin 18) ? ADC1_SE16 + */ + +#define GPIO_SD_CARDDETECT (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTE | PIN28) +#define GPIO_SD_WRPROTECT (GPIO_PULLUP | PIN_PORTE | PIN27) + +#define GPIO_SW1 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTA | PIN19) +#define GPIO_SW2 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTE | PIN26) + +#define GPIO_LED1 (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTA | PIN11) +#define GPIO_LED2 (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTA | PIN28) +#define GPIO_LED3 (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTA | PIN29) +#define GPIO_LED4 (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTA | PIN10) + +/* Connections via the General Purpose Tower Plug-in (TWRPI) Socket + * -------------------- ------------------------- -------- ------------------- + * FEATURE CONNECTION PORT/PIN PIN FUNCTION + * -------------------- ------------------------- -------- ------------------- + * General Purpose TWRPI AN0 (J4 Pin 8) ? ADC0_DP0/ADC1_DP3 + * TWRPI Socket TWRPI AN1 (J4 Pin 9) ? ADC0_DM0/ADC1_DM3 + * TWRPI AN2 (J4 Pin 12) ? ADC1_DP0/ADC0_DP3 + * TWRPI ID0 (J4 Pin 17) ? ADC0_DP1 + * TWRPI ID1 (J4 Pin 18) ? ADC0_DM1 + * TWRPI I2C SCL (J5 Pin 3) PTD8 I2C0_SCL + * TWRPI I2C SDA (J5 Pin 4) PTD9 I2C0_SDA + * TWRPI SPI MISO (J5 Pin 9) PTD14 SPI2_SIN + * TWRPI SPI MOSI (J5 Pin 10) PTD13 SPI2_SOUT + * TWRPI SPI SS (J5 Pin 11) PTD15 SPI2_PCS0 + * TWRPI SPI CLK (J5 Pin 12) PTD12 SPI2_SCK + * TWRPI GPIO0 (J5 Pin 15) PTD10 PTD10 + * TWRPI GPIO1 (J5 Pin 16) PTB8 PTB8 + * TWRPI GPIO2 (J5 Pin 17) PTB9 PTB9 + * TWRPI GPIO3 (J5 Pin 18) PTA19 PTA19 + * TWRPI GPIO4 (J5 Pin 19) PTE26 PTE26 + */ + +/* Connections via the Tower Primary Connector Side A + * --- -------------------- -------------------------------- + * PIN NAME USAGE + * --- -------------------- -------------------------------- + * A7 SCL0 PTD8 + * A8 SDA0 PTD9 + * A9 GPIO9 / CTS1 PTC19 + * A10 GPIO8 / SDHC_D2 PTE5 + * A11 GPIO7 / SD_WP_DET PTE27 + * A13 ETH_MDC PTB1 + * A14 ETH_MDIO PTB0 + * A16 ETH_RXDV PTA14 + * A19 ETH_RXD1 PTA12 + * A20 ETH_RXD0 PTA13 + * A21 SSI_MCLK PTE6 + * A22 SSI_BCLK PTE12 + * A23 SSI_FS PTE11 + * A24 SSI_RXD PTE7 + * A25 SSI_TXD PTE10 + * A27 AN3 PGA0_DP/ADC0_DP0/ADC1_DP3 + * A28 AN2 PGA0_DM/ADC0_DM0/ADC1_DM3 + * A29 AN1 PGA1_DP/ADC1_DP0/ADC0_DP3 + * A30 AN0 PGA1_DM/ADC1_DM0/ADC0_DM3 + * A33 TMR1 PTA9 + * A34 TMR0 PTA8 + * A35 GPIO6 PTB9 + * A37 PWM3 PTA6 + * A38 PWM2 PTC3 + * A39 PWM1 PTC2 + * A40 PWM0 PTC1 + * A41 RXD0 PTE25 + * A42 TXD0 PTE24 + * A43 RXD1 PTC16 + * A44 TXD1 PTC17 + * A64 CLKOUT0 PTC3 + * A66 EBI_AD14 PTC0 + * A67 EBI_AD13 PTC1 + * A68 EBI_AD12 PTC2 + * A69 EBI_AD11 PTC4 + * A70 EBI_AD10 PTC5 + * A71 EBI_AD9 PTC6 + * A71 EBI_R/W_b PTC11 + * A72 EBI_AD8 PTC7 + * A73 EBI_AD7 PTC8 + * A74 EBI_AD6 PTC9 + * A75 EBI_AD5 PTC10 + * A76 EBI_AD4 PTD2 + * A77 EBI_AD3 PTD3 + * A78 EBI_AD2 PTD4 + * A79 EBI_AD1 PTD5 + * A80 EBI_AD0 PTD6 + */ + +/* Connections via the Tower Primary Connector Side B + * --- -------------------- -------------------------------- + * PIN NAME USAGE + * --- -------------------- -------------------------------- + * B7 SDHC_CLK / SPI1_CLK PTE2 + * B9 SDHC_D3 / SPI1_CS0_b PTE4 + * B10 SDHC_CMD / SPI1_MOSI PTE1 + * B11 SDHC_D0 / SPI1_MISO PTE3 + * B13 ETH_RXER PTA5 + * B15 ETH_TXEN PTA15 + * B19 ETH_TXD1 PTA17 + * B20 ETH_TXD0 PTA16 + * B21 GPIO1 / RTS1 PTC18 + * B22 GPIO2 / SDHC_D1 PTE0 + * B23 GPIO3 PTE28 + * B24 CLKIN0 PTA18 + * B25 CLKOUT1 PTE26 + * B27 AN7 PTB7 + * B28 AN6 PTB6 + * B29 AN5 PTB5 + * B30 AN4 PTB4 + * B34 TMR2 PTD6 + * B35 GPIO4 PTB8 + * B37 PWM7 PTA2 + * B38 PWM6 PTA1 + * B39 PWM5 PTD5 + * B40 PWM4 PTA7 + * B41 CANRX0 PTE25 + * B42 CANTX0 PTE24 + * B44 SPI0_MISO PTD14 + * B45 SPI0_MOSI PTD13 + * B46 SPI0_CS0_b PTD11 + * B47 SPI0_CS1_b PTD15 + * B48 SPI0_CLK PTD12 + * B50 SCL1 PTD8 + * B51 SDA1 PTD9 + * B52 GPIO5 / SD_CARD_DET PTE28 + * B55 IRQ_H PTA24 + * B56 IRQ_G PTA24 + * B57 IRQ_F PTA25 + * B58 IRQ_E PTA25 + * B59 IRQ_D PTA26 + * B60 IRQ_C PTA26 + * B61 IRQ_B PTA27 + * B62 IRQ_A PTA27 + * B63 EBI_ALE / EBI_CS1_b PTD0 + * B64 EBI_CS0_b PTD1 + * B66 EBI_AD15 PTB18 + * B67 EBI_AD16 PTB17 + * B68 EBI_AD17 PTB16 + * B69 EBI_AD18 PTB11 + * B70 EBI_AD19 PTB10 + * B72 EBI_OE_b PTB19 + * B73 EBI_D7 PTB20 + * B74 EBI_D6 PTB21 + * B75 EBI_D5 PTB22 + * B76 EBI_D4 PTB23 + * B77 EBI_D3 PTC12 + * B78 EBI_D2 PTC13 + * B79 EBI_D1 PTC14 + * B80 EBI_D0 PTC15 + */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the TWR-K60N512 board. + * + ************************************************************************************/ + +void weak_function kinetis_spidev_initialize(void); + +/************************************************************************************ + * Name: kinetis_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the TWR-K60N512 board. + * + ************************************************************************************/ + +void weak_function kinetis_usbinitialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_TWR_K60N512_SRC_TWRK60_H */ diff --git a/configs/u-blox-c027/Kconfig b/configs/u-blox-c027/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..8e78bc180823d22c71cf77fbadba91a080bdb045 --- /dev/null +++ b/configs/u-blox-c027/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_U_BLOX_C027 +endif diff --git a/configs/u-blox-c027/README.txt b/configs/u-blox-c027/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..17b6988718c2b00f8769d7bed40ac47b6f73fc94 --- /dev/null +++ b/configs/u-blox-c027/README.txt @@ -0,0 +1,144 @@ +README +^^^^^^ + +README for NuttX port to the u-blox C027 dev board. + +The board is intended for prototyping software for u-blox cellular modems (SARA +or LISA families) and the u-blox GPS receiver (MAX-7Q, MAX-M8Q, or other, +depending on board revision). + +This board features the LPC1768 MCU and is related to the Embedded Artists' base +board with the NXP the LPCXpresso daughter board, see +configs/lpcxpresso-lpc1768/README.txt. + +The board also features an embedded USB debugger. + +Contents +^^^^^^^^ + + u-blox C027 Board + Configurations + +u-blox C027 Board +^^^^^^^^^^^^^^^^^ + +Pin Description Connector On Board +-------------------------------- --------- -------------- +P0[0]/RD1/TXD3/SDA1 D14 TXD3/SDA1 +P0[1]/TD1/RXD3/SCL1 D15 RXD3/SCL1 +P0[2]/TXD0/AD0[7] USBTXD +P0[3]/RXD0/AD0[6] USBRXD +P0[4]/I2SRX-CLK/RD2/CAP2.0 CANRD CAN_RX2 +P0[5]/I2SRX-WS/TD2/CAP2.1 CANTD CAN_TX2 +P0[6]/I2SRX_SDA/SSEL1/MAT2[0] CANS SSEL1 +P0[7]/I2STX_CLK/SCK1/MAT2[1] MDMUSBDET +P0[8]/I2STX_WS/MISO1/MAT2[2] MDMLVLOE +P0[9]/I2STX_SDA/MOSI1/MAT2[3] MDMILVLOE +P0[10]/TXD2/SDA2 GPSTXD +P0[11]/RXD2/SCL2 GPSRXD +P0[15]/TXD1/SCK0/SCK MDMTXD +P0[16]/RXD1/SSEL0/SSEL MDMRXD +P0[17]/CTS1/MISO0/MISO MDMCTS +P0[18]/DCD1/MOSI0/MOSI MDMDCD +P0[19]/DSR1/SDA1 MDMDCR +P0[20]/DTR1/SCL1 MDMDTR +P0[21]/RI1/MCIPWR/RD1 MDMRI +P0[22]/RTS1/TD1 MDMRTS +P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] A0 I2S_CLK +P0[24]/AD0[1]/I2SRX_WS/CAP3[1] A1 I2S_WS +P0[25]/AD0[2]/I2SRX_SDA/TXD3 A2 I2S_SDA +P0[26]/AD0[3]/AOUT/RXD3 A3 AD0.3/AOUT +P0[27]/SDA0/USB_SDA GPSSDA +P0[28]/SCL0 GPSSCL +P0[29]/USB_D+ MDMUSBDP +P0[30]/USB_D- MDMUSBDM +P1[0]/ENET_TXD0 ENET_TXD0 +P1[1]/ENET_TXD1 ENET_TXD1 +P1[4]/ENET_TX_EN ENET_TX_EN +P1[8]/ENET_CRS ENET_CRS +P1[9]/ENET_RXD0 ENET_RXD0 +P1[10]/ENET_RXD1 ENET_RXD1 +P1[14]/ENET_RX_ER ENET_RX_ER +P1[15]/ENET_REF_CLK ENET_REF_CLK +P1[16]/ENET_MDC ENET_MDC +P1[17]/ENET_MDIO ENET_MDIO +P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] GPSRST +P1[19]/MC0A/USB_PPWR/N_CAP1.1 GPSPPS +P1[20]/MCFB0/PWM1.2/SCK0 D13 PWM1.2/SCK0 +P1[21]/MCABORT/PWM1.3/SSEL0 D10 PWM1.3/SSEL0 +P1[22]/MC0B/USB-PWRD/MAT1.0 GPSINT +P1[23]/MCFB1/PWM1.4/MISO0 D12 PWM1.4/MISO0 +P1[24]/MCFB2/PWM1.5/MOSI0 D11 PWM1.5/MOSI0 +P1[25]/MC1A/MAT1.1 ETH_LED_LNK +P1[26]/MC1B/PWM1.6/CAP0.0 ETH_LED_SPD +P1[27]/CLKOUT/USB-OVRCR-N/CAP0.1 ETH_OSC_EN +P1[28]/MC2A/PCAP1.0/MAT0.0 ETH_RST +P1[29]/MC2B/PCAP1.1/MAT0.1 GPSEN +P1[30]/VBUS/AD0[4] A4 AD0.4 +P1[31]/SCK1/AD0[5] A5 AD0.5 +P2[0]/PWM1.1/TXD1 D3 PWM1.1 +P2[1]/PWM1.2/RXD1 D5 PWM1.2 +P2[2]/PWM1.3/CTS1/TRACEDATA[3] D6 PWM1.3 +P2[3]/PWM1.4/DCD1/TRACEDATA[2] D9 PWM1.4 +P2[4]/PWM1.5/DSR1/TRACEDATA[1] D8 PWM1.5 +P2[5]/PWM1[6]/DTR1/TRACEDATA[0] MDMEN +P2[6]/PCAP1[0]/RI1/TRACECLK MDMPWRON +P2[7]/RD2/RTS1 MDMGPIO1 +P2[8]/TD2/TXD2 MDMRST +P2[9]/USB_CONNECT/RXD2 MDMUSBCON +P2[10]/EINT0/NMI ISP_PAD +P2[11]/EINT1/I2STX_CLK D7 EINT1 +P2[12]/EINT2/I2STX_WS D4 EINT2 +P2[13]/EINT3/I2STX_SDA D2 EINT3 +P3[25]/MAT0.0/PWM1.2 LED +P4[28]/RX-MCLK/MAT2.0/TXD3 D0 TXD3 +P4[29]/TX-MCLK/MAT2.1/RXD3 D1 RXD3 + +Configurations +^^^^^^^^^^^^^^ + +nsh +--- + +The nsh configuration allows to test the modem and the GPS receiver. The modem +can be tested in either the internal TCP/IP stack mode or with the NuttX TCP/IP +stack and pppd. + +Modem starts in power-down mode and has to be switched on, e.g., using the nsh +command: + +nsh> ubloxmodem on + +To connect using the NuttX TCP/IP stack, use pppd. At the time of writing the +pppd app is located in apps/examples/pppd and requires setting correct login +details in the source code. + +To connect using the internal u-blox TCP/IP stack, use the chat app. Its +configuration is done in configs/u-blox-c027/nsh/defconfig and can be adjusted +using 'make menuconfig'. + +The NuttX u-blox modem driver is included like this: + +CONFIG_MODEM=y +CONFIG_MODEM_U_BLOX=y + +The nsh app that allows power control is included with the default configuration +as follows: + +CONFIG_EXAMPLES_UBLOXMODEM=y +CONFIG_EXAMPLES_UBLOXMODEM_TTY_DEVNODE="/dev/ttyS1" +CONFIG_EXAMPLES_UBLOXMODEM_DEVNODE="/dev/ubxmdm" + +The modem driver uses two device nodes. The TTY device is the modem terminal, +while the other device is used for general control via GPIO such as power +control. At the moment only one modem is supported, and the corresponding device +control node is /dev/ubxmdm. + +The chat app allows to run scripts. A few such scripts are preset in the +defconfig: + +CONFIG_EXAMPLES_CHAT_PRESET[0..3]: +0 - set up the provider context with username and password, +1 - connect to the provider, +2 - open a TCP socket to the u-blox test server, +3 - test the TCP socket server operation and close the socket. diff --git a/configs/u-blox-c027/include/board.h b/configs/u-blox-c027/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..41f94eb53509166d02906a747cb27c7347c24e65 --- /dev/null +++ b/configs/u-blox-c027/include/board.h @@ -0,0 +1,295 @@ +/************************************************************************************ + * configs/u-blox-c027/include/board.h + * + * Copyright (C) 2016 Vladimir Komendantskiy. All rights reserved. + * Author: Vladimir Komendantskiy + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_U_BLOX_C027_INCLUDE_BOARD_H +#define __CONFIGS_U_BLOX_C027_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* NOTE: The following definitions require lpc17_syscon.h. It is not included here + * because the including C file may not have that file in its include path. + */ + +#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency */ +#define BOARD_OSCCLK_FREQUENCY BOARD_XTAL_FREQUENCY /* Main oscillator frequency */ +#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency */ +#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */ + +/* This is the clock setup we configure for: + * + * SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1 + * CCLCK = 480MHz / 6 = 80MHz -> CCLK divider = 6 + */ + +#define LPC17_CCLK 80000000 /* 80Mhz */ + +/* Select the main oscillator as the frequency source. SYSCLK is then the frequency + * of the main oscillator. + */ + +#undef CONFIG_LPC17_MAINOSC +#define CONFIG_LPC17_MAINOSC 1 +#define BOARD_SCS_VALUE SYSCON_SCS_OSCEN + +/* Select the main oscillator and CCLK divider. The output of the divider is CCLK. + * The input to the divider (PLLCLK) will be determined by the PLL output. + */ + +#define BOARD_CCLKCFG_DIVIDER 6 +#define BOARD_CCLKCFG_VALUE ((BOARD_CCLKCFG_DIVIDER-1) << SYSCON_CCLKCFG_SHIFT) + +/* PLL0. PLL0 is used to generate the CPU clock divider input (PLLCLK). + * + * Source clock: Main oscillator + * PLL0 Multiplier value (M): 20 + * PLL0 Pre-divider value (N): 1 + * + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz + */ + +#undef CONFIG_LPC17_PLL0 +#define CONFIG_LPC17_PLL0 1 +#define BOARD_CLKSRCSEL_VALUE SYSCON_CLKSRCSEL_MAIN + +#define BOARD_PLL0CFG_MSEL 20 +#define BOARD_PLL0CFG_NSEL 1 +#define BOARD_PLL0CFG_VALUE \ + (((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLL0CFG_MSEL_SHIFT) | \ + ((BOARD_PLL0CFG_NSEL-1) << SYSCON_PLL0CFG_NSEL_SHIFT)) + +/* PLL1 -- Not used. */ + +#undef CONFIG_LPC17_PLL1 +#define BOARD_PLL1CFG_MSEL 36 +#define BOARD_PLL1CFG_NSEL 1 +#define BOARD_PLL1CFG_VALUE \ + (((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLL1CFG_MSEL_SHIFT) | \ + ((BOARD_PLL1CFG_NSEL-1) << SYSCON_PLL1CFG_NSEL_SHIFT)) + +/* USB divider. This divider is used when PLL1 is not enabled to get the + * USB clock from PLL0: + * + * USBCLK = PLL0CLK / 10 = 48MHz + */ + +#define BOARD_USBCLKCFG_VALUE SYSCON_USBCLKCFG_DIV10 + +/* FLASH Configuration */ + +#undef CONFIG_LPC17_FLASH +#define CONFIG_LPC17_FLASH 1 +#define BOARD_FLASHCFG_VALUE 0x0000303a + +/* Ethernet configuration */ + +#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV20 + +/* u-blox C027 board pin usage ***************************************************/ +/* Pin Description Connector On Board + * -------------------------------- --------- -------------- + * P0[0]/RD1/TXD3/SDA1 D14 TXD3/SDA1 + * P0[1]/TD1/RXD3/SCL1 D15 RXD3/SCL1 + * P0[2]/TXD0/AD0[7] USBTXD + * P0[3]/RXD0/AD0[6] USBRXD + * P0[4]/I2SRX-CLK/RD2/CAP2.0 CANRD CAN_RX2 + * P0[5]/I2SRX-WS/TD2/CAP2.1 CANTD CAN_TX2 + * P0[6]/I2SRX_SDA/SSEL1/MAT2[0] CANS SSEL1 + * P0[7]/I2STX_CLK/SCK1/MAT2[1] MDMUSBDET + * P0[8]/I2STX_WS/MISO1/MAT2[2] MDMLVLOE + * P0[9]/I2STX_SDA/MOSI1/MAT2[3] MDMILVLOE + * P0[10]/TXD2/SDA2 GPSTXD + * P0[11]/RXD2/SCL2 GPSRXD + * P0[15]/TXD1/SCK0/SCK MDMTXD + * P0[16]/RXD1/SSEL0/SSEL MDMRXD + * P0[17]/CTS1/MISO0/MISO MDMCTS + * P0[18]/DCD1/MOSI0/MOSI MDMDCD + * P0[19]/DSR1/SDA1 MDMDCR + * P0[20]/DTR1/SCL1 MDMDTR + * P0[21]/RI1/MCIPWR/RD1 MDMRI + * P0[22]/RTS1/TD1 MDMRTS + * P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] A0 I2S_CLK + * P0[24]/AD0[1]/I2SRX_WS/CAP3[1] A1 I2S_WS + * P0[25]/AD0[2]/I2SRX_SDA/TXD3 A2 I2S_SDA + * P0[26]/AD0[3]/AOUT/RXD3 A3 AD0.3/AOUT + * P0[27]/SDA0/USB_SDA GPSSDA + * P0[28]/SCL0 GPSSCL + * P0[29]/USB_D+ MDMUSBDP + * P0[30]/USB_D- MDMUSBDM + * + * P1[0]/ENET_TXD0 ENET_TXD0 + * P1[1]/ENET_TXD1 ENET_TXD1 + * P1[4]/ENET_TX_EN ENET_TX_EN + * P1[8]/ENET_CRS ENET_CRS + * P1[9]/ENET_RXD0 ENET_RXD0 + * P1[10]/ENET_RXD1 ENET_RXD1 + * P1[14]/ENET_RX_ER ENET_RX_ER + * P1[15]/ENET_REF_CLK ENET_REF_CLK + * P1[16]/ENET_MDC ENET_MDC + * P1[17]/ENET_MDIO ENET_MDIO + * P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] GPSRST + * P1[19]/MC0A/USB_PPWR/N_CAP1.1 GPSPPS + * P1[20]/MCFB0/PWM1.2/SCK0 D13 PWM1.2/SCK0 + * P1[21]/MCABORT/PWM1.3/SSEL0 D10 PWM1.3/SSEL0 + * P1[22]/MC0B/USB-PWRD/MAT1.0 GPSINT + * P1[23]/MCFB1/PWM1.4/MISO0 D12 PWM1.4/MISO0 + * P1[24]/MCFB2/PWM1.5/MOSI0 D11 PWM1.5/MOSI0 + * P1[25]/MC1A/MAT1.1 ETH_LED_LNK + * P1[26]/MC1B/PWM1.6/CAP0.0 ETH_LED_SPD + * P1[27]/CLKOUT/USB-OVRCR-N/CAP0.1 ETH_OSC_EN + * P1[28]/MC2A/PCAP1.0/MAT0.0 ETH_RST + * P1[29]/MC2B/PCAP1.1/MAT0.1 GPSEN + * P1[30]/VBUS/AD0[4] A4 AD0.4 + * P1[31]/SCK1/AD0[5] A5 AD0.5 + * + * P2[0]/PWM1.1/TXD1 D3 PWM1.1 + * P2[1]/PWM1.2/RXD1 D5 PWM1.2 + * P2[2]/PWM1.3/CTS1/TRACEDATA[3] D6 PWM1.3 + * P2[3]/PWM1.4/DCD1/TRACEDATA[2] D9 PWM1.4 + * P2[4]/PWM1.5/DSR1/TRACEDATA[1] D8 PWM1.5 + * P2[5]/PWM1[6]/DTR1/TRACEDATA[0] MDMEN + * P2[6]/PCAP1[0]/RI1/TRACECLK MDMPWRON + * P2[7]/RD2/RTS1 MDMGPIO1 + * P2[8]/TD2/TXD2 MDMRST + * P2[9]/USB_CONNECT/RXD2 MDMUSBCON + * P2[10]/EINT0/NMI ISP_PAD + * P2[11]/EINT1/I2STX_CLK D7 EINT1 + * P2[12]/EINT2/I2STX_WS D4 EINT2 + * P2[13]/EINT3/I2STX_SDA D2 EINT3 + * + * P3[25]/MAT0.0/PWM1.2 LED + * + * P4[28]/RX-MCLK/MAT2.0/TXD3 D0 TXD3 + * P4[29]/TX-MCLK/MAT2.1/RXD3 D1 RXD3 + */ + +/* LED definitions ******************************************************************/ +/* The u-blox C027 board has a single red LED (there are additional LEDs on the + * base board not considered here). + */ + /* ON OFF */ +#define LED_STARTED 0 /* OFF ON (never happens) */ +#define LED_HEAPALLOCATE 0 /* OFF ON (never happens) */ +#define LED_IRQSENABLED 0 /* OFF ON (never happens) */ +#define LED_STACKCREATED 1 /* ON ON (never happens) */ +#define LED_INIRQ 2 /* OFF NC (momentary) */ +#define LED_SIGNAL 2 /* OFF NC (momentary) */ +#define LED_ASSERTION 2 /* OFF NC (momentary) */ +#define LED_PANIC 0 /* OFF ON (1Hz flashing) */ + +#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1 +#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 + +#define GPIO_SSP1_SCK GPIO_SSP1_SCK_1 +#define GPIO_SSP0_SCK GPIO_SSP0_SCK_1 +#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_1 +#define GPIO_SSP0_MISO GPIO_SSP0_MISO_1 +#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_1 + +#define GPIO_UART1_TXD GPIO_UART1_TXD_1 +#define GPIO_UART1_RXD GPIO_UART1_RXD_1 +#define GPIO_UART1_CTS GPIO_UART1_CTS_1 +#define GPIO_UART1_RTS GPIO_UART1_RTS_1 +#define GPIO_UART1_DCD GPIO_UART1_DCD_1 +#define GPIO_UART1_DSR GPIO_UART1_DSR_1 +#define GPIO_UART1_DTR GPIO_UART1_DTR_1 +#define GPIO_UART1_RI GPIO_UART1_RI_1 + +#define GPIO_UART2_TXD GPIO_UART2_TXD_1 +#define GPIO_UART2_RXD GPIO_UART2_RXD_1 + +#define GPIO_UART3_TXD GPIO_UART3_TXD_3 +#define GPIO_UART3_RXD GPIO_UART3_RXD_3 + +#define GPIO_ENET_MDC GPIO_ENET_MDC_1 +#define GPIO_ENET_MDIO GPIO_ENET_MDIO_1 + +#define GPIO_PWM1p1 GPIO_PWM1p1_2 +#define GPIO_PWM1p2 GPIO_PWM1p2_2 +#define GPIO_PWM1p3 GPIO_PWM1p3_2 +#define GPIO_PWM1p4 GPIO_PWM1p4_2 +#define GPIO_PWM1p5 GPIO_PWM1p5_2 +#define GPIO_PWM1p6 GPIO_PWM1p6_2 + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_U_BLOX_C027_INCLUDE_BOARD_H */ diff --git a/configs/u-blox-c027/nsh/Make.defs b/configs/u-blox-c027/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..7d08bc556877703992488bef48ed7407c29d4345 --- /dev/null +++ b/configs/u-blox-c027/nsh/Make.defs @@ -0,0 +1,110 @@ +############################################################################ +# configs/u-blox-c027/nsh/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mknulldeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/u-blox-c027/nsh/defconfig b/configs/u-blox-c027/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..447189b768f7ddc076f76bf33082327f7310cee1 --- /dev/null +++ b/configs/u-blox-c027/nsh/defconfig @@ -0,0 +1,1247 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +CONFIG_DEBUG_GPIO=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set +# CONFIG_DEBUG_HARDFAULT is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +CONFIG_LPC17_UART1=y +CONFIG_LPC17_UART2=y +CONFIG_LPC17_UART3=y +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +CONFIG_LPC17_I2C0=y +CONFIG_LPC17_I2C1=y +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# +CONFIG_UART1_RINGINDICATOR=y + +# +# I2C driver options +# +CONFIG_LPC17_I2C0_FREQUENCY=100000 +CONFIG_LPC17_I2C1_FREQUENCY=100000 + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=7296 +CONFIG_NET_NTXDESC=6 +CONFIG_NET_NRXDESC=6 +# CONFIG_NET_WOL is not set +# CONFIG_NET_REGDEBUG is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8079 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_LPCXPRESSO is not set +# CONFIG_ARCH_BOARD_MBED is not set +# CONFIG_ARCH_BOARD_NUCLEUS2G is not set +CONFIG_ARCH_BOARD_U_BLOX_C027=y +# CONFIG_ARCH_BOARD_ZKITARM is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="u-blox-c027" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_CLOCK_MONOTONIC=y +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2016 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=5 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +CONFIG_BOARD_INITIALIZE=y +# CONFIG_BOARD_INITTHREAD is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +CONFIG_MODEM=y +CONFIG_MODEM_U_BLOX=y +CONFIG_MODEM_U_BLOX_DEBUG=y +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +CONFIG_NETDEV_MULTINIC=y +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_STATISTICS is not set +CONFIG_NETDEV_LATEINIT=y +# CONFIG_NET_DUMPPACKET is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +CONFIG_ETH1_PHY_NONE=y +# CONFIG_ETH1_PHY_AM79C874 is not set +# CONFIG_ETH1_PHY_KS8721 is not set +# CONFIG_ETH1_PHY_KSZ8041 is not set +# CONFIG_ETH1_PHY_KSZ8051 is not set +# CONFIG_ETH1_PHY_KSZ8081 is not set +# CONFIG_ETH1_PHY_KSZ90x1 is not set +# CONFIG_ETH1_PHY_DP83848C is not set +# CONFIG_ETH1_PHY_LAN8720 is not set +# CONFIG_ETH1_PHY_DM9161 is not set +# CONFIG_NETDEV_PHY_DEBUG is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +CONFIG_ARCH_HAVE_UART2=y +CONFIG_ARCH_HAVE_UART3=y +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +CONFIG_SERIAL_IFLOWCONTROL=y +CONFIG_SERIAL_OFLOWCONTROL=y +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_UART2_SERIAL_CONSOLE is not set +# CONFIG_UART3_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +CONFIG_UART1_IFLOWCONTROL=y +CONFIG_UART1_OFLOWCONTROL=y +# CONFIG_UART1_DMA is not set + +# +# UART2 Configuration +# +CONFIG_UART2_RXBUFSIZE=256 +CONFIG_UART2_TXBUFSIZE=256 +CONFIG_UART2_BAUD=9600 +CONFIG_UART2_BITS=8 +CONFIG_UART2_PARITY=0 +CONFIG_UART2_2STOP=0 +# CONFIG_UART2_IFLOWCONTROL is not set +# CONFIG_UART2_OFLOWCONTROL is not set +# CONFIG_UART2_DMA is not set + +# +# UART3 Configuration +# +CONFIG_UART3_RXBUFSIZE=256 +CONFIG_UART3_TXBUFSIZE=256 +CONFIG_UART3_BAUD=115200 +CONFIG_UART3_BITS=8 +CONFIG_UART3_PARITY=0 +CONFIG_UART3_2STOP=0 +# CONFIG_UART3_IFLOWCONTROL is not set +# CONFIG_UART3_OFLOWCONTROL is not set +# CONFIG_UART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_TUN_MTU=296 +CONFIG_NET_TUN_TCP_RECVWNDO=256 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +CONFIG_NET_MULTILINK=y +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +CONFIG_NET_TUN=y +CONFIG_TUN_NINTERFACES=1 + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +# CONFIG_NET_TCP_WRBUFFER_DEBUG is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 +# CONFIG_NET_ARP_DUMP is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_IOB_DEBUG is not set +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="c027" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_NET is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIBC_STRERROR=y +CONFIG_LIBC_STRERROR_SHORT=y +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BRIDGE is not set +CONFIG_EXAMPLES_CHAT=y +CONFIG_EXAMPLES_CHAT_TTY_DEVNODE="/dev/ttyS1" +CONFIG_EXAMPLES_CHAT_TIMEOUT_SECONDS=20 +CONFIG_EXAMPLES_CHAT_SIZE=1024 +CONFIG_EXAMPLES_CHAT_PRESET0="\"\" ATE1 OK AT+CMEE=2 OK AT+UPSD=0,0 OK AT+UPSD=0,1,\\\"eseye.com\\\" OK AT+UPSD=0,2,\\\"user\\\" OK AT+UPSD=0,3,\\\"pass\\\" OK AT+UPSD=0,6,1 OK \\c" +CONFIG_EXAMPLES_CHAT_PRESET1="\"\" AT+UPSDA=0,3 OK AT+UPSND=0,8 OK AT+UPSND=0,0 OK \\c" +CONFIG_EXAMPLES_CHAT_PRESET2="\"\" AT+USOCR=6 OK AT+USOCO=0,\\\"195.34.89.241\\\",7 PAUSE 10 OK AT+USORD=0,32 u-blox \\c" +CONFIG_EXAMPLES_CHAT_PRESET3="\"\" AT+USOWR=0,5,\\\"NuttX\\\" PAUSE 10 OK AT+USORD=0,5 NuttX AT+USOCL=0" +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +CONFIG_EXAMPLES_PPPD=y +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +CONFIG_NETUTILS_CHAT=y +# CONFIG_NETUTILS_CODECS is not set +CONFIG_NETUTILS_DHCPC=y +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/7.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +CONFIG_NETUTILS_PPPD=y +CONFIG_NETUTILS_PPPD_STACKSIZE=2048 +CONFIG_NETUTILS_PPPD_PAP=y + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LOSMART is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT_THREAD=y +CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 +CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 +# CONFIG_NSH_NETINIT_DEBUG is not set + +# +# IP Address Configuration +# +CONFIG_NSH_DHCPC=y + +# +# IPv4 Addresses +# +CONFIG_NSH_DRIPADDR=0xc0a80101 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0xbada55add7e5 +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +CONFIG_NSH_LOGIN=y +# CONFIG_NSH_CONSOLE_LOGIN is not set +CONFIG_NSH_TELNET_LOGIN=y +CONFIG_NSH_LOGIN_FIXED=y +# CONFIG_NSH_LOGIN_PLATFORM is not set +CONFIG_NSH_LOGIN_USERNAME="admin" +CONFIG_NSH_LOGIN_PASSWORD="Administrator" +CONFIG_NSH_LOGIN_FAILDELAY=0 +CONFIG_NSH_LOGIN_FAILCOUNT=3 + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +CONFIG_SYSTEM_CLE=y +CONFIG_SYSTEM_CLE_DEBUGLEVEL=0 +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +CONFIG_SYSTEM_UBLOXMODEM=y +CONFIG_SYSTEM_UBLOXMODEM_TTY_DEVNODE="/dev/ttyS1" +CONFIG_SYSTEM_UBLOXMODEM_DEVNODE="/dev/ubxmdm" +CONFIG_SYSTEM_ZMODEM=y +CONFIG_SYSTEM_ZMODEM_DEVNAME="/dev/console" +CONFIG_SYSTEM_ZMODEM_RCVBUFSIZE=512 +CONFIG_SYSTEM_ZMODEM_PKTBUFSIZE=512 +CONFIG_SYSTEM_ZMODEM_SNDBUFSIZE=512 +CONFIG_SYSTEM_ZMODEM_MOUNTPOINT="/tmp" +# CONFIG_SYSTEM_ZMODEM_RCVSAMPLE is not set +# CONFIG_SYSTEM_ZMODEM_SENDATTN is not set +CONFIG_SYSTEM_ZMODEM_ALWAYSSINT=y +# CONFIG_SYSTEM_ZMODEM_SENDBRAK is not set +CONFIG_SYSTEM_ZMODEM_RESPTIME=10 +CONFIG_SYSTEM_ZMODEM_CONNTIME=30 +CONFIG_SYSTEM_ZMODEM_SERIALNO=0 +CONFIG_SYSTEM_ZMODEM_MAXERRORS=20 +CONFIG_SYSTEM_ZMODEM_WRITESIZE=0 +# CONFIG_DEBUG_ZMODEM is not set diff --git a/configs/u-blox-c027/nsh/setenv.sh b/configs/u-blox-c027/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..137954e6dacffda4879abc48d877fcef175b1402 --- /dev/null +++ b/configs/u-blox-c027/nsh/setenv.sh @@ -0,0 +1,59 @@ +#!/bin/bash +# configs/u-blox-c027/nsh/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` + +# This is where the buildroot might reside on a Linux or Cygwin system +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the default install location for Code Red on Linux +export TOOLCHAIN_BIN="/usr/local/LPCXpresso/tools/bin" + +# This is the Cygwin path to the LPCXpresso 3.6 install location under Windows +#export TOOLCHAIN_BIN="/cygdrive/c/nxp/lpcxpresso_3.6/Tools/bin" + +# This is the path to the LPCXpression tool subdirectory +export LPCTOOL_DIR="${WD}/configs/u-blox-c027/tools" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/u-blox-c027/scripts/ld.script b/configs/u-blox-c027/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..60d5d2de01967be0bafdf4c609b643b903beea95 --- /dev/null +++ b/configs/u-blox-c027/scripts/ld.script @@ -0,0 +1,117 @@ +/**************************************************************************** + * configs/u-blox-c027/scripts/ld.script + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LPC1768 has 512Kb of FLASH beginning at address 0x0000:0000 and + * 64Kb of total SRAM: 32Kb of SRAM in the CPU block beginning at address + * 0x10000000 and 32Kb of AHB SRAM in two banks of 16Kb beginning at addresses + * 0x20070000 and 0x20080000. Here we assume that .data and .bss will all fit + * into the 32Kb CPU SRAM address range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K + sram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/u-blox-c027/src/.gitignore b/configs/u-blox-c027/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/u-blox-c027/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/u-blox-c027/src/Makefile b/configs/u-blox-c027/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..844046486e37f3fb20ba0878ca36625557a86134 --- /dev/null +++ b/configs/u-blox-c027/src/Makefile @@ -0,0 +1,53 @@ +############################################################################ +# configs/u-blox-c027/src/Makefile +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc17_boot.c lpc17_leds.c lpc17_ssp.c lpc17_adc.c lpc17_dac.c lpc17_pwm.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc17_appinit.c +endif + +ifeq ($(CONFIG_MODEM_U_BLOX),y) +CSRCS += lpc17_ubxmdm.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += lpc17_usbmsc.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/u-blox-c027/src/lpc17_adc.c b/configs/u-blox-c027/src/lpc17_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..9d620f84c69357495d4d1c53d3d1414812457e98 --- /dev/null +++ b/configs/u-blox-c027/src/lpc17_adc.c @@ -0,0 +1,113 @@ +/************************************************************************************ + * configs/u-blox-c027/src/lpc17_adc.c + * + * Derives from configs/stm3220g-eval/src/lpc17_adc.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Kannan + * + * which, in turn, was based on configs/stm3220g-eval/src/lpc17_adc.c + * + * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "lpc17_adc.h" +#include "u-blox-c027.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All LPC17 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call lpc17_adcinitialize() to get an instance of the ADC interface */ + + adc = lpc17_adcinitialize(); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_ADC */ diff --git a/configs/u-blox-c027/src/lpc17_appinit.c b/configs/u-blox-c027/src/lpc17_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..ce83755f4d3f1b3d0665df97850a6d085e903c4d --- /dev/null +++ b/configs/u-blox-c027/src/lpc17_appinit.c @@ -0,0 +1,182 @@ +/**************************************************************************** + * config/u-blox-c027/src/lpc17_appinit.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include + +#include "lpc17_ssp.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifdef CONFIG_LIB_BOARDCTL + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_U_BLOX_C027 +# define NSH_HAVEUSBDEV 1 +# ifdef CONFIG_LPC17_SSP0 +# define NSH_HAVEMMCSD 1 +# else +# undef NSH_HAVEMMCSD +# endif +#else +# error "Unrecognized board" +# undef NSH_HAVEUSBDEV +# undef NSH_HAVEMMCSD +#endif + +/* Do we have SPI support for MMC/SD? */ + +#ifdef NSH_HAVEMMCSD +# ifdef CONFIG_NSH_ARCHINIT +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 0 +# error "External MMC/SD on SSP0" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 0 +# endif +# if !defined(CONFIG_NSH_MMCSDSLOTNO) +# error "Use MMC/SD slot 0 by default" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +# else +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 0 +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#endif + +/* Can't support USB device features if USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef NSH_HAVEUSBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef NSH_HAVEMMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/* Currnently MMC/SD support is available only for NSH configurations */ + +#else +# undef NSH_HAVEMMCSD +#endif /* CONFIG_LIB_BOARDCTL */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + int ret; + +#ifdef CONFIG_FS_PROCFS + /* mount the proc filesystem */ + + syslog(LOG_INFO, "Mounting procfs to /proc\n"); + + ret = mount(NULL, "/proc", "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to mount the PROC filesystem: %d (%d)\n", + ret, errno); + return ret; + } +#endif + +#ifdef NSH_HAVEMMCSD + FAR struct spi_dev_s *ssp; + + /* Get the SSP port */ + + ssp = lpc17_sspbus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + if (!ssp) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SSP port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SSP port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + /* Bind the SSP port to the slot */ + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, CONFIG_NSH_MMCSDSLOTNO, ssp); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to bind SSP port %d to MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfuly bound SSP port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); +#endif + return OK; +} diff --git a/configs/u-blox-c027/src/lpc17_boot.c b/configs/u-blox-c027/src/lpc17_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..f0c61633e2d5005923e2b322f3eb71ed8b86932b --- /dev/null +++ b/configs/u-blox-c027/src/lpc17_boot.c @@ -0,0 +1,117 @@ +/************************************************************************************ + * configs/u-blox-c027/src/lpc17_boot.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_gpio.h" +#include "lpc17_ssp.h" +#include "u-blox-c027.h" + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void) +{ + /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak + * function c027_sspdev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1) + if (c027_sspdev_initialize) + { + c027_sspdev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_initialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + lpc17_ubxmdm_init(false); + +#if 0 + lpc17_configgpio(C027_MDMEN | GPIO_VALUE_ZERO); /* Modem disabled */ + lpc17_configgpio(C027_MDMRST | GPIO_VALUE_ONE); /* Modem reset on */ + lpc17_configgpio(C027_MDMPWR | GPIO_VALUE_ONE); /* Modem power off */ + lpc17_configgpio(C027_GPSEN | GPIO_VALUE_ZERO); /* GPS disabled */ + lpc17_configgpio(C027_GPSRST | GPIO_VALUE_ONE); /* GPS reset on */ + lpc17_configgpio(C027_MDMLVLOE | GPIO_VALUE_ONE); /* UART shifter disabled */ + lpc17_configgpio(C027_MDMILVLOE | GPIO_VALUE_ZERO); /* I2C shifter disabled */ + lpc17_configgpio(C027_MDMUSBDET | GPIO_VALUE_ZERO); /* USB sense off */ +#endif +} +#endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/u-blox-c027/src/lpc17_dac.c b/configs/u-blox-c027/src/lpc17_dac.c new file mode 100644 index 0000000000000000000000000000000000000000..91c1585f058f006b4bd1bd94957a7e1e5e3913a5 --- /dev/null +++ b/configs/u-blox-c027/src/lpc17_dac.c @@ -0,0 +1,105 @@ +/************************************************************************************ + * configs/u-blox-c027/src/lpc17_dac.c + * + * Derives from configs/stm3220g-eval/src/lpc17_adc.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Kannan + * + * which, in turn, was based on configs/stm3220g-eval/src/lpc17_adc.c + * + * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_dac.h" + +#ifdef CONFIG_DAC + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: dac_devinit + * + * Description: + * All LPC17xx architectures must provide the following interface to work with + * examples/diag. + * + ************************************************************************************/ + +int dac_devinit(void) +{ + static bool initialized = false; + struct dac_dev_s *dac; + int ret; + + if (!initialized) + { + /* Call lpc17_dacinitialize() to get an instance of the dac interface */ + + dac = lpc17_dacinitialize(); + if (dac == NULL) + { + adbg("ERROR: Failed to get dac interface\n"); + return -ENODEV; + } + + ret = dac_register("/dev/dac0", dac); + if (ret < 0) + { + adbg("dac_register failed: %d\n", ret); + return ret; + } + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_DAC */ diff --git a/configs/u-blox-c027/src/lpc17_leds.c b/configs/u-blox-c027/src/lpc17_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..5987d6f66ec44a8be8bb2961d577306b98e8d1e0 --- /dev/null +++ b/configs/u-blox-c027/src/lpc17_leds.c @@ -0,0 +1,150 @@ +/**************************************************************************** + * configs/u-blox-c027/src/lpc17_leds.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_gpio.h" +#include "u-blox-c027.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static bool g_ncstate; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure all LED GPIO lines */ + + lpc17_configgpio(C027_LED); + g_ncstate = true; +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool off; + + switch (led) + { + case 0: + case 2: + off = true; + break; + + case 1: + off = false; + g_ncstate = false; + break; + + default: + return; + } + + lpc17_gpiowrite(C027_LED, off); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + bool off; + + switch (led) + { + case 0: + case 1: + off = false; + break; + + case 2: + off = g_ncstate; + break; + + default: + return; + } + + lpc17_gpiowrite(C027_LED, off); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/u-blox-c027/src/lpc17_pwm.c b/configs/u-blox-c027/src/lpc17_pwm.c new file mode 100644 index 0000000000000000000000000000000000000000..d5d4bb506cea2375562b317a28a474882d488c80 --- /dev/null +++ b/configs/u-blox-c027/src/lpc17_pwm.c @@ -0,0 +1,154 @@ +/************************************************************************************ + * configs/u-blox-c027/lpc17_pwm.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "lpc17_pwm.h" +#include "lpc17_timer.h" +#include "u-blox-c027.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifdef CONFIG_PWM + +FAR struct pwm_lowerhalf_s *lpc17_pwminitialize(int timer); +FAR struct pwm_lowerhalf_s *lpc17_mcpwminitialize(int timer); +FAR struct pwm_lowerhalf_s *lpc17_timerinitialize(int timer); + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All LPC17 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + struct pwm_lowerhalf_s *mcpwm; + struct pwm_lowerhalf_s *timer; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call lpc17_pwminitialize() to get an instance of the PWM interface */ + + pwm = lpc17_pwminitialize(0); + if (!pwm) + { + adbg("Failed to get the LPC17XX PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + adbg("pwm_register failed: %d\n", ret); + return ret; + } + + mcpwm = lpc17_mcpwminitialize(0); + if (!mcpwm) + { + adbg("Failed to get the LPC17XX MOTOR PWM lower half\n"); + return -ENODEV; + } + + /* Register the MOTOR CONTROL PWM driver at "/dev/mcpwm0" */ + + ret = pwm_register("/dev/mcpwm0", mcpwm); + if (ret < 0) + { + adbg("mcpwm_register failed: %d\n", ret); + return ret; + } + + timer = lpc17_timerinitialize(0); + if (!timer) + { + adbg("Failed to get the LPC17XX TIMER lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/timer0" */ + + ret = pwm_register("/dev/timer0", timer); + if (ret < 0) + { + adbg("timer_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/u-blox-c027/src/lpc17_ssp.c b/configs/u-blox-c027/src/lpc17_ssp.c new file mode 100644 index 0000000000000000000000000000000000000000..640732aa471ba1318b4bd03f05fe99ce01fb6c0c --- /dev/null +++ b/configs/u-blox-c027/src/lpc17_ssp.c @@ -0,0 +1,199 @@ +/************************************************************************************ + * configs/u-blox-c027/src/lpc17_ssp.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "lpc17_gpio.h" +#include "lpc17_ssp.h" +#include "u-blox-c027.h" + +#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SSP_DEBUG /* Define to enable debug */ +#undef SSP_VERBOSE /* Define to enable verbose debug */ + +#ifdef SSP_DEBUG +# define sspdbg lldbg +# ifdef SSP_VERBOSE +# define sspvdbg lldbg +# else +# define sspvdbg(x...) +# endif +#else +# undef SSP_VERBOSE +# define sspdbg(x...) +# define sspvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#ifdef SSP_VERBOSE +# define ssp_dumpgpio(m) lpc17_dumpgpio(SDCCS_GPIO, m) +#else +# define ssp_dumpgpio(m) +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: c027_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the C027. + * + ************************************************************************************/ + +void weak_function c027_sspdev_initialize(void) +{ + /* Configure the SPI-based microSD CS GPIO */ + + ssp_dumpgpio("c027_sspdev_initialize() Entry)"); + + /* Configure card detect and chip select for the SD slot. */ + +#if defined(CONFIG_LPC17_SSP0) && defined(CONFIG_MMCSD_SPI) + (void)lpc17_configgpio(C027_SD_CS); + (void)lpc17_configgpio(C027_SD_CD); +#endif + + ssp_dumpgpio("c027_sspdev_initialize() Exit"); +} + +/************************************************************************************ + * Name: lpc17_ssp0/ssp1select and lpc17_ssp0/ssp1status + * + * Description: + * The external functions, lpc17_ssp0/ssp1select and lpc17_ssp0/ssp1status + * must be provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including lpc17_sspbus_initialize()) + * are provided by common LPC17xx logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in lpc17_boardinitialize() to configure SPI/SSP chip select + * pins. + * 2. Provide lpc17_ssp0/ssp1select() and lpc17_ssp0/ssp1status() functions + * in your board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 3. Add a calls to lpc17_sspbus_initialize() in your low level application + * initialization logic + * 4. The handle returned by lpc17_sspbus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +#ifdef CONFIG_LPC17_SSP0 +void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssp_dumpgpio("lpc17_ssp0select() Entry"); + +#warning "Assert CS here (false)" + + ssp_dumpgpio("lpc17_ssp0select() Exit"); +} + +uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + sspdbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} +#endif + +#ifdef CONFIG_LPC17_SSP1 +void lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssp_dumpgpio("lpc17_ssp1select() Entry"); + + if (devid == SPIDEV_MMCSD) + { + /* Assert/de-assert the CS pin to the card */ + + (void)lpc17_gpiowrite(C027_SD_CS, !selected); + } +#ifdef CONFIG_NX_LCDDRIVER + else if (devid == SPIDEV_DISPLAY) + { + /* Assert the CS pin to the OLED display */ + + (void)lpc17_gpiowrite(C027_OLED_CS, !selected); + } +#endif + ssp_dumpgpio("lpc17_ssp1select() Exit"); +} + +uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + if (devid == SPIDEV_MMCSD) + { + /* Read the state of the card-detect bit */ + + if (lpc17_gpioread(C027_SD_CD) == 0) + { + sspdbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; + } + } + + sspdbg("Returning zero\n"); + return 0; +} +#endif + +#endif /* CONFIG_LPC17_SSP0 || CONFIG_LPC17_SSP1 */ diff --git a/configs/u-blox-c027/src/lpc17_ubxmdm.c b/configs/u-blox-c027/src/lpc17_ubxmdm.c new file mode 100644 index 0000000000000000000000000000000000000000..a6615e54aa65f44180b0e49c13bf27dbca18428c --- /dev/null +++ b/configs/u-blox-c027/src/lpc17_ubxmdm.c @@ -0,0 +1,310 @@ +/**************************************************************************** + * config/u-blox-c027/src/lpc17_ubxmdm.c + * + * Copyright (C) 2016 Vladimir Komendantskiy. All rights reserved. + * Author: Vladimir Komendantskiy + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include "lpc17_gpio.h" +#include "u-blox-c027.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Debug ********************************************************************/ +/* Non-standard debug that may be enabled just for testing the modem driver */ + +#ifdef CONFIG_MODEM_U_BLOX_DEBUG +# define m_dbg dbg +# define m_vdbg vdbg +# define m_vlldbg lldbg +# define m_vllvdbg llvdbg +#else +# define m_dbg(x...) +# define m_vdbg(x...) +# define m_lldbg(x...) +# define m_llvdbg(x...) +#endif + +#define UBXMDM_REGISTER_COUNT \ + (sizeof(lpc17_ubxmdm_name_pins) / \ + sizeof(struct lpc17_name_pin)) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* Core interface pin connections. These do not include UART or USB pins. */ + +struct lpc17_ubxmdm_pins +{ + lpc17_pinset_t ldo_enable; + lpc17_pinset_t power_on_n; + lpc17_pinset_t reset_n; + lpc17_pinset_t shifter_en_n; + lpc17_pinset_t usb_detect; +}; + +/* This structure type provides the private representation of the "lower-half" + * driver state. This type must be coercible to type 'ubxmdm_lower'. + */ + +struct lpc17_ubxmdm_lower +{ + FAR const struct ubxmdm_ops* ops; /* Lower half operations */ + + /* Private, architecture-specific information. */ + + FAR const struct lpc17_ubxmdm_pins* pins; + bool usb_used; +}; + +/* Pair type for associating a register name to a pin. */ + +struct lpc17_name_pin +{ + const char name[3]; + const lpc17_pinset_t pin; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* "Lower half" driver methods **********************************************/ + +static int lpc17_poweron (FAR struct ubxmdm_lower* lower); +static int lpc17_poweroff (FAR struct ubxmdm_lower* lower); +static int lpc17_reset (FAR struct ubxmdm_lower* lower); +static int lpc17_getstatus(FAR struct ubxmdm_lower* lower, + FAR struct ubxmdm_status* status); +static int lpc17_ioctl (FAR struct ubxmdm_lower* lower, + int cmd, + unsigned long arg); + +/* "Lower half" driver state */ + +static struct lpc17_ubxmdm_lower lpc17_ubxmdm_lower; + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* "Lower half" driver methods */ + +static const struct lpc17_ubxmdm_pins lpc17_ubxmdm_pins = +{ + .ldo_enable = C027_MDMLDOEN, + .power_on_n = C027_MDMPWR, + .reset_n = C027_MDMRST, + .shifter_en_n = C027_MDMLVLOE, + .usb_detect = C027_MDMUSBDET, +}; + +static const struct ubxmdm_ops lpc17_ubxmdm_ops = +{ + .poweron = lpc17_poweron, + .poweroff = lpc17_poweroff, + .reset = lpc17_reset, + .getstatus = lpc17_getstatus, + .ioctl = lpc17_ioctl, +}; + +static const struct lpc17_name_pin lpc17_ubxmdm_name_pins[] = +{ + {{'T','X','D'}, GPIO_UART1_TXD}, + {{'R','X','D'}, GPIO_UART1_RXD}, + {{'C','T','S'}, GPIO_UART1_CTS}, + {{'R','T','S'}, GPIO_UART1_RTS}, + {{'D','C','D'}, GPIO_UART1_DCD}, + {{'D','S','R'}, GPIO_UART1_DSR}, + {{'D','T','R'}, GPIO_UART1_DTR}, + {{'R','I',' '}, GPIO_UART1_RI }, + {{'I','O','1'}, C027_MDMGPIO1 }, + {{'R','S','T'}, C027_MDMRST }, + {{'P','W','R'}, C027_MDMPWR }, + {{'D','E','T'}, C027_MDMUSBDET}, + {{'L','D','O'}, C027_MDMLDOEN }, + {{'L','V','L'}, C027_MDMLVLOE }, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static int lpc17_poweron(FAR struct ubxmdm_lower* lower) +{ + FAR struct lpc17_ubxmdm_lower* priv = + (FAR struct lpc17_ubxmdm_lower*) lower; + lpc17_pinset_t usb_detect_val; + + lpc17_configgpio(priv->pins->reset_n | GPIO_VALUE_ONE); /* Modem not in reset */ + lpc17_configgpio(priv->pins->power_on_n | GPIO_VALUE_ZERO); /* Switch closed to GND */ + usleep(10 * 1000); /* Min. time for power_on_n being low is 5 ms */ + + if (priv->usb_used) + { + usb_detect_val = GPIO_VALUE_ONE; /* USB sense on */ + } + else + { + usb_detect_val = GPIO_VALUE_ZERO; /* USB sense off */ + } + + lpc17_configgpio(priv->pins->usb_detect | usb_detect_val); + + lpc17_configgpio(priv->pins->ldo_enable | GPIO_VALUE_ONE); /* LDO enabled */ + usleep(1 * 1000); /* Delay to obtain correct voltage on shifters */ + + lpc17_configgpio(priv->pins->shifter_en_n | GPIO_VALUE_ZERO); /* UART shifter enabled */ +/* lpc17_configgpio(priv->pins->power_on_n | GPIO_VALUE_ONE); * Stop current through switch */ + + return OK; +} + +static int lpc17_poweroff(FAR struct ubxmdm_lower* lower) +{ + FAR struct lpc17_ubxmdm_lower* priv = + (FAR struct lpc17_ubxmdm_lower*) lower; + + lpc17_configgpio(priv->pins->ldo_enable | GPIO_VALUE_ZERO); /* LDO disabled */ + lpc17_configgpio(priv->pins->reset_n | GPIO_VALUE_ONE); /* Modem not in reset */ + lpc17_configgpio(priv->pins->power_on_n | GPIO_VALUE_ONE); /* Switch open */ + lpc17_configgpio(priv->pins->shifter_en_n | GPIO_VALUE_ONE); /* UART shifter disabled */ + lpc17_configgpio(priv->pins->usb_detect | GPIO_VALUE_ZERO); /* USB sense off */ + + return OK; +} + +static int lpc17_reset(FAR struct ubxmdm_lower* lower) +{ + FAR struct lpc17_ubxmdm_lower* priv = + (FAR struct lpc17_ubxmdm_lower*) lower; + + lpc17_configgpio(priv->pins->reset_n | GPIO_VALUE_ZERO); /* Modem in reset */ + usleep(75 * 1000); /* The minimum reset_n low time is 50 ms */ + lpc17_configgpio(priv->pins->reset_n | GPIO_VALUE_ONE); /* Modem not in reset */ + + return OK; +} + +static int lpc17_getstatus(FAR struct ubxmdm_lower* lower, + FAR struct ubxmdm_status* status) +{ + FAR struct lpc17_ubxmdm_lower* priv = + (FAR struct lpc17_ubxmdm_lower*) lower; + int i; + + status->on = + lpc17_gpioread(priv->pins->ldo_enable) && + lpc17_gpioread(priv->pins->reset_n) && + !lpc17_gpioread(priv->pins->shifter_en_n); + + DEBUGASSERT(status->register_values_size >= UBXMDM_REGISTER_COUNT); + status->register_values_size = UBXMDM_REGISTER_COUNT; + + for (i = 0; i < UBXMDM_REGISTER_COUNT; i++) + { + strncpy(status->register_values[i].name, + lpc17_ubxmdm_name_pins[i].name, + 3); + status->register_values[i].val = + lpc17_gpioread(lpc17_ubxmdm_name_pins[i].pin); + } + + return OK; +} + +static int lpc17_ioctl(FAR struct ubxmdm_lower* lower, + int cmd, + unsigned long arg) +{ + /* No platform-specific IOCTL at the moment. */ + + return -ENOSYS; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc17_ubxmdm_init + * + * Description: + * Initialize the modem. The modem is initialized and + * registered at '/dev/ubxmdm'. + * + * Input Parameters: + * usb_used - enables the USB sense pin if 'true' + * + * Returned Values: + * None + * + ****************************************************************************/ + +void lpc17_ubxmdm_init(bool usb_used) +{ + FAR struct lpc17_ubxmdm_lower* priv = &lpc17_ubxmdm_lower; + + DEBUGASSERT(priv->ops == NULL && priv->pins == NULL); + + /* Initialize the driver state structure. Here we assume: (1) the state + * structure lies in .bss and was zeroed at reset time. (2) This function + * is only called once so it is never necessary to re-zero the structure. + */ + + priv->ops = &lpc17_ubxmdm_ops; + priv->pins = &lpc17_ubxmdm_pins; + priv->usb_used = usb_used; + + lpc17_poweroff((FAR struct ubxmdm_lower*) priv); + + (void) ubxmdm_register("/dev/ubxmdm", (FAR struct ubxmdm_lower*) priv); +} diff --git a/configs/u-blox-c027/src/lpc17_usbmsc.c b/configs/u-blox-c027/src/lpc17_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..3a4f54d419ada0d24914655b5120fb8204723c57 --- /dev/null +++ b/configs/u-blox-c027/src/lpc17_usbmsc.c @@ -0,0 +1,127 @@ +/**************************************************************************** + * configs/u-blox-c027/src/lpc17_usbmsc.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the LPC17xx MMC/SD SPI block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "lpc17_ssp.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_U_BLOX_C027 +# undef LPC17XX_MMCSDSPIPORTNO +# define LPC17XX_MMCSDSPIPORTNO 0 +# undef LPC17XX_MMCSDSLOTNO +# define LPC17XX_MMCSDSLOTNO 0 +#else + /* Add configuration for new LPC17xx boards here */ + +# error "Unrecognized LPC17xx board" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", LPC17XX_MMCSDSPIPORTNO); + + spi = lpc17_sspbus_initialize(LPC17XX_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + LPC17XX_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + LPC17XX_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + syslog(LOG_INFO, "Binding SPI port %d to MMC/SD slot %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1, LPC17XX_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SPI port %d to MMC/SD slot %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO); + return OK; +} diff --git a/configs/u-blox-c027/src/u-blox-c027.h b/configs/u-blox-c027/src/u-blox-c027.h new file mode 100644 index 0000000000000000000000000000000000000000..577bf4179056c4c2f273b635b5bc73ab36e93d5f --- /dev/null +++ b/configs/u-blox-c027/src/u-blox-c027.h @@ -0,0 +1,103 @@ +/************************************************************************************ + * configs/u-blox-c027/src/u-blox-c027.h + * + * Copyright (C) 2016 Vladimir Komendantskiy. All rights reserved. + * Author: Vladimir Komendantskiy + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_U_BLOX_C027_SRC_U_BLOX_C027_H +#define __CONFIGS_U_BLOX_C027_SRC_U_BLOX_C027_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define C027_LED (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT3 | GPIO_PIN25) + +#define C027_SD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN2) +#ifdef CONFIG_GPIO_IRQ +# define C027_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11) +#else +# define C027_SD_CD (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11) +#endif + +#define GPSADDR (66<<1) /* GPS I2C Address */ +#define GPSBAUD 9600 /* Default GPS Baud Rate */ +#define MDMBAUD 115200 /* Default Modem Baud Rate */ + +#define C027_MDMUSBDET (GPIO_OUTPUT | GPIO_PORT0 | GPIO_PIN7) +#define C027_MDMILVLOE (GPIO_OUTPUT | GPIO_PORT0 | GPIO_PIN8) +#define C027_MDMLVLOE (GPIO_OUTPUT | GPIO_PORT0 | GPIO_PIN9) +#define C027_MDMLDOEN (GPIO_OUTPUT | GPIO_PORT2 | GPIO_PIN5) +#define C027_MDMPWR (GPIO_OUTPUT | GPIO_PORT2 | GPIO_PIN6) +#define C027_MDMGPIO1 (GPIO_INPUT | GPIO_PORT2 | GPIO_PIN7) +#define C027_MDMRST (GPIO_OUTPUT | GPIO_PORT2 | GPIO_PIN8) +#define C027_GPSEN (GPIO_OUTPUT | GPIO_PORT1 | GPIO_PIN29) +#define C027_GPSRST (GPIO_OUTPUT | GPIO_PORT1 | GPIO_PIN18) + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: c027_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the C027 board. + * + ************************************************************************************/ + +void weak_function c027_sspdev_initialize(void); + +#if defined(CONFIG_MODEM_U_BLOX) + +/* + * Initialisation function for the u-blox modem. + */ +void lpc17_ubxmdm_init(bool usb_used); + +#endif /* CONFIG_MODEM_U_BLOX */ + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_U_BLOX_C027_SRC_U_BLOX_C027_H */ diff --git a/configs/u-blox-c027/tools/flash.sh b/configs/u-blox-c027/tools/flash.sh new file mode 100644 index 0000000000000000000000000000000000000000..4faa709ca0eb7e10c5a53e606772cf7a3854808a --- /dev/null +++ b/configs/u-blox-c027/tools/flash.sh @@ -0,0 +1,146 @@ +#!/bin/bash +#################################################################################### +# flash.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +#################################################################################### + +USAGE="$0 " + +echo "############################################################################" +echo "# Assumptions:" +echo "#" +echo "# - Windows 7" +echo "# - LPCXpresso 3.6 installed at /cygdrive/c/nxp/lpcxpresso_3.6" +echo "# - AXF image built with Code Red" +echo "# - LPC1768" +echo "#" +echo "# You will need to edit this is any of the above are false" +echo "#" +echo "############################################################################" +echo "" + +# This is the default install location for binaries on Windows (note that this +# path could change with the Code Red version number) +BINDIR="/cygdrive/c/nxp/lpcxpresso_3.6/bin" +if [ ! -d "${BINDIR}" ]; then + echo "Directory ${BINDIR} does not exist" + exit 1 +fi + +# This is the relative path to the booLPCXpresso utility +BOOTLPC="Scripts/bootLPCXpresso.cmd" +if [ ! -x "${BINDIR}/$BOOTLPC" ]; then + echo "No executable at ${BINDIR}/${BOOTLPC}" + exit 1 +fi + +# BOOTLPC_ARG=winusb # WinXP +BOOTLPC_ARG=hid # Win7 + +# FLASHUTIL="crt_emu_lpc11_13" # for LPC11xx or LPC13xx parts) +FLASHUTIL="crt_emu_cm3_nxp" # for LPC17xx parts +# FLASHUTIL="crt_emu_a7_nxp" # for LPC21/22/23/24 parts) +# FLASHUTIL="crt_emu_a9_nxp" # for LPC31/32 and LPC29xx parts) +# FLASHUTIL="crt_emu_cm3_lmi" # for TI Stellaris LM3S parts + +if [ ! -x "${BINDIR}/${FLASHUTIL}" ]; then + echo "No executable file at ${BINDIR}/${FLASHUTIL}" + exit 1 +fi + +# unset WIRE # for Red Probe+, Red Probe, RDB1768v1, or TI Stellaris evaluation boards +# WIRE="-wire=hi" # for RDB1768v2 without upgraded firmware) +# WIRE="-wire=winusb" # for RDB1768v2 with upgraded firmware) +# WIRE="-wire=winusb" # for LPC-Link on Windows XP) +WIRE="-wire=hid" # for LPC-Link on Windows Vista/Windows 7) + +TARGET=LPC1768 + +# The nuttx directory must be provided as an argument + +NUTTX=$1 +if [ -z "${NUTTX}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +if [ ! -d "${NUTTX}" ]; then + echo "Directory ${NUTTX} does not exist" + echo $USAGE + exit 1 +fi + +# The binary to download: + +if [ ! -f "${NUTTX}/nuttx.axf" ]; then + if [ -f "${NUTTX}/nuttx" ]; then + echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf" + mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf + fi +else + if [ -f "${NUTTX}/nuttx" ]; then + echo "Both ${NUTTX}/nuttx ${NUTTX}/nuttx.axf exist.." + echo " Deleting ${NUTTX}/nuttx.axf" + rm -f ${NUTTX}/nuttx.axf + echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf" + mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf + fi +fi +NUTTXPATH=`cygpath -w "${NUTTX}/nuttx.axf"` + +# First of all boot the LPC-Link using the script: + +cd ${BINDIR} || \ + { echo "Failed to CD to ${BINDIR}"; exit 1; } +./${BOOTLPC} ${BOOTLPC_ARG} || \ + { echo "'${BOOTLPC} ${BOOTLPC_ARG}' Failed"; } + +echo "" +echo "Wait a bit" +echo "5..." +sleep 1 +echo "4..." +sleep 1 +echo "3..." +sleep 1 +echo "2..." +sleep 1 +echo "1..." +sleep 1 +echo "0..." +echo "" + +# Then program the FLASH + +./${FLASHUTIL} ${WIRE} -p${TARGET} -flash-load-exec="${NUTTXPATH}" diff --git a/configs/ubw32/Kconfig b/configs/ubw32/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..5f906fe2333b81b5d069c9f26bdb862097118a81 --- /dev/null +++ b/configs/ubw32/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_UBW32 +endif diff --git a/configs/ubw32/README.txt b/configs/ubw32/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..f126397e544a0bf161b32b2d398b3ec9dba989e9 --- /dev/null +++ b/configs/ubw32/README.txt @@ -0,0 +1,630 @@ +configs/ubw32 README +==================== + +This README file discusses the port of NuttX to the Sparkfun UBW32 board. +This port uses the original v2.5 board which is based on the MicroChip +PIC32MX460F512L. See http://www.sparkfun.com/products/8971. This older +version has been replaced with this board http://www.sparkfun.com/products/9713. +See also http://www.schmalzhaus.com/UBW32/. + +Contents +======== + + PIC32MX460F512L Pin Out + MAX3232 Connection + Toolchains + Loading NuttX with PICkit2 + LEDs + Buttons + PIC32MX Configuration Options + Configurations + +PIC32MX460F512L Pin Out +======================= + + PIC32MX460F512L 100-Pin TQFP (USB) Pin Out. The mapping to the pins on + the PCL Logic board are very simple, each pin is brought out to a connector + label with the PIC32MX460F512L pin number. + + On board logic only manages power, crystal, and USB signals. + + LEFT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) + ---- ---------------------------- ------------------------------------------------------- + PIN NAME Board Connection (omitting pins brought to J3 and J4) + ---- ---------------------------- ------------------------------------------------------- + 1 RG15 + 2 Vdd + 3 PMD5/RE5 + 4 PMD6/RE6 RE6 User switch + 5 PMD7/RE7 RE7 Program switch + 6 T2CK/RC1 + 7 T3CK/RC2 + 8 T4CK/RC3 + 9 T5CK/SDI1/RC4 + 10 SCK2/PMA5/CN8/RG6 + 11 SDI2/PMA4/CN9/RG7 + 12 SDO2/PMA3/CN10/RG8 + 13 MCLR + 14 SS2/PMA2/CN11/RG9 + 15 Vss + 16 Vdd + 17 TMS/RA0 + 18 INT1/RE8 + 19 INT2/RE9 + 20 AN5/C1IN+/VBUSON/CN7/RB5 + 21 AN4/C1IN-/CN6/RB4 + 22 AN3/C2IN+/CN5/RB3 + 23 AN2/C2IN-/CN4/RB2 RB1 ICSP/Debug/IO (J5) pin 6 (labeled B2) + 24 PGEC1/AN1/CN3/RB1 RB1 ICSP/Debug/IO (J5) pin 7 (labeled B1) + 25 PGED1/AN0/CN2/RB0 RB0 ICSP/Debug/IO (J5) pin 8 (labeled B0) + + BOTTOM SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) + ---- ---------------------------- ------------------------------------------------------- + PIN NAME Board Connection (omitting pins brought to J3 and J4) + ---- ---------------------------- ------------------------------------------------------- + 26 PGEC2/AN6/OCFA/RB6 PGC ICSP/Debug/IO (J5) pin 5 (labled PGC) + 27 PGED2/AN7/RB7 PGD ICSP/Debug/IO (J5) pin 4 (labled PGD) + 28 VREF-/CVREF-/PMA7/RA9 + 29 VREF+/CVREF+/PMA6/RA10 + 30 AVdd + 31 AVss + 32 AN8/C1OUT/RB8 + 33 AN9/C2OUT/RB9 + 34 AN10/CVREFOUT/PMA13/RB10 + 35 AN11/PMA12/RB11 + 36 Vss + 37 Vdd + 38 TCK/RA1 + 39 U2RTS/RF13 + 40 U2CTS/RF12 + 41 AN12/PMA11/RB12 + 42 AN13/PMA10/RB13 + 43 AN14/PMALH/PMA1/RB14 + 44 AN15/OCFB/PMALL/PMA0/CN12/RB15 + 45 Vss + 46 Vdd + 47 U1CTS/CN20/RD14 + 48 U1RTS/CN21/RD15 + 49 U2RX/PMA9/CN17/RF4 + 50 U2TX/PMA8/CN18/RF5 + + RIGHT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left) + ---- ---------------------------- ------------------------------------------------------- + PIN NAME Board Connection (omitting pins brought to J3 and J4) + ---- ---------------------------- ------------------------------------------------------- + 75 Vss + 74 SOSCO/T1CK/CN0/RC14 + 73 SOSCI/CN1/RC13 + 72 SDO1/OC1/INT0/RD0 + 71 IC4/PMCS1/PMA14/RD11 + 70 SCK1/IC3/PMCS2/PMA15/RD10 + 69 SS1/IC2/RD9 + 68 RTCC/IC1/RD8 + 67 SDA1/INT4/RA15 + 66 SCL1/INT3/RA14 + 65 Vss + 64 OSC2/CLKO/RC15 + 63 OSC1/CLKI/RC12 + 62 Vdd + 61 TDO/RA5 + 60 TDI/RA4 + 59 SDA2/RA3 + 58 SCL2/RA2 + 57 D+/RG2 D+ Alternate USB (J6) pin 3 (labeled D+) + USB host (JP1) pin + USB Function (Mini B) + 56 D-/RG3 D- Alternate USB (J6) pin 2 (labeled D-) + USB host (JP1) pin + USB Function (Mini B) + 55 VUSB + 54 VBUS VBUS Alternate USB (J6) pin 1 (labeled VBUS) + USB host (JP1) pin + USB Function (Mini B) + Jumper JP1 for USB host functionality + 53 U1TX/RF8 + 52 U1RX/RF2 + 51 USBID/RF3 USBID Alternate USB (J6) pin 4 (labeled ID) + USB Function (Mini B) + Also USB LED + + TOP SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left) + ---- ---------------------------- ------------------------------------------------------- + PIN NAME Board Connection (omitting pins brought to J3 and J4) + ---- ---------------------------- ------------------------------------------------------- + 100 PMD4/RE4 + 99 PMD3/RE3 + 98 PMD2/RE2 RE2 LED1 + 97 TRD0/RG13 + 96 TRD1/RG12 + 95 TRD2/RG14 + 94 PMD1/RE1 RE1 LED2 + 93 PMD0/RE0 RE0 LED3 + 92 TRD3/RA7 + 91 TRCLK/RA6 + 90 PMD8/RG0 + 89 PMD9/RG1 + 88 PMD10/RF1 + 87 PMD11/RF0 + 86 ENVREG + 85 Vcap/Vddcore + 84 PMD15/CN16/RD7 + 83 PMD14/CN15/RD6 + 82 PMRD/CN14/RD5 + 81 OC5/PMWR/CN13/RD4 + 80 PMD13/CN19/RD13 + 79 IC5/PMD12/RD12 + 78 OC4/RD3 + 77 OC3/RD2 + 76 OC2/RD1 + +MAX3232 Connection +================== + + I use a tiny, MAX3232 board that I got from the eBay made by NKC + Electronics (http://www.nkcelectronics.com/). As of this writing, it + is also available here: http://www.nkcelectronics.com/rs232-to-ttl-3v--55v-convert232356.html + + CTS -- Not connected + RTS -- Not connected + TX -- J4 pin 31: U1TX/RF8 + RX -- J4 pin 30: U1RX/RF2 + GND -- J4 pin 40: GND + Vcc -- J4 pin 39: 5V + +Toolchains +========== + + MPLAB/C32 + --------- + + I am using the free, "Lite" version of the PIC32MX toolchain available + for download from the microchip.com web site. I am using the Windows + version. The MicroChip toolchain is the only toolchain currently + supported in these configurations, but it should be a simple matter to + adapt to other toolchains by modifying the Make.defs file include in + each configuration. + + C32 Toolchain Options: + + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW - MicroChip full toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL - MicroChip full toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE - MicroChip "Lite" toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_LITE - MicroChip "Lite" toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_PINGUINOL - Pinquino toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_PINGUINOW - Pinquino toolchain for Windows + CONFIG_MIPS32_TOOLCHAIN_MICROCHIPOPENL - Microchip open toolchain for Linux + CONFIG_MIPS32_TOOLCHAIN_GNU_ELF - General mips-elf toolchain for Linux + + NOTE: The "Lite" versions of the toolchain does not support C++. Also + certain optimization levels are not supported by the "Lite" toolchain. + + MicrochipOpen + ------------- + + An alternative, build-it-yourself toolchain is available here: + http://sourceforge.net/projects/microchipopen/ . These tools were + last updated circa 2010. NOTE: C++ support still not available + in this toolchain. + + Building MicrochipOpen (on Linux) + + 1) Get the build script from this location: + + http://microchipopen.svn.sourceforge.net/viewvc/microchipopen/ccompiler4pic32/buildscripts/trunk/ + + 2) Build the code using the build script, for example: + + ./build.sh -b v105_freeze + + This will check out the selected branch and build the tools. + + 3) Binaries will then be available in a subdirectory with a name something like + pic32-v105-freeze-20120622/install-image/bin (depending on the current data + and the branch that you selected. + + Note that the tools will have the prefix, mypic32- so, for example, the + compiler will be called mypic32-gcc. + + Pinguino mips-elf Toolchain + --------------------------- + + Another option is the mips-elf toolchain used with the Pinguino project. This + is a relatively current mips-elf GCC and should provide free C++ support as + well. This toolchain can be downloded from the Pinguino website: + http://wiki.pinguino.cc/index.php/Main_Page#Download . There is some general + information about using the Pinguino mips-elf toolchain in this thread: + https://groups.yahoo.com/neo/groups/nuttx/conversations/messages/1821 + + See also configs/mirtoo/README.txt. There is an experimental (untested) + configuration for the Mirtoo platform in that directory. + + MPLAB/C32 vs MPLABX/X32 + ----------------------- + + It appears that Microchip is phasing out the MPLAB/C32 toolchain and replacing + it with MPLABX and XC32. At present, the XC32 toolchain is *not* compatible + with the NuttX build scripts. Here are some of the issues that I see when trying + to build with XC32: + + 1) Make.def changes: You have to change the tool prefix: + + -CROSSDEV=pic32- + +CROSSDEV=xc32- + + 2) debug.ld/release.ld: The like expect some things that are not present in + the current linker scripts (or are expected with different names). Here + are some partial fixes: + + Rename: kseg0_progmem to kseg0_program_mem + Rename: kseg1_datamem to kseg1_data_mem + + Even then, there are more warnings from the linker and some undefined symbols + for non-NuttX code that resides in the unused Microchip libraries. See this + email thread at https://groups.yahoo.com/neo/groups/nuttx/conversations/messages/1458 for more + information. You will have to solve at least this undefined symbol problem if + you want to used the XC32 toolchain. + + Windows Native Toolchains + ------------------------- + + NOTE: There are several limitations to using a Windows based toolchain in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + +Loading NuttX with PICkit2 +========================== + + NOTE: You need a PICKit3 if you plan to use the MPLAB debugger! The PICKit2 + can, however, still be used to load programs. Instructions for the PICKit3 + are similar. + + Intel Hex Forma Files: + ---------------------- + + When NuttX is built it will produce two files in the top-level NuttX + directory: + + 1) nuttx - This is an ELF file, and + 2) nuttx.hex - This is an Intel Hex format file. This is controlled by + the setting CONFIG_INTELHEX_BINARY in the .config file. + + The PICkit tool wants an Intel Hex format file to burn into FLASH. However, + there is a problem with the generated nutt.hex: The tool expects the nuttx.hex + file to contain physical addresses. But the nuttx.hex file generated from the + top-level make will have address in the KSEG0 and KSEG1 regions. + + tools/pic32mx/mkpichex: + ---------------------- + + There is a simple tool in the NuttX tools/pic32mx directory that can be + used to solve both issues with the nuttx.hex file. But, first, you must + build the tool: + + cd tools/pic32mx + make + + Now you will have an excecutable file call mkpichex (or mkpichex.exe on + Cygwin). This program will take the nutt.hex file as an input, it will + convert all of the KSEG0 and KSEG1 addresses to physical address, and + it will write the modified file, replacing the original nuttx.hex. + + To use this file, you need to do the following things: + + . ./setenv.sh # Source setenv.sh. Among other this, this script + # will add the NuttX tools/pic32mx directory to your + # PATH variable + make # Build nuttx and nuttx.hex + mkpichex $PWD # Convert addresses in nuttx.hex. $PWD is the path + # to the top-level build directory. It is the only + # required input to mkpichex. + +LEDs +==== + + ----- ----- ------------------------------------------------------------- + LABEL COLOR CONTROL + ----- ----- ------------------------------------------------------------- + USB Green RF3. This could be used by software if USB is not used. + Otherwise, RF3 is used as the USBID signal. + LED1 While RE2, Pulled up. Low value illuminates + LED2 Red RE1, Pulled up. Low value illuminates + LED3 Yellow RE0, Pulled up. Low value illuminates + PWR Blue Illuminated when 5V is present, not controlled by software + + If CONFIG_ARCH_LEDS is defined, then NuttX will control these LEDs as follows: + + ON OFF + ------------------------- ---- ---- ---- ---- ---- ---- + LED1 LED2 LED3 LED1 LED2 LED3 + ------------------------- ---- ---- ---- ---- ---- ---- + LED_STARTED 0 OFF OFF OFF --- --- --- + LED_HEAPALLOCATE 1 ON OFF N/C --- --- --- + LED_IRQSENABLED 2 OFF ON N/C --- --- --- + LED_STACKCREATED 3 ON ON N/C --- --- --- + LED_INIRQ 4 N/C N/C ON N/C N/C OFF + LED_SIGNAL 4 N/C N/C ON N/C N/C OFF + LED_ASSERTION 4 N/C N/C ON N/C N/C OFF + LED_PANIC 5 ON N/C N/C OFF N/C N/C + +Buttons +======= + + RE6 User switch + RE7 Program switch + +PIC32MX Configuration Options +============================= + + General Architecture Settings: + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=mips + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_MIPS=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_MIPS32=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=pic32mx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_PIC32MX460F512L=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=ubw32 + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_UBW32=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0xa0000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + PIC32MX Configuration + + CONFIG_PIC32MX_MVEC - Select muli- vs. single-vectored interrupts + + Individual subsystems can be enabled: + + CONFIG_PIC32MX_WDT - Watchdog timer + CONFIG_PIC32MX_T2 - Timer 2 (Timer 1 is the system time and always enabled) + CONFIG_PIC32MX_T3 - Timer 3 + CONFIG_PIC32MX_T4 - Timer 4 + CONFIG_PIC32MX_T5 - Timer 5 + CONFIG_PIC32MX_IC1 - Input Capture 1 + CONFIG_PIC32MX_IC2 - Input Capture 2 + CONFIG_PIC32MX_IC3 - Input Capture 3 + CONFIG_PIC32MX_IC4 - Input Capture 4 + CONFIG_PIC32MX_IC5 - Input Capture 5 + CONFIG_PIC32MX_OC1 - Output Compare 1 + CONFIG_PIC32MX_OC2 - Output Compare 2 + CONFIG_PIC32MX_OC3 - Output Compare 3 + CONFIG_PIC32MX_OC4 - Output Compare 4 + CONFIG_PIC32MX_OC5 - Output Compare 5 + CONFIG_PIC32MX_I2C1 - I2C 1 + CONFIG_PIC32MX_I2C2 - I2C 2 + CONFIG_PIC32MX_SPI1 - SPI 1 + CONFIG_PIC32MX_SPI2 - SPI 2 + CONFIG_PIC32MX_UART1 - UART 1 + CONFIG_PIC32MX_UART2 - UART 2 + CONFIG_PIC32MX_ADC - ADC 1 + CONFIG_PIC32MX_PMP - Parallel Master Port + CONFIG_PIC32MX_CM1 - Comparator 1 + CONFIG_PIC32MX_CM2 - Comparator 2 + CONFIG_PIC32MX_RTCC - Real-Time Clock and Calendar + CONFIG_PIC32MX_DMA - DMA + CONFIG_PIC32MX_FLASH - FLASH + CONFIG_PIC32MX_USBDEV - USB device + CONFIG_PIC32MX_USBHOST - USB host + + PIC32MX Configuration Settings + DEVCFG0: + CONFIG_PIC32MX_DEBUGGER - Background Debugger Enable. Default 3 (disabled). The + value 2 enables. + CONFIG_PIC32MX_ICESEL - In-Circuit Emulator/Debugger Communication Channel Select + Default 1 (PG2) + CONFIG_PIC32MX_PROGFLASHWP - Program FLASH write protect. Default 0xff (disabled) + CONFIG_PIC32MX_BOOTFLASHWP - Default 1 (disabled) + CONFIG_PIC32MX_CODEWP - Default 1 (disabled) + DEVCFG1: (All settings determined by selections in board.h) + DEVCFG2: (All settings determined by selections in board.h) + DEVCFG3: + CONFIG_PIC32MX_USBIDO - USB USBID Selection. Default 1 if USB enabled + (USBID pin is controlled by the USB module), but 0 (GPIO) otherwise. + CONFIG_PIC32MX_VBUSIO - USB VBUSON Selection (Default 1 if USB enabled + (VBUSON pin is controlled by the USB module, but 0 (GPIO) otherwise. + CONFIG_PIC32MX_WDENABLE - Enabled watchdog on power up. Default 0 (watchdog + can be enabled later by software). + + The priority of interrupts may be specified. The value ranage of + priority is 4-31. The default (16) will be used if these any of these + are undefined. + + CONFIG_PIC32MX_CTPRIO - Core Timer Interrupt + CONFIG_PIC32MX_CS0PRIO - Core Software Interrupt 0 + CONFIG_PIC32MX_CS1PRIO - Core Software Interrupt 1 + CONFIG_PIC32MX_INT0PRIO - External Interrupt 0 + CONFIG_PIC32MX_INT1PRIO - External Interrupt 1 + CONFIG_PIC32MX_INT2PRIO - External Interrupt 2 + CONFIG_PIC32MX_INT3PRIO - External Interrupt 3 + CONFIG_PIC32MX_INT4PRIO - External Interrupt 4 + CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor + CONFIG_PIC32MX_T1PRIO - Timer 1 (System timer) priority + CONFIG_PIC32MX_T2PRIO - Timer 2 priority + CONFIG_PIC32MX_T3PRIO - Timer 3 priority + CONFIG_PIC32MX_T4PRIO - Timer 4 priority + CONFIG_PIC32MX_T5PRIO - Timer 5 priority + CONFIG_PIC32MX_IC1PRIO - Input Capture 1 + CONFIG_PIC32MX_IC2PRIO - Input Capture 2 + CONFIG_PIC32MX_IC3PRIO - Input Capture 3 + CONFIG_PIC32MX_IC4PRIO - Input Capture 4 + CONFIG_PIC32MX_IC5PRIO - Input Capture 5 + CONFIG_PIC32MX_OC1PRIO - Output Compare 1 + CONFIG_PIC32MX_OC2PRIO - Output Compare 2 + CONFIG_PIC32MX_OC3PRIO - Output Compare 3 + CONFIG_PIC32MX_OC4PRIO - Output Compare 4 + CONFIG_PIC32MX_OC5PRIO - Output Compare 5 + CONFIG_PIC32MX_I2C1PRIO - I2C 1 + CONFIG_PIC32MX_I2C2PRIO - I2C 2 + CONFIG_PIC32MX_SPI1PRIO - SPI 1 + CONFIG_PIC32MX_SPI2PRIO - SPI 2 + CONFIG_PIC32MX_UART1PRIO - UART 1 + CONFIG_PIC32MX_UART2PRIO - UART 2 + CONFIG_PIC32MX_CN - Input Change Interrupt + CONFIG_PIC32MX_ADCPRIO - ADC1 Convert Done + CONFIG_PIC32MX_PMPPRIO - Parallel Master Port + CONFIG_PIC32MX_CM1PRIO - Comparator 1 + CONFIG_PIC32MX_CM2PRIO - Comparator 2 + CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor + CONFIG_PIC32MX_RTCCPRIO - Real-Time Clock and Calendar + CONFIG_PIC32MX_DMA0PRIO - DMA Channel 0 + CONFIG_PIC32MX_DMA1PRIO - DMA Channel 1 + CONFIG_PIC32MX_DMA2PRIO - DMA Channel 2 + CONFIG_PIC32MX_DMA3PRIO - DMA Channel 3 + CONFIG_PIC32MX_FCEPRIO - Flash Control Event + CONFIG_PIC32MX_USBPRIO - USB + + PIC32MXx specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + PIC32MXx USB Device Configuration + + PIC32MXx USB Host Configuration (the PIC32MX does not support USB Host) + +Configurations +============== + +Each PIC32MX configuration is maintained in a sub-directory and can be +selected as follow: + + cd tools + ./configure.sh ubw32/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + + This is the NuttShell (NSH) using the NSH startup logic at + apps/examples/nsh. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Serial Output + + The OS test produces all of its test output on the serial console. + This configuration has UART1 enabled as a serial console. + + TX -- J4 pin 31: U1TX/RF8 + RX -- J4 pin 30: U1RX/RF2 + GND -- J4 pin 40: GND + Vcc -- J4 pin 39: 5V + + 3. USB Configuations + + Several USB device configurations can be enabled and included + as NSH built-in built in functions. + + All USB device configurations require the following basic setup in + your NuttX configuration file to enable USB device support: + + CONFIG_USBDEV=y : Enable basic USB device support + CONFIG_PIC32MX_USBDEV=y : Enable PIC32 USB device support + + examples/usbterm - This option can be enabled by adding the + following to the NuttX configuration file: + + CONFIG_EXAMPLES_USBTERM=y + + And by enabling one of the USB serial devices: + + CONFIG_PL2303=y : Enable the Prolifics PL2303 emulation + CONFIG_CDCACM=y : or the CDC/ACM serial driver (not both) + + system/cdcacm - The system/cdcacm program can be included as an + function by adding the following to the NuttX configuration file: + + CONFIG_SYSTEM_CDCACM=y + + and defining the following in your .config file: + + CONFIG_CDCACM=y : Enable the CDCACM device diff --git a/configs/ubw32/include/board.h b/configs/ubw32/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..df2130cbf89c7a1bc6bdb07d00b21ea258e12ddc --- /dev/null +++ b/configs/ubw32/include/board.h @@ -0,0 +1,187 @@ +/**************************************************************************** + * configs/ubw32/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_UBW32_INCLUDE_BOARD_H +#define __CONFIGS_UBW32_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Clocking *****************************************************************/ +/* Crystal frequencies */ + +#define BOARD_POSC_FREQ 8000000 /* Primary OSC XTAL frequency (8MHz) */ +#define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) + * (Not present on my board) */ + +/* Oscillator modes */ + +#define BOARD_FNOSC_POSCPLL 1 /* Use primary oscillator w/PLL */ +#define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */ + +/* PLL configuration and resulting CPU clock. + * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV + */ + +#define BOARD_PLL_INPUT BOARD_POSC_FREQ +#define BOARD_PLL_IDIV 2 /* PLL input divider */ +#define BOARD_PLL_MULT 20 /* PLL multiplier */ +#define BOARD_PLL_ODIV 1 /* PLL output divider */ + +#define BOARD_CPU_CLOCK 80000000 /* CPU clock (80MHz = 8MHz * 20 / 2) */ + +/* USB PLL configuration. + * USB_CLOCK = ((POSC_XTAL / IDIV) * 24) / 2 + */ + +#define BOARD_UPLL_IDIV 2 /* USB PLL divider (revisit) */ +#define BOARD_USB_CLOCK 48000000 /* USB clock (8MHz / 2) * 24 / 2) */ + +/* Peripheral clock is divided down from CPU clock. + * PBCLOCK = CPU_CLOCK / PBDIV + */ + +#define BOARD_PBDIV 2 /* Peripheral clock divisor (PBDIV) */ +#define BOARD_PBCLOCK 40000000 /* Peripheral clock (PBCLK = 80MHz/2) */ + +/* Watchdog pre-scaler (re-visit) */ + +#define BOARD_WD_ENABLE 0 /* Watchdog is disabled */ +#define BOARD_WD_PRESCALER 8 /* Watchdog pre-scaler */ + +/* LED definitions **********************************************************/ +/* ----- ----- ------------------------------------------------------------- + * LABEL COLOR CONTROL + * ----- ----- ------------------------------------------------------------- + * USB Green RF3. This could be used by software if USB is not used. + * Otherwise, RF3 is used as the USBID signal. + * LED1 While RE2, Pulled up. Low value illuminates + * LED2 Red RE1, Pulled up. Low value illuminates + * LED3 Yellow RE0, Pulled up. Low value illuminates + * PWR Blue Illuminated when 5V is present, not controlled by software + */ + +/* LED index values for use with board_userled() */ + +#define PIC32MX_UBW32_LED1 0 +#define PIC32MX_UBW32_LED2 1 +#define PIC32MX_UBW32_LED3 2 +#define PIC32MX_UBW32_NLEDS 3 + +/* LED bits for use with board_userled_all() */ + +#define PIC32MX_UBW32_LED1_BIT (1 << PIC32MX_UBW32_LED1) +#define PIC32MX_UBW32_LED2_BIT (1 << PIC32MX_UBW32_LED2) +#define PIC32MX_UBW32_LED3_BIT (1 << PIC32MX_UBW32_LED3) + +/* If CONFIG_ARCH_LEDS is defined, then NuttX will control these LEDs as follows: + * + * ON OFF + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED1 LED2 LED3 LED1 LED2 LED3 + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED_STARTED 0 OFF OFF OFF --- --- --- + * LED_HEAPALLOCATE 1 ON OFF N/C --- --- --- + * LED_IRQSENABLED 2 OFF ON N/C --- --- --- + * LED_STACKCREATED 3 ON ON N/C --- --- --- + * LED_INIRQ 4 N/C N/C ON N/C N/C OFF + * LED_SIGNAL 4 N/C N/C ON N/C N/C OFF + * LED_ASSERTION 4 N/C N/C ON N/C N/C OFF + * LED_PANIC 5 ON N/C N/C OFF N/C N/C + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 4 +#define LED_ASSERTION 4 +#define LED_PANIC 5 + +#define LED_NVALUES 6 + +/* The UBW32 board has three buttons. + * + * PROGRAM RE7 Pulled high, Grounded/low when depressed + * USER RE6 Pulled high, Grounded/low when depressed + * RESET Not software accessible + */ + +#define BUTTON_PROGRAM 0 +#define BUTTON_USER 1 +#define NUM_BUTTONS 2 + +#define BUTTON_PROGRAM_BIT (1 << BUTTON_PROGRAM) +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_UBW32_INCLUDE_BOARD_H */ diff --git a/configs/ubw32/nsh/Make.defs b/configs/ubw32/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..236169bdca8474c5bb82e015bca61c2bde9cf9fe --- /dev/null +++ b/configs/ubw32/nsh/Make.defs @@ -0,0 +1,100 @@ +############################################################################ +# configs/ubw32/nsh/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/mips/src/mips32/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/ubw32/nsh/defconfig b/configs/ubw32/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c97c791aa5c121415301c0f3992c7c4394938e4f --- /dev/null +++ b/configs/ubw32/nsh/defconfig @@ -0,0 +1,878 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +CONFIG_ARCH_MIPS=y +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="mips" +CONFIG_ARCH_FAMILY="mips32" +CONFIG_ARCH_CHIP="pic32mx" +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_ARCH_CHIP_PIC32MX=y +# CONFIG_ARCH_CHIP_PIC32MZ is not set +CONFIG_ARCH_MIPS32=y +CONFIG_ARCH_MIPS_24KC=y +# CONFIG_ARCH_MIPS_M14K is not set +# CONFIG_ARCH_HAVE_MICROMIPS is not set + +# +# MIPS32 Configuration Options +# +# CONFIG_MIPS32_TOOLCHAIN_GNU_ELF is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_XC32 is not set +# CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW is not set +CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE=y +# CONFIG_MIPS32_TOOLCHAIN_PINGUINOW is not set +# CONFIG_MIPS32_FRAMEPOINTER is not set + +# +# PIC32MX Configuration Options +# +# CONFIG_ARCH_CHIP_PIC32MX110F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX110F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX120F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX130F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX150F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016B is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016C is not set +# CONFIG_ARCH_CHIP_PIC32MX210F016D is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032B is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032C is not set +# CONFIG_ARCH_CHIP_PIC32MX220F032D is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064B is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064C is not set +# CONFIG_ARCH_CHIP_PIC32MX230F064D is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128B is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128C is not set +# CONFIG_ARCH_CHIP_PIC32MX250F128D is not set +# CONFIG_ARCH_CHIP_PIC32MX320F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX320F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX340F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX360F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX420F032H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX440F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX440F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX460F256L is not set +CONFIG_ARCH_CHIP_PIC32MX460F512L=y +# CONFIG_ARCH_CHIP_PIC32MX534F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX534F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX564F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX575F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F064L is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX664F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX675F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX695F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128H is not set +# CONFIG_ARCH_CHIP_PIC32MX764F128L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F256L is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX775F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512H is not set +# CONFIG_ARCH_CHIP_PIC32MX795F512L is not set +# CONFIG_ARCH_CHIP_PIC32MX1 is not set +# CONFIG_ARCH_CHIP_PIC32MX2 is not set +# CONFIG_ARCH_CHIP_PIC32MX3 is not set +CONFIG_ARCH_CHIP_PIC32MX4=y +# CONFIG_ARCH_CHIP_PIC32MX5 is not set +# CONFIG_ARCH_CHIP_PIC32MX6 is not set +# CONFIG_ARCH_CHIP_PIC32MX7 is not set +# CONFIG_PIC32MX_MVEC is not set +# CONFIG_PIC32MX_SPI is not set +CONFIG_PIC32MX_T1=y + +# +# PIC32MX Peripheral Support +# +# CONFIG_PIC32MX_WDT is not set +# CONFIG_PIC32MX_T2 is not set +# CONFIG_PIC32MX_T3 is not set +# CONFIG_PIC32MX_T4 is not set +# CONFIG_PIC32MX_T5 is not set +# CONFIG_PIC32MX_IC1 is not set +# CONFIG_PIC32MX_IC2 is not set +# CONFIG_PIC32MX_IC3 is not set +# CONFIG_PIC32MX_IC4 is not set +# CONFIG_PIC32MX_IC5 is not set +# CONFIG_PIC32MX_OC1 is not set +# CONFIG_PIC32MX_OC2 is not set +# CONFIG_PIC32MX_OC3 is not set +# CONFIG_PIC32MX_OC4 is not set +# CONFIG_PIC32MX_OC5 is not set +# CONFIG_PIC32MX_I2C1 is not set +# CONFIG_PIC32MX_I2C2 is not set +# CONFIG_PIC32MX_I2C3 is not set +# CONFIG_PIC32MX_I2C4 is not set +# CONFIG_PIC32MX_I2C5 is not set +# CONFIG_PIC32MX_SPI1 is not set +# CONFIG_PIC32MX_SPI2 is not set +# CONFIG_PIC32MX_SPI3 is not set +# CONFIG_PIC32MX_SPI4 is not set +CONFIG_PIC32MX_UART1=y +# CONFIG_PIC32MX_UART2 is not set +# CONFIG_PIC32MX_UART3 is not set +# CONFIG_PIC32MX_UART4 is not set +# CONFIG_PIC32MX_UART5 is not set +# CONFIG_PIC32MX_UART6 is not set +# CONFIG_PIC32MX_ADC is not set +# CONFIG_PIC32MX_PMP is not set +# CONFIG_PIC32MX_CM1 is not set +# CONFIG_PIC32MX_CM2 is not set +# CONFIG_PIC32MX_CM3 is not set +# CONFIG_PIC32MX_RTCC is not set +# CONFIG_PIC32MX_DMA is not set +# CONFIG_PIC32MX_FLASH is not set +# CONFIG_PIC32MX_USBDEV is not set +# CONFIG_PIC32MX_USBHOST is not set +# CONFIG_PIC32MX_CAN1 is not set +# CONFIG_PIC32MX_CAN2 is not set +# CONFIG_PIC32MX_ETHERNET is not set +# CONFIG_PIC32MX_CTMU is not set + +# +# PIC32MX Peripheral Interrupt Priorities +# +CONFIG_PIC32MX_CTPRIO=16 +CONFIG_PIC32MX_CS0PRIO=16 +CONFIG_PIC32MX_CS1PRIO=16 +CONFIG_PIC32MX_INT0PRIO=16 +CONFIG_PIC32MX_INT1PRIO=16 +CONFIG_PIC32MX_INT2PRIO=16 +CONFIG_PIC32MX_INT3PRIO=16 +CONFIG_PIC32MX_INT4PRIO=16 +CONFIG_PIC32MX_T1PRIO=16 +CONFIG_PIC32MX_UART1PRIO=16 + +# +# Device Configuration 0 (DEVCFG0) +# +CONFIG_PIC32MX_DEBUGGER=2 +CONFIG_PIC32MX_ICESEL=1 +CONFIG_PIC32MX_PROGFLASHWP=0xff +CONFIG_PIC32MX_BOOTFLASHWP=1 +CONFIG_PIC32MX_CODEWP=1 + +# +# Device Configuration 1 (DEVCFG1) +# + +# +# Device Configuration 3 (DEVCFG3) +# +CONFIG_PIC32MX_USBIDO=0 +CONFIG_PIC32MX_VBUSIO=0 +# CONFIG_PIC32MX_WDENABLE is not set +CONFIG_PIC32MX_FETHIO=1 +CONFIG_PIC32MX_FMIIEN=1 + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +CONFIG_ARCH_VECNOTIRQ=y +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +# CONFIG_ARCH_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8079 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0xa0000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_PCBLOGICPIC32MX is not set +CONFIG_ARCH_BOARD_UBW32=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="ubw32" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=4 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ubw32/nsh/setenv.sh b/configs/ubw32/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ca5a097a3ff802ce82b1978dcc4c417c15d708c4 --- /dev/null +++ b/configs/ubw32/nsh/setenv.sh @@ -0,0 +1,61 @@ +#!/bin/bash +# configs/ubw32/nsh/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +# This is the Cygwin path to the location where I installed the MicroChip +# PIC32MX toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install a different version of if you install +# the Linux PIC32MX toolchain as well +export TOOLCHAIN_BIN="/cygdrive/c/MicroChip/mplabc32/v1.12/bin" + +# This is the path to the toosl subdirectory +export PIC32TOOL_DIR="${WD}/tools/pic32mx" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${PIC32TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/ubw32/scripts/ld.script b/configs/ubw32/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..c25820b1154996e25261e8b8b8a9b1ae963ad54e --- /dev/null +++ b/configs/ubw32/scripts/ld.script @@ -0,0 +1,317 @@ +/**************************************************************************** + * configs/ubw32/scripts/ld.script + * + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MX460F512L has 512Kb of program FLASH at physical address + * 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 512K + + /* The PIC32MX460F512L has 12Kb of boot FLASH at physical address + * 0x1fc00000. The initial reset vector is in KSEG1, but all other + * accesses are in KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 8192-1168 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16 + + /* The PIC32MX460F512L has 32Kb of data memory at physical address + * 0x00000000. Since the PIC32MX has no data cache, this memory is + * always accessed through KSEG1. + * + * When used with MPLAB, we need to set aside 512 bytes of memory + * for use by MPLAB. + */ + + kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(pic32mx) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/configs/ubw32/src/.gitignore b/configs/ubw32/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/ubw32/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/ubw32/src/Makefile b/configs/ubw32/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..e3703b648911e60e3f7aa29987153f312cf3b697 --- /dev/null +++ b/configs/ubw32/src/Makefile @@ -0,0 +1,56 @@ +############################################################################ +# configs/ubw32/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = pic32_boot.c pic32_leds.c + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += pic32_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += pic32_appinit.c +endif + +ifeq ($(CONFIG_PIC32MX_USBDEV),y) +CSRCS += pic32_usbdev.c +ifeq ($(CONFIG_EXAMPLES_USBTERM_DEVINIT),y) +CSRCS += pic32_usbterm.c +endif +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/ubw32/src/pic32_appinit.c b/configs/ubw32/src/pic32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..612e3aa70f9452706742be8925d1fad43458ffb2 --- /dev/null +++ b/configs/ubw32/src/pic32_appinit.c @@ -0,0 +1,104 @@ +/**************************************************************************** + * config/ubw32/src/pic32_appinit.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "pic32mx.h" +#include "ubw32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nsh_usbdevinitialize + * + * Description: + * Initialize SPI-based microSD. + * + ****************************************************************************/ + +#ifdef CONFIG_USBDEV +static int nsh_usbdevinitialize(void) +{ + /* The UBW32 has no way to know when the USB is connected. So we will fake + * it and tell the USB driver that the USB is connected now. + */ + + pic32mx_usbattach(); + return OK; +} +#else +# define nsh_usbdevinitialize() (OK) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + int ret; + + /* Initialize USB device */ + + ret = nsh_usbdevinitialize(); + return ret; +} diff --git a/configs/ubw32/src/pic32_boot.c b/configs/ubw32/src/pic32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..dec8a33ab7c8f73a6238be45ffb2577d597c24d1 --- /dev/null +++ b/configs/ubw32/src/pic32_boot.c @@ -0,0 +1,92 @@ +/************************************************************************************ + * configs/ubw32/src/pic32_boot.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "pic32mx.h" +#include "ubw32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_boardinitialize + * + * Description: + * All PIC32MX architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void pic32mx_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) at least one SPI is enabled, and 2) the weak + * function pic32mx_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_PIC32MX_SPI1) || defined(CONFIG_PIC32MX_SPI2) + if (pic32mx_spidev_initialize) + { + pic32mx_spidev_initialize(); + } +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + pic32mx_led_initialize(); +#endif +} diff --git a/configs/ubw32/src/pic32_buttons.c b/configs/ubw32/src/pic32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..290832c3690b8d8c2dc89a88f77cf9340ff897dd --- /dev/null +++ b/configs/ubw32/src/pic32_buttons.c @@ -0,0 +1,201 @@ +/**************************************************************************** + * configs/ubw32/src/pic32_buttons.c + * + * Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "pic32mx.h" +#include "ubw32.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* The UBW32 board has three buttons. + * + * PROGRAM RE7 Pulled high, Grounded/low when depressed + * USER RE6 Pulled high, Grounded/low when depressed + * RESET Not software accessible + */ + +#define GPIO_PROGRAM (GPIO_INPUT|GPIO_INT|GPIO_PORTE|GPIO_PIN7) +#define GPIO_USER (GPIO_INPUT|GPIO_INT|GPIO_PORTE|GPIO_PIN6) + +/* Change notification numbers: + * + * RE7 -> No change notification associated with RE7 + * RE6 -> No change notification associated with RE6 + */ + +#define CN_PROGRAM +#define CN_USER + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Pin configuration for each button */ + +static const uint16_t g_buttonset[NUM_BUTTONS] = +{ + GPIO_PROGRAM GPIO_USER +} + +/* Change notification number for each button */ + +#ifdef CONFIG_ARCH_IRQBUTTONS +static const uint8_t g_buttoncn[NUM_BUTTONS] = +{ + CN_PROGRAM, CN_USER +} +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure input pins */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + pic32mx_configgpio(g_buttonset[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int id; + + /* Configure input pins */ + + for (id = 0; id < NUM_BUTTONS; id++) + { + if (pic32mx_gpioread(g_buttonset[id])) + { + ret |= (1 << id); + } + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT definitions in + * board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration value. The + * previous interrupt handler address is returned (so that it may restored, if + * so desired). + * + * Interrupts are automatically enabled when the button handler is attached and + * automatically disabled when the button handler is detached. + * + * When an interrupt occurs, it is due to a change on the GPIO input pin + * associated with the button. In that case, all attached change + * notification handlers will be called. Each handler must maintain state + * and determine if the unlying GPIO button input value changed. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id < NUM_BUTTONS) + { + pic32mx_gpioirqdisable(g_buttoncn[id]); + oldhandler = pic32mx_gpioattach(g_buttonset[id], g_buttoncn[id], irqhandler); + if (irqhandler) + { + pic32mx_gpioirqenable(g_buttoncn[id]); + } + } + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/ubw32/src/pic32_leds.c b/configs/ubw32/src/pic32_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..a4884c2d33da031ea75edafff2811eaeca2a7019 --- /dev/null +++ b/configs/ubw32/src/pic32_leds.c @@ -0,0 +1,283 @@ +/**************************************************************************** + * configs/ubw32/src/pic32_leds.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "pic32mx.h" +#include "ubw32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED Configuration ********************************************************/ +/* ----- ----- ------------------------------------------------------------- + * LABEL COLOR CONTROL + * ----- ----- ------------------------------------------------------------- + * USB Green RF3. This could be used by software if USB is not used. + * Otherwise, RF3 is used as the USBID signal. + * LED1 While RE2, Pulled up. Low value illuminates + * LED2 Red RE1, Pulled up. Low value illuminates + * LED3 Yellow RE0, Pulled up. Low value illuminates + * PWR Blue Illuminated when 5V is present, not controlled by software + * + * If CONFIG_ARCH_LEDS is defined, then NuttX will control these LEDs as follows: + * + * ON OFF + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED1 LED2 LED3 LED1 LED2 LED3 + * ------------------------- ---- ---- ---- ---- ---- ---- + * LED_STARTED 0 OFF OFF OFF --- --- --- + * LED_HEAPALLOCATE 1 ON OFF N/C --- --- --- + * LED_IRQSENABLED 2 OFF ON N/C --- --- --- + * LED_STACKCREATED 3 ON ON N/C --- --- --- + * LED_INIRQ 4 N/C N/C ON N/C N/C OFF + * LED_SIGNAL 4 N/C N/C ON N/C N/C OFF + * LED_ASSERTION 4 N/C N/C ON N/C N/C OFF + * LED_PANIC 5 ON N/C N/C OFF N/C N/C + */ + +#define GPIO_LED_1 (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTE|GPIO_PIN2) +#define GPIO_LED_2 (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTE|GPIO_PIN1) +#define GPIO_LED_3 (GPIO_OUTPUT|GPIO_VALUE_ZERO|GPIO_PORTE|GPIO_PIN0) + +/* LED Management Definitions ***********************************************/ + +#ifdef CONFIG_ARCH_LEDS +# define LED_OFF 0 +# define LED_ON 1 +# define LED_NC 2 +#endif + +/* Debug ********************************************************************/ + +#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_LEDS) +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# undef CONFIG_DEBUG_LEDS +# undef CONFIG_DEBUG_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private types + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +struct led_setting_s +{ + uint8_t led1 : 2; + uint8_t led2 : 2; + uint8_t led3 : 2; + uint8_t unused : 2; +}; +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* If CONFIG_ARCH_LEDS is defined then NuttX will control the LEDs. The + * following structures identified the LED settings for each NuttX LED state. + */ + +#ifdef CONFIG_ARCH_LEDS +static const struct led_setting_s g_ledonvalues[LED_NVALUES] = +{ + {LED_OFF, LED_OFF, LED_OFF, LED_OFF}, + {LED_ON, LED_OFF, LED_NC, LED_OFF}, + {LED_OFF, LED_ON, LED_NC, LED_OFF}, + {LED_ON, LED_ON, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_ON, LED_OFF}, + {LED_ON, LED_NC, LED_NC, LED_OFF}, +}; + +static const struct led_setting_s g_ledoffvalues[LED_NVALUES] = +{ + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_NC, LED_OFF}, + {LED_NC, LED_NC, LED_OFF, LED_OFF}, + {LED_OFF, LED_NC, LED_NC, LED_OFF}, +}; + +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + * any way. The following array simply maps the PIC32MX_UBW32_LEDn + * index values to the correct LED pin configuration. + */ + +#else +static const uint16_t g_ledpincfg[PIC32MX_UBW32_NLEDS] = +{ + GPIO_LED_1, GPIO_LED_2, GPIO_LED_3 +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pic32mx_setleds + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +static void pic32mx_setleds(FAR const struct led_setting_s *setting) +{ + if (setting->led1 != LED_NC) + { + pic32mx_gpiowrite(GPIO_LED_1, setting->led1 == LED_ON); + } + + if (setting->led2 != LED_NC) + { + pic32mx_gpiowrite(GPIO_LED_2, setting->led2 == LED_ON); + } + + if (setting->led3 != LED_NC) + { + pic32mx_gpiowrite(GPIO_LED_3, setting->led3 == LED_ON); + } +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled_initialize(void) +{ + /* Configure output pins */ + + pic32mx_configgpio(GPIO_LED_1); + pic32mx_configgpio(GPIO_LED_2); + pic32mx_configgpio(GPIO_LED_3); +} +#endif + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < PIC32MX_UBW32_NLEDS) + { + pic32mx_gpiowrite(g_ledpincfg[led], ledon); + } +} +#endif + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +void board_userled_all(uint8_t ledset) +{ + board_userled(PIC32MX_UBW32_LED1, (ledset & PIC32MX_UBW32_LED1_BIT) != 0); + board_userled(PIC32MX_UBW32_LED2, (ledset & PIC32MX_UBW32_LED2_BIT) != 0); + board_userled(PIC32MX_UBW32_LED3, (ledset & PIC32MX_UBW32_LED3_BIT) != 0); +} +#endif + +/**************************************************************************** + * Name: pic32mx_led_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void pic32mx_led_initialize(void) +{ + /* Configure output pins */ + + pic32mx_configgpio(GPIO_LED_1); + pic32mx_configgpio(GPIO_LED_2); + pic32mx_configgpio(GPIO_LED_3); +} +#endif + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_on(int led) +{ + if ((unsigned)led < LED_NVALUES) + { + pic32mx_setleds(&g_ledonvalues[led]); + } +} +#endif + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_off(int led) +{ + if ((unsigned)led < LED_NVALUES) + { + pic32mx_setleds(&g_ledoffvalues[led]); + } +} +#endif diff --git a/configs/ubw32/src/pic32_usbdev.c b/configs/ubw32/src/pic32_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..089a7692aed41bc254771803bda466b896ef4db4 --- /dev/null +++ b/configs/ubw32/src/pic32_usbdev.c @@ -0,0 +1,147 @@ +/************************************************************************************ + * configs/ubw32/src/pic32_usbdev.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include + +#include "pic32mx.h" +#include "ubw32.h" + +#if defined(CONFIG_PIC32MX_USBDEV) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_usbdevinitialize + * + * Description: + * Called to configure the mini-A/B J5 on the UBW32 for the + * USB device + * + ************************************************************************************/ + +void weak_function pic32mx_usbdevinitialize(void) +{ + /* Notes from the Sure Electronics sample code: + * + * "The USB specifications require that USB peripheral devices must never source + * current onto the Vbus pin. Additionally, USB peripherals should not source + * current on D+ or D- when the host/hub is not actively powering the Vbus line. + * When designing a self powered (as opposed to bus powered) USB peripheral + * device, the firmware should make sure not to turn on the USB module and D+ + * or D- pull up resistor unless Vbus is actively powered. Therefore, the + * firmware needs some means to detect when Vbus is being powered by the host. + * A 5V tolerant I/O pin can be connected to Vbus (through a resistor), and + * can be used to detect when Vbus is high (host actively powering), or low + * (host is shut down or otherwise not supplying power). The USB firmware + * can then periodically poll this I/O pin to know when it is okay to turn on + * the USB module/D+/D- pull up resistor. When designing a purely bus powered + * peripheral device, it is not possible to source current on D+ or D- when the + * host is not actively providing power on Vbus. Therefore, implementing this + * bus sense feature is optional. ..." + */ + +#ifdef CONFIG_USBHOST +#endif + + /* "If the host PC sends a GetStatus (device) request, the firmware must respond + * and let the host know if the USB peripheral device is currently bus powered + * or self powered. See chapter 9 in the official USB specifications for details + * regarding this request. If the peripheral device is capable of being both + * self and bus powered, it should not return a hard coded value for this request. + * Instead, firmware should check if it is currently self or bus powered, and + * respond accordingly. If the hardware has been configured like demonstrated + * on the PICDEM FS USB Demo Board, an I/O pin can be polled to determine the + * currently selected power source. ..." + */ + +#ifdef CONFIG_USB_PWRSENSE +#endif +} + +/************************************************************************************ + * Name: pic32mx_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB + * software connect and disconnect), then the board software must provide + * stm32_pullup. See include/nuttx/usb/usbdev.h for additional description + * of this method. Alternatively, if no pull-up GPIO the following EXTERN + * can be redefined to be NULL. + * + ************************************************************************************/ + +int pic32mx_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + /* The UBW32 does not have a USB pull-up */ + + return OK; +} + +/************************************************************************************ + * Name: pic32mx_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver + * is used. This function is called whenever the USB enters or leaves + * suspend mode. This is an opportunity for the board logic to shutdown + * clocks, power, etc. while the USB is suspended. + * + ************************************************************************************/ + +void pic32mx_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + /* Do nothing */ +} + +#endif /* CONFIG_PIC32MX_USBDEV */ diff --git a/configs/ubw32/src/pic32_usbterm.c b/configs/ubw32/src/pic32_usbterm.c new file mode 100644 index 0000000000000000000000000000000000000000..6cfe14a36b7a366576a5c28296ede2120b0bb457 --- /dev/null +++ b/configs/ubw32/src/pic32_usbterm.c @@ -0,0 +1,104 @@ +/**************************************************************************** + * configs/ubw32/src/pic32_usbterm.c + * + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "pic32mx.h" +#include "ubw32.h" + +#if defined(CONFIG_PIC32MX_USBDEV) && defined(CONFIG_EXAMPLES_USBTERM_DEVINIT) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: + * + * Description: + * If CONFIG_EXAMPLES_USBTERM_DEVINIT is defined, then the example will + * call this user provided function as part of its initialization. + * + ****************************************************************************/ + +int usbterm_devinit(void) +{ + /* The UBW32 has no way to know when the USB is connected. So we will fake + * it and tell the USB driver that the USB is connected now. + * + * If examples/usbterm is built as an NSH built-in application, then + * pic32mx_usbattach() will be called in board_app_initialize(). + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS + pic32mx_usbattach(); +#endif + return OK; +} + +/**************************************************************************** + * Name: + * + * Description: + * If CONFIG_EXAMPLES_USBTERM_DEVINIT is defined, then the example will + * call this user provided function as part of its termination sequence. + * + ****************************************************************************/ + +void usbterm_devuninit(void) +{ + /* Tell the USB driver that the USB is no longer connected */ + + pic32mx_usbdetach(); +} + +#endif /* CONFIG_PIC32MX_USBDEV && CONFIG_EXAMPLES_USBTERM_DEVINIT */ diff --git a/configs/ubw32/src/ubw32.h b/configs/ubw32/src/ubw32.h new file mode 100644 index 0000000000000000000000000000000000000000..4a4b4adaa68bc0ac9b4c534b01fd65ed56642f49 --- /dev/null +++ b/configs/ubw32/src/ubw32.h @@ -0,0 +1,102 @@ +/**************************************************************************** + * configs/ubw32/src/ubw32.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_UBW32_SRC_UBW32_H +#define __CONFIGS_UBW32_SRC_UBW32_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Name: pic32mx_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the UBW32 board. + * + ************************************************************************************/ + +#if defined(CONFIG_PIC32MX_SPI1) || defined(CONFIG_PIC32MX_SPI2) +void weak_function pic32mx_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: pic32mx_led_initialize + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void pic32mx_led_initialize(void); +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_UBW32_SRC_UBW32_H */ diff --git a/configs/us7032evb1/Kconfig b/configs/us7032evb1/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..0636ec5e3403c8b3386e5f43a0c4a3b00fd6340b --- /dev/null +++ b/configs/us7032evb1/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_TWR_K60N512 +endif diff --git a/configs/us7032evb1/README.txt b/configs/us7032evb1/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..7a94b1af06c2cf5f872e0f9fa99e2f339d1b00c7 --- /dev/null +++ b/configs/us7032evb1/README.txt @@ -0,0 +1,155 @@ +Status +^^^^^^ + +*** UNSTABLE *** +The port is basically complete and many examples run correctly. However, there +are remaining instabilities that make the port un-usable. The nature of these +is not understood; the behavior is that certain SH-1 instructions stop working +as advertised. This could be a silicon problem, some pipeline issue that is not +handled properly by the gcc 3.4.5 toolchain (which has very limited SH-1 support +to begin with), or perhaps with the CMON debugger. At any rate, I have exhausted +all of the energy that I am willing to put into this cool old processor for the +time being. + +Toolchain +^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the SH toolchain (if + different from the default). + + If you have no SH toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + + 1. You must have already configured Nuttx in nuttx. + + cd tools + ./configure.sh us7032evb1/ + + 2. Download the latest buildroot package into + + 3. unpack + + 4. cd /buildroot + + 5. cp configs/sh-defconfig .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h so that the PATH variable includes the path to the + newly built binaries. + +shterm +^^^^^^ + + The USB7032EVB1 supports CMON in PROM. CMON requires special + serial interactions in order to upload and download program files. + Therefore, a standard terminal emulation program (such as minicom) + cannot be used. + + The shterm subdirectory contains a small terminal emulation + program that supports these special interactions for file transfers. + +Configurations +^^^^^^^^^^^^^^ + +Common Configuration Notes +-------------------------- + + 1. Each SH-1 configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh us7032evb1/ + cd - + . ./setenv.sh + + Where is one of the configuration sub-directories described in + the following paragraph. + + 2. These configurations use the mconf-based configuration tool. To + change a configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 3. By default, all configurations assume that you are building under + Linux (should work under Windows with Cygwin as well). This is + is easily reconfigured: + + CONFIG_HOST_LINUX=y + +Configuration Sub-Directories +----------------------------- + + ostest + + This configuration directory, performs a simple OS test using + examples/ostest. + + nsh + + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables only the serial NSH interfaces. + + NOTE: At present, the NSH example does not run. See the "Status" + discussion above for a full explanation. + +Configuration Options +^^^^^^^^^^^^^^^^^^^^^ + +In additional to the common configuration options listed in the +file configs/README.txt, there are other configuration options +specific to the SH-1 + +Architecture selection + + CONFIG_ARCH - identifies the arch subdirectory and, hence, the + processor architecture. This should be sh (for arch/sh) + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory. + This should be sh1 (for arch/sh/src/sh1 and arch/sh/include/sh1) + CONFIG_ARCH_SH1 and CONFIG_ARCH_CHIP_SH7032 - for use in C code. These + identify the particular chip or SoC that the architecture is + implemented in. + CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence, + the board that supports the particular chip or SoC. This + should be us7032evb1 for (configs/us7032evb1). + CONFIG_ARCH_BOARD_US7032EVB1 - for use in C code + CONFIG_ENDIAN_BIG - the SH-1 usually runs big-endian + CONFIG_ARCH_NOINTC - define if the architecture does not + support an interrupt controller or otherwise cannot support + APIs like up_enable_irq() and up_disable_irq(). Should be + defined. + CONFIG_BOARD_LOOPSPERMSEC - for delay loops + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to SH1_LCEVB1 + CONFIG_RAM_SIZE - Describes the internal DRAM. + CONFIG_RAM_START - The start address of internal DRAM + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_SH1_DMAC0, CONFIG_SH1_DMAC1, CONFIG_SH1_DMAC2, CONFIG_SH1_DMAC3, + CONFIG_SH1_ITU1, CONFIG_SH1_ITU2, CONFIG_SH1_ITU3, CONFIG_SH1_ITU4, + CONFIG_SH1_SCI0, CONFIG_SH1_SCI1, CONFIG_SH1_PCU, CONFIG_SH1_AD, + CONFIG_SH1_WDT, CONFIG_SH1_CMI - Each unused chip block should b + disabled to save space + +SH1 specific device driver settings + + CONFIG_SCIn_SERIAL_CONSOLE - selects the SCIn for the + console and ttys0 (default is the UART0). + CONFIG_SCIn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_SCIn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_SCIn_BAUD - The configure BAUD of the UART. Must be + CONFIG_SCIn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_SCIn_PARTIY - 0=no parity, 1=odd parity, 2=even parity, 3=mark 1, 4=space 0 + CONFIG_SCIn_2STOP - Two stop bits diff --git a/configs/us7032evb1/bin/.gitignore b/configs/us7032evb1/bin/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..658d9ca20af15ae93378b75840107e0b83021390 --- /dev/null +++ b/configs/us7032evb1/bin/.gitignore @@ -0,0 +1,2 @@ +shterm + diff --git a/configs/us7032evb1/include/board.h b/configs/us7032evb1/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..1a8f7bbc280663c464288f3bcf0375f0e4442f62 --- /dev/null +++ b/configs/us7032evb1/include/board.h @@ -0,0 +1,95 @@ +/**************************************************************************** + * configs/us7032evb1/include/board.h + * + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef _CONFIGS_US7032EVB1_BOARD_H +#define _CONFIGS_US7032EVB1_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#ifndef __ASSEMBLY__ +# include +#endif +#include "chip.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +#define SH1_CLOCK 20000000 /* 20 MHz */ + +/* LED definitions **********************************************************/ + +/* The SH1_LPEVB only a single LED controlled by either port A, pin 15, or + * port B, pin 15 (selectable via JP8). + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 1 +#define LED_STACKCREATED 1 +#define LED_INIRQ 0 +#define LED_SIGNAL 0 +#define LED_ASSERTION 0 +#define LED_PANIC 1 + +/* Button definitions *******************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif +#endif + +#endif /* _CONFIGS_US7032EVB1_BOARD_H */ diff --git a/configs/us7032evb1/nsh/Make.defs b/configs/us7032evb1/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..92e31365a8be66c9710e10adcdcb09f3e565a56c --- /dev/null +++ b/configs/us7032evb1/nsh/Make.defs @@ -0,0 +1,84 @@ +############################################################################## +# configs/us7032evb1/nsh/Make.defs +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -Os -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -m1 -fno-builtin +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/ld.script + +CROSSDEV = sh-nuttx-elf- +CC = $(CROSSDEV)gcc +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/us7032evb1/nsh/defconfig b/configs/us7032evb1/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..03a12a8a2803ff7fb932ae1300243fbe5111fdd5 --- /dev/null +++ b/configs/us7032evb1/nsh/defconfig @@ -0,0 +1,671 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +CONFIG_MOTOROLA_SREC=y +CONFIG_RAW_BINARY=y + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +CONFIG_ARCH_SH=y +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sh" +CONFIG_ARCH_CHIP="sh1" +CONFIG_ARCH_CHIP_SH7032=y +# CONFIG_ARCH_CHIP_M30262F8 is not set +CONFIG_ARCH_SH1=y +# CONFIG_ARCH_M16C is not set + +# +# SH-1 Configuration Options +# + +# +# SH-1 Peripheral Selections +# +# CONFIG_SH1_DMAC0 is not set +# CONFIG_SH1_DMAC1 is not set +# CONFIG_SH1_DMAC2 is not set +# CONFIG_SH1_DMAC3 is not set +# CONFIG_SH1_ITU1 is not set +# CONFIG_SH1_ITU2 is not set +# CONFIG_SH1_ITU3 is not set +# CONFIG_SH1_ITU4 is not set +# CONFIG_SH1_SCI0 is not set +CONFIG_SH1_SCI1=y +# CONFIG_SH1_PCU is not set +# CONFIG_SH1_AD is not set +# CONFIG_SH1_WDT is not set +# CONFIG_SH1_CMI is not set + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +CONFIG_ARCH_STACKDUMP=y +CONFIG_ENDIAN_BIG=y +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=572 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0a002000 +CONFIG_RAM_SIZE=57344 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_US7032EVB1=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="us7032evb1" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=10 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=8 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +CONFIG_ARCH_HAVE_SCI1=y +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SCI1_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# SCI1 Configuration +# +CONFIG_SCI1_RXBUFSIZE=256 +CONFIG_SCI1_TXBUFSIZE=256 +CONFIG_SCI1_BAUD=9600 +CONFIG_SCI1_BITS=8 +CONFIG_SCI1_PARITY=0 +CONFIG_SCI1_2STOP=0 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_CONSOLE=y + +# +# USB Trace Support +# +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/us7032evb1/nsh/ld.script b/configs/us7032evb1/nsh/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..e21bdfa006f8cc620cfcbb1c999b098a627cc6f5 --- /dev/null +++ b/configs/us7032evb1/nsh/ld.script @@ -0,0 +1,91 @@ +/**************************************************************************** + * configs/us7032evb1/nsh/ld.script + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_ARCH(sh) +ENTRY(_stext) +SECTIONS +{ + /* The us7032evb1 has CMON in PROM beginning at address 0x00000000 and + * either 64Kb or 256Kb of SRAM beginning at 0x0a000000. Neither the + * PROM nor the first 8Kb of SRAM are avaible to the devoleper as these + * are used by CMON. The next 1Kb of SRAM is dedicated to relocated + * interrupt vectors. + */ + + . = 0x0a002000; + .text : { + _svect = ABSOLUTE(.); + *(.vects); /* Relocated interrupt vectors */ + _evect = ABSOLUTE(.); + _stext = ABSOLUTE(.); + *(.reset) /* Reset/IRQ code */ + *(.text) /* Code */ + *(.fixup) + *(.gnu.warning) + *(.rodata) /* Read-only data */ + *(.rodata.str1.4) + *(.glue_7) + *(.glue_7t) + *(.got) /* Global offset table */ + _etext = ABSOLUTE(.); + } + + .data : { + _sdata = ABSOLUTE(.); + *(.data) /* Modifiable data */ + CONSTRUCTORS + _edata = ABSOLUTE(.); + } + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss) + *(COMMON) + _ebss = ABSOLUTE(.); + } + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/us7032evb1/nsh/setenv.sh b/configs/us7032evb1/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..d2313361286ea6661f885d9e519a78c23fa3f46f --- /dev/null +++ b/configs/us7032evb1/nsh/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/us7032evb1/nsh/setenv.sh +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +WD=`pwd` +export BUILDROOT_BIN=${WD}/../buildroot/build_sh/staging_dir/bin +export SH1BINARIES=$WD/configs/us7032evb1/bin +export PATH=${BUILDROOT_BIN}:${SH1BINARIES}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/us7032evb1/ostest/Make.defs b/configs/us7032evb1/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..595a886a0cbdd532df04bb3d30f4aa5240016e49 --- /dev/null +++ b/configs/us7032evb1/ostest/Make.defs @@ -0,0 +1,84 @@ +############################################################################## +# configs/us7032evb1/ostest/Make.defs +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -Os -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -m1 -fno-builtin +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script + +CROSSDEV = sh-nuttx-elf- +CC = $(CROSSDEV)gcc +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/us7032evb1/ostest/defconfig b/configs/us7032evb1/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ec108a9870e610d376f8afbc4b8cdd4d94b9a252 --- /dev/null +++ b/configs/us7032evb1/ostest/defconfig @@ -0,0 +1,601 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +CONFIG_MOTOROLA_SREC=y +CONFIG_RAW_BINARY=y + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +CONFIG_ARCH_SH=y +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sh" +CONFIG_ARCH_CHIP="sh1" +CONFIG_ARCH_CHIP_SH7032=y +# CONFIG_ARCH_CHIP_M30262F8 is not set +CONFIG_ARCH_SH1=y +# CONFIG_ARCH_M16C is not set + +# +# SH-1 Configuration Options +# + +# +# SH-1 Peripheral Selections +# +# CONFIG_SH1_DMAC0 is not set +# CONFIG_SH1_DMAC1 is not set +# CONFIG_SH1_DMAC2 is not set +# CONFIG_SH1_DMAC3 is not set +# CONFIG_SH1_ITU1 is not set +# CONFIG_SH1_ITU2 is not set +# CONFIG_SH1_ITU3 is not set +# CONFIG_SH1_ITU4 is not set +# CONFIG_SH1_SCI0 is not set +CONFIG_SH1_SCI1=y +# CONFIG_SH1_PCU is not set +# CONFIG_SH1_AD is not set +# CONFIG_SH1_WDT is not set +# CONFIG_SH1_CMI is not set + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +CONFIG_ARCH_STACKDUMP=y +CONFIG_ENDIAN_BIG=y +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=572 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0a002000 +CONFIG_RAM_SIZE=57344 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_US7032EVB1=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="us7032evb1" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=10 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=8 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +CONFIG_ARCH_HAVE_SCI1=y +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_SCI1_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# SCI1 Configuration +# +CONFIG_SCI1_RXBUFSIZE=256 +CONFIG_SCI1_TXBUFSIZE=256 +CONFIG_SCI1_BAUD=9600 +CONFIG_SCI1_BITS=8 +CONFIG_SCI1_PARITY=0 +CONFIG_SCI1_2STOP=0 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=4096 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/us7032evb1/ostest/ld.script b/configs/us7032evb1/ostest/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..36c9b0d9a8d0bcb0fce5c3504740921e94b804d1 --- /dev/null +++ b/configs/us7032evb1/ostest/ld.script @@ -0,0 +1,91 @@ +/**************************************************************************** + * configs/us7032evb1/ostest/ld.script + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_ARCH(sh) +ENTRY(_stext) +SECTIONS +{ + /* The us7032evb1 has CMON in PROM beginning at address 0x00000000 and + * either 64Kb or 256Kb of SRAM beginning at 0x0a000000. Neither the + * PROM nor the first 8Kb of SRAM are avaible to the devoleper as these + * are used by CMON. The next 1Kb of SRAM is dedicated to relocated + * interrupt vectors. + */ + + . = 0x0a002000; + .text : { + _svect = ABSOLUTE(.); + *(.vects); /* Relocated interrupt vectors */ + _evect = ABSOLUTE(.); + _stext = ABSOLUTE(.); + *(.reset) /* Reset/IRQ code */ + *(.text) /* Code */ + *(.fixup) + *(.gnu.warning) + *(.rodata) /* Read-only data */ + *(.rodata.str1.4) + *(.glue_7) + *(.glue_7t) + *(.got) /* Global offset table */ + _etext = ABSOLUTE(.); + } + + .data : { + _sdata = ABSOLUTE(.); + *(.data) /* Modifiable data */ + CONSTRUCTORS + _edata = ABSOLUTE(.); + } + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss) + *(COMMON) + _ebss = ABSOLUTE(.); + } + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/us7032evb1/ostest/setenv.sh b/configs/us7032evb1/ostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ac37e9150f6fc91ae7856171599c7c9034815412 --- /dev/null +++ b/configs/us7032evb1/ostest/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/us7032evb1/ostest/setenv.sh +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +WD=`pwd` +export BUILDROOT_BIN=${WD}/../buildroot/build_sh/staging_dir/bin +export SH1BINARIES=$WD/configs/us7032evb1/bin +export PATH=${BUILDROOT_BIN}:${SH1BINARIES}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/us7032evb1/shterm/.gitignore b/configs/us7032evb1/shterm/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..4d48f4de443fbfb02c474148fe0147a4c5974afe --- /dev/null +++ b/configs/us7032evb1/shterm/.gitignore @@ -0,0 +1,3 @@ +shterm +*.o + diff --git a/configs/us7032evb1/shterm/Makefile b/configs/us7032evb1/shterm/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..654e591a766b9734002a715e0fb6b60b1a340fc8 --- /dev/null +++ b/configs/us7032evb1/shterm/Makefile @@ -0,0 +1,52 @@ +############################################################################ +# config/us7032evb1/shterm/Makefile +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include $(TOPDIR)/Make.defs + +SRC = shterm.c +BIN = shterm + +all: ..$(DELIM)bin$(DELIM)$(BIN)$(EXEEXT) + +$(BIN)$(EXEEXT): $(SRC) + $(HOSTCC) $(HOSTCFLAGS) $^ -o $@ + +..$(DELIM)bin$(DELIM)$(BIN)$(EXEEXT): $(BIN)$(EXEEXT) + install -m 0755 $^ $@ + +clean: + $(call DELFILE, $(BIN)$(EXEEXT)) + $(call DELFILE..$(DELIM)bin$(DELIM)$(BIN)$(EXEEXT)) + $(call CLEAN) diff --git a/configs/us7032evb1/shterm/shterm.c b/configs/us7032evb1/shterm/shterm.c new file mode 100644 index 0000000000000000000000000000000000000000..83284d493b95c82d7f1f32e7cd6b02d73e1cbe85 --- /dev/null +++ b/configs/us7032evb1/shterm/shterm.c @@ -0,0 +1,739 @@ +/**************************************************************************** + * config/us7032evb1/shterm/shterm.c + * + * Copyright(C) 2008-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Size of the circular buffer used for interrupt I/O */ + +#define MAX_FILEPATH 255 + +#define ENQ 5 +#define ACK 6 + +#define DEFAULT_BAUD 9600 + +#define dbg(format, ...) if (debug > 0) printconsole(format, ##__VA_ARGS__) +#define vdbg(format, ...) if (debug > 1) printconsole(format, ##__VA_ARGS__) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void sendfile(int fdtarg, char *filename, int verify); +static void receivefile(int fdtarg, char *filename); +static void getfilename(int fd, char *name); +static int readbyte(int fd, char *ch); +static void writebyte(int fd, char byte); +static void close_tty(void); +static void interrupt(int signo); +static void show_usage(const char *progname, int exitcode); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static int debug = 0; +static int g_fd = -1; +static int g_fdnb = -1; +static FILE *g_logstream = NULL; +static const char g_dfttydev[] = "/dev/ttyS0"; +static const char *g_ttydev = g_dfttydev; +static const char *g_logfile = 0; +static int g_baud = DEFAULT_BAUD; +static struct termios g_termios; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: putconsole + ****************************************************************************/ + +static void putconsole(char ch) +{ + if (g_logstream) + { + (void)putc(ch, g_logstream); + } + + (void)putchar(ch); +} + +/**************************************************************************** + * Name: flushconsole + ****************************************************************************/ + +static void flushconsole(void) +{ + if (g_logstream) + { + (void)fflush(g_logstream); + } + (void)fflush(stdout); +} + +/**************************************************************************** + * Name: printconsole + ****************************************************************************/ + +static void printconsole(const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + if (g_logstream) + { + (void)vfprintf(g_logstream, fmt, ap); + } + + (void)vprintf(fmt, ap); + va_end(ap); +} + +/**************************************************************************** + * Name: sendfile + ****************************************************************************/ + +static void sendfile(int fdtarg, char *filename, int verify) +{ + char chin; + char chout; + int fdin; + int nbytes; + int ndots; + int ret; + + /* Source the source file */ + + fdin = open(filename, O_RDONLY); + if (fdin < 0) + { + fprintf(stderr, "ERROR: Failed to open '%s' for reading\n", filename); + (void)writebyte(fdin, '>'); + return; + } + + if (verify) + { + printconsole("Verifying file '%s':\n", filename); + } + else + { + printconsole("Loading file '%s':\n", filename); + } + flushconsole(); + + /* This loop processes each byte from the source file */ + + nbytes = 0; + ndots = 0; + while ((ret = readbyte(fdin, &chout)) == 1) + { + /* If verbose debug is OFF, then output dots at a low rate */ + + if (debug < 2) + { + if (++nbytes > 64) + { + nbytes = 0; + putconsole('.'); + if (++ndots > 72) + { + putconsole('\n'); + ndots = 0; + } + flushconsole(); + } + } + + /* If verbose debug is ON, dump everything */ + + else if (chout == 'S') + { + printconsole("\n[%c", chout); + } + else if (isprint(chout)) + { + printconsole("[%c", chout); + } + else + { + printconsole("[."); + } + + /* Send the byte to the target */ + + writebyte(fdtarg, chout); + + /* Get the response from the target. Loop until the target responds + * by either echoing the byte sent or by sending '>' + */ + + do + { + ret = readbyte(fdtarg, &chin); + + /* If verbose debug is ON, echo the response from the target */ + + if (ret == 1 && debug >= 2) + { + if (chin != chout) + { + if (isprint(chin)) + { + putconsole(chin); + } + else + { + putconsole('.'); + } + } + else + { + putconsole(']'); + } + } + + /* Check if the target is asking to terminate the transfer */ + + if (ret == 1 && chin == '>') + { + close(fdin); + writebyte(fdtarg, ACK); + return; + } + } + while (ret == 1 && chin != chout); + } + + writebyte(fdtarg, '>'); + do + { + ret = readbyte(fdtarg, &chin); + } + while (ret == 1 && chin != ENQ); + close(fdin); + writebyte(fdtarg, ACK); +} + +/**************************************************************************** + * Name: receivefile + ****************************************************************************/ + +static void receivefile(int fdtarg, char *filename) +{ + char ch; + int fdout; + int nbytes; + int ndots; + int ret; + + fdout = open(filename, O_WRONLY | O_CREAT | O_TRUNC, 0644); + if (fdout < 0) + { + fprintf(stderr, "ERROR: Failed to open '%s' for writing\n", filename); + (void)writebyte(fdtarg, '>'); + return; + } + + printconsole("Receiving file '%s':\n", filename); + flushconsole(); + (void)writebyte(fdtarg, '+'); + + /* Synchronize */ + + do + { + ret = readbyte(fdtarg, &ch); + } + while (ret == 1 && ch != 'S' && ch != 'Q'); + + nbytes = 0; + ndots = 0; + + /* Receive the file */ + + while (ret == 1) + { + /* Check for end-of-file */ + + if (ch == '>') + { + close(fdout); + return; + } + + writebyte(fdout, ch); + + if (++nbytes > 256) + { + nbytes = 0; + putconsole('.'); + if (++ndots > 72) + { + putconsole('\n'); + ndots = 0; + } + flushconsole(); + } + + ret = readbyte(fdtarg, &ch); + if (ch == '\r') + { + writebyte(fdtarg, '+'); + } + } + + close (fdout); +} + +/**************************************************************************** + * Name: getfilename + ****************************************************************************/ + +static void getfilename(int fd, char *name) +{ + char ch; + int ret; + + /* Skip over spaces */ + + do + { + ret = readbyte(fd, &ch); + } + while (ch == ' ' && ret == 1); + + /* Concatenate the filename */ + + while (ret == 1 && ch > ' ') + { + *name++ = ch; + ret = readbyte(fd, &ch); + } + *name++ = 0; +} + +/**************************************************************************** + * Name: readbyte + ****************************************************************************/ + +static int readbyte(int fd, char *ch) +{ + int ret; + + /* Read characters from the console, and echo them to the target tty */ + + ret = read(fd, ch, 1); + if (ret < 0) + { + if (errno != EAGAIN) + { + printconsole("ERROR: Failed to read from fd=%d: %s\n", fd, strerror(errno)); + close_tty(); + exit(12); + } + return -EAGAIN; + } + else if (ret > 1) + { + printconsole("ERROR: Unexpected number of bytes read(%d) from fd=%d\n", ret, fd); + close_tty(); + exit(13); + } + return ret; +} + +/**************************************************************************** + * Name: writebyte + ****************************************************************************/ + +static void writebyte(int fd, char byte) +{ + int ret = write(fd, &byte, 1); + if (ret < 0) + { + printconsole("ERROR: Failed to write to fd=%d: %s\n", fd, strerror(errno)); + close_tty(); + exit(14); + } +} + +/**************************************************************************** + * Name: close_tty + ****************************************************************************/ + +static void close_tty(void) +{ + int ret; + + if (g_fdnb >= 0) + { + (void)close(g_fdnb); + } + + if (g_fd >= 0) + { + ret = tcsetattr(g_fd, TCSANOW, &g_termios); + if (ret < 0) + { + printconsole("ERROR: Failed to restore termios for %s: %s\n", g_ttydev, strerror(errno)); + } + (void)close(g_fd); + } + + if (g_logstream) + { + (void)fclose(g_logstream); + } +} + +/**************************************************************************** + * Name: interrupt + ****************************************************************************/ + +static void interrupt(int signo) +{ + printconsole("Exit-ing...\n"); + close_tty(); + exit(0); +} + +/**************************************************************************** + * Name: interrupt + ****************************************************************************/ + +static void show_usage(const char *progname, int exitcode) +{ + fprintf(stderr, "\nUSAGE: %s [-h] [-d] [-t ] [-b ] [-l ]\n", progname); + fprintf(stderr, "\nWhere:\n"); + fprintf(stderr, "\t-h: Prints this message then exit.\n"); + fprintf(stderr, "\t-d: Enable debug output (twice for verbose output).\n"); + fprintf(stderr, "\t-t : Use device instead of %s.\n", g_dfttydev); + fprintf(stderr, "\t-b : Use instead of %d.\n", DEFAULT_BAUD); + fprintf(stderr, "\t-l : Echo console output in .\n"); + exit(exitcode); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +int main(int argc, char **argv, char **envp) +{ + struct termios tty; + char filename[MAX_FILEPATH]; + char ch; + int speed; + int opt; + int oflags; + int ret; + + while ((opt = getopt(argc, argv, ":dt:b:hl:")) != -1) + { + switch(opt) + { + case 'd': + debug++; + break; + + case 't': + g_ttydev = optarg; + break; + + case 'b': + g_baud = atoi(optarg); + break; + + case 'h': + show_usage(argv[0], 0); + break; + + case 'l': + g_logfile = optarg; + break; + + case ':': + fprintf(stderr, "ERROR: Missing argument to option '%c'\n", optopt); + show_usage(argv[0], 1); + break; + + case '?': + fprintf(stderr, "ERROR: Unrecognized option '%c'\n", optopt); + show_usage(argv[0], 2); + break; + } + } + + if (optind < argc) + { + fprintf(stderr, "ERROR: Unexpected arguments at end of line\n"); + show_usage(argv[0], 3); + } + + switch (g_baud) + { + case 0: speed = B0; break; + case 50: speed = B50; break; + case 75: speed = B75; break; + case 110: speed = B110; break; + case 134: speed = B134; break; + case 150: speed = B150; break; + case 200: speed = B200; break; + case 300: speed = B300; break; + case 600: speed = B600; break; + case 1200: speed = B1200; break; + case 1800: speed = B1800; break; + case 2400: speed = B2400; break; + case 4800: speed = B4800; break; + case 9600: speed = B9600; break; + case 19200: speed = B19200; break; + case 38400: speed = B38400; break; + case 57600: speed = B57600; break; + case 115200: speed = B115200; break; + case 230400: speed = B230400; break; + + default: + fprintf(stderr, "ERROR: Unsupported BAUD=%d\n", g_baud); + show_usage(argv[0], 4); + } + + /* Was a log file specified? */ + + if (g_logfile) + { + g_logstream = fopen(g_logfile, "w"); + if (!g_logstream) + { + fprintf(stderr, "ERROR: Failed to open '%s' for writing\n", g_logfile); + return 5; + } + } + + /* Set the host stdin to O_NONBLOCK */ + + oflags = fcntl(0, F_GETFL, 0); + if (oflags == -1) + { + fprintf(stderr, "ERROR: fnctl(F_GETFL) failed: %s\n", strerror(errno)); + return 6; + } + + ret = fcntl(0, F_SETFL, oflags | O_NONBLOCK); + if (ret < 0) + { + fprintf(stderr, "ERROR: fnctl(F_SETFL) failed: %s\n", strerror(errno)); + return 7; + } + + /* Open the selected serial port (blocking)*/ + + g_fd = open(g_ttydev, O_RDWR); + if (g_fd < 0) + { + printconsole("ERROR: Failed to open %s: %s\n", g_ttydev, strerror(errno)); + return 8; + } + + /* Configure the serial port in at the selected baud in 8-bit, no-parity, raw mode + * and turn off echo, etc. + */ + + ret = tcgetattr(g_fd, &g_termios); + if (ret < 0) + { + printconsole("ERROR: Failed to get termios for %s: %s\n", g_ttydev, strerror(errno)); + close(g_fd); + return 9; + } + + memcpy(&tty, &g_termios, sizeof(struct termios)); + tty.c_iflag &= ~(IGNBRK|BRKINT|PARMRK|ISTRIP|INLCR|IGNCR|ICRNL|IXON); + tty.c_oflag &= ~OPOST; + tty.c_lflag &= ~(ECHO|ECHONL|ICANON|ISIG|IEXTEN); + tty.c_cflag &= ~(CSIZE|PARENB); + tty.c_cflag |= CS8; + + (void)cfsetispeed(&tty, speed); + (void)cfsetospeed(&tty, speed); + + ret = tcsetattr(g_fd, TCSANOW, &tty); + if (ret < 0) + { + printconsole("ERROR: Failed to set termios for %s: %s\n", g_ttydev, strerror(errno)); + close(g_fd); + return 10; + } + +#if 1 + /* Open the selected serial port (non-blocking)*/ + + g_fdnb = open(g_ttydev, O_RDONLY | O_NONBLOCK); + if (g_fdnb < 0) + { + printconsole("ERROR: Failed to open %s: %s\n", g_ttydev, strerror(errno)); + return 11; + } +#else + /* Create a non-blocking copy of the configure tty descriptor */ + + g_fdnb = dup(g_fd); + if (g_fdnb < 0) + { + printconsole("ERROR: Failed to dup %s fd=%d: %s\n", g_ttydev, g_fd, strerror(errno)); + close_tty(); + return 12; + } + + oflags = fcntl(g_fdnb, F_GETFL, 0); + if (oflags == -1) + { + fprintf(stderr, "ERROR: fnctl(F_GETFL) failed: %s\n", strerror(errno)); + close_tty(); + return 13; + } + + ret = fcntl(g_fdnb, F_SETFL, oflags | O_NONBLOCK); + if (ret < 0) + { + fprintf(stderr, "ERROR: fnctl(F_SETFL) failed: %s\n", strerror(errno)); + close_tty(); + return 14; + } +#endif + + /* Catch attempts to control-C out of the program so that we can restore + * the TTY settings. + */ + + signal(SIGINT, interrupt); + + /* Loopo until control-C */ + + for (;;) + { + /* Read characters from the console, and echo them to the target tty */ + + ret = readbyte(0, &ch); + if (ret == 0) + { + printconsole("End-of-file: exitting\n"); + close_tty(); + return 0; + } + else if (ret == 1) + { + writebyte(g_fd, ch); + } + + /* Read characters from target TTY and echo them on the console */ + + ret = readbyte(g_fdnb, &ch); + if (ret == 0) + { + printconsole("ERROR: Unexpected number of bytes read(%d) from %s\n", ret, g_ttydev); + close_tty(); + return 15; + } + else if (ret == 1) + { + if (ch == ENQ) + { + char ch1; + char ch2; + + writebyte(g_fd, '*'); + ret = readbyte(g_fd, &ch1); + if (ret != 1) + { + printconsole("ERROR: Unexpected number of bytes read(%d) from %s\n", ret, g_ttydev); + close_tty(); + return 15; + } + ret = readbyte(g_fd, &ch2); + if (ret != 1) + { + printconsole("ERROR: Unexpected number of bytes read(%d) from %s\n", ret, g_ttydev); + close_tty(); + return 16; + } + + getfilename(g_fd, filename); + + if (ch1 == 'l' || ch1 == 'L') + { + sendfile(g_fd, filename, 0); + } + else if (ch1 == 'v' || ch1 == 'V') + { + sendfile(g_fd, filename, 1); + } + else if (ch1 == 's' || ch1 == 'S') + { + receivefile(g_fd, filename); + } + } + else + { + putconsole(ch); + flushconsole(); + } + } + } + return 0; +} diff --git a/configs/us7032evb1/src/.gitignore b/configs/us7032evb1/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/us7032evb1/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/us7032evb1/src/Makefile b/configs/us7032evb1/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..8f46edac98e8dd7d58ec7fc7ab01546c0c2f8f72 --- /dev/null +++ b/configs/us7032evb1/src/Makefile @@ -0,0 +1,76 @@ +############################################################################ +# configs/us7032evb1/src/Makefile +# +# Copyright (C) 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src +CFLAGS += -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(TOPDIR)/sched + +ASRCS = +AOBJS = $(ASRCS:.S=$(OBJEXT)) +CSRCS = sh1_leds.c +COBJS = $(CSRCS:.c=$(OBJEXT)) + +SRCS = $(ASRCS) $(CSRCS) +OBJS = $(AOBJS) $(COBJS) + +CFLAGS += -I $(TOPDIR)/arch/$(CONFIG_ARCH)/src + +all: libboard$(LIBEXT) + +$(AOBJS): %$(OBJEXT): %.S + $(call ASSEMBLE, $<, $@) + +$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +libboard$(LIBEXT): $(OBJS) + $(call ARCHIVE, $@, $(OBJS)) + +.depend: Makefile $(SRCS) + $(Q) $(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep + $(Q) touch $@ + +depend: .depend + +clean: + $(call DELFILE, libboard$(LIBEXT)) + $(call CLEAN) + +distclean: clean + $(call DELFILE, Make.dep) + $(call DELFILE, .depend) + +-include Make.dep diff --git a/configs/us7032evb1/src/sh1_leds.c b/configs/us7032evb1/src/sh1_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..908deb47f336f1cdc2c8bac7f148e93a3e205da0 --- /dev/null +++ b/configs/us7032evb1/src/sh1_leds.c @@ -0,0 +1,138 @@ +/**************************************************************************** + * configs/us7032evb1/src/sh1_leds.c + * + * Copyright (C) 2008-2009, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* The SH1_LPEVB only a single LED controlled by either port A, pin 15, or + * port B, pin 15 (selectable via JP8). In this file, we assume the portB + * setup. + */ + +#define SH1_PBDR_LED 0x8000 +#define SH1_PBIOR_LED 0x8000 +#define SH1_PBCR2_LED 0xc000 + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + uint16_t reg16; + + /* Setup port B, pin 15 as an output */ + + reg16 = getreg16(SH1_PFC_PBIOR); + reg16 |= SH1_PBIOR_LED; + putreg16(reg16, SH1_PFC_PBIOR); + + /* Setup port B, pin 15 as a normal I/O register */ + + reg16 = getreg16(SH1_PFC_PBCR1); + reg16 &= ~SH1_PBCR2_LED; + putreg16(reg16, SH1_PFC_PBCR1); + + /* Turn the LED off */ + + reg16 = getreg16(SH1_PORTB_DR); + reg16 &= ~SH1_PBDR_LED; + putreg16(reg16, SH1_PORTB_DR); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + uint16_t reg16; + + if (led) + { + /* Turn the LED on */ + + reg16 = getreg16(SH1_PORTB_DR); + reg16 |= SH1_PBDR_LED; + putreg16(reg16, SH1_PORTB_DR); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + uint16_t reg16; + + if (led) + { + /* Turn the LED off */ + + reg16 = getreg16(SH1_PORTB_DR); + reg16 &= ~SH1_PBDR_LED; + putreg16(reg16, SH1_PORTB_DR); + } +} +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/viewtool-stm32f107/Kconfig b/configs/viewtool-stm32f107/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..512d58630b6e61ae8fb23022f5d50608cc3d2fe7 --- /dev/null +++ b/configs/viewtool-stm32f107/Kconfig @@ -0,0 +1,38 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_VIEWTOOL_STM32F107 + +config VIEWTOOL_HIGHPRI + bool "High priority interrupt test" + default n + depends on ARCH_CHIP_STM32F103VC && ARCH_HIPRI_INTERRUPT + ---help--- + This selection enables building of the custom test for the Cortex-M + high priority, nested interrupts. ARCH_HIPRI_INTERRUPT must first + be enabled. This test is only implemented on the STM32F103VCT6 + (ARCH_CHIP_STM32F103VC) but should be easily ported to other STM32 + architectures. + +if VIEWTOOL_HIGHPRI + +config VIEWTOOL_TIM6_FREQUENCY + int "TIM6 Frequency" + default 36000000 + ---help--- + TIM6 is used to drive the high priority, nested interrupt in the + test enabled with VIEWTOOL_HIGHPRI. This setting specifies the + frequency of the TIM6 input clock. + +config VIEWTOOL_TIM6_PERIOD + int "TIM6 Period" + default 36000 + ---help--- + TIM6 is used to drive the high priority, nested interrupt in the + test enabled with VIEWTOOL_HIGHPRI. This setting specifies + period of the TIM6 interrupt in units of VIEWTOOL_TIM6_FREQUENCY. + +endif # VIEWTOOL_HIGHPRI +endif # ARCH_BOARD_VIEWTOOL_STM32F107 diff --git a/configs/viewtool-stm32f107/README.txt b/configs/viewtool-stm32f107/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..509a476170216a4e149ab9dfb7455515f41da678 --- /dev/null +++ b/configs/viewtool-stm32f107/README.txt @@ -0,0 +1,782 @@ +README +====== + + This README discusses issues unique to NuttX configurations for the + ViewTool STM32F103/F107 V1.2 board. This board may be fitted with either + + - STM32F107VCT6, or + - STM32F103VCT6 + + The board is vary modular with connectors for a variety of peripherals. + Features on the base board include: + + - User and Wake-Up Keys + - LEDs + + See http://www.viewtool.com/ for further information. + +Contents +======== + + o User and Wake-Up keys + o LEDs + o Serial Console + - Console Configuration + - J5 - USART1 + - PL-2013 USB-to-Serial Interface + - RS-232 Module + o USB Interface + o microSD Card Interface + o ViewTool DP83848 Ethernet Module + o Freescale MPL115A barometer sensor + o LCD/Touchscreen Interface + o Toolchains + - NOTE about Windows native toolchains + o Configurations + - Information Common to All Configurations + - Configuration Sub-directories + +User and Wake-Up keys +===================== + + All pulled high and will be sensed low when depressed. + + SW2 PC11 Needs J42 closed + SW3 PC12 Needs J43 closed + SW4 PA0 Needs J44 closed + +LEDs +==== + + There are four LEDs on the ViewTool STM32F103/F107 board that can be controlled + by software: LED1 through LED4. All pulled high and can be illuminated by + driving the output to low + + LED1 PA6 + LED2 PA7 + LED3 PB12 + LED4 PB13 + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related + events as follows: + + SYMBOL Meaning LED state + LED1 LED2 LED3 LED4 + ----------------- ----------------------- ---- ---- ---- ---- + LED_STARTED NuttX has been started ON OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF + LED_IRQSENABLED Interrupts enabled ON ON OFF OFF + LED_STACKCREATED Idle stack created OFF OFF ON OFF + LED_INIRQ In an interrupt N/C N/C N/C Soft glow + LED_SIGNAL In a signal handler N/C N/C N/C Soft glow + LED_ASSERTION An assertion failed N/C N/C N/C Soft glow + LED_PANIC The system has crashed N/C N/C N/C 2Hz Flashing + LED_IDLE MCU is is sleep mode Not used + + After booting, LED1-3 are not longer used by the system and can be used for + other purposes by the application (Of course, all LEDs are available to the + application if CONFIG_ARCH_LEDS is not defined. + +Serial Console +============== + + Console Configuration + --------------------- + The NuttX console is configured by default on USART1 at 115200 BAUD 8N1 + (8-bits, not parity, one stop bit). These setting can, of course, easily + be changed by reconfiguring NuttX. + + J5 - USART1 + ----------- + The boards come with a PL-2303 based USB-to-serial board. Also available + as an option is an RS-232 board. Both have the same pin out on a 6-pin + connector that mates with the upper row of J5. + + PIN MODULE BOARD J5 + --- ------ --------------------------- + 1 5V 1 POWER Power jumper + 2 GND 3 GND Ground + 3 TXD 5 RXD1 PA10 USART1_RXD + 4 RXD 7 TXD1 PA9 USART1_TXD + 5 RTS? 9 CTS? PA12 USART1_RTS + 6 CTS? 11 RTS? PA11 USART1_CTS + + PL-2013 USB-to-Serial Interface + ------------------------------- + + J37 - CON4. Jumper Settings: + 1 <-> 3 : Connects PA9 to the RXD1 output pin + 2 <-> 4 : Connects PA10 to the TXD1 input pin + + J35 - CON2. Jumper Setting: + Open. the PL2303 adapter receives its power from the USB host. + + RS-232 Module + ------------- + + J37 - CON4. Jumper Settings: + 1 <-> 3 : Connects PA9 to the RXD1 output pin + 2 <-> 4 : Connects PA10 to the TXD1 input pin + + J35 - CON2. Jumper Setting: + 1 <-> 2 : Proves 3.3V to the RS-232 module. + +USB Interface +============= + + USB Connector + ------------- + + The Viewtool base board has a USB Mini-B connector. Only USB device can + be supported with this connector. + + ------------------------- ------------------------------------ + USB Connector + J10 mini-USB GPIO CONFIGURATION(s) + --- --------- ----------- ------------------------------------ + Pin Signal + --- --------- ----------- ------------------------------------ + 1 USB_VBUS VDD_USB (No sensing available) + 2 OTG_DM PA11 GPIO_OTGFS_DM (F107) GPIO_USB_DM (F103) + 3 OTG_DP PA12 GPIO_OTGFS_DP (F107) GPIO_USB_DP (F103) + 4 OTG_ID PA10 GPIO_OTGFS_ID (F107) + 5 Shield N/A N/A + 6 Shield N/A N/A + 7 Shield N/A N/A + 8 Shield N/A N/A + 9 Shield N/A N/A + PE11 USB_EN GPIO controlled soft pull-up (if J51 closed) + + NOTES: + 1. GPIO_OTGFS_VBUS (F107) should not be configured. No VBUS sensing + 2. GPIO_OTGFS_SOF (F107) is not used + 3. The OTG FS module has is own, internal soft pull-up logic. J51 should + be open so that PE11 activity does effect USB. + + + STM32F103 Configuration + ----------------------- + + System Type -> STM32 Peripheral Support + CONFIG_STM32_USB=y : Enable USB FS device + + Device Drivers + CONFIG_USBDEV : USB device support + + STATUS: All of the code is in place, but no testing has been performed. + + STM32F107 Configuration + ----------------------- + + System Type -> STM32 Peripheral Support + CONFIG_STM32_OTGFS=y : Enable OTG FS + + Device Drivers + CONFIG_USBDEV : USB device support + + STATUS: All of the code is in place, but USB is not yet functional. + + CDC/ACM Configuration + --------------------- + + This will select the CDC/ACM serial device. Defaults for the other + options should be okay. + + Device Drivers -> USB Device Driver Support + CONFIG_CDCACM=y : Enable the CDC/ACM device + + The following setting enables an example that can can be used to control + the CDC/ACM device. It will add two new NSH commands: + + a. sercon will connect the USB serial device (creating /dev/ttyACM0), and + b. serdis which will disconnect the USB serial device (destroying + /dev/ttyACM0). + + Application Configuration -> Examples: + CONFIG_SYSTEM_CDCACM=y : Enable an CDC/ACM example + + USB MSC Configuration + --------------------- + [WARNING: This configuration has not yet been verified] + + The Mass Storage Class (MSC) class driver can be selected in order to + export the microSD card to the host computer. MSC support is selected: + + Device Drivers -> USB Device Driver Support + CONFIG_USBMSC=y : Enable the USB MSC class driver + CONFIG_USBMSC_EPBULKOUT=1 : Use EP1 for the BULK OUT endpoint + CONFIG_USBMSC_EPBULKIN=2 : Use EP2 for the BULK IN endpoint + + The following setting enables an add-on that can can be used to control + the USB MSC device. It will add two new NSH commands: + + a. msconn will connect the USB serial device and export the microSD + card to the host, and + b. msdis which will disconnect the USB serial device. + + Application Configuration -> System Add-Ons: + CONFIG_SYSTEM_USBMSC=y : Enable the USBMSC add-on + CONFIG_SYSTEM_USBMSC_NLUNS=1 : One LUN + CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 : Minor device zero + CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/mmcsd0" + : Use a single, LUN: The microSD + : block driver. + + NOTES: + + a. To prevent file system corruption, make sure that the microSD is un- + mounted *before* exporting the mass storage device to the host: + + nsh> umount /mnt/sdcard + nsh> mscon + + The microSD can be re-mounted after the mass storage class is disconnected: + + nsh> msdis + nsh> mount -t vfat /dev/mtdblock0 /mnt/at25 + +microSD Card Interface +====================== + + microSD Connector + ----------------- + + ----------------------------- ------------------------- -------------------------------- + Connector J17 GPIO CONFIGURATION(s) + PIN SIGNAL LEGEND (no remapping) DP83848C Board + --- ------------- ----------- ------------------------- -------------------------------- + 1 VDD 3.3 N/A N/A 3.3 + 2 GND N/A N/A GND + 3 PC8 SDIO_D0 GPIO_SDIO_D0 D0 + 4 PD2 SDIO_CMD GPIO_SDIO_CMD CMD + 5 PC12 SDIO_CLK GPIO_SDIO_CK CLK + 6 PC11 SDIO_D3 GPIO_SDIO_D3 D3 + 7 PC10 SDIO_D2 GPIO_SDIO_D2 D2 + 8 PC9 SDIO_D1 GPIO_SDIO_D1 D1 + 9 PA8 CD Board-specific GPIO input CD + --- ------------- ----------- ------------------------- -------------------------------- + + NOTES: + 1. The STM32F107 does not support the SDIO/memory card interface. So the SD card + cannot be used with the STM32F107 (unless the pin-out just happens to match up + with an SPI-based card interface???) + + Configuration (STM32F103 only) + ------------------------------ + [WARNING: This configuration has not yet been verified] + + Enabling SDIO-based MMC/SD support: + + System Type->STM32 Peripheral Support + CONFIG_STM32_SDIO=y : Enable SDIO support + CONFIG_STM32_DMA2=y : DMA2 is needed by the driver + + Device Drivers -> MMC/SD Driver Support + CONFIG_MMCSD=y : Enable MMC/SD support + CONFIG_MMSCD_NSLOTS=1 : One slot per driver instance + CONFIG_MMCSD_HAVECARDDETECT=y : Supports card-detect PIOs + CONFIG_MMCSD_MMCSUPPORT=n : Interferes with some SD cards + CONFIG_MMCSD_SPI=n : No SPI-based MMC/SD support + CONFIG_MMCSD_SDIO=y : SDIO-based MMC/SD support + CONFIG_SDIO_DMA=y : Use SDIO DMA + CONFIG_SDIO_BLOCKSETUP=y : Needs to know block sizes + + Library Routines + CONFIG_SCHED_WORKQUEUE=y : Driver needs work queue support + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : NSH board-initialization + + Using the SD card + ----------------- + + 1) After booting, an SDIO device will appear as /dev/mmcsd0 + + 2) If you try mounting an SD card with nothing in the slot, the + mount will fail: + + nsh> mount -t vfat /dev/mmcsd1 /mnt/sd1 + nsh: mount: mount failed: 19 + + STATUS: All of the code is in place, but no testing has been performed. + +ViewTool DP83848 Ethernet Module +================================ + + Ethernet Connector + ------------------ + + ----------------------------- ------------------------ -------------------------------- + Connector J2 GPIO CONFIGURATION(s) + PIN SIGNAL LEGEND (no remapping) DP83848C Board + --- ------------- ----------- ------------------------ -------------------------------- + 1 PA0 MII_CRS N/A N/C + 2 PB11/SDA2 COM_TX_EN GPIO_ETH_RMII_TX_EN TX_EN + 3 PA3/LED_G2 MII_COL N/A N/C + 4 PB12/NSS2 COM_TXD0 GPIO_ETH_RMII_TXD0 TXD0 + 5 PA1 MII_RX_CLK GPIO_ETH_RMII_REF_CLK OSCIN + 6 PB13/SCK2 COM_TXD1 GPIO_ETH_RMII_TXD1 TXD1 + 7 PB1/CD_RESET MII_RXD3 N/A N/C + 8 PC4/LCDTP COM_RXD0 GPIO_ETH_RMII_RXD0 RXD0 + 9 PB0/BL_PWM MII_RXD2 N/A N/C + 10 PC5 COM_RXD1 GPIO_ETH_RMII_RXD1 RXD1 + 11 PB8/CAN1_RX MII_TXD3 N/A N/C + 12 PC1/LED_R1 COM_MDC GPIO_ETH_MDC MDC + 13 PC2/LED_R2 MII_TXD2 N/A N/C + 14 PA2/LED_G1 COM_MDIO GPIO_ETH_MDIO MDIO + 15 PC3/ONEW MII_TX_CLK N/A N/C + 16 PB10/SCL2 RX_ER N/A N/C + 17 PD2 GPIO1 N/A N/C + 18 PA7/MOSI1 COM_RX_DV GPIO_ETH_RMII_CRS_DV CRS_DIV + 19 PD3 GPIO2 N/A N/C + 20 PB5 COM_PPS_OUT N/A N/C + 21 VDD 3.3 VDD_3.3 N/A 3.3V + 22 VDD 3.3 VDD_3.3 N/A 3.3V + 23 GND GND N/A GND + 24 GND GND N/A GND + --- ------------- ----------- ------------------------ -------------------------------- + + NOTES: + 1. RMII interface is used + 2. There is a 50MHz clock on board the DP83848. No MCO clock need be provided. + + Configuration + ------------- + + System Type -> STM32 Peripheral Support + CONFIG_STM32_ETHMAC=y : Enable Ethernet driver + + System Type -> Ethernet MAC Configuration + CONFIG_STM32_RMII=y : Configuration RM-II DP83848C PHY + CONFIG_STM32_AUTONEG=y + CONFIG_STM32_PHYADDR=1 + CONFIG_STM32_PHYSR=16 + CONFIG_STM32_PHYSR_SPEED=0x0002 + CONFIG_STM32_PHYSR_100MBPS=0x0000 + CONFIG_STM32_PHYSR_MODE=0x0004 + CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 + CONFIG_STM32_RMII_EXTCLK=y + + Device Drivers -> Networking Devices + CONFIG_NETDEVICES=y : More PHY stuff + CONFIG_ETH0_PHY_DP83848C=y + + Networking (required) + CONFIG_NET=y : Enabled networking support + CONFIG_NET_MULTIBUFFER=y : Required by driver + CONFIG_NSH_NOMAC=y + + Networking (recommended/typical) + CONFIG_NSOCKET_DESCRIPTORS=10 : Socket-related + CONFIG_NET_SOCKOPTS=y + + CONFIG_NET_ETH_MTU=650 : Maximum packet size + CONFIG_NET_ETH_TCP_RECVWNDO=650 + CONFIG_NET_TCP_READAHEAD=y : Enable read-ahead buffering + CONFIG_NET_TCP_READAHEAD_BUFSIZE=650 + + CONFIG_NET_TCP=y : TCP support + CONFIG_NET_NTCP_READAHEAD_BUFFERS=8 + + CONFIG_NET_UDP=y : UDP support + CONFIG_NET_UDP_CONNS=8 + + CONFIG_NET_ICMP=y : ICMP support + CONFIG_NET_ICMP_PING=y + + CONFIG_NSH_DRIPADDR=0x0a000001 : Network identity + CONFIG_NSH_IPADDR=0x0a000002 + CONFIG_NSH_NETMASK=0xffffff00 + + Network Utilities (basic) + CONFIG_NETUTILS_TFTPC=y : Needed by NSH unless to disable TFTP commands + CONFIG_NETUTILS_DHCPC=y : Fun stuff + CONFIG_NETUTILS_TELNETD=y : Support for a Telnet NSH console + CONFIG_NSH_TELNET=y + + (also FTP, TFTP, WGET, NFS, etc. if you also have a mass storage + device). + +Freescale MPL115A barometer sensor +================================== + + This board support package includes hooks that can be used to enable + testing of a Freescale MPL115A barometer sensor connected via SPI3 with + chip select on PB6, + + Here are the configuration settings that would have to be included to + enabled support for the barometer: + + System Type -> Peripherals + CONFIG_STM32_SPI3=y + + Drivers -> SPI + CONFIG_SPI=y + CONFIG_SPI_EXCHANGE=y + + Drivers -> Sensors + CONFIG_SENSORS=y + CONFIG_MPL115A=y + CONFIG_NSH_ARCHINIT=y + + + Note: this driver uses SPI3 then since PB3 pin is also use to JTAG TDO you + need to disable JTAG support to get this driver working: + + System Type + CONFIG_STM32_JTAG_DISABLE=y + +LCD/Touchscreen Interface +========================= + + An LCD may be connected via J11. Only the the STM32F103 supports the FSMC signals + needed to drive the LCD. + + The LCD features an (1) HY32D module with built-in SSD1289 LCD controller, and (a) + a XPT2046 touch screen controller. + + LCD Connector + ------------- + + ----------------------------- ------------------------ -------------------------------- + Connector J11 GPIO CONFIGURATION(s) + PIN SIGNAL LEGEND (F103 only) LCD Module + --- ------------- ----------- ------------------------ -------------------------------- + 1 VDD_5 NC N/A 5V --- + 2 GND GND N/A GND --- + 3 PD14 DATA0 GPIO_NPS_D0 D0 HY32D + 4 PD15 DATA1 GPIO_NPS_D1 D1 HY32D + 5 PD0 DATA2 GPIO_NPS_D2 D2 HY32D + 6 PD1 DATA3 GPIO_NPS_D3 D3 HY32D + 7 PE7 DATA4 GPIO_NPS_D4 D4 HY32D + 8 PE8 DATA5 GPIO_NPS_D5 D5 HY32D + 9 PE9 DATA6 GPIO_NPS_D6 D6 HY32D + 10 PE10 DATA7 GPIO_NPS_D7 D7 HY32D + 11 PE11 DATA8 GPIO_NPS_D8 D8 HY32D + 12 PE12 DATA9 GPIO_NPS_D9 D9 HY32D + 13 PE13 DATA10 GPIO_NPS_D10 D10 HY32D + 14 PE14 DATA11 GPIO_NPS_D11 D11 HY32D + 15 PE15 DATA12 GPIO_NPS_D12 D12 HY32D + 16 PD8 DATA13 GPIO_NPS_D13 D13 HY32D + 17 PD9 DATA14 GPIO_NPS_D14 D14 HY32D + 18 PD10 DATA15 GPIO_NPS_D15 D15 HY32D + 19 (3) LCD_CS GPIO_NPS_NE1 CS HY32D + 20 PD11 LCD_RS GPIO_NPS_A16 RS HY32D + 21 PD5 LCD_R/W GPIO_NPS_NWE WR HY32D + 22 PD4 LCD_RD GPIO_NPS_NOE RD HY32D + 23 PB1 LCD_RESET (GPIO) RESET HY32D + 24 N/C NC N/A TE (unused?) + 25 VDD_3.3 BL_VCC N/A BLVDD CA6219 (Drives LCD backlight) + 26 GND BL_GND N/A BLGND CA6219 + 27 PB0 BL_PWM GPIO_TIM3_CH3OUT(2) BL_CNT CA6219 + 28 PC5 LCDTP_IRQ (GPIO) TP_IRQ XPT2046 + 29 PC4 LCDTP_CS (GPIO) TP_CS XPT2046 + 30 PB13 LCDTP_CLK GPIO_SPI2_SCK TP_SCK XPT2046 + 31 PB15 LCDTP_DIN GPIO_SPI2_MOSI TP_SI XPT2046 + 32 PB14 LCDTP_DOUT GPIO_SPI2_MISO TP_SO XPT2046 + 33 VDD_3.3 VDD_3.3 N/A 3.3V --- + 34 GND GND N/A GND --- + --- ------------- ----------- ------------------------ -------------------------------- + + NOTES: + 1) Only the F103 version of the board supports the FSMC + 2) No remap + 3) LCD_CS is controlled by J13 JUMPER4 (under the LCD unfortunately): + + 1->2 : PD7 (GPIO_NPS_NE1) enables the multiplexor : 1E\ enable input (active LOW) + 3->4 : PD13 provides 1A0 input (1A1 is grounded). : 1A0 address input + So will chip enable to either LCD_CS or + Flash_CS. + 5->6 : 1Y0 output to LCD_CS : 1Y0 address output + 7->8 : 1Y1 output to Flash_CE : 1Y1 address output + + Truth Table: + 1E\ 1A0 1A1 1Y0 1Y1 + --- --- --- --- --- + HI N/A N/A HI HI + LO LO LO LO HI + LO HI LO HI LO + +Toolchains +========== + + NOTE about Windows native toolchains + ------------------------------------ + + There are several limitations to using a Windows based toolchain in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' + utility but you might easily find some new path problems. If so, check + out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic + links are used in Nuttx (e.g., include/arch). The make system works + around these problems for the Windows tools by copying directories + instead of linking them. But this can also cause some confusion for + you: For example, you may edit a file in a "linked" directory and find + that your changes had no effect. That is because you are building the + copy of the file in the "fake" symbolic directory. If you use a\ + Windows toolchain, you should get in the habit of making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + +Configurations +============== + + Information Common to All Configurations + ---------------------------------------- + Each SAM3U-EK configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh viewtool-stm32f107/ + cd - + . ./setenv.sh + + Before sourcing the setenv.sh file above, you should examine it and perform + edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory + than holds your toolchain binaries. + + And then build NuttX by simply typing the following. At the conclusion of + the make, the nuttx binary will reside in an ELF file called, simply, nuttx. + + make + + The that is provided above as an argument to the tools/configure.sh + must be is one of the following. + + NOTES: + + 1. These configurations use the mconf-based configuration tool. To + change any of these configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless stated otherwise, all configurations generate console + output on USART1. + + 3. Unless otherwise stated, the configurations are setup for + Cygwin under Windows: + + Build Setup: + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + + 4. All of these configurations use the CodeSourcery for Windows toolchain + (unless stated otherwise in the description of the configuration). That + toolchain selection can easily be reconfigured using 'make menuconfig'. + Here are the relevant current settings: + + System Type -> Toolchain: + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : GNU EABI toolchain for windows + + The setenv.sh file is available for you to use to set the PATH + variable. The path in the that file may not, however, be correct + for your installation. + + See also the "NOTE about Windows native toolchains" in the section call + "GNU Toolchain Options" above. + + 4. These configurations all assume that the STM32F107VCT6 is mounted on + board. This is configurable; you can select the STM32F103VCT6 as an + alternative. + + 5. These configurations all assume that you are loading code using + something like the ST-Link v2 JTAG. None of these configurations are + setup to use the DFU bootloader but should be easily reconfigured to + use that bootloader is so desired. + + Configuration Sub-directories + ----------------------------- + + netnsh: + + This configuration directory provide the NuttShell (NSH) with + networking support. + + NOTES: + 1. This configuration will work only on the version the viewtool + board with the the STM32F107VCT6 installed. If you have a board + with the STM32F103VCT6 installed, please use the nsh configuration + described below. + + 2. There is no PHY on the base viewtool stm32f107 board. You must + also have the "ViewTool DP83848 Ethernet Module" installed on J2 + in order to support networking. + + 3. Since networking is enabled, you will see some boot-up delays when + the network connection is established. These delays can be quite + large if no network is attached (A production design to bring up the + network asynchronously to avoid these start up delays). + + 4. This configuration uses the default USART1 serial console. That + is easily changed by reconfiguring to (1) enable a different + serial peripheral, and (2) selecting that serial peripheral as + the console device. + + 5. By default, this configuration is set up to build on Windows + under either a Cygwin or MSYS environment using a recent, Windows- + native, generic ARM EABI GCC toolchain (such as the CodeSourcery + toolchain). Both the build environment and the toolchain + selection can easily be changed by reconfiguring: + + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + 6. USB support is disabled by default. See the section above entitled, + "USB Interface" + + STATUS. The first time I build the configuration, I get some undefined + external references. No idea why. Simply cleaning the apps/ directory + and rebuilding fixes the problem: + + make apps_clean all + + nsh: + + This configuration directory provide the basic NuttShell (NSH). + + NOTES: + 1. This configuration will work with either the version of the board + with STM32F107VCT6 or STM32F103VCT6 installed. The default + configuration is for the STM32F107VCT6. To use this configuration + with a STM32F103VCT6, it would have to be modified as follows: + + System Type -> STM32 Configuration Options + CONFIG_ARCH_CHIP_STM32F103VC=y + CONFIG_ARCH_CHIP_STM32F107VC=n + + 2. This configuration uses the default USART1 serial console. That + is easily changed by reconfiguring to (1) enable a different + serial peripheral, and (2) selecting that serial peripheral as + the console device. + + 3. By default, this configuration is set up to build on Windows + under either a Cygwin or MSYS environment using a recent, Windows- + native, generic ARM EABI GCC toolchain (such as the CodeSourcery + toolchain). Both the build environment and the toolchain + selection can easily be changed by reconfiguring: + + CONFIG_HOST_WINDOWS=y : Windows operating system + CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows + + 4. USB support is disabled by default. See the section above entitled, + "USB Interface" + + 3. This configured can be re-configured to use either the Viewtool LCD + module. NOTE: The LCD module can only be used on the STM32F103 version + of the board. The LCD requires FSMC support. + + System Type -> STM32 Chip Selection: + CONFIG_ARCH_CHIP_STM32F103VC=y : Select STM32F103VCT6 + + System Type -> Peripherals: + CONFIG_STM32_FSMC=y : Enable FSMC LCD interface + + Device Drivers -> LCD Driver Support + CONFIG_LCD=y : Enable LCD support + CONFIG_NX_LCDDRIVER=y : LCD graphics device + CONFIG_LCD_MAXCONTRAST=1 + CONFIG_LCD_MAXPOWER=255 + CONFIG_LCD_LANDSCAPE=y : Landscape orientation + CONFIG_LCD_SSD1289=y : Select the SSD1289 + CONFIG_SSD1289_PROFILE1=y + + Graphics Support + CONFIG_NX=y + + Graphics Support -> Supported Pixel Depths + CONFIG_NX_DISABLE_1BPP=y : Only 16BPP supported + CONFIG_NX_DISABLE_2BPP=y + CONFIG_NX_DISABLE_4BPP=y + CONFIG_NX_DISABLE_8BPP=y + CONFIG_NX_DISABLE_24BPP=y + CONFIG_NX_DISABLE_32BPP=y + + Graphics Support -> Font Selections + CONFIG_NXFONTS_CHARBITS=7 + CONFIG_NXFONT_SANS22X29B=y + CONFIG_NXFONT_SANS23X27=y + + Application Configuration -> Examples + CONFIG_EXAMPLES_NXLINES=y + CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x0320 + CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16 + CONFIG_EXAMPLES_NXLINES_LINECOLOR=0xffe0 + CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4 + CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xffe0 + CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0xf7bb + CONFIG_EXAMPLES_NXLINES_BPP=16 + + STATUS: Not working; reads 0x8999 as device ID. This may perhaps + be due to incorrect jumper settings + + 6. This configuration has been used for verifying the touchscreen on + on the Viewtool LCD module. NOTE: The LCD module can really only + be used on the STM32F103 version of the board. The LCD requires + FSMC support (the touchscreen, however, does not but the touchscreen + is not very meaningful with no LCD). + + System Type -> STM32 Chip Selection: + CONFIG_ARCH_CHIP_STM32F103VC=y : Select STM32F103VCT6 + + With the following modifications, you can include the touchscreen + test program at apps/examples/touchscreen as an NSH built-in + application. You can enable the touchscreen and test by modifying + the default configuration in the following ways: + + Device Drivers + CONFIG_SPI=y : Enable SPI support + CONFIG_SPI_EXCHANGE=y : The exchange() method is supported + + CONFIG_INPUT=y : Enable support for input devices + CONFIG_INPUT_ADS7843E=y : Enable support for the XPT2046 + CONFIG_ADS7843E_SPIDEV=2 : Use SPI2 for communication + CONFIG_ADS7843E_SPIMODE=0 : Use SPI mode 0 + CONFIG_ADS7843E_FREQUENCY=1000000 : SPI BAUD 1MHz + CONFIG_ADS7843E_SWAPXY=y : If landscape orientation + CONFIG_ADS7843E_THRESHX=51 : These will probably need to be tuned + CONFIG_ADS7843E_THRESHY=39 + + System Type -> Peripherals: + CONFIG_STM32_SPI2=y : Enable support for SPI2 + + RTOS Features: + CONFIG_DISABLE_SIGNALS=n : Signals are required + + Library Support: + CONFIG_SCHED_WORKQUEUE=y : Work queue support required + + Applicaton Configuration: + CONFIG_EXAMPLES_TOUCHSCREEN=y : Enable the touchscreen built-int test + + Defaults should be okay for related touchscreen settings. Touchscreen + debug output on USART1 can be enabled with: + + Build Setup: + CONFIG_DEBUG=y : Enable debug features + CONFIG_DEBUG_VERBOSE=y : Enable verbose debug output + CONFIG_DEBUG_INPUT=y : Enable debug output from input devices + + STATUS: Working + + highpri: + + This configuration was used to verify the NuttX high priority, nested + interrupt feature. This is a board-specific test and probably not + of much interest now other than for reference. + + This configuration targets the viewtool board with the STM32F103VCT6 + mounted. It uses TIM6 to generated high rate interrupts for the test. diff --git a/configs/viewtool-stm32f107/highpri/Make.defs b/configs/viewtool-stm32f107/highpri/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..485e163139d427d41b17ecd1db1d582059fb5767 --- /dev/null +++ b/configs/viewtool-stm32f107/highpri/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/viewtool-stm32f107/highpri/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = dfu.ld +else + LDSCRIPT = flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/viewtool-stm32f107/highpri/defconfig b/configs/viewtool-stm32f107/highpri/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ce65df1ebc16aa867f94878579f53c67d3385c2d --- /dev/null +++ b/configs/viewtool-stm32f107/highpri/defconfig @@ -0,0 +1,1008 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +CONFIG_ARCH_CHIP_STM32F103VC=y +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +CONFIG_STM32_HIGHDENSITY=y +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +CONFIG_STM32_TIM6=y +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +CONFIG_ARCH_IRQPRIO=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +CONFIG_ARCH_RAMVECTORS=y + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +CONFIG_ARCH_HIPRI_INTERRUPT=y + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_HYMINI_STM32V is not set +CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="viewtool-stm32f107" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y + +# +# Board-Specific Options +# +CONFIG_VIEWTOOL_HIGHPRI=y +CONFIG_VIEWTOOL_TIM6_FREQUENCY=36000000 +CONFIG_VIEWTOOL_TIM6_PERIOD=36000 +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=22 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="highpri_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/viewtool-stm32f107/highpri/setenv.sh b/configs/viewtool-stm32f107/highpri/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..a593715add3e3320a7c2bde926afbb0b1b733696 --- /dev/null +++ b/configs/viewtool-stm32f107/highpri/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/viewtool-stm32f107/highpri/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/viewtool-stm32f107/include/board-stm32f103vct6.h b/configs/viewtool-stm32f107/include/board-stm32f103vct6.h new file mode 100644 index 0000000000000000000000000000000000000000..54731ecf726e6289d0567a34262a698f98eb3e1d --- /dev/null +++ b/configs/viewtool-stm32f107/include/board-stm32f103vct6.h @@ -0,0 +1,143 @@ +/************************************************************************************ + * configs/viewtool-stm32f107/include/board-stm32f103vct6.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_VIEWTOOL_STM32F107_INCLUDE_BOARD_STM32F103VCT6_H +#define __CONFIGS_VIEWTOOL_STM32F107_INCLUDE_BOARD_STM32F103VCT6_H 1 + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +#include "stm32_rcc.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* On-board crystal frequency is 8MHz (HSE) */ + +#define STM32_BOARD_XTAL 8000000ul + +/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */ + +#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC +#define STM32_CFGR_PLLXTPRE 0 +#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx9 +#define STM32_PLL_FREQUENCY (9*STM32_BOARD_XTAL) + +/* Use the PLL and set the SYSCLK source to be the PLL */ + +#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL +#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY + +/* AHB clock (HCLK) is SYSCLK (72MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (72MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */ + +/* APB2 timers 1 and 8 will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* USB divider -- Divide PLL clock by 1.5 + * + * USB clock = PLLOUT / 1.5 = 72MHz / 1.5 = 48MHz + */ + +#define STM32_CFGR_USBPRE 0 + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 */ + +#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_VIEWTOOL_STM32F107_INCLUDE_BOARD_STM32F103VCT6_H */ diff --git a/configs/viewtool-stm32f107/include/board-stm32f107vct6.h b/configs/viewtool-stm32f107/include/board-stm32f107vct6.h new file mode 100644 index 0000000000000000000000000000000000000000..1c200a133e84d12a78ad625f81c361a6a8f8fc76 --- /dev/null +++ b/configs/viewtool-stm32f107/include/board-stm32f107vct6.h @@ -0,0 +1,153 @@ +/************************************************************************************ + * configs/viewtool-stm32f107/include/board-stm32f107vct6.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_VIEWTOOL_STM32F107_INCLUDE_BOARD_STM32F107VCT6_H +#define __CONFIGS_VIEWTOOL_STM32F107_INCLUDE_BOARD_STM32F107VCT6_H 1 + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +#include "stm32_rcc.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* HSI - 8 MHz RC factory-trimmed + * LSI - 40 KHz RC (30-60KHz, uncalibrated) + * HSE - On-board crystal frequency is 25MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 25000000ul + +#define STM32_HSI_FREQUENCY 8000000ul +#define STM32_LSI_FREQUENCY 40000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* PLL ouput is 72MHz */ + +#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */ +#define STM32_PLL_PLL2MUL RCC_CFGR2_PLL2MULx8 /* 5MHz * 8 => 40MHz */ +#define STM32_PLL_PREDIV1 RCC_CFGR2_PREDIV1d5 /* 40MHz / 5 => 8MHz */ +#define STM32_PLL_PLLMUL RCC_CFGR_PLLMUL_CLKx9 /* 8MHz * 9 => 72Mhz */ +#define STM32_PLL_FREQUENCY (72000000) + +/* SYCLLK and HCLK are the PLL frequency */ + +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB2 clock (PCLK2) is HCLK (72MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */ + +/* APB2 timers 1 and 8 will receive PCLK2. */ + +#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) + +/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) + +/* USB divider -- Divide PLL clock by 1.5 + * + * USB clock = PLLOUT / 1.5 = 72MHz / 1.5 = 48MHz + */ + +#define STM32_CFGR_OTGFSPRE 0 + +/* MCO output driven by PLL3. From above, we already have PLL3 input frequency as: + * + * STM32_PLL_PREDIV2 = 5, 25MHz / 5 => 5MHz + * + * NOTE: The Viewtool DP83848C module has its on, on-board 50MHz clock. No + * MCO clock need be provided on that board. + */ + +#if defined(CONFIG_STM32_MII_MCO) || defined(CONFIG_STM32_RMII_MCO) +# define BOARD_CFGR_MCO_SOURCE RCC_CFGR_PLL3CLK /* Source: PLL3 */ +# define STM32_PLL_PLL3MUL RCC_CFGR2_PLL3MULx10 /* MCO 5MHz * 10 = 50MHz */ +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_VIEWTOOL_STM32F107_INCLUDE_BOARD_STM32F107VCT6_H */ diff --git a/configs/viewtool-stm32f107/include/board.h b/configs/viewtool-stm32f107/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..242feeb67ae213acb2d6ada35566b9bdb931246c --- /dev/null +++ b/configs/viewtool-stm32f107/include/board.h @@ -0,0 +1,168 @@ +/************************************************************************************ + * configs/viewtool-stm32f107/include/board.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_VIEWTOOL_STM32F107_INCLUDE_BOARD_H +#define __CONFIGS_VIEWTOOL_STM32F107_INCLUDE_BOARD_H 1 + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +#include "stm32_rcc.h" +#include "stm32_sdio.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +#if defined(CONFIG_ARCH_CHIP_STM32F107VC) +# include +#elif defined(CONFIG_ARCH_CHIP_STM32F103VC) +# include +#else +# error Unregnized STM32 chip +#endif + +/* LED definitions ******************************************************************/ +/* There are four LEDs on the ViewTool STM32F103/F107 board that can be controlled + * by software: LED1 through LED4. All pulled high and can be illuminated by + * driving the output to low + * + * LED1 PA6 + * LED2 PA7 + * LED3 PB12 + * LED4 PB13 + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_LED3 2 +#define BOARD_LED4 3 +#define BOARD_NLEDS 4 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) +#define BOARD_LED4_BIT (1 << BOARD_LED4) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL Val Meaning LED state + * LED1 LED2 LED3 LED4 + * ----------------- --- ----------------------- ---- ---- ---- ---- */ +#define LED_STARTED 0 /* NuttX has been started ON OFF OFF OFF */ +#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF ON OFF OFF */ +#define LED_IRQSENABLED 2 /* Interrupts enabled ON ON OFF OFF */ +#define LED_STACKCREATED 3 /* Idle stack created OFF OFF ON OFF */ +#define LED_INIRQ 4 /* In an interrupt N/C N/C N/C GLOW */ +#define LED_SIGNAL 4 /* In a signal handler N/C N/C N/C GLOW */ +#define LED_ASSERTION 4 /* An assertion failed N/C N/C N/C GLOW */ +#define LED_PANIC 4 /* The system has crashed N/C N/C N/C FLASH */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* After booting, LED1-3 are not longer used by the system and can be used for + * other purposes by the application (Of course, all LEDs are available to the + * application if CONFIG_ARCH_LEDS is not defined. + */ + +/* Buttons **************************************************************************/ +/* All pulled high and will be sensed low when depressed. + * + * SW2 PC11 Needs J42 closed + * SW3 PC12 Needs J43 closed + * SW4 PA0 Needs J44 closed + */ + +#define BUTTON_SW2 0 +#define BUTTON_SW3 1 +#define BUTTON_SW4 2 +#define NUM_BUTTONS 3 + +#define BUTTON_SW2_BIT (1 << BUTTON_SW2) +#define BUTTON_SW3_BIT (1 << BUTTON_SW3) +#define BUTTON_SW4_BIT (1 << BUTTON_SW4) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_VIEWTOOL_STM32F107_INCLUDE_BOARD_H */ diff --git a/configs/viewtool-stm32f107/netnsh/Make.defs b/configs/viewtool-stm32f107/netnsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..d36b783357972afac0817a01c115177cf3168be7 --- /dev/null +++ b/configs/viewtool-stm32f107/netnsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/viewtool-stm32f107/netnsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = dfu.ld +else + LDSCRIPT = flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/viewtool-stm32f107/netnsh/defconfig b/configs/viewtool-stm32f107/netnsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b355d5ad91362c80127293de0dcbd0ca240c0365 --- /dev/null +++ b/configs/viewtool-stm32f107/netnsh/defconfig @@ -0,0 +1,1343 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +CONFIG_ARCH_CHIP_STM32F107VC=y +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +CONFIG_STM32_CONNECTIVITYLINE=y +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +CONFIG_STM32_HAVE_ETHMAC=y +# CONFIG_STM32_HAVE_I2C2 is not set +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_OTGFS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_ETH_REMAP is not set +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +# CONFIG_STM32_MII is not set +CONFIG_STM32_AUTONEG=y +CONFIG_STM32_PHYSR=16 +# CONFIG_STM32_PHYSR_ALTCONFIG is not set +CONFIG_STM32_PHYSR_SPEED=0x0002 +CONFIG_STM32_PHYSR_100MBPS=0x0000 +CONFIG_STM32_PHYSR_MODE=0x0004 +CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 +# CONFIG_STM32_ETH_PTP is not set +CONFIG_STM32_RMII=y +# CONFIG_STM32_RMII_MCO is not set +CONFIG_STM32_RMII_EXTCLK=y + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_CLOUDCTRL is not set +# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set +# CONFIG_ARCH_BOARD_SHENZHOU is not set +CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="viewtool-stm32f107" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=9 +CONFIG_START_DAY=21 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=650 +CONFIG_NET_ETH_TCP_RECVWNDO=624 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=10 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +# CONFIG_NET_UDP_CHECKSUMS is not set +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +CONFIG_LIBC_NETDB=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +CONFIG_NETUTILS_DHCPC=y +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT_THREAD=y +CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 +CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 + +# +# IP Address Configuration +# +# CONFIG_NSH_DHCPC is not set + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/viewtool-stm32f107/netnsh/setenv.sh b/configs/viewtool-stm32f107/netnsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c799e1203bb06bcf96b62cb0e7751922368c95b8 --- /dev/null +++ b/configs/viewtool-stm32f107/netnsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/viewtool-stm32f107/netnsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/viewtool-stm32f107/nsh/Make.defs b/configs/viewtool-stm32f107/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..55c08e0406d2287c4c0fccdad03914c4bc14bce2 --- /dev/null +++ b/configs/viewtool-stm32f107/nsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/viewtool-stm32f107/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = dfu.ld +else + LDSCRIPT = flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/viewtool-stm32f107/nsh/defconfig b/configs/viewtool-stm32f107/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ef29399bbb04b376decd6e9190b54228c095045e --- /dev/null +++ b/configs/viewtool-stm32f107/nsh/defconfig @@ -0,0 +1,1106 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +CONFIG_ARCH_CHIP_STM32F107VC=y +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +CONFIG_STM32_CONNECTIVITYLINE=y +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +CONFIG_STM32_HAVE_ETHMAC=y +# CONFIG_STM32_HAVE_I2C2 is not set +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_OTGFS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y + +# +# U[S]ART Configuration +# +# CONFIG_USART1_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_CLOUDCTRL is not set +# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set +# CONFIG_ARCH_BOARD_SHENZHOU is not set +CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="viewtool-stm32f107" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2009 +CONFIG_START_MONTH=9 +CONFIG_START_DAY=21 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +CONFIG_ARCH_HAVE_USART1=y +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART1_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/viewtool-stm32f107/nsh/setenv.sh b/configs/viewtool-stm32f107/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..8b5188cf96976690fd76e2ebcd4974c1afb76432 --- /dev/null +++ b/configs/viewtool-stm32f107/nsh/setenv.sh @@ -0,0 +1,78 @@ +#!/bin/bash +# configs/viewtool-stm32f107/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/viewtool-stm32f107/scripts/dfu.ld b/configs/viewtool-stm32f107/scripts/dfu.ld new file mode 100644 index 0000000000000000000000000000000000000000..2658216b1be6333b380b8c46d3724adfc6057413 --- /dev/null +++ b/configs/viewtool-stm32f107/scripts/dfu.ld @@ -0,0 +1,116 @@ +/**************************************************************************** + * configs/viewtool-stm32f107/scripts/dfu.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08003000, LENGTH = 208K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The RAM vector table (if present) should lie at the beginning of SRAM */ + + .ram_vectors : { + *(.ram_vectors) + } > sram + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/viewtool-stm32f107/scripts/flash.ld b/configs/viewtool-stm32f107/scripts/flash.ld new file mode 100644 index 0000000000000000000000000000000000000000..8b6d9332abde4fa02dc7f5f42a3f5b563a4d392e --- /dev/null +++ b/configs/viewtool-stm32f107/scripts/flash.ld @@ -0,0 +1,116 @@ +/**************************************************************************** + * configs/viewtool-stm32f107/scripts/flash.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The RAM vector table (if present) should lie at the beginning of SRAM */ + + .ram_vectors : { + *(.ram_vectors) + } > sram + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/viewtool-stm32f107/src/.gitignore b/configs/viewtool-stm32f107/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/viewtool-stm32f107/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/viewtool-stm32f107/src/Makefile b/configs/viewtool-stm32f107/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..0ce9b9bb079e6eb398ee5b0dfd979dadd5c95a82 --- /dev/null +++ b/configs/viewtool-stm32f107/src/Makefile @@ -0,0 +1,85 @@ +############################################################################ +# configs/viewtool-stm32f107/src/Makefile +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_leds.c stm32_spi.c + +ifeq ($(CONFIG_CAN),y) +CSRCS += stm32_can.c +endif + +ifeq ($(CONFIG_MMCSD),y) +CSRCS += stm32_mmcsd.c +endif + +ifeq ($(CONFIG_STM32_OTGFS),y) # F107 +CSRCS += stm32_usbdev.c +else +ifeq ($(CONFIG_STM32_USB),y) # F103 +CSRCS += stm32_usbdev.c +endif +endif + +ifeq ($(CONFIG_MPL115A),y) +CSRCS += stm32_mpl115a.c +endif + +ifeq ($(CONFIG_INPUT_ADS7843E),y) # F103 +CSRCS += stm32_touchscreen.c +endif + +ifeq ($(CONFIG_LCD_SSD1289),y) # F103 +CSRCS += stm32_ssd1289.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += stm32_usbmsc.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_VIEWTOOL_HIGHPRI),y) +CSRCS += stm32_highpri.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/viewtool-stm32f107/src/stm32_appinit.c b/configs/viewtool-stm32f107/src/stm32_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..5884d7d05316d4d1a4d107aee315eb835dcc01e2 --- /dev/null +++ b/configs/viewtool-stm32f107/src/stm32_appinit.c @@ -0,0 +1,145 @@ +/**************************************************************************** + * config/viewtool-stm32f107/src/stm32_appinit.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_RTC_DRIVER +# include +# include "stm32_rtc.h" +#endif + +#include "viewtool_stm32f107.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Default MMC/SD SLOT number */ + +#ifdef HAVE_MMCSD +# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != VIEWTOOL_MMCSD_SLOTNO +# error "Only one MMC/SD slot: VIEWTOOL_MMCSD_SLOTNO" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO VIEWTOOL_MMCSD_SLOTNO +# endif + +# ifndef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO VIEWTOOL_MMCSD_SLOTNO +# endif +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: rtc_driver_initialize + * + * Description: + * Initialize and register the RTC driver. + * + ****************************************************************************/ + +#ifdef HAVE_RTC_DRIVER +static int rtc_driver_initialize(void) +{ + FAR struct rtc_lowerhalf_s *lower; + int ret; + + /* Instantiate the STM32 lower-half RTC driver */ + + lower = stm32_rtc_lowerhalf(); + if (lower == NULL) + { + sdbg("ERROR: Failed to instantiate the RTC lower-half driver\n"); + ret = -ENOMEM; + } + else + { + /* Bind the lower half driver and register the combined RTC driver + * as /dev/rtc0 + */ + + ret = rtc_initialize(0, lower); + if (ret < 0) + { + sdbg("ERROR: Failed to bind/register the RTC driver: %d\n", ret); + } + } + + return ret; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef HAVE_RTC_DRIVER + (void)rtc_driver_initialize(); +#endif + +#ifdef CONFIG_MPL115A + stm32_mpl115ainitialize("/dev/press"); +#endif + +#ifdef HAVE_MMCSD + return stm32_sdinitialize(CONFIG_NSH_MMCSDSLOTNO); +#else + return OK; +#endif +} diff --git a/configs/viewtool-stm32f107/src/stm32_boot.c b/configs/viewtool-stm32f107/src/stm32_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..67cff2e8f171ccc69d6d25be993de88e095ea782 --- /dev/null +++ b/configs/viewtool-stm32f107/src/stm32_boot.c @@ -0,0 +1,89 @@ +/************************************************************************************ + * configs/viewtool-stm32f107/src/stm32_boot.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include "up_arch.h" +#include "viewtool_stm32f107.h" + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + + /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not + * disabled, and 3) the weak function stm32_usbdev_initialize() has been brought + * into the build. + */ + +#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBDEV) + if (stm32_usbdev_initialize) + { + stm32_usbdev_initialize(); + } +#endif + + /* Configure on-board LEDs (unconditionally). */ + + stm32_led_initialize(); +} diff --git a/configs/viewtool-stm32f107/src/stm32_buttons.c b/configs/viewtool-stm32f107/src/stm32_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..cff85be4c6ea0ce7c73aecdb5262d8a1469b73df --- /dev/null +++ b/configs/viewtool-stm32f107/src/stm32_buttons.c @@ -0,0 +1,169 @@ +/**************************************************************************** + * configs/viewtool-stm32f107/src/stm32_buttons.c + * + * Copyright (C) 2013, 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "viewtool_stm32f107.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each STM3210E-EVAL button. This array is indexed by + * the BUTTON_* and JOYSTICK_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_SW2, GPIO_SW3, GPIO_SW4 +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for some pins but NOT used in this file + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed for most keys. The exception + * is the WAKEUP button. + */ + + bool released = stm32_gpioread(g_buttons[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT and JOYSTICK_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/viewtool-stm32f107/src/stm32_can.c b/configs/viewtool-stm32f107/src/stm32_can.c new file mode 100644 index 0000000000000000000000000000000000000000..c6d0616ee3f31cbfab54aa09dc803dee6ba7d829 --- /dev/null +++ b/configs/viewtool-stm32f107/src/stm32_can.c @@ -0,0 +1,132 @@ +/************************************************************************************ + * configs/viewtool-stm32f107/src/stm32_can.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "stm32.h" +#include "stm32_can.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +/* The STM32F107VC supports CAN1 and CAN2 */ + +#define CAN_PORT 1 + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = stm32_caninitialize(CAN_PORT); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && CONFIG_STM32_CAN1 */ diff --git a/configs/viewtool-stm32f107/src/stm32_highpri.c b/configs/viewtool-stm32f107/src/stm32_highpri.c new file mode 100644 index 0000000000000000000000000000000000000000..ad9677469edd78a7028c0aca6237cfd6a29fc799 --- /dev/null +++ b/configs/viewtool-stm32f107/src/stm32_highpri.c @@ -0,0 +1,278 @@ +/**************************************************************************** + * configs/viewtool-stm32f107/src/stm32_highpri.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include +#include +#include + +#include "up_internal.h" +#include "ram_vectors.h" +#include "stm32_tim.h" + +#include "viewtool_stm32f107.h" + +#ifdef CONFIG_VIEWTOOL_HIGHPRI + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_ARCH_CHIP_STM32F103VC +# warning This only only been verified with CONFIG_ARCH_CHIP_STM32F103VC +#endif + +#ifndef CONFIG_ARCH_HIPRI_INTERRUPT +# error CONFIG_ARCH_HIPRI_INTERRUPT is required +#endif + +#ifndef CONFIG_ARCH_RAMVECTORS +# error CONFIG_ARCH_RAMVECTORS is required +#endif + +#ifndef CONFIG_STM32_TIM6 +# error CONFIG_STM32_TIM6 is required +#endif + +#ifndef CONFIG_VIEWTOOL_TIM6_FREQUENCY +# warning CONFIG_VIEWTOOL_TIM6_FREQUENCY defaulting to STM32_APB1_TIM6_CLKIN +# define CONFIG_VIEWTOOL_TIM6_FREQUENCY STM32_APB1_TIM6_CLKIN +#endif + +#ifndef CONFIG_VIEWTOOL_TIM6_PERIOD +# warning CONFIG_VIEWTOOL_TIM6_PERIOD defaulting to 1MS +# define CONFIG_VIEWTOOL_TIM6_PERIOD (CONFIG_VIEWTOOL_TIM6_FREQUENCY / 1000) +#endif + +#ifndef CONFIG_ARCH_IRQPRIO +# error CONFIG_ARCH_IRQPRIO is required +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +struct highpri_s +{ + FAR struct stm32_tim_dev_s *dev; /* TIM6 driver instance */ + volatile uint64_t basepri[16]; + volatile uint64_t handler; + volatile uint64_t thread; +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct highpri_s g_highpri; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tim6_handler + * + * Description: + * This is the handler for the high speed TIM6 interrupt. + * + ****************************************************************************/ + +void tim6_handler(void) +{ + uint8_t basepri; + int index; + + /* Acknowledge the timer interrupt */ + + STM32_TIM_ACKINT(g_highpri.dev, 0); + + /* Increment the count associated with the current basepri */ + + basepri = getbasepri(); + index = ((basepri >> 4) & 15); + g_highpri.basepri[index]++; + + /* Check if we are in an interrupt handle */ + + if (up_interrupt_context()) + { + g_highpri.handler++; + } + else + { + g_highpri.thread++; + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: highpri_main + * + * Description: + * Main entry point in into the high priority interrupt test. + * + ****************************************************************************/ + +int highpri_main(int argc, char *argv[]) +{ + FAR struct stm32_tim_dev_s *dev; + uint64_t basepri[16]; + uint64_t handler; + uint64_t thread; + uint64_t total; + uint32_t seconds; + int prescaler; + int ret; + int i; + + printf("highpri_main: Started\n"); + + /* Configure basic timer TIM6 and enable interrupts */ + + dev = stm32_tim_init(6); + if (!dev) + { + fprintf(stderr, "highpri_main: ERROR: stm32_tim_init(6) failed\n"); + return EXIT_FAILURE; + } + + g_highpri.dev = dev; + + prescaler = STM32_TIM_SETCLOCK(dev, CONFIG_VIEWTOOL_TIM6_FREQUENCY); + printf("TIM6 CLKIN=%d Hz, Frequency=%d Hz, prescaler=%d\n", + STM32_APB1_TIM6_CLKIN, CONFIG_VIEWTOOL_TIM6_FREQUENCY, prescaler); + + STM32_TIM_SETPERIOD(dev, CONFIG_VIEWTOOL_TIM6_PERIOD); + printf("TIM6 period=%d cyles; interrupt rate=%d Hz\n", + CONFIG_VIEWTOOL_TIM6_PERIOD, + CONFIG_VIEWTOOL_TIM6_FREQUENCY/CONFIG_VIEWTOOL_TIM6_PERIOD); + + /* Attach TIM6 ram vector */ + + ret = up_ramvec_attach(STM32_IRQ_TIM6, tim6_handler); + if (ret < 0) + { + fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n", ret); + return EXIT_FAILURE; + } + + /* Set the priority of the TIM6 interrupt vector */ + + ret = up_prioritize_irq(STM32_IRQ_TIM6, NVIC_SYSH_HIGH_PRIORITY); + if (ret < 0) + { + fprintf(stderr, "highpri_main: ERROR: up_prioritize_irq failed: %d\n", ret); + return EXIT_FAILURE; + } + + /* Enable the timer interrupt at the NVIC and at TIM6 */ + + up_enable_irq(STM32_IRQ_TIM6); + STM32_TIM_ENABLEINT(dev, 0); + + /* Monitor interrupts */ + + seconds = 0; + for (;;) + { + /* Flush stdout and wait a bit */ + + fflush(stdout); + sleep(1); + seconds++; + + /* Sample counts so that they are not volatile. Missing a count now + * and then is a normal consequence of this design. + */ + + for (i = 0; i < 16; i++) + { + basepri[i] = g_highpri.basepri[i]; + } + + handler = g_highpri.handler; + thread = g_highpri.thread; + + /* Then print out what is happening */ + + printf("Elapsed time: %d seconds\n\n", seconds); + for (i = 0, total = 0; i < 16; i++) + { + total += basepri[i]; + } + + if (total > 0) + { + for (i = 0; i < 16; i++) + { + if (basepri[i] > 0) + { + printf(" basepri[%02x]: %lld (%d%%)\n", + i << 4, basepri[i], + (int)((100* basepri[i] + (total / 2)) / total)); + } + } + } + + total = handler + thread; + if (total > 0) + { + printf(" Handler: %lld (%d%%)\n", + handler, (int)((100*handler + (total / 2)) / total)); + printf(" Thread: %lld (%d%%)\n\n", + thread, (int)((100*thread + (total / 2)) / total)); + } + } + + return EXIT_SUCCESS; +} + +#endif /* CONFIG_VIEWTOOL_HIGHPRI */ diff --git a/configs/viewtool-stm32f107/src/stm32_leds.c b/configs/viewtool-stm32f107/src/stm32_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..f6ba968118a7373f6edda1c559b5adeff565ff3a --- /dev/null +++ b/configs/viewtool-stm32f107/src/stm32_leds.c @@ -0,0 +1,311 @@ +/**************************************************************************** + * configs/viewtool-stm32f107/src/stm32_leds.c + * + * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "stm32_gpio.h" +#include "viewtool_stm32f107.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_onbits + * + * Description: + * Clear all LEDs to the bit encoded state + * + ****************************************************************************/ + +static void led_onbits(unsigned int clrbits) +{ + if ((clrbits & BOARD_LED1_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED1, false); + } + + if ((clrbits & BOARD_LED2_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED2, false); + } + + if ((clrbits & BOARD_LED3_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED3, false); + } + + if ((clrbits & BOARD_LED4_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED4, false); + } +} + +/**************************************************************************** + * Name: led_offbits + * + * Description: + * Clear all LEDs to the bit encoded state + * + ****************************************************************************/ + +static void led_offbits(unsigned int clrbits) +{ + if ((clrbits & BOARD_LED1_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED1, true); + } + + if ((clrbits & BOARD_LED2_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED2, true); + } + + if ((clrbits & BOARD_LED3_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED3, true); + } + + if ((clrbits & BOARD_LED4_BIT) != 0) + { + stm32_gpiowrite(GPIO_LED4, true); + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_led_initialize + * + * Description: + * Configure LEDs. LEDs are left in the OFF state. + * + ****************************************************************************/ + +void stm32_led_initialize(void) +{ + /* Configure LED1-4 GPIOs for output. Initial state is OFF */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_autoled_on + * + * Description: + * Select the "logical" ON state: + * + * SYMBOL Val Meaning LED state + * LED1 LED2 LED3 LED4 + * ----------------- --- ----------------------- ---- ---- ---- ---- + * LED_STARTED 0 NuttX has been started ON OFF OFF OFF + * LED_HEAPALLOCATE 1 Heap has been allocated OFF ON OFF OFF + * LED_IRQSENABLED 2 Interrupts enabled ON ON OFF OFF + * LED_STACKCREATED 3 Idle stack created OFF OFF ON OFF + * LED_INIRQ 4 In an interrupt N/C N/C N/C GLOW + * LED_SIGNAL 4 In a signal handler N/C N/C N/C GLOW + * LED_ASSERTION 4 An assertion failed N/C N/C N/C GLOW + * LED_PANIC 4 The system has crashed N/C N/C N/C FLASH + * ED_IDLE MCU is is sleep mode Not used + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_on(int led) +{ + switch (led) + { + case 0: + led_offbits(BOARD_LED2_BIT | BOARD_LED3_BIT |BOARD_LED4_BIT); + led_onbits(BOARD_LED1_BIT); + break; + + case 1: + led_offbits(BOARD_LED1_BIT | BOARD_LED3_BIT |BOARD_LED4_BIT); + led_onbits(BOARD_LED2_BIT); + break; + + case 2: + led_offbits(BOARD_LED3_BIT |BOARD_LED4_BIT); + led_onbits(BOARD_LED1_BIT | BOARD_LED2_BIT); + break; + + case 3: + led_offbits(BOARD_LED1_BIT | BOARD_LED2_BIT |BOARD_LED4_BIT); + led_onbits(BOARD_LED3_BIT); + break; + + case 4: + stm32_gpiowrite(GPIO_LED4, false); + break; + } +} +#endif + +/**************************************************************************** + * Name: board_autoled_off + * + * Description: + * Select the "logical" OFF state: + * + * SYMBOL Val Meaning LED state + * LED1 LED2 LED3 LED4 + * ----------------- --- ----------------------- ---- ---- ---- ---- + * LED_STARTED 0 NuttX has been started ON OFF OFF OFF + * LED_HEAPALLOCATE 1 Heap has been allocated OFF ON OFF OFF + * LED_IRQSENABLED 2 Interrupts enabled ON ON OFF OFF + * LED_STACKCREATED 3 Idle stack created OFF OFF ON OFF + * LED_INIRQ 4 In an interrupt N/C N/C N/C GLOW + * LED_SIGNAL 4 In a signal handler N/C N/C N/C GLOW + * LED_ASSERTION 4 An assertion failed N/C N/C N/C GLOW + * LED_PANIC 4 The system has crashed N/C N/C N/C FLASH + * ED_IDLE MCU is is sleep mode Not used + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_off(int led) +{ + switch (led) + { + case 0: + case 1: + case 2: + case 3: + break; + + case 4: + stm32_gpiowrite(GPIO_LED4, true); + break; + } +} +#endif + +/************************************************************************************ + * Name: board_userled_initialize, board_userled, and board_userled_all + * + * Description: + * These interfaces allow user control of the board LEDs. + * + * If CONFIG_ARCH_LEDS is defined, then NuttX will control both on-board LEDs up + * until the completion of boot. The it will continue to control LED2; LED1 is + * avaiable for application use. + * + * If CONFIG_ARCH_LEDS is not defined, then both LEDs are available for application + * use. + * + ************************************************************************************/ + +void board_userled_initialize(void) +{ + /* Already initialized by stm32_led_initialize */ +} + +void board_userled(int led, bool ledon) +{ + uint32_t pinset; + + switch (led) + { + case BOARD_LED1: + pinset = GPIO_LED1; + break; + + case BOARD_LED2: + pinset = GPIO_LED2; + break; + + case BOARD_LED3: + pinset = GPIO_LED3; + break; + + case BOARD_LED4: +#ifndef CONFIG_ARCH_LEDS + pinset = GPIO_LED4; + break; +#endif + default: + return; + } + + stm32_gpiowrite(pinset, !ledon); +} + +void board_userled_all(uint8_t ledset) +{ +#ifdef CONFIG_ARCH_LEDS + led_onbits(ledset & ~BOARD_LED4_BIT); + led_offbits(~(ledset | BOARD_LED4_BIT)); +#else + led_onbits(ledset); + led_offbits(~ledset); +#endif +} diff --git a/configs/viewtool-stm32f107/src/stm32_mmcsd.c b/configs/viewtool-stm32f107/src/stm32_mmcsd.c new file mode 100644 index 0000000000000000000000000000000000000000..0ca39d6b062bcea91461b6f6a5f2cafdabd55619 --- /dev/null +++ b/configs/viewtool-stm32f107/src/stm32_mmcsd.c @@ -0,0 +1,133 @@ +/**************************************************************************** + * config/viewtool-stm32f107/src/up_mmcsd.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "stm32_sdio.h" +#include "viewtool_stm32f107.h" + +/* Only the STM32F103 supports the SDIO interface */ + +#ifdef CONFIG_ARCH_CHIP_STM32F103VC + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#define HAVE_MMCSD 1 /* Assume that we have SD support */ +#define STM32_MMCSDSLOTNO 0 /* There is only one slot */ + +/* Can't support MMC/SD features if the SDIO peripheral is disabled */ + +#ifndef CONFIG_STM32_SDIO +# undef HAVE_MMCSD +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# undef HAVE_MMCSD +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires CONFIG_DISABLE_MOUNTPOINT=n + * and CONFIG_STM32_SDIO=y + * + ****************************************************************************/ + +int stm32_sdinitialize(int minor) +{ +#ifdef HAVE_MMCSD + FAR struct sdio_dev_s *sdio; + int ret; + + /* Configure the card-detect GPIO */ +#warning REVISIT: Missing logic + + /* First, get an instance of the SDIO interface */ + + sdio = sdio_initialize(STM32_MMCSDSLOTNO); + if (!sdio) + { + fdbg("Failed to initialize SDIO slot %d\n", STM32_MMCSDSLOTNO); + return -ENODEV; + } + + fvdbg("Initialized SDIO slot %d\n", STM32_MMCSDSLOTNO); + + /* Now bind the SDIO interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(minor, sdio); + if (ret != OK) + { + fdbg("Failed to bind SDIO slot %d to the MMC/SD driver, minor=%d\n", + STM32_MMCSDSLOTNO, minor); + } + + fvdbg("Bound SDIO slot %d to the MMC/SD driver, minor=%d\n", + STM32_MMCSDSLOTNO, minor); + + /* Then let's guess and say that there is a card in the slot. I need to check to + * see if the M3 Wildfire board supports a GPIO to detect if there is a card in + * the slot. + */ +#warning REVISIT: Need to read the current state of the card-detect pin +#warning REVISIT: Need to support interrupts from the card-detect pin + sdio_mediachange(sdio, true); +#endif + return OK; +} + +#endif /* CONFIG_ARCH_CHIP_STM32F103VC */ + diff --git a/configs/viewtool-stm32f107/src/stm32_mpl115a.c b/configs/viewtool-stm32f107/src/stm32_mpl115a.c new file mode 100644 index 0000000000000000000000000000000000000000..45cce7e9c5ec6474344406fa1e881f2679c264d1 --- /dev/null +++ b/configs/viewtool-stm32f107/src/stm32_mpl115a.c @@ -0,0 +1,101 @@ +/************************************************************************************ + * configs/greenbone/src/stm32_mpl115a.c + * + * Copyright (C) 2015 Alan Carvalho de Assis. All rights reserved. + * Author: Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32.h" +#include "stm32_spi.h" +#include "viewtool_stm32f107.h" + +#if defined(CONFIG_SPI) && defined(CONFIG_MPL115A) && defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define MPL115A_SPI_PORTNO 3 /* On SPI3 */ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_mpl115ainitialize + * + * Description: + * Initialize and register the MPL115A Pressure Sensor driver. + * + * Input parameters: + * devpath - The full path to the driver to register. E.g., "/dev/press0" + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ************************************************************************************/ + +int stm32_mpl115ainitialize(FAR const char *devpath) +{ + FAR struct spi_dev_s *spi; + int ret; + + spi = stm32_spibus_initialize(MPL115A_SPI_PORTNO); + + if (!spi) + { + return -ENODEV; + } + + /* Then register the barometer sensor */ + + ret = mpl115a_register(devpath, spi); + if (ret < 0) + { + sndbg("Error registering MPL115A\n"); + } + + return ret; +} + +#endif /* CONFIG_SPI && CONFIG_MPL115A && CONFIG_STM32_SPI3 */ diff --git a/configs/viewtool-stm32f107/src/stm32_spi.c b/configs/viewtool-stm32f107/src/stm32_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..6f9cca78b213f8f001bb1c2a899a131814fb9f7b --- /dev/null +++ b/configs/viewtool-stm32f107/src/stm32_spi.c @@ -0,0 +1,186 @@ +/************************************************************************************ + * configs/viewtool-stm32f107/src/stm32_spi.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32.h" +#include "viewtool_stm32f107.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG too) */ + +#undef SPI_DEBUG /* Define to enable debug */ +#undef SPI_VERBOSE /* Define to enable verbose debug */ + +#ifdef SPI_DEBUG +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Viewtool stm32f103/107 + * board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ + /* NOTE: Clocking for SPIx was already provided in stm32_rcc.c. + * Configurations of SPI pins is performed in stm32_spi.c. + * Here, we only initialize chip select pins unique to the board + * architecture. + */ + +#if defined(CONFIG_STM32_SPI2) && defined(CONFIG_INPUT_ADS7843E) + /* Configure the XPT2046 SPI2 CS pin as an output */ + + (void)stm32_configgpio(GPIO_LCDTP_CS); +#endif + +#if defined(CONFIG_STM32_SPI3) && defined(CONFIG_MPL115A) + /* Configure the MPL115A SPI3 CS pin as an output */ + + (void)stm32_configgpio(GPIO_MPL115A_CS); +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + +#ifdef CONFIG_INPUT_ADS7843E + /* Select/de-select the touchscreen */ + + if (devid == SPIDEV_TOUCHSCREEN) + { + stm32_gpiowrite(GPIO_LCDTP_CS, !selected); + } +#endif +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 || CONFIG_STM32_SPI3*/ diff --git a/configs/viewtool-stm32f107/src/stm32_ssd1289.c b/configs/viewtool-stm32f107/src/stm32_ssd1289.c new file mode 100644 index 0000000000000000000000000000000000000000..c938e80852d0730dfd3f48a4145a8445430eae18 --- /dev/null +++ b/configs/viewtool-stm32f107/src/stm32_ssd1289.c @@ -0,0 +1,608 @@ +/************************************************************************************ + * configs/viewtool-stm32f107/src/ssd1289.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "stm32.h" +#include "viewtool_stm32f107.h" + +#ifdef CONFIG_LCD_SSD1289 + +/************************************************************************************** + * Pre-processor Definitions + **************************************************************************************/ +/* Configuration **********************************************************************/ + +#ifndef CONFIG_STM32_FSMC +# error "CONFIG_STM32_FSMC is required to use the LCD" +#endif + +/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must + * also be enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_GRAPHICS +# undef CONFIG_DEBUG_LCD +#endif + +#ifndef CONFIG_DEBUG_VERBOSE +# undef CONFIG_DEBUG_LCD +#endif + +/* Color depth and format */ + +#define LCD_BPP 16 +#define LCD_COLORFMT FB_FMT_RGB16_565 + +/* Display Resolution */ + +#if defined(CONFIG_LCD_LANDSCAPE) +# define LCD_XRES 320 +# define LCD_YRES 240 +#else +# define LCD_XRES 240 +# define LCD_YRES 320 +#endif + +#define LCD_BL_TIMER_PERIOD 8999 + +/* LCD is connected to the FSMC_Bank1_NOR/SRAM1 and NE1 is used as chip select signal */ +/* RS <==> A16 */ + +#define LCD_INDEX 0x60000000 /* RS = 0 */ +#define LCD_DATA 0x60020000 /* RS = 1 */ + +/* Debug ******************************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/************************************************************************************** + * Private Type Definition + **************************************************************************************/ + +/************************************************************************************** + * Private Function Prototypes + **************************************************************************************/ +/* Low Level LCD access */ + +static void stm32_select(FAR struct ssd1289_lcd_s *dev); +static void stm32_deselect(FAR struct ssd1289_lcd_s *dev); +static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index); +#ifndef CONFIG_SSD1289_WRONLY +static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev); +#endif +static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data); +static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power); + +static void stm32_extmemgpios(const uint16_t *gpios, int ngpios); +static void stm32_enablefsmc(void); + +/************************************************************************************** + * Private Data + **************************************************************************************/ +/* LCD + * + * An LCD may be connected via J11. Only the the STM32F103 supports the FSMC signals + * needed to drive the LCD. + * + * The LCD features an (1) HY32D module with built-in SSD1289 LCD controller, and (a) + * a XPT2046 touch screen controller. + * + * LCD Connector + * ------------- + * + * ----------------------------- ------------------------ -------------------------------- + * Connector J11 GPIO CONFIGURATION(s) + * PIN SIGNAL LEGEND (F103 only) LCD Module + * --- ------------- ----------- ------------------------ -------------------------------- + * 1 VDD_5 NC N/A 5V --- + * 2 GND GND N/A GND --- + * 3 PD14 DATA0 GPIO_NPS_D0 D0 HY32D + * 4 PD15 DATA1 GPIO_NPS_D1 D1 HY32D + * 5 PD0 DATA2 GPIO_NPS_D2 D2 HY32D + * 6 PD1 DATA3 GPIO_NPS_D3 D3 HY32D + * 7 PE7 DATA4 GPIO_NPS_D4 D4 HY32D + * 8 PE8 DATA5 GPIO_NPS_D5 D5 HY32D + * 9 PE9 DATA6 GPIO_NPS_D6 D6 HY32D + * 10 PE10 DATA7 GPIO_NPS_D7 D7 HY32D + * 11 PE11 DATA8 GPIO_NPS_D8 D8 HY32D + * 12 PE12 DATA9 GPIO_NPS_D9 D9 HY32D + * 13 PE13 DATA10 GPIO_NPS_D10 D10 HY32D + * 14 PE14 DATA11 GPIO_NPS_D11 D11 HY32D + * 15 PE15 DATA12 GPIO_NPS_D12 D12 HY32D + * 16 PD8 DATA13 GPIO_NPS_D13 D13 HY32D + * 17 PD9 DATA14 GPIO_NPS_D14 D14 HY32D + * 18 PD10 DATA15 GPIO_NPS_D15 D15 HY32D + * 19 (3) LCD_CS GPIO_NPS_NE1 CS HY32D + * 20 PD11 LCD_RS GPIO_NPS_A16 RS HY32D + * 21 PD5 LCD_R/W GPIO_NPS_NWE WR HY32D + * 22 PD4 LCD_RD GPIO_NPS_NOE RD HY32D + * 23 PB1 LCD_RESET (GPIO) RESET HY32D + * 24 N/C NC N/A TE (unused?) + * 25 VDD_3.3 BL_VCC N/A BLVDD CA6219 (Drives LCD backlight) + * 26 GND BL_GND N/A BLGND CA6219 + * 27 PB0 BL_PWM GPIO_TIM3_CH3OUT(2) BL_CNT CA6219 + * 28 PC5 LCDTP_IRQ (GPIO) TP_IRQ XPT2046 + * 29 PC4 LCDTP_CS (GPIO) TP_CS XPT2046 + * 30 PB13 LCDTP_CLK GPIO_SPI2_SCK TP_SCK XPT2046 + * 31 PB15 LCDTP_DIN GPIO_SPI2_MOSI TP_SI XPT2046 + * 32 PB14 LCDTP_DOUT GPIO_SPI2_MISO TP_SO XPT2046 + * 33 VDD_3.3 VDD_3.3 N/A 3.3V --- + * 34 GND GND N/A GND --- + * --- ------------- ----------- ------------------------ -------------------------------- + * + * NOTES: + * 1) Only the F103 version of the board supports the FSMC + * 2) No remap + * 3) LCD_CS is controlled by J13 JUMPER4 (under the LCD unfortunately): + * + * 1->2 : PD7 (GPIO_NPS_NE1) enables the multiplexor : 1E\ enable input (active LOW) + * 3->4 : PD13 provides 1A0 input (1A1 is grounded). : 1A0 address input + * So will chip enable to either LCD_CS or + * Flash_CS. + * 5->6 : 1Y0 output to LCD_CS : 1Y0 address output + * 7->8 : 1Y1 output to Flash_CE : 1Y1 address output + * + * Truth Table: + * 1E\ 1A0 1A1 1Y0 1Y1 + * --- --- --- --- --- + * HI N/A N/A HI HI + * LO LO LO LO HI + * LO HI LO HI LO + */ + +const uint16_t fsmc_gpios[] = +{ + /* A16... A23. REVIST: only A16 is used by the LCD */ + + GPIO_NPS_A16, GPIO_NPS_A17, GPIO_NPS_A18, GPIO_NPS_A19, GPIO_NPS_A20, + GPIO_NPS_A21, GPIO_NPS_A22, GPIO_NPS_A23, + + /* D0... D15 */ + + GPIO_NPS_D0, GPIO_NPS_D1, GPIO_NPS_D2, GPIO_NPS_D3, GPIO_NPS_D4, + GPIO_NPS_D5, GPIO_NPS_D6, GPIO_NPS_D7, GPIO_NPS_D8, GPIO_NPS_D9, + GPIO_NPS_D10, GPIO_NPS_D11, GPIO_NPS_D12, GPIO_NPS_D13, GPIO_NPS_D14, + GPIO_NPS_D15, + + /* NOE, NWE, and NE1 */ + + GPIO_NPS_NOE, GPIO_NPS_NWE, GPIO_NPS_NE1 +}; + +#define NGPIOS (sizeof(fsmc_gpios)/sizeof(uint16_t)) + +/* This is the driver state structure */ + +static struct ssd1289_lcd_s g_ssd1289 = +{ + .select = stm32_select, + .deselect = stm32_deselect, + .index = stm32_index, +#ifndef CONFIG_SSD1289_WRONLY + .read = stm32_read, +#endif + .write = stm32_write, + .backlight = stm32_backlight +}; + +/* The saved instance of the LCD driver */ + +static FAR struct lcd_dev_s *g_ssd1289drvr; + +/************************************************************************************** + * Private Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: stm32_select + * + * Description: + * Select the LCD device + * + **************************************************************************************/ + +static void stm32_select(FAR struct ssd1289_lcd_s *dev) +{ + /* Does not apply to this hardware */ +} + +/************************************************************************************** + * Name: stm32_deselect + * + * Description: + * De-select the LCD device + * + **************************************************************************************/ + +static void stm32_deselect(FAR struct ssd1289_lcd_s *dev) +{ + /* Does not apply to this hardware */ +} + +/************************************************************************************** + * Name: stm32_index + * + * Description: + * Set the index register + * + **************************************************************************************/ + +static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index) +{ + putreg16((uint16_t)index, LCD_INDEX); +} + +/************************************************************************************** + * Name: stm32_read + * + * Description: + * Read LCD data (GRAM data or register contents) + * + **************************************************************************************/ + +#ifndef CONFIG_SSD1289_WRONLY +static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev) +{ + return getreg16(LCD_DATA); +} +#endif + +/************************************************************************************** + * Name: stm32_write + * + * Description: + * Write LCD data (GRAM data or register contents) + * + **************************************************************************************/ + +static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data) +{ + putreg16((uint16_t)data, LCD_DATA); +} + +/************************************************************************************** + * Name: stm32_backlight + * + * Description: + * Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). + * Used here to set pwm duty on timer used for backlight. + * + **************************************************************************************/ + +static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power) +{ + DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER); + + /* Set new power level */ + + if (power > 0) + { + uint32_t duty; + + /* Calculate the new backlight duty. It is a fraction of the timer + * period based on the ration of the current power setting to the + * maximum power setting. + */ + + duty = ((uint32_t)LCD_BL_TIMER_PERIOD * (uint32_t)power) / CONFIG_LCD_MAXPOWER; + if (duty >= LCD_BL_TIMER_PERIOD) + { + duty = LCD_BL_TIMER_PERIOD - 1; + } + + putreg16((uint16_t)duty, STM32_TIM3_CCR2); + } + else + { + putreg16((uint16_t)0, STM32_TIM3_CCR2); + } +} + +static void init_lcd_backlight(void) +{ + uint16_t ccmr; + uint16_t ccer; + + /* Configure PB5 as TIM3 CH2 output */ + + stm32_configgpio(GPIO_TIM3_CH2OUT); + + /* Enable timer 3 clocking */ + + modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM3EN); + + /* Reset timer 3 */ + + modifyreg32(STM32_RCC_APB1RSTR, 0, RCC_APB1RSTR_TIM3RST); + modifyreg32(STM32_RCC_APB1RSTR, RCC_APB1RSTR_TIM3RST, 0); + + /* Reset the Counter Mode and set the clock division */ + + putreg16(0, STM32_TIM3_CR1); + + /* Set the Autoreload value */ + + putreg16(LCD_BL_TIMER_PERIOD, STM32_TIM3_ARR); + + /* Set the Prescaler value */ + + putreg16(0, STM32_TIM3_PSC); + + /* Generate an update event to reload the Prescaler value immediatly */ + + putreg16(ATIM_EGR_UG, STM32_TIM3_EGR); + + /* Disable the Channel 2 */ + + ccer = getreg16(STM32_TIM3_CCER); + ccer &= ~ATIM_CCER_CC2E; + putreg16(ccer, STM32_TIM3_CCER); + + /* Select the Output Compare Mode Bits */ + + ccmr = getreg16(STM32_TIM3_CCMR1); + ccmr &= ATIM_CCMR1_OC2M_MASK; + ccmr |= (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR1_OC2M_SHIFT); + + putreg16(0, STM32_TIM3_CCR2); + + /* Select the output polarity level == HIGH */ + + ccer &= !ATIM_CCER_CC2P; + + /* Enable channel 2*/ + + ccer |= ATIM_CCER_CC2E; + + /* Write the timer configuration */ + + putreg16(ccmr, STM32_TIM3_CCMR1); + putreg16(ccer, STM32_TIM3_CCER); + + /* Set the auto preload enable bit */ + + modifyreg16(STM32_TIM3_CR1, 0, ATIM_CR1_ARPE); + + /* Enable Backlight Timer !!!!*/ + + modifyreg16(STM32_TIM3_CR1, 0, ATIM_CR1_CEN); + + /* Dump timer3 registers */ + + lcddbg("APB1ENR: %08x\n", getreg32(STM32_RCC_APB1ENR)); + lcddbg("CR1: %04x\n", getreg32(STM32_TIM3_CR1)); + lcddbg("CR2: %04x\n", getreg32(STM32_TIM3_CR2)); + lcddbg("SMCR: %04x\n", getreg32(STM32_TIM3_SMCR)); + lcddbg("DIER: %04x\n", getreg32(STM32_TIM3_DIER)); + lcddbg("SR: %04x\n", getreg32(STM32_TIM3_SR)); + lcddbg("EGR: %04x\n", getreg32(STM32_TIM3_EGR)); + lcddbg("CCMR1: %04x\n", getreg32(STM32_TIM3_CCMR1)); + lcddbg("CCMR2: %04x\n", getreg32(STM32_TIM3_CCMR2)); + lcddbg("CCER: %04x\n", getreg32(STM32_TIM3_CCER)); + lcddbg("CNT: %04x\n", getreg32(STM32_TIM3_CNT)); + lcddbg("PSC: %04x\n", getreg32(STM32_TIM3_PSC)); + lcddbg("ARR: %04x\n", getreg32(STM32_TIM3_ARR)); + lcddbg("CCR1: %04x\n", getreg32(STM32_TIM3_CCR1)); + lcddbg("CCR2: %04x\n", getreg32(STM32_TIM3_CCR2)); + lcddbg("CCR3: %04x\n", getreg32(STM32_TIM3_CCR3)); + lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4)); + lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4)); + lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4)); + lcddbg("DMAR: %04x\n", getreg32(STM32_TIM3_DMAR)); +} + +/************************************************************************************ + * Name: stm32_selectlcd + * + * Description: + * Initialize the memory controller (FSMC) + * + ************************************************************************************/ + +static void stm32_selectlcd(void) +{ + /* Configure new GPIO state */ + + stm32_extmemgpios(fsmc_gpios, NGPIOS); + + /* Enable AHB clocking to the FSMC */ + + stm32_enablefsmc(); + + /* Bank1 NOR/SRAM control register configuration */ + + putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32( + FSMC_BTR_ADDSET(1)|FSMC_BTR_ADDHLD(0)|FSMC_BTR_DATAST(2)|FSMC_BTR_BUSTURN(0)| FSMC_BTR_CLKDIV(0)|FSMC_BTR_DATLAT(0)|FSMC_BTR_ACCMODA, + STM32_FSMC_BTR1); + + /* As ext mode is not active the write timing is ignored!! */ + + putreg32(0xffffffff, STM32_FSMC_BWTR1); + + /* Enable the bank by setting the MBKEN bit */ + + putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, + STM32_FSMC_BCR1); + + /* Configure the LCD RESET\ pin. Initial value will take the LCD out of reset */ + + stm32_configgpio(GPIO_LCD_RESET); +} + +/************************************************************************************ + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for NOR or SRAM + * + ************************************************************************************/ + +static void stm32_extmemgpios(const uint16_t *gpios, int ngpios) +{ + int i; + + /* Configure GPIOs */ + + for (i = 0; i < ngpios; i++) + { + stm32_configgpio(gpios[i]); + } +} + +/************************************************************************************ + * Name: stm32_enablefsmc + * + * Description: + * enable clocking to the FSMC module + * + ************************************************************************************/ + +static void stm32_enablefsmc(void) +{ + uint32_t regval; + + /* Enable AHB clocking to the FSMC */ + + regval = getreg32( STM32_RCC_AHBENR); + regval |= RCC_AHBENR_FSMCEN; + putreg32(regval, STM32_RCC_AHBENR); +} + +/************************************************************************************** + * Public Functions + **************************************************************************************/ + +/************************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with the power + * setting at 0 (full off). + * + **************************************************************************************/ + +int board_lcd_initialize(void) +{ + /* Only initialize the driver once */ + + if (!g_ssd1289drvr) + { + lcdvdbg("Initializing\n"); + + /* Initialize the backlight */ + + init_lcd_backlight(); + + /* Configure GPIO pins and configure the FSMC to support the LCD */ + + stm32_selectlcd(); + + /* Configure and enable the LCD */ + + up_mdelay(50); + g_ssd1289drvr = ssd1289_lcdinitialize(&g_ssd1289); + if (!g_ssd1289drvr) + { + lcddbg("ERROR: ssd1289_lcdinitialize failed\n"); + return -ENODEV; + } + } + + /* Turn the display off */ + + g_ssd1289drvr->setpower(g_ssd1289drvr, 0); + return OK; +} + +/************************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This allows support + * for multiple LCD devices. + * + **************************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return g_ssd1289drvr; +} + +/************************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Unitialize the LCD support + * + **************************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* Turn the display off */ + + g_ssd1289drvr->setpower(g_ssd1289drvr, 0); +} + +#endif /* CONFIG_LCD_SSD1289 */ diff --git a/configs/viewtool-stm32f107/src/stm32_touchscreen.c b/configs/viewtool-stm32f107/src/stm32_touchscreen.c new file mode 100644 index 0000000000000000000000000000000000000000..7106fcdc96face8ef286a555c6a683e53463f3cc --- /dev/null +++ b/configs/viewtool-stm32f107/src/stm32_touchscreen.c @@ -0,0 +1,328 @@ +/************************************************************************************ + * configs/viewtools-stm32f107/src/stm32_touchscreen.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include "stm32_gpio.h" +#include "stm32_spi.h" + +#include "viewtool_stm32f107.h" + +#ifdef CONFIG_INPUT_ADS7843E + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_STM32_SPI2 +# error CONFIG_STM32_SPI2 is required for touchscreen support +#endif + +#ifndef CONFIG_ADS7843E_FREQUENCY +# define CONFIG_ADS7843E_FREQUENCY 500000 +#endif + +#ifndef CONFIG_ADS7843E_DEVMINOR +# define CONFIG_ADS7843E_DEVMINOR 0 +#endif + +/* The touchscreen communicates on SPI2 */ + +#define TSC_DEVNUM 2 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct viewtool_tscinfo_s +{ + /* Standard ADS7843/XTP2046 interface */ + + struct ads7843e_config_s config; + + /* Extensions for the viewtool board */ + + xcpt_t handler; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the XPT2046 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the XPT2046 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + */ + +static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr); +static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable); +static void tsc_clear(FAR struct ads7843e_config_s *state); +static bool tsc_busy(FAR struct ads7843e_config_s *state); +static bool tsc_pendown(FAR struct ads7843e_config_s *state); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the XPT2046 + * driver. This structure provides information about the configuration + * of the XPT2046 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writable because, under certain circumstances, the driver + * may modify certain values. + */ + +static struct viewtool_tscinfo_s g_tscinfo = +{ + .config = + { + .frequency = CONFIG_ADS7843E_FREQUENCY, + + .attach = tsc_attach, + .enable = tsc_enable, + .clear = tsc_clear, + .busy = tsc_busy, + .pendown = tsc_pendown, + }, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the XPT2046 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the XPT2046 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * pendown - Return the state of the pen down GPIO input + * + ****************************************************************************/ + +static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr) +{ + FAR struct viewtool_tscinfo_s *priv = (FAR struct viewtool_tscinfo_s *)state; + + if (isr) + { + /* Just save the address of the handler for now. The new handler will + * be attached when the interrupt is next enabled. + */ + + ivdbg("Attaching %p\n", isr); + priv->handler = isr; + } + else + { + ivdbg("Detaching %p\n", priv->handler); + tsc_enable(state, false); + priv->handler = NULL; + } + + return OK; +} + +static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable) +{ + FAR struct viewtool_tscinfo_s *priv = (FAR struct viewtool_tscinfo_s *)state; + irqstate_t flags; + + /* Attach and enable, or detach and disable. Enabling and disabling GPIO + * interrupts is a multi-step process so the safest thing is to keep + * interrupts disabled during the reconfiguration. + */ + + flags = enter_critical_section(); + if (enable && priv->handler) + { + /* Configure the EXTI interrupt using the SAVED handler */ + + (void)stm32_gpiosetevent(GPIO_LCDTP_IRQ, true, true, true, priv->handler); + } + else + { + /* Configure the EXTI interrupt with a NULL handler to disable it */ + + (void)stm32_gpiosetevent(GPIO_LCDTP_IRQ, false, false, false, NULL); + } + + leave_critical_section(flags); +} + +static void tsc_clear(FAR struct ads7843e_config_s *state) +{ + /* Does nothing */ +} + +static bool tsc_busy(FAR struct ads7843e_config_s *state) +{ + return false; /* The BUSY signal is not connected */ +} + +static bool tsc_pendown(FAR struct ads7843e_config_s *state) +{ + /* The /PENIRQ value is active low */ + + bool pendown = !stm32_gpioread(GPIO_LCDTP_IRQ); + ivdbg("pendown=%d\n", pendown); + return pendown; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_tsc_setup + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * configure the touchscreen device. This function will register the driver + * as /dev/inputN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_tsc_setup(int minor) +{ + FAR struct spi_dev_s *dev; + static bool initialized = false; + int ret; + + idbg("minor %d\n", minor); + DEBUGASSERT(minor == 0); + + /* Have we already initialized? Since we never uninitialize we must prevent + * multiple initializations. This is necessary, for example, when the + * touchscreen example is used as a built-in application in NSH and can be + * called numerous time. It will attempt to initialize each time. + */ + + if (!initialized) + { + /* Configure the XPT2046 interrupt pin as an input */ + + (void)stm32_configgpio(GPIO_LCDTP_IRQ); + + /* Get an instance of the SPI interface for the touchscreen chip select */ + + dev = stm32_spibus_initialize(TSC_DEVNUM); + if (!dev) + { + idbg("Failed to initialize SPI%d\n", TSC_DEVNUM); + return -ENODEV; + } + + /* Initialize and register the SPI touchscreen device */ + + ret = ads7843e_register(dev, &g_tscinfo.config, CONFIG_ADS7843E_DEVMINOR); + if (ret < 0) + { + idbg("Failed to register touchscreen device\n"); + /* up_spiuninitialize(dev); */ + return -ENODEV; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +/**************************************************************************** + * Name: board_tsc_teardown + * + * Description: + * Each board that supports a touchscreen device must provide this function. + * This function is called by application-specific, setup logic to + * uninitialize the touchscreen device. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void board_tsc_teardown(void) +{ + /* No support for un-initializing the touchscreen XPT2046 device. It will + * continue to run and process touch interrupts in the background. + */ +} + +#endif /* CONFIG_INPUT_ADS7843E */ diff --git a/configs/viewtool-stm32f107/src/stm32_usbdev.c b/configs/viewtool-stm32f107/src/stm32_usbdev.c new file mode 100644 index 0000000000000000000000000000000000000000..1c35e9bb505aa96835d2231f75445d101b0a44b8 --- /dev/null +++ b/configs/viewtool-stm32f107/src/stm32_usbdev.c @@ -0,0 +1,124 @@ +/************************************************************************************ + * configs/viewtool-stm32f107/src/stm32_usbdev.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "stm32_otgfs.h" +#include "viewtool_stm32f107.h" + +#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_USB) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbdev_initialize + * + * Description: + * Called from stm32_boardinitialize very early in initialization to setup USB- + * related GPIO pins for the Viewtool STM32F107 board. + * + ************************************************************************************/ + +void stm32_usbdev_initialize(void) +{ + /* The OTG FS has an internal soft pull-up. No GPIO configuration is required */ + +#ifdef CONFIG_ARCH_CHIP_STM32F103VC + stm32_configgpio(GPIO_USB_PULLUP); +#endif +} + +/************************************************************************************ + * Name: stm32_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB software + * connect and disconnect), then the board software must provide stm32_pullup. + * See include/nuttx/usb/usbdev.h for additional description of this method. + * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be + * NULL. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_CHIP_STM32F103VC +int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); + stm32_gpiowrite(GPIO_USB_PULLUP, !enable); + return OK; +} +#endif + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +} + +#endif /* CONFIG_STM32_OTGFS || CONFIG_STM32_USB*/ diff --git a/configs/viewtool-stm32f107/src/stm32_usbmsc.c b/configs/viewtool-stm32f107/src/stm32_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..f8462b468756a78596d3d086e867da948e583ed2 --- /dev/null +++ b/configs/viewtool-stm32f107/src/stm32_usbmsc.c @@ -0,0 +1,87 @@ +/**************************************************************************** + * configs/viewtool-stm32f107/src/stm32_usbmsc.c + * + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the STM32 SPI-based MMC/SD block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "stm32.h" +#include "viewtool_stm32f107.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 VIEWTOOL_MMCSD_SLOTNO +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* If system/usbmsc is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() (see stm32_appinit.c). + * In this case, there is nothing further to be done here. + */ + +#if defined(HAVE_MMCSD) && !defined(CONFIG_NSH_BUILTIN_APPS) + return stm32_sdinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1); +#else + return OK; +#endif +} diff --git a/configs/viewtool-stm32f107/src/viewtool_stm32f107.h b/configs/viewtool-stm32f107/src/viewtool_stm32f107.h new file mode 100644 index 0000000000000000000000000000000000000000..bf4c2692adbe339266240ffcf89be1db7e91b4d1 --- /dev/null +++ b/configs/viewtool-stm32f107/src/viewtool_stm32f107.h @@ -0,0 +1,364 @@ +/**************************************************************************** + * configs/viewtool-stm32f107/src/viewtool_stm32f107.h + * + * Copyright (C) 2013-2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_VIEWTOOL_STM32F107_SRC_H +#define __CONFIGS_VIEWTOOL_STM32F107_SRC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* Assume that everything is supported */ + +#define HAVE_USBDEV 1 +#define HAVE_MMCSD 1 +#define HAVE_RTC_DRIVER 1 + +/* Handle chip differences */ + +#if defined(CONFIG_ARCH_CHIP_STM32F103VC) +# undef CONFIG_STM32_OTGFS +#elif defined(CONFIG_ARCH_CHIP_STM32F107VC) +# undef CONFIG_STM32_USB +# undef CONFIG_STM32_SDIO +#else +# error Unknown chip on Viewtool board +# undef HAVE_USBDEV +# undef HAVE_MMCSD +#endif + +/* Check if USB is enabled */ + +#if !defined(CONFIG_STM32_OTGFS) && !defined(CONFIG_STM32_USB) +# undef HAVE_USBDEV +#elif !defined(CONFIG_USBDEV) +# warning CONFIG_STM32_OTGFS (F107) or CONFIG_STM32_USB (F103) is enabled but CONFIG_USBDEV is not +# undef HAVE_USB +#endif + +/* Can't support MMC/SD features if the SDIO peripheral is disabled */ + +#ifndef CONFIG_STM32_SDIO +# undef HAVE_MMCSD +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# undef HAVE_MMCSD +#endif + +/* Default MMC/SD slot number/device minor number */ + +#define VIEWTOOL_MMCSD_SLOTNO 0 + +/* Check if we can support the RTC driver */ + +#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER) +# undef HAVE_RTC_DRIVER +#endif + +/* GPIO Configuration *******************************************************/ +/* LEDs + * + * There are four LEDs on the ViewTool STM32F103/F107 board that can be controlled + * by software: LED1 through LED4. All pulled high and can be illuminated by + * driving the output to low + * + * LED1 PA6 + * LED2 PA7 + * LED3 PB12 + * LED4 PB13 + */ + +#define GPIO_LED1 (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET | GPIO_PORTA | GPIO_PIN6) +#define GPIO_LED2 (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET | GPIO_PORTA | GPIO_PIN7) +#define GPIO_LED3 (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN12) +#define GPIO_LED4 (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN13) + + +/* Buttons ******************************************************************/ +/* All pulled high and will be sensed low when depressed. + * + * SW2 PC11 Needs J42 closed + * SW3 PC12 Needs J43 closed + * SW4 PA0 Needs J44 closed + */ + +#define MIN_IRQBUTTON BUTTON_SW2 +#define MAX_IRQBUTTON BUTTON_SW4 +#define NUM_IRQBUTTONS (BUTTON_SW4 - BUTTON_SW2 + 1) + +#define GPIO_SW2 (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT | \ + GPIO_EXTI | GPIO_PORTC | GPIO_PIN11) +#define GPIO_SW3 (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT | \ + GPIO_EXTI | GPIO_PORTC | GPIO_PIN12) +#define GPIO_SW4 (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT | \ + GPIO_EXTI | GPIO_PORTA | GPIO_PIN10) + +/* microSD Card Interface + * + * microSD Connector + * ----------------- + * + * ----------------------------- ------------------------- -------------------------------- + * Connector J17 GPIO CONFIGURATION(s) + * PIN SIGNAL LEGEND (no remapping) DP83848C Board + * --- ------------- ----------- ------------------------- -------------------------------- + * 1 VDD 3.3 N/A N/A 3.3 + * 2 GND N/A N/A GND + * 3 PC8 SDIO_D0 GPIO_SDIO_D0 D0 + * 4 PD2 SDIO_CMD GPIO_SDIO_CMD CMD + * 5 PC12 SDIO_CLK GPIO_SDIO_CK CLK + * 6 PC11 SDIO_D3 GPIO_SDIO_D3 D3 + * 7 PC10 SDIO_D2 GPIO_SDIO_D2 D2 + * 8 PC9 SDIO_D1 GPIO_SDIO_D1 D1 + * 9 PA8 CD Board-specific GPIO input CD + * --- ------------- ----------- ------------------------- -------------------------------- + * + * NOTES: + * 1. The STM32F107 does not support the SDIO/memory card interface. So the SD card + * cannot be used with the STM32F107 (unless the pin-out just happens to match up + * with an SPI-based card interface???) + */ + +#ifdef CONFIG_ARCH_CHIP_STM32F103VC +# define GPIO_SD_CD (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_EXTI| \ + GPIO_PORTA | GPIO_PIN8) +#endif + +/* USB + * + * The Viewtool base board has a USB Mini-B connector. Only USB device can + * be supported with this connector. + * + * ------------------------- ------------------------------------ + * USB Connector + * J10 mini-USB GPIO CONFIGURATION(s) + * --- --------- ----------- ------------------------------------ + * Pin Signal + * --- --------- ----------- ------------------------------------ + * 1 USB_VBUS VDD_USB (No sensing available) + * 2 OTG_DM PA11 GPIO_OTGFS_DM (F107) GPIO_USB_DM (F103) + * 3 OTG_DP PA12 GPIO_OTGFS_DP (F107) GPIO_USB_DP (F103) + * 4 OTG_ID PA10 GPIO_OTGFS_ID (F107) + * 5 Shield N/A N/A + * 6 Shield N/A N/A + * 7 Shield N/A N/A + * 8 Shield N/A N/A + * 9 Shield N/A N/A + * PE11 USB_EN GPIO controlled soft pull-up (if J51 closed) + * + * NOTES: + * 1. GPIO_OTGFS_VBUS (F107) should not be configured. No VBUS sensing + * 2. GPIO_OTGFS_SOF (F107) is not used + * 3. The OTG FS module has is own, internal soft pull-up logic. J51 should + * be open so that PE11 activity does effect USB. + */ + +#ifdef CONFIG_ARCH_CHIP_STM32F103VC +# define GPIO_USB_PULLUP (GPIO_OUTPUT | GPIO_CNF_OUTOD | GPIO_MODE_50MHz | \ + GPIO_OUTPUT_SET | GPIO_PORTE | GPIO_PIN11) +#endif + +/* LCD + * + * An LCD may be connected via J11. Only the the STM32F103 supports the FSMC signals + * needed to drive the LCD. + * + * The LCD features an (1) HY32D module with built-in SSD1289 LCD controller, and (a) + * a XPT2046 touch screen controller. + * + * LCD Connector + * ------------- + * + * ----------------------------- ------------------------ -------------------------------- + * Connector J11 GPIO CONFIGURATION(s) + * PIN SIGNAL LEGEND (F103 only) LCD Module + * --- ------------- ----------- ------------------------ -------------------------------- + * 1 VDD_5 NC N/A 5V --- + * 2 GND GND N/A GND --- + * 3 PD14 DATA0 GPIO_NPS_D0 D0 HY32D + * 4 PD15 DATA1 GPIO_NPS_D1 D1 HY32D + * 5 PD0 DATA2 GPIO_NPS_D2 D2 HY32D + * 6 PD1 DATA3 GPIO_NPS_D3 D3 HY32D + * 7 PE7 DATA4 GPIO_NPS_D4 D4 HY32D + * 8 PE8 DATA5 GPIO_NPS_D5 D5 HY32D + * 9 PE9 DATA6 GPIO_NPS_D6 D6 HY32D + * 10 PE10 DATA7 GPIO_NPS_D7 D7 HY32D + * 11 PE11 DATA8 GPIO_NPS_D8 D8 HY32D + * 12 PE12 DATA9 GPIO_NPS_D9 D9 HY32D + * 13 PE13 DATA10 GPIO_NPS_D10 D10 HY32D + * 14 PE14 DATA11 GPIO_NPS_D11 D11 HY32D + * 15 PE15 DATA12 GPIO_NPS_D12 D12 HY32D + * 16 PD8 DATA13 GPIO_NPS_D13 D13 HY32D + * 17 PD9 DATA14 GPIO_NPS_D14 D14 HY32D + * 18 PD10 DATA15 GPIO_NPS_D15 D15 HY32D + * 19 (3) LCD_CS GPIO_NPS_NE1 CS HY32D + * 20 PD11 LCD_RS GPIO_NPS_A16 RS HY32D + * 21 PD5 LCD_R/W GPIO_NPS_NWE WR HY32D + * 22 PD4 LCD_RD GPIO_NPS_NOE RD HY32D + * 23 PB1 LCD_RESET (GPIO) RESET HY32D + * 24 N/C NC N/A TE (unused?) + * 25 VDD_3.3 BL_VCC N/A BLVDD CA6219 (Drives LCD backlight) + * 26 GND BL_GND N/A BLGND CA6219 + * 27 PB0 BL_PWM GPIO_TIM3_CH3OUT(2) BL_CNT CA6219 + * 28 PC5 LCDTP_IRQ (GPIO) TP_IRQ XPT2046 + * 29 PC4 LCDTP_CS (GPIO) TP_CS XPT2046 + * 30 PB13 LCDTP_CLK GPIO_SPI2_SCK TP_SCK XPT2046 + * 31 PB15 LCDTP_DIN GPIO_SPI2_MOSI TP_SI XPT2046 + * 32 PB14 LCDTP_DOUT GPIO_SPI2_MISO TP_SO XPT2046 + * 33 VDD_3.3 VDD_3.3 N/A 3.3V --- + * 34 GND GND N/A GND --- + * --- ------------- ----------- ------------------------ -------------------------------- + * + * NOTES: + * 1) Only the F103 version of the board supports the FSMC + * 2) No remap + * 3) LCD_CS is controlled by J13 JUMPER4 (under the LCD unfortunately): + * + * 1->2 : PD7 (GPIO_NPS_NE1) enables the multiplexor : 1E\ enable input (active LOW) + * 3->4 : PD13 provides 1A0 input (1A1 is grounded). : 1A0 address input + * So will chip enable to either LCD_CS or + * Flash_CS. + * 5->6 : 1Y0 output to LCD_CS : 1Y0 address output + * 7->8 : 1Y1 output to Flash_CE : 1Y1 address output + * + * Truth Table: + * 1E\ 1A0 1A1 1Y0 1Y1 + * --- --- --- --- --- + * HI N/A N/A HI HI + * LO LO LO LO HI + * LO HI LO HI LO + */ + +#define GPIO_LCD_RESET (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz | \ + GPIO_OUTPUT_SET | GPIO_PORTB| GPIO_PIN1) +#define GPIO_LCDTP_IRQ (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT | \ + GPIO_EXTI | GPIO_PORTC | GPIO_PIN5) +#define GPIO_LCDTP_CS (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz | \ + GPIO_OUTPUT_SET | GPIO_PORTC | GPIO_PIN4) + +/* Freescale MPL115A barometer (optional add-on) + * + * This board support logic includes support for a Freescale MPL115A barometer + * using SPI3 with chip select on PB6. + */ + +#define GPIO_MPL115A_CS (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz | \ + GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN6) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the M3 Wildfire board. + * + ****************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +/**************************************************************************** + * Name: stm32_led_initialize + * + * Description: + * Configure LEDs. LEDs are left in the OFF state. + * + ****************************************************************************/ + +void stm32_led_initialize(void); + +/**************************************************************************** + * Name: stm32_usbdev_initialize + * + * Description: + * Called from stm32_usbdev_initialize very early in initialization to setup USB-related + * GPIO pins for the Viewtool STM32F107 board. + * + ****************************************************************************/ + +#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBDEV) +void weak_function stm32_usbdev_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_sdinitialize + * + * Description: + * Initialize the SPI-based SD card. Requires CONFIG_DISABLE_MOUNTPOINT=n + * and CONFIG_STM32_SPI1=y + * + ****************************************************************************/ + +int stm32_sdinitialize(int minor); + +/**************************************************************************** + * Name: stm32_mpl115ainitialize + * + * Description: + * Initialize and register the MPL115A Pressure Sensor driver. + * + * Input parameters: + * devpath - The full path to the driver to register. E.g., "/dev/press0" + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined(CONFIG_SPI) && defined(CONFIG_MPL115A) && defined(CONFIG_STM32_SPI3) +int stm32_mpl115ainitialize(FAR const char *devpath); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_VIEWTOOL_STM32F107_SRC_H */ diff --git a/configs/xtrs/Kconfig b/configs/xtrs/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/xtrs/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/xtrs/README.txt b/configs/xtrs/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..a1dc4e6b03d32ce363fcd45825126deaa7bd903d --- /dev/null +++ b/configs/xtrs/README.txt @@ -0,0 +1,247 @@ +xtrs README +^^^^^^^^^^^^^ + +Current status +^^^^^^^^^^^^^^ + +The xtrs port is not operational yet; some work still needs to be done. + +Contents +^^^^^^^^ + + o Getting a TRS80 emulator and DOS disks + o Loading an executable into xtrs + o Configuring NuttX + o Reconfiguring NuttX + o Reconfiguring for Linux, OSX, or Cygwin + o SDCC + o Building the SDCC toolchain + +Getting a TRS80 emulator and DOS disks +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +This port uses a vintage computer based on the Z80, the TRS80. +There's a main page describing the different models of TRS80. +See: http://www.trs-80.com + +An emulator for this computer is available to run TRS80 programs on a +linux platform (http://www.tim-mann.org/xtrs.html). + +Other emulators are available for other platforms. +See http://www.trs-80.com, click on the link Emulators. + +TRSDOS, LDOS and other softwares are available at: +http://discover-net.net/~dmkeil/trs80/software/trs-dos.htm + +Or you can get TRSDOS 1.3 and 6.1 from this site; it's included with the emulator. +http://discover-net.net/~dmkeil/trs80/model4.htm + +The SDCC toolchain is available from http://sdcc.sourceforge.net/. All +testing has been performed using version 2.7.0 of the SDCC toolchain. + +Loading an executable into xtrs +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +At http://www.trs-80.com click on the link: Getting a Software Onto an Emulator. + +Configuring NuttX +^^^^^^^^^^^^^^^^^ + + ostest + + This configuration performs a simple, minimal OS test using + examples/ostest. This can be configurated as follows: + + 1) From a POSIX window: + cd tools + ./configure.sh xtrs/ostest + 2) From a CMD.exe window + setenv.bat + make + + If this is a Windows native build, then configure.bat should be used + in step 1) instead of configure.sh: + + configure.bat xtrs\ostest + + The setenv.bat will need to be updated to include the PATH to the XTRS + hex2cmd program. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. See the + "Reconfiguring" section below for information about changing this + configuration. + + 2. The default setup for this configuration uses a windows native build. + See the section entitled "Reconfiguring for Linux, OSX, or Cygwin" + which will give you the steps you would need to do to convert this + configuration to build in other, Unix-like environments. + + 3. The current build requires ca. 3.2.1 SDCC. + + nsh + + This configuration file builds NSH (examples/nsh). This + configuration is not functional due to issues with use of the + simulated serial driver (see the TODO list). + + This configuration can be selected by: + + 1) From a POSIX window: + cd tools + ./configure.sh xtrs/nsh + 2) From a CMD.exe window + setenv.bat + make + + If this is a Windows native build, then configure.bat should be used + in step 1) instead of configure.sh: + + configure.bat xtrs\nsh + + The setenv.bat will need to be updated to include the PATH to the XTRS + hex2cmd program. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. See the + "Reconfiguring" section below for information about changing this + configuration. + + 2. The default setup for this configuration uses a windows native build. + See the section entitled "Reconfiguring for Linux, OSX, or Cygwin" + which will give you the steps you would need to do to convert this + configuration to build in other, Unix-like environments. + + 3. The current build requires ca. 3.2.1 SDCC. + + 4. This configuration depends on configs/xtrs/src/xtrs_serial.c which + is incomplete. At compile time, the following symbols are undefined: + + ctrl, baud, rs232_xmtisr, rs232_recvisr, ch + + pashello + + Configures to use examples/pashello for execution from FLASH + See examples/README.txt for information about pashello. + + This configuration is not usable because the resulting binary + is too large for the z80 address space. + + This configuration can be selected by: + + 1) From a POSIX window: + cd tools + ./configure.sh xtrs/pashello + 2) From a CMD.exe window + setenv.bat + make + + If this is a Windows native build, then configure.bat should be used + in step 1) instead of configure.sh: + + configure.bat xtrs\pashello + + The setenv.bat will need to be updated to include the PATH to the XTRS + hex2cmd program. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. See the + "Reconfiguring" section below for information about changing this + configuration. + + 2. The default setup for this configuration uses a windows native build. + See the section entitled "Reconfiguring for Linux, OSX, or Cygwin" + which will give you the steps you would need to do to convert this + configuration to build in other, Unix-like environments. + + 3. The current build requires ca. 3.2.1 SDCC. + +Reconfiguring NuttX +^^^^^^^^^^^^^^^^^^^ + +These configurations all use the kconfig-frontends, mconf-based configuration +tool. To change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt and + additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the reconfiguration + process. + +Reconfiguring for Linux, OSX, or Cygwin +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +All of the z80 configurations in this this directory are set up to build in a +Windows CMD.exe shell. This configuration requires the MinGW host compiler +and severl GNUWin32 tools (see discussion in the top-level NuttX/README.txt +file). + +These configurations can be converted to run under Linux (or Cygwin or OSX), +by modifying the configuration file as follows: + + -CONFIG_HOST_WINDOWS=y + -CONFIG_WINDOWS_NATIVE=y + +CONFIG_HOST_LINUX=y + + -CONFIG_Z80_TOOLCHAIN_SDCCW=y + +CONFIG_Z80_TOOLCHAIN_SDCCL=y + +You may need to first manually change the CONFIG_APPS_DIR="..\apps" definition +in the .config file because the backslash may upset some Unix-based tools. + +This configuration will require a recent version of SDCC (ca. 3.2.1) for Linux +or custom built for Cygwin (see below). + +You cannot use the default setenv.bat in these Unix-like enviroments because +that is a Windows batch file. Use configs/z80sim/script/setenv.sh instead. +setenv.sh must include the path to the installation location of SDCC (probably +/usr/local/bin). + +SDCC +^^^^ + +These z80 configurations all use the SDCC toolchain (http://sdcc.sourceforge.net/). +Source and pre-built SDCC binaries can be downloaded from the SDCC SourceForge +site: http://sourceforge.net/projects/sdcc/files/ . Pre-built binaries are +available for Linux, MAC OSX, and for Win32. Various SDCC options can be +selected with: + + CONFIG_Z80_TOOLCHAIN_SDCCL=y : SDCC for Linux, MAC OSX or Cygwin (see below) + CONFIG_Z80_TOOLCHAIN_SDCCW=y : SDCC for Win32 + +SDCC versions 3.2.0 or higher are recommended. + +Building the SDCC toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +You may also want to build your own SDCC toolchain. You might want to do this, +for example, if you are running under Cygwin and want a Cygwin compatible +SDCC toolchain. + +The SDCC toolchain is built with the standard configure/make/make install +sequence. However, some special actions are required to generate libraries +compatible with this build. First start with the usual steps + + download + unpack + cd sdcc + ./configure + +But before making, we need to apply a patch to the SDCC 2.6.0 source +so that the z80 assembler can handle long symbol names + + Apply sdcc-2.6.0-asz80-symlen.patch + cd sdcc/device/lib + +Then make the SDCC binaries + + cd sdcc + make + +and install SDCC: + + sudo make install + diff --git a/configs/xtrs/include/board.h b/configs/xtrs/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..2e7f04daeabbea94082d41c7cf6cc37da4f81afd --- /dev/null +++ b/configs/xtrs/include/board.h @@ -0,0 +1,71 @@ +/**************************************************************************** + * configs/xtrs/include/board.h + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/* Adresses of BIOS routines */ + +#include "trs80-m3.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +EXTERN void z80_lowputc(char ch) __naked; +EXTERN char z80_lowgetc(void) __naked; + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/xtrs/include/trs80-m3.h b/configs/xtrs/include/trs80-m3.h new file mode 100644 index 0000000000000000000000000000000000000000..889c209f339436e9be33aad67259c1b74255be99 --- /dev/null +++ b/configs/xtrs/include/trs80-m3.h @@ -0,0 +1,185 @@ +/**************************************************************************** + * configs/xtrs/include/trs80-m3.h + * + * Copyright (C) 2008 Jacques Pelletier. All rights reserved. + * Author: Jacques Pelletier + * + * This file is a part of NuttX and hence + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* Information from http://www.trs-80.com */ + +#ifndef __TRS80_M3_H +#define __TRS80_M3_H + +/* Outputs a byte to a logical device or FCB. DE = FCB and A = byte. + * Don't confuse with CTL at 0023. + */ + +#define _TRS80_M3_PUT 0x001B + +/* Outputs a control byte to a logical device or FCB. DE = FCB and A = control byte. */ + +#define _TRS80_M3_CTL 0x0023 + +/* Scan keyboard and return with accumulator containing result. DE is used. */ + +#define _TRS80_M3_KBDSCN 0x002B + +/* Displays a character at current cursor location. */ + +#define _TRS80_M3_VDCHAR 0x0033 + +/* "Waits until printer is ready then prints character. A = ASCII character. + * If BREAK is pressed, a return to caller is made." + */ + +#define _TRS80_M3_PRCHAR 0x003B + +/* Call Input a line from the keyboard. B = max length of line. HL points at buffer. + * Buffer should be the length of B plus 1. To terminate, hit BREAK or ENTER. + * On exit, HL points at buffer and B = number of characters entered. + * Carry will be set if BREAK was pressed. + */ + +#define _TRS80_M3_KBLINE 0x0040 + +/* "Scans the keyboard until a key is pressed. If BREAK is pressed, it is returned + * like other keys." + */ + +#define _TRS80_M3_KBWAIT 0x0049 + +/* "Receive a character from RS-232. No entry conditions. On exit, memory location + * 16872 contains character received. DE is altered. This routine honors wait status." + */ + +#define _TRS80_M3_RSRCV 0x0050 + +/* "Transmit character to RS-232. On entry, Accumulator or memory location 16880 + * contains character. On exit, 16880 = 0 if no character sent. Wait status honored." + */ + +#define _TRS80_M3_RSTX 0x0055 + +/* Initialize RS-232 interface. On entry, memory location 16888 = send/receive baud + * rate code, location 16890 = wait/don't wait switch, location 16889 = RS-232 + * characteristics switch. On exit, DE is altered. For more detail, consult Model 3 + * reference manual. + */ + +#define _TRS80_M3_RSINIT 0x005A + +/* This is the routine that is Basic's SET, RESET, and POINT functions. Here's how + * to use it. Load HL with return address and push. Load register A with one of the + * following: 00H = POINT, 01H = RESET, and 80H = SET. Push AF onto stack. Load A with + * X coordinate and push onto stack. Load A with Y coordinate and JP GRAPH. + */ + +#define _TRS80_M3_GRAPH 0x0150 + +/* Clear screen. */ + +#define _TRS80_M3_CLS 0x01C9 + +/* Randomize. */ + +#define _TRS80_M3_RANDOM 0x01D3 + +/* This routine turns off the cassette drive. */ + +#define _TRS80_M3_CSOFF 0x01F8 + +#ifdef TRS80_MODEL1 + +/* A register contains a 0 or 1 which is the cassette number. This routine defines + * cassette number and turns on cassette. Model I only. + */ + +#define _TRS80_M3_DEFCAS 0x0212 + +#endif /* TRS80_MODEL1 */ + +/* Inputs data one byte at a time from cassette after you use CSHIN. A = the data + * byte. + */ + +#define _TRS80_M3_CSIN 0x0235 + +/* Outputs data one byte at a time to cassette after you use CSHWR. A = the + * output byte. + */ + +#define _TRS80_M3_CSOUT 0x0264 + +/* Turns on the cassette and writes the header. */ + +#define _TRS80_M3_CSHWR 0x0287 + +/* Finds the cassette header info at the beggining of cassette file. */ + +#define _TRS80_M3_CSHIN 0x0296 + +/* Ouput character in register A; OUTSEL (409CH) selects device. See OUTSEL for + * device values. + */ + +#define _TRS80_M3_OUTCHR 0x032A + +/* Displays character in A on screen at next print position. Uses AF. */ + +#define _TRS80_M3_DISPA 0x033A + +/* Calls keyboard scan routine. */ + +#define _TRS80_M3_keyb_scan 0x0358 + +/* Reads keyboard into buffer until a carriage return is entered. 40A7H contains + * the address of the buffer. + */ + +#define _TRS80_M3_KIBUFF 0x0361 + +/* Same as KBLINE. See 0040. */ + +#define _TRS80_M3_KLINE 0x05D9 + +/* "Get date in ASCII format. Mod III TRSDOS, LDOS, & MULTIDOS." */ + +#define _TRS80_M3_GETDAT 0x3033 + +/* "Get time in ASCII format. Mod III TRSDOS, LDOS, & MULTIDOS." */ + +#define _TRS80_M3_GETTIM 0x3036 + +#endif /* __TRS80_M3_H */ diff --git a/configs/xtrs/nsh/Make.defs b/configs/xtrs/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e474d276ef79d892e6db30c087a8a44f1bba2359 --- /dev/null +++ b/configs/xtrs/nsh/Make.defs @@ -0,0 +1,167 @@ +############################################################################ +# configs/xtrs/nsh/Make.defs +# +# Copyright (C) 2007, 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +# These are the directories where the SDCC toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + SDCC_INSTALLDIR = C:\PROGRA~2\SDCC + SDCC_BINDIR = $(SDCC_INSTALLDIR)\bin + SDCC_LIBDIR = $(SDCC_INSTALLDIR)\lib\z80 +else + SDCC_INSTALLDIR = /usr/local + SDCC_BINDIR = $(SDCC_INSTALLDIR)/bin + SDCC_LIBDIR = $(SDCC_INSTALLDIR)/share/sdcc/lib/z80 +endif + +CROSSDEV = +CC = sdcc +CPP = sdcpp +LD = sdldz80 +AS = sdasz80 +AR = sdar -r +ARCHCPUFLAGS = -mz80 + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = --debug +else + ARCHOPTIMIZATION = +endif + +ARCHPICFLAGS = +ARCHWARNINGS = +ARCHDEFINES = +ARCHINCLUDES = -I. -I$(TOPDIR)$(DELIM)include + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = -x -a -l -o -s -g + +SDCCLIB = z80.lib + +ASMEXT = .asm +OBJEXT = .o +LIBEXT = .lib +EXEEXT = .cmd + +# Custom ASSEMBLE definition. The most common toolchain, GCC, uses the +# compiler to assemble files because this has the advantage of running the C +# Pre-Processor against. This is not possible with other SDCC; we need to +# define AS and over-ride the common definition in order to use the assembler +# directly. + +define ASSEMBLE + @echo "AS: $1" + $(Q) $(AS) $(AFLAGS) $2 $1 +endef + +# Custom CLEAN definition + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) +define CLEAN + $(Q) if exist *.o (del /f /q *.o) + $(Q) if exist *.asm (del /f /q *.asm) + $(Q) if exist *.rel (del /f /q *.rel) + $(Q) if exist *.lst (del /f /q *.lst) + $(Q) if exist *.rst (del /f /q *.rst) + $(Q) if exist *.sym (del /f /q *.sym) + $(Q) if exist *.adb (del /f /q *.adb) + $(Q) if exist *.lnk (del /f /q *.lnk) + $(Q) if exist *.map (del /f /q *.map) + $(Q) if exist *.mem (del /f /q *.mem) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.cmd (del /f /q *.cmd) +endef +else +define CLEAN + $(Q) rm -f *.o *.asm *.rel *.lst *.rst *.sym *.adb *.lnk *.map *.mem *.hex *.cmd +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative + + # Use NTFS links or directory copies + +ifeq ($(CONFIG_WINDOWS_MKLINK),y) + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)link.bat +else + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.bat +endif +DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.bat + +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + + # SDCC for Linux, OSX, or Cygwin understands symbolic links. Windows SDCC + # running under Cygwin does not + +ifeq ($(WINTOOL),y) + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh +else + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)link.sh +endif +DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + +endif diff --git a/configs/xtrs/nsh/defconfig b/configs/xtrs/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..79355d8226de84fbf5c4a689cdce787c80ad4199 --- /dev/null +++ b/configs/xtrs/nsh/defconfig @@ -0,0 +1,501 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +CONFIG_WINDOWS_NATIVE=y +# CONFIG_WINDOWS_CYGWIN is not set +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set +# CONFIG_WINDOWS_MKLINK is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="..\apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_DEBUG_SYMBOLS is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="z80" +CONFIG_BOARD_LOOPSPERMSEC=100 +CONFIG_ARCH_CHIP_Z80=y +# CONFIG_ARCH_CHIP_Z8F6403 is not set +# CONFIG_ARCH_CHIP_Z8F6423 is not set +# CONFIG_ARCH_CHIP_EZ80F91 is not set +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +CONFIG_Z80_TOOLCHAIN_SDCCW=y +CONFIG_LINKER_HOME_AREA=0x5200 +CONFIG_LINKER_CODE_AREA=0x5300 +CONFIG_LINKER_DATA_AREA=0x8000 +CONFIG_LINKER_ROM_AT_0000=y +# CONFIG_ARCH_HAVEHEAD is not set + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set + +# +# Board Settings +# +CONFIG_RAM_START=0x0000 +CONFIG_RAM_SIZE=65536 + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_XTRS=y +# CONFIG_ARCH_BOARD_Z80SIM is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="xtrs" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_USEC_PER_TICK=10000 +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=9 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_ENVIRON=y +CONFIG_DISABLE_POLL=y + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=8 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=6 +CONFIG_NFILE_STREAMS=6 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 + +# +# Device Drivers +# +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_PWM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_UART_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# UART Configuration +# +CONFIG_UART_RXBUFSIZE=64 +CONFIG_UART_TXBUFSIZE=64 +CONFIG_UART_BAUD=115200 +CONFIG_UART_BITS=8 +CONFIG_UART_PARITY=0 +CONFIG_UART_2STOP=0 +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_FS_RAMMAP is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Named Applications +# +# CONFIG_BUILTIN is not set + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_COMPOSITE is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_NETTEST is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WLAN is not set + +# +# Interpreters +# + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# ModBus +# + +# +# FreeModbus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSFMOUNT is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_FILEIOSIZE=1024 +CONFIG_NSH_LINELEN=40 +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# System NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# diff --git a/configs/xtrs/nsh/setenv.bat b/configs/xtrs/nsh/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..0df2ba4b66d728619f00798d9b0100d5368f6d81 --- /dev/null +++ b/configs/xtrs/nsh/setenv.bat @@ -0,0 +1,54 @@ +@echo off + +rem configs/xtrs/nsh/setenv.bat +rem +rem Copyright (C) 2012 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the SDCC toolchain for windows. + +set PATH=C:\Program Files (x86)\SDCC/bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% + +rem This is the location where the XTRS hex2cmd program is available +rem set PATH=????:%PATH% + +echo %PATH% diff --git a/configs/xtrs/ostest/Make.defs b/configs/xtrs/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..7153d1dd1b9b83e3e953fb0c85344c8348e26b58 --- /dev/null +++ b/configs/xtrs/ostest/Make.defs @@ -0,0 +1,167 @@ +############################################################################ +# configs/xtrs/ostest/Make.defs +# +# Copyright (C) 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +# These are the directories where the SDCC toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + SDCC_INSTALLDIR = C:\PROGRA~2\SDCC + SDCC_BINDIR = $(SDCC_INSTALLDIR)\bin + SDCC_LIBDIR = $(SDCC_INSTALLDIR)\lib\z80 +else + SDCC_INSTALLDIR = /usr/local + SDCC_BINDIR = $(SDCC_INSTALLDIR)/bin + SDCC_LIBDIR = $(SDCC_INSTALLDIR)/share/sdcc/lib/z80 +endif + +CROSSDEV = +CC = sdcc +CPP = sdcpp +LD = sdldz80 +AS = sdasz80 +AR = sdar -r +ARCHCPUFLAGS = -mz80 + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = --debug +else + ARCHOPTIMIZATION = +endif + +ARCHPICFLAGS = +ARCHWARNINGS = +ARCHDEFINES = +ARCHINCLUDES = -I. -I$(TOPDIR)$(DELIM)include + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = -x -a -l -o -s -g + +SDCCLIB = z80.lib + +ASMEXT = .asm +OBJEXT = .o +LIBEXT = .lib +EXEEXT = .cmd + +# Custom ASSEMBLE definition. The most common toolchain, GCC, uses the +# compiler to assemble files because this has the advantage of running the C +# Pre-Processor against. This is not possible with other SDCC; we need to +# define AS and over-ride the common definition in order to use the assembler +# directly. + +define ASSEMBLE + @echo "AS: $1" + $(Q) $(AS) $(AFLAGS) $2 $1 +endef + +# Custom CLEAN definition + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) +define CLEAN + $(Q) if exist *.o (del /f /q *.o) + $(Q) if exist *.asm (del /f /q *.asm) + $(Q) if exist *.rel (del /f /q *.rel) + $(Q) if exist *.lst (del /f /q *.lst) + $(Q) if exist *.rst (del /f /q *.rst) + $(Q) if exist *.sym (del /f /q *.sym) + $(Q) if exist *.adb (del /f /q *.adb) + $(Q) if exist *.lnk (del /f /q *.lnk) + $(Q) if exist *.map (del /f /q *.map) + $(Q) if exist *.mem (del /f /q *.mem) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.cmd (del /f /q *.cmd) +endef +else +define CLEAN + $(Q) rm -f *.o *.asm *.rel *.lst *.rst *.sym *.adb *.lnk *.map *.mem *.hex *.cmd +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative + + # Use NTFS links or directory copies + +ifeq ($(CONFIG_WINDOWS_MKLINK),y) + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)link.bat +else + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.bat +endif +DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.bat + +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + + # SDCC for Linux, OSX, or Cygwin understands symbolic links. Windows SDCC + # running under Cygwin does not + +ifeq ($(WINTOOL),y) + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh +else + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)link.sh +endif +DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + +endif diff --git a/configs/xtrs/ostest/defconfig b/configs/xtrs/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..5f79aab570cf1f4ea0289dd5f46a45b74b5cef46 --- /dev/null +++ b/configs/xtrs/ostest/defconfig @@ -0,0 +1,450 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +CONFIG_WINDOWS_NATIVE=y +# CONFIG_WINDOWS_CYGWIN is not set +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set +# CONFIG_WINDOWS_MKLINK is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="..\apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_DEBUG_SYMBOLS is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="z80" +CONFIG_BOARD_LOOPSPERMSEC=100 +CONFIG_ARCH_CHIP_Z80=y +# CONFIG_ARCH_CHIP_Z8F6403 is not set +# CONFIG_ARCH_CHIP_Z8F6423 is not set +# CONFIG_ARCH_CHIP_EZ80F91 is not set +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +CONFIG_Z80_TOOLCHAIN_SDCCW=y +CONFIG_LINKER_HOME_AREA=0x5200 +CONFIG_LINKER_CODE_AREA=0x5300 +CONFIG_LINKER_DATA_AREA=0x8000 +CONFIG_LINKER_ROM_AT_0000=y +# CONFIG_ARCH_HAVEHEAD is not set + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set + +# +# Board Settings +# +CONFIG_RAM_START=0x0000 +CONFIG_RAM_SIZE=65536 + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_XTRS=y +# CONFIG_ARCH_BOARD_Z80SIM is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="xtrs" + +# +# Common Board Options +# + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_USEC_PER_TICK=10000 +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=21 +# CONFIG_DEV_CONSOLE is not set +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_ENVIRON=y +CONFIG_DISABLE_POLL=y + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=8 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=0 +CONFIG_NFILE_STREAMS=0 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 + +# +# Device Drivers +# +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_PWM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_UART_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART Configuration +# +CONFIG_UART_RXBUFSIZE=64 +CONFIG_UART_TXBUFSIZE=64 +CONFIG_UART_BAUD=115200 +CONFIG_UART_BITS=8 +CONFIG_UART_PARITY=0 +CONFIG_UART_2STOP=0 +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_FS_RAMMAP is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Named Applications +# +# CONFIG_BUILTIN is not set + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_COMPOSITE is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=1024 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=4 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WLAN is not set + +# +# Interpreters +# + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# ModBus +# + +# +# FreeModbus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# System NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# diff --git a/configs/xtrs/ostest/setenv.bat b/configs/xtrs/ostest/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..38822dcc2d90b111dc64aae5cd3c43ae7c73c2dc --- /dev/null +++ b/configs/xtrs/ostest/setenv.bat @@ -0,0 +1,54 @@ +@echo off + +rem configs/xtrs/ostest/setenv.bat +rem +rem Copyright (C) 2012 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the SDCC toolchain for windows. + +set PATH=C:\Program Files (x86)\SDCC/bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% + +rem This is the location where the XTRS hex2cmd program is available +rem set PATH=????:%PATH% + +echo %PATH% diff --git a/configs/xtrs/pashello/Make.defs b/configs/xtrs/pashello/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..a8d8eb4db928432868573694e6131a4a872e5b5c --- /dev/null +++ b/configs/xtrs/pashello/Make.defs @@ -0,0 +1,167 @@ +############################################################################ +# configs/xtrs/pashello/Make.defs +# +# Copyright (C) 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +# These are the directories where the SDCC toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + SDCC_INSTALLDIR = C:\PROGRA~2\SDCC + SDCC_BINDIR = $(SDCC_INSTALLDIR)\bin + SDCC_LIBDIR = $(SDCC_INSTALLDIR)\lib\z80 +else + SDCC_INSTALLDIR = /usr/local + SDCC_BINDIR = $(SDCC_INSTALLDIR)/bin + SDCC_LIBDIR = $(SDCC_INSTALLDIR)/share/sdcc/lib/z80 +endif + +CROSSDEV = +CC = sdcc +CPP = sdcpp +LD = sdldz80 +AS = sdasz80 +AR = sdar -r +ARCHCPUFLAGS = -mz80 + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = --debug +else + ARCHOPTIMIZATION = +endif + +ARCHPICFLAGS = +ARCHWARNINGS = +ARCHDEFINES = +ARCHINCLUDES = -I. -I$(TOPDIR)$(DELIM)include + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = -x -a -l -o -s -g + +SDCCLIB = z80.lib + +ASMEXT = .asm +OBJEXT = .o +LIBEXT = .lib +EXEEXT = .cmd + +# Custom ASSEMBLE definition. The most common toolchain, GCC, uses the +# compiler to assemble files because this has the advantage of running the C +# Pre-Processor against. This is not possible with other SDCC; we need to +# define AS and over-ride the common definition in order to use the assembler +# directly. + +define ASSEMBLE + @echo "AS: $1" + $(Q) $(AS) $(AFLAGS) $2 $1 +endef + +# Custom CLEAN definition + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) +define CLEAN + $(Q) if exist *.o (del /f /q *.o) + $(Q) if exist *.asm (del /f /q *.asm) + $(Q) if exist *.rel (del /f /q *.rel) + $(Q) if exist *.lst (del /f /q *.lst) + $(Q) if exist *.rst (del /f /q *.rst) + $(Q) if exist *.sym (del /f /q *.sym) + $(Q) if exist *.adb (del /f /q *.adb) + $(Q) if exist *.lnk (del /f /q *.lnk) + $(Q) if exist *.map (del /f /q *.map) + $(Q) if exist *.mem (del /f /q *.mem) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.cmd (del /f /q *.cmd) +endef +else +define CLEAN + $(Q) rm -f *.o *.asm *.rel *.lst *.rst *.sym *.adb *.lnk *.map *.mem *.hex *.cmd +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative + + # Use NTFS links or directory copies + +ifeq ($(CONFIG_WINDOWS_MKLINK),y) + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)link.bat +else + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.bat +endif +DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.bat + +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + + # SDCC for Linux, OSX, or Cygwin understands symbolic links. Windows SDCC + # running under Cygwin does not + +ifeq ($(WINTOOL),y) + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh +else + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)link.sh +endif +DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + +endif diff --git a/configs/xtrs/pashello/defconfig b/configs/xtrs/pashello/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..1865c540b75f2afe8c78829e3a5cb14ab664cb71 --- /dev/null +++ b/configs/xtrs/pashello/defconfig @@ -0,0 +1,447 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +CONFIG_WINDOWS_NATIVE=y +# CONFIG_WINDOWS_CYGWIN is not set +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set +# CONFIG_WINDOWS_MKLINK is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="..\apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_DEBUG_SYMBOLS is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="z80" +CONFIG_BOARD_LOOPSPERMSEC=100 +CONFIG_ARCH_CHIP_Z80=y +# CONFIG_ARCH_CHIP_Z8F6403 is not set +# CONFIG_ARCH_CHIP_Z8F6423 is not set +# CONFIG_ARCH_CHIP_EZ80F91 is not set +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +# CONFIG_Z80_TOOLCHAIN_SDCCL is not set +CONFIG_Z80_TOOLCHAIN_SDCCW=y +CONFIG_LINKER_HOME_AREA=0x5200 +CONFIG_LINKER_CODE_AREA=0x5300 +CONFIG_LINKER_DATA_AREA=0x8000 +CONFIG_LINKER_ROM_AT_0000=y +# CONFIG_ARCH_HAVEHEAD is not set + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set + +# +# Board Settings +# +CONFIG_RAM_START=0x0000 +CONFIG_RAM_SIZE=65536 + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_XTRS=y +# CONFIG_ARCH_BOARD_Z80SIM is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="xtrs" + +# +# Common Board Options +# + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_USEC_PER_TICK=10000 +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=9 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="pashello_main" +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_ENVIRON is not set +CONFIG_DISABLE_POLL=y + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=8 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=4 +CONFIG_NFILE_STREAMS=4 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 + +# +# Device Drivers +# +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_PWM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART=y +CONFIG_MCU_SERIAL=y +CONFIG_UART_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART Configuration +# +CONFIG_UART_RXBUFSIZE=64 +CONFIG_UART_TXBUFSIZE=64 +CONFIG_UART_BAUD=115200 +CONFIG_UART_BITS=8 +CONFIG_UART_PARITY=0 +CONFIG_UART_2STOP=0 +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_FS_RAMMAP is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Named Applications +# +# CONFIG_BUILTIN is not set + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_COMPOSITE is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +CONFIG_EXAMPLES_PASHELLO=y +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WLAN is not set + +# +# Interpreters +# + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +CONFIG_INTERPRETERS_PCODE=y +CONFIG_INTERPRETERS_PRUN=y + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# ModBus +# + +# +# FreeModbus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# System NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# diff --git a/configs/xtrs/pashello/setenv.bat b/configs/xtrs/pashello/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..fbedd244a86d2c001e0e8eda77c66f92b1a99146 --- /dev/null +++ b/configs/xtrs/pashello/setenv.bat @@ -0,0 +1,54 @@ +@echo off + +rem configs/xtrs/pashello/setenv.bat +rem +rem Copyright (C) 2012 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the SDCC toolchain for windows. + +set PATH=C:\Program Files (x86)\SDCC/bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% + +rem This is the location where the XTRS hex2cmd program is available +rem set PATH=????:%PATH% + +echo %PATH% diff --git a/configs/xtrs/scripts/setenv.sh b/configs/xtrs/scripts/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..8dc863ba59cc17aaf914fce47edb09f8e7446ad2 --- /dev/null +++ b/configs/xtrs/scripts/setenv.sh @@ -0,0 +1,72 @@ +#!/bin/bash +# configs/xtrs/ostest/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# +# This is the normal installation directory for SDCC under Linux, OSX +# or Linux: +# +export TOOLCHAIN_BIN=/usr/local/bin + +# +# This is the normal installation directory for SDCC under Windows +# +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/SDCC/bin" + +# +# Add the path to the toolchain to the PATH varialble +# +export PATH="${TOOLCHAIN_BIN}":/sbin:/usr/sbin:${PATH_ORIG} + +# +# This is the location where the XTRS hex2cmd program is available +# +# export HEX2CMD_BIN=???? +# export PATH="${HEX2CMD_BIN}":${PATH} + +echo "PATH : ${PATH}" diff --git a/configs/xtrs/src/.gitignore b/configs/xtrs/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..91e29681eea74930dc7a35a0427623c938739152 --- /dev/null +++ b/configs/xtrs/src/.gitignore @@ -0,0 +1,13 @@ +/Make.dep +/.depend +/*.sym +/*.rel +/*.lst +/*.adb +/*.rst +/*.lib +/*.lnk +/*.map +/*.mem +/*.ihx +/*.hex diff --git a/configs/xtrs/src/Make.defs b/configs/xtrs/src/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e20f03a4e56bc78c328bfd4cc6c1984081fb026d --- /dev/null +++ b/configs/xtrs/src/Make.defs @@ -0,0 +1,37 @@ +############################################################################ +# configs/xtrs/src/Make.defs +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +HEAD_ASRC = xtrs_head.asm + diff --git a/configs/xtrs/src/Makefile b/configs/xtrs/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..4398bf214a7fd2af3647d101e9bf3baa33cd2ef3 --- /dev/null +++ b/configs/xtrs/src/Makefile @@ -0,0 +1,41 @@ +############################################################################ +# configs/xtrs/src/Makefile +# +# Copyright (C) 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = xtr_irq.c xtr_serial.c xtr_timerisr.c xtr_lowputc.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/xtrs/src/xtr_irq.c b/configs/xtrs/src/xtr_irq.c new file mode 100644 index 0000000000000000000000000000000000000000..38047c9d669cea85dd463896929caa0646085ed1 --- /dev/null +++ b/configs/xtrs/src/xtr_irq.c @@ -0,0 +1,69 @@ +/**************************************************************************** + * configs/xtrs/src/xtr_irq.c + * + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +/**************************************************************************** + * Name: up_irqinitialize + ****************************************************************************/ + +void up_irqinitialize(void) +{ + /* Attach the timer interrupt -- There is no special timer interrupt + * enable in the simulation so it must be enabled here before interrupts + * are enabled. + * + * NOTE: Normally, there are seperate enables for "global" interrupts + * and specific device interrupts. In such a "normal" case, the timer + * interrupt should be attached and enabled in the function up_timer_initialize() + */ + + irq_attach(Z80_IRQ_SYSTIMER, (xcpt_t)up_timerisr); + + /* And finally, enable interrupts (including the timer) */ + +#ifndef CONFIG_SUPPRESS_INTERRUPTS + up_irq_restore(Z80_C_FLAG); +#endif +} diff --git a/configs/xtrs/src/xtr_lowputc.c b/configs/xtrs/src/xtr_lowputc.c new file mode 100644 index 0000000000000000000000000000000000000000..67237730a035b2a68b59d09a04352447c92e2b32 --- /dev/null +++ b/configs/xtrs/src/xtr_lowputc.c @@ -0,0 +1,104 @@ +/******************************************************************************** + * configs/xtrs/src//xtr_lowputc.c + * + * Copyright (C) 2008 Jacques Pelletier. All rights reserved. + * Author: Jacques Pelletier + * + * This file is a part of NuttX and hence + * + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ********************************************************************************/ + +/******************************************************************************** + * Included Files + ********************************************************************************/ + +#include + +#include +#include +#include +#include + +#include "up_internal.h" + +/* Includes trs80-m3.h for assembler call addresses */ + +#include + +/******************************************************************************** + * Pre-processor Definitions + ********************************************************************************/ + +/******************************************************************************** + * Public Data + ********************************************************************************/ + +/******************************************************************************** + * Private Data + ********************************************************************************/ + +/******************************************************************************** + * Private Functions + ********************************************************************************/ + +/******************************************************************************** + * Public Functions + ********************************************************************************/ + +/******************************************************************************** + * Name: z80_lowputc + ********************************************************************************/ + +void z80_lowputc(char ch) __naked +{ + __asm + ld hl, #2 + add hl, sp + ld a, (hl) + call _TRS80_M3_VDCHAR ;0x0033 + ret + __endasm; +} + +/******************************************************************************** + * Name: z80_lowgetc + ********************************************************************************/ + +char z80_lowgetc(void) __naked +{ + __asm + call _TRS80_M3_KBDSCN ;0x002b + ld l, a + ld h, #0 + ret + __endasm; +} diff --git a/configs/xtrs/src/xtr_serial.c b/configs/xtrs/src/xtr_serial.c new file mode 100644 index 0000000000000000000000000000000000000000..46d9cad72ef7f9ca055955e64b13f12e845e9f69 --- /dev/null +++ b/configs/xtrs/src/xtr_serial.c @@ -0,0 +1,414 @@ +/**************************************************************************** + * config/xtrs/src/xtr_serial.c + * + * Copyright (C) 2008 Jacques Pelletier. All rights reserved. + * Author: Jacques Pelletier + * + * This file is a part of NuttX and hence + * + * Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#ifdef USE_SERIALDRIVER + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +#define TRSDOS 0 /* TRSDOS 1.3 */ +#define LDOS 1 /* LDOS 5.3.1 */ + +#define MODEM_STATUS 0xe8 +#define RESET 0xe8 +#define BAUD 0xe9 +#define STATUS 0xea +#define CONTROL 0xea +#define RECV_REG 0xeb +#define XMIT_REG 0xeb + +#define XMIT_REG_EMPTY 0x40 + +#define WRINTMASK 0xe0 + +#define MASK_XMIT_INT 0x10 +#define MASK_RECV_INT 0x20 +#define MASK_ERR_INT 0x40 + +#if TRSDOS +#define WRINTMASK_SHADOW 0x4213 +#define XMIT_INT_VECTOR 0x4207 +#define RECV_INT_VECTOR 0x420a +#endif + +#if LDOS +#define WRINTMASK_SHADOW 0x4474 +#define XMIT_INT_VECTOR 0x447D +#define RECV_INT_VECTOR 0x447F +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int up_setup(FAR struct uart_dev_s *dev); +static void up_shutdown(FAR struct uart_dev_s *dev); +static int up_attach(FAR struct uart_dev_s *dev); +static void up_detach(FAR struct uart_dev_s *dev); +static int up_ioctl(FAR struct file *filep, int cmd, unsigned long arg); +static int up_receive(FAR struct uart_dev_s *dev, unsigned int *status); +static void up_rxint(FAR struct uart_dev_s *dev, bool enable); +static bool up_rxavailable(FAR struct uart_dev_s *dev); +static void up_send(FAR struct uart_dev_s *dev, int ch); +static void up_txint(FAR struct uart_dev_s *dev, bool enable); +static bool up_txready(FAR struct uart_dev_s *dev); +static bool up_txempty(FAR struct uart_dev_s *dev); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct uart_ops_s g_uart_ops = +{ + up_setup, /* setup */ + up_shutdown, /* shutdown */ + up_attach, /* attach */ + up_detach, /* detach */ + up_ioctl, /* ioctl */ + up_receive, /* receive */ + up_rxint, /* rxint */ + up_rxavailable, /* rxavailable */ +#ifdef CONFIG_SERIAL_IFLOWCONTROL + NULL, /* rxflowcontrol */ +#endif + up_send, /* send */ + up_txint, /* txint */ + up_txready, /* txready */ + up_txempty, /* txempty */ +}; + +/* I/O buffers */ + +static char g_uartrxbuffer[CONFIG_UART_RXBUFSIZE]; +static char g_uarttxbuffer[CONFIG_UART_TXBUFSIZE]; + +/* This describes the state of the fake UART port. */ + +static uart_dev_t g_uartport = +{ + 0, /* open_count */ + false, /* xmitwaiting */ + false, /* recvwaiting */ + false, /* isconsole */ + { 1 }, /* closesem */ + { 0 }, /* xmitsem */ + { 0 }, /* recvsem */ + { /* xmit */ + { 1 }, /* sem */ + 0, /* head */ + 0, /* tail */ + CONFIG_UART_TXBUFSIZE, /* size */ + g_uarttxbuffer, /* buffer */ + }, + { /* recv */ + { 1 }, /* sem */ + 0, /* head */ + 0, /* tail */ + CONFIG_UART_RXBUFSIZE, /* size */ + g_uartrxbuffer, /* buffer */ + }, + &g_uart_ops, /* ops */ + NULL, /* priv */ +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_setup + * + * Description: + * Configure the UART baud, bits, parity, fifos, etc. This + * method is called the first time that the serial port is + * opened. + * + ****************************************************************************/ + +static int up_setup(FAR struct uart_dev_s *dev) +{ + outp(RESET, 0); + outp(CONTROL, ctrl); + outp(BAUD, baud); + + return OK; +} + +/**************************************************************************** + * Name: up_shutdown + * + * Description: + * Disable the UART. This method is called when the serial + * port is closed + * + ****************************************************************************/ + +static void up_shutdown(FAR struct uart_dev_s *dev) +{ +} + +/**************************************************************************** + * Name: up_attach + * + * Description: + * Configure the UART to operation in interrupt driven mode. This method is + * called when the serial port is opened. Normally, this is just after the + * setup() method is called, however, the serial console may operate in a + * non-interrupt driven mode during the boot phase. + * + * RX and TX interrupts are not enabled by the attach method (unless the + * hardware supports multiple levels of interrupt enabling). The RX and TX + * interrupts are not enabled until the txint() and rxint() methods are called. + * + ****************************************************************************/ + +static int up_attach(FAR struct uart_dev_s *dev) +{ +// SDCC complains here +// *((void (*)()) XMIT_INT_VECTOR) = rs232_xmitisr; +// *((void (*)()) RECV_INT_VECTOR) = rs232_recvisr; + *((int *) XMIT_INT_VECTOR) = (int) rs232_xmitisr; + *((int *) RECV_INT_VECTOR) = (int) rs232_recvisr; + + *(char *)WRINTMASK_SHADOW &= ~(MASK_ERR_INT | MASK_XMIT_INT); + outp(WRINTMASK, *(char *)WRINTMASK_SHADOW |= MASK_RECV_INT); + + return OK; +} + +/**************************************************************************** + * Name: up_detach + * + * Description: + * Detach UART interrupts. This method is called when the serial port is + * closed normally just before the shutdown method is called. The exception is + * the serial console which is never shutdown. + * + ****************************************************************************/ + +static void up_detach(FAR struct uart_dev_s *dev) +{ + outp(WRINTMASK, *(char *)WRINTMASK_SHADOW &= ~(MASK_ERR_INT | MASK_RECV_INT | MASK_XMIT_INT)); + *((int *) XMIT_INT_VECTOR) = 0x35fa; + *((int *) RECV_INT_VECTOR) = 0x35fa; +} + +/**************************************************************************** + * Name: up_ioctl + * + * Description: + * All ioctl calls will be routed through this method + * + ****************************************************************************/ + +static int up_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + *get_errno_ptr() = ENOTTY; + return ERROR; +} + +/**************************************************************************** + * Name: up_receive + * + * Description: + * Called (usually) from the interrupt level to receive one + * character from the UART. Error bits associated with the + * receipt are provided in the return 'status'. + * + ****************************************************************************/ + +static int up_receive(FAR struct uart_dev_s *dev, unsigned int *status) +{ +// uint8_t ch = z80_lowputc(); + + *status = 0; + return ch; +} + +/**************************************************************************** + * Name: up_rxint + * + * Description: + * Call to enable or disable RX interrupts + * + ****************************************************************************/ + +static void up_rxint(FAR struct uart_dev_s *dev, bool enable) +{ +} + +/**************************************************************************** + * Name: up_rxavailable + * + * Description: + * Return true if the receive fifo is not empty + * + ****************************************************************************/ + +static bool up_rxavailable(FAR struct uart_dev_s *dev) +{ + return true; +} + +/**************************************************************************** + * Name: up_send + * + * Description: + * This method will send one byte on the UART + * + ****************************************************************************/ + +static void up_send(FAR struct uart_dev_s *dev, int ch) +{ + z80_lowputc(ch); +} + +/**************************************************************************** + * Name: up_txint + * + * Description: + * Call to enable or disable TX interrupts + * + ****************************************************************************/ + +static void up_txint(FAR struct uart_dev_s *dev, bool enable) +{ +} + +/**************************************************************************** + * Name: up_txready + * + * Description: + * Return true if the transmit fifo is not full + * + ****************************************************************************/ + +static bool up_txready(FAR struct uart_dev_s *dev) +{ + return true; +} + +/**************************************************************************** + * Name: up_txempty + * + * Description: + * Return true if the transmit fifo is empty + * + ****************************************************************************/ + +static bool up_txempty(FAR struct uart_dev_s *dev) +{ + return true; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_serialinit + * + * Description: + * Performs the low level UART initialization early in + * debug so that the serial console will be available + * during bootup. This must be called before up_serialinit. + * + ****************************************************************************/ + +void up_earlyserialinit(void) +{ +} + +/**************************************************************************** + * Name: up_serialinit + * + * Description: + * Register serial ports. This assumes + * that up_earlyserialinit was called previously. + * + ****************************************************************************/ + +void up_serialinit(void) +{ + (void)uart_register("/dev/console", &g_uartport); + (void)uart_register("/dev/ttyS0", &g_uartport); +} +#endif /* USE_SERIALDRIVER */ + +/**************************************************************************** + * Name: up_putc + * + * Description: + * Provide priority, low-level access to support OS debug + * writes + * + ****************************************************************************/ + +int up_putc(int ch) +{ + z80_lowputc(ch); + return 0; +} diff --git a/configs/xtrs/src/xtr_timerisr.c b/configs/xtrs/src/xtr_timerisr.c new file mode 100644 index 0000000000000000000000000000000000000000..62afe947aacc5395f938e433d46b3c6a8a0a0f12 --- /dev/null +++ b/configs/xtrs/src/xtr_timerisr.c @@ -0,0 +1,94 @@ +/**************************************************************************** + * configs/xtrs/src/xtr_timerisr.c + * + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "clock/clock.h" +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Function: up_timerisr + * + * Description: + * The timer ISR will perform a variety of services for various portions of + * the system. + * + ****************************************************************************/ + +int up_timerisr(int irq, FAR chipreg_t *regs) +{ + /* Process timer interrupt */ + + sched_process_timer(); + return 0; +} + +/**************************************************************************** + * Function: up_timer_initialize + * + * Description: + * This function is called during start-up to initialize the timer + * interrupt. + * + ****************************************************************************/ + +void up_timer_initialize(void) +{ + /* The timer interrupt was attached in up_irqinitialize -- see comments there */ +} diff --git a/configs/xtrs/src/xtrs_head.asm b/configs/xtrs/src/xtrs_head.asm new file mode 100644 index 0000000000000000000000000000000000000000..db717ef097b22a495a3e34f291c4bcbd7372ae91 --- /dev/null +++ b/configs/xtrs/src/xtrs_head.asm @@ -0,0 +1,296 @@ +;************************************************************************** +; configs/xtrs/src/xtrs_head.asm +; +; Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved. +; Author: Gregory Nutt +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; 3. Neither the name NuttX nor the names of its contributors may be +; used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; +;************************************************************************** + + .title NuttX for the Z80 + .module xtrs_head + +;************************************************************************** +; Constants +;************************************************************************** + + ; Register save area layout + + XCPT_I == 0 ; Offset 0: Saved I w/interrupt state in parity + XCPT_BC == 2 ; Offset 1: Saved BC register + XCPT_DE == 4 ; Offset 2: Saved DE register + XCPT_IX == 6 ; Offset 3: Saved IX register + XCPT_IY == 8 ; Offset 4: Saved IY register + XCPT_SP == 10 ; Offset 5: Offset to SP at time of interrupt + XCPT_HL == 12 ; Offset 6: Saved HL register + XCPT_AF == 14 ; Offset 7: Saved AF register + XCPT_PC == 16 ; Offset 8: Offset to PC at time of interrupt + + ; Default stack base (needs to be fixed) + + .include "asm_mem.h" + +;************************************************************************** +; Global symbols used +;************************************************************************** + + .globl _os_start ; OS entry point + .globl _up_doirq ; Interrupt decoding logic + +;************************************************************************** +; System start logic +;************************************************************************** + +_up_reset: + ; Set up the stack pointer at the location determined the Makefile + ; and stored in asm_mem.h + + ld SP, #CONFIG_STACK_END ; Set stack pointer + + ; Performed initialization unique to the SDCC toolchain + + call gsinit ; Initialize the data section + + ; Copy the reset vectors + + ld hl, #_up_rstvectors ; code for RAM + ld de, #0x4000 ; move it here + ld bc, #3*7 ; 7 vectors / 3 bytes each + ldir + + ; Then start NuttX + + call _os_start ; jump to the OS entry point + + ; NuttX will never return, but just in case... + +_up_halt:: + halt ; We should never get here + jp _up_halt + + ; Data to copy to address 0x4000 + +_up_rstvectors: + jp _up_rst1 ; 0x4000 : RST 1 + jp _up_rst2 ; 0x4003 : RST 2 + jp _up_rst3 ; 0x4006 : RST 3 + jp _up_rst4 ; 0x4009 : RST 4 + jp _up_rst5 ; 0x400c : RST 5 + jp _up_rst6 ; 0x400f : RST 6 + jp _up_rst7 ; 0x4012 : RST 7 + +;************************************************************************** +; Other reset handlers +; +; Interrupt mode 1 behavior: +; +; 1. M1 cycle: 7 ticks +; Acknowledge interrupt and decrements SP +; 2. M2 cycle: 3 ticks +; Writes the MS byte of the PC onto the stack and decrements SP +; 3. M3 cycle: 3 ticks +; Writes the LS byte of the PC onto the stack and sets the PC to 0x0038. +; +;************************************************************************** + +_up_rst1: ; RST 1 + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #1 ; 1 = Z80_RST1 + jr _up_rstcommon ; Remaining RST handling is common + +_up_rst2: ; RST 2 + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #2 ; 2 = Z80_RST2 + jr _up_rstcommon ; Remaining RST handling is common + +_up_rst3: ; RST 3 + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #3 ; 1 = Z80_RST3 + jr _up_rstcommon ; Remaining RST handling is common + +_up_rst4: ; RST 4 + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #4 ; 1 = Z80_RST4 + jr _up_rstcommon ; Remaining RST handling is common + +_up_rst5: ; RST 5 + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #5 ; 1 = Z80_RST5 + jr _up_rstcommon ; Remaining RST handling is common + +_up_rst6: ; RST 6 + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #6 ; 1 = Z80_RST6 + jr _up_rstcommon ; Remaining RST handling is common + +_up_rst7: ; RST 7 + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #7 ; 7 = Z80_RST7 + jr _up_rstcommon ; Remaining RST handling is common + +;************************************************************************** +; Common Interrupt handler +;************************************************************************** + +_up_rstcommon: + ; Create a register frame. SP points to top of frame + 4, pushes + ; decrement the stack pointer. Already have + ; + ; Offset 8: Return PC is already on the stack + ; Offset 7: AF (retaining flags) + ; + ; IRQ number is in A + + push hl ; Offset 6: HL + ld hl, #(3*2) ; HL is the value of the stack pointer before + add hl, sp ; the interrupt occurred + push hl ; Offset 5: Stack pointer + push iy ; Offset 4: IY + push ix ; Offset 3: IX + push de ; Offset 2: DE + push bc ; Offset 1: BC + + ld b, a ; Save the reset number in B + ld a, i ; Parity bit holds interrupt state + push af ; Offset 0: I with interrupt state in parity + di + + ; Call the interrupt decode logic. SP points to the beggining of the reg structure + + ld hl, #0 ; Argument #2 is the beginning of the reg structure + add hl, sp ; + push hl ; Place argument #2 at the top of stack + push bc ; Argument #1 is the Reset number + inc sp ; (make byte sized) + call _up_doirq ; Decode the IRQ + + ; On return, HL points to the beginning of the reg structure to restore + ; Note that (1) the arguments pushed on the stack are not popped, and (2) the + ; original stack pointer is lost. In the normal case (no context switch), + ; HL will contain the value of the SP before the arguments wer pushed. + + ld sp, hl ; Use the new stack pointer + + ; Restore registers. HL points to the beginning of the reg structure to restore + + ex af, af' ; Select alternate AF + pop af ; Offset 0: AF' = I with interrupt state in parity + ex af, af' ; Restore original AF + pop bc ; Offset 1: BC + pop de ; Offset 2: DE + pop ix ; Offset 3: IX + pop iy ; Offset 4: IY + exx ; Use alternate BC/DE/HL + ld hl, #-2 ; Offset of SP to account for ret addr on stack + pop de ; Offset 5: HL' = Stack pointer after return + add hl, de ; HL = Stack pointer value before return + exx ; Restore original BC/DE/HL + pop hl ; Offset 6: HL + pop af ; Offset 7: AF + + ; Restore the stack pointer + + exx ; Use alternate BC/DE/HL + ld sp, hl ; Set SP = saved stack pointer value before return + exx ; Restore original BC/DE/HL + + ; Restore interrupt state + + ex af, af' ; Recover interrupt state + jp po, nointenable ; Odd parity, IFF2=0, means disabled + ex af, af' ; Restore AF (before enabling interrupts) + ei ; yes + reti +nointenable:: + ex af, af' ; Restore AF + reti + +;************************************************************************** +; Ordering of segments for the linker (SDCC only) +;************************************************************************** + + .area _HOME + .area _CODE + .area _INITIALIZER + .area _GSINIT + .area _GSFINAL + + .area _DATA + .area _INITIALIZED + .area _BSEG + .area _BSS + .area _HEAP + +;************************************************************************** +; Global data initialization logic (SDCC only) +;************************************************************************** + + .area _GSINIT +gsinit:: + ld bc, #l__INITIALIZER + ld a, b + or a, c + jr Z, gsinit_next + ld de, #s__INITIALIZED + ld hl, #s__INITIALIZER + ldir +gsinit_next: + + .area _GSFINAL + ret + +;************************************************************************** +; The start of the heap (SDCC only). Note that is actually resides in +; the _CODE area (which may be FLASH or ROM) +;************************************************************************** + + .area _CODE +_g_heapbase:: + .dw #s__HEAP diff --git a/configs/z16f2800100zcog/Kconfig b/configs/z16f2800100zcog/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/z16f2800100zcog/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/z16f2800100zcog/README.txt b/configs/z16f2800100zcog/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..02f7f84bfdec0b346174822c73129678c7cddfed --- /dev/null +++ b/configs/z16f2800100zcog/README.txt @@ -0,0 +1,278 @@ +README.txt +========== + +This is the README file for the NuttX port to the ZiLog ZNEO MCU. + +- Console output is on UART0. + +- NOTE: My board has a 20MHz crystal, but I have heard of other boards with + 18.432MHz crystals. If you board has a diff crystal installed, then + modify the system frequency in include/board.h. + +Contents +======== + + - ZDS-II Compiler Versions + - Patches + - Serial Console + - Selecting Configurations + - Configuration Sub-directories + +ZDS-II Compiler Versions +======================== + +Version 4.10.2 + + The ZDS-II version 4.10.2 will not compile NuttX. It reports "internal + errors" on some of the files. Upgrades to ZDS-II are available for + download from the Zilog website: http://www.zilog.com/software/zds2.asp + +Version 4.11.0 + + NuttX compiles correctly with the newer 4.11.0 version of the ZDS-II + toolchain. However, I have found a few issues: + + - The code will not run without the -reduceopt option. There is, + apparently, some optimization related issue. This issue has not + been analyzed as of this writing. + + - Not all NuttX logic will not run with the -regvars option. There is + at least one failure that has been reported to ZiLOG as incident 81400. + + - The Pascal add-on interpreter includes a large switch statement and + exposes another compiler problem. This is reported as incident 81459. + +Version 4.11.1 + + As of this writing (30 September 2010), the latest release of ZDS-II for the + ZNEO is 4.11.1. It is unknown if this release includes fixes for incidents + 81400 and 81459 or not. It is unknown if the code will run without -reduceopt + either. (Basically, it compiles with 4.11.1, but is untested with that version). + +Version 4.12.0 + + Never tested + +Version 5.0.0 + + Never tested + +Version 5.0.1 + + On November 29, 2012, all of the z16f configurations were converted to use 5.0.1, + but have not been verified on a running target. + + Paths were also updated that are specific to a 32-bit toolchain running on + a 64 bit windows platform. Change to a different toolchain, you will need + to modify the versioning in Make.defs and setenv.sh; if you want to build + on a different platform, you will need to change the path in the ZDS binaries + in those same files. + +Other Versions + + If you use any version of ZDS-II other than 5.0.1 or if you install ZDS-II + at any location other than the default location, you will have to modify + two files: (1) configs/z16f2800100zcog/*/setenv.sh and (2) + configs/z16f2800100zcog/*/Make.defs. Simply edit these two files, changing + 5.0.1 to whatever. + +Patches +======= + +A bug has been found in the ZDS-II toolchain version 5.0.1. a patch is +available to work around the bug. A summary of the nature the bug and +instructions for applying the patch follow. + +Parameters are passed different to variadic functions (i.e., functions +that accept a varying number of parameters) than to regular functions. For +most functions, parameters are passed in registers, beginning with R1. But +for variadic functions, all parameters must be passed on the stack. + +The logic works correctly for global functions, local functions, and most +function pointers. It does not work correctly for the case where a variadic +function point is included within a structure. In that case, the caller +inappropriately passes the parameters in registers; the receiver will +attempt to recover the parameters from the stack and a failure then follows. + +This bug prevents the use of NSH with the ZNEO. However, a patch has been +developed that works around the problem. That patch can be found at +configs/z16f2800100zcog/tools/zneo-zdsii-5_0_1-variadic-func-fix.patch. In +that directory is also a bash script that will apply that patch for you. + +The patch would be applied when NuttX is configured as follows: + + cd tools + ./configure.sh z16f2800100zcog/nsh + cd .. + . ./setenv.sh + dopatch.sh + make + +The patch can also be removed with: + + dopatch.sh -R + +See the section "Selecting Configurations" below. + +Serial Console +============== + +By default, console output is on UART1 which corresponds to the DB9 +connector labelled CONSOLE. + +UART1 is also available on JP2: + + MCU PIN GPIO JP2 + Pin 86 TXD1 PD5 JP2 Pin 26 + Pin 87 RXD1 PD4 JP2 Pin 27 + Vcc JP2 Pin 59 + GND JP2 Pins 19, 39, 46, 48, 56 + +Selecting Configurations +======================== + +Variations on the basic z8f162800100zcog configuration are maintained +in subdirectories. To configure any specific configuration, do the +following steps: + + cd /tools + ./configure.sh z16f2800100zcog/ + cd + make + +Where is the specific board configuration that you +wish to build. The following board-specific configurations are +available. You may also need to apply a path to NuttX before making. +Please refer the the section "Patches" above" + +Configuration Sub-directories +============================= + +source/ and include/ +-------------------- + + These directories contain common logic for all z16f2800100zcog + configurations. + +nsh +--- + nsh: + This configuration directory will built the NuttShell (NSH). See + the NSH user manual in the documents directory (or online at nuttx.org). + See also the README.txt file in the nsh sub-directory for information + about using ZDS-II. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration assumes that you are using the + Cygwin environment on Windows. An option is to use the native + CMD.exe window build as described in the top-level README.txt + file. To set up that configuration: + + -CONFIG_WINDOWS_CYGWIN=y + +CONFIG_WINDOWS_NATIVE=y + + And after configuring, make sure that CONFIG_APPS_DIR uses + the back slash character. For example: + + CONFIG_APPS_DIR="..\apps" + + NOTES: + + a. If you need to change the toolchain path used in Make.defs, you + will need to use the short 8.3 filenames to avoid spaces. On my + PC, C:\PROGRA~1\ is is C:\Program Files\ and C:\PROGRA~2\ is + C:\Program Files (x86)\ + b. I have not tried to use this configuration with the native + Windows build, but I would expect the same issues as is listed + for the ostest configuration.. + + STATUS: + + 1. Note that you must apply the ZNEO patch if you are using ZDS-II 5.0.1. + See the README.txt file in the parent directory for more information. + The configuration will run correctly with the patch applied. + +ostest +------ + + This builds the examples/ostest application for execution from FLASH. + See the README.txt file in the ostest sub-directory for information + about using ZDS-II. See also apps/examples/README.txt for information + about ostest. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration assumes that you are using the + Cygwin environment on Windows. An option is to use the native + CMD.exe window build as described in the top-level README.txt + file. To set up that configuration: + + -CONFIG_WINDOWS_CYGWIN=y + +CONFIG_WINDOWS_NATIVE=y + + And after configuring, make sure that CONFIG_APPS_DIR uses + the back slash character. For example: + + CONFIG_APPS_DIR="..\apps" + + NOTES: + + a. If you need to change the toolchain path used in Make.defs, you + will need to use the short 8.3 filenames to avoid spaces. On my + PC, C:\PROGRA~1\ is is C:\Program Files\ and C:\PROGRA~2\ is + C:\Program Files (x86)\ + b. You can't use setenv.sh in the native Windows environment. Try + scripts/setenv.bat instead. + c. At present, the native Windows build fails at the final link stages. + The failure is due to problems in arch/z16/src/nuttx.linkcmd that + is autogenerated by arch/z16/src/Makefile. The basic problem + is the spurious spaces and and carriage returns are generated at + the end of the lines after a line continuation (\ ^M). If these + trailing bad characters are manually eliminated, then the build + will succeed on the next try. + +pashello +-------- + + Configures to use examples/pashello for execution from FLASH + See examples/README.txt for information about pashello. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. The last time I tried building this configuration, there were + a few undefined symbols from the PCODE logic. It might require + a little TLC to get this all working again. + + 3. The native windows build has not been tried with this configuration + but should, in principle, work (see notes for the ostest configuration + above). + +Check out any README.txt files in these s. diff --git a/configs/z16f2800100zcog/include/board.h b/configs/z16f2800100zcog/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..60707e968dc0aa16286e2686b5f84333acaa1fa3 --- /dev/null +++ b/configs/z16f2800100zcog/include/board.h @@ -0,0 +1,125 @@ +/**************************************************************************** + * configs/z16f2800100zcog/board.h + * + * Copyright (C) 2008, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_Z16F2800100ZCOG_INCLUDE_BOARD_H +#define __CONFIGS_Z16F2800100ZCOG_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* The Z16F2800100ZCOG board has a 20MHz crystal. The ZNEO clocking will be + * configured to use this crystal frequency directly as the clock source + */ + +#define BOARD_XTAL_FREQUENCY 20000000 /* 20MHz */ +#define BOARD_CLKSRC 1 /* Clock source = external crystal */ +#define BOARD_SYSTEM_FREQUENCY BOARD_XTAL_FREQUENCY + +/* Flash option bits + * + * "Each time the option bits are programmed or erased, the device must be + * Reset for the change to take place. During any reset operation .., the + * option bits are automatically read from the Program memory and written + * to Option Configuration registers. ... Option Bit Control Register are + * loaded before the device exits Reset and the ZNEO CPU begins code + * execution. The Option Configuration registers are not part of the + * Register file and are not accessible for read or write access." + */ + +#ifndef __ASSEMBLY__ +# define BOARD_FLOPTION0 (Z16F_FLOPTION0_MAXPWR | Z16F_FLOPTION0_WDTRES | \ + Z16F_FLOPTION0_WDTA0 | Z16F_FLOPTION0_VBOA0 | \ + Z16F_FLOPTION0_DBGUART | Z16F_FLOPTION0_FWP | \ + Z16F_FLOPTION0_RP) + +# define BOARD_FLOPTION1 (Z16F_FLOPTION1_RESVD | Z16F_FLOPTION1_MCEN | \ + Z16F_FLOPTION1_OFFH | Z16F_FLOPTION1_OFFL) + +# define BOARD_FLOPTION2 Z16F_FLOPTION2_RESVD + +# define BOARD_FLOPTION3 (Z16F_FLOPTION3_RESVD | Z16F_FLOPTION3_NORMAL | \ + Z16F_FLOPTION3_ROMLESS) + +/* The same settings, pre-digested for assembly language */ + +#else +# define BOARD_FLOPTION0 %ff +# define BOARD_FLOPTION1 %ff +# define BOARD_FLOPTION2 %ff +# define BOARD_FLOPTION3 %ff +#endif + +/* LED pattern definitions + * + * The z16f2800100zcog board has four LEDs: + * + * - Green LED D1 which illuminates in the presence of Vcc + * - Red LED D2 connected to chip port PA0_T0IN + * - Yellow LED D3 connected to chip port PA1_T0OUT + * - Green LED D4 connected to chip port PA2_DE0 + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_IDLE 4 +#define LED_INIRQ 5 +#define LED_SIGNAL 6 +#define LED_ASSERTION 7 +#define LED_PANIC 8 + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __CONFIGS_Z16F2800100ZCOG_INCLUDE_BOARD_H */ diff --git a/configs/z16f2800100zcog/nsh/.gitignore b/configs/z16f2800100zcog/nsh/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..fb65796523367467899a15ae26bd91f221f26620 --- /dev/null +++ b/configs/z16f2800100zcog/nsh/.gitignore @@ -0,0 +1,5 @@ +nsh.hex +nsh.map +nsh.lod +nsh.wsp + diff --git a/configs/z16f2800100zcog/nsh/Make.defs b/configs/z16f2800100zcog/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..13ec107e64dfd06c065604d79720e68eb1f93631 --- /dev/null +++ b/configs/z16f2800100zcog/nsh/Make.defs @@ -0,0 +1,264 @@ +############################################################################ +# configs/z16f2800100zcog/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk + +# These are the directories where the ZDS-II toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ZDSVERSION = 5.0.1 + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + ZDSINSTALLDIR = C:/PROGRA~2/ZiLOG/ZDSII_ZNEO_$(ZDSVERSION) + INSTALLDIR = ${shell echo $(ZDSINSTALLDIR)| sed -e "s/\//\\/g"} + ZDSBINDIR = $(INSTALLDIR)\bin + ZDSSTDINCDIR = $(INSTALLDIR)\include\std + ZDSZILOGINCDIR = $(INSTALLDIR)\include\zilog + ZDSSTDLIBDIR = $(INSTALLDIR)\lib\std + ZDSZILOGLIBDIR = $(INSTALLDIR)\lib\zilog + + # CFLAGs + + ARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + EARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHSTDINCLUDES = -stdinc:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHUSRINCLUDES = -usrinc:. +else + WINTOOL = y + ZDSINSTALLDIR = C:/PROGRA~2/ZiLOG/ZDSII_ZNEO_$(ZDSVERSION) + INSTALLDIR = ${shell cygpath -u "$(ZDSINSTALLDIR)"} + ZDSBINDIR = $(INSTALLDIR)/bin + ZDSSTDINCDIR = $(INSTALLDIR)/include/std + ZDSZILOGINCDIR = $(INSTALLDIR)/include/zilog + ZDSSTDLIBDIR = $(INSTALLDIR)/lib/std + ZDSZILOGLIBDIR = $(INSTALLDIR)/lib/zilog + + # These are the same directories but with the directory separator + # character swapped as needed by the ZDS-II compiler + + WTOPDIR = ${shell cygpath -w "$(TOPDIR)"} + WZDSSTDINCDIR = ${shell cygpath -w "$(ZDSSTDINCDIR)"} + WZDSZILOGINCDIR = ${shell cygpath -w "$(ZDSZILOGINCDIR)"} + WZDSSTDLIBDIR = ${shell cygpath -w "$(ZDSSTDLIBDIR)"} + WZDSZILOGLIBDIR = ${shell cygpath -w "$(ZDSZILOGLIBDIR)"} + + # Escaped versions + + ETOPDIR = ${shell echo "$(WTOPDIR)" | sed -e "s/ /%20/g"} + EZDSSTDINCDIR = ${shell echo "$(WZDSSTDINCDIR)" | sed -e "s/ /%20/g"} + EZDSZILOGINCDIR = ${shell echo "$(WZDSZILOGINCDIR)" | sed -e "s/ /%20/g"} + + # CFLAGs + + ARCHASMINCLUDES = -include:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + EARCHASMINCLUDES = -include:'$(ETOPDIR)\include;$(EZDSSTDINCDIR);$(EZDSZILOGINCDIR)' + ARCHSTDINCLUDES = -stdinc:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + ARCHUSRINCLUDES = -usrinc:'.' +endif + +# Assembler definitions + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHASMOPTIMIZATION = -debug +else + ARCHASMOPTIMIZATION = -nodebug +endif + +ARCHASMCPUFLAGS = -cpu:Z16F2811AL -NOigcase +ARCHASMLIST = -NOlistmac -name -pagelen:56 -pagewidth:80 -quiet +ARCHASMWARNINGS = -warn +ARCHASMDEFINES = -define:_Z16F2811AL=1 -define:_Z16K_SERIES=1 -define:_Z16F_SERIES=1 -define:__ASSEMBLY__ +AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION) + +# Compiler definitions + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -debug +else + ARCHOPTIMIZATION = -nodebug +endif + +ifeq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -NOregvar -reduceopt +else + ARCHOPTIMIZATION += -regvar +endif + +ARCHCPUFLAGS = -chartype:S -model:L -NOmodsect -cpu:Z16F2811AL -NOgenprint \ + -asmsw:" $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)" +ARCHLIST = -keeplst -NOlist -NOlistinc -NOkeepasm +ARCHPICFLAGS = +ARCHWARNINGS = -warn +ARCHDEFINES = -define:_Z16F2811AL -define:_Z16K_SERIES -define:_Z16F_SERIES +ARCHINCLUDES = $(ARCHSTDINCLUDES) $(ARCHUSRINCLUDES) +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHLIST) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) + +CPPDEFINES = -D_Z16F2811AL -D_Z16K_SERIES -D_Z16F_SERIES -D__ASSEMBLY__ +CPPINCLUDES = -I$(TOPDIR)$(DELIM)include +CPPFLAGS = $(CPPDEFINES) $(CPPINCLUDES) + +# Librarian definitions + +ARFLAGS = -quiet -warn + +# Linker definitions + +LINKCMDTEMPLATE = $(TOPDIR)$(DELIM)configs$(DELIM)z16f2800100zcog$(DELIM)nsh$(DELIM)nsh.linkcmd + +# Tool names/pathes + +CROSSDEV = +CC = zneocc.exe +CPP = gcc -E +LD = zneolink.exe +AS = zneoasm.exe +AR = zneolib.exe + +# File extensions + +ASMEXT = .asm +OBJEXT = .obj +LIBEXT = .lib +EXEEXT = .hex + +# These are the macros that will be used in the NuttX make system +# to compile and assembly source files and to insert the resulting +# object files into an archive + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + +define PREPROCESS + @echo CPP: $1->$2 + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) "$(CC)" $(CFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define ASSEMBLE + $(Q) "$(AS)" $(AFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + @#$(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + @echo AR: $2 + $(Q) for %%G in ($(2)) do ( "$(AR)" $(ARFLAGS) $1=-+%%G ) +endef + +define CLEAN + $(Q) if exist *.obj (del /f /q *.obj) + $(Q) if exist *.src (del /f /q *.src) + $(Q) if exist *.lib (del /f /q *.lib) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.lod (del /f /q *.lod) + $(Q) if exist *.lst (del /f /q *.lst) +endef + +else + +define PREPROCESS + @echo "CPP: $1->$2" + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) (wfile=`cygpath -w "$1"`; "$(CC)" $(CFLAGS) $$wfile) +endef + +define ASSEMBLE + $(Q) (wfile=`cygpath -w "$1"`; "$(AS)" $(AFLAGS) $$wfile) +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + @#$(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + $(Q) for __obj in $(2) ; do \ + echo "AR: $$__obj"; \ + "$(AR)" $(ARFLAGS) $1=-+$$__obj || { echo "$(AR) $1=-+$$__obj FAILED!" ; exit 1 ; } \ + done +endef + +define CLEAN + $(Q) rm -f *.obj *.src *.lib *.hex *.lod *.lst +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + + # ZDS-II cannot follow Cygwin soft links, so we will have to use directory copies + + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh +endif diff --git a/configs/z16f2800100zcog/nsh/README.txt b/configs/z16f2800100zcog/nsh/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..009dd146cab42142fdcda007a80fe57c72131352 --- /dev/null +++ b/configs/z16f2800100zcog/nsh/README.txt @@ -0,0 +1,48 @@ +README.txt +========== + +Contents +-------- + + o NSH Project + o Loading and Executing Code + o Console Output + o STATUS + +NSH Project +----------- + +nsh.zfpproj is a simple ZDS II - ZNEO 5.0.1 project that will allow you + to use the ZDS-II debugger. Before using, copy the following files from + the toplevel directory: + + nuttx.hex, nuttx.map, nuttx.lod + + to this directory as: + + nsh.hex, nsh.map, nsh.lod + +Loading and Executing Code +-------------------------- + +1. Copy the files to this directory as described above +2. Connect the ZiLOG XTools USB debugger. +3. Install the USB driver from the ZDS-II device_drivers directory +4. Start ZDS-II and load the nsh.zfpproj project +5. In the debug tab, connect to the debugger +6. In the debug tab, load code, reset, and go + +Console Output +-------------- + +Interaction with NSH is via the serial console at 57600 8N1 baud. + +STATUS +------ + +1. Note that you must apply the ZNEO patch if you are using ZDS-II 5.0.1. + See the README.txt file in the parent directory for more information. + This configuration does run correctly with the path applied. + +2. I bet that this code, like ostest, will not run if started by a hardware + reset. It may only run when started via the debugger. diff --git a/configs/z16f2800100zcog/nsh/defconfig b/configs/z16f2800100zcog/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..9f8dda804431f33374ae272cd36ac326f2c19e52 --- /dev/null +++ b/configs/z16f2800100zcog/nsh/defconfig @@ -0,0 +1,756 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +CONFIG_ARCH_Z16=y +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="z16" +CONFIG_ARCH_CHIP="z16f" + +# +# Z16 Configuration Options +# +# CONFIG_ARCH_CHIP_Z16F2810 is not set +CONFIG_ARCH_CHIP_Z16F2811=y +# CONFIG_ARCH_CHIP_Z16F3211 is not set +# CONFIG_ARCH_CHIP_Z16F6411 is not set +CONFIG_ARCH_CHIP_Z16F=y + +# +# Common Configuration Options +# + +# +# Z16F Configuration Options +# + +# +# Z16F Peripheral Selection +# +# CONFIG_Z16F_ESPI is not set +CONFIG_Z16F_UART0=y +CONFIG_Z16F_UART1=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_STACKDUMP is not set +CONFIG_ENDIAN_BIG=y +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_Z16F2800100ZCOG=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="z16f2800100zcog" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2014 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1536 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=57600 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_CONSOLE=y + +# +# USB Trace Support +# +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/z16f2800100zcog/nsh/nsh.linkcmd b/configs/z16f2800100zcog/nsh/nsh.linkcmd new file mode 100644 index 0000000000000000000000000000000000000000..db03f480cfe6a3b95396858422965a7275f719d5 --- /dev/null +++ b/configs/z16f2800100zcog/nsh/nsh.linkcmd @@ -0,0 +1,92 @@ +/****************************************************************************/ +/* configs/z16f2800100zcog/nsh/nsh.linkcmd */ +/* */ +/* Copyright (C) 2014 Gregory Nutt. All rights reserved. */ +/* Author: Gregory Nutt */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* 1. Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in */ +/* the documentation and/or other materials provided with the */ +/* distribution. */ +/* 3. Neither the name NuttX nor the names of its contributors may be */ +/* used to endorse or promote products derived from this software */ +/* without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ +/* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS */ +/* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE */ +/* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */ +/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, */ +/* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS */ +/* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED */ +/* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT */ +/* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN */ +/* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */ +/* POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/****************************************************************************/ + +-FORMAT=OMF695,INTEL32 +-map -maxhexlen=64 -quiet -sort NAME=ascending -unresolved=fatal +-warnoverlap -NOxref -warn -debug -NOigcase + +RANGE ROM $000000 : $007FFF +RANGE RAM $FFB000 : $FFBFFF +RANGE IODATA $FFC000 : $FFFFFF +RANGE EROM $008000 : $01FFFF +RANGE ERAM $800000 : $87FFFF + +CHANGE NEAR_TEXT=NEAR_DATA +CHANGE FAR_TEXT=FAR_DATA + +ORDER FAR_BSS, FAR_DATA +ORDER NEAR_BSS, NEAR_DATA +COPY NEAR_DATA EROM +COPY FAR_DATA EROM + +define _0_exit = 0 +define _low_near_romdata = copy base of NEAR_DATA +define _low_neardata = base of NEAR_DATA +define _len_neardata = length of NEAR_DATA +define _low_far_romdata = copy base of FAR_DATA +define _low_fardata = base of FAR_DATA +define _len_fardata = length of FAR_DATA +define _low_nearbss = base of NEAR_BSS +define _len_nearbss = length of NEAR_BSS +define _low_farbss = base of FAR_BSS +define _len_farbss = length of FAR_BSS +define _near_heaptop = highaddr of RAM +define _far_heaptop = highaddr of ERAM +define _far_stack = highaddr of ERAM +define _near_stack = highaddr of RAM +define _near_heapbot = top of RAM +define _far_heapbot = top of ERAM + +define _SYS_CLK_SRC = 1 +define _SYS_CLK_FREQ = 20000000 + +define __EXTCT_INIT_PARAM = $80 +define __EXTCS0_INIT_PARAM = $8012 +define __EXTCS1_INIT_PARAM = $8001 +define __EXTCS2_INIT_PARAM = $0000 +define __EXTCS3_INIT_PARAM = $0000 +define __EXTCS4_INIT_PARAM = $0000 +define __EXTCS5_INIT_PARAM = $0000 + +define __PFAF_INIT_PARAM = $ff +define __PGAF_INIT_PARAM = $ff +define __PDAF_INIT_PARAM = $ff00 +define __PAAF_INIT_PARAM = $0000 +define __PCAF_INIT_PARAM = $0000 +define __PHAF_INIT_PARAM = $0300 +define __PKAF_INIT_PARAM = $0f + +/* arch/z16/src/Makefile will append target, object and library paths below */ + diff --git a/configs/z16f2800100zcog/nsh/nsh.zfpproj b/configs/z16f2800100zcog/nsh/nsh.zfpproj new file mode 100644 index 0000000000000000000000000000000000000000..b889c95827d25703d39736ecf08618f289d3fe18 --- /dev/null +++ b/configs/z16f2800100zcog/nsh/nsh.zfpproj @@ -0,0 +1,238 @@ + +Z16F2811AL + + + +..\..\..\nuttx.hex + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/configs/z16f2800100zcog/nsh/setenv.sh b/configs/z16f2800100zcog/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..22408b498a114b769c85e1dcc33ba6eb9bff917c --- /dev/null +++ b/configs/z16f2800100zcog/nsh/setenv.sh @@ -0,0 +1,70 @@ +#!/bin/bash +# configs/z16f2800100zcog/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# Check how we were executed +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# +# This is the Cygwin path to location where the ZDS-II tools were installed +# +TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_ZNEO_5.0.1/bin" + +# +# This is the path to the z16f2800100zcog tool directory +# +TOOL_DIR="${WD}/configs/z16f2800100zcog/tools" + +# +# Add the path to the toolchain and tool directory to the PATH variable. NOTE +# that /bin and /usr/bin preceded the toolchain bin directory. This is because +# the ZDSII bin directory includes binaries like make.exe that will interfere +# with the normal build process if we do not give priority to the versions at +# /bin and /usr/bin. +# +export PATH="/bin:/usr/bin:${TOOLCHAIN_BIN}:${TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/z16f2800100zcog/ostest/.gitignore b/configs/z16f2800100zcog/ostest/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..70a1573419693b39829ee7892d434824e98b3a6a --- /dev/null +++ b/configs/z16f2800100zcog/ostest/.gitignore @@ -0,0 +1,5 @@ +ostest.hex +ostest.map +ostest.lod +ostest.wsp + diff --git a/configs/z16f2800100zcog/ostest/Make.defs b/configs/z16f2800100zcog/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..d156d61f3f53d1cf988025cc84bd01985ec6ecc5 --- /dev/null +++ b/configs/z16f2800100zcog/ostest/Make.defs @@ -0,0 +1,264 @@ +############################################################################ +# configs/z16f2800100zcog/ostest/Make.defs +# +# Copyright (C) 2008, 2010, 2012-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk + +# These are the directories where the ZDS-II toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ZDSVERSION = 5.0.1 + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + ZDSINSTALLDIR = C:/PROGRA~2/ZiLOG/ZDSII_ZNEO_$(ZDSVERSION) + INSTALLDIR = ${shell echo $(ZDSINSTALLDIR)| sed -e "s/\//\\/g"} + ZDSBINDIR = $(INSTALLDIR)\bin + ZDSSTDINCDIR = $(INSTALLDIR)\include\std + ZDSZILOGINCDIR = $(INSTALLDIR)\include\zilog + ZDSSTDLIBDIR = $(INSTALLDIR)\lib\std + ZDSZILOGLIBDIR = $(INSTALLDIR)\lib\zilog + + # CFLAGs + + ARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + EARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHSTDINCLUDES = -stdinc:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHUSRINCLUDES = -usrinc:. +else + WINTOOL = y + ZDSINSTALLDIR = C:/PROGRA~2/ZiLOG/ZDSII_ZNEO_$(ZDSVERSION) + INSTALLDIR = ${shell cygpath -u "$(ZDSINSTALLDIR)"} + ZDSBINDIR = $(INSTALLDIR)/bin + ZDSSTDINCDIR = $(INSTALLDIR)/include/std + ZDSZILOGINCDIR = $(INSTALLDIR)/include/zilog + ZDSSTDLIBDIR = $(INSTALLDIR)/lib/std + ZDSZILOGLIBDIR = $(INSTALLDIR)/lib/zilog + + # These are the same directories but with the directory separator + # character swapped as needed by the ZDS-II compiler + + WTOPDIR = ${shell cygpath -w "$(TOPDIR)"} + WZDSSTDINCDIR = ${shell cygpath -w "$(ZDSSTDINCDIR)"} + WZDSZILOGINCDIR = ${shell cygpath -w "$(ZDSZILOGINCDIR)"} + WZDSSTDLIBDIR = ${shell cygpath -w "$(ZDSSTDLIBDIR)"} + WZDSZILOGLIBDIR = ${shell cygpath -w "$(ZDSZILOGLIBDIR)"} + + # Escaped versions + + ETOPDIR = ${shell echo "$(WTOPDIR)" | sed -e "s/ /%20/g"} + EZDSSTDINCDIR = ${shell echo "$(WZDSSTDINCDIR)" | sed -e "s/ /%20/g"} + EZDSZILOGINCDIR = ${shell echo "$(WZDSZILOGINCDIR)" | sed -e "s/ /%20/g"} + + # CFLAGs + + ARCHASMINCLUDES = -include:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + EARCHASMINCLUDES = -include:'$(ETOPDIR)\include;$(EZDSSTDINCDIR);$(EZDSZILOGINCDIR)' + ARCHSTDINCLUDES = -stdinc:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + ARCHUSRINCLUDES = -usrinc:'.' +endif + +# Assembler definitions + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHASMOPTIMIZATION = -debug +else + ARCHASMOPTIMIZATION = -nodebug +endif + +ARCHASMCPUFLAGS = -cpu:Z16F2811AL -NOigcase +ARCHASMLIST = -NOlistmac -name -pagelen:56 -pagewidth:80 -quiet +ARCHASMWARNINGS = -warn +ARCHASMDEFINES = -define:_Z16F2811AL=1 -define:_Z16K_SERIES=1 -define:_Z16F_SERIES=1 -define:__ASSEMBLY__ +AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION) + +# Compiler definitions + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -debug +else + ARCHOPTIMIZATION = -nodebug +endif + +ifeq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -NOregvar -reduceopt +else + ARCHOPTIMIZATION += -regvar +endif + +ARCHCPUFLAGS = -chartype:S -model:L -NOmodsect -cpu:Z16F2811AL -NOgenprint \ + -asmsw:" $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)" +ARCHLIST = -keeplst -NOlist -NOlistinc -NOkeepasm +ARCHPICFLAGS = +ARCHWARNINGS = -warn +ARCHDEFINES = -define:_Z16F2811AL -define:_Z16K_SERIES -define:_Z16F_SERIES +ARCHINCLUDES = $(ARCHSTDINCLUDES) $(ARCHUSRINCLUDES) +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHLIST) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) + +CPPDEFINES = -D_Z16F2811AL -D_Z16K_SERIES -D_Z16F_SERIES -D__ASSEMBLY__ +CPPINCLUDES = -I$(TOPDIR)$(DELIM)include +CPPFLAGS = $(CPPDEFINES) $(CPPINCLUDES) + +# Librarian definitions + +ARFLAGS = -quiet -warn + +# Linker definitions + +LINKCMDTEMPLATE = $(TOPDIR)$(DELIM)configs$(DELIM)z16f2800100zcog$(DELIM)ostest$(DELIM)ostest.linkcmd + +# Tool names/pathes + +CROSSDEV = +CC = zneocc.exe +CPP = gcc -E +LD = zneolink.exe +AS = zneoasm.exe +AR = zneolib.exe + +# File extensions + +ASMEXT = .asm +OBJEXT = .obj +LIBEXT = .lib +EXEEXT = .hex + +# These are the macros that will be used in the NuttX make system +# to compile and assembly source files and to insert the resulting +# object files into an archive + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + +define PREPROCESS + @echo CPP: $1->$2 + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) "$(CC)" $(CFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define ASSEMBLE + $(Q) "$(AS)" $(AFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + @#$(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + @echo AR: $2 + $(Q) for %%G in ($(2)) do ( "$(AR)" $(ARFLAGS) $1=-+%%G ) +endef + +define CLEAN + $(Q) if exist *.obj (del /f /q *.obj) + $(Q) if exist *.src (del /f /q *.src) + $(Q) if exist *.lib (del /f /q *.lib) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.lod (del /f /q *.lod) + $(Q) if exist *.lst (del /f /q *.lst) +endef + +else + +define PREPROCESS + @echo "CPP: $1->$2" + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) (wfile=`cygpath -w "$1"`; "$(CC)" $(CFLAGS) $$wfile) +endef + +define ASSEMBLE + $(Q) (wfile=`cygpath -w "$1"`; "$(AS)" $(AFLAGS) $$wfile) +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + @#$(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + $(Q) for __obj in $(2) ; do \ + echo "AR: $$__obj"; \ + "$(AR)" $(ARFLAGS) $1=-+$$__obj || { echo "$(AR) $1=-+$$__obj FAILED!" ; exit 1 ; } \ + done +endef + +define CLEAN + $(Q) rm -f *.obj *.src *.lib *.hex *.lod *.lst +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + + # ZDS-II cannot follow Cygwin soft links, so we will have to use directory copies + + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh +endif diff --git a/configs/z16f2800100zcog/ostest/README.txt b/configs/z16f2800100zcog/ostest/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..8042634ebb9a963ec1818f9f7613ce081d73cdcf --- /dev/null +++ b/configs/z16f2800100zcog/ostest/README.txt @@ -0,0 +1,39 @@ +README.txt +^^^^^^^^^^ + +OSTEST Project +-------------- + +ostest.zfpproj is a simple ZDS II - ZNEO 5.0.1 project that will allow you + to use the ZDS-II debugger. Before using, copy the following files from + the toplevel directory: + + nuttx.hex, nuttx.map, nuttx.lod + + to this directory as: + + ostest.hex, ostest.map, ostest.lod + +Loading and Executing Code +-------------------------- + +1. Copy the files to this directory as described above +2. Connect the ZiLOG XTools USB debugger. +3. Install the USB driver from the ZDS-II device_drivers directory +4. Start ZDS-II and load the ostest.zfpproj project +5. In the debug tab, connect to the debugger +6. In the debug tab, load code, reset, and go + +Hmmm... it appears that the code does not run if started by a hardware reset. +It runs only when started via the debugger. What is up with that? + +Console Output +-------------- + +OS test results will be provided on the serial console at 57600 8N1 baud. + +STATUS +------ + +This exemple works fine when started from ZDS-II. But I have seen problems +when starting from a hardware reset. diff --git a/configs/z16f2800100zcog/ostest/defconfig b/configs/z16f2800100zcog/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..219c0a203d363bbcf273856b04dd4d1156c62382 --- /dev/null +++ b/configs/z16f2800100zcog/ostest/defconfig @@ -0,0 +1,609 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_DEBUG_NOOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +CONFIG_ARCH_Z16=y +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="z16" +CONFIG_ARCH_CHIP="z16f" + +# +# Z16 Configuration Options +# +# CONFIG_ARCH_CHIP_Z16F2810 is not set +CONFIG_ARCH_CHIP_Z16F2811=y +# CONFIG_ARCH_CHIP_Z16F3211 is not set +# CONFIG_ARCH_CHIP_Z16F6411 is not set +CONFIG_ARCH_CHIP_Z16F=y + +# +# Common Configuration Options +# + +# +# Z16F Configuration Options +# +CONFIG_Z16F_UART0=y +CONFIG_Z16F_UART1=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_STACKDUMP is not set +CONFIG_ENDIAN_BIG=y +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=65536 + +# +# Board Selection +# +CONFIG_ARCH_BOARD_Z16F2800100ZCOG=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="z16f2800100zcog" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# + +# +# RTOS Features +# +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=29 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=16 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=57600 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# + +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=8192 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System NSH Add-Ons +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# NxPlayer media player library / command Line +# +# CONFIG_SYSTEM_NXPLAYER is not set + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# + +# +# USB Monitor +# + +# +# Stack Monitor +# + +# +# USB Mass Storage Device Commands +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/z16f2800100zcog/ostest/ostest.linkcmd b/configs/z16f2800100zcog/ostest/ostest.linkcmd new file mode 100644 index 0000000000000000000000000000000000000000..f3e83f31f14e4bf63894fd38cafff5a3e9e2acf9 --- /dev/null +++ b/configs/z16f2800100zcog/ostest/ostest.linkcmd @@ -0,0 +1,92 @@ +/****************************************************************************/ +/* configs/z16f2800100zcog/ostest/ostest.linkcmd */ +/* */ +/* Copyright (C) 2008, 2014 Gregory Nutt. All rights reserved. */ +/* Author: Gregory Nutt */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* 1. Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in */ +/* the documentation and/or other materials provided with the */ +/* distribution. */ +/* 3. Neither the name NuttX nor the names of its contributors may be */ +/* used to endorse or promote products derived from this software */ +/* without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ +/* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS */ +/* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE */ +/* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */ +/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, */ +/* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS */ +/* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED */ +/* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT */ +/* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN */ +/* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */ +/* POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/****************************************************************************/ + +-FORMAT=OMF695,INTEL32 +-map -maxhexlen=64 -quiet -sort NAME=ascending -unresolved=fatal +-warnoverlap -NOxref -warn -debug -NOigcase + +RANGE ROM $000000 : $007FFF +RANGE RAM $FFB000 : $FFBFFF +RANGE IODATA $FFC000 : $FFFFFF +RANGE EROM $008000 : $01FFFF +RANGE ERAM $800000 : $87FFFF + +CHANGE NEAR_TEXT=NEAR_DATA +CHANGE FAR_TEXT=FAR_DATA + +ORDER FAR_BSS, FAR_DATA +ORDER NEAR_BSS, NEAR_DATA +COPY NEAR_DATA EROM +COPY FAR_DATA EROM + +define _0_exit = 0 +define _low_near_romdata = copy base of NEAR_DATA +define _low_neardata = base of NEAR_DATA +define _len_neardata = length of NEAR_DATA +define _low_far_romdata = copy base of FAR_DATA +define _low_fardata = base of FAR_DATA +define _len_fardata = length of FAR_DATA +define _low_nearbss = base of NEAR_BSS +define _len_nearbss = length of NEAR_BSS +define _low_farbss = base of FAR_BSS +define _len_farbss = length of FAR_BSS +define _near_heaptop = highaddr of RAM +define _far_heaptop = highaddr of ERAM +define _far_stack = highaddr of ERAM +define _near_stack = highaddr of RAM +define _near_heapbot = top of RAM +define _far_heapbot = top of ERAM + +define _SYS_CLK_SRC = 1 +define _SYS_CLK_FREQ = 20000000 + +define __EXTCT_INIT_PARAM = $80 +define __EXTCS0_INIT_PARAM = $8012 +define __EXTCS1_INIT_PARAM = $8001 +define __EXTCS2_INIT_PARAM = $0000 +define __EXTCS3_INIT_PARAM = $0000 +define __EXTCS4_INIT_PARAM = $0000 +define __EXTCS5_INIT_PARAM = $0000 + +define __PFAF_INIT_PARAM = $ff +define __PGAF_INIT_PARAM = $ff +define __PDAF_INIT_PARAM = $ff00 +define __PAAF_INIT_PARAM = $0000 +define __PCAF_INIT_PARAM = $0000 +define __PHAF_INIT_PARAM = $0300 +define __PKAF_INIT_PARAM = $0f + +/* arch/z16/src/Makefile will append target, object and library paths below */ + diff --git a/configs/z16f2800100zcog/ostest/ostest.zfpproj b/configs/z16f2800100zcog/ostest/ostest.zfpproj new file mode 100644 index 0000000000000000000000000000000000000000..7d4f731f9b416def941b476b4a7af5365b8e708c --- /dev/null +++ b/configs/z16f2800100zcog/ostest/ostest.zfpproj @@ -0,0 +1,238 @@ + +Z16F2811AL + + + +..\..\..\nuttx.hex + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/configs/z16f2800100zcog/ostest/setenv.sh b/configs/z16f2800100zcog/ostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..edc62a07e3babb09e315a8dcd66ed89316b3524a --- /dev/null +++ b/configs/z16f2800100zcog/ostest/setenv.sh @@ -0,0 +1,69 @@ +#!/bin/bash +# configs/z16f2800100zcog/ostest/setenv.sh +# +# Copyright (C) 2008, 2009, 2012, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# Check how we were executed +# +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# +# This is the Cygwin path to location where the ZDS-II tools were installed +# +TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_ZNEO_5.0.1/bin" + +# +# This is the path to the z16f2800100zcog tool directory +# +TOOL_DIR="${WD}/configs/z16f2800100zcog/tools" + +# +# Add the path to the toolchain and tool directory to the PATH variable. NOTE +# that /bin and /usr/bin preceded the toolchain bin directory. This is because +# the ZDSII bin directory includes binaries like make.exe that will interfere +# with the normal build process if we do not give priority to the versions at +# /bin and /usr/bin. +# +export PATH="/bin:/usr/bin:${TOOLCHAIN_BIN}:${TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/z16f2800100zcog/pashello/.gitignore b/configs/z16f2800100zcog/pashello/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..713387f905f7b876f1cab294a50ed66d26eb0ccb --- /dev/null +++ b/configs/z16f2800100zcog/pashello/.gitignore @@ -0,0 +1,5 @@ +pashello.hex +pashello.map +pashello.lod +pashello.wsp + diff --git a/configs/z16f2800100zcog/pashello/Make.defs b/configs/z16f2800100zcog/pashello/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..b52c55e908dc2d281935cc811377a6dfa378a3a8 --- /dev/null +++ b/configs/z16f2800100zcog/pashello/Make.defs @@ -0,0 +1,264 @@ +############################################################################ +# configs/z16f2800100zcog/pashello/Make.defs +# +# Copyright (C) 2008, 2010, 2012-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk + +# These are the directories where the ZDS-II toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ZDSVERSION = 5.0.1 + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + ZDSINSTALLDIR = C:/PROGRA~2/ZiLOG/ZDSII_ZNEO_$(ZDSVERSION) + INSTALLDIR = ${shell echo $(ZDSINSTALLDIR)| sed -e "s/\//\\/g"} + ZDSBINDIR = $(INSTALLDIR)\bin + ZDSSTDINCDIR = $(INSTALLDIR)\include\std + ZDSZILOGINCDIR = $(INSTALLDIR)\include\zilog + ZDSSTDLIBDIR = $(INSTALLDIR)\lib\std + ZDSZILOGLIBDIR = $(INSTALLDIR)\lib\zilog + + # CFLAGs + + ARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + EARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHSTDINCLUDES = -stdinc:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHUSRINCLUDES = -usrinc:. +else + WINTOOL = y + ZDSINSTALLDIR = C:/PROGRA~2/ZiLOG/ZDSII_ZNEO_$(ZDSVERSION) + INSTALLDIR = ${shell cygpath -u "$(ZDSINSTALLDIR)"} + ZDSBINDIR = $(INSTALLDIR)/bin + ZDSSTDINCDIR = $(INSTALLDIR)/include/std + ZDSZILOGINCDIR = $(INSTALLDIR)/include/zilog + ZDSSTDLIBDIR = $(INSTALLDIR)/lib/std + ZDSZILOGLIBDIR = $(INSTALLDIR)/lib/zilog + + # These are the same directories but with the directory separator + # character swapped as needed by the ZDS-II compiler + + WTOPDIR = ${shell cygpath -w "$(TOPDIR)"} + WZDSSTDINCDIR = ${shell cygpath -w "$(ZDSSTDINCDIR)"} + WZDSZILOGINCDIR = ${shell cygpath -w "$(ZDSZILOGINCDIR)"} + WZDSSTDLIBDIR = ${shell cygpath -w "$(ZDSSTDLIBDIR)"} + WZDSZILOGLIBDIR = ${shell cygpath -w "$(ZDSZILOGLIBDIR)"} + + # Escaped versions + + ETOPDIR = ${shell echo "$(WTOPDIR)" | sed -e "s/ /%20/g"} + EZDSSTDINCDIR = ${shell echo "$(WZDSSTDINCDIR)" | sed -e "s/ /%20/g"} + EZDSZILOGINCDIR = ${shell echo "$(WZDSZILOGINCDIR)" | sed -e "s/ /%20/g"} + + # CFLAGs + + ARCHASMINCLUDES = -include:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + EARCHASMINCLUDES = -include:'$(ETOPDIR)\include;$(EZDSSTDINCDIR);$(EZDSZILOGINCDIR)' + ARCHSTDINCLUDES = -stdinc:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + ARCHUSRINCLUDES = -usrinc:'.' +endif + +# Assembler definitions + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHASMOPTIMIZATION = -debug +else + ARCHASMOPTIMIZATION = -nodebug +endif + +ARCHASMCPUFLAGS = -cpu:Z16F2811AL -NOigcase +ARCHASMLIST = -NOlistmac -name -pagelen:56 -pagewidth:80 -quiet +ARCHASMWARNINGS = -warn +ARCHASMDEFINES = -define:_Z16F2811AL=1 -define:_Z16K_SERIES=1 -define:_Z16F_SERIES=1 -define:__ASSEMBLY__ +AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION) + +# Compiler definitions + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -debug +else + ARCHOPTIMIZATION = -nodebug +endif + +ifeq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -NOregvar -reduceopt +else + ARCHOPTIMIZATION += -regvar +endif + +ARCHCPUFLAGS = -chartype:S -model:L -NOmodsect -cpu:Z16F2811AL -NOgenprint \ + -asmsw:" $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)" +ARCHLIST = -keeplst -NOlist -NOlistinc -NOkeepasm +ARCHPICFLAGS = +ARCHWARNINGS = -warn +ARCHDEFINES = -define:_Z16F2811AL -define:_Z16K_SERIES -define:_Z16F_SERIES +ARCHINCLUDES = $(ARCHSTDINCLUDES) $(ARCHUSRINCLUDES) +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHLIST) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) + +CPPDEFINES = -D_Z16F2811AL -D_Z16K_SERIES -D_Z16F_SERIES -D__ASSEMBLY__ +CPPINCLUDES = -I$(TOPDIR)$(DELIM)include +CPPFLAGS = $(CPPDEFINES) $(CPPINCLUDES) + +# Librarian definitions + +ARFLAGS = -quiet -warn + +# Linker definitions + +LINKCMDTEMPLATE = $(TOPDIR)$(DELIM)configs$(DELIM)z16f2800100zcog$(DELIM)pashello$(DELIM)pashello.linkcmd + +# Tool names/pathes + +CROSSDEV = +CC = zneocc.exe +CPP = gcc -E +LD = zneolink.exe +AS = zneoasm.exe +AR = zneolib.exe + +# File extensions + +ASMEXT = .asm +OBJEXT = .obj +LIBEXT = .lib +EXEEXT = .hex + +# These are the macros that will be used in the NuttX make system +# to compile and assembly source files and to insert the resulting +# object files into an archive + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + +define PREPROCESS + @echo CPP: $1->$2 + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) "$(CC)" $(CFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define ASSEMBLE + $(Q) "$(AS)" $(AFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + @echo AR: $2 + $(Q) for %%G in ($(2)) do ( "$(AR)" $(ARFLAGS) $1=-+%%G ) +endef + +define CLEAN + $(Q) if exist *.obj (del /f /q *.obj) + $(Q) if exist *.src (del /f /q *.src) + $(Q) if exist *.lib (del /f /q *.lib) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.lod (del /f /q *.lod) + $(Q) if exist *.lst (del /f /q *.lst) +endef + +else + +define PREPROCESS + @echo "CPP: $1->$2" + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) (wfile=`cygpath -w "$1"`; "$(CC)" $(CFLAGS) $$wfile) +endef + +define ASSEMBLE + $(Q) (wfile=`cygpath -w "$1"`; "$(AS)" $(AFLAGS) $$wfile) +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + $(Q) for __obj in $(2) ; do \ + echo "AR: $$__obj"; \ + "$(AR)" $(ARFLAGS) $1=-+$$__obj || { echo "$(AR) $1=-+$$__obj FAILED!" ; exit 1 ; } \ + done +endef + +define CLEAN + $(Q) rm -f *.obj *.src *.lib *.hex *.lod *.lst +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + + # ZDS-II cannot follow Cygwin soft links, so we will have to use directory copies + + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh +endif diff --git a/configs/z16f2800100zcog/pashello/README.txt b/configs/z16f2800100zcog/pashello/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..a1bcc2a10b97bd7718c387510626d0153494fac4 --- /dev/null +++ b/configs/z16f2800100zcog/pashello/README.txt @@ -0,0 +1,12 @@ +README.txt +^^^^^^^^^^ + +pashello.zfpproj is a simple ZDS-II project that will allow you + to use the ZDS-II debugger. Before using, copy the following + files from the toplevel directory: + + nuttx.hex, nuttx.map, nuttx.lod + + to this directory as: + + pashello.hex, pashello.map, pashello.lod diff --git a/configs/z16f2800100zcog/pashello/defconfig b/configs/z16f2800100zcog/pashello/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..34e162a24dfb464668d79718d1fd86b4538240da --- /dev/null +++ b/configs/z16f2800100zcog/pashello/defconfig @@ -0,0 +1,484 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_DEBUG_VERBOSE is not set + + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_GRAPHICS is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_DMA is not set +# CONFIG_DEBUG_SYMBOLS is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +CONFIG_ARCH_Z16=y +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="z16" +CONFIG_ARCH_CHIP="z16f" +CONFIG_BOARD_LOOPSPERMSEC=1250 + +# +# Z16 Configuration Options +# +# CONFIG_ARCH_CHIP_Z16F2810 is not set +CONFIG_ARCH_CHIP_Z16F2811=y +# CONFIG_ARCH_CHIP_Z16F3211 is not set +# CONFIG_ARCH_CHIP_Z16F6411 is not set +CONFIG_ARCH_CHIP_Z16F=y + +# +# Common Configuration Options +# + +# +# Z16F Configuration Options +# +CONFIG_Z16F_UART0=y +CONFIG_Z16F_UART1=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_STACKDUMP is not set +CONFIG_ENDIAN_BIG=y + +# +# Board Settings +# +CONFIG_RAM_START= +CONFIG_RAM_SIZE=65536 + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_Z16F2800100ZCOG=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="z16f2800100zcog" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_USEC_PER_TICK=10000 +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=1 +CONFIG_START_DAY=28 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="pashello_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_DISABLE_ENVIRON is not set +CONFIG_DISABLE_POLL=y + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=16 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=4096 + +# +# Device Drivers +# +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_PWM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=57600 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_FS_FAT is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Basic CXX Support +# +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Named Applications +# +# CONFIG_BUILTIN is not set + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_COMPOSITE is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +CONFIG_EXAMPLES_PASHELLO=y +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WLAN is not set + +# +# Interpreters +# + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +CONFIG_INTERPRETERS_PCODE=y +CONFIG_INTERPRETERS_PRUN=y + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# ModBus +# + +# +# FreeModbus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# System NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# diff --git a/configs/z16f2800100zcog/pashello/pashello.linkcmd b/configs/z16f2800100zcog/pashello/pashello.linkcmd new file mode 100644 index 0000000000000000000000000000000000000000..a5b893a3b886b9ebf448e52fc2af302ffa9fb187 --- /dev/null +++ b/configs/z16f2800100zcog/pashello/pashello.linkcmd @@ -0,0 +1,92 @@ +/****************************************************************************/ +/* configs/z16f2800100zcog/pashello/pashello.linkcmd */ +/* */ +/* Copyright (C) 2008, 2014 Gregory Nutt. All rights reserved. */ +/* Author: Gregory Nutt */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* 1. Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in */ +/* the documentation and/or other materials provided with the */ +/* distribution. */ +/* 3. Neither the name NuttX nor the names of its contributors may be */ +/* used to endorse or promote products derived from this software */ +/* without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ +/* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS */ +/* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE */ +/* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */ +/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, */ +/* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS */ +/* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED */ +/* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT */ +/* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN */ +/* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */ +/* POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/****************************************************************************/ + +-FORMAT=OMF695,INTEL32 +-map -maxhexlen=64 -quiet -sort NAME=ascending -unresolved=fatal +-warnoverlap -NOxref -warn -debug -NOigcase + +RANGE ROM $000000 : $007FFF +RANGE RAM $FFB000 : $FFBFFF +RANGE IODATA $FFC000 : $FFFFFF +RANGE EROM $008000 : $01FFFF +RANGE ERAM $800000 : $87FFFF + +CHANGE NEAR_TEXT=NEAR_DATA +CHANGE FAR_TEXT=FAR_DATA + +ORDER FAR_BSS, FAR_DATA +ORDER NEAR_BSS, NEAR_DATA +COPY NEAR_DATA EROM +COPY FAR_DATA EROM + +define _0_exit = 0 +define _low_near_romdata = copy base of NEAR_DATA +define _low_neardata = base of NEAR_DATA +define _len_neardata = length of NEAR_DATA +define _low_far_romdata = copy base of FAR_DATA +define _low_fardata = base of FAR_DATA +define _len_fardata = length of FAR_DATA +define _low_nearbss = base of NEAR_BSS +define _len_nearbss = length of NEAR_BSS +define _low_farbss = base of FAR_BSS +define _len_farbss = length of FAR_BSS +define _near_heaptop = highaddr of RAM +define _far_heaptop = highaddr of ERAM +define _far_stack = highaddr of ERAM +define _near_stack = highaddr of RAM +define _near_heapbot = top of RAM +define _far_heapbot = top of ERAM + +define _SYS_CLK_SRC = 1 +define _SYS_CLK_FREQ = 20000000 + +define __EXTCT_INIT_PARAM = $80 +define __EXTCS0_INIT_PARAM = $8012 +define __EXTCS1_INIT_PARAM = $8001 +define __EXTCS2_INIT_PARAM = $0000 +define __EXTCS3_INIT_PARAM = $0000 +define __EXTCS4_INIT_PARAM = $0000 +define __EXTCS5_INIT_PARAM = $0000 + +define __PFAF_INIT_PARAM = $ff +define __PGAF_INIT_PARAM = $ff +define __PDAF_INIT_PARAM = $ff00 +define __PAAF_INIT_PARAM = $0000 +define __PCAF_INIT_PARAM = $0000 +define __PHAF_INIT_PARAM = $0300 +define __PKAF_INIT_PARAM = $0f + +/* arch/z16/src/Makefile will append target, object and library paths below */ + diff --git a/configs/z16f2800100zcog/pashello/pashello.zfpproj b/configs/z16f2800100zcog/pashello/pashello.zfpproj new file mode 100644 index 0000000000000000000000000000000000000000..9df5cdd0f7a4aae2edec697c5f5a091ee2d33dee --- /dev/null +++ b/configs/z16f2800100zcog/pashello/pashello.zfpproj @@ -0,0 +1,238 @@ + +Z16F2811AL + + + +..\..\..\nuttx.hex + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/configs/z16f2800100zcog/pashello/setenv.sh b/configs/z16f2800100zcog/pashello/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..4ade86cff97ee9005bb97f9ef5ecbacc1ce8f6e1 --- /dev/null +++ b/configs/z16f2800100zcog/pashello/setenv.sh @@ -0,0 +1,69 @@ +#!/bin/bash +# configs/z16f2800100zcog/pashello/setenv.sh +# +# Copyright (C) 2008, 2009, 2012, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# Check how we were executed +# +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# +# This is the Cygwin path to location where the ZDS-II tools were installed +# +TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_ZNEO_5.0.1/bin" + +# +# This is the path to the z16f2800100zcog tool directory +# +TOOL_DIR="${WD}/configs/z16f2800100zcog/tools" + +# +# Add the path to the toolchain and tool directory to the PATH variable. NOTE +# that /bin and /usr/bin preceded the toolchain bin directory. This is because +# the ZDSII bin directory includes binaries like make.exe that will interfere +# with the normal build process if we do not give priority to the versions at +# /bin and /usr/bin. +# +export PATH="/bin:/usr/bin:${TOOLCHAIN_BIN}:${TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/z16f2800100zcog/scripts/setenv.bat b/configs/z16f2800100zcog/scripts/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..4ee67c97eba17548303ca85849188d861559875e --- /dev/null +++ b/configs/z16f2800100zcog/scripts/setenv.bat @@ -0,0 +1,50 @@ +@echo off + +rem configs/z16f2800100zcog/scripts/setenv.bat +rem +rem Copyright (C) 2012 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the ZDS-II toolchain. + +set PATH=C:\Program Files (x86)\ZiLOG\ZDSII_ZNEO_5.0.1\bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% +echo %PATH% diff --git a/configs/z16f2800100zcog/src/.gitignore b/configs/z16f2800100zcog/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..b268f1933d708a67c74e5ee0c84ab7447e0ee575 --- /dev/null +++ b/configs/z16f2800100zcog/src/.gitignore @@ -0,0 +1,4 @@ +/Make.dep +/.depend +/*.obj + diff --git a/configs/z16f2800100zcog/src/Makefile b/configs/z16f2800100zcog/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..db25fa8f4a1969af792f4172fbf8257a95eebb43 --- /dev/null +++ b/configs/z16f2800100zcog/src/Makefile @@ -0,0 +1,41 @@ +############################################################################ +# configs/z16f2800100zcog/Makefile +# +# Copyright (C) 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = z16f_lowinit.c z16f_leds.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/z16f2800100zcog/src/z16f_leds.c b/configs/z16f2800100zcog/src/z16f_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..4c9998612466405b8483a49d4996660e6d1b8331 --- /dev/null +++ b/configs/z16f2800100zcog/src/z16f_leds.c @@ -0,0 +1,107 @@ +/**************************************************************************** + * configs/z16f2800100zcog/z16f_leds.c + * + * Copyright (C) 2008, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The z16f2800100zcog board has four LEDs: + * + * - Green LED D1 which illuminates in the presence of Vcc + * - Red LED D2 connected to chip port PA0_T0IN + * - Yellow LED D3 connected to chip port PA1_T0OUT + * - Green LED D4 connected to chip port PA2_DE0 + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + /* The following is performed up_lowinit() as well */ + + putreg8(getreg8(Z16F_GPIOA_OUT) | 0x07, Z16F_GPIOA_OUT); + putreg8(getreg8(Z16F_GPIOA_DD) & 0xF8, Z16F_GPIOA_DD); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if ((unsigned)led <= 7) + { + putreg8(((getreg8(Z16F_GPIOA_OUT) & 0xf8) | led), Z16F_GPIOA_OUT); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led >= 1) + { + board_autoled_on(led-1); + } +} +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/z16f2800100zcog/src/z16f_lowinit.c b/configs/z16f2800100zcog/src/z16f_lowinit.c new file mode 100644 index 0000000000000000000000000000000000000000..081d2d50909c50a2803c0cd6eadd7b7ffd22a6a0 --- /dev/null +++ b/configs/z16f2800100zcog/src/z16f_lowinit.c @@ -0,0 +1,94 @@ +/**************************************************************************** + * configs/z16f2800100zcog/src/z16f_lowinit.c + * + * Copyright (C) 2008, 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Based upon sample code included with the Zilog ZDS-II toolchain. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "chip/chip.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: z16f_gpioinit + * + * Description: + * Configure board-specific GPIO usage here. Driver pin configurations + * are set in the associated device drivers (such as UART, SPI, I2C, + * etc.) and must be preserved. + * + ****************************************************************************/ + +static void z16f_gpioinit(void) +{ + /* Configure LEDs and Run/Stop switch port */ + + putreg8(getreg8(Z16F_GPIOA_DD) | 0x87, Z16F_GPIOA_DD); + putreg8(getreg8(Z16F_GPIOA_OUT) | 0x07, Z16F_GPIOA_OUT); + putreg8(getreg8(Z16F_GPIOA_DD) & 0xF8, Z16F_GPIOA_DD); + + /* Configure rate switch port */ + + putreg8(getreg8(Z16F_GPIOB_DD) | 0x20, Z16F_GPIOB_DD); + putreg8(getreg8(Z16F_GPIOB_AFL) | 0x20, Z16F_GPIOB_AFL); + +#if 0 /* Not yet */ + putreg8(0x05, Z16F_ADC0_MAX); + putreg8(0xf5, Z16F_ADC0_CTL); +#endif + + /* Configure Direction switch port */ + + putreg8(getreg8(Z16F_GPIOC_DD) | 0x01, Z16F_GPIOC_DD); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void z16f_lowinit(void) +{ + z16f_gpioinit(); +} diff --git a/configs/z16f2800100zcog/tools/dopatch.sh b/configs/z16f2800100zcog/tools/dopatch.sh new file mode 100644 index 0000000000000000000000000000000000000000..f0f86a53e7f51c4ff43ad960cae438591bfc8ae9 --- /dev/null +++ b/configs/z16f2800100zcog/tools/dopatch.sh @@ -0,0 +1,60 @@ +#!/bin/sh +############################################################################ +# configs/z16f2800100zcog/tools/dopatch.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +USAGE="${0} [-R] \$PWD" +WD=`pwd` +TOOLDIR=${WD}/configs/z16f2800100zcog/tools +ME=${TOOLDIR}/dopatch.sh +PATCH=${TOOLDIR}/zneo-zdsii-5_0_1-variadic-func-fix.patch +ARGS=${1} + +if [ ! -x ${ME} ]; then + echo "ERROR: This script must be executed from the top-level NuttX directory" + echo ${USAGE} + exit 1 +fi + +if [ ! -r ${PATCH} ]; then + echo "ERROR: Readable patch not found at ${PATCH}" + echo ${USAGE} + exit 1 +fi + +cd .. || \ + { echo "ERROR: failed to CD to the parent directory"; exit 1; } + +cat ${PATCH} | patch ${ARGS} -p1 || \ + { echo "ERROR: patch failed" ; exit 1; } diff --git a/configs/z16f2800100zcog/tools/zneo-zdsii-5_0_1-variadic-func-fix.patch b/configs/z16f2800100zcog/tools/zneo-zdsii-5_0_1-variadic-func-fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..f7d5fe4eb16924b44a3b55ba1edf9c0354f28719 --- /dev/null +++ b/configs/z16f2800100zcog/tools/zneo-zdsii-5_0_1-variadic-func-fix.patch @@ -0,0 +1,187 @@ +diff --git a/apps/nshlib/nsh_console.c b/apps/nshlib/nsh_console.c +index ba7dbe7..45e4ab1 100644 +--- a/apps/nshlib/nsh_console.c ++++ b/apps/nshlib/nsh_console.c +@@ -46,6 +46,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -79,8 +80,13 @@ static FAR struct nsh_vtbl_s *nsh_consoleclone(FAR struct nsh_vtbl_s *vtbl); + static void nsh_consolerelease(FAR struct nsh_vtbl_s *vtbl); + static ssize_t nsh_consolewrite(FAR struct nsh_vtbl_s *vtbl, + FAR const void *buffer, size_t nbytes); ++#if 0 + static int nsh_consoleoutput(FAR struct nsh_vtbl_s *vtbl, + FAR const char *fmt, ...); ++#else ++static int nsh_consolevoutput(FAR struct nsh_vtbl_s *vtbl, ++ FAR const char *fmt, va_list ap); ++#endif + static FAR char *nsh_consolelinebuffer(FAR struct nsh_vtbl_s *vtbl); + + #if CONFIG_NFILE_DESCRIPTORS > 0 +@@ -213,6 +219,7 @@ static ssize_t nsh_consolewrite(FAR struct nsh_vtbl_s *vtbl, FAR const void *buf + * + ****************************************************************************/ + ++#if 0 + static int nsh_consoleoutput(FAR struct nsh_vtbl_s *vtbl, + FAR const char *fmt, ...) + { +@@ -263,6 +270,51 @@ static int nsh_consoleoutput(FAR struct nsh_vtbl_s *vtbl, + #endif + } + ++#else ++static int nsh_consolevoutput(FAR struct nsh_vtbl_s *vtbl, FAR const char *fmt, va_list ap) ++{ ++#if CONFIG_NFILE_DESCRIPTORS > 0 ++ FAR struct console_stdio_s *pstate = (FAR struct console_stdio_s *)vtbl; ++ int ret; ++ ++ /* The stream is open in a lazy fashion. This is done because the file ++ * descriptor may be opened on a different task than the stream. The ++ * actual open will then occur with the first output from the new task. ++ */ ++ ++ if (nsh_openifnotopen(pstate) != 0) ++ { ++ return ERROR; ++ } ++ ++ ret = vfprintf(pstate->cn_outstream, fmt, ap); ++ ++ return ret; ++#else ++ char *str; ++ ++ /* Use vasprintf() to allocate a buffer and fill it with the formatted ++ * data ++ */ ++ ++ str = NULL; ++ (void)vasprintf(&str, fmt, ap); ++ ++ /* Was a string allocated? */ ++ ++ if (str) ++ { ++ /* Yes.. Print then free the allocated string */ ++ ++ printf("%s", str); ++ free(str); ++ } ++ ++ return 0; ++#endif ++} ++#endif ++ + /**************************************************************************** + * Name: nsh_consolelinebuffer + * +@@ -452,7 +504,11 @@ FAR struct console_stdio_s *nsh_newconsole(void) + pstate->cn_vtbl.release = nsh_consolerelease; + #endif + pstate->cn_vtbl.write = nsh_consolewrite; ++#if 0 + pstate->cn_vtbl.output = nsh_consoleoutput; ++#else ++ pstate->cn_vtbl.voutput = nsh_consolevoutput; ++#endif + pstate->cn_vtbl.linebuffer = nsh_consolelinebuffer; + pstate->cn_vtbl.exit = nsh_consoleexit; + +@@ -489,3 +545,15 @@ FAR struct console_stdio_s *nsh_newconsole(void) + } + return pstate; + } ++ ++int nsh_output(FAR struct nsh_vtbl_s *vtbl, FAR const char *fmt, ...) ++{ ++ va_list ap; ++ int ret; ++ ++ va_start(ap, fmt); ++ ret = vtbl->voutput(vtbl, fmt, ap); ++ va_end(ap); ++ ++ return ret; ++} +diff --git a/apps/nshlib/nsh_console.h b/apps/nshlib/nsh_console.h +index c78362f..207f9b9 100644 +--- a/apps/nshlib/nsh_console.h ++++ b/apps/nshlib/nsh_console.h +@@ -47,6 +47,7 @@ + #include + #include + #include ++#include + #include + + /**************************************************************************** +@@ -62,11 +63,13 @@ + #define nsh_undirect(v,s) (v)->undirect(v,s) + #define nsh_exit(v,s) (v)->exit(v,s) + ++#if 0 + #ifdef CONFIG_CPP_HAVE_VARARGS + # define nsh_output(v, ...) (v)->output(v, ##__VA_ARGS__) + #else + # define nsh_output vtbl->output + #endif ++#endif + + /* Size of info to be saved in call to nsh_redirect */ + +@@ -107,7 +110,11 @@ struct nsh_vtbl_s + void (*release)(FAR struct nsh_vtbl_s *vtbl); + #endif + ssize_t (*write)(FAR struct nsh_vtbl_s *vtbl, FAR const void *buffer, size_t nbytes); ++#if 0 + int (*output)(FAR struct nsh_vtbl_s *vtbl, FAR const char *fmt, ...); ++#else ++ int (*voutput)(FAR struct nsh_vtbl_s *vtbl, FAR const char *fmt, va_list ap); ++#endif + FAR char *(*linebuffer)(FAR struct nsh_vtbl_s *vtbl); + #if CONFIG_NFILE_DESCRIPTORS > 0 + void (*redirect)(FAR struct nsh_vtbl_s *vtbl, int fd, FAR uint8_t *save); +@@ -159,5 +166,6 @@ struct console_stdio_s + /* Defined in nsh_console.c *************************************************/ + + FAR struct console_stdio_s *nsh_newconsole(void); ++int nsh_output(FAR struct nsh_vtbl_s *vtbl, FAR const char *fmt, ...); + + #endif /* __APPS_NSHLIB_NSH_CONSOLE_H */ +diff --git a/nuttx/include/wdog.h b/nuttx/include/nuttx/wdog.h +index 0aa3584..ac4a36a 100644 +--- a/nuttx/include/nuttx/wdog.h ++++ b/nuttx/include/nuttx/wdog.h +@@ -74,7 +74,23 @@ typedef union wdparm_u wdparm_t; + * watchdog function expires. Up to four parameters may be passed. + */ + ++#if 0 + typedef CODE void (*wdentry_t)(int argc, uint32_t arg1, ...); ++#elif CONFIG_MAX_WDOGPARMS < 1 ++typedef CODE void (*wdentry_t)(int argc); ++#elif CONFIG_MAX_WDOGPARMS < 2 ++typedef CODE void (*wdentry_t)(int argc, uint32_t arg1); ++#elif CONFIG_MAX_WDOGPARMS < 3 ++typedef CODE void (*wdentry_t)(int argc, uint32_t arg1, uint32_t arg2); ++#elif CONFIG_MAX_WDOGPARMS < 4 ++typedef CODE void (*wdentry_t)(int argc, uint32_t arg1, uint32_t arg2, ++ uint32_t arg3); ++#elif CONFIG_MAX_WDOGPARMS < 5 ++typedef CODE void (*wdentry_t)(int argc, uint32_t arg1, uint32_t arg2, ++ uint32_t arg3, uint32_t arg4); ++#else ++# error Ooops. CONFIG_MAX_WDOGPARMS > 4 ++#endif + + /* Watchdog 'handle' */ + diff --git a/configs/z80sim/Kconfig b/configs/z80sim/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/z80sim/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/z80sim/README.txt b/configs/z80sim/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..b45c762cb651cacc4b244e8a0243a96c9fe2e4e8 --- /dev/null +++ b/configs/z80sim/README.txt @@ -0,0 +1,187 @@ +z80sim README +^^^^^^^^^^^^^ + +This port uses a primitive, emulated Z80 and the SDCC toolchain. +This port uses an instruction set simulator called z80sim. + +The SDCC toolchain is available from http://sdcc.sourceforge.net/. All +testing has been performed using version 2.6.0 of the SDCC toolchain. + +Contents +^^^^^^^^ + + o Configuring NuttX + o Reconfiguring NuttX + o Reconfiguring for Linux, OSX, or Cygwin + o SDCC + o Building the SDCC toolchain + +Configuring NuttX +^^^^^^^^^^^^^^^^^ + + ostest + + This configuration performs a simple, minimal OS test using + examples/ostest. This can be configurated as follows: + + 1) From a POSIX window: + cd tools + ./configure.sh z80sim/ostest + 2) From a CMD.exe window + setenv.bat + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. See the + "Reconfiguring" section below for information about changing this + configuration. + + 2. The default setup for this configuration uses a windows native build. + See the section entitled "Reconfiguring for Linux, OSX, or Cygwin" + which will give you the steps you would need to do to convert this + configuration to build in other, Unix-like environments. + + 3. This configuration was last verified sucessfully prior to the + the configure to Kconfig/mconf tool using SDCC 2.6.0 built to run + natively under Cygwin. The current build requires ca. 3.2.1 SDCC. + + nsh + + This configuration file builds NSH (examples/nsh). This + configuration is not functional due to issues with use of the + simulated serial driver (see the TODO list). + + This configuration can be selected by: + + 1) From a POSIX window: + cd tools + ./configure.sh z80sim/nsh + 2) From a CMD.exe window + setenv.bat + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. See the + "Reconfiguring" section below for information about changing this + configuration. + + 2. The default setup for this configuration uses a windows native build. + See the section entitled "Reconfiguring for Linux, OSX, or Cygwin" + which will give you the steps you would need to do to convert this + configuration to build in other, Unix-like environments. + + 3. This configuration was last verified sucessfully prior to the + the configure to Kconfig/mconf tool using SDCC 2.6.0 built to run + natively under Cygwin.nsh/defconfig:CONFIG_BOARD_LOOPSPERMSEC + + pashello + + Configures to use examples/pashello for execution from FLASH + See examples/README.txt for information about pashello. + + This configuration is not usable because the resulting binary + is too large for the z80 address space. + + This configuration can be selected by: + + 1) From a POSIX window: + cd tools + ./configure.sh z80sim/pashello + 2) From a CMD.exe window + setenv.bat + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. See the + "Reconfiguring" section below for information about changing this + configuration. + + 2. The default setup for this configuration uses a windows native build. + See the section entitled "Reconfiguring for Linux, OSX, or Cygwin" + which will give you the steps you would need to do to convert this + configuration to build in other, Unix-like environments. + + 3. This configuration was last verified sucessfully prior to the + the configure to Kconfig/mconf tool using SDCC 2.6.0 built to run + natively under Cygwin.nsh/defconfig:CONFIG_BOARD_LOOPSPERMSEC + +Reconfiguring NuttX +^^^^^^^^^^^^^^^^^^^ + +These configurations all use the kconfig-frontends, mconf-based configuration +tool. To change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt and + additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the reconfiguration + process. + +Reconfiguring for Linux, OSX, or Cygwin +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +All of the z80 configurations in this this directory are set up to build in a +Windows CMD.exe shell. This configuration requires the MinGW host compiler +and severl GNUWin32 tools (see discussion in the top-level NuttX/README.txt +file). + +These configurations can be converted to run under Linux (or Cygwin or OSX), +by modifying the configuration file as follows: + + -CONFIG_HOST_WINDOWS=y + -CONFIG_WINDOWS_NATIVE=y + +CONFIG_HOST_LINUX=y + + -CONFIG_Z80_TOOLCHAIN_SDCCW=y + +CONFIG_Z80_TOOLCHAIN_SDCCL=y + +You may need to first manually change the CONFIG_APPS_DIR="..\apps" definition +in the .config file because the backslash may upset some Unix-based tools. + +This configuration will require a recent version of SDCC (ca. 3.2.1) for Linux +or custom built for Cygwin (see below). + +You cannot use the default setenv.bat in these Unix-like enviroments because +that is a Windows batch file. Use configs/z80sim/script/setenv.sh instead. +setenv.sh must include the path to the installation location of SDCC (probably +/usr/local/bin). + +SDCC +^^^^ + +These z80 configurations all use the SDCC toolchain (http://sdcc.sourceforge.net/). +Source and pre-built SDCC binaries can be downloaded from the SDCC SourceForge +site: http://sourceforge.net/projects/sdcc/files/ . Pre-built binaries are +available for Linux, MAC OSX, and for Win32. Various SDCC options can be +selected with: + + CONFIG_Z80_TOOLCHAIN_SDCCL=y : SDCC for Linux, MAC OSX or Cygwin (see below) + CONFIG_Z80_TOOLCHAIN_SDCCW=y : SDCC for Win32 + +SDCC versions 3.2.0 or higher are recommended. + +Building the SDCC toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +You may also want to build your own SDCC toolchain. You might want to do this, +for example, if you are running under Cygwin and want a Cygwin compatible +SDCC toolchain. + +The SDCC toolchain is built with the standard configure/make/make install +sequence. However, some special actions are required to generate libraries +compatible with this build. First start with the usual steps + + download + unpack + cd sdcc + ./configure + +Then make the SDCC binaries + + cd sdcc + make + +and install SDCC: + + sudo make install + diff --git a/configs/z80sim/include/board.h b/configs/z80sim/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..d963b4df328ca291a4163c1869090eae0ea661d1 --- /dev/null +++ b/configs/z80sim/include/board.h @@ -0,0 +1,66 @@ +/**************************************************************************** + * configs/z80sim/include/board.h + * + * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +EXTERN void z80_lowputc(char ch) __naked; +EXTERN char z80_lowgetc(void) __naked; + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/z80sim/nsh/Make.defs b/configs/z80sim/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..e6b8527083c283765fd0157eda7e3447590fa695 --- /dev/null +++ b/configs/z80sim/nsh/Make.defs @@ -0,0 +1,167 @@ +############################################################################ +# configs/z80sim/nsh/Make.defs +# +# Copyright (C) 2007, 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +# These are the directories where the SDCC toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + SDCC_INSTALLDIR = C:\PROGRA~2\SDCC + SDCC_BINDIR = $(SDCC_INSTALLDIR)\bin + SDCC_LIBDIR = $(SDCC_INSTALLDIR)\lib\z80 +else + SDCC_INSTALLDIR = /usr/local + SDCC_BINDIR = $(SDCC_INSTALLDIR)/bin + SDCC_LIBDIR = $(SDCC_INSTALLDIR)/share/sdcc/lib/z80 +endif + +CROSSDEV = +CC = sdcc +CPP = sdcpp +LD = sdldz80 +AS = sdasz80 +AR = sdar -r +ARCHCPUFLAGS = -mz80 + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = --debug +else + ARCHOPTIMIZATION = +endif + +ARCHPICFLAGS = +ARCHWARNINGS = +ARCHDEFINES = +ARCHINCLUDES = -I. -I$(TOPDIR)$(DELIM)include + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = -x -a -l -o -s -g + +SDCCLIB = z80.lib + +ASMEXT = .asm +OBJEXT = .o +LIBEXT = .lib +EXEEXT = .hex + +# Custom ASSEMBLE definition. The most common toolchain, GCC, uses the +# compiler to assemble files because this has the advantage of running the C +# Pre-Processor against. This is not possible with other SDCC; we need to +# define AS and over-ride the common definition in order to use the assembler +# directly. + +define ASSEMBLE + @echo "AS: $1" + $(Q) $(AS) $(AFLAGS) $2 $1 +endef + +# Custom CLEAN definition + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) +define CLEAN + $(Q) if exist *.o (del /f /q *.o) + $(Q) if exist *.asm (del /f /q *.asm) + $(Q) if exist *.rel (del /f /q *.rel) + $(Q) if exist *.lst (del /f /q *.lst) + $(Q) if exist *.rst (del /f /q *.rst) + $(Q) if exist *.sym (del /f /q *.sym) + $(Q) if exist *.adb (del /f /q *.adb) + $(Q) if exist *.lnk (del /f /q *.lnk) + $(Q) if exist *.map (del /f /q *.map) + $(Q) if exist *.mem (del /f /q *.mem) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.cmd (del /f /q *.cmd) +endef +else +define CLEAN + $(Q) rm -f *.o *.asm *.rel *.lst *.rst *.sym *.adb *.lnk *.map *.mem *.hex *.cmd +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative + + # Use NTFS links or directory copies + +ifeq ($(CONFIG_WINDOWS_MKLINK),y) + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)link.bat +else + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.bat +endif +DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.bat + +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + + # SDCC for Linux, OSX, or Cygwin understands symbolic links. Windows SDCC + # running under Cygwin does not + +ifeq ($(WINTOOL),y) + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh +else + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)link.sh +endif +DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + +endif diff --git a/configs/z80sim/nsh/defconfig b/configs/z80sim/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..347d7f9cd776452b0a0bbd996e9a40c973f32c8e --- /dev/null +++ b/configs/z80sim/nsh/defconfig @@ -0,0 +1,501 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +CONFIG_WINDOWS_NATIVE=y +# CONFIG_WINDOWS_CYGWIN is not set +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set +# CONFIG_WINDOWS_MKLINK is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="..\apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_DEBUG_SYMBOLS is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="z80" +CONFIG_BOARD_LOOPSPERMSEC=100 +CONFIG_ARCH_CHIP_Z80=y +# CONFIG_ARCH_CHIP_Z8F6403 is not set +# CONFIG_ARCH_CHIP_Z8F6423 is not set +# CONFIG_ARCH_CHIP_EZ80F91 is not set +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +CONFIG_Z80_TOOLCHAIN_SDCCW=y +CONFIG_LINKER_HOME_AREA=0x0000 +CONFIG_LINKER_CODE_AREA=0x0200 +CONFIG_LINKER_DATA_AREA=0x8000 +# CONFIG_LINKER_ROM_AT_0000 is not set +# CONFIG_ARCH_HAVEHEAD is not set + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set + +# +# Board Settings +# +CONFIG_RAM_START=0x0000 +CONFIG_RAM_SIZE=65536 + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_XTRS is not set +CONFIG_ARCH_BOARD_Z80SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="z80sim" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_USEC_PER_TICK=10000 +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=7 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_ENVIRON=y +CONFIG_DISABLE_POLL=y + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=8 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=6 +CONFIG_NFILE_STREAMS=6 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 + +# +# Device Drivers +# +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_PWM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_UART_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# UART Configuration +# +CONFIG_UART_RXBUFSIZE=64 +CONFIG_UART_TXBUFSIZE=64 +CONFIG_UART_BAUD=115200 +CONFIG_UART_BITS=8 +CONFIG_UART_PARITY=0 +CONFIG_UART_2STOP=0 +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_FS_RAMMAP is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Named Applications +# +# CONFIG_BUILTIN is not set + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_COMPOSITE is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_NETTEST is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WLAN is not set + +# +# Interpreters +# + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# ModBus +# + +# +# FreeModbus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSFMOUNT is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_FILEIOSIZE=1024 +CONFIG_NSH_LINELEN=40 +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# System NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# diff --git a/configs/z80sim/nsh/setenv.bat b/configs/z80sim/nsh/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..9ce941938bd72748b69572d44d8e5fa4925aa834 --- /dev/null +++ b/configs/z80sim/nsh/setenv.bat @@ -0,0 +1,50 @@ +@echo off + +rem configs/z80sim/nsh/setenv.bat +rem +rem Copyright (C) 2012 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the SDCC toolchain for windows. + +set PATH=C:\Program Files (x86)\SDCC/bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% +echo %PATH% diff --git a/configs/z80sim/ostest/Make.defs b/configs/z80sim/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..43e5feb9267ed8b9caf937160970222fafae9da8 --- /dev/null +++ b/configs/z80sim/ostest/Make.defs @@ -0,0 +1,167 @@ +############################################################################ +# configs/z80sim/ostest/Make.defs +# +# Copyright (C) 2007, 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +# These are the directories where the SDCC toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + SDCC_INSTALLDIR = C:\PROGRA~2\SDCC + SDCC_BINDIR = $(SDCC_INSTALLDIR)\bin + SDCC_LIBDIR = $(SDCC_INSTALLDIR)\lib\z80 +else + SDCC_INSTALLDIR = /usr/local + SDCC_BINDIR = $(SDCC_INSTALLDIR)/bin + SDCC_LIBDIR = $(SDCC_INSTALLDIR)/share/sdcc/lib/z80 +endif + +CROSSDEV = +CC = sdcc +CPP = sdcpp +LD = sdldz80 +AS = sdasz80 +AR = sdar -r +ARCHCPUFLAGS = -mz80 + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = --debug +else + ARCHOPTIMIZATION = +endif + +ARCHPICFLAGS = +ARCHWARNINGS = +ARCHDEFINES = +ARCHINCLUDES = -I. -I$(TOPDIR)$(DELIM)include + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = -x -a -l -o -s -g + +SDCCLIB = z80.lib + +ASMEXT = .asm +OBJEXT = .o +LIBEXT = .lib +EXEEXT = .hex + +# Custom ASSEMBLE definition. The most common toolchain, GCC, uses the +# compiler to assemble files because this has the advantage of running the C +# Pre-Processor against. This is not possible with other SDCC; we need to +# define AS and over-ride the common definition in order to use the assembler +# directly. + +define ASSEMBLE + @echo "AS: $1" + $(Q) $(AS) $(AFLAGS) $2 $1 +endef + +# Custom CLEAN definition + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) +define CLEAN + $(Q) if exist *.o (del /f /q *.o) + $(Q) if exist *.asm (del /f /q *.asm) + $(Q) if exist *.rel (del /f /q *.rel) + $(Q) if exist *.lst (del /f /q *.lst) + $(Q) if exist *.rst (del /f /q *.rst) + $(Q) if exist *.sym (del /f /q *.sym) + $(Q) if exist *.adb (del /f /q *.adb) + $(Q) if exist *.lnk (del /f /q *.lnk) + $(Q) if exist *.map (del /f /q *.map) + $(Q) if exist *.mem (del /f /q *.mem) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.cmd (del /f /q *.cmd) +endef +else +define CLEAN + $(Q) rm -f *.o *.asm *.rel *.lst *.rst *.sym *.adb *.lnk *.map *.mem *.hex *.cmd +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative + + # Use NTFS links or directory copies + +ifeq ($(CONFIG_WINDOWS_MKLINK),y) + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)link.bat +else + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.bat +endif +DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.bat + +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + + # SDCC for Linux, OSX, or Cygwin understands symbolic links. Windows SDCC + # running under Cygwin does not + +ifeq ($(WINTOOL),y) + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh +else + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)link.sh +endif +DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + +endif diff --git a/configs/z80sim/ostest/defconfig b/configs/z80sim/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..36ed405f12ff8e84032a36c56260ebbec32dd006 --- /dev/null +++ b/configs/z80sim/ostest/defconfig @@ -0,0 +1,450 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +CONFIG_WINDOWS_NATIVE=y +# CONFIG_WINDOWS_CYGWIN is not set +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set +# CONFIG_WINDOWS_MKLINK is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="..\apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_DEBUG_SYMBOLS is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="z80" +CONFIG_BOARD_LOOPSPERMSEC=100 +CONFIG_ARCH_CHIP_Z80=y +# CONFIG_ARCH_CHIP_Z8F6403 is not set +# CONFIG_ARCH_CHIP_Z8F6423 is not set +# CONFIG_ARCH_CHIP_EZ80F91 is not set +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +CONFIG_Z80_TOOLCHAIN_SDCCW=y +CONFIG_LINKER_HOME_AREA=0x0000 +CONFIG_LINKER_CODE_AREA=0x0200 +CONFIG_LINKER_DATA_AREA=0x8000 +# CONFIG_LINKER_ROM_AT_0000 is not set +# CONFIG_ARCH_HAVEHEAD is not set + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set + +# +# Board Settings +# +CONFIG_RAM_START=0x0000 +CONFIG_RAM_SIZE=65536 + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_XTRS is not set +CONFIG_ARCH_BOARD_Z80SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="z80sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_USEC_PER_TICK=10000 +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2007 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=21 +# CONFIG_DEV_CONSOLE is not set +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_ENVIRON=y +CONFIG_DISABLE_POLL=y + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=8 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=0 +CONFIG_NFILE_STREAMS=0 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 + +# +# Device Drivers +# +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_PWM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_UART_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART Configuration +# +CONFIG_UART_RXBUFSIZE=0 +CONFIG_UART_TXBUFSIZE=0 +CONFIG_UART_BAUD=115200 +CONFIG_UART_BITS=8 +CONFIG_UART_PARITY=0 +CONFIG_UART_2STOP=0 +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_FS_RAMMAP is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Named Applications +# +# CONFIG_BUILTIN is not set + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_COMPOSITE is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=1024 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=4 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WLAN is not set + +# +# Interpreters +# + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# ModBus +# + +# +# FreeModbus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# System NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# diff --git a/configs/z80sim/ostest/setenv.bat b/configs/z80sim/ostest/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..e5c7ff5bf1b41bd28b72b4afb508a5ba216ff6bf --- /dev/null +++ b/configs/z80sim/ostest/setenv.bat @@ -0,0 +1,50 @@ +@echo off + +rem configs/z80sim/ostest/setenv.bat +rem +rem Copyright (C) 2012 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the SDCC toolchain for windows. + +set PATH=C:\Program Files (x86)\SDCC/bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% +echo %PATH% diff --git a/configs/z80sim/pashello/Make.defs b/configs/z80sim/pashello/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..4330ec46956006977b77bdd35fffbcd121bfd153 --- /dev/null +++ b/configs/z80sim/pashello/Make.defs @@ -0,0 +1,167 @@ +############################################################################ +# configs/z80sim/pashello/Make.defs +# +# Copyright (C) 2007, 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +# These are the directories where the SDCC toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + SDCC_INSTALLDIR = C:\PROGRA~2\SDCC + SDCC_BINDIR = $(SDCC_INSTALLDIR)\bin + SDCC_LIBDIR = $(SDCC_INSTALLDIR)\lib\z80 +else + SDCC_INSTALLDIR = /usr/local + SDCC_BINDIR = $(SDCC_INSTALLDIR)/bin + SDCC_LIBDIR = $(SDCC_INSTALLDIR)/share/sdcc/lib/z80 +endif + +CROSSDEV = +CC = sdcc +CPP = sdcpp +LD = sdldz80 +AS = sdasz80 +AR = sdar -r +ARCHCPUFLAGS = -mz80 + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = --debug +else + ARCHOPTIMIZATION = +endif + +ARCHPICFLAGS = +ARCHWARNINGS = +ARCHDEFINES = +ARCHINCLUDES = -I. -I$(TOPDIR)$(DELIM)include + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = -x -a -l -o -s -g + +SDCCLIB = z80.lib + +ASMEXT = .asm +OBJEXT = .o +LIBEXT = .lib +EXEEXT = .hex + +# Custom ASSEMBLE definition. The most common toolchain, GCC, uses the +# compiler to assemble files because this has the advantage of running the C +# Pre-Processor against. This is not possible with other SDCC; we need to +# define AS and over-ride the common definition in order to use the assembler +# directly. + +define ASSEMBLE + @echo "AS: $1" + $(Q) $(AS) $(AFLAGS) $2 $1 +endef + +# Custom CLEAN definition + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) +define CLEAN + $(Q) if exist *.o (del /f /q *.o) + $(Q) if exist *.asm (del /f /q *.asm) + $(Q) if exist *.rel (del /f /q *.rel) + $(Q) if exist *.lst (del /f /q *.lst) + $(Q) if exist *.rst (del /f /q *.rst) + $(Q) if exist *.sym (del /f /q *.sym) + $(Q) if exist *.adb (del /f /q *.adb) + $(Q) if exist *.lnk (del /f /q *.lnk) + $(Q) if exist *.map (del /f /q *.map) + $(Q) if exist *.mem (del /f /q *.mem) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.cmd (del /f /q *.cmd) +endef +else +define CLEAN + $(Q) rm -f *.o *.asm *.rel *.lst *.rst *.sym *.adb *.lnk *.map *.mem *.hex *.cmd +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative + + # Use NTFS links or directory copies + +ifeq ($(CONFIG_WINDOWS_MKLINK),y) + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)link.bat +else + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.bat +endif +DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.bat + +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + + # SDCC for Linux, OSX, or Cygwin understands symbolic links. Windows SDCC + # running under Cygwin does not + +ifeq ($(WINTOOL),y) + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh +else + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)link.sh +endif +DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + +endif diff --git a/configs/z80sim/pashello/defconfig b/configs/z80sim/pashello/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..9a049337cde812270ec303a3e82a9ab43635e83f --- /dev/null +++ b/configs/z80sim/pashello/defconfig @@ -0,0 +1,446 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +CONFIG_WINDOWS_NATIVE=y +# CONFIG_WINDOWS_CYGWIN is not set +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set +# CONFIG_WINDOWS_MKLINK is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="..\apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_DEBUG_SYMBOLS is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="z80" +CONFIG_BOARD_LOOPSPERMSEC=100 +CONFIG_ARCH_CHIP_Z80=y +# CONFIG_ARCH_CHIP_Z8F6403 is not set +# CONFIG_ARCH_CHIP_Z8F6423 is not set +# CONFIG_ARCH_CHIP_EZ80F91 is not set +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +CONFIG_Z80_TOOLCHAIN_SDCCW=y +CONFIG_LINKER_HOME_AREA=0x0000 +CONFIG_LINKER_CODE_AREA=0x0200 +CONFIG_LINKER_DATA_AREA=0x8000 +# CONFIG_LINKER_ROM_AT_0000 is not set +# CONFIG_ARCH_HAVEHEAD is not set + +# +# Architecture Options +# +CONFIG_ARCH_NOINTC=y +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set + +# +# Board Settings +# +CONFIG_RAM_START=0x0000 +CONFIG_RAM_SIZE=65536 + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_XTRS is not set +CONFIG_ARCH_BOARD_Z80SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="z80sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_USEC_PER_TICK=10000 +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_INSTRUMENTATION is not set +CONFIG_TASK_NAME_SIZE=0 +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=7 +CONFIG_DEV_CONSOLE=y +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="pashello_main" +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_DISABLE_ENVIRON is not set +CONFIG_DISABLE_POLL=y + +# +# Sizes of configurable things (0 disables) +# +CONFIG_MAX_TASKS=8 +CONFIG_NPTHREAD_KEYS=0 +CONFIG_NFILE_DESCRIPTORS=4 +CONFIG_NFILE_STREAMS=4 +CONFIG_NAME_MAX=32 +CONFIG_PREALLOC_MQ_MSGS=0 +CONFIG_MQ_MAXMSGSIZE=0 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 + +# +# Device Drivers +# +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_PWM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART=y +CONFIG_MCU_SERIAL=y +CONFIG_UART_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART Configuration +# +CONFIG_UART_RXBUFSIZE=64 +CONFIG_UART_TXBUFSIZE=64 +CONFIG_UART_BAUD=115200 +CONFIG_UART_BITS=8 +CONFIG_UART_PARITY=0 +CONFIG_UART_2STOP=0 +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_NET is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_FS_RAMMAP is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Binary Formats +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Named Applications +# +# CONFIG_BUILTIN is not set + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_COMPOSITE is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +CONFIG_EXAMPLES_PASHELLO=y +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_SYSTEM_USBMSC is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WLAN is not set + +# +# Interpreters +# + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +CONFIG_INTERPRETERS_PCODE=y +CONFIG_INTERPRETERS_PRUN=y + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETDB_DNSCLIENT is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# ModBus +# + +# +# FreeModbus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# System NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# + +# +# SD Card +# + +# +# Sysinfo +# diff --git a/configs/z80sim/pashello/setenv.bat b/configs/z80sim/pashello/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..59c372ddd9024a52636b24c25608cc6741b2ff01 --- /dev/null +++ b/configs/z80sim/pashello/setenv.bat @@ -0,0 +1,50 @@ +@echo off + +rem configs/z80sim/pashello/setenv.bat +rem +rem Copyright (C) 2012 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the SDCC toolchain for windows. + +set PATH=C:\Program Files (x86)\SDCC/bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% +echo %PATH% diff --git a/configs/z80sim/scripts/setenv.bat b/configs/z80sim/scripts/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..c266d1e81873df1f8a48696c8fbf61569770c6b7 --- /dev/null +++ b/configs/z80sim/scripts/setenv.bat @@ -0,0 +1,50 @@ +@echo off + +rem configs/z80sim/scripts/setenv.bat +rem +rem Copyright (C) 2012 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the SDCC toolchain for windows. + +set PATH=C:\Program Files (x86)\SDCC/bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% +echo %PATH% diff --git a/configs/z80sim/scripts/setenv.sh b/configs/z80sim/scripts/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..ead1e1f5f710e3ac85f28607fd60579e6d8de5a6 --- /dev/null +++ b/configs/z80sim/scripts/setenv.sh @@ -0,0 +1,66 @@ +#!/bin/bash +# configs/z80sim/ostest/setenv.sh +# +# Copyright (C) 2007, 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# +# This is the normal installation directory for SDCC under Linux, OSX +# or Linux: +# +export TOOLCHAIN_BIN=/usr/local/bin + +# +# This is the normal installation directory for SDCC under Windows +# +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/SDCC/bin" + +# +# Add the path to the toolchain to the PATH varialble +# +export PATH="${TOOLCHAIN_BIN}":/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/configs/z80sim/src/.gitignore b/configs/z80sim/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..101a872100506ab01bf711f063d911f1fcc8cae0 --- /dev/null +++ b/configs/z80sim/src/.gitignore @@ -0,0 +1,16 @@ +/Make.dep +/.depend +/up_mem.h +/*.sym +/*.asm +/*.rel +/*.lst +/*.adb +/*.rst +/*.lib +/*.lnk +/*.map +/*.mem +/*.ihx +/*.hex + diff --git a/configs/z80sim/src/Makefile b/configs/z80sim/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..0410aedf320c7b1cd74c34bb38f524bd2103cc6e --- /dev/null +++ b/configs/z80sim/src/Makefile @@ -0,0 +1,41 @@ +############################################################################ +# configs/z80sim/src/Makefile +# +# Copyright (C) 2007, 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = z80_irq.c z80_serial.c z80_timerisr.c z80_lowputc.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/z80sim/src/z80_irq.c b/configs/z80sim/src/z80_irq.c new file mode 100644 index 0000000000000000000000000000000000000000..3bfdb00035a7178cdefd5ceb04e8bd66b91580bd --- /dev/null +++ b/configs/z80sim/src/z80_irq.c @@ -0,0 +1,89 @@ +/**************************************************************************** + * configs/z80sim/src/z80_irq.c + * + * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_irqinitialize + ****************************************************************************/ + +void up_irqinitialize(void) +{ + /* Attach the timer interrupt -- There is not special timer interrupt + * enable in the simulation so it must be enabled here before interrupts + * are enabled. + * + * NOTE: Normally, there are seperate enables for "global" interrupts + * and specific device interrupts. In such a "normal" case, the timer + * interrupt should be attached and enabled in the function up_timer_initialize() + */ + + irq_attach(Z80_IRQ_SYSTIMER, (xcpt_t)up_timerisr); + + /* And finally, enable interrupts (including the timer) */ + +#ifndef CONFIG_SUPPRESS_INTERRUPTS + up_irq_restore(Z80_C_FLAG); +#endif +} diff --git a/configs/z80sim/src/z80_lowputc.c b/configs/z80sim/src/z80_lowputc.c new file mode 100644 index 0000000000000000000000000000000000000000..669c53c9767217d4eb7ee370199b55ffafc49307 --- /dev/null +++ b/configs/z80sim/src/z80_lowputc.c @@ -0,0 +1,102 @@ +/******************************************************************************** + * configs/z80sim/src//z80_lowputc.c + * + * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ********************************************************************************/ + +/******************************************************************************** + * Included Files + ********************************************************************************/ + +#include + +#include +#include +#include +#include + +#include "up_internal.h" + +/******************************************************************************** + * Pre-processor Definitions + ********************************************************************************/ + +/******************************************************************************** + * Public Data + ********************************************************************************/ + +/******************************************************************************** + * Private Data + ********************************************************************************/ + +/******************************************************************************** + * Private Functions + ********************************************************************************/ + +/******************************************************************************** + * Public Functions + ********************************************************************************/ + +/******************************************************************************** + * Name: z80_lowputc + * + * Data sent to port 0xbe are echoed on stdout by the simulation + * + ********************************************************************************/ + +void z80_lowputc(char ch) __naked +{ + __asm__ ( + "\tld hl, #2\n" + "\tadd hl, sp\n" + "\tld a, (hl)\n" + "\tout (0xbe), a\n" + "\tret\n" + ); +} + +/******************************************************************************** + * Name: z80_lowgetc + * + * Data from stdin can be received on port 0xbe in the simulation + * + ********************************************************************************/ + +char z80_lowgetc(void) __naked +{ + __asm__ ( + "\tin a, (0xbe)\n" + "\tld l, a\n" + "\tld h, #0\n" + "\tret\n" + ); +} diff --git a/configs/z80sim/src/z80_serial.c b/configs/z80sim/src/z80_serial.c new file mode 100644 index 0000000000000000000000000000000000000000..24cc42db7688a65c1b94dccab135864f439cd772 --- /dev/null +++ b/configs/z80sim/src/z80_serial.c @@ -0,0 +1,363 @@ +/**************************************************************************** + * configs/z80sim/src/z80_serial.c + * + * Copyright (C) 2007-2009, 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#ifdef USE_SERIALDRIVER + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int up_setup(FAR struct uart_dev_s *dev); +static void up_shutdown(FAR struct uart_dev_s *dev); +static int up_attach(FAR struct uart_dev_s *dev); +static void up_detach(FAR struct uart_dev_s *dev); +static int up_ioctl(FAR struct file *filep, int cmd, unsigned long arg); +static int up_receive(FAR struct uart_dev_s *dev, unsigned int *status); +static void up_rxint(FAR struct uart_dev_s *dev, bool enable); +static bool up_rxavailable(FAR struct uart_dev_s *dev); +static void up_send(FAR struct uart_dev_s *dev, int ch); +static void up_txint(FAR struct uart_dev_s *dev, bool enable); +static bool up_txready(FAR struct uart_dev_s *dev); +static bool up_txempty(FAR struct uart_dev_s *dev); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct uart_ops_s g_uart_ops = +{ + up_setup, /* setup */ + up_shutdown, /* shutdown */ + up_attach, /* attach */ + up_detach, /* detach */ + up_ioctl, /* ioctl */ + up_receive, /* receive */ + up_rxint, /* rxint */ + up_rxavailable, /* rxavailable */ +#ifdef CONFIG_SERIAL_IFLOWCONTROL + NULL, /* rxflowcontrol */ +#endif + up_send, /* send */ + up_txint, /* txint */ + up_txready, /* txready */ + up_txempty, /* txempty */ +}; + +/* I/O buffers */ + +static char g_uartrxbuffer[CONFIG_UART_RXBUFSIZE]; +static char g_uarttxbuffer[CONFIG_UART_TXBUFSIZE]; + +/* This describes the state of the fake UART port. */ + +static uart_dev_t g_uartport = +{ + 0, /* open_count */ + false, /* xmitwaiting */ + false, /* recvwaiting */ + true, /* isconsole */ + { 1 }, /* closesem */ + { 0 }, /* xmitsem */ + { 0 }, /* recvsem */ + { /* xmit */ + { 1 }, /* sem */ + 0, /* head */ + 0, /* tail */ + CONFIG_UART_TXBUFSIZE, /* size */ + g_uarttxbuffer, /* buffer */ + }, + { /* recv */ + { 1 }, /* sem */ + 0, /* head */ + 0, /* tail */ + CONFIG_UART_RXBUFSIZE, /* size */ + g_uartrxbuffer, /* buffer */ + }, + &g_uart_ops, /* ops */ + NULL, /* priv */ +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_setup + * + * Description: + * Configure the UART baud, bits, parity, fifos, etc. This + * method is called the first time that the serial port is + * opened. + * + ****************************************************************************/ + +static int up_setup(FAR struct uart_dev_s *dev) +{ + return OK; +} + +/**************************************************************************** + * Name: up_shutdown + * + * Description: + * Disable the UART. This method is called when the serial + * port is closed + * + ****************************************************************************/ + +static void up_shutdown(FAR struct uart_dev_s *dev) +{ +} + +/**************************************************************************** + * Name: up_attach + * + * Description: + * Configure the UART to operation in interrupt driven mode. This method is + * called when the serial port is opened. Normally, this is just after the + * setup() method is called, however, the serial console may operate in a + * non-interrupt driven mode during the boot phase. + * + * RX and TX interrupts are not enabled by the attach method (unless the + * hardware supports multiple levels of interrupt enabling). The RX and TX + * interrupts are not enabled until the txint() and rxint() methods are called. + * + ****************************************************************************/ + +static int up_attach(FAR struct uart_dev_s *dev) +{ + return OK; +} + +/**************************************************************************** + * Name: up_detach + * + * Description: + * Detach UART interrupts. This method is called when the serial port is + * closed normally just before the shutdown method is called. The exception is + * the serial console which is never shutdown. + * + ****************************************************************************/ + +static void up_detach(FAR struct uart_dev_s *dev) +{ +} + +/**************************************************************************** + * Name: up_ioctl + * + * Description: + * All ioctl calls will be routed through this method + * + ****************************************************************************/ + +static int up_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + *get_errno_ptr() = ENOTTY; + return ERROR; +} + +/**************************************************************************** + * Name: up_receive + * + * Description: + * Called (usually) from the interrupt level to receive one + * character from the UART. Error bits associated with the + * receipt are provided in the return 'status'. + * + ****************************************************************************/ + +static int up_receive(FAR struct uart_dev_s *dev, unsigned int *status) +{ + uint8_t ch = z80_lowgetc(); + *status = 0; + return ch; +} + +/**************************************************************************** + * Name: up_rxint + * + * Description: + * Call to enable or disable RX interrupts + * + ****************************************************************************/ + +static void up_rxint(FAR struct uart_dev_s *dev, bool enable) +{ +} + +/**************************************************************************** + * Name: up_rxavailable + * + * Description: + * Return true if the receive fifo is not empty + * + ****************************************************************************/ + +static bool up_rxavailable(FAR struct uart_dev_s *dev) +{ + return true; +} + +/**************************************************************************** + * Name: up_send + * + * Description: + * This method will send one byte on the UART + * + ****************************************************************************/ + +static void up_send(FAR struct uart_dev_s *dev, int ch) +{ + z80_lowputc(ch); +} + +/**************************************************************************** + * Name: up_txint + * + * Description: + * Call to enable or disable TX interrupts + * + ****************************************************************************/ + +static void up_txint(FAR struct uart_dev_s *dev, bool enable) +{ +} + +/**************************************************************************** + * Name: up_txready + * + * Description: + * Return true if the tranmsit fifo is not full + * + ****************************************************************************/ + +static bool up_txready(FAR struct uart_dev_s *dev) +{ + return true; +} + +/**************************************************************************** + * Name: up_txempty + * + * Description: + * Return true if the transmit fifo is empty + * + ****************************************************************************/ + +static bool up_txempty(FAR struct uart_dev_s *dev) +{ + return true; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_serialinit + * + * Description: + * Performs the low level UART initialization early in + * debug so that the serial console will be available + * during bootup. This must be called before up_serialinit. + * + ****************************************************************************/ + +void up_earlyserialinit(void) +{ +} + +/**************************************************************************** + * Name: up_serialinit + * + * Description: + * Register serial console and serial ports. This assumes + * that up_earlyserialinit was called previously. + * + ****************************************************************************/ + +void up_serialinit(void) +{ + (void)uart_register("/dev/console", &g_uartport); + (void)uart_register("/dev/ttyS0", &g_uartport); +} +#endif /* USE_SERIALDRIVER */ + +/**************************************************************************** + * Name: up_putc + * + * Description: + * Provide priority, low-level access to support OS debug + * writes + * + ****************************************************************************/ + +int up_putc(int ch) +{ + z80_lowputc(ch); + return 0; +} + diff --git a/configs/z80sim/src/z80_timerisr.c b/configs/z80sim/src/z80_timerisr.c new file mode 100644 index 0000000000000000000000000000000000000000..91c1b809d80df03a8ff848cffb6b7e69d84cda2c --- /dev/null +++ b/configs/z80sim/src/z80_timerisr.c @@ -0,0 +1,95 @@ +/**************************************************************************** + * configs/z80sim/src/z80_timerisr.c + * + * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "clock/clock.h" +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Function: up_timerisr + * + * Description: + * The timer ISR will perform a variety of services for various portions of + * the system. + * + ****************************************************************************/ + +int up_timerisr(int irq, FAR chipreg_t *regs) +{ + /* Process timer interrupt */ + + sched_process_timer(); + return 0; +} + +/**************************************************************************** + * Function: up_timer_initialize + * + * Description: + * This function is called during start-up to initialize the timer + * interrupt. + * + ****************************************************************************/ + +void up_timer_initialize(void) +{ + /* The timer interrupt was attached in up_irqinitialize -- see comments there */ +} + diff --git a/configs/z8encore000zco/Kconfig b/configs/z8encore000zco/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/z8encore000zco/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/z8encore000zco/README.txt b/configs/z8encore000zco/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..85cb56f52c2a5843ba69e5523baae852d7d881f3 --- /dev/null +++ b/configs/z8encore000zco/README.txt @@ -0,0 +1,111 @@ +README.txt +^^^^^^^^^^ + +ZDS-II Compiler Versions +^^^^^^^^^^^^^^^^^^^^^^^^ + +Version 4.10.1 + The ZDS-II version 4.10.2 will not compile NuttX. It reports "internal + errors" on one of the files, mm/mm_initialize.c. Below is a simple work- + around. With this work-around in place, NuttX builds successfully with + the 4.10.1 compiler. + + --- mm/mm_initialize.c.SAVE 2008-02-13 08:06:46.833857700 -0600 + +++ mm/mm_initialize.c 2008-02-13 08:07:26.367608900 -0600 + @@ -94,8 +94,11 @@ + { + int i; + + +#if 0 /* DO NOT CHECK IN */ + CHECK_ALLOCNODE_SIZE; + CHECK_FREENODE_SIZE; + +#endif + + /* Set up global variables */ + +Version 4.9.5 + This is the latest tool version listed on the ZiLOG site for the Z8F6403. + However, it uses different compiler command line arguments. + +Version 5.0.0 + + On November 28, 2012, all of the z8 configurations were converted to use 5.0.0, + but have not been verified on a running target. + + Paths were also updated that are specific to a 32-bit toolchain running on + a 64 bit windows platform. Change to a different toolchain, you will need + to modify the versioning in Make.defs and setenv.sh; if you want to build + on a different platform, you will need to change the path in the ZDS binaries + in those same files. + +Other Versions + If you use any version of ZDS-II other than 5.0.0 or if you install ZDS-II + at any location other than the default location, you will have to modify + two files: (1) configs/z8encore000zco/*/setenv.sh and (2) + configs/z8encore000zco/*/Make.defs. + +Configuration Subdirectories +^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +- src/ and include/ + These directories contain common logic for all z8encore000zco + configurations. + +Variations on the basic z8encore000zco configuration are maintained +in subdirectories. To configure any specific configuration, do the +following steps: + + cd /tools + ./configure.sh z8encore000zco/ + cd + make + +Where is the specific board configuration that you +wish to build. The following board-specific configurations are +available: + +- ostest + This builds the examples/ostest application for execution from FLASH. + See examples/README.txt for information about ostest. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration assumes that you are using the + Cygwin environment on Windows. An option is to use the native + CMD.exe window build as described in the top-level README.txt + file. To set up that configuration: + + -CONFIG_WINDOWS_CYGWIN=y + +CONFIG_WINDOWS_NATIVE=y + + And after configuring, make sure that CONFIG_APPS_DIR uses + the back slash character. For example: + + CONFIG_APPS_DIR="..\apps" + + NOTES: + + a. If you need to change the toolchain path used in Make.defs, you + will need to use the short 8.3 filenames to avoid spaces. On my + PC, C:\PROGRA~1\ is is C:\Program Files\ and C:\PROGRA~2\ is + C:\Program Files (x86)\ + b. You can't use setenv.sh in the native Windows environment. Try + scripts/setenv.bat instead. + c. At present, the native Windows build fails at the final link stages. + The failure is due to problems in arch/z80/src/nuttx.linkcmd that + is autogenerated by arch/z80/src/Makefile.zdsii. The basic problem + is the spurious spaces and and carrirage returns are generated at + the end of the lines after a line continuation (\ ^M). If these + trailing bad characters are manually eliminated, then the build + will succeed on the next try. + +Check out any README.txt files in these s. diff --git a/configs/z8encore000zco/include/board.h b/configs/z8encore000zco/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..e693aebb827faef51642fc82c48874f743d912e2 --- /dev/null +++ b/configs/z8encore000zco/include/board.h @@ -0,0 +1,76 @@ +/**************************************************************************** + * arch/z8encore000zco/include/board.h + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* LED pattern definitions */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_IDLE 4 +#define LED_INIRQ 5 +#define LED_ASSERTION 6 +#define LED_SIGNAL 6 +#define LED_PANIC 7 + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/z8encore000zco/ostest/.gitignore b/configs/z8encore000zco/ostest/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..ad38f4b402e834cbd6573f869792a43028ff7a02 --- /dev/null +++ b/configs/z8encore000zco/ostest/.gitignore @@ -0,0 +1,6 @@ +ostest.hex +ostest.map +ostest.lod +ostest.wsp +*.asm + diff --git a/configs/z8encore000zco/ostest/Make.defs b/configs/z8encore000zco/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..f0e0deff2796715cc7d1b55824881adda89cd6b7 --- /dev/null +++ b/configs/z8encore000zco/ostest/Make.defs @@ -0,0 +1,301 @@ +############################################################################ +# configs/z8encore000zco/ostest/Make.defs +# +# Copyright (C) 2008, 2012-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk + +# These are the directories where the ZDS-II toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_Z8_ZDSII_V522),y) +ZDSVERSION = 5.2.2 +else # ifeq ($(CONFIG_Z8_ZDSII_V500),y) +ZDSVERSION = 5.0.0 +endif + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + ZDSINSTALLDIR = C:/PROGRA~2/ZiLOG/ZDSII_Z8Encore!_$(ZDSVERSION) + INSTALLDIR = ${shell echo $(ZDSINSTALLDIR)| sed -e "s/\//\\/g"} + ZDSBINDIR = $(INSTALLDIR)\bin + ZDSSTDINCDIR = $(INSTALLDIR)\include\std + ZDSZILOGINCDIR = $(INSTALLDIR)\include\zilog +ifeq ($(CONFIG_ARCH_CHIP_Z8F642X),y) + ZDSDEVINCDIR = $(INSTALLDIR)\Z8Encore_F642X +endif +ifeq ($(CONFIG_ARCH_CHIP_Z8F640X),y) + ZDSDEVINCDIR = $(INSTALLDIR)\Z8Encore_F640X +endif + ZDSSTDLIBDIR = $(INSTALLDIR)\lib\std + ZDSZILOGLIBDIR = $(INSTALLDIR)\lib\zilog + + # CFLAGs + + ARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + EARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHSTDINCLUDES = -stdinc:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR);$(ZDSDEVINCDIR) + ARCHUSRINCLUDES = -usrinc:. +else + WINTOOL = y + ZDSINSTALLDIR = C:/PROGRA~2/ZiLOG/ZDSII_Z8Encore!_$(ZDSVERSION) + INSTALLDIR = ${shell cygpath -u "$(ZDSINSTALLDIR)"} + ZDSBINDIR = $(INSTALLDIR)/bin + ZDSSTDINCDIR = $(INSTALLDIR)/include/std + ZDSZILOGINCDIR = $(INSTALLDIR)/include/zilog +ifeq ($(CONFIG_ARCH_CHIP_Z8F642X),y) + ZDSDEVINCDIR = $(ZDSZILOGINCDIR)/Z8Encore_F642X +endif +ifeq ($(CONFIG_ARCH_CHIP_Z8F640X),y) + ZDSDEVINCDIR = $(ZDSZILOGINCDIR)/Z8Encore_F640X +endif + ZDSSTDLIBDIR = $(INSTALLDIR)/lib/std + ZDSZILOGLIBDIR = $(INSTALLDIR)/lib/zilog + + # These are the same directories but with the directory separator + # character swapped as needed by the ZDS-II compiler + + WTOPDIR = ${shell cygpath -w "$(TOPDIR)"} + WZDSSTDINCDIR = ${shell cygpath -w "$(ZDSSTDINCDIR)"} + WZDSZILOGINCDIR = ${shell cygpath -w "$(ZDSZILOGINCDIR)"} + WZDSDEVINCDIR = ${shell cygpath -w "$(ZDSDEVINCDIR)"} + WZDSSTDLIBDIR = ${shell cygpath -w "$(ZDSSTDLIBDIR)"} + WZDSZILOGLIBDIR = ${shell cygpath -w "$(ZDSZILOGLIBDIR)"} + + # Escaped versions + + ETOPDIR = ${shell echo "$(WTOPDIR)" | sed -e "s/ /%20/g"} + EZDSSTDINCDIR = ${shell echo "$(WZDSSTDINCDIR)" | sed -e "s/ /%20/g"} + EZDSZILOGINCDIR = ${shell echo "$(WZDSZILOGINCDIR)" | sed -e "s/ /%20/g"} + + # CFLAGs + + ARCHASMINCLUDES = -include:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + EARCHASMINCLUDES = -include:'$(ETOPDIR)\include;$(EZDSSTDINCDIR);$(EZDSZILOGINCDIR)' + ARCHSTDINCLUDES = -stdinc:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR);$(WZDSDEVINCDIR)' + ARCHUSRINCLUDES = -usrinc:'.' +endif + +# Assembler definitions + +ifeq ($(CONFIG_ARCH_CHIP_Z8F642X),y) + ARCHFAMILYDEF = _Z8ENCORE_F642X + ARCHSERIESDEF = _Z8ENCORE_64K_SERIES + ARCHREVAA = -NOrevaa +ifeq ($(CONFIG_ARCH_CHIP_Z8F6423),y) + ARCHCPU = Z8F6423 + ARCHCPUDEF = _Z8F6423 +endif +endif + +ifeq ($(CONFIG_ARCH_CHIP_Z8F640X),y) + ARCHFAMILYDEF = _Z8ENCORE_F640X + ARCHSERIESDEF = _Z8ENCORE_640_FAMILY + ARCHREVAA = -revaa +ifeq ($(CONFIG_ARCH_CHIP_Z8F6403),y) + ARCHCPU = Z8F6403 + ARCHCPUDEF = _Z8F6403 +endif +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHASMOPTIMIZATION = -debug -sdiopt +else + ARCHASMOPTIMIZATION = -nodebug -sdiopt +endif + +ARCHASMCPUFLAGS = -cpu:$(ARCHCPU) -NOigcase $(ARCHREVAA) +ARCHASMLIST = -list -NOlistmac -name -pagelen:56 -pagewidth:80 -quiet +ARCHASMWARNINGS = -warn +ARCHASMDEFINES = -define:$(ARCHCPUDEF)=1 -define:$(ARCHSERIESDEF)=1 -define:$(ARCHFAMILYDEF)=1 -define:__ASSEMBLY__ +AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION) + +# Compiler definitions + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -debug +else + ARCHOPTIMIZATION = -nodebug +endif + +ifeq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -NOregvar -reduceopt +else + ARCHOPTIMIZATION += -regvar +endif + +ARCHCPUFLAGS = -chartype:S -model:L -const:RAM -NOoptlink -promote -cpu:$(ARCHCPU) $(ARCHREVAA) -NOgenprintf \ + -asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)" +ARCHLIST = -keeplst -NOlist -NOlistinc -keepasm +ARCHPICFLAGS = +ARCHWARNINGS = -warn +ARCHDEFINES = -define:$(ARCHFAMILYDEF) -define:$(ARCHCPUDEF) -define:$(ARCHSERIESDEF) +ARCHINCLUDES = $(ARCHSTDINCLUDES) $(ARCHUSRINCLUDES) +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHLIST) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) + +CPPDEFINES = -D$(ARCHFAMILYDEF) -D$(ARCHCPUDEF) -D$(ARCHSERIESDEF) -D__ASSEMBLY__ +CPPINCLUDES = -I$(TOPDIR)$(DELIM)include +CPPFLAGS = $(CPPDEFINES) $(CPPINCLUDES) + +# Librarian definitions + +ARFLAGS = -quiet -warn + +# Linker definitions + +LINKCMDTEMPLATE = $(TOPDIR)$(DELIM)configs$(DELIM)z8encore000zco$(DELIM)ostest$(DELIM)ostest.linkcmd + +# Tool names/pathes + +CROSSDEV = +CC = ez8cc.exe +CPP = gcc -E +LD = ez8link.exe +AS = ez8asm.exe +AR = ez8lib.exe + +# File extensions + +ASMEXT = .asm +OBJEXT = .obj +LIBEXT = .lib +EXEEXT = .hex + +# These are the macros that will be used in the NuttX make system +# to compile and assembly source files and to insert the resulting +# object files into an archive + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + +define PREPROCESS + @echo CPP: $1->$2 + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) "$(CC)" $(CFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define ASSEMBLE + $(Q) "$(AS)" $(AFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + @echo AR: $2 + $(Q) for %%G in ($(2)) do ( "$(AR)" $(ARFLAGS) $1=-+%%G ) +endef + +define CLEAN + $(Q) if exist *.obj (del /f /q *.obj) + $(Q) if exist *.src (del /f /q *.src) + $(Q) if exist *.lib (del /f /q *.lib) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.lod (del /f /q *.lod) + $(Q) if exist *.lst (del /f /q *.lst) +endef + +else + +define PREPROCESS + @echo "CPP: $1->$2" + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) (wfile=`cygpath -w "$1"`; "$(CC)" $(CFLAGS) $$wfile) +endef + +define ASSEMBLE + $(Q) (wfile=`cygpath -w "$1"`; "$(AS)" $(AFLAGS) $$wfile) +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + $(Q) for __obj in $(2) ; do \ + echo "AR: $$__obj"; \ + "$(AR)" $(ARFLAGS) $1=-+$$__obj || { echo "$(AR) $1=-+$$__obj FAILED!" ; exit 1 ; } \ + done +endef + +define CLEAN + $(Q) rm -f *.obj *.src *.lib *.hex *.lod *.lst +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + + # ZDS-II cannot follow Cygwin soft links, so we will have to use directory copies + + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh +endif diff --git a/configs/z8encore000zco/ostest/README.txt b/configs/z8encore000zco/ostest/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..6af9a8e76e8cbd9b22aa2218c38fc94595644b1f --- /dev/null +++ b/configs/z8encore000zco/ostest/README.txt @@ -0,0 +1,12 @@ +README.txt +^^^^^^^^^^ + +ostest.zfpproj is a simple ZDS-II project that will allow you + to use the ZDS-II debugger. Before using, copy the following + files from the toplevel directory: + + nuttx.hex, nuttx.map, nuttx.lod + + to this directory as: + + ostest.hex, ostest.map, ostest.lod diff --git a/configs/z8encore000zco/ostest/defconfig b/configs/z8encore000zco/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..5625226e181c9069a09b586057f9e6f2cf46a4d2 --- /dev/null +++ b/configs/z8encore000zco/ostest/defconfig @@ -0,0 +1,670 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="z8" +# CONFIG_ARCH_CHIP_Z80 is not set +# CONFIG_ARCH_CHIP_Z8018006VSG is not set +# CONFIG_ARCH_CHIP_Z8018010VSG is not set +# CONFIG_ARCH_CHIP_Z8018008VSG is not set +# CONFIG_ARCH_CHIP_Z8018010FSG is not set +# CONFIG_ARCH_CHIP_Z8018008VEG is not set +# CONFIG_ARCH_CHIP_Z8018006VEG is not set +# CONFIG_ARCH_CHIP_Z8018006PSG is not set +# CONFIG_ARCH_CHIP_Z8018008FSG is not set +# CONFIG_ARCH_CHIP_Z8018010PSG is not set +# CONFIG_ARCH_CHIP_Z8018006PEG is not set +# CONFIG_ARCH_CHIP_Z8018010VEG is not set +# CONFIG_ARCH_CHIP_Z8018010PEG is not set +# CONFIG_ARCH_CHIP_Z8018008PSG is not set +# CONFIG_ARCH_CHIP_Z8018006FSG is not set +# CONFIG_ARCH_CHIP_Z8018000XSO is not set +# CONFIG_ARCH_CHIP_Z8018010FEG is not set +# CONFIG_ARCH_CHIP_Z8018000WSO is not set +# CONFIG_ARCH_CHIP_Z8018008PEG is not set +# CONFIG_ARCH_CHIP_Z8018110FEG is not set +# CONFIG_ARCH_CHIP_Z8018233FSG is not set +# CONFIG_ARCH_CHIP_Z8018220AEG is not set +# CONFIG_ARCH_CHIP_Z8018216FSG is not set +# CONFIG_ARCH_CHIP_Z8018216ASG is not set +# CONFIG_ARCH_CHIP_Z8018233ASG is not set +# CONFIG_ARCH_CHIP_Z8019520FSG is not set +# CONFIG_ARCH_CHIP_Z8019533FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020VSG is not set +# CONFIG_ARCH_CHIP_Z8L18020FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020PSG is not set +# CONFIG_ARCH_CHIP_Z8L18220ASG is not set +# CONFIG_ARCH_CHIP_Z8L18220FSG is not set +# CONFIG_ARCH_CHIP_Z8L18220AEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG1960 is not set +# CONFIG_ARCH_CHIP_Z8S18033VSG is not set +# CONFIG_ARCH_CHIP_Z8S18010FSG is not set +# CONFIG_ARCH_CHIP_Z8S18010VEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020PSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FEG is not set +# CONFIG_ARCH_CHIP_Z8S18020FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PSG is not set +# CONFIG_ARCH_CHIP_Z8S18020FEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PEG is not set +# CONFIG_ARCH_CHIP_Z8S18010FEG is not set +CONFIG_ARCH_CHIP_Z8F6403=y +# CONFIG_ARCH_CHIP_Z8F6423 is not set +# CONFIG_ARCH_CHIP_EZ80F91 is not set +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +CONFIG_ARCH_CHIP_Z8F640X=y +CONFIG_ARCH_CHIP_Z8=y +CONFIG_HAVE_LOWSERIALINIT=y +CONFIG_Z8_UART0=y +CONFIG_Z8_UART1=y +CONFIG_Z8_TOOLCHAIN_ZDSII=y +# CONFIG_Z8_ZDSII_V500 is not set +CONFIG_Z8_ZDSII_V522=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +CONFIG_ENDIAN_BIG=y +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_Z8ENCORE000ZCO=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="z8encore000zco" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +# CONFIG_ARCH_LEDS is not set + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=28 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=0 +CONFIG_NFILE_STREAMS=0 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_MODULE is not set + +# +# Work queue support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=256 +CONFIG_USERMAIN_STACKSIZE=256 +CONFIG_PTHREAD_STACK_MIN=128 +CONFIG_PTHREAD_STACK_DEFAULT=256 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=0 +CONFIG_UART0_TXBUFSIZE=0 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=0 +CONFIG_UART1_TXBUFSIZE=0 +CONFIG_UART1_BAUD=57600 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_UART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=256 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/z8encore000zco/ostest/ostest.linkcmd b/configs/z8encore000zco/ostest/ostest.linkcmd new file mode 100644 index 0000000000000000000000000000000000000000..14fcd81f680af1bca630506142bf23f760735a1f --- /dev/null +++ b/configs/z8encore000zco/ostest/ostest.linkcmd @@ -0,0 +1,80 @@ +/****************************************************************************/ +/* configs/z8encore000zco/ostest/ostest.linkcmd */ +/* */ +/* Copyright (C) 2008 Gregory Nutt. All rights reserved. */ +/* Author: Gregory Nutt */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* 1. Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in */ +/* the documentation and/or other materials provided with the */ +/* distribution. */ +/* 3. Neither the name NuttX nor the names of its contributors may be */ +/* used to endorse or promote products derived from this software */ +/* without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ +/* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS */ +/* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE */ +/* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */ +/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, */ +/* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS */ +/* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED */ +/* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT */ +/* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN */ +/* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */ +/* POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/****************************************************************************/ + +-FORMAT=OMF695,INTEL32 +-map -maxhexlen=64 -quiet -sort NAME=ascending -unresolved=fatal +-NOwarnoverlap -NOxref -warn -debug -NOigcase -quiet + +RANGE ROM $0 : $FFFF +RANGE RDATA $20 : $FF +RANGE EDATA $100 : $EFF +RANGE PRAM FORBIDDEN + +CHANGE TEXT=EDATA +CHANGE TEXT=FAR_DATA +change NEAR_TXT=NEAR_DATA +change FAR_TXT=FAR_DATA +ORDER FAR_BSS, FAR_DATA +ORDER NEAR_BSS,NEAR_DATA +COPY NEAR_DATA ROM +COPY FAR_DATA ROM + +define _low_near_romdata = copy base of NEAR_DATA +define _low_neardata = base of NEAR_DATA +define _len_neardata = length of NEAR_DATA +define _low_far_romdata = copy base of FAR_DATA +define _low_fardata = base of FAR_DATA +define _len_fardata = length of FAR_DATA +define _low_nearbss = base of NEAR_BSS +define _len_nearbss = length of NEAR_BSS +define _low_farbss = base of FAR_BSS +define _len_farbss = length of FAR_BSS +define _far_stacktop = highaddr of EDATA +define _near_stack = highaddr of RDATA +define _far_heapbot = top of EDATA +define _near_heaptop = highaddr of RDATA +define _near_heapbot = top of RDATA +define _low_pramseg = base of PRAMSEG +define _len_pramseg = length of PRAMSEG +define _low_pram_romdata = copy base of PRAMSEG +define _READ_NVDS=$1000 +define _WRITE_NVDS=$10B3 +define _READ_NVDS_GET_STATUS=$1000 +define _WRITE_NVDS_GET_STATUS=$10B3 +/* Set frequency to 18432000 Hz */ +define __user_frequency = 18432000 + +/* arch/z80/src/Makefile.zdsii will append target, object and library paths below */ + diff --git a/configs/z8encore000zco/ostest/ostest.zdsproj b/configs/z8encore000zco/ostest/ostest.zdsproj new file mode 100644 index 0000000000000000000000000000000000000000..d46a19859b4f621098be05ec096e8ffea9b30fd3 --- /dev/null +++ b/configs/z8encore000zco/ostest/ostest.zdsproj @@ -0,0 +1,291 @@ + +Z8F6403 + + + +.\zsldevinit.asm +..\..\..\nuttx.hex + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +000000000000 +000000000000 +0 + + +000000000000 +000000000000 +0 + + +000000000000 +000000000000 +0 + + +000000000000 +000000000000 +0 + + + + \ No newline at end of file diff --git a/configs/z8encore000zco/ostest/setenv.sh b/configs/z8encore000zco/ostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..565f6f1fea652b6f25c0877f01167927736d4e61 --- /dev/null +++ b/configs/z8encore000zco/ostest/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/z8encore000zco/ostest/setenv.sh +# +# Copyright (C) 2008, 2009, 2012, 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# Check how we were executed +# +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# +# This is the Cygwin path to location where the XDS-II tools were installed +# +# TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_Z8Encore!_5.0.0/bin" +TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_Z8Encore!_5.2.2/bin" + +# +# Add the path to the toolchain to the PATH varialble. NOTE that /bin and /usr/bin +# preceded the toolchain bin directory. This is because the ZDSII bin directory +# includes binaries like make.exe that will interfere with the normal build process +# if we do not give priority to the versions at /bin and /usr/bin. +# +export PATH="/bin:/usr/bin:${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/z8encore000zco/ostest/test-result.txt b/configs/z8encore000zco/ostest/test-result.txt new file mode 100644 index 0000000000000000000000000000000000000000..ebf178439d08532d6246ad537c2c4e3ee54befce --- /dev/null +++ b/configs/z8encore000zco/ostest/test-result.txt @@ -0,0 +1,529 @@ +This is the output from the z16f target from January 31, 2008 +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +While all tests pass per this output, my impression is that some +of the timed delays in during execution of the test were not +correct and I suspect some system timing issues. + +stdio_test: write fd=1 +stdio_test: write fd=2 +stdio_test: Standard I/O Check: printf +user_start: putenv(Variable1=BadValue3) +user_start: setenv(Variable1, GoodValue1, TRUE) +user_start: setenv(Variable2, BadValue1, FALSE) +user_start: setenv(Variable2, GoodValue2, TRUE) +user_start: setenv(Variable3, Variable3, FALSE) +user_start: setenv(Variable3, Variable3, FALSE) +show_variable: Variable=Variable1 has value=GoodValue1 +show_variable: Variable=Variable2 has value=GoodValue2 +show_variable: Variable=Variable3 has value=GoodValue3 +user_start: Started user_main at PID=2 +stdio_test: Standard I/O Check: fprintf to stderr + +user_main: Begin argument test +user_main: Started with argc=5 +user_main: argv[0]="" +user_main: argv[1]="Arg1" +user_main: argv[2]="Arg2" +user_main: argv[3]="Arg3" +user_main: argv[4]="Arg4" + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 2 2 +mxordblk 76b20 76b20 +uordblks 33d0 33d0 +fordblks 78180 78180 +show_variable: Variable=Variable1 has value=GoodValue1 +show_variable: Variable=Variable2 has value=GoodValue2 +show_variable: Variable=Variable3 has value=GoodValue3 +show_variable: Variable=Variable1 has no value +show_variable: Variable=Variable2 has value=GoodValue2 +show_variable: Variable=Variable3 has value=GoodValue3 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 2 3 +mxordblk 76b20 76b20 +uordblks 33d0 33c0 +fordblks 78180 78190 +show_variable: Variable=Variable1 has no value +show_variable: Variable=Variable2 has no value +show_variable: Variable=Variable3 has no value + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 33c0 3380 +fordblks 78190 781d0 + +user_main: /dev/null test +dev_null: Read 0 bytes from /dev/null +dev_null: Wrote 1024 bytes to /dev/null + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: mutex test +Initializing mutex +Starting thread 1 +Starting thread 2 + Thread1 Thread2 + Loops 32 32 + Errors 0 0 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: cancel test +cancel_test: Test 1: Normal Cancelation +cancel_test: Starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +cancel_test: waiter exited with result=ffffffff +cancel_test: PASS thread terminated with PTHREAD_CANCELED +cancel_test: Test 2: Cancelation of detached thread +cancel_test: Re-starting thread +restart_thread: Destroying cond +restart_thread: Destroying mutex +restart_thread: Re-starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +cancel_test: PASS pthread_join failed with status=ESRCH +cancel_test: Test 3: Non-cancelable threads +cancel_test: Re-starting thread (non-cancelable) +restart_thread: Destroying cond +restart_thread: Destroying mutex +restart_thread: Re-starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +thread_waiter: Setting non-cancelable +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +thread_waiter: Releasing mutex +thread_waiter: Setting cancelable +cancel_test: waiter exited with result=ffffffff +cancel_test: PASS thread terminated with PTHREAD_CANCELED + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: semaphore test +sem_test: Initializing semaphore to 0 +sem_test: Starting waiter thread 1 +sem_test: Set thread 1 priority to 191 +waiter_func: Thread 1 Started +waiter_func: Thread 1 initial semaphore value = 0 +waiter_func: Thread 1 waiting on semaphore +sem_test: Starting waiter thread 2 +sem_test: Set thread 2 priority to 128 +waiter_func: Thread 2 Started +waiter_func: Thread 2 initial semaphore value = -1 +waiter_func: Thread 2 waiting on semaphore +sem_test: Starting poster thread 3 +sem_test: Set thread 3 priority to 64 +poster_func: Thread 3 started +poster_func: Thread 3 semaphore value = -2 +poster_func: Thread 3 posting semaphore +waiter_func: Thread 1 awakened +waiter_func: Thread 1 new semaphore value = -1 +waiter_func: Thread 1 done +poster_func: Thread 3 new semaphore value = -1 +poster_func: Thread 3 semaphore value = -1 +poster_func: Thread 3 posting semaphore +waiter_func: Thread 2 awakened +waiter_func: Thread 2 new semaphore value = 0 +waiter_func: Thread 2 done +poster_func: Thread 3 new semaphore value = 0 +poster_func: Thread 3 done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: condition variable test +cond_test: Initializing mutex +cond_test: Initializing cond +cond_test: Starting waiter +cond_test: Set thread 1 priority to 128 +waiter_thread: Started +cond_test: Starting signaler +cond_test: Set thread 2 priority to 64 +thread_signaler: Started +thread_signaler: Terminating +cond_test: signaler terminated, now cancel the waiter +cond_test: Waiter Signaler +cond_test: Loops 32 32 +cond_test: Errors 0 0 +cond_test: +cond_test: 0 times, waiter did not have to wait for data +cond_test: 0 times, data was already available when the signaler run +cond_test: 0 times, the waiter was in an unexpected state when the signaler ran + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: timed wait test +thread_waiter: Initializing mutex +timedwait_test: Initializing cond +timedwait_test: Starting waiter +timedwait_test: Set thread 2 priority to 177 +thread_waiter: Taking mutex +thread_waiter: Starting 5 second wait for condition +timedwait_test: Joining +tcb=0x8057d0 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf7a +rtcb=8057d0 sigdeliver=13046 sigpendactionq.head=0 +Resuming +thread_waiter: pthread_cond_timedwait timed out +thread_waiter: Releasing mutex +thread_waiter: Exit with status 0x12345678 +timedwait_test: waiter exited with result=12345678 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: message queue test +mqueue_test: Starting receiver +mqueue_test: Set receiver priority to 128 +receiver_thread: Starting +mqueue_test: Starting sender +mqueue_test: Set sender thread priority to 64 +mqueue_test: Waiting for sender to complete +sender_thread: Starting +receiver_thread: mq_receive succeeded on msg 0 +sender_thread: mq_send succeeded on msg 0 +receiver_thread: mq_receive succeeded on msg 1 +sender_thread: mq_send succeeded on msg 1 +receiver_thread: mq_receive succeeded on msg 2 +sender_thread: mq_send succeeded on msg 2 +receiver_thread: mq_receive succeeded on msg 3 +sender_thread: mq_send succeeded on msg 3 +receiver_thread: mq_receive succeeded on msg 4 +sender_thread: mq_send succeeded on msg 4 +receiver_thread: mq_receive succeeded on msg 5 +sender_thread: mq_send succeeded on msg 5 +receiver_thread: mq_receive succeeded on msg 6 +sender_thread: mq_send succeeded on msg 6 +receiver_thread: mq_receive succeeded on msg 7 +sender_thread: mq_send succeeded on msg 7 +receiver_thread: mq_receive succeeded on msg 8 +sender_thread: mq_send succeeded on msg 8 +receiver_thread: mq_receive succeeded on msg 9 +sender_thread: mq_send succeeded on msg 9 +sender_thread: returning ntcb=0x8057d0 sigdeliver=0x13046 +rtcb=0x806e30 current_regs=0x0 +rtcb=8057d0 sigdeliver=13046 sigpendactionq.head=0 +Resuming +errors=0 +mqueue_test: Killing receiver +receiver_thread: mq_receive interrupted! +receiver_thread: returning nerrors=0 +mqueue_test: Canceling receiver +mqueue_test: receiver has already terminated + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: timed message queue test +timedmqueue_test: Starting sender +sender_thread: Starting +sender_thread: mq_timedsend succeeded on msg 0 +sender_thread: mq_timedsend succeeded on msg 1 +timedmqueue_test: Waiting for sender to complete +sender_thread: mq_timedsend succeeded on msg 2 +sender_thread: mq_timedsend succeeded on msg 3 +sender_thread: mq_timedsend succeeded on msg 4 +sender_thread: mq_timedsend succeeded on msg 5 +sender_thread: mq_timedsend succeeded on msg 6 +sender_thread: mq_timedsend succeeded on msg 7 +sender_thread: mq_timedsend succeeded on msg 8 +sender_thread: mq_timedsend 9 timed out as expected +sender_thread: returning nerrors=0 +timedmqueue_test: Starting receiver +receiver_thread: Starting +receiver_thread: mq_timedreceive succeeded on msg 0 +receiver_thread: mq_timedreceive succeeded on msg 1 +receiver_thread: mq_timedreceive succeeded on msg 2 +receiver_thread: mq_timedreceive succeeded on msg 3 +timedmqueue_test: Waiting for receiver to complete +receiver_thread: mq_timedreceive succeeded on msg 4 +receiver_thread: mq_timedreceive succeeded on msg 5 +receiver_thread: mq_timedreceive succeeded on msg 6 +receiver_thread: mq_timedreceive succeeded on msg 7 +receiver_thread: mq_timedreceive succeeded on msg 8 +receiver_thread: Receive 9 timed out as expected +receiver_thread: returning nerrors=0 +timedmqueue_test: Test complete + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: signal handler test +sighand_test: Initializing semaphore to 0 +sighand_test: Starting waiter task +sighand_test: Started waiter_main pid=20 +waiter_main: Waiter started +waiter_main: Unmasking signal 17 +waiter_main: Registering signal handler +waiter_main: oact.sigaction=0 oact.sa_flags=0 oact.sa_mask=0 +waiter_main: Waiting on semaphore +tcb=0x8057d0 sigdeliver=0x13046 +rtcb=0x806e30 current_regs=0x0 +sighand_test: Signaling pid=20 with signo=17 sigvalue=42 +rtcb=8057d0 sigdeliver=13046 sigpendactionq.head=804b10 +Resuming +wakeup_action: Received signal 17 +wakeup_action: sival_int=42 +wakeup_action: si_code=1 +wakeup_action: ucontext=0 +waiter_main: sem_wait() successfully interrupted by signal +waiter_main: done +sighand_test: done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 4 +mxordblk 76b20 76b20 +uordblks 3380 35c0 +fordblks 781d0 77f90 + +user_main: POSIX timer test +timer_test: Initializing semaphore to 0 +timer_test: Unmasking signal 17 +timer_test: Registering signal handler +timer_test: oact.sigaction=0 oact.sa_flags=0 oact.sa_mask=0 +timer_test: Creating timer +timer_test: Starting timer +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf7a +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b23 +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=1 +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf7a +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b36 +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=2 +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf7a +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b49 +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=3 +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf76 +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b5c +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=4 +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf66 +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b6f +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=5 +timer_test: Deleting timer +timer_test: done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 4 4 +mxordblk 76b20 76b20 +uordblks 35c0 35c0 +fordblks 77f90 77f90 + +user_main: round-robin scheduler test +rr_test: Starting sieve1 thread +rr_test: Set thread priority to 1 +rr_test: Set thread policty to SCHED_RR +rr_test: Starting sieve1 thread +sieve1 started +rr_test: Waiting for sieves to complete -- this should take awhile +rr_test: If RR scheduling is working, they should start and complete at +rr_test: about the same time +sieve2 started +sieve1 finished +sieve2 finished +rr_test: Done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 4 4 +mxordblk 76b20 76b20 +uordblks 35c0 35c0 +fordblks 77f90 77f90 + +user_main: barrier test +barrier_test: Initializing barrier +barrier_func: Thread 0 started +barrier_test: Thread 0 created +barrier_func: Thread 1 started +barrier_test: Thread 1 created +barrier_func: Thread 2 started +barrier_test: Thread 2 created +barrier_func: Thread 3 started +barrier_test: Thread 3 created +barrier_func: Thread 0 calling pthread_barrier_wait() +barrier_func: Thread 1 calling pthread_barrier_wait() +barrier_func: Thread 2 calling pthread_barrier_wait() +barrier_func: Thread 4 started +barrier_test: Thread 4 created +barrier_func: Thread 3 calling pthread_barrier_wait() +barrier_func: Thread 4 calling pthread_barrier_wait() +barrier_func: Thread 5 started +barrier_test: Thread 5 created +barrier_func: Thread 6 started +barrier_test: Thread 6 created +barrier_func: Thread 7 started +barrier_test: Thread 7 created +barrier_func: Thread 5 calling pthread_barrier_wait() +barrier_func: Thread 6 calling pthread_barrier_wait() +barrier_func: Thread 7 calling pthread_barrier_wait() +barrier_func: Thread 7, back with status=PTHREAD_BARRIER_SERIAL_THREAD (I AM SPECIAL) +barrier_func: Thread 0, back with status=0 (I am not special) +barrier_func: Thread 1, back with status=0 (I am not special) +barrier_func: Thread 2, back with status=0 (I am not special) +barrier_func: Thread 3, back with status=0 (I am not special) +barrier_func: Thread 4, back with status=0 (I am not special) +barrier_func: Thread 5, back with status=0 (I am not special) +barrier_func: Thread 6, back with status=0 (I am not special) +barrier_func: Thread 2 done +barrier_func: Thread 7 done +barrier_func: Thread 0 done +barrier_func: Thread 1 done +barrier_func: Thread 6 done +barrier_func: Thread 3 done +barrier_func: Thread 4 done +barrier_func: Thread 5 done +barrier_test: Thread 0 completed with result=0 +barrier_test: Thread 1 completed with result=0 +barrier_test: Thread 2 completed with result=0 +barrier_test: Thread 3 completed with result=0 +barrier_test: Thread 4 completed with result=0 +barrier_test: Thread 5 completed with result=0 +barrier_test: Thread 6 completed with result=0 +barrier_test: Thread 7 completed with result=0 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 4 4 +mxordblk 76b20 76b20 +uordblks 35c0 35c0 +fordblks 77f90 77f90 + +Final memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 2 4 +mxordblk 76b20 76b20 +uordblks 33d0 35c0 +fordblks 78180 77f90 +user_main: Exitting + diff --git a/configs/z8encore000zco/scripts/setenv.bat b/configs/z8encore000zco/scripts/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..407cca97fe0c91dce7a64ba0fcac779e39a0bf2f --- /dev/null +++ b/configs/z8encore000zco/scripts/setenv.bat @@ -0,0 +1,50 @@ +@echo off + +rem configs/z8encore000zco/scripts/setenv.bat +rem +rem Copyright (C) 2012 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the ZDS-II toolchain. + +set PATH=C:\Program Files (x86)\ZiLOG\ZDSII_Z8Encore!_5.0.0\bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% +echo %PATH% diff --git a/configs/z8encore000zco/src/.gitignore b/configs/z8encore000zco/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..cdc79c5a85a715806175d7b843f304c65430c9c7 --- /dev/null +++ b/configs/z8encore000zco/src/.gitignore @@ -0,0 +1,3 @@ +/Make.dep +/.depend +/*.obj diff --git a/configs/z8encore000zco/src/Makefile b/configs/z8encore000zco/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..7696ccc280ce4e23824ecdc75df60a86be613674 --- /dev/null +++ b/configs/z8encore000zco/src/Makefile @@ -0,0 +1,41 @@ +############################################################################ +# configs/z8encore000zco/Makefile +# +# Copyright (C) 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = z8_lowinit.c z8_leds.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/z8encore000zco/src/z8_leds.c b/configs/z8encore000zco/src/z8_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..6cac5cdee325d41f5dcfe1282df1b029f90645d6 --- /dev/null +++ b/configs/z8encore000zco/src/z8_leds.c @@ -0,0 +1,247 @@ +/**************************************************************************** + * configs/z8encore000zco/src/z8_leds.c + * + * Copyright (C) 2008-2009, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The z16f2800100zcog board has four LEDs: + * + * - Green LED D1 which illuminates in the presence of Vcc + * - Red LED D2 connected to chip port PA0_T0IN + * - Yellow LED D3 connected to chip port PA1_T0OUT + * - Green LED D4 connected to chip port PA2_DE0 + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Port G: Anode Bit Assignments (1 enables) */ + +#define Z8_PORTG_ANODE_MASK 0x7f +#define Z8_PORTG_ANODE_ROW0 0x01 +#define Z8_PORTG_ANODE_ROW1 0x02 +#define Z8_PORTG_ANODE_ROW2 0x04 +#define Z8_PORTG_ANODE_ROW3 0x08 +#define Z8_PORTG_ANODE_ROW4 0x10 +#define Z8_PORTG_ANODE_ROW5 0x20 +#define Z8_PORTG_ANODE_ROW6 0x40 + +/* Port E: Cathode Bit Assignements (0 enables) */ + +#define Z8_PORTE_CATHODE_MASK 0x1f +#define Z8_PORTE_CATHODE_COLUMN0 0x01 +#define Z8_PORTE_CATHODE_COLUMN1 0x02 +#define Z8_PORTE_CATHODE_COLUMN2 0x04 +#define Z8_PORTE_CATHODE_COLUMN3 0x08 +#define Z8_PORTE_CATHODE_COLUMN4 0x10 + +/* Port E: LED Addressing */ + +#define Z8_PORTE_LED_MASK 0xe0 +#define Z8_PORTE_LED_D3 0x20 +#define Z8_PORTE_LED_D4 0x40 +#define Z8_PORTE_LED_D1 0x80 + +/* Port G: LED Addressing */ + +#define Z8_PORTG_LED_MASK 0x80 +#define Z8_PORTG_LED_D2 0x80 + +/* Special values for display */ + +#define LED_ALLON { Z8_PORTG_ANODE_MASK, 0x00 } +#define LED_ALLOFF { 0x00, Z8_PORTE_CATHODE_MASK } +#define LED_LEVEL1 { 0x10, 0x00 } +#define LED_LEVEL2 { 0x08, 0x00 } +#define LED_LEVEL3 { 0x04, 0x00 } +#define LED_LEVEL4 { 0x02, 0x00 } +#define LED_LEVEL1I { 0x14, 0x00 } +#define LED_LEVEL2I { 0x0c, 0x00 } +#define LED_LEVEL3I { 0x04, 0x00 } +#define LED_LEVEL4I { 0x06, 0x00 } +#define LED_LEVEL1S { 0x11, 0x00 } +#define LED_LEVEL2S { 0x09, 0x00 } +#define LED_LEVEL3S { 0x05, 0x00 } +#define LED_LEVEL4S { 0x03, 0x00 } +#define LED_LEVEL1A { 0x10, 0x11 } +#define LED_LEVEL2A { 0x08, 0x11 } +#define LED_LEVEL3A { 0x04, 0x11 } +#define LED_LEVEL4A { 0x02, 0x11 } +#define LED_SNAKEEYES { 0x06, 0x11 } + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct z8_ledbits_s +{ + uint8_t anode; + uint8_t cathode; +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct z8_ledbits_s g_ledarray[10][4] = +{ + { LED_ALLON, LED_ALLON, LED_ALLON, LED_ALLON }, + { LED_ALLOFF, LED_ALLOFF, LED_ALLOFF, LED_ALLOFF }, + { LED_LEVEL1, LED_ALLOFF, LED_ALLOFF, LED_ALLOFF }, + { LED_LEVEL1, LED_LEVEL2, LED_ALLOFF, LED_ALLOFF }, + { LED_LEVEL1, LED_LEVEL2, LED_LEVEL3, LED_ALLOFF }, + { LED_LEVEL1, LED_LEVEL2, LED_LEVEL3, LED_LEVEL4 }, + { LED_LEVEL1I, LED_LEVEL2I, LED_LEVEL3I, LED_LEVEL4I }, + { LED_LEVEL1S, LED_LEVEL2S, LED_LEVEL3S, LED_LEVEL4S }, + { LED_LEVEL1A, LED_LEVEL2A, LED_LEVEL3A, LED_LEVEL4A }, + { LED_SNAKEEYES, LED_SNAKEEYES, LED_SNAKEEYES, LED_SNAKEEYES } +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: z8_putled134 + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +static void z8_putled134(FAR const struct z8_ledbits_s *bits, uint8_t addr) +{ + uint8_t porte; + + porte = bits->cathode; + putreg8(porte, PEOD); /* Load porte data */ + putreg8(bits->anode, PGOD); /* Load portg data */ + + porte |= addr; + putreg8(porte, PEOD); /* Latch data */ +} +#endif + +/**************************************************************************** + * Name: z8_lputed2 + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +static void z8_putled2(FAR const struct z8_ledbits_s *bits, uint8_t addr) +{ + uint8_t portg; + + putreg8(bits->cathode, PEOD); /* Load porte data */ + portg = bits->anode; + putreg8(porte, PGOD); /* Load portg data */ + + portg |= addr; + putreg8(portg, PGOD); /* Latch data */ +} +#endif + +/**************************************************************************** + * Name: z8_putarray + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +static void z8_putarray(FAR const struct z8_ledarray_s *array) +{ + z8_putled134(&array->led[0], Z8_PORTE_LED_D1); + z8_putled2(&array->led[1], Z8_PORTG_LED_D2); + z8_putled134(&array->led[2], Z8_PORTE_LED_D3); + z8_putled134(&array->led[3], Z8_PORTE_LED_D4); +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ + putreg8(0x00, PEAF); /* PE Alt func = Port */ + putreg8(0x00, PGAF); /* PG Alt func = Port */ + + putreg8(0x00, PEOC); /* PE Out Ctrl = push-pull */ + putreg8(0x00, PGOC); /* PG Out Ctrl = push-pull */ + +/*putreg8(0x00, PEDD); * PA Data Dir = output */ + putreg8(0x01, PEADDR); /* PA Data Dir = output */ + putreg8(0x00, PECTL); /* OUTPUT */ +/*putreg8(0x00, PGDD); * PA Data Dir = output */ + putreg8(0x01, PGADDR); /* PA Data Dir = output */ + putreg8(0x00, PGCTL); /* OUTPUT */ + + z8_putarray(&g_ledarray[0][0]); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if ((unsigned)led <= 8) + { + z8_putarray(&g_ledarray[led+1][0]); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led >= 1) + { + board_autoled_on(led-1); + } +} +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/z8encore000zco/src/z8_lowinit.c b/configs/z8encore000zco/src/z8_lowinit.c new file mode 100644 index 0000000000000000000000000000000000000000..ec39b79670ceca072e9adb178505d58a6590b0a7 --- /dev/null +++ b/configs/z8encore000zco/src/z8_lowinit.c @@ -0,0 +1,66 @@ +/**************************************************************************** + * configs/z8encore000zco/src/z8_lowinit.c + * + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Based upon sample code included with the Zilog ZDS-II toolchain. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "chip/chip.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static void z8_gpioinit(void) +{ +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void z8_lowinit(void) +{ + z8_gpioinit(); +} + diff --git a/configs/z8f64200100kit/Kconfig b/configs/z8f64200100kit/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f72f3c094ce4c8f031445c514c343376e4e79e75 --- /dev/null +++ b/configs/z8f64200100kit/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/z8f64200100kit/README.txt b/configs/z8f64200100kit/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..142ea785e159bd6390ed83223c01206bb9727831 --- /dev/null +++ b/configs/z8f64200100kit/README.txt @@ -0,0 +1,111 @@ +README.txt +^^^^^^^^^^ + +ZDS-II Compiler Versions +^^^^^^^^^^^^^^^^^^^^^^^^ + +4.10.1 + The ZDS-II version 4.10.2 will not compile NuttX. It reports "internal + errors" on one of the files, mm/mm_initialize.c. Below is a simple work- + around. With this work-around in place, NuttX builds successfully with + the 4.10.1 compiler. + + --- mm/mm_initialize.c.SAVE 2008-02-13 08:06:46.833857700 -0600 + +++ mm/mm_initialize.c 2008-02-13 08:07:26.367608900 -0600 + @@ -94,8 +94,11 @@ + { + int i; + + +#if 0 /* DO NOT CHECK IN */ + CHECK_ALLOCNODE_SIZE; + CHECK_FREENODE_SIZE; + +#endif + + /* Set up global variables */ + +Version 4.9.5 + This is the latest tool version listed on the ZiLOG site for the Z8F6403. + However, it uses different compiler command line arguments. + +Version 5.0.0 + + On November 28, 2012, all of the z8 configurations were converted to use 5.0.0, + but have not been verified on a running target. + + Paths were also updated that are specific to a 32-bit toolchain running on + a 64 bit windows platform. Change to a different toolchain, you will need + to modify the versioning in Make.defs and setenv.sh; if you want to build + on a different platform, you will need to change the path in the ZDS binaries + in those same files. + +Other Versions + If you use any version of ZDS-II other than 5.0.0 or if you install ZDS-II + at any location other than the default location, you will have to modify + two files: (1) configs/z8f64200100kit/*/setenv.sh and (2) + configs/z8f64200100kit/*/Make.defs. + +Configuration Subdirectories +^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +- src/ and include/ + These directories contain common logic for all z8f64200100kit + configurations. + +Variations on the basic z8f64200100kit configuration are maintained +in subdirectories. To configure any specific configuration, do the +following steps: + + cd /tools + ./configure.sh z8f64200100kit/ + cd + make + +Where is the specific board configuration that you +wish to build. The following board-specific configurations are +available: + +- ostest + This builds the examples/ostest application for execution from FLASH. + See examples/README.txt for information about ostest. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. By default, this configuration assumes that you are using the + Cygwin environment on Windows. An option is to use the native + CMD.exe window build as described in the top-level README.txt + file. To set up that configuration: + + -CONFIG_WINDOWS_CYGWIN=y + +CONFIG_WINDOWS_NATIVE=y + + And after configuring, make sure that CONFIG_APPS_DIR uses + the back slash character. For example: + + CONFIG_APPS_DIR="..\apps" + + NOTES: + + a. If you need to change the toolchain path used in Make.defs, you + will need to use the short 8.3 filenames to avoid spaces. On my + PC, C:\PROGRA~1\ is is C:\Program Files\ and C:\PROGRA~2\ is + C:\Program Files (x86)\ + b. You can't use setenv.sh in the native Windows environment. Try + scripts/setenv.bat instead. + c. At present, the native Windows build fails at the final link stages. + The failure is due to problems in arch/z80/src/nuttx.linkcmd that + is autogenerated by arch/z80/src/Makefile.zdsii. The basic problem + is the spurious spaces and and carrirage returns are generated at + the end of the lines after a line continuation (\ ^M). If these + trailing bad characters are manually eliminated, then the build + will succeed on the next try. + +Check out any README.txt files in these s. diff --git a/configs/z8f64200100kit/include/board.h b/configs/z8f64200100kit/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..4576a935d86754721c43a975aa93c49698166086 --- /dev/null +++ b/configs/z8f64200100kit/include/board.h @@ -0,0 +1,76 @@ +/**************************************************************************** + * arch/z8f64200100kit/include/board.h + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* LED pattern definitions */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_IDLE 4 +#define LED_INIRQ 5 +#define LED_ASSERTION 6 +#define LED_SIGNAL 6 +#define LED_PANIC 7 + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/z8f64200100kit/ostest/.gitignore b/configs/z8f64200100kit/ostest/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..ad38f4b402e834cbd6573f869792a43028ff7a02 --- /dev/null +++ b/configs/z8f64200100kit/ostest/.gitignore @@ -0,0 +1,6 @@ +ostest.hex +ostest.map +ostest.lod +ostest.wsp +*.asm + diff --git a/configs/z8f64200100kit/ostest/Make.defs b/configs/z8f64200100kit/ostest/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..acd7b4dbdfcd8fd419982b4a2deaaeb117d3acfe --- /dev/null +++ b/configs/z8f64200100kit/ostest/Make.defs @@ -0,0 +1,301 @@ +############################################################################ +# configs/z8f64200100kit/ostest/Make.defs +# +# Copyright (C) 2008, 2012-2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk + +# These are the directories where the ZDS-II toolchain is installed. NOTE +# that short 8.3 path names are used in order to avoid spaces. On my machine +# I have: +# +# C:\PROGRA~1\ = C:\Profram Files\ +# C:\PROGRA~2\ = C:\Program Files (x86)\ +# +# Your PC may be configured differently. + +ifeq ($(CONFIG_Z8_ZDSII_V522),y) +ZDSVERSION = 5.2.2 +else # ifeq ($(CONFIG_Z8_ZDSII_V500),y) +ZDSVERSION = 5.0.0 +endif + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + ZDSINSTALLDIR = C:/PROGRA~2/ZiLOG/ZDSII_Z8Encore!_$(ZDSVERSION) + INSTALLDIR = ${shell echo $(ZDSINSTALLDIR)| sed -e "s/\//\\/g"} + ZDSBINDIR = $(INSTALLDIR)\bin + ZDSSTDINCDIR = $(INSTALLDIR)\include\std + ZDSZILOGINCDIR = $(INSTALLDIR)\include\zilog +ifeq ($(CONFIG_ARCH_CHIP_Z8F642X),y) + ZDSDEVINCDIR = $(INSTALLDIR)\Z8Encore_F642X +endif +ifeq ($(CONFIG_ARCH_CHIP_Z8F640X),y) + ZDSDEVINCDIR = $(INSTALLDIR)\Z8Encore_F640X +endif + ZDSSTDLIBDIR = $(INSTALLDIR)\lib\std + ZDSZILOGLIBDIR = $(INSTALLDIR)\lib\zilog + + # CFLAGs + + ARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + EARCHASMINCLUDES = -include:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR) + ARCHSTDINCLUDES = -stdinc:$(TOPDIR)\include;$(ZDSSTDINCDIR);$(ZDSZILOGINCDIR);$(ZDSDEVINCDIR) + ARCHUSRINCLUDES = -usrinc:. +else + WINTOOL = y + ZDSINSTALLDIR = C:/PROGRA~2/ZiLOG/ZDSII_Z8Encore!_$(ZDSVERSION) + INSTALLDIR = ${shell cygpath -u "$(ZDSINSTALLDIR)"} + ZDSBINDIR = $(INSTALLDIR)/bin + ZDSSTDINCDIR = $(INSTALLDIR)/include/std + ZDSZILOGINCDIR = $(INSTALLDIR)/include/zilog +ifeq ($(CONFIG_ARCH_CHIP_Z8F642X),y) + ZDSDEVINCDIR = $(ZDSZILOGINCDIR)/Z8Encore_F642X +endif +ifeq ($(CONFIG_ARCH_CHIP_Z8F640X),y) + ZDSDEVINCDIR = $(ZDSZILOGINCDIR)/Z8Encore_F640X +endif + ZDSSTDLIBDIR = $(INSTALLDIR)/lib/std + ZDSZILOGLIBDIR = $(INSTALLDIR)/lib/zilog + + # These are the same directories but with the directory separator + # character swapped as needed by the ZDS-II compiler + + WTOPDIR = ${shell cygpath -w "$(TOPDIR)"} + WZDSSTDINCDIR = ${shell cygpath -w "$(ZDSSTDINCDIR)"} + WZDSZILOGINCDIR = ${shell cygpath -w "$(ZDSZILOGINCDIR)"} + WZDSDEVINCDIR = ${shell cygpath -w "$(ZDSDEVINCDIR)"} + WZDSSTDLIBDIR = ${shell cygpath -w "$(ZDSSTDLIBDIR)"} + WZDSZILOGLIBDIR = ${shell cygpath -w "$(ZDSZILOGLIBDIR)"} + + # Escaped versions + + ETOPDIR = ${shell echo "$(WTOPDIR)" | sed -e "s/ /%20/g"} + EZDSSTDINCDIR = ${shell echo "$(WZDSSTDINCDIR)" | sed -e "s/ /%20/g"} + EZDSZILOGINCDIR = ${shell echo "$(WZDSZILOGINCDIR)" | sed -e "s/ /%20/g"} + + # CFLAGs + + ARCHASMINCLUDES = -include:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR)' + EARCHASMINCLUDES = -include:'$(ETOPDIR)\include;$(EZDSSTDINCDIR);$(EZDSZILOGINCDIR)' + ARCHSTDINCLUDES = -stdinc:'$(WTOPDIR)\include;$(WZDSSTDINCDIR);$(WZDSZILOGINCDIR);$(WZDSDEVINCDIR)' + ARCHUSRINCLUDES = -usrinc:'.' +endif + +# Assembler definitions + +ifeq ($(CONFIG_ARCH_CHIP_Z8F642X),y) + ARCHFAMILYDEF = _Z8ENCORE_F642X + ARCHSERIESDEF = _Z8ENCORE_64K_SERIES + ARCHREVAA = -NOrevaa +ifeq ($(CONFIG_ARCH_CHIP_Z8F6423),y) + ARCHCPU = Z8F6423 + ARCHCPUDEF = _Z8F6423 +endif +endif + +ifeq ($(CONFIG_ARCH_CHIP_Z8F640X),y) + ARCHFAMILYDEF = _Z8ENCORE_F640X + ARCHSERIESDEF = _Z8ENCORE_640_FAMILY + ARCHREVAA = -revaa +ifeq ($(CONFIG_ARCH_CHIP_Z8F6403),y) + ARCHCPU = Z8F6403 + ARCHCPUDEF = _Z8F6403 +endif +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHASMOPTIMIZATION = -debug -sdiopt +else + ARCHASMOPTIMIZATION = -nodebug -sdiopt +endif + +ARCHASMCPUFLAGS = -cpu:$(ARCHCPU) -NOigcase $(ARCHREVAA) +ARCHASMLIST = -list -NOlistmac -name -pagelen:56 -pagewidth:80 -quiet +ARCHASMWARNINGS = -warn +ARCHASMDEFINES = -define:$(ARCHCPUDEF)=1 -define:$(ARCHSERIESDEF)=1 -define:$(ARCHFAMILYDEF)=1 -define:__ASSEMBLY__ +AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION) + +# Compiler definitions + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -debug +else + ARCHOPTIMIZATION = -nodebug +endif + +ifeq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -NOregvar -reduceopt +else + ARCHOPTIMIZATION += -regvar +endif + +ARCHCPUFLAGS = -chartype:S -model:L -const:RAM -NOoptlink -promote -cpu:$(ARCHCPU) $(ARCHREVAA) -NOgenprintf \ + -asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)" +ARCHLIST = -keeplst -NOlist -NOlistinc -keepasm +ARCHPICFLAGS = +ARCHWARNINGS = -warn +ARCHDEFINES = -define:$(ARCHFAMILYDEF) -define:$(ARCHCPUDEF) -define:$(ARCHSERIESDEF) +ARCHINCLUDES = $(ARCHSTDINCLUDES) $(ARCHUSRINCLUDES) +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHLIST) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) + +CPPDEFINES = -D$(ARCHFAMILYDEF) -D$(ARCHCPUDEF) -D$(ARCHSERIESDEF) -D__ASSEMBLY__ +CPPINCLUDES = -I$(TOPDIR)$(DELIM)include +CPPFLAGS = $(CPPDEFINES) $(CPPINCLUDES) + +# Librarian definitions + +ARFLAGS = -quiet -warn + +# Linker definitions + +LINKCMDTEMPLATE = $(TOPDIR)$(DELIM)configs$(DELIM)z8f64200100kit$(DELIM)ostest$(DELIM)ostest.linkcmd + +# Tool names/pathes + +CROSSDEV = +CC = ez8cc.exe +CPP = gcc -E +LD = ez8link.exe +AS = ez8asm.exe +AR = ez8lib.exe + +# File extensions + +ASMEXT = .asm +OBJEXT = .obj +LIBEXT = .lib +EXEEXT = .hex + +# These are the macros that will be used in the NuttX make system +# to compile and assembly source files and to insert the resulting +# object files into an archive + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + +define PREPROCESS + @echo CPP: $1->$2 + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) "$(CC)" $(CFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define ASSEMBLE + $(Q) "$(AS)" $(AFLAGS) ${shell echo $1 | sed -e "s/\//\\/g"} +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define MOVEOBJ + $(call MOVEFILE, "$1.obj", "$2$(DELIM)$1.obj") + $(call MOVEFILE, "$1.lst", "$2$(DELIM)$1.lst") + $(call MOVEFILE, "$1.src", "$2$(DELIM)$1.src") +endef + +define ARCHIVE + @echo AR: $2 + $(Q) for %%G in ($(2)) do ( "$(AR)" $(ARFLAGS) $1=-+%%G ) +endef + +define CLEAN + $(Q) if exist *.obj (del /f /q *.obj) + $(Q) if exist *.src (del /f /q *.src) + $(Q) if exist *.lib (del /f /q *.lib) + $(Q) if exist *.hex (del /f /q *.hex) + $(Q) if exist *.lod (del /f /q *.lod) + $(Q) if exist *.lst (del /f /q *.lst) +endef + +else + +define PREPROCESS + @echo "CPP: $1->$2" + $(Q) "$(CPP)" $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + $(Q) (wfile=`cygpath -w "$1"`; "$(CC)" $(CFLAGS) $$wfile) +endef + +define ASSEMBLE + $(Q) (wfile=`cygpath -w "$1"`; "$(AS)" $(AFLAGS) $$wfile) +endef + +define ARCHIVE + $(Q) for __obj in $(2) ; do \ + echo "AR: $$__obj"; \ + "$(AR)" $(ARFLAGS) $1=-+$$__obj || { echo "$(AR) $1=-+$$__obj FAILED!" ; exit 1 ; } \ + done +endef + +define CLEAN + $(Q) rm -f *.obj *.src *.lib *.hex *.lod *.lst +endef +endif + +# Windows native host tool definitions + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + HOSTCC = mingw32-gcc.exe + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + HOSTEXEEXT = .exe + + # Windows-native host tools + + MKDEP = $(TOPDIR)\tools\mkdeps.exe --winnative +else + +# Linux/Cygwin host tool definitions + + HOSTCC = gcc + HOSTINCLUDES = -I. + HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe + HOSTLDFLAGS = + + # This is the tool to use for dependencies (i.e., none) + + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh + + # ZDS-II cannot follow Cygwin soft links, so we will have to use directory copies + + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh +endif diff --git a/configs/z8f64200100kit/ostest/README.txt b/configs/z8f64200100kit/ostest/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..6af9a8e76e8cbd9b22aa2218c38fc94595644b1f --- /dev/null +++ b/configs/z8f64200100kit/ostest/README.txt @@ -0,0 +1,12 @@ +README.txt +^^^^^^^^^^ + +ostest.zfpproj is a simple ZDS-II project that will allow you + to use the ZDS-II debugger. Before using, copy the following + files from the toplevel directory: + + nuttx.hex, nuttx.map, nuttx.lod + + to this directory as: + + ostest.hex, ostest.map, ostest.lod diff --git a/configs/z8f64200100kit/ostest/defconfig b/configs/z8f64200100kit/ostest/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ed522a5bb1d161015b0ce460dc491ada0e0c3b82 --- /dev/null +++ b/configs/z8f64200100kit/ostest/defconfig @@ -0,0 +1,671 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +# CONFIG_DEBUG_VERBOSE is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_AUDIO is not set +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_DEBUG_SYMBOLS is not set +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +# CONFIG_DEBUG_NOOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +CONFIG_ARCH_Z80=y +CONFIG_ARCH="z80" +CONFIG_ARCH_CHIP="z8" +# CONFIG_ARCH_CHIP_Z80 is not set +# CONFIG_ARCH_CHIP_Z8018006VSG is not set +# CONFIG_ARCH_CHIP_Z8018010VSG is not set +# CONFIG_ARCH_CHIP_Z8018008VSG is not set +# CONFIG_ARCH_CHIP_Z8018010FSG is not set +# CONFIG_ARCH_CHIP_Z8018008VEG is not set +# CONFIG_ARCH_CHIP_Z8018006VEG is not set +# CONFIG_ARCH_CHIP_Z8018006PSG is not set +# CONFIG_ARCH_CHIP_Z8018008FSG is not set +# CONFIG_ARCH_CHIP_Z8018010PSG is not set +# CONFIG_ARCH_CHIP_Z8018006PEG is not set +# CONFIG_ARCH_CHIP_Z8018010VEG is not set +# CONFIG_ARCH_CHIP_Z8018010PEG is not set +# CONFIG_ARCH_CHIP_Z8018008PSG is not set +# CONFIG_ARCH_CHIP_Z8018006FSG is not set +# CONFIG_ARCH_CHIP_Z8018000XSO is not set +# CONFIG_ARCH_CHIP_Z8018010FEG is not set +# CONFIG_ARCH_CHIP_Z8018000WSO is not set +# CONFIG_ARCH_CHIP_Z8018008PEG is not set +# CONFIG_ARCH_CHIP_Z8018110FEG is not set +# CONFIG_ARCH_CHIP_Z8018233FSG is not set +# CONFIG_ARCH_CHIP_Z8018220AEG is not set +# CONFIG_ARCH_CHIP_Z8018216FSG is not set +# CONFIG_ARCH_CHIP_Z8018216ASG is not set +# CONFIG_ARCH_CHIP_Z8018233ASG is not set +# CONFIG_ARCH_CHIP_Z8019520FSG is not set +# CONFIG_ARCH_CHIP_Z8019533FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020VSG is not set +# CONFIG_ARCH_CHIP_Z8L18020FSG is not set +# CONFIG_ARCH_CHIP_Z8L18020PSG is not set +# CONFIG_ARCH_CHIP_Z8L18220ASG is not set +# CONFIG_ARCH_CHIP_Z8L18220FSG is not set +# CONFIG_ARCH_CHIP_Z8L18220AEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020VSG1960 is not set +# CONFIG_ARCH_CHIP_Z8S18033VSG is not set +# CONFIG_ARCH_CHIP_Z8S18010FSG is not set +# CONFIG_ARCH_CHIP_Z8S18010VEG is not set +# CONFIG_ARCH_CHIP_Z8S18020VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010VSG is not set +# CONFIG_ARCH_CHIP_Z8S18020PSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033FEG is not set +# CONFIG_ARCH_CHIP_Z8S18020FSG is not set +# CONFIG_ARCH_CHIP_Z8S18033VEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PSG is not set +# CONFIG_ARCH_CHIP_Z8S18020FEG is not set +# CONFIG_ARCH_CHIP_Z8S18010PEG is not set +# CONFIG_ARCH_CHIP_Z8S18010FEG is not set +# CONFIG_ARCH_CHIP_Z8F6403 is not set +CONFIG_ARCH_CHIP_Z8F6423=y +# CONFIG_ARCH_CHIP_EZ80F91 is not set +# CONFIG_ARCH_CHIP_EZ80F92 is not set +# CONFIG_ARCH_CHIP_EZ80F93 is not set +CONFIG_ARCH_CHIP_Z8F642X=y +CONFIG_ARCH_CHIP_Z8=y +CONFIG_HAVE_LOWSERIALINIT=y +CONFIG_Z8_UART0=y +CONFIG_Z8_UART1=y +CONFIG_Z8_TOOLCHAIN_ZDSII=y +# CONFIG_Z8_ZDSII_V500 is not set +CONFIG_Z8_ZDSII_V522=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +CONFIG_ENDIAN_BIG=y +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=1250 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_Z8F64200100KIT=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="z8f64200100kit" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +# CONFIG_ARCH_LEDS is not set + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=17 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=8 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=0 +CONFIG_NFILE_STREAMS=0 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_MODULE is not set + +# +# Work queue support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=256 +CONFIG_USERMAIN_STACKSIZE=256 +CONFIG_PTHREAD_STACK_MIN=128 +CONFIG_PTHREAD_STACK_DEFAULT=256 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=0 +CONFIG_UART0_TXBUFSIZE=0 +CONFIG_UART0_BAUD=57600 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=0 +CONFIG_UART1_TXBUFSIZE=0 +CONFIG_UART1_BAUD=57600 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_UART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_HAVE_HEAP2=y +CONFIG_HEAP2_BASE=0x00000000 +CONFIG_HEAP2_SIZE=0 +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=256 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/z8f64200100kit/ostest/ostest.linkcmd b/configs/z8f64200100kit/ostest/ostest.linkcmd new file mode 100644 index 0000000000000000000000000000000000000000..87ea00085e4d8ed2658b6b5be5fc253ad3f98d19 --- /dev/null +++ b/configs/z8f64200100kit/ostest/ostest.linkcmd @@ -0,0 +1,80 @@ +/****************************************************************************/ +/* configs/z8f64200100kit/ostest/ostest.linkcmd */ +/* */ +/* Copyright (C) 2008 Gregory Nutt. All rights reserved. */ +/* Author: Gregory Nutt */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* 1. Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* 2. Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in */ +/* the documentation and/or other materials provided with the */ +/* distribution. */ +/* 3. Neither the name NuttX nor the names of its contributors may be */ +/* used to endorse or promote products derived from this software */ +/* without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ +/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ +/* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS */ +/* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE */ +/* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */ +/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, */ +/* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS */ +/* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED */ +/* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT */ +/* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN */ +/* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */ +/* POSSIBILITY OF SUCH DAMAGE. */ +/* */ +/****************************************************************************/ + +-FORMAT=OMF695,INTEL32 +-map -maxhexlen=64 -quiet -sort NAME=ascending -unresolved=fatal +-NOwarnoverlap -NOxref -warn -debug -NOigcase -quiet + +RANGE ROM $0 : $FFFF +RANGE RDATA $20 : $FF +RANGE EDATA $100 : $EFF +RANGE PRAM FORBIDDEN + +CHANGE TEXT=EDATA +CHANGE TEXT=FAR_DATA +change NEAR_TXT=NEAR_DATA +change FAR_TXT=FAR_DATA +ORDER FAR_BSS, FAR_DATA +ORDER NEAR_BSS,NEAR_DATA +COPY NEAR_DATA ROM +COPY FAR_DATA ROM + +define _low_near_romdata = copy base of NEAR_DATA +define _low_neardata = base of NEAR_DATA +define _len_neardata = length of NEAR_DATA +define _low_far_romdata = copy base of FAR_DATA +define _low_fardata = base of FAR_DATA +define _len_fardata = length of FAR_DATA +define _low_nearbss = base of NEAR_BSS +define _len_nearbss = length of NEAR_BSS +define _low_farbss = base of FAR_BSS +define _len_farbss = length of FAR_BSS +define _far_stacktop = highaddr of EDATA +define _near_stack = highaddr of RDATA +define _far_heapbot = top of EDATA +define _near_heaptop = highaddr of RDATA +define _near_heapbot = top of RDATA +define _low_pramseg = base of PRAMSEG +define _len_pramseg = length of PRAMSEG +define _low_pram_romdata = copy base of PRAMSEG +define _READ_NVDS=$1000 +define _WRITE_NVDS=$10B3 +define _READ_NVDS_GET_STATUS=$1000 +define _WRITE_NVDS_GET_STATUS=$10B3 +/* Set frequency to 18432000 Hz */ +define __user_frequency = 18432000 + +/* arch/z80/src/Makefile.zdsii will append target, object and library paths below */ + diff --git a/configs/z8f64200100kit/ostest/ostest.zdsproj b/configs/z8f64200100kit/ostest/ostest.zdsproj new file mode 100644 index 0000000000000000000000000000000000000000..d46a19859b4f621098be05ec096e8ffea9b30fd3 --- /dev/null +++ b/configs/z8f64200100kit/ostest/ostest.zdsproj @@ -0,0 +1,291 @@ + +Z8F6403 + + + +.\zsldevinit.asm +..\..\..\nuttx.hex + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +000000000000 +000000000000 +0 + + +000000000000 +000000000000 +0 + + +000000000000 +000000000000 +0 + + +000000000000 +000000000000 +0 + + + + \ No newline at end of file diff --git a/configs/z8f64200100kit/ostest/setenv.sh b/configs/z8f64200100kit/ostest/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..825bd50daecc77ef546572666bae558c3ed3da1b --- /dev/null +++ b/configs/z8f64200100kit/ostest/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/z8f64200100kit/ostest/setenv.sh +# +# Copyright (C) 2008, 2009, 2012, 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# Check how we were executed +# +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# +# This is the Cygwin path to location where the XDS-II tools were installed +# +# TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_Z8Encore!_5.0.0/bin" +TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/ZiLOG/ZDSII_Z8Encore!_5.2.2/bin" + +# +# Add the path to the toolchain to the PATH varialble. NOTE that /bin and /usr/bin +# preceded the toolchain bin directory. This is because the ZDSII bin directory +# includes binaries like make.exe that will interfere with the normal build process +# if we do not give priority to the versions at /bin and /usr/bin. +# +export PATH="/bin:/usr/bin:${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" +echo "PATH : ${PATH}" diff --git a/configs/z8f64200100kit/ostest/test-result.txt b/configs/z8f64200100kit/ostest/test-result.txt new file mode 100644 index 0000000000000000000000000000000000000000..ebf178439d08532d6246ad537c2c4e3ee54befce --- /dev/null +++ b/configs/z8f64200100kit/ostest/test-result.txt @@ -0,0 +1,529 @@ +This is the output from the z16f target from January 31, 2008 +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +While all tests pass per this output, my impression is that some +of the timed delays in during execution of the test were not +correct and I suspect some system timing issues. + +stdio_test: write fd=1 +stdio_test: write fd=2 +stdio_test: Standard I/O Check: printf +user_start: putenv(Variable1=BadValue3) +user_start: setenv(Variable1, GoodValue1, TRUE) +user_start: setenv(Variable2, BadValue1, FALSE) +user_start: setenv(Variable2, GoodValue2, TRUE) +user_start: setenv(Variable3, Variable3, FALSE) +user_start: setenv(Variable3, Variable3, FALSE) +show_variable: Variable=Variable1 has value=GoodValue1 +show_variable: Variable=Variable2 has value=GoodValue2 +show_variable: Variable=Variable3 has value=GoodValue3 +user_start: Started user_main at PID=2 +stdio_test: Standard I/O Check: fprintf to stderr + +user_main: Begin argument test +user_main: Started with argc=5 +user_main: argv[0]="" +user_main: argv[1]="Arg1" +user_main: argv[2]="Arg2" +user_main: argv[3]="Arg3" +user_main: argv[4]="Arg4" + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 2 2 +mxordblk 76b20 76b20 +uordblks 33d0 33d0 +fordblks 78180 78180 +show_variable: Variable=Variable1 has value=GoodValue1 +show_variable: Variable=Variable2 has value=GoodValue2 +show_variable: Variable=Variable3 has value=GoodValue3 +show_variable: Variable=Variable1 has no value +show_variable: Variable=Variable2 has value=GoodValue2 +show_variable: Variable=Variable3 has value=GoodValue3 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 2 3 +mxordblk 76b20 76b20 +uordblks 33d0 33c0 +fordblks 78180 78190 +show_variable: Variable=Variable1 has no value +show_variable: Variable=Variable2 has no value +show_variable: Variable=Variable3 has no value + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 33c0 3380 +fordblks 78190 781d0 + +user_main: /dev/null test +dev_null: Read 0 bytes from /dev/null +dev_null: Wrote 1024 bytes to /dev/null + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: mutex test +Initializing mutex +Starting thread 1 +Starting thread 2 + Thread1 Thread2 + Loops 32 32 + Errors 0 0 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: cancel test +cancel_test: Test 1: Normal Cancelation +cancel_test: Starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +cancel_test: waiter exited with result=ffffffff +cancel_test: PASS thread terminated with PTHREAD_CANCELED +cancel_test: Test 2: Cancelation of detached thread +cancel_test: Re-starting thread +restart_thread: Destroying cond +restart_thread: Destroying mutex +restart_thread: Re-starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +cancel_test: PASS pthread_join failed with status=ESRCH +cancel_test: Test 3: Non-cancelable threads +cancel_test: Re-starting thread (non-cancelable) +restart_thread: Destroying cond +restart_thread: Destroying mutex +restart_thread: Re-starting thread +start_thread: Initializing mutex +start_thread: Initializing cond +start_thread: Starting thread +thread_waiter: Taking mutex +thread_waiter: Starting wait for condition +thread_waiter: Setting non-cancelable +start_thread: Yielding +cancel_test: Canceling thread +cancel_test: Joining +thread_waiter: Releasing mutex +thread_waiter: Setting cancelable +cancel_test: waiter exited with result=ffffffff +cancel_test: PASS thread terminated with PTHREAD_CANCELED + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: semaphore test +sem_test: Initializing semaphore to 0 +sem_test: Starting waiter thread 1 +sem_test: Set thread 1 priority to 191 +waiter_func: Thread 1 Started +waiter_func: Thread 1 initial semaphore value = 0 +waiter_func: Thread 1 waiting on semaphore +sem_test: Starting waiter thread 2 +sem_test: Set thread 2 priority to 128 +waiter_func: Thread 2 Started +waiter_func: Thread 2 initial semaphore value = -1 +waiter_func: Thread 2 waiting on semaphore +sem_test: Starting poster thread 3 +sem_test: Set thread 3 priority to 64 +poster_func: Thread 3 started +poster_func: Thread 3 semaphore value = -2 +poster_func: Thread 3 posting semaphore +waiter_func: Thread 1 awakened +waiter_func: Thread 1 new semaphore value = -1 +waiter_func: Thread 1 done +poster_func: Thread 3 new semaphore value = -1 +poster_func: Thread 3 semaphore value = -1 +poster_func: Thread 3 posting semaphore +waiter_func: Thread 2 awakened +waiter_func: Thread 2 new semaphore value = 0 +waiter_func: Thread 2 done +poster_func: Thread 3 new semaphore value = 0 +poster_func: Thread 3 done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: condition variable test +cond_test: Initializing mutex +cond_test: Initializing cond +cond_test: Starting waiter +cond_test: Set thread 1 priority to 128 +waiter_thread: Started +cond_test: Starting signaler +cond_test: Set thread 2 priority to 64 +thread_signaler: Started +thread_signaler: Terminating +cond_test: signaler terminated, now cancel the waiter +cond_test: Waiter Signaler +cond_test: Loops 32 32 +cond_test: Errors 0 0 +cond_test: +cond_test: 0 times, waiter did not have to wait for data +cond_test: 0 times, data was already available when the signaler run +cond_test: 0 times, the waiter was in an unexpected state when the signaler ran + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: timed wait test +thread_waiter: Initializing mutex +timedwait_test: Initializing cond +timedwait_test: Starting waiter +timedwait_test: Set thread 2 priority to 177 +thread_waiter: Taking mutex +thread_waiter: Starting 5 second wait for condition +timedwait_test: Joining +tcb=0x8057d0 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf7a +rtcb=8057d0 sigdeliver=13046 sigpendactionq.head=0 +Resuming +thread_waiter: pthread_cond_timedwait timed out +thread_waiter: Releasing mutex +thread_waiter: Exit with status 0x12345678 +timedwait_test: waiter exited with result=12345678 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: message queue test +mqueue_test: Starting receiver +mqueue_test: Set receiver priority to 128 +receiver_thread: Starting +mqueue_test: Starting sender +mqueue_test: Set sender thread priority to 64 +mqueue_test: Waiting for sender to complete +sender_thread: Starting +receiver_thread: mq_receive succeeded on msg 0 +sender_thread: mq_send succeeded on msg 0 +receiver_thread: mq_receive succeeded on msg 1 +sender_thread: mq_send succeeded on msg 1 +receiver_thread: mq_receive succeeded on msg 2 +sender_thread: mq_send succeeded on msg 2 +receiver_thread: mq_receive succeeded on msg 3 +sender_thread: mq_send succeeded on msg 3 +receiver_thread: mq_receive succeeded on msg 4 +sender_thread: mq_send succeeded on msg 4 +receiver_thread: mq_receive succeeded on msg 5 +sender_thread: mq_send succeeded on msg 5 +receiver_thread: mq_receive succeeded on msg 6 +sender_thread: mq_send succeeded on msg 6 +receiver_thread: mq_receive succeeded on msg 7 +sender_thread: mq_send succeeded on msg 7 +receiver_thread: mq_receive succeeded on msg 8 +sender_thread: mq_send succeeded on msg 8 +receiver_thread: mq_receive succeeded on msg 9 +sender_thread: mq_send succeeded on msg 9 +sender_thread: returning ntcb=0x8057d0 sigdeliver=0x13046 +rtcb=0x806e30 current_regs=0x0 +rtcb=8057d0 sigdeliver=13046 sigpendactionq.head=0 +Resuming +errors=0 +mqueue_test: Killing receiver +receiver_thread: mq_receive interrupted! +receiver_thread: returning nerrors=0 +mqueue_test: Canceling receiver +mqueue_test: receiver has already terminated + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: timed message queue test +timedmqueue_test: Starting sender +sender_thread: Starting +sender_thread: mq_timedsend succeeded on msg 0 +sender_thread: mq_timedsend succeeded on msg 1 +timedmqueue_test: Waiting for sender to complete +sender_thread: mq_timedsend succeeded on msg 2 +sender_thread: mq_timedsend succeeded on msg 3 +sender_thread: mq_timedsend succeeded on msg 4 +sender_thread: mq_timedsend succeeded on msg 5 +sender_thread: mq_timedsend succeeded on msg 6 +sender_thread: mq_timedsend succeeded on msg 7 +sender_thread: mq_timedsend succeeded on msg 8 +sender_thread: mq_timedsend 9 timed out as expected +sender_thread: returning nerrors=0 +timedmqueue_test: Starting receiver +receiver_thread: Starting +receiver_thread: mq_timedreceive succeeded on msg 0 +receiver_thread: mq_timedreceive succeeded on msg 1 +receiver_thread: mq_timedreceive succeeded on msg 2 +receiver_thread: mq_timedreceive succeeded on msg 3 +timedmqueue_test: Waiting for receiver to complete +receiver_thread: mq_timedreceive succeeded on msg 4 +receiver_thread: mq_timedreceive succeeded on msg 5 +receiver_thread: mq_timedreceive succeeded on msg 6 +receiver_thread: mq_timedreceive succeeded on msg 7 +receiver_thread: mq_timedreceive succeeded on msg 8 +receiver_thread: Receive 9 timed out as expected +receiver_thread: returning nerrors=0 +timedmqueue_test: Test complete + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 3 +mxordblk 76b20 76b20 +uordblks 3380 3380 +fordblks 781d0 781d0 + +user_main: signal handler test +sighand_test: Initializing semaphore to 0 +sighand_test: Starting waiter task +sighand_test: Started waiter_main pid=20 +waiter_main: Waiter started +waiter_main: Unmasking signal 17 +waiter_main: Registering signal handler +waiter_main: oact.sigaction=0 oact.sa_flags=0 oact.sa_mask=0 +waiter_main: Waiting on semaphore +tcb=0x8057d0 sigdeliver=0x13046 +rtcb=0x806e30 current_regs=0x0 +sighand_test: Signaling pid=20 with signo=17 sigvalue=42 +rtcb=8057d0 sigdeliver=13046 sigpendactionq.head=804b10 +Resuming +wakeup_action: Received signal 17 +wakeup_action: sival_int=42 +wakeup_action: si_code=1 +wakeup_action: ucontext=0 +waiter_main: sem_wait() successfully interrupted by signal +waiter_main: done +sighand_test: done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 3 4 +mxordblk 76b20 76b20 +uordblks 3380 35c0 +fordblks 781d0 77f90 + +user_main: POSIX timer test +timer_test: Initializing semaphore to 0 +timer_test: Unmasking signal 17 +timer_test: Registering signal handler +timer_test: oact.sigaction=0 oact.sa_flags=0 oact.sa_mask=0 +timer_test: Creating timer +timer_test: Starting timer +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf7a +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b23 +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=1 +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf7a +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b36 +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=2 +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf7a +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b49 +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=3 +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf76 +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b5c +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=4 +timer_test: Waiting on semaphore +tcb=0x806e30 sigdeliver=0x13046 +rtcb=0x8000c8 current_regs=0xffffbf66 +rtcb=806e30 sigdeliver=13046 sigpendactionq.head=804b6f +Resuming +timer_expiration: Received signal 17 +timer_expiration: sival_int=42 +timer_expiration: si_code=2 (SI_TIMER) +timer_expiration: ucontext=0 +timer_test: sem_wait() successfully interrupted by signal +timer_test: g_nsigreceived=5 +timer_test: Deleting timer +timer_test: done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 4 4 +mxordblk 76b20 76b20 +uordblks 35c0 35c0 +fordblks 77f90 77f90 + +user_main: round-robin scheduler test +rr_test: Starting sieve1 thread +rr_test: Set thread priority to 1 +rr_test: Set thread policty to SCHED_RR +rr_test: Starting sieve1 thread +sieve1 started +rr_test: Waiting for sieves to complete -- this should take awhile +rr_test: If RR scheduling is working, they should start and complete at +rr_test: about the same time +sieve2 started +sieve1 finished +sieve2 finished +rr_test: Done + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 4 4 +mxordblk 76b20 76b20 +uordblks 35c0 35c0 +fordblks 77f90 77f90 + +user_main: barrier test +barrier_test: Initializing barrier +barrier_func: Thread 0 started +barrier_test: Thread 0 created +barrier_func: Thread 1 started +barrier_test: Thread 1 created +barrier_func: Thread 2 started +barrier_test: Thread 2 created +barrier_func: Thread 3 started +barrier_test: Thread 3 created +barrier_func: Thread 0 calling pthread_barrier_wait() +barrier_func: Thread 1 calling pthread_barrier_wait() +barrier_func: Thread 2 calling pthread_barrier_wait() +barrier_func: Thread 4 started +barrier_test: Thread 4 created +barrier_func: Thread 3 calling pthread_barrier_wait() +barrier_func: Thread 4 calling pthread_barrier_wait() +barrier_func: Thread 5 started +barrier_test: Thread 5 created +barrier_func: Thread 6 started +barrier_test: Thread 6 created +barrier_func: Thread 7 started +barrier_test: Thread 7 created +barrier_func: Thread 5 calling pthread_barrier_wait() +barrier_func: Thread 6 calling pthread_barrier_wait() +barrier_func: Thread 7 calling pthread_barrier_wait() +barrier_func: Thread 7, back with status=PTHREAD_BARRIER_SERIAL_THREAD (I AM SPECIAL) +barrier_func: Thread 0, back with status=0 (I am not special) +barrier_func: Thread 1, back with status=0 (I am not special) +barrier_func: Thread 2, back with status=0 (I am not special) +barrier_func: Thread 3, back with status=0 (I am not special) +barrier_func: Thread 4, back with status=0 (I am not special) +barrier_func: Thread 5, back with status=0 (I am not special) +barrier_func: Thread 6, back with status=0 (I am not special) +barrier_func: Thread 2 done +barrier_func: Thread 7 done +barrier_func: Thread 0 done +barrier_func: Thread 1 done +barrier_func: Thread 6 done +barrier_func: Thread 3 done +barrier_func: Thread 4 done +barrier_func: Thread 5 done +barrier_test: Thread 0 completed with result=0 +barrier_test: Thread 1 completed with result=0 +barrier_test: Thread 2 completed with result=0 +barrier_test: Thread 3 completed with result=0 +barrier_test: Thread 4 completed with result=0 +barrier_test: Thread 5 completed with result=0 +barrier_test: Thread 6 completed with result=0 +barrier_test: Thread 7 completed with result=0 + +End of test memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 4 4 +mxordblk 76b20 76b20 +uordblks 35c0 35c0 +fordblks 77f90 77f90 + +Final memory usage: +VARIABLE BEFORE AFTER +======== ======== ======== +arena 7b550 7b550 +ordblks 2 4 +mxordblk 76b20 76b20 +uordblks 33d0 35c0 +fordblks 78180 77f90 +user_main: Exitting + diff --git a/configs/z8f64200100kit/scripts/setenv.bat b/configs/z8f64200100kit/scripts/setenv.bat new file mode 100644 index 0000000000000000000000000000000000000000..e0526d988a8aa273acde25ccc756eed8f05bdc90 --- /dev/null +++ b/configs/z8f64200100kit/scripts/setenv.bat @@ -0,0 +1,50 @@ +@echo off + +rem configs/z8f64200100kit/scripts/setenv.bat +rem +rem Copyright (C) 2012 Gregory Nutt. All rights reserved. +rem Author: Gregory Nutt +rem +rem Redistribution and use in source and binary forms, with or without +rem modification, are permitted provided that the following conditions +rem are met: +rem +rem 1. Redistributions of source code must retain the above copyright +rem notice, this list of conditions and the following disclaimer. +rem 2. Redistributions in binary form must reproduce the above copyright +rem notice, this list of conditions and the following disclaimer in +rem the documentation and/or other materials provided with the +rem distribution. +rem 3. Neither the name NuttX nor the names of its contributors may be +rem used to endorse or promote products derived from this software +rem without specific prior written permission. +rem +rem THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +rem "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +rem LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +rem FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +rem COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +rem INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +rem BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +rem OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +rem AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +rem LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +rem ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +rem POSSIBILITY OF SUCH DAMAGE. + +rem This is the location where I installed in the MinGW compiler. With +rem this configuration, it is recommended that you do NOT install the +rem MSYS tools; they conflict with the GNUWin32 tools. See +rem http://www.mingw.org/ for further info. + +set PATH=C:\MinGW\bin;%PATH% + +rem This is the location where I installed the ZDS-II toolchain. + +set PATH=C:\Program Files (x86)\ZiLOG\ZDSII_Z8Encore!_5.0.0\bin;%PATH% + +rem This is the location where I installed the GNUWin32 tools. See +rem http://gnuwin32.sourceforge.net/. + +set PATH=C:\gnuwin32\bin;%PATH% +echo %PATH% diff --git a/configs/z8f64200100kit/src/.gitignore b/configs/z8f64200100kit/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..b268f1933d708a67c74e5ee0c84ab7447e0ee575 --- /dev/null +++ b/configs/z8f64200100kit/src/.gitignore @@ -0,0 +1,4 @@ +/Make.dep +/.depend +/*.obj + diff --git a/configs/z8f64200100kit/src/Makefile b/configs/z8f64200100kit/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..9aa595da2316d65bcceb79897f64fb1981008f16 --- /dev/null +++ b/configs/z8f64200100kit/src/Makefile @@ -0,0 +1,41 @@ +############################################################################ +# configs/z8f64200100kit/Makefile +# +# Copyright (C) 2008, 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = z8_lowinit.c z8_leds.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/z8f64200100kit/src/z8_leds.c b/configs/z8f64200100kit/src/z8_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..40a641a242f7d0c59fc9d1050263798b7528dccd --- /dev/null +++ b/configs/z8f64200100kit/src/z8_leds.c @@ -0,0 +1,91 @@ +/**************************************************************************** + * configs/z8f64200100kit/src/z8_leds.c + * + * Copyright (C) 2008-2009, 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "up_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ +} +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/z8f64200100kit/src/z8_lowinit.c b/configs/z8f64200100kit/src/z8_lowinit.c new file mode 100644 index 0000000000000000000000000000000000000000..0a56359e3f64af3ce02ef48747d0ebc9af81eb8a --- /dev/null +++ b/configs/z8f64200100kit/src/z8_lowinit.c @@ -0,0 +1,66 @@ +/**************************************************************************** + * configs/z8f64200100kit/src/z8_lowinit.c + * + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Based upon sample code included with the Zilog ZDS-II toolchain. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "chip/chip.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static void z8_gpioinit(void) +{ +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void z8_lowinit(void) +{ + z8_gpioinit(); +} + diff --git a/configs/zkit-arm-1769/Kconfig b/configs/zkit-arm-1769/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..1f5a2bb3e442272f2a1403a16f190ddc07752380 --- /dev/null +++ b/configs/zkit-arm-1769/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_ZKITARM +endif diff --git a/configs/zkit-arm-1769/README.txt b/configs/zkit-arm-1769/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..7c27c53144750e63841457d07f37ae449d227400 --- /dev/null +++ b/configs/zkit-arm-1769/README.txt @@ -0,0 +1,575 @@ +README +^^^^^^ + +README for NuttX port to the Zilogic's ZKIT-ARM-1769 [NXP-LPC1769] +board. + +Contents +^^^^^^^^ + + ZKit-ARM LPC1769 Board + Development Environment + GNU Toolchain Options + NuttX buildroot Toolchain + LEDs + ZKit-ARM Configuration Options + Configurations + +Zilogic's ZKit-ARM-1769 Board +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + Pin Description On Board Connector + -------------------------------- ---------------- ------------- + P0.0/RD1/TXD3/SDA1 RD1 CAN1 + P0.1/TD1/RXD3/SCL1 TD1 + P0.2/TXD0/AD0.7 TXD0 COM0 + P0.3/RXD0/AD0.6 RXD0 + P0.4/I2SRX_CLK/RD2/CAP2.0 GPIO0 + P0.5/I2SRX_WS/TD2/CAP2.1 GPIO1 + P0.6/I2SRX_SDA/SSEL1/MAT2.0 SSEL1 SPI + P0.7/I2STX_CLK/SCK1/MAT2.1 SCK1 + P0.8/I2STX_WS/MISO1/MAT2.2 MISO1 + P0.9/I2STX_SDA/MOSI1/MAT2.3 MOSI1 + P0.10/TXD2/SDA2/MAT3.0 TXD2 COM2 + P0.11/RXD2/SCL2/MAT3.1 RXD2 + P0.15/TXD1/SCK0/SCK SD-SCK + P0.16/RXD1/SSEL0/SSEL SD-SSEL SD-CARD + P0.17/CTS1/MISO0/MISO SD-MISO + P0.18/DCD1/M0SI0/MOSI SD-MOSI + P0.19/DSR1/SDA1 LED1 + P0.20/DTR1/SCL1 DTR1 COM1 + P0.21/RI1/RD1 NC LED2 + P0.22/RTS1/TD1 RTS1 COM1 + P0.23/AD0.0/I2SRX_CLK/CAP3.0 AD0 + P0.24/AD0.1/I2SRX_WS/CAP3.1 AD1 AIN + P0.25/AD0.2/I2SRX_SDA/TXD3 AD2 + P0.26/AD0.3/AOUT/RXD3 AD3 + P0.27/SDA0/USB_SDA SDA0 I2C0 + P0.28/SCL0/USB_SCL SCL0 + P0.29/USB_D+ USB-D+ USB + P0.30/USB_D- USB-D- + + P1.0/ENET_TXD0 ETH-TXD0 + P1.1/ENET_TXD1 ETH-TXD1 + P1.4/ENET_TX_EN ETH-TXEN + P1.8/ENET_CRS ETH-CRS + P1.9/ENET_RXD0 ETH-RXD0 ETH + P1.10/ENET_RXD1 ETH-RXD1 + P1.14/ENET_RX_ER ETH-RXER + P1.15/ENET_REF_CLK ETH-REFCLK + P1.16/ENET_MDC ETH-MDC + P1.17/ENET_MDIO ETH-MDIO + P1.18/USB_UP_LED/PWM1.1/CAP1.0 USB-UP-LED + P1.19/MCOA0/nUSB_PPWR/CAP1.1 KEY1 + P1.20/MCFB0/PWM1.2/SCK0 LCD-SCK + P1.21/MCABORT/PWM1.3/SSEL0 LCD-SSEL + P1.22/MCOB0/USB_PWRD/MAT1.0 LCD-A0 LCD + P1.23/MCFB1/PWM1.4/MISO0 NC + P1.24/MCFB2/PWM1.5/MOSI0 LCD_MOSI + P1.25/MCOA1/MAT1.1 LCD-RST + P1.26/MCOB1/PWM1.6/CAP0.0 LCD-AO + P1.27/CLKOUT/nUSB_OVRCR/CAP0.1 KEY2 + P1.28/MCOA2/MAT0.0 KEY3 + P1.29/MCOB2/PCAP1.1/MAT0.1 CAP1 PWM-CON + P1.30/VBUS/AD0.4 VBUS USB + P1.31/SCK1/AD0.5 KEY4 + + P2.0/PWM1.1/TXD1 TXD1 + P2.1/PWM1.2/RXD1 RXD1 COM1 + P2.2/PWM1.3/CTS1/TRACEDATA3 CTS1 + P2.3/PWM1.4/DCD1/TRACEDATA2 PWM4 + P2.4/PWM1.5/DSR1/TRACEDATA1 PWM5 PWM + P2.5/PWM1.6/DTR1/TRACEDATA0 PWM6 + P2.6/PCAP1.0/RI1/TRACECLK CAP0 + P2.7/RD2/RTS1 RD2 CAN2 + P2.8/TD2/TXD2 TD2 + P2.9/USB_CONNECT/RXD2 USB_CONNECT USB + P2.10/nEINT0/NMI ISP + P2.11/nEINT1/I2STX_CLK INT1 I2C + P2.12/nEINT2/I2STX_WS SD-DET SD-CARD + P2.13/nEINT3/I2STX_SDA KEY5 + + P3.25/MAT0.0/PWM1.2 PWM2 PWM + P3.26/STCLK/MAT0.1/PWM1.3 PWM3 + + P4.28/RX_MCLK/MAT2.0/TXD3 GPIO2 SPI + P4.28/RX_MCLK/MAT2.0/TXD3 GPIO3 + +Zilogic's ZKit-ARM-1769 Board +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +SD Slot +------- + + Board LPC1768 + SD Signal Pin + --- ----------- ---------- + CS SD-SSEL P0.16 SSEL0 + DIN SD-MOSI P0.18 MOSI0 + DOUT SD-MISO P0.17 MISO0 + CLK SD-SCK P0.15 SCK0 + CD SD-DET P2.12 + +USB Device +---------- + + Board LPC1768 + Signal Pin + ----------------- ----------------- + USB_CONNECT P2.9 USB_CONNECT + USB_DM P0.29 USB_D- + USB_DP P0.30 USB_D+ + USB_VBUS P1.30 USB_VBUS + USB_UPLED P1.18 USB_UPLED + +128x64 LCD with SPI interface +--------------------------------------- + The LCD display is connected to the SPI-bus. + + ZKit-ARM Signals + + ----------------------------+--------------- ------------------------------------------- + LPC1758 Pin | Board Signal Description + ----------------------------+--------------- ------------------------------------------- + P1.20/MCFB0/PWM1.2/SCK0 | LCD-SCK LCD Clock signal (D6) + P1.21/MCABORT/PWM1.3/SSEL0 | LCD-SSEL LCD Chip Select (CSB) + P1.22/MCOB0/USB_PWRD/MAT1.0 | LCD-A0 LCD-A0 (A0) + P1.23/MCFB1/PWM1.4/MISO0 | N.C + P1.24/MCFB2/PWM1.5/MOSI0 | LCD-MOSI LCD Data (D7) + P1.25/MCOA1/MAT1.1 | LCD-RST LCD Reset (RSTB) - Resets Everything in LCD + ----------------------------+--------------- ------------------------------------------- + +Development Environment +^^^^^^^^^^^^^^^^^^^^^^^ + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +^^^^^^^^^^^^^^^^^^^^^ + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The Code Red GNU toolchain + 2. The CodeSourcery GNU toolchain, + 3. The devkitARM GNU toolchain, + 4. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the Code Red toolchain and the + make system is setup to default to use the Code Red Linux toolchain. To use + the other toolchain, you simply need add one of the following configuration + options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y : Code Red toolchain under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain + + You may also have to modify the PATH in the setenv.h file if your make cannot + find the tools. + + NOTE: the CodeSourcery (for Windows), devkitARM, and Code Red (for Windoes) + are Windows native toolchains. The CodeSourcey (for Linux), Code Red (for Linux) + and NuttX buildroot toolchains are Cygwin and/or Linux native toolchains. There + are several limitations to using a Windows based toolchain in a Cygwin + environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +NuttX buildroot Toolchain +^^^^^^^^^^^^^^^^^^^^^^^^^ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/nuttx/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh zkit-arm-1769/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-4.3.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: The cortexm3-defconfig-4.3.3 produces an older-style is OABI toolchain. + There is another configuration, cortexm3-eabi-defconfig-4.6.3, that will + build a newer, EABI, toolchain. Unfortunately, the 4.6.3 EABI toolchain is + not compatible with the NXFLAT tools. See the top-level TODO file (under + "Binary loaders") for more information about this problem. If you plan to + use NXFLAT, please do not use the GCC 4.6.3 EABI toochain; instead use the + GCC 4.3.3 OABI toolchain. + +NXFLAT Toolchain +^^^^^^^^^^^^^^^^ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/nuttx/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh zkit-arm-1769/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LEDs +^^^^ + + If CONFIG_ARCH_LEDS is defined, then support for the ZKit-ARM LEDs will be + included in the build. See: + + - configs/zkit-arm-1769/include/board.h - Defines LED constants, types and + prototypes the LED interface functions. + + - configs/zkit-arm-1769/src/zkit-arm-1769.h - GPIO settings for the LEDs. + + - configs/zkit-arm-1769/src/up_leds.c - LED control logic. + + The ZKit-ARM LPC1768 has a single LEDs (there are more on the Embedded Artists + base board, but those are not controlled by NuttX). Usage this single LED by NuttX + is as follows: + + - The LED is not illuminated until the ZKit-ARM completes initialization. + + If the LED is stuck in the OFF state, this means that the ZKit-ARM did not + complete initializeation. + + - Each time the OS enters an interrupt (or a signal) it will turn the LED OFF and + restores its previous stated upon return from the interrupt (or signal). + + The normal state, after initialization will be a dull glow. The brightness of + the glow will be inversely related to the proportion of time spent within interrupt + handling logic. The glow may decrease in brightness when the system is very + busy handling device interrupts and increase in brightness as the system becomes + idle. + + Stuck in the OFF state suggests that that the system never completed + initialization; Stuck in the ON state would indicated that the system + intialialized, but is not takint interrupts. + + - If a fatal assertion or a fatal unhandled exception occurs, the LED will flash + strongly as a slow, 2Hz rate. + +ZKit-ARM Configuration Options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + General Architecture Settings: + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc17xx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LPC1768=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=zkit-arm-1769 + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_ZKITARM=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x10000000 + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + CONFIG_LPC17_MAINOSC=y + CONFIG_LPC17_PLL0=y + CONFIG_LPC17_PLL1=n + CONFIG_LPC17_ETHERNET=n + CONFIG_LPC17_USBHOST=n + CONFIG_LPC17_USBOTG=n + CONFIG_LPC17_USBDEV=n + CONFIG_LPC17_UART0=y + CONFIG_LPC17_UART1=n + CONFIG_LPC17_UART2=n + CONFIG_LPC17_UART3=n + CONFIG_LPC17_CAN1=n + CONFIG_LPC17_CAN2=n + CONFIG_LPC17_SPI=n + CONFIG_LPC17_SSP0=n + CONFIG_LPC17_SSP1=n + CONFIG_LPC17_I2C0=n + CONFIG_LPC17_I2C1=n + CONFIG_LPC17_I2S=n + CONFIG_LPC17_TMR0=n + CONFIG_LPC17_TMR1=n + CONFIG_LPC17_TMR2=n + CONFIG_LPC17_TMR3=n + CONFIG_LPC17_RIT=n + CONFIG_LPC17_PWM0=n + CONFIG_LPC17_MCPWM=n + CONFIG_LPC17_QEI=n + CONFIG_LPC17_RTC=n + CONFIG_LPC17_WDT=n + CONFIG_LPC17_ADC=n + CONFIG_LPC17_DAC=n + CONFIG_LPC17_GPDMA=n + CONFIG_LPC17_FLASH=n + + LPC17xx specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + LPC17xx specific CAN device driver settings. These settings all + require CONFIG_CAN: + + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined. + CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7 + + LPC17xx specific PHY/Ethernet device driver settings. These setting + also require CONFIG_NET and CONFIG_LPC17_ETHERNET. + + CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY + CONFIG_PHY_AUTONEG - Enable auto-negotion + CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. + CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex + + CONFIG_NET_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb + CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 18 + CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18 + CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented). + CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs + CONFIG_DEBUG. + CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets. + Also needs CONFIG_DEBUG. + CONFIG_NET_HASH - Enable receipt of near-perfect match frames. + CONFIG_LPC17_MULTICAST - Enable receipt of multicast (and unicast) frames. + Automatically set if CONFIG_NET_IGMP is selected. + + LPC17xx USB Device Configuration + + CONFIG_LPC17_USBDEV_FRAME_INTERRUPT + Handle USB Start-Of-Frame events. + Enable reading SOF from interrupt handler vs. simply reading on demand. + Probably a bad idea... Unless there is some issue with sampling the SOF + from hardware asynchronously. + CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT + Enable high priority interrupts. I have no idea why you might want to + do that + CONFIG_LPC17_USBDEV_NDMADESCRIPTORS + Number of DMA descriptors to allocate in SRAM. + CONFIG_LPC17_USBDEV_DMA + Enable lpc17xx-specific DMA support + CONFIG_LPC17_USBDEV_NOVBUS + Define if the hardware implementation does not support the VBUS signal + CONFIG_LPC17_USBDEV_NOLED + Define if the hardware implementation does not support the LED output + + LPC17xx USB Host Configuration (the ZKit-ARM does not support USB Host) + + CONFIG_USBHOST_OHCIRAM_SIZE + Total size of OHCI RAM (in AHB SRAM Bank 1) + CONFIG_USBHOST_NEDS + Number of endpoint descriptors + CONFIG_USBHOST_NTDS + Number of transfer descriptors + CONFIG_USBHOST_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_USBHOST_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_IOBUFSIZE + Size of one end-user I/O buffer. This can be zero if the + application can guarantee that all end-user I/O buffers + reside in AHB SRAM. + +Configurations +^^^^^^^^^^^^^^ + +Each ZKit-ARM configuration is maintained in a sudirectory and can be +selected as follow: + + cd tools + ./configure.sh zkit-arm-1769/ + cd - + . ./setenv.sh + +Where is one of the following: + + hello: + This builds an example application using apps/examples/hello. See + apps/examples/README.txt for information about the examples. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default toolchain: + + CONFIG_HOST_LINUX=y : Builds under Windows (or Cygwin) + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot toolchain + + thttpd: + This builds the THTTPD web server example using the THTTPD and + the apps/examples/thttpd application. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default toolchain: + + CONFIG_HOST_LINUX=y : Builds under Windows (or Cygwin) + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot toolchain + + 3. TCP/IP (only) networking is enabled with this configuration: + + CONFIG_EXAMPLES_THTTPD_NOMAC=y : Will use MAC 00:e0:de:ad:be:ef + CONFIG_EXAMPLES_THTTPD_DRIPADDR=0xac100002 : Gateway 172.16.00.02 + CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00 : Netmask 255.255.255.0 + + 4. You will need to build the NXFLAT toolchain as described above in + order to use this example. diff --git a/configs/zkit-arm-1769/hello/Make.defs b/configs/zkit-arm-1769/hello/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..102dbfe1c4b8f66d3539912f9a0b8653e632282d --- /dev/null +++ b/configs/zkit-arm-1769/hello/Make.defs @@ -0,0 +1,122 @@ +############################################################################ +# configs/zkit-arm-1769/hello/Make.defs +# +# Copyright (C) 2013 Zilogic Systems. All rights reserved. +# Author: BabuSubashChandar +# +# Based on configs/lpcxpresso-lpc1768/thttpd/Make.defs +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" + NXFLATLDSCRIPT = -T "${shell cygpath -w $(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script + NXFLATLDSCRIPT = -T"$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld" +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) $(NXFLATLDSCRIPT) -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) +ifneq ($(CROSSDEV),arm-nuttx-eabi-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/zkit-arm-1769/hello/defconfig b/configs/zkit-arm-1769/hello/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..69c05c5b9abcba4d47dc41c1b6ee6e7a61e5858a --- /dev/null +++ b/configs/zkit-arm-1769/hello/defconfig @@ -0,0 +1,868 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=15776 +CONFIG_NET_NTXDESC=13 +CONFIG_NET_NRXDESC=13 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8079 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_LPCXPRESSO is not set +# CONFIG_ARCH_BOARD_MBED is not set +# CONFIG_ARCH_BOARD_NUCLEUS2G is not set +CONFIG_ARCH_BOARD_ZKITARM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="zkit-arm-1769" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="hello_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGWORK=17 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=8192 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +CONFIG_NXFLAT=y +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +CONFIG_PIC=y +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/zkit-arm-1769/hello/setenv.sh b/configs/zkit-arm-1769/hello/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..c8a2994393501ea5906b6856e638034369938973 --- /dev/null +++ b/configs/zkit-arm-1769/hello/setenv.sh @@ -0,0 +1,72 @@ +#!/bin/bash +# configs/zkit-arm-1769/hello/setenv.sh +# +# Copyright (C) 2013 Zilogic Systems. All rights reserved. +# Author: BabuSubashChandar +# +# Based on configs/lpcxpresso-lpc1768/thttpd/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is where the buildroot might reside on a Linux or Cygwin system +# A minimal buildroot version with the NXFLAT tools is always required +# for this configuration in order to buildthe THTTPD CGI programs +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the default install location for Code Red on Linux +#export TOOLCHAIN_BIN="/usr/local/LPCXpresso/tools/bin" + +# This the Cygwin path to the LPCXpresso 3.6 install location under Windows +#export TOOLCHAIN_BIN="/cygdrive/c/nxp/lpcxpresso_3.6/Tools/bin" + +# This is the path to the LPCXpresso tool subdirectory +export LPCTOOL_DIR="${WD}/configs/zkit-arm-1769/tools" + +# Add the path to the toolchain to the PATH varialble +export PATH="${LPCTOOL_DIR}:${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/zkit-arm-1769/include/board.h b/configs/zkit-arm-1769/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..544ce3d133e5fe9d84879bb6bb17da71cfa0046f --- /dev/null +++ b/configs/zkit-arm-1769/include/board.h @@ -0,0 +1,363 @@ +/************************************************************************************ + * configs/zkit-arm-1769/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: BabuSubashChandar + * + * Based on configs/lpcxpresso-lpc1768/include/board.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_ZKIT_ARM_1769_INCLUDE_BOARD_H +#define __CONFIGS_ZKIT_ARM_1769_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Clocking *************************************************************************/ +/* NOTE: The following definitions require lpc17_syscon.h. It is not included here + * because the including C file may not have that file in its include path. + */ + +#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency */ +#define BOARD_OSCCLK_FREQUENCY BOARD_XTAL_FREQUENCY /* Main oscillator frequency */ +#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency */ +#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */ + +/* This is the clock setup we configure for: + * + * SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1 + * CCLCK = 480MHz / 6 = 80MHz -> CCLK divider = 6 + */ + +#define LPC17_CCLK 80000000 /* 80Mhz */ + +/* Select the main oscillator as the frequency source. SYSCLK is then the frequency + * of the main oscillator. + */ + +#undef CONFIG_LPC17_MAINOSC +#define CONFIG_LPC17_MAINOSC 1 +#define BOARD_SCS_VALUE SYSCON_SCS_OSCEN + +/* Select the main oscillator and CCLK divider. The output of the divider is CCLK. + * The input to the divider (PLLCLK) will be determined by the PLL output. + */ + +#define BOARD_CCLKCFG_DIVIDER 6 +#define BOARD_CCLKCFG_VALUE ((BOARD_CCLKCFG_DIVIDER-1) << SYSCON_CCLKCFG_SHIFT) + +/* PLL0. PLL0 is used to generate the CPU clock divider input (PLLCLK). + * + * Source clock: Main oscillator + * PLL0 Multiplier value (M): 20 + * PLL0 Pre-divider value (N): 1 + * + * PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz + */ + +#undef CONFIG_LPC17_PLL0 +#define CONFIG_LPC17_PLL0 1 +#define BOARD_CLKSRCSEL_VALUE SYSCON_CLKSRCSEL_MAIN + +#define BOARD_PLL0CFG_MSEL 20 +#define BOARD_PLL0CFG_NSEL 1 +#define BOARD_PLL0CFG_VALUE \ + (((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLL0CFG_MSEL_SHIFT) | \ + ((BOARD_PLL0CFG_NSEL-1) << SYSCON_PLL0CFG_NSEL_SHIFT)) + +/* PLL1 -- Not used. */ + +#undef CONFIG_LPC17_PLL1 +#define BOARD_PLL1CFG_MSEL 36 +#define BOARD_PLL1CFG_NSEL 1 +#define BOARD_PLL1CFG_VALUE \ + (((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLL1CFG_MSEL_SHIFT) | \ + ((BOARD_PLL1CFG_NSEL-1) << SYSCON_PLL1CFG_NSEL_SHIFT)) + +/* USB divider. This divider is used when PLL1 is not enabled to get the + * USB clock from PLL0: + * + * USBCLK = PLL0CLK / 10 = 48MHz + */ + +#define BOARD_USBCLKCFG_VALUE SYSCON_USBCLKCFG_DIV10 + +/* FLASH Configuration */ + +#undef CONFIG_LP17_FLASH +#define CONFIG_LP17_FLASH 1 +#define BOARD_FLASHCFG_VALUE 0x0000303a + +/* Ethernet configuration */ + +//#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV44 +#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV20 + +/* LED definitions ******************************************************************/ +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + * any way. The following definitions are used to access individual LEDs. + * + * LED1 -- Connected to P0[19] + * LED2 -- Connected to P0[21] + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_NLEDS 2 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 2 LEDs + * on board the ZKIT-ARM-1769. The following definitions + * describe how NuttX controls the LEDs: + */ + + /* LED1 LED2 */ +#define LED_STARTED 0 /* OFF OFF */ +#define LED_HEAPALLOCATE 1 /* ON OFF */ +#define LED_IRQSENABLED 2 /* OFF ON */ +#define LED_STACKCREATED 3 /* OFF OFF */ + +/* After the system is booted, this logic will no longer use LED 1. + * LED 1 is available for use by application software using lpc17_led + * (prototyped below) + */ + /* LED1 LED2 */ +#define LED_INIRQ 4 /* NC ON (momentary) */ +#define LED_SIGNAL 5 /* NC ON (momentary) */ +#define LED_ASSERTION 6 /* NC ON (momentary) */ +#define LED_PANIC 7 /* NC ON (1Hz flashing) */ + +/* Button definitions ***************************************************************/ +/* The ZKIT-ARM-1769 supports several buttons. All will read "1" when open and "0" + * when closed + * + * KEY1 -- Connected to P1[19] + * KEY2 -- Connected to P1[27] + * KEY3 -- Connected to P1[28] + * KEY4 -- Connected to P1[31] + * KEY5 -- Connected to P2[13] + * + */ +#define BOARD_BUTTON_1 0 +#define BOARD_BUTTON_2 1 +#define BOARD_BUTTON_3 2 +#define BOARD_BUTTON_4 3 +#define BOARD_BUTTON_5 4 +#define BOARD_NUM_BUTTONS 5 + +#define BOARD_BUTTON1_BIT (1 << BOARD_BUTTON_1) +#define BOARD_BUTTON2_BIT (1 << BOARD_BUTTON_2) +#define BOARD_BUTTON3_BIT (1 << BOARD_BUTTON_3) +#define BOARD_BUTTON4_BIT (1 << BOARD_BUTTON_4) +#define BOARD_BUTTON5_BIT (1 << BOARD_BUTTON_5) + +/* Alternate pin selections *********************************************************/ +/* Pin Description On Board Connector + * -------------------------------- ---------------- ------------- + * P0.0/RD1/TXD3/SDA1 RD1 AUX-CON + * P0.1/TD1/RXD3/SCL1 TD1 + * P0.2/TXD0/AD0.7 TXD0 COM0 + * P0.3/RXD0/AD0.6 RXD0 + * P0.4/I2SRX_CLK/RD2/CAP2.0 GPIO0 + * P0.5/I2SRX_WS/TD2/CAP2.1 GPIO1 + * P0.6/I2SRX_SDA/SSEL1/MAT2.0 SSEL1 SPI + * P0.7/I2STX_CLK/SCK1/MAT2.1 SCK1 + * P0.8/I2STX_WS/MISO1/MAT2.2 MISO1 + * P0.9/I2STX_SDA/MOSI1/MAT2.3 MOSI1 + * P0.10/TXD2/SDA2/MAT3.0 TXD2 AUX-CON + * P0.11/RXD2/SCL2/MAT3.1 RXD2 + * P0.15/TXD1/SCK0/SCK SD-SCK + * P0.16/RXD1/SSEL0/SSEL SD-SSEL SD-CARD + * P0.17/CTS1/MISO0/MISO SD-MISO + * P0.18/DCD1/M0SI0/MOSI SD-MOSI + * P0.19/DSR1/SDA1 LED1 + * P0.20/DTR1/SCL1 DTR1 COM1 + * P0.21/RI1/RD1 N.C LED2 + * P0.22/RTS1/TD1 RTS1 COM1 + * P0.23/AD0.0/I2SRX_CLK/CAP3.0 AD0 + * P0.24/AD0.1/I2SRX_WS/CAP3.1 AD1 AIN + * P0.25/AD0.2/I2SRX_SDA/TXD3 AD2 + * P0.26/AD0.3/AOUT/RXD3 AD3 + * P0.27/SDA0/USB_SDA SDA0 I2C0 + * P0.28/SCL0/USB_SCL SCL0 + * P0.29/USB_D+ USB-D+ USB + * P0.30/USB_D- USB-D- + */ + +#define GPIO_CAN1_RD GPIO_CAN1_RD_1 +#define GPIO_CAN1_TD GPIO_CAN1_TD_1 +#define GPIO_CAN2_RD GPIO_CAN2_RD_2 +#define GPIO_CAN2_TD GPIO_CAN2_TD_2 +#define GPIO_I2C1_SDA GPIO_I2C0_SDA +#define GPIO_I2C1_SCL GPIO_I2C0_SCL +#define GPIO_SSP1_SCK GPIO_SSP1_SCK_1 +#define GPIO_UART2_TXD GPIO_UART2_TXD_1 +#define GPIO_UART2_RXD GPIO_UART2_RXD_1 +#define GPIO_UART1_TXD GPIO_UART1_TXD_2 +#define GPIO_UART1_RXD GPIO_UART1_RXD_2 +#define GPIO_SSP0_SCK GPIO_SSP0_SCK_2 +#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_2 +#define GPIO_SSP0_MISO GPIO_SSP0_MISO_2 +#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_2 + +/* P1.0/ENET_TXD0 ETH-TXD0 + * P1.1/ENET_TXD1 ETH-TXD1 + * P1.4/ENET_TX_EN ETH-TXEN + * P1.8/ENET_CRS ETH-CRS + * P1.9/ENET_RXD0 ETH-RXD0 ETH + * P1.10/ENET_RXD1 ETH-RXD1 + * P1.14/ENET_RX_ER ETH-RXER + * P1.15/ENET_REF_CLK ETH-REFCLK + * P1.16/ENET_MDC ETH-MDC + * P1.17/ENET_MDIO ETH-MDIO + * P1.18/USB_UP_LED/PWM1.1/CAP1.0 USB-UP-LED + * P1.19/MCOA0/nUSB_PPWR/CAP1.1 KEY1 + * P1.20/MCFB0/PWM1.2/SCK0 LCD-SCK + * P1.21/MCABORT/PWM1.3/SSEL0 LCD-SSEL + * P1.22/MCOB0/USB_PWRD/MAT1.0 LCD-A0 LCD + * P1.23/MCFB1/PWM1.4/MISO0 NC + * P1.24/MCFB2/PWM1.5/MOSI0 LCD_MOSI + * P1.25/MCOA1/MAT1.1 LCD-RST + * P1.26/MCOB1/PWM1.6/CAP0.0 LCD-AO + * P1.27/CLKOUT/nUSB_OVRCR/CAP0.1 KEY2 + * P1.28/MCOA2/MAT0.0 KEY3 + * P1.29/MCOB2/PCAP1.1/MAT0.1 CAP1 PWM-CON + * P1.30/VBUS/AD0.4 VBUS USB + * P1.31/SCK1/AD0.5 KEY4 + */ + +#define GPIO_ENET_MDC GPIO_ENET_MDC_1 +#define GPIO_ENET_MDIO GPIO_ENET_MDIO_1 + +/* P2.0/PWM1.1/TXD1 TXD1 + * P2.1/PWM1.2/RXD1 RXD1 COM1 + * P2.2/PWM1.3/CTS1/TRACEDATA3 CTS1 + * P2.3/PWM1.4/DCD1/TRACEDATA2 PWM4 + * P2.4/PWM1.5/DSR1/TRACEDATA1 PWM5 PWM + * P2.5/PWM1.6/DTR1/TRACEDATA0 PWM6 + * P2.6/PCAP1.0/RI1/TRACECLK CAP0 + * P2.7/RD2/RTS1 RD2 RD2 CAN2 + * P2.8/TD2/TXD2 TD2 TD2 + * P2.9/USB_CONNECT/RXD2 USB_CONNECT USB + * P2.10/nEINT0/NMI ISP + * P2.11/nEINT1/I2STX_CLK INT1 I2C + * P2.12/nEINT2/I2STX_WS SD-DET SD-CARD + * P2.13/nEINT3/I2STX_SDA KEY5 + */ + +#define GPIO_PWM1p2 GPIO_PWM1p2_3 +#define GPIO_PWM1p3 GPIO_PWM1p3_3 +#define GPIO_PWM1p4 GPIO_PWM1p4_2 +#define GPIO_PWM1p5 GPIO_PWM1p5_2 +#define GPIO_PWM1p6 GPIO_PWM1p6_2 + +/* P3.25/MAT0.0/PWM1.2 PWM2 PWM + * P3.26/STCLK/MAT0.1/PWM1.3 PWM3 + * + * P4.28/RX_MCLK/MAT2.0/TXD3 GPIO2 SPI + * P4.28/RX_MCLK/MAT2.0/TXD3 GPIO3 + */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void); + +/************************************************************************************ + * Name: lpc17_led + * + * Description: + * Once the system has booted, these functions can be used to control LEDs 1 + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void lpc17_led(int lednum, int state); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_ZKIT_ARM_1769_INCLUDE_BOARD_H */ diff --git a/configs/zkit-arm-1769/nsh/Make.defs b/configs/zkit-arm-1769/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..c53eade8a423cb3e9028cbc9a7e2cddacb6e654d --- /dev/null +++ b/configs/zkit-arm-1769/nsh/Make.defs @@ -0,0 +1,122 @@ +############################################################################ +# configs/zkit-arm-1769/nsh/Make.defs +# +# Copyright (C) 2013 Zilogic Systems. All rights reserved. +# Author: BabuSubashChandar +# +# Based on configs/lpcxpresso-lpc1768/nsh/Make.defs +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" + NXFLATLDSCRIPT = -T "${shell cygpath -w $(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script + NXFLATLDSCRIPT = -T"$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld" +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) $(NXFLATLDSCRIPT) -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) +ifneq ($(CROSSDEV),arm-nuttx-eabi-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/zkit-arm-1769/nsh/defconfig b/configs/zkit-arm-1769/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..146c2907a7c1b67c9301f727622106ac86501fb8 --- /dev/null +++ b/configs/zkit-arm-1769/nsh/defconfig @@ -0,0 +1,1080 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +CONFIG_LPC17_SPI=y +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=7296 +CONFIG_NET_NTXDESC=6 +CONFIG_NET_NRXDESC=6 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8079 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_LPCXPRESSO is not set +# CONFIG_ARCH_BOARD_MBED is not set +# CONFIG_ARCH_BOARD_NUCLEUS2G is not set +CONFIG_ARCH_BOARD_ZKITARM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="zkit-arm-1769" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=28 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPI_EXCHANGE is not set +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +CONFIG_NET_TCP_SPLIT=y +CONFIG_NET_TCP_SPLIT_SIZE=40 +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +CONFIG_NETUTILS_DHCPC=y +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# +# CONFIG_NSH_DHCPC is not set + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/zkit-arm-1769/nsh/setenv.sh b/configs/zkit-arm-1769/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..d9797a48ba5088eb2879c9ecbee11ef0a4195e5e --- /dev/null +++ b/configs/zkit-arm-1769/nsh/setenv.sh @@ -0,0 +1,72 @@ +#!/bin/bash +# configs/zkit-arm-1769/nsh/setenv.sh +# +# Copyright (C) 2013 Zilogic Systems. All rights reserved. +# Author: BabuSubashChandar +# +# Based on configs/lpcxpresso-lpc1768/thttpd/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is where the buildroot might reside on a Linux or Cygwin system +# A minimal buildroot version with the NXFLAT tools is always required +# for this configuration in order to buildthe THTTPD CGI programs +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the default install location for Code Red on Linux +#export TOOLCHAIN_BIN="/usr/local/LPCXpresso/tools/bin" + +# This the Cygwin path to the LPCXpresso 3.6 install location under Windows +#export TOOLCHAIN_BIN="/cygdrive/c/nxp/lpcxpresso_3.6/Tools/bin" + +# This is the path to the LPCXpression tool subdirectory +export LPCTOOL_DIR="${WD}/configs/zkit-arm-1769/tools" + +# Add the path to the toolchain to the PATH varialble +export PATH="${LPCTOOL_DIR}:${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/zkit-arm-1769/nxhello/Make.defs b/configs/zkit-arm-1769/nxhello/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..ae83d3bf59e4a7b0ef5e22edb060a6d64ef99d0e --- /dev/null +++ b/configs/zkit-arm-1769/nxhello/Make.defs @@ -0,0 +1,122 @@ +############################################################################ +# configs/zkit-arm-1769/nxhello/Make.defs +# +# Copyright (C) 2013 Zilogic Systems. All rights reserved. +# Author: Manikandan +# +# Based on configs/lpcxpresso-lpc1768/nsh/Make.defs +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" + NXFLATLDSCRIPT = -T "${shell cygpath -w $(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script + NXFLATLDSCRIPT = -T"$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld" +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) $(NXFLATLDSCRIPT) -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) +ifneq ($(CROSSDEV),arm-nuttx-eabi-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/zkit-arm-1769/nxhello/defconfig b/configs/zkit-arm-1769/nxhello/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..02d8b6d1b72ebc4a02cf6124da3a1ed36ebc821f --- /dev/null +++ b/configs/zkit-arm-1769/nxhello/defconfig @@ -0,0 +1,1216 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +CONFIG_LPC17_SSP0=y +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=7296 +CONFIG_NET_NTXDESC=6 +CONFIG_NET_NRXDESC=6 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8079 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_LPCXPRESSO is not set +# CONFIG_ARCH_BOARD_MBED is not set +# CONFIG_ARCH_BOARD_NUCLEUS2G is not set +CONFIG_ARCH_BOARD_ZKITARM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="zkit-arm-1769" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=28 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxhello_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPI_EXCHANGE is not set +CONFIG_SPI_CMDDATA=y +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=255 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +CONFIG_LCD_ST7567=y +CONFIG_ST7567_SPIMODE=0 +CONFIG_ST7567_FREQUENCY=3500000 +CONFIG_ST7567_NINTERFACES=1 +# CONFIG_ST7567_POWER is not set +CONFIG_ST7567_XRES=128 +CONFIG_ST7567_YRES=64 +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_HAVECARDDETECT is not set +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +CONFIG_NET_TCP_SPLIT=y +CONFIG_NET_TCP_SPLIT_SIZE=40 +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +# CONFIG_NX_WRITEONLY is not set + +# +# Supported Pixel Depths +# +# CONFIG_NX_DISABLE_1BPP is not set +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +CONFIG_NX_XYINPUT=y +# CONFIG_NX_XYINPUT_NONE is not set +CONFIG_NX_XYINPUT_MOUSE=y +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +CONFIG_NX_KBD=y + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=4 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0 +CONFIG_NXTK_BORDERCOLOR2=0 +CONFIG_NXTK_BORDERCOLOR3=0 +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +# CONFIG_NXFONT_MONO5X8 is not set +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +CONFIG_NXFONT_SANS23X27=y +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_LIBC_NETDB=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +CONFIG_NETDB_DNSSERVER_NOADDR=y +# CONFIG_NETDB_DNSSERVER_IPv4 is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +CONFIG_EXAMPLES_NXHELLO=y +CONFIG_EXAMPLES_NXHELLO_VPLANE=0 +CONFIG_EXAMPLES_NXHELLO_DEVNO=0 +CONFIG_EXAMPLES_NXHELLO_BPP=1 + +# +# Example Color Configuration +# +# CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NXHELLO_BGCOLOR=0x00 +CONFIG_EXAMPLES_NXHELLO_FONTCOLOR=0xFF + +# +# Example Font Configuration +# +CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y +# CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +CONFIG_NETUTILS_DHCPC=y +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# +# CONFIG_NSH_DHCPC is not set + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/zkit-arm-1769/nxhello/setenv.sh b/configs/zkit-arm-1769/nxhello/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..1f8edd0d1d755b201f9f3e88a49ee369a1b04314 --- /dev/null +++ b/configs/zkit-arm-1769/nxhello/setenv.sh @@ -0,0 +1,72 @@ +#!/bin/bash +# configs/zkit-arm-1769/nxhello/setenv.sh +# +# Copyright (C) 2013 Zilogic Systems. All rights reserved. +# Author: Manikandan +# +# Based on configs/lpcxpresso-lpc1768/thttpd/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is where the buildroot might reside on a Linux or Cygwin system +# A minimal buildroot version with the NXFLAT tools is always required +# for this configuration in order to buildthe THTTPD CGI programs +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the default install location for Code Red on Linux +#export TOOLCHAIN_BIN="/usr/local/LPCXpresso/tools/bin" + +# This the Cygwin path to the LPCXpresso 3.6 install location under Windows +#export TOOLCHAIN_BIN="/cygdrive/c/nxp/lpcxpresso_3.6/Tools/bin" + +# This is the path to the LPCXpression tool subdirectory +export LPCTOOL_DIR="${WD}/configs/zkit-arm-1769/tools" + +# Add the path to the toolchain to the PATH varialble +export PATH="${LPCTOOL_DIR}:${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/zkit-arm-1769/scripts/ld.script b/configs/zkit-arm-1769/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..453bf1cccabd3e42b20674a4cc38f67746601206 --- /dev/null +++ b/configs/zkit-arm-1769/scripts/ld.script @@ -0,0 +1,115 @@ +/**************************************************************************** + * configs/zkit-arm-1769/scripts/ld.script + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: BabuSubashChandar + * + * Based on configs/lpcxpresso-lpc1768/thttpd/ld.script + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The LPC1768 has 512Kb of FLASH beginning at address 0x0000:0000 and + * 64Kb of total SRAM: 32Kb of SRAM in the CPU block beginning at address + * 0x10000000 and 32Kb of AHB SRAM in two banks of 16Kb beginning at addresses + * 0x20070000 and 0x20080000. Here we assume that .data and .bss will all fit + * into the 32Kb CPU SRAM address range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K + sram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .ARM.extab : { + *(.ARM.extab*) + } >sram + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } >sram + __exidx_end = ABSOLUTE(.); + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/zkit-arm-1769/src/.gitignore b/configs/zkit-arm-1769/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/zkit-arm-1769/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/zkit-arm-1769/src/Makefile b/configs/zkit-arm-1769/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..80905b88538044e8c6d5695c7a1ff6dfb78651c1 --- /dev/null +++ b/configs/zkit-arm-1769/src/Makefile @@ -0,0 +1,70 @@ +############################################################################ +# configs/zkit-arm-1769/src/Makefile +# +# Copyright (C) 2013 Zilogic Systems. All rights reserved. +# Author: BabuSubashChandar +# +# Based on configs/lpcxpresso-lpc1768/src/Makefile +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc17_boot.c lpc17_leds.c lpc17_ssp.c lpc17_buttons.c lpc17_lcd.c + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc17_appinit.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += lpc17_usbmsc.c +endif + +ifeq ($(CONFIG_ADC),y) +CSRCS += lpc17_adc.c +endif + +ifeq ($(CONFIG_DAC),y) +CSRCS += lpc17_dac.c +endif + +ifeq ($(CONFIG_CAN),y) +CSRCS += lpc17_can.c +endif + +ifeq ($(CONFIG_LPC17_SPI),y) +CSRCS += lpc17_spi.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/zkit-arm-1769/src/lpc17_adc.c b/configs/zkit-arm-1769/src/lpc17_adc.c new file mode 100644 index 0000000000000000000000000000000000000000..091d859bd6b7c83442cb879b703091b06720ab81 --- /dev/null +++ b/configs/zkit-arm-1769/src/lpc17_adc.c @@ -0,0 +1,123 @@ +/************************************************************************************ + * configs/zkit-arm-1769/src/lpc17_adc.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Kannan + * + * Based on configs/stm3220g-eval/src/lpc17_adc.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "lpc17_adc.h" +#include "zkit-arm-1769.h" + +#ifdef CONFIG_ADC + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_adc_setup + * + * Description: + * All LPC17 architectures must provide the following interface to work with + * examples/adc. + * + ************************************************************************************/ + +int board_adc_setup(void) +{ + static bool initialized = false; + struct adc_dev_s *adc; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { + /* Call lpc17_adcinitialize() to get an instance of the ADC interface */ + + adc = lpc17_adcinitialize(); + if (adc == NULL) + { + adbg("ERROR: Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", adc); + if (ret < 0) + { + adbg("adc_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_ADC */ diff --git a/configs/zkit-arm-1769/src/lpc17_appinit.c b/configs/zkit-arm-1769/src/lpc17_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..e9d9c1baa125c3dc20f809877b0a6f1cf8c51d71 --- /dev/null +++ b/configs/zkit-arm-1769/src/lpc17_appinit.c @@ -0,0 +1,185 @@ +/**************************************************************************** + * config/zkit-arm-1769/src/lpc17_appinit.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: BabuSubashChandar + * + * Based on config/lpcxpresso-lpc1768/src/lpc17_appinit.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "lpc17_spi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_ZKITARM +# define CONFIG_NSH_HAVEUSBDEV 1 +# ifdef CONFIG_LPC17_SPI +# define CONFIG_NSH_HAVEMMCSD 1 +# else +# undef CONFIG_NSH_HAVEMMCSD +# endif +#else +# error "Unrecognized board" +# undef CONFIG_NSH_HAVEUSBDEV +# undef CONFIG_NSH_HAVEMMCSD +#endif + +/* Do we have SPI support for MMC/SD? */ + +#ifdef CONFIG_NSH_HAVEMMCSD +# ifdef CONFIG_NSH_ARCHINIT +# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 0 +# error "The ZKit-arm MMC/SD is on SPI port 0" +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 0 +# endif +# if !defined(CONFIG_NSH_MMCSDSLOTNO) || CONFIG_NSH_MMCSDSLOTNO != 0 +# error "The ZKit-arm MMC/SD has only one slot (0)" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +# else +# undef CONFIG_NSH_MMCSDSPIPORTNO +# define CONFIG_NSH_MMCSDSPIPORTNO 0 +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO 0 +# endif +#endif + +/* Can't support USB device features if USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef CONFIG_NSH_HAVEUSBDEV +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) +# undef CONFIG_NSH_HAVEMMCSD +#endif + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +/* Debug ********************************************************************/ + +#ifdef CONFIG_CPP_HAVE_VARARGS +# ifdef CONFIG_DEBUG +# define message(...) lib_lowprintf(__VA_ARGS__) +# else +# define message(...) printf(__VA_ARGS__) +# endif +#else +# ifdef CONFIG_DEBUG +# define message lib_lowprintf +# else +# define message printf +# endif +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef CONFIG_NSH_HAVEMMCSD + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + spi = lpc17_spibus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + if (!spi) + { + message("board_app_initialize: Failed to initialize SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + return -ENODEV; + } + + message("Successfully initialized SPI port %d\n", + CONFIG_NSH_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + ret = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, CONFIG_NSH_MMCSDSLOTNO, spi); + if (ret < 0) + { + message("board_app_initialize: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO, ret); + return ret; + } + + message("Successfuly bound SPI port %d to MMC/SD slot %d\n", + CONFIG_NSH_MMCSDSPIPORTNO, CONFIG_NSH_MMCSDSLOTNO); +#endif + return OK; +} diff --git a/configs/zkit-arm-1769/src/lpc17_boot.c b/configs/zkit-arm-1769/src/lpc17_boot.c new file mode 100644 index 0000000000000000000000000000000000000000..c1c9d9c0d63ee5640913473e0204365dcaf8b31b --- /dev/null +++ b/configs/zkit-arm-1769/src/lpc17_boot.c @@ -0,0 +1,97 @@ +/************************************************************************************ + * configs/zkit-arm-1769/src/lpc17_boot.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: BabuSubashChandar + * + * Based on configs/lpcxpresso-lpc1768/src/lpc17_boot.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "zkit-arm-1769.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc17_boardinitialize + * + * Description: + * All LPC17xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc17_boardinitialize(void) +{ + /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak + * function zkit_sspdev_initialize() has been brought into the link. + */ + +#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1) + if (zkit_sspdev_initialize) + { + zkit_sspdev_initialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif +} diff --git a/configs/zkit-arm-1769/src/lpc17_buttons.c b/configs/zkit-arm-1769/src/lpc17_buttons.c new file mode 100644 index 0000000000000000000000000000000000000000..d33219c98d23b072677235b1dfca8e42a46fd027 --- /dev/null +++ b/configs/zkit-arm-1769/src/lpc17_buttons.c @@ -0,0 +1,215 @@ +/**************************************************************************** + * configs/zkit-arm-1769/src/lpc17_buttons.c + * + * Copyright (C) 2011 Zilogic Systems. All rights reserved. + * Author: Kannan + * + * Based on configs/stm3210e-eval/src/board_buttons.c + * + * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "lpc17_gpio.h" +#include "zkit-arm-1769.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each zkit-arm-1769 button. This array is indexed by + * BOARD_NUM_BUTTONS in board.h + */ + +static const uint16_t g_buttons[BOARD_NUM_BUTTONS] = +{ + ZKITARM_KEY1, ZKITARM_KEY2, ZKITARM_KEY3, ZKITARM_KEY4, ZKITARM_KEY5 +}; + +/* Old KEY5 interrupt handler */ + +static xcpt_t g_oldhandler; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for some pins but NOT used in this file + */ + + for (i = 0; i < BOARD_NUM_BUTTONS; i++) + { + lpc17_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + bool released; + int i; + + /* Check that state of each key */ + + for (i = 0; i < BOARD_NUM_BUTTONS; i++) + { + released = lpc17_gpioread(g_buttons[i]); + + /* Accumulate set of depressed keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT and JOYSTICK_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#if defined CONFIG_ARCH_IRQBUTTONS && CONFIG_GPIO_IRQ +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t rethandler = NULL; + irqstate_t flags; + int ret; + + /* Interrupts are supported on KEY5 only */ + + if (id == BOARD_BUTTON_5) + { + /* Return the previous value of the interrupt handler */ + + flags = enter_critical_section(); + rethandler = g_oldhandler; + g_oldhandler = irqhandler; + + /* Attach or detach the interrupt handler for KEY5. */ + + if (irqhandler) + { + /* Configure KEY5 as an interrupting input */ + + lpc17_configgpio(ZKITARM_INT_KEY5); + + /* Attach the new interrupt handler and enable the interrupt */ + + ret = irq_attach(ZKITARM_KEY5_IRQ, irqhandler); + if (ret == OK) + { + up_enable_irq(ZKITARM_KEY5_IRQ); + } + } + else + { + /* Disable the interrupt and detach the handler */ + + up_disable_irq(ZKITARM_KEY5_IRQ); + (void)irq_detach(ZKITARM_KEY5_IRQ); + + /* Configure KEY5 as a non-interrupting input */ + + lpc17_configgpio(ZKITARM_KEY5); + + } + + leave_critical_section(flags); + } + + return rethandler; +} + +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/zkit-arm-1769/src/lpc17_can.c b/configs/zkit-arm-1769/src/lpc17_can.c new file mode 100644 index 0000000000000000000000000000000000000000..4d63da365bdcb3d0dd68948a7fda31101194587c --- /dev/null +++ b/configs/zkit-arm-1769/src/lpc17_can.c @@ -0,0 +1,159 @@ +/************************************************************************************ + * configs/zkit-arm-1769/src/lpc17_can.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Raashid Muhammed + * + * Based on configs/olimex-lpc1766stk/src/lpc17_can.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" + +#include "lpc17_can.h" +#include "zkit-arm-1769.h" + +#if defined(CONFIG_CAN) && (defined(CONFIG_LPC17_CAN1) || defined(CONFIG_LPC17_CAN2)) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ +#define CAN_PORT1 1 +#define CAN_PORT2 2 + + +/* Debug ***************************************************************************/ +/* Non-standard debug that may be enabled just for testing CAN */ + +#ifdef CONFIG_DEBUG_CAN +# define candbg dbg +# define canvdbg vdbg +# define canlldbg lldbg +# define canllvdbg llvdbg +#else +# define candbg(x...) +# define canvdbg(x...) +# define canlldbg(x...) +# define canllvdbg(x...) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_can_initialize + * + * Description: + * All LPC17 architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int board_can_initialize(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { +#ifdef CONFIG_LPC17_CAN1 + /* Call lpc17_caninitialize() to get an instance of the CAN1 interface */ + + can = lpc17_caninitialize(CAN_PORT1); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN1 interface\n"); + return -ENODEV; + } + + /* Register the CAN1 driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + candbg("ERROR: CAN1 register failed: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_LPC17_CAN2 + /* Call lpc17_caninitialize() to get an instance of the CAN2 interface */ + + can = lpc17_caninitialize(CAN_PORT2); + if (can == NULL) + { + candbg("ERROR: Failed to get CAN2 interface\n"); + return -ENODEV; + } + + /* Register the CAN2 driver at "/dev/can1" */ + + ret = can_register("/dev/can1", can); + if (ret < 0) + { + candbg("ERROR: CAN2 register failed: %d\n", ret); + return ret; + } +#endif + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_CAN && (CONFIG_LPC17_CAN1 || CONFIG_LPC17_CAN2) */ diff --git a/configs/zkit-arm-1769/src/lpc17_dac.c b/configs/zkit-arm-1769/src/lpc17_dac.c new file mode 100644 index 0000000000000000000000000000000000000000..3f3362cd4716c8ef7e40cbf0d3a05ffadd67e0c3 --- /dev/null +++ b/configs/zkit-arm-1769/src/lpc17_dac.c @@ -0,0 +1,100 @@ +/************************************************************************************ + * configs/zkit-arm-1769/src/lpc17_dac.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Kannan + * + * Based on configs/stm3220g-eval/src/lpc17_dac.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "zkit-arm-1769.h" +#include "lpc17_dac.h" + +#ifdef CONFIG_DAC + +/************************************************************************************ + * Name: dac_devinit + * + * Description: + * All LPC17xx architectures must provide the following interface to work with + * examples/diag. + * + ************************************************************************************/ + +int dac_devinit(void) +{ + static bool initialized = false; + struct dac_dev_s *dac; + int ret; + + if (!initialized) + { + /* Call lpc17_dacinitialize() to get an instance of the dac interface */ + + dac = lpc17_dacinitialize(); + if (dac == NULL) + { + adbg("ERROR: Failed to get dac interface\n"); + return -ENODEV; + } + + ret = dac_register("/dev/dac0", dac); + if (ret < 0) + { + adbg("dac_register failed: %d\n", ret); + return ret; + } + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_DAC */ diff --git a/configs/zkit-arm-1769/src/lpc17_lcd.c b/configs/zkit-arm-1769/src/lpc17_lcd.c new file mode 100644 index 0000000000000000000000000000000000000000..01bf1d58a8dc95f6fad98c7cec33c1f2c521edf4 --- /dev/null +++ b/configs/zkit-arm-1769/src/lpc17_lcd.c @@ -0,0 +1,199 @@ +/**************************************************************************** + * configs/zkit-arm-1769/src/lpc17_lcd.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Manikandan + * + * Based on configs/lm3s6965-ek/src/up_oled.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_gpio.h" +#include "lpc17_ssp.h" +#include "zkit-arm-1769.h" + +#ifdef CONFIG_NX_LCDDRIVER + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Enables debug output from this file (needs CONFIG_DEBUG with + * CONFIG_DEBUG_VERBOSE too) + */ + +#undef LCD_DEBUG /* Define to enable debug */ +#undef LCD_VERBOSE /* Define to enable verbose debug */ + +#ifdef LCD_DEBUG +# define leddbg lldbg +# ifdef LCD_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# undef LCD_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +FAR struct spi_dev_s *g_spidev; +FAR struct lcd_dev_s *g_lcddev; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_initialize + ****************************************************************************/ + +int board_lcd_initialize(void) +{ + lpc17_configgpio(ZKITARM_OLED_RST); + lpc17_configgpio(ZKITARM_OLED_RS); + lpc17_gpiowrite(ZKITARM_OLED_RST, 1); + lpc17_gpiowrite(ZKITARM_OLED_RS, 1); + + zkit_sspdev_initialize(); + g_spidev = lpc17_sspbus_initialize(0); + if (!g_spidev) + { + glldbg("Failed to initialize SSP port 0\n"); + return 0; + } + + lpc17_gpiowrite(ZKITARM_OLED_RST, 0); + up_mdelay(1); + lpc17_gpiowrite(ZKITARM_OLED_RST, 1); + return 1; +} + +/**************************************************************************** + * Name: board_lcd_getdev + ****************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + g_lcddev = st7567_initialize(g_spidev, lcddev); + if (!g_lcddev) + { + glldbg("Failed to bind SSI port 0 to OLCD %d: %d\n", lcddev); + } + else + { + gllvdbg("Bound SSI port 0 to OLCD %d\n", lcddev); + + /* And turn the OLCD on (CONFIG_LCD_MAXPOWER should be 1) */ + (void)g_lcddev->setpower(g_lcddev, CONFIG_LCD_MAXPOWER); + return g_lcddev; + } + + return NULL; +} + +/**************************************************************************** + * Name: board_lcd_uninitialize + ****************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* TO-FIX */ +} + +/**************************************************************************** + * Name: lpc17_spicmddata + * + * Description: + * Set or clear the SD1329 D/Cn bit to select data (true) or command + * (false). This function must be provided by platform-specific logic. + * This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +int lpc17_ssp0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + if (devid == SPIDEV_DISPLAY) + { + /* Set GPIO to 1 for data, 0 for command */ + + lpc17_gpiowrite(ZKITARM_OLED_RS, !cmd); + return OK; + } + + return -ENODEV; +} + +#endif /* CONFIG_NX_LCDDRIVER */ diff --git a/configs/zkit-arm-1769/src/lpc17_leds.c b/configs/zkit-arm-1769/src/lpc17_leds.c new file mode 100644 index 0000000000000000000000000000000000000000..5f8454463d51a3f52754f504d779917bf9de54c7 --- /dev/null +++ b/configs/zkit-arm-1769/src/lpc17_leds.c @@ -0,0 +1,212 @@ +/**************************************************************************** + * configs/zkit-arm-1769/src/lpc17_leds.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: BabuSubashChandar + * + * Based on configs/lpcxpresso-lpc1768/src/lpc17_leds.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc17_gpio.h" +#include "zkit-arm-1769.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * and pherhaps CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define ledvdbg lldbg +# else +# define ledvdbg(x...) +# endif +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* LED definitions **********************************************************/ + +/* The ZKit-ARM-1769 has 2 LEDs along the bottom of the board. Red or off. + * If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows for NuttX + * debug functionality (where NC means "No Change"). + * + * During the boot phases. LED1 and LED2 will show boot status. + * + * LED1 LED2 + * STARTED OFF OFF + * HEAPALLOCATE BLUE OFF + * IRQSENABLED OFF BLUE + * STACKCREATED OFF OFF + * + * After the system is booted, this logic will no longer use LED 1. LED 1 + * is available for use by applications using lpc17_led (prototyped below) + */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static bool g_initialized; +static int g_nestcount; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure all LED GPIO lines */ + + lpc17_configgpio(ZKITARM_LED1); + lpc17_configgpio(ZKITARM_LED2); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + /* We will control LED1 and LED2 not yet completed the boot sequence. */ + + if (!g_initialized) + { + bool led1 = false; + bool led2 = false; + + switch (led) + { + case LED_STACKCREATED: + g_initialized = true; + case LED_STARTED: + default: + break; + + case LED_HEAPALLOCATE: + led1 = true; + break; + + case LED_IRQSENABLED: + led2 = true; + break; + } + + lpc17_gpiowrite(ZKITARM_LED1, led1); + lpc17_gpiowrite(ZKITARM_LED2, led2); + } + + /* We will always control the HB LED */ + + switch (led) + { + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + lpc17_gpiowrite(ZKITARM_LED2, false); + g_nestcount++; + + default: + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + /* In all states, OFF can only mean turning off the HB LED */ + + if (g_nestcount <= 1) + { + lpc17_gpiowrite(ZKITARM_LED2, true); + g_nestcount = 0; + } + else + { + g_nestcount--; + } +} + +/************************************************************************************ + * Name: lpc17_led + * + * Description: + * Once the system has booted, this functions can be used to control LED 1 + * + ************************************************************************************/ + +void lpc17_led(int lednum, int state) +{ + lpc17_gpiowrite(ZKITARM_LED1, state); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/zkit-arm-1769/src/lpc17_spi.c b/configs/zkit-arm-1769/src/lpc17_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..3adb005d89bc340a9bce93c3b31ecae387127f3b --- /dev/null +++ b/configs/zkit-arm-1769/src/lpc17_spi.c @@ -0,0 +1,190 @@ +/************************************************************************************ + * configs/zkit-arm-1769/src/lpc17_spi.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Kannan + * + * Based on configs/lpcxpresso-lpc1768/src/up_ssp.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "lpc17_spi.h" +#include "lpc17_gpio.h" +#include "zkit-arm-1769.h" + +#if defined(CONFIG_LPC17_SPI) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* CONFIG_DEBUG_SPI enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE) +# define spi_dumpgpio(m) lpc17_dumpgpio(SDCCS_GPIO, m) +#else +# define spi_dumpgpio(m) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: zkit_spidev_initialize + * + * Description: + * Called to configure SPI chip select and card detect GPIO pins for the + * ZKIT-ARM-1769 Kit. + * + ************************************************************************************/ + +void weak_function zkit_spidev_initialize(void) +{ + /* Configure the SPI-based microSD CS and Card Detect (CD) GPIO */ + + spi_dumpgpio("zkit_spidev_initialize() Entry)"); + + /* Configure card detect and chip select for the SD slot. */ + + (void)lpc17_configgpio(ZKITARM_SD_CS); + (void)lpc17_configgpio(ZKITARM_SD_CD); + + spi_dumpgpio("zkit_spidev_initialize() Exit"); +} + +/************************************************************************************ + * Name: lpc17_spiselect and lpc17_spistatus + * + * Description: + * The external functions, lpc17_spiselect and lpc17_spistatus + * must be provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including lpc17_spibus_initialize()) + * are provided by common LPC17xx logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in lpc17_boardinitialize() to configure SPI/SSP chip select + * pins. + * 2. Provide lpc17_spiselect and lpc17_spistatus functions + * in your board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 3. Add a calls to lpc17_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by lpc17_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +void lpc17_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + spi_dumpgpio("lpc17_spiselect() Entry"); + + if (devid == SPIDEV_MMCSD) + { + /* Assert/de-assert the CS pin to the card */ + + (void)lpc17_gpiowrite(ZKITARM_SD_CS, !selected); + } + + spi_dumpgpio("lpc17_spiselect() Exit"); +} + +uint8_t lpc17_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + if (devid == SPIDEV_MMCSD) + { + /* Read the state of the card-detect bit */ + + if (lpc17_gpioread(ZKITARM_SD_CD) == 0) + { + spidbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; + } + } + + spidbg("Returning zero\n"); + return 0; +} + +#ifdef CONFIG_SPI_CMDDATA +/**************************************************************************** + * Name: lpc17_spicmddata + * + * Description: Dummy Function + * + ****************************************************************************/ + +int lpc17_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} + +#endif /* CONFIG_SPI_CMDDATA */ +#endif /* CONFIG_LPC17_SPI */ diff --git a/configs/zkit-arm-1769/src/lpc17_ssp.c b/configs/zkit-arm-1769/src/lpc17_ssp.c new file mode 100644 index 0000000000000000000000000000000000000000..d72192c367d0a620956a92ce82c4a068c8ba5902 --- /dev/null +++ b/configs/zkit-arm-1769/src/lpc17_ssp.c @@ -0,0 +1,211 @@ +/************************************************************************************ + * configs/zkit-arm-1769/src/lpc17_ssp.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: BabuSubashChandar + * + * Based on configs/lpcxpresso-lpc1768/src/lpc17_ssp.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "lpc17_ssp.h" +#include "lpc17_gpio.h" +#include "zkit-arm-1769.h" + +#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* CONFIG_DEBUG_SPI enables debug output from this file (needs CONFIG_DEBUG too) */ + +#ifdef CONFIG_DEBUG_SPI +# define sspdbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define sspvdbg lldbg +# else +# define sspvdbg(x...) +# endif +#else +# define sspdbg(x...) +# define sspvdbg(x...) +#endif + +/* Dump GPIO registers */ + +#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE) +# define ssp_dumpgpio(m) lpc17_dumpgpio(SDCCS_GPIO, m) +#else +# define ssp_dumpgpio(m) +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: zkit_sspdev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the ZKIT-ARM-1769 Kit. + * + ************************************************************************************/ + +void weak_function zkit_sspdev_initialize(void) +{ + /* Configure the SPI-based LCD CS GPIO */ + + ssp_dumpgpio("zkit_sspdev_initialize() Entry)"); + + /* Configure chip select for the LCD. */ + +#ifdef CONFIG_LPC17_SSP0 +#ifdef CONFIG_NX_LCDDRIVER + (void)lpc17_configgpio(ZKITARM_OLED_CS); +#endif +#endif /* CONFIG_LPC17_SSP0 */ + + ssp_dumpgpio("zkit_sspdev_initialize() Exit"); +} + +/************************************************************************************ + * Name: lpc17_ssp0/ssp1select and lpc17_ssp0/ssp1status + * + * Description: + * The external functions, lpc17_ssp0/ssp1select and lpc17_ssp0/ssp1status + * must be provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including lpc17_sspbus_initialize()) + * are provided by common LPC17xx logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in lpc17_boardinitialize() to configure SPI/SSP chip select + * pins. + * 2. Provide lpc17_ssp0/ssp1select() and lpc17_ssp0/ssp1status() functions + * in your board-specific logic. These functions will perform chip selection + * and status operations using GPIOs in the way your board is configured. + * 3. Add a calls to lpc17_sspbus_initialize() in your low level application + * initialization logic + * 4. The handle returned by lpc17_sspbus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ************************************************************************************/ + +#ifdef CONFIG_LPC17_SSP1 +void lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssp_dumpgpio("lpc17_ssp1select() Entry"); + +#warning "Assert CS here (false)" + + ssp_dumpgpio("lpc17_ssp1select() Exit"); +} + +uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + sspdbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; +} + +/**************************************************************************** + * Name: lpc17_ssp1cmddata + * + * Description: Dummy Function + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +int weak_function lpc17_ssp1cmddata(FAR struct spi_dev_s *dev, + enum spi_dev_e devid, bool cmd) +{ + return OK; +} + +#endif /* CONFIG_SPI_CMDDATA */ +#endif /* CONFIG_LPC17_SSP1 */ + +#ifdef CONFIG_LPC17_SSP0 +void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + ssp_dumpgpio("lpc17_ssp0select() Entry"); + +#ifdef CONFIG_NX_LCDDRIVER + if (devid == SPIDEV_DISPLAY) + { + /* Assert the CS pin to the OLED display */ + + (void)lpc17_gpiowrite(ZKITARM_OLED_CS, !selected); + } +#endif + + ssp_dumpgpio("lpc17_ssp0select() Exit"); +} + +uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + if (devid == SPIDEV_DISPLAY) + { + sspdbg("Returning SPI_STATUS_PRESENT\n"); + return SPI_STATUS_PRESENT; + } + + sspdbg("Returning zero\n"); + return 0; +} + +#endif /* CONFIG_LPC17_SSP0 */ +#endif /* CONFIG_LPC17_SSP0 || CONFIG_LPC17_SSP1 */ diff --git a/configs/zkit-arm-1769/src/lpc17_usbmsc.c b/configs/zkit-arm-1769/src/lpc17_usbmsc.c new file mode 100644 index 0000000000000000000000000000000000000000..3d51560056df0d366f3d34979cbfcf08509922eb --- /dev/null +++ b/configs/zkit-arm-1769/src/lpc17_usbmsc.c @@ -0,0 +1,135 @@ +/**************************************************************************** + * configs/zkit-arm-1769/src/lpc17_usbmsc.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: BabuSubashChandar + * + * Based on configs/lpcxpresso-lpc1768/src/lpc17_usbmsc.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Configure and register the LPC17xx MMC/SD SPI block driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "lpc17_spi.h" +#include "zkit-arm-1769.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/* PORT and SLOT number probably depend on the board configuration */ + +#ifdef CONFIG_ARCH_BOARD_ZKITARM +# undef LPC17XX_MMCSDSPIPORTNO +# define LPC17XX_MMCSDSPIPORTNO 0 +# undef LPC17XX_MMCSDSLOTNO +# define LPC17XX_MMCSDSLOTNO 0 +#else + /* Add configuration for new LPC17xx boards here */ +# error "Unrecognized LPC17xx board" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization as needed to establish + * the mass storage device that will be exported by the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Get the SPI port */ + + syslog(LOG_INFO, "Initializing SPI port %d\n", + LPC17XX_MMCSDSPIPORTNO); + + zkit_spidev_initialize(); + spi = lpc17_spibus_initialize(LPC17XX_MMCSDSPIPORTNO); + if (!spi) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI port %d\n", + LPC17XX_MMCSDSPIPORTNO); + return -ENODEV; + } + + syslog(LOG_INFO, "Successfully initialized SPI port %d\n", + LPC17XX_MMCSDSPIPORTNO); + + /* Bind the SPI port to the slot */ + + syslog(LOG_INFO, "Binding SPI port %d to MMC/SD slot %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO); + + ret = mmcsd_spislotinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1, + LPC17XX_MMCSDSLOTNO, spi); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to bind SPI port %d to MMC/SD slot %d: %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO, ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SPI port %d to MMC/SD slot %d\n", + LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO); + return OK; +} diff --git a/configs/zkit-arm-1769/src/zkit-arm-1769.h b/configs/zkit-arm-1769/src/zkit-arm-1769.h new file mode 100644 index 0000000000000000000000000000000000000000..0b51e1f685c2356f9ea40c17325d20660b85459d --- /dev/null +++ b/configs/zkit-arm-1769/src/zkit-arm-1769.h @@ -0,0 +1,253 @@ +/************************************************************************************ + * configs/zkit-arm-1769/src/zkit-arm-1769.h + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: BabuSubashChandar + * + * Based on configs/lpcxpresso-lpc1768/src/lpcxpresso.h + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef _CONFIGS_ZKITARM_LPC1768_SRC_ZKITARM_H +#define _CONFIGS_ZKITARM_LPC1768_SRC_ZKITARM_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/************************************************************************************ + * ZKit-ARM-1769 Pin Usage + ************************************************************************************/ +/* Pin Description On Board Connector + * -------------------------------- ---------------- ------------- + * P0.0/RD1/TXD3/SDA1 RD1 AUX-CON + * P0.1/TD1/RXD3/SCL1 TD1 + * P0.2/TXD0/AD0.7 TXD0 COM0 + * P0.3/RXD0/AD0.6 RXD0 + * P0.4/I2SRX_CLK/RD2/CAP2.0 GPIO0 + * P0.5/I2SRX_WS/TD2/CAP2.1 GPIO1 + * P0.6/I2SRX_SDA/SSEL1/MAT2.0 SSEL1 SPI + * P0.7/I2STX_CLK/SCK1/MAT2.1 SCK1 + * P0.8/I2STX_WS/MISO1/MAT2.2 MISO1 + * P0.9/I2STX_SDA/MOSI1/MAT2.3 MOSI1 + * P0.10/TXD2/SDA2/MAT3.0 TXD2 AUX-CON + * P0.11/RXD2/SCL2/MAT3.1 RXD2 + * P0.15/TXD1/SCK0/SCK SD-SCK + * P0.16/RXD1/SSEL0/SSEL SD-SSEL SD-CARD + * P0.17/CTS1/MISO0/MISO SD-MISO + * P0.18/DCD1/M0SI0/MOSI SD-MOSI + * P0.19/DSR1/SDA1 LED1 + * P0.20/DTR1/SCL1 DTR1 COM1 + * P0.21/RI1/RD1 N.C LED2 + * P0.22/RTS1/TD1 RTS1 COM1 + * P0.23/AD0.0/I2SRX_CLK/CAP3.0 AD0 + * P0.24/AD0.1/I2SRX_WS/CAP3.1 AD1 AIN + * P0.25/AD0.2/I2SRX_SDA/TXD3 AD2 + * P0.26/AD0.3/AOUT/RXD3 AD3 + * P0.27/SDA0/USB_SDA SDA0 I2C0 + * P0.28/SCL0/USB_SCL SCL0 + * P0.29/USB_D+ USB-D+ USB + * P0.30/USB_D- USB-D- + * + * P1.0/ENET_TXD0 ETH-TXD0 + * P1.1/ENET_TXD1 ETH-TXD1 + * P1.4/ENET_TX_EN ETH-TXEN + * P1.8/ENET_CRS ETH-CRS + * P1.9/ENET_RXD0 ETH-RXD0 ETH + * P1.10/ENET_RXD1 ETH-RXD1 + * P1.14/ENET_RX_ER ETH-RXER + * P1.15/ENET_REF_CLK ETH-REFCLK + * P1.16/ENET_MDC ETH-MDC + * P1.17/ENET_MDIO ETH-MDIO + * P1.18/USB_UP_LED/PWM1.1/CAP1.0 USB-UP-LED + * P1.19/MCOA0/nUSB_PPWR/CAP1.1 KEY1 + * P1.20/MCFB0/PWM1.2/SCK0 LCD-SCK + * P1.21/MCABORT/PWM1.3/SSEL0 LCD-SSEL + * P1.22/MCOB0/USB_PWRD/MAT1.0 LCD-A0 LCD + * P1.23/MCFB1/PWM1.4/MISO0 NC + * P1.24/MCFB2/PWM1.5/MOSI0 LCD_MOSI + * P1.25/MCOA1/MAT1.1 LCD-RST + * P1.26/MCOB1/PWM1.6/CAP0.0 LCD-AO + * P1.27/CLKOUT/nUSB_OVRCR/CAP0.1 KEY2 + * P1.28/MCOA2/MAT0.0 KEY3 + * P1.29/MCOB2/PCAP1.1/MAT0.1 CAP1 PWM-CON + * P1.30/VBUS/AD0.4 VBUS USB + * P1.31/SCK1/AD0.5 KEY4 + * + * P2.0/PWM1.1/TXD1 TXD1 + * P2.1/PWM1.2/RXD1 RXD1 COM1 + * P2.2/PWM1.3/CTS1/TRACEDATA3 CTS1 + * P2.3/PWM1.4/DCD1/TRACEDATA2 PWM4 + * P2.4/PWM1.5/DSR1/TRACEDATA1 PWM5 PWM + * P2.5/PWM1.6/DTR1/TRACEDATA0 PWM6 + * P2.6/PCAP1.0/RI1/TRACECLK CAP0 + * P2.7/RD2/RTS1 RD2 RD2 CAN2 + * P2.8/TD2/TXD2 TD2 TD2 + * P2.9/USB_CONNECT/RXD2 USB_CONNECT USB + * P2.10/nEINT0/NMI ISP + * P2.11/nEINT1/I2STX_CLK INT1 I2C + * P2.12/nEINT2/I2STX_WS SD-DET SD-CARD + * P2.13/nEINT3/I2STX_SDA KEY5 + * + * P3.25/MAT0.0/PWM1.2 PWM2 PWM + * P3.26/STCLK/MAT0.1/PWM1.3 PWM3 + * + * P4.28/RX_MCLK/MAT2.0/TXD3 GPIO2 SPI + * P4.28/RX_MCLK/MAT2.0/TXD3 GPIO3 + */ + +#define ZKITARM_I2C1_EPROM_SDA GPIO_I2C1_SDA +#define ZKITARM_I2C1_EPROM_SDL GPIO_I2C1_SCL + +#define ZKITARM_LED1 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN19) +#define ZKITARM_LED2 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN21) + +#define ZKITARM_KEY1 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN19) +#define ZKITARM_KEY2 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN27) +#define ZKITARM_KEY3 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN28) +#define ZKITARM_KEY4 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN31) +#define ZKITARM_KEY5 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORT2 | GPIO_PIN13) + +#define ZKITARM_INT_KEY5 (GPIO_INTFE | GPIO_FLOAT | GPIO_PORT2 | GPIO_PIN13) +#define ZKITARM_KEY5_IRQ LPC17_IRQ_P2p13 + +/* SD Slot + * + * Board LPC1768 + * SD Signal Pin + * --- ----------- ---------- + * CS SD-SSEL P0.16 + * DIN SD-MOSI P0.18 MOSI0 + * DOUT SD-MISO P0.17 MISO0 + * CLK SD-SCK P0.15 SCK0 + * CD SD-DET P2.12 + */ + +#define ZKITARM_SD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN16) +#ifdef CONFIG_GPIO_IRQ +# define ZKITARM_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN12) +#else +# define ZKITARM_SD_CD (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN12) +#endif + +#define ZKITARM_SD_CDIRQ LPC17_IRQ_P2p12 + +/* USB: + * + * Board LPC1768 + * Signal Pin + * ------------------- -------- + * USB_CONNECT P2.9 USB_CONNECT + * USB_DM P0.29 USB_D- + * USB_DP P0.30 USB_D+ + * USB_VBUS P1.30 USB_VBUS + * USB_UPLED P1.18 USB_UPLED + * + */ + +#define ZKITARM_USB_CONNECT (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN9) +#ifdef CONFIG_GPIO_IRQ +# define ZKITARM_USB_VBUSSENSE (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT1 | GPIO_PIN30) +#else +# define ZKITARM_USB_VBUSSENSE (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT1 | GPIO_PIN30) +#endif + +/* 128x64 LCD with SPI interface + * --------------------------------------- + * The LCD display is connected to the SPI-bus. + * + * ZKit-ARM Signals + * + * ----------------------------+---------------+-------------------------------------------- + * LPC1758 Pin | Board Signal | Description + * ----------------------------+---------------+-------------------------------------------- + * P1.20/MCFB0/PWM1.2/SCK0 | LCD-SCK | LCD Clock signal (D6) + * P1.21/MCABORT/PWM1.3/SSEL0 | LCD-SSEL | LCD Chip Select (CSB) + * P1.22/MCOB0/USB_PWRD/MAT1.0 | LCD-A0 | LCD-A0 (A0) + * P1.23/MCFB1/PWM1.4/MISO0 | N.C | + * P1.24/MCFB2/PWM1.5/MOSI0 | LCD-MOSI | LCD Data (D7) + * P1.25/MCOA1/MAT1.1 | LCD-RST | LCD Reset (RSTB) - Resets Everything in LCD + * ----------------------------+---------------+-------------------------------------------- + */ + +#if 0 +#define ZKITARM_OLED_POWER (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN1) +#define ZKITARM_OLED_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN6) +#define ZKITARM_OLED_DC (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT2 | GPIO_PIN7) +#endif +#define ZKITARM_OLED_RST (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN25) +#define ZKITARM_OLED_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN21) +#define ZKITARM_OLED_RS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN22) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: zkit_sspdev_initialize + * + * Description: + * Called to configure SSP chip select GPIO pins for the ZKit-ARM-1769 board. + * + ************************************************************************************/ + +void weak_function zkit_sspdev_initialize(void); + +/************************************************************************************ + * Name: zkit_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the ZKit-ARM-1769 board. + * + ************************************************************************************/ + +void weak_function zkit_spidev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_ZKITARM_LPC1768_SRC_ZKITARM_H */ diff --git a/configs/zkit-arm-1769/thttpd/Make.defs b/configs/zkit-arm-1769/thttpd/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..a11c2868e8066d90803f38288ecddf43a167b904 --- /dev/null +++ b/configs/zkit-arm-1769/thttpd/Make.defs @@ -0,0 +1,122 @@ +############################################################################ +# configs/zkit-arm-1769/thttpd/Make.defs +# +# Copyright (C) 2013 Zilogic Systems. All rights reserved. +# Author: BabuSubashChandar +# +# Based on configs/lpcxpresso-lpc1768/thttpd/Make.defs +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" + NXFLATLDSCRIPT = -T "${shell cygpath -w $(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script + NXFLATLDSCRIPT = -T"$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld" +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +MKNXFLAT = mknxflat +LDNXFLAT = ldnxflat + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) $(NXFLATLDSCRIPT) -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) +ifneq ($(CROSSDEV),arm-nuttx-eabi-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/zkit-arm-1769/thttpd/defconfig b/configs/zkit-arm-1769/thttpd/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..37066839f2c093471790787f7aedbb7a29138fcb --- /dev/null +++ b/configs/zkit-arm-1769/thttpd/defconfig @@ -0,0 +1,899 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +CONFIG_ARCH_CHIP_LPC17XX=y +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_GPIO_IRQ is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# LPC17xx Configuration Options +# +# CONFIG_ARCH_CHIP_LPC1751 is not set +# CONFIG_ARCH_CHIP_LPC1752 is not set +# CONFIG_ARCH_CHIP_LPC1754 is not set +# CONFIG_ARCH_CHIP_LPC1756 is not set +# CONFIG_ARCH_CHIP_LPC1758 is not set +# CONFIG_ARCH_CHIP_LPC1759 is not set +# CONFIG_ARCH_CHIP_LPC1764 is not set +# CONFIG_ARCH_CHIP_LPC1765 is not set +# CONFIG_ARCH_CHIP_LPC1766 is not set +# CONFIG_ARCH_CHIP_LPC1767 is not set +CONFIG_ARCH_CHIP_LPC1768=y +# CONFIG_ARCH_CHIP_LPC1769 is not set +# CONFIG_ARCH_CHIP_LPC1773 is not set +# CONFIG_ARCH_CHIP_LPC1774 is not set +# CONFIG_ARCH_CHIP_LPC1776 is not set +# CONFIG_ARCH_CHIP_LPC1777 is not set +# CONFIG_ARCH_CHIP_LPC1778 is not set +# CONFIG_ARCH_CHIP_LPC1785 is not set +# CONFIG_ARCH_CHIP_LPC1786 is not set +# CONFIG_ARCH_CHIP_LPC1787 is not set +# CONFIG_ARCH_CHIP_LPC1788 is not set +CONFIG_ARCH_FAMILY_LPC176X=y + +# +# LPC17xx Peripheral Support +# +CONFIG_LPC17_MAINOSC=y +CONFIG_LPC17_PLL0=y +CONFIG_LPC17_PLL1=y +CONFIG_LPC17_ETHERNET=y +# CONFIG_LPC17_USBHOST is not set +# CONFIG_LPC17_USBDEV is not set +CONFIG_LPC17_UART0=y +# CONFIG_LPC17_UART1 is not set +# CONFIG_LPC17_UART2 is not set +# CONFIG_LPC17_UART3 is not set +# CONFIG_LPC17_UART4 is not set +# CONFIG_LPC17_CAN1 is not set +# CONFIG_LPC17_CAN2 is not set +# CONFIG_LPC17_SPI is not set +# CONFIG_LPC17_SSP0 is not set +# CONFIG_LPC17_SSP1 is not set +# CONFIG_LPC17_I2C0 is not set +# CONFIG_LPC17_I2C1 is not set +# CONFIG_LPC17_I2C2 is not set +# CONFIG_LPC17_I2S is not set +# CONFIG_LPC17_TMR0 is not set +# CONFIG_LPC17_TMR1 is not set +# CONFIG_LPC17_TMR2 is not set +# CONFIG_LPC17_TMR3 is not set +# CONFIG_LPC17_RIT is not set +# CONFIG_LPC17_PWM0 is not set +# CONFIG_LPC17_PWM1 is not set +# CONFIG_LPC17_MCPWM is not set +# CONFIG_LPC17_QEI is not set +# CONFIG_LPC17_RTC is not set +# CONFIG_LPC17_WDT is not set +# CONFIG_LPC17_ADC is not set +# CONFIG_LPC17_DAC is not set +# CONFIG_LPC17_GPDMA is not set +# CONFIG_LPC17_FLASH is not set + +# +# External Memory Configuration +# + +# +# Serial driver options +# + +# +# Ethernet driver options +# +CONFIG_PHY_AUTONEG=y +CONFIG_NET_EMACRAM_SIZE=16384 +CONFIG_NET_NTXDESC=18 +CONFIG_NET_NRXDESC=18 +# CONFIG_NET_WOL is not set +# CONFIG_NET_HASH is not set +# CONFIG_LPC17_MULTICAST is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8079 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_LPCXPRESSO is not set +# CONFIG_ARCH_BOARD_MBED is not set +# CONFIG_ARCH_BOARD_NUCLEUS2G is not set +CONFIG_ARCH_BOARD_ZKITARM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="zkit-arm-1769" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +# CONFIG_DISABLE_SIGNALS is not set +CONFIG_DISABLE_MQUEUE=y +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="thttp_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGWORK=17 + +# +# Work Queue Support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=8192 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_MULTINIC is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +CONFIG_NET_NOINTS=y +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +# CONFIG_NET_MULTIBUFFER is not set +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=16 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +# CONFIG_NET_ICMP_PING is not set + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +CONFIG_NXFLAT=y +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +CONFIG_PIC=y +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +CONFIG_EXAMPLES_THTTPD=y +CONFIG_EXAMPLES_THTTPD_NOMAC=y +CONFIG_EXAMPLES_THTTPD_DRIPADDR=0xac100002 +CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00 +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WGET is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_THTTPD=y +CONFIG_THTTPD_PORT=80 +CONFIG_THTTPD_IPADDR=0xac100064 +CONFIG_THTTPD_SERVER_ADDRESS="http://www.nuttx.org" +CONFIG_THTTPD_SERVER_SOFTWARE="thttpd/2.25b 29dec2003-NuttX" +CONFIG_THTTPD_NXFLAT=y +CONFIG_THTTPD_PATH="/mnt/www" +CONFIG_THTTPD_CGI_PATH="/mnt/www/cgi-bin" +CONFIG_THTTPD_CGI_PATTERN="/mnt/www/cgi-bin/*" +CONFIG_THTTPD_CGI_PRIORITY=50 +CONFIG_THTTPD_CGI_STACKSIZE=1024 +CONFIG_THTTPD_CGI_BYTECOUNT=20000 +CONFIG_THTTPD_CGI_TIMELIMIT=0 +CONFIG_THTTPD_CHARSET="iso-8859-1" +CONFIG_THTTPD_IOBUFFERSIZE=1024 +CONFIG_THTTPD_MINSTRSIZE=64 +CONFIG_THTTPD_REALLOCINCR=64 +CONFIG_THTTPD_MAXREALLOC=4096 +CONFIG_THTTPD_CGIINBUFFERSIZ=512 +CONFIG_THTTPD_CGIOUTBUFFERSIZE=512 +CONFIG_THTTPD_INDEX_NAMES="\"index.html\", \"index.htm\", \"index.cgi\"" +# CONFIG_THTTPD_USE_AUTH_FILE is not set +CONFIG_THTTPD_LISTEN_BACKLOG=8 +CONFIG_THTTPD_LINGER_MSEC=500 +CONFIG_THTTPD_OCCASIONAL_MSEC=120 +CONFIG_THTTPD_IDLE_READ_LIMIT_SEC=300 +CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300 +# CONFIG_THTTPD_USE_TILDE_MAP1 is not set +# CONFIG_THTTPD_USE_TILDE_MAP2 is not set +CONFIG_THTTPD_TILDE_MAP_NONE=y +# CONFIG_THTTPD_GENERATE_INDICES is not set +# CONFIG_THTTPD_USE_URLPATTERN is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/zkit-arm-1769/thttpd/setenv.sh b/configs/zkit-arm-1769/thttpd/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..6d93498a7b49bb1585890b356083be17021e372b --- /dev/null +++ b/configs/zkit-arm-1769/thttpd/setenv.sh @@ -0,0 +1,72 @@ +#!/bin/bash +# configs/zkit-arm-1769/thttpd/setenv.sh +# +# Copyright (C) 2013 Zilogic Systems. All rights reserved. +# Author: BabuSubashChandar +# +# Based on configs/lpcxpresso-lpc1768/thttpd/setenv.sh +# +# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is where the buildroot might reside on a Linux or Cygwin system +# A minimal buildroot version with the NXFLAT tools is always required +# for this configuration in order to buildthe THTTPD CGI programs +export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# This is the default install location for Code Red on Linux +#export TOOLCHAIN_BIN="/usr/local/LPCXpresso/tools/bin" + +# This the Cygwin path to the LPCXpresso 3.6 install location under Windows +#export TOOLCHAIN_BIN="/cygdrive/c/nxp/lpcxpresso_3.6/Tools/bin" + +# This is the path to the LPCXpression tool subdirectory +export LPCTOOL_DIR="${WD}/configs/zkit-arm-1769/tools" + +# Add the path to the toolchain to the PATH varialble +export PATH="${LPCTOOL_DIR}:${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/zp214xpa/Kconfig b/configs/zp214xpa/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..1b6ac79fa5ef15193de99e65df62139008e110ab --- /dev/null +++ b/configs/zp214xpa/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_ZP214XPA +endif diff --git a/configs/zp214xpa/README.txt b/configs/zp214xpa/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..471d648e0491bb709e1b82a2ffd2a337c35e522e --- /dev/null +++ b/configs/zp214xpa/README.txt @@ -0,0 +1,342 @@ +zp214xpa README FILE +==================== + +The ZP213X/4XPA board from the0.net with LPC2148 installed. +Includes support for the UG-2864AMBAG01 OLED from The0.net. + +Contents +======== + + o MCU Connections + o Serial Console + o Using OpenOCD and GDB with an FT2232 JTAG emulator + o Configurations + +MCU Connections: +================ + +The ZP213X/4XPA board is no more than an LPC2148, crystals, +USB device and several connectors. + + Module Socket: + -------------- + PIN NAME PIN NAME + 1 VBAT 56 VCC + 2 3V3 55 Vusb + 3 VREF 54 3V3 + 4 P0.0 53 RESET + 5 P0.1 52 P1.31 + 6 P0.2 51 P1.30 + 7 P0.3 50 P1.29 + 8 P0.4 49 P1.28 + 9 P0.5 48 P1.27 + 10 P0.6 47 P1.26 + 11 P0.7 46 P1.25 + 12 P0.8 45 P1.24 + 13 P0.9 44 P1.23 + 14 P0.10 43 P1.22 + 15 P0.11 42 P1.21 + 16 P0.12 41 P1.20 + 17 P0.13 40 P1.19 + 18 P0.14 39 P1.18 + 19 P0.15 38 P1.17 + 20 P0.16 37 P1.16 + 21 P0.17 36 P0.31 + 22 P0.18 35 P0.30 + 23 P0.19 34 P0.29 + 24 P0.20 33 P0.28 + 25 P0.21 32 P0.27 + 26 P0.22 31 P0.26 + 27 P0.23 30 P0.25 + 28 GND 29 GND + + JTAG Debug: + ----------- + PIN NAME PIN NAME + 1 VCC1 2 3V3 + 3 P1.31 NTRST 4 GND + 5 P1.28 TDI 6 GND + 7 P1.30 TMS 8 GND + 9 P1.29 TCK 10 GND + 11 P1.26 RTCK 12 GND + 13 P1.27 TDO 14 GND + 15 RESET NRTS 16 GND + 17 N/C NC0 18 GND + 19 N/C NC1 20 GND + + Z28160 Net Module: + ------------------ + PIN NAME PIN NAME + 1 P0.7 /CS 10 3V3 VCC + 2 P0.4 SCK 9 P1.24 RST + 3 P0.6 SI 8 N/C CLKOUT + 4 P0.5 SO 7 INT P1.25 + 5 GND 6 N/C WOL + + SPI LCD: + -------- + PIN NAME + 1 3V3 3V3 + 2 VCC 5V + 3 P0.18 RESET(DO) + 4 P0.19 DI + 5 P0.20 CS + 6 P0.17 SCK + 7 P0.23 A0(RESET) + 8 N/C LED- + 9 N/C LED+(BL) + 10 GND GND + + USB Interface: + -------------- + Vusb, P0.26, P0.27 + +Serial Console: +=============== + + Both UART0 and UART1 are always enabled. UART0 is configured to be the + serial console in these configurations. + + P0.0/TXD0/PWM1 Module Socket, Pin 4 + P0.1/RxD0/PWM3/EINT0 Module Socket, Pin 5 + + P0.8/TXD1/PWM4/AD1.1 Module Socket, Pin 12 + P0.9/RxD1/PWM6/EINT3 Module Socket, Pin 13 + +LCD Interface +============= + + PIN NAME PIN CONFIGURATION + 3 RESET P0.18/CAP1.3/MISO1/MAT1.3P0.18 RESET - General purpose output + 4 DI P0.19/MAT1.2/MOSI1/CAP1.2P0.19 DI - Alternate function 2 + 5 CS P0.20/MAT1.3/SSEL1/EINT3 - General purpose output + 6 SCK P0.17/CAP1.2/SCK1/MAT1.2 - Alternate function 2 + 7 A0 P0.23/VBUS - General purpose output + +ENC29J60 Interface +================== + + PIN NAME PIN CONFIGURATION + 1 /CS P0.7/SSEL0/PWM2/EINT2 - General purpose output + 2 SCK P0.4/SCK0/CAP0.1/AD0.6 - Alternate function 1 + 3 SI P0.6/MOSI0/CAP0.2/AD1.0 - Alternate function 1 + 4 SO P0.5/MISO0/MAT0.1/AD0.7 - Alternate function 1 + 7 INT P1.25/EXTIN0 - Alternal function 1 + 9 RST P1.24/TRACECLK - General purpose output + +Using OpenOCD and GDB with an FT2232 JTAG emulator +================================================== + + Downloading OpenOCD + + You can get information about OpenOCD here: http://openocd.berlios.de/web/ + and you can download it from here. http://sourceforge.net/projects/openocd/files/. + To get the latest OpenOCD with more mature lpc214x, you have to download + from the GIT archive. + + git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd + + At present, there is only the older, frozen 0.4.0 version. These, of course, + may have changed since I wrote this. + + Building OpenOCD under Cygwin: + + You can build OpenOCD for Windows using the Cygwin tools. Below are a + few notes that worked as of November 7, 2010. Things may have changed + by the time you read this, but perhaps the following will be helpful to + you: + + 1. Install Cygwin (http://www.cygwin.com/). My recommendation is to install + everything. There are many tools you will need and it is best just to + waste a little disk space and have everthing you need. Everything will + require a couple of gigbytes of disk space. + + 2. Create a directory /home/OpenOCD. + + 3. Get the FT2232 drivr from http://www.ftdichip.com/Drivers/D2XX.htm and + extract it into /home/OpenOCD/ftd2xx + + $ pwd + /home/OpenOCD + $ ls + CDM20802 WHQL Certified.zip + $ mkdir ftd2xx + $ cd ftd2xx + $ unzip ..CDM20802\ WHQL\ Certified.zip + Archive: CDM20802 WHQL Certified.zip + ... + + 3. Get the latest OpenOCD source + + $ pwd + /home/OpenOCD + $ git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd + + You will then have the source code in /home/OpenOCD/openocd + + 4. Build OpenOCD for the FT22322 interface + + $ pwd + /home/OpenOCD/openocd + $ ./bootstrap + + Jim is a tiny version of the Tcl scripting language. It is needed + by more recent versions of OpenOCD. Build libjim.a using the following + instructions: + + $ git submodule init + $ git submodule update + $ cd jimtcl + $ ./configure --with-jim-ext=nvp + $ make + $ make install + + Configure OpenOCD: + + $ ./configure --enable-maintainer-mode --disable-werror --disable-shared \ + --enable-ft2232_ftd2xx --with-ftd2xx-win32-zipdir=/home/OpenOCD/ftd2xx \ + LDFLAGS="-L/home/OpenOCD/openocd/jimtcl" + + Then build OpenOCD and its HTML documentation: + + $ make + $ make html + + The result of the first make will be the "openocd.exe" will be + created in the folder /home/openocd/src. The following command + will install OpenOCD to a standard location (/usr/local/bin) + using using this command: + + $ make install + + Helper Scripts. + + I have been using the Olimex ARM-USB-OCD JTAG debugger with the + ZP213X/4XPA. OpenOCD requires a configuration file. I keep the + one I used last here: + + configs/zpa214xpa/tools/olimex.cfg + + However, the "correct" configuration script to use with OpenOCD may + change as the features of OpenOCD evolve. So you should at least + compare that olimex.cfg file with configuration files in + /usr/local/share/openocd/scripts/target (or /home/OpenOCD/openocd/tcl/target). + + There is also a script on the tools/ directory that I use to start + the OpenOCD daemon on my system called oocd.sh. That script will + probably require some modifications to work in another environment: + + - Possibly the value of OPENOCD_PATH and TARGET_PATH + - It assumes that the correct script to use is the one at + configs/zp214xpa/tools/olimex.cfg + + Starting OpenOCD + + Then you should be able to start the OpenOCD daemon like: + + configs/zp214xpa/tools/oocd.sh $PWD + + If you use the setenv.sh file, that the path to oocd.sh will be added + to your PATH environment variabl. So, in that case, the command simplifies + to just: + + oocd.sh $PWD + + Where it is assumed that you are executing oocd.sh from the top-level + directory where NuttX is installed. $PWD will be the path to the + top-level NuttX directory. + + Connecting GDB + + Once the OpenOCD daemon has been started, you can connect to it via + GDB using the following GDB command: + + arm-nuttx-elf-gdb + (gdb) target remote localhost:3333 + + NOTE: The name of your GDB program may differ. For example, with the + CodeSourcery toolchain, the ARM GDB would be called arm-none-eabi-gdb. + + After starting GDB, you can load the NuttX ELF file: + + (gdb) symbol-file nuttx + (gdb) load nuttx + + NOTES: + 1. Loading the symbol-file is only useful if you have built NuttX to + include debug symbols (by setting CONFIG_DEBUG_SYMBOLS=y in the + .config file). + + OpenOCD will support several special 'monitor' commands. These + GDB commands will send comments to the OpenOCD monitor. Here + are a couple that you will need to use: + + (gdb) monitor reset + (gdb) monitor halt + + NOTES: + 1. The MCU must be halted using 'mon halt' prior to loading code. + 2. Reset will restart the processor after loading code. + 3. The 'monitor' command can be abbreviated as just 'mon'. + +Configurations: +=============== + + Each NXP LPC214x configuration is maintained in a sub-directory and + can be selected as follow: + + cd tools + ./configure.sh zp214xpa/ + cd - + . ./setenv.sh + + Where is one of the following: + + nsh: + ---- + + Configures the NuttShell (nsh) located at examples/nsh. The + Configuration enables only the serial NSH interfaces. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default platform/toolchain: + + CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too). + CONFIG_ARM_TOOLCHAIN_GNU_EABIL=y : Buildroot (arm-nuttx-elf-gcc) + CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary + + nxlines: + -------- + + This is the apps/examples/nxlines test using the UG_2864AMBAG01 board + from The0.net that plugs into the "SPI LCD" connector on the ZP3X4XPA + board. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default platform/toolchain: + + CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too). + CONFIG_ARM_TOOLCHAIN_GNU_EABIL=y : Buildroot (arm-nuttx-elf-gcc) + CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary + + 3. Verified as of this writing (2012-12-30). diff --git a/configs/zp214xpa/include/board.h b/configs/zp214xpa/include/board.h new file mode 100644 index 0000000000000000000000000000000000000000..20d42a8492100b482fa86df0e6040d2e4d3c6006 --- /dev/null +++ b/configs/zp214xpa/include/board.h @@ -0,0 +1,68 @@ +/**************************************************************************** + * configs/zp214xpa/include/board.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_ZP214XPA_INCLUDE_BOARD_H +#define __CONFIGS_ZP214XPA_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* Oscillator frequency */ + +#define LPC214X_FOSC 12000000 + +/* PLL0 settings CCLK = PLL_M * FOSC PCLK = CCLK/APBDIV */ + +#define LPC214X_PLL_M 5 +#define LPC214X_PLL_P 2 +#define LPC214X_APB_DIV 1 + +/* USB Pll settings -- 48 MHz needed. FUSB = PLL_M FOSC */ + +#define LPC214X_USBPLL_M 4 +#define LPC214X_USBPLL_P 2 + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +#endif /* __CONFIGS_ZP214XPA_INCLUDE_BOARD_H */ diff --git a/configs/zp214xpa/nsh/Make.defs b/configs/zp214xpa/nsh/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..5fdba6c38ba82661b59bd1022b4fd7775333c475 --- /dev/null +++ b/configs/zp214xpa/nsh/Make.defs @@ -0,0 +1,125 @@ +############################################################################## +# configs/zp214xpa/nsh/Make.defs +# +# Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(ARCHCCMAJOR),4) +ifneq ($(HOSTOS),Cygwin) + OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment +endif +endif + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/zp214xpa/nsh/defconfig b/configs/zp214xpa/nsh/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..cec8851c1941ebc8c32f320c14227f5ef3927d7a --- /dev/null +++ b/configs/zp214xpa/nsh/defconfig @@ -0,0 +1,755 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +CONFIG_ARCH_CHIP_LPC214X=y +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="lpc214x" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARM_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set + +# +# LPC214x Configuration Options +# +CONFIG_ARCH_CHIP_LPC2148=y + +# +# LPC214x Initialization Options +# +# CONFIG_EXTMEM_MODE is not set +# CONFIG_RAM_MODE is not set +CONFIG_DEFAULT_MODE=y +CONFIG_CODE_BASE=0x00000000 +CONFIG_PLL_SETUP=y +CONFIG_MAM_SETUP=y +CONFIG_APBDIV_SETUP=y +CONFIG_APBDIV_VALUE=1 +# CONFIG_EMC_SETUP is not set +# CONFIG_BCFG0_SETUP is not set +# CONFIG_BCFG1_SETUP is not set +# CONFIG_BCFG2_SETUP is not set +# CONFIG_BCFG3_SETUP is not set +CONFIG_ADC_SETUP=y + +# +# LPC214x Peripheral Support +# +CONFIG_LPC214X_UART0=y +CONFIG_LPC214X_UART1=y +# CONFIG_LPC214x_FIO is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=3270 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x40000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MCU123_LPC214X is not set +CONFIG_ARCH_BOARD_ZP214XPA=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="zp214xpa" + +# +# Common Board Options +# +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=38400 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=38400 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/zp214xpa/nsh/setenv.sh b/configs/zp214xpa/nsh/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..a35d34aa56dbb44a89dfab5c9a462d659be6bb52 --- /dev/null +++ b/configs/zp214xpa/nsh/setenv.sh @@ -0,0 +1,65 @@ +#!/bin/bash +# configs/zp214xpa/nsh/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The zp214xpa/tools directory +export LPCTOOL_DIR="${WD}/configs/zp214xpa/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/zp214xpa/nxlines/Make.defs b/configs/zp214xpa/nxlines/Make.defs new file mode 100644 index 0000000000000000000000000000000000000000..8f8f9b00890df4aa349c3ee455780c8c45003155 --- /dev/null +++ b/configs/zp214xpa/nxlines/Make.defs @@ -0,0 +1,125 @@ +############################################################################## +# configs/zp214xpa/nxlines/Make.defs +# +# Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(ARCHCCMAJOR),4) +ifneq ($(HOSTOS),Cygwin) + OBJCOPYARGS = -R .note -R .note.gnu.build-id -R .comment +endif +endif + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ifeq ($(ARCHCCMAJOR),4) + ARCHCPUFLAGS = -mcpu=arm7tdmi -mfloat-abi=soft +else + ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ + -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ + -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/zp214xpa/nxlines/defconfig b/configs/zp214xpa/nxlines/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..8dab6945300308a8042f9b01363802a6f96ea8b1 --- /dev/null +++ b/configs/zp214xpa/nxlines/defconfig @@ -0,0 +1,813 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +CONFIG_ARCH_CHIP_LPC214X=y +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +CONFIG_ARCH_ARM7TDMI=y +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="arm" +CONFIG_ARCH_CHIP="lpc214x" +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +# CONFIG_ARCH_LOWVECTORS is not set + +# +# ARM Configuration Options +# +# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARM_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARM_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set + +# +# LPC214x Configuration Options +# +CONFIG_ARCH_CHIP_LPC2148=y + +# +# LPC214x Initialization Options +# +# CONFIG_EXTMEM_MODE is not set +# CONFIG_RAM_MODE is not set +CONFIG_DEFAULT_MODE=y +CONFIG_CODE_BASE=0x00000000 +CONFIG_PLL_SETUP=y +CONFIG_MAM_SETUP=y +CONFIG_APBDIV_SETUP=y +CONFIG_APBDIV_VALUE=1 +# CONFIG_EMC_SETUP is not set +# CONFIG_BCFG0_SETUP is not set +# CONFIG_BCFG1_SETUP is not set +# CONFIG_BCFG2_SETUP is not set +# CONFIG_BCFG3_SETUP is not set +CONFIG_ADC_SETUP=y + +# +# LPC214x Peripheral Support +# +CONFIG_LPC214X_UART0=y +CONFIG_LPC214X_UART1=y +# CONFIG_LPC214x_FIO is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=3270 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x40000000 +CONFIG_RAM_SIZE=32768 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_MCU123_LPC214X is not set +CONFIG_ARCH_BOARD_ZP214XPA=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="zp214xpa" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +CONFIG_BOARDCTL_GRAPHICS=y +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nxlines_main" +CONFIG_RR_INTERVAL=0 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_EXCHANGE is not set +CONFIG_SPI_CMDDATA=y +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +CONFIG_LCD=y + +# +# Common LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=255 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_ST7565 is not set +# CONFIG_LCD_ST7567 is not set +CONFIG_LCD_UG2864AMBAG01=y +CONFIG_UG2864AMBAG01_SPIMODE=3 +CONFIG_UG2864AMBAG01_FREQUENCY=3500000 +CONFIG_UG2864AMBAG01_NINTERFACES=1 +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set + +# +# Alphanumeric/Segment LCD Devices +# +# CONFIG_LCD_LCD1602 is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +CONFIG_ARCH_HAVE_UART0=y +CONFIG_ARCH_HAVE_UART1=y +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_UART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=38400 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=38400 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +CONFIG_NX_WRITEONLY=y + +# +# Supported Pixel Depths +# +# CONFIG_NX_DISABLE_1BPP is not set +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +CONFIG_NX_XYINPUT_NONE=y +# CONFIG_NX_XYINPUT_MOUSE is not set +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +# CONFIG_NX_KBD is not set + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=2 +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +CONFIG_NXTK_BORDERCOLOR1=0x01 +CONFIG_NXTK_BORDERCOLOR2=0x01 +CONFIG_NXTK_BORDERCOLOR3=0x01 +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +CONFIG_NXFONT_MONO5X8=y +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +CONFIG_EXAMPLES_NXLINES=y +CONFIG_EXAMPLES_NXLINES_VPLANE=0 +CONFIG_EXAMPLES_NXLINES_DEVNO=0 +# CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x00 +CONFIG_EXAMPLES_NXLINES_LINEWIDTH=4 +CONFIG_EXAMPLES_NXLINES_LINECOLOR=0x01 +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4 +CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0x01 +CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0x00 +CONFIG_EXAMPLES_NXLINES_BPP=1 +CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_PPPD is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/zp214xpa/nxlines/setenv.sh b/configs/zp214xpa/nxlines/setenv.sh new file mode 100644 index 0000000000000000000000000000000000000000..b2872cdc52df36e4dc19ce1db4db705a4894e225 --- /dev/null +++ b/configs/zp214xpa/nxlines/setenv.sh @@ -0,0 +1,65 @@ +#!/bin/bash +# configs/zp214xpa/nxlines/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# The zp214xpa/tools directory +export LPCTOOL_DIR="${WD}/configs/zp214xpa/tools" + +# Add the path to the toolchain and tools directory to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${LPCTOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/zp214xpa/scripts/ld.script b/configs/zp214xpa/scripts/ld.script new file mode 100644 index 0000000000000000000000000000000000000000..ba6ff8f2c1683774e0dcda29ffa6fd9a40c20bb1 --- /dev/null +++ b/configs/zp214xpa/scripts/ld.script @@ -0,0 +1,120 @@ +/**************************************************************************** + * configs/zp214xpa/scripts/ld.script + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* FLASH: + * The lpc2148 has 512Kb of non-volatile memory beginning at address + * 0x0000:0000. The OS entry point is via the reset vector at address + * 0x0000:0000 (default MEMMAP mode assumed) + * + * SRAM: + * The lpc2148 has 32Kb of on-chip static RAM beginning at address + * 0x4000:0000. The .data section will be relocated from _eronly + * to _sdata at boot time. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 500K + sram (rw) : ORIGIN = 0x40000000, LENGTH = 32K - 32 +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/zp214xpa/src/.gitignore b/configs/zp214xpa/src/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..726d936e1e3390cc875a1fa5681e3c3988fe3c8b --- /dev/null +++ b/configs/zp214xpa/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/zp214xpa/src/Makefile b/configs/zp214xpa/src/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..78bf980efea553f027b74fd1fd18cc55dabaca0e --- /dev/null +++ b/configs/zp214xpa/src/Makefile @@ -0,0 +1,49 @@ +############################################################################ +# configs/zp214xpa/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = + +ifeq ($(CONFIG_LCD_UG2864AMBAG01),y) +CSRCS += lpc2148_ug2864ambag01.c lpc2148_spi1.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += lpc2148_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/zp214xpa/src/lpc2148_appinit.c b/configs/zp214xpa/src/lpc2148_appinit.c new file mode 100644 index 0000000000000000000000000000000000000000..ae403949bc19c27858d1c5e475e9d4874934aa96 --- /dev/null +++ b/configs/zp214xpa/src/lpc2148_appinit.c @@ -0,0 +1,66 @@ +/**************************************************************************** + * config/zp214xpa/src/lpc2148_appinit.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#ifdef CONFIG_LIB_BOARDCTL + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + return OK; +} + +#endif /* CONFIG_LIB_BOARDCTL */ diff --git a/configs/zp214xpa/src/lpc2148_spi1.c b/configs/zp214xpa/src/lpc2148_spi1.c new file mode 100644 index 0000000000000000000000000000000000000000..43fb0e095b43ee16e17c1b1a68cd0399aeec5884 --- /dev/null +++ b/configs/zp214xpa/src/lpc2148_spi1.c @@ -0,0 +1,672 @@ +/**************************************************************************** + * config/zp214xpa/src/lpc2148_spi1.c + * + * Copyright (C) 2008-2010, 2012, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * LCD Interface + * + * PIN NAME PIN CONFIGURATION + * 3 RESET P0.18/CAP1.3/MISO1/MAT1.3P0.18 - General purpose output + * 4 DI P0.19/MAT1.2/MOSI1/CAP1.2P0.19 - Alternate function 2 + * 5 CS P0.20/MAT1.3/SSEL1/EINT3 - General purpose output + * 6 SCK P0.17/CAP1.2/SCK1/MAT1.2 - Alternate function 2 + * 7 A0 P0.23/VBUS - General purpose output + * + * ENC29J60 Interface + * + * PIN NAME PIN CONFIGURATION + * 1 /CS P0.7/SSEL0/PWM2/EINT2 - General purpose output + * 2 SCK P0.4/SCK0/CAP0.1/AD0.6 - Alternate function 1 + * 3 SI P0.6/MOSI0/CAP0.2/AD1.0 - Alternate function 1 + * 4 SO P0.5/MISO0/MAT0.1/AD0.7 - Alternate function 1 + * 7 INT P1.25/EXTIN0 - Alternal function 1 + * 9 RST P1.24/TRACECLK + * + * This file provides support only for the LCD interface on SPI1. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "up_internal.h" +#include "up_arch.h" + +#include "chip.h" +#include "lpc214x_power.h" +#include "lpc214x_pinsel.h" +#include "lpc214x_spi.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Enables debug output from this file */ + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/* Clocking */ + +#define LPC214X_CCLKFREQ (LPC214X_FOSC*LPC214X_PLL_M) +#define LPC214X_PCLKFREQ (LPC214X_CCLKFREQ/LPC214X_APB_DIV) + +/* Use either FIO or legacy GPIO */ + +#ifdef CONFIG_LPC214x_FIO +# define CS_PIN_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_PIN_OFFSET) +# define CS_SET_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_SET_OFFSET) +# define CS_CLR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_CLR_OFFSET) +# define CS_DIR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_DIR_OFFSET) +#else +# define CS_PIN_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_PIN_OFFSET) +# define CS_SET_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_SET_OFFSET) +# define CS_CLR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_CLR_OFFSET) +# define CS_DIR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_DIR_OFFSET) +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int spi_lock(FAR struct spi_dev_s *dev, bool lock); +static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency); +static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +#ifdef CONFIG_SPI_CMDDATA +static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd); +#endif +static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t ch); +static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords); +static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct spi_ops_s g_spiops = +{ + .lock = spi_lock, + .select = spi_select, + .setfrequency = spi_setfrequency, + .status = spi_status, +#ifdef CONFIG_SPI_CMDDATA + .cmddata = spi_cmddata, +#endif + .send = spi_send, + .sndblock = spi_sndblock, + .recvblock = spi_recvblock, + .registercallback = 0, /* Not implemented */ +}; + +static struct spi_dev_s g_spidev = {&g_spiops}; +static sem_t g_exclsem = SEM_INITIALIZER(1); /* For mutually exclusive access */ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: spi_lock + * + * Description: + * On SPI busses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the busses for a sequence of + * transfers. The bus should be locked before the chip is selected. After + * locking the SPI bus, the caller should then also call the setfrequency, + * setbits, and setmode methods to make sure that the SPI is properly + * configured for the device. If the SPI buss is being shared, then it + * may have been left in an incompatible state. + * + * Input Parameters: + * dev - Device-specific state data + * lock - true: Lock spi bus, false: unlock SPI bus + * + * Returned Value: + * None + * + ****************************************************************************/ + +static int spi_lock(FAR struct spi_dev_s *dev, bool lock) +{ + if (lock) + { + /* Take the semaphore (perhaps waiting) */ + + while (sem_wait(&g_exclsem) != 0) + { + /* The only case that an error should occur here is if the wait + * was awakened by a signal. + */ + + DEBUGASSERT(errno == EINTR); + } + } + else + { + (void)sem_post(&g_exclsem); + } + + return OK; +} + +/**************************************************************************** + * Name: spi_select + * + * Description: + * Enable/disable the SPI slave select. The implementation of this method + * must include handshaking: If a device is selected, it must hold off + * all other attempts to select the device until the device is deselecte. + * + * Input Parameters: + * dev - Device-specific state data + * devid - Identifies the device to select + * selected - true: slave selected, false: slave de-selected + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ +#ifdef CONFIG_DEBUG_SPI + uint32_t regval; +#endif + uint32_t bit = 1 << 20; + + /* We do not bother to check if devid == SPIDEV_DISPLAY because that is the + * only thing on the bus. + */ + +#ifdef CONFIG_DEBUG_SPI + regval = getreg32(CS_PIN_REGISTER); +#endif + + if (selected) + { + /* Enable slave select (low enables) */ + + putreg32(bit, CS_CLR_REGISTER); + spidbg("CS asserted: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER)); + } + else + { + /* Disable slave select (low enables) */ + + putreg32(bit, CS_SET_REGISTER); + spidbg("CS de-asserted: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER)); + + /* Wait for the TX FIFO not full indication */ + + while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF)); + putreg16(0xff, LPC214X_SPI1_DR); + + /* Wait until TX FIFO and TX shift buffer are empty */ + + while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_BSY); + + /* Wait until RX FIFO is not empty */ + + while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE)); + + /* Then read and discard bytes until the RX FIFO is empty */ + + do + { + (void)getreg16(LPC214X_SPI1_DR); + } + while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE); + } +} + +/**************************************************************************** + * Name: spi_setfrequency + * + * Description: + * Set the SPI frequency. + * + * Input Parameters: + * dev - Device-specific state data + * frequency - The SPI frequency requested + * + * Returned Value: + * Returns the actual frequency selected + * + ****************************************************************************/ + +static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency) +{ + uint32_t divisor = LPC214X_PCLKFREQ / frequency; + + if (divisor < 2) + { + divisor = 2; + } + else if (divisor > 254) + { + divisor = 254; + } + + divisor = (divisor + 1) & ~1; + putreg8(divisor, LPC214X_SPI1_CPSR); + + spidbg("Frequency %d->%d\n", frequency, LPC214X_PCLKFREQ / divisor); + return LPC214X_PCLKFREQ / divisor; +} + +/**************************************************************************** + * Name: spi_status + * + * Description: + * Get SPI/MMC status + * + * Input Parameters: + * dev - Device-specific state data + * devid - Identifies the device to report status on + * + * Returned Value: + * Returns a bitset of status values (see SPI_STATUS_* defines + * + ****************************************************************************/ + +static uint8_t spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + spidbg("Return 0\n"); + return 0; +} + +/**************************************************************************** + * Name: spi_cmddata + * + * Description: + * Some devices require and additional out-of-band bit to specify if the + * next word sent to the device is a command or data. This is typical, for + * example, in "9-bit" displays where the 9th bit is the CMD/DATA bit. + * This function provides selection of command or data. + * + * This "latches" the CMD/DATA state. It does not have to be called before + * every word is transferred; only when the CMD/DATA state changes. This + * method is required if CONFIG_SPI_CMDDATA is selected in the NuttX + * configuration + * + * Input Parameters: + * dev - Device-specific state data + * cmd - TRUE: The following word is a command; FALSE: the following words + * are data. + * + * Returned Value: + * OK unless an error occurs. Then a negated errno value is returned + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +static int spi_cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ +#ifdef CONFIG_DEBUG_SPI + uint32_t regval; +#endif + uint32_t bit = 1 << 23; + + /* We do not bother to check if devid == SPIDEV_DISPLAY because that is the + * only thing on the bus. + */ + + /* "This is the Data/Command control pad which determines whether the + * data bits are data or a command. + * + * A0 = H: the inputs at D0 to D7 are treated as display data. + * A0 = L: the inputs at D0 to D7 are transferred to the command registers." + */ + +#ifdef CONFIG_DEBUG_SPI + regval = getreg32(CS_PIN_REGISTER); +#endif + + if (cmd) + { + /* L: the inputs at D0 to D7 are transferred to the command registers */ + + putreg32(bit, CS_CLR_REGISTER); + spidbg("Command: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER)); + } + else + { + /* H: the inputs at D0 to D7 are treated as display data. */ + + putreg32(bit, CS_SET_REGISTER); + spidbg("Data: %08x->%08x\n", regval, getreg32(CS_PIN_REGISTER)); + } + + return OK; +} +#endif + +/**************************************************************************** + * Name: spi_send + * + * Description: + * Exchange one word on SPI + * + * Input Parameters: + * dev - Device-specific state data + * wd - The word to send. the size of the data is determined by the + * number of bits selected for the SPI interface. + * + * Returned Value: + * response + * + ****************************************************************************/ + +static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd) +{ + register uint16_t regval; + + /* Wait while the TX FIFO is full */ + + while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF)); + + /* Write the byte to the TX FIFO */ + + putreg16((uint8_t)wd, LPC214X_SPI1_DR); + + /* Wait for the RX FIFO not empty */ + + while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE)); + + /* Get the value from the RX FIFO and return it */ + + regval = getreg16(LPC214X_SPI1_DR); + spidbg("%04x->%04x\n", wd, regval); + return regval; +} + +/**************************************************************************** + * Name: spi_sndblock + * + * Description: + * Send a block of data on SPI + * + * Input Parameters: + * dev - Device-specific state data + * buffer - A pointer to the buffer of data to be sent + * nwords - the length of data to send from the buffer in number of words. + * The wordsize is determined by the number of bits-per-word + * selected for the SPI interface. If nbits <= 8, the data is + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords) +{ + FAR const uint8_t *ptr = (FAR const uint8_t *)buffer; + uint8_t sr; + + /* Loop while thre are bytes remaining to be sent */ + + spidbg("nwords: %d\n", nwords); + while (nwords > 0) + { + /* While the TX FIFO is not full and there are bytes left to send */ + + while ((getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF) && nwords) + { + /* Send the data */ + + putreg16((uint16_t)*ptr, LPC214X_SPI1_DR); + ptr++; + nwords--; + } + } + + /* Then discard all card responses until the RX & TX FIFOs are emptied. */ + + spidbg("discarding\n"); + do + { + /* Is there anything in the RX fifo? */ + + sr = getreg8(LPC214X_SPI1_SR); + if ((sr & LPC214X_SPI1SR_RNE) != 0) + { + /* Yes.. Read and discard */ + + (void)getreg16(LPC214X_SPI1_DR); + } + + /* There is a race condition where TFE may go true just before + * RNE goes true and this loop terminates prematurely. The nasty little + * delay in the following solves that (it could probably be tuned + * to improve performance). + */ + + else if ((sr & LPC214X_SPI1SR_TFE) != 0) + { + up_udelay(100); + sr = getreg8(LPC214X_SPI1_SR); + } + } + while ((sr & LPC214X_SPI1SR_RNE) != 0 || (sr & LPC214X_SPI1SR_TFE) == 0); +} + +/**************************************************************************** + * Name: spi_recvblock + * + * Description: + * Revice a block of data from SPI + * + * Input Parameters: + * dev - Device-specific state data + * buffer - A pointer to the buffer in which to recieve data + * nwords - the length of data that can be received in the buffer in number + * of words. The wordsize is determined by the number of bits-per-word + * selected for the SPI interface. If nbits <= 8, the data is + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords) +{ + FAR uint8_t *ptr = (FAR uint8_t*)buffer; + uint32_t rxpending = 0; + + /* While there is remaining to be sent (and no synchronization error has occurred) */ + + spidbg("nwords: %d\n", nwords); + while (nwords || rxpending) + { + /* Fill the transmit FIFO with 0xff... + * Write 0xff to the data register while (1) the TX FIFO is + * not full, (2) we have not exceeded the depth of the TX FIFO, + * and (3) there are more bytes to be sent. + */ + + spivdbg("TX: rxpending: %d nwords: %d\n", rxpending, nwords); + while ((getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF) && + (rxpending < LPC214X_SPI1_FIFOSZ) && nwords) + { + putreg16(0xff, LPC214X_SPI1_DR); + nwords--; + rxpending++; + } + + /* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */ + + spivdbg("RX: rxpending: %d\n", rxpending); + while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE) + { + *ptr++ = (uint8_t)getreg16(LPC214X_SPI1_DR); + rxpending--; + } + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc214x_spibus_initialize + * + * Description: + * Initialize the selected SPI port + * + * Input Parameter: + * Port number (for hardware that has mutiple SPI interfaces) + * + * Returned Value: + * Valid SPI device structre reference on succcess; a NULL on failure + * + ****************************************************************************/ + +FAR struct spi_dev_s *lpc214x_spibus_initialize(int port) +{ + uint32_t regval32; + uint8_t regval8; + int i; + + /* Only the SPI1 interface is supported */ + +#ifdef CONFIG_DEBUG + if (port != 1) + { + return NULL; + } +#endif + + /* Configure multiplexed pins as connected on the ZP213X/4XPA board: + * + * PINSEL1 P0.17/CAP1.2/SCK1/MAT1.2 Bits 2-3=10 for SCK1 + * PINSEL1 P0.18/CAP1.3/MISO1/MAT1.3 Bits 4-5=10 for MISO1 + * (This is the RESET line for the UG_2864AMBAG01, + * although it is okay to configure it as an input too) + * PINSEL1 P0.19/MAT1.2/MOSI1/CAP1.2 Bits 6-7=10 for MOSI1 + * PINSEL1 P0.20/MAT1.3/SSEL1/EINT3 Bits 8-9=00 for P0.20 (we'll control it via GPIO or FIO) + * PINSEL1 P0.23/VBUS Bits 12-13=00 for P0.21 (we'll control it via GPIO or FIO) + */ + + regval32 = getreg32(LPC214X_PINSEL1); +#ifdef CONFIG_LCD_UG2864AMBAG01 + regval32 &= ~(LPC214X_PINSEL1_P017_MASK|LPC214X_PINSEL1_P019_MASK| + LPC214X_PINSEL1_P020_MASK|LPC214X_PINSEL1_P023_MASK); + regval32 |= (LPC214X_PINSEL1_P017_SCK1|LPC214X_PINSEL1_P019_MOSI1| + LPC214X_PINSEL1_P020_GPIO|LPC214X_PINSEL1_P023_GPIO); +#else + regval32 &= ~(LPC214X_PINSEL1_P017_MASK|LPC214X_PINSEL1_P018_MASK + LPC214X_PINSEL1_P019_MASK|LPC214X_PINSEL1_P020_MASK| + LPC214X_PINSEL1_P023_MASK); + regval32 |= (LPC214X_PINSEL1_P017_SCK1|LPC214X_PINSEL1_P018_MISO1| + LPC214X_PINSEL1_P019_MOSI1|LPC214X_PINSEL1_P020_GPIO| + LPC214X_PINSEL1_P023_GPIO); +#endif + putreg32(regval32, LPC214X_PINSEL1); + + /* De-select chip select using P0.20 (SSEL1) (low enables) and select A0 + * for commands (also low) + */ + + regval32 = (1 << 20) | (1 << 23); + putreg32(regval32, CS_SET_REGISTER); + regval32 |= getreg32(CS_DIR_REGISTER); + putreg32(regval32, CS_DIR_REGISTER); + + spidbg("CS Pin Config: PINSEL1: %08x PIN: %08x DIR: %08x\n", + getreg32(LPC214X_PINSEL1), getreg32(CS_PIN_REGISTER), + getreg32(CS_DIR_REGISTER)); + + /* Enable peripheral clocking to SPI1 */ + + regval32 = getreg32(LPC214X_PCON_PCONP); + regval32 |= LPC214X_PCONP_PCSPI1; + putreg32(regval32, LPC214X_PCON_PCONP); + + /* Configure 8-bit SPI mode */ + + putreg16(LPC214X_SPI1CR0_DSS8BIT|LPC214X_SPI1CR0_FRFSPI, LPC214X_SPI1_CR0); + + /* Disable the SSP and all interrupts (we'll poll for all data) */ + + putreg8(0, LPC214X_SPI1_CR1); + putreg8(0, LPC214X_SPI1_IMSC); + + /* Set the initial clock frequency for indentification mode < 400kHz */ + + spi_setfrequency(NULL, 400000); + + /* Enable the SPI */ + + regval8 = getreg8(LPC214X_SPI1_CR1); + putreg8(regval8 | LPC214X_SPI1CR1_SSE, LPC214X_SPI1_CR1); + + for (i = 0; i < 8; i++) + { + (void)getreg16(LPC214X_SPI1_DR); + } + + return &g_spidev; +} diff --git a/configs/zp214xpa/src/lpc2148_ug2864ambag01.c b/configs/zp214xpa/src/lpc2148_ug2864ambag01.c new file mode 100644 index 0000000000000000000000000000000000000000..c857b43ba81d9aa4c968139e6b9359d09b237367 --- /dev/null +++ b/configs/zp214xpa/src/lpc2148_ug2864ambag01.c @@ -0,0 +1,187 @@ +/**************************************************************************** + * config/zp214xpa/src/lpc2148_ug2864ambag01.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "lpc214x_pinsel.h" +#include "lpc214x_spi.h" + +#ifdef CONFIG_LCD_UG2864AMBAG01 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* The pin configurations here requires that SPI1 is avaialable */ + +/* SPI should be configured with CMD/DATA support (and no transfer methods) */ + +#ifndef CONFIG_SPI_CMDDATA +# error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration" +#endif + +/* Pin Configuration ********************************************************/ +/* UG-2864AMBAG01 OLED Display: + * + * PIN NAME PIN CONFIGURATION + * 1 3V3 + * 2 5V + * 3 RESET P0.18/CAP1.3/MISO1/MAT1.3P0.18 RESET - General purpose output + * 4 DI P0.19/MAT1.2/MOSI1/CAP1.2P0.19 DI - Alternate function 2 + * 5 CS P0.20/MAT1.3/SSEL1/EINT3 - General purpose output + * 6 SCK P0.17/CAP1.2/SCK1/MAT1.2 - Alternate function 2 + * 7 A0 P0.23/VBUS - General purpose output + * 8 N/C LED- + * 9 N/C LED+ (BL) + * 10 GND + * + * Definitions and configuration for DO, DI, CS, in up_spi1.c + */ + +/* Use either FIO or legacy GPIO */ + +#ifdef CONFIG_LPC214x_FIO +# define RESET_PIN_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_PIN_OFFSET) +# define RESET_SET_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_SET_OFFSET) +# define RESET_CLR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_CLR_OFFSET) +# define RESET_DIR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_DIR_OFFSET) +#else +# define RESET_PIN_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_PIN_OFFSET) +# define RESET_SET_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_SET_OFFSET) +# define RESET_CLR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_CLR_OFFSET) +# define RESET_DIR_REGISTER (LPC214X_GPIO0_BASE+LPC214X_GPIO_DIR_OFFSET) +#endif + +/* Debug ********************************************************************/ + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg(format, ...) dbg(format, ##__VA_ARGS__) +# define lcdvdbg(format, ...) vdbg(format, ##__VA_ARGS__) +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + uint32_t regval32; + uint32_t bits32; + + /* Configure multiplexed pins as connected on the ZP213X/4XPA board: + * + * PINSEL1 P0.18/CAP1.3/MISO1/MAT1.3 Bits 4-5=00 for P0.18 + */ + + regval32 = getreg32(LPC214X_PINSEL1); + regval32 &= ~LPC214X_PINSEL1_P018_MASK; + regval32 |= LPC214X_PINSEL1_P018_GPIO; + putreg32(regval32, LPC214X_PINSEL1); + + /* Set the RESET line low, putting the OLED into the reset state. */ + + bits32 = (1 << 18); + putreg32(bits32, RESET_CLR_REGISTER); + regval32 = getreg32(RESET_DIR_REGISTER); + putreg32(regval32 | bits32, RESET_DIR_REGISTER); + + lcdvdbg("RESET Pin Config: PINSEL1: %08x PIN: %08x DIR: %08x\n", + getreg32(LPC214X_PINSEL1), getreg32(RESET_PIN_REGISTER), + getreg32(RESET_DIR_REGISTER)); + + /* Wait a bit then release the OLED from the reset state */ + + up_mdelay(20); + putreg32(bits32, RESET_SET_REGISTER); + + lcdvdbg("RESET release: PIN: %08x DIR: %08x\n", + getreg32(RESET_PIN_REGISTER), getreg32(RESET_DIR_REGISTER)); + + /* Get the SPI1 port interface */ + + spi = lpc214x_spibus_initialize(1); + if (!spi) + { + lcddbg("Failed to initialize SPI port 1\n"); + } + else + { + /* Bind the SPI port to the OLED */ + + dev = ug2864ambag01_initialize(spi, devno); + if (!dev) + { + lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno); + } + else + { + lcdvdbg("Bound SPI port 1 to OLED %d\n", devno); + + /* And turn the OLED on */ + + (void)dev->setpower(dev, CONFIG_LCD_MAXPOWER); + return dev; + } + } + + return NULL; +} +#endif /* CONFIG_LCD_UG2864AMBAG01 */ diff --git a/configs/zp214xpa/tools/olimex.cfg b/configs/zp214xpa/tools/olimex.cfg new file mode 100644 index 0000000000000000000000000000000000000000..09f373993be622906ffb46e4edc8183291995f67 --- /dev/null +++ b/configs/zp214xpa/tools/olimex.cfg @@ -0,0 +1,62 @@ +# NXP LPC2148 ARM7TDMI + +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +#interface +interface ft2232 +ft2232_device_desc "Olimex OpenOCD JTAG A" +ft2232_layout "olimex-jtag" +ft2232_vid_pid 0x15BA 0x0003 + +# Use RCLK. If RCLK is not available fall back to 500kHz. +# +# Depending on cabling you might be able to eek this up to 2000kHz. +jtag_rclk 500 + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lpc2148 +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x4f1f0f0f +} + +adapter_nsrst_delay 200 +jtag_ntrst_delay 200 + +# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate +# JTAG, power-on reset is not enough, i.e. you need to perform a +# reset before being able to talk to the LPC2148, attach is not possible. + +reset_config trst_and_srst + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME + +$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 + +$_TARGETNAME configure -event reset-init { + # Force target into ARM state + arm core_state arm + + # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select + # "User Flash Mode" where interrupt vectors are _not_ remapped, + # and reside in flash instead). + # + # See section 7.1 on page 32 ("Memory Mapping control register") in + # "UM10139: Volume 1: LPC214x User Manual", Rev. 02 -- 25 July 2006. + # http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc2141.lpc2142.lpc2144.lpc2146.lpc2148.pdf + mwb 0xE01FC040 0x01 +} + +# flash bank lpc2000 0 0 [calc checksum] +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME lpc2000 0x0 0x7d000 0 0 $_TARGETNAME lpc2000_v2 14765 calc_checksum diff --git a/configs/zp214xpa/tools/oocd.sh b/configs/zp214xpa/tools/oocd.sh new file mode 100644 index 0000000000000000000000000000000000000000..f1e49344d215164871c7f63a42e987cf791ad348 --- /dev/null +++ b/configs/zp214xpa/tools/oocd.sh @@ -0,0 +1,52 @@ +#!/bin/sh +# +# See configs/zp214xpa/README.txt for information about +# this file. + +TOPDIR=$1 +USAGE="$0 [-d]" +if [ -z "${TOPDIR}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +# Assume that OpenOCD was installed and at /usr/local/bin. Uncomment +# the following to run directly from the build directory +#OPENOCD_PATH="/home/OpenOCD/openocd/src" +#TARGET_PATH="/home/OpenOCD/openocd/tcl" +OPENOCD_PATH="/usr/local/bin" +TARGET_PATH="/usr/local/share/openocd/scripts" + +OPENOCD_EXE=openocd.exe +OPENOCD_CFG="${TOPDIR}/configs/zp214xpa/tools/olimex.cfg" +OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}" + +if [ "X$2" = "X-d" ]; then + OPENOCD_ARGS=$OPENOCD_ARGS" -d3" + set -x +fi + +if [ ! -d ${OPENOCD_PATH} ]; then + echo "OpenOCD path does not exist: ${OPENOCD_PATH}" + exit 1 +fi +if [ ! -x ${OPENOCD_PATH}/${OPENOCD_EXE} ]; then + echo "OpenOCD does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}" + exit 1 +fi +if [ ! -f ${OPENOCD_CFG} ]; then + echo "OpenOCD config file does not exist: ${OPENOCD_CFG}" + exit 1 +fi + +echo "Starting OpenOCD" +cd ${OPENOCD_PATH} || { echo "Failed to CD to ${OPENOCD_PATH}"; exit 1; } +${OPENOCD_EXE} ${OPENOCD_ARGS} & +echo "OpenOCD daemon started" +ps -ef | grep openocd +echo "In GDB: target remote localhost:3333" + + + + diff --git a/configs/zp214xpa/tools/usb-repair.txt b/configs/zp214xpa/tools/usb-repair.txt new file mode 100644 index 0000000000000000000000000000000000000000..83d7598a5569e5b386da7281f201cfa2f6441ed7 --- /dev/null +++ b/configs/zp214xpa/tools/usb-repair.txt @@ -0,0 +1,25 @@ +https://www.olimex.com/dev/pdf/ARM/JTAG/Repair%20Procedure%20for%20OpenOcd-Rev.%20G%20drivers.pdf + +Repair procedure for ARM-USB-OCD drivers + +1. Uninstalling ARM-USB-OCD drivers +------------------------------------- +1.1. Connect your programmer/debugger to your computer, open Device Manager + and uninstall the drivers for ARM-USB-OCD. +1.2. After you have uninstalled ARM-USB-TINY driver from Device Manager, + disconnect the programmer from your computer. +1.3. Now you should download FTClean.exe from here: + http://www.ftdichip.com/Support/Utilities/FTClean.zip. +1.4. After download is complete extract the "*.zip" file, open folder FTClean, + and run FTClean.exe +1.5. Ror VID (Hex) select "Other". And after that fill the first box with 15ba + and "PID (Hex)" with 0004. +1.6. Press "Clean System" button. Make sure that all FTDI devices are + disconnected. (My require administrator privileges). + +2. Re-installing the ARM-USB-OCD driver +--------------------------------------- +2.1 Connect the programmer/debugger to the computer. +2.2 When prompted, browse to the C:\gccfd\DRIVERS\ARM-USB-OCD-DRIVER + directory and install. (A different driver is required for OpenOCD + 0.4.0. That driver is available from the olimex.com web site).